diff --git a/BLD/build/HEADERS/CUR-0-vmkdrivers-namespace/vmkernel64/release/vmkplexer/__namespace.h b/BLD/build/HEADERS/CUR-0-vmkdrivers-namespace/vmkernel64/release/vmkplexer/__namespace.h index 3ba341c..7da8c0f 100644 --- a/BLD/build/HEADERS/CUR-0-vmkdrivers-namespace/vmkernel64/release/vmkplexer/__namespace.h +++ b/BLD/build/HEADERS/CUR-0-vmkdrivers-namespace/vmkernel64/release/vmkplexer/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.vmkplexer", "2.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "2.0" +VMK_NAMESPACE_PROVIDES("com.vmware.vmkplexer", "3.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "3.0" diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ahci/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ahci/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ahci/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ahci/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ata_piix/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ata_piix/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ata_piix/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ata_piix/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2/__namespace.h index 0a802a7..a09ebbf 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2/__namespace.h @@ -6,4 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.broadcom.cnic_register", "9.2.1.0"); +VMK_NAMESPACE_PROVIDES("com.broadcom.bnx2", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.broadcom.cnic_register", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2fc/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2fc/__namespace.h new file mode 100644 index 0000000..ac16d73 --- /dev/null +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2fc/__namespace.h @@ -0,0 +1,11 @@ + +/* + * DO NOT EDIT THIS FILE - IT IS GENERATED BY THE DRIVER BUILD. + * + * If you need to change the driver's name spaces, look in the scons + * files for the driver's defineVmkDriver() rule. + */ + +VMK_NAMESPACE_REQUIRED("com.broadcom.cnic", "9.2.2.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libfcoe", "9.2.2.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i/__namespace.h index 1152dc7..da8f683 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i/__namespace.h @@ -6,5 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.broadcom.cnic", "9.2.1.0"); -VMK_NAMESPACE_REQUIRED("com.vmware.iscsi_linux", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.broadcom.cnic", "9.2.2.0"); +VMK_NAMESPACE_REQUIRED("com.broadcom.cnic_register", "9.2.2.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.iscsi_linux", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x/__namespace.h index 0a802a7..5965cc1 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x/__namespace.h @@ -6,4 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.broadcom.cnic_register", "9.2.1.0"); +VMK_NAMESPACE_PROVIDES("com.broadcom.bnx2x", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.broadcom.cnic_register", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic/__namespace.h index 4fbb45d..3e02de7 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic/__namespace.h @@ -6,6 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.broadcom.cnic", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" -VMK_NAMESPACE_REQUIRED("com.broadcom.cnic_register", "9.2.1.0"); +VMK_NAMESPACE_PROVIDES("com.broadcom.cnic", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.broadcom.cnic_register", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic_register/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic_register/__namespace.h index c8ecea7..8f3379c 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic_register/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic_register/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.broadcom.cnic_register", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.broadcom.cnic_register", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic/__namespace.h index 01f8b59..d6ad651 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.1.0"); -VMK_NAMESPACE_REQUIRED("com.vmware.libfcoe", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.2.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libfcoe", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_devintf/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_devintf/__namespace.h index d281143..c9115a9 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_devintf/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_devintf/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.ipmi", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.ipmi", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_msghandler/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_msghandler/__namespace.h index f6556cd..e66f347 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_msghandler/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_msghandler/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.ipmi", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.vmware.ipmi", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv/__namespace.h index d281143..c9115a9 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.ipmi", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.ipmi", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox/__namespace.h index a0fe059..ea860cc 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.lsi.megaraid_mbox", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.lsi.megaraid_mbox", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core/__namespace.h new file mode 100644 index 0000000..8994179 --- /dev/null +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core/__namespace.h @@ -0,0 +1,10 @@ + +/* + * DO NOT EDIT THIS FILE - IT IS GENERATED BY THE DRIVER BUILD. + * + * If you need to change the driver's name spaces, look in the scons + * files for the driver's defineVmkDriver() rule. + */ + +VMK_NAMESPACE_PROVIDES("com.mellanox.mlx4_core", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en/__namespace.h new file mode 100644 index 0000000..08910d5 --- /dev/null +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en/__namespace.h @@ -0,0 +1,9 @@ + +/* + * DO NOT EDIT THIS FILE - IT IS GENERATED BY THE DRIVER BUILD. + * + * If you need to change the driver's name spaces, look in the scons + * files for the driver's defineVmkDriver() rule. + */ + +VMK_NAMESPACE_REQUIRED("com.mellanox.mlx4_core", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic/__namespace.h index 8118055..5a5ce36 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.netxen.nx_nic", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.netxen.nx_nic", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_amd/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_amd/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_amd/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_amd/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_atiixp/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_atiixp/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_atiixp/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_atiixp/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_cmd64x/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_cmd64x/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_cmd64x/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_cmd64x/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_hpt3x2n/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_hpt3x2n/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_hpt3x2n/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_hpt3x2n/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_pdc2027x/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_pdc2027x/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_pdc2027x/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_pdc2027x/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_serverworks/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_serverworks/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_serverworks/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_serverworks/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_sil680/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_sil680/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_sil680/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_sil680/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_via/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_via/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_via/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_via/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx/__namespace.h index 2a0f8b1..01c244f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx/__namespace.h @@ -6,6 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.qla4xxx", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" -VMK_NAMESPACE_REQUIRED("com.vmware.iscsi_linux", "9.2.1.0"); +VMK_NAMESPACE_PROVIDES("com.vmware.qla4xxx", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.vmware.iscsi_linux", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random/__namespace.h index bf42696..89c9c2b 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.random", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.vmware.random", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_nv/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_nv/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_nv/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_nv/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_promise/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_promise/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_promise/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_promise/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil24/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil24/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil24/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil24/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_svw/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_svw/__namespace.h index ca0b9fb..416310f 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_svw/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_svw/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/tg3/__namespace.h b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/tg3/__namespace.h index 118b111..93e28a3 100644 --- a/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/tg3/__namespace.h +++ b/BLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/tg3/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.broadcom.tg3", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.broadcom.tg3", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/current.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/current.h index 0b9e912..b7cc07a 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/current.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/current.h @@ -44,7 +44,9 @@ static inline struct task_struct *get_current(void) * Pointer to current task of type task_struct * */ -/* _VMKLNX_CODECHECK_: current */ +/* If the macro 'current' or its comments are changed please + * update the documentation for 'current' in vmkdrivers/src_92/doc/dummyDefs.doc + */ #define current get_current() #else diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/io.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/io.h index 3bc3292..7dd9fba 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/io.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/io.h @@ -185,11 +185,16 @@ static inline void * phys_to_virt(unsigned long address) /** * page_to_phys - page handle to machine address - * @maddr : machine address + * @page : page handle + * + * Gets the machine address that corresponds to the page parameter * * ESX Deviation Notes: * None. * + * RETURN VALUE: + * A machine address + * */ /* _VMKLNX_CODECHECK_: page_to_phys */ #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/system.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/system.h index 163856d..1a5213a 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/system.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release/asm/system.h @@ -352,9 +352,6 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, /* _VMKLNX_CODECHECK_: rmb */ #define rmb() asm volatile("lfence":::"memory") -#ifdef CONFIG_UNORDERED_IO -#define wmb() asm volatile("sfence" ::: "memory") -#else /** * wmb - write memory barrier * @@ -368,9 +365,16 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, * RETURN VALUE: * NONE */ +/* + * VMware : 2013 + * + * As mentioned in PR 891237, CONFIG_UNORDERED_IO was removed from Linux + * on 03/25/2006 by Andi Kleen ("x86_64: Remove CONFIG_UNORDERED_IO"). Here + * wmb() is being changed to a real sfence instead of just a compile barrier. + */ /* _VMKLNX_CODECHECK_: wmb */ -#define wmb() asm volatile("" ::: "memory") -#endif +#define wmb() asm volatile("sfence" ::: "memory") + #define read_barrier_depends() do {} while(0) #define set_mb(var, value) do { (void) xchg(&var, value); } while (0) diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/cdc_ether/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/cdc_ether/__namespace.h index 92bbf29..76e22e7 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/cdc_ether/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/cdc_ether/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.1.0"); -VMK_NAMESPACE_REQUIRED("com.vmware.usbnet", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.2.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.usbnet", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/ehci-hcd/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/ehci-hcd/__namespace.h index 581db06..b893435 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/ehci-hcd/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/ehci-hcd/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/fcoe/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/fcoe/__namespace.h index 3928df9..b0be9d4 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/fcoe/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/fcoe/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.libfcoe", "9.2.1.0"); -VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libfcoe", "9.2.2.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid/__namespace.h index a01734e..242765f 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid/__namespace.h @@ -6,6 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.usbhid", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" -VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.1.0"); +VMK_NAMESPACE_PROVIDES("com.vmware.usbhid", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/iscsi_linux_9_2_0_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/iscsi_linux_9_2_0_0/__namespace.h index 77dc656..d50ae61 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/iscsi_linux_9_2_0_0/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/iscsi_linux_9_2_0_0/__namespace.h @@ -8,4 +8,4 @@ VMK_NAMESPACE_PROVIDES("com.vmware.iscsi_linux", "9.2.0.0"); #define VMKLNX_MY_NAMESPACE_VERSION "9.2.0.0" -VMK_NAMESPACE_REQUIRED("com.vmware.iscsi_linux", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.iscsi_linux", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/iscsi_linux_9_2_1_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/iscsi_linux_9_2_1_0/__namespace.h new file mode 100644 index 0000000..3da1198 --- /dev/null +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/iscsi_linux_9_2_1_0/__namespace.h @@ -0,0 +1,11 @@ + +/* + * DO NOT EDIT THIS FILE - IT IS GENERATED BY THE DRIVER BUILD. + * + * If you need to change the driver's name spaces, look in the scons + * files for the driver's defineVmkDriver() rule. + */ + +VMK_NAMESPACE_PROVIDES("com.vmware.iscsi_linux", "9.2.1.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_REQUIRED("com.vmware.iscsi_linux", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92/__namespace.h index 86d7fc0..7145ec3 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.libata", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.vmware.libata", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_0_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_0_0/__namespace.h index cf20f60..395bf47 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_0_0/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_0_0/__namespace.h @@ -8,4 +8,4 @@ VMK_NAMESPACE_PROVIDES("com.vmware.libata", "9.2.0.0"); #define VMKLNX_MY_NAMESPACE_VERSION "9.2.0.0" -VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_1_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_1_0/__namespace.h new file mode 100644 index 0000000..b9bfbf4 --- /dev/null +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_1_0/__namespace.h @@ -0,0 +1,11 @@ + +/* + * DO NOT EDIT THIS FILE - IT IS GENERATED BY THE DRIVER BUILD. + * + * If you need to change the driver's name spaces, look in the scons + * files for the driver's defineVmkDriver() rule. + */ + +VMK_NAMESPACE_PROVIDES("com.vmware.libata", "9.2.1.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_REQUIRED("com.vmware.libata", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92/__namespace.h index e0698b0..3658413 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.libfc", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.vmware.libfc", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_9_2_0_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_9_2_0_0/__namespace.h index 215dfe1..ef56865 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_9_2_0_0/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_9_2_0_0/__namespace.h @@ -8,4 +8,4 @@ VMK_NAMESPACE_PROVIDES("com.vmware.libfc", "9.2.0.0"); #define VMKLNX_MY_NAMESPACE_VERSION "9.2.0.0" -VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_9_2_1_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_9_2_1_0/__namespace.h new file mode 100644 index 0000000..aaaaa77 --- /dev/null +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_9_2_1_0/__namespace.h @@ -0,0 +1,11 @@ + +/* + * DO NOT EDIT THIS FILE - IT IS GENERATED BY THE DRIVER BUILD. + * + * If you need to change the driver's name spaces, look in the scons + * files for the driver's defineVmkDriver() rule. + */ + +VMK_NAMESPACE_PROVIDES("com.vmware.libfc", "9.2.1.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_92/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_92/__namespace.h index b5cb767..0d41d95 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_92/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_92/__namespace.h @@ -6,6 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.libfcoe", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" -VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.1.0"); +VMK_NAMESPACE_PROVIDES("com.vmware.libfcoe", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.vmware.libfc", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_0_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_0_0/__namespace.h index 3f71fe0..7c300f1 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_0_0/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_0_0/__namespace.h @@ -8,4 +8,4 @@ VMK_NAMESPACE_PROVIDES("com.vmware.libfcoe", "9.2.0.0"); #define VMKLNX_MY_NAMESPACE_VERSION "9.2.0.0" -VMK_NAMESPACE_REQUIRED("com.vmware.libfcoe", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.libfcoe", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_1_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_1_0/__namespace.h new file mode 100644 index 0000000..9068a54 --- /dev/null +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_1_0/__namespace.h @@ -0,0 +1,11 @@ + +/* + * DO NOT EDIT THIS FILE - IT IS GENERATED BY THE DRIVER BUILD. + * + * If you need to change the driver's name spaces, look in the scons + * files for the driver's defineVmkDriver() rule. + */ + +VMK_NAMESPACE_PROVIDES("com.vmware.libfcoe", "9.2.1.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_REQUIRED("com.vmware.libfcoe", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-ohci/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-ohci/__namespace.h index 581db06..b893435 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-ohci/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-ohci/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage/__namespace.h index 34cddd8..aab6cd2 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage/__namespace.h @@ -6,6 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.usbstorage", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" -VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.1.0"); +VMK_NAMESPACE_PROVIDES("com.vmware.usbstorage", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-uhci/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-uhci/__namespace.h index 581db06..b893435 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-uhci/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-uhci/__namespace.h @@ -6,4 +6,4 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.1.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb/__namespace.h index af4b33f..5fb6a81 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb/__namespace.h @@ -6,5 +6,5 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.usb", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" +VMK_NAMESPACE_PROVIDES("com.vmware.usb", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet/__namespace.h index 88cbbe3..2dfed11 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet/__namespace.h @@ -6,6 +6,6 @@ * files for the driver's defineVmkDriver() rule. */ -VMK_NAMESPACE_PROVIDES("com.vmware.usbnet", "9.2.1.0"); -#define VMKLNX_MY_NAMESPACE_VERSION "9.2.1.0" -VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.1.0"); +VMK_NAMESPACE_PROVIDES("com.vmware.usbnet", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.vmware.usb", "9.2.2.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9/__namespace.h index b474387..129af07 100644 --- a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9/__namespace.h +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9/__namespace.h @@ -8,4 +8,4 @@ VMK_NAMESPACE_PROVIDES("com.vmware.driverAPI", "9.2"); #define VMKLNX_MY_NAMESPACE_VERSION "9.2" -VMK_NAMESPACE_REQUIRED("com.vmware.vmkplexer", "2.0"); +VMK_NAMESPACE_REQUIRED("com.vmware.vmkplexer", "3.0"); diff --git a/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9_2_2_0/__namespace.h b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9_2_2_0/__namespace.h new file mode 100644 index 0000000..db06c26 --- /dev/null +++ b/BLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9_2_2_0/__namespace.h @@ -0,0 +1,11 @@ + +/* + * DO NOT EDIT THIS FILE - IT IS GENERATED BY THE DRIVER BUILD. + * + * If you need to change the driver's name spaces, look in the scons + * files for the driver's defineVmkDriver() rule. + */ + +VMK_NAMESPACE_PROVIDES("com.vmware.driverAPI", "9.2.2.0"); +#define VMKLNX_MY_NAMESPACE_VERSION "9.2.2.0" +VMK_NAMESPACE_REQUIRED("com.vmware.driverAPI", "9.2"); diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_atomic.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_atomic.h index 54f2172..e7882b3 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_atomic.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_atomic.h @@ -129,7 +129,7 @@ static inline void vmk_AtomicDec64( { vmk_AtomicPrologue(); __asm__ __volatile__( - "lock; decl %0" + "lock; decq %0" : "+m" (*var) : : "cc" @@ -158,7 +158,7 @@ static inline void vmk_AtomicAdd64( __asm__ __volatile__( "lock; addq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); @@ -184,7 +184,7 @@ static inline void vmk_AtomicSub64( __asm__ __volatile__( "lock; subq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); @@ -211,7 +211,7 @@ static inline void vmk_AtomicOr64( __asm__ __volatile__( "lock; orq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); @@ -237,7 +237,7 @@ static inline void vmk_AtomicAnd64( __asm__ __volatile__( "lock; andq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); @@ -263,7 +263,7 @@ static inline void vmk_AtomicXor64( __asm__ __volatile__( "lock; xorq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_char.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_char.h index 20d323c..343101b 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_char.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_char.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 1998 - 2010 VMware, Inc. All rights reserved. + * Copyright 1998 - 2010,2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -51,8 +51,11 @@ /** \brief Don't block for file operations. */ #define VMK_CHARDEV_OFLAG_NONBLOCK 0x00000800 -/** \brief Synchronous file operations. */ -#define VMK_CHARDEV_OFLAG_SYNC 0x00001000 +/** \brief File integerity for synchronous file I/O. */ +#define VMK_CHARDEV_OFLAG_SYNC 0x00101000 + +/** \brief Data integrity for synchronous file I/O. */ +#define VMK_CHARDEV_OFLAG_DSYNC 0x00001000 /** \brief Use direct I/O. */ #define VMK_CHARDEV_OFLAG_DIRECT 0x00004000 @@ -106,16 +109,6 @@ typedef struct vmk_CharDevFdAttr { /* across open/ioctl/close calls */ } vmk_CharDevFdAttr; -/** - * \brief Opaque handle to a character device. - */ -typedef struct vmkCharDevInt* vmk_CharDev; - -/** - * \brief A default initialization value for a vmk_CharDev. - */ -#define VMK_INVALID_CHARDEV (NULL) - /** * \brief Opaque poll token handle. */ @@ -126,6 +119,26 @@ typedef void *vmk_PollToken; */ typedef void *vmk_PollContext; +/** + * \brief Identifier for logical graphics devices. + */ +#define VMK_CHARDEV_IDENTIFIER_GRAPHICS "com.vmware.graphics" + +/** + * \brief Character device driver's entry points. + */ +struct vmk_CharDevOps; + +/** \brief Character device registration data. */ +typedef struct vmk_CharDevRegData { + /** \brief Module creating this device. */ + vmk_ModuleID moduleID; + /** \brief Device operations. */ + const struct vmk_CharDevOps *fileOps; + /** \brief Device private data. */ + vmk_AddrCookie devicePrivate; +} vmk_CharDevRegData; + /** *********************************************************************** * vmk_CharDevOpenFn -- */ /** @@ -330,93 +343,6 @@ typedef struct vmk_CharDevOps { vmk_CharDevWriteFn write; } vmk_CharDevOps; -/** - *********************************************************************** - * vmk_CharDevCleanupFn -- */ /** - * - * \brief Prototype for a character device driver's cleanup callback. - * - * \param[in] private Optional private data to be used by the callback - * - * \retval VMK_OK The cleanup function executed correctly. - * This is not an indicator of the success or failure of - * the operations in the function, but merely that they - * ran. Any other return value is not allowed. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_CharDevCleanupFn)(vmk_AddrCookie private); - -/* - *********************************************************************** - * vmk_CharDevRegister -- */ /** - * - * \brief Register the specified character device, to be invoked from - * user-space. - * - * \param[in] module Module that owns the character device. - * \param[in] name The name of the device - this must be unique. - * \param[in] fileOps Table of the driver file operations. - * Neither open nor close can be supplied - * without the other. - * If read or write operations are supplied, - * then open and close must also be supplied. - * \param[in] cleanup Function automatically invoked to clean up - * after all file ops have ceased and the - * device has been unregistered. May be NULL. - * \param[in] devicePrivate Data given to the driver for each file - * op and cleaned up after unregistration. - * \param[out] assignedHandle Handle to the registered character device. - * - * \retval VMK_EXISTS A device with that name is already registered - * \retval VMK_FAILURE Unable to allocate internal slot for the device - * \retval VMK_NO_MEMORY Unable to allocate memory for device metadata - * \retval VMK_BAD_PARAM Module ID was invalid, name was invalid, - * or one or more specified driver ops are NULL - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_CharDevRegister( - vmk_ModuleID module, - const char *name, - const vmk_CharDevOps *fileOps, - vmk_CharDevCleanupFn cleanup, - vmk_AddrCookie devicePrivate, - vmk_CharDev *assignedHandle); - -/* - *********************************************************************** - * vmk_CharDevUnregister -- */ /** - * - * \brief Unregister a character device. - * - * The character device will be unregistered automatically by - * the kernel only after all open files to the device have been - * closed. If no files are open when vmk_CharDevUnregister is - * called, the device may be unregistered immediately and have the - * cleanup function registered with it invoked. If the device has - * files open, vmk_CharDevUnregister internally defers the device for - * later automatic removal and returns to the caller immediately. When - * the last file is closed, the device will then be destroyed and the - * cleanup function invoked. - * - * \note No new open files to the device can be created after calling - * vmk_CharDevUnregister. - * \note The vmkernel will prevent a module from being unloaded while - * it has open files associated with a character device, even - * if that device has been requested to be unregistered. - * - * \param[in] deviceHandle Handle of device assigned during registration. - * - * \retval VMK_NOT_FOUND The device does not exist. - * \retval VMK_OK The device was either unregistered or internally - * deferred for unregistration once all associated files - * close. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_CharDevUnregister(vmk_CharDev deviceHandle); - /* *********************************************************************** * vmk_CharDevWakePollers -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_char_legacy.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_char_legacy.h new file mode 100644 index 0000000..f14c7eb --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_char_legacy.h @@ -0,0 +1,131 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Character Devices */ /** + * \addtogroup CharDev + * + * Interfaces that allow registration of generic vmkernel character + * device nodes. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_CHAR_LEGACY_H_ +#define _VMKAPI_CHAR_LEGACY_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Opaque handle to a character device. + */ +typedef struct vmkCharDevInt* vmk_CharDev; + +/** + * \brief A default initialization value for a vmk_CharDev. + */ +#define VMK_INVALID_CHARDEV (NULL) + +/** + *********************************************************************** + * vmk_CharDevCleanupFn -- */ /** + * + * \brief Prototype for a character device driver's cleanup callback. + * + * \param[in] private Optional private data to be used by the callback + * + * \retval VMK_OK The cleanup function executed correctly. + * This is not an indicator of the success or failure of + * the operations in the function, but merely that they + * ran. Any other return value is not allowed. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_CharDevCleanupFn)(vmk_AddrCookie private); + +/* + *********************************************************************** + * vmk_CharDevRegister -- */ /** + * + * \brief Register the specified character device, to be invoked from + * user-space. + * + * \nativedriversdisallowed + * + * \param[in] module Module that owns the character device. + * \param[in] name The name of the device - this must be unique. + * \param[in] fileOps Table of the driver file operations. + * Neither open nor close can be supplied + * without the other. + * If read or write operations are supplied, + * then open and close must also be supplied. + * \param[in] cleanup Function automatically invoked to clean up + * after all file ops have ceased and the + * device has been unregistered. May be NULL. + * \param[in] devicePrivate Data given to the driver for each file + * op and cleaned up after unregistration. + * \param[out] assignedHandle Handle to the registered character device. + * + * \retval VMK_EXISTS A device with that name is already registered + * \retval VMK_FAILURE Unable to allocate internal slot for the device + * \retval VMK_NO_MEMORY Unable to allocate memory for device metadata + * \retval VMK_BAD_PARAM Module ID was invalid, name was invalid, + * or one or more specified driver ops are NULL + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_CharDevRegister( + vmk_ModuleID module, + const char *name, + const vmk_CharDevOps *fileOps, + vmk_CharDevCleanupFn cleanup, + vmk_AddrCookie devicePrivate, + vmk_CharDev *assignedHandle); + +/* + *********************************************************************** + * vmk_CharDevUnregister -- */ /** + * + * \brief Unregister a character device. + * + * The character device will be unregistered automatically by + * the kernel only after all open files to the device have been + * closed. If no files are open when vmk_CharDevUnregister is + * called, the device may be unregistered immediately and have the + * cleanup function registered with it invoked. If the device has + * files open, vmk_CharDevUnregister internally defers the device for + * later automatic removal and returns to the caller immediately. When + * the last file is closed, the device will then be destroyed and the + * cleanup function invoked. + * + * \nativedriversdisallowed + * \note No new open files to the device can be created after calling + * vmk_CharDevUnregister. + * \note The vmkernel will prevent a module from being unloaded while + * it has open files associated with a character device, even + * if that device has been requested to be unregistered. + * + * \param[in] deviceHandle Handle of device assigned during registration. + * + * \retval VMK_NOT_FOUND The device does not exist. + * \retval VMK_OK The device was either unregistered or internally + * deferred for unregistration once all associated files + * close. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_CharDevUnregister(vmk_CharDev deviceHandle); + +#endif /* _VMKAPI_CHAR_LEGACY_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_heap.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_heap.h index 63ac085..42c33e6 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_heap.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_heap.h @@ -188,6 +188,31 @@ VMK_ReturnStatus vmk_HeapCreate(vmk_HeapCreateProps *props, */ void vmk_HeapDestroy(vmk_HeapID heap); +/* + *********************************************************************** + * vmk_HeapDestroySync -- */ /** + * + * \brief Destroy a dynamic heap. If the heap is non-empty, wait + * for it to become empty before destroying. + * + * \note This function may block if the heap is non-empty. + * + * \param[in] heap Heap to destroy. + * \param[in] timeoutMS Timeout in milliseconds. Zero means no timeout. + * + * \retval VMK_OK Heap was destroyed successfully. + * \retval VMK_DEATH_PENDING World was killed while waiting and the + * heap was not destroyed. + * \retval VMK_WAIT_INTERRUPTED The wait was interrupted and the heap + * was not destroyed. + * \retval VMK_TIMEOUT The wait timed out and the heap was + * not destroyed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_HeapDestroySync(vmk_HeapID heap, + vmk_int64 timeoutMS); + /* *********************************************************************** * vmk_HeapFree -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_logging.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_logging.h index 78b9cec..583dcd6 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_logging.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_logging.h @@ -202,6 +202,20 @@ VMK_ReturnStatus vmk_LogRegister( VMK_ReturnStatus vmk_LogUnregister( vmk_LogComponent handle); +/* + *********************************************************************** + * vmk_LogHeapAllocSize -- */ /** + * + * \brief Amount of heap space needed per registered log component + * + * \note This function will not block. + * + * \retval Number of bytes to set aside in a heap per log component + * + *********************************************************************** + */ +vmk_ByteCount vmk_LogHeapAllocSize(void); + /* *********************************************************************** * vmk_LogGetName -- */ /** @@ -311,7 +325,7 @@ vmk_int32 vmk_LogGetCurrentLogLevel( #define vmk_Warning(handle, fmt, args...) \ vmk_LogLevel(VMK_LOG_URGENCY_WARNING, \ handle, vmk_LogGetCurrentLogLevel(handle), \ - "%s: %s:%d:" fmt "\n", vmk_LogGetName(handle), \ + "%s: %s:%d: " fmt "\n", vmk_LogGetName(handle), \ __FUNCTION__, __LINE__, ##args) /* @@ -335,7 +349,7 @@ vmk_int32 vmk_LogGetCurrentLogLevel( #define vmk_Alert(handle, fmt, args...) \ vmk_LogLevel(VMK_LOG_URGENCY_ALERT, \ handle, vmk_LogGetCurrentLogLevel(handle), \ - "%s: %s:%d:" fmt "\n", vmk_LogGetName(handle), \ + "%s: %s:%d: " fmt "\n", vmk_LogGetName(handle), \ __FUNCTION__, __LINE__, ##args) /* diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt.h new file mode 100644 index 0000000..2433319 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt.h @@ -0,0 +1,358 @@ +/* ********************************************************** + * Copyright 2012 - 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Management Interfaces */ /** + * \defgroup Mgmt Management + * + * Interfaces that allow management of vmkapi modules (runtime + * parameterization, notifications to modules from user space and + * to user space from modules). + * + * @{ + *********************************************************************** + */ + +/* + * vmkapi_mgmt.h -- + * + * vmkernel declarations for datatypes & functions used for + * enabling per-module management APIs between user-space and + * vmkernel modules. + */ + + + +#ifndef _VMKAPI_MGMT_H_ +#define _VMKAPI_MGMT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "base/vmkapi_mgmt_types.h" + +/** \brief Opaque generic handle allocated by the API */ +typedef struct vmkMgmtHandleInt * vmk_MgmtHandle; + +/** + *********************************************************************** + * vmk_MgmtCleanupFn -- */ /** + * + * \brief Prototype for a management interface's cleanup callback. + * + * \param[in] private Optional cookie data to be used by the callback, + * as was originally provided to vmk_MgmtInit(). + * + *********************************************************************** + */ +typedef void (*vmk_MgmtCleanupFn)(vmk_uint64 cookie); + +/** + *********************************************************************** + * vmk_MgmtKeyGetFn -- */ /** + * + * \brief Prototype for get-key function. + * + * \note This prototype is for a module-supplied "get" function + * for fetching a key's value, for a key that was registered + * using vmk_MgmtAddKey. + * + * \param[in] cookie Cookie supplied with vmk_MgmtInit. + * \param[out] keyVal Value of the key that was read. The type of + * pointer this represents depends on the type + * of key that was added using this function. + * + * \retval VMK_OK The 'get' function executed correctly. + * This is not an indicator of the success or failure of + * the operations in the function, but merely that they + * ran. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_MgmtKeyGetFn)(vmk_uint64 cookie, + void *keyVal); + +/** + *********************************************************************** + * vmk_MgmtKeySetFn -- */ /** + * + * \brief Prototype for set-key function. + * + * \note This prototype is for a module-supplied "set" function + * for storing a key's value, for a key that was registered + * using vmk_MgmtAddKey. + * + * \param[in] cookie Cookie supplied with vmk_MgmtKeyValueInit. + * \param[in] keyVal Value of the key to set. The type of + * pointer this represents depends on the type + * of key that was added using this function. + * + * \retval VMK_OK The 'set' function executed correctly. + * This is not an indicator of the success or failure of + * the operations in the function, but merely that they + * ran. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_MgmtKeySetFn)(vmk_uint64 cookie, + void *keyVal); + +/** + *********************************************************************** + * vmk_MgmtInit */ /** + * + * \brief Initialize the kernel side of a user/kernel management API + * + * \note The API passed must have an equivalent signature that is passed + * to the library interface in userland. + * + * \param[in] modId The module ID of the kernel module registering + * the API. + * \param[in] heapId The heap ID to use for allocating temporary + * metadata and parameter passing in event delivery. + * \param[in] sig The API signature of the API being registered. + * Callbacks 0 through VMK_MGMT_RESERVED_CALLBACKS + * are reserved and may not be used. + * \param[in] cleanupFn Optional cleanup function that is executed + * after the last in-flight operation + * concludes. Note that in-flight management + * operations can be going on during a vmk_MgmtDestroy. + * \param[in] cookie A data cookie that will be provided as the + * first argument to all kernel-space callbacks + * and the cleanup function that are invoked. + * \param[in,out] handle The handle that will be allocated for accessing + * this API. + * + * \retval VMK_OK Initialization succeeded. + * \retval VMK_BAD_PARAM Either the modId or signature were invalid. + * \retval VMK_NO_MEMORY Internal metadata for operation could not be + * allocated. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtInit(vmk_ModuleID modId, + vmk_HeapID heapId, + vmk_MgmtApiSignature *sig, + vmk_MgmtCleanupFn cleanupFn, + vmk_uint64 cookie, + vmk_MgmtHandle *handle); + +/** + *********************************************************************** + * vmk_MgmtRegisterInstanceCallbacks */ /** + * + * \brief Register instance-specific management callbacks. + * + * \note This API registers an instance and instance-specific callbacks + * that will be associated with a given management handle. If + * you provide instance-specific callbacks, those callbacks will + * be invoked instead of the default corresponding callbacks that + * were originally registered with the handle. Note that it is + * valid to supply a subset of instance-specific callbacks + * (or even none). + * + * \param[in] handle The management handle that was initialized. + * \param[in] instanceId The unique instance that will have its + * callbacks registered. Must be unique for + * the current handle, and must not be 0. + * \param[in] modId The modId of the module where the + * callbacks reside. + * \param[in] heapId The heapId from the module where the + * callbacks reside. + * \param[in] displayName The name that will be displayed for + * this instance when it's listed. + * \param[in] numCallbacks The number of instance-specific + * callbacks that are being registered. 0 + * is valid, if the instance does not + * supply instance-specific callbacks. + * \param[in] callbacks The callback information for each + * instance-specific callback, corresponding + * to callbacks that override those + * registered in the API signature + * for this handle. + * + * \retval VMK_OK Initialization succeeded. + * \retval VMK_BAD_PARAM Parameters couldn't be validated. + * \retval VMK_NO_MEMORY Internal metadata for operation could not be + * allocated. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtRegisterInstanceCallbacks(vmk_MgmtHandle handle, + vmk_uint64 instanceId, + vmk_ModuleID modId, + vmk_HeapID heapId, + vmk_Name *displayName, + vmk_uint32 numCallbacks, + vmk_MgmtCallbackInfo *callbacks); + +/** + *********************************************************************** + * vmk_MgmtUnregisterInstanceCallbacks */ /** + * + * \brief Unregister an instance from being management handle. + * + * \param[in] handle The management handle that was initialized + * and to which this instance is associated. + * \param[in] instanceId The unique instance that was already + * registered for management. + * + * \retval VMK_OK Unregistration succeeded. + * \retval VMK_BAD_PARAM The instance was not already registered. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtUnregisterInstanceCallbacks(vmk_MgmtHandle handle, + vmk_uint64 instanceId); + + +/** + *********************************************************************** + * vmk_MgmtDestroy */ /** + * + * \brief Destroy the kernel side of a user/kernel management API + * + * \param[in] handle The handle that was passed and initialized with + * vmk_MgmtInit + * + * \note The heap that was passed to vmk_MgmtInit should not be + * destroyed until all access to the management channel has stopped, + * and thus the cleanup function has run. If you call + * vmk_MgmtDestroy during module-unload, you are assured that the + * management channel is not in use & thus you can safely destroy + * the heap immediately. + * + * \retval VMK_BAD_PARAM The API has already been destroyed or has + * already been requested to be destroyed. + * \retval VMK_OK The API will be destroyed once all in-flight + * operations conclude (may be immediate, if + * none are currently in-flight). + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtDestroy(vmk_MgmtHandle handle); + +/* + *********************************************************************** + * vmk_MgmtCallbackInvokeInt -- + * + * This is used by vmk_MgmtCallbackInvoke(). VMKAPI clients should + * never call this function directly. + * + *********************************************************************** + */ + +/** \cond nodoc */ +VMK_ReturnStatus +vmk_MgmtCallbackInvokeInt(vmk_MgmtHandle handle, + vmk_uint64 instanceId, + vmk_uint64 callbackId, + vmk_uint32 argCount, + ...); +/** \endcond */ + + +/** + *********************************************************************** + * vmk_MgmtCallbackInvoke */ /** + * + * \brief Invoke a user-space callback that has zero or more parameters. + * \note The callback will be asynchronously delivered to user-space, + * but only if there currently is a user-space process associated + * with this management handle that is listening for callback + * requests. This call does not block. + * \note Parameters are immediately copied for delivery. Sizes are + * determined by the API signature that was registered with + * vmk_MgmtInit. Additionally, the data cookie that was + * registered with the receiver (in user space) will be provided + * as the first argument to the callback that is delivered in + * user space. + * + * \param[in] handle The handle that was passed and initialized with + * vmk_MgmtInit + * \param[in] instanceId The unique instance ID from which this callback + * is originating. If this is not an instance- + * specific invocation, use VMK_MGMT_NO_INSTANCE_ID. + * \param[in] callbackId The unique ID corresponding to the callback to + * invoke, as registered with the API signature. + * \param[in] ... Pointers to the parameters to copy and pass. + * The number of parameters passed here must match + * the number used by the callback indicated by + * callbackId. + * + * \retval VMK_OK The callback was prepared for delivery. This + does not indicate that it has run, however. + * \retval VMK_BAD_PARAM The callback or number of parameters supplied + * was invalid. + * \retval VMK_NO_MEMORY Temporary storage required to deliver the event + * was unavailable. + * \retval VMK_NOT_FOUND There is no listening user-space process + * running that can receive this callback request. + * + *********************************************************************** + */ + +#define vmk_MgmtCallbackInvoke( \ + /* (vmk_MgmtHandle) */ handle, \ + /* (vmk_uint64) */ instanceId, \ + /* (vmk_uint64) */ callbackId, \ + ...) \ + vmk_MgmtCallbackInvokeInt(handle, instanceId, callbackId, VMK_UTIL_NUM_ARGS(__VA_ARGS__), ##__VA_ARGS__) + +/** + *********************************************************************** + * vmk_MgmtAddKey */ /** + * + * \brief Add a key to be managed as a key-value pair. + * + * \note This creates a key-value pair that can be managed using + * the vmkmgmt_keyval utility. The name of the management + * handle that was initialized is the name of the key-value + * instance that would be the "instance" argument to + * vmkmgmt_keyval. For the get and set functions registered + * here, the cookie that is given back is the cookie that + * was initialized with vmk_MgmtInit. + * + * \param[in] handle The handle that was initialized by + * vmk_MgmtInit. + * \param[in] keyType The type of the key being added. + * \param[in] keyName The name of the key being added. Must be + * unique compared to other registered + * keys for this management handle. + * \param[in] getFn The function that will be used to get the key + * value at runtime. + * \param[in] setFn The function that will be used to set the key + * value at runtime. + * + * \note Both the getFn and setFn must be provided. + * + * \retval VMK_OK The key was added. + * \retval VMK_BAD_PARAM A bad parameter was given. + * \retval VMK_NO_MEMORY Memory was not available to allocate the required + * metadata structures. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtAddKey(vmk_MgmtHandle handle, + vmk_MgmtKeyType keyType, + vmk_Name *keyName, + vmk_MgmtKeyGetFn getFn, + vmk_MgmtKeySetFn setFn); + + +#endif /* _VMKAPI_MGMT_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt_lib.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt_lib.h new file mode 100644 index 0000000..f6a63aa --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt_lib.h @@ -0,0 +1,284 @@ +/* ********************************************************** + * Copyright 2012 - 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ******************************************************************************* + * Management Types */ /** + * \addtogroup Mgmt + * + * User-facing interfaces exported by vmkmgmt_lib, for use when communicating + * with vmkapi modules using vmk_Mgmt APIs. + * + * @{ + ******************************************************************************* + */ + +/* + * vmkapi_mgmt_lib.h -- + * user-space declarations for datatypes & functions used to interact + * with vmkapi modules that use the vmk_Mgmt APIs. Note that user-space + * management APIs and user-specific types are prefixed with "vmk_MgmtUser", + * even when they may be used to invoke actions in the kernel. + */ + +#ifndef _VMKAPI_MGMT_LIB_H_ +#define _VMKAPI_MGMT_LIB_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "base/vmkapi_mgmt_types.h" + +/** \brief An opaque handle that is allocated and managed by the library */ +typedef struct vmkMgmtUserHandleInt * vmk_MgmtUserHandle; + +/** + *********************************************************************** + * vmk_MgmtUserInit */ /** + * + * \brief Initialize user-space management of a kernel module. + * + * \note This initializes your application for interaction with a + * kernel module that has an API signature matching the one you + * provide here with vmk_MgmtUserInit. Note that the kernel side + * of the API must be successfully registered with + * vmk_MgmtInit prior to attempting to initialize the + * user-space side. There can be multiple applications or + * threads using vmk_MgmtUserInit for the same API signature, + * but only one kernel module can service that API signature. + * + * \note The signature provided here must be compatible with the + * signature of the API that has been registered with the kernel. + * if "vendor" is specified (non-null) in the signature, a + * connection will only be made if the vendor matches. + * + * \param[in] sig The API signature describing the + * management operations that can be done. + * Must match a signature registered in the + * kernel. + * \param[in] userCookie A data cookie that will be provided as + * the first argument to all user-space + * callbacks. + * \param[out] handle An opaque handle that will be used for + * further interaction with the API. + * + * \retval 0 Initialization succeeded. + * \retval other A UNIX-style error code. + * + *********************************************************************** + */ +int +vmk_MgmtUserInit(vmk_MgmtApiSignature *sig, + vmk_uint64 userCookie, + vmk_MgmtUserHandle *handle); + +/** + *********************************************************************** + * vmk_MgmtUserGetInstances */ /** + * + * \brief Get instance information for all kernel-registered instances. + * + * \note The instanceIds populated in the vmk_MgmtInstances structure + * can be subsequently used to send a callback request to a + * specific instance with vmk_MgmtUserCallbackInvoke + * + * \param[in] handle Management handle that was initialized + * \param[out] instances Current instance information for given handle + * + * \retval 0 Succeeded getting instances. + * \retval other A UNIX-style error code. + * + *********************************************************************** + */ +int +vmk_MgmtUserGetInstances(vmk_MgmtUserHandle handle, + vmk_MgmtInstances *instances); + +/** + *********************************************************************** + * vmk_MgmtUserBegin */ /** + * + * \brief Begin execution of user callbacks. + * + * \note This call creates a separate thread to monitor incoming + * callback requests from the kernel for the given management + * handle and immediately begins execution of those callbacks + * as they arrive. + * \note This is not necessary if your application is not meant to + * handle callbacks delivered from the kernel. + * + * + * param[in] handle Management handle that was initialized + * + * \retval 0 Succeeded initializing callback execution + * \retval other A UNIX-style error code + * + *********************************************************************** + */ +int +vmk_MgmtUserBegin(vmk_MgmtUserHandle handle); + +/** + *********************************************************************** + * vmk_MgmtUserContinue */ /** + * + * \brief Indefinitely continue monitoring and executing incoming kernel + * callback requests in user space. + * + * \note vmk_MgmtUserBegin must have been successfully executed prior + * to calling vmk_MgmtUserContinue. + * \note Invoking vmk_MgmtUserContinue effectively makes the current + * (calling) thread run indefinitely, in a monitoring mode. This + * is typically used by resident CIM providers. To terminate + * monitoring on a particular management handle after + * vmk_MgmtUserBegin or vmk_MgmtUserContinue has been executed, + * vmk_MgmtUserEnd. vmk_MgmtUserContinue does not return until + * vmk_MgmtUserEnd is separately executed on the same handle + * from within the same process. To use vmk_MgmtUserEnd after + * vmk_MgmtUserContinue, you must create a separate pthread that + * will invoke vmk_MgmtUserEnd sometime later after your main + * thread has invoked vmk_MgmtUserContinue. + * + * \param[in] handle Management handle that was initialized + * + * \retval 0 Execution succeeded and was ended without error. + * This will happen at some future moment in time, + * after vmk_MgmtUserEnd has been used. + * \retval Other A UNIX error code. Execution terminated, + * possibly early with error. + * + *********************************************************************** + */ +int +vmk_MgmtUserContinue(vmk_MgmtUserHandle handle); + +/** + *********************************************************************** + * vmk_MgmtUserEnd */ /** + * + * \brief Terminate monitoring and execution of kernel-to-user callbacks. + * + * \note This may be called after either vmk_MgmtUserBegin or + * vmk_MgmtUserContinue. + * \note Because vmk_MgmtUserContinue does not return, a separate + * thread within the same process space is required to invoked + * vmk_MgmtUserEnd. The effect of vmk_MgmtUserEnd will be to + * cease processing of any additional incoming callback requests + * from the kernel, but the management handle will remain open. + * Processing of inbound callback requests from the kernel can + * be resumed if vmk_MgmtUserBegin is subsequently used on the + * given handle. + * + * \param[in] handle Management handle that was initialized. + * + * \retval 0 Execution was successfully ended. + * \retval Other A UNIX-style error code indicating the nature of + * an error that was encountered. + * + *********************************************************************** + */ +int +vmk_MgmtUserEnd(vmk_MgmtUserHandle handle); + +/** + *********************************************************************** + * vmk_MgmtUserDestroy */ /** + * + * \brief Destroy the user side connection to a management handle. + * + * \note This will terminate receiving of callback requests from the + * kernel and terminate the ability to send new callback + * requests to the kernel. + * + * \param[in] handle Management handle that was initialized. + * + * \retval 0 Handle was destroyed completely without error. + * \retval Other A UNIX-style error code indicating the nature + * of the failure. The handle should not be used + * again even after a failure, however. + * + *********************************************************************** + */ +int +vmk_MgmtUserDestroy(vmk_MgmtUserHandle handle); + +/** + *********************************************************************** + * vmk_MgmtUserCallbackInvoke */ /** + * + * \brief From user space, invoke a callback inside the kernel. + * + * \note Parameter handling: For asynchronous callbacks, all + * parameters are internally copied for delivery to the kernel. + * For synchronous callbacks, input and input-output parameters + * are copied internally and delivered to the kernel. For + * input-output and output parameters, such parameters are copied + * from the kernel back to user-space (to the pointer indicated + * by the corresponding parameter given to this function) after + * the callback has executed. In addition to the payload + * parameters passed here, the receiving callback in the kernel + * will be provided the kernel-side data cookie that the + * receiver registered with vmk_MgmtInit and the instanceId + * specificed here. If an instanceId is specified, the callback + * function invoked in the kernel will be the instance-specific + * callback (if it was specified when the instance was added) or + * the default callback function registered with the API + * signature (if no instance-specific callback was specified + * for this callback when the instance was added). + * + * \param[in] handle Management handle that was initialized. + * \param[in] instanceId The unique instance ID to send this callback + * to. If this is not an instance-specific + * invocation, use VMK_MGMT_NO_INSTANCE_ID. + * \param[in] callbackId The unique ID corresponding to the callback + * to invoke, as registered with the API + * signature. + * \param[in] ... A variable list of parameters, each one + * a (void *) pointer to the parameter + * being passed to the callback. The number + * of parameters must match that described for + * the given callbackId when the API signature + * was registered. + * \retval 0 For asynchronous callbacks, this means that the callback + * successfully was queued. For synchronous callbacks, + * this means that the callback has executed completely. + * \retval Other A UNIX-style error code corresponding to the error + * encountered when attempting to queue or execute the + * callback. + * \note The return value is not a indication or return code of the + * callback itself. + * + */ +#define vmk_MgmtUserCallbackInvoke( \ + /* (vmk_MgmtHandle *) */ handle, \ + /* (vmk_uint64) */ instanceId, \ + /* (vmk_uint64) */ callbackId, \ + ...) \ + vmk_MgmtUserCallbackInvokeInt(handle, instanceId, callbackId, VMK_UTIL_NUM_ARGS(__VA_ARGS__), ##__VA_ARGS__) + +/* + *********************************************************************** + * vmk_MgmtUserCallbackInvokeInt -- + * + * This is used by vmk_MgmtUserCallbackInvoke(). VMKAPI clients should + * never call this function directly. + * + *********************************************************************** + */ +int +vmk_MgmtUserCallbackInvokeInt(vmk_MgmtUserHandle handle, + vmk_uint64 instanceId, + vmk_uint64 callbackId, + vmk_uint32 argCount, + ...); + +#endif /* _VMKAPI_MGMT_LIB_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt_types.h new file mode 100644 index 0000000..277060a --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_mgmt_types.h @@ -0,0 +1,228 @@ +/* ********************************************************** + * Copyright 2012 - 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ******************************************************************************* + * Management Types */ /** + * \addtogroup Mgmt + * + * Types used by user- and kernel-space when interacting with the vmkapi + * management interfaces and library. + * + * @{ + ******************************************************************************* + */ + + +/* + * vmkapi_mgmt_types.h -- + * + * Interfaces for defining management APIs for vmkernel-based + * modules, which need to be shared with user-space. + */ + +#ifndef _VMKAPI_MGMT_TYPES_H_ +#define _VMKAPI_MGMT_TYPES_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "lib/vmkapi_name.h" +#include "lib/vmkapi_revision.h" + +/** + * The maximum number of data payload parameters per callback, + * excluding the cookie and instance parameters. + */ +#define VMK_MGMT_MAX_CALLBACK_PARMS 4 + +/** + * \brief Callback IDs 0 through VMK_MGMT_RESERVED_CALLBACKS inclusive + * are reserved by the system and may not be used by consumers + * of the API. + */ +#define VMK_MGMT_RESERVED_CALLBACKS 15 + +#define VMK_MGMT_NO_INSTANCE_ID 0 + +/** + * \brief The type of a key used in a key-value management channel. + */ +typedef enum vmk_MgmtKeyType { + /** + * \brief An 8-byte integer + */ + VMK_MGMT_KEY_TYPE_LONG = 1, + /** + * \brief A 4096-byte (including nul) character string. + */ + VMK_MGMT_KEY_TYPE_STRING = 2, +} vmk_MgmtKeyType; + +/** + * \brief The maximum number of bytes in a VMK_MGMT_KEY_TYPE_STRING key. + */ +#define VMK_MGMT_KEY_STRING_MAXLEN 4096 + +/** + * \brief The maximum number of keys that can be added to a + * vmk_MgmtHandle instance. + */ +#define VMK_MGMT_MAX_KEYS_PER_INSTANCE 32 + +/** + * \brief The maximum number of instances that can be added to a management handle. + */ +#define VMK_MGMT_MAX_INSTANCES 32 + +/** + * \brief The location where a callback will execute. + */ +typedef enum vmk_MgmtCallbackLocation { + VMK_MGMT_CALLBACK_KERNEL = 1, + VMK_MGMT_CALLBACK_USER, +} vmk_MgmtCallbackLocation; + +/** + * \brief The type of a parameter to a callback + */ +typedef enum vmk_MgmtParm { + /** \brief An input parameter to a callback. The contents of the + * parameter will be copied before invoking the callback. + */ + VMK_MGMT_PARMTYPE_IN = 0, + /** + * \brief An output parameter to a callback. Only valid for + * synchronous callbacks that are executed in the kernel. The + * contents of the parameter will be copied back to the caller + * after the callback has executed. + */ + VMK_MGMT_PARMTYPE_OUT, + /** + * \brief An input-output parameter to a callback. Only valid + * for synchronous callbacks that are executed in the kernel. + * The contents of the parameter will be copied before the + * callback has executed and again copied back to the caller after + * execution. + */ + VMK_MGMT_PARMTYPE_INOUT, +} vmk_MgmtParmType; + +/** + * \brief A description of a single callback that is part of an overall API. + */ +typedef struct vmk_MgmtCallbackInfo { + /** \brief The location where the callback runs. */ + vmk_MgmtCallbackLocation location; + /** + * \brief A function pointer to the callback. + * A callback function pointer only needs to be provided if this + * signature is being registered where this callback would run. For + * example, if the API is being registered with the kernel, only + * VMK_MGMT_CALLBACK_KERNEL callbacks require a value here. + * Callback functions must not assume that they execute with any kind of + * serialization. If multiple management handle instances specify the same + * callback function, then that callback function can be executed simultaneously. + * By separate callers. If your callback function requires synchronization + * among multiple potential callers, then your callback function must + * implement that synchronization. + */ + void *callback; + /** \brief Indicates if this callback is executed synchronously to the caller. + * As noted for the callback parameter, even if a callback is + * marked "synchronous", a callback could be invoked simultaneously + * by multiple callers. "synchronous" describes the semantics as + * viewed by the caller, not that the callee (the callback) can assume + * that it is invoked atomically. + */ + vmk_Bool synchronous; + /** + * Number of parameters to the callback, excluding the data + * cookie and instance parameters (which are provided as the first two + * arguments). For example, a numParms value of 0 means that the callback + * must take two arguments - the data cookie and instance ID - but no + * payload parameters. + */ + vmk_uint8 numParms; + /** + * \brief The size of each callback, in the order that they are passed. + * \note Excludes the data cookie and instance ID. + */ + int parmSizes[VMK_MGMT_MAX_CALLBACK_PARMS]; + /** + * \brief The type of each callback, in the order that they are passed. + * \note Excludes the data cookie and instance ID. + */ + vmk_MgmtParmType parmTypes[VMK_MGMT_MAX_CALLBACK_PARMS]; + /** + * \brief An identifier for this callback. + * \note Must be unique within the scope of call callbacks registered + * in an API signature. May not be 0. + */ + vmk_uint64 callbackId; +} vmk_MgmtCallbackInfo; + +/** + * \brief The signature for an API being initialized at either the kernel + * or user layer + */ +typedef struct vmk_MgmtApiSignature { + /** + * \brief Version of the API. By default, versions of an API with the + * same major and minor are compatible with each other and will + * allow initialization and communication between the registered + * instances on the user or kernel side. The minor, update, + * and patch numbers will be used for distinguishing minor + * differences that can be shimmed by providers. + */ + vmk_revnum version; + /** + * \brief Name of the API. The version and name must be unique. + */ + vmk_Name name; + /** + * \brief Vendor implementing this side (user or kernel) of the API. + * Optional. + */ + vmk_Name vendor; + /** \brief The number of callbacks this API has. */ + int numCallbacks; + /** \brief The information describing each callback */ + vmk_MgmtCallbackInfo *callbacks; +} vmk_MgmtApiSignature; + + +/** + * \brief A description of specific instances registered to a management handle. + * \note An application can get the instances associated with a handle and + * then can subsequently send callbacks to instances using the + * instanceIds as reported in this structure. + */ +typedef struct vmk_MgmtInstances { + /** + * /brief The number of instances managed on this API handle. + */ + vmk_uint8 numInstances; + + /** + * /brief The instance IDs that are managed. + */ + vmk_uint64 instanceIds[VMK_MGMT_MAX_INSTANCES]; + + /** + * \brief The presentation names for each of the instances. + */ + vmk_Name instanceNames[VMK_MGMT_MAX_INSTANCES]; +} vmk_MgmtInstances; + +#endif /* _VMKAPI_MGMT_TYPES_H_ */ +/** @} */ + diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_module_ns.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_module_ns.h index 54a5c8e..8565a8f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_module_ns.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_module_ns.h @@ -48,7 +48,7 @@ * *********************************************************************** */ -#define VMK_NAMESPACE_CURRENT_VERSION "v2_1_0_0" +#define VMK_NAMESPACE_CURRENT_VERSION "v2_2_0_0" #endif /* _VMKAPI_MODULE_NS_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_platform.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_platform.h index bcbcbbd..e532726 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_platform.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_platform.h @@ -53,6 +53,8 @@ typedef vmk_uintptr_t vmk_CPUFlags; * * \note This function will not block. * + * \nativedriversdisallowed + * *********************************************************************** */ void vmk_CPUDisableInterrupts(void); @@ -66,6 +68,8 @@ void vmk_CPUDisableInterrupts(void); * * \note This function will not block. * + * \nativedriversdisallowed + * *********************************************************************** */ void vmk_CPUEnableInterrupts(void); @@ -82,6 +86,8 @@ void vmk_CPUEnableInterrupts(void); * \retval VMK_TRUE Interrupts are enabled on the current CPU. * \retval VMK_FALSE Interrupts are disabled on the current CPU. * + * \nativedriversdisallowed + * *********************************************************************** */ vmk_Bool vmk_CPUHasIntsEnabled(void); @@ -93,6 +99,8 @@ vmk_Bool vmk_CPUHasIntsEnabled(void); * \ingroup Platform * \brief Assert that interrupts are enabled on the current CPU. * + * \nativedriversdisallowed + * *********************************************************************** */ #define VMK_ASSERT_CPU_HAS_INTS_ENABLED() \ @@ -121,6 +129,8 @@ vmk_Bool vmk_CPUHasIntsEnabled(void); * * \return The current CPU's interrupt flags. * + * \nativedriversdisallowed + * *********************************************************************** */ vmk_CPUFlags vmk_CPUGetFlags(void); @@ -134,6 +144,8 @@ vmk_CPUFlags vmk_CPUGetFlags(void); * * \note This function will not block. * + * \nativedriversdisallowed + * *********************************************************************** */ void vmk_CPUSetFlags( @@ -200,5 +212,49 @@ static VMK_ALWAYS_INLINE void vmk_CPUMemFenceReadWrite(void) asm volatile ("mfence" ::: "memory"); } +/* + *********************************************************************** + * vmk_CPUCacheFlush -- */ /** + * + * \ingroup Platform + * \brief Flushes the cache lines on the local PCPU for the memory + * region specified. + * + * \note If a specific operation required flushing the cache line of + * the local PCPU, both that operation and this call should + * come within the same VMK_WITH_PCPU_DO region. + * + * \param[in] pcpu PCPU ID obtained from VMK_WITH_PCPU_DO. + * \param[in] va Starting virtual address of memory region. + * \param[in] size Size of memory region. + * + * \retval VMK_OK Cache lines successfully flushed. + * \retval VMK_BAD_PARAM An invalid parameter was specified. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_CPUCacheFlush( + vmk_PCPUID pcpu, + vmk_VA va, + vmk_ByteCount size); + +/* + *********************************************************************** + * vmk_CPUGlobalCacheFlush -- */ /** + * + * \ingroup Platform + * \brief Flushes all modified cache lines on all PCPUs. + * + * \note This function will block. + * + * \note This is an expensive operation that should be used rarely and + * not at all on fast paths. + * + * \retval VMK_OK Cachelines successfully flushed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_CPUGlobalCacheFlush(void); + #endif /* _VMKAPI_PLATFORM_H_ */ /* @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_status.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_status.h index 511ada9..a6a749b 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_status.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_status.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2004 - 2009 VMware, Inc. All rights reserved. + * Copyright 2004 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -216,7 +216,7 @@ DEFINE_VMK_ERR(VMK_MEM_MIN_GT_MEMSIZE, "Memory min exceeds memSize", EINVAL )\ DEFINE_VMK_ERR(VMK_NO_SUCH_VT, "No virtual terminal for number", ENXIO )\ DEFINE_VMK_ERR(VMK_TOO_MANY_ELEMENTS, "Too many elements for list", E2BIG )\ - DEFINE_VMK_ERR(VMK_SHAREDAREA_MISMATCH, "VMM<->VMK shared are mismatch", ENOSYS )\ + DEFINE_VMK_ERR(VMK_SHAREDAREA_MISMATCH, "VMM<->VMK shared area mismatch", ENOSYS )\ DEFINE_VMK_ERR(VMK_EXEC_FAILURE, "Failure during exec while original state already lost", ESRCH )\ DEFINE_VMK_ERR(VMK_INVALID_MODULE, "Invalid module", EINVAL )\ DEFINE_VMK_ERR(VMK_UNALIGNED_ADDRESS, "Address is not aligned on required boundary", EINVAL )\ @@ -349,7 +349,7 @@ DEFINE_VMK_ERR(VMK_MODULE_NONAMESPACE, "Module tried to export a symbol but didn't provide a name space", ENOENT )\ DEFINE_VMK_ERR(VMK_FS_OBJECT_UNLINKED, "File system object is unlinked", EINVAL )\ DEFINE_VMK_ERR(VMK_HBR_WIRE_INSTANCE_ABORTED, "Replication instance was aborted", ECANCELED )\ - DEFINE_VMK_ERR(VMK_HBR_WIRE_NEED_FULL_SYNC, "Replicated disk needs full sync", EINVAL )\ + DEFINE_VMK_ERR(VMK_HBR_WIRE_NEED_FULL_SYNC, "Replicated disk needs full synchronization", EINVAL )\ DEFINE_VMK_ERR(VMK_HBR_WIRE_DISK_SET_MISMATCH, "The set of disks on the replication server doesn't match", EINVAL )\ DEFINE_VMK_ERR(VMK_HBR_WIRE_REQUEST_CHECKSUM_MISMATCH, "The checksum for the replication request was invalid", EINVAL )\ DEFINE_VMK_ERR(VMK_HBR_WIRE_RESPONSE_CHECKSUM_MISMATCH, "The checksum for the replication response was invalid", EINVAL )\ @@ -362,7 +362,12 @@ DEFINE_VMK_ERR(VMK_EPROTOTYPE, "Invalid protocol for connection", EPROTOTYPE )\ DEFINE_VMK_ERR(VMK_MODULE_CONSUMED_RESOURCE_COUNT_NOT_ZERO, "Consumed resource count of module is not zero", EBUSY )\ DEFINE_VMK_ERR(VMK_HBR_SERVER_DOES_NOT_SUPPORT_REQUEST, "vSphere Replication Server does not support request", EOPNOTSUPP )\ - DEFINE_VMK_ERR(VMK_STALE_FILEHANDLE, "Stale file handle", ESTALE)\ + DEFINE_VMK_ERR(VMK_STALE_FILEHANDLE, "Stale file handle", ESTALE )\ + DEFINE_VMK_ERR(VMK_VVOL_UNBOUND, "Virtual volume not bound", ENODEV )\ + DEFINE_VMK_ERR(VMK_DEVICE_NOT_READY_FAIL_OPEN, "Device open failed with no-retry", EPERM )\ + DEFINE_VMK_ERR(VMK_NOT_THIS_DEVICE, "Not for this device", EINVAL )\ + DEFINE_VMK_ERR(VMK_IGNORE, "Ignore", EINVAL )\ + DEFINE_VMK_ERR(VMK_OBJECT_DESTROYED, "Object is being or has been destroyed.", EINVAL )\ /* --- ADD NEW ERROR CODES ABOVE THIS COMMENT. VMK_GENERIC_LINUX_ERROR must be last. --- */ \ DEFINE_VMK_ERR_AT(VMK_GENERIC_LINUX_ERROR, "Generic service console error", 0x2bad0000, EIO ) /* --- Don't add ERR_AT with negative value. --- */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_time.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_time.h index 9db58db..8934bff 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_time.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_time.h @@ -30,12 +30,15 @@ /** \brief Known invalid value for a timer */ #define VMK_INVALID_TIMER ((vmk_Timer)NULL) +/** \brief Known invalid value for a timer queue */ +#define VMK_INVALID_TIMER_QUEUE ((vmk_TimerQueue)NULL) + typedef vmk_int64 vmk_TimerRelCycles; typedef vmk_uint64 vmk_TimerCycles; typedef vmk_AddrCookie vmk_TimerCookie; -typedef void (*vmk_TimerCallback)(vmk_TimerCookie data); typedef struct vmk_TimerInt *vmk_Timer; +typedef struct vmk_TimerQueueInt *vmk_TimerQueue; /** * \brief Representation for Time @@ -45,6 +48,27 @@ typedef struct { vmk_int64 usec; /* microseconds */ } vmk_TimeVal; +/** + * \brief Attributes dictating timer queue behavior + */ +typedef vmk_uint64 vmk_TimerQueueAttributes; + +/** normal timer queue */ +#define VMK_TIMER_QUEUE_ATTR_NONE (0) + +/** low latency timer queue */ +#define VMK_TIMER_QUEUE_ATTR_LOW_LATENCY (1 << 0) + +/** + * \brief Properties for a new timer queue + */ +typedef struct { + vmk_Name name; + vmk_ModuleID moduleID; + vmk_HeapID heapID; + vmk_TimerQueueAttributes attribs; +} vmk_TimerQueueProps; + /** * \brief Timer Attributes */ @@ -54,6 +78,8 @@ typedef vmk_uint64 vmk_TimerAttributes; #define VMK_TIMER_ATTR_NONE (0) /** Periodic timer */ #define VMK_TIMER_ATTR_PERIODIC (1 << 0) +/** Default tolerance value */ +#define VMK_TIMER_DEFAULT_TOLERANCE (-1) /* Convenient time constants */ @@ -74,6 +100,24 @@ typedef vmk_uint64 vmk_TimerAttributes; #define VMK_TIMEOUT_UNLIMITED_MS (VMK_UINT32_MAX) +/* + *********************************************************************** + * vmk_TimerCallback -- */ /** + * + * \brief Callback function invoked when timer fires. + * + * \note This callback is allowed to block; however, ready timers on + * the same vmk_TimerQueue will not fire until the firing timer + * has finished, so blocking in this callback may delay other + * scheduled timers. + * + * \param[in] data vmk_TimerCookie provided when timer scheduled. + * + *********************************************************************** + */ +typedef void (*vmk_TimerCallback)(vmk_TimerCookie data); + + /* *********************************************************************** * vmk_GetTimerCycles -- */ /** @@ -286,7 +330,7 @@ void vmk_DelayUsecs( /* *********************************************************************** - * vmk_TimerSchedule -- */ /** + * vmk_TimerScheduleCustom -- */ /** * * \brief Schedule a timer * @@ -300,10 +344,78 @@ void vmk_DelayUsecs( * system-wide, and exceeding the limit is a fatal error. * * \param[in] moduleID ID of the module to which callback belongs + * \param[in] queue The timer queue to use for the timer * \param[in] callback Timer callback. * \param[in] data Argument passed to the timer callback on * timeout. * \param[in] timeoutUS Timeout in microseconds. + * \param[in] toleranceUS Tolerance in microseconds. Indicates a + * request that the timer fire approximately + * no later than the provided value from the + * requested time. The majority of callers + * should specify a tolerance of + * VMK_TIMER_DEFAULT_TOLERANCE and only use + * other values for timers that have strict + * timing requirements. + * \param[in] attributes Additional timer attributes + * \param[in] lockDomain Lock domain in which to check the lock rank. + * Note that if lockDomain is set to invalid + * then rank has to be set to unranked and if + * lockDomain is set to a valid value then + * rank has to contain a valid rank value. + * \param[in] lockRank Rank of the timer + * \param[out] wasPending If rescheduling a timer, was it previously + * pending? (optional) + * \param[out] timer Timer Handle + * + * \retval VMK_NO_RESOURCES Couldn't schedule the timer. + * \retval VMK_OK The timer was successfully scheduled. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TimerScheduleCustom( + vmk_ModuleID moduleID, + vmk_TimerQueue queue, + vmk_TimerCallback callback, + vmk_TimerCookie data, + vmk_int64 timeoutUS, + vmk_int64 toleranceUS, + vmk_TimerAttributes attributes, + vmk_LockDomainID lockDomain, + vmk_LockRank lockRank, + vmk_Bool *wasPending, + vmk_Timer *timer); + + +/* + *********************************************************************** + * vmk_TimerSchedule -- */ /** + * + * \brief Schedule a timer + * + * The VMKernel can schedule simultaneously a limited number of timers + * for each CPU. + * + * \note This function will not block. + * + * \warning Timers are a limited resource. The VMKernel does not + * guarantee to provide more than 100 concurrent timers per CPU + * system-wide, and exceeding the limit is a fatal error. + * + * \param[in] queue The timer queue to use for the timer + * \param[in] callback Timer callback. + * \param[in] data Argument passed to the timer callback on + * timeout. + * \param[in] timeoutUS Timeout in microseconds. + * \param[in] toleranceUS Tolerance in microseconds. Indicates a + * request that the timer fire approximately + * no later than the provided value from the + * requested time. The majority of callers + * should specify a tolerance of + * VMK_TIMER_DEFAULT_TOLERANCE and only use + * other values for timers that have strict + * timing requirements. * \param[in] attributes Additional timer attributes * \param[in] lockDomain Lock domain in which to check the lock rank. * Note that if lockDomain is set to invalid @@ -320,10 +432,11 @@ void vmk_DelayUsecs( */ VMK_ReturnStatus vmk_TimerSchedule( - vmk_ModuleID moduleID, + vmk_TimerQueue queue, vmk_TimerCallback callback, vmk_TimerCookie data, vmk_int64 timeoutUS, + vmk_int64 toleranceUS, vmk_TimerAttributes attributes, vmk_LockDomainID lockDomain, vmk_LockRank lockRank, @@ -389,9 +502,63 @@ VMK_ReturnStatus vmk_TimerCancel( * *********************************************************************** */ + vmk_Bool vmk_TimerIsPending( vmk_Timer timer); + +/* + *********************************************************************** + * vmk_TimerQueueCreate -- */ /** + * + * \brief Create a timer queue. + * + * \note This function will may block. + * + * \param[in] props Properties of the new timer queue. + * + * \param[out] queue The newly created queue. + * + * \retval VMK_OK The timer queue was created successfuly, + * and can now be used to schedule timers. + * + * \retval VMK_BAD_PARAM Invalid parameters passed into the function. + * Make sure that all fields in the provided + * properties are valid. + * + * \retval VMK_NO_RESOURCES Ran out of resources to create the timer + * queue. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TimerQueueCreate( + vmk_TimerQueueProps *props, + vmk_TimerQueue *queue); + + +/* + *********************************************************************** + * vmk_TimerQueueDestroy -- */ /** + * + * \brief Destroy a timer queue. All timers in the queue are cancelled. + * Memory for the timer queue and associate timers is released + * back to the heap that the queue was allocated from. + * + * \note This function will may block. + * + * \param[in] queue The queue. + * + * \retval VMK_OK The timer queue is destroyed. + * + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TimerQueueDestroy( + vmk_TimerQueue queue); + + #endif /* _VMKAPI_TIME_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_versioned_atomic.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_versioned_atomic.h new file mode 100644 index 0000000..750696c --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_versioned_atomic.h @@ -0,0 +1,192 @@ +/* ********************************************************** + * Copyright 1998 - 2012VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + + +/* + *********************************************************************** + * VersionedAtomic */ /** + * \defgroup VersionedAtomic Version Atomic + * + * \par Versioned atomic synchronization: + * These synchronization macros allow single-writer/many-reader access + * to data, based on Leslie Lamport's paper "Concurrent Reading and + * Writing", Communications of the ACM, November 1977.\n + * \n + * Many-writer/many-reader can be implemented on top of versioned + * atomics by using an additional spin lock to synchronize writers. + * This is preferable for cases where readers are expected to greatly + * outnumber writers.\n + * \n + * Multiple concurrent writers to the version variables are not allowed. + * Even if writers are working on lock-free or disjoint data, the + * version counters are not interlocked for read-modify-write.\n + * \n + * Recursive use of versioned atomics in writers is currently not + * supported. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_VERSIONED_ATOMIC_H +#define _VMKAPI_VERSIONED_ATOMIC_H + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** + * \brief Versioned Atomic + */ + +typedef struct vmk_VersionedAtomic { + /** version 0 */ + volatile vmk_uint32 v0; + + /** version 1 */ + volatile vmk_uint32 v1; +} VMK_ATTRIBUTE_ALIGN(4) vmk_VersionedAtomic; + + +/* + *********************************************************************** + * vmk_VersionedAtomicInit -- */ /** + * + * \brief Intiialize a versioned atomic + * \param[in] versions Pointer to the versioned atomic to be + * initialized + * + *********************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_VersionedAtomicInit(vmk_VersionedAtomic *versions) +{ + versions->v0 = 0; + versions->v1 = 0; +} + + +/* + *********************************************************************** + * vmk_VersionedAtomicBeginWrite -- */ /** + * + * \brief Writer begins write to protected data + * + * Called by a writer to indicate that the data protected by a given + * atomic version is about to change. Effectively locks out all readers + * until EndWrite is called. + * + * \param[in] versions Pointer to the versioned atomic protecting + * the data + * + *********************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_VersionedAtomicBeginWrite(vmk_VersionedAtomic *versions) +{ + VMK_ASSERT(((vmk_uint64)(&versions->v0) & (sizeof(versions->v0) - 1)) == 0); + VMK_ASSERT(versions->v1 == versions->v0); + versions->v0++; + vmk_CPUMemFenceReadWrite(); +} + + +/* + *********************************************************************** + * vmk_VersionedAtomicEndWrite -- */ /** + * + * \brief Writer finishes writing to protected data + * + * Called by a writer after it is done updating shared data. Lets + * pending and new readers proceed on shared data. + * + * \param[in] versions Pointer to the versioned atomic protecting + * the data + * + *********************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_VersionedAtomicEndWrite(vmk_VersionedAtomic *versions) +{ + VMK_ASSERT(((vmk_uint64)(&versions->v1) & (sizeof(versions->v1) - 1)) == 0); + VMK_ASSERT(versions->v1 + 1 == versions->v0); + vmk_CPUMemFenceReadWrite(); + versions->v1 = versions->v0; +} + + + +/* + *********************************************************************** + * vmk_VersionedAtomicBeginTryRead -- */ /** + * + * \brief Reader tries to read protected data + * + * Called by a reader before it tried to read shared data. + * + * \param[in] versions Pointer to the versioned atomic protecting + * the data + * + * \retval Returns a version number to the reader. This + * version number is required to confirm + * validity of the read operation when reader + * calls vmk_VersionedAtomicEndTryRead. + * + *********************************************************************** + */ + +static VMK_ALWAYS_INLINE vmk_uint32 +vmk_VersionedAtomicBeginTryRead(const vmk_VersionedAtomic *versions) +{ + vmk_uint32 readVersion; + + readVersion = versions->v1; + vmk_CPUMemFenceReadWrite(); + + return readVersion; +} + + +/* + *********************************************************************** + * vmk_VersionedAtomicEndTryRead -- */ /** + * + * \brief Reader finished reading protected data + * + * Called by a reader after it finishes reading shared data, to confirm + * validity of the data that was just read, to make sure that a writer + * did not intervene while the read was in progress. + * + * \param[in] versions Pointer to the versioned atomic protecting + * the data + * \param[in] readVersion The version number the reader just read, + * returned by vmk_VersionedAtomicBeginTryRead + * + * \retval VMK_TRUE if the data read between + * vmk_VersionedAtomicBeginTryRead() and this + * call is valid. + * \retval VMK_FALSE otherwise. + * + *********************************************************************** + */ +static VMK_ALWAYS_INLINE vmk_Bool +vmk_VersionedAtomicEndTryRead(const vmk_VersionedAtomic *versions, + vmk_uint32 readVersion) +{ + vmk_CPUMemFenceReadWrite(); + return VMK_LIKELY(versions->v0 == readVersion); +} + +#endif //__VMKAPI_VERSIONED_ATOMIC_H +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_world.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_world.h index b047d64..8b0036f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_world.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_world.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2007 - 2009 VMware, Inc. All rights reserved. + * Copyright 2007 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -15,7 +15,16 @@ * are used to represent kernel threads, user processes, virtual CPUs, * etc. Each world is identified by an ID that is unique within the * system called the World ID. Worlds are blockable contexts; it is safe - * to call functions that may block from a world context. + * to call functions that may block from a world context. + * + * User processes also belong to cartels. A cartel is a group of worlds + * that share certain resources including but not limited to their + * address space. A cartel can be thought of as a user process and the + * individual worlds that make up the cartel can be thought of as user + * threads. Each user world will have a world ID and a cartel ID. Each + * world in a cartel will share the same cartel ID. Note that it is + * possible for a world's world ID and cartel ID to be equal, but + * this can only be true for at most one world in the cartel. * *@{ *********************************************************************** @@ -30,6 +39,8 @@ #endif /** \endcond never */ +#include "device/vmkapi_vector_types.h" + /** * \brief Event to block on. * @@ -45,11 +56,63 @@ typedef vmk_int32 vmk_WorldID; #define VMK_INVALID_WORLD_ID ((vmk_WorldID)0) +/** \brief Special vmk_WorldEventID for a no-event wait + * + * When used as the eventId parameter to vmk_WorldWait(), + * the world will wait without being added to the system's + * internal event queue. This allows for a lighter weight + * synchronization mechanism, though the world sleeping in + * this fashion can be awoken only by vmk_WorldForceWakeup(), + * by a timeout, or if the world is being destroyed. + */ +#define VMK_EVENT_NONE ((vmk_WorldEventID)0) + /** * \brief Indication of unlimited CPU allocation (max) */ #define VMK_CPU_ALLOC_UNLIMITED ((vmk_uint32) -1) +/** + * \brief Scheduler Class for a World + * + * Worlds of class VMK_WORLD_SCHED_CLASS_QUICK will be scheduled + * to run ahead of worlds of class VMK_WORLD_SCHED_CLASS_DEFAULT. + * Please be careful to use VMK_WORLD_SCHED_CLASS_QUICK only for + * small deferred tasks that must execute promptly. + * + * If unsure of what class to use, pick VMK_WORLD_SCHED_CLASS_DEFAULT. + */ +typedef enum { + + /** Default scheduler class for kernel threads. */ + VMK_WORLD_SCHED_CLASS_DEFAULT = 1, + + /** Scheduler class for kernel threads that must execute prompty. */ + VMK_WORLD_SCHED_CLASS_QUICK = 100, + +} vmk_WorldSchedClass; + +/** + * \brief Properties for creating a new world. + */ +typedef struct vmk_WorldProps { + /** \brief Name associated with this world. */ + const char *name; + + /** \brief Module ID of the module creating this world. */ + vmk_ModuleID moduleID; + + /** \brief Function that the world begins executing at creation. */ + vmk_WorldStartFunc startFunction; + + /** \brief Opaque argument to the startFunction. */ + void *data; + + /** \brief Scheduler class for the new world. */ + vmk_WorldSchedClass schedClass; + +} vmk_WorldProps; + /* *********************************************************************** * vmk_WorldCreate -- */ /** @@ -59,34 +122,51 @@ typedef vmk_int32 vmk_WorldID; * * \note This function may block. * - * \warning Code running inside a world should allow the scheduler to - * run as often as possible. This can be achieved by calling - * vmk_WorldYield. At most code should run 30ms without calling - * vmk_WorldYield. + * \warning Code running inside a system world can be preempted by + * default. Code should be careful not to access Per-PCPU + * Storage, or to hold locks of type VMK_SPINLOCK_IRQ, for + * a period time exceeding 10us - since these acquisitions + * block preemption. * - * \param[in] moduleID Module on whose behalf the world is running. - * \param[in] name A string that describes the world. The name - * will show up as debug information. - * \param[in] startFunction Function that the world begins executing - * on creation. - * \param[in] data Argument to be passed to startFunction. + * \param[in] props Properties of this world. * \param[out] worldId World ID associated with the newly - * created world. May be set to NULL if - * the caller does not need the World ID. + * created world. If caller sets this + * poitner to NULL, then the World ID is + * not returned. * * \retval VMK_OK World created. * \retval VMK_NO_MEMORY Ran out of memory. * \retval VMK_DEATH_PENDING World is in the process of dying. * \retval VMK_NO_MODULE_HEAP The module's heap is not set. + * \retval VMK_BAD_PARAM The priority specified is in the + * properties is invalid. * *********************************************************************** */ -VMK_ReturnStatus vmk_WorldCreate( - vmk_ModuleID moduleID, - const char *name, - vmk_WorldStartFunc startFunction, - void *data, - vmk_WorldID *worldId); +VMK_ReturnStatus vmk_WorldCreate(vmk_WorldProps *props, + vmk_WorldID *worldId); + +/* + *********************************************************************** + * vmk_WorldDestroy -- */ /** + * + * \ingroup Worlds + * \brief Destroy a world created by vmk_WorldCreate. + * + * \note This function may block. + * + * \note This function does not wait for the world to actually die. + * Use vmk_WorldWaitForDeath() to wait for death. + * + * \param[in] worldID vmk_WorldID of the world to destroy. + * + * \retval VMK_OK Kill was successfully posted. + * \retval VMK_NOT_FOUND Specified worldID was not found. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_WorldDestroy( + vmk_WorldID worldID); /* *********************************************************************** @@ -121,6 +201,42 @@ void vmk_WorldExit(VMK_ReturnStatus status); vmk_WorldID vmk_WorldGetID( void); +/* + *********************************************************************** + * vmk_WorldGetCartelID -- */ /** + * + * \ingroup Worlds + * \brief Get the Cartel ID of the current world. + * + * \note This function will not block. + * + * \return WorldID of the cartel of the currently running world that + * this call was invoked from or VMK_INVALID_WORLD_ID if + * this call was not invoked from a user world context. + * + *********************************************************************** + */ +vmk_WorldID vmk_WorldGetCartelID( + void); + +/* + *********************************************************************** + * vmk_WorldIDToCartelID -- */ /** + * + * \ingroup Worlds + * \brief Get the Cartel ID of the specified world. + * + * \note This function will not block. + * + * \return WorldID of the cartel of the provided world ID or + * VMK_INVALID_WORLD_ID if the provided world is not a user + * world context. + * + *********************************************************************** + */ +vmk_WorldID vmk_WorldIDToCartelID( + vmk_WorldID worldID); + /* *********************************************************************** * vmk_WorldAssertIsSafeToBlockInt -- @@ -168,16 +284,19 @@ vmk_WorldAssertIsSafeToBlock( * * \note This function may block. * - * \note Spurious wakeups are possible + * \note Spurious wakeups are possible. Specifially, users of this + * API must always verify that the condition on which they + * are waiting has actually occurred before taking action. * - * \note For worlds holding IRQ locks, use vmk_WorldWaitIRQ(). - * - * \param[in] eventId System wide unique identifier of the event - * to sleep on. - * \param[in] lock Lock of type VMK_SPINLOCK or VMK_SPINLOCK_IRQ - * to release before descheduling the world. - * VMK_LOCK_INVALID indicates that no lock needs - * to be released before descheduling the world. + * \param[in] eventId Either a system wide unique identifier for the + * event to sleep on, or VMK_EVENT_NONE. When + * VMK_EVENT_NONE is specified, the world can be + * awoken only by vmk_WorldForceWakeup(), by a + * timeout, or if the world is being destroyed. + * \param[in] lock Lock of type VMK_SPINLOCK to release before + * descheduling the world. VMK_LOCK_INVALID + * indicates that no lock needs to be released + * before descheduling the world. * \param[in] timeoutMS Number of milliseconds before timeout * VMK_TIMEOUT_UNLIMITED_MS indicates that the * caller wants to block forever. @@ -213,63 +332,6 @@ VMK_ReturnStatus vmk_WorldWait( const char *reason); -/* - *********************************************************************** - * vmk_WorldWaitIRQ -- */ /** - * - * \brief Deschedule a World holding an IRQ Lock until awakened or until - * the specified timeout expires. - * - * \note This function may block. - * - * \note Spurious wakeups are possible - * - * \note For worlds holding non-IRQ locks, use vmk_WorldWait(). - * - * \param[in] eventId System wide unique identifier of the event - * to sleep on. - * \param[in] lock Lock of type VMK_SPINLOCK or VMK_SPINLOCK_IRQ - * to release before descheduling the world. - * VMK_LOCK_INVALID indicates that no lock needs - * to be released before descheduling the world. - * \param[in] irql IRQ level of lock provided by - * vmk_SpinlockLockIRQ(). - * \param[in] timeoutMS Number of milliseconds before timeout - * VMK_TIMEOUT_UNLIMITED_MS indicates that the - * caller wants to block forever. - * VMK_TIMEOUT_NONBLOCKING is not a valid value - * in this context. - * \param[in] reason A short string that explains the reason for - * the vmk_WorldWait call. - * - * \retval VMK_OK World was descheduled and awoken by a - * vmk_WorldWakeup on eventId. - * \retval VMK_BAD_PARAM World was not descheduled because a - * provided parameter was invalid. If a - * lock was provided then it was not - * released. - * \retval VMK_TIMEOUT World was descheduled and awoken - * because of timeout expiration. - * \retval VMK_DEATH_PENDING World was descheduled and awoken - * because the world is dying and being - * reaped by the scheduler. The caller is - * expected to return as soon as possible. - * \retval VMK_WAIT_INTERRUPTED World was descheduled and awoken for - * some other reason not specified by - * previous return codes. The caller is - * allowed to re-enter vmk_WorldWait. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_WorldWaitIRQ( - vmk_WorldEventID eventId, - vmk_Lock lock, - vmk_LockIRQL irql, - vmk_uint32 timeoutMS, - const char *reason); - - /* *********************************************************************** * vmk_WorldWakeup -- */ /** @@ -289,6 +351,35 @@ VMK_ReturnStatus vmk_WorldWaitIRQ( VMK_ReturnStatus vmk_WorldWakeup( vmk_WorldEventID eventId); +/* + *********************************************************************** + * vmk_WorldForceWakeup -- */ /** + * + * \ingroup Worlds + * \brief Wake up a specific world directly, regardless of what + * event it is waiting on. + * + * \note This function may block. + * + * \note A forced wakeup is special, in that the wakeup it generates + * is "stateful" when used in conjuction with VMK_EVENT_NONE. + * Specifically, if a world is not waiting when a forced wakeup + * is generated, then the wakeup goes pending. If the world + * then attempts to wait on VMK_EVENT_NONE, the world will + * not sleep (and the pending is cleared). + * + * \param[in] worldID World ID of the world to wake up. + * + * \retval VMK_OK The world was awoken. + * \retval VMK_NOT_FOUND The world was not found to need wakeup. + * \retval VMK_INVALID_WORLD The world ID did not correspond to an + * existing world. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_WorldForceWakeup( + vmk_WorldID worldID); + /* *********************************************************************** * vmk_WorldSleep -- */ /** @@ -414,7 +505,110 @@ vmk_uint32 vmk_WorldsMax(void); * *********************************************************************** */ -VMK_ReturnStatus vmk_WorldWaitForDeath(vmk_WorldID worldID); +VMK_ReturnStatus vmk_WorldWaitForDeath( + vmk_WorldID worldID); + +/* + *********************************************************************** + * vmk_WorldInterruptSet -- */ /** + * + * \brief Sets an interrupt association for the specified world. + * + * Interrupts will be delivered to the same PCPU that this world is + * running on. + * + * \note This function will not block. + * + * \param[in] worldID ID of the world to set interrupt + * association for. + * \param[in] intrCookie Interrupt cookie previously retrieved via + * vmk_IntrRegister + * + * \retval VMK_OK The vector association has been set. + * \retval VMK_BAD_PARAM The specified vector is invalid. + * \retval VMK_LIMIT_EXCEEDED The specified vector cannot be added. + * \retval VMK_INVALID_WORLD The specified world id was invalid. + * \retval VMK_FAILURE The interrupt association cannot be set. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_WorldInterruptSet( + vmk_WorldID worldID, + vmk_IntrCookie intrCookie); + +/* + *********************************************************************** + * vmk_WorldInterruptUnset -- */ /** + * + * \ingroup Worlds + * \brief Unsets an interrupt association for the specified world. + * + * \note This function will not block. + * + * \param[in] worldID ID of the world to unset interrupt + * association for. + * \param[in] intrCookie Interrupt cookie previously retrieved via + * vmk_IntrRegister + * + * \retval VMK_OK The interrupt association has been unset. + * \retval VMK_NOT_FOUND The interrupt is currently not associated + * with the world. + * \retval VMK_INVALID_WORLD The specified world id was invalid. + * \retval VMK_FAILURE The interrupt association cannot be unset. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_WorldInterruptUnset( + vmk_WorldID worldID, + vmk_IntrCookie intrCookie); + +/* + *********************************************************************** + * vmk_WorldRelationAdd -- */ /** + * + * \brief Add a relationship between two worlds + * + * This interface should be used to give a hint to the scheduler that there is a + * communication flow from world A to world B. This is useful for multi-threaded + * producer-consumer implementations. World A would equal the producer and world + * B would equal the consumer. If both worlds can be a producer and consumer + * then the interface should be called twice. + * Establishing a relationship between worlds is an important performance + * optimization and should always be done for worlds that are part of a hot + * path. + * + * \note This function might block. + * + * \param[in] worldA ID of the world initiating the communication. + * \param[in] worldB ID of the world receiving the communication. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_WorldRelationAdd( + vmk_WorldID worldA, + vmk_WorldID worldB); + + +/* + *********************************************************************** + * vmk_WorldRelationRemove -- */ /** + * + * \brief Remove a relationship between two worlds + * + * The relationship must have previously been set through vmk_WorldRelationAdd. + * + * \note This function might block. + * + * \param[in] worldA ID of the world initiating the communication. + * \param[in] worldB ID of the world receiving the communication. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_WorldRelationRemove( + vmk_WorldID worldA, + vmk_WorldID worldB); #endif /* _VMKAPI_WORLD_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_world_deprecated.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_world_deprecated.h new file mode 100644 index 0000000..e485784 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_world_deprecated.h @@ -0,0 +1,96 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ****************************************************************************** + * Worlds */ /** + * + * \addtogroup Core + * @{ + * \addtogroup Worlds + * @{ + * \defgroup Deprecated Deprecated APIs + * @{ + * + ****************************************************************************** + */ + + +#ifndef _VMKAPI_WORLDS_DEPRECATED_H_ +#define _VMKAPI_WORLDS_DEPRECATED_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/* + *********************************************************************** + * vmk_WorldWaitIRQ -- */ /** + * + * \brief Deschedule a World holding an IRQ Lock until awakened or until + * the specified timeout expires. + * + * \deprecated + * + * \note This function may block. + * + * \note Spurious wakeups are possible + * + * \note For worlds holding non-IRQ locks, use vmk_WorldWait(). + * + * \param[in] eventId System wide unique identifier of the event + * to sleep on. + * \param[in] lock Lock of type VMK_SPINLOCK or VMK_SPINLOCK_IRQ + * to release before descheduling the world. + * VMK_LOCK_INVALID indicates that no lock needs + * to be released before descheduling the world. + * \param[in] irql IRQ level of lock provided by + * vmk_SpinlockLockIRQ(). + * \param[in] timeoutMS Number of milliseconds before timeout + * VMK_TIMEOUT_UNLIMITED_MS indicates that the + * caller wants to block forever. + * VMK_TIMEOUT_NONBLOCKING is not a valid value + * in this context. + * \param[in] reason A short string that explains the reason for + * the vmk_WorldWait call. + * + * \retval VMK_OK World was descheduled and awoken by a + * vmk_WorldWakeup on eventId. + * \retval VMK_BAD_PARAM World was not descheduled because a + * provided parameter was invalid. If a + * lock was provided then it was not + * released. + * \retval VMK_TIMEOUT World was descheduled and awoken + * because of timeout expiration. + * \retval VMK_DEATH_PENDING World was descheduled and awoken + * because the world is dying and being + * reaped by the scheduler. The caller is + * expected to return as soon as possible. + * \retval VMK_WAIT_INTERRUPTED World was descheduled and awoken for + * some other reason not specified by + * previous return codes. The caller is + * allowed to re-enter vmk_WorldWait. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_WorldWaitIRQ( + vmk_WorldEventID eventId, + vmk_Lock lock, + vmk_LockIRQL irql, + vmk_uint32 timeoutMS, + const char *reason); + + +#endif +/** @} */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_worldlet_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_worldlet_types.h index 39658f2..8157139 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_worldlet_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/base/vmkapi_worldlet_types.h @@ -38,10 +38,11 @@ typedef vmk_uint32 vmk_WorldletID; #define VMK_INVALID_WORLDLET_ID ((vmk_WorldletID)-1) /** \cond nodoc */ -#define VMK_WDT_OPT_LIST(action) \ - action(WDT_OPT_FORCE_IPI_DISPATCH, "force IPI dispatch", ForceIPIDispatch) \ - action(WDT_OPT_NON_INTERFERING, "ignore interference effect", NonInterfering)\ - action(WDT_OPT_ACTION_AFFINITY, "action affinity", ActionAffinity) +#define VMK_WDT_OPT_LIST(action) \ + action(WDT_OPT_FORCE_IPI_DISPATCH, "force IPI dispatch", ForceIPIDispatch) \ + action(WDT_OPT_NON_INTERFERING, "ignore interference effect", NonInterfering) \ + action(WDT_OPT_ACTION_AFFINITY, "action affinity", ActionAffinity) \ + action(WDT_OPT_ENABLED_VMKSTATS, "enable vmkstats", EnableVmkstats) #define VMK_WDT_OPT_LIST_POPULATE(name, ignore1, ignore2) \ /** \brief Option name */ VMK_##name, diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_accounting.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_accounting.h index 6d053c8..92a33e5 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_accounting.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_accounting.h @@ -34,6 +34,7 @@ */ #define VMK_SERVICE_ACCT_NAME_KERNEL "kernel" #define VMK_SERVICE_ACCT_NAME_SCSI "scsi" +#define VMK_SERVICE_ACCT_NAME_NET "net" /** * \ingroup Accounting diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_bus.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_bus.h index 117281b..d2f5a16 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_bus.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_bus.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010,2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -30,56 +30,6 @@ typedef struct vmkBusType* vmk_BusType; /** \brief A null bustype handle. */ #define VMK_BUSTYPE_NONE ((vmk_BusType)0) -/** \brief Properties of a bus type needed for registration. */ -typedef struct { - /** Module registering the bustype */ - vmk_ModuleID moduleID; - /** Name of bustype */ - vmk_Name name; -} vmk_BusTypeProps; - -/* - *********************************************************************** - * vmk_BusTypeRegister -- */ /** - * - * \brief Register a bus type with the device subsystem. - * - * \note This function will not block. - * - * \param[in] busProps Bus type description data. - * \param[out] busHandle Handle to registered bus type. - * - * \retval VMK_OK Success. - * \retval VMK_EXISTS Bus type is already registered. - * \retval VMK_NO_MEMORY Unable to allocate memory for bus type handle. - * \retval VMK_BAD_PARAM Input parameter is invalid. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_BusTypeRegister(vmk_BusTypeProps *busProps, - vmk_BusType *busHandle); - - -/* - *********************************************************************** - * vmk_BusTypeUnregister -- */ /** - * - * \brief Unregister a bus type. - * - * \note This function will not block. - * - * \param[in] busHandle Handle to registered bus type. - * - * \retval VMK_OK Success - * \retval VMK_BAD_PARAM No bus type object matching given handle. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_BusTypeUnregister(vmk_BusType busHandle); - - /* *********************************************************************** * vmk_BusTypeFind -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_cpu.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_cpu.h index 32ae6dc..768b3bf 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_cpu.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_cpu.h @@ -97,6 +97,10 @@ void _vmk_PCPURelease(vmk_PCPUID pcpu, * \note Callers are responsible for surrendering the PCPU by calling * VMK_END_WITH_PCPU as quickly as possible * + * \note No locks may be acquired in a VMK_WITH_PCPU_DO / VMK_END_WITH_PCPU + * block. If any locks are required, acquire them before entering the PCPU + * region. + * ****************************************************************************** */ #define VMK_WITH_PCPU_DO(_pcpu) \ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_device.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_device.h index 52c262d..951b4a7 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_device.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_device.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2007 - 2009 VMware, Inc. All rights reserved. + * Copyright 2007 - 2013 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -23,19 +23,6 @@ #endif /** \endcond never */ -/** - * \brief Opaque device type - */ -typedef struct vmkDevice* vmk_Device; - -/** \brief A null device handle. */ -#define VMK_DEVICE_NONE ((vmk_Device )0) - -/** - * \brief Opaque driver type. - */ -typedef struct vmkDriver* vmk_Driver; - /** * \brief Device identification. */ @@ -44,11 +31,17 @@ typedef struct { vmk_BusType busType; /** Bus-specific address for device */ char *busAddress; - /** Length of bus-specific address */ + /** + * String length of bus-specific address (excluding terminating NUL). + * The maximum length supported is 511. + */ vmk_uint32 busAddressLen; /** Bus-specific identifier for device */ char *busIdentifier; - /** Length of bus-specific identifier */ + /** + * String length of bus-specific identifier (excluding terminating NUL). + * The maximum length supported is 63. + */ vmk_uint32 busIdentifierLen; } vmk_DeviceID; @@ -59,14 +52,26 @@ typedef struct { * \ingroup Device * \brief Remove a device. * - * Driver should carry out any operations required for the physical - * removal of a device, and unregister the device object using - * vmk_DeviceUnregister(). + * This callback is invoked only on devices in an unclaimed state. + * A device may be removed for operations such as system shutdown, + * driver unload, or explicit device removal. + * + * Driver should carry out any operations required for the physical + * removal of the device, and the device object must be unregistered + * by calling vmk_DeviceUnregister(). Driver's private data for the + * device, including registeringDriverData, must be freed only after + * successful unregistration of the device. + * + * If the device is not unregistered, this callback may be invoked + * again later. * * \param[in] device Handle to device to be removed. * - * \retval VMK_OK Success - * + * \retval VMK_OK Device unregistered successfully. + * \retval VMK_FAILURE Driver could not unregister device. + * All other error codes are treated as + * VMK_FAILURE. + * *********************************************************************** */ @@ -84,14 +89,16 @@ typedef struct { * \brief Device registration data. */ typedef struct { - /** Module registering this device */ - vmk_ModuleID moduleID; + /** Driver registering this device */ + vmk_Driver registeringDriver; /** Device identification */ vmk_DeviceID *deviceID; /** Device operations */ vmk_DeviceOps *deviceOps; - /** Opaque bus-specific data for this device */ - vmk_AddrCookie busDriverData; + /** Opaque data set by registering driver for its private use */ + vmk_AddrCookie registeringDriverData; + /** Opaque data set by registering driver for attaching driver */ + vmk_AddrCookie registrationData; } vmk_DeviceProps; /* @@ -99,12 +106,21 @@ typedef struct { * vmk_DeviceRegister -- */ /** * * \ingroup Device - * \brief Register a device with the device database and get a - * a device handle back. + * \brief Register a device with the device database and get a device + * handle back. * - * This function should be used only by a driver that discovers - * new physical devices on any buses spawned from the device - * that it is the driver for, e.g. a PCI bridge driver. + * A device can be physical (e.g. a PCI device) or logical + * (e.g. an uplink, or a similar software construct). + * + * Devices can be registered only from a driver's scan callback. + * + * The '#' character is not permitted in the busAddress of the device, + * except if it is a logical device whose busAddress is generated using + * vmk_LogicalCreateBusAddress. + * + * The registering driver's module heap is used for temporary scratch + * purposes by this service. No memory allocated from this heap will + * persist after vmk_DeviceRegister returns. * * \note This function will not block. * @@ -112,11 +128,21 @@ typedef struct { * \param[in] parent Parent device handle. * \param[out] newDevice New device handle. * - * \retval VMK_BAD_PARAM Device ID is NULL or incomplete. - * \retval VMK_EXISTS Device with this data already registered. - * \retval VMK_NO_MEMORY Unable to allocate memory for device handle. - * \retval VMK_OK Successfully registered device. - * + * \retval VMK_OK Successfully registered device. + * \retval VMK_NOT_SUPPORTED Registration not from a driver's scan + * callback. + * \retval VMK_BAD_PARAM Device ID is NULL or incomplete. + * \retval VMK_BAD_PARAM The deviceID's busAddress is improperly + * formatted for the specified bus type. + * \retval VMK_EXISTS Device with this data already registered. + * \retval VMK_NO_MEMORY Unable to allocate memory for device + * handle. + * \retval VMK_NO_MODULE_HEAP The registeringDriver's module + * (specified in deviceProps) has no heap. + * \retval VMK_NAME_TOO_LONG The deviceID's busAddressLen is greater + * then the system defined maximum. + * \retval VMK_NAME_TOO_LONG The deviceID's busIdentifierLen is + * greater then the system defined maximum. *********************************************************************** */ @@ -130,19 +156,20 @@ vmk_DeviceRegister(vmk_DeviceProps *deviceProps, * vmk_DeviceUnregister -- */ /** * * \ingroup Device - * \brief Remove a device from the device database. + * \brief Unregister a device from the device database. * - * Devices should typically be unregistered only from the device - * remove callback. + * A device must be unregistered only from its device remove callback + * provided by the registering driver. * * \note This function will not block. * * \param[in] device Device handle. * * \retval VMK_OK Successfully unregistered device. + * \retval VMK_NOT_SUPPORTED Unregistration was not from the device's + * remove callback. * \retval VMK_BAD_PARAM Device handle is invalid. - * \retval VMK_BUSY Device has references. Will be freed after - * last reference is released. + * \retval VMK_BUSY Device has references or resources allocated. * *********************************************************************** */ @@ -158,15 +185,19 @@ vmk_DeviceUnregister(vmk_Device device); * * \note This function will not block. * + * \param[in] heap Heap from which device ID should be allocated. * \param[in] device Device handle. * \param[out] devID Device identification data. * * \retval VMK_OK Successfully returned device id. + * \retval VMK_BAD_PARAM Device handle is invalid. + * \retval VMK_NO_MEMORY Unable to allocate memory for device ID. * *********************************************************************** */ VMK_ReturnStatus -vmk_DeviceGetDeviceID(vmk_Device device, +vmk_DeviceGetDeviceID(vmk_HeapID heap, + vmk_Device device, vmk_DeviceID **devID); /* @@ -174,10 +205,11 @@ vmk_DeviceGetDeviceID(vmk_Device device, * vmk_DevicePutDeviceID -- */ /** * * \ingroup Device - * \brief Return a handle to device identification data. + * \brief Release device identification data. * * \note This function will not block. * + * \param[in] heap Heap from which device ID was allocated. * \param[in] devID Device identification data. * * \retval VMK_OK Successfully released device id data. @@ -185,120 +217,96 @@ vmk_DeviceGetDeviceID(vmk_Device device, *********************************************************************** */ VMK_ReturnStatus -vmk_DevicePutDeviceID(vmk_DeviceID *devID); +vmk_DevicePutDeviceID(vmk_HeapID heap, + vmk_DeviceID *devID); /* *********************************************************************** - * vmk_DeviceGetBusDriverData -- */ /** + * vmk_DeviceGetRegisteringDriverData -- */ /** * * \ingroup Device - * \brief Get bus-driver data for device. + * \brief Get registering driver's private data for device. * * \note This function will not block. * * \param[in] device Device handle. - * \param[out] data Bus-specific data for device. + * \param[out] data Registering driver's private data for device. * * \retval VMK_OK Successfully returned device data. + * \retval VMK_BAD_PARAM Invalid device handle. + * \retval VMK_BAD_PARAM data argument is NULL. * *********************************************************************** */ VMK_ReturnStatus -vmk_DeviceGetBusDriverData(vmk_Device device, - vmk_AddrCookie *data); +vmk_DeviceGetRegisteringDriverData(vmk_Device device, + vmk_AddrCookie *data); + /* *********************************************************************** - * vmk_DeviceSetFunctionDriverData -- */ /** + * vmk_DeviceGetRegistrationData -- */ /** * * \ingroup Device - * \brief Set function-driver data for device. - * - * \note This function will not block. - * - * \param[in] device Device handle. - * \param[in] data Device data. - * - * \retval VMK_OK Successfully set private data. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_DeviceSetFunctionDriverData(vmk_Device device, - vmk_AddrCookie data); - -/* - *********************************************************************** - * vmk_DeviceGetFunctionDriverData -- */ /** - * - * \ingroup Device - * \brief Get function-driver data for device. + * \brief Get device registration data for attaching driver. * * \note This function will not block. * * \param[in] device Device handle. - * \param[out] data Device data. + * \param[out] data Device registration data. * - * \retval VMK_OK Successfully returned private data. + * \retval VMK_OK Successfully returned device data. + * \retval VMK_BAD_PARAM Invalid device handle. + * \retval VMK_BAD_PARAM data argument is NULL. * *********************************************************************** */ VMK_ReturnStatus -vmk_DeviceGetFunctionDriverData(vmk_Device device, +vmk_DeviceGetRegistrationData(vmk_Device device, + vmk_AddrCookie *data); + +/* + *********************************************************************** + * vmk_DeviceGetAttachedDriverData -- */ /** + * + * \ingroup Device + * \brief Get attached driver's private data for device. + * + * \note This function will not block. + * + * \param[in] device Device handle. + * \param[out] data Attached driver's private data for device. + * + * \retval VMK_OK Successfully returned private data. + * \retval VMK_BAD_PARAM Invalid device handle. + * \retval VMK_BAD_PARAM data argument is NULL. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_DeviceGetAttachedDriverData(vmk_Device device, vmk_AddrCookie *data); /* *********************************************************************** - * vmk_DeviceFindDeviceByIdentifier -- */ /** + * vmk_DeviceSetAttachedDriverData -- */ /** * * \ingroup Device - * \brief Return a reference to the device that matches the bus type & - * identifier in the given identification data. + * \brief Set attached driver's private data for device. * - * If device identifiers are not unique, this function will return - * the first device found matching the given identifier. + * \note This function will not block. * - * \note Reference must be released using vmk_DeviceRelease. - * \note This function may block. + * \param[in] device Device handle. + * \param[in] data Attached driver's private data for device. * - * \param[in] deviceID Device identification. - * \param[out] device Reference to device matching requested - * identification. - * - * \retval VMK_OK Successfully returned reference to - * matching device. - * \retval VMK_NOT_FOUND No device with given identification. + * \retval VMK_OK Successfully set private data. + * \retval VMK_BAD_PARAM Invalid device handle. * *********************************************************************** */ -VMK_ReturnStatus -vmk_DeviceFindDeviceByIdentifier(vmk_DeviceID *deviceID, - vmk_Device *device); - -/* - *********************************************************************** - * vmk_DeviceFindDeviceByAddress -- */ /** - * - * \ingroup Device - * \brief Return a handle to the device that matches the bus & address - * in the given identification data. - * - * \note Reference must be released using vmk_DeviceRelease. - * \note This function may block. - * - * \param[in] deviceID Device identification. - * \param[out] device Reference to device matching requested - * identification. - * - * \retval VMK_OK Successfully returned reference to - * matching device. - * \retval VMK_NOT_FOUND No device with given identification. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_DeviceFindDeviceByAddress(vmk_DeviceID *deviceID, - vmk_Device *device); +VMK_ReturnStatus +vmk_DeviceSetAttachedDriverData(vmk_Device device, + vmk_AddrCookie data); /* *********************************************************************** @@ -322,79 +330,26 @@ vmk_DeviceRelease(vmk_Device device); /* *********************************************************************** - * vmk_DeviceGetParent-- */ /** + * vmk_DeviceRequestRescan -- */ /** * * \ingroup Device - * \brief Obtain a handle to the parent device of the given device. - * - * \note Parent device reference must be released using vmk_DeviceRelease. - * \note This function may block. - * - * \param[in] device Device handle - * \param[out] parent Parent handle - * - * \retval VMK_OK Success - * \retval VMK_BAD_PARAM Invalid device handle. - * \retval VMK_NOT_FOUND Device has no parent. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_DeviceGetParent(vmk_Device device, - vmk_Device *parent); - -/* - *********************************************************************** - * vmk_DeviceGetSibling -- */ /** - * - * \ingroup Device - * \brief Obtain a handle to the immediate sibling device of the given - * device. + * \brief Request a rescan of the device to register new children. * - * This always returns a handle to the immediate sibling of a device - * even if the given device has multiple sibling devices. + * This call submits a request to the device layer to schedule an + * invocation of the device driver's vmk_DriverScanDevice() callback. * - * \note Sibling device reference must be released using vmk_DeviceRelease. - * \note This function may block. + * \param[in] driver Requesting driver + * \param[in] device Device to be scanned * - * \param[in] device Device handle - * \param[out] sibling Sibling handle - * - * \retval VMK_OK Success - * \retval VMK_BAD_PARAM Invalid device handle. - * \retval VMK_NOT_FOUND Device has no siblings. + * \retval VMK_OK Request accepted. + * \retval VMK_BAD_PARAM Invalid device handle. + * \retval VMK_NO_PERMISSION Driver cannot submit this request. * *********************************************************************** */ VMK_ReturnStatus -vmk_DeviceGetSibling(vmk_Device device, - vmk_Device *sibling); - -/* - *********************************************************************** - * vmk_DeviceGetChild -- */ /** - * - * \ingroup Device - * \brief Obtain a handle to the first child device of the given device. - * - * This always returns a handle to the first child of a device even if - * the given device has multiple child devices. - * - * \note Child device reference must be released using vmk_DeviceRelease. - * \note This function may block. - * - * \param[in] device Device handle - * \param[out] child Child handle - * - * \retval VMK_OK Success - * \retval VMK_BAD_PARAM Invalid device handle. - * \retval VMK_NOT_FOUND Device has no children. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_DeviceGetChild(vmk_Device device, - vmk_Device *child); +vmk_DeviceRequestRescan(vmk_Driver driver, + vmk_Device device); #endif /* _VMKAPI_DEVICE_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_device_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_device_types.h new file mode 100644 index 0000000..277dffb --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_device_types.h @@ -0,0 +1,43 @@ +/*************************************************************************** + * Copyright 2007 - 2012 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Devices */ /** + * \defgroup Device Device interface + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_DEVICE_TYPES_H_ +#define _VMKAPI_DEVICE_TYPES_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Opaque device type + */ +typedef struct vmkDevice* vmk_Device; + +/** \brief A null device handle. */ +#define VMK_DEVICE_NONE ((vmk_Device )0) + +/** + * \brief Opaque driver type. + */ +typedef struct vmkDriver* vmk_Driver; + +/** \brief Invalid driver handle. */ +#define VMK_DRIVER_NONE ((vmk_Driver)0) + +#endif /* _VMKAPI_DEVICE_TYPES_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_dma.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_dma.h index b59898e..82c30e9 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_dma.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_dma.h @@ -600,6 +600,147 @@ VMK_ReturnStatus vmk_DMAUnmapSg(vmk_DMAEngine engine, vmk_SgOpsHandle sgOps, vmk_SgArray *sg); +/* + *********************************************************************** + * vmk_DMAMapElem -- */ /** + * + * \brief Map machine memory of a single MA range to an IOA range. + * + * This call will attempt to map a single machine-address range and + * create a new IO-address address range that maps to it. + * + * \note The input range must not be freed or modified while it + * is mapped or the results are undefined. + * + * \note If the range is simultaneously mapped with multiple DMA + * directions, the contents of the memory the SG array represents + * are undefined. + * + * \note This function will not block. + * + * \param[in] engine A handle representing a DMA engine to map to. + * \param[in] direction Direction of the DMA transfer for the mapping. + * \param[in] in A single SG array element containing a single + * machine addresse range to map for the + * DMA engine. + * \param[in] lastElem Indicates if this is the last element in + * the transfer. + * \param[out] out A single SG array element to hold the mapped + * IO address for the range. Note that this + * may be the same SG element as the element + * passed in depending on choices made by the + * kernel's mapping code. + * \param[out] err If this call fails with VMK_DMA_MAPPING_FAILED, + * additional information about the failure may + * be found here. This may be set to NULL if the + * information is not desired. + * + * \retval VMK_BAD_PARAM The specified DMA engine is invalid. + * \retval VMK_DMA_MAPPING_FAILED The mapping failed because the + * DMA constraints could not be met. + * Additional information about the + * failure can be found in the "err" + * argument. + * \retval VMK_NO_MEMORY There is currently insufficient + * memory available to construct the + * mapping. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_DMAMapElem(vmk_DMAEngine engine, + vmk_DMADirection direction, + vmk_SgElem *in, + vmk_Bool lastElem, + vmk_SgElem *out, + vmk_DMAMapErrorInfo *err); + +/* + *********************************************************************** + * vmk_DMAFlushElem -- */ /** + * + * \brief Synchronize a DMA mapping for a single IO address range. + * + * This call is used to synchronize data if the CPU needs to read or + * write after an DMA mapping is active on a region of machine memory + * but before the DMA mapping is unmapped. + * + * If the specified memory is DMA-mapped this call must be invoked + * with VMK_DMA_DIRECTION_FROM_MEMORY after CPU writes are complete but + * before any new DMA read transactions occur on the memory. + * + * If the specified memory is DMA-mapped this call must be invoked + * with VMK_DMA_DIRECTION_TO_MEMORY before CPU reads but after + * any write DMA transactions complete on the memory. + * + * DMA map and unmap calls will implicitly perform a flush of the + * element. + * + * The code may flush bytes rounded up to the nearest page or other + * HW-imposed increment. + * + * \note The IO element supplied to this function must be an element + * output from vmk_DMAMapElem or the results of this call are + * undefined. + * + * Do not use this to flush a single element in an SG array + * that was mapped by vmk_DMAMapSg. + * + * \note The original element supplied to this function must be + * the one supplied to vmk_DMAMapElem when the IO element + * was created or the results of this call are undefined. + * + * \note This function will not block. + * + * \param[in] engine A handle representing the DMA engine used + * for the mapping. + * \param[in] direction Direction of the DMA transfer for the + * mapping. + * \param[in] IOElem Scatter-gather element contained the + * IO-address range to flush. + * + * \retval VMK_BAD_PARAM Unknown duration or direction, or + * unsupported direction. + * \retval VMK_INVALID_ADDRESS Memory in the specified element + * is not mapped. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_DMAFlushElem(vmk_DMAEngine engine, + vmk_DMADirection direction, + vmk_SgElem *IOElem); + +/* + *********************************************************************** + * vmk_DMAUnmapElem -- */ /** + * + * \brief Unmaps previously mapped IO address range. + * + * \note The direction must match the direction at the time of mapping + * or the results of this call are undefined. + * + * \note The element supplied to this function must be one mapped with + * vmk_DMAMapElem or the results of this call are undefined. + * + * \note This function will not block. + * + * \param[in] engine A handle representing a DMA engine + * to unmap from. + * \param[in] direction Direction of the DMA transfer for the + * mapping. + * \param[in] IOElem Scatter-gather element contained the + * IO-address range to unmap. + * + * \retval VMK_BAD_PARAM Unknown direction, or unsupported + * direction. + * \retval VMK_INVALID_ADDRESS One ore more pages in the specified + * machine address range are not mapped. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_DMAUnmapElem(vmk_DMAEngine engine, + vmk_DMADirection direction, + vmk_SgElem *IOElem); + /* *********************************************************************** * vmk_DMAGetAllocAddrConstraint -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_driver.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_driver.h index efe7cce..0e19e99 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_driver.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_driver.h @@ -28,34 +28,125 @@ /* *********************************************************************** - * vmk_DriverAttachDevice -- */ /** + * vmk_DriverAttachDevice -- */ /** * * \brief Attach a device to a driver. * - * The driver should start driving this device. If the driver is not - * capable of driving the given device, an appropriate error should be - * returned, and the device must be restored to its original state at - * entry. + * This callback is invoked to offer an unclaimed device to a driver. + * + * The driver should check whether it is capable of driving the given + * device, and do initial device set up, e.g. allocate device resources. + * If the driver is not capable of driving the given device, the device + * must be restored to its original state at callback entry, and an + * error should be returned. * * \param[in] device Handle to device to be added to the driver. * - * \retval VMK_OK Success + * \retval VMK_OK Driver has claimed this device. + * \retval VMK_FAILURE Driver did not claim this device. + * All other error codes are treated as + * VMK_FAILURE. * *********************************************************************** */ typedef VMK_ReturnStatus (*vmk_DriverAttachDevice)(vmk_Device device); +/* + *********************************************************************** + * vmk_DriverStartDevice-- */ /** + * + * \brief Prepare a device to accept IO. + * + * This callback is invoked to place the device in an IO-able state. + * This can be when the device is implicitly in a quiescent state after + * a successful driver attach operation, or at any other time when the + * device has been explicitly put in a quiescent state by the callback + * vmk_DriverQuiesceDevice(). + * + * The driver should prepare the device for IO. + * + * \param[in] device Handle to device to prepare for IO. + * + * \retval VMK_OK Driver will accept IO for this device. + * \retval VMK_FAILURE Driver could not prepare device for IO. + * All other error codes are treated as + * VMK_FAILURE. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_DriverStartDevice)(vmk_Device device); + +/* + *********************************************************************** + * vmk_DriverScanDevice -- */ /** + * + * \brief Register any child devices. + * + * This callback is invoked only on devices in IO-able state. It is + * invoked at least once after a device has been successfully attached + * to a driver and started. It may be invoked for other device hotplug + * events as appropriate. + * + * The driver may register new devices by calling vmk_DeviceRegister() + * from this callback. New devices may be registered only from this + * callback. + * + * \param[in] device Handle to device whose children may be registered. + * + * \retval VMK_OK Devices registered, or nothing to register. + * \retval VMK_FAILURE Driver could not register a child device. + * All other error codes are treated as + * VMK_FAILURE. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_DriverScanDevice)(vmk_Device device); + +/* + *********************************************************************** + * vmk_DriverQuiesceDevice -- */ /** + * + * \brief Place a device in quiescent state. + * + * This callback may be invoked any time after a device is in an IO-able + * state, in preparation for operations such as system shutdown, driver + * unload, or device removal. + * + * The driver should complete any IO on the device and flush any device + * caches as necessary to place the device in a quiescent state. When a + * device is in quiescent state, the driver must not report any IO to, + * and will not receive any IO from, any kernel subsystem. + * + * \param[in] device Handle to device to be quiesced. + * + * \retval VMK_OK Device has been quiesced. + * \retval VMK_FAILURE Driver could not quiesce IO on device. + * All other error codes are treated as + * VMK_FAILURE. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_DriverQuiesceDevice)(vmk_Device device); + /* *********************************************************************** * vmk_DriverDetachDevice -- */ /** * * \brief Detach a device from its driver. * - * The driver should stop driving this device, and release its resources. - * - * \param[in] device Handle to device to be removed from the driver. + * This callback is invoked only on devices in a quiescent state. + * A device may be detached for operations such as system shutdown, + * driver unload, or device removal. * - * \retval VMK_OK Success + * The driver should stop driving this device, and undo all device setup + * performed in vmk_DriverAttachDevice. E.g. release device resources. + * + * \param[in] device Handle to device to be detached. + * + * \retval VMK_OK Device has been released. + * \retval VMK_FAILURE Driver could not detach itself from device. + * All other error codes are treated as + * VMK_FAILURE. * *********************************************************************** */ @@ -64,41 +155,23 @@ typedef VMK_ReturnStatus (*vmk_DriverDetachDevice)(vmk_Device device); /* *********************************************************************** - * vmk_DriverQuiesceDevice -- */ /** + * vmk_DriverForgetDevice-- */ /** * - * \brief Quiesce a device. - * - * This callback is invoked in preparation for device removal or - * system shutdown. The driver should complete any IO on the device - * and flush any device caches as necessary to put the device in a - * quiescent state. - * - * \param[in] device Handle to device to be quiesced. - * - * \retval VMK_OK Success - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_DriverQuiesceDevice)(vmk_Device device); - -/* - *********************************************************************** - * vmk_DriverScanDevice -- */ /** - * - * \brief Scan a device for new children and register them. + * \brief Mark a device as inaccessible. * - * Only bus drivers will typically need to implement this entry. - * This function is called at least once after a device has been - * successfully attached to a driver. It may be called at other - * device hotplug events as appropriate. + * This callback is a notification. It may be invoked at any time to + * notify the driver that a device is inaccessible, so that the driver + * does not wait indefinitely for any subsequent device operations. + * + * The driver must note that the device is inaccessible. The driver must + * return successfully, in deterministic time, on any subsequent device + * callbacks, e.g. vmk_DriverQuiesceDevice, vmk_DriverDetachDevice. * - * \param[in] device Handle to device to scan. - * - * \retval VMK_OK Success + * \param[in] device Handle to device that is inaccessible. * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_DriverScanDevice)(vmk_Device device); +typedef void (*vmk_DriverForgetDevice)(vmk_Device device); /** * \brief Driver operations. @@ -110,8 +183,12 @@ typedef struct { vmk_DriverScanDevice scanDevice; /** \brief Detach a device from its driver */ vmk_DriverDetachDevice detachDevice; - /** \brief Quiesce a device for system shutdown */ + /** \brief Quiesce a device */ vmk_DriverQuiesceDevice quiesceDevice; + /** \brief Prepare device for IO */ + vmk_DriverStartDevice startDevice; + /** \brief Notify driver of a lost device */ + vmk_DriverForgetDevice forgetDevice; } vmk_DriverOps; /** @@ -132,17 +209,23 @@ typedef struct { *********************************************************************** * vmk_DriverRegister -- */ /** * - * \brief Register a driver with the driver database and get a - * a driver handle back. + * \brief Register a driver with the driver database + * + * vmk_DriverRegister must be called from within the driver module's + * initialization routine. A successful registration returns a + * a new driver handle to the caller. * * \note This function will not block. * - * \param[in] driverProps Driver registration data - * \param[out] driver New driver handle. + * \param[in] driverProps Driver registration data + * \param[out] driver New driver handle. * - * \retval VMK_BAD_PARAM Name or ops argument is NULL. - * \retval VMK_NO_MEMORY Unable to allocate memory for device handle. - * \retval VMK_OK Successfully registered driver. + * \retval VMK_BAD_PARAM Name or ops argument is NULL. + * \retval VMK_EXISTS A driver by this name is already registered. + * \retval VMK_NO_MEMORY Unable to allocate memory for device handle. + * \retval VMK_NOT_FOUND Unable to find module registering this driver. + * \retval VMK_OK Successfully registered driver. + * \retval VMK_MODULE_FAILED Call was not from the module's initialization routine. * *********************************************************************** */ @@ -154,13 +237,19 @@ vmk_DriverRegister(vmk_DriverProps *driverProps, *********************************************************************** * vmk_DriverUnregister -- */ /** * - * \brief Unregister a driver from the driver database. + * \brief Unregister a driver from the driver database. + * + * vmk_DriverUnregister is normally called from within the driver module's + * cleanup routine. A driver is also permitted to call it from its + * initialization routine if the module fails to initialize (load failure). * * \note This function will not block. * - * \param[in] driver Driver handle + * \param[in] driver Driver handle * - * \retval VMK_OK Successfully unregistered driver. + * \retval VMK_OK Successfully unregistered driver. + * \retval VMK_MODULE_FAILED Call was not from the module's cleanup or + * initialization routines. * *********************************************************************** */ @@ -180,6 +269,7 @@ vmk_DriverUnregister(vmk_Driver driver); * * \retval VMK_OK Successfully returned driver private data. * \retval VMK_BAD_PARAM Invalid driver handle. + * \retval VMK_BAD_PARAM data argument is NULL. * *********************************************************************** */ @@ -191,3 +281,5 @@ vmk_DriverGetPrivateData(vmk_Driver driver, /** @} */ /** @} */ + + diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_dump.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_dump.h new file mode 100644 index 0000000..a79ed8a --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_dump.h @@ -0,0 +1,203 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Dump */ /** + * \addtogroup Core + * @{ + * \defgroup Dump VMKernel Crash Dumps + * + * Functions related to VMKernel Crash Dumps. These functions allow + * vmkapi users to register files to be created in a zdump file. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_DUMP_H_ +#define _VMKAPI_DUMP_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** + * \brief Prototype for a dump callback function. + * + * After being registered for dump callback, this function is called during + * system dump time. There are two types of system dump. The first one + * is when the system crashes during normal operation and a core dump is + * written. The second type, called a live dump, occurs while the system + * is still operational and is an additional tool for diagnosing issues + * without bringing the whole system down. + * + * There are two functions a callback can use to add data to the dump. + * These are vmk_DumpRange() and vmk_DumpMPN(). vmk_DumpRange() may only + * be called on data currently known to be correctly mapped (consistently + * across all CPUs), as calls to unmapped spaces will generate page faults. + * + * For both functions it is also required that there are no side effects + * from reading the memory (e.g. a memory mapped PCI device should not + * treat reading any piece of memory as an acknowledge of some transaction + * for example). + * + * For the live dump type of call vmk_DumpMPN() is the only safe method + * of adding data that may not be currently mapped. This may happen when + * unmap events are not managed with any concurrency protection. + * + * \note This function may only block when liveDump is TRUE. + * + * \param[in] cookie Private data as specified vmk_DumpAddFileCallback(). + * \param[in] liveDump TRUE only if the system is still currently functional. + * In this case concurrency issues should be considered + * as normal for the sub-system. This means that locking + * and/or other synchronization should only be performed + * when liveDump is TRUE. + */ +typedef VMK_ReturnStatus (*vmk_DumpFileCallback)( + void *cookie, + vmk_Bool liveDump); + + +/** + * \brief Dump file handle + * + * Returned as part of the vmk_DumpAddFileCallback() call. Used for + * all other calls. + */ +typedef void *vmk_DumpFileHandle; + + +/* + ******************************************************************************* + * vmk_DumpAddFileCallback -- */ /** + * + * \brief Register a file to be created at kernel core dump time. + * + * This function registers a callback to allow memory to be dumped in a + * VMKernel core file under the specified name. + * + * \param[in] moduleID Module ID of the caller. + * \param[in] heapID Heap ID to be used for allocations. + * \param[in] name The name of the file to be created by vmkdump_extract. + * \param[in] func The callback function itself. + * \param[in] cookie Opaque cookie passed to the callback. + * \param[in] dumpName Tag used for error messages on this file. + * \param[out] outHandle Dump Handle is written here upon success. + * + * \note This function will not block. + * + * \retval VMK_OK Callback successfully added to dump-file table. + * \retval VMK_LIMIT_EXCEEDED Dump file table is full. + * \retval VMK_NAME_INVALID Specified name was invalid. + * \retval VMK_NO_MEMORY Allocation from heapID failed. + * + ******************************************************************************* + */ +VMK_ReturnStatus vmk_DumpAddFileCallback( + vmk_ModuleID moduleID, + vmk_HeapID heapID, + const char *name, + vmk_DumpFileCallback func, + void *cookie, + char *dumpName, + vmk_DumpFileHandle *outHandle); + + +/* + ******************************************************************************* + * vmk_DumpDeleteFileCallback -- */ /** + * + * \brief Unregister a file to be created at kernel core dump time. + * + * This function unregisters a callback to allow memory to be dumped in a + * VMKernel core file under the specified name. + * + * \param[in] handle Dump handle returned from vmk_DumpAddFileCallback(). + * + * \note This function will not block. + * + * \retval VMK_OK Callback successfully removed to dump-file table. + * \retval VMK_NOT_FOUND Dump-file table entry could not be found. + * + ******************************************************************************* + */ +VMK_ReturnStatus vmk_DumpDeleteFileCallback( + vmk_DumpFileHandle handle); + + +/* + ******************************************************************************* + * vmk_DumpRange -- */ /** + * + * \brief Dump a region of memory into a VMKernel core file. + * + * All errors occurring in an invocation will be logged with the dumpName tag + * registered at dump handle creation. + * + * \param[in] handle Dump handle returned from vmk_DumpAddFileCallback(). + * \param[in] va Virtual Address to begin dumping. If zero, + * dump zero-byte data upto one PAGE_SIZE. + * \param[in] size Length of region to dump. + * + * \note This function is only to be used in a call back registered via + * vmk_DumpAddFileCallback(). + * + * \note This function may block when vmk_DumpAddFileCallback() was called + * with liveDump is TRUE. + * + * \retval VMK_OK Region was successfully dumped. + * \retval VMK_LIMIT_EXCEEDED More than PAGE_SIZE of zeros requested, or size + * of dump exceeded. + * \retval VMK_FAILURE Gzip deflate failed. + * + ******************************************************************************* + */ +VMK_ReturnStatus vmk_DumpRange( + vmk_DumpFileHandle handle, + vmk_VA va, + vmk_uint32 size); + + +/* + ******************************************************************************* + * vmk_DumpMPN -- */ /** + * + * \brief Dump a page of memory into a VMKernel core file. + * + * All errors occurring in an invocation will be logged with the dumpName tag + * registered at dump handle creation. + * + * \param[in] handle Dump handle returned from vmk_DumpAddFileCallback(). + * \param[in] mpn VMKernel machine page number to dump. + * + * \note This function is only to be used in a call back registered via + * vmk_DumpAddFileCallback(). + * + * \note This function may block when vmk_DumpAddFileCallback() was called + * with liveDump is TRUE. + * + * \retval VMK_OK Page was successfully dumped. + * \retval VMK_LIMIT_EXCEEDED More than PAGE_SIZE of zeros requested, or size + * of dump exceeded. + * \retval VMK_FAILURE Gzip deflate failed. + * + ******************************************************************************* + */ +VMK_ReturnStatus vmk_DumpMPN( + vmk_DumpFileHandle handle, + vmk_MPN mpn); + + +#endif /* _VMKAPI_DUMP_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_logical_bus.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_logical_bus.h new file mode 100644 index 0000000..aaee4c4 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_logical_bus.h @@ -0,0 +1,123 @@ +/*************************************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Logical */ /** + * \addtogroup Device + * @{ + * \defgroup Logical Logical bus interface + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_LOGICAL_BUS_H_ +#define _VMKAPI_LOGICAL_BUS_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** \brief Name of the logical bus type. */ +#define VMK_LOGICAL_BUS_NAME "logical" + +/* + *********************************************************************** + * vmk_LogicalCreateBusAddress -- */ /** + * + * \brief Return a global address for a device on the logical bus. + * + * A driver registering a device on the logical bustype must use this + * call to obtain a globally unique and persistent busAddress for the + * device. Driver must provide a logical port component satisfying the + * following conditions. + * + * Locally unique: This means the logical port distinguishes this + * logical device from other logical devices created by the same driver + * under the same parent device. + * + * Locally persistent: This means the same logical port is used for + * a logical device every time that device is created by the driver. + * This is important if the logical device directly represents a + * physical hardware component in the system. + * + * Example : A network driver creates uplinks (logical devices) for a + * NIC addressable by a single PCI function (physical parent device). + * + * Case 1: Single uplink for a single-port NIC. + * Driver can use '0' as unique and persistent logical port. + * + * Case 2: Multiplexing two uplinks for a single-port NIC. + * Driver may use '0' and '1' as unique logical ports. As long + * as the driver manages multiplexing internally, and logical + * ports do not represent physical ports directly, shifting of + * logical port numbers is permitted. E.g. if driver is + * configured to register only one uplink at next driver load, + * logical port '0' may be used, whether it was '0' or '1' + * during the previous load. + * + * Case 3: Two uplinks for a two-port NIC, one per port. + * Driver may choose '0' and '1' as unique logical ports for the + * uplinks on the first and second port, respectively. Since the + * logical devices directly represent physical ports, the driver + * must also ensure that the logical ports are never shifted or + * mixed up. That is, '0' is always used as the logical port for + * the uplink for the first port, and '1' is always used as the + * logical port for the uplink for the second port, even if one + * of the physical ports fails or is disabled, or if the driver + * is configured to use only one port at next driver load. + * + * \note Memory is allocated for \em globalAddress. + * It must be freed using vmk_LogicalFreeBusAddress(). + * + * \param[in] driver Driver creating the device. + * \param[in] parent Parent of device being created. + * \param[in] uniqueLogicalPort Unique and persistent logical port number. + * \param[out] globalAddress Globally unique and persistent address. + * \param[out] globalAddressLen Length of globally unique address. + * + * \retval VMK_OK Success. + * \retval VMK_NO_MODULE_HEAP Driver module has no heap to allocate memory. + * \retval VMK_NO_MEMORY Could not allocate memory to create address. + * \retval VMK_BAD_PARAM Invalid parameter. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_LogicalCreateBusAddress(vmk_Driver driver, + vmk_Device parent, + vmk_uint32 uniqueLogicalPort, + char* *globalAddress, + vmk_uint32 *globalAddressLen); + + +/* + *********************************************************************** + * vmk_LogicalFreeBusAddress -- */ /** + * + * \brief Free memory for logical bus address created using + * vmk_LogicalCreateBusAddress(). + * + * \param[in] driver Driver that allocated the bus address. + * \param[in] globalAddress Allocated global address. + * + * \retval VMK_OK Success + * \retval VMK_NO_MODULE_HEAP Driver module has no heap to free memory. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_LogicalFreeBusAddress(vmk_Driver driver, + char* globalAddress); + +#endif /* _VMKAPI_LOGICAL_BUS_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_pageslab.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_pageslab.h new file mode 100644 index 0000000..03425be --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_pageslab.h @@ -0,0 +1,200 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * PageSlab */ /** + * \addtogroup Core + * @{ + * \defgroup PageSlab Slab page allocator + * + * Functions related to page slabs. A page slab is a page-wise + * allocator that allows for fast page allocations and freeing. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_PAGESLAB_H_ +#define _VMKAPI_PAGESLAB_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** \brief INVALID page slab ID */ +#define VMK_INVALID_PAGESLAB_ID ((vmk_PageSlabID)NULL) + +/** \brief Page slab ID */ +typedef struct vmkPageSlabInt* vmk_PageSlabID; + +/** + * \brief Properties of a page slab. + */ +typedef struct vmk_PageSlabCreateProps { + /** \brief Heap to allocate page slab metadata from. The size of the + * allocation can be retrieved via vmk_PageSlabAllocationSize. + */ + vmk_HeapID heapID; + /** \brief Name for this page slab. */ + vmk_Name name; + /** \brief Minimum number of pages that should be held in the slab. + * Please be careful when sizing this number as any memory + * that is used for the minimum will be unavailable to VMs, etc. + */ + vmk_uint32 minPages; + /** \brief Maximum number of pages that the slab should provide for. */ + vmk_uint32 maxPages; + /** \brief Restrictions on the physical address space that pages for + * the page slab are allocated from. Please choose the least + * restrictive constraint possible as memory below 2GB or 4GB + * is a scarce resource. + */ + vmk_MemPhysAddrConstraint physRange; + /** \brief Memory pool that the slab should allocate pages from. Set to + * VMK_MEMPOOL_INVALID to have vmk_PageSlabCreate create a new + * memory pool for the slab. + */ + vmk_MemPool memPool; +} vmk_PageSlabCreateProps; + + +/* + *********************************************************************** + * vmk_PageSlabCreateCustom -- */ /** + * + * \brief Create a new page slab. + * + * This function creates a new page slab with the given properties. + * + * \note This function might block. + * + * \param[in] moduleID Module ID of the module that this + * page slab will belong to. + * \param[in] createProps Properties of the new page slab. + * \param[out] pageSlabID Handle to the newly created page slab. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PageSlabCreateCustom(vmk_ModuleID moduleID, + vmk_PageSlabCreateProps *createProps, + vmk_PageSlabID *pageSlabID); + +/* + *********************************************************************** + * vmk_PageSlabCreate -- */ /** + * + * \brief Convenience wrapper around vmk_PageSlabCreateCustom + * + * This function creates a new page slab with the given properties. + * + * \note This function might block. + * + * \param[in] createProps Properties of the new page slab. + * \param[out] pageSlabID Handle to the newly created page slab. + * + *********************************************************************** + */ + +static VMK_INLINE VMK_ReturnStatus +vmk_PageSlabCreate(vmk_PageSlabCreateProps *createProps, + vmk_PageSlabID *pageSlabID) +{ + return vmk_PageSlabCreateCustom(vmk_ModuleCurrentID, createProps, pageSlabID); +} + + +/* + *********************************************************************** + * vmk_PageSlabDestroy -- */ /** + * + * \brief Destroy a page slab. + * + * \note The page slab must be empty meaning all previously allocated + * pages must have been freed back to the slab. + * \note This function might block. + * + * \param[in] pageSlabID Page slab identifier acquired through a + * preceding vmk_PageSlabCreate(Custom) call. + * + *********************************************************************** + */ + +void +vmk_PageSlabDestroy(vmk_PageSlabID pageSlabID); + + +/* + *********************************************************************** + * vmk_PageSlabAllocationSize -- */ /** + * + * \brief Return the amount of memory that vmk_PageSlabCreate is going + * to allocate from the passed in heap for each call. + * + * \note This function will not block. + * + *********************************************************************** + */ + +vmk_ByteCountSmall +vmk_PageSlabAllocationSize(void); + + +/* + *********************************************************************** + * vmk_PageSlabAlloc -- */ /** + * + * \brief Allocate a page from the given page slab. + * + * \note This function may block based on the blocking parameter + * + * \param[in] pageSlabID Page slab previously created via + * vmk_PageSlabCreate(Custom) + * \param[in] blocking Allow the page slab to block and wait for + * a page to become free if none are readily + * available. + * \param[out] mpn Machine page number of the new page. Only + * filled if return status was VMK_OK; + * + * \retval VMK_NO_MEMORY The slab was unable to allocate a page. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PageSlabAlloc(vmk_PageSlabID pageSlabID, + vmk_Bool blocking, + vmk_MPN *mpn); + + +/* + *********************************************************************** + * vmk_PageSlabFree -- */ /** + * + * \brief Free a page to the given page slab. + * + * \param[in] pageSlabID Page slab previously created via + * vmk_PageSlabCreate(Custom) + * \param[in] mpn An machine page number previously returned + * by vmk_PageSlabAlloc + * + *********************************************************************** + */ + +void +vmk_PageSlabFree(vmk_PageSlabID pageSlabID, + vmk_MPN mpn); + + +#endif /* _VMKAPI_PAGESLAB_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_scatter_gather.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_scatter_gather.h index b2819c5..397169a 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_scatter_gather.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_scatter_gather.h @@ -88,6 +88,11 @@ typedef struct vmk_SgArray { */ typedef struct vmk_SgOpsHandleInt *vmk_SgOpsHandle; +/** + * \brief Opaque handle for scatter-gather component operations. + */ +typedef struct vmk_SgComponentOpsHandleInt *vmk_SgComponentOpsHandle; + /** * \brief The type of position a vmk_SgPosition represents. */ @@ -140,6 +145,53 @@ typedef struct vmk_SgPosition { }; } vmk_SgPosition; +/** + * \brief Scatter-gather component + * + * A scatter gather component is a scatter gather array as well + * as a specific data object offset and length describing + * the start location and size of the I/O operation. + */ +typedef struct vmk_SgComponent { + /** + * Byte offset within a data object. + */ + vmk_ByteCount ioOffset; + /** + * Number of bytes of this I/O operation. + */ + vmk_ByteCount ioLength; + /** + * The scatter-gather array specifying the buffer addresses + * used to satisfy this piece of the I/O operation. + */ + vmk_SgArray *sg; +} vmk_SgComponent; + +/** + * \brief Scatter-gather component array. + * + * A scatter gather component array is a set of I/O operations to + * a given data object where a unique data object offset, size, + * and scatter gather array can be specified for each piece of + * the operation. + */ +typedef struct vmk_SgComponentArray { + /** \brief The number of SgComponents this array has. */ + vmk_int32 maxComponents; + /** \brief Number of SgComponents currently in-use. */ + vmk_int32 numComponents; + + /** \brief Reserved. */ + vmk_uint64 reserved; + vmk_uint64 reserved2; + + /** \brief Array of scatter gather components. Should be + * set to zero on init. + */ + vmk_SgComponent sgComponent[0]; +} vmk_SgComponentArray; + /* *********************************************************************** * vmk_SgComputeAllocSize-- */ /** @@ -193,13 +245,44 @@ typedef VMK_ReturnStatus (*vmk_SgArrayOpAlloc)(vmk_SgOpsHandle handle, vmk_uint32 numElems, void *private); +/* + *********************************************************************** + * vmk_SgComponentArrayOpAlloc-- */ /** + * + * \ingroup ScatterGather + * \brief Callback to allocate and initialize a new scatter-gather + * component array. + * + * \note Callbacks of this type may not block. + * + * The returned array should have its maxLength field set correctly + * and length field set to zero. + * + * \param[in] handle Opaque scatter-gather ops handle. + * \param[out] sgComponent The new scatter gather component array. + * \param[in] maxComponents Max scatter-gather operations the new + * array must support. + * \param[in] private Private data from vmk_SgComponentCreateOpsHandle(). + * + * \retval VMK_OK The allocation succeeded. + * \retval VMK_NO_MEMORY Not enough memory to allocate a new + * scatter-gather component array. + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_SgComponentArrayOpAlloc)( + vmk_SgComponentOpsHandle handle, + vmk_SgComponentArray **sgComponent, + vmk_uint32 maxComponents, + void *private); + + /* *********************************************************************** * vmk_SgArrayOpFree-- */ /** * * \ingroup ScatterGather * \brief Callback to free an existing scatter-gather array. - * + * * \note Callbacks of this type may not block. * * \param[in] handle Opaque scatter-gather ops handle. @@ -214,6 +297,28 @@ typedef VMK_ReturnStatus (*vmk_SgArrayOpFree)(vmk_SgOpsHandle handle, vmk_SgArray *sg, void *private); +/* + *********************************************************************** + * vmk_SgComponentArrayOpFree-- */ /** + * + * \ingroup ScatterGather + * \brief Callback to free an existing scatter-gather component array. + * + * \note Callbacks of this type may not block. + * + * \param[in] handle Opaque scatter-gather ops handle. + * \param[in] sgComponent scatter-gather component array to free. + * \param[in] private Private data from vmk_SgCreateOpsHandle(). + * + * \retval VMK_OK The free succeeded. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_SgComponentArrayOpFree)( + vmk_SgComponentOpsHandle handle, + vmk_SgComponentArray *sgComponent, + void *private); + /** * \brief Scatter-gather array operations. * @@ -230,6 +335,22 @@ typedef struct vmk_SgArrayOps { vmk_SgArrayOpFree free; } vmk_SgArrayOps; +/** + * \brief Scatter-gather components array operations. + * + * Routines not implemented by the caller must be set to NULL. + * + * Caller may override default behavior for any routine by supplying + * the routines. + */ +typedef struct vmk_SgComponentArrayOps { + /** Handler invoked when allocating scatter-gather component arrays. */ + vmk_SgComponentArrayOpAlloc alloc; + + /** Handler invoked when freeing scatter-gather component arrays. */ + vmk_SgComponentArrayOpFree free; +} vmk_SgComponentArrayOps; + /* *********************************************************************** * vmk_SgComputeMaxEntries-- */ /** @@ -284,6 +405,45 @@ VMK_ReturnStatus vmk_SgCreateOpsHandle(vmk_HeapID heapId, vmk_SgArrayOps *ops, void *private); +/* + *********************************************************************** + * vmk_SgComponentCreateOpsHandle-- */ /** + * + * \ingroup ScatterGather + * \brief Create an opaque handle for scatter-gather component operations. + * + * The handle is used by other routines to invoke callbacks and track + * other state related to scatter-gather component operations. + * + * \note If ops is non-NULL, both an alloc and a free method must + * be provided. + * \note This function will not block. + * + * \param[in] heapId HeapID to allocate memory on. + * \param[out] handle Opaque scatter-gather component ops handle. + * \param[in] ops Scatter-gather compoents ops to associate with + * the opaque handle. + * If this argument is NULL, then the + * default set of scatter-gather component ops + * will be used and the supplied heap + * will be used to allocate scatter-gather + * component arrays. + * \param[in] private Private data passed to each + * vmk_SgComponentArrayOps method when it + * is invoked. + * + * \retval VMK_OK The handle creation succeeded. + * \retval VMK_BAD_PARAM The heapId or ops setting is invalid. + * \retval VMK_NO_MEMORY Not enough memory to allocate a new + * handle. + *********************************************************************** + */ +VMK_ReturnStatus vmk_SgComponentCreateOpsHandle( + vmk_HeapID heapId, + vmk_SgComponentOpsHandle *handle, + vmk_SgComponentArrayOps *ops, + void *private); + /* *********************************************************************** * vmk_SgDestroyOpsHandle-- */ /** @@ -299,6 +459,24 @@ VMK_ReturnStatus vmk_SgCreateOpsHandle(vmk_HeapID heapId, */ VMK_ReturnStatus vmk_SgDestroyOpsHandle(vmk_SgOpsHandle handle); +/* + *********************************************************************** + * vmk_SgComponentDestroyOpsHandle-- */ /** + * + * \ingroup ScatterGather + * \brief Destroy opaque handle for scatter-gather component operations. + * + * \note This function will not block. + * + * \param[in] handle Opaque scatter-gather component ops handle to + * be destroyed. + * + * \retval VMK_OK The handle was destroyed. + *********************************************************************** + */ +VMK_ReturnStatus vmk_SgComponentDestroyOpsHandle( + vmk_SgComponentOpsHandle handle); + /* *********************************************************************** * vmk_SgAlloc-- */ /** @@ -309,9 +487,9 @@ VMK_ReturnStatus vmk_SgDestroyOpsHandle(vmk_SgOpsHandle handle); * \note This function will not block. * * \param[in] handle Opaque scatter-gather ops handle. - * \param[in] sg New scatter-gather array. + * \param[out] sg New scatter-gather array. * \param[in] maxElements Maximum number of elements the new - * sactter-gather array should have. + * scatter-gather array should have. * *********************************************************************** */ @@ -319,6 +497,29 @@ VMK_ReturnStatus vmk_SgAlloc(vmk_SgOpsHandle handle, vmk_SgArray **sg, vmk_uint32 maxElements); +/* + *********************************************************************** + * vmk_SgComponentAlloc-- */ /** + * + * \ingroup ScatterGather + * \brief Allocate a scatter-gather component array with a given number + * of component entries. + * + * \note This function will not block. + * + * \param[in] handle Opaque scatter-gather component ops handle. + * \param[out] sgComponent New scatter-gather component array. + * \param[in] maxLength Maximum number of components the new + * sactter-gather component array should have. + * + * \retval VMK_OK The allocation succeeded. + * \retval VMK_NO_MEMORY Not enough memory to allocate the array. + *********************************************************************** + */ +VMK_ReturnStatus vmk_SgComponentAlloc(vmk_SgComponentOpsHandle handle, + vmk_SgComponentArray **sgComponent, + vmk_uint32 maxLength); + /* *********************************************************************** * vmk_SgAllocWithInit-- */ /** @@ -392,6 +593,28 @@ VMK_ReturnStatus vmk_SgInit(vmk_SgOpsHandle handle, VMK_ReturnStatus vmk_SgFree(vmk_SgOpsHandle handle, vmk_SgArray *sgArray); + +/* + *********************************************************************** + * vmk_SgComponentFree -- */ /** + * + * \ingroup ScatterGather + * \brief Free a scatter-gather component array. + * + * \note This function will not block. + * + * \param[in] handle Opaque scatter-gather component ops handle. + * \param[in] sgComponentArray Pointer returned by + * vmk_SgAllocComponentArray(). + * + * \retval VMK_OK The array was freed. + * \retval VMK_BAD_PARAM The handle is invalid. + *********************************************************************** + */ +VMK_ReturnStatus vmk_SgComponentFree( + vmk_SgComponentOpsHandle handle, + vmk_SgComponentArray *sgComponentArray); + /* *********************************************************************** * vmk_SgCopyData -- */ /** @@ -466,6 +689,21 @@ VMK_ReturnStatus vmk_SgFindPosition(vmk_SgArray *sgArray, */ vmk_ByteCount vmk_SgGetDataLen(vmk_SgArray *sgArray); +/* + *********************************************************************** + * vmk_GetSgComponentDataLen -- */ /** + * + * \ingroup ScatterGather + * \brief Compute the size of a scatter-gather component list's + * payload in bytes. + * + * \note This function will not block. + * + *********************************************************************** + */ +vmk_ByteCount vmk_SgComponentGetDataLen( + vmk_SgComponentArray *sgComponentArray); + /* *********************************************************************** * vmk_SgCopyTo-- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_spinlock.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_spinlock.h index 0739715..2b4569d 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_spinlock.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_spinlock.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010-2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -13,6 +13,14 @@ * \addtogroup Core * @{ * \defgroup SpinLocks Spin Locks + * + * \par Lock acquisition behavior for lock types VMK_SPINLOCK and + * VMK_SPINLOCK_RW:\n + * In the case of lock contention, locks of types VMK_SPINLOCK and + * VMK_SPINLOCK_RW will spin for a short amount of time. If the lock + * acquisition does not succeed during the spinning phase, the lock acquisition + * function will block. + * * @{ * ****************************************************************************** @@ -34,9 +42,6 @@ /** Invalid lock rank */ #define VMK_SPINLOCK_RANK_INVALID (0) -/** Invalid lock irql */ -#define VMK_SPINLOCK_IRQL_INVALID ((vmk_LockIRQL)-1) - /** Lock rank for unranked locks */ #define VMK_SPINLOCK_UNRANKED (0xFFFF) @@ -48,16 +53,17 @@ typedef struct vmk_LockInt *vmk_Lock; /** - * Spinlock Types + * \brief Spinlock Types + * @{ */ -typedef enum vmk_SpinlockType { - /** Spinlock usable from a world context */ - VMK_SPINLOCK = 1, - /** Spinlock usable from a world and interrupt handler context */ - VMK_SPINLOCK_IRQ = 2, - /** RW Spinlock usable from a world context */ - VMK_SPINLOCK_RW = 3, -} vmk_SpinlockType; +typedef vmk_uint8 vmk_SpinlockType; + +/** Spinlock usable from a world context */ +#define VMK_SPINLOCK (1) +/** RW Spinlock usable from a world context */ +#define VMK_SPINLOCK_RW (3) + +/** @} */ /** @@ -65,14 +71,9 @@ typedef enum vmk_SpinlockType { */ typedef vmk_uint16 vmk_LockRank; -/** - * \brief IRQ level of a VMK_SPINLOCK_IRQ lock. - */ -typedef vmk_uint32 vmk_LockIRQL; - /** - * Spinlock Creation Properties + * \brief Spinlock Creation Properties */ typedef struct vmk_SpinlockCreateProps { /** Module ID for which the spinlock is created */ @@ -157,19 +158,26 @@ vmk_SpinlockAllocSize(vmk_SpinlockType type); ****************************************************************************** * vmk_SpinlockLock -- */ /** * - * Acquire a spinlock of type VMK_SPINLOCK + * \brief Acquire a spinlock of type VMK_SPINLOCK * * \param[in,out] lock Spinlock to be acquired * - * \return VMK_OK on success, error code otherwise - * * \note Lock checks are only executed when enabled for a given build. They * are always enabled for debug builds. * \note A caller has to release the spinlock with a subsequent call to * vmk_SpinlockUnlock * \note Callers are required to minimize the time and code that is executed * while any type of spinlock is held. - * \note This function will not block + * \note This function might block in case of lock contention + * \note The lock acquisition might not succeed if the world receives a + * VMK_DEATH_PENDING signal while it is waiting for the lock. + * + * \retval VMK_OK World acquired the lock. + * \retval VMK_DEATH_PENDING World blocked during the lock acquisition + * and awoken because the world is dying and + * being reaped by the scheduler. The caller + * is expected to return as soon as possible. + * The lock has not been acquired. * ****************************************************************************** */ @@ -178,50 +186,30 @@ VMK_ReturnStatus vmk_SpinlockLock(vmk_Lock lock); -/* - ****************************************************************************** - * vmk_SpinlockLockIRQ -- */ /** - * - * Acquire a spinlock of type VMK_SPINLOCK_IRQ - * - * \param[in,out] lock IRQ Spinlock to be acquired - * \param[out] irql Previous IRQ level of spinlock - * - * \return VMK_OK on success, error code otherwise - * - * \note Lock checks are only executed when enabled for a given build. They - * are always enabled for debug builds. - * \note A caller has to release the spinlock with a subsequent call to - * vmk_SpinlockUnlockIRQ, providing the value returned in irql. - * \note Callers are required to minimize the time and code that is executed - * while any type of spinlock is held. - * \note This function will not block. - * - ****************************************************************************** - */ - -VMK_ReturnStatus -vmk_SpinlockLockIRQ(vmk_Lock lock, - vmk_LockIRQL *irql); - - /* ****************************************************************************** * vmk_SpinlockReadLock -- */ /** * - * Acquire a spinlock of type VMK_SPINLOCK_RW for reading + * \brief Acquire a spinlock of type VMK_SPINLOCK_RW for reading * * \param[in,out] lock R/W Spinlock to be acquired * - * \return VMK_OK on success, error code otherwise - * * \note Lock checks are only executed when enabled for a given build. They * are always enabled for debug builds. * \note A caller has to release the spinlock with a subsequent call to * vmk_SpinlockReadUnlock * \note Callers are required to minimize the time and code that is executed * while any type of spinlock is held. - * \note This function will not block + * \note This function might block in case of lock contention + * \note The lock acquisition might not succeed if the world receives a + * VMK_DEATH_PENDING signal while it is waiting for the lock. + * + * \retval VMK_OK World acquired the read lock. + * \retval VMK_DEATH_PENDING World blocked during the lock acquisition + * and awoken because the world is dying and + * being reaped by the scheduler. The caller + * is expected to return as soon as possible. + * The read lock has not been acquired. * ****************************************************************************** */ @@ -234,19 +222,27 @@ vmk_SpinlockReadLock(vmk_Lock lock); ****************************************************************************** * vmk_SpinlockWriteLock -- */ /** * - * Acquire a spinlock of type VMK_SPINLOCK_RW for an exclusive write operation + * \brief Acquire a spinlock of type VMK_SPINLOCK_RW for an exclusive write + * operation * * \param[in,out] lock R/W Spinlock to be acquired * - * \return VMK_OK on success, error code otherwise - * * \note Lock checks are only executed when enabled for a given build. They * are always enabled for debug builds. * \note A caller has to release the spinlock with a subsequent call to - * vmk_SpinlockUnlock + * vmk_SpinlockWriteUnlock * \note Callers are required to minimize the time and code that is executed * while any type of spinlock is held. - * \note This function will not block + * \note This function might block in case of lock contention + * \note The lock acquisition might not succeed if the world receives a + * VMK_DEATH_PENDING signal while it is waiting for the lock. + * + * \retval VMK_OK World acquired the write lock. + * \retval VMK_DEATH_PENDING World blocked during the lock acquisition + * and awoken because the world is dying and + * being reaped by the scheduler. The caller + * is expected to return as soon as possible. + * The write lock has not been acquired. * ****************************************************************************** */ @@ -255,11 +251,90 @@ VMK_ReturnStatus vmk_SpinlockWriteLock(vmk_Lock lock); +/* + ****************************************************************************** + * vmk_SpinlockLockIgnoreDeathPending -- */ /** + * + * \brief Acquire a spinlock of type VMK_SPINLOCK + * + * \param[in,out] lock Spinlock to be acquired + * + * \note This functions should only be used by callers that must acquire a + * lock, for instance to perform clean up, even after a world has + * already received the VMK_DEATH_PENDING signal. + * \note Lock checks are only executed when enabled for a given build. They + * are always enabled for debug builds. + * \note A caller has to release the spinlock with a subsequent call to + * vmk_SpinlockUnlock + * \note Callers are required to minimize the time and code that is executed + * while any type of spinlock is held. + * \note This function might block in case of lock contention + * + ****************************************************************************** + */ + +void +vmk_SpinlockLockIgnoreDeathPending(vmk_Lock lock); + + +/* + ****************************************************************************** + * vmk_SpinlockReadLockIgnoreDeathPending -- */ /** + * + * \brief Acquire a spinlock of type VMK_SPINLOCK_RW for reading + * + * \param[in,out] lock R/W Spinlock to be acquired + * + * \note This functions should only be used by callers that must acquire a + * lock, for instance to perform clean up, even after a world has + * already received the VMK_DEATH_PENDING signal. + * \note Lock checks are only executed when enabled for a given build. They + * are always enabled for debug builds. + * \note A caller has to release the spinlock with a subsequent call to + * vmk_SpinlockReadUnlock + * \note Callers are required to minimize the time and code that is executed + * while any type of spinlock is held. + * \note This function might block in case of lock contention + * + ****************************************************************************** + */ + +void +vmk_SpinlockReadLockIgnoreDeathPending(vmk_Lock lock); + + +/* + ****************************************************************************** + * vmk_SpinlockWriteLockIgnoreDeathPending -- */ /** + * + * \brief Acquire a spinlock of type VMK_SPINLOCK_RW for an exclusive write + * operation + * + * \param[in,out] lock R/W Spinlock to be acquired + * + * \note This functions should only be used by callers that must acquire a + * lock, for instance to perform clean up, even after a world has + * already received the VMK_DEATH_PENDING signal. + * \note Lock checks are only executed when enabled for a given build. They + * are always enabled for debug builds. + * \note A caller has to release the spinlock with a subsequent call to + * vmk_SpinlockWriteUnlock + * \note Callers are required to minimize the time and code that is executed + * while any type of spinlock is held. + * \note This function might block in case of lock contention + * + ****************************************************************************** + */ + +void +vmk_SpinlockWriteLockIgnoreDeathPending(vmk_Lock lock); + + /* ****************************************************************************** * vmk_SpinlockUnlock -- */ /** * - * Release a spinlock previously acquired via vmk_SpinlockLock + * \brief Release a spinlock previously acquired via vmk_SpinlockLock * * \param[in,out] lock Spinlock to be released * @@ -276,30 +351,32 @@ vmk_SpinlockUnlock(vmk_Lock lock); /* ****************************************************************************** - * vmk_SpinlockUnlockIRQ -- */ /** + * vmk_SpinlockUnlockOutOfOrder -- */ /** * - * Release a IRQ spinlock previously acquired via vmk_SpinlockLockIRQ + * \brief Out of order release of a spinlock previously acquired via + * vmk_SpinlockLock * - * \param[in,out] lock IRQ Spinlock to be released - * \param[in] irql IRQ level of spinlock prior to locking + * \param[in,out] lock Spinlock to be released * - * \note Callers are required to release spinlocks in the reverse order in which - * they were acquired + * \note Callers are normally required to release spinlocks in the reverse + * order in which they were acquired. This function allows for out + * of order releases but this should only be done when it is known to + * be safe. This function should only be used for out of order releases; + * in all other cases vmk_SpinlockUnlock should be used. * \note This function will not block * ****************************************************************************** */ void -vmk_SpinlockUnlockIRQ(vmk_Lock lock, - vmk_LockIRQL irql); +vmk_SpinlockUnlockOutOfOrder(vmk_Lock lock); /* ****************************************************************************** * vmk_SpinlockReadUnlock -- */ /** * - * Release a R/W spinlock previously acquired via vmk_SpinlockReadLock + * \brief Release a R/W spinlock previously acquired via vmk_SpinlockReadLock * * \param[in,out] lock Spinlock to be released * @@ -314,11 +391,34 @@ void vmk_SpinlockReadUnlock(vmk_Lock lock); +/* + ****************************************************************************** + * vmk_SpinlockReadUnlockOutOfOrder -- */ /** + * + * \brief Out of order release of a R/W spinlock previously acquired via + * vmk_SpinlockReadLock + * + * \param[in,out] lock Spinlock to be released + * + * \note Callers are normally required to release spinlocks in the reverse + * order in which they were acquired. This function allows for out + * of order releases but this should only be done when it is known to + * be safe. This function should only be used for out of order releases; + * in all other cases vmk_SpinlockReadUnlock should be used. + * \note This function will not block + * + ****************************************************************************** + */ + +void +vmk_SpinlockReadUnlockOutOfOrder(vmk_Lock lock); + + /* ****************************************************************************** * vmk_SpinlockWriteUnlock -- */ /** * - * Release a R/W spinlock previously acquired via vmk_SpinlockWriteLock + * \brief Release a R/W spinlock previously acquired via vmk_SpinlockWriteLock * * \param[in,out] lock Spinlock to be released * @@ -335,9 +435,31 @@ vmk_SpinlockWriteUnlock(vmk_Lock lock); /* ****************************************************************************** - * vmk_SpinlockAssertHeldOnPCPUInt -- + * vmk_SpinlockWriteUnlockOutOfOrder -- */ /** * - * This is used by vmk_SpinlockAssertHeldOnPCPU(). VMKAPI clients should not + * \brief Out of order release of a R/W spinlock previously acquired via + * vmk_SpinlockWriteLock + * + * \param[in,out] lock Spinlock to be released + * + * \note Callers are normally required to release spinlocks in the reverse + * order in which they were acquired. This function allows for out + * of order releases but this should only be done when it is known to + * be safe. This function should only be used for out of order releases; + * in all other cases vmk_SpinlockWriteUnlock should be used. + * \note This function will not block + * + ****************************************************************************** + */ + +void +vmk_SpinlockWriteUnlockOutOfOrder(vmk_Lock lock); + +/* + ****************************************************************************** + * vmk_SpinlockAssertReaderHeldByWorldInt -- + * + * This is used by vmk_SpinlockAssertHeldByWorld(). VMKAPI clients should not * call this function directly. * * \note This function will not block @@ -347,29 +469,74 @@ vmk_SpinlockWriteUnlock(vmk_Lock lock); /** \cond nodoc */ void -vmk_SpinlockAssertHeldOnPCPUInt(vmk_Lock lock); +vmk_SpinlockAssertReaderHeldByWorldInt(vmk_Lock lock); /** \endcond */ /* ****************************************************************************** - * vmk_SpinlockAssertHeldOnPCPU -- */ /** + * vmk_SpinlockAssertReaderHeldByWorld -- */ /** * - * \brief Asserts that a lock is held on the current PCPU + * \brief Asserts that a VMK_SPINLOCK_RW reader lock is held by the current world * - * \param[in] lock Lock to check + * \param[in] lock VMK_SPINLOCK_RW reader lock to check * * \note Checks are only executed on debug builds. + * \note This function should only be called with a lock of lock type + * VMK_SPINLOCK_RW which is holding a VMK_SPINLOCK_RW reader lock. * \note This function will not block * ****************************************************************************** */ static VMK_ALWAYS_INLINE void -vmk_SpinlockAssertHeldOnPCPU( +vmk_SpinlockAssertReaderHeldByWorld( vmk_Lock lock) { #ifdef VMX86_DEBUG - vmk_SpinlockAssertHeldOnPCPUInt(lock); + vmk_SpinlockAssertReaderHeldByWorldInt(lock); +#endif +} + +/* + ****************************************************************************** + * vmk_SpinlockAssertHeldByWorldInt -- + * + * This is used by vmk_SpinlockAssertHeldByWorld(). VMKAPI clients should not + * call this function directly. + * + * \note This function will not block + * + ****************************************************************************** + */ + +/** \cond nodoc */ +void +vmk_SpinlockAssertHeldByWorldInt(vmk_Lock lock); +/** \endcond */ + +/* + ****************************************************************************** + * vmk_SpinlockAssertHeldByWorld -- */ /** + * + * \brief Asserts that a lock is held by the current world + * + * \param[in] lock Lock to check + * + * \note Checks are only executed on debug builds. + * \note This function should only be called with a lock of lock type + * VMK_SPINLOCK or VMK_SPINLOCK_RW (RW locks that are writer locks only). + * For reader locks, use vmk_SpinlockAssertReaderHeldByWorld(). + * \note This function will not block + * + ****************************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_SpinlockAssertHeldByWorld( + vmk_Lock lock) +{ +#ifdef VMX86_DEBUG + vmk_SpinlockAssertHeldByWorldInt(lock); #endif } diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_spinlock_deprecated.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_spinlock_deprecated.h new file mode 100644 index 0000000..a743836 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_spinlock_deprecated.h @@ -0,0 +1,193 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ****************************************************************************** + * Spin Locks */ /** + * + * \addtogroup Core + * @{ + * \addtogroup SpinLocks + * @{ + * \defgroup Deprecated Deprecated APIs + * @{ + * + ****************************************************************************** + */ + +#ifndef _VMKAPI_SPINLOCK_DEPRECATED_H_ +#define _VMKAPI_SPINLOCK_DEPRECATED_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** Invalid lock irql */ +#define VMK_SPINLOCK_IRQL_INVALID ((vmk_LockIRQL)-1) + + +/** + * \brief Spinlock Types + * @{ + */ + +/** Spinlock usable from a world and interrupt handler context */ +#define VMK_SPINLOCK_IRQ (2) + +/** @} */ + + +/** + * \brief IRQ level of a VMK_SPINLOCK_IRQ lock. + */ +typedef vmk_uint32 vmk_LockIRQL; + + +/* + ****************************************************************************** + * vmk_SpinlockLockIRQ -- */ /** + * + * \brief Acquire a spinlock of type VMK_SPINLOCK_IRQ + * + * \deprecated + * + * \param[in,out] lock IRQ Spinlock to be acquired + * \param[out] irql Previous IRQ level of spinlock + * + * \return VMK_OK on success, error code otherwise + * + * \note Lock checks are only executed when enabled for a given build. They + * are always enabled for debug builds. + * \note A caller has to release the spinlock with a subsequent call to + * vmk_SpinlockUnlockIRQ, providing the value returned in irql. + * \note Callers are required to minimize the time and code that is executed + * while any type of spinlock is held. + * \note This function will not block. + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +VMK_ReturnStatus +vmk_SpinlockLockIRQ(vmk_Lock lock, + vmk_LockIRQL *irql); + + +/* + ****************************************************************************** + * vmk_SpinlockUnlockIRQ -- */ /** + * + * \brief Release a IRQ spinlock previously acquired via vmk_SpinlockLockIRQ + * + * \deprecated + * + * \param[in,out] lock IRQ Spinlock to be released + * \param[in] irql IRQ level of spinlock prior to locking + * + * \note Callers are required to release spinlocks in the reverse order in which + * they were acquired + * \note This function will not block + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +void +vmk_SpinlockUnlockIRQ(vmk_Lock lock, + vmk_LockIRQL irql); + + +/* + ****************************************************************************** + * vmk_SpinlockUnlockIRQOutOfOrder -- */ /** + * + * \brief Out of order release of a IRQ spinlock previously acquired via + * vmk_SpinlockLockIRQ + * + * \deprecated + * + * \param[in,out] lock IRQ Spinlock to be released + * \param[in] irql IRQ level of spinlock prior to locking + * + * \note Callers are normally required to release spinlocks in the reverse + * order in which they were acquired. This function allows for out + * of order releases but this should only be done when it is known to + * be safe. This function should only be used for out of order releases; + * in all other cases vmk_SpinlockUnlockIRQ should be used. + * \note This function will not block + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +void +vmk_SpinlockUnlockIRQOutOfOrder(vmk_Lock lock, + vmk_LockIRQL irql); + + +/* + ****************************************************************************** + * vmk_SpinlockAssertHeldOnPCPUInt -- + * + * This is used by vmk_SpinlockAssertHeldOnPCPU(). VMKAPI clients should not + * call this function directly. + * + * \deprecated + * + * \note This function will not block + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +/** \cond nodoc */ +void +vmk_SpinlockAssertHeldOnPCPUInt(vmk_Lock lock); +/** \endcond */ + + +/* + ****************************************************************************** + * vmk_SpinlockAssertHeldOnPCPU -- */ /** + * + * \brief Asserts that a lock is held on the current PCPU + * + * \deprecated + * + * \param[in] lock Lock to check + * + * \note Checks are only executed on debug builds. + * \note This function should only be called with a lock of lock type + * VMK_SPINLOCK_IRQ + * \note This function will not block + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_SpinlockAssertHeldOnPCPU( + vmk_Lock lock) +{ +#ifdef VMX86_DEBUG + vmk_SpinlockAssertHeldOnPCPUInt(lock); +#endif +} + +#endif +/** @} */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_user.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_user.h index bb95f85..44a3838 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_user.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/core/vmkapi_user.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010-2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -26,6 +26,171 @@ #endif /** \endcond never */ + +/* + *********************************************************************** + * vmk_UserMapCallback -- */ /** + * + * \brief Callback function invoked when user mapping is released. + * + * \param[in] callbackParam Opaque parameter for callback function. + * + *********************************************************************** + */ +typedef void (*vmk_UserMapCallback)(void *); + + +/** + * \brief Properties of a vmk_UserMap() map request. + */ +typedef struct vmk_UserMapProps { + /** \brief Module ID of module requesting mapping. */ + vmk_ModuleID moduleID; + /** \brief Function to call when mapping is released. */ + vmk_UserMapCallback callbackFunction; + /** \brief Opaque parameter for callbackFunction. */ + vmk_AddrCookie callbackParam; + /** + * \brief Pointer to map request structure. + * + * \note See Mapping section for description + * of map request structure. + */ + vmk_MapRequest *mapRequest; +} vmk_UserMapProps; + + +/* + *********************************************************************** + * vmk_UserMap -- */ /** + * + * \brief Map the provided request into a contiguous virtual address + * space of current user world. + * + * \note The only supported mapping attributes are READONLY, READWRITE, + * WRITECOMBINE, and UNCACHED. Any other attribute will cause + * mapping to fail with return status VMK_BAD_PARAM. + * + * \param[in] props Properties of this mapping request. + * \param[in,out] vaddr Pointer to virtual address of mapping + * (non-zero to specify a virtual address, + * or zero for default address). + * + * \retval VMK_OK Map is successful. + * \retval VMK_BAD_PARAM Input parameter is invalid. + * \retval VMK_NO_MEMORY Unable to allocate mapping request. + * \retval VMK_NO_RESOURCES Unable to allocate mapping request. + * \retval VMK_INVALID_ADDRESS Requested address not in map range. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserMap( + vmk_UserMapProps *props, + vmk_VA *vaddr); + +/* + *********************************************************************** + * vmk_UserUnmap -- */ /** + * + * \brief Unmap user world virtual address space mapped by vmk_UserMap(). + * + * \param[in] vaddr Virtual address to unmap. + * \param[in] length Length of address space in bytes. + * + * \retval VMK_OK Unmap is successful. + * \retval VMK_NOT_FOUND Virtual address and length not mapped. + * \retval VMK_INVALID_ADDRESS Requested address is not page aligned. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserUnmap( + vmk_VA vaddr, + vmk_ByteCount length); + +/* + *********************************************************************** + * vmk_UserAddValidMPNRange -- */ /** + * + * \brief Indicate a range of consecutive MPNs can be referenced by + * user worlds. + * + * \param[in] mpn First MPN in range. + * \param[in] numPages Number of machine pages in range. + * + * \retval VMK_OK MPNs added to user worlds. + * \retval VMK_BAD_PARAM Input parameter is invalid. + * \retval VMK_NO_MEMORY Unable to allocate memory for request. + * \retval VMK_INVALID_PAGE_NUMBER MPN range intersects with existing + * MPN range. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserAddValidMPNRange( + vmk_MPN mpn, + vmk_uint32 numPages); + +/* + *********************************************************************** + * vmk_UserRemoveValidMPNRange -- */ /** + * + * \brief Remove a range of consecutive MPNs from user worlds. + * + * \param[in] mpn First MPN in range. + * \param[in] numPages Number of machine pages in range. + * + * \retval VMK_OK MPNs removed from user worlds. + * \retval VMK_NOT_FOUND MPN range not found. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserRemoveValidMPNRange( + vmk_MPN mpn, + vmk_uint32 numPages); + +/* + *********************************************************************** + * vmk_UserPinPage -- */ /** + * + * \brief Marks the VPN in the specified world as not swappable. + * + * \param[in] worldID ID of world whose mapping will be pinned. + * \param[in] vpn VPN to pin. + * \param[out] mpn MPN backing this pinned VPN. + * + * \retval VMK_OK VPNs was pinned successfully. + * \retval VMK_BAD_PARAM An invalid argument was provided. + * \retval VMK_INVALID_WORLD An invalid worldID was provided. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserPinPage( + vmk_WorldID worldID, + vmk_VPN vpn, + vmk_MPN *mpn); + +/* + *********************************************************************** + * vmk_UserUnpinPage -- */ /** + * + * \brief Marks the specified VPN in the specified world as swappable. + * + * \note This VPN must have been pinned by a call to vmk_UserPinPage(). + * + * \param[in] worldID ID of world whose mapping will be + * unpinned. + * \param[in] vpn VPN to unpin. + * + * \retval VMK_OK VPNs was unpinned successfully. + * \retval VMK_BAD_PARAM An invalid argument was provided. + * \retval VMK_INVALID_WORLD An invalid worldID was provided. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserUnpinPage( + vmk_WorldID worldID, + vmk_VPN vpn); + + /* ****************************************************************************** * vmk_CopyFromUser -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_pci.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_pci.h new file mode 100644 index 0000000..276e7ba --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_pci.h @@ -0,0 +1,701 @@ +/* ********************************************************** + * Copyright 1998 - 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + * Please consult with the VMKernel hardware and core teams before making any + * binary incompatible changes to this file! + */ + +/* + *********************************************************************** + * PCI */ /** + * \addtogroup Device + * @{ + * \defgroup PCI PCI + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_PCI_H_ +#define _VMKAPI_PCI_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "device/vmkapi_vector.h" + +#define VMK_PCI_BUS_NAME "pci" + +/** \brief Maximum number of characters in a PCI device name. */ +#define VMK_PCI_DEVICE_NAME_LENGTH 32 + +/** \brief Per-system max for segments */ +#define VMK_PCI_NUM_SEGS 256 +/** \brief Per-system max for busses */ +#define VMK_PCI_NUM_BUSES 256 +/** \brief Per-bus max for slots */ +#define VMK_PCI_NUM_SLOTS 32 +/** \brief Per-slot max for functions */ +#define VMK_PCI_NUM_FUNCS 8 +/** \brief Per-device max for BARs */ +#define VMK_PCI_NUM_BARS 6 +/** \brief Per-device max for BARs on a bridge */ +#define VMK_PCI_NUM_BARS_BRIDGE 2 + +/** + * \brief PCI BAR flags. + */ +typedef enum vmk_PCIBARFlags { + VMK_PCI_BAR_FLAGS_IO = 0x1, + VMK_PCI_BAR_FLAGS_MEM_64_BITS = 0x4, + VMK_PCI_BAR_FLAGS_MEM_PREFETCHABLE = 0x8, + VMK_PCI_BAR_FLAGS_IO_MASK = 0x3, + VMK_PCI_BAR_FLAGS_MEM_MASK = 0xF, +} vmk_PCIBARFlags; + +/** + * \brief PCI device identifier. + * + */ +typedef struct vmk_PCIDeviceID { + vmk_uint16 vendorID; + vmk_uint16 deviceID; + vmk_uint16 subVendorID; + vmk_uint16 subDeviceID; + vmk_uint16 classCode; + vmk_uint16 progIFRevID; +} vmk_PCIDeviceID; + +/** + * \brief PCI device Address (SBDF). + * + */ +typedef struct vmk_PCIDeviceAddr { + vmk_uint16 seg; + vmk_uint8 bus; + vmk_uint8 dev:5; + vmk_uint8 fn:3; +} vmk_PCIDeviceAddr; + +/** + * \brief PCI device resource. + * + */ +typedef struct vmk_PCIResource { + /** \brief Resource's physical address. */ + vmk_MA start; + /** \brief Resource size in bytes. */ + vmk_ByteCount size; + /** \brief Resource flags. */ + vmk_uint64 flags; +} vmk_PCIResource; + +/** + * \brief Configuration space access types + */ +typedef enum vmk_PCIConfigAccess { + VMK_PCI_CONFIG_ACCESS_8 = 1, + VMK_PCI_CONFIG_ACCESS_16 = 2, + VMK_PCI_CONFIG_ACCESS_32 = 4 +} vmk_PCIConfigAccess; + +/* + *********************************************************************** + * vmk_PCIRemoveVF -- */ /** + * + * \ingroup PCI + * \brief Remove a PCI virtual function (VF) device. + * + * Physical function (PF) driver should carry out any operations + * required for the removal of a virtual function device, and + * unregister the virtual function device using vmk_PCIUnregisterVF(). + * + * \param[in] vf Handle to PCI VF to be removed. + * + * \retval VMK_OK Success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_PCIRemoveVF)(vmk_PCIDevice vf); + +/** + * \brief PCI virtual function (VF) device operations. + */ +typedef struct { + /** \brief Remove a PCI virtual function from the system. */ + vmk_PCIRemoveVF removeVF; +} vmk_PCIVFDeviceOps; + +/** + *********************************************************************** + * vmk_PCIQueryDeviceID -- */ /** + * + * \ingroup PCI + * \brief Query PCI Device's identifier information. + * + * Upon successful completion, devID structure is filled with the + * identifier information. + * + * \param[in] pciDevice Pointer to PCI device handle. + * \param[out] devID Pointer to PCI Device ID struct. + * + * \retval VMK_BAD_PARAM pciDevice or devID is invalid. + * \retval VMK_OK Query successfully processed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIQueryDeviceID(vmk_PCIDevice pciDevice, + vmk_PCIDeviceID *devID); + +/** + *********************************************************************** + * vmk_PCIQueryDeviceAddr -- */ /** + * + * \ingroup PCI + * \brief Query PCI Device's Address (SBDF) information. + * + * Upon successful operation, sbdf struct is filled with device's + * seg, bus, dev, fn information. + * + * \param[in] pciDevice Pointer to PCI device handle. + * \param[out] sbdf Pointer to PCI Device Addr struct. + * + * \retval VMK_BAD_PARAM pciDevice or sbdf is invalid. + * \retval VMK_OK Query successfully processed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIQueryDeviceAddr(vmk_PCIDevice pciDevice, + vmk_PCIDeviceAddr *sbdf); + +/** + *********************************************************************** + * vmk_PCIQueryIOResources -- */ /** + * + * \ingroup PCI + * \brief Query PCI Device's BAR resources information. + * + * Upon successful completion, resources array is filled with device's + * first numBars BARs [0 - numBars) information. The resources array + * passed in should be able to hold numBars resources. + * + * \param[in] pciDevice Pointer to PCI device handle. + * \param[in] numBars Number of resources queried. + * \param[out] resources Pointer to PCI resources array. + * + * \retval VMK_BAD_PARAM pciDevice or resources is invalid. + * \retval VMK_BAD_PARAM numBars is greater than VMK_PCI_NUM_BARS + * \retval VMK_OK Query successfully processed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIQueryIOResources(vmk_PCIDevice pciDevice, + vmk_uint8 numBars, + vmk_PCIResource resources[]); + +/* + *********************************************************************** + * vmk_PCIFindCapability -- */ /** + * + * \ingroup PCI + * \brief Returns the offset of the capability in device's config space. + * + * \param[in] device PCI device handle + * \param[in] capID Capability ID of interest + * \param[out] capOffset Pointer to the capability offset + * + * \retval VMK_BAD_PARAM If capOffset is NULL or device handle is invalid + * \retval VMK_NOT_FOUND capability is not found + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIFindCapability(vmk_PCIDevice device, + vmk_uint8 capID, + vmk_uint16 *capOffset); + +/* + *********************************************************************** + * vmk_PCIReadConfig -- */ /** + * + * \ingroup PCI + * \brief Read config space of device at offset. + * + * \param[in] moduleID Module performing the config read. + * \param[in] device PCI device handle. + * \param[in] accessType Access 1, 2 or 4 bytes. + * \param[in] offset Offset to read. + * \param[out] data Pointer to the data read. + * + * \note Offset is expected to meet the alignment requirements of the + * specified access type. + * + * \retval VMK_BAD_PARAM Device handle is NULL/invalid. + * \retval VMK_BAD_PARAM Data pointer is NULL. + * \retval VMK_BAD_PARAM Offset is not aligned for the access type. + * \retval VMK_BAD_PARAM AccessType is not a valid access type. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * \retval VMK_LIMIT_EXCEEDED Offset is beyond available config space. + * \retval VMK_FAILURE Failure to access config space. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIReadConfig(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_PCIConfigAccess accessType, + vmk_uint16 offset, + vmk_uint32 *data); + +/* + *********************************************************************** + * vmk_PCIWriteConfig -- */ /** + * + * \ingroup PCI + * \brief Write data to config space of device at offset. + * + * \param[in] moduleID Module performing the config write. + * \param[in] device PCI device handle. + * \param[in] accessType Access 1, 2 or 4 bytes. + * \param[in] offset Offset to write at. + * \param[in] data Data to write. + * + * \note Offset is expected to meet the alignment requirements of the + * specified access type. + * + * \retval VMK_BAD_PARAM Device handle is NULL/invalid. + * \retval VMK_BAD_PARAM Offset is not aligned for the access type. + * \retval VMK_BAD_PARAM AccessType is not a valid access type. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * \retval VMK_LIMIT_EXCEEDED Offset is beyond available config space. + * \retval VMK_FAILURE Failure to access config space. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIWriteConfig(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_PCIConfigAccess accessType, + vmk_uint16 offset, + vmk_uint32 data); + +/* + *********************************************************************** + * vmk_PCIMapIOResource -- */ /** + * + * \ingroup PCI + * \brief Reserve and map PCI IO/Memory space described by pciBar. + * + * Reserves the specified BAR with resource manager and maps the memory + * described by pciBar to a virtual address. + * + * \param[in] moduleID Module requesting the resource. + * \param[in] device PCI device handle. + * \param[in] pciBar PCI bar to map, must be [0 - 5]. + * \param[out] reservation IOReservation handle. Only necessary for + * VMK_PCI_BAR_FLAGS_IO type BARs. + * \param[out] mappedAddress Pointer to hold the virtual address of + * the mapping. + * + * \retval VMK_BAD_PARAM Device handle is NULL/invalid + * \retval VMK_BAD_PARAM PciBar is invalid + * \retval VMK_BAD_PARAM reservation is NULL for PIO BAR + * \retval VMK_BAD_PARAM MappedAddres is NULL + * \retval VMK_NO_RESOURCES Resource is not owned by device + * \retval VMK_NO_PERMISSION Device is not owned by module + * \retval VMK_BAD_PARAM PciBar is 2nd half of 64-bit MMIO BAR + * \retval VMK_BAD_PARAM PciBar addr/size too big for 32-bit MPN + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIMapIOResource(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_uint8 pciBar, + vmk_IOReservation *reservation, + vmk_VA *mappedAddress); + +/* + *********************************************************************** + * vmk_PCIUnmapIOResource -- */ /** + * + * \ingroup PCI + * \brief Unmap and release the established PCI IO/Memory mapping. + * + * Upon successful return from the call, the mapping is no longer valid. + * + * \param[in] moduleID Module requested the resource. + * \param[in] device PCI device handle. + * \param[in] pciBar PCI bar to unmap. + * + * \retval VMK_BAD_PARAM Device handle is NULL/invalid + * \retval VMK_BAD_PARAM PciBar is invalid + * \retval VMK_BAD_PARAM Resource is not mapped + * \retval VMK_NO_PERMISSION Device is not owned by module + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIUnmapIOResource(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_uint8 pciBar); + +/** + * Interrupt related functions. + * + * Driver should first allocate interrupt(s), register and enable the + * interrupt(s). + */ + +/* + *********************************************************************** + * vmk_PCIAllocIntrCookie -- */ /** + * + * \ingroup PCI + * \brief Allocate interrupt resources for the specified device. + * + * On successful return, intrArray will contain the vmk_IntrCookie(s) + * representing the allocated interrupt resources. numIntrsAlloced + * will contain the number of interrupts actually allocated. + * + * \note If type is VMK_PCI_INTERRUPT_TYPE_LEGACY or type is + * VMK_PCI_INTERRUPT_TYPE_MSI then numIntrsDesired and + * numIntrsRequired must both be set to 1. + * \note The caller must provide memory for numIntrsDesired + * vmk_IntrCookie(s) in the space referenced by intrArray. + * \note The caller can specify the index into MSIX table for the + * desired interrupts using indexAarray. indexArray can be NULL + * if the caller does not care. If non-NULL, it should specify + * index for numIntrDesired entries, and intrArray is filled + * with allocated interrupt for requested index values. + * + * \param[in] moduleID Module allocating the interrupts. + * \param[in] device PCI device handle. + * \param[in] type Interrupt type. + * \param[in] numIntrsDesired Number of interrupts desired. + * \param[in] numIntrsRequired Number of interrupts required. + * \param[in] indexArray Array of MSIX table index. + * \param[out] intrArray Array of interrupts allocated. + * \param[out] numIntrsAlloced Number of interrupts allocated. + * + * \retval VMK_BAD_PARAM props argument is NULL. + * \retval VMK_BAD_PARAM Device handle is invalid/NULL. + * \retval VMK_BAD_PARAM Device is not interruptive. + * \retval VMK_BAD_PARAM type is VMK_INTERRUPT_TYPE_PCI_LEGACY + * the ioapic pin the device is connected + * to is not described in interrupt + * routing tables. + * \retval VMK_BAD_PARAM type is VMK_INTERRUPT_TYPE_PCI_LEGACY + * or VMK_INTERRUPT_TYPE_PCI_MSI and + * numIntrsDesired or numIntrsRequired + * is not equal to 1. + * \retval VMK_BAD_PARAM type is VMK_INTERRUPT_TYPE_PCI_MSIX and + * numIntrsAlloced is NULL. + * \retval VMK_BAD_PARAM type is VMK_INTERRUPT_TYPE_PCI_MSIX and + * numIntrsRequired > numIntrsDesired + * \retval VMK_BAD_PARAM All other mal-formed props. + * \retval VMK_NO_MEMORY Internal memory allocation failure + * \retval VMK_NOT_SUPPORTED Device/platform doesn't support MSI or + * MSIX if request is for MSI or MSIX type + * \retval VMK_NO_PERMISSION Device is not owned by module + * \retval VMK_IO_ERROR PCI Bus error, probably device is + * broken or unplugged + * \retval VMK_NO_RESOURCES For MSIX type, the number of interrupts + * available is less than numIntrsRequired. + * \retval VMK_FAILIURE All other errors. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIAllocIntrCookie(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_PCIInterruptType type, + vmk_uint32 numIntrsDesired, + vmk_uint32 numIntrsRequired, + vmk_uint16 *indexArray, + vmk_IntrCookie *intrArray, + vmk_uint32 *numIntrsAlloced); + +/* + *********************************************************************** + * vmk_PCIFreeIntrCookie -- */ /** + * + * \ingroup PCI + * \brief Free all interrupts that were previously allocated by a call + * to vmk_PCIAllocIntrCookie(). + * + * \param[in] moduleID Module that allocated the interrupts + * \param[in] device PCI device handle + * + * \retval VMK_BAD_PARAM Module ID is invalid. + * \retval VMK_BAD_PARAM Device handle is invalid/NULL. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIFreeIntrCookie(vmk_ModuleID moduleID, + vmk_PCIDevice device); + +/* + *********************************************************************** + * vmk_PCIEnableVFs -- */ /** + * + * \ingroup PCI + * \brief Enable virtual functions in an SR-IOV physical function. + * + * numVFs is the number of virtual functions to be enabled. Setting it to + * zero requests that all virtual functions (VFs) under the given physical + * function (PF) be enabled. The actual number of VFs successfully enabled + * is returned in numVFs upon success. + * + * \note For a native PF driver, this function must be called from the + * driver's vmk_DriverAttachDevice() callback. This will ensure VFs are + * enabled before the driver receives the vmk_DriverScanDevice() callback, + * and also prevent VFs from being re-enabled if the PF is quiesced + * and re-started. + * + * \note This function creates a vmk_PCIDevice handle for each VF. The + * handle of each VF can be retrieved via the function + * vmk_PCIGetVFPCIDevice(). + * + * \param[in] pf PCI device handle of the SR-IOV PF. + * \param[in,out] numVFs Number of VFs to enable/enabled. + * + * \retval VMK_BAD_PARAM Device handle is invalid or device does not exist. + * \retval VMK_FAILURE Cannot enable virtual functions. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIEnableVFs(vmk_PCIDevice pf, + vmk_uint16 *numVFs); + +/* + *********************************************************************** + * vmk_PCIDisableVFs -- */ /** + * + * \ingroup PCI + * \brief Disable all virtual functions in an SR-IOV physical function. + * + * \note For a native PF driver, this function must be called from the + * driver's vmk_DriverDetachDevice() callback. This will ensure that + * all virtual functions (VFs) being disabled have been un-registered + * with the vmkkernel's device layer (i.e., unregistration occurs in the + * PF driver's VF remove callback which occurs prior to + * vmkDriverDetachDevice()). In addition, this will also prevent VFs from + * being disabled if the PF is quiesced. + * + * \param[in] pf PCI device handle of physical function (PF). + * + * \retval VMK_BAD_PARAM Device handle is invalid or device does not exist. + * \retval VMK_FAILURE Device is not in SR-IOV mode. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIDisableVFs(vmk_PCIDevice pf); + +/* + *********************************************************************** + * vmk_PCIGetVFPCIDevice -- */ /** + * + * \ingroup PCI + * \brief Retrieves the PCI device handle of a virtual function (VF). + * + * \note This function should only be called on enabled VFs (see + * vmk_PCIEnableVF()). + * + * \param[in] pf PCI device handle of the parent physical function. + * \param[in] vfIndex Index of the virtual function. + * \param[out] vf PCI device handle of the requested virtual function. + * + * \retval VMK_BAD_PARAM PF device handle is invalid or device does not exist. + * \retval VMK_BAD_PARAM VF device handle argument is NULL. + * \retval VMK_NOT_FOUND VF doesn't exist. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIGetVFPCIDevice(vmk_PCIDevice pf, + vmk_uint16 vfIndex, + vmk_PCIDevice *vf); + +/* + *********************************************************************** + * vmk_PCIGetPFPCIDevice -- */ /** + * + * \ingroup PCI + * \brief Retrieve the PCI device handle of a PF, given the VF handle. + * + * \param[in] vf PCI device handle of the virtual function. + * \param[out] pf PCI device handle of the parent physical function. + * + * \retval VMK_BAD_PARAM VF device handle is invalid or device does not exist. + * \retval VMK_BAD_PARAM PF device handle argument is NULL. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIGetPFPCIDevice(vmk_PCIDevice vf, vmk_PCIDevice *pf); + +/* + ************************************************************************ + * vmk_PCIRegisterVF -- */ /** + * + * \ingroup PCI + * \brief Register virtual functions with the vmkernel's device layer. + * + * The devOps parameter is the vmk_DeviceOps structure associated with the + * registered virtual function (VF). + * + * \note This function is meant to be used by native PF drivers only. + * Since this function registers a VF with the vmkernel's device layer, + * all restrictions associated with device registration apply. + * + * \note Before this call returns, the vmkernel's device layer may attach + * the VF to a driver. + * + * \param[in] vf PCI device handle of the VF to be registered. + * \param[in] pf PCI device handle of the parent PF. + * \param[in] pfDriverHandle PF driver handle. + * \param[in] vfDevOps Device operations associated with a registered VF. + * + * \retval VMK_BAD_PARAM VF device handle is invalid. + * \retval VMK_BAD_PARAM PF device handle is invalid. + * \retval VMK_FAILURE VF registration failed. + * + ************************************************************************ + */ +VMK_ReturnStatus +vmk_PCIRegisterVF(vmk_PCIDevice vf, + vmk_PCIDevice pf, + vmk_Driver pfDriverHandle, + vmk_PCIVFDeviceOps *vfDevOps); + +/* + ************************************************************************ + * vmk_PCIUnregisterVF -- */ /** + * + * \ingroup PCI + * \brief Unregister a virtual function from the vmkernel's device layer. + * + * \note Since this function unregisters a virtual function (VF) with the + * vmkernel's device layer, all restrictions associated with device + * unregistration apply (unregistration of the VF must be done + * by the physical function driver from the vmk_DeviceRemove function in the + * vmk_DeviceOps passed during VF registration). + * + * \param[in] vf PCI device handle of the VF to be unregistered. + * + * \retval VMK_BAD_PARAM VF device handle is invalid. + * \retval VMK_FAILURE VF unregistration failed. + * + ************************************************************************* + */ +VMK_ReturnStatus +vmk_PCIUnregisterVF(vmk_PCIDevice vf); + +/* + ************************************************************************* + * vmk_PCISetVFPrivateData -- */ /** + * + * \ingroup PCI + * \brief Associate private data with a virtual function. + * + * Associates a pointer to the given user-defined private data with the + * given virtual function (VF). The pointer may retrieved via the + * function vmk_PCIGetVFPrivateData(). This provides a mechanism by which + * vmkernel components, typically a PF driver and a VF driver, can exchange + * private data. + * + * \param[in] vf PCI device handle of the VF. + * \param[in] privateData User-defined private data. + * + * \retval VMK_BAD_PARAM VF device handle is invalid. + * + ************************************************************************ + */ +VMK_ReturnStatus +vmk_PCISetVFPrivateData(vmk_PCIDevice vf, + vmk_AddrCookie privateData); + +/* + ************************************************************************* + * vmk_PCIGetVFPrivateData -- */ /** + * + * \ingroup PCI + * \brief Retrieve private data associated with a virtual function. + * + * Retrieves a pointer to the user-defined private data associated with + * the given virtual function (VF). See the description of + * vmk_PCISetVFPrivateData() for further details. + * + * \param[in] vf PCI device handle of the VF. + * \param[out] privateData User-defined private data. + * + * \retval VMK_BAD_PARAM VF device handle is invalid. + * \retval VMK_BAD_PARAM privateData pointer is NULL. + * + ************************************************************************ + */ +VMK_ReturnStatus +vmk_PCIGetVFPrivateData(vmk_PCIDevice vf, + vmk_AddrCookie *privateData); + +/* + *********************************************************************** + * vmk_PCIEnablePME -- */ /** + * + * \ingroup PCI + * \brief Enable PME# generation. + * + * Enable PME# generation if the device is capable of asserting + * the PME# signal from any of the power states. + * + * \param[in] moduleID Module requesting the operation. + * \param[in] device PCI device handle. + * + * \retval VMK_BAD_PARAM Module ID is invalid. + * \retval VMK_BAD_PARAM Device handle is NULL/invalid. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * \retval VMK_NOT_SUPPORTED Device has no PM capability. + * \retval VMK_NOT_SUPPORTED Device doesn't support PME# generation + * from any power state. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIEnablePME(vmk_ModuleID moduleID, + vmk_PCIDevice device); + +/* + *********************************************************************** + * vmk_PCIDisablePME -- */ /** + * + * \ingroup PCI + * \brief Disable PME# generation. + * + * Disable PME# generation if the device is capable of asserting + * the PME# signal from any of the power states. + * + * \param[in] moduleID Module requesting the operation. + * \param[in] device PCI device handle. + * + * \retval VMK_BAD_PARAM Module ID is invalid. + * \retval VMK_BAD_PARAM Device handle is NULL/invalid. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * \retval VMK_NOT_SUPPORTED Device has no PM capability. + * \retval VMK_NOT_SUPPORTED Device doesn't support PME# generation + * from any power state. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIDisablePME(vmk_ModuleID moduleID, + vmk_PCIDevice device); + +#endif /* _VMKAPI_PCI_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_pci_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_pci_types.h index 66eac7f..ed541c7 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_pci_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_pci_types.h @@ -42,7 +42,7 @@ typedef enum vmk_PCIInterruptType { /** * \brief Opaque PCI device handle */ -typedef struct vmk_PCIDeviceInt *vmk_PCIDevice; +typedef struct vmkPCIDevice *vmk_PCIDevice; #endif diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_psa_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_psa_types.h new file mode 100644 index 0000000..c8818fa --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_psa_types.h @@ -0,0 +1,37 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + + +/* + *********************************************************************** + * PSA */ /** + * \addtogroup Device + * @{ + * \defgroup PSA PSA Driver Interfaces + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_PSA_H_ +#define _VMKAPI_PSA_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** \brief PSA Device Identifier */ +#define VMK_SCSI_PSA_DRIVER_BUS_ID "com.vmware.HBAPort" +/** \brief PSA VPORT Device Identifier */ +#define VMK_SCSI_PSA_DRIVER_VPORT_BUS_ID "com.vmware.Virtual_HBAPort" + +#endif /* _VMKAPI_PSA_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_vector.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_vector.h new file mode 100644 index 0000000..21a8c84 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_vector.h @@ -0,0 +1,191 @@ +/* ********************************************************** + * Copyright 2008 - 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * Please consult with the VMKernel hardware and core teams before making any + * binary incompatible changes to this file! + */ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Vector */ /** + * \addtogroup Device + * @{ + * \defgroup Vector Interrupt Interfaces + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_VECTOR_H_ +#define _VMKAPI_VECTOR_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** \brief Interrupt is an entropy source. + * + * Set this if device interrupts contributes to entropy pool. + */ +#define VMK_INTR_ATTRS_ENTROPY_SOURCE (1 << 0) + +/** + * \brief Properties for registering the interrupt. + */ +typedef struct vmk_IntrProps { + /** \brief Device registering the interrupt. */ + vmk_Device device; + /** \brief Name of the device registering the interrupt. */ + vmk_Name deviceName; + /** \brief Interrupt acknowledging function */ + vmk_IntrAcknowledge acknowledgeInterrupt; + /** \brief Interrupt handler function. */ + vmk_IntrHandler handler; + /** \brief Interrupt handler client data. */ + void *handlerData; + /** \brief Interrupt attributes. + * + * Interrupt attributes can be used to specify special attributes + * for a interrupt. + */ + vmk_uint64 attrs; +} vmk_IntrProps; + +/** \brief Function to invoke with interrupts disabled. */ +typedef void (*vmk_IntrDisabledFunc)(vmk_AddrCookie data); + +/* + *********************************************************************** + * vmk_IntrRegister -- */ /** + * + * \ingroup Vector + * \brief Register the interrupt with the system. + * + * \note Interrupt sharing is implicitly allowed for level-triggered + * interrupts. + * + * \param[in] moduleID Module registering the interrupt + * \param[in] intrCookie Interrupt cookie to register + * \param[in] props Properties of the interrupt being registered + * + * \retval VMK_BAD_PARAM props is NULL or mal-formed props + * \retval VMK_BAD_PARAM intrCookie is not valid + * \retval VMK_BAD_PARAM Null props->handlerData is specified for + * shared interrupt. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_IntrRegister(vmk_ModuleID moduleID, + vmk_IntrCookie intrCookie, + vmk_IntrProps *props); + +/* + *********************************************************************** + * vmk_IntrUnregister -- */ /** + * + * \ingroup Vector + * \brief Unregister a previously registered interrupt. + * + * \param[in] moduleID Module that registered interrupt before + * \param[in] intrCookie Interrupt to unregister + * \param[in] handlerData Interrupt handler data that was used while + * registering the interrupt + * + * \retval VMK_BAD_PARAM moduleID is not valid. + * \retval VMK_BAD_PARAM intrCookie is not valid. + * \retval VMK_BAD_PARAM If handlerData is NULL and the interrupt is + * shared. + * \retval VMK_FAILURE handlerData doesn't match with what's + * provided with vmk_IntrRegister(). + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_IntrUnregister(vmk_ModuleID moduleID, + vmk_IntrCookie intrCookie, + void *handlerData); + +/* + *********************************************************************** + * vmk_IntrEnable -- */ /** + * + * \ingroup Vector + * \brief Start interrupt delivery. Kernel starts calling interrupt + * handlers registered for this interrupt. + * + * \note The interrupt is unmasked if needed. + * + * \param[in] intrCookie Interrupt that has to be started. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_IntrEnable(vmk_IntrCookie intrCookie); + +/* + *********************************************************************** + * vmk_IntrDisable -- */ /** + * + * \ingroup Vector + * \brief Stops interrupt delivery. + * + * \note The interrupt is masked if there are no registered handlers + * for this interrupt. + * + * \warning This API should not be used for indefinite periods for + * shared interrupts as this will block interrupts for other + * devices that may share the same interrupt line. + * + * \param[in] intrCookie Interrupt that has to be stopped. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_IntrDisable(vmk_IntrCookie intrCookie); + +/* + *********************************************************************** + * vmk_IntrSync -- */ /** + * + * \ingroup Vector + * \brief Blocks, waiting till interrupt is inactive on all CPUs. + * + * \param[in] intrCookie Interrupt to synchronize. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_IntrSync(vmk_IntrCookie intrCookie); + + +/* + *********************************************************************** + * vmk_IntrWithAllDisabledInvoke -- */ /** + * + * \ingroup Vector + * \brief Invokes a function with all interrupts disabled. + * + * \warning The function invoked is not allowed to take more than 5us. + * + * \param[in] moduleID Module implementing function to invoke. + * \param[in] func Function to invoke + * \param[in] data Data to pass to function + * + * \retval VMK_BAD_PARAM moduleID is invalid + * \retval VMK_BAD_PARAM func is invalid + * \retval VMK_OK func was invoked + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_IntrWithAllDisabledInvoke(vmk_ModuleID moduleID, + vmk_IntrDisabledFunc func, + vmk_AddrCookie data); + +#endif /* _VMKAPI_VECTOR_H_ */ +/** @} */ +/** @} */ + diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_vector_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_vector_types.h index 5234bb4..52ab45f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_vector_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/device/vmkapi_vector_types.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -26,6 +26,15 @@ #endif /** \endcond never */ +/** + * \brief Opaque handle to Interrupt. + */ +typedef vmk_uint32 vmk_IntrCookie; + +/** + * \brief Invalid interrupt. + */ +#define VMK_INVALID_INTRCOOKIE ((vmk_IntrCookie)~0) /* ****************************************************************************** @@ -45,7 +54,61 @@ */ typedef void (*vmk_InterruptHandler)(void *clientData, - vmk_uint32 vector); + vmk_IntrCookie intrCookie); + +/* + ****************************************************************************** + * vmk_IntrHandler -- */ /** + * + * \brief Interrupt callback function. + * + * \note Callback is allowed to block + * + * \param[in] handlerData Callback argument specified while adding + * the handler. + * \param[in] intrCookie Interrupt cookie associated with the interrupt. + * + * \retval None + * + ****************************************************************************** + */ + +typedef void (*vmk_IntrHandler)(void *handlerData, + vmk_IntrCookie intrCookie); + +/* + ****************************************************************************** + * vmk_IntrAcknowledge -- */ /** + * + * \brief Callback function for device drivers to acknowledge an interrupt + * + * This callback is called synchronously when an interrupt fires to do device + * specific interrupt acknowledgement. The handler is expected to acknowledge + * the interrupt with the device for example through device register writes but + * nothing more. All other interrupt work should be done in the interrupt + * handler which will be called in a world context. The vmkernel will enforce a + * very short execution time of 5us for this callback. + * + * \note Callback is not allowed to block + * + * \param[in] handlerData Callback argument specified while adding + * the handler. + * \param[in] intrCookie Interrupt cookie associated with the interrupt. + * + * \retval VMK_OK Interrupt has been acknowledged and handler + * should be called. + * \retval VMK_IGNORE Interrupt was for this device and has been + * acknowledged, but handler is not needed and + * should not be called. + * \retval VMK_NOT_THIS_DEVICE Interrupt was not for this device and has not + * been acknowledged; handler should not be called. + * + ****************************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_IntrAcknowledge)(void *handlerData, + vmk_IntrCookie intrCookie); + #endif /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/dvfilter/vmkapi_dvfilter.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/dvfilter/vmkapi_dvfilter.h index bade1df..dc071d6 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/dvfilter/vmkapi_dvfilter.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/dvfilter/vmkapi_dvfilter.h @@ -738,12 +738,17 @@ typedef enum vmk_DVFilterPropertyOpsFlags { * \param[in] filter Handle to DVFilter instance data * \param[in] propName Property name * \param[in] propVal Property value - * \param[in] propLen Length of the property value in bytes + * \param[in] propLen Length of the property value in bytes * \param[in] flags Must be VMK_DVFILTER_CLIENT_OPS_NONE * Reserved for future use * * \retval VMK_OK DVFilter accepts value change of the * property on the instance + * \retval VMK_NOT_READY DVFilter cannot accept value change of the + * property on the instance. Likely due to + * temporarily invalid filter. Write will be + * called again with same data after filter + * is established. * \retval VMK_FAILURE DVFilter does not accept the value change * of the property on the instance *********************************************************************** @@ -875,6 +880,8 @@ typedef struct vmk_DVFilterPropertyOps { * \ingroup DVFilter * \brief Register a DVFilter fast path agent with the network stack. * + * \nativedriversdisallowed + * * \note This function may block. * * \param[in] name Human readable name of the agent. @@ -920,6 +927,8 @@ VMK_ReturnStatus vmk_DVFilterRegisterFastPath( * \brief Unregister a DVFilter fast path agent previously registered * by vmk_DVFilterRegisterFastPath. * + * \nativedriversdisallowed + * * \note This function may block. * * \param[in] fastPathHandle Handle to the VMkernel fast path agent. @@ -940,6 +949,8 @@ VMK_ReturnStatus vmk_DVFilterUnregisterFastPath( * \ingroup DVFilter * \brief Associate a filter with the specified slow path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * Once the association is established, packets can be forwarded to @@ -992,6 +1003,8 @@ vmk_DVFilterSetSlowPath( * \ingroup DVFilter * \brief Dissociate a filter from its slow path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * This function has no effect if the filter has no associated slow @@ -1028,6 +1041,8 @@ vmk_DVFilterClearSlowPath( * \ingroup DVFilter * \brief Allocate metadata for this packet. * + * \nativedriversdisallowed + * * \note This function will not block. * * The allocated metadata buffer can be used to store data @@ -1074,6 +1089,8 @@ VMK_ReturnStatus vmk_DVFilterPktAllocMetadata( * \ingroup DVFilter * \brief Release metadata for this packet. * + * \nativedriversdisallowed + * * \note This function will not block. * * Releases the metadata of this packet. Afterwards, the scope of @@ -1096,6 +1113,8 @@ void vmk_DVFilterPktReleaseMetadata( * \ingroup DVFilter * \brief Get pointer to metadata of this packet. * + * \nativedriversdisallowed + * * \note This function will not block. * * Gets the address of the metadata associated with this packet, @@ -1123,6 +1142,8 @@ vmk_VA vmk_DVFilterPktGetMetadata( * \brief Fault specified packets to the slow path agent associated * with the filter. * + * \nativedriversdisallowed + * * \note This function will not block. * * \note Unless the VMK_DVFILTER_FAULTING_COPY flag is used, the @@ -1157,6 +1178,8 @@ VMK_ReturnStatus vmk_DVFilterFaultPackets( * \ingroup DVFilter * \brief Inject packets in a filter. * + * \nativedriversdisallowed + * * \note This function will not block. * * Used to inject new packets, or resume processing of packets @@ -1215,6 +1238,8 @@ VMK_ReturnStatus vmk_DVFilterIssuePackets( * \ingroup DVFilter * \brief Query the human readable name of the DVFilter. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] filter Handle to the VMkernel filter object @@ -1240,6 +1265,8 @@ VMK_ReturnStatus vmk_DVFilterGetName( * \ingroup DVFilter * \brief Query the VM UUID of the VM the DVFilter is attached to. * + * \nativedriversdisallowed + * * \note This function will not block. * * \note This function may fail with VMK_INVALID_WORLD in the @@ -1273,6 +1300,8 @@ VMK_ReturnStatus vmk_DVFilterGetVMUUID( * \ingroup DVFilter * \brief Query a configuration parameter value of the DVFilter. * + * \nativedriversdisallowed + * * \note This function will not block. * * These parameters may change at any time if the fastpath op @@ -1309,6 +1338,8 @@ VMK_ReturnStatus vmk_DVFilterGetConfigParameter( * \ingroup DVFilter * \brief Get the failure policy the user configured for this filter. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] filter Handle to the VMkernel filter object. @@ -1332,6 +1363,8 @@ VMK_ReturnStatus vmk_DVFilterGetFailurePolicy( * \ingroup DVFilter * \brief Get the MTU the switch has configured for this filter * + * \nativedriversdisallowed + * * \note This function will not block. * * Value of *mtu is not defined in case the function was not successful. @@ -1366,6 +1399,8 @@ VMK_ReturnStatus vmk_DVFilterGetSwitchMTU( * \ingroup DVFilter * \brief Get the type of the filter's end-point. * + * \nativedriversdisallowed + * * \note This function will not block. * * The filter end-point might be a virtual nic of a VM, a VMkernel @@ -1394,6 +1429,8 @@ VMK_ReturnStatus vmk_DVFilterGetEndPointType( * \ingroup DVFilter * \brief Get the portID that the filter is attached to. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] filter Handle to the VMkernel filter object. @@ -1416,6 +1453,8 @@ VMK_ReturnStatus vmk_DVFilterGetPortID( * \ingroup DVFilter * \brief Get the index of the vNic this filter is attached to. * + * \nativedriversdisallowed + * * \note This function will not block. * * This function is only supported for VM endpoints. @@ -1442,6 +1481,8 @@ VMK_ReturnStatus vmk_DVFilterGetVnicIndex( * \ingroup DVFilter * \brief Set the minimum mapped packet length required by this filter. * + * \nativedriversdisallowed + * * \note This function will not block. * * The function requests new packets to have a specific @@ -1480,6 +1521,8 @@ vmk_DVFilterSetMinPktMappedLen( * \brief Send an ioctl request associated with a particular filter to * the slow path. * + * \nativedriversdisallowed + * * \note This function will not block. * * Send an ioctl request to the slow path agent associated with the @@ -1537,6 +1580,8 @@ VMK_ReturnStatus vmk_DVFilterSendFilterIoctlRequest( * \ingroup DVFilter * \brief Send an ioctl reply in filter context to the guest appliance. * + * \nativedriversdisallowed + * * \note This function will not block. * * Send an ioctl reply to the slow path agent associated with the @@ -1575,6 +1620,8 @@ VMK_ReturnStatus vmk_DVFilterSendFilterIoctlReply( * \ingroup DVFilter * \brief Send an ioctl request to a slow path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * Send an ioctl request to the slow path agent. The provided @@ -1630,6 +1677,8 @@ VMK_ReturnStatus vmk_DVFilterSendSlowPathIoctlRequest( * \ingroup DVFilter * \brief Send an ioctl reply to a slow path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * It is acceptable to send a slow path reply with a zero length. @@ -1667,6 +1716,8 @@ VMK_ReturnStatus vmk_DVFilterSendSlowPathIoctlReply( * \ingroup DVFilter * \brief Restore slow path state in the guest appliance * + * \nativedriversdisallowed + * * \note This function will not block. * * The slow path's state is sent to the slow path agent. The provided @@ -1717,6 +1768,8 @@ VMK_ReturnStatus vmk_DVFilterRestoreSlowPathState( * \ingroup DVFilter * \brief Retrieve slow path state from the guest appliance. * + * \nativedriversdisallowed + * * \note This function will not block. * * The slow path agent is asked to provide its state. The provided @@ -1763,6 +1816,8 @@ VMK_ReturnStatus vmk_DVFilterRetrieveSlowPathState( * \ingroup DVFilter * \brief Set the src port to the port this filter is installed on. * + * \nativedriversdisallowed + * * \note This function will not block. * * Set the packet source port identification field to the port @@ -1811,6 +1866,8 @@ VMK_ReturnStatus vmk_DVFilterPktSetSourcePort( * \ingroup DVFilter * \brief Allocate a packet tag for the indicated fast path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * DVFilter provides for tagging pkts as an aid in @@ -1843,6 +1900,8 @@ VMK_ReturnStatus vmk_DVFilterAllocPktTag( * \ingroup DVFilter * \brief Free all the packet tags allocated by the supplied agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * One or more pkt tags, each one bit, acquired from @@ -1863,6 +1922,8 @@ void vmk_DVFilterFreePktTags( * \ingroup DVFilter * \brief Tag the packet with the specified tag. * + * \nativedriversdisallowed + * * \note This function will not block. * * \pre The tag must belong to the supplied fast path agent. @@ -1913,6 +1974,8 @@ VMK_ReturnStatus vmk_DVFilterPktSetTags( * \ingroup DVFilter * \brief Clear a fast path's tags from a packet. * + * \nativedriversdisallowed + * * \note This function will not block. * * Clear the tag or tag bits of the pkt with respect to the @@ -1958,6 +2021,8 @@ VMK_ReturnStatus vmk_DVFilterPktClearTags( * \ingroup DVFilter * \brief Query the values of one or more bits from the pkt tag. * + * \nativedriversdisallowed + * * \note This function will not block. * * Query the tag bits set on a packet. @@ -1978,6 +2043,7 @@ VMK_ReturnStatus vmk_DVFilterPktClearTags( * \retval VMK_NOT_FOUND fastPathHandle parameter invalid. * \retval VMK_FAILURE getMask contains a bit not allocated for * this agent. + * \retval VMK_BAD_PARAM setMask is NULL * *********************************************************************** */ @@ -1994,6 +2060,8 @@ VMK_ReturnStatus vmk_DVFilterGetPktTags( * * \brief Register property operations for a DVFilter * + * \nativedriversdisallowed + * * DVFilter implementation calls this interface to register a property * handler for a property of a given name. The property name must * start with the agent name pass to vmk_DVFilterRegisterFastPath(). @@ -2026,6 +2094,8 @@ VMK_ReturnStatus vmk_DVFilterPropertyRegister( * * \brief Unregister a DVFilter Client * + * \nativedriversdisallowed + * * The handle is the token obtained from vmk_DVFilterPropertyRegister(). * * \param[in] handle Handle for DVFilter property registration @@ -2045,6 +2115,8 @@ VMK_ReturnStatus vmk_DVFilterPropertyUnregister( * * \brief Increment a DVFilter client stat. * + * \nativedriversdisallowed + * * Updates the DVFilter's client stat of the specified type in the * specified direction. * @@ -2073,6 +2145,8 @@ VMK_ReturnStatus vmk_DVFilterStatInc( * * \brief Get the current value of a DVFilter client stat. * + * \nativedriversdisallowed + * * Fetches the DVFilter's client stat of the specified type in the * specified direction. * diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_bitvector.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_bitvector.h new file mode 100644 index 0000000..38cd7be --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_bitvector.h @@ -0,0 +1,653 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * BitVector */ /** + * + * \addtogroup Lib + * @{ + * \defgroup vmk_BitVector Bit Vector Manipulation + * + * Utility interfaces for managing a Bit Vector. + + * \par Example - Using VMK_BITVECTOR_ITERATE or VMK_BITVECTOR_ITERATE_AND_CLEAR + * and VMK_BITVECTOR_ENDITERATE + * + * \code + * { + * vmk_uint32 n; + * VMK_BITVECTOR_ITERATE(_bv,n) { + * printf("%d is in set\n",n); + * } + * VMK_BITVECTOR_ENDITERATE() + * } + * \endcode + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_BITVECTOR_H_ +#define _VMKAPI_BITVECTOR_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** + * \brief Incomplete Abstract Data type allocated to be larger than + * sizeof(vmk_BitVector). Should only be allocated by + * vmk_BitVectorAlloc. + * Clients should only use the returned pointer. + */ +typedef struct vmk_BitVector { + vmk_uint32 n; + vmk_uint32 nwords; + vmk_uint32 vector[1]; +} vmk_BitVector; + + +/* + ******************************************************************************* + * vmk_BitVectorSize -- */ /** + * + * \brief Size of vmk_BitVector for a given number of bits + * + * \param[in] n Number of bits to size for + * + * \retval size calculation of a vmk_BitVector + * + ******************************************************************************* + */ +#define vmk_BitVectorSize(n) \ + (sizeof(vmk_uint32) /* n */ + \ + sizeof(vmk_uint32) /* nwords */ + \ + ((n + 31) / 32) * sizeof(vmk_uint32)) /* n bits rounded up to words */ + + +/* + ******************************************************************************* + * vmk_BitVectorAllocWithTimeout -- */ /** + * + * \brief Allocate a bitvector with timeout + * + * \param[in] heap vmk_HeapID to allocate the vmk_BitVector from + * \param[in] n Total number of bits to allocate for + * \param[in] timeoutMs vmk_BitVector to set a bit + * + * \note If timeoutMS is not 0 then the allocation may block if the + * heap needs to expand to accomodate the request. + * + * \retval vmk_BitVector pointer or NULL. + * + ******************************************************************************* + */ +vmk_BitVector* vmk_BitVectorAllocWithTimeout(vmk_HeapID heap, + vmk_uint32 n, + vmk_uint32 timeoutMs); + + +/* + ******************************************************************************* + * vmk_BitVectorAlloc -- */ /** + * + * \brief Allocate a bitvector + * + * \param[in] heap vmk_HeapID to allocate the vmk_BitVector from + * \param[in] n Total number of bits to allocate for + * + * \retval vmk_BitVector pointer or NULL. + * + ******************************************************************************* + */ +vmk_BitVector* vmk_BitVectorAlloc(vmk_HeapID heap, + vmk_uint32 n); + +/* + ******************************************************************************* + * vmk_BitVectorDuplicate -- */ /** + * + * \brief Allocate a vmk_BitVector and initialise it from another vmk_BitVector + * + * \param[in] heap vmk_HeapID to allocate the vmk_BitVector from + * \param[in] src Source vmk_BitVector to copy into the new vmk_BitVector + * + * \retval new vmk_BitVector pointer + * + ******************************************************************************* + */ +vmk_BitVector* vmk_BitVectorDuplicate(vmk_HeapID heap, + const vmk_BitVector *src); + + +/* + ******************************************************************************* + * vmk_BitVectorFree -- */ /** + * + * \brief Free a vmk_BitVector + * + * \param[in] heap vmk_HeapID to free the vmk_BitVector to + * \param[in] bv vmk_BitVector to free + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + ******************************************************************************* + */ +void vmk_BitVectorFree(vmk_HeapID heap, + vmk_BitVector *bv); + + +/* + ******************************************************************************* + * vmk_BitVectorSet -- */ /** + * + * \brief Set a bit in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to set a bit + * \param[in] n Bit to set + * + ******************************************************************************* + */ +static inline void +vmk_BitVectorSet(vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + asm volatile("btsl %1, (%0)" + :: "r" (bv->vector), "r" (n) + : "cc", "memory"); +} + + +/* + ******************************************************************************* + * vmk_BitVectorClear -- */ /** + * + * \brief Clear a bit in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to clear a bit + * \param[in] n Bit to set + * + ******************************************************************************* + */ +static inline void +vmk_BitVectorClear(vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + asm volatile("btrl %1, (%0)" + :: "r" (bv->vector), "r" (n) + : "cc", "memory"); +} + + +/* + ******************************************************************************* + * vmk_BitVectorTest -- */ /** + * + * \brief Test if a bit in a vmk_BitVector is set + * + * \param[in] bv vmk_BitVector to check + * \param[in] n Bit to check + * + * \retval If this bit is set, non-zero is returned. + * + ******************************************************************************* + */ +static inline int +vmk_BitVectorTest(const vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + { + vmk_uint32 tmp; + + asm("btl %2, (%1); " + "sbbl %0, %0" + : "=r" (tmp) + : "r" (bv->vector), "r" (n) + : "cc"); + return tmp; + } +} + + +/* + ******************************************************************************* + * vmk_BitVectorAtomicTestAndSet -- */ /** + * + * \brief Atomically read bit n and set it + * + * \param[in] bv vmk_BitVector to set a bit + * \param[in] n Bit to set + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + ******************************************************************************* + */ +static inline int +vmk_BitVectorAtomicTestAndSet(const vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + { + vmk_uint32 tmp; + + asm volatile("lock; btsl %2, (%1); " + "sbbl %0, %0" + : "=r" (tmp) + : "r" (bv->vector), "r" (n) + : "cc", "memory"); + + return tmp; + } +} + + +/* + ******************************************************************************* + * vmk_BitVectorAtomicTestAndClear -- */ /** + * + * \brief Atomically read bit n and clear it + * + * \param[in] bv vmk_BitVector to operate on + * \param[in] n Bit to clear + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + ******************************************************************************* + */ +static inline int +vmk_BitVectorAtomicTestAndClear(const vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + { + vmk_uint32 tmp; + + asm volatile("lock; btrl %2, (%1); " + "sbbl %0, %0" + : "=r" (tmp) + : "r" (bv->vector), "r" (n) + : "cc", "memory"); + + return tmp; + } +} + + +/* + ******************************************************************************* + * vmk_BitVectorZap -- */ /** + * + * \brief Removes all entries from the set + * + * \param[in] bv vmk_BitVector to zap + * + ******************************************************************************* + */ +static inline void +vmk_BitVectorZap(vmk_BitVector *bv) +{ + vmk_Memset(bv->vector, 0, bv->nwords * sizeof(bv->vector[0])); +} + + +/* + ******************************************************************************* + * vmk_BitVectorFill -- */ /** + * + * \brief Set all bits in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to operate on + * + ******************************************************************************* + */ +static inline void +vmk_BitVectorFill(vmk_BitVector *bv) +{ + vmk_Memset(bv->vector, 0xff, bv->nwords * sizeof(bv->vector[0])); +} + + +/* + ******************************************************************************* + * vmk_BitVectorGetRef -- */ /** + * + * \brief Get a pointer to a particular byte in vmk_BitVector + * + * \param[in] bv vmk_BitVector to look inside + * \param[in] start Starting byte return + * \param[in] nbytes Number of bytes expected to be used + * + * \note nbytes is only checked in debug builds + * + * \retval Pointer to a vmk_unit8. + * + ******************************************************************************* + */ +static inline vmk_uint8 * +vmk_BitVectorGetRef(const vmk_BitVector *bv, + vmk_uint32 start, + vmk_uint32 nbytes) +{ + vmk_uint8 *ptr = (vmk_uint8 *)bv->vector; + (void)nbytes; + VMK_ASSERT((start + nbytes) <= bv->nwords * sizeof(bv->vector[0])); + return &ptr[start]; +} + + +/* + ******************************************************************************* + * vmk_BitVectorNumBitsSet -- */ /** + * + * \brief Return the number of set bits in this vmk_BitVector + * + * \param[in] bv vmk_BitVector to count + * + * \retval number of bits set in this vmk_BitVector + * + ******************************************************************************* + */ +vmk_uint32 vmk_BitVectorNumBitsSet(const vmk_BitVector *bv); + + +/* + ******************************************************************************* + * vmk_BitVectorIsZero -- */ /** + * + * \brief Check if a vmk_BitVector has no bits set + * + * \param[in] bv vmk_BitVector to check + * + * \retval non-zero if any bit is set in the vmk_BitVector + * + ******************************************************************************* + */ +vmk_uint32 vmk_BitVectorIsZero(const vmk_BitVector *bv); + + +/* + ******************************************************************************* + * vmk_BitVectorNextBit -- */ /** + * + * \brief Find next bit set in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to check + * \param[in] start Bit to start searching from + * \param[in] state VMK_TRUE if looking for set bits + * \param[out] pos Filled in with index of the next bit + * + * \retval VMK_TRUE if a bit was found + * + * \note The value of "pos" must not be used if VMK_FALSE is returned. + * + ******************************************************************************* + */ +vmk_Bool vmk_BitVectorNextBit(const vmk_BitVector *bv, + vmk_uint32 start, + vmk_Bool state, + vmk_uint32 *pos); + + +/* + ******************************************************************************* + * vmk_BitVectorPrevBit -- */ /** + * + * \brief Find previous bit set in a vmk_BitVector, searching backwards + * + * \param[in] bv vmk_BitVector to check + * \param[in] start Bit to start searching from + * \param[in] state VMK_TRUE if looking for set bits + * \param[out] pos Filled in with index of the next bit + * + * \retval VMK_TRUE if a bit was found + * + * \note BitVectors are implemented as an array of vmk_uint32 which affects + * byte ordering on little endian architectures, such as x86. + * + * \note The value of "pos" must not be used if VMK_FALSE is returned. + * + ******************************************************************************* + */ +vmk_Bool vmk_BitVectorPrevBit(const vmk_BitVector *bv, + vmk_uint32 start, + vmk_Bool state, + vmk_uint32 *pos); + + +/* + ******************************************************************************* + * vmk_BitVectorGetExtent -- */ /** + * + * \brief Find sequence of bits in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to check + * \param[in] start Bit to start searching from + * \param[out] set Is start bit set or not + * \param[out] length Filled in with index of the next bit + * + * \note BitVectors are implemented as an array of vmk_uint32 which affects + * byte ordering on little endian architectures, such as x86. + * + ******************************************************************************* + */ +void vmk_BitVectorGetExtent(const vmk_BitVector *bv, + vmk_uint32 start, + vmk_Bool *set, + vmk_uint32 *length); + +/* + ******************************************************************************* + * vmk_BitVectorNextExtent -- */ /** + * + * \brief Find next sequence of bits in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to check + * \param[in] startSearch Bit to start searching from + * \param[in] set VMK_TRUE if looking for set bits + * \param[out] startRun Start index of extend found + * \param[out] length Length of extent found + * + * \retval VMK_TRUE if a bit was found + * + * \note BitVectors are implemented as an array of vmk_uint32 which affects + * byte ordering on little endian architectures, such as x86. + * + * \note The values of "startRun" and "length" must not be used if VMK_FALSE + * is returned. + * + ******************************************************************************* + */ +vmk_Bool vmk_BitVectorNextExtent(const vmk_BitVector *bv, + vmk_uint32 startSearch, + vmk_Bool set, + vmk_uint32 *startRun, + vmk_uint32 *length); + + +/* + ******************************************************************************* + * vmk_BitVectorSetExtent -- */ /** + * + * \brief Set an extent of a bitvector to a particular state + * + * \param[in] bv vmk_BitVector to set a bit + * \param[in] startRun Bit to start setting from + * \param[in] length Number of bits to set + * \param[in] state VMK_TRUE if setting to 1 + * + * \retval If setting to 1, returns a positive count number of bits set, + * otherwise returns a negative count of the number of bits set. + * + ******************************************************************************* + */ +int vmk_BitVectorSetExtent(vmk_BitVector *bv, + vmk_uint32 startRun, + vmk_uint32 length, + vmk_Bool state); + + +/* + ******************************************************************************* + * vmk_BitVectorSetExtentFast -- */ /** + * + * \brief Set an extent of a bitvector to 1 + * + * \param[in] bv vmk_BitVector to set a bit + * \param[in] startRun Bit to start setting from + * \param[in] length Number of bits to set + * + ******************************************************************************* + */ +void vmk_BitVectorSetExtentFast(vmk_BitVector *bv, + vmk_uint32 startRun, + vmk_uint32 length); + + +/* + ******************************************************************************* + * vmk_BitVectorMerge -- */ /** + * + * \brief Merge two sets of vmk_BitVector + * + * \param[in] src vmk_BitVector merged into dest + * \param[in,out] dest vmk_BitVector modified by src + * + * \retval number of bits merged from src to dest that were not previously set. + * + ******************************************************************************* + */ +vmk_uint32 vmk_BitVectorMerge(vmk_BitVector *src, + vmk_BitVector *dest); + + +/* + ******************************************************************************* + * vmk_BitVectorMergeAtOffset -- */ /** + * + * \brief Merge two sets of vmk_BitVector from specific offset + * + * This function merges bits from the start of one vmk_BitVector into another, + * starting the merge at a specific offset in the destination vector. Bits set + * in the source vector that would go beyond the size of dest are ignored. + * + * \param[in] src vmk_BitVector merged into dest + * \param[in,out] dest vmk_BitVector modified by src + * \param[in] offset Bit position to write bits from src into + * + ******************************************************************************* + */ +void vmk_BitVectorMergeAtOffset(vmk_BitVector *src, + vmk_BitVector *dest, + vmk_uint32 offset); + + +/* + ******************************************************************************* + * vmk_BitVectorMaxSize -- */ /** + * + * \brief Returns the maximum number of bits that can be held in a vmk_BitVector + * + * \retval maximum number of bits that can be held in a vmk_BitVector + * + ******************************************************************************* + */ +vmk_uint32 vmk_BitVectorMaxSize(void); + + +/* + ******************************************************************************* + * VMK_BITVECTOR_ITERATE -- */ /** + * + * \brief Macro to iterate a vmk_BitVector + * + * \param[in] _bv vmk_BitVector to iterate across + * \param[in] _n Variable set to each valid bit each iteration + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + ******************************************************************************* + */ + +#define VMK_BITVECTOR_ITERATE(_bv,_n) { \ + vmk_uint32 _index; \ + for (_index=0;_index <(_bv)->nwords;_index++) { \ + vmk_uint32 _off,_vals; \ + _vals = (_bv)->vector[_index]; \ + while(_vals) { \ + __asm ("bsfl %1,%0\n\t" \ + "btrl %0,%1" \ + : "=r" (_off), "+g" (_vals) \ + : : "cc" ); \ + _n = (_index * 32) + _off; \ + if (_n >= (_bv)->n) { \ + break; \ + } \ + + +/* + ******************************************************************************* + * VMK_BITVECTOR_ITERATE_AND_CLEAR -- */ /** + * + * \brief Macro to iterate a vmk_BitVector, clearing it as well + * + * \param[in] _bv vmk_BitVector to iterate across + * \param[in] _n Variable set to each valid bit each iteration + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + * \note The state of the vmk_BitVector during the iteration is undefined + * + ******************************************************************************* + */ + +#define VMK_BITVECTOR_ITERATE_AND_CLEAR(_bv,_n) { \ + vmk_uint32 _index; \ + for (_index=0;_index <(_bv)->nwords;_index++) { \ + vmk_uint32 _off,_vals; \ + _vals = (_bv)->vector[_index]; \ + (_bv)->vector[_index] = 0; \ + while(_vals) { \ + __asm ("bsfl %1,%0\n\t" \ + "btrl %0,%1" \ + : "=r" (_off), "+g" (_vals) \ + : : "cc"); \ + _n = (_index * 32) + _off; \ + if (_n >= (_bv)->n) { \ + break; \ + } \ + + +/* + ******************************************************************************* + * VMK_BITVECTOR_ENDITERATE -- */ /** + * + * \brief Macro to end a iteration zone + * + * Can be used with either VMK_BITVECTOR_ITERATE() or + * VMK_BITVECTOR_ITERATE_AND_CLEAR() + * + ******************************************************************************* + */ + +#define VMK_BITVECTOR_ENDITERATE() }}} + +#endif /* _VMKAPI_BITVECTOR_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_compiler.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_compiler.h index 4354a34..743326b 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_compiler.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_compiler.h @@ -192,6 +192,22 @@ #define VMK_UNLIKELY(_exp) (_exp) #endif +/* + *********************************************************************** + * VMK_IS_COMPILE_TIME -- */ /** + * + * \brief If a given expression is known to be constant at compile-time. + * + * \note This is used to enable some optimizations when an expression is + * known to be constant at compile time, and fall back to a more + * generic method when it is not. + * + * \param[in] _exp Expression that is tested. + * + *********************************************************************** + */ +#define VMK_IS_COMPILE_TIME(_exp) __builtin_constant_p(_exp) + /* *********************************************************************** * VMK_PADDED_STRUCT -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_const.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_const.h index 6690d90..f1a303f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_const.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_const.h @@ -101,6 +101,14 @@ #define VMK_UINT64_MAX ((vmk_uint64)VMK_CONST64U(0xffffffffffffffff)) +/** + * \brief Bits per byte. + */ +#ifndef VMK_BITS_PER_BYTE +#define VMK_BITS_PER_BYTE (8) +#endif + + #endif /* _VMKAPI_CONST_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_hash.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_hash.h index 9dfa734..597af90 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_hash.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_hash.h @@ -56,7 +56,7 @@ typedef vmk_uint64 vmk_HashKeyFlags; /** No flags. */ #define VMK_HASH_KEY_FLAGS_NONE 0x0 -/** +/** * Hash implementation should do a local copy of the key on insertion * and do not assume the memory backing up the key will be persistent. */ @@ -115,7 +115,7 @@ vmk_HashGetAllocSize(vmk_uint32 nbEntries); * * \note The hash table returned does not come with locking, it is the * caller's responsibility to provide such mechanism. - * + * * \param[in] moduleID Module ID requesting the hash table. * \param[in] heapID The heap used for hash table internal allocation * related to hash structure and hash entries @@ -228,7 +228,7 @@ vmk_HashAllocWithOpaqueKeys(vmk_ModuleID moduleID, * * \brief Release a hash table. * - * \param[in] hdl Hash handle. + * \param[in] hdl Hash handle. * * \retval VMK_OK Hash table was released successful. * \retval VMK_BUSY If the hash table is not empty. @@ -240,6 +240,30 @@ VMK_ReturnStatus vmk_HashRelease(vmk_HashTable hdl); +/* + ******************************************************************************* + * vmk_HashDeleteAll -- */ /** + * + * \brief Delete every entry in a hash table. + * + * \note This won't actually release the values passed as part of the hash + * table insertion. Client should make sure the right clean up is done + * beforehand. + * + * \note A subsequent call to vmk_HashIsEmpty() on the given hash table should + * return VMK_TRUE. + * + * \param[in] hdl Hash handle. + * + * \retval VMK_OK Every single entry of the hash table was deleted. + * \retval VMK_BAD_PARAM If hdl equals to VMK_INVALID_HASH_HANDLE. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_HashDeleteAll(vmk_HashTable hdl); + + /* ******************************************************************************* * vmk_HashIsEmpty -- */ /** @@ -264,7 +288,7 @@ vmk_HashIsEmpty(vmk_HashTable hdl); * \brief Iterator used to iterate the key-value pairs on a given hash table. * * \note The return value is a command set given back to the iterator engine to - * let it know what to do next. It can be a binary union of any of the + * let it know what to do next. It can be a binary union of any of the * vmk_HashKeyIteratorCmd defined above. * * \param[in] hdl Hash handle. @@ -314,7 +338,7 @@ vmk_HashKeyIterate(vmk_HashTable hdl, * * \brief Insert a key-value pair into a given hash table. * - * \note The key passed will be copied locally only if the flag + * \note The key passed will be copied locally only if the flag * VMK_HASH_KEY_FLAGS_LOCAL_COPY was passed while creating the hash. * * \note The value passed won't be copied so the reference needs to be persistent @@ -332,7 +356,7 @@ vmk_HashKeyIterate(vmk_HashTable hdl, ******************************************************************************* */ VMK_ReturnStatus -vmk_HashKeyInsert(vmk_HashTable hdl, +vmk_HashKeyInsert(vmk_HashTable hdl, vmk_HashKey key, vmk_HashValue value); @@ -421,6 +445,30 @@ vmk_HashKeyFind(vmk_HashTable hdl, vmk_HashKey key, vmk_HashValue *value); +/* + ******************************************************************************* + * vmk_HashBytes -- */ /** + * + * \brief Calculate 64 bit hash for an array of bytes. + * + * \note This API is not used as part of a hash table allocated with the + * vmk_HashAlloc() function. It is provided as a helper routine for + * callers that need to calculate hashes for their own purpose. + * + * \param[in] key Byte array pointer. + * \param[in] keySize Array Size in byte. + * \param[out] hash The calculated hash value. + * + * \retval VMK_OK Hash calculated successfully. + * \retval VMK_BAD_PARAM If key or hash is NULL, or keySize equal zero. + * + ******************************************************************************* + */ + +VMK_ReturnStatus +vmk_HashBytes(const vmk_uint8 *key, + vmk_uint32 keySize, + vmk_uint64 *hash); #endif /* _VMKAPI_HASH_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_priq.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_priq.h new file mode 100644 index 0000000..e8b812a --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_priq.h @@ -0,0 +1,395 @@ +/* ********************************************************** + * Copyright 2006 - 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ******************************************************************************* + * PriQ */ /** + * \addtogroup Lib + * @{ + * \defgroup PriQ Priority Queue + * + * These are interfaces for priority queues. + * + * The keys can be duplicated, the ordering will be kept accross the elements, + * but the values are expected to be unique. The only reason for that is + * because the vmk_PriQRekey uses the value as an unique identifier to update + * the key of an element. If two elements with the same value are stored in the + * queue and the vmk_PriQRekey is used on this element, then the behavior is + * undefined. + * + * @{ + ******************************************************************************* + */ + +#ifndef _VMKAPI_PRIQ_H_ +#define _VMKAPI_PRIQ_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Type of the priority queue. + * + * \details A priority queue can have elements with the smallest or the biggest + * key on front. This enum is used to select the type of priority + * queue we use. + */ +typedef enum vmk_PriQType { + /** + * \brief The queue will be a "min priority queue", meaning that the elements + * with the lowest priority will be on the front. + */ + VMK_PRIQ_TYPE_MIN, + /** + * \brief The queue will be a "max priority queue", meaning that the elements + * with the highest priority will be on the front. + */ + VMK_PRIQ_TYPE_MAX, +} vmk_PriQType; + +/** + * \brief Key used to insert an element into the priority queue. + */ +typedef vmk_uint64 vmk_PriQKey; + +/** + * \brief Opaque data structure for the priority queue. + */ +typedef struct vmk_PriQInternal *vmk_PriQHandle; + +/* + ******************************************************************************* + * vmk_PriQCreate -- */ /** + * + * \brief Create a new priority queue. + * + * \note vmk_PriQDestroy() needs to be called once done with the priority queue. + * + * \note The priority queue returned does not come with locking, it is the + * caller's responsibility to provide such mechanism if needed. + * + * \param[in] moduleID Module ID requesting the priority queue. + * \param[in] heapID The heap used for priority queue internal allocation. + * \param[in] type Type of the priority queue. + * \param[in] numElems Number of elements in the priority queue. The queue + * can be later resized if needed. + * \param[out] priQ Handle on the priority queue. + * + * \retval VMK_OK Priority queue initialization and allocation was + * successful. + * \retval VMK_NO_MEMORY Memory allocation failure. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQCreate(vmk_ModuleID moduleID, + vmk_HeapID heapID, + vmk_PriQType type, + vmk_uint64 numElems, + vmk_PriQHandle *priQ); + +/* + ******************************************************************************* + * vmk_PriQDestroy -- */ /** + * + * \brief Destroy a priority queue and its associated resources. + * + * \param[in] priQ Handle on the priority queue. + * + * \retval VMK_OK Everything went fine, the priority queue is released. + * \retval VMK_BUSY The priority queue was not empty. Unable to release it. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQDestroy(vmk_PriQHandle priQ); + +/* + ******************************************************************************* + * vmk_PriQClear -- */ /** + * + * \brief Clear the contents of a priority queue. + * + * \param[in] priQ Handle on the priority queue. + * + * \retval VMK_OK Everything went fine, the priority queue was emptied. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQClear(vmk_PriQHandle priQ); + +/* + ******************************************************************************* + * vmk_PriQTotalElems -- */ /** + * + * \brief Get the total number of slots in the priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[out] totalElems Pointer to the output data. + * + * \retval VMK_OK The operation was successful. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQTotalElems(vmk_PriQHandle priQ, + vmk_uint64 *totalElems); + +/* + ******************************************************************************* + * vmk_PriQUsedElems -- */ /** + * + * \brief Get the number of used slots in the priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[out] usedElems Pointer to the output data. + * + * \retval VMK_OK The operation was successful. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQUsedElems(vmk_PriQHandle priQ, + vmk_uint64 *usedElems); + +/* + ******************************************************************************* + * vmk_PriQIsEmpty -- */ /** + * + * \brief Check whether or not a priority queue is empty. + * + * \param[in] priQ Handle on the priority queue. + * + * \retval VMK_TRUE The priority queue is empty. + * \retval VMK_FALSE The priority queue still contains some elements. + * + ******************************************************************************* + */ +static inline vmk_Bool +vmk_PriQIsEmpty(vmk_PriQHandle priQ) +{ + VMK_ReturnStatus status; + vmk_uint64 usedElems; + + status = vmk_PriQUsedElems(priQ, &usedElems); + VMK_ASSERT(status == VMK_OK); + + return (usedElems == 0); +} + +/* + ******************************************************************************* + * vmk_PriQResize -- */ /** + * + * \brief Resize a previously allocated priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] numElems New number of elements of the priority queue. + * + * \retval VMK_OK Resize operation was successful. + * \retval VMK_BUSY Trying to shrink the queue to a size too small for the + * elements that are already in there. + * \retval VMK_NO_MEMORY Memory allocation failure. The priority queue is left + * unchanged. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQResize(vmk_PriQHandle priQ, + vmk_uint64 numElems); + +/* + ******************************************************************************* + * vmk_PriQInsert -- */ /** + * + * \brief Insert an element in the priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] key Key of the new element. This is the actual "priority" + * that is used to sort elements in the queue. + * \param[in] value Opaque value to store with the key. + * + * \retval VMK_OK Insertion was successful. + * \retval VMK_LIMIT_EXCEEDED The priority queue is already full. The element + * was not inserted. The user needs to resize the queue. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQInsert(vmk_PriQHandle priQ, + vmk_PriQKey key, + void *value); + +/* + ******************************************************************************* + * vmk_PriQFirst -- */ /** + * + * \brief Get the first element of the priority queue and/or its associated key. + * + * \note This does not remove the first element from the priority queue. One + * needs to use vmk_PriQExtractFirst() for that purpose. + * + * \param[in] priQ Handle on the priority queue. + * \param[out] key Pointer to the output key. If this parameter is NULL, + * then it is ignored. + * \param[out] value Pointer to the output value. If this parameter is + * NULL, then it is ignored. + * + * \retval VMK_OK The first element of the queue has been "found" and + * stored in the output parameters. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The queue was empty. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQFirst(vmk_PriQHandle priQ, + vmk_PriQKey *key, + void **value); + +/* + ******************************************************************************* + * vmk_PriQExtractFirst -- */ /** + * + * \brief Returns and deletes the first element of the priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[out] key Pointer to the output key. If this parameter is NULL, + * then it is ignored. + * \param[out] value Pointer to the output value. If this parameter is + * NULL, then it is ignored. + * + * \retval VMK_OK The first element of the queue has been stored in + * output parameters and deleted from the queue. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The queue was empty. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQExtractFirst(vmk_PriQHandle priQ, + vmk_PriQKey *key, + void **value); + +/* + ******************************************************************************* + * vmk_PriQExtract -- */ /** + * + * \brief Returns and deletes the element whose value is passed as argument. + * + * \note As keys in a priority queue can be duplicated, the only way to + * uniquely identify an element is to use the pointer referencing it. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] value Value that was initially stored in the queue and that + * we want to extract. + * \param[out] key Pointer to the output key. If this parameter is NULL, + * then it is ignored. + * + * \retval VMK_OK The element of the queue has been stored in output + * parameters and deleted from the queue. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The element was not found in the queue. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQExtract(vmk_PriQHandle priQ, + void *value, + vmk_PriQKey *key); + +/* + ******************************************************************************* + * vmk_PriQFind -- */ /** + * + * \brief Returns the element whose value is passed as argument. + * + * \note As keys in a priority queue can be duplicated, the only way to + * uniquely identify an element is to use the pointer referencing it. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] value Value that was initially stored in the queue and that + * we want to find. + * \param[out] key Pointer to the output key. If this parameter is NULL, + * then it is ignored. + * + * \retval VMK_OK The element of the queue has been stored in output + * parameters and deleted from the queue. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The element was not found in the queue. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQFind(vmk_PriQHandle priQ, + void *value, + vmk_PriQKey *key); + +/* + ******************************************************************************* + * vmk_PriQRekeyFirst -- */ /** + * + * \brief Update the key of the first element in the queue. + * + * \details This will lead to the first element beeing moved in the queue if + * needed. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] newKey New key to apply to the first element in the queue. + * + * \retval VMK_OK The first element of the queue has been updated. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The queue was empty. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQRekeyFirst(vmk_PriQHandle priQ, + vmk_PriQKey newKey); + +/* + ******************************************************************************* + * vmk_PriQRekey -- */ /** + * + * \brief Update the key of the entry whose value is passed as argument. + * + * \details This will lead to the element being moved in the queue if needed. + * + * \note As keys in a priority queue can be duplicated, the only way to + * uniquely identify an element is to use the pointer referencing it. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] value Value that was initially stored in the queue, for + * which we will update the key. + * \param[in] newKey New key to apply to the value. + * + * \retval VMK_OK The element's key has been updated. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The element was not found in the queue. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQRekey(vmk_PriQHandle priQ, + void *value, + vmk_PriQKey newKey); + +#endif /* _PRIQ_MINMAXHEAP_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_util.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_util.h index d2f8c91..418ae96 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_util.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/lib/vmkapi_util.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2008 - 2009 VMware, Inc. All rights reserved. + * Copyright 2008 - 2009, 2013 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -58,6 +58,134 @@ */ #define VMK_UTIL_ROUNDUP(x, y) ((((x)+(y)-1) / (y)) * (y)) +/** + * \brief A series of macros used to count parameters in a varargs list + */ + +/* + *********************************************************************** + * __VMK_UTIL_MASK_ARGS_INT__ -- */ /** + * + * \brief Internal macro to ignore the first 128 varargs parameters and + * evaluate as 129th. + * + * This is used as part of VMK_UTIL_NUM_ARGS(). VMKAPI clients should + * not call this macro directly. + * + *********************************************************************** + */ + +/** \cond nodoc */ +#define __VMK_UTIL_MASK_ARGS_INT__( \ + _ARG1, _ARG2, _ARG3, _ARG4, _ARG5, \ + _ARG6, _ARG7, _ARG8, _ARG9, _ARG10, \ + _ARG11, _ARG12, _ARG13, _ARG14, _ARG15, \ + _ARG16, _ARG17, _ARG18, _ARG19, _ARG20, \ + _ARG21, _ARG22, _ARG23, _ARG24, _ARG25, \ + _ARG26, _ARG27, _ARG28, _ARG29, _ARG30, \ + _ARG31, _ARG32, _ARG33, _ARG34, _ARG35, \ + _ARG36, _ARG37, _ARG38, _ARG39, _ARG40, \ + _ARG41, _ARG42, _ARG43, _ARG44, _ARG45, \ + _ARG46, _ARG47, _ARG48, _ARG49, _ARG50, \ + _ARG51, _ARG52, _ARG53, _ARG54, _ARG55, \ + _ARG56, _ARG57, _ARG58, _ARG59, _ARG60, \ + _ARG61, _ARG62, _ARG63, _ARG64, _ARG65, \ + _ARG66, _ARG67, _ARG68, _ARG69, _ARG70, \ + _ARG71, _ARG72, _ARG73, _ARG74, _ARG75, \ + _ARG76, _ARG77, _ARG78, _ARG79, _ARG80, \ + _ARG81, _ARG82, _ARG83, _ARG84, _ARG85, \ + _ARG86, _ARG87, _ARG88, _ARG89, _ARG90, \ + _ARG91, _ARG92, _ARG93, _ARG94, _ARG95, \ + _ARG96, _ARG97, _ARG98, _ARG99, _ARG100, \ + _ARG101, _ARG102, _ARG103, _ARG104, _ARG105, \ + _ARG106, _ARG107, _ARG108, _ARG109, _ARG110, \ + _ARG111, _ARG112, _ARG113, _ARG114, _ARG115, \ + _ARG116, _ARG117, _ARG118, _ARG119, _ARG120, \ + _ARG121, _ARG122, _ARG123, _ARG124, _ARG125, \ + _ARG126, _ARG127, _ARG128, _ARG129, ...) _ARG129 +/** \endcond */ + +/* + *********************************************************************** + * __VMK_UTIL_ARG_COUNTS__ -- */ /** + * + * \brief A series of argument counts, used with VMK_UTIL_NUM_ARGS. + * + * This is used as part of VMK_UTIL_NUM_ARGS(). VMKAPI clients should + * no call this macro directly. + * + *********************************************************************** + */ +/** \cond nodoc */ +#define __VMK_UTIL_ARG_COUNTS__() \ + 128, 127, 126, 125, 124, 123, 122, 121, 120, \ + 119, 118, 117, 116, 115, 114, 113, 112, 111, 110, \ + 109, 108, 107, 106, 105, 104, 103, 102, 101, 100, \ + 99, 98, 97, 96, 95, 94, 93, 92, 91, 90, \ + 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, \ + 79, 78, 77, 76, 75, 74, 73, 72, 71, 70, \ + 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, \ + 59, 58, 57, 56, 55, 54, 53, 52, 51, 50, \ + 49, 48, 47, 46, 45, 44, 43, 42, 41, 40, \ + 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, \ + 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, \ + 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, \ + 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 +/** \endcond */ + + +/* + *********************************************************************** + * __VMK_UTIL_MASK_ARGS__ -- */ /** + * + * \brief Variadic macro that masks the first 128 arguments, evaluating + * the 129th. + * + * This is used as part of VMK_UTIL_NUM_ARGS(). VMKAPI clients should + * no call this macro directly. + * + *********************************************************************** + */ +/** \cond nodoc */ +#define __VMK_UTIL_MASK_ARGS__(...) \ + __VMK_UTIL_MASK_ARGS_INT__(__VA_ARGS__) +/** \endcond */ + +/* + *********************************************************************** + * VMK_UTIL_NUM_ARGS -- */ /** + * + * \brief Macro to count the number of varargs parameters. + * + * \param[in] ... varargs parameters. There can be 0 to 127 + * parameters. More than 127 produces an + * undefined result. + * + * \note This works by creating a larger varargs series of parameters + * around the passed series and using internal macros. The + * larger series is a dummy parameter (to support if the passed + * series has no parameters), the passed series, and then a + * decreasing series of numbers representing the parameter count. + * The internal macros effectively ignore the first 128 + * parameters of this larger series and evaluates as the 129th, + * thus effectively evaluating as one plus the count of passed + * parameters. (The one is offset by subtraction in this + * macro). + * \note This macro relies on the special behavior of ##__VA_ARGS__, + * as described here: + * http://gcc.gnu.org/onlinedocs/cpp/Variadic-Macros.html + * In the case that the passed varargs series has no elements, + * ##__VA_ARGS__ will also consume the comma preceding it, + * allowing this macro (VMK_UTIL_NUM_ARGS) to compile correctly + * and evaluate as 0. + * + *********************************************************************** + */ +/** \cond nodoc */ +#define VMK_UTIL_NUM_ARGS(...) \ + (__VMK_UTIL_MASK_ARGS__(_DUMMY, ##__VA_ARGS__, __VMK_UTIL_ARG_COUNTS__()) - 1) +/** \endcond */ + #endif /* _VMKAPI_UTIL_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/mpp/vmkapi_mpp.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/mpp/vmkapi_mpp.h index 0af534d..b7db9ef 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/mpp/vmkapi_mpp.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/mpp/vmkapi_mpp.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2004 - 2009 VMware, Inc. All rights reserved. + * Copyright 2004 - 2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -1373,6 +1373,7 @@ VMK_ReturnStatus vmk_ScsiGetPathPendingCmdInfo( * not be allocated. * \retval VMK_FAILURE Could not abort/reset for other reason, * but the operation can be retried. + * \retval VMK_NOT_FOUND The I/Os could not be found. * *********************************************************************** */ @@ -1805,31 +1806,6 @@ vmk_ScsiIssueSyncFilterCommandWithRetries( vmk_uint8 *data, vmk_ByteCountSmall dataLen); -/* - *********************************************************************** - * vmk_ScsiSchedCommandCompletion -- */ /** - * - * \ingroup MPP - * - * \brief Schedules a non-blocking context to complete the command. - * - * This function schedules a non-blocking context to complete a - * command. The intent is to use this from the issuing path where - * a command cannot be completed directly since that could lead to - * stack exhaustion due to recursive calls to the issuing path from - * the completion path. - * - * \note This is a non-blocking call. - * - * \note Spin locks can be held while calling into this function - * - * \param[in] command The cmd to complete. - * - *********************************************************************** - */ -void vmk_ScsiSchedCommandCompletion( - vmk_ScsiCommand *command); - /* *********************************************************************** * vmk_ScsiRegisterEventHandler -- */ /** @@ -2148,13 +2124,12 @@ vmk_ScsiCommandMaxFree(void); * * \ingroup MPP * - * \brief Auto-detect device attribute support for a SCSI device. + * \brief Determine if a device attribute is supported by a device. * * PSA invokes this function by default if the isSSD() and * isLocal() plugin-entry points are not specified. * - * The default auto-detection behaviour for various device attributes - * are outlined below. + * The behaviour for various device attributes is outlined below. * * - VMK_SCSI_DEVICE_BOOL_ATTR_PSEUDO * - Device is not a pseudo-device. Always return VMK_FALSE in result. diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/mpp/vmkapi_mpp_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/mpp/vmkapi_mpp_types.h index c9f037d..2ea5645 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/mpp/vmkapi_mpp_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/mpp/vmkapi_mpp_types.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2004 - 2009 VMware, Inc. All rights reserved. + * Copyright 2004 - 2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -70,6 +70,9 @@ typedef enum vmk_ScsiPluginStatelogFlag { VMK_SCSI_PLUGIN_STATE_LOG_CRASHDUMP = 0x00000002 } vmk_ScsiPluginStatelogFlag; +/** + * \brief SCSI device attributes + */ typedef enum vmk_ScsiDeviceBoolAttribute { /** * \brief Unknown/invalid attribute. diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_csum.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_csum.h new file mode 100644 index 0000000..7d2dc2c --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_csum.h @@ -0,0 +1,149 @@ +/* ********************************************************** + * Copyright 2011 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * NetCksum */ /** + * \addtogroup Network + *@{ + * \defgroup NetCksum Network protocol checksum functions + *@{ + * + *********************************************************************** + */ +#ifndef _VMKAPI_NET_CKSUM_H_ +#define _VMKAPI_NET_CKSUM_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/* + *********************************************************************** + * vmk_NetCsumFold -- */ /** + * + * \brief Fold a partial 32-bit checksum into a single 16-bit value. + * + * \param[in] sum Partial checksum to fold. + * + * \retval The folded checksum. + * + *********************************************************************** + */ +static inline vmk_uint16 vmk_NetCsumFold(vmk_uint32 sum) +{ + __asm__("addl %1, %0; adcl $0xffff, %0" + : "=r" (sum) + : "r" (sum << 16), "0" (sum & 0xffff0000)); + + return (~sum) >> 16; +} + +/* + *********************************************************************** + * vmk_NetCsumDataPartial -- */ /** + * + * \brief Checksum a block of data. + * + * \param[in] data Data to checksum + * \param[in] len Length of the data to checksum. + * \param[in] initialSum Initial checksum to add. + * + * \retval The resulting unfolded checksum. + * + *********************************************************************** + */ +vmk_uint32 vmk_NetCsumDataPartial(void *data, + vmk_uint64 len, + vmk_uint32 initialSum); + +/* + *********************************************************************** + * vmk_NetCsumDataFinal -- */ /** + * + * \brief Checksum a block of data and fold the result. + * + * \param[in] data Data to checksum + * \param[in] len Length of the data to checksum. + * \param[in] initialSum Initial checksum to add. + * + * \retval The resulting checksum. + * + *********************************************************************** + */ +static inline vmk_uint16 vmk_NetCsumDataFinal(void *data, + vmk_uint64 len, + vmk_uint32 initialSum) +{ + return vmk_NetCsumFold(vmk_NetCsumDataPartial(data, len, initialSum)); +} + +/* + *********************************************************************** + * vmk_NetCsumIPv4Pseudo -- */ /** + * + * \brief Checksum an IPv4 pseudo-header and fold the result. + * + * \param[in] saddr Source address of the IPv4 packed. + * \param[in] daddr Destination address of the IPv4 packed. + * \param[in] proto Protocol number of the payload. + * \param[in] totalLength Total length of the packet. + * \param[in] initialSum Initial checksum to add. + * + * \note saddr, daddr, and proto are direct pointers to the IPv4 + * header's content; they are expected to be in network byte + * order. On the other hand, totalLength is the total length of + * the header + payload. It is expected to by in host byte order. + * + * \retval The resulting checksum. + * + *********************************************************************** + */ +vmk_uint16 vmk_NetCsumIPv4Pseudo(const vmk_uint32 *saddr, + const vmk_uint32 *daddr, + const vmk_uint8 *proto, + vmk_uint16 totalLength, + vmk_uint32 initialSum); + +/* + *********************************************************************** + * vmk_NetCsumIPv6Pseudo -- */ /** + * + * \brief Checksum an IPv6 pseudo-header and fold the result. + * + * \param[in] saddr Source address of the IPv6 packed. + * \param[in] daddr Destination address of the IPv6 packed. + * \param[in] totalLength Length of the IPv6 packet. + * \param[in] proto Protocol number of the payload. + * \param[in] initialSum Initial checksum to add. + * + * \note saddr, daddr, and proto are direct pointers to the IPv6 + * header's content; they are expected to be in network byte + * order. On the other hand, totalLength is the total length of + * the TCP header + payload. It is expected to by in host byte + * order. + * + * \note daddr will usually point to the IPv6 header's destination + * address, but when a routing header is present, the last element + * of the routing header must be used in the IPv6 pseudo header. + * + * \retval The resulting checksum. + * + *********************************************************************** + */ +vmk_uint16 vmk_NetCsumIPv6Pseudo(const vmk_uint8 *saddr, + const vmk_uint8 *daddr, + const vmk_uint8 *proto, + vmk_uint16 totalLength, + vmk_uint32 initialSum); + +#endif /* _VMKAPI_NET_CKSUM_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_dcb.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_dcb.h index 6897032..ff6446b 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_dcb.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_dcb.h @@ -20,7 +20,7 @@ * * This implementation is based on the DCB spec Rev1.01. Priority-based * Flow Control, Priority Group, and Application structures are all - * derived from the DCB spec Rev 1.01. + * derived from the DCB spec Rev 1.01. * * Link to the DCB spec Rev 1.01: * http://www.ieee802.org/1/files/public/docs2008/az-wadekar-dcbx-capability-exchange-discovery-protocol-1108-v1.01.pdf @@ -135,7 +135,7 @@ typedef struct vmk_DCBCapabilities { * * DCB Application Protocol Selector Field types. */ -typedef enum { +typedef enum vmk_DCBAppSelectorField { /** \brief App Proto ID carries L2 EtherType. */ VMK_DCB_APP_L2_ETHTYPE = 0x0, @@ -206,6 +206,518 @@ typedef struct vmk_DCBConfig { vmk_DCBApplications apps; } vmk_DCBConfig; + +/* + *********************************************************************** + * vmk_UplinkDCBIsEnabledCB -- */ /** + * + * \brief Handler used by vmkernel to check whether DCB support is + * enabled on the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] enabled Used to store the DCB state of the device. + * \param[out] version Used to store the DCB version supported by + * the device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE If the operation fails or if the device is + * not DCB capable. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBIsEnabledCB)(vmk_AddrCookie driverData, + vmk_Bool *enabled, + vmk_DCBVersion *version); + + +/* + *********************************************************************** + * vmk_UplinkDCBEnableCB -- */ /** + * + * \brief Handler used by vmkernel to enable DCB support on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBEnableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBDisableCB -- */ /** + * + * \brief Handler used by vmkernel to disable DCB support on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBDisableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBNumTCsGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve Traffic Classes + * information from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] numTCs Used to store the Traffic Class + * information. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBNumTCsGetCB)(vmk_AddrCookie driverData, + vmk_DCBNumTCs *numTCs); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityGroupGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve DCB Priority Group + * settings from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] pg Used to stored the current PG setting. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityGroupGetCB)(vmk_AddrCookie driverData, + vmk_DCBPriorityGroup *pg); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityGroupSetCB -- */ /** + * + * \brief Handler used by vmkernel to pushdown DCB Priority Group + * settings to the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] pg The Priority Group to be set up. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityGroupSetCB)(vmk_AddrCookie driverData, + vmk_DCBPriorityGroup *pg); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve Priority-based Flow + * Control configurations from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] pfcCfg Used to stored the current PFC configuration. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityFCGetCB)(vmk_AddrCookie driverData, + vmk_DCBPriorityFlowControlCfg *pfcCfg); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCSetCB -- */ /** + * + * \brief Handler used by vmkernel to pushdown Priority-based Flow + * Control configurations to the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] pfcCfg The PFC configuration to be set. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityFCSetCB)(vmk_AddrCookie driverData, + vmk_DCBPriorityFlowControlCfg *pfcCfg); + + +/* + *********************************************************************** + * vmk_UplinkDCBIsPriorityFCEnabledCB -- */ /** + * + * \brief Handler used by vmkernel to check whether Priority-based Flow + * Control support is enabled on the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] enabled Used to stored the current PFC support + * state. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBIsPriorityFCEnabledCB)(vmk_AddrCookie driverData, + vmk_Bool *enabled); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCEnableCB -- */ /** + * + * \brief Handler used by vmkernel to enable Priority-based Flow + * Control support on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note PFC configurations must be setup correctly before enabling + * PFC support on the device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityFCEnableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCDisableCB -- */ /** + * + * \brief Handler used by vmkernel to disable Priority-based Flow + * Control support on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityFCDisableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBApplicationsGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve all DCB Application + * Protocols settings from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] apps Used to store the DCB Applications + * settings of the device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBApplicationsGetCB)(vmk_AddrCookie driverData, + vmk_DCBApplications *apps); + + +/* + *********************************************************************** + * vmk_UplinkDCBApplicationsSetCB -- */ /** + * + * \brief Handler used by vmkernel to pushdown DCB Application Protocol + * settings to the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] app DCB Application Protocol setting of the + * device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBApplicationsSetCB)(vmk_AddrCookie driverData, + vmk_DCBApplication *app); + + +/* + *********************************************************************** + * vmk_UplinkDCBCapabilitiesGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve DCB capabilities + * information from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] caps Used to store the DCB capabilities + * information of the device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBCapabilitiesGetCB)(vmk_AddrCookie driverData, + vmk_DCBCapabilities *caps); + + +/* + *********************************************************************** + * vmk_UplinkDCBSettingsApplyCB -- */ /** + * + * \brief Handler used by vmkernel to flush out all pending DCB + * configuration changes on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. DCB daemon + * calls this routine after all DCB parameters are negotiated + * and pushed down to the driver. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBSettingsApplyCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBSettingsGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve all DCB settings from + * the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] dcb Used to store the DCB configurations of + * the device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBSettingsGetCB)(vmk_AddrCookie driverData, + vmk_DCBConfig *dcb); + + +typedef struct vmk_UplinkDCBOps { + + /** Handler used to check whether DCB is enabled on the deivce */ + vmk_UplinkDCBIsEnabledCB isDCBEnabled; + + /** Handler used to enable DCB support on the device */ + vmk_UplinkDCBEnableCB enableDCB; + + /** Handler used to disable DCB support on the device */ + vmk_UplinkDCBDisableCB disableDCB; + + /** + * Handler used to retrieve Traffic Classes information from the + * device + */ + vmk_UplinkDCBNumTCsGetCB getNumTCs; + + /** + * Handler used to retrieve Priority Group information from the + * device + */ + vmk_UplinkDCBPriorityGroupGetCB getPG; + + /** + * Handler used to push down Priority Group settings to the + * device + */ + vmk_UplinkDCBPriorityGroupSetCB setPG; + + /** + * Handler used to retrieve Priority-based Flow Control + * configurations from the device + */ + vmk_UplinkDCBPriorityFCGetCB getPFCCfg; + + /** + * Handler used to pushdown Priority-based Flow Control + * configurations to the device + */ + vmk_UplinkDCBPriorityFCSetCB setPFCCfg; + + /** + * Handler used to check whether Priority-based Flow Control support + * is enabled on the device + */ + vmk_UplinkDCBIsPriorityFCEnabledCB isPFCEnabled; + + /** + * Handler used to enable Priority-based Flow Control on the + * device + */ + vmk_UplinkDCBPriorityFCEnableCB enablePFC; + + /** + * Handler used to disable Priority-based Flow Control on the + * device + */ + vmk_UplinkDCBPriorityFCDisableCB disablePFC; + + /** + * Handler used to retrieve all DCB Application Protocols settings + * from the device + */ + vmk_UplinkDCBApplicationsGetCB getApps; + + /** + * Handler used to pushdown DCB Application Protocol settings to the + * device + */ + vmk_UplinkDCBApplicationsSetCB setApp; + + /** + * Handler used to retrieve DCB capabilities information from the + * device + */ + vmk_UplinkDCBCapabilitiesGetCB getCaps; + + /** + * Handler used to flush all pending DCB configuration changes to + * the device + */ + vmk_UplinkDCBSettingsApplyCB applySettings; + + /** Handler used to retrieve all DCB settings from the device */ + vmk_UplinkDCBSettingsGetCB getSettings; +} vmk_UplinkDCBOps; + + #endif /* _VMKAPI_NET_DCB_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_dump.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_dump.h new file mode 100644 index 0000000..4ddeb91 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_dump.h @@ -0,0 +1,149 @@ +/* ********************************************************** + * Copyright 2009 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * CoreDump */ /** + * \addtogroup Network + *@{ + * \defgroup Dump Dump + *@{ + * + * \par Dump: + * + * Network coredump API's to support the coredump feature. + * This includes interfaces such as receiving packets directly + * from the network in exception. + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_NETDUMP_H_ +#define _VMKAPI_NET_NETDUMP_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" + +/** + * \brief Structure containing Panic-time polling information of the device + * associated to an uplink. + */ + +typedef struct vmk_UplinkPanicInfo { + + /** Interrupt cookie */ + vmk_IntrCookie intrCookie; + + /** Polling data to be passed to the polling function */ + vmk_AddrCookie clientData; +} vmk_UplinkPanicInfo; + + +/* + *********************************************************************** + * vmk_UplinkNetDumpPanicTxCB -- */ /** + * + * \brief Handler used by vmkernel to send packets + * + * \note This handler is called when vmkernel is in panic state. For + * TX completion, driver must call asynchronous vmkapi + * vmk_PktListRelease() or vmk_PktRelease inside + * vmk_UplinkNetDumpPanicPollCB(). It should not call + * vmk_NetPollQueueCompPkt() or request other asynchronous task + * to perform the completion. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] pktList List of packets to transmit + * + * \retval VMK_OK If transmit succeed + * \retval Other If transmit failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkNetDumpPanicTxCB)(vmk_AddrCookie driverData, + vmk_PktList pktList); + +/* + *********************************************************************** + * vmk_UplinkNetDumpPanicPollCB -- */ /** + * + * \brief Handler used by vmkernel to poll for packets received by + * the device associated to an uplink. Might be ignored. + * + * \note This handler is called when vmkernel is in panic state. Driver + * should not call vmk_NetPollRxPktQueue to queue any RX packets. + * Instead, it must insert RX packets into pktList parameter + * and return to vmkernel. + * + * \note Driver must perform all TX completion in this callback by + * calling vmk_PktListRelease or vmk_PktRelease, since this + * callback is guaranteed to be called more frequently than + * vmk_UplinkNetDumpPanicTxCB. + * + * \param[in] clientData Points to the internal module structure + * returned by callback function + * vmk_UplinkNetDumpPanicInfoGetCB(). It can be + * different from the driver data specified in + * vmk_UplinkRegData during device registration. + * \param[out] pktList List of packets received + * + * \retval VMK_OK Always + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkNetDumpPanicPollCB)(vmk_AddrCookie clientData, + vmk_PktList pktList); + +/* + *********************************************************************** + * vmk_UplinkNetDumpPanicInfoGetCB -- */ /** + * + * \brief Handler used by vmkernel to get panic-time polling properties + * of a device associated to an uplink. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] panicInfo Panic-time polling properties of the device + * + * \retval VMK_OK If the information is properly stored + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkNetDumpPanicInfoGetCB)(vmk_AddrCookie driverData, + vmk_UplinkPanicInfo *panicInfo); + +typedef struct vmk_UplinkNetDumpOps { + /** + * callback to transmit packet + */ + vmk_UplinkNetDumpPanicTxCB panicTx; + + /** + * callback to dump panic poll + */ + vmk_UplinkNetDumpPanicPollCB panicPoll; + + /** + * callback to Fump panic info get + */ + vmk_UplinkNetDumpPanicInfoGetCB panicInfoGet; +} vmk_UplinkNetDumpOps; + +#endif /* _VMKAPI_NET_NETDUMP_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pkt.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pkt.h index d98cfca..906aa01 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pkt.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pkt.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2006 - 2009 VMware, Inc. All rights reserved. + * Copyright 2006 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -30,12 +30,11 @@ * - Mapped Area: *\n * In order to access packet data, the buffer containing it needs to - * be mapped in virtual memory. In vmkernel, only a leading portion - * of the first fragment of the packet is guaranteed to be mapped in - * virtual memory. The mapped area of a frame (returned via - * vmk_PktFrameMappedPointerGet() with length of - * vmk_PktFrameMappedLenGet()) starts from the beginning of the - * first fragment.\n + * be mapped in virtual memory. In vmkernel, the first fragment of + * the packet is guaranteed to be mapped in virtual memory. The mapped + * area of a frame (returned via vmk_PktFrameMappedPointerGet() with + * length of vmk_PktFrameMappedLenGet()) starts from the beginning of + * the first fragment.\n *\n * The mapped area may also be larger than the frame * length, which is often the case for Rx processing since pNIC's @@ -60,10 +59,9 @@ * \endcode *\n *\n - * For TSO the mapped area must comtain the complete inet headers. - * vmk_PktInetFrameLayoutGetInetHeaderLength() - * may be valuable in computing the complete length to determine - * when a partial copy may be necessary.\n + * For TSO the mapped area must contain the complete inet headers. + * vmk_PktHeader* functions may be valuable in computing the complete + * length to determine when a partial copy may be necessary.\n *\n * Care ought to be taken when packet data ouside the mapped area * is accessed. as guests are free to modify memory regions @@ -78,7 +76,7 @@ * The padding space available in front of the frame contents. * Packets allocated with vmk_PktAlloc() may not have any headroom * space. Headroom space can be adjusted using vmk_PktPushHeadroom(), - * vmk_PktPullHeadroom() or vmk_PktAdjust(). + * or vmk_PktPullHeadroom(). * These API's redefine the bytes in the beginning of the frame * to become the headroom. If it is desired to keep all the frame * data and allocate new headroom in front of them then API's such as @@ -167,7 +165,13 @@ #include "net/vmkapi_net_types.h" -/** Maximum number of fragments a packet can contain */ +/** + * Maximum number of fragments a packet can contain + * + * \deprecated This definition will be removed in a future release. Use + * vmk_PktSgArrayGet() to query the number of fragments in a + * given vmk_PktHandle. + */ #define VMK_PKT_FRAGS_MAX_LENGTH 24 /** Packet handle representation */ @@ -178,6 +182,9 @@ typedef struct PktHandle vmk_PktHandle; * \struct vmk_PktFrag * \brief Structure representing a buffer fragment that is part of a packet. * + * \deprecated This definition will be removed in a future release in favor + * of vmk_SgElem. + * * This structure is used for returning fragment information via vmk_PktFragGet(). */ typedef struct { @@ -325,7 +332,8 @@ VMK_ReturnStatus vmk_PktAllocWithFlags(vmk_ByteCountSmall len, * management API does NOT provide a compatible function to * register such a handler. * - * \pre This function should only be called from a non-IRQ context. + * \pre This function should not be called when system is in panic. + * This function should only be called from a non-IRQ context. * For freeing packets from an interrupt context use * vmk_PktReleaseIRQ(). * @@ -336,6 +344,77 @@ VMK_ReturnStatus vmk_PktAllocWithFlags(vmk_ByteCountSmall len, void vmk_PktRelease(vmk_PktHandle *pkt); +/* + *********************************************************************** + * vmk_PktReleasePanic -- */ /** + * + * \ingroup Pkt + * \brief Release all resources of a given vmk_PktHandle. + * + * This function cleans up all resources that are referred to by the + * given vmk_PktHandle, which includes memory for the vmk_PktHandle + * as well as the original buffer fragment allocated by vmk_PktAlloc(). + * This function can and should only be called in Panic, hence it skips + * all the completion steps. The caller can check if System is in Panic + * using vmk_SystemCheckState() function. + * + * \param[in] pkt Packet to be released. + * + *********************************************************************** + */ +void vmk_PktReleasePanic(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktAllocForDMAEngine -- */ /** + * + * \ingroup Pkt + * \brief Allocate a vmk_PktHandle containing a single buffer fragment + * satisfying the given DMA constraints + * + * Please refer to vmk_PktAlloc() documentation for properties of the + * allocated packet. + * + * \param[in] len Minimum size of the buffer allocated for + * the new packet. + * \param[in] dmaEngine The DMA Engine for which the packet is + * allocated for + * \param[out] pkt Pointer to the allocated vmk_PktHandle. + * + * \retval VMK_OK Allocation succeeded. + * \retval VMK_BAD_PARAM Invalid uplink parameter. + * \retval VMK_NO_MEMORY Not enough memory to satisfy the + * allocation request or an unspecified + * error has occured. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktAllocForDMAEngine(vmk_ByteCountSmall len, + vmk_DMAEngine dmaEngine, + vmk_PktHandle **pkt); + + +/* + *********************************************************************** + * vmk_PktReleaseIRQ -- */ /** + * + * \ingroup Pkt + * \brief Release all resources of a given vmk_PktHandle from an + * interrupt context. + * + * This function should be called instead of vmk_PktRelease() when + * releasing packets from an interrupt context. Please refer to + * vmk_PktRelease() documentation for more information on releasing + * packets. + * + * \param[in] pkt Packet to be released. + * + *********************************************************************** + */ + +void vmk_PktReleaseIRQ(vmk_PktHandle *pkt); + /* *********************************************************************** * vmk_PktIsBufDescWritable -- */ /** @@ -427,6 +506,9 @@ VMK_ReturnStatus vmk_PktFrameLenSet(vmk_PktHandle *pkt, * \note A vmk_PktHandle can have at most #VMK_PKT_FRAGS_MAX_LENGTH * fragments. * + * \deprecated This function will be removed in a future release. See + * vmk_PktSgElemGet() as a replacement. + * * \param[in] pkt Target packet. * \param[out] frag Structure for returning fragment information * \param[in] entry Index of the queried fragment. The first @@ -451,6 +533,9 @@ VMK_ReturnStatus vmk_PktFragGet(vmk_PktHandle *pkt, * \brief Return the number of fragments attached to the given * vmk_PktHandle. * + * \deprecated This function will be removed in a future release. See + * vmk_PktSgArrayGet() as a replacement. + * * \param[in] pkt Target packet. * * \return Number of fragments. @@ -1012,6 +1097,56 @@ vmk_uint32 vmk_PktGetLargeTcpPacketMss(vmk_PktHandle *pkt); VMK_ReturnStatus vmk_PktClearLargeTcpPacket(const vmk_PktHandle *pkt); +/* + *********************************************************************** + * vmk_PktSetEncapsulatedFrame -- */ /** + * + * \ingroup Pkt + * \brief Set the encapsulation flag to indicate that the packet has + * an encapsulated frame. + * + * \param[in] pkt handle to set encapsulation flag on. + * + * \retval VMK_OK The encapsulation flag is set. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktSetEncapsulatedFrame(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktClearEncapsulatedFrame -- */ /** + * + * \ingroup Pkt + * \brief Clear the encapsulation flag from the given packet. + * + * \param[in] pkt handle to clear encapsulation flag on. + * + * \retval VMK_OK The encapsulation flag is cleared. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktClearEncapsulatedFrame(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktIsEncapsulatedFrame -- */ /** + * + * \ingroup Pkt + * \brief Check if the pkt has the encapsulation flag set. + * + * \param[in] pkt handle to check the encapsulation flag on. + * + * \retval VMK_TRUE Pkt has an encapsulated frame. + * \retval VMK_FALSE Pkt does not have an encapsulated frame. + * + *********************************************************************** + */ + +vmk_Bool vmk_PktIsEncapsulatedFrame(const vmk_PktHandle *pkt); + /* *********************************************************************** * vmk_PktCopyMetaData -- */ /** @@ -1092,6 +1227,8 @@ VMK_ReturnStatus vmk_PktAttrRegister(vmk_PktAttrProperties *properties, * system is actively using the attribute being deregistered before calling * into this function. * + * \note This function may block. + * * \param[in] regHandle Handle obtained from vmk_PktAttrRegister(). * * \retval VMK_OK Attribute successfully deregistered. @@ -1729,6 +1866,271 @@ VMK_ReturnStatus vmk_PktCopyBytesOut(vmk_uint8 *buffer, vmk_ByteCount length, vmk_uint32 offset, vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktAllocPage -- */ /** + * + * \ingroup Pkt + * \brief Allocate one page from the packet page pool. + * + * \note One page is allocated from the packet page pool according to the + * constraints. + * + * \param[in] mem Memory is allocated according to the + * constriants specified + * \param[out] page MPN of the allocated page + * + * \retval VMK_OK Allocation successful. + * \retval VMK_BAD_PARAM If Page is NULL. + * \retval VMK_NO_MEMORY Not enough memory in the page pool + * to satisfy the request. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktAllocPage(vmk_MemPhysAddrConstraint mem, + vmk_MPN *page); + +/* + *********************************************************************** + * vmk_PktFreePage -- */ /** + * + * \ingroup Pkt + * \brief Free one page allocated from the packet page pool + * back to it. + * + * \note The page must have been originally allocated through + * vmk_PktAllocPage() and not any other page allocation mechanism. The + * memory constraint must be same as the memory constraint used for the + * allocation. + * + * \param[in] mem Memory constraint used to allocate the page + * \param[in] page page that is being freed. + * + *********************************************************************** + */ +void vmk_PktFreePage(vmk_MemPhysAddrConstraint mem, + vmk_MPN page); + +/* + *********************************************************************** + * vmk_PktPageAppend -- */ /** + * + * \ingroup Pkt + * \brief Append a page to a packet + * + * This function appends a page to the packet at pktOffset + * + * If the pktOffset falls in the middle of an existing SG entry then + * that SG entry is truncated to the offset provided. Also if there are + * SG entries after this SG entry they are deleted and the pages are + * freed. The deleted SG entries should not be acessed after a call to + * this API. + * + * If the pktOffset corresponds to offset 0 of first SG entry then that + * SG entry is truncated to 0 length and the page is added at second SG + * entry. + * + * If the pktOffset corresponds to offset 0 of any SG entry other than + * the first SG entry, then the SG entry and any SG entries after that + * are deleted and the page is added in the same SG entry index. + * + * \pre vmk_PktIsBufDescWritable() must be VMK_TRUE for this packet. + * + * \pre Packet should only have page style SG's and not be a packet + * with other types of SG entries (vNIC backend packets etc.). + * The packet should have been created using vmk_PktAlloc*() by + * the caller before calling this API. You may not use this API + * to append pages to a packet allocated by vmkernel. + * + * \pre Packet must not have any clones or partial copies referring + * to it. + * + * \param[in] pkt Source packet. + * \param[in] page Page to be appended + * \param[in] pktOffset Offset in the source packet where the + * page is to be appended + * \param[in] pageOffset Offset in the page to be appended. + * \param[out] appendLen Length of the buffer in the page to be + * appended. + * + * \retval VMK_OK If the insertion was successful + * \retval VMK_READ_ONLY Packet can't be modified. Possible + * reasons are that the packet was + * allocated by the vmkernel or a + * partial copy or clone referring to + * the packet exists. + * \retval VMK_LIMIT_EXCEEDED pageOffset + appendLen larger than + * VMK_PAGE_SIZE or pkt's SG array is + * full. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktPageAppend(vmk_PktHandle *pkt, + vmk_MPN page, + vmk_ByteCountSmall pktOffset, + vmk_ByteCountSmall pageOffset, + vmk_ByteCountSmall appendLen); + +/* + *********************************************************************** + * vmk_PktSgArrayGet -- */ /** + * + * \ingroup Pkt + * \brief Returns pointer to the packet's SG array + * + * \note Do not modify the returned SgArray without going through the + * proper API + * + * \param[in] pkt Target packet + * + * \return Pointer to the SG array of the packet + * + *********************************************************************** + */ + +const vmk_SgArray *vmk_PktSgArrayGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktSgArrayTotalLenGet-- */ /** + * + * \ingroup Pkt + * \brief Retrieve the total length of the Sg array for the packet. + * + * The returned length is the sum of the lengths of each Sg element in + * the given packet's Sg array. + * + * \param[in] pkt Target packet. + * + * \return Sum of the lengths of the Sg array elements. + * + *********************************************************************** + */ + +vmk_ByteCountSmall vmk_PktSgArrayTotalLenGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktSgElemGet -- */ /** + * + * \ingroup Pkt + * \brief Returns pointer to the entryNum element in the packet's + * SG array + * + * \note Do not modify the returned SgElem without going through the + * proper API + * + * \param[in] pkt Target packet + * \param[in] entryIdx SG entry index + * + * \return Pointer to the SG entry on success, NULL if + * entryIdx was not found. + * + *********************************************************************** + */ + +const vmk_SgElem *vmk_PktSgElemGet(vmk_PktHandle *pkt, + vmk_uint16 entryIdx); + +/* + *********************************************************************** + * vmk_PktAppend -- */ /** + * + * \ingroup Pkt + * \brief Append frame contents from one vmk_PktHandle to another. + * + * The SG array length and SG element information of the destination + * packet might be modified as a result of this call. + * + * \note Once this function return VMK_OK, the source packet must not + * be used any more since its ownership has been transferred to + * the stack. + * + * \note srcOffset + appendLen must be less than or equal to the SG + * array total length of the source packet. + * + * \pre vmk_PktIsBufDescWritable() must be TRUE for dstPkt. + * + * \pre dstPkt should have been created using vmk_PktAlloc*() by + * the caller before calling this API. You may not use this API + * to append another packet to a packet created by the vmkernel. + * + * \pre dstPkt must not have any clones or partial copies referring + * to it. + * + * \pre dstPkt must not have any pages appended to it via + * vmk_PktPageAppend() prior to calling this API. + * + * \param[in] dstPkt Packet to append fragments into. + * \param[in] srcPkt Packet to append fragments from. + * \param[in] srcOffset Data offset from the beginning of source + * packet. + * \param[in] appendLen Number of bytes to be appended. + * + * \retval VMK_OK The fragments have sucessfully been + * appended. + * \retval VMK_BAD_PARAM Invalid srcOffset and/or appendLen. + * \retval VMK_LIMIT_EXCEEDED The destination packet doesn't have + * enough empty SG array entries for the + * append operation. + * \retval VMK_READ_ONLY dstPkt's SG array can not be modified, + * either because there are other packets + * referring to them or because dstPkt was + * allocated by the vmkernel. + * \retval VMK_NOT_SUPPORTED The source and destination packets are + * not compatible for appending, due to + * dstPkt having pages appended to it. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktAppend(vmk_PktHandle *dstPkt, + vmk_PktHandle *srcPkt, + vmk_ByteCountSmall srcOffset, + vmk_ByteCountSmall appendLen); + +/* + *********************************************************************** + * vmk_PktTrim -- */ /** + * + * \ingroup Pkt + * \brief Trim packet buffers + * + * This function will modify the SG array and remove all fragments from + * it that contain all bytes beyond bytesToKeep. The number of SG + * elements of the packet may be changed. In case bytesToKeep falls + * within the first fragment the frame mapped length + * (vmk_PktFrameMappedLenGet()) and frame mapped pointer + * (vmk_PktFrameMappedPointerGet()) values can also change. + * + * This operation is not reversible, buffer regions left out are no + * longer considered part of the packet's buffers. + * + * \note The caller has to make sure that buffers to be removed by + * this function have properly been released. + * + * \pre vmk_PktIsBufDescWritable() must be TRUE for pkt. + * + * \param[in] pkt Target packet. + * \param[in] bytesToKeep Byte offset to start trimming from. + * + * \retval VMK_OK The trim operation suceeded. + * \retval VMK_BAD_PARAM Invalid bytesToKeep. + * \retval VMK_READ_ONLY Packet can not be modified, either due + * to vmk_PktIsBufDescWritable() not being + * VMK_TRUE or because of completion + * requirements. Consider taking a partial + * copy prior to trimming. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktTrim(vmk_PktHandle *pkt, + vmk_ByteCountSmall bytesToKeep); + #endif /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pkt_header.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pkt_header.h new file mode 100644 index 0000000..8ba373c --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pkt_header.h @@ -0,0 +1,1061 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * PktHeader */ /** + * \addtogroup Network + *@{ + * \defgroup PktHeader Packet Header Utilities + *@{ + * \par Header Information + * + * VMKernel provides an API framework for accessing header information + * for a network packet represented by a vmk_PktHandle. For each header, + * information is exported in the form of a vmk_PktHeaderEntry, which + * contains offset and type data. Headers are parsed on-demand by the + * underlying backend implementation, significantly simplifying packet + * processing for users of this API framework.\n + *\n + * Amongst the functionality provided are API's to search for headers + * matching a given specification using vmk_PktHeaderFind(). Through + * the use of masks, it is possible to search for any header matching + * a certain layer, for example VMK_PKT_HEADER_L4_MASK can be used to + * search for any layer 4 header in the packet. Submasks are also + * provided, for example VMK_PKT_HEADER_L3_IPv6_EXT_HDR_MASK will match + * any IPv6 extension header. Of course, an explicit header type can + * be specified, such as VMK_PKT_HEADER_L4_TCP, which would search + * for a TCP header within the packet. Convenience functions such as + * vmk_PktHeaderL2Find() etc. are also provided.\n + *\n + * It is also possible to iterate through headers of a given packet + * using vmk_PktHeaderEntryGet(). Information about header lengths + * can be obtained using API's such as vmk_PktHeaderAllHeadersLenGet(). + * + * \par Providing Layout Information + * + * API's are provided in order to manipulate the header cache + * information associated with a particular packet. These API's can + * be used by the following sites: + * + * - Packet producers + *\n + * Any code that creates and injects packets into the VMKernel can + * optionally choose to pre-populate the header cache information + * for that packet, if the information is available. This helps + * optimize packet processing since the packet doesn't need to + * be parsed again. API's such as vmk_PktHeaderEntryInsert() or + * vmk_PktHeaderArrayGet() and vmk_PktHeaderArraySet() can be + * used for this purpose.\n + *\n + * - Header modifications + *\n + * Any code that modifies headers, either by changing the size of + * an existing header or by adding or removing headers from a + * packet MUST adjust the header cache to ensure that it is + * coherent. This can be done by invalidating the affected + * portions of the cache through use of API's such as + * vmk_PktHeaderInvalidateAll() etc. but this method is not + * preferred since it will cause the packet to be parsed again + * when another consumer of this API requests a lookup. It is + * recommended to use API's such as vmk_PktHeaderIncOffsets(), + * vmk_PktHeaderPushForEncap() and vmk_PktHeaderEntryInsert() + * to adjust the header cache manually for best results. + * + * \par Encapsulated Packets + * + * The parsing framework supports encapsulated headers as well. + * vmk_PktHeaderFind() accepts a hitCount argument which can be used to + * find the second occurance of a given header, for example the second + * L4 header etc. vmk_PktHeaderEncapFind() can be used to find an + * encapsulation header within the packet, provided one exists. API's + * such as vmk_PktHeaderInnerHeadersLenGet() and + * vmk_PktHeaderOuterHeadersLenGet() return the length of the inner or + * outer headers in the case of an encapsulated frame. + * + * \par Header Access + * + * This framework also provides the methods vmk_PktHeaderDataGet() and + * vmk_PktHeaderDataRelease() which are recommended ways of accessing + * header data. These functions take care of issues such as headers + * not being in the frame mapped area (and thus requiring mapping) or + * even situations such as a header spanning multiple SG entries, in + * which case the header needs to be copied to be accessed directly + * through casting to a header structure. The functions allow read + * access and write access as long as header size is not modified. + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_PKT_HEADER_H_ +#define _VMKAPI_NET_PKT_HEADER_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_pkt.h" + +/** + * \ingroup PktHeader + * \enum vmk_PktHeaderType + * \brief Packet header type used by the parsing infrastructure + */ +typedef enum vmk_PktHeaderType { + /** Layer 2 mask - matches all layer 2 headers */ + VMK_PKT_HEADER_L2_MASK = 0x1000, + /** Ethernet header mask - matches all ethernet headers */ + VMK_PKT_HEADER_L2_ETHERNET_MASK = 0x1800, + /** Simple DIX Ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET = 0x1801, + /** 802.1pq Ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_802_1PQ = 0x1802, + /** 802.3 Ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_802_3 = 0x1803, + /** 802.3 in 802.1pq Ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_802_1PQ_802_3 = 0x1804, + /** Fenced ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_FENCED = 0x1805, + /** DVFilter ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_DVFILTER = 0x1806, + + /** Layer 3 mask - matches all layer 3 headers */ + VMK_PKT_HEADER_L3_MASK = 0x2000, + /** IP version 4 header */ + VMK_PKT_HEADER_L3_IPv4 = 0x2001, + /** IP version 6 header */ + VMK_PKT_HEADER_L3_IPv6 = 0x2002, + /** Mask matching all IPv6 extension headers */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_MASK = 0x2800, + /** IPv6 extension header: Hop-by-hop options */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_HOP = 0x2801, + /** IPv6 extension header: Destination options */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_DST = 0x2802, + /** IPv6 extension header: Routing header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_ROUT = 0x2803, + /** IPv6 extension header: Fragment header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_FRAG = 0x2804, + /** IPv6 extension header: Authentication header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_AH = 0x2805, + /** IPv6 extension header: Encapsulation Security Payload header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_ESP = 0x2806, + /** IPv6 extension header: Mobility header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_MOB = 0x2807, + + /** Layer 4 mask - matches all layer 4 headers */ + VMK_PKT_HEADER_L4_MASK = 0x4000, + /** Transmission Control Protocol */ + VMK_PKT_HEADER_L4_TCP = 0x4001, + /** User Datagram Protocol */ + VMK_PKT_HEADER_L4_UDP = 0x4002, + /** Protocol Independent Multicast */ + VMK_PKT_HEADER_L4_PIM = 0x4003, + /** Mask matching ICMP version 4 and version 6 */ + VMK_PKT_HEADER_L4_ICMP_MASK = 0x4800, + /** Internet Control Message Protocol v4 */ + VMK_PKT_HEADER_L4_ICMPV4 = 0x4801, + /** Internet Control Message Protocol v6 */ + VMK_PKT_HEADER_L4_ICMPV6 = 0x4802, + + /** Encapsulation header mask - matches all encapsulation headers */ + VMK_PKT_HEADER_ENCAP_MASK = 0x8000, + /** VXLAN header */ + VMK_PKT_HEADER_ENCAP_VXLAN = 0x8001, + /** GRE header */ + VMK_PKT_HEADER_ENCAP_GRE = 0x8002, +} vmk_PktHeaderType; + +/** Header bits used for type masks */ +#define VMK_PKT_HEADER_TYPE_MASK_BITS (0xff00) + +/** Given a header, return its type mask bits */ +#define VMK_PKT_HEADER_GET_TYPE_MASK(type) \ + ((type) & VMK_PKT_HEADER_TYPE_MASK_BITS) + +/** Check whether the given type matches a type mask */ +#define VMK_PKT_HEADER_TYPE_CHECK(type, mask) \ + (VMK_PKT_HEADER_GET_TYPE_MASK(type) == (mask)) + +/** Header bits used for layer masks */ +#define VMK_PKT_HEADER_LAYER_MASK_BITS (0xf000) + +/** Given a header, return its layer mask bits */ +#define VMK_PKT_HEADER_GET_LAYER_MASK(type) \ + ((type) & VMK_PKT_HEADER_LAYER_MASK_BITS) + +/** Check whether the given type matches a layer mask */ +#define VMK_PKT_HEADER_LAYER_CHECK(type, mask) \ + (VMK_PKT_HEADER_GET_LAYER_MASK(type) == (mask)) + +/** Macro to determine whether a mask is a layer mask vs. a type mask */ +#define VMK_PKT_HEADER_MASK_IS_LAYER(mask) \ + (((mask) | VMK_PKT_HEADER_LAYER_MASK_BITS) == VMK_PKT_HEADER_LAYER_MASK_BITS) + +/** + * Check whether the given type matches with a mask. Does a different + * check depending on whether the mask is a layer mask vs. a type mask + */ +#define VMK_PKT_HEADER_MASK_CHECK(type, mask) \ + (VMK_PKT_HEADER_MASK_IS_LAYER(mask) ? \ + VMK_PKT_HEADER_LAYER_CHECK(type, mask) : \ + VMK_PKT_HEADER_TYPE_CHECK(type, mask)) + +/** Macro to return whether a given header type is an L2 header type */ +#define VMK_PKT_HEADER_IS_L2(type) \ + VMK_PKT_HEADER_LAYER_CHECK(type, VMK_PKT_HEADER_L2_MASK) + +/** Macro to return whether a given header type is an L3 header type */ +#define VMK_PKT_HEADER_IS_L3(type) \ + VMK_PKT_HEADER_LAYER_CHECK(type, VMK_PKT_HEADER_L3_MASK) + +/** Macro to return whether a given header type is an L4 header type */ +#define VMK_PKT_HEADER_IS_L4(type) \ + VMK_PKT_HEADER_LAYER_CHECK(type, VMK_PKT_HEADER_L4_MASK) + +/** Macro to return whether a given header type is an encapsulation header type */ +#define VMK_PKT_HEADER_IS_ENCAP(type) \ + (VMK_PKT_HEADER_LAYER_CHECK(type, VMK_PKT_HEADER_ENCAP_MASK) || \ + ((type) == VMK_PKT_HEADER_L2_ETHERNET_FENCED)) + +/** Protocol is a "toplevel" protocol */ +#define VMK_PKT_PROTO_TOPLEVEL 0xFFFD +/** Protocol is unknown */ +#define VMK_PKT_PROTO_UNKNOWN 0xFFFE +/** There are no more headers after this header */ +#define VMK_PKT_PROTO_NO_MORE_HEADERS 0xFFFF + +/** + * \ingroup PktHeader + * \struct vmk_PktHeaderEntry + * \brief Entry structure describing one packet header + */ +typedef struct vmk_PktHeaderEntry { + /** vmk_PktHeaderType of this header */ + vmk_uint16 type; + /** Offset of this header from start of frame */ + vmk_uint16 offset; + /** Parser-dependent output defining next header's protocol + * VMK_PKT_PROTO_NO_MORE_HEADERS is a reserved value indicating there are no + * more headers, VMK_PKT_PROTO_UNKNOWN is a reserved value indicating that + * the provider of this entry did not specify the next protocol. This can + * happen if the provider is a NIC driver or vNIC backend and it doesn't know + * the next protocol. In this case the parsing infrastructure will re-parse + * this header if necessary to determine the next header. */ + vmk_uint16 nextHdrProto; + /** Offset of the next header from start of frame */ + vmk_uint16 nextHdrOffset; +} vmk_PktHeaderEntry; + +/* + *********************************************************************** + * vmk_PktHeaderEntryGet -- */ /** + * + * \ingroup PktHeader + * \brief Get the vmk_PktHeaderEntry for the header with the specified + * index. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * + * \param[in] pkt Packet to get header information from. + * \param[in] hdrIndex Index of the header to get. + * \param[out] hdrEntry Pointer to the header entry for the requested + * header. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_LIMIT_EXCEEDED Header index out of bounds. + * \retval VMK_FAILURE Parsing failure. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderEntryGet(vmk_PktHandle *pkt, + vmk_uint16 hdrIndex, + vmk_PktHeaderEntry **hdrEntry); + +/* + *********************************************************************** + * vmk_PktHeaderLength -- */ /** + * + * \ingroup PktHeader + * \brief Returns the length of the header represented by the given + * entry. + * + * \param[in] hdrEntry Entry to return header length of. + * + * \return Length of the header, 0 if not available. + * + *********************************************************************** + */ +static inline vmk_uint16 +vmk_PktHeaderLength(vmk_PktHeaderEntry *hdrEntry) +{ + VMK_ASSERT(hdrEntry != NULL); + return hdrEntry->nextHdrOffset - hdrEntry->offset; +} + +/* + *********************************************************************** + * vmk_PktHeaderNumParsedGet -- */ /** + * + * \ingroup PktHeader + * \brief Return number of parsed headers in the given packet + * + * \param[in] pkt Packet to get header information from. + * + * \return Number of parsed headers in the packet. + * + *********************************************************************** + */ +vmk_uint16 vmk_PktHeaderNumParsedGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktHeaderFind -- */ /** + * + * \ingroup PktHeader + * \brief Search for a header matching the given mask and return it. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[in] startIndex Index to start searching from (0 = first header) + * \param[in] searchMask Mask to match against. This could be a generic + * mask such as VMK_PKT_HEADER_L3_MASK as well as + * a specific header type like + * VMK_PKT_HEADER_L4_TCP. + * \param[in] hitCount 1 = return first matching header, 2 = second + * matching header etc. + * \param[out] hdrEntry Pointer to the header entry for the requested + * header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderFind(vmk_PktHandle *pkt, + vmk_uint16 startIndex, + vmk_PktHeaderType searchMask, + vmk_uint16 hitCount, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderL2Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 2 header in the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the first L2 + * header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +static inline VMK_ReturnStatus +vmk_PktHeaderL2Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex) +{ + return vmk_PktHeaderFind(pkt, 0, VMK_PKT_HEADER_L2_MASK, 1, hdrEntry, + hdrIndex); +} + +/* + *********************************************************************** + * vmk_PktHeaderL3Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 3 header in the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the first L3 + * header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +static inline VMK_ReturnStatus +vmk_PktHeaderL3Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex) +{ + return vmk_PktHeaderFind(pkt, 1, VMK_PKT_HEADER_L3_MASK, 1, hdrEntry, + hdrIndex); +} + +/* + *********************************************************************** + * vmk_PktHeaderL4Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 4 header in the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the first L4 + * header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +static inline VMK_ReturnStatus +vmk_PktHeaderL4Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex) +{ + return vmk_PktHeaderFind(pkt, 2, VMK_PKT_HEADER_L4_MASK, 1, hdrEntry, + hdrIndex); +} + +/* + *********************************************************************** + * vmk_PktHeaderAllHeadersLenGet -- */ /** + * + * \ingroup PktHeader + * \brief Returns the length of all headers of the given packet + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to return header length for. + * \param[out] hdrLength Pointer for returning header length + * + * \retval VMK_OK Operation was successful. + * \retval VMK_FAILURE Parsing failure. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PktHeaderAllHeadersLenGet(vmk_PktHandle *pkt, + vmk_uint32 *hdrLength); + +/* + *********************************************************************** + * vmk_PktHeaderInnerHeadersLenGet -- */ /** + * + * \ingroup PktHeader + * \brief Returns the total header length of the inner frame in a given + * packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \note The inner frame is defined as a frame that is contained within + * another frame. Inner headers are all headers that come after + * an encapsulation header in the following list: + * - VMK_PKT_HEADER_L2_ETHERNET_FENCED + * - VMK_PKT_HEADER_ENCAP_VXLAN + * - VMK_PKT_HEADER_ENCAP_GRE + * + * \param[in] pkt Packet to return header length for. + * \param[out] hdrLength Pointer for returning header length + * + * \retval VMK_OK Operation was successful. + * \retval VMK_FAILURE Parsing failure. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PktHeaderInnerHeadersLenGet(vmk_PktHandle *pkt, + vmk_uint32 *hdrLength); + +/* + *********************************************************************** + * vmk_PktHeaderOuterHeadersLenGet -- */ /** + * + * \ingroup PktHeader + * \brief Returns the total header length of the outer frame in a given + * packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \note The outer frame is defined as a frame that contains another + * frame within itself. Outer headers are all headers that come + * before an encapsulation header from the following list: + * - VMK_PKT_HEADER_L2_ETHERNET_FENCED + * - VMK_PKT_HEADER_ENCAP_VXLAN + * - VMK_PKT_HEADER_ENCAP_GRE + * + * \note The length of the encapsulation header is also part of the + * hdrLength returned. + * + * \param[in] pkt Packet to return header length for. + * \param[out] hdrLength Pointer for returning header length + * + * \retval VMK_OK Operation was successful. + * \retval VMK_FAILURE Parsing failure. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PktHeaderOuterHeadersLenGet(vmk_PktHandle *pkt, + vmk_uint32 *hdrLength); + +/* + *********************************************************************** + * vmk_PktHeaderEncapFind -- */ /** + * + * \ingroup PktHeader + * \brief Find the first encapsulation header in the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \note This function will also find fence headers designated with + * VMK_PKT_HEADER_L2_ETHERNET_FENCED + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the first + * encapsulation header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PktHeaderEncapFind(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderEncapL2Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 2 header in the encapsulated (inner) + * frame of the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the encapsulated + * L2 header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PktHeaderEncapL2Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderEncapL3Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 3 header in the encapsulated (inner) + * frame of the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the encapsulated + * L3 header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PktHeaderEncapL3Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderEncapL4Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 4 header in the encapsulated (inner) + * frame of the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the encapsulated + * L4 header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PktHeaderEncapL4Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderInvalidateIndex -- */ /** + * + * \ingroup PktHeader + * \brief Invalidate all parsed headers starting from a given index. + * + * This function (or a more general version) needs to be called by code + * which modifies frame headers on a packet. + * + * \param[in] pkt Packet to invalidate headers of. + * \param[in] hdrIndex Index to start invalidating from (0 = all headers) + * + * \retval VMK_BAD_PARAM hdrIndex out of bounds. + * \retval VMK_OK Operation was successful. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderInvalidateIndex(vmk_PktHandle *pkt, + vmk_uint16 hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderInvalidateAll -- */ /** + * + * \ingroup PktHeader + * \brief Invalidate all parsed headers on a packet. + * + * This function (or a more granular version) needs to be called by code + * which modifies frame headers on a packet. + * + * \param[in] pkt Packet to invalidate headers of. + * + * \retval VMK_OK Operation was successful. + * + *********************************************************************** + */ +static inline VMK_ReturnStatus +vmk_PktHeaderInvalidateAll(vmk_PktHandle *pkt) +{ + return vmk_PktHeaderInvalidateIndex(pkt, 0); +} + +/* + *********************************************************************** + * vmk_PktHeaderInvalidateOffset -- */ /** + * + * \ingroup PktHeader + * \brief Invalidate all parsed headers starting from a given byte + * offset. + * + * This function (or a more general version) needs to be called by code + * which modifies frame headers on a packet. + * + * \param[in] pkt Packet to invalidate headers of. + * \param[in] offset Byte offset to start invalidating from. + * + * \retval VMK_OK Operation was successful. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderInvalidateOffset(vmk_PktHandle *pkt, + vmk_uint16 offset); + +/* + *********************************************************************** + * vmk_PktHeaderIncOffsets -- */ /** + * + * \ingroup PktHeader + * \brief Increment all header offsets by the specified amount starting + * from the given header. + * + * Note that for the first header (ie. the one at hdrIndex) only the + * nextHdrOffset is incremented by offset. For all subsequent headers, + * both offset and nextHdrOffset are incremented. + * + * This function (or a more general version) needs to be called by code + * which modifies frame headers on a packet. + * + * \param[in] pkt Packet to invalidate headers of. + * \param[in] hdrIndex Index of header to start incrementing offsets + * from. + * \param[in] offset Number of bytes to increment offsets by. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_BAD_PARAM hdrIndex out of bounds. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderIncOffsets(vmk_PktHandle *pkt, + vmk_uint16 hdrIndex, + vmk_uint16 offset); + +/* + *********************************************************************** + * vmk_PktHeaderPushForEncap -- */ /** + * + * \ingroup PktHeader + * \brief Push all the parsed headers in the packet by the specified + * amounts in preparation for prepending encapsulation headers. + * + * All headers which are already parsed are shifted by numHeaders slots + * forward and their offsets are incremented by encapLen. If necessary + * the header cache array may be reallocated to accomodate the new + * headers. + * + * \param[in] pkt Packet to adjust header cache for. + * \param[in] numHeaders Number of encapsulation headers that will be + * prepended to the packet. + * \param[in] encapLen Total length of the encapsulation headers. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NO_MEMORY Couldn't grow packet header cache. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderPushForEncap(vmk_PktHandle *pkt, + vmk_uint16 numHeaders, + vmk_uint16 encapLen); + +/* + *********************************************************************** + * vmk_PktHeaderPullForDecap -- */ /** + * + * \ingroup PktHeader + * \brief Pull all the parsed headers in the packet by the specified + * amounts after decapsulation of headers. + * + * All headers which are already parsed are shifted by numHeaders slots + * back and their offsets are decremented by decapLen. + * + * \param[in] pkt Packet to adjust header cache for. + * \param[in] numHeaders Number of encapsulation headers that were + * removed from the packet. + * \param[in] decapLen Total length of the encapsulation headers. + * + * \retval VMK_OK Operation was successful. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderPullForDecap(vmk_PktHandle *pkt, + vmk_uint16 numHeaders, + vmk_uint16 decapLen); + +/* + *********************************************************************** + * vmk_PktHeaderDataGet -- */ /** + * + * \ingroup PktHeader + * \brief Returns a pointer to the specified header, mapping or copying + * the header if needed. + * + * \note Any modifications of header data requires a corresponding + * vmk_PktHeaderInvalidate* call to invalidate header parsing + * results. + * + * \param[in] pkt Packet to get header data from. + * \param[in] entry Header entry to get a pointer to. + * \param[out] mappedPtr Mapped pointer to requested header data. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_FAILURE Mapping or copying failed. + * \retval VMK_NO_MEMORY Failed to allocate memory for header copy. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderDataGet(vmk_PktHandle *pkt, + vmk_PktHeaderEntry *entry, + void **mappedPtr); + +/* + *********************************************************************** + * vmk_PktHeaderDataRelease -- */ /** + * + * \ingroup PktHeader + * \brief Releases a mapping obtained with vmk_PktHeaderDataGet() + * + * \param[in] pkt Packet mappedPtr refers to. + * \param[in] entry Header entry mappedPtr refers to. + * \param[in] mappedPtr Mapped pointer to release. + * \param[in] modified Whether the header was modified. + * + * \note In order to modify the header vmk_PktIsBufDescWritable() must + * be true for the packet. If a modification was performed then + * the modified parameter needs to be set to VMK_TRUE since the + * underlying infrastructure may need to copy header contents + * from a temporary buffer back into the original frame buffers. + * + * \note This API doesn't support modification of header length, so + * any header modifications must preserve the original header + * length since only the original header is guaranteed to be + * mapped. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_READ_ONLY modified set to TRUE for a packet which has + * vmk_PktIsBufDescWritable() as VMK_FALSE + * \retval VMK_FAILURE Failed to copy modified header contents + * back into frame buffers. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderDataRelease(vmk_PktHandle *pkt, + vmk_PktHeaderEntry *entry, + void *mappedPtr, + vmk_Bool modified); + +/* + *********************************************************************** + * vmk_PktHeaderArrayLenGet -- */ /** + * + * \ingroup PktHeader + * \brief Return the number of entries in the given packet's header + * entries array + * + * \param[in] pkt Packet to return array length. + * + * \return Length of the packet's header entry array + * + *********************************************************************** + */ +vmk_uint16 vmk_PktHeaderArrayLenGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktHeaderArrayGet -- */ /** + * + * \ingroup PktHeader + * \brief Return the given packet's header entries array for direct + * modification. + * + * This function is intended for use by NIC drivers or other packet + * producing code paths that have pre-existing knowledge of the header + * layout for the packet, and thus would like to fill the information + * in for the benefit of the rest of the stack. + * + * \see vmk_PktHeaderArrayLenGet() for obtaining the length of this + * array. + * + * \param[in] pkt Packet to return the header entry array. + * + * \return Packet's header entry array + * + *********************************************************************** + */ +vmk_PktHeaderEntry *vmk_PktHeaderArrayGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktHeaderArrayAlloc -- */ /** + * + * \ingroup PktHeader + * \brief Allocate a new header entry array to associate with a packet. + * + * This function can be used to grow a packet's header entry array if + * the current array length is insufficient to populate all the header + * information. + * + * \see vmk_PktHeaderArraySet() to associate this array with a packet. + * + * \param[in] numEntries Desired number of header entries in the + * allocated array. + * + * \return Allocated array, NULL if allocation fails. + * + *********************************************************************** + */ +vmk_PktHeaderEntry *vmk_PktHeaderArrayAlloc(vmk_uint16 numEntries); + +/* + *********************************************************************** + * vmk_PktHeaderArraySet -- */ /** + * + * \ingroup PktHeader + * \brief Associate the given header entry array with the given packet. + * + * This function is intended for use by NIC drivers or other packet + * producing code paths that have pre-existing knowledge of the header + * layout for the packet, and thus would like to fill the information + * in for the benefit of the rest of the stack. + * + * \note The array needs to have been allocated with + * vmk_PktHeaderArrayAlloc() + * + * \note This function will free the existing array if necessary. + * + * \param[in] pkt Packet to replace its header entry array. + * \param[in] hdrEntry Header entry array to set. + * \param[in] numEntries Size of the hdrEntry array. + * \param[in] usedEntries Number of entries in hdrEntry that are actually + * used, ie. have valid header data populated. + * + * \retval VMK_OK Operation successful. + * \retval VMK_BAD_PARAM Invalid parameter(s) specified. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderArraySet(vmk_PktHandle *pkt, + vmk_PktHeaderEntry *hdrEntry, + vmk_uint16 numEntries, + vmk_uint16 usedEntries); + +/* + *********************************************************************** + * vmk_PktHeaderEntryInsert -- */ /** + * + * \ingroup PktHeader + * \brief Insert a new header entry to the packet at the specified header + * index. + * + * This function is intended for use by NIC drivers or other packet + * producing code paths that have pre-existing knowledge of the header + * layout for the packet, and thus would like to fill the information + * in for the benefit of the rest of the stack. + * + * \note All headers after hdrIndex are modified to reflect the offset + * changes due to insertion of an additional header. + * + * \note The caller must take care to provide correct values for ALL + * hdrEntry fields including nextHdrProto. Failure to do so may + * result in an unparsable packet. + * + * \param[in] pkt Packet to add a header entry to. + * \param[in] hdrEntry Header entry to add. + * \param[in] hdrIndex Index to add the header entry at (0 = first). + * + * \retval VMK_OK Operation successful. + * \retval VMK_NO_MEMORY Not enough memory to grow header array + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderEntryInsert(vmk_PktHandle *pkt, + vmk_PktHeaderEntry *hdrEntry, + vmk_uint16 hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderEntryRemove -- */ /** + * + * \ingroup PktHeader + * \brief Removes a header entry from the packet at the specified header + * index. + * + * This function is intended for use by NIC drivers or other packet + * producing code paths that have pre-existing knowledge of the header + * layout for the packet, and thus would like to fill the information + * in for the benefit of the rest of the stack. + * + * \note All headers after hdrIndex are pulled back one slot and modified + * to reflect the offset changes due to removal of the header. + * + * \note If the header being removed is not at index 0, the caller has + * to take care of fixing the nextHdrProto field of the header + * at (hdrIndex - 1) to properly describe the protocol for the + * header at (hdrIndex + 1) before the header at hdrIndex was + * removed. + * + * \param[in] pkt Packet to add a header entry to. + * \param[in] hdrIndex Index to remove the header entry from (0 = first). + * + * \retval VMK_OK Operation successful. + * \retval VMK_LIMIT_EXCEEDED hdrIndex out of bounds, only currently + * parsed headers can be removed. + * \see vmk_PktHeaderNumParsedGet() + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderEntryRemove(vmk_PktHandle *pkt, + vmk_uint16 hdrIndex); + +#endif +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pktlist.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pktlist.h index 3c18cfd..e382df4 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pktlist.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pktlist.h @@ -368,7 +368,6 @@ void vmk_PktListIterFree(vmk_PktListIter iter); * vmk_PktListIterStart -- */ /** * * \ingroup PktList - * \ingroup PktList * \brief Set an iterator at the beginning of a packet list. * * \param[in] iter Packet iterator. @@ -629,6 +628,7 @@ VMK_ReturnStatus vmk_PktListIterSplitListAfter(vmk_PktListIter iter, VMK_ReturnStatus vmk_PktListIterSplitListBefore(vmk_PktListIter iter, vmk_PktList *splitList); + /* *********************************************************************** * vmk_PktListClone -- */ /** @@ -707,13 +707,31 @@ void vmk_PktListAppend(vmk_PktList dstList, void vmk_PktListPrepend(vmk_PktList dstList, vmk_PktList srcList); +/* + *********************************************************************** + * vmk_PktListReleaseIRQ -- */ /** + * + * \ingroup PktList + * \brief Release all resources of a given vmk_PktList from an + * interrupt context. + * + * \param[in] pktList Packet List to be released. + * + * \retval None + * + *********************************************************************** + */ + +void vmk_PktListReleaseIRQ(vmk_PktList pktList); + /* *********************************************************************** * vmk_PktListReleaseAllPkts -- */ /** * * \ingroup PktList - * \brief Release all the packets and empty the list. + * \brief Release all the packets and empty the list. This function should + * not be used from a panic context.Use vmk_PktReleasePanic instead. * * \param[in] list Target list * @@ -751,6 +769,28 @@ void vmk_PktListReleaseAllPkts(vmk_PktList list); VMK_ReturnStatus vmk_PktTcpSegmentation(vmk_PktHandle *pkt, vmk_PktList list); +/* + *********************************************************************** + * vmk_PktListSplitBySrcPortID -- */ /** + * + * \brief Split a packet list into two sub list by source port ID. + * + * Go through the packet list till two consecutive pkts have different + * source portIDs and split the list at that point. + * + * \note Caller must initialize outList. + * + * \param[in] pktList The list to split and the remaining packets. + * \param[out] outList The packet list with consecutive source portIDs. + * \param[out] portID The corresponding port ID. + * + *********************************************************************** + */ + +void vmk_PktListSplitBySrcPortID(vmk_PktList pktList, + vmk_PktList outList, + vmk_SwitchPortID *portID); + #endif /* _VMKAPI_NET_PKTLIST_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_poll.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_poll.h new file mode 100644 index 0000000..90aa745 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_poll.h @@ -0,0 +1,539 @@ +/* ********************************************************** + * Copyright 2006-2010,2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * NetPoll */ /** + * \addtogroup Network + *@{ + * \defgroup NetPoll NetPoll + *@{ + * + * \par NetPoll: + * + * Create and access poll data structure for network devices. The net + * poll routine polls packet from the device and pushes those packets + * up the stack. It also performs tx completions for the device. + * + * The poll is initialized using vmk_NetPollCreate and takes two + * callbacks. The first callback is used to poll packets from the + * network device. Once the packets has been polled, the net poll + * routine will either use the default push processing or call the + * second callback to do custom push processing for these packets. + * Once the poll is activated it will run while there are packets to + * be processed. + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_POLL_H_ +#define _VMKAPI_NET_POLL_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" +#include "net/vmkapi_net_pktlist.h" + +/** + * \ingroup NetPoll + * \brief Net poll features. + */ +typedef enum { + /** + * \brief Use default push routine. + */ + VMK_NETPOLL_NONE = 0, + + /** + * \brief Use custom push routine. + */ + VMK_NETPOLL_CUSTOM_DELIVERY_CALLBACK = 1, +} vmk_NetPollFeatures; + +/** + * \ingroup NetPoll + * \brief Net poll state. + */ +typedef enum { + /** + * \brief Net poll is disabled. + */ + VMK_NETPOLL_DISABLED = 0, + + /** + * \brief Net poll is running or scheduled. + */ + VMK_NETPOLL_ACTIVE = 1, +} vmk_NetPollState; + + +/** + * \brief Net poll object. + */ +typedef struct vmk_NetPollInt *vmk_NetPoll; + +/* + *********************************************************************** + * vmk_NetPollCallback -- */ /** + * + * \ingroup NetPoll + * \brief Poll routine for the device + * + * \param[in] priv Private data structure for device poll routine. + * \param[in] budget Maximum number of packets to be processed in + * each invocation + * + * \retval Whether to poll the device for more packets. + * + *********************************************************************** + */ + +typedef vmk_Bool (*vmk_NetPollCallback) (vmk_AddrCookie priv, + vmk_uint32 budget); + +/* + *********************************************************************** + * vmk_NetPollDeliveryCallback -- */ /** + * + * \ingroup NetPoll + * \brief Custom push routine for processing the packets received. + * + * \param[in] rxPktList Packet list for the custom push routine. + * \param[in] priv Private data structure for device poll routine + * + *********************************************************************** + */ + +typedef void (*vmk_NetPollDeliveryCallback) (vmk_PktList rxPktList, + vmk_AddrCookie priv); + +/** + * \ingroup NetPoll + * \brief Net poll initialization variables. + */ + +typedef struct vmk_NetPollProperties { + /** + * \brief Device poll routine. + */ + vmk_NetPollCallback poll; + + /** + * \brief Custom device push routine. + * + * If this parameter is not NULL and + * NETPOLL_CUSTOM_DELIVERY_Callback is set in the + * features parameter then packets + * will NOT be pushed up to the vmkernel + * networking stack, they will be passed to this + * callback instead. + */ + vmk_NetPollDeliveryCallback deliveryCallback; + + /** + * \brief Poll private data handler. + */ + vmk_AddrCookie priv; + + /** + * \brief Poll features. + */ + vmk_NetPollFeatures features; +} vmk_NetPollProperties; + +/* + *********************************************************************** + * vmk_NetPollActivate -- */ /** + * + * \ingroup NetPoll + * \brief Activate the poll thread. + * + * The poll thread calls the device callback for polling packets. + * These packets are pushed up the stack by the default push routine + * or the custom callback used during the initialization. The poll + * thread continues to push packets while the device has pending packets. + * + * \param[in] netPoll Handler for the net poll. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid poll context. + * \retval VMK_FAILURE Poll could not be activated. + + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollActivate(vmk_NetPoll netPoll); + +/* + *********************************************************************** + * vmk_NetPollDeliveryCallbackSet -- */ /** + * + * \ingroup NetPoll + * \brief Set new delivery callback for net poll handler. + * + * Net poll routine will use the new callbacks. + * + * \param[in] netPoll Handler for the net poll. + * \param[in] init New properties for the poll handler. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid poll context. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollDeliveryCallbackSet(vmk_NetPoll netPoll, + vmk_NetPollProperties *init); + +/* + *********************************************************************** + * vmk_NetPollDeliveryCallbackClear -- */ /** + * + * \ingroup NetPoll + * \brief Clear new delivery callback for net poll handler. + * + * Net poll routine will use the new callbacks. + * + * \param[in] netPoll Handler for the net poll. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid poll context. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollDeliveryCallbackClear(vmk_NetPoll netPoll); + + +/* + *********************************************************************** + * vmk_NetPollCheckState -- */ /** + * + * \ingroup NetPoll + * \brief Get the poll state. + * + * The state indicates whether the poll is active or suspended. + * + * \param[in] netPoll Handler for the net poll. + * \param[out] state The state of the poll. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid poll context. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollCheckState(vmk_NetPoll netPoll, + vmk_NetPollState *state); + +/* + *********************************************************************** + * vmk_NetPollDestroy -- */ /** + * + * \ingroup NetPoll + * \brief Destroy the poll thread. + * + * Destroys the netpoll synchronously by waiting for any active netpoll + * context to complete processing packets and issueing poll callbacks + * + * \param[in] netPoll Handler for the net poll. + * + *********************************************************************** + */ + +void vmk_NetPollDestroy(vmk_NetPoll netPoll); + +/* + ************************************************************************ + * vmk_NetPollGetCurrent -- */ /** + * + * \ingroup NetPoll + * \brief Get the current executing net poll context. + * + * \param[out] netPoll Handler for the poll. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid poll context. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollGetCurrent(vmk_NetPoll *netPoll); + +/* + ************************************************************************ + * vmk_NetPollGetPrivate -- */ /** + * + * \ingroup NetPoll + * \brief Return the private data registered for the device callback. + * + * \param[in] netPoll Handler for the net poll. + * + * \return Void address registered with the + * device callback. + * + *********************************************************************** + */ + +vmk_AddrCookie vmk_NetPollGetPrivate(vmk_NetPoll netPoll); + +/* + *********************************************************************** + * vmk_NetPollCreate -- */ /** + * + * \brief Create a net poll + * + * \param[in] pollInit Poll initialization parameters. + * \param[in] id Vmkernel service account. + * \param[in] moduleID module ID + * \param[out] poll Handler for the net poll. + * + * \retval VMK_OK Success. + * \retval VMK_NO_MEMORY Cannot allocate net poll resource. + * \retval VMK_FAILURE Poll initialization failed. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollCreate(vmk_NetPollProperties *pollInit, + vmk_ServiceAcctID id, + vmk_ModuleID moduleID, + vmk_NetPoll *poll); + +/* + *********************************************************************** + * vmk_NetPollRxPktQueue -- */ /** + * + * \ingroup NetPoll + * \brief Queue packets received from the NIC. + * + * \pre The poll should be in active state. + * + * \param[in] netPoll Handler for the net poll. + * \param[in] pkt Packet to be queued. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid poll handle. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollRxPktQueue(vmk_NetPoll netPoll, + vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_NetPollQueueCompPkt -- */ /** + * + * \ingroup NetPoll + * \brief Queue packets for tx completion or queue received packets that + * need to be released on error. + * + * \pre The poll should be in active state. + * + * \param[in] netPoll Handler for the net poll. + * \param[in] pkt Packet to be queued. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid poll handle. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollQueueCompPkt(vmk_NetPoll netPoll, + vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_NetPollInterruptSet -- */ /** + * + * \ingroup NetPoll + * \brief Set the associated interrupt cookie with the poll. + * + * Vmkernel can have an interrupt cookie be associated with the network + * poll so that the interrupt handler can be affinitized with the poll + * routine. + * + * \param[in] netPoll Handler for the net poll. + * \param[in] intrCookie Interrupt cookie. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid Poll handle. + * \retval VMK_BAD_PARAM If invalid interrupt cookie specified or + * cookie could not be controlled. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollInterruptSet(vmk_NetPoll netPoll, + vmk_IntrCookie intrCookie); + +/* + *********************************************************************** + * vmk_NetPollInterruptUnSet -- */ /** + * + * \ingroup NetPoll + * \brief Clear the interrupt cookie registered with the poll. + * + * \param[in] netPoll Handler for the net poll. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid Poll handle. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollInterruptUnSet(vmk_NetPoll netPoll); + +/* + *********************************************************************** + * vmk_NetPollRegisterUplink -- */ /** + * + * \ingroup NetPoll + * \brief Register the uplink for the poll. + * + * Each poll requires uplink port if they are to use the poll callback. + * However if the device provides its own custom callback, no + * registration for uplink is required. + * + * A poll can have just one uplink be registered. Adding another uplink + * will return error. However an uplink can be shared by multiple + * net polls. But the uplink can have only one default poll registered. + * The default poll is registered using the defaultPoll during the + * initialization process. Once a default poll is registered it cannot + * be overwritten. + * + * \param[in] netPoll Handler for the net poll. + * \param[in] uplink Uplink from where the packets came from. + * \param[in] name Descriptive name for the poll. + * \param[in] defaultPoll Whether the net poll is default poll for + * the NIC. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM Invalid uplink assignment. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollRegisterUplink(vmk_NetPoll netPoll, + vmk_Uplink uplink, + vmk_Name name, + vmk_Bool defaultPoll); + +/* + *********************************************************************** + * vmk_NetPollUnregisterUplink -- */ /** + * + * \ingroup NetPoll + * \brief Unregister the uplink for the poll. + * + * \param[in] netPoll Handler for the net poll. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM Invalid uplink assignment. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollUnregisterUplink(vmk_NetPoll netPoll); + +/* + ************************************************************************ + * vmk_NetPollFlushRx -- */ /** + * + * \ingroup NetPoll + * \brief Process packets stored in the net poll list. + * + * \param[in] netPoll Handler for the net poll. + * + *********************************************************************** + */ + +void vmk_NetPollFlushRx(vmk_NetPoll netPoll); + +/* + *********************************************************************** + * vmk_NetPollRxPktListQueue -- */ /** + * + * \ingroup NetPoll + * \brief Queue a packet list into the poll context + * + * \param[in] netPoll Handler for netpoll + * \param[in] pktList packet list to be queued. + * + * \retval VMK_OK If queueing was successful + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollRxPktListQueue(vmk_NetPoll netPoll, + vmk_PktList pktList); + +/* + *********************************************************************** + * vmk_NetPollCompPktListQueue -- */ /** + * + * \ingroup NetPoll + * \brief Queue a packet list for completion into the poll context + * + * \param[in] netPoll Handler for netpoll + * \param[in] pktList packet list to be queued. + * + * \retval VMK_OK if queueing pkt list for completion was successful + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollCompPktListQueue(vmk_NetPoll netPoll, + vmk_PktList pktList); + +/* + *********************************************************************** + * vmk_NetPollDisable -- */ /** + * + * \ingroup NetPoll + * \brief Disable NetPoll + * + * Disables the netpoll synchronously by coordinating with the netpoll + * world/worldet. + * + * \param[in] netPoll Handler for netpoll + * + * \retval None + * + *********************************************************************** + */ +void vmk_NetPollDisable(vmk_NetPoll netPoll); + +/* + *********************************************************************** + * vmk_NetPollEnable -- */ /** + * + * \ingroup NetPoll + * \brief Enable NetPoll + * + * Enables the netpoll and wakes up any waiting world/worldlet. + * + * \param[in] netPoll Handler for netpoll + * + * \retval None + * + *********************************************************************** + */ +void vmk_NetPollEnable(vmk_NetPoll netPoll); + +#endif /* _VMKAPI_NET_POLL_H_ */ +/** @} */ +/** @} */ + diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_port.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_port.h new file mode 100644 index 0000000..7b9c331 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_port.h @@ -0,0 +1,97 @@ +/*************************************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Port */ /** + * \addtogroup Network + * @{ + * \defgroup Networking Port APIs + * + * The ports on virtual switch provide logical connection points + * among virtual devices and between virtual and physical devices. + * + * In vSphere platform, virtual switch implementation manages ports + * connected to virtual ethernet adapters in guest OSes (vNICs), + * virtual device in vmkernel (vmknic), physical adapters (uplinks), + * and internal ports (i.e. switch management port). + * + * Uplink ports are ports associated with physical adapters, providing + * a connection between a virtual network and a physical network. + * Physical adapters connect to uplink ports when they are initialized + * by a device driver or when the teaming policies for virtual switches + * are reconfigured. Vmkernel and physical adapters provide additional + * features on uplink ports, e.g. netqueue load balancer, IO resource + * management, hardware offloading. + * + * With vmk_SwitchPortID, switch implementation can call port APIs to + * control states and operations of ports, including uplinks. + */ + +#ifndef _VMKAPI_NET_PORT_H_ +#define _VMKAPI_NET_PORT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Client Type for port connected to a vSwitch. + */ + +typedef enum { + /** Unknown type **/ + VMK_PORT_CLIENT_UNKNOWN = 0, + + /** Port connect to a TCPIP stack **/ + VMK_PORT_CLIENT_TCPIP = 1, + + /** Port connected to a vNIC **/ + VMK_PORT_CLIENT_VNIC = 2, + + /** Port connected to a uplink **/ + VMK_PORT_CLIENT_UPLINK = 3, +} vmk_PortClientType; + + + +/* + *********************************************************************** + * vmk_PortGetClientType -- */ /** + * + * \brief Get port client type + * + * \note The caller must hold a handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \note The client type is only available when port connect is + * completed. Query the client during PortConnect callback may + * not return proper value. + * + * \param[in] portID Port identifier + * \param[out] type will contain vmk_PortClientType + * if return VMK_OK. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM type is NULL. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PortGetClientType(vmk_SwitchPortID portID, + vmk_PortClientType *type); + +#endif /* _VMKAPI_NET_PORT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_portset.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_portset.h new file mode 100644 index 0000000..e67c3e1 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_portset.h @@ -0,0 +1,221 @@ + +/* ********************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Portset */ /** + * \addtogroup Network + * @{ + * \defgroup Portset Interface + * + * Portsets are groups of ports which, together with policies for frame + * routing, form virtual networks. Virtual nics connected to the ports + * may forward packets to each other. The analogy is to a box (like a + * a hub or a switch) containing some type of backplane for connecting + * multiple ports in the physical world. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_PORTSET_H_ +#define _VMKAPI_NET_PORTSET_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" +#include "net/vmkapi_net_uplink.h" + + +/* + *********************************************************************** + * vmk_PortsetAddUplink -- */ /** + * + * \brief Request to add an uplink to a portset. + * + * An vswitch implementation can use this API to add a named uplink to a + * named portset. + * + * Vmkernel will connect the uplink to the relevant portset and enable + * the port if connection is successful. + * + * \note This API is not to be used for VDS based vswitch. The operation + * will be triggered automatically from user space for VDS vswitch. + * + * \note If the uplink is already associated with a vSwitch, the operation + * may fail. + * + * \note The portset must be activated. + * + * \note Shouldn't be holding any handles to the portset. + * + * \note This function will not block. + * + * \param[in] psName portset name. + * \param[in] uplinkDevName uplink device name (vmnic*) + * \param[out] portID This is optional, the portID the uplink + * connect to. + * + * \retval VMK_BAD_PARAM psName or uplinkDevName is NULL. + * \retval VMK_NOT_FOUND uplinkDevName not found + * \retval VMK_BUSY the uplink already connected to a portset + * \retval VMK_LIMIT_EXCEEDED no more port for the uplink. + * \retval VMK_NO_MEMORY memory allocation failure + * \retval VMK_OK Successfully add the uplink to the + * portset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetAddUplink(char *psName, + char *uplinkDevName, + vmk_SwitchPortID *portID); + +/* + *********************************************************************** + * vmk_PortsetRemoveUplink -- */ /** + * + * \brief Request to remove an uplink from a portset. + * + * An vswitch implementation can use this API to remove a named uplink + * from a named portset. + * + * Vmkernel will disable the uplink and disconnect from the relevant + * portset. + * + * \note This API is not to be used for VDS based vswitch. The operation + * will be triggered automatically from user space. + * + * \note Shouldn't be holding any handles to the portset. + * + * \note The portset must be activated. + * + * \note This function will not block. + * + * \param[in] psName portset name. + * \param[in] uplinkDevName uplink device name (vmnic*) + * + * \retval VMK_BAD_PARAM psName or uplinkDevName is NULL. + * \retval VMK_NOT_FOUND named portset not found + * \retval VMK_FAILURE other errors. + * \retval VMK_OK The relevant uplink is removed from the + * portset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetRemoveUplink(char *psName, + char *uplinkDevName); + + +/* + *********************************************************************** + * vmk_PortsetCreate -- */ /** + * + * \brief Request to create a portset + * + * External module can use this API to create a portset with a specific + * calass. + * + * Vmkernel will create and activate a portset + * + * \note This API is not to be used for VDS based vswitch. The operation + * will be triggered automatically from user space. + * + * \note Shouldn't be holding any handles to the portset. + * + * \note This function will not block. + * + * \param[in] psName portset name. + * \param[in] className portset class name. + * \param[in] numPorts number of ports the new portset supports. + * \param[in] flags reserved, set to zero + * + * \retval VMK_BAD_PARAM psName or className is NULL or className + * is null string + * \retval VMK_NOT_SUPPORTED The request portset class not found + * \retval VMK_EXIST portset with the request psName exists. + * \retval VMK_NO_RESOURCES no free portset available. + * \retval VMK_LIMIT_EXCEEDED the request numPort exceed the supported + * limit. + * \retval VMK_NO_MEMORY memory allocation failure + * \retval VMK_OK Successfully create a portset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetCreate(char *psName, + char *className, + vmk_uint32 numPorts, + vmk_uint32 flags); + +/* + *********************************************************************** + * vmk_PortsetDestroy -- */ /** + * + * \brief Request to destroy a portset + * + * External module can use this API to destroy a named portset. + * + * VMKernel will try to first disconnect all ports and deactivate the + * portset. + * + * \note This API is not to be used for VDS based vswitch. The operation + * will be triggered automatically from user space. + * + * \note Shouldn't be holding any handles to the portset. + * + * \note This function will not block. + * + * \note All connected port will be disconnected. Normally the caller + * shoild make sure all clients are disabled and disconnected. + * + * \param[in] psName portset name. + * + * \retval VMK_BAD_PARAM psName is NULL or length is too large. + * \retval VMK_NOT_FOUND named portset not found + * \retval VMK_OK Successfully destroyed the portset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetDestroy(char *psName); + + +/* + *********************************************************************** + * vmk_PortsetGetMTU -- */ /** + * + * \brief Get MTU setting on a portset + * + * \nativedriversdisallowed + * + * \note This function will not block. + * + * \note The caller should hold at least an immutable portset handle + * + * \param[in] ps Handle to a portset + * \param[out] mtu MTU setting on the portset + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM An argument is NULL. + * \retval VMK_FAILURE Improper portset handle is held + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PortsetGetMTU(vmk_Portset *ps, + vmk_uint32 *mtu); + +#endif /* _VMKAPI_NET_PORTSET_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_portset_message.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_portset_message.h index 603974c..8f33bf3 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_portset_message.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_portset_message.h @@ -149,6 +149,8 @@ typedef void (*vmk_PortsetMessageCB)(vmk_SwitchPortID portID, * * \brief Register a handler to receive portset message notifications. * + * \nativedriversdisallowed + * * \note These are asynchronous message notifications, meaning that the * message handler should examine the port to determine current * state at the time the callback is made. @@ -196,16 +198,18 @@ VMK_ReturnStatus vmk_PortsetRegisterMessageCB( *********************************************************************** * vmk_PortsetUnregisterMessageCB -- */ /** * - * \brief Unregister a handler to receive portset message - * notifications. + * \brief Unregister a handler to receive portset message + * notifications. * - * \note Caller must not hold any portset handle. + * \nativedriversdisallowed * - * \param[in] handle Handle returned from registration + * \note Caller must not hold any portset handle. * - * \retval VMK_OK Unregistering succeeded - * \retval VMK_BAD_PARAM Invalid parameter - * \retval VMK_FAILURE Otherwise + * \param[in] handle Handle returned from registration + * + * \retval VMK_OK Unregistering succeeded + * \retval VMK_BAD_PARAM Invalid parameter + * \retval Other status Unregistering failed * *********************************************************************** */ @@ -219,6 +223,8 @@ VMK_ReturnStatus vmk_PortsetUnregisterMessageCB( * * \brief Send an asynchronous message to portset * + * \nativedriversdisallowed + * * Send a message to global or portset specific message subscribers. * Subscriber message handler will be called after this function * returns. diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_proto.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_proto.h new file mode 100644 index 0000000..c2218c6 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_proto.h @@ -0,0 +1,696 @@ +/* ********************************************************** + * Copyright 2011 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * NetProto */ /** + * \addtogroup Network + *@{ + * \defgroup NetProto Network protocol header definitions + *@{ + * + *********************************************************************** + */ +#ifndef _VMKAPI_NET_PROTO_H_ +#define _VMKAPI_NET_PROTO_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +#define VMK_ETH_ADDR_FMT_STR "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx" +#define VMK_ETH_ADDR_FMT_ARGS(addrPtr) ((vmk_uint8 *) (addrPtr))[0],\ + ((vmk_uint8 *) (addrPtr))[1],\ + ((vmk_uint8 *) (addrPtr))[2],\ + ((vmk_uint8 *) (addrPtr))[3],\ + ((vmk_uint8 *) (addrPtr))[4],\ + ((vmk_uint8 *) (addrPtr))[5] +#define VMK_ETH_PTR_ADDR_FMT_ARGS(addrPtr) &((vmk_uint8 *) (addrPtr))[0],\ + &((vmk_uint8 *) (addrPtr))[1],\ + &((vmk_uint8 *) (addrPtr))[2],\ + &((vmk_uint8 *) (addrPtr))[3],\ + &((vmk_uint8 *) (addrPtr))[4],\ + &((vmk_uint8 *) (addrPtr))[5] + +#define VMK_IPV4_ADDR_FMT_STR "%u.%u.%u.%u" +#define VMK_IPV4_ADDR_FMT_STR_ARGS(val) ((vmk_BE32ToCPU((vmk_uint32) (val)) >> 24) & 0xFF),\ + ((vmk_BE32ToCPU((vmk_uint32) (val)) >> 16) & 0xFF),\ + ((vmk_BE32ToCPU((vmk_uint32) (val)) >> 8) & 0xFF),\ + (vmk_BE32ToCPU((vmk_uint32) (val)) & 0xFF) + +#define VMK_IPV6_ADDR_FMT_STR "%08x:%08x:%08x:%08x" +#define VMK_IPV6_ADDR_FMT_STR_ARGS(addrPtr) vmk_BE32ToCPU(((vmk_uint32 *) (addrPtr))[0]),\ + vmk_BE32ToCPU(((vmk_uint32 *) (addrPtr))[1]),\ + vmk_BE32ToCPU(((vmk_uint32 *) (addrPtr))[2]),\ + vmk_BE32ToCPU(((vmk_uint32 *) (addrPtr))[3]) + + +/** + * \brief Ethernet type used in the ethernet header. + */ +typedef enum vmk_EthType { + /** Internet protocol version 4. */ + VMK_ETH_TYPE_IPV4 = 0x0800, + /** Address resolution protocol. */ + VMK_ETH_TYPE_ARP = 0x0806, + /** Cisco discovery protocol. */ + VMK_ETH_TYPE_CDP = 0x2000, + /** Transparent interconnection of lots of links. */ + VMK_ETH_TYPE_TRILL = 0x22f3, + /** Transparent Ethernet Bridging. */ + VMK_ETH_TYPE_TRANSPARENT_ETH = 0x6558, + /** Reverse address resolution protocol. */ + VMK_ETH_TYPE_RARP = 0x8035, + /** Apple talk. */ + VMK_ETH_TYPE_ATALK = 0x809b, + /** Apple address resolution protocol. */ + VMK_ETH_TYPE_AARP = 0x80f3, + /** Virtual LAN (IEEE 802.1q). */ + VMK_ETH_TYPE_VLAN = 0x8100, + /** Internetwork packet exchange (alt). */ + VMK_ETH_TYPE_IPX_ALT = 0x8137, + /** Internetwork packet exchange. */ + VMK_ETH_TYPE_IPX = 0x8138, + /** SNMP over ethernet. */ + VMK_ETH_TYPE_SNMP = 0x814c, + /** Internet protocol version 6. */ + VMK_ETH_TYPE_IPV6 = 0x86dd, + /** Slow protocols (IEEE 802.3). */ + VMK_ETH_TYPE_SLOW = 0x8809, + /** Multiprotocol label switching (unicast). */ + VMK_ETH_TYPE_MPLS_UNICAST = 0x8847, + /** Multiprotocol label switching (multicast). */ + VMK_ETH_TYPE_MPLS_MULTICAST = 0x8847, + /** PPP over ethernet (discovery). */ + VMK_ETH_TYPE_PPPOE_DISCOVERY = 0x8863, + /** PPP over ethernet (session). */ + VMK_ETH_TYPE_PPPOE_SESSION = 0x8864, + /** Jumbo frames. */ + VMK_ETH_TYPE_JUMBO = 0x8870, + /** Provider bridging (IEEE 802.3ad). */ + VMK_ETH_TYPE_PROVIDER_BRIDGING = 0x88a8, + /** Low level discovery protocol. */ + VMK_ETH_TYPE_LLDP = 0x88cc, + /** Akimbi frames, (VMware VMlab). */ + VMK_ETH_TYPE_AKIMBI = 0x88de, + /** Fiber channel over ethernet. */ + VMK_ETH_TYPE_FCOE = 0x8906, + /** Fiber channel over ethernet (init). */ + VMK_ETH_TYPE_FCOE_INIT = 0x8914, + /** VMware ESX beacon probing. */ + VMK_ETH_TYPE_VMWARE = 0x8922, + /** QinQ tagging (IEEE 802.1ad). */ + VMK_ETH_TYPE_QINQ = 0x9100, + /** DVfilter. */ + VMK_ETH_TYPE_DVFILTER = 0xdfdf, +} vmk_EthType; + + +/** + * \brief Ethernet type used in the ethernet header, in network byte order. + */ +typedef enum { + /** Internet protocol version 4 (in net order). */ + VMK_ETH_TYPE_IPV4_NBO = 0x0008, + /** Address resolution protocol (in net order). */ + VMK_ETH_TYPE_ARP_NBO = 0x0608, + /** Cisco discovery protocol (in net order). */ + VMK_ETH_TYPE_CDP_NBO = 0x0020, + /** Transparent interconnection of lots of links (in net order). */ + VMK_ETH_TYPE_TRILL_NBO = 0xf322, + /** Transparent Ethernet Bridging (in net order). */ + VMK_ETH_TYPE_TRANSPARENT_ETH_NBO = 0x5865, + /** Reverse address resolution protocol (in net order). */ + VMK_ETH_TYPE_RARP_NBO = 0x3580, + /** Apple talk (in net order). */ + VMK_ETH_TYPE_ATALK_NBO = 0x9b80, + /** Apple address resolution protocol (in net order). */ + VMK_ETH_TYPE_AARP_NBO = 0xf380, + /** Virtual LAN (IEEE 802.1q) (in net order). */ + VMK_ETH_TYPE_VLAN_NBO = 0x0081, + /** Internetwork packet exchange (alt) (in net order). */ + VMK_ETH_TYPE_IPX_ALT_NBO = 0x3781, + /** Internetwork packet exchange (in net order). */ + VMK_ETH_TYPE_IPX_NBO = 0x3881, + /** SNMP over ethernet (in net order). */ + VMK_ETH_TYPE_SNMP_NBO = 0x4c81, + /** Internet protocol version 6 (in net order). */ + VMK_ETH_TYPE_IPV6_NBO = 0xdd86, + /** Slow protocols (IEEE 802.3) (in net order). */ + VMK_ETH_TYPE_SLOW_NBO = 0x0988, + /** Multiprotocol label switching (unicast) (in net order). */ + VMK_ETH_TYPE_MPLS_UNICAST_NBO = 0x4788, + /** Multiprotocol label switching (multicast) (in net order). */ + VMK_ETH_TYPE_MPLS_MULTICAST_NBO = 0x4788, + /** PPP over ethernet (discovery) (in net order). */ + VMK_ETH_TYPE_PPPOE_DISCOVERY_NBO = 0x6388, + /** PPP over ethernet (session) (in net order). */ + VMK_ETH_TYPE_PPPOE_SESSION_NBO = 0x6488, + /** Jumbo frames (in net order). */ + VMK_ETH_TYPE_JUMBO_NBO = 0x7088, + /** Provider bridging (IEEE 802.3ad) (in net order). */ + VMK_ETH_TYPE_PROVIDER_BRIDGING_NBO = 0xa888, + /** Low level discovery protocol (in net order). */ + VMK_ETH_TYPE_LLDP_NBO = 0xcc88, + /** Akimbi frames, (VMware VMlab) (in net order). */ + VMK_ETH_TYPE_AKIMBI_NBO = 0xde88, + /** Fiber channel over ethernet (in net order). */ + VMK_ETH_TYPE_FCOE_NBO = 0x0689, + /** Fiber channel over ethernet (init) (in net order). */ + VMK_ETH_TYPE_FCOE_INIT_NBO = 0x1489, + /** VMware ESX beacon probing (in net order). */ + VMK_ETH_TYPE_VMWARE_NBO = 0x2289, + /** QinQ tagging (IEEE 802.1ad) (in net order). */ + VMK_ETH_TYPE_QINQ_NBO = 0x0091, + /** DVfilter (in net order). */ + VMK_ETH_TYPE_DVFILTER_NBO = 0xdfdf, +} vmk_EthTypeNBO; + + +/** + * \brief IP protocol numbers, used in IPv4 and IPv6 headers. + */ +typedef enum { + /** IPv6 hop-by-hop options. */ + VMK_IP_PROTO_IPV6_HOPOPT = 0x00, + /** Internet control message protocol version 4. */ + VMK_IP_PROTO_ICMPV4 = 0x01, + /** Internet group management protocol. */ + VMK_IP_PROTO_IGMP = 0x02, + /** Internet protocol version 4. */ + VMK_IP_PROTO_IPV4 = 0x04, + /** Transmission control protocol. */ + VMK_IP_PROTO_TCP = 0x06, + /** Exterior gateway protocol. */ + VMK_IP_PROTO_EGP = 0x08, + /** Interior gateway protocol. */ + VMK_IP_PROTO_IGP = 0x09, + /** User datagram protocol. */ + VMK_IP_PROTO_UDP = 0x11, + /** Internet protocol version 6. */ + VMK_IP_PROTO_IPV6 = 0x29, + /** IPv6 routing option. */ + VMK_IP_PROTO_IPV6_ROUTE = 0x2b, + /** IPv6 fragment option. */ + VMK_IP_PROTO_IPV6_FRAG = 0x2c, + /** Generic routing encapsulation. */ + VMK_IP_PROTO_GRE = 0x2f, + /** Encapsulating security payload. */ + VMK_IP_PROTO_ESP = 0x32, + /** Authentication header. */ + VMK_IP_PROTO_AH = 0x33, + /** Internet control message protocol version 6. */ + VMK_IP_PROTO_ICMPV6 = 0x3a, + /** IPv6 no next header. */ + VMK_IP_PROTO_IPV6_NONXT = 0x3b, + /** IPv6 destination options. */ + VMK_IP_PROTO_IPV6_DSTOPTS = 0x3c, + /** Enhanced interior gateway routing protocol. */ + VMK_IP_PROTO_EIGRP = 0x58, + /** Open shortest path first. */ + VMK_IP_PROTO_OSPF = 0x59, + /** IP over IP. */ + VMK_IP_PROTO_IPIP = 0x5e, + /** Protocol independant multicast. */ + VMK_IP_PROTO_PIM = 0x67, + /** Virtual router redundancy protocol. */ + VMK_IP_PROTO_VRRP = 0x70, + /** Layer 2 tunneling protocol. */ + VMK_IP_PROTO_L2TP = 0x73, + /** Mobility IP. */ + VMK_IP_PROTO_MOB = 0x87, + /** Host identity protocol. */ + VMK_IP_PROTO_HIP = 0x8b, +} vmk_IPProto; + + +/** + * \brief Ethernet header. + */ +typedef struct vmk_EthHdr { + /** Destination MAC address. */ + vmk_uint8 daddr[6]; + /** Source MAC address. */ + vmk_uint8 saddr[6]; + /** Ethernet type of the payload. */ + vmk_uint16 type; +} VMK_ATTRIBUTE_PACKED vmk_EthHdr; + + +/** + * \brief VLAN header, inserted after the type field of regular ethernet frames. + */ +typedef struct vmk_VLANHdr { + /** High four bits of the VLAN ID. */ + vmk_uint8 vlanIDHigh:4; + /** This field has two different interpretations. */ + union { + /** The MAC addresses are in canonical format. */ + vmk_uint8 canonical:1; + /** The frame is eligible to be dropped in the presence of congestion. */ + vmk_uint8 dropEligible:1; + }; + /** Priority tag. */ + vmk_uint8 priority:3; + /** Low eight bits of the VLAN ID. */ + vmk_uint8 vlanIDLow; + /** Ethernet type of the payload. */ + vmk_uint16 type; +} VMK_ATTRIBUTE_PACKED vmk_VLANHdr; + +/** Helper macro to get the vlan ID in a vmk_VLANHdr. */ +#define VMK_VLAN_HDR_GET_VID(hdr) \ + (((hdr)->vlanIDHigh << 8) | (hdr)->vlanIDLow) + +/** Helper macro to set the vlan ID in a vmk_VLANHdr. */ +#define VMK_VLAN_HDR_SET_VID(hdr, val) do { \ + (hdr)->vlanIDHigh = (val) >> 8; \ + (hdr)->vlanIDLow = (val); \ +} while (0) + + +/** + * \brief IPv4 header. + */ +typedef struct vmk_IPv4Hdr { + /** Length of the IP header, including options in 32-bit words. */ + vmk_uint8 headerLength:4; + /** Internet protocol version. */ + vmk_uint8 version:4; + /* This field has two different interpretations. */ + union { + /** The old interpretation, TOS. */ + struct { + /** Type of service. */ + vmk_uint8 tos:5; + /** Precendence. */ + vmk_uint8 precedence:3; + }; + /** The new interpretation, DSCP. */ + struct { + /** Explicit Congestion Notification. */ + vmk_uint8 ecn:2; + /** Differentiated Services Code Point. */ + vmk_uint8 dscp:6; + }; + /** Global access. */ + vmk_uint8 qosFlags; + }; + /** Total length of the fragment. */ + vmk_uint16 totalLength; + /** Identification of the fragment in the original packet. */ + vmk_uint16 identification; + /** IP Fragment info. */ + union { + /** Bitfield access. */ + struct { + /** High five bits of this fragment's offset in the packet. */ + vmk_uint8 fragmentOffsetHigh:5; + /** More fragments of this packets are available. */ + vmk_uint8 moreFragments:1; + /** This packet must not be fragmented. */ + vmk_uint8 dontFragment:1; + /** Reserved bit, must be zero. */ + vmk_uint8 zero:1; + /** Low eight bits of the fragment offset. */ + vmk_uint8 fragmentOffsetLow; + }; + /* Global access. */ + vmk_uint16 fragmentInfo; + }; + /** Time to live. */ + vmk_uint8 ttl; + /** Protocol number of the payload. */ + vmk_uint8 protocol; + /** Checksum of the header. */ + vmk_uint16 checksum; + /** Source address of the packet. */ + vmk_uint32 saddr; + /** Destination address of the packet. */ + vmk_uint32 daddr; +} VMK_ATTRIBUTE_PACKED vmk_IPv4Hdr; + +/** Helper macro to get the fragment offset in a vmk_IPv4Hdr. */ +#define VMK_IPV4_HDR_GET_FRAGMENT_OFFSET(hdr) \ + (((hdr)->fragmentOffsetHigh << 8) | (hdr)->fragmentOffsetLow) + +/** Helper macro to set the fragment offset in a vmk_IPv4Hdr. */ +#define VMK_IPV4_HDR_SET_FRAGMENT_OFFSET(hdr, val) do { \ + (hdr)->fragmentOffsetHigh = (val) >> 8; \ + (hdr)->fragmentOffsetLow = (val); \ +} while (0) + + +/** + * \brief IPv6 header. + */ +typedef struct vmk_IPv6Hdr { + /** High four bits of the traffic class. */ + vmk_uint8 trafficClassHigh:4; + /** Internet protocol version. */ + vmk_uint8 version:4; + /** High four bits of the flow label. */ + vmk_uint8 flowLabelHigh:4; + /** Low four bits of the traffic class. */ + vmk_uint8 trafficClassLow:4; + /** High sixteen bits of the flow label. */ + vmk_uint16 flowLabelLow; + /** Length of this packets payload. */ + vmk_uint16 payloadLength; + /** Next header's protocol number. */ + vmk_uint8 nextHeader; + /** Hop limit (similar to TTL in IPv4). */ + vmk_uint8 hopLimit; + /** Source address of the packet. */ + vmk_uint8 saddr[16]; + /** Destination address of the packet. */ + vmk_uint8 daddr[16]; +} VMK_ATTRIBUTE_PACKED vmk_IPv6Hdr; + +/** Helper macro to get the traffic class in a vmk_IPv6Hdr. */ +#define VMK_IPV6_HDR_GET_TRAFFIC_CLASS(hdr) \ + (((hdr)->trafficClassHigh << 4) | (hdr)->trafficClassLow) + +/** Helper macro to set the traffic class in a vmk_IPv6Hdr. */ +#define VMK_IPV6_HDR_SET_TRAFFIC_CLASS(hdr, val) do { \ + (hdr)->trafficClassHigh = (val) >> 4; \ + (hdr)->trafficClassLow = (val); \ +} while (0) + +/** Helper macro to get the flow label in a vmk_IPv6Hdr. */ +#define VMK_IPV6_HDR_GET_FLOW_LABEL(hdr) \ + (((hdr)->flowLabelHigh << 16) | vmk_Ntohs((hdr)->flowLabelLow)) + +/** Helper macro to set the flow label in a vmk_IPv6Hdr. */ +#define VMK_IPV6_HDR_SET_FLOW_LABEL(hdr, val) do { \ + (hdr)->flowLabelHigh = (val) >> 16; \ + (hdr)->flowLabelLow = vmk_Htons(val); \ +} while (0) + + +/** + * \brief IPv6 extension header. + */ +typedef struct vmk_IPv6ExtHdr { + /** Next header's protocol number. */ + vmk_uint8 nextHeader; + /** Length of this header, in 64-bit words (not including the first one). */ + vmk_uint8 hdrExtLength; + /** Option-specific area. */ + vmk_uint16 optPad1; + /** Option-specific area. */ + vmk_uint32 optPad2; +} VMK_ATTRIBUTE_PACKED vmk_IPv6ExtHdr; + + +/** + * \brief ICMP header. + */ +typedef struct vmk_ICMPHdr { + /** Type of this ICMP message. */ + vmk_uint8 type; + /** Code of this ICMP message. */ + vmk_uint8 code; + /** Checksum of the entire ICMP message. */ + vmk_uint16 checksum; +} VMK_ATTRIBUTE_PACKED vmk_ICMPHdr; + + +/** + * \brief IGMP header. + */ +typedef struct vmk_IGMPHdr { + /** Type of this IGMP message. */ + vmk_uint8 type; + /** Maximum time for an IGMP report corresponding to the IGMP query. */ + vmk_uint8 maxResponseTime; + /** Checksum of the entire IGMP message. */ + vmk_uint16 checksum; + /** Multicast group on which this IGMP message operates. */ + vmk_uint32 groupAddr; +} VMK_ATTRIBUTE_PACKED vmk_IGMPHdr; + + +/** + * \brief UDP header. + */ +typedef struct vmk_UDPHdr { + /** Source port. */ + vmk_uint16 srcPort; + /** Destination port. */ + vmk_uint16 dstPort; + /** Length of the entire UDP message (header + data). */ + vmk_uint16 length; + /** Checksum of the UDP message. */ + vmk_uint16 checksum; +} VMK_ATTRIBUTE_PACKED vmk_UDPHdr; + + +/** + * \brief TCP header. + */ +typedef struct vmk_TCPHdr { + /** Source port. */ + vmk_uint16 srcPort; + /** Destination port. */ + vmk_uint16 dstPort; + /** Sequence number. */ + vmk_uint32 seq; + /** Acknowledgement number. */ + vmk_uint32 ackSeq; + /** Reserved. */ + vmk_uint8 reserved:4; + /** Length of the TCP header in 32-bit words. */ + vmk_uint8 dataOffset:4; + /** TCP flags. */ + union { + /** Bitfield access. */ + struct { + /** FIN flag: no more data from sender. */ + vmk_uint8 fin:1; + /** SYN flag: synchronize sequence numbers. */ + vmk_uint8 syn:1; + /** RST flag: reset the connection. */ + vmk_uint8 rst:1; + /** PSH flag: push data to application. */ + vmk_uint8 psh:1; + /** ACK flag: acknowledgement field is significant. */ + vmk_uint8 ack:1; + /** URG flag: urgent pointer field is significant. */ + vmk_uint8 urg:1; + /** ECE flag: peer is ECN capable. */ + vmk_uint8 ece:1; + /** CWR flag: congestion window has been reduced. */ + vmk_uint8 cwr:1; + }; + /** Global access. */ + vmk_uint8 flags; + }; + /** Size of the receive window. */ + vmk_uint16 window; + /** Checksum of the TCP packet. */ + vmk_uint16 checksum; + /** Last urgent data byte. */ + vmk_uint16 urgPtr; +} VMK_ATTRIBUTE_PACKED vmk_TCPHdr; + + +/** + * \brief Fence header. + */ +typedef struct vmk_FenceHdr { + /** Fence header version. */ + vmk_uint8 version:2; + /** Original ethernet frame is fragmented. */ + vmk_uint8 frag:1; + /** Fragment ID. */ + vmk_uint8 fragmentID:5; + /** Fence ID. */ + vmk_uint32 fenceID:24; +} VMK_ATTRIBUTE_PACKED vmk_FenceHdr; + + +/** + * \brief VXLAN header. + */ +typedef struct vmk_VXLANHdr { + /** Flags. */ + vmk_uint8 flags1:2; + /** Packet needs replication to multicast group (used for multicast proxy). */ + vmk_uint8 locallyReplicate:1; + /** Instance ID flag, must be set to 1. */ + vmk_uint8 instanceID:1; + /** Flags. */ + vmk_uint8 flags2:4; + /** Reserved. */ + vmk_uint32 reserved1:24; + /** VXLAN ID. */ + vmk_uint32 vxlanID:24; + /** Reserved. */ + vmk_uint8 reserved2:8; +} VMK_ATTRIBUTE_PACKED vmk_VXLANHdr; + +/** Helper macro to check if a VXLAN ID is valid. */ +#define VMK_VXLAN_ID_IS_VALID(vxlanID) (0 < (vxlanID) && (vxlanID) <= 0xffffff) + + +/** + * \brief GRE header. + */ +typedef struct vmk_GREHdr { + /** GRE flags. */ + union { + /** Bitfield access. */ + struct { + /** Recursion control. */ + vmk_uint8 reserved1:3; + /** Strict source route. */ + vmk_uint8 strictSourceRoute:1; + /** Sequence number field is present. */ + vmk_uint8 sequencePresent:1; + /** Key field is present. */ + vmk_uint8 keyPresent:1; + /** Routing field is present. */ + vmk_uint8 routingPresent:1; + /** Checksum field is present. */ + vmk_uint8 checksumPresent:1; + /** Version. */ + vmk_uint8 version:3; + /** Flags. */ + vmk_uint8 reserved2:5; + }; + /** Global access. */ + vmk_uint16 flags; + }; + /** Protocol number of the inner packet. */ + vmk_uint16 protocol; + /** Optionnal fields follow. */ + vmk_uint32 options[0]; +} VMK_ATTRIBUTE_PACKED vmk_GREHdr; + + +/** + * \brief PIM header. + */ +typedef struct vmk_PIMHdr { + /** PIM message type. */ + vmk_uint8 type:4; + /** PIM version number. */ + vmk_uint8 version:4; + /** Reserved. */ + vmk_uint8 reserved; + /** Checksum of the entire PIM message. */ + vmk_uint16 checksum; +} VMK_ATTRIBUTE_PACKED vmk_PIMHdr; + +/* + ************************************************************************ + * vmk_VXLANConfiguredPortGetAll -- */ /** + * + * \brief Get all UDP port numbers configured as VXLAN UDP ports. + * + * \note Since IANA has not assigned a specific UDP port for VXLAN use, + * it is possible for deployed systems to have more than one + * UDP port used for VXLAN. To handle this case, we need to + * support at least two UDP port numbers. + * + * \note nPorts should be set to at least vmk_NetProtoVXLANMaxPorts to + * get all the configured ports, otherwise it is possible that + * only a partial list of UDP ports is returned. + * + * \param[out] portList List of ports configured for VXLAN use. + * \param[in,out] nPorts Number of ports memory allocated for (in) + * actual number of ports returned(out). + * + * \retval VMK_OK On success. + * \retval VMK_BAD_PARAM if bad arguments are passed. + ************************************************************************ + */ +VMK_ReturnStatus vmk_VXLANConfiguredPortGetAll(vmk_uint16 *portList, + vmk_uint8 *nPorts); + +/* + *********************************************************************** + * vmk_VXLANIsConfiguredPort -- */ /** + * + * \brief Checks to see if portNBO is one of the configured VXLAN ports. + * + * \param[in] portNBO Port number (in network byte order). + * + * \retval VMK_TRUE If portNBO is one of the configured + * VXLAN ports. + * + * \retval VMK_FALSE Otherwise. + * + *********************************************************************** + */ +vmk_Bool vmk_VXLANIsConfiguredPort(vmk_uint16 portNBO); + +/* + *********************************************************************** + * vmk_VXLANConfiguredPortAdd -- */ /** + * + * \brief Add a port to the list of configured ports for VXLAN + * + * \param[in] portNBO Port number in network byte order. + * + * \retval VMK_OK On success. + * \retval VMK_EXISTS If the port number already exists. + * \retval VMK_LIMIT_EXCEEDED If the number of ports in the list + * already reached the maximum number + * of configurable ports. + *********************************************************************** + */ +VMK_ReturnStatus vmk_VXLANConfiguredPortAdd(vmk_uint16 portNBO); + +/* + *********************************************************************** + * vmk_VXLANConfiguredPortRemove -- */ /** + * + * \brief Remove a port from the list of configured ports for VXLAN + * + * \param[in] portNBO Port number in network byte order. + * + * \retval VMK_OK On success. + * \retval VMK_NOT_FOUND If the port number is not found. + * \retval VMK_NOT_SUPPORTED If the removal of the port is not + * supported. This can happen if it + * is the last port in the list. + *********************************************************************** + */ +VMK_ReturnStatus vmk_VXLANConfiguredPortRemove(vmk_uint16 portNBO); + +/* + *********************************************************************** + * vmk_VXLANConfiguredPortGetPrimary -- */ /** + * + * \brief Get the primary UDP port number configured for VXLAN. + * + * \retval Primary VXLAN UDP port number. + *********************************************************************** + */ +vmk_uint16 vmk_VXLANConfiguredPortGetPrimary(void); + +/* + *********************************************************************** + * vmk_VXLANConfiguredPortSetPrimary -- */ /** + * + * \brief Sets the primary configured VXLAN UDP port. + * + * \param[in] portNBO Port number in network byte order. + * + *********************************************************************** + */ +void vmk_VXLANConfiguredPortSetPrimary(vmk_uint16 portNBO); + +#endif /* _VMKAPI_NET_PROTO_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pt.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pt.h index a55e959..c379c9f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pt.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_pt.h @@ -50,6 +50,29 @@ /** Number of possible multicast MAC filters per VF (NPA) */ #define VMK_NPA_MAX_MULTICAST_FILTERS 32 +/** Bit to set in cfgChanged when configuring MAC address of VF */ +#define VMK_CFG_MAC_CHANGED (1 << 0) + +/** Bit to set in cfgChanged when configuring Default VLAN (VST) for VF */ +#define VMK_CFG_DEFAULT_VLAN_CHANGED (1 << 1) + +/** Bit to set in cfgChanged when adding Guest VLAN (VGT) tags for VF */ +#define VMK_CFG_GUEST_VLAN_ADD (1 << 2) + +/** Bit to set in cfgChanged when removing Guest VLAN (VGT) tags for VF */ +#define VMK_CFG_GUEST_VLAN_REMOVE (1 << 3) + +/** Bit to set in cfgChanged when changing receive mode of VF */ +#define VMK_CFG_RXMODE_CHANGED (1 << 4) + +/** Bit to set in cfgChanged when changing MTU of VF */ +#define VMK_CFG_MTU_CHANGED (1 << 5) + +/** Bit to set in cfgChanged when disabling default VLAN for VF */ +#define VMK_CFG_DISABLE_DEFAULT_VLAN (1 << 6) + + + /** * \ingroup Passthru * \brief VF identifier @@ -76,6 +99,8 @@ typedef struct vmk_VFDesc { vmk_uint8 pfFunc; /** The identifier of the VF */ vmk_uint32 vfID; + /** Switch PortID where hiddenUplink is connected */ + vmk_SwitchPortID portID; } vmk_VFDesc; /** @@ -162,8 +187,11 @@ typedef enum vmk_NetPTOP { VMK_NETPTOP_PF_DEL_MAC_FILTER = 0x00000015, /** Enable mirroring all traffic to the PF */ - VMK_NETPTOP_PF_MIRROR_ALL = 0x00000016 - + VMK_NETPTOP_PF_MIRROR_ALL = 0x00000016, + + /** Set MTU for a VF port */ + VMK_NETPTOP_VF_SET_MTU = 0x00000017 + } vmk_NetPTOP; /** @@ -1055,6 +1083,22 @@ typedef struct vmk_NetPTOPVFSetMacArgs { } vmk_NetPTOPVFSetMacArgs; +/** + * \ingroup Passthru + * \brief Arguments for the VF Set MTU. + * + * This structure is passed to the NETPTOP_VF_SET_MTU operation and + * configures or updates the MTU of a VF port. + */ +typedef struct vmk_NetPTOPVFSetMtuArgs { + /** VF id */ + vmk_VFID vf; + + /** MTU for the VF */ + vmk_uint32 mtu; + +} vmk_NetPTOPVFSetMtuArgs; + /** * \ingroup Passthru * \brief Arguments for the VF Set Multicast operation. @@ -1211,6 +1255,99 @@ typedef struct vmk_NetPTOPPFMirrorAllArgs { } vmk_NetPTOPPFMirrorAllArgs; + +/** + * \ingroup Passthru + * \brief Enumeration of receive modes of a VF. + */ +typedef enum vmk_VFRXMode { + /** Pass unicast (directed) frames */ + VMK_VF_RXMODE_UNICAST = (1 << 0), + + /** Pass some multicast frames */ + VMK_VF_RXMODE_MULTICAST = (1 << 1), + + /** pass *all* multicast frames */ + VMK_VF_RXMODE_ALLMULTI = (1 << 2), + + /** Pass broadcast frames */ + VMK_VF_RXMODE_BROADCAST = (1 << 3), + + /** Pass all frames (ie no filter) */ + VMK_VF_RXMODE_PROMISC = (1 << 4), + + /** Use the LADRF for multicast filtering */ + VMK_VF_RXMODE_USE_LADRF = (1 << 5), + + /** pass not-matched unicast frames */ + VMK_VF_RXMODE_SINK = (1 << 6) + +} vmk_VFRXMode; + + +/** + * \ingroup Passthru + * \brief VF Configuration information. + * + * This structure contains information about VF configuration. PF driver + * passes this structure as an argument of vmk_NetPTConfigureVF() + */ +typedef struct vmk_NetVFCfgInfo { + + /** MAC Address for VF */ + vmk_uint8 macAddr[6]; + + union vmk_vlanInfo { + + /** Bitmap for Guest VLAN tags (VGT) */ + vmk_uint8 guestVlans[512]; + + /** VLAN switch tagging (VST) */ + vmk_uint16 defaultVlan; + } vlan; + + /** Config change being requested */ + vmk_uint32 cfgChanged; + + /** Receive mode (Unicast/Mcast/Bcast) */ + vmk_VFRXMode rxMode; + + /** MTU for VF */ + vmk_uint16 mtu; + vmk_uint8 reserved[7]; +} vmk_NetVFCfgInfo; + + +/* + *********************************************************************** + * vmk_NetPTConfigureVF -- */ /** + * + * \brief Request to configure properties of a passthrough VF + * + * PF Driver calls this to request configuration of a passthrough VF. This + * will mostly be called as a result of the guest requesting changes in + * passthrough NIC configuration. VMKernel validates the VF configuration + * request against the DVS or Portgroup properties. It then pushes + * the configuration to VFs as applicable. VMKernel uses passthrough ops + * (vmk_NetPTOP) published by PF driver to apply VF configuration. + * + * \see vmk_NetVFCfgInfo. + * \see vmk_NetPTOP + * + * \note This in turn calls Passthrough OPs in PF driver + * + * \param[in] cfgInfo Requested VF Configuration. + * \param[in] vfSbdf PCI Address of VF to be configured. + * + * \retval VMK_OK The command was issued successfully and + * the command's status is valid. + * \retval VMK_FAILURE The command failed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_NetPTConfigureVF(vmk_NetVFCfgInfo *cfgInfo, + vmk_PCIDeviceAddr vfSbdf); + #endif /* _VMKAPI_NET_PT_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_queue.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_queue.h new file mode 100644 index 0000000..ec23c2e --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_queue.h @@ -0,0 +1,1364 @@ +/* ********************************************************** + * Copyright 2006 - 2009 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * UplinkQueue */ /** + * \addtogroup Network + *@{ + * \defgroup UplinkQueue Uplink Queue + *@{ + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_QUEUE_H_ +#define _VMKAPI_NET_QUEUE_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" +#include "net/vmkapi_net_poll.h" +#include "net/vmkapi_net_pkt.h" + + +/** Default queue ID */ +#define VMK_UPLINK_QUEUE_DEFAULT_QUEUEID ((vmk_UplinkQueueID)0) + +/** Invalid queue ID */ +#define VMK_UPLINK_QUEUE_INVALID_QUEUEID ((vmk_UplinkQueueID)-1) + +/** Invalid filter ID */ +#define VMK_UPLINK_QUEUE_INVALID_FILTERID ((vmk_UplinkQueueFilterID)-1) + +/** Invalid uplink queue priority */ +#define VMK_UPLINK_QUEUE_PRIORITY_INVALID VMK_VLAN_PRIORITY_INVALID + +struct vmk_UplinkStats; + + +/** + * \brief UplinkQueue ID + */ +typedef struct vmk_UplinkQueueIDInt *vmk_UplinkQueueID; + + +/** + * \brief UplinkQueue filter ID + */ +typedef vmk_uint32 vmk_UplinkQueueFilterID; + + +/** UplinkQueue priority */ +typedef vmk_VlanPriority vmk_UplinkQueuePriority; + + +/** + * \brief UplinkQueue filter type + */ +typedef enum vmk_UplinkQueueFilterType { + + /** Invalid filter type */ + VMK_UPLINK_QUEUE_FILTER_TYPE_INVALID = 0, + + /** Rx/Tx filter type */ + VMK_UPLINK_QUEUE_FILTER_TYPE_TXRX = 1, +} vmk_UplinkQueueFilterType; + + +/** + * \brief UplinkQueue filter class + */ +typedef enum vmk_UplinkQueueFilterClass { + /** Invalid filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_NONE = 0x0, + + /** MAC only filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_MAC_ONLY = (1 << 0), + + /** VLAN only filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_VLAN_ONLY = (1 << 1), + + /** VLAN + MAC address filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_VLANMAC = (1 << 2), + + /** VXLAN filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_VXLAN = (1 << 3), +} vmk_UplinkQueueFilterClass; + + +/** + * UplinkQueue queue type + */ +typedef enum vmk_UplinkQueueType { + /** Invalid queue type */ + VMK_UPLINK_QUEUE_TYPE_INVALID = 0x0, + + /** RX queue type */ + VMK_UPLINK_QUEUE_TYPE_RX = 0x1, + + /** TX queue type */ + VMK_UPLINK_QUEUE_TYPE_TX = 0x2, +} vmk_UplinkQueueType; + + +/** + * UplinkQueue queue flags + */ +typedef enum vmk_UplinkQueueFlags { + /** queue is unused */ + VMK_UPLINK_QUEUE_FLAG_UNUSED = 0x0, + + /** queue is allocated and in use */ + VMK_UPLINK_QUEUE_FLAG_IN_USE = (1 << 0), + + /** queue is the default queue */ + VMK_UPLINK_QUEUE_FLAG_DEFAULT = (1 << 1), +} vmk_UplinkQueueFlags; + + +/** + * UplinkQueue queue state + */ +typedef enum vmk_UplinkQueueState { + /** Queue stopped by the driver */ + VMK_UPLINK_QUEUE_STATE_STOPPED = 0x0, + + /** Queue started administratively by the networking stack */ + VMK_UPLINK_QUEUE_STATE_STARTED = 0x1, +} vmk_UplinkQueueState; + +/** + * LRO type + * + * \note LRO types are for informational purpose only. They don't participate + * in queues partitioning and load balancing. When VMKernel allocates + * a RX queue with LRO feature, it passes VMK_UPLINK_QUEUE_FEAT_LRO + * down to driver. And driver should never expect VMKernel will pass + * LRO types down. + */ +typedef enum vmk_UplinkQueueLROType { + /** Large receive offload on IPv4 */ + VMK_UPLINK_QUEUE_LRO_TYPE_IPV4 = (1 << 0), + + /** Large receive offload on IPv6 */ + VMK_UPLINK_QUEUE_LRO_TYPE_IPV6 = (1 << 1), +} vmk_UplinkQueueLROType; + +/** + * LRO constraints + */ +typedef struct vmk_UplinkQueueLROConstraints { + /** Combination of hardware supported LRO types */ + vmk_UplinkQueueLROType supportedTypes; +} vmk_UplinkQueueLROConstraints; + +/** + * UplinkQueue queue feature + */ +typedef enum vmk_UplinkQueueFeature { + /** None */ + VMK_UPLINK_QUEUE_FEAT_NONE = 0x00, + + /** Supports setting queue large receive offload(LRO) feature */ + VMK_UPLINK_QUEUE_FEAT_LRO = (1 << 0), + + /** Paired queue feature */ + VMK_UPLINK_QUEUE_FEAT_PAIR = (1 << 1), + + /** Supports setting queue receive segment scaling (RSS) feature */ + VMK_UPLINK_QUEUE_FEAT_RSS = (1 << 2), + + /** Supports setting queue priority */ + VMK_UPLINK_QUEUE_FEAT_SET_PRIO = (1 << 3), + + /** Supports setting queue level intr coalescing parameters */ + VMK_UPLINK_QUEUE_FEAT_COALESCE = (1 << 4), + + /** + * Supports modification of RSS indirection table at run time + * \note Driver must call vmk_UplinkQueueRegisterFeatureOps, and + * provide vmk_UplinkQueueRSSDynOps before claiming it supports + * this feature + */ + VMK_UPLINK_QUEUE_FEAT_RSS_DYN = (1 << 5), + + /** Latency Sensitive queue feature */ + VMK_UPLINK_QUEUE_FEAT_LATENCY = (1 << 6), + + /** Dynamic queue feature */ + VMK_UPLINK_QUEUE_FEAT_DYNAMIC = (1 << 7), + + /** Pre-emptible queue feature */ + VMK_UPLINK_QUEUE_FEAT_PREEMPTIBLE = (1 << 8), +} vmk_UplinkQueueFeature; + + +/** + * \brief Filter definition + */ +typedef struct vmk_UplinkQueueFilter { + + /** Filter class */ + vmk_UplinkQueueFilterClass class; + + /** + * pointer to filter + * class filter + * MAC_ONLY vmk_UplinkQueueMACFilterInfo + * VLAN_ONLY vmk_UplinkQueueVLANFilterInfo + * VLAN+MAC vmk_UplinkQueueVLANMACFilterInfo + * VXLAN vmk_UplinkQueueVXLANFilterInfo + */ + vmk_AddrCookie filterInfo; +} vmk_UplinkQueueFilter; + + +/** + * \brief MAC address only filter info + */ +typedef struct vmk_UplinkQueueMACFilterInfo { + /** MAC address */ + vmk_EthAddress mac; +} vmk_UplinkQueueMACFilterInfo; + + +/** + * \brief VLAN ID only filter info + */ +typedef struct vmk_UplinkQueueVLANFilterInfo { + /** VLAN ID */ + vmk_VlanID vlanID; +} vmk_UplinkQueueVLANFilterInfo; + + +/** + * \brief MAC address + VLAN ID filter info + */ +typedef struct vmk_UplinkQueueVLANMACFilterInfo { + /** MAC address */ + vmk_EthAddress mac; + + /** VLAN ID */ + vmk_VlanID vlanID; +} vmk_UplinkQueueVLANMACFilterInfo; + + +/** + * \brief VXLAN filter info + */ +typedef struct vmk_UplinkQueueVXLANFilterInfo { + /** Inner MAC address */ + vmk_EthAddress innerMAC; + + /** Outer MAC address */ + vmk_EthAddress outerMAC; + + /** VXLAN ID */ + vmk_uint32 vxlanID; +} vmk_UplinkQueueVXLANFilterInfo; + + +/** + * \brief Filter properties + */ +typedef enum vmk_UplinkQueueFilterProperties { + /** None */ + VMK_UPLINK_QUEUE_FILTER_PROP_NONE = 0x0, + + /** Management filter */ + VMK_UPLINK_QUEUE_FILTER_PROP_MGMT = 0x1, + + /** Opportunistically packed with other filters */ + VMK_UPLINK_QUEUE_FILTER_PROP_PACK_OPPO = 0x2, + + /** Opportunistically seek exclusive netqueue */ + VMK_UPLINK_QUEUE_FILTER_EXCL_PACK_OPPO = 0x4, +} vmk_UplinkQueueFilterProperties; + + +/** + * \brief UplinkQueue queue attribute type + */ +typedef enum vmk_UplinkQueueAttrType { + /** Priority attribute */ + VMK_UPLINK_QUEUE_ATTR_PRIOR = 0x0, + + /** Features attribute */ + VMK_UPLINK_QUEUE_ATTR_FEAT = 0x1, +} vmk_UplinkQueueAttrType; + + +/** + * \brief UplinkQueue queue attribute + */ +typedef struct vmk_UplinkQueueAttr { + /** Uplink queue attribute type */ + vmk_UplinkQueueAttrType type; + + union { + + /** VMK_UPLINK_QUEUE_ATTR_PRIOR argument */ + vmk_VlanPriority priority; + + /** VMK_UPLINK_QUEUE_ATTR_FEAT argument */ + vmk_UplinkQueueFeature features; + + /** Generic attribute argument */ + vmk_AddrCookie attr; + } args; +} vmk_UplinkQueueAttr; + + +/** + * \brief Structure describing interrupt coalescing parameters + * of an uplink + */ +typedef struct vmk_UplinkCoalesceParams { + /** + * \brief number of microseconds to wait for Rx, before + * interrupting + */ + vmk_uint32 rxUsecs; + + /** + * \brief maximum number of (Rx) frames to wait for, before + * interrupting + */ + vmk_uint32 rxMaxFrames; + + /** + * \brief number of microseconds to wait for completed Tx, before + * interrupting + */ + vmk_uint32 txUsecs; + + /** + * \brief maximum number of completed (Tx) frames to wait for, + * before interrupting + */ + vmk_uint32 txMaxFrames; + +} vmk_UplinkCoalesceParams; + + +/** \brief Structure describing realloc params of queue. */ +typedef struct vmk_UplinkQueueReallocParams { + /** \brief Queue type. */ + vmk_UplinkQueueType qType; + + /** + * \brief Number of attributes. + * + * Attributes associated with the function vmk_UplinkQueueReallocWithAttrCB. + * Number of attributes should not be greater than VMK_UPLINK_QUEUE_ATTR_NUM. + */ + vmk_uint16 numAttr; + + /** \brief Queue attributes. */ + vmk_UplinkQueueAttr *attr; + + /** \brief ID of already created queue. */ + vmk_UplinkQueueID *qID; + + /** \brief Count of filters to be removed. */ + vmk_uint16 numOldFilters; + + /** \brief Pointer to array of already applied filter IDs. */ + vmk_UplinkQueueFilterID *oldFid; + + /** \brief New queue filter to be applied. */ + vmk_UplinkQueueFilter *newFilter; + + /** \brief New Filter ID. */ + vmk_UplinkQueueFilterID *newFid; + + /** \brief Potential paired tx queue hardware index. */ + vmk_uint32 *pairHWQID; + + /** \brief Net poll on top of the allocated queue if any. */ + vmk_NetPoll *netpoll; + +} vmk_UplinkQueueReallocParams; + + +/** + * \brief RSS hash key + * + * This structure is used to program the RSS hash key. + */ +typedef struct vmk_UplinkQueueRSSHashKey { + /** Key size in bytes */ + vmk_uint16 keySize; + + /** Key contents */ + vmk_uint8 key[0]; + +} vmk_UplinkQueueRSSHashKey; + + +/** + * \brief RSS indirection table + * + * This structure is used to program or update the RSS indirection table. + */ +typedef struct vmk_UplinkQueueRSSIndTable { + /** Size of the table in bytes */ + vmk_uint16 tableSize; + + /** Contents */ + vmk_uint8 table[0]; + +} vmk_UplinkQueueRSSIndTable; + + +/** + * \brief RSS parameters + */ +typedef struct vmk_UplinkQueueRSSParams { + /** Number of RSS pools supported */ + vmk_uint16 numRSSPools; + + /** Number of RSS queues per pool */ + vmk_uint16 numRSSQueuesPerPool; + + /** Length of the RSS hash key in bytes */ + vmk_uint16 rssHashKeySize; + + /** Size of the RSS indirection table */ + vmk_uint16 rssIndTableSize; + +} vmk_UplinkQueueRSSParams; + + +/* + *********************************************************************** + * vmk_UplinkCoalesceParamsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get coalescing parameters of + * device associated with an uplink. + * + * \param[in] driverData Points to the internal module structure + * for the device associated to the uplink. + * Before calling vmk_DeviceRegister, device + * driver needs to assign this pointer to + * member driverData in structure + * vmk_UplinkRegData. + * \param[out] coalesceParams Structure used to store all the requested + * information. + * + * \retval VMK_OK If the driver information is properly + * stored + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkCoalesceParamsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkCoalesceParams *params); + + +/* + *********************************************************************** + * vmk_UplinkCoalesceParamsSetCB -- */ /** + * + * \brief Handler used by vmkernel to set coalescing parameters of + * device associated with an uplink. + * + * \param[in] driverData Points to the internal module structure + * for the device associated to the uplink. + * Before calling vmk_DeviceRegister, device + * driver needs to assign this pointer to + * member driverData in structure + * vmk_UplinkRegData. + * \param[in] coalesceParams Structure used to store all the requested + * information. + * + * \retval VMK_OK If the driver information is properly set + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkCoalesceParamsSetCB)(vmk_AddrCookie driverData, + vmk_UplinkCoalesceParams *params); + + +/** + * Uplink coalesce paramters + */ +typedef struct vmk_UplinkCoalesceParamsOps { + /** callback to get coalesce paramters */ + vmk_UplinkCoalesceParamsGetCB getParams; + + /** callback to set coalesce paramters */ + vmk_UplinkCoalesceParamsSetCB setParams; +} vmk_UplinkCoalesceParamsOps; + + +/* + *********************************************************************** + * vmk_UplinkQueueGetNumQueuesSupported */ /** + * + * \brief Get maximum number of TX and RX queues device driver should + * expose to vmkernel + * + * \note Device driver must call this function before uplink logical + * device registration. The total TX/RX queue number exposed by + * driver should not exceed the numbers returned. + * + * \param[in] numDevTxQueues Number of TX queues device can support + * \param[in] numDevRxQueues Number of RX queues device can support + * \param[out] maxTxQueues Maximum number of TX queues driver should + * expose to vmkernel. It's set to the lower + * one of numDevTxQueues and vmkernel + * physical CPU cores + * \param[out] maxRxQueues Maximum number of RX queues driver should + * expose to vmkernel. It's set to the lower + * one of numDevRxQueues and vmkernel + * physical CPU cores + * + * \retval VMK_OK Always + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueGetNumQueuesSupported(vmk_uint32 numDevTxQueues, + vmk_uint32 numDevRxQueues, + vmk_uint32 *maxTxQueues, + vmk_uint32 *maxRxQueues); + + +/* + *********************************************************************** + * vmk_UplinkQueueSetQueueIDUserVal -- */ /** + * + * \brief Set user's private value for queue ID. + * + * \param[in] qid Queue ID. + * \param[in] userval User value. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueSetQueueIDUserVal(vmk_UplinkQueueID *qid, + vmk_uint32 userval); + + +/* + *********************************************************************** + * vmk_UplinkQueueIDUserVal -- */ /** + * + * \brief Get user part of queue ID + * + * \param[in] qid Queue ID. + * + * \retval vmk_uint32 User value. + * + *********************************************************************** + */ + +vmk_uint32 vmk_UplinkQueueIDUserVal(vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueSetQueueIDQueueDataIndex -- */ /** + * + * \brief Set queue data index for queue ID. + * + * \param[in] qid Queue ID. + * \param[in] index Index into queue data array in shared data + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueSetQueueIDQueueDataIndex(vmk_UplinkQueueID *qid, + vmk_uint32 index); + + +/* + *********************************************************************** + * vmk_UplinkQueueIDQueueDataIndex -- */ /** + * + * \brief Get queue data array index part of queue ID + * + * \param[in] qid Queue ID. + * + * \retval vmk_uint32 Queue data array index + * + *********************************************************************** + */ + +vmk_uint32 vmk_UplinkQueueIDQueueDataIndex(vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueMkTxQueueID -- */ /** + * + * \brief Set shared queue data array index and user value in a TX queue + * ID. + * + * \param[out] qid Pointer to queue ID allocated by caller. + * \param[in] index The index into queue data array in shared data + * \param[in] val The embedded value of the queue ID. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueMkTxQueueID(vmk_UplinkQueueID *qid, + vmk_uint32 index, + vmk_uint32 val); + + +/* + *********************************************************************** + * vmk_UplinkQueueMkRxQueueID -- */ /** + * + * \brief Set shared queue data array index and user value in a RX queue + * ID. + * + * \param[out] qid Pointer to queue ID allocated by caller. + * \param[in] index The index into queue data array in shared data + * \param[in] val The embedded value of the queue ID. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueMkRxQueueID(vmk_UplinkQueueID *qid, + vmk_uint32 index, + vmk_uint32 val); + + +/* + *********************************************************************** + * vmk_UplinkQueueIDVal -- */ /** + * + * \brief Retrieve the embedded value of a queue ID. + * + * \param[in] qid The aimed queue ID. + * + * \return The embedded value. + * + *********************************************************************** + */ + +vmk_uint32 vmk_UplinkQueueIDVal(vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueIDType -- */ /** + * + * \brief Retrieve the type of a queue ID. + * + * \param[in] qid The aimed queue ID. + * + * \return The type. + * + *********************************************************************** + */ + +vmk_UplinkQueueType vmk_UplinkQueueIDType(vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueMkFilterID -- */ /** + * + * \brief Create a filter ID. + * + * \param[in] val The embedded value of the filter ID. + * \param[out] fid The created filter. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueMkFilterID(vmk_UplinkQueueFilterID *fid, + vmk_uint16 val); + + +/* + *********************************************************************** + * vmk_UplinkQueueFilterIDVal -- */ /** + * + * \brief Retrieve the embedded value of a filter ID. + * + * \param[in] fid The aimed filter ID. + * + * \return The embedded value. + * + *********************************************************************** + */ + +vmk_uint16 vmk_UplinkQueueFilterIDVal(vmk_UplinkQueueFilterID fid); + + +/* + *********************************************************************** + * vmk_PktQueueIDGet -- */ /** + * + * \brief Retrieve netqueue queue ID of a specified packet. + * + * \param[in] pkt Packet of interest + * + * \return UplinkQueue queue ID. + * + *********************************************************************** + */ + +vmk_UplinkQueueID vmk_PktQueueIDGet(vmk_PktHandle *pkt); + + +/* + *********************************************************************** + * vmk_PktQueueIDSet -- */ /** + * + * \brief Set netqueue queue ID of a specified packet. + * + * \param[in] pkt Packet of interest + * \param[in] qid Packet queue ID + * + * \retval VMK_OK + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktQueueIDSet(vmk_PktHandle *pkt, + vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueAllocCB -- */ /** + * + * \brief Handler used by vmkernel to call into device driver to + * allocate a TX/RX queue. + * + * \note The TX/RX queue is allocated and maintained by device driver. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qType queue type + * \param[out] qID ID of newly created queue, driver must call + * vmk_UplinkQueueMkTxQueueID or + * vmk_UplinkQueueMkRxQueueID to set its value. + * \param[out] netpoll Net poll on top of the allocated queue if + * any + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueAllocCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueType qType, + vmk_UplinkQueueID *qID, + vmk_NetPoll *netpoll); + + +/* + *********************************************************************** + * vmk_UplinkQueueAllocWithAttrCB -- */ /** + * + * \brief Handler used by vmkernel to call into device driver to + * allocate a TX/RX queue with extra attributes. + * + * \note The TX/RX queue is allocated and maintained by device driver. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qType queue type + * \param[in] numAttr Number of attributes, It cannot be greater + than VMK_UPLINK_QUEUE_ATTR_NUM + * \param[in] attr Queue attributes + * \param[out] qID ID of newly created queue, driver must call + * vmk_UplinkQueueMkTxQueueID or + * vmk_UplinkQueueMkRxQueueID to set its value. + * \param[out] netpoll Net poll on top of the allocated queue if + * any + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueAllocWithAttrCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueType qType, + vmk_uint16 numAttr, + vmk_UplinkQueueAttr *attr, + vmk_UplinkQueueID *qID, + vmk_NetPoll *netpoll); + + +/* + *********************************************************************** + * vmk_UplinkQueueReallocWithAttrCB -- */ /** + * + * \brief Handler for reallocating RX queue. + * + * Handler used by vmkernel to call into device driver to + * reallocate a RX queue with extra attributes. + * + * \note The RX queue is allocated and maintained by device driver. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] params Realloc queue params. + * + * \retval VMK_OK On success. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueReallocWithAttrCB)( + vmk_AddrCookie driverData, + vmk_UplinkQueueReallocParams *params); + + +/* + *********************************************************************** + * vmk_UplinkQueueFreeCB -- */ /** + * + * \brief Handler used by vmkernel to free a queue + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueFreeCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueQuiesceCB -- */ /** + * + * \brief Handler used by vmkernel to quiesce a queue + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueQuiesceCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueStartCB -- */ /** + * + * \brief Handler used by vmkernel to start a queue + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueStartCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueFilterApplyCB -- */ /** + * + * \brief Handler used by vmkernel to apply a queue filter + * + * \note pairHWQID is hardware's internal TX queue identifier, it must + * be same as the embedded value passed to + * vmk_UplinkQueueMkTxQueueID when a TX queue is allocated. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] qFilter queue Filter + * \param[out] fid Filter ID + * \param[out] pairHWQID Potential paired tx queue hardware index + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueFilterApplyCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkQueueFilter *qFilter, + vmk_UplinkQueueFilterID *fid, + vmk_uint32 *pairHWQID); + + +/* + *********************************************************************** + * vmk_UplinkQueueFilterRemoveCB -- */ /** + * + * \brief Handler used by vmkernel to remove a queue filter + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] fid Filter ID + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueFilterRemoveCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkQueueFilterID fid); + + +/* + *********************************************************************** + * vmk_UplinkQueueStatsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get queue stats + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[out] stats stats of queue + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueStatsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + struct vmk_UplinkStats *stats); + + +/* + *********************************************************************** + * vmk_UplinkQueueFeatureToggleCB -- */ /** + * + * \brief Handler used by vmkernel to toggle a queue feature + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] qFeature queue Feature + * \param[in] setUnset set or unset the feature + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueFeatureToggleCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkQueueFeature qFeature, + vmk_Bool setUnset); + + +/* + *********************************************************************** + * vmk_UplinkQueueTxPrioritySetCB -- */ /** + * + * \brief Handler used by vmkernel to set queue priority + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] priority queue priority + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueTxPrioritySetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkQueuePriority priority); + + +/* + *********************************************************************** + * vmk_UplinkQueueCoalesceParamsSetCB -- */ /** + * + * \brief Handler used by vmkernel to set queue coalesce parameters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] params coalesce params + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueCoalesceParamsSetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkCoalesceParams *params); + + +/* + *********************************************************************** + * vmk_UplinkQueueRSSParamsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get device RSS parameters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] params RSS parameters returned + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueRSSParamsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueRSSParams *params); + + +/* + *********************************************************************** + * vmk_UplinkQueueRSSStateInitCB -- */ /** + * + * \brief Handler used by vmkernel to init RSS state on device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] rssHashKey Initial value of RSS hash key + * \param[in] rssIndTable Initial value of RSS indirection table + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueRSSStateInitCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueRSSHashKey *rssHashKey, + vmk_UplinkQueueRSSIndTable *rssIndTable); + + +/* + *********************************************************************** + * vmk_UplinkQueueRSSIndTableUpdateCB -- */ /** + * + * \brief Handler used by vmkernel to update RSS indirection table on + * device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] rssIndTable RSS indirection table to update + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueRSSIndTableUpdateCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueRSSIndTable *rssIndTable); + + +/* + *********************************************************************** + * vmk_UplinkQueueRSSIndTableGetCB -- */ /** + * + * \brief Handler used by vmkernel to get current RSS indirection table + * on device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] rssIndTable Current RSS hash indirection table on device + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueRSSIndTableGetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueRSSIndTable *rssIndTable); + + +/** UplinkQueue operations */ +typedef struct vmk_UplinkQueueOps { + /** callback to allocate netqueue queue */ + vmk_UplinkQueueAllocCB queueAlloc; + + /** callback to allocate queue with attributes */ + vmk_UplinkQueueAllocWithAttrCB queueAllocWithAttr; + + /** callback to Reallocate queue with attributes */ + vmk_UplinkQueueReallocWithAttrCB queueReallocWithAttr; + + /** callback to free queue */ + vmk_UplinkQueueFreeCB queueFree; + + /** callback to quiesce queue */ + vmk_UplinkQueueQuiesceCB queueQuiesce; + + /** callback to start queue */ + vmk_UplinkQueueStartCB queueStart; + + /** callback to apply queue filter */ + vmk_UplinkQueueFilterApplyCB queueApplyFilter; + + /** callback to remove queue filter */ + vmk_UplinkQueueFilterRemoveCB queueRemoveFilter; + + /**callback to get queue stats */ + vmk_UplinkQueueStatsGetCB queueGetStats; + + /** callback to toggle queue feature */ + vmk_UplinkQueueFeatureToggleCB queueToggleFeature; + + /** callback to set queue priority */ + vmk_UplinkQueueTxPrioritySetCB queueSetPriority; + + /** callback to set coalesce parameters */ + vmk_UplinkQueueCoalesceParamsSetCB queueSetCoalesceParams; +} vmk_UplinkQueueOps; + + +/** UplinkQueue dynamic RSS operations */ +typedef struct vmk_UplinkQueueRSSDynOps{ + /** callback to get RSS parameters */ + vmk_UplinkQueueRSSParamsGetCB queueGetRSSParams; + + /** callback to init RSS state */ + vmk_UplinkQueueRSSStateInitCB queueInitRSSState; + + /** callback to update RSS indirection table */ + vmk_UplinkQueueRSSIndTableUpdateCB queueUpdateRSSIndTable; + + /** callback to get RSS indirection table */ + vmk_UplinkQueueRSSIndTableGetCB queueGetRSSIndTable; +} vmk_UplinkQueueRSSDynOps; + + +/** + * Shared data of a single queue + */ +typedef struct vmk_UplinkSharedQueueData { + /** queue flags */ + volatile vmk_UplinkQueueFlags flags; + + /** queue type */ + vmk_UplinkQueueType type; + + /** queue ID */ + vmk_UplinkQueueID qid; + + /** queue state */ + volatile vmk_UplinkQueueState state; + + /** queue supported features */ + vmk_UplinkQueueFeature supportedFeatures; + + /** queue active features bit vector */ + vmk_UplinkQueueFeature activeFeatures; + + /** maximum filters supported */ + vmk_uint32 maxFilters; + + /** number of active filters */ + vmk_uint32 activeFilters; + + /** Associated vmk_NetPoll context */ + vmk_NetPoll poll; + + /** Associated DMA engine for allocation constraints */ + vmk_DMAEngine dmaEngine; + + /** Tx priority assigned to queue */ + vmk_UplinkQueuePriority priority; + + /** Queue level interrupt coalescing parameters */ + vmk_UplinkCoalesceParams coalesceParams; +} vmk_UplinkSharedQueueData; + + +/** + * Shared information of all queues on a driver + */ +typedef struct vmk_UplinkSharedQueueInfo { + /** supported queue types */ + vmk_UplinkQueueType supportedQueueTypes; + + /** supported queue filter classes */ + vmk_UplinkQueueFilterClass supportedRxQueueFilterClasses; + + /** default Rx queue ID */ + vmk_UplinkQueueID defaultRxQueueID; + + /** default Tx queue ID */ + vmk_UplinkQueueID defaultTxQueueID; + + /** maximum Rx queues */ + vmk_uint32 maxRxQueues; + + /** maximum Tx queues */ + vmk_uint32 maxTxQueues; + + /** number of active Rx queues */ + vmk_uint32 activeRxQueues; + + /** number of active Tx queues */ + vmk_uint32 activeTxQueues; + + /** active queue bit vector */ + vmk_BitVector *activeQueues; + + /** maximum/total filters supported across all the queues of device */ + vmk_uint32 maxTotalDeviceFilters; + + /** + * shared queue data. Drivers that do not support multiple queues + * still need to populate one queue + */ + vmk_UplinkSharedQueueData *queueData; +} vmk_UplinkSharedQueueInfo; + + +/* + *********************************************************************** + * vmk_UplinkQueueInvalidate -- */ /** + * + * \brief Invalidate a queue in an uplink + * + * The driver can ask the kernel to invalidate a queue. What this means + * is that all the filters on that queue are assumed to be removed, all + * the queue features are reset and the queue is free'd. + * + * \param[in] uplink Uplink handle + * \param[in] qID queue id to be invalidated + * + * \retval VMK_OK if the reset call succeeds + * \retval VMK_FAILURE if the uplink doesn't support reset + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueInvalidate(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueStop -- */ /** + * + * \brief Notify stack of uplink queue stop + * + * \param[in] uplink Uplink aimed + * \param[in] qid Queue ID + * + * \retval VMK_OK + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueStop(vmk_Uplink uplink, + vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueStart -- */ /** + * + * \brief Notify stack of uplink queue (re)start + * + * \param[in] uplink Uplink aimed + * \param[in] qid Queue ID + * + * \retval VMK_OK + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueStart(vmk_Uplink uplink, + vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueRegisterFeatureOps -- */ /** + * + * \brief Register callback operations for a specific queue feature + * + * Some feature requires a set of callback operations. Driver needs to + * register these callbacks before claiming it supports this feature. + * + * \param[in] uplink Uplink handle + * \param[in] feature The uplink queue feature to support + * \param[in] ops Pointer to the operations associated + * to this feature + * + * \retval VMK_OK if the reset call succeeds + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueRegisterFeatureOps(vmk_Uplink uplink, + vmk_UplinkQueueFeature feature, + void *ops); + +#endif /* _VMKAPI_NET_QUEUE_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_types.h index dc2742d..ff17777 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_types.h @@ -109,6 +109,11 @@ typedef vmk_uint8 vmk_EthAddress[VMK_ETH_ADDR_LENGTH]; /** Invalid identification number for a port */ #define VMK_VSWITCH_INVALID_PORT_ID 0 +/** + * \brief Identifier for a portset. + */ +typedef struct Portset vmk_Portset; + /** * \brief Identifier number for port on a virtual switch. */ @@ -150,7 +155,27 @@ typedef enum { typedef vmk_uint32 vmk_LinkSpeed; -#define VMK_LINK_SPEED_AUTO ((vmk_LinkSpeed) 0) +/** Uplink auto negotiated speed */ +#define VMK_LINK_SPEED_AUTO 0 + +/** Uplink link speed 10Mbps */ +#define VMK_LINK_SPEED_10_MBPS 10 + +/** Uplink link speed 100Mbps */ +#define VMK_LINK_SPEED_100_MBPS 100 + +/** Uplink link speed 1000Mbps */ +#define VMK_LINK_SPEED_1000_MBPS 1000 + +/** Uplink link speed 10000Mbps */ +#define VMK_LINK_SPEED_10000_MBPS 10000 + +/** Uplink link speed 40000Mbps */ +#define VMK_LINK_SPEED_40000_MBPS 40000 + +/** Uplink link speed 100000Mbps */ +#define VMK_LINK_SPEED_100000_MBPS 100000 + /** @@ -186,6 +211,15 @@ typedef struct { } vmk_LinkStatus; +/** + * \brief Uplink handle + * + * vmk_Uplink is used as a handle to perform operations on uplink devices. + * + */ +typedef struct UplinkDev *vmk_Uplink; + + #endif /* _VMKAPI_NET_TYPES_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_uplink.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_uplink.h index 3f3586d..5dd2a74 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_uplink.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/net/vmkapi_net_uplink.h @@ -12,11 +12,33 @@ * \addtogroup Network *@{ * \defgroup Uplink Uplink management + * + * In VMkernel, uplinks are logical uplink device objects registered by + * NIC drivers. They provide external connectivity. + * + * To register an uplink, device driver prepares uplink registraion data + * and passes it to vmk_DeviceRegister as registrationData in parameter + * vmk_DeviceProps. + * + * Once uplink device is created and registered, VMKernel calls driver's + * vmk_UplinkAssociateCB callback, where uplink object handle is handed + * off to device driver. Device driver should keep a copy of this handle + * and pass it to subsequent uplink vmkapi calls. Driver must declare + * all supported capabilities in this callback by calling + * vmk_UplinkCapRegister. + * + * After vmk_DeviceRegister returns, device driver should suppress any + * TX/RX activities until vmk_UplinkStartIOCB is invoked by VMKernel. + * + * vmk_UplinkQuiesceIOCB is invoked when logical uplink device is being + * quiesced. Driver should flush pending TX/RX packets and arrange for + * any new TX request to be ignored. + * + * vmk_UplinkDisassociateCB is invoked to inform the driver that the + * uplink handle is invalid. After the callback returns, driver should + * not use the uplink handle in any VMKAPI calls. + * *@{ - * - * In VMkernel, uplinks are physical NICs, also known as `pNics'. They - * provide external connectivity. - * *********************************************************************** */ #ifndef _VMKAPI_NET_UPLINK_H_ @@ -28,15 +50,22 @@ #endif /** \endcond never */ +#include "net/vmkapi_net_poll.h" +#include "net/vmkapi_net_vlan.h" +#include "net/vmkapi_net_dcb.h" +#include "net/vmkapi_net_queue.h" +#include "net/vmkapi_net_vlan.h" /** - * \brief Uplink handle - * - * vmk_Uplink is used as a handle to perform operations on uplink devices. - * + * \brief Identifier for logical uplink devices. */ -typedef struct UplinkDev * vmk_Uplink; +#define VMK_UPLINK_DEVICE_IDENTIFIER "com.vmware.uplink" + +/** + * \brief Number of bytes for uplink wake-on-lan strings. + */ +#define VMK_UPLINK_WOL_STRING_MAX 16 /** \brief Uplink event callback handle */ typedef void *vmk_UplinkEventCBHandle; @@ -71,6 +100,1820 @@ typedef struct vmk_UplinkEventData vmk_UplinkEventData; /** Uplink bas been unblocked on a portset */ #define VMK_UPLINK_EVENT_UNBLOCKED 0x80 + +/** + * \brief Uplink flags for misc. info. + */ +typedef enum vmk_UplinkFlags { + /** Physical device is hidden from management apps */ + VMK_UPLINK_FLAG_HIDDEN = 0x01, + + /** Physical device is being registered as pseudo device */ + VMK_UPLINK_FLAG_PSEUDO_REG = 0x02, +} vmk_UplinkFlags; + + + +/** + * \brief Uplink state + */ +typedef enum vmk_UplinkState { + + /** + * Uplink is administratively enabled + */ + VMK_UPLINK_STATE_ENABLED = 0x01, + + /** + * Uplink is administratively disabled + */ + VMK_UPLINK_STATE_DISABLED = 0x02, + + /** + * Uplink is in promiscuous mode + */ + VMK_UPLINK_STATE_PROMISC = 0x04, + + /** + * Uplink can receive broadcast packets + */ + VMK_UPLINK_STATE_BROADCAST_OK = 0x08, + + /** + * Uplink can receive multicast packets + */ + VMK_UPLINK_STATE_MULTICAST_OK = 0x10, +} vmk_UplinkState; + + +/** + * \brief Structure advertising a mode (speed/duplex) that is supported by + * an uplink. + */ + +typedef struct vmk_UplinkSupportedMode { + + /** Supported speed */ + vmk_LinkSpeed speed; + + /** Supported duplex */ + vmk_LinkDuplex duplex; + +} vmk_UplinkSupportedMode; + + +/** + * \brief Structure containing the information of the driver controlling + * the device associated to an uplink. + */ +typedef struct vmk_UplinkDriverInfo { + + /** String used to store the name of the driver */ + vmk_Name driver; + + /** String used to store the version of the driver */ + vmk_Name version; + + /** String used to store the firmware version of the driver */ + vmk_Name firmwareVersion; + + /** String used to store the name of the module managing this driver */ + vmk_Name moduleInterface; +} vmk_UplinkDriverInfo; + +/** + * \brief Structure containing statistics of the device associated to an + * uplink + */ +typedef struct vmk_UplinkStats { + + /** The number of rx packets received by the device */ + vmk_uint64 rxPkts; + + /** The number of tx packets sent by the device */ + vmk_uint64 txPkts; + + /** The number of rx bytes by the device */ + vmk_ByteCount rxBytes; + + /** The number of tx bytes by the device */ + vmk_ByteCount txBytes; + + /** The number of rx packets with errors */ + vmk_uint64 rxErrors; + + /** The number of tx packets with errors */ + vmk_uint64 txErrors; + + /** The number of rx packets dropped */ + vmk_uint64 rxDrops; + + /** The number of tx packets dropped */ + vmk_uint64 txDrops; + + /** The number of rx multicast packets */ + vmk_uint64 multicastPkts; + + /** The number of collisions */ + vmk_uint64 collisions; + + /** The number of rx length errors */ + vmk_uint64 rxLengthErrors; + + /** The number of rx ring buffer overflow */ + vmk_uint64 rxOverflowErrors; + + /** The number of rx packets with crc errors */ + vmk_uint64 rxCRCErrors; + + /** The number of rx packets with frame alignment error */ + vmk_uint64 rxFrameAlignErrors; + + /** The number of rx fifo overrun */ + vmk_uint64 rxFifoErrors; + + /** The number of rx packets missed */ + vmk_uint64 rxMissErrors; + + /** The number of tx aborted errors */ + vmk_uint64 txAbortedErrors; + + /** The number of tx carriers errors */ + vmk_uint64 txCarrierErrors; + + /** The number of tx fifo errors */ + vmk_uint64 txFifoErrors; + + /** The number of tx heartbeat errors */ + vmk_uint64 txHeartbeatErrors; + + /** The number of tx windows errors */ + vmk_uint64 txWindowErrors; +} vmk_UplinkStats; + +/** + * Uplink offload header alignment + */ +typedef enum vmk_UplinkOffloadHeaderAlignment { + /** Header starting address requires no alignment */ + VMK_UPLINK_OFFLOAD_HDR_ALIGN_ANY = 1, + + /** Header starting address must be 2 bytes aligned */ + VMK_UPLINK_OFFLOAD_HDR_ALIGN_2_BYTES = 2, + + /** Header starting address must be 4 bytes aligned */ + VMK_UPLINK_OFFLOAD_HDR_ALIGN_4_BYTES = 4, +} vmk_UplinkOffloadHeaderAlignment; + + +/** + * Uplink offload constraints + */ +typedef struct vmk_UplinkOffloadConstraints { + /** L3/L4 header alignment in bytes */ + vmk_UplinkOffloadHeaderAlignment headerAlignment; + + /** + * Maximum header offset supported by driver + * 0 = no limit + * Otherwise, driver can only support offloading with packet + * header offset no larger than maxHeaderOffset. + */ + vmk_uint32 maxHeaderOffset; +} vmk_UplinkOffloadConstraints; + + +/** + * Uplink capabilities + */ +typedef enum vmk_UplinkCap { + + /** Driver supports scatter-gather transmit */ + VMK_UPLINK_CAP_SG_TX = 1, + + /** Driver supports scatter-gather receive */ + VMK_UPLINK_CAP_SG_RX = 2, + + /** Driver supports scatter-gather entries spanning multiple pages */ + VMK_UPLINK_CAP_MULTI_PAGE_SG = 3, + + /** Driver supports IPv4 checksum offload */ + VMK_UPLINK_CAP_IPV4_CSO = 4, + + /** Driver supports IPv6 checksum offload */ + VMK_UPLINK_CAP_IPV6_CSO = 5, + + /** Driver supports checksum offload for IPV6 with extension headers */ + VMK_UPLINK_CAP_IPV6_EXT_CSO = 6, + + /** Driver supports VLAN RX offload (tag stripping) */ + VMK_UPLINK_CAP_VLAN_RX_STRIP = 7, + + /** Driver supports VLAN TX Offload (tag insertion) */ + VMK_UPLINK_CAP_VLAN_TX_INSERT = 8, + + /** Driver supports IPv4 TCP segmentation offload (TSO) */ + VMK_UPLINK_CAP_IPV4_TSO = 9, + + /** Driver supports IPv6 TCP segmentation offload (TSO) */ + VMK_UPLINK_CAP_IPV6_TSO = 10, + + /** Driver supports TSO for IPV6 with extension headers */ + VMK_UPLINK_CAP_IPV6_EXT_TSO = 11, + + /** Driver requires to be able to modify packet headers (on TX) */ + VMK_UPLINK_CAP_MOD_TX_HDRS = 12, + + /** Driver requires no packet scheduling */ + VMK_UPLINK_CAP_NO_SCHEDULER = 13, + + /** Driver supports accessing private statistics */ + VMK_UPLINK_CAP_PRIV_STATS = 14, + + /** + * Driver supports changing link status + * \note Driver must pass a pointer to vmk_UplinkLinkStatusSetCB + * when registering this capability. + */ + VMK_UPLINK_CAP_LINK_STATUS_SET = 15, + + /** + * Driver supports changing the interface MAC address + * \note Driver must pass a pointer to vmk_UplinkMACAddrSetCB when + * registering this capability. + */ + VMK_UPLINK_CAP_MAC_ADDR_SET = 16, + + /** + * Driver supports changing interrupt coalescing parameters + * \note Driver must pass a pointer to vmk_UplinkCoalesceParamsOps + * when registering this capability. + */ + VMK_UPLINK_CAP_COALESCE_PARAMS = 17, + + /** + * Driver supports VLAN filtering + * \note Driver must pass a pointer to vmk_UplinkVLANFilterOps when + * registering this capability. + */ + VMK_UPLINK_CAP_VLAN_FILTER = 18, + + /** + * Driver supports Wake-On-LAN + * \note Driver must pass a pointer to vmk_UplinkWOLOps when + * registering this capability. + */ + VMK_UPLINK_CAP_WAKE_ON_LAN = 19, + + /** + * Driver supports network core dumping + * \note Driver must pass a pointer to vmk_UplinkNetDumpOps when + * registering this capability. + */ + VMK_UPLINK_CAP_NETWORK_DUMP = 20, + + /** + * Driver supports multiple queue + * \note Driver must pass a pointer to vmk_UplinkQueueOps when + * registering this capability. + */ + VMK_UPLINK_CAP_MULTI_QUEUE = 21, + + /** + * Driver supports datacenter bridging (DCB) + * \note Driver must pass a pointer to vmk_UplinkDCBOps when + * registering this capability. + */ + VMK_UPLINK_CAP_DCB = 22, + + /** Driver supports UPT */ + VMK_UPLINK_CAP_UPT = 23, + + /** Driver supports SRIOV */ + VMK_UPLINK_CAP_SRIOV = 24, + + /** + * Driver supports encapsulated packet offload (eg. vxlan offload) + * \note When registering this capability, driver can pass a pointer to + * vmk_UplinkEncapOffloadOps if it's interested in VXLAN port + * update notification. + */ + VMK_UPLINK_CAP_ENCAP_OFFLOAD = 25, + + /** + * Drvier's TSO/Csum Offloads can be "offset" with constraints + * \note Driver must pass a pointer to vmk_UplinkOffloadConstraints + * when registering this capability. + */ + VMK_UPLINK_CAP_OFFLOAD_CONSTRAINTS = 26, + + /** + * Driver supports EEPROM dump + * \note Driver must pass a pointer to vmk_UplinkEEPROMOps when + * registering this capability. + */ + VMK_UPLINK_CAP_EEPROM = 27, + + /** + * Driver supports register dump + * \note Driver must pass a pointer to vmk_UplinkRegDumpOps when + * registering this capability. + */ + VMK_UPLINK_CAP_REGDUMP = 28, + + /** + * Driver supports self-test + * \note Driver must pass a pointer to vmk_UplinkSelfTestOps when + * registering this capability. + */ + VMK_UPLINK_CAP_SELF_TEST = 29, + + /** + * Driver supports pause frame parameter adjusting + * \note Driver must pass a pointer to vmk_UplinkPauseParamsOps when + * registering this capability. + */ + VMK_UPLINK_CAP_PAUSE_PARAMS = 30, + + /** + * Driver supports restarting negotiation of link speed/duplexity + * \note Driver must pass a pointer to vmk_UplinkRestartNegotiationCB + * when registering this capability. + */ + VMK_UPLINK_CAP_RESTART_NEG = 31, + + /** + * Driver supports hardware large receive offload (LRO) + * \note Driver must pass a pointer to vmk_UplinkQueueLROConstraints + * when registering this capability. + */ + VMK_UPLINK_CAP_LRO = 32, +} vmk_UplinkCap; + + +/* + *********************************************************************** + * vmk_UplinkTxCB -- */ /** + * + * \brief Handler used by vmkernel to send packet through the device + * associated to an uplink. + * + * \note This callback may not block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] pktList The set of packets needed to be sent + * + * \retval VMK_OK All the packets are being processed + * \retval VMK_FAILURE If the module detects any error during Tx + process + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkTxCB)(vmk_AddrCookie driverData, + vmk_PktList pktList); + + +/* + *********************************************************************** + * vmk_UplinkMTUSetCB -- */ /** + * + * \brief Handler used by vmkernel to set up the mtu of the device + * associated with an uplink. + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] mtu The mtu to be set up + * + * \retval VMK_OK If the mtu setting is effective + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkMTUSetCB)(vmk_AddrCookie driverData, + vmk_uint32 mtu); + + +/* + *********************************************************************** + * vmk_UplinkStateSetCB -- */ /** + * + * \brief Handler used by vmkernel to set uplink state + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] state new uplink state to be set + * + * \retval VMK_OK set state succeeds + * \retval VMK_FAILURE set state fails + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkStateSetCB)(vmk_AddrCookie driverData, + vmk_UplinkState state); + + +/* + *********************************************************************** + * vmk_UplinkLinkStatusSetCB -- */ /** + * + * + * \brief Handler used by vmkernel to set the speed/duplex of a device + * associated with an uplink. + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] linkInfo Specifies speed and duplex + * + * \retval VMK_OK If operation was successful + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkLinkStatusSetCB)(vmk_AddrCookie driverData, + vmk_LinkStatus *linkInfo); + + +/* + *********************************************************************** + * vmk_UplinkStatsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get statistics on a device + * associated to an uplink. + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] stats Structure used to store all the requested + * information. + * + * \retval VMK_OK If the statistics are properly stored + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkStatsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkStats *stats); + + +/* + *********************************************************************** + * vmk_UplinkAssociateCB -- */ /** + * + * \brief Handler used by vmkernal to notify driver that uplink is + * associated with device. + * + * \note This callback may block + * \note Driver must store the uplink parameter and pass it in + * subsequent uplink vmkapi calls, like vmk_UplinkCapRegister. + * \note Driver must declare all of its capabilities in this callback. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] uplink The uplink object associated with the device. + * + * \retval VMK_OK capabilities associated successfully + * \retval VMK_FAILURE capabilities associated failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkAssociateCB)(vmk_AddrCookie driverData, + vmk_Uplink uplink); + +/* + *********************************************************************** + * vmk_UplinkDisassociateCB -- */ /** + * + * \brief Handler used by vmkernal to notify driver that uplink is + * disassociated from device. + * + * \note This callback may block + * \note Driver doesn't need to unregister its capabilities in this + * callback. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK capabilities disassociated successfully + * \retval VMK_FAILURE capabilities disassociated failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDisassociateCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkCapEnableCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver a capability is + * enabled + * + * \note The default behavior for a capability is to start off as + * "enabled". + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] cap ID of capability to be enabled + * + * \retval VMK_OK capability enabled successfully + * \retval VMK_FAILURE capability enabled failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkCapEnableCB)(vmk_AddrCookie driverData, + vmk_UplinkCap cap); + + +/* + *********************************************************************** + * vmk_UplinkCapDisableCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver a capability is + * disabled + * + * \note The default behavior for a capability is to start off as + * "enabled". + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] cap ID of capability to be disabled + * + * \retval VMK_OK capability disabled successfully + * \retval VMK_FAILURE capability disabled failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkCapDisableCB)(vmk_AddrCookie driverData, + vmk_UplinkCap cap); + + +/* + *********************************************************************** + * vmk_UplinkStartIOCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver uplink is ready to + * start IO on the device + * + * \note Driver should drop any TX/RX packets prior to this notification + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK Always + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkStartIOCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkQuiesceIOCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver uplink is ready to + * quiesce IO on the device + * + * \note Driver should flush TX/RX queues upon this notification + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK Always + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQuiesceIOCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkResetCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver uplink to reset + * the tx queues on the device. + * + * \note Driver should reset the device upon this notification + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK Always + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkResetCB)(vmk_AddrCookie driverData); + + +/** \brief Basic uplink operations */ +typedef struct vmk_UplinkOps { + + /** Transmit packet list callback */ + vmk_UplinkTxCB uplinkTx; + + /** Set MTU callback */ + vmk_UplinkMTUSetCB uplinkMTUSet; + + /** Set state callback */ + vmk_UplinkStateSetCB uplinkStateSet; + + /** Get stats callback */ + vmk_UplinkStatsGetCB uplinkStatsGet; + + /** Notification of uplink associated with device driver */ + vmk_UplinkAssociateCB uplinkAssociate; + + /** Notification of uplink disassociated from device driver */ + vmk_UplinkDisassociateCB uplinkDisassociate; + + /** Capability enable callback */ + vmk_UplinkCapEnableCB uplinkCapEnable; + + /** Capability disable callback */ + vmk_UplinkCapDisableCB uplinkCapDisable; + + /** Driver can start IO callback */ + vmk_UplinkStartIOCB uplinkStartIO; + + /** Driver should quiesce IO callback */ + vmk_UplinkQuiesceIOCB uplinkQuiesceIO; + + /** Driver reset */ + vmk_UplinkResetCB uplinkReset; +} vmk_UplinkOps; + + +/** + * \brief Capabilities of wake-on-lan (wol) + */ +typedef enum vmk_UplinkWolCaps { + /** Wake on directed frames */ + VMK_UPLINK_WAKE_ON_PHY = 0x01, + + /** Wake on unicast frame */ + VMK_UPLINK_WAKE_ON_UCAST = 0x02, + + /** Wake on multicat frame */ + VMK_UPLINK_WAKE_ON_MCAST = 0x04, + + /** Wake on broadcast frame */ + VMK_UPLINK_WAKE_ON_BCAST = 0x08, + + /** Wake on arp */ + VMK_UPLINK_WAKE_ON_ARP = 0x10, + + /** Wake up magic frame */ + VMK_UPLINK_WAKE_ON_MAGIC = 0x20, + + /** Wake on magic frame */ + VMK_UPLINK_WAKE_ON_MAGICSECURE = 0x40 + +} vmk_UplinkWolCaps; + + +/** + * \brief Structure describing the wake-on-lan features and state of an + * uplink + */ +typedef struct vmk_UplinkWolState { + + /** Uplink supported wake-on-lan features */ + vmk_UplinkWolCaps supported; + + /** Uplink enabled wake-on-lan features */ + vmk_UplinkWolCaps enabled; + + /** Wake-On-LAN secure on password */ + char secureONPassword[VMK_UPLINK_WOL_STRING_MAX]; + +} vmk_UplinkWolState; + + +/** + * \brief Data shared between uplink layer and NIC driver + * + * \note This structure is allocated and initialized by driver. It's + * readable and writable to driver. And read only to uplink layer. + * vmk_VersionedAtomic lock needs to be used for coordinating + * access, except accessing volatile fields in structure + * vmk_UplinkSharedQueueData. + * + * \note For reader, driver can read without the versioned atomic if + * reading a single field AND it doesn't care about racing with + * its own writer thread. If the driver is reading multiple fields + * or it needs to synchronize with the writer thread it can choose + * to use the versioned atomic or use another mechanism to + * synchronize with writer thread. + * + * \note For writer, driver needs to take the versioned atomic to ensure + * uplink layer can achieve snapshot consistency. If its possible + * for the driver to have multiple threads doing writes, the + * driver has to take care of their synchronization since the + * versioned atomic lock does NOT serialize multiple writers. + */ +typedef struct vmk_UplinkSharedData { + + /** Lock to ensure snapshot consistency on reads, initialized by driver */ + vmk_VersionedAtomic lock; + + /** Uplink flags */ + vmk_UplinkFlags flags; + + /** Uplink state */ + vmk_UplinkState state; + + /** Uplink link status */ + vmk_LinkStatus link; + + /** Uplink MTU */ + vmk_uint32 mtu; + + /** + * Current logical MAC address in use this can be changed via + * vmk_UplinkMACAddrSetCB() + */ + vmk_EthAddress macAddr; + + /** Permanent hardware MAC address */ + vmk_EthAddress hwMacAddr; + + /** Pointer to supported modes array, list all modes device can support */ + vmk_UplinkSupportedMode *supportedModes; + + /** Size of supportedModes array in vmk_UplinkSupportedMode */ + vmk_uint32 supportedModesArraySz; + + /** Driver information */ + vmk_UplinkDriverInfo driverInfo; + + /** Shared queue information, mandatory for all devices */ + vmk_UplinkSharedQueueInfo *queueInfo; +} vmk_UplinkSharedData; + + +/** + * \brief Uplink registration data + * + * \note Before calling vmk_DeviceRegister, device driver needs to allocate + * and populate this structure. Then assign its pointer to member + * registrationData of structure vmk_DeviceProps, a parameter passed + * to vmk_DeviceRegister. + */ +typedef struct vmk_UplinkRegData { + + /** + * This parameter indicates the vmkapi revision driver compiled with. + */ + vmk_revnum apiRevision; + + /** Module ID of device driver */ + vmk_ModuleID moduleID; + + /** + * This parameter defines the operation function pointers provided by + * device driver + */ + vmk_UplinkOps ops; + + /** + * This parameter defines runtime shared data region provided by driver. + * It's allocated and initialized by driver. It's readable/writable to + * driver and read only to uplink layer. Access to it needs to be + * coordinated by its vmk_VersionedAtomic lock member. + */ + vmk_UplinkSharedData *sharedData; + + /** + * This is the private driver context data defined by driver. It will + * be passed to all callbacks into the driver. + */ + vmk_AddrCookie driverData; +} vmk_UplinkRegData; + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterEnableCB -- */ /** + * + * \brief Handler used by vmkernel to enable VLAN filter on device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If the operation succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterEnableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterDisableCB -- */ /** + * + * \brief Handler used by vmkernel to disable VLAN filter on device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If the operation succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterDisableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterBitmapGetCB -- */ /** + * + * \brief Handler used by vmkernel to get uplink VLAN filter bitmap + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] bitmap VLAN filter bitmap + * + * \retval VMK_OK If the operation succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterBitmapGetCB)(vmk_AddrCookie driverData, + vmk_VLANBitmap *bitmap); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterBitmapSetCB -- */ /** + * + * \brief Handler used by vmkernel to set uplink VLAN filter bitmap + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] bitmap VLAN bitmap to be set + * + * \retval VMK_OK if the set VLAN filter bitmap call succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterBitmapSetCB)(vmk_AddrCookie driverData, + vmk_VLANBitmap *bitmap); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterAddCB -- */ /** + * + * \brief Handler used by vmkernel to add uplink VLAN filter + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] startID starting vlan ID + * \param[in] endID ending vlan ID + * + * \retval VMK_OK if the add VLAN filter call succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterAddCB)(vmk_AddrCookie driverData, + vmk_VlanID startID, + vmk_VlanID endID); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterRemoveCB -- */ /** + * + * \brief Handler used by vmkernel to remove uplink VLAN filter + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] startID Starting VLAN ID of VLAN range + * \param[in] endID ending VLAN ID of VLAN range + * + * \retval VMK_OK if the remove VLAN filter call succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterRemoveCB)(vmk_AddrCookie driverData, + vmk_VlanID startID, + vmk_VlanID endID); + + +/** + * \brief VLAN filter operations + */ +typedef struct vmk_UplinkVLANFilterOps { + + /** Handler to enable VLAN Filters */ + vmk_UplinkVLANFilterEnableCB enableVLANFilter; + + /** Handler to disable VLAN Filters */ + vmk_UplinkVLANFilterDisableCB disableVLANFilter; + + /** Handler to get VLAN Filters bitmap */ + vmk_UplinkVLANFilterBitmapGetCB getVLANFilterBitmap; + + /** Handler to set VLAN Filters bitmap */ + vmk_UplinkVLANFilterBitmapSetCB setVLANFilterBitmap; + + /** Handler to add VLAN Filter */ + vmk_UplinkVLANFilterAddCB addVLANFilter; + + /** Handler to remove VLAN Filter */ + vmk_UplinkVLANFilterRemoveCB removeVLANFilter; +} vmk_UplinkVLANFilterOps; + + +/* + *********************************************************************** + * vmk_UplinkWOLStateGetCB -- */ /** + * + * \brief Handler used by vmkernel to get wake-on-lan state of + * device associated with an uplink. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] wolState Structure used to store all the requested + * information. + * + * \retval VMK_OK If the driver information is properly stored + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkWOLStateGetCB)(vmk_AddrCookie data, + vmk_UplinkWolState *wolState); + + +/* + *********************************************************************** + * vmk_UplinkWOLStateSetCB -- */ /** + * + * \brief Handler used by vmkernel to set wake-on-lan state of + * device associated with an uplink. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] wolState Structure used to store all the requested + * information. + * + * \retval VMK_OK If the driver information is properly stored + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkWOLStateSetCB)(vmk_AddrCookie driverData, + vmk_UplinkWolState *wolState); + + +/** + * \brief Wake-On-LAN operations + */ +typedef struct vmk_UplinkWOLOps { + + /** Handler to get uplink WOL state */ + vmk_UplinkWOLStateGetCB getWOLState; + + /** Handler to set uplink WOL state */ + vmk_UplinkWOLStateSetCB setWOLState; +} vmk_UplinkWOLOps; + + +/* + *********************************************************************** + * vmk_UplinkEEPROMLenGetCB -- */ /** + * + * \brief Handler used by vmkernel to get uplink device's EEPROM length + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] len length of EEPROM in bytes returned by + * driver + * + * \retval VMK_OK if the get EEPROM length call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkEEPROMLenGetCB)(vmk_AddrCookie driverData, + vmk_int32 *len); + + +/* + *********************************************************************** + * vmk_UplinkEEPROMDumpCB -- */ /** + * + * \brief Handler used by vmkernel to dump uplink device's EEPROM into + * a vmkernel allocated buffer + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] buf caller allocated buffer to store + * content from EEPROM + * \param[in] bufLen length of buf in bytes + * \param[in] offset the offset in EEPROM where dump starts + * \param[out] outLen the length actually read + * + * \retval VMK_OK if the dump EERPOM call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkEEPROMDumpCB)(vmk_AddrCookie driverData, + vmk_AddrCookie buf, + vmk_uint32 bufLen, + vmk_uint32 offset, + vmk_uint32 *outLen); + + +/* + *********************************************************************** + * vmk_UplinkEEPROMSetCB -- */ /** + * + * \brief Handler used by vmkernel to write uplink device's EEPROM + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] magic the magic word device accepts + * \param[in] buf content to write + * \param[in] bufLen content length in bytes + * \param[in] offset the offset in EEPROM where write starts + * + * \retval VMK_OK if the set EEPROM call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkEEPROMSetCB)(vmk_AddrCookie driverData, + vmk_uint32 magic, + vmk_AddrCookie buf, + vmk_uint32 bufLen, + vmk_uint32 offset); + + +/** + * \brief Device EEPROM related operations + */ +typedef struct vmk_UplinkEEPROMOps { + + /** Handler to get the length of EEPROM */ + vmk_UplinkEEPROMLenGetCB eepromLenGet; + + /** Handler to dump EEPROM content */ + vmk_UplinkEEPROMDumpCB eepromDump; + + /** Handler to write EEPROM */ + vmk_UplinkEEPROMSetCB eepromSet; +} vmk_UplinkEEPROMOps; + + +/* + *********************************************************************** + * vmk_UplinkRegDumpLenGetCB -- */ /** + * + * \brief Handler used by vmkernel to get device registers dump length + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] len length of registers in bytes returned by + * driver + * + * \retval VMK_OK if the get register dump length call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkRegDumpLenGetCB)(vmk_AddrCookie driverData, + vmk_uint32 *len); + + +/* + *********************************************************************** + * vmk_UplinkRegDumpCB -- */ /** + * + * \brief Handler used by vmkernel to dump device registers + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] buf caller allocated buffer to store registers, + * buffer length is returned by handler + * vmk_UplinkRegDumpLenGetCB + * + * \retval VMK_OK if the dump register call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkRegDumpCB)(vmk_AddrCookie driverData, + vmk_AddrCookie buf); + + +/** + * \brief Device registers dump related operations + */ +typedef struct vmk_UplinkRegDumpOps { + /** Handler to get registers dump length */ + vmk_UplinkRegDumpLenGetCB regDumpLenGet; + + /** Handler to dump registers */ + vmk_UplinkRegDumpCB regDump; +} vmk_UplinkRegDumpOps; + + +/* + *********************************************************************** + * vmk_UplinkSelfTestResultLenGetCB -- */ /** + * + * \brief Handler used by vmkernel to get self test result length + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] len length of self test result in + * vmk_UplinkSelfTestResult or + * vmk_UplinkSelfTestString + * + * \retval VMK_OK if the get self test result length call + * succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkSelfTestResultLenGetCB)(vmk_AddrCookie driverData, + vmk_uint32 *len); + + +/** + * Uplink self test result + */ +typedef vmk_uint64 vmk_UplinkSelfTestResult; + + +/** + * Uplink self test string + */ +typedef char vmk_UplinkSelfTestString[32]; + + +/* + *********************************************************************** + * vmk_UplinkSelfTestRunCB -- */ /** + * + * \brief Callback handler to run self run on device and return result + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] online if TRUE, perform online tests only, + * otherwise both online and offline tests. + * \param[out] passed self test is passed or not + * \param[out] resultBuf caller allocated buffer to store self test + * result, size is returned by + * vmk_UplinkSelfTestResultLenGetCB + * \param[out] stringBuf caller allocated buffer to store self test + * string, size is returned by + * vmk_UplinkSelfTestResultLenGetCB + * + * \retval VMK_OK if the run self test call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkSelfTestRunCB)(vmk_AddrCookie driverData, + vmk_Bool online, + vmk_Bool *passed, + vmk_UplinkSelfTestResult *resultBuf, + vmk_UplinkSelfTestString *stringsBuf); + + +/** + * \brief Device self test related operations + */ +typedef struct vmk_UplinkSelfTestOps { + + /** Handler to get self test result length */ + vmk_UplinkSelfTestResultLenGetCB selfTestResultLenGet; + + /** Handler to perform self test */ + vmk_UplinkSelfTestRunCB selfTestRun; +} vmk_UplinkSelfTestOps; + + +/** + * \brief Device pause paramters + */ +typedef struct vmk_UplinkPauseParams { + + /** Link is being auto-negotiated or not */ + vmk_Bool autoNegotiate; + + /** + * when autoNegotiate is zero, force driver to use/not-use pause + * RX flow control + */ + vmk_Bool rxPauseEnabled; + + /** + * when autoNegotiate is zero, force driver to use/not-use pause + * TX flow control + */ + vmk_Bool txPauseEnabled; +} vmk_UplinkPauseParams; + + +/* + *********************************************************************** + * vmk_UplinkPauseParamsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get pause parameters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] params pause parameters returned + * + * \retval VMK_OK if the get pause parameters call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkPauseParamsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkPauseParams *params); + + +/* + *********************************************************************** + * vmk_UplinkPauseParamsSetCB -- */ /** + * + * \brief Handler used by vmkernel to set pause parameters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] params pause parameters to set + * + * \retval VMK_OK if the set pause parameters call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkPauseParamsSetCB)(vmk_AddrCookie driverData, + vmk_UplinkPauseParams params); + + +/** + * \brief Device pause parameters related operations + */ +typedef struct vmk_UplinkPauseParamsOps { + + /** Handler to get pause parameters */ + vmk_UplinkPauseParamsGetCB pauseParamsGet; + + /** Handler to set pause parameters */ + vmk_UplinkPauseParamsSetCB pauseParamsSet; +} vmk_UplinkPauseParamsOps; + + +/* + *********************************************************************** + * vmk_UplinkCapRegister -- */ /** + * + * \brief Register a capability with the networking stack + * + * \param[in] uplink pointer to upink device + * \param[in] cap capability to register + * \param[in] capOps operarion function table of this capability. + * It will be NULL if function table is not + * required for this capability + * + * \retval VMK_OK get stats succeeds + * Other status get stats fails + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkCapRegister(vmk_Uplink uplink, + vmk_UplinkCap cap, + vmk_AddrCookie capOps); + + +/* + *********************************************************************** + * vmk_UplinkPrivStatsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get uplink private statistics + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] statBuf Buffer to keep device private stats + * \param[in] length Length of statBuf in bytes + * + * \retval VMK_OK if the get private stats call succeeds + * \retval VMK_FAILURE if the uplink doesn't support private stats + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkPrivStatsGetCB)(vmk_AddrCookie driverData, + char *statBuf, + vmk_ByteCount length); + + +/* + *********************************************************************** + * vmk_UplinkPrivStatsLengthGetCB -- */ /** + * + * \brief Handler used by vmkernel to get uplink private statistics + * length + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] length Length of private stats in bytes + * + * \retval VMK_OK if the get private stats call succeeds + * \retval VMK_FAILURE if the uplink doesn't support private stats + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkPrivStatsLengthGetCB)(vmk_AddrCookie driverData, + vmk_ByteCount *length); + +/** + * Uplink private stats operations + */ +typedef struct vmk_UplinkPrivStatsOps { + /** Handler used by vmkernel to get driver's private stats length */ + vmk_UplinkPrivStatsLengthGetCB privStatsLengthGet; + + /** Handler used by vmkernel to get driver's private stats */ + vmk_UplinkPrivStatsGetCB privStatsGet; +} vmk_UplinkPrivStatsOps; + + +/* + *********************************************************************** + * vmk_UplinkVXLANPortUpdateCB -- */ /** + * + * \brief Handler used by vmkernel to notify VXLAN port number updated + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] portNBO VXLAN port number in network byte order + * + * \retval VMK_OK If the notification is handled successfully + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVXLANPortUpdateCB)(vmk_AddrCookie driverData, + vmk_uint16 portNBO); + + +/** + * Uplink encapsulation offload operations + */ +typedef struct vmk_UplinkEncapOffloadOps { + /** Handler used by vmkernel to notify VXLAN port number updated */ + vmk_UplinkVXLANPortUpdateCB vxlanPortUpdate; +} vmk_UplinkEncapOffloadOps; + + +/* + *********************************************************************** + * vmk_UplinkMACAddrSetCB -- */ /** + * + * \brief Handler used by vmkernel to set uplink MAC address + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] macAddr mac address to be set + * + * \retval VMK_OK if the get private stats length call succeeds + * \retval VMK_FAILURE if the uplink doesn't support private stats + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkMACAddrSetCB)(vmk_AddrCookie driverData, + vmk_EthAddress macAddr); + + +/* + *********************************************************************** + * vmk_UplinkRestartNegotiationCB -- */ /** + * + * \brief Handler used by vmkernel to restart negotiation on uplink + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK if the restart negotitation call succeeds + * \retval VMK_FAILURE if the uplink doesn't support restart + * negotiation + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkRestartNegotiationCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkVXLANPortNBOGet -- */ /** + * + * \brief Get current VXLAN port number + * + * \retval vmk_uint16 VXLAN port number in network byte order + * + *********************************************************************** + */ +vmk_uint16 vmk_UplinkVXLANPortNBOGet(void); + +/* + *********************************************************************** + * vmk_UplinkTx -- */ /** + * + * \brief Transmit a list of packet to network + * + * \param[in] uplink Uplink handle + * \param[in] pktList List of packets to be transmitted + * + * \retval VMK_OK Packet transmission succeed + * \retval Other Value Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkTx(vmk_Uplink uplink, vmk_PktList pktList); + + +/* + *********************************************************************** + * vmk_UplinkFlagsGet -- */ /** + * + * \brief Get uplink flags + * + * \param[in] uplink Uplink handle + * + * \retval flags Uplink flags + * + *********************************************************************** + */ +vmk_UplinkFlags vmk_UplinkFlagsGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkStateGet -- */ /** + * + * \brief Get uplink state + * + * \param[in] uplink Uplink handle + * + * \retval state Uplink state + * + *********************************************************************** + */ +vmk_UplinkState vmk_UplinkStateGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkStateSet -- */ /** + * + * \brief Set uplink state + * + * \param[in] uplink Uplink handle + * \param[in] state State to set + * + * \retval VMK_OK State is set successfully + * \retval Other Value Setting stste failed + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkStateSet(vmk_Uplink uplink, + vmk_UplinkState state); + + +/* + *********************************************************************** + * vmk_UplinkLinkStatusGet -- */ /** + * + * \brief Return uplink link properties + * + * \param[in] uplink Uplink handle + * + * \retval status Uplink link status + * + *********************************************************************** + */ +vmk_LinkStatus vmk_UplinkLinkStatusGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkMTUGet -- */ /** + * + * \brief Get uplink MTU + * + * \param[in] uplink Uplink handle + * + * \retval mtu Uplink MTU + * + *********************************************************************** + */ +vmk_uint32 vmk_UplinkMTUGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkMTUSet -- */ /** + * + * \brief Set uplink MTU + * + * \param[in] uplink Uplink handle + * \param[in] mtu MTU to set + * + * \retval VMK_OK MTU is set successfully + * \retval Other Value Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkMTUSet(vmk_Uplink uplink, vmk_uint32 mtu); + + +/* + *********************************************************************** + * vmk_UplinkMACAddrGet -- */ /** + * + * \brief Get uplink MAC address + * + * \param[in] uplink Uplink handle + * \param[out] mac Uplink MAC address + * + * \retval VMK_OK operation succeeds + * \retval Other Value Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkMACAddrGet(vmk_Uplink uplink, + vmk_EthAddress *mac); + + +/* + *********************************************************************** + * vmk_UplinkDriverInfoGet -- */ /** + * + * \brief Return uplink driver info + * + * \param[in] uplink Uplink handle + * + * \retval info Uplink driver information + * + *********************************************************************** + */ +vmk_UplinkDriverInfo vmk_UplinkDriverInfoGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkStatsGet -- */ /** + * + * \brief Return uplink stats + * + * \param[in] uplink Uplink handle + * + * \retval stats Uplink stats + * + *********************************************************************** + */ +vmk_UplinkStats vmk_UplinkStatsGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkPrivStatsLengthGet -- */ /** + * + * \brief Return the length of device's private stats + * + * \param[in] uplink Uplink handle + * + * \retval length Device's private stats in bytes, return 0 if + * device doesn't support private stats + * + *********************************************************************** + */ +vmk_ByteCount vmk_UplinkPrivStatsLengthGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkPrivStatsGet -- */ /** + * + * \brief Get the content of device's private stats + * + * \param[in] uplink Uplink handle + * \param[in] buffer Caller allocated buffer to store device's + * private stats + * \param[in] length Length of buffer in bytes + * + * \retval VMK_OK Private stats stored in buffer successfully + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkPrivStatsGet(vmk_Uplink uplink, + char *buffer, + vmk_ByteCount length); + + +/* + *********************************************************************** + * vmk_UplinkNameGet -- */ /** + * + * \brief Return uplink name + * + * \param[in] uplink Uplink handle + * + * \retval name Uplink name + * + *********************************************************************** + */ +vmk_Name vmk_UplinkNameGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkCapIsRegistered -- */ /** + * + * \brief Indicates if uplink capability is registered or not + * + * \param[in] uplink Uplink handle + * \param[in] cap Capability + * + * \retval TRUE if uplink capability is registered + * \retval FALSE Otherwise + * + *********************************************************************** + */ +vmk_Bool vmk_UplinkCapIsRegistered(vmk_Uplink uplink, vmk_UplinkCap cap); + + +/* + *********************************************************************** + * vmk_UplinkCapIsEnabled -- */ /** + * + * \brief Indicates if uplink capability is enabled or not + * + * \param[in] uplink Uplink handle + * \param[in] cap Capability + * + * \retval TRUE if capability is enabled + * \retval FALSE Otherwise + * + *********************************************************************** + */ +vmk_Bool vmk_UplinkCapIsEnabled(vmk_Uplink uplink, vmk_UplinkCap cap); + +/* + *********************************************************************** + * vmk_UplinkPktIRQRx -- */ /** + * + * \brief Queue a specified packet coming from an uplink for Rx process. + * + * \param[in] uplink Uplink where the packet came from + * \param[in] pkt Target packet + * + *********************************************************************** + */ +void vmk_UplinkPktIRQRx(vmk_Uplink uplink, + vmk_PktHandle *pkt); + + +/* + *********************************************************************** + * vmk_UplinkPktListIRQRx -- */ /** + * + * \brief Process a list of packets from an uplink. + * + * \param[in] uplink Uplink from where the packets came from. + * \param[in] pktList Set of packets to process. + * + *********************************************************************** + */ +void vmk_UplinkPktListIRQRx(vmk_Uplink uplink, + vmk_PktList pktList); + + /* *********************************************************************** * vmk_UplinkEventCB -- */ /** @@ -99,7 +1942,7 @@ typedef struct vmk_UplinkEventData vmk_UplinkEventData; typedef void (*vmk_UplinkEventCB)(vmk_Name *uplinkName, vmk_UplinkEvent event, vmk_UplinkEventData *eventData, - void *cbData); + vmk_AddrCookie cbData); /* @@ -129,10 +1972,10 @@ typedef void (*vmk_UplinkEventCB)(vmk_Name *uplinkName, *********************************************************************** */ -VMK_ReturnStatus vmk_UplinkIoctl(vmk_Uplink uplink, - vmk_uint32 cmd, - void *args, - vmk_uint32 *result); +VMK_ReturnStatus vmk_UplinkIoctl(vmk_Uplink uplink, + vmk_uint32 cmd, + vmk_AddrCookie args, + vmk_uint32 *result); /* @@ -166,6 +2009,37 @@ VMK_ReturnStatus vmk_UplinkIoctl(vmk_Uplink uplink, VMK_ReturnStatus vmk_UplinkReset(vmk_Uplink uplink); +/* + *********************************************************************** + * vmk_UplinkSetWatchdogTimeout -- */ /** + * + * \brief Set the uplink device watchdog timeout value + * + * By default every device's watchdog timeout value is set to + * pre-configured system wide value. This API can be used to change + * the default watchdog timeout value to a timeout value that is more + * specific to the device. + * + * In some cases the driver may want to call this API before performing + * operations that stop the queues for a longer time than usual. This + * allows the driver to avoid spurious watchdog resets from the uplink + * layer. The driver can restore the original timeout value after + * completing the operation. + * + * \note Default watchdog time out value may be changed by setting the + * config option NetSchedWatchdogTimeout to the desired value + * + * \param[in] uplink Uplink handle + * \param[in] timeoutMS Timeout in MS + * + * \retval VMK_OK on success + * \retval VMK_BAD_PARAM if uplink or timeoutMS is not valid + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkSetWatchdogTimeout(vmk_Uplink uplink, + vmk_uint16 timeoutMS); + /* *********************************************************************** * vmk_UplinkGetByName -- */ /** @@ -214,6 +2088,25 @@ VMK_ReturnStatus vmk_UplinkGetPortID(vmk_Uplink uplink, vmk_SwitchPortID *portID); +/* + *********************************************************************** + * vmk_UplinkUpdateLinkState -- */ /** + * + * \brief Update link status information related to a specified uplink + * with a bundle containing the information. + * + * \param[in] uplink Uplink aimed + * \param[in] linkInfo Structure containing link information + * + * \retval VMK_OK Always + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkUpdateLinkState(vmk_Uplink uplink, + vmk_LinkStatus *linkInfo); + + /* *********************************************************************** @@ -245,7 +2138,7 @@ VMK_ReturnStatus vmk_UplinkRegisterEventCB( vmk_Uplink uplink, vmk_uint64 eventMask, vmk_UplinkEventCB cb, - void *cbData, + vmk_AddrCookie cbData, vmk_UplinkEventCBHandle *handle); diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/nmp/vmkapi_nmp.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/nmp/vmkapi_nmp.h index 1355f10..c627bc4 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/nmp/vmkapi_nmp.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/nmp/vmkapi_nmp.h @@ -388,6 +388,63 @@ vmk_Bool vmk_NmpIsDeviceReservedPath( vmk_NmpDevice *nmpDev, vmk_ScsiPath *scsiPath); +/* + *********************************************************************** + * vmk_NmpIsPathBlocked-- */ /** + * + * \ingroup PSP + * + * \brief Tell whether the passed path is eligible for I/O. + * + * This is used during SCSI-3 reservations only. If the device is used + * for SCSI-3 reservation, then the paths to that device must have the + * same registration key as that of the device to be eligible for I/O. + * + * \note This is a non-blocking call. + * + * \note Spin locks can be held while calling into this function + * + * \param[in] nmpDev NMP Device path is on. + * \param[in] scsiPath Path to check. + * + * \retval VMK_TRUE I/Os cannot be issued on this path. + * \retval VMK_FALSE This path is eligible for I/O. + * + *********************************************************************** + */ +vmk_Bool vmk_NmpIsPathBlocked( + vmk_NmpDevice *nmpDev, + vmk_ScsiPath *scsiPath); + +/* + *********************************************************************** + * vmk_NmpGetDevicePReservedPath-- */ /** + * + * \ingroup PSP + * + * \brief Returns path holding a SCSI-3 persistent reservation on device + * + * The caller should ensure that the device will not be unclaimed while + * calling this routine. + * + * \note This is a non-blocking call. + * + * \note Spin locks can be held while calling into this function + * + * \param[in] nmpDev NMP Device path is on. + * \param[out] scsiPath Path that has a SCSI-3 reservation. + * + * \retval VMK_OK Found a path with valid SCSI-3 persistent + * reservation. + * \retval VMK_NOT_FOUND Device does not hold SCSI-3 persistent + * reservation. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_NmpGetDevicePReservedPath( + vmk_NmpDevice *nmpDev, + vmk_ScsiPath **scsiPath); + #endif /* _VMK_NMP_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/npiv/vmkapi_npiv.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/npiv/vmkapi_npiv.h deleted file mode 100644 index 8034d4f..0000000 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/npiv/vmkapi_npiv.h +++ /dev/null @@ -1,253 +0,0 @@ -/* ********************************************************** - * Copyright 2008 - 2009 VMware, Inc. All rights reserved. - * **********************************************************/ - -/* - * @VMKAPIMOD_LICENSE@ - */ - -/* - * vmkapi_npiv.h -- - * - * Defines some of the vmkernel specific VPORT types used to interact with - * NPIV VPORT aware drivers. - * Version 1 - ESX 3.5 - * Version 2 - ESX 4.0 - */ - -#ifndef _VMKAPI_NPIV_H_ -#define _VMKAPI_NPIV_H_ - -/** \cond never */ -#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H -#error This vmkapi file should never be included directly but only via vmkapi.h -#endif -/** \endcond never */ - -#include "npiv/vmkapi_npiv_wwn.h" - -/* - * Definitions - */ - -/** - * \brief VPORT API version values - */ -#define VMK_VPORT_API_VERSION 0x00000002 // ESX 4.0 (Latest) -#define VMK_VPORT_API_VERSION_35 0x00000001 // ESX 3.5 - -/** - * \brief VPORT API vport specific error codes returned by the fc driver - * - * Any of the VPORT API commands can return these errors - */ -#define VMK_VPORT_OK 0 /* command completed OK */ -#define VMK_VPORT_ERROR (-1) /* general vport error */ -#define VMK_VPORT_INVAL (-2) /* invalid value passed */ -#define VMK_VPORT_NOMEM (-3) /* no memory available for command */ -#define VMK_VPORT_NORESOURCES (-4) /* no vport resources */ -#define VMK_VPORT_PARAMETER_ERR (-5) /* wrong parameter passed */ - -/** - * \brief VPORT API default invalid count value - */ -#define VMK_VPORT_CNT_INVALID 0xFFFFFFFF - -/** - * \brief VPORT API autoretry flag - */ -#define VMK_VPORT_OPT_AUTORETRY 0x01 - -/** - * \brief VPORT API Symbolic (VM) name - NULL terminated string associated with a vport - * - * This name will be used at the time of creating a Vport at fc driver. This is - * an array of 128 bytes (max 128, so the max name length is 127 bytes + 1 NULL). - */ -#define VMK_VPORT_VM_NAME_LENGTH 128 - -/** - * \brief VPORT API future VSAN API use - */ -#define VMK_VPORT_VF_ID_UNDEFINED 0xFFFFFFFF -#define VMK_VPORT_FABRIC_NAME_LENGTH 8 - -/** - * \brief VPORT API bit masks for active FC4 roles - */ -#define VMK_VPORT_ROLE_FCP_INITIATOR 0x01 -#define VMK_VPORT_ROLE_FCP_TARGET 0x02 -#define VMK_VPORT_ROLE_IP_OVER_FC 0x04 - -/* - * Data structures - */ - -/** - * \brief VPORT API commands - * - * These are the commands that are allowed via the NPIV API entry point - */ -typedef enum { - VMK_VPORT_CREATE = 1, /* Create a vport */ - VMK_VPORT_DELETE = 2, /* Delete a vport */ - VMK_VPORT_INFO = 3, /* Get vport info from phys hba */ - VMK_VPORT_TGT_REMOVE = 4, /* Target Remove (not used) */ - VMK_VPORT_SUSPEND = 5 /* suspend/resume vport */ -} vmk_VportOpCmd; - -/** - * \brief VPORT API link type - * - * Used by underlying transport to inform link type to scsi midlayer - */ -typedef enum { - VMK_VPORT_TYPE_PHYSICAL = 0, /* physical FC-Port */ - VMK_VPORT_TYPE_VIRTUAL /* Virtual Vport Port */ -} vmk_VportLinkType; - - -/** - * \brief VPORT API port state - */ -typedef enum { - VMK_VPORT_STATE_OFFLINE = 0, /* vport is offline */ - VMK_VPORT_STATE_ACTIVE, /* vport is active */ - VMK_VPORT_STATE_FAILED /* vport is failed */ -} vmk_VporState; - -/** - * \brief VPORT API port specific fail reason - */ -typedef enum { - VMK_VPORT_FAIL_UNKNOWN = 0, /* vport fail unknown reason */ - VMK_VPORT_FAIL_LINKDOWN, /* physical link is down */ - VMK_VPORT_FAIL_FAB_UNSUPPORTED, /* san fabric does not support npiv */ - VMK_VPORT_FAIL_FAB_NORESOURCES, /* not enough reasources in san fabric */ - VMK_VPORT_FAIL_FAB_LOGOUT, /* san logged out the vport */ - VMK_VPORT_FAIL_ADAP_NORESOURCES -} vmk_VportFailReason; - -/** - * \brief VPORT API vport-type flag used by scsi midlayer - * - * Vport type flag passed using vmk_ScsiVportArgs.flags used scsi midlayer - * to inform vmkernel about the vport type backing a vmkernel adapter. - */ -typedef enum { - VMK_SCSI_VPORT_TYPE_LEGACY = 0x00000001, /* vport hba is legacy vport */ - VMK_SCSI_VPORT_TYPE_FULLHBA = 0x00000002, /* vport hba has full HBA status */ - VMK_SCSI_VPORT_TYPE_PASSTHRU = 0x00000004 /* vport hba is a passthru */ -} vmk_ScsiVportTypeFlags; - -/** - * \brief VPORT API Args list is used to pass arguments to lowlevel underlying - * transport layer and eventually to HBA driver through the NPIV API - * - * This Structure is used for all types of vport calls made from vmkernel - * to underlying transport layer. - */ -typedef struct vmk_ScsiVportArgs { - /** \brief Node World Wide Name */ - vmk_VportWwn wwpn; - /** \brief Port World Wide Name */ - vmk_VportWwn wwnn; - /** \brief Vport's ScsiHost pointer */ - void *virthost; - /** \brief Reserved for arguments structure */ - void *arg; - /** \brief Symbolic name, generally VM's name is used */ - char *name; - /** \brief Vport's Scsi Adapter */ - void *virtAdapter; - /** \brief Vport type flag, internal use only */ - vmk_uint32 flags; -} vmk_ScsiVportArgs; - -/** - * \brief VPORT API This Structure is used to get the NPIV specific information - * from physical host bus adapter. - * - * Info structure returned by the VMK_VPORT_INFO command made to the physical - * HBA adapter - */ -typedef struct vmk_VportInfo { - /** \brief Vport API version */ - vmk_uint32 api_version; - /** \brief Vport link type */ - vmk_VportLinkType linktype; - /** \brief State of vport support */ - vmk_VporState state; - /** \brief reason for VportInfo failure */ - vmk_VportFailReason fail_reason; - /** \brief previous reason for VportInfo failure */ - vmk_VportFailReason prev_fail_reason; - /** \brief Node World Wide Name */ - vmk_VportWwn node_name; - /** \brief Port World Wide Name */ - vmk_VportWwn port_name; - - /* Following values are valid only on physical ports */ - /** \brief maximum number of vports supported by fc hba */ - vmk_uint32 vports_max; - /** \brief number of vports that are in use on fc hba */ - vmk_uint32 vports_inuse; - /** \brief maximum number of RPIs available in the fc FW */ - vmk_uint32 rpi_max; - /** \brief number of RPIs currently in-use in the fc FW */ - vmk_uint32 rpi_inuse; - - /* QoS Values */ - /** \brief QoS (Quality of Service) Priority */ - vmk_uint8 QoSPriority; - /** \brief QoS (Quality of Service) Bandwidth percentage */ - vmk_uint8 QosBandwith; - - /** \brief Virtual SAN (VSAN) number */ - vmk_int16 vsan_number; - /** \brief Virtual Fabric (VF) id number, undefined value is -1 */ - vmk_int32 vf_id; - /** \brief Vport role id initiator/target etc */ - vmk_int32 role_id; -} vmk_VportInfo; - -/** - * \brief VPORT API This structure is to communicate with the host bus adapter - * driver at the time of vport create operation. - * - * On success, a new ScsiHost will be assigned to vport_shost for the newly - * created virtual port. - */ -struct vmk_VportData { - /** \brief Vport API version */ - vmk_uint32 api_version; - /** \brief optional values */ - vmk_uint32 options; - /** \brief Node World Wide Name */ - vmk_VportWwn node_name; - /** \brief Port World Wide Name */ - vmk_VportWwn port_name; - /** \brief Vport's ScsiHost pointer */ - void *vport_shost; - - /** \brief fabric name, zero's if direct connect/private loop */ - vmk_uint8 fabric_name[VMK_VPORT_FABRIC_NAME_LENGTH]; - - /* QoS Values */ - /** \brief QoS (Quality of Service) Priority */ - vmk_uint8 QoSPriority; - /** \brief QoS (Quality of Service) Bandwidth percentage */ - vmk_uint8 QosBandwith; - - /** \brief Virtual SAN (VSAN) number */ - vmk_int16 vsan_number; - /** \brief Virtual Fabric (VF) id number, undefined value is -1 */ - vmk_int32 vf_id; - /** \brief Vport role id initiator/target etc */ - vmk_int32 role_id; - - /** \brief Symbolic name, generally VM's name is used */ - vmk_int8 symname[VMK_VPORT_VM_NAME_LENGTH]; -}; - -#endif /* _VMKAPI_NPIV_H_ */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/npiv/vmkapi_scsi_vport.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/npiv/vmkapi_scsi_vport.h new file mode 100644 index 0000000..9880382 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/npiv/vmkapi_scsi_vport.h @@ -0,0 +1,153 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + * vmkapi_scsi_vport.h -- + * + * Defines the vmkernel specific virtual port API used + * to interact with NPIV VPORT aware native drivers. + */ + +#ifndef _VMKAPI_SCSI_VPORT_H +#define _VMKAPI_SCSI_VPORT_H + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "npiv/vmkapi_npiv_wwn.h" + +/* + *********************************************************************** + * vmk_ScsiVportCreate -- */ /** + * + * \brief Create a virtual port on the physical device indicated. + * + * The driver should create a virtual port representation on the + * physical device passed using the world wide name pair passed + * in wwpn and wwnn. The vmk_ScsiAdapter created to represent the + * vport is passed back in vAdapter. + * + * \note This function is allowed to block in the driver. + * + * \param[in] device Handle to physical device the virtual port + * should be created on. + * \param[in] wwpn Pointer to the world wide port name of the + * virtual port to be created. + * \param[in] wwnn Pointer to the world wide node name of the + * virtual port to be created. + * \param[out] vAdapter Handle to the vmk_ScsiAdapter created on + * the physical device for the vport. + * + * \retval VMK_BAD_PARAM A parameter or the device is not valid. + * \retval VMK_NO_MEMORY Unable to allocate memory for vport handle. + * \retval VMK_OK Success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiVportCreate)(vmk_Device device, + vmk_VportWwn *wwpn, + vmk_VportWwn *wwnn, + vmk_ScsiAdapter **vAdapter); + +/* + *********************************************************************** + * vmk_ScsiVportDelete -- */ /** + * + * \brief Delete the virtual port passed from a physical device. + * + * The driver should stop driving this virtual port, and release + * its resources. The vmk_ScsiAdapter vAdapter should be deallocated. + * + * \note The vAdapter passed has already been quiesced at the PSA + * layer and is not used by PSA for IOs. + * + * \note This function is allowed to block in the driver. + * + * \param[in] device Handle to physical device the virtual port was + * created on. + * \param[in] vAdapter Handle to the vmk_ScsiAdapter to be removed + * from the physical device. + * + * \retval VMK_BAD_PARAM A parameter or the device is not valid. + * \retval VMK_OK Success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiVportDelete)(vmk_Device device, + vmk_ScsiAdapter *vAdapter); + +/* + *********************************************************************** + * vmk_ScsiVportGetInfo -- */ /** + * + * \brief Return information about virtual ports on the physical device. + * + * Return information about how many virtual ports this physical + * device can support and how many are in use currently. + * + * \note This function is allowed to block in the driver. + * + * \param[in] device Handle to physical device to get the info from. + * \param[out] vports_max Return maximum number of vports allowed. + * \param[out] vports_inuse Return how many of the vports are in use. + * + * \retval VMK_OK Success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiVportGetInfo)(vmk_Device device, + vmk_uint32 *vports_max, + vmk_uint32 *vports_inuse); + +/** + * \brief Vport Operations + */ +typedef struct vmk_ScsiVportOps { + /** \brief Create a virtual port */ + vmk_ScsiVportCreate createVport; + /** \brief Delete a virtual port */ + vmk_ScsiVportDelete deleteVport; + /** \brief Get virtual port information from physical device */ + vmk_ScsiVportGetInfo getVportInfo; +} vmk_ScsiVportOps; + + +/* + *********************************************************************** + * vmk_ScsiRegisterVportOps -- */ /** + * + * \brief Register Vport operations for a device. + * + * Register virtual port operations a physical device can perform. + * If VportOps are registered, it is assumed the device can create + * and delete virtual ports and return information about virtual ports. + * If VportOps are not registered, it is assumed the device is not + * NPIV vport capable. + * + * \note This function will not block. + * + * \param[in] device Handle to logical device the VportOps should + * be registered on. + * \param[in] ops VportOps registration data. + * + * \retval VMK_BAD_PARAM Device or ops argument is NULL or device + * is not fully registered yet. + * \retval VMK_NO_MEMORY No memory to register. + * \retval VMK_EXISTS Already registered. + * \retval VMK_OK Successfully registered VportOps. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiRegisterVportOps(vmk_Device device, + vmk_ScsiVportOps *ops); + +#endif /* _VMKAPI_SCSI_VPORT_H */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/platform/x86/vmkapi_ioresource.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/platform/x86/vmkapi_ioresource.h index 20798ff..7e069d8 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/platform/x86/vmkapi_ioresource.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/platform/x86/vmkapi_ioresource.h @@ -77,11 +77,9 @@ typedef struct vmk_IOResourceInfo { } vmk_IOResourceInfo; /** \brief IOResource handle */ -struct vmkIOResource; typedef struct vmkIOResource* vmk_IOResource; /** \brief IOResource reservation handle */ -struct vmkIOReservation; typedef struct vmkIOReservation* vmk_IOReservation; @@ -99,7 +97,8 @@ typedef struct vmkIOReservation* vmk_IOReservation; * \retval VMK_OK Success. * \retval VMK_BAD_PARAM IOResource information incomplete. * \retval VMK_NO_MEMORY Couldn't allocate memory for resource. - * \retval VMK_FAILURE IOResource overlaps with an existing resource. + * \retval VMK_BAD_ADDR_RANGE IOResource overlaps with an existing + * resource. * *********************************************************************** */ @@ -119,7 +118,7 @@ vmk_IOResourceRegister(vmk_IOResourceInfo *resourceInfo, * \param[in] handle IOResource to unregister. * * \retval VMK_OK Success. - * \retval VMK_INVALID_HANDLE Invalid handle. + * \retval VMK_BAD_PARAM Invalid handle. * *********************************************************************** */ @@ -139,9 +138,9 @@ vmk_IOResourceUnregister(vmk_IOResource handle); * \param[out] reservation Reservation handle. * * \retval VMK_OK Success. + * \retval VMK_NO_MODULE_HEAP Caller has no heap to allocate memory. * \retval VMK_NO_MEMORY Couldn't allocate reservation handle. * \retval VMK_BAD_ADDR_RANGE Request doesn't match existing resource. - * \retval VMK_BAD_PARAM Options don't match resource. * \retval VMK_NOT_SHARED Reservation conflict. * *********************************************************************** @@ -162,7 +161,7 @@ vmk_IOResourceReserve(vmk_IOResourceInfo *resourceInfo, * \param[in] reservation Reservation handle. * * \retval VMK_OK Success. - * \retval VMK_INVALID_HANDLE Invalid handle. + * \retval VMK_BAD_PARAM Invalid handle. * *********************************************************************** */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi.h index f8ea7be..583776f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2004 - 2011 VMware, Inc. All rights reserved. + * Copyright 2004 - 2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -36,8 +36,6 @@ *********************************************************************** * vmk_ScsiDeviceClassToString -- */ /** * - * \ingroup SCSI - * * \brief Convert a SCSI class identifier into a human-readable text * string. * @@ -58,8 +56,6 @@ const char *vmk_ScsiDeviceClassToString( *********************************************************************** * vmk_ScsiScanPaths -- */ /** * - * \ingroup SCSI - * * \brief Scan one or more physical paths. * * The discovered paths are automatically registered with the @@ -102,8 +98,6 @@ VMK_ReturnStatus vmk_ScsiScanPaths( *********************************************************************** * vmk_ScsiScanAndClaimPaths -- */ /** * - * \ingroup SCSI - * * \brief Scan one or more physical paths and run the plugin claim rules. * * The discovered paths are automatically registered with the @@ -141,8 +135,6 @@ VMK_ReturnStatus vmk_ScsiScanAndClaimPaths( *********************************************************************** * vmk_ScsiScanDeleteAdapterPath -- */ /** * - * \ingroup SCSI - * * \brief Scan a physical path and remove it if dead * * The path will be unclaimed and removed only if it is dead. @@ -188,8 +180,6 @@ VMK_ReturnStatus vmk_ScsiScanDeleteAdapterPath( *********************************************************************** * vmk_ScsiNotifyPathStateChange -- */ /** * - * \ingroup SCSI - * * \brief Notify the VMkernel of a possible path state change (sync). * * Path is identified by \em vmkAdapter, \em channel, \em target @@ -228,8 +218,6 @@ VMK_ReturnStatus vmk_ScsiNotifyPathStateChange( *********************************************************************** * vmk_ScsiNotifyPathStateChangeAsync -- */ /** * - * \ingroup SCSI - * * \brief Notify the VMkernel of a possible path state change (async). * * Path is identified by \em vmkAdapter, \em channel, \em target, @@ -254,6 +242,7 @@ VMK_ReturnStatus vmk_ScsiNotifyPathStateChange( * and target. * * \retval VMK_NO_MEMORY Out of memory. + * \retval VMK_BAD_PARAM Invalid adapter passed. * \retval VMK_NO_RESOURCES Failed to schedule the asynchronous path * probe due to lack of resources. * @@ -269,8 +258,6 @@ VMK_ReturnStatus vmk_ScsiNotifyPathStateChangeAsync( *********************************************************************** * vmk_ScsiInitTaskMgmt -- */ /** * - * \ingroup SCSI - * * \brief Create a task management request filter. * * A task management request filter consists of two things: @@ -352,8 +339,6 @@ void vmk_ScsiInitTaskMgmt( *********************************************************************** * vmk_ScsiQueryTaskMgmt -- */ /** * - * \ingroup SCSI - * * \brief Matches a SCSI command against a task management request * filter, and returns the action to be taken for that command. * @@ -383,8 +368,6 @@ vmk_ScsiTaskMgmtAction vmk_ScsiQueryTaskMgmt( *********************************************************************** * vmk_ScsiGetTaskMgmtTypeName -- */ /** * - * \ingroup SCSI - * * \brief Returns a human readable description of the task management * request. * @@ -406,8 +389,6 @@ const char *vmk_ScsiGetTaskMgmtTypeName( *********************************************************************** * vmk_ScsiDebugDropCommand -- */ /** * - * \ingroup SCSI - * * \brief Tell whether a command should be dropped. * * This is used for fault injection. @@ -434,8 +415,6 @@ vmk_ScsiDebugDropCommand(vmk_ScsiAdapter *adapter, vmk_ScsiCommand *cmd); *********************************************************************** * vmk_ScsiAdapterEvent -- */ /** * - * \ingroup SCSI - * * \brief Notifies the VMkernel of a specific event on the * specified adapter. * @@ -459,8 +438,6 @@ vmk_ScsiAdapterEvent(vmk_ScsiAdapter *adapter, vmk_uint32 eventType); *********************************************************************** * vmk_ScsiAdapterIsPAECapable -- */ /** * - * \ingroup SCSI - * * \brief Determines if the adapter supports DMA beyond 32 bits of * machine-address space. * @@ -486,8 +463,6 @@ vmk_ScsiAdapterIsPAECapable(vmk_ScsiAdapter *adapter) *********************************************************************** * vmk_ScsiCmdStatusIsGood -- */ /** * - * \ingroup SCSI - * * \brief Determine if a command status indicates a successful * completion. Note that this function returns false * if the device returns a check condition with a @@ -520,8 +495,6 @@ vmk_ScsiCmdStatusIsGood(vmk_ScsiCmdStatus status) *********************************************************************** * vmk_ScsiCmdIsRecoveredError -- */ /** * - * \ingroup SCSI - * * \brief Determine if a command status indicates a recovered * error. * @@ -545,8 +518,6 @@ vmk_ScsiCmdIsRecoveredError(const vmk_ScsiCommand *vmkCmd); *********************************************************************** * vmk_ScsiCmdIsSuccessful -- */ /** * - * \ingroup SCSI - * * \brief Determine if vmk_ScsiCommand completed successfully. * * \note This function will not block. @@ -575,8 +546,6 @@ vmk_ScsiCmdIsSuccessful(const vmk_ScsiCommand *vmkCmd) *********************************************************************** * vmk_ScsiCmdStatusIsResvConflict -- */ /** * - * \ingroup SCSI - * * \brief Determine if a command status indicates a reservation * conflict. * @@ -603,8 +572,6 @@ vmk_ScsiCmdStatusIsResvConflict(vmk_ScsiCmdStatus status) *********************************************************************** * vmk_ScsiCmdStatusIsCheck -- */ /** * - * \ingroup SCSI - * * \brief Determine if a command status indicates a check condition. * * \note This function will not block. @@ -630,8 +597,6 @@ vmk_ScsiCmdStatusIsCheck(vmk_ScsiCmdStatus status) *********************************************************************** * vmk_ScsiCmdSenseIsPOR -- */ /** * - * \ingroup SCSI - * * \brief Determine if sense data is a unit attention with Power-On Reset * as the additional sense code. * @@ -660,8 +625,6 @@ vmk_ScsiCmdSenseIsPOR(const vmk_ScsiSenseData *senseData) *********************************************************************** * vmk_ScsiCmdSenseIsResvReleased -- */ /** * - * \ingroup SCSI - * * \brief Determine if sense data is a unit attention with reservation * released as the additional sense code. * @@ -691,8 +654,6 @@ vmk_ScsiCmdSenseIsResvReleased(const vmk_ScsiSenseData *senseData) *********************************************************************** * vmk_ScsiCmdSenseIsMediumNotPresent -- */ /** * - * \ingroup SCSI - * * \brief Determine if sense data is a sense key not ready with medium * not present as the additional sense code. * @@ -720,8 +681,6 @@ vmk_ScsiCmdSenseIsMediumNotPresent(const vmk_ScsiSenseData *senseData) *********************************************************************** * vmk_ScsiGetLbaLbc -- */ /** * - * \ingroup SCSI - * * \brief Parse a SCSI CDB and pull out lba and lbc. * * Determine the lba and lbc for a given cdb. This is most useful @@ -759,8 +718,6 @@ vmk_ScsiGetLbaLbc(unsigned char *cdb, vmk_ByteCount cdbLen, *********************************************************************** * vmk_ScsiSetLbaLbc -- */ /** * - * \ingroup SCSI - * * \brief Set lba and lbc fields in a given SCSI CDB. * * Set the lba and lbc for a given cdb. This is most useful @@ -798,8 +755,6 @@ vmk_ScsiSetLbaLbc(unsigned char *cdb, vmk_ByteCount cdbLen, *********************************************************************** * vmk_ScsiAllocateAdapter -- */ /** * - * \ingroup SCSI - * * \brief Allocate an adapter. * * \note This function may block. @@ -818,7 +773,9 @@ vmk_ScsiAdapter *vmk_ScsiAllocateAdapter(void); *********************************************************************** * vmk_ScsiRegisterAdapter -- */ /** * - * \ingroup SCSI + * \deprecated This call should no longer be called directly by a + * Native Driver as it is only used internally by PSA. + * It is likely to go away in a future release. * * \brief Register an adapter with the VMkernel. * @@ -862,7 +819,9 @@ VMK_ReturnStatus vmk_ScsiRegisterAdapter( *********************************************************************** * vmk_ScsiUnregisterAdapter -- */ /** * - * \ingroup SCSI + * \deprecated This call should no longer be called directly by a + * Native Driver as it is only used internally by PSA. + * It is likely to go away in a future release. * * \brief Unregister an adapter previously registered by * vmk_ScsiRegisterAdapter(). @@ -890,8 +849,6 @@ VMK_ReturnStatus vmk_ScsiUnregisterAdapter( *********************************************************************** * vmk_ScsiFreeAdapter -- */ /** * - * \ingroup SCSI - * * \brief Free an adapter previously allocated by * vmk_ScsiAllocateAdapter(). * @@ -911,8 +868,6 @@ void vmk_ScsiFreeAdapter( *********************************************************************** * vmk_ScsiRemovePath -- */ /** * - * \ingroup SCSI - * * \brief Destroy the path identified by \em adapter, \em channel, * \em targetId and \em lunId. * @@ -946,8 +901,6 @@ vmk_Bool vmk_ScsiRemovePath( *********************************************************************** * vmk_ScsiRegisterIRQ -- */ /** * - * \ingroup SCSI - * * \brief Registers an adapter's interrupt handler and interrupt vector * with the VMkernel for polling during a core dump. * @@ -959,7 +912,7 @@ vmk_Bool vmk_ScsiRemovePath( * \note Spin locks can be held while calling into this function * * \param[in] adapter Adapter to register on behalf of. - * \param[in] intrVector Interrupt vector number to register. + * \param[in] intrCookie Interrupt cookie number to register. * \param[in] intrHandler Interrupt handler callback to invoke * when an interrupt needs to be serviced. * \param[in] intrHandlerData Private data to pass to the handler. @@ -970,16 +923,14 @@ vmk_Bool vmk_ScsiRemovePath( */ VMK_ReturnStatus vmk_ScsiRegisterIRQ( void *adapter, - vmk_uint32 intrVector, - vmk_InterruptHandler intrHandler, + vmk_IntrCookie intrCookie, + vmk_IntrHandler intrHandler, void *intrHandlerData); /* *********************************************************************** * vmk_ScsiHostStatusToString -- */ /** * - * \ingroup SCSI - * * \brief Take a SCSI host status and return a static string describing it. * * \note This function will not block. @@ -999,8 +950,6 @@ vmk_ScsiHostStatusToString(vmk_ScsiHostStatus hostStatus); *********************************************************************** * vmk_ScsiDeviceStatusToString -- */ /** * - * \ingroup SCSI - * * \brief Take a SCSI device status and return a static string describing * it. * @@ -1021,8 +970,6 @@ vmk_ScsiDeviceStatusToString(vmk_ScsiDeviceStatus deviceStatus); *********************************************************************** * vmk_ScsiSenseKeyToString -- */ /** * - * \ingroup SCSI - * * \brief Take a SCSI sense key and return a static string describing it. * * \note This function will not block. @@ -1042,8 +989,6 @@ vmk_ScsiSenseKeyToString(vmk_uint32 senseKey); *********************************************************************** * vmk_ScsiAdditionalSenseToString -- */ /** * - * \ingroup SCSI - * * \brief Take a SCSI ASC/ASCQ and return a static string describing it. * * \note This function will not block. @@ -1065,8 +1010,6 @@ vmk_ScsiAdditionalSenseToString(vmk_uint32 asc, ********************************************************************** * vmk_ScsiExtractSenseData -- */ /** * - * \ingroup SCSI - * * \brief Extract the SCSI Check Condition. * * Examine the contents of the senseBuffer and return the SCSI check @@ -1104,9 +1047,128 @@ vmk_ScsiExtractSenseData(vmk_ScsiSenseData *senseBuffer, /* *********************************************************************** - * vmk_ScsiVPDPageSize -- */ /** + * vmk_ScsiCmdGetSenseData -- */ /** * - * \ingroup SCSI + * \brief Obtain sense data associated with the given SCSI command. + * + * Command is identified by \em vmkCmd. Sense data is identified by + * \em buf. This buffer will be filled with the contents of SCSI command's + * sense data buffer. The caller passes in the size of the sense buffer in + * \em bufLen. Depending on the number of sense data bytes required, the caller + * can allocate a buffer of the appropriate size and pass the size of this + * buffer in \em bufLen. + * + * \note This function will not block. + * + * \note Spin locks can be held while calling into this function + * + * \note The max size of SCSI command's sense buffer is obtained by calling + * vmk_ScsiGetSupportedCmdSenseDataSize. If the call is made with a buffer + * larger than the max supported size, only the max supported number of bytes + * will be set. The contents of the input buffer beyond that will be set to 0. + * + * \note For a small sense buffer, see vmk_ScsiSenseDataSimple. + * + * \param[in] vmkCmd Address of the SCSI command + * \param[out] buf Address of the buffer that will + * be filled with sense data + * \param[in] bufLen Length of the sense buffer + * above. + * + * \retval VMK_OK Sense data was successfully + * obtained. + * \retval VMK_BAD_PARAM A bad argument was passed. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiCmdGetSenseData(vmk_ScsiCommand *vmkCmd, + vmk_ScsiSenseData *buf, + vmk_ByteCount bufLen); + +/* + *********************************************************************** + * vmk_ScsiCmdSetSenseData -- */ /** + * + * \brief Set the sense data of a SCSI command. + * + * Command is identified by \em vmkCmd. Sense data in \em buf is copied + * to the storage area for sense data in \em vmkCmd. The number of bytes + * that will be copied is identified by \em bufLen. If \em bufLen + * is less than SCSI command's max sense buffer size(obtained by calling + * vmk_ScsiGetSupportedCmdSenseDataSize), the remaining bytes in SCSI + * command's sense buffer are set to 0. If \em bufLen is larger than + * SCSI command's max sense buffer size, only max sense buffer size of + * sense data will be written, ie, sense data will be truncated to the max + * supported size. + * + * \note This function will not block. + * + * \note Spin locks can be held while calling into this function + * + * \param[in] buf Address of the buffer that + * holds sense data bytes to be + * copied. + * \param[in] vmkCmd Address of the SCSI command + * that contains the destination + * sense buffer. + * \param[in] bufLen The number of bytes to be + * copied. + * + * \retval VMK_OK Sense data was successfully + * set. + * \retval VMK_BAD_PARAM A bad argument was passed. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiCmdSetSenseData(vmk_ScsiSenseData *buf, + vmk_ScsiCommand *vmkCmd, + vmk_ByteCount bufLen); + +/* + *********************************************************************** + * vmk_ScsiCmdClearSenseData -- */ /** + * + * \brief Clear the sense data attached to a SCSI command + * + * \note This function will not block. + * + * \note Spin locks can be held while calling into this function + * + * Command is identified by \em vmkCmd. + * + * \param[in] vmkCmd Address of the SCSI command + * + * \retval VMK_OK Sense data was successfully + * cleared. + * \retval VMK_BAD_PARAM A bad argument was passed. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiCmdClearSenseData(vmk_ScsiCommand *vmkCmd); + +/* + *********************************************************************** + * vmk_ScsiGetSupportedCmdSenseDataSize -- */ /** + * + * \brief Get the size of the SCSI command's sense data buffer. + * + * \note This function will not block. + * + * \note Spin locks can be held while calling into this function + * + * \retval The SCSI command's supported buffer size + * + *********************************************************************** + */ +vmk_ByteCount +vmk_ScsiGetSupportedCmdSenseDataSize(void); + +/* + *********************************************************************** + * vmk_ScsiVPDPageSize -- */ /** * * \brief Get the size of a VPD page. * @@ -1132,8 +1194,6 @@ vmk_ScsiVPDPageSize(vmk_ScsiInquiryVPDResponse *response); *********************************************************************** * vmk_ScsiIllegalRequest -- */ /** * - * \ingroup SCSI - * * \brief Generates "illegal request" sense buffer data. * * \note This function will not block. @@ -1158,8 +1218,6 @@ vmk_ScsiIllegalRequest(vmk_ScsiSenseData *senseBuffer, *********************************************************************** * vmk_ScsiIsReadCdb -- */ /** * - * \ingroup SCSI - * * \brief Check whether the given SCSI opcode is one of the READ * commands. * @@ -1185,8 +1243,6 @@ vmk_ScsiIsReadCdb(vmk_uint8 cdb0) *********************************************************************** * vmk_ScsiIsWriteCdb -- */ /** * - * \ingroup SCSI - * * \brief Check whether the given SCSI opcode is one of the WRITE * commands. * @@ -1230,7 +1286,6 @@ vmk_ScsiGetAdapterName(const vmk_ScsiAdapter *vmkAdapter) ********************************************************************** * vmk_ScsiSetPathXferLimit -- */ /** * - * \ingroup SCSI * \brief Set the maximum single transfer size limit for a path. * * \param[in] vmkAdapter The target adapter. @@ -1265,8 +1320,6 @@ vmk_ScsiSetPathXferLimit(vmk_ScsiAdapter *vmkAdapter, ********************************************************************** * vmk_ScsiModifyQueueDepth -- */ /** * - * \ingroup SCSI - * * \brief Set the queue depth of the path specified by \em vmkAdapter * \em channel, \em target, and \em lun. * @@ -1320,6 +1373,10 @@ vmk_Bool vmk_ScsiAllFCPathsDown(void); * vmk_ScsiAdapterUniqueName -- */ /** * * \ingroup DeviceName + * \deprecated This call should no longer be called directly by a + * Native Driver as it is only used internally by PSA. + * It is likely to go away in a future release. + * * \brief Create a new unique adapter name. * * This function returns a new unique adapter name. @@ -1336,8 +1393,6 @@ void vmk_ScsiAdapterUniqueName(vmk_Name *adapterName); *********************************************************************** * vmk_ScsiGetIdentifierFromPage83Inquiry -- */ /** * - * \ingroup SCSI - * * \brief Get a UID of given type from a page 83 inquiry buffer * * Get the identifier of the given idType from the given page 83 @@ -1384,8 +1439,6 @@ vmk_ScsiGetIdentifierFromPage83Inquiry(vmk_uint8 *inquiryBuf, *********************************************************************** * vmk_ScsiGetSystemLimits -- */ /** * - * \ingroup SCSI - * * \brief Retrieve the max number of Scsi devices and paths supported * * \note This function will not block. @@ -1402,7 +1455,8 @@ vmk_ScsiGetSystemLimits(vmk_ScsiSystemLimits *limits); *********************************************************************** * vmk_ScsiCommandGetCompletionHandle -- */ /** * - * \ingroup SCSI + * \deprecated Do not use in Native Drivers - please see + * vmk_ScsiCommandGetCompletionQueue instead * * \brief Get the Completion handle for the SCSI command. * @@ -1430,7 +1484,8 @@ vmk_ScsiCommandGetCompletionHandle(vmk_ScsiAdapter *vmkAdapter, *********************************************************************** * vmk_ScsiRegisterCompObjects -- */ /** * - * \ingroup SCSI + * \deprecated Do not use in Native Drivers - please see + * vmk_ScsiStartCompletionQueues instead * * \brief Register the completion objects for the adapter with vmkernel * @@ -1461,7 +1516,8 @@ VMK_ReturnStatus vmk_ScsiRegisterCompObjects(vmk_ScsiAdapter *vmkAdapter, *********************************************************************** * vmk_ScsiGetNumCompObjects -- */ /** * - * \ingroup SCSI + * \deprecated Do not use in Native Drivers - please see + * vmk_ScsiGetMaxNumCompletionQueues instead * * \brief Queries VMKernel for number of Completion Objects * @@ -1475,16 +1531,90 @@ vmk_uint32 vmk_ScsiGetNumCompObjects(void); /* *********************************************************************** - * vmk_ScsiCheckPluginRegistered -- */ /** + * vmk_ScsiGetMaxNumCompletionQueues -- */ /** * - * \ingroup SCSI + * \brief Provide max number of Completion queues to create for adapter + * + * \note This function will not block. + * + * \return Maximum Number of Completion queues that can be created for + * any adapter. + * + *********************************************************************** + */ +vmk_uint32 vmk_ScsiGetMaxNumCompletionQueues(void); + +/* + *********************************************************************** + * vmk_ScsiStartCompletionQueues -- */ /** + * + * \brief Create Completion queues and completion worlds for an adapter + * + * PSA will go ahead and create the number of completion queues passed + * as well as the associated completion worlds to drive up completions. + * This means that the driver can call vmkCmd->done from any context + * since the command will simply be queued and driven to completion + * by a separate completion world. + * + * \note This function may block. + * + * \note There will always be one completion world for native adapters + * so the driver never has to create it's own completion worlds. + * + * \note The number of completion worlds can be raised dynamically, but + * cannot currently be decreased. The completion worlds will be + * destroyed when the adapter is unregistered, so no special + * cleanup has to be done for multiple completion queues. + * + * \note If anything fails when creating or extending the number of + * completion worlds we will leave the number of completion + * worlds to what it was previously. + * + * \param[in] vmkAdapter ScsiAdapter to create/increase queues for + * \param[in] numQueues Number of Completion queues to create + * + * \retval VMK_OK If queues were created, error otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiStartCompletionQueues(vmk_ScsiAdapter *vmkAdapter, + vmk_uint32 numQueues); + +/* + *********************************************************************** + * vmk_ScsiCommandGetCompletionQueue -- */ /** + * + * \brief Get the Completion queue that should be used for a command + * + * This function is for instance used by the driver before issuing the + * command so it can be issued to the right adapter queue (what the + * VMkernel would like as it optimizes this dynamically based on what + * PCPUs a given VM/issuer is running on). + * + * \note This function will not block. + * + * \param[in] vmkAdapter ScsiAdapter having the Completion queue + * \param[in] vmkCmd The SCSI command to get queue for + * + * \returns The queue number to issue this command on + * + *********************************************************************** + */ +vmk_uint32 +vmk_ScsiCommandGetCompletionQueue(vmk_ScsiAdapter *vmkAdapter, + vmk_ScsiCommand *vmkCmd); + +/* + *********************************************************************** + * vmk_ScsiCheckPluginRegistered -- */ /** * * \brief Check if Plugin is registered. * * \note This function will not block. * - * \returns VMK_OK If plugin is registered. - * VMK_NOT_FOUND If plugin is not registered. + * \retval VMK_OK If plugin is registered. + * \retval VMK_NOT_FOUND If plugin is not registered. * *********************************************************************** */ @@ -1495,8 +1625,6 @@ vmk_ScsiCheckPluginRegistered(const char *plugin); *********************************************************************** * vmk_ScsiGetRegisteredModuleName -- */ /** * - * \ingroup SCSI - * * \brief Get the the Module name for the Plugin specified. * * \note This function will not block. @@ -1516,8 +1644,6 @@ vmk_ScsiGetRegisteredModuleName(const char *plugin, vmk_Name *name); *********************************************************************** * vmk_ScsiResolveRegisteredPluginDependencies -- */ /** * - * \ingroup SCSI - * * \brief Resolve all dependencies for module "name". * Dependent Modules may get loaded. * @@ -1535,8 +1661,6 @@ vmk_ScsiResolveRegisteredPluginDependencies(const char *name); *********************************************************************** * vmk_ScsiCmdGetVMUuid -- */ /** * - * \ingroup SCSI - * * \brief Get the UUID of the VM associated with the specified command. * * \note This function will not block. @@ -1559,8 +1683,6 @@ vmk_ScsiCmdGetVMUuid(vmk_ScsiCommand *vmkCmd, char *uuid, vmk_ByteCount len); *********************************************************************** * vmk_ScsiSetPathLostByDevice -- */ /** * - * \ingroup SCSI - * * \brief Mark a path as permanently lost by device, triggering PDL * * Path is identified by \em adaperName, \em channel, \em target @@ -1594,6 +1716,28 @@ vmk_ScsiSetPathLostByDevice(const vmk_Name *adapterName, vmk_int32 target, vmk_int32 lun); +/* + *********************************************************************** + * vmk_ScsiSchedCommandCompletion -- */ /** + * + * \brief Schedules a non-blocking context to complete the command. + * + * This function schedules a non-blocking context to complete a + * command. The intent is to use this from the issuing path where + * a command cannot be completed directly since that could lead to + * stack exhaustion due to recursive calls to the issuing path from + * the completion path. + * + * \note This is a non-blocking call. + * + * \note Spin locks can be held while calling into this function + * + * \param[in] command The cmd to complete. + * + *********************************************************************** + */ +void vmk_ScsiSchedCommandCompletion( + vmk_ScsiCommand *command); #endif /* _VMKAPI_SCSI_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_const.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_const.h index a1096f1..bbcf992 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_const.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_const.h @@ -348,6 +348,9 @@ #define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_TARGET_PORT_IN_STANDBY_STATE 0x0b #define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_TARGET_PORT_IN_UNAVAILABLE_STATE 0x0c #define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_SPACE_ALLOC_IN_PROGRESS 0x14 +#define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_ROBOTICS_DISABLED 0x15 +#define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_CONFIGURATION_REQUIRED 0x16 + /** \brief Logical unit doesn't respond to selection. */ #define VMK_SCSI_ASC_LU_NO_RESPONSE_TO_SELECTION 0x05 /** \brief Write error. */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_iodm.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_iodm.h new file mode 100644 index 0000000..6b0b62e --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_iodm.h @@ -0,0 +1,196 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * SCSI I/O Device Management(IODM) Interfaces */ /** + * + * \addtogroup SCSI + * @{ + * + * \defgroup IODM SCSI I/O Device Management(IODM) interfaces + * + * IODM interfaces allow SCSI drivers to notify VMkernel of any events + * happening on the HBA(Host Bus Adapter). + * + * For example any Fiber Channel driver can use IODM interfaces to + * notify VMkernel of FC link related events, target port state + * change notifications, FC dropped frame instances etc. + * + * These interfaces are to be used only by Native SCSI drivers and + * vmklinux module, but not by vmklinux SCSI drivers. + * + * @{ + * + *********************************************************************** + */ + +#ifndef _VMKAPI_SCSI_IODM_H_ +#define _VMKAPI_SCSI_IODM_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Types of IODM events. + */ +typedef enum { + /** \brief Event ID for an I/O Error. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to the address of the failed 'vmk_ScsiCommand' and + * 'data' parameter set to 0. + */ + VMK_IODM_IOERROR, + /** \brief Event ID for a Fibre Channel(FC) RSCN event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and + * 'data' parameter set to the FCID of the port that the FC driver needs to act on. + */ + VMK_IODM_RSCN, + /** \brief Event ID for an FC link up event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and + * 'data' parameter set to 0. + */ + VMK_IODM_LINKUP, + /** \brief Event ID for an FC link down event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and + * 'data' parameter set to 0. + */ + VMK_IODM_LINKDOWN, + /** \brief Event ID for an FC frame drop event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to the address of the 'vmk_ScsiCommand' and + * 'data' parameter set to the FC residual data bytes count(FCP_RESID). + */ + VMK_IODM_FRAMEDROP, + /** \brief Event ID for a SCSI LUN reset event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and 'data' parameter set to + * the value encoded by (C << 48 | T << 32 | L), where C, T, L + * represent Channel, Target and LUN IDs of the SCSI device respectively. + */ + VMK_IODM_LUNRESET, + /** \brief Event ID for an FCoE Clear Virutal Link(CVL) event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and + * 'data' parameter set to the FCID of the vport that received the CVL. + */ + VMK_IODM_FCOE_CVL, + /* + * Whenever a new IODM event is added to the 'vmk_IodmEventType' + * enum, make sure its corresponding string is added to the + * 'VMK_IODM_EVENT_STRINGS' macro below in the same exact order. + */ + VMK_IODM_EVENT_LAST, +} vmk_IodmEventType; + +/** \cond nodoc */ +#define VMK_IODM_EVENT_STRINGS \ + VMK_IODM_EVENT_STR(VMK_IODM_IOERROR, "IO_ERROR") \ + VMK_IODM_EVENT_STR(VMK_IODM_RSCN, "RSCN") \ + VMK_IODM_EVENT_STR(VMK_IODM_LINKUP, "LINK_UP") \ + VMK_IODM_EVENT_STR(VMK_IODM_LINKDOWN, "LINK_DOWN") \ + VMK_IODM_EVENT_STR(VMK_IODM_FRAMEDROP, "FRAME_DROP") \ + VMK_IODM_EVENT_STR(VMK_IODM_LUNRESET, "LUN_RESET") \ + VMK_IODM_EVENT_STR(VMK_IODM_FCOE_CVL, "FCOE_CVL") +/** \endcond */ + +/* + *********************************************************************** + * vmk_IodmEnableEvents -- */ /** + * + * \brief Enable IODM event notification for a SCSI Adapter. + * + * This function enables IODM event collection for a SCSI Adapter. + * SCSI drivers call this function during HBA registration time. + * This function will allocate memory to store a reasonable number of + * IODM events for the SCSI Adapter. + * + * \note This function may block. + * + * \param[in] vmkAdapter SCSI Adapter on which IODM event collection + * is to be enabled. + * + * \retval VMK_OK IODM Event notification is enabled. + * \retval VMK_NO_MEMORY Not enough memory to allocate resources. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_IodmEnableEvents(vmk_ScsiAdapter *vmkAdapter); + +/* + *********************************************************************** + * vmk_IodmDisableEvents -- */ /** + * + * \brief Disable IODM event notification for a SCSI Adapter. + * + * This function disables IODM event collection for a SCSI Adapter. + * SCSI drivers call this function during HBA unregistration time, if + * IODM event collection was enabled for the HBA during registration. + * This function will free up the IODM resources allocated for the + * SCSI Adapter. + * + * \note This function may block. + * + * \param[in] vmkAdapter SCSI Adapter on which IODM is to be disabled. + * + * \retval VMK_OK IODM Event notification is disabled. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_IodmDisableEvents(vmk_ScsiAdapter *vmkAdapter); + +/* + *********************************************************************** + * vmk_IodmEvent -- */ /** + * + * \brief Notify VMkernel of an IODM event of a SCSI Adapter + * + * SCSI drivers call this function to notify VMkernel when + * an IODM event has occured on the HBA device. + * + * \pre IODM event notification should have been enabled. + * + * \see vmk_IodmEnableEvents() + * + * \note This is a non-blocking function. + * + * \note Spin locks can be held while calling into this function. + * + * \note Given an 'eventId', either 'dataPtr' or 'data' or both + * parameters will be used to convey IODM event's payload. + * Refer to 'vmk_IodmEventType' enum for different 'eventId' + * types and their associated 'dataPtr' and 'data' parameters. + * + * \param[in] vmkAdapter SCSI Adapter on which the event occured. + * \param[in] eventId Event type + * \param[in] dataPtr Pointer to payload associated with the event. + * \param[in] data Data associated with the event. + * + * \retval VMK_OK Event successfully added to the pool. + * \retval VMK_NOT_FOUND IODM event notification is not enabled for + * the adapter. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_IodmEvent(vmk_ScsiAdapter *vmkAdapter, + vmk_IodmEventType eventId, + vmk_AddrCookie dataPtr, + vmk_uint64 data); + +#endif //_VMKAPI_SCSI_IODM_H_ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_mgmt_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_mgmt_types.h index 3175934..2057088 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_mgmt_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_mgmt_types.h @@ -107,8 +107,23 @@ typedef enum vmk_FcLinkSpeed { VMK_FC_SPEED_8GBIT, VMK_FC_SPEED_10GBIT, VMK_FC_SPEED_16GBIT, + VMK_FC_SPEED_32GBIT, + VMK_FC_SPEED_40GBIT, } vmk_FcLinkSpeed; +/* Bitwised FC Port Speed */ +typedef enum vmk_FcLinkSpeedBit { + VMK_FC_SPEED_BIT_UNKNOWN = 0x0, + VMK_FC_SPEED_BIT_1GBIT = 0x1, + VMK_FC_SPEED_BIT_2GBIT = 0x2, + VMK_FC_SPEED_BIT_4GBIT = 0x4, + VMK_FC_SPEED_BIT_8GBIT = 0x8, + VMK_FC_SPEED_BIT_10GBIT = 0x10, + VMK_FC_SPEED_BIT_16GBIT = 0x20, + VMK_FC_SPEED_BIT_32GBIT = 0x40, + VMK_FC_SPEED_BIT_40GBIT = 0x80, +} vmk_FcLinkSpeedBit; + /* FC Port TYPE */ typedef enum vmk_FcPortType { VMK_FC_PORTTYPE_UNKNOWN = 0x0, @@ -136,6 +151,292 @@ typedef enum vmk_RescanLinkStatus { VMK_RESCAN_LINK_FAILED, } vmk_RescanLinkStatus; +/** + * \brief FC Adapter Attributes + * This follows Common HBA API Version 2.18 + */ +typedef struct vmk_FcAdapterAttributes { + /** \brief HBA manufacturer's name in ASCII string */ + vmk_uint8 manufacturer[64]; + /** \brief HBA serial number */ + vmk_uint8 serialNumber[64]; + /** \brief HBA model */ + vmk_uint8 model[256]; + vmk_uint8 modelDescription[256]; + /** \brief WWNN of the HBA */ + vmk_uint64 nodeWWN; + /** \brief Node symbolic name registered with name server */ + vmk_uint8 nodeSymbolicName[256]; + /** \brief Vendor specifc hardware revision level in ASCII string */ + vmk_uint8 hardwareVersion[256]; + /** \brief Vendor specifc driver version in ASCII string */ + vmk_uint8 driverVersion[256]; + /** \brief Vendor specific option ROM version */ + vmk_uint8 optionROMVersion[256]; + /** \brief Vendor specific firmware version */ + vmk_uint8 firmwareVersion[256]; + /** \brief Vendor specific value */ + vmk_uint32 vendorSpecificID; + /** \brief Number of ports on this HBA */ + vmk_uint32 numberOfPorts; + /** \brief Driver file name in full path*/ + vmk_uint8 driverName[256]; +} vmk_FcAdapterAttributes; + +/** + * \brief FC Port Attributes + * This follows Common HBA API Version 2.18 + */ +typedef struct vmk_FcPortAttributes { + /** \brief WWNN associated with this port */ + vmk_uint64 nodeWWN; + /** \brief WWPN associated with this port */ + vmk_uint64 portWWN; + /** \brief FcId of the port */ + vmk_uint32 portFcId; + /** \brief Port Type */ + vmk_FcPortType portType; + /** \brief Port State */ + vmk_FcPortState portState; + /** + * \brief Supported classes of service of this port. + * Value defined in FC-GS-5 for class of service. + */ + vmk_uint32 portSupportedClassOfService; + /** + * \brief Supported FC4 types. See HBAAPI spec and + * FC-GS-5 for detail. + */ + vmk_uint8 portSupportedFc4Types[32]; + /** + * \brief FC4 types configured to support. See + * HBAAPI and FC-GS-5 for detail. + */ + vmk_uint8 portActiveFc4Types[32]; + /** \brief Port symbolic name registered with name server */ + vmk_uint8 portSymbolicName[256]; + /** \brief OS device name */ + vmk_uint8 osDeviceName[256]; + /** \brief Supported speeds, bitwised */ + vmk_FcLinkSpeedBit portSupportedSpeed; + /** \brief Speed the port is currrently operating */ + vmk_FcLinkSpeed portSpeed; + /** \brief Maximum frame size in bytes supported by this port */ + vmk_uint32 portMaxFrameSize; + /** \brief Fabric name the port is attached */ + vmk_uint64 fabricName; + /** \brief Number of target ports discovered */ + vmk_uint32 numberOfDiscoveredPorts; +} vmk_FcPortAttributes; + +/** + * \brief FC HBA Port IO Statistics + * This follows Common HBA API Version 2.18 + */ +typedef struct vmk_FcPortStatistics { + /** \brief Number of seconds since statistics were reset */ + vmk_uint64 secondsSinceLastReset; + /** \brief Number of total transmitted FC frames */ + vmk_uint64 txFrames; + /** \brief Numbef of total received FC frames */ + vmk_uint64 rxFrames; + /** \brief Number of total transmitted FC words */ + vmk_uint64 txWords; + /** \brief Number of total received FC words */ + vmk_uint64 rxWords; + /** \brief Number of LIP primitive sequences occured */ + vmk_uint64 lipCount; + /** \brief Number of NOS primitive sequences occured */ + vmk_uint64 nosCount; + /** \brief Number of frames received in error */ + vmk_uint64 errorFrames; + /** \brief Number of frames lost due to lack of host buffers */ + vmk_uint64 dumpedFrames; + /** + * \brief Value of LINK FAILURE COUNT field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 linkFailureCount; + /** + * \brief Value of LOSS-OF-SYNCHRONIZATION COUNT field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 lossOfSyncCount; + /** + * \brief Value of LOSS-OF-SIGNAL COUNT field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 lossOfSignalCount; + /** + * \brief Value of PRIMITIVE SEQUENCE PROTOCOL ERROR field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 primitiveSeqProtocolErrCount; + /** + * \brief Value of INVALID TRANSMISSION WORD field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 invalidTxWordCount; + /** + * \brief Value of INVALID CRC COUNT field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 invalidCrcCount; + + /* fc4 statistics */ + /** \brief Number of FC-4 operations causing FC-4 data input */ + vmk_uint64 inputRequests; + /** \brief Number of FC-4 operations causing FC-4 data output */ + vmk_uint64 outputRequests; + /** \brief Number of FC-4 operations not permitting FC-4 data movement */ + vmk_uint64 controlRequests; + /** \brief Number of megabytes of FC-4 data input */ + vmk_uint64 inputMegabytes; + /** \brief Number of megabytes of FC-4 data output */ + vmk_uint64 outputMegabytes; +} vmk_FcPortStatistics; + +/** + * \brief FCoE HBA Port IO Statistics + */ +typedef struct vmk_FcoePortStatistics { + vmk_uint64 secondsSinceLastReset; + vmk_uint64 txFrames; + vmk_uint64 rxFrames; + vmk_uint64 txWords; + vmk_uint64 rxWords; + vmk_uint64 errorFrames; + vmk_uint64 dumpedFrames; + vmk_uint64 linkFailureCount; + vmk_uint64 lossOfSignalCount; + vmk_uint64 invalidTxWordCount; + vmk_uint64 invalidCrcCount; + vmk_uint64 vlinkFailureCount; + vmk_uint64 missDiscAdvCount; + + /* protocol(fc4) statistics */ + vmk_uint64 inputRequests; + vmk_uint64 outputRequests; + vmk_uint64 controlRequests; + vmk_uint64 inputMegabytes; + vmk_uint64 outputMegabytes; +} vmk_FcoePortStatistics; + +/** + * \brief SAS Port TYPE + */ +typedef enum vmk_SasPortType { + VMK_SAS_PORTTYPE_UNKNOWN = 1, + VMK_SAS_PORTTYPE_OTHER, + VMK_SAS_PORTTYPE_NOTPRESENT, + VMK_SAS_PORTTYPE_SASDEVICE = 30, + VMK_SAS_PORTTYPE_SATADEVICE, + VMK_SAS_PORTTYPE_SASEXPANDER, +} vmk_SasPortType; + +/** + * \brief SAS Port State + */ +typedef enum vmk_SasPortState { + VMK_SAS_PORTSTATE_UNKNOWN = 1, + VMK_SAS_PORTSTATE_ONLINE, + VMK_SAS_PORTSTATE_OFFLINE, + VMK_SAS_PORTSTATE_BYPASSED, + VMK_SAS_PORTSTATE_DIAGNOSTICS, + VMK_SAS_PORTSTATE_LINKDOWN, + VMK_SAS_PORTSTATE_ERROR, + VMK_SAS_PORTSTATE_LOOPBACK, + VMK_SAS_PORTSTATE_DEGRADED, +} vmk_SasPortState; + +/** + * \brief SAS Port Protocol + */ +typedef enum vmk_SasPortProtocol { + VMK_SAS_PORTPROTOCOL_SSP = 1, + VMK_SAS_PORTPROTOCOL_STP, + VMK_SAS_PORTPROTOCOL_SMP, + VMK_SAS_PORTPROTOCOL_SATA, +} vmk_SasPortProtocol; + +/** + * \brief SAS Port Speed + */ +typedef enum vmk_SasLinkRate { + VMK_SAS_LINK_RATE_UNKNOWN = 0, + VMK_SAS_PHY_DISABLED, + VMK_SAS_LINK_RATE_FAILED, + VMK_SAS_SATA_SPINUP_HOLD, + VMK_SAS_SATA_PORT_SELECTOR, + VMK_SAS_LINK_RATE_1_5_GBPS, + VMK_SAS_LINK_RATE_3_0_GBPS, + VMK_SAS_LINK_RATE_6_0_GBPS, + VMK_SAS_LINK_VIRTUAL, + VMK_SAS_LINK_RATE_12_0_GBPS, +} vmk_SasLinkRate; + +/** + * \brief SAS Adapter Attributes + * This follows ANSI SM-HBA Interface + */ +typedef struct vmk_SasAdapterAttributes { + vmk_uint8 manufacturer[64]; + vmk_uint8 serialNumber[64]; + vmk_uint8 model[256]; + vmk_uint8 modelDescription[256]; + vmk_uint8 hardwareVersion[256]; + vmk_uint8 driverVersion[256]; + vmk_uint8 optionROMVersion[256]; + vmk_uint8 firmwareVersion[256]; + vmk_uint32 vendorSpecificID; + vmk_uint8 driverName[256]; + vmk_uint8 hbaSymbolicName[256]; + vmk_uint32 numberOfPorts; +} vmk_SasAdapterAttributes; + +/** + * \brief SAS Port Attributes + * This follows ANSI SM-HBA Interface + */ +typedef struct vmk_SasPortAttributes { + vmk_SasPortType portType; + vmk_SasPortState portState; + vmk_SasPortProtocol portProtocol; + vmk_uint8 osDeviceName[256]; + vmk_uint64 localSasAddress; + vmk_uint64 attachedSasAddress; + vmk_uint32 numberOfDiscoveredPorts; + vmk_uint32 numberOfPhys; + vmk_uint64 enclosureID; + vmk_uint32 bayID; + vmk_uint8 phyIdentifier; + vmk_SasLinkRate negotiatedLinkrate; + vmk_SasLinkRate minimumLinkrate; + vmk_SasLinkRate maximumLinkrate; +} vmk_SasPortAttributes; + +/** + * \brief SAS HBA Port IO Statistics + */ +typedef struct vmk_SasPortStatistics { + vmk_uint64 secondsSinceLastReset; + vmk_uint64 txFrames; + vmk_uint64 rxFrames; + vmk_uint64 txWords; + vmk_uint64 rxWords; + vmk_uint64 invalidDwordCount; + vmk_uint64 runningDisparityErrorCount; + vmk_uint64 lossOfDwordSyncCount; + vmk_uint64 phyResetProblemCount; + + /* protocol statistics */ + vmk_uint64 inputRequests; + vmk_uint64 outputRequests; + vmk_uint64 controlRequests; + vmk_uint64 inputMegabytes; + vmk_uint64 outputMegabytes; +} vmk_SasPortStatistics; + /** * \brief fc target attributes */ @@ -150,6 +451,8 @@ typedef struct vmk_FcTargetAttrs { /** * \brief fc adapter + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. */ typedef struct vmk_FcAdapter { @@ -173,7 +476,7 @@ typedef struct vmk_FcAdapter void *clientData); /** \brief Get FC Target Attributes */ VMK_ReturnStatus (*getFcTargetAttributes) ( - void *pSCSI_Adapter, vmk_FcTargetAttrs *fcAttrib, + void *clientData, vmk_FcTargetAttrs *fcAttrib, vmk_uint32 channelNo, vmk_uint32 targetNo); /** \brief Get FC Adapter Status */ vmk_AdapterStatus (*getFcAdapterStatus) ( @@ -181,6 +484,17 @@ typedef struct vmk_FcAdapter /** \brief rescan FC Link Status */ vmk_RescanLinkStatus (*rescanFcLink) ( void *clientData); + /** \brief Get FC HBA Attributes */ + VMK_ReturnStatus (*getFcAdapterAttributes) ( + void *clientData, vmk_FcAdapterAttributes *adapterAttrib); + /** \brief Get FC Port Attributes */ + VMK_ReturnStatus (*getFcPortAttributes) ( + void *clientData, vmk_uint32 portId, vmk_FcPortAttributes *portAttrib); + /** \brief Get FC Port Statistics */ + VMK_ReturnStatus (*getFcPortStatistics) ( + void *clientData, vmk_FcPortStatistics *portStats); + /** \brief Issue port reset */ + VMK_ReturnStatus (*issueFcPortReset) (void *clientData, vmk_uint32 portId); /** * \brief link timeout @@ -236,12 +550,19 @@ typedef struct vmk_FcoeAdapterAttrs { /** * \brief fcoe adapter + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. */ typedef struct vmk_FcoeAdapter { /** \brief Get FCoE adapter Details */ VMK_ReturnStatus (*getFCoEAdapterAttributes) ( - void *clientData, vmk_FcoeAdapterAttrs *fcoeAttrs); + void *clientData, vmk_FcoeAdapterAttrs *adapterAttrib); + /** \brief Get FCoE port statstics */ + VMK_ReturnStatus (*getFcoePortStatistics) ( + void *clientData, vmk_FcoePortStatistics *portStats); + /** \brief Issue port reset */ + VMK_ReturnStatus (*issueFcoePortReset) (void *clientData, vmk_uint32 portId); /** \brief Get FC Details */ vmk_FcAdapter fc; @@ -262,6 +583,8 @@ typedef struct vmk_SasTargetAttrs { /** * \brief SAS adapter + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. */ typedef struct vmk_SasAdapter { @@ -270,8 +593,20 @@ typedef struct vmk_SasAdapter void *clientData); /** \brief get the target's attributes */ VMK_ReturnStatus (*getSasTargetAttributes) ( - void *pSCSI_Adapter, vmk_SasTargetAttrs *sasAttrib, + void *clientData, vmk_SasTargetAttrs *sasAttrib, vmk_uint32 channelNo, vmk_uint32 targetNo); + /** \brief Get SAS adapter Details */ + VMK_ReturnStatus (*getSasAdapterAttributes) ( + void *clientData, vmk_SasAdapterAttributes *adapterAttrib); + /** \brief Get SAS Port Attributes */ + VMK_ReturnStatus (*getSasPortAttributes) ( + void *clientData, vmk_uint32 portId, vmk_SasPortAttributes *portAttrib); + /** \brief Get FCoE port statstics */ + VMK_ReturnStatus (*getSasPortStatistics) ( + void *clientData, vmk_SasPortStatistics *portStats); + /** \brief Issue port reset */ + VMK_ReturnStatus (*issueSasPortReset) (void *clientData, vmk_uint32 portId); + /** \brief reserved */ vmk_uint32 reserved1[4]; /** \brief reserved */ @@ -312,13 +647,15 @@ typedef struct vmk_XsanTargetAttrs { /** * \brief generic SAN adapter + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. */ typedef struct vmk_XsanAdapter { /** \brief get the generic SAN initiator's ID */ VMK_ReturnStatus (*getXsanInitiatorID)(void *clientData, vmk_XsanID *xsanID); /** \brief get the target's attributes on generic SAN */ VMK_ReturnStatus (*getXsanTargetAttributes) ( - void *pSCSI_Adapter, vmk_XsanTargetAttrs *xsanAttrib, + void *clientData, vmk_XsanTargetAttrs *xsanAttrib, vmk_uint32 channelNo, vmk_uint32 targetNo); } vmk_XsanAdapter; @@ -336,7 +673,11 @@ typedef enum vmk_IscsiParamStatus { VMK_ISCSI_PARAM_CONFIG_FAILED, } vmk_IscsiParamStatus; -/* iSCSI Adapter Structure */ +/** + * /brief iSCSI Adapter Structure + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. + */ typedef struct vmk_IscsiAdapter { char reserved[5048]; /* not used */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_types.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_types.h index 12734da..92762f2 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/scsi/vmkapi_scsi_types.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2004 - 2009 VMware, Inc. All rights reserved. + * Copyright 2004 - 2013 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -42,7 +42,7 @@ typedef struct vmk_ScsiSystemLimits { } vmk_ScsiSystemLimits; /** - * \brief sense data structure maintained in each SCSI device + * \brief Fixed format sense data structure maintained in each SCSI device * SPC 3 r23, Section 4.5.3 table 26 * * NB: The "valid" bit in the data structure does NOT tell whether the sense is @@ -105,6 +105,77 @@ typedef struct vmk_ScsiSenseData { vmk_uint8 additional[46]; } VMK_ATTRIBUTE_PACKED vmk_ScsiSenseData; +/* + * Default SCSI fixed format sense data structure without any additional data. + */ + +typedef struct vmk_ScsiSenseDataSimple { + union { + struct { + /** \brief error type and format of sense data (see SPC 3 r23, + * Sec. 4.5.1) + */ + vmk_uint8 error :7, + /** \brief set to one indicates the 'info' field is valid */ + valid :1; + /** \brief obsolete */ + vmk_uint8 segment; + /** \brief generic information describing the error or exception + * condition + */ + vmk_uint8 key :4, + :1, + /** \brief see above spc section */ + ili :1, + /** \brief see above spc section */ + eom :1, + /** \brief see above spc section */ + filmrk :1; + /** \brief see above spc section */ + vmk_uint8 info[4]; + /** \brief see above spc section */ + vmk_uint8 optLen; + /** \brief see above spc section */ + vmk_uint8 cmdInfo[4]; + /** \brief further information about to the condition reported in + * 'key' + */ + vmk_uint8 asc; + /** \brief detailed information about to the additional sense code + * in 'asc' + */ + vmk_uint8 ascq; + /** \brief Field Replacable Unit code (see SPC 3 r23, 4.5.2.5) */ + vmk_uint8 fru; + /** \brief Sense-key specific fields (see SPC 3 r23, 4.5.2.4) */ + vmk_uint8 bitpos :3, + bpv :1, + :2, + cd :1, + /** \brief Set to indicate sense-key specific fields are valid */ + sksv :1; + /** \brief field indicates which byte of the CDB or param data was in + * error + */ + vmk_uint16 epos; + } VMK_ATTRIBUTE_PACKED fixed; /* fixed format sense data */ + struct { + vmk_uint8 error :7, + :1; + vmk_uint8 key :4, + :4; + vmk_uint8 asc; + vmk_uint8 ascq; + vmk_uint8 reserved[3]; + vmk_uint8 optLen; + vmk_uint8 additional[10]; + } VMK_ATTRIBUTE_PACKED descriptor; /* descriptor format sense data */ + struct { + vmk_uint8 senseData[18]; + } VMK_ATTRIBUTE_PACKED byte; /* byte-stream sense data */ + } format; +} vmk_ScsiSenseDataSimple; + /** * \brief SCSI Device event handler callback entry * @@ -221,6 +292,13 @@ typedef enum { * in the VM cluster), but not any other ones. */ VMK_SCSI_COMMAND_FLAGS_VM_CLUSTER = 0x00000400, + /** + * \brief Indicator of a swap IO that is used to swap memory to disk. + * + * The swap IOs help relieve memory pressure on the system. + * So system should identify them and prioritize them if possible. + */ + VMK_SCSI_COMMAND_FLAGS_SWAP_IO = 0x00000200, } /** \cond nodoc */ VMK_ATTRIBUTE_PACKED VMK_ATTRIBUTE_ALIGN(1) /* \endcond*/ vmk_ScsiCommandFlags; @@ -295,7 +373,11 @@ typedef struct vmk_ScsiCommand { vmk_ScsiCmdStatus status; /** \brief Number of bytes transferred to or from the data buffer. */ vmk_ByteCountSmall bytesXferred; - /** \brief Worldlet ID that submitted the command, if any. */ + + /** + * \deprecated Do not use in Native Drivers + * \brief Worldlet ID that submitted the command, if any. + */ vmk_WorldletID worldletId; /** * \brief Scatter/gather array representing the IO-address ranges @@ -309,7 +391,13 @@ typedef struct vmk_ScsiCommand { /** * \brief SCSI sense data. * + * \deprecated This structure member is being deprecated. + * Consumers of this field should rely on the APIs + * vmk_ScsiCmd{Get,Set,Clear}SenseData() and + * vmk_ScsiGetSupportedCmdSenseDataSize(). + * * Only valid if vmk_ScsiCmdStatusIsCheck(cmd->status). + * Do not add any fields below this member. */ vmk_ScsiSenseData senseData; /** \brief Reserved. */ @@ -358,9 +446,20 @@ typedef struct vmk_ScsiTaskMgmt { * SCSI Adapter */ +/** + * \brief Don't care value for 'hostMaxSectors'. + */ +#define VMK_SCSI_HOST_MAX_SECTORS_IGNORE 0xFFFF + +/** + * \brief actions the 'discover' function can execute + */ typedef enum vmk_ScanAction { + /** Create a path to the named LUN */ VMK_SCSI_SCAN_CREATE_PATH, + /** Keep a previously created path to the named LUN */ VMK_SCSI_SCAN_CONFIGURE_PATH, + /** Destroy the path to the named LUN */ VMK_SCSI_SCAN_DESTROY_PATH, } vmk_ScanAction; @@ -394,8 +493,11 @@ typedef void (*vmk_EventHandlerCbk) (void *clientData, vmk_uint32 eventType); * */ typedef enum vmk_ScsiAdapterFlags { + /** \deprecated Legacy from Console-OS based shared block adapters */ VMK_SCSI_ADAPTER_FLAG_BLOCK = 0x00000001, - /** This adapter is an NPIV VPORT */ + /** + * \deprecated Do not use in Native Drivers + * This adapter is an NPIV VPORT */ VMK_SCSI_ADAPTER_FLAG_NPIV_VPORT = 0x00000002, /** Do not scan when registering this adapter */ VMK_SCSI_ADAPTER_FLAG_REGISTER_WITHOUT_SCAN = 0x00000004, @@ -403,10 +505,309 @@ typedef enum vmk_ScsiAdapterFlags { VMK_SCSI_ADAPTER_FLAG_NO_PERIODIC_SCAN = 0x00000008, /** Ok to probe periodically, but no adapter rescan */ VMK_SCSI_ADAPTER_FLAG_NO_ADAPTER_RESCAN = 0x00000010, - /** This adapter is a Legacy NPIV VPORT */ + /** + * \deprecated Do not use in Native Drivers + * This adapter is a Legacy NPIV VPORT */ VMK_SCSI_ADAPTER_FLAG_NPIV_LEGACY_VPORT = 0x00000020, } vmk_ScsiAdapterFlags; +/* + *********************************************************************** + * vmk_ScsiAdapterCommand -- */ /** + * + * \brief Queue a SCSI command on the adapter and LUN specified. + * + * Perform the command passed in 'cmd' on the adapter passed in + * 'clientData' on the LUN passed in 'deviceData'. + * + * \note Required function pointer + * + * \param[in] clientData Handle to the adapter to perform the + * comand on. + * \param[in] cmd Pointer to the command to execute. + * \param[in] deviceData Pointer to deviceData returned by 'discover' + * Create path. + * + * \retval VMK_WOULD_BLOCK cmd not queued because of Queue Depth limit + * or device was quiesced. + * \retval VMK_NO_MEMORY Out of memory. + * \retval VMK_OK Success - cmd queued or will be completed + * with error. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterCommand)(void *clientData, + struct vmk_ScsiCommand *cmd, + void *deviceData); + +/* + *********************************************************************** + * vmk_ScsiAdapterTaskMgmt -- */ /** + * + * \brief Perform a SCSI task management command on the adapter and + * LUN specified. + * + * Perform the task management command passed in 'taskMgmt' on the + * adapter passed in 'clientData' (if applicable) and on the LUN + * passed in 'deviceData'. + * + * \note Required function pointer + * + * \param[in] clientData Handle to the adapter to perform the task + * management action on. + * \param[in] taskMgmt Pointer to the task management command to + * be executed. + * \param[in] deviceData Pointer to deviceData returned by 'discover' + * Create. + * + * \retval VMK_FAILURE Task management command failed. + * \retval VMK_NO_MEMORY Out of memory. + * \retval VMK_OK Success. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterTaskMgmt)( + void *clientData, + struct vmk_ScsiTaskMgmt *taskMgmt, + void *deviceData); + +/* + *********************************************************************** + * vmk_ScsiAdapterDumpCommand -- */ /** + * + * \brief Queue a SCSI command during a core dump on the adapter + * and LUN specified. + * + * Perform the command passed in 'cmd' on the adapter passed in + * 'clientData' on the LUN passed in 'deviceData' during a core dump. + * + * \note Required function pointer + * + * \note Please see the description of system dumps in the VMkernel + * fundamentals guide. + * + * \param[in] clientData Handle to the adapter to perform the discover + * action on. + * \param[in] cmd Pointer to the command to execut. + * \param[in] deviceData Pointer to deviceData returned by 'discover' + * Create. + * + * \note No one else can issue commands to this device anymore though + * the ordinary 'command' entry point. + * + * \retval VMK_WOULD_BLOCK cmd not queued because of Queue Depth limit + * or device was quiesced. + * \retval VMK_BUSY Command cannot be executed, error handler active. + * \retval VMK_FAILURE Command cannot be executed. + * \retval VMK_NO_MEMORY Out of memory. + * \retval VMK_OK Success - cmd queued or will be completed + * with error. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterDumpCommand)( + void *clientData, + vmk_ScsiCommand *cmd, + void *deviceData); + +/* + *********************************************************************** + * vmk_ScsiAdapterDumpQueue -- */ /** + * + * \brief Log the current adapter queue. + * + * \note Required function pointer + * + * \param[in] clientData Handle to the adapter. + * + *********************************************************************** + */ +typedef void (*vmk_ScsiAdapterDumpQueue)(void *clientData); + +/* + *********************************************************************** + * vmk_ScsiAdapterDumpPollHandler -- */ /** + * + * \brief Run the adapter's poll handler, called on the dump device + * during a system dump. + * + * \note Required function pointer + * + * \note Please see the description of system dumps in the VMkernel + * fundamentals guide. + * + * \param[in] clientData Handle to the adapter. + * + * \param[in] dumpPollHandlerData Argument passed to dumpPollHandler + * + *********************************************************************** + */ +typedef void (*vmk_ScsiAdapterDumpPollHandler)(void *clientData); + + +/* + *********************************************************************** + * vmk_ScsiAdapterDiscover -- */ /** + * + * \brief Perform the discovery action specified + * + * The driver should perform the action specified in 'action' for the + * LUN described by 'channel', 'targetId' and 'lunId'. + * The pointer passed in 'deviceData' points to a void * to place or + * use the driver private data structure pointer that is used as a + * handle to the LUN. + * + * \note Required function pointer + * + * \note This function is allowed to block in the driver. + * + * \param[in] clientData Handle to the adapter. + * \param[in] action One of the vmk_ScanAction enums declared above + * can be create, configure or destroy. + * \param[in] channel The channel to perform the action on. + * \param[in] targetId The target Id to perform the action on. + * \param[in] lunId The LUN Id to perform the action on. + * \param[in,out] deviceData Pointer to where the deviceData pointer + * is placed for create and destroy + * + * \note *deviceData is the private data structure the driver returns + * to represent the channel/targetId/lunId created. This pointer is + * used by the VMkernel as a handle for performance reasons in + * various other function pointer calls to represent the path + * to the LUN to be acted on. + * + * \note Return values for Create (VMK_SCSI_SCAN_CREATE_PATH) + * \retval VMK_NO_CONNECT The targetId does not exist or a target error + * occured. + * \retval VMK_NO_MEMORY Out of memory (not enough to create path). + * \retval VMK_EXISTS Path with specified channel/targetId/lunId + * already exists - *deviceData returned for + * existing path + * \retval VMK_OK Success - *deviceData returned for newly + * created path + * + * \note Return values for Configure (VMK_SCSI_SCAN_CONFIGURE_PATH) + * \retval VMK_FAILURE Path cannot be configured + * \retval VMK_NOT_FOUND Path cannot be found + * \retval VMK_OK Success - *deviceData not changed + * + * \note Return values for Destroy (VMK_SCSI_SCAN_DESTROY_PATH) + * \retval VMK_FAILURE Path cannot be destroyed + * \retval VMK_OK Success - *deviceData will be written with NULL + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterDiscover)( + void *clientData, + vmk_ScanAction action, + int channel, + int targetId, + int lunId, + void **deviceData); + +/* + *********************************************************************** + * vmk_ScsiAdapterModifyDeviceQueueDepth -- */ /** + * + * \brief Modify path queue depth on LUN specified if possible. + * + * \param[in] clientData Handle to the adapter. + * \param[in] qDepth New queue depth to set. + * \param[in] deviceData LUN pointer returned by 'discover' Create. + * + * \note Optional function pointer + * + * \retval Returns the new queue depth in effect, which could be + * lower than the depth actually requested if the driver + * cannot honor the requested (higher) queue depth. + * \retval Returns 0 if not a valid path. + * + *********************************************************************** + */ +typedef int (*vmk_ScsiAdapterModifyDeviceQueueDepth)( + void *clientData, + int qDepth, + void *deviceData); + + +/* + *********************************************************************** + * vmk_ScsiAdapterQueryDeviceQueueDepth -- */ /** + * + * \brief Return the current path queue depth on LUN specified. + * + * \note Required function pointer + * + * \param[in] clientData Handle to the adapter. + * \param[in] deviceData LUN pointer returned by 'discover' Create. + * + * \retval Returns the current queue depth for the path. + * \retval Returns 0 if not a valid path. + * + *********************************************************************** + */ +typedef int (*vmk_ScsiAdapterQueryDeviceQueueDepth)( + void *clientData, + void *deviceData); + + +/* + *********************************************************************** + * vmk_ScsiAdapterCheckTarget -- */ /** + * + * \brief Check if the specified target exists on the adapter and + * channel specified. + * + * \note Required function pointer for SAN drivers, optional + * for all others. + * + * \note If checkTarget returns VMK_FAILURE, we will not call + * discover to create paths. + * + * \param[in] clientData Handle to the adapter. + * \param[in] channel The channel to check for target on. + * \param[in] targetId The target Id to check. + * + * \retval VMK_FAILURE Target does not exist + * \retval VMK_OK Success - target exists + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterCheckTarget)( + void *clientData, + int channel, + int targetId); + +/* + *********************************************************************** + * vmk_ScsiAdapterNotifyIOAllowed -- */ /** + * + * \brief Callback to notify when IO is allowed to adapter + * + * \note Optional function pointer + * + * \note The Native Driver must assume IO is not possible until a + * "VMK_TRUE" is notified through this API. + * + * \note This function is not allowed to block in the driver. + * + * \note Passes VMK_TRUE or VMK_FALSE on these conditions: + * VMK_TRUE - When logical device registration is complete and + * when unquiescing the logical device. + * VMK_FALSE - When logical device quiesce is complete and when + * deviceForget is complete. + * + * \param[in] logicalDevice Handle to the logical device. + * \param[in] ioAllowed VMK_TRUE if IO is allowed, VMK_FALSE if IO + * not allowed. + * + *********************************************************************** + */ +typedef void (*vmk_ScsiAdapterNotifyIOAllowed)( + vmk_Device logicalDevice, + vmk_Bool ioAllowed); + + /** * \brief main data structure for SCSI adapter * @@ -417,32 +818,38 @@ typedef enum vmk_ScsiAdapterFlags { * discover() entrypoint. */ typedef struct vmk_ScsiAdapter { - /** \brief DMA constraints for this adapter. */ + /** + * \deprecated Do not use in Native Drivers + * \brief DMA constraints for this adapter. + * \note See 'engine' field below for more information. + */ vmk_DMAConstraints constraints; /** \brief Device for this adapter. */ vmk_Device device; /** \brief max # of blocks per i/o */ int hostMaxSectors; - /** \brief adapter's ->can_queue entrypoint */ + /** \brief Pointer to the total queue depth for the adapter */ vmk_uint32 *qDepthPtr; + /** \brief Issue a SCSI command to the specified device */ - VMK_ReturnStatus (*command)( - void *clientData, - struct vmk_ScsiCommand *cmd, - void *deviceData); + vmk_ScsiAdapterCommand command; + /** \brief Issue a SCSI task management */ - VMK_ReturnStatus (*taskMgmt)( - void *clientData, - struct vmk_ScsiTaskMgmt *taskMgmt, - void *deviceData); + vmk_ScsiAdapterTaskMgmt taskMgmt; + /** \brief Issue a SCSI command during a core dump */ - VMK_ReturnStatus (*dumpCommand)( - void *clientData, - vmk_ScsiCommand *cmd, - void *deviceData); - /** \brief Destroy the adapter */ + vmk_ScsiAdapterDumpCommand dumpCommand; + + /** + * \deprecated Do not use in Native Drivers + * \brief Perform a close on the adapter specified. + */ void (*close)(void *clientData); - /** \brief generate the adapter's proc node information */ + + /** + * \deprecated Do not use in Native Drivers + * \brief proc handler for the given SCSI host adapter. + */ VMK_ReturnStatus (*procInfo)( void* clientData, char* buf, @@ -450,15 +857,21 @@ typedef struct vmk_ScsiAdapter { vmk_ByteCountSmall count, vmk_ByteCountSmall* nbytes, int isWrite); + /** \brief Log the current adapter queue */ - void (*dumpQueue)(void *clientData); - /** \brief Run the adapter's BH, called on the dump device during a PSOD - * Interrupts are disabled and BHs aren't running. + vmk_ScsiAdapterDumpQueue dumpQueue; + + /** \brief Run the adapter's poll handler, called on the dump device + * during a system dump. */ + vmk_ScsiAdapterDumpPollHandler dumpPollHandler; + + /** \brief Passed as the argument to dumpPollHandler() */ + void *dumpPollHandlerData; + + /** + * \deprecated Do not use in Native Drivers + * \brief driver specific ioctl */ - void (*dumpBHHandler)(void *clientData); - /** \brief arg to dumpQueue() */ - void *dumpBHHandlerData; - /** \brief driver specific ioctl */ VMK_ReturnStatus (*ioctl)( void *clientData, void *deviceData, @@ -467,21 +880,23 @@ typedef struct vmk_ScsiAdapter { vmk_VA userArgsPtr, vmk_IoctlCallerSize callerSize, vmk_int32 *drvErr); + /** \brief discover & destroy a device */ - VMK_ReturnStatus (*discover)( - void *clientData, - vmk_ScanAction action, - int channel, - int targetId, - int lunId, - void **deviceData); - /** \brief send NPIV specific commands to a device */ + vmk_ScsiAdapterDiscover discover; + + /** + * \deprecated Do not use in Native Drivers + * \brief send NPIV specific commands to a device + */ VMK_ReturnStatus (*vportop)( - void *handle, + void *clientData, vmk_uint32 cmd, - void *arg, - vmk_int32 *drvErr); - /** \brief scan a single LUN on a vport */ + void *arg); + + /** + * \deprecated Do not use in Native Drivers + * \brief scan a single LUN on a vport + */ VMK_ReturnStatus (*vportDiscover)( void *clientData, vmk_ScanAction action, @@ -490,29 +905,29 @@ typedef struct vmk_ScsiAdapter { int lun, struct vmk_ScsiAdapter **vmkAdapter, void **deviceData); + /** \brief try changing the path queue depth */ - int (*modifyDeviceQueueDepth)( - void *clientData, - int qDepth, - void *deviceData); + vmk_ScsiAdapterModifyDeviceQueueDepth modifyDeviceQueueDepth; + /** \brief query the path queue depth */ - int (*queryDeviceQueueDepth)( - void *clientData, - void *deviceData); + vmk_ScsiAdapterQueryDeviceQueueDepth queryDeviceQueueDepth; + /** \brief checks if a target exists */ - VMK_ReturnStatus (*checkTarget)( - void *clientData, - int channel, - int targetId); + vmk_ScsiAdapterCheckTarget checkTarget; + /** \brief SCSI target id of adapter, or -1 if n/a */ int targetId; /** \brief adapter flags, see vmk_ScsiAdapterFlags above */ vmk_uint32 flags; - /** \brief block data */ - int blockData; + int reserved; /** \brief id of module running this adapter */ vmk_ModuleID moduleID; - /** \brief adapter creator's private convenience scratch data ptr */ + /** \brief adapter creator's private convenience scratch data ptr + * + * \note clientData is a pointer to a private structure provided + * by the driver for use as 'handle' to represent an + * adapter for many function calls. + */ void *clientData; /** \brief # of channels */ int channels; @@ -528,16 +943,24 @@ typedef struct vmk_ScsiAdapter { vmk_uint8 maxCmdLen; /** \brief adapter name */ vmk_Name name; - /** \brief block device name - * only valid for mgmtAdapter.transport == VMK_STORAGE_ADAPTER_BLOCK - */ - vmk_Name blockDevName; /** \brief driver name */ vmk_Name driverName; - /** \brief /proc directory */ + /** + * \deprecated Do not use in Native Drivers + * \brief /proc directory */ vmk_Name procName; /** \brief transport specific mgmtAdapter hooks */ vmk_SCSITransportMgmt mgmtAdapter; + /** \brief notify when IO is allowed/disallowed */ + vmk_ScsiAdapterNotifyIOAllowed notifyIOAllowed; + /* + * \brief DMA Engine created by driver + * + * \note Native Drivers must create and pass a DMA Engine for use by the + * PSA stack for SCSI IO. The vmk_DMAConstraints are embedded + * in the 'engine' at creation time. + */ + vmk_DMAEngine engine; } vmk_ScsiAdapter; /* @@ -557,11 +980,13 @@ typedef enum { } vmk_ScsiPluginState; /** + * \deprecated Do not use in Native Drivers * \brief Opaque handle for Completion Objects, provided by lower layer. */ typedef vmk_AddrCookie vmk_ScsiCompletionHandle; /** + * \deprecated Do not use in Native Drivers * \brief Completion Object information passed by the vmkLinux module. */ typedef struct vmk_ScsiCompObjectInfo { @@ -1125,6 +1550,7 @@ typedef enum { VMK_SCSI_INQ_TYPE_STD = 1, VMK_SCSI_INQ_TYPE_EVPD80 = 2, VMK_SCSI_INQ_TYPE_EVPD83 = 3, + VMK_SCSI_INQ_TYPE_EVPD86 = 4, } vmk_ScsiInqType; /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/sockets/vmkapi_socket.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/sockets/vmkapi_socket.h index 66f37c3..ef146a7 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/sockets/vmkapi_socket.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/sockets/vmkapi_socket.h @@ -29,12 +29,20 @@ */ typedef struct vmk_SocketInt *vmk_Socket; +/** + * \brief Definition for an invalid vmk_Socket. + */ +#define VMK_SOCKET_INVALID ((vmk_Socket)NULL) + /* * Address families */ /** \brief IPv4 */ #define VMK_SOCKET_AF_INET 2 +/** \brief IPv6 */ +#define VMK_SOCKET_AF_INET6 28 + /* * Socket types */ @@ -51,7 +59,7 @@ typedef struct vmk_SocketInt *vmk_Socket; * Flags for vmk_SocketSendTo() and vmk_SocketRecvFrom() */ /** \brief Send/receive of this message should not block */ -#define VMK_SOCKET_MSG_DONTWAIT 0x80 +#define VMK_SOCKET_MSG_DONTWAIT 0x80 /* * Socket option levels @@ -63,22 +71,25 @@ typedef struct vmk_SocketInt *vmk_Socket; * Socket-level socket options */ /** \brief Allow local address reuse */ -#define VMK_SOCKET_SO_REUSEADDR 0x0004 +#define VMK_SOCKET_SO_REUSEADDR 0x0004 /** \brief Keep connections alive */ -#define VMK_SOCKET_SO_KEEPALIVE 0x0008 +#define VMK_SOCKET_SO_KEEPALIVE 0x0008 /** \brief Just use interface addresses */ -#define VMK_SOCKET_SO_DONTROUTE 0x0010 +#define VMK_SOCKET_SO_DONTROUTE 0x0010 /** \brief Linger on close if data present */ -#define VMK_SOCKET_SO_LINGER 0x0080 +#define VMK_SOCKET_SO_LINGER 0x0080 +/** \brief Allow local address and port reuse */ +#define VMK_SOCKET_SO_REUSEPORT 0x0200 /** \brief Timestamp received dgram traffic */ -#define VMK_SOCKET_SO_TIMESTAMP 0x0400 +#define VMK_SOCKET_SO_TIMESTAMP 0x0400 /** \brief Use non-blocking socket semantics */ #define VMK_SOCKET_SO_NONBLOCKING 0x1015 + /** \brief Bind socket to a vmknic * \note Note that the TCP/IP stack will only transmit the packet if the routing * decision indicates that it can be sent out of the specified vmknic. */ -#define VMK_SOCKET_SO_BINDTOVMK 0x1016 +#define VMK_SOCKET_SO_BINDTOVMK 0x1016 /* * Values for the vmk_SocketShutdown()'s "how" parameter @@ -121,6 +132,8 @@ typedef struct vmk_SocketLingerData { * \brief Convert an address into a simple string for a particular * address family. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] addr Address to translate to a string. @@ -149,6 +162,8 @@ VMK_ReturnStatus vmk_SocketAddrToString(const vmk_SocketAddress *addr, * \brief Convert an address into a simple string for a particular * address family. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] addressFamily Address family that the string address @@ -180,6 +195,8 @@ VMK_ReturnStatus vmk_SocketStringToAddr(int addressFamily, * \ingroup Socket * \brief Create a new unbound socket. * + * \nativedriversdisallowed + * * \note This function will not block. * \note The default behavior is to create a blocking socket. If * nonblocking behavior is required then the @@ -223,6 +240,8 @@ VMK_ReturnStatus vmk_SocketCreate(int domain, * \ingroup Socket * \brief Bind a socket to a network address endpoint. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to bind to the network address @@ -257,6 +276,8 @@ VMK_ReturnStatus vmk_SocketBind(vmk_Socket socket, * \ingroup Socket * \brief Connect to a network address * + * \nativedriversdisallowed + * * \note This function may block if the socket is blocking socket * (this is the default behavior). If nonblocking behavior is required * then the VMK_SOCKET_SO_NONBLOCKING socket option must be set. @@ -294,6 +315,8 @@ VMK_ReturnStatus vmk_SocketConnect(vmk_Socket socket, * \ingroup Socket * \brief Shutdown part or all of a connection on a socket * + * \nativedriversdisallowed + * * \note This function may block if VMK_SOCKET_SO_LINGER has been set * otherwise it will not block. * @@ -320,6 +343,8 @@ VMK_ReturnStatus vmk_SocketShutdown(vmk_Socket socket, * \ingroup Socket * \brief Destroy an existing socket. * + * \nativedriversdisallowed + * * \note This function may block if VMK_SOCKET_SO_LINGER has been set * otherwise will not block. * @@ -342,6 +367,8 @@ VMK_ReturnStatus vmk_SocketClose(vmk_Socket socket); * \ingroup Socket * \brief Get the option information from a socket * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to get the option info from. @@ -376,6 +403,8 @@ VMK_ReturnStatus vmk_SocketGetSockOpt(vmk_Socket socket, * \ingroup Socket * \brief Set the option information on a socket * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to set the option info on. @@ -410,6 +439,8 @@ VMK_ReturnStatus vmk_SocketSetSockOpt(vmk_Socket socket, * \ingroup Socket * \brief Send data to a network address. * + * \nativedriversdisallowed + * * \note This function may block if the VMK_SOCKET_MSG_DONTWAIT flag is * not set or the socket is a blocking socket. * @@ -457,6 +488,8 @@ VMK_ReturnStatus vmk_SocketSendTo(vmk_Socket socket, * \ingroup Socket * \brief Receive data from a network address. * + * \nativedriversdisallowed + * * \note This function may block if the VMK_SOCKET_MSG_DONTWAIT flag is * not set or the socket is a blocking socket. * @@ -501,6 +534,8 @@ VMK_ReturnStatus vmk_SocketRecvFrom(vmk_Socket socket, * \ingroup Socket * \brief Get the socket's local endpoint network address information. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to query. @@ -531,6 +566,8 @@ VMK_ReturnStatus vmk_SocketGetSockName(vmk_Socket socket, * \ingroup Socket * \brief Get the socket's far endpoint network address information. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to query. diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/sockets/vmkapi_socket_ip.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/sockets/vmkapi_socket_ip.h index 786320a..fee38b7 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/sockets/vmkapi_socket_ip.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/sockets/vmkapi_socket_ip.h @@ -56,7 +56,7 @@ #define VMK_SOCKET_OPT_IP_HDRINCL 2 /** - * \brief Binary IP address in network byte order. + * \brief Binary IPv4 address in network byte order. */ typedef struct vmk_SocketIPAddressAddr { vmk_uint32 s_addr; @@ -68,13 +68,13 @@ typedef struct vmk_SocketIPAddressAddr { typedef struct vmk_SocketIPAddress { /** \brief Address length. Should be sizeof(vmk_SocketIPAddress) */ vmk_uint8 sin_len; - + /** \brief Address family. Should be VMK_SOCKET_AF_INET */ vmk_uint8 sin_family; - + /** \brief IP port in network byte order */ vmk_uint16 sin_port; - + /** \brief Binary IP address in network byte order */ vmk_SocketIPAddressAddr sin_addr; @@ -82,6 +82,42 @@ typedef struct vmk_SocketIPAddress { vmk_uint8 sin_zero[8]; } VMK_ATTRIBUTE_PACKED vmk_SocketIPAddress; + +/** + * \brief Binary IPv6 address in network byte order. + */ +typedef struct vmk_SocketIPv6AddressAddr { + union { + vmk_uint8 __u6_addr8[16]; + vmk_uint16 __u6_addr16[8]; + vmk_uint32 __u6_addr32[4]; + } __u6_addr; +} VMK_ATTRIBUTE_PACKED vmk_SocketIPv6AddressAddr; + + +/** + * \brief An IPv6-style socket address. + */ +typedef struct vmk_SocketIPv6Address { + /** \brief Address length. Should be sizeof(vmk_SocketIPv6Address) */ + vmk_uint8 sin6_len; + + /** \brief Address family. Should be VMK_SOCKET_AF_INET6 */ + vmk_uint8 sin6_family; + + /** \brief IP port in network byte order */ + vmk_uint16 sin6_port; + + /** \brief Flow Info in network byte order */ + vmk_uint32 sin6_flowinfo; + + /** \brief Binary IP address in network byte order */ + vmk_SocketIPv6AddressAddr sin6_addr; + + /** \brief Scope ID in network byte order */ + vmk_uint32 sin6_scopeid; +} VMK_ATTRIBUTE_PACKED vmk_SocketIPv6Address; + /* *********************************************************************** * vmk_Ntohl -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_ether.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_ether.h index bdad10a..4f7477c 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_ether.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_ether.h @@ -96,6 +96,8 @@ typedef struct { *********************************************************************** * vmk_EthDestinationFilter -- */ /** * + * \nativedriversdisallowed + * * \brief Filter ethernet frames based on the destination address. * * \param[in] filter Ethernet address filter diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_port.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_port.h index 8432211..1e2d599 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_port.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_port.h @@ -119,8 +119,18 @@ typedef enum { /** Single-Root I/O Virtulaization */ VMK_PORT_CLIENT_CAP_SRIOV = 0x80000000, + + /** Offload L3/L4 header alignment */ + VMK_PORT_CLIENT_CAP_OFFLOAD_ALIGN_ANY = 0x1000000000000, + + /** + * Generic hardware offload (eg. vxlan encapsulation offload and offset + * based offload) + */ + VMK_PORT_CLIENT_CAP_GENERIC_OFFLOAD = 0x2000000000000, } vmk_PortClientCaps; + /** * \brief State of the device associated to a port. */ @@ -183,16 +193,11 @@ typedef enum vmk_PortEvent { } vmk_PortEvent; -/** - * \brief Number of bytes for port private stats string. - */ -#define VMK_PORT_PRIVATE_STATS_MAX 4096 - /** * \brief Structure containing statistics of the device associated to a port. */ -typedef struct { +typedef struct vmk_PortClientStats{ /** The number of rx packets received by the driver */ vmk_uint64 rxPkt; @@ -273,7 +278,10 @@ typedef struct { * String used to store the information specific the device associated * to a port */ - char privateStats[VMK_PORT_PRIVATE_STATS_MAX]; + char *privateStats; + + /** The length of privateStats in bytes */ + vmk_ByteCount privateStatsLength; } vmk_PortClientStats; /* @@ -282,6 +290,8 @@ typedef struct { * * \brief Set link status of a switch port. * + * \nativedriversdisallowed + * * The link status includes link state, speed, and duplex. * * \note As this function will asynchronously call down to the device, @@ -317,6 +327,8 @@ VMK_ReturnStatus vmk_PortSetLinkStatus(vmk_SwitchPortID portID, * * \brief Get link status of a switch port. * + * \nativedriversdisallowed + * * The link status includes link state, speed, and duplex. * * \see vmk_PortSetLinkStatus(). @@ -344,51 +356,55 @@ VMK_ReturnStatus vmk_PortGetLinkStatus(vmk_SwitchPortID portID, /* -*********************************************************************** -* vmk_PortUpdateDevCap -- */ /** -* -* \brief Request or release capabilities on a switch port. -* -* For capabilities that are allowed to be updated, refer to definition -* of vmk_PortCapability. -* -* Some pNIC hardware only support a subset of capabilities. When -* setting a capability that hardware doesn't support, vmkernel will -* insert software routine to do the packet processing. -* -* \see vmk_PortCapability(). -* -* \note This API currently only supports ports connected to uplinks -* -* \note The calling thread must hold a mutable handle for the portset -* associated with the specified portID. -* -* \note This function will not block. -* -* \param[in] portID Numeric ID of a virtual port -* \param[in] cap Pointer to new capabilities. Logical -* OR of vmk_PortCapability enum flag -* \param[out] resCap Pointer to result capabilities. Logical -* OR of vmk_PortCapability enum flag -* -* \retval VMK_OK If capabilities update is successful -* \retval VMK_NOT_FOUND If device cannot be found or portID is -* invalid -* \retval VMK_FAILURE Failed to update device cap -*********************************************************************** -*/ + *********************************************************************** + * vmk_PortUpdateDevCap -- */ /** + * + * \brief Request or release capabilities on a switch port. + * + * \nativedriversdisallowed + * + * For capabilities that are allowed to be updated, refer to definition + * of vmk_PortCapability. + * + * Some pNIC hardware only support a subset of capabilities. When + * setting a capability that hardware doesn't support, vmkernel will + * insert software routine to do the packet processing. + * + * \see vmk_PortCapability(). + * + * \note This API currently only supports ports connected to uplinks + * + * \note The calling thread must hold a mutable handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \param[in] portID Numeric ID of a virtual port + * \param[in] cap Pointer to new capabilities. Logical + * OR of vmk_PortCapability enum flag + * \param[out] resCap Pointer to result capabilities. Logical + * OR of vmk_PortCapability enum flag + * + * \retval VMK_OK If capabilities update is successful + * \retval VMK_NOT_FOUND If device cannot be found or portID is + * invalid + * \retval VMK_FAILURE Failed to update device cap + *********************************************************************** + */ VMK_ReturnStatus vmk_PortUpdateDevCap(vmk_SwitchPortID portID, - vmk_uint32 cap, - vmk_uint32 *resCap); + vmk_uint64 cap, + vmk_uint64 *resCap); /* *********************************************************************** - * vmk_PortQueryDevCap -- */ /** + * vmk_PortQueryDevCap -- */ /** * * \brief Get the enabled software capabilities on a switch port. * + * \nativedriversdisallowed + * * The function returns all capabilities enabled, whether implemented * in software or in hardware. * @@ -410,14 +426,16 @@ VMK_ReturnStatus vmk_PortUpdateDevCap(vmk_SwitchPortID portID, */ VMK_ReturnStatus vmk_PortQueryDevCap(vmk_SwitchPortID portID, - vmk_uint32 *cap); + vmk_uint64 *cap); /* *********************************************************************** - * vmk_PortGetHwCapSupported -- + * vmk_PortGetHwCapSupported -- */ /** * * \brief Get hardware capabilities supported. * + * \nativedriversdisallowed + * * Retrieve hardware capabilities supported by the device connected to * a switch port. * @@ -439,14 +457,16 @@ VMK_ReturnStatus vmk_PortQueryDevCap(vmk_SwitchPortID portID, */ VMK_ReturnStatus vmk_PortGetHwCapSupported(vmk_SwitchPortID portID, - vmk_uint32 *cap); + vmk_uint64 *cap); /* *********************************************************************** - * vmk_PortUpdateVlan -- */ /** + * vmk_PortUpdateVlan -- */ /** * * \brief Update vlan IDs on the device connected to a switch port. * + * \nativedriversdisallowed + * * This function updates the set of vlan IDs the device will process. * The bitmap, if not NULL, marks permitted vlan IDs on the port. * Packets with non-permitted vlan IDs may be filtered by device. @@ -486,9 +506,11 @@ VMK_ReturnStatus vmk_PortUpdateVlan(vmk_SwitchPortID portID, /* *********************************************************************** - * vmk_PortGetStates -- */ /** + * vmk_PortGetStates -- */ /** * - * \brief Fetch device state of the port. + * \brief Fetch device state of the port. + * + * \nativedriversdisallowed * * \note This API currently only supports ports connected to uplinks * @@ -515,6 +537,8 @@ VMK_ReturnStatus vmk_PortGetStates(vmk_SwitchPortID portID, * * \brief Change device MTU size on the port. * + * \nativedriversdisallowed + * * \note This API currently only supports ports connected to uplinks * * \note The calling thread must not hold any locks or portset handles. @@ -544,6 +568,8 @@ VMK_ReturnStatus vmk_PortSetMTU(vmk_SwitchPortID portID, * * \brief Get device MTU size on the port. * + * \nativedriversdisallowed + * * \note This API currently only supports ports connected to uplinks * * \note The calling thread must hold a mutable handle for the portset @@ -567,9 +593,11 @@ VMK_ReturnStatus vmk_PortGetMTU(vmk_SwitchPortID portID, /* *********************************************************************** * vmk_PortGetDevName -- */ /** - * + * * \brief Get name of the device connected to the switch port. * + * \nativedriversdisallowed + * * \note A buffer of VMK_DEVICE_NAME_MAX_LENGTH or larger ensures that * the name will fit. * @@ -604,6 +632,8 @@ VMK_ReturnStatus vmk_PortGetDevName(vmk_SwitchPortID portID, * * \brief Get virtual MAC address of the port. * + * \nativedriversdisallowed + * * \note This virtual MAC address may differ from device's physical * MAC address. * @@ -631,6 +661,8 @@ VMK_ReturnStatus vmk_PortGetVirtualMACAddr(vmk_SwitchPortID portID, * * \brief Get device statistics on the port. * + * \nativedriversdisallowed + * * The stats on pNICs are maintained by device drivers, and * some drivers only update a subset of stats. Therefore, there is no * guarantee that all counters returned are non-zero. @@ -663,6 +695,8 @@ VMK_ReturnStatus vmk_PortGetDevStats(vmk_SwitchPortID portID, * * \brief Apply a port filter to a port. * + * \nativedriversdisallowed + * * An advertised filter will become part of the rx load balancing * algorithm running in the uplink layer. The nominated "top * performers" filters will be given one of the populated uplink @@ -702,6 +736,8 @@ VMK_ReturnStatus vmk_PortApplyPortFilter(vmk_SwitchPortID portID, * * \brief Remove a port filter from an port. * + * \nativedriversdisallowed + * * The filter won't be part of the rx load balancing algorithm running in * the uplink layer. If a queue was associated to this filter, it will be * released for other filters. @@ -732,6 +768,8 @@ VMK_ReturnStatus vmk_PortRemovePortFilter(vmk_SwitchPortID portID, * * \brief Update the port's dispatch stats. * + * \nativedriversdisallowed + * * In normal configurations this function need not be called by the vds * implementations. This function will be needed in VXLan type of * configuration where vmknic port is used for configuration purpose and @@ -747,12 +785,49 @@ VMK_ReturnStatus vmk_PortRemovePortFilter(vmk_SwitchPortID portID, * * \retval VMK_OK Successfully updated dispatch stats of port. * \retval VMK_BAD_PARAM portID refers invalid Port - * \retval VMK_NOT_FOUND portID is invalid + * \retval VMK_NOT_FOUND portID is invalid *********************************************************************** */ VMK_ReturnStatus vmk_PortUpdateDispatchStats(vmk_SwitchPortID portID, vmk_PktHandle *pkt); +/* + *********************************************************************** + * vmk_PortUpdateDispatchStatsDir -- */ /** + * + * \brief Update the port's dispatch stats. + * + * \nativedriversdisallowed + * + * This function has similar behavior to vmk_PortUpdateDispatchStats(), + * but is preferable in cases where the caller knows the Pkt direction + * because it is more effiecient. + * In normal configurations this function need not be called by the vds + * implementations. This function will be needed in VXLan type of + * configuration where vmknic port is used for configuration purpose and + * its mac address is used to do encapsulation. + * + * \note The calling thread must hold immutable handle for the portset + * associated with the specified VXLAN vmknic port. + * + * \note This function will not block. + * + * \param[in] portID Numeric ID of a virtual port. + * \param[in] pkt Pkt which is being processed. + * \param[in] IsOutbound Indicate the direction in which Pkt is being + * tranmitted. + * VMK_TRUE : Pkt being sent to uplink port + * VMK_FALSE : Pkt being sent to backend port + * + * \retval VMK_OK Successfully updated dispatch stats of port. + * \retval VMK_BAD_PARAM portID refers invalid Port + * \retval VMK_NOT_FOUND portID is invalid + *********************************************************************** + */ +VMK_ReturnStatus vmk_PortUpdateDispatchStatsDir(vmk_SwitchPortID portID, + vmk_PktHandle *pkt, + vmk_Bool IsOutbound); + /* *********************************************************************** @@ -760,6 +835,8 @@ VMK_ReturnStatus vmk_PortUpdateDispatchStats(vmk_SwitchPortID portID, * * \brief Set port's requested Uplink feature. * + * \nativedriversdisallowed + * * Port's requested uplink feature will be used by load balancer * when allocating rx queue. Typically, VDS implmentation will call this * API for vmknic ports. @@ -793,11 +870,13 @@ VMK_ReturnStatus vmk_PortRequestUplinkFeature( * * \brief Clear port's requested Uplink feature. * + * \nativedriversdisallowed + * * With this function, port's already requested uplink features can be * cleared. After port's uplink feauture is cleared, load balancer will * allocate no-feature rx queue when it allocates new rx queue for that * port. - * + * * \note The calling thread must hold a mutable handle for the portset * associated with the specified port. * @@ -824,6 +903,8 @@ VMK_ReturnStatus vmk_PortClearUplinkFeature(vmk_SwitchPortID portID); * * \brief Get port's requested Uplink feature. * + * \nativedriversdisallowed + * * \note The calling thread must hold a mutable handle for the portset * associated with the specified port. * @@ -853,7 +934,9 @@ VMK_ReturnStatus vmk_PortGetUplinkFeature( * * \brief Set port's headroon length. * - * Packets allocated by port clients will have that much headroom + * \nativedriversdisallowed + * + * Packets allocated by port clients will have that much headroom * pre-allocated in the packets. * * \note The calling thread must hold a mutable handle for the portset @@ -881,6 +964,8 @@ VMK_ReturnStatus vmk_PortSetHeadroomLen(vmk_SwitchPortID portID, * * \brief Get port's headroon length. * + * \nativedriversdisallowed + * * \note The calling thread must hold a mutable handle for the portset * associated with the specified port. * @@ -906,6 +991,8 @@ VMK_ReturnStatus vmk_PortGetHeadroomLen(vmk_SwitchPortID portID, * * \brief Notify the change of a port property. * + * \nativedriversdisallowed + * * This function generates an event to notify management software that * the value of a property has been modified by the switch implementation. * It is not required that all runtime property updates need accompanying diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_portset.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_portset.h index 63a64d1..2f03d9c 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_portset.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_portset.h @@ -43,14 +43,11 @@ #include "net/vmkapi_net_uplink.h" #include "net/vmkapi_net_dcb.h" #include "net/vmkapi_net_pt.h" +#include "net/vmkapi_net_queue.h" #include "vds/vmkapi_vds_ether.h" +#include "vds/vmkapi_vds_prop.h" #include "vds/vmkapi_vds_respools.h" -/** - * \brief Identifier for a portset. - */ -typedef struct Portset vmk_Portset; - /** * \brief Query ops to get portset implementation information. */ @@ -191,6 +188,9 @@ typedef enum vmk_PortFilterClass { /** Vlan tag + mac addr filter */ VMK_PORT_FILTER_VLANMACADDR = 0x3, + + /** VXLAN filter */ + VMK_PORT_FILTER_VXLAN = 0x4, } vmk_PortFilterClass; /** @@ -213,6 +213,26 @@ typedef enum vmk_PortFilterProperties { VMK_PORT_FILTER_PROP_MGMT = 0x1, } vmk_PortFilterProperties; +/** + * Port MAC address filter information + */ +typedef vmk_UplinkQueueMACFilterInfo vmk_PortMACFilterInfo; + +/** + * Port VLAN tag filter information + */ +typedef vmk_UplinkQueueVLANFilterInfo vmk_PortVLANFilterInfo; + +/** + * Port VLAN tag + MAC filter information + */ +typedef vmk_UplinkQueueVLANMACFilterInfo vmk_PortVLANMACFilterInfo; + +/** + * Port VXLAN filter information + */ +typedef vmk_UplinkQueueVXLANFilterInfo vmk_PortVXLANFilterInfo; + /** * \brief Filter information advertised by a port. * @@ -228,20 +248,19 @@ typedef struct vmk_PortFilter { /** Filter class */ vmk_PortFilterClass class; - union { - - /** Filter class mac only */ - vmk_uint8 macaddr[6]; - - /** Filter class vlan tag only */ - vmk_uint16 vlan_id; - - /** Filter class vlan tag + mac */ - struct { - vmk_uint8 macaddr[6]; - vmk_uint16 vlan_id; - } vlanmac; - } filter; + /** + * \brief Filter info + * + * Filter information is cast to following structures according to + * class value: + * + * class: filter: + * VMK_PORT_FILTER_MACADDR vmk_PortMACFilterInfo + * VMK_PORT_FILTER_VLAN vmk_PortVLANFilterInfo + * VMK_PORT_FILTER_VLANMACADDR vmk_PortVLANMACFilterInfo + * VMK_PORT_FILTER_VXLAN vmk_PortVXLANFilterInfo + */ + void *filter; /** Filter properties */ vmk_PortFilterProperties prop; @@ -291,8 +310,12 @@ typedef enum vmk_PortUpdateOp { /** port VM UUID update */ VMK_PORT_UPDATE_VMUUID = 5, - /** Port VF update */ + /** Port VF update */ VMK_PORT_UPDATE_VF = 6, + + /** vNic port is quiesced */ + VMK_PORT_UPDATE_QUIESCED = 7, + } vmk_PortUpdateOp; @@ -478,6 +501,19 @@ typedef char vmk_PortClientName[VMK_PORT_CLIENT_NAME_MAX]; */ #define VMK_PORTSET_NAME_MAX (32 * 4) +/** + * \brief Flags for a VDSPortClient + */ +typedef enum { + + /** None */ + VMK_VDS_CLIENT_FLAG_NONE = 0x0, + + /** flags for DVS to push dvs property after port is connected. */ + VMK_VDS_CLIENT_PUSH_AFTER_CONNECT = 0x1, + +} vmk_VDSPortClientFlag; + /* *********************************************************************** * vmk_PortPrivDataDestructor -- */ /** @@ -687,6 +723,8 @@ typedef VMK_ReturnStatus (*vmk_PortsetDeactivate)(vmk_Portset *ps, * * VMK_PORT_UPDATE_VF: data is of (vmk_PortUpdateVFData *) type * + * VMK_PORT_UPDATE_QUIESCED: there is no data + * * \note This callback cannot block. * * \param[in] ps Mutable handle to a portset. @@ -946,6 +984,8 @@ typedef struct vmk_VDSEventEx { * * \brief Acquire a handle to a portset in the requested context. * + * \nativedriversdisallowed + * * A particular thread may hold at most one portset handle. By * extension, this means that a portset implementation may not * re-acquire a portset handle, and may not acquire a new portset handle @@ -995,6 +1035,8 @@ VMK_ReturnStatus vmk_PortsetAcquireByName(const char *psName, * * \brief Acquire a handle to a portset in the requested context. * + * \nativedriversdisallowed + * * A particular thread may hold at most one portset handle. By * extension, this means that a portset implementation may not * re-acquire a portset handle, and may not acquire a new portset handle @@ -1043,6 +1085,8 @@ VMK_ReturnStatus vmk_PortsetAcquireByPortID(vmk_SwitchPortID portID, * * \brief Acquire a handle to a portset in the requested context. * + * \nativedriversdisallowed + * * A particular thread may hold at most one portset handle. By * extension, this means that a portset implementation may not * re-acquire a portset handle, and may not acquire a new portset handle @@ -1091,6 +1135,8 @@ VMK_ReturnStatus vmk_PortsetAcquireByVDSID(const char *vdsID, * * \brief Release a handle to a portset. * + * \nativedriversdisallowed + * * This function should only be called on handles that have been * explicitly acquired via vmk_PortsetAcquire(). * @@ -1115,8 +1161,10 @@ void vmk_PortsetRelease(vmk_Portset **ps); * * \brief Create a resource pool. * + * \nativedriversdisallowed + * * \note This function will not block. - * + * * \param[in] psName Portset name. * \param[in] poolName Pool name. * \param[out] poolID Resource pool identifier @@ -1140,6 +1188,8 @@ VMK_ReturnStatus vmk_PortsetAddResPool(const char *psName, * * \brief Remove a resource pool. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] poolID Resource pool identifier @@ -1159,6 +1209,8 @@ VMK_ReturnStatus vmk_PortsetRemoveResPool(vmk_PortsetResPoolID poolID); * * \brief Retrieve the tag. * + * \nativedriversdisallowed + * * Retrieves the tag of a given resource pool and increment its * associated users reference counter. * @@ -1180,6 +1232,8 @@ vmk_PortsetResPoolTag vmk_PortsetGetResPoolTag(vmk_PortsetResPoolID poolID); * * \brief Release the resource pool. * + * \nativedriversdisallowed + * * Releases the resource pool associated the given tag and decrement * the users reference counter. * @@ -1198,7 +1252,9 @@ VMK_ReturnStatus vmk_PortsetPutResPoolTag(vmk_PortsetResPoolTag poolTag); *********************************************************************** * vmk_PortsetPortApplyResPoolCfg -- */ /** * - * \brief Apply a resource pool configuration to a port. + * \brief Apply a resource pool configuration to a port. + * + * \nativedriversdisallowed * * Old configuraion if existing, is overwritten on success and may be * lost on failure. Values outside the range allowed by system max values @@ -1233,13 +1289,51 @@ VMK_ReturnStatus vmk_PortsetPortApplyResPoolCfg(vmk_SwitchPortID portID, vmk_PortsetResPoolID poolID, vmk_PortsetResPoolCfg *poolCfg); +/* + *********************************************************************** + * vmk_PortsetPortGetResPoolCfg -- */ /** + * + * \brief Get resource pool configuration that was applied on a port + * + * \nativedriversdisallowed + * + * \note Currently only supported on uplink port, future version + * might start supporting it on more port types. + * + * \note The caller must hold a mutable handle for the portset + * associated with the specified port. + * + * \note This function will not block. + * + * \param[in] portID Numeric ID of a virtual port. + * \param[in] poolID Pool ID of the aimed resource pool. + * \param[out] poolCfg Resource pool configuration. + * + * \retval VMK_OK The configuration has been + * applied. + * \retval VMK_NOT_FOUND The resource pool cannot be + * found. + * \retval VMK_NO_MEMORY Allocation failure. + * \retval VMK_BAD_PARAM Input params are not valid. + * \retval VMK_FAILURE Resource pool scheduling not + * activated on the port + * \retval VMK_PORTSET_HANDLE_NOT_MUTABLE The caller did not hold a + * mutable handle + * \retval VMK_NOT_SUPPORTED Port type is not supported. + *********************************************************************** + */ +VMK_ReturnStatus vmk_PortsetPortGetResPoolCfg(vmk_SwitchPortID portID, + vmk_PortsetResPoolID poolID, + vmk_PortsetResPoolCfg *poolCfg); /* *********************************************************************** * vmk_PortsetPortRemoveResPoolCfg -- */ /** * * \brief Remove a resource pool configuration from a port. * + * \nativedriversdisallowed + * * \note Currently only supported on uplink port, future version * might start supporting it on more port types. * @@ -1273,6 +1367,8 @@ VMK_ReturnStatus vmk_PortsetPortRemoveResPoolCfg(vmk_SwitchPortID portID, * * \brief Get resource pool stats. * + * \nativedriversdisallowed + * * \note Currently only supported on uplink port, future version * might start supporting it on more port types. * @@ -1307,6 +1403,8 @@ VMK_ReturnStatus vmk_PortsetPortGetResPoolStats(vmk_SwitchPortID portID, * * \brief Activate resource pools scheduling on portset. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Mutable portset handle. @@ -1330,6 +1428,8 @@ VMK_ReturnStatus vmk_PortsetActivateResPoolsSched(vmk_Portset *ps); * \brief Deactivate resource pools scheduling on portset. Applied * resource pools configuration on the ports won't be persisted. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Mutable portset handle. @@ -1352,6 +1452,8 @@ VMK_ReturnStatus vmk_PortsetDeactivateResPoolsSched(vmk_Portset *ps); * * \brief Activate resource pools scheduling on a port. * + * \nativedriversdisallowed + * * \note Currently only supported on uplink port, future version * might start supporting it on more port types. * @@ -1382,6 +1484,8 @@ VMK_ReturnStatus vmk_PortsetPortActivateResPoolsSched(vmk_SwitchPortID portID); * * \brief Deactivate resource pools. * + * \nativedriversdisallowed + * * This function deactivates resource pools scheduling on a port. * Resource pools configuration on the port won't be persisted. * @@ -1415,8 +1519,10 @@ VMK_ReturnStatus vmk_PortsetPortDeactivateResPoolsSched(vmk_SwitchPortID portID) * * \brief Retrieve the number of ports in a portset. * + * \nativedriversdisallowed + * * \note This function will not block. - * + * * \param[in] ps Handle to a portset * * \retval vmk_uint32 Number of ports in portset, or 0 on @@ -1432,6 +1538,8 @@ vmk_uint32 vmk_PortsetSize(vmk_Portset *ps); * * \brief Send an event to notify the change of a portset property. * + * \nativedriversdisallowed + * * It is not required that all runtime property updates need accompanying * events, the guidelines to generate events should be - * 1) if there is a user visible screen for the property. @@ -1467,6 +1575,8 @@ VMK_ReturnStatus vmk_PortsetNotifyChange (vmk_Portset *ps, * * \brief Retrieve the index of a port in the portset. * + * \nativedriversdisallowed + * * \note The caller must hold a handle for the portset * associated with the specified port. * @@ -1490,6 +1600,8 @@ VMK_ReturnStatus vmk_PortsetPortIndex(vmk_SwitchPortID portID, * * \brief Retrieve the port in the portset given an index * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset. @@ -1513,6 +1625,8 @@ VMK_ReturnStatus vmk_PortsetGetPortFromIndex(vmk_Portset *ps, * * \brief Callback type for function called by vmk_PortsetForAllPorts. * + * \nativedriversdisallowed + * * \note The portset handle is the same one that was passed to * vmk_PortsetForAllPorts(). * @@ -1540,6 +1654,8 @@ typedef VMK_ReturnStatus vmk_PortFunction(vmk_Portset *ps, * * \brief Iterate over all in-use ports. * + * \nativedriversdisallowed + * * This function iterates over all in-use ports on the specified portset, * calling the specified function on each port. * @@ -1570,6 +1686,8 @@ VMK_ReturnStatus vmk_PortsetForAllPorts(vmk_Portset *ps, * * \brief Retrieve the portset name. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset @@ -1586,8 +1704,10 @@ char *vmk_PortsetName(vmk_Portset *ps); * * \brief Set per-portset private data * + * \nativedriversdisallowed + * * Only one private data can be set in each portset. - * + * * Any module using this API must destroy the private data and call * vmk_PortsetPrivDataSet to set portset private data to NULL, if * private data is no longer used (i.e. before setting a new privData, @@ -1616,6 +1736,8 @@ VMK_ReturnStatus vmk_PortsetPrivDataSet(vmk_Portset *ps, void *data); * * \brief Get per-portset private data * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset @@ -1632,8 +1754,10 @@ void *vmk_PortsetPrivDataGet(vmk_Portset *ps); * * \brief Set per-port private data. * + * \nativedriversdisallowed + * * Only one private data can be set on each port. - * + * * This API should be called during port reserve or connect time * (i.e. in portset callbacks). @@ -1676,6 +1800,8 @@ VMK_ReturnStatus vmk_PortPrivDataSet(vmk_SwitchPortID portID, void *data, * * \brief Get per-port private data * + * \nativedriversdisallowed + * * The caller must not cache private data or change its value without * proper synchronization. * @@ -1704,6 +1830,8 @@ VMK_ReturnStatus vmk_PortPrivDataGet(vmk_SwitchPortID portID, * * \brief Setup portset callbacks. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Mutable handle to a portset. @@ -1725,6 +1853,8 @@ VMK_ReturnStatus vmk_PortsetOpsSet(vmk_Portset *ps, * * \brief Register a portset class. * + * \nativedriversdisallowed + * * \note The caller must not hold any locks or portset handles. * * \note This function will not block. @@ -1747,6 +1877,8 @@ VMK_ReturnStatus vmk_PortsetClassRegister(char *psClass, * * \brief Register a portset class. * + * \nativedriversdisallowed + * * \note The caller must not hold any locks or portset handles. * * \note This function will not block. @@ -1766,10 +1898,12 @@ VMK_ReturnStatus vmk_PortsetClassUnregister(char *psClass); * * \brief Send a list of packets out of a port. * + * \nativedriversdisallowed + * * This function can be used when a portset sends packets to a port - * for transmission. This function is intended for internal use by - * portset only. Other clients within VMkernel have to use - * vmk_PortInput() to inject packets and it is the portsets' + * for transmission. This function is intended for internal use by + * portset only. Other clients within VMkernel have to use + * vmk_PortInput() to inject packets and it is the portsets' * responsibility to decide on which port packets will be sent out of. * * The VMkernel may apply further processing on packets (e.g. DVFilters) @@ -1822,6 +1956,8 @@ VMK_ReturnStatus vmk_PortOutput(vmk_SwitchPortID portID, * * \brief Send a list of packets into a port. * + * \nativedriversdisallowed + * * The input is from the portset's pespective. The function is used when * port client sends packets to portset. The packet list will be emptied * on success or failure. @@ -1852,6 +1988,8 @@ VMK_ReturnStatus vmk_PortInput(vmk_SwitchPortID portID, * * \brief Update ethernet frame routing policy. * + * \nativedriversdisallowed + * * This function may be used on ports that were created through the * vmk_PortsetConnectPort() API. It is used to inform the portset * implementation about the kind of ethernet packets, as specified in @@ -1884,6 +2022,8 @@ VMK_ReturnStatus vmk_PortUpdateEthFRP(vmk_SwitchPortID portID, * * \brief Query the VM UUID of the VM the port is attached to. * + * \nativedriversdisallowed + * * \note Please call vmk_VMUUIDGetMaxLength() to size the buffer * appropriately. * @@ -1921,6 +2061,8 @@ VMK_ReturnStatus vmk_PortGetVMUUID(vmk_SwitchPortID portID, * * \brief Claim hidden uplink devices. * + * \nativedriversdisallowed + * * Hidden uplink devices are uplink devices used by portset implementation * to perform I/O, but are not visible to management plane. * @@ -1928,7 +2070,7 @@ VMK_ReturnStatus vmk_PortGetVMUUID(vmk_SwitchPortID portID, * Vmkernel assumes that only one portset instance will claim hidden * uplinks. * - * \note Only hidden devices with VMK_UPLINK_CAP_UPT capability are + * \note Only hidden devices with VMK_PORT_CLIENT_CAP_UPT capability are * allowed to be claimed. This API is only for certain devices * that expose hidden uplinks to vmkernel. Regular * uplinks must be connected through the management. @@ -1956,16 +2098,44 @@ VMK_ReturnStatus vmk_PortGetVMUUID(vmk_SwitchPortID portID, VMK_ReturnStatus vmk_PortsetClaimHiddenUplink(vmk_Portset *ps, vmk_uint32 uplinkCap); +/* + *********************************************************************** + * vmk_PortIsHiddenUplink -- */ /** + * + * \brief Check if a port is connected to a Hidden Uplink. + * + * \nativedriversdisallowed + * + * \note The caller must hold a handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \param[in] portID Port identifier + * \param[out] isHiddenUplink VMK_TRUE if this is a hidden uplink, + * otherwise VMK_FALSE. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM isHiddenUplink is NULL. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + * ********************************************************************* + */ +VMK_ReturnStatus vmk_PortIsHiddenUplink(vmk_SwitchPortID portID, + vmk_Bool *isHiddenUplink); + /* *********************************************************************** * vmk_PortsetFindUplinkPort -- */ /** * * \brief Find the first connected uplink port. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset - * \param[out] portID Numeric port ID of the uplink port. + * \param[out] portID Numeric port ID of the uplink port. * * \retval VMK_OK Success. * \retval VMK_NOT_FOUND No connected team uplink port. @@ -1983,6 +2153,8 @@ VMK_ReturnStatus vmk_PortsetFindUplinkPort(vmk_Portset *ps, * * \brief Get all uplinks connected to a portset * + * \nativedriversdisallowed + * * \note This function will not block. * * \note The caller should hold at least an immutable portset handle @@ -2014,6 +2186,8 @@ VMK_ReturnStatus vmk_PortsetGetUplinks(vmk_Portset *ps, * * \brief Reserve an internal management port. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Mutable handle to a portset @@ -2033,6 +2207,8 @@ VMK_ReturnStatus vmk_PortsetReserveMgmtPort(vmk_Portset *ps); * * \brief Retrieve the management port on a portset * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset. @@ -2056,6 +2232,8 @@ VMK_ReturnStatus vmk_PortsetGetMgmtPort(vmk_Portset *ps, * * \brief Callback that is invoked upon reception of packets on a port. * + * \nativedriversdisallowed + * * The callback is free to perform any modification to the passed in * pktList and the packets contained within it. * @@ -2084,10 +2262,12 @@ typedef VMK_ReturnStatus (*vmk_PortsetPortRxFunc)(vmk_Portset *ps, * * \brief Connect a port to the given portset and enable the port. * + * \nativedriversdisallowed + * * The port starts enabled, but possibly blocked by the portset. The - * portset is free to block the port at any time. The portset is + * portset is free to block the port at any time. The portset is * expected to honor the ports configuration and forward frames that - * match the Frame Routing Policy (FRP) of the port. However, the + * match the Frame Routing Policy (FRP) of the port. However, the * portset MAY choose to not honor it to satisfy stricter security * policies. In the desire to improve interoperability, portsets * MUST offer a way to turn off such a stricter security policies. @@ -2143,10 +2323,12 @@ VMK_ReturnStatus vmk_PortsetConnectPort(vmk_Portset *ps, /* *********************************************************************** - * vmk_PortsetDisconnectPort -- */ /** + * vmk_PortsetDisconnectPort -- */ /** * * \brief Disonnect a port to the given portset. * + * \nativedriversdisallowed + * * This function may be used on ports that were created through the * vmk_PortsetConnectPort() API. It's typically called at VDS destroy time. * @@ -2171,6 +2353,8 @@ VMK_ReturnStatus vmk_PortsetDisconnectPort(vmk_SwitchPortID portID); * * \brief Get whether system service accounting is active. * + * \nativedriversdisallowed + * * \note This function will not block. * * \retval VMK_TRUE system service accounting is active @@ -2186,6 +2370,8 @@ vmk_Bool vmk_PortsetSchedSamplingActive(void); * * \brief Set the current port that is billed for Rx processing. * + * \nativedriversdisallowed + * * In order for Rx packet processing to be accounted properly, the portset * implementation must use this API to notify the scheduling subsystem * which port to bill for all the Rx processing. @@ -2224,6 +2410,8 @@ VMK_ReturnStatus vmk_PortsetSchedBillToPort(vmk_SwitchPortID portID, * * \brief Disallow I/O traffic through a port. * + * \nativedriversdisallowed + * * Portset implementations call this interface to stop traffic. * * \param[in] portID Numeric ID of a virtual port @@ -2249,6 +2437,8 @@ VMK_ReturnStatus vmk_PortBlock(vmk_SwitchPortID portID); * * \brief Allow I/O traffic through a port. * + * \nativedriversdisallowed + * * A port always starts blocked following portset creation. * Portset implementations call this interface when ready to * accept traffic. This applies to uplink ports as well as ports @@ -2277,6 +2467,8 @@ VMK_ReturnStatus vmk_PortUnblock(vmk_SwitchPortID portID); * * \brief Retrieve ethernet frame routing policy on a port. * + * \nativedriversdisallowed + * * \note The caller must hold a handle for the portset * associated with the specified portID. * @@ -2300,6 +2492,8 @@ VMK_ReturnStatus vmk_PortGetFRP(vmk_SwitchPortID portID, * * \brief Check if a port permit outgoing traffic. * + * \nativedriversdisallowed + * * \note The caller must hold a handle for the portset * associated with the specified portID. * @@ -2322,6 +2516,8 @@ VMK_ReturnStatus vmk_PortIsOutputActive(vmk_SwitchPortID portID, * * \brief Check if a port is connected to an uplink. * + * \nativedriversdisallowed + * * \note The caller must hold a handle for the portset * associated with the specified portID. * @@ -2347,6 +2543,8 @@ VMK_ReturnStatus vmk_PortIsUplink(vmk_SwitchPortID portID, * * \brief Get the underlying uplink of a port. * + * \nativedriversdisallowed + * * \note The caller must hold a mutable handle for the portset * associated with the specified portID. * @@ -2371,6 +2569,8 @@ VMK_ReturnStatus vmk_PortGetUplink(vmk_SwitchPortID portID, * * \brief Set link status of vNic connected to a port. * + * \nativedriversdisallowed + * * vNetwork admin may disable/enable a virtual port. When this * happens, the portset implementation calls this interface to * notify guest vNic that link is down and I/O traffic is no @@ -2400,6 +2600,8 @@ VMK_ReturnStatus vmk_PortLinkStatusSet(vmk_SwitchPortID portID, * * \brief Get name of the client connected to the port. * + * \nativedriversdisallowed + * * The client name string should be used for display and debugging * purposes only; it should not be parsed. The string is valid for the * lifetime of the ephemeral port. @@ -2433,6 +2635,8 @@ VMK_ReturnStatus vmk_PortClientNameGet(vmk_SwitchPortID portID, * * \brief Get fixed mac address of the client connected to the port. * + * \nativedriversdisallowed + * * Called from portset implementation to get VM's mac address assigned * by vSphere admin. The returned information is owned by framework * and remains valid while the port is connected. The VM cannot change @@ -2582,6 +2786,8 @@ typedef struct vmk_VDSPortsetClientOps { * * \brief Register VDS Portset property handlers. * + * \nativedriversdisallowed + * * \note At most one client may be registered for a given property (data * name) on a given portset * @@ -2625,6 +2831,8 @@ VMK_ReturnStatus vmk_VDSClientPortsetRegister(vmk_VDSPortsetClient *client, * * \brief Unregister VDS Portset property handlers. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] client Handle for VDS Portset Client @@ -2646,7 +2854,7 @@ typedef struct VDSPortClient *vmk_VDSPortClient; /* *********************************************************************** - * vmk_VDSPortClientWrite -- */ /** + * vmk_VDSClientPortWrite -- */ /** * * \brief Write callback for a port property of a VDS client. * @@ -2797,6 +3005,8 @@ typedef struct vmk_VDSPortClientOps { * * \brief Register Port Operations for a VDS Client. * + * \nativedriversdisallowed + * * \note At most one client may be registered for a given property * (data name) on a specified port and portset. * @@ -2821,6 +3031,30 @@ VMK_ReturnStatus vmk_VDSClientPortRegister(vmk_VDSPortClient *client, const char *dataName, const vmk_VDSPortClientOps *ops); +/* + *********************************************************************** + * vmk_VDSPortClientSetFlag -- */ /** + * + * \brief Set the flag for a DVSPortClient. + * + * \nativedriversdisallowed + * + * \note For now, a client can set a flag to indicate whether the client + * want the property to be pushed after the port is connected. + * + * \note This function will not block. + * + * \param[in] client The pointer which points to the handle for + * the VDS Port Client. + * \param[in] flag flag to be set. + * + * \retval VMK_OK Set successfully + * \retval VMK_BAD_PARAM invalid parameters passed + *********************************************************************** + */ + +VMK_ReturnStatus vmk_VDSPortClientSetFlag(vmk_VDSPortClient client, + vmk_VDSPortClientFlag flag); /* *********************************************************************** @@ -2828,6 +3062,8 @@ VMK_ReturnStatus vmk_VDSClientPortRegister(vmk_VDSPortClient *client, * * \brief Unregister a VDS Port Client. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] client Handle for VDS Port Client @@ -2845,6 +3081,8 @@ VMK_ReturnStatus vmk_VDSClientPortUnregister(vmk_VDSPortClient client); * * \brief Lookup a host property by name. * + * \nativedriversdisallowed + * * \note The caller must not hold any locks or portset handles. * * \note This function may block. @@ -2875,6 +3113,8 @@ VMK_ReturnStatus vmk_VDSHostPropLookup(const char *psName, * * \brief Set a host property (name, value) pair. * + * \nativedriversdisallowed + * * The property value to be set must not be NULL; dataLength should * not be zero; dataName should not be empty. To clean up property * value, use vmk_VDSHostPropClear. @@ -2910,61 +3150,65 @@ VMK_ReturnStatus vmk_VDSHostPropSet(const char *psName, vmk_uint32 dataLength); /* -*********************************************************************** -* vmk_VDSHostPropClear -- */ /** -* -* \brief Clear host property with specified data name -* -* \note This operation will call the VDS portset client's -* vmk_VDSPortsetClientClear() callback to clear the value of the -* property. If succeeds, the portset client for this property -* will be removed. -* -* \note The caller must not hold any locks or portset handles. -* -* \note This function may block. -* -* \param[in] psName Portset name. -* \param[in] dataName Name of the data item to clear -* -* \retval VMK_OK Success; the host property with dataName -* has been cleared -* \retval VMK_NOT_FOUND The switch or named data cannot be found. -* \retval VMK_BAD_PARAM The provided psName or dataName is -* invalid -*********************************************************************** -*/ + *********************************************************************** + * vmk_VDSHostPropClear -- */ /** + * + * \brief Clear host property with specified data name + * + * \nativedriversdisallowed + * + * \note This operation will call the VDS portset client's + * vmk_VDSPortsetClientClear() callback to clear the value of the + * property. If succeeds, the portset client for this property + * will be removed. + * + * \note The caller must not hold any locks or portset handles. + * + * \note This function may block. + * + * \param[in] psName Portset name. + * \param[in] dataName Name of the data item to clear + * + * \retval VMK_OK Success; the host property with dataName + * has been cleared + * \retval VMK_NOT_FOUND The switch or named data cannot be found. + * \retval VMK_BAD_PARAM The provided psName or dataName is + * invalid + *********************************************************************** + */ VMK_ReturnStatus vmk_VDSHostPropClear(const char *psName, const char *dataName); /* -*********************************************************************** -* vmk_VDSHostStatusSet -- *//** -* -* \brief Set VDS host status and display string. -* -* The display string will be copied inside the function, and the -* copied string will be propogated to Virtual Center in events. -* -* \note The caller must not hold any locks or portset handles. -* -* \note This function may block. -* -* \param[in] psName Portset name. -* \param[in] vdsStatus VDS Host status to be set -* \param[in] displayStr Detailed status string less than -* 256 characters -* -* \retval VMK_OK Success; the host status has been updated -* \retval VMK_NOT_FOUND VDS is not found -* \retval VMK_NAME_TOO_LONG displayStr is longer than 256 characters -* \retval VMK_FAILURE Failure; host status has not been updated -* \retval VMK_NO_MEMORY No memory -* \retval VMK_BAD_PARAM The provided psName or displayStr is -* invalid -*********************************************************************** -*/ + *********************************************************************** + * vmk_VDSHostStatusSet -- *//** + * + * \brief Set VDS host status and display string. + * + * \nativedriversdisallowed + * + * The display string will be copied inside the function, and the + * copied string will be propogated to Virtual Center in events. + * + * \note The caller must not hold any locks or portset handles. + * + * \note This function may block. + * + * \param[in] psName Portset name. + * \param[in] vdsStatus VDS Host status to be set + * \param[in] displayStr Detailed status string less than + * 256 characters + * + * \retval VMK_OK Success; the host status has been updated + * \retval VMK_NOT_FOUND VDS is not found + * \retval VMK_NAME_TOO_LONG displayStr is longer than 256 characters + * \retval VMK_FAILURE Failure; host status has not been updated + * \retval VMK_NO_MEMORY No memory + * \retval VMK_BAD_PARAM The provided psName or displayStr is + * invalid + *********************************************************************** + */ VMK_ReturnStatus vmk_VDSHostStatusSet(const char *psName, vmk_VDSHostStatus vdsStatus, const char *displayStr); @@ -2976,16 +3220,19 @@ VMK_ReturnStatus vmk_VDSHostStatusSet(const char *psName, * * \brief Get the value part of a specified port data (name, value) pair. * - * This operation will call the VDS Port Client's - * vmk_VDSClientPortPoll() callback to find out if there - * is new data to be read. If so, the client's - * vmk_VDSClientPortRead() callback will be called to - * obtain the new data. This new data will also be - * saved in a cache. If the poll operation reports - * that new data is not available, then the previously - * cached value will be returned. + * \nativedriversdisallowed * - * \note The caller must not hold any locks or portset handles. + * This operation will call the VDS Port Client's + * vmk_VDSClientPortPoll() callback to find out if there is new data to + * be read. If so, the client's vmk_VDSClientPortRead() callback will + * be called to obtain the new data. This new data will also be saved + * in a cache. If the poll operation reports that new data is not + * available, then the previously cached value will be returned. + * + * \note The caller must hold a mutable handle for the portset. + * + * \note Port data returned can be used safely only when mutable portset + * handle is held by caller. * * \note This function may block. * @@ -3020,13 +3267,15 @@ VMK_ReturnStatus vmk_VDSPortDataGet(vmk_SwitchPortID portID, * * \brief Set a port data (name, value) pair. * + * \nativedriversdisallowed + * * This operation will call the VDS Port Client's * vmk_VDSClientPortWrite() callback to set the value * of the property. If this succeeds, the value written * will also be saved in the cache. See the description * of vmk_VDSPortDataGet() and vmk_VDSPortDataClear(). * - * \note The caller must not hold any locks or portset handles. + * \note The caller must hold a mutable handle for the portset. * * \note This function may block. * @@ -3054,32 +3303,34 @@ VMK_ReturnStatus vmk_VDSPortDataSet(vmk_SwitchPortID portID, vmk_uint32 dataLength); /* -*********************************************************************** -* vmk_VDSPortDataClear -- */ /** -* -* \brief Set a port data (name, value) pair. -* -* This operation will call the VDS Port Client's -* vmk_VDSClientPortCleanup() callback to clean up the property. -* If this succeeds, the property data will be removed from cache, -* and port client will also be removed. -* -* \note The caller must not hold any locks or portset handles. -* -* \note This function may block. -* -* \param[in] portID Numeric ID of a virtual port. -* \param[in] dataName Name of port data -* -* \retval VMK_OK Success -* \retval VMK_BAD_PARAM The provided dataName is invalid -* \retval VMK_NOT_FOUND The specified port or named data cannot -* be found. -* \retval VMK_FAILURE vmk_VDSClientPortCleanup callback returns -* failure or other failure conditions -* \retval Other status vmk_VDSClientPortCleanup callback failed -*********************************************************************** -*/ + *********************************************************************** + * vmk_VDSPortDataClear -- */ /** + * + * \brief Set a port data (name, value) pair. + * + * \nativedriversdisallowed + * + * This operation will call the VDS Port Client's + * vmk_VDSClientPortCleanup() callback to clean up the property. + * If this succeeds, the property data will be removed from cache, + * and port client will also be removed. + * + * \note The caller must hold a mutable handle for the portset. + * + * \note This function may block. + * + * \param[in] portID Numeric ID of a virtual port. + * \param[in] dataName Name of port data + * + * \retval VMK_OK Success + * \retval VMK_BAD_PARAM The provided dataName is invalid + * \retval VMK_NOT_FOUND The specified port or named data cannot + * be found. + * \retval VMK_FAILURE vmk_VDSClientPortCleanup callback returns + * failure or other failure conditions + * \retval Other status vmk_VDSClientPortCleanup callback failed + *********************************************************************** + */ VMK_ReturnStatus vmk_VDSPortDataClear(vmk_SwitchPortID portID, const char *dataName); @@ -3089,6 +3340,8 @@ VMK_ReturnStatus vmk_VDSPortDataClear(vmk_SwitchPortID portID, * * \brief Set port data in vDS host local cache. * + * \nativedriversdisallowed + * * This API should be called during port reserve or connect * time (i.e. in portset callbacks) in order to seed port property * value. @@ -3129,6 +3382,8 @@ VMK_ReturnStatus vmk_VDSLocalCachePortDataSet(vmk_SwitchPortID portID, * * \brief Get port data value from vDS host local cache. * + * \nativedriversdisallowed + * * \note This operation will not call property client (i.e. * vmk_VDSClientPortRead()). * @@ -3159,10 +3414,12 @@ VMK_ReturnStatus vmk_VDSLocalCachePortDataGet(vmk_SwitchPortID portID, /* *********************************************************************** - * vmk_PortLookupVDSPortAlias -- *//** + * vmk_PortLookupVDSPortAlias -- */ /** * * \brief Retrieves the vDS port alias for the specified ephemeral port. * + * \nativedriversdisallowed + * * \note The port alias string is constant for the lifetime of the * ephemeral port. * @@ -3197,10 +3454,12 @@ VMK_ReturnStatus vmk_PortLookupVDSPortAlias(vmk_SwitchPortID portID, /* *********************************************************************** - * vmk_PortLookupVDSPortID -- *//** + * vmk_PortLookupVDSPortID -- */ /** * * \brief Retrieves the vDS port ID for the specified ephemeral port. * + * \nativedriversdisallowed + * * \note The port ID string is constant for the lifetime of the * ephemeral port. * @@ -3231,10 +3490,12 @@ VMK_ReturnStatus vmk_PortLookupVDSPortID(vmk_SwitchPortID portID, /* *********************************************************************** - * vmk_PortsetLookupVDSID -- *//** + * vmk_PortsetLookupVDSID -- */ /** * * \brief Retrieves the vDS switch ID for the specified portset. * + * \nativedriversdisallowed + * * \note The vDS switch ID is constant for the lifetime of the portset. * * \note The caller must provide a buffer that is VMK_VDS_ID_MAX_LEN @@ -3259,10 +3520,12 @@ VMK_ReturnStatus vmk_PortsetLookupVDSID(vmk_Portset *ps, /* *********************************************************************** - * vmk_PortsetLookupVDSName -- *//** + * vmk_PortsetLookupVDSName -- */ /** * * \brief Retrieves the vDS switch name for the specified portset. * + * \nativedriversdisallowed + * * \note The vDS switch name is constant for the lifetime of the * portset. * @@ -3294,10 +3557,12 @@ VMK_ReturnStatus vmk_PortsetLookupVDSName(vmk_Portset *ps, /* *********************************************************************** - * vmk_PortsetLookupVDSClassName -- *//** + * vmk_PortsetLookupVDSClassName -- */ /** * * \brief Retrieves the vDS switch class name for the specified portset. * + * \nativedriversdisallowed + * * \note The vDS class name is constant for the lifetime of the portset. * * \note The caller provide a buffer that is VMK_VDS_CLASS_NAME_MAX_LEN @@ -3325,10 +3590,12 @@ VMK_ReturnStatus vmk_PortsetLookupVDSClassName(vmk_Portset *ps, /* *********************************************************************** - * vmk_PortFindByVDSPortID -- *//** + * vmk_PortFindByVDSPortID -- */ /** * * \brief Retrieves the numeric port identifier for the ephemeral port. * + * \nativedriversdisallowed + * * \note The caller must not hold any locks or portset handles. * * \note The function will not block. @@ -3353,10 +3620,12 @@ VMK_ReturnStatus vmk_PortFindByVDSPortID(const char *vdsID, /* *********************************************************************** - * vmk_PortsetFindByVDSID -- *//** + * vmk_PortsetFindByVDSID -- */ /** * * \brief Retrieves the name of the portset. * + * \nativedriversdisallowed + * * \note The caller must provide a buffer that is VMK_PORTSET_NAME_MAX * bytes in length. * @@ -3384,6 +3653,8 @@ VMK_ReturnStatus vmk_PortsetFindByVDSID(const char *vdsID, * * \brief Check DCB support on the device connected to a vDS port. * + * \nativedriversdisallowed + * * \note This function may block. No locks should be held while calling * this function. * @@ -3413,6 +3684,8 @@ VMK_ReturnStatus vmk_PortDCBIsDCBEnabled(vmk_SwitchPortID portID, * * \brief Get Traffic Classes from the device connected to a vDS port. * + * \nativedriversdisallowed + * * \note This function may block. No locks should be held while calling * this function. * @@ -3439,6 +3712,8 @@ VMK_ReturnStatus vmk_PortDCBGetNumTCs(vmk_SwitchPortID portID, * * \brief Get DCB Priority Group from the device connected to a vDS port. * + * \nativedriversdisallowed + * * \note This function may block. No locks should be held while calling * this function. * \note Currently only supported on uplink port. @@ -3464,6 +3739,8 @@ VMK_ReturnStatus vmk_PortDCBGetPriorityGroup(vmk_SwitchPortID portID, * * \brief Retrieve Priority-based Flow Control configurations. * + * \nativedriversdisallowed + * * Get Priority-based Flow Control configurations from the device connected * to a vDS port. * @@ -3495,6 +3772,8 @@ VMK_ReturnStatus vmk_PortDCBGetPFCCfg(vmk_SwitchPortID portID, * * \brief Check if Priority-based Flow Control support is enabled. * + * \nativedriversdisallowed + * * \note This function may block. No locks should be held while calling * this function. * @@ -3521,6 +3800,8 @@ VMK_ReturnStatus vmk_PortDCBIsPFCEnabled(vmk_SwitchPortID portID, * * \brief Retrieve all DCB Application Protocols settings. * + * \nativedriversdisallowed + * * Get DCB Application Protocol settings from the device connected * to a vDS port. * @@ -3551,6 +3832,8 @@ VMK_ReturnStatus vmk_PortDCBGetApplications(vmk_SwitchPortID portID, * * \brief Retrieve DCB capabilities information. * + * \nativedriversdisallowed + * * Get DCB capabilities from the device connected to a vDS port. * * \note This function may block. No locks should be held while calling @@ -3579,6 +3862,8 @@ VMK_ReturnStatus vmk_PortDCBGetCapabilities(vmk_SwitchPortID portID, * * \brief Register vDS command execution handler. * + * \nativedriversdisallowed + * * \note At most one client may be registered for a given command name. * * This operation allows a module to register a command callback into vDS. @@ -3614,6 +3899,8 @@ VMK_ReturnStatus vmk_VDSClientCmdRegister(vmk_VDSCmdClient *client, * * \brief Unregister vDS Command handler. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] client Handle for vDS Command Client @@ -3636,6 +3923,8 @@ VMK_ReturnStatus vmk_VDSClientCmdUnregister(vmk_VDSCmdClient client); * will be displayed by vCenter if the relevant event description * file is registered via the VIM API. * + * \nativedriversdisallowed + * * \note The caller must hold an immutable handle for the portset. * * \note Modules should control the rate of event posting to avoid @@ -3676,6 +3965,8 @@ VMK_ReturnStatus vmk_VDSEventExPost(vmk_Portset *ps, * will be displayed by vCenter if the relevant event description * file is registered via the VIM API. * + * \nativedriversdisallowed + * * \note The caller must hold an immutable handle for the portset * that the port is connected to. * diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_prop.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_prop.h index d395774..94148ed 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_prop.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_prop.h @@ -152,6 +152,8 @@ #define VMK_VDSPROP_PORT_STATISTICS "com.vmware.common.port.statistics" #define VMK_VDSPROP_PORT_ALIAS "com.vmware.common.port.alias" #define VMK_VDSPROP_PORT_CONNECTID "com.vmware.common.port.connectid" +#define VMK_VDSPROP_PORT_VNIC_CONNECTEE "com.vmware.common.port.vnicConnectee" +#define VMK_VDSPROP_PORT_VMKNIC_VLANID "com.vmware.common.port.vmknicVlanID" #define VMK_VDSPROP_PORT_PORTGROUP "com.vmware.common.port.portgroupid" #define VMK_VDSPROP_PORT_BLOCK "com.vmware.common.port.block" #define VMK_VDSPROP_PORT_LINK_STATUS "com.vmware.common.port.linkstatus" diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_respools.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_respools.h index b2f28d1..d332521 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_respools.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vds/vmkapi_vds_respools.h @@ -73,6 +73,15 @@ typedef vmk_int32 vmk_PortsetResPoolLimit; */ typedef vmk_int32 vmk_PortsetResPoolQueueDepth; +/** + * \brief Reservation associated to a resource pool. + * + * This Reservation, expressed in Mbps, represents the minimum + * capacity reserved for a given resource pool for packets queuing + * purposes. + */ +typedef vmk_int32 vmk_PortsetResPoolReservation; + /** * \brief 802.1p Priority tag associated to a resource pool. * @@ -117,6 +126,8 @@ typedef struct vmk_PortsetResPoolCfg { vmk_PortsetResPoolShares shares; /** Limit */ vmk_PortsetResPoolLimit limit; + /** Reservation */ + vmk_PortsetResPoolReservation reservation; /** 802.1p Priotiy */ vmk_PortsetResPoolPriorityTag pTag; /** Buffer depth */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vmkapi.h b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vmkapi.h index 69002ce..aded762 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vmkapi.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release/vmkapi.h @@ -19,19 +19,6 @@ extern "C" { /** \cond never */ -/* - * Basic include checks - */ -#define INCLUDE_ALLOW_VMKERNEL -#define INCLUDE_ALLOW_VMK_MODULE -#define INCLUDE_ALLOW_DISTRIBUTE -#define INCLUDE_ALLOW_MODULE -#define INCLUDE_ALLOW_VMKDRIVERS -#define INCLUDE_ALLOW_VMCORE - -#define INCLUDE_ALLOW_USERLEVEL -#include "includeCheck.h" - /* * Determine if we're compiling in user mode or kernel mode */ @@ -63,10 +50,12 @@ extern "C" { #define VMK_DEVKIT_HAS_API_VMKAPI_NMP #define VMK_DEVKIT_HAS_API_VMKAPI_NPIV #define VMK_DEVKIT_HAS_API_VMKAPI_VDS +#define VMK_DEVKIT_HAS_API_VMKAPI_VFLASH #define VMK_DEVKIT_HAS_API_VMKAPI_EXPERIMENTAL #define VMK_DEVKIT_USES_PUBLIC_APIS #define VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS #define VMK_DEVKIT_USES_PRIVATE_APIS +#define VMK_DEVKIT_USES_DEPRECATED_APIS /* plus other (e.g. binary-incompatible) vmkapis */ #ifdef VMK_ENABLE_ALL_VMKAPIS #define VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS @@ -74,6 +63,16 @@ extern "C" { #endif #endif + +#ifdef VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS +#pragma message "WARNING: VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS enabled. The resulting binary will not be compatible with future vSphere versions!" +#endif + +#ifdef VMK_DEVKIT_USES_DEPRECATED_APIS +#pragma message "WARNING: VMK_DEVKIT_USES_DEPRECATED_APIS enabled. This module is using deprecated interfaces that may be removed in future API releases!" +#endif + + /* * Allow vmkapi headers to be included when pulled in from * this header only. All other cases should cause an error. @@ -110,14 +109,20 @@ extern "C" { #include "base/vmkapi_module_types.h" #include "base/vmkapi_assert.h" #include "lib/vmkapi_list.h" +#include "lib/vmkapi_name.h" +#include "base/vmkapi_mgmt_types.h" +#endif + +#if defined(VMK_BUILDING_FOR_USER_MODE) +#include "base/vmkapi_mgmt_lib.h" #endif #if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "core/vmkapi_cpu.h" #include "platform/vmkapi_platform.h" #include "platform/x86/vmkapi_pagetable.h" #include "lib/vmkapi_lib.h" #include "lib/vmkapi_bits.h" -#include "lib/vmkapi_name.h" #include "lib/vmkapi_libc.h" #include "core/vmkapi_memdefs.h" #include "lib/vmkapi_parse.h" @@ -125,9 +130,7 @@ extern "C" { #include "lib/vmkapi_slist.h" #include "lib/vmkapi_cslist.h" #include "lib/vmkapi_string.h" -#include "core/vmkapi_bus.h" -#include "core/vmkapi_device.h" -#include "core/vmkapi_driver.h" +#include "core/vmkapi_device_types.h" #include "platform/x86/vmkapi_ioport_types.h" #include "platform/x86/vmkapi_ioresource.h" #include "platform/x86/vmkapi_ioport.h" @@ -136,20 +139,24 @@ extern "C" { #include "core/vmkapi_mapping.h" #include "core/vmkapi_mempool.h" #include "base/vmkapi_heap.h" +#include "core/vmkapi_bus.h" +#include "core/vmkapi_device.h" +#include "core/vmkapi_driver.h" +#include "core/vmkapi_logical_bus.h" #include "core/vmkapi_scatter_gather.h" #include "core/vmkapi_dma.h" -#include "core/vmkapi_user.h" #include "core/vmkapi_lock_domain.h" #include "core/vmkapi_spinlock.h" #include "base/vmkapi_platform.h" #include "base/vmkapi_atomic.h" +#include "base/vmkapi_versioned_atomic.h" #include "base/vmkapi_world.h" +#include "core/vmkapi_user.h" #include "core/vmkapi_accounting.h" #include "base/vmkapi_char.h" #include "base/vmkapi_config.h" #include "base/vmkapi_helper.h" #include "base/vmkapi_logging.h" -#include "core/vmkapi_cpu.h" #include "core/vmkapi_pcpustorage.h" #include "base/vmkapi_sem.h" #include "base/vmkapi_slab.h" @@ -157,13 +164,33 @@ extern "C" { #include "base/vmkapi_system.h" #include "base/vmkapi_time.h" #include "base/vmkapi_module.h" +#include "base/vmkapi_mgmt.h" #include "core/vmkapi_worldstorage.h" #include "system_health/vmkapi_system_health.h" #include "system_health/vmkapi_vob.h" #include "core/vmkapi_vmuuid.h" #include "lib/vmkapi_hash.h" -#endif +#include "lib/vmkapi_priq.h" +#include "core/vmkapi_dump.h" +#include "core/vmkapi_pageslab.h" +#include "lib/vmkapi_bitvector.h" +#if !defined(VMK_DEVKIT_HAS_NATIVE_DDK) +#include "base/vmkapi_char_legacy.h" +#endif + +#endif +#endif + +#if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ + defined(VMK_DEVKIT_USES_DEPRECATED_APIS) + +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) + +#include "core/vmkapi_spinlock_deprecated.h" +#include "base/vmkapi_world_deprecated.h" + +#endif #endif @@ -171,27 +198,33 @@ extern "C" { defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) + +#include "base/vmkapi_module_incompat.h" +#include "platform/vmkapi_platform_incompat.h" + +#if !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #include "base/vmkapi_lock.h" #include "core/vmkapi_bh.h" +#include "core/vmkapi_bus_incompat.h" #include "core/vmkapi_context_incompat.h" #include "core/vmkapi_cpu_incompat.h" #include "core/vmkapi_dma_incompat.h" #include "base/vmkapi_worldlet.h" #include "base/vmkapi_entropy.h" #include "base/vmkapi_proc.h" -#include "base/vmkapi_module_incompat.h" #include "base/vmkapi_time_incompat.h" #include "core/vmkapi_affinitymask_incompat.h" #include "base/vmkapi_world_incompat.h" #include "base/vmkapi_heap_incompat.h" -#include "core/vmkapi_user_incompat.h" +#include "core/vmkapi_pageslab_incompat.h" +#include "core/vmkapi_preempt_incompat.h" +#endif #endif #endif #if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) && \ - !defined(VMK_DEVKIT_HAS_NATIVE_DDK) + defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "core/vmkapi_nmi.h" @@ -199,6 +232,15 @@ extern "C" { #endif +#if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "core/vmkapi_device_incompat.h" +#endif + +#endif + #endif /* @@ -214,42 +256,29 @@ extern "C" { #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "device/vmkapi_pci_types.h" #include "device/vmkapi_vector_types.h" +#include "device/vmkapi_psa_types.h" +#include "device/vmkapi_pci.h" +#include "device/vmkapi_vector.h" #endif #endif #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "device/vmkapi_acpi.h" #include "device/vmkapi_isa.h" #include "device/vmkapi_input.h" -#include "device/vmkapi_pci.h" -#include "device/vmkapi_vector.h" +#include "device/vmkapi_pci_incompat.h" +#include "device/vmkapi_vector_incompat.h" #endif #endif #endif -/* - * Native Device Driver Kit - */ -#if defined(VMK_DEVKIT_HAS_NATIVE_DDK) && \ - defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) && \ - defined(VMK_DEVKIT_USES_PRIVATE_APIS) - -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) -#include "core/vmkapi_bh.h" -#include "device/vmkapi_pci.h" -#include "device/vmkapi_vector.h" -#endif - -#endif - - - /* * DVFilter */ @@ -258,7 +287,8 @@ extern "C" { #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK)) #include "dvfilter/vmkapi_dvfilter.h" #endif @@ -275,13 +305,15 @@ extern "C" { defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) -#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ - defined(VMK_BUILDING_FOR_USER_MODE)) +#if ((defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ + defined(VMK_BUILDING_FOR_USER_MODE)) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK)) #include "vds/vmkapi_vds_respools.h" #include "vds/vmkapi_vds_prop.h" #endif -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK)) #include "vds/vmkapi_vds_ether.h" #include "vds/vmkapi_vds_portset.h" #include "vds/vmkapi_vds_port.h" @@ -290,16 +322,6 @@ extern "C" { #endif -#if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) - -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ - defined(VMK_BUILDING_FOR_USER_MODE) -#include "vds/vmkapi_vds_lacp_incompat.h" -#endif - -#endif - #if defined(VMK_DEVKIT_USES_VDS_PRIVATE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) @@ -309,21 +331,14 @@ extern "C" { #endif -#if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) - -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) -#include "vds/vmkapi_vds_port_priv.h" -#endif - -#endif - #if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "vds/vmkapi_vds_iochain_incompat.h" #include "vds/vmkapi_vds_lldp.h" +#include "vds/vmkapi_vds_port_priv.h" +#include "vds/vmkapi_vds_port_incompat.h" #endif #endif @@ -344,23 +359,43 @@ extern "C" { #include "net/vmkapi_net_pktlist.h" #include "net/vmkapi_net_pt.h" #include "net/vmkapi_net_dcb.h" +#include "net/vmkapi_net_poll.h" #include "net/vmkapi_net_vlan.h" +#include "net/vmkapi_net_queue.h" +#include "net/vmkapi_net_csum.h" +#include "net/vmkapi_net_dump.h" #include "net/vmkapi_net_uplink.h" +#include "net/vmkapi_net_pkt_header.h" +#include "net/vmkapi_net_port.h" +#include "net/vmkapi_net_portset.h" + +#if !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #include "net/vmkapi_net_portset_message.h" #endif #endif +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ + defined(VMK_BUILDING_FOR_USER_MODE)) +#include "net/vmkapi_net_proto.h" +#endif + +#endif + #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) -#include "net/vmkapi_net_poll.h" -#include "net/vmkapi_net_netqueue.h" +#include "net/vmkapi_net_queue_incompat.h" #include "net/vmkapi_net_uplink_incompat.h" +#include "net/vmkapi_net_shaper_incompat.h" #include "net/vmkapi_net_pkt_incompat.h" -#include "net/vmkapi_net_netdebug.h" -#include "net/vmkapi_net_portset_message_incompat.h" +#include "net/vmkapi_net_pkt_capture.h" +#include "net/vmkapi_net_dcb_incompat.h" +#include "net/vmkapi_net_opaque_network_incompat.h" +#include "net/vmkapi_net_tcpip_incompat.h" +#include "net/vmkapi_net_port_incompat.h" +#include "net/vmkapi_net_portset_incompat.h" #endif #endif @@ -368,14 +403,18 @@ extern "C" { #if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "net/vmkapi_net_overlay.h" +#include "net/vmkapi_net_portset_message_incompat.h" +#include "net/vmkapi_net_event_incompat.h" +#include "net/vmkapi_net_utils_incompat.h" +#include "net/vmkapi_net_vnic_incompat.h" +#include "net/vmkapi_net_tcpip_priv_incompat.h" +#endif + #if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ defined(VMK_BUILDING_FOR_USER_MODE)) #include "net/vmkapi_net_overlay_ext.h" -#include "net/vmkapi_net_proto.h" -#endif - -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) -#include "net/vmkapi_net_overlay.h" #endif #endif @@ -416,7 +455,11 @@ extern "C" { defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) + +#if !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #include "sockets/vmkapi_socket.h" +#endif + #include "sockets/vmkapi_socket_ip.h" #endif @@ -433,6 +476,14 @@ extern "C" { #endif +#if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "sockets/vmkapi_socket_priv_incompat.h" +#endif + +#endif #endif @@ -454,12 +505,14 @@ extern "C" { #include "scsi/vmkapi_scsi_mgmt_types.h" #include "scsi/vmkapi_scsi_device.h" #include "scsi/vmkapi_scsi_vmware.h" +#include "scsi/vmkapi_scsi_iodm.h" #endif #endif #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "scsi/vmkapi_scsi_incompat.h" @@ -527,13 +580,22 @@ extern "C" { #ifdef VMK_DEVKIT_HAS_API_VMKAPI_NPIV #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) #if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ defined(VMK_BUILDING_FOR_USER_MODE)) #include "npiv/vmkapi_npiv_wwn.h" #endif +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "npiv/vmkapi_scsi_vport.h" +#endif + +#endif + +#if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "npiv/vmkapi_npiv.h" #endif @@ -542,6 +604,27 @@ extern "C" { #endif +/* + * VFLASH + */ +#ifdef VMK_DEVKIT_HAS_API_VMKAPI_VFLASH + +#if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ + defined(VMK_BUILDING_FOR_USER_MODE)) + +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE)) +#include "vflash/vmkapi_vflash.h" +#endif +#include "vflash/vmkapi_vflash_types.h" +#endif + +#endif + +#endif + /* * Experimental */ @@ -594,7 +677,7 @@ extern "C" { */ /** \cond never */ #define VMKAPI_REVISION_MAJOR 2 -#define VMKAPI_REVISION_MINOR 1 +#define VMKAPI_REVISION_MINOR 2 #define VMKAPI_REVISION_UPDATE 0 #define VMKAPI_REVISION_PATCH_LEVEL 0 diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_atomic.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_atomic.h index 54f2172..e7882b3 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_atomic.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_atomic.h @@ -129,7 +129,7 @@ static inline void vmk_AtomicDec64( { vmk_AtomicPrologue(); __asm__ __volatile__( - "lock; decl %0" + "lock; decq %0" : "+m" (*var) : : "cc" @@ -158,7 +158,7 @@ static inline void vmk_AtomicAdd64( __asm__ __volatile__( "lock; addq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); @@ -184,7 +184,7 @@ static inline void vmk_AtomicSub64( __asm__ __volatile__( "lock; subq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); @@ -211,7 +211,7 @@ static inline void vmk_AtomicOr64( __asm__ __volatile__( "lock; orq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); @@ -237,7 +237,7 @@ static inline void vmk_AtomicAnd64( __asm__ __volatile__( "lock; andq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); @@ -263,7 +263,7 @@ static inline void vmk_AtomicXor64( __asm__ __volatile__( "lock; xorq %1, %0" : "+m" (*var) - : "ri" (val) + : "re" (val) : "cc" ); vmk_AtomicEpilogue(); diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_char.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_char.h index 20d323c..343101b 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_char.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_char.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 1998 - 2010 VMware, Inc. All rights reserved. + * Copyright 1998 - 2010,2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -51,8 +51,11 @@ /** \brief Don't block for file operations. */ #define VMK_CHARDEV_OFLAG_NONBLOCK 0x00000800 -/** \brief Synchronous file operations. */ -#define VMK_CHARDEV_OFLAG_SYNC 0x00001000 +/** \brief File integerity for synchronous file I/O. */ +#define VMK_CHARDEV_OFLAG_SYNC 0x00101000 + +/** \brief Data integrity for synchronous file I/O. */ +#define VMK_CHARDEV_OFLAG_DSYNC 0x00001000 /** \brief Use direct I/O. */ #define VMK_CHARDEV_OFLAG_DIRECT 0x00004000 @@ -106,16 +109,6 @@ typedef struct vmk_CharDevFdAttr { /* across open/ioctl/close calls */ } vmk_CharDevFdAttr; -/** - * \brief Opaque handle to a character device. - */ -typedef struct vmkCharDevInt* vmk_CharDev; - -/** - * \brief A default initialization value for a vmk_CharDev. - */ -#define VMK_INVALID_CHARDEV (NULL) - /** * \brief Opaque poll token handle. */ @@ -126,6 +119,26 @@ typedef void *vmk_PollToken; */ typedef void *vmk_PollContext; +/** + * \brief Identifier for logical graphics devices. + */ +#define VMK_CHARDEV_IDENTIFIER_GRAPHICS "com.vmware.graphics" + +/** + * \brief Character device driver's entry points. + */ +struct vmk_CharDevOps; + +/** \brief Character device registration data. */ +typedef struct vmk_CharDevRegData { + /** \brief Module creating this device. */ + vmk_ModuleID moduleID; + /** \brief Device operations. */ + const struct vmk_CharDevOps *fileOps; + /** \brief Device private data. */ + vmk_AddrCookie devicePrivate; +} vmk_CharDevRegData; + /** *********************************************************************** * vmk_CharDevOpenFn -- */ /** @@ -330,93 +343,6 @@ typedef struct vmk_CharDevOps { vmk_CharDevWriteFn write; } vmk_CharDevOps; -/** - *********************************************************************** - * vmk_CharDevCleanupFn -- */ /** - * - * \brief Prototype for a character device driver's cleanup callback. - * - * \param[in] private Optional private data to be used by the callback - * - * \retval VMK_OK The cleanup function executed correctly. - * This is not an indicator of the success or failure of - * the operations in the function, but merely that they - * ran. Any other return value is not allowed. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_CharDevCleanupFn)(vmk_AddrCookie private); - -/* - *********************************************************************** - * vmk_CharDevRegister -- */ /** - * - * \brief Register the specified character device, to be invoked from - * user-space. - * - * \param[in] module Module that owns the character device. - * \param[in] name The name of the device - this must be unique. - * \param[in] fileOps Table of the driver file operations. - * Neither open nor close can be supplied - * without the other. - * If read or write operations are supplied, - * then open and close must also be supplied. - * \param[in] cleanup Function automatically invoked to clean up - * after all file ops have ceased and the - * device has been unregistered. May be NULL. - * \param[in] devicePrivate Data given to the driver for each file - * op and cleaned up after unregistration. - * \param[out] assignedHandle Handle to the registered character device. - * - * \retval VMK_EXISTS A device with that name is already registered - * \retval VMK_FAILURE Unable to allocate internal slot for the device - * \retval VMK_NO_MEMORY Unable to allocate memory for device metadata - * \retval VMK_BAD_PARAM Module ID was invalid, name was invalid, - * or one or more specified driver ops are NULL - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_CharDevRegister( - vmk_ModuleID module, - const char *name, - const vmk_CharDevOps *fileOps, - vmk_CharDevCleanupFn cleanup, - vmk_AddrCookie devicePrivate, - vmk_CharDev *assignedHandle); - -/* - *********************************************************************** - * vmk_CharDevUnregister -- */ /** - * - * \brief Unregister a character device. - * - * The character device will be unregistered automatically by - * the kernel only after all open files to the device have been - * closed. If no files are open when vmk_CharDevUnregister is - * called, the device may be unregistered immediately and have the - * cleanup function registered with it invoked. If the device has - * files open, vmk_CharDevUnregister internally defers the device for - * later automatic removal and returns to the caller immediately. When - * the last file is closed, the device will then be destroyed and the - * cleanup function invoked. - * - * \note No new open files to the device can be created after calling - * vmk_CharDevUnregister. - * \note The vmkernel will prevent a module from being unloaded while - * it has open files associated with a character device, even - * if that device has been requested to be unregistered. - * - * \param[in] deviceHandle Handle of device assigned during registration. - * - * \retval VMK_NOT_FOUND The device does not exist. - * \retval VMK_OK The device was either unregistered or internally - * deferred for unregistration once all associated files - * close. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_CharDevUnregister(vmk_CharDev deviceHandle); - /* *********************************************************************** * vmk_CharDevWakePollers -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_char_legacy.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_char_legacy.h new file mode 100644 index 0000000..f14c7eb --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_char_legacy.h @@ -0,0 +1,131 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Character Devices */ /** + * \addtogroup CharDev + * + * Interfaces that allow registration of generic vmkernel character + * device nodes. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_CHAR_LEGACY_H_ +#define _VMKAPI_CHAR_LEGACY_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Opaque handle to a character device. + */ +typedef struct vmkCharDevInt* vmk_CharDev; + +/** + * \brief A default initialization value for a vmk_CharDev. + */ +#define VMK_INVALID_CHARDEV (NULL) + +/** + *********************************************************************** + * vmk_CharDevCleanupFn -- */ /** + * + * \brief Prototype for a character device driver's cleanup callback. + * + * \param[in] private Optional private data to be used by the callback + * + * \retval VMK_OK The cleanup function executed correctly. + * This is not an indicator of the success or failure of + * the operations in the function, but merely that they + * ran. Any other return value is not allowed. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_CharDevCleanupFn)(vmk_AddrCookie private); + +/* + *********************************************************************** + * vmk_CharDevRegister -- */ /** + * + * \brief Register the specified character device, to be invoked from + * user-space. + * + * \nativedriversdisallowed + * + * \param[in] module Module that owns the character device. + * \param[in] name The name of the device - this must be unique. + * \param[in] fileOps Table of the driver file operations. + * Neither open nor close can be supplied + * without the other. + * If read or write operations are supplied, + * then open and close must also be supplied. + * \param[in] cleanup Function automatically invoked to clean up + * after all file ops have ceased and the + * device has been unregistered. May be NULL. + * \param[in] devicePrivate Data given to the driver for each file + * op and cleaned up after unregistration. + * \param[out] assignedHandle Handle to the registered character device. + * + * \retval VMK_EXISTS A device with that name is already registered + * \retval VMK_FAILURE Unable to allocate internal slot for the device + * \retval VMK_NO_MEMORY Unable to allocate memory for device metadata + * \retval VMK_BAD_PARAM Module ID was invalid, name was invalid, + * or one or more specified driver ops are NULL + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_CharDevRegister( + vmk_ModuleID module, + const char *name, + const vmk_CharDevOps *fileOps, + vmk_CharDevCleanupFn cleanup, + vmk_AddrCookie devicePrivate, + vmk_CharDev *assignedHandle); + +/* + *********************************************************************** + * vmk_CharDevUnregister -- */ /** + * + * \brief Unregister a character device. + * + * The character device will be unregistered automatically by + * the kernel only after all open files to the device have been + * closed. If no files are open when vmk_CharDevUnregister is + * called, the device may be unregistered immediately and have the + * cleanup function registered with it invoked. If the device has + * files open, vmk_CharDevUnregister internally defers the device for + * later automatic removal and returns to the caller immediately. When + * the last file is closed, the device will then be destroyed and the + * cleanup function invoked. + * + * \nativedriversdisallowed + * \note No new open files to the device can be created after calling + * vmk_CharDevUnregister. + * \note The vmkernel will prevent a module from being unloaded while + * it has open files associated with a character device, even + * if that device has been requested to be unregistered. + * + * \param[in] deviceHandle Handle of device assigned during registration. + * + * \retval VMK_NOT_FOUND The device does not exist. + * \retval VMK_OK The device was either unregistered or internally + * deferred for unregistration once all associated files + * close. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_CharDevUnregister(vmk_CharDev deviceHandle); + +#endif /* _VMKAPI_CHAR_LEGACY_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_heap.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_heap.h index 63ac085..42c33e6 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_heap.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_heap.h @@ -188,6 +188,31 @@ VMK_ReturnStatus vmk_HeapCreate(vmk_HeapCreateProps *props, */ void vmk_HeapDestroy(vmk_HeapID heap); +/* + *********************************************************************** + * vmk_HeapDestroySync -- */ /** + * + * \brief Destroy a dynamic heap. If the heap is non-empty, wait + * for it to become empty before destroying. + * + * \note This function may block if the heap is non-empty. + * + * \param[in] heap Heap to destroy. + * \param[in] timeoutMS Timeout in milliseconds. Zero means no timeout. + * + * \retval VMK_OK Heap was destroyed successfully. + * \retval VMK_DEATH_PENDING World was killed while waiting and the + * heap was not destroyed. + * \retval VMK_WAIT_INTERRUPTED The wait was interrupted and the heap + * was not destroyed. + * \retval VMK_TIMEOUT The wait timed out and the heap was + * not destroyed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_HeapDestroySync(vmk_HeapID heap, + vmk_int64 timeoutMS); + /* *********************************************************************** * vmk_HeapFree -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_lock.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_lock.h index ac67596..57ccf19 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_lock.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_lock.h @@ -118,21 +118,21 @@ * To be used for IRQ locks that leafs, except for log/warning * */ -#define VMK_SP_RANK_IRQ_LEAF_LEGACY (0x3ff9) +#define VMK_SP_RANK_IRQ_LEAF_LEGACY (0x5ff9) /** * \brief Rank used by calls potentially invoked by timers that need * to manage memory. For instance: an allocator callable by * timers. */ -#define VMK_SP_RANK_IRQ_MEMTIMER_LEGACY (0x3000) +#define VMK_SP_RANK_IRQ_MEMTIMER_LEGACY (0x5000) /** * \brief Block rank for IRQ locks * * To be used for IRQ locks that depend on eventqueue/cpusched locks */ -#define VMK_SP_RANK_IRQ_BLOCK_LEGACY (0x2000) +#define VMK_SP_RANK_IRQ_BLOCK_LEGACY (0x4000) /** * \brief Lowest major rank for IRQ locks @@ -151,7 +151,7 @@ * so that one can grab a semaphore, grab a leaf lock and then call * vmk_SemaIsLocked() on the semaphore. */ -#define VMK_SP_RANK_LEAF_LEGACY (0xffd) +#define VMK_SP_RANK_LEAF_LEGACY (0x2ffd) /** * \brief Rank for all SCSI locks diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_logging.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_logging.h index 78b9cec..583dcd6 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_logging.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_logging.h @@ -202,6 +202,20 @@ VMK_ReturnStatus vmk_LogRegister( VMK_ReturnStatus vmk_LogUnregister( vmk_LogComponent handle); +/* + *********************************************************************** + * vmk_LogHeapAllocSize -- */ /** + * + * \brief Amount of heap space needed per registered log component + * + * \note This function will not block. + * + * \retval Number of bytes to set aside in a heap per log component + * + *********************************************************************** + */ +vmk_ByteCount vmk_LogHeapAllocSize(void); + /* *********************************************************************** * vmk_LogGetName -- */ /** @@ -311,7 +325,7 @@ vmk_int32 vmk_LogGetCurrentLogLevel( #define vmk_Warning(handle, fmt, args...) \ vmk_LogLevel(VMK_LOG_URGENCY_WARNING, \ handle, vmk_LogGetCurrentLogLevel(handle), \ - "%s: %s:%d:" fmt "\n", vmk_LogGetName(handle), \ + "%s: %s:%d: " fmt "\n", vmk_LogGetName(handle), \ __FUNCTION__, __LINE__, ##args) /* @@ -335,7 +349,7 @@ vmk_int32 vmk_LogGetCurrentLogLevel( #define vmk_Alert(handle, fmt, args...) \ vmk_LogLevel(VMK_LOG_URGENCY_ALERT, \ handle, vmk_LogGetCurrentLogLevel(handle), \ - "%s: %s:%d:" fmt "\n", vmk_LogGetName(handle), \ + "%s: %s:%d: " fmt "\n", vmk_LogGetName(handle), \ __FUNCTION__, __LINE__, ##args) /* diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt.h new file mode 100644 index 0000000..2433319 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt.h @@ -0,0 +1,358 @@ +/* ********************************************************** + * Copyright 2012 - 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Management Interfaces */ /** + * \defgroup Mgmt Management + * + * Interfaces that allow management of vmkapi modules (runtime + * parameterization, notifications to modules from user space and + * to user space from modules). + * + * @{ + *********************************************************************** + */ + +/* + * vmkapi_mgmt.h -- + * + * vmkernel declarations for datatypes & functions used for + * enabling per-module management APIs between user-space and + * vmkernel modules. + */ + + + +#ifndef _VMKAPI_MGMT_H_ +#define _VMKAPI_MGMT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "base/vmkapi_mgmt_types.h" + +/** \brief Opaque generic handle allocated by the API */ +typedef struct vmkMgmtHandleInt * vmk_MgmtHandle; + +/** + *********************************************************************** + * vmk_MgmtCleanupFn -- */ /** + * + * \brief Prototype for a management interface's cleanup callback. + * + * \param[in] private Optional cookie data to be used by the callback, + * as was originally provided to vmk_MgmtInit(). + * + *********************************************************************** + */ +typedef void (*vmk_MgmtCleanupFn)(vmk_uint64 cookie); + +/** + *********************************************************************** + * vmk_MgmtKeyGetFn -- */ /** + * + * \brief Prototype for get-key function. + * + * \note This prototype is for a module-supplied "get" function + * for fetching a key's value, for a key that was registered + * using vmk_MgmtAddKey. + * + * \param[in] cookie Cookie supplied with vmk_MgmtInit. + * \param[out] keyVal Value of the key that was read. The type of + * pointer this represents depends on the type + * of key that was added using this function. + * + * \retval VMK_OK The 'get' function executed correctly. + * This is not an indicator of the success or failure of + * the operations in the function, but merely that they + * ran. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_MgmtKeyGetFn)(vmk_uint64 cookie, + void *keyVal); + +/** + *********************************************************************** + * vmk_MgmtKeySetFn -- */ /** + * + * \brief Prototype for set-key function. + * + * \note This prototype is for a module-supplied "set" function + * for storing a key's value, for a key that was registered + * using vmk_MgmtAddKey. + * + * \param[in] cookie Cookie supplied with vmk_MgmtKeyValueInit. + * \param[in] keyVal Value of the key to set. The type of + * pointer this represents depends on the type + * of key that was added using this function. + * + * \retval VMK_OK The 'set' function executed correctly. + * This is not an indicator of the success or failure of + * the operations in the function, but merely that they + * ran. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_MgmtKeySetFn)(vmk_uint64 cookie, + void *keyVal); + +/** + *********************************************************************** + * vmk_MgmtInit */ /** + * + * \brief Initialize the kernel side of a user/kernel management API + * + * \note The API passed must have an equivalent signature that is passed + * to the library interface in userland. + * + * \param[in] modId The module ID of the kernel module registering + * the API. + * \param[in] heapId The heap ID to use for allocating temporary + * metadata and parameter passing in event delivery. + * \param[in] sig The API signature of the API being registered. + * Callbacks 0 through VMK_MGMT_RESERVED_CALLBACKS + * are reserved and may not be used. + * \param[in] cleanupFn Optional cleanup function that is executed + * after the last in-flight operation + * concludes. Note that in-flight management + * operations can be going on during a vmk_MgmtDestroy. + * \param[in] cookie A data cookie that will be provided as the + * first argument to all kernel-space callbacks + * and the cleanup function that are invoked. + * \param[in,out] handle The handle that will be allocated for accessing + * this API. + * + * \retval VMK_OK Initialization succeeded. + * \retval VMK_BAD_PARAM Either the modId or signature were invalid. + * \retval VMK_NO_MEMORY Internal metadata for operation could not be + * allocated. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtInit(vmk_ModuleID modId, + vmk_HeapID heapId, + vmk_MgmtApiSignature *sig, + vmk_MgmtCleanupFn cleanupFn, + vmk_uint64 cookie, + vmk_MgmtHandle *handle); + +/** + *********************************************************************** + * vmk_MgmtRegisterInstanceCallbacks */ /** + * + * \brief Register instance-specific management callbacks. + * + * \note This API registers an instance and instance-specific callbacks + * that will be associated with a given management handle. If + * you provide instance-specific callbacks, those callbacks will + * be invoked instead of the default corresponding callbacks that + * were originally registered with the handle. Note that it is + * valid to supply a subset of instance-specific callbacks + * (or even none). + * + * \param[in] handle The management handle that was initialized. + * \param[in] instanceId The unique instance that will have its + * callbacks registered. Must be unique for + * the current handle, and must not be 0. + * \param[in] modId The modId of the module where the + * callbacks reside. + * \param[in] heapId The heapId from the module where the + * callbacks reside. + * \param[in] displayName The name that will be displayed for + * this instance when it's listed. + * \param[in] numCallbacks The number of instance-specific + * callbacks that are being registered. 0 + * is valid, if the instance does not + * supply instance-specific callbacks. + * \param[in] callbacks The callback information for each + * instance-specific callback, corresponding + * to callbacks that override those + * registered in the API signature + * for this handle. + * + * \retval VMK_OK Initialization succeeded. + * \retval VMK_BAD_PARAM Parameters couldn't be validated. + * \retval VMK_NO_MEMORY Internal metadata for operation could not be + * allocated. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtRegisterInstanceCallbacks(vmk_MgmtHandle handle, + vmk_uint64 instanceId, + vmk_ModuleID modId, + vmk_HeapID heapId, + vmk_Name *displayName, + vmk_uint32 numCallbacks, + vmk_MgmtCallbackInfo *callbacks); + +/** + *********************************************************************** + * vmk_MgmtUnregisterInstanceCallbacks */ /** + * + * \brief Unregister an instance from being management handle. + * + * \param[in] handle The management handle that was initialized + * and to which this instance is associated. + * \param[in] instanceId The unique instance that was already + * registered for management. + * + * \retval VMK_OK Unregistration succeeded. + * \retval VMK_BAD_PARAM The instance was not already registered. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtUnregisterInstanceCallbacks(vmk_MgmtHandle handle, + vmk_uint64 instanceId); + + +/** + *********************************************************************** + * vmk_MgmtDestroy */ /** + * + * \brief Destroy the kernel side of a user/kernel management API + * + * \param[in] handle The handle that was passed and initialized with + * vmk_MgmtInit + * + * \note The heap that was passed to vmk_MgmtInit should not be + * destroyed until all access to the management channel has stopped, + * and thus the cleanup function has run. If you call + * vmk_MgmtDestroy during module-unload, you are assured that the + * management channel is not in use & thus you can safely destroy + * the heap immediately. + * + * \retval VMK_BAD_PARAM The API has already been destroyed or has + * already been requested to be destroyed. + * \retval VMK_OK The API will be destroyed once all in-flight + * operations conclude (may be immediate, if + * none are currently in-flight). + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtDestroy(vmk_MgmtHandle handle); + +/* + *********************************************************************** + * vmk_MgmtCallbackInvokeInt -- + * + * This is used by vmk_MgmtCallbackInvoke(). VMKAPI clients should + * never call this function directly. + * + *********************************************************************** + */ + +/** \cond nodoc */ +VMK_ReturnStatus +vmk_MgmtCallbackInvokeInt(vmk_MgmtHandle handle, + vmk_uint64 instanceId, + vmk_uint64 callbackId, + vmk_uint32 argCount, + ...); +/** \endcond */ + + +/** + *********************************************************************** + * vmk_MgmtCallbackInvoke */ /** + * + * \brief Invoke a user-space callback that has zero or more parameters. + * \note The callback will be asynchronously delivered to user-space, + * but only if there currently is a user-space process associated + * with this management handle that is listening for callback + * requests. This call does not block. + * \note Parameters are immediately copied for delivery. Sizes are + * determined by the API signature that was registered with + * vmk_MgmtInit. Additionally, the data cookie that was + * registered with the receiver (in user space) will be provided + * as the first argument to the callback that is delivered in + * user space. + * + * \param[in] handle The handle that was passed and initialized with + * vmk_MgmtInit + * \param[in] instanceId The unique instance ID from which this callback + * is originating. If this is not an instance- + * specific invocation, use VMK_MGMT_NO_INSTANCE_ID. + * \param[in] callbackId The unique ID corresponding to the callback to + * invoke, as registered with the API signature. + * \param[in] ... Pointers to the parameters to copy and pass. + * The number of parameters passed here must match + * the number used by the callback indicated by + * callbackId. + * + * \retval VMK_OK The callback was prepared for delivery. This + does not indicate that it has run, however. + * \retval VMK_BAD_PARAM The callback or number of parameters supplied + * was invalid. + * \retval VMK_NO_MEMORY Temporary storage required to deliver the event + * was unavailable. + * \retval VMK_NOT_FOUND There is no listening user-space process + * running that can receive this callback request. + * + *********************************************************************** + */ + +#define vmk_MgmtCallbackInvoke( \ + /* (vmk_MgmtHandle) */ handle, \ + /* (vmk_uint64) */ instanceId, \ + /* (vmk_uint64) */ callbackId, \ + ...) \ + vmk_MgmtCallbackInvokeInt(handle, instanceId, callbackId, VMK_UTIL_NUM_ARGS(__VA_ARGS__), ##__VA_ARGS__) + +/** + *********************************************************************** + * vmk_MgmtAddKey */ /** + * + * \brief Add a key to be managed as a key-value pair. + * + * \note This creates a key-value pair that can be managed using + * the vmkmgmt_keyval utility. The name of the management + * handle that was initialized is the name of the key-value + * instance that would be the "instance" argument to + * vmkmgmt_keyval. For the get and set functions registered + * here, the cookie that is given back is the cookie that + * was initialized with vmk_MgmtInit. + * + * \param[in] handle The handle that was initialized by + * vmk_MgmtInit. + * \param[in] keyType The type of the key being added. + * \param[in] keyName The name of the key being added. Must be + * unique compared to other registered + * keys for this management handle. + * \param[in] getFn The function that will be used to get the key + * value at runtime. + * \param[in] setFn The function that will be used to set the key + * value at runtime. + * + * \note Both the getFn and setFn must be provided. + * + * \retval VMK_OK The key was added. + * \retval VMK_BAD_PARAM A bad parameter was given. + * \retval VMK_NO_MEMORY Memory was not available to allocate the required + * metadata structures. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_MgmtAddKey(vmk_MgmtHandle handle, + vmk_MgmtKeyType keyType, + vmk_Name *keyName, + vmk_MgmtKeyGetFn getFn, + vmk_MgmtKeySetFn setFn); + + +#endif /* _VMKAPI_MGMT_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt_lib.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt_lib.h new file mode 100644 index 0000000..f6a63aa --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt_lib.h @@ -0,0 +1,284 @@ +/* ********************************************************** + * Copyright 2012 - 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ******************************************************************************* + * Management Types */ /** + * \addtogroup Mgmt + * + * User-facing interfaces exported by vmkmgmt_lib, for use when communicating + * with vmkapi modules using vmk_Mgmt APIs. + * + * @{ + ******************************************************************************* + */ + +/* + * vmkapi_mgmt_lib.h -- + * user-space declarations for datatypes & functions used to interact + * with vmkapi modules that use the vmk_Mgmt APIs. Note that user-space + * management APIs and user-specific types are prefixed with "vmk_MgmtUser", + * even when they may be used to invoke actions in the kernel. + */ + +#ifndef _VMKAPI_MGMT_LIB_H_ +#define _VMKAPI_MGMT_LIB_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "base/vmkapi_mgmt_types.h" + +/** \brief An opaque handle that is allocated and managed by the library */ +typedef struct vmkMgmtUserHandleInt * vmk_MgmtUserHandle; + +/** + *********************************************************************** + * vmk_MgmtUserInit */ /** + * + * \brief Initialize user-space management of a kernel module. + * + * \note This initializes your application for interaction with a + * kernel module that has an API signature matching the one you + * provide here with vmk_MgmtUserInit. Note that the kernel side + * of the API must be successfully registered with + * vmk_MgmtInit prior to attempting to initialize the + * user-space side. There can be multiple applications or + * threads using vmk_MgmtUserInit for the same API signature, + * but only one kernel module can service that API signature. + * + * \note The signature provided here must be compatible with the + * signature of the API that has been registered with the kernel. + * if "vendor" is specified (non-null) in the signature, a + * connection will only be made if the vendor matches. + * + * \param[in] sig The API signature describing the + * management operations that can be done. + * Must match a signature registered in the + * kernel. + * \param[in] userCookie A data cookie that will be provided as + * the first argument to all user-space + * callbacks. + * \param[out] handle An opaque handle that will be used for + * further interaction with the API. + * + * \retval 0 Initialization succeeded. + * \retval other A UNIX-style error code. + * + *********************************************************************** + */ +int +vmk_MgmtUserInit(vmk_MgmtApiSignature *sig, + vmk_uint64 userCookie, + vmk_MgmtUserHandle *handle); + +/** + *********************************************************************** + * vmk_MgmtUserGetInstances */ /** + * + * \brief Get instance information for all kernel-registered instances. + * + * \note The instanceIds populated in the vmk_MgmtInstances structure + * can be subsequently used to send a callback request to a + * specific instance with vmk_MgmtUserCallbackInvoke + * + * \param[in] handle Management handle that was initialized + * \param[out] instances Current instance information for given handle + * + * \retval 0 Succeeded getting instances. + * \retval other A UNIX-style error code. + * + *********************************************************************** + */ +int +vmk_MgmtUserGetInstances(vmk_MgmtUserHandle handle, + vmk_MgmtInstances *instances); + +/** + *********************************************************************** + * vmk_MgmtUserBegin */ /** + * + * \brief Begin execution of user callbacks. + * + * \note This call creates a separate thread to monitor incoming + * callback requests from the kernel for the given management + * handle and immediately begins execution of those callbacks + * as they arrive. + * \note This is not necessary if your application is not meant to + * handle callbacks delivered from the kernel. + * + * + * param[in] handle Management handle that was initialized + * + * \retval 0 Succeeded initializing callback execution + * \retval other A UNIX-style error code + * + *********************************************************************** + */ +int +vmk_MgmtUserBegin(vmk_MgmtUserHandle handle); + +/** + *********************************************************************** + * vmk_MgmtUserContinue */ /** + * + * \brief Indefinitely continue monitoring and executing incoming kernel + * callback requests in user space. + * + * \note vmk_MgmtUserBegin must have been successfully executed prior + * to calling vmk_MgmtUserContinue. + * \note Invoking vmk_MgmtUserContinue effectively makes the current + * (calling) thread run indefinitely, in a monitoring mode. This + * is typically used by resident CIM providers. To terminate + * monitoring on a particular management handle after + * vmk_MgmtUserBegin or vmk_MgmtUserContinue has been executed, + * vmk_MgmtUserEnd. vmk_MgmtUserContinue does not return until + * vmk_MgmtUserEnd is separately executed on the same handle + * from within the same process. To use vmk_MgmtUserEnd after + * vmk_MgmtUserContinue, you must create a separate pthread that + * will invoke vmk_MgmtUserEnd sometime later after your main + * thread has invoked vmk_MgmtUserContinue. + * + * \param[in] handle Management handle that was initialized + * + * \retval 0 Execution succeeded and was ended without error. + * This will happen at some future moment in time, + * after vmk_MgmtUserEnd has been used. + * \retval Other A UNIX error code. Execution terminated, + * possibly early with error. + * + *********************************************************************** + */ +int +vmk_MgmtUserContinue(vmk_MgmtUserHandle handle); + +/** + *********************************************************************** + * vmk_MgmtUserEnd */ /** + * + * \brief Terminate monitoring and execution of kernel-to-user callbacks. + * + * \note This may be called after either vmk_MgmtUserBegin or + * vmk_MgmtUserContinue. + * \note Because vmk_MgmtUserContinue does not return, a separate + * thread within the same process space is required to invoked + * vmk_MgmtUserEnd. The effect of vmk_MgmtUserEnd will be to + * cease processing of any additional incoming callback requests + * from the kernel, but the management handle will remain open. + * Processing of inbound callback requests from the kernel can + * be resumed if vmk_MgmtUserBegin is subsequently used on the + * given handle. + * + * \param[in] handle Management handle that was initialized. + * + * \retval 0 Execution was successfully ended. + * \retval Other A UNIX-style error code indicating the nature of + * an error that was encountered. + * + *********************************************************************** + */ +int +vmk_MgmtUserEnd(vmk_MgmtUserHandle handle); + +/** + *********************************************************************** + * vmk_MgmtUserDestroy */ /** + * + * \brief Destroy the user side connection to a management handle. + * + * \note This will terminate receiving of callback requests from the + * kernel and terminate the ability to send new callback + * requests to the kernel. + * + * \param[in] handle Management handle that was initialized. + * + * \retval 0 Handle was destroyed completely without error. + * \retval Other A UNIX-style error code indicating the nature + * of the failure. The handle should not be used + * again even after a failure, however. + * + *********************************************************************** + */ +int +vmk_MgmtUserDestroy(vmk_MgmtUserHandle handle); + +/** + *********************************************************************** + * vmk_MgmtUserCallbackInvoke */ /** + * + * \brief From user space, invoke a callback inside the kernel. + * + * \note Parameter handling: For asynchronous callbacks, all + * parameters are internally copied for delivery to the kernel. + * For synchronous callbacks, input and input-output parameters + * are copied internally and delivered to the kernel. For + * input-output and output parameters, such parameters are copied + * from the kernel back to user-space (to the pointer indicated + * by the corresponding parameter given to this function) after + * the callback has executed. In addition to the payload + * parameters passed here, the receiving callback in the kernel + * will be provided the kernel-side data cookie that the + * receiver registered with vmk_MgmtInit and the instanceId + * specificed here. If an instanceId is specified, the callback + * function invoked in the kernel will be the instance-specific + * callback (if it was specified when the instance was added) or + * the default callback function registered with the API + * signature (if no instance-specific callback was specified + * for this callback when the instance was added). + * + * \param[in] handle Management handle that was initialized. + * \param[in] instanceId The unique instance ID to send this callback + * to. If this is not an instance-specific + * invocation, use VMK_MGMT_NO_INSTANCE_ID. + * \param[in] callbackId The unique ID corresponding to the callback + * to invoke, as registered with the API + * signature. + * \param[in] ... A variable list of parameters, each one + * a (void *) pointer to the parameter + * being passed to the callback. The number + * of parameters must match that described for + * the given callbackId when the API signature + * was registered. + * \retval 0 For asynchronous callbacks, this means that the callback + * successfully was queued. For synchronous callbacks, + * this means that the callback has executed completely. + * \retval Other A UNIX-style error code corresponding to the error + * encountered when attempting to queue or execute the + * callback. + * \note The return value is not a indication or return code of the + * callback itself. + * + */ +#define vmk_MgmtUserCallbackInvoke( \ + /* (vmk_MgmtHandle *) */ handle, \ + /* (vmk_uint64) */ instanceId, \ + /* (vmk_uint64) */ callbackId, \ + ...) \ + vmk_MgmtUserCallbackInvokeInt(handle, instanceId, callbackId, VMK_UTIL_NUM_ARGS(__VA_ARGS__), ##__VA_ARGS__) + +/* + *********************************************************************** + * vmk_MgmtUserCallbackInvokeInt -- + * + * This is used by vmk_MgmtUserCallbackInvoke(). VMKAPI clients should + * never call this function directly. + * + *********************************************************************** + */ +int +vmk_MgmtUserCallbackInvokeInt(vmk_MgmtUserHandle handle, + vmk_uint64 instanceId, + vmk_uint64 callbackId, + vmk_uint32 argCount, + ...); + +#endif /* _VMKAPI_MGMT_LIB_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt_types.h new file mode 100644 index 0000000..277060a --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_mgmt_types.h @@ -0,0 +1,228 @@ +/* ********************************************************** + * Copyright 2012 - 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ******************************************************************************* + * Management Types */ /** + * \addtogroup Mgmt + * + * Types used by user- and kernel-space when interacting with the vmkapi + * management interfaces and library. + * + * @{ + ******************************************************************************* + */ + + +/* + * vmkapi_mgmt_types.h -- + * + * Interfaces for defining management APIs for vmkernel-based + * modules, which need to be shared with user-space. + */ + +#ifndef _VMKAPI_MGMT_TYPES_H_ +#define _VMKAPI_MGMT_TYPES_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "lib/vmkapi_name.h" +#include "lib/vmkapi_revision.h" + +/** + * The maximum number of data payload parameters per callback, + * excluding the cookie and instance parameters. + */ +#define VMK_MGMT_MAX_CALLBACK_PARMS 4 + +/** + * \brief Callback IDs 0 through VMK_MGMT_RESERVED_CALLBACKS inclusive + * are reserved by the system and may not be used by consumers + * of the API. + */ +#define VMK_MGMT_RESERVED_CALLBACKS 15 + +#define VMK_MGMT_NO_INSTANCE_ID 0 + +/** + * \brief The type of a key used in a key-value management channel. + */ +typedef enum vmk_MgmtKeyType { + /** + * \brief An 8-byte integer + */ + VMK_MGMT_KEY_TYPE_LONG = 1, + /** + * \brief A 4096-byte (including nul) character string. + */ + VMK_MGMT_KEY_TYPE_STRING = 2, +} vmk_MgmtKeyType; + +/** + * \brief The maximum number of bytes in a VMK_MGMT_KEY_TYPE_STRING key. + */ +#define VMK_MGMT_KEY_STRING_MAXLEN 4096 + +/** + * \brief The maximum number of keys that can be added to a + * vmk_MgmtHandle instance. + */ +#define VMK_MGMT_MAX_KEYS_PER_INSTANCE 32 + +/** + * \brief The maximum number of instances that can be added to a management handle. + */ +#define VMK_MGMT_MAX_INSTANCES 32 + +/** + * \brief The location where a callback will execute. + */ +typedef enum vmk_MgmtCallbackLocation { + VMK_MGMT_CALLBACK_KERNEL = 1, + VMK_MGMT_CALLBACK_USER, +} vmk_MgmtCallbackLocation; + +/** + * \brief The type of a parameter to a callback + */ +typedef enum vmk_MgmtParm { + /** \brief An input parameter to a callback. The contents of the + * parameter will be copied before invoking the callback. + */ + VMK_MGMT_PARMTYPE_IN = 0, + /** + * \brief An output parameter to a callback. Only valid for + * synchronous callbacks that are executed in the kernel. The + * contents of the parameter will be copied back to the caller + * after the callback has executed. + */ + VMK_MGMT_PARMTYPE_OUT, + /** + * \brief An input-output parameter to a callback. Only valid + * for synchronous callbacks that are executed in the kernel. + * The contents of the parameter will be copied before the + * callback has executed and again copied back to the caller after + * execution. + */ + VMK_MGMT_PARMTYPE_INOUT, +} vmk_MgmtParmType; + +/** + * \brief A description of a single callback that is part of an overall API. + */ +typedef struct vmk_MgmtCallbackInfo { + /** \brief The location where the callback runs. */ + vmk_MgmtCallbackLocation location; + /** + * \brief A function pointer to the callback. + * A callback function pointer only needs to be provided if this + * signature is being registered where this callback would run. For + * example, if the API is being registered with the kernel, only + * VMK_MGMT_CALLBACK_KERNEL callbacks require a value here. + * Callback functions must not assume that they execute with any kind of + * serialization. If multiple management handle instances specify the same + * callback function, then that callback function can be executed simultaneously. + * By separate callers. If your callback function requires synchronization + * among multiple potential callers, then your callback function must + * implement that synchronization. + */ + void *callback; + /** \brief Indicates if this callback is executed synchronously to the caller. + * As noted for the callback parameter, even if a callback is + * marked "synchronous", a callback could be invoked simultaneously + * by multiple callers. "synchronous" describes the semantics as + * viewed by the caller, not that the callee (the callback) can assume + * that it is invoked atomically. + */ + vmk_Bool synchronous; + /** + * Number of parameters to the callback, excluding the data + * cookie and instance parameters (which are provided as the first two + * arguments). For example, a numParms value of 0 means that the callback + * must take two arguments - the data cookie and instance ID - but no + * payload parameters. + */ + vmk_uint8 numParms; + /** + * \brief The size of each callback, in the order that they are passed. + * \note Excludes the data cookie and instance ID. + */ + int parmSizes[VMK_MGMT_MAX_CALLBACK_PARMS]; + /** + * \brief The type of each callback, in the order that they are passed. + * \note Excludes the data cookie and instance ID. + */ + vmk_MgmtParmType parmTypes[VMK_MGMT_MAX_CALLBACK_PARMS]; + /** + * \brief An identifier for this callback. + * \note Must be unique within the scope of call callbacks registered + * in an API signature. May not be 0. + */ + vmk_uint64 callbackId; +} vmk_MgmtCallbackInfo; + +/** + * \brief The signature for an API being initialized at either the kernel + * or user layer + */ +typedef struct vmk_MgmtApiSignature { + /** + * \brief Version of the API. By default, versions of an API with the + * same major and minor are compatible with each other and will + * allow initialization and communication between the registered + * instances on the user or kernel side. The minor, update, + * and patch numbers will be used for distinguishing minor + * differences that can be shimmed by providers. + */ + vmk_revnum version; + /** + * \brief Name of the API. The version and name must be unique. + */ + vmk_Name name; + /** + * \brief Vendor implementing this side (user or kernel) of the API. + * Optional. + */ + vmk_Name vendor; + /** \brief The number of callbacks this API has. */ + int numCallbacks; + /** \brief The information describing each callback */ + vmk_MgmtCallbackInfo *callbacks; +} vmk_MgmtApiSignature; + + +/** + * \brief A description of specific instances registered to a management handle. + * \note An application can get the instances associated with a handle and + * then can subsequently send callbacks to instances using the + * instanceIds as reported in this structure. + */ +typedef struct vmk_MgmtInstances { + /** + * /brief The number of instances managed on this API handle. + */ + vmk_uint8 numInstances; + + /** + * /brief The instance IDs that are managed. + */ + vmk_uint64 instanceIds[VMK_MGMT_MAX_INSTANCES]; + + /** + * \brief The presentation names for each of the instances. + */ + vmk_Name instanceNames[VMK_MGMT_MAX_INSTANCES]; +} vmk_MgmtInstances; + +#endif /* _VMKAPI_MGMT_TYPES_H_ */ +/** @} */ + diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_incompat.h index 4114042..19e42fc 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_incompat.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_incompat.h @@ -24,6 +24,8 @@ #endif /** \endcond never */ +#include "vmkapi_module_ns_incompat.h" + /* *********************************************************************** * VMK_MODULE_EXPORT_SYMBOL_DIRECT -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_ns.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_ns.h index 54a5c8e..8565a8f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_ns.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_ns.h @@ -48,7 +48,7 @@ * *********************************************************************** */ -#define VMK_NAMESPACE_CURRENT_VERSION "v2_1_0_0" +#define VMK_NAMESPACE_CURRENT_VERSION "v2_2_0_0" #endif /* _VMKAPI_MODULE_NS_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_ns_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_ns_incompat.h new file mode 100644 index 0000000..6d3d3ab --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_module_ns_incompat.h @@ -0,0 +1,55 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Module */ /** + * \defgroup NamespaceIncompat Incompatible symbol name-spaces + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_MODULE_NS_INCOMPAT_H_ +#define _VMKAPI_MODULE_NS_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/* + *********************************************************************** + * VMK_NAMESPACE_VMKAPI_INCOMPAT + * + * \ingroup Namespace + * \brief Incompatible VMKAPI name-space + * + * This string should be used to access the Incompatible VMKAPI + * name-space + * + *********************************************************************** + */ +#define VMK_NAMESPACE_VMKAPI_INCOMPAT "com.vmware.vmkapi.incompat" + +/* + *********************************************************************** + * VMK_NAMESPACE_INCOMPAT_CURRENT_VERSION -- */ /** + * + * \ingroup Namespace + * \brief The current incompatible VMKAPI name-space version + * + * Short-cut for exporting to the current incompatible VMKAPI name-space + * + *********************************************************************** + */ +#define VMK_NAMESPACE_INCOMPAT_CURRENT_VERSION "v2_2_0_0" + +#endif /* _VMKAPI_MODULE_NS_INCOMPAT_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_platform.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_platform.h index bcbcbbd..e532726 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_platform.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_platform.h @@ -53,6 +53,8 @@ typedef vmk_uintptr_t vmk_CPUFlags; * * \note This function will not block. * + * \nativedriversdisallowed + * *********************************************************************** */ void vmk_CPUDisableInterrupts(void); @@ -66,6 +68,8 @@ void vmk_CPUDisableInterrupts(void); * * \note This function will not block. * + * \nativedriversdisallowed + * *********************************************************************** */ void vmk_CPUEnableInterrupts(void); @@ -82,6 +86,8 @@ void vmk_CPUEnableInterrupts(void); * \retval VMK_TRUE Interrupts are enabled on the current CPU. * \retval VMK_FALSE Interrupts are disabled on the current CPU. * + * \nativedriversdisallowed + * *********************************************************************** */ vmk_Bool vmk_CPUHasIntsEnabled(void); @@ -93,6 +99,8 @@ vmk_Bool vmk_CPUHasIntsEnabled(void); * \ingroup Platform * \brief Assert that interrupts are enabled on the current CPU. * + * \nativedriversdisallowed + * *********************************************************************** */ #define VMK_ASSERT_CPU_HAS_INTS_ENABLED() \ @@ -121,6 +129,8 @@ vmk_Bool vmk_CPUHasIntsEnabled(void); * * \return The current CPU's interrupt flags. * + * \nativedriversdisallowed + * *********************************************************************** */ vmk_CPUFlags vmk_CPUGetFlags(void); @@ -134,6 +144,8 @@ vmk_CPUFlags vmk_CPUGetFlags(void); * * \note This function will not block. * + * \nativedriversdisallowed + * *********************************************************************** */ void vmk_CPUSetFlags( @@ -200,5 +212,49 @@ static VMK_ALWAYS_INLINE void vmk_CPUMemFenceReadWrite(void) asm volatile ("mfence" ::: "memory"); } +/* + *********************************************************************** + * vmk_CPUCacheFlush -- */ /** + * + * \ingroup Platform + * \brief Flushes the cache lines on the local PCPU for the memory + * region specified. + * + * \note If a specific operation required flushing the cache line of + * the local PCPU, both that operation and this call should + * come within the same VMK_WITH_PCPU_DO region. + * + * \param[in] pcpu PCPU ID obtained from VMK_WITH_PCPU_DO. + * \param[in] va Starting virtual address of memory region. + * \param[in] size Size of memory region. + * + * \retval VMK_OK Cache lines successfully flushed. + * \retval VMK_BAD_PARAM An invalid parameter was specified. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_CPUCacheFlush( + vmk_PCPUID pcpu, + vmk_VA va, + vmk_ByteCount size); + +/* + *********************************************************************** + * vmk_CPUGlobalCacheFlush -- */ /** + * + * \ingroup Platform + * \brief Flushes all modified cache lines on all PCPUs. + * + * \note This function will block. + * + * \note This is an expensive operation that should be used rarely and + * not at all on fast paths. + * + * \retval VMK_OK Cachelines successfully flushed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_CPUGlobalCacheFlush(void); + #endif /* _VMKAPI_PLATFORM_H_ */ /* @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_status.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_status.h index 511ada9..a6a749b 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_status.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_status.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2004 - 2009 VMware, Inc. All rights reserved. + * Copyright 2004 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -216,7 +216,7 @@ DEFINE_VMK_ERR(VMK_MEM_MIN_GT_MEMSIZE, "Memory min exceeds memSize", EINVAL )\ DEFINE_VMK_ERR(VMK_NO_SUCH_VT, "No virtual terminal for number", ENXIO )\ DEFINE_VMK_ERR(VMK_TOO_MANY_ELEMENTS, "Too many elements for list", E2BIG )\ - DEFINE_VMK_ERR(VMK_SHAREDAREA_MISMATCH, "VMM<->VMK shared are mismatch", ENOSYS )\ + DEFINE_VMK_ERR(VMK_SHAREDAREA_MISMATCH, "VMM<->VMK shared area mismatch", ENOSYS )\ DEFINE_VMK_ERR(VMK_EXEC_FAILURE, "Failure during exec while original state already lost", ESRCH )\ DEFINE_VMK_ERR(VMK_INVALID_MODULE, "Invalid module", EINVAL )\ DEFINE_VMK_ERR(VMK_UNALIGNED_ADDRESS, "Address is not aligned on required boundary", EINVAL )\ @@ -349,7 +349,7 @@ DEFINE_VMK_ERR(VMK_MODULE_NONAMESPACE, "Module tried to export a symbol but didn't provide a name space", ENOENT )\ DEFINE_VMK_ERR(VMK_FS_OBJECT_UNLINKED, "File system object is unlinked", EINVAL )\ DEFINE_VMK_ERR(VMK_HBR_WIRE_INSTANCE_ABORTED, "Replication instance was aborted", ECANCELED )\ - DEFINE_VMK_ERR(VMK_HBR_WIRE_NEED_FULL_SYNC, "Replicated disk needs full sync", EINVAL )\ + DEFINE_VMK_ERR(VMK_HBR_WIRE_NEED_FULL_SYNC, "Replicated disk needs full synchronization", EINVAL )\ DEFINE_VMK_ERR(VMK_HBR_WIRE_DISK_SET_MISMATCH, "The set of disks on the replication server doesn't match", EINVAL )\ DEFINE_VMK_ERR(VMK_HBR_WIRE_REQUEST_CHECKSUM_MISMATCH, "The checksum for the replication request was invalid", EINVAL )\ DEFINE_VMK_ERR(VMK_HBR_WIRE_RESPONSE_CHECKSUM_MISMATCH, "The checksum for the replication response was invalid", EINVAL )\ @@ -362,7 +362,12 @@ DEFINE_VMK_ERR(VMK_EPROTOTYPE, "Invalid protocol for connection", EPROTOTYPE )\ DEFINE_VMK_ERR(VMK_MODULE_CONSUMED_RESOURCE_COUNT_NOT_ZERO, "Consumed resource count of module is not zero", EBUSY )\ DEFINE_VMK_ERR(VMK_HBR_SERVER_DOES_NOT_SUPPORT_REQUEST, "vSphere Replication Server does not support request", EOPNOTSUPP )\ - DEFINE_VMK_ERR(VMK_STALE_FILEHANDLE, "Stale file handle", ESTALE)\ + DEFINE_VMK_ERR(VMK_STALE_FILEHANDLE, "Stale file handle", ESTALE )\ + DEFINE_VMK_ERR(VMK_VVOL_UNBOUND, "Virtual volume not bound", ENODEV )\ + DEFINE_VMK_ERR(VMK_DEVICE_NOT_READY_FAIL_OPEN, "Device open failed with no-retry", EPERM )\ + DEFINE_VMK_ERR(VMK_NOT_THIS_DEVICE, "Not for this device", EINVAL )\ + DEFINE_VMK_ERR(VMK_IGNORE, "Ignore", EINVAL )\ + DEFINE_VMK_ERR(VMK_OBJECT_DESTROYED, "Object is being or has been destroyed.", EINVAL )\ /* --- ADD NEW ERROR CODES ABOVE THIS COMMENT. VMK_GENERIC_LINUX_ERROR must be last. --- */ \ DEFINE_VMK_ERR_AT(VMK_GENERIC_LINUX_ERROR, "Generic service console error", 0x2bad0000, EIO ) /* --- Don't add ERR_AT with negative value. --- */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_time.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_time.h index 9db58db..8934bff 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_time.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_time.h @@ -30,12 +30,15 @@ /** \brief Known invalid value for a timer */ #define VMK_INVALID_TIMER ((vmk_Timer)NULL) +/** \brief Known invalid value for a timer queue */ +#define VMK_INVALID_TIMER_QUEUE ((vmk_TimerQueue)NULL) + typedef vmk_int64 vmk_TimerRelCycles; typedef vmk_uint64 vmk_TimerCycles; typedef vmk_AddrCookie vmk_TimerCookie; -typedef void (*vmk_TimerCallback)(vmk_TimerCookie data); typedef struct vmk_TimerInt *vmk_Timer; +typedef struct vmk_TimerQueueInt *vmk_TimerQueue; /** * \brief Representation for Time @@ -45,6 +48,27 @@ typedef struct { vmk_int64 usec; /* microseconds */ } vmk_TimeVal; +/** + * \brief Attributes dictating timer queue behavior + */ +typedef vmk_uint64 vmk_TimerQueueAttributes; + +/** normal timer queue */ +#define VMK_TIMER_QUEUE_ATTR_NONE (0) + +/** low latency timer queue */ +#define VMK_TIMER_QUEUE_ATTR_LOW_LATENCY (1 << 0) + +/** + * \brief Properties for a new timer queue + */ +typedef struct { + vmk_Name name; + vmk_ModuleID moduleID; + vmk_HeapID heapID; + vmk_TimerQueueAttributes attribs; +} vmk_TimerQueueProps; + /** * \brief Timer Attributes */ @@ -54,6 +78,8 @@ typedef vmk_uint64 vmk_TimerAttributes; #define VMK_TIMER_ATTR_NONE (0) /** Periodic timer */ #define VMK_TIMER_ATTR_PERIODIC (1 << 0) +/** Default tolerance value */ +#define VMK_TIMER_DEFAULT_TOLERANCE (-1) /* Convenient time constants */ @@ -74,6 +100,24 @@ typedef vmk_uint64 vmk_TimerAttributes; #define VMK_TIMEOUT_UNLIMITED_MS (VMK_UINT32_MAX) +/* + *********************************************************************** + * vmk_TimerCallback -- */ /** + * + * \brief Callback function invoked when timer fires. + * + * \note This callback is allowed to block; however, ready timers on + * the same vmk_TimerQueue will not fire until the firing timer + * has finished, so blocking in this callback may delay other + * scheduled timers. + * + * \param[in] data vmk_TimerCookie provided when timer scheduled. + * + *********************************************************************** + */ +typedef void (*vmk_TimerCallback)(vmk_TimerCookie data); + + /* *********************************************************************** * vmk_GetTimerCycles -- */ /** @@ -286,7 +330,7 @@ void vmk_DelayUsecs( /* *********************************************************************** - * vmk_TimerSchedule -- */ /** + * vmk_TimerScheduleCustom -- */ /** * * \brief Schedule a timer * @@ -300,10 +344,78 @@ void vmk_DelayUsecs( * system-wide, and exceeding the limit is a fatal error. * * \param[in] moduleID ID of the module to which callback belongs + * \param[in] queue The timer queue to use for the timer * \param[in] callback Timer callback. * \param[in] data Argument passed to the timer callback on * timeout. * \param[in] timeoutUS Timeout in microseconds. + * \param[in] toleranceUS Tolerance in microseconds. Indicates a + * request that the timer fire approximately + * no later than the provided value from the + * requested time. The majority of callers + * should specify a tolerance of + * VMK_TIMER_DEFAULT_TOLERANCE and only use + * other values for timers that have strict + * timing requirements. + * \param[in] attributes Additional timer attributes + * \param[in] lockDomain Lock domain in which to check the lock rank. + * Note that if lockDomain is set to invalid + * then rank has to be set to unranked and if + * lockDomain is set to a valid value then + * rank has to contain a valid rank value. + * \param[in] lockRank Rank of the timer + * \param[out] wasPending If rescheduling a timer, was it previously + * pending? (optional) + * \param[out] timer Timer Handle + * + * \retval VMK_NO_RESOURCES Couldn't schedule the timer. + * \retval VMK_OK The timer was successfully scheduled. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TimerScheduleCustom( + vmk_ModuleID moduleID, + vmk_TimerQueue queue, + vmk_TimerCallback callback, + vmk_TimerCookie data, + vmk_int64 timeoutUS, + vmk_int64 toleranceUS, + vmk_TimerAttributes attributes, + vmk_LockDomainID lockDomain, + vmk_LockRank lockRank, + vmk_Bool *wasPending, + vmk_Timer *timer); + + +/* + *********************************************************************** + * vmk_TimerSchedule -- */ /** + * + * \brief Schedule a timer + * + * The VMKernel can schedule simultaneously a limited number of timers + * for each CPU. + * + * \note This function will not block. + * + * \warning Timers are a limited resource. The VMKernel does not + * guarantee to provide more than 100 concurrent timers per CPU + * system-wide, and exceeding the limit is a fatal error. + * + * \param[in] queue The timer queue to use for the timer + * \param[in] callback Timer callback. + * \param[in] data Argument passed to the timer callback on + * timeout. + * \param[in] timeoutUS Timeout in microseconds. + * \param[in] toleranceUS Tolerance in microseconds. Indicates a + * request that the timer fire approximately + * no later than the provided value from the + * requested time. The majority of callers + * should specify a tolerance of + * VMK_TIMER_DEFAULT_TOLERANCE and only use + * other values for timers that have strict + * timing requirements. * \param[in] attributes Additional timer attributes * \param[in] lockDomain Lock domain in which to check the lock rank. * Note that if lockDomain is set to invalid @@ -320,10 +432,11 @@ void vmk_DelayUsecs( */ VMK_ReturnStatus vmk_TimerSchedule( - vmk_ModuleID moduleID, + vmk_TimerQueue queue, vmk_TimerCallback callback, vmk_TimerCookie data, vmk_int64 timeoutUS, + vmk_int64 toleranceUS, vmk_TimerAttributes attributes, vmk_LockDomainID lockDomain, vmk_LockRank lockRank, @@ -389,9 +502,63 @@ VMK_ReturnStatus vmk_TimerCancel( * *********************************************************************** */ + vmk_Bool vmk_TimerIsPending( vmk_Timer timer); + +/* + *********************************************************************** + * vmk_TimerQueueCreate -- */ /** + * + * \brief Create a timer queue. + * + * \note This function will may block. + * + * \param[in] props Properties of the new timer queue. + * + * \param[out] queue The newly created queue. + * + * \retval VMK_OK The timer queue was created successfuly, + * and can now be used to schedule timers. + * + * \retval VMK_BAD_PARAM Invalid parameters passed into the function. + * Make sure that all fields in the provided + * properties are valid. + * + * \retval VMK_NO_RESOURCES Ran out of resources to create the timer + * queue. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TimerQueueCreate( + vmk_TimerQueueProps *props, + vmk_TimerQueue *queue); + + +/* + *********************************************************************** + * vmk_TimerQueueDestroy -- */ /** + * + * \brief Destroy a timer queue. All timers in the queue are cancelled. + * Memory for the timer queue and associate timers is released + * back to the heap that the queue was allocated from. + * + * \note This function will may block. + * + * \param[in] queue The queue. + * + * \retval VMK_OK The timer queue is destroyed. + * + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TimerQueueDestroy( + vmk_TimerQueue queue); + + #endif /* _VMKAPI_TIME_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_time_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_time_incompat.h index e5ae32d..d1ce102 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_time_incompat.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_time_incompat.h @@ -40,7 +40,6 @@ extern volatile unsigned long _vmk_jiffies; #define vmk_jiffies _vmk_jiffies - /* *********************************************************************** * vmk_TimerAdd -- */ /** @@ -171,5 +170,46 @@ VMK_ReturnStatus vmk_TimerRemoveSync( vmk_Timer timer); +/* + *********************************************************************** + * vmk_TimerQueueIsCurrentWorld -- */ /** + * + * \ingroup Time + * \brief Is the current world a timer queue world? + * + * Each timer queue executes timers in a specific world. This identifies + * if the currently running world belongs to the provided timer queue. + * + * \param[in] queue The timer queue. + * + * \retval VMK_TRUE This is the world that executes timers + * for the timer queue. + * \retval VMK_FALSE This world is not the timer queue's world. + * + *********************************************************************** + */ +vmk_Bool vmk_TimerQueueIsCurrentWorld( + struct vmk_TimerQueueInt *queue); + +/* + *********************************************************************** + * vmk_TimerQueueMaxHeapSize -- */ /** + * + * \ingroup Time + * \brief Maximum heap required for a timer queue. + * + * When creating a timer queue, one needs to specify a heap. + * This function determines the amount of bytes that a timer queue + * with a specified maximum number of timers will require. + * + * \param[in] maxTimers Maximum number of timers + * + * \retval vmk_ByteCount Maximum bytes required for the timer queue. + * + *********************************************************************** + */ +vmk_ByteCount vmk_TimerQueueMaxHeapSize( + vmk_uint32 maxTimers); + #endif /* _VMKAPI_TIME_INCOMPAT_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_versioned_atomic.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_versioned_atomic.h new file mode 100644 index 0000000..750696c --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_versioned_atomic.h @@ -0,0 +1,192 @@ +/* ********************************************************** + * Copyright 1998 - 2012VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + + +/* + *********************************************************************** + * VersionedAtomic */ /** + * \defgroup VersionedAtomic Version Atomic + * + * \par Versioned atomic synchronization: + * These synchronization macros allow single-writer/many-reader access + * to data, based on Leslie Lamport's paper "Concurrent Reading and + * Writing", Communications of the ACM, November 1977.\n + * \n + * Many-writer/many-reader can be implemented on top of versioned + * atomics by using an additional spin lock to synchronize writers. + * This is preferable for cases where readers are expected to greatly + * outnumber writers.\n + * \n + * Multiple concurrent writers to the version variables are not allowed. + * Even if writers are working on lock-free or disjoint data, the + * version counters are not interlocked for read-modify-write.\n + * \n + * Recursive use of versioned atomics in writers is currently not + * supported. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_VERSIONED_ATOMIC_H +#define _VMKAPI_VERSIONED_ATOMIC_H + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** + * \brief Versioned Atomic + */ + +typedef struct vmk_VersionedAtomic { + /** version 0 */ + volatile vmk_uint32 v0; + + /** version 1 */ + volatile vmk_uint32 v1; +} VMK_ATTRIBUTE_ALIGN(4) vmk_VersionedAtomic; + + +/* + *********************************************************************** + * vmk_VersionedAtomicInit -- */ /** + * + * \brief Intiialize a versioned atomic + * \param[in] versions Pointer to the versioned atomic to be + * initialized + * + *********************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_VersionedAtomicInit(vmk_VersionedAtomic *versions) +{ + versions->v0 = 0; + versions->v1 = 0; +} + + +/* + *********************************************************************** + * vmk_VersionedAtomicBeginWrite -- */ /** + * + * \brief Writer begins write to protected data + * + * Called by a writer to indicate that the data protected by a given + * atomic version is about to change. Effectively locks out all readers + * until EndWrite is called. + * + * \param[in] versions Pointer to the versioned atomic protecting + * the data + * + *********************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_VersionedAtomicBeginWrite(vmk_VersionedAtomic *versions) +{ + VMK_ASSERT(((vmk_uint64)(&versions->v0) & (sizeof(versions->v0) - 1)) == 0); + VMK_ASSERT(versions->v1 == versions->v0); + versions->v0++; + vmk_CPUMemFenceReadWrite(); +} + + +/* + *********************************************************************** + * vmk_VersionedAtomicEndWrite -- */ /** + * + * \brief Writer finishes writing to protected data + * + * Called by a writer after it is done updating shared data. Lets + * pending and new readers proceed on shared data. + * + * \param[in] versions Pointer to the versioned atomic protecting + * the data + * + *********************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_VersionedAtomicEndWrite(vmk_VersionedAtomic *versions) +{ + VMK_ASSERT(((vmk_uint64)(&versions->v1) & (sizeof(versions->v1) - 1)) == 0); + VMK_ASSERT(versions->v1 + 1 == versions->v0); + vmk_CPUMemFenceReadWrite(); + versions->v1 = versions->v0; +} + + + +/* + *********************************************************************** + * vmk_VersionedAtomicBeginTryRead -- */ /** + * + * \brief Reader tries to read protected data + * + * Called by a reader before it tried to read shared data. + * + * \param[in] versions Pointer to the versioned atomic protecting + * the data + * + * \retval Returns a version number to the reader. This + * version number is required to confirm + * validity of the read operation when reader + * calls vmk_VersionedAtomicEndTryRead. + * + *********************************************************************** + */ + +static VMK_ALWAYS_INLINE vmk_uint32 +vmk_VersionedAtomicBeginTryRead(const vmk_VersionedAtomic *versions) +{ + vmk_uint32 readVersion; + + readVersion = versions->v1; + vmk_CPUMemFenceReadWrite(); + + return readVersion; +} + + +/* + *********************************************************************** + * vmk_VersionedAtomicEndTryRead -- */ /** + * + * \brief Reader finished reading protected data + * + * Called by a reader after it finishes reading shared data, to confirm + * validity of the data that was just read, to make sure that a writer + * did not intervene while the read was in progress. + * + * \param[in] versions Pointer to the versioned atomic protecting + * the data + * \param[in] readVersion The version number the reader just read, + * returned by vmk_VersionedAtomicBeginTryRead + * + * \retval VMK_TRUE if the data read between + * vmk_VersionedAtomicBeginTryRead() and this + * call is valid. + * \retval VMK_FALSE otherwise. + * + *********************************************************************** + */ +static VMK_ALWAYS_INLINE vmk_Bool +vmk_VersionedAtomicEndTryRead(const vmk_VersionedAtomic *versions, + vmk_uint32 readVersion) +{ + vmk_CPUMemFenceReadWrite(); + return VMK_LIKELY(versions->v0 == readVersion); +} + +#endif //__VMKAPI_VERSIONED_ATOMIC_H +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world.h index b047d64..8b0036f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2007 - 2009 VMware, Inc. All rights reserved. + * Copyright 2007 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -15,7 +15,16 @@ * are used to represent kernel threads, user processes, virtual CPUs, * etc. Each world is identified by an ID that is unique within the * system called the World ID. Worlds are blockable contexts; it is safe - * to call functions that may block from a world context. + * to call functions that may block from a world context. + * + * User processes also belong to cartels. A cartel is a group of worlds + * that share certain resources including but not limited to their + * address space. A cartel can be thought of as a user process and the + * individual worlds that make up the cartel can be thought of as user + * threads. Each user world will have a world ID and a cartel ID. Each + * world in a cartel will share the same cartel ID. Note that it is + * possible for a world's world ID and cartel ID to be equal, but + * this can only be true for at most one world in the cartel. * *@{ *********************************************************************** @@ -30,6 +39,8 @@ #endif /** \endcond never */ +#include "device/vmkapi_vector_types.h" + /** * \brief Event to block on. * @@ -45,11 +56,63 @@ typedef vmk_int32 vmk_WorldID; #define VMK_INVALID_WORLD_ID ((vmk_WorldID)0) +/** \brief Special vmk_WorldEventID for a no-event wait + * + * When used as the eventId parameter to vmk_WorldWait(), + * the world will wait without being added to the system's + * internal event queue. This allows for a lighter weight + * synchronization mechanism, though the world sleeping in + * this fashion can be awoken only by vmk_WorldForceWakeup(), + * by a timeout, or if the world is being destroyed. + */ +#define VMK_EVENT_NONE ((vmk_WorldEventID)0) + /** * \brief Indication of unlimited CPU allocation (max) */ #define VMK_CPU_ALLOC_UNLIMITED ((vmk_uint32) -1) +/** + * \brief Scheduler Class for a World + * + * Worlds of class VMK_WORLD_SCHED_CLASS_QUICK will be scheduled + * to run ahead of worlds of class VMK_WORLD_SCHED_CLASS_DEFAULT. + * Please be careful to use VMK_WORLD_SCHED_CLASS_QUICK only for + * small deferred tasks that must execute promptly. + * + * If unsure of what class to use, pick VMK_WORLD_SCHED_CLASS_DEFAULT. + */ +typedef enum { + + /** Default scheduler class for kernel threads. */ + VMK_WORLD_SCHED_CLASS_DEFAULT = 1, + + /** Scheduler class for kernel threads that must execute prompty. */ + VMK_WORLD_SCHED_CLASS_QUICK = 100, + +} vmk_WorldSchedClass; + +/** + * \brief Properties for creating a new world. + */ +typedef struct vmk_WorldProps { + /** \brief Name associated with this world. */ + const char *name; + + /** \brief Module ID of the module creating this world. */ + vmk_ModuleID moduleID; + + /** \brief Function that the world begins executing at creation. */ + vmk_WorldStartFunc startFunction; + + /** \brief Opaque argument to the startFunction. */ + void *data; + + /** \brief Scheduler class for the new world. */ + vmk_WorldSchedClass schedClass; + +} vmk_WorldProps; + /* *********************************************************************** * vmk_WorldCreate -- */ /** @@ -59,34 +122,51 @@ typedef vmk_int32 vmk_WorldID; * * \note This function may block. * - * \warning Code running inside a world should allow the scheduler to - * run as often as possible. This can be achieved by calling - * vmk_WorldYield. At most code should run 30ms without calling - * vmk_WorldYield. + * \warning Code running inside a system world can be preempted by + * default. Code should be careful not to access Per-PCPU + * Storage, or to hold locks of type VMK_SPINLOCK_IRQ, for + * a period time exceeding 10us - since these acquisitions + * block preemption. * - * \param[in] moduleID Module on whose behalf the world is running. - * \param[in] name A string that describes the world. The name - * will show up as debug information. - * \param[in] startFunction Function that the world begins executing - * on creation. - * \param[in] data Argument to be passed to startFunction. + * \param[in] props Properties of this world. * \param[out] worldId World ID associated with the newly - * created world. May be set to NULL if - * the caller does not need the World ID. + * created world. If caller sets this + * poitner to NULL, then the World ID is + * not returned. * * \retval VMK_OK World created. * \retval VMK_NO_MEMORY Ran out of memory. * \retval VMK_DEATH_PENDING World is in the process of dying. * \retval VMK_NO_MODULE_HEAP The module's heap is not set. + * \retval VMK_BAD_PARAM The priority specified is in the + * properties is invalid. * *********************************************************************** */ -VMK_ReturnStatus vmk_WorldCreate( - vmk_ModuleID moduleID, - const char *name, - vmk_WorldStartFunc startFunction, - void *data, - vmk_WorldID *worldId); +VMK_ReturnStatus vmk_WorldCreate(vmk_WorldProps *props, + vmk_WorldID *worldId); + +/* + *********************************************************************** + * vmk_WorldDestroy -- */ /** + * + * \ingroup Worlds + * \brief Destroy a world created by vmk_WorldCreate. + * + * \note This function may block. + * + * \note This function does not wait for the world to actually die. + * Use vmk_WorldWaitForDeath() to wait for death. + * + * \param[in] worldID vmk_WorldID of the world to destroy. + * + * \retval VMK_OK Kill was successfully posted. + * \retval VMK_NOT_FOUND Specified worldID was not found. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_WorldDestroy( + vmk_WorldID worldID); /* *********************************************************************** @@ -121,6 +201,42 @@ void vmk_WorldExit(VMK_ReturnStatus status); vmk_WorldID vmk_WorldGetID( void); +/* + *********************************************************************** + * vmk_WorldGetCartelID -- */ /** + * + * \ingroup Worlds + * \brief Get the Cartel ID of the current world. + * + * \note This function will not block. + * + * \return WorldID of the cartel of the currently running world that + * this call was invoked from or VMK_INVALID_WORLD_ID if + * this call was not invoked from a user world context. + * + *********************************************************************** + */ +vmk_WorldID vmk_WorldGetCartelID( + void); + +/* + *********************************************************************** + * vmk_WorldIDToCartelID -- */ /** + * + * \ingroup Worlds + * \brief Get the Cartel ID of the specified world. + * + * \note This function will not block. + * + * \return WorldID of the cartel of the provided world ID or + * VMK_INVALID_WORLD_ID if the provided world is not a user + * world context. + * + *********************************************************************** + */ +vmk_WorldID vmk_WorldIDToCartelID( + vmk_WorldID worldID); + /* *********************************************************************** * vmk_WorldAssertIsSafeToBlockInt -- @@ -168,16 +284,19 @@ vmk_WorldAssertIsSafeToBlock( * * \note This function may block. * - * \note Spurious wakeups are possible + * \note Spurious wakeups are possible. Specifially, users of this + * API must always verify that the condition on which they + * are waiting has actually occurred before taking action. * - * \note For worlds holding IRQ locks, use vmk_WorldWaitIRQ(). - * - * \param[in] eventId System wide unique identifier of the event - * to sleep on. - * \param[in] lock Lock of type VMK_SPINLOCK or VMK_SPINLOCK_IRQ - * to release before descheduling the world. - * VMK_LOCK_INVALID indicates that no lock needs - * to be released before descheduling the world. + * \param[in] eventId Either a system wide unique identifier for the + * event to sleep on, or VMK_EVENT_NONE. When + * VMK_EVENT_NONE is specified, the world can be + * awoken only by vmk_WorldForceWakeup(), by a + * timeout, or if the world is being destroyed. + * \param[in] lock Lock of type VMK_SPINLOCK to release before + * descheduling the world. VMK_LOCK_INVALID + * indicates that no lock needs to be released + * before descheduling the world. * \param[in] timeoutMS Number of milliseconds before timeout * VMK_TIMEOUT_UNLIMITED_MS indicates that the * caller wants to block forever. @@ -213,63 +332,6 @@ VMK_ReturnStatus vmk_WorldWait( const char *reason); -/* - *********************************************************************** - * vmk_WorldWaitIRQ -- */ /** - * - * \brief Deschedule a World holding an IRQ Lock until awakened or until - * the specified timeout expires. - * - * \note This function may block. - * - * \note Spurious wakeups are possible - * - * \note For worlds holding non-IRQ locks, use vmk_WorldWait(). - * - * \param[in] eventId System wide unique identifier of the event - * to sleep on. - * \param[in] lock Lock of type VMK_SPINLOCK or VMK_SPINLOCK_IRQ - * to release before descheduling the world. - * VMK_LOCK_INVALID indicates that no lock needs - * to be released before descheduling the world. - * \param[in] irql IRQ level of lock provided by - * vmk_SpinlockLockIRQ(). - * \param[in] timeoutMS Number of milliseconds before timeout - * VMK_TIMEOUT_UNLIMITED_MS indicates that the - * caller wants to block forever. - * VMK_TIMEOUT_NONBLOCKING is not a valid value - * in this context. - * \param[in] reason A short string that explains the reason for - * the vmk_WorldWait call. - * - * \retval VMK_OK World was descheduled and awoken by a - * vmk_WorldWakeup on eventId. - * \retval VMK_BAD_PARAM World was not descheduled because a - * provided parameter was invalid. If a - * lock was provided then it was not - * released. - * \retval VMK_TIMEOUT World was descheduled and awoken - * because of timeout expiration. - * \retval VMK_DEATH_PENDING World was descheduled and awoken - * because the world is dying and being - * reaped by the scheduler. The caller is - * expected to return as soon as possible. - * \retval VMK_WAIT_INTERRUPTED World was descheduled and awoken for - * some other reason not specified by - * previous return codes. The caller is - * allowed to re-enter vmk_WorldWait. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_WorldWaitIRQ( - vmk_WorldEventID eventId, - vmk_Lock lock, - vmk_LockIRQL irql, - vmk_uint32 timeoutMS, - const char *reason); - - /* *********************************************************************** * vmk_WorldWakeup -- */ /** @@ -289,6 +351,35 @@ VMK_ReturnStatus vmk_WorldWaitIRQ( VMK_ReturnStatus vmk_WorldWakeup( vmk_WorldEventID eventId); +/* + *********************************************************************** + * vmk_WorldForceWakeup -- */ /** + * + * \ingroup Worlds + * \brief Wake up a specific world directly, regardless of what + * event it is waiting on. + * + * \note This function may block. + * + * \note A forced wakeup is special, in that the wakeup it generates + * is "stateful" when used in conjuction with VMK_EVENT_NONE. + * Specifically, if a world is not waiting when a forced wakeup + * is generated, then the wakeup goes pending. If the world + * then attempts to wait on VMK_EVENT_NONE, the world will + * not sleep (and the pending is cleared). + * + * \param[in] worldID World ID of the world to wake up. + * + * \retval VMK_OK The world was awoken. + * \retval VMK_NOT_FOUND The world was not found to need wakeup. + * \retval VMK_INVALID_WORLD The world ID did not correspond to an + * existing world. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_WorldForceWakeup( + vmk_WorldID worldID); + /* *********************************************************************** * vmk_WorldSleep -- */ /** @@ -414,7 +505,110 @@ vmk_uint32 vmk_WorldsMax(void); * *********************************************************************** */ -VMK_ReturnStatus vmk_WorldWaitForDeath(vmk_WorldID worldID); +VMK_ReturnStatus vmk_WorldWaitForDeath( + vmk_WorldID worldID); + +/* + *********************************************************************** + * vmk_WorldInterruptSet -- */ /** + * + * \brief Sets an interrupt association for the specified world. + * + * Interrupts will be delivered to the same PCPU that this world is + * running on. + * + * \note This function will not block. + * + * \param[in] worldID ID of the world to set interrupt + * association for. + * \param[in] intrCookie Interrupt cookie previously retrieved via + * vmk_IntrRegister + * + * \retval VMK_OK The vector association has been set. + * \retval VMK_BAD_PARAM The specified vector is invalid. + * \retval VMK_LIMIT_EXCEEDED The specified vector cannot be added. + * \retval VMK_INVALID_WORLD The specified world id was invalid. + * \retval VMK_FAILURE The interrupt association cannot be set. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_WorldInterruptSet( + vmk_WorldID worldID, + vmk_IntrCookie intrCookie); + +/* + *********************************************************************** + * vmk_WorldInterruptUnset -- */ /** + * + * \ingroup Worlds + * \brief Unsets an interrupt association for the specified world. + * + * \note This function will not block. + * + * \param[in] worldID ID of the world to unset interrupt + * association for. + * \param[in] intrCookie Interrupt cookie previously retrieved via + * vmk_IntrRegister + * + * \retval VMK_OK The interrupt association has been unset. + * \retval VMK_NOT_FOUND The interrupt is currently not associated + * with the world. + * \retval VMK_INVALID_WORLD The specified world id was invalid. + * \retval VMK_FAILURE The interrupt association cannot be unset. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_WorldInterruptUnset( + vmk_WorldID worldID, + vmk_IntrCookie intrCookie); + +/* + *********************************************************************** + * vmk_WorldRelationAdd -- */ /** + * + * \brief Add a relationship between two worlds + * + * This interface should be used to give a hint to the scheduler that there is a + * communication flow from world A to world B. This is useful for multi-threaded + * producer-consumer implementations. World A would equal the producer and world + * B would equal the consumer. If both worlds can be a producer and consumer + * then the interface should be called twice. + * Establishing a relationship between worlds is an important performance + * optimization and should always be done for worlds that are part of a hot + * path. + * + * \note This function might block. + * + * \param[in] worldA ID of the world initiating the communication. + * \param[in] worldB ID of the world receiving the communication. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_WorldRelationAdd( + vmk_WorldID worldA, + vmk_WorldID worldB); + + +/* + *********************************************************************** + * vmk_WorldRelationRemove -- */ /** + * + * \brief Remove a relationship between two worlds + * + * The relationship must have previously been set through vmk_WorldRelationAdd. + * + * \note This function might block. + * + * \param[in] worldA ID of the world initiating the communication. + * \param[in] worldB ID of the world receiving the communication. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_WorldRelationRemove( + vmk_WorldID worldA, + vmk_WorldID worldB); #endif /* _VMKAPI_WORLD_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world_deprecated.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world_deprecated.h new file mode 100644 index 0000000..e485784 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world_deprecated.h @@ -0,0 +1,96 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ****************************************************************************** + * Worlds */ /** + * + * \addtogroup Core + * @{ + * \addtogroup Worlds + * @{ + * \defgroup Deprecated Deprecated APIs + * @{ + * + ****************************************************************************** + */ + + +#ifndef _VMKAPI_WORLDS_DEPRECATED_H_ +#define _VMKAPI_WORLDS_DEPRECATED_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/* + *********************************************************************** + * vmk_WorldWaitIRQ -- */ /** + * + * \brief Deschedule a World holding an IRQ Lock until awakened or until + * the specified timeout expires. + * + * \deprecated + * + * \note This function may block. + * + * \note Spurious wakeups are possible + * + * \note For worlds holding non-IRQ locks, use vmk_WorldWait(). + * + * \param[in] eventId System wide unique identifier of the event + * to sleep on. + * \param[in] lock Lock of type VMK_SPINLOCK or VMK_SPINLOCK_IRQ + * to release before descheduling the world. + * VMK_LOCK_INVALID indicates that no lock needs + * to be released before descheduling the world. + * \param[in] irql IRQ level of lock provided by + * vmk_SpinlockLockIRQ(). + * \param[in] timeoutMS Number of milliseconds before timeout + * VMK_TIMEOUT_UNLIMITED_MS indicates that the + * caller wants to block forever. + * VMK_TIMEOUT_NONBLOCKING is not a valid value + * in this context. + * \param[in] reason A short string that explains the reason for + * the vmk_WorldWait call. + * + * \retval VMK_OK World was descheduled and awoken by a + * vmk_WorldWakeup on eventId. + * \retval VMK_BAD_PARAM World was not descheduled because a + * provided parameter was invalid. If a + * lock was provided then it was not + * released. + * \retval VMK_TIMEOUT World was descheduled and awoken + * because of timeout expiration. + * \retval VMK_DEATH_PENDING World was descheduled and awoken + * because the world is dying and being + * reaped by the scheduler. The caller is + * expected to return as soon as possible. + * \retval VMK_WAIT_INTERRUPTED World was descheduled and awoken for + * some other reason not specified by + * previous return codes. The caller is + * allowed to re-enter vmk_WorldWait. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_WorldWaitIRQ( + vmk_WorldEventID eventId, + vmk_Lock lock, + vmk_LockIRQL irql, + vmk_uint32 timeoutMS, + const char *reason); + + +#endif +/** @} */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world_incompat.h index 05e7fa1..6fcf056 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world_incompat.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_world_incompat.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010, 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -140,42 +140,6 @@ VMK_ReturnStatus vmk_WorldTimedWaitLegacy( vmk_uint64 timeoutUs, vmk_Bool *timedOut); -/* - *********************************************************************** - * vmk_WorldTimedWaitIRQ -- */ /** - * - * \ingroup Worlds - * \brief Deschedule a World holding an IRQ Spinlock until awakened - * or until the specified timeout expires. - * - * \note Spurious wakeups are possible. - * - * \param[in] eventId System wide unique identifier of the event - * to sleep on. - * \param[in] lock Non-IRQ spinlock to release before - * descheduling the world. - * \param[in] reason Subsystem/reason for the descheduling - * \param[in] timeoutUs Number of microseconds before timeout. - * \param[in] flags IRQ flags returned by IRQ spinlock function. - * \param[out] timedOut If non-NULL, set to TRUE if wakeup was - * due to timeout expiration, FALSE otherwise. - * - * \retval VMK_OK Woken up by a vmk_WorldWakeup on - * eventId or by timeout expiration. - * \retval VMK_DEATH_PENDING Woken up because the world is dying - * and being reaped by the scheduler. - * \retval VMK_WAIT_INTERRUPTED Woken for some other reason. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_WorldTimedWaitIRQLegacy( - vmk_WorldEventID eventId, - vmk_SpinlockIRQ *lock, - vmk_WorldWaitReason reason, - unsigned long flags, - vmk_uint64 timeoutUs, - vmk_Bool *timedOut); - /* *********************************************************************** * vmk_WorldSetAffinity -- */ /** @@ -202,23 +166,5 @@ VMK_ReturnStatus vmk_WorldSetAffinity( vmk_WorldID id, vmk_AffinityMask affinityMask); -/* - *********************************************************************** - * vmk_WorldGetCartelID -- */ /** - * - * \ingroup Worlds - * \brief Get the Cartel ID of the current world. - * - * \note This function will not block. - * - * \return WorldID of the cartel of the currently running world that - * this call was invoked from or VMK_INVALID_WORLD_ID if - * this call was not invoked from a user world context. - * - *********************************************************************** - */ -vmk_WorldID vmk_WorldGetCartelID( - void); - #endif /* _VMKAPI_WORLD_INCOMPAT_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_worldlet.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_worldlet.h index d9bd10d..3440556 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_worldlet.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_worldlet.h @@ -50,7 +50,6 @@ typedef enum { * \brief Worldlet Affinity Tracker object. */ typedef struct vmk_WorldletAffinityTracker vmk_WorldletAffinityTracker; -typedef struct vmk_WorldletAffinityTracker vmk_WorldletInterruptTracker; /* ******************************************************************************* @@ -372,11 +371,11 @@ VMK_ReturnStatus vmk_WorldletSetAffinityToWorldlet( * vmk_WorldletSetAffinityToWorld -- */ /** * * \ingroup Worldlet - * \brief Sets the affinity of one worldlet to another. + * \brief Sets the affinity of one worldlet to a world. * - * This means that the system will attempt to execute the "worldlet" worldlet - * on the same CPU as the "target" worldlet. Unsetting this affinity is - * accomplished by using a VMK_INVALID_WORLD_ID value for the "target" world. + * This means that the system will attempt to execute the "worldlet" worldlet on + * the same CPU as the "target" world. Unsetting this affinity is accomplished + * by using a VMK_INVALID_WORLD_ID value for the "target" world. * * \note This function will not block. * @@ -397,18 +396,19 @@ VMK_ReturnStatus vmk_WorldletSetAffinityToWorld( /* ******************************************************************************* - * vmk_WorldletVectorSet -- */ /** + * vmk_WorldletInterruptSet -- */ /** * * \ingroup Worldlet - * \brief Sets the interrupt vector for the worldlet. + * \brief Sets the interrupt cookie for the worldlet. * * Once set, the worldlet scheduler takes over interrupt scheduling. When the * worldlet moves, it's corresponding interrupt is moved too. * * \note This function will not block. * - * \param[in] worldlet Worldlet the vector is associated to - * \param[in] vector Interrupt vector + * \param[in] worldlet Worldlet to set the interrupt association + * \param[in] intrCookie Interrupt cookie previously registered via + * vmk_IntrRegister * * \retval VMK_OK Success. * \retval VMK_INVALID_HANDLE "worldlet" or "target" are invalid. @@ -416,21 +416,21 @@ VMK_ReturnStatus vmk_WorldletSetAffinityToWorld( ******************************************************************************* */ VMK_ReturnStatus -vmk_WorldletVectorSet( +vmk_WorldletInterruptSet( vmk_Worldlet worldlet, - vmk_uint32 vector); + vmk_IntrCookie intrCookie); /* ******************************************************************************* - * vmk_WorldletVectorUnSet -- */ /** + * vmk_WorldletInterruptUnSet -- */ /** * * \ingroup Worldlet - * \brief Disassociate interrupt vector associated with the worldlet. + * \brief Disassociate interrupt cookie associated with the worldlet. * * \note This function will not block. * - * \param[in] worldlet Worldlet the vector is associated to + * \param[in] worldlet Worldlet the interrupt is associated to * * \retval VMK_OK Success. * \retval VMK_INVALID_HANDLE "worldlet" or "target" are invalid. @@ -438,7 +438,7 @@ vmk_WorldletVectorSet( ******************************************************************************* */ VMK_ReturnStatus -vmk_WorldletVectorUnSet( +vmk_WorldletInterruptUnSet( vmk_Worldlet worldlet); /* @@ -696,106 +696,6 @@ vmk_WorldletAffinityTrackerDestroy( vmk_WorldletAffinityTracker *tracker ); -/* - ******************************************************************************* - * vmk_WorldletInterruptTrackerCreate -- */ /** - * - * \ingroup Worldlet - * \brief Create an interrupt/worldlet affinity tracker object. - * - * An affinity tracker object collects samples of world or worldlet ids that - * have a potential affinity relationship with a particular interrupt vector. - * Periodically the user of the tracker object will ask it to calculate an - * affinity setting based on the id which collected the most samples over the - * predetermined time frame (resetTime). A "set threshold" and "drop - * threshold" setting determine the percentage of samples that an id must - * represent so that affinity is set or dropped. - * vmk_WorldletInterruptTrackerCreate should be used to allocate the object and - * subsequently vmk_WorldletInterruptTrackerConfig should be used to set the - * parameters of the tracker object. Until vmk_WorldletInterrupTrackerConfig - * is called the object will not set any affinities. - * - * Caller is required to provide appropriate locking or exclusion. - * - * \note This function will not block. - * - * \param[in] vector Interrupt vector to be managed. - * \param[in] modId Module responsible for memory allocations. - * \param[in] heap Heap the affinity tracker will be allocated from. - * \param[out] tracker Tracker object created. - * - * \retval VMK_OK Success. - * \retval VMK_NO_MEMORY Allocation failed. - * \retval VMK_BAD_PARAM Bad "tracked" pointer. - * - ******************************************************************************* - */ -VMK_ReturnStatus -vmk_WorldletInterruptTrackerCreate( - vmk_uint32 vector, - vmk_ModuleID modId, - vmk_HeapID heap, - vmk_WorldletAffinityTracker **tracker -); - -/* - ******************************************************************************* - * vmk_WorldletInterruptTrackerConfig -- */ /** - * - * \ingroup Worldlet - * \brief Configures a worldlet interrupt tracker object. - * - * Defines the thresholds and reset frequency of an interrupt tracker object. - * May be called multiple times. - * - * Caller is required to provide appropriate locking or exclusion. - * - * \note This function will not block. - * - * \param[in] tracker Tracker object to initialize. - * \param[in] setThresh Usage threshold (%) at which to establish affinity. - * \param[in] dropThresh Usage threshold (%) at which to drop affinity. - * \param[in] resetTimeUS Minimum microseconds between updates. - * - * \retval VMK_OK Success. - * \retval VMK_BAD_PARAM A threshold is invalid (> 100). - * - ******************************************************************************* - */ -VMK_ReturnStatus -vmk_WorldletInterruptTrackerConfig( - vmk_WorldletAffinityTracker *tracker, - vmk_uint16 setThresh, - vmk_uint16 dropThresh, - vmk_uint16 resetTimeUS -); - -/* - ******************************************************************************* - * vmk_WorldletInterruptTrackerDestroy -- */ /** - * - * \ingroup Worldlet - * \brief Destroy a worldlet interrupt tracker object. - * - * Does not alter the affinity of the interrupt vector for which affinity - * tracking is being performed. - * - * Caller is required to provide appropriate locking or exclusion. - * - * \note This function will not block. - * - * \param[in] tracker Tracker object to destroy. - * - * \retval VMK_OK Success. - * \retval VMK_BAD_PARAM Bad "tracker" pointer. - * - ******************************************************************************* - */ -VMK_ReturnStatus -vmk_WorldletInterruptTrackerDestroy( - vmk_WorldletAffinityTracker *tracker -); - /* ******************************************************************************* * vmk_WorldletAffinityTrackerAddWorldSample -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_worldlet_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_worldlet_types.h index 39658f2..8157139 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_worldlet_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/base/vmkapi_worldlet_types.h @@ -38,10 +38,11 @@ typedef vmk_uint32 vmk_WorldletID; #define VMK_INVALID_WORLDLET_ID ((vmk_WorldletID)-1) /** \cond nodoc */ -#define VMK_WDT_OPT_LIST(action) \ - action(WDT_OPT_FORCE_IPI_DISPATCH, "force IPI dispatch", ForceIPIDispatch) \ - action(WDT_OPT_NON_INTERFERING, "ignore interference effect", NonInterfering)\ - action(WDT_OPT_ACTION_AFFINITY, "action affinity", ActionAffinity) +#define VMK_WDT_OPT_LIST(action) \ + action(WDT_OPT_FORCE_IPI_DISPATCH, "force IPI dispatch", ForceIPIDispatch) \ + action(WDT_OPT_NON_INTERFERING, "ignore interference effect", NonInterfering) \ + action(WDT_OPT_ACTION_AFFINITY, "action affinity", ActionAffinity) \ + action(WDT_OPT_ENABLED_VMKSTATS, "enable vmkstats", EnableVmkstats) #define VMK_WDT_OPT_LIST_POPULATE(name, ignore1, ignore2) \ /** \brief Option name */ VMK_##name, diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_accounting.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_accounting.h index 6d053c8..92a33e5 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_accounting.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_accounting.h @@ -34,6 +34,7 @@ */ #define VMK_SERVICE_ACCT_NAME_KERNEL "kernel" #define VMK_SERVICE_ACCT_NAME_SCSI "scsi" +#define VMK_SERVICE_ACCT_NAME_NET "net" /** * \ingroup Accounting diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_bus.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_bus.h index 117281b..d2f5a16 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_bus.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_bus.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010,2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -30,56 +30,6 @@ typedef struct vmkBusType* vmk_BusType; /** \brief A null bustype handle. */ #define VMK_BUSTYPE_NONE ((vmk_BusType)0) -/** \brief Properties of a bus type needed for registration. */ -typedef struct { - /** Module registering the bustype */ - vmk_ModuleID moduleID; - /** Name of bustype */ - vmk_Name name; -} vmk_BusTypeProps; - -/* - *********************************************************************** - * vmk_BusTypeRegister -- */ /** - * - * \brief Register a bus type with the device subsystem. - * - * \note This function will not block. - * - * \param[in] busProps Bus type description data. - * \param[out] busHandle Handle to registered bus type. - * - * \retval VMK_OK Success. - * \retval VMK_EXISTS Bus type is already registered. - * \retval VMK_NO_MEMORY Unable to allocate memory for bus type handle. - * \retval VMK_BAD_PARAM Input parameter is invalid. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_BusTypeRegister(vmk_BusTypeProps *busProps, - vmk_BusType *busHandle); - - -/* - *********************************************************************** - * vmk_BusTypeUnregister -- */ /** - * - * \brief Unregister a bus type. - * - * \note This function will not block. - * - * \param[in] busHandle Handle to registered bus type. - * - * \retval VMK_OK Success - * \retval VMK_BAD_PARAM No bus type object matching given handle. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_BusTypeUnregister(vmk_BusType busHandle); - - /* *********************************************************************** * vmk_BusTypeFind -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_bus_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_bus_incompat.h new file mode 100644 index 0000000..4a88cc4 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_bus_incompat.h @@ -0,0 +1,80 @@ + +/*************************************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Bus */ /** + * \addtogroup Device + * @{ + * \defgroup Bus Bus interface + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_BUS_INCOMPAT_H_ +#define _VMKAPI_BUS_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** \brief Properties of a bus type needed for registration. */ +typedef struct { + /** Module registering the bustype */ + vmk_ModuleID moduleID; + /** Name of bustype */ + vmk_Name name; +} vmk_BusTypeProps; + +/* + *********************************************************************** + * vmk_BusTypeRegister -- */ /** + * + * \brief Register a bus type with the device subsystem. + * + * \note This function will not block. + * + * \param[in] busProps Bus type description data. + * \param[out] busHandle Handle to registered bus type. + * + * \retval VMK_OK Success. + * \retval VMK_EXISTS Bus type is already registered. + * \retval VMK_NO_MEMORY Unable to allocate memory for bus type handle. + * \retval VMK_BAD_PARAM Input parameter is invalid. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_BusTypeRegister(vmk_BusTypeProps *busProps, + vmk_BusType *busHandle); + + +/* + *********************************************************************** + * vmk_BusTypeUnregister -- */ /** + * + * \brief Unregister a bus type. + * + * \note This function will not block. + * + * \param[in] busHandle Handle to registered bus type. + * + * \retval VMK_OK Success + * \retval VMK_BAD_PARAM No bus type object matching given handle. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_BusTypeUnregister(vmk_BusType busHandle); + +#endif /* _VMKAPI_BUS_INCOMPAT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_context_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_context_incompat.h index 607f9eb..1b97022 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_context_incompat.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_context_incompat.h @@ -61,7 +61,7 @@ vmk_ContextType vmk_ContextGetCurrentType( * * \ingroup Contexts * \brief Determine if the current context is an interrupt handler and - * return the interrupt vector being handled. + * return the interrupt cookie being handled. * * \note This function will not block. * @@ -71,7 +71,7 @@ vmk_ContextType vmk_ContextGetCurrentType( *********************************************************************** */ vmk_Bool vmk_ContextIsInterruptHandler( - vmk_uint32 *vector); + vmk_IntrCookie *intrCookie); /* *********************************************************************** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_cpu.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_cpu.h index 32ae6dc..768b3bf 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_cpu.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_cpu.h @@ -97,6 +97,10 @@ void _vmk_PCPURelease(vmk_PCPUID pcpu, * \note Callers are responsible for surrendering the PCPU by calling * VMK_END_WITH_PCPU as quickly as possible * + * \note No locks may be acquired in a VMK_WITH_PCPU_DO / VMK_END_WITH_PCPU + * block. If any locks are required, acquire them before entering the PCPU + * region. + * ****************************************************************************** */ #define VMK_WITH_PCPU_DO(_pcpu) \ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_device.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_device.h index 52c262d..951b4a7 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_device.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_device.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2007 - 2009 VMware, Inc. All rights reserved. + * Copyright 2007 - 2013 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -23,19 +23,6 @@ #endif /** \endcond never */ -/** - * \brief Opaque device type - */ -typedef struct vmkDevice* vmk_Device; - -/** \brief A null device handle. */ -#define VMK_DEVICE_NONE ((vmk_Device )0) - -/** - * \brief Opaque driver type. - */ -typedef struct vmkDriver* vmk_Driver; - /** * \brief Device identification. */ @@ -44,11 +31,17 @@ typedef struct { vmk_BusType busType; /** Bus-specific address for device */ char *busAddress; - /** Length of bus-specific address */ + /** + * String length of bus-specific address (excluding terminating NUL). + * The maximum length supported is 511. + */ vmk_uint32 busAddressLen; /** Bus-specific identifier for device */ char *busIdentifier; - /** Length of bus-specific identifier */ + /** + * String length of bus-specific identifier (excluding terminating NUL). + * The maximum length supported is 63. + */ vmk_uint32 busIdentifierLen; } vmk_DeviceID; @@ -59,14 +52,26 @@ typedef struct { * \ingroup Device * \brief Remove a device. * - * Driver should carry out any operations required for the physical - * removal of a device, and unregister the device object using - * vmk_DeviceUnregister(). + * This callback is invoked only on devices in an unclaimed state. + * A device may be removed for operations such as system shutdown, + * driver unload, or explicit device removal. + * + * Driver should carry out any operations required for the physical + * removal of the device, and the device object must be unregistered + * by calling vmk_DeviceUnregister(). Driver's private data for the + * device, including registeringDriverData, must be freed only after + * successful unregistration of the device. + * + * If the device is not unregistered, this callback may be invoked + * again later. * * \param[in] device Handle to device to be removed. * - * \retval VMK_OK Success - * + * \retval VMK_OK Device unregistered successfully. + * \retval VMK_FAILURE Driver could not unregister device. + * All other error codes are treated as + * VMK_FAILURE. + * *********************************************************************** */ @@ -84,14 +89,16 @@ typedef struct { * \brief Device registration data. */ typedef struct { - /** Module registering this device */ - vmk_ModuleID moduleID; + /** Driver registering this device */ + vmk_Driver registeringDriver; /** Device identification */ vmk_DeviceID *deviceID; /** Device operations */ vmk_DeviceOps *deviceOps; - /** Opaque bus-specific data for this device */ - vmk_AddrCookie busDriverData; + /** Opaque data set by registering driver for its private use */ + vmk_AddrCookie registeringDriverData; + /** Opaque data set by registering driver for attaching driver */ + vmk_AddrCookie registrationData; } vmk_DeviceProps; /* @@ -99,12 +106,21 @@ typedef struct { * vmk_DeviceRegister -- */ /** * * \ingroup Device - * \brief Register a device with the device database and get a - * a device handle back. + * \brief Register a device with the device database and get a device + * handle back. * - * This function should be used only by a driver that discovers - * new physical devices on any buses spawned from the device - * that it is the driver for, e.g. a PCI bridge driver. + * A device can be physical (e.g. a PCI device) or logical + * (e.g. an uplink, or a similar software construct). + * + * Devices can be registered only from a driver's scan callback. + * + * The '#' character is not permitted in the busAddress of the device, + * except if it is a logical device whose busAddress is generated using + * vmk_LogicalCreateBusAddress. + * + * The registering driver's module heap is used for temporary scratch + * purposes by this service. No memory allocated from this heap will + * persist after vmk_DeviceRegister returns. * * \note This function will not block. * @@ -112,11 +128,21 @@ typedef struct { * \param[in] parent Parent device handle. * \param[out] newDevice New device handle. * - * \retval VMK_BAD_PARAM Device ID is NULL or incomplete. - * \retval VMK_EXISTS Device with this data already registered. - * \retval VMK_NO_MEMORY Unable to allocate memory for device handle. - * \retval VMK_OK Successfully registered device. - * + * \retval VMK_OK Successfully registered device. + * \retval VMK_NOT_SUPPORTED Registration not from a driver's scan + * callback. + * \retval VMK_BAD_PARAM Device ID is NULL or incomplete. + * \retval VMK_BAD_PARAM The deviceID's busAddress is improperly + * formatted for the specified bus type. + * \retval VMK_EXISTS Device with this data already registered. + * \retval VMK_NO_MEMORY Unable to allocate memory for device + * handle. + * \retval VMK_NO_MODULE_HEAP The registeringDriver's module + * (specified in deviceProps) has no heap. + * \retval VMK_NAME_TOO_LONG The deviceID's busAddressLen is greater + * then the system defined maximum. + * \retval VMK_NAME_TOO_LONG The deviceID's busIdentifierLen is + * greater then the system defined maximum. *********************************************************************** */ @@ -130,19 +156,20 @@ vmk_DeviceRegister(vmk_DeviceProps *deviceProps, * vmk_DeviceUnregister -- */ /** * * \ingroup Device - * \brief Remove a device from the device database. + * \brief Unregister a device from the device database. * - * Devices should typically be unregistered only from the device - * remove callback. + * A device must be unregistered only from its device remove callback + * provided by the registering driver. * * \note This function will not block. * * \param[in] device Device handle. * * \retval VMK_OK Successfully unregistered device. + * \retval VMK_NOT_SUPPORTED Unregistration was not from the device's + * remove callback. * \retval VMK_BAD_PARAM Device handle is invalid. - * \retval VMK_BUSY Device has references. Will be freed after - * last reference is released. + * \retval VMK_BUSY Device has references or resources allocated. * *********************************************************************** */ @@ -158,15 +185,19 @@ vmk_DeviceUnregister(vmk_Device device); * * \note This function will not block. * + * \param[in] heap Heap from which device ID should be allocated. * \param[in] device Device handle. * \param[out] devID Device identification data. * * \retval VMK_OK Successfully returned device id. + * \retval VMK_BAD_PARAM Device handle is invalid. + * \retval VMK_NO_MEMORY Unable to allocate memory for device ID. * *********************************************************************** */ VMK_ReturnStatus -vmk_DeviceGetDeviceID(vmk_Device device, +vmk_DeviceGetDeviceID(vmk_HeapID heap, + vmk_Device device, vmk_DeviceID **devID); /* @@ -174,10 +205,11 @@ vmk_DeviceGetDeviceID(vmk_Device device, * vmk_DevicePutDeviceID -- */ /** * * \ingroup Device - * \brief Return a handle to device identification data. + * \brief Release device identification data. * * \note This function will not block. * + * \param[in] heap Heap from which device ID was allocated. * \param[in] devID Device identification data. * * \retval VMK_OK Successfully released device id data. @@ -185,120 +217,96 @@ vmk_DeviceGetDeviceID(vmk_Device device, *********************************************************************** */ VMK_ReturnStatus -vmk_DevicePutDeviceID(vmk_DeviceID *devID); +vmk_DevicePutDeviceID(vmk_HeapID heap, + vmk_DeviceID *devID); /* *********************************************************************** - * vmk_DeviceGetBusDriverData -- */ /** + * vmk_DeviceGetRegisteringDriverData -- */ /** * * \ingroup Device - * \brief Get bus-driver data for device. + * \brief Get registering driver's private data for device. * * \note This function will not block. * * \param[in] device Device handle. - * \param[out] data Bus-specific data for device. + * \param[out] data Registering driver's private data for device. * * \retval VMK_OK Successfully returned device data. + * \retval VMK_BAD_PARAM Invalid device handle. + * \retval VMK_BAD_PARAM data argument is NULL. * *********************************************************************** */ VMK_ReturnStatus -vmk_DeviceGetBusDriverData(vmk_Device device, - vmk_AddrCookie *data); +vmk_DeviceGetRegisteringDriverData(vmk_Device device, + vmk_AddrCookie *data); + /* *********************************************************************** - * vmk_DeviceSetFunctionDriverData -- */ /** + * vmk_DeviceGetRegistrationData -- */ /** * * \ingroup Device - * \brief Set function-driver data for device. - * - * \note This function will not block. - * - * \param[in] device Device handle. - * \param[in] data Device data. - * - * \retval VMK_OK Successfully set private data. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_DeviceSetFunctionDriverData(vmk_Device device, - vmk_AddrCookie data); - -/* - *********************************************************************** - * vmk_DeviceGetFunctionDriverData -- */ /** - * - * \ingroup Device - * \brief Get function-driver data for device. + * \brief Get device registration data for attaching driver. * * \note This function will not block. * * \param[in] device Device handle. - * \param[out] data Device data. + * \param[out] data Device registration data. * - * \retval VMK_OK Successfully returned private data. + * \retval VMK_OK Successfully returned device data. + * \retval VMK_BAD_PARAM Invalid device handle. + * \retval VMK_BAD_PARAM data argument is NULL. * *********************************************************************** */ VMK_ReturnStatus -vmk_DeviceGetFunctionDriverData(vmk_Device device, +vmk_DeviceGetRegistrationData(vmk_Device device, + vmk_AddrCookie *data); + +/* + *********************************************************************** + * vmk_DeviceGetAttachedDriverData -- */ /** + * + * \ingroup Device + * \brief Get attached driver's private data for device. + * + * \note This function will not block. + * + * \param[in] device Device handle. + * \param[out] data Attached driver's private data for device. + * + * \retval VMK_OK Successfully returned private data. + * \retval VMK_BAD_PARAM Invalid device handle. + * \retval VMK_BAD_PARAM data argument is NULL. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_DeviceGetAttachedDriverData(vmk_Device device, vmk_AddrCookie *data); /* *********************************************************************** - * vmk_DeviceFindDeviceByIdentifier -- */ /** + * vmk_DeviceSetAttachedDriverData -- */ /** * * \ingroup Device - * \brief Return a reference to the device that matches the bus type & - * identifier in the given identification data. + * \brief Set attached driver's private data for device. * - * If device identifiers are not unique, this function will return - * the first device found matching the given identifier. + * \note This function will not block. * - * \note Reference must be released using vmk_DeviceRelease. - * \note This function may block. + * \param[in] device Device handle. + * \param[in] data Attached driver's private data for device. * - * \param[in] deviceID Device identification. - * \param[out] device Reference to device matching requested - * identification. - * - * \retval VMK_OK Successfully returned reference to - * matching device. - * \retval VMK_NOT_FOUND No device with given identification. + * \retval VMK_OK Successfully set private data. + * \retval VMK_BAD_PARAM Invalid device handle. * *********************************************************************** */ -VMK_ReturnStatus -vmk_DeviceFindDeviceByIdentifier(vmk_DeviceID *deviceID, - vmk_Device *device); - -/* - *********************************************************************** - * vmk_DeviceFindDeviceByAddress -- */ /** - * - * \ingroup Device - * \brief Return a handle to the device that matches the bus & address - * in the given identification data. - * - * \note Reference must be released using vmk_DeviceRelease. - * \note This function may block. - * - * \param[in] deviceID Device identification. - * \param[out] device Reference to device matching requested - * identification. - * - * \retval VMK_OK Successfully returned reference to - * matching device. - * \retval VMK_NOT_FOUND No device with given identification. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_DeviceFindDeviceByAddress(vmk_DeviceID *deviceID, - vmk_Device *device); +VMK_ReturnStatus +vmk_DeviceSetAttachedDriverData(vmk_Device device, + vmk_AddrCookie data); /* *********************************************************************** @@ -322,79 +330,26 @@ vmk_DeviceRelease(vmk_Device device); /* *********************************************************************** - * vmk_DeviceGetParent-- */ /** + * vmk_DeviceRequestRescan -- */ /** * * \ingroup Device - * \brief Obtain a handle to the parent device of the given device. - * - * \note Parent device reference must be released using vmk_DeviceRelease. - * \note This function may block. - * - * \param[in] device Device handle - * \param[out] parent Parent handle - * - * \retval VMK_OK Success - * \retval VMK_BAD_PARAM Invalid device handle. - * \retval VMK_NOT_FOUND Device has no parent. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_DeviceGetParent(vmk_Device device, - vmk_Device *parent); - -/* - *********************************************************************** - * vmk_DeviceGetSibling -- */ /** - * - * \ingroup Device - * \brief Obtain a handle to the immediate sibling device of the given - * device. + * \brief Request a rescan of the device to register new children. * - * This always returns a handle to the immediate sibling of a device - * even if the given device has multiple sibling devices. + * This call submits a request to the device layer to schedule an + * invocation of the device driver's vmk_DriverScanDevice() callback. * - * \note Sibling device reference must be released using vmk_DeviceRelease. - * \note This function may block. + * \param[in] driver Requesting driver + * \param[in] device Device to be scanned * - * \param[in] device Device handle - * \param[out] sibling Sibling handle - * - * \retval VMK_OK Success - * \retval VMK_BAD_PARAM Invalid device handle. - * \retval VMK_NOT_FOUND Device has no siblings. + * \retval VMK_OK Request accepted. + * \retval VMK_BAD_PARAM Invalid device handle. + * \retval VMK_NO_PERMISSION Driver cannot submit this request. * *********************************************************************** */ VMK_ReturnStatus -vmk_DeviceGetSibling(vmk_Device device, - vmk_Device *sibling); - -/* - *********************************************************************** - * vmk_DeviceGetChild -- */ /** - * - * \ingroup Device - * \brief Obtain a handle to the first child device of the given device. - * - * This always returns a handle to the first child of a device even if - * the given device has multiple child devices. - * - * \note Child device reference must be released using vmk_DeviceRelease. - * \note This function may block. - * - * \param[in] device Device handle - * \param[out] child Child handle - * - * \retval VMK_OK Success - * \retval VMK_BAD_PARAM Invalid device handle. - * \retval VMK_NOT_FOUND Device has no children. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_DeviceGetChild(vmk_Device device, - vmk_Device *child); +vmk_DeviceRequestRescan(vmk_Driver driver, + vmk_Device device); #endif /* _VMKAPI_DEVICE_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_device_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_device_types.h new file mode 100644 index 0000000..277dffb --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_device_types.h @@ -0,0 +1,43 @@ +/*************************************************************************** + * Copyright 2007 - 2012 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Devices */ /** + * \defgroup Device Device interface + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_DEVICE_TYPES_H_ +#define _VMKAPI_DEVICE_TYPES_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Opaque device type + */ +typedef struct vmkDevice* vmk_Device; + +/** \brief A null device handle. */ +#define VMK_DEVICE_NONE ((vmk_Device )0) + +/** + * \brief Opaque driver type. + */ +typedef struct vmkDriver* vmk_Driver; + +/** \brief Invalid driver handle. */ +#define VMK_DRIVER_NONE ((vmk_Driver)0) + +#endif /* _VMKAPI_DEVICE_TYPES_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dma.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dma.h index b59898e..82c30e9 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dma.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dma.h @@ -600,6 +600,147 @@ VMK_ReturnStatus vmk_DMAUnmapSg(vmk_DMAEngine engine, vmk_SgOpsHandle sgOps, vmk_SgArray *sg); +/* + *********************************************************************** + * vmk_DMAMapElem -- */ /** + * + * \brief Map machine memory of a single MA range to an IOA range. + * + * This call will attempt to map a single machine-address range and + * create a new IO-address address range that maps to it. + * + * \note The input range must not be freed or modified while it + * is mapped or the results are undefined. + * + * \note If the range is simultaneously mapped with multiple DMA + * directions, the contents of the memory the SG array represents + * are undefined. + * + * \note This function will not block. + * + * \param[in] engine A handle representing a DMA engine to map to. + * \param[in] direction Direction of the DMA transfer for the mapping. + * \param[in] in A single SG array element containing a single + * machine addresse range to map for the + * DMA engine. + * \param[in] lastElem Indicates if this is the last element in + * the transfer. + * \param[out] out A single SG array element to hold the mapped + * IO address for the range. Note that this + * may be the same SG element as the element + * passed in depending on choices made by the + * kernel's mapping code. + * \param[out] err If this call fails with VMK_DMA_MAPPING_FAILED, + * additional information about the failure may + * be found here. This may be set to NULL if the + * information is not desired. + * + * \retval VMK_BAD_PARAM The specified DMA engine is invalid. + * \retval VMK_DMA_MAPPING_FAILED The mapping failed because the + * DMA constraints could not be met. + * Additional information about the + * failure can be found in the "err" + * argument. + * \retval VMK_NO_MEMORY There is currently insufficient + * memory available to construct the + * mapping. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_DMAMapElem(vmk_DMAEngine engine, + vmk_DMADirection direction, + vmk_SgElem *in, + vmk_Bool lastElem, + vmk_SgElem *out, + vmk_DMAMapErrorInfo *err); + +/* + *********************************************************************** + * vmk_DMAFlushElem -- */ /** + * + * \brief Synchronize a DMA mapping for a single IO address range. + * + * This call is used to synchronize data if the CPU needs to read or + * write after an DMA mapping is active on a region of machine memory + * but before the DMA mapping is unmapped. + * + * If the specified memory is DMA-mapped this call must be invoked + * with VMK_DMA_DIRECTION_FROM_MEMORY after CPU writes are complete but + * before any new DMA read transactions occur on the memory. + * + * If the specified memory is DMA-mapped this call must be invoked + * with VMK_DMA_DIRECTION_TO_MEMORY before CPU reads but after + * any write DMA transactions complete on the memory. + * + * DMA map and unmap calls will implicitly perform a flush of the + * element. + * + * The code may flush bytes rounded up to the nearest page or other + * HW-imposed increment. + * + * \note The IO element supplied to this function must be an element + * output from vmk_DMAMapElem or the results of this call are + * undefined. + * + * Do not use this to flush a single element in an SG array + * that was mapped by vmk_DMAMapSg. + * + * \note The original element supplied to this function must be + * the one supplied to vmk_DMAMapElem when the IO element + * was created or the results of this call are undefined. + * + * \note This function will not block. + * + * \param[in] engine A handle representing the DMA engine used + * for the mapping. + * \param[in] direction Direction of the DMA transfer for the + * mapping. + * \param[in] IOElem Scatter-gather element contained the + * IO-address range to flush. + * + * \retval VMK_BAD_PARAM Unknown duration or direction, or + * unsupported direction. + * \retval VMK_INVALID_ADDRESS Memory in the specified element + * is not mapped. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_DMAFlushElem(vmk_DMAEngine engine, + vmk_DMADirection direction, + vmk_SgElem *IOElem); + +/* + *********************************************************************** + * vmk_DMAUnmapElem -- */ /** + * + * \brief Unmaps previously mapped IO address range. + * + * \note The direction must match the direction at the time of mapping + * or the results of this call are undefined. + * + * \note The element supplied to this function must be one mapped with + * vmk_DMAMapElem or the results of this call are undefined. + * + * \note This function will not block. + * + * \param[in] engine A handle representing a DMA engine + * to unmap from. + * \param[in] direction Direction of the DMA transfer for the + * mapping. + * \param[in] IOElem Scatter-gather element contained the + * IO-address range to unmap. + * + * \retval VMK_BAD_PARAM Unknown direction, or unsupported + * direction. + * \retval VMK_INVALID_ADDRESS One ore more pages in the specified + * machine address range are not mapped. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_DMAUnmapElem(vmk_DMAEngine engine, + vmk_DMADirection direction, + vmk_SgElem *IOElem); + /* *********************************************************************** * vmk_DMAGetAllocAddrConstraint -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dma_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dma_incompat.h index a328814..2cdd853 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dma_incompat.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dma_incompat.h @@ -27,144 +27,6 @@ #endif /** \endcond never */ -/* - *********************************************************************** - * vmk_DMAMapElem -- */ /** - * - * \brief Map machine memory of a single machine address range to an - * IO address range. - * - * This call will attempt to map a single machine-address range and - * create a new IO-address address range that maps to it. - * - * \note The input range must not be freed or modified while it - * is mapped or the results are undefined. - * - * \note If the range is simultaneously mapped with multiple DMA - * directions, the contents of the memory the SG array represents - * are undefined. - * - * \note This function will not block. - * - * \param[in] engine A handle representing a DMA engine to map to. - * \param[in] direction Direction of the DMA transfer for the mapping. - * \param[in] in A single SG array element containing a single - * machine addresse range to map for the - * DMA engine. - * \param[in] lastElem Indicates if this is the last element in - * the transfer. - * \param[out] out A single SG array element to hold the mapped - * IO address for the range. - * \param[out] err If this call fails with VMK_DMA_MAPPING_FAILED, - * additional information about the failure may - * be found here. This may be set to NULL if the - * information is not desired. - * - * \retval VMK_BAD_PARAM The specified DMA engine is invalid. - * \retval VMK_DMA_MAPPING_FAILED The mapping failed because the - * DMA constraints could not be met. - * Additional information about the - * failure can be found in the "err" - * argument. - * \retval VMK_NO_MEMORY There is currently insufficient - * memory available to construct the - * mapping. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_DMAMapElem(vmk_DMAEngine engine, - vmk_DMADirection direction, - vmk_SgElem *in, - vmk_Bool lastElem, - vmk_SgElem *out, - vmk_DMAMapErrorInfo *err); - -/* - *********************************************************************** - * vmk_DMAFlushElem -- */ /** - * - * \brief Synchronize a DMA mapping for a single IO address range. - * - * This call is used to synchronize data if the CPU needs to read or - * write after an DMA mapping is active on a region of machine memory - * but before the DMA mapping is unmapped. - * - * If the specified memory is DMA-mapped this call must be invoked - * with VMK_DMA_DIRECTION_FROM_MEMORY after CPU writes are complete but - * before any new DMA read transactions occur on the memory. - * - * If the specified memory is DMA-mapped this call must be invoked - * with VMK_DMA_DIRECTION_TO_MEMORY before CPU reads but after - * any write DMA transactions complete on the memory. - * - * DMA map and unmap calls will implicitly perform a flush of the - * element. - * - * The code may flush bytes rounded up to the nearest page or other - * HW-imposed increment. - * - * \note The IO element supplied to this function must be an element - * output from vmk_DMAMapElem or the results of this call are - * undefined. - * - * Do not use this to flush a single element in an SG array - * that was mapped by vmk_DMAMapSg. - * - * \note The original element supplied to this function must be - * the one supplied to vmk_DMAMapElem when the IO element - * was created or the results of this call are undefined. - * - * \note This function will not block. - * - * \param[in] engine A handle representing the DMA engine used - * for the mapping. - * \param[in] direction Direction of the DMA transfer for the - * mapping. - * \param[in] IOElem Scatter-gather element contained the - * IO-address range to flush. - * - * \retval VMK_BAD_PARAM Unknown duration or direction, or - * unsupported direction. - * \retval VMK_INVALID_ADDRESS Memory in the specified element - * is not mapped. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_DMAFlushElem(vmk_DMAEngine engine, - vmk_DMADirection direction, - vmk_SgElem *IOElem); - -/* - *********************************************************************** - * vmk_DMAUnmapElem -- */ /** - * - * \brief Unmaps previously mapped IO address range. - * - * \note The direction must match the direction at the time of mapping - * or the results of this call are undefined. - * - * \note The element supplied to this function must be one mapped with - * vmk_DMAMapElem or the results of this call are undefined. - * - * \note This function will not block. - * - * \param[in] engine A handle representing a DMA engine - * to unmap from. - * \param[in] direction Direction of the DMA transfer for the - * mapping. - * \param[in] IOElem Scatter-gather element contained the - * IO-address range to unmap. - * - * \retval VMK_BAD_PARAM Unknown direction, or unsupported - * direction. - * \retval VMK_INVALID_ADDRESS One ore more pages in the specified - * machine address range are not mapped. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_DMAUnmapElem(vmk_DMAEngine engine, - vmk_DMADirection direction, - vmk_SgElem *IOElem); /* *********************************************************************** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_driver.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_driver.h index efe7cce..0e19e99 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_driver.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_driver.h @@ -28,34 +28,125 @@ /* *********************************************************************** - * vmk_DriverAttachDevice -- */ /** + * vmk_DriverAttachDevice -- */ /** * * \brief Attach a device to a driver. * - * The driver should start driving this device. If the driver is not - * capable of driving the given device, an appropriate error should be - * returned, and the device must be restored to its original state at - * entry. + * This callback is invoked to offer an unclaimed device to a driver. + * + * The driver should check whether it is capable of driving the given + * device, and do initial device set up, e.g. allocate device resources. + * If the driver is not capable of driving the given device, the device + * must be restored to its original state at callback entry, and an + * error should be returned. * * \param[in] device Handle to device to be added to the driver. * - * \retval VMK_OK Success + * \retval VMK_OK Driver has claimed this device. + * \retval VMK_FAILURE Driver did not claim this device. + * All other error codes are treated as + * VMK_FAILURE. * *********************************************************************** */ typedef VMK_ReturnStatus (*vmk_DriverAttachDevice)(vmk_Device device); +/* + *********************************************************************** + * vmk_DriverStartDevice-- */ /** + * + * \brief Prepare a device to accept IO. + * + * This callback is invoked to place the device in an IO-able state. + * This can be when the device is implicitly in a quiescent state after + * a successful driver attach operation, or at any other time when the + * device has been explicitly put in a quiescent state by the callback + * vmk_DriverQuiesceDevice(). + * + * The driver should prepare the device for IO. + * + * \param[in] device Handle to device to prepare for IO. + * + * \retval VMK_OK Driver will accept IO for this device. + * \retval VMK_FAILURE Driver could not prepare device for IO. + * All other error codes are treated as + * VMK_FAILURE. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_DriverStartDevice)(vmk_Device device); + +/* + *********************************************************************** + * vmk_DriverScanDevice -- */ /** + * + * \brief Register any child devices. + * + * This callback is invoked only on devices in IO-able state. It is + * invoked at least once after a device has been successfully attached + * to a driver and started. It may be invoked for other device hotplug + * events as appropriate. + * + * The driver may register new devices by calling vmk_DeviceRegister() + * from this callback. New devices may be registered only from this + * callback. + * + * \param[in] device Handle to device whose children may be registered. + * + * \retval VMK_OK Devices registered, or nothing to register. + * \retval VMK_FAILURE Driver could not register a child device. + * All other error codes are treated as + * VMK_FAILURE. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_DriverScanDevice)(vmk_Device device); + +/* + *********************************************************************** + * vmk_DriverQuiesceDevice -- */ /** + * + * \brief Place a device in quiescent state. + * + * This callback may be invoked any time after a device is in an IO-able + * state, in preparation for operations such as system shutdown, driver + * unload, or device removal. + * + * The driver should complete any IO on the device and flush any device + * caches as necessary to place the device in a quiescent state. When a + * device is in quiescent state, the driver must not report any IO to, + * and will not receive any IO from, any kernel subsystem. + * + * \param[in] device Handle to device to be quiesced. + * + * \retval VMK_OK Device has been quiesced. + * \retval VMK_FAILURE Driver could not quiesce IO on device. + * All other error codes are treated as + * VMK_FAILURE. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_DriverQuiesceDevice)(vmk_Device device); + /* *********************************************************************** * vmk_DriverDetachDevice -- */ /** * * \brief Detach a device from its driver. * - * The driver should stop driving this device, and release its resources. - * - * \param[in] device Handle to device to be removed from the driver. + * This callback is invoked only on devices in a quiescent state. + * A device may be detached for operations such as system shutdown, + * driver unload, or device removal. * - * \retval VMK_OK Success + * The driver should stop driving this device, and undo all device setup + * performed in vmk_DriverAttachDevice. E.g. release device resources. + * + * \param[in] device Handle to device to be detached. + * + * \retval VMK_OK Device has been released. + * \retval VMK_FAILURE Driver could not detach itself from device. + * All other error codes are treated as + * VMK_FAILURE. * *********************************************************************** */ @@ -64,41 +155,23 @@ typedef VMK_ReturnStatus (*vmk_DriverDetachDevice)(vmk_Device device); /* *********************************************************************** - * vmk_DriverQuiesceDevice -- */ /** + * vmk_DriverForgetDevice-- */ /** * - * \brief Quiesce a device. - * - * This callback is invoked in preparation for device removal or - * system shutdown. The driver should complete any IO on the device - * and flush any device caches as necessary to put the device in a - * quiescent state. - * - * \param[in] device Handle to device to be quiesced. - * - * \retval VMK_OK Success - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_DriverQuiesceDevice)(vmk_Device device); - -/* - *********************************************************************** - * vmk_DriverScanDevice -- */ /** - * - * \brief Scan a device for new children and register them. + * \brief Mark a device as inaccessible. * - * Only bus drivers will typically need to implement this entry. - * This function is called at least once after a device has been - * successfully attached to a driver. It may be called at other - * device hotplug events as appropriate. + * This callback is a notification. It may be invoked at any time to + * notify the driver that a device is inaccessible, so that the driver + * does not wait indefinitely for any subsequent device operations. + * + * The driver must note that the device is inaccessible. The driver must + * return successfully, in deterministic time, on any subsequent device + * callbacks, e.g. vmk_DriverQuiesceDevice, vmk_DriverDetachDevice. * - * \param[in] device Handle to device to scan. - * - * \retval VMK_OK Success + * \param[in] device Handle to device that is inaccessible. * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_DriverScanDevice)(vmk_Device device); +typedef void (*vmk_DriverForgetDevice)(vmk_Device device); /** * \brief Driver operations. @@ -110,8 +183,12 @@ typedef struct { vmk_DriverScanDevice scanDevice; /** \brief Detach a device from its driver */ vmk_DriverDetachDevice detachDevice; - /** \brief Quiesce a device for system shutdown */ + /** \brief Quiesce a device */ vmk_DriverQuiesceDevice quiesceDevice; + /** \brief Prepare device for IO */ + vmk_DriverStartDevice startDevice; + /** \brief Notify driver of a lost device */ + vmk_DriverForgetDevice forgetDevice; } vmk_DriverOps; /** @@ -132,17 +209,23 @@ typedef struct { *********************************************************************** * vmk_DriverRegister -- */ /** * - * \brief Register a driver with the driver database and get a - * a driver handle back. + * \brief Register a driver with the driver database + * + * vmk_DriverRegister must be called from within the driver module's + * initialization routine. A successful registration returns a + * a new driver handle to the caller. * * \note This function will not block. * - * \param[in] driverProps Driver registration data - * \param[out] driver New driver handle. + * \param[in] driverProps Driver registration data + * \param[out] driver New driver handle. * - * \retval VMK_BAD_PARAM Name or ops argument is NULL. - * \retval VMK_NO_MEMORY Unable to allocate memory for device handle. - * \retval VMK_OK Successfully registered driver. + * \retval VMK_BAD_PARAM Name or ops argument is NULL. + * \retval VMK_EXISTS A driver by this name is already registered. + * \retval VMK_NO_MEMORY Unable to allocate memory for device handle. + * \retval VMK_NOT_FOUND Unable to find module registering this driver. + * \retval VMK_OK Successfully registered driver. + * \retval VMK_MODULE_FAILED Call was not from the module's initialization routine. * *********************************************************************** */ @@ -154,13 +237,19 @@ vmk_DriverRegister(vmk_DriverProps *driverProps, *********************************************************************** * vmk_DriverUnregister -- */ /** * - * \brief Unregister a driver from the driver database. + * \brief Unregister a driver from the driver database. + * + * vmk_DriverUnregister is normally called from within the driver module's + * cleanup routine. A driver is also permitted to call it from its + * initialization routine if the module fails to initialize (load failure). * * \note This function will not block. * - * \param[in] driver Driver handle + * \param[in] driver Driver handle * - * \retval VMK_OK Successfully unregistered driver. + * \retval VMK_OK Successfully unregistered driver. + * \retval VMK_MODULE_FAILED Call was not from the module's cleanup or + * initialization routines. * *********************************************************************** */ @@ -180,6 +269,7 @@ vmk_DriverUnregister(vmk_Driver driver); * * \retval VMK_OK Successfully returned driver private data. * \retval VMK_BAD_PARAM Invalid driver handle. + * \retval VMK_BAD_PARAM data argument is NULL. * *********************************************************************** */ @@ -191,3 +281,5 @@ vmk_DriverGetPrivateData(vmk_Driver driver, /** @} */ /** @} */ + + diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dump.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dump.h new file mode 100644 index 0000000..a79ed8a --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_dump.h @@ -0,0 +1,203 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Dump */ /** + * \addtogroup Core + * @{ + * \defgroup Dump VMKernel Crash Dumps + * + * Functions related to VMKernel Crash Dumps. These functions allow + * vmkapi users to register files to be created in a zdump file. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_DUMP_H_ +#define _VMKAPI_DUMP_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** + * \brief Prototype for a dump callback function. + * + * After being registered for dump callback, this function is called during + * system dump time. There are two types of system dump. The first one + * is when the system crashes during normal operation and a core dump is + * written. The second type, called a live dump, occurs while the system + * is still operational and is an additional tool for diagnosing issues + * without bringing the whole system down. + * + * There are two functions a callback can use to add data to the dump. + * These are vmk_DumpRange() and vmk_DumpMPN(). vmk_DumpRange() may only + * be called on data currently known to be correctly mapped (consistently + * across all CPUs), as calls to unmapped spaces will generate page faults. + * + * For both functions it is also required that there are no side effects + * from reading the memory (e.g. a memory mapped PCI device should not + * treat reading any piece of memory as an acknowledge of some transaction + * for example). + * + * For the live dump type of call vmk_DumpMPN() is the only safe method + * of adding data that may not be currently mapped. This may happen when + * unmap events are not managed with any concurrency protection. + * + * \note This function may only block when liveDump is TRUE. + * + * \param[in] cookie Private data as specified vmk_DumpAddFileCallback(). + * \param[in] liveDump TRUE only if the system is still currently functional. + * In this case concurrency issues should be considered + * as normal for the sub-system. This means that locking + * and/or other synchronization should only be performed + * when liveDump is TRUE. + */ +typedef VMK_ReturnStatus (*vmk_DumpFileCallback)( + void *cookie, + vmk_Bool liveDump); + + +/** + * \brief Dump file handle + * + * Returned as part of the vmk_DumpAddFileCallback() call. Used for + * all other calls. + */ +typedef void *vmk_DumpFileHandle; + + +/* + ******************************************************************************* + * vmk_DumpAddFileCallback -- */ /** + * + * \brief Register a file to be created at kernel core dump time. + * + * This function registers a callback to allow memory to be dumped in a + * VMKernel core file under the specified name. + * + * \param[in] moduleID Module ID of the caller. + * \param[in] heapID Heap ID to be used for allocations. + * \param[in] name The name of the file to be created by vmkdump_extract. + * \param[in] func The callback function itself. + * \param[in] cookie Opaque cookie passed to the callback. + * \param[in] dumpName Tag used for error messages on this file. + * \param[out] outHandle Dump Handle is written here upon success. + * + * \note This function will not block. + * + * \retval VMK_OK Callback successfully added to dump-file table. + * \retval VMK_LIMIT_EXCEEDED Dump file table is full. + * \retval VMK_NAME_INVALID Specified name was invalid. + * \retval VMK_NO_MEMORY Allocation from heapID failed. + * + ******************************************************************************* + */ +VMK_ReturnStatus vmk_DumpAddFileCallback( + vmk_ModuleID moduleID, + vmk_HeapID heapID, + const char *name, + vmk_DumpFileCallback func, + void *cookie, + char *dumpName, + vmk_DumpFileHandle *outHandle); + + +/* + ******************************************************************************* + * vmk_DumpDeleteFileCallback -- */ /** + * + * \brief Unregister a file to be created at kernel core dump time. + * + * This function unregisters a callback to allow memory to be dumped in a + * VMKernel core file under the specified name. + * + * \param[in] handle Dump handle returned from vmk_DumpAddFileCallback(). + * + * \note This function will not block. + * + * \retval VMK_OK Callback successfully removed to dump-file table. + * \retval VMK_NOT_FOUND Dump-file table entry could not be found. + * + ******************************************************************************* + */ +VMK_ReturnStatus vmk_DumpDeleteFileCallback( + vmk_DumpFileHandle handle); + + +/* + ******************************************************************************* + * vmk_DumpRange -- */ /** + * + * \brief Dump a region of memory into a VMKernel core file. + * + * All errors occurring in an invocation will be logged with the dumpName tag + * registered at dump handle creation. + * + * \param[in] handle Dump handle returned from vmk_DumpAddFileCallback(). + * \param[in] va Virtual Address to begin dumping. If zero, + * dump zero-byte data upto one PAGE_SIZE. + * \param[in] size Length of region to dump. + * + * \note This function is only to be used in a call back registered via + * vmk_DumpAddFileCallback(). + * + * \note This function may block when vmk_DumpAddFileCallback() was called + * with liveDump is TRUE. + * + * \retval VMK_OK Region was successfully dumped. + * \retval VMK_LIMIT_EXCEEDED More than PAGE_SIZE of zeros requested, or size + * of dump exceeded. + * \retval VMK_FAILURE Gzip deflate failed. + * + ******************************************************************************* + */ +VMK_ReturnStatus vmk_DumpRange( + vmk_DumpFileHandle handle, + vmk_VA va, + vmk_uint32 size); + + +/* + ******************************************************************************* + * vmk_DumpMPN -- */ /** + * + * \brief Dump a page of memory into a VMKernel core file. + * + * All errors occurring in an invocation will be logged with the dumpName tag + * registered at dump handle creation. + * + * \param[in] handle Dump handle returned from vmk_DumpAddFileCallback(). + * \param[in] mpn VMKernel machine page number to dump. + * + * \note This function is only to be used in a call back registered via + * vmk_DumpAddFileCallback(). + * + * \note This function may block when vmk_DumpAddFileCallback() was called + * with liveDump is TRUE. + * + * \retval VMK_OK Page was successfully dumped. + * \retval VMK_LIMIT_EXCEEDED More than PAGE_SIZE of zeros requested, or size + * of dump exceeded. + * \retval VMK_FAILURE Gzip deflate failed. + * + ******************************************************************************* + */ +VMK_ReturnStatus vmk_DumpMPN( + vmk_DumpFileHandle handle, + vmk_MPN mpn); + + +#endif /* _VMKAPI_DUMP_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_logical_bus.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_logical_bus.h new file mode 100644 index 0000000..aaee4c4 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_logical_bus.h @@ -0,0 +1,123 @@ +/*************************************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Logical */ /** + * \addtogroup Device + * @{ + * \defgroup Logical Logical bus interface + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_LOGICAL_BUS_H_ +#define _VMKAPI_LOGICAL_BUS_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** \brief Name of the logical bus type. */ +#define VMK_LOGICAL_BUS_NAME "logical" + +/* + *********************************************************************** + * vmk_LogicalCreateBusAddress -- */ /** + * + * \brief Return a global address for a device on the logical bus. + * + * A driver registering a device on the logical bustype must use this + * call to obtain a globally unique and persistent busAddress for the + * device. Driver must provide a logical port component satisfying the + * following conditions. + * + * Locally unique: This means the logical port distinguishes this + * logical device from other logical devices created by the same driver + * under the same parent device. + * + * Locally persistent: This means the same logical port is used for + * a logical device every time that device is created by the driver. + * This is important if the logical device directly represents a + * physical hardware component in the system. + * + * Example : A network driver creates uplinks (logical devices) for a + * NIC addressable by a single PCI function (physical parent device). + * + * Case 1: Single uplink for a single-port NIC. + * Driver can use '0' as unique and persistent logical port. + * + * Case 2: Multiplexing two uplinks for a single-port NIC. + * Driver may use '0' and '1' as unique logical ports. As long + * as the driver manages multiplexing internally, and logical + * ports do not represent physical ports directly, shifting of + * logical port numbers is permitted. E.g. if driver is + * configured to register only one uplink at next driver load, + * logical port '0' may be used, whether it was '0' or '1' + * during the previous load. + * + * Case 3: Two uplinks for a two-port NIC, one per port. + * Driver may choose '0' and '1' as unique logical ports for the + * uplinks on the first and second port, respectively. Since the + * logical devices directly represent physical ports, the driver + * must also ensure that the logical ports are never shifted or + * mixed up. That is, '0' is always used as the logical port for + * the uplink for the first port, and '1' is always used as the + * logical port for the uplink for the second port, even if one + * of the physical ports fails or is disabled, or if the driver + * is configured to use only one port at next driver load. + * + * \note Memory is allocated for \em globalAddress. + * It must be freed using vmk_LogicalFreeBusAddress(). + * + * \param[in] driver Driver creating the device. + * \param[in] parent Parent of device being created. + * \param[in] uniqueLogicalPort Unique and persistent logical port number. + * \param[out] globalAddress Globally unique and persistent address. + * \param[out] globalAddressLen Length of globally unique address. + * + * \retval VMK_OK Success. + * \retval VMK_NO_MODULE_HEAP Driver module has no heap to allocate memory. + * \retval VMK_NO_MEMORY Could not allocate memory to create address. + * \retval VMK_BAD_PARAM Invalid parameter. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_LogicalCreateBusAddress(vmk_Driver driver, + vmk_Device parent, + vmk_uint32 uniqueLogicalPort, + char* *globalAddress, + vmk_uint32 *globalAddressLen); + + +/* + *********************************************************************** + * vmk_LogicalFreeBusAddress -- */ /** + * + * \brief Free memory for logical bus address created using + * vmk_LogicalCreateBusAddress(). + * + * \param[in] driver Driver that allocated the bus address. + * \param[in] globalAddress Allocated global address. + * + * \retval VMK_OK Success + * \retval VMK_NO_MODULE_HEAP Driver module has no heap to free memory. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_LogicalFreeBusAddress(vmk_Driver driver, + char* globalAddress); + +#endif /* _VMKAPI_LOGICAL_BUS_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_pageslab.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_pageslab.h new file mode 100644 index 0000000..03425be --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_pageslab.h @@ -0,0 +1,200 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * PageSlab */ /** + * \addtogroup Core + * @{ + * \defgroup PageSlab Slab page allocator + * + * Functions related to page slabs. A page slab is a page-wise + * allocator that allows for fast page allocations and freeing. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_PAGESLAB_H_ +#define _VMKAPI_PAGESLAB_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** \brief INVALID page slab ID */ +#define VMK_INVALID_PAGESLAB_ID ((vmk_PageSlabID)NULL) + +/** \brief Page slab ID */ +typedef struct vmkPageSlabInt* vmk_PageSlabID; + +/** + * \brief Properties of a page slab. + */ +typedef struct vmk_PageSlabCreateProps { + /** \brief Heap to allocate page slab metadata from. The size of the + * allocation can be retrieved via vmk_PageSlabAllocationSize. + */ + vmk_HeapID heapID; + /** \brief Name for this page slab. */ + vmk_Name name; + /** \brief Minimum number of pages that should be held in the slab. + * Please be careful when sizing this number as any memory + * that is used for the minimum will be unavailable to VMs, etc. + */ + vmk_uint32 minPages; + /** \brief Maximum number of pages that the slab should provide for. */ + vmk_uint32 maxPages; + /** \brief Restrictions on the physical address space that pages for + * the page slab are allocated from. Please choose the least + * restrictive constraint possible as memory below 2GB or 4GB + * is a scarce resource. + */ + vmk_MemPhysAddrConstraint physRange; + /** \brief Memory pool that the slab should allocate pages from. Set to + * VMK_MEMPOOL_INVALID to have vmk_PageSlabCreate create a new + * memory pool for the slab. + */ + vmk_MemPool memPool; +} vmk_PageSlabCreateProps; + + +/* + *********************************************************************** + * vmk_PageSlabCreateCustom -- */ /** + * + * \brief Create a new page slab. + * + * This function creates a new page slab with the given properties. + * + * \note This function might block. + * + * \param[in] moduleID Module ID of the module that this + * page slab will belong to. + * \param[in] createProps Properties of the new page slab. + * \param[out] pageSlabID Handle to the newly created page slab. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PageSlabCreateCustom(vmk_ModuleID moduleID, + vmk_PageSlabCreateProps *createProps, + vmk_PageSlabID *pageSlabID); + +/* + *********************************************************************** + * vmk_PageSlabCreate -- */ /** + * + * \brief Convenience wrapper around vmk_PageSlabCreateCustom + * + * This function creates a new page slab with the given properties. + * + * \note This function might block. + * + * \param[in] createProps Properties of the new page slab. + * \param[out] pageSlabID Handle to the newly created page slab. + * + *********************************************************************** + */ + +static VMK_INLINE VMK_ReturnStatus +vmk_PageSlabCreate(vmk_PageSlabCreateProps *createProps, + vmk_PageSlabID *pageSlabID) +{ + return vmk_PageSlabCreateCustom(vmk_ModuleCurrentID, createProps, pageSlabID); +} + + +/* + *********************************************************************** + * vmk_PageSlabDestroy -- */ /** + * + * \brief Destroy a page slab. + * + * \note The page slab must be empty meaning all previously allocated + * pages must have been freed back to the slab. + * \note This function might block. + * + * \param[in] pageSlabID Page slab identifier acquired through a + * preceding vmk_PageSlabCreate(Custom) call. + * + *********************************************************************** + */ + +void +vmk_PageSlabDestroy(vmk_PageSlabID pageSlabID); + + +/* + *********************************************************************** + * vmk_PageSlabAllocationSize -- */ /** + * + * \brief Return the amount of memory that vmk_PageSlabCreate is going + * to allocate from the passed in heap for each call. + * + * \note This function will not block. + * + *********************************************************************** + */ + +vmk_ByteCountSmall +vmk_PageSlabAllocationSize(void); + + +/* + *********************************************************************** + * vmk_PageSlabAlloc -- */ /** + * + * \brief Allocate a page from the given page slab. + * + * \note This function may block based on the blocking parameter + * + * \param[in] pageSlabID Page slab previously created via + * vmk_PageSlabCreate(Custom) + * \param[in] blocking Allow the page slab to block and wait for + * a page to become free if none are readily + * available. + * \param[out] mpn Machine page number of the new page. Only + * filled if return status was VMK_OK; + * + * \retval VMK_NO_MEMORY The slab was unable to allocate a page. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PageSlabAlloc(vmk_PageSlabID pageSlabID, + vmk_Bool blocking, + vmk_MPN *mpn); + + +/* + *********************************************************************** + * vmk_PageSlabFree -- */ /** + * + * \brief Free a page to the given page slab. + * + * \param[in] pageSlabID Page slab previously created via + * vmk_PageSlabCreate(Custom) + * \param[in] mpn An machine page number previously returned + * by vmk_PageSlabAlloc + * + *********************************************************************** + */ + +void +vmk_PageSlabFree(vmk_PageSlabID pageSlabID, + vmk_MPN mpn); + + +#endif /* _VMKAPI_PAGESLAB_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_pageslab_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_pageslab_incompat.h new file mode 100644 index 0000000..d288eb3 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_pageslab_incompat.h @@ -0,0 +1,53 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * PageSlabIncompat */ /** + * \addtogroup Core + * @{ + * + * \addtogroup PageSlab + * @{ + * + * \defgroup Incompatible APIs for page slabs + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_PAGESLAB_INCOMPAT_H_ +#define _VMKAPI_PAGESLAB_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/* + *********************************************************************** + * vmk_PageSlabFreeWithoutSlabID -- */ /** + * + * \brief Free a page slab page without knowing the page slab ID. + * + * \param[in] mpn An machine page number previously returned by + * vmk_PageSlabAlloc + * + *********************************************************************** + */ + +void +vmk_PageSlabFreeWithoutSlabID(vmk_MPN mpn); + + +#endif /* _VMKAPI_PAGESLAB_INCOMPAT_H_ */ +/** @} */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_preempt_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_preempt_incompat.h new file mode 100644 index 0000000..9d509d7 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_preempt_incompat.h @@ -0,0 +1,79 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Preemption */ /** + * \defgroup Preemption Preemption State Management + * + * These interfaces can be used to change the current preemption + * capability of the current context. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_PREEMPT_H_ +#define _VMKAPI_PREEMPT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief An encoding of an execution context's pre-emptibility. + */ +typedef vmk_uint8 vmk_PreemptionState; + +/* + *********************************************************************** + * vmk_PreemptionDisable -- */ /** + * + * \ingroup Preemption + * \brief Disable pre-emption in the current executing context. + * + * \return The previous pre-emption state. + * + *********************************************************************** + */ +vmk_PreemptionState vmk_PreemptionDisable( + void); + +/* + *********************************************************************** + * vmk_PreemptionRestore -- */ /** + * + * \ingroup Preemption + * \brief Restore the pre-emption state of the current context. + * + * \param[in] restoreState The state that will be restored. + * + *********************************************************************** + */ +void vmk_PreemptionRestore( + vmk_PreemptionState restoreState); + +/* + *********************************************************************** + * vmk_PreemptionIsEnabled -- */ /** + * + * \ingroup Preemption + * \brief Determine if pre-emption is enabled in the current context. + * + * \return VMK_TRUE Pre-emption is currently enabled. + * \return VMK_FALSE Pre-emption is currently disabled. + * + *********************************************************************** + */ +vmk_Bool vmk_PreemptionIsEnabled( + void); + +#endif /* _VMKAPI_PREEMPT_H_ */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_scatter_gather.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_scatter_gather.h index b2819c5..397169a 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_scatter_gather.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_scatter_gather.h @@ -88,6 +88,11 @@ typedef struct vmk_SgArray { */ typedef struct vmk_SgOpsHandleInt *vmk_SgOpsHandle; +/** + * \brief Opaque handle for scatter-gather component operations. + */ +typedef struct vmk_SgComponentOpsHandleInt *vmk_SgComponentOpsHandle; + /** * \brief The type of position a vmk_SgPosition represents. */ @@ -140,6 +145,53 @@ typedef struct vmk_SgPosition { }; } vmk_SgPosition; +/** + * \brief Scatter-gather component + * + * A scatter gather component is a scatter gather array as well + * as a specific data object offset and length describing + * the start location and size of the I/O operation. + */ +typedef struct vmk_SgComponent { + /** + * Byte offset within a data object. + */ + vmk_ByteCount ioOffset; + /** + * Number of bytes of this I/O operation. + */ + vmk_ByteCount ioLength; + /** + * The scatter-gather array specifying the buffer addresses + * used to satisfy this piece of the I/O operation. + */ + vmk_SgArray *sg; +} vmk_SgComponent; + +/** + * \brief Scatter-gather component array. + * + * A scatter gather component array is a set of I/O operations to + * a given data object where a unique data object offset, size, + * and scatter gather array can be specified for each piece of + * the operation. + */ +typedef struct vmk_SgComponentArray { + /** \brief The number of SgComponents this array has. */ + vmk_int32 maxComponents; + /** \brief Number of SgComponents currently in-use. */ + vmk_int32 numComponents; + + /** \brief Reserved. */ + vmk_uint64 reserved; + vmk_uint64 reserved2; + + /** \brief Array of scatter gather components. Should be + * set to zero on init. + */ + vmk_SgComponent sgComponent[0]; +} vmk_SgComponentArray; + /* *********************************************************************** * vmk_SgComputeAllocSize-- */ /** @@ -193,13 +245,44 @@ typedef VMK_ReturnStatus (*vmk_SgArrayOpAlloc)(vmk_SgOpsHandle handle, vmk_uint32 numElems, void *private); +/* + *********************************************************************** + * vmk_SgComponentArrayOpAlloc-- */ /** + * + * \ingroup ScatterGather + * \brief Callback to allocate and initialize a new scatter-gather + * component array. + * + * \note Callbacks of this type may not block. + * + * The returned array should have its maxLength field set correctly + * and length field set to zero. + * + * \param[in] handle Opaque scatter-gather ops handle. + * \param[out] sgComponent The new scatter gather component array. + * \param[in] maxComponents Max scatter-gather operations the new + * array must support. + * \param[in] private Private data from vmk_SgComponentCreateOpsHandle(). + * + * \retval VMK_OK The allocation succeeded. + * \retval VMK_NO_MEMORY Not enough memory to allocate a new + * scatter-gather component array. + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_SgComponentArrayOpAlloc)( + vmk_SgComponentOpsHandle handle, + vmk_SgComponentArray **sgComponent, + vmk_uint32 maxComponents, + void *private); + + /* *********************************************************************** * vmk_SgArrayOpFree-- */ /** * * \ingroup ScatterGather * \brief Callback to free an existing scatter-gather array. - * + * * \note Callbacks of this type may not block. * * \param[in] handle Opaque scatter-gather ops handle. @@ -214,6 +297,28 @@ typedef VMK_ReturnStatus (*vmk_SgArrayOpFree)(vmk_SgOpsHandle handle, vmk_SgArray *sg, void *private); +/* + *********************************************************************** + * vmk_SgComponentArrayOpFree-- */ /** + * + * \ingroup ScatterGather + * \brief Callback to free an existing scatter-gather component array. + * + * \note Callbacks of this type may not block. + * + * \param[in] handle Opaque scatter-gather ops handle. + * \param[in] sgComponent scatter-gather component array to free. + * \param[in] private Private data from vmk_SgCreateOpsHandle(). + * + * \retval VMK_OK The free succeeded. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_SgComponentArrayOpFree)( + vmk_SgComponentOpsHandle handle, + vmk_SgComponentArray *sgComponent, + void *private); + /** * \brief Scatter-gather array operations. * @@ -230,6 +335,22 @@ typedef struct vmk_SgArrayOps { vmk_SgArrayOpFree free; } vmk_SgArrayOps; +/** + * \brief Scatter-gather components array operations. + * + * Routines not implemented by the caller must be set to NULL. + * + * Caller may override default behavior for any routine by supplying + * the routines. + */ +typedef struct vmk_SgComponentArrayOps { + /** Handler invoked when allocating scatter-gather component arrays. */ + vmk_SgComponentArrayOpAlloc alloc; + + /** Handler invoked when freeing scatter-gather component arrays. */ + vmk_SgComponentArrayOpFree free; +} vmk_SgComponentArrayOps; + /* *********************************************************************** * vmk_SgComputeMaxEntries-- */ /** @@ -284,6 +405,45 @@ VMK_ReturnStatus vmk_SgCreateOpsHandle(vmk_HeapID heapId, vmk_SgArrayOps *ops, void *private); +/* + *********************************************************************** + * vmk_SgComponentCreateOpsHandle-- */ /** + * + * \ingroup ScatterGather + * \brief Create an opaque handle for scatter-gather component operations. + * + * The handle is used by other routines to invoke callbacks and track + * other state related to scatter-gather component operations. + * + * \note If ops is non-NULL, both an alloc and a free method must + * be provided. + * \note This function will not block. + * + * \param[in] heapId HeapID to allocate memory on. + * \param[out] handle Opaque scatter-gather component ops handle. + * \param[in] ops Scatter-gather compoents ops to associate with + * the opaque handle. + * If this argument is NULL, then the + * default set of scatter-gather component ops + * will be used and the supplied heap + * will be used to allocate scatter-gather + * component arrays. + * \param[in] private Private data passed to each + * vmk_SgComponentArrayOps method when it + * is invoked. + * + * \retval VMK_OK The handle creation succeeded. + * \retval VMK_BAD_PARAM The heapId or ops setting is invalid. + * \retval VMK_NO_MEMORY Not enough memory to allocate a new + * handle. + *********************************************************************** + */ +VMK_ReturnStatus vmk_SgComponentCreateOpsHandle( + vmk_HeapID heapId, + vmk_SgComponentOpsHandle *handle, + vmk_SgComponentArrayOps *ops, + void *private); + /* *********************************************************************** * vmk_SgDestroyOpsHandle-- */ /** @@ -299,6 +459,24 @@ VMK_ReturnStatus vmk_SgCreateOpsHandle(vmk_HeapID heapId, */ VMK_ReturnStatus vmk_SgDestroyOpsHandle(vmk_SgOpsHandle handle); +/* + *********************************************************************** + * vmk_SgComponentDestroyOpsHandle-- */ /** + * + * \ingroup ScatterGather + * \brief Destroy opaque handle for scatter-gather component operations. + * + * \note This function will not block. + * + * \param[in] handle Opaque scatter-gather component ops handle to + * be destroyed. + * + * \retval VMK_OK The handle was destroyed. + *********************************************************************** + */ +VMK_ReturnStatus vmk_SgComponentDestroyOpsHandle( + vmk_SgComponentOpsHandle handle); + /* *********************************************************************** * vmk_SgAlloc-- */ /** @@ -309,9 +487,9 @@ VMK_ReturnStatus vmk_SgDestroyOpsHandle(vmk_SgOpsHandle handle); * \note This function will not block. * * \param[in] handle Opaque scatter-gather ops handle. - * \param[in] sg New scatter-gather array. + * \param[out] sg New scatter-gather array. * \param[in] maxElements Maximum number of elements the new - * sactter-gather array should have. + * scatter-gather array should have. * *********************************************************************** */ @@ -319,6 +497,29 @@ VMK_ReturnStatus vmk_SgAlloc(vmk_SgOpsHandle handle, vmk_SgArray **sg, vmk_uint32 maxElements); +/* + *********************************************************************** + * vmk_SgComponentAlloc-- */ /** + * + * \ingroup ScatterGather + * \brief Allocate a scatter-gather component array with a given number + * of component entries. + * + * \note This function will not block. + * + * \param[in] handle Opaque scatter-gather component ops handle. + * \param[out] sgComponent New scatter-gather component array. + * \param[in] maxLength Maximum number of components the new + * sactter-gather component array should have. + * + * \retval VMK_OK The allocation succeeded. + * \retval VMK_NO_MEMORY Not enough memory to allocate the array. + *********************************************************************** + */ +VMK_ReturnStatus vmk_SgComponentAlloc(vmk_SgComponentOpsHandle handle, + vmk_SgComponentArray **sgComponent, + vmk_uint32 maxLength); + /* *********************************************************************** * vmk_SgAllocWithInit-- */ /** @@ -392,6 +593,28 @@ VMK_ReturnStatus vmk_SgInit(vmk_SgOpsHandle handle, VMK_ReturnStatus vmk_SgFree(vmk_SgOpsHandle handle, vmk_SgArray *sgArray); + +/* + *********************************************************************** + * vmk_SgComponentFree -- */ /** + * + * \ingroup ScatterGather + * \brief Free a scatter-gather component array. + * + * \note This function will not block. + * + * \param[in] handle Opaque scatter-gather component ops handle. + * \param[in] sgComponentArray Pointer returned by + * vmk_SgAllocComponentArray(). + * + * \retval VMK_OK The array was freed. + * \retval VMK_BAD_PARAM The handle is invalid. + *********************************************************************** + */ +VMK_ReturnStatus vmk_SgComponentFree( + vmk_SgComponentOpsHandle handle, + vmk_SgComponentArray *sgComponentArray); + /* *********************************************************************** * vmk_SgCopyData -- */ /** @@ -466,6 +689,21 @@ VMK_ReturnStatus vmk_SgFindPosition(vmk_SgArray *sgArray, */ vmk_ByteCount vmk_SgGetDataLen(vmk_SgArray *sgArray); +/* + *********************************************************************** + * vmk_GetSgComponentDataLen -- */ /** + * + * \ingroup ScatterGather + * \brief Compute the size of a scatter-gather component list's + * payload in bytes. + * + * \note This function will not block. + * + *********************************************************************** + */ +vmk_ByteCount vmk_SgComponentGetDataLen( + vmk_SgComponentArray *sgComponentArray); + /* *********************************************************************** * vmk_SgCopyTo-- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_spinlock.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_spinlock.h index 0739715..2b4569d 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_spinlock.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_spinlock.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010-2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -13,6 +13,14 @@ * \addtogroup Core * @{ * \defgroup SpinLocks Spin Locks + * + * \par Lock acquisition behavior for lock types VMK_SPINLOCK and + * VMK_SPINLOCK_RW:\n + * In the case of lock contention, locks of types VMK_SPINLOCK and + * VMK_SPINLOCK_RW will spin for a short amount of time. If the lock + * acquisition does not succeed during the spinning phase, the lock acquisition + * function will block. + * * @{ * ****************************************************************************** @@ -34,9 +42,6 @@ /** Invalid lock rank */ #define VMK_SPINLOCK_RANK_INVALID (0) -/** Invalid lock irql */ -#define VMK_SPINLOCK_IRQL_INVALID ((vmk_LockIRQL)-1) - /** Lock rank for unranked locks */ #define VMK_SPINLOCK_UNRANKED (0xFFFF) @@ -48,16 +53,17 @@ typedef struct vmk_LockInt *vmk_Lock; /** - * Spinlock Types + * \brief Spinlock Types + * @{ */ -typedef enum vmk_SpinlockType { - /** Spinlock usable from a world context */ - VMK_SPINLOCK = 1, - /** Spinlock usable from a world and interrupt handler context */ - VMK_SPINLOCK_IRQ = 2, - /** RW Spinlock usable from a world context */ - VMK_SPINLOCK_RW = 3, -} vmk_SpinlockType; +typedef vmk_uint8 vmk_SpinlockType; + +/** Spinlock usable from a world context */ +#define VMK_SPINLOCK (1) +/** RW Spinlock usable from a world context */ +#define VMK_SPINLOCK_RW (3) + +/** @} */ /** @@ -65,14 +71,9 @@ typedef enum vmk_SpinlockType { */ typedef vmk_uint16 vmk_LockRank; -/** - * \brief IRQ level of a VMK_SPINLOCK_IRQ lock. - */ -typedef vmk_uint32 vmk_LockIRQL; - /** - * Spinlock Creation Properties + * \brief Spinlock Creation Properties */ typedef struct vmk_SpinlockCreateProps { /** Module ID for which the spinlock is created */ @@ -157,19 +158,26 @@ vmk_SpinlockAllocSize(vmk_SpinlockType type); ****************************************************************************** * vmk_SpinlockLock -- */ /** * - * Acquire a spinlock of type VMK_SPINLOCK + * \brief Acquire a spinlock of type VMK_SPINLOCK * * \param[in,out] lock Spinlock to be acquired * - * \return VMK_OK on success, error code otherwise - * * \note Lock checks are only executed when enabled for a given build. They * are always enabled for debug builds. * \note A caller has to release the spinlock with a subsequent call to * vmk_SpinlockUnlock * \note Callers are required to minimize the time and code that is executed * while any type of spinlock is held. - * \note This function will not block + * \note This function might block in case of lock contention + * \note The lock acquisition might not succeed if the world receives a + * VMK_DEATH_PENDING signal while it is waiting for the lock. + * + * \retval VMK_OK World acquired the lock. + * \retval VMK_DEATH_PENDING World blocked during the lock acquisition + * and awoken because the world is dying and + * being reaped by the scheduler. The caller + * is expected to return as soon as possible. + * The lock has not been acquired. * ****************************************************************************** */ @@ -178,50 +186,30 @@ VMK_ReturnStatus vmk_SpinlockLock(vmk_Lock lock); -/* - ****************************************************************************** - * vmk_SpinlockLockIRQ -- */ /** - * - * Acquire a spinlock of type VMK_SPINLOCK_IRQ - * - * \param[in,out] lock IRQ Spinlock to be acquired - * \param[out] irql Previous IRQ level of spinlock - * - * \return VMK_OK on success, error code otherwise - * - * \note Lock checks are only executed when enabled for a given build. They - * are always enabled for debug builds. - * \note A caller has to release the spinlock with a subsequent call to - * vmk_SpinlockUnlockIRQ, providing the value returned in irql. - * \note Callers are required to minimize the time and code that is executed - * while any type of spinlock is held. - * \note This function will not block. - * - ****************************************************************************** - */ - -VMK_ReturnStatus -vmk_SpinlockLockIRQ(vmk_Lock lock, - vmk_LockIRQL *irql); - - /* ****************************************************************************** * vmk_SpinlockReadLock -- */ /** * - * Acquire a spinlock of type VMK_SPINLOCK_RW for reading + * \brief Acquire a spinlock of type VMK_SPINLOCK_RW for reading * * \param[in,out] lock R/W Spinlock to be acquired * - * \return VMK_OK on success, error code otherwise - * * \note Lock checks are only executed when enabled for a given build. They * are always enabled for debug builds. * \note A caller has to release the spinlock with a subsequent call to * vmk_SpinlockReadUnlock * \note Callers are required to minimize the time and code that is executed * while any type of spinlock is held. - * \note This function will not block + * \note This function might block in case of lock contention + * \note The lock acquisition might not succeed if the world receives a + * VMK_DEATH_PENDING signal while it is waiting for the lock. + * + * \retval VMK_OK World acquired the read lock. + * \retval VMK_DEATH_PENDING World blocked during the lock acquisition + * and awoken because the world is dying and + * being reaped by the scheduler. The caller + * is expected to return as soon as possible. + * The read lock has not been acquired. * ****************************************************************************** */ @@ -234,19 +222,27 @@ vmk_SpinlockReadLock(vmk_Lock lock); ****************************************************************************** * vmk_SpinlockWriteLock -- */ /** * - * Acquire a spinlock of type VMK_SPINLOCK_RW for an exclusive write operation + * \brief Acquire a spinlock of type VMK_SPINLOCK_RW for an exclusive write + * operation * * \param[in,out] lock R/W Spinlock to be acquired * - * \return VMK_OK on success, error code otherwise - * * \note Lock checks are only executed when enabled for a given build. They * are always enabled for debug builds. * \note A caller has to release the spinlock with a subsequent call to - * vmk_SpinlockUnlock + * vmk_SpinlockWriteUnlock * \note Callers are required to minimize the time and code that is executed * while any type of spinlock is held. - * \note This function will not block + * \note This function might block in case of lock contention + * \note The lock acquisition might not succeed if the world receives a + * VMK_DEATH_PENDING signal while it is waiting for the lock. + * + * \retval VMK_OK World acquired the write lock. + * \retval VMK_DEATH_PENDING World blocked during the lock acquisition + * and awoken because the world is dying and + * being reaped by the scheduler. The caller + * is expected to return as soon as possible. + * The write lock has not been acquired. * ****************************************************************************** */ @@ -255,11 +251,90 @@ VMK_ReturnStatus vmk_SpinlockWriteLock(vmk_Lock lock); +/* + ****************************************************************************** + * vmk_SpinlockLockIgnoreDeathPending -- */ /** + * + * \brief Acquire a spinlock of type VMK_SPINLOCK + * + * \param[in,out] lock Spinlock to be acquired + * + * \note This functions should only be used by callers that must acquire a + * lock, for instance to perform clean up, even after a world has + * already received the VMK_DEATH_PENDING signal. + * \note Lock checks are only executed when enabled for a given build. They + * are always enabled for debug builds. + * \note A caller has to release the spinlock with a subsequent call to + * vmk_SpinlockUnlock + * \note Callers are required to minimize the time and code that is executed + * while any type of spinlock is held. + * \note This function might block in case of lock contention + * + ****************************************************************************** + */ + +void +vmk_SpinlockLockIgnoreDeathPending(vmk_Lock lock); + + +/* + ****************************************************************************** + * vmk_SpinlockReadLockIgnoreDeathPending -- */ /** + * + * \brief Acquire a spinlock of type VMK_SPINLOCK_RW for reading + * + * \param[in,out] lock R/W Spinlock to be acquired + * + * \note This functions should only be used by callers that must acquire a + * lock, for instance to perform clean up, even after a world has + * already received the VMK_DEATH_PENDING signal. + * \note Lock checks are only executed when enabled for a given build. They + * are always enabled for debug builds. + * \note A caller has to release the spinlock with a subsequent call to + * vmk_SpinlockReadUnlock + * \note Callers are required to minimize the time and code that is executed + * while any type of spinlock is held. + * \note This function might block in case of lock contention + * + ****************************************************************************** + */ + +void +vmk_SpinlockReadLockIgnoreDeathPending(vmk_Lock lock); + + +/* + ****************************************************************************** + * vmk_SpinlockWriteLockIgnoreDeathPending -- */ /** + * + * \brief Acquire a spinlock of type VMK_SPINLOCK_RW for an exclusive write + * operation + * + * \param[in,out] lock R/W Spinlock to be acquired + * + * \note This functions should only be used by callers that must acquire a + * lock, for instance to perform clean up, even after a world has + * already received the VMK_DEATH_PENDING signal. + * \note Lock checks are only executed when enabled for a given build. They + * are always enabled for debug builds. + * \note A caller has to release the spinlock with a subsequent call to + * vmk_SpinlockWriteUnlock + * \note Callers are required to minimize the time and code that is executed + * while any type of spinlock is held. + * \note This function might block in case of lock contention + * + ****************************************************************************** + */ + +void +vmk_SpinlockWriteLockIgnoreDeathPending(vmk_Lock lock); + + /* ****************************************************************************** * vmk_SpinlockUnlock -- */ /** * - * Release a spinlock previously acquired via vmk_SpinlockLock + * \brief Release a spinlock previously acquired via vmk_SpinlockLock * * \param[in,out] lock Spinlock to be released * @@ -276,30 +351,32 @@ vmk_SpinlockUnlock(vmk_Lock lock); /* ****************************************************************************** - * vmk_SpinlockUnlockIRQ -- */ /** + * vmk_SpinlockUnlockOutOfOrder -- */ /** * - * Release a IRQ spinlock previously acquired via vmk_SpinlockLockIRQ + * \brief Out of order release of a spinlock previously acquired via + * vmk_SpinlockLock * - * \param[in,out] lock IRQ Spinlock to be released - * \param[in] irql IRQ level of spinlock prior to locking + * \param[in,out] lock Spinlock to be released * - * \note Callers are required to release spinlocks in the reverse order in which - * they were acquired + * \note Callers are normally required to release spinlocks in the reverse + * order in which they were acquired. This function allows for out + * of order releases but this should only be done when it is known to + * be safe. This function should only be used for out of order releases; + * in all other cases vmk_SpinlockUnlock should be used. * \note This function will not block * ****************************************************************************** */ void -vmk_SpinlockUnlockIRQ(vmk_Lock lock, - vmk_LockIRQL irql); +vmk_SpinlockUnlockOutOfOrder(vmk_Lock lock); /* ****************************************************************************** * vmk_SpinlockReadUnlock -- */ /** * - * Release a R/W spinlock previously acquired via vmk_SpinlockReadLock + * \brief Release a R/W spinlock previously acquired via vmk_SpinlockReadLock * * \param[in,out] lock Spinlock to be released * @@ -314,11 +391,34 @@ void vmk_SpinlockReadUnlock(vmk_Lock lock); +/* + ****************************************************************************** + * vmk_SpinlockReadUnlockOutOfOrder -- */ /** + * + * \brief Out of order release of a R/W spinlock previously acquired via + * vmk_SpinlockReadLock + * + * \param[in,out] lock Spinlock to be released + * + * \note Callers are normally required to release spinlocks in the reverse + * order in which they were acquired. This function allows for out + * of order releases but this should only be done when it is known to + * be safe. This function should only be used for out of order releases; + * in all other cases vmk_SpinlockReadUnlock should be used. + * \note This function will not block + * + ****************************************************************************** + */ + +void +vmk_SpinlockReadUnlockOutOfOrder(vmk_Lock lock); + + /* ****************************************************************************** * vmk_SpinlockWriteUnlock -- */ /** * - * Release a R/W spinlock previously acquired via vmk_SpinlockWriteLock + * \brief Release a R/W spinlock previously acquired via vmk_SpinlockWriteLock * * \param[in,out] lock Spinlock to be released * @@ -335,9 +435,31 @@ vmk_SpinlockWriteUnlock(vmk_Lock lock); /* ****************************************************************************** - * vmk_SpinlockAssertHeldOnPCPUInt -- + * vmk_SpinlockWriteUnlockOutOfOrder -- */ /** * - * This is used by vmk_SpinlockAssertHeldOnPCPU(). VMKAPI clients should not + * \brief Out of order release of a R/W spinlock previously acquired via + * vmk_SpinlockWriteLock + * + * \param[in,out] lock Spinlock to be released + * + * \note Callers are normally required to release spinlocks in the reverse + * order in which they were acquired. This function allows for out + * of order releases but this should only be done when it is known to + * be safe. This function should only be used for out of order releases; + * in all other cases vmk_SpinlockWriteUnlock should be used. + * \note This function will not block + * + ****************************************************************************** + */ + +void +vmk_SpinlockWriteUnlockOutOfOrder(vmk_Lock lock); + +/* + ****************************************************************************** + * vmk_SpinlockAssertReaderHeldByWorldInt -- + * + * This is used by vmk_SpinlockAssertHeldByWorld(). VMKAPI clients should not * call this function directly. * * \note This function will not block @@ -347,29 +469,74 @@ vmk_SpinlockWriteUnlock(vmk_Lock lock); /** \cond nodoc */ void -vmk_SpinlockAssertHeldOnPCPUInt(vmk_Lock lock); +vmk_SpinlockAssertReaderHeldByWorldInt(vmk_Lock lock); /** \endcond */ /* ****************************************************************************** - * vmk_SpinlockAssertHeldOnPCPU -- */ /** + * vmk_SpinlockAssertReaderHeldByWorld -- */ /** * - * \brief Asserts that a lock is held on the current PCPU + * \brief Asserts that a VMK_SPINLOCK_RW reader lock is held by the current world * - * \param[in] lock Lock to check + * \param[in] lock VMK_SPINLOCK_RW reader lock to check * * \note Checks are only executed on debug builds. + * \note This function should only be called with a lock of lock type + * VMK_SPINLOCK_RW which is holding a VMK_SPINLOCK_RW reader lock. * \note This function will not block * ****************************************************************************** */ static VMK_ALWAYS_INLINE void -vmk_SpinlockAssertHeldOnPCPU( +vmk_SpinlockAssertReaderHeldByWorld( vmk_Lock lock) { #ifdef VMX86_DEBUG - vmk_SpinlockAssertHeldOnPCPUInt(lock); + vmk_SpinlockAssertReaderHeldByWorldInt(lock); +#endif +} + +/* + ****************************************************************************** + * vmk_SpinlockAssertHeldByWorldInt -- + * + * This is used by vmk_SpinlockAssertHeldByWorld(). VMKAPI clients should not + * call this function directly. + * + * \note This function will not block + * + ****************************************************************************** + */ + +/** \cond nodoc */ +void +vmk_SpinlockAssertHeldByWorldInt(vmk_Lock lock); +/** \endcond */ + +/* + ****************************************************************************** + * vmk_SpinlockAssertHeldByWorld -- */ /** + * + * \brief Asserts that a lock is held by the current world + * + * \param[in] lock Lock to check + * + * \note Checks are only executed on debug builds. + * \note This function should only be called with a lock of lock type + * VMK_SPINLOCK or VMK_SPINLOCK_RW (RW locks that are writer locks only). + * For reader locks, use vmk_SpinlockAssertReaderHeldByWorld(). + * \note This function will not block + * + ****************************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_SpinlockAssertHeldByWorld( + vmk_Lock lock) +{ +#ifdef VMX86_DEBUG + vmk_SpinlockAssertHeldByWorldInt(lock); #endif } diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_spinlock_deprecated.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_spinlock_deprecated.h new file mode 100644 index 0000000..a743836 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_spinlock_deprecated.h @@ -0,0 +1,193 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ****************************************************************************** + * Spin Locks */ /** + * + * \addtogroup Core + * @{ + * \addtogroup SpinLocks + * @{ + * \defgroup Deprecated Deprecated APIs + * @{ + * + ****************************************************************************** + */ + +#ifndef _VMKAPI_SPINLOCK_DEPRECATED_H_ +#define _VMKAPI_SPINLOCK_DEPRECATED_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** Invalid lock irql */ +#define VMK_SPINLOCK_IRQL_INVALID ((vmk_LockIRQL)-1) + + +/** + * \brief Spinlock Types + * @{ + */ + +/** Spinlock usable from a world and interrupt handler context */ +#define VMK_SPINLOCK_IRQ (2) + +/** @} */ + + +/** + * \brief IRQ level of a VMK_SPINLOCK_IRQ lock. + */ +typedef vmk_uint32 vmk_LockIRQL; + + +/* + ****************************************************************************** + * vmk_SpinlockLockIRQ -- */ /** + * + * \brief Acquire a spinlock of type VMK_SPINLOCK_IRQ + * + * \deprecated + * + * \param[in,out] lock IRQ Spinlock to be acquired + * \param[out] irql Previous IRQ level of spinlock + * + * \return VMK_OK on success, error code otherwise + * + * \note Lock checks are only executed when enabled for a given build. They + * are always enabled for debug builds. + * \note A caller has to release the spinlock with a subsequent call to + * vmk_SpinlockUnlockIRQ, providing the value returned in irql. + * \note Callers are required to minimize the time and code that is executed + * while any type of spinlock is held. + * \note This function will not block. + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +VMK_ReturnStatus +vmk_SpinlockLockIRQ(vmk_Lock lock, + vmk_LockIRQL *irql); + + +/* + ****************************************************************************** + * vmk_SpinlockUnlockIRQ -- */ /** + * + * \brief Release a IRQ spinlock previously acquired via vmk_SpinlockLockIRQ + * + * \deprecated + * + * \param[in,out] lock IRQ Spinlock to be released + * \param[in] irql IRQ level of spinlock prior to locking + * + * \note Callers are required to release spinlocks in the reverse order in which + * they were acquired + * \note This function will not block + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +void +vmk_SpinlockUnlockIRQ(vmk_Lock lock, + vmk_LockIRQL irql); + + +/* + ****************************************************************************** + * vmk_SpinlockUnlockIRQOutOfOrder -- */ /** + * + * \brief Out of order release of a IRQ spinlock previously acquired via + * vmk_SpinlockLockIRQ + * + * \deprecated + * + * \param[in,out] lock IRQ Spinlock to be released + * \param[in] irql IRQ level of spinlock prior to locking + * + * \note Callers are normally required to release spinlocks in the reverse + * order in which they were acquired. This function allows for out + * of order releases but this should only be done when it is known to + * be safe. This function should only be used for out of order releases; + * in all other cases vmk_SpinlockUnlockIRQ should be used. + * \note This function will not block + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +void +vmk_SpinlockUnlockIRQOutOfOrder(vmk_Lock lock, + vmk_LockIRQL irql); + + +/* + ****************************************************************************** + * vmk_SpinlockAssertHeldOnPCPUInt -- + * + * This is used by vmk_SpinlockAssertHeldOnPCPU(). VMKAPI clients should not + * call this function directly. + * + * \deprecated + * + * \note This function will not block + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +/** \cond nodoc */ +void +vmk_SpinlockAssertHeldOnPCPUInt(vmk_Lock lock); +/** \endcond */ + + +/* + ****************************************************************************** + * vmk_SpinlockAssertHeldOnPCPU -- */ /** + * + * \brief Asserts that a lock is held on the current PCPU + * + * \deprecated + * + * \param[in] lock Lock to check + * + * \note Checks are only executed on debug builds. + * \note This function should only be called with a lock of lock type + * VMK_SPINLOCK_IRQ + * \note This function will not block + * + * \nativedriversdisallowed + * + ****************************************************************************** + */ + +static VMK_ALWAYS_INLINE void +vmk_SpinlockAssertHeldOnPCPU( + vmk_Lock lock) +{ +#ifdef VMX86_DEBUG + vmk_SpinlockAssertHeldOnPCPUInt(lock); +#endif +} + +#endif +/** @} */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_user.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_user.h index bb95f85..44a3838 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_user.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_user.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010-2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -26,6 +26,171 @@ #endif /** \endcond never */ + +/* + *********************************************************************** + * vmk_UserMapCallback -- */ /** + * + * \brief Callback function invoked when user mapping is released. + * + * \param[in] callbackParam Opaque parameter for callback function. + * + *********************************************************************** + */ +typedef void (*vmk_UserMapCallback)(void *); + + +/** + * \brief Properties of a vmk_UserMap() map request. + */ +typedef struct vmk_UserMapProps { + /** \brief Module ID of module requesting mapping. */ + vmk_ModuleID moduleID; + /** \brief Function to call when mapping is released. */ + vmk_UserMapCallback callbackFunction; + /** \brief Opaque parameter for callbackFunction. */ + vmk_AddrCookie callbackParam; + /** + * \brief Pointer to map request structure. + * + * \note See Mapping section for description + * of map request structure. + */ + vmk_MapRequest *mapRequest; +} vmk_UserMapProps; + + +/* + *********************************************************************** + * vmk_UserMap -- */ /** + * + * \brief Map the provided request into a contiguous virtual address + * space of current user world. + * + * \note The only supported mapping attributes are READONLY, READWRITE, + * WRITECOMBINE, and UNCACHED. Any other attribute will cause + * mapping to fail with return status VMK_BAD_PARAM. + * + * \param[in] props Properties of this mapping request. + * \param[in,out] vaddr Pointer to virtual address of mapping + * (non-zero to specify a virtual address, + * or zero for default address). + * + * \retval VMK_OK Map is successful. + * \retval VMK_BAD_PARAM Input parameter is invalid. + * \retval VMK_NO_MEMORY Unable to allocate mapping request. + * \retval VMK_NO_RESOURCES Unable to allocate mapping request. + * \retval VMK_INVALID_ADDRESS Requested address not in map range. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserMap( + vmk_UserMapProps *props, + vmk_VA *vaddr); + +/* + *********************************************************************** + * vmk_UserUnmap -- */ /** + * + * \brief Unmap user world virtual address space mapped by vmk_UserMap(). + * + * \param[in] vaddr Virtual address to unmap. + * \param[in] length Length of address space in bytes. + * + * \retval VMK_OK Unmap is successful. + * \retval VMK_NOT_FOUND Virtual address and length not mapped. + * \retval VMK_INVALID_ADDRESS Requested address is not page aligned. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserUnmap( + vmk_VA vaddr, + vmk_ByteCount length); + +/* + *********************************************************************** + * vmk_UserAddValidMPNRange -- */ /** + * + * \brief Indicate a range of consecutive MPNs can be referenced by + * user worlds. + * + * \param[in] mpn First MPN in range. + * \param[in] numPages Number of machine pages in range. + * + * \retval VMK_OK MPNs added to user worlds. + * \retval VMK_BAD_PARAM Input parameter is invalid. + * \retval VMK_NO_MEMORY Unable to allocate memory for request. + * \retval VMK_INVALID_PAGE_NUMBER MPN range intersects with existing + * MPN range. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserAddValidMPNRange( + vmk_MPN mpn, + vmk_uint32 numPages); + +/* + *********************************************************************** + * vmk_UserRemoveValidMPNRange -- */ /** + * + * \brief Remove a range of consecutive MPNs from user worlds. + * + * \param[in] mpn First MPN in range. + * \param[in] numPages Number of machine pages in range. + * + * \retval VMK_OK MPNs removed from user worlds. + * \retval VMK_NOT_FOUND MPN range not found. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserRemoveValidMPNRange( + vmk_MPN mpn, + vmk_uint32 numPages); + +/* + *********************************************************************** + * vmk_UserPinPage -- */ /** + * + * \brief Marks the VPN in the specified world as not swappable. + * + * \param[in] worldID ID of world whose mapping will be pinned. + * \param[in] vpn VPN to pin. + * \param[out] mpn MPN backing this pinned VPN. + * + * \retval VMK_OK VPNs was pinned successfully. + * \retval VMK_BAD_PARAM An invalid argument was provided. + * \retval VMK_INVALID_WORLD An invalid worldID was provided. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserPinPage( + vmk_WorldID worldID, + vmk_VPN vpn, + vmk_MPN *mpn); + +/* + *********************************************************************** + * vmk_UserUnpinPage -- */ /** + * + * \brief Marks the specified VPN in the specified world as swappable. + * + * \note This VPN must have been pinned by a call to vmk_UserPinPage(). + * + * \param[in] worldID ID of world whose mapping will be + * unpinned. + * \param[in] vpn VPN to unpin. + * + * \retval VMK_OK VPNs was unpinned successfully. + * \retval VMK_BAD_PARAM An invalid argument was provided. + * \retval VMK_INVALID_WORLD An invalid worldID was provided. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UserUnpinPage( + vmk_WorldID worldID, + vmk_VPN vpn); + + /* ****************************************************************************** * vmk_CopyFromUser -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_user_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_user_incompat.h deleted file mode 100644 index a823f24..0000000 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/core/vmkapi_user_incompat.h +++ /dev/null @@ -1,137 +0,0 @@ -/* ********************************************************** - * Copyright 2011 VMware, Inc. All rights reserved. - * **********************************************************/ - -/* - * @VMKAPIMOD_LICENSE@ - */ - -/* - ****************************************************************************** - * User Space Interface */ /** - * - * \addtogroup Core - * @{ - * \defgroup User Space - * @{ - ****************************************************************************** - */ - -#ifndef _VMKAPI_CORE_USER_INCOMPAT_H_ -#define _VMKAPI_CORE_USER_INCOMPAT_H_ - -/** \cond never */ -#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H -#error This vmkapi file should never be included directly but only via vmkapi.h -#endif -/** \endcond never */ - -/* - *********************************************************************** - * vmk_UserMapCallback -- */ /** - * - * \brief Callback function invoked when user mapping is released. - * - * \param[in] callbackParam Opaque parameter for callback function. - * - *********************************************************************** - */ -typedef void (*vmk_UserMapCallback)(void *); - -/* - *********************************************************************** - * vmk_UserMap -- */ /** - * - * \brief Map the provided machine address ranges into a contiguous - * virtual address space of current user world. - * - * \note See Mapping section for description of mapRequest parameter. - * \note The only supported mapping attributes are READONLY, READWRITE, - * WRITECOMBINE, and UNCACHED. Any other attribute will cause - * mapping to fail with return status VMK_BAD_PARAM. - * - * \param[in] moduleID Module ID of the caller. - * \param[in] mapRequest Pointer to a mapRequest structure. - * \param[in,out] vaddr Pointer to virtual address of mapping - * (non-zero to specify a virtual address, - * or zero for default address). - * \param[in] callbackFunction Function to call when mapping is released. - * \param[in] callbackParam Opaque parameter for callbackFunction. - * - * \retval VMK_OK Map is successful. - * \retval VMK_BAD_PARAM Input parameter is invalid. - * \retval VMK_NO_MEMORY Unable to allocate mapping request. - * \retval VMK_NO_RESOURCES Unable to allocate mapping request. - * \retval VMK_INVALID_ADDRESS Requested address not in map range. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_UserMap( - vmk_ModuleID moduleID, - vmk_MapRequest *mapRequest, - vmk_VA *vaddr, - vmk_UserMapCallback callbackFunction, - void *callbackParam); - -/* - *********************************************************************** - * vmk_UserUnmap -- */ /** - * - * \brief Unmap user world virtual address space mapped by vmk_UserMap(). - * - * \param[in] vaddr Virtual address to unmap. - * \param[in] length Length of address space in bytes. - * - * \retval VMK_OK Unmap is successful. - * \retval VMK_NOT_FOUND Virtual address and length not mapped. - * \retval VMK_INVALID_ADDRESS Requested address is not page aligned. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_UserUnmap( - vmk_VA vaddr, - vmk_ByteCount length); - -/* - *********************************************************************** - * vmk_UserAddValidMPNRange -- */ /** - * - * \brief Indicate a range of consecutive MPNs can be referenced by - * user worlds. - * - * \param[in] mpn First MPN in range. - * \param[in] numPages Number of machine pages in range. - * - * \retval VMK_OK MPNs added to user worlds. - * \retval VMK_BAD_PARAM Input parameter is invalid. - * \retval VMK_NO_MEMORY Unable to allocate memory for request. - * \retval VMK_INVALID_PAGE_NUMBER MPN range intersects with existing - * MPN range. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_UserAddValidMPNRange( - vmk_MPN mpn, - vmk_uint32 numPages); - -/* - *********************************************************************** - * vmk_UserRemoveValidMPNRange -- */ /** - * - * \brief Remove a range of consecutive MPNs from user worlds. - * - * \param[in] mpn First MPN in range. - * \param[in] numPages Number of machine pages in range. - * - * \retval VMK_OK MPNs removed from user worlds. - * \retval VMK_NOT_FOUND MPN range not found. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_UserRemoveValidMPNRange( - vmk_MPN mpn, - vmk_uint32 numPages); - -#endif -/** @} */ -/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_isa.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_isa.h index 8a0dc70..9b583ee 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_isa.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_isa.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2008 - 2009 VMware, Inc. All rights reserved. + * Copyright 2008 - 2009, 2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -27,21 +27,21 @@ /* *********************************************************************** - * vmk_ISAMapIRQToVector -- */ /** + * vmk_ISAMapIRQToIntrCookie -- */ /** * * \ingroup ISA - * \brief Retrieves the vector the kernel assigned for an isa IRQ + * \brief Retrieves the intrCookie the kernel assigned for an isa IRQ * - * \param[in] isaIRQ ISA IRQ value. - * \param[out] vector Corresponding vector for specified IRQ. + * \param[in] isaIRQ ISA IRQ value. + * \param[out] intrCookie Corresponding intrCookie for specified IRQ. * * \retval VMK_BAD_PARAM isaIRQ is out of range. - * \retval VMK_BAD_PARAM Vector was NULL. + * \retval VMK_BAD_PARAM intrCookie was NULL. * *********************************************************************** */ -VMK_ReturnStatus vmk_ISAMapIRQToVector(vmk_uint32 isaIRQ, - vmk_uint32 *vector); +VMK_ReturnStatus vmk_ISAMapIRQToIntrCookie(vmk_uint32 isaIRQ, + vmk_IntrCookie *intrCookie); #endif /* _VMKAPI_ISA_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci.h index 80f272b..276e7ba 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 1998 - 2009 VMware, Inc. All rights reserved. + * Copyright 1998 - 2013 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -45,24 +45,11 @@ #define VMK_PCI_NUM_SLOTS 32 /** \brief Per-slot max for functions */ #define VMK_PCI_NUM_FUNCS 8 -/** \brief Per-slot max for primary interrupt pins */ -#define VMK_PCI_NUM_PINS 4 /** \brief Per-device max for BARs */ #define VMK_PCI_NUM_BARS 6 /** \brief Per-device max for BARs on a bridge */ #define VMK_PCI_NUM_BARS_BRIDGE 2 -/** - * \brief PCI device owner. - */ -typedef enum vmk_PCIDeviceOwner { - VMK_PCI_DEVICE_OWNER_UNKNOWN = 0, - VMK_PCI_DEVICE_OWNER_HOST = 1, - VMK_PCI_DEVICE_OWNER_KERNEL = 2, - VMK_PCI_DEVICE_OWNER_MODULE = 3, - VMK_PCI_DEVICE_OWNER_VM = 4, -} vmk_PCIDeviceOwner; - /** * \brief PCI BAR flags. */ @@ -75,483 +62,173 @@ typedef enum vmk_PCIBARFlags { } vmk_PCIBARFlags; /** - * \brief BAR descriptor. - */ -typedef struct vmk_PCIBARInfo { - /** BAR base address */ - vmk_MA address; - - /** BAR size (in bytes) */ - vmk_ByteCount size; - - /** BAR flags */ - vmk_PCIBARFlags flags; -} vmk_PCIBARInfo; - -/** - * \brief Information about a PCI device. + * \brief PCI device identifier. * - * VMK_PCI_NUM_BARS is the maximum number of BARs as per the PCI spec. - * The actual valid number of BARs depends on the device type; - * for bridges, this number is VMK_PCI_NUM_BARS_BRIDGE and for - * non-bridges, it is VMK_PCI_NUM_BARS. */ -typedef struct vmk_PCIDeviceInfo { +typedef struct vmk_PCIDeviceID { vmk_uint16 vendorID; vmk_uint16 deviceID; - vmk_uint16 classCode; - vmk_uint16 progIFRevID; vmk_uint16 subVendorID; vmk_uint16 subDeviceID; - vmk_uint8 hdrType; - vmk_uint8 intLine; - vmk_uint8 intPin; - - /** \brief Spawned bus number if device is a PCI bridge. */ - vmk_uint8 spawnedBus; - - /** \brief Current owner of the device */ - vmk_PCIDeviceOwner owner; - - /** \brief Device BARs */ - vmk_PCIBARInfo bars[VMK_PCI_NUM_BARS]; -} vmk_PCIDeviceInfo; + vmk_uint16 classCode; + vmk_uint16 progIFRevID; +} vmk_PCIDeviceID; /** - * \brief A PCI device capability value. + * \brief PCI device Address (SBDF). + * */ -typedef struct vmk_PCICapability { - vmk_uint16 capIdx; - vmk_uint8 capType; -} vmk_PCICapability; +typedef struct vmk_PCIDeviceAddr { + vmk_uint16 seg; + vmk_uint8 bus; + vmk_uint8 dev:5; + vmk_uint8 fn:3; +} vmk_PCIDeviceAddr; + +/** + * \brief PCI device resource. + * + */ +typedef struct vmk_PCIResource { + /** \brief Resource's physical address. */ + vmk_MA start; + /** \brief Resource size in bytes. */ + vmk_ByteCount size; + /** \brief Resource flags. */ + vmk_uint64 flags; +} vmk_PCIResource; /** * \brief Configuration space access types */ -typedef enum vmk_ConfigSpaceAccess{ - VMK_ACCESS_8 = 1, - VMK_ACCESS_16 = 2, - VMK_ACCESS_32 = 4 -} vmk_ConfigSpaceAccess; +typedef enum vmk_PCIConfigAccess { + VMK_PCI_CONFIG_ACCESS_8 = 1, + VMK_PCI_CONFIG_ACCESS_16 = 2, + VMK_PCI_CONFIG_ACCESS_32 = 4 +} vmk_PCIConfigAccess; + +/* + *********************************************************************** + * vmk_PCIRemoveVF -- */ /** + * + * \ingroup PCI + * \brief Remove a PCI virtual function (VF) device. + * + * Physical function (PF) driver should carry out any operations + * required for the removal of a virtual function device, and + * unregister the virtual function device using vmk_PCIUnregisterVF(). + * + * \param[in] vf Handle to PCI VF to be removed. + * + * \retval VMK_OK Success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_PCIRemoveVF)(vmk_PCIDevice vf); /** - * \brief Opaque map handle + * \brief PCI virtual function (VF) device operations. */ -typedef struct vmk_PCIMapHandleInt *vmk_PCIMapHandle; +typedef struct { + /** \brief Remove a PCI virtual function from the system. */ + vmk_PCIRemoveVF removeVF; +} vmk_PCIVFDeviceOps; /** - * \brief Type of interrupt triggering + *********************************************************************** + * vmk_PCIQueryDeviceID -- */ /** + * + * \ingroup PCI + * \brief Query PCI Device's identifier information. + * + * Upon successful completion, devID structure is filled with the + * identifier information. + * + * \param[in] pciDevice Pointer to PCI device handle. + * \param[out] devID Pointer to PCI Device ID struct. + * + * \retval VMK_BAD_PARAM pciDevice or devID is invalid. + * \retval VMK_OK Query successfully processed. + * + *********************************************************************** */ -typedef enum vmk_PCIInterruptTriggerType { - VMK_PCI_INTERRUPT_TRIGGER_NONE=0, - VMK_PCI_INTERRUPT_TRIGGER_LEVEL=1, - VMK_PCI_INTERRUPT_TRIGGER_EDGE=2, -} vmk_PCIInterruptTriggerType; +VMK_ReturnStatus vmk_PCIQueryDeviceID(vmk_PCIDevice pciDevice, + vmk_PCIDeviceID *devID); /** - * \brief interrupt information + *********************************************************************** + * vmk_PCIQueryDeviceAddr -- */ /** + * + * \ingroup PCI + * \brief Query PCI Device's Address (SBDF) information. + * + * Upon successful operation, sbdf struct is filled with device's + * seg, bus, dev, fn information. + * + * \param[in] pciDevice Pointer to PCI device handle. + * \param[out] sbdf Pointer to PCI Device Addr struct. + * + * \retval VMK_BAD_PARAM pciDevice or sbdf is invalid. + * \retval VMK_OK Query successfully processed. + * + *********************************************************************** */ -typedef struct vmk_PCIInterruptInfo { - /** Device-specific interrupt info */ - void *specific; - - /** Vmkernel vector */ - vmk_uint32 vector; - - /** Type of interrupt */ - vmk_PCIInterruptType type; - - /** Type of interrupt triggering */ - vmk_PCIInterruptTriggerType triggering; -} vmk_PCIInterruptInfo; +VMK_ReturnStatus vmk_PCIQueryDeviceAddr(vmk_PCIDevice pciDevice, + vmk_PCIDeviceAddr *sbdf); /** - * \brief Device callback reason - */ -typedef enum vmk_PCIDeviceCallbackReason { - VMK_PCI_DEVICE_INSERTED = 0, - VMK_PCI_DEVICE_REMOVED = 1, - VMK_PCI_DEVICE_CHANGED_OWNER = 2, -} vmk_PCIDeviceCallbackReason; - -/** - * \brief Argument passed to a PCI event callback - */ -typedef struct vmk_PCIDeviceCallbackArg { - /* Reason for callback */ - vmk_PCIDeviceCallbackReason reason; - - /* Data for callback */ - union { - struct { - vmk_PCIDeviceOwner old; - vmk_PCIDeviceOwner new; - } changedOwner; - } data; -} vmk_PCIDeviceCallbackArg; - -/** - * \brief Callback to handle PCI events. - */ -typedef void (*vmk_PCICallback)(vmk_PCIDevice device, - vmk_PCIDeviceCallbackArg *callbackArgs, - void *callbackPrivate); - -/* *********************************************************************** - * vmk_PCIGetDevice -- */ /** + * vmk_PCIQueryIOResources -- */ /** * * \ingroup PCI - * \brief Retrieves vmk_PCIDevice that corresponds to the generic - * device genDevice. + * \brief Query PCI Device's BAR resources information. * - * \param[in] genDevice Generic device handle. - * \param[out] pciDevice Pointer to PCI device handle. + * Upon successful completion, resources array is filled with device's + * first numBars BARs [0 - numBars) information. The resources array + * passed in should be able to hold numBars resources. * - * \retval VMK_BAD_PARAM genDevice is invalid - * \retval VMK_OK PCI device handle is successfully returned. + * \param[in] pciDevice Pointer to PCI device handle. + * \param[in] numBars Number of resources queried. + * \param[out] resources Pointer to PCI resources array. + * + * \retval VMK_BAD_PARAM pciDevice or resources is invalid. + * \retval VMK_BAD_PARAM numBars is greater than VMK_PCI_NUM_BARS + * \retval VMK_OK Query successfully processed. * *********************************************************************** */ -VMK_ReturnStatus vmk_PCIGetDevice(vmk_Device genDevice, - vmk_PCIDevice *pciDevice); +VMK_ReturnStatus vmk_PCIQueryIOResources(vmk_PCIDevice pciDevice, + vmk_uint8 numBars, + vmk_PCIResource resources[]); /* *********************************************************************** - * vmk_PCIGetGenDevice -- */ /** - * - * \ingroup PCI - * \brief Retrieves generic vmk_Device that corresponds to the PCI - * device pciDevice. - * - * \param[in] pciDevice PCI device handle. - * \param[out] genDevice Pointer to generic device handle. - * - * \retval VMK_BAD_PARAM pciDevice is invalid - * \retval VMK_OK Generic device handle is successfully - * returned. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetGenDevice(vmk_PCIDevice pciDevice, - vmk_Device *genDevice); - -/* - *********************************************************************** - * vmk_PCIGetPCIDevice -- */ /** - * - * \ingroup PCI - * \brief Retrieves vmk_PCIDevice handle that corresponds to segment, - * bus, device and function - * - * \param[in] segment PCI segment - * \param[in] bus Bus number - * \param[in] dev Device number - * \param[in] func Function number - * \param[out] device PCI device handle - * - * \retval VMK_NOT_FOUND Device with bus, device, number does not exist - * \retval VMK_BAD_PARAM device argument is NULL - * \retval VMK_OK device handle is successfully returned. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetPCIDevice(const vmk_uint16 segment, - const vmk_uint8 bus, - const vmk_uint8 dev, - const vmk_uint8 func, - vmk_PCIDevice *device); - -/* - *********************************************************************** - * vmk_PCIGetSegmentBusDevFunc -- */ /** - * - * \ingroup PCI - * \brief Return device's bus, device, func and function - * - * \param[in] device PCI device handle - * \param[out] segment Pointer to Segment number - * \param[out] bus Pointer to Bus number - * \param[out] dev Pointer to Device number - * \param[out] func Pointer to Function number - * - * \retval VMK_BAD_PARAM One or more of bus, dev, func is NULL. - * \retval VMK_BAD_PARAM Device handle is invalid or device does - * not exist. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetSegmentBusDevFunc(vmk_PCIDevice device, - vmk_uint16 *segment, - vmk_uint8 *bus, - vmk_uint8 *dev, - vmk_uint8 *func); - -/* - *********************************************************************** - * vmk_PCIGetIDs -- */ /** - * - * \ingroup PCI - * \brief Return device's vendor ID, device ID, sub vendor ID and - * sub device iD - * - * \param[in] device PCI device handle - * \param[out] vendorID Pointer to vendor ID. - * \param[out] deviceID Pointer to device ID. - * \param[out] subVendorID Pointer to sub vendor ID. - * \param[out] subDeviceID Pointer to sub device ID. - * - * \retval VMK_BAD_PARAM One or more of vendorID, deviceID - * subVendorID and subDeviceID is NULL. - * \retval VMK_BAD_PARAM Device handle is invalid or device does - * not exist. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetIDs(vmk_PCIDevice device, - vmk_uint16 *vendorID, - vmk_uint16 *deviceID, - vmk_uint16 *subVendorID, - vmk_uint16 *subDeviceID); - -/* - *********************************************************************** - * vmk_PCIGetInfo -- */ /** - * - * \ingroup PCI - * \brief Fills in the details corresponding to device. - * - * \note The BARs stored in the vmk_PCIDeviceInfo are canonical. User - * should not read the PCI config registers to obtain the BARs values. - * - * \param[in] device PCI device handle - * \param[in] deviceInfo Pointer to vmk_PCIDeviceInfo - * - * \retval VMK_BAD_PARAM DeviceInfo pointer is NULL. - * \retval VMK_BAD_PARAM Device handle is invalid or device does - * not exist. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetInfo(vmk_PCIDevice device, - vmk_PCIDeviceInfo *deviceInfo); - -/* - *********************************************************************** - * vmk_PCIGetDeviceList -- */ /** - * - * \ingroup PCI - * \brief Returns an array of vmk_PCIDevice handles of all devices with - * vendorID and deviceID. - * - * The list of devices returned is just a snap shot at the time the call - * was made. The list can change between invocations and the number of - * devices may be actually more or less than what is returned to the - * caller. - * - * Only the list of devices with matching vendorID or deviceID are - * returned. vendorID/deviceID of 0xFFFF matches any vendorID/deviceID. - * - * \note Requires that the module heap be initialized. - * - * \param[in] moduleID Module ID of the caller - * \param[in] vendorID Vendor ID of interest - * \param[in] deviceID Device ID of interest - * \param[out] devices Pointer to an array of vmk_PCIDevice handles - * \param[out] numDevices Pointer to the number of array elements - * - * \retval VMK_BAD_PARAM Devices and/or numDevices ponters are NULL. - * \retval VMK_NO_MEMORY Unable to allocate memory to hold the handles - * \retval VMK_NO_MODULE_HEAP The module has no heap to allocate from - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetDeviceList(vmk_ModuleID moduleID, - vmk_uint16 vendorID, - vmk_uint16 deviceID, - vmk_PCIDevice **devices, - int *numDevices); - -/* - *********************************************************************** - * vmk_PCISetDeviceName -- */ /** - * - * \ingroup PCI - * \brief Sets the device name - * - * \param[in] device PCI device handle - * \param[in] name Name to be set - * - * \retval VMK_BAD_PARAM Device handle is invalid/non existent or name - * is NULL - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCISetDeviceName(vmk_PCIDevice device, - const char *name); - -/* - *********************************************************************** - * vmk_PCIGetDeviceName -- */ /** - * - * \ingroup PCI - * \brief Gets the device name - * - * \param[in] device PCI device handle - * \param[out] name Pointer to char array to return the name in - * \param[in] nameLen Length of the char array. - * - * \retval VMK_BAD_PARAM Device is invalid or non existent. - * \retval VMK_BAD_PARAM Name is NUL or nameLen is greater than - * VMK_PCI_DEVICE_NAME_LENGTH. - * \retval VMK_DEVICE_NOT_NAMED Device is not named - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetDeviceName(vmk_PCIDevice device, - char *name, - vmk_ByteCount nameLen); - -/* - *********************************************************************** - * vmk_PCIGetAlternateName -- */ /** - * - * \ingroup PCI - * \brief Gets the alternate name of the device - * - * \param[in] device PCI device handle - * \param[out] name Pointer to char array to return the name in - * \param[in] nameLen Length of the char array. - * - * \retval VMK_BAD_PARAM Device is invalid or non existent. - * \retval VMK_BAD_PARAM Name is NULL or nameLen is greater than - * VMK_PCI_DEVICE_NAME_LENGTH. - * \retval VMK_DEVICE_NOT_NAMED Device has no alternate name - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetAlternateName(vmk_PCIDevice device, - char *name, - vmk_ByteCount nameLen); - -/* - *********************************************************************** - * vmk_PCIGetCapabilityIndex -- */ /** + * vmk_PCIFindCapability -- */ /** * * \ingroup PCI * \brief Returns the offset of the capability in device's config space. * * \param[in] device PCI device handle - * \param[in] capType Capability of interest - * \param[out] capIdx Pointer to the capability index + * \param[in] capID Capability ID of interest + * \param[out] capOffset Pointer to the capability offset * - * \retval VMK_BAD_PARAM If capIdx is NULL or device handle is NULL/invalid + * \retval VMK_BAD_PARAM If capOffset is NULL or device handle is invalid * \retval VMK_NOT_FOUND capability is not found * *********************************************************************** */ -VMK_ReturnStatus vmk_PCIGetCapabilityIndex(vmk_PCIDevice device, - vmk_uint8 capType, - vmk_uint16 *capIdx); +VMK_ReturnStatus vmk_PCIFindCapability(vmk_PCIDevice device, + vmk_uint8 capID, + vmk_uint16 *capOffset); /* *********************************************************************** - * vmk_PCIGetCapabilities -- */ /** - * - * \ingroup PCI - * \brief Returns an array of capabilities of the specified device - * - * \note Requires that the module heap be initialized. - * - * \param[in] moduleID Caller's module ID - * \param[in] device PCI device handle - * \param[out] capabilities Pointer to an array of vmk_PCICapability - * structures - * \param[out] numCapabilities Pointer to the number of array elements - * - * \retval VMK_BAD_PARAM Device handle is NULL/invalid. - * \retval VMK_BAD_PARAM Capabilities or numCapabilities is NULL. - * \retval VMK_NO_MEMORY Failed to allocate memory to hold capabilities - * \retval VMK_NO_MODULE_HEAP The module has no heap to allocate from - * \retval VMK_OK Success. Capabilities points to the array of - * vmk_PCICapability structures, the number of - * elements in the array is returned in - * numCapabilities. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetCapabilities(vmk_ModuleID moduleID, - vmk_PCIDevice device, - vmk_PCICapability **capabilities, - int *numCapabilities); - -/* - *********************************************************************** - * vmk_PCIGetParent -- */ /** - * - * \ingroup PCI - * \brief Returns the parent of device in parent. - * - * \param[in] device PCI device handle - * \param[out] parent Pointer to parent device handle - * - * Returns NULL in parent if device is the root of the hierarchy. - * - * \retval VMK_BAD_PARAM Device handle is NULL/invalid - * \retval VMK_BAD_PARAM Parent is NULL - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetParent(vmk_PCIDevice device, - vmk_PCIDevice *parent); - -/* - *********************************************************************** - * vmk_PCIGetChild -- */ /** - * - * \ingroup PCI - * \brief Returns the child of device in child. - * - * \param[in] device PCI device handle - * \param[out] child Pointer to child device handle - * - * Returns NULL in child if device is a leaf in the hierarchy. - * - * \retval VMK_BAD_PARAM Device handle is NULL/invalid - * \retval VMK_BAD_PARAM Child is NULL - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetChild(vmk_PCIDevice device, - vmk_PCIDevice *child); - -/* - *********************************************************************** - * vmk_PCIGetSibling -- */ /** - * - * \ingroup PCI - * \brief Returns the next sibling of device pointed in sibling. - * - * \param[in] device PCI device handle. - * \param[out] sibling Pointer to sibling device handle. - * - * Sets sibling to NULL if no more siblings. - * - * \retval VMK_BAD_PARAM Device handle is NULL/invalid - * \retval VMK_BAD_PARAM Child is sibling - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetSibling(vmk_PCIDevice device, - vmk_PCIDevice *sibling); - -/* - *********************************************************************** - * vmk_PCIReadConfigSpace -- */ /** + * vmk_PCIReadConfig -- */ /** * * \ingroup PCI * \brief Read config space of device at offset. * + * \param[in] moduleID Module performing the config read. * \param[in] device PCI device handle. * \param[in] accessType Access 1, 2 or 4 bytes. * \param[in] offset Offset to read. @@ -560,25 +237,30 @@ VMK_ReturnStatus vmk_PCIGetSibling(vmk_PCIDevice device, * \note Offset is expected to meet the alignment requirements of the * specified access type. * - * \retval VMK_BAD_PARAM Device handle is NULL/invalid - * \retval VMK_BAD_PARAM Data pointer is NULL - * \retval VMK_BAD_PARAM Offset is not aligned for the access type - * \retval VMK_BAD_PARAM AccessType is not a valid access type + * \retval VMK_BAD_PARAM Device handle is NULL/invalid. + * \retval VMK_BAD_PARAM Data pointer is NULL. + * \retval VMK_BAD_PARAM Offset is not aligned for the access type. + * \retval VMK_BAD_PARAM AccessType is not a valid access type. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * \retval VMK_LIMIT_EXCEEDED Offset is beyond available config space. + * \retval VMK_FAILURE Failure to access config space. * *********************************************************************** */ -VMK_ReturnStatus vmk_PCIReadConfigSpace(vmk_PCIDevice device, - vmk_ConfigSpaceAccess accessType, - vmk_uint16 offset, - vmk_uint32 *data); +VMK_ReturnStatus vmk_PCIReadConfig(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_PCIConfigAccess accessType, + vmk_uint16 offset, + vmk_uint32 *data); /* *********************************************************************** - * vmk_PCIWriteConfigSpace -- */ /** + * vmk_PCIWriteConfig -- */ /** * * \ingroup PCI * \brief Write data to config space of device at offset. * + * \param[in] moduleID Module performing the config write. * \param[in] device PCI device handle. * \param[in] accessType Access 1, 2 or 4 bytes. * \param[in] offset Offset to write at. @@ -587,265 +269,207 @@ VMK_ReturnStatus vmk_PCIReadConfigSpace(vmk_PCIDevice device, * \note Offset is expected to meet the alignment requirements of the * specified access type. * - * \retval VMK_BAD_PARAM device handle is NULL/invalid. - * \retval VMK_BAD_PARAM offset is not aligned for the access type. - * \retval VMK_BAD_PARAM accessType is not a valid access type. + * \retval VMK_BAD_PARAM Device handle is NULL/invalid. + * \retval VMK_BAD_PARAM Offset is not aligned for the access type. + * \retval VMK_BAD_PARAM AccessType is not a valid access type. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * \retval VMK_LIMIT_EXCEEDED Offset is beyond available config space. + * \retval VMK_FAILURE Failure to access config space. * *********************************************************************** */ -VMK_ReturnStatus vmk_PCIWriteConfigSpace(vmk_PCIDevice device, - vmk_ConfigSpaceAccess accessType, - vmk_uint16 offset, - vmk_uint32 data); +VMK_ReturnStatus vmk_PCIWriteConfig(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_PCIConfigAccess accessType, + vmk_uint16 offset, + vmk_uint32 data); /* *********************************************************************** * vmk_PCIMapIOResource -- */ /** * * \ingroup PCI - * \brief Map PCI IO/Memory space described by pciBar. + * \brief Reserve and map PCI IO/Memory space described by pciBar. * - * Allocates and fills mapHandle that should be used for the subsequent unmap - * call. + * Reserves the specified BAR with resource manager and maps the memory + * described by pciBar to a virtual address. * - * \param[in] device PCI device handle. - * \param[in] pciBar PCI bar to map. - * \param[in] cacheable Whether the mapping can be in cacheable - * memory. - * \param[out] mappedAddress Pointer to the address the BAR is - * mapped at. - * \param[out] mapHandle Pointer to the mapping handle; use at - * unmap time. + * \param[in] moduleID Module requesting the resource. + * \param[in] device PCI device handle. + * \param[in] pciBar PCI bar to map, must be [0 - 5]. + * \param[out] reservation IOReservation handle. Only necessary for + * VMK_PCI_BAR_FLAGS_IO type BARs. + * \param[out] mappedAddress Pointer to hold the virtual address of + * the mapping. * * \retval VMK_BAD_PARAM Device handle is NULL/invalid * \retval VMK_BAD_PARAM PciBar is invalid - * \retval VMK_BAD_PARAM MappedAddres is NULL or mapHandle - * is NULL - * \retval VMK_BAD_PARAM AccessType is not a valid access type - * \retval VMK_DEVICE_NOT_OWNED Device is not owned by kernel - * \retval VMK_BAD_PARAM PciBar is second half of 64-bit MMIO BAR - * \retval VMK_BAD_PARAM PciBar addr/size are too large for 32-bit MPN - * \retval VMK_NO_MEMORY No memory to allocate mapHandle - * \retval VMK_MAPPING_FAILED Mapping failed + * \retval VMK_BAD_PARAM reservation is NULL for PIO BAR + * \retval VMK_BAD_PARAM MappedAddres is NULL + * \retval VMK_NO_RESOURCES Resource is not owned by device + * \retval VMK_NO_PERMISSION Device is not owned by module + * \retval VMK_BAD_PARAM PciBar is 2nd half of 64-bit MMIO BAR + * \retval VMK_BAD_PARAM PciBar addr/size too big for 32-bit MPN * *********************************************************************** */ -VMK_ReturnStatus vmk_PCIMapIOResource(vmk_PCIDevice device, +VMK_ReturnStatus vmk_PCIMapIOResource(vmk_ModuleID moduleID, + vmk_PCIDevice device, vmk_uint8 pciBar, - vmk_Bool cacheable, - vmk_VA *mappedAddress, - vmk_PCIMapHandle *mapHandle); + vmk_IOReservation *reservation, + vmk_VA *mappedAddress); /* *********************************************************************** - * vmk_PCIReleaseIOResource -- */ /** + * vmk_PCIUnmapIOResource -- */ /** * * \ingroup PCI - * \brief Unmap the previously established PCI IO/Memory mapping. + * \brief Unmap and release the established PCI IO/Memory mapping. * * Upon successful return from the call, the mapping is no longer valid. * - * \param[in] mapHandle Mapping handle returned by a previous call - * to vmk_PCIMapIOResource. + * \param[in] moduleID Module requested the resource. + * \param[in] device PCI device handle. + * \param[in] pciBar PCI bar to unmap. * - * \retval VMK_BAD_PARAM mapHandle is NULL. + * \retval VMK_BAD_PARAM Device handle is NULL/invalid + * \retval VMK_BAD_PARAM PciBar is invalid + * \retval VMK_BAD_PARAM Resource is not mapped + * \retval VMK_NO_PERMISSION Device is not owned by module * *********************************************************************** */ -VMK_ReturnStatus vmk_PCIReleaseIOResource(vmk_PCIMapHandle mapHandle); +VMK_ReturnStatus vmk_PCIUnmapIOResource(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_uint8 pciBar); /** * Interrupt related functions. * - * Driver should first allocate an interrupt vector, add handlers for - * the vector and then enable the vector. + * Driver should first allocate interrupt(s), register and enable the + * interrupt(s). */ /* *********************************************************************** - * vmk_PCIAllocateIntVectors -- */ /** + * vmk_PCIAllocIntrCookie -- */ /** * * \ingroup PCI - * \brief Allocate numVectors of intrType for device. + * \brief Allocate interrupt resources for the specified device. * - * \param[in] device PCI device handle - * \param[in] intrType Interrupt type to allocate - * \param[in] numVectorsRequested Number of vectors to allocate - * \param[in] indexAarray Array of index that vectors in the - * vectorArray. Need to be associated - * with. Used only when intrType is - * VMK_INTERRUPT_TYPE_PCI_MSIX. - * \param[in] bestEffortAllocation Controls MSIX vector allocation - * behavior. Vmkernel tries to allocate - * numVectorsRequested vectors but if - * it is unable to allocate that many - & vectors and if this flag is VMK_FALSE, - * this call will return a failure status. - * \param[out] vectorArray Array of vectors allocated. - * \param[out] numVectorsAlloced Number of vectors actually allocated. + * On successful return, intrArray will contain the vmk_IntrCookie(s) + * representing the allocated interrupt resources. numIntrsAlloced + * will contain the number of interrupts actually allocated. * - * \note If intrType is VMK_INTERRUPT_TYPE_PCI_LEGACY, numVectors is - * ignored and only 1 vector is allocated. + * \note If type is VMK_PCI_INTERRUPT_TYPE_LEGACY or type is + * VMK_PCI_INTERRUPT_TYPE_MSI then numIntrsDesired and + * numIntrsRequired must both be set to 1. + * \note The caller must provide memory for numIntrsDesired + * vmk_IntrCookie(s) in the space referenced by intrArray. + * \note The caller can specify the index into MSIX table for the + * desired interrupts using indexAarray. indexArray can be NULL + * if the caller does not care. If non-NULL, it should specify + * index for numIntrDesired entries, and intrArray is filled + * with allocated interrupt for requested index values. * - * \retval VMK_BAD_PARAM Vectors argument is NULL. + * \param[in] moduleID Module allocating the interrupts. + * \param[in] device PCI device handle. + * \param[in] type Interrupt type. + * \param[in] numIntrsDesired Number of interrupts desired. + * \param[in] numIntrsRequired Number of interrupts required. + * \param[in] indexArray Array of MSIX table index. + * \param[out] intrArray Array of interrupts allocated. + * \param[out] numIntrsAlloced Number of interrupts allocated. + * + * \retval VMK_BAD_PARAM props argument is NULL. * \retval VMK_BAD_PARAM Device handle is invalid/NULL. * \retval VMK_BAD_PARAM Device is not interruptive. - * \retval VMK_BAD_PARAM If intrType is - * VMK_INTERRUPT_TYPE_PCI_LEGACY and + * \retval VMK_BAD_PARAM type is VMK_INTERRUPT_TYPE_PCI_LEGACY * the ioapic pin the device is connected * to is not described in interrupt * routing tables. - * \retval VMK_BAD_PARAM If intrType is not - * VMK_INTERRUPT_TYPE_PCI_MSIX - * and numVectors is not equal to 1. - * \retval VMK_BAD_PARAM If intrType is - * VMK_INTERRUPT_TYPE_PCI_MSIX and - * indexAarray is NULL. + * \retval VMK_BAD_PARAM type is VMK_INTERRUPT_TYPE_PCI_LEGACY + * or VMK_INTERRUPT_TYPE_PCI_MSI and + * numIntrsDesired or numIntrsRequired + * is not equal to 1. + * \retval VMK_BAD_PARAM type is VMK_INTERRUPT_TYPE_PCI_MSIX and + * numIntrsAlloced is NULL. + * \retval VMK_BAD_PARAM type is VMK_INTERRUPT_TYPE_PCI_MSIX and + * numIntrsRequired > numIntrsDesired + * \retval VMK_BAD_PARAM All other mal-formed props. * \retval VMK_NO_MEMORY Internal memory allocation failure - * \retval VMK_DEVICE_NOT_OWNED Device is not owned by vmkernel - * \retval VMK_NO_RESOURCES If unable to allocate the requested - * number of vectors and - * bestEffortAllocation is VMK_FALSE. + * \retval VMK_NOT_SUPPORTED Device/platform doesn't support MSI or + * MSIX if request is for MSI or MSIX type + * \retval VMK_NO_PERMISSION Device is not owned by module + * \retval VMK_IO_ERROR PCI Bus error, probably device is + * broken or unplugged + * \retval VMK_NO_RESOURCES For MSIX type, the number of interrupts + * available is less than numIntrsRequired. * \retval VMK_FAILIURE All other errors. * *********************************************************************** */ -VMK_ReturnStatus vmk_PCIAllocateIntVectors(vmk_PCIDevice device, - vmk_PCIInterruptType intrType, - vmk_int32 numVectorsRequested, - vmk_uint16 *indexAarray, - vmk_Bool bestEffortAllocation, - vmk_uint32 *vectorArray, - vmk_int32 *numVectorsAlloced); +VMK_ReturnStatus vmk_PCIAllocIntrCookie(vmk_ModuleID moduleID, + vmk_PCIDevice device, + vmk_PCIInterruptType type, + vmk_uint32 numIntrsDesired, + vmk_uint32 numIntrsRequired, + vmk_uint16 *indexArray, + vmk_IntrCookie *intrArray, + vmk_uint32 *numIntrsAlloced); /* *********************************************************************** - * vmk_PCIFreeIntVectors -- */ /** + * vmk_PCIFreeIntrCookie -- */ /** * * \ingroup PCI - * \brief Free numVectors interrupt vectors that were previously - * allocated by a call to vmk_PCIAllocateIntVectors(). + * \brief Free all interrupts that were previously allocated by a call + * to vmk_PCIAllocIntrCookie(). * - * \param[in] device PCI device handle - * \param[in] numVectors Number of vectors in vectorArray - * \param[in] vectorArray Array of vectors to be freed. + * \param[in] moduleID Module that allocated the interrupts + * \param[in] device PCI device handle * - * \retval VMK_BAD_PARAM vectorArray argument is NULL - * \retval VMK_BAD_PARAM Device handle is invalid/NULL - * \retval VMK_DEVICE_NOT_OWNED Device is not owned by vmkernel + * \retval VMK_BAD_PARAM Module ID is invalid. + * \retval VMK_BAD_PARAM Device handle is invalid/NULL. + * \retval VMK_NO_PERMISSION Device is not owned by module. * *********************************************************************** */ -VMK_ReturnStatus vmk_PCIFreeIntVectors(vmk_PCIDevice device, - vmk_int32 numVectors, - vmk_uint32 *vectorArray); - -/* - *********************************************************************** - * vmk_PCIGetInterruptInfo -- */ /** - * - * \ingroup PCI - * \brief Retrieve interrupt details of device. - * - * \param[in] device PCI device handle - * \param[in] interrupt Pointer to vmk_PCIInterruptInfo. - * - * \retval VMK_BAD_PARAM Device handle is NULL/invalid - * \retval VMK_BAD_PARAM Interrupt arg is NULL - * \retval VMK_DEVICE_NOT_OWNED Device is not owned by vmkernel. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIGetInterruptInfo(vmk_PCIDevice device, - vmk_PCIInterruptInfo *interrupt); - -/* - *********************************************************************** - * vmk_PCIRegisterCallback -- */ /** - * - * \ingroup PCI - * \brief Register event callback. - * - * \param[in] moduleID Module ID of the caller - * \param[in] callback Event callback routine - * \param[in] callbackPrivate Private data for callback routine. - * - * \retval VMK_BAD_PARAM moduleID is already registered for callbacks - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PCIRegisterCallback(vmk_ModuleID moduleID, - vmk_PCICallback callback, - void *callbackPrivate); -/* - *********************************************************************** - * vmk_PCIDoPreRemove -- */ /** - * - * \ingroup PCI - * \brief Invoke a module-specific function before a device is removed. - * - * This function should only be called by drivers, not by vmkernel - * modules. - * - * \param[in] moduleID ID of the module whose pre-remove func is to be - * called. - * \param[in] device Device handle to be passed to the pre-remove - * function. - * - * \retval VMK_BAD_PARAM Device is invalid/NULL. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_PCIDoPreRemove(vmk_ModuleID moduleID, - vmk_PCIDevice device); - -/* - *********************************************************************** - * vmk_PCIDoPostInsert -- */ /** - * - * \ingroup PCI - * \brief Invoke a module-specific function after a device has been - * inserted. - * - * \param[in] moduleID ID of the module whose post-insert func is to - * be called. - * \param[in] device Device handle to be passed to the post-insert - * function. - * - * This function should only be called by drivers, not by vmkernel - * modules. - * - * \retval VMK_BAD_PARAM device is invalid/NULL - * \retval VMK_OK success. - * - *********************************************************************** - */ -VMK_ReturnStatus -vmk_PCIDoPostInsert(vmk_ModuleID moduleID, - vmk_PCIDevice device); +VMK_ReturnStatus vmk_PCIFreeIntrCookie(vmk_ModuleID moduleID, + vmk_PCIDevice device); /* *********************************************************************** * vmk_PCIEnableVFs -- */ /** * * \ingroup PCI - * \brief Enable Virtual Functions (VFs) on an SR-IOV device. + * \brief Enable virtual functions in an SR-IOV physical function. * - * \param[in] device Device handle of the SR-IOV device. - * \param[in,out] numVFs Number of Virtual Functions to enable/enabled. + * numVFs is the number of virtual functions to be enabled. Setting it to + * zero requests that all virtual functions (VFs) under the given physical + * function (PF) be enabled. The actual number of VFs successfully enabled + * is returned in numVFs upon success. * - * Passing a value of 0 as *numVFs will request to enable all the - * Virtual Functions. The actual number of VFs successfully enabled is - * returned in *numVFs upon success. + * \note For a native PF driver, this function must be called from the + * driver's vmk_DriverAttachDevice() callback. This will ensure VFs are + * enabled before the driver receives the vmk_DriverScanDevice() callback, + * and also prevent VFs from being re-enabled if the PF is quiesced + * and re-started. + * + * \note This function creates a vmk_PCIDevice handle for each VF. The + * handle of each VF can be retrieved via the function + * vmk_PCIGetVFPCIDevice(). + * + * \param[in] pf PCI device handle of the SR-IOV PF. + * \param[in,out] numVFs Number of VFs to enable/enabled. * * \retval VMK_BAD_PARAM Device handle is invalid or device does not exist. - * \retval VMK_FAILURE Cannot enable Virtual Functions. - * + * \retval VMK_FAILURE Cannot enable virtual functions. + * *********************************************************************** */ VMK_ReturnStatus -vmk_PCIEnableVFs(vmk_PCIDevice device, +vmk_PCIEnableVFs(vmk_PCIDevice pf, vmk_uint16 *numVFs); /* @@ -853,33 +477,42 @@ vmk_PCIEnableVFs(vmk_PCIDevice device, * vmk_PCIDisableVFs -- */ /** * * \ingroup PCI - * \brief Disable all the Virtual Functions (VFs) on an SR-IOV device. + * \brief Disable all virtual functions in an SR-IOV physical function. * - * \param[in] device Device handle of the SR-IOV device. + * \note For a native PF driver, this function must be called from the + * driver's vmk_DriverDetachDevice() callback. This will ensure that + * all virtual functions (VFs) being disabled have been un-registered + * with the vmkkernel's device layer (i.e., unregistration occurs in the + * PF driver's VF remove callback which occurs prior to + * vmkDriverDetachDevice()). In addition, this will also prevent VFs from + * being disabled if the PF is quiesced. + * + * \param[in] pf PCI device handle of physical function (PF). * * \retval VMK_BAD_PARAM Device handle is invalid or device does not exist. * \retval VMK_FAILURE Device is not in SR-IOV mode. - * + * *********************************************************************** */ VMK_ReturnStatus -vmk_PCIDisableVFs(vmk_PCIDevice device); +vmk_PCIDisableVFs(vmk_PCIDevice pf); /* *********************************************************************** * vmk_PCIGetVFPCIDevice -- */ /** * * \ingroup PCI - - * \brief Retrieves the handle of a Virtual Function (VF) given its - * parent Physical Function (PF). - - * \param[in] pf PCI device handle of the parent Physical Function. - * \param[in] vfIndex Index of the Virtual Function. - * \param[out] handle PCI device handle of the requested Virtual Function. + * \brief Retrieves the PCI device handle of a virtual function (VF). + * + * \note This function should only be called on enabled VFs (see + * vmk_PCIEnableVF()). + * + * \param[in] pf PCI device handle of the parent physical function. + * \param[in] vfIndex Index of the virtual function. + * \param[out] vf PCI device handle of the requested virtual function. * * \retval VMK_BAD_PARAM PF device handle is invalid or device does not exist. - * \retval VMK_BAD_PARAM handle argument is NULL. + * \retval VMK_BAD_PARAM VF device handle argument is NULL. * \retval VMK_NOT_FOUND VF doesn't exist. * *********************************************************************** @@ -887,7 +520,181 @@ vmk_PCIDisableVFs(vmk_PCIDevice device); VMK_ReturnStatus vmk_PCIGetVFPCIDevice(vmk_PCIDevice pf, vmk_uint16 vfIndex, - vmk_PCIDevice *handle); + vmk_PCIDevice *vf); + +/* + *********************************************************************** + * vmk_PCIGetPFPCIDevice -- */ /** + * + * \ingroup PCI + * \brief Retrieve the PCI device handle of a PF, given the VF handle. + * + * \param[in] vf PCI device handle of the virtual function. + * \param[out] pf PCI device handle of the parent physical function. + * + * \retval VMK_BAD_PARAM VF device handle is invalid or device does not exist. + * \retval VMK_BAD_PARAM PF device handle argument is NULL. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIGetPFPCIDevice(vmk_PCIDevice vf, vmk_PCIDevice *pf); + +/* + ************************************************************************ + * vmk_PCIRegisterVF -- */ /** + * + * \ingroup PCI + * \brief Register virtual functions with the vmkernel's device layer. + * + * The devOps parameter is the vmk_DeviceOps structure associated with the + * registered virtual function (VF). + * + * \note This function is meant to be used by native PF drivers only. + * Since this function registers a VF with the vmkernel's device layer, + * all restrictions associated with device registration apply. + * + * \note Before this call returns, the vmkernel's device layer may attach + * the VF to a driver. + * + * \param[in] vf PCI device handle of the VF to be registered. + * \param[in] pf PCI device handle of the parent PF. + * \param[in] pfDriverHandle PF driver handle. + * \param[in] vfDevOps Device operations associated with a registered VF. + * + * \retval VMK_BAD_PARAM VF device handle is invalid. + * \retval VMK_BAD_PARAM PF device handle is invalid. + * \retval VMK_FAILURE VF registration failed. + * + ************************************************************************ + */ +VMK_ReturnStatus +vmk_PCIRegisterVF(vmk_PCIDevice vf, + vmk_PCIDevice pf, + vmk_Driver pfDriverHandle, + vmk_PCIVFDeviceOps *vfDevOps); + +/* + ************************************************************************ + * vmk_PCIUnregisterVF -- */ /** + * + * \ingroup PCI + * \brief Unregister a virtual function from the vmkernel's device layer. + * + * \note Since this function unregisters a virtual function (VF) with the + * vmkernel's device layer, all restrictions associated with device + * unregistration apply (unregistration of the VF must be done + * by the physical function driver from the vmk_DeviceRemove function in the + * vmk_DeviceOps passed during VF registration). + * + * \param[in] vf PCI device handle of the VF to be unregistered. + * + * \retval VMK_BAD_PARAM VF device handle is invalid. + * \retval VMK_FAILURE VF unregistration failed. + * + ************************************************************************* + */ +VMK_ReturnStatus +vmk_PCIUnregisterVF(vmk_PCIDevice vf); + +/* + ************************************************************************* + * vmk_PCISetVFPrivateData -- */ /** + * + * \ingroup PCI + * \brief Associate private data with a virtual function. + * + * Associates a pointer to the given user-defined private data with the + * given virtual function (VF). The pointer may retrieved via the + * function vmk_PCIGetVFPrivateData(). This provides a mechanism by which + * vmkernel components, typically a PF driver and a VF driver, can exchange + * private data. + * + * \param[in] vf PCI device handle of the VF. + * \param[in] privateData User-defined private data. + * + * \retval VMK_BAD_PARAM VF device handle is invalid. + * + ************************************************************************ + */ +VMK_ReturnStatus +vmk_PCISetVFPrivateData(vmk_PCIDevice vf, + vmk_AddrCookie privateData); + +/* + ************************************************************************* + * vmk_PCIGetVFPrivateData -- */ /** + * + * \ingroup PCI + * \brief Retrieve private data associated with a virtual function. + * + * Retrieves a pointer to the user-defined private data associated with + * the given virtual function (VF). See the description of + * vmk_PCISetVFPrivateData() for further details. + * + * \param[in] vf PCI device handle of the VF. + * \param[out] privateData User-defined private data. + * + * \retval VMK_BAD_PARAM VF device handle is invalid. + * \retval VMK_BAD_PARAM privateData pointer is NULL. + * + ************************************************************************ + */ +VMK_ReturnStatus +vmk_PCIGetVFPrivateData(vmk_PCIDevice vf, + vmk_AddrCookie *privateData); + +/* + *********************************************************************** + * vmk_PCIEnablePME -- */ /** + * + * \ingroup PCI + * \brief Enable PME# generation. + * + * Enable PME# generation if the device is capable of asserting + * the PME# signal from any of the power states. + * + * \param[in] moduleID Module requesting the operation. + * \param[in] device PCI device handle. + * + * \retval VMK_BAD_PARAM Module ID is invalid. + * \retval VMK_BAD_PARAM Device handle is NULL/invalid. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * \retval VMK_NOT_SUPPORTED Device has no PM capability. + * \retval VMK_NOT_SUPPORTED Device doesn't support PME# generation + * from any power state. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIEnablePME(vmk_ModuleID moduleID, + vmk_PCIDevice device); + +/* + *********************************************************************** + * vmk_PCIDisablePME -- */ /** + * + * \ingroup PCI + * \brief Disable PME# generation. + * + * Disable PME# generation if the device is capable of asserting + * the PME# signal from any of the power states. + * + * \param[in] moduleID Module requesting the operation. + * \param[in] device PCI device handle. + * + * \retval VMK_BAD_PARAM Module ID is invalid. + * \retval VMK_BAD_PARAM Device handle is NULL/invalid. + * \retval VMK_NO_PERMISSION Device is not owned by module. + * \retval VMK_NOT_SUPPORTED Device has no PM capability. + * \retval VMK_NOT_SUPPORTED Device doesn't support PME# generation + * from any power state. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIDisablePME(vmk_ModuleID moduleID, + vmk_PCIDevice device); #endif /* _VMKAPI_PCI_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci_incompat.h new file mode 100644 index 0000000..db6146f --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci_incompat.h @@ -0,0 +1,271 @@ +/* ********************************************************** + * Copyright 1998 - 2009 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + * Please consult with the VMKernel hardware and core teams before making any + * binary incompatible changes to this file! + */ + +/* + *********************************************************************** + * PCI */ /** + * \addtogroup Device + * @{ + * \defgroup PCI PCI + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_PCI_INCOMPAT_H_ +#define _VMKAPI_PCI_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Device callback reason + */ +typedef enum vmk_PCIDeviceCallbackReason { + VMK_PCI_DEVICE_INSERTED = 0, + VMK_PCI_DEVICE_REMOVED = 1, + VMK_PCI_DEVICE_CHANGED_OWNER = 2, +} vmk_PCIDeviceCallbackReason; + +/* + *********************************************************************** + * vmk_PCIGetDevice -- */ /** + * + * \ingroup PCI + * \brief Retrieves vmk_PCIDevice that corresponds to the generic + * device genDevice. + * + * \param[in] genDevice Generic device handle. + * \param[out] pciDevice Pointer to PCI device handle. + * + * \retval VMK_BAD_PARAM genDevice is invalid + * \retval VMK_OK PCI device handle is successfully returned. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIGetDevice(vmk_Device genDevice, + vmk_PCIDevice *pciDevice); + +/* + *********************************************************************** + * vmk_PCIGetGenDevice -- */ /** + * + * \ingroup PCI + * \brief Retrieves generic vmk_Device that corresponds to the PCI + * device pciDevice. + * + * \param[in] pciDevice PCI device handle. + * \param[out] genDevice Pointer to generic device handle. + * + * \retval VMK_BAD_PARAM pciDevice is invalid + * \retval VMK_OK Generic device handle is successfully + * returned. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIGetGenDevice(vmk_PCIDevice pciDevice, + vmk_Device *genDevice); + +/* + *********************************************************************** + * vmk_PCIGetPCIDevice -- */ /** + * + * \ingroup PCI + * \brief Retrieves vmk_PCIDevice handle that corresponds to segment, + * bus, device and function + * + * \param[in] segment PCI segment + * \param[in] bus Bus number + * \param[in] dev Device number + * \param[in] func Function number + * \param[out] device PCI device handle + * + * \retval VMK_NOT_FOUND Device with bus, device, number does not exist + * \retval VMK_BAD_PARAM device argument is NULL + * \retval VMK_OK device handle is successfully returned. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIGetPCIDevice(const vmk_uint16 segment, + const vmk_uint8 bus, + const vmk_uint8 dev, + const vmk_uint8 func, + vmk_PCIDevice *device); + +/* + *********************************************************************** + * vmk_PCIGetSegmentBusDevFunc -- */ /** + * + * \ingroup PCI + * \brief Return device's bus, device, func and function + * + * \param[in] device PCI device handle + * \param[out] segment Pointer to Segment number + * \param[out] bus Pointer to Bus number + * \param[out] dev Pointer to Device number + * \param[out] func Pointer to Function number + * + * \retval VMK_BAD_PARAM One or more of bus, dev, func is NULL. + * \retval VMK_BAD_PARAM Device handle is invalid or device does + * not exist. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIGetSegmentBusDevFunc(vmk_PCIDevice device, + vmk_uint16 *segment, + vmk_uint8 *bus, + vmk_uint8 *dev, + vmk_uint8 *func); + +/* + *********************************************************************** + * vmk_PCIGetIDs -- */ /** + * + * \ingroup PCI + * \brief Return device's vendor ID, device ID, sub vendor ID and + * sub device iD + * + * \param[in] device PCI device handle + * \param[out] vendorID Pointer to vendor ID. + * \param[out] deviceID Pointer to device ID. + * \param[out] subVendorID Pointer to sub vendor ID. + * \param[out] subDeviceID Pointer to sub device ID. + * + * \retval VMK_BAD_PARAM One or more of vendorID, deviceID + * subVendorID and subDeviceID is NULL. + * \retval VMK_BAD_PARAM Device handle is invalid or device does + * not exist. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIGetIDs(vmk_PCIDevice device, + vmk_uint16 *vendorID, + vmk_uint16 *deviceID, + vmk_uint16 *subVendorID, + vmk_uint16 *subDeviceID); + +/* + *********************************************************************** + * vmk_PCISetDeviceName -- */ /** + * + * \ingroup PCI + * \brief Sets the device name + * + * \param[in] device PCI device handle + * \param[in] name Name to be set + * + * \retval VMK_BAD_PARAM Device handle is invalid/non existent or name + * is NULL + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCISetDeviceName(vmk_PCIDevice device, + const char *name); + +/* + *********************************************************************** + * vmk_PCIGetDeviceName -- */ /** + * + * \ingroup PCI + * \brief Gets the device name + * + * \param[in] device PCI device handle + * \param[out] name Pointer to char array to return the name in + * \param[in] nameLen Length of the char array. + * + * \retval VMK_BAD_PARAM Device is invalid or non existent. + * \retval VMK_BAD_PARAM Name is NUL or nameLen is greater than + * VMK_PCI_DEVICE_NAME_LENGTH. + * \retval VMK_DEVICE_NOT_NAMED Device is not named + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIGetDeviceName(vmk_PCIDevice device, + char *name, + vmk_ByteCount nameLen); + +/* + *********************************************************************** + * vmk_PCIGetAlternateName -- */ /** + * + * \ingroup PCI + * \brief Gets the alternate name of the device + * + * \param[in] device PCI device handle + * \param[out] name Pointer to char array to return the name in + * \param[in] nameLen Length of the char array. + * + * \retval VMK_BAD_PARAM Device is invalid or non existent. + * \retval VMK_BAD_PARAM Name is NULL or nameLen is greater than + * VMK_PCI_DEVICE_NAME_LENGTH. + * \retval VMK_DEVICE_NOT_NAMED Device has no alternate name + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PCIGetAlternateName(vmk_PCIDevice device, + char *name, + vmk_ByteCount nameLen); + +/* + *********************************************************************** + * vmk_PCIDoPreRemove -- */ /** + * + * \ingroup PCI + * \brief Invoke a module-specific function before a device is removed. + * + * This function should only be called by drivers, not by vmkernel + * modules. + * + * \param[in] moduleID ID of the module whose pre-remove func is to be + * called. + * \param[in] device Device handle to be passed to the pre-remove + * function. + * + * \retval VMK_BAD_PARAM Device is invalid/NULL. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIDoPreRemove(vmk_ModuleID moduleID, + vmk_PCIDevice device); + +/* + *********************************************************************** + * vmk_PCIDoPostInsert -- */ /** + * + * \ingroup PCI + * \brief Invoke a module-specific function after a device has been + * inserted. + * + * \param[in] moduleID ID of the module whose post-insert func is to + * be called. + * \param[in] device Device handle to be passed to the post-insert + * function. + * + * This function should only be called by drivers, not by vmkernel + * modules. + * + * \retval VMK_BAD_PARAM device is invalid/NULL + * \retval VMK_OK success. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PCIDoPostInsert(vmk_ModuleID moduleID, + vmk_PCIDevice device); + +#endif /* _VMKAPI_PCI_INCOMPAT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci_types.h index 66eac7f..ed541c7 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_pci_types.h @@ -42,7 +42,7 @@ typedef enum vmk_PCIInterruptType { /** * \brief Opaque PCI device handle */ -typedef struct vmk_PCIDeviceInt *vmk_PCIDevice; +typedef struct vmkPCIDevice *vmk_PCIDevice; #endif diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_psa_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_psa_types.h new file mode 100644 index 0000000..c8818fa --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_psa_types.h @@ -0,0 +1,37 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + + +/* + *********************************************************************** + * PSA */ /** + * \addtogroup Device + * @{ + * \defgroup PSA PSA Driver Interfaces + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_PSA_H_ +#define _VMKAPI_PSA_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** \brief PSA Device Identifier */ +#define VMK_SCSI_PSA_DRIVER_BUS_ID "com.vmware.HBAPort" +/** \brief PSA VPORT Device Identifier */ +#define VMK_SCSI_PSA_DRIVER_VPORT_BUS_ID "com.vmware.Virtual_HBAPort" + +#endif /* _VMKAPI_PSA_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector.h index 5d7bf37..21a8c84 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2008 - 2009 VMware, Inc. All rights reserved. + * Copyright 2008 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -16,7 +16,7 @@ * Vector */ /** * \addtogroup Device * @{ - * \defgroup Vector Interrupt Vector Interfaces + * \defgroup Vector Interrupt Interfaces * @{ *********************************************************************** */ @@ -30,166 +30,162 @@ #endif /** \endcond never */ +/** \brief Interrupt is an entropy source. + * + * Set this if device interrupts contributes to entropy pool. + */ +#define VMK_INTR_ATTRS_ENTROPY_SOURCE (1 << 0) + /** - * \brief Options for adding the handler + * \brief Properties for registering the interrupt. */ -typedef struct vmk_VectorAddHandlerOptions { - /** \brief Vector is shared */ - vmk_Bool sharedVector; - - /** \brief Vector is an entroy source */ - vmk_Bool entropySource; -} vmk_VectorAddHandlerOptions; +typedef struct vmk_IntrProps { + /** \brief Device registering the interrupt. */ + vmk_Device device; + /** \brief Name of the device registering the interrupt. */ + vmk_Name deviceName; + /** \brief Interrupt acknowledging function */ + vmk_IntrAcknowledge acknowledgeInterrupt; + /** \brief Interrupt handler function. */ + vmk_IntrHandler handler; + /** \brief Interrupt handler client data. */ + void *handlerData; + /** \brief Interrupt attributes. + * + * Interrupt attributes can be used to specify special attributes + * for a interrupt. + */ + vmk_uint64 attrs; +} vmk_IntrProps; +/** \brief Function to invoke with interrupts disabled. */ +typedef void (*vmk_IntrDisabledFunc)(vmk_AddrCookie data); /* *********************************************************************** - * vmk_AddInterruptHandler -- */ /** + * vmk_IntrRegister -- */ /** * * \ingroup Vector - * \brief Add interrupt handler for vector + * \brief Register the interrupt with the system. * - * \param[in] vector Vector to add the handler for - * \param[in] deviceName Name the driver wants use with the request - * \param[in] handler Interrupt handler - * \param[in] callbackArg Callback argument passed to the handler - * for shared interrupt, callbackArg shall be - * non-NULL and is used identify the callers - * sharing the vector. - * \param[in] options Specifies how the vector should be used - * (shared vector, entropy source etc.) + * \note Interrupt sharing is implicitly allowed for level-triggered + * interrupts. * - * \retval VMK_BAD_PARAM If vector is not a valid device vector - * \retval VMK_BAD_PARAM Null callbackArg is specified for - * shared vectors. - * \retval VMK_BUSY If request to add as non-shared and the vector - * is already shared + * \param[in] moduleID Module registering the interrupt + * \param[in] intrCookie Interrupt cookie to register + * \param[in] props Properties of the interrupt being registered + * + * \retval VMK_BAD_PARAM props is NULL or mal-formed props + * \retval VMK_BAD_PARAM intrCookie is not valid + * \retval VMK_BAD_PARAM Null props->handlerData is specified for + * shared interrupt. * *********************************************************************** */ -VMK_ReturnStatus vmk_AddInterruptHandler(vmk_uint32 vector, - const char *deviceName, - vmk_InterruptHandler handler, - void *callbackArg, - vmk_VectorAddHandlerOptions *options); +VMK_ReturnStatus vmk_IntrRegister(vmk_ModuleID moduleID, + vmk_IntrCookie intrCookie, + vmk_IntrProps *props); /* *********************************************************************** - * vmk_RemoveInterruptHandler -- */ /** + * vmk_IntrUnregister -- */ /** * * \ingroup Vector - * \brief Remove a previously established interrupt handler for vector + * \brief Unregister a previously registered interrupt. * - * \param[in] vector Vector for which to remove the handler. - * \param[in] callbackArg Callback argument that was passed - * while adding the handler. + * \param[in] moduleID Module that registered interrupt before + * \param[in] intrCookie Interrupt to unregister + * \param[in] handlerData Interrupt handler data that was used while + * registering the interrupt * - * \retval VMK_BAD_PARAM If callbackArg is NULL and the vector is shared. - * \retval VMK_BAD_PARAM If vector is not a valid device vector + * \retval VMK_BAD_PARAM moduleID is not valid. + * \retval VMK_BAD_PARAM intrCookie is not valid. + * \retval VMK_BAD_PARAM If handlerData is NULL and the interrupt is + * shared. + * \retval VMK_FAILURE handlerData doesn't match with what's + * provided with vmk_IntrRegister(). * *********************************************************************** */ -VMK_ReturnStatus vmk_RemoveInterruptHandler(vmk_uint32 vector, - void *callbackArg); +VMK_ReturnStatus vmk_IntrUnregister(vmk_ModuleID moduleID, + vmk_IntrCookie intrCookie, + void *handlerData); /* *********************************************************************** - * vmk_VectorEnable -- */ /** + * vmk_IntrEnable -- */ /** * * \ingroup Vector - * \brief Sets up the vector for delivery of interrupts and unmasks the - * vector. + * \brief Start interrupt delivery. Kernel starts calling interrupt + * handlers registered for this interrupt. * - * \param[in] vector Vector to enable. - * Depending on the interrupt type, vector may - * always be enabled. (It is not possible - * to enable/disable VMK_INTERRUPT_TYPE_PCI_MSI - * vectors if the device does not support - * per vector masking.) + * \note The interrupt is unmasked if needed. + * + * \param[in] intrCookie Interrupt that has to be started. * *********************************************************************** */ -VMK_ReturnStatus vmk_VectorEnable(vmk_uint32 vector); +VMK_ReturnStatus vmk_IntrEnable(vmk_IntrCookie intrCookie); /* *********************************************************************** - * vmk_VectorDisable -- */ /** + * vmk_IntrDisable -- */ /** * * \ingroup Vector - * \brief Masks the vector and disables interrupt delivery. + * \brief Stops interrupt delivery. * - * \warning This API should not be used for indefinite periods for - * shared interrupts as this will block interrupts for other + * \note The interrupt is masked if there are no registered handlers + * for this interrupt. + * + * \warning This API should not be used for indefinite periods for + * shared interrupts as this will block interrupts for other * devices that may share the same interrupt line. * - * \param[in] vector Vector to disable. - * Depending on the interrupt type, vector will - * always be enabled. (It is not possible - * to enable/disable VMK_INTERRUPT_TYPE_PCI_MSI - * vectors if the device does not support - * per vector masking.) + * \param[in] intrCookie Interrupt that has to be stopped. * *********************************************************************** */ -VMK_ReturnStatus vmk_VectorDisable(vmk_uint32 vector); +VMK_ReturnStatus vmk_IntrDisable(vmk_IntrCookie intrCookie); /* *********************************************************************** - * vmk_VectorSync -- */ /** + * vmk_IntrSync -- */ /** * * \ingroup Vector - * \brief Blocks, waiting till vector is inactive on all CPUs. - * - * \param[in] vector Vector to synchronize. + * \brief Blocks, waiting till interrupt is inactive on all CPUs. + * + * \param[in] intrCookie Interrupt to synchronize. * *********************************************************************** */ -VMK_ReturnStatus vmk_VectorSync(vmk_uint32 vector); +VMK_ReturnStatus vmk_IntrSync(vmk_IntrCookie intrCookie); + /* *********************************************************************** - * vmk_VectorChipsetDisable -- */ /** + * vmk_IntrWithAllDisabledInvoke -- */ /** * * \ingroup Vector - * \brief Masks given vector at the Chipset level. + * \brief Invokes a function with all interrupts disabled. * - * \warning This API should not be used for indefinite periods for shared - * interrupts as this will block interrupts for other devices that - * may share the same interrupt line. Specifically, if there is a - * device specific method for masking/unmasking interrupts, that - * should be preferred over this API. This API is currently - * provided for masking exclusive interrupts (such as MSI) in a - * device independent manner. + * \warning The function invoked is not allowed to take more than 5us. * - * \note This vector should already have been setup using - * vmk_VectorEnable. - * - * \param[in] vector Vector to mask + * \param[in] moduleID Module implementing function to invoke. + * \param[in] func Function to invoke + * \param[in] data Data to pass to function + * + * \retval VMK_BAD_PARAM moduleID is invalid + * \retval VMK_BAD_PARAM func is invalid + * \retval VMK_OK func was invoked * *********************************************************************** */ -void vmk_VectorChipsetDisable (vmk_uint32 vector); -/* - *********************************************************************** - * vmk_VectorChipsetEnable -- */ /** - * - * \ingroup Vector - * \brief Unmasks the given vector at the Chipset level. - * - * \warning If there is a device specific method for masking/unmasking - * interrupts, that should be preferred over this API. This API - * is currently provided for masking/unmasking exclusive - * interrupts(such as MSI) in a device independent manner. - * - * \note This vector should already have been setup using vmk_VectorEnable. - * - * \param[in] vector Vector to unmask - * - *********************************************************************** - */ -void vmk_VectorChipsetEnable (vmk_uint32 vector); +VMK_ReturnStatus vmk_IntrWithAllDisabledInvoke(vmk_ModuleID moduleID, + vmk_IntrDisabledFunc func, + vmk_AddrCookie data); #endif /* _VMKAPI_VECTOR_H_ */ /** @} */ /** @} */ + diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector_incompat.h new file mode 100644 index 0000000..abf780a --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector_incompat.h @@ -0,0 +1,67 @@ +/* ********************************************************** + * Copyright 2008 - 2009, 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * Please consult with the VMKernel hardware and core teams before making any + * binary incompatible changes to this file! + */ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Vector */ /** + * \addtogroup Device + * @{ + * \defgroup Vector Interrupt Vector Interfaces + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_VECTOR_INCOMPAT_H_ +#define _VMKAPI_VECTOR_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** old style interrupt handlers have no acknowledge handler */ +#define VMK_INTR_ATTRS_INCOMPAT_ACK (1UL << 63) + +/* + *********************************************************************** + * vmk_IntrTrackerAddSample -- */ /** + * + * \ingroup Vector + * \brief Adds "count" samples to the affinity tracker of "intrCookie". + * + * The interrupt tracker keeps track of the number of samples + * associated with each scheduling context for each interrupt + * vector. It may automatically let "intrCookie" follow the context + * with dominating number of samples. + * + * \note This function will not block. + * + * \param[in] intrCookie The interrupt cookie being tracked. + * \param[in] count The number of samples to be added. + * \param[in] now Current timestamp. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM "intrCookie" is not valid. + * \retval VMK_NOT_SUPPORTED The function is not called from a world + * or worldlet context. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_IntrTrackerAddSample(vmk_IntrCookie intrCookie, + vmk_uint32 count, + vmk_TimerCycles now); + +#endif /* _VMKAPI_VECTOR_INCOMPAT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector_types.h index 5234bb4..52ab45f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/device/vmkapi_vector_types.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2010 VMware, Inc. All rights reserved. + * Copyright 2010 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -26,6 +26,15 @@ #endif /** \endcond never */ +/** + * \brief Opaque handle to Interrupt. + */ +typedef vmk_uint32 vmk_IntrCookie; + +/** + * \brief Invalid interrupt. + */ +#define VMK_INVALID_INTRCOOKIE ((vmk_IntrCookie)~0) /* ****************************************************************************** @@ -45,7 +54,61 @@ */ typedef void (*vmk_InterruptHandler)(void *clientData, - vmk_uint32 vector); + vmk_IntrCookie intrCookie); + +/* + ****************************************************************************** + * vmk_IntrHandler -- */ /** + * + * \brief Interrupt callback function. + * + * \note Callback is allowed to block + * + * \param[in] handlerData Callback argument specified while adding + * the handler. + * \param[in] intrCookie Interrupt cookie associated with the interrupt. + * + * \retval None + * + ****************************************************************************** + */ + +typedef void (*vmk_IntrHandler)(void *handlerData, + vmk_IntrCookie intrCookie); + +/* + ****************************************************************************** + * vmk_IntrAcknowledge -- */ /** + * + * \brief Callback function for device drivers to acknowledge an interrupt + * + * This callback is called synchronously when an interrupt fires to do device + * specific interrupt acknowledgement. The handler is expected to acknowledge + * the interrupt with the device for example through device register writes but + * nothing more. All other interrupt work should be done in the interrupt + * handler which will be called in a world context. The vmkernel will enforce a + * very short execution time of 5us for this callback. + * + * \note Callback is not allowed to block + * + * \param[in] handlerData Callback argument specified while adding + * the handler. + * \param[in] intrCookie Interrupt cookie associated with the interrupt. + * + * \retval VMK_OK Interrupt has been acknowledged and handler + * should be called. + * \retval VMK_IGNORE Interrupt was for this device and has been + * acknowledged, but handler is not needed and + * should not be called. + * \retval VMK_NOT_THIS_DEVICE Interrupt was not for this device and has not + * been acknowledged; handler should not be called. + * + ****************************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_IntrAcknowledge)(void *handlerData, + vmk_IntrCookie intrCookie); + #endif /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/dvfilter/vmkapi_dvfilter.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/dvfilter/vmkapi_dvfilter.h index bade1df..dc071d6 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/dvfilter/vmkapi_dvfilter.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/dvfilter/vmkapi_dvfilter.h @@ -738,12 +738,17 @@ typedef enum vmk_DVFilterPropertyOpsFlags { * \param[in] filter Handle to DVFilter instance data * \param[in] propName Property name * \param[in] propVal Property value - * \param[in] propLen Length of the property value in bytes + * \param[in] propLen Length of the property value in bytes * \param[in] flags Must be VMK_DVFILTER_CLIENT_OPS_NONE * Reserved for future use * * \retval VMK_OK DVFilter accepts value change of the * property on the instance + * \retval VMK_NOT_READY DVFilter cannot accept value change of the + * property on the instance. Likely due to + * temporarily invalid filter. Write will be + * called again with same data after filter + * is established. * \retval VMK_FAILURE DVFilter does not accept the value change * of the property on the instance *********************************************************************** @@ -875,6 +880,8 @@ typedef struct vmk_DVFilterPropertyOps { * \ingroup DVFilter * \brief Register a DVFilter fast path agent with the network stack. * + * \nativedriversdisallowed + * * \note This function may block. * * \param[in] name Human readable name of the agent. @@ -920,6 +927,8 @@ VMK_ReturnStatus vmk_DVFilterRegisterFastPath( * \brief Unregister a DVFilter fast path agent previously registered * by vmk_DVFilterRegisterFastPath. * + * \nativedriversdisallowed + * * \note This function may block. * * \param[in] fastPathHandle Handle to the VMkernel fast path agent. @@ -940,6 +949,8 @@ VMK_ReturnStatus vmk_DVFilterUnregisterFastPath( * \ingroup DVFilter * \brief Associate a filter with the specified slow path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * Once the association is established, packets can be forwarded to @@ -992,6 +1003,8 @@ vmk_DVFilterSetSlowPath( * \ingroup DVFilter * \brief Dissociate a filter from its slow path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * This function has no effect if the filter has no associated slow @@ -1028,6 +1041,8 @@ vmk_DVFilterClearSlowPath( * \ingroup DVFilter * \brief Allocate metadata for this packet. * + * \nativedriversdisallowed + * * \note This function will not block. * * The allocated metadata buffer can be used to store data @@ -1074,6 +1089,8 @@ VMK_ReturnStatus vmk_DVFilterPktAllocMetadata( * \ingroup DVFilter * \brief Release metadata for this packet. * + * \nativedriversdisallowed + * * \note This function will not block. * * Releases the metadata of this packet. Afterwards, the scope of @@ -1096,6 +1113,8 @@ void vmk_DVFilterPktReleaseMetadata( * \ingroup DVFilter * \brief Get pointer to metadata of this packet. * + * \nativedriversdisallowed + * * \note This function will not block. * * Gets the address of the metadata associated with this packet, @@ -1123,6 +1142,8 @@ vmk_VA vmk_DVFilterPktGetMetadata( * \brief Fault specified packets to the slow path agent associated * with the filter. * + * \nativedriversdisallowed + * * \note This function will not block. * * \note Unless the VMK_DVFILTER_FAULTING_COPY flag is used, the @@ -1157,6 +1178,8 @@ VMK_ReturnStatus vmk_DVFilterFaultPackets( * \ingroup DVFilter * \brief Inject packets in a filter. * + * \nativedriversdisallowed + * * \note This function will not block. * * Used to inject new packets, or resume processing of packets @@ -1215,6 +1238,8 @@ VMK_ReturnStatus vmk_DVFilterIssuePackets( * \ingroup DVFilter * \brief Query the human readable name of the DVFilter. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] filter Handle to the VMkernel filter object @@ -1240,6 +1265,8 @@ VMK_ReturnStatus vmk_DVFilterGetName( * \ingroup DVFilter * \brief Query the VM UUID of the VM the DVFilter is attached to. * + * \nativedriversdisallowed + * * \note This function will not block. * * \note This function may fail with VMK_INVALID_WORLD in the @@ -1273,6 +1300,8 @@ VMK_ReturnStatus vmk_DVFilterGetVMUUID( * \ingroup DVFilter * \brief Query a configuration parameter value of the DVFilter. * + * \nativedriversdisallowed + * * \note This function will not block. * * These parameters may change at any time if the fastpath op @@ -1309,6 +1338,8 @@ VMK_ReturnStatus vmk_DVFilterGetConfigParameter( * \ingroup DVFilter * \brief Get the failure policy the user configured for this filter. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] filter Handle to the VMkernel filter object. @@ -1332,6 +1363,8 @@ VMK_ReturnStatus vmk_DVFilterGetFailurePolicy( * \ingroup DVFilter * \brief Get the MTU the switch has configured for this filter * + * \nativedriversdisallowed + * * \note This function will not block. * * Value of *mtu is not defined in case the function was not successful. @@ -1366,6 +1399,8 @@ VMK_ReturnStatus vmk_DVFilterGetSwitchMTU( * \ingroup DVFilter * \brief Get the type of the filter's end-point. * + * \nativedriversdisallowed + * * \note This function will not block. * * The filter end-point might be a virtual nic of a VM, a VMkernel @@ -1394,6 +1429,8 @@ VMK_ReturnStatus vmk_DVFilterGetEndPointType( * \ingroup DVFilter * \brief Get the portID that the filter is attached to. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] filter Handle to the VMkernel filter object. @@ -1416,6 +1453,8 @@ VMK_ReturnStatus vmk_DVFilterGetPortID( * \ingroup DVFilter * \brief Get the index of the vNic this filter is attached to. * + * \nativedriversdisallowed + * * \note This function will not block. * * This function is only supported for VM endpoints. @@ -1442,6 +1481,8 @@ VMK_ReturnStatus vmk_DVFilterGetVnicIndex( * \ingroup DVFilter * \brief Set the minimum mapped packet length required by this filter. * + * \nativedriversdisallowed + * * \note This function will not block. * * The function requests new packets to have a specific @@ -1480,6 +1521,8 @@ vmk_DVFilterSetMinPktMappedLen( * \brief Send an ioctl request associated with a particular filter to * the slow path. * + * \nativedriversdisallowed + * * \note This function will not block. * * Send an ioctl request to the slow path agent associated with the @@ -1537,6 +1580,8 @@ VMK_ReturnStatus vmk_DVFilterSendFilterIoctlRequest( * \ingroup DVFilter * \brief Send an ioctl reply in filter context to the guest appliance. * + * \nativedriversdisallowed + * * \note This function will not block. * * Send an ioctl reply to the slow path agent associated with the @@ -1575,6 +1620,8 @@ VMK_ReturnStatus vmk_DVFilterSendFilterIoctlReply( * \ingroup DVFilter * \brief Send an ioctl request to a slow path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * Send an ioctl request to the slow path agent. The provided @@ -1630,6 +1677,8 @@ VMK_ReturnStatus vmk_DVFilterSendSlowPathIoctlRequest( * \ingroup DVFilter * \brief Send an ioctl reply to a slow path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * It is acceptable to send a slow path reply with a zero length. @@ -1667,6 +1716,8 @@ VMK_ReturnStatus vmk_DVFilterSendSlowPathIoctlReply( * \ingroup DVFilter * \brief Restore slow path state in the guest appliance * + * \nativedriversdisallowed + * * \note This function will not block. * * The slow path's state is sent to the slow path agent. The provided @@ -1717,6 +1768,8 @@ VMK_ReturnStatus vmk_DVFilterRestoreSlowPathState( * \ingroup DVFilter * \brief Retrieve slow path state from the guest appliance. * + * \nativedriversdisallowed + * * \note This function will not block. * * The slow path agent is asked to provide its state. The provided @@ -1763,6 +1816,8 @@ VMK_ReturnStatus vmk_DVFilterRetrieveSlowPathState( * \ingroup DVFilter * \brief Set the src port to the port this filter is installed on. * + * \nativedriversdisallowed + * * \note This function will not block. * * Set the packet source port identification field to the port @@ -1811,6 +1866,8 @@ VMK_ReturnStatus vmk_DVFilterPktSetSourcePort( * \ingroup DVFilter * \brief Allocate a packet tag for the indicated fast path agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * DVFilter provides for tagging pkts as an aid in @@ -1843,6 +1900,8 @@ VMK_ReturnStatus vmk_DVFilterAllocPktTag( * \ingroup DVFilter * \brief Free all the packet tags allocated by the supplied agent. * + * \nativedriversdisallowed + * * \note This function will not block. * * One or more pkt tags, each one bit, acquired from @@ -1863,6 +1922,8 @@ void vmk_DVFilterFreePktTags( * \ingroup DVFilter * \brief Tag the packet with the specified tag. * + * \nativedriversdisallowed + * * \note This function will not block. * * \pre The tag must belong to the supplied fast path agent. @@ -1913,6 +1974,8 @@ VMK_ReturnStatus vmk_DVFilterPktSetTags( * \ingroup DVFilter * \brief Clear a fast path's tags from a packet. * + * \nativedriversdisallowed + * * \note This function will not block. * * Clear the tag or tag bits of the pkt with respect to the @@ -1958,6 +2021,8 @@ VMK_ReturnStatus vmk_DVFilterPktClearTags( * \ingroup DVFilter * \brief Query the values of one or more bits from the pkt tag. * + * \nativedriversdisallowed + * * \note This function will not block. * * Query the tag bits set on a packet. @@ -1978,6 +2043,7 @@ VMK_ReturnStatus vmk_DVFilterPktClearTags( * \retval VMK_NOT_FOUND fastPathHandle parameter invalid. * \retval VMK_FAILURE getMask contains a bit not allocated for * this agent. + * \retval VMK_BAD_PARAM setMask is NULL * *********************************************************************** */ @@ -1994,6 +2060,8 @@ VMK_ReturnStatus vmk_DVFilterGetPktTags( * * \brief Register property operations for a DVFilter * + * \nativedriversdisallowed + * * DVFilter implementation calls this interface to register a property * handler for a property of a given name. The property name must * start with the agent name pass to vmk_DVFilterRegisterFastPath(). @@ -2026,6 +2094,8 @@ VMK_ReturnStatus vmk_DVFilterPropertyRegister( * * \brief Unregister a DVFilter Client * + * \nativedriversdisallowed + * * The handle is the token obtained from vmk_DVFilterPropertyRegister(). * * \param[in] handle Handle for DVFilter property registration @@ -2045,6 +2115,8 @@ VMK_ReturnStatus vmk_DVFilterPropertyUnregister( * * \brief Increment a DVFilter client stat. * + * \nativedriversdisallowed + * * Updates the DVFilter's client stat of the specified type in the * specified direction. * @@ -2073,6 +2145,8 @@ VMK_ReturnStatus vmk_DVFilterStatInc( * * \brief Get the current value of a DVFilter client stat. * + * \nativedriversdisallowed + * * Fetches the DVFilter's client stat of the specified type in the * specified direction. * diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_bitvector.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_bitvector.h new file mode 100644 index 0000000..38cd7be --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_bitvector.h @@ -0,0 +1,653 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * BitVector */ /** + * + * \addtogroup Lib + * @{ + * \defgroup vmk_BitVector Bit Vector Manipulation + * + * Utility interfaces for managing a Bit Vector. + + * \par Example - Using VMK_BITVECTOR_ITERATE or VMK_BITVECTOR_ITERATE_AND_CLEAR + * and VMK_BITVECTOR_ENDITERATE + * + * \code + * { + * vmk_uint32 n; + * VMK_BITVECTOR_ITERATE(_bv,n) { + * printf("%d is in set\n",n); + * } + * VMK_BITVECTOR_ENDITERATE() + * } + * \endcode + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_BITVECTOR_H_ +#define _VMKAPI_BITVECTOR_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +/** + * \brief Incomplete Abstract Data type allocated to be larger than + * sizeof(vmk_BitVector). Should only be allocated by + * vmk_BitVectorAlloc. + * Clients should only use the returned pointer. + */ +typedef struct vmk_BitVector { + vmk_uint32 n; + vmk_uint32 nwords; + vmk_uint32 vector[1]; +} vmk_BitVector; + + +/* + ******************************************************************************* + * vmk_BitVectorSize -- */ /** + * + * \brief Size of vmk_BitVector for a given number of bits + * + * \param[in] n Number of bits to size for + * + * \retval size calculation of a vmk_BitVector + * + ******************************************************************************* + */ +#define vmk_BitVectorSize(n) \ + (sizeof(vmk_uint32) /* n */ + \ + sizeof(vmk_uint32) /* nwords */ + \ + ((n + 31) / 32) * sizeof(vmk_uint32)) /* n bits rounded up to words */ + + +/* + ******************************************************************************* + * vmk_BitVectorAllocWithTimeout -- */ /** + * + * \brief Allocate a bitvector with timeout + * + * \param[in] heap vmk_HeapID to allocate the vmk_BitVector from + * \param[in] n Total number of bits to allocate for + * \param[in] timeoutMs vmk_BitVector to set a bit + * + * \note If timeoutMS is not 0 then the allocation may block if the + * heap needs to expand to accomodate the request. + * + * \retval vmk_BitVector pointer or NULL. + * + ******************************************************************************* + */ +vmk_BitVector* vmk_BitVectorAllocWithTimeout(vmk_HeapID heap, + vmk_uint32 n, + vmk_uint32 timeoutMs); + + +/* + ******************************************************************************* + * vmk_BitVectorAlloc -- */ /** + * + * \brief Allocate a bitvector + * + * \param[in] heap vmk_HeapID to allocate the vmk_BitVector from + * \param[in] n Total number of bits to allocate for + * + * \retval vmk_BitVector pointer or NULL. + * + ******************************************************************************* + */ +vmk_BitVector* vmk_BitVectorAlloc(vmk_HeapID heap, + vmk_uint32 n); + +/* + ******************************************************************************* + * vmk_BitVectorDuplicate -- */ /** + * + * \brief Allocate a vmk_BitVector and initialise it from another vmk_BitVector + * + * \param[in] heap vmk_HeapID to allocate the vmk_BitVector from + * \param[in] src Source vmk_BitVector to copy into the new vmk_BitVector + * + * \retval new vmk_BitVector pointer + * + ******************************************************************************* + */ +vmk_BitVector* vmk_BitVectorDuplicate(vmk_HeapID heap, + const vmk_BitVector *src); + + +/* + ******************************************************************************* + * vmk_BitVectorFree -- */ /** + * + * \brief Free a vmk_BitVector + * + * \param[in] heap vmk_HeapID to free the vmk_BitVector to + * \param[in] bv vmk_BitVector to free + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + ******************************************************************************* + */ +void vmk_BitVectorFree(vmk_HeapID heap, + vmk_BitVector *bv); + + +/* + ******************************************************************************* + * vmk_BitVectorSet -- */ /** + * + * \brief Set a bit in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to set a bit + * \param[in] n Bit to set + * + ******************************************************************************* + */ +static inline void +vmk_BitVectorSet(vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + asm volatile("btsl %1, (%0)" + :: "r" (bv->vector), "r" (n) + : "cc", "memory"); +} + + +/* + ******************************************************************************* + * vmk_BitVectorClear -- */ /** + * + * \brief Clear a bit in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to clear a bit + * \param[in] n Bit to set + * + ******************************************************************************* + */ +static inline void +vmk_BitVectorClear(vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + asm volatile("btrl %1, (%0)" + :: "r" (bv->vector), "r" (n) + : "cc", "memory"); +} + + +/* + ******************************************************************************* + * vmk_BitVectorTest -- */ /** + * + * \brief Test if a bit in a vmk_BitVector is set + * + * \param[in] bv vmk_BitVector to check + * \param[in] n Bit to check + * + * \retval If this bit is set, non-zero is returned. + * + ******************************************************************************* + */ +static inline int +vmk_BitVectorTest(const vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + { + vmk_uint32 tmp; + + asm("btl %2, (%1); " + "sbbl %0, %0" + : "=r" (tmp) + : "r" (bv->vector), "r" (n) + : "cc"); + return tmp; + } +} + + +/* + ******************************************************************************* + * vmk_BitVectorAtomicTestAndSet -- */ /** + * + * \brief Atomically read bit n and set it + * + * \param[in] bv vmk_BitVector to set a bit + * \param[in] n Bit to set + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + ******************************************************************************* + */ +static inline int +vmk_BitVectorAtomicTestAndSet(const vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + { + vmk_uint32 tmp; + + asm volatile("lock; btsl %2, (%1); " + "sbbl %0, %0" + : "=r" (tmp) + : "r" (bv->vector), "r" (n) + : "cc", "memory"); + + return tmp; + } +} + + +/* + ******************************************************************************* + * vmk_BitVectorAtomicTestAndClear -- */ /** + * + * \brief Atomically read bit n and clear it + * + * \param[in] bv vmk_BitVector to operate on + * \param[in] n Bit to clear + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + ******************************************************************************* + */ +static inline int +vmk_BitVectorAtomicTestAndClear(const vmk_BitVector *bv, + vmk_uint32 n) +{ + VMK_ASSERT(n < bv->n); + { + vmk_uint32 tmp; + + asm volatile("lock; btrl %2, (%1); " + "sbbl %0, %0" + : "=r" (tmp) + : "r" (bv->vector), "r" (n) + : "cc", "memory"); + + return tmp; + } +} + + +/* + ******************************************************************************* + * vmk_BitVectorZap -- */ /** + * + * \brief Removes all entries from the set + * + * \param[in] bv vmk_BitVector to zap + * + ******************************************************************************* + */ +static inline void +vmk_BitVectorZap(vmk_BitVector *bv) +{ + vmk_Memset(bv->vector, 0, bv->nwords * sizeof(bv->vector[0])); +} + + +/* + ******************************************************************************* + * vmk_BitVectorFill -- */ /** + * + * \brief Set all bits in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to operate on + * + ******************************************************************************* + */ +static inline void +vmk_BitVectorFill(vmk_BitVector *bv) +{ + vmk_Memset(bv->vector, 0xff, bv->nwords * sizeof(bv->vector[0])); +} + + +/* + ******************************************************************************* + * vmk_BitVectorGetRef -- */ /** + * + * \brief Get a pointer to a particular byte in vmk_BitVector + * + * \param[in] bv vmk_BitVector to look inside + * \param[in] start Starting byte return + * \param[in] nbytes Number of bytes expected to be used + * + * \note nbytes is only checked in debug builds + * + * \retval Pointer to a vmk_unit8. + * + ******************************************************************************* + */ +static inline vmk_uint8 * +vmk_BitVectorGetRef(const vmk_BitVector *bv, + vmk_uint32 start, + vmk_uint32 nbytes) +{ + vmk_uint8 *ptr = (vmk_uint8 *)bv->vector; + (void)nbytes; + VMK_ASSERT((start + nbytes) <= bv->nwords * sizeof(bv->vector[0])); + return &ptr[start]; +} + + +/* + ******************************************************************************* + * vmk_BitVectorNumBitsSet -- */ /** + * + * \brief Return the number of set bits in this vmk_BitVector + * + * \param[in] bv vmk_BitVector to count + * + * \retval number of bits set in this vmk_BitVector + * + ******************************************************************************* + */ +vmk_uint32 vmk_BitVectorNumBitsSet(const vmk_BitVector *bv); + + +/* + ******************************************************************************* + * vmk_BitVectorIsZero -- */ /** + * + * \brief Check if a vmk_BitVector has no bits set + * + * \param[in] bv vmk_BitVector to check + * + * \retval non-zero if any bit is set in the vmk_BitVector + * + ******************************************************************************* + */ +vmk_uint32 vmk_BitVectorIsZero(const vmk_BitVector *bv); + + +/* + ******************************************************************************* + * vmk_BitVectorNextBit -- */ /** + * + * \brief Find next bit set in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to check + * \param[in] start Bit to start searching from + * \param[in] state VMK_TRUE if looking for set bits + * \param[out] pos Filled in with index of the next bit + * + * \retval VMK_TRUE if a bit was found + * + * \note The value of "pos" must not be used if VMK_FALSE is returned. + * + ******************************************************************************* + */ +vmk_Bool vmk_BitVectorNextBit(const vmk_BitVector *bv, + vmk_uint32 start, + vmk_Bool state, + vmk_uint32 *pos); + + +/* + ******************************************************************************* + * vmk_BitVectorPrevBit -- */ /** + * + * \brief Find previous bit set in a vmk_BitVector, searching backwards + * + * \param[in] bv vmk_BitVector to check + * \param[in] start Bit to start searching from + * \param[in] state VMK_TRUE if looking for set bits + * \param[out] pos Filled in with index of the next bit + * + * \retval VMK_TRUE if a bit was found + * + * \note BitVectors are implemented as an array of vmk_uint32 which affects + * byte ordering on little endian architectures, such as x86. + * + * \note The value of "pos" must not be used if VMK_FALSE is returned. + * + ******************************************************************************* + */ +vmk_Bool vmk_BitVectorPrevBit(const vmk_BitVector *bv, + vmk_uint32 start, + vmk_Bool state, + vmk_uint32 *pos); + + +/* + ******************************************************************************* + * vmk_BitVectorGetExtent -- */ /** + * + * \brief Find sequence of bits in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to check + * \param[in] start Bit to start searching from + * \param[out] set Is start bit set or not + * \param[out] length Filled in with index of the next bit + * + * \note BitVectors are implemented as an array of vmk_uint32 which affects + * byte ordering on little endian architectures, such as x86. + * + ******************************************************************************* + */ +void vmk_BitVectorGetExtent(const vmk_BitVector *bv, + vmk_uint32 start, + vmk_Bool *set, + vmk_uint32 *length); + +/* + ******************************************************************************* + * vmk_BitVectorNextExtent -- */ /** + * + * \brief Find next sequence of bits in a vmk_BitVector + * + * \param[in] bv vmk_BitVector to check + * \param[in] startSearch Bit to start searching from + * \param[in] set VMK_TRUE if looking for set bits + * \param[out] startRun Start index of extend found + * \param[out] length Length of extent found + * + * \retval VMK_TRUE if a bit was found + * + * \note BitVectors are implemented as an array of vmk_uint32 which affects + * byte ordering on little endian architectures, such as x86. + * + * \note The values of "startRun" and "length" must not be used if VMK_FALSE + * is returned. + * + ******************************************************************************* + */ +vmk_Bool vmk_BitVectorNextExtent(const vmk_BitVector *bv, + vmk_uint32 startSearch, + vmk_Bool set, + vmk_uint32 *startRun, + vmk_uint32 *length); + + +/* + ******************************************************************************* + * vmk_BitVectorSetExtent -- */ /** + * + * \brief Set an extent of a bitvector to a particular state + * + * \param[in] bv vmk_BitVector to set a bit + * \param[in] startRun Bit to start setting from + * \param[in] length Number of bits to set + * \param[in] state VMK_TRUE if setting to 1 + * + * \retval If setting to 1, returns a positive count number of bits set, + * otherwise returns a negative count of the number of bits set. + * + ******************************************************************************* + */ +int vmk_BitVectorSetExtent(vmk_BitVector *bv, + vmk_uint32 startRun, + vmk_uint32 length, + vmk_Bool state); + + +/* + ******************************************************************************* + * vmk_BitVectorSetExtentFast -- */ /** + * + * \brief Set an extent of a bitvector to 1 + * + * \param[in] bv vmk_BitVector to set a bit + * \param[in] startRun Bit to start setting from + * \param[in] length Number of bits to set + * + ******************************************************************************* + */ +void vmk_BitVectorSetExtentFast(vmk_BitVector *bv, + vmk_uint32 startRun, + vmk_uint32 length); + + +/* + ******************************************************************************* + * vmk_BitVectorMerge -- */ /** + * + * \brief Merge two sets of vmk_BitVector + * + * \param[in] src vmk_BitVector merged into dest + * \param[in,out] dest vmk_BitVector modified by src + * + * \retval number of bits merged from src to dest that were not previously set. + * + ******************************************************************************* + */ +vmk_uint32 vmk_BitVectorMerge(vmk_BitVector *src, + vmk_BitVector *dest); + + +/* + ******************************************************************************* + * vmk_BitVectorMergeAtOffset -- */ /** + * + * \brief Merge two sets of vmk_BitVector from specific offset + * + * This function merges bits from the start of one vmk_BitVector into another, + * starting the merge at a specific offset in the destination vector. Bits set + * in the source vector that would go beyond the size of dest are ignored. + * + * \param[in] src vmk_BitVector merged into dest + * \param[in,out] dest vmk_BitVector modified by src + * \param[in] offset Bit position to write bits from src into + * + ******************************************************************************* + */ +void vmk_BitVectorMergeAtOffset(vmk_BitVector *src, + vmk_BitVector *dest, + vmk_uint32 offset); + + +/* + ******************************************************************************* + * vmk_BitVectorMaxSize -- */ /** + * + * \brief Returns the maximum number of bits that can be held in a vmk_BitVector + * + * \retval maximum number of bits that can be held in a vmk_BitVector + * + ******************************************************************************* + */ +vmk_uint32 vmk_BitVectorMaxSize(void); + + +/* + ******************************************************************************* + * VMK_BITVECTOR_ITERATE -- */ /** + * + * \brief Macro to iterate a vmk_BitVector + * + * \param[in] _bv vmk_BitVector to iterate across + * \param[in] _n Variable set to each valid bit each iteration + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + ******************************************************************************* + */ + +#define VMK_BITVECTOR_ITERATE(_bv,_n) { \ + vmk_uint32 _index; \ + for (_index=0;_index <(_bv)->nwords;_index++) { \ + vmk_uint32 _off,_vals; \ + _vals = (_bv)->vector[_index]; \ + while(_vals) { \ + __asm ("bsfl %1,%0\n\t" \ + "btrl %0,%1" \ + : "=r" (_off), "+g" (_vals) \ + : : "cc" ); \ + _n = (_index * 32) + _off; \ + if (_n >= (_bv)->n) { \ + break; \ + } \ + + +/* + ******************************************************************************* + * VMK_BITVECTOR_ITERATE_AND_CLEAR -- */ /** + * + * \brief Macro to iterate a vmk_BitVector, clearing it as well + * + * \param[in] _bv vmk_BitVector to iterate across + * \param[in] _n Variable set to each valid bit each iteration + * + * \retval If the previous value of this bit was zero then zero is returned + * otherwise non-zero is returned. + * + * \note The state of the vmk_BitVector during the iteration is undefined + * + ******************************************************************************* + */ + +#define VMK_BITVECTOR_ITERATE_AND_CLEAR(_bv,_n) { \ + vmk_uint32 _index; \ + for (_index=0;_index <(_bv)->nwords;_index++) { \ + vmk_uint32 _off,_vals; \ + _vals = (_bv)->vector[_index]; \ + (_bv)->vector[_index] = 0; \ + while(_vals) { \ + __asm ("bsfl %1,%0\n\t" \ + "btrl %0,%1" \ + : "=r" (_off), "+g" (_vals) \ + : : "cc"); \ + _n = (_index * 32) + _off; \ + if (_n >= (_bv)->n) { \ + break; \ + } \ + + +/* + ******************************************************************************* + * VMK_BITVECTOR_ENDITERATE -- */ /** + * + * \brief Macro to end a iteration zone + * + * Can be used with either VMK_BITVECTOR_ITERATE() or + * VMK_BITVECTOR_ITERATE_AND_CLEAR() + * + ******************************************************************************* + */ + +#define VMK_BITVECTOR_ENDITERATE() }}} + +#endif /* _VMKAPI_BITVECTOR_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_compiler.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_compiler.h index 4354a34..743326b 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_compiler.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_compiler.h @@ -192,6 +192,22 @@ #define VMK_UNLIKELY(_exp) (_exp) #endif +/* + *********************************************************************** + * VMK_IS_COMPILE_TIME -- */ /** + * + * \brief If a given expression is known to be constant at compile-time. + * + * \note This is used to enable some optimizations when an expression is + * known to be constant at compile time, and fall back to a more + * generic method when it is not. + * + * \param[in] _exp Expression that is tested. + * + *********************************************************************** + */ +#define VMK_IS_COMPILE_TIME(_exp) __builtin_constant_p(_exp) + /* *********************************************************************** * VMK_PADDED_STRUCT -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_const.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_const.h index 6690d90..f1a303f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_const.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_const.h @@ -101,6 +101,14 @@ #define VMK_UINT64_MAX ((vmk_uint64)VMK_CONST64U(0xffffffffffffffff)) +/** + * \brief Bits per byte. + */ +#ifndef VMK_BITS_PER_BYTE +#define VMK_BITS_PER_BYTE (8) +#endif + + #endif /* _VMKAPI_CONST_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_hash.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_hash.h index 9dfa734..597af90 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_hash.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_hash.h @@ -56,7 +56,7 @@ typedef vmk_uint64 vmk_HashKeyFlags; /** No flags. */ #define VMK_HASH_KEY_FLAGS_NONE 0x0 -/** +/** * Hash implementation should do a local copy of the key on insertion * and do not assume the memory backing up the key will be persistent. */ @@ -115,7 +115,7 @@ vmk_HashGetAllocSize(vmk_uint32 nbEntries); * * \note The hash table returned does not come with locking, it is the * caller's responsibility to provide such mechanism. - * + * * \param[in] moduleID Module ID requesting the hash table. * \param[in] heapID The heap used for hash table internal allocation * related to hash structure and hash entries @@ -228,7 +228,7 @@ vmk_HashAllocWithOpaqueKeys(vmk_ModuleID moduleID, * * \brief Release a hash table. * - * \param[in] hdl Hash handle. + * \param[in] hdl Hash handle. * * \retval VMK_OK Hash table was released successful. * \retval VMK_BUSY If the hash table is not empty. @@ -240,6 +240,30 @@ VMK_ReturnStatus vmk_HashRelease(vmk_HashTable hdl); +/* + ******************************************************************************* + * vmk_HashDeleteAll -- */ /** + * + * \brief Delete every entry in a hash table. + * + * \note This won't actually release the values passed as part of the hash + * table insertion. Client should make sure the right clean up is done + * beforehand. + * + * \note A subsequent call to vmk_HashIsEmpty() on the given hash table should + * return VMK_TRUE. + * + * \param[in] hdl Hash handle. + * + * \retval VMK_OK Every single entry of the hash table was deleted. + * \retval VMK_BAD_PARAM If hdl equals to VMK_INVALID_HASH_HANDLE. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_HashDeleteAll(vmk_HashTable hdl); + + /* ******************************************************************************* * vmk_HashIsEmpty -- */ /** @@ -264,7 +288,7 @@ vmk_HashIsEmpty(vmk_HashTable hdl); * \brief Iterator used to iterate the key-value pairs on a given hash table. * * \note The return value is a command set given back to the iterator engine to - * let it know what to do next. It can be a binary union of any of the + * let it know what to do next. It can be a binary union of any of the * vmk_HashKeyIteratorCmd defined above. * * \param[in] hdl Hash handle. @@ -314,7 +338,7 @@ vmk_HashKeyIterate(vmk_HashTable hdl, * * \brief Insert a key-value pair into a given hash table. * - * \note The key passed will be copied locally only if the flag + * \note The key passed will be copied locally only if the flag * VMK_HASH_KEY_FLAGS_LOCAL_COPY was passed while creating the hash. * * \note The value passed won't be copied so the reference needs to be persistent @@ -332,7 +356,7 @@ vmk_HashKeyIterate(vmk_HashTable hdl, ******************************************************************************* */ VMK_ReturnStatus -vmk_HashKeyInsert(vmk_HashTable hdl, +vmk_HashKeyInsert(vmk_HashTable hdl, vmk_HashKey key, vmk_HashValue value); @@ -421,6 +445,30 @@ vmk_HashKeyFind(vmk_HashTable hdl, vmk_HashKey key, vmk_HashValue *value); +/* + ******************************************************************************* + * vmk_HashBytes -- */ /** + * + * \brief Calculate 64 bit hash for an array of bytes. + * + * \note This API is not used as part of a hash table allocated with the + * vmk_HashAlloc() function. It is provided as a helper routine for + * callers that need to calculate hashes for their own purpose. + * + * \param[in] key Byte array pointer. + * \param[in] keySize Array Size in byte. + * \param[out] hash The calculated hash value. + * + * \retval VMK_OK Hash calculated successfully. + * \retval VMK_BAD_PARAM If key or hash is NULL, or keySize equal zero. + * + ******************************************************************************* + */ + +VMK_ReturnStatus +vmk_HashBytes(const vmk_uint8 *key, + vmk_uint32 keySize, + vmk_uint64 *hash); #endif /* _VMKAPI_HASH_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_priq.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_priq.h new file mode 100644 index 0000000..e8b812a --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_priq.h @@ -0,0 +1,395 @@ +/* ********************************************************** + * Copyright 2006 - 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + ******************************************************************************* + * PriQ */ /** + * \addtogroup Lib + * @{ + * \defgroup PriQ Priority Queue + * + * These are interfaces for priority queues. + * + * The keys can be duplicated, the ordering will be kept accross the elements, + * but the values are expected to be unique. The only reason for that is + * because the vmk_PriQRekey uses the value as an unique identifier to update + * the key of an element. If two elements with the same value are stored in the + * queue and the vmk_PriQRekey is used on this element, then the behavior is + * undefined. + * + * @{ + ******************************************************************************* + */ + +#ifndef _VMKAPI_PRIQ_H_ +#define _VMKAPI_PRIQ_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Type of the priority queue. + * + * \details A priority queue can have elements with the smallest or the biggest + * key on front. This enum is used to select the type of priority + * queue we use. + */ +typedef enum vmk_PriQType { + /** + * \brief The queue will be a "min priority queue", meaning that the elements + * with the lowest priority will be on the front. + */ + VMK_PRIQ_TYPE_MIN, + /** + * \brief The queue will be a "max priority queue", meaning that the elements + * with the highest priority will be on the front. + */ + VMK_PRIQ_TYPE_MAX, +} vmk_PriQType; + +/** + * \brief Key used to insert an element into the priority queue. + */ +typedef vmk_uint64 vmk_PriQKey; + +/** + * \brief Opaque data structure for the priority queue. + */ +typedef struct vmk_PriQInternal *vmk_PriQHandle; + +/* + ******************************************************************************* + * vmk_PriQCreate -- */ /** + * + * \brief Create a new priority queue. + * + * \note vmk_PriQDestroy() needs to be called once done with the priority queue. + * + * \note The priority queue returned does not come with locking, it is the + * caller's responsibility to provide such mechanism if needed. + * + * \param[in] moduleID Module ID requesting the priority queue. + * \param[in] heapID The heap used for priority queue internal allocation. + * \param[in] type Type of the priority queue. + * \param[in] numElems Number of elements in the priority queue. The queue + * can be later resized if needed. + * \param[out] priQ Handle on the priority queue. + * + * \retval VMK_OK Priority queue initialization and allocation was + * successful. + * \retval VMK_NO_MEMORY Memory allocation failure. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQCreate(vmk_ModuleID moduleID, + vmk_HeapID heapID, + vmk_PriQType type, + vmk_uint64 numElems, + vmk_PriQHandle *priQ); + +/* + ******************************************************************************* + * vmk_PriQDestroy -- */ /** + * + * \brief Destroy a priority queue and its associated resources. + * + * \param[in] priQ Handle on the priority queue. + * + * \retval VMK_OK Everything went fine, the priority queue is released. + * \retval VMK_BUSY The priority queue was not empty. Unable to release it. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQDestroy(vmk_PriQHandle priQ); + +/* + ******************************************************************************* + * vmk_PriQClear -- */ /** + * + * \brief Clear the contents of a priority queue. + * + * \param[in] priQ Handle on the priority queue. + * + * \retval VMK_OK Everything went fine, the priority queue was emptied. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQClear(vmk_PriQHandle priQ); + +/* + ******************************************************************************* + * vmk_PriQTotalElems -- */ /** + * + * \brief Get the total number of slots in the priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[out] totalElems Pointer to the output data. + * + * \retval VMK_OK The operation was successful. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQTotalElems(vmk_PriQHandle priQ, + vmk_uint64 *totalElems); + +/* + ******************************************************************************* + * vmk_PriQUsedElems -- */ /** + * + * \brief Get the number of used slots in the priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[out] usedElems Pointer to the output data. + * + * \retval VMK_OK The operation was successful. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQUsedElems(vmk_PriQHandle priQ, + vmk_uint64 *usedElems); + +/* + ******************************************************************************* + * vmk_PriQIsEmpty -- */ /** + * + * \brief Check whether or not a priority queue is empty. + * + * \param[in] priQ Handle on the priority queue. + * + * \retval VMK_TRUE The priority queue is empty. + * \retval VMK_FALSE The priority queue still contains some elements. + * + ******************************************************************************* + */ +static inline vmk_Bool +vmk_PriQIsEmpty(vmk_PriQHandle priQ) +{ + VMK_ReturnStatus status; + vmk_uint64 usedElems; + + status = vmk_PriQUsedElems(priQ, &usedElems); + VMK_ASSERT(status == VMK_OK); + + return (usedElems == 0); +} + +/* + ******************************************************************************* + * vmk_PriQResize -- */ /** + * + * \brief Resize a previously allocated priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] numElems New number of elements of the priority queue. + * + * \retval VMK_OK Resize operation was successful. + * \retval VMK_BUSY Trying to shrink the queue to a size too small for the + * elements that are already in there. + * \retval VMK_NO_MEMORY Memory allocation failure. The priority queue is left + * unchanged. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQResize(vmk_PriQHandle priQ, + vmk_uint64 numElems); + +/* + ******************************************************************************* + * vmk_PriQInsert -- */ /** + * + * \brief Insert an element in the priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] key Key of the new element. This is the actual "priority" + * that is used to sort elements in the queue. + * \param[in] value Opaque value to store with the key. + * + * \retval VMK_OK Insertion was successful. + * \retval VMK_LIMIT_EXCEEDED The priority queue is already full. The element + * was not inserted. The user needs to resize the queue. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQInsert(vmk_PriQHandle priQ, + vmk_PriQKey key, + void *value); + +/* + ******************************************************************************* + * vmk_PriQFirst -- */ /** + * + * \brief Get the first element of the priority queue and/or its associated key. + * + * \note This does not remove the first element from the priority queue. One + * needs to use vmk_PriQExtractFirst() for that purpose. + * + * \param[in] priQ Handle on the priority queue. + * \param[out] key Pointer to the output key. If this parameter is NULL, + * then it is ignored. + * \param[out] value Pointer to the output value. If this parameter is + * NULL, then it is ignored. + * + * \retval VMK_OK The first element of the queue has been "found" and + * stored in the output parameters. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The queue was empty. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQFirst(vmk_PriQHandle priQ, + vmk_PriQKey *key, + void **value); + +/* + ******************************************************************************* + * vmk_PriQExtractFirst -- */ /** + * + * \brief Returns and deletes the first element of the priority queue. + * + * \param[in] priQ Handle on the priority queue. + * \param[out] key Pointer to the output key. If this parameter is NULL, + * then it is ignored. + * \param[out] value Pointer to the output value. If this parameter is + * NULL, then it is ignored. + * + * \retval VMK_OK The first element of the queue has been stored in + * output parameters and deleted from the queue. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The queue was empty. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQExtractFirst(vmk_PriQHandle priQ, + vmk_PriQKey *key, + void **value); + +/* + ******************************************************************************* + * vmk_PriQExtract -- */ /** + * + * \brief Returns and deletes the element whose value is passed as argument. + * + * \note As keys in a priority queue can be duplicated, the only way to + * uniquely identify an element is to use the pointer referencing it. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] value Value that was initially stored in the queue and that + * we want to extract. + * \param[out] key Pointer to the output key. If this parameter is NULL, + * then it is ignored. + * + * \retval VMK_OK The element of the queue has been stored in output + * parameters and deleted from the queue. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The element was not found in the queue. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQExtract(vmk_PriQHandle priQ, + void *value, + vmk_PriQKey *key); + +/* + ******************************************************************************* + * vmk_PriQFind -- */ /** + * + * \brief Returns the element whose value is passed as argument. + * + * \note As keys in a priority queue can be duplicated, the only way to + * uniquely identify an element is to use the pointer referencing it. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] value Value that was initially stored in the queue and that + * we want to find. + * \param[out] key Pointer to the output key. If this parameter is NULL, + * then it is ignored. + * + * \retval VMK_OK The element of the queue has been stored in output + * parameters and deleted from the queue. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The element was not found in the queue. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQFind(vmk_PriQHandle priQ, + void *value, + vmk_PriQKey *key); + +/* + ******************************************************************************* + * vmk_PriQRekeyFirst -- */ /** + * + * \brief Update the key of the first element in the queue. + * + * \details This will lead to the first element beeing moved in the queue if + * needed. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] newKey New key to apply to the first element in the queue. + * + * \retval VMK_OK The first element of the queue has been updated. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The queue was empty. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQRekeyFirst(vmk_PriQHandle priQ, + vmk_PriQKey newKey); + +/* + ******************************************************************************* + * vmk_PriQRekey -- */ /** + * + * \brief Update the key of the entry whose value is passed as argument. + * + * \details This will lead to the element being moved in the queue if needed. + * + * \note As keys in a priority queue can be duplicated, the only way to + * uniquely identify an element is to use the pointer referencing it. + * + * \param[in] priQ Handle on the priority queue. + * \param[in] value Value that was initially stored in the queue, for + * which we will update the key. + * \param[in] newKey New key to apply to the value. + * + * \retval VMK_OK The element's key has been updated. + * \retval VMK_BAD_PARAM An invalid parameter was provided. + * \retval VMK_NOT_FOUND The element was not found in the queue. + * + ******************************************************************************* + */ +VMK_ReturnStatus +vmk_PriQRekey(vmk_PriQHandle priQ, + void *value, + vmk_PriQKey newKey); + +#endif /* _PRIQ_MINMAXHEAP_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_util.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_util.h index d2f8c91..418ae96 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_util.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/lib/vmkapi_util.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2008 - 2009 VMware, Inc. All rights reserved. + * Copyright 2008 - 2009, 2013 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -58,6 +58,134 @@ */ #define VMK_UTIL_ROUNDUP(x, y) ((((x)+(y)-1) / (y)) * (y)) +/** + * \brief A series of macros used to count parameters in a varargs list + */ + +/* + *********************************************************************** + * __VMK_UTIL_MASK_ARGS_INT__ -- */ /** + * + * \brief Internal macro to ignore the first 128 varargs parameters and + * evaluate as 129th. + * + * This is used as part of VMK_UTIL_NUM_ARGS(). VMKAPI clients should + * not call this macro directly. + * + *********************************************************************** + */ + +/** \cond nodoc */ +#define __VMK_UTIL_MASK_ARGS_INT__( \ + _ARG1, _ARG2, _ARG3, _ARG4, _ARG5, \ + _ARG6, _ARG7, _ARG8, _ARG9, _ARG10, \ + _ARG11, _ARG12, _ARG13, _ARG14, _ARG15, \ + _ARG16, _ARG17, _ARG18, _ARG19, _ARG20, \ + _ARG21, _ARG22, _ARG23, _ARG24, _ARG25, \ + _ARG26, _ARG27, _ARG28, _ARG29, _ARG30, \ + _ARG31, _ARG32, _ARG33, _ARG34, _ARG35, \ + _ARG36, _ARG37, _ARG38, _ARG39, _ARG40, \ + _ARG41, _ARG42, _ARG43, _ARG44, _ARG45, \ + _ARG46, _ARG47, _ARG48, _ARG49, _ARG50, \ + _ARG51, _ARG52, _ARG53, _ARG54, _ARG55, \ + _ARG56, _ARG57, _ARG58, _ARG59, _ARG60, \ + _ARG61, _ARG62, _ARG63, _ARG64, _ARG65, \ + _ARG66, _ARG67, _ARG68, _ARG69, _ARG70, \ + _ARG71, _ARG72, _ARG73, _ARG74, _ARG75, \ + _ARG76, _ARG77, _ARG78, _ARG79, _ARG80, \ + _ARG81, _ARG82, _ARG83, _ARG84, _ARG85, \ + _ARG86, _ARG87, _ARG88, _ARG89, _ARG90, \ + _ARG91, _ARG92, _ARG93, _ARG94, _ARG95, \ + _ARG96, _ARG97, _ARG98, _ARG99, _ARG100, \ + _ARG101, _ARG102, _ARG103, _ARG104, _ARG105, \ + _ARG106, _ARG107, _ARG108, _ARG109, _ARG110, \ + _ARG111, _ARG112, _ARG113, _ARG114, _ARG115, \ + _ARG116, _ARG117, _ARG118, _ARG119, _ARG120, \ + _ARG121, _ARG122, _ARG123, _ARG124, _ARG125, \ + _ARG126, _ARG127, _ARG128, _ARG129, ...) _ARG129 +/** \endcond */ + +/* + *********************************************************************** + * __VMK_UTIL_ARG_COUNTS__ -- */ /** + * + * \brief A series of argument counts, used with VMK_UTIL_NUM_ARGS. + * + * This is used as part of VMK_UTIL_NUM_ARGS(). VMKAPI clients should + * no call this macro directly. + * + *********************************************************************** + */ +/** \cond nodoc */ +#define __VMK_UTIL_ARG_COUNTS__() \ + 128, 127, 126, 125, 124, 123, 122, 121, 120, \ + 119, 118, 117, 116, 115, 114, 113, 112, 111, 110, \ + 109, 108, 107, 106, 105, 104, 103, 102, 101, 100, \ + 99, 98, 97, 96, 95, 94, 93, 92, 91, 90, \ + 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, \ + 79, 78, 77, 76, 75, 74, 73, 72, 71, 70, \ + 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, \ + 59, 58, 57, 56, 55, 54, 53, 52, 51, 50, \ + 49, 48, 47, 46, 45, 44, 43, 42, 41, 40, \ + 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, \ + 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, \ + 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, \ + 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 +/** \endcond */ + + +/* + *********************************************************************** + * __VMK_UTIL_MASK_ARGS__ -- */ /** + * + * \brief Variadic macro that masks the first 128 arguments, evaluating + * the 129th. + * + * This is used as part of VMK_UTIL_NUM_ARGS(). VMKAPI clients should + * no call this macro directly. + * + *********************************************************************** + */ +/** \cond nodoc */ +#define __VMK_UTIL_MASK_ARGS__(...) \ + __VMK_UTIL_MASK_ARGS_INT__(__VA_ARGS__) +/** \endcond */ + +/* + *********************************************************************** + * VMK_UTIL_NUM_ARGS -- */ /** + * + * \brief Macro to count the number of varargs parameters. + * + * \param[in] ... varargs parameters. There can be 0 to 127 + * parameters. More than 127 produces an + * undefined result. + * + * \note This works by creating a larger varargs series of parameters + * around the passed series and using internal macros. The + * larger series is a dummy parameter (to support if the passed + * series has no parameters), the passed series, and then a + * decreasing series of numbers representing the parameter count. + * The internal macros effectively ignore the first 128 + * parameters of this larger series and evaluates as the 129th, + * thus effectively evaluating as one plus the count of passed + * parameters. (The one is offset by subtraction in this + * macro). + * \note This macro relies on the special behavior of ##__VA_ARGS__, + * as described here: + * http://gcc.gnu.org/onlinedocs/cpp/Variadic-Macros.html + * In the case that the passed varargs series has no elements, + * ##__VA_ARGS__ will also consume the comma preceding it, + * allowing this macro (VMK_UTIL_NUM_ARGS) to compile correctly + * and evaluate as 0. + * + *********************************************************************** + */ +/** \cond nodoc */ +#define VMK_UTIL_NUM_ARGS(...) \ + (__VMK_UTIL_MASK_ARGS__(_DUMMY, ##__VA_ARGS__, __VMK_UTIL_ARG_COUNTS__()) - 1) +/** \endcond */ + #endif /* _VMKAPI_UTIL_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/mpp/vmkapi_mpp.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/mpp/vmkapi_mpp.h index 0af534d..b7db9ef 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/mpp/vmkapi_mpp.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/mpp/vmkapi_mpp.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2004 - 2009 VMware, Inc. All rights reserved. + * Copyright 2004 - 2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -1373,6 +1373,7 @@ VMK_ReturnStatus vmk_ScsiGetPathPendingCmdInfo( * not be allocated. * \retval VMK_FAILURE Could not abort/reset for other reason, * but the operation can be retried. + * \retval VMK_NOT_FOUND The I/Os could not be found. * *********************************************************************** */ @@ -1805,31 +1806,6 @@ vmk_ScsiIssueSyncFilterCommandWithRetries( vmk_uint8 *data, vmk_ByteCountSmall dataLen); -/* - *********************************************************************** - * vmk_ScsiSchedCommandCompletion -- */ /** - * - * \ingroup MPP - * - * \brief Schedules a non-blocking context to complete the command. - * - * This function schedules a non-blocking context to complete a - * command. The intent is to use this from the issuing path where - * a command cannot be completed directly since that could lead to - * stack exhaustion due to recursive calls to the issuing path from - * the completion path. - * - * \note This is a non-blocking call. - * - * \note Spin locks can be held while calling into this function - * - * \param[in] command The cmd to complete. - * - *********************************************************************** - */ -void vmk_ScsiSchedCommandCompletion( - vmk_ScsiCommand *command); - /* *********************************************************************** * vmk_ScsiRegisterEventHandler -- */ /** @@ -2148,13 +2124,12 @@ vmk_ScsiCommandMaxFree(void); * * \ingroup MPP * - * \brief Auto-detect device attribute support for a SCSI device. + * \brief Determine if a device attribute is supported by a device. * * PSA invokes this function by default if the isSSD() and * isLocal() plugin-entry points are not specified. * - * The default auto-detection behaviour for various device attributes - * are outlined below. + * The behaviour for various device attributes is outlined below. * * - VMK_SCSI_DEVICE_BOOL_ATTR_PSEUDO * - Device is not a pseudo-device. Always return VMK_FALSE in result. diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/mpp/vmkapi_mpp_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/mpp/vmkapi_mpp_types.h index c9f037d..2ea5645 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/mpp/vmkapi_mpp_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/mpp/vmkapi_mpp_types.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2004 - 2009 VMware, Inc. All rights reserved. + * Copyright 2004 - 2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -70,6 +70,9 @@ typedef enum vmk_ScsiPluginStatelogFlag { VMK_SCSI_PLUGIN_STATE_LOG_CRASHDUMP = 0x00000002 } vmk_ScsiPluginStatelogFlag; +/** + * \brief SCSI device attributes + */ typedef enum vmk_ScsiDeviceBoolAttribute { /** * \brief Unknown/invalid attribute. diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_csum.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_csum.h new file mode 100644 index 0000000..7d2dc2c --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_csum.h @@ -0,0 +1,149 @@ +/* ********************************************************** + * Copyright 2011 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * NetCksum */ /** + * \addtogroup Network + *@{ + * \defgroup NetCksum Network protocol checksum functions + *@{ + * + *********************************************************************** + */ +#ifndef _VMKAPI_NET_CKSUM_H_ +#define _VMKAPI_NET_CKSUM_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/* + *********************************************************************** + * vmk_NetCsumFold -- */ /** + * + * \brief Fold a partial 32-bit checksum into a single 16-bit value. + * + * \param[in] sum Partial checksum to fold. + * + * \retval The folded checksum. + * + *********************************************************************** + */ +static inline vmk_uint16 vmk_NetCsumFold(vmk_uint32 sum) +{ + __asm__("addl %1, %0; adcl $0xffff, %0" + : "=r" (sum) + : "r" (sum << 16), "0" (sum & 0xffff0000)); + + return (~sum) >> 16; +} + +/* + *********************************************************************** + * vmk_NetCsumDataPartial -- */ /** + * + * \brief Checksum a block of data. + * + * \param[in] data Data to checksum + * \param[in] len Length of the data to checksum. + * \param[in] initialSum Initial checksum to add. + * + * \retval The resulting unfolded checksum. + * + *********************************************************************** + */ +vmk_uint32 vmk_NetCsumDataPartial(void *data, + vmk_uint64 len, + vmk_uint32 initialSum); + +/* + *********************************************************************** + * vmk_NetCsumDataFinal -- */ /** + * + * \brief Checksum a block of data and fold the result. + * + * \param[in] data Data to checksum + * \param[in] len Length of the data to checksum. + * \param[in] initialSum Initial checksum to add. + * + * \retval The resulting checksum. + * + *********************************************************************** + */ +static inline vmk_uint16 vmk_NetCsumDataFinal(void *data, + vmk_uint64 len, + vmk_uint32 initialSum) +{ + return vmk_NetCsumFold(vmk_NetCsumDataPartial(data, len, initialSum)); +} + +/* + *********************************************************************** + * vmk_NetCsumIPv4Pseudo -- */ /** + * + * \brief Checksum an IPv4 pseudo-header and fold the result. + * + * \param[in] saddr Source address of the IPv4 packed. + * \param[in] daddr Destination address of the IPv4 packed. + * \param[in] proto Protocol number of the payload. + * \param[in] totalLength Total length of the packet. + * \param[in] initialSum Initial checksum to add. + * + * \note saddr, daddr, and proto are direct pointers to the IPv4 + * header's content; they are expected to be in network byte + * order. On the other hand, totalLength is the total length of + * the header + payload. It is expected to by in host byte order. + * + * \retval The resulting checksum. + * + *********************************************************************** + */ +vmk_uint16 vmk_NetCsumIPv4Pseudo(const vmk_uint32 *saddr, + const vmk_uint32 *daddr, + const vmk_uint8 *proto, + vmk_uint16 totalLength, + vmk_uint32 initialSum); + +/* + *********************************************************************** + * vmk_NetCsumIPv6Pseudo -- */ /** + * + * \brief Checksum an IPv6 pseudo-header and fold the result. + * + * \param[in] saddr Source address of the IPv6 packed. + * \param[in] daddr Destination address of the IPv6 packed. + * \param[in] totalLength Length of the IPv6 packet. + * \param[in] proto Protocol number of the payload. + * \param[in] initialSum Initial checksum to add. + * + * \note saddr, daddr, and proto are direct pointers to the IPv6 + * header's content; they are expected to be in network byte + * order. On the other hand, totalLength is the total length of + * the TCP header + payload. It is expected to by in host byte + * order. + * + * \note daddr will usually point to the IPv6 header's destination + * address, but when a routing header is present, the last element + * of the routing header must be used in the IPv6 pseudo header. + * + * \retval The resulting checksum. + * + *********************************************************************** + */ +vmk_uint16 vmk_NetCsumIPv6Pseudo(const vmk_uint8 *saddr, + const vmk_uint8 *daddr, + const vmk_uint8 *proto, + vmk_uint16 totalLength, + vmk_uint32 initialSum); + +#endif /* _VMKAPI_NET_CKSUM_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dcb.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dcb.h index 6897032..ff6446b 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dcb.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dcb.h @@ -20,7 +20,7 @@ * * This implementation is based on the DCB spec Rev1.01. Priority-based * Flow Control, Priority Group, and Application structures are all - * derived from the DCB spec Rev 1.01. + * derived from the DCB spec Rev 1.01. * * Link to the DCB spec Rev 1.01: * http://www.ieee802.org/1/files/public/docs2008/az-wadekar-dcbx-capability-exchange-discovery-protocol-1108-v1.01.pdf @@ -135,7 +135,7 @@ typedef struct vmk_DCBCapabilities { * * DCB Application Protocol Selector Field types. */ -typedef enum { +typedef enum vmk_DCBAppSelectorField { /** \brief App Proto ID carries L2 EtherType. */ VMK_DCB_APP_L2_ETHTYPE = 0x0, @@ -206,6 +206,518 @@ typedef struct vmk_DCBConfig { vmk_DCBApplications apps; } vmk_DCBConfig; + +/* + *********************************************************************** + * vmk_UplinkDCBIsEnabledCB -- */ /** + * + * \brief Handler used by vmkernel to check whether DCB support is + * enabled on the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] enabled Used to store the DCB state of the device. + * \param[out] version Used to store the DCB version supported by + * the device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE If the operation fails or if the device is + * not DCB capable. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBIsEnabledCB)(vmk_AddrCookie driverData, + vmk_Bool *enabled, + vmk_DCBVersion *version); + + +/* + *********************************************************************** + * vmk_UplinkDCBEnableCB -- */ /** + * + * \brief Handler used by vmkernel to enable DCB support on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBEnableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBDisableCB -- */ /** + * + * \brief Handler used by vmkernel to disable DCB support on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBDisableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBNumTCsGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve Traffic Classes + * information from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] numTCs Used to store the Traffic Class + * information. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBNumTCsGetCB)(vmk_AddrCookie driverData, + vmk_DCBNumTCs *numTCs); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityGroupGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve DCB Priority Group + * settings from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] pg Used to stored the current PG setting. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityGroupGetCB)(vmk_AddrCookie driverData, + vmk_DCBPriorityGroup *pg); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityGroupSetCB -- */ /** + * + * \brief Handler used by vmkernel to pushdown DCB Priority Group + * settings to the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] pg The Priority Group to be set up. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityGroupSetCB)(vmk_AddrCookie driverData, + vmk_DCBPriorityGroup *pg); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve Priority-based Flow + * Control configurations from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] pfcCfg Used to stored the current PFC configuration. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityFCGetCB)(vmk_AddrCookie driverData, + vmk_DCBPriorityFlowControlCfg *pfcCfg); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCSetCB -- */ /** + * + * \brief Handler used by vmkernel to pushdown Priority-based Flow + * Control configurations to the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] pfcCfg The PFC configuration to be set. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityFCSetCB)(vmk_AddrCookie driverData, + vmk_DCBPriorityFlowControlCfg *pfcCfg); + + +/* + *********************************************************************** + * vmk_UplinkDCBIsPriorityFCEnabledCB -- */ /** + * + * \brief Handler used by vmkernel to check whether Priority-based Flow + * Control support is enabled on the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] enabled Used to stored the current PFC support + * state. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBIsPriorityFCEnabledCB)(vmk_AddrCookie driverData, + vmk_Bool *enabled); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCEnableCB -- */ /** + * + * \brief Handler used by vmkernel to enable Priority-based Flow + * Control support on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note PFC configurations must be setup correctly before enabling + * PFC support on the device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityFCEnableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCDisableCB -- */ /** + * + * \brief Handler used by vmkernel to disable Priority-based Flow + * Control support on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBPriorityFCDisableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBApplicationsGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve all DCB Application + * Protocols settings from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] apps Used to store the DCB Applications + * settings of the device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBApplicationsGetCB)(vmk_AddrCookie driverData, + vmk_DCBApplications *apps); + + +/* + *********************************************************************** + * vmk_UplinkDCBApplicationsSetCB -- */ /** + * + * \brief Handler used by vmkernel to pushdown DCB Application Protocol + * settings to the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. + * + * \note Uplink layer will call vmk_UplinkDCBApplySettingsCB() after + * this call to guarantee the changes will be flushed onto the + * device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] app DCB Application Protocol setting of the + * device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBApplicationsSetCB)(vmk_AddrCookie driverData, + vmk_DCBApplication *app); + + +/* + *********************************************************************** + * vmk_UplinkDCBCapabilitiesGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve DCB capabilities + * information from the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] caps Used to store the DCB capabilities + * information of the device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBCapabilitiesGetCB)(vmk_AddrCookie driverData, + vmk_DCBCapabilities *caps); + + +/* + *********************************************************************** + * vmk_UplinkDCBSettingsApplyCB -- */ /** + * + * \brief Handler used by vmkernel to flush out all pending DCB + * configuration changes on the device. + * + * \note It should only be called from the DCB daemon that does + * DCB negotiation on behalf of this device. DCB daemon + * calls this routine after all DCB parameters are negotiated + * and pushed down to the driver. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBSettingsApplyCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkDCBSettingsGetCB -- */ /** + * + * \brief Handler used by vmkernel to retrieve all DCB settings from + * the device. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] dcb Used to store the DCB configurations of + * the device. + * + * \retval VMK_OK If operation succeeds. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDCBSettingsGetCB)(vmk_AddrCookie driverData, + vmk_DCBConfig *dcb); + + +typedef struct vmk_UplinkDCBOps { + + /** Handler used to check whether DCB is enabled on the deivce */ + vmk_UplinkDCBIsEnabledCB isDCBEnabled; + + /** Handler used to enable DCB support on the device */ + vmk_UplinkDCBEnableCB enableDCB; + + /** Handler used to disable DCB support on the device */ + vmk_UplinkDCBDisableCB disableDCB; + + /** + * Handler used to retrieve Traffic Classes information from the + * device + */ + vmk_UplinkDCBNumTCsGetCB getNumTCs; + + /** + * Handler used to retrieve Priority Group information from the + * device + */ + vmk_UplinkDCBPriorityGroupGetCB getPG; + + /** + * Handler used to push down Priority Group settings to the + * device + */ + vmk_UplinkDCBPriorityGroupSetCB setPG; + + /** + * Handler used to retrieve Priority-based Flow Control + * configurations from the device + */ + vmk_UplinkDCBPriorityFCGetCB getPFCCfg; + + /** + * Handler used to pushdown Priority-based Flow Control + * configurations to the device + */ + vmk_UplinkDCBPriorityFCSetCB setPFCCfg; + + /** + * Handler used to check whether Priority-based Flow Control support + * is enabled on the device + */ + vmk_UplinkDCBIsPriorityFCEnabledCB isPFCEnabled; + + /** + * Handler used to enable Priority-based Flow Control on the + * device + */ + vmk_UplinkDCBPriorityFCEnableCB enablePFC; + + /** + * Handler used to disable Priority-based Flow Control on the + * device + */ + vmk_UplinkDCBPriorityFCDisableCB disablePFC; + + /** + * Handler used to retrieve all DCB Application Protocols settings + * from the device + */ + vmk_UplinkDCBApplicationsGetCB getApps; + + /** + * Handler used to pushdown DCB Application Protocol settings to the + * device + */ + vmk_UplinkDCBApplicationsSetCB setApp; + + /** + * Handler used to retrieve DCB capabilities information from the + * device + */ + vmk_UplinkDCBCapabilitiesGetCB getCaps; + + /** + * Handler used to flush all pending DCB configuration changes to + * the device + */ + vmk_UplinkDCBSettingsApplyCB applySettings; + + /** Handler used to retrieve all DCB settings from the device */ + vmk_UplinkDCBSettingsGetCB getSettings; +} vmk_UplinkDCBOps; + + #endif /* _VMKAPI_NET_DCB_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dcb_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dcb_incompat.h new file mode 100644 index 0000000..7f73806 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dcb_incompat.h @@ -0,0 +1,242 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +#ifndef _VMKAPI_NET_DCB_INCOMPAT_H_ +#define _VMKAPI_NET_DCB_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/* + *********************************************************************** + * vmk_UplinkCapDCBIsEnabled -- */ /** + * + * \ingroup DCB + * \brief Indicates if uplink DCB capability is enabled. + * + * \param[in] uplink Uplink handle + * + * \retval VMK_TRUE if capability DCB is enabled + * \retval VMK_FALSE Otherwise + * + *********************************************************************** + */ +vmk_Bool vmk_UplinkCapDCBIsEnabled(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkCapDCBEnable -- */ /** + * + * \ingroup DCB + * \brief Enable DCB capability on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval VMK_OK Registration succeeded + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkCapDCBEnable(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkCapDCBDisable -- */ /** + * + * \ingroup DCB + * \brief Disable DCB capability on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval VMK_OK Registration succeeded + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkCapDCBDisable(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkDCBNumTCsGet -- */ /** + * + * \ingroup DCB + * \brief Get number of DCB traffic class on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval refer to the definition of enum vmk_DCBNumTCs + * + *********************************************************************** + */ +vmk_DCBNumTCs vmk_UplinkDCBNumTCsGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityGroupGet -- */ /** + * + * \ingroup DCB + * \brief Get DCB priority group on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval refer to the definition of enum vmk_DCBPriorityGroup + * + *********************************************************************** + */ +vmk_DCBPriorityGroup vmk_UplinkDCBPriorityGroupGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityGroupSet -- */ /** + * + * \ingroup DCB + * \brief Set DCB priority group on uplink. + * + * \param[in] uplink Uplink handle + * \param[in] prioGroup Priority group + * + * \retval VMK_OK Registration succeeded + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkDCBPriorityGroupSet(vmk_Uplink uplink, + vmk_DCBPriorityGroup *prioGroup); + + +/* + *********************************************************************** + * vmk_UplinkDCBIsPriorityFCEnabled -- */ /** + * + * \ingroup DCB + * \brief Indicates if DCB priority flow control is enabled on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval VMK_TRUE if uplink DCB is priority FC enabled + * \retval VMK_FALSE Otherwise + * + *********************************************************************** + */ +vmk_Bool vmk_UplinkDCBIsPriorityFCEnabled(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCEnable -- */ /** + * + * \ingroup DCB + * \brief Enable DCB priority flow control on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval VMK_OK Registration succeeded + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkDCBPriorityFCEnable(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCDisable -- */ /** + * + * \ingroup DCB + * \brief Disable DCB priority flow control on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval VMK_OK Registration succeeded + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkDCBPriorityFCDisable(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCGet -- */ /** + * + * \ingroup DCB + * \brief Get DCB priority flow control on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval refer to the definition of enum vmk_DCBPriorityFlowControlCfg + * + *********************************************************************** + */ +vmk_DCBPriorityFlowControlCfg vmk_UplinkDCBPriorityFCGet( + vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkDCBPriorityFCSet -- */ /** + * + * \ingroup DCB + * \brief Set DCB priority flow control on uplink. + * + * \param[in] uplink Uplink handle + * \param[in] prioFC priority FC + * + * \retval VMK_OK Registration succeeded + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkDCBPriorityFCSet(vmk_Uplink uplink, + vmk_DCBPriorityFlowControlCfg *prioFC); + + +/* + *********************************************************************** + * vmk_UplinkDCBApplicationsGet -- */ /** + * + * \ingroup DCB + * \brief Get DCB applications on uplink. + * + * \param[in] uplink Uplink handle + * + * \retval refer to the definition of enum vmk_DCBApplications + * + *********************************************************************** + */ +vmk_DCBApplications vmk_UplinkDCBApplicationsGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkDCBApplicationSet -- */ /** + * + * \ingroup DCB + * \brief Set DCB application on uplink. + * + * \param[in] uplink Uplink handle + * \param[in] appl DCB application + * + * \retval VMK_OK Registration succeeded + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkDCBApplicationSet(vmk_Uplink uplink, + vmk_DCBApplication *appl); + + +#endif /* _VMKAPI_NET_DCB_INCOMPAT_H_ */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dump.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dump.h new file mode 100644 index 0000000..4ddeb91 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_dump.h @@ -0,0 +1,149 @@ +/* ********************************************************** + * Copyright 2009 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * CoreDump */ /** + * \addtogroup Network + *@{ + * \defgroup Dump Dump + *@{ + * + * \par Dump: + * + * Network coredump API's to support the coredump feature. + * This includes interfaces such as receiving packets directly + * from the network in exception. + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_NETDUMP_H_ +#define _VMKAPI_NET_NETDUMP_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" + +/** + * \brief Structure containing Panic-time polling information of the device + * associated to an uplink. + */ + +typedef struct vmk_UplinkPanicInfo { + + /** Interrupt cookie */ + vmk_IntrCookie intrCookie; + + /** Polling data to be passed to the polling function */ + vmk_AddrCookie clientData; +} vmk_UplinkPanicInfo; + + +/* + *********************************************************************** + * vmk_UplinkNetDumpPanicTxCB -- */ /** + * + * \brief Handler used by vmkernel to send packets + * + * \note This handler is called when vmkernel is in panic state. For + * TX completion, driver must call asynchronous vmkapi + * vmk_PktListRelease() or vmk_PktRelease inside + * vmk_UplinkNetDumpPanicPollCB(). It should not call + * vmk_NetPollQueueCompPkt() or request other asynchronous task + * to perform the completion. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] pktList List of packets to transmit + * + * \retval VMK_OK If transmit succeed + * \retval Other If transmit failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkNetDumpPanicTxCB)(vmk_AddrCookie driverData, + vmk_PktList pktList); + +/* + *********************************************************************** + * vmk_UplinkNetDumpPanicPollCB -- */ /** + * + * \brief Handler used by vmkernel to poll for packets received by + * the device associated to an uplink. Might be ignored. + * + * \note This handler is called when vmkernel is in panic state. Driver + * should not call vmk_NetPollRxPktQueue to queue any RX packets. + * Instead, it must insert RX packets into pktList parameter + * and return to vmkernel. + * + * \note Driver must perform all TX completion in this callback by + * calling vmk_PktListRelease or vmk_PktRelease, since this + * callback is guaranteed to be called more frequently than + * vmk_UplinkNetDumpPanicTxCB. + * + * \param[in] clientData Points to the internal module structure + * returned by callback function + * vmk_UplinkNetDumpPanicInfoGetCB(). It can be + * different from the driver data specified in + * vmk_UplinkRegData during device registration. + * \param[out] pktList List of packets received + * + * \retval VMK_OK Always + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkNetDumpPanicPollCB)(vmk_AddrCookie clientData, + vmk_PktList pktList); + +/* + *********************************************************************** + * vmk_UplinkNetDumpPanicInfoGetCB -- */ /** + * + * \brief Handler used by vmkernel to get panic-time polling properties + * of a device associated to an uplink. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] panicInfo Panic-time polling properties of the device + * + * \retval VMK_OK If the information is properly stored + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkNetDumpPanicInfoGetCB)(vmk_AddrCookie driverData, + vmk_UplinkPanicInfo *panicInfo); + +typedef struct vmk_UplinkNetDumpOps { + /** + * callback to transmit packet + */ + vmk_UplinkNetDumpPanicTxCB panicTx; + + /** + * callback to dump panic poll + */ + vmk_UplinkNetDumpPanicPollCB panicPoll; + + /** + * callback to Fump panic info get + */ + vmk_UplinkNetDumpPanicInfoGetCB panicInfoGet; +} vmk_UplinkNetDumpOps; + +#endif /* _VMKAPI_NET_NETDUMP_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_netdebug.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_netdebug.h deleted file mode 100644 index 4509a2e..0000000 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_netdebug.h +++ /dev/null @@ -1,55 +0,0 @@ -/* ********************************************************** - * Copyright 2009 VMware, Inc. All rights reserved. - * **********************************************************/ - -/* - * @VMKAPIMOD_LICENSE@ - */ - -/* - *********************************************************************** - * Debug */ /** - * \addtogroup Network - *@{ - * \defgroup Debug Debug - *@{ - * - * \par Debug: - * - * Networking Debug API's to support debugging the vmkernel. - * This includes interfaces such as receiving packets directly - * from the network in exception. - * - *********************************************************************** - */ - -#ifndef _VMKAPI_NET_NETDEBUG_H_ -#define _VMKAPI_NET_NETDEBUG_H_ - -/** \cond never */ -#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H -#error This vmkapi file should never be included directly but only via vmkapi.h -#endif -/** \endcond never */ - -#include "net/vmkapi_net_types.h" - -/* - *********************************************************************** - * vmk_NetDebugRxProcess -- */ /** - * - * \brief Deliver Rx packets directly to the network netdebug handler. - * - * \param[in] pktList Set of packets to process. - * - * \retval VMK_OK If the network netdebug handles - * the packets successfully. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_NetDebugRxProcess(vmk_PktList pktList); - -#endif /* _VMKAPI_NET_NETDEBUG_H_ */ -/** @} */ -/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_netqueue.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_netqueue.h deleted file mode 100644 index 27afc00..0000000 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_netqueue.h +++ /dev/null @@ -1,787 +0,0 @@ -/* ********************************************************** - * Copyright 2006 - 2009 VMware, Inc. All rights reserved. - * **********************************************************/ - -/* - * @VMKAPIMOD_LICENSE@ - */ - -/* - *********************************************************************** - * Netqueue */ /** - * \addtogroup Network - *@{ - * \defgroup Netqueue Netqueue - *@{ - * - *********************************************************************** - */ - -#ifndef _VMKAPI_NET_NETQUEUE_H_ -#define _VMKAPI_NET_NETQUEUE_H_ - -/** \cond never */ -#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H -#error This vmkapi file should never be included directly but only via vmkapi.h -#endif -/** \endcond never */ - -#include "net/vmkapi_net_types.h" -#include "net/vmkapi_net_poll.h" -#include "net/vmkapi_net_pkt.h" - -/** Major version of netqueue api */ -#define VMK_NETQUEUE_OPS_MAJOR_VER (2) - -/** Minor version of netqueue api */ -#define VMK_NETQUEUE_OPS_MINOR_VER (0) - -/** - * \brief Netqueue queue ID - */ -typedef vmk_uint64 vmk_NetqueueQueueID; - -/** Well known Netqueue queue ID values */ -enum { - /** Default queue ID */ - VMK_NETQUEUE_DEFAULT_QUEUEID = (vmk_NetqueueQueueID)0, - - /** Invalid queue ID */ - VMK_NETQUEUE_INVALID_QUEUEID = (vmk_NetqueueQueueID)~0, -}; - -/** - * \brief Netqueue filter ID - */ -typedef vmk_uint32 vmk_NetqueueFilterID; - -/** Well known Netqueue filter ID values */ -enum { - /** Invalid filter ID */ - VMK_NETQUEUE_INVALID_FILTERID = (vmk_NetqueueFilterID)~0, -}; - -/** Netqueue priority */ -typedef vmk_VlanPriority vmk_NetqueuePriority; - -/** Netqueue features supported */ -typedef enum { - - /** No features supported */ - VMK_NETQUEUE_FEATURE_NONE = 0x0, - - /** Rx queues features supported */ - VMK_NETQUEUE_FEATURE_RXQUEUES = 0x1, - - /** Tx queues features supported */ - VMK_NETQUEUE_FEATURE_TXQUEUES = 0x2, -} vmk_NetqueueFeatures; - -/** - * \ingroup Netqueue - * \brief Netqueue operations - */ -typedef enum { - - /** - * \brief None - */ - VMK_NETQUEUE_OP_NONE = 0x0, - - /** - * \brief Get version - * Get the device's netqueue version. - */ - VMK_NETQUEUE_OP_GET_VERSION = 0x1, - - /** - * \brief Get features - * Get the device's netqueue features. - */ - VMK_NETQUEUE_OP_GET_FEATURES = 0x2, - - /** - * \brief Get queue count - * Get the number of Rx/Tx queues supported on a device. - */ - VMK_NETQUEUE_OP_QUEUE_COUNT = 0x3, - - /** - * \brief Get filter count - * Get the number of filters supported per queue. - */ - VMK_NETQUEUE_OP_FILTER_COUNT = 0x4, - - /** - * \brief Allocate a queue - * Allocate a queue of a specific type. - */ - VMK_NETQUEUE_OP_ALLOC_QUEUE = 0x5, - - /** - * \brief Release a queue - * Release an allocated queue. - */ - VMK_NETQUEUE_OP_FREE_QUEUE = 0x6, - - /** - * \brief Get queue vector - * Get the queue vector associated to a queue. - */ - VMK_NETQUEUE_OP_GET_QUEUE_VECTOR = 0x7, - - /** - * \brief Get default queue - * Get the Rx/Tx default queue. - */ - VMK_NETQUEUE_OP_GET_DEFAULT_QUEUE = 0x8, - - /** - * \brief Apply rx filter - * Apply a filter to a Rx queue. - */ - VMK_NETQUEUE_OP_APPLY_RX_FILTER = 0x9, - - /** - * \brief Remove rx filter - * Remove a filter from a Rx queue. - */ - VMK_NETQUEUE_OP_REMOVE_RX_FILTER = 0xa, - - /** - * \brief Get queue stats - * Get stats on a particular queue. - */ - VMK_NETQUEUE_OP_GET_QUEUE_STATS = 0xb, - - /** - * \brief Set Tx priority - * Set a priority on a particular Tx queue. - */ - VMK_NETQUEUE_OP_SET_TX_PRIORITY = 0xc, - - /** - * \brief Get/Set queue state - * Get and Set the state of netqueue on a particular device. - * Changing the mtu on a device puts netqueue in an invalid state - * in which the Rx filters are removed. Such state needs to - * be notified in order to restore the configuration before invalidation. - */ - VMK_NETQUEUE_OP_GETSET_QUEUE_STATE = 0xd, - - /** - * \brief Set queue vector - * Set the queue vector associated to a queue. - */ - VMK_NETQUEUE_OP_SET_QUEUE_VECTOR = 0xe, - - /** - * \brief Allocate a queue with attributes - * Allocate a queue of a specific type with attributes. - */ - VMK_NETQUEUE_OP_ALLOC_QUEUE_WITH_ATTR = 0xf, - - /** - * \brief Enable queue's feature - * Enable a feature on a given queue. - */ - VMK_NETQUEUE_OP_ENABLE_QUEUE_FEAT = 0x10, - - /** - * \brief Disable queue's feature - * Disable a feature on a given queue. - */ - VMK_NETQUEUE_OP_DISABLE_QUEUE_FEAT = 0x11, - - /** - * \brief Get queue's features - * Get the supported queues' features of a device. - */ - VMK_NETQUEUE_OP_GET_QUEUE_SUPPORTED_FEAT = 0x12, - - /** - * \brief Get queue filter required class - * Get the supported queue's filter class - */ - VMK_NETQUEUE_OP_GET_QUEUE_SUPPORTED_FILTER_CLASS = 0x13, -} vmk_NetqueueOp; - -/** - * \ingroup Netqueue - * \brief Filter class - */ -typedef enum vmk_NetqueueFilterClass { - - /** Invalid filter */ - VMK_NETQUEUE_FILTER_NONE = 0x0, - - /** Mac address filter */ - VMK_NETQUEUE_FILTER_MACADDR = 0x1, - - /** Vlan tag filter */ - VMK_NETQUEUE_FILTER_VLAN = 0x2, - - /** Vlan tag + mac addr filter */ - VMK_NETQUEUE_FILTER_VLANMACADDR = 0x4, -} vmk_NetqueueFilterClass; - -/** - * \ingroup Netqueue - * \brief Queue type - */ -typedef enum { - - /** Invalid queue type */ - VMK_NETQUEUE_QUEUE_TYPE_INVALID = 0, - - /** Rx queue type */ - VMK_NETQUEUE_QUEUE_TYPE_RX = 1, - - /** Tx queue type */ - VMK_NETQUEUE_QUEUE_TYPE_TX = 2, - - /** Default Rx queue type */ - VMK_NETQUEUE_QUEUE_TYPE_DEFAULTRXQUEUE = 3, - - /** Default Tx queue type */ - VMK_NETQUEUE_QUEUE_TYPE_DEFAULTTXQUEUE = 4, -} vmk_NetqueueQueueType; - -/** - * \ingroup Netqueue - * \brief Filter type - */ -typedef enum vmk_NetqueueFilterType { - - /** Invalid filter type */ - VMK_NETQUEUE_FILTER_TYPE_INVALID = 0, - - /** Rx/Tx filter type */ - VMK_NETQUEUE_FILTER_TYPE_TXRX = 1, -} vmk_NetqueueFilterType; - -/** - * \ingroup Netqueue - * \brief Filter definition - */ -typedef struct vmk_NetqueueFilter { - - /** Filter class */ - vmk_NetqueueFilterClass class; - union { - - /** Filter class mac only */ - vmk_uint8 macaddr[6]; - - /** Filter class vlan tag only */ - vmk_uint16 vlan_id; - - /** Filter class vlan tag + mac */ - struct { - vmk_uint8 macaddr[6]; - vmk_uint16 vlan_id; - } vlanmac; - } u; -} vmk_NetqueueFilter; - -/** - * \ingroup Netqueue - * \brief Filter properties - */ -typedef enum vmk_NetqueueFilterProperties { - - /** None */ - VMK_NETQUEUE_FILTER_PROP_NONE = 0x0, - - /** Management filter */ - VMK_NETQUEUE_FILTER_PROP_MGMT = 0x1, -} vmk_NetqueueFilterProperties; - -/** - * \ingroup Netqueue - * \brief Features supported on queues - */ -typedef enum vmk_NetqueueQueueFeatures { - - /** None */ - VMK_NETQUEUE_QUEUE_FEAT_NONE = 0x0, - - /** LRO feature */ - VMK_NETQUEUE_QUEUE_FEAT_LRO = 0x1, - - /** Paired queue feature */ - VMK_NETQUEUE_QUEUE_FEAT_PAIR = 0x2, - - /** RSS queues feature */ - VMK_NETQUEUE_QUEUE_FEAT_RSS = 0x4, -} vmk_NetqueueQueueFeatures; - -/** - * \ingroup Netqueue - * \brief Netqueue queue attribute type - */ -typedef enum vmk_NetqueueQueueAttrType { - - /** Priority attribute */ - VMK_NETQUEUE_QUEUE_ATTR_PRIOR, - - /** Features attribute */ - VMK_NETQUEUE_QUEUE_ATTR_FEAT, - - /** Number of attributes */ - VMK_NETQUEUE_QUEUE_ATTR_NUM, -} vmk_NetqueueQueueAttrType; - -/** - * \ingroup Netqueue - * \brief Netqueue queue attribute - */ -typedef struct vmk_NetqueueQueueAttr { - - vmk_NetqueueQueueAttrType type; - - union { - - /** VMK_NETQUEUE_QUEUE_ATTR_PRIOR argument */ - vmk_VlanPriority priority; - - /** VMK_NETQUEUE_QUEUE_ATTR_FEAT argument */ - vmk_NetqueueQueueFeatures features; - - /** Generic attribute argument */ - void *p; - } args; -} vmk_NetqueueQueueAttr; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_GET_VERSION - */ -typedef struct vmk_NetqueueOpGetVersionArgs { - - /** Minor version [out] */ - vmk_uint16 minor; - - /** Major version [out] */ - vmk_uint16 major; -} vmk_NetqueueOpGetVersionArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_GET_FEATURES - */ -typedef struct vmk_NetqueueOpGetFeaturesArgs { - - /** Supported features [out] */ - vmk_NetqueueFeatures features; -} vmk_NetqueueOpGetFeaturesArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_QUEUE_COUNT - */ -typedef struct vmk_NetqueueOpGetQueueCountArgs { - - /** Queue type aimed [in] */ - vmk_NetqueueQueueType qtype; - - /** Number of queue of this type [out] */ - vmk_uint16 count; -} vmk_NetqueueOpGetQueueCountArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_FILTER_COUNT - */ -typedef struct vmk_NetqueueOpGetFilterCountArgs { - - /** Queue type aimed [in] */ - vmk_NetqueueQueueType qtype; - - /** Number of filters per queue of this type [out] */ - vmk_uint16 count; -} vmk_NetqueueOpGetFilterCountArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_ALLOC_QUEUE - */ -typedef struct vmk_NetqueueOpAllocQueueArgs { - - /** Queue type aimed [in] */ - vmk_NetqueueQueueType qtype; - - /** Queue ID of the allocated queue [out] */ - vmk_NetqueueQueueID qid; - - /** Net poll on top of the allocated queue if any [out] */ - vmk_NetPoll net_poll; -} vmk_NetqueueOpAllocQueueArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_FREE_QUEUE - */ -typedef struct vmk_NetqueueOpFreeQueueArgs { - - /** Queue to release [in] */ - vmk_NetqueueQueueID qid; -} vmk_NetqueueOpFreeQueueArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_GET_QUEUE_VECTOR - */ -typedef struct vmk_NetqueueOpGetQueueVectorArgs { - - /** Queue aimed [in] */ - vmk_NetqueueQueueID qid; - - /** Interrupt vector associated to the queue [out] */ - vmk_uint16 vector; -} vmk_NetqueueOpGetQueueVectorArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_GET_DEFAULT_QUEUE - */ -typedef struct vmk_NetqueueOpGetDefaultQueueArgs { - - /** Default queue type VMK_NETQUEUE_QUEUE_TYPE_[RX|TX] [in] */ - vmk_NetqueueQueueType qtype; - - /** Queue ID of the default queue [out] */ - vmk_NetqueueQueueID qid; - - /** Net poll on top of the default queue if any [out] */ - vmk_NetPoll net_poll; -} vmk_NetqueueOpGetDefaultQueueArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_APPLY_RX_FILTER - */ -typedef struct vmk_NetqueueOpApplyRxFilterArgs { - - /** Queue aimed [in] */ - vmk_NetqueueQueueID qid; - - /** Filter to be applied [in] */ - vmk_NetqueueFilter filter; - - /** Filter ID [out] */ - vmk_NetqueueFilterID fid; - - /** Potential Paired tx queue hardware index [out] */ - vmk_uint16 pairhwqid; -} vmk_NetqueueOpApplyRxFilterArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_REMOVE_RX_FILTER - */ -typedef struct vmk_NetqueueOpRemoveRxFilterArgs { - - /** Queue aimed [in] */ - vmk_NetqueueQueueID qid; - - /** Filter to be removed [in] */ - vmk_NetqueueFilterID fid; -} vmk_NetqueueOpRemoveRxFilterArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_GET_QUEUE_STATS - */ -typedef struct vmk_NetqueueOpGetQueueStatsArgs { - - /** Queue aimed [in] */ - vmk_NetqueueQueueID qid; -} vmk_NetqueueOpGetQueueStatsArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_SET_TX_PRIORITY - */ -typedef struct vmk_NetqueueOpSetTxPriorityArgs { - - /** Queue aimed [in] */ - vmk_NetqueueQueueID qid; - - /** Priority to set on the queue [in] */ - vmk_VlanPriority priority; -} vmk_NetqueueOpSetTxPriorityArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_GETSET_QUEUE_STATE - */ -typedef struct vmk_NetqueueOpGetSetQueueStateArgs { - - /** Netqueue old state (TRUE: Netqueue was in valid state, FALSE: otherwise) [out] */ - vmk_Bool oldState; - - /** Netqueue new state (TRUE: Netqueue set to valid state, FALSE: otherwise) [in] */ - vmk_Bool newState; -} vmk_NetqueueOpGetSetQueueStateArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_SET_QUEUE_VECTOR - */ -typedef struct vmk_NetqueueOpSetQueueVectorArgs { - - /** Queue aimed [in] */ - vmk_NetqueueQueueID qid; - - /** Vector to be set [in] */ - vmk_uint16 vector; -} vmk_NetqueueOpSetQueueVectorArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_ALLOC_QUEUE_WITH_ATTR - */ -typedef struct vmk_NetqueueOpAllocQueueWithAttrArgs { - - /** Queue type aimed [in] */ - vmk_NetqueueQueueType qtype; - - /** Number of attributes (Cannot be greater than VMK_NETQUEUE_QUEUE_ATTR_NUM) [in] */ - vmk_uint16 nattr; - - /** Queue attributes [in] */ - vmk_NetqueueQueueAttr *attr; - - /** Queue ID of the allocated queue [out] */ - vmk_NetqueueQueueID qid; - - /** Net poll on top of the allocated queue if any [out] */ - vmk_NetPoll net_poll; -} vmk_NetqueueOpAllocQueueWithAttrArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_ENABLE_QUEUE_FEAT - */ -typedef struct vmk_NetqueueOpEnableQueueFeatArgs { - - /** Queue aimed [in] */ - vmk_NetqueueQueueID qid; - - /** Features to be enabled [in] */ - vmk_NetqueueQueueFeatures features; -} vmk_NetqueueOpEnableQueueFeatArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_DISABLE_QUEUE_FEAT - */ -typedef struct vmk_NetqueueOpDisableQueueFeatArgs { - - /** Queue aimed [in] */ - vmk_NetqueueQueueID qid; - - /** Features to be disabled [in] */ - vmk_NetqueueQueueFeatures features; -} vmk_NetqueueOpDisableQueueFeatArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_GET_QUEUE_SUPPORTED_FEAT - */ -typedef struct vmk_NetqueueOpGetQueueSupFeatArgs { - - /** Queue type aimed [in] */ - vmk_NetqueueQueueType qtype; - - /** Features supported [out] */ - vmk_NetqueueQueueFeatures features; -} vmk_NetqueueOpGetQueueSupFeatArgs; - -/** - * \ingroup Netqueue - * \brief Arguments to VMK_NETQUEUE_OP_GET_FILTER_CLASS - */ -typedef struct vmk_NetqueueOpGetQueueSupFilterArgs { - - /** Queue type aimed [in] */ - vmk_NetqueueQueueType qtype; - - /** Filter class required [out] */ - vmk_NetqueueFilterClass class; -} vmk_NetqueueOpGetQueueSupFilterArgs; - -/* - *********************************************************************** - * vmk_NetqueueSetQueueIDUserVal -- */ /** - * - * \ingroup Netqueue - * \brief Set user's private value for queue ID. - * - * \param[in] qid Queue ID. - * \param[in] userval User value. - * - * \retval VMK_OK Always. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_NetqueueSetQueueIDUserVal(vmk_NetqueueQueueID *qid, - vmk_uint32 userval); - -/* - *********************************************************************** - * vmk_NetqueueQueueIDUserVal -- */ /** - * - * \ingroup Netqueue - * \brief Get user part of queue ID - * - * \param[in] qid Queue ID. - * - * \retval vmk_uint32 User value. - * - *********************************************************************** - */ - -vmk_uint32 vmk_NetqueueQueueIDUserVal(vmk_NetqueueQueueID qid); - -/* - *********************************************************************** - * vmk_NetqueueMkTxQueueID -- */ /** - * - * \ingroup Netqueue - * \brief Create a Tx queue ID. - * - * \param[in] val The embedded value of the queue ID. - * \param[out] qid The created queue ID. - * - * \retval VMK_OK Always. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_NetqueueMkTxQueueID(vmk_NetqueueQueueID *qid, - vmk_uint32 val); - -/* - *********************************************************************** - * vmk_NetqueueMkRxQueueID -- */ /** - * - * \ingroup Netqueue - * \brief Create a Rx queue ID. - * - * \param[in] val The embedded value of the queue ID. - * \param[out] qid The created queue ID. - * - * \retval VMK_OK Always. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_NetqueueMkRxQueueID(vmk_NetqueueQueueID *qid, - vmk_uint32 val); - -/* - *********************************************************************** - * vmk_NetqueueQueueIDVal -- */ /** - * - * \ingroup Netqueue - * \brief Retrieve the embedded value of a queue ID. - * - * \param[in] qid The aimed queue ID. - * - * \return The embedded value. - * - *********************************************************************** - */ - -vmk_uint32 vmk_NetqueueQueueIDVal(vmk_NetqueueQueueID qid); - -/* - *********************************************************************** - * vmk_NetqueueQueueIDType -- */ /** - * - * \ingroup Netqueue - * \brief Retrieve the type of a queue ID. - * - * \param[in] qid The aimed queue ID. - * - * \return The type. - * - *********************************************************************** - */ - -vmk_NetqueueQueueType vmk_NetqueueQueueIDType(vmk_NetqueueQueueID qid); - -/* - *********************************************************************** - * vmk_NetqueueMkFilterID -- */ /** - * - * \ingroup Netqueue - * \brief Create a filter ID. - * - * \param[in] val The embedded value of the filter ID. - * \param[out] fid The created filter. - * - * \retval VMK_OK Always. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_NetqueueMkFilterID(vmk_NetqueueFilterID *fid, - vmk_uint16 val); - -/* - *********************************************************************** - * vmk_NetqueueFilterIDVal -- */ /** - * - * \ingroup Netqueue - * \brief Retrieve the embedded value of a filter ID. - * - * \param[in] fid The aimed filter ID. - * - * \return The embedded value. - * - *********************************************************************** - */ - -vmk_uint16 vmk_NetqueueFilterIDVal(vmk_NetqueueFilterID fid); - -/* - *********************************************************************** - * vmk_PktQueueIDGet -- */ /** - * - * \ingroup Netqueue - * \brief Retrieve netqueue queue ID of a specified packet. - * - * \param[in] pkt Packet of interest - * - * \return Netqueue queue ID. - * - *********************************************************************** - */ -extern -vmk_NetqueueQueueID vmk_PktQueueIDGet(vmk_PktHandle *pkt); - -/* - *********************************************************************** - * vmk_PktQueueIDSet -- */ /** - * - * \ingroup Netqueue - * \brief Set netqueue queue ID of a specified packet. - * - * \param[in] pkt Packet of interest - * \param[in] qid Packet queue ID - * - * \retval VMK_OK - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_PktQueueIDSet(vmk_PktHandle *pkt, vmk_NetqueueQueueID qid); - - -#endif /* _VMKAPI_NET_NETQUEUE_H_ */ -/** @} */ -/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_opaque_network_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_opaque_network_incompat.h new file mode 100644 index 0000000..9f44f94 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_opaque_network_incompat.h @@ -0,0 +1,233 @@ + +/* ********************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * OpaqueNetwork + * \addtogroup Network + * @{ + * \defgroup OpaqueNetwork Opaque Network Interface + * + * Opaque Network is used in the network virtualization where network + * controller defines a logical network which is transparent to the host + * network stack. The opaque network type and id are used to identify a + * opaque network. External module will register its supported opaque + * network type, while vNIC will be provisioned with opaque network id + * and type. The core network stack will use these information to query + * for the proper portset that the vNIC should be connected to. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_OPAQUENETWORK_INCOMPAT_H_ +#define _VMKAPI_NET_OPAQUENETWORK_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" + +/** + * \brief Maximum length of opaque network ID. + */ +#define VMK_MAX_OPAQUE_NETWORK_ID_LEN 128 + +/** + * \brief Maximum length of opaque network type. + */ + +#define VMK_MAX_OPAQUE_NETWORK_TYPE_LEN 128 + + +/** + * \brief Opaque network type string. + */ + +typedef char vmk_OpaqueNetworkType[VMK_MAX_OPAQUE_NETWORK_TYPE_LEN]; + +/** + * \brief Opaque network ID string. + */ + +typedef char vmk_OpaqueNetworkId[VMK_MAX_OPAQUE_NETWORK_ID_LEN]; + +/** + * \brief Opaque network information + * + * This structure includes both opaque network ID and network type. + */ + +typedef struct vmk_OpaqueNetworkInfo { + /** opaque network id **/ + vmk_OpaqueNetworkId id; + + /**opaque network type **/ + vmk_OpaqueNetworkType type; +} vmk_OpaqueNetworkInfo; + + +/* + *********************************************************************** + * vmk_PortGetOpaqueNetworkInfo -- */ /** + * + * \brief Get opaque network information the port is connected to. + * + * + * \note The caller must hold a handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \param[in] portID Port identifier + * \param[out] opi will contain oqaque network information + * when return VMK_OK. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM opi is NULL or the port is not connected + * to an opaque network. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PortGetOpaqueNetworkInfo(vmk_SwitchPortID portID, + vmk_OpaqueNetworkInfo *opi); + + +/* + *********************************************************************** + * vmk_OpaqueNetworkGetPortsetNameCB -- */ /** + * + * \brief Get portset name based on oqaque network name and type. + * + * Network stack use this API to query external module for the portset + * name based on network ID and type for port connection. + * + * + * \param[in] networkId opaque network Id to be connected + * to by a port client. + * \param[in] networkType opaque network type to be connected + * to by a port client. + * \param[out] psName the portset name to be filled + * \param[in] psNameLength psName buffer length. + * + * \retval VMK_BAD_PARAM For invalid input parameters. + * \retval VMK_NOT_FOUND No portset created with the named type. + * \retval VMK_OK Successfully get the portset name. + * + *********************************************************************** + */ + +typedef VMK_ReturnStatus +(*vmk_OpaqueNetworkGetPortsetNameCB)(vmk_OpaqueNetworkId networkId, + vmk_OpaqueNetworkType networkType, + char *psName, + vmk_uint32 psNameLength); + +/* + *********************************************************************** + * vmk_OpaqueNetworkTypeRegister -- */ /** + * + * \brief Register a network type by an external module. + * + * External module uses this API to register its supported network type. + * + * An external module can register opaque network type it supports so that + * the port clients including vNIC, VMKNIC and Uplink can connect to the + * network by query the relevant portset name. One portset can support any + * number of opaque network type depending on the externam module. If there + * are multiple instance of portsets which support same network type, the + * network ID can be used to determine the portset instance. + * + * \note Only one moudle can register for a specific network type in the + * system. + * + * \param[in] networkType networkType to be registered + * \param[in] getPsName callback used to get portset name + * when connecting to a portset using + * opaque networ name and type. + * + * \retval VMK_BAD_PARAM psName or getPsName is NULL + * \retval VMK_EXISTS the named network type is already + * registered. + * \retval VMK_OK Successfully registered the network type + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_OpaqueNetworkTypeRegister( + vmk_OpaqueNetworkType networkType, + vmk_OpaqueNetworkGetPortsetNameCB getPsName); + + +/* + *********************************************************************** + * vmk_OpaqueNetworkTypeUnregister -- */ /** + * + * \brief Unregister a network type by an external module. + * + * External module uses this API to unregister its supported network + * type. + * + * \note During an external module unload, it must unregister its + * supported network type. + * + * \param[in] networkType networkType to be registered + * + * \retval VMK_BAD_PARAM networkType is NULL. + * \retval VMK_NOT_FOUND the relevant network type is not + * registered. + * \retval VMK_OK Successfully unregister the network type + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_OpaqueNetworkTypeUnregister( + vmk_OpaqueNetworkType networkType); + + +/* + *********************************************************************** + * vmk_PortsetSetOpaquePortset -- */ /** + * + * \brief Set a portset as Opaque portset. + * + * External module can use this API to set the portset to be opaque so + * that the corresponding virtual switch will be transparent to VC. + * + * \note External module should set the portset as opaque during portset + * activation callback. + * + * \note When a portset is marked as opaque portset, a vNIC can only be + * connected through opaque network backing. + * + * \note The caller must hold a mutable portset handle directly or + * indirectly (for example, when called in portset activation). + * + * \param[in] ps Handle to a portset. + * \param[in] isOpaque Whether the portset is opaqueu or not + * + * \retval VMK_OK Successfully set the portset to be opaque. + * \retval VMK_BAD_PARAM Portset handle is invalid. + * \retval VMK_PORTSET_HANDLE_NOT_MUTABLE Not hold mutable portset handle. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetSetOpaquePortset(vmk_Portset *ps, + vmk_Bool isOpaque); + +#endif /* _VMKAPI_NET_OPAQUENETWORK_INCOMPAT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt.h index d98cfca..906aa01 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2006 - 2009 VMware, Inc. All rights reserved. + * Copyright 2006 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -30,12 +30,11 @@ * - Mapped Area: *\n * In order to access packet data, the buffer containing it needs to - * be mapped in virtual memory. In vmkernel, only a leading portion - * of the first fragment of the packet is guaranteed to be mapped in - * virtual memory. The mapped area of a frame (returned via - * vmk_PktFrameMappedPointerGet() with length of - * vmk_PktFrameMappedLenGet()) starts from the beginning of the - * first fragment.\n + * be mapped in virtual memory. In vmkernel, the first fragment of + * the packet is guaranteed to be mapped in virtual memory. The mapped + * area of a frame (returned via vmk_PktFrameMappedPointerGet() with + * length of vmk_PktFrameMappedLenGet()) starts from the beginning of + * the first fragment.\n *\n * The mapped area may also be larger than the frame * length, which is often the case for Rx processing since pNIC's @@ -60,10 +59,9 @@ * \endcode *\n *\n - * For TSO the mapped area must comtain the complete inet headers. - * vmk_PktInetFrameLayoutGetInetHeaderLength() - * may be valuable in computing the complete length to determine - * when a partial copy may be necessary.\n + * For TSO the mapped area must contain the complete inet headers. + * vmk_PktHeader* functions may be valuable in computing the complete + * length to determine when a partial copy may be necessary.\n *\n * Care ought to be taken when packet data ouside the mapped area * is accessed. as guests are free to modify memory regions @@ -78,7 +76,7 @@ * The padding space available in front of the frame contents. * Packets allocated with vmk_PktAlloc() may not have any headroom * space. Headroom space can be adjusted using vmk_PktPushHeadroom(), - * vmk_PktPullHeadroom() or vmk_PktAdjust(). + * or vmk_PktPullHeadroom(). * These API's redefine the bytes in the beginning of the frame * to become the headroom. If it is desired to keep all the frame * data and allocate new headroom in front of them then API's such as @@ -167,7 +165,13 @@ #include "net/vmkapi_net_types.h" -/** Maximum number of fragments a packet can contain */ +/** + * Maximum number of fragments a packet can contain + * + * \deprecated This definition will be removed in a future release. Use + * vmk_PktSgArrayGet() to query the number of fragments in a + * given vmk_PktHandle. + */ #define VMK_PKT_FRAGS_MAX_LENGTH 24 /** Packet handle representation */ @@ -178,6 +182,9 @@ typedef struct PktHandle vmk_PktHandle; * \struct vmk_PktFrag * \brief Structure representing a buffer fragment that is part of a packet. * + * \deprecated This definition will be removed in a future release in favor + * of vmk_SgElem. + * * This structure is used for returning fragment information via vmk_PktFragGet(). */ typedef struct { @@ -325,7 +332,8 @@ VMK_ReturnStatus vmk_PktAllocWithFlags(vmk_ByteCountSmall len, * management API does NOT provide a compatible function to * register such a handler. * - * \pre This function should only be called from a non-IRQ context. + * \pre This function should not be called when system is in panic. + * This function should only be called from a non-IRQ context. * For freeing packets from an interrupt context use * vmk_PktReleaseIRQ(). * @@ -336,6 +344,77 @@ VMK_ReturnStatus vmk_PktAllocWithFlags(vmk_ByteCountSmall len, void vmk_PktRelease(vmk_PktHandle *pkt); +/* + *********************************************************************** + * vmk_PktReleasePanic -- */ /** + * + * \ingroup Pkt + * \brief Release all resources of a given vmk_PktHandle. + * + * This function cleans up all resources that are referred to by the + * given vmk_PktHandle, which includes memory for the vmk_PktHandle + * as well as the original buffer fragment allocated by vmk_PktAlloc(). + * This function can and should only be called in Panic, hence it skips + * all the completion steps. The caller can check if System is in Panic + * using vmk_SystemCheckState() function. + * + * \param[in] pkt Packet to be released. + * + *********************************************************************** + */ +void vmk_PktReleasePanic(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktAllocForDMAEngine -- */ /** + * + * \ingroup Pkt + * \brief Allocate a vmk_PktHandle containing a single buffer fragment + * satisfying the given DMA constraints + * + * Please refer to vmk_PktAlloc() documentation for properties of the + * allocated packet. + * + * \param[in] len Minimum size of the buffer allocated for + * the new packet. + * \param[in] dmaEngine The DMA Engine for which the packet is + * allocated for + * \param[out] pkt Pointer to the allocated vmk_PktHandle. + * + * \retval VMK_OK Allocation succeeded. + * \retval VMK_BAD_PARAM Invalid uplink parameter. + * \retval VMK_NO_MEMORY Not enough memory to satisfy the + * allocation request or an unspecified + * error has occured. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktAllocForDMAEngine(vmk_ByteCountSmall len, + vmk_DMAEngine dmaEngine, + vmk_PktHandle **pkt); + + +/* + *********************************************************************** + * vmk_PktReleaseIRQ -- */ /** + * + * \ingroup Pkt + * \brief Release all resources of a given vmk_PktHandle from an + * interrupt context. + * + * This function should be called instead of vmk_PktRelease() when + * releasing packets from an interrupt context. Please refer to + * vmk_PktRelease() documentation for more information on releasing + * packets. + * + * \param[in] pkt Packet to be released. + * + *********************************************************************** + */ + +void vmk_PktReleaseIRQ(vmk_PktHandle *pkt); + /* *********************************************************************** * vmk_PktIsBufDescWritable -- */ /** @@ -427,6 +506,9 @@ VMK_ReturnStatus vmk_PktFrameLenSet(vmk_PktHandle *pkt, * \note A vmk_PktHandle can have at most #VMK_PKT_FRAGS_MAX_LENGTH * fragments. * + * \deprecated This function will be removed in a future release. See + * vmk_PktSgElemGet() as a replacement. + * * \param[in] pkt Target packet. * \param[out] frag Structure for returning fragment information * \param[in] entry Index of the queried fragment. The first @@ -451,6 +533,9 @@ VMK_ReturnStatus vmk_PktFragGet(vmk_PktHandle *pkt, * \brief Return the number of fragments attached to the given * vmk_PktHandle. * + * \deprecated This function will be removed in a future release. See + * vmk_PktSgArrayGet() as a replacement. + * * \param[in] pkt Target packet. * * \return Number of fragments. @@ -1012,6 +1097,56 @@ vmk_uint32 vmk_PktGetLargeTcpPacketMss(vmk_PktHandle *pkt); VMK_ReturnStatus vmk_PktClearLargeTcpPacket(const vmk_PktHandle *pkt); +/* + *********************************************************************** + * vmk_PktSetEncapsulatedFrame -- */ /** + * + * \ingroup Pkt + * \brief Set the encapsulation flag to indicate that the packet has + * an encapsulated frame. + * + * \param[in] pkt handle to set encapsulation flag on. + * + * \retval VMK_OK The encapsulation flag is set. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktSetEncapsulatedFrame(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktClearEncapsulatedFrame -- */ /** + * + * \ingroup Pkt + * \brief Clear the encapsulation flag from the given packet. + * + * \param[in] pkt handle to clear encapsulation flag on. + * + * \retval VMK_OK The encapsulation flag is cleared. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktClearEncapsulatedFrame(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktIsEncapsulatedFrame -- */ /** + * + * \ingroup Pkt + * \brief Check if the pkt has the encapsulation flag set. + * + * \param[in] pkt handle to check the encapsulation flag on. + * + * \retval VMK_TRUE Pkt has an encapsulated frame. + * \retval VMK_FALSE Pkt does not have an encapsulated frame. + * + *********************************************************************** + */ + +vmk_Bool vmk_PktIsEncapsulatedFrame(const vmk_PktHandle *pkt); + /* *********************************************************************** * vmk_PktCopyMetaData -- */ /** @@ -1092,6 +1227,8 @@ VMK_ReturnStatus vmk_PktAttrRegister(vmk_PktAttrProperties *properties, * system is actively using the attribute being deregistered before calling * into this function. * + * \note This function may block. + * * \param[in] regHandle Handle obtained from vmk_PktAttrRegister(). * * \retval VMK_OK Attribute successfully deregistered. @@ -1729,6 +1866,271 @@ VMK_ReturnStatus vmk_PktCopyBytesOut(vmk_uint8 *buffer, vmk_ByteCount length, vmk_uint32 offset, vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktAllocPage -- */ /** + * + * \ingroup Pkt + * \brief Allocate one page from the packet page pool. + * + * \note One page is allocated from the packet page pool according to the + * constraints. + * + * \param[in] mem Memory is allocated according to the + * constriants specified + * \param[out] page MPN of the allocated page + * + * \retval VMK_OK Allocation successful. + * \retval VMK_BAD_PARAM If Page is NULL. + * \retval VMK_NO_MEMORY Not enough memory in the page pool + * to satisfy the request. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktAllocPage(vmk_MemPhysAddrConstraint mem, + vmk_MPN *page); + +/* + *********************************************************************** + * vmk_PktFreePage -- */ /** + * + * \ingroup Pkt + * \brief Free one page allocated from the packet page pool + * back to it. + * + * \note The page must have been originally allocated through + * vmk_PktAllocPage() and not any other page allocation mechanism. The + * memory constraint must be same as the memory constraint used for the + * allocation. + * + * \param[in] mem Memory constraint used to allocate the page + * \param[in] page page that is being freed. + * + *********************************************************************** + */ +void vmk_PktFreePage(vmk_MemPhysAddrConstraint mem, + vmk_MPN page); + +/* + *********************************************************************** + * vmk_PktPageAppend -- */ /** + * + * \ingroup Pkt + * \brief Append a page to a packet + * + * This function appends a page to the packet at pktOffset + * + * If the pktOffset falls in the middle of an existing SG entry then + * that SG entry is truncated to the offset provided. Also if there are + * SG entries after this SG entry they are deleted and the pages are + * freed. The deleted SG entries should not be acessed after a call to + * this API. + * + * If the pktOffset corresponds to offset 0 of first SG entry then that + * SG entry is truncated to 0 length and the page is added at second SG + * entry. + * + * If the pktOffset corresponds to offset 0 of any SG entry other than + * the first SG entry, then the SG entry and any SG entries after that + * are deleted and the page is added in the same SG entry index. + * + * \pre vmk_PktIsBufDescWritable() must be VMK_TRUE for this packet. + * + * \pre Packet should only have page style SG's and not be a packet + * with other types of SG entries (vNIC backend packets etc.). + * The packet should have been created using vmk_PktAlloc*() by + * the caller before calling this API. You may not use this API + * to append pages to a packet allocated by vmkernel. + * + * \pre Packet must not have any clones or partial copies referring + * to it. + * + * \param[in] pkt Source packet. + * \param[in] page Page to be appended + * \param[in] pktOffset Offset in the source packet where the + * page is to be appended + * \param[in] pageOffset Offset in the page to be appended. + * \param[out] appendLen Length of the buffer in the page to be + * appended. + * + * \retval VMK_OK If the insertion was successful + * \retval VMK_READ_ONLY Packet can't be modified. Possible + * reasons are that the packet was + * allocated by the vmkernel or a + * partial copy or clone referring to + * the packet exists. + * \retval VMK_LIMIT_EXCEEDED pageOffset + appendLen larger than + * VMK_PAGE_SIZE or pkt's SG array is + * full. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktPageAppend(vmk_PktHandle *pkt, + vmk_MPN page, + vmk_ByteCountSmall pktOffset, + vmk_ByteCountSmall pageOffset, + vmk_ByteCountSmall appendLen); + +/* + *********************************************************************** + * vmk_PktSgArrayGet -- */ /** + * + * \ingroup Pkt + * \brief Returns pointer to the packet's SG array + * + * \note Do not modify the returned SgArray without going through the + * proper API + * + * \param[in] pkt Target packet + * + * \return Pointer to the SG array of the packet + * + *********************************************************************** + */ + +const vmk_SgArray *vmk_PktSgArrayGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktSgArrayTotalLenGet-- */ /** + * + * \ingroup Pkt + * \brief Retrieve the total length of the Sg array for the packet. + * + * The returned length is the sum of the lengths of each Sg element in + * the given packet's Sg array. + * + * \param[in] pkt Target packet. + * + * \return Sum of the lengths of the Sg array elements. + * + *********************************************************************** + */ + +vmk_ByteCountSmall vmk_PktSgArrayTotalLenGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktSgElemGet -- */ /** + * + * \ingroup Pkt + * \brief Returns pointer to the entryNum element in the packet's + * SG array + * + * \note Do not modify the returned SgElem without going through the + * proper API + * + * \param[in] pkt Target packet + * \param[in] entryIdx SG entry index + * + * \return Pointer to the SG entry on success, NULL if + * entryIdx was not found. + * + *********************************************************************** + */ + +const vmk_SgElem *vmk_PktSgElemGet(vmk_PktHandle *pkt, + vmk_uint16 entryIdx); + +/* + *********************************************************************** + * vmk_PktAppend -- */ /** + * + * \ingroup Pkt + * \brief Append frame contents from one vmk_PktHandle to another. + * + * The SG array length and SG element information of the destination + * packet might be modified as a result of this call. + * + * \note Once this function return VMK_OK, the source packet must not + * be used any more since its ownership has been transferred to + * the stack. + * + * \note srcOffset + appendLen must be less than or equal to the SG + * array total length of the source packet. + * + * \pre vmk_PktIsBufDescWritable() must be TRUE for dstPkt. + * + * \pre dstPkt should have been created using vmk_PktAlloc*() by + * the caller before calling this API. You may not use this API + * to append another packet to a packet created by the vmkernel. + * + * \pre dstPkt must not have any clones or partial copies referring + * to it. + * + * \pre dstPkt must not have any pages appended to it via + * vmk_PktPageAppend() prior to calling this API. + * + * \param[in] dstPkt Packet to append fragments into. + * \param[in] srcPkt Packet to append fragments from. + * \param[in] srcOffset Data offset from the beginning of source + * packet. + * \param[in] appendLen Number of bytes to be appended. + * + * \retval VMK_OK The fragments have sucessfully been + * appended. + * \retval VMK_BAD_PARAM Invalid srcOffset and/or appendLen. + * \retval VMK_LIMIT_EXCEEDED The destination packet doesn't have + * enough empty SG array entries for the + * append operation. + * \retval VMK_READ_ONLY dstPkt's SG array can not be modified, + * either because there are other packets + * referring to them or because dstPkt was + * allocated by the vmkernel. + * \retval VMK_NOT_SUPPORTED The source and destination packets are + * not compatible for appending, due to + * dstPkt having pages appended to it. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktAppend(vmk_PktHandle *dstPkt, + vmk_PktHandle *srcPkt, + vmk_ByteCountSmall srcOffset, + vmk_ByteCountSmall appendLen); + +/* + *********************************************************************** + * vmk_PktTrim -- */ /** + * + * \ingroup Pkt + * \brief Trim packet buffers + * + * This function will modify the SG array and remove all fragments from + * it that contain all bytes beyond bytesToKeep. The number of SG + * elements of the packet may be changed. In case bytesToKeep falls + * within the first fragment the frame mapped length + * (vmk_PktFrameMappedLenGet()) and frame mapped pointer + * (vmk_PktFrameMappedPointerGet()) values can also change. + * + * This operation is not reversible, buffer regions left out are no + * longer considered part of the packet's buffers. + * + * \note The caller has to make sure that buffers to be removed by + * this function have properly been released. + * + * \pre vmk_PktIsBufDescWritable() must be TRUE for pkt. + * + * \param[in] pkt Target packet. + * \param[in] bytesToKeep Byte offset to start trimming from. + * + * \retval VMK_OK The trim operation suceeded. + * \retval VMK_BAD_PARAM Invalid bytesToKeep. + * \retval VMK_READ_ONLY Packet can not be modified, either due + * to vmk_PktIsBufDescWritable() not being + * VMK_TRUE or because of completion + * requirements. Consider taking a partial + * copy prior to trimming. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktTrim(vmk_PktHandle *pkt, + vmk_ByteCountSmall bytesToKeep); + #endif /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_capture.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_capture.h new file mode 100644 index 0000000..714ae1e --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_capture.h @@ -0,0 +1,194 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * PktCapture */ /** + * \addtogroup Network + * @{ + * \defgroup PktIncompat Packet Management (incompatible) + * @{ + * + * \par Packet capture + * + * Packet capture APIs to capture interesting packets and export to + * user world. + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_PKT_CAPTURE_H_ +#define _VMKAPI_NET_PKT_CAPTURE_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_pkt.h" + + +/** + * \brief Reasons for a packet to be dropped. + */ +typedef enum { + /** No Drop */ + VMK_PKTCAP_NO_DROP = 0, + /** Enqueue Failed */ + VMK_PKTCAP_ENQUEUE_FAIL_DROP = 1, + /** Uplink device stopped */ + VMK_PKTCAP_DEV_STOPPED_DROP = 2 , + /** Dropped during uplink TX */ + VMK_PKTCAP_DEV_TX_DROP = 3, + /** Dropped during uplink RX */ + VMK_PKTCAP_DEV_RX_DROP = 4, + /** Failed TSO */ + VMK_PKTCAP_TSO_FAIL_DROP = 5, + /** Dropped by terminal IOChain */ + VMK_PKTCAP_TERMINAL_IOCHAIN_DROP = 6, + /** Dropped by Shaper */ + VMK_PKTCAP_SHAPER_DROP = 7, + /** Bad/Failed Checksum */ + VMK_PKTCAP_CSUM_FAIL_DROP = 8, + /** Vlan mismatch */ + VMK_PKTCAP_VLAN_DROP = 9, + /** Dropped by vxlan module */ + VMK_PKTCAP_VXLAN_DROP = 10, + /** Paddign failed */ + VMK_PKTCAP_PADDING_FAIL_DROP = 11, + /** MAC forgery drop */ + VMK_PKTCAP_MAC_FORGERY_DROP = 12, + /** Dropped by Firewall */ + VMK_PKTCAP_FIREWALL_DROP = 13, + /** Port blocked */ + VMK_PKTCAP_PORT_BLOCKED_DROP = 14, + /** Generic Reason */ + VMK_PKTCAP_DEFAULT_DROP = 15, + /** Should not hit this */ + VMK_PKTCAP_DROP_REASON_INVALID = 16 +} vmk_PktDropReason; + +/** + * \brief Packet capture point type. + */ +typedef enum { + /** Invalid capture point */ + VMK_PKTCAP_POINT_INVALID = 0, + /** Dynamic capture point: specify fn name */ + VMK_PKTCAP_POINT_DYNAMIC = 1, + /** Uplink Rx capture point */ + VMK_PKTCAP_POINT_RECVSKB = 2, + /** Uplink Tx capture point */ + VMK_PKTCAP_POINT_TX_IMMEDIATE = 3, + /** Vmxnet3 Tx capture point */ + VMK_PKTCAP_POINT_VMXNET3_TX = 4, + /** Vmxnet3 Rx capture point */ + VMK_PKTCAP_POINT_VMXNET3_RX = 5, + /** Port Input capture point */ + VMK_PKTCAP_POINT_PORT_INPUT = 6, + /** IOChain capture point */ + VMK_PKTCAP_POINT_IOCHAIN = 7, + /** Etherswitch Dispatch capture point */ + VMK_PKTCAP_POINT_SWITCH_DISPATCH = 8, + /** Switch Output capture point */ + VMK_PKTCAP_POINT_SWITCH_OUTPUT = 9, + /** Port Output capture point */ + VMK_PKTCAP_POINT_PORT_OUTPUT = 10, + /** TCP/IP Rx capture point */ + VMK_PKTCAP_POINT_TCPIP = 11, + /** Just before DVFilter */ + VMK_PKTCAP_POINT_PRE_DVFILTER = 12, + /** Just after DVFilter */ + VMK_PKTCAP_POINT_POST_DVFILTER = 13, + /** Dropped packets capture point */ + VMK_PKTCAP_POINT_DROP = 14, + /** VDR RX IOChain */ + VMK_PKTCAP_POINT_VDR_RX_FIRST = 15, + /** VDR TX IOChain */ + VMK_PKTCAP_POINT_VDR_TX_FIRST = 16, + /** VDR RX Terminal IOChain */ + VMK_PKTCAP_POINT_VDR_RX_TERMINAL = 17, + /** VDR TX Terminal IOChain */ + VMK_PKTCAP_POINT_VDR_TX_TERMINAL = 18, + /** Freed packets capture point */ + VMK_PKTCAP_POINT_PKTFREE = 19, +} vmk_PktCapPoint; + +/** Capture the packet list for export to user world. */ +#define VMK_CAPTURE_PKTLIST(pktList, TYPE, DATA) { \ + if (vmk_PktCapIsEnabled()) { \ + vmk_PktCapPktlist(pktList, TYPE, __func__, DATA); \ + } \ +} \ + + +/** Capture the packet for export to user world. */ +#define VMK_CAPTURE_PKT(pkt, TYPE, DATA) { \ + if (vmk_PktCapIsEnabled()) { \ + vmk_PktCapPkt(pkt, TYPE, __func__, DATA); \ + } \ +} \ + + +/* + *********************************************************************** + * vmk_PktCapPktlist -- */ /** + * + * \brief Send the packet list to the Packet capture/trace framework + * for export to user world. + * + * \param[in] pktList Packetlist of interest + * \param[in] captureId Identifier of capture point + * \param[in] funcPtr Address of calling function + * \param[in] data Custom data + * + * \retval None. + * + *********************************************************************** + */ +void vmk_PktCapPktlist(vmk_PktList pktList, + vmk_PktCapPoint captureId, + const char *funcPtr, + void *data); +/* + *********************************************************************** + * vmk_PktCapPkt -- */ /** + * + * \brief Send the packet to the Packet capture/trace framework + * for export to user world. + * + * \param[in] pkt Packet of interest + * \param[in] captureId Identifier of capture point + * \param[in] funcPtr Address of calling function + * \param[in] data Custom data + * + * \retval None. + * + *********************************************************************** + */ +void vmk_PktCapPkt(vmk_PktHandle *pkt, + vmk_PktCapPoint captureId, + const char *funcPtr, + void *data); + +/* + *********************************************************************** + * vmk_PktCapIsEnabled -- */ /** + * + * \brief Check if the packet capture flag is enabled. + * + * \retval None. + * + *********************************************************************** + */ +vmk_Bool vmk_PktCapIsEnabled(void); + +#endif /* _VMKAPI_NET_PKTCAPTURE_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_header.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_header.h new file mode 100644 index 0000000..8ba373c --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_header.h @@ -0,0 +1,1061 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * PktHeader */ /** + * \addtogroup Network + *@{ + * \defgroup PktHeader Packet Header Utilities + *@{ + * \par Header Information + * + * VMKernel provides an API framework for accessing header information + * for a network packet represented by a vmk_PktHandle. For each header, + * information is exported in the form of a vmk_PktHeaderEntry, which + * contains offset and type data. Headers are parsed on-demand by the + * underlying backend implementation, significantly simplifying packet + * processing for users of this API framework.\n + *\n + * Amongst the functionality provided are API's to search for headers + * matching a given specification using vmk_PktHeaderFind(). Through + * the use of masks, it is possible to search for any header matching + * a certain layer, for example VMK_PKT_HEADER_L4_MASK can be used to + * search for any layer 4 header in the packet. Submasks are also + * provided, for example VMK_PKT_HEADER_L3_IPv6_EXT_HDR_MASK will match + * any IPv6 extension header. Of course, an explicit header type can + * be specified, such as VMK_PKT_HEADER_L4_TCP, which would search + * for a TCP header within the packet. Convenience functions such as + * vmk_PktHeaderL2Find() etc. are also provided.\n + *\n + * It is also possible to iterate through headers of a given packet + * using vmk_PktHeaderEntryGet(). Information about header lengths + * can be obtained using API's such as vmk_PktHeaderAllHeadersLenGet(). + * + * \par Providing Layout Information + * + * API's are provided in order to manipulate the header cache + * information associated with a particular packet. These API's can + * be used by the following sites: + * + * - Packet producers + *\n + * Any code that creates and injects packets into the VMKernel can + * optionally choose to pre-populate the header cache information + * for that packet, if the information is available. This helps + * optimize packet processing since the packet doesn't need to + * be parsed again. API's such as vmk_PktHeaderEntryInsert() or + * vmk_PktHeaderArrayGet() and vmk_PktHeaderArraySet() can be + * used for this purpose.\n + *\n + * - Header modifications + *\n + * Any code that modifies headers, either by changing the size of + * an existing header or by adding or removing headers from a + * packet MUST adjust the header cache to ensure that it is + * coherent. This can be done by invalidating the affected + * portions of the cache through use of API's such as + * vmk_PktHeaderInvalidateAll() etc. but this method is not + * preferred since it will cause the packet to be parsed again + * when another consumer of this API requests a lookup. It is + * recommended to use API's such as vmk_PktHeaderIncOffsets(), + * vmk_PktHeaderPushForEncap() and vmk_PktHeaderEntryInsert() + * to adjust the header cache manually for best results. + * + * \par Encapsulated Packets + * + * The parsing framework supports encapsulated headers as well. + * vmk_PktHeaderFind() accepts a hitCount argument which can be used to + * find the second occurance of a given header, for example the second + * L4 header etc. vmk_PktHeaderEncapFind() can be used to find an + * encapsulation header within the packet, provided one exists. API's + * such as vmk_PktHeaderInnerHeadersLenGet() and + * vmk_PktHeaderOuterHeadersLenGet() return the length of the inner or + * outer headers in the case of an encapsulated frame. + * + * \par Header Access + * + * This framework also provides the methods vmk_PktHeaderDataGet() and + * vmk_PktHeaderDataRelease() which are recommended ways of accessing + * header data. These functions take care of issues such as headers + * not being in the frame mapped area (and thus requiring mapping) or + * even situations such as a header spanning multiple SG entries, in + * which case the header needs to be copied to be accessed directly + * through casting to a header structure. The functions allow read + * access and write access as long as header size is not modified. + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_PKT_HEADER_H_ +#define _VMKAPI_NET_PKT_HEADER_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_pkt.h" + +/** + * \ingroup PktHeader + * \enum vmk_PktHeaderType + * \brief Packet header type used by the parsing infrastructure + */ +typedef enum vmk_PktHeaderType { + /** Layer 2 mask - matches all layer 2 headers */ + VMK_PKT_HEADER_L2_MASK = 0x1000, + /** Ethernet header mask - matches all ethernet headers */ + VMK_PKT_HEADER_L2_ETHERNET_MASK = 0x1800, + /** Simple DIX Ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET = 0x1801, + /** 802.1pq Ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_802_1PQ = 0x1802, + /** 802.3 Ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_802_3 = 0x1803, + /** 802.3 in 802.1pq Ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_802_1PQ_802_3 = 0x1804, + /** Fenced ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_FENCED = 0x1805, + /** DVFilter ethernet header */ + VMK_PKT_HEADER_L2_ETHERNET_DVFILTER = 0x1806, + + /** Layer 3 mask - matches all layer 3 headers */ + VMK_PKT_HEADER_L3_MASK = 0x2000, + /** IP version 4 header */ + VMK_PKT_HEADER_L3_IPv4 = 0x2001, + /** IP version 6 header */ + VMK_PKT_HEADER_L3_IPv6 = 0x2002, + /** Mask matching all IPv6 extension headers */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_MASK = 0x2800, + /** IPv6 extension header: Hop-by-hop options */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_HOP = 0x2801, + /** IPv6 extension header: Destination options */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_DST = 0x2802, + /** IPv6 extension header: Routing header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_ROUT = 0x2803, + /** IPv6 extension header: Fragment header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_FRAG = 0x2804, + /** IPv6 extension header: Authentication header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_AH = 0x2805, + /** IPv6 extension header: Encapsulation Security Payload header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_ESP = 0x2806, + /** IPv6 extension header: Mobility header */ + VMK_PKT_HEADER_L3_IPv6_EXT_HDR_MOB = 0x2807, + + /** Layer 4 mask - matches all layer 4 headers */ + VMK_PKT_HEADER_L4_MASK = 0x4000, + /** Transmission Control Protocol */ + VMK_PKT_HEADER_L4_TCP = 0x4001, + /** User Datagram Protocol */ + VMK_PKT_HEADER_L4_UDP = 0x4002, + /** Protocol Independent Multicast */ + VMK_PKT_HEADER_L4_PIM = 0x4003, + /** Mask matching ICMP version 4 and version 6 */ + VMK_PKT_HEADER_L4_ICMP_MASK = 0x4800, + /** Internet Control Message Protocol v4 */ + VMK_PKT_HEADER_L4_ICMPV4 = 0x4801, + /** Internet Control Message Protocol v6 */ + VMK_PKT_HEADER_L4_ICMPV6 = 0x4802, + + /** Encapsulation header mask - matches all encapsulation headers */ + VMK_PKT_HEADER_ENCAP_MASK = 0x8000, + /** VXLAN header */ + VMK_PKT_HEADER_ENCAP_VXLAN = 0x8001, + /** GRE header */ + VMK_PKT_HEADER_ENCAP_GRE = 0x8002, +} vmk_PktHeaderType; + +/** Header bits used for type masks */ +#define VMK_PKT_HEADER_TYPE_MASK_BITS (0xff00) + +/** Given a header, return its type mask bits */ +#define VMK_PKT_HEADER_GET_TYPE_MASK(type) \ + ((type) & VMK_PKT_HEADER_TYPE_MASK_BITS) + +/** Check whether the given type matches a type mask */ +#define VMK_PKT_HEADER_TYPE_CHECK(type, mask) \ + (VMK_PKT_HEADER_GET_TYPE_MASK(type) == (mask)) + +/** Header bits used for layer masks */ +#define VMK_PKT_HEADER_LAYER_MASK_BITS (0xf000) + +/** Given a header, return its layer mask bits */ +#define VMK_PKT_HEADER_GET_LAYER_MASK(type) \ + ((type) & VMK_PKT_HEADER_LAYER_MASK_BITS) + +/** Check whether the given type matches a layer mask */ +#define VMK_PKT_HEADER_LAYER_CHECK(type, mask) \ + (VMK_PKT_HEADER_GET_LAYER_MASK(type) == (mask)) + +/** Macro to determine whether a mask is a layer mask vs. a type mask */ +#define VMK_PKT_HEADER_MASK_IS_LAYER(mask) \ + (((mask) | VMK_PKT_HEADER_LAYER_MASK_BITS) == VMK_PKT_HEADER_LAYER_MASK_BITS) + +/** + * Check whether the given type matches with a mask. Does a different + * check depending on whether the mask is a layer mask vs. a type mask + */ +#define VMK_PKT_HEADER_MASK_CHECK(type, mask) \ + (VMK_PKT_HEADER_MASK_IS_LAYER(mask) ? \ + VMK_PKT_HEADER_LAYER_CHECK(type, mask) : \ + VMK_PKT_HEADER_TYPE_CHECK(type, mask)) + +/** Macro to return whether a given header type is an L2 header type */ +#define VMK_PKT_HEADER_IS_L2(type) \ + VMK_PKT_HEADER_LAYER_CHECK(type, VMK_PKT_HEADER_L2_MASK) + +/** Macro to return whether a given header type is an L3 header type */ +#define VMK_PKT_HEADER_IS_L3(type) \ + VMK_PKT_HEADER_LAYER_CHECK(type, VMK_PKT_HEADER_L3_MASK) + +/** Macro to return whether a given header type is an L4 header type */ +#define VMK_PKT_HEADER_IS_L4(type) \ + VMK_PKT_HEADER_LAYER_CHECK(type, VMK_PKT_HEADER_L4_MASK) + +/** Macro to return whether a given header type is an encapsulation header type */ +#define VMK_PKT_HEADER_IS_ENCAP(type) \ + (VMK_PKT_HEADER_LAYER_CHECK(type, VMK_PKT_HEADER_ENCAP_MASK) || \ + ((type) == VMK_PKT_HEADER_L2_ETHERNET_FENCED)) + +/** Protocol is a "toplevel" protocol */ +#define VMK_PKT_PROTO_TOPLEVEL 0xFFFD +/** Protocol is unknown */ +#define VMK_PKT_PROTO_UNKNOWN 0xFFFE +/** There are no more headers after this header */ +#define VMK_PKT_PROTO_NO_MORE_HEADERS 0xFFFF + +/** + * \ingroup PktHeader + * \struct vmk_PktHeaderEntry + * \brief Entry structure describing one packet header + */ +typedef struct vmk_PktHeaderEntry { + /** vmk_PktHeaderType of this header */ + vmk_uint16 type; + /** Offset of this header from start of frame */ + vmk_uint16 offset; + /** Parser-dependent output defining next header's protocol + * VMK_PKT_PROTO_NO_MORE_HEADERS is a reserved value indicating there are no + * more headers, VMK_PKT_PROTO_UNKNOWN is a reserved value indicating that + * the provider of this entry did not specify the next protocol. This can + * happen if the provider is a NIC driver or vNIC backend and it doesn't know + * the next protocol. In this case the parsing infrastructure will re-parse + * this header if necessary to determine the next header. */ + vmk_uint16 nextHdrProto; + /** Offset of the next header from start of frame */ + vmk_uint16 nextHdrOffset; +} vmk_PktHeaderEntry; + +/* + *********************************************************************** + * vmk_PktHeaderEntryGet -- */ /** + * + * \ingroup PktHeader + * \brief Get the vmk_PktHeaderEntry for the header with the specified + * index. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * + * \param[in] pkt Packet to get header information from. + * \param[in] hdrIndex Index of the header to get. + * \param[out] hdrEntry Pointer to the header entry for the requested + * header. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_LIMIT_EXCEEDED Header index out of bounds. + * \retval VMK_FAILURE Parsing failure. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderEntryGet(vmk_PktHandle *pkt, + vmk_uint16 hdrIndex, + vmk_PktHeaderEntry **hdrEntry); + +/* + *********************************************************************** + * vmk_PktHeaderLength -- */ /** + * + * \ingroup PktHeader + * \brief Returns the length of the header represented by the given + * entry. + * + * \param[in] hdrEntry Entry to return header length of. + * + * \return Length of the header, 0 if not available. + * + *********************************************************************** + */ +static inline vmk_uint16 +vmk_PktHeaderLength(vmk_PktHeaderEntry *hdrEntry) +{ + VMK_ASSERT(hdrEntry != NULL); + return hdrEntry->nextHdrOffset - hdrEntry->offset; +} + +/* + *********************************************************************** + * vmk_PktHeaderNumParsedGet -- */ /** + * + * \ingroup PktHeader + * \brief Return number of parsed headers in the given packet + * + * \param[in] pkt Packet to get header information from. + * + * \return Number of parsed headers in the packet. + * + *********************************************************************** + */ +vmk_uint16 vmk_PktHeaderNumParsedGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktHeaderFind -- */ /** + * + * \ingroup PktHeader + * \brief Search for a header matching the given mask and return it. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[in] startIndex Index to start searching from (0 = first header) + * \param[in] searchMask Mask to match against. This could be a generic + * mask such as VMK_PKT_HEADER_L3_MASK as well as + * a specific header type like + * VMK_PKT_HEADER_L4_TCP. + * \param[in] hitCount 1 = return first matching header, 2 = second + * matching header etc. + * \param[out] hdrEntry Pointer to the header entry for the requested + * header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderFind(vmk_PktHandle *pkt, + vmk_uint16 startIndex, + vmk_PktHeaderType searchMask, + vmk_uint16 hitCount, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderL2Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 2 header in the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the first L2 + * header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +static inline VMK_ReturnStatus +vmk_PktHeaderL2Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex) +{ + return vmk_PktHeaderFind(pkt, 0, VMK_PKT_HEADER_L2_MASK, 1, hdrEntry, + hdrIndex); +} + +/* + *********************************************************************** + * vmk_PktHeaderL3Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 3 header in the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the first L3 + * header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +static inline VMK_ReturnStatus +vmk_PktHeaderL3Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex) +{ + return vmk_PktHeaderFind(pkt, 1, VMK_PKT_HEADER_L3_MASK, 1, hdrEntry, + hdrIndex); +} + +/* + *********************************************************************** + * vmk_PktHeaderL4Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 4 header in the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the first L4 + * header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +static inline VMK_ReturnStatus +vmk_PktHeaderL4Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex) +{ + return vmk_PktHeaderFind(pkt, 2, VMK_PKT_HEADER_L4_MASK, 1, hdrEntry, + hdrIndex); +} + +/* + *********************************************************************** + * vmk_PktHeaderAllHeadersLenGet -- */ /** + * + * \ingroup PktHeader + * \brief Returns the length of all headers of the given packet + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to return header length for. + * \param[out] hdrLength Pointer for returning header length + * + * \retval VMK_OK Operation was successful. + * \retval VMK_FAILURE Parsing failure. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PktHeaderAllHeadersLenGet(vmk_PktHandle *pkt, + vmk_uint32 *hdrLength); + +/* + *********************************************************************** + * vmk_PktHeaderInnerHeadersLenGet -- */ /** + * + * \ingroup PktHeader + * \brief Returns the total header length of the inner frame in a given + * packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \note The inner frame is defined as a frame that is contained within + * another frame. Inner headers are all headers that come after + * an encapsulation header in the following list: + * - VMK_PKT_HEADER_L2_ETHERNET_FENCED + * - VMK_PKT_HEADER_ENCAP_VXLAN + * - VMK_PKT_HEADER_ENCAP_GRE + * + * \param[in] pkt Packet to return header length for. + * \param[out] hdrLength Pointer for returning header length + * + * \retval VMK_OK Operation was successful. + * \retval VMK_FAILURE Parsing failure. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PktHeaderInnerHeadersLenGet(vmk_PktHandle *pkt, + vmk_uint32 *hdrLength); + +/* + *********************************************************************** + * vmk_PktHeaderOuterHeadersLenGet -- */ /** + * + * \ingroup PktHeader + * \brief Returns the total header length of the outer frame in a given + * packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \note The outer frame is defined as a frame that contains another + * frame within itself. Outer headers are all headers that come + * before an encapsulation header from the following list: + * - VMK_PKT_HEADER_L2_ETHERNET_FENCED + * - VMK_PKT_HEADER_ENCAP_VXLAN + * - VMK_PKT_HEADER_ENCAP_GRE + * + * \note The length of the encapsulation header is also part of the + * hdrLength returned. + * + * \param[in] pkt Packet to return header length for. + * \param[out] hdrLength Pointer for returning header length + * + * \retval VMK_OK Operation was successful. + * \retval VMK_FAILURE Parsing failure. + * + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PktHeaderOuterHeadersLenGet(vmk_PktHandle *pkt, + vmk_uint32 *hdrLength); + +/* + *********************************************************************** + * vmk_PktHeaderEncapFind -- */ /** + * + * \ingroup PktHeader + * \brief Find the first encapsulation header in the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \note This function will also find fence headers designated with + * VMK_PKT_HEADER_L2_ETHERNET_FENCED + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the first + * encapsulation header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PktHeaderEncapFind(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderEncapL2Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 2 header in the encapsulated (inner) + * frame of the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the encapsulated + * L2 header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PktHeaderEncapL2Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderEncapL3Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 3 header in the encapsulated (inner) + * frame of the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the encapsulated + * L3 header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PktHeaderEncapL3Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderEncapL4Find -- */ /** + * + * \ingroup PktHeader + * \brief Find the first layer 4 header in the encapsulated (inner) + * frame of the given packet. + * + * As a side effect this API may also parse the packet and caches the + * result if the headers are not already parsed. + * + * \param[in] pkt Packet to search through. + * \param[out] hdrEntry Pointer to the header entry for the encapsulated + * L4 header. + * \param[out] hdrIndex Pointer to the index of the header for the + * requested header. This is optional, pass in + * NULL if this is not required. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NOT_FOUND No header found matching the given + * criteria. + * \retval VMK_FAILURE Parsing failure due to corrupt header. + * \retval VMK_NOT_IMPLEMENTED Parsing failure due to missing parser. + * \retval VMK_LIMIT_EXCEEDED Parsing failure due to truncated + * header. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_PktHeaderEncapL4Find(vmk_PktHandle *pkt, + vmk_PktHeaderEntry **hdrEntry, + vmk_uint16 *hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderInvalidateIndex -- */ /** + * + * \ingroup PktHeader + * \brief Invalidate all parsed headers starting from a given index. + * + * This function (or a more general version) needs to be called by code + * which modifies frame headers on a packet. + * + * \param[in] pkt Packet to invalidate headers of. + * \param[in] hdrIndex Index to start invalidating from (0 = all headers) + * + * \retval VMK_BAD_PARAM hdrIndex out of bounds. + * \retval VMK_OK Operation was successful. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderInvalidateIndex(vmk_PktHandle *pkt, + vmk_uint16 hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderInvalidateAll -- */ /** + * + * \ingroup PktHeader + * \brief Invalidate all parsed headers on a packet. + * + * This function (or a more granular version) needs to be called by code + * which modifies frame headers on a packet. + * + * \param[in] pkt Packet to invalidate headers of. + * + * \retval VMK_OK Operation was successful. + * + *********************************************************************** + */ +static inline VMK_ReturnStatus +vmk_PktHeaderInvalidateAll(vmk_PktHandle *pkt) +{ + return vmk_PktHeaderInvalidateIndex(pkt, 0); +} + +/* + *********************************************************************** + * vmk_PktHeaderInvalidateOffset -- */ /** + * + * \ingroup PktHeader + * \brief Invalidate all parsed headers starting from a given byte + * offset. + * + * This function (or a more general version) needs to be called by code + * which modifies frame headers on a packet. + * + * \param[in] pkt Packet to invalidate headers of. + * \param[in] offset Byte offset to start invalidating from. + * + * \retval VMK_OK Operation was successful. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderInvalidateOffset(vmk_PktHandle *pkt, + vmk_uint16 offset); + +/* + *********************************************************************** + * vmk_PktHeaderIncOffsets -- */ /** + * + * \ingroup PktHeader + * \brief Increment all header offsets by the specified amount starting + * from the given header. + * + * Note that for the first header (ie. the one at hdrIndex) only the + * nextHdrOffset is incremented by offset. For all subsequent headers, + * both offset and nextHdrOffset are incremented. + * + * This function (or a more general version) needs to be called by code + * which modifies frame headers on a packet. + * + * \param[in] pkt Packet to invalidate headers of. + * \param[in] hdrIndex Index of header to start incrementing offsets + * from. + * \param[in] offset Number of bytes to increment offsets by. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_BAD_PARAM hdrIndex out of bounds. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderIncOffsets(vmk_PktHandle *pkt, + vmk_uint16 hdrIndex, + vmk_uint16 offset); + +/* + *********************************************************************** + * vmk_PktHeaderPushForEncap -- */ /** + * + * \ingroup PktHeader + * \brief Push all the parsed headers in the packet by the specified + * amounts in preparation for prepending encapsulation headers. + * + * All headers which are already parsed are shifted by numHeaders slots + * forward and their offsets are incremented by encapLen. If necessary + * the header cache array may be reallocated to accomodate the new + * headers. + * + * \param[in] pkt Packet to adjust header cache for. + * \param[in] numHeaders Number of encapsulation headers that will be + * prepended to the packet. + * \param[in] encapLen Total length of the encapsulation headers. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_NO_MEMORY Couldn't grow packet header cache. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderPushForEncap(vmk_PktHandle *pkt, + vmk_uint16 numHeaders, + vmk_uint16 encapLen); + +/* + *********************************************************************** + * vmk_PktHeaderPullForDecap -- */ /** + * + * \ingroup PktHeader + * \brief Pull all the parsed headers in the packet by the specified + * amounts after decapsulation of headers. + * + * All headers which are already parsed are shifted by numHeaders slots + * back and their offsets are decremented by decapLen. + * + * \param[in] pkt Packet to adjust header cache for. + * \param[in] numHeaders Number of encapsulation headers that were + * removed from the packet. + * \param[in] decapLen Total length of the encapsulation headers. + * + * \retval VMK_OK Operation was successful. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderPullForDecap(vmk_PktHandle *pkt, + vmk_uint16 numHeaders, + vmk_uint16 decapLen); + +/* + *********************************************************************** + * vmk_PktHeaderDataGet -- */ /** + * + * \ingroup PktHeader + * \brief Returns a pointer to the specified header, mapping or copying + * the header if needed. + * + * \note Any modifications of header data requires a corresponding + * vmk_PktHeaderInvalidate* call to invalidate header parsing + * results. + * + * \param[in] pkt Packet to get header data from. + * \param[in] entry Header entry to get a pointer to. + * \param[out] mappedPtr Mapped pointer to requested header data. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_FAILURE Mapping or copying failed. + * \retval VMK_NO_MEMORY Failed to allocate memory for header copy. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderDataGet(vmk_PktHandle *pkt, + vmk_PktHeaderEntry *entry, + void **mappedPtr); + +/* + *********************************************************************** + * vmk_PktHeaderDataRelease -- */ /** + * + * \ingroup PktHeader + * \brief Releases a mapping obtained with vmk_PktHeaderDataGet() + * + * \param[in] pkt Packet mappedPtr refers to. + * \param[in] entry Header entry mappedPtr refers to. + * \param[in] mappedPtr Mapped pointer to release. + * \param[in] modified Whether the header was modified. + * + * \note In order to modify the header vmk_PktIsBufDescWritable() must + * be true for the packet. If a modification was performed then + * the modified parameter needs to be set to VMK_TRUE since the + * underlying infrastructure may need to copy header contents + * from a temporary buffer back into the original frame buffers. + * + * \note This API doesn't support modification of header length, so + * any header modifications must preserve the original header + * length since only the original header is guaranteed to be + * mapped. + * + * \retval VMK_OK Operation was successful. + * \retval VMK_READ_ONLY modified set to TRUE for a packet which has + * vmk_PktIsBufDescWritable() as VMK_FALSE + * \retval VMK_FAILURE Failed to copy modified header contents + * back into frame buffers. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderDataRelease(vmk_PktHandle *pkt, + vmk_PktHeaderEntry *entry, + void *mappedPtr, + vmk_Bool modified); + +/* + *********************************************************************** + * vmk_PktHeaderArrayLenGet -- */ /** + * + * \ingroup PktHeader + * \brief Return the number of entries in the given packet's header + * entries array + * + * \param[in] pkt Packet to return array length. + * + * \return Length of the packet's header entry array + * + *********************************************************************** + */ +vmk_uint16 vmk_PktHeaderArrayLenGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktHeaderArrayGet -- */ /** + * + * \ingroup PktHeader + * \brief Return the given packet's header entries array for direct + * modification. + * + * This function is intended for use by NIC drivers or other packet + * producing code paths that have pre-existing knowledge of the header + * layout for the packet, and thus would like to fill the information + * in for the benefit of the rest of the stack. + * + * \see vmk_PktHeaderArrayLenGet() for obtaining the length of this + * array. + * + * \param[in] pkt Packet to return the header entry array. + * + * \return Packet's header entry array + * + *********************************************************************** + */ +vmk_PktHeaderEntry *vmk_PktHeaderArrayGet(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktHeaderArrayAlloc -- */ /** + * + * \ingroup PktHeader + * \brief Allocate a new header entry array to associate with a packet. + * + * This function can be used to grow a packet's header entry array if + * the current array length is insufficient to populate all the header + * information. + * + * \see vmk_PktHeaderArraySet() to associate this array with a packet. + * + * \param[in] numEntries Desired number of header entries in the + * allocated array. + * + * \return Allocated array, NULL if allocation fails. + * + *********************************************************************** + */ +vmk_PktHeaderEntry *vmk_PktHeaderArrayAlloc(vmk_uint16 numEntries); + +/* + *********************************************************************** + * vmk_PktHeaderArraySet -- */ /** + * + * \ingroup PktHeader + * \brief Associate the given header entry array with the given packet. + * + * This function is intended for use by NIC drivers or other packet + * producing code paths that have pre-existing knowledge of the header + * layout for the packet, and thus would like to fill the information + * in for the benefit of the rest of the stack. + * + * \note The array needs to have been allocated with + * vmk_PktHeaderArrayAlloc() + * + * \note This function will free the existing array if necessary. + * + * \param[in] pkt Packet to replace its header entry array. + * \param[in] hdrEntry Header entry array to set. + * \param[in] numEntries Size of the hdrEntry array. + * \param[in] usedEntries Number of entries in hdrEntry that are actually + * used, ie. have valid header data populated. + * + * \retval VMK_OK Operation successful. + * \retval VMK_BAD_PARAM Invalid parameter(s) specified. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderArraySet(vmk_PktHandle *pkt, + vmk_PktHeaderEntry *hdrEntry, + vmk_uint16 numEntries, + vmk_uint16 usedEntries); + +/* + *********************************************************************** + * vmk_PktHeaderEntryInsert -- */ /** + * + * \ingroup PktHeader + * \brief Insert a new header entry to the packet at the specified header + * index. + * + * This function is intended for use by NIC drivers or other packet + * producing code paths that have pre-existing knowledge of the header + * layout for the packet, and thus would like to fill the information + * in for the benefit of the rest of the stack. + * + * \note All headers after hdrIndex are modified to reflect the offset + * changes due to insertion of an additional header. + * + * \note The caller must take care to provide correct values for ALL + * hdrEntry fields including nextHdrProto. Failure to do so may + * result in an unparsable packet. + * + * \param[in] pkt Packet to add a header entry to. + * \param[in] hdrEntry Header entry to add. + * \param[in] hdrIndex Index to add the header entry at (0 = first). + * + * \retval VMK_OK Operation successful. + * \retval VMK_NO_MEMORY Not enough memory to grow header array + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderEntryInsert(vmk_PktHandle *pkt, + vmk_PktHeaderEntry *hdrEntry, + vmk_uint16 hdrIndex); + +/* + *********************************************************************** + * vmk_PktHeaderEntryRemove -- */ /** + * + * \ingroup PktHeader + * \brief Removes a header entry from the packet at the specified header + * index. + * + * This function is intended for use by NIC drivers or other packet + * producing code paths that have pre-existing knowledge of the header + * layout for the packet, and thus would like to fill the information + * in for the benefit of the rest of the stack. + * + * \note All headers after hdrIndex are pulled back one slot and modified + * to reflect the offset changes due to removal of the header. + * + * \note If the header being removed is not at index 0, the caller has + * to take care of fixing the nextHdrProto field of the header + * at (hdrIndex - 1) to properly describe the protocol for the + * header at (hdrIndex + 1) before the header at hdrIndex was + * removed. + * + * \param[in] pkt Packet to add a header entry to. + * \param[in] hdrIndex Index to remove the header entry from (0 = first). + * + * \retval VMK_OK Operation successful. + * \retval VMK_LIMIT_EXCEEDED hdrIndex out of bounds, only currently + * parsed headers can be removed. + * \see vmk_PktHeaderNumParsedGet() + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktHeaderEntryRemove(vmk_PktHandle *pkt, + vmk_uint16 hdrIndex); + +#endif +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_incompat.h index 7d95893..41cc513 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_incompat.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pkt_incompat.h @@ -53,57 +53,60 @@ typedef enum vmk_PktTraceEventType { VMK_PKT_TRACE_PHY_TX_DONE = 0x4, } vmk_PktTraceEventType; -/* - *********************************************************************** - * vmk_PktAllocForUplink -- */ /** - * +/** * \ingroup Pkt - * \brief Allocate a vmk_PktHandle containing a single buffer fragment - * for the specified uplink. - * - * Please refer to vmk_PktAlloc() documentation for properties of the - * allocated packet. - * - * The packet is allocated so it may be easily DMA mapped for the - * uplink. - * - * \param[in] len Minimum size of the buffer allocated for - * the new packet. - * \param[in] uplink The uplink the packet will be allocated for. - * \param[out] pkt Pointer to the allocated vmk_PktHandle. - * - * \retval VMK_OK Allocation succeeded. - * \retval VMK_BAD_PARAM Invalid uplink parameter. - * \retval VMK_NO_MEMORY Not enough memory to satisfy the - * allocation request or an unspecified - * error has occured. - * - *********************************************************************** + * \brief Packet RSS Types */ +typedef enum vmk_PktRssType { + /** RSS hash type not set */ + VMK_PKT_RSS_TYPE_NONE = 0x00000000, -VMK_ReturnStatus vmk_PktAllocForUplink(vmk_ByteCountSmall len, - vmk_Uplink uplink, - vmk_PktHandle **pkt); + /** + * RSS hash based on IPv4 source/destination addresses and + * TCP source/destination ports + */ + VMK_PKT_RSS_TYPE_IPV4_TCP = 0x00000001, -/* - *********************************************************************** - * vmk_PktReleaseIRQ -- */ /** - * - * \ingroup Pkt - * \brief Release all resources of a given vmk_PktHandle from an - * interrupt context. - * - * This function should be called instead of vmk_PktRelease() when - * releasing packets from an interrupt context. Please refer to - * vmk_PktRelease() documentation for more information on releasing - * packets. - * - * \param[in] pkt Packet to be released. - * - *********************************************************************** - */ + /** RSS hash based on IPv4 source/destination addresses */ + VMK_PKT_RSS_TYPE_IPV4 = 0x00000002, -void vmk_PktReleaseIRQ(vmk_PktHandle *pkt); + /** + * RSS hash based on IPv6 source/destination addresses and + * TCP source/destination ports + */ + VMK_PKT_RSS_TYPE_IPV6_TCP = 0x00000003, + + /** RSS hash based on IPv6 source/destination addresses and extensions */ + VMK_PKT_RSS_TYPE_IPV6_EX = 0x00000004, + + /** RSS hash based on IPv6 source/destination addresses */ + VMK_PKT_RSS_TYPE_IPV6 = 0x00000005, + + /** + * RSS hash based on IPv6 source/destination addresses, extensions + * and TCP source/destination ports + */ + VMK_PKT_RSS_TYPE_IPV6_TCP_EX = 0x00000006, + + /** + * RSS hash based on IPv4 source/destination addresses and + * UDP source/destination ports + */ + VMK_PKT_RSS_TYPE_IPV4_UDP = 0x00000007, + + /** + * RSS hash based on IPv6 source/destination addresses and + * UDP source/destination ports + */ + VMK_PKT_RSS_TYPE_IPV6_UDP = 0x00000008, + + /** + * RSS hash based on IPv6 source/destination addresses, extensions + * and UDP source/destination ports + */ + VMK_PKT_RSS_TYPE_IPV6_UDP_EX = 0x00000009, + +} vmk_PktRssType; /* *********************************************************************** @@ -123,6 +126,7 @@ void vmk_PktReleaseIRQ(vmk_PktHandle *pkt); * resources. * * \param[in] pkt Packet to be released. + * \retval None * *********************************************************************** */ @@ -298,144 +302,6 @@ void vmk_PktClearCompletionData(vmk_PktHandle *pkt); vmk_Bool vmk_PktAllowSlowCompletion(vmk_PktHandle *pkt); -/* - *********************************************************************** - * vmk_PktAdjust -- */ /** - * - * \ingroup Pkt - * \brief Adjust the packet buffers by moving frame mapped region and/or - * modifying the fragment array. - * - * If a non-zero pushLen argument is supplied this function will move - * the start of the frame mapped region (vmk_PktFrameMappedPointerGet()) - * forward by pushLen and decrease the frame mapped length - * (vmk_PktFrameMappedLenGet()) by pushLen. The frame length - * (vmk_PktFrameLenGet()) is left unmodified. - * - * This function will also modify the fragment array and remove all - * fragments from it that contain all bytes beyond pushLen + adjustLen. - * The number of fragments of the packet (vmk_PktFragsNb()) may be - * changed, as well as the length of the last fragment. In case - * pushLen + adjustLen falls within the first fragment the frame mapped - * length (vmk_PktFrameMappedLenGet()) and frame mapped pointer - * (vmk_PktFrameMappedPointerGet()) values can also change. - * - * This operation is not reversible, buffer regions left out via pushLen - * and adjustLen are no longer considered part of the packet's buffers. - * - * \note A non-zero adjustLen parameter MUST be specified, whereas - * the pushLen parameter can be zero. - * - * \note pushLen has to be less than or equal to the size of the first - * fragment. - * - * \note pushLen + adjustLen must be less than or equal to the total - * length of all fragments in the packet. - * - * \note The caller has to make sure that buffers to be removed by - * this function via adjustLen have properly been released. - * - * \pre vmk_PktIsBufDescWritable() must be TRUE for pkt. - * - * \param[in] pkt Target packet. - * \param[in] pushLen Number of bytes to push the frame mapped region - * forward by. - * \param[in] adjustLen Number of bytes to keep from the packet fragments - * after pushLen bytes. Remaining buffers are - * simply discarded. When zero, VMK_LIMIT_EXCEEDED - * is returned. - * - * \retval VMK_OK The packet adjustement suceeded. - * \retval VMK_LIMIT_EXCEEDED The packet adjustment failed. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_PktAdjust(vmk_PktHandle *pkt, - vmk_ByteCountSmall pushLen, - vmk_ByteCountSmall adjustLen); - -/* - *********************************************************************** - * vmk_PktAppend -- */ /** - * - * \ingroup Pkt - * \brief Append frame contents from one vmk_PktHandle to another. - * - * The frame length, number of fragments and fragment information of the - * destination packet might be modified as a result of this call. - * - * \note Once this function return VMK_OK, the source packet can not be - * used any more since its ownership has been transferred to the - * stack. - * - * \note This function invalidates all previous calls to - * vmk_PktFragGet(). - * - * \note srcOffset + appendLen must be less than or equal to the frame - * length of the source packet. - * - * \pre vmk_PktIsBufDescWritable() must be TRUE for dstPkt. - * - * \param[in] dstPkt Packet to append fragments into. - * \param[in] srcPkt Packet to append fragments from. - * \param[in] srcOffset Data offset from the beginning of source packet. - * \param[in] appendLen Number of bytes to be appended. - * - * \retval VMK_OK The fragments have sucessfully been appended. - * \retval VMK_LIMIT_EXCEEDED The destination packet doesn't have - * enough empty fragment array entries for - * the append operation. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_PktAppend(vmk_PktHandle *dstPkt, - vmk_PktHandle *srcPkt, - vmk_ByteCountSmall srcOffset, - vmk_ByteCountSmall appendLen); - -/* - *********************************************************************** - * vmk_PktAppendFrag -- */ /** - * - * \ingroup Pkt - * \brief Append the given buffer as a fragment to the given packet. - * - * The given buffer is simply appended at the end of the fragment array - * of the target packet. The frame length, number of fragments and - * fragment information of the packet are modified. - * - * \note The given buffer should NOT be released/reused until the packet - * is released, since the packet will contain a reference to the - * buffer. - * - * \note Note that the vmk_PktRelease() can NOT properly release fragments - * appended through this API. - * - * \note This function invalidates all previous calls to - * vmk_PktFragGet(). - * - * \pre vmk_PktIsBufDescWritable() must be TRUE for pkt. - * - * \param[in] pkt Target packet. - * \param[in] fragMA Fragment machine address - A virtual address - * must first be converted to a machine address - * with vmk_VA2MA(). - * \param[in] fragLen Fragment length. - * - * \retval VMK_OK If the fragment has been appended. - * \retval VMK_LIMIT_EXCEEDED The destination packet doesn't have - * enough empty fragment array entries - * for the append operation. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_PktAppendFrag(vmk_PktHandle *pkt, - vmk_MA fragMA, - vmk_ByteCountSmall fragLen); - /* *********************************************************************** * vmk_PktCheckInternalConsistency -- */ /** @@ -512,7 +378,7 @@ VMK_ReturnStatus vmk_PktTraceRecordEvent(vmk_PktHandle *pkt, /* *********************************************************************** - * vmk_PktSlabAllocPage -- */ /** + * vmk_PktSlabAllocPages -- */ /** * * \ingroup PktIncompat * \brief Allocate one or more pages from the packet page pool. @@ -526,7 +392,6 @@ VMK_ReturnStatus vmk_PktTraceRecordEvent(vmk_PktHandle *pkt, * be allocated with a machine address under * 4 gigabytes. All other constraints will * be allocated from any memory. - * \param[in] allocFlags Packet allocation flags. * \param[out] firstPage First page in the resulting allocation block. * * \retval VMK_OK Allocation successful. @@ -536,24 +401,23 @@ VMK_ReturnStatus vmk_PktTraceRecordEvent(vmk_PktHandle *pkt, * *********************************************************************** */ -VMK_ReturnStatus vmk_PktSlabAllocPage(vmk_uint32 numPages, - vmk_MemPhysAddrConstraint mem, - vmk_PktAllocFlags allocFlags, - vmk_MPN *firstPage); +VMK_ReturnStatus vmk_PktSlabAllocPages(vmk_uint32 numPages, + vmk_MemPhysAddrConstraint mem, + vmk_MPN *firstPage); /* *********************************************************************** - * vmk_PktSlabFreePage -- */ /** + * vmk_PktSlabFreePages -- */ /** * * \ingroup PktIncompat * \brief Free one or more pages allocated from the packet page pool * back to it. * * \note The pages must have been originally allocated through - * vmk_PktSlabAllocPage() and not any other page allocation mechanism. + * vmk_PktSlabAllocPages() and not any other page allocation mechanism. * * \note Pages must be free'd in the same block size that they have been - * allocated with. For example, a call to vmk_PktSlabAllocPage() for 6 + * allocated with. For example, a call to vmk_PktSlabAllocPages() for 6 * pages should only be followed by a vmk_PktSlabFreePage() for all the * 6 pages, and not individual calls for each page, or two calls for 3 * pages each. @@ -563,520 +427,9 @@ VMK_ReturnStatus vmk_PktSlabAllocPage(vmk_uint32 numPages, * *********************************************************************** */ -void vmk_PktSlabFreePage(vmk_MPN page, +void vmk_PktSlabFreePages(vmk_MPN page, vmk_uint32 numPages); -/* - *********************************************************************** - * vmk_PktSetPageFrags -- */ /** - * - * \ingroup PktIncompat - * \brief Mark a packet as having fragments allocated through - * vmk_PktSlabAllocPage(). - * - * \note This API was born deprecated and will be removed. - * - * \param[in] pkt Packet to mark as having page fragments. - * - *********************************************************************** - */ -void vmk_PktSetPageFrags(vmk_PktHandle *pkt); - -/** @} */ -/** @} */ - -/* - *********************************************************************** - * Inet Frame Layouts */ /** - * - * \addtogroup PktIncompat - *@{ - * \defgroup PktIncompatInetFrameLayout Packet Inet Frame Layout Management (incompatible) - *@{ - * - * Family of API's to manage inet frame layout, component offsets and - * lengths. - * - * The inet frame layout attribute, once attached, is used when inet - * component offset and lenths are needed. These include TSO segmentation - * CSUM offload, code which needs to identify the ip source or destination - * address, along with various other validations for vmk_PktHandle TX - * via pNics. - * - * Once an inet frame layout is attached to a vmk_PktHandle, any clones - * partial copies, segemented TSO frames, vmk_PktDup() or related frames - * will inherit a copy of the same layout. - * - * An inet frame layout can be associated with a vmk_PktHandle, when the - * layout of the frame can be recognized. Such frames are composed - * of a well known ethernet headers with ethertypes - * for ipv4 or ipv6, then immediatly followed by the ipv4 or ipv6 header, - * and possibly immediatly followed by the the next layer header. For - * an ip fragmented frame, the next protocol header may not be available, - * when the fragment isn't the first frame. - * - * It is possible for the inet frame layout attachment to - * fail due to a malformed ip header, which includes, mismatched ether type - * with respect to ip version, incorrect ip version, short ip header length size, - * insufficient frame lengt of the inet header payload, and other - * similar frame layout inconsistencies. This is not an exhaustive list - * of all malformed inet frames. - * - * It is also possible for the inet frame layout attachment to fail - * due to memory pressure required to manage a new attribute. - * A missing inet frame attribute does not then imply that the - * vmk_PktHandle is not an ipv4 nor an ipv6 frame. - * - * Particular offloads may not be compatible with some inet frame layouts, - * for example neither TSO nor CSUM offloads can be performed on fragmented - * ip frames. Even so, an inet frame layout can still be attached and - * provide component offset and lengts for other uses. - * - * Once the inet frame layout is attached to manage the component offsets - * and lengths, the inet frame layout MUST be updated when bytes are inserted - * or removed from the vmk_PktHandle. - * - *- Consistency of the computation of the inet frame layout. - *\n - *\n - * Consistency of the inet frame headers can only be guaranteed when - * the complete inet headers are contained within the frame mapped - * area, since the guest is free to modify other bytes described by - * the vmk_PktHandle. Attempts are made to acquire components of - * the inet headers via copyout of related components, but the guest - * may be able to change portions of the unmapped headers while - * the parsing is in progress.\n - *\n - * For ipv4 frames, the inet frame layout parsing routines require - * the minimum sized ip header to be within the frame mapped area - * Ipv6 headers, however, may be large, with each next header described in - * length and type by the previous. A malicious guest can modify previously - * reviewed portions of the header while parsing is focused on a previous - * portion of the ipv6 header. One approach to prevent this issue - * is to completely map the entire packet. Another approach is to - * compute the inet frame layout, take a partial copy of the frame - * with at the complete inet frame header length, then request the - * recomputation of the inet headers of the partial copy.\n - *\n - * - *- Example Use - *\n - *\n - * Consider inserting bytes ahead of the the ethernet header. - * If the vmk_PktHandle is already writable, and has sufficient - * bytes in the headroom, the vmk_PktInetLayoutIncrIpHdrOffset() can - * be called to both attach and describe the layout change. Otherwise - * a private copy of the original frame needs to be made.\n - *\n - * For the private copy case, - * the original frame inet frame layout needs to be unmodified. - * First, vmk_PktInetLayoutGetInetHeaderLength() - * is called on the original frame to get the inet header's length. - * For this example, assume it returns a non-zero value. A private copy - * is created using vmk_PktPartialCopyWithHeadroom(), using the length - * of the inet headers, and a headroom value of the expected inserted - * length. Next vmk_PktInetLayoutIncrIpHdrOffset() is called on this - * partial copy to describe the new ip header's offset. vmk_PktPullHeadroom() - * is called to pull the headroom into the mapped area, and the new prefix - * is then copied to the front of the frame.\n - * - * - *********************************************************************** - */ -/* - *********************************************************************** - * vmk_PktInetFrameLayoutIsAvailable -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Predicate to determine whether an inet frame layout is - * associated with the pktHandle. - * - * - * \param[in] pkt handle to test for an associated inet frame layout. - * - * \retval VMK_TRUE The pkt handle does have an inet frame - * layout associated. - * - * \retval VMK_FALSE The pkt handles does not have an inet frame - * layout associated. - * - *********************************************************************** - */ -vmk_Bool vmk_PktInetFrameLayoutIsAvailable(vmk_PktHandle *pkt); - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutIncrIpHdrOffset -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Modify the ip header offset within an inet frame layout. - * - * Adjust the location of an ip header withing an associated - * inet frame layout. An inet frame layout is attempted to - * be associated with the frame if one is not already attached. - * The procedure does not modify the contents of the frame, nor does - * it guarantee that the frame mapped area covers the complete inet headers. - * - * When this call succeeds, frame modification can be make while - * preserving the csum and TSO offloads. When the call fails, then the - * caller needs to perform some remediation. - * Remeidation may include using software - * offlaods on the original frame for CSUM or TSO, - * or some other strategy to deal with the inability to - * preserve any requested offloads (for example fragment, or imbed - * the payload in some other transport) to honor the requested - * offload before modifying any frame contents. - * - * Several of the non-VMK_OK return values indicate success, - * indicate the API was able to successfully update the layout, - * but also indicate conditions likely of interest to the - * caller; VMK_BUF_TOO_SMALL and VMK_LIMIT_EXCEEDED. - * - * VMK_BUF_TOO_SMALL successfully updates the frame layout, - * but alerts the caller that the frame layout's - * ip offset is less than the minimim ethernet header length. - * This value is only returned when - * the mtu parameter is non-zero. - * - * The VMK_LIMIT_EXCEEDED is intended to le the caller know that - * the frame needs to be promoted to TSO to allow the offload to - * be preserved, The modification of the frame to enable TSO is - * not performed by the API, but the return code is provided to - * allow the caller to either update or drop the vmk_PktHandle. - * This value is only returned when the 'incr' value is greater - * and zero, and mtu parameter is also non-zero. - * - * Several return values will only occur when the value of the mtu - * parameter is greater than zero. These include VMK_LIMIT_EXCEEDED, - * VMK_BUF_TOO_SMALL, VMK_RESULT_TOO_LARGE - * - * The procedure can be called with a zero incr, and it will - * then attempt to associate an inet layout with the pkt. - * - * \param[in] pkt handle who's ip header location will be modified - * \param[in] incr Positive or negative change in ip header location - * \param[in] mtu MTU (max transmission unit) for this frame. - * - * \retval VMK_OK The location of the ip header has been updated - * \retval VMK_NOT_SUPPORTED The frame contents are not identified - * as an inet frame, the existing layout is invalid. - * \retval VMK_LIMIT_EXCEEDED The location of the ip header has - * been updated, but the MTU has been exceeded. - * This error return code is only returned for - * TCP frames, since these frames can be promoted - * from csum offload to TSO offload. - * If the pkt has csum offload enabled - * (vmk_PktIsMustCsum() is VMK_TRUE), then although - * the ip header has been updated, the frame cannot - * be transmitted. This return value will only - * be returned for positive change values. - * \retval VMK_BUF_TOO_SMALL The location of the ip header has been - * updated, but the resulting location of the ip - * header is now closer to the frame's beginning than - * the minimum ethernet header. The frame cannot - * be transmitted since the new ip header location - * interferes with the ethernet header. This return - * code will only be returned for negative chagne values. - * \retval VMK_NOT_FOUND unable to associate layout information with - * the pkt parameter. - * \retval VMK_EOVERFLOW the resulting change cannot be represented - * by the field used to manage ip hdr offset, - * 'change' has not been applied to the inet layout. - * \retval VMK_RESULT_TOO_LARGE The location of the ip header has - * not been updated, since the size with the new - * length is greater than the MTU, and the protocol - * isn't TCP. - * \retval VMK_FAILURE Unable to save the updated ip hdr offset - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PktInetFrameLayoutIncrIpHdrOffset(vmk_PktHandle *pkt, - vmk_int32 incr, - vmk_uint32 mtu); - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutSetMalformed -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Mark an inet frame layout associated as malformed. - * - * The inet frame layout assocaited with the pktHandle is marked - * as malformed. This API is helpful when a private copy of a - * frame with inet frame layout will be modified resulting in - * frame which is not a recognizable ipv4 or ipv6 frame. - * - * \param[in] pkt handle who's ip header location will be modified - * - * \param[in] createInetLayout if VMK_TRUE an inet layout is associated with - * pkt when none exists, if FALSE, only an existing - * net layout is accessed. - * \retval VMK_OK The pktHandle's inet frame layout has been - * marked as malformed. - * - *********************************************************************** - */ -VMK_ReturnStatus vmk_PktInetFrameLayoutSetMalformed(vmk_PktHandle *pkt, - vmk_Bool createInetLayout); - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutGetIpHdrOffset -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Return the offset of the ip header associated with the pkt. - * - * If the pkt has an ip header offset associated with it, this will - * return that value. - * - * \param[in] pkt handle who's ip hdr offset is to be returned. - * \param[in] createInetLayout if VMK_TRUE an inet layout is associated with - * pkt when none exists, if FALSE, only an existing - * inet layout is accessed. - * - * \return Zero, if not set, otherwise returns the offset of the - * ip header from the front of the frame. Does not guarantee - * that these bytes will be available in the frame mapped area. - * - *********************************************************************** - */ - -vmk_uint32 vmk_PktInetFrameLayoutGetIpHdrOffset(vmk_PktHandle *pkt, - vmk_Bool createInetLayout); - - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutGetIpHdrLength -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Return the length of the ip header associated with the pkt. - * - * If the pkt has an ip header length associated with it, this will - * return that value. - * - * \param[in] pkt handle who's ip hdr length is to be returned. - * \param[in] createInetLayout if VMK_TRUE an inet layout is associated with - * pkt when none exists, if FALSE, only an existing - * inet layout is accessed. - * - * \return Zero, if not set, otherwise returns the length of the - * ip header. Does not guarantee that these bytes will - * be available in the frame mapped area. - * - *********************************************************************** - */ - -vmk_uint32 vmk_PktInetFrameLayoutGetIpHdrLength(vmk_PktHandle *pkt, - vmk_Bool createInetLayout); - - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutGetInetHeaderLength -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Return the length of the sum of all the inet headers. - * - * If the pkt has a layout information associated, this returns the - * length of the sum of all the inet headers - * - * \param[in] pkt handle who's inet header length is to be returned. - * \param[in] createInetLayout if VMK_TRUE an inet layout is associated with - * pkt when none exists, if FALSE, only an existing - * inet layout is accessed. - * - * \return Zero, if not set, otherwise returns the sum of all the - * inet headers from the beginning of the frame. Any - * modifications of the ip header length via - * vmk_PktInetLayoutIncrIpHdrOffset() are included in this - * sum. - * - *********************************************************************** - */ - -vmk_uint32 vmk_PktInetFrameLayoutGetInetHeaderLength(vmk_PktHandle *pkt, - vmk_Bool createInetLayout); - - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutGetL4HdrLength -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Return the L4 header length for the indicated handle. - * - * If the pkt has layout information associated, this returns the - * length of the L4 (TCP, UDP, ICMP, IGMP, etc) header. - * - * For a fragmented IP packet, a length of zero is returned. - * - * \param[in] pkt handle who's L4 header length is to be returned. - * \param[in] createInetLayout if VMK_TRUE an inet layout is associated with - * pkt when none exists, if FALSE, only an existing - * inet layout is accessed. - * - * \return Zero, if not set, otherwise returns the length of L4 - * header in bytes. - * - *********************************************************************** - */ - -vmk_uint32 vmk_PktInetFrameLayoutGetL4HdrLength(vmk_PktHandle *pkt, - vmk_Bool createInetLayout); - - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutGetInetProtocol -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Return the inet protocol of the indicated handle. - * - * \param[in] pkt handle who's inet header length is to be returned. - * \param[in] createInetLayout if VMK_TRUE an inet layout is associated with - * pkt when none exists, if FALSE, only an existing - * inet layout is accessed. - * - * \returns Zero, if not set, otherwise returns the L4 protocol - * type (IPPROTO_TCP, IPPROTO_UCP, etc) - * - *********************************************************************** - */ - -vmk_uint8 vmk_PktInetFrameLayoutGetInetProtocol(vmk_PktHandle *pkt, - vmk_Bool createInetLayout); - - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutGetIsIPV4 -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Return VMK_TRUE if the handle's layout is an ipv4 frame. - * - * \param[in] pkt handle who's inet header length is to be returned. - * \param[in] createInetLayout if VMK_TRUE an inet layout is associated with - * pkt when none exists, if FALSE, only an existing - * inet layout is accessed. - * - * \return VMK_TRUE if the pkt layout is known, and the inet frame - * is an IPV4 frame. VMK_FALSE otherwise. - * - *********************************************************************** - */ - -vmk_Bool vmk_PktInetFrameLayoutGetIsIPV4(vmk_PktHandle *pkt, - vmk_Bool createInetLayout); - - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutGetIsIPV6 -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Return VMK_TRUE if the handle's layout is an ipv6 frame. - * - * \param[in] pkt handle who's inet header length is to be returned. - * \param[in] createInetLayout if VMK_TRUE an inet layout is associated with - * pkt when none exists, if FALSE, only an existing - * inet layout is accessed. - * - * \return VMK_TRUE if the pkt layout is known, and the inet frame - * is an IPV6 frame, VMK_FALSE otherwise - * - *********************************************************************** - */ - -vmk_Bool vmk_PktInetFrameLayoutGetIsIPV6(vmk_PktHandle *pkt, - vmk_Bool createInetLayout); - - -/* - *********************************************************************** - * vmk_PktInetFrameLayoutGetComponents -- */ /** - * - * \ingroup PktIncompatInetFrameLayout - * \brief Provide various inet frame layout components, along with - * a status return. - * - * \param[in] pkt handle inspected for inet frame layout. - * \param[out] ipHdrOffset Reference to vmk_uint32 where the ip header - * offset will be stored when VMK_OK is returned. - * If NULL is passed, this parameter is not referenced. - * \param[out] ipHdrLength Reference to vmk_uint32 where the ip header - * length will be stored when VMK_OK is returned. - * If NULL is passed, this parameter is not referenced. - * \param[out] ipVersion Reference to vmk_uint8 where inet frame - * layout details descriving either ipv4 or - * ipv6 will be stored. '4' indicates ipv4, - * and '6' is stored for ipv6. - * If the inet frame layout is neither an ipv4 - * nor ipv6 frame, VMK_NOT_SUPPORTED will be returned - * as a error condition from the procedure. - * If NULL is passed, this parameter is not referenced. - * \param[out] l4Protocol Reference to vmk_uint8 where the l4 layer - * inet protocol is stored. If not available, - * and requested, VMK_NOT_SUPPORTED will be - * returned. If NULL is pased, this parameter - * is not referenced. - * \retval VMK_OK The inet frame layout is available, and requested - * fields have been populated - * \retval VMK_FAILURE No inet frame layout is associated with the - * pktHandle. - * \retval VMK_NOT_SUPPORTED The inet frame layout cound not be determined - * due to invalid frame contents. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_PktInetFrameLayoutGetComponents(vmk_PktHandle *pkt, - vmk_uint32 *ipHdrOffset, - vmk_uint32 *ipHdrLength, - vmk_uint8 *ipVersion, - vmk_uint8 *l4Protocol); - - -/* - *********************************************************************** - * vmk_PktSetEncapsulatedFrame -- */ /** - * - * \ingroup PktIncompatEncapFrameLayout - * \brief Set the PKT_ENCAP bit to indicate that the packet has an - * encapsulated frame along with setting up and associating - * the encap frame layout for the packet. - * - * \param[in] pkt handle needed for encap frame layout. - * - * \retval VMK_OK The encap frame bit is set, and the Encap - * Frame Layout handle is linked to the pkt. - * \retval VMK_FAILURE No encap frame layout has been registered - * or set up for this pktHandle. - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_PktSetEncapsulatedFrame(vmk_PktHandle *pkt); - - -/* - *********************************************************************** - * vmk_PktIsEncapsulatedFrame -- */ /** - * - * \ingroup PktIncompatEncapFrameLayout - * \brief Check if the pkt has an encapsulated frame layout associated - * with it. - * - * \param[in] pkt handle needed to check for encap frame layout. - * - * \retval VMK_TRUE Pkt has an encapsulated frame. - * \retval VMK_FALSE Pkt does not have an encapsulated frame. - * - *********************************************************************** - */ - -vmk_Bool vmk_PktIsEncapsulatedFrame(const vmk_PktHandle *pkt); - /* *********************************************************************** @@ -1124,6 +477,110 @@ VMK_ReturnStatus vmk_PktSetEncapCsumVfd(vmk_PktHandle *vmkPkt); +/* + *********************************************************************** + * vmk_PktRssHashGet -- */ /** + * + * \ingroup Pkt + * \brief Returns the RSS value and type of the given packet. + * + * \param[in] pkt Target packet. + * \param[out] hash Hash value of the packet. + * \param[out] type Hash type. + * + * \retval VMK_OK RSS hash retrieved successfully. + * \retval VMK_NOT_FOUND No RSS hash present for the packet. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktRssHashGet(vmk_PktHandle *pkt, + vmk_uint32 *hash, + vmk_PktRssType *type); + + +/* + *********************************************************************** + * vmk_PktRssHashSet -- */ /** + * + * \ingroup Pkt + * \brief Sets the RSS hash and type of the given packet. + * + * \param[in] pkt Target packet. + * \param[in] hash New RSS Hash value. + * \param[in] type Hash type. + * + * \retval VMK_OK RSS hash set successfully. + * \retval VMK_BAD_PARAM Input parameter not valid. + * \retval VMK_NO_RESOURCES Error adding packet attribute + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktRssHashSet(vmk_PktHandle *pkt, + vmk_uint32 hash, + vmk_PktRssType type); + + +/* + *********************************************************************** + * vmk_PktRssHashClear -- */ /** + * + * \ingroup Pkt + * \brief Clears the RSS hash of the given packet. + * + * \param[in] pkt Target packet. + * + *********************************************************************** + */ + +void vmk_PktRssHashClear(vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_PktHeaderCacheMarkTainted -- */ /** + * + * \ingroup Pkt + * \brief Marks the packet header cache as tainted. + * + * This is used as a workaround for the fact that 3rd party code might + * be modifying the header cache without updating it. Calling this API + * results in all header cache operations to trigger invalidation of the + * header cache and reparsing headers as a result. + * + * \deprecated + * + * \param[in] pkt Target packet. + * + *********************************************************************** + */ + +void vmk_PktHeaderCacheMarkTainted(vmk_PktHandle *pkt); + + +/* + *********************************************************************** + * vmk_PktPadFrame -- */ /** + * + * \ingroup Pkt + * \brief Pad packet to minimum ethernet frame length. + * + * \note If packet is vlan tagged, add the length of the tag to the + * minimum frame length. + * + * \param[in] pkt Packet to pad. + * + * \retval VMK_OK If pad succeeds. + * \retval VMK_BAD_PARAM Invalid packet handle provided. + * \retval VMK_LIMIT_EXCEEDED Padding requires a new SG element to be + * inserted, exceeding the maximum SG + * elements supported in vmk_PktHandle. + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PktPadFrame(vmk_PktHandle *pkt); + #endif /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pktlist.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pktlist.h index 3c18cfd..e382df4 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pktlist.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pktlist.h @@ -368,7 +368,6 @@ void vmk_PktListIterFree(vmk_PktListIter iter); * vmk_PktListIterStart -- */ /** * * \ingroup PktList - * \ingroup PktList * \brief Set an iterator at the beginning of a packet list. * * \param[in] iter Packet iterator. @@ -629,6 +628,7 @@ VMK_ReturnStatus vmk_PktListIterSplitListAfter(vmk_PktListIter iter, VMK_ReturnStatus vmk_PktListIterSplitListBefore(vmk_PktListIter iter, vmk_PktList *splitList); + /* *********************************************************************** * vmk_PktListClone -- */ /** @@ -707,13 +707,31 @@ void vmk_PktListAppend(vmk_PktList dstList, void vmk_PktListPrepend(vmk_PktList dstList, vmk_PktList srcList); +/* + *********************************************************************** + * vmk_PktListReleaseIRQ -- */ /** + * + * \ingroup PktList + * \brief Release all resources of a given vmk_PktList from an + * interrupt context. + * + * \param[in] pktList Packet List to be released. + * + * \retval None + * + *********************************************************************** + */ + +void vmk_PktListReleaseIRQ(vmk_PktList pktList); + /* *********************************************************************** * vmk_PktListReleaseAllPkts -- */ /** * * \ingroup PktList - * \brief Release all the packets and empty the list. + * \brief Release all the packets and empty the list. This function should + * not be used from a panic context.Use vmk_PktReleasePanic instead. * * \param[in] list Target list * @@ -751,6 +769,28 @@ void vmk_PktListReleaseAllPkts(vmk_PktList list); VMK_ReturnStatus vmk_PktTcpSegmentation(vmk_PktHandle *pkt, vmk_PktList list); +/* + *********************************************************************** + * vmk_PktListSplitBySrcPortID -- */ /** + * + * \brief Split a packet list into two sub list by source port ID. + * + * Go through the packet list till two consecutive pkts have different + * source portIDs and split the list at that point. + * + * \note Caller must initialize outList. + * + * \param[in] pktList The list to split and the remaining packets. + * \param[out] outList The packet list with consecutive source portIDs. + * \param[out] portID The corresponding port ID. + * + *********************************************************************** + */ + +void vmk_PktListSplitBySrcPortID(vmk_PktList pktList, + vmk_PktList outList, + vmk_SwitchPortID *portID); + #endif /* _VMKAPI_NET_PKTLIST_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_poll.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_poll.h index d684fdc..90aa745 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_poll.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_poll.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2006 - 2010 VMware, Inc. All rights reserved. + * Copyright 2006-2010,2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -12,21 +12,21 @@ * \addtogroup Network *@{ * \defgroup NetPoll NetPoll - *@{ + *@{ * - * \par NetPoll: + * \par NetPoll: * - * Create and access poll data structure for network devices. The net + * Create and access poll data structure for network devices. The net * poll routine polls packet from the device and pushes those packets * up the stack. It also performs tx completions for the device. * - * The poll is initialized using vmk_NetPollInit and takes two - * callbacks. The first callback is used to poll packets from the - * network device. Once the packets has been polled, the net poll - * routine will either use the default push processing or call the - * second callback to do custom push processing for these packets. + * The poll is initialized using vmk_NetPollCreate and takes two + * callbacks. The first callback is used to poll packets from the + * network device. Once the packets has been polled, the net poll + * routine will either use the default push processing or call the + * second callback to do custom push processing for these packets. * Once the poll is activated it will run while there are packets to - * be processed. + * be processed. * *********************************************************************** */ @@ -40,40 +40,39 @@ #endif /** \endcond never */ -#include "net/vmkapi_net_types.h" -#include "net/vmkapi_net_uplink.h" -#include "net/vmkapi_net_pktlist.h" +#include "net/vmkapi_net_types.h" +#include "net/vmkapi_net_pktlist.h" -/* - * \ingroup NetPoll. +/** + * \ingroup NetPoll * \brief Net poll features. - */ + */ typedef enum { /** * \brief Use default push routine. */ - VMK_NETPOLL_NONE = 0, + VMK_NETPOLL_NONE = 0, /** - * \brief Use custom push routine. + * \brief Use custom push routine. */ - VMK_NETPOLL_CUSTOM_DELIVERY_CALLBACK = 1, + VMK_NETPOLL_CUSTOM_DELIVERY_CALLBACK = 1, } vmk_NetPollFeatures; -/* - * \ingroup NetPoll. +/** + * \ingroup NetPoll * \brief Net poll state. - */ + */ typedef enum { /** * \brief Net poll is disabled. */ - VMK_NETPOLL_DISABLED = 0, - + VMK_NETPOLL_DISABLED = 0, + /** * \brief Net poll is running or scheduled. */ - VMK_NETPOLL_ACTIVE = 1, + VMK_NETPOLL_ACTIVE = 1, } vmk_NetPollState; @@ -90,13 +89,16 @@ typedef struct vmk_NetPollInt *vmk_NetPoll; * \brief Poll routine for the device * * \param[in] priv Private data structure for device poll routine. + * \param[in] budget Maximum number of packets to be processed in + * each invocation * - * \retval Whether to poll the device for more packets. + * \retval Whether to poll the device for more packets. * *********************************************************************** */ -typedef vmk_Bool (*vmk_NetPollCallback) (void *priv); +typedef vmk_Bool (*vmk_NetPollCallback) (vmk_AddrCookie priv, + vmk_uint32 budget); /* *********************************************************************** @@ -112,12 +114,12 @@ typedef vmk_Bool (*vmk_NetPollCallback) (void *priv); */ typedef void (*vmk_NetPollDeliveryCallback) (vmk_PktList rxPktList, - void *priv); + vmk_AddrCookie priv); -/* - * \ingroup NetPoll. +/** + * \ingroup NetPoll * \brief Net poll initialization variables. - */ + */ typedef struct vmk_NetPollProperties { /** @@ -131,16 +133,16 @@ typedef struct vmk_NetPollProperties { * If this parameter is not NULL and * NETPOLL_CUSTOM_DELIVERY_Callback is set in the * features parameter then packets - * will NOT be pushed up to the vmkernel + * will NOT be pushed up to the vmkernel * networking stack, they will be passed to this * callback instead. - */ + */ vmk_NetPollDeliveryCallback deliveryCallback; /** * \brief Poll private data handler. */ - void *priv; + vmk_AddrCookie priv; /** * \brief Poll features. @@ -153,19 +155,19 @@ typedef struct vmk_NetPollProperties { * vmk_NetPollActivate -- */ /** * * \ingroup NetPoll - * \brief Activate the poll thread. + * \brief Activate the poll thread. * * The poll thread calls the device callback for polling packets. * These packets are pushed up the stack by the default push routine - * or the custom callback used during the initialization. The poll - * thread continues to push packets while the device has pending packets. + * or the custom callback used during the initialization. The poll + * thread continues to push packets while the device has pending packets. * * \param[in] netPoll Handler for the net poll. * * \retval VMK_OK Success. * \retval VMK_INVALID_HANDLE Invalid poll context. * \retval VMK_FAILURE Poll could not be activated. - + *********************************************************************** */ @@ -173,15 +175,15 @@ VMK_ReturnStatus vmk_NetPollActivate(vmk_NetPoll netPoll); /* *********************************************************************** - * vmk_NetPollChangeCallback -- */ /** + * vmk_NetPollDeliveryCallbackSet -- */ /** * * \ingroup NetPoll - * \brief Set new features for net poll handler. + * \brief Set new delivery callback for net poll handler. * - * Net poll routine will use the new callbacks. + * Net poll routine will use the new callbacks. * * \param[in] netPoll Handler for the net poll. - * \param[in] init New properties for the poll handler. + * \param[in] init New properties for the poll handler. * * \retval VMK_OK Success. * \retval VMK_INVALID_HANDLE Invalid poll context. @@ -189,15 +191,35 @@ VMK_ReturnStatus vmk_NetPollActivate(vmk_NetPoll netPoll); *********************************************************************** */ -VMK_ReturnStatus vmk_NetPollChangeCallback(vmk_NetPoll netPoll, - vmk_NetPollProperties *init); +VMK_ReturnStatus vmk_NetPollDeliveryCallbackSet(vmk_NetPoll netPoll, + vmk_NetPollProperties *init); + +/* + *********************************************************************** + * vmk_NetPollDeliveryCallbackClear -- */ /** + * + * \ingroup NetPoll + * \brief Clear new delivery callback for net poll handler. + * + * Net poll routine will use the new callbacks. + * + * \param[in] netPoll Handler for the net poll. + * + * \retval VMK_OK Success. + * \retval VMK_INVALID_HANDLE Invalid poll context. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollDeliveryCallbackClear(vmk_NetPoll netPoll); + /* *********************************************************************** * vmk_NetPollCheckState -- */ /** * * \ingroup NetPoll - * \brief Get the poll state. + * \brief Get the poll state. * * The state indicates whether the poll is active or suspended. * @@ -215,17 +237,20 @@ VMK_ReturnStatus vmk_NetPollCheckState(vmk_NetPoll netPoll, /* *********************************************************************** - * vmk_NetPollCleanup -- */ /** + * vmk_NetPollDestroy -- */ /** * * \ingroup NetPoll - * \brief Remove the poll thread. + * \brief Destroy the poll thread. + * + * Destroys the netpoll synchronously by waiting for any active netpoll + * context to complete processing packets and issueing poll callbacks * * \param[in] netPoll Handler for the net poll. * *********************************************************************** */ -void vmk_NetPollCleanup(vmk_NetPoll netPoll); +void vmk_NetPollDestroy(vmk_NetPoll netPoll); /* ************************************************************************ @@ -234,7 +259,7 @@ void vmk_NetPollCleanup(vmk_NetPoll netPoll); * \ingroup NetPoll * \brief Get the current executing net poll context. * - * \param[out] netPoll Handler for the poll. + * \param[out] netPoll Handler for the poll. * * \retval VMK_OK Success. * \retval VMK_INVALID_HANDLE Invalid poll context. @@ -253,37 +278,40 @@ VMK_ReturnStatus vmk_NetPollGetCurrent(vmk_NetPoll *netPoll); * * \param[in] netPoll Handler for the net poll. * - * \return Void address registered with the + * \return Void address registered with the * device callback. * *********************************************************************** */ -void * vmk_NetPollGetPrivate(vmk_NetPoll netPoll); +vmk_AddrCookie vmk_NetPollGetPrivate(vmk_NetPoll netPoll); /* *********************************************************************** - * vmk_NetPollInit -- */ /** + * vmk_NetPollCreate -- */ /** * - * \brief Initialize a net poll routine + * \brief Create a net poll * - * \param[in] pollInit Poll initialization parameters. - * \param[in] id Vmkernel Service Account. - * \param[out] poll Handler for the Net Poll. + * \param[in] pollInit Poll initialization parameters. + * \param[in] id Vmkernel service account. + * \param[in] moduleID module ID + * \param[out] poll Handler for the net poll. * - * \retval VMK_OK Success. - * \retval VMK_FAILURE Poll initialization failed. + * \retval VMK_OK Success. + * \retval VMK_NO_MEMORY Cannot allocate net poll resource. + * \retval VMK_FAILURE Poll initialization failed. * *********************************************************************** */ -VMK_ReturnStatus vmk_NetPollInit(vmk_NetPollProperties *pollInit, - vmk_ServiceAcctID id, - vmk_NetPoll *poll); +VMK_ReturnStatus vmk_NetPollCreate(vmk_NetPollProperties *pollInit, + vmk_ServiceAcctID id, + vmk_ModuleID moduleID, + vmk_NetPoll *poll); /* *********************************************************************** - * vmk_NetPollQueueRxPkt -- */ /** + * vmk_NetPollRxPktQueue -- */ /** * * \ingroup NetPoll * \brief Queue packets received from the NIC. @@ -299,12 +327,12 @@ VMK_ReturnStatus vmk_NetPollInit(vmk_NetPollProperties *pollInit, *********************************************************************** */ -VMK_ReturnStatus vmk_NetPollQueueRxPkt(vmk_NetPoll netPoll, +VMK_ReturnStatus vmk_NetPollRxPktQueue(vmk_NetPoll netPoll, vmk_PktHandle *pkt); /* *********************************************************************** - * vmk_NetPollQueueCompPkt -- */ /** + * vmk_NetPollQueueCompPkt -- */ /** * * \ingroup NetPoll * \brief Queue packets for tx completion or queue received packets that @@ -321,74 +349,74 @@ VMK_ReturnStatus vmk_NetPollQueueRxPkt(vmk_NetPoll netPoll, *********************************************************************** */ -VMK_ReturnStatus vmk_NetPollQueueCompPkt(vmk_NetPoll netPoll, +VMK_ReturnStatus vmk_NetPollQueueCompPkt(vmk_NetPoll netPoll, vmk_PktHandle *pkt); /* *********************************************************************** - * vmk_NetPollVectorSet -- */ /** + * vmk_NetPollInterruptSet -- */ /** * * \ingroup NetPoll - * \brief Set the associated vector with the poll. + * \brief Set the associated interrupt cookie with the poll. * - * Vmkernel can have an interrupt vector be associated with the network + * Vmkernel can have an interrupt cookie be associated with the network * poll so that the interrupt handler can be affinitized with the poll * routine. * * \param[in] netPoll Handler for the net poll. - * \param[in] vector Interrupt vector. + * \param[in] intrCookie Interrupt cookie. * * \retval VMK_OK Success. * \retval VMK_INVALID_HANDLE Invalid Poll handle. - * \retval VMK_BAD_PARAM If invalid vector specified or vector could - * not be controlled. + * \retval VMK_BAD_PARAM If invalid interrupt cookie specified or + * cookie could not be controlled. * *********************************************************************** */ -VMK_ReturnStatus vmk_NetPollVectorSet(vmk_NetPoll netPoll, - vmk_uint32 vector); +VMK_ReturnStatus vmk_NetPollInterruptSet(vmk_NetPoll netPoll, + vmk_IntrCookie intrCookie); /* *********************************************************************** - * vmk_NetPollVectorUnSet -- */ /** + * vmk_NetPollInterruptUnSet -- */ /** * * \ingroup NetPoll - * \brief Clear the interrupt vector registered with the poll. + * \brief Clear the interrupt cookie registered with the poll. * * \param[in] netPoll Handler for the net poll. - * + * * \retval VMK_OK Success. * \retval VMK_INVALID_HANDLE Invalid Poll handle. * *********************************************************************** */ -VMK_ReturnStatus vmk_NetPollVectorUnSet(vmk_NetPoll netPoll); +VMK_ReturnStatus vmk_NetPollInterruptUnSet(vmk_NetPoll netPoll); /* *********************************************************************** * vmk_NetPollRegisterUplink -- */ /** * * \ingroup NetPoll - * \brief Register the uplink for the poll. + * \brief Register the uplink for the poll. * * Each poll requires uplink port if they are to use the poll callback. - * However if the device provides its own custom callback, no + * However if the device provides its own custom callback, no * registration for uplink is required. * * A poll can have just one uplink be registered. Adding another uplink * will return error. However an uplink can be shared by multiple * net polls. But the uplink can have only one default poll registered. - * The default poll is registered using the defaultPoll during the - * initialization process. Once a default poll is registered it cannot + * The default poll is registered using the defaultPoll during the + * initialization process. Once a default poll is registered it cannot * be overwritten. * * \param[in] netPoll Handler for the net poll. * \param[in] uplink Uplink from where the packets came from. * \param[in] name Descriptive name for the poll. * \param[in] defaultPoll Whether the net poll is default poll for - * the NIC. + * the NIC. * * \retval VMK_OK Success. * \retval VMK_BAD_PARAM Invalid uplink assignment. @@ -401,13 +429,12 @@ VMK_ReturnStatus vmk_NetPollRegisterUplink(vmk_NetPoll netPoll, vmk_Name name, vmk_Bool defaultPoll); - /* *********************************************************************** - * vmk_NetPollUnregisterUplink -- */ /** + * vmk_NetPollUnregisterUplink -- */ /** * * \ingroup NetPoll - * \brief Unregister the uplink for the poll. + * \brief Unregister the uplink for the poll. * * \param[in] netPoll Handler for the net poll. * @@ -421,7 +448,7 @@ VMK_ReturnStatus vmk_NetPollUnregisterUplink(vmk_NetPoll netPoll); /* ************************************************************************ - * vmk_NetPollProcessRx -- */ /** + * vmk_NetPollFlushRx -- */ /** * * \ingroup NetPoll * \brief Process packets stored in the net poll list. @@ -430,9 +457,81 @@ VMK_ReturnStatus vmk_NetPollUnregisterUplink(vmk_NetPoll netPoll); * *********************************************************************** */ - -void vmk_NetPollProcessRx(vmk_NetPoll netPoll); +void vmk_NetPollFlushRx(vmk_NetPoll netPoll); + +/* + *********************************************************************** + * vmk_NetPollRxPktListQueue -- */ /** + * + * \ingroup NetPoll + * \brief Queue a packet list into the poll context + * + * \param[in] netPoll Handler for netpoll + * \param[in] pktList packet list to be queued. + * + * \retval VMK_OK If queueing was successful + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollRxPktListQueue(vmk_NetPoll netPoll, + vmk_PktList pktList); + +/* + *********************************************************************** + * vmk_NetPollCompPktListQueue -- */ /** + * + * \ingroup NetPoll + * \brief Queue a packet list for completion into the poll context + * + * \param[in] netPoll Handler for netpoll + * \param[in] pktList packet list to be queued. + * + * \retval VMK_OK if queueing pkt list for completion was successful + * \retval VMK_FAILURE Otherwise. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_NetPollCompPktListQueue(vmk_NetPoll netPoll, + vmk_PktList pktList); + +/* + *********************************************************************** + * vmk_NetPollDisable -- */ /** + * + * \ingroup NetPoll + * \brief Disable NetPoll + * + * Disables the netpoll synchronously by coordinating with the netpoll + * world/worldet. + * + * \param[in] netPoll Handler for netpoll + * + * \retval None + * + *********************************************************************** + */ +void vmk_NetPollDisable(vmk_NetPoll netPoll); + +/* + *********************************************************************** + * vmk_NetPollEnable -- */ /** + * + * \ingroup NetPoll + * \brief Enable NetPoll + * + * Enables the netpoll and wakes up any waiting world/worldlet. + * + * \param[in] netPoll Handler for netpoll + * + * \retval None + * + *********************************************************************** + */ +void vmk_NetPollEnable(vmk_NetPoll netPoll); #endif /* _VMKAPI_NET_POLL_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_port.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_port.h new file mode 100644 index 0000000..7b9c331 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_port.h @@ -0,0 +1,97 @@ +/*************************************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Port */ /** + * \addtogroup Network + * @{ + * \defgroup Networking Port APIs + * + * The ports on virtual switch provide logical connection points + * among virtual devices and between virtual and physical devices. + * + * In vSphere platform, virtual switch implementation manages ports + * connected to virtual ethernet adapters in guest OSes (vNICs), + * virtual device in vmkernel (vmknic), physical adapters (uplinks), + * and internal ports (i.e. switch management port). + * + * Uplink ports are ports associated with physical adapters, providing + * a connection between a virtual network and a physical network. + * Physical adapters connect to uplink ports when they are initialized + * by a device driver or when the teaming policies for virtual switches + * are reconfigured. Vmkernel and physical adapters provide additional + * features on uplink ports, e.g. netqueue load balancer, IO resource + * management, hardware offloading. + * + * With vmk_SwitchPortID, switch implementation can call port APIs to + * control states and operations of ports, including uplinks. + */ + +#ifndef _VMKAPI_NET_PORT_H_ +#define _VMKAPI_NET_PORT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Client Type for port connected to a vSwitch. + */ + +typedef enum { + /** Unknown type **/ + VMK_PORT_CLIENT_UNKNOWN = 0, + + /** Port connect to a TCPIP stack **/ + VMK_PORT_CLIENT_TCPIP = 1, + + /** Port connected to a vNIC **/ + VMK_PORT_CLIENT_VNIC = 2, + + /** Port connected to a uplink **/ + VMK_PORT_CLIENT_UPLINK = 3, +} vmk_PortClientType; + + + +/* + *********************************************************************** + * vmk_PortGetClientType -- */ /** + * + * \brief Get port client type + * + * \note The caller must hold a handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \note The client type is only available when port connect is + * completed. Query the client during PortConnect callback may + * not return proper value. + * + * \param[in] portID Port identifier + * \param[out] type will contain vmk_PortClientType + * if return VMK_OK. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM type is NULL. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + *********************************************************************** + */ + +VMK_ReturnStatus +vmk_PortGetClientType(vmk_SwitchPortID portID, + vmk_PortClientType *type); + +#endif /* _VMKAPI_NET_PORT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_port_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_port_incompat.h new file mode 100644 index 0000000..5bedf37 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_port_incompat.h @@ -0,0 +1,232 @@ +/*************************************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Port */ /** + * \addtogroup Network + *@{ + * \addtogroup Networking Port APIs + * @{ + * \defgroup PortIncompat Port APIs + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_PORT_INCOMPAT_H_ +#define _VMKAPI_NET_PORT_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/* + *********************************************************************** + * vmk_PortIsServicePort -- */ /** + * + * \brief Return if a port is a service port or not + * + * \note The caller must hold at least an immutable handle for the + * portset associated with the specified portID. + * + * \note This function will not block. + * + * \note The client type is only available when port connect is + * completed. Query the client during PortConnect callback may + * not return proper value. + * + * \param[in] portID Port identifier + * \param[out] isServicePort VMK_TRUE if port is service port, + * VMK_FALSE if not. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM PortID is VMK_VSWITCH_INVALID_PORT_ID + * or isServicePort is NULL. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortIsServicePort(vmk_SwitchPortID portID, + vmk_Bool *isServicePort); + + +/* + *********************************************************************** + * vmk_PortSetServicePort -- */ /** + * + * \brief Change a port to service port + * + * \note The caller must hold a mutable handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \note The client type is only available when port connect is + * completed. Query the client during PortConnect callback may + * not return proper value. + * + * \param[in] portID Port identifier + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM PortID is VMK_VSWITCH_INVALID_PORT_ID. + * \retval VMK_NOT_SUPPORTED If the matching port is vNic or uplink. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortSetServicePort(vmk_SwitchPortID portID); + + +/* + *********************************************************************** + * vmk_PortClearServicePort -- */ /** + * + * \brief Change a port from service port to regular port + * + * \note The caller must hold a mutable handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \note The client type is only available when port connect is + * completed. Query the client during PortConnect callback may + * not return proper value. + * + * \param[in] portID Port identifier + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM PortID is VMK_VSWITCH_INVALID_PORT_ID. + * \retval VMK_NOT_SUPPORTED If the matching port is vNic or uplink. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortClearServicePort(vmk_SwitchPortID portID); + + +/* + *********************************************************************** + * vmk_PortEnable -- */ /** + * + * \brief Enable the given port making it ready to send and receive + * packet. + * + * \note The caller must hold a mutable handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \param[in] portID Port identifier + * + * \retval VMK_OK Port is enabled successfully. + * \retval VMK_IS_ENABLED Port is already enabled. + * \retval VMK_BAD_PARAM PortID is VMK_VSWITCH_INVALID_PORT_ID. + * \retval VMK_FAILURE Enabling the port fails. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortEnable(vmk_SwitchPortID portID); + + +/* + *********************************************************************** + * vmk_PortDisable -- */ /** + * + * \brief Disable the given port. + * + * \note The caller must hold a mutable handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \param[in] portID Port identifier + * + * \retval VMK_OK Port is disabled successfully. + * \retval VMK_IS_DISABLED Port is already disabled. + * \retval VMK_BAD_PARAM PortID is VMK_VSWITCH_INVALID_PORT_ID. + * \retval VMK_FAILURE Disabling the port fails. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortDisable(vmk_SwitchPortID portID); + + +/* + *********************************************************************** + * vmk_PortsBelongToSamePortset -- */ /** + * + * \brief Check if two ports belong to same portset. + * + * \note The caller isn't required to hold any handle for the portset + * associated with either one of the specified portIDs. + * + * \note This function will not block. + * + * \param[in] portID1 Port identifier for the first port. + * \param[in] portID2 Port identifier for the second port. + * \param[out] result VMK_TRUE if the two ports belong to + * same portset, VMK_FALSE otherwise. + * + * \retval VMK_OK The check completes successfully. + * \retval VMK_BAD_PARAM One or both port IDs are invalid, or + * result is NULL. + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsBelongToSamePortset(vmk_SwitchPortID portID1, + vmk_SwitchPortID portID2, + vmk_Bool *result); + + +/* + *********************************************************************** + * vmk_PortPktAllocForTx -- */ /** + * + * \brief Allocate a TX packet for specific port. + * + * Allocate a vmk_PktHandle for TX, preallocating headroom to be used in + * later data path functions. The headroom length reserved inside the + * packet handle allocated is determined by parameter headroomLen + * passed to vmkapi vmk_PortSetHeadroomLen(). + * + * \note The caller must hold at least an immutable handle for the + * portset associated with the specified portID. + * + * \note This function will not block. + * + * \param[in] portID Port identifier to allocate packet for. + * \param[in] length Length of packet to be allocated in + * bytes. + * \param[out] pkt Handle to the packet allocated. + * + * \retval VMK_OK The packet is allocated successfully. + * \retval VMK_BAD_PARAM Invalid portID or pkt pointer provided. + * \retval VMK_NOT_FOUND The port with specific ID is not found. + * \retval VMK_NO_MEMORY VMkernel has insufficient memory to + * fulfill this request. + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortPktAllocForTx(vmk_SwitchPortID portID, + vmk_ByteCountSmall length, + vmk_PktHandle **pkt); + +#endif /* _VMKAPI_NET_PORT_INCOMPAT_H_ */ +/** @} */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset.h new file mode 100644 index 0000000..e67c3e1 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset.h @@ -0,0 +1,221 @@ + +/* ********************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Portset */ /** + * \addtogroup Network + * @{ + * \defgroup Portset Interface + * + * Portsets are groups of ports which, together with policies for frame + * routing, form virtual networks. Virtual nics connected to the ports + * may forward packets to each other. The analogy is to a box (like a + * a hub or a switch) containing some type of backplane for connecting + * multiple ports in the physical world. + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_PORTSET_H_ +#define _VMKAPI_NET_PORTSET_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" +#include "net/vmkapi_net_uplink.h" + + +/* + *********************************************************************** + * vmk_PortsetAddUplink -- */ /** + * + * \brief Request to add an uplink to a portset. + * + * An vswitch implementation can use this API to add a named uplink to a + * named portset. + * + * Vmkernel will connect the uplink to the relevant portset and enable + * the port if connection is successful. + * + * \note This API is not to be used for VDS based vswitch. The operation + * will be triggered automatically from user space for VDS vswitch. + * + * \note If the uplink is already associated with a vSwitch, the operation + * may fail. + * + * \note The portset must be activated. + * + * \note Shouldn't be holding any handles to the portset. + * + * \note This function will not block. + * + * \param[in] psName portset name. + * \param[in] uplinkDevName uplink device name (vmnic*) + * \param[out] portID This is optional, the portID the uplink + * connect to. + * + * \retval VMK_BAD_PARAM psName or uplinkDevName is NULL. + * \retval VMK_NOT_FOUND uplinkDevName not found + * \retval VMK_BUSY the uplink already connected to a portset + * \retval VMK_LIMIT_EXCEEDED no more port for the uplink. + * \retval VMK_NO_MEMORY memory allocation failure + * \retval VMK_OK Successfully add the uplink to the + * portset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetAddUplink(char *psName, + char *uplinkDevName, + vmk_SwitchPortID *portID); + +/* + *********************************************************************** + * vmk_PortsetRemoveUplink -- */ /** + * + * \brief Request to remove an uplink from a portset. + * + * An vswitch implementation can use this API to remove a named uplink + * from a named portset. + * + * Vmkernel will disable the uplink and disconnect from the relevant + * portset. + * + * \note This API is not to be used for VDS based vswitch. The operation + * will be triggered automatically from user space. + * + * \note Shouldn't be holding any handles to the portset. + * + * \note The portset must be activated. + * + * \note This function will not block. + * + * \param[in] psName portset name. + * \param[in] uplinkDevName uplink device name (vmnic*) + * + * \retval VMK_BAD_PARAM psName or uplinkDevName is NULL. + * \retval VMK_NOT_FOUND named portset not found + * \retval VMK_FAILURE other errors. + * \retval VMK_OK The relevant uplink is removed from the + * portset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetRemoveUplink(char *psName, + char *uplinkDevName); + + +/* + *********************************************************************** + * vmk_PortsetCreate -- */ /** + * + * \brief Request to create a portset + * + * External module can use this API to create a portset with a specific + * calass. + * + * Vmkernel will create and activate a portset + * + * \note This API is not to be used for VDS based vswitch. The operation + * will be triggered automatically from user space. + * + * \note Shouldn't be holding any handles to the portset. + * + * \note This function will not block. + * + * \param[in] psName portset name. + * \param[in] className portset class name. + * \param[in] numPorts number of ports the new portset supports. + * \param[in] flags reserved, set to zero + * + * \retval VMK_BAD_PARAM psName or className is NULL or className + * is null string + * \retval VMK_NOT_SUPPORTED The request portset class not found + * \retval VMK_EXIST portset with the request psName exists. + * \retval VMK_NO_RESOURCES no free portset available. + * \retval VMK_LIMIT_EXCEEDED the request numPort exceed the supported + * limit. + * \retval VMK_NO_MEMORY memory allocation failure + * \retval VMK_OK Successfully create a portset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetCreate(char *psName, + char *className, + vmk_uint32 numPorts, + vmk_uint32 flags); + +/* + *********************************************************************** + * vmk_PortsetDestroy -- */ /** + * + * \brief Request to destroy a portset + * + * External module can use this API to destroy a named portset. + * + * VMKernel will try to first disconnect all ports and deactivate the + * portset. + * + * \note This API is not to be used for VDS based vswitch. The operation + * will be triggered automatically from user space. + * + * \note Shouldn't be holding any handles to the portset. + * + * \note This function will not block. + * + * \note All connected port will be disconnected. Normally the caller + * shoild make sure all clients are disabled and disconnected. + * + * \param[in] psName portset name. + * + * \retval VMK_BAD_PARAM psName is NULL or length is too large. + * \retval VMK_NOT_FOUND named portset not found + * \retval VMK_OK Successfully destroyed the portset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PortsetDestroy(char *psName); + + +/* + *********************************************************************** + * vmk_PortsetGetMTU -- */ /** + * + * \brief Get MTU setting on a portset + * + * \nativedriversdisallowed + * + * \note This function will not block. + * + * \note The caller should hold at least an immutable portset handle + * + * \param[in] ps Handle to a portset + * \param[out] mtu MTU setting on the portset + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM An argument is NULL. + * \retval VMK_FAILURE Improper portset handle is held + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_PortsetGetMTU(vmk_Portset *ps, + vmk_uint32 *mtu); + +#endif /* _VMKAPI_NET_PORTSET_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_incompat.h new file mode 100644 index 0000000..b279a91 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_incompat.h @@ -0,0 +1,127 @@ +/* ********************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * PortsetIncompat */ /** + * \addtogroup Network + * @{ + * \defgroup PortsetIncompat Incompatible Portset Interface + * + * @{ + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_PORTSET_INCOMPAT_H_ +#define _VMKAPI_NET_PORTSET_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" +#include "vds/vmkapi_vds_portset.h" + +/* + *********************************************************************** + * vmk_PortsetFunction -- */ /** + * + * \brief Callback type for function called by vmk_PortsetForAllPortsets. + * + * \nativedriversdisallowed + * + * \note The context of portset handle is same as the context paramater + * passed to vmk_PortsetForAllPortsets(). + * + * \note This function must not release the portset handle. + * + * \note This function will not block. + * + * \param[in] ps Handle to a portset. + * \param[in] arg User-specified argument for operation + * (callback context cookie) + * + * \retval VMK_OK Success. + * \retval Other status Implementation specific error code. + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_PortsetFunction)(vmk_Portset *ps, + vmk_AddrCookie arg); + + +/* + *********************************************************************** + * vmk_PortsetForAllPortsets -- */ /** + * + * \brief Iterate over all in-use ports. + * + * \nativedriversdisallowed + * + * This function iterates over all in-use portsets in vmkernel, calling + * the specified function on each portset under requested context. + * + * \note This function will abort port traversal if func returns any + * value other than VMK_OK. + * + * \note This function will not block. + * + * \param[in] context Request portset handle context + * \param[in] func Operation to be performed + * \param[in] arg User-specified callback context cookie, + * passed to func for each portset. + * + * \retval VMK_OK If func returns VMK_OK on all ports. + * \retval VMK_BAD_PARAM Either func is NULL or context is + * invalid. + * \retval Other status Implementation specific error code from + * func. + *********************************************************************** + */ +VMK_ReturnStatus vmk_PortsetForAllPortsets(vmk_PortsetHandleContext context, + vmk_PortsetFunction func, + vmk_AddrCookie arg); + + +/* + *********************************************************************** + * vmk_PortsetFindByPortID -- */ /** + * + * \brief Find a portset handle by specific port ID. + * + * \nativedriversdisallowed + * + * This function returns the portset handle associated with the specifc + * port. Caller can retrieve the handle to portset in callbacks like + * vmk_IOChainFunc(), where the portset handle is held by not provided. + * The context of the returned portset handle is same as caller's. + * + * \note Caller must hold at least an immutable handle to the portset + * associated with specific port ID. + * + * \note Caller should not call vmk_PortsetRelease() to release the + * returned portset handle after finish using it. + * + * \note This function will not block. + * + * \param[in] portID Numeric ID of a virtual port. + * \param[out] ps The portset handle returned. + * + * \retval VMK_OK The portset handle retrieved + * successfully. + * \retval VMK_BAD_PARAM Either portID or ps is invalid. + * \retval VMK_NOT_FOUND The portset handle not found. + *********************************************************************** + */ +VMK_ReturnStatus vmk_PortsetFindByPortID(vmk_SwitchPortID portID, + vmk_Portset **ps); + +#endif /* _VMKAPI_NET_PORTSET_INCOMPAT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_message.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_message.h index 603974c..8f33bf3 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_message.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_message.h @@ -149,6 +149,8 @@ typedef void (*vmk_PortsetMessageCB)(vmk_SwitchPortID portID, * * \brief Register a handler to receive portset message notifications. * + * \nativedriversdisallowed + * * \note These are asynchronous message notifications, meaning that the * message handler should examine the port to determine current * state at the time the callback is made. @@ -196,16 +198,18 @@ VMK_ReturnStatus vmk_PortsetRegisterMessageCB( *********************************************************************** * vmk_PortsetUnregisterMessageCB -- */ /** * - * \brief Unregister a handler to receive portset message - * notifications. + * \brief Unregister a handler to receive portset message + * notifications. * - * \note Caller must not hold any portset handle. + * \nativedriversdisallowed * - * \param[in] handle Handle returned from registration + * \note Caller must not hold any portset handle. * - * \retval VMK_OK Unregistering succeeded - * \retval VMK_BAD_PARAM Invalid parameter - * \retval VMK_FAILURE Otherwise + * \param[in] handle Handle returned from registration + * + * \retval VMK_OK Unregistering succeeded + * \retval VMK_BAD_PARAM Invalid parameter + * \retval Other status Unregistering failed * *********************************************************************** */ @@ -219,6 +223,8 @@ VMK_ReturnStatus vmk_PortsetUnregisterMessageCB( * * \brief Send an asynchronous message to portset * + * \nativedriversdisallowed + * * Send a message to global or portset specific message subscribers. * Subscriber message handler will be called after this function * returns. diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_message_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_message_incompat.h deleted file mode 100644 index d607962..0000000 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_portset_message_incompat.h +++ /dev/null @@ -1,158 +0,0 @@ - -/* ********************************************************** - * Copyright 2011 VMware, Inc. All rights reserved. - * **********************************************************/ - -/* - * @VMKAPIMOD_LICENSE@ - */ - -/* - *********************************************************************** - * Portset Incompatible Messages */ /** - * \addtogroup PortsetMessage - * @{ - * - * \defgroup PortsetMsgIncompat Portset Incompatible Messages - * - * Definition of incompatible portset messages - * @{ - * - *********************************************************************** - */ - -#ifndef _VMKAPI_NET_PORTSET_MESSAGE_INCOMPAT_H_ -#define _VMKAPI_NET_PORTSET_MESSAGE_INCOMPAT_H_ - -/** \cond never */ -#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H -#error This vmkapi file should never be included directly but only via vmkapi.h -#endif -/** \endcond never */ - -#include "vds/vmkapi_vds_lacp_incompat.h" - -/** Enable LACP on a portset */ -#define VMK_PORTSET_MSG_LACP_ENABLE "portset.lacp.enable" - -/** Disable LACP on a portset */ -#define VMK_PORTSET_MSG_LACP_DISABLE "portset.lacp.disable" - -/** Change uplink state to LACP port up in a LAG */ -#define VMK_PORTSET_MSG_LACP_PORT_UP "portset.lacp.portup" - -/** Change uplink state to LACP port down in a LAG */ -#define VMK_PORTSET_MSG_LACP_PORT_DOWN "portset.lacp.portdown" - -/** LACP message */ -struct vmk_LACPMessage; - -/* - *********************************************************************** - * vmk_LACPMessageCompletionCB -- */ /** - * - * \brief Handler to call when ESX completes processing a LACP message - * - * LACP message can be posted to vmkernel via vmk_PortsetPostMessage, - * which will return to the caller right away. LACP message will be - * processed later. Once vmkernel finishes processing, it will call - * this handler specified in LACP message. Then caller can proceed - * message processing, like checking error code or cleaning up memory. - * - * \note No portset handle is held when handler is called. - * - * \param[in] msg LACP message being completed, allocated by - * vmkernel. Handler should not free its memory. - * \param[in] status LACP message processing return status. - * - * \retval None - *********************************************************************** - */ -typedef void (*vmk_LACPMessageCompletionCB)(struct vmk_LACPMessage *msg, - VMK_ReturnStatus status); - -/** - * \brief Cause identifier of LACP port up/down message - */ -typedef enum vmk_LACPCauseID { - /** None */ - VMK_LACP_CAUSE_NONE = 0, - - /** LACP message caused by uplink speed change */ - VMK_LACP_CAUSE_SPEED_CHANGE, - - /** LACP message caused by uplink duplex change */ - VMK_LACP_CAUSE_DUPLEX_CHANGE, - - /** LACP message caused by uplink physical link up */ - VMK_LACP_CAUSE_LINK_UP, - - /** LACP message caused by uplink physical link down */ - VMK_LACP_CAUSE_LINK_DOWN, - - /** LACP message caused by administrator blocking uplink */ - VMK_LACP_CAUSE_BLOCKED, - - /** LACP message caused by administrator unblocking uplink */ - VMK_LACP_CAUSE_UNBLOCKED, - - /** LACP message caused by no response from peer */ - VMK_LACP_CAUSE_PEER_NO_RESPONSE, - - /** LACP message caused by uplink connected to portset */ - VMK_LACP_CAUSE_PORT_CONNECTED, - - /** LACP message caused by uplink disconnected from portset */ - VMK_LACP_CAUSE_PORT_DISCONNECTED, -} vmk_LACPCauseID; - -/** - * \brief Data associated with LACP message - */ -typedef struct vmk_LACPMessage { - /** size of this structure, must be sizeof(vmk_LACPMessage) */ - vmk_uint32 size; - - /** Name of portset message will be sent to */ - vmk_Name portsetName; - - /** LAG ID, for future use, must set to 0 */ - vmk_uint32 lagID; - - /** - * The mode LACP will run in. It must be either VMK_LACP_MODE_ACTIVE - * or VMK_LACP_MODE_PASSIVE in LACP enable message. It must be - * VMK_LACP_MODE_DISABLE in LACP disable message. It is ignored in - * other LACP messages - */ - vmk_LACPMode mode; - - /** - * Name of uplink where the message regarding to. It can't be - * empty for message VMK_PORTSET_MSG_LACP_PORT_UP and - * VMK_PORTSET_MSG_LACP_PORT_DOWN. It is ignored in message - * VMK_PORTSET_MSG_LACP_ENABLE and VMK_PORTSET_MSG_LACP_DISABLE. - */ - vmk_Name uplinkName; - - /** - * Cause identifier of this message, it must be VMK_LACP_CAUSE_NONE - * for message VMK_PORTSET_MSG_LACP_ENABLE and - * VMK_PORTSET_MSG_LACP_DISABLE. It can be any vmk_LACPCauseID - * except VMK_LACP_CAUSE_NONE for other messages - */ - vmk_LACPCauseID causeID; - - /** - * LACP message completion callback handler, if not NULL, it will be - * called once vmkernel finishes processing this message - */ - vmk_LACPMessageCompletionCB completionCB; - - /** custom completion data associated with this message */ - void *completionCBData; -} vmk_LACPMessage; - -#endif /* _VMKAPI_NET_PORTSET_MESSAGE_INCOMPAT_H_ */ -/** @} */ -/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_proto.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_proto.h new file mode 100644 index 0000000..c2218c6 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_proto.h @@ -0,0 +1,696 @@ +/* ********************************************************** + * Copyright 2011 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * NetProto */ /** + * \addtogroup Network + *@{ + * \defgroup NetProto Network protocol header definitions + *@{ + * + *********************************************************************** + */ +#ifndef _VMKAPI_NET_PROTO_H_ +#define _VMKAPI_NET_PROTO_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + + +#define VMK_ETH_ADDR_FMT_STR "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx" +#define VMK_ETH_ADDR_FMT_ARGS(addrPtr) ((vmk_uint8 *) (addrPtr))[0],\ + ((vmk_uint8 *) (addrPtr))[1],\ + ((vmk_uint8 *) (addrPtr))[2],\ + ((vmk_uint8 *) (addrPtr))[3],\ + ((vmk_uint8 *) (addrPtr))[4],\ + ((vmk_uint8 *) (addrPtr))[5] +#define VMK_ETH_PTR_ADDR_FMT_ARGS(addrPtr) &((vmk_uint8 *) (addrPtr))[0],\ + &((vmk_uint8 *) (addrPtr))[1],\ + &((vmk_uint8 *) (addrPtr))[2],\ + &((vmk_uint8 *) (addrPtr))[3],\ + &((vmk_uint8 *) (addrPtr))[4],\ + &((vmk_uint8 *) (addrPtr))[5] + +#define VMK_IPV4_ADDR_FMT_STR "%u.%u.%u.%u" +#define VMK_IPV4_ADDR_FMT_STR_ARGS(val) ((vmk_BE32ToCPU((vmk_uint32) (val)) >> 24) & 0xFF),\ + ((vmk_BE32ToCPU((vmk_uint32) (val)) >> 16) & 0xFF),\ + ((vmk_BE32ToCPU((vmk_uint32) (val)) >> 8) & 0xFF),\ + (vmk_BE32ToCPU((vmk_uint32) (val)) & 0xFF) + +#define VMK_IPV6_ADDR_FMT_STR "%08x:%08x:%08x:%08x" +#define VMK_IPV6_ADDR_FMT_STR_ARGS(addrPtr) vmk_BE32ToCPU(((vmk_uint32 *) (addrPtr))[0]),\ + vmk_BE32ToCPU(((vmk_uint32 *) (addrPtr))[1]),\ + vmk_BE32ToCPU(((vmk_uint32 *) (addrPtr))[2]),\ + vmk_BE32ToCPU(((vmk_uint32 *) (addrPtr))[3]) + + +/** + * \brief Ethernet type used in the ethernet header. + */ +typedef enum vmk_EthType { + /** Internet protocol version 4. */ + VMK_ETH_TYPE_IPV4 = 0x0800, + /** Address resolution protocol. */ + VMK_ETH_TYPE_ARP = 0x0806, + /** Cisco discovery protocol. */ + VMK_ETH_TYPE_CDP = 0x2000, + /** Transparent interconnection of lots of links. */ + VMK_ETH_TYPE_TRILL = 0x22f3, + /** Transparent Ethernet Bridging. */ + VMK_ETH_TYPE_TRANSPARENT_ETH = 0x6558, + /** Reverse address resolution protocol. */ + VMK_ETH_TYPE_RARP = 0x8035, + /** Apple talk. */ + VMK_ETH_TYPE_ATALK = 0x809b, + /** Apple address resolution protocol. */ + VMK_ETH_TYPE_AARP = 0x80f3, + /** Virtual LAN (IEEE 802.1q). */ + VMK_ETH_TYPE_VLAN = 0x8100, + /** Internetwork packet exchange (alt). */ + VMK_ETH_TYPE_IPX_ALT = 0x8137, + /** Internetwork packet exchange. */ + VMK_ETH_TYPE_IPX = 0x8138, + /** SNMP over ethernet. */ + VMK_ETH_TYPE_SNMP = 0x814c, + /** Internet protocol version 6. */ + VMK_ETH_TYPE_IPV6 = 0x86dd, + /** Slow protocols (IEEE 802.3). */ + VMK_ETH_TYPE_SLOW = 0x8809, + /** Multiprotocol label switching (unicast). */ + VMK_ETH_TYPE_MPLS_UNICAST = 0x8847, + /** Multiprotocol label switching (multicast). */ + VMK_ETH_TYPE_MPLS_MULTICAST = 0x8847, + /** PPP over ethernet (discovery). */ + VMK_ETH_TYPE_PPPOE_DISCOVERY = 0x8863, + /** PPP over ethernet (session). */ + VMK_ETH_TYPE_PPPOE_SESSION = 0x8864, + /** Jumbo frames. */ + VMK_ETH_TYPE_JUMBO = 0x8870, + /** Provider bridging (IEEE 802.3ad). */ + VMK_ETH_TYPE_PROVIDER_BRIDGING = 0x88a8, + /** Low level discovery protocol. */ + VMK_ETH_TYPE_LLDP = 0x88cc, + /** Akimbi frames, (VMware VMlab). */ + VMK_ETH_TYPE_AKIMBI = 0x88de, + /** Fiber channel over ethernet. */ + VMK_ETH_TYPE_FCOE = 0x8906, + /** Fiber channel over ethernet (init). */ + VMK_ETH_TYPE_FCOE_INIT = 0x8914, + /** VMware ESX beacon probing. */ + VMK_ETH_TYPE_VMWARE = 0x8922, + /** QinQ tagging (IEEE 802.1ad). */ + VMK_ETH_TYPE_QINQ = 0x9100, + /** DVfilter. */ + VMK_ETH_TYPE_DVFILTER = 0xdfdf, +} vmk_EthType; + + +/** + * \brief Ethernet type used in the ethernet header, in network byte order. + */ +typedef enum { + /** Internet protocol version 4 (in net order). */ + VMK_ETH_TYPE_IPV4_NBO = 0x0008, + /** Address resolution protocol (in net order). */ + VMK_ETH_TYPE_ARP_NBO = 0x0608, + /** Cisco discovery protocol (in net order). */ + VMK_ETH_TYPE_CDP_NBO = 0x0020, + /** Transparent interconnection of lots of links (in net order). */ + VMK_ETH_TYPE_TRILL_NBO = 0xf322, + /** Transparent Ethernet Bridging (in net order). */ + VMK_ETH_TYPE_TRANSPARENT_ETH_NBO = 0x5865, + /** Reverse address resolution protocol (in net order). */ + VMK_ETH_TYPE_RARP_NBO = 0x3580, + /** Apple talk (in net order). */ + VMK_ETH_TYPE_ATALK_NBO = 0x9b80, + /** Apple address resolution protocol (in net order). */ + VMK_ETH_TYPE_AARP_NBO = 0xf380, + /** Virtual LAN (IEEE 802.1q) (in net order). */ + VMK_ETH_TYPE_VLAN_NBO = 0x0081, + /** Internetwork packet exchange (alt) (in net order). */ + VMK_ETH_TYPE_IPX_ALT_NBO = 0x3781, + /** Internetwork packet exchange (in net order). */ + VMK_ETH_TYPE_IPX_NBO = 0x3881, + /** SNMP over ethernet (in net order). */ + VMK_ETH_TYPE_SNMP_NBO = 0x4c81, + /** Internet protocol version 6 (in net order). */ + VMK_ETH_TYPE_IPV6_NBO = 0xdd86, + /** Slow protocols (IEEE 802.3) (in net order). */ + VMK_ETH_TYPE_SLOW_NBO = 0x0988, + /** Multiprotocol label switching (unicast) (in net order). */ + VMK_ETH_TYPE_MPLS_UNICAST_NBO = 0x4788, + /** Multiprotocol label switching (multicast) (in net order). */ + VMK_ETH_TYPE_MPLS_MULTICAST_NBO = 0x4788, + /** PPP over ethernet (discovery) (in net order). */ + VMK_ETH_TYPE_PPPOE_DISCOVERY_NBO = 0x6388, + /** PPP over ethernet (session) (in net order). */ + VMK_ETH_TYPE_PPPOE_SESSION_NBO = 0x6488, + /** Jumbo frames (in net order). */ + VMK_ETH_TYPE_JUMBO_NBO = 0x7088, + /** Provider bridging (IEEE 802.3ad) (in net order). */ + VMK_ETH_TYPE_PROVIDER_BRIDGING_NBO = 0xa888, + /** Low level discovery protocol (in net order). */ + VMK_ETH_TYPE_LLDP_NBO = 0xcc88, + /** Akimbi frames, (VMware VMlab) (in net order). */ + VMK_ETH_TYPE_AKIMBI_NBO = 0xde88, + /** Fiber channel over ethernet (in net order). */ + VMK_ETH_TYPE_FCOE_NBO = 0x0689, + /** Fiber channel over ethernet (init) (in net order). */ + VMK_ETH_TYPE_FCOE_INIT_NBO = 0x1489, + /** VMware ESX beacon probing (in net order). */ + VMK_ETH_TYPE_VMWARE_NBO = 0x2289, + /** QinQ tagging (IEEE 802.1ad) (in net order). */ + VMK_ETH_TYPE_QINQ_NBO = 0x0091, + /** DVfilter (in net order). */ + VMK_ETH_TYPE_DVFILTER_NBO = 0xdfdf, +} vmk_EthTypeNBO; + + +/** + * \brief IP protocol numbers, used in IPv4 and IPv6 headers. + */ +typedef enum { + /** IPv6 hop-by-hop options. */ + VMK_IP_PROTO_IPV6_HOPOPT = 0x00, + /** Internet control message protocol version 4. */ + VMK_IP_PROTO_ICMPV4 = 0x01, + /** Internet group management protocol. */ + VMK_IP_PROTO_IGMP = 0x02, + /** Internet protocol version 4. */ + VMK_IP_PROTO_IPV4 = 0x04, + /** Transmission control protocol. */ + VMK_IP_PROTO_TCP = 0x06, + /** Exterior gateway protocol. */ + VMK_IP_PROTO_EGP = 0x08, + /** Interior gateway protocol. */ + VMK_IP_PROTO_IGP = 0x09, + /** User datagram protocol. */ + VMK_IP_PROTO_UDP = 0x11, + /** Internet protocol version 6. */ + VMK_IP_PROTO_IPV6 = 0x29, + /** IPv6 routing option. */ + VMK_IP_PROTO_IPV6_ROUTE = 0x2b, + /** IPv6 fragment option. */ + VMK_IP_PROTO_IPV6_FRAG = 0x2c, + /** Generic routing encapsulation. */ + VMK_IP_PROTO_GRE = 0x2f, + /** Encapsulating security payload. */ + VMK_IP_PROTO_ESP = 0x32, + /** Authentication header. */ + VMK_IP_PROTO_AH = 0x33, + /** Internet control message protocol version 6. */ + VMK_IP_PROTO_ICMPV6 = 0x3a, + /** IPv6 no next header. */ + VMK_IP_PROTO_IPV6_NONXT = 0x3b, + /** IPv6 destination options. */ + VMK_IP_PROTO_IPV6_DSTOPTS = 0x3c, + /** Enhanced interior gateway routing protocol. */ + VMK_IP_PROTO_EIGRP = 0x58, + /** Open shortest path first. */ + VMK_IP_PROTO_OSPF = 0x59, + /** IP over IP. */ + VMK_IP_PROTO_IPIP = 0x5e, + /** Protocol independant multicast. */ + VMK_IP_PROTO_PIM = 0x67, + /** Virtual router redundancy protocol. */ + VMK_IP_PROTO_VRRP = 0x70, + /** Layer 2 tunneling protocol. */ + VMK_IP_PROTO_L2TP = 0x73, + /** Mobility IP. */ + VMK_IP_PROTO_MOB = 0x87, + /** Host identity protocol. */ + VMK_IP_PROTO_HIP = 0x8b, +} vmk_IPProto; + + +/** + * \brief Ethernet header. + */ +typedef struct vmk_EthHdr { + /** Destination MAC address. */ + vmk_uint8 daddr[6]; + /** Source MAC address. */ + vmk_uint8 saddr[6]; + /** Ethernet type of the payload. */ + vmk_uint16 type; +} VMK_ATTRIBUTE_PACKED vmk_EthHdr; + + +/** + * \brief VLAN header, inserted after the type field of regular ethernet frames. + */ +typedef struct vmk_VLANHdr { + /** High four bits of the VLAN ID. */ + vmk_uint8 vlanIDHigh:4; + /** This field has two different interpretations. */ + union { + /** The MAC addresses are in canonical format. */ + vmk_uint8 canonical:1; + /** The frame is eligible to be dropped in the presence of congestion. */ + vmk_uint8 dropEligible:1; + }; + /** Priority tag. */ + vmk_uint8 priority:3; + /** Low eight bits of the VLAN ID. */ + vmk_uint8 vlanIDLow; + /** Ethernet type of the payload. */ + vmk_uint16 type; +} VMK_ATTRIBUTE_PACKED vmk_VLANHdr; + +/** Helper macro to get the vlan ID in a vmk_VLANHdr. */ +#define VMK_VLAN_HDR_GET_VID(hdr) \ + (((hdr)->vlanIDHigh << 8) | (hdr)->vlanIDLow) + +/** Helper macro to set the vlan ID in a vmk_VLANHdr. */ +#define VMK_VLAN_HDR_SET_VID(hdr, val) do { \ + (hdr)->vlanIDHigh = (val) >> 8; \ + (hdr)->vlanIDLow = (val); \ +} while (0) + + +/** + * \brief IPv4 header. + */ +typedef struct vmk_IPv4Hdr { + /** Length of the IP header, including options in 32-bit words. */ + vmk_uint8 headerLength:4; + /** Internet protocol version. */ + vmk_uint8 version:4; + /* This field has two different interpretations. */ + union { + /** The old interpretation, TOS. */ + struct { + /** Type of service. */ + vmk_uint8 tos:5; + /** Precendence. */ + vmk_uint8 precedence:3; + }; + /** The new interpretation, DSCP. */ + struct { + /** Explicit Congestion Notification. */ + vmk_uint8 ecn:2; + /** Differentiated Services Code Point. */ + vmk_uint8 dscp:6; + }; + /** Global access. */ + vmk_uint8 qosFlags; + }; + /** Total length of the fragment. */ + vmk_uint16 totalLength; + /** Identification of the fragment in the original packet. */ + vmk_uint16 identification; + /** IP Fragment info. */ + union { + /** Bitfield access. */ + struct { + /** High five bits of this fragment's offset in the packet. */ + vmk_uint8 fragmentOffsetHigh:5; + /** More fragments of this packets are available. */ + vmk_uint8 moreFragments:1; + /** This packet must not be fragmented. */ + vmk_uint8 dontFragment:1; + /** Reserved bit, must be zero. */ + vmk_uint8 zero:1; + /** Low eight bits of the fragment offset. */ + vmk_uint8 fragmentOffsetLow; + }; + /* Global access. */ + vmk_uint16 fragmentInfo; + }; + /** Time to live. */ + vmk_uint8 ttl; + /** Protocol number of the payload. */ + vmk_uint8 protocol; + /** Checksum of the header. */ + vmk_uint16 checksum; + /** Source address of the packet. */ + vmk_uint32 saddr; + /** Destination address of the packet. */ + vmk_uint32 daddr; +} VMK_ATTRIBUTE_PACKED vmk_IPv4Hdr; + +/** Helper macro to get the fragment offset in a vmk_IPv4Hdr. */ +#define VMK_IPV4_HDR_GET_FRAGMENT_OFFSET(hdr) \ + (((hdr)->fragmentOffsetHigh << 8) | (hdr)->fragmentOffsetLow) + +/** Helper macro to set the fragment offset in a vmk_IPv4Hdr. */ +#define VMK_IPV4_HDR_SET_FRAGMENT_OFFSET(hdr, val) do { \ + (hdr)->fragmentOffsetHigh = (val) >> 8; \ + (hdr)->fragmentOffsetLow = (val); \ +} while (0) + + +/** + * \brief IPv6 header. + */ +typedef struct vmk_IPv6Hdr { + /** High four bits of the traffic class. */ + vmk_uint8 trafficClassHigh:4; + /** Internet protocol version. */ + vmk_uint8 version:4; + /** High four bits of the flow label. */ + vmk_uint8 flowLabelHigh:4; + /** Low four bits of the traffic class. */ + vmk_uint8 trafficClassLow:4; + /** High sixteen bits of the flow label. */ + vmk_uint16 flowLabelLow; + /** Length of this packets payload. */ + vmk_uint16 payloadLength; + /** Next header's protocol number. */ + vmk_uint8 nextHeader; + /** Hop limit (similar to TTL in IPv4). */ + vmk_uint8 hopLimit; + /** Source address of the packet. */ + vmk_uint8 saddr[16]; + /** Destination address of the packet. */ + vmk_uint8 daddr[16]; +} VMK_ATTRIBUTE_PACKED vmk_IPv6Hdr; + +/** Helper macro to get the traffic class in a vmk_IPv6Hdr. */ +#define VMK_IPV6_HDR_GET_TRAFFIC_CLASS(hdr) \ + (((hdr)->trafficClassHigh << 4) | (hdr)->trafficClassLow) + +/** Helper macro to set the traffic class in a vmk_IPv6Hdr. */ +#define VMK_IPV6_HDR_SET_TRAFFIC_CLASS(hdr, val) do { \ + (hdr)->trafficClassHigh = (val) >> 4; \ + (hdr)->trafficClassLow = (val); \ +} while (0) + +/** Helper macro to get the flow label in a vmk_IPv6Hdr. */ +#define VMK_IPV6_HDR_GET_FLOW_LABEL(hdr) \ + (((hdr)->flowLabelHigh << 16) | vmk_Ntohs((hdr)->flowLabelLow)) + +/** Helper macro to set the flow label in a vmk_IPv6Hdr. */ +#define VMK_IPV6_HDR_SET_FLOW_LABEL(hdr, val) do { \ + (hdr)->flowLabelHigh = (val) >> 16; \ + (hdr)->flowLabelLow = vmk_Htons(val); \ +} while (0) + + +/** + * \brief IPv6 extension header. + */ +typedef struct vmk_IPv6ExtHdr { + /** Next header's protocol number. */ + vmk_uint8 nextHeader; + /** Length of this header, in 64-bit words (not including the first one). */ + vmk_uint8 hdrExtLength; + /** Option-specific area. */ + vmk_uint16 optPad1; + /** Option-specific area. */ + vmk_uint32 optPad2; +} VMK_ATTRIBUTE_PACKED vmk_IPv6ExtHdr; + + +/** + * \brief ICMP header. + */ +typedef struct vmk_ICMPHdr { + /** Type of this ICMP message. */ + vmk_uint8 type; + /** Code of this ICMP message. */ + vmk_uint8 code; + /** Checksum of the entire ICMP message. */ + vmk_uint16 checksum; +} VMK_ATTRIBUTE_PACKED vmk_ICMPHdr; + + +/** + * \brief IGMP header. + */ +typedef struct vmk_IGMPHdr { + /** Type of this IGMP message. */ + vmk_uint8 type; + /** Maximum time for an IGMP report corresponding to the IGMP query. */ + vmk_uint8 maxResponseTime; + /** Checksum of the entire IGMP message. */ + vmk_uint16 checksum; + /** Multicast group on which this IGMP message operates. */ + vmk_uint32 groupAddr; +} VMK_ATTRIBUTE_PACKED vmk_IGMPHdr; + + +/** + * \brief UDP header. + */ +typedef struct vmk_UDPHdr { + /** Source port. */ + vmk_uint16 srcPort; + /** Destination port. */ + vmk_uint16 dstPort; + /** Length of the entire UDP message (header + data). */ + vmk_uint16 length; + /** Checksum of the UDP message. */ + vmk_uint16 checksum; +} VMK_ATTRIBUTE_PACKED vmk_UDPHdr; + + +/** + * \brief TCP header. + */ +typedef struct vmk_TCPHdr { + /** Source port. */ + vmk_uint16 srcPort; + /** Destination port. */ + vmk_uint16 dstPort; + /** Sequence number. */ + vmk_uint32 seq; + /** Acknowledgement number. */ + vmk_uint32 ackSeq; + /** Reserved. */ + vmk_uint8 reserved:4; + /** Length of the TCP header in 32-bit words. */ + vmk_uint8 dataOffset:4; + /** TCP flags. */ + union { + /** Bitfield access. */ + struct { + /** FIN flag: no more data from sender. */ + vmk_uint8 fin:1; + /** SYN flag: synchronize sequence numbers. */ + vmk_uint8 syn:1; + /** RST flag: reset the connection. */ + vmk_uint8 rst:1; + /** PSH flag: push data to application. */ + vmk_uint8 psh:1; + /** ACK flag: acknowledgement field is significant. */ + vmk_uint8 ack:1; + /** URG flag: urgent pointer field is significant. */ + vmk_uint8 urg:1; + /** ECE flag: peer is ECN capable. */ + vmk_uint8 ece:1; + /** CWR flag: congestion window has been reduced. */ + vmk_uint8 cwr:1; + }; + /** Global access. */ + vmk_uint8 flags; + }; + /** Size of the receive window. */ + vmk_uint16 window; + /** Checksum of the TCP packet. */ + vmk_uint16 checksum; + /** Last urgent data byte. */ + vmk_uint16 urgPtr; +} VMK_ATTRIBUTE_PACKED vmk_TCPHdr; + + +/** + * \brief Fence header. + */ +typedef struct vmk_FenceHdr { + /** Fence header version. */ + vmk_uint8 version:2; + /** Original ethernet frame is fragmented. */ + vmk_uint8 frag:1; + /** Fragment ID. */ + vmk_uint8 fragmentID:5; + /** Fence ID. */ + vmk_uint32 fenceID:24; +} VMK_ATTRIBUTE_PACKED vmk_FenceHdr; + + +/** + * \brief VXLAN header. + */ +typedef struct vmk_VXLANHdr { + /** Flags. */ + vmk_uint8 flags1:2; + /** Packet needs replication to multicast group (used for multicast proxy). */ + vmk_uint8 locallyReplicate:1; + /** Instance ID flag, must be set to 1. */ + vmk_uint8 instanceID:1; + /** Flags. */ + vmk_uint8 flags2:4; + /** Reserved. */ + vmk_uint32 reserved1:24; + /** VXLAN ID. */ + vmk_uint32 vxlanID:24; + /** Reserved. */ + vmk_uint8 reserved2:8; +} VMK_ATTRIBUTE_PACKED vmk_VXLANHdr; + +/** Helper macro to check if a VXLAN ID is valid. */ +#define VMK_VXLAN_ID_IS_VALID(vxlanID) (0 < (vxlanID) && (vxlanID) <= 0xffffff) + + +/** + * \brief GRE header. + */ +typedef struct vmk_GREHdr { + /** GRE flags. */ + union { + /** Bitfield access. */ + struct { + /** Recursion control. */ + vmk_uint8 reserved1:3; + /** Strict source route. */ + vmk_uint8 strictSourceRoute:1; + /** Sequence number field is present. */ + vmk_uint8 sequencePresent:1; + /** Key field is present. */ + vmk_uint8 keyPresent:1; + /** Routing field is present. */ + vmk_uint8 routingPresent:1; + /** Checksum field is present. */ + vmk_uint8 checksumPresent:1; + /** Version. */ + vmk_uint8 version:3; + /** Flags. */ + vmk_uint8 reserved2:5; + }; + /** Global access. */ + vmk_uint16 flags; + }; + /** Protocol number of the inner packet. */ + vmk_uint16 protocol; + /** Optionnal fields follow. */ + vmk_uint32 options[0]; +} VMK_ATTRIBUTE_PACKED vmk_GREHdr; + + +/** + * \brief PIM header. + */ +typedef struct vmk_PIMHdr { + /** PIM message type. */ + vmk_uint8 type:4; + /** PIM version number. */ + vmk_uint8 version:4; + /** Reserved. */ + vmk_uint8 reserved; + /** Checksum of the entire PIM message. */ + vmk_uint16 checksum; +} VMK_ATTRIBUTE_PACKED vmk_PIMHdr; + +/* + ************************************************************************ + * vmk_VXLANConfiguredPortGetAll -- */ /** + * + * \brief Get all UDP port numbers configured as VXLAN UDP ports. + * + * \note Since IANA has not assigned a specific UDP port for VXLAN use, + * it is possible for deployed systems to have more than one + * UDP port used for VXLAN. To handle this case, we need to + * support at least two UDP port numbers. + * + * \note nPorts should be set to at least vmk_NetProtoVXLANMaxPorts to + * get all the configured ports, otherwise it is possible that + * only a partial list of UDP ports is returned. + * + * \param[out] portList List of ports configured for VXLAN use. + * \param[in,out] nPorts Number of ports memory allocated for (in) + * actual number of ports returned(out). + * + * \retval VMK_OK On success. + * \retval VMK_BAD_PARAM if bad arguments are passed. + ************************************************************************ + */ +VMK_ReturnStatus vmk_VXLANConfiguredPortGetAll(vmk_uint16 *portList, + vmk_uint8 *nPorts); + +/* + *********************************************************************** + * vmk_VXLANIsConfiguredPort -- */ /** + * + * \brief Checks to see if portNBO is one of the configured VXLAN ports. + * + * \param[in] portNBO Port number (in network byte order). + * + * \retval VMK_TRUE If portNBO is one of the configured + * VXLAN ports. + * + * \retval VMK_FALSE Otherwise. + * + *********************************************************************** + */ +vmk_Bool vmk_VXLANIsConfiguredPort(vmk_uint16 portNBO); + +/* + *********************************************************************** + * vmk_VXLANConfiguredPortAdd -- */ /** + * + * \brief Add a port to the list of configured ports for VXLAN + * + * \param[in] portNBO Port number in network byte order. + * + * \retval VMK_OK On success. + * \retval VMK_EXISTS If the port number already exists. + * \retval VMK_LIMIT_EXCEEDED If the number of ports in the list + * already reached the maximum number + * of configurable ports. + *********************************************************************** + */ +VMK_ReturnStatus vmk_VXLANConfiguredPortAdd(vmk_uint16 portNBO); + +/* + *********************************************************************** + * vmk_VXLANConfiguredPortRemove -- */ /** + * + * \brief Remove a port from the list of configured ports for VXLAN + * + * \param[in] portNBO Port number in network byte order. + * + * \retval VMK_OK On success. + * \retval VMK_NOT_FOUND If the port number is not found. + * \retval VMK_NOT_SUPPORTED If the removal of the port is not + * supported. This can happen if it + * is the last port in the list. + *********************************************************************** + */ +VMK_ReturnStatus vmk_VXLANConfiguredPortRemove(vmk_uint16 portNBO); + +/* + *********************************************************************** + * vmk_VXLANConfiguredPortGetPrimary -- */ /** + * + * \brief Get the primary UDP port number configured for VXLAN. + * + * \retval Primary VXLAN UDP port number. + *********************************************************************** + */ +vmk_uint16 vmk_VXLANConfiguredPortGetPrimary(void); + +/* + *********************************************************************** + * vmk_VXLANConfiguredPortSetPrimary -- */ /** + * + * \brief Sets the primary configured VXLAN UDP port. + * + * \param[in] portNBO Port number in network byte order. + * + *********************************************************************** + */ +void vmk_VXLANConfiguredPortSetPrimary(vmk_uint16 portNBO); + +#endif /* _VMKAPI_NET_PROTO_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pt.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pt.h index a55e959..c379c9f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pt.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_pt.h @@ -50,6 +50,29 @@ /** Number of possible multicast MAC filters per VF (NPA) */ #define VMK_NPA_MAX_MULTICAST_FILTERS 32 +/** Bit to set in cfgChanged when configuring MAC address of VF */ +#define VMK_CFG_MAC_CHANGED (1 << 0) + +/** Bit to set in cfgChanged when configuring Default VLAN (VST) for VF */ +#define VMK_CFG_DEFAULT_VLAN_CHANGED (1 << 1) + +/** Bit to set in cfgChanged when adding Guest VLAN (VGT) tags for VF */ +#define VMK_CFG_GUEST_VLAN_ADD (1 << 2) + +/** Bit to set in cfgChanged when removing Guest VLAN (VGT) tags for VF */ +#define VMK_CFG_GUEST_VLAN_REMOVE (1 << 3) + +/** Bit to set in cfgChanged when changing receive mode of VF */ +#define VMK_CFG_RXMODE_CHANGED (1 << 4) + +/** Bit to set in cfgChanged when changing MTU of VF */ +#define VMK_CFG_MTU_CHANGED (1 << 5) + +/** Bit to set in cfgChanged when disabling default VLAN for VF */ +#define VMK_CFG_DISABLE_DEFAULT_VLAN (1 << 6) + + + /** * \ingroup Passthru * \brief VF identifier @@ -76,6 +99,8 @@ typedef struct vmk_VFDesc { vmk_uint8 pfFunc; /** The identifier of the VF */ vmk_uint32 vfID; + /** Switch PortID where hiddenUplink is connected */ + vmk_SwitchPortID portID; } vmk_VFDesc; /** @@ -162,8 +187,11 @@ typedef enum vmk_NetPTOP { VMK_NETPTOP_PF_DEL_MAC_FILTER = 0x00000015, /** Enable mirroring all traffic to the PF */ - VMK_NETPTOP_PF_MIRROR_ALL = 0x00000016 - + VMK_NETPTOP_PF_MIRROR_ALL = 0x00000016, + + /** Set MTU for a VF port */ + VMK_NETPTOP_VF_SET_MTU = 0x00000017 + } vmk_NetPTOP; /** @@ -1055,6 +1083,22 @@ typedef struct vmk_NetPTOPVFSetMacArgs { } vmk_NetPTOPVFSetMacArgs; +/** + * \ingroup Passthru + * \brief Arguments for the VF Set MTU. + * + * This structure is passed to the NETPTOP_VF_SET_MTU operation and + * configures or updates the MTU of a VF port. + */ +typedef struct vmk_NetPTOPVFSetMtuArgs { + /** VF id */ + vmk_VFID vf; + + /** MTU for the VF */ + vmk_uint32 mtu; + +} vmk_NetPTOPVFSetMtuArgs; + /** * \ingroup Passthru * \brief Arguments for the VF Set Multicast operation. @@ -1211,6 +1255,99 @@ typedef struct vmk_NetPTOPPFMirrorAllArgs { } vmk_NetPTOPPFMirrorAllArgs; + +/** + * \ingroup Passthru + * \brief Enumeration of receive modes of a VF. + */ +typedef enum vmk_VFRXMode { + /** Pass unicast (directed) frames */ + VMK_VF_RXMODE_UNICAST = (1 << 0), + + /** Pass some multicast frames */ + VMK_VF_RXMODE_MULTICAST = (1 << 1), + + /** pass *all* multicast frames */ + VMK_VF_RXMODE_ALLMULTI = (1 << 2), + + /** Pass broadcast frames */ + VMK_VF_RXMODE_BROADCAST = (1 << 3), + + /** Pass all frames (ie no filter) */ + VMK_VF_RXMODE_PROMISC = (1 << 4), + + /** Use the LADRF for multicast filtering */ + VMK_VF_RXMODE_USE_LADRF = (1 << 5), + + /** pass not-matched unicast frames */ + VMK_VF_RXMODE_SINK = (1 << 6) + +} vmk_VFRXMode; + + +/** + * \ingroup Passthru + * \brief VF Configuration information. + * + * This structure contains information about VF configuration. PF driver + * passes this structure as an argument of vmk_NetPTConfigureVF() + */ +typedef struct vmk_NetVFCfgInfo { + + /** MAC Address for VF */ + vmk_uint8 macAddr[6]; + + union vmk_vlanInfo { + + /** Bitmap for Guest VLAN tags (VGT) */ + vmk_uint8 guestVlans[512]; + + /** VLAN switch tagging (VST) */ + vmk_uint16 defaultVlan; + } vlan; + + /** Config change being requested */ + vmk_uint32 cfgChanged; + + /** Receive mode (Unicast/Mcast/Bcast) */ + vmk_VFRXMode rxMode; + + /** MTU for VF */ + vmk_uint16 mtu; + vmk_uint8 reserved[7]; +} vmk_NetVFCfgInfo; + + +/* + *********************************************************************** + * vmk_NetPTConfigureVF -- */ /** + * + * \brief Request to configure properties of a passthrough VF + * + * PF Driver calls this to request configuration of a passthrough VF. This + * will mostly be called as a result of the guest requesting changes in + * passthrough NIC configuration. VMKernel validates the VF configuration + * request against the DVS or Portgroup properties. It then pushes + * the configuration to VFs as applicable. VMKernel uses passthrough ops + * (vmk_NetPTOP) published by PF driver to apply VF configuration. + * + * \see vmk_NetVFCfgInfo. + * \see vmk_NetPTOP + * + * \note This in turn calls Passthrough OPs in PF driver + * + * \param[in] cfgInfo Requested VF Configuration. + * \param[in] vfSbdf PCI Address of VF to be configured. + * + * \retval VMK_OK The command was issued successfully and + * the command's status is valid. + * \retval VMK_FAILURE The command failed. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_NetPTConfigureVF(vmk_NetVFCfgInfo *cfgInfo, + vmk_PCIDeviceAddr vfSbdf); + #endif /* _VMKAPI_NET_PT_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_queue.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_queue.h new file mode 100644 index 0000000..ec23c2e --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_queue.h @@ -0,0 +1,1364 @@ +/* ********************************************************** + * Copyright 2006 - 2009 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * UplinkQueue */ /** + * \addtogroup Network + *@{ + * \defgroup UplinkQueue Uplink Queue + *@{ + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_QUEUE_H_ +#define _VMKAPI_NET_QUEUE_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" +#include "net/vmkapi_net_poll.h" +#include "net/vmkapi_net_pkt.h" + + +/** Default queue ID */ +#define VMK_UPLINK_QUEUE_DEFAULT_QUEUEID ((vmk_UplinkQueueID)0) + +/** Invalid queue ID */ +#define VMK_UPLINK_QUEUE_INVALID_QUEUEID ((vmk_UplinkQueueID)-1) + +/** Invalid filter ID */ +#define VMK_UPLINK_QUEUE_INVALID_FILTERID ((vmk_UplinkQueueFilterID)-1) + +/** Invalid uplink queue priority */ +#define VMK_UPLINK_QUEUE_PRIORITY_INVALID VMK_VLAN_PRIORITY_INVALID + +struct vmk_UplinkStats; + + +/** + * \brief UplinkQueue ID + */ +typedef struct vmk_UplinkQueueIDInt *vmk_UplinkQueueID; + + +/** + * \brief UplinkQueue filter ID + */ +typedef vmk_uint32 vmk_UplinkQueueFilterID; + + +/** UplinkQueue priority */ +typedef vmk_VlanPriority vmk_UplinkQueuePriority; + + +/** + * \brief UplinkQueue filter type + */ +typedef enum vmk_UplinkQueueFilterType { + + /** Invalid filter type */ + VMK_UPLINK_QUEUE_FILTER_TYPE_INVALID = 0, + + /** Rx/Tx filter type */ + VMK_UPLINK_QUEUE_FILTER_TYPE_TXRX = 1, +} vmk_UplinkQueueFilterType; + + +/** + * \brief UplinkQueue filter class + */ +typedef enum vmk_UplinkQueueFilterClass { + /** Invalid filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_NONE = 0x0, + + /** MAC only filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_MAC_ONLY = (1 << 0), + + /** VLAN only filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_VLAN_ONLY = (1 << 1), + + /** VLAN + MAC address filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_VLANMAC = (1 << 2), + + /** VXLAN filter */ + VMK_UPLINK_QUEUE_FILTER_CLASS_VXLAN = (1 << 3), +} vmk_UplinkQueueFilterClass; + + +/** + * UplinkQueue queue type + */ +typedef enum vmk_UplinkQueueType { + /** Invalid queue type */ + VMK_UPLINK_QUEUE_TYPE_INVALID = 0x0, + + /** RX queue type */ + VMK_UPLINK_QUEUE_TYPE_RX = 0x1, + + /** TX queue type */ + VMK_UPLINK_QUEUE_TYPE_TX = 0x2, +} vmk_UplinkQueueType; + + +/** + * UplinkQueue queue flags + */ +typedef enum vmk_UplinkQueueFlags { + /** queue is unused */ + VMK_UPLINK_QUEUE_FLAG_UNUSED = 0x0, + + /** queue is allocated and in use */ + VMK_UPLINK_QUEUE_FLAG_IN_USE = (1 << 0), + + /** queue is the default queue */ + VMK_UPLINK_QUEUE_FLAG_DEFAULT = (1 << 1), +} vmk_UplinkQueueFlags; + + +/** + * UplinkQueue queue state + */ +typedef enum vmk_UplinkQueueState { + /** Queue stopped by the driver */ + VMK_UPLINK_QUEUE_STATE_STOPPED = 0x0, + + /** Queue started administratively by the networking stack */ + VMK_UPLINK_QUEUE_STATE_STARTED = 0x1, +} vmk_UplinkQueueState; + +/** + * LRO type + * + * \note LRO types are for informational purpose only. They don't participate + * in queues partitioning and load balancing. When VMKernel allocates + * a RX queue with LRO feature, it passes VMK_UPLINK_QUEUE_FEAT_LRO + * down to driver. And driver should never expect VMKernel will pass + * LRO types down. + */ +typedef enum vmk_UplinkQueueLROType { + /** Large receive offload on IPv4 */ + VMK_UPLINK_QUEUE_LRO_TYPE_IPV4 = (1 << 0), + + /** Large receive offload on IPv6 */ + VMK_UPLINK_QUEUE_LRO_TYPE_IPV6 = (1 << 1), +} vmk_UplinkQueueLROType; + +/** + * LRO constraints + */ +typedef struct vmk_UplinkQueueLROConstraints { + /** Combination of hardware supported LRO types */ + vmk_UplinkQueueLROType supportedTypes; +} vmk_UplinkQueueLROConstraints; + +/** + * UplinkQueue queue feature + */ +typedef enum vmk_UplinkQueueFeature { + /** None */ + VMK_UPLINK_QUEUE_FEAT_NONE = 0x00, + + /** Supports setting queue large receive offload(LRO) feature */ + VMK_UPLINK_QUEUE_FEAT_LRO = (1 << 0), + + /** Paired queue feature */ + VMK_UPLINK_QUEUE_FEAT_PAIR = (1 << 1), + + /** Supports setting queue receive segment scaling (RSS) feature */ + VMK_UPLINK_QUEUE_FEAT_RSS = (1 << 2), + + /** Supports setting queue priority */ + VMK_UPLINK_QUEUE_FEAT_SET_PRIO = (1 << 3), + + /** Supports setting queue level intr coalescing parameters */ + VMK_UPLINK_QUEUE_FEAT_COALESCE = (1 << 4), + + /** + * Supports modification of RSS indirection table at run time + * \note Driver must call vmk_UplinkQueueRegisterFeatureOps, and + * provide vmk_UplinkQueueRSSDynOps before claiming it supports + * this feature + */ + VMK_UPLINK_QUEUE_FEAT_RSS_DYN = (1 << 5), + + /** Latency Sensitive queue feature */ + VMK_UPLINK_QUEUE_FEAT_LATENCY = (1 << 6), + + /** Dynamic queue feature */ + VMK_UPLINK_QUEUE_FEAT_DYNAMIC = (1 << 7), + + /** Pre-emptible queue feature */ + VMK_UPLINK_QUEUE_FEAT_PREEMPTIBLE = (1 << 8), +} vmk_UplinkQueueFeature; + + +/** + * \brief Filter definition + */ +typedef struct vmk_UplinkQueueFilter { + + /** Filter class */ + vmk_UplinkQueueFilterClass class; + + /** + * pointer to filter + * class filter + * MAC_ONLY vmk_UplinkQueueMACFilterInfo + * VLAN_ONLY vmk_UplinkQueueVLANFilterInfo + * VLAN+MAC vmk_UplinkQueueVLANMACFilterInfo + * VXLAN vmk_UplinkQueueVXLANFilterInfo + */ + vmk_AddrCookie filterInfo; +} vmk_UplinkQueueFilter; + + +/** + * \brief MAC address only filter info + */ +typedef struct vmk_UplinkQueueMACFilterInfo { + /** MAC address */ + vmk_EthAddress mac; +} vmk_UplinkQueueMACFilterInfo; + + +/** + * \brief VLAN ID only filter info + */ +typedef struct vmk_UplinkQueueVLANFilterInfo { + /** VLAN ID */ + vmk_VlanID vlanID; +} vmk_UplinkQueueVLANFilterInfo; + + +/** + * \brief MAC address + VLAN ID filter info + */ +typedef struct vmk_UplinkQueueVLANMACFilterInfo { + /** MAC address */ + vmk_EthAddress mac; + + /** VLAN ID */ + vmk_VlanID vlanID; +} vmk_UplinkQueueVLANMACFilterInfo; + + +/** + * \brief VXLAN filter info + */ +typedef struct vmk_UplinkQueueVXLANFilterInfo { + /** Inner MAC address */ + vmk_EthAddress innerMAC; + + /** Outer MAC address */ + vmk_EthAddress outerMAC; + + /** VXLAN ID */ + vmk_uint32 vxlanID; +} vmk_UplinkQueueVXLANFilterInfo; + + +/** + * \brief Filter properties + */ +typedef enum vmk_UplinkQueueFilterProperties { + /** None */ + VMK_UPLINK_QUEUE_FILTER_PROP_NONE = 0x0, + + /** Management filter */ + VMK_UPLINK_QUEUE_FILTER_PROP_MGMT = 0x1, + + /** Opportunistically packed with other filters */ + VMK_UPLINK_QUEUE_FILTER_PROP_PACK_OPPO = 0x2, + + /** Opportunistically seek exclusive netqueue */ + VMK_UPLINK_QUEUE_FILTER_EXCL_PACK_OPPO = 0x4, +} vmk_UplinkQueueFilterProperties; + + +/** + * \brief UplinkQueue queue attribute type + */ +typedef enum vmk_UplinkQueueAttrType { + /** Priority attribute */ + VMK_UPLINK_QUEUE_ATTR_PRIOR = 0x0, + + /** Features attribute */ + VMK_UPLINK_QUEUE_ATTR_FEAT = 0x1, +} vmk_UplinkQueueAttrType; + + +/** + * \brief UplinkQueue queue attribute + */ +typedef struct vmk_UplinkQueueAttr { + /** Uplink queue attribute type */ + vmk_UplinkQueueAttrType type; + + union { + + /** VMK_UPLINK_QUEUE_ATTR_PRIOR argument */ + vmk_VlanPriority priority; + + /** VMK_UPLINK_QUEUE_ATTR_FEAT argument */ + vmk_UplinkQueueFeature features; + + /** Generic attribute argument */ + vmk_AddrCookie attr; + } args; +} vmk_UplinkQueueAttr; + + +/** + * \brief Structure describing interrupt coalescing parameters + * of an uplink + */ +typedef struct vmk_UplinkCoalesceParams { + /** + * \brief number of microseconds to wait for Rx, before + * interrupting + */ + vmk_uint32 rxUsecs; + + /** + * \brief maximum number of (Rx) frames to wait for, before + * interrupting + */ + vmk_uint32 rxMaxFrames; + + /** + * \brief number of microseconds to wait for completed Tx, before + * interrupting + */ + vmk_uint32 txUsecs; + + /** + * \brief maximum number of completed (Tx) frames to wait for, + * before interrupting + */ + vmk_uint32 txMaxFrames; + +} vmk_UplinkCoalesceParams; + + +/** \brief Structure describing realloc params of queue. */ +typedef struct vmk_UplinkQueueReallocParams { + /** \brief Queue type. */ + vmk_UplinkQueueType qType; + + /** + * \brief Number of attributes. + * + * Attributes associated with the function vmk_UplinkQueueReallocWithAttrCB. + * Number of attributes should not be greater than VMK_UPLINK_QUEUE_ATTR_NUM. + */ + vmk_uint16 numAttr; + + /** \brief Queue attributes. */ + vmk_UplinkQueueAttr *attr; + + /** \brief ID of already created queue. */ + vmk_UplinkQueueID *qID; + + /** \brief Count of filters to be removed. */ + vmk_uint16 numOldFilters; + + /** \brief Pointer to array of already applied filter IDs. */ + vmk_UplinkQueueFilterID *oldFid; + + /** \brief New queue filter to be applied. */ + vmk_UplinkQueueFilter *newFilter; + + /** \brief New Filter ID. */ + vmk_UplinkQueueFilterID *newFid; + + /** \brief Potential paired tx queue hardware index. */ + vmk_uint32 *pairHWQID; + + /** \brief Net poll on top of the allocated queue if any. */ + vmk_NetPoll *netpoll; + +} vmk_UplinkQueueReallocParams; + + +/** + * \brief RSS hash key + * + * This structure is used to program the RSS hash key. + */ +typedef struct vmk_UplinkQueueRSSHashKey { + /** Key size in bytes */ + vmk_uint16 keySize; + + /** Key contents */ + vmk_uint8 key[0]; + +} vmk_UplinkQueueRSSHashKey; + + +/** + * \brief RSS indirection table + * + * This structure is used to program or update the RSS indirection table. + */ +typedef struct vmk_UplinkQueueRSSIndTable { + /** Size of the table in bytes */ + vmk_uint16 tableSize; + + /** Contents */ + vmk_uint8 table[0]; + +} vmk_UplinkQueueRSSIndTable; + + +/** + * \brief RSS parameters + */ +typedef struct vmk_UplinkQueueRSSParams { + /** Number of RSS pools supported */ + vmk_uint16 numRSSPools; + + /** Number of RSS queues per pool */ + vmk_uint16 numRSSQueuesPerPool; + + /** Length of the RSS hash key in bytes */ + vmk_uint16 rssHashKeySize; + + /** Size of the RSS indirection table */ + vmk_uint16 rssIndTableSize; + +} vmk_UplinkQueueRSSParams; + + +/* + *********************************************************************** + * vmk_UplinkCoalesceParamsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get coalescing parameters of + * device associated with an uplink. + * + * \param[in] driverData Points to the internal module structure + * for the device associated to the uplink. + * Before calling vmk_DeviceRegister, device + * driver needs to assign this pointer to + * member driverData in structure + * vmk_UplinkRegData. + * \param[out] coalesceParams Structure used to store all the requested + * information. + * + * \retval VMK_OK If the driver information is properly + * stored + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkCoalesceParamsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkCoalesceParams *params); + + +/* + *********************************************************************** + * vmk_UplinkCoalesceParamsSetCB -- */ /** + * + * \brief Handler used by vmkernel to set coalescing parameters of + * device associated with an uplink. + * + * \param[in] driverData Points to the internal module structure + * for the device associated to the uplink. + * Before calling vmk_DeviceRegister, device + * driver needs to assign this pointer to + * member driverData in structure + * vmk_UplinkRegData. + * \param[in] coalesceParams Structure used to store all the requested + * information. + * + * \retval VMK_OK If the driver information is properly set + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkCoalesceParamsSetCB)(vmk_AddrCookie driverData, + vmk_UplinkCoalesceParams *params); + + +/** + * Uplink coalesce paramters + */ +typedef struct vmk_UplinkCoalesceParamsOps { + /** callback to get coalesce paramters */ + vmk_UplinkCoalesceParamsGetCB getParams; + + /** callback to set coalesce paramters */ + vmk_UplinkCoalesceParamsSetCB setParams; +} vmk_UplinkCoalesceParamsOps; + + +/* + *********************************************************************** + * vmk_UplinkQueueGetNumQueuesSupported */ /** + * + * \brief Get maximum number of TX and RX queues device driver should + * expose to vmkernel + * + * \note Device driver must call this function before uplink logical + * device registration. The total TX/RX queue number exposed by + * driver should not exceed the numbers returned. + * + * \param[in] numDevTxQueues Number of TX queues device can support + * \param[in] numDevRxQueues Number of RX queues device can support + * \param[out] maxTxQueues Maximum number of TX queues driver should + * expose to vmkernel. It's set to the lower + * one of numDevTxQueues and vmkernel + * physical CPU cores + * \param[out] maxRxQueues Maximum number of RX queues driver should + * expose to vmkernel. It's set to the lower + * one of numDevRxQueues and vmkernel + * physical CPU cores + * + * \retval VMK_OK Always + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueGetNumQueuesSupported(vmk_uint32 numDevTxQueues, + vmk_uint32 numDevRxQueues, + vmk_uint32 *maxTxQueues, + vmk_uint32 *maxRxQueues); + + +/* + *********************************************************************** + * vmk_UplinkQueueSetQueueIDUserVal -- */ /** + * + * \brief Set user's private value for queue ID. + * + * \param[in] qid Queue ID. + * \param[in] userval User value. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueSetQueueIDUserVal(vmk_UplinkQueueID *qid, + vmk_uint32 userval); + + +/* + *********************************************************************** + * vmk_UplinkQueueIDUserVal -- */ /** + * + * \brief Get user part of queue ID + * + * \param[in] qid Queue ID. + * + * \retval vmk_uint32 User value. + * + *********************************************************************** + */ + +vmk_uint32 vmk_UplinkQueueIDUserVal(vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueSetQueueIDQueueDataIndex -- */ /** + * + * \brief Set queue data index for queue ID. + * + * \param[in] qid Queue ID. + * \param[in] index Index into queue data array in shared data + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueSetQueueIDQueueDataIndex(vmk_UplinkQueueID *qid, + vmk_uint32 index); + + +/* + *********************************************************************** + * vmk_UplinkQueueIDQueueDataIndex -- */ /** + * + * \brief Get queue data array index part of queue ID + * + * \param[in] qid Queue ID. + * + * \retval vmk_uint32 Queue data array index + * + *********************************************************************** + */ + +vmk_uint32 vmk_UplinkQueueIDQueueDataIndex(vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueMkTxQueueID -- */ /** + * + * \brief Set shared queue data array index and user value in a TX queue + * ID. + * + * \param[out] qid Pointer to queue ID allocated by caller. + * \param[in] index The index into queue data array in shared data + * \param[in] val The embedded value of the queue ID. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueMkTxQueueID(vmk_UplinkQueueID *qid, + vmk_uint32 index, + vmk_uint32 val); + + +/* + *********************************************************************** + * vmk_UplinkQueueMkRxQueueID -- */ /** + * + * \brief Set shared queue data array index and user value in a RX queue + * ID. + * + * \param[out] qid Pointer to queue ID allocated by caller. + * \param[in] index The index into queue data array in shared data + * \param[in] val The embedded value of the queue ID. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueMkRxQueueID(vmk_UplinkQueueID *qid, + vmk_uint32 index, + vmk_uint32 val); + + +/* + *********************************************************************** + * vmk_UplinkQueueIDVal -- */ /** + * + * \brief Retrieve the embedded value of a queue ID. + * + * \param[in] qid The aimed queue ID. + * + * \return The embedded value. + * + *********************************************************************** + */ + +vmk_uint32 vmk_UplinkQueueIDVal(vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueIDType -- */ /** + * + * \brief Retrieve the type of a queue ID. + * + * \param[in] qid The aimed queue ID. + * + * \return The type. + * + *********************************************************************** + */ + +vmk_UplinkQueueType vmk_UplinkQueueIDType(vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueMkFilterID -- */ /** + * + * \brief Create a filter ID. + * + * \param[in] val The embedded value of the filter ID. + * \param[out] fid The created filter. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueMkFilterID(vmk_UplinkQueueFilterID *fid, + vmk_uint16 val); + + +/* + *********************************************************************** + * vmk_UplinkQueueFilterIDVal -- */ /** + * + * \brief Retrieve the embedded value of a filter ID. + * + * \param[in] fid The aimed filter ID. + * + * \return The embedded value. + * + *********************************************************************** + */ + +vmk_uint16 vmk_UplinkQueueFilterIDVal(vmk_UplinkQueueFilterID fid); + + +/* + *********************************************************************** + * vmk_PktQueueIDGet -- */ /** + * + * \brief Retrieve netqueue queue ID of a specified packet. + * + * \param[in] pkt Packet of interest + * + * \return UplinkQueue queue ID. + * + *********************************************************************** + */ + +vmk_UplinkQueueID vmk_PktQueueIDGet(vmk_PktHandle *pkt); + + +/* + *********************************************************************** + * vmk_PktQueueIDSet -- */ /** + * + * \brief Set netqueue queue ID of a specified packet. + * + * \param[in] pkt Packet of interest + * \param[in] qid Packet queue ID + * + * \retval VMK_OK + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_PktQueueIDSet(vmk_PktHandle *pkt, + vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueAllocCB -- */ /** + * + * \brief Handler used by vmkernel to call into device driver to + * allocate a TX/RX queue. + * + * \note The TX/RX queue is allocated and maintained by device driver. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qType queue type + * \param[out] qID ID of newly created queue, driver must call + * vmk_UplinkQueueMkTxQueueID or + * vmk_UplinkQueueMkRxQueueID to set its value. + * \param[out] netpoll Net poll on top of the allocated queue if + * any + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueAllocCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueType qType, + vmk_UplinkQueueID *qID, + vmk_NetPoll *netpoll); + + +/* + *********************************************************************** + * vmk_UplinkQueueAllocWithAttrCB -- */ /** + * + * \brief Handler used by vmkernel to call into device driver to + * allocate a TX/RX queue with extra attributes. + * + * \note The TX/RX queue is allocated and maintained by device driver. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qType queue type + * \param[in] numAttr Number of attributes, It cannot be greater + than VMK_UPLINK_QUEUE_ATTR_NUM + * \param[in] attr Queue attributes + * \param[out] qID ID of newly created queue, driver must call + * vmk_UplinkQueueMkTxQueueID or + * vmk_UplinkQueueMkRxQueueID to set its value. + * \param[out] netpoll Net poll on top of the allocated queue if + * any + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueAllocWithAttrCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueType qType, + vmk_uint16 numAttr, + vmk_UplinkQueueAttr *attr, + vmk_UplinkQueueID *qID, + vmk_NetPoll *netpoll); + + +/* + *********************************************************************** + * vmk_UplinkQueueReallocWithAttrCB -- */ /** + * + * \brief Handler for reallocating RX queue. + * + * Handler used by vmkernel to call into device driver to + * reallocate a RX queue with extra attributes. + * + * \note The RX queue is allocated and maintained by device driver. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] params Realloc queue params. + * + * \retval VMK_OK On success. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueReallocWithAttrCB)( + vmk_AddrCookie driverData, + vmk_UplinkQueueReallocParams *params); + + +/* + *********************************************************************** + * vmk_UplinkQueueFreeCB -- */ /** + * + * \brief Handler used by vmkernel to free a queue + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueFreeCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueQuiesceCB -- */ /** + * + * \brief Handler used by vmkernel to quiesce a queue + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueQuiesceCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueStartCB -- */ /** + * + * \brief Handler used by vmkernel to start a queue + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueStartCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueFilterApplyCB -- */ /** + * + * \brief Handler used by vmkernel to apply a queue filter + * + * \note pairHWQID is hardware's internal TX queue identifier, it must + * be same as the embedded value passed to + * vmk_UplinkQueueMkTxQueueID when a TX queue is allocated. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] qFilter queue Filter + * \param[out] fid Filter ID + * \param[out] pairHWQID Potential paired tx queue hardware index + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueFilterApplyCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkQueueFilter *qFilter, + vmk_UplinkQueueFilterID *fid, + vmk_uint32 *pairHWQID); + + +/* + *********************************************************************** + * vmk_UplinkQueueFilterRemoveCB -- */ /** + * + * \brief Handler used by vmkernel to remove a queue filter + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] fid Filter ID + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueFilterRemoveCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkQueueFilterID fid); + + +/* + *********************************************************************** + * vmk_UplinkQueueStatsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get queue stats + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[out] stats stats of queue + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueStatsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + struct vmk_UplinkStats *stats); + + +/* + *********************************************************************** + * vmk_UplinkQueueFeatureToggleCB -- */ /** + * + * \brief Handler used by vmkernel to toggle a queue feature + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] qFeature queue Feature + * \param[in] setUnset set or unset the feature + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueFeatureToggleCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkQueueFeature qFeature, + vmk_Bool setUnset); + + +/* + *********************************************************************** + * vmk_UplinkQueueTxPrioritySetCB -- */ /** + * + * \brief Handler used by vmkernel to set queue priority + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] priority queue priority + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueTxPrioritySetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkQueuePriority priority); + + +/* + *********************************************************************** + * vmk_UplinkQueueCoalesceParamsSetCB -- */ /** + * + * \brief Handler used by vmkernel to set queue coalesce parameters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] qID queue ID + * \param[in] params coalesce params + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueCoalesceParamsSetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueID qID, + vmk_UplinkCoalesceParams *params); + + +/* + *********************************************************************** + * vmk_UplinkQueueRSSParamsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get device RSS parameters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] params RSS parameters returned + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueRSSParamsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueRSSParams *params); + + +/* + *********************************************************************** + * vmk_UplinkQueueRSSStateInitCB -- */ /** + * + * \brief Handler used by vmkernel to init RSS state on device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] rssHashKey Initial value of RSS hash key + * \param[in] rssIndTable Initial value of RSS indirection table + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueRSSStateInitCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueRSSHashKey *rssHashKey, + vmk_UplinkQueueRSSIndTable *rssIndTable); + + +/* + *********************************************************************** + * vmk_UplinkQueueRSSIndTableUpdateCB -- */ /** + * + * \brief Handler used by vmkernel to update RSS indirection table on + * device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] rssIndTable RSS indirection table to update + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueRSSIndTableUpdateCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueRSSIndTable *rssIndTable); + + +/* + *********************************************************************** + * vmk_UplinkQueueRSSIndTableGetCB -- */ /** + * + * \brief Handler used by vmkernel to get current RSS indirection table + * on device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] rssIndTable Current RSS hash indirection table on device + * + * \retval VMK_OK on success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQueueRSSIndTableGetCB)(vmk_AddrCookie driverData, + vmk_UplinkQueueRSSIndTable *rssIndTable); + + +/** UplinkQueue operations */ +typedef struct vmk_UplinkQueueOps { + /** callback to allocate netqueue queue */ + vmk_UplinkQueueAllocCB queueAlloc; + + /** callback to allocate queue with attributes */ + vmk_UplinkQueueAllocWithAttrCB queueAllocWithAttr; + + /** callback to Reallocate queue with attributes */ + vmk_UplinkQueueReallocWithAttrCB queueReallocWithAttr; + + /** callback to free queue */ + vmk_UplinkQueueFreeCB queueFree; + + /** callback to quiesce queue */ + vmk_UplinkQueueQuiesceCB queueQuiesce; + + /** callback to start queue */ + vmk_UplinkQueueStartCB queueStart; + + /** callback to apply queue filter */ + vmk_UplinkQueueFilterApplyCB queueApplyFilter; + + /** callback to remove queue filter */ + vmk_UplinkQueueFilterRemoveCB queueRemoveFilter; + + /**callback to get queue stats */ + vmk_UplinkQueueStatsGetCB queueGetStats; + + /** callback to toggle queue feature */ + vmk_UplinkQueueFeatureToggleCB queueToggleFeature; + + /** callback to set queue priority */ + vmk_UplinkQueueTxPrioritySetCB queueSetPriority; + + /** callback to set coalesce parameters */ + vmk_UplinkQueueCoalesceParamsSetCB queueSetCoalesceParams; +} vmk_UplinkQueueOps; + + +/** UplinkQueue dynamic RSS operations */ +typedef struct vmk_UplinkQueueRSSDynOps{ + /** callback to get RSS parameters */ + vmk_UplinkQueueRSSParamsGetCB queueGetRSSParams; + + /** callback to init RSS state */ + vmk_UplinkQueueRSSStateInitCB queueInitRSSState; + + /** callback to update RSS indirection table */ + vmk_UplinkQueueRSSIndTableUpdateCB queueUpdateRSSIndTable; + + /** callback to get RSS indirection table */ + vmk_UplinkQueueRSSIndTableGetCB queueGetRSSIndTable; +} vmk_UplinkQueueRSSDynOps; + + +/** + * Shared data of a single queue + */ +typedef struct vmk_UplinkSharedQueueData { + /** queue flags */ + volatile vmk_UplinkQueueFlags flags; + + /** queue type */ + vmk_UplinkQueueType type; + + /** queue ID */ + vmk_UplinkQueueID qid; + + /** queue state */ + volatile vmk_UplinkQueueState state; + + /** queue supported features */ + vmk_UplinkQueueFeature supportedFeatures; + + /** queue active features bit vector */ + vmk_UplinkQueueFeature activeFeatures; + + /** maximum filters supported */ + vmk_uint32 maxFilters; + + /** number of active filters */ + vmk_uint32 activeFilters; + + /** Associated vmk_NetPoll context */ + vmk_NetPoll poll; + + /** Associated DMA engine for allocation constraints */ + vmk_DMAEngine dmaEngine; + + /** Tx priority assigned to queue */ + vmk_UplinkQueuePriority priority; + + /** Queue level interrupt coalescing parameters */ + vmk_UplinkCoalesceParams coalesceParams; +} vmk_UplinkSharedQueueData; + + +/** + * Shared information of all queues on a driver + */ +typedef struct vmk_UplinkSharedQueueInfo { + /** supported queue types */ + vmk_UplinkQueueType supportedQueueTypes; + + /** supported queue filter classes */ + vmk_UplinkQueueFilterClass supportedRxQueueFilterClasses; + + /** default Rx queue ID */ + vmk_UplinkQueueID defaultRxQueueID; + + /** default Tx queue ID */ + vmk_UplinkQueueID defaultTxQueueID; + + /** maximum Rx queues */ + vmk_uint32 maxRxQueues; + + /** maximum Tx queues */ + vmk_uint32 maxTxQueues; + + /** number of active Rx queues */ + vmk_uint32 activeRxQueues; + + /** number of active Tx queues */ + vmk_uint32 activeTxQueues; + + /** active queue bit vector */ + vmk_BitVector *activeQueues; + + /** maximum/total filters supported across all the queues of device */ + vmk_uint32 maxTotalDeviceFilters; + + /** + * shared queue data. Drivers that do not support multiple queues + * still need to populate one queue + */ + vmk_UplinkSharedQueueData *queueData; +} vmk_UplinkSharedQueueInfo; + + +/* + *********************************************************************** + * vmk_UplinkQueueInvalidate -- */ /** + * + * \brief Invalidate a queue in an uplink + * + * The driver can ask the kernel to invalidate a queue. What this means + * is that all the filters on that queue are assumed to be removed, all + * the queue features are reset and the queue is free'd. + * + * \param[in] uplink Uplink handle + * \param[in] qID queue id to be invalidated + * + * \retval VMK_OK if the reset call succeeds + * \retval VMK_FAILURE if the uplink doesn't support reset + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueInvalidate(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueStop -- */ /** + * + * \brief Notify stack of uplink queue stop + * + * \param[in] uplink Uplink aimed + * \param[in] qid Queue ID + * + * \retval VMK_OK + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueStop(vmk_Uplink uplink, + vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueStart -- */ /** + * + * \brief Notify stack of uplink queue (re)start + * + * \param[in] uplink Uplink aimed + * \param[in] qid Queue ID + * + * \retval VMK_OK + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueStart(vmk_Uplink uplink, + vmk_UplinkQueueID qid); + + +/* + *********************************************************************** + * vmk_UplinkQueueRegisterFeatureOps -- */ /** + * + * \brief Register callback operations for a specific queue feature + * + * Some feature requires a set of callback operations. Driver needs to + * register these callbacks before claiming it supports this feature. + * + * \param[in] uplink Uplink handle + * \param[in] feature The uplink queue feature to support + * \param[in] ops Pointer to the operations associated + * to this feature + * + * \retval VMK_OK if the reset call succeeds + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkQueueRegisterFeatureOps(vmk_Uplink uplink, + vmk_UplinkQueueFeature feature, + void *ops); + +#endif /* _VMKAPI_NET_QUEUE_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_queue_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_queue_incompat.h new file mode 100644 index 0000000..9cd7a05 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_queue_incompat.h @@ -0,0 +1,1246 @@ +/* ********************************************************** + * Copyright 2006 - 2009 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Netqueue */ /** + * \addtogroup Network + *@{ + * \defgroup Netqueue Incompatible NetQueue + *@{ + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_QUEUE_INCOMPAT_H_ +#define _VMKAPI_NET_QUEUE_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" +#include "net/vmkapi_net_poll.h" +#include "net/vmkapi_net_pkt.h" + + +/** Default queue ID */ +#define VMK_NETQUEUE_DEFAULT_QUEUEID VMK_UPLINK_QUEUE_DEFAULT_QUEUEID + +/** Invalid queue ID */ +#define VMK_NETQUEUE_INVALID_QUEUEID VMK_UPLINK_QUEUE_INVALID_QUEUEID + +/** Invalid filter ID */ +#define VMK_NETQUEUE_INVALID_FILTERID VMK_UPLINK_QUEUE_INVALID_FILTERID + +/** Major version of netqueue api */ +#define VMK_NETQUEUE_OPS_MAJOR_VER (2) + +/** Minor version of netqueue api */ +#define VMK_NETQUEUE_OPS_MINOR_VER (0) + +/** Definition of RSS maximum number of queues */ +#define VMK_NETQUEUE_MAX_RSS_QUEUES 16 + +/** Definition of RSS indirection table maximum size */ +#define VMK_NETQUEUE_MAX_RSS_IND_TABLE_SIZE 128 + +/** Definition of RSS hash key maximum size */ +#define VMK_NETQUEUE_MAX_RSS_KEY_SIZE 40 + + +/** + * \brief Netqueue queue ID + */ +typedef vmk_UplinkQueueID vmk_NetqueueQueueID; + + +/** + * \brief Netqueue filter ID + */ +typedef vmk_UplinkQueueFilterID vmk_NetqueueFilterID; + + +/** Netqueue priority */ +typedef vmk_UplinkQueuePriority vmk_NetqueuePriority; + + +/** Netqueue features supported */ +typedef enum vmk_NetqueueFeatures { + + /** No features supported */ + VMK_NETQUEUE_FEATURE_NONE = 0x0, + + /** Rx queues features supported */ + VMK_NETQUEUE_FEATURE_RXQUEUES = 0x1, + + /** Tx queues features supported */ + VMK_NETQUEUE_FEATURE_TXQUEUES = 0x2, +} vmk_NetqueueFeatures; + + +/** + * \brief Netqueue filter type + */ +typedef enum vmk_NetqueueFilterType { + + /** Invalid filter type */ + VMK_NETQUEUE_FILTER_TYPE_INVALID = VMK_UPLINK_QUEUE_FILTER_TYPE_INVALID, + + /** Invalid filter type */ + VMK_NETQUEUE_FILTER_TYPE_TXRX = VMK_UPLINK_QUEUE_FILTER_TYPE_TXRX, +} vmk_NetqueueFilterType; + + +/** + * \brief Netqueue filter class + */ +typedef enum vmk_NetqueueFilterClass { + /** Invalid filter */ + VMK_NETQUEUE_FILTER_CLASS_NONE = VMK_UPLINK_QUEUE_FILTER_CLASS_NONE, + + /** MAC only filter */ + VMK_NETQUEUE_FILTER_CLASS_MAC_ONLY = VMK_UPLINK_QUEUE_FILTER_CLASS_MAC_ONLY, + + /** VLAN only filter */ + VMK_NETQUEUE_FILTER_CLASS_VLAN_ONLY = VMK_UPLINK_QUEUE_FILTER_CLASS_VLAN_ONLY, + + /** VLAN + MAC address filter */ + VMK_NETQUEUE_FILTER_CLASS_VLANMAC = VMK_UPLINK_QUEUE_FILTER_CLASS_VLANMAC, + + /** VXLAN filter */ + VMK_NETQUEUE_FILTER_CLASS_VXLAN = VMK_UPLINK_QUEUE_FILTER_CLASS_VXLAN, +} vmk_NetqueueFilterClass; + + +/** + * Netqueue queue type + */ +typedef enum vmk_NetqueueQueueType { + /** Invalid queue type */ + VMK_NETQUEUE_QUEUE_TYPE_INVALID = VMK_UPLINK_QUEUE_TYPE_INVALID, + + /** RX queue type */ + VMK_NETQUEUE_QUEUE_TYPE_RX = VMK_UPLINK_QUEUE_TYPE_RX, + + /** TX queue type */ + VMK_NETQUEUE_QUEUE_TYPE_TX = VMK_UPLINK_QUEUE_TYPE_TX, +} vmk_NetqueueQueueType; + + +/** + * Netqueue queue flags + */ +typedef enum vmk_NetqueueQueueFlags { + /** queue is unused */ + VMK_NETQUEUE_QUEUE_FLAG_UNUSED = VMK_UPLINK_QUEUE_FLAG_UNUSED, + + /** queue is allocated and in use */ + VMK_NETQUEUE_QUEUE_FLAG_IN_USE = VMK_UPLINK_QUEUE_FLAG_IN_USE, + + /** queue is the default queue */ + VMK_NETQUEUE_QUEUE_FLAG_DEFAULT = VMK_UPLINK_QUEUE_FLAG_DEFAULT, +} vmk_NetqueueQueueFlags; + + +/** + * Netqueue queue state + */ +typedef enum vmk_NetqueueQueueState { + /** Queue stopped by the driver */ + VMK_NETQUEUE_STATE_STOPPED = VMK_UPLINK_QUEUE_STATE_STOPPED, + + /** Queue started administratively by the networking stack */ + VMK_NETQUEUE_STATE_STARTED = VMK_UPLINK_QUEUE_STATE_STARTED, +} vmk_NetqueueQueueState; + + +/** + * Netqueue queue feature + */ +typedef enum vmk_NetqueueQueueFeature { + /** None */ + VMK_NETQUEUE_QUEUE_FEAT_NONE = VMK_UPLINK_QUEUE_FEAT_NONE, + + /** Supports setting queue priority */ + VMK_NETQUEUE_QUEUE_FEAT_SET_PRIO = VMK_UPLINK_QUEUE_FEAT_SET_PRIO, + + /** Supports setting queue level intr coalescing parameters */ + VMK_NETQUEUE_QUEUE_FEAT_COALESCE = VMK_UPLINK_QUEUE_FEAT_COALESCE, + + /** Supports setting queue large receive offload(LRO) feature */ + VMK_NETQUEUE_QUEUE_FEAT_LRO = VMK_UPLINK_QUEUE_FEAT_LRO, + + /** Supports setting queue receive segment scaling (RSS) feature */ + VMK_NETQUEUE_QUEUE_FEAT_RSS = VMK_UPLINK_QUEUE_FEAT_RSS, + + /** Paired queue feature */ + VMK_NETQUEUE_QUEUE_FEAT_PAIR = VMK_UPLINK_QUEUE_FEAT_PAIR, + + /** Supports modification of RSS indirection table at run time*/ + VMK_NETQUEUE_QUEUE_FEAT_RSS_DYN = VMK_UPLINK_QUEUE_FEAT_RSS_DYN, + + /** Latency Sensitive queue feature */ + VMK_NETQUEUE_QUEUE_FEAT_LATENCY = VMK_UPLINK_QUEUE_FEAT_LATENCY, + + /** Dynamic queue feature */ + VMK_NETQUEUE_QUEUE_FEAT_DYNAMIC = VMK_UPLINK_QUEUE_FEAT_DYNAMIC, + + /** Pre-emptible queue feature */ + VMK_NETQUEUE_QUEUE_FEAT_PREEMPTIBLE = VMK_UPLINK_QUEUE_FEAT_PREEMPTIBLE, +} vmk_NetqueueQueueFeature; + + +/** + * \brief Filter definition + */ +typedef vmk_UplinkQueueFilter vmk_NetqueueFilter; + + +/** + * \brief MAC address only filter info + */ +typedef vmk_UplinkQueueMACFilterInfo vmk_NetqueueMACFilterInfo; + + +/** + * \brief VLAN ID only filter info + */ +typedef vmk_UplinkQueueVLANFilterInfo vmk_NetqueueVLANFilterInfo; + + +/** + * \brief MAC address + VLAN ID filter info + */ +typedef vmk_UplinkQueueVLANMACFilterInfo vmk_NetqueueVLANMACFilterInfo; + + +/** + * \brief VXLAN filter info + */ +typedef vmk_UplinkQueueVXLANFilterInfo vmk_NetqueueVXLANFilterInfo; + + +/** + * \brief Filter properties + */ +typedef enum vmk_NetqueueFilterProperties { + /** None */ + VMK_NETQUEUE_FILTER_PROP_NONE = VMK_UPLINK_QUEUE_FILTER_PROP_NONE, + + /** Management filter */ + VMK_NETQUEUE_FILTER_PROP_MGMT = VMK_UPLINK_QUEUE_FILTER_PROP_MGMT, + + /** Opportunistically packed with other filters */ + VMK_NETQUEUE_FILTER_PROP_PACK_OPPO = VMK_UPLINK_QUEUE_FILTER_PROP_PACK_OPPO, + + /** Opportunistically seek exclusive netqueue */ + VMK_NETQUEUE_FILTER_PROP_EXCL_OPPO = VMK_UPLINK_QUEUE_FILTER_EXCL_PACK_OPPO, +} vmk_NetqueueFilterProperties; + + +/** + * \brief Netqueue queue attribute type + */ +typedef enum vmk_NetqueueQueueAttrType { + + /** Priority attribute */ + VMK_NETQUEUE_QUEUE_ATTR_PRIOR = VMK_UPLINK_QUEUE_ATTR_PRIOR, + + /** Features attribute */ + VMK_NETQUEUE_QUEUE_ATTR_FEAT = VMK_UPLINK_QUEUE_ATTR_FEAT, + + /** Number of attributes */ + VMK_NETQUEUE_QUEUE_ATTR_NUM = 2, +} vmk_NetqueueQueueAttrType; + +/** + * \brief Netqueue queue attribute + */ +typedef vmk_UplinkQueueAttr vmk_NetqueueQueueAttr; + + +/* + *********************************************************************** + * vmk_NetqueueSetQueueIDUserVal -- */ /** + * + * \brief Set user's private value for queue ID. + * + * \param[in] qid Queue ID. + * \param[in] userval User value. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +static inline VMK_ReturnStatus +vmk_NetqueueSetQueueIDUserVal(vmk_NetqueueQueueID *qid, + vmk_uint32 userval) +{ + return vmk_UplinkQueueSetQueueIDUserVal(qid, userval); +} + + +/* + *********************************************************************** + * vmk_NetqueueQueueIDUserVal -- */ /** + * + * \brief Get user part of queue ID + * + * \param[in] qid Queue ID. + * + * \retval vmk_uint32 User value. + * + *********************************************************************** + */ + +static inline vmk_uint32 +vmk_NetqueueQueueIDUserVal(vmk_NetqueueQueueID qid) +{ + return vmk_UplinkQueueIDUserVal(qid); +} + + +/* + *********************************************************************** + * vmk_NetqueueSetQueueIDQueueDataIndex -- */ /** + * + * \brief Set queue data index for queue ID. + * + * \param[in] qid Queue ID. + * \param[in] index Index into queue data array in shared data + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +static inline VMK_ReturnStatus +vmk_NetqueueSetQueueIDQueueDataIndex(vmk_NetqueueQueueID *qid, + vmk_uint32 index) +{ + return vmk_UplinkQueueSetQueueIDQueueDataIndex(qid, index); +} + + +/* + *********************************************************************** + * vmk_NetqueueIDQueueDataIndex -- */ /** + * + * \brief Get queue data array index part of queue ID + * + * \param[in] qid Queue ID. + * + * \retval vmk_uint32 Queue data array index + * + *********************************************************************** + */ + +static inline vmk_uint32 +vmk_NetqueueIDQueueDataIndex(vmk_NetqueueQueueID qid) +{ + return vmk_UplinkQueueIDQueueDataIndex(qid); +} + + +/* + *********************************************************************** + * vmk_NetqueueMkTxQueueID -- */ /** + * + * \brief Create a Tx queue ID. + * + * \param[out] qid The created queue ID. + * \param[in] index The index into queue data array in shared data + * \param[in] val The embedded value of the queue ID. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +static inline VMK_ReturnStatus +vmk_NetqueueMkTxQueueID(vmk_NetqueueQueueID *qid, + vmk_uint32 index, + vmk_uint32 val) +{ + return vmk_UplinkQueueMkTxQueueID(qid, index, val); +} + + +/* + *********************************************************************** + * vmk_NetqueueMkRxQueueID -- */ /** + * + * \brief Create a Rx queue ID. + * + * \param[out] qid The created queue ID. + * \param[in] index The index into queue data array in shared data + * \param[in] val The embedded value of the queue ID. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +static inline VMK_ReturnStatus +vmk_NetqueueMkRxQueueID(vmk_NetqueueQueueID *qid, + vmk_uint32 index, + vmk_uint32 val) +{ + return vmk_UplinkQueueMkRxQueueID(qid, index, val); +} + + +/* + *********************************************************************** + * vmk_NetqueueQueueIDVal -- */ /** + * + * \brief Retrieve the embedded value of a queue ID. + * + * \param[in] qid The aimed queue ID. + * + * \return The embedded value. + * + *********************************************************************** + */ + +static inline vmk_uint32 +vmk_NetqueueQueueIDVal(vmk_NetqueueQueueID qid) +{ + return vmk_UplinkQueueIDVal(qid); +} + + +/* + *********************************************************************** + * vmk_NetqueueQueueIDType -- */ /** + * + * \brief Retrieve the type of a queue ID. + * + * \param[in] qid The aimed queue ID. + * + * \return The type. + * + *********************************************************************** + */ + +static inline vmk_NetqueueQueueType +vmk_NetqueueQueueIDType(vmk_NetqueueQueueID qid) +{ + return vmk_UplinkQueueIDType(qid); +} + + +/* + *********************************************************************** + * vmk_NetqueueMkFilterID -- */ /** + * + * \brief Create a filter ID. + * + * \param[in] val The embedded value of the filter ID. + * \param[out] fid The created filter. + * + * \retval VMK_OK Always. + * + *********************************************************************** + */ + +static inline VMK_ReturnStatus +vmk_NetqueueMkFilterID(vmk_NetqueueFilterID *fid, + vmk_uint16 val) +{ + return vmk_UplinkQueueMkFilterID(fid, val); +} + + +/* + *********************************************************************** + * vmk_NetqueueFilterIDVal -- */ /** + * + * \brief Retrieve the embedded value of a filter ID. + * + * \param[in] fid The aimed filter ID. + * + * \return The embedded value. + * + *********************************************************************** + */ + +static inline vmk_uint16 +vmk_NetqueueFilterIDVal(vmk_NetqueueFilterID fid) +{ + return vmk_UplinkQueueFilterIDVal(fid); +} + + +/** + * \brief Netqueue operations + */ +typedef enum vmk_NetqueueOp { + + /** + * \brief None + */ + VMK_NETQUEUE_OP_NONE = 0x0, + + /** + * \brief Get version + * Get the device's netqueue version. + */ + VMK_NETQUEUE_OP_GET_VERSION = 0x1, + + /** + * \brief Get features + * Get the device's netqueue features. + */ + VMK_NETQUEUE_OP_GET_FEATURES = 0x2, + + /** + * \brief Get queue count + * Get the number of Rx/Tx queues supported on a device. + */ + VMK_NETQUEUE_OP_QUEUE_COUNT = 0x3, + + /** + * \brief Get filter count + * Get the number of filters supported per queue. + */ + VMK_NETQUEUE_OP_FILTER_COUNT = 0x4, + + /** + * \brief Allocate a queue + * Allocate a queue of a specific type. + */ + VMK_NETQUEUE_OP_ALLOC_QUEUE = 0x5, + + /** + * \brief Release a queue + * Release an allocated queue. + */ + VMK_NETQUEUE_OP_FREE_QUEUE = 0x6, + + /** + * \brief Get queue interrupt cookie + * Get the interrupt cookie associated to a queue. + */ + VMK_NETQUEUE_OP_GET_QUEUE_INTERRUPT = 0x7, + + /** + * \brief Get default queue + * Get the Rx/Tx default queue. + */ + VMK_NETQUEUE_OP_GET_DEFAULT_QUEUE = 0x8, + + /** + * \brief Apply rx filter + * Apply a filter to a Rx queue. + */ + VMK_NETQUEUE_OP_APPLY_RX_FILTER = 0x9, + + /** + * \brief Remove rx filter + * Remove a filter from a Rx queue. + */ + VMK_NETQUEUE_OP_REMOVE_RX_FILTER = 0xa, + + /** + * \brief Get queue stats + * Get stats on a particular queue. + */ + VMK_NETQUEUE_OP_GET_QUEUE_STATS = 0xb, + + /** + * \brief Set Tx priority + * Set a priority on a particular Tx queue. + */ + VMK_NETQUEUE_OP_SET_TX_PRIORITY = 0xc, + + /** + * \brief Get/Set queue state + * Get and Set the state of netqueue on a particular device. + * Changing the mtu on a device puts netqueue in an invalid state + * in which the Rx filters are removed. Such state needs to + * be notified in order to restore the configuration before invalidation. + */ + VMK_NETQUEUE_OP_GETSET_QUEUE_STATE = 0xd, + + /** + * \brief Set queue interrupt cookie + * Set the queue interrupt cookie associated to a queue. + */ + VMK_NETQUEUE_OP_SET_QUEUE_INTERRUPT = 0xe, + + /** + * \brief Allocate a queue with attributes + * Allocate a queue of a specific type with attributes. + */ + VMK_NETQUEUE_OP_ALLOC_QUEUE_WITH_ATTR = 0xf, + + /** + * \brief Enable queue's feature + * Enable a feature on a given queue. + */ + VMK_NETQUEUE_OP_ENABLE_QUEUE_FEAT = 0x10, + + /** + * \brief Disable queue's feature + * Disable a feature on a given queue. + */ + VMK_NETQUEUE_OP_DISABLE_QUEUE_FEAT = 0x11, + + /** + * \brief Get queue's features + * Get the supported queues' features of a device. + */ + VMK_NETQUEUE_OP_GET_QUEUE_SUPPORTED_FEAT = 0x12, + + /** + * \brief Get queue filter required class + * Get the supported queue's filter class + */ + VMK_NETQUEUE_OP_GET_QUEUE_SUPPORTED_FILTER_CLASS = 0x13, + + /** + * \brief Reallocate a queue + * Free already allocated queue and reallocate of specific type. + */ + VMK_NETQUEUE_OP_REALLOC_QUEUE_WITH_ATTR = 0x14, + + /** + * \brief RSS config operation + * Perform an RSS specific operation + */ + VMK_NETQUEUE_OP_CONFIG_RSS = 0x15, + + /** + * \brief Get filters count of device + * Get the number of filters supported per device. + */ + VMK_NETQUEUE_OP_FILTER_COUNT_OF_DEVICE = 0x16, +} vmk_NetqueueOp; + +/** + * \ingroup Netqueue + * \brief RSS Op types + */ +typedef enum vmk_NetqueueRSSOpType { + /** + * \brief Get RSS params + * Get the RSS parameters from the device + */ + VMK_NETQUEUE_RSS_OP_GET_PARAMS = 0x1, + + /** + * \brief Init RSS + * Initialize RSS state (key + table) on the device + */ + VMK_NETQUEUE_RSS_OP_INIT_STATE = 0x2, + + /** + * \brief Update RSS redirection table + */ + VMK_NETQUEUE_RSS_OP_UPDATE_IND_TABLE = 0x3, + + /** + * \brief Get RSS redirection table + */ + VMK_NETQUEUE_RSS_OP_GET_IND_TABLE = 0x4, +} vmk_NetqueueRSSOpType; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_GET_VERSION + */ +typedef struct vmk_NetqueueOpGetVersionArgs { + + /** Minor version [out] */ + vmk_uint16 minor; + + /** Major version [out] */ + vmk_uint16 major; +} vmk_NetqueueOpGetVersionArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_GET_FEATURES + */ +typedef struct vmk_NetqueueOpGetFeaturesArgs { + + /** Supported features [out] */ + vmk_NetqueueFeatures features; +} vmk_NetqueueOpGetFeaturesArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_QUEUE_COUNT + */ +typedef struct vmk_NetqueueOpGetQueueCountArgs { + + /** Queue type aimed [in] */ + vmk_NetqueueQueueType qtype; + + /** Number of queue of this type [out] */ + vmk_uint16 count; +} vmk_NetqueueOpGetQueueCountArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_FILTER_COUNT + */ +typedef struct vmk_NetqueueOpGetFilterCountArgs { + + /** Queue type aimed [in] */ + vmk_NetqueueQueueType qtype; + + /** Number of filters per queue of this type [out] */ + vmk_uint16 count; +} vmk_NetqueueOpGetFilterCountArgs; + +/** + * \brief Arguments to VMK_NETQUEUE_OP_FILTER_COUNT_OF_DEVICE + */ +typedef struct vmk_NetqueueOpGetFilterCountOfDeviceArgs { + + /** Queue type aimed [in] */ + vmk_NetqueueQueueType qtype; + + /** Number of total filters supported per device [out] */ + vmk_uint16 filtersOfDeviceCount; + + /** Number of max filters per queue [out] */ + vmk_uint16 filtersPerQueueCount; +} vmk_NetqueueOpGetFilterCountOfDeviceArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_ALLOC_QUEUE + */ +typedef struct vmk_NetqueueOpAllocQueueArgs { + + /** Queue type aimed [in] */ + vmk_NetqueueQueueType qtype; + + /** Queue ID of the allocated queue [out] */ + vmk_NetqueueQueueID qid; + + /** Net poll on top of the allocated queue if any [out] */ + vmk_NetPoll net_poll; +} vmk_NetqueueOpAllocQueueArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_FREE_QUEUE + */ +typedef struct vmk_NetqueueOpFreeQueueArgs { + + /** Queue to release [in] */ + vmk_NetqueueQueueID qid; +} vmk_NetqueueOpFreeQueueArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_GET_QUEUE_INTERRUPT + */ +typedef struct vmk_NetqueueOpGetQueueInterruptArgs { + + /** Queue aimed [in] */ + vmk_NetqueueQueueID qid; + + /** Interrupt cookie associated to the queue [out] */ + vmk_IntrCookie intrCookie; +} vmk_NetqueueOpGetQueueInterruptArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_GET_DEFAULT_QUEUE + */ +typedef struct vmk_NetqueueOpGetDefaultQueueArgs { + + /** Default queue type VMK_NETQUEUE_TYPE_[RX|TX] [in] */ + vmk_NetqueueQueueType qtype; + + /** Queue ID of the default queue [out] */ + vmk_NetqueueQueueID qid; + + /** Net poll on top of the default queue if any [out] */ + vmk_NetPoll net_poll; +} vmk_NetqueueOpGetDefaultQueueArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_APPLY_RX_FILTER + */ +typedef struct vmk_NetqueueOpApplyRxFilterArgs { + + /** Queue aimed [in] */ + vmk_NetqueueQueueID qid; + + /** Filter to be applied [in] */ + vmk_NetqueueFilter filter; + + /** Filter ID [out] */ + vmk_NetqueueFilterID fid; + + /** + * Potential Paired tx queue hardware index [out] + * pairHWQID is hardware's internal TX queue identifier, it must + * be same as the embedded value passed to vmk_UplinkQueueMkTxQueueID + * when a TX queue is allocated. + */ + vmk_uint32 pairHWQID; +} vmk_NetqueueOpApplyRxFilterArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_REMOVE_RX_FILTER + */ +typedef struct vmk_NetqueueOpRemoveRxFilterArgs { + + /** Queue aimed [in] */ + vmk_NetqueueQueueID qid; + + /** Filter to be removed [in] */ + vmk_NetqueueFilterID fid; +} vmk_NetqueueOpRemoveRxFilterArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_GET_QUEUE_STATS + */ +typedef struct vmk_NetqueueOpGetQueueStatsArgs { + + /** Queue aimed [in] */ + vmk_NetqueueQueueID qid; +} vmk_NetqueueOpGetQueueStatsArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_SET_TX_PRIORITY + */ +typedef struct vmk_NetqueueOpSetTxPriorityArgs { + + /** Queue aimed [in] */ + vmk_NetqueueQueueID qid; + + /** Priority to set on the queue [in] */ + vmk_VlanPriority priority; +} vmk_NetqueueOpSetTxPriorityArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_GETSET_QUEUE_STATE + */ +typedef struct vmk_NetqueueOpGetSetQueueStateArgs { + + /** Netqueue old state (TRUE: Netqueue was in valid state, FALSE: otherwise) [out] */ + vmk_Bool oldState; + + /** Netqueue new state (TRUE: Netqueue set to valid state, FALSE: otherwise) [in] */ + vmk_Bool newState; +} vmk_NetqueueOpGetSetQueueStateArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_SET_QUEUE_INTERRUPT + */ +typedef struct vmk_NetqueueOpSetQueueInterruptArgs { + + /** Queue aimed [in] */ + vmk_NetqueueQueueID qid; + + /** Interrupt cookie to be set [in] */ + vmk_IntrCookie intrCookie; +} vmk_NetqueueOpSetQueueInterruptArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_ALLOC_QUEUE_WITH_ATTR + */ +typedef struct vmk_NetqueueOpAllocQueueWithAttrArgs { + + /** Queue type aimed [in] */ + vmk_NetqueueQueueType qtype; + + /** Number of attributes (Cannot be greater than VMK_NETQUEUE_ATTR_NUM) [in] */ + vmk_uint16 nattr; + + /** Queue attributes [in] */ + vmk_NetqueueQueueAttr *attr; + + /** Queue ID of the allocated queue [out] */ + vmk_NetqueueQueueID qid; + + /** Net poll on top of the allocated queue if any [out] */ + vmk_NetPoll net_poll; +} vmk_NetqueueOpAllocQueueWithAttrArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_ENABLE_QUEUE_FEAT + */ +typedef struct vmk_NetqueueOpEnableQueueFeatArgs { + + /** Queue aimed [in] */ + vmk_NetqueueQueueID qid; + + /** Features to be enabled [in] */ + vmk_NetqueueQueueFeature features; +} vmk_NetqueueOpEnableQueueFeatArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_DISABLE_QUEUE_FEAT + */ +typedef struct vmk_NetqueueOpDisableQueueFeatArgs { + + /** Queue aimed [in] */ + vmk_NetqueueQueueID qid; + + /** Features to be disabled [in] */ + vmk_NetqueueQueueFeature features; +} vmk_NetqueueOpDisableQueueFeatArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_GET_QUEUE_SUPPORTED_FEAT + */ +typedef struct vmk_NetqueueOpGetQueueSupFeatArgs { + + /** Queue type aimed [in] */ + vmk_NetqueueQueueType qtype; + + /** Features supported [out] */ + vmk_NetqueueQueueFeature features; +} vmk_NetqueueOpGetQueueSupFeatArgs; + + +/** + * \brief Arguments to VMK_NETQUEUE_OP_GET_FILTER_CLASS + */ +typedef struct vmk_NetqueueOpGetQueueSupFilterArgs { + + /** Queue type aimed [in] */ + vmk_NetqueueQueueType qtype; + + /** Filter type required [out] */ + vmk_NetqueueFilterClass class; +} vmk_NetqueueOpGetQueueSupFilterArgs; + +/** + * \ingroup Netqueue + * \brief Type for RSS hash key. + * + * This structure is used to program the RSS hash key. + */ +typedef vmk_UplinkQueueRSSHashKey vmk_NetqueueRSSHashKey; + +/** + * \ingroup Netqueue + * \brief Type for RSS indirection table. + * + * This structure is used to program or update the RSS indirection + * table. + */ +typedef vmk_UplinkQueueRSSIndTable vmk_NetqueueRSSIndTable; + +/** + * \ingroup Netqueue + * \brief Arguments to VMK_NETQUEUE_RSS_OP_GET_PARAMS + * + */ +typedef vmk_UplinkQueueRSSParams vmk_NetqueueRSSOpGetParamsArgs; + +/** + * \ingroup Netqueue + * \brief Arguments for VMK_NETQUEUE_RSS_OP_INIT_STATE + * + */ +typedef struct vmk_NetqueueRSSOpInitStateArgs { + /** Hash key */ + vmk_NetqueueRSSHashKey *rssKey; + + /** Indirection table */ + vmk_NetqueueRSSIndTable *rssIndTable; +} vmk_NetqueueRSSOpInitStateArgs; + + +/** + * \ingroup Netqueue + * \brief Arguments for VMK_NETQUEUE_OP_CONFIG_RSS + */ +typedef struct vmk_NetqueueOpConfigRSSArgs { + /** RSS Op type */ + vmk_NetqueueRSSOpType opType; + + /** RSS Op specific args */ + void *opArgs; +} vmk_NetqueueOpConfigRSSArgs; + +/** + * \ingroup Netqueue + * \brief Arguments to VMK_NETQUEUE_OP_REALLOC_QUEUE_WITH_ATTR + */ +typedef struct vmk_NetqueueOpReAllocQueueWithAttrArgs { + + /** args for alloc queue [in] */ + struct vmk_NetqueueOpAllocQueueWithAttrArgs *allocArgs; + + /** Number of filters to be removed from the queue [in] */ + vmk_uint16 rmFilterCount; + + /** args for remove filter [in] */ + vmk_NetqueueOpRemoveRxFilterArgs *rmFilterArgs; + + /** args for apply filter [in] */ + vmk_NetqueueOpApplyRxFilterArgs *applyRxFilterArgs; +} vmk_NetqueueOpReAllocQueueWithAttrArgs; + + +/* + *********************************************************************** + * vmk_UplinkQueueFlagsGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue flags + * + * \param[in] uplink Uplink handle + * \param[in] qID Capability + * + * \retval vmk_UplinkQueueFlags refer to definition of enum + * vmk_UplinkQueueFlags + * + *********************************************************************** + */ +vmk_UplinkQueueFlags vmk_UplinkQueueFlagsGet(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + +/* + *********************************************************************** + * vmk_UplinkQueueSupportedFeaturesGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue supported features + * + * \param[in] uplink Uplink handle + * \param[in] qID queue ID + * + * \retval vmk_UplinkQueueFeature refer to the definition of + * enum vmk_UplinkQueueFeature + * + *********************************************************************** + */ +vmk_UplinkQueueFeature vmk_UplinkQueueSupportedFeaturesGet(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueActiveFeaturesGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue active features + * + * \param[in] uplink Uplink handle + * \param[in] qID queue ID + * + * \retval vmk_UplinkQueueFeature refer to the definition of + * enum vmk_UplinkQueueFeature + * + *********************************************************************** + */ +vmk_UplinkQueueFeature vmk_UplinkQueueActiveFeaturesGet(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueMaxFiltersGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue max filters + * + * \param[in] uplink Uplink handle + * \param[in] qID queue ID + * + * \retval vmk_uint32 Integer indicating the maximum filters + * + *********************************************************************** + */ +vmk_uint32 vmk_UplinkQueueMaxFiltersGet(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueActiveFiltersGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue active filters + * + * \param[in] uplink Uplink handle + * \param[in] qID queue ID + * + * \retval vmk_uint32 Integer indicating the number of active + * filters + * + *********************************************************************** + */ +vmk_uint32 vmk_UplinkQueueActiveFiltersGet(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueNetPollGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue net poll + * + * \param[in] uplink Uplink handle + * \param[in] qID queue ID + * + * \retval NULL if no net poll routine is registered + * \retval Otherwise pointer to net poll routine + * + *********************************************************************** + */ +vmk_NetPoll vmk_UplinkQueueNetPollGet(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueVLANPrioGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue VLAN priority + * + * \param[in] uplink Uplink handle + * \param[in] qID queue ID + * + * \retval vmk_UplinkQueuePriority refer to the definition of + * enum vmk_UplinkQueuePriority + * + *********************************************************************** + */ +vmk_UplinkQueuePriority vmk_UplinkQueueVLANPrioGet(vmk_Uplink uplink, + vmk_UplinkQueueID qID); + + +/* + *********************************************************************** + * vmk_UplinkQueueSupportedTypesGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue supported types + * + * \param[in] uplink Uplink handle + * + * \retval vmk_UplinkQueueType refer to the definition of enum + * vmk_UplinkQueueType + * + *********************************************************************** + */ +vmk_UplinkQueueType vmk_UplinkQueueSupportedTypesGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkQueueDefaultRxQIDGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue default Rx queue ID + * + * \param[in] uplink Uplink handle + * + * \retval vmk_UplinkQueueID refer to the definition of enum + * vmk_UplinkQueueID + * + *********************************************************************** + */ +vmk_UplinkQueueID vmk_UplinkQueueDefaultRxQIDGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkQueueDefaultTxQIDGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue default TX queue ID + * + * \param[in] uplink Uplink handle + * + * \retval vmk_UplinkQueueID refer to the definition of enum + * vmk_UplinkQueueID + * + *********************************************************************** + */ +vmk_UplinkQueueID vmk_UplinkQueueDefaultTxQIDGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkQueueMaxRxQueuesGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue max Rx queues + * + * \param[in] uplink Uplink handle + * + * \retval vmk_uint32 Integer indicating the maximum RX queues + * + *********************************************************************** + */ +vmk_uint32 vmk_UplinkQueueMaxRxQueuesGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkQueueMaxTxQueuesGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue max tx queues + * + * \param[in] uplink Uplink handle + * + * \retval vmk_uint32 Integer indicating the maximum Tx queues + * + *********************************************************************** + */ +vmk_uint32 vmk_UplinkQueueMaxTxQueuesGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkQueueActiveQueuesGet -- */ /** + * + * \ingroup UplinkQueue + * \brief Get uplink queue active queues + * + * \param[in] uplink Uplink handle + * \param[in] heap ID of heap the returned bit vector will + * be allocated from. + * + * \retval vmk_BitVector Bit vector keeping indices of active + * queues, caller must call + * vmk_BitVectorFree to free its memory. + * NULL Failed to get. + * + *********************************************************************** + */ +vmk_BitVector *vmk_UplinkQueueActiveQueuesGet(vmk_Uplink uplink, + vmk_HeapID heap); + + + +#endif /* _VMKAPI_NET_QUEUE_INCOMPAT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_shaper_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_shaper_incompat.h new file mode 100644 index 0000000..53fdefa --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_shaper_incompat.h @@ -0,0 +1,254 @@ +/* ********************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * Shaper */ /** + * \addtogroup Network + *@{ + * \addtogroup Shaper Shaper Management APIs + *@{ + * + * \par Shaper: + * + * This API allows creating an instance of shaper independent of port. + * + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_SHAPER_INCOMPAT_H_ +#define _VMKAPI_NET_SHAPER_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "net/vmkapi_net_types.h" +#include "net/vmkapi_net_pktlist.h" + +/** + * \brief Opaque Handle for Shaper + */ + +typedef struct vmk_ShaperHandleInt *vmk_ShaperHandle; + +/** + * \brief Structure containing shaper parameters + */ + +typedef struct vmk_ShaperParams { + /** Average Bandwidth (in Bytes Per Second) to sustain */ + vmk_uint64 avgBPS; + + /** Peak Bandwidth (in Bytes Per Second) to sustain */ + vmk_uint64 peakBPS; + + /** Maximum burst size (in Bytes) allowed */ + vmk_uint64 burstSize; +} vmk_ShaperParams; + +/* + ****************************************************************************** + * vmk_ShaperClientResumeFn -- */ /** + * + * \brief Handler used by shaper resume shaper client's tolled IOs datapath + * + * \param[in] data Shaper client data. + * \param[in] pktList List of packets. + * + * \retval VMK_OK If resume function succeeded. + * \retval VMK_FAILURE Otherwise. + ****************************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ShaperClientResumeFn)(vmk_AddrCookie data, + vmk_PktList pktList); + +/* + ****************************************************************************** + * vmk_ShaperClientStatsFn -- */ /** + * + * \brief Handler used by shaper module to update client statistics + * + * \param[in] data Shaper client data. + * \param[in] ioQueued Number of packets queued. + * \param[in] ioInjected Number of packets injected. + * \param[in] ioDropped Number of packets dropped. + * + * \retval None + ****************************************************************************** + */ +typedef void (*vmk_ShaperClientStatsFn)(vmk_AddrCookie data, + vmk_uint32 ioQueued, + vmk_uint32 ioInjected, + vmk_uint32 ioDropped); + +/* + ****************************************************************************** + * vmk_ShaperClientCleanupFn -- */ /** + * + * \brief Handler used by shaper module to cleanup client instance + * + * \param[in] data Shaper client data. + * + * \retval None + ****************************************************************************** + */ +typedef void (*vmk_ShaperClientCleanupFn)(vmk_AddrCookie data); + +/* + ****************************************************************************** + * vmk_ShaperClientDropFn -- */ /** + * + * \brief Handler used by shaper module to drop a list of packets in the + * client + * + * \param[in] data Shaper client data. + * \param[in] pktList List of packets. + * + * \retval None + ****************************************************************************** + */ +typedef void (*vmk_ShaperClientDropFn)(vmk_AddrCookie data, + vmk_PktList pktList); + +/** + * \brief Structure containing shaper client operations + */ + +typedef struct vmk_ShaperClientOps { + + /** Shaper Client resume function */ + vmk_ShaperClientResumeFn resumeFn; + + /** Shaper Client cleanup function */ + vmk_ShaperClientCleanupFn cleanupFn; + + /** Shaper Client drop function */ + vmk_ShaperClientDropFn dropFn; + + /** Shaper Client stats function */ + vmk_ShaperClientStatsFn statsFn; +} vmk_ShaperClientOps; + +/** + * \brief Structure defining shaper client + */ + +typedef struct vmk_ShaperClient { + + /** Shaper Client opaque data structure */ + vmk_AddrCookie data; + + /** Shaper Client operations */ + vmk_ShaperClientOps ops; +} vmk_ShaperClient; + +/** + * \brief Define different shaper flags + */ +typedef enum vmk_ShaperFlags { + + /** \brief Flag indicating the shaper to copy the packet when put on queue */ + VMK_SHAPER_FLAG_COPY_ON_QUEUE = 1, +} vmk_ShaperFlags; + +/* + ****************************************************************************** + * vmk_ShaperCreate -- */ /** + * + * \brief Creates a shaper instance + * + * \param[in] id Shaper identifier. + * \param[in] params Shaper parameters. + * \param[in] flags Shaper flags. + * \param[in] client Shaper client. + * \param[out] handle Shaper handle. + * + * \retval VMK_OK On success. + * \retval VMK_FAILURE Otherwise. + ****************************************************************************** + */ +VMK_ReturnStatus vmk_ShaperCreate(char *id, + vmk_ShaperParams *params, + vmk_ShaperFlags flags, + vmk_ShaperClient *client, + vmk_ShaperHandle *handle); + +/* + ****************************************************************************** + * vmk_ShaperRelease -- */ /** + * + * \brief Destroys the shaper instance. + * + * \param[in] handle Shaper handle. + * + * \retval VMK_OK On success. + * \retval VMK_FAILURE Otherwise. + ****************************************************************************** + */ +VMK_ReturnStatus vmk_ShaperRelease(vmk_ShaperHandle handle); + +/* + ****************************************************************************** + * vmk_ShaperGetConfig -- */ /** + * + * \brief Get the current configuration of a given shaper instance + * + * \param[in] handle Shaper handle. + * \param[in] params Shaper parameters. + * + * \retval VMK_OK On success. + * \retval VMK_FAILURE Otherwise. + ****************************************************************************** + */ +VMK_ReturnStatus vmk_ShaperGetConfig(vmk_ShaperHandle handle, + vmk_ShaperParams *params); + +/* + ****************************************************************************** + * vmk_ShaperSetConfig -- */ /** + * + * \brief Set up new configuration for a shaper instance + * + * \param[in] handle Shaper handle. + * \param[in] params Shaper parameters. + * + * \retval VMK_OK On success. + * \retval VMK_FAILURE Otherwise. + ****************************************************************************** + */ +VMK_ReturnStatus vmk_ShaperSetConfig(vmk_ShaperHandle handle, + vmk_ShaperParams *params); + +/* + ****************************************************************************** + * vmk_ShaperFilter -- */ /** + * + * \brief Filter a packetlist with the shaper instance + * + * \note The packet list is passed to the shaper and if the calling instance + * immediately eligible to send some packets that packets are returned + * through the pktList. If no packets are eligible the pktList will be + * NULL. + * + * \param[in] handle Shaper handle. + * \param[in,out] pktList Packet list. + * + * \retval VMK_OK On success. + * \retval VMK_FAILURE Otherwise. + ****************************************************************************** + */ +VMK_ReturnStatus vmk_ShaperFilter(vmk_ShaperHandle handle, + vmk_PktList pktList); + +#endif /* _VMKAPI_NET_SHAPER_INCOMPAT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_tcpip_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_tcpip_incompat.h new file mode 100644 index 0000000..225c40a --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_tcpip_incompat.h @@ -0,0 +1,126 @@ +/*************************************************************************** + * Copyright 2007 - 2013 VMware, Inc. All rights reserved. + ***************************************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * vmkapi_net_tcpip_incompat.h */ /** + * \addtogroup Tcpip + * @{ + * \defgroup Tcpip Interfaces to the Tcpip stack + * @{ + * + *********************************************************************** + */ + +#ifndef _VMKAPI_NET_TCPIP_INCOMPAT_H_ +#define _VMKAPI_NET_TCPIP_INCOMPAT_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "sockets/vmkapi_socket.h" + +/** + * \brief Name of default TCPIP stack instance */ +#define VMK_TCPIP_DEFAULT_INSTANCE_NAME "defaultTcpipStack" + +/** + * \brief Opaque handle to tcpip stack instance. + */ +typedef struct vmk_TcpipInstanceInt *vmk_TcpipInstance; + +/** + * \brief Data structure for forwarding lookup + */ +typedef struct vmk_TcpipForwardingInfo { + /** \brief Layer 3 (IP) source address */ + vmk_SocketAddress l3src; + /** \brief Layer 2 (Ethernet) source address */ + vmk_EthAddress l2src; + /** \brief Layer 2 (Ethernet) destination address */ + vmk_EthAddress l2dst; + /** \brief Network MTU */ + vmk_uint16 mtu; + /** \brief Source PortID */ + vmk_SwitchPortID srcPortID; +} vmk_TcpipForwardingInfo; + +/* + *********************************************************************** + * vmk_TcpipInstanceLookupByName */ /** + * + * \ingroup Tcpip + * \brief Lookup a Tcpip stack instance by name and get a handle to it. + * + * \note If the tcpip stack instance is found, it is ref counted before + * the handle is returned. The ref count must be released by calling + * vmk_TcpipInstanceRelease(). + * + * \param[in] instName Name of the instance to lookup. + * \param[out] instance Handle to tcpip stack instance, if found. + * + * \retval VMK_OK Success + * \retval VMK_NOT_FOUND The instance was not found. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TcpipInstanceLookupByName(const char *instName, + vmk_TcpipInstance *instance); + +/* + *********************************************************************** + * vmk_TcpipInstanceRelease */ /** + * + * \ingroup Tcpip + * \brief Release reference to the Tcpip stack instance handle. + * + * \param[in] instance Handle to tcpip stack instance to be released + * + * \retval VMK_OK Success + * \retval VMK_FAILURE Failure + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TcpipInstanceRelease(vmk_TcpipInstance instance); + +/* + *********************************************************************** + * vmk_TcpipForwardingLookup */ /** + * + * \ingroup Tcpip + * \brief Lookup the layer 2 and layer 3 forwarding information. + * + * \param[in] l3dst Layer 3 destination. + * \param[in] instance Handle to the tcpip stack instance to use. + * Obtained using vmk_TcpipInstanceLookupByname() + * \param[out] info Result of forwarding lookup. Contains the + * L2 and L3 addresses. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM Invalid input parameter. + * \retval VMK_EHOSTUNREACH Destination is not reachable. + * \retval VMK_WOULD_BLOCK Route (and L3 source) was found, but L2 + * lookup is waiting for ARP resolution. + * \retval VMK_NOT_SUPPORTED Not supported by this stack. + * \retval VMK_FAILURE Other failure. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_TcpipForwardingLookup(vmk_SocketAddress *l3dst, + vmk_TcpipInstance instance, + vmk_TcpipForwardingInfo *info); + +#endif /* _VMKAPI_NET_TCPIP_INCOMPAT_H_ */ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_types.h index dc2742d..ff17777 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_types.h @@ -109,6 +109,11 @@ typedef vmk_uint8 vmk_EthAddress[VMK_ETH_ADDR_LENGTH]; /** Invalid identification number for a port */ #define VMK_VSWITCH_INVALID_PORT_ID 0 +/** + * \brief Identifier for a portset. + */ +typedef struct Portset vmk_Portset; + /** * \brief Identifier number for port on a virtual switch. */ @@ -150,7 +155,27 @@ typedef enum { typedef vmk_uint32 vmk_LinkSpeed; -#define VMK_LINK_SPEED_AUTO ((vmk_LinkSpeed) 0) +/** Uplink auto negotiated speed */ +#define VMK_LINK_SPEED_AUTO 0 + +/** Uplink link speed 10Mbps */ +#define VMK_LINK_SPEED_10_MBPS 10 + +/** Uplink link speed 100Mbps */ +#define VMK_LINK_SPEED_100_MBPS 100 + +/** Uplink link speed 1000Mbps */ +#define VMK_LINK_SPEED_1000_MBPS 1000 + +/** Uplink link speed 10000Mbps */ +#define VMK_LINK_SPEED_10000_MBPS 10000 + +/** Uplink link speed 40000Mbps */ +#define VMK_LINK_SPEED_40000_MBPS 40000 + +/** Uplink link speed 100000Mbps */ +#define VMK_LINK_SPEED_100000_MBPS 100000 + /** @@ -186,6 +211,15 @@ typedef struct { } vmk_LinkStatus; +/** + * \brief Uplink handle + * + * vmk_Uplink is used as a handle to perform operations on uplink devices. + * + */ +typedef struct UplinkDev *vmk_Uplink; + + #endif /* _VMKAPI_NET_TYPES_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_uplink.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_uplink.h index 3f3586d..5dd2a74 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_uplink.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_uplink.h @@ -12,11 +12,33 @@ * \addtogroup Network *@{ * \defgroup Uplink Uplink management + * + * In VMkernel, uplinks are logical uplink device objects registered by + * NIC drivers. They provide external connectivity. + * + * To register an uplink, device driver prepares uplink registraion data + * and passes it to vmk_DeviceRegister as registrationData in parameter + * vmk_DeviceProps. + * + * Once uplink device is created and registered, VMKernel calls driver's + * vmk_UplinkAssociateCB callback, where uplink object handle is handed + * off to device driver. Device driver should keep a copy of this handle + * and pass it to subsequent uplink vmkapi calls. Driver must declare + * all supported capabilities in this callback by calling + * vmk_UplinkCapRegister. + * + * After vmk_DeviceRegister returns, device driver should suppress any + * TX/RX activities until vmk_UplinkStartIOCB is invoked by VMKernel. + * + * vmk_UplinkQuiesceIOCB is invoked when logical uplink device is being + * quiesced. Driver should flush pending TX/RX packets and arrange for + * any new TX request to be ignored. + * + * vmk_UplinkDisassociateCB is invoked to inform the driver that the + * uplink handle is invalid. After the callback returns, driver should + * not use the uplink handle in any VMKAPI calls. + * *@{ - * - * In VMkernel, uplinks are physical NICs, also known as `pNics'. They - * provide external connectivity. - * *********************************************************************** */ #ifndef _VMKAPI_NET_UPLINK_H_ @@ -28,15 +50,22 @@ #endif /** \endcond never */ +#include "net/vmkapi_net_poll.h" +#include "net/vmkapi_net_vlan.h" +#include "net/vmkapi_net_dcb.h" +#include "net/vmkapi_net_queue.h" +#include "net/vmkapi_net_vlan.h" /** - * \brief Uplink handle - * - * vmk_Uplink is used as a handle to perform operations on uplink devices. - * + * \brief Identifier for logical uplink devices. */ -typedef struct UplinkDev * vmk_Uplink; +#define VMK_UPLINK_DEVICE_IDENTIFIER "com.vmware.uplink" + +/** + * \brief Number of bytes for uplink wake-on-lan strings. + */ +#define VMK_UPLINK_WOL_STRING_MAX 16 /** \brief Uplink event callback handle */ typedef void *vmk_UplinkEventCBHandle; @@ -71,6 +100,1820 @@ typedef struct vmk_UplinkEventData vmk_UplinkEventData; /** Uplink bas been unblocked on a portset */ #define VMK_UPLINK_EVENT_UNBLOCKED 0x80 + +/** + * \brief Uplink flags for misc. info. + */ +typedef enum vmk_UplinkFlags { + /** Physical device is hidden from management apps */ + VMK_UPLINK_FLAG_HIDDEN = 0x01, + + /** Physical device is being registered as pseudo device */ + VMK_UPLINK_FLAG_PSEUDO_REG = 0x02, +} vmk_UplinkFlags; + + + +/** + * \brief Uplink state + */ +typedef enum vmk_UplinkState { + + /** + * Uplink is administratively enabled + */ + VMK_UPLINK_STATE_ENABLED = 0x01, + + /** + * Uplink is administratively disabled + */ + VMK_UPLINK_STATE_DISABLED = 0x02, + + /** + * Uplink is in promiscuous mode + */ + VMK_UPLINK_STATE_PROMISC = 0x04, + + /** + * Uplink can receive broadcast packets + */ + VMK_UPLINK_STATE_BROADCAST_OK = 0x08, + + /** + * Uplink can receive multicast packets + */ + VMK_UPLINK_STATE_MULTICAST_OK = 0x10, +} vmk_UplinkState; + + +/** + * \brief Structure advertising a mode (speed/duplex) that is supported by + * an uplink. + */ + +typedef struct vmk_UplinkSupportedMode { + + /** Supported speed */ + vmk_LinkSpeed speed; + + /** Supported duplex */ + vmk_LinkDuplex duplex; + +} vmk_UplinkSupportedMode; + + +/** + * \brief Structure containing the information of the driver controlling + * the device associated to an uplink. + */ +typedef struct vmk_UplinkDriverInfo { + + /** String used to store the name of the driver */ + vmk_Name driver; + + /** String used to store the version of the driver */ + vmk_Name version; + + /** String used to store the firmware version of the driver */ + vmk_Name firmwareVersion; + + /** String used to store the name of the module managing this driver */ + vmk_Name moduleInterface; +} vmk_UplinkDriverInfo; + +/** + * \brief Structure containing statistics of the device associated to an + * uplink + */ +typedef struct vmk_UplinkStats { + + /** The number of rx packets received by the device */ + vmk_uint64 rxPkts; + + /** The number of tx packets sent by the device */ + vmk_uint64 txPkts; + + /** The number of rx bytes by the device */ + vmk_ByteCount rxBytes; + + /** The number of tx bytes by the device */ + vmk_ByteCount txBytes; + + /** The number of rx packets with errors */ + vmk_uint64 rxErrors; + + /** The number of tx packets with errors */ + vmk_uint64 txErrors; + + /** The number of rx packets dropped */ + vmk_uint64 rxDrops; + + /** The number of tx packets dropped */ + vmk_uint64 txDrops; + + /** The number of rx multicast packets */ + vmk_uint64 multicastPkts; + + /** The number of collisions */ + vmk_uint64 collisions; + + /** The number of rx length errors */ + vmk_uint64 rxLengthErrors; + + /** The number of rx ring buffer overflow */ + vmk_uint64 rxOverflowErrors; + + /** The number of rx packets with crc errors */ + vmk_uint64 rxCRCErrors; + + /** The number of rx packets with frame alignment error */ + vmk_uint64 rxFrameAlignErrors; + + /** The number of rx fifo overrun */ + vmk_uint64 rxFifoErrors; + + /** The number of rx packets missed */ + vmk_uint64 rxMissErrors; + + /** The number of tx aborted errors */ + vmk_uint64 txAbortedErrors; + + /** The number of tx carriers errors */ + vmk_uint64 txCarrierErrors; + + /** The number of tx fifo errors */ + vmk_uint64 txFifoErrors; + + /** The number of tx heartbeat errors */ + vmk_uint64 txHeartbeatErrors; + + /** The number of tx windows errors */ + vmk_uint64 txWindowErrors; +} vmk_UplinkStats; + +/** + * Uplink offload header alignment + */ +typedef enum vmk_UplinkOffloadHeaderAlignment { + /** Header starting address requires no alignment */ + VMK_UPLINK_OFFLOAD_HDR_ALIGN_ANY = 1, + + /** Header starting address must be 2 bytes aligned */ + VMK_UPLINK_OFFLOAD_HDR_ALIGN_2_BYTES = 2, + + /** Header starting address must be 4 bytes aligned */ + VMK_UPLINK_OFFLOAD_HDR_ALIGN_4_BYTES = 4, +} vmk_UplinkOffloadHeaderAlignment; + + +/** + * Uplink offload constraints + */ +typedef struct vmk_UplinkOffloadConstraints { + /** L3/L4 header alignment in bytes */ + vmk_UplinkOffloadHeaderAlignment headerAlignment; + + /** + * Maximum header offset supported by driver + * 0 = no limit + * Otherwise, driver can only support offloading with packet + * header offset no larger than maxHeaderOffset. + */ + vmk_uint32 maxHeaderOffset; +} vmk_UplinkOffloadConstraints; + + +/** + * Uplink capabilities + */ +typedef enum vmk_UplinkCap { + + /** Driver supports scatter-gather transmit */ + VMK_UPLINK_CAP_SG_TX = 1, + + /** Driver supports scatter-gather receive */ + VMK_UPLINK_CAP_SG_RX = 2, + + /** Driver supports scatter-gather entries spanning multiple pages */ + VMK_UPLINK_CAP_MULTI_PAGE_SG = 3, + + /** Driver supports IPv4 checksum offload */ + VMK_UPLINK_CAP_IPV4_CSO = 4, + + /** Driver supports IPv6 checksum offload */ + VMK_UPLINK_CAP_IPV6_CSO = 5, + + /** Driver supports checksum offload for IPV6 with extension headers */ + VMK_UPLINK_CAP_IPV6_EXT_CSO = 6, + + /** Driver supports VLAN RX offload (tag stripping) */ + VMK_UPLINK_CAP_VLAN_RX_STRIP = 7, + + /** Driver supports VLAN TX Offload (tag insertion) */ + VMK_UPLINK_CAP_VLAN_TX_INSERT = 8, + + /** Driver supports IPv4 TCP segmentation offload (TSO) */ + VMK_UPLINK_CAP_IPV4_TSO = 9, + + /** Driver supports IPv6 TCP segmentation offload (TSO) */ + VMK_UPLINK_CAP_IPV6_TSO = 10, + + /** Driver supports TSO for IPV6 with extension headers */ + VMK_UPLINK_CAP_IPV6_EXT_TSO = 11, + + /** Driver requires to be able to modify packet headers (on TX) */ + VMK_UPLINK_CAP_MOD_TX_HDRS = 12, + + /** Driver requires no packet scheduling */ + VMK_UPLINK_CAP_NO_SCHEDULER = 13, + + /** Driver supports accessing private statistics */ + VMK_UPLINK_CAP_PRIV_STATS = 14, + + /** + * Driver supports changing link status + * \note Driver must pass a pointer to vmk_UplinkLinkStatusSetCB + * when registering this capability. + */ + VMK_UPLINK_CAP_LINK_STATUS_SET = 15, + + /** + * Driver supports changing the interface MAC address + * \note Driver must pass a pointer to vmk_UplinkMACAddrSetCB when + * registering this capability. + */ + VMK_UPLINK_CAP_MAC_ADDR_SET = 16, + + /** + * Driver supports changing interrupt coalescing parameters + * \note Driver must pass a pointer to vmk_UplinkCoalesceParamsOps + * when registering this capability. + */ + VMK_UPLINK_CAP_COALESCE_PARAMS = 17, + + /** + * Driver supports VLAN filtering + * \note Driver must pass a pointer to vmk_UplinkVLANFilterOps when + * registering this capability. + */ + VMK_UPLINK_CAP_VLAN_FILTER = 18, + + /** + * Driver supports Wake-On-LAN + * \note Driver must pass a pointer to vmk_UplinkWOLOps when + * registering this capability. + */ + VMK_UPLINK_CAP_WAKE_ON_LAN = 19, + + /** + * Driver supports network core dumping + * \note Driver must pass a pointer to vmk_UplinkNetDumpOps when + * registering this capability. + */ + VMK_UPLINK_CAP_NETWORK_DUMP = 20, + + /** + * Driver supports multiple queue + * \note Driver must pass a pointer to vmk_UplinkQueueOps when + * registering this capability. + */ + VMK_UPLINK_CAP_MULTI_QUEUE = 21, + + /** + * Driver supports datacenter bridging (DCB) + * \note Driver must pass a pointer to vmk_UplinkDCBOps when + * registering this capability. + */ + VMK_UPLINK_CAP_DCB = 22, + + /** Driver supports UPT */ + VMK_UPLINK_CAP_UPT = 23, + + /** Driver supports SRIOV */ + VMK_UPLINK_CAP_SRIOV = 24, + + /** + * Driver supports encapsulated packet offload (eg. vxlan offload) + * \note When registering this capability, driver can pass a pointer to + * vmk_UplinkEncapOffloadOps if it's interested in VXLAN port + * update notification. + */ + VMK_UPLINK_CAP_ENCAP_OFFLOAD = 25, + + /** + * Drvier's TSO/Csum Offloads can be "offset" with constraints + * \note Driver must pass a pointer to vmk_UplinkOffloadConstraints + * when registering this capability. + */ + VMK_UPLINK_CAP_OFFLOAD_CONSTRAINTS = 26, + + /** + * Driver supports EEPROM dump + * \note Driver must pass a pointer to vmk_UplinkEEPROMOps when + * registering this capability. + */ + VMK_UPLINK_CAP_EEPROM = 27, + + /** + * Driver supports register dump + * \note Driver must pass a pointer to vmk_UplinkRegDumpOps when + * registering this capability. + */ + VMK_UPLINK_CAP_REGDUMP = 28, + + /** + * Driver supports self-test + * \note Driver must pass a pointer to vmk_UplinkSelfTestOps when + * registering this capability. + */ + VMK_UPLINK_CAP_SELF_TEST = 29, + + /** + * Driver supports pause frame parameter adjusting + * \note Driver must pass a pointer to vmk_UplinkPauseParamsOps when + * registering this capability. + */ + VMK_UPLINK_CAP_PAUSE_PARAMS = 30, + + /** + * Driver supports restarting negotiation of link speed/duplexity + * \note Driver must pass a pointer to vmk_UplinkRestartNegotiationCB + * when registering this capability. + */ + VMK_UPLINK_CAP_RESTART_NEG = 31, + + /** + * Driver supports hardware large receive offload (LRO) + * \note Driver must pass a pointer to vmk_UplinkQueueLROConstraints + * when registering this capability. + */ + VMK_UPLINK_CAP_LRO = 32, +} vmk_UplinkCap; + + +/* + *********************************************************************** + * vmk_UplinkTxCB -- */ /** + * + * \brief Handler used by vmkernel to send packet through the device + * associated to an uplink. + * + * \note This callback may not block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] pktList The set of packets needed to be sent + * + * \retval VMK_OK All the packets are being processed + * \retval VMK_FAILURE If the module detects any error during Tx + process + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkTxCB)(vmk_AddrCookie driverData, + vmk_PktList pktList); + + +/* + *********************************************************************** + * vmk_UplinkMTUSetCB -- */ /** + * + * \brief Handler used by vmkernel to set up the mtu of the device + * associated with an uplink. + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] mtu The mtu to be set up + * + * \retval VMK_OK If the mtu setting is effective + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkMTUSetCB)(vmk_AddrCookie driverData, + vmk_uint32 mtu); + + +/* + *********************************************************************** + * vmk_UplinkStateSetCB -- */ /** + * + * \brief Handler used by vmkernel to set uplink state + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] state new uplink state to be set + * + * \retval VMK_OK set state succeeds + * \retval VMK_FAILURE set state fails + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkStateSetCB)(vmk_AddrCookie driverData, + vmk_UplinkState state); + + +/* + *********************************************************************** + * vmk_UplinkLinkStatusSetCB -- */ /** + * + * + * \brief Handler used by vmkernel to set the speed/duplex of a device + * associated with an uplink. + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] linkInfo Specifies speed and duplex + * + * \retval VMK_OK If operation was successful + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkLinkStatusSetCB)(vmk_AddrCookie driverData, + vmk_LinkStatus *linkInfo); + + +/* + *********************************************************************** + * vmk_UplinkStatsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get statistics on a device + * associated to an uplink. + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] stats Structure used to store all the requested + * information. + * + * \retval VMK_OK If the statistics are properly stored + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkStatsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkStats *stats); + + +/* + *********************************************************************** + * vmk_UplinkAssociateCB -- */ /** + * + * \brief Handler used by vmkernal to notify driver that uplink is + * associated with device. + * + * \note This callback may block + * \note Driver must store the uplink parameter and pass it in + * subsequent uplink vmkapi calls, like vmk_UplinkCapRegister. + * \note Driver must declare all of its capabilities in this callback. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] uplink The uplink object associated with the device. + * + * \retval VMK_OK capabilities associated successfully + * \retval VMK_FAILURE capabilities associated failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkAssociateCB)(vmk_AddrCookie driverData, + vmk_Uplink uplink); + +/* + *********************************************************************** + * vmk_UplinkDisassociateCB -- */ /** + * + * \brief Handler used by vmkernal to notify driver that uplink is + * disassociated from device. + * + * \note This callback may block + * \note Driver doesn't need to unregister its capabilities in this + * callback. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK capabilities disassociated successfully + * \retval VMK_FAILURE capabilities disassociated failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkDisassociateCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkCapEnableCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver a capability is + * enabled + * + * \note The default behavior for a capability is to start off as + * "enabled". + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] cap ID of capability to be enabled + * + * \retval VMK_OK capability enabled successfully + * \retval VMK_FAILURE capability enabled failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkCapEnableCB)(vmk_AddrCookie driverData, + vmk_UplinkCap cap); + + +/* + *********************************************************************** + * vmk_UplinkCapDisableCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver a capability is + * disabled + * + * \note The default behavior for a capability is to start off as + * "enabled". + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] cap ID of capability to be disabled + * + * \retval VMK_OK capability disabled successfully + * \retval VMK_FAILURE capability disabled failed + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkCapDisableCB)(vmk_AddrCookie driverData, + vmk_UplinkCap cap); + + +/* + *********************************************************************** + * vmk_UplinkStartIOCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver uplink is ready to + * start IO on the device + * + * \note Driver should drop any TX/RX packets prior to this notification + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK Always + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkStartIOCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkQuiesceIOCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver uplink is ready to + * quiesce IO on the device + * + * \note Driver should flush TX/RX queues upon this notification + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK Always + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkQuiesceIOCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkResetCB -- */ /** + * + * \brief Handler used by vmkernel to notify driver uplink to reset + * the tx queues on the device. + * + * \note Driver should reset the device upon this notification + * + * \note This callback may block + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK Always + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkResetCB)(vmk_AddrCookie driverData); + + +/** \brief Basic uplink operations */ +typedef struct vmk_UplinkOps { + + /** Transmit packet list callback */ + vmk_UplinkTxCB uplinkTx; + + /** Set MTU callback */ + vmk_UplinkMTUSetCB uplinkMTUSet; + + /** Set state callback */ + vmk_UplinkStateSetCB uplinkStateSet; + + /** Get stats callback */ + vmk_UplinkStatsGetCB uplinkStatsGet; + + /** Notification of uplink associated with device driver */ + vmk_UplinkAssociateCB uplinkAssociate; + + /** Notification of uplink disassociated from device driver */ + vmk_UplinkDisassociateCB uplinkDisassociate; + + /** Capability enable callback */ + vmk_UplinkCapEnableCB uplinkCapEnable; + + /** Capability disable callback */ + vmk_UplinkCapDisableCB uplinkCapDisable; + + /** Driver can start IO callback */ + vmk_UplinkStartIOCB uplinkStartIO; + + /** Driver should quiesce IO callback */ + vmk_UplinkQuiesceIOCB uplinkQuiesceIO; + + /** Driver reset */ + vmk_UplinkResetCB uplinkReset; +} vmk_UplinkOps; + + +/** + * \brief Capabilities of wake-on-lan (wol) + */ +typedef enum vmk_UplinkWolCaps { + /** Wake on directed frames */ + VMK_UPLINK_WAKE_ON_PHY = 0x01, + + /** Wake on unicast frame */ + VMK_UPLINK_WAKE_ON_UCAST = 0x02, + + /** Wake on multicat frame */ + VMK_UPLINK_WAKE_ON_MCAST = 0x04, + + /** Wake on broadcast frame */ + VMK_UPLINK_WAKE_ON_BCAST = 0x08, + + /** Wake on arp */ + VMK_UPLINK_WAKE_ON_ARP = 0x10, + + /** Wake up magic frame */ + VMK_UPLINK_WAKE_ON_MAGIC = 0x20, + + /** Wake on magic frame */ + VMK_UPLINK_WAKE_ON_MAGICSECURE = 0x40 + +} vmk_UplinkWolCaps; + + +/** + * \brief Structure describing the wake-on-lan features and state of an + * uplink + */ +typedef struct vmk_UplinkWolState { + + /** Uplink supported wake-on-lan features */ + vmk_UplinkWolCaps supported; + + /** Uplink enabled wake-on-lan features */ + vmk_UplinkWolCaps enabled; + + /** Wake-On-LAN secure on password */ + char secureONPassword[VMK_UPLINK_WOL_STRING_MAX]; + +} vmk_UplinkWolState; + + +/** + * \brief Data shared between uplink layer and NIC driver + * + * \note This structure is allocated and initialized by driver. It's + * readable and writable to driver. And read only to uplink layer. + * vmk_VersionedAtomic lock needs to be used for coordinating + * access, except accessing volatile fields in structure + * vmk_UplinkSharedQueueData. + * + * \note For reader, driver can read without the versioned atomic if + * reading a single field AND it doesn't care about racing with + * its own writer thread. If the driver is reading multiple fields + * or it needs to synchronize with the writer thread it can choose + * to use the versioned atomic or use another mechanism to + * synchronize with writer thread. + * + * \note For writer, driver needs to take the versioned atomic to ensure + * uplink layer can achieve snapshot consistency. If its possible + * for the driver to have multiple threads doing writes, the + * driver has to take care of their synchronization since the + * versioned atomic lock does NOT serialize multiple writers. + */ +typedef struct vmk_UplinkSharedData { + + /** Lock to ensure snapshot consistency on reads, initialized by driver */ + vmk_VersionedAtomic lock; + + /** Uplink flags */ + vmk_UplinkFlags flags; + + /** Uplink state */ + vmk_UplinkState state; + + /** Uplink link status */ + vmk_LinkStatus link; + + /** Uplink MTU */ + vmk_uint32 mtu; + + /** + * Current logical MAC address in use this can be changed via + * vmk_UplinkMACAddrSetCB() + */ + vmk_EthAddress macAddr; + + /** Permanent hardware MAC address */ + vmk_EthAddress hwMacAddr; + + /** Pointer to supported modes array, list all modes device can support */ + vmk_UplinkSupportedMode *supportedModes; + + /** Size of supportedModes array in vmk_UplinkSupportedMode */ + vmk_uint32 supportedModesArraySz; + + /** Driver information */ + vmk_UplinkDriverInfo driverInfo; + + /** Shared queue information, mandatory for all devices */ + vmk_UplinkSharedQueueInfo *queueInfo; +} vmk_UplinkSharedData; + + +/** + * \brief Uplink registration data + * + * \note Before calling vmk_DeviceRegister, device driver needs to allocate + * and populate this structure. Then assign its pointer to member + * registrationData of structure vmk_DeviceProps, a parameter passed + * to vmk_DeviceRegister. + */ +typedef struct vmk_UplinkRegData { + + /** + * This parameter indicates the vmkapi revision driver compiled with. + */ + vmk_revnum apiRevision; + + /** Module ID of device driver */ + vmk_ModuleID moduleID; + + /** + * This parameter defines the operation function pointers provided by + * device driver + */ + vmk_UplinkOps ops; + + /** + * This parameter defines runtime shared data region provided by driver. + * It's allocated and initialized by driver. It's readable/writable to + * driver and read only to uplink layer. Access to it needs to be + * coordinated by its vmk_VersionedAtomic lock member. + */ + vmk_UplinkSharedData *sharedData; + + /** + * This is the private driver context data defined by driver. It will + * be passed to all callbacks into the driver. + */ + vmk_AddrCookie driverData; +} vmk_UplinkRegData; + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterEnableCB -- */ /** + * + * \brief Handler used by vmkernel to enable VLAN filter on device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If the operation succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterEnableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterDisableCB -- */ /** + * + * \brief Handler used by vmkernel to disable VLAN filter on device + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK If the operation succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterDisableCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterBitmapGetCB -- */ /** + * + * \brief Handler used by vmkernel to get uplink VLAN filter bitmap + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] bitmap VLAN filter bitmap + * + * \retval VMK_OK If the operation succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterBitmapGetCB)(vmk_AddrCookie driverData, + vmk_VLANBitmap *bitmap); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterBitmapSetCB -- */ /** + * + * \brief Handler used by vmkernel to set uplink VLAN filter bitmap + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] bitmap VLAN bitmap to be set + * + * \retval VMK_OK if the set VLAN filter bitmap call succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterBitmapSetCB)(vmk_AddrCookie driverData, + vmk_VLANBitmap *bitmap); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterAddCB -- */ /** + * + * \brief Handler used by vmkernel to add uplink VLAN filter + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] startID starting vlan ID + * \param[in] endID ending vlan ID + * + * \retval VMK_OK if the add VLAN filter call succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterAddCB)(vmk_AddrCookie driverData, + vmk_VlanID startID, + vmk_VlanID endID); + + +/* + *********************************************************************** + * vmk_UplinkVLANFilterRemoveCB -- */ /** + * + * \brief Handler used by vmkernel to remove uplink VLAN filter + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] startID Starting VLAN ID of VLAN range + * \param[in] endID ending VLAN ID of VLAN range + * + * \retval VMK_OK if the remove VLAN filter call succeeds + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVLANFilterRemoveCB)(vmk_AddrCookie driverData, + vmk_VlanID startID, + vmk_VlanID endID); + + +/** + * \brief VLAN filter operations + */ +typedef struct vmk_UplinkVLANFilterOps { + + /** Handler to enable VLAN Filters */ + vmk_UplinkVLANFilterEnableCB enableVLANFilter; + + /** Handler to disable VLAN Filters */ + vmk_UplinkVLANFilterDisableCB disableVLANFilter; + + /** Handler to get VLAN Filters bitmap */ + vmk_UplinkVLANFilterBitmapGetCB getVLANFilterBitmap; + + /** Handler to set VLAN Filters bitmap */ + vmk_UplinkVLANFilterBitmapSetCB setVLANFilterBitmap; + + /** Handler to add VLAN Filter */ + vmk_UplinkVLANFilterAddCB addVLANFilter; + + /** Handler to remove VLAN Filter */ + vmk_UplinkVLANFilterRemoveCB removeVLANFilter; +} vmk_UplinkVLANFilterOps; + + +/* + *********************************************************************** + * vmk_UplinkWOLStateGetCB -- */ /** + * + * \brief Handler used by vmkernel to get wake-on-lan state of + * device associated with an uplink. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] wolState Structure used to store all the requested + * information. + * + * \retval VMK_OK If the driver information is properly stored + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkWOLStateGetCB)(vmk_AddrCookie data, + vmk_UplinkWolState *wolState); + + +/* + *********************************************************************** + * vmk_UplinkWOLStateSetCB -- */ /** + * + * \brief Handler used by vmkernel to set wake-on-lan state of + * device associated with an uplink. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] wolState Structure used to store all the requested + * information. + * + * \retval VMK_OK If the driver information is properly stored + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkWOLStateSetCB)(vmk_AddrCookie driverData, + vmk_UplinkWolState *wolState); + + +/** + * \brief Wake-On-LAN operations + */ +typedef struct vmk_UplinkWOLOps { + + /** Handler to get uplink WOL state */ + vmk_UplinkWOLStateGetCB getWOLState; + + /** Handler to set uplink WOL state */ + vmk_UplinkWOLStateSetCB setWOLState; +} vmk_UplinkWOLOps; + + +/* + *********************************************************************** + * vmk_UplinkEEPROMLenGetCB -- */ /** + * + * \brief Handler used by vmkernel to get uplink device's EEPROM length + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] len length of EEPROM in bytes returned by + * driver + * + * \retval VMK_OK if the get EEPROM length call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkEEPROMLenGetCB)(vmk_AddrCookie driverData, + vmk_int32 *len); + + +/* + *********************************************************************** + * vmk_UplinkEEPROMDumpCB -- */ /** + * + * \brief Handler used by vmkernel to dump uplink device's EEPROM into + * a vmkernel allocated buffer + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] buf caller allocated buffer to store + * content from EEPROM + * \param[in] bufLen length of buf in bytes + * \param[in] offset the offset in EEPROM where dump starts + * \param[out] outLen the length actually read + * + * \retval VMK_OK if the dump EERPOM call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkEEPROMDumpCB)(vmk_AddrCookie driverData, + vmk_AddrCookie buf, + vmk_uint32 bufLen, + vmk_uint32 offset, + vmk_uint32 *outLen); + + +/* + *********************************************************************** + * vmk_UplinkEEPROMSetCB -- */ /** + * + * \brief Handler used by vmkernel to write uplink device's EEPROM + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] magic the magic word device accepts + * \param[in] buf content to write + * \param[in] bufLen content length in bytes + * \param[in] offset the offset in EEPROM where write starts + * + * \retval VMK_OK if the set EEPROM call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkEEPROMSetCB)(vmk_AddrCookie driverData, + vmk_uint32 magic, + vmk_AddrCookie buf, + vmk_uint32 bufLen, + vmk_uint32 offset); + + +/** + * \brief Device EEPROM related operations + */ +typedef struct vmk_UplinkEEPROMOps { + + /** Handler to get the length of EEPROM */ + vmk_UplinkEEPROMLenGetCB eepromLenGet; + + /** Handler to dump EEPROM content */ + vmk_UplinkEEPROMDumpCB eepromDump; + + /** Handler to write EEPROM */ + vmk_UplinkEEPROMSetCB eepromSet; +} vmk_UplinkEEPROMOps; + + +/* + *********************************************************************** + * vmk_UplinkRegDumpLenGetCB -- */ /** + * + * \brief Handler used by vmkernel to get device registers dump length + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] len length of registers in bytes returned by + * driver + * + * \retval VMK_OK if the get register dump length call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkRegDumpLenGetCB)(vmk_AddrCookie driverData, + vmk_uint32 *len); + + +/* + *********************************************************************** + * vmk_UplinkRegDumpCB -- */ /** + * + * \brief Handler used by vmkernel to dump device registers + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] buf caller allocated buffer to store registers, + * buffer length is returned by handler + * vmk_UplinkRegDumpLenGetCB + * + * \retval VMK_OK if the dump register call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkRegDumpCB)(vmk_AddrCookie driverData, + vmk_AddrCookie buf); + + +/** + * \brief Device registers dump related operations + */ +typedef struct vmk_UplinkRegDumpOps { + /** Handler to get registers dump length */ + vmk_UplinkRegDumpLenGetCB regDumpLenGet; + + /** Handler to dump registers */ + vmk_UplinkRegDumpCB regDump; +} vmk_UplinkRegDumpOps; + + +/* + *********************************************************************** + * vmk_UplinkSelfTestResultLenGetCB -- */ /** + * + * \brief Handler used by vmkernel to get self test result length + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] len length of self test result in + * vmk_UplinkSelfTestResult or + * vmk_UplinkSelfTestString + * + * \retval VMK_OK if the get self test result length call + * succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkSelfTestResultLenGetCB)(vmk_AddrCookie driverData, + vmk_uint32 *len); + + +/** + * Uplink self test result + */ +typedef vmk_uint64 vmk_UplinkSelfTestResult; + + +/** + * Uplink self test string + */ +typedef char vmk_UplinkSelfTestString[32]; + + +/* + *********************************************************************** + * vmk_UplinkSelfTestRunCB -- */ /** + * + * \brief Callback handler to run self run on device and return result + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] online if TRUE, perform online tests only, + * otherwise both online and offline tests. + * \param[out] passed self test is passed or not + * \param[out] resultBuf caller allocated buffer to store self test + * result, size is returned by + * vmk_UplinkSelfTestResultLenGetCB + * \param[out] stringBuf caller allocated buffer to store self test + * string, size is returned by + * vmk_UplinkSelfTestResultLenGetCB + * + * \retval VMK_OK if the run self test call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkSelfTestRunCB)(vmk_AddrCookie driverData, + vmk_Bool online, + vmk_Bool *passed, + vmk_UplinkSelfTestResult *resultBuf, + vmk_UplinkSelfTestString *stringsBuf); + + +/** + * \brief Device self test related operations + */ +typedef struct vmk_UplinkSelfTestOps { + + /** Handler to get self test result length */ + vmk_UplinkSelfTestResultLenGetCB selfTestResultLenGet; + + /** Handler to perform self test */ + vmk_UplinkSelfTestRunCB selfTestRun; +} vmk_UplinkSelfTestOps; + + +/** + * \brief Device pause paramters + */ +typedef struct vmk_UplinkPauseParams { + + /** Link is being auto-negotiated or not */ + vmk_Bool autoNegotiate; + + /** + * when autoNegotiate is zero, force driver to use/not-use pause + * RX flow control + */ + vmk_Bool rxPauseEnabled; + + /** + * when autoNegotiate is zero, force driver to use/not-use pause + * TX flow control + */ + vmk_Bool txPauseEnabled; +} vmk_UplinkPauseParams; + + +/* + *********************************************************************** + * vmk_UplinkPauseParamsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get pause parameters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] params pause parameters returned + * + * \retval VMK_OK if the get pause parameters call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkPauseParamsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkPauseParams *params); + + +/* + *********************************************************************** + * vmk_UplinkPauseParamsSetCB -- */ /** + * + * \brief Handler used by vmkernel to set pause parameters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] params pause parameters to set + * + * \retval VMK_OK if the set pause parameters call succeeds + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkPauseParamsSetCB)(vmk_AddrCookie driverData, + vmk_UplinkPauseParams params); + + +/** + * \brief Device pause parameters related operations + */ +typedef struct vmk_UplinkPauseParamsOps { + + /** Handler to get pause parameters */ + vmk_UplinkPauseParamsGetCB pauseParamsGet; + + /** Handler to set pause parameters */ + vmk_UplinkPauseParamsSetCB pauseParamsSet; +} vmk_UplinkPauseParamsOps; + + +/* + *********************************************************************** + * vmk_UplinkCapRegister -- */ /** + * + * \brief Register a capability with the networking stack + * + * \param[in] uplink pointer to upink device + * \param[in] cap capability to register + * \param[in] capOps operarion function table of this capability. + * It will be NULL if function table is not + * required for this capability + * + * \retval VMK_OK get stats succeeds + * Other status get stats fails + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkCapRegister(vmk_Uplink uplink, + vmk_UplinkCap cap, + vmk_AddrCookie capOps); + + +/* + *********************************************************************** + * vmk_UplinkPrivStatsGetCB -- */ /** + * + * \brief Handler used by vmkernel to get uplink private statistics + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] statBuf Buffer to keep device private stats + * \param[in] length Length of statBuf in bytes + * + * \retval VMK_OK if the get private stats call succeeds + * \retval VMK_FAILURE if the uplink doesn't support private stats + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkPrivStatsGetCB)(vmk_AddrCookie driverData, + char *statBuf, + vmk_ByteCount length); + + +/* + *********************************************************************** + * vmk_UplinkPrivStatsLengthGetCB -- */ /** + * + * \brief Handler used by vmkernel to get uplink private statistics + * length + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] length Length of private stats in bytes + * + * \retval VMK_OK if the get private stats call succeeds + * \retval VMK_FAILURE if the uplink doesn't support private stats + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkPrivStatsLengthGetCB)(vmk_AddrCookie driverData, + vmk_ByteCount *length); + +/** + * Uplink private stats operations + */ +typedef struct vmk_UplinkPrivStatsOps { + /** Handler used by vmkernel to get driver's private stats length */ + vmk_UplinkPrivStatsLengthGetCB privStatsLengthGet; + + /** Handler used by vmkernel to get driver's private stats */ + vmk_UplinkPrivStatsGetCB privStatsGet; +} vmk_UplinkPrivStatsOps; + + +/* + *********************************************************************** + * vmk_UplinkVXLANPortUpdateCB -- */ /** + * + * \brief Handler used by vmkernel to notify VXLAN port number updated + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] portNBO VXLAN port number in network byte order + * + * \retval VMK_OK If the notification is handled successfully + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkVXLANPortUpdateCB)(vmk_AddrCookie driverData, + vmk_uint16 portNBO); + + +/** + * Uplink encapsulation offload operations + */ +typedef struct vmk_UplinkEncapOffloadOps { + /** Handler used by vmkernel to notify VXLAN port number updated */ + vmk_UplinkVXLANPortUpdateCB vxlanPortUpdate; +} vmk_UplinkEncapOffloadOps; + + +/* + *********************************************************************** + * vmk_UplinkMACAddrSetCB -- */ /** + * + * \brief Handler used by vmkernel to set uplink MAC address + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] macAddr mac address to be set + * + * \retval VMK_OK if the get private stats length call succeeds + * \retval VMK_FAILURE if the uplink doesn't support private stats + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkMACAddrSetCB)(vmk_AddrCookie driverData, + vmk_EthAddress macAddr); + + +/* + *********************************************************************** + * vmk_UplinkRestartNegotiationCB -- */ /** + * + * \brief Handler used by vmkernel to restart negotiation on uplink + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK if the restart negotitation call succeeds + * \retval VMK_FAILURE if the uplink doesn't support restart + * negotiation + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkRestartNegotiationCB)(vmk_AddrCookie driverData); + + +/* + *********************************************************************** + * vmk_UplinkVXLANPortNBOGet -- */ /** + * + * \brief Get current VXLAN port number + * + * \retval vmk_uint16 VXLAN port number in network byte order + * + *********************************************************************** + */ +vmk_uint16 vmk_UplinkVXLANPortNBOGet(void); + +/* + *********************************************************************** + * vmk_UplinkTx -- */ /** + * + * \brief Transmit a list of packet to network + * + * \param[in] uplink Uplink handle + * \param[in] pktList List of packets to be transmitted + * + * \retval VMK_OK Packet transmission succeed + * \retval Other Value Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkTx(vmk_Uplink uplink, vmk_PktList pktList); + + +/* + *********************************************************************** + * vmk_UplinkFlagsGet -- */ /** + * + * \brief Get uplink flags + * + * \param[in] uplink Uplink handle + * + * \retval flags Uplink flags + * + *********************************************************************** + */ +vmk_UplinkFlags vmk_UplinkFlagsGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkStateGet -- */ /** + * + * \brief Get uplink state + * + * \param[in] uplink Uplink handle + * + * \retval state Uplink state + * + *********************************************************************** + */ +vmk_UplinkState vmk_UplinkStateGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkStateSet -- */ /** + * + * \brief Set uplink state + * + * \param[in] uplink Uplink handle + * \param[in] state State to set + * + * \retval VMK_OK State is set successfully + * \retval Other Value Setting stste failed + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkStateSet(vmk_Uplink uplink, + vmk_UplinkState state); + + +/* + *********************************************************************** + * vmk_UplinkLinkStatusGet -- */ /** + * + * \brief Return uplink link properties + * + * \param[in] uplink Uplink handle + * + * \retval status Uplink link status + * + *********************************************************************** + */ +vmk_LinkStatus vmk_UplinkLinkStatusGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkMTUGet -- */ /** + * + * \brief Get uplink MTU + * + * \param[in] uplink Uplink handle + * + * \retval mtu Uplink MTU + * + *********************************************************************** + */ +vmk_uint32 vmk_UplinkMTUGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkMTUSet -- */ /** + * + * \brief Set uplink MTU + * + * \param[in] uplink Uplink handle + * \param[in] mtu MTU to set + * + * \retval VMK_OK MTU is set successfully + * \retval Other Value Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkMTUSet(vmk_Uplink uplink, vmk_uint32 mtu); + + +/* + *********************************************************************** + * vmk_UplinkMACAddrGet -- */ /** + * + * \brief Get uplink MAC address + * + * \param[in] uplink Uplink handle + * \param[out] mac Uplink MAC address + * + * \retval VMK_OK operation succeeds + * \retval Other Value Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkMACAddrGet(vmk_Uplink uplink, + vmk_EthAddress *mac); + + +/* + *********************************************************************** + * vmk_UplinkDriverInfoGet -- */ /** + * + * \brief Return uplink driver info + * + * \param[in] uplink Uplink handle + * + * \retval info Uplink driver information + * + *********************************************************************** + */ +vmk_UplinkDriverInfo vmk_UplinkDriverInfoGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkStatsGet -- */ /** + * + * \brief Return uplink stats + * + * \param[in] uplink Uplink handle + * + * \retval stats Uplink stats + * + *********************************************************************** + */ +vmk_UplinkStats vmk_UplinkStatsGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkPrivStatsLengthGet -- */ /** + * + * \brief Return the length of device's private stats + * + * \param[in] uplink Uplink handle + * + * \retval length Device's private stats in bytes, return 0 if + * device doesn't support private stats + * + *********************************************************************** + */ +vmk_ByteCount vmk_UplinkPrivStatsLengthGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkPrivStatsGet -- */ /** + * + * \brief Get the content of device's private stats + * + * \param[in] uplink Uplink handle + * \param[in] buffer Caller allocated buffer to store device's + * private stats + * \param[in] length Length of buffer in bytes + * + * \retval VMK_OK Private stats stored in buffer successfully + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkPrivStatsGet(vmk_Uplink uplink, + char *buffer, + vmk_ByteCount length); + + +/* + *********************************************************************** + * vmk_UplinkNameGet -- */ /** + * + * \brief Return uplink name + * + * \param[in] uplink Uplink handle + * + * \retval name Uplink name + * + *********************************************************************** + */ +vmk_Name vmk_UplinkNameGet(vmk_Uplink uplink); + + +/* + *********************************************************************** + * vmk_UplinkCapIsRegistered -- */ /** + * + * \brief Indicates if uplink capability is registered or not + * + * \param[in] uplink Uplink handle + * \param[in] cap Capability + * + * \retval TRUE if uplink capability is registered + * \retval FALSE Otherwise + * + *********************************************************************** + */ +vmk_Bool vmk_UplinkCapIsRegistered(vmk_Uplink uplink, vmk_UplinkCap cap); + + +/* + *********************************************************************** + * vmk_UplinkCapIsEnabled -- */ /** + * + * \brief Indicates if uplink capability is enabled or not + * + * \param[in] uplink Uplink handle + * \param[in] cap Capability + * + * \retval TRUE if capability is enabled + * \retval FALSE Otherwise + * + *********************************************************************** + */ +vmk_Bool vmk_UplinkCapIsEnabled(vmk_Uplink uplink, vmk_UplinkCap cap); + +/* + *********************************************************************** + * vmk_UplinkPktIRQRx -- */ /** + * + * \brief Queue a specified packet coming from an uplink for Rx process. + * + * \param[in] uplink Uplink where the packet came from + * \param[in] pkt Target packet + * + *********************************************************************** + */ +void vmk_UplinkPktIRQRx(vmk_Uplink uplink, + vmk_PktHandle *pkt); + + +/* + *********************************************************************** + * vmk_UplinkPktListIRQRx -- */ /** + * + * \brief Process a list of packets from an uplink. + * + * \param[in] uplink Uplink from where the packets came from. + * \param[in] pktList Set of packets to process. + * + *********************************************************************** + */ +void vmk_UplinkPktListIRQRx(vmk_Uplink uplink, + vmk_PktList pktList); + + /* *********************************************************************** * vmk_UplinkEventCB -- */ /** @@ -99,7 +1942,7 @@ typedef struct vmk_UplinkEventData vmk_UplinkEventData; typedef void (*vmk_UplinkEventCB)(vmk_Name *uplinkName, vmk_UplinkEvent event, vmk_UplinkEventData *eventData, - void *cbData); + vmk_AddrCookie cbData); /* @@ -129,10 +1972,10 @@ typedef void (*vmk_UplinkEventCB)(vmk_Name *uplinkName, *********************************************************************** */ -VMK_ReturnStatus vmk_UplinkIoctl(vmk_Uplink uplink, - vmk_uint32 cmd, - void *args, - vmk_uint32 *result); +VMK_ReturnStatus vmk_UplinkIoctl(vmk_Uplink uplink, + vmk_uint32 cmd, + vmk_AddrCookie args, + vmk_uint32 *result); /* @@ -166,6 +2009,37 @@ VMK_ReturnStatus vmk_UplinkIoctl(vmk_Uplink uplink, VMK_ReturnStatus vmk_UplinkReset(vmk_Uplink uplink); +/* + *********************************************************************** + * vmk_UplinkSetWatchdogTimeout -- */ /** + * + * \brief Set the uplink device watchdog timeout value + * + * By default every device's watchdog timeout value is set to + * pre-configured system wide value. This API can be used to change + * the default watchdog timeout value to a timeout value that is more + * specific to the device. + * + * In some cases the driver may want to call this API before performing + * operations that stop the queues for a longer time than usual. This + * allows the driver to avoid spurious watchdog resets from the uplink + * layer. The driver can restore the original timeout value after + * completing the operation. + * + * \note Default watchdog time out value may be changed by setting the + * config option NetSchedWatchdogTimeout to the desired value + * + * \param[in] uplink Uplink handle + * \param[in] timeoutMS Timeout in MS + * + * \retval VMK_OK on success + * \retval VMK_BAD_PARAM if uplink or timeoutMS is not valid + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkSetWatchdogTimeout(vmk_Uplink uplink, + vmk_uint16 timeoutMS); + /* *********************************************************************** * vmk_UplinkGetByName -- */ /** @@ -214,6 +2088,25 @@ VMK_ReturnStatus vmk_UplinkGetPortID(vmk_Uplink uplink, vmk_SwitchPortID *portID); +/* + *********************************************************************** + * vmk_UplinkUpdateLinkState -- */ /** + * + * \brief Update link status information related to a specified uplink + * with a bundle containing the information. + * + * \param[in] uplink Uplink aimed + * \param[in] linkInfo Structure containing link information + * + * \retval VMK_OK Always + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_UplinkUpdateLinkState(vmk_Uplink uplink, + vmk_LinkStatus *linkInfo); + + /* *********************************************************************** @@ -245,7 +2138,7 @@ VMK_ReturnStatus vmk_UplinkRegisterEventCB( vmk_Uplink uplink, vmk_uint64 eventMask, vmk_UplinkEventCB cb, - void *cbData, + vmk_AddrCookie cbData, vmk_UplinkEventCBHandle *handle); diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_uplink_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_uplink_incompat.h index 97bd2f6..837ef09 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_uplink_incompat.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/net/vmkapi_net_uplink_incompat.h @@ -23,12 +23,12 @@ * Thereby vmkernel could rely on this module to Tx/Rx packets. * * So one can imagine an uplink as a vmkernel bundle containing - * all the handle required to interact with a module's internal network + * all the handle required to interact with a module's internal network * object. * * Something important to understand is that an uplink need to reflect * the harware services provided by the network interface is linked to. - * Thereby if your network interface do vlan tagging offloading a capability + * Thereby if your network interface do vlan tagging offloading a capability * should be passed to vmkernel to express this service and it will be able * to use this capability to optimize its internal path when the got * corresponding uplink is going to be used. @@ -48,22 +48,28 @@ #include "net/vmkapi_net_types.h" #include "net/vmkapi_net_pkt.h" #include "net/vmkapi_net_pktlist.h" -#include "net/vmkapi_net_netqueue.h" +#include "net/vmkapi_net_queue.h" +#include "net/vmkapi_net_queue_incompat.h" #include "net/vmkapi_net_dcb.h" #include "net/vmkapi_net_pt.h" #include "net/vmkapi_net_uplink.h" #include "vds/vmkapi_vds_port.h" +/** + * \brief Unrecognized link speed + */ +#define VMK_LINK_SPEED_UNKNOWN (-1) + +/** + * \brief Unrecognized link duplex + */ +#define VMK_LINK_DUPLEX_UNKNOWN (0) + /** * \brief Number of bytes for uplink driver info fields. */ #define VMK_UPLINK_DRIVER_INFO_MAX VMK_MODULE_NAME_MAX -/** - * \brief Number of bytes for uplink wake-on-lan strings. - */ -#define VMK_UPLINK_WOL_STRING_MAX 16 - /** * \brief Capabilities provided by the device associated to an uplink. */ @@ -77,254 +83,86 @@ typedef vmk_uint64 vmk_UplinkCapabilities; typedef struct { /** Device representing the uplink */ vmk_Device device; - + /** Device DMA constraints */ vmk_DMAConstraints constraints; } vmk_UplinkDeviceInfo; -/** - * \brief Structure containing Panic-time polling information of the device associated to an uplink. - */ - -typedef struct { - - /** Interrupt vector */ - vmk_uint32 vector; - - /** Polling data to be passed to the polling function */ - void *clientData; -} vmk_UplinkPanicInfo; /** * \brief Structure containing memory resources information related to the device associated to an uplink. */ typedef struct { - + /** Uplink I/O address */ - void *baseAddr; - + vmk_AddrCookie baseAddr; + /** Shared mem start */ - void *memStart; + vmk_AddrCookie memStart; /** Shared mem end */ - void *memEnd; + vmk_AddrCookie memEnd; /** DMA channel */ - vmk_uint8 dma; + vmk_uint8 dma; } vmk_UplinkMemResources; -/** - * \brief Structure containing the information of the driver controlling the - * the device associated to an uplink. - */ - -typedef struct { - - /** \brief String used to store the name of the driver */ - char driver[VMK_UPLINK_DRIVER_INFO_MAX]; - - /** \brief String used to store the version of the driver */ - char version[VMK_UPLINK_DRIVER_INFO_MAX]; - - /** \brief String used to store the firmware version of the driver */ - char firmwareVersion[VMK_UPLINK_DRIVER_INFO_MAX]; - - /** \brief String used to store the name of the module managing this driver */ - char moduleInterface[VMK_UPLINK_DRIVER_INFO_MAX]; -} vmk_UplinkDriverInfo; - -/** - * \brief Capabilities of wake-on-lan (wol) - */ -typedef enum { - /** \brief wake on directed frames */ - VMK_UPLINK_WAKE_ON_PHY = 0x01, - - /** \brief wake on unicast frame */ - VMK_UPLINK_WAKE_ON_UCAST = 0x02, - - /** \brief wake on multicat frame */ - VMK_UPLINK_WAKE_ON_MCAST = 0x04, - - /** \brief wake on broadcast frame */ - VMK_UPLINK_WAKE_ON_BCAST = 0x08, - - /** \brief wake on arp */ - VMK_UPLINK_WAKE_ON_ARP = 0x10, - - /** \brief wake up magic frame */ - VMK_UPLINK_WAKE_ON_MAGIC = 0x20, - - /** \brief wake on magic frame */ - VMK_UPLINK_WAKE_ON_MAGICSECURE = 0x40 - -} vmk_UplinkWolCaps; - -/** - * \brief Structure describing the wake-on-lan features and state of an uplink - */ - -typedef struct { - - /** \brief bit-flags, describing uplink supported wake-on-lan features */ - vmk_UplinkWolCaps supported; - - /** \brief bit-flags, describing uplink enabled wake-on-lan features */ - vmk_UplinkWolCaps enabled; - - /** \brief wake-on-lan secure on password */ - char secureONPassword[VMK_UPLINK_WOL_STRING_MAX]; - -} vmk_UplinkWolState; - - -/** - * \brief Structure describing interrupt coalescing parameters of an uplink - */ -typedef struct { - /** \brief number of milliseconds to wait for Rx, before interrupting */ - vmk_uint32 rxUsecs; - - /** \brief maximum number of (Rx) frames to wait for, before interrupting */ - vmk_uint32 rxMaxFrames; - - /** \brief number of milliseconds to wait for completed Tx, before interrupting */ - vmk_uint32 txUsecs; - - /** \brief maximum number of completed (Tx) frames to wait for, before interrupting */ - vmk_uint32 txMaxFrames; - -} vmk_UplinkCoalesceParams; - /* *********************************************************************** - * vmk_UplinkStartTx -- */ /** + * vmk_UplinkOpenDevCB -- */ /** * - * \brief Handler used by vmkernel to send packet through the device - * associated to an uplink. + * \brief Handler used by vmkernel to open the device associated to an + * uplink * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] pktList The set of packet needed to be sent + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * + * \retval VMK_OK Open succeeded + * \retval VMK_FAILURE Otherwise * - * \retval VMK_OK All the packets are being processed - * \retval VMK_FAILURE If the module detects any error during - * Tx process *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkStartTx)(void *clientData, - vmk_PktList pktList); +typedef VMK_ReturnStatus (*vmk_UplinkOpenDevCB)(vmk_AddrCookie driverData); /* *********************************************************************** - * vmk_UplinkStartPanicTx -- */ /** + * vmk_UplinkCloseDevCB -- */ /** * - * \brief Handler used by vmkernel to send packet through the device - * associated to an uplink, during PANIC. + * \brief Handler used by vmkernel to close the device associated to an + * uplink * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] pktList The set of packet needed to be sent + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. * - * \retval VMK_OK All the packets are being processed - * \retval VMK_FAILURE If the module detects any error during - * Tx process - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkStartPanicTx)(void *clientData, - vmk_PktList pktList); - -/* - *********************************************************************** - * vmk_UplinkOpenDev -- */ /** - * - * \brief Handler used by vmkernel to open the device associated to an uplink . - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * - * \retval VMK_OK Open succeeded - * \retval VMK_FAILURE Otherwise + * \retval VMK_OK Close succeeded + * \retval VMK_FAILURE Otherwise * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkOpenDev)(void *clientData); +typedef VMK_ReturnStatus (*vmk_UplinkCloseDevCB)(vmk_AddrCookie driverData); -/* - *********************************************************************** - * vmk_UplinkCloseDev -- */ /** - * - * \brief Handler used by vmkernel to close the device associated to an uplink - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * - * \retval VMK_OK Close succeeded - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkCloseDev)(void *clientData); - -/* - *********************************************************************** - * vmk_UplinkPanicPoll -- */ /** - * - * \brief Handler used by vmkernel to poll for packets received by - * the device associated to an uplink. Might be ignored. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] budget Maximum work to do in the poll function. - * \param[out] workDone The amount of work done by the poll handler - * - * \retval VMK_OK Always - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkPanicPoll)(void *clientData, - vmk_uint32 budget, - vmk_int32* workDone); - -/* - *********************************************************************** - * vmk_UplinkFlushBuffers -- */ /** - * - * \brief Handler used by vmkernel to flush the Tx/Rx buffer of - * the device associated to an uplink. Might be ignored. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * - * \retval VMK_OK Always - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkFlushBuffers)(void *clientData); /* *********************************************************************** * vmk_UplinkIoctlCB -- */ /** * - * \brief Handler used by vmkernel to do an ioctl call against the + * \brief Handler used by vmkernel to do an ioctl call against the * device associated to an uplink. - * * - * \param[in] uplinkName Name of the aimed device + * + * \param[in] driverData driver private data pointer sepecified + * in vmk_UplinkRegData during + * registration * \param[in] cmd Command ioctl to be issued * \param[in] args Arguments to be passed to the ioctl call * \param[out] result Result value of the ioctl call @@ -335,206 +173,72 @@ typedef VMK_ReturnStatus (*vmk_UplinkFlushBuffers)(void *clientData); *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkIoctlCB)(char *uplinkName, - vmk_uint32 cmd, - void *args, +typedef VMK_ReturnStatus (*vmk_UplinkIoctlCB)(vmk_AddrCookie driverData, + vmk_uint32 cmd, + vmk_AddrCookie args, vmk_uint32 *result); /* *********************************************************************** - * vmk_UplinkBlockDev -- */ /** - * - * \brief Handler used by vmkernel to block a device. No more traffic - * should go through after this call. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * - * \retval VMK_OK If device is blocked - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkBlockDev)(void *clientData); - -/* - *********************************************************************** - * vmk_UplinkUnblockDev -- */ /** - * - * \brief Handler used by vmkernel to unblock a device. Traffic should - * go through after this call. - * - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * - * \retval VMK_OK If device is unblocked - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkUnblockDev)(void *clientData); - -/* - *********************************************************************** - * vmk_UplinkSetLinkStatus -- */ /** - * - * \brief Handler used by vmkernel to set the speed/duplex of a device - * associated with an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] linkInfo Specifies speed and duplex - * - * \retval VMK_OK If operation was successful - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkSetLinkStatus)(void *clientData, - vmk_LinkStatus *linkInfo); - -/* - *********************************************************************** - * vmk_UplinkResetDev -- */ /** - * - * \brief Handler used by vmkernel to reset a device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * - * \retval VMK_OK If device is reset - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkResetDev)(void *clientData); - - -/* - *********************************************************************** - * vmk_UplinkGetStates -- */ /** - * - * \brief Handler used by vmkernel to get the state of a device - * associated to an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] state State of the device - * - * \retval VMK_OK If the information is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkGetStates)(void *clientData, - vmk_PortClientStates *states); - -/* - *********************************************************************** - * vmk_UplinkGetMemResources -- */ /** + * vmk_UplinkGetMemResourcesCB -- */ /** * * \brief Handler used by vmkernel to get the memory resources of a device * associated to an uplink. * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] resources Memory resources of the device + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] resources Memory resources of the device * - * \retval VMK_OK If the information is properly stored - * \retval VMK_FAILURE Otherwise + * \retval VMK_OK If the information is properly stored + * \retval VMK_FAILURE Otherwise * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkGetMemResources)(void *clientData, - vmk_UplinkMemResources *resources); +typedef VMK_ReturnStatus (*vmk_UplinkGetMemResourcesCB)(vmk_AddrCookie driverData, + vmk_UplinkMemResources *resources); /* *********************************************************************** - * vmk_UplinkGetDeviceProperties -- */ /** + * vmk_UplinkGetDevicePropertiesCB -- */ /** * * \brief Handler used by vmkernel to get pci properties of a device * associated to an uplink. * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection. - * \param[out] devInfo Device properties of the device. + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] devInfo Device properties of the device. * - * \retval VMK_OK If the information is properly stored + * \retval VMK_OK If the information is properly stored * \retval VMK_FAILURE Otherwise * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkGetDeviceProperties)(void *clientData, - vmk_UplinkDeviceInfo *devInfo); +typedef VMK_ReturnStatus (*vmk_UplinkGetDevicePropertiesCB)(vmk_AddrCookie driverData, + vmk_UplinkDeviceInfo *devInfo); + /* *********************************************************************** - * vmk_UplinkGetPanicInfo -- */ /** - * - * \brief Handler used by vmkernel to get panic-time polling properties - * of a device associated to an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] panicInfo Panic-time polling properties of the device - * - * \retval VMK_OK If the information is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkGetPanicInfo)(void *clientData, - vmk_UplinkPanicInfo *panicInfo); - -/* - *********************************************************************** - * vmk_UplinkGetMACAddr -- */ /** - * - * \brief Handler used by vmkernel to get the mac address of a device - * associated to an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] macAddr Buffer used to store the mac address - * - * \retval VMK_OK If the mac address is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkGetMACAddr)(void *clientData, - vmk_EthAddress macAddr); - -/* - *********************************************************************** - * vmk_UplinkGetName -- */ /** + * vmk_UplinkGetNameCB -- */ /** * * \brief Handler used by vmkernel to get the name of the device * associated to an uplink * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] devName Buffer used to store uplink device name. - * \param[in] devNameLen Length of devName buffer. + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] devName Buffer used to store uplink device name. + * \param[in] devNameLen Length of devName buffer. * * \retval VMK_OK If the name is properly stored. * \retval VMK_LIMIT_EXCEEDED If the name is too long for provided @@ -544,170 +248,41 @@ typedef VMK_ReturnStatus (*vmk_UplinkGetMACAddr)(void *clientData, *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkGetName)(void *clientData, - char *devName, - vmk_ByteCount devNameLen); -/* - *********************************************************************** - * vmk_UplinkGetStats -- */ /** - * - * \brief Handler used by vmkernel to get statistics on a device associated - * to an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] stats Structure used to store all the requested - * information. - * - * \retval VMK_OK If the statistics are properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ +typedef VMK_ReturnStatus (*vmk_UplinkGetNameCB)(vmk_AddrCookie driverData, + char *devName, + vmk_ByteCount devNameLen); -typedef VMK_ReturnStatus (*vmk_UplinkGetStats)(void *clientData, - vmk_PortClientStats *stats); - -/* - *********************************************************************** - * vmk_UplinkGetDriverInfo -- */ /** - * - * \brief Handler used by vmkernel to get driver information of the - * device associated with an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] driverInfo Structure used to store all the requested - * information. - * - * \retval VMK_OK If the driver information is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkGetDriverInfo)(void *clientData, - vmk_UplinkDriverInfo *driverInfo); /* *********************************************************************** - * vmk_UplinkGetWolState -- */ /** - * - * \brief Handler used by vmkernel to get wake-on-lan state of - * device associated with an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] wolState Structure used to store all the requested - * information. - * - * \retval VMK_OK If the driver information is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkGetWolState)(void *clientData, - vmk_UplinkWolState *wolState); - -/* - *********************************************************************** - * vmk_UplinkSetWolState -- */ /** - * - * \brief Handler used by vmkernel to get wake-on-lan state of - * device associated with an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] wolState Structure used to store all the requested - * information. - * - * \retval VMK_OK If the driver information is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkSetWolState)(void *clientData, - vmk_UplinkWolState *wolState); - -/* - *********************************************************************** - * vmk_UplinkGetCoalesceParams -- */ /** - * - * \brief Handler used by vmkernel to get coalescing parameters of - * device associated with an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] coalesceParams Structure used to store all the requested - * information. - * - * \retval VMK_OK If the driver information is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkGetCoalesceParams)(void *clientData, - vmk_UplinkCoalesceParams *coalesceParams); - -/* - *********************************************************************** - * vmk_UplinkSetCoalesceParams -- */ /** - * - * \brief Handler used by vmkernel to set coalescing parameters of - * device associated with an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] coalesceParams Structure used to store all the requested - * information. - * - * \retval VMK_OK If the driver information is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkSetCoalesceParams)(void *clientData, - vmk_UplinkCoalesceParams *coalesceParams); - -/* - *********************************************************************** - * vmk_UplinkSetPktTrace -- */ /** + * vmk_UplinkSetPktTraceCB -- */ /** * * \brief Handler used by vmkernel to enable/disable pktTrace for * device associated with an uplink. * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] enable Flag to enable/disable tracing. - * \param[in] traceSrcID Identifier for the uplink device - * generating trace events. Stored locally - * and used in RecordEvent/Interrupt vmkapi - * calls. + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] enable Flag to enable/disable tracing. + * \param[in] traceSrcID Identifier for the uplink device generating + * trace events. Stored locally and used in + * RecordEvent/Interrupt vmkapi calls. * * \retval VMK_OK If the driver information is properly stored * \retval VMK_FAILURE Otherwise * *********************************************************************** */ - -typedef VMK_ReturnStatus (*vmk_UplinkSetPktTrace)(void *clientData, - vmk_Bool enable, - vmk_uint64 traceSrcID); + +typedef VMK_ReturnStatus (*vmk_UplinkSetPktTraceCB)(vmk_AddrCookie driverData, + vmk_Bool enable, + vmk_uint64 traceSrcID); /** * \brief Default value for timeout handling before panic. - */ + */ #define VMK_UPLINK_WATCHDOG_HIT_CNT_DEFAULT 5 @@ -717,23 +292,25 @@ typedef VMK_ReturnStatus (*vmk_UplinkSetPktTrace)(void *clientData, * * \brief Used only if the module provides a timeout mechanism to * recover from a wedged device. - * Handler used by vmkernel to get the timeout hit counter needed + * Handler used by vmkernel to get the timeout hit counter needed * before hitting a panic. * If no panic mode is implemented you could ignore this handler. * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] counter Used to store the timeout hit counter + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] counter Used to store the timeout hit counter * - * \retval VMK_OK If the information is properly stored - * \retval VMK_FAILURE Otherwise + * \retval VMK_OK If the information is properly stored + * \retval VMK_FAILURE Otherwise * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogHitCnt)(void *clientData, - vmk_int16 *counter); +typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogHitCnt)(vmk_AddrCookie driverData, + vmk_int16 *counter); /* *********************************************************************** @@ -741,14 +318,16 @@ typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogHitCnt)(void *clientData, * * \brief Used only if the module provides a timeout mechanism to * recover from a wedged device. - * Handler used by vmkernel to set the timeout hit counter + * Handler used by vmkernel to set the timeout hit counter * needed before hitting a panic. * If no panic mode is implemented you could ignore this handler. * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] counter The timeout hit counter + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] counter The timeout hit counter * * \retval VMK_OK If the new setting is effective * \retval VMK_FAILURE Otherwise @@ -756,8 +335,8 @@ typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogHitCnt)(void *clientData, *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkSetWatchdogHitCnt)(void *clientData, - vmk_int16 counter); +typedef VMK_ReturnStatus (*vmk_UplinkSetWatchdogHitCnt)(vmk_AddrCookie driverData, + vmk_int16 counter); /* *********************************************************************** @@ -769,26 +348,28 @@ typedef VMK_ReturnStatus (*vmk_UplinkSetWatchdogHitCnt)(void *clientData, * process (usually a reset) has been run on the device associated * to an uplink. Roughly the number of times the device got wedged. * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] counter The number of times the device got wedged + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] counter The number of times the device got wedged * - * \retval VMK_OK If the information is properly stored - * \retval VMK_FAILURE Otherwise + * \retval VMK_OK If the information is properly stored + * \retval VMK_FAILURE Otherwise * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogStats)(void *clientData, - vmk_int16 *counter); +typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogStats)(vmk_AddrCookie driverData, + vmk_int16 *counter); /** * \brief Define the different status of uplink watchdog panic mod */ typedef enum { - + /** \brief The device's watchdog panic mod is disabled */ VMK_UPLINK_WATCHDOG_PANIC_MOD_DISABLE, @@ -805,19 +386,21 @@ typedef enum { * Handler used by vmkernel to know if the timeout panic mod * is enabled or not. * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] status Status of the watchdog panic mod + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] status Status of the watchdog panic mod * - * \retval VMK_OK If the information is properly stored - * \retval VMK_FAILURE Otherwise + * \retval VMK_OK If the information is properly stored + * \retval VMK_FAILURE Otherwise * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogPanicModState)(void *clientData, - vmk_UplinkWatchdogPanicModState *state); +typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogPanicModState)(vmk_AddrCookie driverData, + vmk_UplinkWatchdogPanicModState *state); /* *********************************************************************** @@ -825,14 +408,16 @@ typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogPanicModState)(void *clientData, * * \brief Used only if the module provides a timeout mechanism to * recover from a wedged device. - * Handler used by vmkernel to enable or disable the timeout + * Handler used by vmkernel to enable or disable the timeout * panic mod. Set panic mod could be useful for debugging as it * is possible to get a coredump at this point. * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] enable Tne status of the watchdog panic mod + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] enable Tne status of the watchdog panic mod * * \retval VMK_OK If the new panic mod is effective * \retval VMK_FAILURE Otherwise @@ -840,96 +425,9 @@ typedef VMK_ReturnStatus (*vmk_UplinkGetWatchdogPanicModState)(void *clientData, *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkSetWatchdogPanicModState)(void *clientData, - vmk_UplinkWatchdogPanicModState state); +typedef VMK_ReturnStatus (*vmk_UplinkSetWatchdogPanicModState)(vmk_AddrCookie driverData, + vmk_UplinkWatchdogPanicModState state); -/* - *********************************************************************** - * vmk_UplinkSetMTU -- */ /** - * - * \brief Handler used by vmkernel to set up the mtu of the - * device associated with an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] mtu The mtu to be set up - * - * \retval VMK_OK If the mtu setting is effective - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkSetMTU) (void *clientData, - vmk_uint32 mtu); - -/* - *********************************************************************** - * vmk_UplinkGetMTU -- */ /** - * - * \brief Handler used by vmkernel to retrieve the mtu of the - * device associated with an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[out] mtu Used to stored the current mtu - * - * \retval VMK_OK If the information is properly stored - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkGetMTU) (void *clientData, - vmk_uint32 *mtu); - -/* - *********************************************************************** - * vmk_UplinkVlanSetupHw -- */ /** - * - * \brief Handler used by vmkernel to activate vlan and add vid for the - * device associated to an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] enable Initialize hw vlan functionality - * \param[in] bitmap A bitmap of permitted vlan id's. - * - * \retval VMK_OK If vlan (de)activation succeeded - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkVlanSetupHw)(void *clientData, - vmk_Bool enable, - void *bitmap); - -/* - *********************************************************************** - * vmk_UplinkVlanRemoveHw -- */ /** - * - * \brief Handler used by vmkernel to delete vlan ids and deactivate - * hw vlan for the device associated to an uplink. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] disable Deactivate hw vlan completely - * \param[in] bitmap A bitmap of permitted vlan id's. - * - * \retval VMK_OK If vlan update succeeded - * \retval VMK_FAILURE Otherwise - * - *********************************************************************** - */ - -typedef VMK_ReturnStatus (*vmk_UplinkVlanRemoveHw)(void *clientData, - vmk_Bool disable, - void *bitmap); /* *********************************************************************** @@ -937,468 +435,127 @@ typedef VMK_ReturnStatus (*vmk_UplinkVlanRemoveHw)(void *clientData, * * \brief Handler used by vmkernel to issue netqueue control operations * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. This structure - * is the one passed during uplink connection - * \param[in] op Netqueue operation - * \param[in] opArgs Arguments to Netqueue operation + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] op Netqueue operation + * \param[in] opArgs Arguments to Netqueue operation * - * \retval VMK_OK Operation succeeded - * \retval VMK_FAILURE Otherwise + * \retval VMK_OK Operation succeeded + * \retval VMK_FAILURE Otherwise * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkNetqueueOpFunc)(void *clientData, - vmk_NetqueueOp op, - void *opArgs); +typedef VMK_ReturnStatus (*vmk_UplinkNetqueueOpFunc)(vmk_AddrCookie driverData, + vmk_NetqueueOp op, + vmk_AddrCookie opArgs); + +/* + *********************************************************************** + * vmk_UplinkNetqueueXmit -- */ /** + * + * \brief Transmit a list of packets via a Tx queue + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] queueID ID of tx queue packet + * \param[in] pktList Handle of packet list to transmit + * + * \retval VMK_OK Operation succeeded + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_UplinkNetqueueXmit)(vmk_AddrCookie driverData, + vmk_NetqueueQueueID queueID, + vmk_PktList pktList); + + +/* + *********************************************************************** + * vmk_UplinkGetStatesCB -- */ /** + * + * \brief Get the state of a device associated to an uplink. + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] state State of the device + * + * \retval VMK_OK If the information is properly stored + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkGetStatesCB)(vmk_AddrCookie driverData, + vmk_PortClientStates *states); + -typedef VMK_ReturnStatus (*vmk_UplinkNetqueueXmit)(void *, - vmk_NetqueueQueueID, - vmk_PktList); /* *********************************************************************** * vmk_UplinkPTOpFunc -- */ /** * - * \brief The routine to dispatch PT management operations to + * \brief The routine to dispatch PT management operations to * driver exported callbacks * - * \param[in] clientData Used to identify a VF - * \param[in] op The operation - * \param[in] args The optional arguments for the operation + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[in] op The operation + * \param[in] args The optional arguments for the operation * - * \retval VMK_OK If the operation succeeds - * \retval VMK_FAILURE Otherwise + * \retval VMK_OK If the operation succeeds + * \retval VMK_FAILURE Otherwise * *********************************************************************** */ -typedef VMK_ReturnStatus (*vmk_UplinkPTOpFunc)(void *clientData, - vmk_NetPTOP op, - void *args); +typedef VMK_ReturnStatus (*vmk_UplinkPTOpFunc)(vmk_AddrCookie driverData, + vmk_NetPTOP op, + vmk_AddrCookie args); -/* - *********************************************************************** - * vmk_UplinkIsDCBEnabled -- */ /** - * - * \brief The routine to check whether DCB support is enabled on - * the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[out] enabled Used to store the DCB state of the device. - * \param[out] version Used to store the DCB version supported by - * the device. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE If the operation fails or if the device - * is not DCB capable. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkIsDCBEnabled) (void *clientData, - vmk_Bool *enabled, - vmk_DCBVersion *version); - -/* - *********************************************************************** - * vmk_UplinkEnableDCB -- */ /** - * - * \brief The routine to enable DCB support on the device. - * - * \note It should only be called from the DCB daemon that does - * DCB negotiation on behalf of this device. - * - * \note vmk_UplinkDCBApplySettings() needs to be called after - * this call to guaranttee the changes will be flushed - * onto the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkEnableDCB) (void *clientData); - -/* - *********************************************************************** - * vmk_UplinkDisableDCB -- */ /** - * - * \brief The routine to disable DCB support on the device. - * - * \note It should only be called from the DCB daemon that does - * DCB negotiation on behalf of this device. - * - * \note vmk_UplinkDCBApplySettings() needs to be called after - * this call to guaranttee the changes will be flushed - * onto the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDisableDCB) (void *clientData); - -/* - *********************************************************************** - * vmk_UplinkDCBGetNumTCs -- */ /** - * - * \brief The routine to retrieve Traffic Classes information - * from the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[out] numTCs Used to store the Traffic Class information. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBGetNumTCs) (void *clientData, - vmk_DCBNumTCs *numTCs); - -/* - *********************************************************************** - * vmk_UplinkDCBGetPriorityGroup -- */ /** - * - * \brief The routine to retrieve DCB Priority Group settings from - * the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[out] pg Used to stored the current PG setting. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBGetPriorityGroup) (void *clientData, - vmk_DCBPriorityGroup *pg); - -/* - *********************************************************************** - * vmk_UplinkDCBSetPriorityGroup -- */ /** - * - * \brief The routine to pushdown DCB Priority Group settings to - * the device. - * - * \note It should only be called from the DCB daemon that does - * DCB negotiation on behalf of this device. - * - * \note vmk_UplinkDCBApplySettings() needs to be called after - * this call to guaranttee the changes will be flushed - * onto the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[in] pg The Priority Group to be set up. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBSetPriorityGroup) (void *clientData, - vmk_DCBPriorityGroup *pg); - -/* - *********************************************************************** - * vmk_UplinkDCBGetPFCCfg -- */ /** - * - * \brief The routine to retrieve Priority-based Flow Control - * configurations from the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[out] pfcCfg Used to stored the current PFC configuration. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBGetPFCCfg) (void *clientData, - vmk_DCBPriorityFlowControlCfg *pfcCfg); - -/* - *********************************************************************** - * vmk_UplinkDCBSetPFCCfg -- */ /** - * - * \brief The routine to pushdown Priority-based Flow Control - * configurations to the device. - * - * \note It should only be called from the DCB daemon that does - * DCB negotiation on behalf of this device. - * - * \note vmk_UplinkDCBApplySettings() needs to be called after - * this call to guaranttee the changes will be flushed - * onto the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[in] pfcCfg The PFC configuration to be set. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBSetPFCCfg) (void *clientData, - vmk_DCBPriorityFlowControlCfg *pfcCfg); - -/* - *********************************************************************** - * vmk_UplinkDCBIsPFCEnabled -- */ /** - * - * \brief The routine to check whether Priority-based Flow Control - * support is enabled on the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[out] enabled Used to stored the current PFC support state. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBIsPFCEnabled) (void *clientData, - vmk_Bool *enabled); - -/* - *********************************************************************** - * vmk_UplinkDCBEnablePFC -- */ /** - * - * \brief The routine to enable Priority-based Flow Control support - * on the device. - * - * \note It should only be called from the DCB daemon that does - * DCB negotiation on behalf of this device. - * - * \note PFC configurations must be setup correctly before enabling - * PFC support on the device. - * - * \note vmk_UplinkDCBApplySettings() needs to be called after - * this call to guaranttee the changes will be flushed - * onto the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBEnablePFC) (void *clientData); - -/* - *********************************************************************** - * vmk_UplinkDCBDisablePFC -- */ /** - * - * \brief The routine to disable Priority-based Flow Control - * support on the device. - * - * \note It should only be called from the DCB daemon that does - * DCB negotiation on behalf of this device. - * - * \note vmk_UplinkDCBApplySettings() needs to be called after - * this call to guaranttee the changes will be flushed - * onto the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBDisablePFC) (void *clientData); - -/* - *********************************************************************** - * vmk_UplinkDCBGetApplications -- */ /** - * - * \brief The routine to retrieve all DCB Application Protocols - * settings from the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[out] apps Used to store the DCB Applications - * settings of the device. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBGetApplications) (void *clientData, - vmk_DCBApplications *apps); - -/* - *********************************************************************** - * vmk_UplinkDCBSetApplication -- */ /** - * - * \brief The routine to pushdown DCB Application Protocol - * settings to the device. - * - * \note It should only be called from the DCB daemon that does - * DCB negotiation on behalf of this device. - * - * \note vmk_UplinkDCBApplySettings() needs to be called after - * this call to guaranttee the changes will be flushed - * onto the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[in] app DCB Application Protocol setting of the - * device. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBSetApplication) (void *clientData, - vmk_DCBApplication *app); - -/* - *********************************************************************** - * vmk_UplinkDCBGetCapabilities -- */ /** - * - * \brief The routine to retrieve DCB capabilities information - * from the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[out] caps Used to store the DCB capabilities - * information of the device. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBGetCapabilities) (void *clientData, - vmk_DCBCapabilities *caps); - -/* - *********************************************************************** - * vmk_UplinkDCBApplySettings -- */ /** - * - * \brief The routine to flush out all pending DCB configuration - * changes on the device. - * - * \note It should only be called from the DCB daemon that does - * DCB negotiation on behalf of this device. DCB daemon - * calls this routine after all DCB parameters are negotiated - * and pushed down to the driver. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBApplySettings) (void *clientData); - -/* - *********************************************************************** - * vmk_UplinkDCBGetSettings -- */ /** - * - * \brief The routine to retrieve all DCB settings from the device. - * - * \param[in] clientData Internal module structure for the device - * associated to the uplink. - * \param[out] dcb Used to store the DCB configurations of - * the device. - * - * \retval VMK_OK If operation succeeds. - * \retval VMK_FAILURE Otherwise. - * - *********************************************************************** - */ -typedef VMK_ReturnStatus (*vmk_UplinkDCBGetSettings) (void *clientData, - vmk_DCBConfig *dcb); /** - * \brief Structure used to have access to the properties of the - * device associated to an uplink. - */ - -typedef struct { - - /** Handler used to retrieve the state of the device */ - vmk_UplinkGetStates getStates; - - /** Handler used to retrieve memory resources of the device */ - vmk_UplinkGetMemResources getMemResources; - - /** Handler used to retrieve device properties of the device */ - vmk_UplinkGetDeviceProperties getDeviceProperties; - - /** Handler used to retrieve panic-time polling properties of the device */ - vmk_UplinkGetPanicInfo getPanicInfo; - - /** Handler used to retrieve the MAC address of the device */ - vmk_UplinkGetMACAddr getMACAddr; - - /** Handler used to retrieve the name of the device */ - vmk_UplinkGetName getName; - - /** Handler used to retrieve the statistics of the device */ - vmk_UplinkGetStats getStats; - - /** Handler used to retrieve the driver information of the device */ - vmk_UplinkGetDriverInfo getDriverInfo; - - /** Handler used to retrieve the wake-on-lan state of the device */ - vmk_UplinkGetWolState getWolState; - - /** Handler used to set the wake-on-lan state of the device */ - vmk_UplinkGetWolState setWolState; - - /** Handler used to get colesing state of the device */ - vmk_UplinkGetCoalesceParams getCoalesceParams; - - /** Handler used to set colesing state of the device */ - vmk_UplinkSetCoalesceParams setCoalesceParams; - - /** Handler used to set packet tracing state of the device */ - vmk_UplinkSetPktTrace setPktTrace; -} vmk_UplinkPropFunctions; - -/** * \brief Structure used to have access to the timeout properties of the - * device associated to an uplink. - * If the module does not provide a timeout mechanism, this information - * can be ignored. + * device associated to an uplink. If the module does not provide + * a timeout mechanism, this information can be ignored. */ typedef struct { - /** Handler used to retrieve the number of times the device handles timeout before hitting a panic */ + /** + * Handler used to retrieve the number of times the device handles + * timeout before hitting a panic + */ vmk_UplinkGetWatchdogHitCnt getHitCnt; - /** Handler used to set the number of times the device handles timeout before hitting a panic */ + /** + * Handler used to set the number of times the device handles timeout + * before hitting a panic + */ vmk_UplinkSetWatchdogHitCnt setHitCnt; - /** Handler used to retrieve the global number of times the device hit a timeout */ + /** + * Handler used to retrieve the global number of times the device + * hit a timeout + */ vmk_UplinkGetWatchdogStats getStats; - /** Handler used to retrieve the timeout panic mod's status for the device */ + /** + * Handler used to retrieve the timeout panic mod's status for the + * device + */ vmk_UplinkGetWatchdogPanicModState getPanicMod; /** Handler used to set the timeout panic mod's status for the device */ @@ -1411,6 +568,12 @@ typedef struct { /** Netqueue packet transmit function (obsolete) */ vmk_UplinkNetqueueXmit netqXmit; + + /** UplinkQueue operations */ + vmk_UplinkQueueOps ops; + + /** UplinkQueue dynamic RSS operations */ + vmk_UplinkQueueRSSDynOps rssDynOps; } vmk_UplinkNetqueueFunctions; typedef struct { @@ -1418,126 +581,102 @@ typedef struct { vmk_UplinkPTOpFunc ptOpFunc; } vmk_UplinkPTFunctions; -typedef struct { - /** Handler used to setup vlan hardware context and add vid */ - vmk_UplinkVlanSetupHw setupVlan; +/** + * \brief Structure used to have access to the properties of the + * device associated to an uplink. + */ +typedef struct vmk_UplinkPropOps { - /** Handler used to delete vlan id and deactivate hw for the device */ - vmk_UplinkVlanRemoveHw removeVlan; -} vmk_UplinkVlanFunctions; + /** Handler used to set device link status */ + vmk_UplinkLinkStatusSetCB uplinkLinkStatusSet; -typedef struct { + /** Handler used to set device MAC address */ + vmk_UplinkMACAddrSetCB uplinkMACAddrSet; - /** Handler used to retrieve the MTU of the device */ - vmk_UplinkGetMTU getMTU; + /** Handler used to restart auto-negotiation on device */ + vmk_UplinkRestartNegotiationCB uplinkNegotiationRestart; +} vmk_UplinkPropOps; - /** Handler used to set the MTU of the device */ - vmk_UplinkSetMTU setMTU; -} vmk_UplinkMtuFunctions; +/** + * Vmklinux specific stats + */ +typedef struct vmk_UplinkVmklinuxStats { + /** The number of rx packets received by the interface hosting the driver */ + vmk_uint64 intRxPkt; -typedef struct { + /** The number of tx packets sent by the interface hosting the driver */ + vmk_uint64 intTxPkt; - /** Handler used to Tx a packet immediately through the device */ - vmk_UplinkStartTx startTxImmediate; + /** The number of rx packets dropped by the interface hosting the driver */ + vmk_uint64 intRxDrp; - /** Handler used in Panic to Tx a packet immediately through the device */ - vmk_UplinkStartPanicTx startPanicTxImmediate; + /** The number of tx packets dropped by the interface hosting the driver */ + vmk_uint64 intTxDrp; +} vmk_UplinkVmklinuxStats; + +/* + *********************************************************************** + * vmk_UplinkVmklinuxStatsGetCB -- */ /** + * + * \brief Used by vmkernel to get vmklinux specific statistics counters + * + * \param[in] driverData Points to the internal module structure for + * the device associated to the uplink. Before + * calling vmk_DeviceRegister, device driver + * needs to assign this pointer to member + * driverData in structure vmk_UplinkRegData. + * \param[out] stats Vmklinux specific stats + * + * \retval VMK_OK If the information is properly stored + * \retval VMK_FAILURE Otherwise + * + *********************************************************************** + */ + +typedef VMK_ReturnStatus (*vmk_UplinkVmklinuxStatsGetCB)(vmk_AddrCookie driverData, + vmk_UplinkVmklinuxStats *stats); + +/** + * Uplink is driven by vmklinux + */ +#define VMK_UPLINK_CAP_LEGACY ((vmk_uint32)(~0)) + +/** + * Legacy operations for vmklinux drivers + */ +typedef struct vmk_UplinkLegacyOps { /** Handler used to set up the resources of the device */ - vmk_UplinkOpenDev open; + vmk_UplinkOpenDevCB open; /** Handler used to release the resources of the device */ - vmk_UplinkCloseDev close; + vmk_UplinkCloseDevCB close; - /** Handler used to poll device for a Rx packet */ - vmk_UplinkPanicPoll panicPoll; + /** uplink ioctl callback */ + vmk_UplinkIoctlCB ioctl; - /** Handler used to flush the Rx/Tx buffers of the device */ - vmk_UplinkFlushBuffers flushRxBuffers; + /** Handler used to retrieve the name of the device */ + vmk_UplinkGetNameCB getName; - /** Handler used to issue an ioctl command to the device */ - vmk_UplinkIoctlCB ioctl; + /** Handler used to retrieve the state of the device */ + vmk_UplinkGetStatesCB getStates; - /** Handler used to set the device as blocked */ - vmk_UplinkBlockDev block; + /** Handler used to retrieve device properties of the device */ + vmk_UplinkGetDevicePropertiesCB getDeviceProperties; - /** Handler used to set the device as unblocked */ - vmk_UplinkUnblockDev unblock; + /** Handler used to get vmklinux uplink stats */ + vmk_UplinkVmklinuxStatsGetCB vmklinuxStatsGet; - /** Handler used to change link speed and duplex */ - vmk_UplinkSetLinkStatus setLinkStatus; + /** Set of functions giving access to the PT services of the device */ + vmk_UplinkPTFunctions ptFns; - /** Handler used to reset a device */ - vmk_UplinkResetDev reset; -} vmk_UplinkCoreFunctions; + /** Set of functions giving access to the watchdog management of the device */ + vmk_UplinkWatchdogFunctions watchdogFns; -typedef struct { - - /** Handler used to check whether DCB is enabled on the deivce */ - vmk_UplinkIsDCBEnabled isDCBEnabled; - - /** Handler used to enable DCB support on the device */ - vmk_UplinkEnableDCB enableDCB; - - /** Handler used to disable DCB support on the device */ - vmk_UplinkDisableDCB disableDCB; - - /** Handler used to retrieve Traffic Classes information from the device */ - vmk_UplinkDCBGetNumTCs getNumTCs; - - /** Handler used to retrieve Priority Group information from the device */ - vmk_UplinkDCBGetPriorityGroup getPG; - - /** Handler used to push down Priority Group settings to the device */ - vmk_UplinkDCBSetPriorityGroup setPG; - - /** - * Handler used to retrieve Priority-based Flow Control configurations - * from the device - */ - vmk_UplinkDCBGetPFCCfg getPFCCfg; - - /** - * Handler used to pushdown Priority-based Flow Control configurations - * to the device - */ - vmk_UplinkDCBSetPFCCfg setPFCCfg; - - /** - * Handler used to check whether Priority-based Flow Control support is - * enabled on the device - */ - vmk_UplinkDCBIsPFCEnabled isPFCEnabled; - - /** Handler used to enable Priority-based Flow Control on the device */ - vmk_UplinkDCBEnablePFC enablePFC; - - /** Handler used to disable Priority-based Flow Control on the device */ - vmk_UplinkDCBDisablePFC disablePFC; - - /** - * Handler used to retrieve all DCB Application Protocols settings - * from the device - */ - vmk_UplinkDCBGetApplications getApps; - - /** - * Handler used to pushdown DCB Application Protocol settings to the device - */ - vmk_UplinkDCBSetApplication setApp; - - /** Handler used to retrieve DCB capabilities information from the device */ - vmk_UplinkDCBGetCapabilities getCaps; - - /** - * Handler used to flush all pending DCB configuration changes to the device - */ - vmk_UplinkDCBApplySettings applySettings; - - /** Handler used to retrieve all DCB settings from the device */ - vmk_UplinkDCBGetSettings getSettings; -} vmk_UplinkDCBFunctions; + /** Handler used to set packet tracing state of the device */ + vmk_UplinkSetPktTraceCB setPktTrace; +} vmk_UplinkLegacyOps; /** * \brief Structure passed to vmkernel in order to interact with the device @@ -1547,16 +686,16 @@ typedef struct { typedef struct vmk_UplinkFunctions { /** Set of functions giving access to the core services of the device */ - vmk_UplinkCoreFunctions coreFns; + vmk_UplinkOps coreFns; + + /** Set of functions supporting vmklinux drivers */ + vmk_UplinkLegacyOps legacyFns; /** Set of functions giving access to the vlan services of the device */ - vmk_UplinkVlanFunctions vlanFns; - - /** Set of functions giving access to the MTU services of the device*/ - vmk_UplinkMtuFunctions mtuFns; + vmk_UplinkVLANFilterOps vlanFns; /** Set of functions giving access to the properties/statistics of the device */ - vmk_UplinkPropFunctions propFns; + vmk_UplinkPropOps propFns; /** Set of functions giving access to the watchdog management of the device */ vmk_UplinkWatchdogFunctions watchdogFns; @@ -1568,89 +707,36 @@ typedef struct vmk_UplinkFunctions { vmk_UplinkPTFunctions ptFns; /** Set of functions giving access to the DCB services of the device */ - vmk_UplinkDCBFunctions dcbFns; + vmk_UplinkDCBOps dcbFns; + /** Set of functions giving access to NetDump services of the device */ + vmk_UplinkNetDumpOps netdumpFns; + + /** Set of functions giving access to WOL services of the device */ + vmk_UplinkWOLOps wolFns; + + /** Set of functions giving access to coalesce parameters */ + vmk_UplinkCoalesceParamsOps colFns; + + /** Set of functions giving access to EEPROM */ + vmk_UplinkEEPROMOps eepromFns; + + /** Set of functions giving access to uplink registers */ + vmk_UplinkRegDumpOps regDumpFns; + + /** Set of functions giving access to uplink self test */ + vmk_UplinkSelfTestOps selfTestFns; + + /** Set of functions giving access to pause parameters */ + vmk_UplinkPauseParamsOps pauseParamsFns; + + /** Set of functions giving access to private stats */ + vmk_UplinkPrivStatsOps privStatsFns; + + /** Set of functions giving access to enacapsulation offload settings */ + vmk_UplinkEncapOffloadOps encapOffloadFns; } vmk_UplinkFunctions; -/** - * \brief Uplink flags for misc. info. - */ -typedef enum { - /** \brief hidden from management apps */ - VMK_UPLINK_FLAG_HIDDEN = 0x01, - - /** This will be set if physical device is being registered as pseudo-dev */ - VMK_UPLINK_FLAG_PSEUDO_REG = 0x02, - -} vmk_UplinkFlags; - - -/** - * \brief Structure advertising a mode (speed/duplex) that is supported by - * an uplink. - */ - -typedef struct vmk_UplinkSupportedMode { - - /** Supported speed */ - vmk_LinkSpeed speed; - - /** Supported duplex */ - vmk_LinkDuplex duplex; - -} vmk_UplinkSupportedMode; - - -/** - * \brief Structure containing all the required information to bind a - * device to an uplink. - */ - -typedef struct vmk_UplinkConnectInfo { - - /** Name of the freshly connected device */ - char *devName; - - /** Internal module structure for this network device */ - void *clientData; - - /** Module identifier of the caller module */ - vmk_ModuleID moduleID; - - /** Functions used by vmkernel to interact with module network services */ - vmk_UplinkFunctions *functions; - - /** Capabilities populated to vmkernel level for this particular uplink */ - vmk_UplinkCapabilities cap; - - /** Data misc. flags for the uplink */ - vmk_UplinkFlags flags; - - /** Modes supported by the uplink */ - vmk_UplinkSupportedMode *supportedModes; - - /** Number of supported modes stored in the array */ - vmk_uint32 supportedModesArraySz; - -} vmk_UplinkConnectInfo; - -/* - *********************************************************************** - * vmk_UplinkUpdateLinkState -- */ /** - * - * \brief Update link status information related to a specified uplink - * with a bundle containing the information. - * - * \param[in] uplink Uplink aimed - * \param[in] linkInfo Structure containing link information - * - * \retval VMK_OK Always - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_UplinkUpdateLinkState(vmk_Uplink uplink, - vmk_LinkStatus *linkInfo); /* *********************************************************************** @@ -1658,9 +744,10 @@ VMK_ReturnStatus vmk_UplinkUpdateLinkState(vmk_Uplink uplink, * * \brief Notify vmkernel that a watchdog timeout has occurred. * - * \note If an uplink driver has a watchdog for the transmit queue of the device, - * the driver should notify vmkernel when a timeout occurs. Vmkernel may use this - * information to determine the reliability of a particular uplink. + * \note If an uplink driver has a watchdog for the transmit queue of the + * device, the driver should notify vmkernel when a timeout occurs. + * Vmkernel may use this information to determine the reliability + * of a particular uplink. * * \param[in] uplink Uplink aimed * @@ -1671,20 +758,41 @@ VMK_ReturnStatus vmk_UplinkUpdateLinkState(vmk_Uplink uplink, VMK_ReturnStatus vmk_UplinkWatchdogTimeoutHit(vmk_Uplink uplink); + +/* + *********************************************************************** + * vmk_UplinkAllocWithName -- */ /** + * + * \brief Find a uplink handle by name, if not found, allocate a uplink + * handle with the given name + * + * \param[in] devName Name of uplink to find + * \param[out] uplink Handle of uplink allocated + * + * \retval VMK_OK Uplink is found or allocation finishes + * successfully + * \retval VMK_FAILURE Otherwise + *********************************************************************** + */ +VMK_ReturnStatus vmk_UplinkAllocWithName(vmk_Name *devName, + vmk_Uplink *uplink); + + /* *********************************************************************** * vmk_UplinkRegister -- */ /** * * \brief Notify vmkernel that an uplink has been connected. * - * \note This function create the bond between vmkernel uplink and + * \note This function create the bond between vmkernel uplink and * a module internal structure. * Through this connection vmkernel will be able to manage * Rx/Tx and other operations on module network services. * - * \param[out] uplink Address of the new uplink - * \param[in] connectInfo Information passed to vmkernel to bind an - * uplink to a module internal NIC representation + * \param[in] regData Information passed to vmkernel to bind an + * uplink to a module internal NIC representation + * \param[in] uplink The uplink object returned by + * vmk_UplinkAllocWithName * * \retval VMK_OK if succeed * \retval VMK_FAILURE otherwise @@ -1692,8 +800,9 @@ VMK_ReturnStatus vmk_UplinkWatchdogTimeoutHit(vmk_Uplink uplink); *********************************************************************** */ -VMK_ReturnStatus vmk_UplinkRegister(vmk_Uplink *uplink, - vmk_UplinkConnectInfo *connectInfo); +VMK_ReturnStatus vmk_UplinkRegister(vmk_UplinkRegData *regData, + vmk_Uplink uplink); + /* *********************************************************************** @@ -1713,6 +822,7 @@ VMK_ReturnStatus vmk_UplinkRegister(vmk_Uplink *uplink, VMK_ReturnStatus vmk_UplinkUnregister(vmk_Uplink uplink); + /* *********************************************************************** * vmk_UplinkOpen -- */ /** @@ -1720,7 +830,7 @@ VMK_ReturnStatus vmk_UplinkUnregister(vmk_Uplink uplink); * \brief Open the device associated with the uplink * * \note This function needs to be called if the device associated with - * the uplink is not a PCI device. For PCI device, + * the uplink is not a PCI device. For PCI device, * vmk_PCIDoPostInsert() should be called instead. * * \param[in] uplink Uplink to be opened @@ -1733,6 +843,7 @@ VMK_ReturnStatus vmk_UplinkUnregister(vmk_Uplink uplink); VMK_ReturnStatus vmk_UplinkOpen(vmk_Uplink uplink); + /* *********************************************************************** * vmk_UplinkClose -- */ /** @@ -1754,6 +865,7 @@ VMK_ReturnStatus vmk_UplinkOpen(vmk_Uplink uplink); VMK_ReturnStatus vmk_UplinkClose(vmk_Uplink uplink); + /* *********************************************************************** * vmk_UplinkIsNameAvailable -- */ /** @@ -1770,6 +882,7 @@ VMK_ReturnStatus vmk_UplinkClose(vmk_Uplink uplink); vmk_Bool vmk_UplinkIsNameAvailable(char *uplinkName); + /* *********************************************************************** * vmk_UplinkCapabilitySet -- */ /** @@ -1786,9 +899,10 @@ vmk_Bool vmk_UplinkIsNameAvailable(char *uplinkName); *********************************************************************** */ -VMK_ReturnStatus vmk_UplinkCapabilitySet(vmk_UplinkCapabilities *uplinkCaps, - vmk_PortClientCaps cap, - vmk_Bool enable); +VMK_ReturnStatus vmk_UplinkCapabilitySet(vmk_UplinkCapabilities *uplinkCaps, + vmk_PortClientCaps cap, + vmk_Bool enable); + /* *********************************************************************** @@ -1806,58 +920,27 @@ VMK_ReturnStatus vmk_UplinkCapabilitySet(vmk_UplinkCapabilities *uplinkCaps, *********************************************************************** */ -VMK_ReturnStatus vmk_UplinkCapabilityGet(vmk_UplinkCapabilities *uplinkCaps, - vmk_PortClientCaps cap, - vmk_Bool *status); +VMK_ReturnStatus vmk_UplinkCapabilityGet(vmk_UplinkCapabilities *uplinkCaps, + vmk_PortClientCaps cap, + vmk_Bool *status); + /* *********************************************************************** - * vmk_UplinkQueueStop -- */ /** + * vmk_UplinkCapRegisterHighDMA -- */ /** * - * \brief Notify stack of uplink queue stop + * \brief Device driver claims it can support high DMA capability * - * \param[in] uplink Uplink aimed - * \param[in] qid Queue ID + * \param[in] uplink uplink handle * - * \retval VMK_OK + * \retval VMK_OK Capability register successfully + * \retval VMK_NOT_FOUND Otherwise * *********************************************************************** */ -VMK_ReturnStatus vmk_UplinkQueueStop(vmk_Uplink uplink, - vmk_NetqueueQueueID qid); +VMK_ReturnStatus vmk_UplinkCapRegisterHighDMA(vmk_Uplink uplink); -/* - *********************************************************************** - * vmk_UplinkQueueStart -- */ /** - * - * \brief Notify stack of uplink queue (re)start - * - * \param[in] uplink Uplink aimed - * \param[in] qid Queue ID - * - * \retval VMK_OK - * - *********************************************************************** - */ - -VMK_ReturnStatus vmk_UplinkQueueStart(vmk_Uplink uplink, - vmk_NetqueueQueueID qid); - -/* - *********************************************************************** - * vmk_PktQueueForRxProcess -- */ /** - * - * \brief Queue a specified packet coming from an uplink for Rx process. - * - * \param[in] pkt Target packet - * \param[in] uplink Uplink where the packet came from - * - *********************************************************************** - */ -extern -void vmk_PktQueueForRxProcess(vmk_PktHandle *pkt, - vmk_Uplink uplink); /* *********************************************************************** @@ -1873,6 +956,7 @@ void vmk_PktQueueForRxProcess(vmk_PktHandle *pkt, void vmk_PktListRxProcess(vmk_PktList pktList, vmk_Uplink uplink); + /* *********************************************************************** * vmk_UplinkRecordInterrupt -- */ /** @@ -1880,11 +964,11 @@ void vmk_PktListRxProcess(vmk_PktList pktList, * \brief Record timestamp for an interrupt on this uplink * * This function is part of the pktTrace infrastructure and it records - * timestamp for an interrupt. This handles the case when an interrupt - * indicates that a packet is available on physical device for + * timestamp for an interrupt. This handles the case when an interrupt + * indicates that a packet is available on physical device for * reception. * - * \note Interrupts can be fired for a variety of reasons and packets + * \note Interrupts can be fired for a variety of reasons and packets * can be pulled in polling mode. So the interrupt timestamp is * a "hint" of the maximium amount of time a packet was waiting * in the device. Actual waiting time can be much lower if the @@ -1892,13 +976,13 @@ void vmk_PktListRxProcess(vmk_PktList pktList, * * \note Even on VMK_OK, this event might be missing from user-visible * trace, e.g., if the event log buffer is not being drained - * fast enough. Log buffer processing tools MUST be designed to + * fast enough. Log buffer processing tools MUST be designed to * work around missing event traces. - * + * * \note As a side effect of calling this function the packet may now * contain a pktTrace attribute. * - * \param[in] vectorNum Interrupt vector number generating the trace. + * \param[in] cookie Cookie of interrupt generating the trace. * \param[in] traceSrcID Identifier for the uplink device that * generated this interrupt. * @@ -1908,9 +992,10 @@ void vmk_PktListRxProcess(vmk_PktList pktList, *********************************************************************** */ -VMK_ReturnStatus vmk_UplinkRecordInterrupt(vmk_uint32 vectorNum, +VMK_ReturnStatus vmk_UplinkRecordInterrupt(vmk_IntrCookie cookie, vmk_uint64 traceSrcID); + #endif /* _VMKAPI_NET_UPLINK_INCOMPAT_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/nmp/vmkapi_nmp.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/nmp/vmkapi_nmp.h index 1355f10..c627bc4 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/nmp/vmkapi_nmp.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/nmp/vmkapi_nmp.h @@ -388,6 +388,63 @@ vmk_Bool vmk_NmpIsDeviceReservedPath( vmk_NmpDevice *nmpDev, vmk_ScsiPath *scsiPath); +/* + *********************************************************************** + * vmk_NmpIsPathBlocked-- */ /** + * + * \ingroup PSP + * + * \brief Tell whether the passed path is eligible for I/O. + * + * This is used during SCSI-3 reservations only. If the device is used + * for SCSI-3 reservation, then the paths to that device must have the + * same registration key as that of the device to be eligible for I/O. + * + * \note This is a non-blocking call. + * + * \note Spin locks can be held while calling into this function + * + * \param[in] nmpDev NMP Device path is on. + * \param[in] scsiPath Path to check. + * + * \retval VMK_TRUE I/Os cannot be issued on this path. + * \retval VMK_FALSE This path is eligible for I/O. + * + *********************************************************************** + */ +vmk_Bool vmk_NmpIsPathBlocked( + vmk_NmpDevice *nmpDev, + vmk_ScsiPath *scsiPath); + +/* + *********************************************************************** + * vmk_NmpGetDevicePReservedPath-- */ /** + * + * \ingroup PSP + * + * \brief Returns path holding a SCSI-3 persistent reservation on device + * + * The caller should ensure that the device will not be unclaimed while + * calling this routine. + * + * \note This is a non-blocking call. + * + * \note Spin locks can be held while calling into this function + * + * \param[in] nmpDev NMP Device path is on. + * \param[out] scsiPath Path that has a SCSI-3 reservation. + * + * \retval VMK_OK Found a path with valid SCSI-3 persistent + * reservation. + * \retval VMK_NOT_FOUND Device does not hold SCSI-3 persistent + * reservation. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_NmpGetDevicePReservedPath( + vmk_NmpDevice *nmpDev, + vmk_ScsiPath **scsiPath); + #endif /* _VMK_NMP_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/npiv/vmkapi_npiv.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/npiv/vmkapi_npiv.h index 8034d4f..eb6610c 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/npiv/vmkapi_npiv.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/npiv/vmkapi_npiv.h @@ -1,5 +1,5 @@ /* ********************************************************** - * Copyright 2008 - 2009 VMware, Inc. All rights reserved. + * Copyright 2008 - 2012 VMware, Inc. All rights reserved. * **********************************************************/ /* @@ -11,8 +11,6 @@ * * Defines some of the vmkernel specific VPORT types used to interact with * NPIV VPORT aware drivers. - * Version 1 - ESX 3.5 - * Version 2 - ESX 4.0 */ #ifndef _VMKAPI_NPIV_H_ @@ -26,158 +24,119 @@ #include "npiv/vmkapi_npiv_wwn.h" -/* - * Definitions - */ - -/** - * \brief VPORT API version values - */ -#define VMK_VPORT_API_VERSION 0x00000002 // ESX 4.0 (Latest) -#define VMK_VPORT_API_VERSION_35 0x00000001 // ESX 3.5 - -/** - * \brief VPORT API vport specific error codes returned by the fc driver - * - * Any of the VPORT API commands can return these errors - */ -#define VMK_VPORT_OK 0 /* command completed OK */ -#define VMK_VPORT_ERROR (-1) /* general vport error */ -#define VMK_VPORT_INVAL (-2) /* invalid value passed */ -#define VMK_VPORT_NOMEM (-3) /* no memory available for command */ -#define VMK_VPORT_NORESOURCES (-4) /* no vport resources */ -#define VMK_VPORT_PARAMETER_ERR (-5) /* wrong parameter passed */ - -/** - * \brief VPORT API default invalid count value - */ -#define VMK_VPORT_CNT_INVALID 0xFFFFFFFF - -/** - * \brief VPORT API autoretry flag - */ -#define VMK_VPORT_OPT_AUTORETRY 0x01 - -/** - * \brief VPORT API Symbolic (VM) name - NULL terminated string associated with a vport - * - * This name will be used at the time of creating a Vport at fc driver. This is - * an array of 128 bytes (max 128, so the max name length is 127 bytes + 1 NULL). - */ -#define VMK_VPORT_VM_NAME_LENGTH 128 - -/** - * \brief VPORT API future VSAN API use - */ -#define VMK_VPORT_VF_ID_UNDEFINED 0xFFFFFFFF -#define VMK_VPORT_FABRIC_NAME_LENGTH 8 - -/** - * \brief VPORT API bit masks for active FC4 roles - */ -#define VMK_VPORT_ROLE_FCP_INITIATOR 0x01 -#define VMK_VPORT_ROLE_FCP_TARGET 0x02 -#define VMK_VPORT_ROLE_IP_OVER_FC 0x04 - -/* - * Data structures - */ - /** * \brief VPORT API commands * - * These are the commands that are allowed via the NPIV API entry point + * These are the commands that are allowed in the "cmd" field + * via the NPIV API entry point "vportOp". */ -typedef enum { - VMK_VPORT_CREATE = 1, /* Create a vport */ - VMK_VPORT_DELETE = 2, /* Delete a vport */ - VMK_VPORT_INFO = 3, /* Get vport info from phys hba */ - VMK_VPORT_TGT_REMOVE = 4, /* Target Remove (not used) */ - VMK_VPORT_SUSPEND = 5 /* suspend/resume vport */ +typedef enum vmk_VportOpCmd { + VMK_VPORT_CREATE = 1, /** Create a vport */ + VMK_VPORT_DELETE = 2, /** Delete a vport */ + VMK_VPORT_INFO = 3, /** Get vport info from phys hba */ + VMK_VPORT_SUSPEND = 4 /** suspend/resume vport */ } vmk_VportOpCmd; /** - * \brief VPORT API link type + * \brief VPORT API Flags passed by the VMKernel to the driver * - * Used by underlying transport to inform link type to scsi midlayer */ -typedef enum { - VMK_VPORT_TYPE_PHYSICAL = 0, /* physical FC-Port */ - VMK_VPORT_TYPE_VIRTUAL /* Virtual Vport Port */ -} vmk_VportLinkType; - - -/** - * \brief VPORT API port state - */ -typedef enum { - VMK_VPORT_STATE_OFFLINE = 0, /* vport is offline */ - VMK_VPORT_STATE_ACTIVE, /* vport is active */ - VMK_VPORT_STATE_FAILED /* vport is failed */ -} vmk_VporState; - -/** - * \brief VPORT API port specific fail reason - */ -typedef enum { - VMK_VPORT_FAIL_UNKNOWN = 0, /* vport fail unknown reason */ - VMK_VPORT_FAIL_LINKDOWN, /* physical link is down */ - VMK_VPORT_FAIL_FAB_UNSUPPORTED, /* san fabric does not support npiv */ - VMK_VPORT_FAIL_FAB_NORESOURCES, /* not enough reasources in san fabric */ - VMK_VPORT_FAIL_FAB_LOGOUT, /* san logged out the vport */ - VMK_VPORT_FAIL_ADAP_NORESOURCES -} vmk_VportFailReason; - -/** - * \brief VPORT API vport-type flag used by scsi midlayer - * - * Vport type flag passed using vmk_ScsiVportArgs.flags used scsi midlayer - * to inform vmkernel about the vport type backing a vmkernel adapter. - */ -typedef enum { - VMK_SCSI_VPORT_TYPE_LEGACY = 0x00000001, /* vport hba is legacy vport */ - VMK_SCSI_VPORT_TYPE_FULLHBA = 0x00000002, /* vport hba has full HBA status */ - VMK_SCSI_VPORT_TYPE_PASSTHRU = 0x00000004 /* vport hba is a passthru */ -} vmk_ScsiVportTypeFlags; +typedef enum vmk_ScsiVportFlags { + /** Create a "Legacy" VPORT + * Legacy VPORT will have no presence in the PSA stack, + * i.e. no paths or associated device. + * Non-Legacy VPORTs are created just like any other adapter */ + VMK_SCSI_VPORT_FLAG_LEGACY = 0x00000001, + /** VMK_VPORT_SUSPEND VPORT flag + * Suspend SAN operations on a running VPORT when set on a + * VMK_VPORT_SUSPEND command. Resume SAN operations on a suspened + * VPORT when not set on a VMK_VPORT_SUSPEND command */ + VMK_SCSI_VPORT_FLAG_SUSPEND = 0x00000002, +} vmk_ScsiVportFlags; /** * \brief VPORT API Args list is used to pass arguments to lowlevel underlying - * transport layer and eventually to HBA driver through the NPIV API + * transport layer and eventually to an HBA driver through the NPIV API + * + * This Structure is passed for all vmk_VportOpCmd command calls made from the + * vmkernel to the underlying transport layer. + * + * Field Usage per command (unused fields are 0): + * VMK_VPORT_CREATE: + * wwpn, wwnn (IN) - passes the wwn pair of the VPORT to be created + * flags (IN) - Legacy flag + * virtAdapter (OUT) - vmk_ScsiAdapter pointer for VPORT returned by the driver + * VMK_VPORT_DELETE: + * virtAdapter (IN) - virtual port to delete + * VMK_VPORT_INFO: + * info (IN/OUT) - pointer to the vmk_VportInfo struct allocated by the + * VMKernel, but filled in by the driver. + * VMK_VPORT_SUSPEND: + * virtAdapter (IN) - virtual port to suspend or resume + * flags (IN) - Suspend flag * - * This Structure is used for all types of vport calls made from vmkernel - * to underlying transport layer. */ typedef struct vmk_ScsiVportArgs { /** \brief Node World Wide Name */ vmk_VportWwn wwpn; /** \brief Port World Wide Name */ vmk_VportWwn wwnn; - /** \brief Vport's ScsiHost pointer */ - void *virthost; - /** \brief Reserved for arguments structure */ - void *arg; - /** \brief Symbolic name, generally VM's name is used */ - char *name; - /** \brief Vport's Scsi Adapter */ + /** \brief vmk_ScsiAdapter Adapter pointer */ void *virtAdapter; - /** \brief Vport type flag, internal use only */ - vmk_uint32 flags; + /** \brief vmk_VportInfo struct passed on VMK_VPORT_INFO calls, NULL otherwise */ + void *info; + /** \brief Vport flags */ + vmk_ScsiVportFlags flags; } vmk_ScsiVportArgs; /** - * \brief VPORT API This Structure is used to get the NPIV specific information - * from physical host bus adapter. + * \brief VPORT API link type * - * Info structure returned by the VMK_VPORT_INFO command made to the physical - * HBA adapter + * Used by underlying transport to inform the VMKernel of the link type + */ +typedef enum vmk_VportLinkType { + VMK_VPORT_TYPE_PHYSICAL = 0, /** physical FC-Port */ + VMK_VPORT_TYPE_VIRTUAL /** Virtual Vport Port */ +} vmk_VportLinkType; + +/** + * \brief VPORT API port state + */ +typedef enum vmk_VportState { + VMK_VPORT_STATE_OFFLINE = 0, /** vport is offline */ + VMK_VPORT_STATE_ACTIVE, /** vport is active */ + VMK_VPORT_STATE_FAILED /** vport is failed */ +} vmk_VportState; + +/** + * \brief VPORT API port specific fail reason + */ +typedef enum vmk_VportFailReason { + VMK_VPORT_FAIL_UNKNOWN = 0, /** vport fail unknown reason */ + VMK_VPORT_FAIL_LINKDOWN, /** physical link is down */ + VMK_VPORT_FAIL_FAB_UNSUPPORTED, /** san fabric does not support npiv */ + VMK_VPORT_FAIL_FAB_NORESOURCES, /** not enough reasources in san fabric */ + VMK_VPORT_FAIL_FAB_LOGOUT, /** san logged out the vport */ + VMK_VPORT_FAIL_ADAP_NORESOURCES +} vmk_VportFailReason; + +/** + * \brief VPORT API default invalid count value for vports_max and vports_inuse. + */ +#define VMK_VPORT_CNT_INVALID 0xFFFFFFFF + +/** + * \brief VPORT API This Structure is used to get the NPIV specific information + * from a physical host bus adapter. + * + * Info structure allocated by the VMKernel and filled in by the VMK_VPORT_INFO + * command made to the physical HBA adapter driver. */ typedef struct vmk_VportInfo { - /** \brief Vport API version */ - vmk_uint32 api_version; /** \brief Vport link type */ vmk_VportLinkType linktype; /** \brief State of vport support */ - vmk_VporState state; + vmk_VportState state; /** \brief reason for VportInfo failure */ vmk_VportFailReason fail_reason; /** \brief previous reason for VportInfo failure */ @@ -187,67 +146,11 @@ typedef struct vmk_VportInfo { /** \brief Port World Wide Name */ vmk_VportWwn port_name; - /* Following values are valid only on physical ports */ + /** Following values are valid only on physical ports */ /** \brief maximum number of vports supported by fc hba */ vmk_uint32 vports_max; /** \brief number of vports that are in use on fc hba */ vmk_uint32 vports_inuse; - /** \brief maximum number of RPIs available in the fc FW */ - vmk_uint32 rpi_max; - /** \brief number of RPIs currently in-use in the fc FW */ - vmk_uint32 rpi_inuse; - - /* QoS Values */ - /** \brief QoS (Quality of Service) Priority */ - vmk_uint8 QoSPriority; - /** \brief QoS (Quality of Service) Bandwidth percentage */ - vmk_uint8 QosBandwith; - - /** \brief Virtual SAN (VSAN) number */ - vmk_int16 vsan_number; - /** \brief Virtual Fabric (VF) id number, undefined value is -1 */ - vmk_int32 vf_id; - /** \brief Vport role id initiator/target etc */ - vmk_int32 role_id; } vmk_VportInfo; -/** - * \brief VPORT API This structure is to communicate with the host bus adapter - * driver at the time of vport create operation. - * - * On success, a new ScsiHost will be assigned to vport_shost for the newly - * created virtual port. - */ -struct vmk_VportData { - /** \brief Vport API version */ - vmk_uint32 api_version; - /** \brief optional values */ - vmk_uint32 options; - /** \brief Node World Wide Name */ - vmk_VportWwn node_name; - /** \brief Port World Wide Name */ - vmk_VportWwn port_name; - /** \brief Vport's ScsiHost pointer */ - void *vport_shost; - - /** \brief fabric name, zero's if direct connect/private loop */ - vmk_uint8 fabric_name[VMK_VPORT_FABRIC_NAME_LENGTH]; - - /* QoS Values */ - /** \brief QoS (Quality of Service) Priority */ - vmk_uint8 QoSPriority; - /** \brief QoS (Quality of Service) Bandwidth percentage */ - vmk_uint8 QosBandwith; - - /** \brief Virtual SAN (VSAN) number */ - vmk_int16 vsan_number; - /** \brief Virtual Fabric (VF) id number, undefined value is -1 */ - vmk_int32 vf_id; - /** \brief Vport role id initiator/target etc */ - vmk_int32 role_id; - - /** \brief Symbolic name, generally VM's name is used */ - vmk_int8 symname[VMK_VPORT_VM_NAME_LENGTH]; -}; - #endif /* _VMKAPI_NPIV_H_ */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/npiv/vmkapi_scsi_vport.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/npiv/vmkapi_scsi_vport.h new file mode 100644 index 0000000..9880382 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/npiv/vmkapi_scsi_vport.h @@ -0,0 +1,153 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + * vmkapi_scsi_vport.h -- + * + * Defines the vmkernel specific virtual port API used + * to interact with NPIV VPORT aware native drivers. + */ + +#ifndef _VMKAPI_SCSI_VPORT_H +#define _VMKAPI_SCSI_VPORT_H + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +#include "npiv/vmkapi_npiv_wwn.h" + +/* + *********************************************************************** + * vmk_ScsiVportCreate -- */ /** + * + * \brief Create a virtual port on the physical device indicated. + * + * The driver should create a virtual port representation on the + * physical device passed using the world wide name pair passed + * in wwpn and wwnn. The vmk_ScsiAdapter created to represent the + * vport is passed back in vAdapter. + * + * \note This function is allowed to block in the driver. + * + * \param[in] device Handle to physical device the virtual port + * should be created on. + * \param[in] wwpn Pointer to the world wide port name of the + * virtual port to be created. + * \param[in] wwnn Pointer to the world wide node name of the + * virtual port to be created. + * \param[out] vAdapter Handle to the vmk_ScsiAdapter created on + * the physical device for the vport. + * + * \retval VMK_BAD_PARAM A parameter or the device is not valid. + * \retval VMK_NO_MEMORY Unable to allocate memory for vport handle. + * \retval VMK_OK Success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiVportCreate)(vmk_Device device, + vmk_VportWwn *wwpn, + vmk_VportWwn *wwnn, + vmk_ScsiAdapter **vAdapter); + +/* + *********************************************************************** + * vmk_ScsiVportDelete -- */ /** + * + * \brief Delete the virtual port passed from a physical device. + * + * The driver should stop driving this virtual port, and release + * its resources. The vmk_ScsiAdapter vAdapter should be deallocated. + * + * \note The vAdapter passed has already been quiesced at the PSA + * layer and is not used by PSA for IOs. + * + * \note This function is allowed to block in the driver. + * + * \param[in] device Handle to physical device the virtual port was + * created on. + * \param[in] vAdapter Handle to the vmk_ScsiAdapter to be removed + * from the physical device. + * + * \retval VMK_BAD_PARAM A parameter or the device is not valid. + * \retval VMK_OK Success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiVportDelete)(vmk_Device device, + vmk_ScsiAdapter *vAdapter); + +/* + *********************************************************************** + * vmk_ScsiVportGetInfo -- */ /** + * + * \brief Return information about virtual ports on the physical device. + * + * Return information about how many virtual ports this physical + * device can support and how many are in use currently. + * + * \note This function is allowed to block in the driver. + * + * \param[in] device Handle to physical device to get the info from. + * \param[out] vports_max Return maximum number of vports allowed. + * \param[out] vports_inuse Return how many of the vports are in use. + * + * \retval VMK_OK Success + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiVportGetInfo)(vmk_Device device, + vmk_uint32 *vports_max, + vmk_uint32 *vports_inuse); + +/** + * \brief Vport Operations + */ +typedef struct vmk_ScsiVportOps { + /** \brief Create a virtual port */ + vmk_ScsiVportCreate createVport; + /** \brief Delete a virtual port */ + vmk_ScsiVportDelete deleteVport; + /** \brief Get virtual port information from physical device */ + vmk_ScsiVportGetInfo getVportInfo; +} vmk_ScsiVportOps; + + +/* + *********************************************************************** + * vmk_ScsiRegisterVportOps -- */ /** + * + * \brief Register Vport operations for a device. + * + * Register virtual port operations a physical device can perform. + * If VportOps are registered, it is assumed the device can create + * and delete virtual ports and return information about virtual ports. + * If VportOps are not registered, it is assumed the device is not + * NPIV vport capable. + * + * \note This function will not block. + * + * \param[in] device Handle to logical device the VportOps should + * be registered on. + * \param[in] ops VportOps registration data. + * + * \retval VMK_BAD_PARAM Device or ops argument is NULL or device + * is not fully registered yet. + * \retval VMK_NO_MEMORY No memory to register. + * \retval VMK_EXISTS Already registered. + * \retval VMK_OK Successfully registered VportOps. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiRegisterVportOps(vmk_Device device, + vmk_ScsiVportOps *ops); + +#endif /* _VMKAPI_SCSI_VPORT_H */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/platform/vmkapi_platform_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/platform/vmkapi_platform_incompat.h new file mode 100644 index 0000000..bfe70f5 --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/platform/vmkapi_platform_incompat.h @@ -0,0 +1,42 @@ +/* ********************************************************** + * Copyright 2013 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +#ifndef _VMKAPI_PLATFORM_INCOMPAT_H +#define _VMKAPI_PLATFORM_INCOMPAT_H + +/* + *********************************************************************** + * vmk_EFIIsPresent -- */ /** + * + * \ingroup Platform + * \brief Determines if EFI is present in the system. + * + * \retval VMK_TRUE EFI is present in the system. + * \retval VMK_FALSE EFI is not present in the system. + * + *********************************************************************** + */ +vmk_Bool vmk_EFIIsPresent(void); + +/* + *********************************************************************** + * vmk_EFIGetSMBIOSEntryPoint -- */ /** + * + * \ingroup Platform + * \brief Returns a pointer to the SMBIOS entry point structure. + * + * \param[out] smbios Pointer to SMBIOS entry point structure. + * + * \retval VMK_OK Success. + * \retval VMK_NOT_FOUND SMBIOS entry point structure not found. + * + *********************************************************************** + */ +VMK_ReturnStatus vmk_EFIGetSMBIOSEntryPoint(void **smbios); + +#endif diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/platform/x86/vmkapi_ioresource.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/platform/x86/vmkapi_ioresource.h index 20798ff..7e069d8 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/platform/x86/vmkapi_ioresource.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/platform/x86/vmkapi_ioresource.h @@ -77,11 +77,9 @@ typedef struct vmk_IOResourceInfo { } vmk_IOResourceInfo; /** \brief IOResource handle */ -struct vmkIOResource; typedef struct vmkIOResource* vmk_IOResource; /** \brief IOResource reservation handle */ -struct vmkIOReservation; typedef struct vmkIOReservation* vmk_IOReservation; @@ -99,7 +97,8 @@ typedef struct vmkIOReservation* vmk_IOReservation; * \retval VMK_OK Success. * \retval VMK_BAD_PARAM IOResource information incomplete. * \retval VMK_NO_MEMORY Couldn't allocate memory for resource. - * \retval VMK_FAILURE IOResource overlaps with an existing resource. + * \retval VMK_BAD_ADDR_RANGE IOResource overlaps with an existing + * resource. * *********************************************************************** */ @@ -119,7 +118,7 @@ vmk_IOResourceRegister(vmk_IOResourceInfo *resourceInfo, * \param[in] handle IOResource to unregister. * * \retval VMK_OK Success. - * \retval VMK_INVALID_HANDLE Invalid handle. + * \retval VMK_BAD_PARAM Invalid handle. * *********************************************************************** */ @@ -139,9 +138,9 @@ vmk_IOResourceUnregister(vmk_IOResource handle); * \param[out] reservation Reservation handle. * * \retval VMK_OK Success. + * \retval VMK_NO_MODULE_HEAP Caller has no heap to allocate memory. * \retval VMK_NO_MEMORY Couldn't allocate reservation handle. * \retval VMK_BAD_ADDR_RANGE Request doesn't match existing resource. - * \retval VMK_BAD_PARAM Options don't match resource. * \retval VMK_NOT_SHARED Reservation conflict. * *********************************************************************** @@ -162,7 +161,7 @@ vmk_IOResourceReserve(vmk_IOResourceInfo *resourceInfo, * \param[in] reservation Reservation handle. * * \retval VMK_OK Success. - * \retval VMK_INVALID_HANDLE Invalid handle. + * \retval VMK_BAD_PARAM Invalid handle. * *********************************************************************** */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi.h index f8ea7be..583776f 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2004 - 2011 VMware, Inc. All rights reserved. + * Copyright 2004 - 2012 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -36,8 +36,6 @@ *********************************************************************** * vmk_ScsiDeviceClassToString -- */ /** * - * \ingroup SCSI - * * \brief Convert a SCSI class identifier into a human-readable text * string. * @@ -58,8 +56,6 @@ const char *vmk_ScsiDeviceClassToString( *********************************************************************** * vmk_ScsiScanPaths -- */ /** * - * \ingroup SCSI - * * \brief Scan one or more physical paths. * * The discovered paths are automatically registered with the @@ -102,8 +98,6 @@ VMK_ReturnStatus vmk_ScsiScanPaths( *********************************************************************** * vmk_ScsiScanAndClaimPaths -- */ /** * - * \ingroup SCSI - * * \brief Scan one or more physical paths and run the plugin claim rules. * * The discovered paths are automatically registered with the @@ -141,8 +135,6 @@ VMK_ReturnStatus vmk_ScsiScanAndClaimPaths( *********************************************************************** * vmk_ScsiScanDeleteAdapterPath -- */ /** * - * \ingroup SCSI - * * \brief Scan a physical path and remove it if dead * * The path will be unclaimed and removed only if it is dead. @@ -188,8 +180,6 @@ VMK_ReturnStatus vmk_ScsiScanDeleteAdapterPath( *********************************************************************** * vmk_ScsiNotifyPathStateChange -- */ /** * - * \ingroup SCSI - * * \brief Notify the VMkernel of a possible path state change (sync). * * Path is identified by \em vmkAdapter, \em channel, \em target @@ -228,8 +218,6 @@ VMK_ReturnStatus vmk_ScsiNotifyPathStateChange( *********************************************************************** * vmk_ScsiNotifyPathStateChangeAsync -- */ /** * - * \ingroup SCSI - * * \brief Notify the VMkernel of a possible path state change (async). * * Path is identified by \em vmkAdapter, \em channel, \em target, @@ -254,6 +242,7 @@ VMK_ReturnStatus vmk_ScsiNotifyPathStateChange( * and target. * * \retval VMK_NO_MEMORY Out of memory. + * \retval VMK_BAD_PARAM Invalid adapter passed. * \retval VMK_NO_RESOURCES Failed to schedule the asynchronous path * probe due to lack of resources. * @@ -269,8 +258,6 @@ VMK_ReturnStatus vmk_ScsiNotifyPathStateChangeAsync( *********************************************************************** * vmk_ScsiInitTaskMgmt -- */ /** * - * \ingroup SCSI - * * \brief Create a task management request filter. * * A task management request filter consists of two things: @@ -352,8 +339,6 @@ void vmk_ScsiInitTaskMgmt( *********************************************************************** * vmk_ScsiQueryTaskMgmt -- */ /** * - * \ingroup SCSI - * * \brief Matches a SCSI command against a task management request * filter, and returns the action to be taken for that command. * @@ -383,8 +368,6 @@ vmk_ScsiTaskMgmtAction vmk_ScsiQueryTaskMgmt( *********************************************************************** * vmk_ScsiGetTaskMgmtTypeName -- */ /** * - * \ingroup SCSI - * * \brief Returns a human readable description of the task management * request. * @@ -406,8 +389,6 @@ const char *vmk_ScsiGetTaskMgmtTypeName( *********************************************************************** * vmk_ScsiDebugDropCommand -- */ /** * - * \ingroup SCSI - * * \brief Tell whether a command should be dropped. * * This is used for fault injection. @@ -434,8 +415,6 @@ vmk_ScsiDebugDropCommand(vmk_ScsiAdapter *adapter, vmk_ScsiCommand *cmd); *********************************************************************** * vmk_ScsiAdapterEvent -- */ /** * - * \ingroup SCSI - * * \brief Notifies the VMkernel of a specific event on the * specified adapter. * @@ -459,8 +438,6 @@ vmk_ScsiAdapterEvent(vmk_ScsiAdapter *adapter, vmk_uint32 eventType); *********************************************************************** * vmk_ScsiAdapterIsPAECapable -- */ /** * - * \ingroup SCSI - * * \brief Determines if the adapter supports DMA beyond 32 bits of * machine-address space. * @@ -486,8 +463,6 @@ vmk_ScsiAdapterIsPAECapable(vmk_ScsiAdapter *adapter) *********************************************************************** * vmk_ScsiCmdStatusIsGood -- */ /** * - * \ingroup SCSI - * * \brief Determine if a command status indicates a successful * completion. Note that this function returns false * if the device returns a check condition with a @@ -520,8 +495,6 @@ vmk_ScsiCmdStatusIsGood(vmk_ScsiCmdStatus status) *********************************************************************** * vmk_ScsiCmdIsRecoveredError -- */ /** * - * \ingroup SCSI - * * \brief Determine if a command status indicates a recovered * error. * @@ -545,8 +518,6 @@ vmk_ScsiCmdIsRecoveredError(const vmk_ScsiCommand *vmkCmd); *********************************************************************** * vmk_ScsiCmdIsSuccessful -- */ /** * - * \ingroup SCSI - * * \brief Determine if vmk_ScsiCommand completed successfully. * * \note This function will not block. @@ -575,8 +546,6 @@ vmk_ScsiCmdIsSuccessful(const vmk_ScsiCommand *vmkCmd) *********************************************************************** * vmk_ScsiCmdStatusIsResvConflict -- */ /** * - * \ingroup SCSI - * * \brief Determine if a command status indicates a reservation * conflict. * @@ -603,8 +572,6 @@ vmk_ScsiCmdStatusIsResvConflict(vmk_ScsiCmdStatus status) *********************************************************************** * vmk_ScsiCmdStatusIsCheck -- */ /** * - * \ingroup SCSI - * * \brief Determine if a command status indicates a check condition. * * \note This function will not block. @@ -630,8 +597,6 @@ vmk_ScsiCmdStatusIsCheck(vmk_ScsiCmdStatus status) *********************************************************************** * vmk_ScsiCmdSenseIsPOR -- */ /** * - * \ingroup SCSI - * * \brief Determine if sense data is a unit attention with Power-On Reset * as the additional sense code. * @@ -660,8 +625,6 @@ vmk_ScsiCmdSenseIsPOR(const vmk_ScsiSenseData *senseData) *********************************************************************** * vmk_ScsiCmdSenseIsResvReleased -- */ /** * - * \ingroup SCSI - * * \brief Determine if sense data is a unit attention with reservation * released as the additional sense code. * @@ -691,8 +654,6 @@ vmk_ScsiCmdSenseIsResvReleased(const vmk_ScsiSenseData *senseData) *********************************************************************** * vmk_ScsiCmdSenseIsMediumNotPresent -- */ /** * - * \ingroup SCSI - * * \brief Determine if sense data is a sense key not ready with medium * not present as the additional sense code. * @@ -720,8 +681,6 @@ vmk_ScsiCmdSenseIsMediumNotPresent(const vmk_ScsiSenseData *senseData) *********************************************************************** * vmk_ScsiGetLbaLbc -- */ /** * - * \ingroup SCSI - * * \brief Parse a SCSI CDB and pull out lba and lbc. * * Determine the lba and lbc for a given cdb. This is most useful @@ -759,8 +718,6 @@ vmk_ScsiGetLbaLbc(unsigned char *cdb, vmk_ByteCount cdbLen, *********************************************************************** * vmk_ScsiSetLbaLbc -- */ /** * - * \ingroup SCSI - * * \brief Set lba and lbc fields in a given SCSI CDB. * * Set the lba and lbc for a given cdb. This is most useful @@ -798,8 +755,6 @@ vmk_ScsiSetLbaLbc(unsigned char *cdb, vmk_ByteCount cdbLen, *********************************************************************** * vmk_ScsiAllocateAdapter -- */ /** * - * \ingroup SCSI - * * \brief Allocate an adapter. * * \note This function may block. @@ -818,7 +773,9 @@ vmk_ScsiAdapter *vmk_ScsiAllocateAdapter(void); *********************************************************************** * vmk_ScsiRegisterAdapter -- */ /** * - * \ingroup SCSI + * \deprecated This call should no longer be called directly by a + * Native Driver as it is only used internally by PSA. + * It is likely to go away in a future release. * * \brief Register an adapter with the VMkernel. * @@ -862,7 +819,9 @@ VMK_ReturnStatus vmk_ScsiRegisterAdapter( *********************************************************************** * vmk_ScsiUnregisterAdapter -- */ /** * - * \ingroup SCSI + * \deprecated This call should no longer be called directly by a + * Native Driver as it is only used internally by PSA. + * It is likely to go away in a future release. * * \brief Unregister an adapter previously registered by * vmk_ScsiRegisterAdapter(). @@ -890,8 +849,6 @@ VMK_ReturnStatus vmk_ScsiUnregisterAdapter( *********************************************************************** * vmk_ScsiFreeAdapter -- */ /** * - * \ingroup SCSI - * * \brief Free an adapter previously allocated by * vmk_ScsiAllocateAdapter(). * @@ -911,8 +868,6 @@ void vmk_ScsiFreeAdapter( *********************************************************************** * vmk_ScsiRemovePath -- */ /** * - * \ingroup SCSI - * * \brief Destroy the path identified by \em adapter, \em channel, * \em targetId and \em lunId. * @@ -946,8 +901,6 @@ vmk_Bool vmk_ScsiRemovePath( *********************************************************************** * vmk_ScsiRegisterIRQ -- */ /** * - * \ingroup SCSI - * * \brief Registers an adapter's interrupt handler and interrupt vector * with the VMkernel for polling during a core dump. * @@ -959,7 +912,7 @@ vmk_Bool vmk_ScsiRemovePath( * \note Spin locks can be held while calling into this function * * \param[in] adapter Adapter to register on behalf of. - * \param[in] intrVector Interrupt vector number to register. + * \param[in] intrCookie Interrupt cookie number to register. * \param[in] intrHandler Interrupt handler callback to invoke * when an interrupt needs to be serviced. * \param[in] intrHandlerData Private data to pass to the handler. @@ -970,16 +923,14 @@ vmk_Bool vmk_ScsiRemovePath( */ VMK_ReturnStatus vmk_ScsiRegisterIRQ( void *adapter, - vmk_uint32 intrVector, - vmk_InterruptHandler intrHandler, + vmk_IntrCookie intrCookie, + vmk_IntrHandler intrHandler, void *intrHandlerData); /* *********************************************************************** * vmk_ScsiHostStatusToString -- */ /** * - * \ingroup SCSI - * * \brief Take a SCSI host status and return a static string describing it. * * \note This function will not block. @@ -999,8 +950,6 @@ vmk_ScsiHostStatusToString(vmk_ScsiHostStatus hostStatus); *********************************************************************** * vmk_ScsiDeviceStatusToString -- */ /** * - * \ingroup SCSI - * * \brief Take a SCSI device status and return a static string describing * it. * @@ -1021,8 +970,6 @@ vmk_ScsiDeviceStatusToString(vmk_ScsiDeviceStatus deviceStatus); *********************************************************************** * vmk_ScsiSenseKeyToString -- */ /** * - * \ingroup SCSI - * * \brief Take a SCSI sense key and return a static string describing it. * * \note This function will not block. @@ -1042,8 +989,6 @@ vmk_ScsiSenseKeyToString(vmk_uint32 senseKey); *********************************************************************** * vmk_ScsiAdditionalSenseToString -- */ /** * - * \ingroup SCSI - * * \brief Take a SCSI ASC/ASCQ and return a static string describing it. * * \note This function will not block. @@ -1065,8 +1010,6 @@ vmk_ScsiAdditionalSenseToString(vmk_uint32 asc, ********************************************************************** * vmk_ScsiExtractSenseData -- */ /** * - * \ingroup SCSI - * * \brief Extract the SCSI Check Condition. * * Examine the contents of the senseBuffer and return the SCSI check @@ -1104,9 +1047,128 @@ vmk_ScsiExtractSenseData(vmk_ScsiSenseData *senseBuffer, /* *********************************************************************** - * vmk_ScsiVPDPageSize -- */ /** + * vmk_ScsiCmdGetSenseData -- */ /** * - * \ingroup SCSI + * \brief Obtain sense data associated with the given SCSI command. + * + * Command is identified by \em vmkCmd. Sense data is identified by + * \em buf. This buffer will be filled with the contents of SCSI command's + * sense data buffer. The caller passes in the size of the sense buffer in + * \em bufLen. Depending on the number of sense data bytes required, the caller + * can allocate a buffer of the appropriate size and pass the size of this + * buffer in \em bufLen. + * + * \note This function will not block. + * + * \note Spin locks can be held while calling into this function + * + * \note The max size of SCSI command's sense buffer is obtained by calling + * vmk_ScsiGetSupportedCmdSenseDataSize. If the call is made with a buffer + * larger than the max supported size, only the max supported number of bytes + * will be set. The contents of the input buffer beyond that will be set to 0. + * + * \note For a small sense buffer, see vmk_ScsiSenseDataSimple. + * + * \param[in] vmkCmd Address of the SCSI command + * \param[out] buf Address of the buffer that will + * be filled with sense data + * \param[in] bufLen Length of the sense buffer + * above. + * + * \retval VMK_OK Sense data was successfully + * obtained. + * \retval VMK_BAD_PARAM A bad argument was passed. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiCmdGetSenseData(vmk_ScsiCommand *vmkCmd, + vmk_ScsiSenseData *buf, + vmk_ByteCount bufLen); + +/* + *********************************************************************** + * vmk_ScsiCmdSetSenseData -- */ /** + * + * \brief Set the sense data of a SCSI command. + * + * Command is identified by \em vmkCmd. Sense data in \em buf is copied + * to the storage area for sense data in \em vmkCmd. The number of bytes + * that will be copied is identified by \em bufLen. If \em bufLen + * is less than SCSI command's max sense buffer size(obtained by calling + * vmk_ScsiGetSupportedCmdSenseDataSize), the remaining bytes in SCSI + * command's sense buffer are set to 0. If \em bufLen is larger than + * SCSI command's max sense buffer size, only max sense buffer size of + * sense data will be written, ie, sense data will be truncated to the max + * supported size. + * + * \note This function will not block. + * + * \note Spin locks can be held while calling into this function + * + * \param[in] buf Address of the buffer that + * holds sense data bytes to be + * copied. + * \param[in] vmkCmd Address of the SCSI command + * that contains the destination + * sense buffer. + * \param[in] bufLen The number of bytes to be + * copied. + * + * \retval VMK_OK Sense data was successfully + * set. + * \retval VMK_BAD_PARAM A bad argument was passed. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiCmdSetSenseData(vmk_ScsiSenseData *buf, + vmk_ScsiCommand *vmkCmd, + vmk_ByteCount bufLen); + +/* + *********************************************************************** + * vmk_ScsiCmdClearSenseData -- */ /** + * + * \brief Clear the sense data attached to a SCSI command + * + * \note This function will not block. + * + * \note Spin locks can be held while calling into this function + * + * Command is identified by \em vmkCmd. + * + * \param[in] vmkCmd Address of the SCSI command + * + * \retval VMK_OK Sense data was successfully + * cleared. + * \retval VMK_BAD_PARAM A bad argument was passed. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiCmdClearSenseData(vmk_ScsiCommand *vmkCmd); + +/* + *********************************************************************** + * vmk_ScsiGetSupportedCmdSenseDataSize -- */ /** + * + * \brief Get the size of the SCSI command's sense data buffer. + * + * \note This function will not block. + * + * \note Spin locks can be held while calling into this function + * + * \retval The SCSI command's supported buffer size + * + *********************************************************************** + */ +vmk_ByteCount +vmk_ScsiGetSupportedCmdSenseDataSize(void); + +/* + *********************************************************************** + * vmk_ScsiVPDPageSize -- */ /** * * \brief Get the size of a VPD page. * @@ -1132,8 +1194,6 @@ vmk_ScsiVPDPageSize(vmk_ScsiInquiryVPDResponse *response); *********************************************************************** * vmk_ScsiIllegalRequest -- */ /** * - * \ingroup SCSI - * * \brief Generates "illegal request" sense buffer data. * * \note This function will not block. @@ -1158,8 +1218,6 @@ vmk_ScsiIllegalRequest(vmk_ScsiSenseData *senseBuffer, *********************************************************************** * vmk_ScsiIsReadCdb -- */ /** * - * \ingroup SCSI - * * \brief Check whether the given SCSI opcode is one of the READ * commands. * @@ -1185,8 +1243,6 @@ vmk_ScsiIsReadCdb(vmk_uint8 cdb0) *********************************************************************** * vmk_ScsiIsWriteCdb -- */ /** * - * \ingroup SCSI - * * \brief Check whether the given SCSI opcode is one of the WRITE * commands. * @@ -1230,7 +1286,6 @@ vmk_ScsiGetAdapterName(const vmk_ScsiAdapter *vmkAdapter) ********************************************************************** * vmk_ScsiSetPathXferLimit -- */ /** * - * \ingroup SCSI * \brief Set the maximum single transfer size limit for a path. * * \param[in] vmkAdapter The target adapter. @@ -1265,8 +1320,6 @@ vmk_ScsiSetPathXferLimit(vmk_ScsiAdapter *vmkAdapter, ********************************************************************** * vmk_ScsiModifyQueueDepth -- */ /** * - * \ingroup SCSI - * * \brief Set the queue depth of the path specified by \em vmkAdapter * \em channel, \em target, and \em lun. * @@ -1320,6 +1373,10 @@ vmk_Bool vmk_ScsiAllFCPathsDown(void); * vmk_ScsiAdapterUniqueName -- */ /** * * \ingroup DeviceName + * \deprecated This call should no longer be called directly by a + * Native Driver as it is only used internally by PSA. + * It is likely to go away in a future release. + * * \brief Create a new unique adapter name. * * This function returns a new unique adapter name. @@ -1336,8 +1393,6 @@ void vmk_ScsiAdapterUniqueName(vmk_Name *adapterName); *********************************************************************** * vmk_ScsiGetIdentifierFromPage83Inquiry -- */ /** * - * \ingroup SCSI - * * \brief Get a UID of given type from a page 83 inquiry buffer * * Get the identifier of the given idType from the given page 83 @@ -1384,8 +1439,6 @@ vmk_ScsiGetIdentifierFromPage83Inquiry(vmk_uint8 *inquiryBuf, *********************************************************************** * vmk_ScsiGetSystemLimits -- */ /** * - * \ingroup SCSI - * * \brief Retrieve the max number of Scsi devices and paths supported * * \note This function will not block. @@ -1402,7 +1455,8 @@ vmk_ScsiGetSystemLimits(vmk_ScsiSystemLimits *limits); *********************************************************************** * vmk_ScsiCommandGetCompletionHandle -- */ /** * - * \ingroup SCSI + * \deprecated Do not use in Native Drivers - please see + * vmk_ScsiCommandGetCompletionQueue instead * * \brief Get the Completion handle for the SCSI command. * @@ -1430,7 +1484,8 @@ vmk_ScsiCommandGetCompletionHandle(vmk_ScsiAdapter *vmkAdapter, *********************************************************************** * vmk_ScsiRegisterCompObjects -- */ /** * - * \ingroup SCSI + * \deprecated Do not use in Native Drivers - please see + * vmk_ScsiStartCompletionQueues instead * * \brief Register the completion objects for the adapter with vmkernel * @@ -1461,7 +1516,8 @@ VMK_ReturnStatus vmk_ScsiRegisterCompObjects(vmk_ScsiAdapter *vmkAdapter, *********************************************************************** * vmk_ScsiGetNumCompObjects -- */ /** * - * \ingroup SCSI + * \deprecated Do not use in Native Drivers - please see + * vmk_ScsiGetMaxNumCompletionQueues instead * * \brief Queries VMKernel for number of Completion Objects * @@ -1475,16 +1531,90 @@ vmk_uint32 vmk_ScsiGetNumCompObjects(void); /* *********************************************************************** - * vmk_ScsiCheckPluginRegistered -- */ /** + * vmk_ScsiGetMaxNumCompletionQueues -- */ /** * - * \ingroup SCSI + * \brief Provide max number of Completion queues to create for adapter + * + * \note This function will not block. + * + * \return Maximum Number of Completion queues that can be created for + * any adapter. + * + *********************************************************************** + */ +vmk_uint32 vmk_ScsiGetMaxNumCompletionQueues(void); + +/* + *********************************************************************** + * vmk_ScsiStartCompletionQueues -- */ /** + * + * \brief Create Completion queues and completion worlds for an adapter + * + * PSA will go ahead and create the number of completion queues passed + * as well as the associated completion worlds to drive up completions. + * This means that the driver can call vmkCmd->done from any context + * since the command will simply be queued and driven to completion + * by a separate completion world. + * + * \note This function may block. + * + * \note There will always be one completion world for native adapters + * so the driver never has to create it's own completion worlds. + * + * \note The number of completion worlds can be raised dynamically, but + * cannot currently be decreased. The completion worlds will be + * destroyed when the adapter is unregistered, so no special + * cleanup has to be done for multiple completion queues. + * + * \note If anything fails when creating or extending the number of + * completion worlds we will leave the number of completion + * worlds to what it was previously. + * + * \param[in] vmkAdapter ScsiAdapter to create/increase queues for + * \param[in] numQueues Number of Completion queues to create + * + * \retval VMK_OK If queues were created, error otherwise + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_ScsiStartCompletionQueues(vmk_ScsiAdapter *vmkAdapter, + vmk_uint32 numQueues); + +/* + *********************************************************************** + * vmk_ScsiCommandGetCompletionQueue -- */ /** + * + * \brief Get the Completion queue that should be used for a command + * + * This function is for instance used by the driver before issuing the + * command so it can be issued to the right adapter queue (what the + * VMkernel would like as it optimizes this dynamically based on what + * PCPUs a given VM/issuer is running on). + * + * \note This function will not block. + * + * \param[in] vmkAdapter ScsiAdapter having the Completion queue + * \param[in] vmkCmd The SCSI command to get queue for + * + * \returns The queue number to issue this command on + * + *********************************************************************** + */ +vmk_uint32 +vmk_ScsiCommandGetCompletionQueue(vmk_ScsiAdapter *vmkAdapter, + vmk_ScsiCommand *vmkCmd); + +/* + *********************************************************************** + * vmk_ScsiCheckPluginRegistered -- */ /** * * \brief Check if Plugin is registered. * * \note This function will not block. * - * \returns VMK_OK If plugin is registered. - * VMK_NOT_FOUND If plugin is not registered. + * \retval VMK_OK If plugin is registered. + * \retval VMK_NOT_FOUND If plugin is not registered. * *********************************************************************** */ @@ -1495,8 +1625,6 @@ vmk_ScsiCheckPluginRegistered(const char *plugin); *********************************************************************** * vmk_ScsiGetRegisteredModuleName -- */ /** * - * \ingroup SCSI - * * \brief Get the the Module name for the Plugin specified. * * \note This function will not block. @@ -1516,8 +1644,6 @@ vmk_ScsiGetRegisteredModuleName(const char *plugin, vmk_Name *name); *********************************************************************** * vmk_ScsiResolveRegisteredPluginDependencies -- */ /** * - * \ingroup SCSI - * * \brief Resolve all dependencies for module "name". * Dependent Modules may get loaded. * @@ -1535,8 +1661,6 @@ vmk_ScsiResolveRegisteredPluginDependencies(const char *name); *********************************************************************** * vmk_ScsiCmdGetVMUuid -- */ /** * - * \ingroup SCSI - * * \brief Get the UUID of the VM associated with the specified command. * * \note This function will not block. @@ -1559,8 +1683,6 @@ vmk_ScsiCmdGetVMUuid(vmk_ScsiCommand *vmkCmd, char *uuid, vmk_ByteCount len); *********************************************************************** * vmk_ScsiSetPathLostByDevice -- */ /** * - * \ingroup SCSI - * * \brief Mark a path as permanently lost by device, triggering PDL * * Path is identified by \em adaperName, \em channel, \em target @@ -1594,6 +1716,28 @@ vmk_ScsiSetPathLostByDevice(const vmk_Name *adapterName, vmk_int32 target, vmk_int32 lun); +/* + *********************************************************************** + * vmk_ScsiSchedCommandCompletion -- */ /** + * + * \brief Schedules a non-blocking context to complete the command. + * + * This function schedules a non-blocking context to complete a + * command. The intent is to use this from the issuing path where + * a command cannot be completed directly since that could lead to + * stack exhaustion due to recursive calls to the issuing path from + * the completion path. + * + * \note This is a non-blocking call. + * + * \note Spin locks can be held while calling into this function + * + * \param[in] command The cmd to complete. + * + *********************************************************************** + */ +void vmk_ScsiSchedCommandCompletion( + vmk_ScsiCommand *command); #endif /* _VMKAPI_SCSI_H_ */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_const.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_const.h index a1096f1..bbcf992 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_const.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_const.h @@ -348,6 +348,9 @@ #define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_TARGET_PORT_IN_STANDBY_STATE 0x0b #define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_TARGET_PORT_IN_UNAVAILABLE_STATE 0x0c #define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_SPACE_ALLOC_IN_PROGRESS 0x14 +#define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_ROBOTICS_DISABLED 0x15 +#define VMK_SCSI_ASC_LU_NOT_READY_ASCQ_CONFIGURATION_REQUIRED 0x16 + /** \brief Logical unit doesn't respond to selection. */ #define VMK_SCSI_ASC_LU_NO_RESPONSE_TO_SELECTION 0x05 /** \brief Write error. */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_iodm.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_iodm.h new file mode 100644 index 0000000..6b0b62e --- /dev/null +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_iodm.h @@ -0,0 +1,196 @@ +/* ********************************************************** + * Copyright 2012 VMware, Inc. All rights reserved. + * **********************************************************/ + +/* + * @VMKAPIMOD_LICENSE@ + */ + +/* + *********************************************************************** + * SCSI I/O Device Management(IODM) Interfaces */ /** + * + * \addtogroup SCSI + * @{ + * + * \defgroup IODM SCSI I/O Device Management(IODM) interfaces + * + * IODM interfaces allow SCSI drivers to notify VMkernel of any events + * happening on the HBA(Host Bus Adapter). + * + * For example any Fiber Channel driver can use IODM interfaces to + * notify VMkernel of FC link related events, target port state + * change notifications, FC dropped frame instances etc. + * + * These interfaces are to be used only by Native SCSI drivers and + * vmklinux module, but not by vmklinux SCSI drivers. + * + * @{ + * + *********************************************************************** + */ + +#ifndef _VMKAPI_SCSI_IODM_H_ +#define _VMKAPI_SCSI_IODM_H_ + +/** \cond never */ +#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H +#error This vmkapi file should never be included directly but only via vmkapi.h +#endif +/** \endcond never */ + +/** + * \brief Types of IODM events. + */ +typedef enum { + /** \brief Event ID for an I/O Error. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to the address of the failed 'vmk_ScsiCommand' and + * 'data' parameter set to 0. + */ + VMK_IODM_IOERROR, + /** \brief Event ID for a Fibre Channel(FC) RSCN event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and + * 'data' parameter set to the FCID of the port that the FC driver needs to act on. + */ + VMK_IODM_RSCN, + /** \brief Event ID for an FC link up event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and + * 'data' parameter set to 0. + */ + VMK_IODM_LINKUP, + /** \brief Event ID for an FC link down event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and + * 'data' parameter set to 0. + */ + VMK_IODM_LINKDOWN, + /** \brief Event ID for an FC frame drop event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to the address of the 'vmk_ScsiCommand' and + * 'data' parameter set to the FC residual data bytes count(FCP_RESID). + */ + VMK_IODM_FRAMEDROP, + /** \brief Event ID for a SCSI LUN reset event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and 'data' parameter set to + * the value encoded by (C << 48 | T << 32 | L), where C, T, L + * represent Channel, Target and LUN IDs of the SCSI device respectively. + */ + VMK_IODM_LUNRESET, + /** \brief Event ID for an FCoE Clear Virutal Link(CVL) event. + * \note To notify this event, vmk_IodmEvent() should be called with + * 'dataPtr.ptr' parameter set to NULL and + * 'data' parameter set to the FCID of the vport that received the CVL. + */ + VMK_IODM_FCOE_CVL, + /* + * Whenever a new IODM event is added to the 'vmk_IodmEventType' + * enum, make sure its corresponding string is added to the + * 'VMK_IODM_EVENT_STRINGS' macro below in the same exact order. + */ + VMK_IODM_EVENT_LAST, +} vmk_IodmEventType; + +/** \cond nodoc */ +#define VMK_IODM_EVENT_STRINGS \ + VMK_IODM_EVENT_STR(VMK_IODM_IOERROR, "IO_ERROR") \ + VMK_IODM_EVENT_STR(VMK_IODM_RSCN, "RSCN") \ + VMK_IODM_EVENT_STR(VMK_IODM_LINKUP, "LINK_UP") \ + VMK_IODM_EVENT_STR(VMK_IODM_LINKDOWN, "LINK_DOWN") \ + VMK_IODM_EVENT_STR(VMK_IODM_FRAMEDROP, "FRAME_DROP") \ + VMK_IODM_EVENT_STR(VMK_IODM_LUNRESET, "LUN_RESET") \ + VMK_IODM_EVENT_STR(VMK_IODM_FCOE_CVL, "FCOE_CVL") +/** \endcond */ + +/* + *********************************************************************** + * vmk_IodmEnableEvents -- */ /** + * + * \brief Enable IODM event notification for a SCSI Adapter. + * + * This function enables IODM event collection for a SCSI Adapter. + * SCSI drivers call this function during HBA registration time. + * This function will allocate memory to store a reasonable number of + * IODM events for the SCSI Adapter. + * + * \note This function may block. + * + * \param[in] vmkAdapter SCSI Adapter on which IODM event collection + * is to be enabled. + * + * \retval VMK_OK IODM Event notification is enabled. + * \retval VMK_NO_MEMORY Not enough memory to allocate resources. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_IodmEnableEvents(vmk_ScsiAdapter *vmkAdapter); + +/* + *********************************************************************** + * vmk_IodmDisableEvents -- */ /** + * + * \brief Disable IODM event notification for a SCSI Adapter. + * + * This function disables IODM event collection for a SCSI Adapter. + * SCSI drivers call this function during HBA unregistration time, if + * IODM event collection was enabled for the HBA during registration. + * This function will free up the IODM resources allocated for the + * SCSI Adapter. + * + * \note This function may block. + * + * \param[in] vmkAdapter SCSI Adapter on which IODM is to be disabled. + * + * \retval VMK_OK IODM Event notification is disabled. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_IodmDisableEvents(vmk_ScsiAdapter *vmkAdapter); + +/* + *********************************************************************** + * vmk_IodmEvent -- */ /** + * + * \brief Notify VMkernel of an IODM event of a SCSI Adapter + * + * SCSI drivers call this function to notify VMkernel when + * an IODM event has occured on the HBA device. + * + * \pre IODM event notification should have been enabled. + * + * \see vmk_IodmEnableEvents() + * + * \note This is a non-blocking function. + * + * \note Spin locks can be held while calling into this function. + * + * \note Given an 'eventId', either 'dataPtr' or 'data' or both + * parameters will be used to convey IODM event's payload. + * Refer to 'vmk_IodmEventType' enum for different 'eventId' + * types and their associated 'dataPtr' and 'data' parameters. + * + * \param[in] vmkAdapter SCSI Adapter on which the event occured. + * \param[in] eventId Event type + * \param[in] dataPtr Pointer to payload associated with the event. + * \param[in] data Data associated with the event. + * + * \retval VMK_OK Event successfully added to the pool. + * \retval VMK_NOT_FOUND IODM event notification is not enabled for + * the adapter. + * + *********************************************************************** + */ +VMK_ReturnStatus +vmk_IodmEvent(vmk_ScsiAdapter *vmkAdapter, + vmk_IodmEventType eventId, + vmk_AddrCookie dataPtr, + vmk_uint64 data); + +#endif //_VMKAPI_SCSI_IODM_H_ +/** @} */ +/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_mgmt_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_mgmt_types.h index 3175934..2057088 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_mgmt_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_mgmt_types.h @@ -107,8 +107,23 @@ typedef enum vmk_FcLinkSpeed { VMK_FC_SPEED_8GBIT, VMK_FC_SPEED_10GBIT, VMK_FC_SPEED_16GBIT, + VMK_FC_SPEED_32GBIT, + VMK_FC_SPEED_40GBIT, } vmk_FcLinkSpeed; +/* Bitwised FC Port Speed */ +typedef enum vmk_FcLinkSpeedBit { + VMK_FC_SPEED_BIT_UNKNOWN = 0x0, + VMK_FC_SPEED_BIT_1GBIT = 0x1, + VMK_FC_SPEED_BIT_2GBIT = 0x2, + VMK_FC_SPEED_BIT_4GBIT = 0x4, + VMK_FC_SPEED_BIT_8GBIT = 0x8, + VMK_FC_SPEED_BIT_10GBIT = 0x10, + VMK_FC_SPEED_BIT_16GBIT = 0x20, + VMK_FC_SPEED_BIT_32GBIT = 0x40, + VMK_FC_SPEED_BIT_40GBIT = 0x80, +} vmk_FcLinkSpeedBit; + /* FC Port TYPE */ typedef enum vmk_FcPortType { VMK_FC_PORTTYPE_UNKNOWN = 0x0, @@ -136,6 +151,292 @@ typedef enum vmk_RescanLinkStatus { VMK_RESCAN_LINK_FAILED, } vmk_RescanLinkStatus; +/** + * \brief FC Adapter Attributes + * This follows Common HBA API Version 2.18 + */ +typedef struct vmk_FcAdapterAttributes { + /** \brief HBA manufacturer's name in ASCII string */ + vmk_uint8 manufacturer[64]; + /** \brief HBA serial number */ + vmk_uint8 serialNumber[64]; + /** \brief HBA model */ + vmk_uint8 model[256]; + vmk_uint8 modelDescription[256]; + /** \brief WWNN of the HBA */ + vmk_uint64 nodeWWN; + /** \brief Node symbolic name registered with name server */ + vmk_uint8 nodeSymbolicName[256]; + /** \brief Vendor specifc hardware revision level in ASCII string */ + vmk_uint8 hardwareVersion[256]; + /** \brief Vendor specifc driver version in ASCII string */ + vmk_uint8 driverVersion[256]; + /** \brief Vendor specific option ROM version */ + vmk_uint8 optionROMVersion[256]; + /** \brief Vendor specific firmware version */ + vmk_uint8 firmwareVersion[256]; + /** \brief Vendor specific value */ + vmk_uint32 vendorSpecificID; + /** \brief Number of ports on this HBA */ + vmk_uint32 numberOfPorts; + /** \brief Driver file name in full path*/ + vmk_uint8 driverName[256]; +} vmk_FcAdapterAttributes; + +/** + * \brief FC Port Attributes + * This follows Common HBA API Version 2.18 + */ +typedef struct vmk_FcPortAttributes { + /** \brief WWNN associated with this port */ + vmk_uint64 nodeWWN; + /** \brief WWPN associated with this port */ + vmk_uint64 portWWN; + /** \brief FcId of the port */ + vmk_uint32 portFcId; + /** \brief Port Type */ + vmk_FcPortType portType; + /** \brief Port State */ + vmk_FcPortState portState; + /** + * \brief Supported classes of service of this port. + * Value defined in FC-GS-5 for class of service. + */ + vmk_uint32 portSupportedClassOfService; + /** + * \brief Supported FC4 types. See HBAAPI spec and + * FC-GS-5 for detail. + */ + vmk_uint8 portSupportedFc4Types[32]; + /** + * \brief FC4 types configured to support. See + * HBAAPI and FC-GS-5 for detail. + */ + vmk_uint8 portActiveFc4Types[32]; + /** \brief Port symbolic name registered with name server */ + vmk_uint8 portSymbolicName[256]; + /** \brief OS device name */ + vmk_uint8 osDeviceName[256]; + /** \brief Supported speeds, bitwised */ + vmk_FcLinkSpeedBit portSupportedSpeed; + /** \brief Speed the port is currrently operating */ + vmk_FcLinkSpeed portSpeed; + /** \brief Maximum frame size in bytes supported by this port */ + vmk_uint32 portMaxFrameSize; + /** \brief Fabric name the port is attached */ + vmk_uint64 fabricName; + /** \brief Number of target ports discovered */ + vmk_uint32 numberOfDiscoveredPorts; +} vmk_FcPortAttributes; + +/** + * \brief FC HBA Port IO Statistics + * This follows Common HBA API Version 2.18 + */ +typedef struct vmk_FcPortStatistics { + /** \brief Number of seconds since statistics were reset */ + vmk_uint64 secondsSinceLastReset; + /** \brief Number of total transmitted FC frames */ + vmk_uint64 txFrames; + /** \brief Numbef of total received FC frames */ + vmk_uint64 rxFrames; + /** \brief Number of total transmitted FC words */ + vmk_uint64 txWords; + /** \brief Number of total received FC words */ + vmk_uint64 rxWords; + /** \brief Number of LIP primitive sequences occured */ + vmk_uint64 lipCount; + /** \brief Number of NOS primitive sequences occured */ + vmk_uint64 nosCount; + /** \brief Number of frames received in error */ + vmk_uint64 errorFrames; + /** \brief Number of frames lost due to lack of host buffers */ + vmk_uint64 dumpedFrames; + /** + * \brief Value of LINK FAILURE COUNT field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 linkFailureCount; + /** + * \brief Value of LOSS-OF-SYNCHRONIZATION COUNT field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 lossOfSyncCount; + /** + * \brief Value of LOSS-OF-SIGNAL COUNT field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 lossOfSignalCount; + /** + * \brief Value of PRIMITIVE SEQUENCE PROTOCOL ERROR field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 primitiveSeqProtocolErrCount; + /** + * \brief Value of INVALID TRANSMISSION WORD field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 invalidTxWordCount; + /** + * \brief Value of INVALID CRC COUNT field of + * LINK ERROR STATUS BLOCK + */ + vmk_uint64 invalidCrcCount; + + /* fc4 statistics */ + /** \brief Number of FC-4 operations causing FC-4 data input */ + vmk_uint64 inputRequests; + /** \brief Number of FC-4 operations causing FC-4 data output */ + vmk_uint64 outputRequests; + /** \brief Number of FC-4 operations not permitting FC-4 data movement */ + vmk_uint64 controlRequests; + /** \brief Number of megabytes of FC-4 data input */ + vmk_uint64 inputMegabytes; + /** \brief Number of megabytes of FC-4 data output */ + vmk_uint64 outputMegabytes; +} vmk_FcPortStatistics; + +/** + * \brief FCoE HBA Port IO Statistics + */ +typedef struct vmk_FcoePortStatistics { + vmk_uint64 secondsSinceLastReset; + vmk_uint64 txFrames; + vmk_uint64 rxFrames; + vmk_uint64 txWords; + vmk_uint64 rxWords; + vmk_uint64 errorFrames; + vmk_uint64 dumpedFrames; + vmk_uint64 linkFailureCount; + vmk_uint64 lossOfSignalCount; + vmk_uint64 invalidTxWordCount; + vmk_uint64 invalidCrcCount; + vmk_uint64 vlinkFailureCount; + vmk_uint64 missDiscAdvCount; + + /* protocol(fc4) statistics */ + vmk_uint64 inputRequests; + vmk_uint64 outputRequests; + vmk_uint64 controlRequests; + vmk_uint64 inputMegabytes; + vmk_uint64 outputMegabytes; +} vmk_FcoePortStatistics; + +/** + * \brief SAS Port TYPE + */ +typedef enum vmk_SasPortType { + VMK_SAS_PORTTYPE_UNKNOWN = 1, + VMK_SAS_PORTTYPE_OTHER, + VMK_SAS_PORTTYPE_NOTPRESENT, + VMK_SAS_PORTTYPE_SASDEVICE = 30, + VMK_SAS_PORTTYPE_SATADEVICE, + VMK_SAS_PORTTYPE_SASEXPANDER, +} vmk_SasPortType; + +/** + * \brief SAS Port State + */ +typedef enum vmk_SasPortState { + VMK_SAS_PORTSTATE_UNKNOWN = 1, + VMK_SAS_PORTSTATE_ONLINE, + VMK_SAS_PORTSTATE_OFFLINE, + VMK_SAS_PORTSTATE_BYPASSED, + VMK_SAS_PORTSTATE_DIAGNOSTICS, + VMK_SAS_PORTSTATE_LINKDOWN, + VMK_SAS_PORTSTATE_ERROR, + VMK_SAS_PORTSTATE_LOOPBACK, + VMK_SAS_PORTSTATE_DEGRADED, +} vmk_SasPortState; + +/** + * \brief SAS Port Protocol + */ +typedef enum vmk_SasPortProtocol { + VMK_SAS_PORTPROTOCOL_SSP = 1, + VMK_SAS_PORTPROTOCOL_STP, + VMK_SAS_PORTPROTOCOL_SMP, + VMK_SAS_PORTPROTOCOL_SATA, +} vmk_SasPortProtocol; + +/** + * \brief SAS Port Speed + */ +typedef enum vmk_SasLinkRate { + VMK_SAS_LINK_RATE_UNKNOWN = 0, + VMK_SAS_PHY_DISABLED, + VMK_SAS_LINK_RATE_FAILED, + VMK_SAS_SATA_SPINUP_HOLD, + VMK_SAS_SATA_PORT_SELECTOR, + VMK_SAS_LINK_RATE_1_5_GBPS, + VMK_SAS_LINK_RATE_3_0_GBPS, + VMK_SAS_LINK_RATE_6_0_GBPS, + VMK_SAS_LINK_VIRTUAL, + VMK_SAS_LINK_RATE_12_0_GBPS, +} vmk_SasLinkRate; + +/** + * \brief SAS Adapter Attributes + * This follows ANSI SM-HBA Interface + */ +typedef struct vmk_SasAdapterAttributes { + vmk_uint8 manufacturer[64]; + vmk_uint8 serialNumber[64]; + vmk_uint8 model[256]; + vmk_uint8 modelDescription[256]; + vmk_uint8 hardwareVersion[256]; + vmk_uint8 driverVersion[256]; + vmk_uint8 optionROMVersion[256]; + vmk_uint8 firmwareVersion[256]; + vmk_uint32 vendorSpecificID; + vmk_uint8 driverName[256]; + vmk_uint8 hbaSymbolicName[256]; + vmk_uint32 numberOfPorts; +} vmk_SasAdapterAttributes; + +/** + * \brief SAS Port Attributes + * This follows ANSI SM-HBA Interface + */ +typedef struct vmk_SasPortAttributes { + vmk_SasPortType portType; + vmk_SasPortState portState; + vmk_SasPortProtocol portProtocol; + vmk_uint8 osDeviceName[256]; + vmk_uint64 localSasAddress; + vmk_uint64 attachedSasAddress; + vmk_uint32 numberOfDiscoveredPorts; + vmk_uint32 numberOfPhys; + vmk_uint64 enclosureID; + vmk_uint32 bayID; + vmk_uint8 phyIdentifier; + vmk_SasLinkRate negotiatedLinkrate; + vmk_SasLinkRate minimumLinkrate; + vmk_SasLinkRate maximumLinkrate; +} vmk_SasPortAttributes; + +/** + * \brief SAS HBA Port IO Statistics + */ +typedef struct vmk_SasPortStatistics { + vmk_uint64 secondsSinceLastReset; + vmk_uint64 txFrames; + vmk_uint64 rxFrames; + vmk_uint64 txWords; + vmk_uint64 rxWords; + vmk_uint64 invalidDwordCount; + vmk_uint64 runningDisparityErrorCount; + vmk_uint64 lossOfDwordSyncCount; + vmk_uint64 phyResetProblemCount; + + /* protocol statistics */ + vmk_uint64 inputRequests; + vmk_uint64 outputRequests; + vmk_uint64 controlRequests; + vmk_uint64 inputMegabytes; + vmk_uint64 outputMegabytes; +} vmk_SasPortStatistics; + /** * \brief fc target attributes */ @@ -150,6 +451,8 @@ typedef struct vmk_FcTargetAttrs { /** * \brief fc adapter + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. */ typedef struct vmk_FcAdapter { @@ -173,7 +476,7 @@ typedef struct vmk_FcAdapter void *clientData); /** \brief Get FC Target Attributes */ VMK_ReturnStatus (*getFcTargetAttributes) ( - void *pSCSI_Adapter, vmk_FcTargetAttrs *fcAttrib, + void *clientData, vmk_FcTargetAttrs *fcAttrib, vmk_uint32 channelNo, vmk_uint32 targetNo); /** \brief Get FC Adapter Status */ vmk_AdapterStatus (*getFcAdapterStatus) ( @@ -181,6 +484,17 @@ typedef struct vmk_FcAdapter /** \brief rescan FC Link Status */ vmk_RescanLinkStatus (*rescanFcLink) ( void *clientData); + /** \brief Get FC HBA Attributes */ + VMK_ReturnStatus (*getFcAdapterAttributes) ( + void *clientData, vmk_FcAdapterAttributes *adapterAttrib); + /** \brief Get FC Port Attributes */ + VMK_ReturnStatus (*getFcPortAttributes) ( + void *clientData, vmk_uint32 portId, vmk_FcPortAttributes *portAttrib); + /** \brief Get FC Port Statistics */ + VMK_ReturnStatus (*getFcPortStatistics) ( + void *clientData, vmk_FcPortStatistics *portStats); + /** \brief Issue port reset */ + VMK_ReturnStatus (*issueFcPortReset) (void *clientData, vmk_uint32 portId); /** * \brief link timeout @@ -236,12 +550,19 @@ typedef struct vmk_FcoeAdapterAttrs { /** * \brief fcoe adapter + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. */ typedef struct vmk_FcoeAdapter { /** \brief Get FCoE adapter Details */ VMK_ReturnStatus (*getFCoEAdapterAttributes) ( - void *clientData, vmk_FcoeAdapterAttrs *fcoeAttrs); + void *clientData, vmk_FcoeAdapterAttrs *adapterAttrib); + /** \brief Get FCoE port statstics */ + VMK_ReturnStatus (*getFcoePortStatistics) ( + void *clientData, vmk_FcoePortStatistics *portStats); + /** \brief Issue port reset */ + VMK_ReturnStatus (*issueFcoePortReset) (void *clientData, vmk_uint32 portId); /** \brief Get FC Details */ vmk_FcAdapter fc; @@ -262,6 +583,8 @@ typedef struct vmk_SasTargetAttrs { /** * \brief SAS adapter + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. */ typedef struct vmk_SasAdapter { @@ -270,8 +593,20 @@ typedef struct vmk_SasAdapter void *clientData); /** \brief get the target's attributes */ VMK_ReturnStatus (*getSasTargetAttributes) ( - void *pSCSI_Adapter, vmk_SasTargetAttrs *sasAttrib, + void *clientData, vmk_SasTargetAttrs *sasAttrib, vmk_uint32 channelNo, vmk_uint32 targetNo); + /** \brief Get SAS adapter Details */ + VMK_ReturnStatus (*getSasAdapterAttributes) ( + void *clientData, vmk_SasAdapterAttributes *adapterAttrib); + /** \brief Get SAS Port Attributes */ + VMK_ReturnStatus (*getSasPortAttributes) ( + void *clientData, vmk_uint32 portId, vmk_SasPortAttributes *portAttrib); + /** \brief Get FCoE port statstics */ + VMK_ReturnStatus (*getSasPortStatistics) ( + void *clientData, vmk_SasPortStatistics *portStats); + /** \brief Issue port reset */ + VMK_ReturnStatus (*issueSasPortReset) (void *clientData, vmk_uint32 portId); + /** \brief reserved */ vmk_uint32 reserved1[4]; /** \brief reserved */ @@ -312,13 +647,15 @@ typedef struct vmk_XsanTargetAttrs { /** * \brief generic SAN adapter + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. */ typedef struct vmk_XsanAdapter { /** \brief get the generic SAN initiator's ID */ VMK_ReturnStatus (*getXsanInitiatorID)(void *clientData, vmk_XsanID *xsanID); /** \brief get the target's attributes on generic SAN */ VMK_ReturnStatus (*getXsanTargetAttributes) ( - void *pSCSI_Adapter, vmk_XsanTargetAttrs *xsanAttrib, + void *clientData, vmk_XsanTargetAttrs *xsanAttrib, vmk_uint32 channelNo, vmk_uint32 targetNo); } vmk_XsanAdapter; @@ -336,7 +673,11 @@ typedef enum vmk_IscsiParamStatus { VMK_ISCSI_PARAM_CONFIG_FAILED, } vmk_IscsiParamStatus; -/* iSCSI Adapter Structure */ +/** + * /brief iSCSI Adapter Structure + * + * \note "clientData" is from vmk_ScsiAdapter->clientData. + */ typedef struct vmk_IscsiAdapter { char reserved[5048]; /* not used */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_types.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_types.h index 12734da..92762f2 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_types.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/scsi/vmkapi_scsi_types.h @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright 2004 - 2009 VMware, Inc. All rights reserved. + * Copyright 2004 - 2013 VMware, Inc. All rights reserved. ***************************************************************************/ /* @@ -42,7 +42,7 @@ typedef struct vmk_ScsiSystemLimits { } vmk_ScsiSystemLimits; /** - * \brief sense data structure maintained in each SCSI device + * \brief Fixed format sense data structure maintained in each SCSI device * SPC 3 r23, Section 4.5.3 table 26 * * NB: The "valid" bit in the data structure does NOT tell whether the sense is @@ -105,6 +105,77 @@ typedef struct vmk_ScsiSenseData { vmk_uint8 additional[46]; } VMK_ATTRIBUTE_PACKED vmk_ScsiSenseData; +/* + * Default SCSI fixed format sense data structure without any additional data. + */ + +typedef struct vmk_ScsiSenseDataSimple { + union { + struct { + /** \brief error type and format of sense data (see SPC 3 r23, + * Sec. 4.5.1) + */ + vmk_uint8 error :7, + /** \brief set to one indicates the 'info' field is valid */ + valid :1; + /** \brief obsolete */ + vmk_uint8 segment; + /** \brief generic information describing the error or exception + * condition + */ + vmk_uint8 key :4, + :1, + /** \brief see above spc section */ + ili :1, + /** \brief see above spc section */ + eom :1, + /** \brief see above spc section */ + filmrk :1; + /** \brief see above spc section */ + vmk_uint8 info[4]; + /** \brief see above spc section */ + vmk_uint8 optLen; + /** \brief see above spc section */ + vmk_uint8 cmdInfo[4]; + /** \brief further information about to the condition reported in + * 'key' + */ + vmk_uint8 asc; + /** \brief detailed information about to the additional sense code + * in 'asc' + */ + vmk_uint8 ascq; + /** \brief Field Replacable Unit code (see SPC 3 r23, 4.5.2.5) */ + vmk_uint8 fru; + /** \brief Sense-key specific fields (see SPC 3 r23, 4.5.2.4) */ + vmk_uint8 bitpos :3, + bpv :1, + :2, + cd :1, + /** \brief Set to indicate sense-key specific fields are valid */ + sksv :1; + /** \brief field indicates which byte of the CDB or param data was in + * error + */ + vmk_uint16 epos; + } VMK_ATTRIBUTE_PACKED fixed; /* fixed format sense data */ + struct { + vmk_uint8 error :7, + :1; + vmk_uint8 key :4, + :4; + vmk_uint8 asc; + vmk_uint8 ascq; + vmk_uint8 reserved[3]; + vmk_uint8 optLen; + vmk_uint8 additional[10]; + } VMK_ATTRIBUTE_PACKED descriptor; /* descriptor format sense data */ + struct { + vmk_uint8 senseData[18]; + } VMK_ATTRIBUTE_PACKED byte; /* byte-stream sense data */ + } format; +} vmk_ScsiSenseDataSimple; + /** * \brief SCSI Device event handler callback entry * @@ -221,6 +292,13 @@ typedef enum { * in the VM cluster), but not any other ones. */ VMK_SCSI_COMMAND_FLAGS_VM_CLUSTER = 0x00000400, + /** + * \brief Indicator of a swap IO that is used to swap memory to disk. + * + * The swap IOs help relieve memory pressure on the system. + * So system should identify them and prioritize them if possible. + */ + VMK_SCSI_COMMAND_FLAGS_SWAP_IO = 0x00000200, } /** \cond nodoc */ VMK_ATTRIBUTE_PACKED VMK_ATTRIBUTE_ALIGN(1) /* \endcond*/ vmk_ScsiCommandFlags; @@ -295,7 +373,11 @@ typedef struct vmk_ScsiCommand { vmk_ScsiCmdStatus status; /** \brief Number of bytes transferred to or from the data buffer. */ vmk_ByteCountSmall bytesXferred; - /** \brief Worldlet ID that submitted the command, if any. */ + + /** + * \deprecated Do not use in Native Drivers + * \brief Worldlet ID that submitted the command, if any. + */ vmk_WorldletID worldletId; /** * \brief Scatter/gather array representing the IO-address ranges @@ -309,7 +391,13 @@ typedef struct vmk_ScsiCommand { /** * \brief SCSI sense data. * + * \deprecated This structure member is being deprecated. + * Consumers of this field should rely on the APIs + * vmk_ScsiCmd{Get,Set,Clear}SenseData() and + * vmk_ScsiGetSupportedCmdSenseDataSize(). + * * Only valid if vmk_ScsiCmdStatusIsCheck(cmd->status). + * Do not add any fields below this member. */ vmk_ScsiSenseData senseData; /** \brief Reserved. */ @@ -358,9 +446,20 @@ typedef struct vmk_ScsiTaskMgmt { * SCSI Adapter */ +/** + * \brief Don't care value for 'hostMaxSectors'. + */ +#define VMK_SCSI_HOST_MAX_SECTORS_IGNORE 0xFFFF + +/** + * \brief actions the 'discover' function can execute + */ typedef enum vmk_ScanAction { + /** Create a path to the named LUN */ VMK_SCSI_SCAN_CREATE_PATH, + /** Keep a previously created path to the named LUN */ VMK_SCSI_SCAN_CONFIGURE_PATH, + /** Destroy the path to the named LUN */ VMK_SCSI_SCAN_DESTROY_PATH, } vmk_ScanAction; @@ -394,8 +493,11 @@ typedef void (*vmk_EventHandlerCbk) (void *clientData, vmk_uint32 eventType); * */ typedef enum vmk_ScsiAdapterFlags { + /** \deprecated Legacy from Console-OS based shared block adapters */ VMK_SCSI_ADAPTER_FLAG_BLOCK = 0x00000001, - /** This adapter is an NPIV VPORT */ + /** + * \deprecated Do not use in Native Drivers + * This adapter is an NPIV VPORT */ VMK_SCSI_ADAPTER_FLAG_NPIV_VPORT = 0x00000002, /** Do not scan when registering this adapter */ VMK_SCSI_ADAPTER_FLAG_REGISTER_WITHOUT_SCAN = 0x00000004, @@ -403,10 +505,309 @@ typedef enum vmk_ScsiAdapterFlags { VMK_SCSI_ADAPTER_FLAG_NO_PERIODIC_SCAN = 0x00000008, /** Ok to probe periodically, but no adapter rescan */ VMK_SCSI_ADAPTER_FLAG_NO_ADAPTER_RESCAN = 0x00000010, - /** This adapter is a Legacy NPIV VPORT */ + /** + * \deprecated Do not use in Native Drivers + * This adapter is a Legacy NPIV VPORT */ VMK_SCSI_ADAPTER_FLAG_NPIV_LEGACY_VPORT = 0x00000020, } vmk_ScsiAdapterFlags; +/* + *********************************************************************** + * vmk_ScsiAdapterCommand -- */ /** + * + * \brief Queue a SCSI command on the adapter and LUN specified. + * + * Perform the command passed in 'cmd' on the adapter passed in + * 'clientData' on the LUN passed in 'deviceData'. + * + * \note Required function pointer + * + * \param[in] clientData Handle to the adapter to perform the + * comand on. + * \param[in] cmd Pointer to the command to execute. + * \param[in] deviceData Pointer to deviceData returned by 'discover' + * Create path. + * + * \retval VMK_WOULD_BLOCK cmd not queued because of Queue Depth limit + * or device was quiesced. + * \retval VMK_NO_MEMORY Out of memory. + * \retval VMK_OK Success - cmd queued or will be completed + * with error. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterCommand)(void *clientData, + struct vmk_ScsiCommand *cmd, + void *deviceData); + +/* + *********************************************************************** + * vmk_ScsiAdapterTaskMgmt -- */ /** + * + * \brief Perform a SCSI task management command on the adapter and + * LUN specified. + * + * Perform the task management command passed in 'taskMgmt' on the + * adapter passed in 'clientData' (if applicable) and on the LUN + * passed in 'deviceData'. + * + * \note Required function pointer + * + * \param[in] clientData Handle to the adapter to perform the task + * management action on. + * \param[in] taskMgmt Pointer to the task management command to + * be executed. + * \param[in] deviceData Pointer to deviceData returned by 'discover' + * Create. + * + * \retval VMK_FAILURE Task management command failed. + * \retval VMK_NO_MEMORY Out of memory. + * \retval VMK_OK Success. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterTaskMgmt)( + void *clientData, + struct vmk_ScsiTaskMgmt *taskMgmt, + void *deviceData); + +/* + *********************************************************************** + * vmk_ScsiAdapterDumpCommand -- */ /** + * + * \brief Queue a SCSI command during a core dump on the adapter + * and LUN specified. + * + * Perform the command passed in 'cmd' on the adapter passed in + * 'clientData' on the LUN passed in 'deviceData' during a core dump. + * + * \note Required function pointer + * + * \note Please see the description of system dumps in the VMkernel + * fundamentals guide. + * + * \param[in] clientData Handle to the adapter to perform the discover + * action on. + * \param[in] cmd Pointer to the command to execut. + * \param[in] deviceData Pointer to deviceData returned by 'discover' + * Create. + * + * \note No one else can issue commands to this device anymore though + * the ordinary 'command' entry point. + * + * \retval VMK_WOULD_BLOCK cmd not queued because of Queue Depth limit + * or device was quiesced. + * \retval VMK_BUSY Command cannot be executed, error handler active. + * \retval VMK_FAILURE Command cannot be executed. + * \retval VMK_NO_MEMORY Out of memory. + * \retval VMK_OK Success - cmd queued or will be completed + * with error. + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterDumpCommand)( + void *clientData, + vmk_ScsiCommand *cmd, + void *deviceData); + +/* + *********************************************************************** + * vmk_ScsiAdapterDumpQueue -- */ /** + * + * \brief Log the current adapter queue. + * + * \note Required function pointer + * + * \param[in] clientData Handle to the adapter. + * + *********************************************************************** + */ +typedef void (*vmk_ScsiAdapterDumpQueue)(void *clientData); + +/* + *********************************************************************** + * vmk_ScsiAdapterDumpPollHandler -- */ /** + * + * \brief Run the adapter's poll handler, called on the dump device + * during a system dump. + * + * \note Required function pointer + * + * \note Please see the description of system dumps in the VMkernel + * fundamentals guide. + * + * \param[in] clientData Handle to the adapter. + * + * \param[in] dumpPollHandlerData Argument passed to dumpPollHandler + * + *********************************************************************** + */ +typedef void (*vmk_ScsiAdapterDumpPollHandler)(void *clientData); + + +/* + *********************************************************************** + * vmk_ScsiAdapterDiscover -- */ /** + * + * \brief Perform the discovery action specified + * + * The driver should perform the action specified in 'action' for the + * LUN described by 'channel', 'targetId' and 'lunId'. + * The pointer passed in 'deviceData' points to a void * to place or + * use the driver private data structure pointer that is used as a + * handle to the LUN. + * + * \note Required function pointer + * + * \note This function is allowed to block in the driver. + * + * \param[in] clientData Handle to the adapter. + * \param[in] action One of the vmk_ScanAction enums declared above + * can be create, configure or destroy. + * \param[in] channel The channel to perform the action on. + * \param[in] targetId The target Id to perform the action on. + * \param[in] lunId The LUN Id to perform the action on. + * \param[in,out] deviceData Pointer to where the deviceData pointer + * is placed for create and destroy + * + * \note *deviceData is the private data structure the driver returns + * to represent the channel/targetId/lunId created. This pointer is + * used by the VMkernel as a handle for performance reasons in + * various other function pointer calls to represent the path + * to the LUN to be acted on. + * + * \note Return values for Create (VMK_SCSI_SCAN_CREATE_PATH) + * \retval VMK_NO_CONNECT The targetId does not exist or a target error + * occured. + * \retval VMK_NO_MEMORY Out of memory (not enough to create path). + * \retval VMK_EXISTS Path with specified channel/targetId/lunId + * already exists - *deviceData returned for + * existing path + * \retval VMK_OK Success - *deviceData returned for newly + * created path + * + * \note Return values for Configure (VMK_SCSI_SCAN_CONFIGURE_PATH) + * \retval VMK_FAILURE Path cannot be configured + * \retval VMK_NOT_FOUND Path cannot be found + * \retval VMK_OK Success - *deviceData not changed + * + * \note Return values for Destroy (VMK_SCSI_SCAN_DESTROY_PATH) + * \retval VMK_FAILURE Path cannot be destroyed + * \retval VMK_OK Success - *deviceData will be written with NULL + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterDiscover)( + void *clientData, + vmk_ScanAction action, + int channel, + int targetId, + int lunId, + void **deviceData); + +/* + *********************************************************************** + * vmk_ScsiAdapterModifyDeviceQueueDepth -- */ /** + * + * \brief Modify path queue depth on LUN specified if possible. + * + * \param[in] clientData Handle to the adapter. + * \param[in] qDepth New queue depth to set. + * \param[in] deviceData LUN pointer returned by 'discover' Create. + * + * \note Optional function pointer + * + * \retval Returns the new queue depth in effect, which could be + * lower than the depth actually requested if the driver + * cannot honor the requested (higher) queue depth. + * \retval Returns 0 if not a valid path. + * + *********************************************************************** + */ +typedef int (*vmk_ScsiAdapterModifyDeviceQueueDepth)( + void *clientData, + int qDepth, + void *deviceData); + + +/* + *********************************************************************** + * vmk_ScsiAdapterQueryDeviceQueueDepth -- */ /** + * + * \brief Return the current path queue depth on LUN specified. + * + * \note Required function pointer + * + * \param[in] clientData Handle to the adapter. + * \param[in] deviceData LUN pointer returned by 'discover' Create. + * + * \retval Returns the current queue depth for the path. + * \retval Returns 0 if not a valid path. + * + *********************************************************************** + */ +typedef int (*vmk_ScsiAdapterQueryDeviceQueueDepth)( + void *clientData, + void *deviceData); + + +/* + *********************************************************************** + * vmk_ScsiAdapterCheckTarget -- */ /** + * + * \brief Check if the specified target exists on the adapter and + * channel specified. + * + * \note Required function pointer for SAN drivers, optional + * for all others. + * + * \note If checkTarget returns VMK_FAILURE, we will not call + * discover to create paths. + * + * \param[in] clientData Handle to the adapter. + * \param[in] channel The channel to check for target on. + * \param[in] targetId The target Id to check. + * + * \retval VMK_FAILURE Target does not exist + * \retval VMK_OK Success - target exists + * + *********************************************************************** + */ +typedef VMK_ReturnStatus (*vmk_ScsiAdapterCheckTarget)( + void *clientData, + int channel, + int targetId); + +/* + *********************************************************************** + * vmk_ScsiAdapterNotifyIOAllowed -- */ /** + * + * \brief Callback to notify when IO is allowed to adapter + * + * \note Optional function pointer + * + * \note The Native Driver must assume IO is not possible until a + * "VMK_TRUE" is notified through this API. + * + * \note This function is not allowed to block in the driver. + * + * \note Passes VMK_TRUE or VMK_FALSE on these conditions: + * VMK_TRUE - When logical device registration is complete and + * when unquiescing the logical device. + * VMK_FALSE - When logical device quiesce is complete and when + * deviceForget is complete. + * + * \param[in] logicalDevice Handle to the logical device. + * \param[in] ioAllowed VMK_TRUE if IO is allowed, VMK_FALSE if IO + * not allowed. + * + *********************************************************************** + */ +typedef void (*vmk_ScsiAdapterNotifyIOAllowed)( + vmk_Device logicalDevice, + vmk_Bool ioAllowed); + + /** * \brief main data structure for SCSI adapter * @@ -417,32 +818,38 @@ typedef enum vmk_ScsiAdapterFlags { * discover() entrypoint. */ typedef struct vmk_ScsiAdapter { - /** \brief DMA constraints for this adapter. */ + /** + * \deprecated Do not use in Native Drivers + * \brief DMA constraints for this adapter. + * \note See 'engine' field below for more information. + */ vmk_DMAConstraints constraints; /** \brief Device for this adapter. */ vmk_Device device; /** \brief max # of blocks per i/o */ int hostMaxSectors; - /** \brief adapter's ->can_queue entrypoint */ + /** \brief Pointer to the total queue depth for the adapter */ vmk_uint32 *qDepthPtr; + /** \brief Issue a SCSI command to the specified device */ - VMK_ReturnStatus (*command)( - void *clientData, - struct vmk_ScsiCommand *cmd, - void *deviceData); + vmk_ScsiAdapterCommand command; + /** \brief Issue a SCSI task management */ - VMK_ReturnStatus (*taskMgmt)( - void *clientData, - struct vmk_ScsiTaskMgmt *taskMgmt, - void *deviceData); + vmk_ScsiAdapterTaskMgmt taskMgmt; + /** \brief Issue a SCSI command during a core dump */ - VMK_ReturnStatus (*dumpCommand)( - void *clientData, - vmk_ScsiCommand *cmd, - void *deviceData); - /** \brief Destroy the adapter */ + vmk_ScsiAdapterDumpCommand dumpCommand; + + /** + * \deprecated Do not use in Native Drivers + * \brief Perform a close on the adapter specified. + */ void (*close)(void *clientData); - /** \brief generate the adapter's proc node information */ + + /** + * \deprecated Do not use in Native Drivers + * \brief proc handler for the given SCSI host adapter. + */ VMK_ReturnStatus (*procInfo)( void* clientData, char* buf, @@ -450,15 +857,21 @@ typedef struct vmk_ScsiAdapter { vmk_ByteCountSmall count, vmk_ByteCountSmall* nbytes, int isWrite); + /** \brief Log the current adapter queue */ - void (*dumpQueue)(void *clientData); - /** \brief Run the adapter's BH, called on the dump device during a PSOD - * Interrupts are disabled and BHs aren't running. + vmk_ScsiAdapterDumpQueue dumpQueue; + + /** \brief Run the adapter's poll handler, called on the dump device + * during a system dump. */ + vmk_ScsiAdapterDumpPollHandler dumpPollHandler; + + /** \brief Passed as the argument to dumpPollHandler() */ + void *dumpPollHandlerData; + + /** + * \deprecated Do not use in Native Drivers + * \brief driver specific ioctl */ - void (*dumpBHHandler)(void *clientData); - /** \brief arg to dumpQueue() */ - void *dumpBHHandlerData; - /** \brief driver specific ioctl */ VMK_ReturnStatus (*ioctl)( void *clientData, void *deviceData, @@ -467,21 +880,23 @@ typedef struct vmk_ScsiAdapter { vmk_VA userArgsPtr, vmk_IoctlCallerSize callerSize, vmk_int32 *drvErr); + /** \brief discover & destroy a device */ - VMK_ReturnStatus (*discover)( - void *clientData, - vmk_ScanAction action, - int channel, - int targetId, - int lunId, - void **deviceData); - /** \brief send NPIV specific commands to a device */ + vmk_ScsiAdapterDiscover discover; + + /** + * \deprecated Do not use in Native Drivers + * \brief send NPIV specific commands to a device + */ VMK_ReturnStatus (*vportop)( - void *handle, + void *clientData, vmk_uint32 cmd, - void *arg, - vmk_int32 *drvErr); - /** \brief scan a single LUN on a vport */ + void *arg); + + /** + * \deprecated Do not use in Native Drivers + * \brief scan a single LUN on a vport + */ VMK_ReturnStatus (*vportDiscover)( void *clientData, vmk_ScanAction action, @@ -490,29 +905,29 @@ typedef struct vmk_ScsiAdapter { int lun, struct vmk_ScsiAdapter **vmkAdapter, void **deviceData); + /** \brief try changing the path queue depth */ - int (*modifyDeviceQueueDepth)( - void *clientData, - int qDepth, - void *deviceData); + vmk_ScsiAdapterModifyDeviceQueueDepth modifyDeviceQueueDepth; + /** \brief query the path queue depth */ - int (*queryDeviceQueueDepth)( - void *clientData, - void *deviceData); + vmk_ScsiAdapterQueryDeviceQueueDepth queryDeviceQueueDepth; + /** \brief checks if a target exists */ - VMK_ReturnStatus (*checkTarget)( - void *clientData, - int channel, - int targetId); + vmk_ScsiAdapterCheckTarget checkTarget; + /** \brief SCSI target id of adapter, or -1 if n/a */ int targetId; /** \brief adapter flags, see vmk_ScsiAdapterFlags above */ vmk_uint32 flags; - /** \brief block data */ - int blockData; + int reserved; /** \brief id of module running this adapter */ vmk_ModuleID moduleID; - /** \brief adapter creator's private convenience scratch data ptr */ + /** \brief adapter creator's private convenience scratch data ptr + * + * \note clientData is a pointer to a private structure provided + * by the driver for use as 'handle' to represent an + * adapter for many function calls. + */ void *clientData; /** \brief # of channels */ int channels; @@ -528,16 +943,24 @@ typedef struct vmk_ScsiAdapter { vmk_uint8 maxCmdLen; /** \brief adapter name */ vmk_Name name; - /** \brief block device name - * only valid for mgmtAdapter.transport == VMK_STORAGE_ADAPTER_BLOCK - */ - vmk_Name blockDevName; /** \brief driver name */ vmk_Name driverName; - /** \brief /proc directory */ + /** + * \deprecated Do not use in Native Drivers + * \brief /proc directory */ vmk_Name procName; /** \brief transport specific mgmtAdapter hooks */ vmk_SCSITransportMgmt mgmtAdapter; + /** \brief notify when IO is allowed/disallowed */ + vmk_ScsiAdapterNotifyIOAllowed notifyIOAllowed; + /* + * \brief DMA Engine created by driver + * + * \note Native Drivers must create and pass a DMA Engine for use by the + * PSA stack for SCSI IO. The vmk_DMAConstraints are embedded + * in the 'engine' at creation time. + */ + vmk_DMAEngine engine; } vmk_ScsiAdapter; /* @@ -557,11 +980,13 @@ typedef enum { } vmk_ScsiPluginState; /** + * \deprecated Do not use in Native Drivers * \brief Opaque handle for Completion Objects, provided by lower layer. */ typedef vmk_AddrCookie vmk_ScsiCompletionHandle; /** + * \deprecated Do not use in Native Drivers * \brief Completion Object information passed by the vmkLinux module. */ typedef struct vmk_ScsiCompObjectInfo { @@ -1125,6 +1550,7 @@ typedef enum { VMK_SCSI_INQ_TYPE_STD = 1, VMK_SCSI_INQ_TYPE_EVPD80 = 2, VMK_SCSI_INQ_TYPE_EVPD83 = 3, + VMK_SCSI_INQ_TYPE_EVPD86 = 4, } vmk_ScsiInqType; /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket.h index 66f37c3..ef146a7 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket.h @@ -29,12 +29,20 @@ */ typedef struct vmk_SocketInt *vmk_Socket; +/** + * \brief Definition for an invalid vmk_Socket. + */ +#define VMK_SOCKET_INVALID ((vmk_Socket)NULL) + /* * Address families */ /** \brief IPv4 */ #define VMK_SOCKET_AF_INET 2 +/** \brief IPv6 */ +#define VMK_SOCKET_AF_INET6 28 + /* * Socket types */ @@ -51,7 +59,7 @@ typedef struct vmk_SocketInt *vmk_Socket; * Flags for vmk_SocketSendTo() and vmk_SocketRecvFrom() */ /** \brief Send/receive of this message should not block */ -#define VMK_SOCKET_MSG_DONTWAIT 0x80 +#define VMK_SOCKET_MSG_DONTWAIT 0x80 /* * Socket option levels @@ -63,22 +71,25 @@ typedef struct vmk_SocketInt *vmk_Socket; * Socket-level socket options */ /** \brief Allow local address reuse */ -#define VMK_SOCKET_SO_REUSEADDR 0x0004 +#define VMK_SOCKET_SO_REUSEADDR 0x0004 /** \brief Keep connections alive */ -#define VMK_SOCKET_SO_KEEPALIVE 0x0008 +#define VMK_SOCKET_SO_KEEPALIVE 0x0008 /** \brief Just use interface addresses */ -#define VMK_SOCKET_SO_DONTROUTE 0x0010 +#define VMK_SOCKET_SO_DONTROUTE 0x0010 /** \brief Linger on close if data present */ -#define VMK_SOCKET_SO_LINGER 0x0080 +#define VMK_SOCKET_SO_LINGER 0x0080 +/** \brief Allow local address and port reuse */ +#define VMK_SOCKET_SO_REUSEPORT 0x0200 /** \brief Timestamp received dgram traffic */ -#define VMK_SOCKET_SO_TIMESTAMP 0x0400 +#define VMK_SOCKET_SO_TIMESTAMP 0x0400 /** \brief Use non-blocking socket semantics */ #define VMK_SOCKET_SO_NONBLOCKING 0x1015 + /** \brief Bind socket to a vmknic * \note Note that the TCP/IP stack will only transmit the packet if the routing * decision indicates that it can be sent out of the specified vmknic. */ -#define VMK_SOCKET_SO_BINDTOVMK 0x1016 +#define VMK_SOCKET_SO_BINDTOVMK 0x1016 /* * Values for the vmk_SocketShutdown()'s "how" parameter @@ -121,6 +132,8 @@ typedef struct vmk_SocketLingerData { * \brief Convert an address into a simple string for a particular * address family. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] addr Address to translate to a string. @@ -149,6 +162,8 @@ VMK_ReturnStatus vmk_SocketAddrToString(const vmk_SocketAddress *addr, * \brief Convert an address into a simple string for a particular * address family. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] addressFamily Address family that the string address @@ -180,6 +195,8 @@ VMK_ReturnStatus vmk_SocketStringToAddr(int addressFamily, * \ingroup Socket * \brief Create a new unbound socket. * + * \nativedriversdisallowed + * * \note This function will not block. * \note The default behavior is to create a blocking socket. If * nonblocking behavior is required then the @@ -223,6 +240,8 @@ VMK_ReturnStatus vmk_SocketCreate(int domain, * \ingroup Socket * \brief Bind a socket to a network address endpoint. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to bind to the network address @@ -257,6 +276,8 @@ VMK_ReturnStatus vmk_SocketBind(vmk_Socket socket, * \ingroup Socket * \brief Connect to a network address * + * \nativedriversdisallowed + * * \note This function may block if the socket is blocking socket * (this is the default behavior). If nonblocking behavior is required * then the VMK_SOCKET_SO_NONBLOCKING socket option must be set. @@ -294,6 +315,8 @@ VMK_ReturnStatus vmk_SocketConnect(vmk_Socket socket, * \ingroup Socket * \brief Shutdown part or all of a connection on a socket * + * \nativedriversdisallowed + * * \note This function may block if VMK_SOCKET_SO_LINGER has been set * otherwise it will not block. * @@ -320,6 +343,8 @@ VMK_ReturnStatus vmk_SocketShutdown(vmk_Socket socket, * \ingroup Socket * \brief Destroy an existing socket. * + * \nativedriversdisallowed + * * \note This function may block if VMK_SOCKET_SO_LINGER has been set * otherwise will not block. * @@ -342,6 +367,8 @@ VMK_ReturnStatus vmk_SocketClose(vmk_Socket socket); * \ingroup Socket * \brief Get the option information from a socket * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to get the option info from. @@ -376,6 +403,8 @@ VMK_ReturnStatus vmk_SocketGetSockOpt(vmk_Socket socket, * \ingroup Socket * \brief Set the option information on a socket * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to set the option info on. @@ -410,6 +439,8 @@ VMK_ReturnStatus vmk_SocketSetSockOpt(vmk_Socket socket, * \ingroup Socket * \brief Send data to a network address. * + * \nativedriversdisallowed + * * \note This function may block if the VMK_SOCKET_MSG_DONTWAIT flag is * not set or the socket is a blocking socket. * @@ -457,6 +488,8 @@ VMK_ReturnStatus vmk_SocketSendTo(vmk_Socket socket, * \ingroup Socket * \brief Receive data from a network address. * + * \nativedriversdisallowed + * * \note This function may block if the VMK_SOCKET_MSG_DONTWAIT flag is * not set or the socket is a blocking socket. * @@ -501,6 +534,8 @@ VMK_ReturnStatus vmk_SocketRecvFrom(vmk_Socket socket, * \ingroup Socket * \brief Get the socket's local endpoint network address information. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to query. @@ -531,6 +566,8 @@ VMK_ReturnStatus vmk_SocketGetSockName(vmk_Socket socket, * \ingroup Socket * \brief Get the socket's far endpoint network address information. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] socket Socket to query. diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket_ip.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket_ip.h index 786320a..fee38b7 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket_ip.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket_ip.h @@ -56,7 +56,7 @@ #define VMK_SOCKET_OPT_IP_HDRINCL 2 /** - * \brief Binary IP address in network byte order. + * \brief Binary IPv4 address in network byte order. */ typedef struct vmk_SocketIPAddressAddr { vmk_uint32 s_addr; @@ -68,13 +68,13 @@ typedef struct vmk_SocketIPAddressAddr { typedef struct vmk_SocketIPAddress { /** \brief Address length. Should be sizeof(vmk_SocketIPAddress) */ vmk_uint8 sin_len; - + /** \brief Address family. Should be VMK_SOCKET_AF_INET */ vmk_uint8 sin_family; - + /** \brief IP port in network byte order */ vmk_uint16 sin_port; - + /** \brief Binary IP address in network byte order */ vmk_SocketIPAddressAddr sin_addr; @@ -82,6 +82,42 @@ typedef struct vmk_SocketIPAddress { vmk_uint8 sin_zero[8]; } VMK_ATTRIBUTE_PACKED vmk_SocketIPAddress; + +/** + * \brief Binary IPv6 address in network byte order. + */ +typedef struct vmk_SocketIPv6AddressAddr { + union { + vmk_uint8 __u6_addr8[16]; + vmk_uint16 __u6_addr16[8]; + vmk_uint32 __u6_addr32[4]; + } __u6_addr; +} VMK_ATTRIBUTE_PACKED vmk_SocketIPv6AddressAddr; + + +/** + * \brief An IPv6-style socket address. + */ +typedef struct vmk_SocketIPv6Address { + /** \brief Address length. Should be sizeof(vmk_SocketIPv6Address) */ + vmk_uint8 sin6_len; + + /** \brief Address family. Should be VMK_SOCKET_AF_INET6 */ + vmk_uint8 sin6_family; + + /** \brief IP port in network byte order */ + vmk_uint16 sin6_port; + + /** \brief Flow Info in network byte order */ + vmk_uint32 sin6_flowinfo; + + /** \brief Binary IP address in network byte order */ + vmk_SocketIPv6AddressAddr sin6_addr; + + /** \brief Scope ID in network byte order */ + vmk_uint32 sin6_scopeid; +} VMK_ATTRIBUTE_PACKED vmk_SocketIPv6Address; + /* *********************************************************************** * vmk_Ntohl -- */ /** diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket_priv.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket_priv.h index 0dd3511..4a19316 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket_priv.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/sockets/vmkapi_socket_priv.h @@ -26,6 +26,9 @@ #endif /** \endcond never */ +#include "net/vmkapi_net_pkt.h" +#include "net/vmkapi_net_tcpip_incompat.h" + /* * Address families */ @@ -40,11 +43,11 @@ #define VMK_SOCKET_PF_VMKLINK VMK_SOCKET_AF_VMKLINK #define VMK_SOCKET_PF_INET6 VMK_SOCKET_AF_INET6 -/* Max length of connection backlog */ +/* Max length of connection backlog. */ #define VMK_SOCKET_SOMAXCONN 128 /* - * Socket send/receive flags + * Socket send/receive flags. */ /** \brief Process out-of-band data */ #define VMK_SOCKET_MSG_OOB 0x1 @@ -66,6 +69,8 @@ #define VMK_SOCKET_MSG_NBIO 0x4000 /** \brief used in sendit() */ #define VMK_SOCKET_MSG_COMPAT 0x8000 +/** \brief Receive from socket inside socket callback function */ +#define VMK_SOCKET_MSG_SOCALLBCK 0x10000 /* * Socket-level socket options @@ -86,26 +91,106 @@ #define VMK_SOCKET_SO_ACCEPTFILTER 0x1000 /** \brief Specify IPv4 next hop for socket */ #define VMK_SOCKET_SO_NEXTHOP 0x1019 +/** \brief Receive packets destined to STT destination port */ +#define VMK_SOCKET_SO_RECV_STT_ENCAP 0x100000 /* - * Socket ioctl commands + * Socket ioctl commands. */ -/** \brief Set interface gateway address */ -#define VMK_SOCKET_IOCTL_CMD_SET_IF_GWADDR 62 -/** \brief Get interface gateway address */ -#define VMK_SOCKET_IOCTL_CMD_GET_IF_GWADDR 63 +#define VMK_SOCKET_IOCTL_IN_BASE 0x40000000 +#define VMK_SOCKET_IOCTL_OUT_BASE 0x80000000 +#define VMK_SOCKET_IOCTL_IN(_num) (VMK_SOCKET_IOCTL_IN_BASE | _num) +#define VMK_SOCKET_IOCTL_OUT(_num) (VMK_SOCKET_IOCTL_OUT_BASE | _num) +#define VMK_SOCKET_IOCTL_INOUT(_num) (VMK_SOCKET_IOCTL_IN_BASE | \ + VMK_SOCKET_IOCTL_OUT_BASE | _num) -/** \brief Length of the interface name for Ioctl data */ -#define VMK_SOCKET_IOCTL_DATA_IF_NAME_LEN 16 +/** \brief Set interface gateway address. */ +#define VMK_SOCKET_IOCTL_CMD_SET_IF_GWADDR VMK_SOCKET_IOCTL_OUT(62) +/** \brief Get interface gateway address. */ +#define VMK_SOCKET_IOCTL_CMD_GET_IF_GWADDR VMK_SOCKET_IOCTL_INOUT(63) -/** \brief Data structure for some vmk_SocketIoctl calls */ +/** \brief Length of the interface name for Ioctl data. */ +#define VMK_SOCKET_IOCTL_DATA_IF_NAME_LEN 16 + +/** \brief Data structure for some vmk_SocketIoctl calls. */ typedef struct vmk_SocketIoctlAddrData { - /** \brief Name of the interface for the ioctl */ - char ifName[VMK_SOCKET_IOCTL_DATA_IF_NAME_LEN]; - /** \brief Socket address information */ - vmk_SocketAddress addr; + /** \brief Name of the interface for the ioctl. */ + char ifName[VMK_SOCKET_IOCTL_DATA_IF_NAME_LEN]; + union { + /** \brief Socket address information. */ + vmk_SocketAddress addr; + /** \brief Interface index. */ + vmk_uint16 index; + /** \brief Interface flags. */ + vmk_uint16 flags[2]; + /** \brief MTU. */ + vmk_uint32 mtu; + }; } vmk_SocketIoctlAddrData; +/* + *********************************************************************** + * vmk_SocketCallback -- */ /** + * + * \ingroup SocketPrv + * \brief Callback to call when data is available on a socket + * + * \param[in] socket Socket the data is available on. + * \param[in] arg Argument given when registering the callback + * + *********************************************************************** + */ +typedef void (*vmk_SocketCallbackFn)(vmk_Socket socket, void *arg); + +/* + *********************************************************************** + * vmk_SocketCreateOnInstance -- */ /** + * + * \ingroup SocketPrv + * \brief Create a new unbound socket on the instance specified. + * + * \nativedriversdisallowed + * + * \note This function will not block. + * \note The default behavior is to create a blocking socket. If + * nonblocking behavior is required then the + * VMK_SOCKET_SO_NONBLOCKING socket option must be set. + * + * \param[in] domain Protocol family for this socket. + * \param[in] type Type of communication on this socket + * \param[in] protocol Specific protocol to use from address family + * \param[in] tcpipInst Tcpip stack instance to create the socket on. + * Can be obtained using + * vmk_TcpipInstanceLookupByName() + * \param[out] socket Newly created socket + * + * \retval VMK_OK Success. + * \retval VMK_NOT_SUPPORTED Not supported for VMKLINK sockets + * \retval VMK_BAD_PARAM Bad input parameter. + * \retval VMK_NO_MODULE_HEAP The module's heap is not set. + * \retval VMK_NO_MEMORY Unable to allocate memory for socket. + * \retval VMK_EPROTONOSUPPORT Protocol type or protocol is not + * supported by the domain. + * \retval VMK_NO_BUFFERSPACE Insufficient buffer space available to + * create the socket. + * \retval VMK_NO_ACCESS Insufficient permissions to create a + * socket of the specified type or protocol. + * + * \note Specific domain (VMK_SOCKET_AF_*), type (VMK_SOCKET_SOCK_*), + * and protocol (VMK_SOCKET_*PROTO*) values are implementation + * dependent, an application can determine if a specific domain + * and type is supported by trying to create a socket with zero + * protocol value. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_SocketCreateOnInstance(int domain, + int type, + int protocol, + vmk_TcpipInstance tcpipInst, + vmk_Socket *socket); + /* *********************************************************************** * vmk_SocketListen -- */ /** @@ -134,6 +219,7 @@ typedef struct vmk_SocketIoctlAddrData { * *********************************************************************** */ + VMK_ReturnStatus vmk_SocketListen(vmk_Socket socket, int backlog); @@ -155,7 +241,7 @@ VMK_ReturnStatus vmk_SocketListen(vmk_Socket socket, * \param[in,out] addressLength The length of the address info. * \param[out] newSocket A new socket to communicate with the * connecting network entity. - * + * * \retval VMK_NOT_SUPPORTED Unknown socket type. * \retval VMK_BAD_PARAM Socket not in listen. * \retval VMK_NO_MODULE_HEAP This module's heap is not set. @@ -171,6 +257,7 @@ VMK_ReturnStatus vmk_SocketListen(vmk_Socket socket, * *********************************************************************** */ + VMK_ReturnStatus vmk_SocketAccept(vmk_Socket socket, vmk_Bool canBlock, vmk_SocketAddress *address, @@ -189,12 +276,13 @@ VMK_ReturnStatus vmk_SocketAccept(vmk_Socket socket, * \param[in] socket Socket to issue ioctl on * \param[in] command ioctl command VMK_SOCKET_IOCTL_* * \param[in,out] data Input/output data for the ioctl command - * + * * \retval VMK_NOT_SUPPORTED Unknown socket type. * \retval VMK_NO_MODULE_HEAP This module's heap is not set. * \retval VMK_EOPNOTSUPP Maps to BSD error code EOPNOTSUPP. * \retval VMK_NO_MEMORY Maps to BSD error code ENOMEM. - * \retval VMK_BAD_PARAM Maps to BSD error code EINVAL. + * \retval VMK_BAD_PARAM Invalid ioctl. Otherwise, maps to BSD error + * code EINVAL. * \retval VMK_INVALID_ADDRESS Maps to BSD error code EFAULT. * * \note For BSD error code definitions see the FreeBSD 7 man page @@ -202,9 +290,149 @@ VMK_ReturnStatus vmk_SocketAccept(vmk_Socket socket, * *********************************************************************** */ + VMK_ReturnStatus vmk_SocketIoctl(vmk_Socket socket, int command, void *data); + +/* + *********************************************************************** + * vmk_SocketSendPktHandleTo */ /** + * + * \ingroup SocketPrv + * \brief Send an pkt handle on socket + * + * \note The caller must take care of releasing the pkt handle. + * + * \note The flag VMK_SOCKET_MSG_DONTWAIT can be used to use non-blocking + * semantics, independent of the socket setting. + * + * \param[in] socket Socket to send on. + * \param[in] flags Settings for this send. + * \param[in] address Destination to send the pkt handle to + * \param[in] pkt Pointer to the pkt handle to send + * + * \retval VMK_OK Success + * \retval VMK_WOULD_BLOCK The socket buffer doesn't have enough + * space. Try again later. + * \retval VMK_NOT_SUPPORTED Not supported on VMKLINK socket + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_SocketSendPktHandleTo(vmk_Socket socket, + int flags, + vmk_SocketAddress *address, + vmk_PktHandle *pkt); + +/* + *********************************************************************** + * vmk_SocketRecvPktHandleFrom -- */ /** + * + * \ingroup SocketPrv + * \brief Receive pkt handle from socket buffer. + * + * \note The caller must take care of releasing the received pkt handle. + * \nativedriversdisallowed + * + * \note This function may block if the VMK_SOCKET_MSG_DONTWAIT flag is + * not set or the socket is a blocking socket. + * + * \param[in] socket Socket to receive the data through. + * \param[in] flags Settings for this receive transaction. + * \param[in] len Length in bytes of the data buffer. + * \param[in,out] address The source address information the + * messages should be received from, + * or NULL if this is not necessary for + * the socket's protocol or settings. + * \param[in,out] addressLength Length in bytes of the address + * information. + * \param[out] pkt Pointer to the received pkt handle + * + * \retval VMK_NOT_SUPPORTED Receive mbuf on VMKLINK socket is + * not supported. + * \retval VMK_EOPNOTSUPP Socket does not support this operation. + * \retval VMK_ENOTCONN Socket is not connected. + * \retval VMK_MESSAGE_TOO_LONG Data in pkt handle is too long. + * \retval VMK_WOULD_BLOCK Socket is in non block mode and no data + * is currently available to receive. + * \retval VMK_ECONNRESET Socket connection was reset. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_SocketRecvPktHandleFrom(vmk_Socket socket, + int flags, + int len, + vmk_SocketAddress *address, + int *addressLength, + vmk_PktHandle **pkt); + +/* + *********************************************************************** + * vmk_SocketRegisterRecvBufferCallback */ /** + * + * \ingroup SocketPrv + * \brief Registers a callback notifying of receive buffer changes + * + * The callback will be invoked when data is available to be read, + * or on events like connection being closed. + * + * \note Callbacks can be unregistered by passing NULL as the fn + * + * \note vmk_SocketSetRecvBufferLoWat() can be used to throttle the + * rate at which the callback is called. + * + * \note The callback may issue reads (e.g. vmk_SocketRecvFrom()), or may + * choose to defer such action, e.g. to a system world. If reads + * are done from the callback, then they must specify + * VMK_SOCKET_MSG_SOCALLBCK. + * + * \note The callback needs to handle spurious upcalls of any sort. + * + * \param[in] socket Socket. + * \param[in] fn The callback. + * \param[in] arg An argument passed back to the callback. + * + * \retval VMK_OK Success. + * \retval VMK_NOT_SUPPORTED Registering callbacks with VMKLINK sockets + * is not supported. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_SocketRegisterRecvBufferCallback(vmk_Socket socket, + vmk_SocketCallbackFn fn, + void *arg); + +/* + *********************************************************************** + * vmk_SocketSetRecvBufferLoWat + * + * \brief Set the receive socket buffer low watermark + * + * If a receive socket buffer callback has been registered + * (vmk_SocketRegisterRecvBufferCallback(), then the low watermark + * is a hint to the tcp stack to not invoke the callback unless the + * socket buffer is filled to at least the low watermark. + * + * \note The low watermark is a hint, not a binding guarantee of no + * callback invocations if there are less bytes than the + * watermark available. + * + * \note May be called from within the receive callback + * + * \param[in] socket Socket to send set water mark on + * \param[in] bytes Low watermark measured in bytes + * + * \retval VMK_OK Success. + * \retval VMK_NOT_SUPPORTED Registering callbacks with VMKLINK sockets + * is not supported. + * + *********************************************************************** + */ + +VMK_ReturnStatus vmk_SocketSetRecvBufferLoWat(vmk_Socket socket, int bytes); #endif /* _VMKAPI_SOCKET_PRIV_H_ */ /** @} */ /** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_ether.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_ether.h index bdad10a..4f7477c 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_ether.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_ether.h @@ -96,6 +96,8 @@ typedef struct { *********************************************************************** * vmk_EthDestinationFilter -- */ /** * + * \nativedriversdisallowed + * * \brief Filter ethernet frames based on the destination address. * * \param[in] filter Ethernet address filter diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_lacp_incompat.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_lacp_incompat.h deleted file mode 100644 index 08e946b..0000000 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_lacp_incompat.h +++ /dev/null @@ -1,72 +0,0 @@ -/* ********************************************************** - * Copyright 2011 VMware, Inc. All rights reserved. - * **********************************************************/ - -/* - * @VMKAPIMOD_LICENSE@ - */ - -/* - *********************************************************************** - * LACP */ /** - * \addtogroup VDS - * @{ - * - * \defgroup LACP LACP support in VDS - * - * Definition of LACP related VDS properties - * - * @{ - * - *********************************************************************** - */ - -#ifndef _VMKAPI_VDS_LACP_INCOMPAT_H_ -#define _VMKAPI_VDS_LACP_INCOMPAT_H_ - -/** \cond never */ -#ifndef VMK_HEADER_INCLUDED_FROM_VMKAPI_H -#error This vmkapi file should never be included directly but only via vmkapi.h -#endif -/** \endcond never */ - - -/** - * \brief VDS property to configure LACP - * - * To enable LACP on VDS, pass vmk_LACPConfig to this property and set - * field enabled to VMK_TRUE. Set enabled to VMK_FALSE to disable LACP - * on VDS. - */ -#define VMK_ESPROP_PORT_LACP "com.vmware.etherswitch.port.lacp" - - -/** - * \brief LACP modes - */ -typedef enum vmk_LACPMode { - /** LACP mode is invalid */ - VMK_LACP_MODE_NONE = 0, - - /** LACP always sends frames along the configured uplinks */ - VMK_LACP_MODE_ACTIVE, - - /** LACP acts as "speak when spoken to" */ - VMK_LACP_MODE_PASSIVE, -} vmk_LACPMode; - -/** - * \brief LACP configuration - * Parameters passed while enabling LACP on VDS - */ -typedef struct vmk_LACPConfig { - /** LACP is enabled or not on vds */ - vmk_Bool enabled; - - /** mode LACP is enabled in */ - vmk_LACPMode mode; -} vmk_LACPConfig; - -#endif /* _VMKAPI_VDS_LACP_INCOMPAT_H_ */ -/** @} */ -/** @} */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_port.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_port.h index 8432211..1e2d599 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_port.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_port.h @@ -119,8 +119,18 @@ typedef enum { /** Single-Root I/O Virtulaization */ VMK_PORT_CLIENT_CAP_SRIOV = 0x80000000, + + /** Offload L3/L4 header alignment */ + VMK_PORT_CLIENT_CAP_OFFLOAD_ALIGN_ANY = 0x1000000000000, + + /** + * Generic hardware offload (eg. vxlan encapsulation offload and offset + * based offload) + */ + VMK_PORT_CLIENT_CAP_GENERIC_OFFLOAD = 0x2000000000000, } vmk_PortClientCaps; + /** * \brief State of the device associated to a port. */ @@ -183,16 +193,11 @@ typedef enum vmk_PortEvent { } vmk_PortEvent; -/** - * \brief Number of bytes for port private stats string. - */ -#define VMK_PORT_PRIVATE_STATS_MAX 4096 - /** * \brief Structure containing statistics of the device associated to a port. */ -typedef struct { +typedef struct vmk_PortClientStats{ /** The number of rx packets received by the driver */ vmk_uint64 rxPkt; @@ -273,7 +278,10 @@ typedef struct { * String used to store the information specific the device associated * to a port */ - char privateStats[VMK_PORT_PRIVATE_STATS_MAX]; + char *privateStats; + + /** The length of privateStats in bytes */ + vmk_ByteCount privateStatsLength; } vmk_PortClientStats; /* @@ -282,6 +290,8 @@ typedef struct { * * \brief Set link status of a switch port. * + * \nativedriversdisallowed + * * The link status includes link state, speed, and duplex. * * \note As this function will asynchronously call down to the device, @@ -317,6 +327,8 @@ VMK_ReturnStatus vmk_PortSetLinkStatus(vmk_SwitchPortID portID, * * \brief Get link status of a switch port. * + * \nativedriversdisallowed + * * The link status includes link state, speed, and duplex. * * \see vmk_PortSetLinkStatus(). @@ -344,51 +356,55 @@ VMK_ReturnStatus vmk_PortGetLinkStatus(vmk_SwitchPortID portID, /* -*********************************************************************** -* vmk_PortUpdateDevCap -- */ /** -* -* \brief Request or release capabilities on a switch port. -* -* For capabilities that are allowed to be updated, refer to definition -* of vmk_PortCapability. -* -* Some pNIC hardware only support a subset of capabilities. When -* setting a capability that hardware doesn't support, vmkernel will -* insert software routine to do the packet processing. -* -* \see vmk_PortCapability(). -* -* \note This API currently only supports ports connected to uplinks -* -* \note The calling thread must hold a mutable handle for the portset -* associated with the specified portID. -* -* \note This function will not block. -* -* \param[in] portID Numeric ID of a virtual port -* \param[in] cap Pointer to new capabilities. Logical -* OR of vmk_PortCapability enum flag -* \param[out] resCap Pointer to result capabilities. Logical -* OR of vmk_PortCapability enum flag -* -* \retval VMK_OK If capabilities update is successful -* \retval VMK_NOT_FOUND If device cannot be found or portID is -* invalid -* \retval VMK_FAILURE Failed to update device cap -*********************************************************************** -*/ + *********************************************************************** + * vmk_PortUpdateDevCap -- */ /** + * + * \brief Request or release capabilities on a switch port. + * + * \nativedriversdisallowed + * + * For capabilities that are allowed to be updated, refer to definition + * of vmk_PortCapability. + * + * Some pNIC hardware only support a subset of capabilities. When + * setting a capability that hardware doesn't support, vmkernel will + * insert software routine to do the packet processing. + * + * \see vmk_PortCapability(). + * + * \note This API currently only supports ports connected to uplinks + * + * \note The calling thread must hold a mutable handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \param[in] portID Numeric ID of a virtual port + * \param[in] cap Pointer to new capabilities. Logical + * OR of vmk_PortCapability enum flag + * \param[out] resCap Pointer to result capabilities. Logical + * OR of vmk_PortCapability enum flag + * + * \retval VMK_OK If capabilities update is successful + * \retval VMK_NOT_FOUND If device cannot be found or portID is + * invalid + * \retval VMK_FAILURE Failed to update device cap + *********************************************************************** + */ VMK_ReturnStatus vmk_PortUpdateDevCap(vmk_SwitchPortID portID, - vmk_uint32 cap, - vmk_uint32 *resCap); + vmk_uint64 cap, + vmk_uint64 *resCap); /* *********************************************************************** - * vmk_PortQueryDevCap -- */ /** + * vmk_PortQueryDevCap -- */ /** * * \brief Get the enabled software capabilities on a switch port. * + * \nativedriversdisallowed + * * The function returns all capabilities enabled, whether implemented * in software or in hardware. * @@ -410,14 +426,16 @@ VMK_ReturnStatus vmk_PortUpdateDevCap(vmk_SwitchPortID portID, */ VMK_ReturnStatus vmk_PortQueryDevCap(vmk_SwitchPortID portID, - vmk_uint32 *cap); + vmk_uint64 *cap); /* *********************************************************************** - * vmk_PortGetHwCapSupported -- + * vmk_PortGetHwCapSupported -- */ /** * * \brief Get hardware capabilities supported. * + * \nativedriversdisallowed + * * Retrieve hardware capabilities supported by the device connected to * a switch port. * @@ -439,14 +457,16 @@ VMK_ReturnStatus vmk_PortQueryDevCap(vmk_SwitchPortID portID, */ VMK_ReturnStatus vmk_PortGetHwCapSupported(vmk_SwitchPortID portID, - vmk_uint32 *cap); + vmk_uint64 *cap); /* *********************************************************************** - * vmk_PortUpdateVlan -- */ /** + * vmk_PortUpdateVlan -- */ /** * * \brief Update vlan IDs on the device connected to a switch port. * + * \nativedriversdisallowed + * * This function updates the set of vlan IDs the device will process. * The bitmap, if not NULL, marks permitted vlan IDs on the port. * Packets with non-permitted vlan IDs may be filtered by device. @@ -486,9 +506,11 @@ VMK_ReturnStatus vmk_PortUpdateVlan(vmk_SwitchPortID portID, /* *********************************************************************** - * vmk_PortGetStates -- */ /** + * vmk_PortGetStates -- */ /** * - * \brief Fetch device state of the port. + * \brief Fetch device state of the port. + * + * \nativedriversdisallowed * * \note This API currently only supports ports connected to uplinks * @@ -515,6 +537,8 @@ VMK_ReturnStatus vmk_PortGetStates(vmk_SwitchPortID portID, * * \brief Change device MTU size on the port. * + * \nativedriversdisallowed + * * \note This API currently only supports ports connected to uplinks * * \note The calling thread must not hold any locks or portset handles. @@ -544,6 +568,8 @@ VMK_ReturnStatus vmk_PortSetMTU(vmk_SwitchPortID portID, * * \brief Get device MTU size on the port. * + * \nativedriversdisallowed + * * \note This API currently only supports ports connected to uplinks * * \note The calling thread must hold a mutable handle for the portset @@ -567,9 +593,11 @@ VMK_ReturnStatus vmk_PortGetMTU(vmk_SwitchPortID portID, /* *********************************************************************** * vmk_PortGetDevName -- */ /** - * + * * \brief Get name of the device connected to the switch port. * + * \nativedriversdisallowed + * * \note A buffer of VMK_DEVICE_NAME_MAX_LENGTH or larger ensures that * the name will fit. * @@ -604,6 +632,8 @@ VMK_ReturnStatus vmk_PortGetDevName(vmk_SwitchPortID portID, * * \brief Get virtual MAC address of the port. * + * \nativedriversdisallowed + * * \note This virtual MAC address may differ from device's physical * MAC address. * @@ -631,6 +661,8 @@ VMK_ReturnStatus vmk_PortGetVirtualMACAddr(vmk_SwitchPortID portID, * * \brief Get device statistics on the port. * + * \nativedriversdisallowed + * * The stats on pNICs are maintained by device drivers, and * some drivers only update a subset of stats. Therefore, there is no * guarantee that all counters returned are non-zero. @@ -663,6 +695,8 @@ VMK_ReturnStatus vmk_PortGetDevStats(vmk_SwitchPortID portID, * * \brief Apply a port filter to a port. * + * \nativedriversdisallowed + * * An advertised filter will become part of the rx load balancing * algorithm running in the uplink layer. The nominated "top * performers" filters will be given one of the populated uplink @@ -702,6 +736,8 @@ VMK_ReturnStatus vmk_PortApplyPortFilter(vmk_SwitchPortID portID, * * \brief Remove a port filter from an port. * + * \nativedriversdisallowed + * * The filter won't be part of the rx load balancing algorithm running in * the uplink layer. If a queue was associated to this filter, it will be * released for other filters. @@ -732,6 +768,8 @@ VMK_ReturnStatus vmk_PortRemovePortFilter(vmk_SwitchPortID portID, * * \brief Update the port's dispatch stats. * + * \nativedriversdisallowed + * * In normal configurations this function need not be called by the vds * implementations. This function will be needed in VXLan type of * configuration where vmknic port is used for configuration purpose and @@ -747,12 +785,49 @@ VMK_ReturnStatus vmk_PortRemovePortFilter(vmk_SwitchPortID portID, * * \retval VMK_OK Successfully updated dispatch stats of port. * \retval VMK_BAD_PARAM portID refers invalid Port - * \retval VMK_NOT_FOUND portID is invalid + * \retval VMK_NOT_FOUND portID is invalid *********************************************************************** */ VMK_ReturnStatus vmk_PortUpdateDispatchStats(vmk_SwitchPortID portID, vmk_PktHandle *pkt); +/* + *********************************************************************** + * vmk_PortUpdateDispatchStatsDir -- */ /** + * + * \brief Update the port's dispatch stats. + * + * \nativedriversdisallowed + * + * This function has similar behavior to vmk_PortUpdateDispatchStats(), + * but is preferable in cases where the caller knows the Pkt direction + * because it is more effiecient. + * In normal configurations this function need not be called by the vds + * implementations. This function will be needed in VXLan type of + * configuration where vmknic port is used for configuration purpose and + * its mac address is used to do encapsulation. + * + * \note The calling thread must hold immutable handle for the portset + * associated with the specified VXLAN vmknic port. + * + * \note This function will not block. + * + * \param[in] portID Numeric ID of a virtual port. + * \param[in] pkt Pkt which is being processed. + * \param[in] IsOutbound Indicate the direction in which Pkt is being + * tranmitted. + * VMK_TRUE : Pkt being sent to uplink port + * VMK_FALSE : Pkt being sent to backend port + * + * \retval VMK_OK Successfully updated dispatch stats of port. + * \retval VMK_BAD_PARAM portID refers invalid Port + * \retval VMK_NOT_FOUND portID is invalid + *********************************************************************** + */ +VMK_ReturnStatus vmk_PortUpdateDispatchStatsDir(vmk_SwitchPortID portID, + vmk_PktHandle *pkt, + vmk_Bool IsOutbound); + /* *********************************************************************** @@ -760,6 +835,8 @@ VMK_ReturnStatus vmk_PortUpdateDispatchStats(vmk_SwitchPortID portID, * * \brief Set port's requested Uplink feature. * + * \nativedriversdisallowed + * * Port's requested uplink feature will be used by load balancer * when allocating rx queue. Typically, VDS implmentation will call this * API for vmknic ports. @@ -793,11 +870,13 @@ VMK_ReturnStatus vmk_PortRequestUplinkFeature( * * \brief Clear port's requested Uplink feature. * + * \nativedriversdisallowed + * * With this function, port's already requested uplink features can be * cleared. After port's uplink feauture is cleared, load balancer will * allocate no-feature rx queue when it allocates new rx queue for that * port. - * + * * \note The calling thread must hold a mutable handle for the portset * associated with the specified port. * @@ -824,6 +903,8 @@ VMK_ReturnStatus vmk_PortClearUplinkFeature(vmk_SwitchPortID portID); * * \brief Get port's requested Uplink feature. * + * \nativedriversdisallowed + * * \note The calling thread must hold a mutable handle for the portset * associated with the specified port. * @@ -853,7 +934,9 @@ VMK_ReturnStatus vmk_PortGetUplinkFeature( * * \brief Set port's headroon length. * - * Packets allocated by port clients will have that much headroom + * \nativedriversdisallowed + * + * Packets allocated by port clients will have that much headroom * pre-allocated in the packets. * * \note The calling thread must hold a mutable handle for the portset @@ -881,6 +964,8 @@ VMK_ReturnStatus vmk_PortSetHeadroomLen(vmk_SwitchPortID portID, * * \brief Get port's headroon length. * + * \nativedriversdisallowed + * * \note The calling thread must hold a mutable handle for the portset * associated with the specified port. * @@ -906,6 +991,8 @@ VMK_ReturnStatus vmk_PortGetHeadroomLen(vmk_SwitchPortID portID, * * \brief Notify the change of a port property. * + * \nativedriversdisallowed + * * This function generates an event to notify management software that * the value of a property has been modified by the switch implementation. * It is not required that all runtime property updates need accompanying diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_portset.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_portset.h index 63a64d1..2f03d9c 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_portset.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_portset.h @@ -43,14 +43,11 @@ #include "net/vmkapi_net_uplink.h" #include "net/vmkapi_net_dcb.h" #include "net/vmkapi_net_pt.h" +#include "net/vmkapi_net_queue.h" #include "vds/vmkapi_vds_ether.h" +#include "vds/vmkapi_vds_prop.h" #include "vds/vmkapi_vds_respools.h" -/** - * \brief Identifier for a portset. - */ -typedef struct Portset vmk_Portset; - /** * \brief Query ops to get portset implementation information. */ @@ -191,6 +188,9 @@ typedef enum vmk_PortFilterClass { /** Vlan tag + mac addr filter */ VMK_PORT_FILTER_VLANMACADDR = 0x3, + + /** VXLAN filter */ + VMK_PORT_FILTER_VXLAN = 0x4, } vmk_PortFilterClass; /** @@ -213,6 +213,26 @@ typedef enum vmk_PortFilterProperties { VMK_PORT_FILTER_PROP_MGMT = 0x1, } vmk_PortFilterProperties; +/** + * Port MAC address filter information + */ +typedef vmk_UplinkQueueMACFilterInfo vmk_PortMACFilterInfo; + +/** + * Port VLAN tag filter information + */ +typedef vmk_UplinkQueueVLANFilterInfo vmk_PortVLANFilterInfo; + +/** + * Port VLAN tag + MAC filter information + */ +typedef vmk_UplinkQueueVLANMACFilterInfo vmk_PortVLANMACFilterInfo; + +/** + * Port VXLAN filter information + */ +typedef vmk_UplinkQueueVXLANFilterInfo vmk_PortVXLANFilterInfo; + /** * \brief Filter information advertised by a port. * @@ -228,20 +248,19 @@ typedef struct vmk_PortFilter { /** Filter class */ vmk_PortFilterClass class; - union { - - /** Filter class mac only */ - vmk_uint8 macaddr[6]; - - /** Filter class vlan tag only */ - vmk_uint16 vlan_id; - - /** Filter class vlan tag + mac */ - struct { - vmk_uint8 macaddr[6]; - vmk_uint16 vlan_id; - } vlanmac; - } filter; + /** + * \brief Filter info + * + * Filter information is cast to following structures according to + * class value: + * + * class: filter: + * VMK_PORT_FILTER_MACADDR vmk_PortMACFilterInfo + * VMK_PORT_FILTER_VLAN vmk_PortVLANFilterInfo + * VMK_PORT_FILTER_VLANMACADDR vmk_PortVLANMACFilterInfo + * VMK_PORT_FILTER_VXLAN vmk_PortVXLANFilterInfo + */ + void *filter; /** Filter properties */ vmk_PortFilterProperties prop; @@ -291,8 +310,12 @@ typedef enum vmk_PortUpdateOp { /** port VM UUID update */ VMK_PORT_UPDATE_VMUUID = 5, - /** Port VF update */ + /** Port VF update */ VMK_PORT_UPDATE_VF = 6, + + /** vNic port is quiesced */ + VMK_PORT_UPDATE_QUIESCED = 7, + } vmk_PortUpdateOp; @@ -478,6 +501,19 @@ typedef char vmk_PortClientName[VMK_PORT_CLIENT_NAME_MAX]; */ #define VMK_PORTSET_NAME_MAX (32 * 4) +/** + * \brief Flags for a VDSPortClient + */ +typedef enum { + + /** None */ + VMK_VDS_CLIENT_FLAG_NONE = 0x0, + + /** flags for DVS to push dvs property after port is connected. */ + VMK_VDS_CLIENT_PUSH_AFTER_CONNECT = 0x1, + +} vmk_VDSPortClientFlag; + /* *********************************************************************** * vmk_PortPrivDataDestructor -- */ /** @@ -687,6 +723,8 @@ typedef VMK_ReturnStatus (*vmk_PortsetDeactivate)(vmk_Portset *ps, * * VMK_PORT_UPDATE_VF: data is of (vmk_PortUpdateVFData *) type * + * VMK_PORT_UPDATE_QUIESCED: there is no data + * * \note This callback cannot block. * * \param[in] ps Mutable handle to a portset. @@ -946,6 +984,8 @@ typedef struct vmk_VDSEventEx { * * \brief Acquire a handle to a portset in the requested context. * + * \nativedriversdisallowed + * * A particular thread may hold at most one portset handle. By * extension, this means that a portset implementation may not * re-acquire a portset handle, and may not acquire a new portset handle @@ -995,6 +1035,8 @@ VMK_ReturnStatus vmk_PortsetAcquireByName(const char *psName, * * \brief Acquire a handle to a portset in the requested context. * + * \nativedriversdisallowed + * * A particular thread may hold at most one portset handle. By * extension, this means that a portset implementation may not * re-acquire a portset handle, and may not acquire a new portset handle @@ -1043,6 +1085,8 @@ VMK_ReturnStatus vmk_PortsetAcquireByPortID(vmk_SwitchPortID portID, * * \brief Acquire a handle to a portset in the requested context. * + * \nativedriversdisallowed + * * A particular thread may hold at most one portset handle. By * extension, this means that a portset implementation may not * re-acquire a portset handle, and may not acquire a new portset handle @@ -1091,6 +1135,8 @@ VMK_ReturnStatus vmk_PortsetAcquireByVDSID(const char *vdsID, * * \brief Release a handle to a portset. * + * \nativedriversdisallowed + * * This function should only be called on handles that have been * explicitly acquired via vmk_PortsetAcquire(). * @@ -1115,8 +1161,10 @@ void vmk_PortsetRelease(vmk_Portset **ps); * * \brief Create a resource pool. * + * \nativedriversdisallowed + * * \note This function will not block. - * + * * \param[in] psName Portset name. * \param[in] poolName Pool name. * \param[out] poolID Resource pool identifier @@ -1140,6 +1188,8 @@ VMK_ReturnStatus vmk_PortsetAddResPool(const char *psName, * * \brief Remove a resource pool. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] poolID Resource pool identifier @@ -1159,6 +1209,8 @@ VMK_ReturnStatus vmk_PortsetRemoveResPool(vmk_PortsetResPoolID poolID); * * \brief Retrieve the tag. * + * \nativedriversdisallowed + * * Retrieves the tag of a given resource pool and increment its * associated users reference counter. * @@ -1180,6 +1232,8 @@ vmk_PortsetResPoolTag vmk_PortsetGetResPoolTag(vmk_PortsetResPoolID poolID); * * \brief Release the resource pool. * + * \nativedriversdisallowed + * * Releases the resource pool associated the given tag and decrement * the users reference counter. * @@ -1198,7 +1252,9 @@ VMK_ReturnStatus vmk_PortsetPutResPoolTag(vmk_PortsetResPoolTag poolTag); *********************************************************************** * vmk_PortsetPortApplyResPoolCfg -- */ /** * - * \brief Apply a resource pool configuration to a port. + * \brief Apply a resource pool configuration to a port. + * + * \nativedriversdisallowed * * Old configuraion if existing, is overwritten on success and may be * lost on failure. Values outside the range allowed by system max values @@ -1233,13 +1289,51 @@ VMK_ReturnStatus vmk_PortsetPortApplyResPoolCfg(vmk_SwitchPortID portID, vmk_PortsetResPoolID poolID, vmk_PortsetResPoolCfg *poolCfg); +/* + *********************************************************************** + * vmk_PortsetPortGetResPoolCfg -- */ /** + * + * \brief Get resource pool configuration that was applied on a port + * + * \nativedriversdisallowed + * + * \note Currently only supported on uplink port, future version + * might start supporting it on more port types. + * + * \note The caller must hold a mutable handle for the portset + * associated with the specified port. + * + * \note This function will not block. + * + * \param[in] portID Numeric ID of a virtual port. + * \param[in] poolID Pool ID of the aimed resource pool. + * \param[out] poolCfg Resource pool configuration. + * + * \retval VMK_OK The configuration has been + * applied. + * \retval VMK_NOT_FOUND The resource pool cannot be + * found. + * \retval VMK_NO_MEMORY Allocation failure. + * \retval VMK_BAD_PARAM Input params are not valid. + * \retval VMK_FAILURE Resource pool scheduling not + * activated on the port + * \retval VMK_PORTSET_HANDLE_NOT_MUTABLE The caller did not hold a + * mutable handle + * \retval VMK_NOT_SUPPORTED Port type is not supported. + *********************************************************************** + */ +VMK_ReturnStatus vmk_PortsetPortGetResPoolCfg(vmk_SwitchPortID portID, + vmk_PortsetResPoolID poolID, + vmk_PortsetResPoolCfg *poolCfg); /* *********************************************************************** * vmk_PortsetPortRemoveResPoolCfg -- */ /** * * \brief Remove a resource pool configuration from a port. * + * \nativedriversdisallowed + * * \note Currently only supported on uplink port, future version * might start supporting it on more port types. * @@ -1273,6 +1367,8 @@ VMK_ReturnStatus vmk_PortsetPortRemoveResPoolCfg(vmk_SwitchPortID portID, * * \brief Get resource pool stats. * + * \nativedriversdisallowed + * * \note Currently only supported on uplink port, future version * might start supporting it on more port types. * @@ -1307,6 +1403,8 @@ VMK_ReturnStatus vmk_PortsetPortGetResPoolStats(vmk_SwitchPortID portID, * * \brief Activate resource pools scheduling on portset. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Mutable portset handle. @@ -1330,6 +1428,8 @@ VMK_ReturnStatus vmk_PortsetActivateResPoolsSched(vmk_Portset *ps); * \brief Deactivate resource pools scheduling on portset. Applied * resource pools configuration on the ports won't be persisted. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Mutable portset handle. @@ -1352,6 +1452,8 @@ VMK_ReturnStatus vmk_PortsetDeactivateResPoolsSched(vmk_Portset *ps); * * \brief Activate resource pools scheduling on a port. * + * \nativedriversdisallowed + * * \note Currently only supported on uplink port, future version * might start supporting it on more port types. * @@ -1382,6 +1484,8 @@ VMK_ReturnStatus vmk_PortsetPortActivateResPoolsSched(vmk_SwitchPortID portID); * * \brief Deactivate resource pools. * + * \nativedriversdisallowed + * * This function deactivates resource pools scheduling on a port. * Resource pools configuration on the port won't be persisted. * @@ -1415,8 +1519,10 @@ VMK_ReturnStatus vmk_PortsetPortDeactivateResPoolsSched(vmk_SwitchPortID portID) * * \brief Retrieve the number of ports in a portset. * + * \nativedriversdisallowed + * * \note This function will not block. - * + * * \param[in] ps Handle to a portset * * \retval vmk_uint32 Number of ports in portset, or 0 on @@ -1432,6 +1538,8 @@ vmk_uint32 vmk_PortsetSize(vmk_Portset *ps); * * \brief Send an event to notify the change of a portset property. * + * \nativedriversdisallowed + * * It is not required that all runtime property updates need accompanying * events, the guidelines to generate events should be - * 1) if there is a user visible screen for the property. @@ -1467,6 +1575,8 @@ VMK_ReturnStatus vmk_PortsetNotifyChange (vmk_Portset *ps, * * \brief Retrieve the index of a port in the portset. * + * \nativedriversdisallowed + * * \note The caller must hold a handle for the portset * associated with the specified port. * @@ -1490,6 +1600,8 @@ VMK_ReturnStatus vmk_PortsetPortIndex(vmk_SwitchPortID portID, * * \brief Retrieve the port in the portset given an index * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset. @@ -1513,6 +1625,8 @@ VMK_ReturnStatus vmk_PortsetGetPortFromIndex(vmk_Portset *ps, * * \brief Callback type for function called by vmk_PortsetForAllPorts. * + * \nativedriversdisallowed + * * \note The portset handle is the same one that was passed to * vmk_PortsetForAllPorts(). * @@ -1540,6 +1654,8 @@ typedef VMK_ReturnStatus vmk_PortFunction(vmk_Portset *ps, * * \brief Iterate over all in-use ports. * + * \nativedriversdisallowed + * * This function iterates over all in-use ports on the specified portset, * calling the specified function on each port. * @@ -1570,6 +1686,8 @@ VMK_ReturnStatus vmk_PortsetForAllPorts(vmk_Portset *ps, * * \brief Retrieve the portset name. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset @@ -1586,8 +1704,10 @@ char *vmk_PortsetName(vmk_Portset *ps); * * \brief Set per-portset private data * + * \nativedriversdisallowed + * * Only one private data can be set in each portset. - * + * * Any module using this API must destroy the private data and call * vmk_PortsetPrivDataSet to set portset private data to NULL, if * private data is no longer used (i.e. before setting a new privData, @@ -1616,6 +1736,8 @@ VMK_ReturnStatus vmk_PortsetPrivDataSet(vmk_Portset *ps, void *data); * * \brief Get per-portset private data * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset @@ -1632,8 +1754,10 @@ void *vmk_PortsetPrivDataGet(vmk_Portset *ps); * * \brief Set per-port private data. * + * \nativedriversdisallowed + * * Only one private data can be set on each port. - * + * * This API should be called during port reserve or connect time * (i.e. in portset callbacks). @@ -1676,6 +1800,8 @@ VMK_ReturnStatus vmk_PortPrivDataSet(vmk_SwitchPortID portID, void *data, * * \brief Get per-port private data * + * \nativedriversdisallowed + * * The caller must not cache private data or change its value without * proper synchronization. * @@ -1704,6 +1830,8 @@ VMK_ReturnStatus vmk_PortPrivDataGet(vmk_SwitchPortID portID, * * \brief Setup portset callbacks. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Mutable handle to a portset. @@ -1725,6 +1853,8 @@ VMK_ReturnStatus vmk_PortsetOpsSet(vmk_Portset *ps, * * \brief Register a portset class. * + * \nativedriversdisallowed + * * \note The caller must not hold any locks or portset handles. * * \note This function will not block. @@ -1747,6 +1877,8 @@ VMK_ReturnStatus vmk_PortsetClassRegister(char *psClass, * * \brief Register a portset class. * + * \nativedriversdisallowed + * * \note The caller must not hold any locks or portset handles. * * \note This function will not block. @@ -1766,10 +1898,12 @@ VMK_ReturnStatus vmk_PortsetClassUnregister(char *psClass); * * \brief Send a list of packets out of a port. * + * \nativedriversdisallowed + * * This function can be used when a portset sends packets to a port - * for transmission. This function is intended for internal use by - * portset only. Other clients within VMkernel have to use - * vmk_PortInput() to inject packets and it is the portsets' + * for transmission. This function is intended for internal use by + * portset only. Other clients within VMkernel have to use + * vmk_PortInput() to inject packets and it is the portsets' * responsibility to decide on which port packets will be sent out of. * * The VMkernel may apply further processing on packets (e.g. DVFilters) @@ -1822,6 +1956,8 @@ VMK_ReturnStatus vmk_PortOutput(vmk_SwitchPortID portID, * * \brief Send a list of packets into a port. * + * \nativedriversdisallowed + * * The input is from the portset's pespective. The function is used when * port client sends packets to portset. The packet list will be emptied * on success or failure. @@ -1852,6 +1988,8 @@ VMK_ReturnStatus vmk_PortInput(vmk_SwitchPortID portID, * * \brief Update ethernet frame routing policy. * + * \nativedriversdisallowed + * * This function may be used on ports that were created through the * vmk_PortsetConnectPort() API. It is used to inform the portset * implementation about the kind of ethernet packets, as specified in @@ -1884,6 +2022,8 @@ VMK_ReturnStatus vmk_PortUpdateEthFRP(vmk_SwitchPortID portID, * * \brief Query the VM UUID of the VM the port is attached to. * + * \nativedriversdisallowed + * * \note Please call vmk_VMUUIDGetMaxLength() to size the buffer * appropriately. * @@ -1921,6 +2061,8 @@ VMK_ReturnStatus vmk_PortGetVMUUID(vmk_SwitchPortID portID, * * \brief Claim hidden uplink devices. * + * \nativedriversdisallowed + * * Hidden uplink devices are uplink devices used by portset implementation * to perform I/O, but are not visible to management plane. * @@ -1928,7 +2070,7 @@ VMK_ReturnStatus vmk_PortGetVMUUID(vmk_SwitchPortID portID, * Vmkernel assumes that only one portset instance will claim hidden * uplinks. * - * \note Only hidden devices with VMK_UPLINK_CAP_UPT capability are + * \note Only hidden devices with VMK_PORT_CLIENT_CAP_UPT capability are * allowed to be claimed. This API is only for certain devices * that expose hidden uplinks to vmkernel. Regular * uplinks must be connected through the management. @@ -1956,16 +2098,44 @@ VMK_ReturnStatus vmk_PortGetVMUUID(vmk_SwitchPortID portID, VMK_ReturnStatus vmk_PortsetClaimHiddenUplink(vmk_Portset *ps, vmk_uint32 uplinkCap); +/* + *********************************************************************** + * vmk_PortIsHiddenUplink -- */ /** + * + * \brief Check if a port is connected to a Hidden Uplink. + * + * \nativedriversdisallowed + * + * \note The caller must hold a handle for the portset + * associated with the specified portID. + * + * \note This function will not block. + * + * \param[in] portID Port identifier + * \param[out] isHiddenUplink VMK_TRUE if this is a hidden uplink, + * otherwise VMK_FALSE. + * + * \retval VMK_OK Success. + * \retval VMK_BAD_PARAM isHiddenUplink is NULL. + * \retval VMK_NOT_FOUND Couldn't find a port with a matching + * port identifier. + * ********************************************************************* + */ +VMK_ReturnStatus vmk_PortIsHiddenUplink(vmk_SwitchPortID portID, + vmk_Bool *isHiddenUplink); + /* *********************************************************************** * vmk_PortsetFindUplinkPort -- */ /** * * \brief Find the first connected uplink port. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset - * \param[out] portID Numeric port ID of the uplink port. + * \param[out] portID Numeric port ID of the uplink port. * * \retval VMK_OK Success. * \retval VMK_NOT_FOUND No connected team uplink port. @@ -1983,6 +2153,8 @@ VMK_ReturnStatus vmk_PortsetFindUplinkPort(vmk_Portset *ps, * * \brief Get all uplinks connected to a portset * + * \nativedriversdisallowed + * * \note This function will not block. * * \note The caller should hold at least an immutable portset handle @@ -2014,6 +2186,8 @@ VMK_ReturnStatus vmk_PortsetGetUplinks(vmk_Portset *ps, * * \brief Reserve an internal management port. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Mutable handle to a portset @@ -2033,6 +2207,8 @@ VMK_ReturnStatus vmk_PortsetReserveMgmtPort(vmk_Portset *ps); * * \brief Retrieve the management port on a portset * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] ps Handle to a portset. @@ -2056,6 +2232,8 @@ VMK_ReturnStatus vmk_PortsetGetMgmtPort(vmk_Portset *ps, * * \brief Callback that is invoked upon reception of packets on a port. * + * \nativedriversdisallowed + * * The callback is free to perform any modification to the passed in * pktList and the packets contained within it. * @@ -2084,10 +2262,12 @@ typedef VMK_ReturnStatus (*vmk_PortsetPortRxFunc)(vmk_Portset *ps, * * \brief Connect a port to the given portset and enable the port. * + * \nativedriversdisallowed + * * The port starts enabled, but possibly blocked by the portset. The - * portset is free to block the port at any time. The portset is + * portset is free to block the port at any time. The portset is * expected to honor the ports configuration and forward frames that - * match the Frame Routing Policy (FRP) of the port. However, the + * match the Frame Routing Policy (FRP) of the port. However, the * portset MAY choose to not honor it to satisfy stricter security * policies. In the desire to improve interoperability, portsets * MUST offer a way to turn off such a stricter security policies. @@ -2143,10 +2323,12 @@ VMK_ReturnStatus vmk_PortsetConnectPort(vmk_Portset *ps, /* *********************************************************************** - * vmk_PortsetDisconnectPort -- */ /** + * vmk_PortsetDisconnectPort -- */ /** * * \brief Disonnect a port to the given portset. * + * \nativedriversdisallowed + * * This function may be used on ports that were created through the * vmk_PortsetConnectPort() API. It's typically called at VDS destroy time. * @@ -2171,6 +2353,8 @@ VMK_ReturnStatus vmk_PortsetDisconnectPort(vmk_SwitchPortID portID); * * \brief Get whether system service accounting is active. * + * \nativedriversdisallowed + * * \note This function will not block. * * \retval VMK_TRUE system service accounting is active @@ -2186,6 +2370,8 @@ vmk_Bool vmk_PortsetSchedSamplingActive(void); * * \brief Set the current port that is billed for Rx processing. * + * \nativedriversdisallowed + * * In order for Rx packet processing to be accounted properly, the portset * implementation must use this API to notify the scheduling subsystem * which port to bill for all the Rx processing. @@ -2224,6 +2410,8 @@ VMK_ReturnStatus vmk_PortsetSchedBillToPort(vmk_SwitchPortID portID, * * \brief Disallow I/O traffic through a port. * + * \nativedriversdisallowed + * * Portset implementations call this interface to stop traffic. * * \param[in] portID Numeric ID of a virtual port @@ -2249,6 +2437,8 @@ VMK_ReturnStatus vmk_PortBlock(vmk_SwitchPortID portID); * * \brief Allow I/O traffic through a port. * + * \nativedriversdisallowed + * * A port always starts blocked following portset creation. * Portset implementations call this interface when ready to * accept traffic. This applies to uplink ports as well as ports @@ -2277,6 +2467,8 @@ VMK_ReturnStatus vmk_PortUnblock(vmk_SwitchPortID portID); * * \brief Retrieve ethernet frame routing policy on a port. * + * \nativedriversdisallowed + * * \note The caller must hold a handle for the portset * associated with the specified portID. * @@ -2300,6 +2492,8 @@ VMK_ReturnStatus vmk_PortGetFRP(vmk_SwitchPortID portID, * * \brief Check if a port permit outgoing traffic. * + * \nativedriversdisallowed + * * \note The caller must hold a handle for the portset * associated with the specified portID. * @@ -2322,6 +2516,8 @@ VMK_ReturnStatus vmk_PortIsOutputActive(vmk_SwitchPortID portID, * * \brief Check if a port is connected to an uplink. * + * \nativedriversdisallowed + * * \note The caller must hold a handle for the portset * associated with the specified portID. * @@ -2347,6 +2543,8 @@ VMK_ReturnStatus vmk_PortIsUplink(vmk_SwitchPortID portID, * * \brief Get the underlying uplink of a port. * + * \nativedriversdisallowed + * * \note The caller must hold a mutable handle for the portset * associated with the specified portID. * @@ -2371,6 +2569,8 @@ VMK_ReturnStatus vmk_PortGetUplink(vmk_SwitchPortID portID, * * \brief Set link status of vNic connected to a port. * + * \nativedriversdisallowed + * * vNetwork admin may disable/enable a virtual port. When this * happens, the portset implementation calls this interface to * notify guest vNic that link is down and I/O traffic is no @@ -2400,6 +2600,8 @@ VMK_ReturnStatus vmk_PortLinkStatusSet(vmk_SwitchPortID portID, * * \brief Get name of the client connected to the port. * + * \nativedriversdisallowed + * * The client name string should be used for display and debugging * purposes only; it should not be parsed. The string is valid for the * lifetime of the ephemeral port. @@ -2433,6 +2635,8 @@ VMK_ReturnStatus vmk_PortClientNameGet(vmk_SwitchPortID portID, * * \brief Get fixed mac address of the client connected to the port. * + * \nativedriversdisallowed + * * Called from portset implementation to get VM's mac address assigned * by vSphere admin. The returned information is owned by framework * and remains valid while the port is connected. The VM cannot change @@ -2582,6 +2786,8 @@ typedef struct vmk_VDSPortsetClientOps { * * \brief Register VDS Portset property handlers. * + * \nativedriversdisallowed + * * \note At most one client may be registered for a given property (data * name) on a given portset * @@ -2625,6 +2831,8 @@ VMK_ReturnStatus vmk_VDSClientPortsetRegister(vmk_VDSPortsetClient *client, * * \brief Unregister VDS Portset property handlers. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] client Handle for VDS Portset Client @@ -2646,7 +2854,7 @@ typedef struct VDSPortClient *vmk_VDSPortClient; /* *********************************************************************** - * vmk_VDSPortClientWrite -- */ /** + * vmk_VDSClientPortWrite -- */ /** * * \brief Write callback for a port property of a VDS client. * @@ -2797,6 +3005,8 @@ typedef struct vmk_VDSPortClientOps { * * \brief Register Port Operations for a VDS Client. * + * \nativedriversdisallowed + * * \note At most one client may be registered for a given property * (data name) on a specified port and portset. * @@ -2821,6 +3031,30 @@ VMK_ReturnStatus vmk_VDSClientPortRegister(vmk_VDSPortClient *client, const char *dataName, const vmk_VDSPortClientOps *ops); +/* + *********************************************************************** + * vmk_VDSPortClientSetFlag -- */ /** + * + * \brief Set the flag for a DVSPortClient. + * + * \nativedriversdisallowed + * + * \note For now, a client can set a flag to indicate whether the client + * want the property to be pushed after the port is connected. + * + * \note This function will not block. + * + * \param[in] client The pointer which points to the handle for + * the VDS Port Client. + * \param[in] flag flag to be set. + * + * \retval VMK_OK Set successfully + * \retval VMK_BAD_PARAM invalid parameters passed + *********************************************************************** + */ + +VMK_ReturnStatus vmk_VDSPortClientSetFlag(vmk_VDSPortClient client, + vmk_VDSPortClientFlag flag); /* *********************************************************************** @@ -2828,6 +3062,8 @@ VMK_ReturnStatus vmk_VDSClientPortRegister(vmk_VDSPortClient *client, * * \brief Unregister a VDS Port Client. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] client Handle for VDS Port Client @@ -2845,6 +3081,8 @@ VMK_ReturnStatus vmk_VDSClientPortUnregister(vmk_VDSPortClient client); * * \brief Lookup a host property by name. * + * \nativedriversdisallowed + * * \note The caller must not hold any locks or portset handles. * * \note This function may block. @@ -2875,6 +3113,8 @@ VMK_ReturnStatus vmk_VDSHostPropLookup(const char *psName, * * \brief Set a host property (name, value) pair. * + * \nativedriversdisallowed + * * The property value to be set must not be NULL; dataLength should * not be zero; dataName should not be empty. To clean up property * value, use vmk_VDSHostPropClear. @@ -2910,61 +3150,65 @@ VMK_ReturnStatus vmk_VDSHostPropSet(const char *psName, vmk_uint32 dataLength); /* -*********************************************************************** -* vmk_VDSHostPropClear -- */ /** -* -* \brief Clear host property with specified data name -* -* \note This operation will call the VDS portset client's -* vmk_VDSPortsetClientClear() callback to clear the value of the -* property. If succeeds, the portset client for this property -* will be removed. -* -* \note The caller must not hold any locks or portset handles. -* -* \note This function may block. -* -* \param[in] psName Portset name. -* \param[in] dataName Name of the data item to clear -* -* \retval VMK_OK Success; the host property with dataName -* has been cleared -* \retval VMK_NOT_FOUND The switch or named data cannot be found. -* \retval VMK_BAD_PARAM The provided psName or dataName is -* invalid -*********************************************************************** -*/ + *********************************************************************** + * vmk_VDSHostPropClear -- */ /** + * + * \brief Clear host property with specified data name + * + * \nativedriversdisallowed + * + * \note This operation will call the VDS portset client's + * vmk_VDSPortsetClientClear() callback to clear the value of the + * property. If succeeds, the portset client for this property + * will be removed. + * + * \note The caller must not hold any locks or portset handles. + * + * \note This function may block. + * + * \param[in] psName Portset name. + * \param[in] dataName Name of the data item to clear + * + * \retval VMK_OK Success; the host property with dataName + * has been cleared + * \retval VMK_NOT_FOUND The switch or named data cannot be found. + * \retval VMK_BAD_PARAM The provided psName or dataName is + * invalid + *********************************************************************** + */ VMK_ReturnStatus vmk_VDSHostPropClear(const char *psName, const char *dataName); /* -*********************************************************************** -* vmk_VDSHostStatusSet -- *//** -* -* \brief Set VDS host status and display string. -* -* The display string will be copied inside the function, and the -* copied string will be propogated to Virtual Center in events. -* -* \note The caller must not hold any locks or portset handles. -* -* \note This function may block. -* -* \param[in] psName Portset name. -* \param[in] vdsStatus VDS Host status to be set -* \param[in] displayStr Detailed status string less than -* 256 characters -* -* \retval VMK_OK Success; the host status has been updated -* \retval VMK_NOT_FOUND VDS is not found -* \retval VMK_NAME_TOO_LONG displayStr is longer than 256 characters -* \retval VMK_FAILURE Failure; host status has not been updated -* \retval VMK_NO_MEMORY No memory -* \retval VMK_BAD_PARAM The provided psName or displayStr is -* invalid -*********************************************************************** -*/ + *********************************************************************** + * vmk_VDSHostStatusSet -- *//** + * + * \brief Set VDS host status and display string. + * + * \nativedriversdisallowed + * + * The display string will be copied inside the function, and the + * copied string will be propogated to Virtual Center in events. + * + * \note The caller must not hold any locks or portset handles. + * + * \note This function may block. + * + * \param[in] psName Portset name. + * \param[in] vdsStatus VDS Host status to be set + * \param[in] displayStr Detailed status string less than + * 256 characters + * + * \retval VMK_OK Success; the host status has been updated + * \retval VMK_NOT_FOUND VDS is not found + * \retval VMK_NAME_TOO_LONG displayStr is longer than 256 characters + * \retval VMK_FAILURE Failure; host status has not been updated + * \retval VMK_NO_MEMORY No memory + * \retval VMK_BAD_PARAM The provided psName or displayStr is + * invalid + *********************************************************************** + */ VMK_ReturnStatus vmk_VDSHostStatusSet(const char *psName, vmk_VDSHostStatus vdsStatus, const char *displayStr); @@ -2976,16 +3220,19 @@ VMK_ReturnStatus vmk_VDSHostStatusSet(const char *psName, * * \brief Get the value part of a specified port data (name, value) pair. * - * This operation will call the VDS Port Client's - * vmk_VDSClientPortPoll() callback to find out if there - * is new data to be read. If so, the client's - * vmk_VDSClientPortRead() callback will be called to - * obtain the new data. This new data will also be - * saved in a cache. If the poll operation reports - * that new data is not available, then the previously - * cached value will be returned. + * \nativedriversdisallowed * - * \note The caller must not hold any locks or portset handles. + * This operation will call the VDS Port Client's + * vmk_VDSClientPortPoll() callback to find out if there is new data to + * be read. If so, the client's vmk_VDSClientPortRead() callback will + * be called to obtain the new data. This new data will also be saved + * in a cache. If the poll operation reports that new data is not + * available, then the previously cached value will be returned. + * + * \note The caller must hold a mutable handle for the portset. + * + * \note Port data returned can be used safely only when mutable portset + * handle is held by caller. * * \note This function may block. * @@ -3020,13 +3267,15 @@ VMK_ReturnStatus vmk_VDSPortDataGet(vmk_SwitchPortID portID, * * \brief Set a port data (name, value) pair. * + * \nativedriversdisallowed + * * This operation will call the VDS Port Client's * vmk_VDSClientPortWrite() callback to set the value * of the property. If this succeeds, the value written * will also be saved in the cache. See the description * of vmk_VDSPortDataGet() and vmk_VDSPortDataClear(). * - * \note The caller must not hold any locks or portset handles. + * \note The caller must hold a mutable handle for the portset. * * \note This function may block. * @@ -3054,32 +3303,34 @@ VMK_ReturnStatus vmk_VDSPortDataSet(vmk_SwitchPortID portID, vmk_uint32 dataLength); /* -*********************************************************************** -* vmk_VDSPortDataClear -- */ /** -* -* \brief Set a port data (name, value) pair. -* -* This operation will call the VDS Port Client's -* vmk_VDSClientPortCleanup() callback to clean up the property. -* If this succeeds, the property data will be removed from cache, -* and port client will also be removed. -* -* \note The caller must not hold any locks or portset handles. -* -* \note This function may block. -* -* \param[in] portID Numeric ID of a virtual port. -* \param[in] dataName Name of port data -* -* \retval VMK_OK Success -* \retval VMK_BAD_PARAM The provided dataName is invalid -* \retval VMK_NOT_FOUND The specified port or named data cannot -* be found. -* \retval VMK_FAILURE vmk_VDSClientPortCleanup callback returns -* failure or other failure conditions -* \retval Other status vmk_VDSClientPortCleanup callback failed -*********************************************************************** -*/ + *********************************************************************** + * vmk_VDSPortDataClear -- */ /** + * + * \brief Set a port data (name, value) pair. + * + * \nativedriversdisallowed + * + * This operation will call the VDS Port Client's + * vmk_VDSClientPortCleanup() callback to clean up the property. + * If this succeeds, the property data will be removed from cache, + * and port client will also be removed. + * + * \note The caller must hold a mutable handle for the portset. + * + * \note This function may block. + * + * \param[in] portID Numeric ID of a virtual port. + * \param[in] dataName Name of port data + * + * \retval VMK_OK Success + * \retval VMK_BAD_PARAM The provided dataName is invalid + * \retval VMK_NOT_FOUND The specified port or named data cannot + * be found. + * \retval VMK_FAILURE vmk_VDSClientPortCleanup callback returns + * failure or other failure conditions + * \retval Other status vmk_VDSClientPortCleanup callback failed + *********************************************************************** + */ VMK_ReturnStatus vmk_VDSPortDataClear(vmk_SwitchPortID portID, const char *dataName); @@ -3089,6 +3340,8 @@ VMK_ReturnStatus vmk_VDSPortDataClear(vmk_SwitchPortID portID, * * \brief Set port data in vDS host local cache. * + * \nativedriversdisallowed + * * This API should be called during port reserve or connect * time (i.e. in portset callbacks) in order to seed port property * value. @@ -3129,6 +3382,8 @@ VMK_ReturnStatus vmk_VDSLocalCachePortDataSet(vmk_SwitchPortID portID, * * \brief Get port data value from vDS host local cache. * + * \nativedriversdisallowed + * * \note This operation will not call property client (i.e. * vmk_VDSClientPortRead()). * @@ -3159,10 +3414,12 @@ VMK_ReturnStatus vmk_VDSLocalCachePortDataGet(vmk_SwitchPortID portID, /* *********************************************************************** - * vmk_PortLookupVDSPortAlias -- *//** + * vmk_PortLookupVDSPortAlias -- */ /** * * \brief Retrieves the vDS port alias for the specified ephemeral port. * + * \nativedriversdisallowed + * * \note The port alias string is constant for the lifetime of the * ephemeral port. * @@ -3197,10 +3454,12 @@ VMK_ReturnStatus vmk_PortLookupVDSPortAlias(vmk_SwitchPortID portID, /* *********************************************************************** - * vmk_PortLookupVDSPortID -- *//** + * vmk_PortLookupVDSPortID -- */ /** * * \brief Retrieves the vDS port ID for the specified ephemeral port. * + * \nativedriversdisallowed + * * \note The port ID string is constant for the lifetime of the * ephemeral port. * @@ -3231,10 +3490,12 @@ VMK_ReturnStatus vmk_PortLookupVDSPortID(vmk_SwitchPortID portID, /* *********************************************************************** - * vmk_PortsetLookupVDSID -- *//** + * vmk_PortsetLookupVDSID -- */ /** * * \brief Retrieves the vDS switch ID for the specified portset. * + * \nativedriversdisallowed + * * \note The vDS switch ID is constant for the lifetime of the portset. * * \note The caller must provide a buffer that is VMK_VDS_ID_MAX_LEN @@ -3259,10 +3520,12 @@ VMK_ReturnStatus vmk_PortsetLookupVDSID(vmk_Portset *ps, /* *********************************************************************** - * vmk_PortsetLookupVDSName -- *//** + * vmk_PortsetLookupVDSName -- */ /** * * \brief Retrieves the vDS switch name for the specified portset. * + * \nativedriversdisallowed + * * \note The vDS switch name is constant for the lifetime of the * portset. * @@ -3294,10 +3557,12 @@ VMK_ReturnStatus vmk_PortsetLookupVDSName(vmk_Portset *ps, /* *********************************************************************** - * vmk_PortsetLookupVDSClassName -- *//** + * vmk_PortsetLookupVDSClassName -- */ /** * * \brief Retrieves the vDS switch class name for the specified portset. * + * \nativedriversdisallowed + * * \note The vDS class name is constant for the lifetime of the portset. * * \note The caller provide a buffer that is VMK_VDS_CLASS_NAME_MAX_LEN @@ -3325,10 +3590,12 @@ VMK_ReturnStatus vmk_PortsetLookupVDSClassName(vmk_Portset *ps, /* *********************************************************************** - * vmk_PortFindByVDSPortID -- *//** + * vmk_PortFindByVDSPortID -- */ /** * * \brief Retrieves the numeric port identifier for the ephemeral port. * + * \nativedriversdisallowed + * * \note The caller must not hold any locks or portset handles. * * \note The function will not block. @@ -3353,10 +3620,12 @@ VMK_ReturnStatus vmk_PortFindByVDSPortID(const char *vdsID, /* *********************************************************************** - * vmk_PortsetFindByVDSID -- *//** + * vmk_PortsetFindByVDSID -- */ /** * * \brief Retrieves the name of the portset. * + * \nativedriversdisallowed + * * \note The caller must provide a buffer that is VMK_PORTSET_NAME_MAX * bytes in length. * @@ -3384,6 +3653,8 @@ VMK_ReturnStatus vmk_PortsetFindByVDSID(const char *vdsID, * * \brief Check DCB support on the device connected to a vDS port. * + * \nativedriversdisallowed + * * \note This function may block. No locks should be held while calling * this function. * @@ -3413,6 +3684,8 @@ VMK_ReturnStatus vmk_PortDCBIsDCBEnabled(vmk_SwitchPortID portID, * * \brief Get Traffic Classes from the device connected to a vDS port. * + * \nativedriversdisallowed + * * \note This function may block. No locks should be held while calling * this function. * @@ -3439,6 +3712,8 @@ VMK_ReturnStatus vmk_PortDCBGetNumTCs(vmk_SwitchPortID portID, * * \brief Get DCB Priority Group from the device connected to a vDS port. * + * \nativedriversdisallowed + * * \note This function may block. No locks should be held while calling * this function. * \note Currently only supported on uplink port. @@ -3464,6 +3739,8 @@ VMK_ReturnStatus vmk_PortDCBGetPriorityGroup(vmk_SwitchPortID portID, * * \brief Retrieve Priority-based Flow Control configurations. * + * \nativedriversdisallowed + * * Get Priority-based Flow Control configurations from the device connected * to a vDS port. * @@ -3495,6 +3772,8 @@ VMK_ReturnStatus vmk_PortDCBGetPFCCfg(vmk_SwitchPortID portID, * * \brief Check if Priority-based Flow Control support is enabled. * + * \nativedriversdisallowed + * * \note This function may block. No locks should be held while calling * this function. * @@ -3521,6 +3800,8 @@ VMK_ReturnStatus vmk_PortDCBIsPFCEnabled(vmk_SwitchPortID portID, * * \brief Retrieve all DCB Application Protocols settings. * + * \nativedriversdisallowed + * * Get DCB Application Protocol settings from the device connected * to a vDS port. * @@ -3551,6 +3832,8 @@ VMK_ReturnStatus vmk_PortDCBGetApplications(vmk_SwitchPortID portID, * * \brief Retrieve DCB capabilities information. * + * \nativedriversdisallowed + * * Get DCB capabilities from the device connected to a vDS port. * * \note This function may block. No locks should be held while calling @@ -3579,6 +3862,8 @@ VMK_ReturnStatus vmk_PortDCBGetCapabilities(vmk_SwitchPortID portID, * * \brief Register vDS command execution handler. * + * \nativedriversdisallowed + * * \note At most one client may be registered for a given command name. * * This operation allows a module to register a command callback into vDS. @@ -3614,6 +3899,8 @@ VMK_ReturnStatus vmk_VDSClientCmdRegister(vmk_VDSCmdClient *client, * * \brief Unregister vDS Command handler. * + * \nativedriversdisallowed + * * \note This function will not block. * * \param[in] client Handle for vDS Command Client @@ -3636,6 +3923,8 @@ VMK_ReturnStatus vmk_VDSClientCmdUnregister(vmk_VDSCmdClient client); * will be displayed by vCenter if the relevant event description * file is registered via the VIM API. * + * \nativedriversdisallowed + * * \note The caller must hold an immutable handle for the portset. * * \note Modules should control the rate of event posting to avoid @@ -3676,6 +3965,8 @@ VMK_ReturnStatus vmk_VDSEventExPost(vmk_Portset *ps, * will be displayed by vCenter if the relevant event description * file is registered via the VIM API. * + * \nativedriversdisallowed + * * \note The caller must hold an immutable handle for the portset * that the port is connected to. * diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_prop.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_prop.h index d395774..94148ed 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_prop.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_prop.h @@ -152,6 +152,8 @@ #define VMK_VDSPROP_PORT_STATISTICS "com.vmware.common.port.statistics" #define VMK_VDSPROP_PORT_ALIAS "com.vmware.common.port.alias" #define VMK_VDSPROP_PORT_CONNECTID "com.vmware.common.port.connectid" +#define VMK_VDSPROP_PORT_VNIC_CONNECTEE "com.vmware.common.port.vnicConnectee" +#define VMK_VDSPROP_PORT_VMKNIC_VLANID "com.vmware.common.port.vmknicVlanID" #define VMK_VDSPROP_PORT_PORTGROUP "com.vmware.common.port.portgroupid" #define VMK_VDSPROP_PORT_BLOCK "com.vmware.common.port.block" #define VMK_VDSPROP_PORT_LINK_STATUS "com.vmware.common.port.linkstatus" diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_respools.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_respools.h index b2f28d1..d332521 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_respools.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vds/vmkapi_vds_respools.h @@ -73,6 +73,15 @@ typedef vmk_int32 vmk_PortsetResPoolLimit; */ typedef vmk_int32 vmk_PortsetResPoolQueueDepth; +/** + * \brief Reservation associated to a resource pool. + * + * This Reservation, expressed in Mbps, represents the minimum + * capacity reserved for a given resource pool for packets queuing + * purposes. + */ +typedef vmk_int32 vmk_PortsetResPoolReservation; + /** * \brief 802.1p Priority tag associated to a resource pool. * @@ -117,6 +126,8 @@ typedef struct vmk_PortsetResPoolCfg { vmk_PortsetResPoolShares shares; /** Limit */ vmk_PortsetResPoolLimit limit; + /** Reservation */ + vmk_PortsetResPoolReservation reservation; /** 802.1p Priotiy */ vmk_PortsetResPoolPriorityTag pTag; /** Buffer depth */ diff --git a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vmkapi.h b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vmkapi.h index 69002ce..aded762 100644 --- a/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vmkapi.h +++ b/BLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release/vmkapi.h @@ -19,19 +19,6 @@ extern "C" { /** \cond never */ -/* - * Basic include checks - */ -#define INCLUDE_ALLOW_VMKERNEL -#define INCLUDE_ALLOW_VMK_MODULE -#define INCLUDE_ALLOW_DISTRIBUTE -#define INCLUDE_ALLOW_MODULE -#define INCLUDE_ALLOW_VMKDRIVERS -#define INCLUDE_ALLOW_VMCORE - -#define INCLUDE_ALLOW_USERLEVEL -#include "includeCheck.h" - /* * Determine if we're compiling in user mode or kernel mode */ @@ -63,10 +50,12 @@ extern "C" { #define VMK_DEVKIT_HAS_API_VMKAPI_NMP #define VMK_DEVKIT_HAS_API_VMKAPI_NPIV #define VMK_DEVKIT_HAS_API_VMKAPI_VDS +#define VMK_DEVKIT_HAS_API_VMKAPI_VFLASH #define VMK_DEVKIT_HAS_API_VMKAPI_EXPERIMENTAL #define VMK_DEVKIT_USES_PUBLIC_APIS #define VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS #define VMK_DEVKIT_USES_PRIVATE_APIS +#define VMK_DEVKIT_USES_DEPRECATED_APIS /* plus other (e.g. binary-incompatible) vmkapis */ #ifdef VMK_ENABLE_ALL_VMKAPIS #define VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS @@ -74,6 +63,16 @@ extern "C" { #endif #endif + +#ifdef VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS +#pragma message "WARNING: VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS enabled. The resulting binary will not be compatible with future vSphere versions!" +#endif + +#ifdef VMK_DEVKIT_USES_DEPRECATED_APIS +#pragma message "WARNING: VMK_DEVKIT_USES_DEPRECATED_APIS enabled. This module is using deprecated interfaces that may be removed in future API releases!" +#endif + + /* * Allow vmkapi headers to be included when pulled in from * this header only. All other cases should cause an error. @@ -110,14 +109,20 @@ extern "C" { #include "base/vmkapi_module_types.h" #include "base/vmkapi_assert.h" #include "lib/vmkapi_list.h" +#include "lib/vmkapi_name.h" +#include "base/vmkapi_mgmt_types.h" +#endif + +#if defined(VMK_BUILDING_FOR_USER_MODE) +#include "base/vmkapi_mgmt_lib.h" #endif #if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "core/vmkapi_cpu.h" #include "platform/vmkapi_platform.h" #include "platform/x86/vmkapi_pagetable.h" #include "lib/vmkapi_lib.h" #include "lib/vmkapi_bits.h" -#include "lib/vmkapi_name.h" #include "lib/vmkapi_libc.h" #include "core/vmkapi_memdefs.h" #include "lib/vmkapi_parse.h" @@ -125,9 +130,7 @@ extern "C" { #include "lib/vmkapi_slist.h" #include "lib/vmkapi_cslist.h" #include "lib/vmkapi_string.h" -#include "core/vmkapi_bus.h" -#include "core/vmkapi_device.h" -#include "core/vmkapi_driver.h" +#include "core/vmkapi_device_types.h" #include "platform/x86/vmkapi_ioport_types.h" #include "platform/x86/vmkapi_ioresource.h" #include "platform/x86/vmkapi_ioport.h" @@ -136,20 +139,24 @@ extern "C" { #include "core/vmkapi_mapping.h" #include "core/vmkapi_mempool.h" #include "base/vmkapi_heap.h" +#include "core/vmkapi_bus.h" +#include "core/vmkapi_device.h" +#include "core/vmkapi_driver.h" +#include "core/vmkapi_logical_bus.h" #include "core/vmkapi_scatter_gather.h" #include "core/vmkapi_dma.h" -#include "core/vmkapi_user.h" #include "core/vmkapi_lock_domain.h" #include "core/vmkapi_spinlock.h" #include "base/vmkapi_platform.h" #include "base/vmkapi_atomic.h" +#include "base/vmkapi_versioned_atomic.h" #include "base/vmkapi_world.h" +#include "core/vmkapi_user.h" #include "core/vmkapi_accounting.h" #include "base/vmkapi_char.h" #include "base/vmkapi_config.h" #include "base/vmkapi_helper.h" #include "base/vmkapi_logging.h" -#include "core/vmkapi_cpu.h" #include "core/vmkapi_pcpustorage.h" #include "base/vmkapi_sem.h" #include "base/vmkapi_slab.h" @@ -157,13 +164,33 @@ extern "C" { #include "base/vmkapi_system.h" #include "base/vmkapi_time.h" #include "base/vmkapi_module.h" +#include "base/vmkapi_mgmt.h" #include "core/vmkapi_worldstorage.h" #include "system_health/vmkapi_system_health.h" #include "system_health/vmkapi_vob.h" #include "core/vmkapi_vmuuid.h" #include "lib/vmkapi_hash.h" -#endif +#include "lib/vmkapi_priq.h" +#include "core/vmkapi_dump.h" +#include "core/vmkapi_pageslab.h" +#include "lib/vmkapi_bitvector.h" +#if !defined(VMK_DEVKIT_HAS_NATIVE_DDK) +#include "base/vmkapi_char_legacy.h" +#endif + +#endif +#endif + +#if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ + defined(VMK_DEVKIT_USES_DEPRECATED_APIS) + +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) + +#include "core/vmkapi_spinlock_deprecated.h" +#include "base/vmkapi_world_deprecated.h" + +#endif #endif @@ -171,27 +198,33 @@ extern "C" { defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) + +#include "base/vmkapi_module_incompat.h" +#include "platform/vmkapi_platform_incompat.h" + +#if !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #include "base/vmkapi_lock.h" #include "core/vmkapi_bh.h" +#include "core/vmkapi_bus_incompat.h" #include "core/vmkapi_context_incompat.h" #include "core/vmkapi_cpu_incompat.h" #include "core/vmkapi_dma_incompat.h" #include "base/vmkapi_worldlet.h" #include "base/vmkapi_entropy.h" #include "base/vmkapi_proc.h" -#include "base/vmkapi_module_incompat.h" #include "base/vmkapi_time_incompat.h" #include "core/vmkapi_affinitymask_incompat.h" #include "base/vmkapi_world_incompat.h" #include "base/vmkapi_heap_incompat.h" -#include "core/vmkapi_user_incompat.h" +#include "core/vmkapi_pageslab_incompat.h" +#include "core/vmkapi_preempt_incompat.h" +#endif #endif #endif #if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) && \ - !defined(VMK_DEVKIT_HAS_NATIVE_DDK) + defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "core/vmkapi_nmi.h" @@ -199,6 +232,15 @@ extern "C" { #endif +#if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "core/vmkapi_device_incompat.h" +#endif + +#endif + #endif /* @@ -214,42 +256,29 @@ extern "C" { #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "device/vmkapi_pci_types.h" #include "device/vmkapi_vector_types.h" +#include "device/vmkapi_psa_types.h" +#include "device/vmkapi_pci.h" +#include "device/vmkapi_vector.h" #endif #endif #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "device/vmkapi_acpi.h" #include "device/vmkapi_isa.h" #include "device/vmkapi_input.h" -#include "device/vmkapi_pci.h" -#include "device/vmkapi_vector.h" +#include "device/vmkapi_pci_incompat.h" +#include "device/vmkapi_vector_incompat.h" #endif #endif #endif -/* - * Native Device Driver Kit - */ -#if defined(VMK_DEVKIT_HAS_NATIVE_DDK) && \ - defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) && \ - defined(VMK_DEVKIT_USES_PRIVATE_APIS) - -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) -#include "core/vmkapi_bh.h" -#include "device/vmkapi_pci.h" -#include "device/vmkapi_vector.h" -#endif - -#endif - - - /* * DVFilter */ @@ -258,7 +287,8 @@ extern "C" { #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK)) #include "dvfilter/vmkapi_dvfilter.h" #endif @@ -275,13 +305,15 @@ extern "C" { defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) -#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ - defined(VMK_BUILDING_FOR_USER_MODE)) +#if ((defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ + defined(VMK_BUILDING_FOR_USER_MODE)) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK)) #include "vds/vmkapi_vds_respools.h" #include "vds/vmkapi_vds_prop.h" #endif -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK)) #include "vds/vmkapi_vds_ether.h" #include "vds/vmkapi_vds_portset.h" #include "vds/vmkapi_vds_port.h" @@ -290,16 +322,6 @@ extern "C" { #endif -#if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) - -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ - defined(VMK_BUILDING_FOR_USER_MODE) -#include "vds/vmkapi_vds_lacp_incompat.h" -#endif - -#endif - #if defined(VMK_DEVKIT_USES_VDS_PRIVATE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) @@ -309,21 +331,14 @@ extern "C" { #endif -#if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) - -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) -#include "vds/vmkapi_vds_port_priv.h" -#endif - -#endif - #if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "vds/vmkapi_vds_iochain_incompat.h" #include "vds/vmkapi_vds_lldp.h" +#include "vds/vmkapi_vds_port_priv.h" +#include "vds/vmkapi_vds_port_incompat.h" #endif #endif @@ -344,23 +359,43 @@ extern "C" { #include "net/vmkapi_net_pktlist.h" #include "net/vmkapi_net_pt.h" #include "net/vmkapi_net_dcb.h" +#include "net/vmkapi_net_poll.h" #include "net/vmkapi_net_vlan.h" +#include "net/vmkapi_net_queue.h" +#include "net/vmkapi_net_csum.h" +#include "net/vmkapi_net_dump.h" #include "net/vmkapi_net_uplink.h" +#include "net/vmkapi_net_pkt_header.h" +#include "net/vmkapi_net_port.h" +#include "net/vmkapi_net_portset.h" + +#if !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #include "net/vmkapi_net_portset_message.h" #endif #endif +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ + defined(VMK_BUILDING_FOR_USER_MODE)) +#include "net/vmkapi_net_proto.h" +#endif + +#endif + #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) -#include "net/vmkapi_net_poll.h" -#include "net/vmkapi_net_netqueue.h" +#include "net/vmkapi_net_queue_incompat.h" #include "net/vmkapi_net_uplink_incompat.h" +#include "net/vmkapi_net_shaper_incompat.h" #include "net/vmkapi_net_pkt_incompat.h" -#include "net/vmkapi_net_netdebug.h" -#include "net/vmkapi_net_portset_message_incompat.h" +#include "net/vmkapi_net_pkt_capture.h" +#include "net/vmkapi_net_dcb_incompat.h" +#include "net/vmkapi_net_opaque_network_incompat.h" +#include "net/vmkapi_net_tcpip_incompat.h" +#include "net/vmkapi_net_port_incompat.h" +#include "net/vmkapi_net_portset_incompat.h" #endif #endif @@ -368,14 +403,18 @@ extern "C" { #if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "net/vmkapi_net_overlay.h" +#include "net/vmkapi_net_portset_message_incompat.h" +#include "net/vmkapi_net_event_incompat.h" +#include "net/vmkapi_net_utils_incompat.h" +#include "net/vmkapi_net_vnic_incompat.h" +#include "net/vmkapi_net_tcpip_priv_incompat.h" +#endif + #if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ defined(VMK_BUILDING_FOR_USER_MODE)) #include "net/vmkapi_net_overlay_ext.h" -#include "net/vmkapi_net_proto.h" -#endif - -#if defined(VMK_BUILDING_FOR_KERNEL_MODE) -#include "net/vmkapi_net_overlay.h" #endif #endif @@ -416,7 +455,11 @@ extern "C" { defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) + +#if !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #include "sockets/vmkapi_socket.h" +#endif + #include "sockets/vmkapi_socket_ip.h" #endif @@ -433,6 +476,14 @@ extern "C" { #endif +#if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "sockets/vmkapi_socket_priv_incompat.h" +#endif + +#endif #endif @@ -454,12 +505,14 @@ extern "C" { #include "scsi/vmkapi_scsi_mgmt_types.h" #include "scsi/vmkapi_scsi_device.h" #include "scsi/vmkapi_scsi_vmware.h" +#include "scsi/vmkapi_scsi_iodm.h" #endif #endif #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) && \ + !defined(VMK_DEVKIT_HAS_NATIVE_DDK) #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "scsi/vmkapi_scsi_incompat.h" @@ -527,13 +580,22 @@ extern "C" { #ifdef VMK_DEVKIT_HAS_API_VMKAPI_NPIV #if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ - defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + defined(VMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS) #if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ defined(VMK_BUILDING_FOR_USER_MODE)) #include "npiv/vmkapi_npiv_wwn.h" #endif +#if defined(VMK_BUILDING_FOR_KERNEL_MODE) +#include "npiv/vmkapi_scsi_vport.h" +#endif + +#endif + +#if defined(VMK_DEVKIT_USES_PUBLIC_APIS) && \ + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + #if defined(VMK_BUILDING_FOR_KERNEL_MODE) #include "npiv/vmkapi_npiv.h" #endif @@ -542,6 +604,27 @@ extern "C" { #endif +/* + * VFLASH + */ +#ifdef VMK_DEVKIT_HAS_API_VMKAPI_VFLASH + +#if defined(VMK_DEVKIT_USES_PRIVATE_APIS) && \ + defined(VMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS) + +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE) || \ + defined(VMK_BUILDING_FOR_USER_MODE)) + +#if (defined(VMK_BUILDING_FOR_KERNEL_MODE)) +#include "vflash/vmkapi_vflash.h" +#endif +#include "vflash/vmkapi_vflash_types.h" +#endif + +#endif + +#endif + /* * Experimental */ @@ -594,7 +677,7 @@ extern "C" { */ /** \cond never */ #define VMKAPI_REVISION_MAJOR 2 -#define VMKAPI_REVISION_MINOR 1 +#define VMKAPI_REVISION_MINOR 2 #define VMKAPI_REVISION_UPDATE 0 #define VMKAPI_REVISION_PATCH_LEVEL 0 diff --git a/BLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release/includeCheck.h b/BLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release/includeCheck.h deleted file mode 100644 index e080f1a..0000000 --- a/BLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release/includeCheck.h +++ /dev/null @@ -1,103 +0,0 @@ -/* ********************************************************** - * Copyright 1998 VMware, Inc. All rights reserved. -- VMware Confidential - * **********************************************************/ - -/* - * includeCheck.h -- - * - * Restrict include file use. - * - * In every .h file, define one or more of these - * - * INCLUDE_ALLOW_VMX - * INCLUDE_ALLOW_USERLEVEL - * INCLUDE_ALLOW_VMCORE - * INCLUDE_ALLOW_MODULE - * INCLUDE_ALLOW_VMKERNEL - * INCLUDE_ALLOW_DISTRIBUTE - * INCLUDE_ALLOW_VMK_MODULE - * INCLUDE_ALLOW_VMKDRIVERS - * INCLUDE_ALLOW_VMIROM - * - * Then include this file. - * - * Any file that has INCLUDE_ALLOW_DISTRIBUTE defined will potentially - * be distributed in source form along with GPLed code. Ensure - * that this is acceptable. - */ - - -/* - * Declare a VMCORE-only variable to help classify object - * files. The variable goes in the common block and does - * not create multiple definition link-time conflicts. - */ - -#if defined VMCORE && defined VMX86_DEVEL && defined VMX86_DEBUG && \ - defined linux && !defined MODULE && \ - !defined COMPILED_WITH_VMCORE -#define COMPILED_WITH_VMCORE compiled_with_vmcore -#ifdef ASM - .comm compiled_with_vmcore, 0 -#else - asm(".comm compiled_with_vmcore, 0"); -#endif /* ASM */ -#endif - - -#if defined VMCORE && \ - !(defined VMX86_VMX || defined VMM || \ - defined MONITOR_APP || defined VMMON) -#error "Makefile problem: VMCORE without VMX86_VMX or \ - VMM or MONITOR_APP or MODULE." -#endif - -#if defined VMCORE && !defined INCLUDE_ALLOW_VMCORE -#error "The surrounding include file is not allowed in vmcore." -#endif -#undef INCLUDE_ALLOW_VMCORE - -#if defined VMX86_VMX && !defined VMCORE && \ - !(defined INCLUDE_ALLOW_VMX || defined INCLUDE_ALLOW_USERLEVEL) -#error "The surrounding include file is not allowed in the VMX." -#endif -#undef INCLUDE_ALLOW_VMX - -#if defined USERLEVEL && !defined VMX86_VMX && !defined VMCORE && \ - !defined INCLUDE_ALLOW_USERLEVEL -#error "The surrounding include file is not allowed at userlevel." -#endif -#undef INCLUDE_ALLOW_USERLEVEL - -#if defined MODULE && !defined VMKERNEL_MODULE && \ - !defined VMMON && !defined INCLUDE_ALLOW_MODULE -#error "The surrounding include file is not allowed in driver modules." -#endif -#undef INCLUDE_ALLOW_MODULE - -#if defined VMMON && !defined INCLUDE_ALLOW_VMMON -#error "The surrounding include file is not allowed in vmmon." -#endif -#undef INCLUDE_ALLOW_VMMON - -#if defined VMKERNEL && !defined INCLUDE_ALLOW_VMKERNEL -#error "The surrounding include file is not allowed in the vmkernel." -#endif -#undef INCLUDE_ALLOW_VMKERNEL - -#if defined GPLED_CODE && !defined INCLUDE_ALLOW_DISTRIBUTE -#error "The surrounding include file is not allowed in GPL code." -#endif -#undef INCLUDE_ALLOW_DISTRIBUTE - -#if defined VMKERNEL_MODULE && !defined VMKERNEL && \ - !defined INCLUDE_ALLOW_VMK_MODULE && !defined INCLUDE_ALLOW_VMKDRIVERS -#error "The surrounding include file is not allowed in vmkernel modules." -#endif -#undef INCLUDE_ALLOW_VMK_MODULE -#undef INCLUDE_ALLOW_VMKDRIVERS - -#if defined VMIROM && ! defined INCLUDE_ALLOW_VMIROM -#error "The surrounding include file is not allowed in vmirom." -#endif -#undef INCLUDE_ALLOW_VMIROM diff --git a/BLD/build/version/buildNumber.h b/BLD/build/version/buildNumber.h index 62059e2..c3ae9ed 100644 --- a/BLD/build/version/buildNumber.h +++ b/BLD/build/version/buildNumber.h @@ -1,6 +1,6 @@ -#define BUILD_NUMBER "build-1479583" -#define BUILD_NUMBER_NUMERIC 1479583 -#define BUILD_NUMBER_NUMERIC_STRING "1479583" -#define PRODUCT_BUILD_NUMBER "product-build-1545" -#define PRODUCT_BUILD_NUMBER_NUMERIC 1545 -#define PRODUCT_BUILD_NUMBER_NUMERIC_STRING "1545" +#define BUILD_NUMBER "build-1604073" +#define BUILD_NUMBER_NUMERIC 1604073 +#define BUILD_NUMBER_NUMERIC_STRING "1604073" +#define PRODUCT_BUILD_NUMBER "product-build-4509" +#define PRODUCT_BUILD_NUMBER_NUMERIC 4509 +#define PRODUCT_BUILD_NUMBER_NUMERIC_STRING "4509" diff --git a/BUILD.txt b/BUILD.txt index 03cb055..013b225 100644 --- a/BUILD.txt +++ b/BUILD.txt @@ -1,16 +1,24 @@ -Required system packages: +The following assumes the files disclosed for this package have been +copied to the directory "/usr/vmware/src", and any commands that need to +be executed for the disclosure should be executed from this directory +on a "centos-5.3-x64" system (see the file "SYSTEMS.txt" for definition +of this system). - grep sed findutils coreutils +This package should be built on a "centos-5.3-x64" system. Please see the +"System Configurations" document for a definition of the configuration +of this system type. -These packages are required to be built and installed in their sub-directories, -in this order, as 'root' (see BUILD.txt in each sub-directory): +To build this package please execute the following commands: - glibc-2.3.2-95.44 - binutils-2.17.50.0.15-modcall - gcc-4.1.2-9 +tar xzf vmkdrivers-gpl.tgz +sh ./build-vmkdrivers.sh +mv collect-drivers.sh BLD/build/collect-drivers.sh +cd BLD/build +./collect-drivers.sh -As 'root', build the vmkdrivers-gpl: +If you would like to verify the installation of this package, please +create the binary disclosure file for this package using the command: -1) tar xzf vmkdrivers-gpl.tgz +tar cvf /usr/vmware/src/centos-5.3-x64.tar -C /usr/vmware/src/BLD/build drivers -C /usr/vmware/src update-drivers.sh -2) chmod +x build-vmkdrivers.sh && ./build-vmkdrivers.sh +This file is used in the installation instructions. diff --git a/INSTALL.txt b/INSTALL.txt index ced3955..b277d68 100644 --- a/INSTALL.txt +++ b/INSTALL.txt @@ -1,75 +1,19 @@ -Enable ssh on ESXi (on console: F2, then Troubleshooting Options) +The installation of this package should be performed on an ESXi server. +This server should have SSH access enabled: Customize System/View Logs -> +Troubleshooting Options -> Enable SSH - # copy the tarball, for example: - scp drivers.tar.gz 10.116.87.213:/vmfs/volumes/datastore1/. +To install the package create a working directory on a datastore on the +ESXi server, e.g., "/vmfs/volumes/Storage1/install" and copy the binary +disclosure created by the build: - # ssh into ESXi, for example: - ssh 10.116.87.213 +scp centos-5.3-x64.tar root@esx.example.org:/vmfs/volumes/Storage1/install/centos-5.3-x64.tar - # cd to datastore and extract drivers - cd /vmfs/volumes/datastore1/. - tar xzvf drivers.tar.gz +On the ESXi host, verify the shipped version: -The next steps for updating the drivers are performed by the script install.sh -distributed in this directory. Run it after extracting the drivers above. -This script will iterate over the packaged drivers on ESXi and replace the -contents with the recompiled ones. - -The install.sh script performs the following steps: - -* Make a temporary directory in /vmfs/volumes/datastore1/ and go to it - - mkdir –p /vmfs/volumes/datastore1/temp - cd /vmfs/volumes/datastore1/temp - -* Search for the locations of the current drivers in /vmfs/volumes - - find /vmfs/volumes/ -name "*.v0*" - -* For each driver found - - * Copy the driver into the temporary directory - - cp /vmfs/volumes// . - - - * Use vmtar to extract a tar file - - vmtar -x -o .tar - - * Create another temporary directory and Untar the file into that directory - - mkdir driver_temp - cd driver_temp - tar xvf ../.tar - - * In the extracted output there will be a directory usr/lib/vmware/vmkmod. - If there are any files in the directory /vmfs/volumes/datastore1/with the - same name copy these files over. If not go to the final clean up step as - there are no OSS drivers to update. - - cp ../../drivers/ usr/lib/vmware/vmkmod/ - - * Tar the updated directory - - tar cvf .. /.tar - - * Go up one directory and Vmtar the new tar file - - vmtar -c .tar –o .new.tar - - * Zip up the file new vm tar file - - gzip < .new.tar > .v00 - - - * Copy the driver back to its original location - - cp .v00 /vmfs/volumes// - - - * Delete everything in this directory - - rm -rf * +Replace the shipped version with the custom build: +cd /vmfs/volumes/Storage1/install +tar xf centos-5.3-x64.tar +./update-drivers.sh +Reboot the system to load the updated drivers. diff --git a/bora/vmkernel/distribute/push-hidden.h b/bora/vmkernel/distribute/push-hidden.h deleted file mode 100644 index b3ceb07..0000000 --- a/bora/vmkernel/distribute/push-hidden.h +++ /dev/null @@ -1,14 +0,0 @@ -/* ********************************************************** - * Copyright 2008 VMware, Inc. All rights reserved. -- VMware Confidential - * **********************************************************/ - -/* - * GCC program to ensure nothing shows up in GOT/PLT - */ - -#ifndef _PUSH_HIDDEN_H -#define _PUSH_HIDDEN_H - -#pragma GCC visibility push(hidden) - -#endif diff --git a/build-vmkdrivers.sh b/build-vmkdrivers.sh old mode 100644 new mode 100755 index 14f16fb..8de22df --- a/build-vmkdrivers.sh +++ b/build-vmkdrivers.sh @@ -1,14 +1,17 @@ #!/bin/sh -# Use gcc version 4.1.2-9 +# Use gcc version 4.4.3-2 # Below is the internal VMWare location. Please change as required for your # installed location. -CC=/build/toolchain/lin32/gcc-4.1.2-9/bin/x86_64-linux-gcc +CC=/build/toolchain/lin32/gcc-4.4.3-2/bin/x86_64-linux5.0-gcc -# Use ld from binutils-2.17.50.0.15-modcall +# Use ld from binutils-2.20.1-1 # Below is the internal VMWare location. Please change as required for your # installed location. -LD=/build/toolchain/lin32/binutils-2.17.50.0.15-modcall/bin/x86_64-linux-ld +LD=/build/toolchain/lin32/binutils-2.20.1-1/bin/x86_64-linux5.0-ld + +# PR# 976913 requested that OSS binaries be stripped of debug +LD_OPTS=--strip-debug # Use GNU grep 2.5.1 GREP=grep @@ -20,540 +23,600 @@ XARGS=xargs MKDIR=mkdir # Create output directories -$GREP -v -e "SED" build-vmkdrivers.sh \ +$GREP -v -e "SED" build-*.sh \ | $GREP -o -e "-o [^ ]*\." \ | $SED -e 's?-o \(.*\)/[^/]*\.?\1?' \ | $GREP -v -e "\*" \ | $XARGS $MKDIR -p # Compiler flags assume being compiled natively on a x86-64 machine -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_nvm.o vmkdrivers/src_9/drivers/net/e1000e/e1000_nvm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/commsup.o vmkdrivers/src_9/drivers/scsi/aacraid2/commsup.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptspi\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptscsih.o vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptscsih.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/comminit.o vmkdrivers/src_9/drivers/scsi/aacraid2/comminit.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_tag_map.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_tag_map.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_dbg.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_dbg.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm_pci.o vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm_pci.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_iocb.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_iocb.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_init.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_init.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_mbox\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_VERSION=\"2.20.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"1.9.1d.v50.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2i -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_hwi.o vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_hwi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBLOCK_DRIVER -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"cciss\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cciss -DLINUX_MODULE_HEAP_INITIAL=1024*256 -DLINUX_MODULE_HEAP_MAX=1024*1024*10 -DLINUX_MODULE_HEAP_NAME=vmklnx_cciss -DLINUX_MODULE_VERSION=\"3.6.14\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/block/cciss -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/block -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cciss-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/block/cciss/cciss.o vmkdrivers/src_9/drivers/block/cciss/cciss.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_ioctl.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_ioctl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/aachba.o vmkdrivers/src_9/drivers/scsi/aacraid2/aachba.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -w -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT 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-Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_drv.o vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_drv.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_ich8lan.o vmkdrivers/src_9/drivers/net/e1000e/e1000_ich8lan.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2300_fw.o vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2300_fw.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2400_fw.o vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2400_fw.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82542.o vmkdrivers/src_9/drivers/net/e1000/e1000_82542.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_vport.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_vport.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/netdev.o vmkdrivers/src_9/drivers/net/e1000e/netdev.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_pdc2027x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_pdc2027x -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_pdc2027x -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_pdc2027x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_pdc2027x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_scsi.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_scsi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_nv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_nv -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_nv -DLINUX_MODULE_VERSION=\"3.5\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_nv -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_nv.o vmkdrivers/src_9/drivers/ata/sata_nv.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nxhal.o vmkdrivers/src_9/drivers/net/nx_nic/nxhal.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_kcompat.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_kcompat.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"hpsa\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hpsa -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hpsa -DLINUX_MODULE_VERSION=\"5.0.0\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/hpsa -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/hpsa/hpsa.o vmkdrivers/src_9/drivers/scsi/hpsa/hpsa.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -w -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"vmxnet3\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmxnet3 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_vmxnet3 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.3.0\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/vmxnet3 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_nl.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_nl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"10.00.00.00\" -DMODULE -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_scsih.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_scsih.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"10.00.00.00\" -DMODULE -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptspi\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.o vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"cnic_register\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cnic_register -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=16*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_cnic_register -DLINUX_MODULE_VERSION=\"1.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic_register -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cnic_register-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_promise\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_promise -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_promise -DLINUX_MODULE_VERSION=\"2.12\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_promise -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"1.9.1d.v50.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2i -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_sysfs.o vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_sysfs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"10.00.00.00\" -DMODULE -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_transport.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_transport.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_intr.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_intr.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/char/openipmi/includes -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debug_ioctl.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debug_ioctl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82598.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82598.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_ethtool.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_phy.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_phy.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_serverworks\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_serverworks -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_serverworks -DLINUX_MODULE_VERSION=\"0.4.3\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_serverworks -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_pexq.o vmkdrivers/src_9/drivers/net/nx_nic/nx_pexq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"1.9.1d.v50.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2i -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_manage.o vmkdrivers/src_9/drivers/net/e1000e/e1000_manage.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_mac.o vmkdrivers/src_9/drivers/net/e1000/e1000_mac.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/kcompat.o vmkdrivers/src_9/drivers/net/e1000e/kcompat.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_mbox\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_VERSION=\"2.20.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mbox.o vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mbox.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_devintf\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_devintf -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_devintf -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_devintf -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_hash_table.o vmkdrivers/src_9/drivers/net/nx_nic/nx_hash_table.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dbg.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dbg.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_osm.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_osm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_api.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_api.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_dbg.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_dbg.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_fcoe.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_fcoe.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2100_fw.o vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2100_fw.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_promise\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_promise -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_promise -DLINUX_MODULE_VERSION=\"2.12\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_promise -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_promise.o vmkdrivers/src_9/drivers/ata/sata_promise.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ahci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ahci -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ahci -DLINUX_MODULE_VERSION=\"3.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ahci -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_R8168_NAPI -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"r8168\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_r8168 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_r8168 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.013.00\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/r8168 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/r8168/r8168_n.o vmkdrivers/src_9/drivers/net/r8168/r8168_n.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mbox.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mbox.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_x540.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_x540.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ata_piix\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ata_piix -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ata_piix -DLINUX_MODULE_VERSION=\"2.12\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ata_piix -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_init.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_init.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_scsi.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_scsi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_iocb.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_iocb.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_hpt3x2n\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_hpt3x2n -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_hpt3x2n -DLINUX_MODULE_VERSION=\"0.3.4\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_hpt3x2n -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_cmd64x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_cmd64x -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_cmd64x -DLINUX_MODULE_VERSION=\"0.2.5\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_cmd64x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_cmd64x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/ethtool.o vmkdrivers/src_9/drivers/net/e1000e/ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_mbx.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_mbx.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/kcompat_ethtool.o vmkdrivers/src_9/drivers/net/e1000/kcompat_ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_isr.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_isr.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_proc.o vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_proc.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_mac.o vmkdrivers/src_9/drivers/net/e1000e/e1000_mac.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82540.o vmkdrivers/src_9/drivers/net/e1000/e1000_82540.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/niu.o vmkdrivers/src_9/drivers/net/nx_nic/niu.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82598.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82598.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/param.o vmkdrivers/src_9/drivers/net/e1000e/param.c -$LD -r -o BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/sata_promise --whole-archive BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_promise.o BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_svw\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_svw -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_svw -DLINUX_MODULE_VERSION=\"2.3\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_svw -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_svw.o vmkdrivers/src_9/drivers/ata/sata_svw.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptsas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm.o vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_main.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_main.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"cnic_register\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cnic_register -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=16*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_cnic_register -DLINUX_MODULE_VERSION=\"1.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic_register -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cnic_register-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.o vmkdrivers/src_9/drivers/net/bnx2/cnic_register.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_api.o vmkdrivers/src_9/drivers/net/e1000/e1000_api.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wno-sign-compare -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"random\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_random -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_random -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/random -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/random/halfmd4.o vmkdrivers/src_9/drivers/char/random/halfmd4.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptspi\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=1 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptspi/mptspi.o vmkdrivers/src_9/drivers/scsi/mpt/mptspi/mptspi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCNIC_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_BOOL -DKBUILD_MODNAME=\"cnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cnic -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_cnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.10.2j.v50.7\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/cnic.o vmkdrivers/src_9/drivers/net/bnx2/cnic.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptsas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.o vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_amd\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_amd -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_amd -DLINUX_MODULE_VERSION=\"0.3.10\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_amd -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_lro.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_lro.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_msghandler\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_msghandler -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_msghandler -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_msghandler -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=40*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_VERSION=\"5.34\" -DLP6000 -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMKLNX_VMKSGARRAY_SUPPORTED -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid_sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/linit.o vmkdrivers/src_9/drivers/scsi/aacraid2/linit.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"10.00.00.00\" -DMODULE -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_config.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_config.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptspi\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.o vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debugfs.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debugfs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sdtest_ioctl.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sdtest_ioctl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ct.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ct.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq_copy.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq_copy.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sli.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sli.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_R8169_NAPI -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"r8169\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_r8169 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_r8169 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"6.011.00\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/r8169 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-r8169-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/r8169/r8169_n.o vmkdrivers/src_9/drivers/net/r8169/r8169_n.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/kcompat_ethtool.o vmkdrivers/src_9/drivers/net/ixgbe/kcompat_ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_nx.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_nx.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mid.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mid.c -$LD -r -o BLD/build/vmkdriver-cnic_register-CUR/release/vmkernel64/cnic_register --whole-archive BLD/build/vmkdriver-cnic_register-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.o BLD/build/vmkdriver-cnic_register-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nxhal_v34.o vmkdrivers/src_9/drivers/net/nx_nic/nxhal_v34.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2_INBOX=1 -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_BOOL=1 -DKBUILD_MODNAME=\"bnx2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2 -DLINUX_MODULE_HEAP_DMA_WIDTH=40 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.0.15g.v50.11\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/bnx2.o vmkdrivers/src_9/drivers/net/bnx2/bnx2.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/dpcsup.o vmkdrivers/src_9/drivers/scsi/aacraid2/dpcsup.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_nic_vmk.o vmkdrivers/src_9/drivers/net/nx_nic/nx_nic_vmk.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_msghandler\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_msghandler -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_msghandler -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_msghandler -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_security.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_security.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_mbox\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_VERSION=\"2.20.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mm.o vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_attrs.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_attrs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_inioct.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_inioct.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_seq.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_seq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_pci.o vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_pci.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82599.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82599.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=40*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_VERSION=\"5.34\" -DLP6000 -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMKLNX_VMKSGARRAY_SUPPORTED -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid_sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas.o vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptspi\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_nportdisc.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_nportdisc.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"10.00.00.00\" -DMODULE -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_ctl.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_ctl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mbx.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mbx.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/commctrl.o vmkdrivers/src_9/drivers/scsi/aacraid2/commctrl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"1.9.1d.v50.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2i -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_iscsi.o vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_iscsi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82599.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82599.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_hbaapi_ioctl.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_hbaapi_ioctl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_isr.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_isr.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_sil\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_sil -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_sil -DLINUX_MODULE_VERSION=\"2.3\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_main.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_main.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_nv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_nv -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_nv -DLINUX_MODULE_VERSION=\"3.5\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_nv -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_pdc2027x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_pdc2027x -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_pdc2027x -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_pdc2027x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_pdc2027x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_pdc2027x.o vmkdrivers/src_9/drivers/ata/pata_pdc2027x.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_ethtool.o vmkdrivers/src_9/drivers/net/e1000/e1000_ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_rq.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_rq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/rkt.o vmkdrivers/src_9/drivers/scsi/aacraid2/rkt.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_amd\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_amd -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_amd -DLINUX_MODULE_VERSION=\"0.3.10\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_amd -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_amd.o vmkdrivers/src_9/drivers/ata/pata_amd.c -$LD -r -o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/megaraid_mbox --whole-archive BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mm.o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mbox.o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_vmdq.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_vmdq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_sil24\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_sil24 -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_sil24 -DLINUX_MODULE_VERSION=\"1.1\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil24 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_sil24.o vmkdrivers/src_9/drivers/ata/sata_sil24.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/kcompat_ethtool.o vmkdrivers/src_9/drivers/net/e1000e/kcompat_ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_atiixp\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_atiixp -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_atiixp -DLINUX_MODULE_VERSION=\"0.4.6\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_atiixp -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_atiixp.o vmkdrivers/src_9/drivers/ata/pata_atiixp.c -$LD -r -o BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/sata_nv --whole-archive BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_nv.o BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptsas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.o vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_sil680\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_sil680 -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_sil680 -DLINUX_MODULE_VERSION=\"0.4.8\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_sil680 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_hwi.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_hwi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_els.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_els.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_res.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_res.c -$LD -r -o BLD/build/vmkdriver-pata_pdc2027x-CUR/release/vmkernel64/pata_pdc2027x --whole-archive BLD/build/vmkdriver-pata_pdc2027x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_pdc2027x.o BLD/build/vmkdriver-pata_pdc2027x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/kcompat.o vmkdrivers/src_9/drivers/net/ixgbe/kcompat.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mgmt.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mgmt.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"10.00.00.00\" -DMODULE -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_base.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_base.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2322_fw.o vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2322_fw.c -$LD -r -o BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/pata_amd --whole-archive BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_amd.o BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_common.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_common.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb.c -$LD -r -o BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/ipmi_msghandler --whole-archive BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.o BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_snmp.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_snmp.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -w -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"vmxnet3\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmxnet3 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_vmxnet3 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.3.0\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/vmxnet3 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_ethtool.o vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid2 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid2 -DLINUX_MODULE_VERSION=\"2.00.4\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid2/megaraid.o vmkdrivers/src_9/drivers/scsi/megaraid2/megaraid.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wno-sign-compare -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"random\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_random -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_random -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/random -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dump.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dump.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/csmi.o vmkdrivers/src_9/drivers/scsi/aacraid2/csmi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_sup.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_sup.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptsas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptscsih.o vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptscsih.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wno-sign-compare -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"random\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_random -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_random -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/random -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/random/random.o vmkdrivers/src_9/drivers/char/random/random.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/nark.o vmkdrivers/src_9/drivers/scsi/aacraid2/nark.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_discover.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_discover.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/char/openipmi/includes -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_nvram.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_nvram.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_os.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_os.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/rx.o vmkdrivers/src_9/drivers/scsi/aacraid2/rx.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/char/openipmi/includes -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_main.o vmkdrivers/src_9/drivers/net/e1000/e1000_main.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_atiixp\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_atiixp -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_atiixp -DLINUX_MODULE_VERSION=\"0.4.6\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_atiixp -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_phy.o vmkdrivers/src_9/drivers/net/e1000e/e1000_phy.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_devintf\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_devintf -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_devintf -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_devintf -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/kcompat.o vmkdrivers/src_9/drivers/net/e1000/kcompat.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_os.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_os.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_ioctl.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_ioctl.c -$LD -r -o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/vmxnet3 --whole-archive BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_drv.o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_ethtool.o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_82571.o vmkdrivers/src_9/drivers/net/e1000e/e1000_82571.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_nvm.o vmkdrivers/src_9/drivers/net/e1000/e1000_nvm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wno-sign-compare -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"random\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_random -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_random -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/random -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/random/sha1.o vmkdrivers/src_9/drivers/char/random/sha1.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_cmd64x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_cmd64x -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_cmd64x -DLINUX_MODULE_VERSION=\"0.2.5\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_cmd64x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_cmd64x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_cmd64x.o vmkdrivers/src_9/drivers/ata/pata_cmd64x.c -$LD -r -o BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/pata_atiixp --whole-archive BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_atiixp.o BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_sil\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_sil -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_sil -DLINUX_MODULE_VERSION=\"2.3\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_sil.o vmkdrivers/src_9/drivers/ata/sata_sil.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_sata.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_sata.c -$LD -r -o BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/ipmi_devintf --whole-archive BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.o BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_dev.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_dev.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/char/openipmi/includes -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/mptspi --whole-archive BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptscsih.o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptspi/mptspi.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_R8168_NAPI -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"r8168\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_r8168 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_r8168 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.013.00\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/r8168 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_via\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_via -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_via -DLINUX_MODULE_VERSION=\"0.3.3\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_via -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2500_fw.o vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2500_fw.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_sil680\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_sil680 -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_sil680 -DLINUX_MODULE_VERSION=\"0.4.8\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_sil680 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_sil680.o vmkdrivers/src_9/drivers/ata/pata_sil680.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_procfs.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_procfs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_R8168_NAPI -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"r8168\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_r8168 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_r8168 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.013.00\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/r8168 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/r8168/rtl_eeprom.o vmkdrivers/src_9/drivers/net/r8168/rtl_eeprom.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid2 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid2 -DLINUX_MODULE_VERSION=\"2.00.4\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/mpt2sas --whole-archive BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_base.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_config.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_ctl.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_scsih.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_transport.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-random-CUR/release/vmkernel64/random --whole-archive BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/random/random.o BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/random/halfmd4.o BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/random/sha1.o BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_gs.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_gs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ips\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ips -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=10*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ips -DLINUX_MODULE_VERSION=\"7.12.05\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/ips -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ips-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/ips/ips.o vmkdrivers/src_9/drivers/scsi/ips/ips.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ips\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ips -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=10*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ips -DLINUX_MODULE_VERSION=\"7.12.05\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/ips -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ips-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_tool.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_tool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2200_fw.o vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2200_fw.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_hpt3x2n\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_hpt3x2n -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_hpt3x2n -DLINUX_MODULE_VERSION=\"0.3.4\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_hpt3x2n -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_hpt3x2n.o vmkdrivers/src_9/drivers/ata/pata_hpt3x2n.c -$LD -r -o BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/sata_sil --whole-archive BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_sil.o BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_R8169_NAPI -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"r8169\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_r8169 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_r8169 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"6.011.00\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/r8169 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-r8169-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-pata_cmd64x-CUR/release/vmkernel64/pata_cmd64x --whole-archive BLD/build/vmkdriver-pata_cmd64x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_cmd64x.o BLD/build/vmkdriver-pata_cmd64x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_mem_pool.o vmkdrivers/src_9/drivers/net/nx_nic/nx_mem_pool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_fcs.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_fcs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_xioct.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_xioct.c -$LD -r -o BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/megaraid2 --whole-archive BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid2/megaraid.o BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/pata_sil680 --whole-archive BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_sil680.o BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_isr.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_isr.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/xge_mdio.o vmkdrivers/src_9/drivers/net/nx_nic/xge_mdio.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/char/openipmi/includes -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ahci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ahci -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ahci -DLINUX_MODULE_VERSION=\"3.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ahci -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/ahci.o vmkdrivers/src_9/drivers/ata/ahci.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_manage.o vmkdrivers/src_9/drivers/net/e1000/e1000_manage.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_init.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_init.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.o vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"1.9.1d.v50.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2i -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_init.o vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_init.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_init.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_init.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/sa.o vmkdrivers/src_9/drivers/scsi/aacraid2/sa.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_param.o vmkdrivers/src_9/drivers/net/e1000/e1000_param.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2_INBOX=1 -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_BOOL=1 -DKBUILD_MODNAME=\"bnx2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2 -DLINUX_MODULE_HEAP_DMA_WIDTH=40 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.0.15g.v50.11\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/pata_hpt3x2n --whole-archive BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_hpt3x2n.o BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_via\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_via -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_via -DLINUX_MODULE_VERSION=\"0.3.3\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_via -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_via.o vmkdrivers/src_9/drivers/ata/pata_via.c -$LD -r -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/ipmi_si_drv --whole-archive BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-r8169-CUR/release/vmkernel64/r8169 --whole-archive BLD/build/vmkdriver-r8169-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/r8169/r8169_n.o BLD/build/vmkdriver-r8169-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_serverworks\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_serverworks -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_serverworks -DLINUX_MODULE_VERSION=\"0.4.3\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_serverworks -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_serverworks.o vmkdrivers/src_9/drivers/ata/pata_serverworks.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.3\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_cq.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_cq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"hpsa\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hpsa -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hpsa -DLINUX_MODULE_VERSION=\"5.0.0\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/hpsa -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ata_piix\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ata_piix -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ata_piix -DLINUX_MODULE_VERSION=\"2.12\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ata_piix -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/ata_piix.o vmkdrivers/src_9/drivers/ata/ata_piix.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptsas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=1 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptsas/mptsas.o vmkdrivers/src_9/drivers/scsi/mpt/mptsas/mptsas.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=40*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_VERSION=\"5.34\" -DLP6000 -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMKLNX_VMKSGARRAY_SUPPORTED -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid_sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fp.o vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fp.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBLOCK_DRIVER -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"cciss\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cciss -DLINUX_MODULE_HEAP_INITIAL=1024*256 -DLINUX_MODULE_HEAP_MAX=1024*1024*10 -DLINUX_MODULE_HEAP_NAME=vmklnx_cciss -DLINUX_MODULE_VERSION=\"3.6.14\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/block/cciss -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/block -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cciss-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ioctl.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ioctl.c -$LD -r -o BLD/build/vmkdriver-bnx2-CUR/release/vmkernel64/bnx2 --whole-archive BLD/build/vmkdriver-bnx2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/bnx2.o BLD/build/vmkdriver-bnx2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82541.o vmkdrivers/src_9/drivers/net/e1000/e1000_82541.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82543.o vmkdrivers/src_9/drivers/net/e1000/e1000_82543.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_menlo.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_menlo.c -$LD -r -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/e1000e --whole-archive BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_82571.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_ich8lan.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_mac.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_manage.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_nvm.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_phy.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/ethtool.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/kcompat.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/kcompat_ethtool.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/netdev.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/param.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/pata_serverworks --whole-archive BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_serverworks.o BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_attr.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_attr.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e2.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e2.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES 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BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_iscsi.o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_hwi.o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_sysfs.o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/ahci --whole-archive BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/ahci.o BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/pata_via --whole-archive BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_via.o BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET 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-DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_mbx.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_mbx.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_auth_access.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_auth_access.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_phy.o vmkdrivers/src_9/drivers/net/e1000/e1000_phy.c -$LD -r -o BLD/build/vmkdriver-ips-CUR/release/vmkernel64/ips --whole-archive BLD/build/vmkdriver-ips-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/ips/ips.o BLD/build/vmkdriver-ips-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=40*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_VERSION=\"5.34\" -DLP6000 -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMKLNX_VMKSGARRAY_SUPPORTED -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid_sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fusion.o vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fusion.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_procfs.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_procfs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCNIC_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_BOOL -DKBUILD_MODNAME=\"cnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cnic -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_cnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.10.2j.v50.7\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=50000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_auth.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_auth.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_sil24\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_sil24 -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_sil24 -DLINUX_MODULE_VERSION=\"1.1\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil24 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_core.o vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_core.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_ethtool.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_ethtool.c -$LD -r -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/adp94xx --whole-archive BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_discover.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_osm.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_hwi.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_seq.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_ioctl.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_sata.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/fnic --whole-archive BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_attrs.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_fcs.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_isr.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_kcompat.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_main.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_res.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_scsi.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_tag_map.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_procfs.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_cq.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_dev.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_intr.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_rq.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq_copy.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/hpsa --whole-archive BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/hpsa/hpsa.o BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.0.558\" -DMODULE -DNET_DRIVER -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_hw.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_hw.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mem.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mem.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_hbadisc.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_hbadisc.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_attr.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_attr.c -$LD -r -o BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/ata_piix --whole-archive BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/ata_piix.o BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_NO_TX_NAPI -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.6iov\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.c -$LD -r -o BLD/build/vmkdriver-cciss-CUR/release/vmkernel64/cciss --whole-archive BLD/build/vmkdriver-cciss-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/block/cciss/cciss.o BLD/build/vmkdriver-cciss-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_R8168_NAPI -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"r8168\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_r8168 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_r8168 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.013.00\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/r8168 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/r8168/r8168_asf.o vmkdrivers/src_9/drivers/net/r8168/r8168_asf.c -$LD -r -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/aacraid --whole-archive BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/aachba.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/commctrl.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/comminit.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/commsup.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/csmi.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/dpcsup.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/rkt.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/rx.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/linit.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/sa.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/nark.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_svw\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_svw -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_svw -DLINUX_MODULE_VERSION=\"2.3\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_svw -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2x\" -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=100*1024*1024 -DLINUX_MODULE_VERSION=\"1.61.15.v50.3\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=51000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/sata_sil24 --whole-archive BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_sil24.o BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/cnic --whole-archive BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/cnic.o BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/qla4xxx --whole-archive BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_dbg.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_init.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_iocb.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_isr.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_mbx.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_nvram.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_os.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dbg.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dump.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_ioctl.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_os.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/ixgbe --whole-archive BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82598.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82599.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_x540.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_api.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_common.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82598.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82599.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_nl.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_ethtool.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_fcoe.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_mbx.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_phy.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_vmdq.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/kcompat.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/kcompat_ethtool.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/bnx2x --whole-archive BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e2.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/lpfc820 --whole-archive BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_attr.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_auth_access.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_auth.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ct.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debugfs.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_els.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_hbadisc.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_init.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ioctl.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mbox.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mem.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_nportdisc.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_scsi.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_security.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sli.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_vport.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_menlo.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debug_ioctl.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_hbaapi_ioctl.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sdtest_ioctl.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mgmt.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/r8168 --whole-archive BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/r8168/r8168_n.o BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/r8168/r8168_asf.o BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/r8168/rtl_eeprom.o BLD/build/vmkdriver-r8168-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/qla2xxx --whole-archive BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2100_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2200_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2300_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2322_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2400_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2500_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_attr.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_dbg.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_gs.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_inioct.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_init.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_iocb.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_isr.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mbx.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mid.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_os.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_sup.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_xioct.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_nx.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/nx_nic --whole-archive BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_hw.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_main.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_init.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_ethtool.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_lro.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_procfs.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_snmp.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_tool.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_nic_vmk.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nxhal.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nxhal_v34.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_mem_pool.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_hash_table.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/xge_mdio.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/niu.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_pexq.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/mptsas --whole-archive BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptscsih.o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptsas/mptsas.o -$LD -r -o BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/sata_svw --whole-archive BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_svw.o BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/e1000 --whole-archive BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82540.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82541.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82542.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82543.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_api.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_ethtool.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_mac.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_main.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_manage.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_nvm.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_param.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_phy.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/kcompat.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/kcompat_ethtool.o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/megaraid_sas --whole-archive BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fusion.o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas.o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fp.o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_main.o vmkdrivers/src_9/drivers/net/enic/enic_main.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_upt.o vmkdrivers/src_9/drivers/net/enic/enic_upt.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_res.o vmkdrivers/src_9/drivers/net/enic/enic_res.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_dev.o vmkdrivers/src_9/drivers/net/enic/vnic_dev.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_wq.o vmkdrivers/src_9/drivers/net/enic/vnic_wq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_rq.o vmkdrivers/src_9/drivers/net/enic/vnic_rq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_cq.o vmkdrivers/src_9/drivers/net/enic/vnic_cq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_intr.o vmkdrivers/src_9/drivers/net/enic/vnic_intr.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_vic.o vmkdrivers/src_9/drivers/net/enic/vnic_vic.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FORCEDETH_NAPI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"forcedeth\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_forcedeth -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_forcedeth -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"0.61\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/forcedeth -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.o vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FORCEDETH_NAPI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"forcedeth\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_forcedeth -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_forcedeth -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"0.61\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/forcedeth -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"sky2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sky2 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_sky2 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.20\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/sky2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sky2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/sky2/bitrev.o vmkdrivers/src_9/drivers/net/sky2/bitrev.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"sky2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sky2 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_sky2 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.20\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/sky2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sky2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/sky2/sky2.o vmkdrivers/src_9/drivers/net/sky2/sky2.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"sky2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sky2 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_sky2 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.20\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/sky2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sky2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"tg3\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_tg3 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_tg3 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.110h.v50.4\" -DMODULE -DNET_DRIVER -DTG3_INBOX -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/tg3 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/tg3/tg3.o vmkdrivers/src_9/drivers/net/tg3/tg3.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"tg3\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_tg3 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_tg3 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.110h.v50.4\" -DMODULE -DNET_DRIVER -DTG3_INBOX -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/tg3 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_82575.o vmkdrivers/src_9/drivers/net/igb/e1000_82575.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_api.o vmkdrivers/src_9/drivers/net/igb/e1000_api.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_mac.o vmkdrivers/src_9/drivers/net/igb/e1000_mac.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_manage.o vmkdrivers/src_9/drivers/net/igb/e1000_manage.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_nvm.o vmkdrivers/src_9/drivers/net/igb/e1000_nvm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_phy.o vmkdrivers/src_9/drivers/net/igb/e1000_phy.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_ethtool.o vmkdrivers/src_9/drivers/net/igb/igb_ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_main.o vmkdrivers/src_9/drivers/net/igb/igb_main.c -$LD -r -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/enic --whole-archive BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_main.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_upt.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_res.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_dev.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_wq.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_rq.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_cq.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_intr.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_vic.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/aic79xx --whole-archive BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_core.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm_pci.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_pci.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_proc.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmkplexer\" -DMODULE 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BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/vmkplexer.o vmkdrivers/vmkplexer/src/vmkplexer.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmkplexer\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK 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-fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET 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BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/kcompat_ethtool.o vmkdrivers/src_9/drivers/net/igb/kcompat_ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_mbx.o vmkdrivers/src_9/drivers/net/igb/e1000_mbx.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"s2io\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_s2io -DLINUX_MODULE_HEAP_INITIAL=10*1024*1024 -DLINUX_MODULE_HEAP_MAX=40*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_s2io -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.4.13427\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/s2io -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-s2io-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/s2io/s2io.o vmkdrivers/src_9/drivers/net/s2io/s2io.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"s2io\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_s2io -DLINUX_MODULE_HEAP_INITIAL=10*1024*1024 -DLINUX_MODULE_HEAP_MAX=40*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_s2io -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.4.13427\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/s2io -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-s2io-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hcd-pci.o vmkdrivers/src_92/drivers/usb/core/hcd-pci.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/buffer.o vmkdrivers/src_92/drivers/usb/core/buffer.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/config.o vmkdrivers/src_92/drivers/usb/core/config.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/devices.o vmkdrivers/src_92/drivers/usb/core/devices.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/devio.o vmkdrivers/src_92/drivers/usb/core/devio.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/driver.o vmkdrivers/src_92/drivers/usb/core/driver.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/generic.o vmkdrivers/src_92/drivers/usb/core/generic.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hcd.o vmkdrivers/src_92/drivers/usb/core/hcd.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hub.o vmkdrivers/src_92/drivers/usb/core/hub.c -$LD -r -o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/vmkplexer --whole-archive BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/vmkplexer.o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/base/vmkplexer_chardevs.o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/base/vmkplexer_procfs.o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/base/vmkplexer_entropy.o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/scsi/vmkplexer_scsi.o -$LD -r -o BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/forcedeth --whole-archive BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.o BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-sky2-CUR/release/vmkernel64/sky2 --whole-archive BLD/build/vmkdriver-sky2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/sky2/bitrev.o BLD/build/vmkdriver-sky2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/sky2/sky2.o BLD/build/vmkdriver-sky2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/message.o vmkdrivers/src_92/drivers/usb/core/message.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/notify.o vmkdrivers/src_92/drivers/usb/core/notify.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/passthrough.o vmkdrivers/src_92/drivers/usb/core/passthrough.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/pci-quirks.o vmkdrivers/src_92/drivers/usb/core/pci-quirks.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/quirks.o vmkdrivers/src_92/drivers/usb/core/quirks.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/urb.o vmkdrivers/src_92/drivers/usb/core/urb.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/usb.o vmkdrivers/src_92/drivers/usb/core/usb.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"hid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=512*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/input -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/hid -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/input/hid-core.o vmkdrivers/src_92/drivers/usb/input/hid-core.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"hid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=512*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/input -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/hid -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/input/hid-quirks.o vmkdrivers/src_92/drivers/usb/input/hid-quirks.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/scsiglue.o vmkdrivers/src_92/drivers/usb/storage/scsiglue.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/protocol.o vmkdrivers/src_92/drivers/usb/storage/protocol.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/transport.o vmkdrivers/src_92/drivers/usb/storage/transport.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/usb.o vmkdrivers/src_92/drivers/usb/storage/usb.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/initializers.o vmkdrivers/src_92/drivers/usb/storage/initializers.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/option_ms.o vmkdrivers/src_92/drivers/usb/storage/option_ms.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/usual-tables.o vmkdrivers/src_92/drivers/usb/storage/usual-tables.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/debug.o vmkdrivers/src_92/drivers/usb/storage/debug.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ehci-hcd\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ehci_hcd -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ehci_hcd -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_2GB_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/ehci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/ehci-hcd -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ehci-hcd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/ehci/ehci-hcd.o vmkdrivers/src_92/drivers/usb/host/ehci/ehci-hcd.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ehci-hcd\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ehci_hcd -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ehci_hcd -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_2GB_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/ehci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/ehci-hcd -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ehci-hcd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"hid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=512*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/input -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/hid -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-s2io-CUR/release/vmkernel64/s2io --whole-archive BLD/build/vmkdriver-s2io-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/s2io/s2io.o BLD/build/vmkdriver-s2io-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/tg3 --whole-archive BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/tg3/tg3.o BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/igb --whole-archive BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_82575.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_api.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_mac.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_manage.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_nvm.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_phy.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_ethtool.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_main.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_param.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/kcompat.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/kcompat_ethtool.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_mbx.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-ohci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_ohci -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_ohci -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/ohci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-ohci -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-ohci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/ohci/ohci-hcd.o vmkdrivers/src_92/drivers/usb/host/ohci/ohci-hcd.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-uhci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_uhci -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_uhci -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/uhci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-uhci -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-uhci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/uhci/uhci-hcd.o vmkdrivers/src_92/drivers/usb/host/uhci/uhci-hcd.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usbnet\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNET_DRIVER -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/usbnet.o vmkdrivers/src_92/drivers/usb/net/usbnet.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usbnet\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNET_DRIVER -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/mii.o vmkdrivers/src_92/drivers/usb/net/mii.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"cdc_ether\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cdc_ether -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_cdc_ether -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNET_DRIVER -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/cdc_ether -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cdc_ether-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/cdc_ether.o vmkdrivers/src_92/drivers/usb/net/cdc_ether.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_disc.o vmkdrivers/src_92/drivers/scsi/libfc/fc_disc.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_elsct.o vmkdrivers/src_92/drivers/scsi/libfc/fc_elsct.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_exch.o vmkdrivers/src_92/drivers/scsi/libfc/fc_exch.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_fcp.o vmkdrivers/src_92/drivers/scsi/libfc/fc_fcp.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_frame.o vmkdrivers/src_92/drivers/scsi/libfc/fc_frame.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_libfc.o vmkdrivers/src_92/drivers/scsi/libfc/fc_libfc.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_lport.o vmkdrivers/src_92/drivers/scsi/libfc/fc_lport.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_npiv.o vmkdrivers/src_92/drivers/scsi/libfc/fc_npiv.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_rport.o vmkdrivers/src_92/drivers/scsi/libfc/fc_rport.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_9_2_0_0\" -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_9_2_0_0 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/libfc_9_2_0_0.o vmkdrivers/src_92/drivers/scsi/libfc/libfc_9_2_0_0.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.2\" -DMODULE -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-ehci-hcd-CUR/release/vmkernel64/ehci-hcd --whole-archive BLD/build/vmkdriver-ehci-hcd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/ehci/ehci-hcd.o BLD/build/vmkdriver-ehci-hcd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"cdc_ether\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cdc_ether -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_cdc_ether -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNET_DRIVER -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/cdc_ether -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cdc_ether-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usbnet\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNET_DRIVER -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/usb --whole-archive BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hcd-pci.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/buffer.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/config.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/devices.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/devio.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/driver.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/generic.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hcd.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hub.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/message.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/notify.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/passthrough.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/pci-quirks.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/quirks.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/urb.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/usb.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-uhci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_uhci -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_uhci -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/uhci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-uhci -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-uhci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/hid --whole-archive BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/input/hid-core.o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/input/hid-quirks.o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/usb-storage --whole-archive BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/scsiglue.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/protocol.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/transport.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/usb.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/initializers.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/option_ms.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/usual-tables.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/debug.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-ohci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_ohci -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_ohci -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/ohci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-ohci -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-ohci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/softirq.o vmkdrivers/src_92/vmklinux_92/linux/kernel/softirq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/wait.o vmkdrivers/src_92/vmklinux_92/linux/kernel/wait.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/devres.o vmkdrivers/src_92/vmklinux_92/linux/kernel/irq/devres.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/klist.o vmkdrivers/src_92/vmklinux_92/linux/lib/klist.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/kref.o vmkdrivers/src_92/vmklinux_92/linux/lib/kref.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/sort.o vmkdrivers/src_92/vmklinux_92/linux/lib/sort.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/vsprintf.o vmkdrivers/src_92/vmklinux_92/linux/lib/vsprintf.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/string.o vmkdrivers/src_92/vmklinux_92/linux/lib/string.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/idr.o vmkdrivers/src_92/vmklinux_92/linux/lib/idr.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/hweight.o vmkdrivers/src_92/vmklinux_92/linux/lib/hweight.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/devres.o vmkdrivers/src_92/vmklinux_92/linux/lib/devres.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/semaphore-sleepers.o vmkdrivers/src_92/vmklinux_92/linux/lib/semaphore-sleepers.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inflate.o vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inflate.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inftrees.o vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inftrees.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inffast.o vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inffast.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inflate_syms.o vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inflate_syms.c -$LD -r -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/libfc_92 --whole-archive BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_disc.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_elsct.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_exch.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_fcp.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_frame.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_libfc.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_lport.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_npiv.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_rport.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/usbnet --whole-archive BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/usbnet.o BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/mii.o BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-usb-ohci-CUR/release/vmkernel64/usb-ohci --whole-archive BLD/build/vmkdriver-usb-ohci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/ohci/ohci-hcd.o BLD/build/vmkdriver-usb-ohci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-cdc_ether-CUR/release/vmkernel64/cdc_ether --whole-archive BLD/build/vmkdriver-cdc_ether-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/cdc_ether.o BLD/build/vmkdriver-cdc_ether-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-usb-uhci-CUR/release/vmkernel64/usb-uhci --whole-archive BLD/build/vmkdriver-usb-uhci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/uhci/uhci-hcd.o BLD/build/vmkdriver-usb-uhci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-libfc_9_2_0_0-CUR/release/vmkernel64/libfc_9_2_0_0 --whole-archive BLD/build/vmkdriver-libfc_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/libfc_9_2_0_0.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/infutil.o vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/infutil.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/mm/mempool.o vmkdrivers/src_92/vmklinux_92/linux/mm/mempool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/ethtool.o vmkdrivers/src_92/vmklinux_92/linux/net/ethtool.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/skbuff.o vmkdrivers/src_92/vmklinux_92/linux/net/skbuff.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/inet_lro.o vmkdrivers/src_92/vmklinux_92/linux/net/inet_lro.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/pci.o vmkdrivers/src_92/vmklinux_92/linux/pci/pci.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/search.o vmkdrivers/src_92/vmklinux_92/linux/pci/search.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/msi.o vmkdrivers/src_92/vmklinux_92/linux/pci/msi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/proc.o vmkdrivers/src_92/vmklinux_92/linux/pci/proc.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/fs/seq_file.o vmkdrivers/src_92/vmklinux_92/linux/fs/seq_file.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/scsi/scsi_proc.o vmkdrivers/src_92/vmklinux_92/linux/scsi/scsi_proc.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/core.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/core.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/bus.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/bus.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dd.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dd.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/driver.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/driver.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/class.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/class.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/devres.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/devres.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/platform.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/platform.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dma-mapping.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dma-mapping.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/keyboard.o vmkdrivers/src_92/vmklinux_92/linux/drivers/char/keyboard.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/defkeymap.o vmkdrivers/src_92/vmklinux_92/linux/drivers/char/defkeymap.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/consolemap.o vmkdrivers/src_92/vmklinux_92/linux/drivers/char/consolemap.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/input.o vmkdrivers/src_92/vmklinux_92/linux/drivers/input/input.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/ff-core.o vmkdrivers/src_92/vmklinux_92/linux/drivers/input/ff-core.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/mousedev.o vmkdrivers/src_92/vmklinux_92/linux/drivers/input/mousedev.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-apple.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-apple.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-belkin.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-belkin.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-cherry.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-cherry.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-core.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-core.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-cypress.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-cypress.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-ezkey.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-ezkey.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-input.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-input.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-kye.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-kye.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-lg.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-lg.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-microsoft.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-microsoft.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/constants.o vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/constants.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/scsi_error.o vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/scsi_error.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/firmware/dmi_scan.o vmkdrivers/src_92/vmklinux_92/linux/drivers/firmware/dmi_scan.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-partial.o vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-partial.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-wrappers.o vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-wrappers.c -$CC -DASSEMBLY -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/thunk.o vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/thunk.S -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_block.o vmkdrivers/src_92/vmklinux_92/vmware/linux_block.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_char.o vmkdrivers/src_92/vmklinux_92/vmware/linux_char.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_ctype.o vmkdrivers/src_92/vmklinux_92/vmware/linux_ctype.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dma.o vmkdrivers/src_92/vmklinux_92/vmware/linux_dma.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_hashtab.o vmkdrivers/src_92/vmklinux_92/vmware/linux_hashtab.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_heap.o vmkdrivers/src_92/vmklinux_92/vmware/linux_heap.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_irq.o vmkdrivers/src_92/vmklinux_92/vmware/linux_irq.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_net.o vmkdrivers/src_92/vmklinux_92/vmware/linux_net.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_pci.o vmkdrivers/src_92/vmklinux_92/vmware/linux_pci.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_proc.o vmkdrivers/src_92/vmklinux_92/vmware/linux_proc.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_rcu.o vmkdrivers/src_92/vmklinux_92/vmware/linux_rcu.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi.o vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_lld_if.o vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_lld_if.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_transport.o vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_transport.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_vmk_if.o vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_vmk_if.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_signal.o vmkdrivers/src_92/vmklinux_92/vmware/linux_signal.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET 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bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_stress.o vmkdrivers/src_92/vmklinux_92/vmware/linux_stress.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_stubs.o vmkdrivers/src_92/vmklinux_92/vmware/linux_stubs.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_task.o vmkdrivers/src_92/vmklinux_92/vmware/linux_task.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_time.o vmkdrivers/src_92/vmklinux_92/vmware/linux_time.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_usb.o vmkdrivers/src_92/vmklinux_92/vmware/linux_usb.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_waitqueue.o vmkdrivers/src_92/vmklinux_92/vmware/linux_waitqueue.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_workqueue.o vmkdrivers/src_92/vmklinux_92/vmware/linux_workqueue.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_notifier.o vmkdrivers/src_92/vmklinux_92/vmware/linux_notifier.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_kthread.o vmkdrivers/src_92/vmklinux_92/vmware/linux_kthread.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_input.o vmkdrivers/src_92/vmklinux_92/vmware/linux_input.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_cna.o vmkdrivers/src_92/vmklinux_92/vmware/linux_cna.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dcb.o vmkdrivers/src_92/vmklinux_92/vmware/linux_dcb.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_iodm.o vmkdrivers/src_92/vmklinux_92/vmware/linux_iodm.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9_2_0_0\" -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/vmklinux_9_2_0_0 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9_2_0_0 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0_scsi.o vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0_scsi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FCOE_MQ -DCONFIG_FCOE_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"fcoe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fcoe -DLINUX_MODULE_HEAP_INITIAL=4*1024*100 -DLINUX_MODULE_HEAP_MAX=10*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_fcoe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.29.9.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/fcoe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/fcoe -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fcoe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/fcoe.o vmkdrivers/src_92/drivers/scsi/fcoe/fcoe.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FCOE_MQ -DCONFIG_FCOE_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"libfcoe_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfcoe_92 -DLINUX_MODULE_HEAP_INITIAL=4*1024*100 -DLINUX_MODULE_HEAP_MAX=10*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfcoe_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.24.9.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/fcoe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe.o vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-core.o vmkdrivers/src_92/drivers/ata/libata-core.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-eh.o vmkdrivers/src_92/drivers/ata/libata-eh.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-pmp.o vmkdrivers/src_92/drivers/ata/libata-pmp.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-scsi.o vmkdrivers/src_92/drivers/ata/libata-scsi.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-sff.o vmkdrivers/src_92/drivers/ata/libata-sff.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-vmklnx.o vmkdrivers/src_92/drivers/ata/libata-vmklnx.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_9_2_0_0\" -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_0_0 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata_9_2_0_0.o vmkdrivers/src_92/drivers/ata/libata_9_2_0_0.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$LD -r -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/vmklinux_9 --whole-archive BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/softirq.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/wait.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/devres.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/klist.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/kref.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/sort.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/vsprintf.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/string.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/idr.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/hweight.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/devres.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/semaphore-sleepers.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inflate.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inftrees.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inffast.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inflate_syms.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/infutil.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/mm/mempool.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/ethtool.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/skbuff.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/inet_lro.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/pci.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/search.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/msi.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/proc.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/fs/seq_file.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/scsi/scsi_proc.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/core.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/bus.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dd.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/driver.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/class.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/devres.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/platform.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dma-mapping.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/keyboard.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/defkeymap.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/consolemap.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/input.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/ff-core.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/mousedev.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-apple.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-belkin.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-cherry.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-core.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-cypress.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-ezkey.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-input.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-kye.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-lg.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-microsoft.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/constants.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/scsi_error.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/firmware/dmi_scan.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-partial.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-wrappers.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/thunk.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_block.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_char.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_ctype.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dma.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_hashtab.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_heap.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_irq.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_net.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_pci.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_proc.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_rcu.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_lld_if.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_transport.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_vmk_if.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_signal.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_stress.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_stubs.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_task.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_time.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_usb.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_waitqueue.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_workqueue.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_notifier.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_kthread.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_input.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_cna.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dcb.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_iodm.o -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FCOE_MQ -DCONFIG_FCOE_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"libfcoe_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfcoe_92 -DLINUX_MODULE_HEAP_INITIAL=4*1024*100 -DLINUX_MODULE_HEAP_MAX=10*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfcoe_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.24.9.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/fcoe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_92 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"libfcoe_9_2_0_0\" -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/fcoe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_0_0 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfcoe_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_0_0.o vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_0_0.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"iscsi_linux_9_2_0_0\" -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/iscsi_linux -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/iscsi_linux_9_2_0_0 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-iscsi_linux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/iscsi_linux/iscsi_linux_9_2_0_0.o vmkdrivers/src_92/drivers/scsi/iscsi_linux/iscsi_linux_9_2_0_0.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCONFIG_FCOE_MQ -DCONFIG_FCOE_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"fcoe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fcoe -DLINUX_MODULE_HEAP_INITIAL=4*1024*100 -DLINUX_MODULE_HEAP_MAX=10*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_fcoe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.29.9.2\" -DMODULE -DNET_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/fcoe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/fcoe -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fcoe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9_2_1_0\" -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/vmklinux_9_2_1_0 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9_2_1_0 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_1_0/vmklinux_9_2_1_0.o vmkdrivers/src_92/vmklinux_9_2_1_0/vmklinux_9_2_1_0.c -$CC -fwrapv -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -Wall -Werror -Wstrict-prototypes -fPIE -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -mcmodel=small -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib --sysroot=/nowhere -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9_2_0_0\" -DLINUX_MODULE_VERSION=\"5.1.0\" -DMODULE -DPRODUCT_VERSION=5.1.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/vmklinux_9_2_0_0 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9_2_0_0 -include bora/vmkernel/distribute/push-hidden.h -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0.o vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0.c -$LD -r -o BLD/build/vmkdriver-libata_9_2_0_0-CUR/release/vmkernel64/libata_9_2_0_0 --whole-archive BLD/build/vmkdriver-libata_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata_9_2_0_0.o -$LD -r -o BLD/build/vmkdriver-libfcoe_9_2_0_0-CUR/release/vmkernel64/libfcoe_9_2_0_0 --whole-archive BLD/build/vmkdriver-libfcoe_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_0_0.o -$LD -r -o BLD/build/vmkdriver-iscsi_linux_9_2_0_0-CUR/release/vmkernel64/iscsi_linux_9_2_0_0 --whole-archive BLD/build/vmkdriver-iscsi_linux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/iscsi_linux/iscsi_linux_9_2_0_0.o -$LD -r -o BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/libfcoe_92 --whole-archive BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe.o BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-vmklinux_9_2_1_0-CUR/release/vmkernel64/vmklinux_9_2_1_0 --whole-archive BLD/build/vmkdriver-vmklinux_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_1_0/vmklinux_9_2_1_0.o -$LD -r -o BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/vmklinux_9_2_0_0 --whole-archive BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0_scsi.o BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0.o -$LD -r -o BLD/build/vmkdriver-fcoe-CUR/release/vmkernel64/fcoe --whole-archive BLD/build/vmkdriver-fcoe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/fcoe.o BLD/build/vmkdriver-fcoe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o -$LD -r -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/libata_92 --whole-archive BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-core.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-eh.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-pmp.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-scsi.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-sff.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-vmklnx.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"14.00.00.00\" -DMODULE -DNO_FLOATING_POINT -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 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-Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE 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-falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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-Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptsas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP 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-D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82540.o vmkdrivers/src_9/drivers/net/e1000/e1000_82540.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib 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BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nxhal.o vmkdrivers/src_9/drivers/net/nx_nic/nxhal.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 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-fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI 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BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/profile.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/profile.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 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-Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_osm.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_osm.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER 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BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP 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-mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI 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-fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_phy.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_phy.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"tg3\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_tg3 -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_tg3 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.123c.v55.5\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DTG3_INBOX -DTG3_VMWARE_NETQ_DISABLE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/tg3 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-Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2FC_ESX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2fc\" -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2fc\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.53.v55.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER 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-DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER 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-fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -w -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"vmxnet3\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmxnet3 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_vmxnet3 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.3.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/vmxnet3 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"2.72.11.v55.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2i -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_hwi.o vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_hwi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 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-Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_transport.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_transport.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ips\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ips 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ips-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBLOCK_DRIVER -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"cciss\" 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-Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_dbg.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_dbg.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM 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-Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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-Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET 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-DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS 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-fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/kcompat.o vmkdrivers/src_9/drivers/net/e1000e/kcompat.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx_linear.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx_linear.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_attr.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_attr.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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-mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptspi\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE 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BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"hpsa\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hpsa -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hpsa -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/hpsa -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_attr.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_attr.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debug_ioctl.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debug_ioctl.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_els.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_els.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_via\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_via -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_via -DLINUX_MODULE_VERSION=\"0.3.3\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_via -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2400_fw.o vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2400_fw.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_main.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_main.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_attrs.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_attrs.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_cmd64x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_cmd64x -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_cmd64x -DLINUX_MODULE_VERSION=\"0.2.5\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_cmd64x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o 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-DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM 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-Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_msghandler\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_msghandler -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_msghandler -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_msghandler -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX 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-fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wno-sign-compare -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"random\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_random -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_random -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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-Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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-Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_nvm.o vmkdrivers/src_9/drivers/net/e1000e/e1000_nvm.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/intf.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/intf.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FORCEDETH_NAPI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"forcedeth\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_forcedeth -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_forcedeth -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"0.61\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/forcedeth -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.o vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_param.o vmkdrivers/src_9/drivers/net/e1000/e1000_param.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX 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-march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET 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BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/reset.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/reset.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ahci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ahci -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 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--sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_selftest.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_selftest.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_mbox\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_VERSION=\"2.20.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mbox.o vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mbox.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm_pci.o vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm_pci.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mbox.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mbox.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_amd\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_amd -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_amd -DLINUX_MODULE_VERSION=\"0.3.10\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_amd -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_amd.o vmkdrivers/src_9/drivers/ata/pata_amd.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid2 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid2 -DLINUX_MODULE_VERSION=\"2.00.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ata_piix\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ata_piix -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ata_piix -DLINUX_MODULE_VERSION=\"2.12\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ata_piix -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic 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-Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET 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-mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI 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vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dump.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2FC_ESX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2fc\" -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2fc\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 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-falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/amap -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/bmap -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/funcobj.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib/funcobj.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/resource_tracker.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/resource_tracker.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_devintf\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_devintf -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_devintf -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_devintf -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_amd\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_amd -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_amd -DLINUX_MODULE_VERSION=\"0.3.10\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_amd -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_kcompat.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_kcompat.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_hash_table.o vmkdrivers/src_9/drivers/net/nx_nic/nx_hash_table.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/qp.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/qp.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/sa.o vmkdrivers/src_9/drivers/scsi/aacraid2/sa.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_atiixp\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_atiixp -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_atiixp -DLINUX_MODULE_VERSION=\"0.4.6\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_atiixp -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_atiixp.o vmkdrivers/src_9/drivers/ata/pata_atiixp.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ 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-march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_sil680\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_sil680 -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_sil680 -DLINUX_MODULE_VERSION=\"0.4.8\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_sil680 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_sil680.o vmkdrivers/src_9/drivers/ata/pata_sil680.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_iocb.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_iocb.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptsas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_iocb.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_iocb.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_main.o vmkdrivers/src_9/drivers/net/e1000/e1000_main.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/pata_amd --whole-archive BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_amd.o BLD/build/vmkdriver-pata_amd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"14.00.00.00\" -DMODULE -DNO_FLOATING_POINT -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_base.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_base.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptspi\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=1 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptspi/mptspi.o vmkdrivers/src_9/drivers/scsi/mpt/mptspi/mptspi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_procfs.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_procfs.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_mbox\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_VERSION=\"2.20.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82541.o vmkdrivers/src_9/drivers/net/e1000/e1000_82541.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/commctrl.o vmkdrivers/src_9/drivers/scsi/aacraid2/commctrl.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_fcs.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_fcs.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_dev.o vmkdrivers/src_9/drivers/net/enic/vnic_dev.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.o vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/amap -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/bmap -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/cdbc.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/cdbc.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_os.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_os.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ahci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ahci -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ahci -DLINUX_MODULE_VERSION=\"3.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ahci -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_serverworks\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_serverworks -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_serverworks -DLINUX_MODULE_VERSION=\"0.4.3\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include 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-Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptspi\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptspi -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt/mptcommon -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt/mptsas -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.o vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82598.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82598.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/nark.o vmkdrivers/src_9/drivers/scsi/aacraid2/nark.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS 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-IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/cnic.o vmkdrivers/src_9/drivers/net/bnx2/cnic.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" 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-Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_nx.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_nx.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FORCEDETH_NAPI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"forcedeth\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_forcedeth -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_forcedeth -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"0.61\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/forcedeth -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_manage.o vmkdrivers/src_9/drivers/net/igb/e1000_manage.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_intr.o vmkdrivers/src_9/drivers/net/enic/vnic_intr.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/char/openipmi/includes -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_nv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_nv -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_nv -DLINUX_MODULE_VERSION=\"3.5\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_nv -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_nv.o vmkdrivers/src_9/drivers/ata/sata_nv.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.o vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/forcedeth --whole-archive BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.o BLD/build/vmkdriver-forcedeth-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB 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--sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX 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vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mbx.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/ahci --whole-archive BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/ahci.o BLD/build/vmkdriver-ahci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_config.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_config.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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-Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"cnic_register\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cnic_register -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=16*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_cnic_register -DLINUX_MODULE_VERSION=\"1.72.1.v50.1i\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI 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BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/random/halfmd4.o vmkdrivers/src_9/drivers/char/random/halfmd4.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" 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BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/netdev.o vmkdrivers/src_9/drivers/net/e1000e/netdev.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mid.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mid.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/amap -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/bmap -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_proc.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_proc.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096*2 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=256*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.56.v55.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"hpsa\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hpsa -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hpsa -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/hpsa -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/hpsa/hpsa.o vmkdrivers/src_9/drivers/scsi/hpsa/hpsa.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_mac.o vmkdrivers/src_9/drivers/net/igb/e1000_mac.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_82542.o vmkdrivers/src_9/drivers/net/e1000/e1000_82542.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=40*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_VERSION=\"5.34\" -DLP6000 -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMKLNX_VMKSGARRAY_SUPPORTED -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid_sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fp.o vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fp.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_atiixp\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_atiixp -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_atiixp -DLINUX_MODULE_VERSION=\"0.4.6\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_atiixp -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_msghandler\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_msghandler -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_msghandler -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_msghandler -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_security.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_security.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include 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-Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"aic79xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=360*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_aic79xx -DLINUX_MODULE_VERSION=\"3.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aic79xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include 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-Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release 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-Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_mbox\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_mbox -DLINUX_MODULE_VERSION=\"2.20.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/megaraid -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/megaraid_mbox -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mm.o vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mm.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/aachba.o vmkdrivers/src_9/drivers/scsi/aacraid2/aachba.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_via\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_via -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_via -DLINUX_MODULE_VERSION=\"0.3.3\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_via -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_via.o vmkdrivers/src_9/drivers/ata/pata_via.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_param.o vmkdrivers/src_9/drivers/net/igb/igb_param.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/ipmi_msghandler --whole-archive BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.o BLD/build/vmkdriver-ipmi_msghandler-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/hpsa --whole-archive BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/hpsa/hpsa.o BLD/build/vmkdriver-hpsa-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/pata_atiixp --whole-archive BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_atiixp.o BLD/build/vmkdriver-pata_atiixp-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/mptspi --whole-archive BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptscsih.o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o BLD/build/vmkdriver-mptspi-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptspi/mptspi.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/megaraid_mbox --whole-archive BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mm.o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid/megaraid_mbox.o BLD/build/vmkdriver-megaraid_mbox-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_seq.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_seq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82598.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82598.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096*2 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=256*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.56.v55.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER 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-fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE 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-fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE 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BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_ioctl.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_ioctl.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE 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-Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ 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--sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS 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-fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2_INBOX=1 -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_BOOL=1 -DHAVE_DEV_ERR=1 -DKBUILD_MODNAME=\"bnx2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2 -DLINUX_MODULE_HEAP_DMA_WIDTH=40 -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"2.2.3d.v55.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI 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+$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE 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vmkdrivers/src_9/drivers/scsi/aacraid2/dpcsup.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cmd.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cmd.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign 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-D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mr.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mr.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096*2 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=256*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.56.v55.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 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vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2100_fw.o vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2100_fw.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/char/openipmi/includes -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096*2 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=256*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.56.v55.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 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BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_tx.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_tx.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096*2 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=256*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.56.v55.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 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-Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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-falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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-Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"2.72.11.v55.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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-fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM 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vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dbg.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dbg.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pd.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pd.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_scsi.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_scsi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/sense.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/sense.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCNIC_INBOX -DCNIC_ISCSI_OOO_SUPPORT=1 -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_BOOL=1 -DHAVE_DEV_PRINTK=1 -DKBUILD_MODNAME=\"cnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cnic -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_cnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.52.v55.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_rq.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_rq.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-bnx2-CUR/release/vmkernel64/bnx2 --whole-archive BLD/build/vmkdriver-bnx2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/bnx2.o BLD/build/vmkdriver-bnx2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/cnic --whole-archive BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2/cnic.o BLD/build/vmkdriver-cnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_nv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_nv -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_nv -DLINUX_MODULE_VERSION=\"3.5\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_nv -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netq.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"14.00.00.00\" -DMODULE -DNO_FLOATING_POINT -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_scsih.o vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_scsih.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mgmt.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mgmt.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/pata_via --whole-archive BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_via.o BLD/build/vmkdriver-pata_via-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_dev.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_dev.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_lro.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_lro.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/main.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/main.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/port.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/port.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/amap -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/bmap -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/mpu.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib/mpu.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2X_INBOX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096*2 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2x -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=256*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.56.v55.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2x -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.o vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_hpt3x2n\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_hpt3x2n -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_hpt3x2n -DLINUX_MODULE_VERSION=\"0.3.4\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_hpt3x2n -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"2.72.11.v55.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2i -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_iscsi.o vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_iscsi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2FC_ESX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2fc\" -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2fc\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.53.v55.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__FCOE_CNA_QUEUE_CLEANUP__ -D__FCOE_IF_RESTART_WQ__ -D__FIP_VLAN_DISC_CMPL__ -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2fc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2fc -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_hwi.o vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_hwi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"cnic_register\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cnic_register -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=16*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_cnic_register -DLINUX_MODULE_VERSION=\"1.72.1.v50.1i\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/bnx2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/cnic_register -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cnic_register-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mptsas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mptsas -DLINUX_MODULE_VERSION=\"4.23.01.00\" -DLP6000 -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DUSE_THIS_MODULE_VERSION=0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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-ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_phy.o vmkdrivers/src_9/drivers/net/e1000e/e1000_phy.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wno-sign-compare -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"random\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_random -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_random -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/random -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/random -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-random-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/random/sha1.o vmkdrivers/src_9/drivers/char/random/sha1.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"8.0.3.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000/e1000_manage.o vmkdrivers/src_9/drivers/net/e1000/e1000_manage.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/srq.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/srq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2FC_ESX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2fc\" -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2fc\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.53.v55.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__FCOE_CNA_QUEUE_CLEANUP__ -D__FCOE_IF_RESTART_WQ__ -D__FIP_VLAN_DISC_CMPL__ -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2fc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2fc -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_tgt.o vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_tgt.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER 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BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_ethtool.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_ethtool.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_E1000_DISABLE_PACKET_SPLIT -DCONFIG_E1000_NAPI -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000 -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000\" 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-IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_ethtool.o vmkdrivers/src_9/drivers/net/igb/igb_ethtool.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version 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-Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mem.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mem.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET 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--whole-archive BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_nv.o BLD/build/vmkdriver-sata_nv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/pata_hpt3x2n --whole-archive BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_hpt3x2n.o BLD/build/vmkdriver-pata_hpt3x2n-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_vport.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_vport.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_pdc2027x\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_pdc2027x -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_pdc2027x -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_pdc2027x -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_pdc2027x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_pdc2027x.o vmkdrivers/src_9/drivers/ata/pata_pdc2027x.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_sup.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_sup.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netdev.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netdev.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE 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vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sdtest_ioctl.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP 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--sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX 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-march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE 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BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 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-Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_upt.o vmkdrivers/src_9/drivers/net/enic/enic_upt.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles 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-falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK 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-Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_si_drv\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_si_drv -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/char/openipmi/includes -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_si_drv -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 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-mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS 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BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_resources.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_resources.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_nportdisc.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_nportdisc.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/xge_mdio.o vmkdrivers/src_9/drivers/net/nx_nic/xge_mdio.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2i\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2i -DLINUX_MODULE_VERSION=\"2.72.11.v55.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2i -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2i -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2i-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_init.o vmkdrivers/src_9/drivers/scsi/bnx2i/bnx2i_init.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"adp94xx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_HEAP_INITIAL=128*1024 -DLINUX_MODULE_HEAP_MAX=3*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_adp94xx -DLINUX_MODULE_VERSION=\"1.0.8.12\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DSEQUENCER_UPDATE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/adp94xx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_hwi.o vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_hwi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/amap -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/bmap -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_char.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_char.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/amap -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/bmap -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_netif.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_netif.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ct.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ct.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_res.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_res.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/amap -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/bmap -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/cq.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib/cq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.o vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_intr.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_intr.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2FC_ESX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2fc\" -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2fc\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.72.53.v55.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__FCOE_CNA_QUEUE_CLEANUP__ -D__FCOE_IF_RESTART_WQ__ -D__FIP_VLAN_DISC_CMPL__ -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/bnx2fc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/bnx2fc -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_procfs.o vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_procfs.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/ipmi_si_drv --whole-archive BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.o BLD/build/vmkdriver-ipmi_si_drv-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/rx.o vmkdrivers/src_9/drivers/scsi/aacraid2/rx.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBLOCK_DRIVER -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"cciss\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cciss -DLINUX_MODULE_HEAP_INITIAL=1024*256 -DLINUX_MODULE_HEAP_MAX=1024*1024*10 -DLINUX_MODULE_HEAP_NAME=vmklnx_cciss -DLINUX_MODULE_VERSION=\"3.6.14\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/block/cciss -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/block -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cciss-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mcg.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mcg.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/aic79xx --whole-archive BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_core.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_osm_pci.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_pci.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aic79xx/aic79xx_proc.o BLD/build/vmkdriver-aic79xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_core\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=512*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_core -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_core -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_core -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cq.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_SCSI_MPT2SAS_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"mpt2sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=120*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mpt2sas -DLINUX_MODULE_VERSION=\"14.00.00.00\" -DMODULE -DNO_FLOATING_POINT -DSAS_TRANSPORT_SUPPORT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/scsi/mpt2sas -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_init.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_init.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 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BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq_copy.o vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq_copy.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_sil680\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_sil680 -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 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vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_init.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ 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-fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING -DCPQ_CIM -DCPU=x86-64 -DDEBUG_STUB -DDIAG_BUFFER_SUPPORT -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid_sas\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=40*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid_sas -DLINUX_MODULE_VERSION=\"5.34\" -DLP6000 -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMKLNX_VMKSGARRAY_SUPPORTED -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK 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-Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE 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vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBNX2FC_ESX -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRV_MODULE_NAME=\"bnx2fc\" -DGPLED_CODE -DKBUILD_MODNAME=\"bnx2fc\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_HEAP_INITIAL=4096*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_bnx2fc -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 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-DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/comminit.o vmkdrivers/src_9/drivers/scsi/aacraid2/comminit.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_e1000e -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/e1000e -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_mac.o vmkdrivers/src_9/drivers/net/e1000e/e1000_mac.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_ethtool.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_ethtool.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ips\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ips -DLINUX_MODULE_HEAP_INITIAL=2*1024*1024 -DLINUX_MODULE_HEAP_MAX=10*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ips -DLINUX_MODULE_VERSION=\"7.12.05\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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-ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"megaraid2\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_megaraid2 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_megaraid2 -DLINUX_MODULE_VERSION=\"2.00.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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$LD_OPTS -r -o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/mlx4_core --whole-archive BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/alloc.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/catas.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cmd.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cq.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/eq.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/fw.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/icm.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/intf.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/main.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mcg.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mr.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pd.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/port.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/profile.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/qp.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/reset.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/sense.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/srq.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pkey.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/resource_tracker.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.o BLD/build/vmkdriver-mlx4_core-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"tg3\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_tg3 -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=16384*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_tg3 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"3.123c.v55.5\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DTG3_INBOX -DTG3_VMWARE_NETQ_DISABLE -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMWARE_ESX_DDK_VERSION=55000 -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/tg3 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/tg3 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/tg3/tg3.o vmkdrivers/src_9/drivers/net/tg3/tg3.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_nic_minidump.o vmkdrivers/src_9/drivers/net/nx_nic/nx_nic_minidump.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/kcompat.o vmkdrivers/src_9/drivers/net/ixgbe/kcompat.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"nx_nic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_HEAP_DMA_WIDTH=64 -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_nx_nic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_VERSION=\"5.0.621\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DPEGNET_NIC -DUNM_CONF_OS=UNM_CONF_LINUX -DUNM_CONF_PROCESSOR=UNM_CONF_X86 -DUNM_HAL_NATIVE -DUNM_X_HARDWARE=UNM_X_ASIC -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/nx_nic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/nx_nic/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/nx_nic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_hw.o vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_hw.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP 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vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_rq.o vmkdrivers/src_9/drivers/net/enic/vnic_rq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_cq.o vmkdrivers/src_9/drivers/net/enic/vnic_cq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FUSION_LOGGING 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-Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"pata_serverworks\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_pata_serverworks -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_pata_serverworks -DLINUX_MODULE_VERSION=\"0.4.3\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/pata_serverworks -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-pata_cmd64x-CUR/release/vmkernel64/pata_cmd64x --whole-archive BLD/build/vmkdriver-pata_cmd64x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_cmd64x.o BLD/build/vmkdriver-pata_cmd64x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/mpt2sas --whole-archive BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_base.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_config.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_ctl.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_scsih.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt2sas/mpt2sas_transport.o BLD/build/vmkdriver-mpt2sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -w -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_SMP -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"vmxnet3\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmxnet3 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_vmxnet3 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.1.3.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/vmxnet3 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_drv.o vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_drv.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_E1000E -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"e1000e\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_e1000e 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/ethtool.o vmkdrivers/src_9/drivers/net/e1000e/ethtool.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_tag_map.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_tag_map.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla2xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla2xxx -DLINUX_MODULE_VERSION=\"902.k1.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla2xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_os.o vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_os.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_vic.o vmkdrivers/src_9/drivers/net/enic/vnic_vic.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCHAR_DRIVER -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DHP_G6_SUPPORT -DKBUILD_MODNAME=\"ipmi_devintf\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ipmi_devintf -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ipmi_devintf -DLINUX_MODULE_VERSION=\"39.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ipmi_devintf -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.o vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"aacraid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_aacraid -DLINUX_MODULE_VERSION=\"1.1.5.1\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/aacraid2 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/pata_sil680 --whole-archive BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_sil680.o BLD/build/vmkdriver-pata_sil680-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_DCB -DCONFIG_FCOE -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_IOV -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IXGBE -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DHAVE_DCBNL_OPS_GETAPP -DHAVE_IPLINK_VF_CONFIG -DIXGBE_ESX_CNA -DIXGBE_MQ -DIXGBE_NO_LRO -DIXGBE_VMDQ -DKBUILD_MODNAME=\"ixgbe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_ixgbe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=36*1024*1024 -DLINUX_MODULE_VERSION=\"3.7.13.7.14iov\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMKNETDDI_QUEUEOPS__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/ixgbe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.o vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sli.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sli.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"lpfc820\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=64*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_lpfc820 -DLINUX_MODULE_VERSION=\"8.2.3.1\" -DMODULE -DNETLINK_FCTRANSPORT=19 -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/lpfc820 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_scsi.o vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_scsi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_int.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_int.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/pata_serverworks --whole-archive BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/pata_serverworks.o BLD/build/vmkdriver-pata_serverworks-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_IGB_DISABLE_PACKET_SPLIT -DCPU=x86-64 -DDEBUG_STUB -DDRIVER_IGB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"igb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_HEAP_INITIAL=100*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_igb -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"2.1.11.1\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/igb -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/kcompat_ethtool.o vmkdrivers/src_9/drivers/net/igb/kcompat_ethtool.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -D__VMKERNEL_MLX4_EN_SUPPORT__ -Wall -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"mlx4_en\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_HEAP_INITIAL=16*1024 -DLINUX_MODULE_HEAP_MAX=2*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_mlx4_en -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.9.7.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/mlnx/mlx4_en -Ivmkdrivers/src_9/drivers/net/mlnx/compat -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/drivers/net/mlnx/include -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/mlx4_en -include vmkdrivers/src_92/include/linux/autoconf.h -include vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h -c -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_cq.o vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_cq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wno-unknown-pragmas -DLINUX_OS -DEXPORT_SYMTAB -DGPLED_CODE -DNET_DRIVER -DSG_BMAP_UNION -DBUILD_CHIPIF -D_CONSOLE -DHOST -DSG_ATTRIBUTE_PACK -DUSE_ISR -DKERNEL_DOT_ORG -DCONFIG_PROC_FS -DSMP_CAPABLE_VMK_DRIVER -DMEM_ALLOC_CHNG -DFUNCTION_NIC -DCONFIG_PCI_IOV -DHAVE_IPLINK_VF_CONFIG -DUSE_NAPI -DVXLAN_OFFLOAD -DSH_A0_OVLAN_FIX -O2 -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_NETDEVICES_MULTIQUEUE -DCONFIG_PCI_MSI -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"be2net\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_HEAP_INITIAL=1024*1024 -DLINUX_MODULE_HEAP_MAX=1024*1024*20 -DLINUX_MODULE_HEAP_NAME=vmklnx_be2net -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"4.6.100.0v\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/amap -Ivmkdrivers/src_9/private_drivers/ServerEngines/be2net/fw/bmap -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/eth.o vmkdrivers/src_9/private_drivers/ServerEngines/be2net/hwlib/eth.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/aacraid --whole-archive BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/aachba.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/commctrl.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/comminit.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/commsup.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/csmi.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/dpcsup.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/rkt.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/rx.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/linit.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/sa.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/aacraid2/nark.o BLD/build/vmkdriver-aacraid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_nvram.o vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_nvram.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_wq.o vmkdrivers/src_9/drivers/net/enic/vnic_wq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"qla4xxx\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_HEAP_INITIAL=4*1024*1024 -DLINUX_MODULE_HEAP_MAX=35*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_qla4xxx -DLINUX_MODULE_VERSION=\"5.01.03.2\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/qla4xxx -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/qla4xxx -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/ipmi_devintf --whole-archive BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.o BLD/build/vmkdriver-ipmi_devintf-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wno-error -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PROC_FS -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"enic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_HEAP_DMA_WIDTH=48 -DLINUX_MODULE_HEAP_INITIAL=1024*100 -DLINUX_MODULE_HEAP_MAX=4*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_enic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=768*768*128*1.5 -DLINUX_MODULE_SKB_HEAP_MAX=768*1280*128*1.5 -DLINUX_MODULE_VERSION=\"1.4.2.15a\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/net/enic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_main.o vmkdrivers/src_9/drivers/net/enic/enic_main.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/adp94xx --whole-archive BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_discover.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_osm.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_hwi.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_seq.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_ioctl.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/adp94xx/adp94xx_sata.o BLD/build/vmkdriver-adp94xx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FNIC_MQ -DCONFIG_FNIC_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"fnic\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_HEAP_INITIAL=8*1024*1024 -DLINUX_MODULE_HEAP_MAX=32*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_fnic -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.5.0.4\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/scsi/fnic -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/fnic -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_main.o vmkdrivers/src_9/drivers/scsi/fnic/fnic_main.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ata_piix\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ata_piix -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ata_piix -DLINUX_MODULE_VERSION=\"2.12\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/ata_piix -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/ata_piix.o vmkdrivers/src_9/drivers/ata/ata_piix.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/mptsas --whole-archive BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptbase.o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptctl.o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptcommon/mptscsih.o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o BLD/build/vmkdriver-mptsas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/mpt/mptsas/mptsas.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/megaraid2 --whole-archive BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid2/megaraid.o BLD/build/vmkdriver-megaraid2-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/bnx2x --whole-archive BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_cmn.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_ethtool.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_stats.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e2.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_self_test.o BLD/build/vmkdriver-bnx2x-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/bnx2fc --whole-archive BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_els.o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_fcoe.o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_hwi.o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_io.o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_tgt.o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/bnx2fc/bnx2fc_procfs.o BLD/build/vmkdriver-bnx2fc-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/ixgbe --whole-archive BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82598.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82599.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_x540.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_mbx.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_api.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_common.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82598.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82599.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_nl.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_ethtool.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_fcoe.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_phy.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_vmdq.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/kcompat.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/ixgbe/kcompat_ethtool.o BLD/build/vmkdriver-ixgbe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/e1000e --whole-archive BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_82571.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_ich8lan.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_mac.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_manage.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_nvm.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/e1000_phy.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/ethtool.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/kcompat.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/kcompat_ethtool.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/netdev.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/e1000e/param.o BLD/build/vmkdriver-e1000e-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/qla4xxx --whole-archive BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_dbg.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_init.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_iocb.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_isr.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_mbx.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_nvram.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4_os.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dbg.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_dump.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_ioctl.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla4xxx/ql4im_os.o BLD/build/vmkdriver-qla4xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/be2net --whole-archive BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_init.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_int.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_netif.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_ethtool.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_proc.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/be_char.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/cdbc.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/funcobj.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/cq.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/eq.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/mpu.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/private_drivers/ServerEngines/be2net/eth.o BLD/build/vmkdriver-be2net-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/megaraid_sas --whole-archive BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fusion.o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas.o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/megaraid_sas/megaraid_sas_fp.o BLD/build/vmkdriver-megaraid_sas-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/mlx4_en --whole-archive BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_main.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_tx.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx_linear.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_ethtool.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_cq.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_resources.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netdev.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_selftest.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netq.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.o BLD/build/vmkdriver-mlx4_en-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/igb --whole-archive BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_82575.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_api.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_mac.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_manage.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_nvm.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_phy.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_ethtool.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_main.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/igb_param.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/kcompat.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/kcompat_ethtool.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/igb/e1000_mbx.o BLD/build/vmkdriver-igb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/qla2xxx --whole-archive BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2100_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2200_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2300_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2322_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2400_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/ql2500_fw.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_attr.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_dbg.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_gs.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_inioct.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_init.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_iocb.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_isr.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mbx.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_mid.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_os.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_sup.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_xioct.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/qla2xxx/qla_nx.o BLD/build/vmkdriver-qla2xxx-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/enic --whole-archive BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_main.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_upt.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/enic_res.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_dev.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_wq.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_rq.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_cq.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_intr.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/enic/vnic_vic.o BLD/build/vmkdriver-enic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-ips-CUR/release/vmkernel64/ips --whole-archive BLD/build/vmkdriver-ips-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/ips/ips.o BLD/build/vmkdriver-ips-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/fnic --whole-archive BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_attrs.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_fcs.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_isr.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_kcompat.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_main.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_res.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_scsi.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_tag_map.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/fnic_procfs.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_cq.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_dev.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_intr.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_rq.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/fnic/vnic_wq_copy.o BLD/build/vmkdriver-fnic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/ata_piix --whole-archive BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/ata_piix.o BLD/build/vmkdriver-ata_piix-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/nx_nic --whole-archive BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_hw.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_main.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_init.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_ethtool.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_lro.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_procfs.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/unm_nic_tool.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_nic_minidump.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_nic_vmk.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nxhal.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_mem_pool.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/nx_hash_table.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/xge_mdio.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/nx_nic/niu.o BLD/build/vmkdriver-nx_nic-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/vmxnet3 --whole-archive BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_drv.o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/vmxnet3/vmxnet3_ethtool.o BLD/build/vmkdriver-vmxnet3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_promise\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_promise -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_promise -DLINUX_MODULE_VERSION=\"2.12\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_promise -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_promise.o vmkdrivers/src_9/drivers/ata/sata_promise.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_sil\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_sil -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_sil -DLINUX_MODULE_VERSION=\"2.3\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_sil.o vmkdrivers/src_9/drivers/ata/sata_sil.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_sil24\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_sil24 -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_sil24 -DLINUX_MODULE_VERSION=\"1.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil24 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_sil24.o vmkdrivers/src_9/drivers/ata/sata_sil24.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_svw\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_svw -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_svw -DLINUX_MODULE_VERSION=\"2.3\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_svw -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_svw.o vmkdrivers/src_9/drivers/ata/sata_svw.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.3\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_disc.o vmkdrivers/src_92/drivers/scsi/libfc/fc_disc.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.3\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_elsct.o vmkdrivers/src_92/drivers/scsi/libfc/fc_elsct.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.3\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_exch.o vmkdrivers/src_92/drivers/scsi/libfc/fc_exch.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.3\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_fcp.o vmkdrivers/src_92/drivers/scsi/libfc/fc_fcp.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.3\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_frame.o vmkdrivers/src_92/drivers/scsi/libfc/fc_frame.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.3\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_libfc.o vmkdrivers/src_92/drivers/scsi/libfc/fc_libfc.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.3\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_lport.o vmkdrivers/src_92/drivers/scsi/libfc/fc_lport.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_INET_LRO -DCONFIG_LIBFC_MQ -DCONFIG_LIBFC_VMDQ -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DGPLED_CODE -DKBUILD_MODNAME=\"libfc_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*4096 -DLINUX_MODULE_HEAP_MAX=20*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_libfc_92 -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.40.9.3\" -DMODULE -DNO_FLOATING_POINT -DSCSI_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_npiv.o vmkdrivers/src_92/drivers/scsi/libfc/fc_npiv.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding 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-DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/libfc -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/include/scsi/drivers -Ivmkdrivers/src_92/include/scsi -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfc_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_rport.o vmkdrivers/src_92/drivers/scsi/libfc/fc_rport.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hcd-pci.o vmkdrivers/src_92/drivers/usb/core/hcd-pci.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/buffer.o vmkdrivers/src_92/drivers/usb/core/buffer.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 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-Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version 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-IBLD/build/HEADERS/CUR-0-vmkdrivers-namespace/vmkernel64/release/vmkplexer -c -o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/base/vmkplexer_chardevs.o vmkdrivers/vmkplexer/src/base/vmkplexer_chardevs.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmkplexer\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE 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BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_els.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_hbadisc.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_init.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_ioctl.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mbox.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mem.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_nportdisc.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_scsi.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_security.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sli.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_vport.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_menlo.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_debug_ioctl.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_hbaapi_ioctl.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_sdtest_ioctl.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/scsi/lpfc820/lpfc_mgmt.o BLD/build/vmkdriver-lpfc820-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_svw\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_svw -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_svw -DLINUX_MODULE_VERSION=\"2.3\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_svw -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/tg3 --whole-archive BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/net/tg3/tg3.o BLD/build/vmkdriver-tg3-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_sil24\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_sil24 -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_sil24 -DLINUX_MODULE_VERSION=\"1.1\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil24 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_sil\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_sil -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_sil -DLINUX_MODULE_VERSION=\"2.3\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_sil -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"sata_promise\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_sata_promise -DLINUX_MODULE_HEAP_INITIAL=64*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_sata_promise -DLINUX_MODULE_VERSION=\"2.12\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_9/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-9-vmkdrivers-namespace/vmkernel64/release/sata_promise -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/driver.o vmkdrivers/src_92/drivers/usb/core/driver.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/generic.o vmkdrivers/src_92/drivers/usb/core/generic.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hcd.o vmkdrivers/src_92/drivers/usb/core/hcd.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hub.o vmkdrivers/src_92/drivers/usb/core/hub.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version 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-Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/notify.o vmkdrivers/src_92/drivers/usb/core/notify.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/passthrough.o vmkdrivers/src_92/drivers/usb/core/passthrough.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/pci-quirks.o vmkdrivers/src_92/drivers/usb/core/pci-quirks.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/quirks.o vmkdrivers/src_92/drivers/usb/core/quirks.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles 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-D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/urb.o vmkdrivers/src_92/drivers/usb/core/urb.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/usb.o vmkdrivers/src_92/drivers/usb/core/usb.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"hid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=512*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/input -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/hid -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/input/hid-core.o vmkdrivers/src_92/drivers/usb/input/hid-core.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"hid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=512*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/input -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/hid -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/input/hid-quirks.o vmkdrivers/src_92/drivers/usb/input/hid-quirks.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/scsiglue.o vmkdrivers/src_92/drivers/usb/storage/scsiglue.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/sata_svw --whole-archive BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_svw.o BLD/build/vmkdriver-sata_svw-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/sata_sil24 --whole-archive BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_sil24.o BLD/build/vmkdriver-sata_sil24-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/sata_sil --whole-archive BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_sil.o BLD/build/vmkdriver-sata_sil-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"hid\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=512*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_hid -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/input -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/hid -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/hid -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-hid-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/vmkplexer --whole-archive BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/vmkplexer.o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/base/vmkplexer_chardevs.o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/base/vmkplexer_procfs.o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/base/vmkplexer_entropy.o BLD/build/vmkdriver-vmkplexer-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/vmkplexer/src/scsi/vmkplexer_scsi.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/protocol.o vmkdrivers/src_92/drivers/usb/storage/protocol.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/transport.o vmkdrivers/src_92/drivers/usb/storage/transport.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/usb.o vmkdrivers/src_92/drivers/usb/storage/usb.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/initializers.o vmkdrivers/src_92/drivers/usb/storage/initializers.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/option_ms.o vmkdrivers/src_92/drivers/usb/storage/option_ms.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/usual-tables.o vmkdrivers/src_92/drivers/usb/storage/usual-tables.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/debug.o vmkdrivers/src_92/drivers/usb/storage/debug.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ehci-hcd\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ehci_hcd -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ehci_hcd -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_2GB_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/ehci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/ehci-hcd -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ehci-hcd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/ehci/ehci-hcd.o vmkdrivers/src_92/drivers/usb/host/ehci/ehci-hcd.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"ehci-hcd\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_ehci_hcd -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_ehci_hcd -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMKLINUX_MODULE_HEAP_2GB_MEM -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/ehci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/ehci-hcd -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-ehci-hcd-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-storage\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_storage -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/storage -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-storage -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/libfc_92 --whole-archive BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_disc.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_elsct.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_exch.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_fcp.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_frame.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_libfc.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_lport.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_npiv.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/fc_rport.o BLD/build/vmkdriver-libfc_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/sata_promise --whole-archive BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_9/drivers/ata/sata_promise.o BLD/build/vmkdriver-sata_promise-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-ohci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_ohci -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_ohci -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/ohci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-ohci -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-ohci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/ohci/ohci-hcd.o vmkdrivers/src_92/drivers/usb/host/ohci/ohci-hcd.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-uhci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_uhci -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_uhci -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/uhci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-uhci -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-uhci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/host/uhci/uhci-hcd.o vmkdrivers/src_92/drivers/usb/host/uhci/uhci-hcd.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usbnet\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/usbnet.o vmkdrivers/src_92/drivers/usb/net/usbnet.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usbnet\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usbnet -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usbnet -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usbnet-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/mii.o vmkdrivers/src_92/drivers/usb/net/mii.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DESX3_NETWORKING_NOT_DONE_YET -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"cdc_ether\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_cdc_ether -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_cdc_ether -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/net -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/cdc_ether -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-cdc_ether-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/net/cdc_ether.o vmkdrivers/src_92/drivers/usb/net/cdc_ether.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Werror -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_FCOE_MQ -DCONFIG_FCOE_VMDQ -DCONFIG_INET_LRO -DCONFIG_PCI_MSI -DCPU=x86-64 -DDEBUG_STUB -DDISABLE_PACKET_SPLIT -DESX3_NETWORKING_NOT_DONE_YET -DGPLED_CODE -DKBUILD_MODNAME=\"fcoe\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_fcoe -DLINUX_MODULE_HEAP_INITIAL=4*1024*100 -DLINUX_MODULE_HEAP_MAX=10*1024*4096 -DLINUX_MODULE_HEAP_NAME=vmklnx_fcoe -DLINUX_MODULE_SKB_HEAP -DLINUX_MODULE_SKB_HEAP_INITIAL=512*1024 -DLINUX_MODULE_SKB_HEAP_MAX=22*1024*1024 -DLINUX_MODULE_VERSION=\"1.0.29.9.2\" -DMODULE -DNET_DRIVER -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/fcoe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/fcoe -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-fcoe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/fcoe.o vmkdrivers/src_92/drivers/scsi/fcoe/fcoe.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement 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-Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-uhci -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-uhci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCONFIG_PM -DCONFIG_PM_RUNTIME -DCONFIG_USB_SUSPEND -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"usb-ohci\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_usb_ohci -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=4*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_usb_ohci -DLINUX_MODULE_VERSION=\"1.0\" -DMODULE -DNO_FLOATING_POINT -DUSB_DRIVER -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/usb/host/ohci -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -Ivmkdrivers/src_92/drivers/usb/core -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/usb-ohci -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-usb-ohci-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/usb --whole-archive BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hcd-pci.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/buffer.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/config.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/devices.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/devio.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/driver.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/generic.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hcd.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/hub.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/message.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/notify.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/passthrough.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/pci-quirks.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/quirks.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/urb.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/core/usb.o BLD/build/vmkdriver-usb-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/softirq.o vmkdrivers/src_92/vmklinux_92/linux/kernel/softirq.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/wait.o vmkdrivers/src_92/vmklinux_92/linux/kernel/wait.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/devres.o vmkdrivers/src_92/vmklinux_92/linux/kernel/irq/devres.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/kref.o vmkdrivers/src_92/vmklinux_92/linux/lib/kref.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/klist.o vmkdrivers/src_92/vmklinux_92/linux/lib/klist.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/vsprintf.o vmkdrivers/src_92/vmklinux_92/linux/lib/vsprintf.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libfc_9_2_1_0-CUR/release/vmkernel64/libfc_9_2_1_0 --whole-archive BLD/build/vmkdriver-libfc_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/libfc_9_2_1_0.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT 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-fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"libfcoe_9_2_1_0\" -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/fcoe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_1_0 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfcoe_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_1_0.o vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_1_0.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx 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-Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_9_2_0_0 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfcoe_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_0_0.o vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_0_0.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign 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-IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_9_2_1_0 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata_9_2_1_0.o vmkdrivers/src_92/drivers/ata/libata_9_2_1_0.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB 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-include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata_9_2_0_0.o vmkdrivers/src_92/drivers/ata/libata_9_2_0_0.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/usb-storage --whole-archive BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/scsiglue.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/protocol.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/transport.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/usb.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/initializers.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/option_ms.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/usual-tables.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/usb/storage/debug.o BLD/build/vmkdriver-usb-storage-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/idr.o vmkdrivers/src_92/vmklinux_92/linux/lib/idr.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 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-g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY 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-IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/radix-tree.o vmkdrivers/src_92/vmklinux_92/linux/lib/radix-tree.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-fcoe-CUR/release/vmkernel64/fcoe --whole-archive BLD/build/vmkdriver-fcoe-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/fcoe.o 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BLD/build/vmkdriver-iscsi_linux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/iscsi_linux/iscsi_linux_9_2_0_0.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-iscsi_linux_9_2_1_0-CUR/release/vmkernel64/iscsi_linux_9_2_1_0 --whole-archive BLD/build/vmkdriver-iscsi_linux_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/iscsi_linux/iscsi_linux_9_2_1_0.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libfc_9_2_0_0-CUR/release/vmkernel64/libfc_9_2_0_0 --whole-archive BLD/build/vmkdriver-libfc_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/libfc/libfc_9_2_0_0.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS 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-mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE 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vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/mm/mempool.o vmkdrivers/src_92/vmklinux_92/linux/mm/mempool.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release 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-DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/pci.o vmkdrivers/src_92/vmklinux_92/linux/pci/pci.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/search.o vmkdrivers/src_92/vmklinux_92/linux/pci/search.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release 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-Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/core.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/core.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libata_9_2_0_0-CUR/release/vmkernel64/libata_9_2_0_0 --whole-archive BLD/build/vmkdriver-libata_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata_9_2_0_0.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libata_9_2_1_0-CUR/release/vmkernel64/libata_9_2_1_0 --whole-archive BLD/build/vmkdriver-libata_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata_9_2_1_0.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libfcoe_9_2_0_0-CUR/release/vmkernel64/libfcoe_9_2_0_0 --whole-archive BLD/build/vmkdriver-libfcoe_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_0_0.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libfcoe_9_2_1_0-CUR/release/vmkernel64/libfcoe_9_2_1_0 --whole-archive BLD/build/vmkdriver-libfcoe_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe_9_2_1_0.o +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release 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-Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dma-mapping.o vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dma-mapping.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 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--sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS 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-Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ 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-Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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-DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release 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-march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/mousedev.o vmkdrivers/src_92/vmklinux_92/linux/drivers/input/mousedev.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-apple.o vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-apple.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX 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-Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/constants.o vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/constants.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/scsi_error.o vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/scsi_error.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/firmware/dmi_scan.o vmkdrivers/src_92/vmklinux_92/linux/drivers/firmware/dmi_scan.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-partial.o vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-partial.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-wrappers.o vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-wrappers.c +$CC -DASSEMBLY -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/thunk.o vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/thunk.S +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_block.o vmkdrivers/src_92/vmklinux_92/vmware/linux_block.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE 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-IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_char.o vmkdrivers/src_92/vmklinux_92/vmware/linux_char.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_ctype.o vmkdrivers/src_92/vmklinux_92/vmware/linux_ctype.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dma.o vmkdrivers/src_92/vmklinux_92/vmware/linux_dma.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_hashtab.o vmkdrivers/src_92/vmklinux_92/vmware/linux_hashtab.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_heap.o vmkdrivers/src_92/vmklinux_92/vmware/linux_heap.c +$CC -fwrapv -pipe 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-DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version 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-fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_pci.o vmkdrivers/src_92/vmklinux_92/vmware/linux_pci.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_proc.o vmkdrivers/src_92/vmklinux_92/vmware/linux_proc.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE 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-g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY 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-DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version 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vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_transport.o vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_transport.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_signal.o vmkdrivers/src_92/vmklinux_92/vmware/linux_signal.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 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-IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_stress.o vmkdrivers/src_92/vmklinux_92/vmware/linux_stress.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE 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-DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_time.o vmkdrivers/src_92/vmklinux_92/vmware/linux_time.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_usb.o vmkdrivers/src_92/vmklinux_92/vmware/linux_usb.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_waitqueue.o vmkdrivers/src_92/vmklinux_92/vmware/linux_waitqueue.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_workqueue.o vmkdrivers/src_92/vmklinux_92/vmware/linux_workqueue.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include 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-DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -Ivmkdrivers/vmkplexer/include -Ivmkdrivers/src_92/vmklinux_92/vmware -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/linux -Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_kthread.o vmkdrivers/src_92/vmklinux_92/vmware/linux_kthread.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP 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-include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_input.o vmkdrivers/src_92/vmklinux_92/vmware/linux_input.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMKLINUX -DVMKLINUX_MODULE_HEAP_ANY_MEM -DVMKLINUX_MODULE_HEAP_PHYS_ANY_CONTIGUITY -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 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BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dcb.o vmkdrivers/src_92/vmklinux_92/vmware/linux_dcb.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_vmklinux_9 -DLINUX_MODULE_HEAP_INITIAL=256*1024 -DLINUX_MODULE_HEAP_MAX=20*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklinux_9 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-Ivmkdrivers/src_92/include/vmklinux_9 -Ivmkdrivers/src_92/vmklinux_92/linux/drivers/scsi -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_efi.o vmkdrivers/src_92/vmklinux_92/vmware/linux_efi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 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-D__VMWARE__ -Ivmkdrivers/src_92/drivers/scsi/fcoe -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -Ivmkdrivers/src_92/drivers/net -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libfcoe_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe.o vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib 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-D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-core.o vmkdrivers/src_92/drivers/ata/libata-core.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ 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-mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ 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-mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DGPLED_CODE -DKBUILD_MODNAME=\"vmklinux_9_2_2_0\" -DLINUX_MODULE_VERSION=\"5.5.0\" -DMODULE -DNO_FLOATING_POINT -DPRODUCT_VERSION=5.5.0 -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_MPP -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_NPIV -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_BINARY_INCOMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/vmklinux_9_2_2_0 -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/vmklinux_9_2_2_0 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-vmklinux_9_2_2_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_2_0/vmklinux_9_2_2_0.o vmkdrivers/src_92/vmklinux_9_2_2_0/vmklinux_9_2_2_0.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-scsi.o vmkdrivers/src_92/drivers/ata/libata-scsi.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-sff.o vmkdrivers/src_92/drivers/ata/libata-sff.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-vmklnx.o vmkdrivers/src_92/drivers/ata/libata-vmklnx.c +$CC -fwrapv -pipe -fno-working-directory -g -ggdb3 -O2 -fno-strict-aliasing -mcld -mcmodel=smallhigh -Wall -Werror -Wstrict-prototypes -falign-functions=4 -falign-jumps=4 -falign-loops=4 -ffreestanding -fno-common -fno-omit-frame-pointer -fno-strength-reduce -march=x86-64 -minline-all-stringops -mno-red-zone -nostartfiles -nostdlib -mno-mmx -mno-3dnow -mno-sse -mno-sse2 --sysroot=/nowhere -Wno-array-bounds -Wall -Wdeclaration-after-statement -Wno-unused-value -Wno-pointer-sign -Wno-strict-prototypes -Wno-declaration-after-statement -Wno-declaration-after-statement -DBUILT_BY_kwanma -DCONFIG_COMPAT -DCPU=x86-64 -DDEBUG_STUB -DEXPORT_SYMTAB -DGPLED_CODE -DKBUILD_MODNAME=\"libata_92\" -DLINUX_MODULE_AUX_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_HEAP_INITIAL=1*1024*1024 -DLINUX_MODULE_HEAP_MAX=8*1024*1024 -DLINUX_MODULE_HEAP_NAME=vmklnx_libata_92 -DLINUX_MODULE_VERSION=\"3.00.9.2\" -DMODULE -DNO_FLOATING_POINT -DVMKERNEL_MODULE -DVMK_DEVKIT_HAS_API_VMKAPI_BASE -DVMK_DEVKIT_HAS_API_VMKAPI_DEVICE -DVMK_DEVKIT_HAS_API_VMKAPI_ISCSI -DVMK_DEVKIT_HAS_API_VMKAPI_NET -DVMK_DEVKIT_HAS_API_VMKAPI_SCSI -DVMK_DEVKIT_IS_DDK -DVMK_DEVKIT_USES_BINARY_COMPATIBLE_APIS -DVMK_DEVKIT_USES_PUBLIC_APIS -DVMNIX -DVMX86_RELEASE -DVMX86_SERVER -DVMX86_VPROBES -D_LINUX -D_VMKDRVEI -D__KERNEL__ -D__VMKERNEL_MODULE__ -D__VMKERNEL__ -D__VMKLNX__ -D__VMK_GCC_BUG_ALIGNMENT_PADDING__ -D__VMWARE__ -Ivmkdrivers/src_92/drivers/ata -IBLD/build/version -IBLD/build/HEADERS/vmkdrivers-vmkernel/vmkernel64/release -Ivmkdrivers/src_92/include -Ivmkdrivers/src_92/include/vmklinux_92 -IBLD/build/HEADERS/CUR-92-vmkdrivers-asm-x64/vmkernel64/release -IBLD/build/HEADERS/vmkapi-current-all-public-bincomp/vmkernel64/release -IBLD/build/HEADERS/CUR-92-vmkdrivers-namespace/vmkernel64/release/libata_92 -include vmkdrivers/src_92/include/linux/autoconf.h -c -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o vmkdrivers/src_92/common/vmklinux_module.c +$LD $LD_OPTS -r -o BLD/build/vmkdriver-vmklinux_9_2_2_0-CUR/release/vmkernel64/vmklinux_9_2_2_0 --whole-archive BLD/build/vmkdriver-vmklinux_9_2_2_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_2_0/vmklinux_9_2_2_0.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/vmklinux_9_2_0_0 --whole-archive BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0_scsi.o BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0.o BLD/build/vmkdriver-vmklinux_9_2_0_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_0_0/vmklinux_9_2_0_0_pm.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-vmklinux_9_2_1_0-CUR/release/vmkernel64/vmklinux_9_2_1_0 --whole-archive BLD/build/vmkdriver-vmklinux_9_2_1_0-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_9_2_1_0/vmklinux_9_2_1_0.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/vmklinux_9 --whole-archive BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/softirq.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/wait.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/kernel/devres.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/klist.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/kref.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/sort.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/vsprintf.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/string.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/idr.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/hweight.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/devres.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/semaphore-sleepers.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/radix-tree.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inflate.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inftrees.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inffast.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/inflate_syms.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/lib/zlib_inflate/infutil.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/mm/mempool.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/ethtool.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/skbuff.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/net/inet_lro.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/pci.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/search.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/msi.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/pci/proc.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/fs/seq_file.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/scsi/scsi_proc.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/core.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/bus.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dd.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/driver.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/class.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/devres.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/platform.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/dma-mapping.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/base/runtime.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/keyboard.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/defkeymap.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/char/consolemap.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/input.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/ff-core.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/input/mousedev.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-apple.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-belkin.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-cherry.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-core.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-cypress.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-ezkey.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-input.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-kye.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-lg.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/hid/hid-microsoft.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/constants.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/scsi/scsi_error.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/drivers/firmware/dmi_scan.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-partial.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/csum-wrappers.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/linux/arch/x86_64/lib/thunk.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_block.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_char.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_ctype.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dma.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_hashtab.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_heap.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_irq.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_net.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_pci.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_proc.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_rcu.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_lld_if.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_transport.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_scsi_vmk_if.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_signal.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_stress.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_stubs.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_task.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_time.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_usb.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_waitqueue.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_workqueue.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_notifier.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_kthread.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_input.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_cna.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dcb.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_iodm.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_dump.o BLD/build/vmkdriver-vmklinux_9-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/vmklinux_92/vmware/linux_efi.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/libfcoe_92 --whole-archive BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/scsi/fcoe/libfcoe.o BLD/build/vmkdriver-libfcoe_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o +$LD $LD_OPTS -r -o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/libata_92 --whole-archive BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-core.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-eh.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-pmp.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-scsi.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-sff.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/drivers/ata/libata-vmklnx.o BLD/build/vmkdriver-libata_92-CUR/release/vmkernel64/SUBDIRS/vmkdrivers/src_92/common/vmklinux_module.o diff --git a/collect-drivers.sh b/collect-drivers.sh new file mode 100755 index 0000000..d37fc60 --- /dev/null +++ b/collect-drivers.sh @@ -0,0 +1,13 @@ +#! /bin/bash + +# Iterate through this directory and copy all of the driver files into a directory +mkdir drivers +for filename in * +do + if [[ "$filename" == vmkdriver* ]]; then + driverName=${filename//vmkdriver-/} + driverName=${driverName//-CUR/} + driverPath=$filename/release/vmkernel64/$driverName + cp $driverPath drivers + fi +done diff --git a/install.sh b/install.sh deleted file mode 100644 index 9c46ede..0000000 --- a/install.sh +++ /dev/null @@ -1,75 +0,0 @@ -#!/bin/sh - -set -e -#set -x - -TMP=/vmfs/volumes/datastore1/temp -DRIVERS=/vmfs/volumes/datastore1/drivers - -mkdir -p $TMP -if [ ! -d $DRIVERS ]; -then - echo Could not find $DRIVERS dir -fi - -for driver_path in `find /vmfs -name temp -prune -o -name "*.v0*" -print | sort` -do - echo +++ Examining $driver_path - REPLACE_IT=0 - basename=`basename $driver_path` - - rm -f $TMP/$basename - zcat $driver_path > $TMP/$basename - - vmtar -x $TMP/$basename -o $TMP/$basename.tar - - rm -rf $TMP/$basename.tmp - mkdir -p $TMP/$basename.tmp - - tar -C $TMP/$basename.tmp -xf $TMP/$basename.tar - - # For each driver found in the ESXi tarball, see if it - # is in the OSS tarball, and replace it if it is. - if [ -d $TMP/$basename.tmp/usr/lib/vmware/vmkmod ] - then - for driver in `ls $TMP/$basename.tmp/usr/lib/vmware/vmkmod/` - do - repl=$DRIVERS/$driver - if [ -e $repl ] - then - dst=$TMP/$basename.tmp/usr/lib/vmware/vmkmod/$driver - echo Updating $dst with $repl - cp $repl $dst - # we found something to replace - REPLACE_IT=1 - fi - done - fi - - # If we updated a driver, make a new tarball and move it in - # place. - if [ $REPLACE_IT == 1 ] - then - cd $TMP/$basename.tmp - rm -f $TMP/$basename.new.tar - tar -cf $TMP/$basename.new.tar * - cd $OLDPWD - - rm -f $TMP/$basename.new - vmtar -c $TMP/$basename.new.tar -o $TMP/$basename.new - - rm -f $TMP/$basename.new.gz - gzip $TMP/$basename.new - - echo +++ Replacing $driver_path with $TMP/$basename.new.gz - #echo -n OLD: - #ls -la $driver_path - cp $TMP/$basename.new.gz $driver_path - #echo -n SRC: - #ls -la $TMP/$basename.new.gz - #echo -n NEW: - #ls -la $driver_path - else - echo +++ No updates needed for $driver_path - fi -done diff --git a/update-drivers.sh b/update-drivers.sh new file mode 100755 index 0000000..2002625 --- /dev/null +++ b/update-drivers.sh @@ -0,0 +1,76 @@ +#!/bin/sh +# Update driver files with contents of "drivers" directory + +set -e + +TMP=$PWD/tmp +DRIVERS=$PWD/drivers + +mkdir -p $TMP +if [ ! -d $DRIVERS ] +then + echo "Could not find \"$DRIVERS\" directory" + exit 1 +fi + +for driver_path in `find /vmfs -name temp -prune -o -name "*.v0*" -print | sort` +do + echo "+++ Examining $driver_path" + REPLACE_IT=0 + basename=`basename $driver_path` + + rm -f $TMP/$basename + zcat $driver_path > $TMP/$basename + + vmtar -x $TMP/$basename -o $TMP/$basename.tar + + rm -rf $TMP/$basename.tmp + mkdir -p $TMP/$basename.tmp + + tar -C $TMP/$basename.tmp -xf $TMP/$basename.tar + + # For each driver found in the ESXi tarball, see if it + # is in the OSS tarball, and replace it if it is. + if [ -d $TMP/$basename.tmp/usr/lib/vmware/vmkmod ] + then + for driver in `ls $TMP/$basename.tmp/usr/lib/vmware/vmkmod/` + do + repl=$DRIVERS/$driver + if [ -e $repl ] + then + dst=$TMP/$basename.tmp/usr/lib/vmware/vmkmod/$driver + echo Updating $dst with $repl + cp $repl $dst + # we found something to replace + REPLACE_IT=1 + fi + done + fi + + # If we updated a driver, make a new tarball and move it in + # place. + if [ $REPLACE_IT == 1 ] + then + cd $TMP/$basename.tmp + rm -f $TMP/$basename.new.tar + tar -cf $TMP/$basename.new.tar * + cd $OLDPWD + + rm -f $TMP/$basename.new + vmtar -c $TMP/$basename.new.tar -o $TMP/$basename.new + + rm -f $TMP/$basename.new.gz + gzip $TMP/$basename.new + + echo +++ Replacing $driver_path with $TMP/$basename.new.gz + #echo -n OLD: + #ls -la $driver_path + cp $TMP/$basename.new.gz $driver_path + #echo -n SRC: + #ls -la $TMP/$basename.new.gz + #echo -n NEW: + #ls -la $driver_path + else + echo +++ No updates needed for $driver_path + fi +done diff --git a/vmkdrivers/src_9/drivers/ata/ahci.c b/vmkdrivers/src_9/drivers/ata/ahci.c index 4910605..c9d2102 100644 --- a/vmkdrivers/src_9/drivers/ata/ahci.c +++ b/vmkdrivers/src_9/drivers/ata/ahci.c @@ -49,8 +49,12 @@ #include #include +#if defined(__VMKLNX__) +#include +#endif + #define DRV_NAME "ahci" -#define DRV_VERSION "3.0-15vmw" +#define DRV_VERSION "3.0-17vmw" #if defined(__VMKLNX__) static int ahci_skip_host_reset = 0; @@ -614,9 +618,22 @@ static const struct pci_device_id ahci_pci_tbl[] = { { PCI_VDEVICE(INTEL, 0x2326), board_ahci }, /* Cave Creek AHCI */ { PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */ { PCI_VDEVICE(INTEL, 0x8c03), board_ahci }, /* Lynx Point AHCI */ - { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg RAID */ - { PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* Wellsburg RAID */ - { PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Wellsburg RAID */ + { PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */ + { PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */ + { PCI_VDEVICE(INTEL, 0x1f24), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f25), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f26), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f27), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f2e), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f2f), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f32), board_ahci }, /* Avoton AHCI */ + { PCI_VDEVICE(INTEL, 0x1f33), board_ahci }, /* Avoton AHCI */ + { PCI_VDEVICE(INTEL, 0x1f34), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f35), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f36), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f37), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f3e), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x1f3f), board_ahci }, /* Avoton RAID */ { PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */ { PCI_VDEVICE(INTEL, 0x8d04), board_ahci }, /* Wellsburg RAID */ { PCI_VDEVICE(INTEL, 0x8d06), board_ahci }, /* Wellsburg RAID */ @@ -1949,6 +1966,12 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) } if (irq_stat & (PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)) { +#if defined(__VMKLNX__) + if ((irq_stat & PORT_IRQ_PHYRDY) && (ap->link.device[0].sdev)) { + vmklnx_scsi_device_hot_removed(ap->link.device[0].sdev); + ata_ehi_push_desc(host_ehi, "hotplug handled"); + } +#endif ata_ehi_hotplugged(host_ehi); ata_ehi_push_desc(host_ehi, "%s", irq_stat & PORT_IRQ_CONNECT ? diff --git a/vmkdrivers/src_9/drivers/ata/ata_piix.c b/vmkdrivers/src_9/drivers/ata/ata_piix.c index ba043e9..b72a3b9 100644 --- a/vmkdrivers/src_9/drivers/ata/ata_piix.c +++ b/vmkdrivers/src_9/drivers/ata/ata_piix.c @@ -102,7 +102,7 @@ #endif /* defined(__VMKLNX__) */ #define DRV_NAME "ata_piix" -#define DRV_VERSION "2.12-7vmw" +#define DRV_VERSION "2.12-8vmw" enum { PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ @@ -328,6 +328,14 @@ static const struct pci_device_id piix_pci_tbl[] = { { 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, /* SATA Controller IDE (Lynx Point) */ { 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, + /* SATA Controller IDE (Avoton) */ + { 0x8086, 0x1f20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, + /* SATA Controller IDE (Avoton) */ + { 0x8086, 0x1f21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, + /* SATA Controller IDE (Avoton) */ + { 0x8086, 0x1f30, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, + /* SATA Controller IDE (Avoton) */ + { 0x8086, 0x1f31, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, /* SATA Controller IDE (Wellsburg) */ { 0x8086, 0x8d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb }, /* SATA Controller IDE (Wellsburg) */ @@ -1820,7 +1828,13 @@ static int __init piix_init(void) if (rc) return rc; +#if !defined(__VMKLNX__) + /* + * Avoid probe failure for devices that are discovered after + * driver is loaded successfully. + */ in_module_init = 0; +#endif /* defined(__VMKLNX__) */ DPRINTK("done\n"); return 0; diff --git a/vmkdrivers/src_9/drivers/ata/sata_sil24.c b/vmkdrivers/src_9/drivers/ata/sata_sil24.c index da91a1a..160196e 100644 --- a/vmkdrivers/src_9/drivers/ata/sata_sil24.c +++ b/vmkdrivers/src_9/drivers/ata/sata_sil24.c @@ -31,7 +31,7 @@ #include #define DRV_NAME "sata_sil24" -#define DRV_VERSION "1.1-1vmw" +#define DRV_VERSION "2.12-7vmw" /* * Port request block (PRB) 32 bytes @@ -890,7 +890,7 @@ static void sil24_qc_prep(struct ata_queued_cmd *qc) } else { prb = &cb->atapi.prb; sge = cb->atapi.sge; - memset(cb->atapi.cdb, 0, 32); + memset(cb->atapi.cdb, 0, ATAPI_CDB_LEN); memcpy(cb->atapi.cdb, qc->cdb, qc->dev->cdb_len); if (ata_is_data(qc->tf.protocol)) { diff --git a/vmkdrivers/src_9/drivers/char/openipmi/includes/ipmi_si_sm.h b/vmkdrivers/src_9/drivers/char/openipmi/includes/ipmi_si_sm.h index 4b731b2..df89f73 100644 --- a/vmkdrivers/src_9/drivers/char/openipmi/includes/ipmi_si_sm.h +++ b/vmkdrivers/src_9/drivers/char/openipmi/includes/ipmi_si_sm.h @@ -34,22 +34,27 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -/* This is defined by the state machines themselves, it is an opaque - data type for them to use. */ +/* + * This is defined by the state machines themselves, it is an opaque + * data type for them to use. + */ struct si_sm_data; -/* The structure for doing I/O in the state machine. The state - machine doesn't have the actual I/O routines, they are done through - this interface. */ -struct si_sm_io -{ +/* + * The structure for doing I/O in the state machine. The state + * machine doesn't have the actual I/O routines, they are done through + * this interface. + */ +struct si_sm_io { unsigned char (*inputb)(struct si_sm_io *io, unsigned int offset); void (*outputb)(struct si_sm_io *io, unsigned int offset, unsigned char b); - /* Generic info used by the actual handling routines, the - state machine shouldn't touch these. */ + /* + * Generic info used by the actual handling routines, the + * state machine shouldn't touch these. + */ void __iomem *addr; int regspacing; int regsize; @@ -59,53 +64,67 @@ struct si_sm_io }; /* Results of SMI events. */ -enum si_sm_result -{ +enum si_sm_result { SI_SM_CALL_WITHOUT_DELAY, /* Call the driver again immediately */ SI_SM_CALL_WITH_DELAY, /* Delay some before calling again. */ - SI_SM_CALL_WITH_TICK_DELAY, /* Delay at least 1 tick before calling again. */ + SI_SM_CALL_WITH_TICK_DELAY,/* Delay >=1 tick before calling again. */ SI_SM_TRANSACTION_COMPLETE, /* A transaction is finished. */ SI_SM_IDLE, /* The SM is in idle state. */ SI_SM_HOSED, /* The hardware violated the state machine. */ - SI_SM_ATTN /* The hardware is asserting attn and the - state machine is idle. */ + + /* + * The hardware is asserting attn and the state machine is + * idle. + */ + SI_SM_ATTN }; /* Handlers for the SMI state machine. */ -struct si_sm_handlers -{ - /* Put the version number of the state machine here so the - upper layer can print it. */ +struct si_sm_handlers { + /* + * Put the version number of the state machine here so the + * upper layer can print it. + */ char *version; - /* Initialize the data and return the amount of I/O space to - reserve for the space. */ + /* + * Initialize the data and return the amount of I/O space to + * reserve for the space. + */ unsigned int (*init_data)(struct si_sm_data *smi, struct si_sm_io *io); - /* Start a new transaction in the state machine. This will - return -2 if the state machine is not idle, -1 if the size - is invalid (to large or too small), or 0 if the transaction - is successfully completed. */ + /* + * Start a new transaction in the state machine. This will + * return -2 if the state machine is not idle, -1 if the size + * is invalid (to large or too small), or 0 if the transaction + * is successfully completed. + */ int (*start_transaction)(struct si_sm_data *smi, unsigned char *data, unsigned int size); - /* Return the results after the transaction. This will return - -1 if the buffer is too small, zero if no transaction is - present, or the actual length of the result data. */ + /* + * Return the results after the transaction. This will return + * -1 if the buffer is too small, zero if no transaction is + * present, or the actual length of the result data. + */ int (*get_result)(struct si_sm_data *smi, unsigned char *data, unsigned int length); - /* Call this periodically (for a polled interface) or upon - receiving an interrupt (for a interrupt-driven interface). - If interrupt driven, you should probably poll this - periodically when not in idle state. This should be called - with the time that passed since the last call, if it is - significant. Time is in microseconds. */ + /* + * Call this periodically (for a polled interface) or upon + * receiving an interrupt (for a interrupt-driven interface). + * If interrupt driven, you should probably poll this + * periodically when not in idle state. This should be called + * with the time that passed since the last call, if it is + * significant. Time is in microseconds. + */ enum si_sm_result (*event)(struct si_sm_data *smi, long time); - /* Attempt to detect an SMI. Returns 0 on success or nonzero - on failure. */ + /* + * Attempt to detect an SMI. Returns 0 on success or nonzero + * on failure. + */ int (*detect)(struct si_sm_data *smi); /* The interface is shutting down, so clean it up. */ diff --git a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.c b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.c index 7a2fd44..f49cdc9 100644 --- a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.c +++ b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_devintf/ipmi_devintf.c @@ -34,8 +34,8 @@ #include #include #include -#include #include +#include #include #include #include @@ -46,7 +46,7 @@ #if defined(__VMKLNX__) -#define IPMI_DRIVER_VERSION "39.1-4vmw" +#define IPMI_DRIVER_VERSION "39.2-6vmw" #define MAX_DEVICES 10 static int majors[MAX_DEVICES]; @@ -65,6 +65,7 @@ struct ipmi_file_private unsigned int default_retry_time_ms; }; +static DEFINE_MUTEX(ipmi_mutex); static void file_receive_handler(struct ipmi_recv_msg *msg, void *handler_data) { @@ -108,7 +109,9 @@ static int ipmi_fasync(int fd, struct file *file, int on) struct ipmi_file_private *priv = file->private_data; int result; + mutex_lock(&ipmi_mutex); /* could race against open() otherwise */ result = fasync_helper(fd, file, on, &priv->fasync_queue); + mutex_unlock(&ipmi_mutex); return (result); } @@ -128,20 +131,21 @@ static int ipmi_open(struct inode *inode, struct file *file) int rv; struct ipmi_file_private *priv; int if_num; - for (if_num = 0; if_num < MAX_DEVICES; if_num++) { - if (majors[if_num] == imajor(inode)) { - break; - } - } - if (if_num == MAX_DEVICES) { - return -ENODEV; - } + for (if_num = 0; if_num < MAX_DEVICES; if_num++) { + if (majors[if_num] == imajor(inode)) { + break; + } + } + if (if_num == MAX_DEVICES) { + return -ENODEV; + } #endif //__VMKLNX__ priv = kmalloc(sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; + mutex_lock(&ipmi_mutex); priv->file = file; rv = ipmi_create_user(if_num, @@ -150,7 +154,7 @@ static int ipmi_open(struct inode *inode, struct file *file) &(priv->user)); if (rv) { kfree(priv); - return rv; + goto out; } file->private_data = priv; @@ -165,7 +169,9 @@ static int ipmi_open(struct inode *inode, struct file *file) priv->default_retries = -1; priv->default_retry_time_ms = 0; - return 0; +out: + mutex_unlock(&ipmi_mutex); + return rv; } static int ipmi_release(struct inode *inode, struct file *file) @@ -177,7 +183,9 @@ static int ipmi_release(struct inode *inode, struct file *file) if (rv) return rv; +#if defined(__VMKLNX__) ipmi_fasync (-1, file, 0); +#endif /* FIXME - free the messages in the list. */ kfree(priv); @@ -207,8 +215,10 @@ static int handle_send_req(ipmi_user_t user, if (!msg.data) return -ENOMEM; - /* From here out we cannot return, we must jump to "out" for - error exits to free msgdata. */ + /* + * From here out we cannot return, we must jump to "out" for + * error exits to free msgdata. + */ rv = ipmi_validate_addr(&addr, req->addr_len); if (rv) @@ -244,8 +254,7 @@ static int handle_send_req(ipmi_user_t user, return rv; } -static int ipmi_ioctl(struct inode *inode, - struct file *file, +static int ipmi_ioctl(struct file *file, unsigned int cmd, unsigned long data) { @@ -253,7 +262,7 @@ static int ipmi_ioctl(struct inode *inode, struct ipmi_file_private *priv = file->private_data; void __user *arg = (void __user *)data; - switch (cmd) + switch (cmd) { case IPMICTL_SEND_COMMAND: { @@ -295,7 +304,7 @@ static int ipmi_ioctl(struct inode *inode, struct list_head *entry; struct ipmi_recv_msg *msg; unsigned long flags; - + rv = 0; if (copy_from_user(&rsp, arg, sizeof(rsp))) { @@ -303,14 +312,16 @@ static int ipmi_ioctl(struct inode *inode, break; } - /* We claim a mutex because we don't want two - users getting something from the queue at a time. - Since we have to release the spinlock before we can - copy the data to the user, it's possible another - user will grab something from the queue, too. Then - the messages might get out of order if something - fails and the message gets put back onto the - queue. This mutex prevents that problem. */ + /* + * We claim a mutex because we don't want two + * users getting something from the queue at a time. + * Since we have to release the spinlock before we can + * copy the data to the user, it's possible another + * user will grab something from the queue, too. Then + * the messages might get out of order if something + * fails and the message gets put back onto the + * queue. This mutex prevents that problem. + */ mutex_lock(&priv->recv_mutex); /* Grab the message off the list. */ @@ -375,8 +386,10 @@ static int ipmi_ioctl(struct inode *inode, break; recv_putback_on_err: - /* If we got an error, put the message back onto - the head of the queue. */ + /* + * If we got an error, put the message back onto + * the head of the queue. + */ spin_lock_irqsave(&(priv->recv_msg_lock), flags); list_add(entry, &(priv->recv_msgs)); spin_unlock_irqrestore(&(priv->recv_msg_lock), flags); @@ -642,10 +655,27 @@ static int ipmi_ioctl(struct inode *inode, break; } } - + return rv; } +/* + * Note: it doesn't make sense to take the BKL here but + * not in compat_ipmi_ioctl. -arnd + */ +static long ipmi_unlocked_ioctl(struct file *file, + unsigned int cmd, + unsigned long data) +{ + int ret; + + mutex_lock(&ipmi_mutex); + ret = ipmi_ioctl(file, cmd, data); + mutex_unlock(&ipmi_mutex); + + return ret; +} + #ifdef CONFIG_COMPAT /* @@ -788,18 +818,20 @@ static long compat_ipmi_receive(struct file *file, unsigned int cmd, struct ipmi struct list_head *entry; struct ipmi_recv_msg *msg; unsigned long flags; - + rv = 0; rsp = *data; - /* We claim a mutex because we don't want two - users getting something from the queue at a time. - Since we have to release the spinlock before we can - copy the data to the user, it's possible another - user will grab something from the queue, too. Then - the messages might get out of order if something - fails and the message gets put back onto the - queue. This mutex prevents that problem. */ + /* + * We claim a mutex because we don't want two + * users getting something from the queue at a time. + * Since we have to release the spinlock before we can + * copy the data to the user, it's possible another + * user will grab something from the queue, too. Then + * the messages might get out of order if something + * fails and the message gets put back onto the + * queue. This mutex prevents that problem. + */ mutex_lock(&priv->recv_mutex); /* Grab the message off the list. */ @@ -861,8 +893,10 @@ static long compat_ipmi_receive(struct file *file, unsigned int cmd, struct ipmi return rv; recv_putback_on_err: - /* If we got an error, put the message back onto - the head of the queue. */ + /* + * If we got an error, put the message back onto + * the head of the queue. + */ spin_lock_irqsave(&(priv->recv_msg_lock), flags); list_add(entry, &(priv->recv_msgs)); spin_unlock_irqrestore(&(priv->recv_msg_lock), flags); @@ -923,7 +957,7 @@ static long compat_ipmi_ioctl(struct file *filep, unsigned int cmd, if (copy_to_user(precv64, &recv64, sizeof(recv64))) return -EFAULT; - rc = ipmi_ioctl(filep->f_path.dentry->d_inode, filep, + rc = ipmi_ioctl(filep, ((cmd == COMPAT_IPMICTL_RECEIVE_MSG) ? IPMICTL_RECEIVE_MSG : IPMICTL_RECEIVE_MSG_TRUNC), @@ -931,11 +965,11 @@ static long compat_ipmi_ioctl(struct file *filep, unsigned int cmd, #endif /* #if defined(__VMKLNX__) */ #if defined(__VMKLNX__) - if (rc != 0 && - (cmd != COMPAT_IPMICTL_RECEIVE_MSG_TRUNC || - rc != -EMSGSIZE)) { - return rc; - } + if (rc != 0 && + (cmd != COMPAT_IPMICTL_RECEIVE_MSG_TRUNC || + rc != -EMSGSIZE)) { + return rc; + } #else if (rc != 0) return rc; @@ -952,16 +986,7 @@ static long compat_ipmi_ioctl(struct file *filep, unsigned int cmd, return rc; } default: -#if defined(__VMKLNX__) - /* - * The inode information is not referenced in that function. - * This is just to make the interface happy. - * The original code wont compile with vmklinux. - */ - return ipmi_ioctl(NULL, filep, cmd, arg); -#else - return ipmi_ioctl(filep->f_path.dentry->d_inode, filep, cmd, arg); -#endif /* #if defined(__VMKLNX__) */ + return ipmi_ioctl(filep, cmd, arg); } } @@ -969,7 +994,7 @@ static long compat_ipmi_ioctl(struct file *filep, unsigned int cmd, static const struct file_operations ipmi_fops = { .owner = THIS_MODULE, - .ioctl = ipmi_ioctl, + .unlocked_ioctl = ipmi_unlocked_ioctl, #ifdef CONFIG_COMPAT .compat_ioctl = compat_ipmi_ioctl, #endif @@ -977,6 +1002,10 @@ static const struct file_operations ipmi_fops = { .release = ipmi_release, .fasync = ipmi_fasync, .poll = ipmi_poll, +#if !defined(__VMKLNX__) + //VMKLNX does not provide a generic noop_llseek stub to link. + .llseek = noop_llseek, +#endif }; #if defined(__VMKLNX__) @@ -1017,16 +1046,21 @@ static void ipmi_new_smi(int if_num, struct device *device) entry->dev = dev; mutex_lock(®_list_mutex); +#if defined(__VMKLNX__) + //VMKLNX does not provide a non-racy device-create yet device_create(ipmi_class, device, dev, "ipmi%d", if_num); +#else + device_create(ipmi_class, device, dev, NULL, "ipmi%d", if_num); +#endif list_add(&entry->link, ®_list); #if defined(__VMKLNX__) - { - char name[6]; - if (if_num <= MAX_DEVICES) { - snprintf(name, sizeof name, "ipmi%d", if_num); - majors[if_num] = register_chrdev(0, name, &ipmi_fops); - } - } + { + char name[6]; + if (if_num <= MAX_DEVICES) { + snprintf(name, sizeof name, "ipmi%d", if_num); + majors[if_num] = register_chrdev(0, name, &ipmi_fops); + } + } #endif //__VMKLNX__ mutex_unlock(®_list_mutex); } @@ -1046,11 +1080,11 @@ static void ipmi_smi_gone(int if_num) } device_destroy(ipmi_class, dev); #if defined(__VMKLNX__) - if (majors[if_num] > 0) { - char name[6]; - snprintf(name, sizeof name, "ipmi%d", if_num); - majors[if_num] = unregister_chrdev(majors[if_num], name); - } + if (majors[if_num] > 0) { + char name[6]; + snprintf(name, sizeof name, "ipmi%d", if_num); + majors[if_num] = unregister_chrdev(majors[if_num], name); + } #endif //__VMKLNX__ mutex_unlock(®_list_mutex); } @@ -1062,7 +1096,7 @@ static struct ipmi_smi_watcher smi_watcher = .smi_gone = ipmi_smi_gone, }; -static __init int init_ipmi_devintf(void) +static int __init init_ipmi_devintf(void) { int rv; @@ -1104,7 +1138,7 @@ static __init int init_ipmi_devintf(void) } module_init(init_ipmi_devintf); -static __exit void cleanup_ipmi(void) +static void __exit cleanup_ipmi(void) { struct ipmi_reg_list *entry, *entry2; mutex_lock(®_list_mutex); @@ -1126,6 +1160,7 @@ module_exit(cleanup_ipmi); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Corey Minyard "); MODULE_DESCRIPTION("Linux device interface for the IPMI message handler."); +MODULE_ALIAS("platform:ipmi_si"); #if defined(__VMKLNX__) MODULE_VERSION(IPMI_DRIVER_VERSION); #endif diff --git a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.c b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.c index 5f2abbc..715188c 100644 --- a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.c +++ b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_msghandler/ipmi_msghandler.c @@ -33,8 +33,9 @@ #include #include -#include #include +#include +#include #include #include #include @@ -44,6 +45,7 @@ #include #include #include +#include #if defined(__VMKLNX__) #include #include "kcompat.h" @@ -52,10 +54,12 @@ #define PFX "IPMI message handler: " -#define IPMI_DRIVER_VERSION "39.1-4vmw" +#define IPMI_DRIVER_VERSION "39.2-6vmw" static struct ipmi_recv_msg *ipmi_alloc_recv_msg(void); static int ipmi_init_msghandler(void); +static void smi_recv_tasklet(unsigned long); +static void handle_new_recv_msgs(ipmi_smi_t intf); static int initialized; @@ -68,16 +72,17 @@ static struct proc_dir_entry *proc_ipmi_root; #define MAX_EVENTS_IN_QUEUE 25 -/* Don't let a message sit in a queue forever, always time it with at lest - the max message timer. This is in milliseconds. */ +/* + * Don't let a message sit in a queue forever, always time it with at least + * the max message timer. This is in milliseconds. + */ #define MAX_MSG_TIMEOUT 60000 /* * The main "user" data structure. */ -struct ipmi_user -{ +struct ipmi_user { struct list_head link; /* Set to "0" when the user is destroyed. */ @@ -96,8 +101,7 @@ struct ipmi_user int gets_events; }; -struct cmd_rcvr -{ +struct cmd_rcvr { struct list_head link; ipmi_user_t user; @@ -111,12 +115,12 @@ struct cmd_rcvr * or change any data until the RCU period completes. So we * use this next variable during mass deletion so we can have * a list and don't have to wait and restart the search on - * every individual deletion of a command. */ + * every individual deletion of a command. + */ struct cmd_rcvr *next; }; -struct seq_table -{ +struct seq_table { unsigned int inuse : 1; unsigned int broadcast : 1; #if defined (__VMKLNX__) @@ -127,53 +131,60 @@ struct seq_table unsigned long orig_timeout; unsigned int retries_left; - /* To verify on an incoming send message response that this is - the message that the response is for, we keep a sequence id - and increment it every time we send a message. */ + /* + * To verify on an incoming send message response that this is + * the message that the response is for, we keep a sequence id + * and increment it every time we send a message. + */ long seqid; - /* This is held so we can properly respond to the message on a - timeout, and it is used to hold the temporary data for - retransmission, too. */ + /* + * This is held so we can properly respond to the message on a + * timeout, and it is used to hold the temporary data for + * retransmission, too. + */ struct ipmi_recv_msg *recv_msg; }; -/* Store the information in a msgid (long) to allow us to find a - sequence table entry from the msgid. */ +/* + * Store the information in a msgid (long) to allow us to find a + * sequence table entry from the msgid. + */ #define STORE_SEQ_IN_MSGID(seq, seqid) (((seq&0xff)<<26) | (seqid&0x3ffffff)) #define GET_SEQ_FROM_MSGID(msgid, seq, seqid) \ do { \ seq = ((msgid >> 26) & 0x3f); \ seqid = (msgid & 0x3fffff); \ - } while (0) + } while (0) #define NEXT_SEQID(seqid) (((seqid) + 1) & 0x3fffff) -struct ipmi_channel -{ +struct ipmi_channel { unsigned char medium; unsigned char protocol; - /* My slave address. This is initialized to IPMI_BMC_SLAVE_ADDR, - but may be changed by the user. */ + /* + * My slave address. This is initialized to IPMI_BMC_SLAVE_ADDR, + * but may be changed by the user. + */ unsigned char address; - /* My LUN. This should generally stay the SMS LUN, but just in - case... */ + /* + * My LUN. This should generally stay the SMS LUN, but just in + * case... + */ unsigned char lun; }; #ifdef CONFIG_PROC_FS -struct ipmi_proc_entry -{ +struct ipmi_proc_entry { char *name; struct ipmi_proc_entry *next; }; #endif -struct bmc_device -{ +struct bmc_device { struct platform_device *dev; struct ipmi_device_id id; unsigned char guid[16]; @@ -194,10 +205,112 @@ struct bmc_device struct device_attribute aux_firmware_rev_attr; }; +/* + * Various statistics for IPMI, these index stats[] in the ipmi_smi + * structure. + */ +enum ipmi_stat_indexes { + /* Commands we got from the user that were invalid. */ + IPMI_STAT_sent_invalid_commands = 0, + + /* Commands we sent to the MC. */ + IPMI_STAT_sent_local_commands, + + /* Responses from the MC that were delivered to a user. */ + IPMI_STAT_handled_local_responses, + + /* Responses from the MC that were not delivered to a user. */ + IPMI_STAT_unhandled_local_responses, + + /* Commands we sent out to the IPMB bus. */ + IPMI_STAT_sent_ipmb_commands, + + /* Commands sent on the IPMB that had errors on the SEND CMD */ + IPMI_STAT_sent_ipmb_command_errs, + + /* Each retransmit increments this count. */ + IPMI_STAT_retransmitted_ipmb_commands, + + /* + * When a message times out (runs out of retransmits) this is + * incremented. + */ + IPMI_STAT_timed_out_ipmb_commands, + + /* + * This is like above, but for broadcasts. Broadcasts are + * *not* included in the above count (they are expected to + * time out). + */ + IPMI_STAT_timed_out_ipmb_broadcasts, + + /* Responses I have sent to the IPMB bus. */ + IPMI_STAT_sent_ipmb_responses, + + /* The response was delivered to the user. */ + IPMI_STAT_handled_ipmb_responses, + + /* The response had invalid data in it. */ + IPMI_STAT_invalid_ipmb_responses, + + /* The response didn't have anyone waiting for it. */ + IPMI_STAT_unhandled_ipmb_responses, + + /* Commands we sent out to the IPMB bus. */ + IPMI_STAT_sent_lan_commands, + + /* Commands sent on the IPMB that had errors on the SEND CMD */ + IPMI_STAT_sent_lan_command_errs, + + /* Each retransmit increments this count. */ + IPMI_STAT_retransmitted_lan_commands, + + /* + * When a message times out (runs out of retransmits) this is + * incremented. + */ + IPMI_STAT_timed_out_lan_commands, + + /* Responses I have sent to the IPMB bus. */ + IPMI_STAT_sent_lan_responses, + + /* The response was delivered to the user. */ + IPMI_STAT_handled_lan_responses, + + /* The response had invalid data in it. */ + IPMI_STAT_invalid_lan_responses, + + /* The response didn't have anyone waiting for it. */ + IPMI_STAT_unhandled_lan_responses, + + /* The command was delivered to the user. */ + IPMI_STAT_handled_commands, + + /* The command had invalid data in it. */ + IPMI_STAT_invalid_commands, + + /* The command didn't have anyone waiting for it. */ + IPMI_STAT_unhandled_commands, + + /* Invalid data in an event. */ + IPMI_STAT_invalid_events, + + /* Events that were received with the proper format. */ + IPMI_STAT_events, + + /* Retransmissions on IPMB that failed. */ + IPMI_STAT_dropped_rexmit_ipmb_commands, + + /* Retransmissions on LAN that failed. */ + IPMI_STAT_dropped_rexmit_lan_commands, + + /* This *must* remain last, add new values above this. */ + IPMI_NUM_STATS +}; + #define IPMI_IPMB_NUM_SEQ 64 #define IPMI_MAX_CHANNELS 16 -struct ipmi_smi -{ +struct ipmi_smi { /* What interface number are we? */ int intf_num; @@ -206,8 +319,10 @@ struct ipmi_smi /* Used for a list of interfaces. */ struct list_head link; - /* The list of upper layers that are using me. seq_lock - * protects this. */ + /* + * The list of upper layers that are using me. seq_lock + * protects this. + */ struct list_head users; /* Information to supply to users. */ @@ -221,10 +336,12 @@ struct ipmi_smi char *my_dev_name; char *sysfs_name; - /* This is the lower-layer's sender routine. Note that you + /* + * This is the lower-layer's sender routine. Note that you * must either be holding the ipmi_interfaces_mutex or be in * an umpreemptible region to use this. You must fetch the - * value into a local variable and make sure it is not NULL. */ + * value into a local variable and make sure it is not NULL. + */ struct ipmi_smi_handlers *handlers; void *send_info; @@ -237,38 +354,49 @@ struct ipmi_smi /* Driver-model device for the system interface. */ struct device *si_dev; - /* A table of sequence numbers for this interface. We use the - sequence numbers for IPMB messages that go out of the - interface to match them up with their responses. A routine - is called periodically to time the items in this list. */ + /* + * A table of sequence numbers for this interface. We use the + * sequence numbers for IPMB messages that go out of the + * interface to match them up with their responses. A routine + * is called periodically to time the items in this list. + */ spinlock_t seq_lock; struct seq_table seq_table[IPMI_IPMB_NUM_SEQ]; int curr_seq; - /* Messages that were delayed for some reason (out of memory, - for instance), will go in here to be processed later in a - periodic timer interrupt. */ + /* + * Messages queued for delivery. If delivery fails (out of memory + * for instance), They will stay in here to be processed later in a + * periodic timer interrupt. The tasklet is for handling received + * messages directly from the handler. + */ spinlock_t waiting_msgs_lock; struct list_head waiting_msgs; + atomic_t watchdog_pretimeouts_to_deliver; + struct tasklet_struct recv_tasklet; - /* The list of command receivers that are registered for commands - on this interface. */ + /* + * The list of command receivers that are registered for commands + * on this interface. + */ struct mutex cmd_rcvrs_mutex; struct list_head cmd_rcvrs; - /* Events that were queues because no one was there to receive - them. */ + /* + * Events that were queues because no one was there to receive + * them. + */ spinlock_t events_lock; /* For dealing with event stuff. */ struct list_head waiting_events; unsigned int waiting_events_count; /* How many events in queue? */ - int delivering_events; -#if defined(__VMKLNX__) - char event_queue_full; -#endif + char delivering_events; + char event_msg_printed; - /* The event receiver for my BMC, only really used at panic - shutdown as a place to store this. */ + /* + * The event receiver for my BMC, only really used at panic + * shutdown as a place to store this. + */ unsigned char event_receiver; unsigned char event_receiver_lun; unsigned char local_sel_device; @@ -280,14 +408,18 @@ struct ipmi_smi int auto_maintenance_timeout; spinlock_t maintenance_mode_lock; /* Used in a timer... */ - /* A cheap hack, if this is non-null and a message to an - interface comes in with a NULL user, call this routine with - it. Note that the message will still be freed by the - caller. This only works on the system interface. */ + /* + * A cheap hack, if this is non-null and a message to an + * interface comes in with a NULL user, call this routine with + * it. Note that the message will still be freed by the + * caller. This only works on the system interface. + */ void (*null_user_handler)(ipmi_smi_t intf, struct ipmi_recv_msg *msg); - /* When we are scanning the channels for an SMI, this will - tell which channel we are scanning. */ + /* + * When we are scanning the channels for an SMI, this will + * tell which channel we are scanning. + */ int curr_channel; /* Channel information */ @@ -297,97 +429,60 @@ struct ipmi_smi struct proc_dir_entry *proc_dir; char proc_dir_name[10]; - spinlock_t counter_lock; /* For making counters atomic. */ + atomic_t stats[IPMI_NUM_STATS]; - /* Commands we got that were invalid. */ - unsigned int sent_invalid_commands; - - /* Commands we sent to the MC. */ - unsigned int sent_local_commands; - /* Responses from the MC that were delivered to a user. */ - unsigned int handled_local_responses; - /* Responses from the MC that were not delivered to a user. */ - unsigned int unhandled_local_responses; - - /* Commands we sent out to the IPMB bus. */ - unsigned int sent_ipmb_commands; - /* Commands sent on the IPMB that had errors on the SEND CMD */ - unsigned int sent_ipmb_command_errs; - /* Each retransmit increments this count. */ - unsigned int retransmitted_ipmb_commands; - /* When a message times out (runs out of retransmits) this is - incremented. */ - unsigned int timed_out_ipmb_commands; - - /* This is like above, but for broadcasts. Broadcasts are - *not* included in the above count (they are expected to - time out). */ - unsigned int timed_out_ipmb_broadcasts; - - /* Responses I have sent to the IPMB bus. */ - unsigned int sent_ipmb_responses; - - /* The response was delivered to the user. */ - unsigned int handled_ipmb_responses; - /* The response had invalid data in it. */ - unsigned int invalid_ipmb_responses; - /* The response didn't have anyone waiting for it. */ - unsigned int unhandled_ipmb_responses; - - /* Commands we sent out to the IPMB bus. */ - unsigned int sent_lan_commands; - /* Commands sent on the IPMB that had errors on the SEND CMD */ - unsigned int sent_lan_command_errs; - /* Each retransmit increments this count. */ - unsigned int retransmitted_lan_commands; - /* When a message times out (runs out of retransmits) this is - incremented. */ - unsigned int timed_out_lan_commands; - - /* Responses I have sent to the IPMB bus. */ - unsigned int sent_lan_responses; - - /* The response was delivered to the user. */ - unsigned int handled_lan_responses; - /* The response had invalid data in it. */ - unsigned int invalid_lan_responses; - /* The response didn't have anyone waiting for it. */ - unsigned int unhandled_lan_responses; - - /* The command was delivered to the user. */ - unsigned int handled_commands; - /* The command had invalid data in it. */ - unsigned int invalid_commands; - /* The command didn't have anyone waiting for it. */ - unsigned int unhandled_commands; - - /* Invalid data in an event. */ - unsigned int invalid_events; - /* Events that were received with the proper format. */ - unsigned int events; + /* + * run_to_completion duplicate of smb_info, smi_info + * and ipmi_serial_info structures. Used to decrease numbers of + * parameters passed by "low" level IPMI code. + */ + int run_to_completion; }; #define to_si_intf_from_dev(device) container_of(device, struct ipmi_smi, dev) -/** +/* * The driver model view of the IPMI messaging driver. */ -static struct device_driver ipmidriver = { +static struct platform_driver ipmidriver = { + .driver = { #if defined(__VMKLNX__) - .owner = THIS_MODULE, + .owner = THIS_MODULE, #endif - .name = "ipmi", - .bus = &platform_bus_type + .name = "ipmi", + .bus = &platform_bus_type + } }; static DEFINE_MUTEX(ipmidriver_mutex); -static struct list_head ipmi_interfaces = LIST_HEAD_INIT(ipmi_interfaces); +static LIST_HEAD(ipmi_interfaces); static DEFINE_MUTEX(ipmi_interfaces_mutex); -/* List of watchers that want to know when smi's are added and - deleted. */ -static struct list_head smi_watchers = LIST_HEAD_INIT(smi_watchers); +/* + * List of watchers that want to know when smi's are added and + * deleted. + */ +static LIST_HEAD(smi_watchers); static DEFINE_MUTEX(smi_watchers_mutex); +#define ipmi_inc_stat(intf, stat) \ + atomic_inc(&(intf)->stats[IPMI_STAT_ ## stat]) +#define ipmi_get_stat(intf, stat) \ + ((unsigned int) atomic_read(&(intf)->stats[IPMI_STAT_ ## stat])) + +static int is_lan_addr(struct ipmi_addr *addr) +{ + return addr->addr_type == IPMI_LAN_ADDR_TYPE; +} + +static int is_ipmb_addr(struct ipmi_addr *addr) +{ + return addr->addr_type == IPMI_IPMB_ADDR_TYPE; +} + +static int is_ipmb_bcast_addr(struct ipmi_addr *addr) +{ + return addr->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE; +} static void free_recv_msg_list(struct list_head *q) { @@ -415,6 +510,8 @@ static void clean_up_interface_data(ipmi_smi_t intf) struct cmd_rcvr *rcvr, *rcvr2; struct list_head list; + tasklet_kill(&intf->recv_tasklet); + free_smi_msg_list(&intf->waiting_msgs); free_recv_msg_list(&intf->waiting_events); @@ -433,9 +530,7 @@ static void clean_up_interface_data(ipmi_smi_t intf) for (i = 0; i < IPMI_IPMB_NUM_SEQ; i++) { if ((intf->seq_table[i].inuse) && (intf->seq_table[i].recv_msg)) - { ipmi_free_recv_msg(intf->seq_table[i].recv_msg); - } } } @@ -456,7 +551,7 @@ struct watcher_entry { int ipmi_smi_watcher_register(struct ipmi_smi_watcher *watcher) { ipmi_smi_t intf; - struct list_head to_deliver = LIST_HEAD_INIT(to_deliver); + LIST_HEAD(to_deliver); struct watcher_entry *e, *e2; mutex_lock(&smi_watchers_mutex); @@ -502,6 +597,7 @@ int ipmi_smi_watcher_register(struct ipmi_smi_watcher *watcher) } return -ENOMEM; } +EXPORT_SYMBOL(ipmi_smi_watcher_register); int ipmi_smi_watcher_unregister(struct ipmi_smi_watcher *watcher) { @@ -510,6 +606,7 @@ int ipmi_smi_watcher_unregister(struct ipmi_smi_watcher *watcher) mutex_unlock(&smi_watchers_mutex); return 0; } +EXPORT_SYMBOL(ipmi_smi_watcher_unregister); /* * Must be called with smi_watchers_mutex held. @@ -544,9 +641,7 @@ ipmi_addr_equal(struct ipmi_addr *addr1, struct ipmi_addr *addr2) return (smi_addr1->lun == smi_addr2->lun); } - if ((addr1->addr_type == IPMI_IPMB_ADDR_TYPE) - || (addr1->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE)) - { + if (is_ipmb_addr(addr1) || is_ipmb_bcast_addr(addr1)) { struct ipmi_ipmb_addr *ipmb_addr1 = (struct ipmi_ipmb_addr *) addr1; struct ipmi_ipmb_addr *ipmb_addr2 @@ -556,7 +651,7 @@ ipmi_addr_equal(struct ipmi_addr *addr1, struct ipmi_addr *addr2) && (ipmb_addr1->lun == ipmb_addr2->lun)); } - if (addr1->addr_type == IPMI_LAN_ADDR_TYPE) { + if (is_lan_addr(addr1)) { struct ipmi_lan_addr *lan_addr1 = (struct ipmi_lan_addr *) addr1; struct ipmi_lan_addr *lan_addr2 @@ -574,9 +669,8 @@ ipmi_addr_equal(struct ipmi_addr *addr1, struct ipmi_addr *addr2) int ipmi_validate_addr(struct ipmi_addr *addr, int len) { - if (len < sizeof(struct ipmi_system_interface_addr)) { + if (len < sizeof(struct ipmi_system_interface_addr)) return -EINVAL; - } if (addr->addr_type == IPMI_SYSTEM_INTERFACE_ADDR_TYPE) { if (addr->channel != IPMI_BMC_CHANNEL) @@ -589,24 +683,21 @@ int ipmi_validate_addr(struct ipmi_addr *addr, int len) || (addr->channel < 0)) return -EINVAL; - if ((addr->addr_type == IPMI_IPMB_ADDR_TYPE) - || (addr->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE)) - { - if (len < sizeof(struct ipmi_ipmb_addr)) { + if (is_ipmb_addr(addr) || is_ipmb_bcast_addr(addr)) { + if (len < sizeof(struct ipmi_ipmb_addr)) return -EINVAL; - } return 0; } - if (addr->addr_type == IPMI_LAN_ADDR_TYPE) { - if (len < sizeof(struct ipmi_lan_addr)) { + if (is_lan_addr(addr)) { + if (len < sizeof(struct ipmi_lan_addr)) return -EINVAL; - } return 0; } return -EINVAL; } +EXPORT_SYMBOL(ipmi_validate_addr); unsigned int ipmi_addr_length(int addr_type) { @@ -615,33 +706,27 @@ unsigned int ipmi_addr_length(int addr_type) if ((addr_type == IPMI_IPMB_ADDR_TYPE) || (addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE)) - { return sizeof(struct ipmi_ipmb_addr); - } if (addr_type == IPMI_LAN_ADDR_TYPE) return sizeof(struct ipmi_lan_addr); return 0; } +EXPORT_SYMBOL(ipmi_addr_length); static void deliver_response(struct ipmi_recv_msg *msg) { if (!msg->user) { ipmi_smi_t intf = msg->user_msg_data; - unsigned long flags; /* Special handling for NULL users. */ if (intf->null_user_handler) { intf->null_user_handler(intf, msg); - spin_lock_irqsave(&intf->counter_lock, flags); - intf->handled_local_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, handled_local_responses); } else { /* No handler, so give up. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->unhandled_local_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, unhandled_local_responses); } ipmi_free_recv_msg(msg); } else { @@ -661,9 +746,11 @@ deliver_err_response(struct ipmi_recv_msg *msg, int err) deliver_response(msg); } -/* Find the next sequence number not being used and add the given - message with the given timeout to the sequence table. This must be - called with the interface's seq_lock held. */ +/* + * Find the next sequence number not being used and add the given + * message with the given timeout to the sequence table. This must be + * called with the interface's seq_lock held. + */ static int intf_next_seq(ipmi_smi_t intf, struct ipmi_recv_msg *recv_msg, unsigned long timeout, @@ -675,10 +762,8 @@ static int intf_next_seq(ipmi_smi_t intf, int rv = 0; unsigned int i; - for (i = intf->curr_seq; - (i+1)%IPMI_IPMB_NUM_SEQ != intf->curr_seq; - i = (i+1)%IPMI_IPMB_NUM_SEQ) - { + for (i = intf->curr_seq; (i+1)%IPMI_IPMB_NUM_SEQ != intf->curr_seq; + i = (i+1)%IPMI_IPMB_NUM_SEQ) { if (!intf->seq_table[i].inuse) break; } @@ -686,8 +771,10 @@ static int intf_next_seq(ipmi_smi_t intf, if (!intf->seq_table[i].inuse) { intf->seq_table[i].recv_msg = recv_msg; - /* Start with the maximum timeout, when the send response - comes in we will start the real timer. */ + /* + * Start with the maximum timeout, when the send response + * comes in we will start the real timer. + */ intf->seq_table[i].timeout = MAX_MSG_TIMEOUT; intf->seq_table[i].orig_timeout = timeout; intf->seq_table[i].retries_left = retries; @@ -700,15 +787,17 @@ static int intf_next_seq(ipmi_smi_t intf, } else { rv = -EAGAIN; } - + return rv; } -/* Return the receive message for the given sequence number and - release the sequence number so it can be reused. Some other data - is passed in to be sure the message matches up correctly (to help - guard against message coming in after their timeout and the - sequence number being reused). */ +/* + * Return the receive message for the given sequence number and + * release the sequence number so it can be reused. Some other data + * is passed in to be sure the message matches up correctly (to help + * guard against message coming in after their timeout and the + * sequence number being reused). + */ static int intf_find_seq(ipmi_smi_t intf, unsigned char seq, short channel, @@ -727,11 +816,9 @@ static int intf_find_seq(ipmi_smi_t intf, if (intf->seq_table[seq].inuse) { struct ipmi_recv_msg *msg = intf->seq_table[seq].recv_msg; - if ((msg->addr.channel == channel) - && (msg->msg.cmd == cmd) + if ((msg->addr.channel == channel) && (msg->msg.cmd == cmd) && (msg->msg.netfn == netfn) - && (ipmi_addr_equal(addr, &(msg->addr)))) - { + && (ipmi_addr_equal(addr, &(msg->addr)))) { *recv_msg = msg; intf->seq_table[seq].inuse = 0; rv = 0; @@ -756,11 +843,12 @@ static int intf_start_seq_timer(ipmi_smi_t intf, GET_SEQ_FROM_MSGID(msgid, seq, seqid); spin_lock_irqsave(&(intf->seq_lock), flags); - /* We do this verification because the user can be deleted - while a message is outstanding. */ + /* + * We do this verification because the user can be deleted + * while a message is outstanding. + */ if ((intf->seq_table[seq].inuse) - && (intf->seq_table[seq].seqid == seqid)) - { + && (intf->seq_table[seq].seqid == seqid)) { struct seq_table *ent = &(intf->seq_table[seq]); ent->timeout = ent->orig_timeout; rv = 0; @@ -785,11 +873,12 @@ static int intf_err_seq(ipmi_smi_t intf, GET_SEQ_FROM_MSGID(msgid, seq, seqid); spin_lock_irqsave(&(intf->seq_lock), flags); - /* We do this verification because the user can be deleted - while a message is outstanding. */ + /* + * We do this verification because the user can be deleted + * while a message is outstanding. + */ if ((intf->seq_table[seq].inuse) - && (intf->seq_table[seq].seqid == seqid)) - { + && (intf->seq_table[seq].seqid == seqid)) { struct seq_table *ent = &(intf->seq_table[seq]); ent->inuse = 0; @@ -815,24 +904,30 @@ int ipmi_create_user(unsigned int if_num, int rv = 0; ipmi_smi_t intf; - /* There is no module usecount here, because it's not - required. Since this can only be used by and called from - other modules, they will implicitly use this module, and - thus this can't be removed unless the other modules are - removed. */ + /* + * There is no module usecount here, because it's not + * required. Since this can only be used by and called from + * other modules, they will implicitly use this module, and + * thus this can't be removed unless the other modules are + * removed. + */ if (handler == NULL) return -EINVAL; - /* Make sure the driver is actually initialized, this handles - problems with initialization order. */ + /* + * Make sure the driver is actually initialized, this handles + * problems with initialization order. + */ if (!initialized) { rv = ipmi_init_msghandler(); if (rv) return rv; - /* The init code doesn't return an error if it was turned - off, but it won't initialize. Check that. */ + /* + * The init code doesn't return an error if it was turned + * off, but it won't initialize. Check that. + */ if (!initialized) return -ENODEV; } @@ -860,7 +955,7 @@ int ipmi_create_user(unsigned int if_num, new_user->intf = intf; new_user->gets_events = 0; -#if !defined(__VMKLNX__) +#if !defined(__VMKLNX__) if (!try_module_get(intf->handlers->owner)) { rv = -ENODEV; goto out_kref; @@ -875,8 +970,10 @@ int ipmi_create_user(unsigned int if_num, } #endif /* #if !defined(__VMKLNX__) */ - /* Hold the lock so intf->handlers is guaranteed to be good - * until now */ + /* + * Hold the lock so intf->handlers is guaranteed to be good + * until now + */ mutex_unlock(&ipmi_interfaces_mutex); new_user->valid = 1; @@ -886,7 +983,7 @@ int ipmi_create_user(unsigned int if_num, *user = new_user; return 0; -#if !defined(__VMKLNX__) +#if !defined(__VMKLNX__) out_kref: #endif /* #if !defined(__VMKLNX__) */ kref_put(&intf->refcount, intf_free); @@ -895,6 +992,34 @@ out_kfree: kfree(new_user); return rv; } +EXPORT_SYMBOL(ipmi_create_user); + +int ipmi_get_smi_info(int if_num, struct ipmi_smi_info *data) +{ + int rv = 0; + ipmi_smi_t intf; + struct ipmi_smi_handlers *handlers; + + mutex_lock(&ipmi_interfaces_mutex); + list_for_each_entry_rcu(intf, &ipmi_interfaces, link) { + if (intf->intf_num == if_num) + goto found; + } + /* Not found, return an error */ + rv = -EINVAL; + mutex_unlock(&ipmi_interfaces_mutex); + return rv; + + found: + handlers = intf->handlers; + rv = -ENOSYS; + if (handlers->get_smi_info) + rv = handlers->get_smi_info(intf->send_info, data); + mutex_unlock(&ipmi_interfaces_mutex); + + return rv; +} +EXPORT_SYMBOL(ipmi_get_smi_info); static void free_user(struct kref *ref) { @@ -918,8 +1043,7 @@ int ipmi_destroy_user(ipmi_user_t user) for (i = 0; i < IPMI_IPMB_NUM_SEQ; i++) { if (intf->seq_table[i].inuse - && (intf->seq_table[i].recv_msg->user == user)) - { + && (intf->seq_table[i].recv_msg->user == user)) { intf->seq_table[i].inuse = 0; ipmi_free_recv_msg(intf->seq_table[i].recv_msg); } @@ -964,6 +1088,7 @@ int ipmi_destroy_user(ipmi_user_t user) return 0; } +EXPORT_SYMBOL(ipmi_destroy_user); void ipmi_get_version(ipmi_user_t user, unsigned char *major, @@ -972,6 +1097,7 @@ void ipmi_get_version(ipmi_user_t user, *major = user->intf->ipmi_version_major; *minor = user->intf->ipmi_version_minor; } +EXPORT_SYMBOL(ipmi_get_version); int ipmi_set_my_address(ipmi_user_t user, unsigned int channel, @@ -982,6 +1108,7 @@ int ipmi_set_my_address(ipmi_user_t user, user->intf->channels[channel].address = address; return 0; } +EXPORT_SYMBOL(ipmi_set_my_address); int ipmi_get_my_address(ipmi_user_t user, unsigned int channel, @@ -992,6 +1119,7 @@ int ipmi_get_my_address(ipmi_user_t user, *address = user->intf->channels[channel].address; return 0; } +EXPORT_SYMBOL(ipmi_get_my_address); int ipmi_set_my_LUN(ipmi_user_t user, unsigned int channel, @@ -1002,6 +1130,7 @@ int ipmi_set_my_LUN(ipmi_user_t user, user->intf->channels[channel].lun = LUN & 0x3; return 0; } +EXPORT_SYMBOL(ipmi_set_my_LUN); int ipmi_get_my_LUN(ipmi_user_t user, unsigned int channel, @@ -1012,6 +1141,7 @@ int ipmi_get_my_LUN(ipmi_user_t user, *address = user->intf->channels[channel].lun; return 0; } +EXPORT_SYMBOL(ipmi_get_my_LUN); int ipmi_get_maintenance_mode(ipmi_user_t user) { @@ -1096,13 +1226,11 @@ int ipmi_set_gets_events(ipmi_user_t user, int val) list_for_each_entry_safe(msg, msg2, &intf->waiting_events, link) list_move_tail(&msg->link, &msgs); intf->waiting_events_count = 0; -#if defined(__VMKLNX__) - if (intf->event_queue_full) { - printk(KERN_INFO PFX "Event queue no longer" - " full\n"); - intf->event_queue_full = 0; - } -#endif + if (intf->event_msg_printed) { + printk(KERN_INFO PFX "Event queue no longer" + " full\n"); + intf->event_msg_printed = 0; + } intf->delivering_events = 1; spin_unlock_irqrestore(&intf->events_lock, flags); @@ -1122,6 +1250,7 @@ int ipmi_set_gets_events(ipmi_user_t user, int val) return 0; } +EXPORT_SYMBOL(ipmi_set_gets_events); static struct cmd_rcvr *find_cmd_rcvr(ipmi_smi_t intf, unsigned char netfn, @@ -1187,6 +1316,7 @@ int ipmi_register_for_cmd(ipmi_user_t user, return rv; } +EXPORT_SYMBOL(ipmi_register_for_cmd); int ipmi_unregister_for_cmd(ipmi_user_t user, unsigned char netfn, @@ -1224,19 +1354,13 @@ int ipmi_unregister_for_cmd(ipmi_user_t user, } return rv; } - -void ipmi_user_set_run_to_completion(ipmi_user_t user, int val) -{ - ipmi_smi_t intf = user->intf; - if (intf->handlers) - intf->handlers->set_run_to_completion(intf->send_info, val); -} +EXPORT_SYMBOL(ipmi_unregister_for_cmd); static unsigned char ipmb_checksum(unsigned char *data, int size) { unsigned char csum = 0; - + for (; size > 0; size--, data++) csum += *data; @@ -1278,8 +1402,10 @@ static inline void format_ipmb_msg(struct ipmi_smi_msg *smi_msg, = ipmb_checksum(&(smi_msg->data[i+6]), smi_msg->data_size-6); - /* Add on the checksum size and the offset from the - broadcast. */ + /* + * Add on the checksum size and the offset from the + * broadcast. + */ smi_msg->data_size += 1 + i; smi_msg->msgid = msgid; @@ -1315,17 +1441,21 @@ static inline void format_lan_msg(struct ipmi_smi_msg *smi_msg, = ipmb_checksum(&(smi_msg->data[7]), smi_msg->data_size-7); - /* Add on the checksum size and the offset from the - broadcast. */ + /* + * Add on the checksum size and the offset from the + * broadcast. + */ smi_msg->data_size += 1; smi_msg->msgid = msgid; } -/* Separate from ipmi_request so that the user does not have to be - supplied in certain circumstances (mainly at panic time). If - messages are supplied, they will be freed, even if an error - occurs. */ +/* + * Separate from ipmi_request so that the user does not have to be + * supplied in certain circumstances (mainly at panic time). If + * messages are supplied, they will be freed, even if an error + * occurs. + */ static int i_ipmi_request(ipmi_user_t user, ipmi_smi_t intf, struct ipmi_addr *addr, @@ -1347,19 +1477,18 @@ static int i_ipmi_request(ipmi_user_t user, struct ipmi_smi_handlers *handlers; - if (supplied_recv) { + if (supplied_recv) recv_msg = supplied_recv; - } else { + else { recv_msg = ipmi_alloc_recv_msg(); - if (recv_msg == NULL) { + if (recv_msg == NULL) return -ENOMEM; - } } recv_msg->user_msg_data = user_msg_data; - if (supplied_smi) { + if (supplied_smi) smi_msg = (struct ipmi_smi_msg *) supplied_smi; - } else { + else { smi_msg = ipmi_alloc_smi_msg(); if (smi_msg == NULL) { ipmi_free_recv_msg(recv_msg); @@ -1378,8 +1507,10 @@ static int i_ipmi_request(ipmi_user_t user, if (user) kref_get(&user->refcount); recv_msg->msgid = msgid; - /* Store the message to send in the receive message so timeout - responses can get the proper response data. */ + /* + * Store the message to send in the receive message so timeout + * responses can get the proper response data. + */ recv_msg->msg = *msg; if (addr->addr_type == IPMI_SYSTEM_INTERFACE_ADDR_TYPE) { @@ -1393,9 +1524,7 @@ static int i_ipmi_request(ipmi_user_t user, smi_addr = (struct ipmi_system_interface_addr *) addr; if (smi_addr->lun > 3) { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } @@ -1405,13 +1534,12 @@ static int i_ipmi_request(ipmi_user_t user, if ((msg->netfn == IPMI_NETFN_APP_REQUEST) && ((msg->cmd == IPMI_SEND_MSG_CMD) || (msg->cmd == IPMI_GET_MSG_CMD) - || (msg->cmd == IPMI_READ_EVENT_MSG_BUFFER_CMD))) - { - /* We don't let the user do these, since we manage - the sequence numbers. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + || (msg->cmd == IPMI_READ_EVENT_MSG_BUFFER_CMD))) { + /* + * We don't let the user do these, since we manage + * the sequence numbers. + */ + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } @@ -1419,14 +1547,12 @@ static int i_ipmi_request(ipmi_user_t user, if (((msg->netfn == IPMI_NETFN_APP_REQUEST) && ((msg->cmd == IPMI_COLD_RESET_CMD) || (msg->cmd == IPMI_WARM_RESET_CMD))) - || (msg->netfn == IPMI_NETFN_FIRMWARE_REQUEST)) - { + || (msg->netfn == IPMI_NETFN_FIRMWARE_REQUEST)) { spin_lock_irqsave(&intf->maintenance_mode_lock, flags); intf->auto_maintenance_timeout = IPMI_MAINTENANCE_MODE_TIMEOUT; if (!intf->maintenance_mode - && !intf->maintenance_mode_enable) - { + && !intf->maintenance_mode_enable) { intf->maintenance_mode_enable = 1; maintenance_mode_update(intf); } @@ -1435,9 +1561,7 @@ static int i_ipmi_request(ipmi_user_t user, } if ((msg->data_len + 2) > IPMI_MAX_MSG_LENGTH) { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EMSGSIZE; goto out_err; } @@ -1449,57 +1573,49 @@ static int i_ipmi_request(ipmi_user_t user, if (msg->data_len > 0) memcpy(&(smi_msg->data[2]), msg->data, msg->data_len); smi_msg->data_size = msg->data_len + 2; - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_local_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); - } else if ((addr->addr_type == IPMI_IPMB_ADDR_TYPE) - || (addr->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE)) - { + ipmi_inc_stat(intf, sent_local_commands); + } else if (is_ipmb_addr(addr) || is_ipmb_bcast_addr(addr)) { struct ipmi_ipmb_addr *ipmb_addr; unsigned char ipmb_seq; long seqid; int broadcast = 0; if (addr->channel >= IPMI_MAX_CHANNELS) { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } if (intf->channels[addr->channel].medium - != IPMI_CHANNEL_MEDIUM_IPMB) - { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + != IPMI_CHANNEL_MEDIUM_IPMB) { + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } if (retries < 0) { #if defined (__VMKLNX__) - if (addr->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE) - retries = 0; /* Don't retry broadcasts. */ - else - if (msg->netfn == IPMI_NETFN_SENSOR_EVENT_REQUEST || - msg->netfn == IPMI_NETFN_SENSOR_EVENT_RESPONSE) { - retries = 1; - } else { - retries = 4; - } + if (addr->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE) + retries = 0; /* Don't retry broadcasts. */ + else + if (msg->netfn == IPMI_NETFN_SENSOR_EVENT_REQUEST || + msg->netfn == IPMI_NETFN_SENSOR_EVENT_RESPONSE) + retries = 1; + else + retries = 4; #else - if (addr->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE) - retries = 0; /* Don't retry broadcasts. */ - else - retries = 4; + if (addr->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE) + retries = 0; /* Don't retry broadcasts. */ + else + retries = 4; #endif } if (addr->addr_type == IPMI_IPMB_BROADCAST_ADDR_TYPE) { - /* Broadcasts add a zero at the beginning of the - message, but otherwise is the same as an IPMB - address. */ + /* + * Broadcasts add a zero at the beginning of the + * message, but otherwise is the same as an IPMB + * address. + */ addr->addr_type = IPMI_IPMB_ADDR_TYPE; broadcast = 1; } @@ -1508,33 +1624,30 @@ static int i_ipmi_request(ipmi_user_t user, /* Default to 1 second retries. */ #if defined (__VMKLNX__) if (retry_time_ms == 0) { - if (msg->netfn == IPMI_NETFN_SENSOR_EVENT_REQUEST || - msg->netfn == IPMI_NETFN_SENSOR_EVENT_RESPONSE) { - retry_time_ms = 100; - } else { - retry_time_ms = 1000; - } - } + if (msg->netfn == IPMI_NETFN_SENSOR_EVENT_REQUEST || + msg->netfn == IPMI_NETFN_SENSOR_EVENT_RESPONSE) + retry_time_ms = 100; + else + retry_time_ms = 1000; + } #else if (retry_time_ms == 0) - retry_time_ms = 1000; + retry_time_ms = 1000; #endif - /* 9 for the header and 1 for the checksum, plus - possibly one for the broadcast. */ + /* + * 9 for the header and 1 for the checksum, plus + * possibly one for the broadcast. + */ if ((msg->data_len + 10 + broadcast) > IPMI_MAX_MSG_LENGTH) { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EMSGSIZE; goto out_err; } ipmb_addr = (struct ipmi_ipmb_addr *) addr; if (ipmb_addr->lun > 3) { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } @@ -1542,29 +1655,29 @@ static int i_ipmi_request(ipmi_user_t user, memcpy(&recv_msg->addr, ipmb_addr, sizeof(*ipmb_addr)); if (recv_msg->msg.netfn & 0x1) { - /* It's a response, so use the user's sequence - from msgid. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_ipmb_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + /* + * It's a response, so use the user's sequence + * from msgid. + */ + ipmi_inc_stat(intf, sent_ipmb_responses); format_ipmb_msg(smi_msg, msg, ipmb_addr, msgid, msgid, broadcast, source_address, source_lun); - /* Save the receive message so we can use it - to deliver the response. */ + /* + * Save the receive message so we can use it + * to deliver the response. + */ smi_msg->user_data = recv_msg; } else { /* It's a command, so get a sequence for it. */ spin_lock_irqsave(&(intf->seq_lock), flags); - spin_lock(&intf->counter_lock); - intf->sent_ipmb_commands++; - spin_unlock(&intf->counter_lock); - - /* Create a sequence number with a 1 second - timeout and 4 retries. */ + /* + * Create a sequence number with a 1 second + * timeout and 4 retries. + */ rv = intf_next_seq(intf, recv_msg, retry_time_ms, @@ -1573,57 +1686,62 @@ static int i_ipmi_request(ipmi_user_t user, &ipmb_seq, &seqid); if (rv) { - /* We have used up all the sequence numbers, - probably, so abort. */ + /* + * We have used up all the sequence numbers, + * probably, so abort. + */ spin_unlock_irqrestore(&(intf->seq_lock), flags); goto out_err; } - /* Store the sequence number in the message, - so that when the send message response - comes back we can start the timer. */ + ipmi_inc_stat(intf, sent_ipmb_commands); + + /* + * Store the sequence number in the message, + * so that when the send message response + * comes back we can start the timer. + */ format_ipmb_msg(smi_msg, msg, ipmb_addr, STORE_SEQ_IN_MSGID(ipmb_seq, seqid), ipmb_seq, broadcast, source_address, source_lun); - /* Copy the message into the recv message data, so we - can retransmit it later if necessary. */ + /* + * Copy the message into the recv message data, so we + * can retransmit it later if necessary. + */ memcpy(recv_msg->msg_data, smi_msg->data, smi_msg->data_size); recv_msg->msg.data = recv_msg->msg_data; recv_msg->msg.data_len = smi_msg->data_size; - /* We don't unlock until here, because we need - to copy the completed message into the - recv_msg before we release the lock. - Otherwise, race conditions may bite us. I - know that's pretty paranoid, but I prefer - to be correct. */ + /* + * We don't unlock until here, because we need + * to copy the completed message into the + * recv_msg before we release the lock. + * Otherwise, race conditions may bite us. I + * know that's pretty paranoid, but I prefer + * to be correct. + */ spin_unlock_irqrestore(&(intf->seq_lock), flags); } - } else if (addr->addr_type == IPMI_LAN_ADDR_TYPE) { + } else if (is_lan_addr(addr)) { struct ipmi_lan_addr *lan_addr; unsigned char ipmb_seq; long seqid; if (addr->channel >= IPMI_MAX_CHANNELS) { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } if ((intf->channels[addr->channel].medium - != IPMI_CHANNEL_MEDIUM_8023LAN) + != IPMI_CHANNEL_MEDIUM_8023LAN) && (intf->channels[addr->channel].medium - != IPMI_CHANNEL_MEDIUM_ASYNC)) - { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + != IPMI_CHANNEL_MEDIUM_ASYNC)) { + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } @@ -1631,32 +1749,28 @@ static int i_ipmi_request(ipmi_user_t user, #if defined (__VMKLNX__) retries = 1; #else - retries = 4; + retries = 4; #endif #if defined (__VMKLNX__) if (retry_time_ms == 0) - retry_time_ms = 100; + retry_time_ms = 100; #else /* Default to 1 second retries. */ if (retry_time_ms == 0) - retry_time_ms = 1000; + retry_time_ms = 1000; #endif /* 11 for the header and 1 for the checksum. */ if ((msg->data_len + 12) > IPMI_MAX_MSG_LENGTH) { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EMSGSIZE; goto out_err; } lan_addr = (struct ipmi_lan_addr *) addr; if (lan_addr->lun > 3) { - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } @@ -1664,28 +1778,28 @@ static int i_ipmi_request(ipmi_user_t user, memcpy(&recv_msg->addr, lan_addr, sizeof(*lan_addr)); if (recv_msg->msg.netfn & 0x1) { - /* It's a response, so use the user's sequence - from msgid. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_lan_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + /* + * It's a response, so use the user's sequence + * from msgid. + */ + ipmi_inc_stat(intf, sent_lan_responses); format_lan_msg(smi_msg, msg, lan_addr, msgid, msgid, source_lun); - /* Save the receive message so we can use it - to deliver the response. */ + /* + * Save the receive message so we can use it + * to deliver the response. + */ smi_msg->user_data = recv_msg; } else { /* It's a command, so get a sequence for it. */ spin_lock_irqsave(&(intf->seq_lock), flags); - spin_lock(&intf->counter_lock); - intf->sent_lan_commands++; - spin_unlock(&intf->counter_lock); - - /* Create a sequence number with a 1 second - timeout and 4 retries. */ + /* + * Create a sequence number with a 1 second + * timeout and 4 retries. + */ rv = intf_next_seq(intf, recv_msg, retry_time_ms, @@ -1694,40 +1808,48 @@ static int i_ipmi_request(ipmi_user_t user, &ipmb_seq, &seqid); if (rv) { - /* We have used up all the sequence numbers, - probably, so abort. */ + /* + * We have used up all the sequence numbers, + * probably, so abort. + */ spin_unlock_irqrestore(&(intf->seq_lock), flags); goto out_err; } - /* Store the sequence number in the message, - so that when the send message response - comes back we can start the timer. */ + ipmi_inc_stat(intf, sent_lan_commands); + + /* + * Store the sequence number in the message, + * so that when the send message response + * comes back we can start the timer. + */ format_lan_msg(smi_msg, msg, lan_addr, STORE_SEQ_IN_MSGID(ipmb_seq, seqid), ipmb_seq, source_lun); - /* Copy the message into the recv message data, so we - can retransmit it later if necessary. */ + /* + * Copy the message into the recv message data, so we + * can retransmit it later if necessary. + */ memcpy(recv_msg->msg_data, smi_msg->data, smi_msg->data_size); recv_msg->msg.data = recv_msg->msg_data; recv_msg->msg.data_len = smi_msg->data_size; - /* We don't unlock until here, because we need - to copy the completed message into the - recv_msg before we release the lock. - Otherwise, race conditions may bite us. I - know that's pretty paranoid, but I prefer - to be correct. */ + /* + * We don't unlock until here, because we need + * to copy the completed message into the + * recv_msg before we release the lock. + * Otherwise, race conditions may bite us. I + * know that's pretty paranoid, but I prefer + * to be correct. + */ spin_unlock_irqrestore(&(intf->seq_lock), flags); } } else { /* Unknown address type. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->sent_invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_invalid_commands); rv = -EINVAL; goto out_err; } @@ -1795,6 +1917,7 @@ int ipmi_request_settime(ipmi_user_t user, retries, retry_time_ms); } +EXPORT_SYMBOL(ipmi_request_settime); int ipmi_request_supply_msgs(ipmi_user_t user, struct ipmi_addr *addr, @@ -1826,101 +1949,134 @@ int ipmi_request_supply_msgs(ipmi_user_t user, lun, -1, 0); } +EXPORT_SYMBOL(ipmi_request_supply_msgs); #ifdef CONFIG_PROC_FS -static int ipmb_file_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) +static int smi_ipmb_proc_show(struct seq_file *m, void *v) { - char *out = (char *) page; - ipmi_smi_t intf = data; + ipmi_smi_t intf = m->private; int i; - int rv = 0; - for (i = 0; i < IPMI_MAX_CHANNELS; i++) - rv += sprintf(out+rv, "%x ", intf->channels[i].address); - out[rv-1] = '\n'; /* Replace the final space with a newline */ - out[rv] = '\0'; - rv++; - return rv; + seq_printf(m, "%x", intf->channels[0].address); + for (i = 1; i < IPMI_MAX_CHANNELS; i++) + seq_printf(m, " %x", intf->channels[i].address); + return seq_putc(m, '\n'); } -static int version_file_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) +static int smi_ipmb_proc_open(struct inode *inode, struct file *file) { - char *out = (char *) page; - ipmi_smi_t intf = data; - - return sprintf(out, "%d.%d\n", - ipmi_version_major(&intf->bmc->id), - ipmi_version_minor(&intf->bmc->id)); + return single_open(file, smi_ipmb_proc_show, PDE(inode)->data); } -static int stat_file_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) +static const struct file_operations smi_ipmb_proc_ops = { + .open = smi_ipmb_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int smi_version_proc_show(struct seq_file *m, void *v) { - char *out = (char *) page; - ipmi_smi_t intf = data; + ipmi_smi_t intf = m->private; - out += sprintf(out, "sent_invalid_commands: %d\n", - intf->sent_invalid_commands); - out += sprintf(out, "sent_local_commands: %d\n", - intf->sent_local_commands); - out += sprintf(out, "handled_local_responses: %d\n", - intf->handled_local_responses); - out += sprintf(out, "unhandled_local_responses: %d\n", - intf->unhandled_local_responses); - out += sprintf(out, "sent_ipmb_commands: %d\n", - intf->sent_ipmb_commands); - out += sprintf(out, "sent_ipmb_command_errs: %d\n", - intf->sent_ipmb_command_errs); - out += sprintf(out, "retransmitted_ipmb_commands: %d\n", - intf->retransmitted_ipmb_commands); - out += sprintf(out, "timed_out_ipmb_commands: %d\n", - intf->timed_out_ipmb_commands); - out += sprintf(out, "timed_out_ipmb_broadcasts: %d\n", - intf->timed_out_ipmb_broadcasts); - out += sprintf(out, "sent_ipmb_responses: %d\n", - intf->sent_ipmb_responses); - out += sprintf(out, "handled_ipmb_responses: %d\n", - intf->handled_ipmb_responses); - out += sprintf(out, "invalid_ipmb_responses: %d\n", - intf->invalid_ipmb_responses); - out += sprintf(out, "unhandled_ipmb_responses: %d\n", - intf->unhandled_ipmb_responses); - out += sprintf(out, "sent_lan_commands: %d\n", - intf->sent_lan_commands); - out += sprintf(out, "sent_lan_command_errs: %d\n", - intf->sent_lan_command_errs); - out += sprintf(out, "retransmitted_lan_commands: %d\n", - intf->retransmitted_lan_commands); - out += sprintf(out, "timed_out_lan_commands: %d\n", - intf->timed_out_lan_commands); - out += sprintf(out, "sent_lan_responses: %d\n", - intf->sent_lan_responses); - out += sprintf(out, "handled_lan_responses: %d\n", - intf->handled_lan_responses); - out += sprintf(out, "invalid_lan_responses: %d\n", - intf->invalid_lan_responses); - out += sprintf(out, "unhandled_lan_responses: %d\n", - intf->unhandled_lan_responses); - out += sprintf(out, "handled_commands: %d\n", - intf->handled_commands); - out += sprintf(out, "invalid_commands: %d\n", - intf->invalid_commands); - out += sprintf(out, "unhandled_commands: %d\n", - intf->unhandled_commands); - out += sprintf(out, "invalid_events: %d\n", - intf->invalid_events); - out += sprintf(out, "events: %d\n", - intf->events); - - return (out - ((char *) page)); + return seq_printf(m, "%u.%u\n", + ipmi_version_major(&intf->bmc->id), + ipmi_version_minor(&intf->bmc->id)); } + +static int smi_version_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, smi_version_proc_show, PDE(inode)->data); +} + +static const struct file_operations smi_version_proc_ops = { + .open = smi_version_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int smi_stats_proc_show(struct seq_file *m, void *v) +{ + ipmi_smi_t intf = m->private; + + seq_printf(m, "sent_invalid_commands: %u\n", + ipmi_get_stat(intf, sent_invalid_commands)); + seq_printf(m, "sent_local_commands: %u\n", + ipmi_get_stat(intf, sent_local_commands)); + seq_printf(m, "handled_local_responses: %u\n", + ipmi_get_stat(intf, handled_local_responses)); + seq_printf(m, "unhandled_local_responses: %u\n", + ipmi_get_stat(intf, unhandled_local_responses)); + seq_printf(m, "sent_ipmb_commands: %u\n", + ipmi_get_stat(intf, sent_ipmb_commands)); + seq_printf(m, "sent_ipmb_command_errs: %u\n", + ipmi_get_stat(intf, sent_ipmb_command_errs)); + seq_printf(m, "retransmitted_ipmb_commands: %u\n", + ipmi_get_stat(intf, retransmitted_ipmb_commands)); + seq_printf(m, "timed_out_ipmb_commands: %u\n", + ipmi_get_stat(intf, timed_out_ipmb_commands)); + seq_printf(m, "timed_out_ipmb_broadcasts: %u\n", + ipmi_get_stat(intf, timed_out_ipmb_broadcasts)); + seq_printf(m, "sent_ipmb_responses: %u\n", + ipmi_get_stat(intf, sent_ipmb_responses)); + seq_printf(m, "handled_ipmb_responses: %u\n", + ipmi_get_stat(intf, handled_ipmb_responses)); + seq_printf(m, "invalid_ipmb_responses: %u\n", + ipmi_get_stat(intf, invalid_ipmb_responses)); + seq_printf(m, "unhandled_ipmb_responses: %u\n", + ipmi_get_stat(intf, unhandled_ipmb_responses)); + seq_printf(m, "sent_lan_commands: %u\n", + ipmi_get_stat(intf, sent_lan_commands)); + seq_printf(m, "sent_lan_command_errs: %u\n", + ipmi_get_stat(intf, sent_lan_command_errs)); + seq_printf(m, "retransmitted_lan_commands: %u\n", + ipmi_get_stat(intf, retransmitted_lan_commands)); + seq_printf(m, "timed_out_lan_commands: %u\n", + ipmi_get_stat(intf, timed_out_lan_commands)); + seq_printf(m, "sent_lan_responses: %u\n", + ipmi_get_stat(intf, sent_lan_responses)); + seq_printf(m, "handled_lan_responses: %u\n", + ipmi_get_stat(intf, handled_lan_responses)); + seq_printf(m, "invalid_lan_responses: %u\n", + ipmi_get_stat(intf, invalid_lan_responses)); + seq_printf(m, "unhandled_lan_responses: %u\n", + ipmi_get_stat(intf, unhandled_lan_responses)); + seq_printf(m, "handled_commands: %u\n", + ipmi_get_stat(intf, handled_commands)); + seq_printf(m, "invalid_commands: %u\n", + ipmi_get_stat(intf, invalid_commands)); + seq_printf(m, "unhandled_commands: %u\n", + ipmi_get_stat(intf, unhandled_commands)); + seq_printf(m, "invalid_events: %u\n", + ipmi_get_stat(intf, invalid_events)); + seq_printf(m, "events: %u\n", + ipmi_get_stat(intf, events)); + seq_printf(m, "failed rexmit LAN msgs: %u\n", + ipmi_get_stat(intf, dropped_rexmit_lan_commands)); + seq_printf(m, "failed rexmit IPMB msgs: %u\n", + ipmi_get_stat(intf, dropped_rexmit_ipmb_commands)); + + return 0; +} + +static int smi_stats_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, smi_stats_proc_show, PDE(inode)->data); +} + +static const struct file_operations smi_stats_proc_ops = { + .open = smi_stats_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + #endif /* CONFIG_PROC_FS */ int ipmi_smi_add_proc_entry(ipmi_smi_t smi, char *name, - read_proc_t *read_proc, write_proc_t *write_proc, - void *data, struct module *owner) + const struct file_operations *proc_ops, + void *data) { int rv = 0; #ifdef CONFIG_PROC_FS @@ -1938,17 +2094,12 @@ int ipmi_smi_add_proc_entry(ipmi_smi_t smi, char *name, } strcpy(entry->name, name); - file = create_proc_entry(name, 0, smi->proc_dir); + file = proc_create_data(name, 0, smi->proc_dir, proc_ops, data); if (!file) { kfree(entry->name); kfree(entry); rv = -ENOMEM; } else { - file->data = data; - file->read_proc = read_proc; - file->write_proc = write_proc; - file->owner = owner; - mutex_lock(&smi->proc_entry_lock); /* Stick it on the list. */ entry->next = smi->proc_entries; @@ -1959,6 +2110,7 @@ int ipmi_smi_add_proc_entry(ipmi_smi_t smi, char *name, return rv; } +EXPORT_SYMBOL(ipmi_smi_add_proc_entry); static int add_proc_entries(ipmi_smi_t smi, int num) { @@ -1969,24 +2121,21 @@ static int add_proc_entries(ipmi_smi_t smi, int num) smi->proc_dir = proc_mkdir(smi->proc_dir_name, proc_ipmi_root); if (!smi->proc_dir) rv = -ENOMEM; - else { - smi->proc_dir->owner = THIS_MODULE; - } if (rv == 0) rv = ipmi_smi_add_proc_entry(smi, "stats", - stat_file_read_proc, NULL, - smi, THIS_MODULE); + &smi_stats_proc_ops, + smi); if (rv == 0) rv = ipmi_smi_add_proc_entry(smi, "ipmb", - ipmb_file_read_proc, NULL, - smi, THIS_MODULE); + &smi_ipmb_proc_ops, + smi); if (rv == 0) rv = ipmi_smi_add_proc_entry(smi, "version", - version_file_read_proc, NULL, - smi, THIS_MODULE); + &smi_version_proc_ops, + smi); #endif /* CONFIG_PROC_FS */ return rv; @@ -2231,76 +2380,116 @@ static int create_files(struct bmc_device *bmc) bmc->device_id_attr.attr.name = "device_id"; bmc->device_id_attr.attr.mode = S_IRUGO; bmc->device_id_attr.show = device_id_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->device_id_attr.attr); +#endif bmc->provides_dev_sdrs_attr.attr.name = "provides_device_sdrs"; bmc->provides_dev_sdrs_attr.attr.mode = S_IRUGO; bmc->provides_dev_sdrs_attr.show = provides_dev_sdrs_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->provides_dev_sdrs_attr.attr); +#endif bmc->revision_attr.attr.name = "revision"; bmc->revision_attr.attr.mode = S_IRUGO; bmc->revision_attr.show = revision_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->revision_attr.attr); +#endif bmc->firmware_rev_attr.attr.name = "firmware_revision"; bmc->firmware_rev_attr.attr.mode = S_IRUGO; bmc->firmware_rev_attr.show = firmware_rev_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->firmware_rev_attr.attr); +#endif bmc->version_attr.attr.name = "ipmi_version"; bmc->version_attr.attr.mode = S_IRUGO; bmc->version_attr.show = ipmi_version_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->version_attr.attr); +#endif bmc->add_dev_support_attr.attr.name = "additional_device_support"; bmc->add_dev_support_attr.attr.mode = S_IRUGO; bmc->add_dev_support_attr.show = add_dev_support_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->add_dev_support_attr.attr); +#endif bmc->manufacturer_id_attr.attr.name = "manufacturer_id"; bmc->manufacturer_id_attr.attr.mode = S_IRUGO; bmc->manufacturer_id_attr.show = manufacturer_id_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->manufacturer_id_attr.attr); +#endif bmc->product_id_attr.attr.name = "product_id"; bmc->product_id_attr.attr.mode = S_IRUGO; bmc->product_id_attr.show = product_id_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->product_id_attr.attr); +#endif bmc->guid_attr.attr.name = "guid"; bmc->guid_attr.attr.mode = S_IRUGO; bmc->guid_attr.show = guid_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->guid_attr.attr); +#endif bmc->aux_firmware_rev_attr.attr.name = "aux_firmware_revision"; bmc->aux_firmware_rev_attr.attr.mode = S_IRUGO; bmc->aux_firmware_rev_attr.show = aux_firmware_rev_show; +#if !defined(__VMKLNX__) + sysfs_attr_init(&bmc->aux_firmware_rev_attr.attr); +#endif err = device_create_file(&bmc->dev->dev, &bmc->device_id_attr); - if (err) goto out; + if (err) + goto out; err = device_create_file(&bmc->dev->dev, &bmc->provides_dev_sdrs_attr); - if (err) goto out_devid; + if (err) + goto out_devid; err = device_create_file(&bmc->dev->dev, &bmc->revision_attr); - if (err) goto out_sdrs; + if (err) + goto out_sdrs; err = device_create_file(&bmc->dev->dev, &bmc->firmware_rev_attr); - if (err) goto out_rev; + if (err) + goto out_rev; err = device_create_file(&bmc->dev->dev, &bmc->version_attr); - if (err) goto out_firm; + if (err) + goto out_firm; err = device_create_file(&bmc->dev->dev, &bmc->add_dev_support_attr); - if (err) goto out_version; + if (err) + goto out_version; err = device_create_file(&bmc->dev->dev, &bmc->manufacturer_id_attr); - if (err) goto out_add_dev; + if (err) + goto out_add_dev; err = device_create_file(&bmc->dev->dev, &bmc->product_id_attr); - if (err) goto out_manu; + if (err) + goto out_manu; if (bmc->id.aux_firmware_revision_set) { err = device_create_file(&bmc->dev->dev, &bmc->aux_firmware_rev_attr); - if (err) goto out_prod_id; + if (err) + goto out_prod_id; } if (bmc->guid_set) { err = device_create_file(&bmc->dev->dev, &bmc->guid_attr); - if (err) goto out_aux_firm; + if (err) + goto out_aux_firm; } return 0; @@ -2353,9 +2542,9 @@ static int ipmi_bmc_register(ipmi_smi_t intf, int ifnum, * representing the interfaced BMC already */ if (bmc->guid_set) - old_bmc = ipmi_find_bmc_guid(&ipmidriver, bmc->guid); + old_bmc = ipmi_find_bmc_guid(&ipmidriver.driver, bmc->guid); else - old_bmc = ipmi_find_bmc_prod_dev_id(&ipmidriver, + old_bmc = ipmi_find_bmc_prod_dev_id(&ipmidriver.driver, bmc->id.product_id, bmc->id.device_id); @@ -2385,7 +2574,7 @@ static int ipmi_bmc_register(ipmi_smi_t intf, int ifnum, snprintf(name, sizeof(name), "ipmi_bmc.%4.4x", bmc->id.product_id); - while (ipmi_find_bmc_prod_dev_id(&ipmidriver, + while (ipmi_find_bmc_prod_dev_id(&ipmidriver.driver, bmc->id.product_id, bmc->id.device_id)) { if (!warn_printed) { @@ -2415,7 +2604,7 @@ static int ipmi_bmc_register(ipmi_smi_t intf, int ifnum, " Unable to allocate platform device\n"); return -ENOMEM; } - bmc->dev->dev.driver = &ipmidriver; + bmc->dev->dev.driver = &ipmidriver.driver; dev_set_drvdata(&bmc->dev->dev, bmc); kref_init(&bmc->refcount); @@ -2428,8 +2617,10 @@ static int ipmi_bmc_register(ipmi_smi_t intf, int ifnum, "ipmi_msghandler:" " Unable to register bmc device: %d\n", rv); - /* Don't go to out_err, you can only do that if - the device is registered already. */ + /* + * Don't go to out_err, you can only do that if + * the device is registered already. + */ return rv; } @@ -2442,12 +2633,11 @@ static int ipmi_bmc_register(ipmi_smi_t intf, int ifnum, return rv; } - printk(KERN_INFO - "ipmi: Found new BMC (man_id: 0x%6.6x, " - " prod_id: 0x%4.4x, dev_id: 0x%2.2x)\n", - bmc->id.manufacturer_id, - bmc->id.product_id, - bmc->id.device_id); + dev_info(intf->si_dev, "Found new BMC (man_id: 0x%6.6x, " + " prod_id: 0x%4.4x, dev_id: 0x%2.2x)\n", + bmc->id.manufacturer_id, + bmc->id.product_id, + bmc->id.device_id); } /* @@ -2620,17 +2810,18 @@ channel_handler(ipmi_smi_t intf, struct ipmi_recv_msg *msg) if ((msg->addr.addr_type == IPMI_SYSTEM_INTERFACE_ADDR_TYPE) && (msg->msg.netfn == IPMI_NETFN_APP_RESPONSE) - && (msg->msg.cmd == IPMI_GET_CHANNEL_INFO_CMD)) - { + && (msg->msg.cmd == IPMI_GET_CHANNEL_INFO_CMD)) { /* It's the one we want */ if (msg->msg.data[0] != 0) { /* Got an error from the channel, just go on. */ if (msg->msg.data[0] == IPMI_INVALID_COMMAND_ERR) { - /* If the MC does not support this - command, that is legal. We just - assume it has one IPMB at channel - zero. */ + /* + * If the MC does not support this + * command, that is legal. We just + * assume it has one IPMB at channel + * zero. + */ intf->channels[0].medium = IPMI_CHANNEL_MEDIUM_IPMB; intf->channels[0].protocol @@ -2651,7 +2842,7 @@ channel_handler(ipmi_smi_t intf, struct ipmi_recv_msg *msg) intf->channels[chan].medium = msg->msg.data[2] & 0x7f; intf->channels[chan].protocol = msg->msg.data[3] & 0x1f; - next_channel: +next_channel: intf->curr_channel++; if (intf->curr_channel >= IPMI_MAX_CHANNELS) wake_up(&intf->waitq); @@ -2672,14 +2863,20 @@ channel_handler(ipmi_smi_t intf, struct ipmi_recv_msg *msg) return; } -void ipmi_poll_interface(ipmi_user_t user) +static void ipmi_poll(ipmi_smi_t intf) { - ipmi_smi_t intf = user->intf; - if (intf->handlers->poll) intf->handlers->poll(intf->send_info); + /* In case something came in */ + handle_new_recv_msgs(intf); } +void ipmi_poll_interface(ipmi_user_t user) +{ + ipmi_poll(user->intf); +} +EXPORT_SYMBOL(ipmi_poll_interface); + int ipmi_register_smi(struct ipmi_smi_handlers *handlers, void *send_info, struct ipmi_device_id *device_id, @@ -2693,14 +2890,18 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers, ipmi_smi_t tintf; struct list_head *link; - /* Make sure the driver is actually initialized, this handles - problems with initialization order. */ + /* + * Make sure the driver is actually initialized, this handles + * problems with initialization order. + */ if (!initialized) { rv = ipmi_init_msghandler(); if (rv) return rv; - /* The init code doesn't return an error if it was turned - off, but it won't initialize. Check that. */ + /* + * The init code doesn't return an error if it was turned + * off, but it won't initialize. Check that. + */ if (!initialized) return -ENODEV; } @@ -2741,6 +2942,10 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers, #endif spin_lock_init(&intf->waiting_msgs_lock); INIT_LIST_HEAD(&intf->waiting_msgs); + tasklet_init(&intf->recv_tasklet, + smi_recv_tasklet, + (unsigned long) intf); + atomic_set(&intf->watchdog_pretimeouts_to_deliver, 0); spin_lock_init(&intf->events_lock); INIT_LIST_HEAD(&intf->waiting_events); intf->waiting_events_count = 0; @@ -2748,8 +2953,9 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers, spin_lock_init(&intf->maintenance_mode_lock); INIT_LIST_HEAD(&intf->cmd_rcvrs); init_waitqueue_head(&intf->waitq); + for (i = 0; i < IPMI_NUM_STATS; i++) + atomic_set(&intf->stats[i], 0); - spin_lock_init(&intf->counter_lock); intf->proc_dir = NULL; mutex_lock(&smi_watchers_mutex); @@ -2778,10 +2984,11 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers, if ((intf->ipmi_version_major > 1) || ((intf->ipmi_version_major == 1) - && (intf->ipmi_version_minor >= 5))) - { - /* Start scanning the channels to see what is - available. */ + && (intf->ipmi_version_minor >= 5))) { + /* + * Start scanning the channels to see what is + * available. + */ intf->null_user_handler = channel_handler; intf->curr_channel = 0; rv = send_channel_info_cmd(intf, 0); @@ -2796,6 +3003,7 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers, /* Assume a single IPMB channel at zero. */ intf->channels[0].medium = IPMI_CHANNEL_MEDIUM_IPMB; intf->channels[0].protocol = IPMI_CHANNEL_PROTOCOL_IPMB; + intf->curr_channel = IPMI_MAX_CHANNELS; } if (rv == 0) @@ -2829,6 +3037,7 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers, return rv; } +EXPORT_SYMBOL(ipmi_register_smi); static void cleanup_smi_msgs(ipmi_smi_t intf) { @@ -2863,8 +3072,10 @@ int ipmi_unregister_smi(ipmi_smi_t intf) remove_proc_entries(intf); - /* Call all the watcher interfaces to tell them that - an interface is gone. */ + /* + * Call all the watcher interfaces to tell them that + * an interface is gone. + */ list_for_each_entry(w, &smi_watchers, link) w->smi_gone(intf_num); mutex_unlock(&smi_watchers_mutex); @@ -2872,22 +3083,22 @@ int ipmi_unregister_smi(ipmi_smi_t intf) kref_put(&intf->refcount, intf_free); return 0; } +EXPORT_SYMBOL(ipmi_unregister_smi); static int handle_ipmb_get_msg_rsp(ipmi_smi_t intf, struct ipmi_smi_msg *msg) { struct ipmi_ipmb_addr ipmb_addr; struct ipmi_recv_msg *recv_msg; - unsigned long flags; - - /* This is 11, not 10, because the response must contain a - * completion code. */ + + /* + * This is 11, not 10, because the response must contain a + * completion code. + */ if (msg->rsp_size < 11) { /* Message not big enough, just ignore it. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->invalid_ipmb_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, invalid_ipmb_responses); return 0; } @@ -2901,8 +3112,10 @@ static int handle_ipmb_get_msg_rsp(ipmi_smi_t intf, ipmb_addr.channel = msg->rsp[3] & 0x0f; ipmb_addr.lun = msg->rsp[7] & 3; - /* It's a response from a remote entity. Look up the sequence - number and handle the response. */ + /* + * It's a response from a remote entity. Look up the sequence + * number and handle the response. + */ if (intf_find_seq(intf, msg->rsp[7] >> 2, msg->rsp[3] & 0x0f, @@ -2911,27 +3124,27 @@ static int handle_ipmb_get_msg_rsp(ipmi_smi_t intf, (struct ipmi_addr *) &(ipmb_addr), &recv_msg)) { - /* We were unable to find the sequence number, - so just nuke the message. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->unhandled_ipmb_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + /* + * We were unable to find the sequence number, + * so just nuke the message. + */ + ipmi_inc_stat(intf, unhandled_ipmb_responses); return 0; } memcpy(recv_msg->msg_data, &(msg->rsp[9]), msg->rsp_size - 9); - /* THe other fields matched, so no need to set them, except - for netfn, which needs to be the response that was - returned, not the request value. */ + /* + * The other fields matched, so no need to set them, except + * for netfn, which needs to be the response that was + * returned, not the request value. + */ recv_msg->msg.netfn = msg->rsp[4] >> 2; recv_msg->msg.data = recv_msg->msg_data; recv_msg->msg.data_len = msg->rsp_size - 10; recv_msg->recv_type = IPMI_RESPONSE_RECV_TYPE; - spin_lock_irqsave(&intf->counter_lock, flags); - intf->handled_ipmb_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, handled_ipmb_responses); deliver_response(recv_msg); return 0; @@ -2948,14 +3161,11 @@ static int handle_ipmb_get_msg_cmd(ipmi_smi_t intf, ipmi_user_t user = NULL; struct ipmi_ipmb_addr *ipmb_addr; struct ipmi_recv_msg *recv_msg; - unsigned long flags; struct ipmi_smi_handlers *handlers; if (msg->rsp_size < 10) { /* Message not big enough, just ignore it. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, invalid_commands); return 0; } @@ -2979,19 +3189,17 @@ static int handle_ipmb_get_msg_cmd(ipmi_smi_t intf, if (user == NULL) { /* We didn't find a user, deliver an error response. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->unhandled_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, unhandled_commands); msg->data[0] = (IPMI_NETFN_APP_REQUEST << 2); msg->data[1] = IPMI_SEND_MSG_CMD; msg->data[2] = msg->rsp[3]; msg->data[3] = msg->rsp[6]; - msg->data[4] = ((netfn + 1) << 2) | (msg->rsp[7] & 0x3); + msg->data[4] = ((netfn + 1) << 2) | (msg->rsp[7] & 0x3); msg->data[5] = ipmb_checksum(&(msg->data[3]), 2); msg->data[6] = intf->channels[msg->rsp[3] & 0xf].address; - /* rqseq/lun */ - msg->data[7] = (msg->rsp[7] & 0xfc) | (msg->rsp[4] & 0x3); + /* rqseq/lun */ + msg->data[7] = (msg->rsp[7] & 0xfc) | (msg->rsp[4] & 0x3); msg->data[8] = msg->rsp[8]; /* cmd */ msg->data[9] = IPMI_INVALID_CMD_COMPLETION_CODE; msg->data[10] = ipmb_checksum(&(msg->data[6]), 4); @@ -3010,23 +3218,25 @@ static int handle_ipmb_get_msg_cmd(ipmi_smi_t intf, handlers = intf->handlers; if (handlers) { handlers->sender(intf->send_info, msg, 0); - /* We used the message, so return the value - that causes it to not be freed or - queued. */ + /* + * We used the message, so return the value + * that causes it to not be freed or + * queued. + */ rv = -1; } rcu_read_unlock(); } else { /* Deliver the message to the user. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->handled_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, handled_commands); recv_msg = ipmi_alloc_recv_msg(); if (!recv_msg) { - /* We couldn't allocate memory for the - message, so requeue it for handling - later. */ + /* + * We couldn't allocate memory for the + * message, so requeue it for handling + * later. + */ rv = 1; kref_put(&user->refcount, free_user); } else { @@ -3037,8 +3247,10 @@ static int handle_ipmb_get_msg_cmd(ipmi_smi_t intf, ipmb_addr->lun = msg->rsp[7] & 3; ipmb_addr->channel = msg->rsp[3] & 0xf; - /* Extract the rest of the message information - from the IPMB header.*/ + /* + * Extract the rest of the message information + * from the IPMB header. + */ recv_msg->user = user; recv_msg->recv_type = IPMI_CMD_RECV_TYPE; recv_msg->msgid = msg->rsp[7] >> 2; @@ -3046,8 +3258,10 @@ static int handle_ipmb_get_msg_cmd(ipmi_smi_t intf, recv_msg->msg.cmd = msg->rsp[8]; recv_msg->msg.data = recv_msg->msg_data; - /* We chop off 10, not 9 bytes because the checksum - at the end also needs to be removed. */ + /* + * We chop off 10, not 9 bytes because the checksum + * at the end also needs to be removed. + */ recv_msg->msg.data_len = msg->rsp_size - 10; memcpy(recv_msg->msg_data, &(msg->rsp[9]), @@ -3064,16 +3278,15 @@ static int handle_lan_get_msg_rsp(ipmi_smi_t intf, { struct ipmi_lan_addr lan_addr; struct ipmi_recv_msg *recv_msg; - unsigned long flags; - /* This is 13, not 12, because the response must contain a - * completion code. */ + /* + * This is 13, not 12, because the response must contain a + * completion code. + */ if (msg->rsp_size < 13) { /* Message not big enough, just ignore it. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->invalid_lan_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, invalid_lan_responses); return 0; } @@ -3090,8 +3303,10 @@ static int handle_lan_get_msg_rsp(ipmi_smi_t intf, lan_addr.privilege = msg->rsp[3] >> 4; lan_addr.lun = msg->rsp[9] & 3; - /* It's a response from a remote entity. Look up the sequence - number and handle the response. */ + /* + * It's a response from a remote entity. Look up the sequence + * number and handle the response. + */ if (intf_find_seq(intf, msg->rsp[9] >> 2, msg->rsp[3] & 0x0f, @@ -3100,27 +3315,27 @@ static int handle_lan_get_msg_rsp(ipmi_smi_t intf, (struct ipmi_addr *) &(lan_addr), &recv_msg)) { - /* We were unable to find the sequence number, - so just nuke the message. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->unhandled_lan_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + /* + * We were unable to find the sequence number, + * so just nuke the message. + */ + ipmi_inc_stat(intf, unhandled_lan_responses); return 0; } memcpy(recv_msg->msg_data, &(msg->rsp[11]), msg->rsp_size - 11); - /* The other fields matched, so no need to set them, except - for netfn, which needs to be the response that was - returned, not the request value. */ + /* + * The other fields matched, so no need to set them, except + * for netfn, which needs to be the response that was + * returned, not the request value. + */ recv_msg->msg.netfn = msg->rsp[6] >> 2; recv_msg->msg.data = recv_msg->msg_data; recv_msg->msg.data_len = msg->rsp_size - 12; recv_msg->recv_type = IPMI_RESPONSE_RECV_TYPE; - spin_lock_irqsave(&intf->counter_lock, flags); - intf->handled_lan_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, handled_lan_responses); deliver_response(recv_msg); return 0; @@ -3137,13 +3352,10 @@ static int handle_lan_get_msg_cmd(ipmi_smi_t intf, ipmi_user_t user = NULL; struct ipmi_lan_addr *lan_addr; struct ipmi_recv_msg *recv_msg; - unsigned long flags; if (msg->rsp_size < 12) { /* Message not big enough, just ignore it. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, invalid_commands); return 0; } @@ -3167,23 +3379,24 @@ static int handle_lan_get_msg_cmd(ipmi_smi_t intf, if (user == NULL) { /* We didn't find a user, just give up. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->unhandled_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, unhandled_commands); - rv = 0; /* Don't do anything with these messages, just - allow them to be freed. */ + /* + * Don't do anything with these messages, just + * allow them to be freed. + */ + rv = 0; } else { /* Deliver the message to the user. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->handled_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, handled_commands); recv_msg = ipmi_alloc_recv_msg(); if (!recv_msg) { - /* We couldn't allocate memory for the - message, so requeue it for handling - later. */ + /* + * We couldn't allocate memory for the + * message, so requeue it for handling + * later. + */ rv = 1; kref_put(&user->refcount, free_user); } else { @@ -3197,8 +3410,10 @@ static int handle_lan_get_msg_cmd(ipmi_smi_t intf, lan_addr->channel = msg->rsp[3] & 0xf; lan_addr->privilege = msg->rsp[3] >> 4; - /* Extract the rest of the message information - from the IPMB header.*/ + /* + * Extract the rest of the message information + * from the IPMB header. + */ recv_msg->user = user; recv_msg->recv_type = IPMI_CMD_RECV_TYPE; recv_msg->msgid = msg->rsp[9] >> 2; @@ -3206,8 +3421,10 @@ static int handle_lan_get_msg_cmd(ipmi_smi_t intf, recv_msg->msg.cmd = msg->rsp[10]; recv_msg->msg.data = recv_msg->msg_data; - /* We chop off 12, not 11 bytes because the checksum - at the end also needs to be removed. */ + /* + * We chop off 12, not 11 bytes because the checksum + * at the end also needs to be removed. + */ recv_msg->msg.data_len = msg->rsp_size - 12; memcpy(recv_msg->msg_data, &(msg->rsp[11]), @@ -3223,7 +3440,7 @@ static void copy_event_into_recv_msg(struct ipmi_recv_msg *recv_msg, struct ipmi_smi_msg *msg) { struct ipmi_system_interface_addr *smi_addr; - + recv_msg->msgid = 0; smi_addr = (struct ipmi_system_interface_addr *) &(recv_msg->addr); smi_addr->addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE; @@ -3249,9 +3466,7 @@ static int handle_read_event_rsp(ipmi_smi_t intf, if (msg->rsp_size < 19) { /* Message is too small to be an IPMB event. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->invalid_events++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, invalid_events); return 0; } @@ -3264,12 +3479,12 @@ static int handle_read_event_rsp(ipmi_smi_t intf, spin_lock_irqsave(&intf->events_lock, flags); - spin_lock(&intf->counter_lock); - intf->events++; - spin_unlock(&intf->counter_lock); + ipmi_inc_stat(intf, events); - /* Allocate and fill in one message for every user that is getting - events. */ + /* + * Allocate and fill in one message for every user that is getting + * events. + */ rcu_read_lock(); list_for_each_entry_rcu(user, &intf->users, link) { if (!user->gets_events) @@ -3283,9 +3498,11 @@ static int handle_read_event_rsp(ipmi_smi_t intf, list_del(&recv_msg->link); ipmi_free_recv_msg(recv_msg); } - /* We couldn't allocate memory for the - message, so requeue it for handling - later. */ + /* + * We couldn't allocate memory for the + * message, so requeue it for handling + * later. + */ rv = 1; goto out; } @@ -3306,13 +3523,17 @@ static int handle_read_event_rsp(ipmi_smi_t intf, deliver_response(recv_msg); } } else if (intf->waiting_events_count < MAX_EVENTS_IN_QUEUE) { - /* No one to receive the message, put it in queue if there's - not already too many things in the queue. */ + /* + * No one to receive the message, put it in queue if there's + * not already too many things in the queue. + */ recv_msg = ipmi_alloc_recv_msg(); if (!recv_msg) { - /* We couldn't allocate memory for the - message, so requeue it for handling - later. */ + /* + * We couldn't allocate memory for the + * message, so requeue it for handling + * later. + */ rv = 1; goto out; } @@ -3320,18 +3541,14 @@ static int handle_read_event_rsp(ipmi_smi_t intf, copy_event_into_recv_msg(recv_msg, msg); list_add_tail(&(recv_msg->link), &(intf->waiting_events)); intf->waiting_events_count++; -#if defined(__VMKLNX__) - } else if (!intf->event_queue_full) { -#else - } else { -#endif - /* There's too many things in the queue, discard this - message. */ - printk(KERN_INFO PFX "Event queue full, discarding an" - " incoming event\n"); -#if defined(__VMKLNX__) - intf->event_queue_full = 1; -#endif + } else if (!intf->event_msg_printed) { + /* + * There's too many things in the queue, discard this + * message. + */ + printk(KERN_WARNING PFX "Event queue full, discarding" + " incoming events\n"); + intf->event_msg_printed = 1; } out: @@ -3344,13 +3561,12 @@ static int handle_bmc_rsp(ipmi_smi_t intf, struct ipmi_smi_msg *msg) { struct ipmi_recv_msg *recv_msg; - unsigned long flags; struct ipmi_user *user; recv_msg = (struct ipmi_recv_msg *) msg->user_data; - if (recv_msg == NULL) - { - printk(KERN_WARNING"IPMI message received with no owner. This\n" + if (recv_msg == NULL) { + printk(KERN_WARNING + "IPMI message received with no owner. This\n" "could be because of a malformed message, or\n" "because of a hardware error. Contact your\n" "hardware vender for assistance\n"); @@ -3361,16 +3577,12 @@ static int handle_bmc_rsp(ipmi_smi_t intf, /* Make sure the user still exists. */ if (user && !user->valid) { /* The user for the message went away, so give up. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->unhandled_local_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, unhandled_local_responses); ipmi_free_recv_msg(recv_msg); } else { struct ipmi_system_interface_addr *smi_addr; - spin_lock_irqsave(&intf->counter_lock, flags); - intf->handled_local_responses++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, handled_local_responses); recv_msg->recv_type = IPMI_RESPONSE_RECV_TYPE; recv_msg->msgid = msg->msgid; smi_addr = ((struct ipmi_system_interface_addr *) @@ -3391,134 +3603,129 @@ static int handle_bmc_rsp(ipmi_smi_t intf, return 0; } -#if defined(__VMKLNX__) && defined(HP_G6_SUPPORT) /* -** This routine will handle "Get Message" command responses with -** channels that use an OEM Medium. We will queue these messages -** until an application comes and retrieves them. The message format -** belongs to the OEM. See IPMI 2.0 specification, Chapter 6 and -** Chapter 22, sections 22.6 and 22.24 for more details. -*/ + * This routine will handle "Get Message" command responses with + * channels that use an OEM Medium. The message format + * belongs to the OEM. See IPMI 2.0 specification, Chapter 6 and + * Chapter 22, sections 22.6 and 22.24 for more details. + */ static int handle_oem_get_msg_cmd(ipmi_smi_t intf, struct ipmi_smi_msg *msg) { - struct cmd_rcvr *rcvr; - int rv = 0; - unsigned char netfn; - unsigned char cmd; - ipmi_user_t user = NULL; - struct ipmi_system_interface_addr *smi_addr; - struct ipmi_recv_msg *recv_msg; - unsigned long flags; - unsigned char chan ; + struct cmd_rcvr *rcvr; + int rv = 0; + unsigned char netfn; + unsigned char cmd; + unsigned char chan; + ipmi_user_t user = NULL; + struct ipmi_system_interface_addr *smi_addr; + struct ipmi_recv_msg *recv_msg; - /* We expect the OEM SW to perform error checking - so we just do some basic sanity checks */ - if (msg->rsp_size < 4) { - /* Message not big enough, just ignore it. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->invalid_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); - return 0; - } - - if (msg->rsp[2] != 0) { - /* An error getting the response, just ignore it. */ - return 0; - } - - /* This is an OEM Message so the OEM needs to know how - handle the message. We do no interpretation. */ - - netfn = msg->rsp[0] >> 2; - cmd = msg->rsp[1]; - chan = msg->rsp[3] & 0xf; - - rcu_read_lock(); - rcvr = find_cmd_rcvr(intf, netfn, cmd, chan); - if (rcvr) { - user = rcvr->user; - kref_get(&user->refcount); - } else - user = NULL; - - rcu_read_unlock(); - - if (user == NULL) { - /* We didn't find a user but we will queue this message - until a user registers to get it. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->unhandled_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); - -#ifdef DEBUG_MSGING - { - int m; - for (m=0; mdata_size; m++) - printk(" %2.2x", msg->data[m]); - printk("\n"); - } -#endif - rv = 1; /* Queue the message and wait for a user to - come and fetch it. OEM Messages could - be sent from the BMC before an application - has loaded to receive them. */ - - } else { - /* Deliver the message to the user. */ - spin_lock_irqsave(&intf->counter_lock, flags); - intf->handled_commands++; - spin_unlock_irqrestore(&intf->counter_lock, flags); - - recv_msg = ipmi_alloc_recv_msg(); - if (! recv_msg) { - /* We couldn't allocate memory for the - message, so requeue it for handling - later. */ - rv = 1; - } else { - /* OEM Messages are expected to be delivered via - the system interface to SMS software. We might - need to visit this again depending on OEM - requirements */ - smi_addr = ((struct ipmi_system_interface_addr *) - &(recv_msg->addr)); - smi_addr->addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE; - smi_addr->channel = IPMI_BMC_CHANNEL; - smi_addr->lun = msg->rsp[0] & 3; - - /* Make sure we have the user data in the recv_msg - or things will get ugly soon. I think the IPMB - code is also broken but I have no way to prove - this. */ - recv_msg->user = user; - recv_msg->user_msg_data = NULL; - - recv_msg->msg.netfn = msg->rsp[0] >> 2; - recv_msg->msg.cmd = msg->rsp[1]; - recv_msg->recv_type = IPMI_OEM_RECV_TYPE; - - /* The message starts at byte 4 which follows the - the Channel Byte in the "GET MESSAGE" command */ - - memcpy(&(recv_msg->msg_data[0]), - &(msg->rsp[4]), - msg->rsp_size - 4); - recv_msg->msg.data = &(recv_msg->msg_data[0]); - recv_msg->msg.data_len = msg->rsp_size - 4; - deliver_response(recv_msg); + /* + * We expect the OEM SW to perform error checking + * so we just do some basic sanity checks + */ + if (msg->rsp_size < 4) { + /* Message not big enough, just ignore it. */ + ipmi_inc_stat(intf, sent_invalid_commands); + return 0; } - } - return rv; + if (msg->rsp[2] != 0) { + /* An error getting the response, just ignore it. */ + return 0; + } + + /* + * This is an OEM Message so the OEM needs to know how + * handle the message. We do no interpretation. + */ + + netfn = msg->rsp[0] >> 2; + cmd = msg->rsp[1]; + chan = msg->rsp[3] & 0xf; + + rcu_read_lock(); + rcvr = find_cmd_rcvr(intf, netfn, cmd, chan); + if (rcvr) { + user = rcvr->user; + kref_get(&user->refcount); + } else + user = NULL; + rcu_read_unlock(); + + if (user == NULL) { + /* We didn't find a user, just give up. */ + ipmi_inc_stat(intf, unhandled_commands); + + /* + * Don't do anything with these messages, just allow + * them to be freed. + */ + + rv = 0; + } else { + /* Deliver the message to the user. */ + ipmi_inc_stat(intf, handled_commands); + + recv_msg = ipmi_alloc_recv_msg(); + if (! recv_msg) { + /* + * We couldn't allocate memory for the + * message, so requeue it for handling + * later. + */ + rv = 1; + kref_put(&user->refcount, free_user); + } else { + /* + * OEM Messages are expected to be delivered via + * the system interface to SMS software. We might + * need to visit this again depending on OEM + * requirements + */ + smi_addr = ((struct ipmi_system_interface_addr *) + &(recv_msg->addr)); + smi_addr->addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE; + smi_addr->channel = IPMI_BMC_CHANNEL; + smi_addr->lun = msg->rsp[0] & 3; + + /* + * Make sure we have the user data in the recv_msg + * or things will get ugly soon. I think the IPMB + * code is also broken but I have no way to prove + * this. + */ + recv_msg->user = user; + recv_msg->user_msg_data = NULL; + recv_msg->recv_type = IPMI_OEM_RECV_TYPE; + recv_msg->msg.netfn = msg->rsp[0] >> 2; + recv_msg->msg.cmd = msg->rsp[1]; + recv_msg->msg.data = recv_msg->msg_data; + /* + * The message starts at byte 4 which follows the + * the Channel Byte in the "GET MESSAGE" command + */ + + recv_msg->msg.data_len = msg->rsp_size - 4; + memcpy(recv_msg->msg_data, + &(msg->rsp[4]), + msg->rsp_size - 4); + recv_msg->msg.data_len = msg->rsp_size - 4; + deliver_response(recv_msg); + } + } + + return rv; } -#endif /* defined(__VMKLNX__) && defined(HP_G6_SUPPORT) */ -/* Handle a new message. Return 1 if the message should be requeued, - 0 if the message should be freed, or -1 if the message should not - be freed or requeued. */ -static int handle_new_recv_msg(ipmi_smi_t intf, +/* + * Handle a new message. Return 1 if the message should be requeued, + * 0 if the message should be freed, or -1 if the message should not + * be freed or requeued. + */ +static int handle_one_recv_msg(ipmi_smi_t intf, struct ipmi_smi_msg *msg) { int requeue; @@ -3534,18 +3741,22 @@ static int handle_new_recv_msg(ipmi_smi_t intf, if (msg->rsp_size < 2) { /* Message is too small to be correct. */ #if defined(__VMKLNX__) - /* - * Modification History: 03/29/2011: Message logging is being throttled to control log spew. - */ + /* + * Modification History: 03/29/2011: + * Message logging is being throttled to control log spew. + */ - /* Ensure message logging is not throttled in case of message spew*/ - static uint32_t logThrottleCounter = 0; - if(__xCountCheckx__(++logThrottleCounter)) { - printk(KERN_WARNING PFX "This message has repeated %d times: " - "BMC returned too small a message" - " for netfn %x cmd %x, got %d bytes\n", - logThrottleCounter, (msg->data[0] >> 2) | 1, msg->data[1], msg->rsp_size); - } + /* Ensure message logging is not throttled in case of message spew*/ + static uint32_t logThrottleCounter = 0; + if(__xCountCheckx__(++logThrottleCounter)) { + printk(KERN_WARNING PFX + "This message has repeated %d times: " + "BMC returned too small a message" + " for netfn %x cmd %x, got %d bytes\n", + logThrottleCounter, ( + msg->data[0] >> 2) | 1, + msg->data[1], msg->rsp_size); + } #else printk(KERN_WARNING PFX "BMC returned to small a message" " for netfn %x cmd %x, got %d bytes\n", @@ -3557,30 +3768,35 @@ static int handle_new_recv_msg(ipmi_smi_t intf, msg->rsp[1] = msg->data[1]; msg->rsp[2] = IPMI_ERR_UNSPECIFIED; msg->rsp_size = 3; - } else if (((msg->rsp[0] >> 2) != ((msg->data[0] >> 2) | 1))/* Netfn */ - || (msg->rsp[1] != msg->data[1])) /* Command */ - { - /* The response is not even marginally correct. */ + } else if (((msg->rsp[0] >> 2) != ((msg->data[0] >> 2) | 1)) + || (msg->rsp[1] != msg->data[1])) { + /* + * The NetFN and Command in the response is not even + * marginally correct. + */ #if defined(__VMKLNX__) - /* - * Modification History: 03/29/2011: Message logging is being throttled to control log spew. - */ + /* + * Modification History: 03/29/2011: + * Message logging is being throttled to control log spew. + */ - /* Ensure message logging is not throttled in case of message spew*/ - static uint32_t logThrottleCounter = 0; - if(__xCountCheckx__(++logThrottleCounter)) { - printk(KERN_WARNING PFX "This message has repeated %d times: " - "BMC returned incorrect response" - " expected netfn %x cmd %x, got netfn %x cmd %x\n", - logThrottleCounter, (msg->data[0] >> 2) | 1, msg->data[1], - msg->rsp[0] >> 2, msg->rsp[1]); - - } + /* Ensure message logging is not throttled in case of message spew*/ + static uint32_t logThrottleCounter = 0; + if(__xCountCheckx__(++logThrottleCounter)) { + printk(KERN_WARNING PFX + "This message has repeated %d times: " + "BMC returned incorrect response" + " expected netfn %x cmd %x," + " got netfn %x cmd %x\n", + logThrottleCounter, + (msg->data[0] >> 2) | 1, msg->data[1], + msg->rsp[0] >> 2, msg->rsp[1]); + } #else printk(KERN_WARNING PFX "BMC returned incorrect response," - " expected netfn %x cmd %x, got netfn %x cmd %x\n", - (msg->data[0] >> 2) | 1, msg->data[1], - msg->rsp[0] >> 2, msg->rsp[1]); + " expected netfn %x cmd %x, got netfn %x cmd %x\n", + (msg->data[0] >> 2) | 1, msg->data[1], + msg->rsp[0] >> 2, msg->rsp[1]); #endif /* defined(__VMKLNX__) */ /* Generate an error response for the message. */ @@ -3591,11 +3807,12 @@ static int handle_new_recv_msg(ipmi_smi_t intf, } if ((msg->rsp[0] == ((IPMI_NETFN_APP_REQUEST|1) << 2)) - && (msg->rsp[1] == IPMI_SEND_MSG_CMD) - && (msg->user_data != NULL)) - { - /* It's a response to a response we sent. For this we - deliver a send message response to the user. */ + && (msg->rsp[1] == IPMI_SEND_MSG_CMD) + && (msg->user_data != NULL)) { + /* + * It's a response to a response we sent. For this we + * deliver a send message response to the user. + */ struct ipmi_recv_msg *recv_msg = msg->user_data; requeue = 0; @@ -3621,8 +3838,7 @@ static int handle_new_recv_msg(ipmi_smi_t intf, recv_msg->msg_data[0] = msg->rsp[2]; deliver_response(recv_msg); } else if ((msg->rsp[0] == ((IPMI_NETFN_APP_REQUEST|1) << 2)) - && (msg->rsp[1] == IPMI_GET_MSG_CMD)) - { + && (msg->rsp[1] == IPMI_GET_MSG_CMD)) { /* It's from the receive queue. */ chan = msg->rsp[3] & 0xf; if (chan >= IPMI_MAX_CHANNELS) { @@ -3631,15 +3847,30 @@ static int handle_new_recv_msg(ipmi_smi_t intf, goto out; } + /* + * We need to make sure the channels have been initialized. + * The channel_handler routine will set the "curr_channel" + * equal to or greater than IPMI_MAX_CHANNELS when all the + * channels for this interface have been initialized. + */ + if (intf->curr_channel < IPMI_MAX_CHANNELS) { + requeue = 0; /* Throw the message away */ + goto out; + } + switch (intf->channels[chan].medium) { case IPMI_CHANNEL_MEDIUM_IPMB: if (msg->rsp[4] & 0x04) { - /* It's a response, so find the - requesting message and send it up. */ + /* + * It's a response, so find the + * requesting message and send it up. + */ requeue = handle_ipmb_get_msg_rsp(intf, msg); } else { - /* It's a command to the SMS from some other - entity. Handle that. */ + /* + * It's a command to the SMS from some other + * entity. Handle that. + */ requeue = handle_ipmb_get_msg_cmd(intf, msg); } break; @@ -3647,56 +3878,42 @@ static int handle_new_recv_msg(ipmi_smi_t intf, case IPMI_CHANNEL_MEDIUM_8023LAN: case IPMI_CHANNEL_MEDIUM_ASYNC: if (msg->rsp[6] & 0x04) { - /* It's a response, so find the - requesting message and send it up. */ + /* + * It's a response, so find the + * requesting message and send it up. + */ requeue = handle_lan_get_msg_rsp(intf, msg); } else { - /* It's a command to the SMS from some other - entity. Handle that. */ + /* + * It's a command to the SMS from some other + * entity. Handle that. + */ requeue = handle_lan_get_msg_cmd(intf, msg); } break; default: -#if defined(__VMKLNX__) && defined(HP_G6_SUPPORT) - /* Check for OEM Channels. Clients had better - register for these commands. */ - if (intf->intf_num < 0) /* Interface no longer valid */ - requeue = 0; - else if ( (intf->channels[chan].medium >= 0x60) && - (intf->channels[chan].medium <= 0x7F) ) { + /* + * Check for OEM Channels. Clients had better + * register for these commands + */ + if ((intf->channels[chan].medium + >= IPMI_CHANNEL_MEDIUM_OEM_MIN) + && (intf->channels[chan].medium + <= IPMI_CHANNEL_MEDIUM_OEM_MAX)) { requeue = handle_oem_get_msg_cmd(intf, msg); - + } else { /* - ** We may receive an OEM channel message before - ** all channels are initialized. We don't want - ** to lose such messages, but if no user is set - ** to receive them, we must put them at the end - ** of the queue so they do not block processing - ** of channel initialization messages. We know - ** the interface's channels are all initialized - ** by channel_handler() setting curr_channel to - ** IPMI_MAX_CHANNELS. - */ - if (requeue && - intf->curr_channel < IPMI_MAX_CHANNELS) { - requeue = 2; /* Requeue at tail */ - } + * We don't handle the channel type, so just + * free the message. + */ + requeue = 0; } - else - /* free the message. */ - requeue = 0; -#else - /* We don't handle the channel type, so just - * free the message. */ - requeue = 0; -#endif /* defined(__VMKLNX__) && defined(HP_G6_SUPPORT) */ } } else if ((msg->rsp[0] == ((IPMI_NETFN_APP_REQUEST|1) << 2)) - && (msg->rsp[1] == IPMI_READ_EVENT_MSG_BUFFER_CMD)) - { + && (msg->rsp[1] == IPMI_READ_EVENT_MSG_BUFFER_CMD)) { /* It's an asyncronous event. */ requeue = handle_read_event_rsp(intf, msg); } else { @@ -3708,97 +3925,141 @@ static int handle_new_recv_msg(ipmi_smi_t intf, return requeue; } +/* + * If there are messages in the queue or pretimeouts, handle them. + */ +static void handle_new_recv_msgs(ipmi_smi_t intf) +{ + struct ipmi_smi_msg *smi_msg; + unsigned long flags = 0; + int rv; + int run_to_completion = intf->run_to_completion; + + /* See if any waiting messages need to be processed. */ + if (!run_to_completion) + spin_lock_irqsave(&intf->waiting_msgs_lock, flags); + while (!list_empty(&intf->waiting_msgs)) { + smi_msg = list_entry(intf->waiting_msgs.next, + struct ipmi_smi_msg, link); + list_del(&smi_msg->link); + if (!run_to_completion) + spin_unlock_irqrestore(&intf->waiting_msgs_lock, flags); + rv = handle_one_recv_msg(intf, smi_msg); + if (!run_to_completion) + spin_lock_irqsave(&intf->waiting_msgs_lock, flags); + if (rv == 0) { + /* Message handled */ + ipmi_free_smi_msg(smi_msg); + } else if (rv < 0) { + /* Fatal error on the message, del but don't free. */ + } else { + /* + * To preserve message order, quit if we + * can't handle a message. + */ + list_add(&smi_msg->link, &intf->waiting_msgs); + break; + } + } + if (!run_to_completion) + spin_unlock_irqrestore(&intf->waiting_msgs_lock, flags); + + /* + * If the pretimout count is non-zero, decrement one from it and + * deliver pretimeouts to all the users. + */ + if (atomic_add_unless(&intf->watchdog_pretimeouts_to_deliver, -1, 0)) { + ipmi_user_t user; + + rcu_read_lock(); + list_for_each_entry_rcu(user, &intf->users, link) { + if (user->handler->ipmi_watchdog_pretimeout) + user->handler->ipmi_watchdog_pretimeout( + user->handler_data); + } + rcu_read_unlock(); + } +} + +static void smi_recv_tasklet(unsigned long val) +{ + handle_new_recv_msgs((ipmi_smi_t) val); +} + /* Handle a new message from the lower layer. */ void ipmi_smi_msg_received(ipmi_smi_t intf, struct ipmi_smi_msg *msg) { - unsigned long flags; - int rv; + unsigned long flags = 0; /* keep us warning-free. */ + int run_to_completion; if ((msg->data_size >= 2) && (msg->data[0] == (IPMI_NETFN_APP_REQUEST << 2)) && (msg->data[1] == IPMI_SEND_MSG_CMD) - && (msg->user_data == NULL)) - { - /* This is the local response to a command send, start - the timer for these. The user_data will not be - NULL if this is a response send, and we will let - response sends just go through. */ + && (msg->user_data == NULL)) { + /* + * This is the local response to a command send, start + * the timer for these. The user_data will not be + * NULL if this is a response send, and we will let + * response sends just go through. + */ - /* Check for errors, if we get certain errors (ones - that mean basically we can try again later), we - ignore them and start the timer. Otherwise we - report the error immediately. */ + /* + * Check for errors, if we get certain errors (ones + * that mean basically we can try again later), we + * ignore them and start the timer. Otherwise we + * report the error immediately. + */ if ((msg->rsp_size >= 3) && (msg->rsp[2] != 0) && (msg->rsp[2] != IPMI_NODE_BUSY_ERR) && (msg->rsp[2] != IPMI_LOST_ARBITRATION_ERR) && (msg->rsp[2] != IPMI_BUS_ERR) - && (msg->rsp[2] != IPMI_NAK_ON_WRITE_ERR)) - { + && (msg->rsp[2] != IPMI_NAK_ON_WRITE_ERR)) { int chan = msg->rsp[3] & 0xf; /* Got an error sending the message, handle it. */ - spin_lock_irqsave(&intf->counter_lock, flags); if (chan >= IPMI_MAX_CHANNELS) ; /* This shouldn't happen */ else if ((intf->channels[chan].medium == IPMI_CHANNEL_MEDIUM_8023LAN) || (intf->channels[chan].medium == IPMI_CHANNEL_MEDIUM_ASYNC)) - intf->sent_lan_command_errs++; + ipmi_inc_stat(intf, sent_lan_command_errs); else - intf->sent_ipmb_command_errs++; - spin_unlock_irqrestore(&intf->counter_lock, flags); + ipmi_inc_stat(intf, sent_ipmb_command_errs); intf_err_seq(intf, msg->msgid, msg->rsp[2]); - } else { + } else /* The message was sent, start the timer. */ intf_start_seq_timer(intf, msg->msgid); - } ipmi_free_smi_msg(msg); goto out; } - /* To preserve message order, if the list is not empty, we - tack this message onto the end of the list. */ - spin_lock_irqsave(&intf->waiting_msgs_lock, flags); - if (!list_empty(&intf->waiting_msgs)) { - list_add_tail(&msg->link, &intf->waiting_msgs); - spin_unlock_irqrestore(&intf->waiting_msgs_lock, flags); - goto out; - } - spin_unlock_irqrestore(&intf->waiting_msgs_lock, flags); - - rv = handle_new_recv_msg(intf, msg); - if (rv > 0) { - /* Could not handle the message now, just add it to a - list to handle later. */ + /* + * To preserve message order, if the list is not empty, we + * tack this message onto the end of the list. + */ + run_to_completion = intf->run_to_completion; + if (!run_to_completion) spin_lock_irqsave(&intf->waiting_msgs_lock, flags); - list_add_tail(&msg->link, &intf->waiting_msgs); + list_add_tail(&msg->link, &intf->waiting_msgs); + if (!run_to_completion) spin_unlock_irqrestore(&intf->waiting_msgs_lock, flags); - } else if (rv == 0) { - ipmi_free_smi_msg(msg); - } + tasklet_schedule(&intf->recv_tasklet); out: return; } +EXPORT_SYMBOL(ipmi_smi_msg_received); void ipmi_smi_watchdog_pretimeout(ipmi_smi_t intf) { - ipmi_user_t user; - - rcu_read_lock(); - list_for_each_entry_rcu(user, &intf->users, link) { - if (!user->handler->ipmi_watchdog_pretimeout) - continue; - - user->handler->ipmi_watchdog_pretimeout(user->handler_data); - } - rcu_read_unlock(); + atomic_set(&intf->watchdog_pretimeouts_to_deliver, 1); + tasklet_schedule(&intf->recv_tasklet); } - +EXPORT_SYMBOL(ipmi_smi_watchdog_pretimeout); static struct ipmi_smi_msg * smi_from_recv_msg(ipmi_smi_t intf, struct ipmi_recv_msg *recv_msg, @@ -3806,14 +4067,16 @@ smi_from_recv_msg(ipmi_smi_t intf, struct ipmi_recv_msg *recv_msg, { struct ipmi_smi_msg *smi_msg = ipmi_alloc_smi_msg(); if (!smi_msg) - /* If we can't allocate the message, then just return, we - get 4 retries, so this should be ok. */ + /* + * If we can't allocate the message, then just return, we + * get 4 retries, so this should be ok. + */ return NULL; memcpy(smi_msg->data, recv_msg->msg.data, recv_msg->msg.data_len); smi_msg->data_size = recv_msg->msg.data_len; smi_msg->msgid = STORE_SEQ_IN_MSGID(seq, seqid); - + #ifdef DEBUG_MSGING { int m; @@ -3848,46 +4111,56 @@ static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent, ent->inuse = 0; msg = ent->recv_msg; list_add_tail(&msg->link, timeouts); - spin_lock(&intf->counter_lock); if (ent->broadcast) - intf->timed_out_ipmb_broadcasts++; - else if (ent->recv_msg->addr.addr_type == IPMI_LAN_ADDR_TYPE) - intf->timed_out_lan_commands++; + ipmi_inc_stat(intf, timed_out_ipmb_broadcasts); + else if (is_lan_addr(&ent->recv_msg->addr)) + ipmi_inc_stat(intf, timed_out_lan_commands); else - intf->timed_out_ipmb_commands++; - spin_unlock(&intf->counter_lock); + ipmi_inc_stat(intf, timed_out_ipmb_commands); } else { struct ipmi_smi_msg *smi_msg; /* More retries, send again. */ - /* Start with the max timer, set to normal - timer after the message is sent. */ + /* + * Start with the max timer, set to normal + * timer after the message is sent. + */ ent->timeout = MAX_MSG_TIMEOUT; ent->retries_left--; - spin_lock(&intf->counter_lock); - if (ent->recv_msg->addr.addr_type == IPMI_LAN_ADDR_TYPE) - intf->retransmitted_lan_commands++; - else - intf->retransmitted_ipmb_commands++; - spin_unlock(&intf->counter_lock); smi_msg = smi_from_recv_msg(intf, ent->recv_msg, slot, ent->seqid); - if (!smi_msg) + if (!smi_msg) { + if (is_lan_addr(&ent->recv_msg->addr)) + ipmi_inc_stat(intf, + dropped_rexmit_lan_commands); + else + ipmi_inc_stat(intf, + dropped_rexmit_ipmb_commands); return; + } spin_unlock_irqrestore(&intf->seq_lock, *flags); - /* Send the new message. We send with a zero + /* + * Send the new message. We send with a zero * priority. It timed out, I doubt time is * that critical now, and high priority * messages are really only for messages to the - * local MC, which don't get resent. */ + * local MC, which don't get resent. + */ handlers = intf->handlers; - if (handlers) + if (handlers) { + if (is_lan_addr(&ent->recv_msg->addr)) + ipmi_inc_stat(intf, + retransmitted_lan_commands); + else + ipmi_inc_stat(intf, + retransmitted_ipmb_commands); + intf->handlers->sender(intf->send_info, smi_msg, 0); - else + } else ipmi_free_smi_msg(smi_msg); spin_lock_irqsave(&intf->seq_lock, *flags); @@ -3899,52 +4172,18 @@ static void ipmi_timeout_handler(long timeout_period) ipmi_smi_t intf; struct list_head timeouts; struct ipmi_recv_msg *msg, *msg2; - struct ipmi_smi_msg *smi_msg, *smi_msg2; unsigned long flags; int i; rcu_read_lock(); list_for_each_entry_rcu(intf, &ipmi_interfaces, link) { - /* See if any waiting messages need to be processed. */ - spin_lock_irqsave(&intf->waiting_msgs_lock, flags); - list_for_each_entry_safe(smi_msg, smi_msg2, - &intf->waiting_msgs, link) { -#if defined(__VMKLNX__) && defined(HP_G6_SUPPORT) - int rv; + tasklet_schedule(&intf->recv_tasklet); - rv = handle_new_recv_msg(intf, smi_msg); - if (rv == 0) { - /* 0: msg handled: free it */ - list_del(&smi_msg->link); - ipmi_free_smi_msg(smi_msg); - } else if (rv == 1) { - /* 1: requeue: to preserve message order, - quit if we can't handle a message. */ - break; - } else { - /* -2: msg handled and freed: do nothing; - 2: skip msg, leaving it on the queue: - this is to defer early OEM channel - msgs until after channel init; - Anything else: surprise, do nothing. */ - continue; - } -#else - if (!handle_new_recv_msg(intf, smi_msg)) { - list_del(&smi_msg->link); - ipmi_free_smi_msg(smi_msg); - } else { - /* To preserve message order, quit if we - can't handle a message. */ - break; - } -#endif - } - spin_unlock_irqrestore(&intf->waiting_msgs_lock, flags); - - /* Go through the seq table and find any messages that - have timed out, putting them in the timeouts - list. */ + /* + * Go through the seq table and find any messages that + * have timed out, putting them in the timeouts + * list. + */ INIT_LIST_HEAD(&timeouts); spin_lock_irqsave(&intf->seq_lock, flags); for (i = 0; i < IPMI_IPMB_NUM_SEQ; i++) @@ -3970,8 +4209,7 @@ static void ipmi_timeout_handler(long timeout_period) intf->auto_maintenance_timeout -= timeout_period; if (!intf->maintenance_mode - && (intf->auto_maintenance_timeout <= 0)) - { + && (intf->auto_maintenance_timeout <= 0)) { intf->maintenance_mode_enable = 0; maintenance_mode_update(intf); } @@ -3989,8 +4227,10 @@ static void ipmi_request_event(void) struct ipmi_smi_handlers *handlers; rcu_read_lock(); - /* Called from the timer, no need to check if handlers is - * valid. */ + /* + * Called from the timer, no need to check if handlers is + * valid. + */ list_for_each_entry_rcu(intf, &ipmi_interfaces, link) { /* No event requests when in maintenance mode. */ if (intf->maintenance_mode_enable) @@ -4005,16 +4245,18 @@ static void ipmi_request_event(void) static struct timer_list ipmi_timer; -/* Call every ~100 ms. */ -#define IPMI_TIMEOUT_TIME 100 +/* Call every ~1000 ms. */ +#define IPMI_TIMEOUT_TIME 1000 /* How many jiffies does it take to get to the timeout time. */ #define IPMI_TIMEOUT_JIFFIES ((IPMI_TIMEOUT_TIME * HZ) / 1000) -/* Request events from the queue every second (this is the number of - IPMI_TIMEOUT_TIMES between event requests). Hopefully, in the - future, IPMI will add a way to know immediately if an event is in - the queue and this silliness can go away. */ +/* + * Request events from the queue every second (this is the number of + * IPMI_TIMEOUT_TIMES between event requests). Hopefully, in the + * future, IPMI will add a way to know immediately if an event is in + * the queue and this silliness can go away. + */ #define IPMI_REQUEST_EV_TIME (1000 / (IPMI_TIMEOUT_TIME)) static atomic_t stop_operation; @@ -4056,11 +4298,12 @@ struct ipmi_smi_msg *ipmi_alloc_smi_msg(void) rv->user_data = NULL; atomic_inc(&smi_msg_inuse_count); #if defined(__VMKLNX__) - rv->tagged = 0; + rv->tagged = 0; #endif } return rv; } +EXPORT_SYMBOL(ipmi_alloc_smi_msg); static void free_recv_msg(struct ipmi_recv_msg *msg) { @@ -4068,7 +4311,7 @@ static void free_recv_msg(struct ipmi_recv_msg *msg) kfree(msg); } -struct ipmi_recv_msg *ipmi_alloc_recv_msg(void) +static struct ipmi_recv_msg *ipmi_alloc_recv_msg(void) { struct ipmi_recv_msg *rv; @@ -4087,15 +4330,52 @@ void ipmi_free_recv_msg(struct ipmi_recv_msg *msg) kref_put(&msg->user->refcount, free_user); msg->done(msg); } +EXPORT_SYMBOL(ipmi_free_recv_msg); #ifdef CONFIG_IPMI_PANIC_EVENT +static atomic_t panic_done_count = ATOMIC_INIT(0); + static void dummy_smi_done_handler(struct ipmi_smi_msg *msg) { + atomic_dec(&panic_done_count); } static void dummy_recv_done_handler(struct ipmi_recv_msg *msg) { + atomic_dec(&panic_done_count); +} + +/* + * Inside a panic, send a message and wait for a response. + */ +static void ipmi_panic_request_and_wait(ipmi_smi_t intf, + struct ipmi_addr *addr, + struct kernel_ipmi_msg *msg) +{ + struct ipmi_smi_msg smi_msg; + struct ipmi_recv_msg recv_msg; + int rv; + + smi_msg.done = dummy_smi_done_handler; + recv_msg.done = dummy_recv_done_handler; + atomic_add(2, &panic_done_count); + rv = i_ipmi_request(NULL, + intf, + addr, + 0, + msg, + intf, + &smi_msg, + &recv_msg, + 0, + intf->channels[0].address, + intf->channels[0].lun, + 0, 1); /* Don't retry, and don't wait. */ + if (rv) + atomic_sub(2, &panic_done_count); + while (atomic_read(&panic_done_count) != 0) + ipmi_poll(intf); } #ifdef CONFIG_IPMI_PANIC_STRING @@ -4104,8 +4384,7 @@ static void event_receiver_fetcher(ipmi_smi_t intf, struct ipmi_recv_msg *msg) if ((msg->addr.addr_type == IPMI_SYSTEM_INTERFACE_ADDR_TYPE) && (msg->msg.netfn == IPMI_NETFN_SENSOR_EVENT_RESPONSE) && (msg->msg.cmd == IPMI_GET_EVENT_RECEIVER_CMD) - && (msg->msg.data[0] == IPMI_CC_NO_ERROR)) - { + && (msg->msg.data[0] == IPMI_CC_NO_ERROR)) { /* A get event receiver command, save it. */ intf->event_receiver = msg->msg.data[1]; intf->event_receiver_lun = msg->msg.data[2] & 0x3; @@ -4117,10 +4396,11 @@ static void device_id_fetcher(ipmi_smi_t intf, struct ipmi_recv_msg *msg) if ((msg->addr.addr_type == IPMI_SYSTEM_INTERFACE_ADDR_TYPE) && (msg->msg.netfn == IPMI_NETFN_APP_RESPONSE) && (msg->msg.cmd == IPMI_GET_DEVICE_ID_CMD) - && (msg->msg.data[0] == IPMI_CC_NO_ERROR)) - { - /* A get device id command, save if we are an event - receiver or generator. */ + && (msg->msg.data[0] == IPMI_CC_NO_ERROR)) { + /* + * A get device id command, save if we are an event + * receiver or generator. + */ intf->local_sel_device = (msg->msg.data[6] >> 2) & 1; intf->local_event_generator = (msg->msg.data[6] >> 5) & 1; } @@ -4134,8 +4414,6 @@ static void send_panic_events(char *str) unsigned char data[16]; struct ipmi_system_interface_addr *si; struct ipmi_addr addr; - struct ipmi_smi_msg smi_msg; - struct ipmi_recv_msg recv_msg; si = (struct ipmi_system_interface_addr *) &addr; si->addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE; @@ -4153,43 +4431,34 @@ static void send_panic_events(char *str) data[4] = 0x6f; /* Sensor specific, IPMI table 36-1 */ data[5] = 0xa1; /* Runtime stop OEM bytes 2 & 3. */ - /* Put a few breadcrumbs in. Hopefully later we can add more things - to make the panic events more useful. */ + /* + * Put a few breadcrumbs in. Hopefully later we can add more things + * to make the panic events more useful. + */ if (str) { data[3] = str[0]; data[6] = str[1]; data[7] = str[2]; } - smi_msg.done = dummy_smi_done_handler; - recv_msg.done = dummy_recv_done_handler; - /* For every registered interface, send the event. */ list_for_each_entry_rcu(intf, &ipmi_interfaces, link) { if (!intf->handlers) /* Interface is not ready. */ continue; + intf->run_to_completion = 1; /* Send the event announcing the panic. */ intf->handlers->set_run_to_completion(intf->send_info, 1); - i_ipmi_request(NULL, - intf, - &addr, - 0, - &msg, - intf, - &smi_msg, - &recv_msg, - 0, - intf->channels[0].address, - intf->channels[0].lun, - 0, 1); /* Don't retry, and don't wait. */ + ipmi_panic_request_and_wait(intf, &addr, &msg); } #ifdef CONFIG_IPMI_PANIC_STRING - /* On every interface, dump a bunch of OEM event holding the - string. */ - if (!str) + /* + * On every interface, dump a bunch of OEM event holding the + * string. + */ + if (!str) return; /* For every registered interface, send the event. */ @@ -4210,11 +4479,13 @@ static void send_panic_events(char *str) */ smp_rmb(); - /* First job here is to figure out where to send the - OEM events. There's no way in IPMI to send OEM - events using an event send command, so we have to - find the SEL to put them in and stick them in - there. */ + /* + * First job here is to figure out where to send the + * OEM events. There's no way in IPMI to send OEM + * events using an event send command, so we have to + * find the SEL to put them in and stick them in + * there. + */ /* Get capabilities from the get device id. */ intf->local_sel_device = 0; @@ -4227,18 +4498,7 @@ static void send_panic_events(char *str) msg.data = NULL; msg.data_len = 0; intf->null_user_handler = device_id_fetcher; - i_ipmi_request(NULL, - intf, - &addr, - 0, - &msg, - intf, - &smi_msg, - &recv_msg, - 0, - intf->channels[0].address, - intf->channels[0].lun, - 0, 1); /* Don't retry, and don't wait. */ + ipmi_panic_request_and_wait(intf, &addr, &msg); if (intf->local_event_generator) { /* Request the event receiver from the local MC. */ @@ -4247,39 +4507,33 @@ static void send_panic_events(char *str) msg.data = NULL; msg.data_len = 0; intf->null_user_handler = event_receiver_fetcher; - i_ipmi_request(NULL, - intf, - &addr, - 0, - &msg, - intf, - &smi_msg, - &recv_msg, - 0, - intf->channels[0].address, - intf->channels[0].lun, - 0, 1); /* no retry, and no wait. */ + ipmi_panic_request_and_wait(intf, &addr, &msg); } intf->null_user_handler = NULL; - /* Validate the event receiver. The low bit must not - be 1 (it must be a valid IPMB address), it cannot - be zero, and it must not be my address. */ - if (((intf->event_receiver & 1) == 0) + /* + * Validate the event receiver. The low bit must not + * be 1 (it must be a valid IPMB address), it cannot + * be zero, and it must not be my address. + */ + if (((intf->event_receiver & 1) == 0) && (intf->event_receiver != 0) - && (intf->event_receiver != intf->channels[0].address)) - { - /* The event receiver is valid, send an IPMB - message. */ + && (intf->event_receiver != intf->channels[0].address)) { + /* + * The event receiver is valid, send an IPMB + * message. + */ ipmb = (struct ipmi_ipmb_addr *) &addr; ipmb->addr_type = IPMI_IPMB_ADDR_TYPE; ipmb->channel = 0; /* FIXME - is this right? */ ipmb->lun = intf->event_receiver_lun; ipmb->slave_addr = intf->event_receiver; } else if (intf->local_sel_device) { - /* The event receiver was not valid (or was - me), but I am an SEL device, just dump it - in my SEL. */ + /* + * The event receiver was not valid (or was + * me), but I am an SEL device, just dump it + * in my SEL. + */ si = (struct ipmi_system_interface_addr *) &addr; si->addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE; si->channel = IPMI_BMC_CHANNEL; @@ -4287,7 +4541,7 @@ static void send_panic_events(char *str) } else continue; /* No where to send the event. */ - + msg.netfn = IPMI_NETFN_STORAGE_REQUEST; /* Storage. */ msg.cmd = IPMI_ADD_SEL_ENTRY_CMD; msg.data = data; @@ -4304,25 +4558,16 @@ static void send_panic_events(char *str) data[2] = 0xf0; /* OEM event without timestamp. */ data[3] = intf->channels[0].address; data[4] = j++; /* sequence # */ - /* Always give 11 bytes, so strncpy will fill - it with zeroes for me. */ + /* + * Always give 11 bytes, so strncpy will fill + * it with zeroes for me. + */ strncpy(data+5, p, 11); p += size; - i_ipmi_request(NULL, - intf, - &addr, - 0, - &msg, - intf, - &smi_msg, - &recv_msg, - 0, - intf->channels[0].address, - intf->channels[0].lun, - 0, 1); /* no retry, and no wait. */ + ipmi_panic_request_and_wait(intf, &addr, &msg); } - } + } #endif /* CONFIG_IPMI_PANIC_STRING */ } #endif /* CONFIG_IPMI_PANIC_EVENT */ @@ -4332,7 +4577,7 @@ static int has_panicked; static int panic_event(struct notifier_block *this, unsigned long event, - void *ptr) + void *ptr) { ipmi_smi_t intf; @@ -4346,6 +4591,7 @@ static int panic_event(struct notifier_block *this, /* Interface is not ready. */ continue; + intf->run_to_completion = 1; intf->handlers->set_run_to_completion(intf->send_info, 1); } @@ -4370,7 +4616,7 @@ static int ipmi_init_msghandler(void) if (initialized) return 0; - rv = driver_register(&ipmidriver); + rv = driver_register(&ipmidriver.driver); if (rv) { printk(KERN_ERR PFX "Could not register IPMI driver\n"); return rv; @@ -4382,8 +4628,8 @@ static int ipmi_init_msghandler(void) #ifdef CONFIG_PROC_FS proc_ipmi_root = proc_mkdir("ipmi", NULL); if (!proc_ipmi_root) { - printk(KERN_ERR PFX "Unable to create IPMI proc dir"); - return -ENOMEM; + printk(KERN_ERR PFX "Unable to create IPMI proc dir"); + return -ENOMEM; } proc_ipmi_root->owner = THIS_MODULE; @@ -4401,13 +4647,13 @@ static int ipmi_init_msghandler(void) return 0; } -static __init int ipmi_init_msghandler_mod(void) +static int __init ipmi_init_msghandler_mod(void) { - ipmi_init_msghandler(); + ipmi_init_msghandler(); return 0; } -static __exit void cleanup_ipmi(void) +static void __exit cleanup_ipmi(void) { int count; @@ -4418,11 +4664,15 @@ static __exit void cleanup_ipmi(void) atomic_notifier_chain_unregister(&panic_notifier_list, &panic_block); #endif /* #if !defined(__VMKLNX__) */ - /* This can't be called if any interfaces exist, so no worry about - shutting down the interfaces. */ + /* + * This can't be called if any interfaces exist, so no worry about + * shutting down the interfaces. + */ - /* Tell the timer to stop, then wait for it to stop. This avoids - problems with race conditions removing the timer here. */ + /* + * Tell the timer to stop, then wait for it to stop. This avoids + * problems with race conditions removing the timer here. + */ atomic_inc(&stop_operation); del_timer_sync(&ipmi_timer); @@ -4430,7 +4680,7 @@ static __exit void cleanup_ipmi(void) remove_proc_entry(proc_ipmi_root->name, NULL); #endif /* CONFIG_PROC_FS */ - driver_unregister(&ipmidriver); + driver_unregister(&ipmidriver.driver); initialized = 0; @@ -4449,31 +4699,6 @@ module_exit(cleanup_ipmi); module_init(ipmi_init_msghandler_mod); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Corey Minyard "); -MODULE_DESCRIPTION("Incoming and outgoing message routing for an IPMI interface."); +MODULE_DESCRIPTION("Incoming and outgoing message routing for an IPMI" + " interface."); MODULE_VERSION(IPMI_DRIVER_VERSION); - -EXPORT_SYMBOL(ipmi_create_user); -EXPORT_SYMBOL(ipmi_destroy_user); -EXPORT_SYMBOL(ipmi_get_version); -EXPORT_SYMBOL(ipmi_request_settime); -EXPORT_SYMBOL(ipmi_request_supply_msgs); -EXPORT_SYMBOL(ipmi_poll_interface); -EXPORT_SYMBOL(ipmi_register_smi); -EXPORT_SYMBOL(ipmi_unregister_smi); -EXPORT_SYMBOL(ipmi_register_for_cmd); -EXPORT_SYMBOL(ipmi_unregister_for_cmd); -EXPORT_SYMBOL(ipmi_smi_msg_received); -EXPORT_SYMBOL(ipmi_smi_watchdog_pretimeout); -EXPORT_SYMBOL(ipmi_alloc_smi_msg); -EXPORT_SYMBOL(ipmi_addr_length); -EXPORT_SYMBOL(ipmi_validate_addr); -EXPORT_SYMBOL(ipmi_set_gets_events); -EXPORT_SYMBOL(ipmi_smi_watcher_register); -EXPORT_SYMBOL(ipmi_smi_watcher_unregister); -EXPORT_SYMBOL(ipmi_set_my_address); -EXPORT_SYMBOL(ipmi_get_my_address); -EXPORT_SYMBOL(ipmi_set_my_LUN); -EXPORT_SYMBOL(ipmi_get_my_LUN); -EXPORT_SYMBOL(ipmi_smi_add_proc_entry); -EXPORT_SYMBOL(ipmi_user_set_run_to_completion); -EXPORT_SYMBOL(ipmi_free_recv_msg); diff --git a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.c b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.c index 2da34ca..6b96682 100644 --- a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.c +++ b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_bt_sm.c @@ -37,26 +37,32 @@ #define BT_DEBUG_ENABLE 1 /* Generic messages */ #define BT_DEBUG_MSG 2 /* Prints all request/response buffers */ #define BT_DEBUG_STATES 4 /* Verbose look at state changes */ -/* BT_DEBUG_OFF must be zero to correspond to the default uninitialized - value */ +/* + * BT_DEBUG_OFF must be zero to correspond to the default uninitialized + * value + */ static int bt_debug; /* 0 == BT_DEBUG_OFF */ module_param(bt_debug, int, 0644); MODULE_PARM_DESC(bt_debug, "debug bitmask, 1=enable, 2=messages, 4=states"); -/* Typical "Get BT Capabilities" values are 2-3 retries, 5-10 seconds, - and 64 byte buffers. However, one HP implementation wants 255 bytes of - buffer (with a documented message of 160 bytes) so go for the max. - Since the Open IPMI architecture is single-message oriented at this - stage, the queue depth of BT is of no concern. */ +/* + * Typical "Get BT Capabilities" values are 2-3 retries, 5-10 seconds, + * and 64 byte buffers. However, one HP implementation wants 255 bytes of + * buffer (with a documented message of 160 bytes) so go for the max. + * Since the Open IPMI architecture is single-message oriented at this + * stage, the queue depth of BT is of no concern. + */ #define BT_NORMAL_TIMEOUT 5 /* seconds */ #define BT_NORMAL_RETRY_LIMIT 2 #define BT_RESET_DELAY 6 /* seconds after warm reset */ -/* States are written in chronological order and usually cover - multiple rows of the state table discussion in the IPMI spec. */ +/* + * States are written in chronological order and usually cover + * multiple rows of the state table discussion in the IPMI spec. + */ enum bt_states { BT_STATE_IDLE = 0, /* Order is critical in this list */ @@ -76,10 +82,12 @@ enum bt_states { BT_STATE_LONG_BUSY /* BT doesn't get hosed :-) */ }; -/* Macros seen at the end of state "case" blocks. They help with legibility - and debugging. */ +/* + * Macros seen at the end of state "case" blocks. They help with legibility + * and debugging. + */ -#define BT_STATE_CHANGE(X,Y) { bt->state = X; return Y; } +#define BT_STATE_CHANGE(X, Y) { bt->state = X; return Y; } #define BT_SI_SM_RETURN(Y) { last_printed = BT_STATE_PRINTME; return Y; } @@ -110,11 +118,13 @@ struct si_sm_data { #define BT_H_BUSY 0x40 #define BT_B_BUSY 0x80 -/* Some bits are toggled on each write: write once to set it, once - more to clear it; writing a zero does nothing. To absolutely - clear it, check its state and write if set. This avoids the "get - current then use as mask" scheme to modify one bit. Note that the - variable "bt" is hardcoded into these macros. */ +/* + * Some bits are toggled on each write: write once to set it, once + * more to clear it; writing a zero does nothing. To absolutely + * clear it, check its state and write if set. This avoids the "get + * current then use as mask" scheme to modify one bit. Note that the + * variable "bt" is hardcoded into these macros. + */ #define BT_STATUS bt->io->inputb(bt->io, 0) #define BT_CONTROL(x) bt->io->outputb(bt->io, 0, x) @@ -125,8 +135,10 @@ struct si_sm_data { #define BT_INTMASK_R bt->io->inputb(bt->io, 2) #define BT_INTMASK_W(x) bt->io->outputb(bt->io, 2, x) -/* Convenience routines for debugging. These are not multi-open safe! - Note the macros have hardcoded variables in them. */ +/* + * Convenience routines for debugging. These are not multi-open safe! + * Note the macros have hardcoded variables in them. + */ static char *state2txt(unsigned char state) { @@ -182,7 +194,8 @@ static char *status2txt(unsigned char status) static unsigned int bt_init_data(struct si_sm_data *bt, struct si_sm_io *io) { memset(bt, 0, sizeof(struct si_sm_data)); - if (bt->io != io) { /* external: one-time only things */ + if (bt->io != io) { + /* external: one-time only things */ bt->io = io; bt->seq = 0; } @@ -229,7 +242,7 @@ static int bt_start_transaction(struct si_sm_data *bt, printk(KERN_WARNING "BT: +++++++++++++++++ New command\n"); printk(KERN_WARNING "BT: NetFn/LUN CMD [%d data]:", size - 2); for (i = 0; i < size; i ++) - printk (" %02x", data[i]); + printk(" %02x", data[i]); printk("\n"); } bt->write_data[0] = size + 1; /* all data plus seq byte */ @@ -246,8 +259,10 @@ static int bt_start_transaction(struct si_sm_data *bt, return 0; } -/* After the upper state machine has been told SI_SM_TRANSACTION_COMPLETE - it calls this. Strip out the length and seq bytes. */ +/* + * After the upper state machine has been told SI_SM_TRANSACTION_COMPLETE + * it calls this. Strip out the length and seq bytes. + */ static int bt_get_result(struct si_sm_data *bt, unsigned char *data, @@ -269,7 +284,7 @@ static int bt_get_result(struct si_sm_data *bt, memcpy(data + 2, bt->read_data + 4, msg_len - 2); if (bt_debug & BT_DEBUG_MSG) { - printk (KERN_WARNING "BT: result %d bytes:", msg_len); + printk(KERN_WARNING "BT: result %d bytes:", msg_len); for (i = 0; i < msg_len; i++) printk(" %02x", data[i]); printk ("\n"); @@ -292,8 +307,10 @@ static void reset_flags(struct si_sm_data *bt) BT_INTMASK_W(BT_BMC_HWRST); } -/* Get rid of an unwanted/stale response. This should only be needed for - BMCs that support multiple outstanding requests. */ +/* + * Get rid of an unwanted/stale response. This should only be needed for + * BMCs that support multiple outstanding requests. + */ static void drain_BMC2HOST(struct si_sm_data *bt) { @@ -326,8 +343,8 @@ static inline void write_all_bytes(struct si_sm_data *bt) printk(KERN_WARNING "BT: write %d bytes seq=0x%02X", bt->write_count, bt->seq); for (i = 0; i < bt->write_count; i++) - printk (" %02x", bt->write_data[i]); - printk ("\n"); + printk(" %02x", bt->write_data[i]); + printk("\n"); } for (i = 0; i < bt->write_count; i++) HOST2BMC(bt->write_data[i]); @@ -337,8 +354,10 @@ static inline int read_all_bytes(struct si_sm_data *bt) { unsigned char i; - /* length is "framing info", minimum = 4: NetFn, Seq, Cmd, cCode. - Keep layout of first four bytes aligned with write_data[] */ + /* + * length is "framing info", minimum = 4: NetFn, Seq, Cmd, cCode. + * Keep layout of first four bytes aligned with write_data[] + */ bt->read_data[0] = BMC2HOST; bt->read_count = bt->read_data[0]; @@ -362,8 +381,8 @@ static inline int read_all_bytes(struct si_sm_data *bt) if (max > 16) max = 16; for (i = 0; i < max; i++) - printk (" %02x", bt->read_data[i]); - printk ("%s\n", bt->read_count == max ? "" : " ..."); + printk(KERN_CONT " %02x", bt->read_data[i]); + printk(KERN_CONT "%s\n", bt->read_count == max ? "" : " ..."); } /* per the spec, the (NetFn[1], Seq[2], Cmd[3]) tuples must match */ @@ -402,8 +421,10 @@ static enum si_sm_result error_recovery(struct si_sm_data *bt, printk(KERN_WARNING "IPMI BT: %s in %s %s ", /* open-ended line */ reason, STATE2TXT, STATUS2TXT); - /* Per the IPMI spec, retries are based on the sequence number - known only to this module, so manage a restart here. */ + /* + * Per the IPMI spec, retries are based on the sequence number + * known only to this module, so manage a restart here. + */ (bt->error_retries)++; if (bt->error_retries < bt->BT_CAP_retries) { printk("%d retries left\n", @@ -412,8 +433,8 @@ static enum si_sm_result error_recovery(struct si_sm_data *bt, return SI_SM_CALL_WITHOUT_DELAY; } - printk("failed %d retries, sending error response\n", - bt->BT_CAP_retries); + printk(KERN_WARNING "failed %d retries, sending error response\n", + bt->BT_CAP_retries); if (!bt->nonzero_status) printk(KERN_ERR "IPMI BT: stuck, try power cycle\n"); @@ -424,8 +445,10 @@ static enum si_sm_result error_recovery(struct si_sm_data *bt, return SI_SM_CALL_WITHOUT_DELAY; } - /* Concoct a useful error message, set up the next state, and - be done with this sequence. */ + /* + * Concoct a useful error message, set up the next state, and + * be done with this sequence. + */ bt->state = BT_STATE_IDLE; switch (cCode) { @@ -461,10 +484,12 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time) last_printed = bt->state; } - /* Commands that time out may still (eventually) provide a response. - This stale response will get in the way of a new response so remove - it if possible (hopefully during IDLE). Even if it comes up later - it will be rejected by its (now-forgotten) seq number. */ + /* + * Commands that time out may still (eventually) provide a response. + * This stale response will get in the way of a new response so remove + * it if possible (hopefully during IDLE). Even if it comes up later + * it will be rejected by its (now-forgotten) seq number. + */ if ((bt->state < BT_STATE_WRITE_BYTES) && (status & BT_B2H_ATN)) { drain_BMC2HOST(bt); @@ -472,7 +497,8 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time) } if ((bt->state != BT_STATE_IDLE) && - (bt->state < BT_STATE_PRINTME)) { /* check timeout */ + (bt->state < BT_STATE_PRINTME)) { + /* check timeout */ bt->timeout -= time; if ((bt->timeout < 0) && (bt->state < BT_STATE_RESET1)) return error_recovery(bt, @@ -482,8 +508,10 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time) switch (bt->state) { - /* Idle state first checks for asynchronous messages from another - channel, then does some opportunistic housekeeping. */ + /* + * Idle state first checks for asynchronous messages from another + * channel, then does some opportunistic housekeeping. + */ case BT_STATE_IDLE: if (status & BT_SMS_ATN) { @@ -531,16 +559,19 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time) BT_SI_SM_RETURN(SI_SM_CALL_WITH_DELAY); BT_CONTROL(BT_H_BUSY); /* set */ - /* Uncached, ordered writes should just proceeed serially but - some BMCs don't clear B2H_ATN with one hit. Fast-path a - workaround without too much penalty to the general case. */ + /* + * Uncached, ordered writes should just proceed serially but + * some BMCs don't clear B2H_ATN with one hit. Fast-path a + * workaround without too much penalty to the general case. + */ BT_CONTROL(BT_B2H_ATN); /* clear it to ACK the BMC */ BT_STATE_CHANGE(BT_STATE_CLEAR_B2H, SI_SM_CALL_WITHOUT_DELAY); case BT_STATE_CLEAR_B2H: - if (status & BT_B2H_ATN) { /* keep hitting it */ + if (status & BT_B2H_ATN) { + /* keep hitting it */ BT_CONTROL(BT_B2H_ATN); BT_SI_SM_RETURN(SI_SM_CALL_WITH_DELAY); } @@ -548,7 +579,8 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time) SI_SM_CALL_WITHOUT_DELAY); case BT_STATE_READ_BYTES: - if (!(status & BT_H_BUSY)) /* check in case of retry */ + if (!(status & BT_H_BUSY)) + /* check in case of retry */ BT_CONTROL(BT_H_BUSY); BT_CONTROL(BT_CLR_RD_PTR); /* start of BMC2HOST buffer */ i = read_all_bytes(bt); /* true == packet seq match */ @@ -599,8 +631,10 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time) BT_STATE_CHANGE(BT_STATE_XACTION_START, SI_SM_CALL_WITH_DELAY); - /* Get BT Capabilities, using timing of upper level state machine. - Set outreqs to prevent infinite loop on timeout. */ + /* + * Get BT Capabilities, using timing of upper level state machine. + * Set outreqs to prevent infinite loop on timeout. + */ case BT_STATE_CAPABILITIES_BEGIN: bt->BT_CAP_outreqs = 1; { @@ -638,61 +672,68 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time) #if defined(__VMKLNX__) /* - * Modification: 11/29/2011: PR 721372: Introduced extra checks to verify the - * presence of the BT interface. Earlier check verified only the mapping of - * BT interface register at location 0xE4 and 0xE6. The checks now verify - * the bits of the registers work as per spec. - * Warning messages are printed only in debug mode + * Modification: 11/29/2011: PR 721372: Introduced extra checks to verify the + * presence of the BT interface. Earlier check verified only the mapping of + * BT interface register at location 0xE4 and 0xE6. The checks now verify + * the bits of the registers work as per spec. + * Warning messages are printed only in debug mode */ /* * Portions Copyright 2011 VMware, Inc. */ static int bt_detect(struct si_sm_data *bt) { - /* It's impossible for the BT status and interrupt registers to be - all 1's, (assuming a properly functioning, self-initialized BMC) - but that's what you get from reading a bogus address, so we - test that first. The calling routine uses negative logic. */ + /* + * It's impossible for the BT status and interrupt registers to be + * all 1's, (assuming a properly functioning, self-initialized BMC) + * but that's what you get from reading a bogus address, so we + * test that first. The calling routine uses negative logic. + */ unsigned char bt_status = BT_STATUS; unsigned char bt_intmask = BT_INTMASK_R; - if ((bt_status == 0xFF) || (bt_intmask == 0xFF)) { + if ((bt_status == 0xFF) || (bt_intmask == 0xFF)) { if (bt_debug) { - printk(KERN_WARNING "IPMI BT: BT__STATUS or BT_MASK is invalid: %d, %d\n", - bt_status, bt_intmask); + printk(KERN_WARNING "IPMI BT: BT__STATUS or BT_MASK is invalid: %d, %d\n", + bt_status, bt_intmask); } - return 1; + return 1; } - - /* Test the R/W bits on the BT interface to ascertain if the device is - truly available. These bits the host to device clear read bit and clear write - bit, bit 0 and 1 on the BT_CNTL register and bit 7 the h/w reset bit of the - BT_INTMASK register. The R/W bits should return 0 when read */ + + /* + * Test the R/W bits on the BT interface to ascertain if the device is + * truly available. These bits the host to device clear read bit and clear write + * bit, bit 0 and 1 on the BT_CNTL register and bit 7 the h/w reset bit of the + * BT_INTMASK register. The R/W bits should return 0 when read + */ if (bt_status & (BT_CLR_WR_PTR | BT_CLR_RD_PTR)) { if (bt_debug) { - printk(KERN_WARNING "IPMI BT: BT_CLR_WR_PTR or BT_CLR_RD_PTR are not 0: %d, %d\n", - (bt_status & BT_CLR_WR_PTR), (bt_status & BT_CLR_WR_PTR)); + printk(KERN_WARNING "IPMI BT: BT_CLR_WR_PTR or BT_CLR_RD_PTR are not 0: %d, %d\n", + (bt_status & BT_CLR_WR_PTR), (bt_status & BT_CLR_WR_PTR)); } return 1; } if(bt_intmask & BT_BMC_HWRST) { if (bt_debug) { - printk(KERN_WARNING "IPMI BT: BT_BMC_HWRST is not 0: %d\n", - (bt_intmask & BT_BMC_HWRST)); + printk(KERN_WARNING "IPMI BT: BT_BMC_HWRST is not 0: %d\n", + (bt_intmask & BT_BMC_HWRST)); } return 1; } - /* The H_BUSY (bit 6) of the BT_CNTL register works as a toggle bit, with - the state of the bit toggling if a 1 is written. No change is seen if 0 is - written. This bit is toggled to further verify the presence of the BT interface */ + /* + * The H_BUSY (bit 6) of the BT_CNTL register works as a toggle bit, with + * the state of the bit toggling if a 1 is written. No change is seen if 0 is + * written. This bit is toggled to further verify the presence of the BT interface + */ + // Toggle bit BT_CONTROL(BT_H_BUSY); if (!((bt_status ^ BT_STATUS) & BT_H_BUSY)) { if (bt_debug) { - printk(KERN_WARNING "IPMI BT: Unable to toggle BT_H_BUSY once\n"); + printk(KERN_WARNING "IPMI BT: Unable to toggle BT_H_BUSY once\n"); } return 1; } @@ -700,22 +741,24 @@ static int bt_detect(struct si_sm_data *bt) BT_CONTROL(BT_H_BUSY); if ((bt_status ^ BT_STATUS) & BT_H_BUSY) { if (bt_debug) { - printk(KERN_WARNING "IPMI BT: Unable to toggle BT_H_BUSY twice\n"); + printk(KERN_WARNING "IPMI BT: Unable to toggle BT_H_BUSY twice\n"); } return 1; } - reset_flags(bt); - return 0; + reset_flags(bt); + return 0; } #else static int bt_detect(struct si_sm_data *bt) { - /* It's impossible for the BT status and interrupt registers to be - all 1's, (assuming a properly functioning, self-initialized BMC) - but that's what you get from reading a bogus address, so we - test that first. The calling routine uses negative logic. */ + /* + * It's impossible for the BT status and interrupt registers to be + * all 1's, (assuming a properly functioning, self-initialized BMC) + * but that's what you get from reading a bogus address, so we + * test that first. The calling routine uses negative logic. + */ if ((BT_STATUS == 0xFF) && (BT_INTMASK_R == 0xFF)) return 1; @@ -733,8 +776,7 @@ static int bt_size(void) return sizeof(struct si_sm_data); } -struct si_sm_handlers bt_smi_handlers = -{ +struct si_sm_handlers bt_smi_handlers = { .init_data = bt_init_data, .start_transaction = bt_start_transaction, .get_result = bt_get_result, diff --git a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.c b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.c index c1b8228..d64a24b 100644 --- a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.c +++ b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_kcs_sm.c @@ -52,7 +52,7 @@ */ #define KCS_DEBUG_STATES 4 #define KCS_DEBUG_MSG 2 -#define KCS_DEBUG_ENABLE 1 +#define KCS_DEBUG_ENABLE 1 static int kcs_debug; module_param(kcs_debug, int, 0644); @@ -60,50 +60,70 @@ MODULE_PARM_DESC(kcs_debug, "debug bitmask, 1=enable, 2=messages, 4=states"); /* The states the KCS driver may be in. */ enum kcs_states { - KCS_IDLE, /* The KCS interface is currently - doing nothing. */ - KCS_START_OP, /* We are starting an operation. The - data is in the output buffer, but - nothing has been done to the - interface yet. This was added to - the state machine in the spec to - wait for the initial IBF. */ - KCS_WAIT_WRITE_START, /* We have written a write cmd to the - interface. */ - KCS_WAIT_WRITE, /* We are writing bytes to the - interface. */ - KCS_WAIT_WRITE_END, /* We have written the write end cmd - to the interface, and still need to - write the last byte. */ - KCS_WAIT_READ, /* We are waiting to read data from - the interface. */ - KCS_ERROR0, /* State to transition to the error - handler, this was added to the - state machine in the spec to be - sure IBF was there. */ - KCS_ERROR1, /* First stage error handler, wait for - the interface to respond. */ - KCS_ERROR2, /* The abort cmd has been written, - wait for the interface to - respond. */ - KCS_ERROR3, /* We wrote some data to the - interface, wait for it to switch to - read mode. */ - KCS_HOSED /* The hardware failed to follow the - state machine. */ + /* The KCS interface is currently doing nothing. */ + KCS_IDLE, + + /* + * We are starting an operation. The data is in the output + * buffer, but nothing has been done to the interface yet. This + * was added to the state machine in the spec to wait for the + * initial IBF. + */ + KCS_START_OP, + + /* We have written a write cmd to the interface. */ + KCS_WAIT_WRITE_START, + + /* We are writing bytes to the interface. */ + KCS_WAIT_WRITE, + + /* + * We have written the write end cmd to the interface, and + * still need to write the last byte. + */ + KCS_WAIT_WRITE_END, + + /* We are waiting to read data from the interface. */ + KCS_WAIT_READ, + + /* + * State to transition to the error handler, this was added to + * the state machine in the spec to be sure IBF was there. + */ + KCS_ERROR0, + + /* + * First stage error handler, wait for the interface to + * respond. + */ + KCS_ERROR1, + + /* + * The abort cmd has been written, wait for the interface to + * respond. + */ + KCS_ERROR2, + + /* + * We wrote some data to the interface, wait for it to switch + * to read mode. + */ + KCS_ERROR3, + + /* The hardware failed to follow the state machine. */ + KCS_HOSED }; #define MAX_KCS_READ_SIZE IPMI_MAX_MSG_LENGTH #define MAX_KCS_WRITE_SIZE IPMI_MAX_MSG_LENGTH /* Timeouts in microseconds. */ -#define IBF_RETRY_TIMEOUT 1000000 -#define OBF_RETRY_TIMEOUT 1000000 +#define IBF_RETRY_TIMEOUT 5000000 +#define OBF_RETRY_TIMEOUT 5000000 #define MAX_ERROR_RETRIES 10 #define ERROR0_OBF_WAIT_JIFFIES (2*HZ) -struct si_sm_data -{ +struct si_sm_data { enum kcs_states state; struct si_sm_io *io; unsigned char write_data[MAX_KCS_WRITE_SIZE]; @@ -187,7 +207,8 @@ static inline void start_error_recovery(struct si_sm_data *kcs, char *reason) (kcs->error_retries)++; if (kcs->error_retries > MAX_ERROR_RETRIES) { if (kcs_debug & KCS_DEBUG_ENABLE) - printk(KERN_DEBUG "ipmi_kcs_sm: kcs hosed: %s\n", reason); + printk(KERN_DEBUG "ipmi_kcs_sm: kcs hosed: %s\n", + reason); kcs->state = KCS_HOSED; } else { kcs->error0_timeout = jiffies + ERROR0_OBF_WAIT_JIFFIES; @@ -271,10 +292,9 @@ static int start_kcs_transaction(struct si_sm_data *kcs, unsigned char *data, if (kcs_debug & KCS_DEBUG_MSG) { printk(KERN_DEBUG "start_kcs_transaction -"); - for (i = 0; i < size; i ++) { + for (i = 0; i < size; i++) printk(" %02x", (unsigned char) (data [i])); - } - printk ("\n"); + printk("\n"); } kcs->error_retries = 0; memcpy(kcs->write_data, data, size); @@ -305,9 +325,11 @@ static int get_kcs_result(struct si_sm_data *kcs, unsigned char *data, kcs->read_pos = 3; } if (kcs->truncated) { - /* Report a truncated error. We might overwrite - another error, but that's too bad, the user needs - to know it was truncated. */ + /* + * Report a truncated error. We might overwrite + * another error, but that's too bad, the user needs + * to know it was truncated. + */ data[2] = IPMI_ERR_MSG_TRUNCATED; kcs->truncated = 0; } @@ -315,9 +337,11 @@ static int get_kcs_result(struct si_sm_data *kcs, unsigned char *data, return kcs->read_pos; } -/* This implements the state machine defined in the IPMI manual, see - that for details on how this works. Divide that flowchart into - sections delimited by "Wait for IBF" and this will become clear. */ +/* + * This implements the state machine defined in the IPMI manual, see + * that for details on how this works. Divide that flowchart into + * sections delimited by "Wait for IBF" and this will become clear. + */ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time) { unsigned char status; @@ -346,7 +370,7 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time) return SI_SM_IDLE; case KCS_START_OP: - if (state != KCS_IDLE) { + if (state != KCS_IDLE_STATE) { start_error_recovery(kcs, "State machine not idle at start"); break; @@ -388,11 +412,12 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time) write_next_byte(kcs); } break; - + case KCS_WAIT_WRITE_END: if (state != KCS_WRITE_STATE) { start_error_recovery(kcs, - "Not in write state for write end"); + "Not in write state" + " for write end"); break; } clear_obf(kcs, status); @@ -413,13 +438,15 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time) return SI_SM_CALL_WITH_DELAY; read_next_byte(kcs); } else { - /* We don't implement this exactly like the state - machine in the spec. Some broken hardware - does not write the final dummy byte to the - read register. Thus obf will never go high - here. We just go straight to idle, and we - handle clearing out obf in idle state if it - happens to come in. */ + /* + * We don't implement this exactly like the state + * machine in the spec. Some broken hardware + * does not write the final dummy byte to the + * read register. Thus obf will never go high + * here. We just go straight to idle, and we + * handle clearing out obf in idle state if it + * happens to come in. + */ clear_obf(kcs, status); kcs->orig_write_count = 0; kcs->state = KCS_IDLE; @@ -430,7 +457,8 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time) case KCS_ERROR0: clear_obf(kcs, status); status = read_status(kcs); - if (GET_STATUS_OBF(status)) /* controller isn't responding */ + if (GET_STATUS_OBF(status)) + /* controller isn't responding */ if (time_before(jiffies, kcs->error0_timeout)) return SI_SM_CALL_WITH_TICK_DELAY; write_cmd(kcs, KCS_GET_STATUS_ABORT); @@ -442,7 +470,7 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time) write_data(kcs, 0); kcs->state = KCS_ERROR2; break; - + case KCS_ERROR2: if (state != KCS_READ_STATE) { start_error_recovery(kcs, @@ -456,7 +484,7 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time) write_data(kcs, KCS_READ_BYTE); kcs->state = KCS_ERROR3; break; - + case KCS_ERROR3: if (state != KCS_IDLE_STATE) { start_error_recovery(kcs, @@ -475,7 +503,7 @@ static enum si_sm_result kcs_event(struct si_sm_data *kcs, long time) return SI_SM_TRANSACTION_COMPLETE; } break; - + case KCS_HOSED: break; } @@ -495,10 +523,12 @@ static int kcs_size(void) static int kcs_detect(struct si_sm_data *kcs) { - /* It's impossible for the KCS status register to be all 1's, - (assuming a properly functioning, self-initialized BMC) - but that's what you get from reading a bogus address, so we - test that first. */ + /* + * It's impossible for the KCS status register to be all 1's, + * (assuming a properly functioning, self-initialized BMC) + * but that's what you get from reading a bogus address, so we + * test that first. + */ if (read_status(kcs) == 0xff) return 1; @@ -509,8 +539,7 @@ static void kcs_cleanup(struct si_sm_data *kcs) { } -struct si_sm_handlers kcs_smi_handlers = -{ +struct si_sm_handlers kcs_smi_handlers = { .init_data = init_kcs_data, .start_transaction = start_kcs_transaction, .get_result = get_kcs_result, diff --git a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.c b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.c index eb98f42..5025d55 100644 --- a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.c +++ b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_si_intf.c @@ -44,8 +44,8 @@ #include #include -#include #include +#include #include #include #include @@ -60,6 +60,7 @@ #include #include #include +#include #include #include #include "ipmi_si_sm.h" @@ -67,15 +68,18 @@ #include #include #include +#include -#ifdef CONFIG_PPC_OF -#include -#include +#if !defined(__VMKLNX__) +#include +#include +#include +#include #endif #if defined(__VMKLNX__) #include "kcompat.h" -#define IPMI_DRIVER_VERSION "39.1-4vmw" +#define IPMI_DRIVER_VERSION "39.2-6vmw" #include #include "vmkapi.h" #endif /* #if defined(__VMKLNX__) */ @@ -90,13 +94,7 @@ #define SI_USEC_PER_JIFFY (1000000/HZ) #define SI_TIMEOUT_JIFFIES (SI_TIMEOUT_TIME_USEC/SI_USEC_PER_JIFFY) #define SI_SHORT_TIMEOUT_USEC 250 /* .25ms when the SM request a - short timeout */ - -/* Bit for BMC global enables. */ -#define IPMI_BMC_RCV_MSG_INTR 0x01 -#define IPMI_BMC_EVT_MSG_INTR 0x02 -#define IPMI_BMC_EVT_MSG_BUFF 0x04 -#define IPMI_BMC_SYS_LOG 0x08 + short timeout */ enum si_intf_state { SI_NORMAL, @@ -122,52 +120,98 @@ enum si_type { }; static char *si_to_str[] = { "kcs", "smic", "bt" }; +static char *ipmi_addr_src_to_str[] = { NULL, "hotmod", "hardcoded", "SPMI", + "ACPI", "SMBIOS", "PCI", + "device-tree", "default" }; + #define DEVICE_NAME "ipmi_si" -static struct device_driver ipmi_driver = -{ -#if defined(__VMKLNX__) - .owner = THIS_MODULE, -#endif - .name = DEVICE_NAME, - .bus = &platform_bus_type -}; +static struct platform_driver ipmi_driver; -struct smi_info -{ +/* + * Indexes into stats[] in smi_info below. + */ +enum si_stat_indexes { + /* + * Number of times the driver requested a timer while an operation + * was in progress. + */ + SI_STAT_short_timeouts = 0, + + /* + * Number of times the driver requested a timer while nothing was in + * progress. + */ + SI_STAT_long_timeouts, + + /* Number of times the interface was idle while being polled. */ + SI_STAT_idles, + + /* Number of interrupts the driver handled. */ + SI_STAT_interrupts, + + /* Number of time the driver got an ATTN from the hardware. */ + SI_STAT_attentions, + /* Number of times the driver requested flags from the hardware. */ + SI_STAT_flag_fetches, + + /* Number of times the hardware didn't follow the state machine. */ + SI_STAT_hosed_count, + + /* Number of completed messages. */ + SI_STAT_complete_transactions, + + /* Number of IPMI events received from the hardware. */ + SI_STAT_events, + + /* Number of watchdog pretimeouts. */ + SI_STAT_watchdog_pretimeouts, + + /* Number of asyncronous messages received. */ + SI_STAT_incoming_messages, + + + /* This *must* remain last, add new values above this. */ + SI_NUM_STATS +}; +struct smi_info { int intf_num; ipmi_smi_t intf; struct si_sm_data *si_sm; struct si_sm_handlers *handlers; enum si_type si_type; spinlock_t si_lock; - spinlock_t msg_lock; struct list_head xmit_msgs; struct list_head hp_xmit_msgs; struct ipmi_smi_msg *curr_msg; enum si_intf_state si_state; - /* Used to handle the various types of I/O that can occur with - IPMI */ + /* + * Used to handle the various types of I/O that can occur with + * IPMI + */ struct si_sm_io io; int (*io_setup)(struct smi_info *info); void (*io_cleanup)(struct smi_info *info); int (*irq_setup)(struct smi_info *info); void (*irq_cleanup)(struct smi_info *info); unsigned int io_size; - char *addr_source; /* ACPI, PCI, SMBIOS, hardcode, default. */ + enum ipmi_addr_src addr_source; /* ACPI, PCI, SMBIOS, hardcode, etc. */ void (*addr_source_cleanup)(struct smi_info *info); void *addr_source_data; - /* Per-OEM handler, called from handle_flags(). - Returns 1 when handle_flags() needs to be re-run - or 0 indicating it set si_state itself. - */ + /* + * Per-OEM handler, called from handle_flags(). + * Returns 1 when handle_flags() needs to be re-run + * or 0 indicating it set si_state itself. + */ int (*oem_data_avail_handler)(struct smi_info *smi_info); - /* Flags from the last GET_MSG_FLAGS command, used when an ATTN - is set to hold the flags until we are done handling everything - from the flags. */ + /* + * Flags from the last GET_MSG_FLAGS command, used when an ATTN + * is set to hold the flags until we are done handling everything + * from the flags. + */ #define RECEIVE_MSG_AVAIL 0x01 #define EVENT_MSG_BUFFER_FULL 0x02 #define WDT_PRE_TIMEOUT_INT 0x08 @@ -175,25 +219,34 @@ struct smi_info #define OEM1_DATA_AVAIL 0x40 #define OEM2_DATA_AVAIL 0x80 #define OEM_DATA_AVAIL (OEM0_DATA_AVAIL | \ - OEM1_DATA_AVAIL | \ - OEM2_DATA_AVAIL) + OEM1_DATA_AVAIL | \ + OEM2_DATA_AVAIL) unsigned char msg_flags; - /* If set to true, this will request events the next time the - state machine is idle. */ + /* Does the BMC have an event buffer? */ + char has_event_buffer; + + /* + * If set to true, this will request events the next time the + * state machine is idle. + */ atomic_t req_events; - /* If true, run the state machine to completion on every send - call. Generally used after a panic to make sure stuff goes - out. */ + /* + * If true, run the state machine to completion on every send + * call. Generally used after a panic to make sure stuff goes + * out. + */ int run_to_completion; /* The I/O port of an SI interface. */ int port; - /* The space between start addresses of the two ports. For - instance, if the first port is 0xca2 and the spacing is 4, then - the second port is 0xca6. */ + /* + * The space between start addresses of the two ports. For + * instance, if the first port is 0xca2 and the spacing is 4, then + * the second port is 0xca6. + */ unsigned int spacing; /* zero if no irq; */ @@ -208,10 +261,12 @@ struct smi_info /* Used to gracefully stop the timer without race conditions. */ atomic_t stop_operation; - /* The driver will disable interrupts when it gets into a - situation where it cannot handle messages due to lack of - memory. Once that situation clears up, it will re-enable - interrupts. */ + /* + * The driver will disable interrupts when it gets into a + * situation where it cannot handle messages due to lack of + * memory. Once that situation clears up, it will re-enable + * interrupts. + */ int interrupt_disabled; /* From the get device id response... */ @@ -221,58 +276,67 @@ struct smi_info struct device *dev; struct platform_device *pdev; - /* True if we allocated the device, false if it came from - * someplace else (like PCI). */ + /* + * True if we allocated the device, false if it came from + * someplace else (like PCI). + */ int dev_registered; /* Slave address, could be reported from DMI. */ unsigned char slave_addr; /* Counters and things for the proc filesystem. */ - spinlock_t count_lock; - unsigned long short_timeouts; - unsigned long long_timeouts; - unsigned long timeout_restarts; - unsigned long idles; - unsigned long interrupts; - unsigned long attentions; - unsigned long flag_fetches; - unsigned long hosed_count; - unsigned long complete_transactions; - unsigned long events; - unsigned long watchdog_pretimeouts; - unsigned long incoming_messages; + atomic_t stats[SI_NUM_STATS]; - struct task_struct *thread; + struct task_struct *thread; struct list_head link; + union ipmi_smi_info_union addr_info; #if defined(__VMKLNX__) - atomic_t pendingRequests; - vmk_atomic64 vmkEvent; + atomic_t pendingRequests; + vmk_atomic64 vmkEvent; #endif }; +#define smi_inc_stat(smi, stat) \ + atomic_inc(&(smi)->stats[SI_STAT_ ## stat]) +#define smi_get_stat(smi, stat) \ + ((unsigned int) atomic_read(&(smi)->stats[SI_STAT_ ## stat])) + #define SI_MAX_PARMS 4 + #if defined(__VMKLNX__) #define TEN_MSEC 10 static int ipmi_notify_reboot(struct notifier_block *, unsigned long event, void *ptr); static struct notifier_block ipmi_notifier_reboot = { .notifier_call = ipmi_notify_reboot, - .next = NULL, - .priority = 0 + .next = NULL, + .priority = 0 }; #endif + static int force_kipmid[SI_MAX_PARMS]; static int num_force_kipmid; +#ifdef CONFIG_PCI +static int pci_registered; +#endif +#ifdef CONFIG_ACPI +static int pnp_registered; +#endif + +static unsigned int kipmid_max_busy_us[SI_MAX_PARMS]; +static int num_max_busy_us; static int unload_when_empty = 1; +static int add_smi(struct smi_info *smi); static int try_smi_init(struct smi_info *smi); static void cleanup_one_si(struct smi_info *to_clean); +static void cleanup_ipmi_si(void); static ATOMIC_NOTIFIER_HEAD(xaction_notifier_list); -static int register_xaction_notifier(struct notifier_block * nb) +static int register_xaction_notifier(struct notifier_block *nb) { return atomic_notifier_chain_register(&xaction_notifier_list, nb); } @@ -280,39 +344,32 @@ static int register_xaction_notifier(struct notifier_block * nb) static void deliver_recv_msg(struct smi_info *smi_info, struct ipmi_smi_msg *msg) { - /* Deliver the message to the upper layer with the lock - released. */ - spin_unlock(&(smi_info->si_lock)); + /* Deliver the message to the upper layer. */ ipmi_smi_msg_received(smi_info->intf, msg); - spin_lock(&(smi_info->si_lock)); } static void return_hosed_msg(struct smi_info *smi_info, int cCode) { struct ipmi_smi_msg *msg = smi_info->curr_msg; #if defined(__VMKLNX__) - if (msg->tagged) { - msg->tagged = 0; - atomic_dec(&smi_info->pendingRequests); - } + if (msg->tagged) { + msg->tagged = 0; + atomic_dec(&smi_info->pendingRequests); + } #endif if (cCode < 0 || cCode > IPMI_ERR_UNSPECIFIED) cCode = IPMI_ERR_UNSPECIFIED; /* else use it as is */ - /* Make it a reponse */ + /* Make it a response */ msg->rsp[0] = msg->data[0] | 4; msg->rsp[1] = msg->data[1]; msg->rsp[2] = cCode; msg->rsp_size = 3; smi_info->curr_msg = NULL; - - /* To fix #PR 889881*/ - spin_unlock(&(smi_info->msg_lock)); deliver_recv_msg(smi_info, msg); - spin_lock(&(smi_info->msg_lock)); } static enum si_sm_result start_next_msg(struct smi_info *smi_info) @@ -323,10 +380,6 @@ static enum si_sm_result start_next_msg(struct smi_info *smi_info) struct timeval t; #endif - /* No need to save flags, we aleady have interrupts off and we - already hold the SMI lock. */ - spin_lock(&(smi_info->msg_lock)); - /* Pick the high priority queue first. */ if (!list_empty(&(smi_info->hp_xmit_msgs))) { entry = smi_info->hp_xmit_msgs.next; @@ -346,7 +399,7 @@ static enum si_sm_result start_next_msg(struct smi_info *smi_info) link); #ifdef DEBUG_TIMING do_gettimeofday(&t); - printk("**Start2: %d.%9.9d\n", t.tv_sec, t.tv_usec); + printk(KERN_DEBUG "**Start2: %d.%9.9d\n", t.tv_sec, t.tv_usec); #endif err = atomic_notifier_call_chain(&xaction_notifier_list, 0, smi_info); @@ -358,15 +411,12 @@ static enum si_sm_result start_next_msg(struct smi_info *smi_info) smi_info->si_sm, smi_info->curr_msg->data, smi_info->curr_msg->data_size); - if (err) { + if (err) return_hosed_msg(smi_info, err); - } rv = SI_SM_CALL_WITHOUT_DELAY; } - out: - spin_unlock(&(smi_info->msg_lock)); - + out: return rv; } @@ -374,8 +424,10 @@ static void start_enable_irq(struct smi_info *smi_info) { unsigned char msg[2]; - /* If we are enabling interrupts, we have to tell the - BMC to use them. */ + /* + * If we are enabling interrupts, we have to tell the + * BMC to use them. + */ msg[0] = (IPMI_NETFN_APP_REQUEST << 2); msg[1] = IPMI_GET_BMC_GLOBAL_ENABLES_CMD; @@ -407,15 +459,20 @@ static void start_clear_flags(struct smi_info *smi_info) smi_info->si_state = SI_CLEARING_FLAGS; } -/* When we have a situtaion where we run out of memory and cannot - allocate messages, we just leave them in the BMC and run the system - polled until we can allocate some memory. Once we have some - memory, we will re-enable the interrupt. */ +/* + * When we have a situtaion where we run out of memory and cannot + * allocate messages, we just leave them in the BMC and run the system + * polled until we can allocate some memory. Once we have some + * memory, we will re-enable the interrupt. + */ static inline void disable_si_irq(struct smi_info *smi_info) { if ((smi_info->irq) && (!smi_info->interrupt_disabled)) { start_disable_irq(smi_info); smi_info->interrupt_disabled = 1; + if (!atomic_read(&smi_info->stop_operation)) + mod_timer(&smi_info->si_timer, + jiffies + SI_TIMEOUT_JIFFIES); } } @@ -432,15 +489,11 @@ static void handle_flags(struct smi_info *smi_info) retry: if (smi_info->msg_flags & WDT_PRE_TIMEOUT_INT) { /* Watchdog pre-timeout */ - spin_lock(&smi_info->count_lock); - smi_info->watchdog_pretimeouts++; - spin_unlock(&smi_info->count_lock); + smi_inc_stat(smi_info, watchdog_pretimeouts); start_clear_flags(smi_info); smi_info->msg_flags &= ~WDT_PRE_TIMEOUT_INT; - spin_unlock(&(smi_info->si_lock)); ipmi_smi_watchdog_pretimeout(smi_info->intf); - spin_lock(&(smi_info->si_lock)); } else if (smi_info->msg_flags & RECEIVE_MSG_AVAIL) { /* Messages available. */ smi_info->curr_msg = ipmi_alloc_smi_msg(); @@ -480,12 +533,11 @@ static void handle_flags(struct smi_info *smi_info) smi_info->curr_msg->data_size); smi_info->si_state = SI_GETTING_EVENTS; } else if (smi_info->msg_flags & OEM_DATA_AVAIL && - smi_info->oem_data_avail_handler) { + smi_info->oem_data_avail_handler) { if (smi_info->oem_data_avail_handler(smi_info)) goto retry; - } else { + } else smi_info->si_state = SI_NORMAL; - } } static void handle_transaction_done(struct smi_info *smi_info) @@ -495,7 +547,7 @@ static void handle_transaction_done(struct smi_info *smi_info) struct timeval t; do_gettimeofday(&t); - printk("**Done: %d.%9.9d\n", t.tv_sec, t.tv_usec); + printk(KERN_DEBUG "**Done: %d.%9.9d\n", t.tv_sec, t.tv_usec); #endif switch (smi_info->si_state) { case SI_NORMAL: @@ -508,15 +560,17 @@ static void handle_transaction_done(struct smi_info *smi_info) smi_info->curr_msg->rsp, IPMI_MAX_MSG_LENGTH); - /* Do this here becase deliver_recv_msg() releases the - lock, and a new message can be put in during the - time the lock is released. */ + /* + * Do this here becase deliver_recv_msg() releases the + * lock, and a new message can be put in during the + * time the lock is released. + */ msg = smi_info->curr_msg; #if defined(__VMKLNX__) - if (msg->tagged) { - msg->tagged = 0; - atomic_dec(&smi_info->pendingRequests); - } + if (msg->tagged) { + msg->tagged = 0; + atomic_dec(&smi_info->pendingRequests); + } #endif smi_info->curr_msg = NULL; deliver_recv_msg(smi_info, msg); @@ -530,12 +584,13 @@ static void handle_transaction_done(struct smi_info *smi_info) /* We got the flags from the SMI, now handle them. */ len = smi_info->handlers->get_result(smi_info->si_sm, msg, 4); if (msg[2] != 0) { - /* Error fetching flags, just give up for - now. */ + /* Error fetching flags, just give up for now. */ smi_info->si_state = SI_NORMAL; } else if (len < 4) { - /* Hmm, no flags. That's technically illegal, but - don't use uninitialized data. */ + /* + * Hmm, no flags. That's technically illegal, but + * don't use uninitialized data. + */ smi_info->si_state = SI_NORMAL; } else { smi_info->msg_flags = msg[3]; @@ -553,9 +608,8 @@ static void handle_transaction_done(struct smi_info *smi_info) smi_info->handlers->get_result(smi_info->si_sm, msg, 3); if (msg[2] != 0) { /* Error clearing flags */ - printk(KERN_WARNING - "ipmi_si: Error clearing flags: %2.2x\n", - msg[2]); + dev_warn(smi_info->dev, + "Error clearing flags: %2.2x\n", msg[2]); } if (smi_info->si_state == SI_CLEARING_FLAGS_THEN_SET_IRQ) start_enable_irq(smi_info); @@ -572,15 +626,17 @@ static void handle_transaction_done(struct smi_info *smi_info) smi_info->curr_msg->rsp, IPMI_MAX_MSG_LENGTH); - /* Do this here becase deliver_recv_msg() releases the - lock, and a new message can be put in during the - time the lock is released. */ + /* + * Do this here becase deliver_recv_msg() releases the + * lock, and a new message can be put in during the + * time the lock is released. + */ msg = smi_info->curr_msg; #if defined(__VMKLNX__) - if (msg->tagged) { - msg->tagged = 0; - atomic_dec(&smi_info->pendingRequests); - } + if (msg->tagged) { + msg->tagged = 0; + atomic_dec(&smi_info->pendingRequests); + } #endif smi_info->curr_msg = NULL; if (msg->rsp[2] != 0) { @@ -591,14 +647,14 @@ static void handle_transaction_done(struct smi_info *smi_info) smi_info->msg_flags &= ~EVENT_MSG_BUFFER_FULL; handle_flags(smi_info); } else { - spin_lock(&smi_info->count_lock); - smi_info->events++; - spin_unlock(&smi_info->count_lock); + smi_inc_stat(smi_info, events); - /* Do this before we deliver the message - because delivering the message releases the - lock and something else can mess with the - state. */ + /* + * Do this before we deliver the message + * because delivering the message releases the + * lock and something else can mess with the + * state. + */ handle_flags(smi_info); deliver_recv_msg(smi_info, msg); @@ -614,15 +670,17 @@ static void handle_transaction_done(struct smi_info *smi_info) smi_info->curr_msg->rsp, IPMI_MAX_MSG_LENGTH); - /* Do this here becase deliver_recv_msg() releases the - lock, and a new message can be put in during the - time the lock is released. */ + /* + * Do this here becase deliver_recv_msg() releases the + * lock, and a new message can be put in during the + * time the lock is released. + */ msg = smi_info->curr_msg; #if defined(__VMKLNX__) - if (msg->tagged) { - msg->tagged = 0; - atomic_dec(&smi_info->pendingRequests); - } + if (msg->tagged) { + msg->tagged = 0; + atomic_dec(&smi_info->pendingRequests); + } #endif smi_info->curr_msg = NULL; if (msg->rsp[2] != 0) { @@ -633,14 +691,14 @@ static void handle_transaction_done(struct smi_info *smi_info) smi_info->msg_flags &= ~RECEIVE_MSG_AVAIL; handle_flags(smi_info); } else { - spin_lock(&smi_info->count_lock); - smi_info->incoming_messages++; - spin_unlock(&smi_info->count_lock); + smi_inc_stat(smi_info, incoming_messages); - /* Do this before we deliver the message - because delivering the message releases the - lock and something else can mess with the - state. */ + /* + * Do this before we deliver the message + * because delivering the message releases the + * lock and something else can mess with the + * state. + */ handle_flags(smi_info); deliver_recv_msg(smi_info, msg); @@ -655,9 +713,8 @@ static void handle_transaction_done(struct smi_info *smi_info) /* We got the flags from the SMI, now handle them. */ smi_info->handlers->get_result(smi_info->si_sm, msg, 4); if (msg[2] != 0) { - printk(KERN_WARNING - "ipmi_si: Could not enable interrupts" - ", failed get, using polled mode.\n"); + dev_warn(smi_info->dev, "Could not enable interrupts" + ", failed get, using polled mode.\n"); smi_info->si_state = SI_NORMAL; } else { msg[0] = (IPMI_NETFN_APP_REQUEST << 2); @@ -678,11 +735,11 @@ static void handle_transaction_done(struct smi_info *smi_info) /* We got the flags from the SMI, now handle them. */ smi_info->handlers->get_result(smi_info->si_sm, msg, 4); - if (msg[2] != 0) { - printk(KERN_WARNING - "ipmi_si: Could not enable interrupts" - ", failed set, using polled mode.\n"); - } + if (msg[2] != 0) + dev_warn(smi_info->dev, "Could not enable interrupts" + ", failed set, using polled mode.\n"); + else + smi_info->interrupt_disabled = 0; smi_info->si_state = SI_NORMAL; break; } @@ -694,9 +751,8 @@ static void handle_transaction_done(struct smi_info *smi_info) /* We got the flags from the SMI, now handle them. */ smi_info->handlers->get_result(smi_info->si_sm, msg, 4); if (msg[2] != 0) { - printk(KERN_WARNING - "ipmi_si: Could not disable interrupts" - ", failed get.\n"); + dev_warn(smi_info->dev, "Could not disable interrupts" + ", failed get.\n"); smi_info->si_state = SI_NORMAL; } else { msg[0] = (IPMI_NETFN_APP_REQUEST << 2); @@ -718,9 +774,8 @@ static void handle_transaction_done(struct smi_info *smi_info) /* We got the flags from the SMI, now handle them. */ smi_info->handlers->get_result(smi_info->si_sm, msg, 4); if (msg[2] != 0) { - printk(KERN_WARNING - "ipmi_si: Could not disable interrupts" - ", failed set.\n"); + dev_warn(smi_info->dev, "Could not disable interrupts" + ", failed set.\n"); } smi_info->si_state = SI_NORMAL; break; @@ -728,72 +783,70 @@ static void handle_transaction_done(struct smi_info *smi_info) } } -/* Called on timeouts and events. Timeouts should pass the elapsed - time, interrupts should pass in zero. Must be called with - si_lock held and interrupts disabled. */ +/* + * Called on timeouts and events. Timeouts should pass the elapsed + * time, interrupts should pass in zero. Must be called with + * si_lock held and interrupts disabled. + */ static enum si_sm_result smi_event_handler(struct smi_info *smi_info, int time) { enum si_sm_result si_sm_result; restart: - /* There used to be a loop here that waited a little while - (around 25us) before giving up. That turned out to be - pointless, the minimum delays I was seeing were in the 300us - range, which is far too long to wait in an interrupt. So - we just run until the state machine tells us something - happened or it needs a delay. */ + /* + * There used to be a loop here that waited a little while + * (around 25us) before giving up. That turned out to be + * pointless, the minimum delays I was seeing were in the 300us + * range, which is far too long to wait in an interrupt. So + * we just run until the state machine tells us something + * happened or it needs a delay. + */ si_sm_result = smi_info->handlers->event(smi_info->si_sm, time); time = 0; while (si_sm_result == SI_SM_CALL_WITHOUT_DELAY) - { si_sm_result = smi_info->handlers->event(smi_info->si_sm, 0); - } - if (si_sm_result == SI_SM_TRANSACTION_COMPLETE) - { - spin_lock(&smi_info->count_lock); - smi_info->complete_transactions++; - spin_unlock(&smi_info->count_lock); + if (si_sm_result == SI_SM_TRANSACTION_COMPLETE) { + smi_inc_stat(smi_info, complete_transactions); handle_transaction_done(smi_info); si_sm_result = smi_info->handlers->event(smi_info->si_sm, 0); - } - else if (si_sm_result == SI_SM_HOSED) - { - spin_lock(&smi_info->count_lock); - smi_info->hosed_count++; - spin_unlock(&smi_info->count_lock); + } else if (si_sm_result == SI_SM_HOSED) { + smi_inc_stat(smi_info, hosed_count); - /* Do the before return_hosed_msg, because that - releases the lock. */ + /* + * Do the before return_hosed_msg, because that + * releases the lock. + */ smi_info->si_state = SI_NORMAL; if (smi_info->curr_msg != NULL) { - /* If we were handling a user message, format - a response to send to the upper layer to - tell it about the error. */ - /* To fix #PR 889881*/ - spin_lock(&(smi_info->msg_lock)); + /* + * If we were handling a user message, format + * a response to send to the upper layer to + * tell it about the error. + */ return_hosed_msg(smi_info, IPMI_ERR_UNSPECIFIED); - spin_unlock(&(smi_info->msg_lock)); } si_sm_result = smi_info->handlers->event(smi_info->si_sm, 0); } - /* We prefer handling attn over new messages. */ - if (si_sm_result == SI_SM_ATTN) - { + /* + * We prefer handling attn over new messages. But don't do + * this if there is not yet an upper layer to handle anything. + */ + if (likely(smi_info->intf) && si_sm_result == SI_SM_ATTN) { unsigned char msg[2]; - spin_lock(&smi_info->count_lock); - smi_info->attentions++; - spin_unlock(&smi_info->count_lock); + smi_inc_stat(smi_info, attentions); - /* Got a attn, send down a get message flags to see - what's causing it. It would be better to handle - this in the upper layer, but due to the way - interrupts work with the SMI, that's not really - possible. */ + /* + * Got a attn, send down a get message flags to see + * what's causing it. It would be better to handle + * this in the upper layer, but due to the way + * interrupts work with the SMI, that's not really + * possible. + */ msg[0] = (IPMI_NETFN_APP_REQUEST << 2); msg[1] = IPMI_GET_MSG_FLAGS_CMD; @@ -805,20 +858,19 @@ static enum si_sm_result smi_event_handler(struct smi_info *smi_info, /* If we are currently idle, try to start the next message. */ if (si_sm_result == SI_SM_IDLE) { - spin_lock(&smi_info->count_lock); - smi_info->idles++; - spin_unlock(&smi_info->count_lock); + smi_inc_stat(smi_info, idles); si_sm_result = start_next_msg(smi_info); if (si_sm_result != SI_SM_IDLE) goto restart; - } + } if ((si_sm_result == SI_SM_IDLE) - && (atomic_read(&smi_info->req_events))) - { - /* We are idle and the upper layer requested that I fetch - events, so do so. */ + && (atomic_read(&smi_info->req_events))) { + /* + * We are idle and the upper layer requested that I fetch + * events, so do so. + */ atomic_set(&smi_info->req_events, 0); smi_info->curr_msg = ipmi_alloc_smi_msg(); @@ -860,62 +912,85 @@ static void sender(void *send_info, return; } - spin_lock_irqsave(&(smi_info->msg_lock), flags); #ifdef DEBUG_TIMING do_gettimeofday(&t); printk("**Enqueue: %d.%9.9d\n", t.tv_sec, t.tv_usec); #endif +#if defined(__VMKLNX__) + /* + * In VMKLNX we seem to have a situation where the if block checking + * the si_state and curr_msg value rarely becomes true due to poor + * scheduling of IPMI thread blocking both receiving and sending + * messages. This code should speed up the thread. + * This issue was only noticed on some servers and may not be hardware + * dependent. + * + * TODO: Verify if the tagging and pendingRequests logic is still + * necessary and if not remove them + * + */ + if (smi_info->thread) { + msg->tagged = 1; + atomic_inc(&smi_info->pendingRequests); + vmk_WorldWakeup((vmk_WorldEventID)&smi_info->vmkEvent); + } +#endif + if (smi_info->run_to_completion) { - /* If we are running to completion, then throw it in - the list and run transactions until everything is - clear. Priority doesn't matter here. */ + /* + * If we are running to completion, then throw it in + * the list and run transactions until everything is + * clear. Priority doesn't matter here. + */ + + /* + * Run to completion means we are single-threaded, no + * need for locks. + */ list_add_tail(&(msg->link), &(smi_info->xmit_msgs)); - /* We have to release the msg lock and claim the smi - lock in this case, because of race conditions. */ - spin_unlock_irqrestore(&(smi_info->msg_lock), flags); - - spin_lock_irqsave(&(smi_info->si_lock), flags); result = smi_event_handler(smi_info, 0); while (result != SI_SM_IDLE) { udelay(SI_SHORT_TIMEOUT_USEC); result = smi_event_handler(smi_info, SI_SHORT_TIMEOUT_USEC); } - spin_unlock_irqrestore(&(smi_info->si_lock), flags); return; - } else { -#if defined(__VMKLNX__) - msg->tagged = 1; - atomic_inc(&smi_info->pendingRequests); - vmk_WorldWakeup((vmk_WorldEventID)&smi_info->vmkEvent); -#endif - if (priority > 0) { - list_add_tail(&(msg->link), &(smi_info->hp_xmit_msgs)); - } else { - list_add_tail(&(msg->link), &(smi_info->xmit_msgs)); - } } - spin_unlock_irqrestore(&(smi_info->msg_lock), flags); - spin_lock_irqsave(&(smi_info->si_lock), flags); - if ((smi_info->si_state == SI_NORMAL) - && (smi_info->curr_msg == NULL)) - { + spin_lock_irqsave(&smi_info->si_lock, flags); + if (priority > 0) + list_add_tail(&msg->link, &smi_info->hp_xmit_msgs); + else + list_add_tail(&msg->link, &smi_info->xmit_msgs); + + if (smi_info->si_state == SI_NORMAL && smi_info->curr_msg == NULL) { + /* + * last_timeout_jiffies is updated here to avoid + * smi_timeout() handler passing very large time_diff + * value to smi_event_handler() that causes + * the send command to abort. + */ + smi_info->last_timeout_jiffies = jiffies; + + mod_timer(&smi_info->si_timer, jiffies + SI_TIMEOUT_JIFFIES); + +#if !defined(__VMKLNX__) + if (smi_info->thread) + wake_up_process(smi_info->thread); +#endif + start_next_msg(smi_info); smi_event_handler(smi_info, 0); } - spin_unlock_irqrestore(&(smi_info->si_lock), flags); + spin_unlock_irqrestore(&smi_info->si_lock, flags); } static void set_run_to_completion(void *send_info, int i_run_to_completion) { struct smi_info *smi_info = send_info; enum si_sm_result result; - unsigned long flags; - - spin_lock_irqsave(&(smi_info->si_lock), flags); smi_info->run_to_completion = i_run_to_completion; if (i_run_to_completion) { @@ -926,36 +1001,99 @@ static void set_run_to_completion(void *send_info, int i_run_to_completion) SI_SHORT_TIMEOUT_USEC); } } - - spin_unlock_irqrestore(&(smi_info->si_lock), flags); } +/* + * Use -1 in the nsec value of the busy waiting timespec to tell that + * we are spinning in kipmid looking for something and not delaying + * between checks + */ +static inline void ipmi_si_set_not_busy(struct timespec *ts) +{ + ts->tv_nsec = -1; +} +static inline int ipmi_si_is_busy(struct timespec *ts) +{ + return ts->tv_nsec != -1; +} + +static int ipmi_thread_busy_wait(enum si_sm_result smi_result, + const struct smi_info *smi_info, + struct timespec *busy_until) +{ + unsigned int max_busy_us = 0; + + if (smi_info->intf_num < num_max_busy_us) + max_busy_us = kipmid_max_busy_us[smi_info->intf_num]; + if (max_busy_us == 0 || smi_result != SI_SM_CALL_WITH_DELAY) + ipmi_si_set_not_busy(busy_until); + else if (!ipmi_si_is_busy(busy_until)) { + getnstimeofday(busy_until); + timespec_add_ns(busy_until, max_busy_us*NSEC_PER_USEC); + } else { + struct timespec now; + getnstimeofday(&now); + if (unlikely(timespec_compare(&now, busy_until) > 0)) { + ipmi_si_set_not_busy(busy_until); + return 0; + } + } + return 1; +} + + +/* + * A busy-waiting loop for speeding up IPMI operation. + * + * Lousy hardware makes this hard. This is only enabled for systems + * that are not BT and do not have interrupts. It starts spinning + * when an operation is complete or until max_busy tells it to stop + * (if that is enabled). See the paragraph on kimid_max_busy_us in + * Documentation/IPMI.txt for details. + */ + static int ipmi_thread(void *data) { struct smi_info *smi_info = data; unsigned long flags; enum si_sm_result smi_result; + struct timespec busy_until; + ipmi_si_set_not_busy(&busy_until); set_user_nice(current, 19); while (!kthread_should_stop()) { + int busy_wait; + spin_lock_irqsave(&(smi_info->si_lock), flags); smi_result = smi_event_handler(smi_info, 0); spin_unlock_irqrestore(&(smi_info->si_lock), flags); - if (smi_result == SI_SM_CALL_WITHOUT_DELAY) { - /* do nothing */ - } + busy_wait = ipmi_thread_busy_wait(smi_result, smi_info, + &busy_until); + if (smi_result == SI_SM_CALL_WITHOUT_DELAY) + ; /* do nothing */ #if defined(__VMKLNX__) - else if(atomic_read(&smi_info->pendingRequests) != 0) { - vmk_WorldYield(); - } else { - /* XXX: Need to handle return status from vmk_WorldWait */ - vmk_WorldWait((vmk_WorldEventID)&smi_info->vmkEvent, - VMK_LOCK_INVALID, 5000, - "Waiting for SMI events"); - } + else if(atomic_read(&smi_info->pendingRequests) != 0) { + vmk_WorldYield(); + } else { + VMK_ReturnStatus status; + + /* + * Make sure we notice when the vmkernel tells us to exit, + * otherwise we might keep running during shutdown after + * anything should be running. see PR 978551. + */ + status = vmk_WorldWait((vmk_WorldEventID)&smi_info->vmkEvent, + VMK_LOCK_INVALID, 5000, + "Waiting for SMI events"); + if (status == VMK_DEATH_PENDING) { + break; + } + } #else - else if (smi_result == SI_SM_CALL_WITH_DELAY) + else if (smi_result == SI_SM_CALL_WITH_DELAY && busy_wait) schedule(); + else if (smi_result == SI_SM_IDLE) + schedule_timeout_interruptible(100); else schedule_timeout_interruptible(1); #endif @@ -967,23 +1105,27 @@ static int ipmi_thread(void *data) static void poll(void *send_info) { struct smi_info *smi_info = send_info; - unsigned long flags; + unsigned long flags = 0; + int run_to_completion = smi_info->run_to_completion; /* * Make sure there is some delay in the poll loop so we can * drive time forward and timeout things. */ udelay(10); - spin_lock_irqsave(&smi_info->si_lock, flags); + if (!run_to_completion) + spin_lock_irqsave(&smi_info->si_lock, flags); smi_event_handler(smi_info, 10); - spin_unlock_irqrestore(&smi_info->si_lock, flags); + if (!run_to_completion) + spin_unlock_irqrestore(&smi_info->si_lock, flags); } static void request_events(void *send_info) { struct smi_info *smi_info = send_info; - if (atomic_read(&smi_info->stop_operation)) + if (atomic_read(&smi_info->stop_operation) || + !smi_info->has_event_buffer) return; atomic_set(&smi_info->req_events, 1); @@ -998,6 +1140,7 @@ static void smi_timeout(unsigned long data) unsigned long flags; unsigned long jiffies_now; long time_diff; + long timeout; #ifdef DEBUG_TIMING struct timeval t; #endif @@ -1005,7 +1148,7 @@ static void smi_timeout(unsigned long data) spin_lock_irqsave(&(smi_info->si_lock), flags); #ifdef DEBUG_TIMING do_gettimeofday(&t); - printk("**Timer: %d.%9.9d\n", t.tv_sec, t.tv_usec); + printk(KERN_DEBUG "**Timer: %d.%9.9d\n", t.tv_sec, t.tv_usec); #endif jiffies_now = jiffies; time_diff = (((long)jiffies_now - (long)smi_info->last_timeout_jiffies) @@ -1018,29 +1161,26 @@ static void smi_timeout(unsigned long data) if ((smi_info->irq) && (!smi_info->interrupt_disabled)) { /* Running with interrupts, only do long timeouts. */ - smi_info->si_timer.expires = jiffies + SI_TIMEOUT_JIFFIES; - spin_lock_irqsave(&smi_info->count_lock, flags); - smi_info->long_timeouts++; - spin_unlock_irqrestore(&smi_info->count_lock, flags); - goto do_add_timer; + timeout = jiffies + SI_TIMEOUT_JIFFIES; + smi_inc_stat(smi_info, long_timeouts); + goto do_mod_timer; } - /* If the state machine asks for a short delay, then shorten - the timer timeout. */ + /* + * If the state machine asks for a short delay, then shorten + * the timer timeout. + */ if (smi_result == SI_SM_CALL_WITH_DELAY) { - spin_lock_irqsave(&smi_info->count_lock, flags); - smi_info->short_timeouts++; - spin_unlock_irqrestore(&smi_info->count_lock, flags); - smi_info->si_timer.expires = jiffies + 1; + smi_inc_stat(smi_info, short_timeouts); + timeout = jiffies + 1; } else { - spin_lock_irqsave(&smi_info->count_lock, flags); - smi_info->long_timeouts++; - spin_unlock_irqrestore(&smi_info->count_lock, flags); - smi_info->si_timer.expires = jiffies + SI_TIMEOUT_JIFFIES; + smi_inc_stat(smi_info, long_timeouts); + timeout = jiffies + SI_TIMEOUT_JIFFIES; } - do_add_timer: - add_timer(&(smi_info->si_timer)); + do_mod_timer: + if (smi_result != SI_SM_IDLE) + mod_timer(&(smi_info->si_timer), timeout); } static irqreturn_t si_irq_handler(int irq, void *data) @@ -1053,13 +1193,11 @@ static irqreturn_t si_irq_handler(int irq, void *data) spin_lock_irqsave(&(smi_info->si_lock), flags); - spin_lock(&smi_info->count_lock); - smi_info->interrupts++; - spin_unlock(&smi_info->count_lock); + smi_inc_stat(smi_info, interrupts); #ifdef DEBUG_TIMING do_gettimeofday(&t); - printk("**Interrupt: %d.%9.9d\n", t.tv_sec, t.tv_usec); + printk(KERN_DEBUG "**Interrupt: %d.%9.9d\n", t.tv_sec, t.tv_usec); #endif smi_event_handler(smi_info, 0); spin_unlock_irqrestore(&(smi_info->si_lock), flags); @@ -1103,27 +1241,39 @@ static int smi_start_processing(void *send_info, * The BT interface is efficient enough to not need a thread, * and there is no need for a thread if we have interrupts. */ - else if ((new_smi->si_type != SI_BT) && (!new_smi->irq)) + else if ((new_smi->si_type != SI_BT) && (!new_smi->irq)) enable = 1; if (enable) { new_smi->thread = kthread_run(ipmi_thread, new_smi, "kipmi%d", new_smi->intf_num); if (IS_ERR(new_smi->thread)) { - printk(KERN_NOTICE "ipmi_si_intf: Could not start" - " kernel thread due to error %ld, only using" - " timers to drive the interface\n", - PTR_ERR(new_smi->thread)); + dev_notice(new_smi->dev, "Could not start" + " kernel thread due to error %ld, only using" + " timers to drive the interface\n", + PTR_ERR(new_smi->thread)); new_smi->thread = NULL; } } #if defined(__VMKLNX__) - atomic_set(&new_smi->pendingRequests, 0); + atomic_set(&new_smi->pendingRequests, 0); #endif return 0; } +static int get_smi_info(void *send_info, struct ipmi_smi_info *data) +{ + struct smi_info *smi = send_info; + + data->addr_src = smi->addr_source; + data->dev = smi->dev; + data->addr_info = smi->addr_info; + get_device(smi->dev); + + return 0; +} + static void set_maintenance_mode(void *send_info, int enable) { struct smi_info *smi_info = send_info; @@ -1132,19 +1282,21 @@ static void set_maintenance_mode(void *send_info, int enable) atomic_set(&smi_info->req_events, 0); } -static struct ipmi_smi_handlers handlers = -{ - .owner = THIS_MODULE, - .start_processing = smi_start_processing, - .sender = sender, - .request_events = request_events, - .set_maintenance_mode = set_maintenance_mode, - .set_run_to_completion = set_run_to_completion, +static struct ipmi_smi_handlers handlers = { + .owner = THIS_MODULE, + .start_processing = smi_start_processing, + .get_smi_info = get_smi_info, + .sender = sender, + .request_events = request_events, + .set_maintenance_mode = set_maintenance_mode, + .set_run_to_completion = set_run_to_completion, .poll = poll, }; -/* There can be 4 IO ports passed in (with or without IRQs), 4 addresses, - a default IO port, and 1 ACPI/SPMI address. That sets SI_MAX_DRIVERS */ +/* + * There can be 4 IO ports passed in (with or without IRQs), 4 addresses, + * a default IO port, and 1 ACPI/SPMI address. That sets SI_MAX_DRIVERS. + */ static LIST_HEAD(smi_infos); static DEFINE_MUTEX(smi_infos_lock); @@ -1153,7 +1305,7 @@ static int smi_num; /* Used to sequence the SMIs */ #define DEFAULT_REGSPACING 1 #define DEFAULT_REGSIZE 1 -static int si_trydefaults = 1; +static bool si_trydefaults = 1; static char *si_type[SI_MAX_PARMS]; #define MAX_SI_TYPE_STR 30 static char si_type_str[MAX_SI_TYPE_STR]; @@ -1194,7 +1346,7 @@ static int num_regshifts; #else static unsigned int num_regshifts; #endif /* #if defined (__VMKLNX__) */ -static int slave_addrs[SI_MAX_PARMS]; +static int slave_addrs[SI_MAX_PARMS]; /* Leaving 0 chooses the default value */ #if defined (__VMKLNX__) static int num_slave_addrs; #else @@ -1266,7 +1418,11 @@ module_param(unload_when_empty, int, 0); MODULE_PARM_DESC(unload_when_empty, "Unload the module if no interfaces are" " specified or found, default is 1. Setting to 0" " is useful for hot add of devices using hotmod."); - +module_param_array(kipmid_max_busy_us, uint, &num_max_busy_us, 0644); +MODULE_PARM_DESC(kipmid_max_busy_us, + "Max time (in microseconds) to busy-wait for IPMI data before" + " sleeping. 0 (default) means to wait forever. Set to 100-500" + " if kipmid is using up a lot of CPU time."); static void std_irq_cleanup(struct smi_info *info) { @@ -1279,29 +1435,29 @@ static void std_irq_cleanup(struct smi_info *info) #if defined(__VMKLNX__) && defined(HP_G6_SUPPORT) static int pci_irq_setup(struct smi_info *info) { - int rv; + int rv; - if (!info->irq) - return 0; + if (!info->irq) + return 0; - rv = request_irq(info->irq, - si_irq_handler, - (SA_SHIRQ|SA_INTERRUPT), - DEVICE_NAME, - info); - if (rv) { - printk(KERN_WARNING - "ipmi_si: %s unable to claim PCI interrupt %d," - " running polled\n", - DEVICE_NAME, info->irq); - info->irq = 0; + rv = request_irq(info->irq, + si_irq_handler, + (SA_SHIRQ|SA_INTERRUPT), + DEVICE_NAME, + info); + if (rv) { + printk(KERN_WARNING PFX "%s unable to claim PCI interrupt %d," + " running polled\n", + DEVICE_NAME, info->irq); + info->irq = 0; info->interrupt_disabled = 1; - } else { - info->irq_cleanup = std_irq_cleanup; - printk("ipmi_si: Using PCI Plug and Play interrupt %d\n", info->irq); - } + } else { + info->irq_cleanup = std_irq_cleanup; + printk(KERN_INFO PFX "Using PCI Plug and Play interrupt %d\n", + info->irq); + } - return rv; + return rv; } #endif /* defined(__VMKLNX__) && defined(HP_G6_SUPPORT) */ @@ -1329,14 +1485,13 @@ static int std_irq_setup(struct smi_info *info) DEVICE_NAME, info); if (rv) { - printk(KERN_WARNING - "ipmi_si: %s unable to claim interrupt %d," - " running polled\n", - DEVICE_NAME, info->irq); + dev_warn(info->dev, "%s unable to claim interrupt %d," + " running polled\n", + DEVICE_NAME, info->irq); info->irq = 0; } else { info->irq_cleanup = std_irq_cleanup; - printk(" Using irq %d\n", info->irq); + dev_info(info->dev, "Using irq %d\n", info->irq); } return rv; @@ -1393,10 +1548,9 @@ static void port_cleanup(struct smi_info *info) int idx; if (addr) { - for (idx = 0; idx < info->io_size; idx++) { + for (idx = 0; idx < info->io_size; idx++) release_region(addr + idx * info->io.regspacing, info->io.regsize); - } } } @@ -1410,8 +1564,10 @@ static int port_setup(struct smi_info *info) info->io_cleanup = port_cleanup; - /* Figure out the actual inb/inw/inl/etc routine to use based - upon the register size. */ + /* + * Figure out the actual inb/inw/inl/etc routine to use based + * upon the register size. + */ switch (info->io.regsize) { case 1: info->io.inputb = port_inb; @@ -1426,17 +1582,18 @@ static int port_setup(struct smi_info *info) info->io.outputb = port_outl; break; default: - printk("ipmi_si: Invalid register size: %d\n", - info->io.regsize); + dev_warn(info->dev, "Invalid register size: %d\n", + info->io.regsize); return -EINVAL; } - /* Some BIOSes reserve disjoint I/O regions in their ACPI + /* + * Some BIOSes reserve disjoint I/O regions in their ACPI * tables. This causes problems when trying to register the * entire I/O region. Therefore we must register each I/O * port separately. */ - for (idx = 0; idx < info->io_size; idx++) { + for (idx = 0; idx < info->io_size; idx++) { if (request_region(addr + idx * info->io.regspacing, info->io.regsize, DEVICE_NAME) == NULL) { /* Undo allocations */ @@ -1524,8 +1681,10 @@ static int mem_setup(struct smi_info *info) info->io_cleanup = mem_cleanup; - /* Figure out the actual readb/readw/readl/etc routine to use based - upon the register size. */ + /* + * Figure out the actual readb/readw/readl/etc routine to use based + * upon the register size. + */ switch (info->io.regsize) { case 1: info->io.inputb = intf_mem_inb; @@ -1546,16 +1705,18 @@ static int mem_setup(struct smi_info *info) break; #endif default: - printk("ipmi_si: Invalid register size: %d\n", - info->io.regsize); + dev_warn(info->dev, "Invalid register size: %d\n", + info->io.regsize); return -EINVAL; } - /* Calculate the total amount of memory to claim. This is an + /* + * Calculate the total amount of memory to claim. This is an * unusual looking calculation, but it avoids claiming any * more memory than it has to. It will claim everything * between the first address to the end of the last full - * register. */ + * register. + */ mapsize = ((info->io_size * info->io.regspacing) - (info->io.regspacing - info->io.regsize)); @@ -1650,6 +1811,15 @@ static int check_hotmod_int_op(const char *curr, const char *option, return 0; } +static struct smi_info *smi_info_alloc(void) +{ + struct smi_info *info = kzalloc(sizeof(*info), GFP_KERNEL); + + if (info) + spin_lock_init(&info->si_lock); + return info; +} + static int hotmod_handler(const char *val, struct kernel_param *kp) { char *str = kstrdup(val, GFP_KERNEL); @@ -1684,7 +1854,7 @@ static int hotmod_handler(const char *val, struct kernel_param *kp) regsize = 1; regshift = 0; irq = 0; - ipmb = 0x20; + ipmb = 0; /* Choose the default if not specified */ next = strchr(curr, ':'); if (next) { @@ -1764,13 +1934,13 @@ static int hotmod_handler(const char *val, struct kernel_param *kp) } if (op == HM_ADD) { - info = kzalloc(sizeof(*info), GFP_KERNEL); + info = smi_info_alloc(); if (!info) { rv = -ENOMEM; goto out; } - info->addr_source = "hotmod"; + info->addr_source = SI_HOTMOD; info->si_type = si_type; info->io.addr_data = addr; info->io.addr_type = addr_space; @@ -1792,7 +1962,12 @@ static int hotmod_handler(const char *val, struct kernel_param *kp) info->irq_setup = std_irq_setup; info->slave_addr = ipmb; - try_smi_init(info); + if (!add_smi(info)) { + if (try_smi_init(info)) + cleanup_one_si(info); + } else { + kfree(info); + } } else { /* remove */ struct smi_info *e, *tmp_e; @@ -1815,8 +1990,9 @@ static int hotmod_handler(const char *val, struct kernel_param *kp) return rv; } -static __devinit void hardcode_find_bmc(void) +static int __devinit hardcode_find_bmc(void) { + int ret = -ENODEV; int i; struct smi_info *info; @@ -1824,11 +2000,12 @@ static __devinit void hardcode_find_bmc(void) if (!ports[i] && !addrs[i]) continue; - info = kzalloc(sizeof(*info), GFP_KERNEL); + info = smi_info_alloc(); if (!info) - return; + return -ENOMEM; - info->addr_source = "hardcoded"; + info->addr_source = SI_HARDCODED; + printk(KERN_INFO PFX "probing via hardcoded address\n"); if (!si_type[i] || strcmp(si_type[i], "kcs") == 0) { info->si_type = SI_KCS; @@ -1837,8 +2014,7 @@ static __devinit void hardcode_find_bmc(void) } else if (strcmp(si_type[i], "bt") == 0) { info->si_type = SI_BT; } else { - printk(KERN_WARNING - "ipmi_si: Interface type specified " + printk(KERN_WARNING PFX "Interface type specified " "for interface %d, was invalid: %s\n", i, si_type[i]); kfree(info); @@ -1856,11 +2032,9 @@ static __devinit void hardcode_find_bmc(void) info->io.addr_data = addrs[i]; info->io.addr_type = IPMI_MEM_ADDR_SPACE; } else { - printk(KERN_WARNING - "ipmi_si: Interface type specified " - "for interface %d, " - "but port and address were not set or " - "set to zero.\n", i); + printk(KERN_WARNING PFX "Interface type specified " + "for interface %d, but port and address were " + "not set or set to zero.\n", i); kfree(info); continue; } @@ -1876,22 +2050,33 @@ static __devinit void hardcode_find_bmc(void) info->irq = irqs[i]; if (info->irq) info->irq_setup = std_irq_setup; + info->slave_addr = slave_addrs[i]; - try_smi_init(info); + if (!add_smi(info)) { + if (try_smi_init(info)) + cleanup_one_si(info); + ret = 0; + } else { + kfree(info); + } } + return ret; } #ifdef CONFIG_ACPI #include -/* Once we get an ACPI failure, we don't try any more, because we go - through the tables sequentially. Once we don't find a table, there - are no more. */ +/* + * Once we get an ACPI failure, we don't try any more, because we go + * through the tables sequentially. Once we don't find a table, there + * are no more. + */ static int acpi_failure; /* For GPE-type interrupts. */ -static u32 ipmi_acpi_gpe(void *context) +static u32 ipmi_acpi_gpe(acpi_handle gpe_device, + u32 gpe_number, void *context) { struct smi_info *smi_info = context; unsigned long flags; @@ -1901,9 +2086,7 @@ static u32 ipmi_acpi_gpe(void *context) spin_lock_irqsave(&(smi_info->si_lock), flags); - spin_lock(&smi_info->count_lock); - smi_info->interrupts++; - spin_unlock(&smi_info->count_lock); + smi_inc_stat(smi_info, interrupts); #ifdef DEBUG_TIMING do_gettimeofday(&t); @@ -1937,22 +2120,20 @@ static int acpi_gpe_irq_setup(struct smi_info *info) &ipmi_acpi_gpe, info); if (status != AE_OK) { - printk(KERN_WARNING - "ipmi_si: %s unable to claim ACPI GPE %d," - " running polled\n", - DEVICE_NAME, info->irq); + dev_warn(info->dev, "%s unable to claim ACPI GPE %d," + " running polled\n", DEVICE_NAME, info->irq); info->irq = 0; return -EINVAL; } else { info->irq_cleanup = acpi_gpe_irq_cleanup; - printk(" Using ACPI GPE %d\n", info->irq); + dev_info(info->dev, "Using ACPI GPE %d\n", info->irq); return 0; } } /* * Defined at - * http://h21007.www2.hp.com/dspp/files/unprotected/devresource/Docs/TechPapers/IA64/hpspmi.pdf + * http://h21007.www2.hp.com/portal/download/files/unprot/hpspmi.pdf */ struct SPMITable { s8 Signature[4]; @@ -1974,14 +2155,18 @@ struct SPMITable { */ u8 InterruptType; - /* If bit 0 of InterruptType is set, then this is the SCI - interrupt in the GPEx_STS register. */ + /* + * If bit 0 of InterruptType is set, then this is the SCI + * interrupt in the GPEx_STS register. + */ u8 GPE; s16 Reserved; - /* If bit 1 of InterruptType is set, then this is the I/O - APIC/SAPIC interrupt. */ + /* + * If bit 1 of InterruptType is set, then this is the I/O + * APIC/SAPIC interrupt. + */ u32 GlobalSystemInterrupt; /* The actual register address. */ @@ -1992,32 +2177,26 @@ struct SPMITable { s8 spmi_id[1]; /* A '\0' terminated array starts here. */ }; -static __devinit int try_init_acpi(struct SPMITable *spmi) +static int __devinit try_init_spmi(struct SPMITable *spmi) { struct smi_info *info; - u8 addr_space; if (spmi->IPMIlegacy != 1) { - printk(KERN_INFO "IPMI: Bad SPMI legacy %d\n", spmi->IPMIlegacy); - return -ENODEV; + printk(KERN_INFO PFX "Bad SPMI legacy %d\n", spmi->IPMIlegacy); + return -ENODEV; } - if (spmi->addr.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) - addr_space = IPMI_MEM_ADDR_SPACE; - else - addr_space = IPMI_IO_ADDR_SPACE; - - info = kzalloc(sizeof(*info), GFP_KERNEL); + info = smi_info_alloc(); if (!info) { - printk(KERN_ERR "ipmi_si: Could not allocate SI data (3)\n"); + printk(KERN_ERR PFX "Could not allocate SI data (3)\n"); return -ENOMEM; } - info->addr_source = "ACPI"; + info->addr_source = SI_SPMI; + printk(KERN_INFO PFX "probing via SPMI\n"); /* Figure out the interface type. */ - switch (spmi->InterfaceType) - { + switch (spmi->InterfaceType) { case 1: /* KCS */ info->si_type = SI_KCS; break; @@ -2028,8 +2207,8 @@ static __devinit int try_init_acpi(struct SPMITable *spmi) info->si_type = SI_BT; break; default: - printk(KERN_INFO "ipmi_si: Unknown ACPI/SPMI SI type %d\n", - spmi->InterfaceType); + printk(KERN_INFO PFX "Unknown ACPI/SPMI SI type %d\n", + spmi->InterfaceType); kfree(info); return -EIO; } @@ -2065,17 +2244,23 @@ static __devinit int try_init_acpi(struct SPMITable *spmi) info->io.addr_type = IPMI_IO_ADDR_SPACE; } else { kfree(info); - printk("ipmi_si: Unknown ACPI I/O Address type\n"); + printk(KERN_WARNING PFX "Unknown ACPI I/O Address type\n"); return -EIO; } info->io.addr_data = spmi->addr.address; - try_smi_init(info); + pr_info("ipmi_si: SPMI: %s %#lx regsize %d spacing %d irq %d\n", + (info->io.addr_type == IPMI_IO_ADDR_SPACE) ? "io" : "mem", + info->io.addr_data, info->io.regsize, info->io.regspacing, + info->irq); + + if(add_smi(info)) + kfree(info); return 0; } -static __devinit void acpi_find_bmc(void) +static void __devinit spmi_find_bmc(void) { acpi_status status; struct SPMITable *spmi; @@ -2093,14 +2278,132 @@ static __devinit void acpi_find_bmc(void) if (status != AE_OK) return; - try_init_acpi(spmi); + try_init_spmi(spmi); } } + +static int __devinit ipmi_pnp_probe(struct pnp_dev *dev, + const struct pnp_device_id *dev_id) +{ + struct acpi_device *acpi_dev; + struct smi_info *info; + struct resource *res, *res_second; + acpi_handle handle; + acpi_status status; + unsigned long long tmp; + + acpi_dev = pnp_acpi_device(dev); + if (!acpi_dev) + return -ENODEV; + + info = smi_info_alloc(); + if (!info) + return -ENOMEM; + + info->addr_source = SI_ACPI; + printk(KERN_INFO PFX "Probing via ACPI\n"); + + handle = acpi_dev->handle; + info->addr_info.acpi_info.acpi_handle = handle; + + /* _IFT tells us the interface type: KCS, BT, etc */ + status = acpi_evaluate_integer(handle, "_IFT", NULL, &tmp); + if (ACPI_FAILURE(status)) + goto err_free; + + switch (tmp) { + case 1: + info->si_type = SI_KCS; + break; + case 2: + info->si_type = SI_SMIC; + break; + case 3: + info->si_type = SI_BT; + break; + default: + dev_info(&dev->dev, "Unknown IPMI type %lld\n", tmp); + goto err_free; + } + + res = pnp_get_resource(dev, IORESOURCE_IO, 0); + if (res) { + info->io_setup = port_setup; + info->io.addr_type = IPMI_IO_ADDR_SPACE; + } else { + res = pnp_get_resource(dev, IORESOURCE_MEM, 0); + if (res) { + info->io_setup = mem_setup; + info->io.addr_type = IPMI_MEM_ADDR_SPACE; + } + } + if (!res) { + dev_err(&dev->dev, "no I/O or memory address\n"); + goto err_free; + } + info->io.addr_data = res->start; + + info->io.regspacing = DEFAULT_REGSPACING; + res_second = pnp_get_resource(dev, + (info->io.addr_type == IPMI_IO_ADDR_SPACE) ? + IORESOURCE_IO : IORESOURCE_MEM, + 1); + if (res_second) { + if (res_second->start > info->io.addr_data) + info->io.regspacing = res_second->start - info->io.addr_data; + } + info->io.regsize = DEFAULT_REGSPACING; + info->io.regshift = 0; + + /* If _GPE exists, use it; otherwise use standard interrupts */ + status = acpi_evaluate_integer(handle, "_GPE", NULL, &tmp); + if (ACPI_SUCCESS(status)) { + info->irq = tmp; + info->irq_setup = acpi_gpe_irq_setup; + } else if (pnp_irq_valid(dev, 0)) { + info->irq = pnp_irq(dev, 0); + info->irq_setup = std_irq_setup; + } + + info->dev = &dev->dev; + pnp_set_drvdata(dev, info); + + dev_info(info->dev, "%pR regsize %d spacing %d irq %d\n", + res, info->io.regsize, info->io.regspacing, + info->irq); + + if(add_smi(info)) + goto err_free; + + return 0; + + err_free: + kfree(info); + return -EINVAL; +} + +static void __devexit ipmi_pnp_remove(struct pnp_dev *dev) +{ + struct smi_info *info = pnp_get_drvdata(dev); + + cleanup_one_si(info); +} + +static const struct pnp_device_id pnp_dev_table[] = { + {"IPI0001", 0}, + {"", 0}, +}; + +static struct pnp_driver ipmi_pnp_driver = { + .name = DEVICE_NAME, + .probe = ipmi_pnp_probe, + .remove = __devexit_p(ipmi_pnp_remove), + .id_table = pnp_dev_table, +}; #endif #ifdef CONFIG_DMI -struct dmi_ipmi_data -{ +struct dmi_ipmi_data { u8 type; u8 addr_space; unsigned long base_addr; @@ -2125,21 +2428,21 @@ static int __devinit decode_dmi(const struct dmi_header *dm, /* I/O */ base_addr &= 0xFFFE; dmi->addr_space = IPMI_IO_ADDR_SPACE; - } - else { + } else /* Memory */ dmi->addr_space = IPMI_MEM_ADDR_SPACE; - } + /* If bit 4 of byte 0x10 is set, then the lsb for the address is odd. */ dmi->base_addr = base_addr | ((data[0x10] & 0x10) >> 4); #if defined(__VMKLNX__) || 1 //Generic update to handle DMI IRQ /* - 1/27/2012: PR 715507 - Updated to handle DMI IRQ. Verifies if - IRQ has been configured in SMBIOS before setting up the - interrupt vector. - */ + * 1/27/2012: PR 715507 + * Updated to handle DMI IRQ. Verifies if + * IRQ has been configured in SMBIOS before setting up the + * interrupt vector. + */ //Set to operate in polling mode by default dmi->irq = 0; @@ -2149,30 +2452,44 @@ static int __devinit decode_dmi(const struct dmi_header *dm, //Set to default value dmi->irq = data[0x11]; - printk(KERN_INFO "ipmi_si: Found SMBIOS configured BMC IRQ %d\n", data[0x11]); -#if defined(__VMKLNX__) //Handle ISA IRQ for vmkernel + printk(KERN_INFO PFX + "Found SMBIOS configured BMC IRQ %d\n", + data[0x11]); + #if defined(__VMKLNX__) //Handle ISA IRQ for vmkernel //Verify if the configured IRQ is indeed as ISA IRQ if(data[0x11] > 0 && data[0x11] < 16) { //ISA IRQ is setup. Get the vector dmi->irq = vmklnx_convert_isa_irq(data[0x11]); - printk(KERN_INFO "ipmi_si: ISA IRQ %d mapped to VMK vector %d\n", data[0x11], dmi->irq); + printk(KERN_INFO PFX + "ISA IRQ %d mapped to VMK vector %d\n", + data[0x11], dmi->irq); //Verify if a valid VMK vector was received if(dmi->irq == 0){ //Warn in case we get an invalid vector - printk(KERN_WARNING "ipmi_si: Did not get a valid VMK vector for ISA IRQ %d." - "Reverting driver to polling mode\n", data[0x11]); + printk(KERN_WARNING PFX + "Did not get a valid VMK vector" + " for ISA IRQ %d. Reverting" + " driver to polling mode\n", + data[0x11]); } } else { - //For non-ISA IRQs, IRQ value matches the interrupt vector - printk(KERN_INFO "ipmi_si: BMC configured to use non-ISA IRQ %d\n", data[0x11]); + /* + * For non-ISA IRQs, IRQ value + * matches the interrupt vector + */ + printk(KERN_INFO PFX + "BMC configured to use" + " non-ISA IRQ %d\n", data[0x11]); } -#endif //Handle ISA IRQ for vmkernel + #endif //Handle ISA IRQ for vmkernel } else { //No interrupts setup - printk(KERN_INFO "ipmi_si: No BMC IRQ configured in SMBIOS. Operating in polling mode\n"); + printk(KERN_INFO PFX + "No BMC IRQ configured in SMBIOS." + " Operating in polling mode\n"); } #else dmi->irq = data[0x11]; @@ -2180,7 +2497,7 @@ static int __devinit decode_dmi(const struct dmi_header *dm, /* The top two bits of byte 0x10 hold the register spacing. */ reg_spacing = (data[0x10] & 0xC0) >> 6; - switch(reg_spacing){ + switch(reg_spacing) { case 0x00: /* Byte boundaries */ dmi->offset = 1; break; @@ -2196,12 +2513,14 @@ static int __devinit decode_dmi(const struct dmi_header *dm, } } else { /* Old DMI spec. */ - /* Note that technically, the lower bit of the base + /* + * Note that technically, the lower bit of the base * address should be 1 if the address is I/O and 0 if * the address is in memory. So many systems get that * wrong (and all that I have seen are I/O) so we just * ignore that bit and assume I/O. Systems that use - * memory should use the newer spec, anyway. */ + * memory should use the newer spec, anyway. + */ dmi->base_addr = base_addr & 0xfffe; dmi->addr_space = IPMI_IO_ADDR_SPACE; dmi->offset = 1; @@ -2212,18 +2531,18 @@ static int __devinit decode_dmi(const struct dmi_header *dm, return 0; } -static __devinit void try_init_dmi(struct dmi_ipmi_data *ipmi_data) +static void __devinit try_init_dmi(struct dmi_ipmi_data *ipmi_data) { struct smi_info *info; - info = kzalloc(sizeof(*info), GFP_KERNEL); + info = smi_info_alloc(); if (!info) { - printk(KERN_ERR - "ipmi_si: Could not allocate SI data\n"); + printk(KERN_ERR PFX "Could not allocate SI data\n"); return; } - info->addr_source = "SMBIOS"; + info->addr_source = SI_SMBIOS; + printk(KERN_INFO PFX "probing via SMBIOS\n"); switch (ipmi_data->type) { case 0x01: /* KCS */ @@ -2253,8 +2572,7 @@ static __devinit void try_init_dmi(struct dmi_ipmi_data *ipmi_data) default: kfree(info); - printk(KERN_WARNING - "ipmi_si: Unknown SMBIOS I/O Address type: %d.\n", + printk(KERN_WARNING PFX "Unknown SMBIOS I/O Address type: %d\n", ipmi_data->addr_space); return; } @@ -2272,7 +2590,13 @@ static __devinit void try_init_dmi(struct dmi_ipmi_data *ipmi_data) if (info->irq) info->irq_setup = std_irq_setup; - try_smi_init(info); + pr_info("ipmi_si: SMBIOS: %s %#lx regsize %d spacing %d irq %d\n", + (info->io.addr_type == IPMI_IO_ADDR_SPACE) ? "io" : "mem", + info->io.addr_data, info->io.regsize, info->io.regspacing, + info->irq); + + if(add_smi(info)) + kfree(info); } static void __devinit dmi_find_bmc(void) @@ -2317,13 +2641,13 @@ static int __devinit ipmi_pci_probe(struct pci_dev *pdev, int rv; int class_type = pdev->class & PCI_ERMC_CLASSCODE_TYPE_MASK; struct smi_info *info; - int first_reg_offset = 0; - info = kzalloc(sizeof(*info), GFP_KERNEL); + info = smi_info_alloc(); if (!info) return -ENOMEM; - info->addr_source = "PCI"; + info->addr_source = SI_PCI; + dev_info(&pdev->dev, "probing via PCI"); switch (class_type) { case PCI_ERMC_CLASSCODE_TYPE_SMIC: @@ -2340,15 +2664,13 @@ static int __devinit ipmi_pci_probe(struct pci_dev *pdev, default: kfree(info); - printk(KERN_INFO "ipmi_si: %s: Unknown IPMI type: %d\n", - pci_name(pdev), class_type); + dev_info(&pdev->dev, "Unknown IPMI type: %d\n", class_type); return -ENOMEM; } rv = pci_enable_device(pdev); if (rv) { - printk(KERN_ERR "ipmi_si: %s: couldn't enable PCI device\n", - pci_name(pdev)); + dev_err(&pdev->dev, "Couldn't enable PCI device\n"); kfree(info); return rv; } @@ -2356,9 +2678,6 @@ static int __devinit ipmi_pci_probe(struct pci_dev *pdev, info->addr_source_cleanup = ipmi_pci_cleanup; info->addr_source_data = pdev; - if (pdev->subsystem_vendor == PCI_HP_VENDOR_ID) - first_reg_offset = 1; - if (pci_resource_flags(pdev, 0) & IORESOURCE_IO) { info->io_setup = port_setup; info->io.addr_type = IPMI_IO_ADDR_SPACE; @@ -2383,13 +2702,20 @@ static int __devinit ipmi_pci_probe(struct pci_dev *pdev, info->dev = &pdev->dev; pci_set_drvdata(pdev, info); - return try_smi_init(info); + dev_info(&pdev->dev, "%pR regsize %d spacing %d irq %d\n", + &pdev->resource[0], info->io.regsize, info->io.regspacing, + info->irq); + + if(add_smi(info)) + kfree(info); + + return 0; } static void __devexit ipmi_pci_remove(struct pci_dev *pdev) { struct smi_info *info = pci_get_drvdata(pdev); - cleanup_one_si(info); + cleanup_one_si(info); } #if defined(__VMKLNX__) @@ -2401,19 +2727,7 @@ static int ipmi_notify_reboot(struct notifier_block *nb, list_for_each_entry_safe(e, tmp_e, &smi_infos, link) cleanup_one_si(e); mutex_unlock(&smi_infos_lock); - return NOTIFY_DONE; -} -#endif - -#ifdef CONFIG_PM -static int ipmi_pci_suspend(struct pci_dev *pdev, pm_message_t state) -{ - return 0; -} - -static int ipmi_pci_resume(struct pci_dev *pdev) -{ - return 0; + return NOTIFY_DONE; } #endif @@ -2425,30 +2739,30 @@ static struct pci_device_id ipmi_pci_devices[] = { MODULE_DEVICE_TABLE(pci, ipmi_pci_devices); static struct pci_driver ipmi_pci_driver = { - .name = DEVICE_NAME, - .id_table = ipmi_pci_devices, - .probe = ipmi_pci_probe, - .remove = __devexit_p(ipmi_pci_remove), -#ifdef CONFIG_PM - .suspend = ipmi_pci_suspend, - .resume = ipmi_pci_resume, -#endif + .name = DEVICE_NAME, + .id_table = ipmi_pci_devices, + .probe = ipmi_pci_probe, + .remove = __devexit_p(ipmi_pci_remove), }; #endif /* CONFIG_PCI */ - -#ifdef CONFIG_PPC_OF -static int __devinit ipmi_of_probe(struct of_device *dev, - const struct of_device_id *match) +static struct of_device_id ipmi_match[]; +static int __devinit ipmi_probe(struct platform_device *dev) { +#ifdef CONFIG_OF + const struct of_device_id *match; struct smi_info *info; struct resource resource; - const int *regsize, *regspacing, *regshift; - struct device_node *np = dev->node; + const __be32 *regsize, *regspacing, *regshift; + struct device_node *np = dev->dev.of_node; int ret; int proplen; - dev_info(&dev->dev, PFX "probing via device tree\n"); + dev_info(&dev->dev, "probing via device tree\n"); + + match = of_match_device(ipmi_match, &dev->dev); + if (!match) + return -EINVAL; ret = of_address_to_resource(np, 0, &resource); if (ret) { @@ -2474,105 +2788,130 @@ static int __devinit ipmi_of_probe(struct of_device *dev, return -EINVAL; } - info = kzalloc(sizeof(*info), GFP_KERNEL); + info = smi_info_alloc(); if (!info) { dev_err(&dev->dev, - PFX "could not allocate memory for OF probe\n"); + "Could not allocate memory for OF probe\n"); return -ENOMEM; } info->si_type = (enum si_type) match->data; - info->addr_source = "device-tree"; - info->io_setup = mem_setup; + info->addr_source = SI_DEVICETREE; info->irq_setup = std_irq_setup; - info->io.addr_type = IPMI_MEM_ADDR_SPACE; + if (resource.flags & IORESOURCE_IO) { + info->io_setup = port_setup; + info->io.addr_type = IPMI_IO_ADDR_SPACE; + } else { + info->io_setup = mem_setup; + info->io.addr_type = IPMI_MEM_ADDR_SPACE; + } + info->io.addr_data = resource.start; - info->io.regsize = regsize ? *regsize : DEFAULT_REGSIZE; - info->io.regspacing = regspacing ? *regspacing : DEFAULT_REGSPACING; - info->io.regshift = regshift ? *regshift : 0; + info->io.regsize = regsize ? be32_to_cpup(regsize) : DEFAULT_REGSIZE; + info->io.regspacing = regspacing ? be32_to_cpup(regspacing) : DEFAULT_REGSPACING; + info->io.regshift = regshift ? be32_to_cpup(regshift) : 0; - info->irq = irq_of_parse_and_map(dev->node, 0); + info->irq = irq_of_parse_and_map(dev->dev_of.node, 0); info->dev = &dev->dev; - dev_dbg(&dev->dev, "addr 0x%lx regsize %d spacing %d irq %x\n", + dev_dbg(&dev->dev, "Addr 0x%lx regsize %d spacing %d irq %x\n", info->io.addr_data, info->io.regsize, info->io.regspacing, info->irq); - dev->dev.driver_data = (void*) info; + dev_set_drvdata(&dev->dev, info); - return try_smi_init(info); + if(add_smi(info)) { + kfree(info); + return -EBUSY; + } +#endif + return 0; } -static int __devexit ipmi_of_remove(struct of_device *dev) +static int __devexit ipmi_remove(struct platform_device *dev) { - cleanup_one_si(dev->dev.driver_data); +#ifdef CONFIG_OF + cleanup_one_si(dev_get_drvdata(&dev->dev)); +#endif return 0; } static struct of_device_id ipmi_match[] = { - { .type = "ipmi", .compatible = "ipmi-kcs", .data = (void *)(unsigned long) SI_KCS }, - { .type = "ipmi", .compatible = "ipmi-smic", .data = (void *)(unsigned long) SI_SMIC }, - { .type = "ipmi", .compatible = "ipmi-bt", .data = (void *)(unsigned long) SI_BT }, + { .type = "ipmi", .compatible = "ipmi-kcs", + .data = (void *)(unsigned long) SI_KCS }, + { .type = "ipmi", .compatible = "ipmi-smic", + .data = (void *)(unsigned long) SI_SMIC }, + { .type = "ipmi", .compatible = "ipmi-bt", + .data = (void *)(unsigned long) SI_BT }, {}, }; -static struct of_platform_driver ipmi_of_platform_driver = -{ - .name = "ipmi", - .match_table = ipmi_match, - .probe = ipmi_of_probe, - .remove = __devexit_p(ipmi_of_remove), +static struct platform_driver ipmi_driver = { + .driver = { + .name = DEVICE_NAME, + .owner = THIS_MODULE, +#if !defined(__VMKLNX__) + .of_match_table = ipmi_match, +#endif + }, + .probe = ipmi_probe, + .remove = __devexit_p(ipmi_remove), }; -#endif /* CONFIG_PPC_OF */ +static int wait_for_msg_done(struct smi_info *smi_info) +{ + enum si_sm_result smi_result; + + smi_result = smi_info->handlers->event(smi_info->si_sm, 0); + for (;;) { + if (smi_result == SI_SM_CALL_WITH_DELAY || + smi_result == SI_SM_CALL_WITH_TICK_DELAY) { + schedule_timeout_uninterruptible(1); + smi_result = smi_info->handlers->event( + smi_info->si_sm, 100); + } else if (smi_result == SI_SM_CALL_WITHOUT_DELAY) { + smi_result = smi_info->handlers->event( + smi_info->si_sm, 0); + } else + break; + } + if (smi_result == SI_SM_HOSED) + /* + * We couldn't get the state machine to run, so whatever's at + * the port is probably not an IPMI SMI interface. + */ + return -ENODEV; + + return 0; +} static int try_get_dev_id(struct smi_info *smi_info) { unsigned char msg[2]; unsigned char *resp; unsigned long resp_len; - enum si_sm_result smi_result; int rv = 0; resp = kmalloc(IPMI_MAX_MSG_LENGTH, GFP_KERNEL); if (!resp) return -ENOMEM; - /* Do a Get Device ID command, since it comes back with some - useful info. */ + /* + * Do a Get Device ID command, since it comes back with some + * useful info. + */ msg[0] = IPMI_NETFN_APP_REQUEST << 2; msg[1] = IPMI_GET_DEVICE_ID_CMD; smi_info->handlers->start_transaction(smi_info->si_sm, msg, 2); - smi_result = smi_info->handlers->event(smi_info->si_sm, 0); - for (;;) - { - if (smi_result == SI_SM_CALL_WITH_DELAY || - smi_result == SI_SM_CALL_WITH_TICK_DELAY) { - schedule_timeout_uninterruptible(1); - smi_result = smi_info->handlers->event( - smi_info->si_sm, 100); - } - else if (smi_result == SI_SM_CALL_WITHOUT_DELAY) - { - smi_result = smi_info->handlers->event( - smi_info->si_sm, 0); - } - else - break; - } - if (smi_result == SI_SM_HOSED) { - /* We couldn't get the state machine to run, so whatever's at - the port is probably not an IPMI SMI interface. */ - rv = -ENODEV; + rv = wait_for_msg_done(smi_info); + if (rv) goto out; - } - /* Otherwise, we got some data. */ resp_len = smi_info->handlers->get_result(smi_info->si_sm, resp, IPMI_MAX_MSG_LENGTH); @@ -2584,56 +2923,151 @@ static int try_get_dev_id(struct smi_info *smi_info) return rv; } -static int type_file_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) +static int try_enable_event_buffer(struct smi_info *smi_info) { - struct smi_info *smi = data; + unsigned char msg[3]; + unsigned char *resp; + unsigned long resp_len; + int rv = 0; - return sprintf(page, "%s\n", si_to_str[smi->si_type]); + resp = kmalloc(IPMI_MAX_MSG_LENGTH, GFP_KERNEL); + if (!resp) + return -ENOMEM; + + msg[0] = IPMI_NETFN_APP_REQUEST << 2; + msg[1] = IPMI_GET_BMC_GLOBAL_ENABLES_CMD; + smi_info->handlers->start_transaction(smi_info->si_sm, msg, 2); + + rv = wait_for_msg_done(smi_info); + if (rv) { + printk(KERN_WARNING PFX "Error getting response from get" + " global enables command, the event buffer is not" + " enabled.\n"); + goto out; + } + + resp_len = smi_info->handlers->get_result(smi_info->si_sm, + resp, IPMI_MAX_MSG_LENGTH); + + if (resp_len < 4 || + resp[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2 || + resp[1] != IPMI_GET_BMC_GLOBAL_ENABLES_CMD || + resp[2] != 0) { + printk(KERN_WARNING PFX "Invalid return from get global" + " enables command, cannot enable the event buffer.\n"); + rv = -EINVAL; + goto out; + } + + if (resp[3] & IPMI_BMC_EVT_MSG_BUFF) + /* buffer is already enabled, nothing to do. */ + goto out; + + msg[0] = IPMI_NETFN_APP_REQUEST << 2; + msg[1] = IPMI_SET_BMC_GLOBAL_ENABLES_CMD; + msg[2] = resp[3] | IPMI_BMC_EVT_MSG_BUFF; + smi_info->handlers->start_transaction(smi_info->si_sm, msg, 3); + + rv = wait_for_msg_done(smi_info); + if (rv) { + printk(KERN_WARNING PFX "Error getting response from set" + " global enables command, the event buffer is not" + " enabled.\n"); + goto out; + } + + resp_len = smi_info->handlers->get_result(smi_info->si_sm, + resp, IPMI_MAX_MSG_LENGTH); + + if (resp_len < 3 || + resp[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2 || + resp[1] != IPMI_SET_BMC_GLOBAL_ENABLES_CMD) { + printk(KERN_WARNING PFX "Invalid return from get global," + "enables command, not enable the event buffer.\n"); + rv = -EINVAL; + goto out; + } + + if (resp[2] != 0) + /* + * An error when setting the event buffer bit means + * that the event buffer is not supported. + */ + rv = -ENOENT; + out: + kfree(resp); + return rv; } -static int stat_file_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) +static int smi_type_proc_show(struct seq_file *m, void *v) { - char *out = (char *) page; - struct smi_info *smi = data; + struct smi_info *smi = m->private; - out += sprintf(out, "interrupts_enabled: %d\n", + return seq_printf(m, "%s\n", si_to_str[smi->si_type]); +} + +static int smi_type_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, smi_type_proc_show, PDE(inode)->data); +} + +static const struct file_operations smi_type_proc_ops = { + .open = smi_type_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int smi_si_stats_proc_show(struct seq_file *m, void *v) +{ + struct smi_info *smi = m->private; + + seq_printf(m, "interrupts_enabled: %d\n", smi->irq && !smi->interrupt_disabled); - out += sprintf(out, "short_timeouts: %ld\n", - smi->short_timeouts); - out += sprintf(out, "long_timeouts: %ld\n", - smi->long_timeouts); - out += sprintf(out, "timeout_restarts: %ld\n", - smi->timeout_restarts); - out += sprintf(out, "idles: %ld\n", - smi->idles); - out += sprintf(out, "interrupts: %ld\n", - smi->interrupts); - out += sprintf(out, "attentions: %ld\n", - smi->attentions); - out += sprintf(out, "flag_fetches: %ld\n", - smi->flag_fetches); - out += sprintf(out, "hosed_count: %ld\n", - smi->hosed_count); - out += sprintf(out, "complete_transactions: %ld\n", - smi->complete_transactions); - out += sprintf(out, "events: %ld\n", - smi->events); - out += sprintf(out, "watchdog_pretimeouts: %ld\n", - smi->watchdog_pretimeouts); - out += sprintf(out, "incoming_messages: %ld\n", - smi->incoming_messages); + seq_printf(m, "short_timeouts: %u\n", + smi_get_stat(smi, short_timeouts)); + seq_printf(m, "long_timeouts: %u\n", + smi_get_stat(smi, long_timeouts)); + seq_printf(m, "idles: %u\n", + smi_get_stat(smi, idles)); + seq_printf(m, "interrupts: %u\n", + smi_get_stat(smi, interrupts)); + seq_printf(m, "attentions: %u\n", + smi_get_stat(smi, attentions)); + seq_printf(m, "flag_fetches: %u\n", + smi_get_stat(smi, flag_fetches)); + seq_printf(m, "hosed_count: %u\n", + smi_get_stat(smi, hosed_count)); + seq_printf(m, "complete_transactions: %u\n", + smi_get_stat(smi, complete_transactions)); + seq_printf(m, "events: %u\n", + smi_get_stat(smi, events)); + seq_printf(m, "watchdog_pretimeouts: %u\n", + smi_get_stat(smi, watchdog_pretimeouts)); + seq_printf(m, "incoming_messages: %u\n", + smi_get_stat(smi, incoming_messages)); - return out - page; + return 0; } -static int param_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) +static int smi_si_stats_proc_open(struct inode *inode, struct file *file) { - struct smi_info *smi = data; + return single_open(file, smi_si_stats_proc_show, PDE(inode)->data); +} - return sprintf(page, +static const struct file_operations smi_si_stats_proc_ops = { + .open = smi_si_stats_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int smi_params_proc_show(struct seq_file *m, void *v) +{ + + struct smi_info *smi = m->private; + + return seq_printf(m, "%s,%s,0x%lx,rsp=%d,rsi=%d,rsh=%d,irq=%d,ipmb=%d\n", si_to_str[smi->si_type], addr_space_to_str[smi->io.addr_type], @@ -2645,6 +3079,18 @@ static int param_read_proc(char *page, char **start, off_t off, smi->slave_addr); } +static int smi_params_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, smi_params_proc_show, PDE(inode)->data); +} + +static const struct file_operations smi_params_proc_ops = { + .open = smi_params_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + /* * oem_data_avail_to_receive_msg_avail * @info - smi_info structure with msg_flags set @@ -2655,7 +3101,7 @@ static int param_read_proc(char *page, char **start, off_t off, static int oem_data_avail_to_receive_msg_avail(struct smi_info *smi_info) { smi_info->msg_flags = ((smi_info->msg_flags & ~OEM_DATA_AVAIL) | - RECEIVE_MSG_AVAIL); + RECEIVE_MSG_AVAIL); return 1; } @@ -2697,10 +3143,9 @@ static void setup_dell_poweredge_oem_data_handler(struct smi_info *smi_info) id->ipmi_version == DELL_POWEREDGE_8G_BMC_IPMI_VERSION) { smi_info->oem_data_avail_handler = oem_data_avail_to_receive_msg_avail; - } - else if (ipmi_version_major(id) < 1 || - (ipmi_version_major(id) == 1 && - ipmi_version_minor(id) < 5)) { + } else if (ipmi_version_major(id) < 1 || + (ipmi_version_major(id) == 1 && + ipmi_version_minor(id) < 5)) { smi_info->oem_data_avail_handler = oem_data_avail_to_receive_msg_avail; } @@ -2712,7 +3157,7 @@ static void return_hosed_msg_badsize(struct smi_info *smi_info) { struct ipmi_smi_msg *msg = smi_info->curr_msg; - /* Make it a reponse */ + /* Make it a response */ msg->rsp[0] = msg->data[0] | 4; msg->rsp[1] = msg->data[1]; msg->rsp[2] = CANNOT_RETURN_REQUESTED_LENGTH; @@ -2752,7 +3197,7 @@ static int dell_poweredge_bt_xaction_handler(struct notifier_block *self, } static struct notifier_block dell_poweredge_bt_xaction_notifier = { - .notifier_call = dell_poweredge_bt_xaction_handler, + .notifier_call = dell_poweredge_bt_xaction_handler, }; /* @@ -2792,8 +3237,10 @@ static void setup_xaction_handlers(struct smi_info *smi_info) static inline void wait_for_timer_and_thread(struct smi_info *smi_info) { if (smi_info->intf) { - /* The timer and thread are only running if the - interface has been started up and registered. */ + /* + * The timer and thread are only running if the + * interface has been started up and registered. + */ if (smi_info->thread != NULL) kthread_stop(smi_info->thread); del_timer_sync(&smi_info->si_timer); @@ -2812,7 +3259,7 @@ static __devinitdata struct ipmi_default_vals { .port = 0 } }; -static __devinit void default_find_bmc(void) +static void __devinit default_find_bmc(void) { struct smi_info *info; int i; @@ -2821,16 +3268,17 @@ static __devinit void default_find_bmc(void) if (!ipmi_defaults[i].port) break; - info = kzalloc(sizeof(*info), GFP_KERNEL); - if (!info) - return; - -#ifdef CONFIG_PPC_MERGE +#ifdef CONFIG_PPC if (check_legacy_ioport(ipmi_defaults[i].port)) continue; #endif - info->addr_source = NULL; + info = smi_info_alloc(); + if (!info) + return; + + + info->addr_source = SI_DEFAULT; info->si_type = ipmi_defaults[i].type; info->io_setup = port_setup; @@ -2842,14 +3290,18 @@ static __devinit void default_find_bmc(void) info->io.regsize = DEFAULT_REGSPACING; info->io.regshift = 0; - if (try_smi_init(info) == 0) { - /* Found one... */ - printk(KERN_INFO "ipmi_si: Found default %s state" - " machine at %s address 0x%lx\n", - si_to_str[info->si_type], - addr_space_to_str[info->io.addr_type], - info->io.addr_data); - return; + if (add_smi(info) == 0) { + if((try_smi_init(info)) == 0) { + /* Found one... */ + printk(KERN_INFO PFX "Found default %s" + " state machine at %s address 0x%lx\n", + si_to_str[info->si_type], + addr_space_to_str[info->io.addr_type], + info->io.addr_data); + } else + cleanup_one_si(info); + } else { + kfree(info); } } } @@ -2868,33 +3320,48 @@ static int is_new_interface(struct smi_info *info) return 1; } -static int try_smi_init(struct smi_info *new_smi) +static int add_smi(struct smi_info *new_smi) { - int rv; - - if (new_smi->addr_source) { - printk(KERN_INFO "ipmi_si: Trying %s-specified %s state" - " machine at %s address 0x%lx, slave address 0x%x," - " irq %d\n", - new_smi->addr_source, - si_to_str[new_smi->si_type], - addr_space_to_str[new_smi->io.addr_type], - new_smi->io.addr_data, - new_smi->slave_addr, new_smi->irq); - } + int rv = 0; + printk(KERN_INFO PFX "Adding %s-specified %s state machine\n", + ipmi_addr_src_to_str[new_smi->addr_source], + si_to_str[new_smi->si_type]); mutex_lock(&smi_infos_lock); if (!is_new_interface(new_smi)) { - printk(KERN_WARNING "ipmi_si: duplicate interface\n"); + printk(KERN_CONT " Duplicate interface\n"); rv = -EBUSY; goto out_err; } + printk(KERN_CONT "\n"); + /* So we know not to free it unless we have allocated one. */ new_smi->intf = NULL; new_smi->si_sm = NULL; new_smi->handlers = NULL; + list_add_tail(&new_smi->link, &smi_infos); + + out_err: + mutex_unlock(&smi_infos_lock); + return rv; +} + +static int try_smi_init(struct smi_info *new_smi) +{ + int rv = 0; + int i; + + printk(KERN_INFO PFX "Trying %s-specified %s state" + " machine at %s address 0x%lx, slave address 0x%x," + " irq %d\n", + ipmi_addr_src_to_str[new_smi->addr_source], + si_to_str[new_smi->si_type], + addr_space_to_str[new_smi->io.addr_type], + new_smi->io.addr_data, + new_smi->slave_addr, new_smi->irq); + switch (new_smi->si_type) { case SI_KCS: new_smi->handlers = &kcs_smi_handlers; @@ -2917,7 +3384,8 @@ static int try_smi_init(struct smi_info *new_smi) /* Allocate the state machine's data and initialize it. */ new_smi->si_sm = kmalloc(new_smi->handlers->size(), GFP_KERNEL); if (!new_smi->si_sm) { - printk(" Could not allocate state machine memory\n"); + printk(KERN_ERR PFX + "Could not allocate state machine memory\n"); rv = -ENOMEM; goto out_err; } @@ -2927,29 +3395,26 @@ static int try_smi_init(struct smi_info *new_smi) /* Now that we know the I/O size, we can set up the I/O. */ rv = new_smi->io_setup(new_smi); if (rv) { - printk(" Could not set up I/O space\n"); + printk(KERN_ERR PFX "Could not set up I/O space\n"); goto out_err; } - spin_lock_init(&(new_smi->si_lock)); - spin_lock_init(&(new_smi->msg_lock)); - spin_lock_init(&(new_smi->count_lock)); - /* Do low-level detection first. */ if (new_smi->handlers->detect(new_smi->si_sm)) { if (new_smi->addr_source) - printk(KERN_INFO "ipmi_si: Interface detection" - " failed\n"); + printk(KERN_INFO PFX "Interface detection failed\n"); rv = -ENODEV; goto out_err; } - /* Attempt a get device id command. If it fails, we probably - don't have a BMC here. */ + /* + * Attempt a get device id command. If it fails, we probably + * don't have a BMC here. + */ rv = try_get_dev_id(new_smi); if (rv) { if (new_smi->addr_source) - printk(KERN_INFO "ipmi_si: There appears to be no BMC" + printk(KERN_INFO PFX "There appears to be no BMC" " at this location\n"); goto out_err; } @@ -2962,38 +3427,46 @@ static int try_smi_init(struct smi_info *new_smi) new_smi->curr_msg = NULL; atomic_set(&new_smi->req_events, 0); new_smi->run_to_completion = 0; + for (i = 0; i < SI_NUM_STATS; i++) + atomic_set(&new_smi->stats[i], 0); - new_smi->interrupt_disabled = 0; + new_smi->interrupt_disabled = 1; atomic_set(&new_smi->stop_operation, 0); new_smi->intf_num = smi_num; smi_num++; - /* Start clearing the flags before we enable interrupts or the - timer to avoid racing with the timer. */ + rv = try_enable_event_buffer(new_smi); + if (rv == 0) + new_smi->has_event_buffer = 1; + + /* + * Start clearing the flags before we enable interrupts or the + * timer to avoid racing with the timer. + */ start_clear_flags(new_smi); /* IRQ is defined to be set when non-zero. */ if (new_smi->irq) new_smi->si_state = SI_CLEARING_FLAGS_THEN_SET_IRQ; if (!new_smi->dev) { - /* If we don't already have a device from something - * else (like PCI), then register a new one. */ + /* + * If we don't already have a device from something + * else (like PCI), then register a new one. + */ new_smi->pdev = platform_device_alloc("ipmi_si", new_smi->intf_num); - if (rv) { - printk(KERN_ERR - "ipmi_si_intf:" - " Unable to allocate platform device\n"); + if (!new_smi->pdev) { + printk(KERN_ERR PFX + "Unable to allocate platform device\n"); goto out_err; } new_smi->dev = &new_smi->pdev->dev; - new_smi->dev->driver = &ipmi_driver; + new_smi->dev->driver = &ipmi_driver.driver; rv = platform_device_add(new_smi->pdev); if (rv) { - printk(KERN_ERR - "ipmi_si_intf:" - " Unable to register system interface device:" + printk(KERN_ERR PFX + "Unable to register system interface device:" " %d\n", rv); goto out_err; @@ -3008,47 +3481,37 @@ static int try_smi_init(struct smi_info *new_smi) "bmc", new_smi->slave_addr); if (rv) { - printk(KERN_ERR - "ipmi_si: Unable to register device: error %d\n", - rv); + dev_err(new_smi->dev, "Unable to register device: error %d\n", + rv); goto out_err_stop_timer; } rv = ipmi_smi_add_proc_entry(new_smi->intf, "type", - type_file_read_proc, NULL, - new_smi, THIS_MODULE); + &smi_type_proc_ops, + new_smi); if (rv) { - printk(KERN_ERR - "ipmi_si: Unable to create proc entry: %d\n", - rv); + dev_err(new_smi->dev, "Unable to create proc entry: %d\n", rv); goto out_err_stop_timer; } rv = ipmi_smi_add_proc_entry(new_smi->intf, "si_stats", - stat_file_read_proc, NULL, - new_smi, THIS_MODULE); + &smi_si_stats_proc_ops, + new_smi); if (rv) { - printk(KERN_ERR - "ipmi_si: Unable to create proc entry: %d\n", - rv); + dev_err(new_smi->dev, "Unable to create proc entry: %d\n", rv); goto out_err_stop_timer; } rv = ipmi_smi_add_proc_entry(new_smi->intf, "params", - param_read_proc, NULL, - new_smi, THIS_MODULE); + &smi_params_proc_ops, + new_smi); if (rv) { - printk(KERN_ERR - "ipmi_si: Unable to create proc entry: %d\n", - rv); + dev_err(new_smi->dev, "Unable to create proc entry: %d\n", rv); goto out_err_stop_timer; } - list_add_tail(&new_smi->link, &smi_infos); - - mutex_unlock(&smi_infos_lock); - - printk(KERN_INFO "IPMI %s interface initialized\n",si_to_str[new_smi->si_type]); + dev_info(new_smi->dev, "IPMI %s interface initialized\n", + si_to_str[new_smi->si_type]); return 0; @@ -3057,53 +3520,64 @@ static int try_smi_init(struct smi_info *new_smi) wait_for_timer_and_thread(new_smi); out_err: - if (new_smi->intf) + new_smi->interrupt_disabled = 1; + + if(new_smi->intf) { ipmi_unregister_smi(new_smi->intf); + new_smi->intf = NULL; + } - if (new_smi->irq_cleanup) + if (new_smi->irq_cleanup) { new_smi->irq_cleanup(new_smi); + new_smi->irq_cleanup = NULL; + } - /* Wait until we know that we are out of any interrupt - handlers might have been running before we freed the - interrupt. */ + /* + * Wait until we know that we are out of any interrupt + * handlers might have been running before we freed the + * interrupt. + */ synchronize_sched(); if (new_smi->si_sm) { if (new_smi->handlers) new_smi->handlers->cleanup(new_smi->si_sm); kfree(new_smi->si_sm); + new_smi->si_sm = NULL; } - if (new_smi->addr_source_cleanup) + if (new_smi->addr_source_cleanup) { new_smi->addr_source_cleanup(new_smi); - if (new_smi->io_cleanup) + new_smi->addr_source_cleanup = NULL; + } + if (new_smi->io_cleanup) { new_smi->io_cleanup(new_smi); + new_smi->io_cleanup = NULL; + } - if (new_smi->dev_registered) + if (new_smi->dev_registered) { platform_device_unregister(new_smi->pdev); - - kfree(new_smi); - - mutex_unlock(&smi_infos_lock); + new_smi->dev_registered = 0; + } return rv; } -static __devinit int init_ipmi_si(void) +static int __devinit init_ipmi_si(void) { int i; char *str; int rv; + struct smi_info *e; + enum ipmi_addr_src type = SI_INVALID; if (initialized) return 0; initialized = 1; /* Register the device drivers. */ - rv = driver_register(&ipmi_driver); + rv = platform_driver_register(&ipmi_driver); if (rv) { - printk(KERN_ERR - "init_ipmi_si: Unable to register driver: %d\n", - rv); + printk(KERN_ERR PFX "Unable to register driver: %d\n", rv); return rv; } @@ -3125,28 +3599,69 @@ static __devinit int init_ipmi_si(void) printk(KERN_INFO "IPMI System Interface driver.\n"); - hardcode_find_bmc(); + /* If the user gave us a device, they presumably want us to use it */ + if (!hardcode_find_bmc()) + return 0; + +#ifdef CONFIG_PCI + rv = pci_register_driver(&ipmi_pci_driver); + if (rv) + printk(KERN_ERR PFX "Unable to register PCI driver: %d\n", rv); + else + pci_registered = 1; +#endif + +#ifdef CONFIG_ACPI + pnp_register_driver(&ipmi_pnp_driver); + pnp_registered = 1; +#endif #ifdef CONFIG_DMI dmi_find_bmc(); #endif #ifdef CONFIG_ACPI - acpi_find_bmc(); + spmi_find_bmc(); #endif -#ifdef CONFIG_PCI - rv = pci_register_driver(&ipmi_pci_driver); - if (rv){ - printk(KERN_ERR - "init_ipmi_si: Unable to register PCI driver: %d\n", - rv); + /* We prefer devices with interrupts, but in the case of a machine + * with multiple BMCs we assume that there will be several instances + * of a given type so if we succeed in registering a type then also + * try to register everything else of the same type + */ + + mutex_lock(&smi_infos_lock); + list_for_each_entry(e, &smi_infos, link) { + /* Try to register a device if it has an IRQ and we either + * haven't successfully registered a device yet or this + * device has the same type as one we successfully registered + */ + if (e->irq && (!type || e->addr_source == type)) { + if(!try_smi_init(e)) { + type = e->addr_source; + } + } } -#endif -#ifdef CONFIG_PPC_OF - of_register_platform_driver(&ipmi_of_platform_driver); -#endif + /* type will only have been set if we successfully registered an si */ + if (type) { + mutex_unlock(&smi_infos_lock); + return 0; + } + + /* Fall back to the preferred device */ + + list_for_each_entry(e, &smi_infos, link) { + if (!e->irq && (!type || e->addr_source == type)) { + if (!try_smi_init(e)) { + type = e->addr_source; + } + } + } + mutex_unlock(&smi_infos_lock); + + if(type) + return 0; if (si_trydefaults) { mutex_lock(&smi_infos_lock); @@ -3154,23 +3669,16 @@ static __devinit int init_ipmi_si(void) /* No BMC was found, try defaults. */ mutex_unlock(&smi_infos_lock); default_find_bmc(); - } else { + } else mutex_unlock(&smi_infos_lock); - } } mutex_lock(&smi_infos_lock); if (unload_when_empty && list_empty(&smi_infos)) { mutex_unlock(&smi_infos_lock); -#ifdef CONFIG_PCI - pci_unregister_driver(&ipmi_pci_driver); -#endif - -#ifdef CONFIG_PPC_OF - of_unregister_platform_driver(&ipmi_of_platform_driver); -#endif - driver_unregister(&ipmi_driver); - printk("ipmi_si: Unable to find any System Interface(s)\n"); + cleanup_ipmi_si(); + printk(KERN_WARNING PFX + "Unable to find any System Interface(s)\n"); return -ENODEV; } else { #if defined(__VMKLNX__) @@ -3184,11 +3692,12 @@ module_init(init_ipmi_si); static void cleanup_one_si(struct smi_info *to_clean) { - int rv; + int rv = 0; unsigned long flags; #if defined(__VMKLNX__) /* Timeout after 5 seconds if the h/w does not respond */ - vmk_TimerCycles deadline = vmk_GetTimerCycles() + (5 * vmk_TimerCyclesPerSecond()); + vmk_TimerCycles deadline = vmk_GetTimerCycles() + + (5 * vmk_TimerCyclesPerSecond()); #endif if (!to_clean) return; @@ -3198,13 +3707,17 @@ static void cleanup_one_si(struct smi_info *to_clean) /* Tell the driver that we are shutting down. */ atomic_inc(&to_clean->stop_operation); - /* Make sure the timer and thread are stopped and will not run - again. */ + /* + * Make sure the timer and thread are stopped and will not run + * again. + */ wait_for_timer_and_thread(to_clean); - /* Timeouts are stopped, now make sure the interrupts are off - for the device. A little tricky with locks to make sure - there are no races. */ + /* + * Timeouts are stopped, now make sure the interrupts are off + * for the device. A little tricky with locks to make sure + * there are no races. + */ spin_lock_irqsave(&to_clean->si_lock, flags); while (to_clean->curr_msg || (to_clean->si_state != SI_NORMAL)) { #if defined(__VMKLNX__) @@ -3214,11 +3727,13 @@ static void cleanup_one_si(struct smi_info *to_clean) spin_unlock_irqrestore(&to_clean->si_lock, flags); poll(to_clean); #if defined(__VMKLNX__) - /* Do a timed wait as there is a possibility of losing - the wakeup as we are not passing in a lock. */ - vmk_WorldWait((vmk_WorldEventID)&to_clean->vmkEvent, - VMK_LOCK_INVALID, TEN_MSEC, - "Waiting for SMI events"); + /* + * Do a timed wait as there is a possibility of losing + * the wakeup as we are not passing in a lock. + */ + vmk_WorldWait((vmk_WorldEventID)&to_clean->vmkEvent, + VMK_LOCK_INVALID, TEN_MSEC, + "Waiting for SMI events"); #else schedule_timeout_uninterruptible(1); #endif @@ -3233,9 +3748,9 @@ static void cleanup_one_si(struct smi_info *to_clean) #endif poll(to_clean); #if defined(__VMKLNX__) - vmk_WorldWait((vmk_WorldEventID)&to_clean->vmkEvent, - VMK_LOCK_INVALID, TEN_MSEC, - "Waiting for SMI events"); + vmk_WorldWait((vmk_WorldEventID)&to_clean->vmkEvent, + VMK_LOCK_INVALID, TEN_MSEC, + "Waiting for SMI events"); #else schedule_timeout_uninterruptible(1); #endif @@ -3251,22 +3766,24 @@ static void cleanup_one_si(struct smi_info *to_clean) #endif poll(to_clean); #if defined(__VMKLNX__) - vmk_WorldWait((vmk_WorldEventID)&to_clean->vmkEvent, - VMK_LOCK_INVALID, TEN_MSEC, - "Waiting for SMI events"); + vmk_WorldWait((vmk_WorldEventID)&to_clean->vmkEvent, + VMK_LOCK_INVALID, TEN_MSEC, + "Waiting for SMI events"); #else schedule_timeout_uninterruptible(1); #endif } - rv = ipmi_unregister_smi(to_clean->intf); + if(to_clean->intf) + rv = ipmi_unregister_smi(to_clean->intf); + if (rv) { - printk(KERN_ERR - "ipmi_si: Unable to unregister device: errno=%d\n", + printk(KERN_ERR PFX "Unable to unregister device: errno=%d\n", rv); } - to_clean->handlers->cleanup(to_clean->si_sm); + if(to_clean->handlers) + to_clean->handlers->cleanup(to_clean->si_sm); kfree(to_clean->si_sm); @@ -3280,7 +3797,7 @@ static void cleanup_one_si(struct smi_info *to_clean) kfree(to_clean); } -static __exit void cleanup_ipmi_si(void) +static void cleanup_ipmi_si(void) { struct smi_info *e, *tmp_e; @@ -3292,25 +3809,28 @@ static __exit void cleanup_ipmi_si(void) #endif #ifdef CONFIG_PCI - pci_unregister_driver(&ipmi_pci_driver); + if (pci_registered) + pci_unregister_driver(&ipmi_pci_driver); #endif -#ifdef CONFIG_PPC_OF - of_unregister_platform_driver(&ipmi_of_platform_driver); +#ifdef CONFIG_ACPI + if (pnp_registered) + pnp_unregister_driver(&ipmi_pnp_driver); #endif + platform_driver_unregister(&ipmi_driver); + mutex_lock(&smi_infos_lock); list_for_each_entry_safe(e, tmp_e, &smi_infos, link) cleanup_one_si(e); mutex_unlock(&smi_infos_lock); - - driver_unregister(&ipmi_driver); } module_exit(cleanup_ipmi_si); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Corey Minyard "); -MODULE_DESCRIPTION("Interface to the IPMI driver for the KCS, SMIC, and BT system interfaces."); +MODULE_DESCRIPTION("Interface to the IPMI driver for the KCS, SMIC, and BT" + " system interfaces."); #if defined(__VMKLNX__) MODULE_VERSION(IPMI_DRIVER_VERSION); #endif diff --git a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.c b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.c index e64ea7d..8f7b602 100644 --- a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.c +++ b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/ipmi_smic_sm.c @@ -85,6 +85,7 @@ enum smic_states { /* SMIC Flags Register Bits */ #define SMIC_RX_DATA_READY 0x80 #define SMIC_TX_DATA_READY 0x40 + /* * SMIC_SMI and SMIC_EVM_DATA_AVAIL are only used by * a few systems, and then only by Systems Management @@ -104,19 +105,18 @@ enum smic_states { #define EC_ILLEGAL_COMMAND 0x04 #define EC_BUFFER_FULL 0x05 -struct si_sm_data -{ +struct si_sm_data { enum smic_states state; struct si_sm_io *io; - unsigned char write_data[MAX_SMIC_WRITE_SIZE]; - int write_pos; - int write_count; - int orig_write_count; - unsigned char read_data[MAX_SMIC_READ_SIZE]; - int read_pos; - int truncated; - unsigned int error_retries; - long smic_timeout; + unsigned char write_data[MAX_SMIC_WRITE_SIZE]; + int write_pos; + int write_count; + int orig_write_count; + unsigned char read_data[MAX_SMIC_READ_SIZE]; + int read_pos; + int truncated; + unsigned int error_retries; + long smic_timeout; }; static unsigned int init_smic_data (struct si_sm_data *smic, @@ -150,11 +150,10 @@ static int start_smic_transaction(struct si_sm_data *smic, return IPMI_NOT_IN_MY_STATE_ERR; if (smic_debug & SMIC_DEBUG_MSG) { - printk(KERN_INFO "start_smic_transaction -"); - for (i = 0; i < size; i ++) { - printk (" %02x", (unsigned char) (data [i])); - } - printk ("\n"); + printk(KERN_DEBUG "start_smic_transaction -"); + for (i = 0; i < size; i++) + printk(" %02x", (unsigned char) data[i]); + printk("\n"); } smic->error_retries = 0; memcpy(smic->write_data, data, size); @@ -173,11 +172,10 @@ static int smic_get_result(struct si_sm_data *smic, int i; if (smic_debug & SMIC_DEBUG_MSG) { - printk (KERN_INFO "smic_get result -"); - for (i = 0; i < smic->read_pos; i ++) { - printk (" %02x", (smic->read_data [i])); - } - printk ("\n"); + printk (KERN_DEBUG "smic_get result -"); + for (i = 0; i < smic->read_pos; i++) + printk (" %02x", (smic->read_data[i])); + printk("\n"); } if (length < smic->read_pos) { smic->read_pos = length; @@ -223,8 +221,8 @@ static inline void write_smic_control(struct si_sm_data *smic, smic->io->outputb(smic->io, 1, control); } -static inline void write_si_sm_data (struct si_sm_data *smic, - unsigned char data) +static inline void write_si_sm_data(struct si_sm_data *smic, + unsigned char data) { smic->io->outputb(smic->io, 0, data); } @@ -233,10 +231,9 @@ static inline void start_error_recovery(struct si_sm_data *smic, char *reason) { (smic->error_retries)++; if (smic->error_retries > SMIC_MAX_ERROR_RETRIES) { - if (smic_debug & SMIC_DEBUG_ENABLE) { + if (smic_debug & SMIC_DEBUG_ENABLE) printk(KERN_WARNING "ipmi_smic_drv: smic hosed: %s\n", reason); - } smic->state = SMIC_HOSED; } else { smic->write_count = smic->orig_write_count; @@ -254,14 +251,14 @@ static inline void write_next_byte(struct si_sm_data *smic) (smic->write_count)--; } -static inline void read_next_byte (struct si_sm_data *smic) +static inline void read_next_byte(struct si_sm_data *smic) { if (smic->read_pos >= MAX_SMIC_READ_SIZE) { - read_smic_data (smic); + read_smic_data(smic); smic->truncated = 1; } else { smic->read_data[smic->read_pos] = read_smic_data(smic); - (smic->read_pos)++; + smic->read_pos++; } } @@ -336,7 +333,7 @@ static inline void read_next_byte (struct si_sm_data *smic) SMIC_SC_SMS_RD_END 0xC6 */ -static enum si_sm_result smic_event (struct si_sm_data *smic, long time) +static enum si_sm_result smic_event(struct si_sm_data *smic, long time) { unsigned char status; unsigned char flags; @@ -347,13 +344,15 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) return SI_SM_HOSED; } if (smic->state != SMIC_IDLE) { - if (smic_debug & SMIC_DEBUG_STATES) { - printk(KERN_INFO + if (smic_debug & SMIC_DEBUG_STATES) + printk(KERN_DEBUG "smic_event - smic->smic_timeout = %ld," " time = %ld\n", smic->smic_timeout, time); - } -/* FIXME: smic_event is sometimes called with time > SMIC_RETRY_TIMEOUT */ + /* + * FIXME: smic_event is sometimes called with time > + * SMIC_RETRY_TIMEOUT + */ if (time < SMIC_RETRY_TIMEOUT) { smic->smic_timeout -= time; if (smic->smic_timeout < 0) { @@ -366,9 +365,9 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) if (flags & SMIC_FLAG_BSY) return SI_SM_CALL_WITH_DELAY; - status = read_smic_status (smic); + status = read_smic_status(smic); if (smic_debug & SMIC_DEBUG_STATES) - printk(KERN_INFO + printk(KERN_DEBUG "smic_event - state = %d, flags = 0x%02x," " status = 0x%02x\n", smic->state, flags, status); @@ -377,9 +376,7 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) case SMIC_IDLE: /* in IDLE we check for available messages */ if (flags & SMIC_SMS_DATA_AVAIL) - { return SI_SM_ATTN; - } return SI_SM_IDLE; case SMIC_START_OP: @@ -391,7 +388,7 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) case SMIC_OP_OK: if (status != SMIC_SC_SMS_READY) { - /* this should not happen */ + /* this should not happen */ start_error_recovery(smic, "state = SMIC_OP_OK," " status != SMIC_SC_SMS_READY"); @@ -411,8 +408,10 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) "status != SMIC_SC_SMS_WR_START"); return SI_SM_CALL_WITH_DELAY; } - /* we must not issue WR_(NEXT|END) unless - TX_DATA_READY is set */ + /* + * we must not issue WR_(NEXT|END) unless + * TX_DATA_READY is set + */ if (flags & SMIC_TX_DATA_READY) { if (smic->write_count == 1) { /* last byte */ @@ -424,10 +423,8 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) } write_next_byte(smic); write_smic_flags(smic, flags | SMIC_FLAG_BSY); - } - else { + } else return SI_SM_CALL_WITH_DELAY; - } break; case SMIC_WRITE_NEXT: @@ -442,52 +439,48 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) if (smic->write_count == 1) { write_smic_control(smic, SMIC_CC_SMS_WR_END); smic->state = SMIC_WRITE_END; - } - else { + } else { write_smic_control(smic, SMIC_CC_SMS_WR_NEXT); smic->state = SMIC_WRITE_NEXT; } write_next_byte(smic); write_smic_flags(smic, flags | SMIC_FLAG_BSY); - } - else { + } else return SI_SM_CALL_WITH_DELAY; - } break; case SMIC_WRITE_END: if (status != SMIC_SC_SMS_WR_END) { - start_error_recovery (smic, - "state = SMIC_WRITE_END, " - "status != SMIC_SC_SMS_WR_END"); + start_error_recovery(smic, + "state = SMIC_WRITE_END, " + "status != SMIC_SC_SMS_WR_END"); return SI_SM_CALL_WITH_DELAY; } /* data register holds an error code */ data = read_smic_data(smic); if (data != 0) { - if (smic_debug & SMIC_DEBUG_ENABLE) { - printk(KERN_INFO + if (smic_debug & SMIC_DEBUG_ENABLE) + printk(KERN_DEBUG "SMIC_WRITE_END: data = %02x\n", data); - } start_error_recovery(smic, "state = SMIC_WRITE_END, " "data != SUCCESS"); return SI_SM_CALL_WITH_DELAY; - } else { + } else smic->state = SMIC_WRITE2READ; - } break; case SMIC_WRITE2READ: - /* we must wait for RX_DATA_READY to be set before we - can continue */ + /* + * we must wait for RX_DATA_READY to be set before we + * can continue + */ if (flags & SMIC_RX_DATA_READY) { write_smic_control(smic, SMIC_CC_SMS_RD_START); write_smic_flags(smic, flags | SMIC_FLAG_BSY); smic->state = SMIC_READ_START; - } else { + } else return SI_SM_CALL_WITH_DELAY; - } break; case SMIC_READ_START: @@ -502,15 +495,16 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) write_smic_control(smic, SMIC_CC_SMS_RD_NEXT); write_smic_flags(smic, flags | SMIC_FLAG_BSY); smic->state = SMIC_READ_NEXT; - } else { + } else return SI_SM_CALL_WITH_DELAY; - } break; case SMIC_READ_NEXT: switch (status) { - /* smic tells us that this is the last byte to be read - --> clean up */ + /* + * smic tells us that this is the last byte to be read + * --> clean up + */ case SMIC_SC_SMS_RD_END: read_next_byte(smic); write_smic_control(smic, SMIC_CC_SMS_RD_END); @@ -523,9 +517,8 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) write_smic_control(smic, SMIC_CC_SMS_RD_NEXT); write_smic_flags(smic, flags | SMIC_FLAG_BSY); smic->state = SMIC_READ_NEXT; - } else { + } else return SI_SM_CALL_WITH_DELAY; - } break; default: start_error_recovery( @@ -546,10 +539,9 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) data = read_smic_data(smic); /* data register holds an error code */ if (data != 0) { - if (smic_debug & SMIC_DEBUG_ENABLE) { - printk(KERN_INFO + if (smic_debug & SMIC_DEBUG_ENABLE) + printk(KERN_DEBUG "SMIC_READ_END: data = %02x\n", data); - } start_error_recovery(smic, "state = SMIC_READ_END, " "data != SUCCESS"); @@ -565,7 +557,7 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) default: if (smic_debug & SMIC_DEBUG_ENABLE) { - printk(KERN_WARNING "smic->state = %d\n", smic->state); + printk(KERN_DEBUG "smic->state = %d\n", smic->state); start_error_recovery(smic, "state = UNKNOWN"); return SI_SM_CALL_WITH_DELAY; } @@ -576,10 +568,12 @@ static enum si_sm_result smic_event (struct si_sm_data *smic, long time) static int smic_detect(struct si_sm_data *smic) { - /* It's impossible for the SMIC fnags register to be all 1's, - (assuming a properly functioning, self-initialized BMC) - but that's what you get from reading a bogus address, so we - test that first. */ + /* + * It's impossible for the SMIC fnags register to be all 1's, + * (assuming a properly functioning, self-initialized BMC) + * but that's what you get from reading a bogus address, so we + * test that first. + */ if (read_smic_flags(smic) == 0xff) return 1; @@ -595,8 +589,7 @@ static int smic_size(void) return sizeof(struct si_sm_data); } -struct si_sm_handlers smic_smi_handlers = -{ +struct si_sm_handlers smic_smi_handlers = { .init_data = init_smic_data, .start_transaction = start_smic_transaction, .get_result = smic_get_result, diff --git a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/kcompat.h b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/kcompat.h index 51557a5..c8fa1a0 100644 --- a/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/kcompat.h +++ b/vmkdrivers/src_9/drivers/char/openipmi/ipmi_si_drv/kcompat.h @@ -2,5 +2,7 @@ #define __KCOMPAT_H__ #undef CONFIG_ACPI /* Disable the use of CONFIG_ACPI */ +#undef CONFIG_PNP /* Disable support for PNP discovery */ +#undef CONFIG_OF /* Disable support for OF driver */ #endif /* #ifndef __KCOMPAT_H__ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/57xx_fcoe_constants.h b/vmkdrivers/src_9/drivers/net/bnx2/57xx_fcoe_constants.h new file mode 100644 index 0000000..86d382e --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2/57xx_fcoe_constants.h @@ -0,0 +1,233 @@ +#ifndef __57XX_FCOE_CONSTANTS_H_ +#define __57XX_FCOE_CONSTANTS_H_ + +/** + * This file defines HSI constants for the FCoE flows + */ + +/* Current FCoE HSI version number composed of two fields (16 bit) */ +#define FCOE_HSI_MAJOR_VERSION (1) // Implies on a change broken previous HSI +#define FCOE_HSI_MINOR_VERSION (1) // Implies on a change which does not broken previous HSI + +/* KWQ/KCQ FCoE layer code */ +#define FCOE_KWQE_LAYER_CODE (7) + +/* KWQ (kernel work queue) request op codes */ +#define FCOE_KWQE_OPCODE_INIT1 (0) +#define FCOE_KWQE_OPCODE_INIT2 (1) +#define FCOE_KWQE_OPCODE_INIT3 (2) +#define FCOE_KWQE_OPCODE_OFFLOAD_CONN1 (3) +#define FCOE_KWQE_OPCODE_OFFLOAD_CONN2 (4) +#define FCOE_KWQE_OPCODE_OFFLOAD_CONN3 (5) +#define FCOE_KWQE_OPCODE_OFFLOAD_CONN4 (6) +#define FCOE_KWQE_OPCODE_ENABLE_CONN (7) +#define FCOE_KWQE_OPCODE_DISABLE_CONN (8) +#define FCOE_KWQE_OPCODE_DESTROY_CONN (9) +#define FCOE_KWQE_OPCODE_DESTROY (10) +#define FCOE_KWQE_OPCODE_STAT (11) + +/* KCQ (kernel completion queue) response op codes */ +#define FCOE_KCQE_OPCODE_INIT_FUNC (0x10) +#define FCOE_KCQE_OPCODE_DESTROY_FUNC (0x11) +#define FCOE_KCQE_OPCODE_STAT_FUNC (0x12) +#define FCOE_KCQE_OPCODE_OFFLOAD_CONN (0x15) +#define FCOE_KCQE_OPCODE_ENABLE_CONN (0x16) +#define FCOE_KCQE_OPCODE_DISABLE_CONN (0x17) +#define FCOE_KCQE_OPCODE_DESTROY_CONN (0x18) +#define FCOE_KCQE_OPCODE_CQ_EVENT_NOTIFICATION (0x20) +#define FCOE_KCQE_OPCODE_FCOE_ERROR (0x21) + +/* KCQ (kernel completion queue) completion status */ +#define FCOE_KCQE_COMPLETION_STATUS_SUCCESS (0x0) +#define FCOE_KCQE_COMPLETION_STATUS_ERROR (0x1) +#define FCOE_KCQE_COMPLETION_STATUS_INVALID_OPCODE (0x2) +#define FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE (0x3) +#define FCOE_KCQE_COMPLETION_STATUS_CTX_FREE_FAILURE (0x4) +#define FCOE_KCQE_COMPLETION_STATUS_NIC_ERROR (0x5) +#define FCOE_KCQE_COMPLETION_STATUS_WRONG_HSI_VERSION (0x6) + +/* CQE type */ +#define FCOE_PENDING_CQE_TYPE 0 +#define FCOE_UNSOLIC_CQE_TYPE 1 + +/* Unsolicited CQE type */ +#define FCOE_UNSOLICITED_FRAME_CQE_TYPE 0 +#define FCOE_ERROR_DETECTION_CQE_TYPE 1 +#define FCOE_WARNING_DETECTION_CQE_TYPE 2 + +// E_D_TOV timer resolution in ms +#define FCOE_E_D_TOV_TIMER_RESOLUTION_MS (20) + +// E_D_TOV timer resolution for SDM (4 micro) +#define FCOE_E_D_TOV_SDM_TIMER_RESOLUTION (FCOE_E_D_TOV_TIMER_RESOLUTION_MS * 1000 / 4) + +// REC timer resolution in ms +#define FCOE_REC_TIMER_RESOLUTION_MS (20) + +// REC timer resolution for SDM (4 micro) +#define FCOE_REC_SDM_TIMER_RESOLUTION (FCOE_REC_TIMER_RESOLUTION_MS * 1000 / 4) + +// E_D_TOV timer default wraparound value (2 sec) in 20 ms resolution +#define FCOE_E_D_TOV_DEFAULT_WRAPAROUND_VAL (2000 / FCOE_E_D_TOV_TIMER_RESOLUTION_MS) + +// REC_TOV timer default wraparound value (3 sec) in 20 ms resolution +#define FCOE_REC_TOV_DEFAULT_WRAPAROUND_VAL (3000 / FCOE_REC_TIMER_RESOLUTION_MS) + +#define FCOE_NUM_OF_TIMER_TASKS (8 * 1024) + +#define FCOE_NUM_OF_CACHED_TASKS_TIMER (8) + +// Task context constants +/************************************** Remove FCP_CMD write tce sleep ***************************************************************** +#define FCOE_TASK_TX_STATE_NORMAL 0 // In case timer services are required then shall be updated by Xstorm after start processing the task. In case no timer facilities are required then the driver would initialize the state to this value +#define FCOE_TASK_TX_STATE_INIT 1 // After driver has initialize the task in case timer services required +************************************** Remove FCP_CMD write tce sleep *****************************************************************/ +#define FCOE_TASK_TX_STATE_INIT 0 // After driver has initialize the task in case timer services required +#define FCOE_TASK_TX_STATE_NORMAL 1 // In case timer services are required then shall be updated by Xstorm after start processing the task. In case no timer facilities are required then the driver would initialize the state to this value +#define FCOE_TASK_TX_STATE_ABORT 2 // Task is under abort procedure. Updated in order to stop processing of pending WQEs on this task +#define FCOE_TASK_TX_STATE_ERROR 3 // For E_D_T_TOV timer expiration in Xstorm (Class 2 only) +#define FCOE_TASK_TX_STATE_WARNING 4 // For REC_TOV timer expiration indication received from Xstorm +#define FCOE_TASK_TX_STATE_UNSOLICITED_COMPLETED 5 // For completed unsolicited task +#define FCOE_TASK_TX_STATE_EXCHANGE_CLEANUP 6 // For exchange cleanup request task +#define FCOE_TASK_TX_STATE_SEQUENCE_CLEANUP 7 // For sequence cleanup request task +#define FCOE_TASK_TX_STATE_ABTS_TX 8 // For completion the ABTS task. + +#define FCOE_TASK_RX_STATE_NORMAL 0 +#define FCOE_TASK_RX_STATE_COMPLETED 1 +#define FCOE_TASK_RX_STATE_INTER_COMP 2 // Obsolete: Intermediate completion (middle path with local completion) +#define FCOE_TASK_RX_STATE_WARNING 3 // For REC_TOV timer expiration indication received from Xstorm +#define FCOE_TASK_RX_STATE_ERROR 4 // For E_D_T_TOV timer expiration in Ustorm +#define FCOE_TASK_RX_STATE_ABTS_IN_PROCESS 5 // FW only: First visit at rx-path, part of the abts round trip +#define FCOE_TASK_RX_STATE_ABTS_TRANSMITTED 6 // FW only: Second visit at rx-path, after ABTS frame transmitted +#define FCOE_TASK_RX_STATE_ABTS_COMPLETED 7 // Special completion indication in case of task was aborted. +#define FCOE_TASK_RX_STATE_EXCHANGE_CLEANUP_IN_PROCESS 8 // FW only: First visit at rx-path, part of the cleanup round trip +#define FCOE_TASK_RX_STATE_EXCHANGE_CLEANUP_COMPLETED 9 // FW only: Special completion indication in case of task was cleaned. +#define FCOE_TASK_RX_STATE_ABORT_CLEANUP_COMPLETED 10 // Not in used: Special completion indication (in task requested the exchange cleanup) in case cleaned task is in non-valid. +#define FCOE_TASK_RX_STATE_IGNORED_SEQUENCE_CLEANUP 11 // Special completion indication (in task requested the sequence cleanup) in case cleaned task was already returned to normal. + + +#define FCOE_TASK_TYPE_WRITE 0 +#define FCOE_TASK_TYPE_READ 1 +#define FCOE_TASK_TYPE_MIDPATH 2 +#define FCOE_TASK_TYPE_UNSOLICITED 3 +#define FCOE_TASK_TYPE_ABTS 4 +#define FCOE_TASK_TYPE_EXCHANGE_CLEANUP 5 +#define FCOE_TASK_TYPE_SEQUENCE_CLEANUP 6 + +#define FCOE_TASK_DEV_TYPE_DISK 0 +#define FCOE_TASK_DEV_TYPE_TAPE 1 + +#define FCOE_TASK_CLASS_TYPE_3 0 +#define FCOE_TASK_CLASS_TYPE_2 1 + +// FCoE/FC packet fields +#define FCOE_ETH_TYPE 0x8906 + +// FCoE maximum elements in hash table +#define FCOE_MAX_ELEMENTS_IN_HASH_TABLE_ROW 8 + +// FCoE half of the elements in hash table +#define FCOE_HALF_ELEMENTS_IN_HASH_TABLE_ROW (FCOE_MAX_ELEMENTS_IN_HASH_TABLE_ROW / 2) + +// FcoE number of cached T2 entries +#define T_FCOE_NUMBER_OF_CACHED_T2_ENTRIES (4) + +// FCoE maximum elements in hash table +#define FCOE_HASH_TBL_CHUNK_SIZE 16384 + +// Everest FCoE connection type +#define B577XX_FCOE_CONNECTION_TYPE 4 + +// FCoE number of rows (in log). This number derives +// from the maximum connections supported which is 2048. +// TBA: Need a different constant for E2 +#define FCOE_MAX_NUM_SESSIONS_LOG 11 + +#define FC_ABTS_REPLY_MAX_PAYLOAD_LEN 12 + +// Error codes for Error Reporting in slow path flows +#define FCOE_SLOW_PATH_ERROR_CODE_TOO_MANY_FUNCS 0 +#define FCOE_SLOW_PATH_ERROR_CODE_NO_LICENSE 1 + +// Error codes for Error Reporting in fast path flows +// XFER error codes +#define FCOE_ERROR_CODE_XFER_OOO_RO 0 +#define FCOE_ERROR_CODE_XFER_RO_NOT_ALIGNED 1 +#define FCOE_ERROR_CODE_XFER_NULL_BURST_LEN 2 +#define FCOE_ERROR_CODE_XFER_RO_GREATER_THAN_DATA2TRNS 3 +#define FCOE_ERROR_CODE_XFER_INVALID_PAYLOAD_SIZE 4 +#define FCOE_ERROR_CODE_XFER_TASK_TYPE_NOT_WRITE 5 +#define FCOE_ERROR_CODE_XFER_PEND_XFER_SET 6 +#define FCOE_ERROR_CODE_XFER_OPENED_SEQ 7 +#define FCOE_ERROR_CODE_XFER_FCTL 8 + +// FCP RSP error codes +#define FCOE_ERROR_CODE_FCP_RSP_BIDI_FLAGS_SET 9 +#define FCOE_ERROR_CODE_FCP_RSP_UNDERFLOW 10 +#define FCOE_ERROR_CODE_FCP_RSP_OVERFLOW 11 +#define FCOE_ERROR_CODE_FCP_RSP_INVALID_LENGTH_FIELD 12 +#define FCOE_ERROR_CODE_FCP_RSP_INVALID_SNS_FIELD 13 +#define FCOE_ERROR_CODE_FCP_RSP_INVALID_PAYLOAD_SIZE 14 +#define FCOE_ERROR_CODE_FCP_RSP_PEND_XFER_SET 15 +#define FCOE_ERROR_CODE_FCP_RSP_OPENED_SEQ 16 +#define FCOE_ERROR_CODE_FCP_RSP_FCTL 17 +#define FCOE_ERROR_CODE_FCP_RSP_LAST_SEQ_RESET 18 +#define FCOE_ERROR_CODE_FCP_RSP_CONF_REQ_NOT_SUPPORTED_YET 19 + +// FCP DATA error codes +#define FCOE_ERROR_CODE_DATA_OOO_RO 20 +#define FCOE_ERROR_CODE_DATA_EXCEEDS_DEFINED_MAX_FRAME_SIZE 21 +#define FCOE_ERROR_CODE_DATA_EXCEEDS_DATA2TRNS 22 +#define FCOE_ERROR_CODE_DATA_SOFI3_SEQ_ACTIVE_SET 23 +#define FCOE_ERROR_CODE_DATA_SOFN_SEQ_ACTIVE_RESET 24 +#define FCOE_ERROR_CODE_DATA_EOFN_END_SEQ_SET 25 +#define FCOE_ERROR_CODE_DATA_EOFT_END_SEQ_RESET 26 +#define FCOE_ERROR_CODE_DATA_TASK_TYPE_NOT_READ 27 +#define FCOE_ERROR_CODE_DATA_FCTL 28 + +// Middle path error codes +#define FCOE_ERROR_CODE_MIDPATH_INVALID_TYPE 29 +#define FCOE_ERROR_CODE_MIDPATH_SOFI3_SEQ_ACTIVE_SET 30 +#define FCOE_ERROR_CODE_MIDPATH_SOFN_SEQ_ACTIVE_RESET 31 +#define FCOE_ERROR_CODE_MIDPATH_EOFN_END_SEQ_SET 32 +#define FCOE_ERROR_CODE_MIDPATH_EOFT_END_SEQ_RESET 33 +#define FCOE_ERROR_CODE_MIDPATH_REPLY_FCTL 34 +#define FCOE_ERROR_CODE_MIDPATH_INVALID_REPLY 35 +#define FCOE_ERROR_CODE_MIDPATH_ELS_REPLY_RCTL 36 + +// ABTS error codes +#define FCOE_ERROR_CODE_ABTS_REPLY_F_CTL 37 +#define FCOE_ERROR_CODE_ABTS_REPLY_DDF_RCTL_FIELD 38 +#define FCOE_ERROR_CODE_ABTS_REPLY_INVALID_BLS_RCTL 39 +#define FCOE_ERROR_CODE_ABTS_REPLY_INVALID_RCTL 40 +#define FCOE_ERROR_CODE_ABTS_REPLY_RCTL_GENERAL_MISMATCH 41 + +// Common error codes +#define FCOE_ERROR_CODE_COMMON_MIDDLE_FRAME_WITH_PAD 42 +#define FCOE_ERROR_CODE_COMMON_SEQ_INIT_IN_TCE 43 +#define FCOE_ERROR_CODE_COMMON_FC_HDR_RX_ID_MISMATCH 44 +#define FCOE_ERROR_CODE_COMMON_INCORRECT_SEQ_CNT 45 +#define FCOE_ERROR_CODE_COMMON_DATA_FC_HDR_FCP_TYPE_MISMATCH 46 +#define FCOE_ERROR_CODE_COMMON_DATA_NO_MORE_SGES 47 +#define FCOE_ERROR_CODE_COMMON_OPTIONAL_FC_HDR 48 +#define FCOE_ERROR_CODE_COMMON_READ_TCE_OX_ID_TOO_BIG 49 +#define FCOE_ERROR_CODE_COMMON_DATA_WAS_NOT_TRANSMITTED 50 + +// Unsolicited Rx error codes +#define FCOE_ERROR_CODE_UNSOLICITED_TYPE_NOT_ELS 51 +#define FCOE_ERROR_CODE_UNSOLICITED_TYPE_NOT_BLS 52 +#define FCOE_ERROR_CODE_UNSOLICITED_FCTL_ELS 53 +#define FCOE_ERROR_CODE_UNSOLICITED_FCTL_BLS 54 +#define FCOE_ERROR_CODE_UNSOLICITED_R_CTL 55 + +#define FCOE_ERROR_CODE_RW_TASK_DDF_RCTL_INFO_FIELD 56 +#define FCOE_ERROR_CODE_RW_TASK_INVALID_RCTL 57 +#define FCOE_ERROR_CODE_RW_TASK_RCTL_GENERAL_MISMATCH 58 + +// Timer error codes +#define FCOE_ERROR_CODE_E_D_TOV_TIMER_EXPIRATION 60 +#define FCOE_ERROR_CODE_REC_TOV_TIMER_EXPIRATION 61 + + +#endif /*__57XX_FCOE_CONSTANTS_H_ */ + diff --git a/vmkdrivers/src_9/drivers/net/bnx2/57xx_hsi_bnx2fc.h b/vmkdrivers/src_9/drivers/net/bnx2/57xx_hsi_bnx2fc.h new file mode 100644 index 0000000..e53a902 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2/57xx_hsi_bnx2fc.h @@ -0,0 +1,988 @@ +#ifndef __57XX_FCOE_HSI_LINUX_LE__ +#define __57XX_FCOE_HSI_LINUX_LE__ + +/* + * common data for all protocols + */ +struct b577xx_doorbell_hdr { + u8 header; +#define B577XX_DOORBELL_HDR_RX (0x1<<0) +#define B577XX_DOORBELL_HDR_RX_SHIFT 0 +#define B577XX_DOORBELL_HDR_DB_TYPE (0x1<<1) +#define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT 1 +#define B577XX_DOORBELL_HDR_DPM_SIZE (0x3<<2) +#define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT 2 +#define B577XX_DOORBELL_HDR_CONN_TYPE (0xF<<4) +#define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT 4 +}; + +/* + * doorbell message sent to the chip + */ +struct b577xx_doorbell { +#if defined(__BIG_ENDIAN) + u16 zero_fill2; + u8 zero_fill1; + struct b577xx_doorbell_hdr header; +#elif defined(__LITTLE_ENDIAN) + struct b577xx_doorbell_hdr header; + u8 zero_fill1; + u16 zero_fill2; +#endif +}; + + + +/* + * doorbell message sent to the chip + */ +struct b577xx_doorbell_set_prod { +#if defined(__BIG_ENDIAN) + u16 prod; + u8 zero_fill1; + struct b577xx_doorbell_hdr header; +#elif defined(__LITTLE_ENDIAN) + struct b577xx_doorbell_hdr header; + u8 zero_fill1; + u16 prod; +#endif +}; + + +struct regpair { + __le32 lo; + __le32 hi; +}; + + +/* + * ABTS info $$KEEP_ENDIANNESS$$ + */ +struct fcoe_abts_info { + __le16 aborted_task_id; + __le16 reserved0; + __le32 reserved1; +}; + + +/* + * Fixed size structure in order to plant it in Union structure $$KEEP_ENDIANNESS$$ + */ +struct fcoe_abts_rsp_union { + u8 r_ctl; + u8 rsrv[3]; + __le32 abts_rsp_payload[7]; +}; + + +/* + * 4 regs size $$KEEP_ENDIANNESS$$ + */ +struct fcoe_bd_ctx { + __le32 buf_addr_hi; + __le32 buf_addr_lo; + __le16 buf_len; + __le16 rsrv0; + __le16 flags; + __le16 rsrv1; +}; + + +/* + * FCoE cached sges context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_cached_sge_ctx { + struct regpair cur_buf_addr; + __le16 cur_buf_rem; + __le16 second_buf_rem; + struct regpair second_buf_addr; +}; + + +/* + * Cleanup info $$KEEP_ENDIANNESS$$ + */ +struct fcoe_cleanup_info { + __le16 cleaned_task_id; + __le16 rolled_tx_seq_cnt; + __le32 rolled_tx_data_offset; +}; + + +/* + * Fcp RSP flags $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_rsp_flags { + u8 flags; +#define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID (0x1<<0) +#define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID_SHIFT 0 +#define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID (0x1<<1) +#define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID_SHIFT 1 +#define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER (0x1<<2) +#define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER_SHIFT 2 +#define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER (0x1<<3) +#define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER_SHIFT 3 +#define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ (0x1<<4) +#define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ_SHIFT 4 +#define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS (0x7<<5) +#define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS_SHIFT 5 +}; + +/* + * Fcp RSP payload $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_rsp_payload { + struct regpair reserved0; + __le32 fcp_resid; + u8 scsi_status_code; + struct fcoe_fcp_rsp_flags fcp_flags; + __le16 retry_delay_timer; + __le32 fcp_rsp_len; + __le32 fcp_sns_len; +}; + +/* + * Fixed size structure in order to plant it in Union structure $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_rsp_union { + struct fcoe_fcp_rsp_payload payload; + struct regpair reserved0; +}; + +/* + * FC header $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fc_hdr { + u8 s_id[3]; + u8 cs_ctl; + u8 d_id[3]; + u8 r_ctl; + __le16 seq_cnt; + u8 df_ctl; + u8 seq_id; + u8 f_ctl[3]; + u8 type; + __le32 parameters; + __le16 rx_id; + __le16 ox_id; +}; + +/* + * FC header union $$KEEP_ENDIANNESS$$ + */ +struct fcoe_mp_rsp_union { + struct fcoe_fc_hdr fc_hdr; + __le32 mp_payload_len; + __le32 rsrv; +}; + +/* + * Completion information $$KEEP_ENDIANNESS$$ + */ +union fcoe_comp_flow_info { + struct fcoe_fcp_rsp_union fcp_rsp; + struct fcoe_abts_rsp_union abts_rsp; + struct fcoe_mp_rsp_union mp_rsp; + __le32 opaque[8]; +}; + + +/* + * External ABTS info $$KEEP_ENDIANNESS$$ + */ +struct fcoe_ext_abts_info { + __le32 rsrv0[6]; + struct fcoe_abts_info ctx; +}; + + +/* + * External cleanup info $$KEEP_ENDIANNESS$$ + */ +struct fcoe_ext_cleanup_info { + __le32 rsrv0[6]; + struct fcoe_cleanup_info ctx; +}; + + +/* + * Fcoe FW Tx sequence context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fw_tx_seq_ctx { + __le32 data_offset; + __le16 seq_cnt; + __le16 rsrv0; +}; + +/* + * Fcoe external FW Tx sequence context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_ext_fw_tx_seq_ctx { + __le32 rsrv0[6]; + struct fcoe_fw_tx_seq_ctx ctx; +}; + + +/* + * FCoE multiple sges context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_mul_sges_ctx { + struct regpair cur_sge_addr; + __le16 cur_sge_off; + u8 cur_sge_idx; + u8 sgl_size; +}; + +/* + * FCoE external multiple sges context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_ext_mul_sges_ctx { + struct fcoe_mul_sges_ctx mul_sgl; + struct regpair rsrv0; +}; + + +/* + * FCP CMD payload $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_cmd_payload { + __le32 opaque[8]; +}; + + + + + +/* + * Fcp xfr rdy payload $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_xfr_rdy_payload { + __le32 burst_len; + __le32 data_ro; +}; + + +/* + * FC frame $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fc_frame { + struct fcoe_fc_hdr fc_hdr; + __le32 reserved0[2]; +}; + + + + +/* + * FCoE KCQ CQE parameters $$KEEP_ENDIANNESS$$ + */ +union fcoe_kcqe_params { + __le32 reserved0[4]; +}; + +/* + * FCoE KCQ CQE $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kcqe { + __le32 fcoe_conn_id; + __le32 completion_status; + __le32 fcoe_conn_context_id; + union fcoe_kcqe_params params; + __le16 qe_self_seq; + u8 op_code; + u8 flags; +#define FCOE_KCQE_RESERVED0 (0x7<<0) +#define FCOE_KCQE_RESERVED0_SHIFT 0 +#define FCOE_KCQE_RAMROD_COMPLETION (0x1<<3) +#define FCOE_KCQE_RAMROD_COMPLETION_SHIFT 3 +#define FCOE_KCQE_LAYER_CODE (0x7<<4) +#define FCOE_KCQE_LAYER_CODE_SHIFT 4 +#define FCOE_KCQE_LINKED_WITH_NEXT (0x1<<7) +#define FCOE_KCQE_LINKED_WITH_NEXT_SHIFT 7 +}; + + + +/* + * FCoE KWQE header $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_header { + u8 op_code; + u8 flags; +#define FCOE_KWQE_HEADER_RESERVED0 (0xF<<0) +#define FCOE_KWQE_HEADER_RESERVED0_SHIFT 0 +#define FCOE_KWQE_HEADER_LAYER_CODE (0x7<<4) +#define FCOE_KWQE_HEADER_LAYER_CODE_SHIFT 4 +#define FCOE_KWQE_HEADER_RESERVED1 (0x1<<7) +#define FCOE_KWQE_HEADER_RESERVED1_SHIFT 7 +}; + +/* + * FCoE firmware init request 1 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_init1 { + __le16 num_tasks; + struct fcoe_kwqe_header hdr; + __le32 task_list_pbl_addr_lo; + __le32 task_list_pbl_addr_hi; + __le32 dummy_buffer_addr_lo; + __le32 dummy_buffer_addr_hi; + __le16 sq_num_wqes; + __le16 rq_num_wqes; + __le16 rq_buffer_log_size; + __le16 cq_num_wqes; + __le16 mtu; + u8 num_sessions_log; + u8 flags; +#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE (0xF<<0) +#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE_SHIFT 0 +#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC (0x7<<4) +#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC_SHIFT 4 +#define FCOE_KWQE_INIT1_RESERVED1 (0x1<<7) +#define FCOE_KWQE_INIT1_RESERVED1_SHIFT 7 +}; + +/* + * FCoE firmware init request 2 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_init2 { + u8 hsi_major_version; + u8 hsi_minor_version; + struct fcoe_kwqe_header hdr; + __le32 hash_tbl_pbl_addr_lo; + __le32 hash_tbl_pbl_addr_hi; + __le32 t2_hash_tbl_addr_lo; + __le32 t2_hash_tbl_addr_hi; + __le32 t2_ptr_hash_tbl_addr_lo; + __le32 t2_ptr_hash_tbl_addr_hi; + __le32 free_list_count; +}; + +/* + * FCoE firmware init request 3 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_init3 { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + __le32 error_bit_map_lo; + __le32 error_bit_map_hi; + u8 perf_config; + u8 reserved21[3]; + __le32 reserved2[4]; +}; + +/* + * FCoE connection offload request 1 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_offload1 { + __le16 fcoe_conn_id; + struct fcoe_kwqe_header hdr; + __le32 sq_addr_lo; + __le32 sq_addr_hi; + __le32 rq_pbl_addr_lo; + __le32 rq_pbl_addr_hi; + __le32 rq_first_pbe_addr_lo; + __le32 rq_first_pbe_addr_hi; + __le16 rq_prod; + __le16 reserved0; +}; + +/* + * FCoE connection offload request 2 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_offload2 { + __le16 tx_max_fc_pay_len; + struct fcoe_kwqe_header hdr; + __le32 cq_addr_lo; + __le32 cq_addr_hi; + __le32 xferq_addr_lo; + __le32 xferq_addr_hi; + __le32 conn_db_addr_lo; + __le32 conn_db_addr_hi; + __le32 reserved1; +}; + +/* + * FCoE connection offload request 3 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_offload3 { + __le16 vlan_tag; +#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID (0xFFF<<0) +#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID_SHIFT 0 +#define FCOE_KWQE_CONN_OFFLOAD3_CFI (0x1<<12) +#define FCOE_KWQE_CONN_OFFLOAD3_CFI_SHIFT 12 +#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY (0x7<<13) +#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY_SHIFT 13 + struct fcoe_kwqe_header hdr; + u8 s_id[3]; + u8 tx_max_conc_seqs_c3; + u8 d_id[3]; + u8 flags; +#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS (0x1<<0) +#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS_SHIFT 0 +#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES (0x1<<1) +#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES_SHIFT 1 +#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT (0x1<<2) +#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT_SHIFT 2 +#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ (0x1<<3) +#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ_SHIFT 3 +#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID (0x1<<4) +#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID_SHIFT 4 +#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID (0x1<<5) +#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID_SHIFT 5 +#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0 (0x1<<6) +#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0_SHIFT 6 +#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG (0x1<<7) +#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG_SHIFT 7 + __le32 reserved; + __le32 confq_first_pbe_addr_lo; + __le32 confq_first_pbe_addr_hi; + __le16 tx_total_conc_seqs; + __le16 rx_max_fc_pay_len; + __le16 rx_total_conc_seqs; + u8 rx_max_conc_seqs_c3; + u8 rx_open_seqs_exch_c3; +}; + +/* + * FCoE connection offload request 4 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_offload4 { + u8 e_d_tov_timer_val; + u8 reserved2; + struct fcoe_kwqe_header hdr; + u8 src_mac_addr_lo[2]; + u8 src_mac_addr_mid[2]; + u8 src_mac_addr_hi[2]; + u8 dst_mac_addr_hi[2]; + u8 dst_mac_addr_lo[2]; + u8 dst_mac_addr_mid[2]; + __le32 lcq_addr_lo; + __le32 lcq_addr_hi; + __le32 confq_pbl_base_addr_lo; + __le32 confq_pbl_base_addr_hi; +}; + +/* + * FCoE connection enable request $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_enable_disable { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + u8 src_mac_addr_lo[2]; + u8 src_mac_addr_mid[2]; + u8 src_mac_addr_hi[2]; + u16 vlan_tag; +#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID (0xFFF<<0) +#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID_SHIFT 0 +#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI (0x1<<12) +#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI_SHIFT 12 +#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY (0x7<<13) +#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY_SHIFT 13 + u8 dst_mac_addr_lo[2]; + u8 dst_mac_addr_mid[2]; + u8 dst_mac_addr_hi[2]; + __le16 reserved1; + u8 s_id[3]; + u8 vlan_flag; + u8 d_id[3]; + u8 reserved3; + __le32 context_id; + __le32 conn_id; + __le32 reserved4; +}; + +/* + * FCoE connection destroy request $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_destroy { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + __le32 context_id; + __le32 conn_id; + __le32 reserved1[5]; +}; + +/* + * FCoe destroy request $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_destroy { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + __le32 reserved1[7]; +}; + +/* + * FCoe statistics request $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_stat { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + __le32 stat_params_addr_lo; + __le32 stat_params_addr_hi; + __le32 reserved1[5]; +}; + +/* + * FCoE KWQ WQE $$KEEP_ENDIANNESS$$ + */ +union fcoe_kwqe { + struct fcoe_kwqe_init1 init1; + struct fcoe_kwqe_init2 init2; + struct fcoe_kwqe_init3 init3; + struct fcoe_kwqe_conn_offload1 conn_offload1; + struct fcoe_kwqe_conn_offload2 conn_offload2; + struct fcoe_kwqe_conn_offload3 conn_offload3; + struct fcoe_kwqe_conn_offload4 conn_offload4; + struct fcoe_kwqe_conn_enable_disable conn_enable_disable; + struct fcoe_kwqe_conn_destroy conn_destroy; + struct fcoe_kwqe_destroy destroy; + struct fcoe_kwqe_stat statistics; +}; + + + + + + + + + + + + + + + + +/* + * TX SGL context $$KEEP_ENDIANNESS$$ + */ +union fcoe_sgl_union_ctx { + struct fcoe_cached_sge_ctx cached_sge; + struct fcoe_ext_mul_sges_ctx sgl; + __le32 opaque[5]; +}; + +/* + * Data-In/ELS/BLS information $$KEEP_ENDIANNESS$$ + */ +struct fcoe_read_flow_info { + union fcoe_sgl_union_ctx sgl_ctx; + __le32 rsrv0[3]; +}; + + +/* + * Fcoe stat context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_s_stat_ctx { + u8 flags; +#define FCOE_S_STAT_CTX_ACTIVE (0x1<<0) +#define FCOE_S_STAT_CTX_ACTIVE_SHIFT 0 +#define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND (0x1<<1) +#define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND_SHIFT 1 +#define FCOE_S_STAT_CTX_ABTS_PERFORMED (0x1<<2) +#define FCOE_S_STAT_CTX_ABTS_PERFORMED_SHIFT 2 +#define FCOE_S_STAT_CTX_SEQ_TIMEOUT (0x1<<3) +#define FCOE_S_STAT_CTX_SEQ_TIMEOUT_SHIFT 3 +#define FCOE_S_STAT_CTX_P_RJT (0x1<<4) +#define FCOE_S_STAT_CTX_P_RJT_SHIFT 4 +#define FCOE_S_STAT_CTX_ACK_EOFT (0x1<<5) +#define FCOE_S_STAT_CTX_ACK_EOFT_SHIFT 5 +#define FCOE_S_STAT_CTX_RSRV1 (0x3<<6) +#define FCOE_S_STAT_CTX_RSRV1_SHIFT 6 +}; + +/* + * Fcoe rx seq context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_seq_ctx { + u8 seq_id; + struct fcoe_s_stat_ctx s_stat; + __le16 seq_cnt; + __le32 low_exp_ro; + __le32 high_exp_ro; +}; + + +/* + * Fcoe rx_wr union context $$KEEP_ENDIANNESS$$ + */ +union fcoe_rx_wr_union_ctx { + struct fcoe_read_flow_info read_info; + union fcoe_comp_flow_info comp_info; + __le32 opaque[8]; +}; + + + +/* + * FCoE SQ element $$KEEP_ENDIANNESS$$ + */ +struct fcoe_sqe { + __le16 wqe; +#define FCOE_SQE_TASK_ID (0x7FFF<<0) +#define FCOE_SQE_TASK_ID_SHIFT 0 +#define FCOE_SQE_TOGGLE_BIT (0x1<<15) +#define FCOE_SQE_TOGGLE_BIT_SHIFT 15 +}; + + + +/* + * 14 regs $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_tx_only { + union fcoe_sgl_union_ctx sgl_ctx; + __le32 rsrv0; +}; + +/* + * 32 bytes (8 regs) used for TX only purposes $$KEEP_ENDIANNESS$$ + */ +union fcoe_tx_wr_rx_rd_union_ctx { + struct fcoe_fc_frame tx_frame; + struct fcoe_fcp_cmd_payload fcp_cmd; + struct fcoe_ext_cleanup_info cleanup; + struct fcoe_ext_abts_info abts; + struct fcoe_ext_fw_tx_seq_ctx tx_seq; + __le32 opaque[8]; +}; + +/* + * tce_tx_wr_rx_rd_const $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_tx_wr_rx_rd_const { + u8 init_flags; +#define FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE (0x7<<0) +#define FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE_SHIFT 0 +#define FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE (0x1<<3) +#define FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT 3 +#define FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE (0x1<<4) +#define FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE_SHIFT 4 +#define FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE (0x3<<5) +#define FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE_SHIFT 5 +#define FCOE_TCE_TX_WR_RX_RD_CONST_SUPPORT_REC_TOV (0x1<<7) +#define FCOE_TCE_TX_WR_RX_RD_CONST_SUPPORT_REC_TOV_SHIFT 7 + u8 tx_flags; +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_VALID (0x1<<0) +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_VALID_SHIFT 0 +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE (0xF<<1) +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE_SHIFT 1 +#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV1 (0x1<<5) +#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV1_SHIFT 5 +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_SEQ_INIT (0x1<<6) +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_SEQ_INIT_SHIFT 6 +#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV2 (0x1<<7) +#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV2_SHIFT 7 + __le16 rsrv3; + __le32 verify_tx_seq; +}; + +/* + * tce_tx_wr_rx_rd $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_tx_wr_rx_rd { + union fcoe_tx_wr_rx_rd_union_ctx union_ctx; + struct fcoe_tce_tx_wr_rx_rd_const const_ctx; +}; + +/* + * tce_rx_wr_tx_rd_const $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_rx_wr_tx_rd_const { + __le32 data_2_trns; + __le32 init_flags; +#define FCOE_TCE_RX_WR_TX_RD_CONST_CID (0xFFFFFF<<0) +#define FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT 0 +#define FCOE_TCE_RX_WR_TX_RD_CONST_RSRV0 (0xFF<<24) +#define FCOE_TCE_RX_WR_TX_RD_CONST_RSRV0_SHIFT 24 +}; + +/* + * tce_rx_wr_tx_rd_var $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_rx_wr_tx_rd_var { + __le16 rx_flags; +#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV1 (0xF<<0) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV1_SHIFT 0 +#define FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE (0x7<<4) +#define FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE_SHIFT 4 +#define FCOE_TCE_RX_WR_TX_RD_VAR_CONF_REQ (0x1<<7) +#define FCOE_TCE_RX_WR_TX_RD_VAR_CONF_REQ_SHIFT 7 +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE (0xF<<8) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE_SHIFT 8 +#define FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME (0x1<<12) +#define FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME_SHIFT 12 +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_SEQ_INIT (0x1<<13) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_SEQ_INIT_SHIFT 13 +#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV2 (0x1<<14) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV2_SHIFT 14 +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_VALID (0x1<<15) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_VALID_SHIFT 15 + __le16 rx_id; + struct fcoe_fcp_xfr_rdy_payload fcp_xfr_rdy; +}; + +/* + * tce_rx_wr_tx_rd $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_rx_wr_tx_rd { + struct fcoe_tce_rx_wr_tx_rd_const const_ctx; + struct fcoe_tce_rx_wr_tx_rd_var var_ctx; +}; + +/* + * tce_rx_only $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_rx_only { + struct fcoe_rx_seq_ctx rx_seq_ctx; + union fcoe_rx_wr_union_ctx union_ctx; +}; + +/* + * task_ctx_entry $$KEEP_ENDIANNESS$$ + */ +struct fcoe_task_ctx_entry { + struct fcoe_tce_tx_only txwr_only; + struct fcoe_tce_tx_wr_rx_rd txwr_rxrd; + struct fcoe_tce_rx_wr_tx_rd rxwr_txrd; + struct fcoe_tce_rx_only rxwr_only; +}; + + + + + + + + + + +/* + * FCoE XFRQ element $$KEEP_ENDIANNESS$$ + */ +struct fcoe_xfrqe { + __le16 wqe; +#define FCOE_XFRQE_TASK_ID (0x7FFF<<0) +#define FCOE_XFRQE_TASK_ID_SHIFT 0 +#define FCOE_XFRQE_TOGGLE_BIT (0x1<<15) +#define FCOE_XFRQE_TOGGLE_BIT_SHIFT 15 +}; + + +/* + * fcoe rx doorbell message sent to the chip $$KEEP_ENDIANNESS$$ + */ +struct b577xx_fcoe_rx_doorbell { + struct b577xx_doorbell_hdr hdr; + u8 params; +#define B577XX_FCOE_RX_DOORBELL_NEGATIVE_ARM (0x1F<<0) +#define B577XX_FCOE_RX_DOORBELL_NEGATIVE_ARM_SHIFT 0 +#define B577XX_FCOE_RX_DOORBELL_OPCODE (0x7<<5) +#define B577XX_FCOE_RX_DOORBELL_OPCODE_SHIFT 5 + __le16 doorbell_cq_cons; +}; + + +/* + * FCoE CONFQ element $$KEEP_ENDIANNESS$$ + */ +struct fcoe_confqe { + __le16 ox_id; + __le16 rx_id; + __le32 param; +}; + + +/* + * FCoE conection data base + */ +struct fcoe_conn_db { +#if defined(__BIG_ENDIAN) + u16 rsrv0; + u16 rq_prod; +#elif defined(__LITTLE_ENDIAN) + u16 rq_prod; + u16 rsrv0; +#endif + u32 rsrv1; + struct regpair cq_arm; +}; + + +/* + * FCoE CQ element $$KEEP_ENDIANNESS$$ + */ +struct fcoe_cqe { + __le16 wqe; +#define FCOE_CQE_CQE_INFO (0x3FFF<<0) +#define FCOE_CQE_CQE_INFO_SHIFT 0 +#define FCOE_CQE_CQE_TYPE (0x1<<14) +#define FCOE_CQE_CQE_TYPE_SHIFT 14 +#define FCOE_CQE_TOGGLE_BIT (0x1<<15) +#define FCOE_CQE_TOGGLE_BIT_SHIFT 15 +}; + + +/* + * FCoE error/warning reporting entry $$KEEP_ENDIANNESS$$ + */ +struct fcoe_partial_err_report_entry { + __le32 err_warn_bitmap_lo; + __le32 err_warn_bitmap_hi; + __le32 tx_buf_off; + __le32 rx_buf_off; +}; + +/* + * FCoE error/warning reporting entry $$KEEP_ENDIANNESS$$ + */ +struct fcoe_err_report_entry { + struct fcoe_partial_err_report_entry data; + struct fcoe_fc_hdr fc_hdr; +}; + + +/* + * FCoE hash table entry (32 bytes) $$KEEP_ENDIANNESS$$ + */ +struct fcoe_hash_table_entry { + u8 s_id_0; + u8 s_id_1; + u8 s_id_2; + u8 d_id_0; + u8 d_id_1; + u8 d_id_2; + __le16 dst_mac_addr_hi; + __le16 dst_mac_addr_mid; + __le16 dst_mac_addr_lo; + __le16 src_mac_addr_hi; + __le16 vlan_id; + __le16 src_mac_addr_lo; + __le16 src_mac_addr_mid; + u8 vlan_flag; + u8 reserved0; + __le16 reserved1; + __le32 reserved2; + __le32 field_id; +#define FCOE_HASH_TABLE_ENTRY_CID (0xFFFFFF<<0) +#define FCOE_HASH_TABLE_ENTRY_CID_SHIFT 0 +#define FCOE_HASH_TABLE_ENTRY_RESERVED3 (0x7F<<24) +#define FCOE_HASH_TABLE_ENTRY_RESERVED3_SHIFT 24 +#define FCOE_HASH_TABLE_ENTRY_VALID (0x1<<31) +#define FCOE_HASH_TABLE_ENTRY_VALID_SHIFT 31 +}; + + +/* + * FCoE LCQ element $$KEEP_ENDIANNESS$$ + */ +struct fcoe_lcqe { + __le32 wqe; +#define FCOE_LCQE_TASK_ID (0xFFFF<<0) +#define FCOE_LCQE_TASK_ID_SHIFT 0 +#define FCOE_LCQE_LCQE_TYPE (0xFF<<16) +#define FCOE_LCQE_LCQE_TYPE_SHIFT 16 +#define FCOE_LCQE_RESERVED (0xFF<<24) +#define FCOE_LCQE_RESERVED_SHIFT 24 +}; + + + +/* + * FCoE pending work request CQE $$KEEP_ENDIANNESS$$ + */ +struct fcoe_pend_wq_cqe { + __le16 wqe; +#define FCOE_PEND_WQ_CQE_TASK_ID (0x3FFF<<0) +#define FCOE_PEND_WQ_CQE_TASK_ID_SHIFT 0 +#define FCOE_PEND_WQ_CQE_CQE_TYPE (0x1<<14) +#define FCOE_PEND_WQ_CQE_CQE_TYPE_SHIFT 14 +#define FCOE_PEND_WQ_CQE_TOGGLE_BIT (0x1<<15) +#define FCOE_PEND_WQ_CQE_TOGGLE_BIT_SHIFT 15 +}; + + +/* + * FCoE RX statistics parameters section#0 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section0 { + __le32 fcoe_rx_pkt_cnt; + __le32 fcoe_rx_byte_cnt; +}; + + +/* + * FCoE RX statistics parameters section#1 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section1 { + __le32 fcoe_ver_cnt; + __le32 fcoe_rx_drop_pkt_cnt; +}; + + +/* + * FCoE RX statistics parameters section#2 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section2 { + __le32 fc_crc_cnt; + __le32 eofa_del_cnt; + __le32 miss_frame_cnt; + __le32 seq_timeout_cnt; + __le32 drop_seq_cnt; + __le32 fcoe_rx_drop_pkt_cnt; + __le32 fcp_rx_pkt_cnt; + __le32 reserved0; +}; + + +/* + * FCoE TX statistics parameters $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tx_stat_params { + __le32 fcoe_tx_pkt_cnt; + __le32 fcoe_tx_byte_cnt; + __le32 fcp_tx_pkt_cnt; + __le32 reserved0; +}; + +/* + * FCoE statistics parameters $$KEEP_ENDIANNESS$$ + */ +struct fcoe_statistics_params { + struct fcoe_tx_stat_params tx_stat; + struct fcoe_rx_stat_params_section0 rx_stat0; + struct fcoe_rx_stat_params_section1 rx_stat1; + struct fcoe_rx_stat_params_section2 rx_stat2; +}; + + +/* + * FCoE t2 hash table entry (64 bytes) $$KEEP_ENDIANNESS$$ + */ +struct fcoe_t2_hash_table_entry { + struct fcoe_hash_table_entry data; + struct regpair next; + struct regpair reserved0[3]; +}; + + + +/* + * FCoE unsolicited CQE $$KEEP_ENDIANNESS$$ + */ +struct fcoe_unsolicited_cqe { + __le16 wqe; +#define FCOE_UNSOLICITED_CQE_SUBTYPE (0x3<<0) +#define FCOE_UNSOLICITED_CQE_SUBTYPE_SHIFT 0 +#define FCOE_UNSOLICITED_CQE_PKT_LEN (0xFFF<<2) +#define FCOE_UNSOLICITED_CQE_PKT_LEN_SHIFT 2 +#define FCOE_UNSOLICITED_CQE_CQE_TYPE (0x1<<14) +#define FCOE_UNSOLICITED_CQE_CQE_TYPE_SHIFT 14 +#define FCOE_UNSOLICITED_CQE_TOGGLE_BIT (0x1<<15) +#define FCOE_UNSOLICITED_CQE_TOGGLE_BIT_SHIFT 15 +}; + +#endif /* __57XX_FCOE_HSI_LINUX_LE__ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/57xx_iscsi_constants.h b/vmkdrivers/src_9/drivers/net/bnx2/57xx_iscsi_constants.h index 267cad0..b209f0b 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/57xx_iscsi_constants.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/57xx_iscsi_constants.h @@ -1,155 +1,155 @@ -/* 57xx_iscsi_constants.h: Broadcom NetXtreme II iSCSI driver. - * - * Copyright (c) 2006 - 2010 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation. - */ -#ifndef __57XX_ISCSI_CONSTANTS_H_ -#define __57XX_ISCSI_CONSTANTS_H_ - -/** -* This file defines HSI constants for the iSCSI flows -*/ - -/* iSCSI request op codes */ -#define ISCSI_OPCODE_CLEANUP_REQUEST (7) - -/* iSCSI response/messages op codes */ -#define ISCSI_OPCODE_CLEANUP_RESPONSE (0x27) -#define ISCSI_OPCODE_NOPOUT_LOCAL_COMPLETION (0) - -/* iSCSI task types */ -#define ISCSI_TASK_TYPE_READ (0) -#define ISCSI_TASK_TYPE_WRITE (1) -#define ISCSI_TASK_TYPE_MPATH (2) - -/* initial CQ sequence numbers */ -#define ISCSI_INITIAL_SN (1) - -/* KWQ (kernel work queue) layer codes */ -#define ISCSI_KWQE_LAYER_CODE (6) - -/* KWQ (kernel work queue) request op codes */ -#define ISCSI_KWQE_OPCODE_OFFLOAD_CONN1 (0) -#define ISCSI_KWQE_OPCODE_OFFLOAD_CONN2 (1) -#define ISCSI_KWQE_OPCODE_UPDATE_CONN (2) -#define ISCSI_KWQE_OPCODE_DESTROY_CONN (3) -#define ISCSI_KWQE_OPCODE_INIT1 (4) -#define ISCSI_KWQE_OPCODE_INIT2 (5) - -/* KCQ (kernel completion queue) response op codes */ -#define ISCSI_KCQE_OPCODE_OFFLOAD_CONN (0x10) -#define ISCSI_KCQE_OPCODE_UPDATE_CONN (0x12) -#define ISCSI_KCQE_OPCODE_DESTROY_CONN (0x13) -#define ISCSI_KCQE_OPCODE_INIT (0x14) -#define ISCSI_KCQE_OPCODE_FW_CLEAN_TASK (0x15) -#define ISCSI_KCQE_OPCODE_TCP_RESET (0x16) -#define ISCSI_KCQE_OPCODE_TCP_SYN (0x17) -#define ISCSI_KCQE_OPCODE_TCP_FIN (0X18) -#define ISCSI_KCQE_OPCODE_TCP_ERROR (0x19) -#define ISCSI_KCQE_OPCODE_CQ_EVENT_NOTIFICATION (0x20) -#define ISCSI_KCQE_OPCODE_ISCSI_ERROR (0x21) - -/* KCQ (kernel completion queue) completion status */ -#define ISCSI_KCQE_COMPLETION_STATUS_SUCCESS (0x0) -#define ISCSI_KCQE_COMPLETION_STATUS_INVALID_OPCODE (0x1) -#define ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE (0x2) -#define ISCSI_KCQE_COMPLETION_STATUS_CTX_FREE_FAILURE (0x3) -#define ISCSI_KCQE_COMPLETION_STATUS_NIC_ERROR (0x4) - -#define ISCSI_KCQE_COMPLETION_STATUS_HDR_DIG_ERR (0x5) -#define ISCSI_KCQE_COMPLETION_STATUS_DATA_DIG_ERR (0x6) - -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_UNEXPECTED_OPCODE (0xa) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_OPCODE (0xb) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_AHS_LEN (0xc) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_ITT (0xd) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_STATSN (0xe) - -/* Response */ -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_EXP_DATASN (0xf) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_PEND_R2T (0x10) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DATA_SEG_LEN_IS_ZERO (0x2c) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DATA_SEG_LEN_TOO_BIG (0x2d) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_0 (0x11) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_1 (0x12) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_2 (0x13) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_3 (0x14) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_4 (0x15) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_5 (0x16) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_6 (0x17) - -/* Data-In */ -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_REMAIN_RCV_LEN (0x18) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_MAX_RCV_PDU_LEN (0x19) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_F_BIT_ZERO (0x1a) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_TTT_NOT_RSRV (0x1b) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DATASN (0x1c) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_REMAIN_BURST_LEN (0x1d) - -/* R2T */ -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_BUFFER_OFF (0x1f) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_LUN (0x20) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_R2TSN (0x21) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DESIRED_DATA_TRNS_LEN_0 (0x22) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DESIRED_DATA_TRNS_LEN_1 (0x23) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_PEND_R2T_EXCEED (0x24) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_TTT_IS_RSRV (0x25) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_MAX_BURST_LEN (0x26) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DATA_SEG_LEN_NOT_ZERO (0x27) - -/* TMF */ -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_REJECT_PDU_LEN (0x28) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_ASYNC_PDU_LEN (0x29) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_NOPIN_PDU_LEN (0x2a) -#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_PEND_R2T_IN_CLEANUP (0x2b) - -/* IP/TCP processing errors: */ -#define ISCI_KCQE_COMPLETION_STATUS_TCP_ERROR_IP_FRAGMENT (0x40) -#define ISCI_KCQE_COMPLETION_STATUS_TCP_ERROR_IP_OPTIONS (0x41) -#define ISCI_KCQE_COMPLETION_STATUS_TCP_ERROR_URGENT_FLAG (0x42) -#define ISCI_KCQE_COMPLETION_STATUS_TCP_ERROR_MAX_RTRANS (0x43) - -/* iSCSI licensing errors */ -/* general iSCSI license not installed */ -#define ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED (0x50) -/* additional LOM specific iSCSI license not installed */ -#define ISCSI_KCQE_COMPLETION_STATUS_LOM_ISCSI_NOT_ENABLED (0x51) - -#define ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY (0x80) - -/* SQ/RQ/CQ DB structure sizes */ -#define ISCSI_SQ_DB_SIZE (16) -#define ISCSI_RQ_DB_SIZE (16) -#define ISCSI_CQ_DB_SIZE (80) - -#define ISCSI_SQN_TO_NOTIFY_NOT_VALID 0xFFFF - -/* Page size codes (for flags field in connection offload request) */ -#define ISCSI_PAGE_SIZE_256 (0) -#define ISCSI_PAGE_SIZE_512 (1) -#define ISCSI_PAGE_SIZE_1K (2) -#define ISCSI_PAGE_SIZE_2K (3) -#define ISCSI_PAGE_SIZE_4K (4) -#define ISCSI_PAGE_SIZE_8K (5) -#define ISCSI_PAGE_SIZE_16K (6) -#define ISCSI_PAGE_SIZE_32K (7) -#define ISCSI_PAGE_SIZE_64K (8) -#define ISCSI_PAGE_SIZE_128K (9) -#define ISCSI_PAGE_SIZE_256K (10) -#define ISCSI_PAGE_SIZE_512K (11) -#define ISCSI_PAGE_SIZE_1M (12) -#define ISCSI_PAGE_SIZE_2M (13) -#define ISCSI_PAGE_SIZE_4M (14) -#define ISCSI_PAGE_SIZE_8M (15) - -/* Iscsi PDU related defines */ -#define ISCSI_HEADER_SIZE (48) -#define ISCSI_DIGEST_SHIFT (2) -#define ISCSI_DIGEST_SIZE (4) - -#define B577XX_ISCSI_CONNECTION_TYPE 3 - -#endif /*__57XX_ISCSI_CONSTANTS_H_ */ +/* 57xx_iscsi_constants.h: Broadcom NetXtreme II iSCSI driver. + * + * Copyright (c) 2006 - 2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + */ +#ifndef __57XX_ISCSI_CONSTANTS_H_ +#define __57XX_ISCSI_CONSTANTS_H_ + +/** +* This file defines HSI constants for the iSCSI flows +*/ + +/* iSCSI request op codes */ +#define ISCSI_OPCODE_CLEANUP_REQUEST (7) + +/* iSCSI response/messages op codes */ +#define ISCSI_OPCODE_CLEANUP_RESPONSE (0x27) +#define ISCSI_OPCODE_NOPOUT_LOCAL_COMPLETION (0) + +/* iSCSI task types */ +#define ISCSI_TASK_TYPE_READ (0) +#define ISCSI_TASK_TYPE_WRITE (1) +#define ISCSI_TASK_TYPE_MPATH (2) + +/* initial CQ sequence numbers */ +#define ISCSI_INITIAL_SN (1) + +/* KWQ (kernel work queue) layer codes */ +#define ISCSI_KWQE_LAYER_CODE (6) + +/* KWQ (kernel work queue) request op codes */ +#define ISCSI_KWQE_OPCODE_OFFLOAD_CONN1 (0) +#define ISCSI_KWQE_OPCODE_OFFLOAD_CONN2 (1) +#define ISCSI_KWQE_OPCODE_UPDATE_CONN (2) +#define ISCSI_KWQE_OPCODE_DESTROY_CONN (3) +#define ISCSI_KWQE_OPCODE_INIT1 (4) +#define ISCSI_KWQE_OPCODE_INIT2 (5) + +/* KCQ (kernel completion queue) response op codes */ +#define ISCSI_KCQE_OPCODE_OFFLOAD_CONN (0x10) +#define ISCSI_KCQE_OPCODE_UPDATE_CONN (0x12) +#define ISCSI_KCQE_OPCODE_DESTROY_CONN (0x13) +#define ISCSI_KCQE_OPCODE_INIT (0x14) +#define ISCSI_KCQE_OPCODE_FW_CLEAN_TASK (0x15) +#define ISCSI_KCQE_OPCODE_TCP_RESET (0x16) +#define ISCSI_KCQE_OPCODE_TCP_SYN (0x17) +#define ISCSI_KCQE_OPCODE_TCP_FIN (0X18) +#define ISCSI_KCQE_OPCODE_TCP_ERROR (0x19) +#define ISCSI_KCQE_OPCODE_CQ_EVENT_NOTIFICATION (0x20) +#define ISCSI_KCQE_OPCODE_ISCSI_ERROR (0x21) + +/* KCQ (kernel completion queue) completion status */ +#define ISCSI_KCQE_COMPLETION_STATUS_SUCCESS (0x0) +#define ISCSI_KCQE_COMPLETION_STATUS_INVALID_OPCODE (0x1) +#define ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE (0x2) +#define ISCSI_KCQE_COMPLETION_STATUS_CTX_FREE_FAILURE (0x3) +#define ISCSI_KCQE_COMPLETION_STATUS_NIC_ERROR (0x4) + +#define ISCSI_KCQE_COMPLETION_STATUS_HDR_DIG_ERR (0x5) +#define ISCSI_KCQE_COMPLETION_STATUS_DATA_DIG_ERR (0x6) + +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_UNEXPECTED_OPCODE (0xa) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_OPCODE (0xb) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_AHS_LEN (0xc) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_ITT (0xd) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_STATSN (0xe) + +/* Response */ +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_EXP_DATASN (0xf) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_PEND_R2T (0x10) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DATA_SEG_LEN_IS_ZERO (0x2c) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DATA_SEG_LEN_TOO_BIG (0x2d) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_0 (0x11) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_1 (0x12) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_2 (0x13) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_3 (0x14) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_4 (0x15) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_5 (0x16) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_O_U_6 (0x17) + +/* Data-In */ +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_REMAIN_RCV_LEN (0x18) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_MAX_RCV_PDU_LEN (0x19) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_F_BIT_ZERO (0x1a) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_TTT_NOT_RSRV (0x1b) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DATASN (0x1c) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_REMAIN_BURST_LEN (0x1d) + +/* R2T */ +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_BUFFER_OFF (0x1f) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_LUN (0x20) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_R2TSN (0x21) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DESIRED_DATA_TRNS_LEN_0 (0x22) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DESIRED_DATA_TRNS_LEN_1 (0x23) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_PEND_R2T_EXCEED (0x24) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_TTT_IS_RSRV (0x25) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_MAX_BURST_LEN (0x26) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_DATA_SEG_LEN_NOT_ZERO (0x27) + +/* TMF */ +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_REJECT_PDU_LEN (0x28) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_ASYNC_PDU_LEN (0x29) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_NOPIN_PDU_LEN (0x2a) +#define ISCSI_KCQE_COMPLETION_STATUS_PROTOCOL_ERR_PEND_R2T_IN_CLEANUP (0x2b) + +/* IP/TCP processing errors: */ +#define ISCI_KCQE_COMPLETION_STATUS_TCP_ERROR_IP_FRAGMENT (0x40) +#define ISCI_KCQE_COMPLETION_STATUS_TCP_ERROR_IP_OPTIONS (0x41) +#define ISCI_KCQE_COMPLETION_STATUS_TCP_ERROR_URGENT_FLAG (0x42) +#define ISCI_KCQE_COMPLETION_STATUS_TCP_ERROR_MAX_RTRANS (0x43) + +/* iSCSI licensing errors */ +/* general iSCSI license not installed */ +#define ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED (0x50) +/* additional LOM specific iSCSI license not installed */ +#define ISCSI_KCQE_COMPLETION_STATUS_LOM_ISCSI_NOT_ENABLED (0x51) + +#define ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY (0x80) + +/* SQ/RQ/CQ DB structure sizes */ +#define ISCSI_SQ_DB_SIZE (16) +#define ISCSI_RQ_DB_SIZE (64) +#define ISCSI_CQ_DB_SIZE (80) + +#define ISCSI_SQN_TO_NOTIFY_NOT_VALID 0xFFFF + +/* Page size codes (for flags field in connection offload request) */ +#define ISCSI_PAGE_SIZE_256 (0) +#define ISCSI_PAGE_SIZE_512 (1) +#define ISCSI_PAGE_SIZE_1K (2) +#define ISCSI_PAGE_SIZE_2K (3) +#define ISCSI_PAGE_SIZE_4K (4) +#define ISCSI_PAGE_SIZE_8K (5) +#define ISCSI_PAGE_SIZE_16K (6) +#define ISCSI_PAGE_SIZE_32K (7) +#define ISCSI_PAGE_SIZE_64K (8) +#define ISCSI_PAGE_SIZE_128K (9) +#define ISCSI_PAGE_SIZE_256K (10) +#define ISCSI_PAGE_SIZE_512K (11) +#define ISCSI_PAGE_SIZE_1M (12) +#define ISCSI_PAGE_SIZE_2M (13) +#define ISCSI_PAGE_SIZE_4M (14) +#define ISCSI_PAGE_SIZE_8M (15) + +/* Iscsi PDU related defines */ +#define ISCSI_HEADER_SIZE (48) +#define ISCSI_DIGEST_SHIFT (2) +#define ISCSI_DIGEST_SIZE (4) + +#define B577XX_ISCSI_CONNECTION_TYPE 3 + +#endif /*__57XX_ISCSI_CONSTANTS_H_ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/57xx_iscsi_hsi.h b/vmkdrivers/src_9/drivers/net/bnx2/57xx_iscsi_hsi.h index 08399a6..4ec258e 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/57xx_iscsi_hsi.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/57xx_iscsi_hsi.h @@ -1,1524 +1,1532 @@ -/* 57xx_iscsi_hsi.h: Broadcom NetXtreme II iSCSI driver. - * - * Copyright (c) 2006 - 2010 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation. - */ -#ifndef __57XX_ISCSI_HSI_LINUX_LE__ -#define __57XX_ISCSI_HSI_LINUX_LE__ - -/* - * iSCSI Async CQE - */ -struct iscsi_async_msg { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 reserved1; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 reserved1; - u8 op_code; -#endif - u32 reserved2; - u32 exp_cmd_sn; - u32 max_cmd_sn; - u32 reserved3[2]; -#if defined(__BIG_ENDIAN) - u16 reserved5; - u8 err_code; - u8 reserved4; -#elif defined(__LITTLE_ENDIAN) - u8 reserved4; - u8 err_code; - u16 reserved5; -#endif - u32 reserved6; - u32 lun[2]; -#if defined(__BIG_ENDIAN) - u8 async_event; - u8 async_vcode; - u16 param1; -#elif defined(__LITTLE_ENDIAN) - u16 param1; - u8 async_vcode; - u8 async_event; -#endif -#if defined(__BIG_ENDIAN) - u16 param2; - u16 param3; -#elif defined(__LITTLE_ENDIAN) - u16 param3; - u16 param2; -#endif - u32 reserved7[3]; - u32 cq_req_sn; -}; - - -/* - * iSCSI Buffer Descriptor (BD) - */ -struct iscsi_bd { - u32 buffer_addr_hi; - u32 buffer_addr_lo; -#if defined(__BIG_ENDIAN) - u16 reserved0; - u16 buffer_length; -#elif defined(__LITTLE_ENDIAN) - u16 buffer_length; - u16 reserved0; -#endif -#if defined(__BIG_ENDIAN) - u16 reserved3; - u16 flags; -#define ISCSI_BD_RESERVED1 (0x3F<<0) -#define ISCSI_BD_RESERVED1_SHIFT 0 -#define ISCSI_BD_LAST_IN_BD_CHAIN (0x1<<6) -#define ISCSI_BD_LAST_IN_BD_CHAIN_SHIFT 6 -#define ISCSI_BD_FIRST_IN_BD_CHAIN (0x1<<7) -#define ISCSI_BD_FIRST_IN_BD_CHAIN_SHIFT 7 -#define ISCSI_BD_RESERVED2 (0xFF<<8) -#define ISCSI_BD_RESERVED2_SHIFT 8 -#elif defined(__LITTLE_ENDIAN) - u16 flags; -#define ISCSI_BD_RESERVED1 (0x3F<<0) -#define ISCSI_BD_RESERVED1_SHIFT 0 -#define ISCSI_BD_LAST_IN_BD_CHAIN (0x1<<6) -#define ISCSI_BD_LAST_IN_BD_CHAIN_SHIFT 6 -#define ISCSI_BD_FIRST_IN_BD_CHAIN (0x1<<7) -#define ISCSI_BD_FIRST_IN_BD_CHAIN_SHIFT 7 -#define ISCSI_BD_RESERVED2 (0xFF<<8) -#define ISCSI_BD_RESERVED2_SHIFT 8 - u16 reserved3; -#endif -}; - - -/* - * iSCSI Cleanup SQ WQE - */ -struct iscsi_cleanup_request { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 reserved1; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 reserved1; - u8 op_code; -#endif - u32 reserved2[3]; -#if defined(__BIG_ENDIAN) - u16 reserved3; - u16 itt; -#define ISCSI_CLEANUP_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_CLEANUP_REQUEST_INDEX_SHIFT 0 -#define ISCSI_CLEANUP_REQUEST_TYPE (0x3<<14) -#define ISCSI_CLEANUP_REQUEST_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_CLEANUP_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_CLEANUP_REQUEST_INDEX_SHIFT 0 -#define ISCSI_CLEANUP_REQUEST_TYPE (0x3<<14) -#define ISCSI_CLEANUP_REQUEST_TYPE_SHIFT 14 - u16 reserved3; -#endif - u32 reserved4[10]; -#if defined(__BIG_ENDIAN) - u8 cq_index; - u8 reserved6; - u16 reserved5; -#elif defined(__LITTLE_ENDIAN) - u16 reserved5; - u8 reserved6; - u8 cq_index; -#endif -}; - - -/* - * iSCSI Cleanup CQE - */ -struct iscsi_cleanup_response { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 status; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 status; - u8 op_code; -#endif - u32 reserved1[3]; - u32 reserved2[2]; -#if defined(__BIG_ENDIAN) - u16 reserved4; - u8 err_code; - u8 reserved3; -#elif defined(__LITTLE_ENDIAN) - u8 reserved3; - u8 err_code; - u16 reserved4; -#endif - u32 reserved5[7]; -#if defined(__BIG_ENDIAN) - u16 reserved6; - u16 itt; -#define ISCSI_CLEANUP_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_CLEANUP_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_CLEANUP_RESPONSE_TYPE (0x3<<14) -#define ISCSI_CLEANUP_RESPONSE_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_CLEANUP_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_CLEANUP_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_CLEANUP_RESPONSE_TYPE (0x3<<14) -#define ISCSI_CLEANUP_RESPONSE_TYPE_SHIFT 14 - u16 reserved6; -#endif - u32 cq_req_sn; -}; - - -/* - * SCSI read/write SQ WQE - */ -struct iscsi_cmd_request { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 op_attr; -#define ISCSI_CMD_REQUEST_TASK_ATTR (0x7<<0) -#define ISCSI_CMD_REQUEST_TASK_ATTR_SHIFT 0 -#define ISCSI_CMD_REQUEST_RESERVED1 (0x3<<3) -#define ISCSI_CMD_REQUEST_RESERVED1_SHIFT 3 -#define ISCSI_CMD_REQUEST_WRITE (0x1<<5) -#define ISCSI_CMD_REQUEST_WRITE_SHIFT 5 -#define ISCSI_CMD_REQUEST_READ (0x1<<6) -#define ISCSI_CMD_REQUEST_READ_SHIFT 6 -#define ISCSI_CMD_REQUEST_FINAL (0x1<<7) -#define ISCSI_CMD_REQUEST_FINAL_SHIFT 7 - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 op_attr; -#define ISCSI_CMD_REQUEST_TASK_ATTR (0x7<<0) -#define ISCSI_CMD_REQUEST_TASK_ATTR_SHIFT 0 -#define ISCSI_CMD_REQUEST_RESERVED1 (0x3<<3) -#define ISCSI_CMD_REQUEST_RESERVED1_SHIFT 3 -#define ISCSI_CMD_REQUEST_WRITE (0x1<<5) -#define ISCSI_CMD_REQUEST_WRITE_SHIFT 5 -#define ISCSI_CMD_REQUEST_READ (0x1<<6) -#define ISCSI_CMD_REQUEST_READ_SHIFT 6 -#define ISCSI_CMD_REQUEST_FINAL (0x1<<7) -#define ISCSI_CMD_REQUEST_FINAL_SHIFT 7 - u8 op_code; -#endif -#if defined(__BIG_ENDIAN) - u16 ud_buffer_offset; - u16 sd_buffer_offset; -#elif defined(__LITTLE_ENDIAN) - u16 sd_buffer_offset; - u16 ud_buffer_offset; -#endif - u32 lun[2]; -#if defined(__BIG_ENDIAN) - u16 reserved2; - u16 itt; -#define ISCSI_CMD_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_CMD_REQUEST_INDEX_SHIFT 0 -#define ISCSI_CMD_REQUEST_TYPE (0x3<<14) -#define ISCSI_CMD_REQUEST_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_CMD_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_CMD_REQUEST_INDEX_SHIFT 0 -#define ISCSI_CMD_REQUEST_TYPE (0x3<<14) -#define ISCSI_CMD_REQUEST_TYPE_SHIFT 14 - u16 reserved2; -#endif - u32 total_data_transfer_length; - u32 cmd_sn; - u32 reserved3; - u32 cdb[4]; - u32 zero_fill; - u32 bd_list_addr_lo; - u32 bd_list_addr_hi; -#if defined(__BIG_ENDIAN) - u8 cq_index; - u8 sd_start_bd_index; - u8 ud_start_bd_index; - u8 num_bds; -#elif defined(__LITTLE_ENDIAN) - u8 num_bds; - u8 ud_start_bd_index; - u8 sd_start_bd_index; - u8 cq_index; -#endif -}; - - -/* - * task statistics for write response - */ -struct iscsi_write_resp_task_stat { - u32 num_data_ins; -}; - -/* - * task statistics for read response - */ -struct iscsi_read_resp_task_stat { -#if defined(__BIG_ENDIAN) - u16 num_data_outs; - u16 num_r2ts; -#elif defined(__LITTLE_ENDIAN) - u16 num_r2ts; - u16 num_data_outs; -#endif -}; - -/* - * task statistics for iSCSI cmd response - */ -union iscsi_cmd_resp_task_stat { - struct iscsi_write_resp_task_stat write_stat; - struct iscsi_read_resp_task_stat read_stat; -}; - -/* - * SCSI Command CQE - */ -struct iscsi_cmd_response { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 response_flags; -#define ISCSI_CMD_RESPONSE_RESERVED0 (0x1<<0) -#define ISCSI_CMD_RESPONSE_RESERVED0_SHIFT 0 -#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW (0x1<<1) -#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW_SHIFT 1 -#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW (0x1<<2) -#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW_SHIFT 2 -#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW (0x1<<3) -#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW_SHIFT 3 -#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW (0x1<<4) -#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW_SHIFT 4 -#define ISCSI_CMD_RESPONSE_RESERVED1 (0x7<<5) -#define ISCSI_CMD_RESPONSE_RESERVED1_SHIFT 5 - u8 response; - u8 status; -#elif defined(__LITTLE_ENDIAN) - u8 status; - u8 response; - u8 response_flags; -#define ISCSI_CMD_RESPONSE_RESERVED0 (0x1<<0) -#define ISCSI_CMD_RESPONSE_RESERVED0_SHIFT 0 -#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW (0x1<<1) -#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW_SHIFT 1 -#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW (0x1<<2) -#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW_SHIFT 2 -#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW (0x1<<3) -#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW_SHIFT 3 -#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW (0x1<<4) -#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW_SHIFT 4 -#define ISCSI_CMD_RESPONSE_RESERVED1 (0x7<<5) -#define ISCSI_CMD_RESPONSE_RESERVED1_SHIFT 5 - u8 op_code; -#endif - u32 data_length; - u32 exp_cmd_sn; - u32 max_cmd_sn; - u32 reserved2; - u32 residual_count; -#if defined(__BIG_ENDIAN) - u16 reserved4; - u8 err_code; - u8 reserved3; -#elif defined(__LITTLE_ENDIAN) - u8 reserved3; - u8 err_code; - u16 reserved4; -#endif - u32 reserved5[5]; - union iscsi_cmd_resp_task_stat task_stat; - u32 reserved6; -#if defined(__BIG_ENDIAN) - u16 reserved7; - u16 itt; -#define ISCSI_CMD_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_CMD_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_CMD_RESPONSE_TYPE (0x3<<14) -#define ISCSI_CMD_RESPONSE_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_CMD_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_CMD_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_CMD_RESPONSE_TYPE (0x3<<14) -#define ISCSI_CMD_RESPONSE_TYPE_SHIFT 14 - u16 reserved7; -#endif - u32 cq_req_sn; -}; - - - -/* - * firmware middle-path request SQ WQE - */ -struct iscsi_fw_mp_request { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 op_attr; - u16 hdr_opaque1; -#elif defined(__LITTLE_ENDIAN) - u16 hdr_opaque1; - u8 op_attr; - u8 op_code; -#endif - u32 data_length; - u32 hdr_opaque2[2]; -#if defined(__BIG_ENDIAN) - u16 reserved0; - u16 itt; -#define ISCSI_FW_MP_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_FW_MP_REQUEST_INDEX_SHIFT 0 -#define ISCSI_FW_MP_REQUEST_TYPE (0x3<<14) -#define ISCSI_FW_MP_REQUEST_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_FW_MP_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_FW_MP_REQUEST_INDEX_SHIFT 0 -#define ISCSI_FW_MP_REQUEST_TYPE (0x3<<14) -#define ISCSI_FW_MP_REQUEST_TYPE_SHIFT 14 - u16 reserved0; -#endif - u32 hdr_opaque3[4]; - u32 resp_bd_list_addr_lo; - u32 resp_bd_list_addr_hi; - u32 resp_buffer; -#define ISCSI_FW_MP_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0) -#define ISCSI_FW_MP_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0 -#define ISCSI_FW_MP_REQUEST_NUM_RESP_BDS (0xFF<<24) -#define ISCSI_FW_MP_REQUEST_NUM_RESP_BDS_SHIFT 24 -#if defined(__BIG_ENDIAN) - u16 reserved4; - u8 reserved3; - u8 flags; -#define ISCSI_FW_MP_REQUEST_RESERVED1 (0x1<<0) -#define ISCSI_FW_MP_REQUEST_RESERVED1_SHIFT 0 -#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION (0x1<<1) -#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION_SHIFT 1 -#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2) -#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2 -#define ISCSI_FW_MP_REQUEST_RESERVED2 (0x1F<<3) -#define ISCSI_FW_MP_REQUEST_RESERVED2_SHIFT 3 -#elif defined(__LITTLE_ENDIAN) - u8 flags; -#define ISCSI_FW_MP_REQUEST_RESERVED1 (0x1<<0) -#define ISCSI_FW_MP_REQUEST_RESERVED1_SHIFT 0 -#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION (0x1<<1) -#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION_SHIFT 1 -#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2) -#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2 -#define ISCSI_FW_MP_REQUEST_RESERVED2 (0x1F<<3) -#define ISCSI_FW_MP_REQUEST_RESERVED2_SHIFT 3 - u8 reserved3; - u16 reserved4; -#endif - u32 bd_list_addr_lo; - u32 bd_list_addr_hi; -#if defined(__BIG_ENDIAN) - u8 cq_index; - u8 reserved6; - u8 reserved5; - u8 num_bds; -#elif defined(__LITTLE_ENDIAN) - u8 num_bds; - u8 reserved5; - u8 reserved6; - u8 cq_index; -#endif -}; - - -/* - * firmware response - CQE: used only by firmware - */ -struct iscsi_fw_response { - u32 hdr_dword1[2]; - u32 hdr_exp_cmd_sn; - u32 hdr_max_cmd_sn; - u32 hdr_ttt; - u32 hdr_res_cnt; - u32 cqe_flags; -#define ISCSI_FW_RESPONSE_RESERVED2 (0xFF<<0) -#define ISCSI_FW_RESPONSE_RESERVED2_SHIFT 0 -#define ISCSI_FW_RESPONSE_ERR_CODE (0xFF<<8) -#define ISCSI_FW_RESPONSE_ERR_CODE_SHIFT 8 -#define ISCSI_FW_RESPONSE_RESERVED3 (0xFFFF<<16) -#define ISCSI_FW_RESPONSE_RESERVED3_SHIFT 16 - u32 stat_sn; - u32 hdr_dword2[2]; - u32 hdr_dword3[2]; - u32 task_stat; - u32 reserved0; - u32 hdr_itt; - u32 cq_req_sn; -}; - - -/* - * iSCSI KCQ CQE parameters - */ -union iscsi_kcqe_params { - u32 reserved0[4]; -}; - -/* - * iSCSI KCQ CQE - */ -struct iscsi_kcqe { - u32 iscsi_conn_id; - u32 completion_status; - u32 iscsi_conn_context_id; - union iscsi_kcqe_params params; -#if defined(__BIG_ENDIAN) - u8 flags; -#define ISCSI_KCQE_RESERVED0 (0xF<<0) -#define ISCSI_KCQE_RESERVED0_SHIFT 0 -#define ISCSI_KCQE_LAYER_CODE (0x7<<4) -#define ISCSI_KCQE_LAYER_CODE_SHIFT 4 -#define ISCSI_KCQE_RESERVED1 (0x1<<7) -#define ISCSI_KCQE_RESERVED1_SHIFT 7 - u8 op_code; - u16 qe_self_seq; -#elif defined(__LITTLE_ENDIAN) - u16 qe_self_seq; - u8 op_code; - u8 flags; -#define ISCSI_KCQE_RESERVED0 (0xF<<0) -#define ISCSI_KCQE_RESERVED0_SHIFT 0 -#define ISCSI_KCQE_LAYER_CODE (0x7<<4) -#define ISCSI_KCQE_LAYER_CODE_SHIFT 4 -#define ISCSI_KCQE_RESERVED1 (0x1<<7) -#define ISCSI_KCQE_RESERVED1_SHIFT 7 -#endif -}; - - - -/* - * iSCSI KWQE header - */ -struct iscsi_kwqe_header { -#if defined(__BIG_ENDIAN) - u8 flags; -#define ISCSI_KWQE_HEADER_RESERVED0 (0xF<<0) -#define ISCSI_KWQE_HEADER_RESERVED0_SHIFT 0 -#define ISCSI_KWQE_HEADER_LAYER_CODE (0x7<<4) -#define ISCSI_KWQE_HEADER_LAYER_CODE_SHIFT 4 -#define ISCSI_KWQE_HEADER_RESERVED1 (0x1<<7) -#define ISCSI_KWQE_HEADER_RESERVED1_SHIFT 7 - u8 op_code; -#elif defined(__LITTLE_ENDIAN) - u8 op_code; - u8 flags; -#define ISCSI_KWQE_HEADER_RESERVED0 (0xF<<0) -#define ISCSI_KWQE_HEADER_RESERVED0_SHIFT 0 -#define ISCSI_KWQE_HEADER_LAYER_CODE (0x7<<4) -#define ISCSI_KWQE_HEADER_LAYER_CODE_SHIFT 4 -#define ISCSI_KWQE_HEADER_RESERVED1 (0x1<<7) -#define ISCSI_KWQE_HEADER_RESERVED1_SHIFT 7 -#endif -}; - -/* - * iSCSI firmware init request 1 - */ -struct iscsi_kwqe_init1 { -#if defined(__BIG_ENDIAN) - struct iscsi_kwqe_header hdr; - u8 reserved0; - u8 num_cqs; -#elif defined(__LITTLE_ENDIAN) - u8 num_cqs; - u8 reserved0; - struct iscsi_kwqe_header hdr; -#endif - u32 dummy_buffer_addr_lo; - u32 dummy_buffer_addr_hi; -#if defined(__BIG_ENDIAN) - u16 num_ccells_per_conn; - u16 num_tasks_per_conn; -#elif defined(__LITTLE_ENDIAN) - u16 num_tasks_per_conn; - u16 num_ccells_per_conn; -#endif -#if defined(__BIG_ENDIAN) - u16 sq_wqes_per_page; - u16 sq_num_wqes; -#elif defined(__LITTLE_ENDIAN) - u16 sq_num_wqes; - u16 sq_wqes_per_page; -#endif -#if defined(__BIG_ENDIAN) - u8 cq_log_wqes_per_page; - u8 flags; -#define ISCSI_KWQE_INIT1_PAGE_SIZE (0xF<<0) -#define ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT 0 -#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE (0x1<<4) -#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE_SHIFT 4 -#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE (0x1<<5) -#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE_SHIFT 5 -#define ISCSI_KWQE_INIT1_RESERVED1 (0x3<<6) -#define ISCSI_KWQE_INIT1_RESERVED1_SHIFT 6 - u16 cq_num_wqes; -#elif defined(__LITTLE_ENDIAN) - u16 cq_num_wqes; - u8 flags; -#define ISCSI_KWQE_INIT1_PAGE_SIZE (0xF<<0) -#define ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT 0 -#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE (0x1<<4) -#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE_SHIFT 4 -#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE (0x1<<5) -#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE_SHIFT 5 -#define ISCSI_KWQE_INIT1_RESERVED1 (0x3<<6) -#define ISCSI_KWQE_INIT1_RESERVED1_SHIFT 6 - u8 cq_log_wqes_per_page; -#endif -#if defined(__BIG_ENDIAN) - u16 cq_num_pages; - u16 sq_num_pages; -#elif defined(__LITTLE_ENDIAN) - u16 sq_num_pages; - u16 cq_num_pages; -#endif -#if defined(__BIG_ENDIAN) - u16 rq_buffer_size; - u16 rq_num_wqes; -#elif defined(__LITTLE_ENDIAN) - u16 rq_num_wqes; - u16 rq_buffer_size; -#endif -}; - -/* - * iSCSI firmware init request 2 - */ -struct iscsi_kwqe_init2 { -#if defined(__BIG_ENDIAN) - struct iscsi_kwqe_header hdr; - u16 max_cq_sqn; -#elif defined(__LITTLE_ENDIAN) - u16 max_cq_sqn; - struct iscsi_kwqe_header hdr; -#endif - u32 error_bit_map[2]; - u32 reserved1[5]; -}; - -/* - * Initial iSCSI connection offload request 1 - */ -struct iscsi_kwqe_conn_offload1 { -#if defined(__BIG_ENDIAN) - struct iscsi_kwqe_header hdr; - u16 iscsi_conn_id; -#elif defined(__LITTLE_ENDIAN) - u16 iscsi_conn_id; - struct iscsi_kwqe_header hdr; -#endif - u32 sq_page_table_addr_lo; - u32 sq_page_table_addr_hi; - u32 cq_page_table_addr_lo; - u32 cq_page_table_addr_hi; - u32 reserved0[3]; -}; - -/* - * iSCSI Page Table Entry (PTE) - */ -struct iscsi_pte { - u32 hi; - u32 lo; -}; - -/* - * Initial iSCSI connection offload request 2 - */ -struct iscsi_kwqe_conn_offload2 { -#if defined(__BIG_ENDIAN) - struct iscsi_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct iscsi_kwqe_header hdr; -#endif - u32 rq_page_table_addr_lo; - u32 rq_page_table_addr_hi; - struct iscsi_pte sq_first_pte; - struct iscsi_pte cq_first_pte; - u32 num_additional_wqes; -}; - - -/* - * Initial iSCSI connection offload request 3 - */ -struct iscsi_kwqe_conn_offload3 { -#if defined(__BIG_ENDIAN) - struct iscsi_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct iscsi_kwqe_header hdr; -#endif - u32 reserved1; - struct iscsi_pte qp_first_pte[3]; -}; - - -/* - * iSCSI connection update request - */ -struct iscsi_kwqe_conn_update { -#if defined(__BIG_ENDIAN) - struct iscsi_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct iscsi_kwqe_header hdr; -#endif -#if defined(__BIG_ENDIAN) - u8 session_error_recovery_level; - u8 max_outstanding_r2ts; - u8 reserved2; - u8 conn_flags; -#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST (0x1<<0) -#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST_SHIFT 0 -#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST (0x1<<1) -#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST_SHIFT 1 -#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T (0x1<<2) -#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T_SHIFT 2 -#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA (0x1<<3) -#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA_SHIFT 3 -#define ISCSI_KWQE_CONN_UPDATE_RESERVED1 (0xF<<4) -#define ISCSI_KWQE_CONN_UPDATE_RESERVED1_SHIFT 4 -#elif defined(__LITTLE_ENDIAN) - u8 conn_flags; -#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST (0x1<<0) -#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST_SHIFT 0 -#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST (0x1<<1) -#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST_SHIFT 1 -#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T (0x1<<2) -#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T_SHIFT 2 -#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA (0x1<<3) -#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA_SHIFT 3 -#define ISCSI_KWQE_CONN_UPDATE_RESERVED1 (0xF<<4) -#define ISCSI_KWQE_CONN_UPDATE_RESERVED1_SHIFT 4 - u8 reserved2; - u8 max_outstanding_r2ts; - u8 session_error_recovery_level; -#endif - u32 context_id; - u32 max_send_pdu_length; - u32 max_recv_pdu_length; - u32 first_burst_length; - u32 max_burst_length; - u32 exp_stat_sn; -}; - -/* - * iSCSI destroy connection request - */ -struct iscsi_kwqe_conn_destroy { -#if defined(__BIG_ENDIAN) - struct iscsi_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct iscsi_kwqe_header hdr; -#endif - u32 context_id; - u32 reserved1[6]; -}; - -/* - * iSCSI KWQ WQE - */ -union iscsi_kwqe { - struct iscsi_kwqe_init1 init1; - struct iscsi_kwqe_init2 init2; - struct iscsi_kwqe_conn_offload1 conn_offload1; - struct iscsi_kwqe_conn_offload2 conn_offload2; - struct iscsi_kwqe_conn_update conn_update; - struct iscsi_kwqe_conn_destroy conn_destroy; -}; - - - - - - - - - -/* - * iSCSI Login SQ WQE - */ -struct iscsi_login_request { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 op_attr; -#define ISCSI_LOGIN_REQUEST_NEXT_STAGE (0x3<<0) -#define ISCSI_LOGIN_REQUEST_NEXT_STAGE_SHIFT 0 -#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE (0x3<<2) -#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE_SHIFT 2 -#define ISCSI_LOGIN_REQUEST_RESERVED0 (0x3<<4) -#define ISCSI_LOGIN_REQUEST_RESERVED0_SHIFT 4 -#define ISCSI_LOGIN_REQUEST_CONT (0x1<<6) -#define ISCSI_LOGIN_REQUEST_CONT_SHIFT 6 -#define ISCSI_LOGIN_REQUEST_TRANSIT (0x1<<7) -#define ISCSI_LOGIN_REQUEST_TRANSIT_SHIFT 7 - u8 version_max; - u8 version_min; -#elif defined(__LITTLE_ENDIAN) - u8 version_min; - u8 version_max; - u8 op_attr; -#define ISCSI_LOGIN_REQUEST_NEXT_STAGE (0x3<<0) -#define ISCSI_LOGIN_REQUEST_NEXT_STAGE_SHIFT 0 -#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE (0x3<<2) -#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE_SHIFT 2 -#define ISCSI_LOGIN_REQUEST_RESERVED0 (0x3<<4) -#define ISCSI_LOGIN_REQUEST_RESERVED0_SHIFT 4 -#define ISCSI_LOGIN_REQUEST_CONT (0x1<<6) -#define ISCSI_LOGIN_REQUEST_CONT_SHIFT 6 -#define ISCSI_LOGIN_REQUEST_TRANSIT (0x1<<7) -#define ISCSI_LOGIN_REQUEST_TRANSIT_SHIFT 7 - u8 op_code; -#endif - u32 data_length; - u32 isid_lo; -#if defined(__BIG_ENDIAN) - u16 isid_hi; - u16 tsih; -#elif defined(__LITTLE_ENDIAN) - u16 tsih; - u16 isid_hi; -#endif -#if defined(__BIG_ENDIAN) - u16 reserved2; - u16 itt; -#define ISCSI_LOGIN_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_LOGIN_REQUEST_INDEX_SHIFT 0 -#define ISCSI_LOGIN_REQUEST_TYPE (0x3<<14) -#define ISCSI_LOGIN_REQUEST_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_LOGIN_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_LOGIN_REQUEST_INDEX_SHIFT 0 -#define ISCSI_LOGIN_REQUEST_TYPE (0x3<<14) -#define ISCSI_LOGIN_REQUEST_TYPE_SHIFT 14 - u16 reserved2; -#endif -#if defined(__BIG_ENDIAN) - u16 cid; - u16 reserved3; -#elif defined(__LITTLE_ENDIAN) - u16 reserved3; - u16 cid; -#endif - u32 cmd_sn; - u32 exp_stat_sn; - u32 reserved4; - u32 resp_bd_list_addr_lo; - u32 resp_bd_list_addr_hi; - u32 resp_buffer; -#define ISCSI_LOGIN_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0) -#define ISCSI_LOGIN_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0 -#define ISCSI_LOGIN_REQUEST_NUM_RESP_BDS (0xFF<<24) -#define ISCSI_LOGIN_REQUEST_NUM_RESP_BDS_SHIFT 24 -#if defined(__BIG_ENDIAN) - u16 reserved8; - u8 reserved7; - u8 flags; -#define ISCSI_LOGIN_REQUEST_RESERVED5 (0x3<<0) -#define ISCSI_LOGIN_REQUEST_RESERVED5_SHIFT 0 -#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2) -#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2 -#define ISCSI_LOGIN_REQUEST_RESERVED6 (0x1F<<3) -#define ISCSI_LOGIN_REQUEST_RESERVED6_SHIFT 3 -#elif defined(__LITTLE_ENDIAN) - u8 flags; -#define ISCSI_LOGIN_REQUEST_RESERVED5 (0x3<<0) -#define ISCSI_LOGIN_REQUEST_RESERVED5_SHIFT 0 -#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2) -#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2 -#define ISCSI_LOGIN_REQUEST_RESERVED6 (0x1F<<3) -#define ISCSI_LOGIN_REQUEST_RESERVED6_SHIFT 3 - u8 reserved7; - u16 reserved8; -#endif - u32 bd_list_addr_lo; - u32 bd_list_addr_hi; -#if defined(__BIG_ENDIAN) - u8 cq_index; - u8 reserved10; - u8 reserved9; - u8 num_bds; -#elif defined(__LITTLE_ENDIAN) - u8 num_bds; - u8 reserved9; - u8 reserved10; - u8 cq_index; -#endif -}; - - -/* - * iSCSI Login CQE - */ -struct iscsi_login_response { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 response_flags; -#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE (0x3<<0) -#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE_SHIFT 0 -#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE (0x3<<2) -#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE_SHIFT 2 -#define ISCSI_LOGIN_RESPONSE_RESERVED0 (0x3<<4) -#define ISCSI_LOGIN_RESPONSE_RESERVED0_SHIFT 4 -#define ISCSI_LOGIN_RESPONSE_CONT (0x1<<6) -#define ISCSI_LOGIN_RESPONSE_CONT_SHIFT 6 -#define ISCSI_LOGIN_RESPONSE_TRANSIT (0x1<<7) -#define ISCSI_LOGIN_RESPONSE_TRANSIT_SHIFT 7 - u8 version_max; - u8 version_active; -#elif defined(__LITTLE_ENDIAN) - u8 version_active; - u8 version_max; - u8 response_flags; -#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE (0x3<<0) -#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE_SHIFT 0 -#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE (0x3<<2) -#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE_SHIFT 2 -#define ISCSI_LOGIN_RESPONSE_RESERVED0 (0x3<<4) -#define ISCSI_LOGIN_RESPONSE_RESERVED0_SHIFT 4 -#define ISCSI_LOGIN_RESPONSE_CONT (0x1<<6) -#define ISCSI_LOGIN_RESPONSE_CONT_SHIFT 6 -#define ISCSI_LOGIN_RESPONSE_TRANSIT (0x1<<7) -#define ISCSI_LOGIN_RESPONSE_TRANSIT_SHIFT 7 - u8 op_code; -#endif - u32 data_length; - u32 exp_cmd_sn; - u32 max_cmd_sn; - u32 reserved1[2]; -#if defined(__BIG_ENDIAN) - u16 reserved3; - u8 err_code; - u8 reserved2; -#elif defined(__LITTLE_ENDIAN) - u8 reserved2; - u8 err_code; - u16 reserved3; -#endif - u32 stat_sn; - u32 isid_lo; -#if defined(__BIG_ENDIAN) - u16 isid_hi; - u16 tsih; -#elif defined(__LITTLE_ENDIAN) - u16 tsih; - u16 isid_hi; -#endif -#if defined(__BIG_ENDIAN) - u8 status_class; - u8 status_detail; - u16 reserved4; -#elif defined(__LITTLE_ENDIAN) - u16 reserved4; - u8 status_detail; - u8 status_class; -#endif - u32 reserved5[3]; -#if defined(__BIG_ENDIAN) - u16 reserved6; - u16 itt; -#define ISCSI_LOGIN_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_LOGIN_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_LOGIN_RESPONSE_TYPE (0x3<<14) -#define ISCSI_LOGIN_RESPONSE_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_LOGIN_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_LOGIN_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_LOGIN_RESPONSE_TYPE (0x3<<14) -#define ISCSI_LOGIN_RESPONSE_TYPE_SHIFT 14 - u16 reserved6; -#endif - u32 cq_req_sn; -}; - - -/* - * iSCSI Logout SQ WQE - */ -struct iscsi_logout_request { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 op_attr; -#define ISCSI_LOGOUT_REQUEST_REASON (0x7F<<0) -#define ISCSI_LOGOUT_REQUEST_REASON_SHIFT 0 -#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE (0x1<<7) -#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE_SHIFT 7 - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 op_attr; -#define ISCSI_LOGOUT_REQUEST_REASON (0x7F<<0) -#define ISCSI_LOGOUT_REQUEST_REASON_SHIFT 0 -#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE (0x1<<7) -#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE_SHIFT 7 - u8 op_code; -#endif - u32 data_length; - u32 reserved1[2]; -#if defined(__BIG_ENDIAN) - u16 reserved2; - u16 itt; -#define ISCSI_LOGOUT_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_LOGOUT_REQUEST_INDEX_SHIFT 0 -#define ISCSI_LOGOUT_REQUEST_TYPE (0x3<<14) -#define ISCSI_LOGOUT_REQUEST_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_LOGOUT_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_LOGOUT_REQUEST_INDEX_SHIFT 0 -#define ISCSI_LOGOUT_REQUEST_TYPE (0x3<<14) -#define ISCSI_LOGOUT_REQUEST_TYPE_SHIFT 14 - u16 reserved2; -#endif -#if defined(__BIG_ENDIAN) - u16 cid; - u16 reserved3; -#elif defined(__LITTLE_ENDIAN) - u16 reserved3; - u16 cid; -#endif - u32 cmd_sn; - u32 reserved4[5]; - u32 zero_fill; - u32 bd_list_addr_lo; - u32 bd_list_addr_hi; -#if defined(__BIG_ENDIAN) - u8 cq_index; - u8 reserved6; - u8 reserved5; - u8 num_bds; -#elif defined(__LITTLE_ENDIAN) - u8 num_bds; - u8 reserved5; - u8 reserved6; - u8 cq_index; -#endif -}; - - -/* - * iSCSI Logout CQE - */ -struct iscsi_logout_response { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 reserved1; - u8 response; - u8 reserved0; -#elif defined(__LITTLE_ENDIAN) - u8 reserved0; - u8 response; - u8 reserved1; - u8 op_code; -#endif - u32 reserved2; - u32 exp_cmd_sn; - u32 max_cmd_sn; - u32 reserved3[2]; -#if defined(__BIG_ENDIAN) - u16 reserved5; - u8 err_code; - u8 reserved4; -#elif defined(__LITTLE_ENDIAN) - u8 reserved4; - u8 err_code; - u16 reserved5; -#endif - u32 reserved6[3]; -#if defined(__BIG_ENDIAN) - u16 time_to_wait; - u16 time_to_retain; -#elif defined(__LITTLE_ENDIAN) - u16 time_to_retain; - u16 time_to_wait; -#endif - u32 reserved7[3]; -#if defined(__BIG_ENDIAN) - u16 reserved8; - u16 itt; -#define ISCSI_LOGOUT_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_LOGOUT_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_LOGOUT_RESPONSE_TYPE (0x3<<14) -#define ISCSI_LOGOUT_RESPONSE_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_LOGOUT_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_LOGOUT_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_LOGOUT_RESPONSE_TYPE (0x3<<14) -#define ISCSI_LOGOUT_RESPONSE_TYPE_SHIFT 14 - u16 reserved8; -#endif - u32 cq_req_sn; -}; - - -/* - * iSCSI Nop-In CQE - */ -struct iscsi_nop_in_msg { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 reserved1; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 reserved1; - u8 op_code; -#endif - u32 data_length; - u32 exp_cmd_sn; - u32 max_cmd_sn; - u32 ttt; - u32 reserved2; -#if defined(__BIG_ENDIAN) - u16 reserved4; - u8 err_code; - u8 reserved3; -#elif defined(__LITTLE_ENDIAN) - u8 reserved3; - u8 err_code; - u16 reserved4; -#endif - u32 reserved5; - u32 lun[2]; - u32 reserved6[4]; -#if defined(__BIG_ENDIAN) - u16 reserved7; - u16 itt; -#define ISCSI_NOP_IN_MSG_INDEX (0x3FFF<<0) -#define ISCSI_NOP_IN_MSG_INDEX_SHIFT 0 -#define ISCSI_NOP_IN_MSG_TYPE (0x3<<14) -#define ISCSI_NOP_IN_MSG_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_NOP_IN_MSG_INDEX (0x3FFF<<0) -#define ISCSI_NOP_IN_MSG_INDEX_SHIFT 0 -#define ISCSI_NOP_IN_MSG_TYPE (0x3<<14) -#define ISCSI_NOP_IN_MSG_TYPE_SHIFT 14 - u16 reserved7; -#endif - u32 cq_req_sn; -}; - - -/* - * iSCSI NOP-OUT SQ WQE - */ -struct iscsi_nop_out_request { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 op_attr; -#define ISCSI_NOP_OUT_REQUEST_RESERVED1 (0x7F<<0) -#define ISCSI_NOP_OUT_REQUEST_RESERVED1_SHIFT 0 -#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE (0x1<<7) -#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE_SHIFT 7 - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 op_attr; -#define ISCSI_NOP_OUT_REQUEST_RESERVED1 (0x7F<<0) -#define ISCSI_NOP_OUT_REQUEST_RESERVED1_SHIFT 0 -#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE (0x1<<7) -#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE_SHIFT 7 - u8 op_code; -#endif - u32 data_length; - u32 lun[2]; -#if defined(__BIG_ENDIAN) - u16 reserved2; - u16 itt; -#define ISCSI_NOP_OUT_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_NOP_OUT_REQUEST_INDEX_SHIFT 0 -#define ISCSI_NOP_OUT_REQUEST_TYPE (0x3<<14) -#define ISCSI_NOP_OUT_REQUEST_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_NOP_OUT_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_NOP_OUT_REQUEST_INDEX_SHIFT 0 -#define ISCSI_NOP_OUT_REQUEST_TYPE (0x3<<14) -#define ISCSI_NOP_OUT_REQUEST_TYPE_SHIFT 14 - u16 reserved2; -#endif - u32 ttt; - u32 cmd_sn; - u32 reserved3[2]; - u32 resp_bd_list_addr_lo; - u32 resp_bd_list_addr_hi; - u32 resp_buffer; -#define ISCSI_NOP_OUT_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0) -#define ISCSI_NOP_OUT_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0 -#define ISCSI_NOP_OUT_REQUEST_NUM_RESP_BDS (0xFF<<24) -#define ISCSI_NOP_OUT_REQUEST_NUM_RESP_BDS_SHIFT 24 -#if defined(__BIG_ENDIAN) - u16 reserved7; - u8 reserved6; - u8 flags; -#define ISCSI_NOP_OUT_REQUEST_RESERVED4 (0x1<<0) -#define ISCSI_NOP_OUT_REQUEST_RESERVED4_SHIFT 0 -#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION (0x1<<1) -#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION_SHIFT 1 -#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL (0x3F<<2) -#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL_SHIFT 2 -#elif defined(__LITTLE_ENDIAN) - u8 flags; -#define ISCSI_NOP_OUT_REQUEST_RESERVED4 (0x1<<0) -#define ISCSI_NOP_OUT_REQUEST_RESERVED4_SHIFT 0 -#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION (0x1<<1) -#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION_SHIFT 1 -#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL (0x3F<<2) -#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL_SHIFT 2 - u8 reserved6; - u16 reserved7; -#endif - u32 bd_list_addr_lo; - u32 bd_list_addr_hi; -#if defined(__BIG_ENDIAN) - u8 cq_index; - u8 reserved9; - u8 reserved8; - u8 num_bds; -#elif defined(__LITTLE_ENDIAN) - u8 num_bds; - u8 reserved8; - u8 reserved9; - u8 cq_index; -#endif -}; - - - - -/* - * iSCSI Reject CQE - */ -struct iscsi_reject_msg { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 reserved1; - u8 reason; - u8 reserved0; -#elif defined(__LITTLE_ENDIAN) - u8 reserved0; - u8 reason; - u8 reserved1; - u8 op_code; -#endif - u32 data_length; - u32 exp_cmd_sn; - u32 max_cmd_sn; - u32 reserved2[2]; -#if defined(__BIG_ENDIAN) - u16 reserved4; - u8 err_code; - u8 reserved3; -#elif defined(__LITTLE_ENDIAN) - u8 reserved3; - u8 err_code; - u16 reserved4; -#endif - u32 reserved5[8]; - u32 cq_req_sn; -}; - - -/* - * iSCSI TMF SQ WQE - */ -struct iscsi_tmf_request { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 op_attr; -#define ISCSI_TMF_REQUEST_FUNCTION (0x7F<<0) -#define ISCSI_TMF_REQUEST_FUNCTION_SHIFT 0 -#define ISCSI_TMF_REQUEST_ALWAYS_ONE (0x1<<7) -#define ISCSI_TMF_REQUEST_ALWAYS_ONE_SHIFT 7 - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 op_attr; -#define ISCSI_TMF_REQUEST_FUNCTION (0x7F<<0) -#define ISCSI_TMF_REQUEST_FUNCTION_SHIFT 0 -#define ISCSI_TMF_REQUEST_ALWAYS_ONE (0x1<<7) -#define ISCSI_TMF_REQUEST_ALWAYS_ONE_SHIFT 7 - u8 op_code; -#endif - u32 data_length; - u32 lun[2]; -#if defined(__BIG_ENDIAN) - u16 reserved1; - u16 itt; -#define ISCSI_TMF_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_TMF_REQUEST_INDEX_SHIFT 0 -#define ISCSI_TMF_REQUEST_TYPE (0x3<<14) -#define ISCSI_TMF_REQUEST_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_TMF_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_TMF_REQUEST_INDEX_SHIFT 0 -#define ISCSI_TMF_REQUEST_TYPE (0x3<<14) -#define ISCSI_TMF_REQUEST_TYPE_SHIFT 14 - u16 reserved1; -#endif - u32 ref_itt; - u32 cmd_sn; - u32 reserved2; - u32 ref_cmd_sn; - u32 reserved3[3]; - u32 zero_fill; - u32 bd_list_addr_lo; - u32 bd_list_addr_hi; -#if defined(__BIG_ENDIAN) - u8 cq_index; - u8 reserved5; - u8 reserved4; - u8 num_bds; -#elif defined(__LITTLE_ENDIAN) - u8 num_bds; - u8 reserved4; - u8 reserved5; - u8 cq_index; -#endif -}; - -/* - * iSCSI Text SQ WQE - */ -struct iscsi_text_request { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 op_attr; -#define ISCSI_TEXT_REQUEST_RESERVED1 (0x3F<<0) -#define ISCSI_TEXT_REQUEST_RESERVED1_SHIFT 0 -#define ISCSI_TEXT_REQUEST_CONT (0x1<<6) -#define ISCSI_TEXT_REQUEST_CONT_SHIFT 6 -#define ISCSI_TEXT_REQUEST_FINAL (0x1<<7) -#define ISCSI_TEXT_REQUEST_FINAL_SHIFT 7 - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 op_attr; -#define ISCSI_TEXT_REQUEST_RESERVED1 (0x3F<<0) -#define ISCSI_TEXT_REQUEST_RESERVED1_SHIFT 0 -#define ISCSI_TEXT_REQUEST_CONT (0x1<<6) -#define ISCSI_TEXT_REQUEST_CONT_SHIFT 6 -#define ISCSI_TEXT_REQUEST_FINAL (0x1<<7) -#define ISCSI_TEXT_REQUEST_FINAL_SHIFT 7 - u8 op_code; -#endif - u32 data_length; - u32 lun[2]; -#if defined(__BIG_ENDIAN) - u16 reserved3; - u16 itt; -#define ISCSI_TEXT_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_TEXT_REQUEST_INDEX_SHIFT 0 -#define ISCSI_TEXT_REQUEST_TYPE (0x3<<14) -#define ISCSI_TEXT_REQUEST_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_TEXT_REQUEST_INDEX (0x3FFF<<0) -#define ISCSI_TEXT_REQUEST_INDEX_SHIFT 0 -#define ISCSI_TEXT_REQUEST_TYPE (0x3<<14) -#define ISCSI_TEXT_REQUEST_TYPE_SHIFT 14 - u16 reserved3; -#endif - u32 ttt; - u32 cmd_sn; - u32 reserved4[2]; - u32 resp_bd_list_addr_lo; - u32 resp_bd_list_addr_hi; - u32 resp_buffer; -#define ISCSI_TEXT_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0) -#define ISCSI_TEXT_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0 -#define ISCSI_TEXT_REQUEST_NUM_RESP_BDS (0xFF<<24) -#define ISCSI_TEXT_REQUEST_NUM_RESP_BDS_SHIFT 24 - u32 zero_fill; - u32 bd_list_addr_lo; - u32 bd_list_addr_hi; -#if defined(__BIG_ENDIAN) - u8 cq_index; - u8 reserved7; - u8 reserved6; - u8 num_bds; -#elif defined(__LITTLE_ENDIAN) - u8 num_bds; - u8 reserved6; - u8 reserved7; - u8 cq_index; -#endif -}; - -/* - * iSCSI SQ WQE - */ -union iscsi_request { - struct iscsi_cmd_request cmd; - struct iscsi_tmf_request tmf; - struct iscsi_nop_out_request nop_out; - struct iscsi_login_request login_req; - struct iscsi_text_request text; - struct iscsi_logout_request logout_req; - struct iscsi_cleanup_request cleanup; -}; - - -/* - * iSCSI TMF CQE - */ -struct iscsi_tmf_response { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 reserved1; - u8 response; - u8 reserved0; -#elif defined(__LITTLE_ENDIAN) - u8 reserved0; - u8 response; - u8 reserved1; - u8 op_code; -#endif - u32 reserved2; - u32 exp_cmd_sn; - u32 max_cmd_sn; - u32 reserved3[2]; -#if defined(__BIG_ENDIAN) - u16 reserved5; - u8 err_code; - u8 reserved4; -#elif defined(__LITTLE_ENDIAN) - u8 reserved4; - u8 err_code; - u16 reserved5; -#endif - u32 reserved6[7]; -#if defined(__BIG_ENDIAN) - u16 reserved7; - u16 itt; -#define ISCSI_TMF_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_TMF_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_TMF_RESPONSE_TYPE (0x3<<14) -#define ISCSI_TMF_RESPONSE_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_TMF_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_TMF_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_TMF_RESPONSE_TYPE (0x3<<14) -#define ISCSI_TMF_RESPONSE_TYPE_SHIFT 14 - u16 reserved7; -#endif - u32 cq_req_sn; -}; - -/* - * iSCSI Text CQE - */ -struct iscsi_text_response { -#if defined(__BIG_ENDIAN) - u8 op_code; - u8 response_flags; -#define ISCSI_TEXT_RESPONSE_RESERVED1 (0x3F<<0) -#define ISCSI_TEXT_RESPONSE_RESERVED1_SHIFT 0 -#define ISCSI_TEXT_RESPONSE_CONT (0x1<<6) -#define ISCSI_TEXT_RESPONSE_CONT_SHIFT 6 -#define ISCSI_TEXT_RESPONSE_FINAL (0x1<<7) -#define ISCSI_TEXT_RESPONSE_FINAL_SHIFT 7 - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - u8 response_flags; -#define ISCSI_TEXT_RESPONSE_RESERVED1 (0x3F<<0) -#define ISCSI_TEXT_RESPONSE_RESERVED1_SHIFT 0 -#define ISCSI_TEXT_RESPONSE_CONT (0x1<<6) -#define ISCSI_TEXT_RESPONSE_CONT_SHIFT 6 -#define ISCSI_TEXT_RESPONSE_FINAL (0x1<<7) -#define ISCSI_TEXT_RESPONSE_FINAL_SHIFT 7 - u8 op_code; -#endif - u32 data_length; - u32 exp_cmd_sn; - u32 max_cmd_sn; - u32 ttt; - u32 reserved2; -#if defined(__BIG_ENDIAN) - u16 reserved4; - u8 err_code; - u8 reserved3; -#elif defined(__LITTLE_ENDIAN) - u8 reserved3; - u8 err_code; - u16 reserved4; -#endif - u32 reserved5; - u32 lun[2]; - u32 reserved6[4]; -#if defined(__BIG_ENDIAN) - u16 reserved7; - u16 itt; -#define ISCSI_TEXT_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_TEXT_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_TEXT_RESPONSE_TYPE (0x3<<14) -#define ISCSI_TEXT_RESPONSE_TYPE_SHIFT 14 -#elif defined(__LITTLE_ENDIAN) - u16 itt; -#define ISCSI_TEXT_RESPONSE_INDEX (0x3FFF<<0) -#define ISCSI_TEXT_RESPONSE_INDEX_SHIFT 0 -#define ISCSI_TEXT_RESPONSE_TYPE (0x3<<14) -#define ISCSI_TEXT_RESPONSE_TYPE_SHIFT 14 - u16 reserved7; -#endif - u32 cq_req_sn; -}; - -/* - * iSCSI CQE - */ -union iscsi_response { - struct iscsi_cmd_response cmd; - struct iscsi_tmf_response tmf; - struct iscsi_login_response login_resp; - struct iscsi_text_response text; - struct iscsi_logout_response logout_resp; - struct iscsi_cleanup_response cleanup; - struct iscsi_reject_msg reject; - struct iscsi_async_msg async; - struct iscsi_nop_in_msg nop_in; -}; - - - - - - -#endif /* __57XX_ISCSI_HSI_LINUX_LE__ */ +/* 57xx_iscsi_hsi.h: Broadcom NetXtreme II iSCSI driver. + * + * Copyright (c) 2006 - 2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + */ +#ifndef __57XX_ISCSI_HSI_LINUX_LE__ +#define __57XX_ISCSI_HSI_LINUX_LE__ + +/* + * iSCSI Async CQE + */ +struct iscsi_async_msg { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 reserved1; + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 reserved1; + u8 op_code; +#endif + u32 reserved2; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 reserved3[2]; +#if defined(__BIG_ENDIAN) + u16 reserved5; + u8 err_code; + u8 reserved4; +#elif defined(__LITTLE_ENDIAN) + u8 reserved4; + u8 err_code; + u16 reserved5; +#endif + u32 reserved6; + u32 lun[2]; +#if defined(__BIG_ENDIAN) + u8 async_event; + u8 async_vcode; + u16 param1; +#elif defined(__LITTLE_ENDIAN) + u16 param1; + u8 async_vcode; + u8 async_event; +#endif +#if defined(__BIG_ENDIAN) + u16 param2; + u16 param3; +#elif defined(__LITTLE_ENDIAN) + u16 param3; + u16 param2; +#endif + u32 reserved7[3]; + u32 cq_req_sn; +}; + + +/* + * iSCSI Buffer Descriptor (BD) + */ +struct iscsi_bd { + u32 buffer_addr_hi; + u32 buffer_addr_lo; +#if defined(__BIG_ENDIAN) + u16 reserved0; + u16 buffer_length; +#elif defined(__LITTLE_ENDIAN) + u16 buffer_length; + u16 reserved0; +#endif +#if defined(__BIG_ENDIAN) + u16 reserved3; + u16 flags; +#define ISCSI_BD_RESERVED1 (0x3F<<0) +#define ISCSI_BD_RESERVED1_SHIFT 0 +#define ISCSI_BD_LAST_IN_BD_CHAIN (0x1<<6) +#define ISCSI_BD_LAST_IN_BD_CHAIN_SHIFT 6 +#define ISCSI_BD_FIRST_IN_BD_CHAIN (0x1<<7) +#define ISCSI_BD_FIRST_IN_BD_CHAIN_SHIFT 7 +#define ISCSI_BD_RESERVED2 (0xFF<<8) +#define ISCSI_BD_RESERVED2_SHIFT 8 +#elif defined(__LITTLE_ENDIAN) + u16 flags; +#define ISCSI_BD_RESERVED1 (0x3F<<0) +#define ISCSI_BD_RESERVED1_SHIFT 0 +#define ISCSI_BD_LAST_IN_BD_CHAIN (0x1<<6) +#define ISCSI_BD_LAST_IN_BD_CHAIN_SHIFT 6 +#define ISCSI_BD_FIRST_IN_BD_CHAIN (0x1<<7) +#define ISCSI_BD_FIRST_IN_BD_CHAIN_SHIFT 7 +#define ISCSI_BD_RESERVED2 (0xFF<<8) +#define ISCSI_BD_RESERVED2_SHIFT 8 + u16 reserved3; +#endif +}; + + +/* + * iSCSI Cleanup SQ WQE + */ +struct iscsi_cleanup_request { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 reserved1; + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 reserved1; + u8 op_code; +#endif + u32 reserved2[3]; +#if defined(__BIG_ENDIAN) + u16 reserved3; + u16 itt; +#define ISCSI_CLEANUP_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_CLEANUP_REQUEST_INDEX_SHIFT 0 +#define ISCSI_CLEANUP_REQUEST_TYPE (0x3<<14) +#define ISCSI_CLEANUP_REQUEST_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_CLEANUP_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_CLEANUP_REQUEST_INDEX_SHIFT 0 +#define ISCSI_CLEANUP_REQUEST_TYPE (0x3<<14) +#define ISCSI_CLEANUP_REQUEST_TYPE_SHIFT 14 + u16 reserved3; +#endif + u32 reserved4[10]; +#if defined(__BIG_ENDIAN) + u8 cq_index; + u8 reserved6; + u16 reserved5; +#elif defined(__LITTLE_ENDIAN) + u16 reserved5; + u8 reserved6; + u8 cq_index; +#endif +}; + + +/* + * iSCSI Cleanup CQE + */ +struct iscsi_cleanup_response { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 status; + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 status; + u8 op_code; +#endif + u32 reserved1[3]; + u32 reserved2[2]; +#if defined(__BIG_ENDIAN) + u16 reserved4; + u8 err_code; + u8 reserved3; +#elif defined(__LITTLE_ENDIAN) + u8 reserved3; + u8 err_code; + u16 reserved4; +#endif + u32 reserved5[7]; +#if defined(__BIG_ENDIAN) + u16 reserved6; + u16 itt; +#define ISCSI_CLEANUP_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_CLEANUP_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_CLEANUP_RESPONSE_TYPE (0x3<<14) +#define ISCSI_CLEANUP_RESPONSE_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_CLEANUP_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_CLEANUP_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_CLEANUP_RESPONSE_TYPE (0x3<<14) +#define ISCSI_CLEANUP_RESPONSE_TYPE_SHIFT 14 + u16 reserved6; +#endif + u32 cq_req_sn; +}; + + +/* + * SCSI read/write SQ WQE + */ +struct iscsi_cmd_request { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 op_attr; +#define ISCSI_CMD_REQUEST_TASK_ATTR (0x7<<0) +#define ISCSI_CMD_REQUEST_TASK_ATTR_SHIFT 0 +#define ISCSI_CMD_REQUEST_RESERVED1 (0x3<<3) +#define ISCSI_CMD_REQUEST_RESERVED1_SHIFT 3 +#define ISCSI_CMD_REQUEST_WRITE (0x1<<5) +#define ISCSI_CMD_REQUEST_WRITE_SHIFT 5 +#define ISCSI_CMD_REQUEST_READ (0x1<<6) +#define ISCSI_CMD_REQUEST_READ_SHIFT 6 +#define ISCSI_CMD_REQUEST_FINAL (0x1<<7) +#define ISCSI_CMD_REQUEST_FINAL_SHIFT 7 + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 op_attr; +#define ISCSI_CMD_REQUEST_TASK_ATTR (0x7<<0) +#define ISCSI_CMD_REQUEST_TASK_ATTR_SHIFT 0 +#define ISCSI_CMD_REQUEST_RESERVED1 (0x3<<3) +#define ISCSI_CMD_REQUEST_RESERVED1_SHIFT 3 +#define ISCSI_CMD_REQUEST_WRITE (0x1<<5) +#define ISCSI_CMD_REQUEST_WRITE_SHIFT 5 +#define ISCSI_CMD_REQUEST_READ (0x1<<6) +#define ISCSI_CMD_REQUEST_READ_SHIFT 6 +#define ISCSI_CMD_REQUEST_FINAL (0x1<<7) +#define ISCSI_CMD_REQUEST_FINAL_SHIFT 7 + u8 op_code; +#endif +#if defined(__BIG_ENDIAN) + u16 ud_buffer_offset; + u16 sd_buffer_offset; +#elif defined(__LITTLE_ENDIAN) + u16 sd_buffer_offset; + u16 ud_buffer_offset; +#endif + u32 lun[2]; +#if defined(__BIG_ENDIAN) + u16 reserved2; + u16 itt; +#define ISCSI_CMD_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_CMD_REQUEST_INDEX_SHIFT 0 +#define ISCSI_CMD_REQUEST_TYPE (0x3<<14) +#define ISCSI_CMD_REQUEST_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_CMD_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_CMD_REQUEST_INDEX_SHIFT 0 +#define ISCSI_CMD_REQUEST_TYPE (0x3<<14) +#define ISCSI_CMD_REQUEST_TYPE_SHIFT 14 + u16 reserved2; +#endif + u32 total_data_transfer_length; + u32 cmd_sn; + u32 reserved3; + u32 cdb[4]; + u32 zero_fill; + u32 bd_list_addr_lo; + u32 bd_list_addr_hi; +#if defined(__BIG_ENDIAN) + u8 cq_index; + u8 sd_start_bd_index; + u8 ud_start_bd_index; + u8 num_bds; +#elif defined(__LITTLE_ENDIAN) + u8 num_bds; + u8 ud_start_bd_index; + u8 sd_start_bd_index; + u8 cq_index; +#endif +}; + + +/* + * task statistics for write response + */ +struct iscsi_write_resp_task_stat { +#if defined(__BIG_ENDIAN) + u16 num_r2ts; + u16 num_data_outs; +#elif defined(__LITTLE_ENDIAN) + u16 num_data_outs; + u16 num_r2ts; +#endif +}; + +/* + * task statistics for read response + */ +struct iscsi_read_resp_task_stat { +#if defined(__BIG_ENDIAN) + u16 reserved; + u16 num_data_ins; +#elif defined(__LITTLE_ENDIAN) + u16 num_data_ins; + u16 reserved; +#endif +}; + +/* + * task statistics for iSCSI cmd response + */ +union iscsi_cmd_resp_task_stat { + struct iscsi_write_resp_task_stat write_stat; + struct iscsi_read_resp_task_stat read_stat; +}; + +/* + * SCSI Command CQE + */ +struct iscsi_cmd_response { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 response_flags; +#define ISCSI_CMD_RESPONSE_RESERVED0 (0x1<<0) +#define ISCSI_CMD_RESPONSE_RESERVED0_SHIFT 0 +#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW (0x1<<1) +#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW_SHIFT 1 +#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW (0x1<<2) +#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW_SHIFT 2 +#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW (0x1<<3) +#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW_SHIFT 3 +#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW (0x1<<4) +#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW_SHIFT 4 +#define ISCSI_CMD_RESPONSE_RESERVED1 (0x7<<5) +#define ISCSI_CMD_RESPONSE_RESERVED1_SHIFT 5 + u8 response; + u8 status; +#elif defined(__LITTLE_ENDIAN) + u8 status; + u8 response; + u8 response_flags; +#define ISCSI_CMD_RESPONSE_RESERVED0 (0x1<<0) +#define ISCSI_CMD_RESPONSE_RESERVED0_SHIFT 0 +#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW (0x1<<1) +#define ISCSI_CMD_RESPONSE_RESIDUAL_UNDERFLOW_SHIFT 1 +#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW (0x1<<2) +#define ISCSI_CMD_RESPONSE_RESIDUAL_OVERFLOW_SHIFT 2 +#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW (0x1<<3) +#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_UNDERFLOW_SHIFT 3 +#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW (0x1<<4) +#define ISCSI_CMD_RESPONSE_BR_RESIDUAL_OVERFLOW_SHIFT 4 +#define ISCSI_CMD_RESPONSE_RESERVED1 (0x7<<5) +#define ISCSI_CMD_RESPONSE_RESERVED1_SHIFT 5 + u8 op_code; +#endif + u32 data_length; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 reserved2; + u32 residual_count; +#if defined(__BIG_ENDIAN) + u16 reserved4; + u8 err_code; + u8 reserved3; +#elif defined(__LITTLE_ENDIAN) + u8 reserved3; + u8 err_code; + u16 reserved4; +#endif + u32 reserved5[5]; + union iscsi_cmd_resp_task_stat task_stat; + u32 reserved6; +#if defined(__BIG_ENDIAN) + u16 reserved7; + u16 itt; +#define ISCSI_CMD_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_CMD_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_CMD_RESPONSE_TYPE (0x3<<14) +#define ISCSI_CMD_RESPONSE_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_CMD_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_CMD_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_CMD_RESPONSE_TYPE (0x3<<14) +#define ISCSI_CMD_RESPONSE_TYPE_SHIFT 14 + u16 reserved7; +#endif + u32 cq_req_sn; +}; + + + +/* + * firmware middle-path request SQ WQE + */ +struct iscsi_fw_mp_request { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 op_attr; + u16 hdr_opaque1; +#elif defined(__LITTLE_ENDIAN) + u16 hdr_opaque1; + u8 op_attr; + u8 op_code; +#endif + u32 data_length; + u32 hdr_opaque2[2]; +#if defined(__BIG_ENDIAN) + u16 reserved0; + u16 itt; +#define ISCSI_FW_MP_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_FW_MP_REQUEST_INDEX_SHIFT 0 +#define ISCSI_FW_MP_REQUEST_TYPE (0x3<<14) +#define ISCSI_FW_MP_REQUEST_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_FW_MP_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_FW_MP_REQUEST_INDEX_SHIFT 0 +#define ISCSI_FW_MP_REQUEST_TYPE (0x3<<14) +#define ISCSI_FW_MP_REQUEST_TYPE_SHIFT 14 + u16 reserved0; +#endif + u32 hdr_opaque3[4]; + u32 resp_bd_list_addr_lo; + u32 resp_bd_list_addr_hi; + u32 resp_buffer; +#define ISCSI_FW_MP_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0) +#define ISCSI_FW_MP_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0 +#define ISCSI_FW_MP_REQUEST_NUM_RESP_BDS (0xFF<<24) +#define ISCSI_FW_MP_REQUEST_NUM_RESP_BDS_SHIFT 24 +#if defined(__BIG_ENDIAN) + u16 reserved4; + u8 reserved3; + u8 flags; +#define ISCSI_FW_MP_REQUEST_RESERVED1 (0x1<<0) +#define ISCSI_FW_MP_REQUEST_RESERVED1_SHIFT 0 +#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION (0x1<<1) +#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION_SHIFT 1 +#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2) +#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2 +#define ISCSI_FW_MP_REQUEST_RESERVED2 (0x1F<<3) +#define ISCSI_FW_MP_REQUEST_RESERVED2_SHIFT 3 +#elif defined(__LITTLE_ENDIAN) + u8 flags; +#define ISCSI_FW_MP_REQUEST_RESERVED1 (0x1<<0) +#define ISCSI_FW_MP_REQUEST_RESERVED1_SHIFT 0 +#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION (0x1<<1) +#define ISCSI_FW_MP_REQUEST_LOCAL_COMPLETION_SHIFT 1 +#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2) +#define ISCSI_FW_MP_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2 +#define ISCSI_FW_MP_REQUEST_RESERVED2 (0x1F<<3) +#define ISCSI_FW_MP_REQUEST_RESERVED2_SHIFT 3 + u8 reserved3; + u16 reserved4; +#endif + u32 bd_list_addr_lo; + u32 bd_list_addr_hi; +#if defined(__BIG_ENDIAN) + u8 cq_index; + u8 reserved6; + u8 reserved5; + u8 num_bds; +#elif defined(__LITTLE_ENDIAN) + u8 num_bds; + u8 reserved5; + u8 reserved6; + u8 cq_index; +#endif +}; + + +/* + * firmware response - CQE: used only by firmware + */ +struct iscsi_fw_response { + u32 hdr_dword1[2]; + u32 hdr_exp_cmd_sn; + u32 hdr_max_cmd_sn; + u32 hdr_ttt; + u32 hdr_res_cnt; + u32 cqe_flags; +#define ISCSI_FW_RESPONSE_RESERVED2 (0xFF<<0) +#define ISCSI_FW_RESPONSE_RESERVED2_SHIFT 0 +#define ISCSI_FW_RESPONSE_ERR_CODE (0xFF<<8) +#define ISCSI_FW_RESPONSE_ERR_CODE_SHIFT 8 +#define ISCSI_FW_RESPONSE_RESERVED3 (0xFFFF<<16) +#define ISCSI_FW_RESPONSE_RESERVED3_SHIFT 16 + u32 stat_sn; + u32 hdr_dword2[2]; + u32 hdr_dword3[2]; + u32 task_stat; + u32 reserved0; + u32 hdr_itt; + u32 cq_req_sn; +}; + + +/* + * iSCSI KCQ CQE parameters + */ +union iscsi_kcqe_params { + u32 reserved0[4]; +}; + +/* + * iSCSI KCQ CQE + */ +struct iscsi_kcqe { + u32 iscsi_conn_id; + u32 completion_status; + u32 iscsi_conn_context_id; + union iscsi_kcqe_params params; +#if defined(__BIG_ENDIAN) + u8 flags; +#define ISCSI_KCQE_RESERVED0 (0xF<<0) +#define ISCSI_KCQE_RESERVED0_SHIFT 0 +#define ISCSI_KCQE_LAYER_CODE (0x7<<4) +#define ISCSI_KCQE_LAYER_CODE_SHIFT 4 +#define ISCSI_KCQE_RESERVED1 (0x1<<7) +#define ISCSI_KCQE_RESERVED1_SHIFT 7 + u8 op_code; + u16 qe_self_seq; +#elif defined(__LITTLE_ENDIAN) + u16 qe_self_seq; + u8 op_code; + u8 flags; +#define ISCSI_KCQE_RESERVED0 (0xF<<0) +#define ISCSI_KCQE_RESERVED0_SHIFT 0 +#define ISCSI_KCQE_LAYER_CODE (0x7<<4) +#define ISCSI_KCQE_LAYER_CODE_SHIFT 4 +#define ISCSI_KCQE_RESERVED1 (0x1<<7) +#define ISCSI_KCQE_RESERVED1_SHIFT 7 +#endif +}; + + + +/* + * iSCSI KWQE header + */ +struct iscsi_kwqe_header { +#if defined(__BIG_ENDIAN) + u8 flags; +#define ISCSI_KWQE_HEADER_RESERVED0 (0xF<<0) +#define ISCSI_KWQE_HEADER_RESERVED0_SHIFT 0 +#define ISCSI_KWQE_HEADER_LAYER_CODE (0x7<<4) +#define ISCSI_KWQE_HEADER_LAYER_CODE_SHIFT 4 +#define ISCSI_KWQE_HEADER_RESERVED1 (0x1<<7) +#define ISCSI_KWQE_HEADER_RESERVED1_SHIFT 7 + u8 op_code; +#elif defined(__LITTLE_ENDIAN) + u8 op_code; + u8 flags; +#define ISCSI_KWQE_HEADER_RESERVED0 (0xF<<0) +#define ISCSI_KWQE_HEADER_RESERVED0_SHIFT 0 +#define ISCSI_KWQE_HEADER_LAYER_CODE (0x7<<4) +#define ISCSI_KWQE_HEADER_LAYER_CODE_SHIFT 4 +#define ISCSI_KWQE_HEADER_RESERVED1 (0x1<<7) +#define ISCSI_KWQE_HEADER_RESERVED1_SHIFT 7 +#endif +}; + +/* + * iSCSI firmware init request 1 + */ +struct iscsi_kwqe_init1 { +#if defined(__BIG_ENDIAN) + struct iscsi_kwqe_header hdr; + u8 reserved0; + u8 num_cqs; +#elif defined(__LITTLE_ENDIAN) + u8 num_cqs; + u8 reserved0; + struct iscsi_kwqe_header hdr; +#endif + u32 dummy_buffer_addr_lo; + u32 dummy_buffer_addr_hi; +#if defined(__BIG_ENDIAN) + u16 num_ccells_per_conn; + u16 num_tasks_per_conn; +#elif defined(__LITTLE_ENDIAN) + u16 num_tasks_per_conn; + u16 num_ccells_per_conn; +#endif +#if defined(__BIG_ENDIAN) + u16 sq_wqes_per_page; + u16 sq_num_wqes; +#elif defined(__LITTLE_ENDIAN) + u16 sq_num_wqes; + u16 sq_wqes_per_page; +#endif +#if defined(__BIG_ENDIAN) + u8 cq_log_wqes_per_page; + u8 flags; +#define ISCSI_KWQE_INIT1_PAGE_SIZE (0xF<<0) +#define ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT 0 +#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE (0x1<<4) +#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE_SHIFT 4 +#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE (0x1<<5) +#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE_SHIFT 5 +#define ISCSI_KWQE_INIT1_RESERVED1 (0x3<<6) +#define ISCSI_KWQE_INIT1_RESERVED1_SHIFT 6 + u16 cq_num_wqes; +#elif defined(__LITTLE_ENDIAN) + u16 cq_num_wqes; + u8 flags; +#define ISCSI_KWQE_INIT1_PAGE_SIZE (0xF<<0) +#define ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT 0 +#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE (0x1<<4) +#define ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE_SHIFT 4 +#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE (0x1<<5) +#define ISCSI_KWQE_INIT1_KEEP_ALIVE_ENABLE_SHIFT 5 +#define ISCSI_KWQE_INIT1_RESERVED1 (0x3<<6) +#define ISCSI_KWQE_INIT1_RESERVED1_SHIFT 6 + u8 cq_log_wqes_per_page; +#endif +#if defined(__BIG_ENDIAN) + u16 cq_num_pages; + u16 sq_num_pages; +#elif defined(__LITTLE_ENDIAN) + u16 sq_num_pages; + u16 cq_num_pages; +#endif +#if defined(__BIG_ENDIAN) + u16 rq_buffer_size; + u16 rq_num_wqes; +#elif defined(__LITTLE_ENDIAN) + u16 rq_num_wqes; + u16 rq_buffer_size; +#endif +}; + +/* + * iSCSI firmware init request 2 + */ +struct iscsi_kwqe_init2 { +#if defined(__BIG_ENDIAN) + struct iscsi_kwqe_header hdr; + u16 max_cq_sqn; +#elif defined(__LITTLE_ENDIAN) + u16 max_cq_sqn; + struct iscsi_kwqe_header hdr; +#endif + u32 error_bit_map[2]; + u32 reserved1[5]; +}; + +/* + * Initial iSCSI connection offload request 1 + */ +struct iscsi_kwqe_conn_offload1 { +#if defined(__BIG_ENDIAN) + struct iscsi_kwqe_header hdr; + u16 iscsi_conn_id; +#elif defined(__LITTLE_ENDIAN) + u16 iscsi_conn_id; + struct iscsi_kwqe_header hdr; +#endif + u32 sq_page_table_addr_lo; + u32 sq_page_table_addr_hi; + u32 cq_page_table_addr_lo; + u32 cq_page_table_addr_hi; + u32 reserved0[3]; +}; + +/* + * iSCSI Page Table Entry (PTE) + */ +struct iscsi_pte { + u32 hi; + u32 lo; +}; + +/* + * Initial iSCSI connection offload request 2 + */ +struct iscsi_kwqe_conn_offload2 { +#if defined(__BIG_ENDIAN) + struct iscsi_kwqe_header hdr; + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + struct iscsi_kwqe_header hdr; +#endif + u32 rq_page_table_addr_lo; + u32 rq_page_table_addr_hi; + struct iscsi_pte sq_first_pte; + struct iscsi_pte cq_first_pte; + u32 num_additional_wqes; +}; + + +/* + * Initial iSCSI connection offload request 3 + */ +struct iscsi_kwqe_conn_offload3 { +#if defined(__BIG_ENDIAN) + struct iscsi_kwqe_header hdr; + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + struct iscsi_kwqe_header hdr; +#endif + u32 reserved1; + struct iscsi_pte qp_first_pte[3]; +}; + + +/* + * iSCSI connection update request + */ +struct iscsi_kwqe_conn_update { +#if defined(__BIG_ENDIAN) + struct iscsi_kwqe_header hdr; + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + struct iscsi_kwqe_header hdr; +#endif +#if defined(__BIG_ENDIAN) + u8 session_error_recovery_level; + u8 max_outstanding_r2ts; + u8 reserved2; + u8 conn_flags; +#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST (0x1<<0) +#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST_SHIFT 0 +#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST (0x1<<1) +#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST_SHIFT 1 +#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T (0x1<<2) +#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T_SHIFT 2 +#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA (0x1<<3) +#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA_SHIFT 3 +#define ISCSI_KWQE_CONN_UPDATE_RESERVED1 (0xF<<4) +#define ISCSI_KWQE_CONN_UPDATE_RESERVED1_SHIFT 4 +#elif defined(__LITTLE_ENDIAN) + u8 conn_flags; +#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST (0x1<<0) +#define ISCSI_KWQE_CONN_UPDATE_HEADER_DIGEST_SHIFT 0 +#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST (0x1<<1) +#define ISCSI_KWQE_CONN_UPDATE_DATA_DIGEST_SHIFT 1 +#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T (0x1<<2) +#define ISCSI_KWQE_CONN_UPDATE_INITIAL_R2T_SHIFT 2 +#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA (0x1<<3) +#define ISCSI_KWQE_CONN_UPDATE_IMMEDIATE_DATA_SHIFT 3 +#define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE (0x3<<4) +#define ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE_SHIFT 4 +#define ISCSI_KWQE_CONN_UPDATE_RESERVED1 (0x3<<6) +#define ISCSI_KWQE_CONN_UPDATE_RESERVED1_SHIFT 6 + u8 reserved2; + u8 max_outstanding_r2ts; + u8 session_error_recovery_level; +#endif + u32 context_id; + u32 max_send_pdu_length; + u32 max_recv_pdu_length; + u32 first_burst_length; + u32 max_burst_length; + u32 exp_stat_sn; +}; + +/* + * iSCSI destroy connection request + */ +struct iscsi_kwqe_conn_destroy { +#if defined(__BIG_ENDIAN) + struct iscsi_kwqe_header hdr; + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + struct iscsi_kwqe_header hdr; +#endif + u32 context_id; + u32 reserved1[6]; +}; + +/* + * iSCSI KWQ WQE + */ +union iscsi_kwqe { + struct iscsi_kwqe_init1 init1; + struct iscsi_kwqe_init2 init2; + struct iscsi_kwqe_conn_offload1 conn_offload1; + struct iscsi_kwqe_conn_offload2 conn_offload2; + struct iscsi_kwqe_conn_update conn_update; + struct iscsi_kwqe_conn_destroy conn_destroy; +}; + + + + + + + + + +/* + * iSCSI Login SQ WQE + */ +struct iscsi_login_request { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 op_attr; +#define ISCSI_LOGIN_REQUEST_NEXT_STAGE (0x3<<0) +#define ISCSI_LOGIN_REQUEST_NEXT_STAGE_SHIFT 0 +#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE (0x3<<2) +#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE_SHIFT 2 +#define ISCSI_LOGIN_REQUEST_RESERVED0 (0x3<<4) +#define ISCSI_LOGIN_REQUEST_RESERVED0_SHIFT 4 +#define ISCSI_LOGIN_REQUEST_CONT (0x1<<6) +#define ISCSI_LOGIN_REQUEST_CONT_SHIFT 6 +#define ISCSI_LOGIN_REQUEST_TRANSIT (0x1<<7) +#define ISCSI_LOGIN_REQUEST_TRANSIT_SHIFT 7 + u8 version_max; + u8 version_min; +#elif defined(__LITTLE_ENDIAN) + u8 version_min; + u8 version_max; + u8 op_attr; +#define ISCSI_LOGIN_REQUEST_NEXT_STAGE (0x3<<0) +#define ISCSI_LOGIN_REQUEST_NEXT_STAGE_SHIFT 0 +#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE (0x3<<2) +#define ISCSI_LOGIN_REQUEST_CURRENT_STAGE_SHIFT 2 +#define ISCSI_LOGIN_REQUEST_RESERVED0 (0x3<<4) +#define ISCSI_LOGIN_REQUEST_RESERVED0_SHIFT 4 +#define ISCSI_LOGIN_REQUEST_CONT (0x1<<6) +#define ISCSI_LOGIN_REQUEST_CONT_SHIFT 6 +#define ISCSI_LOGIN_REQUEST_TRANSIT (0x1<<7) +#define ISCSI_LOGIN_REQUEST_TRANSIT_SHIFT 7 + u8 op_code; +#endif + u32 data_length; + u32 isid_lo; +#if defined(__BIG_ENDIAN) + u16 isid_hi; + u16 tsih; +#elif defined(__LITTLE_ENDIAN) + u16 tsih; + u16 isid_hi; +#endif +#if defined(__BIG_ENDIAN) + u16 reserved2; + u16 itt; +#define ISCSI_LOGIN_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_LOGIN_REQUEST_INDEX_SHIFT 0 +#define ISCSI_LOGIN_REQUEST_TYPE (0x3<<14) +#define ISCSI_LOGIN_REQUEST_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_LOGIN_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_LOGIN_REQUEST_INDEX_SHIFT 0 +#define ISCSI_LOGIN_REQUEST_TYPE (0x3<<14) +#define ISCSI_LOGIN_REQUEST_TYPE_SHIFT 14 + u16 reserved2; +#endif +#if defined(__BIG_ENDIAN) + u16 cid; + u16 reserved3; +#elif defined(__LITTLE_ENDIAN) + u16 reserved3; + u16 cid; +#endif + u32 cmd_sn; + u32 exp_stat_sn; + u32 reserved4; + u32 resp_bd_list_addr_lo; + u32 resp_bd_list_addr_hi; + u32 resp_buffer; +#define ISCSI_LOGIN_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0) +#define ISCSI_LOGIN_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0 +#define ISCSI_LOGIN_REQUEST_NUM_RESP_BDS (0xFF<<24) +#define ISCSI_LOGIN_REQUEST_NUM_RESP_BDS_SHIFT 24 +#if defined(__BIG_ENDIAN) + u16 reserved8; + u8 reserved7; + u8 flags; +#define ISCSI_LOGIN_REQUEST_RESERVED5 (0x3<<0) +#define ISCSI_LOGIN_REQUEST_RESERVED5_SHIFT 0 +#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2) +#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2 +#define ISCSI_LOGIN_REQUEST_RESERVED6 (0x1F<<3) +#define ISCSI_LOGIN_REQUEST_RESERVED6_SHIFT 3 +#elif defined(__LITTLE_ENDIAN) + u8 flags; +#define ISCSI_LOGIN_REQUEST_RESERVED5 (0x3<<0) +#define ISCSI_LOGIN_REQUEST_RESERVED5_SHIFT 0 +#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN (0x1<<2) +#define ISCSI_LOGIN_REQUEST_UPDATE_EXP_STAT_SN_SHIFT 2 +#define ISCSI_LOGIN_REQUEST_RESERVED6 (0x1F<<3) +#define ISCSI_LOGIN_REQUEST_RESERVED6_SHIFT 3 + u8 reserved7; + u16 reserved8; +#endif + u32 bd_list_addr_lo; + u32 bd_list_addr_hi; +#if defined(__BIG_ENDIAN) + u8 cq_index; + u8 reserved10; + u8 reserved9; + u8 num_bds; +#elif defined(__LITTLE_ENDIAN) + u8 num_bds; + u8 reserved9; + u8 reserved10; + u8 cq_index; +#endif +}; + + +/* + * iSCSI Login CQE + */ +struct iscsi_login_response { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 response_flags; +#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE (0x3<<0) +#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE_SHIFT 0 +#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE (0x3<<2) +#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE_SHIFT 2 +#define ISCSI_LOGIN_RESPONSE_RESERVED0 (0x3<<4) +#define ISCSI_LOGIN_RESPONSE_RESERVED0_SHIFT 4 +#define ISCSI_LOGIN_RESPONSE_CONT (0x1<<6) +#define ISCSI_LOGIN_RESPONSE_CONT_SHIFT 6 +#define ISCSI_LOGIN_RESPONSE_TRANSIT (0x1<<7) +#define ISCSI_LOGIN_RESPONSE_TRANSIT_SHIFT 7 + u8 version_max; + u8 version_active; +#elif defined(__LITTLE_ENDIAN) + u8 version_active; + u8 version_max; + u8 response_flags; +#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE (0x3<<0) +#define ISCSI_LOGIN_RESPONSE_NEXT_STAGE_SHIFT 0 +#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE (0x3<<2) +#define ISCSI_LOGIN_RESPONSE_CURRENT_STAGE_SHIFT 2 +#define ISCSI_LOGIN_RESPONSE_RESERVED0 (0x3<<4) +#define ISCSI_LOGIN_RESPONSE_RESERVED0_SHIFT 4 +#define ISCSI_LOGIN_RESPONSE_CONT (0x1<<6) +#define ISCSI_LOGIN_RESPONSE_CONT_SHIFT 6 +#define ISCSI_LOGIN_RESPONSE_TRANSIT (0x1<<7) +#define ISCSI_LOGIN_RESPONSE_TRANSIT_SHIFT 7 + u8 op_code; +#endif + u32 data_length; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 reserved1[2]; +#if defined(__BIG_ENDIAN) + u16 reserved3; + u8 err_code; + u8 reserved2; +#elif defined(__LITTLE_ENDIAN) + u8 reserved2; + u8 err_code; + u16 reserved3; +#endif + u32 stat_sn; + u32 isid_lo; +#if defined(__BIG_ENDIAN) + u16 isid_hi; + u16 tsih; +#elif defined(__LITTLE_ENDIAN) + u16 tsih; + u16 isid_hi; +#endif +#if defined(__BIG_ENDIAN) + u8 status_class; + u8 status_detail; + u16 reserved4; +#elif defined(__LITTLE_ENDIAN) + u16 reserved4; + u8 status_detail; + u8 status_class; +#endif + u32 reserved5[3]; +#if defined(__BIG_ENDIAN) + u16 reserved6; + u16 itt; +#define ISCSI_LOGIN_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_LOGIN_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_LOGIN_RESPONSE_TYPE (0x3<<14) +#define ISCSI_LOGIN_RESPONSE_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_LOGIN_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_LOGIN_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_LOGIN_RESPONSE_TYPE (0x3<<14) +#define ISCSI_LOGIN_RESPONSE_TYPE_SHIFT 14 + u16 reserved6; +#endif + u32 cq_req_sn; +}; + + +/* + * iSCSI Logout SQ WQE + */ +struct iscsi_logout_request { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 op_attr; +#define ISCSI_LOGOUT_REQUEST_REASON (0x7F<<0) +#define ISCSI_LOGOUT_REQUEST_REASON_SHIFT 0 +#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE (0x1<<7) +#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE_SHIFT 7 + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 op_attr; +#define ISCSI_LOGOUT_REQUEST_REASON (0x7F<<0) +#define ISCSI_LOGOUT_REQUEST_REASON_SHIFT 0 +#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE (0x1<<7) +#define ISCSI_LOGOUT_REQUEST_ALWAYS_ONE_SHIFT 7 + u8 op_code; +#endif + u32 data_length; + u32 reserved1[2]; +#if defined(__BIG_ENDIAN) + u16 reserved2; + u16 itt; +#define ISCSI_LOGOUT_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_LOGOUT_REQUEST_INDEX_SHIFT 0 +#define ISCSI_LOGOUT_REQUEST_TYPE (0x3<<14) +#define ISCSI_LOGOUT_REQUEST_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_LOGOUT_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_LOGOUT_REQUEST_INDEX_SHIFT 0 +#define ISCSI_LOGOUT_REQUEST_TYPE (0x3<<14) +#define ISCSI_LOGOUT_REQUEST_TYPE_SHIFT 14 + u16 reserved2; +#endif +#if defined(__BIG_ENDIAN) + u16 cid; + u16 reserved3; +#elif defined(__LITTLE_ENDIAN) + u16 reserved3; + u16 cid; +#endif + u32 cmd_sn; + u32 reserved4[5]; + u32 zero_fill; + u32 bd_list_addr_lo; + u32 bd_list_addr_hi; +#if defined(__BIG_ENDIAN) + u8 cq_index; + u8 reserved6; + u8 reserved5; + u8 num_bds; +#elif defined(__LITTLE_ENDIAN) + u8 num_bds; + u8 reserved5; + u8 reserved6; + u8 cq_index; +#endif +}; + + +/* + * iSCSI Logout CQE + */ +struct iscsi_logout_response { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 reserved1; + u8 response; + u8 reserved0; +#elif defined(__LITTLE_ENDIAN) + u8 reserved0; + u8 response; + u8 reserved1; + u8 op_code; +#endif + u32 reserved2; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 reserved3[2]; +#if defined(__BIG_ENDIAN) + u16 reserved5; + u8 err_code; + u8 reserved4; +#elif defined(__LITTLE_ENDIAN) + u8 reserved4; + u8 err_code; + u16 reserved5; +#endif + u32 reserved6[3]; +#if defined(__BIG_ENDIAN) + u16 time_to_wait; + u16 time_to_retain; +#elif defined(__LITTLE_ENDIAN) + u16 time_to_retain; + u16 time_to_wait; +#endif + u32 reserved7[3]; +#if defined(__BIG_ENDIAN) + u16 reserved8; + u16 itt; +#define ISCSI_LOGOUT_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_LOGOUT_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_LOGOUT_RESPONSE_TYPE (0x3<<14) +#define ISCSI_LOGOUT_RESPONSE_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_LOGOUT_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_LOGOUT_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_LOGOUT_RESPONSE_TYPE (0x3<<14) +#define ISCSI_LOGOUT_RESPONSE_TYPE_SHIFT 14 + u16 reserved8; +#endif + u32 cq_req_sn; +}; + + +/* + * iSCSI Nop-In CQE + */ +struct iscsi_nop_in_msg { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 reserved1; + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 reserved1; + u8 op_code; +#endif + u32 data_length; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 ttt; + u32 reserved2; +#if defined(__BIG_ENDIAN) + u16 reserved4; + u8 err_code; + u8 reserved3; +#elif defined(__LITTLE_ENDIAN) + u8 reserved3; + u8 err_code; + u16 reserved4; +#endif + u32 reserved5; + u32 lun[2]; + u32 reserved6[4]; +#if defined(__BIG_ENDIAN) + u16 reserved7; + u16 itt; +#define ISCSI_NOP_IN_MSG_INDEX (0x3FFF<<0) +#define ISCSI_NOP_IN_MSG_INDEX_SHIFT 0 +#define ISCSI_NOP_IN_MSG_TYPE (0x3<<14) +#define ISCSI_NOP_IN_MSG_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_NOP_IN_MSG_INDEX (0x3FFF<<0) +#define ISCSI_NOP_IN_MSG_INDEX_SHIFT 0 +#define ISCSI_NOP_IN_MSG_TYPE (0x3<<14) +#define ISCSI_NOP_IN_MSG_TYPE_SHIFT 14 + u16 reserved7; +#endif + u32 cq_req_sn; +}; + + +/* + * iSCSI NOP-OUT SQ WQE + */ +struct iscsi_nop_out_request { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 op_attr; +#define ISCSI_NOP_OUT_REQUEST_RESERVED1 (0x7F<<0) +#define ISCSI_NOP_OUT_REQUEST_RESERVED1_SHIFT 0 +#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE (0x1<<7) +#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE_SHIFT 7 + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 op_attr; +#define ISCSI_NOP_OUT_REQUEST_RESERVED1 (0x7F<<0) +#define ISCSI_NOP_OUT_REQUEST_RESERVED1_SHIFT 0 +#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE (0x1<<7) +#define ISCSI_NOP_OUT_REQUEST_ALWAYS_ONE_SHIFT 7 + u8 op_code; +#endif + u32 data_length; + u32 lun[2]; +#if defined(__BIG_ENDIAN) + u16 reserved2; + u16 itt; +#define ISCSI_NOP_OUT_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_NOP_OUT_REQUEST_INDEX_SHIFT 0 +#define ISCSI_NOP_OUT_REQUEST_TYPE (0x3<<14) +#define ISCSI_NOP_OUT_REQUEST_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_NOP_OUT_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_NOP_OUT_REQUEST_INDEX_SHIFT 0 +#define ISCSI_NOP_OUT_REQUEST_TYPE (0x3<<14) +#define ISCSI_NOP_OUT_REQUEST_TYPE_SHIFT 14 + u16 reserved2; +#endif + u32 ttt; + u32 cmd_sn; + u32 reserved3[2]; + u32 resp_bd_list_addr_lo; + u32 resp_bd_list_addr_hi; + u32 resp_buffer; +#define ISCSI_NOP_OUT_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0) +#define ISCSI_NOP_OUT_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0 +#define ISCSI_NOP_OUT_REQUEST_NUM_RESP_BDS (0xFF<<24) +#define ISCSI_NOP_OUT_REQUEST_NUM_RESP_BDS_SHIFT 24 +#if defined(__BIG_ENDIAN) + u16 reserved7; + u8 reserved6; + u8 flags; +#define ISCSI_NOP_OUT_REQUEST_RESERVED4 (0x1<<0) +#define ISCSI_NOP_OUT_REQUEST_RESERVED4_SHIFT 0 +#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION (0x1<<1) +#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION_SHIFT 1 +#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL (0x3F<<2) +#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL_SHIFT 2 +#elif defined(__LITTLE_ENDIAN) + u8 flags; +#define ISCSI_NOP_OUT_REQUEST_RESERVED4 (0x1<<0) +#define ISCSI_NOP_OUT_REQUEST_RESERVED4_SHIFT 0 +#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION (0x1<<1) +#define ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION_SHIFT 1 +#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL (0x3F<<2) +#define ISCSI_NOP_OUT_REQUEST_ZERO_FILL_SHIFT 2 + u8 reserved6; + u16 reserved7; +#endif + u32 bd_list_addr_lo; + u32 bd_list_addr_hi; +#if defined(__BIG_ENDIAN) + u8 cq_index; + u8 reserved9; + u8 reserved8; + u8 num_bds; +#elif defined(__LITTLE_ENDIAN) + u8 num_bds; + u8 reserved8; + u8 reserved9; + u8 cq_index; +#endif +}; + + + + +/* + * iSCSI Reject CQE + */ +struct iscsi_reject_msg { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 reserved1; + u8 reason; + u8 reserved0; +#elif defined(__LITTLE_ENDIAN) + u8 reserved0; + u8 reason; + u8 reserved1; + u8 op_code; +#endif + u32 data_length; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 reserved2[2]; +#if defined(__BIG_ENDIAN) + u16 reserved4; + u8 err_code; + u8 reserved3; +#elif defined(__LITTLE_ENDIAN) + u8 reserved3; + u8 err_code; + u16 reserved4; +#endif + u32 reserved5[8]; + u32 cq_req_sn; +}; + + +/* + * iSCSI TMF SQ WQE + */ +struct iscsi_tmf_request { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 op_attr; +#define ISCSI_TMF_REQUEST_FUNCTION (0x7F<<0) +#define ISCSI_TMF_REQUEST_FUNCTION_SHIFT 0 +#define ISCSI_TMF_REQUEST_ALWAYS_ONE (0x1<<7) +#define ISCSI_TMF_REQUEST_ALWAYS_ONE_SHIFT 7 + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 op_attr; +#define ISCSI_TMF_REQUEST_FUNCTION (0x7F<<0) +#define ISCSI_TMF_REQUEST_FUNCTION_SHIFT 0 +#define ISCSI_TMF_REQUEST_ALWAYS_ONE (0x1<<7) +#define ISCSI_TMF_REQUEST_ALWAYS_ONE_SHIFT 7 + u8 op_code; +#endif + u32 data_length; + u32 lun[2]; +#if defined(__BIG_ENDIAN) + u16 reserved1; + u16 itt; +#define ISCSI_TMF_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_TMF_REQUEST_INDEX_SHIFT 0 +#define ISCSI_TMF_REQUEST_TYPE (0x3<<14) +#define ISCSI_TMF_REQUEST_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_TMF_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_TMF_REQUEST_INDEX_SHIFT 0 +#define ISCSI_TMF_REQUEST_TYPE (0x3<<14) +#define ISCSI_TMF_REQUEST_TYPE_SHIFT 14 + u16 reserved1; +#endif + u32 ref_itt; + u32 cmd_sn; + u32 reserved2; + u32 ref_cmd_sn; + u32 reserved3[3]; + u32 zero_fill; + u32 bd_list_addr_lo; + u32 bd_list_addr_hi; +#if defined(__BIG_ENDIAN) + u8 cq_index; + u8 reserved5; + u8 reserved4; + u8 num_bds; +#elif defined(__LITTLE_ENDIAN) + u8 num_bds; + u8 reserved4; + u8 reserved5; + u8 cq_index; +#endif +}; + +/* + * iSCSI Text SQ WQE + */ +struct iscsi_text_request { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 op_attr; +#define ISCSI_TEXT_REQUEST_RESERVED1 (0x3F<<0) +#define ISCSI_TEXT_REQUEST_RESERVED1_SHIFT 0 +#define ISCSI_TEXT_REQUEST_CONT (0x1<<6) +#define ISCSI_TEXT_REQUEST_CONT_SHIFT 6 +#define ISCSI_TEXT_REQUEST_FINAL (0x1<<7) +#define ISCSI_TEXT_REQUEST_FINAL_SHIFT 7 + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 op_attr; +#define ISCSI_TEXT_REQUEST_RESERVED1 (0x3F<<0) +#define ISCSI_TEXT_REQUEST_RESERVED1_SHIFT 0 +#define ISCSI_TEXT_REQUEST_CONT (0x1<<6) +#define ISCSI_TEXT_REQUEST_CONT_SHIFT 6 +#define ISCSI_TEXT_REQUEST_FINAL (0x1<<7) +#define ISCSI_TEXT_REQUEST_FINAL_SHIFT 7 + u8 op_code; +#endif + u32 data_length; + u32 lun[2]; +#if defined(__BIG_ENDIAN) + u16 reserved3; + u16 itt; +#define ISCSI_TEXT_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_TEXT_REQUEST_INDEX_SHIFT 0 +#define ISCSI_TEXT_REQUEST_TYPE (0x3<<14) +#define ISCSI_TEXT_REQUEST_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_TEXT_REQUEST_INDEX (0x3FFF<<0) +#define ISCSI_TEXT_REQUEST_INDEX_SHIFT 0 +#define ISCSI_TEXT_REQUEST_TYPE (0x3<<14) +#define ISCSI_TEXT_REQUEST_TYPE_SHIFT 14 + u16 reserved3; +#endif + u32 ttt; + u32 cmd_sn; + u32 reserved4[2]; + u32 resp_bd_list_addr_lo; + u32 resp_bd_list_addr_hi; + u32 resp_buffer; +#define ISCSI_TEXT_REQUEST_RESP_BUFFER_LENGTH (0xFFFFFF<<0) +#define ISCSI_TEXT_REQUEST_RESP_BUFFER_LENGTH_SHIFT 0 +#define ISCSI_TEXT_REQUEST_NUM_RESP_BDS (0xFF<<24) +#define ISCSI_TEXT_REQUEST_NUM_RESP_BDS_SHIFT 24 + u32 zero_fill; + u32 bd_list_addr_lo; + u32 bd_list_addr_hi; +#if defined(__BIG_ENDIAN) + u8 cq_index; + u8 reserved7; + u8 reserved6; + u8 num_bds; +#elif defined(__LITTLE_ENDIAN) + u8 num_bds; + u8 reserved6; + u8 reserved7; + u8 cq_index; +#endif +}; + +/* + * iSCSI SQ WQE + */ +union iscsi_request { + struct iscsi_cmd_request cmd; + struct iscsi_tmf_request tmf; + struct iscsi_nop_out_request nop_out; + struct iscsi_login_request login_req; + struct iscsi_text_request text; + struct iscsi_logout_request logout_req; + struct iscsi_cleanup_request cleanup; +}; + + +/* + * iSCSI TMF CQE + */ +struct iscsi_tmf_response { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 reserved1; + u8 response; + u8 reserved0; +#elif defined(__LITTLE_ENDIAN) + u8 reserved0; + u8 response; + u8 reserved1; + u8 op_code; +#endif + u32 reserved2; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 reserved3[2]; +#if defined(__BIG_ENDIAN) + u16 reserved5; + u8 err_code; + u8 reserved4; +#elif defined(__LITTLE_ENDIAN) + u8 reserved4; + u8 err_code; + u16 reserved5; +#endif + u32 reserved6[7]; +#if defined(__BIG_ENDIAN) + u16 reserved7; + u16 itt; +#define ISCSI_TMF_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_TMF_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_TMF_RESPONSE_TYPE (0x3<<14) +#define ISCSI_TMF_RESPONSE_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_TMF_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_TMF_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_TMF_RESPONSE_TYPE (0x3<<14) +#define ISCSI_TMF_RESPONSE_TYPE_SHIFT 14 + u16 reserved7; +#endif + u32 cq_req_sn; +}; + +/* + * iSCSI Text CQE + */ +struct iscsi_text_response { +#if defined(__BIG_ENDIAN) + u8 op_code; + u8 response_flags; +#define ISCSI_TEXT_RESPONSE_RESERVED1 (0x3F<<0) +#define ISCSI_TEXT_RESPONSE_RESERVED1_SHIFT 0 +#define ISCSI_TEXT_RESPONSE_CONT (0x1<<6) +#define ISCSI_TEXT_RESPONSE_CONT_SHIFT 6 +#define ISCSI_TEXT_RESPONSE_FINAL (0x1<<7) +#define ISCSI_TEXT_RESPONSE_FINAL_SHIFT 7 + u16 reserved0; +#elif defined(__LITTLE_ENDIAN) + u16 reserved0; + u8 response_flags; +#define ISCSI_TEXT_RESPONSE_RESERVED1 (0x3F<<0) +#define ISCSI_TEXT_RESPONSE_RESERVED1_SHIFT 0 +#define ISCSI_TEXT_RESPONSE_CONT (0x1<<6) +#define ISCSI_TEXT_RESPONSE_CONT_SHIFT 6 +#define ISCSI_TEXT_RESPONSE_FINAL (0x1<<7) +#define ISCSI_TEXT_RESPONSE_FINAL_SHIFT 7 + u8 op_code; +#endif + u32 data_length; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 ttt; + u32 reserved2; +#if defined(__BIG_ENDIAN) + u16 reserved4; + u8 err_code; + u8 reserved3; +#elif defined(__LITTLE_ENDIAN) + u8 reserved3; + u8 err_code; + u16 reserved4; +#endif + u32 reserved5; + u32 lun[2]; + u32 reserved6[4]; +#if defined(__BIG_ENDIAN) + u16 reserved7; + u16 itt; +#define ISCSI_TEXT_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_TEXT_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_TEXT_RESPONSE_TYPE (0x3<<14) +#define ISCSI_TEXT_RESPONSE_TYPE_SHIFT 14 +#elif defined(__LITTLE_ENDIAN) + u16 itt; +#define ISCSI_TEXT_RESPONSE_INDEX (0x3FFF<<0) +#define ISCSI_TEXT_RESPONSE_INDEX_SHIFT 0 +#define ISCSI_TEXT_RESPONSE_TYPE (0x3<<14) +#define ISCSI_TEXT_RESPONSE_TYPE_SHIFT 14 + u16 reserved7; +#endif + u32 cq_req_sn; +}; + +/* + * iSCSI CQE + */ +union iscsi_response { + struct iscsi_cmd_response cmd; + struct iscsi_tmf_response tmf; + struct iscsi_login_response login_resp; + struct iscsi_text_response text; + struct iscsi_logout_response logout_resp; + struct iscsi_cleanup_response cleanup; + struct iscsi_reject_msg reject; + struct iscsi_async_msg async; + struct iscsi_nop_in_msg nop_in; +}; + + + + + + +#endif /* __57XX_ISCSI_HSI_LINUX_LE__ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2.c b/vmkdrivers/src_9/drivers/net/bnx2/bnx2.c index 49d197c..b28f29c 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2.c +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2.c @@ -1,6 +1,6 @@ /* bnx2.c: Broadcom NX2 network driver. * - * Copyright (c) 2004-2011 Broadcom Corporation + * Copyright (c) 2004-2012 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,11 +22,14 @@ #endif #endif +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #if (LINUX_VERSION_CODE >= 0x020600) #include #endif +#include #include #include #include @@ -74,17 +77,22 @@ #if (LINUX_VERSION_CODE >= 0x20617) && !defined(NETIF_F_MULTI_QUEUE) #include #endif +#ifdef HAVE_AER +#include +#endif + +#if (LINUX_VERSION_CODE >= 0x020610) +#define BCM_CNIC 1 #include "cnic_if.h" +#endif #include "bnx2.h" #include "bnx2_fw.h" #include "bnx2_fw2.h" #define DRV_MODULE_NAME "bnx2" -#define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "2.0.15g.v50.11-7vmw" -#define DRV_MODULE_RELDATE "Jun 29, 2011" - +#define DRV_MODULE_VERSION "2.2.3h.v55.2" +#define DRV_MODULE_RELDATE "Feb 12, 2013" #define RUN_AT(x) (jiffies + (x)) /* Time in jiffies before concluding the transmitter is hung. */ @@ -130,10 +138,21 @@ static int psod_on_tx_timeout; module_param(psod_on_tx_timeout, int, 0); MODULE_PARM_DESC(psod_on_tx_timeout, "For debugging purposes, crash the system " " when a tx timeout occurs"); + +static int disable_msi_1shot = 0; +module_param(disable_msi_1shot, int, 0); +MODULE_PARM_DESC(disable_msi_1shot, "For debugging purposes, disable 1shot " + " MSI mode if set to value of 1"); +#if (VMWARE_ESX_DDK_VERSION >= 55000) +static int disable_fw_dmp; +module_param(disable_fw_dmp, int, 0); +MODULE_PARM_DESC(disable_fw_dmp, "For debugging purposes, disable firmware " + "dump feature when set to value of 1"); +#endif #endif -#ifdef BNX2_ENABLE_NETQUEUE #define BNX2_MAX_NIC 32 +#ifdef BNX2_ENABLE_NETQUEUE #define BNX2_OPTION_UNSET -1 #define BNX2_OPTION_ZERO 0 @@ -164,6 +183,15 @@ MODULE_PARM_DESC(force_netq, "Option used for 5709/5716 only: " "use 2 NetQueues on the fourth 5709/5716]"); #endif /* BNX2_ENABLE_NETQUEUE */ +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) +#include +#define BNX2_DUMPNAME "bnx2_fwdmp" +static vmklnx_DumpFileHandle bnx2_fwdmp_dh; +static void *fwdmp_va_ptr; +static struct bnx2 *fwdmp_bp_ptr[BNX2_MAX_NIC]; +static VMK_ReturnStatus bnx2_fwdmp_callback(void *cookie, vmk_Bool liveDump); +#endif + typedef enum { BCM5706 = 0, NC370T, @@ -386,7 +414,8 @@ static inline u32 bnx2_tx_avail(struct bnx2 *bp, struct bnx2_tx_ring_info *txr) { u32 diff; - smp_mb(); + /* Tell compiler to fetch tx_prod and tx_cons from memory. */ + barrier(); /* The ring uses 256 indices for 255 entries, one of them * needs to be skipped. @@ -397,7 +426,7 @@ static inline u32 bnx2_tx_avail(struct bnx2 *bp, struct bnx2_tx_ring_info *txr) if (diff == TX_DESC_CNT) diff = MAX_TX_DESC_CNT; } - return (bp->tx_ring_size - diff); + return bp->tx_ring_size - diff; } static u32 @@ -421,6 +450,7 @@ bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val) spin_unlock_bh(&bp->indirect_lock); } +#if defined(__VMKLNX__) static void bnx2_reg_wr_ind_cfg(struct bnx2 *bp, u32 offset, u32 val) { @@ -431,6 +461,7 @@ bnx2_reg_wr_ind_cfg(struct bnx2 *bp, u32 offset, u32 val) pci_write_config_dword(pdev, BNX2_PCICFG_REG_WINDOW, val); spin_unlock_bh(&bp->indirect_lock); } +#endif /* defined(__VMKLNX__) */ static void bnx2_shmem_wr(struct bnx2 *bp, u32 offset, u32 val) @@ -441,7 +472,7 @@ bnx2_shmem_wr(struct bnx2 *bp, u32 offset, u32 val) static u32 bnx2_shmem_rd(struct bnx2 *bp, u32 offset) { - return (bnx2_reg_rd_ind(bp, bp->shmem_base + offset)); + return bnx2_reg_rd_ind(bp, bp->shmem_base + offset); } static void @@ -530,6 +561,9 @@ static int bnx2_register_cnic(struct net_device *dev, struct cnic_ops *ops, if (cp->drv_state & CNIC_DRV_STATE_REGD) return -EBUSY; + if (!bnx2_reg_rd_ind(bp, BNX2_FW_MAX_ISCSI_CONN)) + return -ENODEV; + bp->cnic_data = data; rcu_assign_pointer(bp->cnic_ops, ops); @@ -550,7 +584,7 @@ static int bnx2_unregister_cnic(struct net_device *dev) mutex_lock(&bp->cnic_lock); cp->drv_state = 0; bnapi->cnic_present = 0; - rcu_assign_pointer(bp->cnic_ops, NULL); + RCU_INIT_POINTER(bp->cnic_ops, NULL); mutex_unlock(&bp->cnic_lock); synchronize_rcu(); return 0; @@ -565,6 +599,9 @@ struct cnic_eth_dev *bnx2_cnic_probe2(struct net_device *dev) struct bnx2 *bp = netdev_priv(dev); struct cnic_eth_dev *cp = &bp->cnic_eth_dev; + if (!cp->max_iscsi_conn) + return NULL; + cp->version = CNIC_ETH_DEV_VER; cp->drv_owner = THIS_MODULE; cp->chip_id = bp->chip_id; @@ -576,8 +613,6 @@ struct cnic_eth_dev *bnx2_cnic_probe2(struct net_device *dev) return cp; } - - #if !(defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000)) #if defined(BNX2_INBOX) EXPORT_SYMBOL(bnx2_cnic_probe); @@ -593,10 +628,17 @@ bnx2_cnic_stop(struct bnx2 *bp) struct cnic_ctl_info info; mutex_lock(&bp->cnic_lock); - c_ops = bp->cnic_ops; + c_ops = rcu_dereference_protected(bp->cnic_ops, + lockdep_is_held(&bp->cnic_lock)); if (c_ops) { info.cmd = CNIC_CTL_STOP_CMD; + +#if defined(__VMKLNX__) + VMKAPI_MODULE_CALL_VOID(c_ops->cnic_owner->moduleID, + c_ops->cnic_ctl, bp->cnic_data, &info); +#else c_ops->cnic_ctl(bp->cnic_data, &info); +#endif } mutex_unlock(&bp->cnic_lock); } @@ -608,7 +650,8 @@ bnx2_cnic_start(struct bnx2 *bp) struct cnic_ctl_info info; mutex_lock(&bp->cnic_lock); - c_ops = bp->cnic_ops; + c_ops = rcu_dereference_protected(bp->cnic_ops, + lockdep_is_held(&bp->cnic_lock)); if (c_ops) { if (!(bp->flags & BNX2_FLAG_USING_MSIX)) { struct bnx2_napi *bnapi = &bp->bnx2_napi[0]; @@ -616,7 +659,12 @@ bnx2_cnic_start(struct bnx2 *bp) bnapi->cnic_tag = bnapi->last_status_idx; } info.cmd = CNIC_CTL_START_CMD; +#if defined(__VMKLNX__) + VMKAPI_MODULE_CALL_VOID(c_ops->cnic_owner->moduleID, + c_ops->cnic_ctl, bp->cnic_data, &info); +#else c_ops->cnic_ctl(bp->cnic_data, &info); +#endif } mutex_unlock(&bp->cnic_lock); } @@ -850,8 +898,7 @@ bnx2_netqueue_tx_flush(struct bnx2 *bp) txr = &bnapi->tx_ring; bnx2_netqueue_tx_flush_queue(bnapi, txr); - printk(KERN_ALERT PFX "%s: flushed default TX queue\n", - bp->dev->name); + netdev_info(bp->dev, "flushed default TX queue\n"); /* Flush NetQ rings */ for_each_nondefault_tx_queue(bp, i) { @@ -861,8 +908,7 @@ bnx2_netqueue_tx_flush(struct bnx2 *bp) rmb(); bnx2_netqueue_tx_flush_queue(bnapi, txr); - printk(KERN_ALERT PFX "%s: flushed TX queue %d\n", - bp->dev->name, i); + netdev_info(bp->dev, "flushed TX queue %d\n", i); } } @@ -871,13 +917,13 @@ bnx2_netif_stop(struct bnx2 *bp, bool stop_cnic) { if (stop_cnic) bnx2_cnic_stop(bp); + if (netif_running(bp->dev)) { + bnx2_disable_int_sync(bp); + netif_carrier_off(bp->dev); /* prevent tx timeout */ netif_tx_disable(bp->dev); } - bnx2_disable_int_sync(bp); - netif_carrier_off(bp->dev); /* prevent tx timeout */ - /* Give some settling time */ msleep(250); @@ -887,9 +933,8 @@ bnx2_netif_stop(struct bnx2 *bp, bool stop_cnic) rmb(); - if(bnx2_netqueue_open_started(bp)) { + if (bnx2_netqueue_open_started(bp)) bnx2_netqueue_tx_flush(bp); - } } #else @@ -901,10 +946,10 @@ bnx2_netif_stop(struct bnx2 *bp, bool stop_cnic) bnx2_cnic_stop(bp); if (netif_running(bp->dev)) { bnx2_napi_disable(bp); + bnx2_disable_int_sync(bp); + netif_carrier_off(bp->dev); /* prevent tx timeout */ netif_tx_disable(bp->dev); } - bnx2_disable_int_sync(bp); - netif_carrier_off(bp->dev); /* prevent tx timeout */ } #endif @@ -937,9 +982,15 @@ bnx2_free_tx_mem(struct bnx2 *bp) struct bnx2_tx_ring_info *txr = &bnapi->tx_ring; if (txr->tx_desc_ring) { +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_free_coherent(&bp->pdev->dev, TXBD_RING_SIZE, + txr->tx_desc_ring, + txr->tx_desc_mapping); +#else pci_free_consistent(bp->pdev, TXBD_RING_SIZE, txr->tx_desc_ring, txr->tx_desc_mapping); +#endif txr->tx_desc_ring = NULL; } kfree(txr->tx_buf_ring); @@ -959,9 +1010,15 @@ bnx2_free_rx_mem(struct bnx2 *bp) for (j = 0; j < bp->rx_max_ring; j++) { if (rxr->rx_desc_ring[j]) +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_free_coherent(&bp->pdev->dev, RXBD_RING_SIZE, + rxr->rx_desc_ring[j], + rxr->rx_desc_mapping[j]); +#else pci_free_consistent(bp->pdev, RXBD_RING_SIZE, rxr->rx_desc_ring[j], rxr->rx_desc_mapping[j]); +#endif rxr->rx_desc_ring[j] = NULL; } vfree(rxr->rx_buf_ring); @@ -969,9 +1026,15 @@ bnx2_free_rx_mem(struct bnx2 *bp) for (j = 0; j < bp->rx_max_pg_ring; j++) { if (rxr->rx_pg_desc_ring[j]) +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_free_coherent(&bp->pdev->dev, RXBD_RING_SIZE, + rxr->rx_pg_desc_ring[j], + rxr->rx_pg_desc_mapping[j]); +#else pci_free_consistent(bp->pdev, RXBD_RING_SIZE, rxr->rx_pg_desc_ring[j], rxr->rx_pg_desc_mapping[j]); +#endif rxr->rx_pg_desc_ring[j] = NULL; } vfree(rxr->rx_pg_ring); @@ -994,8 +1057,13 @@ bnx2_alloc_tx_mem(struct bnx2 *bp) memset(txr->tx_buf_ring, 0, SW_TXBD_RING_SIZE); txr->tx_desc_ring = +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_alloc_coherent(&bp->pdev->dev, TXBD_RING_SIZE, + &txr->tx_desc_mapping, GFP_KERNEL); +#else pci_alloc_consistent(bp->pdev, TXBD_RING_SIZE, &txr->tx_desc_mapping); +#endif if (txr->tx_desc_ring == NULL) return -ENOMEM; } @@ -1022,8 +1090,15 @@ bnx2_alloc_rx_mem(struct bnx2 *bp) for (j = 0; j < bp->rx_max_ring; j++) { rxr->rx_desc_ring[j] = +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_alloc_coherent(&bp->pdev->dev, + RXBD_RING_SIZE, + &rxr->rx_desc_mapping[j], + GFP_KERNEL); +#else pci_alloc_consistent(bp->pdev, RXBD_RING_SIZE, &rxr->rx_desc_mapping[j]); +#endif if (rxr->rx_desc_ring[j] == NULL) return -ENOMEM; @@ -1041,8 +1116,15 @@ bnx2_alloc_rx_mem(struct bnx2 *bp) for (j = 0; j < bp->rx_max_pg_ring; j++) { rxr->rx_pg_desc_ring[j] = +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_alloc_coherent(&bp->pdev->dev, + RXBD_RING_SIZE, + &rxr->rx_pg_desc_mapping[j], + GFP_KERNEL); +#else pci_alloc_consistent(bp->pdev, RXBD_RING_SIZE, &rxr->rx_pg_desc_mapping[j]); +#endif if (rxr->rx_pg_desc_ring[j] == NULL) return -ENOMEM; @@ -1062,16 +1144,28 @@ bnx2_free_mem(struct bnx2 *bp) for (i = 0; i < bp->ctx_pages; i++) { if (bp->ctx_blk[i]) { +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_free_coherent(&bp->pdev->dev, BCM_PAGE_SIZE, + bp->ctx_blk[i], + bp->ctx_blk_mapping[i]); +#else pci_free_consistent(bp->pdev, BCM_PAGE_SIZE, bp->ctx_blk[i], bp->ctx_blk_mapping[i]); +#endif bp->ctx_blk[i] = NULL; } } if (bnapi->status_blk.msi) { +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_free_coherent(&bp->pdev->dev, bp->status_stats_size, + bnapi->status_blk.msi, + bp->status_blk_mapping); +#else pci_free_consistent(bp->pdev, bp->status_stats_size, bnapi->status_blk.msi, bp->status_blk_mapping); +#endif bnapi->status_blk.msi = NULL; bp->stats_blk = NULL; } @@ -1094,8 +1188,13 @@ bnx2_alloc_mem(struct bnx2 *bp) bp->status_stats_size = status_blk_size + sizeof(struct statistics_block); +#if (LINUX_VERSION_CODE >= 0x02061b) + status_blk = dma_alloc_coherent(&bp->pdev->dev, bp->status_stats_size, + &bp->status_blk_mapping, GFP_KERNEL); +#else status_blk = pci_alloc_consistent(bp->pdev, bp->status_stats_size, &bp->status_blk_mapping); +#endif if (status_blk == NULL) goto alloc_mem_err; @@ -1108,13 +1207,12 @@ bnx2_alloc_mem(struct bnx2 *bp) bnapi->hw_rx_cons_ptr = &bnapi->status_blk.msi->status_rx_quick_consumer_index0; if (bp->flags & BNX2_FLAG_MSIX_CAP) { - for (i = 1; i < BNX2_MAX_MSIX_VEC; i++) { + for (i = 1; i < bp->irq_nvecs; i++) { struct status_block_msix *sblk; bnapi = &bp->bnx2_napi[i]; - sblk = (void *) (status_blk + - BNX2_SBLK_MSIX_ALIGN_SIZE * i); + sblk = (status_blk + BNX2_SBLK_MSIX_ALIGN_SIZE * i); bnapi->status_blk.msix = sblk; bnapi->hw_tx_cons_ptr = &sblk->status_tx_quick_consumer_index; @@ -1138,9 +1236,16 @@ bnx2_alloc_mem(struct bnx2 *bp) if (bp->ctx_pages == 0) bp->ctx_pages = 1; for (i = 0; i < bp->ctx_pages; i++) { +#if (LINUX_VERSION_CODE >= 0x02061b) + bp->ctx_blk[i] = dma_alloc_coherent(&bp->pdev->dev, + BCM_PAGE_SIZE, + &bp->ctx_blk_mapping[i], + GFP_KERNEL); +#else bp->ctx_blk[i] = pci_alloc_consistent(bp->pdev, BCM_PAGE_SIZE, &bp->ctx_blk_mapping[i]); +#endif if (bp->ctx_blk[i] == NULL) goto alloc_mem_err; } @@ -1223,9 +1328,9 @@ bnx2_report_fw_link(struct bnx2 *bp) static char * bnx2_xceiver_str(struct bnx2 *bp) { - return ((bp->phy_port == PORT_FIBRE) ? "SerDes" : + return (bp->phy_port == PORT_FIBRE) ? "SerDes" : ((bp->phy_flags & BNX2_PHY_FLAG_SERDES) ? "Remote Copper" : - "Copper")); + "Copper"); } static void @@ -1233,33 +1338,27 @@ bnx2_report_link(struct bnx2 *bp) { if (bp->link_up) { netif_carrier_on(bp->dev); - printk(KERN_INFO PFX "%s NIC %s Link is Up, ", bp->dev->name, - bnx2_xceiver_str(bp)); - - printk("%d Mbps ", bp->line_speed); - - if (bp->duplex == DUPLEX_FULL) - printk("full duplex"); - else - printk("half duplex"); + netdev_info(bp->dev, "NIC %s Link is Up, %d Mbps %s duplex", + bnx2_xceiver_str(bp), + bp->line_speed, + bp->duplex == DUPLEX_FULL ? "full" : "half"); if (bp->flow_ctrl) { if (bp->flow_ctrl & FLOW_CTRL_RX) { - printk(", receive "); + pr_cont(", receive "); if (bp->flow_ctrl & FLOW_CTRL_TX) - printk("& transmit "); + pr_cont("& transmit "); } else { - printk(", transmit "); + pr_cont(", transmit "); } - printk("flow control ON"); + pr_cont("flow control ON"); } - printk("\n"); - } - else { + pr_cont("\n"); + } else { netif_carrier_off(bp->dev); - printk(KERN_ERR PFX "%s NIC %s Link is Down\n", bp->dev->name, - bnx2_xceiver_str(bp)); + netdev_err(bp->dev, "NIC %s Link is Down\n", + bnx2_xceiver_str(bp)); } bnx2_report_fw_link(bp); @@ -1521,30 +1620,9 @@ bnx2_init_rx_context(struct bnx2 *bp, u32 cid) val |= BNX2_L2CTX_CTX_TYPE_SIZE_L2; val |= 0x02 << 8; - if (CHIP_NUM(bp) == CHIP_NUM_5709) { - u32 lo_water, hi_water; + if (bp->flow_ctrl & FLOW_CTRL_TX) + val |= BNX2_L2CTX_FLOW_CTRL_ENABLE; - if (bp->flow_ctrl & FLOW_CTRL_TX) - lo_water = BNX2_L2CTX_LO_WATER_MARK_DEFAULT; - else - lo_water = BNX2_L2CTX_LO_WATER_MARK_DIS; - if (lo_water >= bp->rx_ring_size) - lo_water = 0; - - hi_water = min(bp->rx_ring_size / 4, (int) lo_water + 16); - - if (hi_water <= lo_water) - lo_water = 0; - - hi_water /= BNX2_L2CTX_HI_WATER_MARK_SCALE; - lo_water /= BNX2_L2CTX_LO_WATER_MARK_SCALE; - - if (hi_water > 0xf) - hi_water = 0xf; - else if (hi_water == 0) - lo_water = 0; - val |= lo_water | (hi_water << BNX2_L2CTX_HI_WATER_MARK_SHIFT); - } bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_CTX_TYPE, val); } @@ -1625,8 +1703,7 @@ bnx2_set_mac_link(struct bnx2 *bp) /* Acknowledge the interrupt. */ REG_WR(bp, BNX2_EMAC_STATUS, BNX2_EMAC_STATUS_LINK_CHANGE); - if (CHIP_NUM(bp) == CHIP_NUM_5709) - bnx2_init_all_rx_contexts(bp); + bnx2_init_all_rx_contexts(bp); } static void @@ -2010,7 +2087,7 @@ __acquires(&bp->phy_lock) u32 new_adv = 0; if (bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP) - return (bnx2_setup_remote_phy(bp, port)); + return bnx2_setup_remote_phy(bp, port); if (!(bp->autoneg & AUTONEG_SPEED)) { u32 new_bmcr; @@ -2245,22 +2322,27 @@ bnx2_remote_phy_event(struct bnx2 *bp) switch (speed) { case BNX2_LINK_STATUS_10HALF: bp->duplex = DUPLEX_HALF; + /* fall through */ case BNX2_LINK_STATUS_10FULL: bp->line_speed = SPEED_10; break; case BNX2_LINK_STATUS_100HALF: bp->duplex = DUPLEX_HALF; + /* fall through */ case BNX2_LINK_STATUS_100BASE_T4: + /* fall through */ case BNX2_LINK_STATUS_100FULL: bp->line_speed = SPEED_100; break; case BNX2_LINK_STATUS_1000HALF: bp->duplex = DUPLEX_HALF; + /* fall through */ case BNX2_LINK_STATUS_1000FULL: bp->line_speed = SPEED_1000; break; case BNX2_LINK_STATUS_2500HALF: bp->duplex = DUPLEX_HALF; + /* fall through */ case BNX2_LINK_STATUS_2500FULL: bp->line_speed = SPEED_2500; break; @@ -2331,8 +2413,8 @@ __acquires(&bp->phy_lock) if (bp->autoneg & AUTONEG_SPEED) { u32 adv_reg, adv1000_reg; - u32 new_adv_reg = 0; - u32 new_adv1000_reg = 0; + u32 new_adv = 0; + u32 new_adv1000 = 0; bnx2_read_phy(bp, bp->mii_adv, &adv_reg); adv_reg &= (PHY_ALL_10_100_SPEED | ADVERTISE_PAUSE_CAP | @@ -2341,27 +2423,17 @@ __acquires(&bp->phy_lock) bnx2_read_phy(bp, MII_CTRL1000, &adv1000_reg); adv1000_reg &= PHY_ALL_1000_SPEED; - if (bp->advertising & ADVERTISED_10baseT_Half) - new_adv_reg |= ADVERTISE_10HALF; - if (bp->advertising & ADVERTISED_10baseT_Full) - new_adv_reg |= ADVERTISE_10FULL; - if (bp->advertising & ADVERTISED_100baseT_Half) - new_adv_reg |= ADVERTISE_100HALF; - if (bp->advertising & ADVERTISED_100baseT_Full) - new_adv_reg |= ADVERTISE_100FULL; - if (bp->advertising & ADVERTISED_1000baseT_Full) - new_adv1000_reg |= ADVERTISE_1000FULL; + new_adv = ethtool_adv_to_mii_adv_t(bp->advertising); + new_adv |= ADVERTISE_CSMA; + new_adv |= bnx2_phy_get_pause_adv(bp); - new_adv_reg |= ADVERTISE_CSMA; - - new_adv_reg |= bnx2_phy_get_pause_adv(bp); - - if ((adv1000_reg != new_adv1000_reg) || - (adv_reg != new_adv_reg) || + new_adv1000 |= ethtool_adv_to_mii_ctrl1000_t(bp->advertising); + if ((adv1000_reg != new_adv1000) || + (adv_reg != new_adv) || ((bmcr & BMCR_ANENABLE) == 0)) { - bnx2_write_phy(bp, bp->mii_adv, new_adv_reg); - bnx2_write_phy(bp, MII_CTRL1000, new_adv1000_reg); + bnx2_write_phy(bp, bp->mii_adv, new_adv); + bnx2_write_phy(bp, MII_CTRL1000, new_adv1000); bnx2_write_phy(bp, bp->mii_bmcr, BMCR_ANRESTART | BMCR_ANENABLE); } @@ -2427,10 +2499,10 @@ __acquires(&bp->phy_lock) return 0; if (bp->phy_flags & BNX2_PHY_FLAG_SERDES) { - return (bnx2_setup_serdes_phy(bp, port)); + return bnx2_setup_serdes_phy(bp, port); } else { - return (bnx2_setup_copper_phy(bp)); + return bnx2_setup_copper_phy(bp); } } @@ -2727,12 +2799,13 @@ bnx2_set_phy_loopback(struct bnx2 *bp) return 0; } -static void bnx2_dump_mcp_states(struct bnx2 *bp) +static void +bnx2_dump_mcp_state(struct bnx2 *bp) { + struct net_device *dev = bp->dev; u32 mcp_p0, mcp_p1; - printk(KERN_ERR PFX - "<--- start MCP states dump on %s --->\n", bp->dev->name); + netdev_err(dev, "<--- start MCP states dump --->\n"); if (CHIP_NUM(bp) == CHIP_NUM_5709) { mcp_p0 = BNX2_MCP_STATE_P0; mcp_p1 = BNX2_MCP_STATE_P1; @@ -2740,40 +2813,33 @@ static void bnx2_dump_mcp_states(struct bnx2 *bp) mcp_p0 = BNX2_MCP_STATE_P0_5708; mcp_p1 = BNX2_MCP_STATE_P1_5708; } - printk(KERN_ERR PFX "%s DEBUG: MCP_STATE_P0[%08x] MCP_STATE_P1[%08x]\n", - bp->dev->name, bnx2_reg_rd_ind(bp, mcp_p0), - bnx2_reg_rd_ind(bp, mcp_p1)); - printk(KERN_ERR PFX - "%s: MCP mode %x state %x evt_mask %x pc %x pc %x instr %x\n", - bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_MODE), - bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_STATE), - bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_EVENT_MASK), - bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_INSTRUCTION)); - printk(KERN_ERR PFX "(%s) shmem states:\n", bp->dev->name); - printk(KERN_ERR PFX - "%s: drv_mb %x fw_mb %x link_status %x drv_pulse_mb %x\n", - bp->dev->name, - bnx2_shmem_rd(bp, BNX2_DRV_MB), - bnx2_shmem_rd(bp, BNX2_FW_MB), - bnx2_shmem_rd(bp, BNX2_LINK_STATUS), - bnx2_shmem_rd(bp, BNX2_DRV_PULSE_MB)); - printk(KERN_ERR PFX - "%s: dev_info_signature %x reset_type %x condition %x\n", - bp->dev->name, - bnx2_shmem_rd(bp, BNX2_DEV_INFO_SIGNATURE), - bnx2_shmem_rd(bp, BNX2_BC_STATE_RESET_TYPE), - bnx2_shmem_rd(bp, BNX2_BC_STATE_CONDITION)); - DP_SHMEM_LINE(0x3cc); - DP_SHMEM_LINE(0x3dc); - DP_SHMEM_LINE(0x3ec); - printk(KERN_ERR PFX "%s: 0x3fc: 0x%08x\n", - bp->dev->name, - bnx2_shmem_rd(bp, 0x3fc)); - printk(KERN_ERR PFX - "<--- end MCP states dump on %s --->\n", bp->dev->name); + netdev_err(dev, "DEBUG: MCP_STATE_P0[%08x] MCP_STATE_P1[%08x]\n", + bnx2_reg_rd_ind(bp, mcp_p0), bnx2_reg_rd_ind(bp, mcp_p1)); + netdev_err(dev, "DEBUG: MCP mode[%08x] state[%08x] evt_mask[%08x]\n", + bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_MODE), + bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_STATE), + bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_EVENT_MASK)); + netdev_err(dev, "DEBUG: pc[%08x] pc[%08x] instr[%08x]\n", + bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER), + bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER), + bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_INSTRUCTION)); + netdev_err(dev, "DEBUG: shmem states:\n"); + netdev_err(dev, "DEBUG: drv_mb[%08x] fw_mb[%08x] link_status[%08x]", + bnx2_shmem_rd(bp, BNX2_DRV_MB), + bnx2_shmem_rd(bp, BNX2_FW_MB), + bnx2_shmem_rd(bp, BNX2_LINK_STATUS)); + pr_cont(" drv_pulse_mb[%08x]\n", bnx2_shmem_rd(bp, BNX2_DRV_PULSE_MB)); + netdev_err(dev, "DEBUG: dev_info_signature[%08x] reset_type[%08x]", + bnx2_shmem_rd(bp, BNX2_DEV_INFO_SIGNATURE), + bnx2_shmem_rd(bp, BNX2_BC_STATE_RESET_TYPE)); + pr_cont(" condition[%08x]\n", + bnx2_shmem_rd(bp, BNX2_BC_STATE_CONDITION)); + DP_SHMEM_LINE(bp, BNX2_BC_STATE_RESET_TYPE); + DP_SHMEM_LINE(bp, 0x3cc); + DP_SHMEM_LINE(bp, 0x3dc); + DP_SHMEM_LINE(bp, 0x3ec); + netdev_err(dev, "DEBUG: 0x3fc[%08x]\n", bnx2_shmem_rd(bp, 0x3fc)); + netdev_err(dev, "<--- end MCP states dump --->\n"); } static int @@ -2809,9 +2875,8 @@ bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int ack, int silent) bnx2_shmem_wr(bp, BNX2_DRV_MB, msg_data); if (!silent) { - printk(KERN_ERR PFX "%s: fw sync timeout, reset code = " - "%x\n", bp->dev->name, msg_data); - bnx2_dump_mcp_states(bp); + pr_err("fw sync timeout, reset code = %x\n", msg_data); + bnx2_dump_mcp_state(bp); } return -EBUSY; @@ -2922,11 +2987,8 @@ bnx2_alloc_bad_rbuf(struct bnx2 *bp) u32 val; good_mbuf = kmalloc(512 * sizeof(u16), GFP_KERNEL); - if (good_mbuf == NULL) { - printk(KERN_ERR PFX "Failed to allocate memory in " - "bnx2_alloc_bad_rbuf\n"); + if (good_mbuf == NULL) return -ENOMEM; - } REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS, BNX2_MISC_ENABLE_SET_BITS_RX_MBUF_ENABLE); @@ -2982,21 +3044,23 @@ bnx2_set_mac_addr(struct bnx2 *bp, u8 *mac_addr, u32 pos) } static inline int -bnx2_alloc_rx_page(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index) +bnx2_alloc_rx_page(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index, gfp_t gfp) { dma_addr_t mapping; struct sw_pg *rx_pg = &rxr->rx_pg_ring[index]; struct rx_bd *rxbd = &rxr->rx_pg_desc_ring[RX_RING(index)][RX_IDX(index)]; - struct page *page = alloc_page(GFP_ATOMIC); + struct page *page = alloc_page(gfp); if (!page) return -ENOMEM; +#if (LINUX_VERSION_CODE >= 0x02061b) + mapping = dma_map_page(&bp->pdev->dev, page, 0, PAGE_SIZE, + PCI_DMA_FROMDEVICE); + if (dma_mapping_error(&bp->pdev->dev, mapping)) { +#else mapping = pci_map_page(bp->pdev, page, 0, PAGE_SIZE, PCI_DMA_FROMDEVICE); -#if (LINUX_VERSION_CODE >= 0x02061b) - if (pci_dma_mapping_error(bp->pdev, mapping)) { -#else if (pci_dma_mapping_error(mapping)) { #endif __free_page(page); @@ -3004,7 +3068,7 @@ bnx2_alloc_rx_page(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index) } rx_pg->page = page; - pci_unmap_addr_set(rx_pg, mapping, mapping); + dma_unmap_addr_set(rx_pg, mapping, mapping); rxbd->rx_bd_haddr_hi = (u64) mapping >> 32; rxbd->rx_bd_haddr_lo = (u64) mapping & 0xffffffff; return 0; @@ -3019,15 +3083,20 @@ bnx2_free_rx_page(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index) if (!page) return; - pci_unmap_page(bp->pdev, pci_unmap_addr(rx_pg, mapping), PAGE_SIZE, +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(rx_pg, mapping), + PAGE_SIZE, PCI_DMA_FROMDEVICE); +#else + pci_unmap_page(bp->pdev, dma_unmap_addr(rx_pg, mapping), PAGE_SIZE, PCI_DMA_FROMDEVICE); +#endif __free_page(page); rx_pg->page = NULL; } static inline int -bnx2_alloc_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index) +bnx2_alloc_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index, gfp_t gfp) { struct sk_buff *skb; struct sw_bd *rx_buf = &rxr->rx_buf_ring[index]; @@ -3035,7 +3104,7 @@ bnx2_alloc_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index) struct rx_bd *rxbd = &rxr->rx_desc_ring[RX_RING(index)][RX_IDX(index)]; unsigned long align; - skb = netdev_alloc_skb(bp->dev, bp->rx_buf_size); + skb = __netdev_alloc_skb(bp->dev, bp->rx_buf_size, gfp); if (skb == NULL) { return -ENOMEM; } @@ -3043,11 +3112,13 @@ bnx2_alloc_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index) if (unlikely((align = (unsigned long) skb->data & (BNX2_RX_ALIGN - 1)))) skb_reserve(skb, BNX2_RX_ALIGN - align); +#if (LINUX_VERSION_CODE >= 0x02061b) + mapping = dma_map_single(&bp->pdev->dev, skb->data, bp->rx_buf_use_size, + PCI_DMA_FROMDEVICE); + if (dma_mapping_error(&bp->pdev->dev, mapping)) { +#else mapping = pci_map_single(bp->pdev, skb->data, bp->rx_buf_use_size, PCI_DMA_FROMDEVICE); -#if (LINUX_VERSION_CODE >= 0x02061b) - if (pci_dma_mapping_error(bp->pdev, mapping)) { -#else if (pci_dma_mapping_error(mapping)) { #endif dev_kfree_skb(skb); @@ -3056,7 +3127,7 @@ bnx2_alloc_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, u16 index) rx_buf->skb = skb; rx_buf->desc = (struct l2_fhdr *) skb->data; - pci_unmap_addr_set(rx_buf, mapping, mapping); + dma_unmap_addr_set(rx_buf, mapping, mapping); rxbd->rx_bd_haddr_hi = (u64) mapping >> 32; rxbd->rx_bd_haddr_lo = (u64) mapping & 0xffffffff; @@ -3165,8 +3236,13 @@ bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) } } #endif - pci_unmap_single(bp->pdev, pci_unmap_addr(tx_buf, mapping), +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(tx_buf, mapping), skb_headlen(skb), PCI_DMA_TODEVICE); +#else + pci_unmap_single(bp->pdev, dma_unmap_addr(tx_buf, mapping), + skb_headlen(skb), PCI_DMA_TODEVICE); +#endif tx_buf->skb = NULL; last = tx_buf->nr_frags; @@ -3174,11 +3250,15 @@ bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) for (i = 0; i < last; i++) { sw_cons = NEXT_TX_BD(sw_cons); +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_page(&bp->pdev->dev, +#else pci_unmap_page(bp->pdev, - pci_unmap_addr( +#endif + dma_unmap_addr( &txr->tx_buf_ring[TX_RING_IDX(sw_cons)], mapping), - skb_shinfo(skb)->frags[i].size, + skb_frag_size(&skb_shinfo(skb)->frags[i]), PCI_DMA_TODEVICE); } @@ -3278,8 +3358,8 @@ bnx2_reuse_rx_skb_pages(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, if (prod != cons) { prod_rx_pg->page = cons_rx_pg->page; cons_rx_pg->page = NULL; - pci_unmap_addr_set(prod_rx_pg, mapping, - pci_unmap_addr(cons_rx_pg, mapping)); + dma_unmap_addr_set(prod_rx_pg, mapping, + dma_unmap_addr(cons_rx_pg, mapping)); prod_bd->rx_bd_haddr_hi = cons_bd->rx_bd_haddr_hi; prod_bd->rx_bd_haddr_lo = cons_bd->rx_bd_haddr_lo; @@ -3302,9 +3382,13 @@ bnx2_reuse_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, cons_rx_buf = &rxr->rx_buf_ring[cons]; prod_rx_buf = &rxr->rx_buf_ring[prod]; +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_sync_single_for_device(&bp->pdev->dev, +#else pci_dma_sync_single_for_device(bp->pdev, - pci_unmap_addr(cons_rx_buf, mapping), - BNX2_RX_OFFSET + BNX2_RX_COPY_THRESH, PCI_DMA_FROMDEVICE); +#endif + dma_unmap_addr(cons_rx_buf, mapping), + BNX2_RX_OFFSET + BNX2_RX_COPY_THRESH, PCI_DMA_FROMDEVICE); rxr->rx_prod_bseq += bp->rx_buf_use_size; @@ -3314,8 +3398,8 @@ bnx2_reuse_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, if (cons == prod) return; - pci_unmap_addr_set(prod_rx_buf, mapping, - pci_unmap_addr(cons_rx_buf, mapping)); + dma_unmap_addr_set(prod_rx_buf, mapping, + dma_unmap_addr(cons_rx_buf, mapping)); cons_bd = &rxr->rx_desc_ring[RX_RING(cons)][RX_IDX(cons)]; prod_bd = &rxr->rx_desc_ring[RX_RING(prod)][RX_IDX(prod)]; @@ -3331,7 +3415,7 @@ bnx2_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, struct sk_buff *skb, int err; u16 prod = ring_idx & 0xffff; - err = bnx2_alloc_rx_skb(bp, rxr, prod); + err = bnx2_alloc_rx_skb(bp, rxr, prod, GFP_ATOMIC); if (unlikely(err)) { bnx2_reuse_rx_skb(bp, rxr, skb, (u16) (ring_idx >> 16), prod); if (hdr_len) { @@ -3344,8 +3428,13 @@ bnx2_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, struct sk_buff *skb, } skb_reserve(skb, BNX2_RX_OFFSET); +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_single(&bp->pdev->dev, dma_addr, bp->rx_buf_use_size, + PCI_DMA_FROMDEVICE); +#else pci_unmap_single(bp->pdev, dma_addr, bp->rx_buf_use_size, PCI_DMA_FROMDEVICE); +#endif if (hdr_len == 0) { skb_put(skb, len); @@ -3377,9 +3466,8 @@ bnx2_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, struct sk_buff *skb, } else { skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; - frag->size -= tail; + skb_frag_size_sub(frag, tail); skb->data_len -= tail; - skb->truesize -= tail; } return 0; } @@ -3388,7 +3476,7 @@ bnx2_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, struct sk_buff *skb, /* Don't unmap yet. If we're unable to allocate a new * page, we need to recycle the page and the DMA addr. */ - mapping_old = pci_unmap_addr(rx_pg, mapping); + mapping_old = dma_unmap_addr(rx_pg, mapping); if (i == pages - 1) frag_len -= 4; @@ -3397,7 +3485,8 @@ bnx2_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, struct sk_buff *skb, rx_pg->page = NULL; err = bnx2_alloc_rx_page(bp, rxr, - RX_PG_RING_IDX(pg_prod)); + RX_PG_RING_IDX(pg_prod), + GFP_ATOMIC); if (unlikely(err)) { rxr->rx_pg_cons = pg_cons; rxr->rx_pg_prod = pg_prod; @@ -3406,12 +3495,17 @@ bnx2_rx_skb(struct bnx2 *bp, struct bnx2_rx_ring_info *rxr, struct sk_buff *skb, return err; } +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_page(&bp->pdev->dev, mapping_old, + PAGE_SIZE, PCI_DMA_FROMDEVICE); +#else pci_unmap_page(bp->pdev, mapping_old, PAGE_SIZE, PCI_DMA_FROMDEVICE); +#endif frag_size -= frag_len; skb->data_len += frag_len; - skb->truesize += frag_len; + skb->truesize += PAGE_SIZE; skb->len += frag_len; pg_prod = NEXT_RX_BD(pg_prod); @@ -3475,11 +3569,16 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) next_rx_buf = &rxr->rx_buf_ring[RX_RING_IDX(NEXT_RX_BD(sw_cons))]; prefetch(next_rx_buf->desc); + rx_buf->skb = NULL; - dma_addr = pci_unmap_addr(rx_buf, mapping); + dma_addr = dma_unmap_addr(rx_buf, mapping); +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, +#else pci_dma_sync_single_for_cpu(bp->pdev, dma_addr, +#endif BNX2_RX_OFFSET + BNX2_RX_COPY_THRESH, PCI_DMA_FROMDEVICE); @@ -3597,6 +3696,12 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) L2_FHDR_ERRORS_UDP_XSUM)) == 0)) skb->ip_summed = CHECKSUM_UNNECESSARY; } +#ifdef NETIF_F_RXHASH + if ((bp->dev->features & NETIF_F_RXHASH) && + ((status & L2_FHDR_STATUS_USE_RXHASH) == + L2_FHDR_STATUS_USE_RXHASH)) + skb->rxhash = rx_hdr->l2_fhdr_hash; +#endif skb_record_rx_queue(skb, bnapi - &bp->bnx2_napi[0]); @@ -3666,7 +3771,7 @@ next_rx: * is that the MSI interrupt is always serviced. */ static irqreturn_t -#if (LINUX_VERSION_CODE >= 0x20613) || (VMWARE_ESX_DDK_VERSION >= 40000) +#if (LINUX_VERSION_CODE >= 0x20613) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) bnx2_msi(int irq, void *dev_instance) #else bnx2_msi(int irq, void *dev_instance, struct pt_regs *regs) @@ -3677,6 +3782,9 @@ bnx2_msi(int irq, void *dev_instance, struct pt_regs *regs) prefetch(bnapi->status_blk.msi); REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, +#if defined(__VMKLNX__) + bnapi->int_num | +#endif BNX2_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM | BNX2_PCICFG_INT_ACK_CMD_MASK_INT); @@ -3694,7 +3802,7 @@ bnx2_msi(int irq, void *dev_instance, struct pt_regs *regs) } static irqreturn_t -#if (LINUX_VERSION_CODE >= 0x20613) || (VMWARE_ESX_DDK_VERSION >= 40000) +#if (LINUX_VERSION_CODE >= 0x20613) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) bnx2_msi_1shot(int irq, void *dev_instance) #else bnx2_msi_1shot(int irq, void *dev_instance, struct pt_regs *regs) @@ -3720,7 +3828,7 @@ bnx2_msi_1shot(int irq, void *dev_instance, struct pt_regs *regs) #endif static irqreturn_t -#if (LINUX_VERSION_CODE >= 0x20613) || (VMWARE_ESX_DDK_VERSION >= 40000) +#if (LINUX_VERSION_CODE >= 0x20613) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) bnx2_interrupt(int irq, void *dev_instance) #else bnx2_interrupt(int irq, void *dev_instance, struct pt_regs *regs) @@ -3820,7 +3928,7 @@ bnx2_chk_missed_msi(struct bnx2 *bp) REG_WR(bp, BNX2_PCICFG_MSI_CONTROL, msi_ctrl & ~BNX2_PCICFG_MSI_CONTROL_ENABLE); REG_WR(bp, BNX2_PCICFG_MSI_CONTROL, msi_ctrl); -#if (LINUX_VERSION_CODE >= 0x20613) || (VMWARE_ESX_DDK_VERSION >= 40000) +#if (LINUX_VERSION_CODE >= 0x20613) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) bnx2_msi(bp->irq_tbl[0].vector, bnapi); #else bnx2_msi(bp->irq_tbl[0].vector, bnapi, NULL); @@ -3886,7 +3994,9 @@ static int bnx2_poll_work(struct bnx2 *bp, struct bnx2_napi *bnapi, if (bnx2_get_hw_rx_cons(bnapi) != rxr->rx_cons) work_done += bnx2_rx_int(bp, bnapi, budget - work_done); +#if defined(__VMKLNX__) wmb(); +#endif return work_done; } @@ -4146,9 +4256,9 @@ bnx2_set_rx_mode(struct net_device *dev) i = 0; netdev_for_each_uc_addr(ha, dev) { bnx2_set_mac_addr(bp, ha->addr, - i + BNX2_START_UNICAST_ADDRESS_INDEX); - sort_mode |= (1 << - (i + BNX2_START_UNICAST_ADDRESS_INDEX)); + i + BNX2_START_UNICAST_ADDRESS_INDEX); + sort_mode |= (1 << + (i + BNX2_START_UNICAST_ADDRESS_INDEX)); i++; } #endif @@ -4193,8 +4303,8 @@ gunzip_nomem2: bp->gunzip_buf = NULL; gunzip_nomem1: - printk(KERN_ERR PFX "%s: Cannot allocate firmware buffer for " - "uncompression.\n", bp->dev->name); + netdev_err(bp->dev, "Cannot allocate firmware buffer for " + "uncompression.\n"); return -ENOMEM; } @@ -4233,8 +4343,8 @@ bnx2_gunzip(struct bnx2 *bp, const u8 *zbuf, *outbuf = bp->gunzip_buf; if ((rc != Z_OK) && (rc != Z_STREAM_END)) - printk(KERN_ERR PFX "%s: Firmware decompression error: %s\n", - bp->dev->name, bp->strm->msg); + netdev_err(bp->dev, "Firmware decompression error: %s\n", + bp->strm->msg); zlib_inflateEnd(bp->strm); @@ -4273,8 +4383,7 @@ bnx2_print_fw_versions(struct bnx2 *bp) }; int i; - printk(KERN_INFO "bnx2 %s: CPU fw versions: ", - bp->dev->name); + netdev_info(bp->dev, "CPU fw versions: "); for (i = 0; i < ARRAY_SIZE(cpus_scratch); i++) { /* The FW versions are 11 bytes long + 1 extra byte for * the NULL termination */ @@ -5007,7 +5116,7 @@ bnx2_init_nvram(struct bnx2 *bp) if (j == entry_count) { bp->flash_info = NULL; - printk(KERN_ALERT PFX "Unknown flash/EEPROM type.\n"); + pr_alert("Unknown flash/EEPROM type\n"); return -ENODEV; } @@ -5352,6 +5461,7 @@ bnx2_init_fw_cap(struct bnx2 *bp) bnx2_shmem_wr(bp, BNX2_DRV_ACK_CAP_MB, sig); } +#if defined(__VMKLNX__) static void bnx2_setup_msix_tbl_cfg(struct bnx2 *bp) { @@ -5362,6 +5472,7 @@ bnx2_setup_msix_tbl_cfg(struct bnx2 *bp) BNX2_MSIX_TABLE_ADDR); bnx2_reg_wr_ind_cfg(bp, BNX2_PCI_GRC_WINDOW3_ADDR, BNX2_MSIX_PBA_ADDR); } +#endif /* defined(__VMKLNX__) */ static void bnx2_setup_msix_tbl(struct bnx2 *bp) @@ -5412,7 +5523,11 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code) bnx2_shmem_wr(bp, BNX2_DRV_RESET_SIGNATURE, BNX2_DRV_RESET_SIGNATURE_MAGIC); +#if defined(__VMKLNX__) +#if (LINUX_VERSION_CODE >= 0x020611) pci_save_state(bp->pdev); +#endif +#endif /* defined(__VMKLNX__) */ /* Do a dummy read to force the chip to complete all current transaction * before we issue a reset. */ @@ -5426,7 +5541,7 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code) val = BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA | BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP; - pci_write_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG, val); + REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val); } else { val = BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ | @@ -5455,20 +5570,24 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code) if (val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ | BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) { - printk(KERN_ERR PFX "Chip reset did not complete\n"); + pr_err("Chip reset did not complete\n"); return -EBUSY; } } +#if defined(__VMKLNX__) if (bp->flags & BNX2_FLAG_USING_MSIX) bnx2_setup_msix_tbl_cfg(bp); +#if (LINUX_VERSION_CODE >= 0x020611) pci_restore_state(bp->pdev); +#endif +#endif /* defined(__VMKLNX__) */ /* Make sure byte swapping is properly configured. */ val = REG_RD(bp, BNX2_PCI_SWAP_DIAG0); if (val != 0x01020304) { - printk(KERN_ERR PFX "Chip not in correct endian mode\n"); + pr_err("Chip not in correct endian mode\n"); return -ENODEV; } @@ -5679,6 +5798,11 @@ bnx2_init_chip(struct bnx2 *bp) REG_WR(bp, BNX2_HC_CONFIG, val); + if (bp->rx_ticks < 25) + bnx2_reg_wr_ind(bp, BNX2_FW_RX_LOW_LATENCY, 1); + else + bnx2_reg_wr_ind(bp, BNX2_FW_RX_LOW_LATENCY, 0); + for (i = 1; i < bp->irq_nvecs; i++) { u32 base = ((i - 1) * BNX2_HC_SB_CONFIG_SIZE) + BNX2_HC_SB_CONFIG_1; @@ -5900,10 +6024,9 @@ bnx2_init_rx_ring(struct bnx2 *bp, int ring_num) ring_prod = prod = rxr->rx_pg_prod; for (i = 0; i < bp->rx_pg_ring_size; i++) { - if (bnx2_alloc_rx_page(bp, rxr, ring_prod) < 0) { - printk(KERN_WARNING PFX "%s: init'ed rx page ring %d " - "with %d/%d pages only\n", - bp->dev->name, ring_num, i, bp->rx_pg_ring_size); + if (bnx2_alloc_rx_page(bp, rxr, ring_prod, GFP_KERNEL) < 0) { + netdev_warn(bp->dev, "init'ed rx page ring %d with %d/%d pages only\n", + ring_num, i, bp->rx_pg_ring_size); break; } prod = NEXT_RX_BD(prod); @@ -5913,10 +6036,9 @@ bnx2_init_rx_ring(struct bnx2 *bp, int ring_num) ring_prod = prod = rxr->rx_prod; for (i = 0; i < bp->rx_ring_size; i++) { - if (bnx2_alloc_rx_skb(bp, rxr, ring_prod) < 0) { - printk(KERN_WARNING PFX "%s: init'ed rx ring %d with " - "%d/%d skbs only\n", - bp->dev->name, ring_num, i, bp->rx_ring_size); + if (bnx2_alloc_rx_skb(bp, rxr, ring_prod, GFP_KERNEL) < 0) { + netdev_warn(bp->dev, "init'ed rx ring %d with %d/%d skbs only\n", + ring_num, i, bp->rx_ring_size); break; } prod = NEXT_RX_BD(prod); @@ -5938,7 +6060,9 @@ static void bnx2_init_all_rings(struct bnx2 *bp) { int i; +#if !defined(BNX2_ENABLE_NETQUEUE) u32 val; +#endif bnx2_clear_ring_states(bp); @@ -5956,19 +6080,22 @@ bnx2_init_all_rings(struct bnx2 *bp) for (i = 0; i < bp->num_rx_rings; i++) bnx2_init_rx_ring(bp, i); +#if !defined(BNX2_ENABLE_NETQUEUE) if (bp->num_rx_rings > 1) { - u32 tbl_32; - u8 *tbl = (u8 *) &tbl_32; - - bnx2_reg_wr_ind(bp, BNX2_RXP_SCRATCH_RSS_TBL_SZ, - BNX2_RXP_SCRATCH_RSS_TBL_MAX_ENTRIES); + u32 tbl_32 = 0; for (i = 0; i < BNX2_RXP_SCRATCH_RSS_TBL_MAX_ENTRIES; i++) { - tbl[i % 4] = i % (bp->num_rx_rings - 1); - if ((i % 4) == 3) - bnx2_reg_wr_ind(bp, - BNX2_RXP_SCRATCH_RSS_TBL + i, - cpu_to_be32(tbl_32)); + int shift = (i % 8) << 2; + + tbl_32 |= (i % (bp->num_rx_rings - 1)) << shift; + if ((i % 8) == 7) { + REG_WR(bp, BNX2_RLUP_RSS_DATA, tbl_32); + REG_WR(bp, BNX2_RLUP_RSS_COMMAND, (i >> 3) | + BNX2_RLUP_RSS_COMMAND_RSS_WRITE_MASK | + BNX2_RLUP_RSS_COMMAND_WRITE | + BNX2_RLUP_RSS_COMMAND_HASH_MASK); + tbl_32 = 0; + } } val = BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_ALL_XI | @@ -5977,6 +6104,7 @@ bnx2_init_all_rings(struct bnx2 *bp) REG_WR(bp, BNX2_RLUP_RSS_CONFIG, val); } +#endif } static u32 bnx2_find_max_ring(u32 ring_size, u32 max_size) @@ -6058,24 +6186,32 @@ bnx2_free_tx_skbs(struct bnx2 *bp) int k, last; if (skb == NULL) { - j++; + j = NEXT_TX_BD(j); continue; } +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_single(&bp->pdev->dev, +#else pci_unmap_single(bp->pdev, - pci_unmap_addr(tx_buf, mapping), +#endif + dma_unmap_addr(tx_buf, mapping), skb_headlen(skb), PCI_DMA_TODEVICE); tx_buf->skb = NULL; last = tx_buf->nr_frags; - j++; - for (k = 0; k < last; k++, j++) { + j = NEXT_TX_BD(j); + for (k = 0; k < last; k++, j = NEXT_TX_BD(j)) { tx_buf = &txr->tx_buf_ring[TX_RING_IDX(j)]; +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_page(&bp->pdev->dev, +#else pci_unmap_page(bp->pdev, - pci_unmap_addr(tx_buf, mapping), - skb_shinfo(skb)->frags[k].size, +#endif + dma_unmap_addr(tx_buf, mapping), + skb_frag_size(&skb_shinfo(skb)->frags[k]), PCI_DMA_TODEVICE); } dev_kfree_skb(skb); @@ -6103,8 +6239,12 @@ bnx2_free_rx_skbs(struct bnx2 *bp) if (skb == NULL) continue; +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_single(&bp->pdev->dev, +#else pci_unmap_single(bp->pdev, - pci_unmap_addr(rx_buf, mapping), +#endif + dma_unmap_addr(rx_buf, mapping), bp->rx_buf_use_size, PCI_DMA_FROMDEVICE); @@ -6456,11 +6596,13 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode) for (i = 14; i < pkt_size; i++) packet[i] = (unsigned char) (i & 0xff); +#if (LINUX_VERSION_CODE >= 0x02061b) + map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, + PCI_DMA_TODEVICE); + if (dma_mapping_error(&bp->pdev->dev, map)) { +#else map = pci_map_single(bp->pdev, skb->data, pkt_size, PCI_DMA_TODEVICE); -#if (LINUX_VERSION_CODE >= 0x02061b) - if (pci_dma_mapping_error(bp->pdev, map)) { -#else if (pci_dma_mapping_error(map)) { #endif dev_kfree_skb(skb); @@ -6500,7 +6642,11 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode) udelay(5); +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE); +#else pci_unmap_single(bp->pdev, map, pkt_size, PCI_DMA_TODEVICE); +#endif dev_kfree_skb(skb); if (bnx2_get_hw_tx_cons(tx_napi) != txr->tx_prod) @@ -6517,8 +6663,12 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode) rx_hdr = rx_buf->desc; skb_reserve(rx_skb, BNX2_RX_OFFSET); +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_sync_single_for_cpu(&bp->pdev->dev, +#else pci_dma_sync_single_for_cpu(bp->pdev, - pci_unmap_addr(rx_buf, mapping), +#endif + dma_unmap_addr(rx_buf, mapping), bp->rx_buf_size, PCI_DMA_FROMDEVICE); if (rx_hdr->l2_fhdr_status & @@ -6855,7 +7005,7 @@ bnx2_request_irq(struct bnx2 *bp) * will be finalized only when pci_announce_device is done. So, we assign * irq->name here instead of in bnx2_setup_int_mode. */ - strncpy(bp->irq_tbl[0].name, bp->dev->name, sizeof(bp->irq_tbl[0].name) - 1); + strcpy(bp->irq_tbl[0].name, bp->dev->name); if (bp->flags & BNX2_FLAG_USING_MSIX) { for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) { snprintf(bp->irq_tbl[i].name, sizeof(bp->irq_tbl[i].name), @@ -6907,7 +7057,7 @@ bnx2_disable_msi(struct bnx2 *bp) #else static void -bnx2_free_irq(struct bnx2 *bp) +__bnx2_free_irq(struct bnx2 *bp) { struct bnx2_irq *irq; int i; @@ -6918,6 +7068,13 @@ bnx2_free_irq(struct bnx2 *bp) free_irq(irq->vector, &bp->bnx2_napi[i]); irq->requested = 0; } +} + +static void +bnx2_free_irq(struct bnx2 *bp) +{ + + __bnx2_free_irq(bp); #ifdef CONFIG_PCI_MSI if (bp->flags & BNX2_FLAG_USING_MSI) pci_disable_msi(bp->pdev); @@ -6934,7 +7091,7 @@ static void bnx2_enable_msix(struct bnx2 *bp, int msix_vecs) { #ifdef BNX2_NEW_NAPI - int i, rc; + int i, total_vecs, rc; struct msix_entry msix_ent[BNX2_MAX_MSIX_VEC]; #if !defined(__VMKLNX__) struct net_device *dev = bp->dev; @@ -6946,7 +7103,7 @@ bnx2_enable_msix(struct bnx2 *bp, int msix_vecs) REG_WR(bp, BNX2_PCI_MSIX_TBL_OFF_BIR, BNX2_PCI_GRC_WINDOW2_BASE); REG_WR(bp, BNX2_PCI_MSIX_PBA_OFF_BIT, BNX2_PCI_GRC_WINDOW3_BASE); - /* Need to flush the previous three writes to ensure MSI-X + /* Need to flush the previous three writes to ensure MSI-X * is setup properly */ REG_RD(bp, BNX2_PCI_MSIX_CONTROL); @@ -6955,31 +7112,56 @@ bnx2_enable_msix(struct bnx2 *bp, int msix_vecs) msix_ent[i].vector = 0; } - rc = pci_enable_msix(bp->pdev, msix_ent, BNX2_MAX_MSIX_VEC); + total_vecs = msix_vecs; +#ifdef BCM_CNIC + total_vecs++; +#endif + rc = -ENOSPC; + while (total_vecs >= BNX2_MIN_MSIX_VEC) { + rc = pci_enable_msix(bp->pdev, msix_ent, total_vecs); + if (rc <= 0) + break; + if (rc > 0) + total_vecs = rc; + } + if (rc != 0) return; + msix_vecs = total_vecs; +#ifdef BCM_CNIC + msix_vecs--; +#endif bp->irq_nvecs = msix_vecs; bp->flags |= BNX2_FLAG_USING_MSIX | BNX2_FLAG_ONE_SHOT_MSI; - for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) { +#if defined(__VMKLNX__) + if (disable_msi_1shot) + bp->flags &= ~BNX2_FLAG_ONE_SHOT_MSI; +#endif + for (i = 0; i < total_vecs; i++) { bp->irq_tbl[i].vector = msix_ent[i].vector; #if !defined(__VMKLNX__) snprintf(bp->irq_tbl[i].name, len, "%s-%d", dev->name, i); -#endif bp->irq_tbl[i].handler = bnx2_msi_1shot; +#else + if (disable_msi_1shot) + bp->irq_tbl[i].handler = bnx2_msi; + else + bp->irq_tbl[i].handler = bnx2_msi_1shot; +#endif } #endif } #endif -static void +static int bnx2_setup_int_mode(struct bnx2 *bp, int dis_msi) { #ifdef CONFIG_PCI_MSI - int cpus = num_online_cpus(); #if defined(BNX2_ENABLE_NETQUEUE) + int cpus = num_online_cpus(); int msix_vecs = min(cpus, 4); - if(force_netq_param[bp->index] != BNX2_OPTION_UNSET) + if (force_netq_param[bp->index] != BNX2_OPTION_UNSET) msix_vecs = min(force_netq_param[bp->index], RX_MAX_RSS_RINGS); /* Once is for the default queuue */ @@ -6989,11 +7171,22 @@ bnx2_setup_int_mode(struct bnx2 *bp, int dis_msi) /* If NetQueue is not enable then force the number of queues to 1 */ int msix_vecs = 1; #else - int msix_vecs = min(cpus + 1, RX_MAX_RINGS); + int cpus = num_online_cpus(); + int msix_vecs; #endif /* defined(__VMKLNX__) */ #endif #endif +#if !defined(__VMKLNX__) + if (!bp->num_req_rx_rings) + msix_vecs = max(cpus + 1, bp->num_req_tx_rings); + else if (!bp->num_req_tx_rings) + msix_vecs = max(cpus, bp->num_req_rx_rings); + else + msix_vecs = max(bp->num_req_rx_rings, bp->num_req_tx_rings); + + msix_vecs = min(msix_vecs, RX_MAX_RINGS); +#endif bp->irq_tbl[0].handler = bnx2_interrupt; #if !defined(__VMKLNX__) strcpy(bp->irq_tbl[0].name, bp->dev->name); @@ -7002,7 +7195,7 @@ bnx2_setup_int_mode(struct bnx2 *bp, int dis_msi) bp->irq_tbl[0].vector = bp->pdev->irq; #ifdef CONFIG_PCI_MSI - if ((bp->flags & BNX2_FLAG_MSIX_CAP) && !dis_msi && cpus > 1) + if ((bp->flags & BNX2_FLAG_MSIX_CAP) && !dis_msi) bnx2_enable_msix(bp, msix_vecs); if ((bp->flags & BNX2_FLAG_MSI_CAP) && !dis_msi && @@ -7012,6 +7205,12 @@ bnx2_setup_int_mode(struct bnx2 *bp, int dis_msi) if (CHIP_NUM(bp) == CHIP_NUM_5709) { bp->flags |= BNX2_FLAG_ONE_SHOT_MSI; bp->irq_tbl[0].handler = bnx2_msi_1shot; +#if defined(__VMKLNX__) + if (disable_msi_1shot) { + bp->flags &= ~BNX2_FLAG_ONE_SHOT_MSI; + bp->irq_tbl[0].handler = bnx2_msi; + } +#endif } else bp->irq_tbl[0].handler = bnx2_msi; @@ -7022,6 +7221,7 @@ bnx2_setup_int_mode(struct bnx2 *bp, int dis_msi) #ifndef BCM_HAVE_MULTI_QUEUE bp->num_tx_rings = 1; + bp->num_rx_rings = bp->irq_nvecs; #else #if defined(__VMKLNX__) #if defined(BNX2_ENABLE_NETQUEUE) @@ -7029,13 +7229,22 @@ bnx2_setup_int_mode(struct bnx2 *bp, int dis_msi) bp->dev->real_num_tx_queues = bp->num_tx_rings; #else bp->num_tx_rings = 1; -#endif -#else - bp->num_tx_rings = rounddown_pow_of_two(bp->irq_nvecs); -#endif - bp->dev->real_num_tx_queues = bp->num_tx_rings; #endif bp->num_rx_rings = bp->irq_nvecs; +#else + if (!bp->num_req_tx_rings) + bp->num_tx_rings = rounddown_pow_of_two(bp->irq_nvecs); + else + bp->num_tx_rings = min(bp->irq_nvecs, bp->num_req_tx_rings); + + if (!bp->num_req_rx_rings) + bp->num_rx_rings = bp->irq_nvecs; + else + bp->num_rx_rings = min(bp->irq_nvecs, bp->num_req_rx_rings); +#endif + netif_set_real_num_tx_queues(bp->dev, bp->num_tx_rings); +#endif + return netif_set_real_num_rx_queues(bp->dev, bp->num_rx_rings); } /* Called with rtnl_lock */ @@ -7051,12 +7260,11 @@ bnx2_open(struct net_device *dev) bnx2_disable_int(bp); #if !(defined __VMKLNX__) - bnx2_setup_int_mode(bp, disable_msi); + rc = bnx2_setup_int_mode(bp, disable_msi); + if (rc) + goto open_err; bnx2_init_napi(bp); #endif /* !(defined __VMKLNX__) */ -#ifdef BNX2_NEW_NAPI - bnx2_napi_enable(bp); -#endif rc = bnx2_alloc_mem(bp); if (rc) goto open_err; @@ -7069,6 +7277,9 @@ bnx2_open(struct net_device *dev) if (rc) goto open_err; +#ifdef BNX2_NEW_NAPI + bnx2_napi_enable(bp); +#endif mod_timer(&bp->timer, jiffies + bp->current_interval); atomic_set(&bp->intr_sem, 0); @@ -7083,17 +7294,17 @@ bnx2_open(struct net_device *dev) * If MSI test fails, go back to INTx mode */ if (bnx2_test_intr(bp) != 0) { - printk(KERN_WARNING PFX "%s: No interrupt was generated" - " using MSI, switching to INTx mode. Please" - " report this failure to the PCI maintainer" - " and include system chipset information.\n", - bp->dev->name); + netdev_warn(bp->dev, "No interrupt was generated using MSI, switching to INTx mode. Please report this failure to the PCI maintainer and include system chipset information.\n"); +#ifdef BNX2_NEW_NAPI + bnx2_napi_disable(bp); +#endif bnx2_disable_int(bp); bnx2_free_irq(bp); #if defined(__VMKLNX__) bnx2_disable_msi(bp); #endif + bnx2_setup_int_mode(bp, 1); rc = bnx2_init_nic(bp, 0); @@ -7105,30 +7316,31 @@ bnx2_open(struct net_device *dev) del_timer_sync(&bp->timer); goto open_err; } +#ifdef BNX2_NEW_NAPI + bnx2_napi_enable(bp); +#endif bnx2_enable_int(bp); } } if (bp->flags & BNX2_FLAG_USING_MSI) - printk(KERN_INFO PFX "%s: using MSI\n", dev->name); + netdev_info(dev, "using MSI\n"); else if (bp->flags & BNX2_FLAG_USING_MSIX) - printk(KERN_INFO PFX "%s: using MSIX\n", dev->name); + netdev_info(dev, "using MSIX\n"); #endif #if defined(BNX2_ENABLE_NETQUEUE) if (bnx2_netqueue_is_avail(bp)) bnx2_open_netqueue_hw(bp); #endif + netif_tx_start_all_queues(dev); + #if defined(__VMKLNX__) bnx2_cnic_start(bp); #endif - netif_tx_start_all_queues(dev); return 0; open_err: -#ifdef BNX2_NEW_NAPI - bnx2_napi_disable(bp); -#endif bnx2_free_skbs(bp); bnx2_free_irq(bp); bnx2_free_mem(bp); @@ -7139,21 +7351,19 @@ open_err: } static void -#if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (VMWARE_ESX_DDK_VERSION >= 40000) +#if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) bnx2_reset_task(struct work_struct *work) #else bnx2_reset_task(void *data) #endif { -#if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (VMWARE_ESX_DDK_VERSION >= 40000) +#if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) struct bnx2 *bp = container_of(work, struct bnx2, reset_task); #else struct bnx2 *bp = data; #endif - -#if defined(__VMKLNX__) int rc; -#endif + u16 pcicmd; rtnl_lock(); if (!netif_running(bp->dev)) { @@ -7163,183 +7373,145 @@ bnx2_reset_task(void *data) bnx2_netif_stop(bp, true); -#if defined(__VMKLNX__) + pci_read_config_word(bp->pdev, PCI_COMMAND, &pcicmd); + if (!(pcicmd & PCI_COMMAND_MEMORY)) { + /* in case PCI block has reset */ + pci_restore_state(bp->pdev); + pci_save_state(bp->pdev); + } rc = bnx2_init_nic(bp, 1); if (rc) { - /* PR 673836 - * close dev if init_nic failed. - * Interrupts are disabled in bnx2_netif_stop above, so even if - * NAPI is enabled below, the NAPI thread should not be running - * or scheduled. - * - * If there is a stray interrupt, in the interrupt routine there - * is a check for the intr_sem value and immediately return if - * interrupt is disabled. This should prevent the the NAPI thread - * from running because it will never be scheduled. - * - * If we don't do that and go ahead with bnx2_netif_start, when - * NAPI thread is enabled and running, accessing buffer rings - * using cons/prod indices will lead to PSOD since bnx2_free_skbs - * has already been called through bnx2_init_nic. - */ + netdev_err(bp->dev, "failed to reset NIC, closing\n"); bnx2_napi_enable(bp); dev_close(bp->dev); -#if (VMWARE_ESX_DDK_VERSION == 41000) || (VMWARE_ESX_DDK_VERSION == 50000) +#if defined(__VMKLNX__) +#if (VMWARE_ESX_DDK_VERSION >= 41000) /* PR 533926 * This is a workaround to sync device status in dev->flags and * dev->gflags. It is needed to avoid PSOD (due to double dev_close) - * on reboot. For post MN releases, we plan to move it to vmklinux. + * on reboot. */ bp->dev->gflags &= ~IFF_DEV_IS_OPEN; #endif - printk(KERN_ERR PFX "bnx2: resetting... " - "nic initialization failed " - "%s\n", bp->dev->name); - } else { - atomic_set(&bp->intr_sem, 1); - bnx2_netif_start(bp, true); +#endif + rtnl_unlock(); + return; } -#else /* !defined(__VMKLNX__) */ - bnx2_init_nic(bp, 1); - - atomic_set(&bp->intr_sem, 1); - bnx2_netif_start(bp, true); -#endif /* defined(__VMKLNX__) */ + + atomic_set(&bp->intr_sem, 1); + bnx2_netif_start(bp, true); rtnl_unlock(); } -static void bnx2_dump_ftq(struct bnx2 *bp) -{ - u32 i; - u32 bdidx; - u32 cid; - u32 valid; +#define BNX2_FTQ_ENTRY(ftq) { __stringify(ftq##FTQ_CTL), BNX2_##ftq##FTQ_CTL } +static const struct ftq_reg { + char *name; + u32 off; +} ftq_arr[] = { + BNX2_FTQ_ENTRY(RV2P_P), + BNX2_FTQ_ENTRY(RV2P_T), + BNX2_FTQ_ENTRY(RV2P_M), + BNX2_FTQ_ENTRY(TBDR_), + BNX2_FTQ_ENTRY(TSCH_), + BNX2_FTQ_ENTRY(TDMA_), + BNX2_FTQ_ENTRY(TXP_), + BNX2_FTQ_ENTRY(TPAT_), + BNX2_FTQ_ENTRY(TAS_), + BNX2_FTQ_ENTRY(RXP_C), + BNX2_FTQ_ENTRY(RXP_), + BNX2_FTQ_ENTRY(RLUP_), + BNX2_FTQ_ENTRY(COM_COMXQ_), + BNX2_FTQ_ENTRY(COM_COMTQ_), + BNX2_FTQ_ENTRY(COM_COMQ_), + BNX2_FTQ_ENTRY(CP_CPQ_), + BNX2_FTQ_ENTRY(RDMA_), + BNX2_FTQ_ENTRY(CSCH_CH_), + BNX2_FTQ_ENTRY(MCP_MCPQ_), +}; - printk(KERN_ERR PFX "<--- start FTQ dump on %s --->\n", bp->dev->name); - printk(KERN_ERR PFX "%s: BNX2_RV2P_PFTQ_CTL %x\n", bp->dev->name, - REG_RD(bp, BNX2_RV2P_PFTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_RV2P_TFTQ_CTL %x\n", bp->dev->name, - REG_RD(bp, BNX2_RV2P_TFTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_RV2P_MFTQ_CTL %x\n", bp->dev->name, - REG_RD(bp, BNX2_RV2P_MFTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_TBDR_FTQ_CTL %x\n", bp->dev->name, - REG_RD(bp, BNX2_TBDR_FTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_TDMA_FTQ_CTL %x\n", bp->dev->name, - REG_RD(bp, BNX2_TDMA_FTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_TXP_FTQ_CTL %x\n", bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_TXP_FTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_TPAT_FTQ_CTL %x\n", bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_TPAT_FTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_RXP_CFTQ_CTL %x\n", bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_RXP_CFTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_RXP_FTQ_CTL %x\n", bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_RXP_FTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_COM_COMXQ_FTQ_CTL %x\n", bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_COM_COMXQ_FTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_COM_COMTQ_FTQ_CTL %x\n", bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_COM_COMTQ_FTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_COM_COMQ_FTQ_CTL %x\n", bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_COM_COMQ_FTQ_CTL)); - printk(KERN_ERR PFX "%s: BNX2_CP_CPQ_FTQ_CTL %x\n", bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_CP_CPQ_FTQ_CTL)); - printk(KERN_ERR PFX - "%s: TXP mode %x state %x evt_mask %x pc %x pc %x instr %x\n", - bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_TXP_CPU_MODE), - bnx2_reg_rd_ind(bp, BNX2_TXP_CPU_STATE), - bnx2_reg_rd_ind(bp, BNX2_TXP_CPU_EVENT_MASK), - bnx2_reg_rd_ind(bp, BNX2_TXP_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_TXP_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_TXP_CPU_INSTRUCTION)); - printk(KERN_ERR PFX - "%s: TPAT mode %x state %x evt_mask %x pc %x pc %x instr %x\n", - bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_TPAT_CPU_MODE), - bnx2_reg_rd_ind(bp, BNX2_TPAT_CPU_STATE), - bnx2_reg_rd_ind(bp, BNX2_TPAT_CPU_EVENT_MASK), - bnx2_reg_rd_ind(bp, BNX2_TPAT_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_TPAT_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_TPAT_CPU_INSTRUCTION)); - printk(KERN_ERR PFX - "%s: RXP mode %x state %x evt_mask %x pc %x pc %x instr %x\n", - bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_RXP_CPU_MODE), - bnx2_reg_rd_ind(bp, BNX2_RXP_CPU_STATE), - bnx2_reg_rd_ind(bp, BNX2_RXP_CPU_EVENT_MASK), - bnx2_reg_rd_ind(bp, BNX2_RXP_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_RXP_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_RXP_CPU_INSTRUCTION)); - printk(KERN_ERR PFX - "%s: COM mode %x state %x evt_mask %x pc %x pc %x instr %x\n", - bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_COM_CPU_MODE), - bnx2_reg_rd_ind(bp, BNX2_COM_CPU_STATE), - bnx2_reg_rd_ind(bp, BNX2_COM_CPU_EVENT_MASK), - bnx2_reg_rd_ind(bp, BNX2_COM_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_COM_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_COM_CPU_INSTRUCTION)); - printk(KERN_ERR PFX - "%s: CP mode %x state %x evt_mask %x pc %x pc %x instr %x\n", - bp->dev->name, - bnx2_reg_rd_ind(bp, BNX2_CP_CPU_MODE), - bnx2_reg_rd_ind(bp, BNX2_CP_CPU_STATE), - bnx2_reg_rd_ind(bp, BNX2_CP_CPU_EVENT_MASK), - bnx2_reg_rd_ind(bp, BNX2_CP_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_CP_CPU_PROGRAM_COUNTER), - bnx2_reg_rd_ind(bp, BNX2_CP_CPU_INSTRUCTION)); - printk(KERN_ERR PFX "<--- end FTQ dump on %s --->\n", bp->dev->name); - printk(KERN_ERR PFX - "<--- start TBDC dump on %s --->\n", bp->dev->name); - printk(KERN_ERR PFX - "%s: TBDC free cnt: %d.\n", - bp->dev->name, - (int)(REG_RD(bp, BNX2_TBDC_STATUS) & BNX2_TBDC_STATUS_FREE_CNT)); - printk(KERN_ERR PFX - "%s: %-4.4s %-5.5s %-4.4s %-4.4s %-6.6s\n", - bp->dev->name, - "LINE", "CID", "BIDX", "CMD", "VALIDS"); +static void +bnx2_dump_ftq(struct bnx2 *bp) +{ + int i; + u32 reg, bdidx, cid, valid; + struct net_device *dev = bp->dev; + + netdev_err(dev, "<--- start FTQ dump --->\n"); + for (i = 0; i < ARRAY_SIZE(ftq_arr); i++) + netdev_err(dev, "%s %08x\n", ftq_arr[i].name, + bnx2_reg_rd_ind(bp, ftq_arr[i].off)); + + netdev_err(dev, "CPU states:\n"); + for (reg = BNX2_TXP_CPU_MODE; reg <= BNX2_CP_CPU_MODE; reg += 0x40000) + netdev_err(dev, "%06x mode %x state %x evt_mask %x pc %x pc %x instr %x\n", + reg, bnx2_reg_rd_ind(bp, reg), + bnx2_reg_rd_ind(bp, reg + 4), + bnx2_reg_rd_ind(bp, reg + 8), + bnx2_reg_rd_ind(bp, reg + 0x1c), + bnx2_reg_rd_ind(bp, reg + 0x1c), + bnx2_reg_rd_ind(bp, reg + 0x20)); + + netdev_err(dev, "<--- end FTQ dump --->\n"); + netdev_err(dev, "<--- start TBDC dump --->\n"); + netdev_err(dev, "TBDC free cnt: %ld\n", + REG_RD(bp, BNX2_TBDC_STATUS) & BNX2_TBDC_STATUS_FREE_CNT); + netdev_err(dev, "LINE CID BIDX CMD VALIDS\n"); for (i = 0; i < 0x20; i++) { + int j = 0; + REG_WR(bp, BNX2_TBDC_BD_ADDR, i); - REG_WR(bp, - BNX2_TBDC_CAM_OPCODE, + REG_WR(bp, BNX2_TBDC_CAM_OPCODE, BNX2_TBDC_CAM_OPCODE_OPCODE_CAM_READ); REG_WR(bp, BNX2_TBDC_COMMAND, BNX2_TBDC_COMMAND_CMD_REG_ARB); - while (REG_RD(bp, BNX2_TBDC_COMMAND) & - BNX2_TBDC_COMMAND_CMD_REG_ARB) - ; - cid = REG_RD(bp, BNX2_TBDC_CID); + while ((REG_RD(bp, BNX2_TBDC_COMMAND) & + BNX2_TBDC_COMMAND_CMD_REG_ARB) && j < 100) + j++; + + cid = REG_RD(bp, BNX2_TBDC_CID); bdidx = REG_RD(bp, BNX2_TBDC_BIDX); valid = REG_RD(bp, BNX2_TBDC_CAM_OPCODE); - printk(KERN_ERR PFX - "%s: %02x %05x %04x %02x [%x]\n", - bp->dev->name, - i, cid, - (unsigned int)(bdidx & BNX2_TBDC_BDIDX_BDIDX), - (bdidx >> 24), (valid >> 8) & 0x0ff); + netdev_err(dev, "%02x %06x %04lx %02x [%x]\n", + i, cid, bdidx & BNX2_TBDC_BDIDX_BDIDX, + bdidx >> 24, (valid >> 8) & 0x0ff); } - printk(KERN_ERR PFX - "<--- end TBDC dump on %s --->\n", bp->dev->name); + netdev_err(dev, "<--- end TBDC dump --->\n"); } static void bnx2_dump_state(struct bnx2 *bp) { struct net_device *dev = bp->dev; + u32 val1, val2; - printk(KERN_ERR PFX "%s DEBUG: intr_sem[%x]\n", dev->name, - atomic_read(&bp->intr_sem)); - printk(KERN_ERR PFX "%s DEBUG: EMAC_TX_STATUS[%08x] " - "EMAC_RX_STATUS[%08x]\n", dev->name, - REG_RD(bp, BNX2_EMAC_TX_STATUS), - REG_RD(bp, BNX2_EMAC_RX_STATUS)); - printk(KERN_ERR PFX "%s RPM_MGMT_PKT_CTRL[%08x]\n", dev->name, - REG_RD(bp, BNX2_RPM_MGMT_PKT_CTRL)); - printk(KERN_ERR PFX "%s DEBUG: HC_STATS_INTERRUPT_STATUS[%08x]\n", - dev->name, REG_RD(bp, BNX2_HC_STATS_INTERRUPT_STATUS)); - if (bp->flags & BNX2_FLAG_USING_MSIX) - printk(KERN_ERR PFX "%s DEBUG: PBA[%08x]\n", dev->name, - REG_RD(bp, BNX2_PCI_GRC_WINDOW3_BASE)); + pci_read_config_dword(bp->pdev, PCI_COMMAND, &val1); + netdev_err(dev, "DEBUG: intr_sem[%x] PCI_CMD[%08x]\n", + atomic_read(&bp->intr_sem), val1); + pci_read_config_dword(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &val1); + pci_read_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG, &val2); + netdev_err(dev, "DEBUG: PCI_PM[%08x] PCI_MISC_CFG[%08x]\n", val1, val2); + netdev_err(dev, "DEBUG: EMAC_TX_STATUS[%08x] EMAC_RX_STATUS[%08x]\n", + REG_RD(bp, BNX2_EMAC_TX_STATUS), + REG_RD(bp, BNX2_EMAC_RX_STATUS)); + netdev_err(dev, "DEBUG: RPM_MGMT_PKT_CTRL[%08x]\n", + REG_RD(bp, BNX2_RPM_MGMT_PKT_CTRL)); + netdev_err(dev, "DEBUG: HC_STATS_INTERRUPT_STATUS[%08x]\n", + REG_RD(bp, BNX2_HC_STATS_INTERRUPT_STATUS)); + if (bp->flags & BNX2_FLAG_USING_MSIX) { + int i; + + netdev_err(dev, "DEBUG: PBA[%08x]\n", + REG_RD(bp, BNX2_PCI_GRC_WINDOW3_BASE)); + netdev_err(dev, "DEBUG: MSIX table:\n"); + val1 = BNX2_PCI_GRC_WINDOW2_BASE; + for (i = 0; i < bp->irq_nvecs; i++) { + netdev_err(dev, "DEBUG: [%d]: %08x %08x %08x %08x\n", + i, REG_RD(bp, val1), + REG_RD(bp, val1 + 4), REG_RD(bp, val1 + 8), + REG_RD(bp, val1 + 12)); + val1 += 16; + } + } } static void @@ -7349,7 +7521,7 @@ bnx2_tx_timeout(struct net_device *dev) bnx2_dump_ftq(bp); bnx2_dump_state(bp); - bnx2_dump_mcp_states(bp); + bnx2_dump_mcp_state(bp); #if defined(__VMKLNX__) if (psod_on_tx_timeout) { @@ -7359,9 +7531,7 @@ bnx2_tx_timeout(struct net_device *dev) } #endif if (stop_on_tx_timeout) { - printk(KERN_WARNING PFX - "%s: prevent chip reset during tx timeout\n", - bp->dev->name); + netdev_err(dev, "prevent chip reset during tx timeout\n"); return; } @@ -7380,19 +7550,25 @@ bnx2_vlan_rx_register(struct net_device *dev, struct vlan_group *vlgrp) { struct bnx2 *bp = netdev_priv(dev); +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) + /* rtnl_lock() needed for ESX 4.0 and 4.1 only */ + rtnl_lock(); +#endif if (netif_running(dev)) bnx2_netif_stop(bp, false); bp->vlgrp = vlgrp; - if (!netif_running(dev)) - return; - - bnx2_set_rx_mode(dev); - if (bp->flags & BNX2_FLAG_CAN_KEEP_VLAN) - bnx2_fw_sync(bp, BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE, 0, 1); - - bnx2_netif_start(bp, false); + if (netif_running(dev)) { + bnx2_set_rx_mode(dev); + if (bp->flags & BNX2_FLAG_CAN_KEEP_VLAN) + bnx2_fw_sync(bp, BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE, 0, + 1); + bnx2_netif_start(bp, false); + } +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) + rtnl_unlock(); +#endif } #if (LINUX_VERSION_CODE < 0x20616) @@ -7402,19 +7578,30 @@ bnx2_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid) { struct bnx2 *bp = netdev_priv(dev); +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) + /* rtnl_lock() needed for ESX 4.0 and 4.1 only */ + rtnl_lock(); +#endif if (netif_running(dev)) bnx2_netif_stop(bp, false); vlan_group_set_device(bp->vlgrp, vid, NULL); - if (!netif_running(dev)) + if (!netif_running(dev)) { +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) + rtnl_unlock(); +#endif return; + } bnx2_set_rx_mode(dev); if (bp->flags & BNX2_FLAG_CAN_KEEP_VLAN) bnx2_fw_sync(bp, BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE, 0, 1); bnx2_netif_start(bp, false); +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) + rtnl_unlock(); +#endif } #endif #endif @@ -7436,6 +7623,14 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev) #ifndef BCM_HAVE_MULTI_QUEUE struct bnx2_napi *bnapi = &bp->bnx2_napi[0]; struct bnx2_tx_ring_info *txr = &bnapi->tx_ring; + +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) + /* Drop the packet if the queue has been stopped */ + if (unlikely(netif_queue_stopped(dev))) { + dev_kfree_skb(skb); + return NETDEV_TX_OK; + } +#endif #else struct bnx2_napi *bnapi; struct bnx2_tx_ring_info *txr; @@ -7446,6 +7641,14 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev) bnapi = &bp->bnx2_napi[i]; txr = &bnapi->tx_ring; txq = netdev_get_tx_queue(dev, i); + +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) + /* Drop the packet if the queue has been stopped */ + if (unlikely(netif_tx_queue_stopped(txq))) { + dev_kfree_skb(skb); + return NETDEV_TX_OK; + } +#endif #endif if (unlikely(bnx2_tx_avail(bp, txr) < @@ -7455,8 +7658,7 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev) #else netif_tx_stop_queue(txq); #endif - printk(KERN_ERR PFX "%s: BUG! Tx ring full when queue awake!\n", - dev->name); + netdev_err(dev, "BUG! Tx ring full when queue awake!\n"); return NETDEV_TX_BUSY; } @@ -7522,10 +7724,11 @@ abort_tso: mss = 0; } - mapping = pci_map_single(bp->pdev, skb->data, len, PCI_DMA_TODEVICE); #if (LINUX_VERSION_CODE >= 0x02061b) - if (pci_dma_mapping_error(bp->pdev, mapping)) { + mapping = dma_map_single(&bp->pdev->dev, skb->data, len, PCI_DMA_TODEVICE); + if (dma_mapping_error(&bp->pdev->dev, mapping)) { #else + mapping = pci_map_single(bp->pdev, skb->data, len, PCI_DMA_TODEVICE); if (pci_dma_mapping_error(mapping)) { #endif dev_kfree_skb(skb); @@ -7534,7 +7737,7 @@ abort_tso: tx_buf = &txr->tx_buf_ring[ring_prod]; tx_buf->skb = skb; - pci_unmap_addr_set(tx_buf, mapping, mapping); + dma_unmap_addr_set(tx_buf, mapping, mapping); txbd = &txr->tx_desc_ring[ring_prod]; @@ -7548,22 +7751,24 @@ abort_tso: tx_buf->is_gso = skb_is_gso(skb); for (i = 0; i < last_frag; i++) { - skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; + const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; prod = NEXT_TX_BD(prod); ring_prod = TX_RING_IDX(prod); txbd = &txr->tx_desc_ring[ring_prod]; - len = frag->size; + len = skb_frag_size(frag); +#if (LINUX_VERSION_CODE >= 0x02061b) + mapping = dma_map_page(&bp->pdev->dev, frag->page, frag->page_offset, + len, PCI_DMA_TODEVICE); + if (dma_mapping_error(&bp->pdev->dev, mapping)) +#else mapping = pci_map_page(bp->pdev, frag->page, frag->page_offset, len, PCI_DMA_TODEVICE); -#if (LINUX_VERSION_CODE >= 0x02061b) - if (pci_dma_mapping_error(bp->pdev, mapping)) -#else if (pci_dma_mapping_error(mapping)) #endif goto dma_error; - pci_unmap_addr_set(&txr->tx_buf_ring[ring_prod], mapping, + dma_unmap_addr_set(&txr->tx_buf_ring[ring_prod], mapping, mapping); txbd->tx_bd_haddr_hi = (u64) mapping >> 32; @@ -7601,6 +7806,12 @@ abort_tso: #else netif_tx_stop_queue(txq); #endif + /* netif_tx_stop_queue() must be done before checking + * tx index in bnx2_tx_avail() below, because in + * bnx2_tx_int(), we update tx index before checking for + * netif_tx_queue_stopped(). + */ + smp_mb(); if (bnx2_tx_avail(bp, txr) > bp->tx_wake_thresh) #ifndef BCM_HAVE_MULTI_QUEUE netif_wake_queue(dev); @@ -7619,16 +7830,25 @@ dma_error: ring_prod = TX_RING_IDX(prod); tx_buf = &txr->tx_buf_ring[ring_prod]; tx_buf->skb = NULL; - pci_unmap_single(bp->pdev, pci_unmap_addr(tx_buf, mapping), +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(tx_buf, mapping), skb_headlen(skb), PCI_DMA_TODEVICE); +#else + pci_unmap_single(bp->pdev, dma_unmap_addr(tx_buf, mapping), + skb_headlen(skb), PCI_DMA_TODEVICE); +#endif /* unmap remaining mapped pages */ for (i = 0; i < last_frag; i++) { prod = NEXT_TX_BD(prod); ring_prod = TX_RING_IDX(prod); tx_buf = &txr->tx_buf_ring[ring_prod]; - pci_unmap_page(bp->pdev, pci_unmap_addr(tx_buf, mapping), - skb_shinfo(skb)->frags[i].size, +#if (LINUX_VERSION_CODE >= 0x02061b) + dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(tx_buf, mapping), +#else + pci_unmap_page(bp->pdev, dma_unmap_addr(tx_buf, mapping), +#endif + skb_frag_size(&skb_shinfo(skb)->frags[i]), PCI_DMA_TODEVICE); } @@ -7636,44 +7856,6 @@ dma_error: return NETDEV_TX_OK; } -#if defined(BNX2_ENABLE_NETQUEUE) -/* Called with rtnl_lock */ -static int -bnx2_close(struct net_device *dev) -{ - struct bnx2 *bp = netdev_priv(dev); - -#if (LINUX_VERSION_CODE >= 0x20616) - cancel_work_sync(&bp->reset_task); -#endif - - netif_tx_disable(bp->dev); - bp->dev->trans_start = jiffies; /* prevent tx timeout */ - - if (bnx2_netqueue_is_avail(bp) && - (bp->netq_state == BNX2_NETQ_HW_STARTED)) - bnx2_netqueue_flush_all(bp); - bnx2_netif_stop(bp, true); - - if (bnx2_netqueue_is_avail(bp)) - bnx2_close_netqueue_hw(bp); - - del_timer_sync(&bp->timer); - if (bp->reset_failed == 0) - bnx2_shutdown_chip(bp); - bnx2_free_irq(bp); - bnx2_free_skbs(bp); - bnx2_free_mem(bp); -#if !defined(__VMKLNX__) - bnx2_del_napi(bp); -#endif - bp->link_up = 0; - netif_carrier_off(bp->dev); - bnx2_set_power_state(bp, PCI_D3hot); - - return 0; -} -#else /* Called with rtnl_lock */ static int bnx2_close(struct net_device *dev) @@ -7682,17 +7864,33 @@ bnx2_close(struct net_device *dev) #if defined(__VMKLNX__) bnx2_cnic_stop(bp); -#endif -#if (LINUX_VERSION_CODE >= 0x20616) - cancel_work_sync(&bp->reset_task); -#endif - +#endif /* defined(__VMKLNX__) */ bnx2_disable_int_sync(bp); #ifdef BNX2_NEW_NAPI bnx2_napi_disable(bp); #endif + netif_tx_disable(bp->dev); +#if defined(BNX2_ENABLE_NETQUEUE) + if (bnx2_netqueue_is_avail(bp) && + (bp->netq_state == BNX2_NETQ_HW_STARTED)) + bnx2_netqueue_flush_all(bp); + + if (bnx2_netqueue_open_started(bp)) + bnx2_netqueue_tx_flush(bp); + + if (bnx2_netqueue_is_avail(bp)) + bnx2_close_netqueue_hw(bp); + +#endif /* BNX2_ENABLE_NETQUEUE */ + del_timer_sync(&bp->timer); +#if defined(BNX2_ENABLE_NETQUEUE) + if (bp->reset_failed == 0) + bnx2_shutdown_chip(bp); +#else /* BNX2_ENABLE_NETQUEUE */ bnx2_shutdown_chip(bp); +#endif /* BNX2_ENABLE_NETQUEUE */ + bnx2_free_irq(bp); bnx2_free_skbs(bp); bnx2_free_mem(bp); @@ -7704,7 +7902,6 @@ bnx2_close(struct net_device *dev) bnx2_set_power_state(bp, PCI_D3hot); return 0; } -#endif /* defined(BNX2_ENABLE_NETQUEUE) */ static void bnx2_save_stats(struct bnx2 *bp) @@ -7757,9 +7954,9 @@ bnx2_get_stats(struct net_device *dev) struct bnx2 *bp = netdev_priv(dev); struct net_device_stats *net_stats = &bp->net_stats; - if (bp->stats_blk == NULL) { + if (bp->stats_blk == NULL) return net_stats; - } + net_stats->rx_packets = GET_64BIT_NET_STATS(stat_IfHCInUcastPkts) + GET_64BIT_NET_STATS(stat_IfHCInMulticastPkts) + @@ -7865,17 +8062,16 @@ bnx2_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) if (bp->autoneg & AUTONEG_SPEED) { cmd->autoneg = AUTONEG_ENABLE; - } - else { + } else { cmd->autoneg = AUTONEG_DISABLE; } if (netif_carrier_ok(dev)) { - cmd->speed = bp->line_speed; + ethtool_cmd_speed_set(cmd, bp->line_speed); cmd->duplex = bp->duplex; } else { - cmd->speed = -1; + ethtool_cmd_speed_set(cmd, -1); cmd->duplex = -1; } spin_unlock_bh(&bp->phy_lock); @@ -7969,10 +8165,17 @@ bnx2_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) { struct bnx2 *bp = netdev_priv(dev); +#if !defined(__VMKLNX__) strcpy(info->driver, DRV_MODULE_NAME); strcpy(info->version, DRV_MODULE_VERSION); strcpy(info->bus_info, pci_name(bp->pdev)); strcpy(info->fw_version, bp->fw_version); +#else /* defined (__VMKLNX__) */ + strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); + strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); + strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); + strlcpy(info->fw_version, bp->fw_version, sizeof(info->fw_version)); +#endif /* !defined(__VMKLNX__) */ #if defined(VMWARE_ESX_DDK_VERSION) && \ (VMWARE_ESX_DDK_VERSION >= 35000) && (VMWARE_ESX_DDK_VERSION < 40000) @@ -7994,28 +8197,30 @@ bnx2_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *_p) u32 *p = _p, i, offset; u8 *orig_p = _p; struct bnx2 *bp = netdev_priv(dev); - u32 reg_boundaries[] = { 0x0000, 0x0098, 0x0400, 0x045c, - 0x0800, 0x0880, 0x0c00, 0x0c10, - 0x0c30, 0x0d08, 0x1000, 0x101c, - 0x1040, 0x1048, 0x1080, 0x10a4, - 0x1400, 0x1490, 0x1498, 0x14f0, - 0x1500, 0x155c, 0x1580, 0x15dc, - 0x1600, 0x1658, 0x1680, 0x16d8, - 0x1800, 0x1820, 0x1840, 0x1854, - 0x1880, 0x1894, 0x1900, 0x1984, - 0x1c00, 0x1c0c, 0x1c40, 0x1c54, - 0x1c80, 0x1c94, 0x1d00, 0x1d84, - 0x2000, 0x2030, 0x23c0, 0x2400, - 0x2800, 0x2820, 0x2830, 0x2850, - 0x2b40, 0x2c10, 0x2fc0, 0x3058, - 0x3c00, 0x3c94, 0x4000, 0x4010, - 0x4080, 0x4090, 0x43c0, 0x4458, - 0x4c00, 0x4c18, 0x4c40, 0x4c54, - 0x4fc0, 0x5010, 0x53c0, 0x5444, - 0x5c00, 0x5c18, 0x5c80, 0x5c90, - 0x5fc0, 0x6000, 0x6400, 0x6428, - 0x6800, 0x6848, 0x684c, 0x6860, - 0x6888, 0x6910, 0x8000 }; + static const u32 reg_boundaries[] = { + 0x0000, 0x0098, 0x0400, 0x045c, + 0x0800, 0x0880, 0x0c00, 0x0c10, + 0x0c30, 0x0d08, 0x1000, 0x101c, + 0x1040, 0x1048, 0x1080, 0x10a4, + 0x1400, 0x1490, 0x1498, 0x14f0, + 0x1500, 0x155c, 0x1580, 0x15dc, + 0x1600, 0x1658, 0x1680, 0x16d8, + 0x1800, 0x1820, 0x1840, 0x1854, + 0x1880, 0x1894, 0x1900, 0x1984, + 0x1c00, 0x1c0c, 0x1c40, 0x1c54, + 0x1c80, 0x1c94, 0x1d00, 0x1d84, + 0x2000, 0x2030, 0x23c0, 0x2400, + 0x2800, 0x2820, 0x2830, 0x2850, + 0x2b40, 0x2c10, 0x2fc0, 0x3058, + 0x3c00, 0x3c94, 0x4000, 0x4010, + 0x4080, 0x4090, 0x43c0, 0x4458, + 0x4c00, 0x4c18, 0x4c40, 0x4c54, + 0x4fc0, 0x5010, 0x53c0, 0x5444, + 0x5c00, 0x5c18, 0x5c80, 0x5c90, + 0x5fc0, 0x6000, 0x6400, 0x6428, + 0x6800, 0x6848, 0x684c, 0x6860, + 0x6888, 0x6910, 0x8000 + }; regs->version = 0; @@ -8261,11 +8466,9 @@ bnx2_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) struct bnx2 *bp = netdev_priv(dev); ering->rx_max_pending = MAX_TOTAL_RX_DESC_CNT; - ering->rx_mini_max_pending = 0; ering->rx_jumbo_max_pending = MAX_TOTAL_RX_PG_DESC_CNT; ering->rx_pending = bp->rx_ring_size; - ering->rx_mini_pending = 0; ering->rx_jumbo_pending = bp->rx_pg_ring_size; ering->tx_max_pending = MAX_TX_DESC_CNT; @@ -8273,24 +8476,16 @@ bnx2_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) } static int -bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx) +bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx, bool reset_irq) { - int rc; + int rc = 0; #if defined(__VMKLNX__) - if(bp->reset_failed) { - printk(KERN_ERR "%s: Previous error detected preventing MTU " - "change\n", bp->dev->name); + netdev_err(bp->dev, "Previous error detected preventing MTU " + "change\n"); return -EIO; } -#if (VMWARE_ESX_DDK_VERSION < 50000) - /* There is no need to hold rtnl_lock - * when calling change MTU into driver - * from VMkernel ESX 5.0 onwards. - */ - rtnl_lock(); -#endif #endif /* defined(__VMKLNX__) */ if (netif_running(bp->dev)) { @@ -8319,18 +8514,23 @@ bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx) /* Did the chip reset fail ? */ if (rc != 0) { - printk(KERN_ERR PFX "%s: chip reset failed during MTU " - "change\n", - bp->dev->name); + netdev_err(bp->dev, "chip reset failed during MTU " + "change\n"); bp->reset_failed = 1; goto error; } + bnx2_free_irq(bp); #else /* !defined(__VMKLNX__) */ bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_RESET); + if (reset_irq) { + bnx2_free_irq(bp); + bnx2_del_napi(bp); + } else { + __bnx2_free_irq(bp); + } #endif /* defined(__VMKLNX__) */ - bnx2_free_irq(bp); bnx2_free_skbs(bp); bnx2_free_mem(bp); } @@ -8339,28 +8539,31 @@ bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx) bp->tx_ring_size = tx; if (netif_running(bp->dev)) { - rc = bnx2_alloc_mem(bp); + if (reset_irq) { + rc = bnx2_setup_int_mode(bp, disable_msi); + bnx2_init_napi(bp); + } + + if (!rc) + rc = bnx2_alloc_mem(bp); #if defined(BNX2_ENABLE_NETQUEUE) if (rc) { - printk(KERN_ERR PFX "%s: failed alloc mem during MTU " - "change\n", - bp->dev->name); + netdev_err(bp->dev, "failed alloc mem during MTU " + "change\n"); goto error; } rc = bnx2_request_irq(bp); if (rc) { - printk(KERN_ERR PFX "%s: failed request irq during MTU " - "change %d\n", - bp->dev->name, rc); + netdev_err(bp->dev, "failed request irq during MTU " + "change %d\n", rc); goto error; } rc = bnx2_init_nic(bp, 0); if (rc) { - printk(KERN_ERR PFX "%s: failed init nic during MTU " - "change\n", - bp->dev->name); + netdev_err(bp->dev, "failed init nic during MTU " + "change\n"); goto error; } @@ -8374,6 +8577,7 @@ bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx) rc = bnx2_init_nic(bp, 0); if (rc) { + bnx2_napi_enable(bp); dev_close(bp->dev); #if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION == 41000) @@ -8385,14 +8589,6 @@ bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx) */ bp->dev->gflags &= ~IFF_DEV_IS_OPEN; #endif - - printk(KERN_ERR PFX "bnx2: change_ring_size... " - "nic initialization failed " - "%s\n", bp->dev->name); - -#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) - rtnl_unlock(); -#endif return rc; } #endif /* defined(BNX2_ENABLE_NETQUEUE) */ @@ -8406,20 +8602,12 @@ bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx) bnx2_netif_start(bp, true); } -#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) - rtnl_unlock(); -#endif - return 0; #if defined(__VMKLNX__) error: netif_carrier_off(bp->dev); -#if (VMWARE_ESX_DDK_VERSION < 50000) - rtnl_unlock(); -#endif - return rc; #endif /* defined(__VMKLNX__) */ } @@ -8436,7 +8624,8 @@ bnx2_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) return -EINVAL; } - rc = bnx2_change_ring_size(bp, ering->rx_pending, ering->tx_pending); + rc = bnx2_change_ring_size(bp, ering->rx_pending, ering->tx_pending, + false); return rc; } @@ -8610,8 +8799,7 @@ static struct { #endif }; -#define BNX2_NUM_STATS (sizeof(bnx2_stats_str_arr)/\ - sizeof(bnx2_stats_str_arr[0])) +#define BNX2_NUM_STATS ARRAY_SIZE(bnx2_stats_str_arr) #if defined(BNX2_ENABLE_NETQUEUE) #define BNX2_NUM_NETQ_STATS 45 @@ -8872,6 +9060,7 @@ bnx2_get_ethtool_stats(struct net_device *dev, #endif } +#if (LINUX_VERSION_CODE < 0x30000) static int bnx2_phys_id(struct net_device *dev, u32 data) { @@ -8912,6 +9101,48 @@ bnx2_phys_id(struct net_device *dev, u32 data) return 0; } +#else + +static int +bnx2_set_phys_id(struct net_device *dev, enum ethtool_phys_id_state state) +{ + struct bnx2 *bp = netdev_priv(dev); + + switch (state) { + case ETHTOOL_ID_ACTIVE: + bnx2_set_power_state(bp, PCI_D0); + + bp->leds_save = REG_RD(bp, BNX2_MISC_CFG); + REG_WR(bp, BNX2_MISC_CFG, BNX2_MISC_CFG_LEDMODE_MAC); + return 1; /* cycle on/off once per second */ + + case ETHTOOL_ID_ON: + REG_WR(bp, BNX2_EMAC_LED, BNX2_EMAC_LED_OVERRIDE | + BNX2_EMAC_LED_1000MB_OVERRIDE | + BNX2_EMAC_LED_100MB_OVERRIDE | + BNX2_EMAC_LED_10MB_OVERRIDE | + BNX2_EMAC_LED_TRAFFIC_OVERRIDE | + BNX2_EMAC_LED_TRAFFIC); + break; + + case ETHTOOL_ID_OFF: + REG_WR(bp, BNX2_EMAC_LED, BNX2_EMAC_LED_OVERRIDE); + break; + + case ETHTOOL_ID_INACTIVE: + REG_WR(bp, BNX2_EMAC_LED, 0); + REG_WR(bp, BNX2_MISC_CFG, bp->leds_save); + + if (!netif_running(dev)) + bnx2_set_power_state(bp, PCI_D3hot); + break; + } + + return 0; +} + +#endif + #if (LINUX_VERSION_CODE >= 0x20418) static int bnx2_set_tx_csum(struct net_device *dev, u32 data) @@ -8920,17 +9151,92 @@ bnx2_set_tx_csum(struct net_device *dev, u32 data) if (CHIP_NUM(bp) == CHIP_NUM_5709) #if (LINUX_VERSION_CODE < 0x2060c) - return (bnx2_set_tx_hw_csum(dev, data)); + return bnx2_set_tx_hw_csum(dev, data); #elif (LINUX_VERSION_CODE >= 0x20617) - return (ethtool_op_set_tx_ipv6_csum(dev, data)); + return ethtool_op_set_tx_ipv6_csum(dev, data); #else - return (ethtool_op_set_tx_hw_csum(dev, data)); + return ethtool_op_set_tx_hw_csum(dev, data); #endif else - return (ethtool_op_set_tx_csum(dev, data)); + return ethtool_op_set_tx_csum(dev, data); } #endif +#ifdef NETIF_F_RXHASH +#if (LINUX_VERSION_CODE >= 0x20624) +static int +bnx2_set_flags(struct net_device *dev, u32 data) +{ + return ethtool_op_set_flags(dev, data, ETH_FLAG_RXHASH); +} + +#else +static int +bnx2_set_flags(struct net_device *dev, u32 data) +{ + if (data & (ETH_FLAG_LRO | ETH_FLAG_NTUPLE)) + return -EOPNOTSUPP; + + if (data & ETH_FLAG_RXHASH) + dev->features |= NETIF_F_RXHASH; + else + dev->features &= ~NETIF_F_RXHASH; + return 0; +} +#endif +#endif + +#ifdef ETHTOOL_GCHANNELS +static void bnx2_get_channels(struct net_device *dev, + struct ethtool_channels *channels) +{ + struct bnx2 *bp = netdev_priv(dev); + u32 max_rx_rings = 1; + u32 max_tx_rings = 1; + + if ((bp->flags & BNX2_FLAG_MSIX_CAP) && !disable_msi) { + max_rx_rings = RX_MAX_RINGS; + max_tx_rings = TX_MAX_RINGS; + } + + channels->max_rx = max_rx_rings; + channels->max_tx = max_tx_rings; + channels->max_other = 0; + channels->max_combined = 0; + channels->rx_count = bp->num_rx_rings; + channels->tx_count = bp->num_tx_rings; + channels->other_count = 0; + channels->combined_count = 0; +} + +static int bnx2_set_channels(struct net_device *dev, + struct ethtool_channels *channels) +{ + struct bnx2 *bp = netdev_priv(dev); + u32 max_rx_rings = 1; + u32 max_tx_rings = 1; + int rc = 0; + + if ((bp->flags & BNX2_FLAG_MSIX_CAP) && !disable_msi) { + max_rx_rings = RX_MAX_RINGS; + max_tx_rings = TX_MAX_RINGS; + } + if (channels->rx_count > max_rx_rings || + channels->tx_count > max_tx_rings) + return -EINVAL; + + bp->num_req_rx_rings = channels->rx_count; + bp->num_req_tx_rings = channels->tx_count; + + if (netif_running(dev)) + rc = bnx2_change_ring_size(bp, bp->rx_ring_size, + bp->tx_ring_size, true); + + return rc; +} + +#endif + static struct ethtool_ops bnx2_ethtool_ops = { .get_settings = bnx2_get_settings, .set_settings = bnx2_set_settings, @@ -8973,7 +9279,11 @@ static struct ethtool_ops bnx2_ethtool_ops = { #endif .self_test = bnx2_self_test, .get_strings = bnx2_get_strings, +#if (LINUX_VERSION_CODE < 0x30000) .phys_id = bnx2_phys_id, +#else + .set_phys_id = bnx2_set_phys_id, +#endif #ifndef ETHTOOL_GFLAGS .get_stats_count = bnx2_get_stats_count, #endif @@ -8986,6 +9296,14 @@ static struct ethtool_ops bnx2_ethtool_ops = { #ifdef ETHTOOL_GFLAGS .get_sset_count = bnx2_get_sset_count, #endif +#ifdef NETIF_F_RXHASH + .set_flags = bnx2_set_flags, + .get_flags = ethtool_op_get_flags, +#endif +#ifdef ETHTOOL_GCHANNELS + .get_channels = bnx2_get_channels, + .set_channels = bnx2_set_channels, +#endif }; #if defined(BNX2_VMWARE_BMAPILNX) @@ -8999,21 +9317,18 @@ bnx2_ioctl_cim(struct net_device *dev, struct ifreq *ifr) u32 val; if (copy_from_user(&req, useraddr, sizeof(req))) { - printk(KERN_ERR PFX "%s: bnx2_ioctl() could not copy from user" - "bnx2_ioctl_req\n", bp->dev->name); + netdev_err(bp->dev, "bnx2_ioctl() could not copy from user"); return -EFAULT; } switch(req.cmd) { case BNX2_VMWARE_CIM_CMD_ENABLE_NIC: - printk(KERN_INFO PFX "%s: bnx2_ioctl() enable NIC\n", - bp->dev->name); + netdev_info(bp->dev, "bnx2_ioctl() enable NIC\n"); rc = bnx2_open(bp->dev); break; case BNX2_VMWARE_CIM_CMD_DISABLE_NIC: - printk(KERN_INFO PFX "%s: bnx2_ioctl() disable NIC\n", - bp->dev->name); + netdev_info(bp->dev, " bnx2_ioctl() disable NIC\n"); rc = bnx2_close(bp->dev); break; @@ -9026,10 +9341,9 @@ bnx2_ioctl_cim(struct net_device *dev, struct ifreq *ifr) mem_len = MB_GET_CID_ADDR(TX_TSS_CID + TX_MAX_TSS_RINGS + 1); #endif if(mem_len < req.cmd_req.reg_read.reg_offset) { - printk(KERN_ERR PFX "%s: bnx2_ioctl() reg read: " - "out of range: max reg: 0x%x " - "req reg: 0x%x\n", - bp->dev->name, + netdev_info(bp->dev, "bnx2_ioctl() reg read: " + "out of range: max reg: 0x%x " + "req reg: 0x%x\n", mem_len, req.cmd_req.reg_read.reg_offset); rc = -EINVAL; break; @@ -9037,9 +9351,8 @@ bnx2_ioctl_cim(struct net_device *dev, struct ifreq *ifr) val = REG_RD(bp, req.cmd_req.reg_read.reg_offset); - printk(KERN_INFO PFX "%s: bnx2_ioctl() reg read: " + netdev_err(bp->dev, "bnx2_ioctl() reg read: " "reg: 0x%x value:0x%x", - bp->dev->name, req.cmd_req.reg_read.reg_offset, req.cmd_req.reg_read.reg_value); req.cmd_req.reg_read.reg_value = val; @@ -9054,18 +9367,16 @@ bnx2_ioctl_cim(struct net_device *dev, struct ifreq *ifr) mem_len = MB_GET_CID_ADDR(TX_TSS_CID + TX_MAX_TSS_RINGS + 1); #endif if(mem_len < req.cmd_req.reg_write.reg_offset) { - printk(KERN_ERR PFX "%s: bnx2_ioctl() reg write: " + netdev_err(bp->dev, "bnx2_ioctl() reg write: " "out of range: max reg: 0x%x " "req reg: 0x%x\n", - bp->dev->name, mem_len, req.cmd_req.reg_write.reg_offset); rc = -EINVAL; break; } - printk(KERN_INFO PFX "%s: bnx2_ioctl() reg write: " + netdev_info(bp->dev, "bnx2_ioctl() reg write: " "reg: 0x%x value:0x%x", - bp->dev->name, req.cmd_req.reg_write.reg_offset, req.cmd_req.reg_write.reg_value); @@ -9074,8 +9385,7 @@ bnx2_ioctl_cim(struct net_device *dev, struct ifreq *ifr) break; } case BNX2_VMWARE_CIM_CMD_GET_NIC_PARAM: - printk(KERN_INFO PFX "%s: bnx2_ioctl() get NIC param\n", - bp->dev->name); + netdev_info(bp->dev, "bnx2_ioctl() get NIC param\n"); req.cmd_req.get_nic_param.mtu = dev->mtu; memcpy(req.cmd_req.get_nic_param.current_mac_addr, @@ -9083,21 +9393,20 @@ bnx2_ioctl_cim(struct net_device *dev, struct ifreq *ifr) sizeof(req.cmd_req.get_nic_param.current_mac_addr)); break; case BNX2_VMWARE_CIM_CMD_GET_NIC_STATUS: - printk(KERN_INFO PFX "%s: bnx2_ioctl() get NIC status\n", - bp->dev->name); + netdev_info(bp->dev, "bnx2_ioctl() get NIC status\n"); req.cmd_req.get_nic_status.nic_status = netif_running(dev); break; default: - printk(KERN_ERR PFX "%s: bnx2_ioctl() unknown req.cmd: 0x%x\n", - bp->dev->name, req.cmd); + netdev_warn(bp->dev, "bnx2_ioctl() unknown req.cmd: 0x%x\n", + req.cmd); rc = -EINVAL; } if (rc == 0 && copy_to_user(useraddr, &req, sizeof(req))) { - printk(KERN_ERR PFX "%s: bnx2_ioctl() couldn't copy to user " - "bnx2_ioctl_req\n", bp->dev->name); + netdev_err(bp->dev, "bnx2_ioctl() couldn't copy to user " + "bnx2_ioctl_req\n"); return -EFAULT; } @@ -9170,6 +9479,24 @@ bnx2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) return -EOPNOTSUPP; } +#if defined(__VMKLNX__) +static int +bnx2_vmk_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) +{ + int rc; + +#if (VMWARE_ESX_DDK_VERSION < 50000) + /* rtnl_lock() needed for ESX 4.0 and 4.1 only */ + rtnl_lock(); +#endif + rc = bnx2_ioctl(dev, ifr, cmd); +#if (VMWARE_ESX_DDK_VERSION < 50000) + rtnl_unlock(); +#endif + return rc; +} +#endif + /* Called with rtnl_lock */ static int bnx2_change_mac_addr(struct net_device *dev, void *p) @@ -9178,7 +9505,7 @@ bnx2_change_mac_addr(struct net_device *dev, void *p) struct bnx2 *bp = netdev_priv(dev); if (!is_valid_ether_addr(addr->sa_data)) - return -EINVAL; + return -EADDRNOTAVAIL; memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); if (netif_running(dev)) @@ -9198,9 +9525,29 @@ bnx2_change_mtu(struct net_device *dev, int new_mtu) return -EINVAL; dev->mtu = new_mtu; - return (bnx2_change_ring_size(bp, bp->rx_ring_size, bp->tx_ring_size)); + return (bnx2_change_ring_size(bp, bp->rx_ring_size, bp->tx_ring_size, + false)); } +#if defined(__VMKLNX__) +static int +bnx2_vmk_change_mtu(struct net_device *dev, int new_mtu) +{ + int rc; + +#if (VMWARE_ESX_DDK_VERSION < 50000) + /* rtnl_lock() needed for ESX 4.0 and 4.1 only */ + rtnl_lock(); +#endif + rc = bnx2_change_mtu(dev, new_mtu); +#if (VMWARE_ESX_DDK_VERSION < 50000) + rtnl_unlock(); +#endif + + return rc; +} +#endif + #if defined(HAVE_POLL_CONTROLLER) || defined(CONFIG_NET_POLL_CONTROLLER) static void poll_bnx2(struct net_device *dev) @@ -9227,7 +9574,7 @@ poll_bnx2(struct net_device *dev) struct bnx2_irq *irq = &bp->irq_tbl[i]; disable_irq(irq->vector); -#if (LINUX_VERSION_CODE >= 0x20613) || (VMWARE_ESX_DDK_VERSION >= 40000) +#if (LINUX_VERSION_CODE >= 0x20613) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) irq->handler(irq->vector, &bp->bnx2_napi[i]); #else irq->handler(irq->vector, &bp->bnx2_napi[i], NULL); @@ -9257,7 +9604,7 @@ bnx2_get_5709_media(struct bnx2 *bp) else strap = (val & BNX2_MISC_DUAL_MEDIA_CTRL_PHY_CTRL_STRAP) >> 8; - if (PCI_FUNC(bp->pdev->devfn) == 0) { + if (bp->func == 0) { switch (strap) { case 0x4: case 0x5: @@ -9412,10 +9759,10 @@ static int __devinit bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) { struct bnx2 *bp; - unsigned long mem_len; int rc, i, j; u32 reg; u64 dma_mask, persist_dma_mask; + int err; #if (LINUX_VERSION_CODE < 0x20610) SET_MODULE_OWNER(dev); @@ -9440,32 +9787,29 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) /* enable device (incl. PCI PM wakeup), and bus-mastering */ rc = pci_enable_device(pdev); if (rc) { - dev_err(&pdev->dev, "Cannot enable PCI device, aborting.\n"); + dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n"); goto err_out; } if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { dev_err(&pdev->dev, - "Cannot find PCI device base address, aborting.\n"); + "Cannot find PCI device base address, aborting\n"); rc = -ENODEV; goto err_out_disable; } rc = pci_request_regions(pdev, DRV_MODULE_NAME); if (rc) { - dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting.\n"); + dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting\n"); goto err_out_disable; } pci_set_master(pdev); -#if (LINUX_VERSION_CODE >= 0x020611) - pci_save_state(pdev); -#endif bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); if (bp->pm_cap == 0) { dev_err(&pdev->dev, - "Cannot find power management capability, aborting.\n"); + "Cannot find power management capability, aborting\n"); rc = -EIO; goto err_out_release; } @@ -9475,11 +9819,14 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) spin_lock_init(&bp->phy_lock); spin_lock_init(&bp->indirect_lock); +#if defined(BNX2_ENABLE_NETQUEUE) + mutex_init(&bp->netq_lock); +#endif #ifdef BCM_CNIC mutex_init(&bp->cnic_lock); #endif #if (LINUX_VERSION_CODE >= 0x20600) -#if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (VMWARE_ESX_DDK_VERSION >= 40000) +#if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) INIT_WORK(&bp->reset_task, bnx2_reset_task); #else INIT_WORK(&bp->reset_task, bnx2_reset_task, bp); @@ -9488,50 +9835,53 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) INIT_TQUEUE(&bp->reset_task, bnx2_reset_task, bp); #endif - dev->base_addr = dev->mem_start = pci_resource_start(pdev, 0); #if defined(BNX2_ENABLE_NETQUEUE) - mem_len = MB_GET_CID_ADDR(NETQUEUE_KCQ_CID + 2); + bp->regview = pci_iomap(pdev, 0, MB_GET_CID_ADDR(NETQUEUE_KCQ_CID + 2)); #else - mem_len = MB_GET_CID_ADDR(TX_TSS_CID + TX_MAX_TSS_RINGS + 1); + bp->regview = pci_iomap(pdev, 0, MB_GET_CID_ADDR(TX_TSS_CID + + TX_MAX_TSS_RINGS + 1)); #endif - dev->mem_end = dev->mem_start + mem_len; - dev->irq = pdev->irq; - - bp->regview = ioremap_nocache(dev->base_addr, mem_len); if (!bp->regview) { - dev_err(&pdev->dev, "Cannot map register space, aborting.\n"); + dev_err(&pdev->dev, "Cannot map register space, aborting\n"); rc = -ENOMEM; goto err_out_release; } + bnx2_set_power_state(bp, PCI_D0); + /* Configure byte swap and enable write to the reg_window registers. * Rely on CPU to do target byte swapping on big endian systems * The chip's target access swapping will not swap all accesses */ - pci_write_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG, - BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA | - BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP); - - bnx2_set_power_state(bp, PCI_D0); + REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, + BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA | + BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP); bp->chip_id = REG_RD(bp, BNX2_MISC_ID); if (CHIP_NUM(bp) == CHIP_NUM_5709) { - if (pci_find_capability(pdev, PCI_CAP_ID_EXP) == 0) { - dev_err(&pdev->dev, - "Cannot find PCIE capability, aborting.\n"); + if (!pci_is_pcie(pdev)) { + dev_err(&pdev->dev, "Not PCIE, aborting\n"); rc = -EIO; goto err_out_unmap; } bp->flags |= BNX2_FLAG_PCIE; if (CHIP_REV(bp) == CHIP_REV_Ax) bp->flags |= BNX2_FLAG_JUMBO_BROKEN; + +#if !defined(CONFIG_PPC64) && !defined(CONFIG_PPC32) + /* AER (Advanced Error Reporting) hooks */ + err = pci_enable_pcie_error_reporting(pdev); + if (!err) + bp->flags |= BNX2_FLAG_AER_ENABLED; +#endif + } else { bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX); if (bp->pcix_cap == 0) { dev_err(&pdev->dev, - "Cannot find PCIX capability, aborting.\n"); + "Cannot find PCIX capability, aborting\n"); rc = -EIO; goto err_out_unmap; } @@ -9540,46 +9890,14 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) #ifdef CONFIG_PCI_MSI if (CHIP_NUM(bp) == CHIP_NUM_5709 && CHIP_REV(bp) != CHIP_REV_Ax) { - int msix_cap; - - msix_cap = pci_find_capability(pdev, PCI_CAP_ID_MSIX); - if (msix_cap) { - u16 flags; - + if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) bp->flags |= BNX2_FLAG_MSIX_CAP; - pci_read_config_word(bp->pdev, - msix_cap + PCI_MSIX_FLAGS, &flags); - if (flags & PCI_MSIX_FLAGS_ENABLE) { - flags &= ~PCI_MSIX_FLAGS_ENABLE; - pci_write_config_word(bp->pdev, msix_cap + - PCI_MSIX_FLAGS, flags); - REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, - BNX2_PCICFG_INT_ACK_CMD_MASK_INT); - pci_intx(pdev, 1); - } - } } #endif if (CHIP_ID(bp) != CHIP_ID_5706_A0 && CHIP_ID(bp) != CHIP_ID_5706_A1) { - int msi_cap; - - msi_cap = pci_find_capability(pdev, PCI_CAP_ID_MSI); - if (msi_cap) { - u16 flags; - + if (pci_find_capability(pdev, PCI_CAP_ID_MSI)) bp->flags |= BNX2_FLAG_MSI_CAP; - pci_read_config_word(bp->pdev, - msi_cap + PCI_MSI_FLAGS, &flags); - if (flags & PCI_MSI_FLAGS_ENABLE) { - flags &= ~PCI_MSI_FLAGS_ENABLE; - pci_write_config_word(bp->pdev, msi_cap + - PCI_MSI_FLAGS, flags); - REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, - BNX2_PCICFG_INT_ACK_CMD_MASK_INT); - pci_intx(pdev, 1); - } - } } /* 5708 cannot support DMA addresses > 40-bit. */ @@ -9589,27 +9907,23 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) persist_dma_mask = dma_mask = DMA_BIT_MASK(64); /* Configure DMA attributes. */ -#if defined(__VMKLNX__) - if (dma_set_mask(&pdev->dev, dma_mask) == 0) { -#else if (pci_set_dma_mask(pdev, dma_mask) == 0) { -#endif +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) if (CHIP_NUM(bp) == CHIP_NUM_5708) dev->features |= NETIF_F_DMA40; else dev->features |= NETIF_F_HIGHDMA; +#else + dev->features |= NETIF_F_HIGHDMA; +#endif rc = pci_set_consistent_dma_mask(pdev, persist_dma_mask); if (rc) { dev_err(&pdev->dev, - "pci_set_consistent_dma_mask failed, aborting.\n"); + "pci_set_consistent_dma_mask failed, aborting\n"); goto err_out_unmap; } -#if defined(__VMKLNX__) - } else if ((rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) != 0) { -#else } else if ((rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) != 0) { -#endif - dev_err(&pdev->dev, "System does not support DMA, aborting.\n"); + dev_err(&pdev->dev, "System does not support DMA, aborting\n"); goto err_out_unmap; } @@ -9626,7 +9940,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) !(bp->flags & BNX2_FLAG_PCIX)) { dev_err(&pdev->dev, - "5706 A1 can only be used in a PCIX bus, aborting.\n"); + "5706 A1 can only be used in a PCIX bus, aborting\n"); goto err_out_unmap; } @@ -9634,9 +9948,12 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) reg = bnx2_reg_rd_ind(bp, BNX2_SHM_HDR_SIGNATURE); + if (bnx2_reg_rd_ind(bp, BNX2_MCP_TOE_ID) & BNX2_MCP_TOE_ID_FUNCTION_ID) + bp->func = 1; + if ((reg & BNX2_SHM_HDR_SIGNATURE_SIG_MASK) == BNX2_SHM_HDR_SIGNATURE_SIG) { - u32 off = PCI_FUNC(pdev->devfn) << 2; + u32 off = bp->func << 2; bp->shmem_base = bnx2_reg_rd_ind(bp, BNX2_SHM_HDR_ADDR_0 + off); } else @@ -9649,7 +9966,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) if ((reg & BNX2_DEV_INFO_SIGNATURE_MAGIC_MASK) != BNX2_DEV_INFO_SIGNATURE_MAGIC) { - dev_err(&pdev->dev, "Firmware not running, aborting.\n"); + dev_err(&pdev->dev, "Firmware not running, aborting\n"); rc = -ENODEV; goto err_out_unmap; } @@ -9700,7 +10017,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) bp->fw_version[j++] = ' '; for (i = 0; i < 3 && j < 28; i++) { reg = bnx2_reg_rd_ind(bp, addr + i * 4); - reg = swab32(reg); + reg = be32_to_cpu(reg); memcpy(&bp->fw_version[j], ®, 4); j += 4; } @@ -9796,7 +10113,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) #ifdef CONFIG_PCI_MSI #if defined(__VMKLNX__) - /* PR496996: There is some additional setup needed for the P2P + /* PR496996: There is some additional setup needed for the P2P * ServerWorks bridge with VID/DID of 0x1666/0x0036 when * 5706 is plugged into an IBM system x3655 server and MSI * is used. Since that workaround cannot be done using @@ -9841,14 +10158,28 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) bp->timer.data = (unsigned long) bp; bp->timer.function = bnx2_timer; +#ifdef BCM_CNIC + if (bnx2_shmem_rd(bp, BNX2_ISCSI_INITIATOR) & BNX2_ISCSI_INITIATOR_EN) + bp->cnic_eth_dev.max_iscsi_conn = + (bnx2_shmem_rd(bp, BNX2_ISCSI_MAX_CONN) & + BNX2_ISCSI_MAX_CONN_MASK) >> BNX2_ISCSI_MAX_CONN_SHIFT; +#endif + +#if (LINUX_VERSION_CODE >= 0x020611) + pci_save_state(pdev); +#endif + return 0; err_out_unmap: - if (bp->regview) { - iounmap(bp->regview); - bp->regview = NULL; + if (bp->flags & BNX2_FLAG_AER_ENABLED) { + pci_disable_pcie_error_reporting(pdev); + bp->flags &= ~BNX2_FLAG_AER_ENABLED; } + pci_iounmap(pdev, bp->regview); + bp->regview = NULL; + err_out_release: pci_release_regions(pdev); @@ -9927,17 +10258,25 @@ bnx2_init_napi(struct bnx2 *bp) #endif } -#ifdef HAVE_NET_DEVICE_OPS +#if defined(HAVE_NET_DEVICE_OPS) || (LINUX_VERSION_CODE >= 0x30000) static const struct net_device_ops bnx2_netdev_ops = { .ndo_open = bnx2_open, .ndo_start_xmit = bnx2_start_xmit, .ndo_stop = bnx2_close, .ndo_get_stats = bnx2_get_stats, .ndo_set_rx_mode = bnx2_set_rx_mode, +#if defined(__VMKLNX__) + .ndo_do_ioctl = bnx2_vmk_ioctl, +#else .ndo_do_ioctl = bnx2_ioctl, +#endif .ndo_validate_addr = eth_validate_addr, .ndo_set_mac_address = bnx2_change_mac_addr, +#if defined(__VMKLNX__) + .ndo_change_mtu = bnx2_vmk_change_mtu, +#else .ndo_change_mtu = bnx2_change_mtu, +#endif .ndo_tx_timeout = bnx2_tx_timeout, #ifdef BCM_VLAN .ndo_vlan_rx_register = bnx2_vlan_rx_register, @@ -9948,7 +10287,7 @@ static const struct net_device_ops bnx2_netdev_ops = { }; #endif -static void inline vlan_features_add(struct net_device *dev, unsigned long flags) +static inline void vlan_features_add(struct net_device *dev, unsigned long flags) { #if (LINUX_VERSION_CODE >= 0x2061a) #ifdef BCM_VLAN @@ -9961,17 +10300,18 @@ static int __devinit bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { static int version_printed = 0; - struct net_device *dev = NULL; + struct net_device *dev; struct bnx2 *bp; int rc; char str[40]; DECLARE_MAC_BUF(mac); -#if defined(BNX2_ENABLE_NETQUEUE) +#if (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000)) || \ + (defined(BNX2_ENABLE_NETQUEUE)) static int index = 0; #endif if (version_printed++ == 0) - printk(KERN_INFO "%s", version); + pr_info("%s", version); /* dev zeroed in init_etherdev */ #if (LINUX_VERSION_CODE >= 0x20418) @@ -9988,15 +10328,8 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) return -ENOMEM; rc = bnx2_init_board(pdev, dev); - if (rc < 0) { -#if (LINUX_VERSION_CODE >= 0x20418) - free_netdev(dev); -#else - unregister_netdev(dev); - kfree(dev); -#endif - return rc; - } + if (rc < 0) + goto err_free; #ifndef HAVE_NET_DEVICE_OPS dev->open = bnx2_open; @@ -10008,9 +10341,17 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) #else dev->set_multicast_list = bnx2_set_rx_mode; #endif +#if defined(__VMKLNX__) + dev->do_ioctl = bnx2_vmk_ioctl; +#else dev->do_ioctl = bnx2_ioctl; +#endif dev->set_mac_address = bnx2_change_mac_addr; +#if defined(__VMKLNX__) + dev->change_mtu = bnx2_vmk_change_mtu; +#else dev->change_mtu = bnx2_change_mtu; +#endif dev->tx_timeout = bnx2_tx_timeout; #ifdef BCM_VLAN dev->vlan_rx_register = bnx2_vlan_rx_register; @@ -10030,6 +10371,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) bp = netdev_priv(dev); /* NAPI add must be called in bnx2_init_one() on ESX so that the * proper affinity will be assigned */ + #if defined(__VMKLNX__) bnx2_setup_int_mode(bp, disable_msi); bnx2_init_napi(bp); @@ -10046,6 +10388,9 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; #if defined(NETIF_F_GRO) && defined(BNX2_NEW_NAPI) dev->features |= NETIF_F_GRO; +#endif +#ifdef NETIF_F_RXHASH + dev->features |= NETIF_F_RXHASH; #endif vlan_features_add(dev, NETIF_F_IP_CSUM | NETIF_F_SG); if (CHIP_NUM(bp) == CHIP_NUM_5709) { @@ -10071,22 +10416,28 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) } #endif -#if defined(__VMKLNX__) +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) if (CHIP_NUM(bp) == CHIP_NUM_5706 || CHIP_NUM(bp) == CHIP_NUM_5708) { dev->features |= NETIF_F_NO_SCHED; } #endif +#if (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000)) || \ + (defined(BNX2_ENABLE_NETQUEUE)) + bp->index = index; + index++; +#endif #if defined(BNX2_ENABLE_NETQUEUE) /* If enabled register the NetQueue callbacks */ if (CHIP_NUM(bp) == CHIP_NUM_5709) { - bp->index = index; - index++; if (BNX2_NETQUEUE_ENABLED(bp)) VMKNETDDI_REGISTER_QUEUEOPS(dev, bnx2_netqueue_ops); } #endif +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + fwdmp_bp_ptr[bp->index] = bp; +#endif #if (LINUX_VERSION_CODE >= 0x20418) if ((rc = register_netdev(dev))) { @@ -10094,37 +10445,39 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) goto error; } #endif - printk(KERN_INFO "%s: %s (%c%d) %s found at mem %lx, " - "IRQ %d, node addr %s\n", - dev->name, - board_info[ent->driver_data].name, - ((CHIP_ID(bp) & 0xf000) >> 12) + 'A', - ((CHIP_ID(bp) & 0x0ff0) >> 4), - bnx2_bus_string(bp, str), - dev->base_addr, - bp->pdev->irq, print_mac(mac, dev->dev_addr)); + netdev_info(dev, "%s (%c%d) %s found at mem %lx, IRQ %d, " + "node addr %s\n", board_info[ent->driver_data].name, + ((CHIP_ID(bp) & 0xf000) >> 12) + 'A', + ((CHIP_ID(bp) & 0x0ff0) >> 4), + bnx2_bus_string(bp, str), (long)pci_resource_start(pdev, 0), + bp->pdev->irq, print_mac(mac, dev->dev_addr)); #if defined(BNX2_ENABLE_NETQUEUE) if (CHIP_NUM(bp) == CHIP_NUM_5709) { if (BNX2_NETQUEUE_ENABLED(bp)) { - printk(KERN_INFO "%s: NetQueue Ops registered [%d]\n", - dev->name, bp->index); + netdev_info(bp->dev, "NetQueue Ops registered [%d]\n", + bp->index); } else - printk(KERN_INFO "%s: NetQueue Ops not registered " - "[%d]\n", - dev->name, bp->index); + netdev_info(bp->dev, "NetQueue Ops not registered " + "[%d]\n", + bp->index); } #endif return 0; error: - if (bp->regview) - iounmap(bp->regview); + pci_iounmap(pdev, bp->regview); pci_release_regions(pdev); pci_disable_device(pdev); pci_set_drvdata(pdev, NULL); +err_free: +#if (LINUX_VERSION_CODE >= 0x20418) free_netdev(dev); +#else + unregister_netdev(dev); + kfree(dev); +#endif return rc; } @@ -10134,10 +10487,6 @@ bnx2_remove_one(struct pci_dev *pdev) struct net_device *dev = pci_get_drvdata(pdev); struct bnx2 *bp = netdev_priv(dev); -#if (LINUX_VERSION_CODE >= 0x20600) - flush_scheduled_work(); -#endif - #if defined(__VMKLNX__) bnx2_del_napi(bp); bnx2_disable_msi(bp); @@ -10145,16 +10494,30 @@ bnx2_remove_one(struct pci_dev *pdev) unregister_netdev(dev); - if (bp->regview) - iounmap(bp->regview); + del_timer_sync(&bp->timer); +#if (LINUX_VERSION_CODE >= 0x20616) || defined(__VMKLNX__) + cancel_work_sync(&bp->reset_task); +#elif (LINUX_VERSION_CODE >= 0x20600) + flush_scheduled_work(); +#endif + + pci_iounmap(bp->pdev, bp->regview); kfree(bp->temp_stats_blk); + if (bp->flags & BNX2_FLAG_AER_ENABLED) { + pci_disable_pcie_error_reporting(pdev); + bp->flags &= ~BNX2_FLAG_AER_ENABLED; + } + #if (LINUX_VERSION_CODE >= 0x20418) free_netdev(dev); #else kfree(dev); #endif + + pci_disable_pcie_error_reporting(pdev); + pci_release_regions(pdev); pci_disable_device(pdev); pci_set_drvdata(pdev, NULL); @@ -10176,8 +10539,8 @@ bnx2_suspend(struct pci_dev *pdev, pm_message_t state) if (!netif_running(dev)) return 0; -#if (LINUX_VERSION_CODE >= 0x20600) - flush_scheduled_work(); +#if (LINUX_VERSION_CODE >= 0x20616) || defined(__VMKLNX__) + cancel_work_sync(&bp->reset_task); #endif bnx2_netif_stop(bp, true); netif_device_detach(dev); @@ -10258,25 +10621,38 @@ static pci_ers_result_t bnx2_io_slot_reset(struct pci_dev *pdev) { struct net_device *dev = pci_get_drvdata(pdev); struct bnx2 *bp = netdev_priv(dev); + pci_ers_result_t result; + int err; rtnl_lock(); if (pci_enable_device(pdev)) { dev_err(&pdev->dev, - "Cannot re-enable PCI device after reset.\n"); - rtnl_unlock(); - return PCI_ERS_RESULT_DISCONNECT; - } - pci_set_master(pdev); - pci_restore_state(pdev); - pci_save_state(pdev); + "Cannot re-enable PCI device after reset\n"); + result = PCI_ERS_RESULT_DISCONNECT; + } else { + pci_set_master(pdev); + pci_restore_state(pdev); + pci_save_state(pdev); - if (netif_running(dev)) { - bnx2_set_power_state(bp, PCI_D0); - bnx2_init_nic(bp, 1); + if (netif_running(dev)) { + bnx2_set_power_state(bp, PCI_D0); + bnx2_init_nic(bp, 1); + } + result = PCI_ERS_RESULT_RECOVERED; } - rtnl_unlock(); - return PCI_ERS_RESULT_RECOVERED; + + if (!(bp->flags & BNX2_FLAG_AER_ENABLED)) + return result; + + err = pci_cleanup_aer_uncorrect_error_status(pdev); + if (err) { + dev_err(&pdev->dev, + "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", + err); /* non-fatal, continue */ + } + + return result; } /** @@ -10325,6 +10701,9 @@ static struct pci_driver bnx2_pci_driver = { static int __init bnx2_init(void) { int rc = 0; +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + VMK_ReturnStatus status; +#endif #if defined(BNX2_ENABLE_NETQUEUE) int i; @@ -10332,12 +10711,12 @@ static int __init bnx2_init(void) for (i = 0; i < BNX2_MAX_NIC; i++) { if((force_netq_param[i] < BNX2_OPTION_UNSET) || (force_netq_param[i] > 7)) { - printk(KERN_ERR "bnx2x: please use a 'force_netq' " - "value between (-1 to 7), " - "0 to disable NetQueue, " - "-1 to use the default value " - "failure at index %d val: %d\n", - i, force_netq_param[i]); + pr_err("bnx2: please use a 'force_netq' " + "value between (-1 to 7), " + "0 to disable NetQueue, " + "-1 to use the default value " + "failure at index %d val: %d\n", + i, force_netq_param[i]); rc = -EINVAL; } } @@ -10353,28 +10732,70 @@ static int __init bnx2_init(void) #endif #if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) +#if defined(BNX2_INBOX) if (cnic_register_adapter("bnx2", bnx2_cnic_probe) < 0) { - printk(KERN_ERR "bnx2: Unable to register with CNIC adapter\n"); +#else /* !defined(BNX2_INBOX) */ + if (cnic_register_adapter("bnx2", bnx2_cnic_probe2) < 0) { +#endif /* defined(BNX2_INBOX) */ + pr_warn("bnx2: Unable to register with CNIC adapter\n"); /* - * We won't call pci_unregister_driver(&bnx2_pci_driver) here, - * because we still want to retain L2 funtion even if cnic_register_adapter failed + * We won't call pci_unregister_driver(&bnx2_pci_driver) here, + * because we still want to retain L2 funtion + * even if cnic_register_adapter failed */ } else { bnx2_registered_cnic_adapter = 1; } #endif /* defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) */ +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + if (!disable_fw_dmp) { + fwdmp_va_ptr = kzalloc(BNX2_FWDMP_SIZE, GFP_KERNEL); + if (!fwdmp_va_ptr) { + pr_warn("bnx2: Unable to allocate memory " + "for firmware dump handler!\n"); + } else { + status = vmklnx_dump_add_callback(BNX2_DUMPNAME, + bnx2_fwdmp_callback, + NULL, + BNX2_DUMPNAME, + &bnx2_fwdmp_dh); + if (status != VMK_OK) + pr_warn("bnx2: Unable to register firmware " + "dump handler (rc = 0x%x!)\n", + status); + } + } +#endif return rc; } static void __exit bnx2_cleanup(void) { -#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) +#if defined(__VMKLNX__) +#if (VMWARE_ESX_DDK_VERSION >= 55000) + if (bnx2_fwdmp_dh) { + VMK_ReturnStatus status; + + status = vmklnx_dump_delete_callback(bnx2_fwdmp_dh); + if (status != VMK_OK) { + VMK_ASSERT(0); + } else { + pr_info("bnx2: firmware dump handler (%p)" + " unregistered!\n", + bnx2_fwdmp_dh); + } + } + kfree(fwdmp_va_ptr); + fwdmp_va_ptr = NULL; +#endif +#if (VMWARE_ESX_DDK_VERSION >= 50000) if (bnx2_registered_cnic_adapter) { cnic_register_cancel("bnx2"); bnx2_registered_cnic_adapter = 0; } -#endif /* defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) */ +#endif +#endif /* defined(__VMKLNX__) */ pci_unregister_driver(&bnx2_pci_driver); } @@ -10417,7 +10838,7 @@ static void dump_ctx(struct bnx2 *bp, u32 cid) val1 = bnx2_read_ctx(bp, addr+4); val2 = bnx2_read_ctx(bp, addr+8); val3 = bnx2_read_ctx(bp, addr+0xc); - printk(KERN_ALERT "ctx %08x: %08x %08x %08x %08x\n", + netdev_err(bp->dev, "ctx %08x: %08x %08x %08x %08x\n", addr, val, val1, val2, val3); addr += 0x10; } @@ -10486,9 +10907,7 @@ static void dump_ctx(struct bnx2 *bp, u32 cid) #define BNX2_PG_CTX_MAP 0x1a0034 static int -bnx2_netq_free_rx_queue_update(struct net_device *netdev, - int index, - int update); +bnx2_netq_free_rx_queue(struct net_device *netdev, int index); static int bnx2_netqueue_is_avail(struct bnx2 *bp) @@ -10515,7 +10934,7 @@ bnx2_netqueue_submit_kwqes(struct bnx2 *bp, struct l2_kwqe *wqes) u16 prod, sw_prod; if (1 > bnx2_netqueue_kwq_avail(bp)) { - printk(KERN_WARNING "%s: No kwq's available\n", bp->dev->name); + netdev_warn(bp->dev, "No kwq's available\n"); return -EAGAIN; } @@ -10594,8 +11013,7 @@ bnx2_netqueue_alloc_dma(struct bnx2 *bp, struct netq_dma *dma, size = pages * (sizeof(void *) + sizeof(dma_addr_t)); dma->pg_arr = kzalloc(size, GFP_ATOMIC); if (dma->pg_arr == NULL) { - printk(KERN_ERR "%s: Couldn't alloc space for dma page array\n", - bp->dev->name); + netdev_err(bp->dev, "Couldn't alloc dma page array\n"); return -ENOMEM; } @@ -10607,8 +11025,7 @@ bnx2_netqueue_alloc_dma(struct bnx2 *bp, struct netq_dma *dma, BCM_PAGE_SIZE, &dma->pg_map_arr[i]); if (dma->pg_arr[i] == NULL) { - printk(KERN_ERR "%s: Couldn't alloc dma page\n", - bp->dev->name); + netdev_err(bp->dev, "Couldn't alloc dma page\n"); goto error; } @@ -10638,8 +11055,7 @@ bnx2_netqueue_alloc_resc(struct bnx2 *bp) ret = bnx2_netqueue_alloc_dma(bp, &bp->netq_kwq_info, L2_KWQ_PAGE_CNT); if (ret) { - printk(KERN_ERR "%s: Couldn't alloc space for kwq\n", - bp->dev->name); + netdev_err(bp->dev, "Couldn't alloc space for kwq\n"); goto error; } bp->netq_kwq = (struct l2_kwqe **) bp->netq_kwq_info.pg_arr; @@ -10647,8 +11063,7 @@ bnx2_netqueue_alloc_resc(struct bnx2 *bp) ret = bnx2_netqueue_alloc_dma(bp, &bp->netq_kcq_info, L2_KCQ_PAGE_CNT); if (ret) { - printk(KERN_ERR "%s: Couldn't alloc space for kwq\n", - bp->dev->name); + netdev_err(bp->dev, "Couldn't alloc space for kwq\n"); goto error; } bp->netq_kcq = (struct l2_kcqe **) bp->netq_kcq_info.pg_arr; @@ -10714,15 +11129,6 @@ bnx2_service_netq_kcqes(struct bnx2_napi *bnapi, int num_cqes) u32 kcqe_layer = bp->netq_completed_kcq[i]->flags & L2_KCQE_FLAGS_LAYER_MASK; - printk(KERN_INFO PFX "%s: kcwe service [reserved: 0x%x, status: 0x%x, qid: 0x%x, qe_self_seq: 0x%x, opcode: 0x%x, flags: 0x%x]\n", - bp->dev->name, - bp->netq_completed_kcq[i]->reserved, - bp->netq_completed_kcq[i]->status, - bp->netq_completed_kcq[i]->qid, - bp->netq_completed_kcq[i]->qe_self_seq, - bp->netq_completed_kcq[i]->opcode, - bp->netq_completed_kcq[i]->flags); - while (j < num_cqes) { u32 next_op = bp->netq_completed_kcq[i + j]->opcode; @@ -10732,8 +11138,8 @@ bnx2_service_netq_kcqes(struct bnx2_napi *bnapi, int num_cqes) } if (kcqe_layer != L2_KCQE_FLAGS_LAYER_MASK_L2) { - printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n", - bp->dev->name, kcqe_op_flag); + netdev_err(bp->dev, "Unknown type of KCQE(0x%x)\n", + kcqe_op_flag); goto end; } @@ -10945,19 +11351,17 @@ bnx2_open_netqueue_hw(struct bnx2 *bp) err = bnx2_netqueue_alloc_resc(bp); if (err != 0) { - printk(KERN_ERR "%s: Couldn't allocate netq resources\n", - bp->dev->name); + netdev_err(bp->dev, "Couldn't allocate netq resources\n"); return err; } bnx2_init_netqueue_hw(bp); bnx2_start_netqueue_hw(bp); - bp->netq_state |= BNX2_NETQ_HW_STARTED; + bp->netq_state |= BNX2_NETQ_HW_OPENED; wmb(); - printk(KERN_INFO "%s: NetQueue hardware support is enabled\n", - bp->dev->name); + netdev_info(bp->dev, "NetQueue hardware support is enabled\n"); return 0; } @@ -10985,20 +11389,20 @@ bnx2_netq_get_queue_count(vmknetddi_queueop_get_queue_count_args_t *args) if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { args->count = max_t(u16, bp->num_rx_rings - 1, 0); - printk(KERN_INFO "%s: Using %d RX NetQ rings\n", - args->netdev->name, args->count); + netdev_info(args->netdev, "Using %d RX NetQ rings\n", + args->count); return VMKNETDDI_QUEUEOPS_OK; } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { args->count = max_t(u16, bp->num_tx_rings - 1, 0); - printk(KERN_INFO "%s: Using %d TX NetQ rings\n", - args->netdev->name, args->count); + netdev_info(args->netdev, "Using %d TX NetQ rings\n", + args->count); return VMKNETDDI_QUEUEOPS_OK; } else { - printk(KERN_ERR "%s: Counting queue: invalid queue type\n", - bp->dev->name); + netdev_err(args->netdev, "queue count: invalid queue type " + "0x%x\n", args->type); return VMKNETDDI_QUEUEOPS_ERR; } } @@ -11014,16 +11418,18 @@ bnx2_netq_get_filter_count(vmknetddi_queueop_get_filter_count_args_t *args) static int bnx2_netq_alloc_rx_queue(struct bnx2 *bp, struct bnx2_napi *bnapi, - int queue_id) + int index) { /* We need to count the default ring as part of the number of RX rings avaliable */ - if (bp->n_rx_queues_allocated >= (bp->num_rx_rings - 1)) + if (bp->n_rx_queues_allocated >= (bp->num_rx_rings - 1)) { + netdev_warn(bp->dev, "Unable to allocate RX NetQueue n_rx_queues_allocated(%d) >= Num NetQ's(%d)\n", + bp->n_rx_queues_allocated, (bp->num_rx_rings - 1)); return VMKNETDDI_QUEUEOPS_ERR; + } if((bp->netq_state & BNX2_NETQ_HW_STARTED) != BNX2_NETQ_HW_STARTED) { - printk(KERN_INFO "%s: NetQueue hardware not running yet\n", - bp->dev->name); + netdev_warn(bp->dev, "NetQueue hardware not running\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11031,29 +11437,18 @@ bnx2_netq_alloc_rx_queue(struct bnx2 *bp, int rc; struct l2_kwqe_vm_alloc_rx_queue kwqe_alloc_rx; - /* Ensure that the NetQueue is freed */ - rc = bnx2_netq_free_rx_queue_update(bp->dev, queue_id, 1); - if(rc == VMKNETDDI_QUEUEOPS_ERR) { - printk(KERN_ERR "%s: Couldn't clean/free RX " - "queue during RX alloc\n", - bp->dev->name); - - return VMKNETDDI_QUEUEOPS_ERR; - } - /* Prepare the kwqe to be passed to the firmware */ memset(&kwqe_alloc_rx, 0, sizeof(kwqe_alloc_rx)); - kwqe_alloc_rx.kwqe_flags = KWQE_FLAGS_LAYER_MASK_L2; + kwqe_alloc_rx.kwqe_flags = L2_KWQE_FLAGS_LAYER_MASK_L2; kwqe_alloc_rx.kwqe_opcode = L2_KWQE_OPCODE_VALUE_VM_ALLOC_RX_QUEUE; kwqe_alloc_rx.queue_type = L2_NET_QUEUE; - kwqe_alloc_rx.qid = queue_id; + kwqe_alloc_rx.qid = BNX2_DRV_TO_FW_QUEUE_ID(index); rc = bnx2_netqueue_submit_kwqes(bp, (struct l2_kwqe *)&kwqe_alloc_rx); if (rc != 0) { - printk(KERN_ERR "%s: Couldn't submit alloc rx kwqe\n", - bp->dev->name); + netdev_err(bp->dev, "Couldn't submit alloc rx kwqe\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11067,19 +11462,18 @@ bnx2_netq_alloc_rx_queue(struct bnx2 *bp, if (rc != 0) { bnapi->rx_queue_allocated = TRUE; - printk(KERN_INFO "%s: RX NetQ allocated on %d\n", - bp->dev->name, kwqe_alloc_rx.qid); + netdev_info(bp->dev, "RX NetQ allocated on %d\n", + index); return VMKNETDDI_QUEUEOPS_OK; } else { - printk(KERN_INFO "%s: Timeout RX NetQ allocate on %d\n", - bp->dev->name, kwqe_alloc_rx.qid); + netdev_info(bp->dev, "Timeout RX NetQ allocate on %d\n", + index); return VMKNETDDI_QUEUEOPS_ERR; } } - printk(KERN_ERR "%s: No RX NetQueues already allocated!\n", - bp->dev->name); + netdev_info(bp->dev, "No RX NetQueues avaliable!\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11088,25 +11482,27 @@ bnx2_netq_alloc_rx_queue_vmk(struct net_device *netdev, vmknetddi_queueops_queueid_t *p_qid, struct napi_struct **napi_p) { - int i; + int index; struct bnx2 *bp = netdev_priv(netdev); /* We need to count the default ring as part of the number of RX rings avaliable */ - if (bp->n_rx_queues_allocated >= (bp->num_rx_rings - 1)) + if (bp->n_rx_queues_allocated >= (bp->num_rx_rings - 1)) { + netdev_warn(bp->dev, "Unable to allocate RX NetQueue n_rx_queues_allocated(%d) >= Num NetQ's(%d)\n", + bp->n_rx_queues_allocated, (bp->num_rx_rings - 1)); return VMKNETDDI_QUEUEOPS_ERR; + } - for_each_nondefault_rx_queue(bp, i) { - struct bnx2_napi *bnapi = &bp->bnx2_napi[i]; + for_each_nondefault_rx_queue(bp, index) { + struct bnx2_napi *bnapi = &bp->bnx2_napi[index]; if (!bnapi->rx_queue_allocated) { - int queue_id = i - 1; int rc; - rc = bnx2_netq_alloc_rx_queue(bp, bnapi, queue_id); + rc = bnx2_netq_alloc_rx_queue(bp, bnapi, index); if (rc == VMKNETDDI_QUEUEOPS_OK) { bp->n_rx_queues_allocated++; - *p_qid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(queue_id); + *p_qid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(index); *napi_p = &bnapi->napi; return VMKNETDDI_QUEUEOPS_OK; @@ -11115,7 +11511,7 @@ bnx2_netq_alloc_rx_queue_vmk(struct net_device *netdev, } } - printk(KERN_ERR "%s: No free RX NetQueues found!\n", bp->dev->name); + netdev_err(bp->dev, "No free RX NetQueues found!\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11123,7 +11519,7 @@ bnx2_netq_alloc_rx_queue_vmk(struct net_device *netdev, static int bnx2_netq_alloc_tx_queue(struct bnx2 *bp, struct bnx2_napi *bnapi, - int queue_id) + int index) { if (bp->n_tx_queues_allocated >= (bp->num_tx_rings - 1)) return VMKNETDDI_QUEUEOPS_ERR; @@ -11132,12 +11528,10 @@ bnx2_netq_alloc_tx_queue(struct bnx2 *bp, bnapi->tx_queue_allocated = TRUE; bp->n_tx_queues_allocated++; - printk(KERN_INFO "%s: TX NetQ allocated on %d\n", - bp->dev->name, queue_id); + netdev_info(bp->dev, "TX NetQ allocated on %d\n", index); return VMKNETDDI_QUEUEOPS_OK; } - printk(KERN_ERR "%s: tx queue already allocated!\n", - bp->dev->name); + netdev_err(bp->dev, "tx queue already allocated!\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11146,26 +11540,25 @@ bnx2_netq_alloc_tx_queue_vmk(struct net_device *netdev, vmknetddi_queueops_queueid_t *p_qid, u16 *queue_mapping) { - int i; + int index; struct bnx2 *bp = netdev_priv(netdev); if (bp->n_tx_queues_allocated >= (bp->num_tx_rings - 1)) return VMKNETDDI_QUEUEOPS_ERR; - for_each_nondefault_tx_queue(bp, i) { - struct bnx2_napi *bnapi = &bp->bnx2_napi[i]; + for_each_nondefault_tx_queue(bp, index) { + struct bnx2_napi *bnapi = &bp->bnx2_napi[index]; if (!bnapi->tx_queue_allocated) { - int rc = bnx2_netq_alloc_tx_queue(bp, bnapi, i); + int rc = bnx2_netq_alloc_tx_queue(bp, bnapi, index); - *p_qid = VMKNETDDI_QUEUEOPS_MK_TX_QUEUEID(i); - *queue_mapping = i; + *p_qid = VMKNETDDI_QUEUEOPS_MK_TX_QUEUEID(index); + *queue_mapping = index; return rc; } } - printk(KERN_ERR "%s: no free tx queues found!\n", - bp->dev->name); + netdev_err(bp->dev, "no free tx queues found!\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11176,15 +11569,13 @@ bnx2_netq_alloc_queue(vmknetddi_queueop_alloc_queue_args_t *args) struct bnx2 *bp = netdev_priv(netdev); if(bp->reset_failed == 1) { - printk(KERN_ERR "%s: Trying to alloc NetQueue on failed reset " - "device\n", - netdev->name); + netdev_err(bp->dev, "Trying to alloc NetQueue on failed reset " + "device\n"); return VMKNETDDI_QUEUEOPS_ERR; } - if(bnx2_netqueue_open_started(bp)) { - printk(KERN_INFO "%s: NetQueue hardware not running yet\n", - bp->dev->name); + if (!bnx2_netqueue_open_started(bp)) { + netdev_warn(bp->dev, "NetQueue hardware not running yet\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11197,8 +11588,8 @@ bnx2_netq_alloc_queue(vmknetddi_queueop_alloc_queue_args_t *args) &args->queueid, &args->napi); } else { - printk(KERN_ERR "%s: Trying to alloc invalid queue type: %x\n", - bp->dev->name, args->type); + netdev_err(bp->dev, "Trying to alloc invalid queue type: %x\n", + args->type); return VMKNETDDI_QUEUEOPS_ERR; } } @@ -11221,16 +11612,14 @@ bnx2_netq_free_tx_queue(struct net_device *netdev, bnapi->tx_queue_allocated = FALSE; bp->n_tx_queues_allocated--; - printk(KERN_INFO "%s: Free NetQ TX Queue: %x\n", - bp->dev->name, index); + netdev_info(bp->dev, "Free NetQ TX Queue: 0x%x\n", index); return VMKNETDDI_QUEUEOPS_OK; } static int -bnx2_netq_free_rx_queue_update(struct net_device *netdev, - int index, - int force) +bnx2_netq_free_rx_queue(struct net_device *netdev, + int index) { int rc; struct bnx2 *bp = netdev_priv(netdev); @@ -11238,39 +11627,36 @@ bnx2_netq_free_rx_queue_update(struct net_device *netdev, struct l2_kwqe_vm_free_rx_queue kwqe_free_rx; if (index > bp->num_rx_rings) { - printk(KERN_INFO "%s: Error Free NetQ RX Queue: " - "index(%d) > bp->num_rx_rings(%d)\n", - bp->dev->name, index, bp->num_rx_rings); + netdev_err(bp->dev, "Error Free NetQ RX Queue: " + "index(%d) > bp->num_rx_rings(%d)\n", + index, bp->num_rx_rings); return VMKNETDDI_QUEUEOPS_ERR; } - if(bnx2_netqueue_open_started(bp)) { - printk(KERN_INFO "%s: NetQueue hardware not running yet\n", - bp->dev->name); + if (!bnx2_netqueue_open_started(bp)) { + netdev_warn(bp->dev, "NetQueue hardware not running yet\n"); return VMKNETDDI_QUEUEOPS_ERR; } bnapi = &bp->bnx2_napi[index]; - if ((bnapi->rx_queue_allocated != TRUE) && (force == 0)) { - printk(KERN_INFO "%s: Error Free NetQ RX Queue %d " - "already freed\n", - bp->dev->name, index); + if (bnapi->rx_queue_allocated != TRUE) { + netdev_warn(bp->dev, "NetQ RX Queue %d already freed\n", index); return VMKNETDDI_QUEUEOPS_OK; } memset(&kwqe_free_rx, 0, sizeof(kwqe_free_rx)); - kwqe_free_rx.flags = KWQE_FLAGS_LAYER_MASK_L2; + kwqe_free_rx.flags = L2_KWQE_FLAGS_LAYER_MASK_L2; kwqe_free_rx.opcode = L2_KWQE_OPCODE_VALUE_VM_FREE_RX_QUEUE; - kwqe_free_rx.qid = index; + kwqe_free_rx.qid = BNX2_DRV_TO_FW_QUEUE_ID(index); + kwqe_free_rx.queue_type = L2_NET_QUEUE; rc = bnx2_netqueue_submit_kwqes(bp, (struct l2_kwqe *) &kwqe_free_rx); if (rc != 0) { - printk(KERN_ERR "%s: Couldn't submit free rx kwqe\n", - bp->dev->name); + netdev_err(bp->dev, "Couldn't submit free rx kwqe\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11283,56 +11669,42 @@ bnx2_netq_free_rx_queue_update(struct net_device *netdev, BNX2_NETQ_WAIT_EVENT_TIMEOUT); if (rc != 0) { bnapi->rx_queue_allocated = FALSE; + bp->n_rx_queues_allocated--; - if(force != 1) - bp->n_rx_queues_allocated--; - - printk(KERN_INFO "%s: Free NetQ RX Queue (forced: %d): %x\n", - bp->dev->name, force, index); + netdev_info(bp->dev, "Free NetQ RX Queue %d\n", index); return VMKNETDDI_QUEUEOPS_OK; } else { - printk(KERN_INFO "%s: Timeout free NetQ RX Queue " - "(force: %d): %x\n", - bp->dev->name, force, index); + netdev_err(bp->dev, "Timeout free NetQ RX Queue %d\n", index); return VMKNETDDI_QUEUEOPS_ERR; } } -static int -bnx2_netq_free_rx_queue(struct net_device *netdev, - vmknetddi_queueops_queueid_t qid) -{ - return bnx2_netq_free_rx_queue_update(netdev, - VMKNETDDI_QUEUEOPS_QUEUEID_VAL(qid), 0); -} - static int bnx2_netq_free_queue(vmknetddi_queueop_free_queue_args_t *args) { struct bnx2 *bp = netdev_priv(args->netdev); if(bp->reset_failed == 1) { - printk(KERN_ERR "%s: Trying to free NetQueue on failed reset " - "device\n", - args->netdev->name); + netdev_err(bp->dev, "Trying to free NetQueue on failed reset " + "device\n"); return VMKNETDDI_QUEUEOPS_ERR; } - if(bnx2_netqueue_open_started(bp)) { - printk(KERN_INFO "%s: NetQueue hardware not running yet\n", - bp->dev->name); + if (!bnx2_netqueue_open_started(bp)) { + netdev_warn(bp->dev, "NetQueue hardware not running yet\n"); return VMKNETDDI_QUEUEOPS_ERR; } if (VMKNETDDI_QUEUEOPS_IS_TX_QUEUEID(args->queueid)) { return bnx2_netq_free_tx_queue(args->netdev, args->queueid); } else if (VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID(args->queueid)) { - return bnx2_netq_free_rx_queue(args->netdev, args->queueid); + return bnx2_netq_free_rx_queue(args->netdev, + VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid)); } else { - printk(KERN_ERR "%s: free netq: invalid queue type\n", - args->netdev->name); + netdev_err(bp->dev, "free netq: invalid queue type: 0x%x\n", + args->queueid); return VMKNETDDI_QUEUEOPS_ERR; } } @@ -11370,46 +11742,45 @@ bnx2_netq_get_default_queue(vmknetddi_queueop_get_default_queue_args_t *args) } static int -bnx2_netq_remove_rx_filter(struct bnx2 *bp, int qid) +bnx2_netq_remove_rx_filter(struct bnx2 *bp, int index) { - u16 fw_qid = qid; + u16 fw_qid = BNX2_DRV_TO_FW_QUEUE_ID(index); struct bnx2_napi *bnapi; struct l2_kwqe_vm_remove_rx_filter kwqe_remove_rx_filter; int rc; if(bp->reset_failed == 1) { - printk(KERN_ERR "%s: Trying to remove RX filter NetQueue on " - "failed reset device\n", - bp->dev->name); + netdev_err(bp->dev, "Trying to remove RX filter NetQueue on " + "failed reset device\n"); return VMKNETDDI_QUEUEOPS_ERR; } - if(bnx2_netqueue_open_started(bp)) { - printk(KERN_INFO "%s: NetQueue hardware not running yet\n", - bp->dev->name); + if (!bnx2_netqueue_open_started(bp)) { + netdev_err(bp->dev, "NetQueue hardware not running yet\n"); return VMKNETDDI_QUEUEOPS_ERR; } - bnapi = &bp->bnx2_napi[qid + 1]; + bnapi = &bp->bnx2_napi[index]; - if (qid > bp->num_rx_rings) { - printk(KERN_INFO "%s: Free RX Filter NetQ: failed " - "qid(%d) > bp->num_rx_rings(%d)\n", - bp->dev->name, qid, bp->num_rx_rings); + if (fw_qid > bp->num_rx_rings) { + netdev_info(bp->dev, "Free RX Filter NetQ: failed " + "qid(%d) > bp->num_rx_rings(%d)\n", + index, bp->num_rx_rings); return VMKNETDDI_QUEUEOPS_ERR; } memset(&kwqe_remove_rx_filter, 0, sizeof(kwqe_remove_rx_filter)); - kwqe_remove_rx_filter.flags = KWQE_FLAGS_LAYER_MASK_L2; + kwqe_remove_rx_filter.flags = L2_KWQE_FLAGS_LAYER_MASK_L2; kwqe_remove_rx_filter.opcode = L2_KWQE_OPCODE_VALUE_VM_REMOVE_RX_FILTER; kwqe_remove_rx_filter.filter_type = L2_VM_FILTER_MAC; kwqe_remove_rx_filter.qid = fw_qid; + kwqe_remove_rx_filter.filter_id = fw_qid + BNX2_START_FILTER_ID; rc = bnx2_netqueue_submit_kwqes(bp, (struct l2_kwqe *) &kwqe_remove_rx_filter); if (rc != 0) { - printk(KERN_ERR "Couldn't submit rx filter kwqe\n"); + netdev_err(bp->dev, "Couldn't submit rx filter kwqe\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11423,13 +11794,12 @@ bnx2_netq_remove_rx_filter(struct bnx2 *bp, int qid) bnapi->rx_queue_active = FALSE; bnapi->netq_state &= ~BNX2_NETQ_RX_FILTER_APPLIED; - printk(KERN_INFO "%s: NetQ remove RX filter: %d\n", - bp->dev->name, qid); + netdev_info(bp->dev, "NetQ remove RX filter: %d\n", index); return VMKNETDDI_QUEUEOPS_OK; } else { - printk(KERN_INFO "%s: Timeout NetQ remove RX filter: %d\n", - bp->dev->name, qid); + netdev_warn(bp->dev, "Timeout NetQ remove RX filter: %d\n", + index); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11439,76 +11809,71 @@ static int bnx2_netq_remove_rx_filter_vmk(vmknetddi_queueop_remove_rx_filter_args_t *args) { struct bnx2 *bp = netdev_priv(args->netdev); - u16 qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); + u16 index = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); struct bnx2_napi *bnapi; - if(bp->reset_failed == 1) { - printk(KERN_ERR "%s: Trying to remove RX filter NetQueue on " - "failed reset device\n", - args->netdev->name); + if (bp->reset_failed == 1) { + netdev_err(bp->dev, "Trying to remove RX filter NetQueue on " + "failed reset device\n"); return VMKNETDDI_QUEUEOPS_ERR; } - if(bnx2_netqueue_open_started(bp)) { - printk(KERN_INFO "%s: NetQueue hardware not running yet\n", - bp->dev->name); + if (!bnx2_netqueue_open_started(bp)) { + netdev_warn(bp->dev, "NetQueue hardware not running yet\n"); return VMKNETDDI_QUEUEOPS_ERR; } - bnapi = &bp->bnx2_napi[qid + 1]; + bnapi = &bp->bnx2_napi[index]; if (!VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID(args->queueid)) { - printk(KERN_INFO "%s: !VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID: " - "qid: %d)\n", - bp->dev->name, qid); + netdev_err(bp->dev, "!VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID: " + "qid: %d)\n", index); return VMKNETDDI_QUEUEOPS_ERR; } - if (qid > bp->num_rx_rings) { - printk(KERN_INFO "%s: qid(%d) > bp->num_rx_rings(%d)\n", - bp->dev->name, qid, bp->num_rx_rings); + if (index > bp->num_rx_rings) { + netdev_err(bp->dev, "qid(%d) > bp->num_rx_rings(%d)\n", + index, bp->num_rx_rings); return VMKNETDDI_QUEUEOPS_ERR; } /* Only support one Mac filter per queue */ if (bnapi->rx_queue_active == 0) { - printk(KERN_INFO "%s: bnapi->rx_queue_active(%d) == 0\n", - bp->dev->name, bnapi->rx_queue_active); + netdev_info(bp->dev, "bnapi->rx_queue_active(%d) == 0\n", + bnapi->rx_queue_active); return VMKNETDDI_QUEUEOPS_ERR; } - return bnx2_netq_remove_rx_filter(bp, qid); + return bnx2_netq_remove_rx_filter(bp, index); } static int bnx2_netq_apply_rx_filter(struct bnx2 *bp, struct bnx2_napi *bnapi, - int queueid) + int index) { - u16 fw_queueid = queueid; + u16 fw_queueid = BNX2_DRV_TO_FW_QUEUE_ID(index); struct l2_kwqe_vm_set_rx_filter kwqe_set_rx_filter; int rc; DECLARE_MAC_BUF(mac); - if(bp->reset_failed == 1) { - printk(KERN_ERR "%s: Trying to apply RX filter NetQueue on " - "failed reset device\n", - bp->dev->name); + if (bp->reset_failed == 1) { + netdev_err(bp->dev, "Trying to apply RX filter NetQueue on %d" + "failed reset device\n", index); return VMKNETDDI_QUEUEOPS_ERR; } - if(bnx2_netqueue_open_started(bp)) { - printk(KERN_INFO "%s: NetQueue hardware not running yet\n", - bp->dev->name); + if (!bnx2_netqueue_open_started(bp)) { + netdev_warn(bp->dev, "NetQueue hardware not running yet\n"); return VMKNETDDI_QUEUEOPS_ERR; } if (bnapi->rx_queue_active == TRUE || !bnapi->rx_queue_allocated) { - printk(KERN_ERR "%s: apply filter: RX NetQ %d already active" + netdev_err(bp->dev, "apply filter: RX NetQ %d already active" "bnapi->rx_queue_active(%d) || " "!bnapi->rx_queue_allocated(%d)\n", - bp->dev->name, queueid, bnapi->rx_queue_active, - bnapi->rx_queue_allocated); + index, bnapi->rx_queue_active, + bnapi->rx_queue_allocated); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11516,10 +11881,11 @@ bnx2_netq_apply_rx_filter(struct bnx2 *bp, struct bnx2_napi *bnapi, fw_queueid + QID_TO_PM_OFFSET); - memset(&kwqe_set_rx_filter, 0, sizeof(&kwqe_set_rx_filter)); + memset(&kwqe_set_rx_filter, 0, sizeof(kwqe_set_rx_filter)); - kwqe_set_rx_filter.flags = KWQE_FLAGS_LAYER_MASK_L2; + kwqe_set_rx_filter.flags = L2_KWQE_FLAGS_LAYER_MASK_L2; kwqe_set_rx_filter.opcode = L2_KWQE_OPCODE_VALUE_VM_SET_RX_FILTER; + kwqe_set_rx_filter.filter_id = fw_queueid + BNX2_START_FILTER_ID; #if defined(__LITTLE_ENDIAN) memcpy(&kwqe_set_rx_filter.mac_addr_hi, bnapi->mac_filter_addr, 2); @@ -11539,7 +11905,7 @@ bnx2_netq_apply_rx_filter(struct bnx2 *bp, struct bnx2_napi *bnapi, rc = bnx2_netqueue_submit_kwqes(bp, (struct l2_kwqe *) &kwqe_set_rx_filter); if (rc != 0) { - printk(KERN_ERR "Couldn't submit rx filter kwqe\n"); + netdev_err(bp->dev, "Couldn't submit rx filter kwqe\n"); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11554,16 +11920,15 @@ bnx2_netq_apply_rx_filter(struct bnx2 *bp, struct bnx2_napi *bnapi, bnapi->rx_queue_active = TRUE; bnapi->netq_state |= BNX2_NETQ_RX_FILTER_APPLIED; - printk(KERN_INFO "%s: NetQ set RX Filter: %d [%s %d]\n", - bp->dev->name, - queueid, print_mac(mac, bnapi->mac_filter_addr), - bnapi->vlan_id); + netdev_info(bp->dev, "NetQ set RX Filter: %d [%s %d]\n", + index, print_mac(mac, bnapi->mac_filter_addr), + bnapi->vlan_id); return VMKNETDDI_QUEUEOPS_OK; } else { - printk(KERN_INFO "%s: Timeout submitting NetQ set RX Filter: %d [%s]\n", - bp->dev->name, queueid, - print_mac(mac, bnapi->mac_filter_addr)); + netdev_info(bp->dev, "Timeout submitting NetQ set RX Filter: " + "%d [%s]\n", + index, print_mac(mac, bnapi->mac_filter_addr)); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11575,47 +11940,43 @@ bnx2_netq_apply_rx_filter_vmk(vmknetddi_queueop_apply_rx_filter_args_t *args) u8 *macaddr; struct bnx2_napi *bnapi; struct bnx2 *bp = netdev_priv(args->netdev); - u16 queueid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); + u16 index = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); vmknetddi_queueops_filter_class_t class; DECLARE_MAC_BUF(mac); - if(bp->reset_failed == 1) { - printk(KERN_ERR "%s: Trying to apply RX filter NetQueue on " - "failed reset device\n", - args->netdev->name); + if (bp->reset_failed == 1) { + netdev_err(bp->dev, "Trying to apply RX filter NetQueue on %d" + "failed reset device\n", index); return VMKNETDDI_QUEUEOPS_ERR; } - if(bnx2_netqueue_open_started(bp)) { - printk(KERN_INFO "%s: NetQueue hardware not running yet\n", - bp->dev->name); + if (!bnx2_netqueue_open_started(bp)) { + netdev_warn(bp->dev, "NetQueue hardware not running yet\n"); return VMKNETDDI_QUEUEOPS_ERR; } if (!VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID(args->queueid)) { - printk(KERN_ERR "%s: invalid NetQ RX ID: %x\n", - args->netdev->name, args->queueid); + netdev_err(bp->dev, "invalid NetQ RX ID: %x\n", args->queueid); return VMKNETDDI_QUEUEOPS_ERR; } class = vmknetddi_queueops_get_filter_class(&args->filter); if ((class != VMKNETDDI_QUEUEOPS_FILTER_MACADDR) && (class != VMKNETDDI_QUEUEOPS_FILTER_VLANMACADDR)) { - printk(KERN_ERR "%s: recieved invalid RX NetQ filter: %x\n", - args->netdev->name, class); + netdev_err(bp->dev, "recieved invalid RX NetQ filter: %x\n", + class); return VMKNETDDI_QUEUEOPS_ERR; } - if (queueid > bp->num_rx_rings) { - printk(KERN_ERR "%s: applying filter with invalid RX NetQ %d ID\n", - args->netdev->name, queueid); + if (index > bp->num_rx_rings) { + netdev_err(bp->dev, "applying filter with invalid " + "RX NetQ %d ID\n", index); return VMKNETDDI_QUEUEOPS_ERR; } - bnapi = &bp->bnx2_napi[queueid + 1]; + bnapi = &bp->bnx2_napi[index]; if (bnapi->rx_queue_active || !bnapi->rx_queue_allocated) { - printk(KERN_ERR "%s: RX NetQ %d already active\n", - args->netdev->name, queueid); + netdev_err(bp->dev, "RX NetQ %d already active\n", index); return VMKNETDDI_QUEUEOPS_ERR; } @@ -11625,19 +11986,19 @@ bnx2_netq_apply_rx_filter_vmk(vmknetddi_queueop_apply_rx_filter_args_t *args) bnapi->class = class; /* Apply RX filter code here */ - args->filterid = VMKNETDDI_QUEUEOPS_MK_FILTERID(queueid); + args->filterid = VMKNETDDI_QUEUEOPS_MK_FILTERID(index); - return bnx2_netq_apply_rx_filter(bp, bnapi, queueid); + return bnx2_netq_apply_rx_filter(bp, bnapi, index); } static int bnx2_netq_get_queue_stats(vmknetddi_queueop_get_stats_args_t *args) { - u16 queueid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); + u16 index = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); struct bnx2_napi *bnapi; struct bnx2 *bp = netdev_priv(args->netdev); - bnapi = &bp->bnx2_napi[queueid]; + bnapi = &bp->bnx2_napi[index]; args->stats = &bnapi->stats; @@ -11653,49 +12014,50 @@ bnx2_netq_get_netqueue_version(vmknetddi_queueop_get_version_args_t *args) static void bnx2_netqueue_flush_all(struct bnx2 *bp) { - int i; + int index; u16 num_tx = 0, num_rx = 0; - printk(KERN_INFO PFX "%s: Flushing NetQueues\n", bp->dev->name); + netdev_info(bp->dev, "Flushing NetQueues\n"); - for_each_nondefault_rx_queue(bp, i) { - struct bnx2_napi *bnapi = &bp->bnx2_napi[i]; + mutex_lock(&bp->netq_lock); + + for_each_nondefault_rx_queue(bp, index) { + struct bnx2_napi *bnapi = &bp->bnx2_napi[index]; if(bnapi->netq_state & BNX2_NETQ_RX_FILTER_APPLIED) { - int rc = bnx2_netq_remove_rx_filter(bp, i); + int rc = bnx2_netq_remove_rx_filter(bp, index); if (rc == VMKNETDDI_QUEUEOPS_ERR) { - printk(KERN_ERR PFX "%s: could not remove RX " - "filter during flush\n", - bp->dev->name); + netdev_err(bp->dev, "could not remove RX " + "filter during flush\n"); } if(bnapi->rx_queue_allocated == TRUE) { - rc = bnx2_netq_free_rx_queue_update(bp->dev, - i, 1); + rc = bnx2_netq_free_rx_queue(bp->dev, index); if (rc == VMKNETDDI_QUEUEOPS_OK) { num_rx++; } else { - printk(KERN_ERR PFX "%s: could " - "not free RX " - "queue during flush\n", - bp->dev->name); + netdev_err(bp->dev, "couldn't free RX " + "queue %d during " + "flush\n", index); } } } } - for_each_nondefault_tx_queue(bp, i) { - struct bnx2_napi *bnapi = &bp->bnx2_napi[i]; + for_each_nondefault_tx_queue(bp, index) { + struct bnx2_napi *bnapi = &bp->bnx2_napi[index]; if(bnapi->tx_queue_allocated == TRUE) { - bnx2_netq_free_tx_queue(bp->dev, i); + bnx2_netq_free_tx_queue(bp->dev, index); } num_tx++; } - printk(KERN_ERR PFX "%s: finished saving NetQueues: rx: %d tx: %d\n", - bp->dev->name, num_rx, num_tx); + mutex_unlock(&bp->netq_lock); + + netdev_info(bp->dev, "Flushed NetQueues: rx: %d tx: %d\n", + num_rx, num_tx); } @@ -11714,6 +12076,7 @@ bnx2_netqueue_ops(vmknetddi_queueops_op_t op, void *args) if (!bnx2_netqueue_is_avail(bp)) return VMKNETDDI_QUEUEOPS_ERR; + mutex_lock(&bp->netq_lock); switch (op) { case VMKNETDDI_QUEUEOPS_OP_GET_FEATURES: @@ -11771,12 +12134,497 @@ bnx2_netqueue_ops(vmknetddi_queueops_op_t op, void *args) rc = VMKNETDDI_QUEUEOPS_ERR; break; +#if (VMWARE_ESX_DDK_VERSION >= 41000) + case VMKNETDDI_QUEUEOPS_OP_ALLOC_QUEUE_WITH_ATTR: + rc = VMKNETDDI_QUEUEOPS_ERR; + break; + + case VMKNETDDI_QUEUEOPS_OP_GET_SUPPORTED_FEAT: + rc = VMKNETDDI_QUEUEOPS_ERR; + break; +#if (VMWARE_ESX_DDK_VERSION >= 50000) + case VMKNETDDI_QUEUEOPS_OP_GET_SUPPORTED_FILTER_CLASS: + rc = VMKNETDDI_QUEUEOPS_ERR; + break; +#endif +#endif default: - printk(KERN_WARNING "Unhandled NETQUEUE OP %d\n", op); + netdev_warn(bp->dev, "Unhandled NETQUEUE OP %d\n", op); rc = VMKNETDDI_QUEUEOPS_ERR; } + mutex_unlock(&bp->netq_lock); + return rc; } #endif /* defined(BNX2_ENABLE_NETQUEUE) */ +#if defined(__VMKLNX__) +#if (VMWARE_ESX_DDK_VERSION >= 55000) +static void +bnx2_dump(struct bnx2 *bp, u32 reg_offset, u32 *dest_addr, u32 word_cnt) +{ + u32 *dst = dest_addr; + u32 i; + + for (i = 0; i < word_cnt; i++) { + *dst++ = REG_RD(bp, reg_offset); + reg_offset += 4; + } +} + +static void +bnx2_dump_ind(struct bnx2 *bp, u32 reg_offset, u32 *dest_addr, u32 word_cnt) +{ + u32 *dst = dest_addr; + u32 i; + + for (i = 0; i < word_cnt; i++) { + *dst++ = bnx2_reg_rd_ind(bp, reg_offset); + reg_offset += 4; + } +} + +#define BNX2_CPU_ENTRY(offset, size) { offset, size } +static const struct cpu_data_reg { + u32 off; + u32 size; +} cpu_arr[] = { + BNX2_CPU_ENTRY(0, 3), + BNX2_CPU_ENTRY(0x1c, 8), + BNX2_CPU_ENTRY(0x48, 1), + BNX2_CPU_ENTRY(0x200, 32), +}; + +static u32 * +dump_cpu_state(struct bnx2 *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 reg, i; + u32 cpu_size = 0; + + if (dmp->fw_hdr.dmp_size >= BNX2_FWDMP_SIZE) + return dst; + for (reg = BNX2_TXP_CPU_MODE; reg <= BNX2_CP_CPU_MODE; reg += 0x40000) { + /* make sure these are 64-bit align */ + for (i = 0; i < ARRAY_SIZE(cpu_arr); i++) + cpu_size += cpu_arr[i].size * 4; + } + if ((dmp->fw_hdr.dmp_size + cpu_size + BNX2_FWDMP_MARKER_SZ) > + BNX2_FWDMP_SIZE) + return dst; + *dst++ = BNX2_FWDMP_MARKER; + *dst++ = 0; + *dst++ = BNX2_FWDMP_CPU_DUMP; + *dst++ = cpu_size; + for (reg = BNX2_TXP_CPU_MODE; reg <= BNX2_CP_CPU_MODE; reg += 0x40000) { + /* make sure these are 64-bit align */ + for (i = 0; i < ARRAY_SIZE(cpu_arr); i++) { + bnx2_dump_ind(bp, reg + cpu_arr[i].off, + dst, cpu_arr[i].size); + dst += cpu_arr[i].size; + } + } + *dst++ = BNX2_FWDMP_MARKER_END; + dmp->fw_hdr.dmp_size += cpu_size + BNX2_FWDMP_MARKER_SZ; + + return dst; +} + +#define BNX2_FTQ_DATA_ENTRY(offset, cmdoff, size, dataoff) { BNX2_##offset, \ + BNX2_##cmdoff, \ + size, \ + BNX2_##dataoff } +static const struct ftq_data_reg { + u32 off; + u32 cmdoff; + u32 size; + u32 dataoff; +} ftq_data_arr[] = { + BNX2_FTQ_DATA_ENTRY(TSCH_FTQ_CMD, + TSCH_FTQ_CMD_RD_DATA, + 2, TSCH_TSCHQ), + BNX2_FTQ_DATA_ENTRY(TBDR_FTQ_CMD, + TBDR_FTQ_CMD_RD_DATA, + 5, TBDR_TBDRQ), + BNX2_FTQ_DATA_ENTRY(TXP_FTQ_CMD, + TXP_FTQ_CMD_RD_DATA, + 5, TXP_TXPQ), + BNX2_FTQ_DATA_ENTRY(TDMA_FTQ_CMD, + TDMA_FTQ_CMD_RD_DATA, + 12, TDMA_TDMAQ), + BNX2_FTQ_DATA_ENTRY(TPAT_FTQ_CMD, + TPAT_FTQ_CMD_RD_DATA, + 5, TPAT_TPATQ), + BNX2_FTQ_DATA_ENTRY(TAS_FTQ_CMD, + TAS_FTQ_CMD_RD_DATA, + 4, TPAT_TPATQ), + BNX2_FTQ_DATA_ENTRY(RLUP_FTQ_COMMAND, + RLUP_FTQ_CMD_RD_DATA, + 30, RLUP_RLUPQ), + BNX2_FTQ_DATA_ENTRY(RXP_FTQ_CMD, + RXP_FTQ_CMD_RD_DATA, + 13, RXP_RXPQ), + BNX2_FTQ_DATA_ENTRY(RXP_CFTQ_CMD, + RXP_CFTQ_CMD_RD_DATA, + 4, RXP_RXPCQ), + BNX2_FTQ_DATA_ENTRY(RV2P_MFTQ_CMD, + RV2P_MFTQ_CMD_RD_DATA, + 1, RV2P_RV2PMQ), + BNX2_FTQ_DATA_ENTRY(RV2P_TFTQ_CMD, + RV2P_TFTQ_CMD_RD_DATA, + 1, RV2P_RV2PTQ), + BNX2_FTQ_DATA_ENTRY(RV2P_PFTQ_CMD, + RV2P_PFTQ_CMD_RD_DATA, + 13, RV2P_RV2PPQ), + BNX2_FTQ_DATA_ENTRY(RDMA_FTQ_COMMAND, + RDMA_FTQ_CMD_RD_DATA, + 13, RDMA_RDMAQ), + BNX2_FTQ_DATA_ENTRY(COM_COMQ_FTQ_CMD, + COM_COMQ_FTQ_CMD_RD_DATA, + 10, COM_COMQ), + BNX2_FTQ_DATA_ENTRY(COM_COMTQ_FTQ_CMD, + COM_COMTQ_FTQ_CMD_RD_DATA, + 3, COM_COMTQ), + BNX2_FTQ_DATA_ENTRY(COM_COMXQ_FTQ_CMD, + COM_COMXQ_FTQ_CMD_RD_DATA, + 4, COM_COMXQ), + BNX2_FTQ_DATA_ENTRY(CP_CPQ_FTQ_CMD, + CP_CPQ_FTQ_CMD_RD_DATA, + 1, CP_CPQ), + BNX2_FTQ_DATA_ENTRY(CSCH_CH_FTQ_COMMAND, + CSCH_CH_FTQ_CMD_RD_DATA, + 2, CSCH_CSQ), + BNX2_FTQ_DATA_ENTRY(MCP_MCPQ_FTQ_CMD, + MCP_MCPQ_FTQ_CMD_RD_DATA, + 5, MCP_MCPQ), +}; + +static u32 * +dump_ftq_ctrl_info(struct bnx2 *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + int i; + u32 ftq_size = 0; + + if (dmp->fw_hdr.dmp_size >= BNX2_FWDMP_SIZE) + return dst; + for (i = 0; i < ARRAY_SIZE(ftq_arr); i++) + ftq_size += 4; + for (i = 0; i < ARRAY_SIZE(ftq_data_arr); i++) + ftq_size += ftq_data_arr[i].size * 4; + if ((dmp->fw_hdr.dmp_size + ftq_size + BNX2_FWDMP_MARKER_SZ) > + BNX2_FWDMP_SIZE) + return dst; + *dst++ = BNX2_FWDMP_MARKER; + *dst++ = 0; + *dst++ = BNX2_FWDMP_FTQ_DUMP; + *dst++ = ftq_size; + for (i = 0; i < ARRAY_SIZE(ftq_arr); i++) + *dst++ = bnx2_reg_rd_ind(bp, ftq_arr[i].off); + + for (i = 0; i < ARRAY_SIZE(ftq_data_arr); i++) { + bnx2_reg_wr_ind(bp, ftq_data_arr[i].off, + ftq_data_arr[i].cmdoff); + bnx2_dump_ind(bp, ftq_data_arr[i].dataoff, + dst, ftq_data_arr[i].size); + dst += ftq_data_arr[i].size; + } + *dst++ = BNX2_FWDMP_MARKER_END; + dmp->fw_hdr.dmp_size += ftq_size + BNX2_FWDMP_MARKER_SZ; + return dst; +} + +#define BNX2_GRCBLK_SIZE 0x400 +#define BNX2_GRC_ENTRY(offset) { BNX2_##offset } +static const struct grc_reg { + u32 off; +} grc_arr[] = { + BNX2_GRC_ENTRY(PCICFG_START), + BNX2_GRC_ENTRY(PCI_GRC_WINDOW_ADDR), + BNX2_GRC_ENTRY(MISC_COMMAND), + BNX2_GRC_ENTRY(DMA_COMMAND), + BNX2_GRC_ENTRY(CTX_COMMAND), + BNX2_GRC_ENTRY(EMAC_MODE), + BNX2_GRC_ENTRY(RPM_COMMAND), + BNX2_GRC_ENTRY(RCP_START), + BNX2_GRC_ENTRY(RLUP_COMMAND), + BNX2_GRC_ENTRY(CH_COMMAND), + BNX2_GRC_ENTRY(RV2P_COMMAND), + BNX2_GRC_ENTRY(RDMA_COMMAND), + BNX2_GRC_ENTRY(RBDC_COMMAND), + BNX2_GRC_ENTRY(MQ_COMMAND), + BNX2_GRC_ENTRY(TIMER_COMMAND), + BNX2_GRC_ENTRY(TSCH_COMMAND), + BNX2_GRC_ENTRY(TBDR_COMMAND), + BNX2_GRC_ENTRY(TBDC_COMMAND), + BNX2_GRC_ENTRY(TDMA_COMMAND), + BNX2_GRC_ENTRY(DBU_CMD), + BNX2_GRC_ENTRY(NVM_COMMAND), + BNX2_GRC_ENTRY(HC_COMMAND), + BNX2_GRC_ENTRY(DEBUG_COMMAND), +}; + +static u32 *dump_grc(struct bnx2 *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 i; + u32 grc_size = 0; + + if (dmp->fw_hdr.dmp_size >= BNX2_FWDMP_SIZE) + return dst; + for (i = 0; i < ARRAY_SIZE(grc_arr); i++) + grc_size += BNX2_GRCBLK_SIZE; + if ((dmp->fw_hdr.dmp_size + grc_size + BNX2_FWDMP_MARKER_SZ) > + BNX2_FWDMP_SIZE) + return dst; + *dst++ = BNX2_FWDMP_MARKER; + *dst++ = 0; + *dst++ = BNX2_FWDMP_GRC_DUMP; + *dst++ = grc_size; + for (i = 0; i < ARRAY_SIZE(grc_arr); i++) { + bnx2_dump(bp, grc_arr[i].off, dst, BNX2_GRCBLK_SIZE/4); + dst += BNX2_GRCBLK_SIZE/4; + } + *dst++ = BNX2_FWDMP_MARKER_END; + dmp->fw_hdr.dmp_size += grc_size + BNX2_FWDMP_MARKER_SZ; + return dst; +} + +#define BNX2_HSI_ENTRY(offset, size) { BNX2_##offset, BNX2_##size } +static const struct hsi_reg { + u32 off; + u32 size; +} hsi_arr[] = { + BNX2_HSI_ENTRY(CP_HSI_START, CP_HSI_SIZE), + BNX2_HSI_ENTRY(COM_HSI_START, COM_HSI_SIZE), + BNX2_HSI_ENTRY(RXP_HSI_START, RXP_HSI_SIZE), + BNX2_HSI_ENTRY(TXP_HSI_START, TXP_HSI_SIZE), + BNX2_HSI_ENTRY(TPAT_HSI_START, TPAT_HSI_SIZE), +}; + +static u32 *dump_hsi(struct bnx2 *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 i; + u32 hsi_size = 0; + + if (dmp->fw_hdr.dmp_size >= BNX2_FWDMP_SIZE) + return dst; + for (i = 0; i < ARRAY_SIZE(hsi_arr); i++) + hsi_size += hsi_arr[i].size; + if ((dmp->fw_hdr.dmp_size + hsi_size + BNX2_FWDMP_MARKER_SZ) > + BNX2_FWDMP_SIZE) + return dst; + *dst++ = BNX2_FWDMP_MARKER; + *dst++ = 0; + *dst++ = BNX2_FWDMP_HSI_DUMP; + *dst++ = hsi_size; + for (i = 0; i < ARRAY_SIZE(hsi_arr); i++) { + bnx2_dump_ind(bp, hsi_arr[i].off, dst, hsi_arr[i].size/4); + dst += hsi_arr[i].size/4; + } + *dst++ = BNX2_FWDMP_MARKER_END; + dmp->fw_hdr.dmp_size += hsi_size + BNX2_FWDMP_MARKER_SZ; + return dst; +} + +static u32 * +dump_mcp_info(struct bnx2 *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 i; + + if (dmp->fw_hdr.dmp_size >= BNX2_FWDMP_SIZE) + return dst; + *dst++ = BNX2_FWDMP_MARKER; + *dst++ = 0; + *dst++ = BNX2_FWDMP_MCP_DUMP; + *dst++ = BNX2_MCP_DUMP_SIZE; + if (CHIP_NUM(bp) == CHIP_NUM_5709) { + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P0); + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P1); + } else { + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P0_5708); + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_STATE_P1_5708); + } + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_MODE); + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_STATE); + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_EVENT_MASK); + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER); + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER); + *dst++ = bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_INSTRUCTION); + *dst++ = bnx2_shmem_rd(bp, BNX2_DRV_MB); + *dst++ = bnx2_shmem_rd(bp, BNX2_FW_MB); + *dst++ = bnx2_shmem_rd(bp, BNX2_LINK_STATUS); + *dst++ = bnx2_shmem_rd(bp, BNX2_DRV_PULSE_MB); + *dst++ = bnx2_shmem_rd(bp, BNX2_DEV_INFO_SIGNATURE); + *dst++ = bnx2_shmem_rd(bp, BNX2_BC_STATE_RESET_TYPE); + *dst++ = bnx2_shmem_rd(bp, BNX2_BC_STATE_CONDITION); + for (i = 0; i < 16;) { + *dst++ = bnx2_shmem_rd(bp, BNX2_BC_STATE_RESET_TYPE); + i += 4; + } + for (i = 0; i < 16;) { + *dst++ = bnx2_shmem_rd(bp, 0x3cc); + i += 4; + } + for (i = 0; i < 16;) { + *dst++ = bnx2_shmem_rd(bp, 0x3dc); + i += 4; + } + for (i = 0; i < 16;) { + *dst++ = bnx2_shmem_rd(bp, 0x3ec); + i += 4; + } + *dst++ = bnx2_shmem_rd(bp, 0x3fc); + *dst++ = BNX2_FWDMP_MARKER_END; + dmp->fw_hdr.dmp_size += BNX2_MCP_DUMP_SIZE + BNX2_FWDMP_MARKER_SZ; + return dst; +} + +static u32 *dump_tbdc(struct bnx2 *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 i; + + if (dmp->fw_hdr.dmp_size >= BNX2_FWDMP_SIZE) + return dst; + if ((dmp->fw_hdr.dmp_size + BNX2_TBDC_DUMP_SIZE + + BNX2_FWDMP_MARKER_SZ) > BNX2_FWDMP_SIZE) + return dst; + *dst++ = BNX2_FWDMP_MARKER; + *dst++ = 0; + *dst++ = BNX2_FWDMP_TBDC_DUMP; + *dst++ = BNX2_TBDC_DUMP_SIZE; + for (i = 0; i < 0x20; i++) { + int j = 0; + + REG_WR(bp, BNX2_TBDC_BD_ADDR, i); + REG_WR(bp, BNX2_TBDC_CAM_OPCODE, + BNX2_TBDC_CAM_OPCODE_OPCODE_CAM_READ); + REG_WR(bp, BNX2_TBDC_COMMAND, BNX2_TBDC_COMMAND_CMD_REG_ARB); + while ((REG_RD(bp, BNX2_TBDC_COMMAND) & + BNX2_TBDC_COMMAND_CMD_REG_ARB) && j < 100) + j++; + + *dst++ = REG_RD(bp, BNX2_TBDC_CID); + *dst++ = REG_RD(bp, BNX2_TBDC_BIDX); + *dst++ = REG_RD(bp, BNX2_TBDC_CAM_OPCODE); + } + *dst++ = BNX2_FWDMP_MARKER_END; + dmp->fw_hdr.dmp_size += BNX2_TBDC_DUMP_SIZE + BNX2_FWDMP_MARKER_SZ; + return dst; +} + +static VMK_ReturnStatus bnx2_fwdmp_callback(void *cookie, vmk_Bool liveDump) +{ + VMK_ReturnStatus status = VMK_OK; + u32 idx; + u32 *dst; + struct chip_core_dmp *dmp; + struct bnx2 *bp; + + for (idx = 0; idx < BNX2_MAX_NIC; idx++) { + if (fwdmp_va_ptr && fwdmp_bp_ptr[idx]) { + /* dump chip information to buffer */ + bp = fwdmp_bp_ptr[idx]; + dmp = (struct chip_core_dmp *)fwdmp_va_ptr; + snprintf(dmp->fw_hdr.name, sizeof(dmp->fw_hdr.name), + "%s", bp->dev->name); + dmp->fw_hdr.bp = (void *)bp; + dmp->fw_hdr.chip_id = bp->chip_id; + dmp->fw_hdr.len = sizeof(struct fw_dmp_hdr); + dmp->fw_hdr.ver = 0x000700006; + dmp->fw_hdr.dmp_size = dmp->fw_hdr.len; + /* 1. dump all CPUs states */ + dst = dmp->fw_dmp_buf; + dst = dump_cpu_state(bp, dst, dmp); + /* 2. dump all ftqs control information */ + dst = dump_ftq_ctrl_info(bp, dst, dmp); + /* 3. dump mcp info */ + dst = dump_mcp_info(bp, dst, dmp); + /* 4. dump tbdc contents */ + dst = dump_tbdc(bp, dst, dmp); + /* 5. dump hsi section for all processors */ + dst = dump_hsi(bp, dst, dmp); + /* 6. dump 32k grc registers */ + dst = dump_grc(bp, dst, dmp); + + status = vmklnx_dump_range(bnx2_fwdmp_dh, + fwdmp_va_ptr, dmp->fw_hdr.dmp_size); + if (status != VMK_OK) { + printk(KERN_ERR "####failed to dump firmware/chip data %x %d!\n", + status, idx); + break; + } + } + } + return status; +} +#endif + +/* The following debug buffers and exported routines are used by GDB to access + teton/xinan hardware registers when doing live debug over serial port. */ + +#define DBG_BUF_SZ 128 + +static u32 bnx2_dbg_buf[DBG_BUF_SZ]; + +static u32 bnx2_dbg_read32_ind_single(void __iomem *reg_view, u32 off) +{ + u32 val; + writel(off, reg_view + BNX2_PCICFG_REG_WINDOW_ADDRESS); + val = readl(reg_view + BNX2_PCICFG_REG_WINDOW); + return val; +} + +void bnx2_dbg_read32_ind(void __iomem *reg_view, u32 off, u32 len) +{ + u32 *buf = bnx2_dbg_buf; + + if (len & 0x3) + len = (len + 3) & ~3; + if (len > DBG_BUF_SZ) + len = DBG_BUF_SZ; + + while (len > 0) { + *buf = bnx2_dbg_read32_ind_single(reg_view, off); + buf++; + off += 4; + len -= 4; + } +} +EXPORT_SYMBOL(bnx2_dbg_read32_ind); + +static u32 bnx2_dbg_read32_single(void __iomem *reg_view, u32 off) +{ + return readl(reg_view + off); +} + +void bnx2_dbg_read32(void __iomem *reg_view, u32 off, u32 len) +{ + u32 *buf = bnx2_dbg_buf; + + if (len & 0x3) + len = (len + 3) & ~3; + if (len > DBG_BUF_SZ) + len = DBG_BUF_SZ; + + while (len > 0) { + *buf = bnx2_dbg_read32_single(reg_view, off); + buf++; + off += 4; + len -= 4; + } +} +EXPORT_SYMBOL(bnx2_dbg_read32); + +void bnx2_dbg_write32(void __iomem *reg_view, u32 off, u32 val) +{ + writel(val, reg_view + off); +} +EXPORT_SYMBOL(bnx2_dbg_write32); + +void bnx2_dbg_write32_ind(void __iomem *reg_view, u32 off, u32 val) +{ + writel(off, reg_view + BNX2_PCICFG_REG_WINDOW_ADDRESS); + writel(val, reg_view + BNX2_PCICFG_REG_WINDOW); +} +EXPORT_SYMBOL(bnx2_dbg_write32_ind); + +#endif /*__VMKLNX__ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2.h index 8439256..103514e 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2.h @@ -1,6 +1,6 @@ /* bnx2.h: Broadcom NX2 network driver. * - * Copyright (c) 2004-2010 Broadcom Corporation + * Copyright (c) 2004-2012 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -13,10 +13,6 @@ #ifndef BNX2_H #define BNX2_H -#if (LINUX_VERSION_CODE >= 0x020610) -#define BCM_CNIC 1 -#endif - #if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 41000) #define VMWARE_ISCSI #endif @@ -33,6 +29,22 @@ #define BNX2_NEW_NAPI 1 #endif +#ifndef ADVERTISE_10HALF +#define ADVERTISE_10HALF 0x0020 +#endif + +#ifndef ADVERTISE_10FULL +#define ADVERTISE_10FULL 0x0040 +#endif + +#ifndef ADVERTISE_100HALF +#define ADVERTISE_100HALF 0x0080 +#endif + +#ifndef ADVERTISE_100FULL +#define ADVERTISE_100FULL 0x0100 +#endif + #ifndef ADVERTISE_1000XFULL #define ADVERTISE_1000XFULL 0x0020 #define ADVERTISE_1000XHALF 0x0040 @@ -68,6 +80,19 @@ #define ADVERTISED_2500baseX_Full (1 << 15) #endif +#if (LINUX_VERSION_CODE < 0x02061b) +static inline void ethtool_cmd_speed_set(struct ethtool_cmd *ep, + __u32 speed) +{ + ep->speed = (__u16)speed; +} + +static inline __u32 ethtool_cmd_speed(struct ethtool_cmd *ep) +{ + return ep->speed; +} +#endif + #ifndef ETH_FCS_LEN #define ETH_FCS_LEN 4 #endif @@ -138,6 +163,50 @@ typedef int netdev_tx_t; struct pci_device_id _table[] #endif +#ifndef HAVE_AER +static inline int pci_disable_pcie_error_reporting(struct pci_dev *pdev) +{ + return 0; +} +static inline int pci_enable_pcie_error_reporting(struct pci_dev *pdev) +{ + return 0; +} + +static inline int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *pdev) +{ + return 0; +} +#endif + +#ifndef HAVE_BOOL +typedef int bool; +#define false 0 +#define true 1 +#endif + +#ifndef HAVE_IS_PCIE +static inline bool pci_is_pcie(struct pci_dev *dev) +{ + if (pci_find_capability(dev, PCI_CAP_ID_EXP) == 0) + return false; + + return true; +} +#endif + +#ifndef DEFINE_DMA_UNMAP_ADDR +#define DEFINE_DMA_UNMAP_ADDR(mapping) DECLARE_PCI_UNMAP_ADDR(mapping) +#endif + +#ifndef dma_unmap_addr_set +#define dma_unmap_addr_set pci_unmap_addr_set +#endif + +#ifndef dma_unmap_addr +#define dma_unmap_addr pci_unmap_addr +#endif + #if (LINUX_VERSION_CODE < 0x020604) #define MODULE_VERSION(version) #endif @@ -163,10 +232,8 @@ typedef int netdev_tx_t; #endif /* - * Currently, on ESX, the wmb() instruction is defined to only a compiler barrier. - * The macro wmb() need to be overrode to properly synchronize memory. - * - * See PR 791836. This workaround is needed until PR 819237 is fixed in vmklinux. + * On ESX the wmb() instruction is defined to only a compiler barrier + * The macro wmb() need to be overrode to properly synchronize memory */ #if defined(__VMKLNX__) #undef wmb @@ -210,14 +277,25 @@ typedef u32 pci_power_t; #endif #if (LINUX_VERSION_CODE < 0x020612) -static inline struct sk_buff *netdev_alloc_skb(struct net_device *dev, - unsigned int length) +#ifndef HAVE_GFP +typedef unsigned gfp_t; +#endif + +static inline struct sk_buff *__netdev_alloc_skb(struct net_device *dev, + unsigned int length, gfp_t gfp_mask) { - struct sk_buff *skb = dev_alloc_skb(length); + struct sk_buff *skb = __dev_alloc_skb(length, gfp_mask); if (skb) skb->dev = dev; return skb; } + +static inline struct sk_buff *netdev_alloc_skb(struct net_device *dev, + unsigned int length) +{ + return __netdev_alloc_skb(dev, length, GFP_ATOMIC); +} + #endif static inline void bnx2_skb_fill_page_desc(struct sk_buff *skb, int i, @@ -249,7 +327,7 @@ static inline void netif_tx_unlock(struct net_device *dev) } #endif -#if !defined(HAVE_NETDEV_PRIV) && (LINUX_VERSION_CODE != 0x020603) && (LINUX_VERSION_CODE != 0x020604) && (LINUX_VERSION_CODE != 0x20605) +#if !defined(HAVE_NETDEV_PRIV) && (LINUX_VERSION_CODE != 0x020603) && (LINUX_VERSION_CODE != 0x020604) && (LINUX_VERSION_CODE != 0x20605) && (LINUX_VERSION_CODE < 0x30000) static inline void *netdev_priv(struct net_device *dev) { return dev->priv; @@ -292,7 +370,7 @@ static inline int bnx2_set_tx_hw_csum(struct net_device *dev, u32 data) } #endif -#ifndef VLAN_GROUP_ARRAY_SPLIT_PARTS +#if !defined(VLAN_GROUP_ARRAY_SPLIT_PARTS) && !defined(VLAN_CFI_MASK) static inline void vlan_group_set_device(struct vlan_group *vg, int vlan_id, struct net_device *dev) { @@ -412,8 +490,8 @@ static inline void skb_record_rx_queue(struct sk_buff *skb, u16 rx_queue) #define dev_err(unused, format, arg...) \ printk(KERN_ERR "bnx2: " format , ## arg) #else -#ifndef dev_err -#ifndef dev_printk +#ifndef HAVE_DEV_ERR +#ifndef HAVE_DEV_PRINTK #define dev_printk(level, dev, format, arg...) \ printk(level "bnx2 %s: " format , (dev)->bus_id , ## arg) #endif @@ -422,6 +500,94 @@ static inline void skb_record_rx_queue(struct sk_buff *skb, u16 rx_queue) #endif #endif +#if (LINUX_VERSION_CODE < 0x020606) +#undef netdev_printk +#undef netdev_err +#undef netdev_info +#endif + +#if !defined(netdev_printk) && (LINUX_VERSION_CODE < 0x020624) + +#if (LINUX_VERSION_CODE < 0x020615) +#define NET_PARENT_DEV(netdev) ((netdev)->class_dev.dev) +#else +#define NET_PARENT_DEV(netdev) ((netdev)->dev.parent) +#endif + +#if !defined(__VMKLNX__) +#define netdev_printk(level, netdev, format, args...) \ + dev_printk(level, NET_PARENT_DEV(netdev), \ + "%s: " format, \ + netdev_name(netdev), ##args) +#else /*(__VMKLNX__)*/ +#define netdev_printk(level, netdev, format, args...) \ + printk("%s" \ + "%s %s: %s: " format, level, \ + DRV_MODULE_NAME, pci_name(netdev->pdev), \ + netdev_name(netdev), ##args) +#endif + +static inline const char *netdev_name(const struct net_device *dev) +{ + if (dev->reg_state != NETREG_REGISTERED) + return "(unregistered net_device)"; + return dev->name; +} + +#endif + +#ifndef KERN_CONT +#define KERN_CONT "" +#endif + +#ifndef netdev_err +#define netdev_err(dev, format, args...) \ + netdev_printk(KERN_ERR, dev, format, ##args) +#endif + +#ifndef netdev_info +#define netdev_info(dev, format, args...) \ + netdev_printk(KERN_INFO, dev, format, ##args) +#endif + +#ifndef netdev_warn +#define netdev_warn(dev, format, args...) \ + netdev_printk(KERN_WARNING, dev, format, ##args) +#endif + +#ifndef pr_fmt +#define pr_fmt(fmt) fmt +#endif + +#ifndef pr_cont +#define pr_cont(fmt, ...) \ + printk(KERN_CONT fmt, ##__VA_ARGS__) +#endif + +#ifndef pr_alert +#define pr_alert(fmt, ...) \ + printk(KERN_ALERT pr_fmt(fmt), ##__VA_ARGS__) +#endif + +#ifndef pr_warning +#define pr_warning(fmt, ...) \ + printk(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__) +#endif + +#ifndef pr_warn +#define pr_warn pr_warning +#endif + +#ifndef pr_err +#define pr_err(fmt, ...) \ + printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__) +#endif + +#ifndef pr_info +#define pr_info(fmt, ...) \ + printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__) +#endif + #if !defined(DECLARE_MAC_BUF) || (LINUX_VERSION_CODE >= 0x020621) #ifndef MAC_FMT #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" @@ -459,6 +625,71 @@ static inline void netif_napi_del(struct napi_struct *napi) #endif #endif +#if (LINUX_VERSION_CODE < 0x020625) +static inline int netif_set_real_num_rx_queues(struct net_device *dev, + unsigned int rxq) +{ + return 0; +} +#endif + +#ifdef BCM_HAVE_MULTI_QUEUE +#ifndef HAVE_REAL_TX +static inline void netif_set_real_num_tx_queues(struct net_device *dev, + unsigned int txq) +{ + dev->real_num_tx_queues = txq; +} +#endif +#endif + +#ifndef HAVE_SKB_FRAG +static inline unsigned int skb_frag_size(const skb_frag_t *frag) +{ + return frag->size; +} + +static inline void skb_frag_size_sub(skb_frag_t *frag, int delta) +{ + frag->size -= delta; +} + +#endif + +#ifndef HAVE_ETHTOOL_TO_MII +static inline u32 ethtool_adv_to_mii_adv_t(u32 ethadv) +{ + u32 result = 0; + + if (ethadv & ADVERTISED_10baseT_Half) + result |= ADVERTISE_10HALF; + if (ethadv & ADVERTISED_10baseT_Full) + result |= ADVERTISE_10FULL; + if (ethadv & ADVERTISED_100baseT_Half) + result |= ADVERTISE_100HALF; + if (ethadv & ADVERTISED_100baseT_Full) + result |= ADVERTISE_100FULL; + if (ethadv & ADVERTISED_Pause) + result |= ADVERTISE_PAUSE_CAP; + if (ethadv & ADVERTISED_Asym_Pause) + result |= ADVERTISE_PAUSE_ASYM; + + return result; +} + +static inline u32 ethtool_adv_to_mii_ctrl1000_t(u32 ethadv) +{ + u32 result = 0; + + if (ethadv & ADVERTISED_1000baseT_Half) + result |= ADVERTISE_1000HALF; + if (ethadv & ADVERTISED_1000baseT_Full) + result |= ADVERTISE_1000FULL; + + return result; +} +#endif + static inline void bnx2_msleep(unsigned int msecs) { #if (LINUX_VERSION_CODE < 0x20607) @@ -479,10 +710,20 @@ static inline unsigned long bnx2_msleep_interruptible(unsigned int msecs) #endif } -#ifndef HAVE_BOOL -typedef int bool; -#define false 0 -#define true 1 +#ifndef rcu_dereference_protected + +#define rcu_dereference_protected(p, c) \ + rcu_dereference((p)) + +#endif + +#ifndef __rcu +#define __rcu +#endif + +#ifndef RCU_INIT_POINTER +#define RCU_INIT_POINTER(p, v) \ + p = (typeof(*v) __force __rcu *)(v) #endif #if defined (__VMKLNX__) @@ -603,25 +844,27 @@ struct l2_kcqe { */ #if defined(BIG_ENDIAN) struct l2_kcqe_vm_alloc_tx_queue { - u8 qid; - u8 status; u16 reserved; - u32 reserved1[5]; + u8 reserved1; + u8 qid; + u32 status; + u32 reserved2[5]; - l2_kcqe_flags_t flags; - l2_kcqe_opcode_t opcode; u16 qe_self_seq; + l2_kcqe_opcode_t opcode; + l2_kcqe_flags_t flags; }; #elif defined(LITTLE_ENDIAN) struct l2_kcqe_vm_alloc_tx_queue { - u16 reserved; - u8 status; u8 qid; - u32 reserved1[5]; + u8 reserved1; + u16 reserved; + u32 status; + u32 reserved2[5]; - u16 qe_self_seq; + l2_kcqe_flags_t flags; l2_kcqe_opcode_t opcode; - l2_kcqe_flags_t flags; + u16 qe_self_seq; }; #endif @@ -631,8 +874,9 @@ struct l2_kcqe_vm_alloc_tx_queue { #if defined(BIG_ENDIAN) struct l2_kcqe_vm_free_tx_queue { u8 qid; - u8 status; + u8 reserved; u16 nx_bidx; + u32 status; u32 reserved1[5]; l2_kcqe_flags_t flags; @@ -642,8 +886,9 @@ struct l2_kcqe_vm_free_tx_queue { #elif defined(LITTLE_ENDIAN) struct l2_kcqe_vm_free_tx_queue { u16 nx_bidx; - u8 status; + u8 reserved; u8 qid; + u32 status; u32 reserved1[5]; u16 qe_self_seq; @@ -657,25 +902,26 @@ struct l2_kcqe_vm_free_tx_queue { */ #if defined(BIG_ENDIAN) struct l2_kcqe_vm_alloc_rx_queue_b { + u16 reserved; + u8 reserved1; u8 qid; u8 status; - u16 reserved; - u32 reserved1[5]; + u32 reserved2[5]; - l2_kcqe_flags_t flags; - l2_kcqe_opcode_t opcode; u16 qe_self_seq; + l2_kcqe_opcode_t opcode; + l2_kcqe_flags_t flags; }; #elif defined(LITTLE_ENDIAN) struct l2_kcqe_vm_alloc_rx_queue_l { - u16 reserved; - u8 status; u8 qid; - u32 reserved1[5]; + u8 reserved1; + u16 reserved; + u32 reserved2[5]; - u16 qe_self_seq; + l2_kcqe_flags_t flags; l2_kcqe_opcode_t opcode; - l2_kcqe_flags_t flags; + u16 qe_self_seq; }; #endif @@ -685,19 +931,21 @@ struct l2_kcqe_vm_alloc_rx_queue_l { #if defined(BIG_ENDIAN) struct l2_kcqe_vm_free_rx_queue { u8 qid; - u8 status; + u8 reserved; u16 nx_bidx; + u32 status; u32 reserved1[5]; - l2_kcqe_flags_t flags; + l2_kcqe_flags_t flags; l2_kcqe_opcode_t opcode; u16 qe_self_seq; }; #elif defined(LITTLE_ENDIAN) struct l2_kcqe_vm_free_rx_queue { u16 nx_bidx; - u8 status; + u8 reserved; u8 qid; + u32 status; u32 reserved1[5]; u16 qe_self_seq; @@ -712,8 +960,9 @@ struct l2_kcqe_vm_free_rx_queue { #if defined(BIG_ENDIAN) struct l2_kcqe_vm_set_rx_filter { u8 qid; - u8 status; + u8 reserved; u16 reserved1; + u32 status; u32 reserved2[5]; l2_kcqe_flags_t flags; @@ -723,8 +972,9 @@ struct l2_kcqe_vm_set_rx_filter { #elif defined(LITTLE_ENDIAN) struct l2_kcqe_vm_set_rx_filter { u16 reserved1; - u8 status; + u8 reserved;; u8 qid; + u32 status; u32 reserved2[5]; u16 qe_self_seq; @@ -739,24 +989,26 @@ struct l2_kcqe_vm_set_rx_filter { #if defined(BIG_ENDIAN) struct l2_kcqe_vm_remove_rx_filter { u8 qid; - u8 status; + u8 reserved; u16 reserved1; + u32 status; u32 reserved2[5]; - l2_kcqe_flags_t flags; + l2_kcqe_flags_t flags; l2_kcqe_opcode_t opcode; u16 qe_self_seq; }; #elif defined(LITTLE_ENDIAN) struct l2_kcqe_vm_remove_rx_filter { u16 reserved1; - u8 status; + u8 reserved; u8 qid; + u32 status u32 reserved2[5]; u16 qe_self_seq; l2_kcqe_opcode_t opcode; - l2_kcqe_flags_t flags; + l2_kcqe_flags_t flags; }; #endif @@ -766,13 +1018,6 @@ struct l2_kcqe_vm_remove_rx_filter { #if defined(__BIG_ENDIAN) struct l2_kwqe { u8 kwqe_flags; - #define KWQE_FLAGS_LAYER_MASK (0x7<<4) - #define KWQE_FLAGS_LAYER_MASK_MISC (0<<4) - #define KWQE_FLAGS_LAYER_MASK_L2 (2<<4) - #define KWQE_FLAGS_LAYER_MASK_L3 (3<<4) - #define KWQE_FLAGS_LAYER_MASK_L4 (4<<4) - #define KWQE_FLAGS_LAYER_MASK_L5 (5<<4) - #define KWQE_FLAGS_NEXT (1<<7) u8 kwqe_opcode; u16 kwqe_info; u32 kwqe_info0; @@ -788,14 +1033,6 @@ struct l2_kwqe { u16 kwqe_info; u8 kwqe_opcode; u8 kwqe_flags; - #define KWQE_FLAGS_LAYER_MASK (0x7<<4) - #define KWQE_FLAGS_LAYER_MASK_MISC (0<<4) - #define KWQE_FLAGS_LAYER_MASK_L2 (2<<4) - #define KWQE_FLAGS_LAYER_MASK_L3 (3<<4) - #define KWQE_FLAGS_LAYER_MASK_L4 (4<<4) - #define KWQE_FLAGS_LAYER_MASK_L5 (5<<4) - #define KWQE_FLAGS_GET_DEBUG_TRACE (7<<4) - #define KWQE_FLAGS_NEXT (1<<7) u32 kwqe_info0; u32 kwqe_info1; u32 kwqe_info2; @@ -813,6 +1050,7 @@ typedef u8 l2_kwqe_flags_t; #define L2_KWQE_FLAGS_LAYER_MASK_L3 (3<<4) #define L2_KWQE_FLAGS_LAYER_MASK_L4 (4<<4) #define L2_KWQE_FLAGS_LAYER_MASK_L5 (5<<4) + #define KWQE_FLAGS_GET_DEBUG_TRACE (7<<4) #define L2_KWQE_FLAGS_NEXT (1<<7) typedef u8 l2_kwqe_opcode_t; @@ -841,6 +1079,8 @@ typedef u8 l2_kwqe_queue_t; #define L2_VM_QUEUE 2 #define L2_VM_DROP_QUEUE 3 +#define BNX2_START_FILTER_ID 0x04 + /* * l2_kwqe_vm_alloc_tx_queue definition */ @@ -912,16 +1152,16 @@ struct l2_kwqe_vm_free_rx_queue { l2_kwqe_flags_t flags; l2_kwqe_opcode_t opcode; u8 qid; - u8 reserved; - u32 reserved1[6]; + u8 queue_type; + u32 reserved1[7]; }; #elif defined(__LITTLE_ENDIAN) struct l2_kwqe_vm_free_rx_queue { - u8 reserved; + u8 queue_type; u8 qid; l2_kwqe_opcode_t opcode; l2_kwqe_flags_t flags; - u32 reserved1[6]; + u32 reserved1[7]; }; #endif @@ -936,7 +1176,10 @@ struct l2_kwqe_vm_set_rx_filter { l2_kwqe_vm_filter_t filter_type; u16 vlan; u8 mac_addr[6]; - u32 reserved1[4]; + u8 filter_id; /* hw filter idx */ + u8 reserved; + u16 reserved1; + u32 reserved2[4]; } l2_kwqe_vm_set_rx_filter_b_t; #elif defined(__LITTLE_ENDIAN) struct l2_kwqe_vm_set_rx_filter { @@ -948,7 +1191,10 @@ struct l2_kwqe_vm_set_rx_filter { u16 mac_addr_hi; u16 vlan; u32 mac_addr_lo; - u32 reserved1[4]; + u16 reserved1; + u8 reserved; + u8 filter_id; /* hw filter idx */ + u32 reserved2[4]; }; #endif @@ -961,7 +1207,10 @@ struct l2_kwqe_vm_remove_rx_filter { l2_kwqe_opcode_t opcode; u8 qid; l2_kwqe_vm_filter_t filter_type; - u32 reserved1[6]; + u8 filter_id; /* hw filter idx */ + u8 reserved; + u16 reserved1; + u32 reserved2[6]; }; #elif defined(__LITTLE_ENDIAN) struct l2_kwqe_vm_remove_rx_filter { @@ -969,7 +1218,10 @@ struct l2_kwqe_vm_remove_rx_filter { u8 qid; l2_kwqe_opcode_t opcode; l2_kwqe_flags_t flags; - u32 reserved1[6]; + u16 reserved1; + u8 reserved; + u8 filter_id; /* hw filter idx */ + u32 reserved2[6]; }; #endif #endif @@ -1257,6 +1509,9 @@ struct l2_fhdr { #define L2_FHDR_ERRORS_TCP_XSUM (1<<28) #define L2_FHDR_ERRORS_UDP_XSUM (1<<31) + #define L2_FHDR_STATUS_USE_RXHASH \ + (L2_FHDR_STATUS_TCP_SEGMENT | L2_FHDR_STATUS_RSS_HASH) + u32 l2_fhdr_hash; #if defined(__BIG_ENDIAN) u16 l2_fhdr_pkt_len; @@ -1311,12 +1566,7 @@ struct l2_fhdr { #define BNX2_L2CTX_BD_PRE_READ 0x00000000 #define BNX2_L2CTX_CTX_SIZE 0x00000000 #define BNX2_L2CTX_CTX_TYPE 0x00000000 -#define BNX2_L2CTX_LO_WATER_MARK_DEFAULT 4 -#define BNX2_L2CTX_LO_WATER_MARK_SCALE 4 -#define BNX2_L2CTX_LO_WATER_MARK_DIS 0 -#define BNX2_L2CTX_HI_WATER_MARK_SHIFT 4 -#define BNX2_L2CTX_HI_WATER_MARK_SCALE 16 -#define BNX2_L2CTX_WATER_MARKS_MSK 0x000000ff +#define BNX2_L2CTX_FLOW_CTRL_ENABLE 0x000000ff #define BNX2_L2CTX_CTX_TYPE_SIZE_L2 ((0x20/20)<<16) #define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE (0xf<<28) #define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED (0<<28) @@ -1346,6 +1596,7 @@ struct l2_fhdr { * pci_config_l definition * offset: 0000 */ +#define BNX2_PCICFG_START 0x0 #define BNX2_PCICFG_MSI_CONTROL 0x00000058 #define BNX2_PCICFG_MSI_CONTROL_ENABLE (1L<<16) @@ -1425,9 +1676,8 @@ struct l2_fhdr { #define BNX2_PCICFG_MAILBOX_QUEUE_ADDR 0x00000090 #define BNX2_PCICFG_MAILBOX_QUEUE_DATA 0x00000094 - #define BNX2_PCICFG_DEVICE_CONTROL 0x000000b4 -#define BNX2_PCICFG_DEVICE_STATUS_NO_PEND ((1L<<5)<<16) +#define BNX2_PCICFG_DEVICE_STATUS_NO_PEND ((1L<<5)<<16) /* * pci_reg definition @@ -2962,8 +3212,6 @@ struct l2_fhdr { #define BNX2_NVM_RECONFIG_RESERVED (0x7fffffL<<8) #define BNX2_NVM_RECONFIG_RECONFIG_DONE (1L<<31) - - /* * dma_reg definition * offset: 0xc00 @@ -3404,7 +3652,6 @@ struct l2_fhdr { #define BNX2_DMA_FUSE_CTRL2_DATA 0x00000f14 - /* * context_reg definition * offset: 0x1000 @@ -3589,7 +3836,6 @@ struct l2_fhdr { #define BNX2_CTX_CAM_CTRL_WRITE_REQ (1L<<30) #define BNX2_CTX_CAM_CTRL_READ_REQ (1L<<31) - /* * emac_reg definition * offset: 0x1400 @@ -4121,7 +4367,6 @@ struct l2_fhdr { #define BNX2_EMAC_TX_RATE_LIMIT_CTRL_TX_THROTTLE_NUM (0x7fL<<16) #define BNX2_EMAC_TX_RATE_LIMIT_CTRL_RATE_LIMITER_EN (1L<<31) - /* * rpm_reg definition * offset: 0x1800 @@ -5171,10 +5416,12 @@ struct l2_fhdr { #define BNX2_RPM_ACPI_PATTERN_CRC7_PATTERN_CRC7 (0xffffffffL<<0) +#define BNX2_RCP_START 0x1c00 /* * rlup_reg definition * offset: 0x2000 */ +#define BNX2_RLUP_COMMAND 0x00002000 #define BNX2_RLUP_RSS_CONFIG 0x0000201c #define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_XI (0x3L<<0) #define BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_OFF_XI (0L<<0) @@ -5187,6 +5434,73 @@ struct l2_fhdr { #define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_IP_ONLY_XI (2L<<2) #define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_RES_XI (3L<<2) +#define BNX2_RLUP_RSS_COMMAND 0x00002048 +#define BNX2_RLUP_RSS_COMMAND_RSS_IND_TABLE_ADDR (0xfUL<<0) +#define BNX2_RLUP_RSS_COMMAND_RSS_WRITE_MASK (0xffUL<<4) +#define BNX2_RLUP_RSS_COMMAND_WRITE (1UL<<12) +#define BNX2_RLUP_RSS_COMMAND_READ (1UL<<13) +#define BNX2_RLUP_RSS_COMMAND_HASH_MASK (0x7UL<<14) + +#define BNX2_RLUP_RSS_DATA 0x0000204c + +#define BNX2_RLUP_RLUPQ 0x00002380 +#define BNX2_RLUP_FTQ_COMMAND 0x000023f8 + #define BNX2_RLUP_FTQ_CMD_OFFSET (0x3ffUL<<0) + #define BNX2_RLUP_FTQ_CMD_WR_TOP (1UL<<10) + #define BNX2_RLUP_FTQ_CMD_WR_TOP_0 (0UL<<10) + #define BNX2_RLUP_FTQ_CMD_WR_TOP_1 (1UL<<10) + #define BNX2_RLUP_FTQ_CMD_SFT_RESET (1UL<<25) + #define BNX2_RLUP_FTQ_CMD_RD_DATA (1UL<<26) + #define BNX2_RLUP_FTQ_CMD_ADD_INTERVEN (1UL<<27) + #define BNX2_RLUP_FTQ_CMD_ADD_DATA (1UL<<28) + #define BNX2_RLUP_FTQ_CMD_INTERVENE_CLR (1UL<<29) + #define BNX2_RLUP_FTQ_CMD_POP (1UL<<30) + #define BNX2_RLUP_FTQ_CMD_BUSY (1UL<<31) +#define BNX2_RLUP_FTQ_CTL 0x000023fc + +#define BNX2_CH_COMMAND 0x00002400 + +#define BNX2_RDMA_COMMAND 0x00002c00 +#define BNX2_RDMA_RDMAQ 0x00002fc0 +#define BNX2_RDMA_FTQ_COMMAND 0x00002ff8 + #define BNX2_RDMA_FTQ_CMD_OFFSET (0x3ffUL<<0) + #define BNX2_RDMA_FTQ_CMD_WR_TOP (1UL<<10) + #define BNX2_RDMA_FTQ_CMD_WR_TOP_0 (0UL<<10) + #define BNX2_RDMA_FTQ_CMD_WR_TOP_1 (1UL<<10) + #define BNX2_RDMA_FTQ_CMD_SFT_RESET (1UL<<25) + #define BNX2_RDMA_FTQ_CMD_RD_DATA (1UL<<26) + #define BNX2_RDMA_FTQ_CMD_ADD_INTERVEN (1UL<<27) + #define BNX2_RDMA_FTQ_CMD_ADD_DATA (1UL<<28) + #define BNX2_RDMA_FTQ_CMD_INTERVENE_CLR (1UL<<29) + #define BNX2_RDMA_FTQ_CMD_POP (1UL<<30) + #define BNX2_RDMA_FTQ_CMD_BUSY (1UL<<31) +#define BNX2_RDMA_FTQ_CTL 0x00002ffc + +#define BNX2_RBDC_COMMAND 0x00003000 + +#define BNX2_CSCH_COMMAND 0x00004000 +#define BNX2_CSCH_CSQ 0x000043c0 +#define BNX2_CSCH_CH_FTQ_COMMAND 0x000043f8 + #define BNX2_CSCH_CH_FTQ_CMD_OFFSET (0x3ffUL<<0) + #define BNX2_CSCH_CH_FTQ_CMD_WR_TOP (1UL<<10) + #define BNX2_CSCH_CH_FTQ_CMD_WR_TOP_0 (0UL<<10) + #define BNX2_CSCH_CH_FTQ_CMD_WR_TOP_1 (1UL<<10) + #define BNX2_CSCH_CH_FTQ_CMD_SFT_RESET (1UL<<25) + #define BNX2_CSCH_CH_FTQ_CMD_RD_DATA (1UL<<26) + #define BNX2_CSCH_CH_FTQ_CMD_ADD_INTERVEN (1UL<<27) + #define BNX2_CSCH_CH_FTQ_CMD_ADD_DATA (1UL<<28) + #define BNX2_CSCH_CH_FTQ_CMD_INTERVENE_CLR (1UL<<29) + #define BNX2_CSCH_CH_FTQ_CMD_POP (1UL<<30) + #define BNX2_CSCH_CH_FTQ_CMD_BUSY (1UL<<31) + +#define BNX2_CSCH_CH_FTQ_CTL 0x000043fc + #define BNX2_CSCH_CH_FTQ_CTL_INTERVENE (1UL<<0) + #define BNX2_CSCH_CH_FTQ_CTL_OVERFLOW (1UL<<1) + #define BNX2_CSCH_CH_FTQ_CTL_FORCE_INTERVENE (1UL<<2) + #define BNX2_CSCH_CH_FTQ_CTL_MAX_DEPTH (0x3ffUL<<12) + #define BNX2_CSCH_CH_FTQ_CTL_CUR_DEPTH (0x3ffUL<<22) + +#define BNX2_TIMER_COMMAND 0x00004400 /* * rbuf_reg definition @@ -5446,8 +5760,6 @@ struct l2_fhdr { #define BNX2_RV2P_MFTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BNX2_RV2P_MFTQ_CTL_CUR_DEPTH (0x3ffL<<22) - - /* * mq_reg definition * offset: 0x3c00 @@ -5565,12 +5877,29 @@ struct l2_fhdr { * tsch_reg definition * offset: 0x4c00 */ +#define BNX2_TSCH_COMMAND 0x00004c00 #define BNX2_TSCH_TSS_CFG 0x00004c1c #define BNX2_TSCH_TSS_CFG_TSS_START_CID (0x7ffL<<8) #define BNX2_TSCH_TSS_CFG_NUM_OF_TSS_CON (0xfL<<24) - - - +#define BNX2_TSCH_TSCHQ 0x00004fc0 +#define BNX2_TSCH_FTQ_CMD 0x00004ff8 + #define BNX2_TSCH_FTQ_CMD_OFFSET (0x3ffUL<<0) + #define BNX2_TSCH_FTQ_CMD_WR_TOP (1UL<<10) + #define BNX2_TSCH_FTQ_CMD_WR_TOP_0 (0UL<<10) + #define BNX2_TSCH_FTQ_CMD_WR_TOP_1 (1UL<<10) + #define BNX2_TSCH_FTQ_CMD_SFT_RESET (1UL<<25) + #define BNX2_TSCH_FTQ_CMD_RD_DATA (1UL<<26) + #define BNX2_TSCH_FTQ_CMD_ADD_INTERVEN (1UL<<27) + #define BNX2_TSCH_FTQ_CMD_ADD_DATA (1UL<<28) + #define BNX2_TSCH_FTQ_CMD_INTERVENE_CLR (1UL<<29) + #define BNX2_TSCH_FTQ_CMD_POP (1UL<<30) + #define BNX2_TSCH_FTQ_CMD_BUSY (1UL<<31) +#define BNX2_TSCH_FTQ_CTL 0x00004ffc + #define BNX2_TSCH_FTQ_CTL_INTERVENE (1UL<<0) + #define BNX2_TSCH_FTQ_CTL_OVERFLOW (1UL<<1) + #define BNX2_TSCH_FTQ_CTL_FORCE_INTERVENE (1UL<<2) + #define BNX2_TSCH_FTQ_CTL_MAX_DEPTH (0x3ffUL<<12) + #define BNX2_TSCH_FTQ_CTL_CUR_DEPTH (0x3ffUL<<22) /* * tbdr_reg definition * offset: 0x5000 @@ -5643,7 +5972,6 @@ struct l2_fhdr { #define BNX2_TBDR_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - /* * tdma_reg definition * offset: 0x5c00 @@ -5792,8 +6120,7 @@ struct l2_fhdr { #define BNX2_TDMA_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BNX2_TDMA_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - - +#define BNX2_DBU_CMD 0x00006000 /* * hc_reg definition * offset: 0x6800 @@ -6589,7 +6916,7 @@ struct l2_fhdr { BNX2_HC_SB_CONFIG_1) #define BNX2_HC_RX_TICKS_OFF (BNX2_HC_RX_TICKS_1 - BNX2_HC_SB_CONFIG_1) - +#define BNX2_DEBUG_COMMAND 0x00007000 /* * txp_reg definition * offset: 0x40000 @@ -6779,6 +7106,20 @@ struct l2_fhdr { #define BNX2_TPAT_SCRATCH 0x000a0000 +#define BNX2_TAS_TASQ 0x001c03c0 +#define BNX2_TAS_FTQ_CTL 0x001c03fc +#define BNX2_TAS_FTQ_CMD 0x001c03f8 + #define BNX2_TAS_FTQ_CMD_OFFSET (0x3ffUL<<0) + #define BNX2_TAS_FTQ_CMD_WR_TOP (1UL<<10) + #define BNX2_TAS_FTQ_CMD_WR_TOP_0 (0UL<<10) + #define BNX2_TAS_FTQ_CMD_WR_TOP_1 (1UL<<10) + #define BNX2_TAS_FTQ_CMD_SFT_RESET (1UL<<25) + #define BNX2_TAS_FTQ_CMD_RD_DATA (1UL<<26) + #define BNX2_TAS_FTQ_CMD_ADD_INTERVEN (1UL<<27) + #define BNX2_TAS_FTQ_CMD_ADD_DATA (1UL<<28) + #define BNX2_TAS_FTQ_CMD_INTERVENE_CLR (1UL<<29) + #define BNX2_TAS_FTQ_CMD_POP (1UL<<30) + #define BNX2_TAS_FTQ_CMD_BUSY (1UL<<31) /* * rxp_reg definition @@ -7084,6 +7425,7 @@ struct l2_fhdr { #define BNX2_COM_SCRATCH 0x00120000 +#define BNX2_FW_RX_LOW_LATENCY 0x00120058 #define BNX2_FW_RX_DROP_COUNT 0x00120084 @@ -7566,24 +7908,27 @@ struct l2_fhdr { #if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) #define NETQUEUE_KWQ_CID 97 #define NETQUEUE_KCQ_CID 100 + +#define BNX2_DRV_TO_FW_QUEUE_ID(id) (id - 1) +#define BNX2_FW_TO_DRV_QUEUE_ID(id) (id + 1) #endif struct sw_bd { struct sk_buff *skb; struct l2_fhdr *desc; - DECLARE_PCI_UNMAP_ADDR(mapping) + DEFINE_DMA_UNMAP_ADDR(mapping); }; struct sw_pg { struct page *page; - DECLARE_PCI_UNMAP_ADDR(mapping) + DEFINE_DMA_UNMAP_ADDR(mapping); }; struct sw_tx_bd { struct sk_buff *skb; unsigned short is_gso; unsigned short nr_frags; - DECLARE_PCI_UNMAP_ADDR(mapping) + DEFINE_DMA_UNMAP_ADDR(mapping); }; #define SW_RXBD_RING_SIZE (sizeof(struct sw_bd) * RX_DESC_CNT) @@ -7651,15 +7996,17 @@ struct flash_spec { #define BNX2_MAX_MSIX_HW_VEC 9 #define BNX2_MAX_MSIX_VEC 9 -#define BNX2_BASE_VEC 0 -#define BNX2_TX_VEC 1 -#define BNX2_TX_INT_NUM (BNX2_TX_VEC << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT) +#ifdef BCM_CNIC +#define BNX2_MIN_MSIX_VEC 2 +#else +#define BNX2_MIN_MSIX_VEC 1 +#endif struct bnx2_irq { -#if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) - irqreturn_t (*handler)(int, void *, struct pt_regs *); -#else +#if (LINUX_VERSION_CODE >= 0x20613) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) irq_handler_t handler; +#else + irqreturn_t (*handler)(int, void *, struct pt_regs *); #endif unsigned int vector; u8 requested; @@ -7736,7 +8083,6 @@ struct bnx2_napi { u8 netq_state; #define BNX2_NETQ_SUSPENDED 0x0004 #define BNX2_NETQ_RX_FILTER_APPLIED 0x0010 - u32 tx_packets_sent; u32 tx_packets_processed; @@ -7787,6 +8133,7 @@ struct bnx2 { #define BNX2_FLAG_JUMBO_BROKEN 0x00000800 #define BNX2_FLAG_CAN_KEEP_VLAN 0x00001000 #define BNX2_FLAG_BROKEN_STATS 0x00002000 +#define BNX2_FLAG_AER_ENABLED 0x00004000 struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC]; @@ -7807,7 +8154,7 @@ struct bnx2 { int tx_ring_size; u32 tx_wake_thresh; - struct cnic_ops *cnic_ops; + struct cnic_ops __rcu *cnic_ops; void *cnic_data; /* End of fields used in the performance code paths. */ @@ -7981,6 +8328,12 @@ struct bnx2 { u8 num_tx_rings; u8 num_rx_rings; + int num_req_tx_rings; + int num_req_rx_rings; + + u8 func; + + u32 leds_save; u32 idle_chk_status_idx; #ifdef BCM_CNIC @@ -7988,7 +8341,7 @@ struct bnx2 { struct cnic_eth_dev cnic_eth_dev; #endif -#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +#if defined(BNX2_ENABLE_NETQUEUE) u16 n_rx_queues_allocated; u16 n_tx_queues_allocated; @@ -8015,6 +8368,8 @@ struct bnx2 { #define BNX2_NETQ_MAX_COMPLETED_KCQE 8 struct l2_kcqe *netq_completed_kcq[BNX2_NETQ_MAX_COMPLETED_KCQE]; + struct mutex netq_lock; + u8 netq_flags; u8 netq_enabled; u8 netq_state; @@ -8470,16 +8825,22 @@ struct fw_info { #define BNX2_RPHY_SERDES_LINK 0x374 #define BNX2_RPHY_COPPER_LINK 0x378 +#define BNX2_ISCSI_INITIATOR 0x3dc +#define BNX2_ISCSI_INITIATOR_EN 0x00080000 + +#define BNX2_ISCSI_MAX_CONN 0x3e4 +#define BNX2_ISCSI_MAX_CONN_MASK 0xffff0000 +#define BNX2_ISCSI_MAX_CONN_SHIFT 16 + #define HOST_VIEW_SHMEM_BASE 0x167c00 -#define DP_SHMEM_LINE(_offset) \ - printk(KERN_ERR PFX "%s: %08x: %08x %08x %08x %08x\n", \ - bp->dev->name, \ - _offset, \ - bnx2_shmem_rd(bp, _offset), \ - bnx2_shmem_rd(bp, _offset + 4), \ - bnx2_shmem_rd(bp, _offset + 8), \ - bnx2_shmem_rd(bp, _offset + 12)) +#define DP_SHMEM_LINE(bp, offset) \ + netdev_err(bp->dev, "DEBUG: %08x: %08x %08x %08x %08x\n", \ + offset, \ + bnx2_shmem_rd(bp, offset), \ + bnx2_shmem_rd(bp, offset + 4), \ + bnx2_shmem_rd(bp, offset + 8), \ + bnx2_shmem_rd(bp, offset + 12)) #if defined(BNX2_VMWARE_BMAPILNX) @@ -8525,7 +8886,57 @@ struct bnx2_ioctl_req struct bnx2_ioctl_get_nic_status_req get_nic_status; } cmd_req; } __attribute__((packed)); - #endif /* BNX2_VMWARE_BMAPILNX */ +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) +#define BNX2_FWDMP_GRC_DUMP 0 +#define BNX2_FWDMP_FTQ_DUMP 1 +#define BNX2_FWDMP_CPU_DUMP 2 +#define BNX2_FWDMP_HSI_DUMP 3 +#define BNX2_FWDMP_MCP_DUMP 4 +#define BNX2_FWDMP_TBDC_DUMP 5 + +#define BNX2_FWDMP_SIZE (64 * 1024) +#define BNX2_FWDMP_MARKER 0x424e5832 +#define BNX2_FWDMP_MARKER_END 0x454E44 +#define BNX2_FWDMP_MARKER_SZ 20 + +#define NIC_NAME_SIZE (sizeof(((struct net_device *)0)->name)) +struct fw_dmp_hdr { + u32 ver; + u32 len; + char name[NIC_NAME_SIZE]; + void *bp; + u32 chip_id; + u32 dmp_size; /*actual firmware/chip dump size */ + u32 flags; + u32 reserved; +}; + +struct chip_core_dmp { + struct fw_dmp_hdr fw_hdr; + u32 fw_dmp_buf[(BNX2_FWDMP_SIZE - + sizeof(struct fw_dmp_hdr))/4]; +}; + +#define BNX2_CP_HSI_START 0x1a0010 +#define BNX2_CP_HSI_SIZE 0x90 + +#define BNX2_COM_HSI_START 0x120010 +#define BNX2_COM_HSI_SIZE 0xf8 + +#define BNX2_RXP_HSI_START 0xe0010 +#define BNX2_RXP_HSI_SIZE 0x31ec + +#define BNX2_TXP_HSI_START 0x60010 +#define BNX2_TXP_HSI_SIZE 0x88 + +#define BNX2_TPAT_HSI_START 0xa0410 +#define BNX2_TPAT_HSI_SIZE 0x6c + +#define BNX2_MCP_DUMP_SIZE 128 +#define BNX2_TBDC_DUMP_SIZE 384 + +#endif /* defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) */ + #endif diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2_fw.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2_fw.h index e930dc7..be0e700 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2_fw.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2_fw.h @@ -16,857 +16,837 @@ */ static u8 bnx2_COM_b06FwText[] = { - 0xcd, 0x7c, 0x7f, 0x70, 0x5b, 0xd7, 0x95, 0xde, 0x79, 0x0f, 0x00, 0x09, - 0x91, 0x14, 0xf5, 0x44, 0xc3, 0x0c, 0xec, 0x30, 0x09, 0x1e, 0xf9, 0x48, - 0xc2, 0x26, 0x9d, 0x3c, 0x31, 0x8c, 0xc2, 0x64, 0x51, 0x1b, 0x06, 0x48, - 0x99, 0x4e, 0xc4, 0x2e, 0x6d, 0x33, 0x5e, 0x4d, 0xab, 0xa6, 0x28, 0x48, - 0x79, 0x1d, 0x8f, 0x33, 0xd1, 0x34, 0x6e, 0xab, 0xa4, 0x8e, 0x05, 0x81, - 0xb4, 0x23, 0x67, 0x21, 0x81, 0x91, 0x28, 0xc9, 0xed, 0x64, 0xba, 0x0c, - 0x48, 0x4a, 0x8e, 0x17, 0x12, 0xe4, 0x1f, 0x49, 0xbc, 0xd9, 0xd8, 0xe6, - 0x32, 0x8a, 0xec, 0xb8, 0xe9, 0x8e, 0x9d, 0x71, 0x3b, 0x9a, 0xae, 0xdb, - 0x6a, 0x14, 0xa7, 0x71, 0xd3, 0x6d, 0xeb, 0x6e, 0xf2, 0x87, 0x77, 0xeb, - 0xe4, 0xf5, 0xfb, 0xee, 0xbb, 0x8f, 0x04, 0x69, 0xda, 0xce, 0xee, 0x4e, - 0x67, 0xca, 0x19, 0xcc, 0x7d, 0xef, 0xbe, 0xfb, 0xf3, 0x9c, 0x73, 0xcf, - 0xf9, 0xce, 0xb9, 0xf7, 0x72, 0x58, 0xa4, 0x49, 0xf4, 0xdf, 0x56, 0xfc, - 0x3e, 0xf6, 0xf9, 0x2f, 0x4c, 0xba, 0x1f, 0x76, 0x3f, 0x2c, 0xee, 0x8e, - 0x7b, 0x4c, 0x91, 0x08, 0xf3, 0x43, 0xf8, 0xc5, 0xf0, 0x1b, 0xd0, 0xcf, - 0x9b, 0xfd, 0x59, 0xf8, 0xed, 0x34, 0x44, 0x72, 0xbf, 0xd0, 0x95, 0xea, - 0xfe, 0xa2, 0xef, 0x50, 0xe7, 0xdd, 0xfe, 0xcc, 0xdf, 0xb2, 0x9c, 0xf5, - 0xb7, 0x68, 0xfb, 0xbd, 0xfe, 0x42, 0xba, 0xd9, 0xad, 0xfa, 0x27, 0x51, - 0x33, 0x25, 0x63, 0x19, 0x47, 0xa2, 0xa1, 0xd4, 0x5b, 0x63, 0x93, 0x8e, - 0x48, 0xba, 0xda, 0x97, 0xc8, 0xca, 0xaf, 0xbd, 0x42, 0x2c, 0x2c, 0xcc, - 0xff, 0x40, 0xea, 0xad, 0x83, 0xcf, 0x7c, 0xdc, 0x7e, 0x63, 0x3e, 0x24, - 0x51, 0x2b, 0x65, 0x19, 0x56, 0x8f, 0x44, 0x3b, 0x50, 0xe7, 0x1b, 0xbd, - 0x31, 0x53, 0x5a, 0x83, 0xb6, 0x5e, 0xf7, 0x9e, 0xe9, 0x8d, 0xc9, 0x73, - 0x35, 0x4b, 0xce, 0xd7, 0xa2, 0x46, 0xe6, 0x94, 0xec, 0xcf, 0xba, 0x92, - 0x30, 0x9d, 0x66, 0xc9, 0x5b, 0x46, 0x22, 0x9f, 0xfc, 0x88, 0xa4, 0x63, - 0x36, 0x7b, 0x4e, 0x9b, 0x4e, 0x37, 0xf2, 0xd4, 0x60, 0x72, 0xa6, 0xd3, - 0x83, 0x67, 0xe6, 0xcf, 0x81, 0x57, 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0x7c, 0xff, + 0x5f, 0x9d, 0xeb, 0xad, 0xa7, 0x55, 0xe0, 0xf7, 0xf3, 0xff, 0x05, 0x10, + 0xdb, 0xd9, 0x87, 0x2b, 0xf2, 0xc1, 0x0e, 0x15, 0x73, 0x23, 0x7d, 0xab, + 0xe0, 0xd3, 0xd1, 0x78, 0x60, 0xcf, 0x8d, 0xee, 0xf3, 0x8d, 0x3e, 0x28, + 0xfb, 0x88, 0xaa, 0x7b, 0x20, 0xfa, 0x3b, 0x15, 0xf6, 0xc5, 0xd8, 0x52, + 0xc6, 0xb8, 0xb3, 0x3c, 0x23, 0xa1, 0x63, 0xe3, 0x12, 0x3e, 0xca, 0x38, + 0x7e, 0x46, 0x4a, 0x31, 0x4f, 0x1e, 0x70, 0xd7, 0xfa, 0x24, 0xdd, 0xe6, + 0xfa, 0xb9, 0x3f, 0x2a, 0xc3, 0xa7, 0x0e, 0x49, 0xe4, 0x18, 0xcb, 0xd6, + 0x9c, 0xe1, 0x40, 0x1f, 0x6d, 0x96, 0x4a, 0x8c, 0xb1, 0xec, 0x88, 0xfa, + 0xd6, 0x7a, 0x79, 0xe2, 0x4a, 0xa4, 0x04, 0xac, 0x50, 0x50, 0xba, 0x05, + 0xe9, 0x8a, 0x0f, 0xf1, 0x70, 0x07, 0xf7, 0x14, 0xfc, 0x4c, 0x23, 0x5f, + 0x89, 0xe8, 0x7b, 0x49, 0x31, 0xd6, 0x3d, 0x04, 0x7f, 0x9b, 0x38, 0x03, + 0xba, 0x63, 0x5c, 0x5a, 0xf8, 0x1e, 0x3a, 0xb6, 0x8a, 0x33, 0xa8, 0x13, + 0x86, 0xdd, 0x98, 0x84, 0xcf, 0xe8, 0xb5, 0x27, 0x4c, 0xe8, 0x8e, 0x93, + 0x7b, 0x24, 0x74, 0x94, 0xcf, 0x8d, 0x7e, 0x10, 0xb1, 0x3b, 0x6c, 0xc3, + 0xf9, 0x2f, 0xa2, 0x3f, 0x96, 0x65, 0xfc, 0xef, 0x70, 0xf1, 0x5e, 0xfd, + 0xfb, 0xfe, 0xef, 0x01, 0xca, 0xfe, 0xff, 0x01, 0x94, 0x1e, 0xd0, 0x94, + 0x6c, 0x4a, 0x00, 0x00, 0x00 }; static const u32 bnx2_COM_b06FwData[(0x0/4) + 1] = { 0x0 }; static const u32 bnx2_COM_b06FwRodata[(0x14/4) + 1] = { - 0x08000d98, 0x08000de0, 0x08000e20, 0x08000e6c, 0x08000ea0, 0x00000000 + 0x08000acc, 0x08000b14, 0x08000b98, 0x08000be4, 0x08000c20, 0x00000000 }; static struct fw_info bnx2_com_fw_06 = { - /* Firmware version: 5.0.0j10 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.3 */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x3, - .start_addr = 0x08000110, + .start_addr = 0x08000118, .text_addr = 0x08000000, - .text_len = 0x4cc8, + .text_len = 0x4a68, .text_index = 0x0, .gz_text = bnx2_COM_b06FwText, .gz_text_len = sizeof(bnx2_COM_b06FwText), @@ -876,15 +856,15 @@ static struct fw_info bnx2_com_fw_06 = { .data_index = 0x0, .data = bnx2_COM_b06FwData, - .sbss_addr = 0x08004d00, + .sbss_addr = 0x08004aa0, .sbss_len = 0x38, .sbss_index = 0x0, - .bss_addr = 0x08004d38, + .bss_addr = 0x08004ad8, .bss_len = 0xc4, .bss_index = 0x0, - .rodata_addr = 0x08004cc8, + .rodata_addr = 0x08004a68, .rodata_len = 0x14, .rodata_index = 0x0, .rodata = bnx2_COM_b06FwRodata, @@ -907,1242 +887,1215 @@ static const struct cpu_reg cpu_reg_com = { }; static u8 bnx2_CP_b06FwText[] = { - 0xbd, 0xbc, 0x7d, 0x78, 0x13, 0xe7, 0x99, 0x2f, 0xfc, 0x9b, 0x91, 0x64, - 0xcb, 0xdf, 0x63, 0x23, 0x88, 0x48, 0xbd, 0xa0, 0xc1, 0x23, 0x5b, 0xc4, - 0x4e, 0x3a, 0x02, 0x93, 0x28, 0x59, 0x35, 0x56, 0x8d, 0x01, 0x13, 0x68, - 0x62, 0xb6, 0x6c, 0xeb, 0xf4, 0xe5, 0x6d, 0x14, 0x30, 0xe0, 0x10, 0x92, - 0x3a, 0xdb, 0xec, 0x7b, 0x9c, 0xbd, 0xb2, 0x6b, 0xd5, 0x18, 0x30, 0x20, - 0x4b, 0xb6, 0x71, 0x80, 0xec, 0xe9, 0xb5, 0x31, 0x18, 0x30, 0x69, 0x65, - 0x8b, 0xa6, 0xd9, 0xd6, 0xdd, 0x43, 0x4f, 0x74, 0x80, 0x24, 0x26, 0x09, - 0x09, 0xdd, 0xe6, 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0x9b, 0xd3, 0xd1, 0xeb, + 0xb5, 0x70, 0x23, 0x65, 0x39, 0xd6, 0xf4, 0x29, 0xa0, 0x26, 0xde, 0xee, + 0xb2, 0xbf, 0x3f, 0xf2, 0xd2, 0x6d, 0xff, 0xfe, 0xfb, 0x23, 0x6f, 0x23, + 0x49, 0x3b, 0xaf, 0x34, 0x6e, 0xc7, 0xf3, 0x36, 0xfe, 0x2b, 0xa8, 0x98, + 0x27, 0x6b, 0xa3, 0x7e, 0x3c, 0x6b, 0x34, 0xfa, 0x6b, 0xe4, 0x99, 0x97, + 0x72, 0xde, 0x8a, 0x7b, 0xeb, 0x18, 0x4b, 0xfe, 0xa3, 0xfd, 0xf8, 0x2f, + 0x60, 0xe7, 0xbe, 0x30, 0xb9, 0xa2, 0x97, 0xf2, 0x87, 0xa7, 0x15, 0xdf, + 0xbf, 0xdc, 0x91, 0x92, 0x7d, 0xec, 0xdd, 0x4c, 0x0c, 0xdf, 0xa6, 0x9f, + 0xbd, 0x2d, 0xfb, 0xb0, 0xc8, 0x75, 0xfe, 0x1c, 0xc1, 0x9a, 0x69, 0xf9, + 0xf7, 0xac, 0xec, 0xfd, 0xbe, 0xb2, 0x1e, 0xf0, 0x60, 0xe1, 0xfb, 0x88, + 0x52, 0x56, 0xea, 0xbd, 0x6d, 0xaf, 0x0b, 0xbb, 0x8c, 0xdf, 0x58, 0x6f, + 0x78, 0x6b, 0x59, 0xf6, 0xad, 0xc2, 0xfd, 0x0b, 0xe2, 0x33, 0x66, 0x14, + 0x72, 0x4d, 0xea, 0x88, 0xae, 0x2e, 0xd7, 0xe9, 0x4d, 0x39, 0x88, 0x7b, + 0x67, 0xad, 0x6e, 0xaf, 0x8c, 0xe1, 0x2b, 0x1f, 0xaa, 0xa3, 0xda, 0xdf, + 0x02, 0xcc, 0xeb, 0x57, 0xe4, 0xf9, 0xf7, 0x7d, 0xca, 0x1a, 0x72, 0x89, + 0x51, 0x81, 0xf3, 0x35, 0xf9, 0xb5, 0x9d, 0xcb, 0x32, 0x7e, 0xd5, 0x2b, + 0x7b, 0xff, 0x4a, 0xed, 0x73, 0xbb, 0x5f, 0xf3, 0x72, 0xbd, 0xc3, 0x85, + 0xf1, 0xd6, 0xda, 0xef, 0x3a, 0x3d, 0x6c, 0x73, 0x18, 0xc7, 0x94, 0x71, + 0x87, 0xbc, 0x1f, 0xec, 0x67, 0x4f, 0xa1, 0x5f, 0xd5, 0x7e, 0x5f, 0xec, + 0x72, 0x1f, 0x22, 0xd7, 0x93, 0x85, 0x3a, 0x7a, 0x38, 0x6a, 0xf7, 0xaf, + 0x32, 0x6f, 0x2b, 0xf6, 0x49, 0x7f, 0x5a, 0x58, 0x6c, 0x63, 0x42, 0xec, + 0xab, 0xbb, 0x94, 0xb1, 0xe9, 0x7c, 0xf3, 0xfd, 0xd8, 0x9e, 0x10, 0x3d, + 0xcb, 0xb7, 0x24, 0x89, 0xc1, 0x36, 0xaf, 0x72, 0xd1, 0xdf, 0x16, 0x23, + 0xad, 0xc5, 0x71, 0xa8, 0x49, 0xde, 0xed, 0x73, 0xd1, 0xa6, 0xe3, 0x28, + 0x23, 0xa7, 0x8d, 0xf2, 0x9a, 0xec, 0x6b, 0x39, 0x62, 0xea, 0xd1, 0xa7, + 0xf1, 0x65, 0x38, 0xae, 0xb2, 0xd7, 0xc0, 0x56, 0xa4, 0x21, 0xd7, 0x4d, + 0xe6, 0x24, 0x53, 0x57, 0x0c, 0xca, 0x68, 0x3b, 0xf6, 0x7e, 0x6c, 0x53, + 0xde, 0xfd, 0x1b, 0x48, 0xc8, 0x3b, 0x68, 0x8d, 0x31, 0x72, 0x41, 0x3c, + 0x9f, 0x91, 0x3d, 0x10, 0xbf, 0xb5, 0xe2, 0xd3, 0x65, 0xaf, 0xe5, 0xd4, + 0x3a, 0x25, 0xc4, 0xa5, 0x40, 0xb8, 0x4a, 0x29, 0xbe, 0x87, 0x76, 0xf9, + 0xef, 0x66, 0xda, 0xcc, 0x05, 0xfb, 0xdd, 0x41, 0x39, 0x8b, 0xa0, 0x25, + 0x25, 0xdf, 0x44, 0xd4, 0x27, 0x56, 0xa2, 0x31, 0x57, 0xcf, 0x7c, 0x3b, + 0xcf, 0x35, 0xc2, 0x58, 0x4d, 0xbb, 0xd9, 0x11, 0x08, 0xdb, 0xef, 0xc8, + 0x2d, 0x4f, 0xd5, 0x07, 0x1f, 0x85, 0xde, 0xf9, 0x16, 0xcb, 0x7f, 0x2a, + 0xfb, 0x82, 0x95, 0xf6, 0xca, 0x98, 0x8a, 0x3e, 0x2e, 0xdf, 0xef, 0xa1, + 0x1e, 0x23, 0xe2, 0x1f, 0x1e, 0xd4, 0x44, 0xc2, 0xf4, 0x43, 0x89, 0xdf, + 0xf2, 0x7e, 0x9d, 0x7e, 0x50, 0xf2, 0xa9, 0x16, 0xe6, 0xfc, 0x2e, 0x7b, + 0xef, 0xb4, 0xee, 0x5f, 0xe3, 0x08, 0x16, 0xf6, 0x30, 0x17, 0xe3, 0xfd, + 0x2f, 0xbc, 0x85, 0xfd, 0xd5, 0xee, 0x39, 0x8c, 0x6f, 0x96, 0xbd, 0x77, + 0x60, 0x83, 0x8d, 0x0d, 0x9a, 0xa1, 0x1f, 0xfb, 0xa5, 0xa3, 0x1b, 0x4f, + 0x2e, 0x30, 0xba, 0x8e, 0xab, 0xb9, 0xb4, 0x8f, 0x38, 0x71, 0xbd, 0x23, + 0xba, 0x97, 0xff, 0xfd, 0x2f, 0x2a, 0xf2, 0xbe, 0xb4, 0xd4, 0xd5, 0x83, + 0x6b, 0xd5, 0xe2, 0x3b, 0xda, 0xf2, 0xde, 0x85, 0xde, 0xfe, 0x4d, 0xa5, + 0x1b, 0x5b, 0x43, 0x46, 0xdb, 0x36, 0x45, 0x5f, 0xf1, 0xb7, 0x8a, 0xee, + 0x0f, 0x29, 0x52, 0x2e, 0x88, 0x9b, 0xb2, 0x97, 0x63, 0xa7, 0x8b, 0x7d, + 0x1c, 0x4e, 0xe8, 0xe1, 0x69, 0x2c, 0x7b, 0xde, 0x34, 0x7c, 0xef, 0xb1, + 0xcd, 0x9f, 0xf0, 0xd8, 0x8b, 0x20, 0x96, 0xda, 0xed, 0x46, 0xe7, 0xbb, + 0xec, 0xef, 0x99, 0xb6, 0x33, 0x26, 0xc8, 0x77, 0x6b, 0x62, 0xd0, 0x92, + 0x75, 0x34, 0x31, 0xbd, 0xff, 0x16, 0x48, 0x2e, 0x7d, 0x3f, 0x03, 0xb6, + 0x07, 0xde, 0x48, 0x37, 0xe6, 0x2d, 0x30, 0x7c, 0x8b, 0x54, 0xbb, 0x7e, + 0x50, 0xbe, 0x01, 0xb4, 0x94, 0xe3, 0x1c, 0x86, 0xb4, 0x91, 0xb3, 0xb4, + 0x79, 0xd5, 0x76, 0x9d, 0x05, 0xea, 0x27, 0xe1, 0xba, 0xfa, 0x57, 0x56, + 0x5a, 0x83, 0x56, 0x6b, 0x48, 0x9d, 0xf8, 0x5e, 0x0d, 0xff, 0x51, 0x3d, + 0xc1, 0x95, 0x5f, 0x5a, 0x98, 0x21, 0xf5, 0x64, 0xdf, 0xda, 0xe7, 0x70, + 0x37, 0xf9, 0x65, 0xb9, 0x21, 0xfe, 0xa8, 0x47, 0xbf, 0x44, 0x5e, 0x59, + 0x6e, 0x7f, 0x3b, 0x4b, 0x62, 0x49, 0x07, 0xf1, 0xac, 0x1b, 0x5a, 0x48, + 0xef, 0xbf, 0x42, 0x95, 0xef, 0x08, 0x3d, 0x26, 0x7b, 0x77, 0x0e, 0x36, + 0xa8, 0xf9, 0x3d, 0x3e, 0xb1, 0x8f, 0xfd, 0x26, 0x11, 0xfb, 0x2a, 0x97, + 0x6f, 0x12, 0xd5, 0xd9, 0xef, 0xa8, 0x74, 0x24, 0x1c, 0x85, 0x3d, 0x8b, + 0x97, 0xbf, 0xa7, 0xb9, 0x81, 0x1c, 0x7e, 0xa3, 0x7c, 0x3b, 0x8f, 0x63, + 0xdd, 0x94, 0x90, 0x45, 0xad, 0xff, 0x03, 0x6e, 0x1f, 0x8c, 0x82, 0x98, + 0x56, 0x00, 0x00, 0x00 }; static const u32 bnx2_CP_b06FwData[(0x84/4) + 1] = { 0x00000000, 0x0000001b, 0x0000000f, 0x0000000a, 0x00000008, 0x00000006, @@ -2151,52 +2104,52 @@ static const u32 bnx2_CP_b06FwData[(0x84/4) + 1] = { 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000001, 0x00000001, 0x00000001, 0x00000000 }; -static const u32 bnx2_CP_b06FwRodata[(0x154/4) + 1] = { - 0x08000f58, 0x08000db0, 0x08000fec, 0x08001094, 0x08000f80, 0x08000fc0, - 0x080011cc, 0x08000dcc, 0x080011f0, 0x08000e1c, 0x08001634, 0x080015dc, - 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x0800127c, 0x0800127c, 0x08000dcc, - 0x08000dcc, 0x08001580, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, - 0x080013f0, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, - 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, - 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000fe0, 0x08000dcc, 0x08000dcc, - 0x08001530, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, - 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, - 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, 0x08000dcc, - 0x0800145c, 0x08000dcc, 0x08000dcc, 0x08001370, 0x080012e0, 0x08002e94, - 0x08002e9c, 0x08002e64, 0x08002e70, 0x08002e7c, 0x08002e88, 0x080046b4, - 0x08003f00, 0x08004634, 0x080046b4, 0x080046b4, 0x080044b4, 0x080046b4, - 0x080046fc, 0x08005524, 0x080054e4, 0x080054b0, 0x08005484, 0x08005460, - 0x0800541c, 0x00000000 }; +static const u32 bnx2_CP_b06FwRodata[(0x158/4) + 1] = { + 0x08000f24, 0x08000d6c, 0x08000fb8, 0x08001060, 0x08000f4c, 0x08000f8c, + 0x08001194, 0x08000d88, 0x080011b8, 0x08000dd8, 0x08001554, 0x0800151c, + 0x08000d88, 0x08000d88, 0x08000d88, 0x08001240, 0x08001240, 0x08000d88, + 0x08000d88, 0x080014e0, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, + 0x080013b4, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, + 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, + 0x08000d88, 0x08000d88, 0x08000d88, 0x08000fac, 0x08000d88, 0x08000d88, + 0x08001678, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, + 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, + 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, 0x08000d88, + 0x08001410, 0x08000d88, 0x08000d88, 0x08001334, 0x080012a4, 0x08001e2c, + 0x08001efc, 0x08001f14, 0x08001f28, 0x08001f38, 0x08001e2c, 0x08001e2c, + 0x08001e2c, 0x08001ed8, 0x08002e14, 0x08002e1c, 0x08002de4, 0x08002df0, + 0x08002dfc, 0x08002e08, 0x080052f4, 0x080052b4, 0x08005280, 0x08005254, + 0x08005230, 0x080051ec, 0x00000000 }; static struct fw_info bnx2_cp_fw_06 = { - /* Firmware version: 5.0.0j10 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.3 */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x3, - .start_addr = 0x08000088, + .start_addr = 0x080000a0, .text_addr = 0x08000000, - .text_len = 0x58c4, + .text_len = 0x5694, .text_index = 0x0, .gz_text = bnx2_CP_b06FwText, .gz_text_len = sizeof(bnx2_CP_b06FwText), - .data_addr = 0x08005a40, + .data_addr = 0x08005820, .data_len = 0x84, .data_index = 0x0, .data = bnx2_CP_b06FwData, - .sbss_addr = 0x08005ac4, + .sbss_addr = 0x080058a4, .sbss_len = 0xf1, .sbss_index = 0x0, - .bss_addr = 0x08005bb8, + .bss_addr = 0x08005998, .bss_len = 0x5d8, .bss_index = 0x0, - .rodata_addr = 0x080058c4, - .rodata_len = 0x154, + .rodata_addr = 0x08005694, + .rodata_len = 0x158, .rodata_index = 0x0, .rodata = bnx2_CP_b06FwRodata, }; @@ -2218,766 +2171,758 @@ static const struct cpu_reg cpu_reg_cp = { }; static u8 bnx2_RXP_b06FwText[] = { - 0xec, 0x5b, 0x7f, 0x6c, 0x1c, 0xc7, 0x75, 0x7e, 0xbb, 0x77, 0xa4, 0x4e, - 0x14, 0x79, 0x5c, 0x9d, 0x4e, 0xd4, 0x49, 0x65, 0x92, 0x3b, 0x72, 0x25, - 0x32, 0x26, 0x6b, 0x2f, 0x89, 0x93, 0x7c, 0x4e, 0xcf, 0xf1, 0xf9, 0x8e, - 0xb2, 0xe8, 0x42, 0x80, 0x69, 0x5b, 0x71, 0x85, 0xd4, 0x48, 0x0f, 0x77, - 0xb2, 0x13, 0x14, 0x41, 0xa1, 0xc6, 0xb5, 0x22, 0x38, 0x4e, 0x75, 0x39, - 0xd2, 0xb2, 0xea, 0x9c, 0xb4, 0x4c, 0x24, 0x58, 0x01, 0x92, 0x02, 0x34, - 0x7f, 0x88, 0xaa, 0x7b, 0xf2, 0xda, 0xae, 0x9d, 0xb8, 0x08, 0x6c, 0x11, - 0xb2, 0xac, 0xfa, 0xaf, 0xc0, 0x40, 0x83, 0xd4, 0x7f, 0x04, 0xa9, 0x20, - 0xb5, 0xb2, 0x8b, 0xa2, 0x89, 0x9b, 0xd4, 0xa8, 0x52, 0x2b, 0xda, 0x7e, - 0xdf, 0xec, 0x2e, 0x79, 0x16, 0x54, 0x54, 0x2e, 0xda, 0xfa, 0x9f, 0x1d, - 0xe0, 0xb0, 0x3b, 0xb3, 0x6f, 0xde, 0xbc, 0x79, 0xf3, 0xde, 0xf7, 0xde, - 0xcc, 0x90, 0xfb, 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0x4a, 0xbf, 0xca, 0xa1, 0x16, 0x00, 0x53, 0xe8, + 0xeb, 0x89, 0xc0, 0x7e, 0x77, 0x42, 0xe7, 0xe7, 0x99, 0xc3, 0x99, 0x83, + 0x4c, 0x6d, 0xf6, 0x51, 0x20, 0x3f, 0x66, 0xd8, 0x9f, 0x03, 0xdc, 0x36, + 0xe3, 0xda, 0x85, 0x6a, 0x51, 0xc9, 0xad, 0x5a, 0xbd, 0x53, 0xe9, 0x94, + 0x5a, 0xf5, 0xa7, 0x80, 0x8b, 0x8c, 0x98, 0xa9, 0x82, 0xd7, 0xdf, 0x26, + 0xd5, 0x2a, 0xdb, 0x32, 0xd4, 0xae, 0x68, 0xca, 0xcf, 0x75, 0x59, 0xb2, + 0x02, 0xdb, 0xa7, 0xba, 0x6a, 0xe3, 0x37, 0x8a, 0x5f, 0x02, 0xbf, 0xfb, + 0xa1, 0x0f, 0x68, 0x8f, 0x31, 0xb7, 0xd5, 0xd9, 0xb2, 0x7f, 0x9b, 0xaa, + 0x1d, 0xbb, 0x5c, 0x21, 0xde, 0x74, 0x3c, 0xab, 0x50, 0x65, 0xbb, 0x35, + 0xd6, 0x47, 0xb9, 0x39, 0xea, 0xc9, 0xc1, 0x37, 0xbd, 0xfa, 0xbe, 0xff, + 0x02, 0x30, 0xca, 0x6a, 0x17, 0xf4, 0x72, 0x00, 0x00, 0x00 }; static const u32 bnx2_RXP_b06FwData[(0x0/4) + 1] = { 0x0 }; static const u32 bnx2_RXP_b06FwRodata[(0x24/4) + 1] = { - 0x080033f8, 0x080033f8, 0x08003370, 0x080033a8, 0x080033dc, 0x08003400, - 0x08003400, 0x08003400, 0x080032e0, 0x00000000 }; + 0x08003430, 0x08003430, 0x080033a8, 0x080033e0, 0x08003414, 0x08003438, + 0x08003438, 0x08003438, 0x08003318, 0x00000000 }; static struct fw_info bnx2_rxp_fw_06 = { - /* Firmware version: 5.0.0j10 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.3 */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x3, - .start_addr = 0x080031d8, + .start_addr = 0x08003210, .text_addr = 0x08000000, - .text_len = 0x75d4, + .text_len = 0x72f0, .text_index = 0x0, .gz_text = bnx2_RXP_b06FwText, .gz_text_len = sizeof(bnx2_RXP_b06FwText), @@ -2987,15 +2932,15 @@ static struct fw_info bnx2_rxp_fw_06 = { .data_index = 0x0, .data = bnx2_RXP_b06FwData, - .sbss_addr = 0x08007620, - .sbss_len = 0x58, + .sbss_addr = 0x08007340, + .sbss_len = 0x4c, .sbss_index = 0x0, - .bss_addr = 0x08007678, - .bss_len = 0x450, + .bss_addr = 0x0800738c, + .bss_len = 0x440, .bss_index = 0x0, - .rodata_addr = 0x080075d4, + .rodata_addr = 0x080072f0, .rodata_len = 0x24, .rodata_index = 0x0, .rodata = bnx2_RXP_b06FwRodata, @@ -3018,571 +2963,553 @@ static const struct cpu_reg cpu_reg_rxp = { }; static u8 bnx2_rv2p_proc1[] = { - /* Date: 08/30/2010 16:07 */ -#define RV2P_PROC1_MAX_BD_PAGE_LOC 9 + /* Date: 09/14/2010 09:06 */ +#define RV2P_PROC1_MAX_BD_PAGE_LOC 9 #define RV2P_PROC1_BD_PAGE_SIZE_MSK 0xffff #define RV2P_PROC1_BD_PAGE_SIZE ((BCM_PAGE_SIZE / 16) - 1) - 0xa5, 0x56, 0x4f, 0x68, 0x14, 0x67, 0x14, 0x7f, 0xbb, 0x9b, 0x99, 0xd9, - 0x4c, 0xf6, 0x9f, 0x18, 0xd3, 0x25, 0x0d, 0x66, 0x15, 0x2f, 0x59, 0x27, - 0x24, 0xab, 0x1e, 0x3c, 0x58, 0x6c, 0x05, 0x09, 0x54, 0x2b, 0x12, 0x10, - 0x44, 0x0a, 0xea, 0x62, 0x7b, 0xf2, 0xa8, 0x17, 0x41, 0x3a, 0x44, 0x22, - 0x18, 0xbc, 0xe4, 0x60, 0x40, 0x11, 0xcc, 0xa9, 0x4a, 0x90, 0x76, 0xa7, - 0xbd, 0x85, 0xd2, 0x14, 0x5a, 0x7a, 0xea, 0x31, 0x87, 0xb6, 0x88, 0x31, - 0x8a, 0x0a, 0xad, 0x87, 0x9e, 0xc4, 0x8b, 0x3b, 0x7e, 0xef, 0xcf, 0x37, - 0xf3, 0xcd, 0xe7, 0x26, 0x11, 0x1a, 0x08, 0x3f, 0xbe, 0x37, 0xef, 0xbd, - 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bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 }; static struct fw_info bnx2_tpat_fw_06 = { - /* Firmware version: 5.0.0j10 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.3 */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x3, - .start_addr = 0x08000488, + .start_addr = 0x08000490, .text_addr = 0x08000400, - .text_len = 0x175c, + .text_len = 0x17d4, .text_index = 0x0, .gz_text = bnx2_TPAT_b06FwText, .gz_text_len = sizeof(bnx2_TPAT_b06FwText), @@ -3592,11 +3519,11 @@ static struct fw_info bnx2_tpat_fw_06 = { .data_index = 0x0, .data = bnx2_TPAT_b06FwData, - .sbss_addr = 0x08001b80, + .sbss_addr = 0x08001c00, .sbss_len = 0x44, .sbss_index = 0x0, - .bss_addr = 0x08001bc4, + .bss_addr = 0x08001c44, .bss_len = 0x450, .bss_index = 0x0, @@ -3623,896 +3550,900 @@ static const struct cpu_reg cpu_reg_tpat = { }; static u8 bnx2_TXP_b06FwText[] = { - 0x9d, 0x7b, 0x0b, 0x70, 0x5b, 0xd7, 0x79, 0xe6, 0x77, 0x00, 0x90, 0x04, - 0xf8, 0x00, 0x41, 0x19, 0x92, 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0x8c, 0x57, 0xa2, 0x0f, 0x63, 0x75, 0x8e, 0x5c, 0x62, 0xc4, + 0x2c, 0x71, 0x78, 0x9b, 0xcc, 0xa9, 0x83, 0x56, 0x25, 0x63, 0xfe, 0x0c, + 0xce, 0x64, 0x5f, 0xc4, 0xcb, 0x97, 0xff, 0x8f, 0x90, 0xf1, 0xd2, 0xb5, + 0x6e, 0x8b, 0x21, 0xb9, 0x43, 0xf8, 0x4b, 0xd7, 0x1a, 0x12, 0x87, 0x7e, + 0xb9, 0x52, 0x9e, 0x6b, 0x2b, 0x8b, 0x37, 0xff, 0x91, 0xec, 0xcb, 0x4b, + 0xe3, 0x2f, 0xae, 0x3d, 0xad, 0x4b, 0xdb, 0xc4, 0xd7, 0x1c, 0xd7, 0xe5, + 0xbc, 0x7a, 0x63, 0xa3, 0xce, 0xff, 0xb5, 0xde, 0xd6, 0xb2, 0xdb, 0xd9, + 0x77, 0x33, 0x6f, 0x68, 0x75, 0x30, 0xa1, 0x33, 0x71, 0x9d, 0x63, 0x83, + 0x6d, 0x89, 0x6b, 0x9d, 0xcf, 0x0e, 0xf2, 0x09, 0x67, 0xdd, 0x3f, 0xe1, + 0xda, 0xa6, 0x97, 0x1c, 0x4b, 0x7e, 0xde, 0x96, 0x70, 0xcf, 0xfb, 0x77, + 0x27, 0x74, 0xf7, 0x8c, 0x3e, 0x6b, 0x9c, 0xfc, 0xec, 0x49, 0x5c, 0x73, + 0xc5, 0xff, 0x37, 0x02, 0xff, 0x1f, 0x8d, 0xa6, 0x0f, 0xfa, 0x00, 0x3c, + 0x00, 0x00, 0x00 }; static const u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 }; static const u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 }; static struct fw_info bnx2_txp_fw_06 = { - /* Firmware version: 5.0.0j10 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.3 */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x3, .start_addr = 0x080000a8, .text_addr = 0x08000000, - .text_len = 0x3be8, + .text_len = 0x3bfc, .text_index = 0x0, .gz_text = bnx2_TXP_b06FwText, .gz_text_len = sizeof(bnx2_TXP_b06FwText), @@ -4522,11 +4453,11 @@ static struct fw_info bnx2_txp_fw_06 = { .data_index = 0x0, .data = bnx2_TXP_b06FwData, - .sbss_addr = 0x08003c00, + .sbss_addr = 0x08003c20, .sbss_len = 0x68, .sbss_index = 0x0, - .bss_addr = 0x08003c68, + .bss_addr = 0x08003c88, .bss_len = 0x14c, .bss_index = 0x0, diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2_fw2.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2_fw2.h index bbb007b..7ef0f84 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2_fw2.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2_fw2.h @@ -16,894 +16,950 @@ */ static u8 bnx2_COM_b09FwText[] = { - 0xcd, 0x7c, 0x7d, 0x70, 0x1b, 0xe7, 0x99, 0xdf, 0xb3, 0x8b, 0x05, 0x09, - 0x82, 0x14, 0xb5, 0xa4, 0x10, 0x06, 0x56, 0x10, 0x19, 0x20, 0x96, 0x14, - 0x6d, 0x31, 0xee, 0x4a, 0x81, 0x64, 0xba, 0xd9, 0xb3, 0x11, 0x00, 0x92, - 0xe5, 0x1b, 0xc5, 0x47, 0x8b, 0xca, 0xc5, 0xed, 0x68, 0x3a, 0x2c, 0x48, - 0x39, 0x72, 0xc6, 0x4d, 0x95, 0x38, 0x7f, 0x78, 0xda, 0xcc, 0x79, 0x0d, - 0x52, 0x3a, 0xa5, 0x03, 0x91, 0x30, 0x4d, 0x2b, 0x77, 0x9d, 0xbb, 0x1e, - 0x0c, 0x52, 0xb2, 0x33, 0x81, 0xc4, 0xd8, 0x4e, 0xda, 0xf4, 0x23, 0x63, - 0x0d, 0x25, 0x39, 0xe9, 0xc7, 0x4d, 0x9d, 0x4e, 0xe6, 0x26, 0x93, 0xf3, - 0x1f, 0xaa, 0x9c, 0xbb, 0xb8, 0xed, 0xb5, 0xcd, 0x74, 0xd2, 0x39, 0x5f, - 0xeb, 0x18, 0xfd, 0xfd, 0xde, 0x77, 0x97, 0x84, 0x20, 0xd9, 0x72, 0x32, - 0x73, 0x6d, 0x39, 0x03, 0xbd, 0xbb, 0xef, 0xe7, 0xf3, 0xbe, 0xcf, 0xf7, - 0xf3, 0x3e, 0xab, 0x92, 0x48, 0x5c, 0x82, 0xbf, 0x2d, 0xf8, 0xed, 0xfd, - 0x7b, 0x7f, 0x7f, 0xc6, 0xbd, 0xc7, 0xbd, 0x47, 0xee, 0xdd, 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0x3b, 0x59, 0x52, 0x78, 0x63, 0x1e, + 0x83, 0xcc, 0x84, 0xbd, 0x1f, 0x45, 0xf8, 0xee, 0xad, 0x3e, 0x1f, 0x60, + 0x3d, 0x9e, 0x6b, 0xfc, 0x1e, 0x4d, 0xd8, 0xff, 0x16, 0x1c, 0xeb, 0x3f, + 0xf0, 0xeb, 0x59, 0x17, 0xc0, 0xbe, 0x7d, 0x46, 0x9f, 0xff, 0x83, 0xf7, + 0x0b, 0xef, 0x81, 0xf6, 0x17, 0xf8, 0xfe, 0xaa, 0x2c, 0xd5, 0xf1, 0x3b, + 0xc5, 0x3c, 0xf4, 0xed, 0xc2, 0xf3, 0xb3, 0xe5, 0xba, 0x21, 0xd5, 0x53, + 0xfa, 0x9b, 0x6c, 0x4b, 0xdf, 0x7c, 0xbf, 0x91, 0x55, 0xb9, 0xb6, 0xc1, + 0xf7, 0x62, 0xf6, 0xdc, 0xc0, 0xf3, 0xb8, 0x6a, 0x7d, 0x63, 0x39, 0xdf, + 0xc9, 0xa8, 0x2c, 0x35, 0xc3, 0xb6, 0x7d, 0xc6, 0xf2, 0x82, 0xf9, 0x2d, + 0xbe, 0x2b, 0xa3, 0x72, 0x85, 0x17, 0x92, 0x0b, 0xfc, 0x3e, 0x9f, 0xbf, + 0xf7, 0x11, 0xdf, 0x56, 0x55, 0x7c, 0xbb, 0x86, 0x03, 0xd3, 0x63, 0xde, + 0x28, 0xf9, 0x95, 0x79, 0xa5, 0x5c, 0x37, 0x16, 0x6d, 0x3b, 0x23, 0x59, + 0xf5, 0xcd, 0x1d, 0x53, 0x2c, 0xac, 0xb3, 0x62, 0x33, 0xae, 0xa3, 0xbe, + 0x3b, 0x37, 0x9d, 0x2e, 0xfc, 0xe6, 0x0d, 0x41, 0xce, 0x1a, 0xcf, 0x25, + 0x2d, 0x45, 0x9f, 0xd6, 0xf4, 0xfa, 0x37, 0x9c, 0x66, 0xfc, 0xfa, 0xcd, + 0x4d, 0x74, 0xd1, 0x2c, 0x9f, 0x18, 0x1e, 0xfc, 0xbf, 0xb8, 0xc6, 0xb3, + 0x5f, 0x98, 0x55, 0x00, 0x00, 0x00 }; static const u32 bnx2_COM_b09FwData[(0x0/4) + 1] = { 0x0 }; static const u32 bnx2_COM_b09FwRodata[(0x38/4) + 1] = { - 0x80080100, 0x80080080, 0x80080000, 0x00000c80, 0x00003200, 0x80080240, - 0x08000f54, 0x08000fac, 0x08000ff0, 0x08001088, 0x080010c8, 0x80080100, + 0x80080240, 0x80080100, 0x80080080, 0x80080000, 0x00000c80, 0x00003200, + 0x08000e98, 0x08000ef4, 0x08000f88, 0x08001028, 0x08001074, 0x80080100, 0x80080080, 0x80080000, 0x00000000 }; static struct fw_info bnx2_com_fw_09 = { - /* Firmware version: 5.0.0j17 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.1b */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x1, - .start_addr = 0x08000110, + .start_addr = 0x08000118, .text_addr = 0x08000000, - .text_len = 0x523c, + .text_len = 0x5594, .text_index = 0x0, .gz_text = bnx2_COM_b09FwText, .gz_text_len = sizeof(bnx2_COM_b09FwText), @@ -913,1177 +969,1243 @@ static struct fw_info bnx2_com_fw_09 = { .data_index = 0x0, .data = bnx2_COM_b09FwData, - .sbss_addr = 0x080052a0, + .sbss_addr = 0x08005608, .sbss_len = 0x30, .sbss_index = 0x0, - .bss_addr = 0x080052d0, - .bss_len = 0x10c, + .bss_addr = 0x08005638, + .bss_len = 0x11c, .bss_index = 0x0, - .rodata_addr = 0x0800523c, + .rodata_addr = 0x08005594, .rodata_len = 0x38, .rodata_index = 0x0, .rodata = bnx2_COM_b09FwRodata, }; static u8 bnx2_CP_b09FwText[] = { - 0xa5, 0x7c, 0x0d, 0x74, 0x53, 0xd7, 0x95, 0xee, 0x77, 0xaf, 0x64, 0x5b, - 0xb6, 0x65, 0xfb, 0xda, 0x08, 0x47, 0x24, 0x1e, 0x90, 0xf0, 0x95, 0x71, - 0xb0, 0x49, 0xae, 0x8c, 0x49, 0x94, 0x8c, 0x12, 0x54, 0x63, 0x88, 0x29, - 0x34, 0x31, 0x84, 0x24, 0xce, 0x4c, 0xd6, 0x8a, 0x86, 0x40, 0x43, 0x52, - 0x3a, 0x8f, 0xce, 0xcb, 0xeb, 0x73, 0x33, 0x74, 0x7c, 0x8b, 0x01, 0x3b, - 0x70, 0x2d, 0xc9, 0x8e, 0xf9, 0xc9, 0xac, 0xac, 0x89, 0x30, 0xc6, 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0xbd, 0xd1, 0x23, 0xca, 0xfd, 0xb2, 0xfe, 0x2e, 0xff, + 0x90, 0x02, 0xa6, 0x62, 0xe6, 0xa4, 0xed, 0x0e, 0xa5, 0x3f, 0x37, 0x73, + 0x4c, 0xb3, 0x12, 0xe5, 0x4c, 0x6b, 0x55, 0xb1, 0x99, 0x63, 0xeb, 0x53, + 0x76, 0xe7, 0x8e, 0x28, 0x7b, 0x72, 0x17, 0xda, 0xe3, 0x71, 0x2b, 0xde, + 0x29, 0x32, 0x44, 0xa7, 0xfd, 0xd4, 0x45, 0xf4, 0x2a, 0xfd, 0xf6, 0xe8, + 0xb4, 0xde, 0xe5, 0xe4, 0xb9, 0x45, 0xbd, 0x37, 0x50, 0x6f, 0x63, 0x11, + 0xd1, 0xe9, 0xca, 0x99, 0xba, 0x97, 0xc6, 0xf9, 0xb7, 0xe7, 0x65, 0x15, + 0xef, 0x7b, 0x96, 0xbf, 0xcb, 0xbd, 0x52, 0x37, 0xfc, 0xbf, 0xfd, 0x25, + 0xf1, 0x9f, 0x48, 0x57, 0x00, 0x00, 0x00 }; static const u32 bnx2_CP_b09FwData[(0x84/4) + 1] = { 0x00000000, 0x0000001b, 0x0000000f, 0x0000000a, 0x00000008, 0x00000006, @@ -2093,1234 +2215,1501 @@ static const u32 bnx2_CP_b09FwData[(0x84/4) + 1] = { 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000001, 0x00000001, 0x00000001, 0x00000000 }; static const u32 bnx2_CP_b09FwRodata[(0x1c0/4) + 1] = { - 0x80080100, 0x80080080, 0x80080000, 0x00000c00, 0x00003080, 0x08001020, - 0x080010cc, 0x080010e4, 0x080010f8, 0x0800110c, 0x08001020, 0x08001020, - 0x08001140, 0x08001178, 0x08001188, 0x080011b0, 0x080018a0, 0x080018a0, - 0x080018d8, 0x080018d8, 0x080018ec, 0x080018bc, 0x08001b14, 0x08001ae0, - 0x08001b6c, 0x08001b6c, 0x08001bf4, 0x08001b24, 0x80080240, 0x08002280, - 0x080020cc, 0x080022a8, 0x08002340, 0x08002490, 0x080024dc, 0x08002600, - 0x08002508, 0x0800258c, 0x0800213c, 0x08002aa8, 0x08002a4c, 0x080020e8, - 0x080020e8, 0x080020e8, 0x08002674, 0x08002674, 0x080020e8, 0x080020e8, - 0x08002924, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x08002984, - 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, - 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, - 0x080020e8, 0x080020e8, 0x080024fc, 0x080020e8, 0x080020e8, 0x080029f4, - 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, - 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, - 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x080020e8, 0x08002848, - 0x080020e8, 0x080020e8, 0x080027bc, 0x08002718, 0x08003860, 0x08003834, - 0x08003800, 0x080037d4, 0x080037b4, 0x08003768, 0x80080100, 0x80080080, - 0x80080000, 0x80080080, 0x080047c8, 0x08004800, 0x08004748, 0x080047c8, - 0x080047c8, 0x08004528, 0x080047c8, 0x08004b9c, 0x00000000 }; + 0x80080100, 0x80080080, 0x80080000, 0x00000c00, 0x00003080, 0x080011d0, + 0x0800127c, 0x08001294, 0x080012a8, 0x080012bc, 0x080011d0, 0x080011d0, + 0x080012f0, 0x0800132c, 0x08001340, 0x08001388, 0x08001a8c, 0x08001a8c, + 0x08001ac4, 0x08001ac4, 0x08001ad8, 0x08001aa8, 0x08001d00, 0x08001ccc, + 0x08001d58, 0x08001d58, 0x08001de0, 0x08001d10, 0x80080240, 0x08002734, + 0x0800256c, 0x0800275c, 0x080027f4, 0x0800293c, 0x08002988, 0x08002aac, + 0x080029b4, 0x08002a38, 0x080025dc, 0x08002edc, 0x08002ea4, 0x08002588, + 0x08002588, 0x08002588, 0x08002b20, 0x08002b20, 0x08002588, 0x08002588, + 0x08002dd0, 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002e0c, + 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, + 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, + 0x08002588, 0x08002588, 0x080029a8, 0x08002588, 0x08002588, 0x08002e68, + 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, + 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, + 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002588, 0x08002cf4, + 0x08002588, 0x08002588, 0x08002c68, 0x08002bc4, 0x08003ce4, 0x08003cb8, + 0x08003c84, 0x08003c58, 0x08003c38, 0x08003bec, 0x80080100, 0x80080080, + 0x80080000, 0x80080080, 0x08004c64, 0x08004c9c, 0x08004be4, 0x08004c64, + 0x08004c64, 0x080049b8, 0x08004c64, 0x08005050, 0x00000000 }; static struct fw_info bnx2_cp_fw_09 = { - /* Firmware version: 5.0.0j17 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.1b */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x1, - .start_addr = 0x08000088, + .start_addr = 0x080000a0, .text_addr = 0x08000000, - .text_len = 0x528c, + .text_len = 0x5744, .text_index = 0x0, .gz_text = bnx2_CP_b09FwText, .gz_text_len = sizeof(bnx2_CP_b09FwText), - .data_addr = 0x08005480, + .data_addr = 0x08005920, .data_len = 0x84, .data_index = 0x0, .data = bnx2_CP_b09FwData, - .sbss_addr = 0x08005508, - .sbss_len = 0x9d, + .sbss_addr = 0x080059b0, + .sbss_len = 0xa8, .sbss_index = 0x0, - .bss_addr = 0x080055a8, + .bss_addr = 0x08005a58, .bss_len = 0x19c, .bss_index = 0x0, - .rodata_addr = 0x0800528c, + .rodata_addr = 0x08005744, .rodata_len = 0x1c0, .rodata_index = 0x0, .rodata = bnx2_CP_b09FwRodata, }; static u8 bnx2_RXP_b09FwText[] = { - 0xec, 0x5c, 0x7d, 0x70, 0x14, 0x65, 0x9a, 0xff, 0xbd, 0x3d, 0x3d, 0x49, - 0x27, 0x99, 0x24, 0x9d, 0x61, 0x92, 0x0c, 0xe8, 0x4a, 0xf7, 0xa6, 0x27, - 0x89, 0x04, 0xb1, 0x67, 0x32, 0x09, 0x61, 0xab, 0xd7, 0xeb, 0x03, 0x54, - 0xac, 0xf5, 0x23, 0x80, 0xec, 0x65, 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0xde, 0x67, 0x83, + 0xd2, 0x1e, 0xfa, 0x3d, 0x85, 0x23, 0x35, 0xc6, 0x3d, 0xd4, 0x67, 0x6d, + 0xbf, 0xe0, 0x89, 0x26, 0xa4, 0x68, 0x63, 0xce, 0x91, 0x5f, 0xb2, 0x2d, + 0x19, 0xc3, 0x34, 0x1e, 0x27, 0x37, 0x4b, 0xa5, 0xa5, 0x46, 0x53, 0xec, + 0xf3, 0x2c, 0xd6, 0xf7, 0xf8, 0xb5, 0x57, 0xc9, 0xbb, 0x6e, 0x3e, 0x67, + 0x9b, 0x9b, 0xa8, 0x07, 0x99, 0xe3, 0x0a, 0x0c, 0x65, 0x72, 0xf7, 0x79, + 0x70, 0x68, 0xa7, 0x0b, 0x83, 0x19, 0x7f, 0x9b, 0xd3, 0xb9, 0x65, 0xae, + 0x3c, 0x0f, 0x32, 0x3a, 0x68, 0x8f, 0x73, 0xee, 0x05, 0x7a, 0x7c, 0x83, + 0x38, 0x42, 0xd6, 0xc2, 0x3f, 0x89, 0x6c, 0x39, 0xfb, 0x5a, 0x99, 0x3a, + 0x37, 0x97, 0xf3, 0xd7, 0xc8, 0xdf, 0xff, 0x03, 0x3a, 0x15, 0xe7, 0x82, + 0x5c, 0x92, 0x00, 0x00, 0x00 }; static const u32 bnx2_RXP_b09FwData[(0x0/4) + 1] = { 0x0 }; -static const u32 bnx2_RXP_b09FwRodata[(0x124/4) + 1] = { - 0x0800330c, 0x0800330c, 0x080033e8, 0x080033bc, 0x080033a0, 0x080032f0, - 0x080032f0, 0x080032f0, 0x08003314, 0x80080100, 0x80080080, 0x80080000, +static const u32 bnx2_RXP_b09FwRodata[(0x33c/4) + 1] = { + 0x08003344, 0x08003344, 0x08003420, 0x080033f4, 0x080033d8, 0x08003328, + 0x08003328, 0x08003328, 0x0800334c, 0x80080100, 0x80080080, 0x80080000, 0x5f865437, 0xe4ac62cc, 0x50103a45, 0x36621985, 0xbf14c0e8, 0x1bc27a1e, - 0x84f4b556, 0x094ea6fe, 0x7dda01e7, 0xc04d7481, 0x08007b1c, 0x08007b48, - 0x08007b28, 0x08007a64, 0x08007b28, 0x08007b68, 0x08007b28, 0x08007a64, - 0x08007a64, 0x08007a64, 0x08007a64, 0x08007a64, 0x08007a64, 0x08007a64, - 0x08007a64, 0x08007a64, 0x08007a64, 0x08007b58, 0x08007b38, 0x08007a64, - 0x08007a64, 0x08007a64, 0x08007a64, 0x08007a64, 0x08007a64, 0x08007a64, - 0x08007a64, 0x08007a64, 0x08007a64, 0x08007a64, 0x08007a64, 0x08007b38, - 0x08008124, 0x08007fcc, 0x080080ec, 0x08007fcc, 0x080080bc, 0x08007eb4, - 0x08007fcc, 0x08007fcc, 0x08007fcc, 0x08007fcc, 0x08007fcc, 0x08007fcc, - 0x08007fcc, 0x08007fcc, 0x08007fcc, 0x08007fcc, 0x08007fcc, 0x08007fcc, - 0x08007ff4, 0x00000000 }; + 0x84f4b556, 0x094ea6fe, 0x7dda01e7, 0xc04d7481, 0x08005a74, 0x08005ab8, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a74, 0x08005a5c, + 0x08005a5c, 0x08005ac0, 0x08005a5c, 0x080059d4, 0x08005a5c, 0x08005a5c, + 0x08005ac0, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a94, + 0x08005a5c, 0x08005a94, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a98, + 0x08005a94, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a98, 0x08005a98, 0x08005a5c, + 0x08005a98, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, 0x08005a5c, + 0x08005adc, 0x0800782c, 0x08007a90, 0x08007838, 0x08007628, 0x08007838, + 0x080078c4, 0x08007838, 0x08007628, 0x08007628, 0x08007628, 0x08007628, + 0x08007628, 0x08007628, 0x08007628, 0x08007628, 0x08007628, 0x08007628, + 0x08007858, 0x08007848, 0x08007628, 0x08007628, 0x08007628, 0x08007628, + 0x08007628, 0x08007628, 0x08007628, 0x08007628, 0x08007628, 0x08007628, + 0x08007628, 0x08007628, 0x08007848, 0x080082fc, 0x08008188, 0x080082c4, + 0x08008188, 0x08008294, 0x08008070, 0x08008188, 0x08008188, 0x08008188, + 0x08008188, 0x08008188, 0x08008188, 0x08008188, 0x08008188, 0x08008188, + 0x08008188, 0x08008188, 0x08008188, 0x080081b0, 0x08008d34, 0x08008e90, + 0x08008e70, 0x080088d8, 0x08008d4c, 0x00000000 }; static struct fw_info bnx2_rxp_fw_09 = { - /* Firmware version: 5.0.0j17 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.1b */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x1, - .start_addr = 0x080031d8, + .start_addr = 0x08003210, .text_addr = 0x08000000, - .text_len = 0x819c, + .text_len = 0x9258, .text_index = 0x0, .gz_text = bnx2_RXP_b09FwText, .gz_text_len = sizeof(bnx2_RXP_b09FwText), @@ -3330,787 +3719,653 @@ static struct fw_info bnx2_rxp_fw_09 = { .data_index = 0x0, .data = bnx2_RXP_b09FwData, - .sbss_addr = 0x080082e0, - .sbss_len = 0x60, + .sbss_addr = 0x080095c0, + .sbss_len = 0x7c, .sbss_index = 0x0, - .bss_addr = 0x08008340, - .bss_len = 0x60, + .bss_addr = 0x08009640, + .bss_len = 0x1bc, .bss_index = 0x0, - .rodata_addr = 0x0800819c, - .rodata_len = 0x124, + .rodata_addr = 0x08009258, + .rodata_len = 0x33c, .rodata_index = 0x0, .rodata = bnx2_RXP_b09FwRodata, }; static u8 bnx2_xi_rv2p_proc1[] = { - /* Date: 08/30/2010 15:54 */ + /* Date: 09/14/2010 09:02 */ #define XI_RV2P_PROC1_MAX_BD_PAGE_LOC 9 #define XI_RV2P_PROC1_BD_PAGE_SIZE_MSK 0xffff #define XI_RV2P_PROC1_BD_PAGE_SIZE ((BCM_PAGE_SIZE / 16) - 1) - 0xa5, 0x56, 0xdd, 0x6b, 0x1c, 0x55, 0x14, 0x3f, 0x3b, 0x93, 0x99, 0xd9, - 0xcc, 0x7e, 0x62, 0xb7, 0xe9, 0x12, 0x8b, 0xd9, 0x96, 0x40, 0x49, 0x3a, - 0xa1, 0xd9, 0x9a, 0x07, 0x91, 0x40, 0x4b, 0x5e, 0x0a, 0x26, 0xf8, 0x10, - 0xa9, 0x8a, 0x14, 0x9a, 0x8e, 0x1f, 0x08, 0xf6, 0x45, 0x9f, 0x14, 0xfc, - 0x18, 0xa2, 0xf1, 0x21, 0x14, 0x24, 0x60, 0x03, 0x55, 0xc1, 0x20, 0xf8, - 0x41, 0xec, 0xc3, 0xce, 0x8b, 0x68, 0x2d, 0x0a, 0xd6, 0x17, 0xb1, 0xf8, - 0x50, 0xfa, 0xa0, 0x22, 0xa6, 0x51, 0x5a, 0x5f, 0x44, 0xf0, 0x0f, 0xe8, - 0x8e, 0xf7, 0x7c, 0xdc, 0x9d, 0x99, 0xdb, 0xcd, 0x26, 0x60, 0x20, 0x1c, - 0xee, 0x9d, 0x73, 0xce, 0x3d, 0x1f, 0xbf, 0xf3, 0x3b, 0x5b, 0x07, 0x00, - 0x17, 0xa2, 0x78, 0x4c, 0x49, 0xb0, 0x6d, 0xa7, 0xa8, 0x44, 0x92, 0x80, - 0xd3, 0xc4, 0x33, 0x58, 0x40, 0x67, 0xc8, 0x9f, 0x0b, 0x00, 0x97, 0x81, - 0xff, 0x9c, 0x32, 0x9d, 0xa3, 0x63, 0x72, 0x3e, 0xca, 0x22, 0x3a, 0x5a, - 0x27, 0xed, 0x5b, 0x6b, 0x5a, 0x1f, 0xcf, 0x2f, 0xc0, 0x89, 0x16, 0x4a, - 0x1b, 0x4e, 0x1c, 0x42, 0xf9, 0x30, 0x7c, 0xdb, 0x42, 0xbf, 0x77, 0x13, - 0x88, 0xf0, 0xbc, 0xbf, 0xf3, 0x65, 0x5c, 0x22, 0xbb, 0x2d, 0xf1, 0xf7, - 0xb3, 0xcd, 0xf2, 0xa1, 0xa0, 0xc8, 0x7e, 0x45, 0xc2, 0x54, 0x9d, 0xc4, - 0x4d, 0xf2, 0x7f, 0xfa, 0x34, 0xb8, 0xe8, 0xe7, 0x55, 0xa5, 0x80, 0xe7, - 0x83, 0x85, 0x68, 0x4a, 0xde, 0xb5, 0x58, 0xef, 0xf7, 0xb5, 0x1a, 0xde, - 0xc3, 0xad, 0x39, 0x3c, 0x8f, 0xf8, 0x6f, 0xad, 0xa1, 0xfe, 0x9b, 0x4a, - 0xbf, 0x4c, 0xef, 0x45, 0x13, 0x22, 0xc7, 0xd8, 0xfd, 0xd6, 0x24, 0xda, - 0x2b, 0x9b, 0x49, 0x9d, 0x27, 0xea, 0xdf, 0x49, 0xd8, 0x3f, 0xfa, 0xcd, - 0xfa, 0x6b, 0x2a, 0x7f, 0x45, 0xae, 0x63, 0xc0, 0x32, 0x1f, 0x9f, 0xab, - 0xe2, 0x41, 0xfb, 0x97, 0xd4, 0x7b, 0x28, 0xff, 0x4d, 0xfd, 0xc4, 0x28, - 0xcb, 0x05, 0xb6, 0x53, 0xff, 0x12, 0x37, 0xeb, 0x9f, 0x57, 0xfa, 0xba, - 0x1e, 0xf9, 0xf8, 0xbc, 0x40, 0xe7, 0x25, 0xf9, 0x53, 0x7c, 0x37, 0x92, - 0xbc, 0x3e, 0xec, 0xa2, 0x7f, 0x3d, 0xe9, 0xe5, 0x3f, 0x96, 0xbd, 0xff, - 0x21, 0x19, 0x5c, 0x17, 0x47, 0xd5, 0x25, 0xab, 0x7f, 0x4d, 0xf2, 0x79, - 0x04, 0xc6, 0x2d, 0xc6, 0xc9, 0x10, 0x34, 0xa9, 0x3e, 0x9c, 0xef, 0x03, - 0x22, 0x9f, 0x15, 0x79, 0x55, 0xe4, 0xd7, 0x22, 0xe1, 0x7f, 0x4a, 0xaf, - 0xd0, 0xff, 0x7e, 0xbf, 0xc8, 0xfb, 0x8d, 0xfb, 0x1b, 0x22, 0x8f, 0x19, - 0xf6, 0xc7, 0x45, 0xde, 0x95, 0xfb, 0xc7, 0xe5, 0xfc, 0xa8, 0x61, 0xff, - 0x8e, 0xe0, 0xa6, 0xd0, 0xab, 0x0b, 0xd7, 0xe1, 0x23, 0xc1, 0x31, 0xf6, - 0x5d, 0xbe, 0x4f, 0x68, 0xbd, 0x22, 0xd5, 0x31, 0x8f, 0xa7, 0x0f, 0x06, - 0xe8, 0xb3, 0xda, 0xdc, 0x44, 0x3f, 0xbb, 0x8b, 0x09, 0xc7, 0xf1, 0xae, - 0xd8, 0xfb, 0x9d, 0xab, 0x3b, 0xcc, 0xcd, 0x6c, 0xd0, 0x6f, 0x4e, 0x0e, - 0x48, 0x1e, 0x3f, 0x02, 0xdb, 0x5f, 0x29, 0x84, 0x01, 0x9e, 0x5d, 0x99, - 0x9f, 0x8a, 0xe0, 0x71, 0xd8, 0xc0, 0xb1, 0x27, 0x38, 0x1e, 0x97, 0xfc, - 0x41, 0xe2, 0x45, 0x9c, 0x69, 0x7c, 0xf1, 0xbb, 0x8c, 0x13, 0xd7, 0xc0, - 0xc9, 0xeb, 0xbb, 0xd4, 0xa7, 0x64, 0xe4, 0xf9, 0x72, 0xa2, 0xeb, 0x6e, - 0xc9, 0xf5, 0xb2, 0x8b, 0xf6, 0x45, 0x58, 0x8d, 0x51, 0x7a, 0x8d, 0x0b, - 0x94, 0x77, 0x92, 0xf8, 0x0e, 0xf3, 0xca, 0x6a, 0x4c, 0x6a, 0x4d, 0xff, - 0x6d, 0x7e, 0xe7, 0x82, 0xe6, 0x9f, 0x49, 0xfd, 0x2e, 0xfb, 0xab, 0x88, - 0x3f, 0xcb, 0xd1, 0x71, 0xf3, 0xbd, 0x9f, 0x7b, 0x07, 0xef, 0x51, 0x3a, - 0xb0, 0xfd, 0x0d, 0x7e, 0x3f, 0xab, 0xe2, 0x29, 0xe0, 0x75, 0xe3, 0x9c, - 0xc3, 0xfc, 0xb6, 0x2a, 0xfe, 0xb7, 0x3b, 0x79, 0xbf, 0xa6, 0xfd, 0x1f, - 0x64, 0xff, 0x44, 0xcf, 0x3e, 0x34, 0xec, 0xc3, 0x58, 0xdb, 0xe3, 0xfd, - 0xbe, 0xce, 0x86, 0xd1, 0xcf, 0xd6, 0x9e, 0xf8, 0xef, 0xb7, 0x24, 0xe5, - 0x3f, 0xfe, 0x3e, 0x06, 0x9a, 0xb7, 0x6a, 0x54, 0xb7, 0xa5, 0x53, 0x35, - 0x7a, 0xaf, 0xea, 0xb2, 0x9b, 0x27, 0x6b, 0x2c, 0x9f, 0x91, 0xc4, 0x6f, - 0xfb, 0xc3, 0x54, 0xcf, 0xe7, 0x4a, 0x7c, 0x3e, 0x57, 0x41, 0xfb, 0x7d, - 0x90, 0xda, 0xeb, 0xb8, 0x06, 0xc5, 0x83, 0xef, 0xeb, 0x77, 0x74, 0x1c, - 0xfa, 0x3d, 0xf4, 0x77, 0x53, 0xc5, 0xb3, 0xdb, 0xbb, 0x2c, 0x43, 0x2b, - 0x5f, 0x87, 0xa1, 0x36, 0xcb, 0xf7, 0xa6, 0x51, 0xbf, 0x06, 0x4b, 0x54, - 0xc7, 0x92, 0xee, 0xfb, 0xc2, 0xd3, 0xb4, 0xbf, 0xee, 0x03, 0xc1, 0x43, - 0x23, 0xfc, 0x4a, 0x1e, 0xb6, 0x35, 0xbe, 0x09, 0xbf, 0x82, 0xc3, 0xa1, - 0x86, 0xfb, 0x05, 0xd7, 0xdf, 0xb5, 0x35, 0x4e, 0xf0, 0xfb, 0x84, 0x8e, - 0xaf, 0xb9, 0x5e, 0xe6, 0xb8, 0x2e, 0x95, 0x87, 0xf0, 0x3c, 0x73, 0xe9, - 0x3a, 0xf5, 0xed, 0xf8, 0x7a, 0x2c, 0xf9, 0xd7, 0xf2, 0x38, 0x5e, 0x94, - 0x79, 0x58, 0xa4, 0xb9, 0xad, 0x2a, 0x55, 0x94, 0xa3, 0x10, 0xd1, 0x1e, - 0xb2, 0xfc, 0xef, 0xc9, 0xce, 0x96, 0x7b, 0xf5, 0xde, 0xe1, 0xfc, 0xbc, - 0x6f, 0x31, 0xfe, 0x8b, 0xf9, 0xb9, 0x39, 0x90, 0xe1, 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0x8c, 0xf9, 0xea, 0xb3, 0xd4, 0xf9, 0x51, 0xf9, 0x8b, 0x72, 0x5c, 0xf1, + 0x93, 0xcd, 0x08, 0x8f, 0x43, 0x4e, 0x1e, 0xeb, 0x7a, 0x36, 0x19, 0xae, + 0xbc, 0x1d, 0x71, 0xe7, 0x6d, 0x40, 0x78, 0xfb, 0x67, 0x65, 0x9e, 0xd6, + 0xda, 0xc7, 0xe7, 0xa2, 0x8a, 0xcf, 0xff, 0x17, 0x8f, 0x19, 0x0f, 0x77, + 0xa1, 0xff, 0x46, 0x0b, 0x1f, 0xdd, 0xea, 0xee, 0x53, 0x75, 0xff, 0x0f, + 0x89, 0x63, 0x27, 0x7c, 0x10, 0x10, 0x00, 0x00, 0x00 }; static u8 bnx2_TPAT_b09FwText[] = { - 0xbd, 0x58, 0x5d, 0x6c, 0x1c, 0xd5, 0x15, 0x3e, 0x33, 0x3b, 0x5e, 0x8f, - 0x1d, 0x27, 0x19, 0xc3, 0x36, 0xdd, 0x50, 0x5b, 0xcc, 0xd8, 0xb3, 0xf6, - 0x52, 0x5b, 0x61, 0x52, 0x0c, 0x6c, 0xd4, 0xa5, 0x9d, 0xee, 0xae, 0x1d, - 0x37, 0xe4, 0xc1, 0x69, 0x53, 0x01, 0x85, 0x56, 0x66, 0x9d, 0x10, 0x5a, - 0x5a, 0x29, 0x50, 0x1e, 0x50, 0x41, 0xca, 0x76, 0xbd, 0x49, 0x53, 0x69, - 0xe3, 0x4d, 0x0d, 0x4a, 0xd2, 0x8a, 0x07, 0xcb, 0x89, 0x63, 0x1e, 0x96, - 0x6c, 0x68, 0x5f, 0x8b, 0xb0, 0x42, 0x09, 0x20, 0x81, 0x10, 0x15, 0xfd, - 0x11, 0xa8, 0x52, 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0x67, 0xf6, 0xc5, 0xb7, 0x93, 0x77, 0x3e, + 0x1b, 0x9f, 0xcb, 0xe7, 0x1e, 0x09, 0x3e, 0x28, 0xc3, 0xdf, 0xeb, 0x49, + 0x1f, 0xda, 0xeb, 0xe5, 0xc0, 0x33, 0x54, 0xca, 0x89, 0xe2, 0x4d, 0xbc, + 0x37, 0xcb, 0x8c, 0xdb, 0xe9, 0xe2, 0xac, 0xc1, 0xaf, 0x18, 0x15, 0x94, + 0xf2, 0xaa, 0xff, 0x19, 0x63, 0x99, 0xef, 0x3b, 0xfc, 0xde, 0xd3, 0x71, + 0x23, 0xe4, 0xbb, 0x55, 0x0e, 0xb7, 0x66, 0xd6, 0x6b, 0xf5, 0xfa, 0x61, + 0x19, 0x33, 0xe7, 0x81, 0xb9, 0xdf, 0xc0, 0xa6, 0x08, 0x9c, 0x4d, 0xef, + 0x48, 0x59, 0xfa, 0x3d, 0xe2, 0x7a, 0x57, 0xf5, 0x6a, 0xe2, 0x0d, 0xee, + 0xb9, 0x3a, 0xc8, 0x35, 0x79, 0xf4, 0xc9, 0x2a, 0xbd, 0xdb, 0xb9, 0x74, + 0x0d, 0x6b, 0xde, 0xc6, 0xdc, 0xa5, 0x4e, 0x8a, 0x21, 0xbe, 0x93, 0xa1, + 0xa6, 0xa8, 0x7f, 0xea, 0xba, 0xd7, 0xbf, 0x96, 0x7f, 0xff, 0x01, 0x0e, + 0x04, 0xd7, 0xa3, 0x00, 0x13, 0x00, 0x00, 0x00 }; static const u32 bnx2_TPAT_b09FwData[(0x0/4) + 1] = { 0x0 }; static const u32 bnx2_TPAT_b09FwRodata[(0x4/4) + 1] = { 0x00000001, 0x00000000 }; static struct fw_info bnx2_tpat_fw_09 = { - /* Firmware version: 5.0.0j17 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.1b */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x1, - .start_addr = 0x08000488, + .start_addr = 0x08000490, .text_addr = 0x08000400, - .text_len = 0x17ec, + .text_len = 0x12fc, .text_index = 0x0, .gz_text = bnx2_TPAT_b09FwText, .gz_text_len = sizeof(bnx2_TPAT_b09FwText), @@ -4120,855 +4375,911 @@ static struct fw_info bnx2_tpat_fw_09 = { .data_index = 0x0, .data = bnx2_TPAT_b09FwData, - .sbss_addr = 0x08001c20, + .sbss_addr = 0x08001720, .sbss_len = 0x3c, .sbss_index = 0x0, - .bss_addr = 0x08001c5c, - .bss_len = 0x344, + .bss_addr = 0x0800175c, + .bss_len = 0x12b4, .bss_index = 0x0, - .rodata_addr = 0x08001bec, + .rodata_addr = 0x080016fc, .rodata_len = 0x4, .rodata_index = 0x0, .rodata = bnx2_TPAT_b09FwRodata, }; static u8 bnx2_TXP_b09FwText[] = { - 0xbd, 0x7b, 0x6d, 0x70, 0x5b, 0xd7, 0x79, 0xe6, 0x73, 0x2e, 0x00, 0xf2, - 0x02, 0x04, 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0x5d, 0xc8, 0x9a, 0x25, 0xa8, 0x41, 0x6d, + 0x81, 0x56, 0xcf, 0x1a, 0x24, 0xfe, 0x73, 0xdb, 0xbe, 0xb8, 0xc5, 0xad, + 0xb1, 0x2e, 0x1e, 0x3f, 0xf3, 0x3b, 0x30, 0x73, 0x7b, 0x52, 0x6d, 0xd8, + 0x91, 0x6f, 0xed, 0xad, 0x52, 0x8e, 0xdb, 0xe9, 0x6b, 0x04, 0x07, 0xbd, + 0xb5, 0x08, 0xc8, 0x9c, 0xc9, 0x7d, 0xa3, 0x92, 0x9b, 0xb2, 0x6e, 0x08, + 0xf4, 0x24, 0xe4, 0x7b, 0x51, 0xb2, 0x46, 0xd3, 0x81, 0xcb, 0x13, 0xc4, + 0x46, 0xa5, 0x96, 0x5a, 0xcb, 0xf2, 0x2f, 0x21, 0x5f, 0x55, 0x8e, 0xc8, + 0xf7, 0x71, 0x22, 0xac, 0x6d, 0x53, 0x78, 0xcf, 0xac, 0xc2, 0x8e, 0x7a, + 0x89, 0x1d, 0xb1, 0xd1, 0xc5, 0xe8, 0xb5, 0xf2, 0x9d, 0xa6, 0xf2, 0x5f, + 0x39, 0xe7, 0x35, 0x0f, 0x3b, 0x7a, 0x21, 0x32, 0x7b, 0x96, 0x45, 0xc6, + 0xef, 0xc1, 0x82, 0x9c, 0xac, 0xe3, 0x63, 0xa9, 0x30, 0xf5, 0xfe, 0xdd, + 0xe4, 0x63, 0x35, 0xb9, 0x04, 0x1a, 0x63, 0xf1, 0xb2, 0xc4, 0x99, 0x7d, + 0x18, 0x03, 0xaf, 0x79, 0xf4, 0xc1, 0x46, 0x8f, 0xbc, 0x23, 0xd5, 0xbb, + 0x0f, 0x29, 0x67, 0xf6, 0xb9, 0xaa, 0x56, 0xde, 0xeb, 0x5a, 0x63, 0x6e, + 0x6e, 0x1d, 0x20, 0xa6, 0x3e, 0x55, 0x10, 0x7e, 0xfc, 0xad, 0x53, 0xab, + 0xba, 0xb5, 0x5b, 0x04, 0xaf, 0x99, 0x30, 0x2a, 0x70, 0x1e, 0xed, 0x8e, + 0x76, 0x73, 0x04, 0x67, 0x0f, 0xc3, 0xd7, 0xd9, 0x8f, 0xb1, 0x82, 0xf0, + 0x17, 0x93, 0xd7, 0x10, 0xcc, 0x97, 0xfd, 0x17, 0xf7, 0xfc, 0xe7, 0xf3, + 0xd9, 0xcf, 0xec, 0xa2, 0x2f, 0xad, 0xbc, 0x98, 0xd0, 0xf0, 0xb6, 0xf3, + 0xbe, 0xfc, 0x77, 0xec, 0x87, 0x75, 0xc5, 0x44, 0x05, 0x5e, 0x9f, 0xa8, + 0xc6, 0xab, 0x93, 0x92, 0x8b, 0xaf, 0xa4, 0x36, 0x15, 0x34, 0xea, 0x34, + 0x0b, 0x77, 0x24, 0x1a, 0xf0, 0xfa, 0xbe, 0x10, 0xde, 0x9a, 0x0c, 0xe3, + 0x9d, 0x89, 0x15, 0xe8, 0x1e, 0x95, 0x73, 0xc2, 0x17, 0xe1, 0xd4, 0x3e, + 0x77, 0xff, 0xf1, 0x85, 0x92, 0x7c, 0xc7, 0xa0, 0x09, 0xb1, 0x9c, 0xc4, + 0xc0, 0x63, 0xa9, 0x6c, 0xee, 0x2c, 0xb4, 0xee, 0x0e, 0xe1, 0xc2, 0xdd, + 0x7a, 0x8f, 0x9c, 0x79, 0xee, 0x8b, 0x5b, 0xe2, 0x7b, 0x7b, 0x69, 0xdc, + 0xe5, 0xf9, 0x8d, 0x9c, 0xc7, 0x8d, 0xe4, 0x86, 0xfd, 0x66, 0x23, 0xd2, + 0x41, 0xd4, 0xde, 0x95, 0x90, 0xf8, 0x74, 0xf3, 0x12, 0xb3, 0x67, 0x54, + 0x9f, 0x96, 0xf3, 0xe0, 0xb4, 0xf1, 0x19, 0x72, 0xd4, 0x8b, 0xe4, 0xa8, + 0x3f, 0x30, 0xef, 0x7a, 0x68, 0x57, 0x2d, 0x6d, 0x7d, 0x21, 0x37, 0x62, + 0xd7, 0xb0, 0xc6, 0xaf, 0x36, 0x10, 0x94, 0x77, 0x3e, 0x4b, 0x68, 0xf7, + 0x32, 0xda, 0xfd, 0x9d, 0xc9, 0x06, 0x7c, 0x9b, 0x76, 0xae, 0xa0, 0x9d, + 0xe9, 0x89, 0x8b, 0xb0, 0x7c, 0xd6, 0xbe, 0x13, 0xa5, 0x30, 0xde, 0xce, + 0x36, 0xe0, 0xcd, 0x5d, 0x41, 0xbc, 0xbe, 0xcb, 0xb6, 0x9f, 0x32, 0x0f, + 0x3b, 0xf6, 0xc8, 0x77, 0x6c, 0xbe, 0x6c, 0xcf, 0x42, 0xda, 0x23, 0xef, + 0x94, 0x15, 0xd6, 0x0b, 0x62, 0x8f, 0xf8, 0xce, 0xb5, 0xe7, 0x19, 0x79, + 0x6f, 0xeb, 0xb3, 0x85, 0xdb, 0x94, 0x63, 0xb4, 0x27, 0x57, 0x90, 0xb9, + 0x36, 0xa6, 0xb3, 0x23, 0x1e, 0x4c, 0x8e, 0x81, 0xf1, 0xbe, 0x01, 0x9b, + 0x19, 0xdf, 0xd7, 0x26, 0xa2, 0xbd, 0x37, 0x29, 0xf2, 0x7d, 0x9d, 0x00, + 0xf9, 0x4f, 0xde, 0x27, 0xe3, 0xa7, 0x3e, 0xb8, 0xef, 0x93, 0x1f, 0xc9, + 0xa7, 0x95, 0x67, 0x13, 0x30, 0xab, 0x0d, 0x83, 0x18, 0x26, 0xef, 0xc6, + 0xaa, 0x71, 0xcb, 0xa4, 0xbc, 0x3b, 0x0e, 0x61, 0x3d, 0x6d, 0xce, 0x4c, + 0x68, 0x58, 0x3b, 0xe9, 0xc5, 0x9a, 0x09, 0xcb, 0xf6, 0x73, 0x45, 0xfb, + 0x27, 0x64, 0x7e, 0x0d, 0x58, 0xfb, 0xf9, 0x3c, 0xc4, 0x57, 0x5c, 0x83, + 0x33, 0xe6, 0x72, 0xc2, 0x7c, 0xde, 0x99, 0xcb, 0x5d, 0xa6, 0x68, 0x2f, + 0xe7, 0x5c, 0x13, 0xf1, 0x41, 0x74, 0x97, 0xe8, 0x30, 0x56, 0xb0, 0xac, + 0x4f, 0xea, 0xf6, 0x40, 0x31, 0x67, 0xeb, 0x93, 0xd7, 0xe3, 0x4c, 0xad, + 0x61, 0x39, 0xd3, 0x84, 0x88, 0x37, 0xa9, 0xaf, 0x3a, 0xaa, 0x18, 0x99, + 0x5b, 0x94, 0xf4, 0x15, 0xc2, 0xfb, 0xeb, 0xe2, 0xd1, 0xf4, 0x85, 0x4a, + 0xb4, 0xdb, 0xab, 0x88, 0x5e, 0x34, 0xb5, 0x85, 0x53, 0x16, 0xb6, 0x10, + 0x0f, 0x8e, 0x73, 0x1e, 0x1e, 0x43, 0xbe, 0xd7, 0xe7, 0xc5, 0x65, 0x41, + 0xea, 0x44, 0x12, 0xce, 0xdd, 0xf9, 0x7e, 0xdc, 0x53, 0xa2, 0x9e, 0x2f, + 0x9d, 0xc9, 0xe3, 0x5f, 0x70, 0x78, 0x20, 0x69, 0xfd, 0xc5, 0x95, 0x51, + 0xd9, 0x5f, 0x09, 0xfe, 0x07, 0x39, 0xeb, 0xa0, 0x25, 0x9b, 0x2e, 0xd1, + 0xa2, 0x4e, 0x6d, 0xf9, 0x1f, 0xde, 0x32, 0x24, 0x86, 0xbd, 0x97, 0x3e, + 0xe9, 0x70, 0xf9, 0xaa, 0xae, 0x09, 0xe7, 0xcc, 0xd6, 0x75, 0xed, 0xee, + 0x99, 0xc4, 0x47, 0x2e, 0xbd, 0xc1, 0x90, 0x98, 0x5c, 0xb9, 0x68, 0xb1, + 0xc3, 0x4d, 0x7b, 0xa9, 0x17, 0xe4, 0x73, 0x57, 0xea, 0x02, 0xe7, 0xb3, + 0x90, 0x8a, 0x39, 0x9f, 0xbf, 0xa0, 0xb6, 0x92, 0xcf, 0x92, 0xec, 0x21, + 0xf1, 0x73, 0x9c, 0xb5, 0xb7, 0x7c, 0x16, 0x53, 0xee, 0x19, 0xc6, 0x23, + 0xb3, 0x9c, 0x76, 0x88, 0x7c, 0xfc, 0xf9, 0xb9, 0x43, 0xfe, 0xfc, 0x2f, + 0xf2, 0xf0, 0xe4, 0xcf, 0x04, 0x3d, 0x00, 0x00, 0x00 }; static const u32 bnx2_TXP_b09FwData[(0x0/4) + 1] = { 0x0 }; static const u32 bnx2_TXP_b09FwRodata[(0x30/4) + 1] = { @@ -4977,15 +5288,15 @@ static const u32 bnx2_TXP_b09FwRodata[(0x30/4) + 1] = { 0x00000000 }; static struct fw_info bnx2_txp_fw_09 = { - /* Firmware version: 5.0.0j17 */ - .ver_major = 0x5, - .ver_minor = 0x0, - .ver_fix = 0x0, + /* Firmware version: 6.2.1b */ + .ver_major = 0x6, + .ver_minor = 0x2, + .ver_fix = 0x1, .start_addr = 0x080000a8, .text_addr = 0x08000000, - .text_len = 0x38d0, + .text_len = 0x3d00, .text_index = 0x0, .gz_text = bnx2_TXP_b09FwText, .gz_text_len = sizeof(bnx2_TXP_b09FwText), @@ -4995,15 +5306,15 @@ static struct fw_info bnx2_txp_fw_09 = { .data_index = 0x0, .data = bnx2_TXP_b09FwData, - .sbss_addr = 0x08003920, + .sbss_addr = 0x08003d68, .sbss_len = 0x64, .sbss_index = 0x0, - .bss_addr = 0x08003988, + .bss_addr = 0x08003dd0, .bss_len = 0x24c, .bss_index = 0x0, - .rodata_addr = 0x080038d0, + .rodata_addr = 0x08003d00, .rodata_len = 0x30, .rodata_index = 0x0, .rodata = bnx2_TXP_b09FwRodata, diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2fc_constants.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2fc_constants.h new file mode 100644 index 0000000..dad9924 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2fc_constants.h @@ -0,0 +1,274 @@ +#ifndef __BNX2FC_CONSTANTS_H_ +#define __BNX2FC_CONSTANTS_H_ + +/** + * This file defines HSI constants for the FCoE flows + */ + +/* Current FCoE HSI version number composed of two fields (16 bit) */ +/* Implies on a change broken previous HSI */ +#define FCOE_HSI_MAJOR_VERSION (2) +/* Implies on a change which does not broken previous HSI */ +#define FCOE_HSI_MINOR_VERSION (1) + +/* KWQ/KCQ FCoE layer code */ +#define FCOE_KWQE_LAYER_CODE (7) + +/* KWQ (kernel work queue) request op codes */ +#define FCOE_KWQE_OPCODE_INIT1 (0) +#define FCOE_KWQE_OPCODE_INIT2 (1) +#define FCOE_KWQE_OPCODE_INIT3 (2) +#define FCOE_KWQE_OPCODE_OFFLOAD_CONN1 (3) +#define FCOE_KWQE_OPCODE_OFFLOAD_CONN2 (4) +#define FCOE_KWQE_OPCODE_OFFLOAD_CONN3 (5) +#define FCOE_KWQE_OPCODE_OFFLOAD_CONN4 (6) +#define FCOE_KWQE_OPCODE_ENABLE_CONN (7) +#define FCOE_KWQE_OPCODE_DISABLE_CONN (8) +#define FCOE_KWQE_OPCODE_DESTROY_CONN (9) +#define FCOE_KWQE_OPCODE_DESTROY (10) +#define FCOE_KWQE_OPCODE_STAT (11) + +/* KCQ (kernel completion queue) response op codes */ +#define FCOE_KCQE_OPCODE_INIT_FUNC (0x10) +#define FCOE_KCQE_OPCODE_DESTROY_FUNC (0x11) +#define FCOE_KCQE_OPCODE_STAT_FUNC (0x12) +#define FCOE_KCQE_OPCODE_OFFLOAD_CONN (0x15) +#define FCOE_KCQE_OPCODE_ENABLE_CONN (0x16) +#define FCOE_KCQE_OPCODE_DISABLE_CONN (0x17) +#define FCOE_KCQE_OPCODE_DESTROY_CONN (0x18) +#define FCOE_KCQE_OPCODE_CQ_EVENT_NOTIFICATION (0x20) +#define FCOE_KCQE_OPCODE_FCOE_ERROR (0x21) + +/* KCQ (kernel completion queue) completion status */ +#define FCOE_KCQE_COMPLETION_STATUS_SUCCESS (0x0) +#define FCOE_KCQE_COMPLETION_STATUS_ERROR (0x1) +#define FCOE_KCQE_COMPLETION_STATUS_INVALID_OPCODE (0x2) +#define FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE (0x3) +#define FCOE_KCQE_COMPLETION_STATUS_CTX_FREE_FAILURE (0x4) +#define FCOE_KCQE_COMPLETION_STATUS_NIC_ERROR (0x5) +#define FCOE_KCQE_COMPLETION_STATUS_WRONG_HSI_VERSION (0x6) +#define FCOE_KCQE_COMPLETION_STATUS_PARITY_ERROR (0x81) + +/* CQE type */ +#define FCOE_PENDING_CQE_TYPE 0 +#define FCOE_UNSOLIC_CQE_TYPE 1 + +/* Unsolicited CQE type */ +#define FCOE_UNSOLICITED_FRAME_CQE_TYPE 0 +#define FCOE_ERROR_DETECTION_CQE_TYPE 1 +#define FCOE_WARNING_DETECTION_CQE_TYPE 2 + +/* E_D_TOV timer resolution in ms */ +#define FCOE_E_D_TOV_TIMER_RESOLUTION_MS (20) + +/* E_D_TOV timer resolution for SDM (4 micro) */ +#define FCOE_E_D_TOV_SDM_TIMER_RESOLUTION \ + (FCOE_E_D_TOV_TIMER_RESOLUTION_MS * 1000 / 4) + +/* REC timer resolution in ms */ +#define FCOE_REC_TIMER_RESOLUTION_MS (20) + +/* REC timer resolution for SDM (4 micro) */ +#define FCOE_REC_SDM_TIMER_RESOLUTION (FCOE_REC_TIMER_RESOLUTION_MS * 1000 / 4) + +/* E_D_TOV timer default wraparound value (2 sec) in 20 ms resolution */ +#define FCOE_E_D_TOV_DEFAULT_WRAPAROUND_VAL \ + (2000 / FCOE_E_D_TOV_TIMER_RESOLUTION_MS) + +/* REC_TOV timer default wraparound value (3 sec) in 20 ms resolution */ +#define FCOE_REC_TOV_DEFAULT_WRAPAROUND_VAL \ + (3000 / FCOE_REC_TIMER_RESOLUTION_MS) + +#define FCOE_NUM_OF_TIMER_TASKS (8 * 1024) + +#define FCOE_NUM_OF_CACHED_TASKS_TIMER (8) + +/* Task context constants */ +/******** Remove FCP_CMD write tce sleep ***********************/ +/* In case timer services are required then shall be updated by Xstorm after + * start processing the task. In case no timer facilities are required then the + * driver would initialize the state to this value + * +#define FCOE_TASK_TX_STATE_NORMAL 0 + * After driver has initialize the task in case timer services required * +#define FCOE_TASK_TX_STATE_INIT 1 +******** Remove FCP_CMD write tce sleep ***********************/ +/* After driver has initialize the task in case timer services required */ +#define FCOE_TASK_TX_STATE_INIT 0 +/* In case timer services are required then shall be updated by Xstorm after + * start processing the task. In case no timer facilities are required then the + * driver would initialize the state to this value + */ +#define FCOE_TASK_TX_STATE_NORMAL 1 +/* Task is under abort procedure. Updated in order to stop processing of + * pending WQEs on this task + */ +#define FCOE_TASK_TX_STATE_ABORT 2 +/* For E_D_T_TOV timer expiration in Xstorm (Class 2 only) */ +#define FCOE_TASK_TX_STATE_ERROR 3 +/* For REC_TOV timer expiration indication received from Xstorm */ +#define FCOE_TASK_TX_STATE_WARNING 4 +/* For completed unsolicited task */ +#define FCOE_TASK_TX_STATE_UNSOLICITED_COMPLETED 5 +/* For exchange cleanup request task */ +#define FCOE_TASK_TX_STATE_EXCHANGE_CLEANUP 6 +/* For sequence cleanup request task */ +#define FCOE_TASK_TX_STATE_SEQUENCE_CLEANUP 7 +/* For completion the ABTS task. */ +#define FCOE_TASK_TX_STATE_ABTS_TX 8 + +#define FCOE_TASK_RX_STATE_NORMAL 0 +#define FCOE_TASK_RX_STATE_COMPLETED 1 +/* Obsolete: Intermediate completion (middle path with local completion) */ +#define FCOE_TASK_RX_STATE_INTER_COMP 2 +/* For REC_TOV timer expiration indication received from Xstorm */ +#define FCOE_TASK_RX_STATE_WARNING 3 +/* For E_D_T_TOV timer expiration in Ustorm */ +#define FCOE_TASK_RX_STATE_ERROR 4 +/* FW only: First visit at rx-path, part of the abts round trip */ +#define FCOE_TASK_RX_STATE_ABTS_IN_PROCESS 5 +/* FW only: Second visit at rx-path, after ABTS frame transmitted */ +#define FCOE_TASK_RX_STATE_ABTS_TRANSMITTED 6 +/* Special completion indication in case of task was aborted. */ +#define FCOE_TASK_RX_STATE_ABTS_COMPLETED 7 +/* FW only: First visit at rx-path, part of the cleanup round trip */ +#define FCOE_TASK_RX_STATE_EXCHANGE_CLEANUP_IN_PROCESS 8 +/* FW only: Special completion indication in case of task was cleaned. */ +#define FCOE_TASK_RX_STATE_EXCHANGE_CLEANUP_COMPLETED 9 +/* Not in used: Special completion indication (in task requested the exchange + * cleanup) in case cleaned task is in non-valid. + */ +#define FCOE_TASK_RX_STATE_ABORT_CLEANUP_COMPLETED 10 +/* Special completion indication (in task requested the sequence cleanup) in + * case cleaned task was already returned to normal. + */ +#define FCOE_TASK_RX_STATE_IGNORED_SEQUENCE_CLEANUP 11 + + +#define FCOE_TASK_TYPE_WRITE 0 +#define FCOE_TASK_TYPE_READ 1 +#define FCOE_TASK_TYPE_MIDPATH 2 +#define FCOE_TASK_TYPE_UNSOLICITED 3 +#define FCOE_TASK_TYPE_ABTS 4 +#define FCOE_TASK_TYPE_EXCHANGE_CLEANUP 5 +#define FCOE_TASK_TYPE_SEQUENCE_CLEANUP 6 + +#define FCOE_TASK_DEV_TYPE_DISK 0 +#define FCOE_TASK_DEV_TYPE_TAPE 1 + +#define FCOE_TASK_CLASS_TYPE_3 0 +#define FCOE_TASK_CLASS_TYPE_2 1 + +/* FCoE/FC packet fields */ +#define FCOE_ETH_TYPE 0x8906 + +/* FCoE maximum elements in hash table */ +#define FCOE_MAX_ELEMENTS_IN_HASH_TABLE_ROW 8 + +/* FCoE half of the elements in hash table */ +#define FCOE_HALF_ELEMENTS_IN_HASH_TABLE_ROW \ + (FCOE_MAX_ELEMENTS_IN_HASH_TABLE_ROW / 2) + +/* FcoE number of cached T2 entries */ +#define T_FCOE_NUMBER_OF_CACHED_T2_ENTRIES (4) + +/* FCoE maximum elements in hash table */ +#define FCOE_HASH_TBL_CHUNK_SIZE 16384 + +/* Everest FCoE connection type */ +#define B577XX_FCOE_CONNECTION_TYPE 4 + +/* FCoE number of rows (in log). This number derives + * from the maximum connections supported which is 2048. + * TBA: Need a different constant for E2 + */ +#define FCOE_MAX_NUM_SESSIONS_LOG 11 + +#define FC_ABTS_REPLY_MAX_PAYLOAD_LEN 12 + +/* Error codes for Error Reporting in slow path flows */ +#define FCOE_SLOW_PATH_ERROR_CODE_TOO_MANY_FUNCS 0 +#define FCOE_SLOW_PATH_ERROR_CODE_NO_LICENSE 1 + +/* Error codes for Error Reporting in fast path flows + * XFER error codes + */ +#define FCOE_ERROR_CODE_XFER_OOO_RO 0 +#define FCOE_ERROR_CODE_XFER_RO_NOT_ALIGNED 1 +#define FCOE_ERROR_CODE_XFER_NULL_BURST_LEN 2 +#define FCOE_ERROR_CODE_XFER_RO_GREATER_THAN_DATA2TRNS 3 +#define FCOE_ERROR_CODE_XFER_INVALID_PAYLOAD_SIZE 4 +#define FCOE_ERROR_CODE_XFER_TASK_TYPE_NOT_WRITE 5 +#define FCOE_ERROR_CODE_XFER_PEND_XFER_SET 6 +#define FCOE_ERROR_CODE_XFER_OPENED_SEQ 7 +#define FCOE_ERROR_CODE_XFER_FCTL 8 + +/* FCP RSP error codes */ +#define FCOE_ERROR_CODE_FCP_RSP_BIDI_FLAGS_SET 9 +#define FCOE_ERROR_CODE_FCP_RSP_UNDERFLOW 10 +#define FCOE_ERROR_CODE_FCP_RSP_OVERFLOW 11 +#define FCOE_ERROR_CODE_FCP_RSP_INVALID_LENGTH_FIELD 12 +#define FCOE_ERROR_CODE_FCP_RSP_INVALID_SNS_FIELD 13 +#define FCOE_ERROR_CODE_FCP_RSP_INVALID_PAYLOAD_SIZE 14 +#define FCOE_ERROR_CODE_FCP_RSP_PEND_XFER_SET 15 +#define FCOE_ERROR_CODE_FCP_RSP_OPENED_SEQ 16 +#define FCOE_ERROR_CODE_FCP_RSP_FCTL 17 +#define FCOE_ERROR_CODE_FCP_RSP_LAST_SEQ_RESET 18 +#define FCOE_ERROR_CODE_FCP_RSP_CONF_REQ_NOT_SUPPORTED_YET 19 + +/* FCP DATA error codes */ +#define FCOE_ERROR_CODE_DATA_OOO_RO 20 +#define FCOE_ERROR_CODE_DATA_EXCEEDS_DEFINED_MAX_FRAME_SIZE 21 +#define FCOE_ERROR_CODE_DATA_EXCEEDS_DATA2TRNS 22 +#define FCOE_ERROR_CODE_DATA_SOFI3_SEQ_ACTIVE_SET 23 +#define FCOE_ERROR_CODE_DATA_SOFN_SEQ_ACTIVE_RESET 24 +#define FCOE_ERROR_CODE_DATA_EOFN_END_SEQ_SET 25 +#define FCOE_ERROR_CODE_DATA_EOFT_END_SEQ_RESET 26 +#define FCOE_ERROR_CODE_DATA_TASK_TYPE_NOT_READ 27 +#define FCOE_ERROR_CODE_DATA_FCTL 28 + +/* Middle path error codes */ +#define FCOE_ERROR_CODE_MIDPATH_INVALID_TYPE 29 +#define FCOE_ERROR_CODE_MIDPATH_SOFI3_SEQ_ACTIVE_SET 30 +#define FCOE_ERROR_CODE_MIDPATH_SOFN_SEQ_ACTIVE_RESET 31 +#define FCOE_ERROR_CODE_MIDPATH_EOFN_END_SEQ_SET 32 +#define FCOE_ERROR_CODE_MIDPATH_EOFT_END_SEQ_RESET 33 +#define FCOE_ERROR_CODE_MIDPATH_REPLY_FCTL 34 +#define FCOE_ERROR_CODE_MIDPATH_INVALID_REPLY 35 +#define FCOE_ERROR_CODE_MIDPATH_ELS_REPLY_RCTL 36 + +/* ABTS error codes */ +#define FCOE_ERROR_CODE_ABTS_REPLY_F_CTL 37 +#define FCOE_ERROR_CODE_ABTS_REPLY_DDF_RCTL_FIELD 38 +#define FCOE_ERROR_CODE_ABTS_REPLY_INVALID_BLS_RCTL 39 +#define FCOE_ERROR_CODE_ABTS_REPLY_INVALID_RCTL 40 +#define FCOE_ERROR_CODE_ABTS_REPLY_RCTL_GENERAL_MISMATCH 41 + +/* Common error codes */ +#define FCOE_ERROR_CODE_COMMON_MIDDLE_FRAME_WITH_PAD 42 +#define FCOE_ERROR_CODE_COMMON_SEQ_INIT_IN_TCE 43 +#define FCOE_ERROR_CODE_COMMON_FC_HDR_RX_ID_MISMATCH 44 +#define FCOE_ERROR_CODE_COMMON_INCORRECT_SEQ_CNT 45 +#define FCOE_ERROR_CODE_COMMON_DATA_FC_HDR_FCP_TYPE_MISMATCH 46 +#define FCOE_ERROR_CODE_COMMON_DATA_NO_MORE_SGES 47 +#define FCOE_ERROR_CODE_COMMON_OPTIONAL_FC_HDR 48 +#define FCOE_ERROR_CODE_COMMON_READ_TCE_OX_ID_TOO_BIG 49 +#define FCOE_ERROR_CODE_COMMON_DATA_WAS_NOT_TRANSMITTED 50 + +/* Unsolicited Rx error codes */ +#define FCOE_ERROR_CODE_UNSOLICITED_TYPE_NOT_ELS 51 +#define FCOE_ERROR_CODE_UNSOLICITED_TYPE_NOT_BLS 52 +#define FCOE_ERROR_CODE_UNSOLICITED_FCTL_ELS 53 +#define FCOE_ERROR_CODE_UNSOLICITED_FCTL_BLS 54 +#define FCOE_ERROR_CODE_UNSOLICITED_R_CTL 55 + +#define FCOE_ERROR_CODE_RW_TASK_DDF_RCTL_INFO_FIELD 56 +#define FCOE_ERROR_CODE_RW_TASK_INVALID_RCTL 57 +#define FCOE_ERROR_CODE_RW_TASK_RCTL_GENERAL_MISMATCH 58 + +/* Timer error codes */ +#define FCOE_ERROR_CODE_E_D_TOV_TIMER_EXPIRATION 60 +#define FCOE_ERROR_CODE_REC_TOV_TIMER_EXPIRATION 61 + + +#endif /* BNX2FC_CONSTANTS_H_ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57710_int_offsets.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57710_int_offsets.h index 592fed5..9c05f78 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57710_int_offsets.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57710_int_offsets.h @@ -1,328 +1,387 @@ -struct iro e1_iro_arr[326] = { - { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE - { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE - { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE - { 0x20, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE - { 0x3328, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) - { 0x3330, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) - { 0x3328, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) - { 0x3930, 0x0, 0x0, 0x0, 0x8}, // XSTORM_DCB_VERSION_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) - { 0x3120, 0x0, 0x0, 0x0, 0x8}, // XSTORM_VIRTUALIZATION_MODE_OFFSET - { 0x3360, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) - { 0x3368, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET - { 0x3370, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x3374, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET - { 0x3928, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET - { 0x3c40, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) - { 0x3940, 0xc8, 0x0, 0x0, 0x98}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) - { 0x3ad0, 0x98, 0x0, 0x0, 0x28}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) - { 0x3b10, 0x98, 0x0, 0x0, 0x28}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) - { 0x3378, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) - { 0x3d68, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) - { 0x3d69, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E1HOV_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_PATH_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DPM_BUFFER_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE - { 0x12c8, 0x80, 0x0, 0x0, 0x80}, // TSTORM_INDIRECTION_TABLE_OFFSET(pfId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x19c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x4860, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) - { 0x4861, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) - { 0x4030, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_PFC_STRUCT_PER_PORT_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_E2_INTEG_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0x4000, 0x18, 0x0, 0x0, 0x18}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) - { 0x4300, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) - { 0x4300, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) - { 0x4301, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) - { 0x3000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) - { 0x3000, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) - { 0x3004, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) - { 0x4b00, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) - { 0x4b50, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) - { 0x3800, 0x80, 0x0, 0x0, 0x80}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) - { 0x3800, 0x8, 0x80, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) - { 0x3900, 0x20, 0x0, 0x0, 0x20}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x5198, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) - { 0x5199, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) - { 0x3940, 0x10, 0x4, 0x0, 0x4}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) - { 0x51a8, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) - { 0x51b0, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_PATH_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE - { 0x23e8, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET - { 0x2e30, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) - { 0x2e31, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) - { 0x24e8, 0x28, 0x0, 0x0, 0x28}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) - { 0x2d90, 0x8, 0x0, 0x0, 0x8}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0x2500, 0x40, 0x0, 0x0, 0x8}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) - { 0x2508, 0x40, 0x0, 0x0, 0x28}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(portId,clientId) - { 0x3000, 0x0, 0x0, 0x0, 0x1000}, // USTORM_AGG_DATA_OFFSET - { 0x5091, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET - { 0x50b0, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET - { 0x45a0, 0x90, 0x8, 0x0, 0x8}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) - { 0x2960, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) - { 0x2961, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) - { 0x2970, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) - { 0x2978, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) - { 0x2fb0, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) - { 0x2fb4, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) - { 0x2fc0, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET - { 0x2fc8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET - { 0x3000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET - { 0x5040, 0x1, 0x1, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) - { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET - { 0x808, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) - { 0x80c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) - { 0x1000, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x1004, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x1008, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x100a, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x100c, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x100d, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x100e, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x1010, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x1014, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0x3000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) - { 0x3004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) - { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS - { 0x3068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) - { 0x3069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) - { 0x306c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) - { 0x306e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) - { 0x3070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x3074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x3066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) - { 0x3064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x3060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x3062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x3050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x3054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0x3058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x305c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x307c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x307d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x1c18, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) - { 0x1c30, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) - { 0x1c38, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_CQ_THR_LOW_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_THR_LOW_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_CQ_THR_HIGH_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET - { 0x4c10, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x4c12, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x4c14, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x4c20, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x4c30, 0x40, 0x8, 0x0, 0x8}, // TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfId,iscsiConBufPblEntry) - { 0x4c00, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x4c02, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x4c04, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x4cd0, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x4ce0, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) - { 0x4ce4, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) - { 0x4cf0, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) - { 0x4cf4, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) - { 0x4d00, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) - { 0x5000, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_OOO_PKTS_OFFSET(pfId) - { 0x5004, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_SPILL_PKTS_OFFSET(pfId) - { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_L2_RING_FULL_DROPS_OFFSET(pfId) - { 0x1400, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x1402, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x1404, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x1410, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x1414, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x1416, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0x19b8, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) - { 0x1420, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) - { 0x1424, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x19c8, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x2c10, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) - { 0x2c11, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) - { 0x2c12, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x2c13, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) - { 0x2c00, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x2c02, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x2c04, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x2c30, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x2c32, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) - { 0x2c34, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x2c20, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) - { 0x2c21, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) - { 0x2c22, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) - { 0x2c23, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) - { 0x2c24, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) - { 0x2c25, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) - { 0x2c26, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) - { 0x1400, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x1402, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x1404, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x1412, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) - { 0x1410, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) - { 0x141c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x1414, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x1427, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) - { 0x1424, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) - { 0x1426, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) - { 0x1590, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x15a0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x15b0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TIMER_ARRAY_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FC_CRC_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIMER_ARRAY_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_DATA_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_TABLE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +*/ +static const struct iro e1_iro_arr[378] = { + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE + { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE + { 0x3320, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) + { 0x3328, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) + { 0x3320, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_HIGIG_HDR_LENGTH_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) + { 0x3358, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) + { 0x3360, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET + { 0x3368, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x336c, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET + { 0x3920, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET + { 0x3af8, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) + { 0x3938, 0x80, 0x0, 0x0, 0x48}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) + { 0x3a38, 0x40, 0x0, 0x0, 0x8}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) + { 0x3a48, 0x40, 0x0, 0x0, 0x18}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) + { 0x3370, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) + { 0x3c20, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) + { 0x3c21, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) + { 0x3c22, 0x8, 0x0, 0x0, 0x1}, // XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PCI_READ_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // LOAD_CONTEXT_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // QM_PAUSE_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TEST_UNUSED_FOCS_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PBF_ECHO_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // IGU_TEST_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_ZONE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DPM_BUFFER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TIME_SYNC_FLG_OFFSET(funcId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x19c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x4870, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) + { 0x4871, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) + { 0x4872, 0x8, 0x0, 0x0, 0x1}, // TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x4040, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VF_ZONE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_E2_INTEG_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0x4000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) + { 0x4800, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) + { 0x482e, 0x40, 0x0, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) + { 0x4800, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) + { 0x4801, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) + { 0x3000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) + { 0x3000, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) + { 0x3004, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) + { 0x3b80, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) + { 0x3bd0, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) + { 0x3bda, 0x10, 0x0, 0x0, 0x1}, // CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) + { 0x3800, 0x80, 0x0, 0x0, 0x80}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) + { 0x3800, 0x8, 0x80, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) + { 0x3900, 0x40, 0x0, 0x0, 0x40}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x5198, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) + { 0x5199, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) + { 0x519a, 0x8, 0x0, 0x0, 0x1}, // CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x3980, 0x10, 0x4, 0x0, 0x4}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) + { 0x51a8, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) + { 0x51b0, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_MODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_PF_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_VF_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_VF_VALID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_IGU_COMMAND_OFFSET + { 0x23e8, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) + { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET + { 0x2e70, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) + { 0x2e71, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) + { 0x2e72, 0x8, 0x0, 0x0, 0x1}, // USTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x24e8, 0x38, 0x0, 0x0, 0x38}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) + { 0x2dd0, 0x8, 0x0, 0x0, 0x8}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0x2500, 0x40, 0x0, 0x0, 0x8}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) + { 0x2508, 0x40, 0x0, 0x0, 0x20}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CQE_PAGE_NEXT_OFFSET(portId,clientId) + { 0x3000, 0x0, 0x0, 0x0, 0x1000}, // USTORM_AGG_DATA_OFFSET + { 0x50a1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET + { 0x50b8, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET + { 0x50c8, 0x90, 0x8, 0x0, 0x8}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) + { 0x2960, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) + { 0x2961, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) + { 0x2970, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) + { 0x2978, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TCP_TX_SWITCHING_EN_OFFSET(portId) + { 0x2fb0, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) + { 0x2fb4, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) + { 0x2fc0, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET + { 0x2fc8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET + { 0x3000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET + { 0x5040, 0x1, 0x1, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) + { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET + { 0x808, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) + { 0x80c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) + { 0x8b7, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_MAX_DOMINANCE_VALUE_OFFSET + { 0x8b6, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOMINANCE_THRESHOLD_OFFSET + { 0x1000, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x1004, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x1008, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x100a, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x100c, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x100d, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x100e, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x1010, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x1014, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x1018, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_PROD_OFFSET(rssId,portId) + { 0x101c, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_CONS_OFFSET(rssId,portId) + { 0x3000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) + { 0x3004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) + { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS + { 0x3068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) + { 0x3069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) + { 0x306c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) + { 0x306e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) + { 0x3070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x3074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x3066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) + { 0x3064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x3060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x3062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x3050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x3054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x3058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x305c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x307c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x307d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x1c18, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) + { 0x1c30, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) + { 0x1c38, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_CQ_THR_LOW_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_THR_LOW_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_CQ_THR_HIGH_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET + { 0x4c10, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x4c12, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x4c14, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x4c16, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x4c20, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x4c00, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x4c02, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x4c04, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x4c30, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x4c40, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) + { 0x4c44, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) + { 0x4c50, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) + { 0x4c54, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) + { 0x4c60, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) + { 0x1400, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x1402, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x1404, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x1410, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x1414, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x1416, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + { 0x19b8, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) + { 0x1420, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) + { 0x1424, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x19c8, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x2c10, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) + { 0x2c11, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) + { 0x2c12, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x2c13, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) + { 0x2c00, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x2c02, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x2c04, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x2c30, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x2c32, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) + { 0x2c34, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x2c20, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) + { 0x2c21, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) + { 0x2c22, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) + { 0x2c23, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) + { 0x2c24, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) + { 0x2c25, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) + { 0x2c26, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) + { 0x1480, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x1482, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x1484, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x1492, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) + { 0x1490, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) + { 0x149c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x1494, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x14a7, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) + { 0x14a4, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) + { 0x14a6, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) + { 0x1610, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x1620, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x1630, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TIMER_ARRAY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FC_CRC_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_ONE_OFFSET(cached_tbl_size) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_TWO_OFFSET(cached_tbl_size) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_ENTRY_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_ENTRY_MNG_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_CACHED_TCE_TBL_BIT_MAP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAIT_4_BD_READ_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_NON_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_ERR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_GLOBAL_TIMER_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_DEL_CACHED_TASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_SILENT_DROP_CACHED_TASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_DROP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_CRC_ERROR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_ERROR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_PREVIOUS_THREAD_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DATA_IN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_READ_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DROP_ERR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_ERRORS_NUMBER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_NUMBER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_BITMAP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_ENABLE_CONN_RACE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_CRC_ERROR_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIMER_ARRAY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_ABTS_BLOCK_SQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_CLEANUP_BLOCK_SQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_WAIT_FOR_YOUR_TURN_SP_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_AFEX_ERROR_PACKETS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_TABLE_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET }; diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57711_int_offsets.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57711_int_offsets.h index d129f19..0ff54a6 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57711_int_offsets.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57711_int_offsets.h @@ -1,328 +1,387 @@ -struct iro e1h_iro_arr[326] = { - { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE - { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE - { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE - { 0x20, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE - { 0x9000, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) - { 0x9008, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) - { 0x9000, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) - { 0x9ce8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_DCB_VERSION_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) - { 0x91a0, 0x0, 0x0, 0x0, 0x8}, // XSTORM_VIRTUALIZATION_MODE_OFFSET - { 0x93c0, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) - { 0x93c8, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET - { 0x93d0, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x93d4, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET - { 0x93d8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET - { 0x9a78, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) - { 0x93e8, 0xc8, 0x0, 0x0, 0x98}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) - { 0x9578, 0x98, 0x0, 0x0, 0x28}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) - { 0x95b8, 0x98, 0x0, 0x0, 0x28}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) - { 0xa000, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) - { 0xc0c0, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) - { 0xc0c1, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x9ca0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_E1HOV_OFFSET(pfId) - { 0x9ce0, 0x0, 0x0, 0x0, 0x1}, // XSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_PATH_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DPM_BUFFER_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE - { 0x12c8, 0x80, 0x0, 0x0, 0x80}, // TSTORM_INDIRECTION_TABLE_OFFSET(pfId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x1ec8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET - { 0xa080, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) - { 0xa081, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) - { 0x9060, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) - { 0x1ed0, 0x0, 0x0, 0x0, 0x1}, // TSTORM_FUNCTION_MODE_OFFSET - { 0x1ed8, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET - { 0x1eda, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET - { 0x1290, 0x8, 0x0, 0x0, 0x8}, // CSTORM_PFC_STRUCT_PER_PORT_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_E2_INTEG_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0xb000, 0x18, 0x0, 0x0, 0x18}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) - { 0xb300, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) - { 0xb300, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) - { 0xb301, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) - { 0x8000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) - { 0x8000, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) - { 0x8004, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) - { 0xbb00, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) - { 0xbc40, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) - { 0x8800, 0x80, 0x0, 0x0, 0x80}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) - { 0x8800, 0x8, 0x80, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) - { 0x8c00, 0x20, 0x0, 0x0, 0x20}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x1250, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) - { 0x1251, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) - { 0x8d00, 0x10, 0x4, 0x0, 0x4}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) - { 0x1300, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) - { 0x1308, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) - { 0x11c8, 0x0, 0x0, 0x0, 0x1}, // CSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_PATH_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE - { 0x8308, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET - { 0x8540, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) - { 0x8541, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) - { 0x6000, 0x28, 0x0, 0x0, 0x28}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) - { 0x8408, 0x8, 0x0, 0x0, 0x8}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) - { 0x8448, 0x0, 0x0, 0x0, 0x1}, // USTORM_FUNCTION_MODE_OFFSET - { 0x8494, 0x8, 0x0, 0x0, 0x2}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) - { 0x8496, 0x8, 0x0, 0x0, 0x2}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) - { 0x84a4, 0x10, 0x0, 0x0, 0x4}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0x3000, 0x40, 0x0, 0x0, 0x8}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) - { 0x3008, 0x40, 0x0, 0x0, 0x28}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) - { 0x3200, 0x20, 0x0, 0x0, 0x20}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) - { 0x3720, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(portId,clientId) - { 0xa000, 0x0, 0x0, 0x0, 0x2000}, // USTORM_AGG_DATA_OFFSET - { 0x3ea1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET - { 0x3ec8, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET - { 0x1e00, 0xe0, 0x8, 0x0, 0x8}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) - { 0x4000, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) - { 0x4001, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) - { 0x4040, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) - { 0x4060, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) - { 0x4000, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) - { 0x4004, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) - { 0x4040, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET - { 0x4048, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET - { 0x8000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET - { 0x5040, 0x1, 0x4, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) - { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET - { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) - { 0x500c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) - { 0x3000, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x3004, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x3008, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x300a, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x300c, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x300d, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x300e, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x3010, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x3014, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0x5000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) - { 0x5004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) - { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS - { 0x5068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) - { 0x5069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) - { 0x506c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) - { 0x506e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) - { 0x5070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x5074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x5066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) - { 0x5064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x5060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x5062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x5050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x5054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0x5058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x505c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x507c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x507d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x4018, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) - { 0x4090, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) - { 0x4098, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) - { 0x4110, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_LOW_OFFSET - { 0x4112, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_LOW_OFFSET - { 0x4114, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_HIGH_OFFSET - { 0x4116, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET - { 0x6040, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x6042, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x6044, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x6080, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x60c0, 0x40, 0x8, 0x0, 0x8}, // TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfId,iscsiConBufPblEntry) - { 0x6000, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x6002, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x6004, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x6340, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x6380, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) - { 0x6384, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) - { 0x63c0, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) - { 0x63c4, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) - { 0x6400, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) - { 0x7000, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_OOO_PKTS_OFFSET(pfId) - { 0x7004, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_SPILL_PKTS_OFFSET(pfId) - { 0x7008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_L2_RING_FULL_DROPS_OFFSET(pfId) - { 0x7000, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x7002, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x7004, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x7040, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x7044, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x7046, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0x7660, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) - { 0x7080, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) - { 0x7084, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x76a0, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x8040, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) - { 0x8041, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) - { 0x8042, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x8043, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) - { 0x8000, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x8002, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x8004, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x80c0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x80c2, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) - { 0x80c4, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x8080, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) - { 0x8081, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) - { 0x8082, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) - { 0x8083, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) - { 0x8084, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) - { 0x8085, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) - { 0x8086, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) - { 0x6000, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x6002, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x6004, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x6042, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) - { 0x6040, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) - { 0x604c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x6044, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x6057, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) - { 0x6054, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) - { 0x6056, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) - { 0x6640, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x6680, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x66c0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0xd942, 0x18, 0x0, 0x0, 0x2}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) - { 0xde40, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET - { 0xe000, 0x0, 0x0, 0x0, 0x4}, // USTORM_TIMER_ARRAY_OFFSET - { 0xdd40, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FC_CRC_CNT_OFFSET - { 0xdd44, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET - { 0xdd48, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET - { 0xdd4c, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET - { 0xdd50, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET - { 0xdd54, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0xdd58, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET - { 0xdd40, 0x0, 0x0, 0x0, 0x20}, // USTORM_STAT_OFFSET - { 0xda00, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET - { 0xda00, 0x0, 0x0, 0x0, 0x68}, // USTORM_DEBUG_OFFSET - { 0xbb60, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET - { 0xd000, 0x0, 0x0, 0x0, 0x4}, // XSTORM_TIMER_ARRAY_OFFSET - { 0xb0c0, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET - { 0xb0c4, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET - { 0xb0c8, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET - { 0xb0c0, 0x0, 0x0, 0x0, 0x10}, // XSTORM_STAT_OFFSET - { 0xd6b0, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET - { 0xd6b4, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET - { 0xd6b8, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET - { 0xd6bc, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0xd6b0, 0x0, 0x0, 0x0, 0x10}, // TSTORM_STAT_OFFSET - { 0xd348, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_DATA_OFFSET - { 0xd358, 0x0, 0x0, 0x0, 0x80}, // TSTORM_REORDER_WAITING_TABLE_OFFSET - { 0x10, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE - { 0xd358, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +*/ +static const struct iro e1h_iro_arr[378] = { + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE + { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE + { 0x9000, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) + { 0x9008, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) + { 0x9000, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_HIGIG_HDR_LENGTH_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) + { 0x93b8, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) + { 0x93c0, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET + { 0x93c8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x93cc, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET + { 0x93d0, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET + { 0x9720, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) + { 0x93e0, 0x80, 0x0, 0x0, 0x48}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) + { 0x94e0, 0x40, 0x0, 0x0, 0x8}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) + { 0x94f0, 0x40, 0x0, 0x0, 0x18}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) + { 0xa000, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) + { 0xc0c0, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) + { 0xc0c1, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) + { 0xc0c2, 0x8, 0x0, 0x0, 0x1}, // XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PCI_READ_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // LOAD_CONTEXT_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // QM_PAUSE_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TEST_UNUSED_FOCS_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PBF_ECHO_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // IGU_TEST_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_ZONE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DPM_BUFFER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TIME_SYNC_FLG_OFFSET(funcId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x1ec8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET + { 0xa080, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) + { 0xa081, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) + { 0xa082, 0x8, 0x0, 0x0, 0x1}, // TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x9070, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) + { 0x1ed8, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET + { 0x1eda, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VF_ZONE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_E2_INTEG_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0xc000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) + { 0xc800, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) + { 0xc82e, 0x40, 0x0, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) + { 0xc800, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) + { 0xc801, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) + { 0x8000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) + { 0x8000, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) + { 0x8004, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) + { 0xb000, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) + { 0xb140, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) + { 0xb14a, 0x10, 0x0, 0x0, 0x1}, // CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) + { 0x8800, 0x80, 0x0, 0x0, 0x80}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) + { 0x8800, 0x8, 0x80, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) + { 0x8c00, 0x40, 0x0, 0x0, 0x40}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x1250, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) + { 0x1251, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) + { 0x1252, 0x8, 0x0, 0x0, 0x1}, // CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x8e00, 0x10, 0x4, 0x0, 0x4}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) + { 0x1290, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) + { 0x1298, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_MODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_PF_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_VF_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_VF_VALID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_IGU_COMMAND_OFFSET + { 0x8308, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) + { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET + { 0x8500, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) + { 0x8501, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) + { 0x8502, 0x8, 0x0, 0x0, 0x1}, // USTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x6000, 0x38, 0x0, 0x0, 0x38}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) + { 0x8454, 0x8, 0x0, 0x0, 0x2}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) + { 0x8456, 0x8, 0x0, 0x0, 0x2}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) + { 0x8464, 0x10, 0x0, 0x0, 0x4}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0x3000, 0x40, 0x0, 0x0, 0x8}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) + { 0x3008, 0x40, 0x0, 0x0, 0x20}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) + { 0x3200, 0x20, 0x0, 0x0, 0x20}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) + { 0x37a8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CQE_PAGE_NEXT_OFFSET(portId,clientId) + { 0xa000, 0x0, 0x0, 0x0, 0x2000}, // USTORM_AGG_DATA_OFFSET + { 0x3ec1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET + { 0x3ee0, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET + { 0x1e00, 0xe0, 0x8, 0x0, 0x8}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) + { 0x4000, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) + { 0x4001, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) + { 0x4040, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) + { 0x4060, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TCP_TX_SWITCHING_EN_OFFSET(portId) + { 0x4000, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) + { 0x4004, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) + { 0x4040, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET + { 0x4048, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET + { 0x8000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET + { 0x5040, 0x1, 0x4, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) + { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET + { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) + { 0x500c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) + { 0x52c7, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_MAX_DOMINANCE_VALUE_OFFSET + { 0x52c6, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOMINANCE_THRESHOLD_OFFSET + { 0x3000, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x3004, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x3008, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x300a, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x300c, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x300d, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x300e, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x3010, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x3014, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x3018, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_PROD_OFFSET(rssId,portId) + { 0x301c, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_CONS_OFFSET(rssId,portId) + { 0x5000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) + { 0x5004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) + { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS + { 0x5068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) + { 0x5069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) + { 0x506c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) + { 0x506e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) + { 0x5070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x5074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x5066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) + { 0x5064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x5060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x5062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x5050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x5054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x5058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x505c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x507c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x507d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x4018, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) + { 0x4090, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) + { 0x4098, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) + { 0x4110, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_LOW_OFFSET + { 0x4112, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_LOW_OFFSET + { 0x4114, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_HIGH_OFFSET + { 0x4116, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET + { 0x6040, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x6042, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6044, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6046, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6080, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x6000, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x6002, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x6004, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x60c0, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x6100, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) + { 0x6104, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) + { 0x6140, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) + { 0x6144, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) + { 0x6180, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) + { 0x7000, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x7002, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x7004, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x7040, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x7044, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x7046, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + { 0x7660, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) + { 0x7080, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) + { 0x7084, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x76a0, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x8040, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) + { 0x8041, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) + { 0x8042, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x8043, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) + { 0x8000, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x8002, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x8004, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x80c0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x80c2, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) + { 0x80c4, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x8080, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) + { 0x8081, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) + { 0x8082, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) + { 0x8083, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) + { 0x8084, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) + { 0x8085, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) + { 0x8086, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) + { 0x6000, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x6002, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x6004, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x6042, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) + { 0x6040, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) + { 0x604c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x6044, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x6057, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) + { 0x6054, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) + { 0x6056, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) + { 0x6640, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x6680, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x66c0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TIMER_ARRAY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FC_CRC_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_ONE_OFFSET(cached_tbl_size) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_TWO_OFFSET(cached_tbl_size) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_ENTRY_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_ENTRY_MNG_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_CACHED_TCE_TBL_BIT_MAP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAIT_4_BD_READ_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_NON_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_ERR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_GLOBAL_TIMER_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_DEL_CACHED_TASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_SILENT_DROP_CACHED_TASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_DROP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_CRC_ERROR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_ERROR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_PREVIOUS_THREAD_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DATA_IN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_READ_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DROP_ERR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_ERRORS_NUMBER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_NUMBER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_BITMAP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_ENABLE_CONN_RACE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_CRC_ERROR_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIMER_ARRAY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_ABTS_BLOCK_SQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_CLEANUP_BLOCK_SQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_WAIT_FOR_YOUR_TURN_SP_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_AFEX_ERROR_PACKETS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_TABLE_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET }; diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57712_int_offsets.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57712_int_offsets.h index dd1e337..7fddf12 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57712_int_offsets.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_57712_int_offsets.h @@ -1,328 +1,387 @@ -struct iro e2_iro_arr[326] = { - { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE - { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE - { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE - { 0x20, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE - { 0x3d, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID - { 0x3c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET - { 0xc, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET - { 0xe, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET - { 0x4, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET - { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK - { 0x1c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK - { 0x1c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK - { 0x13, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT - { 0x3e, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID - { 0x1, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE - { 0x2, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE - { 0x1, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION - { 0x50, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST - { 0x3, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE - { 0xab, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE - { 0xc000, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) - { 0xc008, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) - { 0xc000, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) - { 0x9ee8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_DCB_VERSION_OFFSET - { 0xc080, 0x10, 0x0, 0x0, 0x4}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) - { 0xc088, 0x10, 0x0, 0x0, 0x2}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) - { 0xc080, 0x10, 0x0, 0x0, 0x10}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) - { 0x9120, 0x0, 0x0, 0x0, 0x8}, // XSTORM_VIRTUALIZATION_MODE_OFFSET - { 0x9340, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) - { 0x9348, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET - { 0x9350, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x9354, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET - { 0x9358, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET - { 0x99f0, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) - { 0x9360, 0xc8, 0x0, 0x0, 0x98}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) - { 0x94f0, 0x98, 0x0, 0x0, 0x28}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) - { 0x9530, 0x98, 0x0, 0x0, 0x28}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) - {0x63010, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) - { 0x9c60, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) - { 0x9c61, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x9c18, 0x8, 0x0, 0x0, 0x2}, // XSTORM_E1HOV_OFFSET(pfId) - { 0x9c58, 0x0, 0x0, 0x0, 0x1}, // XSTORM_FUNCTION_MODE_OFFSET - { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX - { 0x9, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX - { 0x2, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE - { 0xc4c0, 0x0, 0x0, 0x0, 0x20}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0xc4e6, 0x0, 0x0, 0x0, 0x1}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET - { 0x6000, 0x20, 0x0, 0x0, 0x20}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x7300, 0x8, 0x0, 0x0, 0x8}, // XSTORM_VF_ZONE_OFFSET(vfId) - { 0x9ed8, 0x0, 0x0, 0x0, 0x1}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET - { 0x9ee0, 0x0, 0x0, 0x0, 0x1}, // XSTORM_PATH_ID_OFFSET - { 0x9ea0, 0x0, 0x0, 0x0, 0x8}, // XSTORM_E2_INTEG_RAM_OFFSET - { 0x9ea3, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET - { 0x9ea1, 0x0, 0x0, 0x0, 0x1}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET - { 0x9ea6, 0x0, 0x0, 0x0, 0x1}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET - { 0x9ea7, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE - { 0x3, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x3, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x5, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0xf, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - {0x60000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_DPM_BUFFER_OFFSET - { 0x9ea8, 0x0, 0x0, 0x0, 0x1}, // XSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x9ec8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x53, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE - { 0x9ed0, 0x0, 0x0, 0x0, 0x2}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET - { 0x9ed4, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET - { 0x9ed5, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET - { 0x9, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE - { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL - { 0x44, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION - { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST - { 0x50, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID - { 0x89, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x16c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x17a0, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) - { 0x17a1, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) - {0x62078, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) - { 0x16d0, 0x0, 0x0, 0x0, 0x1}, // TSTORM_FUNCTION_MODE_OFFSET - { 0x16d8, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET - { 0x16da, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_PFC_STRUCT_PER_PORT_OFFSET(portId) - { 0xa040, 0x0, 0x0, 0x0, 0x20}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) - { 0xe000, 0x20, 0x0, 0x0, 0x20}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0xf300, 0x8, 0x0, 0x0, 0x8}, // TSTORM_VF_ZONE_OFFSET(vfId) - { 0x16f0, 0x0, 0x0, 0x0, 0xb0}, // TSTORM_E2_INTEG_RAM_OFFSET - { 0x1737, 0x0, 0x0, 0x0, 0x1}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET - { 0x170f, 0x0, 0x0, 0x0, 0x1}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE - { 0x3, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x5, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x6, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0xd, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x1770, 0x0, 0x0, 0x0, 0x1}, // TSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x1790, 0x0, 0x0, 0x0, 0x8}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x51, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE - { 0x1778, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x177c, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x1780, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x1784, 0x0, 0x0, 0x0, 0x8}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0xb000, 0x18, 0x0, 0x0, 0x18}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) - { 0xc000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) - { 0xc000, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) - { 0xc001, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) - { 0xe200, 0x20, 0x0, 0x0, 0x20}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) - { 0xe204, 0x2, 0x8, 0x20, 0x2}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) - { 0xe200, 0x8, 0x20, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) - { 0xf400, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) - { 0xf540, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) - { 0xf5c0, 0x20, 0x0, 0x0, 0x20}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) - { 0xf5c0, 0x2, 0x20, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) - { 0xf300, 0x20, 0x0, 0x0, 0x20}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x11a0, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) - { 0x11a1, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) - { 0x4000, 0x20, 0x4, 0x0, 0x10}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) - { 0x5900, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) - { 0x5908, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) - { 0x5700, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) - { 0x5701, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) - { 0x1148, 0x0, 0x0, 0x0, 0x1}, // CSTORM_FUNCTION_MODE_OFFSET - { 0x1150, 0x0, 0x0, 0x0, 0x1}, // CSTORM_IGU_MODE_OFFSET - { 0x1158, 0x0, 0x0, 0x0, 0x10}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x11a4, 0x8, 0x0, 0x0, 0x4}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) - { 0x4000, 0x20, 0x0, 0x0, 0x20}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x5300, 0x10, 0x0, 0x0, 0x10}, // CSTORM_VF_ZONE_OFFSET(vfId) - { 0x1498, 0x0, 0x0, 0x0, 0x1}, // CSTORM_PATH_ID_OFFSET - { 0x3, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x1, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0xb, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x1468, 0x0, 0x0, 0x0, 0x1}, // CSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x1488, 0x0, 0x0, 0x0, 0x8}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x50, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE - { 0x8308, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET - { 0x8480, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) - { 0x8481, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) - { 0x4010, 0x28, 0x0, 0x0, 0x28}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) - { 0x8408, 0x0, 0x0, 0x0, 0x1}, // USTORM_FUNCTION_MODE_OFFSET - { 0x8454, 0x8, 0x0, 0x0, 0x2}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) - { 0x8456, 0x8, 0x0, 0x0, 0x2}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) - { 0x8464, 0x10, 0x0, 0x0, 0x4}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) - { 0x86c0, 0x0, 0x0, 0x0, 0x20}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x6000, 0x20, 0x0, 0x0, 0x20}, // USTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x7300, 0x8, 0x0, 0x0, 0x8}, // USTORM_VF_ZONE_OFFSET(vfId) - { 0x3, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x5, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x6, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0xd, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x8768, 0x0, 0x0, 0x0, 0x1}, // USTORM_KUKU_TEST_OPCODE_OFFSET - { 0x8788, 0x0, 0x0, 0x0, 0x8}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x50, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE - { 0x8770, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x8774, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x8778, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x877c, 0x0, 0x0, 0x0, 0x8}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) - { 0x30a0, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET - {0x62a20, 0x2600, 0x40, 0x0, 0x8}, // USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(portId,clientId) - { 0xa000, 0x0, 0x0, 0x0, 0x2000}, // USTORM_AGG_DATA_OFFSET - { 0x30a1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET - { 0x30e8, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) - { 0x6000, 0x20, 0x0, 0x0, 0x8}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) - { 0x4000, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) - { 0x4001, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) - { 0x4040, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) - { 0x4060, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) - { 0x4000, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) - { 0x4004, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) - { 0x4040, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET - { 0x4048, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET - { 0x8000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET - { 0x5040, 0x1, 0x4, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) - { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET - { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) - { 0x500c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) - { 0x3000, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x3004, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x3008, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x300a, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x300c, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x300d, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x300e, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x3010, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x3014, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0xc000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) - { 0xc004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) - { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS - { 0xc068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) - { 0xc069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) - { 0xc06c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) - { 0xc06e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) - { 0xc070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0xc074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0xc066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) - { 0xc064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0xc060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0xc062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0xc050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0xc054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0xc058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0xc05c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0xc07c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0xc07d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x1018, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) - { 0x1090, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) - { 0x1098, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) - { 0x1110, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_LOW_OFFSET - { 0x1112, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_LOW_OFFSET - { 0x1114, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_HIGH_OFFSET - { 0x1116, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET - { 0x6040, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x6042, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x6044, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x6080, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x60c0, 0x40, 0x8, 0x0, 0x8}, // TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfId,iscsiConBufPblEntry) - { 0x6000, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x6002, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x6004, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x6340, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x6380, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) - { 0x6384, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) - { 0x63c0, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) - { 0x63c4, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) - { 0x6400, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) - { 0x7000, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_OOO_PKTS_OFFSET(pfId) - { 0x7004, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_SPILL_PKTS_OFFSET(pfId) - { 0x7008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_L2_RING_FULL_DROPS_OFFSET(pfId) - { 0x9000, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x9002, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x9004, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x9040, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x9044, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x9046, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0x9660, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) - { 0x9080, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) - { 0x9084, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x96a0, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x8040, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) - { 0x8041, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) - { 0x8042, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x8043, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) - { 0x8000, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x8002, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x8004, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x80c0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x80c2, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) - { 0x80c4, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x8080, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) - { 0x8081, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) - { 0x8082, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) - { 0x8083, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) - { 0x8084, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) - { 0x8085, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) - { 0x8086, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) - { 0x6000, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x6002, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x6004, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x6042, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) - { 0x6040, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) - { 0x604c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x6044, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x6057, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) - { 0x6054, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) - { 0x6056, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) - { 0x6640, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x6680, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x66c0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0xda42, 0x18, 0x0, 0x0, 0x2}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) - { 0xde40, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET - { 0xe000, 0x0, 0x0, 0x0, 0x4}, // USTORM_TIMER_ARRAY_OFFSET - { 0xd0c0, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FC_CRC_CNT_OFFSET - { 0xd0c4, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET - { 0xd0c8, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET - { 0xd0cc, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET - { 0xd0d0, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET - { 0xd0d4, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0xd0d8, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET - { 0xd0c0, 0x0, 0x0, 0x0, 0x20}, // USTORM_STAT_OFFSET - { 0xdb00, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET - { 0xdb00, 0x0, 0x0, 0x0, 0x68}, // USTORM_DEBUG_OFFSET - { 0xb948, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET - { 0xd000, 0x0, 0x0, 0x0, 0x4}, // XSTORM_TIMER_ARRAY_OFFSET - { 0xb0c0, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET - { 0xb0c4, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET - { 0xb0c8, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET - { 0xb0c0, 0x0, 0x0, 0x0, 0x10}, // XSTORM_STAT_OFFSET - { 0xd6b0, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET - { 0xd6b4, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET - { 0xd6b8, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET - { 0xd6bc, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0xd6b0, 0x0, 0x0, 0x0, 0x10}, // TSTORM_STAT_OFFSET - { 0xd348, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_DATA_OFFSET - { 0xd358, 0x0, 0x0, 0x0, 0x80}, // TSTORM_REORDER_WAITING_TABLE_OFFSET - { 0x10, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE - { 0xd358, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +*/ +static const struct iro e2_iro_arr[378] = { + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE + { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE + { 0x3d, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID + { 0x3c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET + { 0xc, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET + { 0xe, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET + { 0x4, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET + { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK + { 0x1c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK + { 0x1c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK + { 0x13, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT + { 0x3e, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID + { 0x1, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE + { 0x2, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE + { 0x1, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION + { 0x50, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST + { 0x3, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE + { 0xab, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE + { 0xc000, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) + { 0xc008, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) + { 0xc000, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) + { 0x9c08, 0x4, 0x0, 0x0, 0x4}, // XSTORM_HIGIG_HDR_LENGTH_OFFSET(portId) + { 0xc080, 0x10, 0x0, 0x0, 0x4}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) + { 0xc088, 0x10, 0x0, 0x0, 0x2}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) + { 0xc080, 0x10, 0x0, 0x0, 0x10}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) + { 0x9338, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) + { 0x9340, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET + { 0x9348, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x934c, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET + { 0x9350, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET + { 0x9698, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) + { 0x9358, 0x80, 0x0, 0x0, 0x48}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) + { 0x9458, 0x40, 0x0, 0x0, 0x8}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) + { 0x9468, 0x40, 0x0, 0x0, 0x18}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) + { 0x63010, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) + { 0x9950, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) + { 0x9951, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) + { 0x9952, 0x8, 0x0, 0x0, 0x1}, // XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x9bb8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + { 0x1, 0x0, 0x0, 0x0, 0x0}, // PCI_READ_KUKUE_CODE_OPPCOE + { 0x2, 0x0, 0x0, 0x0, 0x0}, // LOAD_CONTEXT_KUKUE_CODE_OPPCOE + { 0x3, 0x0, 0x0, 0x0, 0x0}, // QM_PAUSE_KUKUE_CODE_OPPCOE + { 0x4, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT0_KUKUE_CODE_OPPCOE + { 0x5, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT0_KUKUE_CODE_OPPCOE + { 0x6, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT1_KUKUE_CODE_OPPCOE + { 0x7, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT1_KUKUE_CODE_OPPCOE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // TEST_UNUSED_FOCS_KUKUE_CODE_OPPCOE + { 0x9, 0x0, 0x0, 0x0, 0x0}, // PBF_ECHO_KUKUE_CODE_OPPCOE + { 0xa, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT0_KUKUE_CODE_OPPCOE + { 0xb, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT1_KUKUE_CODE_OPPCOE + { 0xc, 0x0, 0x0, 0x0, 0x0}, // IGU_TEST_KUKUE_CODE_OPPCOE + { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX + { 0x9, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX + { 0x2, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE + { 0xc4c0, 0x0, 0x0, 0x0, 0x20}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + { 0xc4e6, 0x0, 0x0, 0x0, 0x1}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET + { 0x6000, 0x20, 0x0, 0x0, 0x20}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) + { 0x7300, 0x8, 0x0, 0x0, 0x8}, // XSTORM_VF_ZONE_OFFSET(vfId) + { 0x9bf0, 0x0, 0x0, 0x0, 0x1}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET + { 0x9b90, 0x0, 0x0, 0x0, 0x8}, // XSTORM_E2_INTEG_RAM_OFFSET + { 0x9b93, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET + { 0x9b91, 0x0, 0x0, 0x0, 0x1}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET + { 0x9b96, 0x0, 0x0, 0x0, 0x1}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET + { 0x9b97, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + { 0x60000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_DPM_BUFFER_OFFSET + { 0x9b98, 0x0, 0x0, 0x0, 0x1}, // XSTORM_KUKU_TEST_OPCODE_OFFSET + { 0x9bd8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x53, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE + { 0x9be0, 0x0, 0x0, 0x0, 0x2}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET + { 0x9be4, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET + { 0x9be5, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET + { 0x9, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE + { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL + { 0x44, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION + { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST + { 0x50, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID + { 0x89, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE + { 0x9953, 0x8, 0x0, 0x0, 0x1}, // XSTORM_KUKU_TIME_SYNC_FLG_OFFSET(funcId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x16c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x17d0, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) + { 0x17d1, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) + { 0x17d2, 0x8, 0x0, 0x0, 0x1}, // TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x62078, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) + { 0x16e0, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET + { 0x16e2, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET + { 0xa040, 0x0, 0x0, 0x0, 0x20}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) + { 0xe000, 0x20, 0x0, 0x0, 0x20}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) + { 0xf300, 0x8, 0x0, 0x0, 0x8}, // TSTORM_VF_ZONE_OFFSET(vfId) + { 0x16f8, 0x0, 0x0, 0x0, 0xd8}, // TSTORM_E2_INTEG_RAM_OFFSET + { 0x173f, 0x0, 0x0, 0x0, 0x1}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET + { 0x1717, 0x0, 0x0, 0x0, 0x1}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + { 0x1778, 0x0, 0x0, 0x0, 0x1}, // TSTORM_KUKU_TEST_OPCODE_OFFSET + { 0x17b8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x51, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE + { 0x17a0, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + { 0x17a4, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + { 0x17a8, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + { 0x17ac, 0x0, 0x0, 0x0, 0x8}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + { 0x1798, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + { 0x17c8, 0x0, 0x0, 0x0, 0x2}, // TSTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0x60000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) + { 0xc000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) + { 0xc02e, 0x40, 0x0, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) + { 0xc000, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) + { 0xc001, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) + { 0xe200, 0x20, 0x0, 0x0, 0x20}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) + { 0xe204, 0x2, 0x8, 0x20, 0x2}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) + { 0xe200, 0x8, 0x20, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) + { 0xf500, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) + { 0xf640, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) + { 0xf64a, 0x10, 0x0, 0x0, 0x1}, // CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) + { 0xf6c0, 0x20, 0x0, 0x0, 0x20}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) + { 0xf6c0, 0x2, 0x20, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) + { 0xf300, 0x40, 0x0, 0x0, 0x40}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x11a8, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) + { 0x11a9, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) + { 0x11aa, 0x8, 0x0, 0x0, 0x1}, // CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x4000, 0x20, 0x4, 0x0, 0x10}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) + { 0x5900, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) + { 0x5908, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) + { 0x5700, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) + { 0x5701, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) + { 0x1158, 0x0, 0x0, 0x0, 0x1}, // CSTORM_IGU_MODE_OFFSET + { 0x1160, 0x0, 0x0, 0x0, 0x10}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + { 0x11ac, 0x8, 0x0, 0x0, 0x4}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) + { 0x4000, 0x20, 0x0, 0x0, 0x20}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) + { 0x5300, 0x10, 0x0, 0x0, 0x10}, // CSTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + { 0x1470, 0x0, 0x0, 0x0, 0x1}, // CSTORM_KUKU_TEST_OPCODE_OFFSET + { 0x14b0, 0x0, 0x0, 0x0, 0x8}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x50, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE + { 0x1478, 0x0, 0x0, 0x0, 0x4}, // CSTORM_IGU_TEST_PF_ID_OFFSET + { 0x147c, 0x0, 0x0, 0x0, 0x4}, // CSTORM_IGU_TEST_VF_ID_OFFSET + { 0x1480, 0x0, 0x0, 0x0, 0x4}, // CSTORM_IGU_TEST_VF_VALID_OFFSET + { 0x1484, 0x0, 0x0, 0x0, 0x4}, // CSTORM_IGU_TEST_ADDRESS_OFFSET + { 0x1488, 0x0, 0x0, 0x0, 0x8}, // CSTORM_IGU_TEST_IGU_COMMAND_OFFSET + { 0x2af0, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) + { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET + { 0x2c70, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) + { 0x2c71, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) + { 0x2c72, 0x8, 0x0, 0x0, 0x1}, // USTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x4158, 0x38, 0x0, 0x0, 0x38}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) + { 0x2c44, 0x8, 0x0, 0x0, 0x2}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) + { 0x2c46, 0x8, 0x0, 0x0, 0x2}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) + { 0x2c54, 0x10, 0x0, 0x0, 0x4}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) + { 0x2eb0, 0x0, 0x0, 0x0, 0x20}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + { 0x6000, 0x20, 0x0, 0x0, 0x20}, // USTORM_QUEUE_ZONE_OFFSET(queueId) + { 0x7300, 0x8, 0x0, 0x0, 0x8}, // USTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + { 0x2f58, 0x0, 0x0, 0x0, 0x1}, // USTORM_KUKU_TEST_OPCODE_OFFSET + { 0x2f98, 0x0, 0x0, 0x0, 0x8}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x50, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE + { 0x2f80, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + { 0x2f84, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + { 0x2f88, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + { 0x2f8c, 0x0, 0x0, 0x0, 0x8}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + { 0x2fa8, 0x0, 0x0, 0x0, 0x2}, // USTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) + { 0x3128, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET + { 0x62a20, 0x2600, 0x40, 0x0, 0x8}, // USTORM_CQE_PAGE_NEXT_OFFSET(portId,clientId) + { 0xa000, 0x0, 0x0, 0x0, 0x2000}, // USTORM_AGG_DATA_OFFSET + { 0x40c1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET + { 0x40f0, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) + { 0x6000, 0x20, 0x0, 0x0, 0x8}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) + { 0x4000, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) + { 0x4001, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) + { 0x4040, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) + { 0x4060, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) + { 0x4080, 0x8, 0x0, 0x0, 0x4}, // XSTORM_TCP_TX_SWITCHING_EN_OFFSET(portId) + { 0x4000, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) + { 0x4004, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) + { 0x4040, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET + { 0x4048, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET + { 0x8000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET + { 0x5040, 0x1, 0x4, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) + { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET + { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) + { 0x500c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) + { 0x52c7, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_MAX_DOMINANCE_VALUE_OFFSET + { 0x52c6, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOMINANCE_THRESHOLD_OFFSET + { 0x3000, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x3004, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x3008, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x300a, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x300c, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x300d, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x300e, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x3010, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x3014, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x3018, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_PROD_OFFSET(rssId,portId) + { 0x301c, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_CONS_OFFSET(rssId,portId) + { 0xc000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) + { 0xc004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) + { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS + { 0xc068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) + { 0xc069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) + { 0xc06c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) + { 0xc06e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) + { 0xc070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0xc074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0xc066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) + { 0xc064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0xc060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0xc062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0xc050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0xc054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0xc058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0xc05c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0xc07c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0xc07d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x1018, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) + { 0x1090, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) + { 0x1098, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) + { 0x1110, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_LOW_OFFSET + { 0x1112, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_LOW_OFFSET + { 0x1114, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_HIGH_OFFSET + { 0x1116, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET + { 0x6040, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x6042, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6044, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6046, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6080, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x6000, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x6002, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x6004, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x60c0, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x6100, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) + { 0x6104, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) + { 0x6140, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) + { 0x6144, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) + { 0x6180, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) + { 0x3000, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x3002, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x3004, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x3040, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x3044, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x3046, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + { 0x3660, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) + { 0x3080, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) + { 0x3084, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x36a0, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x8040, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) + { 0x8041, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) + { 0x8042, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x8043, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) + { 0x8000, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x8002, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x8004, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x80c0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x80c2, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) + { 0x80c4, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x8080, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) + { 0x8081, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) + { 0x8082, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) + { 0x8083, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) + { 0x8084, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) + { 0x8085, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) + { 0x8086, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) + { 0x6000, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x6002, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x6004, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x6042, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) + { 0x6040, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) + { 0x604c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x6044, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x6057, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) + { 0x6054, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) + { 0x6056, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) + { 0x6640, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x6680, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x66c0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + { 0xda82, 0x18, 0x0, 0x0, 0x2}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) + { 0xdba0, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET + { 0xe000, 0x0, 0x0, 0x0, 0x4}, // USTORM_TIMER_ARRAY_OFFSET + { 0xd100, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FC_CRC_CNT_OFFSET + { 0xd104, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET + { 0xd108, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET + { 0xd10c, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET + { 0xd110, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET + { 0xd114, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + { 0xd118, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET + { 0xd100, 0x0, 0x0, 0x0, 0x20}, // USTORM_STAT_OFFSET + { 0x9280, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET + { 0x9280, 0x0, 0x0, 0x0, 0x28}, // USTORM_DEBUG_OFFSET + { 0x8050, 0xa8, 0x0, 0x0, 0x1}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_ONE_OFFSET(cached_tbl_size) + { 0x8054, 0xa8, 0x0, 0x0, 0x1}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_TWO_OFFSET(cached_tbl_size) + { 0x8000, 0x0, 0x0, 0x0, 0x50}, // USTORM_CACHED_TCE_ENTRY_TCE_OFFSET + { 0x8050, 0x0, 0x0, 0x0, 0x10}, // USTORM_CACHED_TCE_ENTRY_MNG_INFO_OFFSET + { 0x9600, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_CACHED_TCE_TBL_BIT_MAP_OFFSET + { 0x9400, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_WAIT_4_BD_READ_OFFSET + { 0x9404, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_DATA_OFFSET + { 0x9408, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_NON_DATA_OFFSET + { 0x940c, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_ERR_OFFSET + { 0x9410, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_GLOBAL_TIMER_TASK_IN_USE_OFFSET + { 0x9414, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_DEL_CACHED_TASK_OFFSET + { 0x9418, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_SILENT_DROP_CACHED_TASK_OFFSET + { 0x9400, 0x0, 0x0, 0x0, 0x40}, // USTORM_DEBUG_CACHED_TCE_OFFSET + { 0x9420, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_DROP_OFFSET + { 0x9424, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_CRC_ERROR_OFFSET + { 0x9428, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_ERROR_OFFSET + { 0x941c, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_PREVIOUS_THREAD_OFFSET + { 0x9430, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DATA_IN_OFFSET + { 0x942c, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_READ_TCE_OFFSET + { 0x9434, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DROP_ERR_OFFSET + { 0x9284, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_ERRORS_NUMBER_OFFSET + { 0x9280, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_NUMBER_OFFSET + { 0x9290, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_BITMAP_OFFSET + { 0x92a4, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_ENABLE_CONN_RACE_OFFSET + { 0x9438, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_TASK_IN_USE_OFFSET + { 0x943c, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_CRC_ERROR_TASK_IN_USE_OFFSET + { 0xb988, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET + { 0xd000, 0x0, 0x0, 0x0, 0x4}, // XSTORM_TIMER_ARRAY_OFFSET + { 0xb100, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET + { 0xb104, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET + { 0xb108, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET + { 0xb100, 0x0, 0x0, 0x0, 0x10}, // XSTORM_STAT_OFFSET + { 0xbcb0, 0x0, 0x0, 0x0, 0x4}, // XSTORM_DEBUG_ABTS_BLOCK_SQ_CNT_OFFSET + { 0xbcb4, 0x0, 0x0, 0x0, 0x4}, // XSTORM_DEBUG_CLEANUP_BLOCK_SQ_CNT_OFFSET + { 0xbcb0, 0x0, 0x0, 0x0, 0x48}, // XSTORM_DEBUG_OFFSET + { 0xd858, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET + { 0xd850, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET + { 0xd854, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET + { 0xd85c, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + { 0xd850, 0x0, 0x0, 0x0, 0x10}, // TSTORM_STAT_OFFSET + { 0xd840, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PORT_DEBUG_WAIT_FOR_YOUR_TURN_SP_CNT_OFFSET + { 0xd844, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PORT_DEBUG_AFEX_ERROR_PACKETS_OFFSET + { 0xd840, 0x0, 0x0, 0x0, 0x8}, // TSTORM_PORT_DEBUG_OFFSET + { 0xd4c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_DATA_OFFSET + { 0xd4d8, 0x0, 0x0, 0x0, 0x80}, // TSTORM_REORDER_WAITING_TABLE_OFFSET + { 0x10, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE + { 0xd4d8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET }; diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_fw_defs.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_fw_defs.h index 1053713..2850997 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_fw_defs.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_fw_defs.h @@ -1,6 +1,6 @@ /* bnx2x_fw_defs.h: Broadcom Everest network driver. * - * Copyright (c) 2007-2010 Broadcom Corporation + * Copyright (c) 2007-2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -10,220 +10,218 @@ #ifndef BNX2X_FW_DEFS_H #define BNX2X_FW_DEFS_H -#define CSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[135].base) +#define CSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[148].base) #define CSTORM_ASSERT_LIST_OFFSET(assertListEntry) \ - (IRO[134].base + ((assertListEntry) * IRO[134].m1)) + (IRO[147].base + ((assertListEntry) * IRO[147].m1)) #define CSTORM_EVENT_RING_DATA_OFFSET(pfId) \ - (IRO[139].base + (((pfId)>>1) * IRO[139].m1) + (((pfId)&1) * \ - IRO[139].m2)) + (IRO[153].base + (((pfId)>>1) * IRO[153].m1) + (((pfId)&1) * \ + IRO[153].m2)) +#define CSTORM_EVENT_RING_PROD_OFFSET(pfId) \ + (IRO[154].base + (((pfId)>>1) * IRO[154].m1) + (((pfId)&1) * \ + IRO[154].m2)) #define CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) \ - (IRO[146].base + ((funcId) * IRO[146].m1)) + (IRO[159].base + ((funcId) * IRO[159].m1)) #define CSTORM_FUNC_EN_OFFSET(funcId) \ - (IRO[136].base + ((funcId) * IRO[136].m1)) -#define CSTORM_FUNCTION_MODE_OFFSET (IRO[143].base) -#define CSTORM_IGU_MODE_OFFSET (IRO[144].base) + (IRO[149].base + ((funcId) * IRO[149].m1)) +#define CSTORM_IGU_MODE_OFFSET (IRO[157].base) #define CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \ - (IRO[296].base + ((pfId) * IRO[296].m1)) + (IRO[316].base + ((pfId) * IRO[316].m1)) #define CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ - (IRO[297].base + ((pfId) * IRO[297].m1)) - #define CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) \ - (IRO[289].base + ((pfId) * IRO[289].m1) + ((iscsiEqId) * \ - IRO[289].m2)) - #define CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) \ - (IRO[291].base + ((pfId) * IRO[291].m1) + ((iscsiEqId) * \ - IRO[291].m2)) - #define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) \ - (IRO[290].base + ((pfId) * IRO[290].m1) + ((iscsiEqId) * \ - IRO[290].m2)) - #define \ - CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) \ - (IRO[292].base + ((pfId) * IRO[292].m1) + ((iscsiEqId) * \ - IRO[292].m2)) - #define CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) \ - (IRO[288].base + ((pfId) * IRO[288].m1) + ((iscsiEqId) * \ - IRO[288].m2)) - #define CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) \ - (IRO[294].base + ((pfId) * IRO[294].m1) + ((iscsiEqId) * \ - IRO[294].m2)) - #define CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) \ - (IRO[293].base + ((pfId) * IRO[293].m1) + ((iscsiEqId) * \ - IRO[293].m2)) + (IRO[317].base + ((pfId) * IRO[317].m1)) +#define CSTORM_ISCSI_EQ_CONS_OFFSET(pfId, iscsiEqId) \ + (IRO[309].base + ((pfId) * IRO[309].m1) + ((iscsiEqId) * IRO[309].m2)) +#define CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId, iscsiEqId) \ + (IRO[311].base + ((pfId) * IRO[311].m1) + ((iscsiEqId) * IRO[311].m2)) +#define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId, iscsiEqId) \ + (IRO[310].base + ((pfId) * IRO[310].m1) + ((iscsiEqId) * IRO[310].m2)) +#define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId, iscsiEqId) \ + (IRO[312].base + ((pfId) * IRO[312].m1) + ((iscsiEqId) * IRO[312].m2)) +#define CSTORM_ISCSI_EQ_PROD_OFFSET(pfId, iscsiEqId) \ + (IRO[308].base + ((pfId) * IRO[308].m1) + ((iscsiEqId) * IRO[308].m2)) +#define CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId, iscsiEqId) \ + (IRO[314].base + ((pfId) * IRO[314].m1) + ((iscsiEqId) * IRO[314].m2)) +#define CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId, iscsiEqId) \ + (IRO[313].base + ((pfId) * IRO[313].m1) + ((iscsiEqId) * IRO[313].m2)) #define CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \ - (IRO[295].base + ((pfId) * IRO[295].m1)) + (IRO[315].base + ((pfId) * IRO[315].m1)) #define CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ - (IRO[287].base + ((pfId) * IRO[287].m1)) + (IRO[307].base + ((pfId) * IRO[307].m1)) #define CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ - (IRO[286].base + ((pfId) * IRO[286].m1)) + (IRO[306].base + ((pfId) * IRO[306].m1)) #define CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ - (IRO[285].base + ((pfId) * IRO[285].m1)) -#define CSTORM_PATH_ID_OFFSET (IRO[149].base) + (IRO[305].base + ((pfId) * IRO[305].m1)) +#define CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \ + (IRO[151].base + ((funcId) * IRO[151].m1)) #define CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) \ - (IRO[130].base + ((pfId) * IRO[130].m1)) + (IRO[142].base + ((pfId) * IRO[142].m1)) +#define CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) \ + (IRO[143].base + ((pfId) * IRO[143].m1)) #define CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) \ - (IRO[129].base + ((pfId) * IRO[129].m1)) -#define CSTORM_SP_STATUS_BLOCK_SIZE (IRO[129].size) + (IRO[141].base + ((pfId) * IRO[141].m1)) +#define CSTORM_SP_STATUS_BLOCK_SIZE (IRO[141].size) #define CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) \ - (IRO[131].base + ((pfId) * IRO[131].m1)) -#define CSTORM_SP_SYNC_BLOCK_SIZE (IRO[131].size) + (IRO[144].base + ((pfId) * IRO[144].m1)) +#define CSTORM_SP_SYNC_BLOCK_SIZE (IRO[144].size) +#define CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId, hcIndex) \ + (IRO[136].base + ((sbId) * IRO[136].m1) + ((hcIndex) * IRO[136].m2)) #define CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) \ - (IRO[122].base + ((sbId) * IRO[122].m1)) + (IRO[133].base + ((sbId) * IRO[133].m1)) +#define CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) \ + (IRO[134].base + ((sbId) * IRO[134].m1)) +#define CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId, hcIndex) \ + (IRO[135].base + ((sbId) * IRO[135].m1) + ((hcIndex) * IRO[135].m2)) #define CSTORM_STATUS_BLOCK_OFFSET(sbId) \ - (IRO[121].base + ((sbId) * IRO[121].m1)) -#define CSTORM_STATUS_BLOCK_SIZE (IRO[121].size) + (IRO[132].base + ((sbId) * IRO[132].m1)) +#define CSTORM_STATUS_BLOCK_SIZE (IRO[132].size) #define CSTORM_SYNC_BLOCK_OFFSET(sbId) \ - (IRO[125].base + ((sbId) * IRO[125].m1)) -#define CSTORM_SYNC_BLOCK_SIZE (IRO[125].size) + (IRO[137].base + ((sbId) * IRO[137].m1)) +#define CSTORM_SYNC_BLOCK_SIZE (IRO[137].size) #define CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) \ - (IRO[141].base + ((vfId) * IRO[141].m1)) + (IRO[155].base + ((vfId) * IRO[155].m1)) #define CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) \ - (IRO[142].base + ((vfId) * IRO[142].m1)) + (IRO[156].base + ((vfId) * IRO[156].m1)) #define CSTORM_VF_TO_PF_OFFSET(funcId) \ - (IRO[137].base + ((funcId) * IRO[137].m1)) -#define TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET (IRO[186].base) + (IRO[150].base + ((funcId) * IRO[150].m1)) +#define TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET (IRO[204].base) #define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) \ - (IRO[185].base + ((pfId) * IRO[185].m1)) -#define TSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[92].base) + (IRO[203].base + ((pfId) * IRO[203].m1)) +#define TSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[102].base) #define TSTORM_ASSERT_LIST_OFFSET(assertListEntry) \ - (IRO[91].base + ((assertListEntry) * IRO[91].m1)) -#define TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET (IRO[97].base) -#define TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET \ - (IRO[98].base) -#define TSTORM_FUNC_EN_OFFSET(funcId) \ - (IRO[93].base + ((funcId) * IRO[93].m1)) + (IRO[101].base + ((assertListEntry) * IRO[101].m1)) #define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) \ - (IRO[183].base + ((pfId) * IRO[183].m1)) -#define TSTORM_FUNCTION_MODE_OFFSET (IRO[96].base) - #define \ - TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfId,iscsiConBufPblEntry) \ - (IRO[245].base + ((pfId) * IRO[245].m1) + ((iscsiConBufPblEntry) \ - * IRO[245].m2)) + (IRO[201].base + ((pfId) * IRO[201].m1)) +#define TSTORM_FUNC_EN_OFFSET(funcId) \ + (IRO[103].base + ((funcId) * IRO[103].m1)) #define TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \ - (IRO[249].base + ((pfId) * IRO[249].m1)) + (IRO[272].base + ((pfId) * IRO[272].m1)) #define TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) \ - (IRO[250].base + ((pfId) * IRO[250].m1)) + (IRO[273].base + ((pfId) * IRO[273].m1)) #define TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) \ - (IRO[251].base + ((pfId) * IRO[251].m1)) + (IRO[274].base + ((pfId) * IRO[274].m1)) #define TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) \ - (IRO[252].base + ((pfId) * IRO[252].m1)) + (IRO[275].base + ((pfId) * IRO[275].m1)) #define TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ - (IRO[248].base + ((pfId) * IRO[248].m1)) + (IRO[271].base + ((pfId) * IRO[271].m1)) #define TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ - (IRO[247].base + ((pfId) * IRO[247].m1)) + (IRO[270].base + ((pfId) * IRO[270].m1)) #define TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ - (IRO[246].base + ((pfId) * IRO[246].m1)) + (IRO[269].base + ((pfId) * IRO[269].m1)) #define TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \ - (IRO[244].base + ((pfId) * IRO[244].m1)) + (IRO[268].base + ((pfId) * IRO[268].m1)) #define TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) \ - (IRO[254].base + ((pfId) * IRO[254].m1)) + (IRO[277].base + ((pfId) * IRO[277].m1)) #define TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \ - (IRO[241].base + ((pfId) * IRO[241].m1)) -#define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ - (IRO[242].base + ((pfId) * IRO[242].m1)) -#define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ - (IRO[243].base + ((pfId) * IRO[243].m1)) -#define TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) \ - (IRO[184].base + ((pfId) * IRO[184].m1)) -#define TSTORM_TCP_MAX_CWND_OFFSET(pfId) \ - (IRO[198].base + ((pfId) * IRO[198].m1)) -#define TSTORM_VF_TO_PF_OFFSET(funcId) \ - (IRO[94].base + ((funcId) * IRO[94].m1)) -#define USTORM_AGG_DATA_OFFSET (IRO[188].base) -#define USTORM_AGG_DATA_SIZE (IRO[188].size) -#define USTORM_ASSERT_LIST_INDEX_OFFSET (IRO[160].base) -#define USTORM_ASSERT_LIST_OFFSET(assertListEntry) \ - (IRO[159].base + ((assertListEntry) * IRO[159].m1)) - #define USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(portId,clientId) \ - (IRO[187].base + ((portId) * IRO[187].m1) + ((clientId) * \ - IRO[187].m2)) -#define USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) \ - (IRO[166].base + ((portId) * IRO[166].m1)) -#define USTORM_FCOE_EQ_PROD_OFFSET(pfId) \ - (IRO[298].base + ((pfId) * IRO[298].m1)) -#define USTORM_FUNC_EN_OFFSET(funcId) \ - (IRO[161].base + ((funcId) * IRO[161].m1)) -#define USTORM_FUNCTION_MODE_OFFSET (IRO[165].base) -#define USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \ - (IRO[262].base + ((pfId) * IRO[262].m1)) -#define USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ - (IRO[263].base + ((pfId) * IRO[263].m1)) -#define USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \ - (IRO[267].base + ((pfId) * IRO[267].m1)) -#define USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) \ (IRO[264].base + ((pfId) * IRO[264].m1)) -#define USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ - (IRO[260].base + ((pfId) * IRO[260].m1)) -#define USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ - (IRO[259].base + ((pfId) * IRO[259].m1)) -#define USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ - (IRO[258].base + ((pfId) * IRO[258].m1)) -#define USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \ - (IRO[261].base + ((pfId) * IRO[261].m1)) -#define USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) \ +#define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ (IRO[265].base + ((pfId) * IRO[265].m1)) -#define USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \ +#define TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) \ (IRO[266].base + ((pfId) * IRO[266].m1)) +#define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ + (IRO[267].base + ((pfId) * IRO[267].m1)) +#define TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) \ + (IRO[202].base + ((pfId) * IRO[202].m1)) +#define TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \ + (IRO[105].base + ((funcId) * IRO[105].m1)) +#define TSTORM_TCP_MAX_CWND_OFFSET(pfId) \ + (IRO[217].base + ((pfId) * IRO[217].m1)) +#define TSTORM_VF_TO_PF_OFFSET(funcId) \ + (IRO[104].base + ((funcId) * IRO[104].m1)) +#define USTORM_AGG_DATA_OFFSET (IRO[206].base) +#define USTORM_AGG_DATA_SIZE (IRO[206].size) +#define USTORM_ASSERT_LIST_INDEX_OFFSET (IRO[177].base) +#define USTORM_ASSERT_LIST_OFFSET(assertListEntry) \ + (IRO[176].base + ((assertListEntry) * IRO[176].m1)) +#define USTORM_CQE_PAGE_NEXT_OFFSET(portId, clientId) \ + (IRO[205].base + ((portId) * IRO[205].m1) + ((clientId) * \ + IRO[205].m2)) +#define USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) \ + (IRO[183].base + ((portId) * IRO[183].m1)) +#define USTORM_FCOE_EQ_PROD_OFFSET(pfId) \ + (IRO[318].base + ((pfId) * IRO[318].m1)) +#define USTORM_FUNC_EN_OFFSET(funcId) \ + (IRO[178].base + ((funcId) * IRO[178].m1)) +#define USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \ + (IRO[282].base + ((pfId) * IRO[282].m1)) +#define USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ + (IRO[283].base + ((pfId) * IRO[283].m1)) +#define USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \ + (IRO[287].base + ((pfId) * IRO[287].m1)) +#define USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) \ + (IRO[284].base + ((pfId) * IRO[284].m1)) +#define USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ + (IRO[280].base + ((pfId) * IRO[280].m1)) +#define USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ + (IRO[279].base + ((pfId) * IRO[279].m1)) +#define USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ + (IRO[278].base + ((pfId) * IRO[278].m1)) +#define USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \ + (IRO[281].base + ((pfId) * IRO[281].m1)) +#define USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) \ + (IRO[285].base + ((pfId) * IRO[285].m1)) +#define USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \ + (IRO[286].base + ((pfId) * IRO[286].m1)) #define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) \ - (IRO[164].base + ((pfId) * IRO[164].m1)) - #define USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) \ - (IRO[191].base + ((portId) * IRO[191].m1) + ((clientId) * \ - IRO[191].m2)) + (IRO[182].base + ((pfId) * IRO[182].m1)) +#define USTORM_RECORD_SLOW_PATH_OFFSET(funcId) \ + (IRO[180].base + ((funcId) * IRO[180].m1)) +#define USTORM_RX_PRODS_E1X_OFFSET(portId, clientId) \ + (IRO[209].base + ((portId) * IRO[209].m1) + ((clientId) * \ + IRO[209].m2)) #define USTORM_RX_PRODS_E2_OFFSET(qzoneId) \ - (IRO[192].base + ((qzoneId) * IRO[192].m1)) -#define USTORM_TPA_BTR_OFFSET (IRO[189].base) -#define USTORM_TPA_BTR_SIZE (IRO[189].size) + (IRO[210].base + ((qzoneId) * IRO[210].m1)) +#define USTORM_TPA_BTR_OFFSET (IRO[207].base) +#define USTORM_TPA_BTR_SIZE (IRO[207].size) #define USTORM_VF_TO_PF_OFFSET(funcId) \ - (IRO[162].base + ((funcId) * IRO[162].m1)) -#define XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE (IRO[56].base) -#define XSTORM_AGG_INT_FINAL_CLEANUP_INDEX (IRO[55].base) -#define XSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[51].base) + (IRO[179].base + ((funcId) * IRO[179].m1)) +#define XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE (IRO[67].base) +#define XSTORM_AGG_INT_FINAL_CLEANUP_INDEX (IRO[66].base) +#define XSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[51].base) #define XSTORM_ASSERT_LIST_OFFSET(assertListEntry) \ (IRO[50].base + ((assertListEntry) * IRO[50].m1)) #define XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) \ - (IRO[44].base + ((portId) * IRO[44].m1)) -#define XSTORM_E1HOV_OFFSET(pfId) \ - (IRO[52].base + ((pfId) * IRO[52].m1)) + (IRO[43].base + ((portId) * IRO[43].m1)) #define XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) \ - (IRO[46].base + ((pfId) * IRO[46].m1)) -#define XSTORM_FUNC_EN_OFFSET(funcId) \ - (IRO[48].base + ((funcId) * IRO[48].m1)) -#define XSTORM_FUNCTION_MODE_OFFSET (IRO[53].base) -#define XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \ - (IRO[275].base + ((pfId) * IRO[275].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) \ - (IRO[278].base + ((pfId) * IRO[278].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) \ - (IRO[279].base + ((pfId) * IRO[279].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) \ - (IRO[280].base + ((pfId) * IRO[280].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) \ - (IRO[281].base + ((pfId) * IRO[281].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) \ - (IRO[282].base + ((pfId) * IRO[282].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) \ - (IRO[283].base + ((pfId) * IRO[283].m1)) -#define XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) \ - (IRO[284].base + ((pfId) * IRO[284].m1)) -#define XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ - (IRO[274].base + ((pfId) * IRO[274].m1)) -#define XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ - (IRO[273].base + ((pfId) * IRO[273].m1)) -#define XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ - (IRO[272].base + ((pfId) * IRO[272].m1)) -#define XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \ - (IRO[277].base + ((pfId) * IRO[277].m1)) -#define XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) \ - (IRO[276].base + ((pfId) * IRO[276].m1)) -#define XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) \ - (IRO[271].base + ((pfId) * IRO[271].m1)) -#define XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \ - (IRO[270].base + ((pfId) * IRO[270].m1)) -#define XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) \ - (IRO[269].base + ((pfId) * IRO[269].m1)) -#define XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) \ - (IRO[268].base + ((pfId) * IRO[268].m1)) -#define XSTORM_PATH_ID_OFFSET (IRO[62].base) -#define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) \ (IRO[45].base + ((pfId) * IRO[45].m1)) +#define XSTORM_FUNC_EN_OFFSET(funcId) \ + (IRO[47].base + ((funcId) * IRO[47].m1)) +#define XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \ + (IRO[295].base + ((pfId) * IRO[295].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) \ + (IRO[298].base + ((pfId) * IRO[298].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) \ + (IRO[299].base + ((pfId) * IRO[299].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) \ + (IRO[300].base + ((pfId) * IRO[300].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) \ + (IRO[301].base + ((pfId) * IRO[301].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) \ + (IRO[302].base + ((pfId) * IRO[302].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) \ + (IRO[303].base + ((pfId) * IRO[303].m1)) +#define XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) \ + (IRO[304].base + ((pfId) * IRO[304].m1)) +#define XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ + (IRO[294].base + ((pfId) * IRO[294].m1)) +#define XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ + (IRO[293].base + ((pfId) * IRO[293].m1)) +#define XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ + (IRO[292].base + ((pfId) * IRO[292].m1)) +#define XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \ + (IRO[297].base + ((pfId) * IRO[297].m1)) +#define XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) \ + (IRO[296].base + ((pfId) * IRO[296].m1)) +#define XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) \ + (IRO[291].base + ((pfId) * IRO[291].m1)) +#define XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \ + (IRO[290].base + ((pfId) * IRO[290].m1)) +#define XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) \ + (IRO[289].base + ((pfId) * IRO[289].m1)) +#define XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) \ + (IRO[288].base + ((pfId) * IRO[288].m1)) +#define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) \ + (IRO[44].base + ((pfId) * IRO[44].m1)) +#define XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \ + (IRO[49].base + ((funcId) * IRO[49].m1)) #define XSTORM_SPQ_DATA_OFFSET(funcId) \ (IRO[32].base + ((funcId) * IRO[32].m1)) #define XSTORM_SPQ_DATA_SIZE (IRO[32].size) @@ -232,14 +230,14 @@ #define XSTORM_SPQ_PROD_OFFSET(funcId) \ (IRO[31].base + ((funcId) * IRO[31].m1)) #define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) \ - (IRO[193].base + ((portId) * IRO[193].m1)) + (IRO[211].base + ((portId) * IRO[211].m1)) #define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) \ - (IRO[194].base + ((portId) * IRO[194].m1)) + (IRO[212].base + ((portId) * IRO[212].m1)) #define XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) \ - (IRO[196].base + (((pfId)>>1) * IRO[196].m1) + (((pfId)&1) * \ - IRO[196].m2)) + (IRO[214].base + (((pfId)>>1) * IRO[214].m1) + (((pfId)&1) * \ + IRO[214].m2)) #define XSTORM_VF_TO_PF_OFFSET(funcId) \ - (IRO[49].base + ((funcId) * IRO[49].m1)) + (IRO[48].base + ((funcId) * IRO[48].m1)) #define COMMON_ASM_INVALID_ASSERT_OPCODE 0x0 /** @@ -253,32 +251,15 @@ #include "Microcode\Generated\DataTypes\eth_rx_cqe_next_page.h" #endif -/* RSS hash types */ -#define DEFAULT_HASH_TYPE 0 -#define IPV4_HASH_TYPE 1 -#define TCP_IPV4_HASH_TYPE 2 -#define IPV6_HASH_TYPE 3 -#define TCP_IPV6_HASH_TYPE 4 -#define VLAN_PRI_HASH_TYPE 5 -#define E1HOV_PRI_HASH_TYPE 6 -#define DSCP_HASH_TYPE 7 - /* Ethernet Ring parameters */ #define X_ETH_LOCAL_RING_SIZE 13 -#define FIRST_BD_IN_PKT 0 +#define FIRST_BD_IN_PKT 0 #define PARSE_BD_INDEX 1 #define NUM_OF_ETH_BDS_IN_PAGE ((PAGE_SIZE)/(STRUCT_SIZE(eth_tx_bd)/8)) #define U_ETH_NUM_OF_SGES_TO_FETCH 8 #define U_ETH_MAX_SGES_FOR_PACKET 3 -/*Tx params*/ -#define X_ETH_NO_VLAN 0 -#define X_ETH_OUTBAND_VLAN 1 -#define X_ETH_INBAND_VLAN 2 -#define X_ETH_FW_ADDED_VLAN 3 -#define X_ETH_MAX_VLAN_MODES 3 - /* Rx ring params */ #define U_ETH_LOCAL_BD_RING_SIZE 8 #define U_ETH_LOCAL_SGE_RING_SIZE 10 @@ -294,34 +275,24 @@ #define U_ETH_BDS_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_bd)/8)) #define U_ETH_SGES_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_sge)/8)) -#define U_ETH_BDS_PER_PAGE_MASK (U_ETH_BDS_PER_PAGE-1) -#define U_ETH_CQE_PER_PAGE_MASK (TU_ETH_CQES_PER_PAGE-1) +#define U_ETH_BDS_PER_PAGE_MASK (U_ETH_BDS_PER_PAGE-1) +#define U_ETH_CQE_PER_PAGE_MASK (TU_ETH_CQES_PER_PAGE-1) #define U_ETH_SGES_PER_PAGE_MASK (U_ETH_SGES_PER_PAGE-1) #define U_ETH_UNDEFINED_Q 0xFF -/* values of command IDs in the ramrod message */ -#define RAMROD_CMD_ID_ETH_UNUSED 0 -#define RAMROD_CMD_ID_ETH_CLIENT_SETUP 1 -#define RAMROD_CMD_ID_ETH_RSS_UPDATE 2 -#define RAMROD_CMD_ID_ETH_HALT 3 -#define RAMROD_CMD_ID_ETH_FORWARD_SETUP 4 -#define RAMROD_CMD_ID_ETH_CLIENT_UPDATE 5 -#define RAMROD_CMD_ID_ETH_EMPTY 6 -#define RAMROD_CMD_ID_ETH_TERMINATE 7 - - -/* command values for set mac command */ -#define T_ETH_MAC_COMMAND_SET 0 -#define T_ETH_MAC_COMMAND_INVALIDATE 1 - #define T_ETH_INDIRECTION_TABLE_SIZE 128 -#define RSS_KEYS_ARRAY_SIZE 10 +#define T_ETH_RSS_KEY 10 +#define ETH_NUM_OF_RSS_ENGINES_E2 72 + +#define FILTER_RULES_COUNT 16 +#define MULTICAST_RULES_COUNT 16 +#define CLASSIFY_RULES_COUNT 16 /*The CRC32 seed, that is used for the hash(reduction) multicast address */ #define ETH_CRC32_HASH_SEED 0x00000000 -#define ETH_CRC32_HASH_BIT_SIZE (8) +#define ETH_CRC32_HASH_BIT_SIZE (8) #define ETH_CRC32_HASH_MASK EVAL((1<= 10G) */ -#define PORT_FEATURE_CON_SWITCH_10G_SWITCH 0x01000000 -#define PORT_FEATURE_CON_SWITCH_AUTO_DETECT 0x02000000 -#define PORT_FEATURE_CON_SWITCH_ONE_TIME_DETECT 0x03000000 + u32 link_config; /* Used as HW defaults for the driver */ + #define PORT_FEATURE_CONNECTED_SWITCH_MASK 0x03000000 + #define PORT_FEATURE_CONNECTED_SWITCH_SHIFT 24 + /* (forced) low speed switch (< 10G) */ + #define PORT_FEATURE_CON_SWITCH_1G_SWITCH 0x00000000 + /* (forced) high speed switch (>= 10G) */ + #define PORT_FEATURE_CON_SWITCH_10G_SWITCH 0x01000000 + #define PORT_FEATURE_CON_SWITCH_AUTO_DETECT 0x02000000 + #define PORT_FEATURE_CON_SWITCH_ONE_TIME_DETECT 0x03000000 -#define PORT_FEATURE_LINK_SPEED_MASK 0x000f0000 -#define PORT_FEATURE_LINK_SPEED_SHIFT 16 -#define PORT_FEATURE_LINK_SPEED_AUTO 0x00000000 -#define PORT_FEATURE_LINK_SPEED_10M_FULL 0x00010000 -#define PORT_FEATURE_LINK_SPEED_10M_HALF 0x00020000 -#define PORT_FEATURE_LINK_SPEED_100M_HALF 0x00030000 -#define PORT_FEATURE_LINK_SPEED_100M_FULL 0x00040000 -#define PORT_FEATURE_LINK_SPEED_1G 0x00050000 -#define PORT_FEATURE_LINK_SPEED_2_5G 0x00060000 -#define PORT_FEATURE_LINK_SPEED_10G_CX4 0x00070000 -#define PORT_FEATURE_LINK_SPEED_10G_KX4 0x00080000 -#define PORT_FEATURE_LINK_SPEED_10G_KR 0x00090000 -#define PORT_FEATURE_LINK_SPEED_12G 0x000a0000 -#define PORT_FEATURE_LINK_SPEED_12_5G 0x000b0000 -#define PORT_FEATURE_LINK_SPEED_13G 0x000c0000 -#define PORT_FEATURE_LINK_SPEED_15G 0x000d0000 -#define PORT_FEATURE_LINK_SPEED_16G 0x000e0000 + #define PORT_FEATURE_LINK_SPEED_MASK 0x000f0000 + #define PORT_FEATURE_LINK_SPEED_SHIFT 16 + #define PORT_FEATURE_LINK_SPEED_AUTO 0x00000000 + #define PORT_FEATURE_LINK_SPEED_10M_FULL 0x00010000 + #define PORT_FEATURE_LINK_SPEED_10M_HALF 0x00020000 + #define PORT_FEATURE_LINK_SPEED_100M_HALF 0x00030000 + #define PORT_FEATURE_LINK_SPEED_100M_FULL 0x00040000 + #define PORT_FEATURE_LINK_SPEED_1G 0x00050000 + #define PORT_FEATURE_LINK_SPEED_2_5G 0x00060000 + #define PORT_FEATURE_LINK_SPEED_10G_CX4 0x00070000 + #define PORT_FEATURE_LINK_SPEED_20G 0x00080000 -#define PORT_FEATURE_FLOW_CONTROL_MASK 0x00000700 -#define PORT_FEATURE_FLOW_CONTROL_SHIFT 8 -#define PORT_FEATURE_FLOW_CONTROL_AUTO 0x00000000 -#define PORT_FEATURE_FLOW_CONTROL_TX 0x00000100 -#define PORT_FEATURE_FLOW_CONTROL_RX 0x00000200 -#define PORT_FEATURE_FLOW_CONTROL_BOTH 0x00000300 -#define PORT_FEATURE_FLOW_CONTROL_NONE 0x00000400 + #define PORT_FEATURE_FLOW_CONTROL_MASK 0x00000700 + #define PORT_FEATURE_FLOW_CONTROL_SHIFT 8 + #define PORT_FEATURE_FLOW_CONTROL_AUTO 0x00000000 + #define PORT_FEATURE_FLOW_CONTROL_TX 0x00000100 + #define PORT_FEATURE_FLOW_CONTROL_RX 0x00000200 + #define PORT_FEATURE_FLOW_CONTROL_BOTH 0x00000300 + #define PORT_FEATURE_FLOW_CONTROL_NONE 0x00000400 - /* The default for MCP link configuration, - uses the same defines as link_config */ - u32 mfw_wol_link_cfg; + /* The default for MCP link configuration, + uses the same defines as link_config */ + u32 mfw_wol_link_cfg; - /* The default for the driver of the second external phy, - uses the same defines as link_config */ - u32 link_config2; /* 0x47C */ + /* The default for the driver of the second external phy, + uses the same defines as link_config */ + u32 link_config2; /* 0x47C */ - /* The default for MCP of the second external phy, - uses the same defines as link_config */ - u32 mfw_wol_link_cfg2; /* 0x480 */ + /* The default for MCP of the second external phy, + uses the same defines as link_config */ + u32 mfw_wol_link_cfg2; /* 0x480 */ - u32 Reserved2[17]; /* 0x484 */ + u32 Reserved2[17]; /* 0x484 */ }; /**************************************************************************** - * Device Information * + * Device Information * ****************************************************************************/ struct shm_dev_info { /* size */ - u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */ + u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */ - struct shared_hw_cfg shared_hw_config; /* 40 */ + struct shared_hw_cfg shared_hw_config; /* 40 */ - struct port_hw_cfg port_hw_config[PORT_MAX]; /* 400*2=800 */ + struct port_hw_cfg port_hw_config[PORT_MAX]; /* 400*2=800 */ - struct shared_feat_cfg shared_feature_config; /* 4 */ + struct shared_feat_cfg shared_feature_config; /* 4 */ - struct port_feat_cfg port_feature_config[PORT_MAX];/* 116*2=232 */ + struct port_feat_cfg port_feature_config[PORT_MAX];/* 116*2=232 */ }; +struct extended_dev_info_shared_cfg { /* NVRAM OFFSET */ + + /* Threshold in celcius to start using the fan */ + u32 temperature_monitor1; /* 0x4000 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_THRESH_MASK 0x0000007F + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_THRESH_SHIFT 0 + + /* Threshold in celcius to shut down the board */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_THRESH_MASK 0x00007F00 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_THRESH_SHIFT 8 + + /* EPIO of fan temperature status */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_MASK 0x00FF0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_SHIFT 16 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_NA 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO0 0x00010000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO1 0x00020000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO2 0x00030000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO3 0x00040000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO4 0x00050000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO5 0x00060000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO6 0x00070000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO7 0x00080000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO8 0x00090000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO9 0x000a0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO10 0x000b0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO11 0x000c0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO12 0x000d0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO13 0x000e0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO14 0x000f0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO15 0x00100000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO16 0x00110000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO17 0x00120000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO18 0x00130000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO19 0x00140000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO20 0x00150000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO21 0x00160000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO22 0x00170000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO23 0x00180000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO24 0x00190000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO25 0x001a0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO26 0x001b0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO27 0x001c0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO28 0x001d0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO29 0x001e0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO30 0x001f0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO31 0x00200000 + + /* EPIO of shut down temperature status */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_MASK 0xFF000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_SHIFT 24 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_NA 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO0 0x01000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO1 0x02000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO2 0x03000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO3 0x04000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO4 0x05000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO5 0x06000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO6 0x07000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO7 0x08000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO8 0x09000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO9 0x0a000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO10 0x0b000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO11 0x0c000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO12 0x0d000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO13 0x0e000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO14 0x0f000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO15 0x10000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO16 0x11000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO17 0x12000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO18 0x13000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO19 0x14000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO20 0x15000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO21 0x16000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO22 0x17000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO23 0x18000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO24 0x19000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO25 0x1a000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO26 0x1b000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO27 0x1c000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO28 0x1d000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO29 0x1e000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO30 0x1f000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO31 0x20000000 + + + /* EPIO of shut down temperature status */ + u32 temperature_monitor2; /* 0x4004 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_PERIOD_MASK 0x0000FFFF + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_PERIOD_SHIFT 0 + + + /* MFW flavor to be used */ + u32 mfw_cfg; /* 0x4008 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_MFW_FLAVOR_MASK 0x000000FF + #define EXTENDED_DEV_INFO_SHARED_CFG_MFW_FLAVOR_SHIFT 0 + #define EXTENDED_DEV_INFO_SHARED_CFG_MFW_FLAVOR_NA 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_MFW_FLAVOR_A 0x00000001 + + + u32 smbus_config; /* 0x400C */ + #define EXTENDED_DEV_INFO_SHARED_CFG_SMBUS_ADDR_MASK 0x000000FF + #define EXTENDED_DEV_INFO_SHARED_CFG_SMBUS_ADDR_SHIFT 0 + + + /* Switching regulator loop gain */ + u32 board_cfg; /* 0x4010 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_MASK 0x0000000F + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_SHIFT 0 + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_HW_DEFAULT 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X2 0x00000008 + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X4 0x00000009 + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X8 0x0000000a + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X16 0x0000000b + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_DIV8 0x0000000c + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_DIV4 0x0000000d + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_DIV2 0x0000000e + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X1 0x0000000f + + /* whether shadow swim feature is supported */ + #define EXTENDED_DEV_INFO_SHARED_CFG_SHADOW_SWIM_MASK 0x00000100 + #define EXTENDED_DEV_INFO_SHARED_CFG_SHADOW_SWIM_SHIFT 8 + #define EXTENDED_DEV_INFO_SHARED_CFG_SHADOW_SWIM_DISABLED 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_SHADOW_SWIM_ENABLED 0x00000100 + + + /* Threshold in celcius for max continuous operation */ + u32 temperature_report; /* 0x4014 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_MCOT_MASK 0x0000007F + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_MCOT_SHIFT 0 + + /* Threshold in celcius for sensor caution */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SCT_MASK 0x00007F00 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SCT_SHIFT 8 + + + /* wwn node prefix to be used (unless value is 0) */ + u32 wwn_prefix; /* 0x4018 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_NODE_PREFIX0_MASK 0x000000FF + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_NODE_PREFIX0_SHIFT 0 + + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_NODE_PREFIX1_MASK 0x0000FF00 + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_NODE_PREFIX1_SHIFT 8 + + /* wwn port prefix to be used (unless value is 0) */ + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_PORT_PREFIX0_MASK 0x00FF0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_PORT_PREFIX0_SHIFT 16 + + /* wwn port prefix to be used (unless value is 0) */ + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_PORT_PREFIX1_MASK 0xFF000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_PORT_PREFIX1_SHIFT 24 + +}; + + #if !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) -#error "Missing either LITTLE_ENDIAN or BIG_ENDIAN definition." + #error "Missing either LITTLE_ENDIAN or BIG_ENDIAN definition." #endif -#define FUNC_0 0 -#define FUNC_1 1 -#define FUNC_2 2 -#define FUNC_3 3 -#define FUNC_4 4 -#define FUNC_5 5 -#define FUNC_6 6 -#define FUNC_7 7 -#define E1_FUNC_MAX 2 -#define E1H_FUNC_MAX 8 -#define E2_FUNC_MAX 4 /* per path */ +#define FUNC_0 0 +#define FUNC_1 1 +#define FUNC_2 2 +#define FUNC_3 3 +#define FUNC_4 4 +#define FUNC_5 5 +#define FUNC_6 6 +#define FUNC_7 7 +#define E1_FUNC_MAX 2 +#define E1H_FUNC_MAX 8 +#define E2_FUNC_MAX 4 /* per path */ -#define VN_0 0 -#define VN_1 1 -#define VN_2 2 -#define VN_3 3 -#define E1VN_MAX 1 -#define E1HVN_MAX 4 +#define VN_0 0 +#define VN_1 1 +#define VN_2 2 +#define VN_3 3 +#define E1VN_MAX 1 +#define E1HVN_MAX 4 -#define E2_VF_MAX 64 +#define E2_VF_MAX 64 /* HC_REG_VF_CONFIGURATION_SIZE */ /* This value (in milliseconds) determines the frequency of the driver * issuing the PULSE message code. The firmware monitors this periodic * pulse to determine when to switch to an OS-absent mode. */ -#define DRV_PULSE_PERIOD_MS 250 +#define DRV_PULSE_PERIOD_MS 250 /* This value (in milliseconds) determines how long the driver should * wait for an acknowledgement from the firmware before timing out. Once * the firmware has timed out, the driver will assume there is no firmware * running and there won't be any firmware-driver synchronization during a * driver reset. */ -#define FW_ACK_TIME_OUT_MS 5000 +#define FW_ACK_TIME_OUT_MS 5000 -#define FW_ACK_POLL_TIME_MS 1 +#define FW_ACK_POLL_TIME_MS 1 #define FW_ACK_NUM_OF_POLL (FW_ACK_TIME_OUT_MS/FW_ACK_POLL_TIME_MS) -/* LED Blink rate that will achieve ~15.9Hz */ -#define LED_BLINK_RATE_VAL 480 +#define MFW_TRACE_SIGNATURE 0x54524342 /**************************************************************************** - * Driver <-> FW Mailbox * + * Driver <-> FW Mailbox * ****************************************************************************/ struct drv_port_mb { - u32 link_status; - /* Driver should update this field on any link change event */ + u32 link_status; + /* Driver should update this field on any link change event */ -#define LINK_STATUS_LINK_FLAG_MASK 0x00000001 -#define LINK_STATUS_LINK_UP 0x00000001 -#define LINK_STATUS_SPEED_AND_DUPLEX_MASK 0x0000001E -#define LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE (0<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_10THD (1<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_10TFD (2<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_100TXHD (3<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_100T4 (4<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_100TXFD (5<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_1000THD (6<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_1000TFD (7<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_1000XFD (7<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_2500THD (8<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_2500TFD (9<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_2500XFD (9<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_10GTFD (10<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_10GXFD (10<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_12GTFD (11<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_12GXFD (11<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_12_5GTFD (12<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_12_5GXFD (12<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_13GTFD (13<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_13GXFD (13<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_15GTFD (14<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_15GXFD (14<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_16GTFD (15<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_16GXFD (15<<1) + #define LINK_STATUS_LINK_FLAG_MASK 0x00000001 + #define LINK_STATUS_LINK_UP 0x00000001 + #define LINK_STATUS_SPEED_AND_DUPLEX_MASK 0x0000001E + #define LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE (0<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_10THD (1<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_10TFD (2<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_100TXHD (3<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_100T4 (4<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_100TXFD (5<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_1000THD (6<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_1000TFD (7<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_1000XFD (7<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_2500THD (8<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_2500TFD (9<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_2500XFD (9<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_10GTFD (10<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_10GXFD (10<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_20GTFD (11<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_20GXFD (11<<1) -#define LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK 0x00000020 -#define LINK_STATUS_AUTO_NEGOTIATE_ENABLED 0x00000020 + #define LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK 0x00000020 + #define LINK_STATUS_AUTO_NEGOTIATE_ENABLED 0x00000020 -#define LINK_STATUS_AUTO_NEGOTIATE_COMPLETE 0x00000040 -#define LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK 0x00000080 -#define LINK_STATUS_PARALLEL_DETECTION_USED 0x00000080 + #define LINK_STATUS_AUTO_NEGOTIATE_COMPLETE 0x00000040 + #define LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK 0x00000080 + #define LINK_STATUS_PARALLEL_DETECTION_USED 0x00000080 -#define LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE 0x00000200 -#define LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE 0x00000400 -#define LINK_STATUS_LINK_PARTNER_100T4_CAPABLE 0x00000800 -#define LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE 0x00001000 -#define LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE 0x00002000 -#define LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE 0x00004000 -#define LINK_STATUS_LINK_PARTNER_10THD_CAPABLE 0x00008000 + #define LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE 0x00000200 + #define LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE 0x00000400 + #define LINK_STATUS_LINK_PARTNER_100T4_CAPABLE 0x00000800 + #define LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE 0x00001000 + #define LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE 0x00002000 + #define LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE 0x00004000 + #define LINK_STATUS_LINK_PARTNER_10THD_CAPABLE 0x00008000 -#define LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK 0x00010000 -#define LINK_STATUS_TX_FLOW_CONTROL_ENABLED 0x00010000 + #define LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK 0x00010000 + #define LINK_STATUS_TX_FLOW_CONTROL_ENABLED 0x00010000 -#define LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK 0x00020000 -#define LINK_STATUS_RX_FLOW_CONTROL_ENABLED 0x00020000 + #define LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK 0x00020000 + #define LINK_STATUS_RX_FLOW_CONTROL_ENABLED 0x00020000 -#define LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK 0x000C0000 -#define LINK_STATUS_LINK_PARTNER_NOT_PAUSE_CAPABLE (0<<18) -#define LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE (1<<18) -#define LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE (2<<18) -#define LINK_STATUS_LINK_PARTNER_BOTH_PAUSE (3<<18) + #define LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK 0x000C0000 + #define LINK_STATUS_LINK_PARTNER_NOT_PAUSE_CAPABLE (0<<18) + #define LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE (1<<18) + #define LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE (2<<18) + #define LINK_STATUS_LINK_PARTNER_BOTH_PAUSE (3<<18) -#define LINK_STATUS_SERDES_LINK 0x00100000 + #define LINK_STATUS_SERDES_LINK 0x00100000 -#define LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE 0x00200000 -#define LINK_STATUS_LINK_PARTNER_2500XHD_CAPABLE 0x00400000 -#define LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE 0x00800000 -#define LINK_STATUS_LINK_PARTNER_12GXFD_CAPABLE 0x01000000 -#define LINK_STATUS_LINK_PARTNER_12_5GXFD_CAPABLE 0x02000000 -#define LINK_STATUS_LINK_PARTNER_13GXFD_CAPABLE 0x04000000 -#define LINK_STATUS_LINK_PARTNER_15GXFD_CAPABLE 0x08000000 -#define LINK_STATUS_LINK_PARTNER_16GXFD_CAPABLE 0x10000000 + #define LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE 0x00200000 + #define LINK_STATUS_LINK_PARTNER_2500XHD_CAPABLE 0x00400000 + #define LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE 0x00800000 + #define LINK_STATUS_LINK_PARTNER_20GXFD_CAPABLE 0x10000000 - u32 port_stx; + #define LINK_STATUS_PFC_ENABLED 0x20000000 - u32 stat_nig_timer; + #define LINK_STATUS_PHYSICAL_LINK_FLAG 0x40000000 - /* MCP firmware does not use this field */ - u32 ext_phy_fw_version; + u32 port_stx; + + u32 stat_nig_timer; + + /* MCP firmware does not use this field */ + u32 ext_phy_fw_version; }; struct drv_func_mb { - u32 drv_mb_header; -#define DRV_MSG_CODE_MASK 0xffff0000 -#define DRV_MSG_CODE_LOAD_REQ 0x10000000 -#define DRV_MSG_CODE_LOAD_DONE 0x11000000 -#define DRV_MSG_CODE_UNLOAD_REQ_WOL_EN 0x20000000 -#define DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS 0x20010000 -#define DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP 0x20020000 -#define DRV_MSG_CODE_UNLOAD_DONE 0x21000000 -#define DRV_MSG_CODE_DCC_OK 0x30000000 -#define DRV_MSG_CODE_DCC_FAILURE 0x31000000 -#define DRV_MSG_CODE_DIAG_ENTER_REQ 0x50000000 -#define DRV_MSG_CODE_DIAG_EXIT_REQ 0x60000000 -#define DRV_MSG_CODE_VALIDATE_KEY 0x70000000 -#define DRV_MSG_CODE_GET_CURR_KEY 0x80000000 -#define DRV_MSG_CODE_GET_UPGRADE_KEY 0x81000000 -#define DRV_MSG_CODE_GET_MANUF_KEY 0x82000000 -#define DRV_MSG_CODE_LOAD_L2B_PRAM 0x90000000 - /* - * The optic module verification command requires bootcode - * v5.0.6 or later - */ -#define DRV_MSG_CODE_VRFY_FIRST_PHY_OPT_MDL 0xa0000000 -#define REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL 0x00050006 - /* - * The specific optic module verification command requires bootcode - * v5.2.12 or later - */ -#define DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL 0xa1000000 -#define REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL 0x00050234 -#define DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG 0xb0000000 -#define DRV_MSG_CODE_DCBX_PMF_DRV_OK 0xb2000000 + u32 drv_mb_header; + #define DRV_MSG_CODE_MASK 0xffff0000 + #define DRV_MSG_CODE_LOAD_REQ 0x10000000 + #define DRV_MSG_CODE_LOAD_DONE 0x11000000 + #define DRV_MSG_CODE_UNLOAD_REQ_WOL_EN 0x20000000 + #define DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS 0x20010000 + #define DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP 0x20020000 + #define DRV_MSG_CODE_UNLOAD_DONE 0x21000000 + #define DRV_MSG_CODE_DCC_OK 0x30000000 + #define DRV_MSG_CODE_DCC_FAILURE 0x31000000 + #define DRV_MSG_CODE_DIAG_ENTER_REQ 0x50000000 + #define DRV_MSG_CODE_DIAG_EXIT_REQ 0x60000000 + #define DRV_MSG_CODE_VALIDATE_KEY 0x70000000 + #define DRV_MSG_CODE_GET_CURR_KEY 0x80000000 + #define DRV_MSG_CODE_GET_UPGRADE_KEY 0x81000000 + #define DRV_MSG_CODE_GET_MANUF_KEY 0x82000000 + #define DRV_MSG_CODE_LOAD_L2B_PRAM 0x90000000 + /* + * The optic module verification command requires bootcode + * v5.0.6 or later, te specific optic module verification command + * requires bootcode v5.2.12 or later + */ + #define DRV_MSG_CODE_VRFY_FIRST_PHY_OPT_MDL 0xa0000000 + #define REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL 0x00050006 + #define DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL 0xa1000000 + #define REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL 0x00050234 + #define DRV_MSG_CODE_VRFY_AFEX_SUPPORTED 0xa2000000 + #define REQ_BC_VER_4_VRFY_AFEX_SUPPORTED 0x00070002 + #define REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED 0x00070014 + #define REQ_BC_VER_4_PFC_STATS_SUPPORTED 0x00070201 + #define REQ_BC_VER_4_FCOE_FEATURES 0x00070209 -#define DRV_MSG_CODE_VF_DISABLED_DONE 0xc0000000 + #define DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG 0xb0000000 + #define DRV_MSG_CODE_DCBX_PMF_DRV_OK 0xb2000000 -#define BIOS_MSG_CODE_LIC_CHALLENGE 0xff010000 -#define BIOS_MSG_CODE_LIC_RESPONSE 0xff020000 -#define BIOS_MSG_CODE_VIRT_MAC_PRIM 0xff030000 -#define BIOS_MSG_CODE_VIRT_MAC_ISCSI 0xff040000 + #define DRV_MSG_CODE_VF_DISABLED_DONE 0xc0000000 -#define DRV_MSG_SEQ_NUMBER_MASK 0x0000ffff + #define DRV_MSG_CODE_AFEX_DRIVER_SETMAC 0xd0000000 + #define DRV_MSG_CODE_AFEX_LISTGET_ACK 0xd1000000 + #define DRV_MSG_CODE_AFEX_LISTSET_ACK 0xd2000000 + #define DRV_MSG_CODE_AFEX_STATSGET_ACK 0xd3000000 + #define DRV_MSG_CODE_AFEX_VIFSET_ACK 0xd4000000 - u32 drv_mb_param; + #define DRV_MSG_CODE_DRV_INFO_ACK 0xd8000000 + #define DRV_MSG_CODE_DRV_INFO_NACK 0xd9000000 - u32 fw_mb_header; -#define FW_MSG_CODE_MASK 0xffff0000 -#define FW_MSG_CODE_DRV_LOAD_COMMON 0x10100000 -#define FW_MSG_CODE_DRV_LOAD_PORT 0x10110000 -#define FW_MSG_CODE_DRV_LOAD_FUNCTION 0x10120000 - /* Load common chip is supported from bc 6.0.0 */ -#define REQ_BC_VER_4_DRV_LOAD_COMMON_CHIP 0x00060000 -#define FW_MSG_CODE_DRV_LOAD_COMMON_CHIP 0x10130000 + #define DRV_MSG_CODE_SET_MF_BW 0xe0000000 + #define REQ_BC_VER_4_SET_MF_BW 0x00060202 + #define DRV_MSG_CODE_SET_MF_BW_ACK 0xe1000000 -#define FW_MSG_CODE_DRV_LOAD_REFUSED 0x10200000 -#define FW_MSG_CODE_DRV_LOAD_DONE 0x11100000 -#define FW_MSG_CODE_DRV_UNLOAD_COMMON 0x20100000 -#define FW_MSG_CODE_DRV_UNLOAD_PORT 0x20110000 -#define FW_MSG_CODE_DRV_UNLOAD_FUNCTION 0x20120000 -#define FW_MSG_CODE_DRV_UNLOAD_DONE 0x21100000 -#define FW_MSG_CODE_DCC_DONE 0x30100000 -#define FW_MSG_CODE_LLDP_DONE 0x40100000 -#define FW_MSG_CODE_DIAG_ENTER_DONE 0x50100000 -#define FW_MSG_CODE_DIAG_REFUSE 0x50200000 -#define FW_MSG_CODE_DIAG_EXIT_DONE 0x60100000 -#define FW_MSG_CODE_VALIDATE_KEY_SUCCESS 0x70100000 -#define FW_MSG_CODE_VALIDATE_KEY_FAILURE 0x70200000 -#define FW_MSG_CODE_GET_KEY_DONE 0x80100000 -#define FW_MSG_CODE_NO_KEY 0x80f00000 -#define FW_MSG_CODE_LIC_INFO_NOT_READY 0x80f80000 -#define FW_MSG_CODE_L2B_PRAM_LOADED 0x90100000 -#define FW_MSG_CODE_L2B_PRAM_T_LOAD_FAILURE 0x90210000 -#define FW_MSG_CODE_L2B_PRAM_C_LOAD_FAILURE 0x90220000 -#define FW_MSG_CODE_L2B_PRAM_X_LOAD_FAILURE 0x90230000 -#define FW_MSG_CODE_L2B_PRAM_U_LOAD_FAILURE 0x90240000 -#define FW_MSG_CODE_VRFY_OPT_MDL_SUCCESS 0xa0100000 -#define FW_MSG_CODE_VRFY_OPT_MDL_INVLD_IMG 0xa0200000 -#define FW_MSG_CODE_VRFY_OPT_MDL_UNAPPROVED 0xa0300000 -#define FW_MSG_CODE_VF_DISABLED_DONE 0xb0000000 + #define DRV_MSG_CODE_LINK_STATUS_CHANGED 0x01000000 -#define FW_MSG_CODE_LIC_CHALLENGE 0xff010000 -#define FW_MSG_CODE_LIC_RESPONSE 0xff020000 -#define FW_MSG_CODE_VIRT_MAC_PRIM 0xff030000 -#define FW_MSG_CODE_VIRT_MAC_ISCSI 0xff040000 + #define DRV_MSG_CODE_INITIATE_FLR 0x02000000 + #define REQ_BC_VER_4_INITIATE_FLR 0x00070213 -#define FW_MSG_SEQ_NUMBER_MASK 0x0000ffff + #define BIOS_MSG_CODE_LIC_CHALLENGE 0xff010000 + #define BIOS_MSG_CODE_LIC_RESPONSE 0xff020000 + #define BIOS_MSG_CODE_VIRT_MAC_PRIM 0xff030000 + #define BIOS_MSG_CODE_VIRT_MAC_ISCSI 0xff040000 - u32 fw_mb_param; + #define DRV_MSG_SEQ_NUMBER_MASK 0x0000ffff - u32 drv_pulse_mb; -#define DRV_PULSE_SEQ_MASK 0x00007fff -#define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000 - /* The system time is in the format of - * (year-2001)*12*32 + month*32 + day. */ -#define DRV_PULSE_ALWAYS_ALIVE 0x00008000 - /* Indicate to the firmware not to go into the - * OS-absent when it is not getting driver pulse. - * This is used for debugging as well for PXE(MBA). */ + u32 drv_mb_param; + #define DRV_MSG_CODE_SET_MF_BW_MIN_MASK 0x00ff0000 + #define DRV_MSG_CODE_SET_MF_BW_MAX_MASK 0xff000000 - u32 mcp_pulse_mb; -#define MCP_PULSE_SEQ_MASK 0x00007fff -#define MCP_PULSE_ALWAYS_ALIVE 0x00008000 - /* Indicates to the driver not to assert due to lack - * of MCP response */ -#define MCP_EVENT_MASK 0xffff0000 -#define MCP_EVENT_OTHER_DRIVER_RESET_REQ 0x00010000 + #define DRV_MSG_CODE_UNLOAD_NON_D3_POWER 0x00000001 - u32 iscsi_boot_signature; - u32 iscsi_boot_block_offset; + u32 fw_mb_header; + #define FW_MSG_CODE_MASK 0xffff0000 + #define FW_MSG_CODE_DRV_LOAD_COMMON 0x10100000 + #define FW_MSG_CODE_DRV_LOAD_PORT 0x10110000 + #define FW_MSG_CODE_DRV_LOAD_FUNCTION 0x10120000 + /* Load common chip is supported from bc 6.0.0 */ + #define REQ_BC_VER_4_DRV_LOAD_COMMON_CHIP 0x00060000 + #define FW_MSG_CODE_DRV_LOAD_COMMON_CHIP 0x10130000 - u32 drv_status; -#define DRV_STATUS_PMF 0x00000001 -#define DRV_STATUS_VF_DISABLED 0x00000002 + #define FW_MSG_CODE_DRV_LOAD_REFUSED 0x10200000 + #define FW_MSG_CODE_DRV_LOAD_DONE 0x11100000 + #define FW_MSG_CODE_DRV_UNLOAD_COMMON 0x20100000 + #define FW_MSG_CODE_DRV_UNLOAD_PORT 0x20110000 + #define FW_MSG_CODE_DRV_UNLOAD_FUNCTION 0x20120000 + #define FW_MSG_CODE_DRV_UNLOAD_DONE 0x21100000 + #define FW_MSG_CODE_DCC_DONE 0x30100000 + #define FW_MSG_CODE_LLDP_DONE 0x40100000 + #define FW_MSG_CODE_DIAG_ENTER_DONE 0x50100000 + #define FW_MSG_CODE_DIAG_REFUSE 0x50200000 + #define FW_MSG_CODE_DIAG_EXIT_DONE 0x60100000 + #define FW_MSG_CODE_VALIDATE_KEY_SUCCESS 0x70100000 + #define FW_MSG_CODE_VALIDATE_KEY_FAILURE 0x70200000 + #define FW_MSG_CODE_GET_KEY_DONE 0x80100000 + #define FW_MSG_CODE_NO_KEY 0x80f00000 + #define FW_MSG_CODE_LIC_INFO_NOT_READY 0x80f80000 + #define FW_MSG_CODE_L2B_PRAM_LOADED 0x90100000 + #define FW_MSG_CODE_L2B_PRAM_T_LOAD_FAILURE 0x90210000 + #define FW_MSG_CODE_L2B_PRAM_C_LOAD_FAILURE 0x90220000 + #define FW_MSG_CODE_L2B_PRAM_X_LOAD_FAILURE 0x90230000 + #define FW_MSG_CODE_L2B_PRAM_U_LOAD_FAILURE 0x90240000 + #define FW_MSG_CODE_VRFY_OPT_MDL_SUCCESS 0xa0100000 + #define FW_MSG_CODE_VRFY_OPT_MDL_INVLD_IMG 0xa0200000 + #define FW_MSG_CODE_VRFY_OPT_MDL_UNAPPROVED 0xa0300000 + #define FW_MSG_CODE_VF_DISABLED_DONE 0xb0000000 + #define FW_MSG_CODE_HW_SET_INVALID_IMAGE 0xb0100000 -#define DRV_STATUS_DCC_EVENT_MASK 0x0000ff00 -#define DRV_STATUS_DCC_DISABLE_ENABLE_PF 0x00000100 -#define DRV_STATUS_DCC_BANDWIDTH_ALLOCATION 0x00000200 -#define DRV_STATUS_DCC_CHANGE_MAC_ADDRESS 0x00000400 -#define DRV_STATUS_DCC_RESERVED1 0x00000800 -#define DRV_STATUS_DCC_SET_PROTOCOL 0x00001000 -#define DRV_STATUS_DCC_SET_PRIORITY 0x00002000 + #define FW_MSG_CODE_AFEX_DRIVER_SETMAC_DONE 0xd0100000 + #define FW_MSG_CODE_AFEX_LISTGET_ACK 0xd1100000 + #define FW_MSG_CODE_AFEX_LISTSET_ACK 0xd2100000 + #define FW_MSG_CODE_AFEX_STATSGET_ACK 0xd3100000 + #define FW_MSG_CODE_AFEX_VIFSET_ACK 0xd4100000 -#define DRV_STATUS_DCBX_EVENT_MASK 0x000f0000 -#define DRV_STATUS_DCBX_NEGOTIATION_RESULTS 0x00010000 + #define FW_MSG_CODE_DRV_INFO_ACK 0xd8100000 + #define FW_MSG_CODE_DRV_INFO_NACK 0xd9100000 - u32 virt_mac_upper; -#define VIRT_MAC_SIGN_MASK 0xffff0000 -#define VIRT_MAC_SIGNATURE 0x564d0000 - u32 virt_mac_lower; + #define FW_MSG_CODE_SET_MF_BW_SENT 0xe0000000 + #define FW_MSG_CODE_SET_MF_BW_DONE 0xe1000000 + + #define FW_MSG_CODE_LINK_CHANGED_ACK 0x01100000 + + #define FW_MSG_CODE_FLR_ACK 0x02000000 + #define FW_MSG_CODE_FLR_NACK 0x02100000 + + #define FW_MSG_CODE_LIC_CHALLENGE 0xff010000 + #define FW_MSG_CODE_LIC_RESPONSE 0xff020000 + #define FW_MSG_CODE_VIRT_MAC_PRIM 0xff030000 + #define FW_MSG_CODE_VIRT_MAC_ISCSI 0xff040000 + + #define FW_MSG_SEQ_NUMBER_MASK 0x0000ffff + + u32 fw_mb_param; + + u32 drv_pulse_mb; + #define DRV_PULSE_SEQ_MASK 0x00007fff + #define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000 + /* + * The system time is in the format of + * (year-2001)*12*32 + month*32 + day. + */ + #define DRV_PULSE_ALWAYS_ALIVE 0x00008000 + /* + * Indicate to the firmware not to go into the + * OS-absent when it is not getting driver pulse. + * This is used for debugging as well for PXE(MBA). + */ + + u32 mcp_pulse_mb; + #define MCP_PULSE_SEQ_MASK 0x00007fff + #define MCP_PULSE_ALWAYS_ALIVE 0x00008000 + /* Indicates to the driver not to assert due to lack + * of MCP response */ + #define MCP_EVENT_MASK 0xffff0000 + #define MCP_EVENT_OTHER_DRIVER_RESET_REQ 0x00010000 + + u32 iscsi_boot_signature; + u32 iscsi_boot_block_offset; + + u32 drv_status; + #define DRV_STATUS_PMF 0x00000001 + #define DRV_STATUS_VF_DISABLED 0x00000002 + #define DRV_STATUS_SET_MF_BW 0x00000004 + #define DRV_STATUS_LINK_EVENT 0x00000008 + + #define DRV_STATUS_DCC_EVENT_MASK 0x0000ff00 + #define DRV_STATUS_DCC_DISABLE_ENABLE_PF 0x00000100 + #define DRV_STATUS_DCC_BANDWIDTH_ALLOCATION 0x00000200 + #define DRV_STATUS_DCC_CHANGE_MAC_ADDRESS 0x00000400 + #define DRV_STATUS_DCC_RESERVED1 0x00000800 + #define DRV_STATUS_DCC_SET_PROTOCOL 0x00001000 + #define DRV_STATUS_DCC_SET_PRIORITY 0x00002000 + + #define DRV_STATUS_DCBX_EVENT_MASK 0x000f0000 + #define DRV_STATUS_DCBX_NEGOTIATION_RESULTS 0x00010000 + #define DRV_STATUS_AFEX_EVENT_MASK 0x03f00000 + #define DRV_STATUS_AFEX_LISTGET_REQ 0x00100000 + #define DRV_STATUS_AFEX_LISTSET_REQ 0x00200000 + #define DRV_STATUS_AFEX_STATSGET_REQ 0x00400000 + #define DRV_STATUS_AFEX_VIFSET_REQ 0x00800000 + + #define DRV_STATUS_DRV_INFO_REQ 0x04000000 + + u32 virt_mac_upper; + #define VIRT_MAC_SIGN_MASK 0xffff0000 + #define VIRT_MAC_SIGNATURE 0x564d0000 + u32 virt_mac_lower; }; /**************************************************************************** - * Management firmware state * + * Management firmware state * ****************************************************************************/ /* Allocate 440 bytes for management firmware */ -#define MGMTFW_STATE_WORD_SIZE 110 +#define MGMTFW_STATE_WORD_SIZE 110 struct mgmtfw_state { - u32 opaque[MGMTFW_STATE_WORD_SIZE]; + u32 opaque[MGMTFW_STATE_WORD_SIZE]; }; /**************************************************************************** - * Multi-Function configuration * + * Multi-Function configuration * ****************************************************************************/ struct shared_mf_cfg { - u32 clp_mb; -#define SHARED_MF_CLP_SET_DEFAULT 0x00000000 - /* set by CLP */ -#define SHARED_MF_CLP_EXIT 0x00000001 - /* set by MCP */ -#define SHARED_MF_CLP_EXIT_DONE 0x00010000 + u32 clp_mb; + #define SHARED_MF_CLP_SET_DEFAULT 0x00000000 + /* set by CLP */ + #define SHARED_MF_CLP_EXIT 0x00000001 + /* set by MCP */ + #define SHARED_MF_CLP_EXIT_DONE 0x00010000 }; struct port_mf_cfg { - u32 dynamic_cfg; /* device control channel */ -#define PORT_MF_CFG_E1HOV_TAG_MASK 0x0000ffff -#define PORT_MF_CFG_E1HOV_TAG_SHIFT 0 -#define PORT_MF_CFG_E1HOV_TAG_DEFAULT PORT_MF_CFG_E1HOV_TAG_MASK + u32 dynamic_cfg; /* device control channel */ + #define PORT_MF_CFG_E1HOV_TAG_MASK 0x0000ffff + #define PORT_MF_CFG_E1HOV_TAG_SHIFT 0 + #define PORT_MF_CFG_E1HOV_TAG_DEFAULT PORT_MF_CFG_E1HOV_TAG_MASK - u32 reserved[3]; + u32 reserved[1]; }; struct func_mf_cfg { - u32 config; - /* E/R/I/D */ - /* function 0 of each port cannot be hidden */ -#define FUNC_MF_CFG_FUNC_HIDE 0x00000001 + u32 config; + /* E/R/I/D */ + /* function 0 of each port cannot be hidden */ + #define FUNC_MF_CFG_FUNC_HIDE 0x00000001 -#define FUNC_MF_CFG_PROTOCOL_MASK 0x00000006 -#define FUNC_MF_CFG_PROTOCOL_FCOE 0x00000000 -#define FUNC_MF_CFG_PROTOCOL_ETHERNET 0x00000002 -#define FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA 0x00000004 -#define FUNC_MF_CFG_PROTOCOL_ISCSI 0x00000006 -#define FUNC_MF_CFG_PROTOCOL_DEFAULT\ - FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA + #define FUNC_MF_CFG_PROTOCOL_MASK 0x00000006 + #define FUNC_MF_CFG_PROTOCOL_FCOE 0x00000000 + #define FUNC_MF_CFG_PROTOCOL_ETHERNET 0x00000002 + #define FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA 0x00000004 + #define FUNC_MF_CFG_PROTOCOL_ISCSI 0x00000006 + #define FUNC_MF_CFG_PROTOCOL_DEFAULT \ + FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA -#define FUNC_MF_CFG_FUNC_DISABLED 0x00000008 + #define FUNC_MF_CFG_FUNC_DISABLED 0x00000008 + #define FUNC_MF_CFG_FUNC_DELETED 0x00000010 - /* PRI */ - /* 0 - low priority, 3 - high priority */ -#define FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK 0x00000300 -#define FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT 8 -#define FUNC_MF_CFG_TRANSMIT_PRIORITY_DEFAULT 0x00000000 + /* PRI */ + /* 0 - low priority, 3 - high priority */ + #define FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK 0x00000300 + #define FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT 8 + #define FUNC_MF_CFG_TRANSMIT_PRIORITY_DEFAULT 0x00000000 - /* MINBW, MAXBW */ - /* value range - 0..100, increments in 100Mbps */ -#define FUNC_MF_CFG_MIN_BW_MASK 0x00ff0000 -#define FUNC_MF_CFG_MIN_BW_SHIFT 16 -#define FUNC_MF_CFG_MIN_BW_DEFAULT 0x00000000 -#define FUNC_MF_CFG_MAX_BW_MASK 0xff000000 -#define FUNC_MF_CFG_MAX_BW_SHIFT 24 -#define FUNC_MF_CFG_MAX_BW_DEFAULT 0x64000000 + /* MINBW, MAXBW */ + /* value range - 0..100, increments in 100Mbps */ + #define FUNC_MF_CFG_MIN_BW_MASK 0x00ff0000 + #define FUNC_MF_CFG_MIN_BW_SHIFT 16 + #define FUNC_MF_CFG_MIN_BW_DEFAULT 0x00000000 + #define FUNC_MF_CFG_MAX_BW_MASK 0xff000000 + #define FUNC_MF_CFG_MAX_BW_SHIFT 24 + #define FUNC_MF_CFG_MAX_BW_DEFAULT 0x64000000 - u32 mac_upper; /* MAC */ -#define FUNC_MF_CFG_UPPERMAC_MASK 0x0000ffff -#define FUNC_MF_CFG_UPPERMAC_SHIFT 0 -#define FUNC_MF_CFG_UPPERMAC_DEFAULT FUNC_MF_CFG_UPPERMAC_MASK - u32 mac_lower; -#define FUNC_MF_CFG_LOWERMAC_DEFAULT 0xffffffff + u32 mac_upper; /* MAC */ + #define FUNC_MF_CFG_UPPERMAC_MASK 0x0000ffff + #define FUNC_MF_CFG_UPPERMAC_SHIFT 0 + #define FUNC_MF_CFG_UPPERMAC_DEFAULT FUNC_MF_CFG_UPPERMAC_MASK + u32 mac_lower; + #define FUNC_MF_CFG_LOWERMAC_DEFAULT 0xffffffff - u32 e1hov_tag; /* VNI */ -#define FUNC_MF_CFG_E1HOV_TAG_MASK 0x0000ffff -#define FUNC_MF_CFG_E1HOV_TAG_SHIFT 0 -#define FUNC_MF_CFG_E1HOV_TAG_DEFAULT FUNC_MF_CFG_E1HOV_TAG_MASK + u32 e1hov_tag; /* VNI */ + #define FUNC_MF_CFG_E1HOV_TAG_MASK 0x0000ffff + #define FUNC_MF_CFG_E1HOV_TAG_SHIFT 0 + #define FUNC_MF_CFG_E1HOV_TAG_DEFAULT FUNC_MF_CFG_E1HOV_TAG_MASK - u32 reserved[2]; + /* afex default VLAN ID - 12 bits */ + #define FUNC_MF_CFG_AFEX_VLAN_MASK 0x0fff0000 + #define FUNC_MF_CFG_AFEX_VLAN_SHIFT 16 + u32 afex_config; + #define FUNC_MF_CFG_AFEX_COS_FILTER_MASK 0x000000ff + #define FUNC_MF_CFG_AFEX_COS_FILTER_SHIFT 0 + #define FUNC_MF_CFG_AFEX_MBA_ENABLED_MASK 0x0000ff00 + #define FUNC_MF_CFG_AFEX_MBA_ENABLED_SHIFT 8 + #define FUNC_MF_CFG_AFEX_MBA_ENABLED_VAL 0x00000100 + #define FUNC_MF_CFG_AFEX_VLAN_MODE_MASK 0x000f0000 + #define FUNC_MF_CFG_AFEX_VLAN_MODE_SHIFT 16 + + u32 reserved; +}; + +enum mf_cfg_afex_vlan_mode { + FUNC_MF_CFG_AFEX_VLAN_TRUNK_MODE = 0, + FUNC_MF_CFG_AFEX_VLAN_ACCESS_MODE, + FUNC_MF_CFG_AFEX_VLAN_TRUNK_TAG_NATIVE_MODE }; /* This structure is not applicable and should not be accessed on 57711 */ struct func_ext_cfg { - u32 func_cfg; -#define MACP_FUNC_CFG_FLAGS_MASK 0x000000FF -#define MACP_FUNC_CFG_FLAGS_SHIFT 0 -#define MACP_FUNC_CFG_FLAGS_ENABLED 0x00000001 -#define MACP_FUNC_CFG_FLAGS_ETHERNET 0x00000002 -#define MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD 0x00000004 -#define MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD 0x00000008 + u32 func_cfg; + #define MACP_FUNC_CFG_FLAGS_MASK 0x000000FF + #define MACP_FUNC_CFG_FLAGS_SHIFT 0 + #define MACP_FUNC_CFG_FLAGS_ENABLED 0x00000001 + #define MACP_FUNC_CFG_FLAGS_ETHERNET 0x00000002 + #define MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD 0x00000004 + #define MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD 0x00000008 - u32 iscsi_mac_addr_upper; + u32 iscsi_mac_addr_upper; + u32 iscsi_mac_addr_lower; - u32 iscsi_mac_addr_lower; + u32 fcoe_mac_addr_upper; + u32 fcoe_mac_addr_lower; - u32 fcoe_mac_addr_upper; + u32 fcoe_wwn_port_name_upper; + u32 fcoe_wwn_port_name_lower; - u32 fcoe_mac_addr_lower; + u32 fcoe_wwn_node_name_upper; + u32 fcoe_wwn_node_name_lower; - u32 reserved0[5]; + u32 preserve_data; + #define MF_FUNC_CFG_PRESERVE_L2_MAC (1<<0) + #define MF_FUNC_CFG_PRESERVE_ISCSI_MAC (1<<1) + #define MF_FUNC_CFG_PRESERVE_FCOE_MAC (1<<2) + #define MF_FUNC_CFG_PRESERVE_FCOE_WWN_P (1<<3) + #define MF_FUNC_CFG_PRESERVE_FCOE_WWN_N (1<<4) + #define MF_FUNC_CFG_PRESERVE_TX_BW (1<<5) }; struct mf_cfg { - struct shared_mf_cfg shared_mf_config; /* 0x4 */ - struct port_mf_cfg port_mf_config[PORT_MAX]; /* 0x10 * 2 = 0x20 */ - /* for all chips, there are 8 mf functions */ - struct func_mf_cfg func_mf_config[E1H_FUNC_MAX]; /* 0x18 * 8 = 0xc0 */ - /* Extended configuration per function - this array does not exist and - * should not be accessed on 57711 */ - struct func_ext_cfg func_ext_config[E1H_FUNC_MAX]; /* 0x28 * 8 = 0x140*/ + struct shared_mf_cfg shared_mf_config; /* 0x4 */ + struct port_mf_cfg port_mf_config[NVM_PATH_MAX][PORT_MAX]; + /* 0x10*2=0x20 */ + /* for all chips, there are 8 mf functions */ + struct func_mf_cfg func_mf_config[E1H_FUNC_MAX]; /* 0x18 * 8 = 0xc0 */ + /* + * Extended configuration per function - this array does not exist and + * should not be accessed on 57711 + */ + struct func_ext_cfg func_ext_config[E1H_FUNC_MAX]; /* 0x28 * 8 = 0x140*/ }; /* 0x224 */ /**************************************************************************** - * Shared Memory Region * + * Shared Memory Region * ****************************************************************************/ struct shmem_region { /* SharedMem Offset (size) */ - u32 validity_map[PORT_MAX]; /* 0x0 (4*2 = 0x8) */ -#define SHR_MEM_FORMAT_REV_MASK 0xff000000 -#define SHR_MEM_FORMAT_REV_ID ('A'<<24) - /* validity bits */ -#define SHR_MEM_VALIDITY_PCI_CFG 0x00100000 -#define SHR_MEM_VALIDITY_MB 0x00200000 -#define SHR_MEM_VALIDITY_DEV_INFO 0x00400000 -#define SHR_MEM_VALIDITY_RESERVED 0x00000007 - /* One licensing bit should be set */ -#define SHR_MEM_VALIDITY_LIC_KEY_IN_EFFECT_MASK 0x00000038 -#define SHR_MEM_VALIDITY_LIC_MANUF_KEY_IN_EFFECT 0x00000008 -#define SHR_MEM_VALIDITY_LIC_UPGRADE_KEY_IN_EFFECT 0x00000010 -#define SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT 0x00000020 + u32 validity_map[PORT_MAX]; /* 0x0 (4*2 = 0x8) */ + #define SHR_MEM_FORMAT_REV_MASK 0xff000000 + #define SHR_MEM_FORMAT_REV_ID ('A'<<24) + /* validity bits */ + #define SHR_MEM_VALIDITY_PCI_CFG 0x00100000 + #define SHR_MEM_VALIDITY_MB 0x00200000 + #define SHR_MEM_VALIDITY_DEV_INFO 0x00400000 + #define SHR_MEM_VALIDITY_RESERVED 0x00000007 + /* One licensing bit should be set */ + #define SHR_MEM_VALIDITY_LIC_KEY_IN_EFFECT_MASK 0x00000038 + #define SHR_MEM_VALIDITY_LIC_MANUF_KEY_IN_EFFECT 0x00000008 + #define SHR_MEM_VALIDITY_LIC_UPGRADE_KEY_IN_EFFECT 0x00000010 + #define SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT 0x00000020 /* Active MFW */ -#define SHR_MEM_VALIDITY_ACTIVE_MFW_UNKNOWN 0x00000000 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_MASK 0x000001c0 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_IPMI 0x00000040 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_UMP 0x00000080 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_NCSI 0x000000c0 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_NONE 0x000001c0 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_UNKNOWN 0x00000000 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_MASK 0x000001c0 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_IPMI 0x00000040 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_UMP 0x00000080 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_NCSI 0x000000c0 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_NONE 0x000001c0 - struct shm_dev_info dev_info; /* 0x8 (0x438) */ + struct shm_dev_info dev_info; /* 0x8 (0x438) */ - struct license_key drv_lic_key[PORT_MAX]; /* 0x440 (52*2=0x68) */ + struct license_key drv_lic_key[PORT_MAX]; /* 0x440 (52*2=0x68) */ - /* FW information (for internal FW use) */ - u32 fw_info_fio_offset; /* 0x4a8 (0x4) */ - struct mgmtfw_state mgmtfw_state; /* 0x4ac (0x1b8) */ + /* FW information (for internal FW use) */ + u32 fw_info_fio_offset; /* 0x4a8 (0x4) */ + struct mgmtfw_state mgmtfw_state; /* 0x4ac (0x1b8) */ + + struct drv_port_mb port_mb[PORT_MAX]; /* 0x664 (16*2=0x20) */ - struct drv_port_mb port_mb[PORT_MAX]; /* 0x664 (16*2=0x20) */ #ifdef BMAPI - /* This is a variable length array */ - /* the number of function depends on the chip type */ - struct drv_func_mb func_mb[1]; /* 0x684 - (44*2/4/8=0x58/0xb0/0x160) */ + /* This is a variable length array */ + /* the number of function depends on the chip type */ + struct drv_func_mb func_mb[1]; /* 0x684 (44*2/4/8=0x58/0xb0/0x160) */ #else - /* the number of function depends on the chip type */ - struct drv_func_mb func_mb[]; /* 0x684 - (44*2/4/8=0x58/0xb0/0x160) */ + /* the number of function depends on the chip type */ + struct drv_func_mb func_mb[]; /* 0x684 (44*2/4/8=0x58/0xb0/0x160) */ #endif /* BMAPI */ }; /* 57710 = 0x6dc | 57711 = 0x7E4 | 57712 = 0x734 */ /**************************************************************************** - * Shared Memory 2 Region * + * Shared Memory 2 Region * ****************************************************************************/ -/* The fw_flr_ack is actually built in the following way: */ -/* 8 bit: PF ack */ -/* 64 bit: VF ack */ -/* 8 bit: ios_dis_ack */ +/* The fw_flr_ack is actually built in the following way: */ +/* 8 bit: PF ack */ +/* 64 bit: VF ack */ +/* 8 bit: ios_dis_ack */ /* In order to maintain endianity in the mailbox hsi, we want to keep using */ /* u32. The fw must have the VF right after the PF since this is how it */ /* access arrays(it expects always the VF to reside after the PF, and that */ -/* makes the calculation much easier for it. ) */ +/* makes the calculation much easier for it. ) */ /* In order to answer both limitations, and keep the struct small, the code */ /* will abuse the structure defined here to achieve the actual partition */ -/* above */ +/* above */ /****************************************************************************/ struct fw_flr_ack { - u32 pf_ack; - u32 vf_ack[1]; - u32 iov_dis_ack; + u32 pf_ack; + u32 vf_ack[1]; + u32 iov_dis_ack; }; struct fw_flr_mb { - u32 aggint; - u32 opgen_addr; - struct fw_flr_ack ack; + u32 aggint; + u32 opgen_addr; + struct fw_flr_ack ack; }; +/**** SUPPORT FOR SHMEM ARRRAYS *** + * The SHMEM HSI is aligned on 32 bit boundaries which makes it difficult to + * define arrays with storage types smaller then unsigned dwords. + * The macros below add generic support for SHMEM arrays with numeric elements + * that can span 2,4,8 or 16 bits. The array underlying type is a 32 bit dword + * array with individual bit-filed elements accessed using shifts and masks. + * + */ + +/* eb is the bitwidth of a single element */ +#define SHMEM_ARRAY_MASK(eb) ((1<<(eb))-1) +#define SHMEM_ARRAY_ENTRY(i, eb) ((i)/(32/(eb))) + +/* the bit-position macro allows the used to flip the order of the arrays + * elements on a per byte or word boundary. + * + * example: an array with 8 entries each 4 bit wide. This array will fit into + * a single dword. The diagrmas below show the array order of the nibbles. + * + * SHMEM_ARRAY_BITPOS(i, 4, 4) defines the stadard ordering: + * + * | | | | + * 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | + * | | | | + * + * SHMEM_ARRAY_BITPOS(i, 4, 8) defines a flip ordering per byte: + * + * | | | | + * 1 | 0 | 3 | 2 | 5 | 4 | 7 | 6 | + * | | | | + * + * SHMEM_ARRAY_BITPOS(i, 4, 16) defines a flip ordering per word: + * + * | | | | + * 3 | 2 | 1 | 0 | 7 | 6 | 5 | 4 | + * | | | | + */ +#define SHMEM_ARRAY_BITPOS(i, eb, fb) \ + ((((32/(fb)) - 1 - ((i)/((fb)/(eb))) % (32/(fb))) * (fb)) + \ + (((i)%((fb)/(eb))) * (eb))) + +#define SHMEM_ARRAY_GET(a, i, eb, fb) \ + ((a[SHMEM_ARRAY_ENTRY(i, eb)] >> SHMEM_ARRAY_BITPOS(i, eb, fb)) & \ + SHMEM_ARRAY_MASK(eb)) + +#define SHMEM_ARRAY_SET(a, i, eb, fb, val) \ +do { \ + a[SHMEM_ARRAY_ENTRY(i, eb)] &= ~(SHMEM_ARRAY_MASK(eb) << \ + SHMEM_ARRAY_BITPOS(i, eb, fb)); \ + a[SHMEM_ARRAY_ENTRY(i, eb)] |= (((val) & SHMEM_ARRAY_MASK(eb)) << \ + SHMEM_ARRAY_BITPOS(i, eb, fb)); \ +} while (0) + + /****START OF DCBX STRUCTURES DECLARATIONS****/ -#define DCBX_MAX_NUM_PRI_PG_ENTRIES 4 -#define DCBX_MAX_NUM_PG 8 -#define DCBX_STRICT_PRI_PG 15 -#define DCBX_MAX_APP_PROTOCOL 16 -#define FCOE_APP_IDX 0 -#define ISCSI_APP_IDX 1 -#define PREDEFINED_APP_IDX_MAX 2 +#define DCBX_MAX_NUM_PRI_PG_ENTRIES 8 +#define DCBX_PRI_PG_BITWIDTH 4 +#define DCBX_PRI_PG_FBITS 8 +#define DCBX_PRI_PG_GET(a, i) \ + SHMEM_ARRAY_GET(a, i, DCBX_PRI_PG_BITWIDTH, DCBX_PRI_PG_FBITS) +#define DCBX_PRI_PG_SET(a, i, val) \ + SHMEM_ARRAY_SET(a, i, DCBX_PRI_PG_BITWIDTH, DCBX_PRI_PG_FBITS, val) +#define DCBX_MAX_NUM_PG_BW_ENTRIES 8 +#define DCBX_BW_PG_BITWIDTH 8 +#define DCBX_PG_BW_GET(a, i) \ + SHMEM_ARRAY_GET(a, i, DCBX_BW_PG_BITWIDTH, DCBX_BW_PG_BITWIDTH) +#define DCBX_PG_BW_SET(a, i, val) \ + SHMEM_ARRAY_SET(a, i, DCBX_BW_PG_BITWIDTH, DCBX_BW_PG_BITWIDTH, val) +#define DCBX_STRICT_PRI_PG 15 +#define DCBX_MAX_APP_PROTOCOL 16 +#define DCBX_MAX_APP_LOCAL 32 +#define FCOE_APP_IDX 0 +#define ISCSI_APP_IDX 1 +#define PREDEFINED_APP_IDX_MAX 2 -struct dcbx_ets_feature{ - u32 enabled; - u8 pg_bw_tbl[DCBX_MAX_NUM_PG]; - u8 pri_pg_tbl[DCBX_MAX_NUM_PRI_PG_ENTRIES]; + +/* Big/Little endian have the same representation. */ +struct dcbx_ets_feature { + /* + * For Admin MIB - is this feature supported by the + * driver | For Local MIB - should this feature be enabled. + */ + u32 enabled; + u32 pg_bw_tbl[2]; + u32 pri_pg_tbl[1]; }; +/* Driver structure in LE */ struct dcbx_pfc_feature { #ifdef __BIG_ENDIAN - u8 pri_en_bitmap; -#define DCBX_PFC_PRI_0 0x01 -#define DCBX_PFC_PRI_1 0x02 -#define DCBX_PFC_PRI_2 0x04 -#define DCBX_PFC_PRI_3 0x08 -#define DCBX_PFC_PRI_4 0x10 -#define DCBX_PFC_PRI_5 0x20 -#define DCBX_PFC_PRI_6 0x40 -#define DCBX_PFC_PRI_7 0x80 - u8 pfc_caps; - u8 reserved; - u8 enabled; + u8 pri_en_bitmap; + #define DCBX_PFC_PRI_0 0x01 + #define DCBX_PFC_PRI_1 0x02 + #define DCBX_PFC_PRI_2 0x04 + #define DCBX_PFC_PRI_3 0x08 + #define DCBX_PFC_PRI_4 0x10 + #define DCBX_PFC_PRI_5 0x20 + #define DCBX_PFC_PRI_6 0x40 + #define DCBX_PFC_PRI_7 0x80 + u8 pfc_caps; + u8 reserved; + u8 enabled; #elif defined(__LITTLE_ENDIAN) - u8 enabled; - u8 reserved; - u8 pfc_caps; - u8 pri_en_bitmap; -#define DCBX_PFC_PRI_0 0x01 -#define DCBX_PFC_PRI_1 0x02 -#define DCBX_PFC_PRI_2 0x04 -#define DCBX_PFC_PRI_3 0x08 -#define DCBX_PFC_PRI_4 0x10 -#define DCBX_PFC_PRI_5 0x20 -#define DCBX_PFC_PRI_6 0x40 -#define DCBX_PFC_PRI_7 0x80 + u8 enabled; + u8 reserved; + u8 pfc_caps; + u8 pri_en_bitmap; + #define DCBX_PFC_PRI_0 0x01 + #define DCBX_PFC_PRI_1 0x02 + #define DCBX_PFC_PRI_2 0x04 + #define DCBX_PFC_PRI_3 0x08 + #define DCBX_PFC_PRI_4 0x10 + #define DCBX_PFC_PRI_5 0x20 + #define DCBX_PFC_PRI_6 0x40 + #define DCBX_PFC_PRI_7 0x80 #endif }; struct dcbx_app_priority_entry { #ifdef __BIG_ENDIAN - u8 app_id[2]; -#define DCBX_APP_PROTOCOL_UPPER_MASK 0x00FF -#define DCBX_APP_PROTOCOL_LOWER_MASK 0xFF00 - u8 pri_bitmap; - u8 appBitfield; -#define DCBX_APP_ENTRY_VALID 0x01 -#define DCBX_APP_ENTRY_SF_MASK 0x30 -#define DCBX_APP_ENTRY_SF_SHIFT 4 -#define DCBX_APP_SF_ETH_TYPE 0x10 -#define DCBX_APP_SF_PORT 0x20 + u16 app_id; + u8 pri_bitmap; + u8 appBitfield; + #define DCBX_APP_ENTRY_VALID 0x01 + #define DCBX_APP_ENTRY_SF_MASK 0x30 + #define DCBX_APP_ENTRY_SF_SHIFT 4 + #define DCBX_APP_SF_ETH_TYPE 0x10 + #define DCBX_APP_SF_PORT 0x20 #elif defined(__LITTLE_ENDIAN) - u8 appBitfield; -#define DCBX_APP_ENTRY_VALID 0x01 -#define DCBX_APP_ENTRY_SF_MASK 0x30 -#define DCBX_APP_ENTRY_SF_SHIFT 4 -#define DCBX_APP_SF_ETH_TYPE 0x10 -#define DCBX_APP_SF_PORT 0x20 - u8 pri_bitmap; - u8 app_id[2]; + u8 appBitfield; + #define DCBX_APP_ENTRY_VALID 0x01 + #define DCBX_APP_ENTRY_SF_MASK 0x30 + #define DCBX_APP_ENTRY_SF_SHIFT 4 + #define DCBX_APP_SF_ETH_TYPE 0x10 + #define DCBX_APP_SF_PORT 0x20 + u8 pri_bitmap; + u16 app_id; #endif }; +/* FW structure in BE */ struct dcbx_app_priority_feature { #ifdef __BIG_ENDIAN - u8 reserved; - u8 default_pri; - u8 tc_supported; - u8 enabled; + u8 reserved; + u8 default_pri; + u8 tc_supported; + u8 enabled; #elif defined(__LITTLE_ENDIAN) - u8 enabled; - u8 tc_supported; - u8 default_pri; - u8 reserved; + u8 enabled; + u8 tc_supported; + u8 default_pri; + u8 reserved; #endif - struct dcbx_app_priority_entry app_pri_tbl[DCBX_MAX_APP_PROTOCOL]; + struct dcbx_app_priority_entry app_pri_tbl[DCBX_MAX_APP_PROTOCOL]; }; +/* FW structure in BE */ struct dcbx_features { - struct dcbx_ets_feature ets; - struct dcbx_pfc_feature pfc; - struct dcbx_app_priority_feature app; + /* PG feature */ + struct dcbx_ets_feature ets; + /* PFC feature */ + struct dcbx_pfc_feature pfc; + /* APP feature */ + struct dcbx_app_priority_feature app; }; +/* LLDP protocol parameters */ +/* FW structure in BE */ struct lldp_params { #ifdef __BIG_ENDIAN - u8 msg_fast_tx_interval; - u8 msg_tx_hold; - u8 msg_tx_interval; - u8 admin_status; -#define LLDP_TX_ONLY 0x01 -#define LLDP_RX_ONLY 0x02 -#define LLDP_TX_RX 0x03 -#define LLDP_DISABLED 0x04 - u8 reserved1; - u8 tx_fast; - u8 tx_crd_max; - u8 tx_crd; + u8 msg_fast_tx_interval; + u8 msg_tx_hold; + u8 msg_tx_interval; + u8 admin_status; + #define LLDP_TX_ONLY 0x01 + #define LLDP_RX_ONLY 0x02 + #define LLDP_TX_RX 0x03 + #define LLDP_DISABLED 0x04 + u8 reserved1; + u8 tx_fast; + u8 tx_crd_max; + u8 tx_crd; #elif defined(__LITTLE_ENDIAN) - u8 admin_status; -#define LLDP_TX_ONLY 0x01 -#define LLDP_RX_ONLY 0x02 -#define LLDP_TX_RX 0x03 -#define LLDP_DISABLED 0x04 - u8 msg_tx_interval; - u8 msg_tx_hold; - u8 msg_fast_tx_interval; - u8 tx_crd; - u8 tx_crd_max; - u8 tx_fast; - u8 reserved1; + u8 admin_status; + #define LLDP_TX_ONLY 0x01 + #define LLDP_RX_ONLY 0x02 + #define LLDP_TX_RX 0x03 + #define LLDP_DISABLED 0x04 + u8 msg_tx_interval; + u8 msg_tx_hold; + u8 msg_fast_tx_interval; + u8 tx_crd; + u8 tx_crd_max; + u8 tx_fast; + u8 reserved1; #endif -#define REM_CHASSIS_ID_STAT_LEN 4 -#define REM_PORT_ID_STAT_LEN 4 - u32 peer_chassis_id[REM_CHASSIS_ID_STAT_LEN]; - u32 peer_port_id[REM_PORT_ID_STAT_LEN]; + #define REM_CHASSIS_ID_STAT_LEN 4 + #define REM_PORT_ID_STAT_LEN 4 + /* Holds remote Chassis ID TLV header, subtype and 9B of payload. */ + u32 peer_chassis_id[REM_CHASSIS_ID_STAT_LEN]; + /* Holds remote Port ID TLV header, subtype and 9B of payload. */ + u32 peer_port_id[REM_PORT_ID_STAT_LEN]; }; struct lldp_dcbx_stat { -#define LOCAL_CHASSIS_ID_STAT_LEN 2 -#define LOCAL_PORT_ID_STAT_LEN 2 + #define LOCAL_CHASSIS_ID_STAT_LEN 2 + #define LOCAL_PORT_ID_STAT_LEN 2 + /* Holds local Chassis ID 8B payload of constant subtype 4. */ u32 local_chassis_id[LOCAL_CHASSIS_ID_STAT_LEN]; + /* Holds local Port ID 8B payload of constant subtype 3. */ u32 local_port_id[LOCAL_PORT_ID_STAT_LEN]; + /* Number of DCBX frames transmitted. */ u32 num_tx_dcbx_pkts; + /* Number of DCBX frames received. */ u32 num_rx_dcbx_pkts; }; +/* ADMIN MIB - DCBX local machine default configuration. */ struct lldp_admin_mib { - u32 ver_cfg_flags; -#define DCBX_ETS_CONFIG_TX_ENABLED 0x00000001 -#define DCBX_PFC_CONFIG_TX_ENABLED 0x00000002 -#define DCBX_APP_CONFIG_TX_ENABLED 0x00000004 -#define DCBX_ETS_RECO_TX_ENABLED 0x00000008 -#define DCBX_ETS_RECO_VALID 0x00000010 -#define DCBX_ETS_WILLING 0x00000020 -#define DCBX_PFC_WILLING 0x00000040 -#define DCBX_APP_WILLING 0x00000080 -#define DCBX_VERSION_CEE 0x00000100 -#define DCBX_VERSION_IEEE 0x00000200 -#define DCBX_DCBX_ENABLED 0x00000400 -#define DCBX_CEE_VERSION_MASK 0x0000f000 -#define DCBX_CEE_VERSION_SHIFT 12 -#define DCBX_CEE_MAX_VERSION_MASK 0x000f0000 -#define DCBX_CEE_MAX_VERSION_SHIFT 16 - struct dcbx_features features; + u32 ver_cfg_flags; + #define DCBX_ETS_CONFIG_TX_ENABLED 0x00000001 + #define DCBX_PFC_CONFIG_TX_ENABLED 0x00000002 + #define DCBX_APP_CONFIG_TX_ENABLED 0x00000004 + #define DCBX_ETS_RECO_TX_ENABLED 0x00000008 + #define DCBX_ETS_RECO_VALID 0x00000010 + #define DCBX_ETS_WILLING 0x00000020 + #define DCBX_PFC_WILLING 0x00000040 + #define DCBX_APP_WILLING 0x00000080 + #define DCBX_VERSION_CEE 0x00000100 + #define DCBX_VERSION_IEEE 0x00000200 + #define DCBX_DCBX_ENABLED 0x00000400 + #define DCBX_CEE_VERSION_MASK 0x0000f000 + #define DCBX_CEE_VERSION_SHIFT 12 + #define DCBX_CEE_MAX_VERSION_MASK 0x000f0000 + #define DCBX_CEE_MAX_VERSION_SHIFT 16 + struct dcbx_features features; }; +/* REMOTE MIB - remote machine DCBX configuration. */ struct lldp_remote_mib { - u32 prefix_seq_num; - u32 flags; -#define DCBX_ETS_TLV_RX 0x00000001 -#define DCBX_PFC_TLV_RX 0x00000002 -#define DCBX_APP_TLV_RX 0x00000004 -#define DCBX_ETS_RX_ERROR 0x00000010 -#define DCBX_PFC_RX_ERROR 0x00000020 -#define DCBX_APP_RX_ERROR 0x00000040 -#define DCBX_ETS_REM_WILLING 0x00000100 -#define DCBX_PFC_REM_WILLING 0x00000200 -#define DCBX_APP_REM_WILLING 0x00000400 -#define DCBX_REMOTE_ETS_RECO_VALID 0x00001000 - struct dcbx_features features; - u32 suffix_seq_num; + u32 prefix_seq_num; + u32 flags; + #define DCBX_ETS_TLV_RX 0x00000001 + #define DCBX_PFC_TLV_RX 0x00000002 + #define DCBX_APP_TLV_RX 0x00000004 + #define DCBX_ETS_RX_ERROR 0x00000010 + #define DCBX_PFC_RX_ERROR 0x00000020 + #define DCBX_APP_RX_ERROR 0x00000040 + #define DCBX_ETS_REM_WILLING 0x00000100 + #define DCBX_PFC_REM_WILLING 0x00000200 + #define DCBX_APP_REM_WILLING 0x00000400 + #define DCBX_REMOTE_ETS_RECO_VALID 0x00001000 + #define DCBX_REMOTE_MIB_VALID 0x00002000 + struct dcbx_features features; + u32 suffix_seq_num; }; +/* LOCAL MIB - operational DCBX configuration - transmitted on Tx LLDPDU. */ struct lldp_local_mib { - u32 prefix_seq_num; - u32 error; -#define DCBX_LOCAL_ETS_ERROR 0x00000001 -#define DCBX_LOCAL_PFC_ERROR 0x00000002 -#define DCBX_LOCAL_APP_ERROR 0x00000004 -#define DCBX_LOCAL_PFC_MISMATCH 0x00000010 -#define DCBX_LOCAL_APP_MISMATCH 0x00000020 - struct dcbx_features features; - u32 suffix_seq_num; + u32 prefix_seq_num; + /* Indicates if there is mismatch with negotiation results. */ + u32 error; + #define DCBX_LOCAL_ETS_ERROR 0x00000001 + #define DCBX_LOCAL_PFC_ERROR 0x00000002 + #define DCBX_LOCAL_APP_ERROR 0x00000004 + #define DCBX_LOCAL_PFC_MISMATCH 0x00000010 + #define DCBX_LOCAL_APP_MISMATCH 0x00000020 + #define DCBX_REMOTE_MIB_ERROR 0x00000040 + #define DCBX_REMOTE_ETS_TLV_NOT_FOUND 0x00000080 + #define DCBX_REMOTE_PFC_TLV_NOT_FOUND 0x00000100 + #define DCBX_REMOTE_APP_TLV_NOT_FOUND 0x00000200 + struct dcbx_features features; + u32 suffix_seq_num; +}; + +struct lldp_local_mib_ext { + u32 prefix_seq_num; + /* APP TLV extension - 16 more entries for negotiation results*/ + struct dcbx_app_priority_entry app_pri_tbl_ext[DCBX_MAX_APP_PROTOCOL]; + u32 suffix_seq_num; }; /***END OF DCBX STRUCTURES DECLARATIONS***/ struct shmem2_region { - u32 size; + u32 size; /* 0x0000 */ - u32 dcc_support; -#define SHMEM_DCC_SUPPORT_NONE 0x00000000 -#define SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV 0x00000001 -#define SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV 0x00000004 -#define SHMEM_DCC_SUPPORT_CHANGE_MAC_ADDRESS_TLV 0x00000008 -#define SHMEM_DCC_SUPPORT_SET_PROTOCOL_TLV 0x00000040 -#define SHMEM_DCC_SUPPORT_SET_PRIORITY_TLV 0x00000080 + u32 dcc_support; /* 0x0004 */ + #define SHMEM_DCC_SUPPORT_NONE 0x00000000 + #define SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV 0x00000001 + #define SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV 0x00000004 + #define SHMEM_DCC_SUPPORT_CHANGE_MAC_ADDRESS_TLV 0x00000008 + #define SHMEM_DCC_SUPPORT_SET_PROTOCOL_TLV 0x00000040 + #define SHMEM_DCC_SUPPORT_SET_PRIORITY_TLV 0x00000080 - u32 ext_phy_fw_version2[PORT_MAX]; - /* - * For backwards compatibility, if the mf_cfg_addr does not exist - * (the size filed is smaller than 0xc) the mf_cfg resides at the - * end of struct shmem_region - */ - u32 mf_cfg_addr; -#define SHMEM_MF_CFG_ADDR_NONE 0x00000000 + u32 ext_phy_fw_version2[PORT_MAX]; /* 0x0008 */ + /* + * For backwards compatibility, if the mf_cfg_addr does not exist + * (the size filed is smaller than 0xc) the mf_cfg resides at the + * end of struct shmem_region + */ + u32 mf_cfg_addr; /* 0x0010 */ + #define SHMEM_MF_CFG_ADDR_NONE 0x00000000 - struct fw_flr_mb flr_mb; - u32 dcbx_lldp_params_offset; -#define SHMEM_LLDP_DCBX_PARAMS_NONE 0x00000000 - u32 dcbx_neg_res_offset; -#define SHMEM_DCBX_NEG_RES_NONE 0x00000000 - u32 dcbx_remote_mib_offset; -#define SHMEM_DCBX_REMOTE_MIB_NONE 0x00000000 - /* - * The other shmemX_base_addr holds the other path's shmem address - * required for example in case of common phy init, or for path1 to know - * the address of mcp debug trace which is located in offset from shmem - * of path0 - */ - u32 other_shmem_base_addr; - u32 other_shmem2_base_addr; - /* - * mcp_vf_disabled is set by the MCP to indicate the driver about VFs - * which were disabled/flred - */ - u32 mcp_vf_disabled[E2_VF_MAX / 32]; + struct fw_flr_mb flr_mb; /* 0x0014 */ + u32 dcbx_lldp_params_offset; /* 0x0028 */ + #define SHMEM_LLDP_DCBX_PARAMS_NONE 0x00000000 + u32 dcbx_neg_res_offset; /* 0x002c */ + #define SHMEM_DCBX_NEG_RES_NONE 0x00000000 + u32 dcbx_remote_mib_offset; /* 0x0030 */ + #define SHMEM_DCBX_REMOTE_MIB_NONE 0x00000000 + /* + * The other shmemX_base_addr holds the other path's shmem address + * required for example in case of common phy init, or for path1 to know + * the address of mcp debug trace which is located in offset from shmem + * of path0 + */ + u32 other_shmem_base_addr; /* 0x0034 */ + u32 other_shmem2_base_addr; /* 0x0038 */ + /* + * mcp_vf_disabled is set by the MCP to indicate the driver about VFs + * which were disabled/flred + */ + u32 mcp_vf_disabled[E2_VF_MAX / 32]; /* 0x003c */ - /* - * drv_ack_vf_disabled is set by the PF driver to ack handled disabled - * VFs - */ - u32 drv_ack_vf_disabled[E2_FUNC_MAX][E2_VF_MAX / 32]; + /* + * drv_ack_vf_disabled is set by the PF driver to ack handled disabled + * VFs + */ + u32 drv_ack_vf_disabled[E2_FUNC_MAX][E2_VF_MAX / 32]; /* 0x0044 */ - u32 dcbx_lldp_dcbx_stat_offset; -#define SHMEM_LLDP_DCBX_STAT_NONE 0x00000000 + u32 dcbx_lldp_dcbx_stat_offset; /* 0x0064 */ + #define SHMEM_LLDP_DCBX_STAT_NONE 0x00000000 - /* edebug_driver_if field is used to transfer messages between edebug app - * to the driver through shmem2. - * - * message format: - * bits 0-2 - function number / instance of driver to perform request - * bits 3-5 - op code / is_ack? - * bits 6-63 - data - */ - u32 edebug_driver_if[2]; -#define EDEBUG_DRIVER_IF_OP_CODE_GET_PHYS_ADDR 1 -#define EDEBUG_DRIVER_IF_OP_CODE_GET_BUS_ADDR 2 -#define EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT 3 + /* + * edebug_driver_if field is used to transfer messages between edebug + * app to the driver through shmem2. + * + * message format: + * bits 0-2 - function number / instance of driver to perform request + * bits 3-5 - op code / is_ack? + * bits 6-63 - data + */ + u32 edebug_driver_if[2]; /* 0x0068 */ + #define EDEBUG_DRIVER_IF_OP_CODE_GET_PHYS_ADDR 1 + #define EDEBUG_DRIVER_IF_OP_CODE_GET_BUS_ADDR 2 + #define EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT 3 + + u32 nvm_retain_bitmap_addr; /* 0x0070 */ + + /* afex support of that driver */ + u32 afex_driver_support; /* 0x0074 */ + #define SHMEM_AFEX_VERSION_MASK 0x100f + #define SHMEM_AFEX_SUPPORTED_VERSION_ONE 0x1001 + #define SHMEM_AFEX_REDUCED_DRV_LOADED 0x8000 + + /* driver receives addr in scratchpad to which it should respond */ + u32 afex_scratchpad_addr_to_write[E2_FUNC_MAX]; + + /* + * generic params from MCP to driver (value depends on the msg sent + * to driver + */ + u32 afex_param1_to_driver[E2_FUNC_MAX]; /* 0x0088 */ + u32 afex_param2_to_driver[E2_FUNC_MAX]; /* 0x0098 */ + + u32 swim_base_addr; /* 0x0108 */ + u32 swim_funcs; + u32 swim_main_cb; + + /* + * bitmap notifying which VIF profiles stored in nvram are enabled by + * switch + */ + u32 afex_profiles_enabled[2]; + + /* generic flags controlled by the driver */ + u32 drv_flags; + #define DRV_FLAGS_DCB_CONFIGURED 0x0 + #define DRV_FLAGS_DCB_CONFIGURATION_ABORTED 0x1 + #define DRV_FLAGS_DCB_MFW_CONFIGURED 0x2 + + #define DRV_FLAGS_PORT_MASK ((1 << DRV_FLAGS_DCB_CONFIGURED) | \ + (1 << DRV_FLAGS_DCB_CONFIGURATION_ABORTED) | \ + (1 << DRV_FLAGS_DCB_MFW_CONFIGURED)) + /* Port offset*/ + #define DRV_FLAGS_P0_OFFSET 0 + #define DRV_FLAGS_P1_OFFSET 16 + #define DRV_FLAGS_GET_PORT_OFFSET(_port) ((0 == _port) ? \ + DRV_FLAGS_P0_OFFSET : \ + DRV_FLAGS_P1_OFFSET) + + #define DRV_FLAGS_GET_PORT_MASK(_port) (DRV_FLAGS_PORT_MASK << \ + DRV_FLAGS_GET_PORT_OFFSET(_port)) + + #define DRV_FLAGS_FILED_BY_PORT(_field_bit, _port) (1 << ( \ + (_field_bit) + DRV_FLAGS_GET_PORT_OFFSET(_port))) + + /* pointer to extended dev_info shared data copied from nvm image */ + u32 extended_dev_info_shared_addr; + u32 ncsi_oem_data_addr; + + u32 sensor_data_addr; + u32 buffer_block_addr; + u32 sensor_data_req_update_interval; + u32 temperature_in_half_celsius; + u32 glob_struct_in_host; + + u32 dcbx_neg_res_ext_offset; + #define SHMEM_DCBX_NEG_RES_EXT_NONE 0x00000000 + + u32 drv_capabilities_flag[E2_FUNC_MAX]; + #define DRV_FLAGS_CAPABILITIES_LOADED_SUPPORTED 0x00000001 + #define DRV_FLAGS_CAPABILITIES_LOADED_L2 0x00000002 + #define DRV_FLAGS_CAPABILITIES_LOADED_FCOE 0x00000004 + #define DRV_FLAGS_CAPABILITIES_LOADED_ISCSI 0x00000008 + + u32 extended_dev_info_shared_cfg_size; + + u32 dcbx_en[PORT_MAX]; + + /* The offset points to the multi threaded meta structure */ + u32 multi_thread_data_offset; + + /* address of DMAable host address holding values from the drivers */ + u32 drv_info_host_addr_lo; + u32 drv_info_host_addr_hi; + + /* general values written by the MFW (such as current version) */ + u32 drv_info_control; + #define DRV_INFO_CONTROL_VER_MASK 0x000000ff + #define DRV_INFO_CONTROL_VER_SHIFT 0 + #define DRV_INFO_CONTROL_OP_CODE_MASK 0x0000ff00 + #define DRV_INFO_CONTROL_OP_CODE_SHIFT 8 + u32 ibft_host_addr; /* initialized by option ROM */ }; struct emac_stats { - u32 rx_stat_ifhcinoctets; - u32 rx_stat_ifhcinbadoctets; - u32 rx_stat_etherstatsfragments; - u32 rx_stat_ifhcinucastpkts; - u32 rx_stat_ifhcinmulticastpkts; - u32 rx_stat_ifhcinbroadcastpkts; - u32 rx_stat_dot3statsfcserrors; - u32 rx_stat_dot3statsalignmenterrors; - u32 rx_stat_dot3statscarriersenseerrors; - u32 rx_stat_xonpauseframesreceived; - u32 rx_stat_xoffpauseframesreceived; - u32 rx_stat_maccontrolframesreceived; - u32 rx_stat_xoffstateentered; - u32 rx_stat_dot3statsframestoolong; - u32 rx_stat_etherstatsjabbers; - u32 rx_stat_etherstatsundersizepkts; - u32 rx_stat_etherstatspkts64octets; - u32 rx_stat_etherstatspkts65octetsto127octets; - u32 rx_stat_etherstatspkts128octetsto255octets; - u32 rx_stat_etherstatspkts256octetsto511octets; - u32 rx_stat_etherstatspkts512octetsto1023octets; - u32 rx_stat_etherstatspkts1024octetsto1522octets; - u32 rx_stat_etherstatspktsover1522octets; + u32 rx_stat_ifhcinoctets; + u32 rx_stat_ifhcinbadoctets; + u32 rx_stat_etherstatsfragments; + u32 rx_stat_ifhcinucastpkts; + u32 rx_stat_ifhcinmulticastpkts; + u32 rx_stat_ifhcinbroadcastpkts; + u32 rx_stat_dot3statsfcserrors; + u32 rx_stat_dot3statsalignmenterrors; + u32 rx_stat_dot3statscarriersenseerrors; + u32 rx_stat_xonpauseframesreceived; + u32 rx_stat_xoffpauseframesreceived; + u32 rx_stat_maccontrolframesreceived; + u32 rx_stat_xoffstateentered; + u32 rx_stat_dot3statsframestoolong; + u32 rx_stat_etherstatsjabbers; + u32 rx_stat_etherstatsundersizepkts; + u32 rx_stat_etherstatspkts64octets; + u32 rx_stat_etherstatspkts65octetsto127octets; + u32 rx_stat_etherstatspkts128octetsto255octets; + u32 rx_stat_etherstatspkts256octetsto511octets; + u32 rx_stat_etherstatspkts512octetsto1023octets; + u32 rx_stat_etherstatspkts1024octetsto1522octets; + u32 rx_stat_etherstatspktsover1522octets; - u32 rx_stat_falsecarriererrors; + u32 rx_stat_falsecarriererrors; - u32 tx_stat_ifhcoutoctets; - u32 tx_stat_ifhcoutbadoctets; - u32 tx_stat_etherstatscollisions; - u32 tx_stat_outxonsent; - u32 tx_stat_outxoffsent; - u32 tx_stat_flowcontroldone; - u32 tx_stat_dot3statssinglecollisionframes; - u32 tx_stat_dot3statsmultiplecollisionframes; - u32 tx_stat_dot3statsdeferredtransmissions; - u32 tx_stat_dot3statsexcessivecollisions; - u32 tx_stat_dot3statslatecollisions; - u32 tx_stat_ifhcoutucastpkts; - u32 tx_stat_ifhcoutmulticastpkts; - u32 tx_stat_ifhcoutbroadcastpkts; - u32 tx_stat_etherstatspkts64octets; - u32 tx_stat_etherstatspkts65octetsto127octets; - u32 tx_stat_etherstatspkts128octetsto255octets; - u32 tx_stat_etherstatspkts256octetsto511octets; - u32 tx_stat_etherstatspkts512octetsto1023octets; - u32 tx_stat_etherstatspkts1024octetsto1522octets; - u32 tx_stat_etherstatspktsover1522octets; - u32 tx_stat_dot3statsinternalmactransmiterrors; + u32 tx_stat_ifhcoutoctets; + u32 tx_stat_ifhcoutbadoctets; + u32 tx_stat_etherstatscollisions; + u32 tx_stat_outxonsent; + u32 tx_stat_outxoffsent; + u32 tx_stat_flowcontroldone; + u32 tx_stat_dot3statssinglecollisionframes; + u32 tx_stat_dot3statsmultiplecollisionframes; + u32 tx_stat_dot3statsdeferredtransmissions; + u32 tx_stat_dot3statsexcessivecollisions; + u32 tx_stat_dot3statslatecollisions; + u32 tx_stat_ifhcoutucastpkts; + u32 tx_stat_ifhcoutmulticastpkts; + u32 tx_stat_ifhcoutbroadcastpkts; + u32 tx_stat_etherstatspkts64octets; + u32 tx_stat_etherstatspkts65octetsto127octets; + u32 tx_stat_etherstatspkts128octetsto255octets; + u32 tx_stat_etherstatspkts256octetsto511octets; + u32 tx_stat_etherstatspkts512octetsto1023octets; + u32 tx_stat_etherstatspkts1024octetsto1522octets; + u32 tx_stat_etherstatspktsover1522octets; + u32 tx_stat_dot3statsinternalmactransmiterrors; }; @@ -1832,245 +2497,412 @@ struct bmac2_stats { u32 rx_stat_gripj_hi; }; +struct mstat_stats { + struct { + /* OTE MSTAT on E3 has a bug where this register's contents are + * actually tx_gtxpok + tx_gtxpf + (possibly)tx_gtxpp + */ + u32 tx_gtxpok_lo; + u32 tx_gtxpok_hi; + u32 tx_gtxpf_lo; + u32 tx_gtxpf_hi; + u32 tx_gtxpp_lo; + u32 tx_gtxpp_hi; + u32 tx_gtfcs_lo; + u32 tx_gtfcs_hi; + u32 tx_gtuca_lo; + u32 tx_gtuca_hi; + u32 tx_gtmca_lo; + u32 tx_gtmca_hi; + u32 tx_gtgca_lo; + u32 tx_gtgca_hi; + u32 tx_gtpkt_lo; + u32 tx_gtpkt_hi; + u32 tx_gt64_lo; + u32 tx_gt64_hi; + u32 tx_gt127_lo; + u32 tx_gt127_hi; + u32 tx_gt255_lo; + u32 tx_gt255_hi; + u32 tx_gt511_lo; + u32 tx_gt511_hi; + u32 tx_gt1023_lo; + u32 tx_gt1023_hi; + u32 tx_gt1518_lo; + u32 tx_gt1518_hi; + u32 tx_gt2047_lo; + u32 tx_gt2047_hi; + u32 tx_gt4095_lo; + u32 tx_gt4095_hi; + u32 tx_gt9216_lo; + u32 tx_gt9216_hi; + u32 tx_gt16383_lo; + u32 tx_gt16383_hi; + u32 tx_gtufl_lo; + u32 tx_gtufl_hi; + u32 tx_gterr_lo; + u32 tx_gterr_hi; + u32 tx_gtbyt_lo; + u32 tx_gtbyt_hi; + u32 tx_collisions_lo; + u32 tx_collisions_hi; + u32 tx_singlecollision_lo; + u32 tx_singlecollision_hi; + u32 tx_multiplecollisions_lo; + u32 tx_multiplecollisions_hi; + u32 tx_deferred_lo; + u32 tx_deferred_hi; + u32 tx_excessivecollisions_lo; + u32 tx_excessivecollisions_hi; + u32 tx_latecollisions_lo; + u32 tx_latecollisions_hi; + } stats_tx; + + struct { + u32 rx_gr64_lo; + u32 rx_gr64_hi; + u32 rx_gr127_lo; + u32 rx_gr127_hi; + u32 rx_gr255_lo; + u32 rx_gr255_hi; + u32 rx_gr511_lo; + u32 rx_gr511_hi; + u32 rx_gr1023_lo; + u32 rx_gr1023_hi; + u32 rx_gr1518_lo; + u32 rx_gr1518_hi; + u32 rx_gr2047_lo; + u32 rx_gr2047_hi; + u32 rx_gr4095_lo; + u32 rx_gr4095_hi; + u32 rx_gr9216_lo; + u32 rx_gr9216_hi; + u32 rx_gr16383_lo; + u32 rx_gr16383_hi; + u32 rx_grpkt_lo; + u32 rx_grpkt_hi; + u32 rx_grfcs_lo; + u32 rx_grfcs_hi; + u32 rx_gruca_lo; + u32 rx_gruca_hi; + u32 rx_grmca_lo; + u32 rx_grmca_hi; + u32 rx_grbca_lo; + u32 rx_grbca_hi; + u32 rx_grxpf_lo; + u32 rx_grxpf_hi; + u32 rx_grxpp_lo; + u32 rx_grxpp_hi; + u32 rx_grxuo_lo; + u32 rx_grxuo_hi; + u32 rx_grovr_lo; + u32 rx_grovr_hi; + u32 rx_grxcf_lo; + u32 rx_grxcf_hi; + u32 rx_grflr_lo; + u32 rx_grflr_hi; + u32 rx_grpok_lo; + u32 rx_grpok_hi; + u32 rx_grbyt_lo; + u32 rx_grbyt_hi; + u32 rx_grund_lo; + u32 rx_grund_hi; + u32 rx_grfrg_lo; + u32 rx_grfrg_hi; + u32 rx_grerb_lo; + u32 rx_grerb_hi; + u32 rx_grfre_lo; + u32 rx_grfre_hi; + + u32 rx_alignmenterrors_lo; + u32 rx_alignmenterrors_hi; + u32 rx_falsecarrier_lo; + u32 rx_falsecarrier_hi; + u32 rx_llfcmsgcnt_lo; + u32 rx_llfcmsgcnt_hi; + } stats_rx; +}; + union mac_stats { - struct emac_stats emac_stats; - struct bmac1_stats bmac1_stats; - struct bmac2_stats bmac2_stats; + struct emac_stats emac_stats; + struct bmac1_stats bmac1_stats; + struct bmac2_stats bmac2_stats; + struct mstat_stats mstat_stats; }; struct mac_stx { - /* in_bad_octets */ - u32 rx_stat_ifhcinbadoctets_hi; - u32 rx_stat_ifhcinbadoctets_lo; + /* in_bad_octets */ + u32 rx_stat_ifhcinbadoctets_hi; + u32 rx_stat_ifhcinbadoctets_lo; - /* out_bad_octets */ - u32 tx_stat_ifhcoutbadoctets_hi; - u32 tx_stat_ifhcoutbadoctets_lo; + /* out_bad_octets */ + u32 tx_stat_ifhcoutbadoctets_hi; + u32 tx_stat_ifhcoutbadoctets_lo; - /* crc_receive_errors */ - u32 rx_stat_dot3statsfcserrors_hi; - u32 rx_stat_dot3statsfcserrors_lo; - /* alignment_errors */ - u32 rx_stat_dot3statsalignmenterrors_hi; - u32 rx_stat_dot3statsalignmenterrors_lo; - /* carrier_sense_errors */ - u32 rx_stat_dot3statscarriersenseerrors_hi; - u32 rx_stat_dot3statscarriersenseerrors_lo; - /* false_carrier_detections */ - u32 rx_stat_falsecarriererrors_hi; - u32 rx_stat_falsecarriererrors_lo; + /* crc_receive_errors */ + u32 rx_stat_dot3statsfcserrors_hi; + u32 rx_stat_dot3statsfcserrors_lo; + /* alignment_errors */ + u32 rx_stat_dot3statsalignmenterrors_hi; + u32 rx_stat_dot3statsalignmenterrors_lo; + /* carrier_sense_errors */ + u32 rx_stat_dot3statscarriersenseerrors_hi; + u32 rx_stat_dot3statscarriersenseerrors_lo; + /* false_carrier_detections */ + u32 rx_stat_falsecarriererrors_hi; + u32 rx_stat_falsecarriererrors_lo; - /* runt_packets_received */ - u32 rx_stat_etherstatsundersizepkts_hi; - u32 rx_stat_etherstatsundersizepkts_lo; - /* jabber_packets_received */ - u32 rx_stat_dot3statsframestoolong_hi; - u32 rx_stat_dot3statsframestoolong_lo; + /* runt_packets_received */ + u32 rx_stat_etherstatsundersizepkts_hi; + u32 rx_stat_etherstatsundersizepkts_lo; + /* jabber_packets_received */ + u32 rx_stat_dot3statsframestoolong_hi; + u32 rx_stat_dot3statsframestoolong_lo; - /* error_runt_packets_received */ - u32 rx_stat_etherstatsfragments_hi; - u32 rx_stat_etherstatsfragments_lo; - /* error_jabber_packets_received */ - u32 rx_stat_etherstatsjabbers_hi; - u32 rx_stat_etherstatsjabbers_lo; + /* error_runt_packets_received */ + u32 rx_stat_etherstatsfragments_hi; + u32 rx_stat_etherstatsfragments_lo; + /* error_jabber_packets_received */ + u32 rx_stat_etherstatsjabbers_hi; + u32 rx_stat_etherstatsjabbers_lo; - /* control_frames_received */ - u32 rx_stat_maccontrolframesreceived_hi; - u32 rx_stat_maccontrolframesreceived_lo; - u32 rx_stat_bmac_xpf_hi; - u32 rx_stat_bmac_xpf_lo; - u32 rx_stat_bmac_xcf_hi; - u32 rx_stat_bmac_xcf_lo; + /* control_frames_received */ + u32 rx_stat_maccontrolframesreceived_hi; + u32 rx_stat_maccontrolframesreceived_lo; + u32 rx_stat_mac_xpf_hi; + u32 rx_stat_mac_xpf_lo; + u32 rx_stat_mac_xcf_hi; + u32 rx_stat_mac_xcf_lo; - /* xoff_state_entered */ - u32 rx_stat_xoffstateentered_hi; - u32 rx_stat_xoffstateentered_lo; - /* pause_xon_frames_received */ - u32 rx_stat_xonpauseframesreceived_hi; - u32 rx_stat_xonpauseframesreceived_lo; - /* pause_xoff_frames_received */ - u32 rx_stat_xoffpauseframesreceived_hi; - u32 rx_stat_xoffpauseframesreceived_lo; - /* pause_xon_frames_transmitted */ - u32 tx_stat_outxonsent_hi; - u32 tx_stat_outxonsent_lo; - /* pause_xoff_frames_transmitted */ - u32 tx_stat_outxoffsent_hi; - u32 tx_stat_outxoffsent_lo; - /* flow_control_done */ - u32 tx_stat_flowcontroldone_hi; - u32 tx_stat_flowcontroldone_lo; + /* xoff_state_entered */ + u32 rx_stat_xoffstateentered_hi; + u32 rx_stat_xoffstateentered_lo; + /* pause_xon_frames_received */ + u32 rx_stat_xonpauseframesreceived_hi; + u32 rx_stat_xonpauseframesreceived_lo; + /* pause_xoff_frames_received */ + u32 rx_stat_xoffpauseframesreceived_hi; + u32 rx_stat_xoffpauseframesreceived_lo; + /* pause_xon_frames_transmitted */ + u32 tx_stat_outxonsent_hi; + u32 tx_stat_outxonsent_lo; + /* pause_xoff_frames_transmitted */ + u32 tx_stat_outxoffsent_hi; + u32 tx_stat_outxoffsent_lo; + /* flow_control_done */ + u32 tx_stat_flowcontroldone_hi; + u32 tx_stat_flowcontroldone_lo; - /* ether_stats_collisions */ - u32 tx_stat_etherstatscollisions_hi; - u32 tx_stat_etherstatscollisions_lo; - /* single_collision_transmit_frames */ - u32 tx_stat_dot3statssinglecollisionframes_hi; - u32 tx_stat_dot3statssinglecollisionframes_lo; - /* multiple_collision_transmit_frames */ - u32 tx_stat_dot3statsmultiplecollisionframes_hi; - u32 tx_stat_dot3statsmultiplecollisionframes_lo; - /* deferred_transmissions */ - u32 tx_stat_dot3statsdeferredtransmissions_hi; - u32 tx_stat_dot3statsdeferredtransmissions_lo; - /* excessive_collision_frames */ - u32 tx_stat_dot3statsexcessivecollisions_hi; - u32 tx_stat_dot3statsexcessivecollisions_lo; - /* late_collision_frames */ - u32 tx_stat_dot3statslatecollisions_hi; - u32 tx_stat_dot3statslatecollisions_lo; + /* ether_stats_collisions */ + u32 tx_stat_etherstatscollisions_hi; + u32 tx_stat_etherstatscollisions_lo; + /* single_collision_transmit_frames */ + u32 tx_stat_dot3statssinglecollisionframes_hi; + u32 tx_stat_dot3statssinglecollisionframes_lo; + /* multiple_collision_transmit_frames */ + u32 tx_stat_dot3statsmultiplecollisionframes_hi; + u32 tx_stat_dot3statsmultiplecollisionframes_lo; + /* deferred_transmissions */ + u32 tx_stat_dot3statsdeferredtransmissions_hi; + u32 tx_stat_dot3statsdeferredtransmissions_lo; + /* excessive_collision_frames */ + u32 tx_stat_dot3statsexcessivecollisions_hi; + u32 tx_stat_dot3statsexcessivecollisions_lo; + /* late_collision_frames */ + u32 tx_stat_dot3statslatecollisions_hi; + u32 tx_stat_dot3statslatecollisions_lo; - /* frames_transmitted_64_bytes */ - u32 tx_stat_etherstatspkts64octets_hi; - u32 tx_stat_etherstatspkts64octets_lo; - /* frames_transmitted_65_127_bytes */ - u32 tx_stat_etherstatspkts65octetsto127octets_hi; - u32 tx_stat_etherstatspkts65octetsto127octets_lo; - /* frames_transmitted_128_255_bytes */ - u32 tx_stat_etherstatspkts128octetsto255octets_hi; - u32 tx_stat_etherstatspkts128octetsto255octets_lo; - /* frames_transmitted_256_511_bytes */ - u32 tx_stat_etherstatspkts256octetsto511octets_hi; - u32 tx_stat_etherstatspkts256octetsto511octets_lo; - /* frames_transmitted_512_1023_bytes */ - u32 tx_stat_etherstatspkts512octetsto1023octets_hi; - u32 tx_stat_etherstatspkts512octetsto1023octets_lo; - /* frames_transmitted_1024_1522_bytes */ - u32 tx_stat_etherstatspkts1024octetsto1522octets_hi; - u32 tx_stat_etherstatspkts1024octetsto1522octets_lo; - /* frames_transmitted_1523_9022_bytes */ - u32 tx_stat_etherstatspktsover1522octets_hi; - u32 tx_stat_etherstatspktsover1522octets_lo; - u32 tx_stat_bmac_2047_hi; - u32 tx_stat_bmac_2047_lo; - u32 tx_stat_bmac_4095_hi; - u32 tx_stat_bmac_4095_lo; - u32 tx_stat_bmac_9216_hi; - u32 tx_stat_bmac_9216_lo; - u32 tx_stat_bmac_16383_hi; - u32 tx_stat_bmac_16383_lo; + /* frames_transmitted_64_bytes */ + u32 tx_stat_etherstatspkts64octets_hi; + u32 tx_stat_etherstatspkts64octets_lo; + /* frames_transmitted_65_127_bytes */ + u32 tx_stat_etherstatspkts65octetsto127octets_hi; + u32 tx_stat_etherstatspkts65octetsto127octets_lo; + /* frames_transmitted_128_255_bytes */ + u32 tx_stat_etherstatspkts128octetsto255octets_hi; + u32 tx_stat_etherstatspkts128octetsto255octets_lo; + /* frames_transmitted_256_511_bytes */ + u32 tx_stat_etherstatspkts256octetsto511octets_hi; + u32 tx_stat_etherstatspkts256octetsto511octets_lo; + /* frames_transmitted_512_1023_bytes */ + u32 tx_stat_etherstatspkts512octetsto1023octets_hi; + u32 tx_stat_etherstatspkts512octetsto1023octets_lo; + /* frames_transmitted_1024_1522_bytes */ + u32 tx_stat_etherstatspkts1024octetsto1522octets_hi; + u32 tx_stat_etherstatspkts1024octetsto1522octets_lo; + /* frames_transmitted_1523_9022_bytes */ + u32 tx_stat_etherstatspktsover1522octets_hi; + u32 tx_stat_etherstatspktsover1522octets_lo; + u32 tx_stat_mac_2047_hi; + u32 tx_stat_mac_2047_lo; + u32 tx_stat_mac_4095_hi; + u32 tx_stat_mac_4095_lo; + u32 tx_stat_mac_9216_hi; + u32 tx_stat_mac_9216_lo; + u32 tx_stat_mac_16383_hi; + u32 tx_stat_mac_16383_lo; - /* internal_mac_transmit_errors */ - u32 tx_stat_dot3statsinternalmactransmiterrors_hi; - u32 tx_stat_dot3statsinternalmactransmiterrors_lo; + /* internal_mac_transmit_errors */ + u32 tx_stat_dot3statsinternalmactransmiterrors_hi; + u32 tx_stat_dot3statsinternalmactransmiterrors_lo; - /* if_out_discards */ - u32 tx_stat_bmac_ufl_hi; - u32 tx_stat_bmac_ufl_lo; + /* if_out_discards */ + u32 tx_stat_mac_ufl_hi; + u32 tx_stat_mac_ufl_lo; }; -#define MAC_STX_IDX_MAX 2 +#define MAC_STX_IDX_MAX 2 struct host_port_stats { - u32 host_port_stats_start; + u32 host_port_stats_counter; - struct mac_stx mac_stx[MAC_STX_IDX_MAX]; + struct mac_stx mac_stx[MAC_STX_IDX_MAX]; - u32 brb_drop_hi; - u32 brb_drop_lo; + u32 brb_drop_hi; + u32 brb_drop_lo; - u32 host_port_stats_end; + u32 not_used; /* obsolete */ + u32 pfc_frames_tx_hi; + u32 pfc_frames_tx_lo; + u32 pfc_frames_rx_hi; + u32 pfc_frames_rx_lo; }; struct host_func_stats { - u32 host_func_stats_start; + u32 host_func_stats_start; - u32 total_bytes_received_hi; - u32 total_bytes_received_lo; + u32 total_bytes_received_hi; + u32 total_bytes_received_lo; - u32 total_bytes_transmitted_hi; - u32 total_bytes_transmitted_lo; + u32 total_bytes_transmitted_hi; + u32 total_bytes_transmitted_lo; - u32 total_unicast_packets_received_hi; - u32 total_unicast_packets_received_lo; + u32 total_unicast_packets_received_hi; + u32 total_unicast_packets_received_lo; - u32 total_multicast_packets_received_hi; - u32 total_multicast_packets_received_lo; + u32 total_multicast_packets_received_hi; + u32 total_multicast_packets_received_lo; - u32 total_broadcast_packets_received_hi; - u32 total_broadcast_packets_received_lo; + u32 total_broadcast_packets_received_hi; + u32 total_broadcast_packets_received_lo; - u32 total_unicast_packets_transmitted_hi; - u32 total_unicast_packets_transmitted_lo; + u32 total_unicast_packets_transmitted_hi; + u32 total_unicast_packets_transmitted_lo; - u32 total_multicast_packets_transmitted_hi; - u32 total_multicast_packets_transmitted_lo; + u32 total_multicast_packets_transmitted_hi; + u32 total_multicast_packets_transmitted_lo; - u32 total_broadcast_packets_transmitted_hi; - u32 total_broadcast_packets_transmitted_lo; + u32 total_broadcast_packets_transmitted_hi; + u32 total_broadcast_packets_transmitted_lo; - u32 valid_bytes_received_hi; - u32 valid_bytes_received_lo; + u32 valid_bytes_received_hi; + u32 valid_bytes_received_lo; - u32 host_func_stats_end; + u32 host_func_stats_end; +}; + +/* VIC definitions */ +#define VICSTATST_UIF_INDEX 2 + +/* + * stats collected for afex. + * NOTE: structure is exactly as expected to be received by the switch. + * order must remain exactly as is unless protocol changes ! + */ +struct afex_stats { + u32 tx_unicast_frames_hi; + u32 tx_unicast_frames_lo; + u32 tx_unicast_bytes_hi; + u32 tx_unicast_bytes_lo; + u32 tx_multicast_frames_hi; + u32 tx_multicast_frames_lo; + u32 tx_multicast_bytes_hi; + u32 tx_multicast_bytes_lo; + u32 tx_broadcast_frames_hi; + u32 tx_broadcast_frames_lo; + u32 tx_broadcast_bytes_hi; + u32 tx_broadcast_bytes_lo; + u32 tx_frames_discarded_hi; + u32 tx_frames_discarded_lo; + u32 tx_frames_dropped_hi; + u32 tx_frames_dropped_lo; + + u32 rx_unicast_frames_hi; + u32 rx_unicast_frames_lo; + u32 rx_unicast_bytes_hi; + u32 rx_unicast_bytes_lo; + u32 rx_multicast_frames_hi; + u32 rx_multicast_frames_lo; + u32 rx_multicast_bytes_hi; + u32 rx_multicast_bytes_lo; + u32 rx_broadcast_frames_hi; + u32 rx_broadcast_frames_lo; + u32 rx_broadcast_bytes_hi; + u32 rx_broadcast_bytes_lo; + u32 rx_frames_discarded_hi; + u32 rx_frames_discarded_lo; + u32 rx_frames_dropped_hi; + u32 rx_frames_dropped_lo; +}; + +/* To maintain backward compatibility between FW and drivers, new elements */ +/* should be added to the end of the structure. */ + +/* Per Port Statistics */ +struct port_info { + u32 size; /* size of this structure (i.e. sizeof(port_info)) */ + u32 enabled; /* 0 =Disabled, 1= Enabled */ + u32 link_speed; /* multiplier of 100Mb */ + u32 wol_support; /* WoL Support (i.e. Non-Zero if WOL supported ) */ + u32 flow_control; /* 802.3X Flow Ctrl. 0=off 1=RX 2=TX 3=RX&TX.*/ + u32 flex10; /* Flex10 mode enabled. non zero = yes */ + u32 rx_drops; /* RX Discards. Counters roll over, never reset */ + u32 rx_errors; /* RX Errors. Physical Port Stats L95, All PFs and NC-SI. + This is flagged by Consumer as an error. */ + u32 rx_uncast_lo; /* RX Unicast Packets. Free running counters: */ + u32 rx_uncast_hi; /* RX Unicast Packets. Free running counters: */ + u32 rx_mcast_lo; /* RX Multicast Packets */ + u32 rx_mcast_hi; /* RX Multicast Packets */ + u32 rx_bcast_lo; /* RX Broadcast Packets */ + u32 rx_bcast_hi; /* RX Broadcast Packets */ + u32 tx_uncast_lo; /* TX Unicast Packets */ + u32 tx_uncast_hi; /* TX Unicast Packets */ + u32 tx_mcast_lo; /* TX Multicast Packets */ + u32 tx_mcast_hi; /* TX Multicast Packets */ + u32 tx_bcast_lo; /* TX Broadcast Packets */ + u32 tx_bcast_hi; /* TX Broadcast Packets */ + u32 tx_errors; /* TX Errors */ + u32 tx_discards; /* TX Discards */ + u32 rx_frames_lo; /* RX Frames received */ + u32 rx_frames_hi; /* RX Frames received */ + u32 rx_bytes_lo; /* RX Bytes received */ + u32 rx_bytes_hi; /* RX Bytes received */ + u32 tx_frames_lo; /* TX Frames sent */ + u32 tx_frames_hi; /* TX Frames sent */ + u32 tx_bytes_lo; /* TX Bytes sent */ + u32 tx_bytes_hi; /* TX Bytes sent */ + u32 link_status; /* Port P Link Status. 1:0 bit for port enabled. + 1:1 bit for link good, + 2:1 Set if link changed between last poll. */ + u32 tx_pfc_frames_lo; /* PFC Frames sent. */ + u32 tx_pfc_frames_hi; /* PFC Frames sent. */ + u32 rx_pfc_frames_lo; /* PFC Frames Received. */ + u32 rx_pfc_frames_hi; /* PFC Frames Received. */ }; -#define BCM_5710_FW_MAJOR_VERSION 6 -#define BCM_5710_FW_MINOR_VERSION 1 -#define BCM_5710_FW_REVISION_VERSION 38 -#define BCM_5710_FW_ENGINEERING_VERSION 0 +#define BCM_5710_FW_MAJOR_VERSION 7 +#define BCM_5710_FW_MINOR_VERSION 2 +#define BCM_5710_FW_REVISION_VERSION 53 +#define BCM_5710_FW_ENGINEERING_VERSION 0 #define BCM_5710_FW_COMPILE_FLAGS 1 /* - * common data for all protocols - */ -struct doorbell_hdr { - u8 header; -#define DOORBELL_HDR_RX (0x1<<0) -#define DOORBELL_HDR_RX_SHIFT 0 -#define DOORBELL_HDR_DB_TYPE (0x1<<1) -#define DOORBELL_HDR_DB_TYPE_SHIFT 1 -#define DOORBELL_HDR_DPM_SIZE (0x3<<2) -#define DOORBELL_HDR_DPM_SIZE_SHIFT 2 -#define DOORBELL_HDR_CONN_TYPE (0xF<<4) -#define DOORBELL_HDR_CONN_TYPE_SHIFT 4 -}; - -/* - * doorbell message sent to the chip - */ -struct doorbell { -#if defined(__BIG_ENDIAN) - u16 zero_fill2; - u8 zero_fill1; - struct doorbell_hdr header; -#elif defined(__LITTLE_ENDIAN) - struct doorbell_hdr header; - u8 zero_fill1; - u16 zero_fill2; -#endif -}; - - -/* - * doorbell message sent to the chip - */ -struct doorbell_set_prod { -#if defined(__BIG_ENDIAN) - u16 prod; - u8 zero_fill1; - struct doorbell_hdr header; -#elif defined(__LITTLE_ENDIAN) - struct doorbell_hdr header; - u8 zero_fill1; - u16 prod; -#endif -}; - - -struct regpair { - __le32 lo; - __le32 hi; -}; - - -/* - * attention bits + * attention bits $$KEEP_ENDIANNESS$$ */ struct atten_sp_status_block { __le32 attn_bits; @@ -2191,115 +3023,21 @@ struct dmae_command { }; -struct double_regpair { - u32 regpair0_lo; - u32 regpair0_hi; - u32 regpair1_lo; - u32 regpair1_hi; -}; - - /* - * The eth storm context of Ustorm + * common data for all protocols */ -struct ustorm_eth_st_context { - u32 reserved0[48]; +struct doorbell_hdr { + u8 header; +#define DOORBELL_HDR_RX (0x1<<0) +#define DOORBELL_HDR_RX_SHIFT 0 +#define DOORBELL_HDR_DB_TYPE (0x1<<1) +#define DOORBELL_HDR_DB_TYPE_SHIFT 1 +#define DOORBELL_HDR_DPM_SIZE (0x3<<2) +#define DOORBELL_HDR_DPM_SIZE_SHIFT 2 +#define DOORBELL_HDR_CONN_TYPE (0xF<<4) +#define DOORBELL_HDR_CONN_TYPE_SHIFT 4 }; -/* - * The eth storm context of Tstorm - */ -struct tstorm_eth_st_context { - u32 __reserved0[28]; -}; - -/* - * The eth aggregative context of Xstorm - */ -struct xstorm_eth_ag_context { - u32 reserved0; -#if defined(__BIG_ENDIAN) - u8 cdu_reserved; - u8 reserved2; - u16 reserved1; -#elif defined(__LITTLE_ENDIAN) - u16 reserved1; - u8 reserved2; - u8 cdu_reserved; -#endif - u32 reserved3[30]; -}; - -/* - * The eth aggregative context of Tstorm - */ -struct tstorm_eth_ag_context { - u32 __reserved0[14]; -}; - -/* - * The eth aggregative context of Ustorm - */ -struct ustorm_eth_ag_context { - u32 __reserved0; -#if defined(__BIG_ENDIAN) - u8 cdu_usage; - u8 __reserved2; - u16 __reserved1; -#elif defined(__LITTLE_ENDIAN) - u16 __reserved1; - u8 __reserved2; - u8 cdu_usage; -#endif - u32 __reserved3[6]; -}; - -/* - * Timers connection context - */ -struct timers_block_context { - u32 __reserved_0; - u32 __reserved_1; - u32 __reserved_2; - u32 flags; -#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS (0x3<<0) -#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS_SHIFT 0 -#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG (0x1<<2) -#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG_SHIFT 2 -#define __TIMERS_BLOCK_CONTEXT_RESERVED0 (0x1FFFFFFF<<3) -#define __TIMERS_BLOCK_CONTEXT_RESERVED0_SHIFT 3 -}; - -/* - * The eth storm context of Xstorm - */ -struct xstorm_eth_st_context { - u32 reserved0[60]; -}; - -/* - * The eth storm context of Cstorm - */ -struct cstorm_eth_st_context { - u32 __reserved0[4]; -}; - -/* - * Ethernet connection context - */ -struct eth_context { - struct ustorm_eth_st_context ustorm_st_context; - struct tstorm_eth_st_context tstorm_st_context; - struct xstorm_eth_ag_context xstorm_ag_context; - struct tstorm_eth_ag_context tstorm_ag_context; - struct cstorm_eth_ag_context cstorm_ag_context; - struct ustorm_eth_ag_context ustorm_ag_context; - struct timers_block_context timers_context; - struct xstorm_eth_st_context xstorm_st_context; - struct cstorm_eth_st_context cstorm_st_context; -}; - - /* * Ethernet doorbell */ @@ -2329,12 +3067,12 @@ struct eth_tx_doorbell { /* - * 3 lines. status block + * 3 lines. status block $$KEEP_ENDIANNESS$$ */ struct hc_status_block_e1x { __le16 index_values[HC_SB_MAX_INDICES_E1X]; __le16 running_index[HC_SB_MAX_SM]; - u32 rsrv; + __le32 rsrv[11]; }; /* @@ -2346,12 +3084,12 @@ struct host_hc_status_block_e1x { /* - * 3 lines. status block + * 3 lines. status block $$KEEP_ENDIANNESS$$ */ struct hc_status_block_e2 { __le16 index_values[HC_SB_MAX_INDICES_E2]; __le16 running_index[HC_SB_MAX_SM]; - u32 reserved; + __le32 reserved[11]; }; /* @@ -2363,7 +3101,7 @@ struct host_hc_status_block_e2 { /* - * 5 lines. slow-path status block + * 5 lines. slow-path status block $$KEEP_ENDIANNESS$$ */ struct hc_sp_status_block { __le16 index_values[HC_SP_SB_MAX_INDICES]; @@ -2471,6 +3209,15 @@ union igu_consprod_reg { }; +/* + * Igu control commands + */ +enum igu_ctrl_cmd { + IGU_CTRL_CMD_TYPE_RD, + IGU_CTRL_CMD_TYPE_WR, + MAX_IGU_CTRL_CMD}; + + /* * Control register for the IGU command register */ @@ -2489,6 +3236,27 @@ struct igu_ctrl_reg { }; +/* + * Igu interrupt command + */ +enum igu_int_cmd { + IGU_INT_ENABLE, + IGU_INT_DISABLE, + IGU_INT_NOP, + IGU_INT_NOP2, + MAX_IGU_INT_CMD}; + + +/* + * Igu segments + */ +enum igu_seg_access { + IGU_SEG_ACCESS_NORM, + IGU_SEG_ACCESS_DEF, + IGU_SEG_ACCESS_ATTN, + MAX_IGU_SEG_ACCESS}; + + /* * Parser parsing flags field */ @@ -2523,6 +3291,45 @@ struct parsing_flags { }; +/* + * Parsing flags for TCP ACK type + */ +enum prs_flags_ack_type { + PRS_FLAG_PUREACK_PIGGY, + PRS_FLAG_PUREACK_PURE, + MAX_PRS_FLAGS_ACK_TYPE}; + + +/* + * Parsing flags for Ethernet address type + */ +enum prs_flags_eth_addr_type { + PRS_FLAG_ETHTYPE_NON_UNICAST, + PRS_FLAG_ETHTYPE_UNICAST, + MAX_PRS_FLAGS_ETH_ADDR_TYPE}; + + +/* + * Parsing flags for over-ethernet protocol + */ +enum prs_flags_over_eth { + PRS_FLAG_OVERETH_UNKNOWN, + PRS_FLAG_OVERETH_IPV4, + PRS_FLAG_OVERETH_IPV6, + PRS_FLAG_OVERETH_LLCSNAP_UNKNOWN, + MAX_PRS_FLAGS_OVER_ETH}; + + +/* + * Parsing flags for over-IP protocol + */ +enum prs_flags_over_ip { + PRS_FLAG_OVERIP_UNKNOWN, + PRS_FLAG_OVERIP_TCP, + PRS_FLAG_OVERIP_UDP, + MAX_PRS_FLAGS_OVER_IP}; + + /* * SDM operation gen command (generate aggregative interrupt) */ @@ -2542,27 +3349,125 @@ struct sdm_op_gen { /* - * client init fc data + * Timers connection context */ -struct client_init_fc_data { - __le16 cqe_pause_thr_low; - __le16 cqe_pause_thr_high; - __le16 bd_pause_thr_low; - __le16 bd_pause_thr_high; - __le16 sge_pause_thr_low; - __le16 sge_pause_thr_high; - __le16 rx_cos_mask; - u8 safc_group_num; - u8 safc_group_en_flg; - u8 traffic_type; - u8 reserved0; - __le16 reserved1; - __le32 reserved2; +struct timers_block_context { + u32 __reserved_0; + u32 __reserved_1; + u32 __reserved_2; + u32 flags; +#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS (0x3<<0) +#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS_SHIFT 0 +#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG (0x1<<2) +#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG_SHIFT 2 +#define __TIMERS_BLOCK_CONTEXT_RESERVED0 (0x1FFFFFFF<<3) +#define __TIMERS_BLOCK_CONTEXT_RESERVED0_SHIFT 3 }; /* - * client init ramrod data + * The eth aggregative context of Tstorm + */ +struct tstorm_eth_ag_context { + u32 __reserved0[14]; +}; + + +/* + * The eth aggregative context of Ustorm + */ +struct ustorm_eth_ag_context { + u32 __reserved0; +#if defined(__BIG_ENDIAN) + u8 cdu_usage; + u8 __reserved2; + u16 __reserved1; +#elif defined(__LITTLE_ENDIAN) + u16 __reserved1; + u8 __reserved2; + u8 cdu_usage; +#endif + u32 __reserved3[6]; +}; + + +/* + * The eth aggregative context of Xstorm + */ +struct xstorm_eth_ag_context { + u32 reserved0; +#if defined(__BIG_ENDIAN) + u8 cdu_reserved; + u8 reserved2; + u16 reserved1; +#elif defined(__LITTLE_ENDIAN) + u16 reserved1; + u8 reserved2; + u8 cdu_reserved; +#endif + u32 reserved3[30]; +}; + + +/* + * doorbell message sent to the chip + */ +struct doorbell { +#if defined(__BIG_ENDIAN) + u16 zero_fill2; + u8 zero_fill1; + struct doorbell_hdr header; +#elif defined(__LITTLE_ENDIAN) + struct doorbell_hdr header; + u8 zero_fill1; + u16 zero_fill2; +#endif +}; + + +/* + * doorbell message sent to the chip + */ +struct doorbell_set_prod { +#if defined(__BIG_ENDIAN) + u16 prod; + u8 zero_fill1; + struct doorbell_hdr header; +#elif defined(__LITTLE_ENDIAN) + struct doorbell_hdr header; + u8 zero_fill1; + u16 prod; +#endif +}; + + +struct regpair { + __le32 lo; + __le32 hi; +}; + + +/* + * Classify rule opcodes in E2/E3 + */ +enum classify_rule { + CLASSIFY_RULE_OPCODE_MAC, + CLASSIFY_RULE_OPCODE_VLAN, + CLASSIFY_RULE_OPCODE_PAIR, + MAX_CLASSIFY_RULE}; + + +/* + * Classify rule types in E2/E3 + */ +enum classify_rule_action_type { + CLASSIFY_RULE_REMOVE, + CLASSIFY_RULE_ADD, + MAX_CLASSIFY_RULE_ACTION_TYPE}; + + +/* + * client init ramrod data $$KEEP_ENDIANNESS$$ */ struct client_init_general_data { u8 client_id; @@ -2572,18 +3477,27 @@ struct client_init_general_data { u8 activate_flg; u8 sp_client_id; __le16 mtu; - __le16 default_vlan; - u8 default_vlan_flg; u8 statistics_zero_flg; - __le32 reserved1; + u8 func_id; + u8 cos; + u8 traffic_type; + u32 reserved0; }; /* - * client init rx data + * client init rx data $$KEEP_ENDIANNESS$$ */ struct client_init_rx_data { - u8 tpa_en_flg; + u8 tpa_en; +#define CLIENT_INIT_RX_DATA_TPA_EN_IPV4 (0x1<<0) +#define CLIENT_INIT_RX_DATA_TPA_EN_IPV4_SHIFT 0 +#define CLIENT_INIT_RX_DATA_TPA_EN_IPV6 (0x1<<1) +#define CLIENT_INIT_RX_DATA_TPA_EN_IPV6_SHIFT 1 +#define CLIENT_INIT_RX_DATA_TPA_MODE (0x1<<2) +#define CLIENT_INIT_RX_DATA_TPA_MODE_SHIFT 2 +#define CLIENT_INIT_RX_DATA_RESERVED5 (0x1F<<3) +#define CLIENT_INIT_RX_DATA_RESERVED5_SHIFT 3 u8 vmqueue_mode_en_flg; u8 extra_data_over_sgl_en_flg; u8 cache_line_alignment_log_size; @@ -2598,12 +3512,13 @@ struct client_init_rx_data { u8 outer_vlan_removal_enable_flg; u8 status_block_id; u8 rx_sb_index_number; - u8 rss_mode; + u8 dont_verify_rings_pause_thr_flg; u8 max_tpa_queues; - u8 reserved0; + u8 silent_vlan_removal_flg; __le16 max_bytes_on_bd; __le16 sge_buff_size; - __le16 reserved1; + u8 approx_mcast_engine_id; + u8 rss_engine_id; struct regpair bd_page_base; struct regpair sge_page_base; struct regpair cqe_page_base; @@ -2627,12 +3542,20 @@ struct client_init_rx_data { #define CLIENT_INIT_RX_DATA_ACCEPT_ANY_VLAN_SHIFT 6 #define CLIENT_INIT_RX_DATA_RESERVED2 (0x1FF<<7) #define CLIENT_INIT_RX_DATA_RESERVED2_SHIFT 7 - __le16 reserved3; - __le32 reserved4[2]; + __le16 cqe_pause_thr_low; + __le16 cqe_pause_thr_high; + __le16 bd_pause_thr_low; + __le16 bd_pause_thr_high; + __le16 sge_pause_thr_low; + __le16 sge_pause_thr_high; + __le16 rx_cos_mask; + __le16 silent_vlan_value; + __le16 silent_vlan_mask; + __le32 reserved6[2]; }; /* - * client init tx data + * client init tx data $$KEEP_ENDIANNESS$$ */ struct client_init_tx_data { u8 enforce_security_flg; @@ -2641,7 +3564,7 @@ struct client_init_tx_data { u8 tss_leading_client_id; u8 tx_switching_flg; u8 anti_spoofing_flg; - __le16 reserved0; + __le16 default_vlan; struct regpair tx_bd_page_base; __le16 state; #define CLIENT_INIT_TX_DATA_UCAST_ACCEPT_ALL (0x1<<0) @@ -2654,27 +3577,27 @@ struct client_init_tx_data { #define CLIENT_INIT_TX_DATA_ACCEPT_ANY_VLAN_SHIFT 3 #define CLIENT_INIT_TX_DATA_RESERVED1 (0xFFF<<4) #define CLIENT_INIT_TX_DATA_RESERVED1_SHIFT 4 - __le16 reserved2; + u8 default_vlan_flg; + u8 force_default_pri_flg; __le32 reserved3; }; /* - * client init ramrod data + * client init ramrod data $$KEEP_ENDIANNESS$$ */ struct client_init_ramrod_data { struct client_init_general_data general; struct client_init_rx_data rx; struct client_init_tx_data tx; - struct client_init_fc_data fc; }; /* - * client update ramrod data + * client update ramrod data $$KEEP_ENDIANNESS$$ */ struct client_update_ramrod_data { u8 client_id; - u8 reserved0; + u8 func_id; u8 inner_vlan_removal_enable_flg; u8 inner_vlan_removal_change_flg; u8 outer_vlan_removal_enable_flg; @@ -2686,24 +3609,54 @@ struct client_update_ramrod_data { __le16 default_vlan; u8 default_vlan_enable_flg; u8 default_vlan_change_flg; - __le16 reserved1; - __le32 reserved2[2]; + __le16 silent_vlan_value; + __le16 silent_vlan_mask; + u8 silent_vlan_removal_flg; + u8 silent_vlan_change_flg; + __le32 echo; }; /* - * + * The eth storm context of Cstorm + */ +struct cstorm_eth_st_context { + u32 __reserved0[4]; +}; + + +struct double_regpair { + u32 regpair0_lo; + u32 regpair0_hi; + u32 regpair1_lo; + u32 regpair1_hi; +}; + + +/* + * Ethernet address typesm used in ethernet tx BDs + */ +enum eth_addr_type { + UNKNOWN_ADDRESS, + UNICAST_ADDRESS, + MULTICAST_ADDRESS, + BROADCAST_ADDRESS, + MAX_ETH_ADDR_TYPE}; + + +/* + * $$KEEP_ENDIANNESS$$ */ struct eth_classify_cmd_header { u8 cmd_general_data; -#define ETH_CLASSIFY_CMD_HEADER_OPCODE (0x3<<0) -#define ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT 0 -#define ETH_CLASSIFY_CMD_HEADER_IS_ADD (0x1<<2) -#define ETH_CLASSIFY_CMD_HEADER_IS_ADD_SHIFT 2 -#define ETH_CLASSIFY_CMD_HEADER_RX_CMD (0x1<<3) -#define ETH_CLASSIFY_CMD_HEADER_RX_CMD_SHIFT 3 -#define ETH_CLASSIFY_CMD_HEADER_TX_CMD (0x1<<4) -#define ETH_CLASSIFY_CMD_HEADER_TX_CMD_SHIFT 4 +#define ETH_CLASSIFY_CMD_HEADER_RX_CMD (0x1<<0) +#define ETH_CLASSIFY_CMD_HEADER_RX_CMD_SHIFT 0 +#define ETH_CLASSIFY_CMD_HEADER_TX_CMD (0x1<<1) +#define ETH_CLASSIFY_CMD_HEADER_TX_CMD_SHIFT 1 +#define ETH_CLASSIFY_CMD_HEADER_OPCODE (0x3<<2) +#define ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT 2 +#define ETH_CLASSIFY_CMD_HEADER_IS_ADD (0x1<<4) +#define ETH_CLASSIFY_CMD_HEADER_IS_ADD_SHIFT 4 #define ETH_CLASSIFY_CMD_HEADER_RESERVED0 (0x7<<5) #define ETH_CLASSIFY_CMD_HEADER_RESERVED0_SHIFT 5 u8 func_id; @@ -2713,55 +3666,55 @@ struct eth_classify_cmd_header { /* - * header for eth classification config ramrod + * header for eth classification config ramrod $$KEEP_ENDIANNESS$$ */ struct eth_classify_header { u8 rule_cnt; u8 reserved0; - u16 reserved1; - u32 echo; + __le16 reserved1; + __le32 echo; }; /* - * Command for adding/removing a MAC classification rule + * Command for adding/removing a MAC classification rule $$KEEP_ENDIANNESS$$ */ struct eth_classify_mac_cmd { struct eth_classify_cmd_header header; - u32 reserved0; - u16 mac_lsb; - u16 mac_mid; - u16 mac_msb; - u16 reserved1; + __le32 reserved0; + __le16 mac_lsb; + __le16 mac_mid; + __le16 mac_msb; + __le16 reserved1; }; /* - * Command for adding/removing a MAC-VLAN pair classification rule + * Command for adding/removing a MAC-VLAN pair classification rule $$KEEP_ENDIANNESS$$ */ struct eth_classify_pair_cmd { struct eth_classify_cmd_header header; - u32 reserved0; - u16 mac_lsb; - u16 mac_mid; - u16 mac_msb; - u16 vlan; + __le32 reserved0; + __le16 mac_lsb; + __le16 mac_mid; + __le16 mac_msb; + __le16 vlan; }; /* - * Command for adding/removing a VLAN classification rule + * Command for adding/removing a VLAN classification rule $$KEEP_ENDIANNESS$$ */ struct eth_classify_vlan_cmd { struct eth_classify_cmd_header header; - u32 reserved0; - u32 reserved1; - u16 reserved2; - u16 vlan; + __le32 reserved0; + __le32 reserved1; + __le16 reserved2; + __le16 vlan; }; /* - * union for eth classification rule + * union for eth classification rule $$KEEP_ENDIANNESS$$ */ union eth_classify_rule_cmd { struct eth_classify_mac_cmd mac; @@ -2770,20 +3723,57 @@ union eth_classify_rule_cmd { }; /* - * parameters for eth classification configuration ramrod + * parameters for eth classification configuration ramrod $$KEEP_ENDIANNESS$$ */ struct eth_classify_rules_ramrod_data { struct eth_classify_header header; - union eth_classify_rule_cmd rules[16]; + union eth_classify_rule_cmd rules[CLASSIFY_RULES_COUNT]; }; /* - * The data contain client ID need to the ramrod + * The data contain client ID need to the ramrod $$KEEP_ENDIANNESS$$ */ struct eth_common_ramrod_data { - u32 client_id; - u32 reserved1; + __le32 client_id; + __le32 reserved1; +}; + + +/* + * The eth storm context of Ustorm + */ +struct ustorm_eth_st_context { + u32 reserved0[52]; +}; + +/* + * The eth storm context of Tstorm + */ +struct tstorm_eth_st_context { + u32 __reserved0[28]; +}; + +/* + * The eth storm context of Xstorm + */ +struct xstorm_eth_st_context { + u32 reserved0[60]; +}; + +/* + * Ethernet connection context + */ +struct eth_context { + struct ustorm_eth_st_context ustorm_st_context; + struct tstorm_eth_st_context tstorm_st_context; + struct xstorm_eth_ag_context xstorm_ag_context; + struct tstorm_eth_ag_context tstorm_ag_context; + struct cstorm_eth_ag_context cstorm_ag_context; + struct ustorm_eth_ag_context ustorm_ag_context; + struct timers_block_context timers_context; + struct xstorm_eth_st_context xstorm_st_context; + struct cstorm_eth_st_context cstorm_st_context; }; @@ -2796,24 +3786,47 @@ union eth_sgl_or_raw_data { }; /* - * regular eth FP CQE parameters struct + * eth FP end aggregation CQE parameters struct $$KEEP_ENDIANNESS$$ + */ +struct eth_end_agg_rx_cqe { + u8 type_error_flags; +#define ETH_END_AGG_RX_CQE_TYPE (0x3<<0) +#define ETH_END_AGG_RX_CQE_TYPE_SHIFT 0 +#define ETH_END_AGG_RX_CQE_SGL_RAW_SEL (0x1<<2) +#define ETH_END_AGG_RX_CQE_SGL_RAW_SEL_SHIFT 2 +#define ETH_END_AGG_RX_CQE_RESERVED0 (0x1F<<3) +#define ETH_END_AGG_RX_CQE_RESERVED0_SHIFT 3 + u8 reserved1; + u8 queue_index; + u8 reserved2; + __le32 timestamp_delta; + __le16 num_of_coalesced_segs; + __le16 pkt_len; + u8 pure_ack_count; + u8 reserved3; + __le16 reserved4; + union eth_sgl_or_raw_data sgl_or_raw_data; + __le32 reserved5[8]; +}; + + +/* + * regular eth FP CQE parameters struct $$KEEP_ENDIANNESS$$ */ struct eth_fast_path_rx_cqe { u8 type_error_flags; -#define ETH_FAST_PATH_RX_CQE_TYPE (0x1<<0) +#define ETH_FAST_PATH_RX_CQE_TYPE (0x3<<0) #define ETH_FAST_PATH_RX_CQE_TYPE_SHIFT 0 -#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG (0x1<<1) -#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT 1 -#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG (0x1<<2) -#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT 2 -#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG (0x1<<3) -#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT 3 -#define ETH_FAST_PATH_RX_CQE_START_FLG (0x1<<4) -#define ETH_FAST_PATH_RX_CQE_START_FLG_SHIFT 4 -#define ETH_FAST_PATH_RX_CQE_END_FLG (0x1<<5) -#define ETH_FAST_PATH_RX_CQE_END_FLG_SHIFT 5 -#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL (0x3<<6) -#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL_SHIFT 6 +#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL (0x1<<2) +#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL_SHIFT 2 +#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG (0x1<<3) +#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT 3 +#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG (0x1<<4) +#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT 4 +#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG (0x1<<5) +#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT 5 +#define ETH_FAST_PATH_RX_CQE_RESERVED0 (0x3<<6) +#define ETH_FAST_PATH_RX_CQE_RESERVED0_SHIFT 6 u8 status_flags; #define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE (0x7<<0) #define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE_SHIFT 0 @@ -2827,19 +3840,20 @@ struct eth_fast_path_rx_cqe { #define ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG_SHIFT 6 #define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG (0x1<<7) #define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG_SHIFT 7 - u8 placement_offset; u8 queue_index; + u8 placement_offset; __le32 rss_hash_result; __le16 vlan_tag; - __le16 pkt_len; + __le16 pkt_len_or_gro_seg_len; __le16 len_on_bd; struct parsing_flags pars_flags; union eth_sgl_or_raw_data sgl_or_raw_data; + __le32 reserved1[8]; }; /* - * Command for setting classification flags for a client + * Command for setting classification flags for a client $$KEEP_ENDIANNESS$$ */ struct eth_filter_rules_cmd { u8 cmd_general_data; @@ -2852,7 +3866,7 @@ struct eth_filter_rules_cmd { u8 func_id; u8 client_id; u8 reserved1; - u16 state; + __le16 state; #define ETH_FILTER_RULES_CMD_UCAST_DROP_ALL (0x1<<0) #define ETH_FILTER_RULES_CMD_UCAST_DROP_ALL_SHIFT 0 #define ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL (0x1<<1) @@ -2869,54 +3883,65 @@ struct eth_filter_rules_cmd { #define ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN_SHIFT 6 #define ETH_FILTER_RULES_CMD_RESERVED2 (0x1FF<<7) #define ETH_FILTER_RULES_CMD_RESERVED2_SHIFT 7 - u16 reserved3; + __le16 reserved3; + struct regpair reserved4; }; /* - * parameters for eth classification filters ramrod + * parameters for eth classification filters ramrod $$KEEP_ENDIANNESS$$ */ struct eth_filter_rules_ramrod_data { struct eth_classify_header header; - struct eth_filter_rules_cmd rules[16]; + struct eth_filter_rules_cmd rules[FILTER_RULES_COUNT]; }; /* - * The data for RSS setup ramrod + * parameters for eth classification configuration ramrod $$KEEP_ENDIANNESS$$ + */ +struct eth_general_rules_ramrod_data { + struct eth_classify_header header; + union eth_classify_rule_cmd rules[CLASSIFY_RULES_COUNT]; +}; + + +/* + * The data for Halt ramrod */ struct eth_halt_ramrod_data { - u32 client_id; - u32 reserved0; + __le32 client_id; + __le32 reserved0; }; /* - * Command for setting multicast classification for a client + * Command for setting multicast classification for a client $$KEEP_ENDIANNESS$$ */ struct eth_multicast_rules_cmd { u8 cmd_general_data; -#define ETH_MULTICAST_RULES_CMD_IS_ADD (0x1<<0) -#define ETH_MULTICAST_RULES_CMD_IS_ADD_SHIFT 0 -#define ETH_MULTICAST_RULES_CMD_RX_CMD (0x1<<1) -#define ETH_MULTICAST_RULES_CMD_RX_CMD_SHIFT 1 -#define ETH_MULTICAST_RULES_CMD_TX_CMD (0x1<<2) -#define ETH_MULTICAST_RULES_CMD_TX_CMD_SHIFT 2 +#define ETH_MULTICAST_RULES_CMD_RX_CMD (0x1<<0) +#define ETH_MULTICAST_RULES_CMD_RX_CMD_SHIFT 0 +#define ETH_MULTICAST_RULES_CMD_TX_CMD (0x1<<1) +#define ETH_MULTICAST_RULES_CMD_TX_CMD_SHIFT 1 +#define ETH_MULTICAST_RULES_CMD_IS_ADD (0x1<<2) +#define ETH_MULTICAST_RULES_CMD_IS_ADD_SHIFT 2 #define ETH_MULTICAST_RULES_CMD_RESERVED0 (0x1F<<3) #define ETH_MULTICAST_RULES_CMD_RESERVED0_SHIFT 3 u8 func_id; u8 bin_id; - u8 reserved1; - u32 reserved2; + u8 engine_id; + __le32 reserved2; + struct regpair reserved3; }; /* - * parameters for multicast classification ramrod + * parameters for multicast classification ramrod $$KEEP_ENDIANNESS$$ */ struct eth_multicast_rules_ramrod_data { struct eth_classify_header header; - struct eth_multicast_rules_cmd rules[16]; + struct eth_multicast_rules_cmd rules[MULTICAST_RULES_COUNT]; }; @@ -2937,77 +3962,61 @@ union eth_ramrod_data { /* - * Common configuration parameters per function in Tstorm + * RSS toeplitz hash type, as reported in CQE */ -struct tstorm_eth_function_common_config { - u16 config_flags; -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY (0x1<<0) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY_SHIFT 0 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY (0x1<<1) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY_SHIFT 1 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY (0x1<<2) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY_SHIFT 2 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY (0x1<<3) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY_SHIFT 3 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE (0x7<<4) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE_SHIFT 4 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_ENABLE_TPA (0x1<<7) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_ENABLE_TPA_SHIFT 7 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE (0x1<<8) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE_SHIFT 8 -#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0 (0x7F<<9) -#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0_SHIFT 9 - u8 rss_result_mask; - u8 reserved1; - u16 vlan_id[2]; -}; - -/* - * RSS idirection table update configuration - */ -struct rss_update_config { - u16 flags; -#define RSS_UPDATE_CONFIG_ETH_UPDATE_ENABLE (0x1<<0) -#define RSS_UPDATE_CONFIG_ETH_UPDATE_ENABLE_SHIFT 0 -#define RSS_UPDATE_CONFIG_TOE_UPDATE_ENABLE (0x1<<1) -#define RSS_UPDATE_CONFIG_TOE_UPDATE_ENABLE_SHIFT 1 -#define __RSS_UPDATE_CONFIG_RESERVED0 (0x3FFF<<2) -#define __RSS_UPDATE_CONFIG_RESERVED0_SHIFT 2 - u16 toe_rss_bitmap; - u32 reserved1; -}; - -/* - * parameters for RSS update ramrod (E1x) - */ -struct eth_rss_update_ramrod_data_e1x { - struct tstorm_eth_function_common_config func_config; - u8 indirection_table[T_ETH_INDIRECTION_TABLE_SIZE]; - struct rss_update_config rss_config; -}; +enum eth_rss_hash_type { + DEFAULT_HASH_TYPE, + IPV4_HASH_TYPE, + TCP_IPV4_HASH_TYPE, + IPV6_HASH_TYPE, + TCP_IPV6_HASH_TYPE, + VLAN_PRI_HASH_TYPE, + E1HOV_PRI_HASH_TYPE, + DSCP_HASH_TYPE, + MAX_ETH_RSS_HASH_TYPE}; /* - * parameters for RSS update ramrod (E2) + * Ethernet RSS mode */ -struct eth_rss_update_ramrod_data_e2 { +enum eth_rss_mode { + ETH_RSS_MODE_DISABLED, + ETH_RSS_MODE_REGULAR, + ETH_RSS_MODE_VLAN_PRI, + ETH_RSS_MODE_E1HOV_PRI, + ETH_RSS_MODE_IP_DSCP, + MAX_ETH_RSS_MODE}; + + +/* + * parameters for RSS update ramrod (E2) $$KEEP_ENDIANNESS$$ + */ +struct eth_rss_update_ramrod_data { + u8 rss_engine_id; u8 capabilities; -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_CAPABILITY (0x1<<0) -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_CAPABILITY_SHIFT 0 -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_TCP_CAPABILITY (0x1<<1) -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_TCP_CAPABILITY_SHIFT 1 -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_CAPABILITY (0x1<<2) -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_CAPABILITY_SHIFT 2 -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_TCP_CAPABILITY (0x1<<3) -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_TCP_CAPABILITY_SHIFT 3 -#define __ETH_RSS_UPDATE_RAMROD_DATA_E2_RESERVED0 (0xF<<4) -#define __ETH_RSS_UPDATE_RAMROD_DATA_E2_RESERVED0_SHIFT 4 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY (0x1<<0) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY_SHIFT 0 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY (0x1<<1) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY_SHIFT 1 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_UDP_CAPABILITY (0x1<<2) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_UDP_CAPABILITY_SHIFT 2 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY (0x1<<3) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY_SHIFT 3 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY (0x1<<4) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY_SHIFT 4 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY (0x1<<5) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY_SHIFT 5 +#define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY (0x1<<6) +#define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY_SHIFT 6 +#define __ETH_RSS_UPDATE_RAMROD_DATA_RESERVED0 (0x1<<7) +#define __ETH_RSS_UPDATE_RAMROD_DATA_RESERVED0_SHIFT 7 u8 rss_result_mask; - u16 reserved1; - u32 __reserved2; + u8 rss_mode; + __le32 __reserved2; u8 indirection_table[T_ETH_INDIRECTION_TABLE_SIZE]; - u32 rss_key[RSS_KEYS_ARRAY_SIZE]; - struct rss_update_config rss_config; + __le32 rss_key[T_ETH_RSS_KEY]; + __le32 echo; + __le32 reserved3; }; @@ -3021,16 +4030,16 @@ struct eth_rx_bd { /* - * Eth Rx Cqe structure- general structure for ramrods + * Eth Rx Cqe structure- general structure for ramrods $$KEEP_ENDIANNESS$$ */ struct common_ramrod_eth_rx_cqe { u8 ramrod_type; -#define COMMON_RAMROD_ETH_RX_CQE_TYPE (0x1<<0) +#define COMMON_RAMROD_ETH_RX_CQE_TYPE (0x3<<0) #define COMMON_RAMROD_ETH_RX_CQE_TYPE_SHIFT 0 -#define COMMON_RAMROD_ETH_RX_CQE_ERROR (0x1<<1) -#define COMMON_RAMROD_ETH_RX_CQE_ERROR_SHIFT 1 -#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0 (0x3F<<2) -#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT 2 +#define COMMON_RAMROD_ETH_RX_CQE_ERROR (0x1<<2) +#define COMMON_RAMROD_ETH_RX_CQE_ERROR_SHIFT 2 +#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0 (0x1F<<3) +#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT 3 u8 conn_type; __le16 reserved1; __le32 conn_and_cmd_data; @@ -3039,7 +4048,8 @@ struct common_ramrod_eth_rx_cqe { #define COMMON_RAMROD_ETH_RX_CQE_CMD_ID (0xFF<<24) #define COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT 24 struct ramrod_data protocol_data; - __le32 reserved2[4]; + __le32 echo; + __le32 reserved2[11]; }; /* @@ -3048,7 +4058,7 @@ struct common_ramrod_eth_rx_cqe { struct eth_rx_cqe_next_page { __le32 addr_lo; __le32 addr_hi; - __le32 reserved[6]; + __le32 reserved[14]; }; /* @@ -3058,9 +4068,30 @@ union eth_rx_cqe { struct eth_fast_path_rx_cqe fast_path_cqe; struct common_ramrod_eth_rx_cqe ramrod_cqe; struct eth_rx_cqe_next_page next_page_cqe; + struct eth_end_agg_rx_cqe end_agg_cqe; }; +/* + * Values for RX ETH CQE type field + */ +enum eth_rx_cqe_type { + RX_ETH_CQE_TYPE_ETH_FASTPATH, + RX_ETH_CQE_TYPE_ETH_RAMROD, + RX_ETH_CQE_TYPE_ETH_START_AGG, + RX_ETH_CQE_TYPE_ETH_STOP_AGG, + MAX_ETH_RX_CQE_TYPE}; + + +/* + * Type of SGL/Raw field in ETH RX fast path CQE + */ +enum eth_rx_fp_sel { + ETH_FP_CQE_REGULAR, + ETH_FP_CQE_RAW, + MAX_ETH_RX_FP_SEL}; + + /* * The eth Rx SGE Descriptor */ @@ -3071,7 +4102,7 @@ struct eth_rx_sge { /* - * common data for all protocols + * common data for all protocols $$KEEP_ENDIANNESS$$ */ struct spe_hdr { __le32 conn_and_cmd_data; @@ -3112,7 +4143,38 @@ struct eth_spe { /* - * Tx regular BD structure + * Ethernet command ID for slow path elements + */ +enum eth_spqe_cmd_id { + RAMROD_CMD_ID_ETH_UNUSED, + RAMROD_CMD_ID_ETH_CLIENT_SETUP, + RAMROD_CMD_ID_ETH_HALT, + RAMROD_CMD_ID_ETH_FORWARD_SETUP, + RAMROD_CMD_ID_ETH_TX_QUEUE_SETUP, + RAMROD_CMD_ID_ETH_CLIENT_UPDATE, + RAMROD_CMD_ID_ETH_EMPTY, + RAMROD_CMD_ID_ETH_TERMINATE, + RAMROD_CMD_ID_ETH_TPA_UPDATE, + RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES, + RAMROD_CMD_ID_ETH_FILTER_RULES, + RAMROD_CMD_ID_ETH_MULTICAST_RULES, + RAMROD_CMD_ID_ETH_RSS_UPDATE, + RAMROD_CMD_ID_ETH_SET_MAC, + MAX_ETH_SPQE_CMD_ID}; + + +/* + * eth tpa update command + */ +enum eth_tpa_update_command { + TPA_UPDATE_NONE_COMMAND, + TPA_UPDATE_ENABLE_COMMAND, + TPA_UPDATE_DISABLE_COMMAND, + MAX_ETH_TPA_UPDATE_COMMAND}; + + +/* + * Tx regular BD structure $$KEEP_ENDIANNESS$$ */ struct eth_tx_bd { __le32 addr_lo; @@ -3145,7 +4207,7 @@ struct eth_tx_bd_flags { }; /* - * The eth Tx Buffer Descriptor + * The eth Tx Buffer Descriptor $$KEEP_ENDIANNESS$$ */ struct eth_tx_start_bd { __le32 addr_lo; @@ -3155,14 +4217,18 @@ struct eth_tx_start_bd { __le16 vlan_or_ethertype; struct eth_tx_bd_flags bd_flags; u8 general_data; -#define ETH_TX_START_BD_HDR_NBDS (0x3F<<0) +#define ETH_TX_START_BD_HDR_NBDS (0xF<<0) #define ETH_TX_START_BD_HDR_NBDS_SHIFT 0 +#define ETH_TX_START_BD_FORCE_VLAN_MODE (0x1<<4) +#define ETH_TX_START_BD_FORCE_VLAN_MODE_SHIFT 4 +#define ETH_TX_START_BD_RESREVED (0x1<<5) +#define ETH_TX_START_BD_RESREVED_SHIFT 5 #define ETH_TX_START_BD_ETH_ADDR_TYPE (0x3<<6) #define ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT 6 }; /* - * Tx parsing BD structure for ETH E1/E1h + * Tx parsing BD structure for ETH E1/E1h $$KEEP_ENDIANNESS$$ */ struct eth_tx_parse_bd_e1x { u8 global_data; @@ -3203,7 +4269,7 @@ struct eth_tx_parse_bd_e1x { }; /* - * Tx parsing BD structure for ETH E2 + * Tx parsing BD structure for ETH E2 $$KEEP_ENDIANNESS$$ */ struct eth_tx_parse_bd_e2 { __le16 dst_mac_addr_lo; @@ -3252,17 +4318,38 @@ struct eth_tx_bds_array { /* - * MAC filtering configuration command header + * VLAN mode on TX BDs + */ +enum eth_tx_vlan_type { + X_ETH_NO_VLAN, + X_ETH_OUTBAND_VLAN, + X_ETH_INBAND_VLAN, + X_ETH_FW_ADDED_VLAN, + MAX_ETH_TX_VLAN_TYPE}; + + +/* + * Ethernet VLAN filtering mode in E1x + */ +enum eth_vlan_filter_mode { + ETH_VLAN_FILTER_ANY_VLAN, + ETH_VLAN_FILTER_SPECIFIC_VLAN, + ETH_VLAN_FILTER_CLASSIFY, + MAX_ETH_VLAN_FILTER_MODE}; + + +/* + * MAC filtering configuration command header $$KEEP_ENDIANNESS$$ */ struct mac_configuration_hdr { u8 length; u8 offset; - u16 client_id; - u32 echo; + __le16 client_id; + __le32 echo; }; /* - * MAC address in list for ramrod + * MAC address in list for ramrod $$KEEP_ENDIANNESS$$ */ struct mac_configuration_entry { __le16 lsb_mac_addr; @@ -3283,8 +4370,8 @@ struct mac_configuration_entry { #define MAC_CONFIGURATION_ENTRY_BROADCAST_SHIFT 5 #define MAC_CONFIGURATION_ENTRY_RESERVED1 (0x3<<6) #define MAC_CONFIGURATION_ENTRY_RESERVED1_SHIFT 6 - u16 reserved0; - u32 clients_bit_vector; + __le16 reserved0; + __le32 clients_bit_vector; }; /* @@ -3296,6 +4383,45 @@ struct mac_configuration_cmd { }; +/* + * Set-MAC command type (in E1x) + */ +enum set_mac_action_type { + T_ETH_MAC_COMMAND_INVALIDATE, + T_ETH_MAC_COMMAND_SET, + MAX_SET_MAC_ACTION_TYPE}; + + +/* + * Ethernet TPA Modes + */ +enum tpa_mode { + TPA_LRO, + TPA_GRO, + MAX_TPA_MODE}; + + +/* + * tpa update ramrod data $$KEEP_ENDIANNESS$$ + */ +struct tpa_update_ramrod_data { + u8 update_ipv4; + u8 update_ipv6; + u8 client_id; + u8 max_tpa_queues; + u8 max_sges_for_packet; + u8 complete_on_both_clients; + u8 dont_verify_rings_pause_thr_flg; + u8 tpa_mode; + __le16 sge_buff_size; + __le16 max_agg_size; + __le32 sge_page_base_lo; + __le32 sge_page_base_hi; + __le16 sge_pause_thr_low; + __le16 sge_pause_thr_high; +}; + + /* * approximate-match multicast filtering for E1H per function in Tstorm */ @@ -3305,35 +4431,50 @@ struct tstorm_eth_approximate_match_multicast_filtering { /* - * MAC filtering configuration parameters per port in Tstorm + * Common configuration parameters per function in Tstorm $$KEEP_ENDIANNESS$$ */ -struct tstorm_eth_mac_filter_config { - u32 ucast_drop_all; - u32 ucast_accept_all; - u32 mcast_drop_all; - u32 mcast_accept_all; - u32 bcast_drop_all; - u32 bcast_accept_all; - u32 vlan_filter[2]; - u32 unmatched_unicast; - u32 reserved; +struct tstorm_eth_function_common_config { + __le16 config_flags; +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY (0x1<<0) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY_SHIFT 0 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY (0x1<<1) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY_SHIFT 1 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY (0x1<<2) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY_SHIFT 2 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY (0x1<<3) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY_SHIFT 3 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE (0x7<<4) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE_SHIFT 4 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE (0x1<<7) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE_SHIFT 7 +#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0 (0xFF<<8) +#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0_SHIFT 8 + u8 rss_result_mask; + u8 reserved1; + __le16 vlan_id[2]; }; /* - * common flag to indicate existance of TPA. + * MAC filtering configuration parameters per port in Tstorm $$KEEP_ENDIANNESS$$ */ -struct tstorm_eth_tpa_exist { -#if defined(__BIG_ENDIAN) - u16 reserved1; - u8 reserved0; - u8 tpa_exist; -#elif defined(__LITTLE_ENDIAN) - u8 tpa_exist; - u8 reserved0; - u16 reserved1; -#endif - u32 reserved2; +struct tstorm_eth_mac_filter_config { + __le32 ucast_drop_all; + __le32 ucast_accept_all; + __le32 mcast_drop_all; + __le32 mcast_accept_all; + __le32 bcast_accept_all; + __le32 vlan_filter[2]; + __le32 unmatched_unicast; +}; + + +/* + * tx only queue init ramrod data $$KEEP_ENDIANNESS$$ + */ +struct tx_queue_init_ramrod_data { + struct client_init_general_data general; + struct client_init_tx_data tx; }; @@ -3359,7 +4500,74 @@ struct ustorm_eth_rx_producers { /* - * cfc delete event data + * FCoE RX statistics parameters section#0 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section0 { + __le32 fcoe_rx_pkt_cnt; + __le32 fcoe_rx_byte_cnt; +}; + + +/* + * FCoE RX statistics parameters section#1 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section1 { + __le32 fcoe_ver_cnt; + __le32 fcoe_rx_drop_pkt_cnt; +}; + + +/* + * FCoE RX statistics parameters section#2 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section2 { + __le32 fc_crc_cnt; + __le32 eofa_del_cnt; + __le32 miss_frame_cnt; + __le32 seq_timeout_cnt; + __le32 drop_seq_cnt; + __le32 fcoe_rx_drop_pkt_cnt; + __le32 fcp_rx_pkt_cnt; + __le32 reserved0; +}; + + +/* + * FCoE TX statistics parameters $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tx_stat_params { + __le32 fcoe_tx_pkt_cnt; + __le32 fcoe_tx_byte_cnt; + __le32 fcp_tx_pkt_cnt; + __le32 reserved0; +}; + +/* + * FCoE statistics parameters $$KEEP_ENDIANNESS$$ + */ +struct fcoe_statistics_params { + struct fcoe_tx_stat_params tx_stat; + struct fcoe_rx_stat_params_section0 rx_stat0; + struct fcoe_rx_stat_params_section1 rx_stat1; + struct fcoe_rx_stat_params_section2 rx_stat2; +}; + + +/* + * The data afex vif list ramrod need $$KEEP_ENDIANNESS$$ + */ +struct afex_vif_list_ramrod_data { + u8 afex_vif_list_command; + u8 func_bit_map; + __le16 vif_list_index; + u8 func_to_clear; + u8 echo; + __le16 reserved1; +}; + + +/* + * cfc delete event data $$KEEP_ENDIANNESS$$ */ struct cfc_del_event_data { u32 cid; @@ -3372,22 +4580,18 @@ struct cfc_del_event_data { * per-port SAFC demo variables */ struct cmng_flags_per_port { - u8 con_number[NUM_OF_PROTOCOLS]; u32 cmng_enables; #define CMNG_FLAGS_PER_PORT_FAIRNESS_VN (0x1<<0) #define CMNG_FLAGS_PER_PORT_FAIRNESS_VN_SHIFT 0 #define CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN (0x1<<1) #define CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN_SHIFT 1 -#define CMNG_FLAGS_PER_PORT_FAIRNESS_PROTOCOL (0x1<<2) -#define CMNG_FLAGS_PER_PORT_FAIRNESS_PROTOCOL_SHIFT 2 -#define CMNG_FLAGS_PER_PORT_RATE_SHAPING_PROTOCOL (0x1<<3) -#define CMNG_FLAGS_PER_PORT_RATE_SHAPING_PROTOCOL_SHIFT 3 -#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS (0x1<<4) -#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_SHIFT 4 -#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE (0x1<<5) -#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE_SHIFT 5 -#define __CMNG_FLAGS_PER_PORT_RESERVED0 (0x3FFFFFF<<6) -#define __CMNG_FLAGS_PER_PORT_RESERVED0_SHIFT 6 +#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS (0x1<<2) +#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_SHIFT 2 +#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE (0x1<<3) +#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE_SHIFT 3 +#define __CMNG_FLAGS_PER_PORT_RESERVED0 (0xFFFFFFF<<4) +#define __CMNG_FLAGS_PER_PORT_RESERVED0_SHIFT 4 + u32 __reserved1; }; @@ -3406,6 +4610,7 @@ struct fairness_vars_per_port { u32 upper_bound; u32 fair_threshold; u32 fairness_timeout; + u32 reserved0; }; /* @@ -3422,42 +4627,9 @@ struct safc_struct_per_port { u16 __reserved1; #endif u8 cos_to_traffic_types[MAX_COS_NUMBER]; - u32 __reserved2; u16 cos_to_pause_mask[NUM_OF_SAFC_BITS]; }; -/* - * per-port PFC variables - */ -struct pfc_struct_per_port { - u8 priority_to_traffic_types[MAX_PFC_PRIORITIES]; -#if defined(__BIG_ENDIAN) - u16 pfc_pause_quanta_in_nanosec; - u8 __reserved0; - u8 priority_non_pausable_mask; -#elif defined(__LITTLE_ENDIAN) - u8 priority_non_pausable_mask; - u8 __reserved0; - u16 pfc_pause_quanta_in_nanosec; -#endif -}; - -/* - * Priority and cos - */ -struct priority_cos { -#if defined(__BIG_ENDIAN) - u16 reserved1; - u8 cos; - u8 priority; -#elif defined(__LITTLE_ENDIAN) - u8 priority; - u8 cos; - u16 reserved1; -#endif - u32 reserved2; -}; - /* * Per-port congestion management variables */ @@ -3465,20 +4637,111 @@ struct cmng_struct_per_port { struct rate_shaping_vars_per_port rs_vars; struct fairness_vars_per_port fair_vars; struct safc_struct_per_port safc_vars; - struct pfc_struct_per_port pfc_vars; -#if defined(__BIG_ENDIAN) - u16 __reserved1; - u8 dcb_enabled; - u8 llfc_mode; -#elif defined(__LITTLE_ENDIAN) - u8 llfc_mode; - u8 dcb_enabled; - u16 __reserved1; -#endif - struct priority_cos traffic_type_to_priority_cos[MAX_PFC_TRAFFIC_TYPES]; struct cmng_flags_per_port flags; }; +/* + * a single rate shaping counter. can be used as protocol or vnic counter + */ +struct rate_shaping_counter { + u32 quota; +#if defined(__BIG_ENDIAN) + u16 __reserved0; + u16 rate; +#elif defined(__LITTLE_ENDIAN) + u16 rate; + u16 __reserved0; +#endif +}; + +/* + * per-vnic rate shaping variables + */ +struct rate_shaping_vars_per_vn { + struct rate_shaping_counter vn_counter; +}; + +/* + * per-vnic fairness variables + */ +struct fairness_vars_per_vn { + u32 cos_credit_delta[MAX_COS_NUMBER]; + u32 vn_credit_delta; + u32 __reserved0; +}; + +/* + * cmng port init state + */ +struct cmng_vnic { + struct rate_shaping_vars_per_vn vnic_max_rate[4]; + struct fairness_vars_per_vn vnic_min_rate[4]; +}; + +/* + * cmng port init state + */ +struct cmng_init { + struct cmng_struct_per_port port; + struct cmng_vnic vnic; +}; + + +/* + * driver parameters for congestion management init, all rates are in Mbps + */ +struct cmng_init_input { + u32 port_rate; + u16 vnic_min_rate[4]; + u16 vnic_max_rate[4]; + u16 cos_min_rate[MAX_COS_NUMBER]; + u16 cos_to_pause_mask[MAX_COS_NUMBER]; + struct cmng_flags_per_port flags; +}; + + +/* + * Protocol-common command ID for slow path elements + */ +enum common_spqe_cmd_id { + RAMROD_CMD_ID_COMMON_UNUSED, + RAMROD_CMD_ID_COMMON_FUNCTION_START, + RAMROD_CMD_ID_COMMON_FUNCTION_STOP, + RAMROD_CMD_ID_COMMON_FUNCTION_UPDATE, + RAMROD_CMD_ID_COMMON_CFC_DEL, + RAMROD_CMD_ID_COMMON_CFC_DEL_WB, + RAMROD_CMD_ID_COMMON_STAT_QUERY, + RAMROD_CMD_ID_COMMON_STOP_TRAFFIC, + RAMROD_CMD_ID_COMMON_START_TRAFFIC, + RAMROD_CMD_ID_COMMON_AFEX_VIF_LISTS, + MAX_COMMON_SPQE_CMD_ID}; + + +/* + * Per-protocol connection types + */ +enum connection_type { + ETH_CONNECTION_TYPE, + TOE_CONNECTION_TYPE, + RDMA_CONNECTION_TYPE, + ISCSI_CONNECTION_TYPE, + FCOE_CONNECTION_TYPE, + RESERVED_CONNECTION_TYPE_0, + RESERVED_CONNECTION_TYPE_1, + RESERVED_CONNECTION_TYPE_2, + NONE_CONNECTION_TYPE, + MAX_CONNECTION_TYPE}; + + +/* + * Cos modes + */ +enum cos_mode { + OVERRIDE_COS, + STATIC_COS, + FW_WRR, + MAX_COS_MODE}; + /* * Dynamic HC counters set by the driver @@ -3544,9 +4807,9 @@ struct cstorm_vf_zone_data { /* - * Dynamic host coalescing init parameters + * Dynamic host coalescing init parameters, per state machine */ -struct dynamic_hc_config { +struct dynamic_hc_sm_config { u32 threshold[3]; u8 shift_per_protocol[HC_SB_MAX_DYNAMIC_INDICES]; u8 hc_timeout0[HC_SB_MAX_DYNAMIC_INDICES]; @@ -3555,6 +4818,13 @@ struct dynamic_hc_config { u8 hc_timeout3[HC_SB_MAX_DYNAMIC_INDICES]; }; +/* + * Dynamic host coalescing init parameters + */ +struct dynamic_hc_config { + struct dynamic_hc_sm_config sm_config[HC_SB_MAX_SM]; +}; + struct e2_integ_data { #if defined(__BIG_ENDIAN) @@ -3605,7 +4875,17 @@ struct e2_integ_data { /* - * pf-vf event data + * set mac event data $$KEEP_ENDIANNESS$$ + */ +struct eth_event_data { + u32 echo; + u32 reserved0; + u32 reserved1; +}; + + +/* + * pf-vf event data $$KEEP_ENDIANNESS$$ */ struct vf_pf_event_data { u8 vf_id; @@ -3616,16 +4896,7 @@ struct vf_pf_event_data { }; /* - * set mac event data - */ -struct set_mac_event_data { - u32 echo; - u32 reserved0; - u32 reserved1; -}; - -/* - * VF FLR event data + * VF FLR event data $$KEEP_ENDIANNESS$$ */ struct vf_flr_event_data { u8 vf_id; @@ -3636,7 +4907,7 @@ struct vf_flr_event_data { }; /* - * malicious VF event data + * malicious VF event data $$KEEP_ENDIANNESS$$ */ struct malicious_vf_event_data { u8 vf_id; @@ -3646,15 +4917,27 @@ struct malicious_vf_event_data { u32 reserved3; }; +/* + * vif list event data $$KEEP_ENDIANNESS$$ + */ +struct vif_list_event_data { + u8 func_bit_map; + u8 echo; + __le16 reserved0; + __le32 reserved1; + __le32 reserved2; +}; + /* * union for all event ring message types */ union event_data { struct vf_pf_event_data vf_pf_event; - struct set_mac_event_data set_mac_event; + struct eth_event_data eth_event; struct cfc_del_event_data cfc_del_event; struct vf_flr_event_data vf_flr_event; struct malicious_vf_event_data malicious_vf_event; + struct vif_list_event_data vif_list_event; }; @@ -3677,7 +4960,7 @@ struct event_ring_data { /* - * event ring message element (each element is 128 bits) + * event ring message element (each element is 128 bits) $$KEEP_ENDIANNESS$$ */ struct event_ring_msg { u8 opcode; @@ -3704,31 +4987,88 @@ union event_ring_elem { /* - * per-vnic fairness variables + * Common event ring opcodes */ -struct fairness_vars_per_vn { - u32 cos_credit_delta[MAX_COS_NUMBER]; - u32 protocol_credit_delta[NUM_OF_PROTOCOLS]; - u32 vn_credit_delta; - u32 __reserved0; +enum event_ring_opcode { + EVENT_RING_OPCODE_VF_PF_CHANNEL, + EVENT_RING_OPCODE_FUNCTION_START, + EVENT_RING_OPCODE_FUNCTION_STOP, + EVENT_RING_OPCODE_CFC_DEL, + EVENT_RING_OPCODE_CFC_DEL_WB, + EVENT_RING_OPCODE_STAT_QUERY, + EVENT_RING_OPCODE_STOP_TRAFFIC, + EVENT_RING_OPCODE_START_TRAFFIC, + EVENT_RING_OPCODE_VF_FLR, + EVENT_RING_OPCODE_MALICIOUS_VF, + EVENT_RING_OPCODE_FORWARD_SETUP, + EVENT_RING_OPCODE_RSS_UPDATE_RULES, + EVENT_RING_OPCODE_FUNCTION_UPDATE, + EVENT_RING_OPCODE_AFEX_VIF_LISTS, + EVENT_RING_OPCODE_SET_MAC, + EVENT_RING_OPCODE_CLASSIFICATION_RULES, + EVENT_RING_OPCODE_FILTERS_RULES, + EVENT_RING_OPCODE_MULTICAST_RULES, + MAX_EVENT_RING_OPCODE}; + + +/* + * Modes for fairness algorithm + */ +enum fairness_mode { + FAIRNESS_COS_WRR_MODE, + FAIRNESS_COS_ETS_MODE, + MAX_FAIRNESS_MODE}; + + +/* + * Priority and cos $$KEEP_ENDIANNESS$$ + */ +struct priority_cos { + u8 priority; + u8 cos; + __le16 reserved1; +}; + +/* + * The data for flow control configuration $$KEEP_ENDIANNESS$$ + */ +struct flow_control_configuration { + struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES]; + u8 dcb_enabled; + u8 dcb_version; + u8 dont_add_pri_0_en; + u8 reserved1; + __le32 reserved2; }; /* - * The data for flow control configuration + * $$KEEP_ENDIANNESS$$ */ -struct flow_control_configuration { - struct priority_cos traffic_type_to_priority_cos[MAX_PFC_TRAFFIC_TYPES]; -#if defined(__BIG_ENDIAN) - u16 reserved1; - u8 dcb_version; - u8 dcb_enabled; -#elif defined(__LITTLE_ENDIAN) - u8 dcb_enabled; - u8 dcb_version; - u16 reserved1; -#endif - u32 reserved2; +struct function_start_data { + __le16 function_mode; + __le16 sd_vlan_tag; + __le16 vif_id; + u8 path_id; + u8 network_cos_mode; +}; + + +/* + * $$KEEP_ENDIANNESS$$ + */ +struct function_update_data { + u8 vif_id_change_flg; + u8 afex_default_vlan_change_flg; + u8 allowed_priorities_change_flg; + u8 network_cos_mode_change_flg; + __le16 vif_id; + __le16 afex_default_vlan; + u8 allowed_priorities; + u8 network_cos_mode; + u8 lb_mode_en; + u8 reserved0; + __le32 reserved1; }; @@ -3760,7 +5100,7 @@ struct fw_version { /* - * Dynamic Host-Coalescing - Driver(host) counters + * Dynamic Host-Coalescing - Driver(host) counters */ struct hc_dynamic_sb_drv_counters { u32 dynamic_hc_drv_counter[HC_SB_MAX_DYNAMIC_INDICES]; @@ -3841,32 +5181,43 @@ struct hc_sb_data { struct pci_entity p_func; #if defined(__BIG_ENDIAN) u8 rsrv0; + u8 state; u8 dhc_qzone_id; - u8 __dynamic_hc_level; u8 same_igu_sb_1b; #elif defined(__LITTLE_ENDIAN) u8 same_igu_sb_1b; - u8 __dynamic_hc_level; u8 dhc_qzone_id; + u8 state; u8 rsrv0; #endif struct regpair rsrv1[2]; }; +/* + * Segment types for host coaslescing + */ +enum hc_segment { + HC_REGULAR_SEGMENT, + HC_DEFAULT_SEGMENT, + MAX_HC_SEGMENT}; + + /* * The fast-path status block meta-data */ struct hc_sp_status_block_data { struct regpair host_sb_addr; #if defined(__BIG_ENDIAN) - u16 rsrv; + u8 rsrv1; + u8 state; u8 igu_seg_id; u8 igu_sb_id; #elif defined(__LITTLE_ENDIAN) u8 igu_sb_id; u8 igu_seg_id; - u16 rsrv; + u8 state; + u8 rsrv1; #endif struct pci_entity p_func; }; @@ -3891,14 +5242,43 @@ struct hc_status_block_data_e2 { /* - * Protocol-common statistics collected by the Tstorm (per pf) + * IGU block operartion modes (in Everest2) + */ +enum igu_mode { + HC_IGU_BC_MODE, + HC_IGU_NBC_MODE, + MAX_IGU_MODE}; + + +/* + * IP versions + */ +enum ip_ver { + IP_V4, + IP_V6, + MAX_IP_VER}; + + +/* + * Multi-function modes + */ +enum mf_mode { + SINGLE_FUNCTION, + MULTI_FUNCTION_SD, + MULTI_FUNCTION_SI, + MULTI_FUNCTION_AFEX, + MAX_MF_MODE}; + + +/* + * Protocol-common statistics collected by the Tstorm (per pf) $$KEEP_ENDIANNESS$$ */ struct tstorm_per_pf_stats { struct regpair rcv_error_bytes; }; /* - * + * $$KEEP_ENDIANNESS$$ */ struct per_pf_stats { struct tstorm_per_pf_stats tstorm_pf_statistics; @@ -3906,17 +5286,19 @@ struct per_pf_stats { /* - * Protocol-common statistics collected by the Tstorm (per port) + * Protocol-common statistics collected by the Tstorm (per port) $$KEEP_ENDIANNESS$$ */ struct tstorm_per_port_stats { __le32 mac_discard; __le32 mac_filter_discard; __le32 brb_truncate_discard; - __le32 outer_vlan_discard; + __le32 mf_tag_discard; + __le32 packet_drop; + __le32 reserved; }; /* - * + * $$KEEP_ENDIANNESS$$ */ struct per_port_stats { struct tstorm_per_port_stats tstorm_port_statistics; @@ -3924,7 +5306,7 @@ struct per_port_stats { /* - * Protocol-common statistics collected by the Tstorm (per client) + * Protocol-common statistics collected by the Tstorm (per client) $$KEEP_ENDIANNESS$$ */ struct tstorm_per_queue_stats { struct regpair rcv_ucast_bytes; @@ -3942,7 +5324,7 @@ struct tstorm_per_queue_stats { }; /* - * Protocol-common statistics collected by the Ustorm (per client) + * Protocol-common statistics collected by the Ustorm (per client) $$KEEP_ENDIANNESS$$ */ struct ustorm_per_queue_stats { struct regpair ucast_no_buff_bytes; @@ -3951,11 +5333,14 @@ struct ustorm_per_queue_stats { __le32 ucast_no_buff_pkts; __le32 mcast_no_buff_pkts; __le32 bcast_no_buff_pkts; - __le32 reserved; + __le32 coalesced_pkts; + struct regpair coalesced_bytes; + __le32 coalesced_events; + __le32 coalesced_aborts; }; /* - * Protocol-common statistics collected by the Xstorm (per client) + * Protocol-common statistics collected by the Xstorm (per client) $$KEEP_ENDIANNESS$$ */ struct xstorm_per_queue_stats { struct regpair ucast_bytes_sent; @@ -3968,7 +5353,7 @@ struct xstorm_per_queue_stats { }; /* - * + * $$KEEP_ENDIANNESS$$ */ struct per_queue_stats { struct tstorm_per_queue_stats tstorm_queue_statistics; @@ -3978,7 +5363,7 @@ struct per_queue_stats { /* - * FW version stored in first line of pram + * FW version stored in first line of pram $$KEEP_ENDIANNESS$$ */ struct pram_fw_version { u8 major; @@ -4006,6 +5391,7 @@ union protocol_common_specific_data { u8 protocol_data[8]; struct regpair phy_address; struct regpair mac_config_addr; + struct afex_vif_list_ramrod_data afex_vif_list_data; }; /* @@ -4017,30 +5403,6 @@ struct protocol_common_spe { }; -/* - * a single rate shaping counter. can be used as protocol or vnic counter - */ -struct rate_shaping_counter { - u32 quota; -#if defined(__BIG_ENDIAN) - u16 __reserved0; - u16 rate; -#elif defined(__LITTLE_ENDIAN) - u16 rate; - u16 __reserved0; -#endif -}; - - -/* - * per-vnic rate shaping variables - */ -struct rate_shaping_vars_per_vn { - struct rate_shaping_counter protocol_counters[NUM_OF_PROTOCOLS]; - struct rate_shaping_counter vn_counter; -}; - - /* * The send queue element */ @@ -4051,18 +5413,26 @@ struct slow_path_element { /* - * Protocol-common statistics counter + * Protocol-common statistics counter $$KEEP_ENDIANNESS$$ */ struct stats_counter { __le16 xstats_counter; + __le16 reserved0; + __le32 reserved1; __le16 tstats_counter; + __le16 reserved2; + __le32 reserved3; __le16 ustats_counter; + __le16 reserved4; + __le32 reserved5; __le16 cstats_counter; + __le16 reserved6; + __le32 reserved7; }; /* - * + * $$KEEP_ENDIANNESS$$ */ struct stats_query_entry { u8 kind; @@ -4073,7 +5443,7 @@ struct stats_query_entry { }; /* - * statistic command + * statistic command $$KEEP_ENDIANNESS$$ */ struct stats_query_cmd_group { struct stats_query_entry query[STATS_QUERY_CMD_COUNT]; @@ -4081,7 +5451,7 @@ struct stats_query_cmd_group { /* - * statistic command header + * statistic command header $$KEEP_ENDIANNESS$$ */ struct stats_query_header { u8 cmd_num; @@ -4093,31 +5463,47 @@ struct stats_query_header { /* - * per-port PFC variables + * Types of statistcis query entry */ -struct storm_pfc_struct_per_port { -#if defined(__BIG_ENDIAN) - u16 mid_mac_addr; - u16 msb_mac_addr; -#elif defined(__LITTLE_ENDIAN) - u16 msb_mac_addr; - u16 mid_mac_addr; -#endif -#if defined(__BIG_ENDIAN) - u16 pfc_pause_quanta_in_nanosec; - u16 lsb_mac_addr; -#elif defined(__LITTLE_ENDIAN) - u16 lsb_mac_addr; - u16 pfc_pause_quanta_in_nanosec; -#endif -}; +enum stats_query_type { + STATS_TYPE_QUEUE, + STATS_TYPE_PORT, + STATS_TYPE_PF, + STATS_TYPE_TOE, + STATS_TYPE_FCOE, + MAX_STATS_QUERY_TYPE}; + /* - * Per-port congestion management variables + * Indicate of the function status block state */ -struct storm_cmng_struct_per_port { - struct storm_pfc_struct_per_port pfc_vars; -}; +enum status_block_state { + SB_DISABLED, + SB_ENABLED, + SB_CLEANED, + MAX_STATUS_BLOCK_STATE}; + + +/* + * Storm IDs (including attentions for IGU related enums) + */ +enum storm_id { + USTORM_ID, + CSTORM_ID, + XSTORM_ID, + TSTORM_ID, + ATTENTION_ID, + MAX_STORM_ID}; + + +/* + * Taffic types used in ETS and flow control algorithms + */ +enum traffic_type { + LLFC_TRAFFIC_TYPE_NW, + LLFC_TRAFFIC_TYPE_FCOE, + LLFC_TRAFFIC_TYPE_ISCSI, + MAX_TRAFFIC_TYPE}; /* @@ -4170,6 +5556,26 @@ struct vf_pf_channel_data { }; +/* + * State of VF-PF channel + */ +enum vf_pf_channel_state { + VF_PF_CHANNEL_STATE_READY, + VF_PF_CHANNEL_STATE_WAITING_FOR_ACK, + MAX_VF_PF_CHANNEL_STATE}; + + +/* + * vif_list_rule_kind + */ +enum vif_list_rule_kind { + VIF_LIST_RULE_SET, + VIF_LIST_RULE_GET, + VIF_LIST_RULE_CLEAR_ALL, + VIF_LIST_RULE_CLEAR_FUNC, + MAX_VIF_LIST_RULE_KIND}; + + /* * zone A per-queue data */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_mfw_req.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_mfw_req.h new file mode 100644 index 0000000..68c1f76 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_mfw_req.h @@ -0,0 +1,180 @@ +/* bnx2x_mfw_req.h: Broadcom Everest network driver. + * + * Copyright (c) 2012 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + */ + +#ifndef BNX2X_MFW_REQ_H +#define BNX2X_MFW_REQ_H + + +#define PORT_0 0 +#define PORT_1 1 +#define PORT_MAX 2 +#define NVM_PATH_MAX 2 + +/* FCoE capabilities required from the driver */ +struct fcoe_capabilities { + u32 capability1; + /* Maximum number of I/Os per connection */ + #define FCOE_IOS_PER_CONNECTION_MASK 0x0000ffff + #define FCOE_IOS_PER_CONNECTION_SHIFT 0 + /* Maximum number of Logins per port */ + #define FCOE_LOGINS_PER_PORT_MASK 0xffff0000 + #define FCOE_LOGINS_PER_PORT_SHIFT 16 + + u32 capability2; + /* Maximum number of exchanges */ + #define FCOE_NUMBER_OF_EXCHANGES_MASK 0x0000ffff + #define FCOE_NUMBER_OF_EXCHANGES_SHIFT 0 + /* Maximum NPIV WWN per port */ + #define FCOE_NPIV_WWN_PER_PORT_MASK 0xffff0000 + #define FCOE_NPIV_WWN_PER_PORT_SHIFT 16 + + u32 capability3; + /* Maximum number of targets supported */ + #define FCOE_TARGETS_SUPPORTED_MASK 0x0000ffff + #define FCOE_TARGETS_SUPPORTED_SHIFT 0 + /* Maximum number of outstanding commands across all connections */ + #define FCOE_OUTSTANDING_COMMANDS_MASK 0xffff0000 + #define FCOE_OUTSTANDING_COMMANDS_SHIFT 16 + + u32 capability4; + #define FCOE_CAPABILITY4_STATEFUL 0x00000001 + #define FCOE_CAPABILITY4_STATELESS 0x00000002 + #define FCOE_CAPABILITY4_CAPABILITIES_REPORTED_VALID 0x00000004 +}; + +struct glob_ncsi_oem_data +{ + u32 driver_version; + u32 unused[3]; + struct fcoe_capabilities fcoe_features[NVM_PATH_MAX][PORT_MAX]; +}; + +/* current drv_info version */ +#define DRV_INFO_CUR_VER 2 + +/* drv_info op codes supported */ +enum drv_info_opcode { + ETH_STATS_OPCODE, + FCOE_STATS_OPCODE, + ISCSI_STATS_OPCODE +}; + +#define ETH_STAT_INFO_VERSION_LEN 12 +/* Per PCI Function Ethernet Statistics required from the driver */ +struct eth_stats_info { + /* Function's Driver Version. padded to 12 */ + u8 version[ETH_STAT_INFO_VERSION_LEN]; + /* Locally Admin Addr. BigEndian EIU48. Actual size is 6 bytes */ + u8 mac_local[8]; + u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */ + u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */ + u32 mtu_size; /* MTU Size. Note : Negotiated MTU */ + u32 feature_flags; /* Feature_Flags. */ +#define FEATURE_ETH_CHKSUM_OFFLOAD_MASK 0x01 +#define FEATURE_ETH_LSO_MASK 0x02 +#define FEATURE_ETH_BOOTMODE_MASK 0x1C +#define FEATURE_ETH_BOOTMODE_SHIFT 2 +#define FEATURE_ETH_BOOTMODE_NONE (0x0 << 2) +#define FEATURE_ETH_BOOTMODE_PXE (0x1 << 2) +#define FEATURE_ETH_BOOTMODE_ISCSI (0x2 << 2) +#define FEATURE_ETH_BOOTMODE_FCOE (0x3 << 2) +#define FEATURE_ETH_TOE_MASK 0x20 + u32 lso_max_size; /* LSO MaxOffloadSize. */ + u32 lso_min_seg_cnt; /* LSO MinSegmentCount. */ + /* Num Offloaded Connections TCP_IPv4. */ + u32 ipv4_ofld_cnt; + /* Num Offloaded Connections TCP_IPv6. */ + u32 ipv6_ofld_cnt; + u32 promiscuous_mode; /* Promiscuous Mode. non-zero true */ + u32 txq_size; /* TX Descriptors Queue Size */ + u32 rxq_size; /* RX Descriptors Queue Size */ + /* TX Descriptor Queue Avg Depth. % Avg Queue Depth since last poll */ + u32 txq_avg_depth; + /* RX Descriptors Queue Avg Depth. % Avg Queue Depth since last poll */ + u32 rxq_avg_depth; + /* IOV_Offload. 0=none; 1=MultiQueue, 2=VEB 3= VEPA*/ + u32 iov_offload; + /* Number of NetQueue/VMQ Config'd. */ + u32 netq_cnt; + u32 vf_cnt; /* Num VF assigned to this PF. */ +}; + +/* Per PCI Function FCOE Statistics required from the driver */ +struct fcoe_stats_info { + u8 version[12]; /* Function's Driver Version. */ + u8 mac_local[8]; /* Locally Admin Addr. */ + u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */ + u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */ + /* QoS Priority (per 802.1p). 0-7255 */ + u32 qos_priority; + u32 txq_size; /* FCoE TX Descriptors Queue Size. */ + u32 rxq_size; /* FCoE RX Descriptors Queue Size. */ + /* FCoE TX Descriptor Queue Avg Depth. */ + u32 txq_avg_depth; + /* FCoE RX Descriptors Queue Avg Depth. */ + u32 rxq_avg_depth; + u32 rx_frames_lo; /* FCoE RX Frames received. */ + u32 rx_frames_hi; /* FCoE RX Frames received. */ + u32 rx_bytes_lo; /* FCoE RX Bytes received. */ + u32 rx_bytes_hi; /* FCoE RX Bytes received. */ + u32 tx_frames_lo; /* FCoE TX Frames sent. */ + u32 tx_frames_hi; /* FCoE TX Frames sent. */ + u32 tx_bytes_lo; /* FCoE TX Bytes sent. */ + u32 tx_bytes_hi; /* FCoE TX Bytes sent. */ + u32 rx_fcs_errors; /* number of receive packets with FCS errors */ + u32 rx_fc_crc_errors; /* number of FC frames with CRC errors*/ + u32 fip_login_failures; /* number of FCoE/FIP Login failures */ +}; + +/* Per PCI Function iSCSI Statistics required from the driver*/ +struct iscsi_stats_info { + u8 version[12]; /* Function's Driver Version. */ + u8 mac_local[8]; /* Locally Admin iSCSI MAC Addr. */ + u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */ + /* QoS Priority (per 802.1p). 0-7255 */ + u32 qos_priority; + + u8 initiator_name[64]; /* iSCSI Boot Initiator Node name. */ + + u8 ww_port_name[64]; /* iSCSI World wide port name */ + + u8 boot_target_name[64];/* iSCSI Boot Target Name. */ + + u8 boot_target_ip[16]; /* iSCSI Boot Target IP. */ + u32 boot_target_portal; /* iSCSI Boot Target Portal. */ + u8 boot_init_ip[16]; /* iSCSI Boot Initiator IP Address. */ + u32 max_frame_size; /* Max Frame Size. bytes */ + u32 txq_size; /* PDU TX Descriptors Queue Size. */ + u32 rxq_size; /* PDU RX Descriptors Queue Size. */ + + u32 txq_avg_depth; /*PDU TX Descriptor Queue Avg Depth. */ + u32 rxq_avg_depth; /*PDU RX Descriptors Queue Avg Depth. */ + u32 rx_pdus_lo; /* iSCSI PDUs received. */ + u32 rx_pdus_hi; /* iSCSI PDUs received. */ + + u32 rx_bytes_lo; /* iSCSI RX Bytes received. */ + u32 rx_bytes_hi; /* iSCSI RX Bytes received. */ + u32 tx_pdus_lo; /* iSCSI PDUs sent. */ + u32 tx_pdus_hi; /* iSCSI PDUs sent. */ + + u32 tx_bytes_lo; /* iSCSI PDU TX Bytes sent. */ + u32 tx_bytes_hi; /* iSCSI PDU TX Bytes sent. */ + u32 pcp_prior_map_tbl; /*C-PCP to S-PCP Priority MapTable. + 9 nibbles, the position of each nibble + represents the C-PCP value, the value + of the nibble = S-PCP value.*/ +}; + +union drv_info_to_mcp { + struct eth_stats_info ether_stat; + struct fcoe_stats_info fcoe_stat; + struct iscsi_stats_info iscsi_stat; +}; + +#endif /* BNX2X_MFW_REQ_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_reg.h b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_reg.h index 22b5d5c..737d93b 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_reg.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/bnx2x_reg.h @@ -1,6 +1,6 @@ /* bnx2x_reg.h: Broadcom Everest network driver. * - * Copyright (c) 2007-2010 Broadcom Corporation + * Copyright (c) 2007-2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -29,325 +29,164 @@ #define ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT (0x1<<3) #define ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR (0x1<<4) #define ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND (0x1<<1) -/* [RW 1] Initiate the ATC array - reset all the valid bits */ -#define ATC_REG_ATC_INIT_ARRAY 0x1100b8 /* [R 1] ATC initalization done */ #define ATC_REG_ATC_INIT_DONE 0x1100bc /* [RC 6] Interrupt register #0 read clear */ -#define ATC_REG_ATC_INT_STS_CLR 0x1101c0 +#define ATC_REG_ATC_INT_STS_CLR 0x1101c0 +/* [RW 5] Parity mask register #0 read/write */ +#define ATC_REG_ATC_PRTY_MASK 0x1101d8 +/* [RC 5] Parity register #0 read clear */ +#define ATC_REG_ATC_PRTY_STS_CLR 0x1101d0 /* [RW 19] Interrupt mask register #0 read/write */ #define BRB1_REG_BRB1_INT_MASK 0x60128 /* [R 19] Interrupt register #0 read */ #define BRB1_REG_BRB1_INT_STS 0x6011c /* [RW 4] Parity mask register #0 read/write */ -#define BRB1_REG_BRB1_PRTY_MASK 0x60138 +#define BRB1_REG_BRB1_PRTY_MASK 0x60138 /* [R 4] Parity register #0 read */ #define BRB1_REG_BRB1_PRTY_STS 0x6012c -/* [RW 10] At address BRB1_IND_FREE_LIST_PRS_CRDT initialize free head. At - address BRB1_IND_FREE_LIST_PRS_CRDT+1 initialize free tail. At address - BRB1_IND_FREE_LIST_PRS_CRDT+2 initialize parser initial credit. Warning - - following reset the first rbc access to this reg must be write; there can - be no more rbc writes after the first one; there can be any number of rbc - read following the first write; rbc access not following these rules will - result in hang condition. */ -#define BRB1_REG_FREE_LIST_PRS_CRDT 0x60200 -/* [RW 10] The number of free blocks below which the full signal to class 0 - is asserted */ +/* [RC 4] Parity register #0 read clear */ +#define BRB1_REG_BRB1_PRTY_STS_CLR 0x60130 +/* [RW 11] The number of free blocks below which the full signal to class 0 + * is asserted */ #define BRB1_REG_FULL_0_XOFF_THRESHOLD_0 0x601d0 -/* [RW 10] The number of free blocks above which the full signal to class 0 - is de-asserted */ -#define BRB1_REG_FULL_0_XON_THRESHOLD_0 0x601d4 -/* [RW 10] The number of free blocks below which the full signal to class 1 - is asserted */ +#define BRB1_REG_FULL_0_XOFF_THRESHOLD_1 0x60230 +/* [RW 11] The number of free blocks above which the full signal to class 0 + * is de-asserted */ +#define BRB1_REG_FULL_0_XON_THRESHOLD_0 0x601d4 +#define BRB1_REG_FULL_0_XON_THRESHOLD_1 0x60234 +/* [RW 11] The number of free blocks below which the full signal to class 1 + * is asserted */ #define BRB1_REG_FULL_1_XOFF_THRESHOLD_0 0x601d8 -/* [RW 10] The number of free blocks above which the full signal to class 1 - is de-asserted */ -#define BRB1_REG_FULL_1_XON_THRESHOLD_0 0x601dc -/* [RW 10] The number of free blocks below which the full signal to the LB - port is asserted */ -#define BRB1_REG_FULL_LB_XOFF_THRESHOLD 0x601e0 -/* [RW 10] The number of free blocks above which the full signal to the LB - port is de-asserted */ +#define BRB1_REG_FULL_1_XOFF_THRESHOLD_1 0x60238 +/* [RW 11] The number of free blocks above which the full signal to class 1 + * is de-asserted */ +#define BRB1_REG_FULL_1_XON_THRESHOLD_0 0x601dc +#define BRB1_REG_FULL_1_XON_THRESHOLD_1 0x6023c +/* [RW 11] The number of free blocks below which the full signal to the LB + * port is asserted */ +#define BRB1_REG_FULL_LB_XOFF_THRESHOLD 0x601e0 +/* [RW 11] The number of free blocks above which the full signal to the LB + * port is de-asserted */ #define BRB1_REG_FULL_LB_XON_THRESHOLD 0x601e4 -/* [RW 10] The number of free blocks above which the High_llfc signal to - interface #n is de-asserted. Not Functional */ -#define BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD_0 0x6014c -/* [RW 10] The number of free blocks below which the High_llfc signal to - interface #n is asserted. Not Functional */ -#define BRB1_REG_HIGH_LLFC_LOW_THRESHOLD_0 0x6013c -/* [RW 23] LL RAM data. */ -#define BRB1_REG_LL_RAM 0x61000 -/* [RW 10] The number of free blocks above which the Low_llfc signal to - interface #n is de-asserted. Not Functional */ -#define BRB1_REG_LOW_LLFC_HIGH_THRESHOLD_0 0x6016c -#define BRB1_REG_LOW_LLFC_HIGH_THRESHOLD_1 0x60170 -/* [RW 10] The number of free blocks below which the Low_llfc signal to - interface #n is asserted. Not Functional */ -#define BRB1_REG_LOW_LLFC_LOW_THRESHOLD_0 0x6015c -/* [RW 10] The number of blocks guarantied for the MAC port */ +/* [RW 11] The number of blocks guarantied for the LB port */ +#define BRB1_REG_LB_GUARANTIED 0x601ec +/* [RW 11] The hysteresis on the guarantied buffer space for the Lb port + * before signaling XON. */ +#define BRB1_REG_LB_GUARANTIED_HYST 0x60264 +/* [RW 11] The number of blocks guarantied for class 0 in MAC 0. The + * register is applicable only when per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_0_CLASS_0_GUARANTIED 0x60244 +/* [RW 11] The hysteresis on the guarantied buffer space for class 0 in MAC + * 1 before signaling XON. The register is applicable only when + * per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_0_CLASS_0_GUARANTIED_HYST 0x60254 +/* [RW 11] The number of blocks guarantied for class 1 in MAC 0. The + * register is applicable only when per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_0_CLASS_1_GUARANTIED 0x60248 +/* [RW 11] The hysteresis on the guarantied buffer space for class 1in MAC 0 + * before signaling XON. The register is applicable only when + * per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_0_CLASS_1_GUARANTIED_HYST 0x60258 +/* [RW 11] The number of blocks guarantied for class 0in MAC1.The register + * is applicable only when per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_1_CLASS_0_GUARANTIED 0x6024c +/* [RW 11] The hysteresis on the guarantied buffer space for class 0 in MAC + * 1 before signaling XON. The register is applicable only when + * per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_1_CLASS_0_GUARANTIED_HYST 0x6025c +/* [RW 11] The number of blocks guarantied for class 1 in MAC 1. The + * register is applicable only when per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_1_CLASS_1_GUARANTIED 0x60250 +/* [RW 11] The hysteresis on the guarantied buffer space for class 1 in MAC + * 1 before signaling XON. The register is applicable only when + * per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_1_CLASS_1_GUARANTIED_HYST 0x60260 +/* [RW 11] The number of blocks guarantied for the MAC port. The register is + * applicable only when per_class_guaranty_mode is reset. */ #define BRB1_REG_MAC_GUARANTIED_0 0x601e8 #define BRB1_REG_MAC_GUARANTIED_1 0x60240 /* [R 24] The number of full blocks. */ #define BRB1_REG_NUM_OF_FULL_BLOCKS 0x60090 -/* [ST 32] The number of cycles that the write_full signal towards MAC #0 - was asserted. Not Functional */ -#define BRB1_REG_NUM_OF_FULL_CYCLES_0 0x600c8 -#define BRB1_REG_NUM_OF_FULL_CYCLES_1 0x600cc -#define BRB1_REG_NUM_OF_FULL_CYCLES_4 0x600d8 -/* [ST 32] The number of cycles that the pause signal towards MAC #0 was - asserted. Not Functional */ -#define BRB1_REG_NUM_OF_PAUSE_CYCLES_0 0x600b8 -#define BRB1_REG_NUM_OF_PAUSE_CYCLES_1 0x600bc -/* [RW 10] The number of free blocks below which the pause signal to class 0 - is asserted */ +/* [RW 11] The number of free blocks below which the pause signal to class 0 + * is asserted */ #define BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 0x601c0 -/* [RW 10] The number of free blocks above which the pause signal to class 0 - is de-asserted */ +#define BRB1_REG_PAUSE_0_XOFF_THRESHOLD_1 0x60220 +/* [RW 11] The number of free blocks above which the pause signal to class 0 + * is de-asserted */ #define BRB1_REG_PAUSE_0_XON_THRESHOLD_0 0x601c4 -/* [RW 10] The number of free blocks below which the pause signal to class 1 - is asserted */ +#define BRB1_REG_PAUSE_0_XON_THRESHOLD_1 0x60224 +/* [RW 11] The number of free blocks below which the pause signal to class 1 + * is asserted */ #define BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0 0x601c8 -/* [RW 10] The number of free blocks above which the pause signal to class 1 - is de-asserted */ +#define BRB1_REG_PAUSE_1_XOFF_THRESHOLD_1 0x60228 +/* [RW 11] The number of free blocks above which the pause signal to class 1 + * is de-asserted */ #define BRB1_REG_PAUSE_1_XON_THRESHOLD_0 0x601cc +#define BRB1_REG_PAUSE_1_XON_THRESHOLD_1 0x6022c /* [RW 10] Write client 0: De-assert pause threshold. Not Functional */ -#define BRB1_REG_PAUSE_HIGH_THRESHOLD_0 0x60078 -#define BRB1_REG_PAUSE_HIGH_THRESHOLD_1 0x6007c +#define BRB1_REG_PAUSE_HIGH_THRESHOLD_0 0x60078 /* [RW 10] Write client 0: Assert pause threshold. Not Functional */ #define BRB1_REG_PAUSE_LOW_THRESHOLD_0 0x60068 -#define BRB1_REG_PAUSE_LOW_THRESHOLD_1 0x6006c +/* [RW 1] Indicates if to use per-class guaranty mode (new mode) or per-MAC + * guaranty mode (backwards-compatible mode). 0=per-MAC guaranty mode (BC + * mode). 1=per-class guaranty mode (new mode). */ +#define BRB1_REG_PER_CLASS_GUARANTY_MODE 0x60268 /* [R 24] The number of full blocks occpied by port. */ #define BRB1_REG_PORT_NUM_OCC_BLOCKS_0 0x60094 -/* [RW 1] Reset the design by software. */ -#define BRB1_REG_SOFT_RESET 0x600dc -/* [RW 32] Indirect access to AG context with 32-bits granularity. The bits - [11:8] of the address should be the offset within the accessed LCID - context; the bits [7:0] are the accessed LCID.Example: to write to REG3 - LCID100. The RBC address should be 12'h364. */ -#define CCM_REG_AG_CTX 0xd4000 /* [R 5] Used to read the value of the XX protection CAM occupancy counter. */ #define CCM_REG_CAM_OCCUP 0xd0188 -/* [RW 1] CM - CFC Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CCM_CFC_IFEN 0xd003c -/* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CCM_CQM_IFEN 0xd000c -/* [RW 1] If set the Q index; received from the QM is inserted to event ID. - Otherwise 0 is inserted. */ -#define CCM_REG_CCM_CQM_USE_Q 0xd00c0 /* [RW 11] Interrupt mask register #0 read/write */ #define CCM_REG_CCM_INT_MASK 0xd01e4 /* [R 11] Interrupt register #0 read */ #define CCM_REG_CCM_INT_STS 0xd01d8 +/* [RW 27] Parity mask register #0 read/write */ +#define CCM_REG_CCM_PRTY_MASK 0xd01f4 /* [R 27] Parity register #0 read */ #define CCM_REG_CCM_PRTY_STS 0xd01e8 -/* [RW 3] The size of AG context region 0 in REG-pairs. Designates the MS - REG-pair number (e.g. if region 0 is 6 REG-pairs; the value should be 5). - Is used to determine the number of the AG context REG-pairs written back; - when the input message Reg1WbFlg isn't set. */ -#define CCM_REG_CCM_REG0_SZ 0xd00c4 -/* [RW 1] CM - STORM 0 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CCM_STORM0_IFEN 0xd0004 -/* [RW 1] CM - STORM 1 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CCM_STORM1_IFEN 0xd0008 -/* [RW 1] CDU AG read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define CCM_REG_CDU_AG_RD_IFEN 0xd0030 -/* [RW 1] CDU AG write Interface enable. If 0 - the request and valid input - are disregarded; all other signals are treated as usual; if 1 - normal - activity. */ -#define CCM_REG_CDU_AG_WR_IFEN 0xd002c -/* [RW 1] CDU STORM read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define CCM_REG_CDU_SM_RD_IFEN 0xd0038 -/* [RW 1] CDU STORM write Interface enable. If 0 - the request and valid - input is disregarded; all other signals are treated as usual; if 1 - - normal activity. */ -#define CCM_REG_CDU_SM_WR_IFEN 0xd0034 +/* [RC 27] Parity register #0 read clear */ +#define CCM_REG_CCM_PRTY_STS_CLR 0xd01ec /* [RW 4] CFC output initial credit. Max credit available - 15.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 1 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 1 at start-up. */ #define CCM_REG_CFC_INIT_CRD 0xd0204 -/* [RW 2] Auxillary counter flag Q number 1. */ -#define CCM_REG_CNT_AUX1_Q 0xd00c8 -/* [RW 2] Auxillary counter flag Q number 2. */ -#define CCM_REG_CNT_AUX2_Q 0xd00cc -/* [RW 28] The CM header value for QM request (primary). */ -#define CCM_REG_CQM_CCM_HDR_P 0xd008c -/* [RW 28] The CM header value for QM request (secondary). */ -#define CCM_REG_CQM_CCM_HDR_S 0xd0090 -/* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CQM_CCM_IFEN 0xd0014 /* [RW 6] QM output initial credit. Max credit available - 32. Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 32 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 32 at start-up. */ #define CCM_REG_CQM_INIT_CRD 0xd020c -/* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_CQM_P_WEIGHT 0xd00b8 -/* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_CQM_S_WEIGHT 0xd00bc -/* [RW 1] Input SDM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CSDM_IFEN 0xd0018 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the SDM interface is detected. */ -#define CCM_REG_CSDM_LENGTH_MIS 0xd0170 -/* [RW 3] The weight of the SDM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_CSDM_WEIGHT 0xd00b4 -/* [RW 28] The CM header for QM formatting in case of an error in the QM - inputs. */ -#define CCM_REG_ERR_CCM_HDR 0xd0094 -/* [RW 8] The Event ID in case the input message ErrorFlg is set. */ -#define CCM_REG_ERR_EVNT_ID 0xd0098 + * at the SDM interface is detected. */ +#define CCM_REG_CSDM_LENGTH_MIS 0xd0170 /* [RW 8] FIC0 output initial credit. Max credit available - 255. Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define CCM_REG_FIC0_INIT_CRD 0xd0210 /* [RW 8] FIC1 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define CCM_REG_FIC1_INIT_CRD 0xd0214 -/* [RW 1] Arbitration between Input Arbiter groups: 0 - fair Round-Robin; 1 - - strict priority defined by ~ccm_registers_gr_ag_pr.gr_ag_pr; - ~ccm_registers_gr_ld0_pr.gr_ld0_pr and - ~ccm_registers_gr_ld1_pr.gr_ld1_pr. Groups are according to channels and - outputs to STORM: aggregation; load FIC0; load FIC1 and store. */ -#define CCM_REG_GR_ARB_TYPE 0xd015c -/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed; that the Store channel priority is - the compliment to 4 of the rest priorities - Aggregation channel; Load - (FIC0) channel and Load (FIC1). */ -#define CCM_REG_GR_LD0_PR 0xd0164 -/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed; that the Store channel priority is - the compliment to 4 of the rest priorities - Aggregation channel; Load - (FIC0) channel and Load (FIC1). */ -#define CCM_REG_GR_LD1_PR 0xd0168 -/* [RW 4] The number of double REG-pairs(128 bits); loaded from the STORM - context and sent to STORM; for a specific connection type. The double - REG-pairs are used in order to align to STORM context row size of 128 - bits. The offset of these data in the STORM context is always 0. Index - _(0..15) stands for the connection type (one of 16). */ -#define CCM_REG_N_SM_CTX_LD_0 0xd004c -#define CCM_REG_N_SM_CTX_LD_1 0xd0050 -#define CCM_REG_N_SM_CTX_LD_2 0xd0054 -#define CCM_REG_N_SM_CTX_LD_3 0xd0058 -#define CCM_REG_N_SM_CTX_LD_4 0xd005c -/* [RW 1] Input pbf Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_PBF_IFEN 0xd0028 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the pbf interface is detected. */ + * at the pbf interface is detected. */ #define CCM_REG_PBF_LENGTH_MIS 0xd0180 -/* [RW 3] The weight of the input pbf in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_PBF_WEIGHT 0xd00ac -#define CCM_REG_PHYS_QNUM1_0 0xd0134 -#define CCM_REG_PHYS_QNUM1_1 0xd0138 -#define CCM_REG_PHYS_QNUM2_0 0xd013c -#define CCM_REG_PHYS_QNUM2_1 0xd0140 -#define CCM_REG_PHYS_QNUM3_0 0xd0144 -#define CCM_REG_PHYS_QNUM3_1 0xd0148 -#define CCM_REG_QOS_PHYS_QNUM0_0 0xd0114 -#define CCM_REG_QOS_PHYS_QNUM0_1 0xd0118 -#define CCM_REG_QOS_PHYS_QNUM1_0 0xd011c -#define CCM_REG_QOS_PHYS_QNUM1_1 0xd0120 -#define CCM_REG_QOS_PHYS_QNUM2_0 0xd0124 -#define CCM_REG_QOS_PHYS_QNUM2_1 0xd0128 -#define CCM_REG_QOS_PHYS_QNUM3_0 0xd012c -#define CCM_REG_QOS_PHYS_QNUM3_1 0xd0130 -/* [RW 1] STORM - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define CCM_REG_STORM_CCM_IFEN 0xd0010 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the STORM interface is detected. */ + * at the STORM interface is detected. */ #define CCM_REG_STORM_LENGTH_MIS 0xd016c -/* [RW 3] The weight of the STORM input in the WRR (Weighted Round robin) - mechanism. 0 stands for weight 8 (the most prioritised); 1 stands for - weight 1(least prioritised); 2 stands for weight 2 (more prioritised); - tc. */ -#define CCM_REG_STORM_WEIGHT 0xd009c -/* [RW 1] Input tsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define CCM_REG_TSEM_IFEN 0xd001c /* [RC 1] Set when the message length mismatch (relative to last indication) - at the tsem interface is detected. */ -#define CCM_REG_TSEM_LENGTH_MIS 0xd0174 -/* [RW 3] The weight of the input tsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_TSEM_WEIGHT 0xd00a0 -/* [RW 1] Input usem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define CCM_REG_USEM_IFEN 0xd0024 + * at the tsem interface is detected. */ +#define CCM_REG_TSEM_LENGTH_MIS 0xd0174 /* [RC 1] Set when message length mismatch (relative to last indication) at - the usem interface is detected. */ -#define CCM_REG_USEM_LENGTH_MIS 0xd017c -/* [RW 3] The weight of the input usem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_USEM_WEIGHT 0xd00a8 -/* [RW 1] Input xsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define CCM_REG_XSEM_IFEN 0xd0020 + * the usem interface is detected. */ +#define CCM_REG_USEM_LENGTH_MIS 0xd017c /* [RC 1] Set when the message length mismatch (relative to last indication) - at the xsem interface is detected. */ -#define CCM_REG_XSEM_LENGTH_MIS 0xd0178 -/* [RW 3] The weight of the input xsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_XSEM_WEIGHT 0xd00a4 + * at the xsem interface is detected. */ +#define CCM_REG_XSEM_LENGTH_MIS 0xd0178 /* [RW 19] Indirect access to the descriptor table of the XX protection - mechanism. The fields are: [5:0] - message length; [12:6] - message - pointer; 18:13] - next pointer. */ + * mechanism. The fields are: [5:0] - message length; [12:6] - message + * pointer; 18:13] - next pointer. */ #define CCM_REG_XX_DESCR_TABLE 0xd0300 -#define CCM_REG_XX_DESCR_TABLE_SIZE 36 +#define CCM_REG_XX_DESCR_TABLE_SIZE 24 /* [R 7] Used to read the value of XX protection Free counter. */ -#define CCM_REG_XX_FREE 0xd0184 -/* [RW 6] Initial value for the credit counter; responsible for fulfilling - of the Input Stage XX protection buffer by the XX protection pending - messages. Max credit available - 127. Write writes the initial credit - value; read returns the current value of the credit counter. Must be - initialized to maximum XX protected message size - 2 at start-up. */ -#define CCM_REG_XX_INIT_CRD 0xd0220 -/* [RW 7] The maximum number of pending messages; which may be stored in XX - protection. At write the ~ccm_registers_xx_free.xx_free counter is also - written. */ -#define CCM_REG_XX_MSG_NUM 0xd0224 -/* [RW 8] The Event ID; sent to the STORM in case of XX overflow. */ -#define CCM_REG_XX_OVFL_EVNT_ID 0xd0044 -/* [RW 18] Indirect access to the XX table of the XX protection mechanism. - The fields are: [5:0] - tail pointer; 11:6] - Link List size; 17:12] - - header pointer. */ -#define CCM_REG_XX_TABLE 0xd0280 -#define CDU_REG_CDU_CHK_MASK0 0x101000 -#define CDU_REG_CDU_CHK_MASK1 0x101004 -#define CDU_REG_CDU_CONTROL0 0x101008 -#define CDU_REG_CDU_DEBUG 0x101010 +#define CCM_REG_XX_FREE 0xd0184 #define CDU_REG_CDU_GLOBAL_PARAMS 0x101020 /* [RW 7] Interrupt mask register #0 read/write */ #define CDU_REG_CDU_INT_MASK 0x10103c @@ -357,25 +196,18 @@ #define CDU_REG_CDU_PRTY_MASK 0x10104c /* [R 5] Parity register #0 read */ #define CDU_REG_CDU_PRTY_STS 0x101040 +/* [RC 5] Parity register #0 read clear */ +#define CDU_REG_CDU_PRTY_STS_CLR 0x101044 /* [RW 32] logging of error data in case of a CDU load error: - {expected_cid[15:0]; xpected_type[2:0]; xpected_region[2:0]; ctive_error; - ype_error; ctual_active; ctual_compressed_context}; */ + * {expected_cid[15:0]; xpected_type[2:0]; xpected_region[2:0]; ctive_error; + * ype_error; ctual_active; ctual_compressed_context}; */ #define CDU_REG_ERROR_DATA 0x101014 -/* [WB 216] L1TT ram access. each entry has the following format : - {mrege_regions[7:0]; ffset12[5:0]...offset0[5:0]; - ength12[5:0]...length0[5:0]; d12[3:0]...id0[3:0]} */ -#define CDU_REG_L1TT 0x101800 -/* [WB 24] MATT ram access. each entry has the following - format:{RegionLength[11:0]; egionOffset[11:0]} */ -#define CDU_REG_MATT 0x101100 -/* [RW 1] when this bit is set the CDU operates in multifunction mode */ -#define CDU_REG_MF_MODE 0x101050 -/* [R 1] indication the initializing the activity counter by the hardware - was done. */ -#define CFC_REG_AC_INIT_DONE 0x104078 /* [RW 13] activity counter ram access */ #define CFC_REG_ACTIVITY_COUNTER 0x104400 #define CFC_REG_ACTIVITY_COUNTER_SIZE 256 +/* [R 1] indication the initializing the activity counter by the hardware + * was done. */ +#define CFC_REG_AC_INIT_DONE 0x104078 /* [R 1] indication the initializing the cams by the hardware was done. */ #define CFC_REG_CAM_INIT_DONE 0x10407c /* [RW 2] Interrupt mask register #0 read/write */ @@ -383,41 +215,33 @@ /* [R 2] Interrupt register #0 read */ #define CFC_REG_CFC_INT_STS 0x1040fc /* [RC 2] Interrupt register #0 read clear */ -#define CFC_REG_CFC_INT_STS_CLR 0x104100 -/* [RW 4] Parity mask register #0 read/write */ +#define CFC_REG_CFC_INT_STS_CLR 0x104100 +/* [RW 6] Parity mask register #0 read/write */ #define CFC_REG_CFC_PRTY_MASK 0x104118 -/* [R 4] Parity register #0 read */ +/* [R 6] Parity register #0 read */ #define CFC_REG_CFC_PRTY_STS 0x10410c +/* [RC 6] Parity register #0 read clear */ +#define CFC_REG_CFC_PRTY_STS_CLR 0x104110 /* [RW 21] CID cam access (21:1 - Data; alid - 0) */ -#define CFC_REG_CID_CAM 0x104800 -#define CFC_REG_CONTROL0 0x104028 +#define CFC_REG_CID_CAM 0x104800 #define CFC_REG_DEBUG0 0x104050 -/* [RW 16] indicates per error (in #cfc_registers_cfc_error_vector.cfc_error - vector) whether the cfc should be disabled upon it */ -#define CFC_REG_DISABLE_ON_ERROR 0x104044 -#define CFC_REG_DISABLE_ROBUSTWB_PF 0x104138 /* [R 16] CFC error vector. when the CFC detects an internal error it will - set one of these bits. the bit description can be found in CFC - specifications */ + * set one of these bits. the bit description can be found in CFC + * specifications */ #define CFC_REG_ERROR_VECTOR 0x10403c /* [WB 97] LCID info ram access = {96-vpf; 5:93-pfid; 2:89-type; - 8:85-action; 4-paddrv; 3:20-paddr; 9:4-rstates; -lsf; :0-lstate} */ + * 8:85-action; 4-paddrv; 3:20-paddr; 9:4-rstates; -lsf; :0-lstate} */ #define CFC_REG_INFO_RAM 0x105000 #define CFC_REG_INFO_RAM_SIZE 1024 #define CFC_REG_INIT_REG 0x10404c -#define CFC_REG_INTERFACES 0x104058 -/* [RW 24] {weight_load_client7[2:0] to weight_load_client0[2:0]}. this - field allows changing the priorities of the weighted-round-robin arbiter - which selects which CFC load client should be served next */ -#define CFC_REG_LCREQ_WEIGHTS 0x104084 /* [RW 22] Link List ram access; data = {prev_pfid; rev_lcid; ext_pfid; - ext_lcid} */ + * ext_lcid} */ #define CFC_REG_LINK_LIST 0x104c00 #define CFC_REG_LINK_LIST_SIZE 256 /* [R 1] indication the initializing the link list by the hardware was done. */ #define CFC_REG_LL_INIT_DONE 0x104074 /* [R 9] Number of allocated LCIDs which are at empty state */ -#define CFC_REG_NUM_LCIDS_ALLOC 0x104020 +#define CFC_REG_NUM_LCIDS_ALLOC 0x104020 /* [R 9] Number of Arriving LCIDs in Link List Block */ #define CFC_REG_NUM_LCIDS_ARRIVING 0x104004 #define CFC_REG_NUM_LCIDS_INSIDE_PF 0x104120 @@ -425,311 +249,97 @@ #define CFC_REG_NUM_LCIDS_LEAVING 0x104018 #define CFC_REG_STRONG_ENABLE_PF 0x104128 #define CFC_REG_WEAK_ENABLE_PF 0x104124 -/* [RW 8] The event id for aggregated interrupt 0 */ -#define CSDM_REG_AGG_INT_EVENT_0 0xc2038 -#define CSDM_REG_AGG_INT_EVENT_1 0xc203c -#define CSDM_REG_AGG_INT_EVENT_10 0xc2060 -#define CSDM_REG_AGG_INT_EVENT_11 0xc2064 -#define CSDM_REG_AGG_INT_EVENT_12 0xc2068 -#define CSDM_REG_AGG_INT_EVENT_13 0xc206c -#define CSDM_REG_AGG_INT_EVENT_14 0xc2070 -#define CSDM_REG_AGG_INT_EVENT_15 0xc2074 -#define CSDM_REG_AGG_INT_EVENT_16 0xc2078 -#define CSDM_REG_AGG_INT_EVENT_17 0xc207c -#define CSDM_REG_AGG_INT_EVENT_2 0xc2040 -#define CSDM_REG_AGG_INT_EVENT_24 0xc2098 -#define CSDM_REG_AGG_INT_EVENT_25 0xc209c -#define CSDM_REG_AGG_INT_EVENT_26 0xc20a0 -#define CSDM_REG_AGG_INT_EVENT_27 0xc20a4 -#define CSDM_REG_AGG_INT_EVENT_3 0xc2044 -#define CSDM_REG_AGG_INT_EVENT_4 0xc2048 -#define CSDM_REG_AGG_INT_EVENT_5 0xc204c -#define CSDM_REG_AGG_INT_EVENT_6 0xc2050 -#define CSDM_REG_AGG_INT_EVENT_7 0xc2054 -#define CSDM_REG_AGG_INT_EVENT_8 0xc2058 -#define CSDM_REG_AGG_INT_EVENT_9 0xc205c -/* [RW 1] The destination FIC for aggregated interrupt 24 */ -#define CSDM_REG_AGG_INT_FIC_24 0xc2198 -#define CSDM_REG_AGG_INT_FIC_25 0xc219c -/* [RW 1] For each aggregated interrupt index whether the mode is normal (0) - or auto-mask-mode (1) */ -#define CSDM_REG_AGG_INT_MODE_0 0xc21b8 -#define CSDM_REG_AGG_INT_MODE_1 0xc21bc -#define CSDM_REG_AGG_INT_MODE_10 0xc21e0 -#define CSDM_REG_AGG_INT_MODE_11 0xc21e4 -#define CSDM_REG_AGG_INT_MODE_12 0xc21e8 -#define CSDM_REG_AGG_INT_MODE_13 0xc21ec -#define CSDM_REG_AGG_INT_MODE_14 0xc21f0 -#define CSDM_REG_AGG_INT_MODE_15 0xc21f4 -#define CSDM_REG_AGG_INT_MODE_16 0xc21f8 -#define CSDM_REG_AGG_INT_MODE_17 0xc21fc -#define CSDM_REG_AGG_INT_MODE_2 0xc21c0 -#define CSDM_REG_AGG_INT_MODE_24 0xc2218 -#define CSDM_REG_AGG_INT_MODE_25 0xc221c -#define CSDM_REG_AGG_INT_MODE_3 0xc21c4 -#define CSDM_REG_AGG_INT_MODE_4 0xc21c8 -#define CSDM_REG_AGG_INT_MODE_5 0xc21cc -#define CSDM_REG_AGG_INT_MODE_6 0xc21d0 -#define CSDM_REG_AGG_INT_MODE_7 0xc21d4 -#define CSDM_REG_AGG_INT_MODE_8 0xc21d8 -#define CSDM_REG_AGG_INT_MODE_9 0xc21dc -/* [RW 1] The T bit for aggregated interrupt 1 */ -#define CSDM_REG_AGG_INT_T_1 0xc20bc -#define CSDM_REG_AGG_INT_T_2 0xc20c0 -#define CSDM_REG_AGG_INT_T_24 0xc2118 -#define CSDM_REG_AGG_INT_T_25 0xc211c -#define CSDM_REG_AGG_INT_T_26 0xc2120 -#define CSDM_REG_AGG_INT_T_27 0xc2124 -/* [RW 14] The start address in the internal RAM for the cfc_rsp lcid */ -#define CSDM_REG_CFC_RSP_START_ADDR 0xc2008 -/* [RW 16] The maximum value of the competion counter #0 */ -#define CSDM_REG_CMP_COUNTER_MAX0 0xc201c -/* [RW 16] The maximum value of the competion counter #1 */ -#define CSDM_REG_CMP_COUNTER_MAX1 0xc2020 -/* [RW 16] The maximum value of the competion counter #2 */ -#define CSDM_REG_CMP_COUNTER_MAX2 0xc2024 -/* [RW 16] The maximum value of the competion counter #3 */ -#define CSDM_REG_CMP_COUNTER_MAX3 0xc2028 -/* [RW 16] The maximum value of the competion counter #4 */ -#define CSDM_REG_CMP_COUNTER_MAX4 0xc22d8 -/* [RW 16] The maximum value of the competion counter #5 */ -#define CSDM_REG_CMP_COUNTER_MAX5 0xc22dc -/* [RW 16] The maximum value of the competion counter #6 */ -#define CSDM_REG_CMP_COUNTER_MAX6 0xc22e0 -/* [RW 16] The maximum value of the competion counter #7 */ -#define CSDM_REG_CMP_COUNTER_MAX7 0xc22e4 -/* [RW 14] The start address in the internal RAM for the completion - counters. */ -#define CSDM_REG_CMP_COUNTER_START_ADDR 0xc200c /* [RW 32] Interrupt mask register #0 read/write */ #define CSDM_REG_CSDM_INT_MASK_0 0xc229c #define CSDM_REG_CSDM_INT_MASK_1 0xc22ac /* [R 32] Interrupt register #0 read */ -#define CSDM_REG_CSDM_INT_STS_0 0xc2290 -#define CSDM_REG_CSDM_INT_STS_1 0xc22a0 +#define CSDM_REG_CSDM_INT_STS_0 0xc2290 +#define CSDM_REG_CSDM_INT_STS_1 0xc22a0 /* [RW 11] Parity mask register #0 read/write */ -#define CSDM_REG_CSDM_PRTY_MASK 0xc22bc +#define CSDM_REG_CSDM_PRTY_MASK 0xc22bc /* [R 11] Parity register #0 read */ #define CSDM_REG_CSDM_PRTY_STS 0xc22b0 -#define CSDM_REG_ENABLE_IN1 0xc2238 -#define CSDM_REG_ENABLE_IN2 0xc223c -#define CSDM_REG_ENABLE_OUT1 0xc2240 -#define CSDM_REG_ENABLE_OUT2 0xc2244 -/* [RW 4] The initial number of messages that can be sent to the pxp control - interface without receiving any ACK. */ -#define CSDM_REG_INIT_CREDIT_PXP_CTRL 0xc24bc -/* [ST 32] The number of ACK after placement messages received */ -#define CSDM_REG_NUM_OF_ACK_AFTER_PLACE 0xc227c -/* [ST 32] The number of packet end messages received from the parser */ -#define CSDM_REG_NUM_OF_PKT_END_MSG 0xc2274 -/* [ST 32] The number of requests received from the pxp async if */ -#define CSDM_REG_NUM_OF_PXP_ASYNC_REQ 0xc2278 -/* [ST 32] The number of commands received in queue 0 */ -#define CSDM_REG_NUM_OF_Q0_CMD 0xc2248 -/* [ST 32] The number of commands received in queue 10 */ -#define CSDM_REG_NUM_OF_Q10_CMD 0xc226c -/* [ST 32] The number of commands received in queue 11 */ -#define CSDM_REG_NUM_OF_Q11_CMD 0xc2270 -/* [ST 32] The number of commands received in queue 1 */ -#define CSDM_REG_NUM_OF_Q1_CMD 0xc224c -/* [ST 32] The number of commands received in queue 3 */ -#define CSDM_REG_NUM_OF_Q3_CMD 0xc2250 -/* [ST 32] The number of commands received in queue 4 */ -#define CSDM_REG_NUM_OF_Q4_CMD 0xc2254 -/* [ST 32] The number of commands received in queue 5 */ -#define CSDM_REG_NUM_OF_Q5_CMD 0xc2258 -/* [ST 32] The number of commands received in queue 6 */ -#define CSDM_REG_NUM_OF_Q6_CMD 0xc225c -/* [ST 32] The number of commands received in queue 7 */ -#define CSDM_REG_NUM_OF_Q7_CMD 0xc2260 -/* [ST 32] The number of commands received in queue 8 */ -#define CSDM_REG_NUM_OF_Q8_CMD 0xc2264 -/* [ST 32] The number of commands received in queue 9 */ -#define CSDM_REG_NUM_OF_Q9_CMD 0xc2268 -/* [RW 14] The start address in the internal RAM for queue counters */ -#define CSDM_REG_Q_COUNTER_START_ADDR 0xc2010 +/* [RC 11] Parity register #0 read clear */ +#define CSDM_REG_CSDM_PRTY_STS_CLR 0xc22b4 /* [R 1] pxp_ctrl rd_data fifo empty in sdm_dma_rsp block */ #define CSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY 0xc2548 /* [R 1] parser fifo empty in sdm_sync block */ #define CSDM_REG_SYNC_PARSER_EMPTY 0xc2550 /* [R 1] parser serial fifo empty in sdm_sync block */ #define CSDM_REG_SYNC_SYNC_EMPTY 0xc2558 -/* [RW 32] Tick for timer counter. Applicable only when - ~csdm_registers_timer_tick_enable.timer_tick_enable =1 */ -#define CSDM_REG_TIMER_TICK 0xc2000 -/* [RW 5] The number of time_slots in the arbitration cycle */ -#define CSEM_REG_ARB_CYCLE_SIZE 0x200034 -/* [RW 3] The source that is associated with arbitration element 0. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2 */ -#define CSEM_REG_ARB_ELEMENT0 0x200020 -/* [RW 3] The source that is associated with arbitration element 1. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~csem_registers_arb_element0.arb_element0 */ -#define CSEM_REG_ARB_ELEMENT1 0x200024 -/* [RW 3] The source that is associated with arbitration element 2. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~csem_registers_arb_element0.arb_element0 - and ~csem_registers_arb_element1.arb_element1 */ -#define CSEM_REG_ARB_ELEMENT2 0x200028 -/* [RW 3] The source that is associated with arbitration element 3. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2.Could - not be equal to register ~csem_registers_arb_element0.arb_element0 and - ~csem_registers_arb_element1.arb_element1 and - ~csem_registers_arb_element2.arb_element2 */ -#define CSEM_REG_ARB_ELEMENT3 0x20002c -/* [RW 3] The source that is associated with arbitration element 4. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~csem_registers_arb_element0.arb_element0 - and ~csem_registers_arb_element1.arb_element1 and - ~csem_registers_arb_element2.arb_element2 and - ~csem_registers_arb_element3.arb_element3 */ -#define CSEM_REG_ARB_ELEMENT4 0x200030 /* [RW 32] Interrupt mask register #0 read/write */ #define CSEM_REG_CSEM_INT_MASK_0 0x200110 #define CSEM_REG_CSEM_INT_MASK_1 0x200120 /* [R 32] Interrupt register #0 read */ -#define CSEM_REG_CSEM_INT_STS_0 0x200104 -#define CSEM_REG_CSEM_INT_STS_1 0x200114 +#define CSEM_REG_CSEM_INT_STS_0 0x200104 +#define CSEM_REG_CSEM_INT_STS_1 0x200114 /* [RW 32] Parity mask register #0 read/write */ #define CSEM_REG_CSEM_PRTY_MASK_0 0x200130 #define CSEM_REG_CSEM_PRTY_MASK_1 0x200140 /* [R 32] Parity register #0 read */ #define CSEM_REG_CSEM_PRTY_STS_0 0x200124 #define CSEM_REG_CSEM_PRTY_STS_1 0x200134 -#define CSEM_REG_ENABLE_IN 0x2000a4 -#define CSEM_REG_ENABLE_OUT 0x2000a8 +/* [RC 32] Parity register #0 read clear */ +#define CSEM_REG_CSEM_PRTY_STS_CLR_0 0x200128 +#define CSEM_REG_CSEM_PRTY_STS_CLR_1 0x200138 /* [RW 32] This address space contains all registers and memories that are - placed in SEM_FAST block. The SEM_FAST registers are described in - appendix B. In order to access the SEM_FAST registers the base address - CSEM_REGISTERS_FAST_MEMORY (Offset: 0x220000) should be added to each - SEM_FAST register offset. */ + * placed in SEM_FAST block. The SEM_FAST registers are described in + * appendix B. In order to access the SEM_FAST registers the base address + * CSEM_REGISTERS_FAST_MEMORY (Offset: 0x220000) should be added to each + * SEM_FAST register offset. */ #define CSEM_REG_FAST_MEMORY 0x220000 -/* [RW 1] Disables input messages from FIC0 May be updated during run_time - by the microcode */ -#define CSEM_REG_FIC0_DISABLE 0x200224 -/* [RW 1] Disables input messages from FIC1 May be updated during run_time - by the microcode */ -#define CSEM_REG_FIC1_DISABLE 0x200234 /* [RW 15] Interrupt table Read and write access to it is not possible in - the middle of the work */ + * the middle of the work */ #define CSEM_REG_INT_TABLE 0x200400 -/* [ST 24] Statistics register. The number of messages that entered through - FIC0 */ -#define CSEM_REG_MSG_NUM_FIC0 0x200000 -/* [ST 24] Statistics register. The number of messages that entered through - FIC1 */ -#define CSEM_REG_MSG_NUM_FIC1 0x200004 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC0 */ -#define CSEM_REG_MSG_NUM_FOC0 0x200008 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC1 */ -#define CSEM_REG_MSG_NUM_FOC1 0x20000c -/* [ST 24] Statistics register. The number of messages that were sent to - FOC2 */ -#define CSEM_REG_MSG_NUM_FOC2 0x200010 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC3 */ -#define CSEM_REG_MSG_NUM_FOC3 0x200014 -/* [RW 1] Disables input messages from the passive buffer May be updated - during run_time by the microcode */ -#define CSEM_REG_PAS_DISABLE 0x20024c /* [WB 128] Debug only. Passive buffer memory */ -#define CSEM_REG_PASSIVE_BUFFER 0x202000 +#define CSEM_REG_PASSIVE_BUFFER 0x202000 /* [WB 46] pram memory. B45 is parity; b[44:0] - data. */ #define CSEM_REG_PRAM 0x240000 -/* [R 16] Valid sleeping threads indication have bit per thread */ +/* [R 20] Valid sleeping threads indication have bit per thread */ #define CSEM_REG_SLEEP_THREADS_VALID 0x20026c /* [R 1] EXT_STORE FIFO is empty in sem_slow_ls_ext */ #define CSEM_REG_SLOW_EXT_STORE_EMPTY 0x2002a0 -/* [RW 16] List of free threads . There is a bit per thread. */ -#define CSEM_REG_THREADS_LIST 0x2002e4 -/* [RW 3] The arbitration scheme of time_slot 0 */ -#define CSEM_REG_TS_0_AS 0x200038 -/* [RW 3] The arbitration scheme of time_slot 10 */ -#define CSEM_REG_TS_10_AS 0x200060 -/* [RW 3] The arbitration scheme of time_slot 11 */ -#define CSEM_REG_TS_11_AS 0x200064 -/* [RW 3] The arbitration scheme of time_slot 12 */ -#define CSEM_REG_TS_12_AS 0x200068 -/* [RW 3] The arbitration scheme of time_slot 13 */ -#define CSEM_REG_TS_13_AS 0x20006c -/* [RW 3] The arbitration scheme of time_slot 14 */ -#define CSEM_REG_TS_14_AS 0x200070 -/* [RW 3] The arbitration scheme of time_slot 15 */ -#define CSEM_REG_TS_15_AS 0x200074 -/* [RW 3] The arbitration scheme of time_slot 16 */ -#define CSEM_REG_TS_16_AS 0x200078 -/* [RW 3] The arbitration scheme of time_slot 17 */ -#define CSEM_REG_TS_17_AS 0x20007c -/* [RW 3] The arbitration scheme of time_slot 18 */ -#define CSEM_REG_TS_18_AS 0x200080 -/* [RW 3] The arbitration scheme of time_slot 1 */ -#define CSEM_REG_TS_1_AS 0x20003c -/* [RW 3] The arbitration scheme of time_slot 2 */ -#define CSEM_REG_TS_2_AS 0x200040 -/* [RW 3] The arbitration scheme of time_slot 3 */ -#define CSEM_REG_TS_3_AS 0x200044 -/* [RW 3] The arbitration scheme of time_slot 4 */ -#define CSEM_REG_TS_4_AS 0x200048 -/* [RW 3] The arbitration scheme of time_slot 5 */ -#define CSEM_REG_TS_5_AS 0x20004c -/* [RW 3] The arbitration scheme of time_slot 6 */ -#define CSEM_REG_TS_6_AS 0x200050 -/* [RW 3] The arbitration scheme of time_slot 7 */ -#define CSEM_REG_TS_7_AS 0x200054 -/* [RW 3] The arbitration scheme of time_slot 8 */ -#define CSEM_REG_TS_8_AS 0x200058 -/* [RW 3] The arbitration scheme of time_slot 9 */ -#define CSEM_REG_TS_9_AS 0x20005c /* [W 7] VF or PF ID for reset error bit. Values 0-63 reset error bit for 64 - VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ + * VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ #define CSEM_REG_VFPF_ERR_NUM 0x200380 /* [RW 1] Parity mask register #0 read/write */ #define DBG_REG_DBG_PRTY_MASK 0xc0a8 /* [R 1] Parity register #0 read */ #define DBG_REG_DBG_PRTY_STS 0xc09c +/* [RC 1] Parity register #0 read clear */ +#define DBG_REG_DBG_PRTY_STS_CLR 0xc0a0 /* [RW 1] When set the DMAE will process the commands as in E1.5. 1.The - function that is used is always SRC-PCI; 2.VF_Valid = 0; 3.VFID=0; - 4.Completion function=0; 5.Error handling=0 */ + * function that is used is always SRC-PCI; 2.VF_Valid = 0; 3.VFID=0; + * 4.Completion function=0; 5.Error handling=0 */ #define DMAE_REG_BACKWARD_COMP_EN 0x10207c /* [RW 32] Commands memory. The address to command X; row Y is to calculated - as 14*X+Y. */ + * as 14*X+Y. */ #define DMAE_REG_CMD_MEM 0x102400 #define DMAE_REG_CMD_MEM_SIZE 224 -/* [RW 1] If 0 - the CRC-16c initial value is all zeroes; if 1 - the CRC-16c - initial value is all ones. */ -#define DMAE_REG_CRC16C_INIT 0x10201c -/* [RW 1] If 0 - the CRC-16 T10 initial value is all zeroes; if 1 - the - CRC-16 T10 initial value is all ones. */ -#define DMAE_REG_CRC16T10_INIT 0x102020 /* [RW 2] Interrupt mask register #0 read/write */ #define DMAE_REG_DMAE_INT_MASK 0x102054 /* [RW 4] Parity mask register #0 read/write */ -#define DMAE_REG_DMAE_PRTY_MASK 0x102064 +#define DMAE_REG_DMAE_PRTY_MASK 0x102064 /* [R 4] Parity register #0 read */ #define DMAE_REG_DMAE_PRTY_STS 0x102058 +/* [RC 4] Parity register #0 read clear */ +#define DMAE_REG_DMAE_PRTY_STS_CLR 0x10205c /* [RW 1] Command 0 go. */ #define DMAE_REG_GO_C0 0x102080 /* [RW 1] Command 1 go. */ #define DMAE_REG_GO_C1 0x102084 /* [RW 1] Command 10 go. */ -#define DMAE_REG_GO_C10 0x102088 +#define DMAE_REG_GO_C10 0x102088 /* [RW 1] Command 11 go. */ -#define DMAE_REG_GO_C11 0x10208c +#define DMAE_REG_GO_C11 0x10208c /* [RW 1] Command 12 go. */ -#define DMAE_REG_GO_C12 0x102090 +#define DMAE_REG_GO_C12 0x102090 /* [RW 1] Command 13 go. */ -#define DMAE_REG_GO_C13 0x102094 +#define DMAE_REG_GO_C13 0x102094 /* [RW 1] Command 14 go. */ -#define DMAE_REG_GO_C14 0x102098 +#define DMAE_REG_GO_C14 0x102098 /* [RW 1] Command 15 go. */ -#define DMAE_REG_GO_C15 0x10209c +#define DMAE_REG_GO_C15 0x10209c /* [RW 1] Command 2 go. */ #define DMAE_REG_GO_C2 0x1020a0 /* [RW 1] Command 3 go. */ @@ -746,56 +356,6 @@ #define DMAE_REG_GO_C8 0x1020b8 /* [RW 1] Command 9 go. */ #define DMAE_REG_GO_C9 0x1020bc -/* [RW 1] DMAE GRC Interface (Target; aster) enable. If 0 - the acknowledge - input is disregarded; valid is deasserted; all other signals are treated - as usual; if 1 - normal activity. */ -#define DMAE_REG_GRC_IFEN 0x102008 -/* [RW 1] DMAE PCI Interface (Request; ead; rite) enable. If 0 - the - acknowledge input is disregarded; valid is deasserted; full is asserted; - all other signals are treated as usual; if 1 - normal activity. */ -#define DMAE_REG_PCI_IFEN 0x102004 -/* [RW 4] DMAE- PCI Request Interface initial credit. Write writes the - initial value to the credit counter; related to the address. Read returns - the current value of the counter. */ -#define DMAE_REG_PXP_REQ_INIT_CRD 0x1020c0 -/* [R 8] Aggregation command. */ -#define DORQ_REG_AGG_CMD0 0x170060 -/* [RW 8] Aggregation cmd per {vf_valid; conn type; A; R} */ -#define DORQ_REG_AGG_CMD_0 0x170400 -/* [R 8] Aggregation command. */ -#define DORQ_REG_AGG_CMD1 0x170064 -/* [RW 8] Aggregation cmd per {vf_valid; conn type; A; R} */ -#define DORQ_REG_AGG_CMD_1 0x170404 -#define DORQ_REG_AGG_CMD_12 0x170430 -#define DORQ_REG_AGG_CMD_13 0x170434 -#define DORQ_REG_AGG_CMD_14 0x170438 -#define DORQ_REG_AGG_CMD_15 0x17043c -#define DORQ_REG_AGG_CMD_16 0x170440 -#define DORQ_REG_AGG_CMD_17 0x170444 -#define DORQ_REG_AGG_CMD_18 0x170448 -#define DORQ_REG_AGG_CMD_19 0x17044c -/* [R 8] Aggregation command. */ -#define DORQ_REG_AGG_CMD2 0x170068 -/* [RW 8] Aggregation cmd per {vf_valid; conn type; A; R} */ -#define DORQ_REG_AGG_CMD_2 0x170408 -/* [R 8] Aggregation command. */ -#define DORQ_REG_AGG_CMD3 0x17006c -/* [RW 8] Aggregation cmd per {vf_valid; conn type; A; R} */ -#define DORQ_REG_AGG_CMD_3 0x17040c -#define DORQ_REG_AGG_CMD_32 0x170480 -#define DORQ_REG_AGG_CMD_33 0x170484 -#define DORQ_REG_AGG_CMD_34 0x170488 -#define DORQ_REG_AGG_CMD_35 0x17048c -#define DORQ_REG_AGG_CMD_4 0x170410 -#define DORQ_REG_AGG_CMD_5 0x170414 -#define DORQ_REG_AGG_CMD_6 0x170418 -#define DORQ_REG_AGG_CMD_7 0x17041c -/* [RW 28] The value sent to CM header in the case of CFC load cancellation. */ -#define DORQ_REG_CANCEL_CMHEAD 0x1701c4 -/* [RW 28] UCM Header. */ -#define DORQ_REG_CMHEAD_RX 0x170050 -/* [RW 1] Thread Required bit for error indicating CM messages */ -#define DORQ_REG_CM_T_FLAG 0x170344 /* [RW 32] Doorbell address for RBC doorbells (function 0). */ #define DORQ_REG_DB_ADDR0 0x17008c /* [RW 6] Interrupt mask register #0 read/write */ @@ -805,62 +365,39 @@ /* [RC 6] Interrupt register #0 read clear */ #define DORQ_REG_DORQ_INT_STS_CLR 0x170178 /* [RW 2] Parity mask register #0 read/write */ -#define DORQ_REG_DORQ_PRTY_MASK 0x170190 +#define DORQ_REG_DORQ_PRTY_MASK 0x170190 /* [R 2] Parity register #0 read */ #define DORQ_REG_DORQ_PRTY_STS 0x170184 -/* [RW 8] The address to write the DPM CID to STORM. */ -#define DORQ_REG_DPM_CID_ADDR 0x170044 +/* [RC 2] Parity register #0 read clear */ +#define DORQ_REG_DORQ_PRTY_STS_CLR 0x170188 /* [RW 5] The DPM mode CID extraction offset. */ #define DORQ_REG_DPM_CID_OFST 0x170030 -/* [RW 12] The threshold of the DQ FIFO to send the almost full interrupt. */ -#define DORQ_REG_DQ_FIFO_AFULL_TH 0x17007c -/* [RW 12] The threshold of the DQ FIFO to send the full interrupt. */ -#define DORQ_REG_DQ_FIFO_FULL_TH 0x170078 /* [R 13] Current value of the DQ FIFO fill level according to following - pointer. The range is 0 - 256 FIFO rows; where each row stands for the - doorbell. */ + * pointer. The range is 0 - 256 FIFO rows; where each row stands for the + * doorbell. */ #define DORQ_REG_DQ_FILL_LVLF 0x1700a4 /* [R 1] DQ FIFO full status. Is set; when FIFO filling level is more or - equal to full threshold; reset on full clear. */ + * equal to full threshold; reset on full clear. */ #define DORQ_REG_DQ_FULL_ST 0x1700c0 -/* [RW 28] The value sent to CM header in the case of CFC load error. */ -#define DORQ_REG_ERR_CMHEAD 0x170058 -#define DORQ_REG_IF_EN 0x170004 -#define DORQ_REG_MAX_RVFID_SIZE 0x1701ec -#define DORQ_REG_MODE_ACT 0x170008 +#define DORQ_REG_MAX_RVFID_SIZE 0x1701ec /* [RW 5] The normal mode CID extraction offset. */ #define DORQ_REG_NORM_CID_OFST 0x17002c -/* [RW 28] TCM Header when only TCP context is loaded. */ -#define DORQ_REG_NORM_CMHEAD_TX 0x17004c -/* [RW 3] The number of simultaneous outstanding requests to Context Fetch - Interface. */ -#define DORQ_REG_OUTST_REQ 0x17003c #define DORQ_REG_PF_USAGE_CNT 0x1701d0 -#define DORQ_REG_REGN 0x170038 /* [R 4] Current value of response A counter credit. Initial credit is - configured through write to ~dorq_registers_rsp_init_crd.rsp_init_crd - register. */ + * configured through write to ~dorq_registers_rsp_init_crd.rsp_init_crd + * register. */ #define DORQ_REG_RSPA_CRD_CNT 0x1700ac /* [R 4] Current value of response B counter credit. Initial credit is - configured through write to ~dorq_registers_rsp_init_crd.rsp_init_crd - register. */ + * configured through write to ~dorq_registers_rsp_init_crd.rsp_init_crd + * register. */ #define DORQ_REG_RSPB_CRD_CNT 0x1700b0 -/* [RW 4] The initial credit at the Doorbell Response Interface. The write - writes the same initial credit to the rspa_crd_cnt and rspb_crd_cnt. The - read reads this written value. */ -#define DORQ_REG_RSP_INIT_CRD 0x170048 -/* [RW 4] Initial activity counter value on the load request; when the - shortcut is done. */ -#define DORQ_REG_SHRT_ACT_CNT 0x170070 -/* [RW 28] TCM Header when both ULP and TCP context is loaded. */ -#define DORQ_REG_SHRT_CMHEAD 0x170054 #define DORQ_REG_VF_NORM_CID_BASE 0x1701a0 #define DORQ_REG_VF_NORM_CID_OFST 0x1701f4 #define DORQ_REG_VF_NORM_CID_WND_SIZE 0x1701a4 #define DORQ_REG_VF_NORM_MAX_CID_COUNT 0x1701e4 #define DORQ_REG_VF_NORM_VF_BASE 0x1701a8 /* [RW 10] VF type validation mask value */ -#define DORQ_REG_VF_TYPE_MASK_0 0x170218 +#define DORQ_REG_VF_TYPE_MASK_0 0x170218 /* [RW 17] VF type validation Min MCID value */ #define DORQ_REG_VF_TYPE_MAX_MCID_0 0x1702d8 /* [RW 17] VF type validation Max MCID value */ @@ -870,125 +407,94 @@ #define DORQ_REG_VF_USAGE_CNT 0x170320 #define DORQ_REG_VF_USAGE_CT_LIMIT 0x170340 #define HC_CONFIG_0_REG_ATTN_BIT_EN_0 (0x1<<4) +#define HC_CONFIG_0_REG_BLOCK_DISABLE_0 (0x1<<0) #define HC_CONFIG_0_REG_INT_LINE_EN_0 (0x1<<3) #define HC_CONFIG_0_REG_MSI_ATTN_EN_0 (0x1<<7) #define HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 (0x1<<2) -#define HC_CONFIG_0_REG_SINGLE_ISR_EN_0 (0x1<<1) +#define HC_CONFIG_0_REG_SINGLE_ISR_EN_0 (0x1<<1) +#define HC_CONFIG_1_REG_BLOCK_DISABLE_1 (0x1<<0) #define HC_REG_AGG_INT_0 0x108050 -#define HC_REG_AGG_INT_1 0x108054 -#define HC_REG_ATTN_BIT 0x108120 -#define HC_REG_ATTN_IDX 0x108100 -#define HC_REG_ATTN_MSG0_ADDR_L 0x108018 -#define HC_REG_ATTN_MSG1_ADDR_L 0x108020 -#define HC_REG_ATTN_NUM_P0 0x108038 -#define HC_REG_ATTN_NUM_P1 0x10803c +#define HC_REG_ATTN_MSG0_ADDR_L 0x108018 +#define HC_REG_ATTN_MSG1_ADDR_L 0x108020 #define HC_REG_COMMAND_REG 0x108180 -#define HC_REG_CONFIG_0 0x108000 -#define HC_REG_CONFIG_1 0x108004 -#define HC_REG_FUNC_NUM_P0 0x1080ac -#define HC_REG_FUNC_NUM_P1 0x1080b0 +#define HC_REG_CONFIG_0 0x108000 +#define HC_REG_CONFIG_1 0x108004 /* [RW 3] Parity mask register #0 read/write */ #define HC_REG_HC_PRTY_MASK 0x1080a0 /* [R 3] Parity register #0 read */ #define HC_REG_HC_PRTY_STS 0x108094 /* [RC 3] Parity register #0 read clear */ #define HC_REG_HC_PRTY_STS_CLR 0x108098 -#define HC_REG_INT_MASK 0x108108 +#define HC_REG_INT_MASK 0x108108 #define HC_REG_LEADING_EDGE_0 0x108040 -#define HC_REG_LEADING_EDGE_1 0x108048 #define HC_REG_MAIN_MEMORY 0x108800 -#define HC_REG_MAIN_MEMORY_SIZE 152 -#define HC_REG_P0_PROD_CONS 0x108200 -#define HC_REG_P1_PROD_CONS 0x108400 -#define HC_REG_PBA_COMMAND 0x108140 -#define HC_REG_PCI_CONFIG_0 0x108010 -#define HC_REG_PCI_CONFIG_1 0x108014 -#define HC_REG_STATISTIC_COUNTERS 0x109000 +#define HC_REG_MAIN_MEMORY_SIZE 152 #define HC_REG_TRAILING_EDGE_0 0x108044 -#define HC_REG_TRAILING_EDGE_1 0x10804c -#define HC_REG_UC_RAM_ADDR_0 0x108028 -#define HC_REG_UC_RAM_ADDR_1 0x108030 -#define HC_REG_USTORM_ADDR_FOR_COALESCE 0x108068 -#define HC_REG_VQID_0 0x108008 -#define HC_REG_VQID_1 0x10800c #define IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN (0x1<<1) +#define IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE (0x1<<0) #define IGU_REG_ATTENTION_ACK_BITS 0x130108 /* [R 4] Debug: attn_fsm */ #define IGU_REG_ATTN_FSM 0x130054 -#define IGU_REG_ATTN_MSG_ADDR_H 0x13011c -#define IGU_REG_ATTN_MSG_ADDR_L 0x130120 +#define IGU_REG_ATTN_MSG_ADDR_H 0x13011c +#define IGU_REG_ATTN_MSG_ADDR_L 0x130120 /* [R 4] Debug: [3] - attention write done message is pending (0-no pending; - 1-pending). [2:0] = PFID. Pending means attention message was sent; but - write done didnt receive. */ -#define IGU_REG_ATTN_WRITE_DONE_PENDING 0x130030 + * 1-pending). [2:0] = PFID. Pending means attention message was sent; but + * write done didnt receive. */ +#define IGU_REG_ATTN_WRITE_DONE_PENDING 0x130030 #define IGU_REG_BLOCK_CONFIGURATION 0x130000 #define IGU_REG_COMMAND_REG_32LSB_DATA 0x130124 #define IGU_REG_COMMAND_REG_CTRL 0x13012c /* [WB_R 32] Cleanup bit status per SB. 1 = cleanup is set. 0 = cleanup bit - is clear. The bits in this registers are set and clear via the producer - command. Data valid only in addresses 0-4. all the rest are zero. */ + * is clear. The bits in this registers are set and clear via the producer + * command. Data valid only in addresses 0-4. all the rest are zero. */ #define IGU_REG_CSTORM_TYPE_0_SB_CLEANUP 0x130200 /* [R 5] Debug: ctrl_fsm */ #define IGU_REG_CTRL_FSM 0x130064 /* [R 1] data availble for error memory. If this bit is clear do not red - from error_handling_memory. */ + * from error_handling_memory. */ #define IGU_REG_ERROR_HANDLING_DATA_VALID 0x130130 -/* [WB_R 64] Do not read from this memory if error_handling_data_valid - register is zero. The data is collected in according to the command_debug - value. if command_debug is clear it holds the first 8 error commands as - follows: {wr_data[31:0]; cmd_addr[12:0]; error_type_d[3:0]; cmd_fid[6:0]; - cmd_source; error_source[1:0]; cmd_func_err; cmd_length[2:0]; - cmd_wr_n_rd} . if command_debug is set it holds the last 8 commands to - the IGU (with and without error) as follows: {wr_data[31:0]; - cmd_addr[15:0]; 1b0; cmd_fid[6:0]; cmd_source; error_source[1:0]; - cmd_func_err; cmd_length[2:0]; cmd_wr_n_rd}. cmd_source - the source - field in PXP command. VFID is encoded: PF? {4b1000; PFID} : {1b0; VFID}. - error_source[1:0] - pxp - 0; grc - 1; attn - 2. cmd_func_err - func_err - field in PXP command. cmd_length[2:0] - length in PXP command. - cmd_wr_n_rd: 0 - read; 1 - write. error_type_d[3:0] :1 - length > ; 2 - - command to disable function; 3 - VF command to attn bits. 4 - host - tries to update prod. 5 - during read from MIMD function; 6 -segment not - match; 7 - attn prod upd; 9 - SB index not valid; 10 - FID + vector num - not found; 11 - FID not match; 12 - VF tries to access attn command. */ -#define IGU_REG_ERROR_HANDLING_MEMORY 0x130178 +/* [RW 11] Parity mask register #0 read/write */ +#define IGU_REG_IGU_PRTY_MASK 0x1300a8 /* [R 11] Parity register #0 read */ #define IGU_REG_IGU_PRTY_STS 0x13009c +/* [RC 11] Parity register #0 read clear */ +#define IGU_REG_IGU_PRTY_STS_CLR 0x1300a0 /* [R 4] Debug: int_handle_fsm */ #define IGU_REG_INT_HANDLE_FSM 0x130050 #define IGU_REG_LEADING_EDGE_LATCH 0x130134 /* [RW 14] mapping CAM; relevant for E2 operating mode only. [0] - valid. - [6:1] - vector number; [13:7] - FID (if VF - [13] = 0; [12:7] = VF - number; if PF - [13] = 1; [12:10] = 0; [9:7] = PF number); */ + * [6:1] - vector number; [13:7] - FID (if VF - [13] = 0; [12:7] = VF + * number; if PF - [13] = 1; [12:10] = 0; [9:7] = PF number); */ #define IGU_REG_MAPPING_MEMORY 0x131000 #define IGU_REG_MAPPING_MEMORY_SIZE 136 #define IGU_REG_PBA_STATUS_LSB 0x130138 #define IGU_REG_PBA_STATUS_MSB 0x13013c -#define IGU_REG_PCI_PF_MSI_EN 0x130140 #define IGU_REG_PCI_PF_MSIX_EN 0x130144 #define IGU_REG_PCI_PF_MSIX_FUNC_MASK 0x130148 +#define IGU_REG_PCI_PF_MSI_EN 0x130140 /* [WB_R 32] Each bit represent the pending bits status for that SB. 0 = no - pending; 1 = pending. Pendings means interrupt was asserted; and write - done was not received. Data valid only in addresses 0-4. all the rest are - zero. */ + * pending; 1 = pending. Pendings means interrupt was asserted; and write + * done was not received. Data valid only in addresses 0-4. all the rest are + * zero. */ #define IGU_REG_PENDING_BITS_STATUS 0x130300 #define IGU_REG_PF_CONFIGURATION 0x130154 /* [RW 20] producers only. E2 mode: address 0-135 match to the mapping - memory; 136 - PF0 default prod; 137 PF1 default prod; 138 - PF2 default - prod; 139 PF3 default prod; 140 - PF0 - ATTN prod; 141 - PF1 - ATTN prod; - 142 - PF2 - ATTN prod; 143 - PF3 - ATTN prod; 144-147 reserved. E1.5 mode - - In backward compatible mode; for non default SB; each even line in the - memory holds the U producer and each odd line hold the C producer. The - first 128 producer are for NDSB (PF0 - 0-31; PF1 - 32-63 and so on). The - last 20 producers are for the DSB for each PF. each PF has five segments - (the order inside each segment is PF0; PF1; PF2; PF3) - 128-131 U prods; - 132-135 C prods; 136-139 X prods; 140-143 T prods; 144-147 ATTN prods; */ + * memory; 136 - PF0 default prod; 137 PF1 default prod; 138 - PF2 default + * prod; 139 PF3 default prod; 140 - PF0 - ATTN prod; 141 - PF1 - ATTN prod; + * 142 - PF2 - ATTN prod; 143 - PF3 - ATTN prod; 144-147 reserved. E1.5 mode + * - In backward compatible mode; for non default SB; each even line in the + * memory holds the U producer and each odd line hold the C producer. The + * first 128 producer are for NDSB (PF0 - 0-31; PF1 - 32-63 and so on). The + * last 20 producers are for the DSB for each PF. each PF has five segments + * (the order inside each segment is PF0; PF1; PF2; PF3) - 128-131 U prods; + * 132-135 C prods; 136-139 X prods; 140-143 T prods; 144-147 ATTN prods; */ #define IGU_REG_PROD_CONS_MEMORY 0x132000 /* [R 3] Debug: pxp_arb_fsm */ #define IGU_REG_PXP_ARB_FSM 0x130068 /* [RW 6] Write one for each bit will reset the appropriate memory. When the - memory reset finished the appropriate bit will be clear. Bit 0 - mapping - memory; Bit 1 - SB memory; Bit 2 - SB interrupt and mask register; Bit 3 - - MSIX memory; Bit 4 - PBA memory; Bit 5 - statistics; */ + * memory reset finished the appropriate bit will be clear. Bit 0 - mapping + * memory; Bit 1 - SB memory; Bit 2 - SB interrupt and mask register; Bit 3 + * - MSIX memory; Bit 4 - PBA memory; Bit 5 - statistics; */ #define IGU_REG_RESET_MEMORIES 0x130158 /* [R 4] Debug: sb_ctrl_fsm */ #define IGU_REG_SB_CTRL_FSM 0x13004c @@ -997,456 +503,275 @@ #define IGU_REG_SB_MASK_LSB 0x130164 #define IGU_REG_SB_MASK_MSB 0x130168 /* [RW 16] Number of command that were dropped without causing an interrupt - due to: read access for WO BAR address; or write access for RO BAR - address or any access for reserved address or PCI function error is set - and address is not MSIX; PBA or cleanup */ + * due to: read access for WO BAR address; or write access for RO BAR + * address or any access for reserved address or PCI function error is set + * and address is not MSIX; PBA or cleanup */ #define IGU_REG_SILENT_DROP 0x13016c /* [RW 10] Number of MSI/MSIX/ATTN messages sent for the function: 0-63 - - number of MSIX messages per VF; 64-67 - number of MSI/MSIX messages per - PF; 68-71 number of ATTN messages per PF */ + * number of MSIX messages per VF; 64-67 - number of MSI/MSIX messages per + * PF; 68-71 number of ATTN messages per PF */ #define IGU_REG_STATISTIC_NUM_MESSAGE_SENT 0x130800 -/* [RW 32] Number of cycles the timer mask masking the IGU interrupt when a - timer mask command arrives. Value must be bigger than 100. */ -#define IGU_REG_TIMER_MASKING_VALUE 0x13003c #define IGU_REG_TRAILING_EDGE_LATCH 0x130104 #define IGU_REG_VF_CONFIGURATION 0x130170 /* [WB_R 32] Each bit represent write done pending bits status for that SB - (MSI/MSIX message was sent and write done was not received yet). 0 = - clear; 1 = set. Data valid only in addresses 0-4. all the rest are zero. */ + * (MSI/MSIX message was sent and write done was not received yet). 0 = + * clear; 1 = set. Data valid only in addresses 0-4. all the rest are zero. */ #define IGU_REG_WRITE_DONE_PENDING 0x130480 #define MCP_A_REG_MCPR_SCRATCH 0x3a0000 +#define MCP_REG_MCPR_ACCESS_LOCK 0x8009c +#define MCP_REG_MCPR_CPU_PROGRAM_COUNTER 0x8501c +#define MCP_REG_MCPR_GP_INPUTS 0x800c0 +#define MCP_REG_MCPR_GP_OENABLE 0x800c8 +#define MCP_REG_MCPR_GP_OUTPUTS 0x800c4 +#define MCP_REG_MCPR_IMC_COMMAND 0x85900 +#define MCP_REG_MCPR_IMC_DATAREG0 0x85920 +#define MCP_REG_MCPR_IMC_SLAVE_CONTROL 0x85904 #define MCP_REG_MCPR_NVM_ACCESS_ENABLE 0x86424 #define MCP_REG_MCPR_NVM_ADDR 0x8640c #define MCP_REG_MCPR_NVM_CFG4 0x8642c #define MCP_REG_MCPR_NVM_COMMAND 0x86400 #define MCP_REG_MCPR_NVM_READ 0x86410 -#define MCP_REG_MCPR_NVM_SW_ARB 0x86420 +#define MCP_REG_MCPR_NVM_SW_ARB 0x86420 #define MCP_REG_MCPR_NVM_WRITE 0x86408 #define MCP_REG_MCPR_SCRATCH 0xa0000 #define MISC_AEU_GENERAL_MASK_REG_AEU_NIG_CLOSE_MASK (0x1<<1) #define MISC_AEU_GENERAL_MASK_REG_AEU_PXP_CLOSE_MASK (0x1<<0) /* [R 32] read first 32 bit after inversion of function 0. mapped as - follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; - [6] GPIO1 function 1; [7] GPIO2 function 1; [8] GPIO3 function 1; [9] - GPIO4 function 1; [10] PCIE glue/PXP VPD event function0; [11] PCIE - glue/PXP VPD event function1; [12] PCIE glue/PXP Expansion ROM event0; - [13] PCIE glue/PXP Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] - MSI/X indication for mcp; [17] MSI/X indication for function 1; [18] BRB - Parity error; [19] BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw - interrupt; [22] SRC Parity error; [23] SRC Hw interrupt; [24] TSDM Parity - error; [25] TSDM Hw interrupt; [26] TCM Parity error; [27] TCM Hw - interrupt; [28] TSEMI Parity error; [29] TSEMI Hw interrupt; [30] PBF - Parity error; [31] PBF Hw interrupt; */ + * follows: [0] NIG attention for function0; [1] NIG attention for + * function1; [2] GPIO1 mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; + * [6] GPIO1 function 1; [7] GPIO2 function 1; [8] GPIO3 function 1; [9] + * GPIO4 function 1; [10] PCIE glue/PXP VPD event function0; [11] PCIE + * glue/PXP VPD event function1; [12] PCIE glue/PXP Expansion ROM event0; + * [13] PCIE glue/PXP Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] + * MSI/X indication for mcp; [17] MSI/X indication for function 1; [18] BRB + * Parity error; [19] BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw + * interrupt; [22] SRC Parity error; [23] SRC Hw interrupt; [24] TSDM Parity + * error; [25] TSDM Hw interrupt; [26] TCM Parity error; [27] TCM Hw + * interrupt; [28] TSEMI Parity error; [29] TSEMI Hw interrupt; [30] + * PBClient Parity error; [31] PBClient Hw interrupt; */ #define MISC_REG_AEU_AFTER_INVERT_1_FUNC_0 0xa42c #define MISC_REG_AEU_AFTER_INVERT_1_FUNC_1 0xa430 /* [R 32] read first 32 bit after inversion of mcp. mapped as follows: [0] - NIG attention for function0; [1] NIG attention for function1; [2] GPIO1 - mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; - [7] GPIO2 function 1; [8] GPIO3 function 1; [9] GPIO4 function 1; [10] - PCIE glue/PXP VPD event function0; [11] PCIE glue/PXP VPD event - function1; [12] PCIE glue/PXP Expansion ROM event0; [13] PCIE glue/PXP - Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] MSI/X indication for - mcp; [17] MSI/X indication for function 1; [18] BRB Parity error; [19] - BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC - Parity error; [23] SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw - interrupt; [26] TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI - Parity error; [29] TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw - interrupt; */ -#define MISC_REG_AEU_AFTER_INVERT_1_MCP 0xa434 + * NIG attention for function0; [1] NIG attention for function1; [2] GPIO1 + * mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; + * [7] GPIO2 function 1; [8] GPIO3 function 1; [9] GPIO4 function 1; [10] + * PCIE glue/PXP VPD event function0; [11] PCIE glue/PXP VPD event + * function1; [12] PCIE glue/PXP Expansion ROM event0; [13] PCIE glue/PXP + * Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] MSI/X indication for + * mcp; [17] MSI/X indication for function 1; [18] BRB Parity error; [19] + * BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC + * Parity error; [23] SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw + * interrupt; [26] TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI + * Parity error; [29] TSEMI Hw interrupt; [30] PBClient Parity error; [31] + * PBClient Hw interrupt; */ +#define MISC_REG_AEU_AFTER_INVERT_1_MCP 0xa434 /* [R 32] read second 32 bit after inversion of function 0. mapped as - follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ + * follows: [0] PBF Parity error; [1] PBF Hw interrupt; [2] QM Parity error; + * [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw interrupt; + * [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity error; [9] + * XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw interrupt; [12] + * DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] NIG Parity + * error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; [17] Vaux + * PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw interrupt; + * [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM Parity error; + * [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI Hw interrupt; + * [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM Parity error; + * [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw interrupt; */ #define MISC_REG_AEU_AFTER_INVERT_2_FUNC_0 0xa438 #define MISC_REG_AEU_AFTER_INVERT_2_FUNC_1 0xa43c /* [R 32] read second 32 bit after inversion of mcp. mapped as follows: [0] - PBClient Parity error; [1] PBClient Hw interrupt; [2] QM Parity error; - [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw interrupt; - [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity error; [9] - XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw interrupt; [12] - DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] NIG Parity - error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; [17] Vaux - PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw interrupt; - [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM Parity error; - [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI Hw interrupt; - [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM Parity error; - [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw interrupt; */ -#define MISC_REG_AEU_AFTER_INVERT_2_MCP 0xa440 + * PBF Parity error; [1] PBF Hw interrupt; [2] QM Parity error; [3] QM Hw + * interrupt; [4] Timers Parity error; [5] Timers Hw interrupt; [6] XSDM + * Parity error; [7] XSDM Hw interrupt; [8] XCM Parity error; [9] XCM Hw + * interrupt; [10] XSEMI Parity error; [11] XSEMI Hw interrupt; [12] + * DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] NIG Parity + * error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; [17] Vaux + * PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw interrupt; + * [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM Parity error; + * [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI Hw interrupt; + * [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM Parity error; + * [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw interrupt; */ +#define MISC_REG_AEU_AFTER_INVERT_2_MCP 0xa440 /* [R 32] read third 32 bit after inversion of function 0. mapped as - follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP Parity - error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; [5] - PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ + * follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP Parity + * error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; [5] + * PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw + * interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity + * error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) + * Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] + * pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] + * MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] + * SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW + * timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 + * func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General + * attn1; */ #define MISC_REG_AEU_AFTER_INVERT_3_FUNC_0 0xa444 #define MISC_REG_AEU_AFTER_INVERT_3_FUNC_1 0xa448 /* [R 32] read third 32 bit after inversion of mcp. mapped as follows: [0] - CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP Parity error; [3] PXP - Hw interrupt; [4] PXPpciClockClient Parity error; [5] PXPpciClockClient - Hw interrupt; [6] CFC Parity error; [7] CFC Hw interrupt; [8] CDU Parity - error; [9] CDU Hw interrupt; [10] DMAE Parity error; [11] DMAE Hw - interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) Hw interrupt; [14] - MISC Parity error; [15] MISC Hw interrupt; [16] pxp_misc_mps_attn; [17] - Flash event; [18] SMB event; [19] MCP attn0; [20] MCP attn1; [21] SW - timers attn_1 func0; [22] SW timers attn_2 func0; [23] SW timers attn_3 - func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW timers attn_1 - func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 func1; [29] SW - timers attn_4 func1; [30] General attn0; [31] General attn1; */ -#define MISC_REG_AEU_AFTER_INVERT_3_MCP 0xa44c + * CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP Parity error; [3] PXP + * Hw interrupt; [4] PXPpciClockClient Parity error; [5] PXPpciClockClient + * Hw interrupt; [6] CFC Parity error; [7] CFC Hw interrupt; [8] CDU Parity + * error; [9] CDU Hw interrupt; [10] DMAE Parity error; [11] DMAE Hw + * interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) Hw interrupt; [14] + * MISC Parity error; [15] MISC Hw interrupt; [16] pxp_misc_mps_attn; [17] + * Flash event; [18] SMB event; [19] MCP attn0; [20] MCP attn1; [21] SW + * timers attn_1 func0; [22] SW timers attn_2 func0; [23] SW timers attn_3 + * func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW timers attn_1 + * func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 func1; [29] SW + * timers attn_4 func1; [30] General attn0; [31] General attn1; */ +#define MISC_REG_AEU_AFTER_INVERT_3_MCP 0xa44c /* [R 32] read fourth 32 bit after inversion of function 0. mapped as - follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_AFTER_INVERT_4_FUNC_0 0xa450 #define MISC_REG_AEU_AFTER_INVERT_4_FUNC_1 0xa454 /* [R 32] read fourth 32 bit after inversion of mcp. mapped as follows: [0] - General attn2; [1] General attn3; [2] General attn4; [3] General attn5; - [4] General attn6; [5] General attn7; [6] General attn8; [7] General - attn9; [8] General attn10; [9] General attn11; [10] General attn12; [11] - General attn13; [12] General attn14; [13] General attn15; [14] General - attn16; [15] General attn17; [16] General attn18; [17] General attn19; - [18] General attn20; [19] General attn21; [20] Main power interrupt; [21] - RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN Latched attn; [24] - RBCU Latched attn; [25] RBCP Latched attn; [26] GRC Latched timeout - attention; [27] GRC Latched reserved access attention; [28] MCP Latched - rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP Latched - ump_tx_parity; [31] MCP Latched scpad_parity; */ -#define MISC_REG_AEU_AFTER_INVERT_4_MCP 0xa458 + * General attn2; [1] General attn3; [2] General attn4; [3] General attn5; + * [4] General attn6; [5] General attn7; [6] General attn8; [7] General + * attn9; [8] General attn10; [9] General attn11; [10] General attn12; [11] + * General attn13; [12] General attn14; [13] General attn15; [14] General + * attn16; [15] General attn17; [16] General attn18; [17] General attn19; + * [18] General attn20; [19] General attn21; [20] Main power interrupt; [21] + * RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN Latched attn; [24] + * RBCU Latched attn; [25] RBCP Latched attn; [26] GRC Latched timeout + * attention; [27] GRC Latched reserved access attention; [28] MCP Latched + * rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP Latched + * ump_tx_parity; [31] MCP Latched scpad_parity; */ +#define MISC_REG_AEU_AFTER_INVERT_4_MCP 0xa458 /* [R 32] Read fifth 32 bit after inversion of function 0. Mapped as - follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ + * follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC + * attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] + * mstat0 attention; [7] mstat0 parity; [8] mstat1 attention; [9] mstat1 + * parity; [31-10] Reserved; */ #define MISC_REG_AEU_AFTER_INVERT_5_FUNC_0 0xa700 /* [W 14] write to this register results with the clear of the latched - signals; one in d0 clears RBCR latch; one in d1 clears RBCT latch; one in - d2 clears RBCN latch; one in d3 clears RBCU latch; one in d4 clears RBCP - latch; one in d5 clears GRC Latched timeout attention; one in d6 clears - GRC Latched reserved access attention; one in d7 clears Latched - rom_parity; one in d8 clears Latched ump_rx_parity; one in d9 clears - Latched ump_tx_parity; one in d10 clears Latched scpad_parity (both - ports); one in d11 clears pxpv_misc_mps_attn; one in d12 clears - pxp_misc_exp_rom_attn0; one in d13 clears pxp_misc_exp_rom_attn1; read - from this register return zero */ + * signals; one in d0 clears RBCR latch; one in d1 clears RBCT latch; one in + * d2 clears RBCN latch; one in d3 clears RBCU latch; one in d4 clears RBCP + * latch; one in d5 clears GRC Latched timeout attention; one in d6 clears + * GRC Latched reserved access attention; one in d7 clears Latched + * rom_parity; one in d8 clears Latched ump_rx_parity; one in d9 clears + * Latched ump_tx_parity; one in d10 clears Latched scpad_parity (both + * ports); one in d11 clears pxpv_misc_mps_attn; one in d12 clears + * pxp_misc_exp_rom_attn0; one in d13 clears pxp_misc_exp_rom_attn1; read + * from this register return zero */ #define MISC_REG_AEU_CLR_LATCH_SIGNAL 0xa45c /* [RW 32] first 32b for enabling the output for function 0 output0. mapped - as follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 function 0; [3] GPIO2 function 0; [4] GPIO3 function - 0; [5] GPIO4 function 0; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] - GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for function 0; [17] MSI/X - indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; - [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] - SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] - TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] - TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ + * as follows: [0] NIG attention for function0; [1] NIG attention for + * function1; [2] GPIO1 function 0; [3] GPIO2 function 0; [4] GPIO3 function + * 0; [5] GPIO4 function 0; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] + * GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event + * function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP + * Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] + * SPIO4; [15] SPIO5; [16] MSI/X indication for function 0; [17] MSI/X + * indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; + * [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] + * SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] + * TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] + * TSEMI Hw interrupt; [30] PBClient Parity error; [31] PBClient Hw + * interrupt; */ #define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0 0xa06c #define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_1 0xa07c #define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_2 0xa08c -#define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_3 0xa09c -#define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_5 0xa0bc -#define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_6 0xa0cc -#define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_7 0xa0dc /* [RW 32] first 32b for enabling the output for function 1 output0. mapped - as follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 function 1; [3] GPIO2 function 1; [4] GPIO3 function - 1; [5] GPIO4 function 1; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] - GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for function 1; [17] MSI/X - indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; - [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] - SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] - TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] - TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ + * as follows: [0] NIG attention for function0; [1] NIG attention for + * function1; [2] GPIO1 function 1; [3] GPIO2 function 1; [4] GPIO3 function + * 1; [5] GPIO4 function 1; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] + * GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event + * function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP + * Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] + * SPIO4; [15] SPIO5; [16] MSI/X indication for function 1; [17] MSI/X + * indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; + * [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] + * SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] + * TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] + * TSEMI Hw interrupt; [30] PBClient Parity error; [31] PBClient Hw + * interrupt; */ #define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 0xa10c #define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_1 0xa11c #define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_2 0xa12c -#define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_3 0xa13c -#define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_5 0xa15c -#define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_6 0xa16c -#define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_7 0xa17c -/* [RW 32] first 32b for enabling the output for close the gate nig. Mapped - as follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 function 0; [3] GPIO2 function 0; [4] GPIO3 function - 0; [5] GPIO4 function 0; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] - GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for function 0; [17] MSI/X - indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; - [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] - SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] - TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] - TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ -#define MISC_REG_AEU_ENABLE1_NIG_0 0xa0ec -#define MISC_REG_AEU_ENABLE1_NIG_1 0xa18c -/* [RW 32] first 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 function 0; [3] GPIO2 function 0; [4] GPIO3 function - 0; [5] GPIO4 function 0; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] - GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for function 0; [17] MSI/X - indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; - [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] - SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] - TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] - TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ -#define MISC_REG_AEU_ENABLE1_PXP_0 0xa0fc -#define MISC_REG_AEU_ENABLE1_PXP_1 0xa19c -/* [RW 32] second 32b for enabling the output for function 0 output0. mapped - as follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ -#define MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0 0xa070 -#define MISC_REG_AEU_ENABLE2_FUNC_0_OUT_1 0xa080 -/* [RW 32] second 32b for enabling the output for function 1 output0. mapped - as follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ -#define MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0 0xa110 -#define MISC_REG_AEU_ENABLE2_FUNC_1_OUT_1 0xa120 -/* [RW 32] second 32b for enabling the output for close the gate nig. Mapped - as follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ -#define MISC_REG_AEU_ENABLE2_NIG_0 0xa0f0 -#define MISC_REG_AEU_ENABLE2_NIG_1 0xa190 -/* [RW 32] second 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ -#define MISC_REG_AEU_ENABLE2_PXP_0 0xa100 -#define MISC_REG_AEU_ENABLE2_PXP_1 0xa1a0 -/* [RW 32] third 32b for enabling the output for function 0 output0. mapped - as follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP - Parity error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; - [5] PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ -#define MISC_REG_AEU_ENABLE3_FUNC_0_OUT_0 0xa074 -#define MISC_REG_AEU_ENABLE3_FUNC_0_OUT_1 0xa084 -/* [RW 32] third 32b for enabling the output for function 1 output0. mapped - as follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP - Parity error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; - [5] PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ -#define MISC_REG_AEU_ENABLE3_FUNC_1_OUT_0 0xa114 -#define MISC_REG_AEU_ENABLE3_FUNC_1_OUT_1 0xa124 -/* [RW 32] third 32b for enabling the output for close the gate nig. Mapped - as follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP - Parity error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; - [5] PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ -#define MISC_REG_AEU_ENABLE3_NIG_0 0xa0f4 -#define MISC_REG_AEU_ENABLE3_NIG_1 0xa194 -/* [RW 32] third 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP - Parity error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; - [5] PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ -#define MISC_REG_AEU_ENABLE3_PXP_0 0xa104 -#define MISC_REG_AEU_ENABLE3_PXP_1 0xa1a4 /* [RW 32] fourth 32b for enabling the output for function 0 output0.mapped - as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0 0xa078 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_2 0xa098 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_4 0xa0b8 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_5 0xa0c8 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_6 0xa0d8 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_7 0xa0e8 /* [RW 32] fourth 32b for enabling the output for function 1 output0.mapped - as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0 0xa118 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_2 0xa138 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_4 0xa158 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_5 0xa168 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_6 0xa178 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_7 0xa188 /* [RW 32] fourth 32b for enabling the output for close the gate nig. Mapped - as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_NIG_0 0xa0f8 #define MISC_REG_AEU_ENABLE4_NIG_1 0xa198 /* [RW 32] fourth 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_PXP_0 0xa108 #define MISC_REG_AEU_ENABLE4_PXP_1 0xa1a8 /* [RW 32] fifth 32b for enabling the output for function 0 output0. Mapped - as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ + * as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC + * attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] + * mstat0 attention; [7] mstat0 parity; [8] mstat1 attention; [9] mstat1 + * parity; [31-10] Reserved; */ #define MISC_REG_AEU_ENABLE5_FUNC_0_OUT_0 0xa688 -#define MISC_REG_AEU_ENABLE5_FUNC_0_OUT_1 0xa68c /* [RW 32] Fifth 32b for enabling the output for function 1 output0. Mapped - as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ + * as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC + * attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] + * mstat0 attention; [7] mstat0 parity; [8] mstat1 attention; [9] mstat1 + * parity; [31-10] Reserved; */ #define MISC_REG_AEU_ENABLE5_FUNC_1_OUT_0 0xa6b0 -#define MISC_REG_AEU_ENABLE5_FUNC_1_OUT_1 0xa6b4 -/* [RW 32] Fifth 32b for enabling the output for close the gate nig. Mapped - as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ -#define MISC_REG_AEU_ENABLE5_NIG_0 0xa6a8 -/* [RW 32] Fifth 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; 6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ -#define MISC_REG_AEU_ENABLE5_PXP_0 0xa6ac -#define MISC_REG_AEU_ENABLE5_PXP_1 0xa6d0 /* [RW 1] set/clr general attention 0; this will set/clr bit 94 in the aeu - 128 bit vector */ + * 128 bit vector */ #define MISC_REG_AEU_GENERAL_ATTN_0 0xa000 #define MISC_REG_AEU_GENERAL_ATTN_1 0xa004 #define MISC_REG_AEU_GENERAL_ATTN_10 0xa028 #define MISC_REG_AEU_GENERAL_ATTN_11 0xa02c #define MISC_REG_AEU_GENERAL_ATTN_12 0xa030 -#define MISC_REG_AEU_GENERAL_ATTN_13 0xa034 -#define MISC_REG_AEU_GENERAL_ATTN_14 0xa038 -#define MISC_REG_AEU_GENERAL_ATTN_15 0xa03c -#define MISC_REG_AEU_GENERAL_ATTN_16 0xa040 -#define MISC_REG_AEU_GENERAL_ATTN_17 0xa044 -#define MISC_REG_AEU_GENERAL_ATTN_18 0xa048 -#define MISC_REG_AEU_GENERAL_ATTN_19 0xa04c #define MISC_REG_AEU_GENERAL_ATTN_2 0xa008 -#define MISC_REG_AEU_GENERAL_ATTN_20 0xa050 -#define MISC_REG_AEU_GENERAL_ATTN_21 0xa054 #define MISC_REG_AEU_GENERAL_ATTN_3 0xa00c #define MISC_REG_AEU_GENERAL_ATTN_4 0xa010 #define MISC_REG_AEU_GENERAL_ATTN_5 0xa014 @@ -1455,428 +780,456 @@ #define MISC_REG_AEU_GENERAL_ATTN_8 0xa020 #define MISC_REG_AEU_GENERAL_ATTN_9 0xa024 #define MISC_REG_AEU_GENERAL_MASK 0xa61c -/* [RW 32] first 32b for inverting the input for function 0; for each bit: - 0= do not invert; 1= invert; mapped as follows: [0] NIG attention for - function0; [1] NIG attention for function1; [2] GPIO1 mcp; [3] GPIO2 mcp; - [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; [7] GPIO2 function 1; - [8] GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for mcp; [17] MSI/X indication - for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; [20] PRS - Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] SRC Hw - interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] TCM - Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] TSEMI - Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ -#define MISC_REG_AEU_INVERTER_1_FUNC_0 0xa22c -#define MISC_REG_AEU_INVERTER_1_FUNC_1 0xa23c -/* [RW 32] Fifth 32b for inverting the input for function 0; Mapped as - follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ -#define MISC_REG_AEU_INVERTER_5_FUNC_0 0xa6f4 -#define MISC_REG_AEU_INVERTER_5_FUNC_1 0xa6f8 /* [RW 10] [7:0] = mask 8 attention output signals toward IGU function0; - [9:8] = reserved. 0 = mask; 1 = unmask */ + * [9:8] = reserved. 0 = mask; 1 = unmask */ #define MISC_REG_AEU_MASK_ATTN_FUNC_0 0xa060 #define MISC_REG_AEU_MASK_ATTN_FUNC_1 0xa064 /* [RW 1] If set a system kill occurred. Reset on POR reset. */ #define MISC_REG_AEU_SYS_KILL_OCCURRED 0xa610 /* [RW 32] Represent the status of the input vector to the AEU when a system - kill occurred. The register is reset in por reset. Mapped as follows: [0] - NIG attention for function0; [1] NIG attention for function1; [2] GPIO1 - mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; - [7] GPIO2 function 1; [8] GPIO3 function 1; [9] GPIO4 function 1; [10] - PCIE glue/PXP VPD event function0; [11] PCIE glue/PXP VPD event - function1; [12] PCIE glue/PXP Expansion ROM event0; [13] PCIE glue/PXP - Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] MSI/X indication for - mcp; [17] MSI/X indication for function 1; [18] BRB Parity error; [19] - BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC - Parity error; [23] SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw - interrupt; [26] TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI - Parity error; [29] TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw - interrupt. Reset on POR reset. */ + * kill occurred. The register is reset in por reset. Mapped as follows: [0] + * NIG attention for function0; [1] NIG attention for function1; [2] GPIO1 + * mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; + * [7] GPIO2 function 1; [8] GPIO3 function 1; [9] GPIO4 function 1; [10] + * PCIE glue/PXP VPD event function0; [11] PCIE glue/PXP VPD event + * function1; [12] PCIE glue/PXP Expansion ROM event0; [13] PCIE glue/PXP + * Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] MSI/X indication for + * mcp; [17] MSI/X indication for function 1; [18] BRB Parity error; [19] + * BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC + * Parity error; [23] SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw + * interrupt; [26] TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI + * Parity error; [29] TSEMI Hw interrupt; [30] PBClient Parity error; [31] + * PBClient Hw interrupt. Reset on POR reset. */ #define MISC_REG_AEU_SYS_KILL_STATUS_0 0xa600 #define MISC_REG_AEU_SYS_KILL_STATUS_1 0xa604 #define MISC_REG_AEU_SYS_KILL_STATUS_2 0xa608 #define MISC_REG_AEU_SYS_KILL_STATUS_3 0xa60c -/* [R 4] This field indicates the type of the device. '0' - 2 Ports; '1' - 1 - Port. Global register. */ +/* [R 32] This field indicates the type of the device. '0' - 2 Ports; '1' - + * 1 Port. Global register. */ #define MISC_REG_BOND_ID 0xa400 /* [R 8] These bits indicate the metal revision of the chip. This value - starts at 0x00 for each all-layer tape-out and increments by one for each - tape-out. Global register. */ + * starts at 0x00 for each all-layer tape-out and increments by one for each + * tape-out. Global register. */ #define MISC_REG_CHIP_METAL 0xa404 /* [R 16] These bits indicate the part number for the chip. Global register. */ #define MISC_REG_CHIP_NUM 0xa408 /* [R 4] These bits indicate the base revision of the chip. This value - starts at 0x0 for the A0 tape-out and increments by one for each - all-layer tape-out. Global register. */ + * starts at 0x0 for the A0 tape-out and increments by one for each + * all-layer tape-out. Global register. */ #define MISC_REG_CHIP_REV 0xa40c +/* [R 14] otp_misc_do[100:0] spare bits collection: 13:11- + * otp_misc_do[100:98]; 10:7 - otp_misc_do[87:84]; 6:3 - otp_misc_do[75:72]; + * 2:1 - otp_misc_do[51:50]; 0 - otp_misc_do[1]. */ +#define MISC_REG_CHIP_TYPE 0xac60 +#define MISC_REG_CHIP_TYPE_57811_MASK (1<<1) /* [RW 32] The following driver registers(1...16) represent 16 drivers and - 32 clients. Each client can be controlled by one driver only. One in each - bit represent that this driver control the appropriate client (Ex: bit 5 - is set means this driver control client number 5). addr1 = set; addr0 = - clear; read from both addresses will give the same result = status. write - to address 1 will set a request to control all the clients that their - appropriate bit (in the write command) is set. if the client is free (the - appropriate bit in all the other drivers is clear) one will be written to - that driver register; if the client isn't free the bit will remain zero. - if the appropriate bit is set (the driver request to gain control on a - client it already controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW - interrupt will be asserted). write to address 0 will set a request to - free all the clients that their appropriate bit (in the write command) is - set. if the appropriate bit is clear (the driver request to free a client - it doesn't controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW interrupt will - be asserted). */ + * 32 clients. Each client can be controlled by one driver only. One in each + * bit represent that this driver control the appropriate client (Ex: bit 5 + * is set means this driver control client number 5). addr1 = set; addr0 = + * clear; read from both addresses will give the same result = status. write + * to address 1 will set a request to control all the clients that their + * appropriate bit (in the write command) is set. if the client is free (the + * appropriate bit in all the other drivers is clear) one will be written to + * that driver register; if the client isn't free the bit will remain zero. + * if the appropriate bit is set (the driver request to gain control on a + * client it already controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW + * interrupt will be asserted). write to address 0 will set a request to + * free all the clients that their appropriate bit (in the write command) is + * set. if the appropriate bit is clear (the driver request to free a client + * it doesn't controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW interrupt will + * be asserted). */ #define MISC_REG_DRIVER_CONTROL_1 0xa510 #define MISC_REG_DRIVER_CONTROL_7 0xa3c8 -/* [RW 1] multifunction for WOL. If clr WOL signal of the PXP will be send - on bit 0 only. Global register. Reset on hard reset. */ -#define MISC_REG_E1HMF_MODE 0xa5f8 +/* [R 1] Status of four port mode path swap input pin. */ +#define MISC_REG_FOUR_PORT_PATH_SWAP 0xa75c +/* [RW 2] 4 port path swap overwrite.[0] - Overwrite control; if it is 0 - + * the path_swap output is equal to 4 port mode path swap input pin; if it + * is 1 - the path_swap output is equal to bit[1] of this register; [1] - + * Overwrite value. If bit[0] of this register is 1 this is the value that + * receives the path_swap output. Reset on Hard reset. */ +#define MISC_REG_FOUR_PORT_PATH_SWAP_OVWR 0xa738 +/* [R 1] Status of 4 port mode port swap input pin. */ +#define MISC_REG_FOUR_PORT_PORT_SWAP 0xa754 +/* [RW 2] 4 port port swap overwrite.[0] - Overwrite control; if it is 0 - + * the port_swap output is equal to 4 port mode port swap input pin; if it + * is 1 - the port_swap output is equal to bit[1] of this register; [1] - + * Overwrite value. If bit[0] of this register is 1 this is the value that + * receives the port_swap output. Reset on Hard reset. */ +#define MISC_REG_FOUR_PORT_PORT_SWAP_OVWR 0xa734 /* [RW 32] Debug only: spare RW register reset by core reset. Global - register. Reset on core reset. */ + * register. Reset on core reset. */ #define MISC_REG_GENERIC_CR_0 0xa460 #define MISC_REG_GENERIC_CR_1 0xa464 -/* [RW 32] Debug only: spare RW register reset by hard reset. Global - register. */ -#define MISC_REG_GENERIC_HW_0 0xa468 /* [RW 32] Debug only: spare RW register reset by por reset. Global - register. Reset on POR reset. */ + * register. Reset on POR reset. */ #define MISC_REG_GENERIC_POR_1 0xa474 +/* [RW 32] Bit[0]: EPIO MODE SEL: Setting this bit to 1 will allow SW/FW to + * use all of the 32 Extended GPIO pins. Without setting this bit; an EPIO + * can not be configured as an output. Each output has its output enable in + * the MCP register space; but this bit needs to be set to make use of that. + * Bit[3:1] spare. Bit[4]: WCVTMON_PWRDN: Powerdown for Warpcore VTMON. When + * set to 1 - Powerdown. Bit[5]: WCVTMON_RESETB: Reset for Warpcore VTMON. + * When set to 0 - vTMON is in reset. Bit[6]: setting this bit will change + * the i/o to an output and will drive the TimeSync output. Bit[31:7]: + * spare. Global register. Reset by hard reset. */ +#define MISC_REG_GEN_PURP_HWG 0xa9a0 /* [RW 32] GPIO. [31-28] FLOAT port 0; [27-24] FLOAT port 0; When any of - these bits is written as a '1'; the corresponding GPIO bit will turn off - it's drivers and become an input. This is the reset state of all GPIO - pins. The read value of these bits will be a '1' if that last command - (#SET; #CLR; or #FLOAT) for this bit was a #FLOAT. (reset value 0xff). - [23-20] CLR port 1; 19-16] CLR port 0; When any of these bits is written - as a '1'; the corresponding GPIO bit will drive low. The read value of - these bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for - this bit was a #CLR. (reset value 0). [15-12] SET port 1; 11-8] port 0; - SET When any of these bits is written as a '1'; the corresponding GPIO - bit will drive high (if it has that capability). The read value of these - bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for this - bit was a #SET. (reset value 0). [7-4] VALUE port 1; [3-0] VALUE port 0; - RO; These bits indicate the read value of each of the eight GPIO pins. - This is the result value of the pin; not the drive value. Writing these - bits will have not effect. Global register. */ + * these bits is written as a '1'; the corresponding GPIO bit will turn off + * it's drivers and become an input. This is the reset state of all GPIO + * pins. The read value of these bits will be a '1' if that last command + * (#SET; #CLR; or #FLOAT) for this bit was a #FLOAT. (reset value 0xff). + * [23-20] CLR port 1; 19-16] CLR port 0; When any of these bits is written + * as a '1'; the corresponding GPIO bit will drive low. The read value of + * these bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for + * this bit was a #CLR. (reset value 0). [15-12] SET port 1; 11-8] port 0; + * SET When any of these bits is written as a '1'; the corresponding GPIO + * bit will drive high (if it has that capability). The read value of these + * bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for this + * bit was a #SET. (reset value 0). [7-4] VALUE port 1; [3-0] VALUE port 0; + * RO; These bits indicate the read value of each of the eight GPIO pins. + * This is the result value of the pin; not the drive value. Writing these + * bits will have not effect. Global register. */ #define MISC_REG_GPIO 0xa490 /* [RW 8] These bits enable the GPIO_INTs to signals event to the - IGU/MCP.according to the following map: [0] p0_gpio_0; [1] p0_gpio_1; [2] - p0_gpio_2; [3] p0_gpio_3; [4] p1_gpio_0; [5] p1_gpio_1; [6] p1_gpio_2; - [7] p1_gpio_3; Global register. */ + * IGU/MCP.according to the following map: [0] p0_gpio_0; [1] p0_gpio_1; [2] + * p0_gpio_2; [3] p0_gpio_3; [4] p1_gpio_0; [5] p1_gpio_1; [6] p1_gpio_2; + * [7] p1_gpio_3; Global register. */ #define MISC_REG_GPIO_EVENT_EN 0xa2bc /* [RW 32] GPIO INT. [31-28] OLD_CLR port1; [27-24] OLD_CLR port0; Writing a - '1' to these bit clears the corresponding bit in the #OLD_VALUE register. - This will acknowledge an interrupt on the falling edge of corresponding - GPIO input (reset value 0). [23-16] OLD_SET [23-16] port1; OLD_SET port0; - Writing a '1' to these bit sets the corresponding bit in the #OLD_VALUE - register. This will acknowledge an interrupt on the rising edge of - corresponding GPIO input (reset value 0). [15-12] OLD_VALUE [11-8] port1; - OLD_VALUE port0; RO; These bits indicate the old value of the GPIO input - value. When the ~INT_STATE bit is set; this bit indicates the OLD value - of the pin such that if ~INT_STATE is set and this bit is '0'; then the - interrupt is due to a low to high edge. If ~INT_STATE is set and this bit - is '1'; then the interrupt is due to a high to low edge (reset value 0). - [7-4] INT_STATE port1; [3-0] INT_STATE RO port0; These bits indicate the - current GPIO interrupt state for each GPIO pin. This bit is cleared when - the appropriate #OLD_SET or #OLD_CLR command bit is written. This bit is - set when the GPIO input does not match the current value in #OLD_VALUE - (reset value 0). Global register. */ + * '1' to these bit clears the corresponding bit in the #OLD_VALUE register. + * This will acknowledge an interrupt on the falling edge of corresponding + * GPIO input (reset value 0). [23-16] OLD_SET [23-16] port1; OLD_SET port0; + * Writing a '1' to these bit sets the corresponding bit in the #OLD_VALUE + * register. This will acknowledge an interrupt on the rising edge of + * corresponding GPIO input (reset value 0). [15-12] OLD_VALUE [11-8] port1; + * OLD_VALUE port0; RO; These bits indicate the old value of the GPIO input + * value. When the ~INT_STATE bit is set; this bit indicates the OLD value + * of the pin such that if ~INT_STATE is set and this bit is '0'; then the + * interrupt is due to a low to high edge. If ~INT_STATE is set and this bit + * is '1'; then the interrupt is due to a high to low edge (reset value 0). + * [7-4] INT_STATE port1; [3-0] INT_STATE RO port0; These bits indicate the + * current GPIO interrupt state for each GPIO pin. This bit is cleared when + * the appropriate #OLD_SET or #OLD_CLR command bit is written. This bit is + * set when the GPIO input does not match the current value in #OLD_VALUE + * (reset value 0). Global register. */ #define MISC_REG_GPIO_INT 0xa494 /* [R 28] this field hold the last information that caused reserved - attention. bits [19:0] - address; [22:20] function; [23] reserved; - [27:24] the master that caused the attention - according to the following - encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = - dbu; 8 = dmae */ + * attention. bits [19:0] - address; [22:20] function; [23] reserved; + * [27:24] the master that caused the attention - according to the following + * encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = + * dbu; 8 = dmae */ #define MISC_REG_GRC_RSV_ATTN 0xa3c0 /* [R 28] this field hold the last information that caused timeout - attention. bits [19:0] - address; [22:20] function; [23] reserved; - [27:24] the master that caused the attention - according to the following - encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = - dbu; 8 = dmae */ + * attention. bits [19:0] - address; [22:20] function; [23] reserved; + * [27:24] the master that caused the attention - according to the following + * encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = + * dbu; 8 = dmae */ #define MISC_REG_GRC_TIMEOUT_ATTN 0xa3c4 /* [R 10] Holds the last FID that caused timeout attention. Need to be used - in conjunction with ~misc_registers_timeout_attn; where 3 bits of - function (3 lsb) are also represented. Bit[2:0] - PFID; bit[3] - VFID - valid; bit[9:4] - VFID. Global register. */ + * in conjunction with ~misc_registers_timeout_attn; where 3 bits of + * function (3 lsb) are also represented. Bit[2:0] - PFID; bit[3] - VFID + * valid; bit[9:4] - VFID. Global register. */ #define MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID 0xa714 -/* [RW 1] Setting this bit enables a timer in the GRC block to timeout any - access that does not finish within - ~misc_registers_grc_timout_val.grc_timeout_val cycles. When this bit is - cleared; this timeout is disabled. If this timeout occurs; the GRC shall - assert it attention output. */ -#define MISC_REG_GRC_TIMEOUT_EN 0xa280 -/* [RW 28] 28 LSB of LCPLL first register; reset val = 521. inside order of - the bits is: [2:0] OAC reset value 001) CML output buffer bias control; - 111 for +40%; 011 for +20%; 001 for 0%; 000 for -20%. [5:3] Icp_ctrl - (reset value 001) Charge pump current control; 111 for 720u; 011 for - 600u; 001 for 480u and 000 for 360u. [7:6] Bias_ctrl (reset value 00) - Global bias control; When bit 7 is high bias current will be 10 0gh; When - bit 6 is high bias will be 100w; Valid values are 00; 10; 01. [10:8] - Pll_observe (reset value 010) Bits to control observability. bit 10 is - for test bias; bit 9 is for test CK; bit 8 is test Vc. [12:11] Vth_ctrl - (reset value 00) Comparator threshold control. 00 for 0.6V; 01 for 0.54V - and 10 for 0.66V. [13] pllSeqStart (reset value 0) Enables VCO tuning - sequencer: 1= sequencer disabled; 0= sequencer enabled (inverted - internally). [14] reserved (reset value 0) Reset for VCO sequencer is - connected to RESET input directly. [15] capRetry_en (reset value 0) - enable retry on cap search failure (inverted). [16] freqMonitor_e (reset - value 0) bit to continuously monitor vco freq (inverted). [17] - freqDetRestart_en (reset value 0) bit to enable restart when not freq - locked (inverted). [18] freqDetRetry_en (reset value 0) bit to enable - retry on freq det failure(inverted). [19] pllForceFdone_en (reset value - 0) bit to enable pllForceFdone & pllForceFpass into pllSeq. [20] - pllForceFdone (reset value 0) bit to force freqDone. [21] pllForceFpass - (reset value 0) bit to force freqPass. [22] pllForceDone_en (reset value - 0) bit to enable pllForceCapDone. [23] pllForceCapDone (reset value 0) - bit to force capDone. [24] pllForceCapPass_en (reset value 0) bit to - enable pllForceCapPass. [25] pllForceCapPass (reset value 0) bit to force - capPass. [26] capRestart (reset value 0) bit to force cap sequencer to - restart. [27] capSelectM_en (reset value 0) bit to enable cap select - register bits. Global register. */ -#define MISC_REG_LCPLL_CTRL_1 0xa2a4 +/* [RW 1] LCPLL power down. Global register. Active High. Reset on POR + * reset. */ +#define MISC_REG_LCPLL_E40_PWRDWN 0xaa74 +/* [RW 1] LCPLL VCO reset. Global register. Active Low Reset on POR reset. */ +#define MISC_REG_LCPLL_E40_RESETB_ANA 0xaa78 +/* [RW 1] LCPLL post-divider reset. Global register. Active Low Reset on POR + * reset. */ +#define MISC_REG_LCPLL_E40_RESETB_DIG 0xaa7c /* [RW 8] Interrupt mask register #0 read/write */ #define MISC_REG_MISC_INT_MASK 0xa388 /* [RW 1] Parity mask register #0 read/write */ -#define MISC_REG_MISC_PRTY_MASK 0xa398 +#define MISC_REG_MISC_PRTY_MASK 0xa398 /* [R 1] Parity register #0 read */ #define MISC_REG_MISC_PRTY_STS 0xa38c -#define MISC_REG_NIG_WOL_P0 0xa270 -#define MISC_REG_NIG_WOL_P1 0xa274 +/* [RC 1] Parity register #0 read clear */ +#define MISC_REG_MISC_PRTY_STS_CLR 0xa390 /* [R 1] If set indicate that the pcie_rst_b was asserted without perst - assertion. Global register. */ -#define MISC_REG_PCIE_HOT_RESET 0xa618 -/* [RW 32] UNUSED for E65 */ -#define MISC_REG_PLL_STORM_CTRL_1 0xa294 -#define MISC_REG_PLL_STORM_CTRL_2 0xa298 -#define MISC_REG_PLL_STORM_CTRL_3 0xa29c -#define MISC_REG_PLL_STORM_CTRL_4 0xa2a0 + * assertion. Global register. */ +#define MISC_REG_PCIE_HOT_RESET 0xa618 /* [R 1] Status of 4 port mode enable input pin. */ #define MISC_REG_PORT4MODE_EN 0xa750 /* [RW 2] 4 port mode enable overwrite.[0] - Overwrite control; if it is 0 - - the port4mode_en output is equal to 4 port mode input pin; if it is 1 - - the port4mode_en output is equal to bit[1] of this register; [1] - - Overwrite value. If bit[0] of this register is 1 this is the value that - receives the port4mode_en output . */ + * the port4mode_en output is equal to 4 port mode input pin; if it is 1 - + * the port4mode_en output is equal to bit[1] of this register; [1] - + * Overwrite value. If bit[0] of this register is 1 this is the value that + * receives the port4mode_en output. Reset on Hard reset. */ #define MISC_REG_PORT4MODE_EN_OVWR 0xa720 -/* [RW 32] reset reg#2; rite/read one = the specific block is out of reset; - write/read zero = the specific block is in reset; addr 0-wr- the write - value will be written to the register; addr 1-set - one will be written - to all the bits that have the value of one in the data written (bits that - have the value of zero will not be change) ; addr 2-clear - zero will be - written to all the bits that have the value of one in the data written - (bits that have the value of zero will not be change); addr 3-ignore; - read ignore from all addr except addr 00; inside order of the bits is: - [0] rst_bmac0; [1] rst_bmac1; [2] rst_emac0; [3] rst_emac1; [4] - rst_grc(global register); [5] rst_mcp_n_reset_reg_hard_core (global - register); [6] rst_mcp_n_hard_core_rst_b(global register); [7] - rst_mcp_n_reset_cmn_cpu(global register); [8] - rst_mcp_n_reset_cmn_core(global register); [9] rst_rbcn; [10] rst_dbg; - [11] rst_misc_core(global register); [12] rst_dbue (UART)(global - register); [13] Pci_resetmdio_n(global register); [14] - rst_emac0_hard_core; [15] rst_emac1_hard_core; 16] rst_pxp_rq_rd_wr; 17] - rst_atc; 18] rst_cnig; 19] rst_pglc (global register); 31:20] reserved */ +/* [RW 32] reset reg#1; rite/read one = the specific block is out of reset; + * write/read zero = the specific block is in reset; addr 0-wr- the write + * value will be written to the register; addr 1-set - one will be written + * to all the bits that have the value of one in the data written (bits that + * have the value of zero will not be change) ; addr 2-clear - zero will be + * written to all the bits that have the value of one in the data written + * (bits that have the value of zero will not be change); addr 3-ignore; + * read ignore from all addr except addr 00; inside order of the bits is: + * [0] rst_brb1; [1] rst_prs; [2] rst_src; [3] rst_tsdm; [4] rst_tsem; [5] + * rst_tcm; [6] rst_rbcr; [7] rst_nig; [8] rst_usdm; [9] rst_ucm; [10] + * rst_usem; [11] rst_upb; [12] rst_ccm; [13] rst_csem; [14] rst_csdm; [15] + * rst_rbcu; [16] rst_pbf; [17] rst_qm; [18] rst_tm; [19] rst_dorq; [20] + * rst_xcm; [21] rst_xsdm; [22] rst_xsem; [23] rst_rbct; [24] rst_cdu; [25] + * rst_cfc; [26] rst_pxp_hst; [27] rst_pxpv (global register); [28] + * rst_rbcp; [29] rst_hc; [30] rst_dmae; [31] rst_semi_rtc; */ +#define MISC_REG_RESET_REG_1 0xa580 #define MISC_REG_RESET_REG_2 0xa590 -#define MISC_REG_RESET_REG_3 0xa5a0 /* [RW 22] 22 bit GRC address where the scratch-pad of the MCP that is - shared with the driver resides */ + * shared with the driver resides */ #define MISC_REG_SHARED_MEM_ADDR 0xa2b4 /* [RW 32] SPIO. [31-24] FLOAT When any of these bits is written as a '1'; - the corresponding SPIO bit will turn off it's drivers and become an - input. This is the reset state of all SPIO pins. The read value of these - bits will be a '1' if that last command (#SET; #CL; or #FLOAT) for this - bit was a #FLOAT. (reset value 0xff). [23-16] CLR When any of these bits - is written as a '1'; the corresponding SPIO bit will drive low. The read - value of these bits will be a '1' if that last command (#SET; #CLR; or -#FLOAT) for this bit was a #CLR. (reset value 0). [15-8] SET When any of - these bits is written as a '1'; the corresponding SPIO bit will drive - high (if it has that capability). The read value of these bits will be a - '1' if that last command (#SET; #CLR; or #FLOAT) for this bit was a #SET. - (reset value 0). [7-0] VALUE RO; These bits indicate the read value of - each of the eight SPIO pins. This is the result value of the pin; not the - drive value. Writing these bits will have not effect. Each 8 bits field - is divided as follows: [0] VAUX Enable; when pulsed low; enables supply - from VAUX. (This is an output pin only; the FLOAT field is not applicable - for this pin); [1] VAUX Disable; when pulsed low; disables supply form - VAUX. (This is an output pin only; FLOAT field is not applicable for this - pin); [2] SEL_VAUX_B - Control to power switching logic. Drive low to - select VAUX supply. (This is an output pin only; it is not controlled by - the SET and CLR fields; it is controlled by the Main Power SM; the FLOAT - field is not applicable for this pin; only the VALUE fields is relevant - - it reflects the output value); [3] port swap [4] spio_4; [5] spio_5; [6] - Bit 0 of UMP device ID select; read by UMP firmware; [7] Bit 1 of UMP - device ID select; read by UMP firmware. Global register. */ + * the corresponding SPIO bit will turn off it's drivers and become an + * input. This is the reset state of all SPIO pins. The read value of these + * bits will be a '1' if that last command (#SET; #CL; or #FLOAT) for this + * bit was a #FLOAT. (reset value 0xff). [23-16] CLR When any of these bits + * is written as a '1'; the corresponding SPIO bit will drive low. The read + * value of these bits will be a '1' if that last command (#SET; #CLR; or + * #FLOAT) for this bit was a #CLR. (reset value 0). [15-8] SET When any of + * these bits is written as a '1'; the corresponding SPIO bit will drive + * high (if it has that capability). The read value of these bits will be a + * '1' if that last command (#SET; #CLR; or #FLOAT) for this bit was a #SET. + * (reset value 0). [7-0] VALUE RO; These bits indicate the read value of + * each of the eight SPIO pins. This is the result value of the pin; not the + * drive value. Writing these bits will have not effect. Each 8 bits field + * is divided as follows: [0] VAUX Enable; when pulsed low; enables supply + * from VAUX. (This is an output pin only; the FLOAT field is not applicable + * for this pin); [1] VAUX Disable; when pulsed low; disables supply form + * VAUX. (This is an output pin only; FLOAT field is not applicable for this + * pin); [2] SEL_VAUX_B - Control to power switching logic. Drive low to + * select VAUX supply. (This is an output pin only; it is not controlled by + * the SET and CLR fields; it is controlled by the Main Power SM; the FLOAT + * field is not applicable for this pin; only the VALUE fields is relevant - + * it reflects the output value); [3] port swap [4] spio_4; [5] spio_5; [6] + * Bit 0 of UMP device ID select; read by UMP firmware; [7] Bit 1 of UMP + * device ID select; read by UMP firmware. Global register. */ #define MISC_REG_SPIO 0xa4fc /* [RW 8] These bits enable the SPIO_INTs to signals event to the IGU/MC. - according to the following map: [3:0] reserved; [4] spio_4 [5] spio_5; - [7:6] reserved. Global register. */ + * according to the following map: [3:0] reserved; [4] spio_4 [5] spio_5; + * [7:6] reserved. Global register. */ #define MISC_REG_SPIO_EVENT_EN 0xa2b8 /* [RW 32] SPIO INT. [31-24] OLD_CLR Writing a '1' to these bit clears the - corresponding bit in the #OLD_VALUE register. This will acknowledge an - interrupt on the falling edge of corresponding SPIO input (reset value - 0). [23-16] OLD_SET Writing a '1' to these bit sets the corresponding bit - in the #OLD_VALUE register. This will acknowledge an interrupt on the - rising edge of corresponding SPIO input (reset value 0). [15-8] OLD_VALUE - RO; These bits indicate the old value of the SPIO input value. When the - ~INT_STATE bit is set; this bit indicates the OLD value of the pin such - that if ~INT_STATE is set and this bit is '0'; then the interrupt is due - to a low to high edge. If ~INT_STATE is set and this bit is '1'; then the - interrupt is due to a high to low edge (reset value 0). [7-0] INT_STATE - RO; These bits indicate the current SPIO interrupt state for each SPIO - pin. This bit is cleared when the appropriate #OLD_SET or #OLD_CLR - command bit is written. This bit is set when the SPIO input does not - match the current value in #OLD_VALUE (reset value 0). Global register. */ + * corresponding bit in the #OLD_VALUE register. This will acknowledge an + * interrupt on the falling edge of corresponding SPIO input (reset value + * 0). [23-16] OLD_SET Writing a '1' to these bit sets the corresponding bit + * in the #OLD_VALUE register. This will acknowledge an interrupt on the + * rising edge of corresponding SPIO input (reset value 0). [15-8] OLD_VALUE + * RO; These bits indicate the old value of the SPIO input value. When the + * ~INT_STATE bit is set; this bit indicates the OLD value of the pin such + * that if ~INT_STATE is set and this bit is '0'; then the interrupt is due + * to a low to high edge. If ~INT_STATE is set and this bit is '1'; then the + * interrupt is due to a high to low edge (reset value 0). [7-0] INT_STATE + * RO; These bits indicate the current SPIO interrupt state for each SPIO + * pin. This bit is cleared when the appropriate #OLD_SET or #OLD_CLR + * command bit is written. This bit is set when the SPIO input does not + * match the current value in #OLD_VALUE (reset value 0). Global register. */ #define MISC_REG_SPIO_INT 0xa500 -/* [RW 32] reload value for counter 4 if reload; the value will be reload if - the counter reached zero and the reload bit - (~misc_registers_sw_timer_cfg_4.sw_timer_cfg_4[1] ) is set */ -#define MISC_REG_SW_TIMER_RELOAD_VAL_4 0xa2fc -/* [RW 32] the value of the counter for sw timers1-8. there are 8 addresses - in this register. addres 0 - timer 1; address 1 - timer 2; etc ; address - 7 - timer 8 */ -#define MISC_REG_SW_TIMER_VAL 0xa5c0 +/* [R 1] Status of two port mode path swap input pin. */ +#define MISC_REG_TWO_PORT_PATH_SWAP 0xa758 +/* [RW 2] 2 port swap overwrite.[0] - Overwrite control; if it is 0 - the + * path_swap output is equal to 2 port mode path swap input pin; if it is 1 + * - the path_swap output is equal to bit[1] of this register; [1] - + * Overwrite value. If bit[0] of this register is 1 this is the value that + * receives the path_swap output. Reset on Hard reset. */ +#define MISC_REG_TWO_PORT_PATH_SWAP_OVWR 0xa72c /* [RW 1] Set by the MCP to remember if one or more of the drivers is/are - loaded; 0-prepare; -unprepare. Global register. Reset on hard reset. */ + * loaded; 0-prepare; -unprepare. Global register. Reset on hard reset. */ #define MISC_REG_UNPREPARED 0xa424 -/* [RW 1] 4-port mode control to XGXS; Hardwired ST bits LSB: 0 - clause 45; - 1 - clause 22. Drives output misc_xgxs0_mux_md_st. Global register. */ -#define MISC_REG_XGXS0_CTRL_MD_ST 0xa730 -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_BRCST (0x1<<0) -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_MLCST (0x1<<1) -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_NO_VLAN (0x1<<4) -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST (0x1<<2) -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_VLAN (0x1<<3) -#define NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN (0x1<<0) -#define NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN (0x1<<0) +/* [RW 5] MDIO PHY Address. The WC uses this address to determine whether or + * not it is the recipient of the message on the MDIO interface. The value + * is compared to the value on ctrl_md_devad. Drives output + * misc_xgxs0_phy_addr. Global register. */ +#define MISC_REG_WC0_CTRL_PHY_ADDR 0xa9cc +/* [RW 10] reset reg#3; rite/read one = the specific block is out of reset; + * write/read zero = the specific block is in reset; addr 0-wr- the write + * value will be written to the register; addr 1-set - one will be written + * to all the bits that have the value of one in the data written (bits that + * have the value of zero will not be change) ; addr 2-clear - zero will be + * written to all the bits that have the value of one in the data written + * (bits that have the value of zero will not be change); addr 3-ignore; + * read ignore from all addr except addr 00. [0]: rstb_hw: Active low reset + * which when asserted drives entire WC into the reset state. All flops + * which within WC are driven into an initial state; as well as the analog + * core. Output clocks txck_out; rxck0_10g; and clk_25 will be driven to 0 + * upon its assertion. [1]: iddq. Enables iddq testing where the supply + * current (Idd) is measured in the quiescent state. [2]: pwrdwn: Active + * high control which forces the analog core of the WC into power-down mode; + * and forces digital logic of the WC into reset. Output clock (refclk) + * remains active. [3]: pwrdwn_sd: Power down signal detect. [4]: + * txd10g_fifo_rstb: Transmit 10Gbps FIFO reset; active low. Used to reset + * the transmit FIFO used in xlgmii operation. [8:5]: txd1g_fifo_rstb: + * Transmit 1Gbps FIFO reset; active low. Used to reset the per-lane + * transmit FIFOs used in the mii/gmii operation. [9]: + * txd10g_fifo_rstb_dxgxs1: Transmit 10Gbps DXGXS FIFO reset; active low. + * Used to reset the transmit FIFO used in the DXGXS logic in xlgmii + * operation. Global register. */ +#define MISC_REG_WC0_RESET 0xac30 +/* [RW 2] XMAC Core port mode. Indicates the number of ports on the system + * side. This should be less than or equal to phy_port_mode; if some of the + * ports are not used. This enables reduction of frequency on the core side. + * This is a strap input for the XMAC_MP core. 00 - Single Port Mode; 01 - + * Dual Port Mode; 10 - Tri Port Mode; 11 - Quad Port Mode. This is a strap + * input for the XMAC_MP core; and should be changed only while reset is + * held low. Reset on Hard reset. */ +#define MISC_REG_XMAC_CORE_PORT_MODE 0xa964 +/* [RW 2] XMAC PHY port mode. Indicates the number of ports on the Warp + * Core. This is a strap input for the XMAC_MP core. 00 - Single Port Mode; + * 01 - Dual Port Mode; 1x - Quad Port Mode; This is a strap input for the + * XMAC_MP core; and should be changed only while reset is held low. Reset + * on Hard reset. */ +#define MISC_REG_XMAC_PHY_PORT_MODE 0xa960 +/* [RW 32] 1 [47] Packet Size = 64 Write to this register write bits 31:0. + * Reads from this register will clear bits 31:0. */ +#define MSTAT_REG_RX_STAT_GR64_LO 0x200 +/* [RW 32] 1 [00] Tx Good Packet Count Write to this register write bits + * 31:0. Reads from this register will clear bits 31:0. */ +#define MSTAT_REG_TX_STAT_GTXPOK_LO 0 +#define NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN (0x1<<0) +#define NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN (0x1<<0) #define NIG_MASK_INTERRUPT_PORT0_REG_MASK_EMAC0_MISC_MI_INT (0x1<<0) #define NIG_MASK_INTERRUPT_PORT0_REG_MASK_SERDES0_LINK_STATUS (0x1<<9) -#define NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK10G (0x1<<15) +#define NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK10G (0x1<<15) #define NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK_STATUS (0xf<<18) -/* [RW 1] Input enable for RX_BMAC0 IF */ +/* [R 1] Input enable for RX_BMAC0 IF */ #define NIG_REG_BMAC0_IN_EN 0x100ac -/* [RW 1] output enable for TX_BMAC0 IF */ +/* [R 1] output enable for TX_BMAC0 IF */ #define NIG_REG_BMAC0_OUT_EN 0x100e0 -/* [RW 1] output enable for TX BMAC pause port 0 IF */ +/* [R 1] output enable for TX BMAC pause port 0 IF */ #define NIG_REG_BMAC0_PAUSE_OUT_EN 0x10110 -/* [RW 1] output enable for RX_BMAC0_REGS IF */ +/* [R 1] output enable for RX_BMAC0_REGS IF */ #define NIG_REG_BMAC0_REGS_OUT_EN 0x100e8 /* [RW 1] output enable for RX BRB1 port0 IF */ #define NIG_REG_BRB0_OUT_EN 0x100f8 /* [RW 1] Input enable for TX BRB1 pause port 0 IF */ #define NIG_REG_BRB0_PAUSE_IN_EN 0x100c4 -/* [RW 1] output enable for RX BRB1 port1 IF */ -#define NIG_REG_BRB1_OUT_EN 0x100fc /* [RW 1] Input enable for TX BRB1 pause port 1 IF */ #define NIG_REG_BRB1_PAUSE_IN_EN 0x100c8 -/* [RW 1] output enable for RX BRB1 LP IF */ -#define NIG_REG_BRB_LB_OUT_EN 0x10100 /* [WB_W 90] Debug packet to LP from RBC; Data spelling:[63:0] data; 64] - error; [67:65]eop_bvalid; [68]eop; [69]sop; [70]port_id; 71]flush; - 72:73]-vnic_num; 89:74]-sideband_info */ -#define NIG_REG_DEBUG_PACKET_LB 0x10800 -/* [RW 1] Input enable for TX Debug packet */ -#define NIG_REG_EGRESS_DEBUG_IN_EN 0x100dc + * error; [67:65]eop_bvalid; [68]eop; [69]sop; [70]port_id; 71]flush; + * 72:73]-vnic_num; 89:74]-sideband_info */ +#define NIG_REG_DEBUG_PACKET_LB 0x10800 +/* [R 1] FIFO empty in DEBUG_FIFO in NIG_TX_DBG */ +#define NIG_REG_EGRESS_DEBUG_FIFO_EMPTY 0x10418 +/* [R 1] FIFO empty in DELAY_PBF_FIFO in NIG_RX_PORT0 */ +#define NIG_REG_EGRESS_DELAY0_EMPTY 0x10420 +/* [R 1] FIFO empty in DELAY_PBF_FIFO in NIG_RX_PORT1 */ +#define NIG_REG_EGRESS_DELAY1_EMPTY 0x10428 +/* [R 1] PBF FIFO empty flag. */ +#define NIG_REG_EGRESS_DELAY2_EMPTY 0x1862c +/* [R 1] PBF FIFO empty flag. */ +#define NIG_REG_EGRESS_DELAY3_EMPTY 0x18630 +/* [R 1] PBF FIFO empty flag. */ +#define NIG_REG_EGRESS_DELAY4_EMPTY 0x18634 +/* [R 1] PBF FIFO empty flag. */ +#define NIG_REG_EGRESS_DELAY5_EMPTY 0x18638 /* [RW 1] If 1 - egress drain mode for port0 is active. In this mode all - packets from PBFare not forwarded to the MAC and just deleted from FIFO. - First packet may be deleted from the middle. And last packet will be - always deleted till the end. */ + * packets from PBFare not forwarded to the MAC and just deleted from FIFO. + * First packet may be deleted from the middle. And last packet will be + * always deleted till the end. */ #define NIG_REG_EGRESS_DRAIN0_MODE 0x10060 -/* [RW 1] Output enable to EMAC0 */ +/* [R 1] Output enable to EMAC0 */ #define NIG_REG_EGRESS_EMAC0_OUT_EN 0x10120 /* [RW 1] MAC configuration for packets of port0. If 1 - all packet outputs - to emac for port0; other way to bmac for port0 */ + * to emac for port0; other way to bmac for port0 */ #define NIG_REG_EGRESS_EMAC0_PORT 0x10058 -/* [RW 1] Input enable for TX PBF user packet from IF0 */ -#define NIG_REG_EGRESS_PBF0_IN_EN 0x100cc -/* [RW 1] Input enable for TX PBF user packet from IF1 */ -#define NIG_REG_EGRESS_PBF1_IN_EN 0x100d0 +/* [R 1] FIFO empty in MNG_FIFO in NIG_TX_PORT0 */ +#define NIG_REG_EGRESS_MNG0_FIFO_EMPTY 0x10460 +/* [R 1] FIFO empty in MNG_FIFO in NIG_TX_PORT1 */ +#define NIG_REG_EGRESS_MNG1_FIFO_EMPTY 0x10474 /* [RW 1] Input enable for TX UMP management packet port0 IF */ #define NIG_REG_EGRESS_UMP0_IN_EN 0x100d4 -/* [RW 1] Input enable for RX_EMAC0 IF */ +/* [R 1] Input enable for RX_EMAC0 IF */ #define NIG_REG_EMAC0_IN_EN 0x100a4 -/* [RW 1] output enable for TX EMAC pause port 0 IF */ +/* [R 1] output enable for TX EMAC pause port 0 IF */ #define NIG_REG_EMAC0_PAUSE_OUT_EN 0x10118 /* [R 1] status from emac0. This bit is set when MDINT from either the - EXT_MDINT pin or from the Copper PHY is driven low. This condition must - be cleared in the attached PHY device that is driving the MINT pin. */ + * EXT_MDINT pin or from the Copper PHY is driven low. This condition must + * be cleared in the attached PHY device that is driving the MINT pin. */ #define NIG_REG_EMAC0_STATUS_MISC_MI_INT 0x10494 -/* [WB 48] This address space contains BMAC0 registers. The BMAC registers - are described in appendix A. In order to access the BMAC0 registers; the - base address; NIG_REGISTERS_INGRESS_BMAC0_MEM; Offset: 0x10c00; should be - added to each BMAC register offset */ +/* [R 48] This address space contains BMAC0 registers. The BMAC registers + * are described in appendix A. In order to access the BMAC0 registers; the + * base address; NIG_REGISTERS_INGRESS_BMAC0_MEM; Offset: 0x10c00; should be + * added to each BMAC register offset */ #define NIG_REG_INGRESS_BMAC0_MEM 0x10c00 -/* [WB 48] This address space contains BMAC1 registers. The BMAC registers - are described in appendix A. In order to access the BMAC0 registers; the - base address; NIG_REGISTERS_INGRESS_BMAC1_MEM; Offset: 0x11000; should be - added to each BMAC register offset */ +/* [R 48] This address space contains BMAC1 registers. The BMAC registers + * are described in appendix A. In order to access the BMAC0 registers; the + * base address; NIG_REGISTERS_INGRESS_BMAC1_MEM; Offset: 0x11000; should be + * added to each BMAC register offset */ #define NIG_REG_INGRESS_BMAC1_MEM 0x11000 /* [R 1] FIFO empty in EOP descriptor FIFO of LP in NIG_RX_EOP */ #define NIG_REG_INGRESS_EOP_LB_EMPTY 0x104e0 /* [RW 17] Debug only. RX_EOP_DSCR_lb_FIFO in NIG_RX_EOP. Data - packet_length[13:0]; mac_error[14]; trunc_error[15]; parity[16] */ + * packet_length[13:0]; mac_error[14]; trunc_error[15]; parity[16] */ #define NIG_REG_INGRESS_EOP_LB_FIFO 0x104e4 +/* [R 1] FIFO empty in EOP descriptor FIFO of port 0 in NIG_RX_EOP */ +#define NIG_REG_INGRESS_EOP_PORT0_EMPTY 0x104ec +/* [R 1] FIFO empty in EOP descriptor FIFO of port 1 in NIG_RX_EOP */ +#define NIG_REG_INGRESS_EOP_PORT1_EMPTY 0x104f8 +/* [R 1] FIFO empty in PBF_DELAY_lb_FIFO in NIG_RX_lb */ +#define NIG_REG_INGRESS_LB_PBF_DELAY_EMPTY 0x10508 +/* [R 1] FIFO empty in dscr_fifo in NIG_RX_RMP block */ +#define NIG_REG_INGRESS_RMP0_DSCR_EMPTY 0x10530 +/* [R 1] FIFO empty in dscr_fifo in NIG_RX_RMP block */ +#define NIG_REG_INGRESS_RMP1_DSCR_EMPTY 0x10538 /* [RW 27] 0 - must be active for Everest A0; 1- for Everest B0 when latch - logic for interrupts must be used. Enable per bit of interrupt of - ~latch_status.latch_status */ + * logic for interrupts must be used. Enable per bit of interrupt of + * ~latch_status.latch_status */ #define NIG_REG_LATCH_BC_0 0x16210 /* [RW 27] Latch for each interrupt from Unicore.b[0] - status_emac0_misc_mi_int; b[1] status_emac0_misc_mi_complete; - b[2]status_emac0_misc_cfg_change; b[3]status_emac0_misc_link_status; - b[4]status_emac0_misc_link_change; b[5]status_emac0_misc_attn; - b[6]status_serdes0_mac_crs; b[7]status_serdes0_autoneg_complete; - b[8]status_serdes0_fiber_rxact; b[9]status_serdes0_link_status; - b[10]status_serdes0_mr_page_rx; b[11]status_serdes0_cl73_an_complete; - b[12]status_serdes0_cl73_mr_page_rx; b[13]status_serdes0_rx_sigdet; - b[14]status_xgxs0_remotemdioreq; b[15]status_xgxs0_link10g; - b[16]status_xgxs0_autoneg_complete; b[17]status_xgxs0_fiber_rxact; - b[21:18]status_xgxs0_link_status; b[22]status_xgxs0_mr_page_rx; - b[23]status_xgxs0_cl73_an_complete; b[24]status_xgxs0_cl73_mr_page_rx; - b[25]status_xgxs0_rx_sigdet; b[26]status_xgxs0_mac_crs */ + * status_emac0_misc_mi_int; b[1] status_emac0_misc_mi_complete; + * b[2]status_emac0_misc_cfg_change; b[3]status_emac0_misc_link_status; + * b[4]status_emac0_misc_link_change; b[5]status_emac0_misc_attn; + * b[6]status_serdes0_mac_crs; b[7]status_serdes0_autoneg_complete; + * b[8]status_serdes0_fiber_rxact; b[9]status_serdes0_link_status; + * b[10]status_serdes0_mr_page_rx; b[11]status_serdes0_cl73_an_complete; + * b[12]status_serdes0_cl73_mr_page_rx; b[13]status_serdes0_rx_sigdet; + * b[14]status_xgxs0_remotemdioreq; b[15]status_xgxs0_link10g; + * b[16]status_xgxs0_autoneg_complete; b[17]status_xgxs0_fiber_rxact; + * b[21:18]status_xgxs0_link_status; b[22]status_xgxs0_mr_page_rx; + * b[23]status_xgxs0_cl73_an_complete; b[24]status_xgxs0_cl73_mr_page_rx; + * b[25]status_xgxs0_rx_sigdet; b[26]status_xgxs0_mac_crs */ #define NIG_REG_LATCH_STATUS_0 0x18000 /* [RW 1] led 10g for port 0 */ #define NIG_REG_LED_10G_P0 0x10320 -/* [RW 1] led 10g for port 1 */ -#define NIG_REG_LED_10G_P1 0x10324 /* [RW 1] Port0: This bit is set to enable the use of the - ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 field - defined below. If this bit is cleared; then the blink rate will be about - 8Hz. */ + * ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 field + * defined below. If this bit is cleared; then the blink rate will be about + * 8Hz. */ #define NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 0x10318 /* [RW 12] Port0: Specifies the period of each blink cycle (on + off) for - Traffic LED in milliseconds. Must be a non-zero value. This 12-bit field - is reset to 0x080; giving a default blink period of approximately 8Hz. */ + * Traffic LED in milliseconds. Must be a non-zero value. This 12-bit field + * is reset to 0x080; giving a default blink period of approximately 8Hz. */ #define NIG_REG_LED_CONTROL_BLINK_RATE_P0 0x10310 /* [RW 1] Port0: If set along with the - ~nig_registers_led_control_override_traffic_p0.led_control_override_traffic_p0 - bit and ~nig_registers_led_control_traffic_p0.led_control_traffic_p0 LED - bit; the Traffic LED will blink with the blink rate specified in - ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 and - ~nig_registers_led_control_blink_rate_ena_p0.led_control_blink_rate_ena_p0 - fields. */ + * \ + s_led_control_override_traffic_p0.led_control_override_traffic_p0 + * bit and ~nig_registers_led_control_traffic_p0.led_control_traffic_p0 LED + * bit; the Traffic LED will blink with the blink rate specified in + * ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 and + * ~nig_registers_led_control_blink_rate_ena_p0.led_control_blink_rate_ena_p0 + * fields. */ #define NIG_REG_LED_CONTROL_BLINK_TRAFFIC_P0 0x10308 /* [RW 1] Port0: If set overrides hardware control of the Traffic LED. The - Traffic LED will then be controlled via bit ~nig_registers_ - led_control_traffic_p0.led_control_traffic_p0 and bit - ~nig_registers_led_control_blink_traffic_p0.led_control_blink_traffic_p0 */ -#define NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 0x102f8 + * Traffic LED will then be controlled via bit ~nig_registers_ + * led_control_traffic_p0.led_control_traffic_p0 and bit + * ~nig_registers_led_control_blink_traffic_p0.led_control_blink_traffic_p0 */ +#define NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 0x102f8 /* [RW 1] Port0: If set along with the led_control_override_trafic_p0 bit; - turns on the Traffic LED. If the led_control_blink_traffic_p0 bit is also - set; the LED will blink with blink rate specified in - ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 and - ~nig_regsters_led_control_blink_rate_ena_p0.led_control_blink_rate_ena_p0 - fields. */ + * turns on the Traffic LED. If the led_control_blink_traffic_p0 bit is also + * set; the LED will blink with blink rate specified in + * ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 and + * ~nig_regsters_led_control_blink_rate_ena_p0.led_control_blink_rate_ena_p0 + * fields. */ #define NIG_REG_LED_CONTROL_TRAFFIC_P0 0x10300 /* [RW 4] led mode for port0: 0 MAC; 1-3 PHY1; 4 MAC2; 5-7 PHY4; 8-MAC3; - 9-11PHY7; 12 MAC4; 13-15 PHY10; */ + * 9-11PHY7; 12 MAC4; 13-15 PHY10; */ #define NIG_REG_LED_MODE_P0 0x102f0 /* [RW 3] for port0 enable for llfc ppp and pause. b0 - brb1 enable; b1- - tsdm enable; b2- usdm enable */ + * tsdm enable; b2- usdm enable */ #define NIG_REG_LLFC_EGRESS_SRC_ENABLE_0 0x16070 #define NIG_REG_LLFC_EGRESS_SRC_ENABLE_1 0x16074 /* [RW 1] SAFC enable for port0. This register may get 1 only when - ~ppp_enable.ppp_enable = 0 and pause_enable.pause_enable =0 for the same - port */ + * ~ppp_enable.ppp_enable = 0 and pause_enable.pause_enable =0 for the same + * port */ #define NIG_REG_LLFC_ENABLE_0 0x16208 #define NIG_REG_LLFC_ENABLE_1 0x1620c /* [RW 16] classes are high-priority for port0 */ @@ -1895,371 +1248,720 @@ /* [RW 1] send to BRB1 if no match on any of RMP rules. */ #define NIG_REG_LLH0_BRB1_NOT_MCP 0x1025c /* [RW 2] Determine the classification participants. 0: no classification.1: - classification upon VLAN id. 2: classification upon MAC address. 3: - classification upon both VLAN id & MAC addr. */ + * classification upon VLAN id. 2: classification upon MAC address. 3: + * classification upon both VLAN id & MAC addr. */ #define NIG_REG_LLH0_CLS_TYPE 0x16080 -/* [RW 32] cm header for llh0 */ -#define NIG_REG_LLH0_CM_HEADER 0x1007c #define NIG_REG_LLH0_DEST_IP_0_1 0x101dc #define NIG_REG_LLH0_DEST_MAC_0_0 0x101c0 /* [RW 16] destination TCP address 1. The LLH will look for this address in - all incoming packets. */ -#define NIG_REG_LLH0_DEST_TCP_0 0x10220 + * all incoming packets. */ +#define NIG_REG_LLH0_DEST_TCP_0 0x10220 /* [RW 16] destination UDP address 1 The LLH will look for this address in - all incoming packets. */ -#define NIG_REG_LLH0_DEST_UDP_0 0x10214 -#define NIG_REG_LLH0_ERROR_MASK 0x1008c -/* [RW 8] event id for llh0 */ -#define NIG_REG_LLH0_EVENT_ID 0x10084 + * all incoming packets. */ +#define NIG_REG_LLH0_DEST_UDP_0 0x10214 +/* [R 1] FIFO empty in LLH port0 */ +#define NIG_REG_LLH0_FIFO_EMPTY 0x10548 #define NIG_REG_LLH0_FUNC_EN 0x160fc #define NIG_REG_LLH0_FUNC_MEM 0x16180 #define NIG_REG_LLH0_FUNC_MEM_ENABLE 0x16140 #define NIG_REG_LLH0_FUNC_VLAN_ID 0x16100 /* [RW 1] Determine the IP version to look for in - ~nig_registers_llh0_dest_ip_0.llh0_dest_ip_0. 0 - IPv6; 1-IPv4 */ + * ~nig_registers_llh0_dest_ip_0.llh0_dest_ip_0. 0 - IPv6; 1-IPv4 */ #define NIG_REG_LLH0_IPV4_IPV6_0 0x10208 /* [RW 1] t bit for llh0 */ #define NIG_REG_LLH0_T_BIT 0x10074 /* [RW 12] VLAN ID 1. In case of VLAN packet the LLH will look for this ID. */ #define NIG_REG_LLH0_VLAN_ID_0 0x1022c -/* [RW 8] init credit counter for port0 in LLH */ -#define NIG_REG_LLH0_XCM_INIT_CREDIT 0x10554 #define NIG_REG_LLH0_XCM_MASK 0x10130 -#define NIG_REG_LLH1_BRB1_DRV_MASK 0x10248 /* [RW 1] send to BRB1 if no match on any of RMP rules. */ #define NIG_REG_LLH1_BRB1_NOT_MCP 0x102dc /* [RW 2] Determine the classification participants. 0: no classification.1: - classification upon VLAN id. 2: classification upon MAC address. 3: - classification upon both VLAN id & MAC addr. */ + * classification upon VLAN id. 2: classification upon MAC address. 3: + * classification upon both VLAN id & MAC addr. */ #define NIG_REG_LLH1_CLS_TYPE 0x16084 -/* [RW 32] cm header for llh1 */ -#define NIG_REG_LLH1_CM_HEADER 0x10080 -#define NIG_REG_LLH1_ERROR_MASK 0x10090 -/* [RW 8] event id for llh1 */ -#define NIG_REG_LLH1_EVENT_ID 0x10088 +/* [R 1] FIFO empty in LLH port1 */ +#define NIG_REG_LLH1_FIFO_EMPTY 0x10558 #define NIG_REG_LLH1_FUNC_MEM 0x161c0 #define NIG_REG_LLH1_FUNC_MEM_ENABLE 0x16160 #define NIG_REG_LLH1_FUNC_MEM_SIZE 16 -/* [RW 8] init credit counter for port1 in LLH */ -#define NIG_REG_LLH1_XCM_INIT_CREDIT 0x10564 +/* [RW 1] When this bit is set; the LLH will classify the packet before + * sending it to the BRB or calculating WoL on it. This bit controls port 1 + * only. The legacy llh_multi_function_mode bit controls port 0. */ +#define NIG_REG_LLH1_MF_MODE 0x18614 #define NIG_REG_LLH1_XCM_MASK 0x10134 /* [RW 1] When this bit is set; the LLH will expect all packets to be with - outer VLAN. This is not applicable to E2. */ + * outer VLAN. This is not applicable to E2. */ #define NIG_REG_LLH_E1HOV_MODE 0x160d8 /* [RW 1] When this bit is set; the LLH will classify the packet before - sending it to the BRB or calculating WoL on it. */ + * sending it to the BRB or calculating WoL on it. This bit is applicable to + * both ports 0 and 1 for E2. This bit only controls port 0 in E3. */ #define NIG_REG_LLH_MF_MODE 0x16024 #define NIG_REG_MASK_INTERRUPT_PORT0 0x10330 #define NIG_REG_MASK_INTERRUPT_PORT1 0x10334 -/* [RW 1] Output signal from NIG to EMAC0. When set enables the EMAC0 block. */ +/* [R 1] Output signal from NIG to EMAC0. When set enables the EMAC0 block. */ #define NIG_REG_NIG_EMAC0_EN 0x1003c -/* [RW 1] Output signal from NIG to EMAC1. When set enables the EMAC1 block. */ -#define NIG_REG_NIG_EMAC1_EN 0x10040 -/* [RW 1] Output signal from NIG to TX_EMAC0. When set indicates to the - EMAC0 to strip the CRC from the ingress packets. */ +/* [R 1] Output signal from NIG to TX_EMAC0. When set indicates to the EMAC0 + * to strip the CRC from the ingress packets. */ #define NIG_REG_NIG_INGRESS_EMAC0_NO_CRC 0x10044 /* [R 32] Interrupt register #0 read */ #define NIG_REG_NIG_INT_STS_0 0x103b0 #define NIG_REG_NIG_INT_STS_1 0x103c0 +/* [R 32] Legacy E1 and E1H location for parity error mask register. */ +#define NIG_REG_NIG_PRTY_MASK 0x103dc +/* [RW 32] Parity mask register #0 read/write */ +#define NIG_REG_NIG_PRTY_MASK_0 0x183c8 +#define NIG_REG_NIG_PRTY_MASK_1 0x183d8 /* [R 32] Legacy E1 and E1H location for parity error status register. */ #define NIG_REG_NIG_PRTY_STS 0x103d0 /* [R 32] Parity register #0 read */ #define NIG_REG_NIG_PRTY_STS_0 0x183bc #define NIG_REG_NIG_PRTY_STS_1 0x183cc -#define NIG_REG_P0_LLH_FUNC_MEM2 0x18480 -#define NIG_REG_P1_LLH_FUNC_MEM2 0x184c0 +/* [R 32] Legacy E1 and E1H location for parity error status clear register. */ +#define NIG_REG_NIG_PRTY_STS_CLR 0x103d4 +/* [RC 32] Parity register #0 read clear */ +#define NIG_REG_NIG_PRTY_STS_CLR_0 0x183c0 +#define NIG_REG_NIG_PRTY_STS_CLR_1 0x183d0 +/* [R 1] Indication that HBUF descriptor FIFO is empty. */ +#define NIG_REG_P0_HBUF_DSCR_EMPTY 0x18318 /* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic - Ethernet header. */ + * Ethernet header. */ #define NIG_REG_P0_HDRS_AFTER_BASIC 0x18038 /* [RW 1] HW PFC enable bit. Set this bit to enable the PFC functionality in - the NIG. Other flow control modes such as PAUSE and SAFC/LLFC should be - disabled when this bit is set. */ -#define NIG_REG_P0_HWPFC_ENABLE 0x18078 + * the NIG. Other flow control modes such as PAUSE and SAFC/LLFC should be + * disabled when this bit is set. */ +#define NIG_REG_P0_HWPFC_ENABLE 0x18078 +#define NIG_REG_P0_LLH_FUNC_MEM2 0x18480 +/* [RW 1] Input enable for RX MAC interface. */ +#define NIG_REG_P0_MAC_IN_EN 0x185ac +/* [RW 1] Output enable for TX MAC interface */ +#define NIG_REG_P0_MAC_OUT_EN 0x185b0 +/* [RW 1] Output enable for TX PAUSE signal to the MAC. */ +#define NIG_REG_P0_MAC_PAUSE_OUT_EN 0x185b4 /* [RW 32] Eight 4-bit configurations for specifying which COS (0-15 for - future expansion) each priorty is to be mapped to. Bits 3:0 specify the - COS for priority 0. Bits 31:28 specify the COS for priority 7. The 3-bit - priority field is extracted from the outer-most VLAN in receive packet. - Only COS 0 and COS 1 are supported in E2. */ + * future expansion) each priorty is to be mapped to. Bits 3:0 specify the + * COS for priority 0. Bits 31:28 specify the COS for priority 7. The 3-bit + * priority field is extracted from the outer-most VLAN in receive packet. + * Only COS 0 and COS 1 are supported in E2. */ #define NIG_REG_P0_PKT_PRIORITY_TO_COS 0x18054 /* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 0. A - priority is mapped to COS 0 when the corresponding mask bit is 1. More - than one bit may be set; allowing multiple priorities to be mapped to one - COS. */ + * priority is mapped to COS 0 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ #define NIG_REG_P0_RX_COS0_PRIORITY_MASK 0x18058 /* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 1. A - priority is mapped to COS 1 when the corresponding mask bit is 1. More - than one bit may be set; allowing multiple priorities to be mapped to one - COS. */ + * priority is mapped to COS 1 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ #define NIG_REG_P0_RX_COS1_PRIORITY_MASK 0x1805c -/* [RW 15] Specify which of the credit registers the client is to be mapped - to. Bits[2:0] are for client 0; bits [14:12] are for client 4. For - clients that are not subject to WFQ credit blocking - their - specifications here are not used. */ +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 2. A + * priority is mapped to COS 2 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P0_RX_COS2_PRIORITY_MASK 0x186b0 +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 3. A + * priority is mapped to COS 3 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P0_RX_COS3_PRIORITY_MASK 0x186b4 +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 4. A + * priority is mapped to COS 4 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P0_RX_COS4_PRIORITY_MASK 0x186b8 +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 5. A + * priority is mapped to COS 5 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P0_RX_COS5_PRIORITY_MASK 0x186bc +/* [R 1] RX FIFO for receiving data from MAC is empty. */ +#define NIG_REG_P0_RX_MACFIFO_EMPTY 0x18570 +/* [R 1] TLLH FIFO is empty. */ +#define NIG_REG_P0_TLLH_FIFO_EMPTY 0x18308 +/* [R 15] Specify which of the credit registers the client is to be mapped + * to. Bits[2:0] are for client 0; bits [14:12] are for client 4. For + * clients that are not subject to WFQ credit blocking - their + * specifications here are not used. */ #define NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP 0x180f0 -/* [RW 5] Specify whether the client competes directly in the strict - priority arbiter. The bits are mapped according to client ID (client IDs - are defined in tx_arb_priority_client). Default value is set to enable - strict priorities for clients 0-2 -- management and debug traffic. */ +/* [RW 32] Specify which of the credit registers the client is to be mapped + * to. This register specifies bits 31:0 of the 36-bit value. Bits[3:0] are + * for client 0; bits [35:32] are for client 8. For clients that are not + * subject to WFQ credit blocking - their specifications here are not used. + * This is a new register (with 2_) added in E3 B0 to accommodate the 9 + * input clients to ETS arbiter. The reset default is set for management and + * debug to use credit registers 6, 7, and 8, respectively, and COSes 0-5 to + * use credit registers 0-5 respectively (0x543210876). Note that credit + * registers can not be shared between clients. */ +#define NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_LSB 0x18688 +/* [RW 4] Specify which of the credit registers the client is to be mapped + * to. This register specifies bits 35:32 of the 36-bit value. Bits[3:0] are + * for client 0; bits [35:32] are for client 8. For clients that are not + * subject to WFQ credit blocking - their specifications here are not used. + * This is a new register (with 2_) added in E3 B0 to accommodate the 9 + * input clients to ETS arbiter. The reset default is set for management and + * debug to use credit registers 6, 7, and 8, respectively, and COSes 0-5 to + * use credit registers 0-5 respectively (0x543210876). Note that credit + * registers can not be shared between clients. */ +#define NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_MSB 0x1868c +/* [RW 9] Specify whether the client competes directly in the strict + * priority arbiter. The bits are mapped according to client ID (client IDs + * are defined in tx_arb_priority_client2): 0-management; 1-debug traffic + * from this port; 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 + * traffic; 5-COS2 traffic; 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. + * Default value is set to enable strict priorities for all clients. */ #define NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT 0x180e8 -/* [RW 5] Specify whether the client is subject to WFQ credit blocking. The - bits are mapped according to client ID (client IDs are defined in - tx_arb_priority_client). Default value is 0 for not using WFQ credit - blocking. */ -#define NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ 0x180ec +/* [RW 9] Specify whether the client is subject to WFQ credit blocking. The + * bits are mapped according to client ID (client IDs are defined in + * tx_arb_priority_client2): 0-management; 1-debug traffic from this port; + * 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 + * traffic; 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. Default value is + * 0 for not using WFQ credit blocking. */ +#define NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ 0x180ec /* [RW 32] Specify the upper bound that credit register 0 is allowed to - reach. */ + * reach. */ #define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_0 0x1810c #define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_1 0x18110 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_2 0x18114 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_3 0x18118 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_4 0x1811c +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_5 0x186a0 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_6 0x186a4 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_7 0x186a8 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_8 0x186ac /* [RW 32] Specify the weight (in bytes) to be added to credit register 0 - when it is time to increment. */ + * when it is time to increment. */ #define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0 0x180f8 #define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_1 0x180fc +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_2 0x18100 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_3 0x18104 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_4 0x18108 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_5 0x18690 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_6 0x18694 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_7 0x18698 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_8 0x1869c /* [RW 12] Specify the number of strict priority arbitration slots between - two round-robin arbitration slots to avoid starvation. A value of 0 means - no strict priority cycles - the strict priority with anti-starvation - arbiter becomes a round-robin arbiter. */ + * two round-robin arbitration slots to avoid starvation. A value of 0 means + * no strict priority cycles - the strict priority with anti-starvation + * arbiter becomes a round-robin arbiter. */ #define NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS 0x180f4 -/* [RW 15] Specify the client number to be assigned to each priority of the - strict priority arbiter. Priority 0 is the highest priority. Bits [2:0] - are for priority 0 client; bits [14:12] are for priority 4 client. The - clients are assigned the following IDs: 0-management; 1-debug traffic - from this port; 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 - traffic. The reset value[14:0] is set to 0x4688 (15'b100_011_010_001_000) - for management at priority 0; debug traffic at priorities 1 and 2; COS0 - traffic at priority 3; and COS1 traffic at priority 4. */ +/* [R 15] Specify the client number to be assigned to each priority of the + * strict priority arbiter. Priority 0 is the highest priority. Bits [2:0] + * are for priority 0 client; bits [14:12] are for priority 4 client. The + * clients are assigned the following IDs: 0-management; 1-debug traffic + * from this port; 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 + * traffic. The reset value[14:0] is set to 0x4688 (15'b100_011_010_001_000) + * for management at priority 0; debug traffic at priorities 1 and 2; COS0 + * traffic at priority 3; and COS1 traffic at priority 4. */ #define NIG_REG_P0_TX_ARB_PRIORITY_CLIENT 0x180e4 +/* [RW 32] Specify the client number to be assigned to each priority of the + * strict priority arbiter. This register specifies bits 31:0 of the 36-bit + * value. Priority 0 is the highest priority. Bits [3:0] are for priority 0 + * client; bits [35-32] are for priority 8 client. The clients are assigned + * the following IDs: 0-management; 1-debug traffic from this port; 2-debug + * traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 traffic; + * 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. The reset value[35:0] is + * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to + * accommodate the 9 input clients to ETS arbiter. */ +#define NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB 0x18680 +/* [RW 4] Specify the client number to be assigned to each priority of the + * strict priority arbiter. This register specifies bits 35:32 of the 36-bit + * value. Priority 0 is the highest priority. Bits [3:0] are for priority 0 + * client; bits [35-32] are for priority 8 client. The clients are assigned + * the following IDs: 0-management; 1-debug traffic from this port; 2-debug + * traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 traffic; + * 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. The reset value[35:0] is + * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to + * accommodate the 9 input clients to ETS arbiter. */ +#define NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB 0x18684 +/* [R 1] TX FIFO for transmitting data to MAC is empty. */ +#define NIG_REG_P0_TX_MACFIFO_EMPTY 0x18578 +/* [R 1] FIFO empty status of the MCP TX FIFO used for storing MCP packets + * forwarded to the host. */ +#define NIG_REG_P0_TX_MNG_HOST_FIFO_EMPTY 0x182a8 +/* [R 1] Indication that HBUF descriptor FIFO is empty. */ +#define NIG_REG_P1_HBUF_DSCR_EMPTY 0x18348 +/* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic + * Ethernet header. */ +#define NIG_REG_P1_HDRS_AFTER_BASIC 0x1818c +/* [RW 1] HW PFC enable bit. Set this bit to enable the PFC functionality in + * the NIG. Other flow control modes such as PAUSE and SAFC/LLFC should be + * disabled when this bit is set. */ +#define NIG_REG_P1_HWPFC_ENABLE 0x181d0 +#define NIG_REG_P1_LLH_FUNC_MEM2 0x184c0 +/* [RW 1] Input enable for RX MAC interface. */ +#define NIG_REG_P1_MAC_IN_EN 0x185c0 +/* [RW 1] Output enable for TX MAC interface */ +#define NIG_REG_P1_MAC_OUT_EN 0x185c4 +/* [RW 1] Output enable for TX PAUSE signal to the MAC. */ +#define NIG_REG_P1_MAC_PAUSE_OUT_EN 0x185c8 /* [RW 32] Eight 4-bit configurations for specifying which COS (0-15 for - future expansion) each priorty is to be mapped to. Bits 3:0 specify the - COS for priority 0. Bits 31:28 specify the COS for priority 7. The 3-bit - priority field is extracted from the outer-most VLAN in receive packet. - Only COS 0 and COS 1 are supported in E2. */ + * future expansion) each priorty is to be mapped to. Bits 3:0 specify the + * COS for priority 0. Bits 31:28 specify the COS for priority 7. The 3-bit + * priority field is extracted from the outer-most VLAN in receive packet. + * Only COS 0 and COS 1 are supported in E2. */ #define NIG_REG_P1_PKT_PRIORITY_TO_COS 0x181a8 /* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 0. A - priority is mapped to COS 0 when the corresponding mask bit is 1. More - than one bit may be set; allowing multiple priorities to be mapped to one - COS. */ + * priority is mapped to COS 0 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ #define NIG_REG_P1_RX_COS0_PRIORITY_MASK 0x181ac /* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 1. A - priority is mapped to COS 1 when the corresponding mask bit is 1. More - than one bit may be set; allowing multiple priorities to be mapped to one - COS. */ + * priority is mapped to COS 1 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ #define NIG_REG_P1_RX_COS1_PRIORITY_MASK 0x181b0 +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 2. A + * priority is mapped to COS 2 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P1_RX_COS2_PRIORITY_MASK 0x186f8 +/* [R 1] RX FIFO for receiving data from MAC is empty. */ +#define NIG_REG_P1_RX_MACFIFO_EMPTY 0x1858c +/* [R 1] TLLH FIFO is empty. */ +#define NIG_REG_P1_TLLH_FIFO_EMPTY 0x18338 +/* [RW 32] Specify which of the credit registers the client is to be mapped + * to. This register specifies bits 31:0 of the 36-bit value. Bits[3:0] are + * for client 0; bits [35:32] are for client 8. For clients that are not + * subject to WFQ credit blocking - their specifications here are not used. + * This is a new register (with 2_) added in E3 B0 to accommodate the 9 + * input clients to ETS arbiter. The reset default is set for management and + * debug to use credit registers 6, 7, and 8, respectively, and COSes 0-5 to + * use credit registers 0-5 respectively (0x543210876). Note that credit + * registers can not be shared between clients. Note also that there are + * only COS0-2 in port 1- there is a total of 6 clients in port 1. Only + * credit registers 0-5 are valid. This register should be configured + * appropriately before enabling WFQ. */ +#define NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_LSB 0x186e8 +/* [RW 4] Specify which of the credit registers the client is to be mapped + * to. This register specifies bits 35:32 of the 36-bit value. Bits[3:0] are + * for client 0; bits [35:32] are for client 8. For clients that are not + * subject to WFQ credit blocking - their specifications here are not used. + * This is a new register (with 2_) added in E3 B0 to accommodate the 9 + * input clients to ETS arbiter. The reset default is set for management and + * debug to use credit registers 6, 7, and 8, respectively, and COSes 0-5 to + * use credit registers 0-5 respectively (0x543210876). Note that credit + * registers can not be shared between clients. Note also that there are + * only COS0-2 in port 1- there is a total of 6 clients in port 1. Only + * credit registers 0-5 are valid. This register should be configured + * appropriately before enabling WFQ. */ +#define NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_MSB 0x186ec +/* [RW 9] Specify whether the client competes directly in the strict + * priority arbiter. The bits are mapped according to client ID (client IDs + * are defined in tx_arb_priority_client2): 0-management; 1-debug traffic + * from this port; 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 + * traffic; 5-COS2 traffic; 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. + * Default value is set to enable strict priorities for all clients. */ +#define NIG_REG_P1_TX_ARB_CLIENT_IS_STRICT 0x18234 +/* [RW 9] Specify whether the client is subject to WFQ credit blocking. The + * bits are mapped according to client ID (client IDs are defined in + * tx_arb_priority_client2): 0-management; 1-debug traffic from this port; + * 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 + * traffic; 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. Default value is + * 0 for not using WFQ credit blocking. */ +#define NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ 0x18238 +/* [RW 32] Specify the upper bound that credit register 0 is allowed to + * reach. */ +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_0 0x18258 +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_1 0x1825c +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_2 0x18260 +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_3 0x18264 +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_4 0x18268 +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_5 0x186f4 +/* [RW 32] Specify the weight (in bytes) to be added to credit register 0 + * when it is time to increment. */ +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_0 0x18244 +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_1 0x18248 +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_2 0x1824c +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_3 0x18250 +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_4 0x18254 +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_5 0x186f0 +/* [RW 12] Specify the number of strict priority arbitration slots between + * two round-robin arbitration slots to avoid starvation. A value of 0 means + * no strict priority cycles - the strict priority with anti-starvation + * arbiter becomes a round-robin arbiter. */ +#define NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS 0x18240 +/* [RW 32] Specify the client number to be assigned to each priority of the + * strict priority arbiter. This register specifies bits 31:0 of the 36-bit + * value. Priority 0 is the highest priority. Bits [3:0] are for priority 0 + * client; bits [35-32] are for priority 8 client. The clients are assigned + * the following IDs: 0-management; 1-debug traffic from this port; 2-debug + * traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 traffic; + * 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. The reset value[35:0] is + * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to + * accommodate the 9 input clients to ETS arbiter. Note that this register + * is the same as the one for port 0, except that port 1 only has COS 0-2 + * traffic. There is no traffic for COS 3-5 of port 1. */ +#define NIG_REG_P1_TX_ARB_PRIORITY_CLIENT2_LSB 0x186e0 +/* [RW 4] Specify the client number to be assigned to each priority of the + * strict priority arbiter. This register specifies bits 35:32 of the 36-bit + * value. Priority 0 is the highest priority. Bits [3:0] are for priority 0 + * client; bits [35-32] are for priority 8 client. The clients are assigned + * the following IDs: 0-management; 1-debug traffic from this port; 2-debug + * traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 traffic; + * 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. The reset value[35:0] is + * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to + * accommodate the 9 input clients to ETS arbiter. Note that this register + * is the same as the one for port 0, except that port 1 only has COS 0-2 + * traffic. There is no traffic for COS 3-5 of port 1. */ +#define NIG_REG_P1_TX_ARB_PRIORITY_CLIENT2_MSB 0x186e4 +/* [R 1] TX FIFO for transmitting data to MAC is empty. */ +#define NIG_REG_P1_TX_MACFIFO_EMPTY 0x18594 +/* [R 1] FIFO empty status of the MCP TX FIFO used for storing MCP packets + * forwarded to the host. */ +#define NIG_REG_P1_TX_MNG_HOST_FIFO_EMPTY 0x182b8 /* [RW 1] Pause enable for port0. This register may get 1 only when - ~safc_enable.safc_enable = 0 and ppp_enable.ppp_enable =0 for the same - port */ + * ~safc_enable.safc_enable = 0 and ppp_enable.ppp_enable =0 for the same + * port */ #define NIG_REG_PAUSE_ENABLE_0 0x160c0 #define NIG_REG_PAUSE_ENABLE_1 0x160c4 -/* [RW 1] Input enable for RX PBF LP IF */ -#define NIG_REG_PBF_LB_IN_EN 0x100b4 /* [RW 1] Value of this register will be transmitted to port swap when - ~nig_registers_strap_override.strap_override =1 */ + * ~nig_registers_strap_override.strap_override =1 */ #define NIG_REG_PORT_SWAP 0x10394 -/* [RW 16] ADDRESS for header in PP message to PXP internal write IF */ -#define NIG_REG_PPP_ADDRESS 0x160a4 /* [RW 1] PPP enable for port0. This register may get 1 only when - ~safc_enable.safc_enable = 0 and pause_enable.pause_enable =0 for the - same port */ + * ~safc_enable.safc_enable = 0 and pause_enable.pause_enable =0 for the + * same port */ #define NIG_REG_PPP_ENABLE_0 0x160b0 #define NIG_REG_PPP_ENABLE_1 0x160b4 -/* [RW 1] Output enable of message to PXP IF */ -#define NIG_REG_PPP_OUT_EN 0x16204 -/* [RW 4] STORM ID for header in PP message to PXP internal write IF */ -#define NIG_REG_PPP_STORM_ID 0x160a0 -/* [RW 8] T124param for header in PP message to PXP internal write IF */ -#define NIG_REG_PPP_T124PARAM 0x160ac -/* [RW 4] Trigger for header in PP message to PXP internal write IF */ -#define NIG_REG_PPP_TRIG 0x160a8 -/* [RW 1] output enable for RX parser descriptor IF */ -#define NIG_REG_PRS_EOP_OUT_EN 0x10104 /* [RW 1] Input enable for RX parser request IF */ #define NIG_REG_PRS_REQ_IN_EN 0x100b8 -/* [RW 5] control to serdes - CL45 DEVAD */ +/* [R 5] control to serdes - CL45 DEVAD */ #define NIG_REG_SERDES0_CTRL_MD_DEVAD 0x10370 -/* [RW 1] control to serdes; 0 - clause 45; 1 - clause 22 */ +/* [R 1] control to serdes; 0 - clause 45; 1 - clause 22 */ #define NIG_REG_SERDES0_CTRL_MD_ST 0x1036c -/* [RW 5] control to serdes - CL22 PHY_ADD and CL45 PRTAD */ +/* [R 5] control to serdes - CL22 PHY_ADD and CL45 PRTAD */ #define NIG_REG_SERDES0_CTRL_PHY_ADDR 0x10374 /* [R 1] status from serdes0 that inputs to interrupt logic of link status */ #define NIG_REG_SERDES0_STATUS_LINK_STATUS 0x10578 /* [R 32] Rx statistics : In user packets discarded due to BRB backpressure - for port 0 COS0 */ + * for port 0 COS0 */ #define NIG_REG_STAT0_BRB_DISCARD 0x105f0 /* [R 32] Rx statistics : In user packets truncated due to BRB backpressure - for port 0 COS0 */ + * for port 0 COS0 */ #define NIG_REG_STAT0_BRB_TRUNCATE 0x105f8 /* [WB_R 36] Tx statistics : Number of packets from emac0 or bmac0 that - between 1024 and 1522 bytes for port0 */ + * between 1024 and 1522 bytes for port0 */ #define NIG_REG_STAT0_EGRESS_MAC_PKT0 0x10750 /* [WB_R 36] Tx statistics : Number of packets from emac0 or bmac0 that - between 1523 bytes and above for port0 */ + * between 1523 bytes and above for port0 */ #define NIG_REG_STAT0_EGRESS_MAC_PKT1 0x10760 /* [R 32] Rx statistics : In user packets discarded due to BRB backpressure - for port 1 COS0 */ + * for port 1 COS0 */ #define NIG_REG_STAT1_BRB_DISCARD 0x10628 /* [WB_R 36] Tx statistics : Number of packets from emac1 or bmac1 that - between 1024 and 1522 bytes for port1 */ + * between 1024 and 1522 bytes for port1 */ #define NIG_REG_STAT1_EGRESS_MAC_PKT0 0x107a0 /* [WB_R 36] Tx statistics : Number of packets from emac1 or bmac1 that - between 1523 bytes and above for port1 */ + * between 1523 bytes and above for port1 */ #define NIG_REG_STAT1_EGRESS_MAC_PKT1 0x107b0 /* [WB_R 64] Rx statistics : User octets received for LP */ -#define NIG_REG_STAT2_BRB_OCTET 0x107e0 +#define NIG_REG_STAT2_BRB_OCTET 0x107e0 #define NIG_REG_STATUS_INTERRUPT_PORT0 0x10328 -#define NIG_REG_STATUS_INTERRUPT_PORT1 0x1032c /* [RW 1] port swap mux selection. If this register equal to 0 then port - swap is equal to SPIO pin that inputs from ifmux_serdes_swap. If 1 then - ort swap is equal to ~nig_registers_port_swap.port_swap */ + * swap is equal to SPIO pin that inputs from ifmux_serdes_swap. If 1 then + * ort swap is equal to ~nig_registers_port_swap.port_swap */ #define NIG_REG_STRAP_OVERRIDE 0x10398 /* [RW 1] output enable for RX_XCM0 IF */ #define NIG_REG_XCM0_OUT_EN 0x100f0 /* [RW 1] output enable for RX_XCM1 IF */ #define NIG_REG_XCM1_OUT_EN 0x100f4 -/* [RW 1] control to xgxs - remote PHY in-band MDIO */ +/* [R 1] control to xgxs - remote PHY in-band MDIO */ #define NIG_REG_XGXS0_CTRL_EXTREMOTEMDIOST 0x10348 -/* [RW 5] control to xgxs - CL45 DEVAD */ +/* [R 5] control to xgxs - CL45 DEVAD */ #define NIG_REG_XGXS0_CTRL_MD_DEVAD 0x1033c -/* [RW 1] control to xgxs; 0 - clause 45; 1 - clause 22 */ +/* [R 1] control to xgxs; 0 - clause 45; 1 - clause 22 */ #define NIG_REG_XGXS0_CTRL_MD_ST 0x10338 -/* [RW 5] control to xgxs - CL22 PHY_ADD and CL45 PRTAD */ +/* [R 5] control to xgxs - CL22 PHY_ADD and CL45 PRTAD */ #define NIG_REG_XGXS0_CTRL_PHY_ADDR 0x10340 /* [R 1] status from xgxs0 that inputs to interrupt logic of link10g. */ #define NIG_REG_XGXS0_STATUS_LINK10G 0x10680 /* [R 4] status from xgxs0 that inputs to interrupt logic of link status */ #define NIG_REG_XGXS0_STATUS_LINK_STATUS 0x10684 -/* [RW 2] selection for XGXS lane of port 0 in NIG_MUX block */ +/* [R 2] selection for XGXS lane of port 0 in NIG_MUX block */ #define NIG_REG_XGXS_LANE_SEL_P0 0x102e8 -/* [RW 1] selection for port0 for NIG_MUX block : 0 = SerDes; 1 = XGXS */ +/* [R 1] selection for port0 for NIG_MUX block : 0 = SerDes; 1 = XGXS */ #define NIG_REG_XGXS_SERDES0_MODE_SEL 0x102e0 -#define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_EMAC0_MISC_MI_INT (0x1<<0) +#define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_EMAC0_MISC_MI_INT (0x1<<0) #define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_SERDES0_LINK_STATUS (0x1<<9) #define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK10G (0x1<<15) -#define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS (0xf<<18) +#define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS (0xf<<18) #define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS_SIZE 18 -/* [RW 31] The upper bound of the weight of COS0 in the ETS command arbiter. */ +/* [R 31] Removed for E3 B0 -The upper bound of the weight of COS0 in the + * ETS command arbiter. */ #define PBF_REG_COS0_UPPER_BOUND 0x15c05c -/* [RW 31] The weight of COS0 in the ETS command arbiter. */ +/* [RW 31] The upper bound of the weight of COS0 in the ETS command arbiter + * of port 0. */ +#define PBF_REG_COS0_UPPER_BOUND_P0 0x15c2cc +/* [RW 31] The upper bound of the weight of COS0 in the ETS command arbiter + * of port 1. */ +#define PBF_REG_COS0_UPPER_BOUND_P1 0x15c2e4 +/* [R 31] Removed for E3 B0 - The weight of COS0 in the ETS command arbiter. */ #define PBF_REG_COS0_WEIGHT 0x15c054 -/* [RW 31] The upper bound of the weight of COS1 in the ETS command arbiter. */ +/* [RW 31] The weight of COS0 in port 0 ETS command arbiter. */ +#define PBF_REG_COS0_WEIGHT_P0 0x15c2a8 +/* [RW 31] The weight of COS0 in port 1 ETS command arbiter. */ +#define PBF_REG_COS0_WEIGHT_P1 0x15c2c0 +/* [R 31] Removed for E3 B0 -The upper bound of the weight of COS1 in the + * ETS command arbiter. */ #define PBF_REG_COS1_UPPER_BOUND 0x15c060 -/* [RW 31] The weight of COS1 in the ETS command arbiter. */ +/* [R 31] Removed for E3 B0 - The weight of COS1 in the ETS command arbiter. */ #define PBF_REG_COS1_WEIGHT 0x15c058 -/* [RW 1] Disable processing further tasks from port 0 (after ending the - current task in process). */ +/* [RW 31] The weight of COS1 in port 0 ETS command arbiter. */ +#define PBF_REG_COS1_WEIGHT_P0 0x15c2ac +/* [RW 31] The weight of COS1 in port 1 ETS command arbiter. */ +#define PBF_REG_COS1_WEIGHT_P1 0x15c2c4 +/* [RW 31] The weight of COS2 in port 0 ETS command arbiter. */ +#define PBF_REG_COS2_WEIGHT_P0 0x15c2b0 +/* [RW 31] The weight of COS2 in port 1 ETS command arbiter. */ +#define PBF_REG_COS2_WEIGHT_P1 0x15c2c8 +/* [RW 31] The weight of COS3 in port 0 ETS command arbiter. */ +#define PBF_REG_COS3_WEIGHT_P0 0x15c2b4 +/* [RW 31] The weight of COS4 in port 0 ETS command arbiter. */ +#define PBF_REG_COS4_WEIGHT_P0 0x15c2b8 +/* [RW 31] The weight of COS5 in port 0 ETS command arbiter. */ +#define PBF_REG_COS5_WEIGHT_P0 0x15c2bc +/* [R 11] Current credit for the LB queue in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_LB_Q 0x140338 +/* [R 11] Current credit for queue 0 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q0 0x14033c +/* [R 11] Current credit for queue 1 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q1 0x140340 +/* [R 11] Current credit for queue 2 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q2 0x140344 +/* [R 11] Current credit for queue 3 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q3 0x140348 +/* [R 11] Current credit for queue 4 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q4 0x14034c +/* [R 11] Current credit for queue 5 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q5 0x140350 +/* [R 1] Removed for E3 B0 - Disable processing further tasks from port 0 + * (after ending the current task in process). */ #define PBF_REG_DISABLE_NEW_TASK_PROC_P0 0x14005c -/* [RW 1] Disable processing further tasks from port 1 (after ending the - current task in process). */ +/* [R 1] Removed for E3 B0 - Disable processing further tasks from port 1 + * (after ending the current task in process). */ #define PBF_REG_DISABLE_NEW_TASK_PROC_P1 0x140060 -/* [RW 1] Disable processing further tasks from port 4 (after ending the - current task in process). */ -#define PBF_REG_DISABLE_NEW_TASK_PROC_P4 0x14006c +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q0 0x15c1bc +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q1 0x15c1c0 +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q2 0x15c1c4 +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q3 0x15c1c8 +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q4 0x15c1cc +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q5 0x15c1d0 #define PBF_REG_DISABLE_PF 0x1402e8 #define PBF_REG_DISABLE_VF 0x1402ec -/* [RW 1] if set; packets with error will be dropped; otherwise transmitted - with error to the NIG (FCS). */ -#define PBF_REG_DROP_PKT_UPON_ERR 0x15c100 -/* [RW 1] E1.5 FW backward compatibility mode. If set then backward - compatible to E1.5. */ -#define PBF_REG_E15_FW_COMPAT_MODE 0x15c024 -/* [RW 1] Indicates that ETS is performed between the COSes in the command - arbiter. If reset strict priority w/ anti-starvation will be performed - w/o WFQ. */ +/* [RW 18] For port 0: For each client that is subject to WFQ (the + * corresponding bit is 1); indicates to which of the credit registers this + * client is mapped. For clients which are not credit blocked; their mapping + * is dont care. */ +#define PBF_REG_ETS_ARB_CLIENT_CREDIT_MAP_P0 0x15c288 +/* [RW 9] For port 1: For each client that is subject to WFQ (the + * corresponding bit is 1); indicates to which of the credit registers this + * client is mapped. For clients which are not credit blocked; their mapping + * is dont care. */ +#define PBF_REG_ETS_ARB_CLIENT_CREDIT_MAP_P1 0x15c28c +/* [RW 6] For port 0: Bit per client to indicate if the client competes in + * the strict priority arbiter directly (corresponding bit = 1); or first + * goes to the RR arbiter (corresponding bit = 0); and then competes in the + * lowest priority in the strict-priority arbiter. */ +#define PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P0 0x15c278 +/* [RW 3] For port 1: Bit per client to indicate if the client competes in + * the strict priority arbiter directly (corresponding bit = 1); or first + * goes to the RR arbiter (corresponding bit = 0); and then competes in the + * lowest priority in the strict-priority arbiter. */ +#define PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P1 0x15c27c +/* [RW 6] For port 0: Bit per client to indicate if the client is subject to + * WFQ credit blocking (corresponding bit = 1). */ +#define PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0 0x15c280 +/* [RW 3] For port 0: Bit per client to indicate if the client is subject to + * WFQ credit blocking (corresponding bit = 1). */ +#define PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1 0x15c284 +/* [RW 16] For port 0: The number of strict priority arbitration slots + * between 2 RR arbitration slots. A value of 0 means no strict priority + * cycles; i.e. the strict-priority w/ anti-starvation arbiter is a RR + * arbiter. */ +#define PBF_REG_ETS_ARB_NUM_STRICT_ARB_SLOTS_P0 0x15c2a0 +/* [RW 16] For port 1: The number of strict priority arbitration slots + * between 2 RR arbitration slots. A value of 0 means no strict priority + * cycles; i.e. the strict-priority w/ anti-starvation arbiter is a RR + * arbiter. */ +#define PBF_REG_ETS_ARB_NUM_STRICT_ARB_SLOTS_P1 0x15c2a4 +/* [RW 18] For port 0: Indicates which client is connected to each priority + * in the strict-priority arbiter. Priority 0 is the highest priority, and + * priority 5 is the lowest; to which the RR output is connected to (this is + * not configurable). */ +#define PBF_REG_ETS_ARB_PRIORITY_CLIENT_P0 0x15c270 +/* [RW 9] For port 1: Indicates which client is connected to each priority + * in the strict-priority arbiter. Priority 0 is the highest priority, and + * priority 5 is the lowest; to which the RR output is connected to (this is + * not configurable). */ +#define PBF_REG_ETS_ARB_PRIORITY_CLIENT_P1 0x15c274 +/* [R 1] Removed for E3 B0 - Indicates that ETS is performed between the + * COSes in the command arbiter. If reset strict priority w/ anti-starvation + * will be performed w/o WFQ. */ #define PBF_REG_ETS_ENABLED 0x15c050 /* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic - Ethernet header. */ + * Ethernet header. */ #define PBF_REG_HDRS_AFTER_BASIC 0x15c0a8 -/* [RW 1] Indicates which COS is conncted to the highest priority in the - command arbiter. */ +/* [RW 6] Bit-map indicating which L2 hdrs may appear after L2 tag 0 */ +#define PBF_REG_HDRS_AFTER_TAG_0 0x15c0b8 +/* [R 1] Removed for E3 B0 - Indicates which COS is conncted to the highest + * priority in the command arbiter. */ #define PBF_REG_HIGH_PRIORITY_COS_NUM 0x15c04c -#define PBF_REG_IF_ENABLE_REG 0x140044 -/* [RW 1] Init bit. When set the initial credits are copied to the credit - registers (except the port credits). Should be set and then reset after - the configuration of the block has ended. */ -#define PBF_REG_INIT 0x140000 -/* [RW 1] Init bit for port 0. When set the initial credit of port 0 is - copied to the credit register. Should be set and then reset after the - configuration of the port has ended. */ -#define PBF_REG_INIT_P0 0x140004 -/* [RW 1] Init bit for port 1. When set the initial credit of port 1 is - copied to the credit register. Should be set and then reset after the - configuration of the port has ended. */ -#define PBF_REG_INIT_P1 0x140008 -/* [RW 1] Init bit for port 4. When set the initial credit of port 4 is - copied to the credit register. Should be set and then reset after the - configuration of the port has ended. */ -#define PBF_REG_INIT_P4 0x14000c +/* [RW 11] Initial credit for the LB queue in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_LB_Q 0x15c248 +/* [RW 11] Initial credit for queue 0 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q0 0x15c230 +/* [RW 11] Initial credit for queue 1 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q1 0x15c234 +/* [RW 11] Initial credit for queue 2 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q2 0x15c238 +/* [RW 11] Initial credit for queue 3 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q3 0x15c23c +/* [RW 11] Initial credit for queue 4 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q4 0x15c240 +/* [RW 11] Initial credit for queue 5 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q5 0x15c244 +/* [R 1] Removed for E3 B0 - Init bit for port 0. When set the initial + * credit of port 0 is copied to the credit register. Should be set and then + * reset after the configuration of the port has ended. */ +#define PBF_REG_INIT_P0 0x140004 +/* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for + * the LB queue. Reset upon init. */ +#define PBF_REG_INTERNAL_CRD_FREED_CNT_LB_Q 0x140354 +/* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for + * queue 0. Reset upon init. */ +#define PBF_REG_INTERNAL_CRD_FREED_CNT_Q0 0x140358 +/* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for + * queue 1. Reset upon init. */ +#define PBF_REG_INTERNAL_CRD_FREED_CNT_Q1 0x14035c /* [RW 1] Enable for mac interface 0. */ #define PBF_REG_MAC_IF0_ENABLE 0x140030 -/* [RW 1] Enable for mac interface 1. */ -#define PBF_REG_MAC_IF1_ENABLE 0x140034 -/* [RW 1] Enable for the loopback interface. */ -#define PBF_REG_MAC_LB_ENABLE 0x140040 /* [RW 6] Bit-map indicating which headers must appear in the packet */ #define PBF_REG_MUST_HAVE_HDRS 0x15c0c4 -/* [RW 1] if set; there is no expected L2 padding in the packet. */ -#define PBF_REG_NO_PAD_IN_PKT 0x15c104 -/* [RW 16] The number of strict priority arbitration slots between 2 RR - arbitration slots. A value of 0 means no strict priority cycles; i.e. the - strict-priority w/ anti-starvation arbiter is a RR arbiter. */ +/* [R 16] Removed for E3 B0 - The number of strict priority arbitration + * slots between 2 RR arbitration slots. A value of 0 means no strict + * priority cycles; i.e. the strict-priority w/ anti-starvation arbiter is a + * RR arbiter. */ #define PBF_REG_NUM_STRICT_ARB_SLOTS 0x15c064 -/* [RW 10] Port 0 threshold used by arbiter in 16 byte lines used when pause - not suppoterd. */ +/* [R 11] Removed for E3 B0 - Port 0 threshold used by arbiter in 16 byte + * lines used when pause not suppoterd. */ #define PBF_REG_P0_ARB_THRSH 0x1400e4 -/* [R 11] Current credit for port 0 in the tx port buffers in 16 byte lines. */ +/* [R 11] Removed for E3 B0 - Current credit for port 0 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P0_CREDIT 0x140200 -/* [RW 11] Initial credit for port 0 in the tx port buffers in 16 byte - lines. */ +/* [R 11] Removed for E3 B0 - Initial credit for port 0 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P0_INIT_CRD 0x1400d0 /* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for - port 0. Reset upon init. */ + * port 0. Reset upon init. */ #define PBF_REG_P0_INTERNAL_CRD_FREED_CNT 0x140308 -/* [RW 1] Indication that pause is enabled for port 0. */ -#define PBF_REG_P0_PAUSE_ENABLE 0x140014 -/* [R 8] Number of tasks in port 0 task queue. */ +/* [R 1] Removed for E3 B0 - Indication that pause is enabled for port 0. */ +#define PBF_REG_P0_PAUSE_ENABLE 0x140014 +/* [R 8] Removed for E3 B0 - Number of tasks in port 0 task queue. */ #define PBF_REG_P0_TASK_CNT 0x140204 -/* [R 32] Cyclic counter for number of 8 byte lines freed from the task - queue of port 0. Reset upon init. */ +/* [R 32] Removed for E3 B0 - Cyclic counter for number of 8 byte lines + * freed from the task queue of port 0. Reset upon init. */ #define PBF_REG_P0_TQ_LINES_FREED_CNT 0x1402f0 -/* [R 11] Number of 8 bytes lines occupied in the task queue of port 0. */ -#define PBF_REG_P0_TQ_OCCUPANCY 0x1402fc -/* [R 11] Current credit for port 1 in the tx port buffers in 16 byte lines. */ +/* [R 12] Number of 8 bytes lines occupied in the task queue of port 0. */ +#define PBF_REG_P0_TQ_OCCUPANCY 0x1402fc +/* [R 11] Removed for E3 B0 - Current credit for port 1 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P1_CREDIT 0x140208 -/* [RW 11] Initial credit for port 1 in the tx port buffers in 16 byte - lines. */ +/* [R 11] Removed for E3 B0 - Initial credit for port 0 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P1_INIT_CRD 0x1400d4 /* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for - port 1. Reset upon init. */ + * port 1. Reset upon init. */ #define PBF_REG_P1_INTERNAL_CRD_FREED_CNT 0x14030c -/* [R 8] Number of tasks in port 1 task queue. */ +/* [R 8] Removed for E3 B0 - Number of tasks in port 1 task queue. */ #define PBF_REG_P1_TASK_CNT 0x14020c -/* [R 32] Cyclic counter for number of 8 byte lines freed from the task - queue of port 1. Reset upon init. */ +/* [R 32] Removed for E3 B0 - Cyclic counter for number of 8 byte lines + * freed from the task queue of port 1. Reset upon init. */ #define PBF_REG_P1_TQ_LINES_FREED_CNT 0x1402f4 -/* [R 11] Number of 8 bytes lines occupied in the task queue of port 1. */ -#define PBF_REG_P1_TQ_OCCUPANCY 0x140300 -/* [R 11] Current credit for port 4 in the tx port buffers in 16 byte lines. */ +/* [R 12] Number of 8 bytes lines occupied in the task queue of port 1. */ +#define PBF_REG_P1_TQ_OCCUPANCY 0x140300 +/* [R 11] Removed for E3 B0 - Current credit for port 4 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P4_CREDIT 0x140210 -/* [RW 11] Initial credit for port 4 in the tx port buffers in 16 byte - lines. */ +/* [R 11] Removed for E3 B0 - Initial credit for port 0 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P4_INIT_CRD 0x1400e0 /* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for - port 4. Reset upon init. */ + * port 4. Reset upon init. */ #define PBF_REG_P4_INTERNAL_CRD_FREED_CNT 0x140310 -/* [R 8] Number of tasks in port 4 task queue. */ +/* [R 8] Removed for E3 B0 - Number of tasks in port 4 task queue. */ #define PBF_REG_P4_TASK_CNT 0x140214 -/* [R 32] Cyclic counter for number of 8 byte lines freed from the task - queue of port 4. Reset upon init. */ +/* [R 32] Removed for E3 B0 - Cyclic counter for number of 8 byte lines + * freed from the task queue of port 4. Reset upon init. */ #define PBF_REG_P4_TQ_LINES_FREED_CNT 0x1402f8 -/* [R 11] Number of 8 bytes lines occupied in the task queue of port 4. */ -#define PBF_REG_P4_TQ_OCCUPANCY 0x140304 +/* [R 12] Number of 8 bytes lines occupied in the task queue of port 4. */ +#define PBF_REG_P4_TQ_OCCUPANCY 0x140304 /* [RW 7] Interrupt mask register #0 read/write */ #define PBF_REG_PBF_INT_MASK 0x1401d4 /* [R 7] Interrupt register #0 read */ #define PBF_REG_PBF_INT_STS 0x1401c8 -/* [RW 2] Update mode for the RST flag */ -#define PBF_REG_RST_FLG_MODE 0x15c0ec -/* [RW 2] Update mode for the SYN flag */ -#define PBF_REG_SYN_FLG_MODE 0x15c0f0 -#define PB_REG_CONTROL 0 +/* [RW 28] Parity mask register #0 read/write */ +#define PBF_REG_PBF_PRTY_MASK 0x1401e4 +/* [RC 28] Parity register #0 read clear */ +#define PBF_REG_PBF_PRTY_STS_CLR 0x1401dc +/* [RW 16] The Ethernet type value for L2 tag 0 */ +#define PBF_REG_TAG_ETHERTYPE_0 0x15c090 +/* [RW 4] The length of the info field for L2 tag 0. The length is between + * 2B and 14B; in 2B granularity */ +#define PBF_REG_TAG_LEN_0 0x15c09c +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_LB_Q 0x140370 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q0 0x140374 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q1 0x140378 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q2 0x14037c +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q3 0x140380 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q4 0x140384 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q5 0x140388 +/* [R 32] Cyclic counter for number of 8 byte lines freed from the LB task + * queue. Reset upon init. */ +#define PBF_REG_TQ_LINES_FREED_CNT_LB_Q 0x14038c +/* [R 32] Cyclic counter for number of 8 byte lines freed from the task + * queue 0. Reset upon init. */ +#define PBF_REG_TQ_LINES_FREED_CNT_Q0 0x140390 +/* [R 32] Cyclic counter for number of 8 byte lines freed from task queue 1. + * Reset upon init. */ +#define PBF_REG_TQ_LINES_FREED_CNT_Q1 0x140394 +/* [R 13] Number of 8 bytes lines occupied in the task queue of the LB + * queue. */ +#define PBF_REG_TQ_OCCUPANCY_LB_Q 0x1403a8 +/* [R 13] Number of 8 bytes lines occupied in the task queue of queue 0. */ +#define PBF_REG_TQ_OCCUPANCY_Q0 0x1403ac +/* [R 13] Number of 8 bytes lines occupied in the task queue of queue 1. */ +#define PBF_REG_TQ_OCCUPANCY_Q1 0x1403b0 /* [RW 2] Interrupt mask register #0 read/write */ #define PB_REG_PB_INT_MASK 0x28 /* [R 2] Interrupt register #0 read */ @@ -2268,346 +1970,233 @@ #define PB_REG_PB_PRTY_MASK 0x38 /* [R 4] Parity register #0 read */ #define PB_REG_PB_PRTY_STS 0x2c +/* [RC 4] Parity register #0 read clear */ +#define PB_REG_PB_PRTY_STS_CLR 0x30 #define PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR (0x1<<0) #define PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW (0x1<<8) #define PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR (0x1<<1) #define PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN (0x1<<6) #define PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN (0x1<<7) -#define PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN (0x1<<4) +#define PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN (0x1<<4) #define PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN (0x1<<3) #define PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN (0x1<<5) #define PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN (0x1<<2) /* [R 8] Config space A attention dirty bits. Each bit indicates that the - corresponding PF generates config space A attention. Set by PXP. Reset by - MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits - from both paths. */ -#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x9010 + * corresponding PF generates config space A attention. Set by PXP. Reset by + * MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits + * from both paths. */ +#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x9010 /* [R 8] Config space B attention dirty bits. Each bit indicates that the - corresponding PF generates config space B attention. Set by PXP. Reset by - MCP writing 1 to icfg_space_b_request_clr. Note: register contains bits - from both paths. */ -#define PGLUE_B_REG_CFG_SPACE_B_REQUEST 0x9014 -/* [RW 1] Type A PF enable inbound interrupt table for CSDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_CSDM_INB_INT_A_PF_ENABLE 0x9194 -/* [RW 18] Type B VF inbound interrupt table for CSDM: bits[17:9]-mask; - its[8:0]-address. Bits [1:0] must be zero (DW resolution address). */ -#define PGLUE_B_REG_CSDM_INB_INT_B_VF 0x916c -/* [RW 1] Type B VF enable inbound interrupt table for CSDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_CSDM_INB_INT_B_VF_ENABLE 0x919c -/* [RW 16] Start offset of CSDM zone A (queue zone) in the internal RAM */ -#define PGLUE_B_REG_CSDM_START_OFFSET_A 0x9100 -/* [RW 16] Start offset of CSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_CSDM_START_OFFSET_B 0x9108 -/* [RW 5] VF Shift of CSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_CSDM_VF_SHIFT_B 0x9110 -/* [RW 1] 0 - Zone A size is 136x32B; 1 - Zone A size is 152x32B. */ -#define PGLUE_B_REG_CSDM_ZONE_A_SIZE_PF 0x91ac + * corresponding PF generates config space B attention. Set by PXP. Reset by + * MCP writing 1 to icfg_space_b_request_clr. Note: register contains bits + * from both paths. */ +#define PGLUE_B_REG_CFG_SPACE_B_REQUEST 0x9014 /* [R 8] FLR request attention dirty bits for PFs 0 to 7. Each bit indicates - that the FLR register of the corresponding PF was set. Set by PXP. Reset - by MCP writing 1 to flr_request_pf_7_0_clr. Note: register contains bits - from both paths. */ + * that the FLR register of the corresponding PF was set. Set by PXP. Reset + * by MCP writing 1 to flr_request_pf_7_0_clr. Note: register contains bits + * from both paths. */ #define PGLUE_B_REG_FLR_REQUEST_PF_7_0 0x9028 /* [W 8] FLR request attention dirty bits clear for PFs 0 to 7. MCP writes 1 - to a bit in this register in order to clear the corresponding bit in - flr_request_pf_7_0 register. Note: register contains bits from both - paths. */ + * to a bit in this register in order to clear the corresponding bit in + * flr_request_pf_7_0 register. Note: register contains bits from both + * paths. */ #define PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR 0x9418 /* [R 32] FLR request attention dirty bits for VFs 96 to 127. Each bit - indicates that the FLR register of the corresponding VF was set. Set by - PXP. Reset by MCP writing 1 to flr_request_vf_127_96_clr. */ + * indicates that the FLR register of the corresponding VF was set. Set by + * PXP. Reset by MCP writing 1 to flr_request_vf_127_96_clr. */ #define PGLUE_B_REG_FLR_REQUEST_VF_127_96 0x9024 /* [R 32] FLR request attention dirty bits for VFs 0 to 31. Each bit - indicates that the FLR register of the corresponding VF was set. Set by - PXP. Reset by MCP writing 1 to flr_request_vf_31_0_clr. */ -#define PGLUE_B_REG_FLR_REQUEST_VF_31_0 0x9018 + * indicates that the FLR register of the corresponding VF was set. Set by + * PXP. Reset by MCP writing 1 to flr_request_vf_31_0_clr. */ +#define PGLUE_B_REG_FLR_REQUEST_VF_31_0 0x9018 /* [R 32] FLR request attention dirty bits for VFs 32 to 63. Each bit - indicates that the FLR register of the corresponding VF was set. Set by - PXP. Reset by MCP writing 1 to flr_request_vf_63_32_clr. */ + * indicates that the FLR register of the corresponding VF was set. Set by + * PXP. Reset by MCP writing 1 to flr_request_vf_63_32_clr. */ #define PGLUE_B_REG_FLR_REQUEST_VF_63_32 0x901c /* [R 32] FLR request attention dirty bits for VFs 64 to 95. Each bit - indicates that the FLR register of the corresponding VF was set. Set by - PXP. Reset by MCP writing 1 to flr_request_vf_95_64_clr. */ + * indicates that the FLR register of the corresponding VF was set. Set by + * PXP. Reset by MCP writing 1 to flr_request_vf_95_64_clr. */ #define PGLUE_B_REG_FLR_REQUEST_VF_95_64 0x9020 /* [R 8] Each bit indicates an incorrect behavior in user RX interface. Bit - 0 - Target memory read arrived with a correctable error. Bit 1 - Target - memory read arrived with an uncorrectable error. Bit 2 - Configuration RW - arrived with a correctable error. Bit 3 - Configuration RW arrived with - an uncorrectable error. Bit 4 - Completion with Configuration Request - Retry Status. Bit 5 - Expansion ROM access received with a write request. - Bit 6 - Completion with pcie_rx_err of 0000; CMPL_STATUS of non-zero; and - pcie_rx_last not asserted. Bit 7 - Completion with pcie_rx_err of 1010; - and pcie_rx_last not asserted. */ + * 0 - Target memory read arrived with a correctable error. Bit 1 - Target + * memory read arrived with an uncorrectable error. Bit 2 - Configuration RW + * arrived with a correctable error. Bit 3 - Configuration RW arrived with + * an uncorrectable error. Bit 4 - Completion with Configuration Request + * Retry Status. Bit 5 - Expansion ROM access received with a write request. + * Bit 6 - Completion with pcie_rx_err of 0000; CMPL_STATUS of non-zero; and + * pcie_rx_last not asserted. Bit 7 - Completion with pcie_rx_err of 1010; + * and pcie_rx_last not asserted. */ #define PGLUE_B_REG_INCORRECT_RCV_DETAILS 0x9068 -#define PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER 0x942c +#define PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER 0x942c #define PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ 0x9430 -#define PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE 0x9434 #define PGLUE_B_REG_INTERNAL_VFID_ENABLE 0x9438 -/* [R 9] Interrupt register #0 read */ +/* [R 11] Interrupt register #0 read */ #define PGLUE_B_REG_PGLUE_B_INT_STS 0x9298 -/* [RC 9] Interrupt register #0 read clear */ -#define PGLUE_B_REG_PGLUE_B_INT_STS_CLR 0x929c +/* [RC 11] Interrupt register #0 read clear */ +#define PGLUE_B_REG_PGLUE_B_INT_STS_CLR 0x929c +/* [RW 2] Parity mask register #0 read/write */ +#define PGLUE_B_REG_PGLUE_B_PRTY_MASK 0x92b4 /* [R 2] Parity register #0 read */ #define PGLUE_B_REG_PGLUE_B_PRTY_STS 0x92a8 +/* [RC 2] Parity register #0 read clear */ +#define PGLUE_B_REG_PGLUE_B_PRTY_STS_CLR 0x92ac +/* [R 13] Details of first request received with error. [2:0] - PFID. [3] - + * VF_VALID. [9:4] - VFID. [11:10] - Error Code - 0 - Indicates Completion + * Timeout of a User Tx non-posted request. 1 - unsupported request. 2 - + * completer abort. 3 - Illegal value for this field. [12] valid - indicates + * if there was a completion error since the last time this register was + * cleared. */ +#define PGLUE_B_REG_RX_ERR_DETAILS 0x9080 +/* [R 18] Details of first ATS Translation Completion request received with + * error. [2:0] - PFID. [3] - VF_VALID. [9:4] - VFID. [11:10] - Error Code - + * 0 - Indicates Completion Timeout of a User Tx non-posted request. 1 - + * unsupported request. 2 - completer abort. 3 - Illegal value for this + * field. [16:12] - ATC OTB EntryID. [17] valid - indicates if there was a + * completion error since the last time this register was cleared. */ +#define PGLUE_B_REG_RX_TCPL_ERR_DETAILS 0x9084 /* [W 8] Debug only - Shadow BME bits clear for PFs 0 to 7. MCP writes 1 to - a bit in this register in order to clear the corresponding bit in - shadow_bme_pf_7_0 register. MCP should never use this unless a - work-around is needed. Note: register contains bits from both paths. */ + * a bit in this register in order to clear the corresponding bit in + * shadow_bme_pf_7_0 register. MCP should never use this unless a + * work-around is needed. Note: register contains bits from both paths. */ #define PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR 0x9458 /* [R 8] SR IOV disabled attention dirty bits. Each bit indicates that the - VF enable register of the corresponding PF is written to 0 and was - previously 1. Set by PXP. Reset by MCP writing 1 to - sr_iov_disabled_request_clr. Note: register contains bits from both - paths. */ + * VF enable register of the corresponding PF is written to 0 and was + * previously 1. Set by PXP. Reset by MCP writing 1 to + * sr_iov_disabled_request_clr. Note: register contains bits from both + * paths. */ #define PGLUE_B_REG_SR_IOV_DISABLED_REQUEST 0x9030 /* [R 32] Indicates the status of tags 32-63. 0 - tags is used - read - completion did not return yet. 1 - tag is unused. Same functionality as - pxp2_registers_pgl_exp_rom_data2 for tags 0-31. */ + * completion did not return yet. 1 - tag is unused. Same functionality as + * pxp2_registers_pgl_exp_rom_data2 for tags 0-31. */ #define PGLUE_B_REG_TAGS_63_32 0x9244 -/* [RW 1] Type A PF enable inbound interrupt table for TSDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_TSDM_INB_INT_A_PF_ENABLE 0x9170 -/* [RW 16] Start offset of TSDM zone A (queue zone) in the internal RAM */ -#define PGLUE_B_REG_TSDM_START_OFFSET_A 0x90c4 -/* [RW 16] Start offset of TSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_TSDM_START_OFFSET_B 0x90cc -/* [RW 5] VF Shift of TSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_TSDM_VF_SHIFT_B 0x90d4 -/* [RW 1] 0 - Zone A size is 136x32B; 1 - Zone A size is 152x32B. */ -#define PGLUE_B_REG_TSDM_ZONE_A_SIZE_PF 0x91a0 /* [R 32] Address [31:0] of first read request not submitted due to error */ #define PGLUE_B_REG_TX_ERR_RD_ADD_31_0 0x9098 /* [R 32] Address [63:32] of first read request not submitted due to error */ -#define PGLUE_B_REG_TX_ERR_RD_ADD_63_32 0x909c +#define PGLUE_B_REG_TX_ERR_RD_ADD_63_32 0x909c /* [R 31] Details of first read request not submitted due to error. [4:0] - VQID. [5] TREQ. 1 - Indicates the request is a Translation Request. - [20:8] - Length in bytes. [23:21] - PFID. [24] - VF_VALID. [30:25] - - VFID. */ + * VQID. [5] TREQ. 1 - Indicates the request is a Translation Request. + * [20:8] - Length in bytes. [23:21] - PFID. [24] - VF_VALID. [30:25] - + * VFID. */ #define PGLUE_B_REG_TX_ERR_RD_DETAILS 0x90a0 /* [R 26] Details of first read request not submitted due to error. [15:0] - Request ID. [19:16] client ID. [20] - last SR. [24:21] - Error type - - [21] - Indicates was_error was set; [22] - Indicates BME was cleared; - [23] - Indicates FID_enable was cleared; [24] - Indicates VF with parent - PF FLR_request or IOV_disable_request dirty bit is set. [25] valid - - indicates if there was a request not submitted due to error since the - last time this register was cleared. */ + * Request ID. [19:16] client ID. [20] - last SR. [24:21] - Error type - + * [21] - Indicates was_error was set; [22] - Indicates BME was cleared; + * [23] - Indicates FID_enable was cleared; [24] - Indicates VF with parent + * PF FLR_request or IOV_disable_request dirty bit is set. [25] valid - + * indicates if there was a request not submitted due to error since the + * last time this register was cleared. */ #define PGLUE_B_REG_TX_ERR_RD_DETAILS2 0x90a4 /* [R 32] Address [31:0] of first write request not submitted due to error */ #define PGLUE_B_REG_TX_ERR_WR_ADD_31_0 0x9088 /* [R 32] Address [63:32] of first write request not submitted due to error */ -#define PGLUE_B_REG_TX_ERR_WR_ADD_63_32 0x908c +#define PGLUE_B_REG_TX_ERR_WR_ADD_63_32 0x908c /* [R 31] Details of first write request not submitted due to error. [4:0] - VQID. [20:8] - Length in bytes. [23:21] - PFID. [24] - VF_VALID. [30:25] - - VFID. */ + * VQID. [20:8] - Length in bytes. [23:21] - PFID. [24] - VF_VALID. [30:25] + * - VFID. */ #define PGLUE_B_REG_TX_ERR_WR_DETAILS 0x9090 /* [R 26] Details of first write request not submitted due to error. [15:0] - Request ID. [19:16] client ID. [20] - last SR. [24:21] - Error type - - [21] - Indicates was_error was set; [22] - Indicates BME was cleared; - [23] - Indicates FID_enable was cleared; [24] - Indicates VF with parent - PF FLR_request or IOV_disable_request dirty bit is set. [25] valid - - indicates if there was a request not submitted due to error since the - last time this register was cleared. */ + * Request ID. [19:16] client ID. [20] - last SR. [24:21] - Error type - + * [21] - Indicates was_error was set; [22] - Indicates BME was cleared; + * [23] - Indicates FID_enable was cleared; [24] - Indicates VF with parent + * PF FLR_request or IOV_disable_request dirty bit is set. [25] valid - + * indicates if there was a request not submitted due to error since the + * last time this register was cleared. */ #define PGLUE_B_REG_TX_ERR_WR_DETAILS2 0x9094 -/* [RW 10] Type A PF/VF inbound interrupt table for USDM: bits[9:5]-mask; - its[4:0]-address relative to start_offset_a. Bits [1:0] can have any - value (Byte resolution address). */ -#define PGLUE_B_REG_USDM_INB_INT_A_0 0x9128 -#define PGLUE_B_REG_USDM_INB_INT_A_1 0x912c -#define PGLUE_B_REG_USDM_INB_INT_A_2 0x9130 -#define PGLUE_B_REG_USDM_INB_INT_A_3 0x9134 -#define PGLUE_B_REG_USDM_INB_INT_A_4 0x9138 -#define PGLUE_B_REG_USDM_INB_INT_A_5 0x913c -#define PGLUE_B_REG_USDM_INB_INT_A_6 0x9140 -/* [RW 1] Type A PF enable inbound interrupt table for USDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_USDM_INB_INT_A_PF_ENABLE 0x917c -/* [RW 1] Type A VF enable inbound interrupt table for USDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_USDM_INB_INT_A_VF_ENABLE 0x9180 -/* [RW 1] Type B VF enable inbound interrupt table for USDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_USDM_INB_INT_B_VF_ENABLE 0x9184 -/* [RW 16] Start offset of USDM zone A (queue zone) in the internal RAM */ -#define PGLUE_B_REG_USDM_START_OFFSET_A 0x90d8 -/* [RW 16] Start offset of USDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_USDM_START_OFFSET_B 0x90e0 -/* [RW 5] VF Shift of USDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_USDM_VF_SHIFT_B 0x90e8 -/* [RW 1] 0 - Zone A size is 136x32B; 1 - Zone A size is 152x32B. */ -#define PGLUE_B_REG_USDM_ZONE_A_SIZE_PF 0x91a4 /* [R 26] Details of first target VF request accessing VF GRC space that - failed permission check. [14:0] Address. [15] w_nr: 0 - Read; 1 - Write. - [21:16] VFID. [24:22] - PFID. [25] valid - indicates if there was a - request accessing VF GRC space that failed permission check since the - last time this register was cleared. Permission checks are: function - permission; R/W permission; address range permission. */ + * failed permission check. [14:0] Address. [15] w_nr: 0 - Read; 1 - Write. + * [21:16] VFID. [24:22] - PFID. [25] valid - indicates if there was a + * request accessing VF GRC space that failed permission check since the + * last time this register was cleared. Permission checks are: function + * permission; R/W permission; address range permission. */ #define PGLUE_B_REG_VF_GRC_SPACE_VIOLATION_DETAILS 0x9234 /* [R 31] Details of first target VF request with length violation (too many - DWs) accessing BAR0. [12:0] Address in DWs (bits [14:2] of byte address). - [14:13] BAR. [20:15] VFID. [23:21] - PFID. [29:24] - Length in DWs. [30] - valid - indicates if there was a request with length violation since the - last time this register was cleared. Length violations: length of more - than 2DWs; length of 2DWs and address not QW aligned; window is GRC and - length is more than 1 DW. */ -#define PGLUE_B_REG_VF_LENGTH_VIOLATION_DETAILS 0x9230 + * DWs) accessing BAR0. [12:0] Address in DWs (bits [14:2] of byte address). + * [14:13] BAR. [20:15] VFID. [23:21] - PFID. [29:24] - Length in DWs. [30] + * valid - indicates if there was a request with length violation since the + * last time this register was cleared. Length violations: length of more + * than 2DWs; length of 2DWs and address not QW aligned; window is GRC and + * length is more than 1 DW. */ +#define PGLUE_B_REG_VF_LENGTH_VIOLATION_DETAILS 0x9230 /* [R 8] Was_error indication dirty bits for PFs 0 to 7. Each bit indicates - that there was a completion with uncorrectable error for the - corresponding PF. Set by PXP. Reset by MCP writing 1 to - was_error_pf_7_0_clr. */ + * that there was a completion with uncorrectable error for the + * corresponding PF. Set by PXP. Reset by MCP writing 1 to + * was_error_pf_7_0_clr. */ #define PGLUE_B_REG_WAS_ERROR_PF_7_0 0x907c /* [W 8] Was_error indication dirty bits clear for PFs 0 to 7. MCP writes 1 - to a bit in this register in order to clear the corresponding bit in - flr_request_pf_7_0 register. */ + * to a bit in this register in order to clear the corresponding bit in + * flr_request_pf_7_0 register. */ #define PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR 0x9470 /* [R 32] Was_error indication dirty bits for VFs 96 to 127. Each bit - indicates that there was a completion with uncorrectable error for the - corresponding VF. Set by PXP. Reset by MCP writing 1 to - was_error_vf_127_96_clr. */ -#define PGLUE_B_REG_WAS_ERROR_VF_127_96 0x9078 + * indicates that there was a completion with uncorrectable error for the + * corresponding VF. Set by PXP. Reset by MCP writing 1 to + * was_error_vf_127_96_clr. */ +#define PGLUE_B_REG_WAS_ERROR_VF_127_96 0x9078 /* [W 32] Was_error indication dirty bits clear for VFs 96 to 127. MCP - writes 1 to a bit in this register in order to clear the corresponding - bit in was_error_vf_127_96 register. */ + * writes 1 to a bit in this register in order to clear the corresponding + * bit in was_error_vf_127_96 register. */ #define PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR 0x9474 /* [R 32] Was_error indication dirty bits for VFs 0 to 31. Each bit - indicates that there was a completion with uncorrectable error for the - corresponding VF. Set by PXP. Reset by MCP writing 1 to - was_error_vf_31_0_clr. */ + * indicates that there was a completion with uncorrectable error for the + * corresponding VF. Set by PXP. Reset by MCP writing 1 to + * was_error_vf_31_0_clr. */ #define PGLUE_B_REG_WAS_ERROR_VF_31_0 0x906c /* [W 32] Was_error indication dirty bits clear for VFs 0 to 31. MCP writes - 1 to a bit in this register in order to clear the corresponding bit in - was_error_vf_31_0 register. */ + * 1 to a bit in this register in order to clear the corresponding bit in + * was_error_vf_31_0 register. */ #define PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR 0x9478 /* [R 32] Was_error indication dirty bits for VFs 32 to 63. Each bit - indicates that there was a completion with uncorrectable error for the - corresponding VF. Set by PXP. Reset by MCP writing 1 to - was_error_vf_63_32_clr. */ + * indicates that there was a completion with uncorrectable error for the + * corresponding VF. Set by PXP. Reset by MCP writing 1 to + * was_error_vf_63_32_clr. */ #define PGLUE_B_REG_WAS_ERROR_VF_63_32 0x9070 /* [W 32] Was_error indication dirty bits clear for VFs 32 to 63. MCP writes - 1 to a bit in this register in order to clear the corresponding bit in - was_error_vf_63_32 register. */ + * 1 to a bit in this register in order to clear the corresponding bit in + * was_error_vf_63_32 register. */ #define PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR 0x947c /* [R 32] Was_error indication dirty bits for VFs 64 to 95. Each bit - indicates that there was a completion with uncorrectable error for the - corresponding VF. Set by PXP. Reset by MCP writing 1 to - was_error_vf_95_64_clr. */ + * indicates that there was a completion with uncorrectable error for the + * corresponding VF. Set by PXP. Reset by MCP writing 1 to + * was_error_vf_95_64_clr. */ #define PGLUE_B_REG_WAS_ERROR_VF_95_64 0x9074 /* [W 32] Was_error indication dirty bits clear for VFs 64 to 95. MCP writes - 1 to a bit in this register in order to clear the corresponding bit in - was_error_vf_95_64 register. */ + * 1 to a bit in this register in order to clear the corresponding bit in + * was_error_vf_95_64 register. */ #define PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR 0x9480 -/* [RW 1] Type A PF enable inbound interrupt table for XSDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_XSDM_INB_INT_A_PF_ENABLE 0x9188 -/* [RW 16] Start offset of XSDM zone A (queue zone) in the internal RAM */ -#define PGLUE_B_REG_XSDM_START_OFFSET_A 0x90ec -/* [RW 16] Start offset of XSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_XSDM_START_OFFSET_B 0x90f4 -/* [RW 5] VF Shift of XSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_XSDM_VF_SHIFT_B 0x90fc -/* [RW 1] 0 - Zone A size is 136x32B; 1 - Zone A size is 152x32B. */ -#define PGLUE_B_REG_XSDM_ZONE_A_SIZE_PF 0x91a8 #define PRS_REG_A_PRSU_20 0x40134 /* [R 8] debug only: CFC load request current credit. Transaction based. */ #define PRS_REG_CFC_LD_CURRENT_CREDIT 0x40164 /* [R 8] debug only: CFC search request current credit. Transaction based. */ #define PRS_REG_CFC_SEARCH_CURRENT_CREDIT 0x40168 /* [RW 6] The initial credit for the search message to the CFC interface. - Credit is transaction based. */ + * Credit is transaction based. */ #define PRS_REG_CFC_SEARCH_INITIAL_CREDIT 0x4011c /* [RW 24] CID for port 0 if no match */ #define PRS_REG_CID_PORT_0 0x400fc -/* [RW 32] CM header for the context error case */ -#define PRS_REG_CM_CONTEXT_ERROR_HDR 0x40264 -/* [RW 32] The CM header for flush message where 'load existed' bit in CFC - load response is reset and packet type is 0. Used in packet start message - to TCM. */ -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_0 0x400dc -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_1 0x400e0 -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_2 0x400e4 -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_3 0x400e8 -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_4 0x400ec -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_5 0x400f0 -/* [RW 32] The CM header for flush message where 'load existed' bit in CFC - load response is set and packet type is 0. Used in packet start message - to TCM. */ -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_0 0x400bc -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_1 0x400c0 -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_2 0x400c4 -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_3 0x400c8 -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_4 0x400cc -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_5 0x400d0 -/* [RW 32] The CM header for a match and packet type 1 for loopback port. - Used in packet start message to TCM. */ -#define PRS_REG_CM_HDR_LOOPBACK_TYPE_1 0x4009c -#define PRS_REG_CM_HDR_LOOPBACK_TYPE_2 0x400a0 -#define PRS_REG_CM_HDR_LOOPBACK_TYPE_3 0x400a4 -#define PRS_REG_CM_HDR_LOOPBACK_TYPE_4 0x400a8 -/* [RW 32] The CM header for a match and packet type 0. Used in packet start - message to TCM. */ -#define PRS_REG_CM_HDR_TYPE_0 0x40078 -#define PRS_REG_CM_HDR_TYPE_1 0x4007c -#define PRS_REG_CM_HDR_TYPE_2 0x40080 -#define PRS_REG_CM_HDR_TYPE_3 0x40084 -#define PRS_REG_CM_HDR_TYPE_4 0x40088 -/* [RW 32] CM header for the load cancelled case */ -#define PRS_REG_CM_LOAD_CANCELLED_HDR 0x40260 -/* [RW 32] The CM header in case there was not a match on the connection */ -#define PRS_REG_CM_NO_MATCH_HDR 0x400b8 -/* [RW 8] Event ID for the context error case */ -#define PRS_REG_CONTEXT_ERROR_EVENT_ID 0x4025c /* [RW 1] Indicates if in outer vlan mode. 0=non-outer-vlan mode; 1=outer - vlan mode. */ + * vlan mode. */ #define PRS_REG_E1HOV_MODE 0x401c8 -/* [RW 8] The 8-bit event ID for a match and packet type 1. Used in packet - start message to TCM. */ -#define PRS_REG_EVENT_ID_1 0x40054 -#define PRS_REG_EVENT_ID_2 0x40058 -#define PRS_REG_EVENT_ID_3 0x4005c -/* [RW 16] The Ethernet type value for first FCoE type */ -#define PRS_REG_FCOE_TYPE 0x401d0 -/* [RW 8] Context region for flush packet with packet type 0. Used in CFC - load request message. */ -#define PRS_REG_FLUSH_REGIONS_TYPE_0 0x40004 -#define PRS_REG_FLUSH_REGIONS_TYPE_1 0x40008 -#define PRS_REG_FLUSH_REGIONS_TYPE_2 0x4000c -#define PRS_REG_FLUSH_REGIONS_TYPE_3 0x40010 -#define PRS_REG_FLUSH_REGIONS_TYPE_4 0x40014 -#define PRS_REG_FLUSH_REGIONS_TYPE_5 0x40018 -#define PRS_REG_FLUSH_REGIONS_TYPE_6 0x4001c -#define PRS_REG_FLUSH_REGIONS_TYPE_7 0x40020 -/* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic - Ethernet header. */ +/* [R 6] Bit-map indicating which L2 hdrs may appear after the basic + * Ethernet header. */ #define PRS_REG_HDRS_AFTER_BASIC 0x40238 -/* [RW 4] The increment value to send in the CFC load request message */ -#define PRS_REG_INC_VALUE 0x40048 -/* [RW 8] Event ID for the load cancelled case */ -#define PRS_REG_LOAD_CANCELLED_EVENT_ID 0x40258 -/* [RW 6] Bit-map indicating which headers must appear in the packet */ +/* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic + * Ethernet header for port 0 packets. */ +#define PRS_REG_HDRS_AFTER_BASIC_PORT_0 0x40270 +#define PRS_REG_HDRS_AFTER_BASIC_PORT_1 0x40290 +/* [R 6] Bit-map indicating which L2 hdrs may appear after L2 tag 0 */ +#define PRS_REG_HDRS_AFTER_TAG_0 0x40248 +/* [RW 6] Bit-map indicating which L2 hdrs may appear after L2 tag 0 for + * port 0 packets */ +#define PRS_REG_HDRS_AFTER_TAG_0_PORT_0 0x40280 +#define PRS_REG_HDRS_AFTER_TAG_0_PORT_1 0x402a0 +/* [R 6] Bit-map indicating which headers must appear in the packet */ #define PRS_REG_MUST_HAVE_HDRS 0x40254 +/* [RW 6] Bit-map indicating which headers must appear in the packet for + * port 0 packets */ +#define PRS_REG_MUST_HAVE_HDRS_PORT_0 0x4028c +#define PRS_REG_MUST_HAVE_HDRS_PORT_1 0x402ac #define PRS_REG_NIC_MODE 0x40138 -/* [RW 8] The 8-bit event ID for cases where there is no match on the - connection. Used in packet start message to TCM. */ -#define PRS_REG_NO_MATCH_EVENT_ID 0x40070 -/* [ST 24] The number of input CFC flush packets */ -#define PRS_REG_NUM_OF_CFC_FLUSH_MESSAGES 0x40128 -/* [ST 32] The number of cycles the Parser halted its operation since it - could not allocate the next serial number */ -#define PRS_REG_NUM_OF_DEAD_CYCLES 0x40130 /* [ST 24] The number of input packets */ #define PRS_REG_NUM_OF_PACKETS 0x40124 -/* [ST 24] The number of input transparent flush packets */ -#define PRS_REG_NUM_OF_TRANSPARENT_FLUSH_MESSAGES 0x4012c -/* [RW 8] Context region for received Ethernet packet with a match and - packet type 0. Used in CFC load request message */ -#define PRS_REG_PACKET_REGIONS_TYPE_0 0x40028 -#define PRS_REG_PACKET_REGIONS_TYPE_1 0x4002c -#define PRS_REG_PACKET_REGIONS_TYPE_2 0x40030 -#define PRS_REG_PACKET_REGIONS_TYPE_3 0x40034 -#define PRS_REG_PACKET_REGIONS_TYPE_4 0x40038 -#define PRS_REG_PACKET_REGIONS_TYPE_5 0x4003c -#define PRS_REG_PACKET_REGIONS_TYPE_6 0x40040 -#define PRS_REG_PACKET_REGIONS_TYPE_7 0x40044 /* [R 2] debug only: Number of pending requests for CAC on port 0. */ #define PRS_REG_PENDING_BRB_CAC0_RQ 0x40174 /* [R 2] debug only: Number of pending requests for header parsing. */ @@ -2618,19 +2207,23 @@ #define PRS_REG_PRS_PRTY_MASK 0x401a4 /* [R 8] Parity register #0 read */ #define PRS_REG_PRS_PRTY_STS 0x40198 -/* [RW 8] Context region for pure acknowledge packets. Used in CFC load - request message */ -#define PRS_REG_PURE_REGIONS 0x40024 +/* [RC 8] Parity register #0 read clear */ +#define PRS_REG_PRS_PRTY_STS_CLR 0x4019c /* [R 32] debug only: Serial number status lsb 32 bits. '1' indicates this - serail number was released by SDM but cannot be used because a previous - serial number was not released. */ + * serail number was released by SDM but cannot be used because a previous + * serial number was not released. */ #define PRS_REG_SERIAL_NUM_STATUS_LSB 0x40154 /* [R 32] debug only: Serial number status msb 32 bits. '1' indicates this - serail number was released by SDM but cannot be used because a previous - serial number was not released. */ + * serail number was released by SDM but cannot be used because a previous + * serial number was not released. */ #define PRS_REG_SERIAL_NUM_STATUS_MSB 0x40158 /* [R 4] debug only: SRC current credit. Transaction based. */ #define PRS_REG_SRC_CURRENT_CREDIT 0x4016c +/* [RW 16] The Ethernet type value for L2 tag 0 */ +#define PRS_REG_TAG_ETHERTYPE_0 0x401d4 +/* [RW 4] The length of the info field for L2 tag 0. The length is between + * 2B and 14B; in 2B granularity */ +#define PRS_REG_TAG_LEN_0 0x4022c /* [R 8] debug only: TCM current credit. Cycle based. */ #define PRS_REG_TCM_CURRENT_CREDIT 0x40160 /* [R 8] debug only: TSDM current credit. Transaction based. */ @@ -2642,144 +2235,113 @@ #define PXP2_PXP2_INT_MASK_0_REG_PGL_WRITE_BLOCKED (0x1<<24) #define PXP2_PXP2_INT_STS_0_REG_WR_PGLUE_EOP_ERROR (0x1<<7) #define PXP2_PXP2_INT_STS_CLR_0_REG_WR_PGLUE_EOP_ERROR (0x1<<7) -/* [R 6] Debug only: Number of used entries in the data FIFO */ +/* [R 7] Debug only: Number of used entries in the data FIFO */ #define PXP2_REG_HST_DATA_FIFO_STATUS 0x12047c /* [R 7] Debug only: Number of used entries in the header FIFO */ -#define PXP2_REG_HST_HEADER_FIFO_STATUS 0x120478 -#define PXP2_REG_PGL_ADDR_88_F0 0x120534 -#define PXP2_REG_PGL_ADDR_8C_F0 0x120538 -#define PXP2_REG_PGL_ADDR_90_F0 0x12053c -#define PXP2_REG_PGL_ADDR_94_F0 0x120540 -#define PXP2_REG_PGL_CONTROL0 0x120490 -#define PXP2_REG_PGL_CONTROL1 0x120514 -#define PXP2_REG_PGL_DEBUG 0x120520 +#define PXP2_REG_HST_HEADER_FIFO_STATUS 0x120478 +#define PXP2_REG_PGL_ADDR_88_F0 0x120534 +/* [R 32] GRC address for configuration access to PCIE config address 0x88. + * any write to this PCIE address will cause a GRC write access to the + * address that's in t this register */ +#define PXP2_REG_PGL_ADDR_88_F1 0x120544 +#define PXP2_REG_PGL_ADDR_8C_F0 0x120538 +/* [R 32] GRC address for configuration access to PCIE config address 0x8c. + * any write to this PCIE address will cause a GRC write access to the + * address that's in t this register */ +#define PXP2_REG_PGL_ADDR_8C_F1 0x120548 +#define PXP2_REG_PGL_ADDR_90_F0 0x12053c +/* [R 32] GRC address for configuration access to PCIE config address 0x90. + * any write to this PCIE address will cause a GRC write access to the + * address that's in t this register */ +#define PXP2_REG_PGL_ADDR_90_F1 0x12054c +#define PXP2_REG_PGL_ADDR_94_F0 0x120540 +/* [R 32] GRC address for configuration access to PCIE config address 0x94. + * any write to this PCIE address will cause a GRC write access to the + * address that's in t this register */ +#define PXP2_REG_PGL_ADDR_94_F1 0x120550 /* [RW 32] third dword data of expansion rom request. this register is - special. reading from it provides a vector outstanding read requests. if - a bit is zero it means that a read request on the corresponding tag did - not finish yet (not all completions have arrived for it) */ + * special. reading from it provides a vector outstanding read requests. if + * a bit is zero it means that a read request on the corresponding tag did + * not finish yet (not all completions have arrived for it) */ #define PXP2_REG_PGL_EXP_ROM2 0x120808 -/* [RW 32] Legacy (type B) PF inbound interrupt table for CSDM: - bits[31:16]-mask; its[15:0]-address. Bits [1:0] must be zero (DW - resolution address). */ -#define PXP2_REG_PGL_INT_CSDM_0 0x1204f4 -#define PXP2_REG_PGL_INT_CSDM_1 0x1204f8 -#define PXP2_REG_PGL_INT_CSDM_2 0x1204fc -#define PXP2_REG_PGL_INT_CSDM_3 0x120500 -#define PXP2_REG_PGL_INT_CSDM_4 0x120504 -#define PXP2_REG_PGL_INT_CSDM_5 0x120508 -#define PXP2_REG_PGL_INT_CSDM_6 0x12050c -#define PXP2_REG_PGL_INT_CSDM_7 0x120510 -/* [RW 32] Legacy (type B) PF inbound interrupt table for TSDM: - bits[31:16]-mask; its[15:0]-address. Bits [1:0] must be zero (DW - resolution address). */ -#define PXP2_REG_PGL_INT_TSDM_0 0x120494 -#define PXP2_REG_PGL_INT_TSDM_1 0x120498 -#define PXP2_REG_PGL_INT_TSDM_2 0x12049c -#define PXP2_REG_PGL_INT_TSDM_3 0x1204a0 -#define PXP2_REG_PGL_INT_TSDM_4 0x1204a4 -#define PXP2_REG_PGL_INT_TSDM_5 0x1204a8 -#define PXP2_REG_PGL_INT_TSDM_6 0x1204ac -#define PXP2_REG_PGL_INT_TSDM_7 0x1204b0 -/* [RW 32] Legacy (type B) PF inbound interrupt table for USDM: - bits[31:16]-mask; its[15:0]-address. Bits [1:0] must be zero (DW - resolution address). */ -#define PXP2_REG_PGL_INT_USDM_0 0x1204b4 -#define PXP2_REG_PGL_INT_USDM_1 0x1204b8 -#define PXP2_REG_PGL_INT_USDM_2 0x1204bc -#define PXP2_REG_PGL_INT_USDM_3 0x1204c0 -#define PXP2_REG_PGL_INT_USDM_4 0x1204c4 -#define PXP2_REG_PGL_INT_USDM_5 0x1204c8 -#define PXP2_REG_PGL_INT_USDM_6 0x1204cc -#define PXP2_REG_PGL_INT_USDM_7 0x1204d0 -/* [RW 32] Legacy (type B) PF inbound interrupt table for XSDM: - bits[31:16]-mask; its[15:0]-address. Bits [1:0] must be zero (DW - resolution address). */ -#define PXP2_REG_PGL_INT_XSDM_0 0x1204d4 -#define PXP2_REG_PGL_INT_XSDM_1 0x1204d8 -#define PXP2_REG_PGL_INT_XSDM_2 0x1204dc -#define PXP2_REG_PGL_INT_XSDM_3 0x1204e0 -#define PXP2_REG_PGL_INT_XSDM_4 0x1204e4 -#define PXP2_REG_PGL_INT_XSDM_5 0x1204e8 -#define PXP2_REG_PGL_INT_XSDM_6 0x1204ec -#define PXP2_REG_PGL_INT_XSDM_7 0x1204f0 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F0 0x120674 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F1 0x120678 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F2 0x12067c /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F3 0x120680 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F4 0x120684 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F5 0x120688 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F6 0x12068c /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F7 0x120690 /* [R 1] this bit indicates that a read request was blocked because of - bus_master_en was deasserted */ + * bus_master_en was deasserted */ #define PXP2_REG_PGL_READ_BLOCKED 0x120568 -#define PXP2_REG_PGL_TAGS_LIMIT 0x1205a8 +#define PXP2_REG_PGL_TAGS_LIMIT 0x1205a8 /* [R 21] debug only */ #define PXP2_REG_PGL_TXW_CDTS 0x12052c /* [R 1] this bit indicates that a write request was blocked because of - bus_master_en was deasserted */ + * bus_master_en was deasserted */ #define PXP2_REG_PGL_WRITE_BLOCKED 0x120564 #define PXP2_REG_PSWRQ_BW_ADD1 0x1201c0 -#define PXP2_REG_PSWRQ_BW_ADD10 0x1201e4 -#define PXP2_REG_PSWRQ_BW_ADD11 0x1201e8 +#define PXP2_REG_PSWRQ_BW_ADD10 0x1201e4 +#define PXP2_REG_PSWRQ_BW_ADD11 0x1201e8 #define PXP2_REG_PSWRQ_BW_ADD2 0x1201c4 -#define PXP2_REG_PSWRQ_BW_ADD28 0x120228 +#define PXP2_REG_PSWRQ_BW_ADD28 0x120228 #define PXP2_REG_PSWRQ_BW_ADD3 0x1201c8 #define PXP2_REG_PSWRQ_BW_ADD6 0x1201d4 #define PXP2_REG_PSWRQ_BW_ADD7 0x1201d8 @@ -2808,68 +2370,49 @@ #define PXP2_REG_PSWRQ_BW_UB8 0x120254 #define PXP2_REG_PSWRQ_BW_UB9 0x120258 #define PXP2_REG_PSWRQ_BW_WR 0x120328 -#define PXP2_REG_PSWRQ_CDU0_L2P 0x120000 +#define PXP2_REG_PSWRQ_CDU0_L2P 0x120000 #define PXP2_REG_PSWRQ_QM0_L2P 0x120038 -#define PXP2_REG_PSWRQ_SRC0_L2P 0x120054 +#define PXP2_REG_PSWRQ_SRC0_L2P 0x120054 #define PXP2_REG_PSWRQ_TM0_L2P 0x12001c #define PXP2_REG_PSWRQ_TSDM0_L2P 0x1200e0 /* [RW 32] Interrupt mask register #0 read/write */ #define PXP2_REG_PXP2_INT_MASK_0 0x120578 #define PXP2_REG_PXP2_INT_MASK_1 0x120614 /* [R 32] Interrupt register #0 read */ -#define PXP2_REG_PXP2_INT_STS_0 0x12056c -#define PXP2_REG_PXP2_INT_STS_1 0x120608 +#define PXP2_REG_PXP2_INT_STS_0 0x12056c +#define PXP2_REG_PXP2_INT_STS_1 0x120608 /* [RC 32] Interrupt register #0 read clear */ #define PXP2_REG_PXP2_INT_STS_CLR_0 0x120570 -/* [WR 32] Interrupt register #0 bit set or clear */ -#define PXP2_REG_PXP2_INT_STS_WR_0 0x120574 /* [RW 32] Parity mask register #0 read/write */ #define PXP2_REG_PXP2_PRTY_MASK_0 0x120588 #define PXP2_REG_PXP2_PRTY_MASK_1 0x120598 /* [R 32] Parity register #0 read */ #define PXP2_REG_PXP2_PRTY_STS_0 0x12057c #define PXP2_REG_PXP2_PRTY_STS_1 0x12058c +/* [RC 32] Parity register #0 read clear */ +#define PXP2_REG_PXP2_PRTY_STS_CLR_0 0x120580 +#define PXP2_REG_PXP2_PRTY_STS_CLR_1 0x120590 /* [R 1] Debug only: The 'almost full' indication from each fifo (gives - indication about backpressure) */ + * indication about backpressure) */ #define PXP2_REG_RD_ALMOST_FULL_0 0x120424 /* [R 8] Debug only: The blocks counter - number of unused block ids */ #define PXP2_REG_RD_BLK_CNT 0x120418 /* [RW 8] Debug only: Total number of available blocks in Tetris Buffer. - Must be bigger than 6. Normally should not be changed. */ -#define PXP2_REG_RD_BLK_NUM_CFG 0x12040c + * Must be bigger than 6. Normally should not be changed. */ +#define PXP2_REG_RD_BLK_NUM_CFG 0x12040c /* [RW 2] CDU byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_CDURD_SWAP_MODE 0x120404 +/* [R 29] Details of first request with error on receive side: [15:0] - Echo + * ID. [28:16] - sub-request length plus start_offset_2_0 minus 1. */ +#define PXP2_REG_RD_CPL_ERR_DETAILS 0x120778 +/* [R 10] Details of first request with error on receive side: [4:0] - VQ + * ID. [8:5] - client ID. [9] - valid - indicates if there was a completion + * error since the last time this register was read. */ +#define PXP2_REG_RD_CPL_ERR_DETAILS2 0x12077c /* [RW 1] When '1'; inputs to the PSWRD block are ignored */ #define PXP2_REG_RD_DISABLE_INPUTS 0x120374 /* [R 1] PSWRD internal memories initialization is done */ #define PXP2_REG_RD_INIT_DONE 0x120370 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq10 */ -#define PXP2_REG_RD_MAX_BLKS_VQ10 0x1203a0 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq11 */ -#define PXP2_REG_RD_MAX_BLKS_VQ11 0x1203a4 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq17 */ -#define PXP2_REG_RD_MAX_BLKS_VQ17 0x1203bc -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq18 */ -#define PXP2_REG_RD_MAX_BLKS_VQ18 0x1203c0 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq19 */ -#define PXP2_REG_RD_MAX_BLKS_VQ19 0x1203c4 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq22 */ -#define PXP2_REG_RD_MAX_BLKS_VQ22 0x1203d0 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq25 */ -#define PXP2_REG_RD_MAX_BLKS_VQ25 0x1203dc -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq6 */ -#define PXP2_REG_RD_MAX_BLKS_VQ6 0x120390 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq9 */ -#define PXP2_REG_RD_MAX_BLKS_VQ9 0x12039c /* [RW 2] PBF byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_PBF_SWAP_MODE 0x1203f4 /* [R 1] Debug only: Indication if delivery ports are idle */ @@ -2877,56 +2420,53 @@ #define PXP2_REG_RD_PORT_IS_IDLE_1 0x120420 /* [RW 2] QM byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_QM_SWAP_MODE 0x1203f8 -/* [R 7] Debug only: The SR counter - number of unused sub request ids */ -#define PXP2_REG_RD_SR_CNT 0x120414 /* [RW 2] SRC byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_SRC_SWAP_MODE 0x120400 +/* [R 7] Debug only: The SR counter - number of unused sub request ids */ +#define PXP2_REG_RD_SR_CNT 0x120414 /* [RW 7] Debug only: Total number of available PCI read sub-requests. Must - be bigger than 1. Normally should not be changed. */ + * be bigger than 1. Normally should not be changed. */ #define PXP2_REG_RD_SR_NUM_CFG 0x120408 /* [RW 1] Signals the PSWRD block to start initializing internal memories */ #define PXP2_REG_RD_START_INIT 0x12036c /* [RW 2] TM byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_TM_SWAP_MODE 0x1203fc -#define PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE 0x1207d8 /* [RW 10] Bandwidth addition to VQ0 write requests */ #define PXP2_REG_RQ_BW_RD_ADD0 0x1201bc /* [RW 10] Bandwidth addition to VQ12 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD12 0x1201ec +#define PXP2_REG_RQ_BW_RD_ADD12 0x1201ec /* [RW 10] Bandwidth addition to VQ13 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD13 0x1201f0 +#define PXP2_REG_RQ_BW_RD_ADD13 0x1201f0 /* [RW 10] Bandwidth addition to VQ14 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD14 0x1201f4 +#define PXP2_REG_RQ_BW_RD_ADD14 0x1201f4 /* [RW 10] Bandwidth addition to VQ15 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD15 0x1201f8 +#define PXP2_REG_RQ_BW_RD_ADD15 0x1201f8 /* [RW 10] Bandwidth addition to VQ16 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD16 0x1201fc +#define PXP2_REG_RQ_BW_RD_ADD16 0x1201fc /* [RW 10] Bandwidth addition to VQ17 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD17 0x120200 +#define PXP2_REG_RQ_BW_RD_ADD17 0x120200 /* [RW 10] Bandwidth addition to VQ18 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD18 0x120204 +#define PXP2_REG_RQ_BW_RD_ADD18 0x120204 /* [RW 10] Bandwidth addition to VQ19 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD19 0x120208 +#define PXP2_REG_RQ_BW_RD_ADD19 0x120208 /* [RW 10] Bandwidth addition to VQ20 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD20 0x12020c +#define PXP2_REG_RQ_BW_RD_ADD20 0x12020c /* [RW 10] Bandwidth addition to VQ22 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD22 0x120210 +#define PXP2_REG_RQ_BW_RD_ADD22 0x120210 /* [RW 10] Bandwidth addition to VQ23 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD23 0x120214 +#define PXP2_REG_RQ_BW_RD_ADD23 0x120214 /* [RW 10] Bandwidth addition to VQ24 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD24 0x120218 +#define PXP2_REG_RQ_BW_RD_ADD24 0x120218 /* [RW 10] Bandwidth addition to VQ25 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD25 0x12021c +#define PXP2_REG_RQ_BW_RD_ADD25 0x12021c /* [RW 10] Bandwidth addition to VQ26 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD26 0x120220 +#define PXP2_REG_RQ_BW_RD_ADD26 0x120220 /* [RW 10] Bandwidth addition to VQ27 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD27 0x120224 +#define PXP2_REG_RQ_BW_RD_ADD27 0x120224 /* [RW 10] Bandwidth addition to VQ4 read requests */ #define PXP2_REG_RQ_BW_RD_ADD4 0x1201cc /* [RW 10] Bandwidth addition to VQ5 read requests */ #define PXP2_REG_RQ_BW_RD_ADD5 0x1201d0 -/* [RW 10] Bandwidth addition to VQ TREQ read requests */ -#define PXP2_REG_RQ_BW_RD_ADD_TREQ 0x1205f8 /* [RW 10] Bandwidth Typical L for VQ0 Read requests */ #define PXP2_REG_RQ_BW_RD_L0 0x1202ac /* [RW 10] Bandwidth Typical L for VQ12 Read requests */ @@ -2963,8 +2503,6 @@ #define PXP2_REG_RQ_BW_RD_L4 0x1202bc /* [RW 10] Bandwidth Typical L for VQ5 Read- currently not used */ #define PXP2_REG_RQ_BW_RD_L5 0x1202c0 -/* [RW 10] Bandwidth Typical L to VQ TREQ read requests */ -#define PXP2_REG_RQ_BW_RD_L_TREQ 0x120600 /* [RW 7] Bandwidth upper bound for VQ0 read requests */ #define PXP2_REG_RQ_BW_RD_UBOUND0 0x120234 /* [RW 7] Bandwidth upper bound for VQ12 read requests */ @@ -3001,12 +2539,10 @@ #define PXP2_REG_RQ_BW_RD_UBOUND4 0x120244 /* [RW 7] Bandwidth upper bound for VQ5 read requests */ #define PXP2_REG_RQ_BW_RD_UBOUND5 0x120248 -/* [RW 7] Bandwidth upper bound to VQ TREQ read requests */ -#define PXP2_REG_RQ_BW_RD_UBOUND_TREQ 0x1205fc /* [RW 10] Bandwidth addition to VQ29 write requests */ -#define PXP2_REG_RQ_BW_WR_ADD29 0x12022c +#define PXP2_REG_RQ_BW_WR_ADD29 0x12022c /* [RW 10] Bandwidth addition to VQ30 write requests */ -#define PXP2_REG_RQ_BW_WR_ADD30 0x120230 +#define PXP2_REG_RQ_BW_WR_ADD30 0x120230 /* [RW 10] Bandwidth Typical L for VQ29 Write requests */ #define PXP2_REG_RQ_BW_WR_L29 0x12031c /* [RW 10] Bandwidth Typical L for VQ30 Write requests */ @@ -3022,35 +2558,31 @@ #define PXP2_REG_RQ_CDU_FIRST_ILT 0x12061c #define PXP2_REG_RQ_CDU_LAST_ILT 0x120620 /* [RW 4] page size in L2P table for CDU module; -4k; -8k; -16k; -32k; -64k; - -128k; -256k; -512k; -1M; -2M; 0-4M */ + * -128k; -256k; -512k; -1M; -2M; 0-4M */ #define PXP2_REG_RQ_CDU_P_SIZE 0x120018 /* [R 1] 1' indicates that the requester has finished its internal - configuration */ + * configuration */ #define PXP2_REG_RQ_CFG_DONE 0x1201b4 /* [RW 2] Endian mode for debug */ #define PXP2_REG_RQ_DBG_ENDIAN_M 0x1201a4 /* [RW 1] When '1'; requests will enter input buffers but wont get out - towards the glue */ + * towards the glue */ #define PXP2_REG_RQ_DISABLE_INPUTS 0x120330 /* [RW 4] Determines alignment of write SRs when a request is split into - several SRs. 0 - 8B aligned. 1 - 64B aligned. 2 - 128B aligned. 3 - 256B - aligned. 4 - 512B aligned. */ + * several SRs. 0 - 8B aligned. 1 - 64B aligned. 2 - 128B aligned. 3 - 256B + * aligned. 4 - 512B aligned. */ #define PXP2_REG_RQ_DRAM_ALIGN 0x1205b0 /* [RW 4] Determines alignment of read SRs when a request is split into - several SRs. 0 - 8B aligned. 1 - 64B aligned. 2 - 128B aligned. 3 - 256B - aligned. 4 - 512B aligned. */ + * several SRs. 0 - 8B aligned. 1 - 64B aligned. 2 - 128B aligned. 3 - 256B + * aligned. 4 - 512B aligned. */ #define PXP2_REG_RQ_DRAM_ALIGN_RD 0x12092c /* [RW 1] when set the new alignment method (E2) will be applied; when reset - the original alignment method (E1 E1H) will be applied */ + * the original alignment method (E1 E1H) will be applied */ #define PXP2_REG_RQ_DRAM_ALIGN_SEL 0x120930 -/* [RW 1] If 1 ILT failiue will not result in ELT access; An interrupt will - be asserted */ -#define PXP2_REG_RQ_ELT_DISABLE 0x12066c +/* [R 32] Status signals in pswrq_garb module */ +#define PXP2_REG_RQ_GARB 0x120748 /* [RW 2] Endian mode for hc */ -#define PXP2_REG_RQ_HC_ENDIAN_M 0x1201a8 -/* [RW 1] when '0' ILT logic will work as in A0; otherwise B0; for back - compatibility needs; Note that different registers are used per mode */ -#define PXP2_REG_RQ_ILT_MODE 0x1205b4 +#define PXP2_REG_RQ_HC_ENDIAN_M 0x1201a8 /* [WB 53] Onchip address table */ #define PXP2_REG_RQ_ONCHIP_AT 0x122000 /* [WB 53] Onchip address table - B0 */ @@ -3058,33 +2590,33 @@ /* [RW 13] Pending read limiter threshold; in Dwords */ #define PXP2_REG_RQ_PDR_LIMIT 0x12033c /* [RW 2] Endian mode for qm */ -#define PXP2_REG_RQ_QM_ENDIAN_M 0x120194 +#define PXP2_REG_RQ_QM_ENDIAN_M 0x120194 #define PXP2_REG_RQ_QM_FIRST_ILT 0x120634 -#define PXP2_REG_RQ_QM_LAST_ILT 0x120638 +#define PXP2_REG_RQ_QM_LAST_ILT 0x120638 /* [RW 4] page size in L2P table for QM module; -4k; -8k; -16k; -32k; -64k; - -128k; -256k; -512k; -1M; -2M; 0-4M */ + * -128k; -256k; -512k; -1M; -2M; 0-4M */ #define PXP2_REG_RQ_QM_P_SIZE 0x120050 /* [RW 1] 1' indicates that the RBC has finished configuring the PSWRQ */ #define PXP2_REG_RQ_RBC_DONE 0x1201b0 /* [RW 3] Max burst size filed for read requests port 0; 000 - 128B; - 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ + * 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ #define PXP2_REG_RQ_RD_MBS0 0x120160 /* [RW 3] Max burst size filed for read requests port 1; 000 - 128B; - 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ + * 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ #define PXP2_REG_RQ_RD_MBS1 0x120168 /* [RW 2] Endian mode for src */ #define PXP2_REG_RQ_SRC_ENDIAN_M 0x12019c #define PXP2_REG_RQ_SRC_FIRST_ILT 0x12063c #define PXP2_REG_RQ_SRC_LAST_ILT 0x120640 /* [RW 4] page size in L2P table for SRC module; -4k; -8k; -16k; -32k; -64k; - -128k; -256k; -512k; -1M; -2M; 0-4M */ + * -128k; -256k; -512k; -1M; -2M; 0-4M */ #define PXP2_REG_RQ_SRC_P_SIZE 0x12006c /* [RW 2] Endian mode for tm */ -#define PXP2_REG_RQ_TM_ENDIAN_M 0x120198 +#define PXP2_REG_RQ_TM_ENDIAN_M 0x120198 #define PXP2_REG_RQ_TM_FIRST_ILT 0x120644 -#define PXP2_REG_RQ_TM_LAST_ILT 0x120648 +#define PXP2_REG_RQ_TM_LAST_ILT 0x120648 /* [RW 4] page size in L2P table for TM module; -4k; -8k; -16k; -32k; -64k; - -128k; -256k; -512k; -1M; -2M; 0-4M */ + * -128k; -256k; -512k; -1M; -2M; 0-4M */ #define PXP2_REG_RQ_TM_P_SIZE 0x120034 /* [R 5] Number of entries in the ufifo; his fifo has l2p completions */ #define PXP2_REG_RQ_UFIFO_NUM_OF_ENTRY 0x12080c @@ -3155,134 +2687,124 @@ /* [R 8] Number of entries occupied by vq 9 in pswrq memory */ #define PXP2_REG_RQ_VQ9_ENTRY_CNT 0x120908 /* [RW 3] Max burst size filed for write requests port 0; 000 - 128B; - 001:256B; 010: 512B; */ + * 001:256B; 010: 512B; */ #define PXP2_REG_RQ_WR_MBS0 0x12015c /* [RW 3] Max burst size filed for write requests port 1; 000 - 128B; - 001:256B; 010: 512B; */ + * 001:256B; 010: 512B; */ #define PXP2_REG_RQ_WR_MBS1 0x120164 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_CDU_MPS 0x1205f0 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_CSDM_MPS 0x1205d0 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_DBG_MPS 0x1205e8 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_DMAE_MPS 0x1205ec -/* [RW 10] This register is not used when pxp2.wr_rev_mode is 1. This - register should have value of 63 when pxp2.wr_rev_mode is 0 to disable - the threshold mechanism for DMAE. Therefore; 63 is the init value for all - modes. */ -#define PXP2_REG_WR_DMAE_TH 0x120368 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_HC_MPS 0x1205c8 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_QM_MPS 0x1205dc -/* [RW 1] For non-USDMDP clients. 0 - working in A0 mode - assert - has_payload only when EOP arrived; - working in B0 mode - assert - has_payload according to pxp2.wr_th_usdmdp or to EOP arrived. */ -#define PXP2_REG_WR_REV_MODE 0x120670 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_SRC_MPS 0x1205e4 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_TM_MPS 0x1205e0 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_TSDM_MPS 0x1205d4 -/* [RW 10] If Number of entries (each represents 16B) in usdmdp fifo is - higher than this threshold then has_payload indication will be asserted; - the default value should be > (MPS size * ~pxp2.wr_usdmdp_outst_req). */ +/* [RW 9] a. When pxp2.wr_th_mode_usdmdp=0 (E1.5-65 mode) should be + * initialized to (MPS/32); b. When pxp2.wr_th_mode_usdmdp=1 (E1.5-90; + * enhanced mode) and pxp2.wr_usdmdp_outst_req is different than default (3) + * should be initialized to (pxp2.wr_usdmdp_outst_req x MPS/32); when + * pxp2.wr_usdmdp_outst_req is 3 the reset value is the correct + * configuration */ #define PXP2_REG_WR_USDMDP_TH 0x120348 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_USDM_MPS 0x1205cc /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_XSDM_MPS 0x1205d8 /* [R 1] debug only: Indication if PSWHST arbiter is idle */ -#define PXP_REG_HST_ARB_IS_IDLE 0x103004 +#define PXP_REG_HST_ARB_IS_IDLE 0x103004 /* [R 8] debug only: A bit mask for all PSWHST arbiter clients. '1' means - this client is waiting for the arbiter. */ + * this client is waiting for the arbiter. */ #define PXP_REG_HST_CLIENTS_WAITING_TO_ARB 0x103008 /* [RW 1] When 1; doorbells are discarded and not passed to doorbell queue - block. Should be used for close the gates. */ + * block. Should be used for close the gates. */ #define PXP_REG_HST_DISCARD_DOORBELLS 0x1030a4 /* [R 1] debug only: '1' means this PSWHST is discarding doorbells. This bit - should update accoring to 'hst_discard_doorbells' register when the state - machine is idle */ + * should update accoring to 'hst_discard_doorbells' register when the state + * machine is idle */ #define PXP_REG_HST_DISCARD_DOORBELLS_STATUS 0x1030a0 /* [RW 1] When 1; new internal writes arriving to the block are discarded. - Should be used for close the gates. */ + * Should be used for close the gates. */ #define PXP_REG_HST_DISCARD_INTERNAL_WRITES 0x1030a8 /* [R 6] debug only: A bit mask for all PSWHST internal write clients. '1' - means this PSWHST is discarding inputs from this client. Each bit should - update accoring to 'hst_discard_internal_writes' register when the state - machine is idle. */ + * means this PSWHST is discarding inputs from this client. Each bit should + * update accoring to 'hst_discard_internal_writes' register when the state + * machine is idle. */ #define PXP_REG_HST_DISCARD_INTERNAL_WRITES_STATUS 0x10309c -/* [WB 160] Used for initialization of the inbound interrupts memory */ -#define PXP_REG_HST_INBOUND_INT 0x103800 /* [R 1] 1 - An incorrect access is logged. The valid bit is reset when the - relevant interrupt register is read (PXP_REG_INT_STS_CLR_1) */ + * relevant interrupt register is read (PXP_REG_INT_STS_CLR_1) */ #define PXP_REG_HST_INCORRECT_ACCESS_VALID 0x1030cc /* [R 1] 1- permission violation data is logged. The valid bit is reset when - the relevant interrupt register is read (PXP_REG_INT_STS_CLR_1) */ -#define PXP_REG_HST_PER_VIOLATION_VALID 0x1030e0 + * the relevant interrupt register is read (PXP_REG_INT_STS_CLR_1) */ +#define PXP_REG_HST_PER_VIOLATION_VALID 0x1030e0 /* [R 15] The FID of the first access to a disabled VF; the format is - [14:12] - pfid; [11:6] - vfid; [5] - vf_valid; [4:1] - client (0 USDM; 1 - CSDM; 2 XSDM; 3 TSDM; 4 HC; 5 GRC; 6 DQ; 7 RESERVED SPACE; 8 ATC); [0] - - w_nr(0-read req; 1- write req). The data is written only when the valid - bit is reset. and it is stays stable until it is reset by the read from - interrupt_clr register */ + * [14:12] - pfid; [11:6] - vfid; [5] - vf_valid; [4:1] - client (0 USDM; 1 + * CSDM; 2 XSDM; 3 TSDM; 4 HC; 5 GRC; 6 DQ; 7 RESERVED SPACE; 8 ATC); [0] - + * w_nr(0-read req; 1- write req). The data is written only when the valid + * bit is reset. and it is stays stable until it is reset by the read from + * interrupt_clr register */ #define PXP_REG_HST_VF_DISABLED_ERROR_DATA 0x1030b8 /* [R 1] 1 - An error request is logged and wasn't handled yet. The valid - bit is reset when the relevant interrupt register is read - (PXP_REG_INT_STS_CLR_1) */ + * bit is reset when the relevant interrupt register is read + * (PXP_REG_INT_STS_CLR_1) */ #define PXP_REG_HST_VF_DISABLED_ERROR_VALID 0x1030bc /* [RW 7] Indirect access to the permission table. The fields are : {Valid; - VFID[5:0]} */ + * VFID[5:0]} */ #define PXP_REG_HST_ZONE_PERMISSION_TABLE 0x103400 -/* [RW 1] Start the Init sequence for the zone permission table */ -#define PXP_REG_HST_ZONE_PERM_TABLE_INIT 0x1030d8 /* [RW 32] Interrupt mask register #0 read/write */ #define PXP_REG_PXP_INT_MASK_0 0x103074 #define PXP_REG_PXP_INT_MASK_1 0x103084 @@ -3296,126 +2818,81 @@ #define PXP_REG_PXP_PRTY_MASK 0x103094 /* [R 27] Parity register #0 read */ #define PXP_REG_PXP_PRTY_STS 0x103088 -/* [RW 4] The activity counter initial increment value sent in the load - request */ -#define QM_REG_ACTCTRINITVAL_0 0x168040 -#define QM_REG_ACTCTRINITVAL_1 0x168044 -#define QM_REG_ACTCTRINITVAL_2 0x168048 -#define QM_REG_ACTCTRINITVAL_3 0x16804c +/* [RC 27] Parity register #0 read clear */ +#define PXP_REG_PXP_PRTY_STS_CLR 0x10308c /* [RW 32] The base logical address (in bytes) of each physical queue. The - index I represents the physical queue number. The 12 lsbs are ignore and - considered zero so practically there are only 20 bits in this register; - queues 63-0 */ -#define QM_REG_BASEADDR 0x168900 + * index I represents the physical queue number. The 12 lsbs are ignore and + * considered zero so practically there are only 20 bits in this register; + * queues 63-0 */ +#define QM_REG_BASEADDR 0x168900 /* [R 32] NOT USED */ #define QM_REG_BASEADDR_EXT_A 0x16e100 -/* [R 17] The credit value for byte credit 0 (COS 0). The value is 2s - complement value (i.e. msb is used for the sign). */ -#define QM_REG_BYTECRD0 0x16e6fc -/* [R 17] The credit value for byte credit 1 (COS 1). The value is 2s - complement value (i.e. msb is used for the sign). */ -#define QM_REG_BYTECRD1 0x16e700 -/* [R 17] The credit value for byte credit 2 (Loopback). The value is 2s - complement value (i.e. msb is used for the sign). */ -#define QM_REG_BYTECRD2 0x16e704 -/* [RW 32] the PBF command queue that each physical queue belongs to. 2 bits - per physical queue (queues 0-15) as follows: 0 for COS0; 1 for COS 1; 2 - for Loopback */ +/* [R 18] The credit value for byte credit 0. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD0 0x16e6fc +/* [R 18] The credit value for byte credit 1. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD1 0x16e700 +/* [R 18] The credit value for byte credit 2. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD2 0x16e704 +/* [R 18] The credit value for byte credit 3. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD3 0x16e7ac +/* [R 18] The credit value for byte credit 4. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD4 0x16e7b0 +/* [R 18] The credit value for byte credit 5. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD5 0x16e7b4 +/* [R 18] The credit value for byte credit 6. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD6 0x16e7b8 +/* [R 32] NOT USED - removed for E3 B0 */ #define QM_REG_BYTECRDCMDQ_0 0x16e6e8 -#define QM_REG_BYTECRDCMDQ_1 0x16e6ec -#define QM_REG_BYTECRDCMDQ_2 0x16e6f0 -#define QM_REG_BYTECRDCMDQ_3 0x16e6f4 -/* [RW 16] The byte credit cost for each task. This value is for all byte - credit counters */ -#define QM_REG_BYTECRDCOST 0x168234 -/* [RC 32] Byte credit update error register; b1-b0: byte credit counter id - (pbf error); b3-b2: byte credit counter id (storm increment error); - b5-b4: byte credit counter id (storm decrement error); b7-b6: reserved; - b8: pbf error valid; b9: storm increment error valid; b10: storm - decrement error valid; b11: reserved; b14-b12: byte credit warning - (warning=decremented below zero). mask bit per byte credit counter; - b31-b15: reserved; */ +/* [RC 32] byte credit update error register; b2-b0: byte credit id (pbf + * error); b3 - reserved (zero filled); b6-b4: byte credit id (storm + * increment error); b7 - reserved (zero filled); b10-b8: byte credit id + * (storm decrement error); b11 - reserved (zero filled); b12: pbf error + * valid; b13: storm increment error valid; b14: storm decrement error + * valid; b15: reserved; b22-b16: byte credit warning (warning=decremented + * below zero). mask bit per voq counter; b31-b23: reserved; NOTE: VOQ id-s + * represent HW */ #define QM_REG_BYTECRDERRREG 0x16e708 -/* [RW 16] The initial byte credit value for all counters */ +/* [RW 17] The initial byte credit value for all counters */ #define QM_REG_BYTECRDINITVAL 0x168238 -/* [R 32] NOT USED */ -#define QM_REG_BYTECRDPORT_LSB 0x168228 -/* [R 32] NOT USED */ -#define QM_REG_BYTECRDPORT_LSB_EXT_A 0x16e520 -/* [R 32] NOT USED */ -#define QM_REG_BYTECRDPORT_MSB 0x168224 -/* [R 32] NOT USED */ -#define QM_REG_BYTECRDPORT_MSB_EXT_A 0x16e51c -/* [RW 16] The byte credit value that if above the QM is considered almost - full */ -#define QM_REG_BYTECREDITAFULLTHR 0x168094 -/* [RW 4] The initial credit for interface */ -#define QM_REG_CMINITCRD_0 0x1680cc -#define QM_REG_CMINITCRD_1 0x1680d0 -#define QM_REG_CMINITCRD_2 0x1680d4 -#define QM_REG_CMINITCRD_3 0x1680d8 -#define QM_REG_CMINITCRD_4 0x1680dc -#define QM_REG_CMINITCRD_5 0x1680e0 -#define QM_REG_CMINITCRD_6 0x1680e4 -#define QM_REG_CMINITCRD_7 0x1680e8 -/* [RW 8] A mask bit per CM interface. If this bit is 0 then this interface - is masked */ -#define QM_REG_CMINTEN 0x1680ec -/* [RW 12] A bit vector which indicates which one of the queues are tied to - interface 0 */ -#define QM_REG_CMINTVOQMASK_0 0x1681f4 -#define QM_REG_CMINTVOQMASK_1 0x1681f8 -#define QM_REG_CMINTVOQMASK_2 0x1681fc -#define QM_REG_CMINTVOQMASK_3 0x168200 -#define QM_REG_CMINTVOQMASK_4 0x168204 -#define QM_REG_CMINTVOQMASK_5 0x168208 -#define QM_REG_CMINTVOQMASK_6 0x16820c -#define QM_REG_CMINTVOQMASK_7 0x168210 /* [RW 20] The number of connections divided by 16 which dictates the size - of each queue which belongs to even function number. */ + * of each queue which belongs to even function number. */ #define QM_REG_CONNNUM_0 0x168020 /* [R 6] Keep the fill level of the fifo from write client 4 */ #define QM_REG_CQM_WRC_FIFOLVL 0x168018 -/* [RW 8] The context regions sent in the CFC load request */ -#define QM_REG_CTXREG_0 0x168030 -#define QM_REG_CTXREG_1 0x168034 -#define QM_REG_CTXREG_2 0x168038 -#define QM_REG_CTXREG_3 0x16803c -/* [RW 12] The VOQ mask used to select the VOQs which needs to be full for - bypass enable */ -#define QM_REG_ENBYPVOQMASK 0x16823c -/* [RW 32] A bit mask per each physical queue. If a bit is set then the - physical queue uses the byte credit; queues 31-0 */ -#define QM_REG_ENBYTECRD_LSB 0x168220 -/* [R 32] NOT USED */ -#define QM_REG_ENBYTECRD_LSB_EXT_A 0x16e518 -/* [RW 32] A bit mask per each physical queue. If a bit is set then the - physical queue uses the byte credit; queues 63-32 */ -#define QM_REG_ENBYTECRD_MSB 0x16821c -/* [R 32] NOT USED */ -#define QM_REG_ENBYTECRD_MSB_EXT_A 0x16e514 -/* [RW 4] If cleared then the secondary interface will not be served by the - RR arbiter */ -#define QM_REG_ENSEC 0x1680f0 -/* [RW 32] NA */ -#define QM_REG_FUNCNUMSEL_LSB 0x168230 -/* [RW 32] NA */ -#define QM_REG_FUNCNUMSEL_MSB 0x16822c -/* [RW 32] A mask register to mask the Almost empty signals which will not - be use for the almost empty indication to the HW block; queues 31:0 */ -#define QM_REG_HWAEMPTYMASK_LSB 0x168218 -/* [R 32] NOT USED */ -#define QM_REG_HWAEMPTYMASK_LSB_EXT_A 0x16e510 -/* [RW 32] A mask register to mask the Almost empty signals which will not - be use for the almost empty indication to the HW block; queues 63:32 */ -#define QM_REG_HWAEMPTYMASK_MSB 0x168214 -/* [R 32] NOT USED */ -#define QM_REG_HWAEMPTYMASK_MSB_EXT_A 0x16e50c -/* [RW 4] The number of outstanding request to CFC */ -#define QM_REG_OUTLDREQ 0x168804 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ0 */ +#define QM_REG_FWVOQ0TOHWVOQ 0x16e7bc +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ1 */ +#define QM_REG_FWVOQ1TOHWVOQ 0x16e7c0 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ2 */ +#define QM_REG_FWVOQ2TOHWVOQ 0x16e7c4 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ3 */ +#define QM_REG_FWVOQ3TOHWVOQ 0x16e7c8 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ4 */ +#define QM_REG_FWVOQ4TOHWVOQ 0x16e7cc +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ5 */ +#define QM_REG_FWVOQ5TOHWVOQ 0x16e7d0 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ6 */ +#define QM_REG_FWVOQ6TOHWVOQ 0x16e7d4 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ7 */ +#define QM_REG_FWVOQ7TOHWVOQ 0x16e7d8 /* [RC 1] A flag to indicate that overflow error occurred in one of the - queues. */ -#define QM_REG_OVFERROR 0x16805c + * queues. */ +#define QM_REG_OVFERROR 0x16805c /* [RC 6] the Q were the qverflow occurs */ #define QM_REG_OVFQNUM 0x168058 /* [R 16] Pause state for physical queues 15-0 */ @@ -3434,34 +2911,17 @@ #define QM_REG_PAUSESTATE6 0x16e694 /* [R 16] NOT USED */ #define QM_REG_PAUSESTATE7 0x16e698 -/* [RW 2] The PCI attributes field used in the PCI request. */ -#define QM_REG_PCIREQAT 0x168054 #define QM_REG_PF_EN 0x16e70c /* [R 24] The number of tasks stored in the QM for the PF. only even - functions are valid in E2 (odd I registers will be hard wired to 0) */ + * functions are valid in E2 (odd I registers will be hard wired to 0) */ #define QM_REG_PF_USG_CNT_0 0x16e040 /* [R 16] NOT USED */ #define QM_REG_PORT0BYTECRD 0x168300 /* [R 16] NOT USED */ #define QM_REG_PORT1BYTECRD 0x168304 -/* [RW 3] pci function number of queues 15-0 */ -#define QM_REG_PQ2PCIFUNC_0 0x16e6bc -#define QM_REG_PQ2PCIFUNC_1 0x16e6c0 -#define QM_REG_PQ2PCIFUNC_2 0x16e6c4 -#define QM_REG_PQ2PCIFUNC_3 0x16e6c8 -#define QM_REG_PQ2PCIFUNC_4 0x16e6cc -#define QM_REG_PQ2PCIFUNC_5 0x16e6d0 -#define QM_REG_PQ2PCIFUNC_6 0x16e6d4 -#define QM_REG_PQ2PCIFUNC_7 0x16e6d8 -/* [RW 1] This register affects the way the QM looks on the interfaces that - involve physical queue logic (push; pop; xsdm command; xcm bypass) and - takes care of the required physical queue mapping logic. the QM will map - IPQN[4:0] = EPQN[4:0]. In addition when set the QM will map - IPQN[5]=EPQN[6]. when reset IPQN[5]=EPQN[5]. */ -#define QM_REG_PQ_MODE 0x16e794 /* [WB 54] Pointer Table Memory for queues 63-0; The mapping is as follow: - ptrtbl[53:30] read pointer; ptrtbl[29:6] write pointer; ptrtbl[5:4] read - bank0; ptrtbl[3:2] read bank 1; ptrtbl[1:0] write bank; */ + * ptrtbl[53:30] read pointer; ptrtbl[29:6] write pointer; ptrtbl[5:4] read + * bank0; ptrtbl[3:2] read bank 1; ptrtbl[1:0] write bank; */ #define QM_REG_PTRTBL 0x168a00 /* [R 54] NOT USED */ #define QM_REG_PTRTBL_EXT_A 0x16e200 @@ -3473,6 +2933,8 @@ #define QM_REG_QM_PRTY_MASK 0x168454 /* [R 12] Parity register #0 read */ #define QM_REG_QM_PRTY_STS 0x168448 +/* [RC 12] Parity register #0 read clear */ +#define QM_REG_QM_PRTY_STS_CLR 0x16844c /* [R 32] Current queues in pipeline: Queues from 32 to 63 */ #define QM_REG_QSTATUS_HIGH 0x16802c /* [R 32] NOT USED */ @@ -3484,308 +2946,49 @@ /* [R 24] The number of tasks queued for each queue; queues 63-0 */ #define QM_REG_QTASKCTR_0 0x168308 /* [R 24] NOT USED */ -#define QM_REG_QTASKCTR_EXT_A_0 0x16e584 +#define QM_REG_QTASKCTR_EXT_A_0 0x16e584 /* [RW 4] Queue tied to VOQ */ #define QM_REG_QVOQIDX_0 0x1680f4 -#define QM_REG_QVOQIDX_10 0x16811c -#define QM_REG_QVOQIDX_100 0x16e49c -#define QM_REG_QVOQIDX_101 0x16e4a0 -#define QM_REG_QVOQIDX_102 0x16e4a4 -#define QM_REG_QVOQIDX_103 0x16e4a8 -#define QM_REG_QVOQIDX_104 0x16e4ac -#define QM_REG_QVOQIDX_105 0x16e4b0 -#define QM_REG_QVOQIDX_106 0x16e4b4 -#define QM_REG_QVOQIDX_107 0x16e4b8 -#define QM_REG_QVOQIDX_108 0x16e4bc -#define QM_REG_QVOQIDX_109 0x16e4c0 -#define QM_REG_QVOQIDX_11 0x168120 -#define QM_REG_QVOQIDX_110 0x16e4c4 -#define QM_REG_QVOQIDX_111 0x16e4c8 -#define QM_REG_QVOQIDX_112 0x16e4cc -#define QM_REG_QVOQIDX_113 0x16e4d0 -#define QM_REG_QVOQIDX_114 0x16e4d4 -#define QM_REG_QVOQIDX_115 0x16e4d8 -#define QM_REG_QVOQIDX_116 0x16e4dc -#define QM_REG_QVOQIDX_117 0x16e4e0 -#define QM_REG_QVOQIDX_118 0x16e4e4 -#define QM_REG_QVOQIDX_119 0x16e4e8 -#define QM_REG_QVOQIDX_12 0x168124 -#define QM_REG_QVOQIDX_120 0x16e4ec -#define QM_REG_QVOQIDX_121 0x16e4f0 -#define QM_REG_QVOQIDX_122 0x16e4f4 -#define QM_REG_QVOQIDX_123 0x16e4f8 -#define QM_REG_QVOQIDX_124 0x16e4fc -#define QM_REG_QVOQIDX_125 0x16e500 -#define QM_REG_QVOQIDX_126 0x16e504 -#define QM_REG_QVOQIDX_127 0x16e508 -#define QM_REG_QVOQIDX_13 0x168128 -#define QM_REG_QVOQIDX_14 0x16812c -#define QM_REG_QVOQIDX_15 0x168130 -#define QM_REG_QVOQIDX_16 0x168134 -#define QM_REG_QVOQIDX_17 0x168138 -#define QM_REG_QVOQIDX_2 0x1680fc -#define QM_REG_QVOQIDX_20 0x168144 -#define QM_REG_QVOQIDX_21 0x168148 -#define QM_REG_QVOQIDX_22 0x16814c -#define QM_REG_QVOQIDX_23 0x168150 -#define QM_REG_QVOQIDX_24 0x168154 -#define QM_REG_QVOQIDX_25 0x168158 -#define QM_REG_QVOQIDX_26 0x16815c -#define QM_REG_QVOQIDX_27 0x168160 -#define QM_REG_QVOQIDX_28 0x168164 -#define QM_REG_QVOQIDX_29 0x168168 -#define QM_REG_QVOQIDX_3 0x168100 -#define QM_REG_QVOQIDX_30 0x16816c -#define QM_REG_QVOQIDX_31 0x168170 -#define QM_REG_QVOQIDX_32 0x168174 -#define QM_REG_QVOQIDX_33 0x168178 -#define QM_REG_QVOQIDX_34 0x16817c -#define QM_REG_QVOQIDX_35 0x168180 -#define QM_REG_QVOQIDX_36 0x168184 -#define QM_REG_QVOQIDX_37 0x168188 -#define QM_REG_QVOQIDX_38 0x16818c -#define QM_REG_QVOQIDX_39 0x168190 -#define QM_REG_QVOQIDX_4 0x168104 -#define QM_REG_QVOQIDX_40 0x168194 -#define QM_REG_QVOQIDX_41 0x168198 -#define QM_REG_QVOQIDX_42 0x16819c -#define QM_REG_QVOQIDX_43 0x1681a0 -#define QM_REG_QVOQIDX_44 0x1681a4 -#define QM_REG_QVOQIDX_45 0x1681a8 -#define QM_REG_QVOQIDX_46 0x1681ac -#define QM_REG_QVOQIDX_47 0x1681b0 -#define QM_REG_QVOQIDX_48 0x1681b4 -#define QM_REG_QVOQIDX_49 0x1681b8 -#define QM_REG_QVOQIDX_5 0x168108 -#define QM_REG_QVOQIDX_50 0x1681bc -#define QM_REG_QVOQIDX_51 0x1681c0 -#define QM_REG_QVOQIDX_52 0x1681c4 -#define QM_REG_QVOQIDX_53 0x1681c8 -#define QM_REG_QVOQIDX_54 0x1681cc -#define QM_REG_QVOQIDX_55 0x1681d0 -#define QM_REG_QVOQIDX_56 0x1681d4 -#define QM_REG_QVOQIDX_57 0x1681d8 -#define QM_REG_QVOQIDX_58 0x1681dc -#define QM_REG_QVOQIDX_59 0x1681e0 -#define QM_REG_QVOQIDX_6 0x16810c -#define QM_REG_QVOQIDX_60 0x1681e4 -#define QM_REG_QVOQIDX_61 0x1681e8 -#define QM_REG_QVOQIDX_62 0x1681ec -#define QM_REG_QVOQIDX_63 0x1681f0 -#define QM_REG_QVOQIDX_64 0x16e40c -#define QM_REG_QVOQIDX_65 0x16e410 -#define QM_REG_QVOQIDX_69 0x16e420 -#define QM_REG_QVOQIDX_7 0x168110 -#define QM_REG_QVOQIDX_70 0x16e424 -#define QM_REG_QVOQIDX_71 0x16e428 -#define QM_REG_QVOQIDX_72 0x16e42c -#define QM_REG_QVOQIDX_73 0x16e430 -#define QM_REG_QVOQIDX_74 0x16e434 -#define QM_REG_QVOQIDX_75 0x16e438 -#define QM_REG_QVOQIDX_76 0x16e43c -#define QM_REG_QVOQIDX_77 0x16e440 -#define QM_REG_QVOQIDX_78 0x16e444 -#define QM_REG_QVOQIDX_79 0x16e448 -#define QM_REG_QVOQIDX_8 0x168114 -#define QM_REG_QVOQIDX_80 0x16e44c -#define QM_REG_QVOQIDX_81 0x16e450 -#define QM_REG_QVOQIDX_85 0x16e460 -#define QM_REG_QVOQIDX_86 0x16e464 -#define QM_REG_QVOQIDX_87 0x16e468 -#define QM_REG_QVOQIDX_88 0x16e46c -#define QM_REG_QVOQIDX_89 0x16e470 -#define QM_REG_QVOQIDX_9 0x168118 -#define QM_REG_QVOQIDX_90 0x16e474 -#define QM_REG_QVOQIDX_91 0x16e478 -#define QM_REG_QVOQIDX_92 0x16e47c -#define QM_REG_QVOQIDX_93 0x16e480 -#define QM_REG_QVOQIDX_94 0x16e484 -#define QM_REG_QVOQIDX_95 0x16e488 -#define QM_REG_QVOQIDX_96 0x16e48c -#define QM_REG_QVOQIDX_97 0x16e490 -#define QM_REG_QVOQIDX_98 0x16e494 -#define QM_REG_QVOQIDX_99 0x16e498 /* [RW 1] Initialization bit command */ #define QM_REG_SOFT_RESET 0x168428 -/* [RW 8] The credit cost per every task in the QM. A value per each VOQ */ -#define QM_REG_TASKCRDCOST_0 0x16809c -#define QM_REG_TASKCRDCOST_1 0x1680a0 -#define QM_REG_TASKCRDCOST_10 0x1680c4 -#define QM_REG_TASKCRDCOST_2 0x1680a4 -#define QM_REG_TASKCRDCOST_3 0x1680a8 -#define QM_REG_TASKCRDCOST_4 0x1680ac -#define QM_REG_TASKCRDCOST_5 0x1680b0 /* [R 6] Keep the fill level of the fifo from write client 3 */ #define QM_REG_TQM_WRC_FIFOLVL 0x168010 /* [R 6] Keep the fill level of the fifo from write client 2 */ #define QM_REG_UQM_WRC_FIFOLVL 0x168008 -/* [RW 24] The PBF command queue which is associated with each VOQ (2 bits - per VOQ) as follows: 0 for COS0; 1 for COS1; 2 for loopback */ -#define QM_REG_VOQCMDQ 0x16e6f8 /* [RC 32] VOQ credit update error register; b3-b0: voq id (pbf error); - b7-b4: voq id (storm increment error); b11-b8: voq id (storm decrement - error); b12: pbf error valid; b13: storm increment error valid; b14: - storm decrement error valid; b15: reserved; b27-b16: voq warning - (warning=decremented below zero). mask bit per voq counter; b31-b28: - reserved; */ + * b7-b4: voq id (storm increment error); b11-b8: voq id (storm decrement + * error); b12: pbf error valid; b13: storm increment error valid; b14: + * storm decrement error valid; b15: reserved; b27-b16: voq warning + * (warning=decremented below zero). mask bit per voq counter; b31-b28: + * reserved; NOTE: VOQ id-s represent HW VOQ id */ #define QM_REG_VOQCRDERRREG 0x168408 /* [R 17] The credit value for each VOQ. The value is 2s complement value - (i.e. msb is used for the sign). */ + * (i.e. msb is used for the sign). */ #define QM_REG_VOQCREDIT_0 0x1682d0 #define QM_REG_VOQCREDIT_1 0x1682d4 +#define QM_REG_VOQCREDIT_2 0x1682d8 +#define QM_REG_VOQCREDIT_3 0x1682dc #define QM_REG_VOQCREDIT_4 0x1682e0 -/* [RW 16] The credit value that if above the QM is considered almost full */ -#define QM_REG_VOQCREDITAFULLTHR 0x168090 +#define QM_REG_VOQCREDIT_5 0x1682e4 +#define QM_REG_VOQCREDIT_6 0x1682e8 /* [RW 16] The init and maximum credit for each VoQ */ #define QM_REG_VOQINITCREDIT_0 0x168060 #define QM_REG_VOQINITCREDIT_1 0x168064 -#define QM_REG_VOQINITCREDIT_10 0x168088 #define QM_REG_VOQINITCREDIT_2 0x168068 #define QM_REG_VOQINITCREDIT_3 0x16806c #define QM_REG_VOQINITCREDIT_4 0x168070 #define QM_REG_VOQINITCREDIT_5 0x168074 -/* [R 1] NOT USED */ -#define QM_REG_VOQPORT_0 0x1682a0 -#define QM_REG_VOQPORT_1 0x1682a4 -#define QM_REG_VOQPORT_2 0x1682a8 +#define QM_REG_VOQINITCREDIT_6 0x168078 /* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ #define QM_REG_VOQQMASK_0_LSB 0x168240 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_0_LSB_EXT_A 0x16e524 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_0_MSB 0x168244 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_0_MSB_EXT_A 0x16e528 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_10_LSB 0x168290 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_10_LSB_EXT_A 0x16e574 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_10_MSB 0x168294 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_10_MSB_EXT_A 0x16e578 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_11_LSB 0x168298 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_11_LSB_EXT_A 0x16e57c -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_11_MSB 0x16829c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_11_MSB_EXT_A 0x16e580 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_1_LSB 0x168248 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_1_LSB_EXT_A 0x16e52c -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_1_MSB 0x16824c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_1_MSB_EXT_A 0x16e530 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_2_LSB 0x168250 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_2_LSB_EXT_A 0x16e534 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_2_MSB 0x168254 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_2_MSB_EXT_A 0x16e538 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_3_LSB 0x168258 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_3_LSB_EXT_A 0x16e53c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_3_MSB_EXT_A 0x16e540 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_4_LSB 0x168260 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_4_LSB_EXT_A 0x16e544 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_4_MSB 0x168264 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_4_MSB_EXT_A 0x16e548 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_5_LSB 0x168268 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_5_LSB_EXT_A 0x16e54c -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_5_MSB 0x16826c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_5_MSB_EXT_A 0x16e550 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_6_LSB 0x168270 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_6_LSB_EXT_A 0x16e554 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_6_MSB 0x168274 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_6_MSB_EXT_A 0x16e558 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_7_LSB 0x168278 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_7_LSB_EXT_A 0x16e55c -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_7_MSB 0x16827c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_7_MSB_EXT_A 0x16e560 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_8_LSB 0x168280 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_8_LSB_EXT_A 0x16e564 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_8_MSB 0x168284 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_8_MSB_EXT_A 0x16e568 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_9_LSB 0x168288 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_9_LSB_EXT_A 0x16e56c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_9_MSB_EXT_A 0x16e570 -/* [RW 32] Wrr weights. NOTE: weight update is allowed only to queues which - are either empty or paused */ -#define QM_REG_WRRWEIGHTS_0 0x16880c -#define QM_REG_WRRWEIGHTS_1 0x168810 -#define QM_REG_WRRWEIGHTS_10 0x168814 -#define QM_REG_WRRWEIGHTS_11 0x168818 -#define QM_REG_WRRWEIGHTS_12 0x16881c -#define QM_REG_WRRWEIGHTS_13 0x168820 -#define QM_REG_WRRWEIGHTS_14 0x168824 -#define QM_REG_WRRWEIGHTS_15 0x168828 -#define QM_REG_WRRWEIGHTS_16 0x16e000 -#define QM_REG_WRRWEIGHTS_17 0x16e004 -#define QM_REG_WRRWEIGHTS_18 0x16e008 -#define QM_REG_WRRWEIGHTS_19 0x16e00c -#define QM_REG_WRRWEIGHTS_2 0x16882c -#define QM_REG_WRRWEIGHTS_20 0x16e010 -#define QM_REG_WRRWEIGHTS_21 0x16e014 -#define QM_REG_WRRWEIGHTS_22 0x16e018 -#define QM_REG_WRRWEIGHTS_23 0x16e01c -#define QM_REG_WRRWEIGHTS_24 0x16e020 -#define QM_REG_WRRWEIGHTS_25 0x16e024 -#define QM_REG_WRRWEIGHTS_26 0x16e028 -#define QM_REG_WRRWEIGHTS_27 0x16e02c -#define QM_REG_WRRWEIGHTS_28 0x16e030 -#define QM_REG_WRRWEIGHTS_29 0x16e034 -#define QM_REG_WRRWEIGHTS_3 0x168830 -#define QM_REG_WRRWEIGHTS_30 0x16e038 -#define QM_REG_WRRWEIGHTS_31 0x16e03c -#define QM_REG_WRRWEIGHTS_4 0x168834 -#define QM_REG_WRRWEIGHTS_5 0x168838 -#define QM_REG_WRRWEIGHTS_6 0x16883c -#define QM_REG_WRRWEIGHTS_7 0x168840 -#define QM_REG_WRRWEIGHTS_8 0x168844 -#define QM_REG_WRRWEIGHTS_9 0x168848 /* [R 6] Keep the fill level of the fifo from write client 1 */ #define QM_REG_XQM_WRC_FIFOLVL 0x168000 +/* [W 1] reset to parity interrupt */ +#define SEM_FAST_REG_PARITY_RST 0x18840 #define SRC_REG_COUNTFREE0 0x40500 -/* [RW 1] If clr the searcher is compatible to E1 A0 - support only two - ports. If set the searcher support 8 functions. */ -#define SRC_REG_E1HMF_ENABLE 0x404cc #define SRC_REG_FIRSTFREE0 0x40510 #define SRC_REG_KEYRSS0_0 0x40408 #define SRC_REG_KEYRSS0_7 0x40424 -#define SRC_REG_KEYRSS0_9 0x4042c -#define SRC_REG_KEYRSS1_0 0x40430 -#define SRC_REG_KEYRSS1_9 0x40454 #define SRC_REG_KEYSEARCH_0 0x40458 #define SRC_REG_KEYSEARCH_1 0x4045c #define SRC_REG_KEYSEARCH_2 0x40460 @@ -3806,1518 +3009,429 @@ #define SRC_REG_SRC_PRTY_MASK 0x404c8 /* [R 3] Parity register #0 read */ #define SRC_REG_SRC_PRTY_STS 0x404bc -/* [RW 32] Indirect access to AG context with 32-bits granularity. The bits - [11:8] of the address should be the offset within the accessed LCID - context; the bits [7:0] are the accessed LCID.Example: to write to REG10 - LCID100. The RBC address should be 12'ha64. */ -#define TCM_REG_AG_CTX 0x54000 +/* [RC 3] Parity register #0 read clear */ +#define SRC_REG_SRC_PRTY_STS_CLR 0x404c0 /* [R 4] Used to read the value of the XX protection CAM occupancy counter. */ #define TCM_REG_CAM_OCCUP 0x5017c -/* [RW 1] CDU AG read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define TCM_REG_CDU_AG_RD_IFEN 0x50034 -/* [RW 1] CDU AG write Interface enable. If 0 - the request and valid input - are disregarded; all other signals are treated as usual; if 1 - normal - activity. */ -#define TCM_REG_CDU_AG_WR_IFEN 0x50030 -/* [RW 1] CDU STORM read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define TCM_REG_CDU_SM_RD_IFEN 0x5003c -/* [RW 1] CDU STORM write Interface enable. If 0 - the request and valid - input is disregarded; all other signals are treated as usual; if 1 - - normal activity. */ -#define TCM_REG_CDU_SM_WR_IFEN 0x50038 /* [RW 4] CFC output initial credit. Max credit available - 15.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 1 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 1 at start-up. */ #define TCM_REG_CFC_INIT_CRD 0x50204 -/* [RW 3] The weight of the CP input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_CP_WEIGHT 0x500c0 -/* [RW 1] Input csem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define TCM_REG_CSEM_IFEN 0x5002c /* [RC 1] Message length mismatch (relative to last indication) at the In#9 - interface. */ -#define TCM_REG_CSEM_LENGTH_MIS 0x50174 -/* [RW 3] The weight of the input csem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_CSEM_WEIGHT 0x500bc -/* [RW 8] The Event ID in case of ErrorFlg is set in the input message. */ -#define TCM_REG_ERR_EVNT_ID 0x500a0 -/* [RW 28] The CM erroneous header for QM and Timers formatting. */ -#define TCM_REG_ERR_TCM_HDR 0x5009c -/* [RW 8] The Event ID for Timers expiration. */ -#define TCM_REG_EXPR_EVNT_ID 0x500a4 + * interface. */ +#define TCM_REG_CSEM_LENGTH_MIS 0x50174 /* [RW 8] FIC0 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define TCM_REG_FIC0_INIT_CRD 0x5020c /* [RW 8] FIC1 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define TCM_REG_FIC1_INIT_CRD 0x50210 -/* [RW 1] Arbitration between Input Arbiter groups: 0 - fair Round-Robin; 1 - - strict priority defined by ~tcm_registers_gr_ag_pr.gr_ag_pr; - ~tcm_registers_gr_ld0_pr.gr_ld0_pr and - ~tcm_registers_gr_ld1_pr.gr_ld1_pr. */ -#define TCM_REG_GR_ARB_TYPE 0x50114 -/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Store channel is the - compliment of the other 3 groups. */ -#define TCM_REG_GR_LD0_PR 0x5011c -/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Store channel is the - compliment of the other 3 groups. */ -#define TCM_REG_GR_LD1_PR 0x50120 -/* [RW 4] The number of double REG-pairs; loaded from the STORM context and - sent to STORM; for a specific connection type. The double REG-pairs are - used to align to STORM context row size of 128 bits. The offset of these - data in the STORM context is always 0. Index _i stands for the connection - type (one of 16). */ -#define TCM_REG_N_SM_CTX_LD_0 0x50050 -#define TCM_REG_N_SM_CTX_LD_1 0x50054 -#define TCM_REG_N_SM_CTX_LD_2 0x50058 -#define TCM_REG_N_SM_CTX_LD_3 0x5005c -#define TCM_REG_N_SM_CTX_LD_4 0x50060 -#define TCM_REG_N_SM_CTX_LD_5 0x50064 -/* [RW 1] Input pbf Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_PBF_IFEN 0x50024 /* [RC 1] Message length mismatch (relative to last indication) at the In#7 - interface. */ + * interface. */ #define TCM_REG_PBF_LENGTH_MIS 0x5016c -/* [RW 3] The weight of the input pbf in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_PBF_WEIGHT 0x500b4 -#define TCM_REG_PHYS_QNUM0_0 0x500e0 -#define TCM_REG_PHYS_QNUM0_1 0x500e4 -#define TCM_REG_PHYS_QNUM1_0 0x500e8 -#define TCM_REG_PHYS_QNUM1_1 0x500ec -#define TCM_REG_PHYS_QNUM2_0 0x500f0 -#define TCM_REG_PHYS_QNUM2_1 0x500f4 -#define TCM_REG_PHYS_QNUM3_0 0x500f8 -#define TCM_REG_PHYS_QNUM3_1 0x500fc /* [RW 1] Input prs Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ + * acknowledge output is deasserted; all other signals are treated as usual; + * if 1 - normal activity. */ #define TCM_REG_PRS_IFEN 0x50020 /* [RC 1] Message length mismatch (relative to last indication) at the In#6 - interface. */ + * interface. */ #define TCM_REG_PRS_LENGTH_MIS 0x50168 -/* [RW 3] The weight of the input prs in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_PRS_WEIGHT 0x500b0 -/* [RW 8] The Event ID for Timers formatting in case of stop done. */ -#define TCM_REG_STOP_EVNT_ID 0x500a8 /* [RC 1] Message length mismatch (relative to last indication) at the STORM - interface. */ + * interface. */ #define TCM_REG_STORM_LENGTH_MIS 0x50160 -/* [RW 1] STORM - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define TCM_REG_STORM_TCM_IFEN 0x50010 -/* [RW 3] The weight of the STORM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_STORM_WEIGHT 0x500ac -/* [RW 1] CM - CFC Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TCM_CFC_IFEN 0x50040 /* [RW 11] Interrupt mask register #0 read/write */ #define TCM_REG_TCM_INT_MASK 0x501dc /* [R 11] Interrupt register #0 read */ #define TCM_REG_TCM_INT_STS 0x501d0 +/* [RW 27] Parity mask register #0 read/write */ +#define TCM_REG_TCM_PRTY_MASK 0x501ec /* [R 27] Parity register #0 read */ #define TCM_REG_TCM_PRTY_STS 0x501e0 -/* [RW 3] The size of AG context region 0 in REG-pairs. Designates the MS - REG-pair number (e.g. if region 0 is 6 REG-pairs; the value should be 5). - Is used to determine the number of the AG context REG-pairs written back; - when the input message Reg1WbFlg isn't set. */ -#define TCM_REG_TCM_REG0_SZ 0x500d8 -/* [RW 1] CM - STORM 0 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TCM_STORM0_IFEN 0x50004 -/* [RW 1] CM - STORM 1 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TCM_STORM1_IFEN 0x50008 -/* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TCM_TQM_IFEN 0x5000c -/* [RW 1] If set the Q index; received from the QM is inserted to event ID. */ -#define TCM_REG_TCM_TQM_USE_Q 0x500d4 -/* [RW 28] The CM header for Timers expiration command. */ -#define TCM_REG_TM_TCM_HDR 0x50098 -/* [RW 1] Timers - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define TCM_REG_TM_TCM_IFEN 0x5001c -/* [RW 3] The weight of the Timers input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_TM_WEIGHT 0x500d0 +/* [RC 27] Parity register #0 read clear */ +#define TCM_REG_TCM_PRTY_STS_CLR 0x501e4 /* [RW 6] QM output initial credit. Max credit available - 32.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 32 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 32 at start-up. */ #define TCM_REG_TQM_INIT_CRD 0x5021c -/* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_TQM_P_WEIGHT 0x500c8 -/* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_TQM_S_WEIGHT 0x500cc -/* [RW 28] The CM header value for QM request (primary). */ -#define TCM_REG_TQM_TCM_HDR_P 0x50090 -/* [RW 28] The CM header value for QM request (secondary). */ -#define TCM_REG_TQM_TCM_HDR_S 0x50094 -/* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TQM_TCM_IFEN 0x50014 -/* [RW 1] Input SDM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TSDM_IFEN 0x50018 /* [RC 1] Message length mismatch (relative to last indication) at the SDM - interface. */ -#define TCM_REG_TSDM_LENGTH_MIS 0x50164 -/* [RW 3] The weight of the SDM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_TSDM_WEIGHT 0x500c4 -/* [RW 1] Input usem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define TCM_REG_USEM_IFEN 0x50028 + * interface. */ +#define TCM_REG_TSDM_LENGTH_MIS 0x50164 /* [RC 1] Message length mismatch (relative to last indication) at the In#8 - interface. */ -#define TCM_REG_USEM_LENGTH_MIS 0x50170 -/* [RW 3] The weight of the input usem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_USEM_WEIGHT 0x500b8 + * interface. */ +#define TCM_REG_USEM_LENGTH_MIS 0x50170 /* [RW 21] Indirect access to the descriptor table of the XX protection - mechanism. The fields are: [5:0] - length of the message; 15:6] - message - pointer; 20:16] - next pointer. */ + * mechanism. The fields are: [5:0] - length of the message; 15:6] - message + * pointer; 20:16] - next pointer. */ #define TCM_REG_XX_DESCR_TABLE 0x50280 -#define TCM_REG_XX_DESCR_TABLE_SIZE 32 +#define TCM_REG_XX_DESCR_TABLE_SIZE 29 /* [R 6] Use to read the value of XX protection Free counter. */ -#define TCM_REG_XX_FREE 0x50178 -/* [RW 6] Initial value for the credit counter; responsible for fulfilling - of the Input Stage XX protection buffer by the XX protection pending - messages. Max credit available - 127.Write writes the initial credit - value; read returns the current value of the credit counter. Must be - initialized to 19 at start-up. */ -#define TCM_REG_XX_INIT_CRD 0x50220 -/* [RW 6] Maximum link list size (messages locked) per connection in the XX - protection. */ -#define TCM_REG_XX_MAX_LL_SZ 0x50044 -/* [RW 6] The maximum number of pending messages; which may be stored in XX - protection. ~tcm_registers_xx_free.xx_free is also written on write. */ -#define TCM_REG_XX_MSG_NUM 0x50224 -/* [RW 8] The Event ID; sent to the STORM in case of XX overflow. */ -#define TCM_REG_XX_OVFL_EVNT_ID 0x50048 -/* [RW 16] Indirect access to the XX table of the XX protection mechanism. - The fields are:[4:0] - tail pointer; [10:5] - Link List size; 15:11] - - header pointer. */ -#define TCM_REG_XX_TABLE 0x50240 -/* [RW 4] Load value for for cfc ac credit cnt. */ -#define TM_REG_CFC_AC_CRDCNT_VAL 0x164208 -/* [RW 4] Load value for cfc cld credit cnt. */ -#define TM_REG_CFC_CLD_CRDCNT_VAL 0x164210 -/* [RW 8] Client0 context region. */ -#define TM_REG_CL0_CONT_REGION 0x164030 -/* [RW 8] Client1 context region. */ -#define TM_REG_CL1_CONT_REGION 0x164034 -/* [RW 8] Client2 context region. */ -#define TM_REG_CL2_CONT_REGION 0x164038 -/* [RW 2] Client in High priority client number. */ -#define TM_REG_CLIN_PRIOR0_CLIENT 0x164024 -/* [RW 4] Load value for clout0 cred cnt. */ -#define TM_REG_CLOUT_CRDCNT0_VAL 0x164220 -/* [RW 4] Load value for clout1 cred cnt. */ -#define TM_REG_CLOUT_CRDCNT1_VAL 0x164228 -/* [RW 4] Load value for clout2 cred cnt. */ -#define TM_REG_CLOUT_CRDCNT2_VAL 0x164230 -/* [RW 1] Enable client0 input. */ -#define TM_REG_EN_CL0_INPUT 0x164008 -/* [RW 1] Enable client1 input. */ -#define TM_REG_EN_CL1_INPUT 0x16400c -/* [RW 1] Enable client2 input. */ -#define TM_REG_EN_CL2_INPUT 0x164010 -#define TM_REG_EN_LINEAR0_TIMER 0x164014 -/* [RW 1] Enable real time counter. */ -#define TM_REG_EN_REAL_TIME_CNT 0x1640d8 -/* [RW 1] Enable for Timers state machines. */ -#define TM_REG_EN_TIMERS 0x164000 -/* [RW 4] Load value for expiration credit cnt. CFC max number of - outstanding load requests for timers (expiration) context loading. */ -#define TM_REG_EXP_CRDCNT_VAL 0x164238 -/* [RW 32] Linear0 logic address. */ -#define TM_REG_LIN0_LOGIC_ADDR 0x164240 +#define TCM_REG_XX_FREE 0x50178 +#define TM_REG_EN_LINEAR0_TIMER 0x164014 /* [RW 18] Linear0 Max active cid (in banks of 32 entries). */ #define TM_REG_LIN0_MAX_ACTIVE_CID 0x164048 /* [ST 16] Linear0 Number of scans counter. */ #define TM_REG_LIN0_NUM_SCANS 0x1640a0 -/* [WB 64] Linear0 phy address. */ -#define TM_REG_LIN0_PHY_ADDR 0x164270 -/* [RW 1] Linear0 physical address valid. */ -#define TM_REG_LIN0_PHY_ADDR_VALID 0x164248 #define TM_REG_LIN0_SCAN_ON 0x1640d0 /* [RW 24] Linear0 array scan timeout. */ #define TM_REG_LIN0_SCAN_TIME 0x16403c #define TM_REG_LIN0_VNIC_UC 0x164128 -/* [RW 32] Linear1 logic address. */ -#define TM_REG_LIN1_LOGIC_ADDR 0x164250 -/* [WB 64] Linear1 phy address. */ -#define TM_REG_LIN1_PHY_ADDR 0x164280 -/* [RW 1] Linear1 physical address valid. */ -#define TM_REG_LIN1_PHY_ADDR_VALID 0x164258 -/* [RW 6] Linear timer set_clear fifo threshold. */ -#define TM_REG_LIN_SETCLR_FIFO_ALFULL_THR 0x164070 -/* [RW 2] Load value for pci arbiter credit cnt. */ -#define TM_REG_PCIARB_CRDCNT_VAL 0x164260 -/* [RW 20] The amount of hardware cycles for each timer tick. */ -#define TM_REG_TIMER_TICK_SIZE 0x16401c -/* [RW 8] Timers Context region. */ -#define TM_REG_TM_CONTEXT_REGION 0x164044 /* [RW 1] Interrupt mask register #0 read/write */ #define TM_REG_TM_INT_MASK 0x1640fc /* [R 1] Interrupt register #0 read */ #define TM_REG_TM_INT_STS 0x1640f0 -/* [RW 8] The event id for aggregated interrupt 0 */ -#define TSDM_REG_AGG_INT_EVENT_0 0x42038 -#define TSDM_REG_AGG_INT_EVENT_1 0x4203c -/* [RW 1] The T bit for aggregated interrupt 0 */ -#define TSDM_REG_AGG_INT_T_0 0x420b8 -#define TSDM_REG_AGG_INT_T_1 0x420bc -/* [RW 14] The start address in the internal RAM for the cfc_rsp lcid */ -#define TSDM_REG_CFC_RSP_START_ADDR 0x42008 -/* [RW 16] The maximum value of the competion counter #0 */ -#define TSDM_REG_CMP_COUNTER_MAX0 0x4201c -/* [RW 16] The maximum value of the competion counter #1 */ -#define TSDM_REG_CMP_COUNTER_MAX1 0x42020 -/* [RW 16] The maximum value of the competion counter #2 */ -#define TSDM_REG_CMP_COUNTER_MAX2 0x42024 -/* [RW 16] The maximum value of the competion counter #3 */ -#define TSDM_REG_CMP_COUNTER_MAX3 0x42028 -/* [RW 16] The maximum value of the competion counter #4 */ -#define TSDM_REG_CMP_COUNTER_MAX4 0x422c0 -/* [RW 16] The maximum value of the competion counter #5 */ -#define TSDM_REG_CMP_COUNTER_MAX5 0x422c4 -/* [RW 16] The maximum value of the competion counter #6 */ -#define TSDM_REG_CMP_COUNTER_MAX6 0x422c8 -/* [RW 16] The maximum value of the competion counter #7 */ -#define TSDM_REG_CMP_COUNTER_MAX7 0x422cc -/* [RW 14] The start address in the internal RAM for the completion - counters. */ -#define TSDM_REG_CMP_COUNTER_START_ADDR 0x4200c +/* [RW 7] Parity mask register #0 read/write */ +#define TM_REG_TM_PRTY_MASK 0x16410c +/* [RC 7] Parity register #0 read clear */ +#define TM_REG_TM_PRTY_STS_CLR 0x164104 #define TSDM_REG_ENABLE_IN1 0x42238 -#define TSDM_REG_ENABLE_IN2 0x4223c -#define TSDM_REG_ENABLE_OUT1 0x42240 -#define TSDM_REG_ENABLE_OUT2 0x42244 -/* [RW 4] The initial number of messages that can be sent to the pxp control - interface without receiving any ACK. */ -#define TSDM_REG_INIT_CREDIT_PXP_CTRL 0x424bc -/* [ST 32] The number of ACK after placement messages received */ -#define TSDM_REG_NUM_OF_ACK_AFTER_PLACE 0x4227c -/* [ST 32] The number of packet end messages received from the parser */ -#define TSDM_REG_NUM_OF_PKT_END_MSG 0x42274 -/* [ST 32] The number of requests received from the pxp async if */ -#define TSDM_REG_NUM_OF_PXP_ASYNC_REQ 0x42278 -/* [ST 32] The number of commands received in queue 0 */ -#define TSDM_REG_NUM_OF_Q0_CMD 0x42248 -/* [ST 32] The number of commands received in queue 10 */ -#define TSDM_REG_NUM_OF_Q10_CMD 0x4226c -/* [ST 32] The number of commands received in queue 11 */ -#define TSDM_REG_NUM_OF_Q11_CMD 0x42270 -/* [ST 32] The number of commands received in queue 1 */ -#define TSDM_REG_NUM_OF_Q1_CMD 0x4224c -/* [ST 32] The number of commands received in queue 3 */ -#define TSDM_REG_NUM_OF_Q3_CMD 0x42250 -/* [ST 32] The number of commands received in queue 4 */ -#define TSDM_REG_NUM_OF_Q4_CMD 0x42254 -/* [ST 32] The number of commands received in queue 5 */ -#define TSDM_REG_NUM_OF_Q5_CMD 0x42258 -/* [ST 32] The number of commands received in queue 6 */ -#define TSDM_REG_NUM_OF_Q6_CMD 0x4225c -/* [ST 32] The number of commands received in queue 7 */ -#define TSDM_REG_NUM_OF_Q7_CMD 0x42260 -/* [ST 32] The number of commands received in queue 8 */ -#define TSDM_REG_NUM_OF_Q8_CMD 0x42264 -/* [ST 32] The number of commands received in queue 9 */ -#define TSDM_REG_NUM_OF_Q9_CMD 0x42268 -/* [RW 14] The start address in the internal RAM for the packet end message */ -#define TSDM_REG_PCK_END_MSG_START_ADDR 0x42014 -/* [RW 14] The start address in the internal RAM for queue counters */ -#define TSDM_REG_Q_COUNTER_START_ADDR 0x42010 /* [R 1] pxp_ctrl rd_data fifo empty in sdm_dma_rsp block */ #define TSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY 0x42548 /* [R 1] parser fifo empty in sdm_sync block */ #define TSDM_REG_SYNC_PARSER_EMPTY 0x42550 /* [R 1] parser serial fifo empty in sdm_sync block */ #define TSDM_REG_SYNC_SYNC_EMPTY 0x42558 -/* [RW 32] Tick for timer counter. Applicable only when - ~tsdm_registers_timer_tick_enable.timer_tick_enable =1 */ -#define TSDM_REG_TIMER_TICK 0x42000 /* [RW 32] Interrupt mask register #0 read/write */ #define TSDM_REG_TSDM_INT_MASK_0 0x4229c #define TSDM_REG_TSDM_INT_MASK_1 0x422ac /* [R 32] Interrupt register #0 read */ -#define TSDM_REG_TSDM_INT_STS_0 0x42290 -#define TSDM_REG_TSDM_INT_STS_1 0x422a0 +#define TSDM_REG_TSDM_INT_STS_0 0x42290 +#define TSDM_REG_TSDM_INT_STS_1 0x422a0 /* [RW 11] Parity mask register #0 read/write */ -#define TSDM_REG_TSDM_PRTY_MASK 0x422bc +#define TSDM_REG_TSDM_PRTY_MASK 0x422bc /* [R 11] Parity register #0 read */ #define TSDM_REG_TSDM_PRTY_STS 0x422b0 -/* [RW 5] The number of time_slots in the arbitration cycle */ -#define TSEM_REG_ARB_CYCLE_SIZE 0x180034 -/* [RW 3] The source that is associated with arbitration element 0. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2 */ -#define TSEM_REG_ARB_ELEMENT0 0x180020 -/* [RW 3] The source that is associated with arbitration element 1. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~tsem_registers_arb_element0.arb_element0 */ -#define TSEM_REG_ARB_ELEMENT1 0x180024 -/* [RW 3] The source that is associated with arbitration element 2. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~tsem_registers_arb_element0.arb_element0 - and ~tsem_registers_arb_element1.arb_element1 */ -#define TSEM_REG_ARB_ELEMENT2 0x180028 -/* [RW 3] The source that is associated with arbitration element 3. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2.Could - not be equal to register ~tsem_registers_arb_element0.arb_element0 and - ~tsem_registers_arb_element1.arb_element1 and - ~tsem_registers_arb_element2.arb_element2 */ -#define TSEM_REG_ARB_ELEMENT3 0x18002c -/* [RW 3] The source that is associated with arbitration element 4. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~tsem_registers_arb_element0.arb_element0 - and ~tsem_registers_arb_element1.arb_element1 and - ~tsem_registers_arb_element2.arb_element2 and - ~tsem_registers_arb_element3.arb_element3 */ -#define TSEM_REG_ARB_ELEMENT4 0x180030 -#define TSEM_REG_ENABLE_IN 0x1800a4 -#define TSEM_REG_ENABLE_OUT 0x1800a8 +/* [RC 11] Parity register #0 read clear */ +#define TSDM_REG_TSDM_PRTY_STS_CLR 0x422b4 /* [RW 32] This address space contains all registers and memories that are - placed in SEM_FAST block. The SEM_FAST registers are described in - appendix B. In order to access the SEM_FAST registers the base address - TSEM_REGISTERS_FAST_MEMORY (Offset: 0x1a0000) should be added to each - SEM_FAST register offset. */ + * placed in SEM_FAST block. The SEM_FAST registers are described in + * appendix B. In order to access the SEM_FAST registers the base address + * TSEM_REGISTERS_FAST_MEMORY (Offset: 0x1a0000) should be added to each + * SEM_FAST register offset. */ #define TSEM_REG_FAST_MEMORY 0x1a0000 -/* [RW 1] Disables input messages from FIC0 May be updated during run_time - by the microcode */ -#define TSEM_REG_FIC0_DISABLE 0x180224 -/* [RW 1] Disables input messages from FIC1 May be updated during run_time - by the microcode */ -#define TSEM_REG_FIC1_DISABLE 0x180234 /* [RW 15] Interrupt table Read and write access to it is not possible in - the middle of the work */ + * the middle of the work */ #define TSEM_REG_INT_TABLE 0x180400 -/* [ST 24] Statistics register. The number of messages that entered through - FIC0 */ -#define TSEM_REG_MSG_NUM_FIC0 0x180000 -/* [ST 24] Statistics register. The number of messages that entered through - FIC1 */ -#define TSEM_REG_MSG_NUM_FIC1 0x180004 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC0 */ -#define TSEM_REG_MSG_NUM_FOC0 0x180008 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC1 */ -#define TSEM_REG_MSG_NUM_FOC1 0x18000c -/* [ST 24] Statistics register. The number of messages that were sent to - FOC2 */ -#define TSEM_REG_MSG_NUM_FOC2 0x180010 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC3 */ -#define TSEM_REG_MSG_NUM_FOC3 0x180014 -/* [RW 1] Disables input messages from the passive buffer May be updated - during run_time by the microcode */ -#define TSEM_REG_PAS_DISABLE 0x18024c /* [WB 128] Debug only. Passive buffer memory */ -#define TSEM_REG_PASSIVE_BUFFER 0x181000 +#define TSEM_REG_PASSIVE_BUFFER 0x181000 /* [WB 46] pram memory. B45 is parity; b[44:0] - data. */ #define TSEM_REG_PRAM 0x1c0000 -/* [R 8] Valid sleeping threads indication have bit per thread */ +/* [R 20] Valid sleeping threads indication have bit per thread */ #define TSEM_REG_SLEEP_THREADS_VALID 0x18026c /* [R 1] EXT_STORE FIFO is empty in sem_slow_ls_ext */ #define TSEM_REG_SLOW_EXT_STORE_EMPTY 0x1802a0 -/* [RW 8] List of free threads . There is a bit per thread. */ -#define TSEM_REG_THREADS_LIST 0x1802e4 -/* [RW 3] The arbitration scheme of time_slot 0 */ -#define TSEM_REG_TS_0_AS 0x180038 -/* [RW 3] The arbitration scheme of time_slot 10 */ -#define TSEM_REG_TS_10_AS 0x180060 -/* [RW 3] The arbitration scheme of time_slot 11 */ -#define TSEM_REG_TS_11_AS 0x180064 -/* [RW 3] The arbitration scheme of time_slot 12 */ -#define TSEM_REG_TS_12_AS 0x180068 -/* [RW 3] The arbitration scheme of time_slot 13 */ -#define TSEM_REG_TS_13_AS 0x18006c -/* [RW 3] The arbitration scheme of time_slot 14 */ -#define TSEM_REG_TS_14_AS 0x180070 -/* [RW 3] The arbitration scheme of time_slot 15 */ -#define TSEM_REG_TS_15_AS 0x180074 -/* [RW 3] The arbitration scheme of time_slot 16 */ -#define TSEM_REG_TS_16_AS 0x180078 -/* [RW 3] The arbitration scheme of time_slot 17 */ -#define TSEM_REG_TS_17_AS 0x18007c -/* [RW 3] The arbitration scheme of time_slot 18 */ -#define TSEM_REG_TS_18_AS 0x180080 -/* [RW 3] The arbitration scheme of time_slot 1 */ -#define TSEM_REG_TS_1_AS 0x18003c -/* [RW 3] The arbitration scheme of time_slot 2 */ -#define TSEM_REG_TS_2_AS 0x180040 -/* [RW 3] The arbitration scheme of time_slot 3 */ -#define TSEM_REG_TS_3_AS 0x180044 -/* [RW 3] The arbitration scheme of time_slot 4 */ -#define TSEM_REG_TS_4_AS 0x180048 -/* [RW 3] The arbitration scheme of time_slot 5 */ -#define TSEM_REG_TS_5_AS 0x18004c -/* [RW 3] The arbitration scheme of time_slot 6 */ -#define TSEM_REG_TS_6_AS 0x180050 -/* [RW 3] The arbitration scheme of time_slot 7 */ -#define TSEM_REG_TS_7_AS 0x180054 -/* [RW 3] The arbitration scheme of time_slot 8 */ -#define TSEM_REG_TS_8_AS 0x180058 -/* [RW 3] The arbitration scheme of time_slot 9 */ -#define TSEM_REG_TS_9_AS 0x18005c /* [RW 32] Interrupt mask register #0 read/write */ #define TSEM_REG_TSEM_INT_MASK_0 0x180100 #define TSEM_REG_TSEM_INT_MASK_1 0x180110 /* [R 32] Interrupt register #0 read */ -#define TSEM_REG_TSEM_INT_STS_0 0x1800f4 -#define TSEM_REG_TSEM_INT_STS_1 0x180104 +#define TSEM_REG_TSEM_INT_STS_0 0x1800f4 +#define TSEM_REG_TSEM_INT_STS_1 0x180104 /* [RW 32] Parity mask register #0 read/write */ #define TSEM_REG_TSEM_PRTY_MASK_0 0x180120 #define TSEM_REG_TSEM_PRTY_MASK_1 0x180130 /* [R 32] Parity register #0 read */ #define TSEM_REG_TSEM_PRTY_STS_0 0x180114 #define TSEM_REG_TSEM_PRTY_STS_1 0x180124 +/* [RC 32] Parity register #0 read clear */ +#define TSEM_REG_TSEM_PRTY_STS_CLR_0 0x180118 +#define TSEM_REG_TSEM_PRTY_STS_CLR_1 0x180128 /* [W 7] VF or PF ID for reset error bit. Values 0-63 reset error bit for 64 - VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ + * VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ #define TSEM_REG_VFPF_ERR_NUM 0x180380 -/* [RW 32] Indirect access to AG context with 32-bits granularity. The bits - [10:8] of the address should be the offset within the accessed LCID - context; the bits [7:0] are the accessed LCID.Example: to write to REG10 - LCID100. The RBC address should be 12'ha64. */ -#define UCM_REG_AG_CTX 0xe2000 /* [R 5] Used to read the XX protection CAM occupancy counter. */ #define UCM_REG_CAM_OCCUP 0xe0170 -/* [RW 1] CDU AG read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define UCM_REG_CDU_AG_RD_IFEN 0xe0038 -/* [RW 1] CDU AG write Interface enable. If 0 - the request and valid input - are disregarded; all other signals are treated as usual; if 1 - normal - activity. */ -#define UCM_REG_CDU_AG_WR_IFEN 0xe0034 -/* [RW 1] CDU STORM read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define UCM_REG_CDU_SM_RD_IFEN 0xe0040 -/* [RW 1] CDU STORM write Interface enable. If 0 - the request and valid - input is disregarded; all other signals are treated as usual; if 1 - - normal activity. */ -#define UCM_REG_CDU_SM_WR_IFEN 0xe003c /* [RW 4] CFC output initial credit. Max credit available - 15.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 1 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 1 at start-up. */ #define UCM_REG_CFC_INIT_CRD 0xe0204 -/* [RW 3] The weight of the CP input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_CP_WEIGHT 0xe00c4 -/* [RW 1] Input csem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_CSEM_IFEN 0xe0028 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the csem interface is detected. */ -#define UCM_REG_CSEM_LENGTH_MIS 0xe0160 -/* [RW 3] The weight of the input csem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_CSEM_WEIGHT 0xe00b8 -/* [RW 1] Input dorq Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_DORQ_IFEN 0xe0030 + * at the csem interface is detected. */ +#define UCM_REG_CSEM_LENGTH_MIS 0xe0160 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the dorq interface is detected. */ -#define UCM_REG_DORQ_LENGTH_MIS 0xe0168 -/* [RW 3] The weight of the input dorq in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_DORQ_WEIGHT 0xe00c0 -/* [RW 8] The Event ID in case ErrorFlg input message bit is set. */ -#define UCM_REG_ERR_EVNT_ID 0xe00a4 -/* [RW 28] The CM erroneous header for QM and Timers formatting. */ -#define UCM_REG_ERR_UCM_HDR 0xe00a0 -/* [RW 8] The Event ID for Timers expiration. */ -#define UCM_REG_EXPR_EVNT_ID 0xe00a8 + * at the dorq interface is detected. */ +#define UCM_REG_DORQ_LENGTH_MIS 0xe0168 /* [RW 8] FIC0 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define UCM_REG_FIC0_INIT_CRD 0xe020c /* [RW 8] FIC1 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define UCM_REG_FIC1_INIT_CRD 0xe0210 -/* [RW 1] Arbitration between Input Arbiter groups: 0 - fair Round-Robin; 1 - - strict priority defined by ~ucm_registers_gr_ag_pr.gr_ag_pr; - ~ucm_registers_gr_ld0_pr.gr_ld0_pr and - ~ucm_registers_gr_ld1_pr.gr_ld1_pr. */ -#define UCM_REG_GR_ARB_TYPE 0xe0144 -/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Store channel group is - compliment to the others. */ -#define UCM_REG_GR_LD0_PR 0xe014c -/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Store channel group is - compliment to the others. */ -#define UCM_REG_GR_LD1_PR 0xe0150 -/* [RW 5] The number of double REG-pairs; loaded from the STORM context and - sent to STORM; for a specific connection type. the double REG-pairs are - used in order to align to STORM context row size of 128 bits. The offset - of these data in the STORM context is always 0. Index _i stands for the - connection type (one of 16). */ -#define UCM_REG_N_SM_CTX_LD_0 0xe0054 -#define UCM_REG_N_SM_CTX_LD_1 0xe0058 -#define UCM_REG_N_SM_CTX_LD_2 0xe005c -#define UCM_REG_N_SM_CTX_LD_3 0xe0060 -#define UCM_REG_N_SM_CTX_LD_4 0xe0064 -#define UCM_REG_N_SM_CTX_LD_5 0xe0068 -#define UCM_REG_PHYS_QNUM0_0 0xe0110 -#define UCM_REG_PHYS_QNUM0_1 0xe0114 -#define UCM_REG_PHYS_QNUM1_0 0xe0118 -#define UCM_REG_PHYS_QNUM1_1 0xe011c -#define UCM_REG_PHYS_QNUM2_0 0xe0120 -#define UCM_REG_PHYS_QNUM2_1 0xe0124 -#define UCM_REG_PHYS_QNUM3_0 0xe0128 -#define UCM_REG_PHYS_QNUM3_1 0xe012c -/* [RW 8] The Event ID for Timers formatting in case of stop done. */ -#define UCM_REG_STOP_EVNT_ID 0xe00ac /* [RC 1] Set when the message length mismatch (relative to last indication) - at the STORM interface is detected. */ + * at the STORM interface is detected. */ #define UCM_REG_STORM_LENGTH_MIS 0xe0154 -/* [RW 1] STORM - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_STORM_UCM_IFEN 0xe0010 -/* [RW 3] The weight of the STORM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_STORM_WEIGHT 0xe00b0 /* [RW 4] Timers output initial credit. Max credit available - 15.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 4 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 4 at start-up. */ #define UCM_REG_TM_INIT_CRD 0xe021c -/* [RW 28] The CM header for Timers expiration command. */ -#define UCM_REG_TM_UCM_HDR 0xe009c -/* [RW 1] Timers - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_TM_UCM_IFEN 0xe001c -/* [RW 3] The weight of the Timers input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_TM_WEIGHT 0xe00d4 -/* [RW 1] Input tsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_TSEM_IFEN 0xe0024 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the tsem interface is detected. */ -#define UCM_REG_TSEM_LENGTH_MIS 0xe015c -/* [RW 3] The weight of the input tsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_TSEM_WEIGHT 0xe00b4 -/* [RW 1] CM - CFC Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UCM_CFC_IFEN 0xe0044 + * at the tsem interface is detected. */ +#define UCM_REG_TSEM_LENGTH_MIS 0xe015c /* [RW 11] Interrupt mask register #0 read/write */ #define UCM_REG_UCM_INT_MASK 0xe01d4 /* [R 11] Interrupt register #0 read */ #define UCM_REG_UCM_INT_STS 0xe01c8 +/* [RW 27] Parity mask register #0 read/write */ +#define UCM_REG_UCM_PRTY_MASK 0xe01e4 /* [R 27] Parity register #0 read */ #define UCM_REG_UCM_PRTY_STS 0xe01d8 -/* [RW 2] The size of AG context region 0 in REG-pairs. Designates the MS - REG-pair number (e.g. if region 0 is 6 REG-pairs; the value should be 5). - Is used to determine the number of the AG context REG-pairs written back; - when the Reg1WbFlg isn't set. */ -#define UCM_REG_UCM_REG0_SZ 0xe00dc -/* [RW 1] CM - STORM 0 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UCM_STORM0_IFEN 0xe0004 -/* [RW 1] CM - STORM 1 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UCM_STORM1_IFEN 0xe0008 -/* [RW 1] CM - Timers Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_UCM_TM_IFEN 0xe0020 -/* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UCM_UQM_IFEN 0xe000c -/* [RW 1] If set the Q index; received from the QM is inserted to event ID. */ -#define UCM_REG_UCM_UQM_USE_Q 0xe00d8 +/* [RC 27] Parity register #0 read clear */ +#define UCM_REG_UCM_PRTY_STS_CLR 0xe01dc /* [RW 6] QM output initial credit. Max credit available - 32.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 32 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 32 at start-up. */ #define UCM_REG_UQM_INIT_CRD 0xe0220 -/* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_UQM_P_WEIGHT 0xe00cc -/* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_UQM_S_WEIGHT 0xe00d0 -/* [RW 28] The CM header value for QM request (primary). */ -#define UCM_REG_UQM_UCM_HDR_P 0xe0094 -/* [RW 28] The CM header value for QM request (secondary). */ -#define UCM_REG_UQM_UCM_HDR_S 0xe0098 -/* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UQM_UCM_IFEN 0xe0014 -/* [RW 1] Input SDM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_USDM_IFEN 0xe0018 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the SDM interface is detected. */ -#define UCM_REG_USDM_LENGTH_MIS 0xe0158 -/* [RW 3] The weight of the SDM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_USDM_WEIGHT 0xe00c8 -/* [RW 1] Input xsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_XSEM_IFEN 0xe002c + * at the SDM interface is detected. */ +#define UCM_REG_USDM_LENGTH_MIS 0xe0158 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the xsem interface isdetected. */ -#define UCM_REG_XSEM_LENGTH_MIS 0xe0164 -/* [RW 3] The weight of the input xsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_XSEM_WEIGHT 0xe00bc + * at the xsem interface isdetected. */ +#define UCM_REG_XSEM_LENGTH_MIS 0xe0164 /* [RW 20] Indirect access to the descriptor table of the XX protection - mechanism. The fields are:[5:0] - message length; 14:6] - message - pointer; 19:15] - next pointer. */ + * mechanism. The fields are:[5:0] - message length; 14:6] - message + * pointer; 19:15] - next pointer. */ #define UCM_REG_XX_DESCR_TABLE 0xe0280 -#define UCM_REG_XX_DESCR_TABLE_SIZE 32 +#define UCM_REG_XX_DESCR_TABLE_SIZE 27 /* [R 6] Use to read the XX protection Free counter. */ -#define UCM_REG_XX_FREE 0xe016c -/* [RW 6] Initial value for the credit counter; responsible for fulfilling - of the Input Stage XX protection buffer by the XX protection pending - messages. Write writes the initial credit value; read returns the current - value of the credit counter. Must be initialized to 12 at start-up. */ -#define UCM_REG_XX_INIT_CRD 0xe0224 -/* [RW 6] The maximum number of pending messages; which may be stored in XX - protection. ~ucm_registers_xx_free.xx_free is also written on write. */ -#define UCM_REG_XX_MSG_NUM 0xe0228 -/* [RW 8] The Event ID; sent to the STORM in case of XX overflow. */ -#define UCM_REG_XX_OVFL_EVNT_ID 0xe004c -/* [RW 16] Indirect access to the XX table of the XX protection mechanism. - The fields are: [4:0] - tail pointer; 10:5] - Link List size; 15:11] - - header pointer. */ -#define UCM_REG_XX_TABLE 0xe0300 -/* [RW 8] The event id for aggregated interrupt 0 */ -#define USDM_REG_AGG_INT_EVENT_0 0xc4038 -#define USDM_REG_AGG_INT_EVENT_1 0xc403c -#define USDM_REG_AGG_INT_EVENT_2 0xc4040 -#define USDM_REG_AGG_INT_EVENT_4 0xc4048 -#define USDM_REG_AGG_INT_EVENT_5 0xc404c -#define USDM_REG_AGG_INT_EVENT_6 0xc4050 -/* [RW 1] For each aggregated interrupt index whether the mode is normal (0) - or auto-mask-mode (1) */ -#define USDM_REG_AGG_INT_MODE_0 0xc41b8 -#define USDM_REG_AGG_INT_MODE_1 0xc41bc -#define USDM_REG_AGG_INT_MODE_4 0xc41c8 -#define USDM_REG_AGG_INT_MODE_5 0xc41cc -#define USDM_REG_AGG_INT_MODE_6 0xc41d0 -/* [RW 1] The T bit for aggregated interrupt 5 */ -#define USDM_REG_AGG_INT_T_5 0xc40cc -#define USDM_REG_AGG_INT_T_6 0xc40d0 -/* [RW 14] The start address in the internal RAM for the cfc_rsp lcid */ -#define USDM_REG_CFC_RSP_START_ADDR 0xc4008 -/* [RW 16] The maximum value of the competion counter #0 */ -#define USDM_REG_CMP_COUNTER_MAX0 0xc401c -/* [RW 16] The maximum value of the competion counter #1 */ -#define USDM_REG_CMP_COUNTER_MAX1 0xc4020 -/* [RW 16] The maximum value of the competion counter #2 */ -#define USDM_REG_CMP_COUNTER_MAX2 0xc4024 -/* [RW 16] The maximum value of the competion counter #3 */ -#define USDM_REG_CMP_COUNTER_MAX3 0xc4028 -/* [RW 16] The maximum value of the competion counter #4 */ -#define USDM_REG_CMP_COUNTER_MAX4 0xc42d8 -/* [RW 16] The maximum value of the competion counter #5 */ -#define USDM_REG_CMP_COUNTER_MAX5 0xc42dc -/* [RW 16] The maximum value of the competion counter #6 */ -#define USDM_REG_CMP_COUNTER_MAX6 0xc42e0 -/* [RW 16] The maximum value of the competion counter #7 */ -#define USDM_REG_CMP_COUNTER_MAX7 0xc42e4 -/* [RW 14] The start address in the internal RAM for the completion - counters. */ -#define USDM_REG_CMP_COUNTER_START_ADDR 0xc400c -#define USDM_REG_ENABLE_IN1 0xc4238 -#define USDM_REG_ENABLE_IN2 0xc423c -#define USDM_REG_ENABLE_OUT1 0xc4240 -#define USDM_REG_ENABLE_OUT2 0xc4244 -/* [RW 4] The initial number of messages that can be sent to the pxp control - interface without receiving any ACK. */ -#define USDM_REG_INIT_CREDIT_PXP_CTRL 0xc44c0 -/* [ST 32] The number of ACK after placement messages received */ -#define USDM_REG_NUM_OF_ACK_AFTER_PLACE 0xc4280 -/* [ST 32] The number of packet end messages received from the parser */ -#define USDM_REG_NUM_OF_PKT_END_MSG 0xc4278 -/* [ST 32] The number of requests received from the pxp async if */ -#define USDM_REG_NUM_OF_PXP_ASYNC_REQ 0xc427c -/* [ST 32] The number of commands received in queue 0 */ -#define USDM_REG_NUM_OF_Q0_CMD 0xc4248 -/* [ST 32] The number of commands received in queue 10 */ -#define USDM_REG_NUM_OF_Q10_CMD 0xc4270 -/* [ST 32] The number of commands received in queue 11 */ -#define USDM_REG_NUM_OF_Q11_CMD 0xc4274 -/* [ST 32] The number of commands received in queue 1 */ -#define USDM_REG_NUM_OF_Q1_CMD 0xc424c -/* [ST 32] The number of commands received in queue 2 */ -#define USDM_REG_NUM_OF_Q2_CMD 0xc4250 -/* [ST 32] The number of commands received in queue 3 */ -#define USDM_REG_NUM_OF_Q3_CMD 0xc4254 -/* [ST 32] The number of commands received in queue 4 */ -#define USDM_REG_NUM_OF_Q4_CMD 0xc4258 -/* [ST 32] The number of commands received in queue 5 */ -#define USDM_REG_NUM_OF_Q5_CMD 0xc425c -/* [ST 32] The number of commands received in queue 6 */ -#define USDM_REG_NUM_OF_Q6_CMD 0xc4260 -/* [ST 32] The number of commands received in queue 7 */ -#define USDM_REG_NUM_OF_Q7_CMD 0xc4264 -/* [ST 32] The number of commands received in queue 8 */ -#define USDM_REG_NUM_OF_Q8_CMD 0xc4268 -/* [ST 32] The number of commands received in queue 9 */ -#define USDM_REG_NUM_OF_Q9_CMD 0xc426c -/* [RW 14] The start address in the internal RAM for the packet end message */ -#define USDM_REG_PCK_END_MSG_START_ADDR 0xc4014 -/* [RW 14] The start address in the internal RAM for queue counters */ -#define USDM_REG_Q_COUNTER_START_ADDR 0xc4010 +#define UCM_REG_XX_FREE 0xe016c +#define UMAC_COMMAND_CONFIG_REG_HD_ENA (0x1<<10) +#define UMAC_COMMAND_CONFIG_REG_IGNORE_TX_PAUSE (0x1<<28) +#define UMAC_COMMAND_CONFIG_REG_LOOP_ENA (0x1<<15) +#define UMAC_COMMAND_CONFIG_REG_NO_LGTH_CHECK (0x1<<24) +#define UMAC_COMMAND_CONFIG_REG_PAD_EN (0x1<<5) +#define UMAC_COMMAND_CONFIG_REG_PAUSE_IGNORE (0x1<<8) +#define UMAC_COMMAND_CONFIG_REG_PROMIS_EN (0x1<<4) +#define UMAC_COMMAND_CONFIG_REG_RX_ENA (0x1<<1) +#define UMAC_COMMAND_CONFIG_REG_SW_RESET (0x1<<13) +#define UMAC_COMMAND_CONFIG_REG_TX_ENA (0x1<<0) +#define UMAC_REG_COMMAND_CONFIG 0x8 +/* [RW 32] Register Bit 0 refers to Bit 16 of the MAC address; Bit 1 refers + * to bit 17 of the MAC address etc. */ +#define UMAC_REG_MAC_ADDR0 0xc +/* [RW 16] Register Bit 0 refers to Bit 0 of the MAC address; Register Bit 1 + * refers to Bit 1 of the MAC address etc. Bits 16 to 31 are reserved. */ +#define UMAC_REG_MAC_ADDR1 0x10 +/* [RW 14] Defines a 14-Bit maximum frame length used by the MAC receive + * logic to check frames. */ +#define UMAC_REG_MAXFR 0x14 /* [R 1] pxp_ctrl rd_data fifo empty in sdm_dma_rsp block */ #define USDM_REG_RSP_PXP_CTRL_RDATA_EMPTY 0xc4550 /* [R 1] parser fifo empty in sdm_sync block */ #define USDM_REG_SYNC_PARSER_EMPTY 0xc4558 /* [R 1] parser serial fifo empty in sdm_sync block */ #define USDM_REG_SYNC_SYNC_EMPTY 0xc4560 -/* [RW 32] Tick for timer counter. Applicable only when - ~usdm_registers_timer_tick_enable.timer_tick_enable =1 */ -#define USDM_REG_TIMER_TICK 0xc4000 /* [RW 32] Interrupt mask register #0 read/write */ #define USDM_REG_USDM_INT_MASK_0 0xc42a0 #define USDM_REG_USDM_INT_MASK_1 0xc42b0 /* [R 32] Interrupt register #0 read */ -#define USDM_REG_USDM_INT_STS_0 0xc4294 -#define USDM_REG_USDM_INT_STS_1 0xc42a4 +#define USDM_REG_USDM_INT_STS_0 0xc4294 +#define USDM_REG_USDM_INT_STS_1 0xc42a4 /* [RW 11] Parity mask register #0 read/write */ -#define USDM_REG_USDM_PRTY_MASK 0xc42c0 +#define USDM_REG_USDM_PRTY_MASK 0xc42c0 /* [R 11] Parity register #0 read */ #define USDM_REG_USDM_PRTY_STS 0xc42b4 -/* [RW 5] The number of time_slots in the arbitration cycle */ -#define USEM_REG_ARB_CYCLE_SIZE 0x300034 -/* [RW 3] The source that is associated with arbitration element 0. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2 */ -#define USEM_REG_ARB_ELEMENT0 0x300020 -/* [RW 3] The source that is associated with arbitration element 1. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~usem_registers_arb_element0.arb_element0 */ -#define USEM_REG_ARB_ELEMENT1 0x300024 -/* [RW 3] The source that is associated with arbitration element 2. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~usem_registers_arb_element0.arb_element0 - and ~usem_registers_arb_element1.arb_element1 */ -#define USEM_REG_ARB_ELEMENT2 0x300028 -/* [RW 3] The source that is associated with arbitration element 3. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2.Could - not be equal to register ~usem_registers_arb_element0.arb_element0 and - ~usem_registers_arb_element1.arb_element1 and - ~usem_registers_arb_element2.arb_element2 */ -#define USEM_REG_ARB_ELEMENT3 0x30002c -/* [RW 3] The source that is associated with arbitration element 4. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~usem_registers_arb_element0.arb_element0 - and ~usem_registers_arb_element1.arb_element1 and - ~usem_registers_arb_element2.arb_element2 and - ~usem_registers_arb_element3.arb_element3 */ -#define USEM_REG_ARB_ELEMENT4 0x300030 -#define USEM_REG_ENABLE_IN 0x3000a4 -#define USEM_REG_ENABLE_OUT 0x3000a8 +/* [RC 11] Parity register #0 read clear */ +#define USDM_REG_USDM_PRTY_STS_CLR 0xc42b8 /* [RW 32] This address space contains all registers and memories that are - placed in SEM_FAST block. The SEM_FAST registers are described in - appendix B. In order to access the SEM_FAST registers the base address - USEM_REGISTERS_FAST_MEMORY (Offset: 0x320000) should be added to each - SEM_FAST register offset. */ + * placed in SEM_FAST block. The SEM_FAST registers are described in + * appendix B. In order to access the SEM_FAST registers the base address + * USEM_REGISTERS_FAST_MEMORY (Offset: 0x320000) should be added to each + * SEM_FAST register offset. */ #define USEM_REG_FAST_MEMORY 0x320000 -/* [RW 1] Disables input messages from FIC0 May be updated during run_time - by the microcode */ -#define USEM_REG_FIC0_DISABLE 0x300224 -/* [RW 1] Disables input messages from FIC1 May be updated during run_time - by the microcode */ -#define USEM_REG_FIC1_DISABLE 0x300234 /* [RW 15] Interrupt table Read and write access to it is not possible in - the middle of the work */ + * the middle of the work */ #define USEM_REG_INT_TABLE 0x300400 -/* [ST 24] Statistics register. The number of messages that entered through - FIC0 */ -#define USEM_REG_MSG_NUM_FIC0 0x300000 -/* [ST 24] Statistics register. The number of messages that entered through - FIC1 */ -#define USEM_REG_MSG_NUM_FIC1 0x300004 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC0 */ -#define USEM_REG_MSG_NUM_FOC0 0x300008 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC1 */ -#define USEM_REG_MSG_NUM_FOC1 0x30000c -/* [ST 24] Statistics register. The number of messages that were sent to - FOC2 */ -#define USEM_REG_MSG_NUM_FOC2 0x300010 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC3 */ -#define USEM_REG_MSG_NUM_FOC3 0x300014 -/* [RW 1] Disables input messages from the passive buffer May be updated - during run_time by the microcode */ -#define USEM_REG_PAS_DISABLE 0x30024c /* [WB 128] Debug only. Passive buffer memory */ -#define USEM_REG_PASSIVE_BUFFER 0x302000 +#define USEM_REG_PASSIVE_BUFFER 0x302000 /* [WB 46] pram memory. B45 is parity; b[44:0] - data. */ #define USEM_REG_PRAM 0x340000 -/* [R 16] Valid sleeping threads indication have bit per thread */ +/* [R 20] Valid sleeping threads indication have bit per thread */ #define USEM_REG_SLEEP_THREADS_VALID 0x30026c /* [R 1] EXT_STORE FIFO is empty in sem_slow_ls_ext */ #define USEM_REG_SLOW_EXT_STORE_EMPTY 0x3002a0 -/* [RW 16] List of free threads . There is a bit per thread. */ -#define USEM_REG_THREADS_LIST 0x3002e4 -/* [RW 3] The arbitration scheme of time_slot 0 */ -#define USEM_REG_TS_0_AS 0x300038 -/* [RW 3] The arbitration scheme of time_slot 10 */ -#define USEM_REG_TS_10_AS 0x300060 -/* [RW 3] The arbitration scheme of time_slot 11 */ -#define USEM_REG_TS_11_AS 0x300064 -/* [RW 3] The arbitration scheme of time_slot 12 */ -#define USEM_REG_TS_12_AS 0x300068 -/* [RW 3] The arbitration scheme of time_slot 13 */ -#define USEM_REG_TS_13_AS 0x30006c -/* [RW 3] The arbitration scheme of time_slot 14 */ -#define USEM_REG_TS_14_AS 0x300070 -/* [RW 3] The arbitration scheme of time_slot 15 */ -#define USEM_REG_TS_15_AS 0x300074 -/* [RW 3] The arbitration scheme of time_slot 16 */ -#define USEM_REG_TS_16_AS 0x300078 -/* [RW 3] The arbitration scheme of time_slot 17 */ -#define USEM_REG_TS_17_AS 0x30007c -/* [RW 3] The arbitration scheme of time_slot 18 */ -#define USEM_REG_TS_18_AS 0x300080 -/* [RW 3] The arbitration scheme of time_slot 1 */ -#define USEM_REG_TS_1_AS 0x30003c -/* [RW 3] The arbitration scheme of time_slot 2 */ -#define USEM_REG_TS_2_AS 0x300040 -/* [RW 3] The arbitration scheme of time_slot 3 */ -#define USEM_REG_TS_3_AS 0x300044 -/* [RW 3] The arbitration scheme of time_slot 4 */ -#define USEM_REG_TS_4_AS 0x300048 -/* [RW 3] The arbitration scheme of time_slot 5 */ -#define USEM_REG_TS_5_AS 0x30004c -/* [RW 3] The arbitration scheme of time_slot 6 */ -#define USEM_REG_TS_6_AS 0x300050 -/* [RW 3] The arbitration scheme of time_slot 7 */ -#define USEM_REG_TS_7_AS 0x300054 -/* [RW 3] The arbitration scheme of time_slot 8 */ -#define USEM_REG_TS_8_AS 0x300058 -/* [RW 3] The arbitration scheme of time_slot 9 */ -#define USEM_REG_TS_9_AS 0x30005c /* [RW 32] Interrupt mask register #0 read/write */ #define USEM_REG_USEM_INT_MASK_0 0x300110 #define USEM_REG_USEM_INT_MASK_1 0x300120 /* [R 32] Interrupt register #0 read */ -#define USEM_REG_USEM_INT_STS_0 0x300104 -#define USEM_REG_USEM_INT_STS_1 0x300114 +#define USEM_REG_USEM_INT_STS_0 0x300104 +#define USEM_REG_USEM_INT_STS_1 0x300114 /* [RW 32] Parity mask register #0 read/write */ #define USEM_REG_USEM_PRTY_MASK_0 0x300130 #define USEM_REG_USEM_PRTY_MASK_1 0x300140 /* [R 32] Parity register #0 read */ #define USEM_REG_USEM_PRTY_STS_0 0x300124 #define USEM_REG_USEM_PRTY_STS_1 0x300134 +/* [RC 32] Parity register #0 read clear */ +#define USEM_REG_USEM_PRTY_STS_CLR_0 0x300128 +#define USEM_REG_USEM_PRTY_STS_CLR_1 0x300138 /* [W 7] VF or PF ID for reset error bit. Values 0-63 reset error bit for 64 - VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ + * VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ #define USEM_REG_VFPF_ERR_NUM 0x300380 #define VFC_MEMORIES_RST_REG_CAM_RST (0x1<<0) #define VFC_MEMORIES_RST_REG_RAM_RST (0x1<<1) #define VFC_REG_MEMORIES_RST 0x1943c -/* [RW 32] Indirect access to AG context with 32-bits granularity. The bits - [12:8] of the address should be the offset within the accessed LCID - context; the bits [7:0] are the accessed LCID.Example: to write to REG10 - LCID100. The RBC address should be 13'ha64. */ -#define XCM_REG_AG_CTX 0x28000 -/* [RW 2] The queue index for registration on Aux1 counter flag. */ -#define XCM_REG_AUX1_Q 0x20134 -/* [RW 2] Per each decision rule the queue index to register to. */ -#define XCM_REG_AUX_CNT_FLG_Q_19 0x201b0 /* [R 5] Used to read the XX protection CAM occupancy counter. */ #define XCM_REG_CAM_OCCUP 0x20244 -/* [RW 1] CDU AG read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define XCM_REG_CDU_AG_RD_IFEN 0x20044 -/* [RW 1] CDU AG write Interface enable. If 0 - the request and valid input - are disregarded; all other signals are treated as usual; if 1 - normal - activity. */ -#define XCM_REG_CDU_AG_WR_IFEN 0x20040 -/* [RW 1] CDU STORM read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define XCM_REG_CDU_SM_RD_IFEN 0x2004c -/* [RW 1] CDU STORM write Interface enable. If 0 - the request and valid - input is disregarded; all other signals are treated as usual; if 1 - - normal activity. */ -#define XCM_REG_CDU_SM_WR_IFEN 0x20048 /* [RW 4] CFC output initial credit. Max credit available - 15.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 1 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 1 at start-up. */ #define XCM_REG_CFC_INIT_CRD 0x20404 -/* [RW 3] The weight of the CP input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_CP_WEIGHT 0x200dc -/* [RW 1] Input csem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_CSEM_IFEN 0x20028 /* [RC 1] Set at message length mismatch (relative to last indication) at - the csem interface. */ -#define XCM_REG_CSEM_LENGTH_MIS 0x20228 -/* [RW 3] The weight of the input csem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_CSEM_WEIGHT 0x200c4 -/* [RW 1] Input dorq Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_DORQ_IFEN 0x20030 + * the csem interface. */ +#define XCM_REG_CSEM_LENGTH_MIS 0x20228 /* [RC 1] Set at message length mismatch (relative to last indication) at - the dorq interface. */ -#define XCM_REG_DORQ_LENGTH_MIS 0x20230 -/* [RW 3] The weight of the input dorq in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_DORQ_WEIGHT 0x200cc -/* [RW 8] The Event ID in case the ErrorFlg input message bit is set. */ -#define XCM_REG_ERR_EVNT_ID 0x200b0 -/* [RW 28] The CM erroneous header for QM and Timers formatting. */ -#define XCM_REG_ERR_XCM_HDR 0x200ac -/* [RW 8] The Event ID for Timers expiration. */ -#define XCM_REG_EXPR_EVNT_ID 0x200b4 + * the dorq interface. */ +#define XCM_REG_DORQ_LENGTH_MIS 0x20230 /* [RW 8] FIC0 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define XCM_REG_FIC0_INIT_CRD 0x2040c /* [RW 8] FIC1 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define XCM_REG_FIC1_INIT_CRD 0x20410 #define XCM_REG_GLB_DEL_ACK_MAX_CNT_0 0x20118 -#define XCM_REG_GLB_DEL_ACK_MAX_CNT_1 0x2011c -#define XCM_REG_GLB_DEL_ACK_TMR_VAL_0 0x20108 -#define XCM_REG_GLB_DEL_ACK_TMR_VAL_1 0x2010c -/* [RW 1] Arbitratiojn between Input Arbiter groups: 0 - fair Round-Robin; 1 - - strict priority defined by ~xcm_registers_gr_ag_pr.gr_ag_pr; - ~xcm_registers_gr_ld0_pr.gr_ld0_pr and - ~xcm_registers_gr_ld1_pr.gr_ld1_pr. */ -#define XCM_REG_GR_ARB_TYPE 0x2020c -/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Channel group is the - compliment of the other 3 groups. */ -#define XCM_REG_GR_LD0_PR 0x20214 -/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Channel group is the - compliment of the other 3 groups. */ -#define XCM_REG_GR_LD1_PR 0x20218 -/* [RW 1] Input nig0 Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_NIG0_IFEN 0x20038 /* [RC 1] Set at message length mismatch (relative to last indication) at - the nig0 interface. */ -#define XCM_REG_NIG0_LENGTH_MIS 0x20238 -/* [RW 3] The weight of the input nig0 in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_NIG0_WEIGHT 0x200d4 -/* [RW 1] Input nig1 Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_NIG1_IFEN 0x2003c + * the nig0 interface. */ +#define XCM_REG_NIG0_LENGTH_MIS 0x20238 /* [RC 1] Set at message length mismatch (relative to last indication) at - the nig1 interface. */ -#define XCM_REG_NIG1_LENGTH_MIS 0x2023c -/* [RW 5] The number of double REG-pairs; loaded from the STORM context and - sent to STORM; for a specific connection type. The double REG-pairs are - used in order to align to STORM context row size of 128 bits. The offset - of these data in the STORM context is always 0. Index _i stands for the - connection type (one of 16). */ -#define XCM_REG_N_SM_CTX_LD_0 0x20060 -#define XCM_REG_N_SM_CTX_LD_1 0x20064 -#define XCM_REG_N_SM_CTX_LD_2 0x20068 -#define XCM_REG_N_SM_CTX_LD_3 0x2006c -#define XCM_REG_N_SM_CTX_LD_4 0x20070 -#define XCM_REG_N_SM_CTX_LD_5 0x20074 -/* [RW 1] Input pbf Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_PBF_IFEN 0x20034 + * the nig1 interface. */ +#define XCM_REG_NIG1_LENGTH_MIS 0x2023c /* [RC 1] Set at message length mismatch (relative to last indication) at - the pbf interface. */ + * the pbf interface. */ #define XCM_REG_PBF_LENGTH_MIS 0x20234 -/* [RW 3] The weight of the input pbf in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_PBF_WEIGHT 0x200d0 -#define XCM_REG_PHYS_QNUM3_0 0x20100 -#define XCM_REG_PHYS_QNUM3_1 0x20104 -/* [RW 8] The Event ID for Timers formatting in case of stop done. */ -#define XCM_REG_STOP_EVNT_ID 0x200b8 /* [RC 1] Set at message length mismatch (relative to last indication) at - the STORM interface. */ + * the STORM interface. */ #define XCM_REG_STORM_LENGTH_MIS 0x2021c -/* [RW 3] The weight of the STORM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_STORM_WEIGHT 0x200bc -/* [RW 1] STORM - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_STORM_XCM_IFEN 0x20010 /* [RW 4] Timers output initial credit. Max credit available - 15.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 4 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 4 at start-up. */ #define XCM_REG_TM_INIT_CRD 0x2041c -/* [RW 3] The weight of the Timers input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_TM_WEIGHT 0x200ec -/* [RW 28] The CM header for Timers expiration command. */ -#define XCM_REG_TM_XCM_HDR 0x200a8 -/* [RW 1] Timers - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_TM_XCM_IFEN 0x2001c -/* [RW 1] Input tsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_TSEM_IFEN 0x20024 /* [RC 1] Set at message length mismatch (relative to last indication) at - the tsem interface. */ -#define XCM_REG_TSEM_LENGTH_MIS 0x20224 -/* [RW 3] The weight of the input tsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_TSEM_WEIGHT 0x200c0 -/* [RW 2] The queue index for registration on UNA greater NXT decision rule. */ -#define XCM_REG_UNA_GT_NXT_Q 0x20120 -/* [RW 1] Input usem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_USEM_IFEN 0x2002c + * the tsem interface. */ +#define XCM_REG_TSEM_LENGTH_MIS 0x20224 /* [RC 1] Message length mismatch (relative to last indication) at the usem - interface. */ -#define XCM_REG_USEM_LENGTH_MIS 0x2022c -/* [RW 3] The weight of the input usem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_USEM_WEIGHT 0x200c8 -#define XCM_REG_WU_DA_CNT_CMD00 0x201d4 -#define XCM_REG_WU_DA_CNT_CMD01 0x201d8 -#define XCM_REG_WU_DA_CNT_CMD10 0x201dc -#define XCM_REG_WU_DA_CNT_CMD11 0x201e0 -#define XCM_REG_WU_DA_CNT_UPD_VAL00 0x201e4 -#define XCM_REG_WU_DA_CNT_UPD_VAL01 0x201e8 -#define XCM_REG_WU_DA_CNT_UPD_VAL10 0x201ec -#define XCM_REG_WU_DA_CNT_UPD_VAL11 0x201f0 + * interface. */ +#define XCM_REG_USEM_LENGTH_MIS 0x2022c +#define XCM_REG_WU_DA_CNT_CMD00 0x201d4 #define XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00 0x201c4 -#define XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01 0x201c8 -#define XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10 0x201cc -#define XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11 0x201d0 -/* [RW 1] CM - CFC Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XCM_CFC_IFEN 0x20050 /* [RW 14] Interrupt mask register #0 read/write */ #define XCM_REG_XCM_INT_MASK 0x202b4 /* [R 14] Interrupt register #0 read */ #define XCM_REG_XCM_INT_STS 0x202a8 +/* [RW 30] Parity mask register #0 read/write */ +#define XCM_REG_XCM_PRTY_MASK 0x202c4 /* [R 30] Parity register #0 read */ #define XCM_REG_XCM_PRTY_STS 0x202b8 -/* [RW 4] The size of AG context region 0 in REG-pairs. Designates the MS - REG-pair number (e.g. if region 0 is 6 REG-pairs; the value should be 5). - Is used to determine the number of the AG context REG-pairs written back; - when the Reg1WbFlg isn't set. */ -#define XCM_REG_XCM_REG0_SZ 0x200f4 -/* [RW 1] CM - STORM 0 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XCM_STORM0_IFEN 0x20004 -/* [RW 1] CM - STORM 1 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XCM_STORM1_IFEN 0x20008 -/* [RW 1] CM - Timers Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_XCM_TM_IFEN 0x20020 -/* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XCM_XQM_IFEN 0x2000c -/* [RW 1] If set the Q index; received from the QM is inserted to event ID. */ -#define XCM_REG_XCM_XQM_USE_Q 0x200f0 -/* [RW 4] The value by which CFC updates the activity counter at QM bypass. */ -#define XCM_REG_XQM_BYP_ACT_UPD 0x200fc +/* [RC 30] Parity register #0 read clear */ +#define XCM_REG_XCM_PRTY_STS_CLR 0x202bc /* [RW 6] QM output initial credit. Max credit available - 32.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 32 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 32 at start-up. */ #define XCM_REG_XQM_INIT_CRD 0x20420 -/* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_XQM_P_WEIGHT 0x200e4 -/* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_XQM_S_WEIGHT 0x200e8 -/* [RW 28] The CM header value for QM request (primary). */ -#define XCM_REG_XQM_XCM_HDR_P 0x200a0 -/* [RW 28] The CM header value for QM request (secondary). */ -#define XCM_REG_XQM_XCM_HDR_S 0x200a4 -/* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XQM_XCM_IFEN 0x20014 -/* [RW 1] Input SDM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XSDM_IFEN 0x20018 /* [RC 1] Set at message length mismatch (relative to last indication) at - the SDM interface. */ -#define XCM_REG_XSDM_LENGTH_MIS 0x20220 -/* [RW 3] The weight of the SDM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_XSDM_WEIGHT 0x200e0 + * the SDM interface. */ +#define XCM_REG_XSDM_LENGTH_MIS 0x20220 /* [RW 17] Indirect access to the descriptor table of the XX protection - mechanism. The fields are: [5:0] - message length; 11:6] - message - pointer; 16:12] - next pointer. */ + * mechanism. The fields are: [5:0] - message length; 11:6] - message + * pointer; 16:12] - next pointer. */ #define XCM_REG_XX_DESCR_TABLE 0x20480 #define XCM_REG_XX_DESCR_TABLE_SIZE 32 /* [R 6] Used to read the XX protection Free counter. */ -#define XCM_REG_XX_FREE 0x20240 -/* [RW 6] Initial value for the credit counter; responsible for fulfilling - of the Input Stage XX protection buffer by the XX protection pending - messages. Max credit available - 3.Write writes the initial credit value; - read returns the current value of the credit counter. Must be initialized - to 2 at start-up. */ -#define XCM_REG_XX_INIT_CRD 0x20424 -/* [RW 6] The maximum number of pending messages; which may be stored in XX - protection. ~xcm_registers_xx_free.xx_free is also written on write. */ -#define XCM_REG_XX_MSG_NUM 0x20428 -/* [RW 8] The Event ID; sent to the STORM in case of XX overflow. */ -#define XCM_REG_XX_OVFL_EVNT_ID 0x20058 -/* [RW 16] Indirect access to the XX table of the XX protection mechanism. - The fields are:[4:0] - tail pointer; 10:5] - Link List size; 15:11] - - header pointer. */ -#define XCM_REG_XX_TABLE 0x20500 -/* [RW 8] The event id for aggregated interrupt 0 */ -#define XSDM_REG_AGG_INT_EVENT_0 0x166038 -#define XSDM_REG_AGG_INT_EVENT_1 0x16603c -#define XSDM_REG_AGG_INT_EVENT_10 0x166060 -#define XSDM_REG_AGG_INT_EVENT_11 0x166064 -#define XSDM_REG_AGG_INT_EVENT_12 0x166068 -#define XSDM_REG_AGG_INT_EVENT_13 0x16606c -#define XSDM_REG_AGG_INT_EVENT_14 0x166070 -#define XSDM_REG_AGG_INT_EVENT_15 0x166074 -#define XSDM_REG_AGG_INT_EVENT_16 0x166078 -#define XSDM_REG_AGG_INT_EVENT_17 0x16607c -#define XSDM_REG_AGG_INT_EVENT_18 0x166080 -#define XSDM_REG_AGG_INT_EVENT_2 0x166040 -#define XSDM_REG_AGG_INT_EVENT_4 0x166048 -#define XSDM_REG_AGG_INT_EVENT_5 0x16604c -#define XSDM_REG_AGG_INT_EVENT_6 0x166050 -#define XSDM_REG_AGG_INT_EVENT_7 0x166054 -#define XSDM_REG_AGG_INT_EVENT_8 0x166058 -#define XSDM_REG_AGG_INT_EVENT_9 0x16605c -/* [RW 1] For each aggregated interrupt index whether the mode is normal (0) - or auto-mask-mode (1) */ -#define XSDM_REG_AGG_INT_MODE_0 0x1661b8 -#define XSDM_REG_AGG_INT_MODE_1 0x1661bc -#define XSDM_REG_AGG_INT_MODE_10 0x1661e0 -#define XSDM_REG_AGG_INT_MODE_11 0x1661e4 -#define XSDM_REG_AGG_INT_MODE_14 0x1661f0 -#define XSDM_REG_AGG_INT_MODE_15 0x1661f4 -#define XSDM_REG_AGG_INT_MODE_2 0x1661c0 -#define XSDM_REG_AGG_INT_MODE_9 0x1661dc -/* [RW 1] The T bit for aggregated interrupt 0 */ -#define XSDM_REG_AGG_INT_T_0 0x1660b8 -#define XSDM_REG_AGG_INT_T_1 0x1660bc -#define XSDM_REG_AGG_INT_T_10 0x1660e0 -#define XSDM_REG_AGG_INT_T_14 0x1660f0 -#define XSDM_REG_AGG_INT_T_15 0x1660f4 -#define XSDM_REG_AGG_INT_T_2 0x1660c0 -#define XSDM_REG_AGG_INT_T_9 0x1660dc -/* [RW 14] The start address in the internal RAM for the cfc_rsp lcid */ -#define XSDM_REG_CFC_RSP_START_ADDR 0x166008 -/* [RW 16] The maximum value of the competion counter #0 */ -#define XSDM_REG_CMP_COUNTER_MAX0 0x16601c -/* [RW 16] The maximum value of the competion counter #1 */ -#define XSDM_REG_CMP_COUNTER_MAX1 0x166020 -/* [RW 16] The maximum value of the competion counter #2 */ -#define XSDM_REG_CMP_COUNTER_MAX2 0x166024 -/* [RW 16] The maximum value of the competion counter #3 */ -#define XSDM_REG_CMP_COUNTER_MAX3 0x166028 -/* [RW 16] The maximum value of the competion counter #4 */ -#define XSDM_REG_CMP_COUNTER_MAX4 0x1662d8 -/* [RW 16] The maximum value of the competion counter #5 */ -#define XSDM_REG_CMP_COUNTER_MAX5 0x1662dc -/* [RW 16] The maximum value of the competion counter #6 */ -#define XSDM_REG_CMP_COUNTER_MAX6 0x1662e0 -/* [RW 16] The maximum value of the competion counter #7 */ -#define XSDM_REG_CMP_COUNTER_MAX7 0x1662e4 -/* [RW 14] The start address in the internal RAM for the completion - counters. */ -#define XSDM_REG_CMP_COUNTER_START_ADDR 0x16600c -#define XSDM_REG_ENABLE_IN1 0x166238 -#define XSDM_REG_ENABLE_IN2 0x16623c -#define XSDM_REG_ENABLE_OUT1 0x166240 -#define XSDM_REG_ENABLE_OUT2 0x166244 -/* [RW 4] The initial number of messages that can be sent to the pxp control - interface without receiving any ACK. */ -#define XSDM_REG_INIT_CREDIT_PXP_CTRL 0x1664bc -/* [ST 32] The number of ACK after placement messages received */ -#define XSDM_REG_NUM_OF_ACK_AFTER_PLACE 0x16627c -/* [ST 32] The number of DORQ DPM messages received */ -#define XSDM_REG_NUM_OF_DPM_REQ 0x1662d4 -/* [ST 32] The number of packet end messages received from the parser */ -#define XSDM_REG_NUM_OF_PKT_END_MSG 0x166274 -/* [ST 32] The number of requests received from the pxp async if */ -#define XSDM_REG_NUM_OF_PXP_ASYNC_REQ 0x166278 -/* [ST 32] The number of commands received in queue 0 */ -#define XSDM_REG_NUM_OF_Q0_CMD 0x166248 -/* [ST 32] The number of commands received in queue 10 */ -#define XSDM_REG_NUM_OF_Q10_CMD 0x16626c -/* [ST 32] The number of commands received in queue 11 */ -#define XSDM_REG_NUM_OF_Q11_CMD 0x166270 -/* [ST 32] The number of commands received in queue 1 */ -#define XSDM_REG_NUM_OF_Q1_CMD 0x16624c -/* [ST 32] The number of commands received in queue 3 */ -#define XSDM_REG_NUM_OF_Q3_CMD 0x166250 -/* [ST 32] The number of commands received in queue 4 */ -#define XSDM_REG_NUM_OF_Q4_CMD 0x166254 -/* [ST 32] The number of commands received in queue 5 */ -#define XSDM_REG_NUM_OF_Q5_CMD 0x166258 -/* [ST 32] The number of commands received in queue 6 */ -#define XSDM_REG_NUM_OF_Q6_CMD 0x16625c -/* [ST 32] The number of commands received in queue 7 */ -#define XSDM_REG_NUM_OF_Q7_CMD 0x166260 -/* [ST 32] The number of commands received in queue 8 */ -#define XSDM_REG_NUM_OF_Q8_CMD 0x166264 -/* [ST 32] The number of commands received in queue 9 */ -#define XSDM_REG_NUM_OF_Q9_CMD 0x166268 +#define XCM_REG_XX_FREE 0x20240 +#define XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_LOCAL_FAULT_STATUS (0x1<<0) +#define XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_REMOTE_FAULT_STATUS (0x1<<1) +#define XMAC_CTRL_REG_LINE_LOCAL_LPBK (0x1<<2) +#define XMAC_CTRL_REG_RX_EN (0x1<<1) +#define XMAC_CTRL_REG_SOFT_RESET (0x1<<6) +#define XMAC_CTRL_REG_TX_EN (0x1<<0) +#define XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN (0x1<<18) +#define XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN (0x1<<17) +#define XMAC_PFC_CTRL_HI_REG_FORCE_PFC_XON (0x1<<1) +#define XMAC_PFC_CTRL_HI_REG_PFC_REFRESH_EN (0x1<<0) +#define XMAC_PFC_CTRL_HI_REG_PFC_STATS_EN (0x1<<3) +#define XMAC_PFC_CTRL_HI_REG_RX_PFC_EN (0x1<<4) +#define XMAC_PFC_CTRL_HI_REG_TX_PFC_EN (0x1<<5) +#define XMAC_REG_CLEAR_RX_LSS_STATUS 0x60 +#define XMAC_REG_CTRL 0 +/* [RW 16] Upper 48 bits of ctrl_sa register. Used as the SA in PAUSE/PFC + * packets transmitted by the MAC */ +#define XMAC_REG_CTRL_SA_HI 0x2c +/* [RW 32] Lower 48 bits of ctrl_sa register. Used as the SA in PAUSE/PFC + * packets transmitted by the MAC */ +#define XMAC_REG_CTRL_SA_LO 0x28 +#define XMAC_REG_PAUSE_CTRL 0x68 +#define XMAC_REG_PFC_CTRL 0x70 +#define XMAC_REG_PFC_CTRL_HI 0x74 +#define XMAC_REG_RX_LSS_STATUS 0x58 +/* [RW 14] Maximum packet size in receive direction; exclusive of preamble & + * CRC in strip mode */ +#define XMAC_REG_RX_MAX_SIZE 0x40 +#define XMAC_REG_TX_CTRL 0x20 /* [W 17] Generate an operation after completion; bit-16 is - AggVectIdx_valid; bits 15:8 are AggVectIdx; bits 7:5 are the TRIG and - bits 4:0 are the T124Param[4:0] */ + * AggVectIdx_valid; bits 15:8 are AggVectIdx; bits 7:5 are the TRIG and + * bits 4:0 are the T124Param[4:0] */ #define XSDM_REG_OPERATION_GEN 0x1664c4 -/* [RW 14] The start address in the internal RAM for queue counters */ -#define XSDM_REG_Q_COUNTER_START_ADDR 0x166010 /* [R 1] pxp_ctrl rd_data fifo empty in sdm_dma_rsp block */ #define XSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY 0x166548 /* [R 1] parser fifo empty in sdm_sync block */ #define XSDM_REG_SYNC_PARSER_EMPTY 0x166550 /* [R 1] parser serial fifo empty in sdm_sync block */ #define XSDM_REG_SYNC_SYNC_EMPTY 0x166558 -/* [RW 32] Tick for timer counter. Applicable only when - ~xsdm_registers_timer_tick_enable.timer_tick_enable =1 */ -#define XSDM_REG_TIMER_TICK 0x166000 /* [RW 32] Interrupt mask register #0 read/write */ #define XSDM_REG_XSDM_INT_MASK_0 0x16629c #define XSDM_REG_XSDM_INT_MASK_1 0x1662ac /* [R 32] Interrupt register #0 read */ -#define XSDM_REG_XSDM_INT_STS_0 0x166290 -#define XSDM_REG_XSDM_INT_STS_1 0x1662a0 +#define XSDM_REG_XSDM_INT_STS_0 0x166290 +#define XSDM_REG_XSDM_INT_STS_1 0x1662a0 /* [RW 11] Parity mask register #0 read/write */ -#define XSDM_REG_XSDM_PRTY_MASK 0x1662bc +#define XSDM_REG_XSDM_PRTY_MASK 0x1662bc /* [R 11] Parity register #0 read */ #define XSDM_REG_XSDM_PRTY_STS 0x1662b0 -/* [RW 5] The number of time_slots in the arbitration cycle */ -#define XSEM_REG_ARB_CYCLE_SIZE 0x280034 -/* [RW 3] The source that is associated with arbitration element 0. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2 */ -#define XSEM_REG_ARB_ELEMENT0 0x280020 -/* [RW 3] The source that is associated with arbitration element 1. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~xsem_registers_arb_element0.arb_element0 */ -#define XSEM_REG_ARB_ELEMENT1 0x280024 -/* [RW 3] The source that is associated with arbitration element 2. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~xsem_registers_arb_element0.arb_element0 - and ~xsem_registers_arb_element1.arb_element1 */ -#define XSEM_REG_ARB_ELEMENT2 0x280028 -/* [RW 3] The source that is associated with arbitration element 3. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2.Could - not be equal to register ~xsem_registers_arb_element0.arb_element0 and - ~xsem_registers_arb_element1.arb_element1 and - ~xsem_registers_arb_element2.arb_element2 */ -#define XSEM_REG_ARB_ELEMENT3 0x28002c -/* [RW 3] The source that is associated with arbitration element 4. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~xsem_registers_arb_element0.arb_element0 - and ~xsem_registers_arb_element1.arb_element1 and - ~xsem_registers_arb_element2.arb_element2 and - ~xsem_registers_arb_element3.arb_element3 */ -#define XSEM_REG_ARB_ELEMENT4 0x280030 -#define XSEM_REG_ENABLE_IN 0x2800a4 -#define XSEM_REG_ENABLE_OUT 0x2800a8 +/* [RC 11] Parity register #0 read clear */ +#define XSDM_REG_XSDM_PRTY_STS_CLR 0x1662b4 /* [RW 32] This address space contains all registers and memories that are - placed in SEM_FAST block. The SEM_FAST registers are described in - appendix B. In order to access the SEM_FAST registers the base address - XSEM_REGISTERS_FAST_MEMORY (Offset: 0x2a0000) should be added to each - SEM_FAST register offset. */ + * placed in SEM_FAST block. The SEM_FAST registers are described in + * appendix B. In order to access the SEM_FAST registers the base address + * XSEM_REGISTERS_FAST_MEMORY (Offset: 0x2a0000) should be added to each + * SEM_FAST register offset. */ #define XSEM_REG_FAST_MEMORY 0x2a0000 -/* [RW 1] Disables input messages from FIC0 May be updated during run_time - by the microcode */ -#define XSEM_REG_FIC0_DISABLE 0x280224 -/* [RW 1] Disables input messages from FIC1 May be updated during run_time - by the microcode */ -#define XSEM_REG_FIC1_DISABLE 0x280234 /* [RW 15] Interrupt table Read and write access to it is not possible in - the middle of the work */ + * the middle of the work */ #define XSEM_REG_INT_TABLE 0x280400 -/* [ST 24] Statistics register. The number of messages that entered through - FIC0 */ -#define XSEM_REG_MSG_NUM_FIC0 0x280000 -/* [ST 24] Statistics register. The number of messages that entered through - FIC1 */ -#define XSEM_REG_MSG_NUM_FIC1 0x280004 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC0 */ -#define XSEM_REG_MSG_NUM_FOC0 0x280008 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC1 */ -#define XSEM_REG_MSG_NUM_FOC1 0x28000c -/* [ST 24] Statistics register. The number of messages that were sent to - FOC2 */ -#define XSEM_REG_MSG_NUM_FOC2 0x280010 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC3 */ -#define XSEM_REG_MSG_NUM_FOC3 0x280014 -/* [RW 1] Disables input messages from the passive buffer May be updated - during run_time by the microcode */ -#define XSEM_REG_PAS_DISABLE 0x28024c /* [WB 128] Debug only. Passive buffer memory */ -#define XSEM_REG_PASSIVE_BUFFER 0x282000 +#define XSEM_REG_PASSIVE_BUFFER 0x282000 /* [WB 46] pram memory. B45 is parity; b[44:0] - data. */ #define XSEM_REG_PRAM 0x2c0000 -/* [R 16] Valid sleeping threads indication have bit per thread */ +/* [R 20] Valid sleeping threads indication have bit per thread */ #define XSEM_REG_SLEEP_THREADS_VALID 0x28026c /* [R 1] EXT_STORE FIFO is empty in sem_slow_ls_ext */ #define XSEM_REG_SLOW_EXT_STORE_EMPTY 0x2802a0 -/* [RW 16] List of free threads . There is a bit per thread. */ -#define XSEM_REG_THREADS_LIST 0x2802e4 -/* [RW 3] The arbitration scheme of time_slot 0 */ -#define XSEM_REG_TS_0_AS 0x280038 -/* [RW 3] The arbitration scheme of time_slot 10 */ -#define XSEM_REG_TS_10_AS 0x280060 -/* [RW 3] The arbitration scheme of time_slot 11 */ -#define XSEM_REG_TS_11_AS 0x280064 -/* [RW 3] The arbitration scheme of time_slot 12 */ -#define XSEM_REG_TS_12_AS 0x280068 -/* [RW 3] The arbitration scheme of time_slot 13 */ -#define XSEM_REG_TS_13_AS 0x28006c -/* [RW 3] The arbitration scheme of time_slot 14 */ -#define XSEM_REG_TS_14_AS 0x280070 -/* [RW 3] The arbitration scheme of time_slot 15 */ -#define XSEM_REG_TS_15_AS 0x280074 -/* [RW 3] The arbitration scheme of time_slot 16 */ -#define XSEM_REG_TS_16_AS 0x280078 -/* [RW 3] The arbitration scheme of time_slot 17 */ -#define XSEM_REG_TS_17_AS 0x28007c -/* [RW 3] The arbitration scheme of time_slot 18 */ -#define XSEM_REG_TS_18_AS 0x280080 -/* [RW 3] The arbitration scheme of time_slot 1 */ -#define XSEM_REG_TS_1_AS 0x28003c -/* [RW 3] The arbitration scheme of time_slot 2 */ -#define XSEM_REG_TS_2_AS 0x280040 -/* [RW 3] The arbitration scheme of time_slot 3 */ -#define XSEM_REG_TS_3_AS 0x280044 -/* [RW 3] The arbitration scheme of time_slot 4 */ -#define XSEM_REG_TS_4_AS 0x280048 -/* [RW 3] The arbitration scheme of time_slot 5 */ -#define XSEM_REG_TS_5_AS 0x28004c -/* [RW 3] The arbitration scheme of time_slot 6 */ -#define XSEM_REG_TS_6_AS 0x280050 -/* [RW 3] The arbitration scheme of time_slot 7 */ -#define XSEM_REG_TS_7_AS 0x280054 -/* [RW 3] The arbitration scheme of time_slot 8 */ -#define XSEM_REG_TS_8_AS 0x280058 -/* [RW 3] The arbitration scheme of time_slot 9 */ -#define XSEM_REG_TS_9_AS 0x28005c /* [W 7] VF or PF ID for reset error bit. Values 0-63 reset error bit for 64 - VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ + * VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ #define XSEM_REG_VFPF_ERR_NUM 0x280380 /* [RW 32] Interrupt mask register #0 read/write */ #define XSEM_REG_XSEM_INT_MASK_0 0x280110 #define XSEM_REG_XSEM_INT_MASK_1 0x280120 /* [R 32] Interrupt register #0 read */ -#define XSEM_REG_XSEM_INT_STS_0 0x280104 -#define XSEM_REG_XSEM_INT_STS_1 0x280114 +#define XSEM_REG_XSEM_INT_STS_0 0x280104 +#define XSEM_REG_XSEM_INT_STS_1 0x280114 /* [RW 32] Parity mask register #0 read/write */ #define XSEM_REG_XSEM_PRTY_MASK_0 0x280130 #define XSEM_REG_XSEM_PRTY_MASK_1 0x280140 /* [R 32] Parity register #0 read */ #define XSEM_REG_XSEM_PRTY_STS_0 0x280124 #define XSEM_REG_XSEM_PRTY_STS_1 0x280134 +/* [RC 32] Parity register #0 read clear */ +#define XSEM_REG_XSEM_PRTY_STS_CLR_0 0x280128 +#define XSEM_REG_XSEM_PRTY_STS_CLR_1 0x280138 +#define MCPR_ACCESS_LOCK_LOCK (1L<<31) +#define MCPR_IMC_COMMAND_ENABLE (1L<<31) +#define MCPR_IMC_COMMAND_IMC_STATUS_BITSHIFT 16 +#define MCPR_IMC_COMMAND_OPERATION_BITSHIFT 28 +#define MCPR_IMC_COMMAND_TRANSFER_ADDRESS_BITSHIFT 8 #define MCPR_NVM_ACCESS_ENABLE_EN (1L<<0) #define MCPR_NVM_ACCESS_ENABLE_WR_EN (1L<<1) #define MCPR_NVM_ADDR_NVM_ADDR_VALUE (0xffffffL<<0) @@ -5335,6 +3449,7 @@ #define BIGMAC_REGISTER_CNT_MAX_SIZE (0x05<<3) #define BIGMAC_REGISTER_RX_CONTROL (0x21<<3) #define BIGMAC_REGISTER_RX_LLFC_MSG_FLDS (0x46<<3) +#define BIGMAC_REGISTER_RX_LSS_STATUS (0x43<<3) #define BIGMAC_REGISTER_RX_MAX_SIZE (0x23<<3) #define BIGMAC_REGISTER_RX_STAT_GR64 (0x26<<3) #define BIGMAC_REGISTER_RX_STAT_GRIPJ (0x42<<3) @@ -5350,42 +3465,43 @@ #define BIGMAC2_REGISTER_PFC_CONTROL (0x06<<3) #define BIGMAC2_REGISTER_RX_CONTROL (0x3A<<3) #define BIGMAC2_REGISTER_RX_LLFC_MSG_FLDS (0x62<<3) +#define BIGMAC2_REGISTER_RX_LSS_STAT (0x3E<<3) #define BIGMAC2_REGISTER_RX_MAX_SIZE (0x3C<<3) #define BIGMAC2_REGISTER_RX_STAT_GR64 (0x40<<3) #define BIGMAC2_REGISTER_RX_STAT_GRIPJ (0x5f<<3) -#define BIGMAC2_REGISTER_RX_STAT_GRPP (0x51<<3) #define BIGMAC2_REGISTER_TX_CONTROL (0x1C<<3) #define BIGMAC2_REGISTER_TX_MAX_SIZE (0x1E<<3) #define BIGMAC2_REGISTER_TX_PAUSE_CONTROL (0x20<<3) -#define BIGMAC2_REGISTER_TX_SOURCE_ADDR (0x1D<<3) +#define BIGMAC2_REGISTER_TX_SOURCE_ADDR (0x1D<<3) #define BIGMAC2_REGISTER_TX_STAT_GTBYT (0x39<<3) #define BIGMAC2_REGISTER_TX_STAT_GTPOK (0x22<<3) -#define BIGMAC2_REGISTER_TX_STAT_GTPP (0x24<<3) #define EMAC_LED_1000MB_OVERRIDE (1L<<1) -#define EMAC_LED_100MB_OVERRIDE (1L<<2) +#define EMAC_LED_100MB_OVERRIDE (1L<<2) #define EMAC_LED_10MB_OVERRIDE (1L<<3) -#define EMAC_LED_2500MB_OVERRIDE (1L<<12) #define EMAC_LED_OVERRIDE (1L<<0) -#define EMAC_LED_TRAFFIC (1L<<6) #define EMAC_MDIO_COMM_COMMAND_ADDRESS (0L<<26) +#define EMAC_MDIO_COMM_COMMAND_READ_22 (2L<<26) #define EMAC_MDIO_COMM_COMMAND_READ_45 (3L<<26) -#define EMAC_MDIO_COMM_COMMAND_WRITE_45 (1L<<26) +#define EMAC_MDIO_COMM_COMMAND_WRITE_22 (1L<<26) +#define EMAC_MDIO_COMM_COMMAND_WRITE_45 (1L<<26) #define EMAC_MDIO_COMM_DATA (0xffffL<<0) #define EMAC_MDIO_COMM_START_BUSY (1L<<29) #define EMAC_MDIO_MODE_AUTO_POLL (1L<<4) #define EMAC_MDIO_MODE_CLAUSE_45 (1L<<31) -#define EMAC_MDIO_MODE_CLOCK_CNT (0x3fL<<16) +#define EMAC_MDIO_MODE_CLOCK_CNT (0x3ffL<<16) #define EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT 16 +#define EMAC_MDIO_STATUS_10MB (1L<<1) #define EMAC_MODE_25G_MODE (1L<<5) #define EMAC_MODE_HALF_DUPLEX (1L<<1) #define EMAC_MODE_PORT_GMII (2L<<2) #define EMAC_MODE_PORT_MII (1L<<2) #define EMAC_MODE_PORT_MII_10M (3L<<2) -#define EMAC_MODE_RESET (1L<<0) +#define EMAC_MODE_RESET (1L<<0) #define EMAC_REG_EMAC_LED 0xc -#define EMAC_REG_EMAC_MAC_MATCH 0x10 -#define EMAC_REG_EMAC_MDIO_COMM 0xac -#define EMAC_REG_EMAC_MDIO_MODE 0xb4 +#define EMAC_REG_EMAC_MAC_MATCH 0x10 +#define EMAC_REG_EMAC_MDIO_COMM 0xac +#define EMAC_REG_EMAC_MDIO_MODE 0xb4 +#define EMAC_REG_EMAC_MDIO_STATUS 0xb0 #define EMAC_REG_EMAC_MODE 0x0 #define EMAC_REG_EMAC_RX_MODE 0xc8 #define EMAC_REG_EMAC_RX_MTU_SIZE 0x9c @@ -5396,15 +3512,15 @@ #define EMAC_REG_EMAC_TX_STAT_AC 0x280 #define EMAC_REG_EMAC_TX_STAT_AC_COUNT 22 #define EMAC_REG_RX_PFC_MODE 0x320 -#define EMAC_REG_RX_PFC_MODE_PRIORITIES (1L<<2) +#define EMAC_REG_RX_PFC_MODE_PRIORITIES (1L<<2) #define EMAC_REG_RX_PFC_MODE_RX_EN (1L<<1) #define EMAC_REG_RX_PFC_MODE_TX_EN (1L<<0) #define EMAC_REG_RX_PFC_PARAM 0x324 #define EMAC_REG_RX_PFC_PARAM_OPCODE_BITSHIFT 0 #define EMAC_REG_RX_PFC_PARAM_PRIORITY_EN_BITSHIFT 16 -#define EMAC_REG_RX_PFC_STATS_XOFF_RCVD 0x328 +#define EMAC_REG_RX_PFC_STATS_XOFF_RCVD 0x328 #define EMAC_REG_RX_PFC_STATS_XOFF_RCVD_COUNT (0xffff<<0) -#define EMAC_REG_RX_PFC_STATS_XOFF_SENT 0x330 +#define EMAC_REG_RX_PFC_STATS_XOFF_SENT 0x330 #define EMAC_REG_RX_PFC_STATS_XOFF_SENT_COUNT (0xffff<<0) #define EMAC_REG_RX_PFC_STATS_XON_RCVD 0x32c #define EMAC_REG_RX_PFC_STATS_XON_RCVD_COUNT (0xffff<<0) @@ -5428,122 +3544,147 @@ #define MISC_REGISTERS_GPIO_FLOAT_POS 24 #define MISC_REGISTERS_GPIO_HIGH 1 #define MISC_REGISTERS_GPIO_INPUT_HI_Z 2 -#define MISC_REGISTERS_GPIO_INT_CLR_POS 24 +#define MISC_REGISTERS_GPIO_INT_CLR_POS 24 #define MISC_REGISTERS_GPIO_INT_OUTPUT_CLR 0 #define MISC_REGISTERS_GPIO_INT_OUTPUT_SET 1 -#define MISC_REGISTERS_GPIO_INT_SET_POS 16 -#define MISC_REGISTERS_GPIO_LOW 0 -#define MISC_REGISTERS_GPIO_OUTPUT_HIGH 1 +#define MISC_REGISTERS_GPIO_INT_SET_POS 16 +#define MISC_REGISTERS_GPIO_LOW 0 +#define MISC_REGISTERS_GPIO_OUTPUT_HIGH 1 #define MISC_REGISTERS_GPIO_OUTPUT_LOW 0 #define MISC_REGISTERS_GPIO_PORT_SHIFT 4 #define MISC_REGISTERS_GPIO_SET_POS 8 #define MISC_REGISTERS_RESET_REG_1_CLEAR 0x588 +#define MISC_REGISTERS_RESET_REG_1_RST_BRB1 (0x1<<0) +#define MISC_REGISTERS_RESET_REG_1_RST_DORQ (0x1<<19) #define MISC_REGISTERS_RESET_REG_1_RST_HC (0x1<<29) -#define MISC_REGISTERS_RESET_REG_1_RST_NIG (0x1<<7) #define MISC_REGISTERS_RESET_REG_1_RST_PXP (0x1<<26) #define MISC_REGISTERS_RESET_REG_1_RST_PXPV (0x1<<27) +#define MISC_REGISTERS_RESET_REG_1_RST_QM (0x1<<17) #define MISC_REGISTERS_RESET_REG_1_SET 0x584 #define MISC_REGISTERS_RESET_REG_2_CLEAR 0x598 +#define MISC_REGISTERS_RESET_REG_2_MSTAT0 (0x1<<24) +#define MISC_REGISTERS_RESET_REG_2_MSTAT1 (0x1<<25) +#define MISC_REGISTERS_RESET_REG_2_PGLC (0x1<<19) +#define MISC_REGISTERS_RESET_REG_2_RST_ATC (0x1<<17) #define MISC_REGISTERS_RESET_REG_2_RST_BMAC0 (0x1<<0) +#define MISC_REGISTERS_RESET_REG_2_RST_BMAC1 (0x1<<1) +#define MISC_REGISTERS_RESET_REG_2_RST_EMAC0 (0x1<<2) #define MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE (0x1<<14) +#define MISC_REGISTERS_RESET_REG_2_RST_EMAC1 (0x1<<3) #define MISC_REGISTERS_RESET_REG_2_RST_EMAC1_HARD_CORE (0x1<<15) #define MISC_REGISTERS_RESET_REG_2_RST_GRC (0x1<<4) #define MISC_REGISTERS_RESET_REG_2_RST_MCP_N_HARD_CORE_RST_B (0x1<<6) +#define MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CORE (0x1<<8) +#define MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CPU (0x1<<7) #define MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_REG_HARD_CORE (0x1<<5) -#define MISC_REGISTERS_RESET_REG_2_RST_MDIO (0x1<<13) #define MISC_REGISTERS_RESET_REG_2_RST_MISC_CORE (0x1<<11) +#define MISC_REGISTERS_RESET_REG_2_RST_PCI_MDIO (0x1<<13) +#define MISC_REGISTERS_RESET_REG_2_RST_PXP_RQ_RD_WR (0x1<<16) #define MISC_REGISTERS_RESET_REG_2_RST_RBCN (0x1<<9) #define MISC_REGISTERS_RESET_REG_2_SET 0x594 +#define MISC_REGISTERS_RESET_REG_2_UMAC0 (0x1<<20) +#define MISC_REGISTERS_RESET_REG_2_UMAC1 (0x1<<21) +#define MISC_REGISTERS_RESET_REG_2_XMAC (0x1<<22) +#define MISC_REGISTERS_RESET_REG_2_XMAC_SOFT (0x1<<23) #define MISC_REGISTERS_RESET_REG_3_CLEAR 0x5a8 #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_IDDQ (0x1<<1) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_PWRDWN (0x1<<2) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_PWRDWN_SD (0x1<<3) -#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_RSTB_HW (0x1<<0) +#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_RSTB_HW (0x1<<0) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_IDDQ (0x1<<5) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_PWRDWN (0x1<<6) -#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_PWRDWN_SD (0x1<<7) +#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_PWRDWN_SD (0x1<<7) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_RSTB_HW (0x1<<4) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_TXD_FIFO_RSTB (0x1<<8) #define MISC_REGISTERS_RESET_REG_3_SET 0x5a4 -#define MISC_REGISTERS_SPIO_4 4 -#define MISC_REGISTERS_SPIO_5 5 -#define MISC_REGISTERS_SPIO_7 7 -#define MISC_REGISTERS_SPIO_CLR_POS 16 -#define MISC_REGISTERS_SPIO_FLOAT (0xffL<<24) -#define MISC_REGISTERS_SPIO_FLOAT_POS 24 -#define MISC_REGISTERS_SPIO_INPUT_HI_Z 2 -#define MISC_REGISTERS_SPIO_INT_OLD_SET_POS 16 -#define MISC_REGISTERS_SPIO_OUTPUT_HIGH 1 -#define MISC_REGISTERS_SPIO_OUTPUT_LOW 0 -#define MISC_REGISTERS_SPIO_SET_POS 8 +#define MISC_SPIO_CLR_POS 16 +#define MISC_SPIO_FLOAT (0xffL<<24) +#define MISC_SPIO_FLOAT_POS 24 +#define MISC_SPIO_INPUT_HI_Z 2 +#define MISC_SPIO_INT_OLD_SET_POS 16 +#define MISC_SPIO_OUTPUT_HIGH 1 +#define MISC_SPIO_OUTPUT_LOW 0 +#define MISC_SPIO_SET_POS 8 +#define MISC_SPIO_SPIO4 0x10 +#define MISC_SPIO_SPIO5 0x20 #define HW_LOCK_MAX_RESOURCE_VALUE 31 +#define HW_LOCK_RESOURCE_DRV_FLAGS 10 #define HW_LOCK_RESOURCE_GPIO 1 #define HW_LOCK_RESOURCE_MDIO 0 -#define HW_LOCK_RESOURCE_PORT0_ATT_MASK 3 -#define HW_LOCK_RESOURCE_RESERVED_08 8 +#define HW_LOCK_RESOURCE_NVRAM 12 +#define HW_LOCK_RESOURCE_PORT0_ATT_MASK 3 +#define HW_LOCK_RESOURCE_RECOVERY_LEADER_0 8 +#define HW_LOCK_RESOURCE_RECOVERY_LEADER_1 9 +#define HW_LOCK_RESOURCE_RECOVERY_REG 11 +#define HW_LOCK_RESOURCE_RESET 5 #define HW_LOCK_RESOURCE_SPIO 2 -#define HW_LOCK_RESOURCE_UNDI 5 -#define PRS_FLAG_OVERETH_IPV4 1 -#define AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT (0x1<<4) -#define AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR (0x1<<5) -#define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (0x1<<18) -#define AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT (0x1<<31) -#define AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT (0x1<<9) -#define AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR (0x1<<8) -#define AEU_INPUTS_ATTN_BITS_CFC_HW_INTERRUPT (0x1<<7) -#define AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR (0x1<<6) -#define AEU_INPUTS_ATTN_BITS_CSDM_HW_INTERRUPT (0x1<<29) -#define AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR (0x1<<28) -#define AEU_INPUTS_ATTN_BITS_CSEMI_HW_INTERRUPT (0x1<<1) -#define AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR (0x1<<0) -#define AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR (0x1<<18) -#define AEU_INPUTS_ATTN_BITS_DMAE_HW_INTERRUPT (0x1<<11) -#define AEU_INPUTS_ATTN_BITS_DOORBELLQ_HW_INTERRUPT (0x1<<13) -#define AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR (0x1<<12) -#define AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_0 (0x1<<5) -#define AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_1 (0x1<<9) -#define AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR (0x1<<12) -#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY (0x1<<28) -#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY (0x1<<31) -#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY (0x1<<29) -#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY (0x1<<30) -#define AEU_INPUTS_ATTN_BITS_MISC_HW_INTERRUPT (0x1<<15) -#define AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR (0x1<<14) -#define AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR (0x1<<20) -#define AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR (0x1<<0) -#define AEU_INPUTS_ATTN_BITS_PBF_HW_INTERRUPT (0x1<<31) -#define AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT (0x1<<2) -#define AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR (0x1<<3) -#define AEU_INPUTS_ATTN_BITS_PXP_HW_INTERRUPT (0x1<<3) -#define AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR (0x1<<2) -#define AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_HW_INTERRUPT (0x1<<5) -#define AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR (0x1<<4) -#define AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT (0x1<<3) -#define AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR (0x1<<2) -#define AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR (0x1<<22) -#define AEU_INPUTS_ATTN_BITS_SPIO5 (0x1<<15) -#define AEU_INPUTS_ATTN_BITS_TCM_HW_INTERRUPT (0x1<<27) -#define AEU_INPUTS_ATTN_BITS_TIMERS_HW_INTERRUPT (0x1<<5) -#define AEU_INPUTS_ATTN_BITS_TSDM_HW_INTERRUPT (0x1<<25) -#define AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR (0x1<<24) -#define AEU_INPUTS_ATTN_BITS_TSEMI_HW_INTERRUPT (0x1<<29) -#define AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR (0x1<<28) -#define AEU_INPUTS_ATTN_BITS_UCM_HW_INTERRUPT (0x1<<23) -#define AEU_INPUTS_ATTN_BITS_UPB_HW_INTERRUPT (0x1<<27) -#define AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR (0x1<<26) -#define AEU_INPUTS_ATTN_BITS_USDM_HW_INTERRUPT (0x1<<21) -#define AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR (0x1<<20) -#define AEU_INPUTS_ATTN_BITS_USEMI_HW_INTERRUPT (0x1<<25) -#define AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR (0x1<<24) -#define AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR (0x1<<16) -#define AEU_INPUTS_ATTN_BITS_XCM_HW_INTERRUPT (0x1<<9) -#define AEU_INPUTS_ATTN_BITS_XSDM_HW_INTERRUPT (0x1<<7) -#define AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR (0x1<<6) -#define AEU_INPUTS_ATTN_BITS_XSEMI_HW_INTERRUPT (0x1<<11) -#define AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR (0x1<<10) +#define AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT (0x1<<4) +#define AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR (0x1<<5) +#define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (0x1<<18) +#define AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT (0x1<<31) +#define AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR (0x1<<30) +#define AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT (0x1<<9) +#define AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR (0x1<<8) +#define AEU_INPUTS_ATTN_BITS_CFC_HW_INTERRUPT (0x1<<7) +#define AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR (0x1<<6) +#define AEU_INPUTS_ATTN_BITS_CSDM_HW_INTERRUPT (0x1<<29) +#define AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR (0x1<<28) +#define AEU_INPUTS_ATTN_BITS_CSEMI_HW_INTERRUPT (0x1<<1) +#define AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR (0x1<<0) +#define AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR (0x1<<18) +#define AEU_INPUTS_ATTN_BITS_DMAE_HW_INTERRUPT (0x1<<11) +#define AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR (0x1<<10) +#define AEU_INPUTS_ATTN_BITS_DOORBELLQ_HW_INTERRUPT (0x1<<13) +#define AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR (0x1<<12) +#define AEU_INPUTS_ATTN_BITS_GPIO0_FUNCTION_0 (0x1<<2) +#define AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR (0x1<<12) +#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY (0x1<<28) +#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY (0x1<<31) +#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY (0x1<<29) +#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY (0x1<<30) +#define AEU_INPUTS_ATTN_BITS_MISC_HW_INTERRUPT (0x1<<15) +#define AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR (0x1<<14) +#define AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR (0x1<<14) +#define AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR (0x1<<20) +#define AEU_INPUTS_ATTN_BITS_PBCLIENT_HW_INTERRUPT (0x1<<31) +#define AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR (0x1<<30) +#define AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR (0x1<<0) +#define AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT (0x1<<2) +#define AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR (0x1<<3) +#define AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_HW_INTERRUPT (0x1<<5) +#define AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR (0x1<<4) +#define AEU_INPUTS_ATTN_BITS_PXP_HW_INTERRUPT (0x1<<3) +#define AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR (0x1<<2) +#define AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT (0x1<<3) +#define AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR (0x1<<2) +#define AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR (0x1<<22) +#define AEU_INPUTS_ATTN_BITS_SPIO5 (0x1<<15) +#define AEU_INPUTS_ATTN_BITS_TCM_HW_INTERRUPT (0x1<<27) +#define AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR (0x1<<26) +#define AEU_INPUTS_ATTN_BITS_TIMERS_HW_INTERRUPT (0x1<<5) +#define AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR (0x1<<4) +#define AEU_INPUTS_ATTN_BITS_TSDM_HW_INTERRUPT (0x1<<25) +#define AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR (0x1<<24) +#define AEU_INPUTS_ATTN_BITS_TSEMI_HW_INTERRUPT (0x1<<29) +#define AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR (0x1<<28) +#define AEU_INPUTS_ATTN_BITS_UCM_HW_INTERRUPT (0x1<<23) +#define AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR (0x1<<22) +#define AEU_INPUTS_ATTN_BITS_UPB_HW_INTERRUPT (0x1<<27) +#define AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR (0x1<<26) +#define AEU_INPUTS_ATTN_BITS_USDM_HW_INTERRUPT (0x1<<21) +#define AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR (0x1<<20) +#define AEU_INPUTS_ATTN_BITS_USEMI_HW_INTERRUPT (0x1<<25) +#define AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR (0x1<<24) +#define AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR (0x1<<16) +#define AEU_INPUTS_ATTN_BITS_XCM_HW_INTERRUPT (0x1<<9) +#define AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR (0x1<<8) +#define AEU_INPUTS_ATTN_BITS_XSDM_HW_INTERRUPT (0x1<<7) +#define AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR (0x1<<6) +#define AEU_INPUTS_ATTN_BITS_XSEMI_HW_INTERRUPT (0x1<<11) +#define AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR (0x1<<10) #define RESERVED_GENERAL_ATTENTION_BIT_0 0 -#define EVEREST_GEN_ATTN_IN_USE_MASK 0x3ffe0 +#define EVEREST_GEN_ATTN_IN_USE_MASK 0x7ffe0 #define EVEREST_LATCHED_ATTN_IN_USE_MASK 0xffe00000 #define RESERVED_GENERAL_ATTENTION_BIT_6 6 @@ -5582,9 +3723,12 @@ #define LINK_SYNC_ATTENTION_BIT_FUNC_6 RESERVED_GENERAL_ATTENTION_BIT_18 #define LINK_SYNC_ATTENTION_BIT_FUNC_7 RESERVED_GENERAL_ATTENTION_BIT_19 -#define MCP_PFC_ATTENTION_BIT_PORT_0\ + /* Used For Error Recovery: changing this will require more \ + changes in code that assume + * error recovery uses general attn bit20 ! */ +#define ERROR_RECOVERY_ATTENTION_BIT\ RESERVED_GENERAL_ATTENTION_BIT_20 -#define MCP_PFC_ATTENTION_BIT_PORT_1\ +#define RESERVED_ATTENTION_BIT\ RESERVED_GENERAL_ATTENTION_BIT_21 #define LATCHED_ATTN_RBCR 23 @@ -5600,8 +3744,7 @@ #define LATCHED_ATTN_SCPAD_PARITY_MCP 33 #define GENERAL_ATTEN_WORD(atten_name) ((94 + atten_name) / 32) -#define GENERAL_ATTEN_OFFSET(atten_name)\ - (1UL << ((94 + atten_name) % 32)) +#define GENERAL_ATTEN_OFFSET(atten_name) (1UL << ((94 + atten_name) % 32)) /* * This file defines GRC base address for every block. * This file is included by chipsim, asm microcode and cpp microcode. @@ -5609,80 +3752,89 @@ * Use the base with the generated offsets of specific registers. */ -#define GRCBASE_PXPCS 0x000000 -#define GRCBASE_PCICONFIG 0x002000 -#define GRCBASE_PCIREG 0x002400 -#define GRCBASE_EMAC0 0x008000 -#define GRCBASE_EMAC1 0x008400 +#define GRCBASE_PXPCS 0x000000 +#define GRCBASE_PCICONFIG 0x002000 +#define GRCBASE_PCIREG 0x002400 +#define GRCBASE_EMAC0 0x008000 +#define GRCBASE_EMAC1 0x008400 #define GRCBASE_DBU 0x008800 -#define GRCBASE_PGLUE_B 0x009000 -#define GRCBASE_MISC 0x00A000 +#define GRCBASE_PGLUE_B 0x009000 +#define GRCBASE_MISC 0x00A000 #define GRCBASE_DBG 0x00C000 #define GRCBASE_NIG 0x010000 #define GRCBASE_XCM 0x020000 -#define GRCBASE_PRS 0x040000 -#define GRCBASE_SRCH 0x040400 -#define GRCBASE_TSDM 0x042000 +#define GRCBASE_PRS 0x040000 +#define GRCBASE_SRCH 0x040400 +#define GRCBASE_TSDM 0x042000 #define GRCBASE_TCM 0x050000 -#define GRCBASE_BRB1 0x060000 +#define GRCBASE_BRB1 0x060000 #define GRCBASE_MCP 0x080000 #define GRCBASE_UPB 0x0C1000 -#define GRCBASE_CSDM 0x0C2000 -#define GRCBASE_USDM 0x0C4000 +#define GRCBASE_CSDM 0x0C2000 +#define GRCBASE_USDM 0x0C4000 #define GRCBASE_CCM 0x0D0000 #define GRCBASE_UCM 0x0E0000 #define GRCBASE_CDU 0x101000 -#define GRCBASE_DMAE 0x102000 +#define GRCBASE_DMAE 0x102000 #define GRCBASE_PXP 0x103000 #define GRCBASE_CFC 0x104000 #define GRCBASE_HC 0x108000 #define GRCBASE_ATC 0x110000 -#define GRCBASE_PXP2 0x120000 +#define GRCBASE_PXP2 0x120000 #define GRCBASE_IGU 0x130000 -#define GRCBASE_PBF 0x140000 +#define GRCBASE_PBF 0x140000 #define GRCBASE_UMAC0 0x160000 #define GRCBASE_UMAC1 0x160400 -#define GRCBASE_XMAC 0x160800 -#define GRCBASE_XPB 0x161000 -#define GRCBASE_TIMERS 0x164000 -#define GRCBASE_XSDM 0x166000 +#define GRCBASE_XPB 0x161000 +#define GRCBASE_MSTAT0 0x162000 +#define GRCBASE_MSTAT1 0x162800 +#define GRCBASE_XMAC0 0x163000 +#define GRCBASE_XMAC1 0x163800 +#define GRCBASE_TIMERS 0x164000 +#define GRCBASE_XSDM 0x166000 #define GRCBASE_QM 0x168000 -#define GRCBASE_QM_4PORT 0x168000 +#define GRCBASE_QM_4PORT 0x168000 #define GRCBASE_DQ 0x170000 -#define GRCBASE_TSEM 0x180000 -#define GRCBASE_CSEM 0x200000 -#define GRCBASE_XSEM 0x280000 -#define GRCBASE_XSEM_4PORT 0x280000 -#define GRCBASE_USEM 0x300000 -#define GRCBASE_MCP_A 0x380000 -#define GRCBASE_MISC_AEU GRCBASE_MISC -#define GRCBASE_Tstorm GRCBASE_TSEM -#define GRCBASE_Cstorm GRCBASE_CSEM -#define GRCBASE_Xstorm GRCBASE_XSEM -#define GRCBASE_Ustorm GRCBASE_USEM +#define GRCBASE_TSEM 0x180000 +#define GRCBASE_CSEM 0x200000 +#define GRCBASE_XSEM 0x280000 +#define GRCBASE_XSEM_4PORT 0x280000 +#define GRCBASE_USEM 0x300000 +#define GRCBASE_MCP_A 0x380000 +#define GRCBASE_MISC_AEU GRCBASE_MISC +#define GRCBASE_Tstorm GRCBASE_TSEM +#define GRCBASE_Cstorm GRCBASE_CSEM +#define GRCBASE_Xstorm GRCBASE_XSEM +#define GRCBASE_Ustorm GRCBASE_USEM /* offset of configuration space in the pci core register */ #define PCICFG_OFFSET 0x2000 -#define PCICFG_VENDOR_ID_OFFSET 0x00 -#define PCICFG_DEVICE_ID_OFFSET 0x02 +#define PCICFG_VENDOR_ID_OFFSET 0x00 +#define PCICFG_DEVICE_ID_OFFSET 0x02 #define PCICFG_COMMAND_OFFSET 0x04 -#define PCICFG_COMMAND_IO_SPACE (1<<0) +#define PCICFG_COMMAND_IO_SPACE (1<<0) #define PCICFG_COMMAND_MEM_SPACE (1<<1) #define PCICFG_COMMAND_BUS_MASTER (1<<2) #define PCICFG_COMMAND_SPECIAL_CYCLES (1<<3) #define PCICFG_COMMAND_MWI_CYCLES (1<<4) #define PCICFG_COMMAND_VGA_SNOOP (1<<5) -#define PCICFG_COMMAND_PERR_ENA (1<<6) -#define PCICFG_COMMAND_STEPPING (1<<7) -#define PCICFG_COMMAND_SERR_ENA (1<<8) -#define PCICFG_COMMAND_FAST_B2B (1<<9) +#define PCICFG_COMMAND_PERR_ENA (1<<6) +#define PCICFG_COMMAND_STEPPING (1<<7) +#define PCICFG_COMMAND_SERR_ENA (1<<8) +#define PCICFG_COMMAND_FAST_B2B (1<<9) #define PCICFG_COMMAND_INT_DISABLE (1<<10) -#define PCICFG_COMMAND_RESERVED (0x1f<<11) +#define PCICFG_COMMAND_RESERVED (0x1f<<11) #define PCICFG_STATUS_OFFSET 0x06 -#define PCICFG_REVESION_ID_OFFSET 0x08 +#define PCICFG_REVISION_ID_OFFSET 0x08 +#define PCICFG_REVESION_ID_MASK 0xff +#define PCICFG_REVESION_ID_ERROR_VAL 0xff #define PCICFG_CACHE_LINE_SIZE 0x0c #define PCICFG_LATENCY_TIMER 0x0d +#define PCICFG_HEADER_TYPE 0x0e +#define PCICFG_HEADER_TYPE_NORMAL 0 +#define PCICFG_HEADER_TYPE_BRIDGE 1 +#define PCICFG_HEADER_TYPE_CARDBUS 2 #define PCICFG_BAR_1_LOW 0x10 #define PCICFG_BAR_1_HIGH 0x14 #define PCICFG_BAR_2_LOW 0x18 @@ -5691,7 +3843,7 @@ #define PCICFG_BAR_3_HIGH 0x24 #define PCICFG_SUBSYSTEM_VENDOR_ID_OFFSET 0x2c #define PCICFG_SUBSYSTEM_ID_OFFSET 0x2e -#define PCICFG_INT_LINE 0x3c +#define PCICFG_INT_LINE 0x3c #define PCICFG_INT_PIN 0x3d #define PCICFG_PM_CAPABILITY 0x48 #define PCICFG_PM_CAPABILITY_VERSION (0x3<<16) @@ -5699,8 +3851,8 @@ #define PCICFG_PM_CAPABILITY_RESERVED (1<<20) #define PCICFG_PM_CAPABILITY_DSI (1<<21) #define PCICFG_PM_CAPABILITY_AUX_CURRENT (0x7<<22) -#define PCICFG_PM_CAPABILITY_D1_SUPPORT (1<<25) -#define PCICFG_PM_CAPABILITY_D2_SUPPORT (1<<26) +#define PCICFG_PM_CAPABILITY_D1_SUPPORT (1<<25) +#define PCICFG_PM_CAPABILITY_D2_SUPPORT (1<<26) #define PCICFG_PM_CAPABILITY_PME_IN_D0 (1<<27) #define PCICFG_PM_CAPABILITY_PME_IN_D1 (1<<28) #define PCICFG_PM_CAPABILITY_PME_IN_D2 (1<<29) @@ -5712,18 +3864,18 @@ #define PCICFG_PM_CSR_PME_STATUS (1<<15) #define PCICFG_MSI_CAP_ID_OFFSET 0x58 #define PCICFG_MSI_CONTROL_ENABLE (0x1<<16) -#define PCICFG_MSI_CONTROL_MCAP (0x7<<17) -#define PCICFG_MSI_CONTROL_MENA (0x7<<20) +#define PCICFG_MSI_CONTROL_MCAP (0x7<<17) +#define PCICFG_MSI_CONTROL_MENA (0x7<<20) #define PCICFG_MSI_CONTROL_64_BIT_ADDR_CAP (0x1<<23) #define PCICFG_MSI_CONTROL_MSI_PVMASK_CAPABLE (0x1<<24) #define PCICFG_GRC_ADDRESS 0x78 -#define PCICFG_GRC_DATA 0x80 +#define PCICFG_GRC_DATA 0x80 #define PCICFG_ME_REGISTER 0x98 #define PCICFG_MSIX_CAP_ID_OFFSET 0xa0 #define PCICFG_MSIX_CONTROL_TABLE_SIZE (0x7ff<<16) #define PCICFG_MSIX_CONTROL_RESERVED (0x7<<27) #define PCICFG_MSIX_CONTROL_FUNC_MASK (0x1<<30) -#define PCICFG_MSIX_CONTROL_MSIX_ENABLE (0x1<<31) +#define PCICFG_MSIX_CONTROL_MSIX_ENABLE (0x1<<31) #define PCICFG_DEVICE_CONTROL 0xb4 #define PCICFG_DEVICE_CONTROL_NP_TRANSACTION_PEND (1<<21) @@ -5740,7 +3892,7 @@ /* config_2 offset */ #define GRC_CONFIG_2_SIZE_REG 0x408 #define PCI_CONFIG_2_BAR1_SIZE (0xfL<<0) -#define PCI_CONFIG_2_BAR1_SIZE_DISABLED (0L<<0) +#define PCI_CONFIG_2_BAR1_SIZE_DISABLED (0L<<0) #define PCI_CONFIG_2_BAR1_SIZE_64K (1L<<0) #define PCI_CONFIG_2_BAR1_SIZE_128K (2L<<0) #define PCI_CONFIG_2_BAR1_SIZE_256K (3L<<0) @@ -5756,7 +3908,7 @@ #define PCI_CONFIG_2_BAR1_SIZE_256M (13L<<0) #define PCI_CONFIG_2_BAR1_SIZE_512M (14L<<0) #define PCI_CONFIG_2_BAR1_SIZE_1G (15L<<0) -#define PCI_CONFIG_2_BAR1_64ENA (1L<<4) +#define PCI_CONFIG_2_BAR1_64ENA (1L<<4) #define PCI_CONFIG_2_EXP_ROM_RETRY (1L<<5) #define PCI_CONFIG_2_CFG_CYCLE_RETRY (1L<<6) #define PCI_CONFIG_2_FIRST_CFG_DONE (1L<<7) @@ -5784,8 +3936,8 @@ #define GRC_CONFIG_3_SIZE_REG 0x40c #define PCI_CONFIG_3_STICKY_BYTE (0xffL<<0) #define PCI_CONFIG_3_FORCE_PME (1L<<24) -#define PCI_CONFIG_3_PME_STATUS (1L<<25) -#define PCI_CONFIG_3_PME_ENABLE (1L<<26) +#define PCI_CONFIG_3_PME_STATUS (1L<<25) +#define PCI_CONFIG_3_PME_ENABLE (1L<<26) #define PCI_CONFIG_3_PM_STATE (0x3L<<27) #define PCI_CONFIG_3_VAUX_PRESET (1L<<30) #define PCI_CONFIG_3_PCI_POWER (1L<<31) @@ -5807,9 +3959,9 @@ in private reg space is set. This bit also exists in VF register space WC */ -#define GRC_BAR2_CONFIG 0x4e0 +#define GRC_BAR2_CONFIG 0x4e0 #define PCI_CONFIG_2_BAR2_SIZE (0xfL<<0) -#define PCI_CONFIG_2_BAR2_SIZE_DISABLED (0L<<0) +#define PCI_CONFIG_2_BAR2_SIZE_DISABLED (0L<<0) #define PCI_CONFIG_2_BAR2_SIZE_64K (1L<<0) #define PCI_CONFIG_2_BAR2_SIZE_128K (2L<<0) #define PCI_CONFIG_2_BAR2_SIZE_256K (3L<<0) @@ -5825,11 +3977,11 @@ #define PCI_CONFIG_2_BAR2_SIZE_256M (13L<<0) #define PCI_CONFIG_2_BAR2_SIZE_512M (14L<<0) #define PCI_CONFIG_2_BAR2_SIZE_1G (15L<<0) -#define PCI_CONFIG_2_BAR2_64ENA (1L<<4) +#define PCI_CONFIG_2_BAR2_64ENA (1L<<4) -#define GRC_BAR3_CONFIG 0x4f4 +#define GRC_BAR3_CONFIG 0x4f4 #define PCI_CONFIG_2_BAR3_SIZE (0xfL<<0) -#define PCI_CONFIG_2_BAR3_SIZE_DISABLED (0L<<0) +#define PCI_CONFIG_2_BAR3_SIZE_DISABLED (0L<<0) #define PCI_CONFIG_2_BAR3_SIZE_64K (1L<<0) #define PCI_CONFIG_2_BAR3_SIZE_128K (2L<<0) #define PCI_CONFIG_2_BAR3_SIZE_256K (3L<<0) @@ -5845,12 +3997,14 @@ #define PCI_CONFIG_2_BAR3_SIZE_256M (13L<<0) #define PCI_CONFIG_2_BAR3_SIZE_512M (14L<<0) #define PCI_CONFIG_2_BAR3_SIZE_1G (15L<<0) -#define PCI_CONFIG_2_BAR3_64ENA (1L<<4) +#define PCI_CONFIG_2_BAR3_64ENA (1L<<4) #define PCI_PM_DATA_A 0x410 #define PCI_PM_DATA_B 0x414 #define PCI_ID_VAL1 0x434 #define PCI_ID_VAL2 0x438 +#define PCI_ID_VAL3 0x43c +#define PCI_ID_VAL3_REVISION_ID_ERROR (0xffL<<24) #define GRC_CONFIG_REG_VF_BAR_REG_1 0x608 @@ -5866,13 +4020,13 @@ the same location for the same 4 bits*/ #define PXPCS_TL_CONTROL_5 0x814 -#define PXPCS_TL_CONTROL_5_UNKNOWNTYPE_ERR_ATTN (1 << 29) /*WC*/ +#define PXPCS_TL_CONTROL_5_UNKNOWNTYPE_ERR_ATTN (1 << 29) /*WC*/ #define PXPCS_TL_CONTROL_5_BOUNDARY4K_ERR_ATTN (1 << 28) /*WC*/ #define PXPCS_TL_CONTROL_5_MRRS_ERR_ATTN (1 << 27) /*WC*/ -#define PXPCS_TL_CONTROL_5_MPS_ERR_ATTN (1 << 26) /*WC*/ +#define PXPCS_TL_CONTROL_5_MPS_ERR_ATTN (1 << 26) /*WC*/ #define PXPCS_TL_CONTROL_5_TTX_BRIDGE_FORWARD_ERR (1 << 25) /*WC*/ #define PXPCS_TL_CONTROL_5_TTX_TXINTF_OVERFLOW (1 << 24) /*WC*/ -#define PXPCS_TL_CONTROL_5_PHY_ERR_ATTN (1 << 23) /*RO*/ +#define PXPCS_TL_CONTROL_5_PHY_ERR_ATTN (1 << 23) /*RO*/ #define PXPCS_TL_CONTROL_5_DL_ERR_ATTN (1 << 22) /*RO*/ #define PXPCS_TL_CONTROL_5_TTX_ERR_NP_TAG_IN_USE (1 << 21) /*WC*/ #define PXPCS_TL_CONTROL_5_TRX_ERR_UNEXP_RTAG (1 << 20) /*WC*/ @@ -5884,18 +4038,18 @@ #define PXPCS_TL_CONTROL_5_ERR_UNEXP_CPL1 (1 << 14) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_MASTER_ABRT1 (1 << 13) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_CPL_TIMEOUT1 (1 << 12) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_FC_PRTL1 (1 << 11) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_FC_PRTL1 (1 << 11) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_PSND_TLP1 (1 << 10) /*WC*/ -#define PXPCS_TL_CONTROL_5_PRI_SIG_TARGET_ABORT (1 << 9) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_UNSPPORT (1 << 8) /*WC*/ +#define PXPCS_TL_CONTROL_5_PRI_SIG_TARGET_ABORT (1 << 9) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_UNSPPORT (1 << 8) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_ECRC (1 << 7) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_MALF_TLP (1 << 6) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_RX_OFLOW (1 << 5) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_MALF_TLP (1 << 6) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_RX_OFLOW (1 << 5) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_UNEXP_CPL (1 << 4) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_MASTER_ABRT (1 << 3) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_CPL_TIMEOUT (1 << 2) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_FC_PRTL (1 << 1) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_PSND_TLP (1 << 0) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_PSND_TLP (1 << 0) /*WC*/ #define PXPCS_TL_FUNC345_STAT 0x854 @@ -6100,15 +4254,15 @@ #define BAR_DOORBELL_OFFSET 0x800000 -#define BAR_ME_REGISTER 0x450000 +#define BAR_ME_REGISTER 0x450000 #define ME_REG_PF_NUM_SHIFT 0 #define ME_REG_PF_NUM\ (7L<> 1; } diff --git a/vmkdrivers/src_9/drivers/net/bnx2/cnic.c b/vmkdrivers/src_9/drivers/net/bnx2/cnic.c index 4bed1a7..6c51ae0 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/cnic.c +++ b/vmkdrivers/src_9/drivers/net/bnx2/cnic.c @@ -1,8 +1,8 @@ /* cnic.c: Broadcom CNIC core network driver. * - * Copyright (c) 2006-2010 Broadcom Corporation + * Copyright (c) 2006-2013 Broadcom Corporation * - * Portions Copyright (c) VMware, Inc. 2009-2010, All Rights Reserved. + * Portions Copyright (c) VMware, Inc. 2009-2013, All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -52,7 +52,7 @@ #include #endif /* !defined (__VMKLNX__) */ -#define NEW_BNX2X_HSI 60 +#define NEW_BNX2X_HSI 70 #include "cnic_if.h" #include "bnx2.h" @@ -61,8 +61,9 @@ #include "bnx2x_hsi.h" #include "57xx_iscsi_constants.h" #include "57xx_iscsi_hsi.h" +#include "bnx2fc_constants.h" #include "cnic.h" -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) #include "bnx2x_57710_int_offsets.h" #include "bnx2x_57711_int_offsets.h" #include "bnx2x_57712_int_offsets.h" @@ -95,12 +96,44 @@ static DEFINE_RWLOCK(cnic_dev_lock); #endif /* !defined (__VMKLNX__) */ static DEFINE_MUTEX(cnic_lock); +static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info, + int use_pg_tbl); + static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE]; +/* helper function, assuming cnic_lock is held */ +static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type) +{ + return rcu_dereference_protected(cnic_ulp_tbl[type], + lockdep_is_held(&cnic_lock)); +} + static int cnic_service_bnx2(void *, void *); static int cnic_service_bnx2x(void *, void *); static int cnic_ctl(void *, struct cnic_ctl_info *); +#if (CNIC_ISCSI_OOO_SUPPORT) +static void cnic_alloc_bnx2_ooo_resc(struct cnic_dev *dev); +static void cnic_alloc_bnx2x_ooo_resc(struct cnic_dev *dev); +static void cnic_start_bnx2_ooo_hw(struct cnic_dev *dev); +static void cnic_start_bnx2x_ooo_hw(struct cnic_dev *dev); +static void cnic_stop_bnx2_ooo_hw(struct cnic_dev *dev); +static void cnic_stop_bnx2x_ooo_hw(struct cnic_dev *dev); +static void cnic_handle_bnx2_ooo_rx_event(struct cnic_dev *dev); +static void cnic_handle_bnx2x_ooo_rx_event(struct cnic_dev *dev); +static void cnic_handle_bnx2_ooo_tx_event(struct cnic_dev *dev); +static void cnic_handle_bnx2x_ooo_tx_event(struct cnic_dev *dev); +static void cnic_bnx2_ooo_iscsi_conn_update(struct cnic_dev *dev, + struct kwqe *kwqe); +static void cnic_bnx2_ooo_iscsi_destroy(struct cnic_dev *dev, + struct kwqe *kwqe); +static void cnic_bnx2x_ooo_iscsi_conn_update(struct cnic_dev *dev, + struct kwqe *kwqe); +static void cnic_free_ooo_resc(struct cnic_dev *dev); +static void cnic_conn_ooo_init(struct cnic_local *cp, u32 l5_cid); +static void cnic_flush_ooo(struct cnic_dev *dev, u32 l5_cid); +#endif + static struct cnic_ops cnic_bnx2_ops = { .cnic_owner = THIS_MODULE, .cnic_handler = cnic_service_bnx2, @@ -169,6 +202,33 @@ static void cnic_print_ramrod_info(struct cnic_dev *dev, u32 cmd, u32 cid, case L5CM_RAMROD_CMD_ID_ABORT: sprintf(kwq_op, "%s", "TCP_ABORT"); break; + /* FCoE RAMROD's */ +#if (NEW_BNX2X_HSI >= 64) + case FCOE_RAMROD_CMD_ID_INIT_FUNC: +#else + case FCOE_RAMROD_CMD_ID_INIT: +#endif + sprintf(kwq_op, "%s", "FCOE_INIT"); + break; + case FCOE_RAMROD_CMD_ID_OFFLOAD_CONN: + sprintf(kwq_op, "%s", "FCOE_OFLD_CONN"); + break; + case FCOE_RAMROD_CMD_ID_ENABLE_CONN: + sprintf(kwq_op, "%s", "FCOE_EN_CONN"); + break; + case FCOE_RAMROD_CMD_ID_DISABLE_CONN: + sprintf(kwq_op, "%s", "FCOE_DIS_CONN"); + break; + case FCOE_RAMROD_CMD_ID_TERMINATE_CONN: + sprintf(kwq_op, "%s", "FCOE_TERM_CONN"); + break; +#if (NEW_BNX2X_HSI >= 64) + case FCOE_RAMROD_CMD_ID_DESTROY_FUNC: +#else + case FCOE_RAMROD_CMD_ID_DESTROY: +#endif + sprintf(kwq_op, "%s", "FCOE_DESTROY"); + break; default: sprintf(kwq_op, "%s:%x", "Unknown", cmd); } @@ -178,23 +238,120 @@ static void cnic_print_ramrod_info(struct cnic_dev *dev, u32 cmd, u32 cid, kwqe->kwqe_info2, kwqe->kwqe_info3); } -#if !defined(__VMKLNX__) + +static void cnic_dump_kcq_entry(struct kcqe *kcqe, int index, char *add_info) +{ + if (add_info) + printk(KERN_INFO PFX "KCQE[%x] = 0x%0x, 0x%x, 0x%x, 0x%x, " + "0x%x, 0x%x, 0x%x, OP=0x%x ---> [%s]\n", index, + kcqe->kcqe_info0, kcqe->kcqe_info1, kcqe->kcqe_info2, + kcqe->kcqe_info3, kcqe->kcqe_info4, kcqe->kcqe_info5, + kcqe->kcqe_info6, kcqe->kcqe_op_flag, add_info); + else + printk(KERN_INFO PFX "KCQE[%x] = 0x%0x, 0x%x, 0x%x, 0x%x, " + "0x%x, 0x%x, 0x%x, OP=0x%x\n", index, + kcqe->kcqe_info0, kcqe->kcqe_info1, kcqe->kcqe_info2, + kcqe->kcqe_info3, kcqe->kcqe_info4, kcqe->kcqe_info5, + kcqe->kcqe_info6, kcqe->kcqe_op_flag); +} + +/* This function will dump KCQEs pointed by page + */ +static void cnic_dump_kcq_page(struct cnic_dev *dev, int kcq_page, + u16 sw_prod, u16 hw_prod) +{ + struct cnic_local *cp = dev->cnic_priv; + struct kcq_info *info = &cp->kcq1; + struct kcqe *kcqe; + int i; + + kcqe = &info->kcq[kcq_page][0]; + + for (i = 0; i < MAX_KCQE_CNT; i++, kcqe++) { + if (KCQ_PG(sw_prod) == kcq_page && KCQ_IDX(sw_prod) == i) + /* SW PROD INDEX */ + cnic_dump_kcq_entry(kcqe, i, "SW_PROD"); + else if (KCQ_PG(hw_prod) == kcq_page && KCQ_IDX(hw_prod) == i) + /* HW PROD INDEX */ + cnic_dump_kcq_entry(kcqe, i, "HW_PROD"); + else + cnic_dump_kcq_entry(kcqe, i, NULL); + } +} + +/* This function will print 3 pages worth of KCQEs, + * currently active, previous and next page. + */ +void cnic_dump_kcq(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct kcq_info *info = &cp->kcq1; + int current_page; + int prev_page; + int next_page; + u16 sw_prod = 0; + u16 hw_prod; + + sw_prod = info->sw_prod_idx; + sw_prod &= MAX_KCQ_IDX; + hw_prod = *info->hw_prod_idx_ptr; + hw_prod = info->hw_idx(hw_prod); + + printk(KERN_INFO PFX "%s: sw_prod_idx = 0x%x, hw_prod_idx = 0x%x\n", + dev->netdev->name, info->sw_prod_idx, hw_prod); + + current_page = KCQ_PG(sw_prod); + if (current_page == 0) + prev_page = KCQ_PAGE_CNT - 1; + else + prev_page = current_page - 1; + + if (current_page == KCQ_PAGE_CNT - 1) + next_page = 0; + else + next_page = current_page + 1; + + printk(KERN_INFO PFX "%s: dumping PREVIOUS PAGE (%d)\n", + dev->netdev->name, prev_page); + cnic_dump_kcq_page(dev, prev_page, sw_prod, hw_prod); + + printk(KERN_INFO PFX "%s: dumping CURRENT PAGE (%d)\n", + dev->netdev->name, current_page); + cnic_dump_kcq_page(dev, current_page, sw_prod, hw_prod); + + printk(KERN_INFO PFX "%s: dumping NEXT PAGE (%d)\n", + dev->netdev->name, next_page); + cnic_dump_kcq_page(dev, next_page, sw_prod, hw_prod); +} +EXPORT_SYMBOL(cnic_dump_kcq); + +#if !defined(__VMKLNX__) || \ + (defined(__VMKLNX__) && \ + ((VMWARE_ESX_DDK_VERSION >= 50000) && !defined (CNIC_INBOX)) || \ + ((VMWARE_ESX_DDK_VERSION >= 55000) && defined (CNIC_INBOX))) + static struct cnic_dev *cnic_from_netdev(struct net_device *netdev) { struct cnic_dev *cdev; +#if !defined(__VMKLNX__) read_lock(&cnic_dev_lock); +#endif list_for_each_entry(cdev, &cnic_dev_list, list) { if (netdev == cdev->netdev) { cnic_hold(cdev); +#if !defined(__VMKLNX__) read_unlock(&cnic_dev_lock); +#endif /* !defined(__VMKLNX__) */ return cdev; } } +#if !defined(__VMKLNX__) read_unlock(&cnic_dev_lock); +#endif return NULL; } -#endif /* !defined(__VMKLNX__) */ +#endif static inline void ulp_get(struct cnic_ulp_ops *ulp_ops) { @@ -233,6 +390,20 @@ static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr) ethdev->drv_ctl(dev->netdev, &info); } +static void cnic_npar_ring_ctl(struct cnic_dev *dev, int start) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_eth_dev *ethdev = cp->ethdev; + struct drv_ctl_info info; + + if (start) + info.cmd = DRV_CTL_START_NPAR_CMD; + else + info.cmd = DRV_CTL_STOP_NPAR_CMD; + + ethdev->drv_ctl(dev->netdev, &info); +} + static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val) { struct cnic_local *cp = dev->cnic_priv; @@ -259,25 +430,102 @@ static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off) return io->data; } -static void cnic_kwq_completion(struct cnic_dev *dev, u32 count) +static void cnic_ulp_ctl(struct cnic_dev *dev, int ulp_type, bool reg) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_eth_dev *ethdev = cp->ethdev; + struct drv_ctl_info info; + struct fcoe_capabilities *fcoe_cap = + &info.data.register_data.fcoe_features; + + if (reg) { + info.cmd = DRV_CTL_ULP_REGISTER_CMD; + if (ulp_type == CNIC_ULP_FCOE && dev->fcoe_cap) + memcpy(fcoe_cap, dev->fcoe_cap, sizeof(*fcoe_cap)); + } else + info.cmd = DRV_CTL_ULP_UNREGISTER_CMD; + + info.data.ulp_type = ulp_type; + ethdev->drv_ctl(dev->netdev, &info); +} + +static int cnic_in_use(struct cnic_sock *csk) +{ + return test_bit(SK_F_INUSE, &csk->flags); +} + +static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count) { struct cnic_local *cp = dev->cnic_priv; struct cnic_eth_dev *ethdev = cp->ethdev; struct drv_ctl_info info; - info.cmd = DRV_CTL_RET_L5_SPQ_CREDIT_CMD; + info.cmd = cmd; info.data.credit.credit_count = count; ethdev->drv_ctl(dev->netdev, &info); } +#if (CNIC_ISCSI_OOO_SUPPORT) +static int cnic_get_ooo_cqe(struct cnic_dev *dev, struct cnic_ooo_cqe* cqe) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_eth_dev *ethdev = cp->ethdev; + struct drv_ctl_info info; + struct drv_ctl_ooo_cqe *ooo_cqe = &info.data.ooo_cqe; + + info.cmd = DRV_CTL_GET_OOO_CQE; + ooo_cqe->cqe = cqe; + return ethdev->drv_ctl(dev->netdev, &info); +} + +static int cnic_send_ooo_pkt(struct sk_buff *skb, struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_eth_dev *ethdev = cp->ethdev; + struct drv_ctl_info info; + struct drv_ctl_ooo_pkt *ooo_pd = &info.data.pkt_desc; + + info.cmd = DRV_CTL_SEND_OOO_PKT; + ooo_pd->skb = skb; + + return ethdev->drv_ctl(dev->netdev, &info); +} + +static int cnic_reuse_ooo_pkt(struct sk_buff *skb, struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_eth_dev *ethdev = cp->ethdev; + struct drv_ctl_info info; + struct drv_ctl_ooo_pkt *ooo_pd = &info.data.pkt_desc; + + if (!skb) { + CNIC_ERR("skb is NULL in reuse!\n"); + return -EINVAL; + } + info.cmd = DRV_CTL_REUSE_OOO_PKT; + ooo_pd->skb = skb; + return ethdev->drv_ctl(dev->netdev, &info); +} + +static int cnic_comp_ooo_tx_pkts(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_eth_dev *ethdev = cp->ethdev; + struct drv_ctl_info info; + + info.cmd = DRV_CTL_COMP_OOO_TX_PKTS; + return ethdev->drv_ctl(dev->netdev, &info); +} +#endif + static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid) { u32 i; - if (cp->ctx_tbl == NULL) - return -ENODEV; + if (!cp->ctx_tbl) + return -EINVAL; - for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) { + for (i = 0; i < cp->max_cid_space; i++) { if (cp->ctx_tbl[i].cid == cid) { *l5_cid = i; return 0; @@ -286,12 +534,6 @@ static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid) return -EINVAL; } - -static int cnic_in_use(struct cnic_sock *csk) -{ - return (test_bit(SK_F_INUSE, &csk->flags)); -} - static int cnic_offld_prep(struct cnic_sock *csk) { if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags)) @@ -348,15 +590,21 @@ int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops) { struct cnic_dev *dev; - if (ulp_type >= MAX_CNIC_ULP_TYPE) { - printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n", - ulp_type); + if (ulp_ops->version != CNIC_ULP_OPS_VER) { + printk(KERN_WARNING PFX "ulp %x not compatible with cnic, " + "expecting: 0x%x got: 0x%x\n", ulp_type, + CNIC_ULP_OPS_VER, ulp_ops->version); + return -EINVAL; + } + + if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) { + printk(KERN_ERR "Bad type %d\n", ulp_type); return -EINVAL; } mutex_lock(&cnic_lock); if (cnic_ulp_tbl[ulp_type]) { - printk(KERN_ERR PFX "cnic_register_driver: Type %d has already " - "been registered\n", ulp_type); + printk(KERN_ERR "Type %d has already been registered\n", + ulp_type); mutex_unlock(&cnic_lock); return -EBUSY; } @@ -402,16 +650,14 @@ int cnic_unregister_driver(int ulp_type) struct cnic_ulp_ops *ulp_ops; int i = 0; - if (ulp_type >= MAX_CNIC_ULP_TYPE) { - printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n", - ulp_type); + if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) { + printk(KERN_ERR "Bad type %d\n", ulp_type); return -EINVAL; } mutex_lock(&cnic_lock); ulp_ops = cnic_ulp_tbl[ulp_type]; if (!ulp_ops) { - printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not " - "been registered\n", ulp_type); + printk(KERN_ERR "Type %d has not been registered\n", ulp_type); goto out_unlock; } #if !defined (__VMKLNX__) @@ -421,8 +667,8 @@ int cnic_unregister_driver(int ulp_type) struct cnic_local *cp = dev->cnic_priv; if (rcu_dereference(cp->ulp_ops[ulp_type])) { - printk(KERN_ERR PFX "cnic_unregister_driver: Type %d " - "still has devices registered\n", ulp_type); + CNIC_ERR("Type %d still has devices registered\n", + ulp_type); #if !defined (__VMKLNX__) read_unlock(&cnic_dev_lock); #endif /* !defined (__VMKLNX__) */ @@ -469,8 +715,7 @@ static int cnic_register_netdev(struct cnic_dev *dev) err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev); if (err) - printk(KERN_ERR PFX "%s: register_cnic failed\n", - dev->netdev->name); + CNIC_ERR("register_cnic failed\n"); return err; } @@ -496,21 +741,20 @@ static int cnic_register_device(struct cnic_dev *dev, int ulp_type, struct cnic_local *cp = dev->cnic_priv; struct cnic_ulp_ops *ulp_ops; - if (ulp_type >= MAX_CNIC_ULP_TYPE) { - printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n", - ulp_type); + if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) { + CNIC_ERR("Bad type %d\n", ulp_type); return -EINVAL; } mutex_lock(&cnic_lock); if (cnic_ulp_tbl[ulp_type] == NULL) { - printk(KERN_ERR PFX "cnic_register_device: Driver with type %d " - "has not been registered\n", ulp_type); + CNIC_ERR("Driver with type %d has not been registered\n", + ulp_type); mutex_unlock(&cnic_lock); return -EAGAIN; } if (rcu_dereference(cp->ulp_ops[ulp_type])) { - printk(KERN_ERR PFX "cnic_register_device: Type %d has already " - "been registered to this device\n", ulp_type); + CNIC_ERR("Type %d has already been registered to this device\n", + ulp_type); mutex_unlock(&cnic_lock); return -EBUSY; } @@ -534,6 +778,8 @@ static int cnic_register_device(struct cnic_dev *dev, int ulp_type, mutex_unlock(&cnic_lock); + cnic_ulp_ctl(dev, ulp_type, true); + return 0; } @@ -543,9 +789,8 @@ static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type) struct cnic_local *cp = dev->cnic_priv; int i = 0; - if (ulp_type >= MAX_CNIC_ULP_TYPE) { - printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n", - ulp_type); + if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) { + CNIC_ERR("Bad type %d\n", ulp_type); return -EINVAL; } mutex_lock(&cnic_lock); @@ -554,13 +799,16 @@ static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type) rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL); cnic_put(dev); } else { - printk(KERN_ERR PFX "cnic_unregister_device: device not " - "registered to this ulp type %d\n", ulp_type); + CNIC_ERR("device not registered to this ulp type %d\n", + ulp_type); mutex_unlock(&cnic_lock); return -EINVAL; } mutex_unlock(&cnic_lock); + if (ulp_type == CNIC_ULP_FCOE) + dev->fcoe_cap = NULL; + synchronize_rcu(); while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) && @@ -572,6 +820,8 @@ static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type) printk(KERN_WARNING PFX "%s: Failed waiting for ULP up call" " to complete.\n", dev->netdev->name); + cnic_ulp_ctl(dev, ulp_type, false); + return 0; } @@ -662,13 +912,13 @@ static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma) static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma) { int i; - u32 *page_table = dma->pgtbl; + __le32 *page_table = (__le32 *) dma->pgtbl; for (i = 0; i < dma->num_pages; i++) { /* Each entry needs to be in big endian format. */ - *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32); + *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32); page_table++; - *page_table = (u32) dma->pg_map_arr[i]; + *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff); page_table++; } } @@ -676,13 +926,13 @@ static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma) static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma) { int i; - u32 *page_table = dma->pgtbl; + __le32 *page_table = (__le32 *) dma->pgtbl; for (i = 0; i < dma->num_pages; i++) { /* Each entry needs to be in little endian format. */ - *page_table = dma->pg_map_arr[i] & 0xffffffff; + *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff); page_table++; - *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32); + *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32); page_table++; } } @@ -727,7 +977,7 @@ error: return -ENOMEM; } -static void cnic_free_contex(struct cnic_dev *dev) +static void cnic_free_context(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; int i; @@ -746,21 +996,28 @@ static void cnic_free_resc(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; - cnic_free_contex(dev); +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_free_ooo_resc(dev); +#endif + cnic_free_context(dev); kfree(cp->ctx_arr); cp->ctx_arr = NULL; cp->ctx_blks = 0; cnic_free_dma(dev, &cp->gbl_buf_info); +#if (NEW_BNX2X_HSI <= 60) cnic_free_dma(dev, &cp->conn_buf_info); +#endif cnic_free_dma(dev, &cp->kwq_info); cnic_free_dma(dev, &cp->kwq_16_data_info); - cnic_free_dma(dev, &cp->kcq_info); + cnic_free_dma(dev, &cp->kcq2.dma); + cnic_free_dma(dev, &cp->kcq1.dma); kfree(cp->iscsi_tbl); cp->iscsi_tbl = NULL; kfree(cp->ctx_tbl); cp->ctx_tbl = NULL; + cnic_free_id_tbl(&cp->fcoe_cid_tbl); cnic_free_id_tbl(&cp->cid_tbl); } @@ -775,12 +1032,10 @@ static int cnic_alloc_context(struct cnic_dev *dev) cp->cids_per_blk = BCM_PAGE_SIZE / 128; arr_size = BNX2_MAX_CID / cp->cids_per_blk * sizeof(struct cnic_ctx); - cp->ctx_arr = kmalloc(arr_size, GFP_KERNEL); + cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL); if (cp->ctx_arr == NULL) return -ENOMEM; - memset(cp->ctx_arr, 0, arr_size); - k = 0; for (i = 0; i < 2; i++) { u32 j, reg, off, lo, hi; @@ -814,25 +1069,112 @@ static int cnic_alloc_context(struct cnic_dev *dev) return 0; } +static u16 cnic_bnx2_next_idx(u16 idx) +{ + return idx + 1; +} + +static u16 cnic_bnx2_hw_idx(u16 idx) +{ + return idx; +} + +static u16 cnic_bnx2x_next_idx(u16 idx) +{ + idx++; + if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT) + idx++; + + return idx; +} + +static u16 cnic_bnx2x_hw_idx(u16 idx) +{ + if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT) + idx++; + return idx; +} + +static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info, + int use_pg_tbl) +{ + int err, i; + struct kcqe **kcq; + + err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, use_pg_tbl); + if (err) + return err; + + kcq = (struct kcqe **) info->dma.pg_arr; + info->kcq = kcq; + + info->next_idx = cnic_bnx2_next_idx; + info->hw_idx = cnic_bnx2_hw_idx; + if (use_pg_tbl) + return 0; + + info->next_idx = cnic_bnx2x_next_idx; + info->hw_idx = cnic_bnx2x_hw_idx; + + for (i = 0; i < KCQ_PAGE_CNT; i++) { + struct bnx2x_bd_chain_next *next = + (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT]; + int j = i + 1; + + if (j >= KCQ_PAGE_CNT) + j = 0; + next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32; + next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff; + } + return 0; +} + static int cnic_alloc_bnx2_resc(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; - int ret; + int i, ret = 0; + + cp->max_cid_space = MAX_ISCSI_TBL_SZ; + + cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ, + GFP_KERNEL); + if (!cp->iscsi_tbl) { + CNIC_ERR("failed to allocate iscsi_tbl\n"); + goto error; + } + + cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) * cp->max_cid_space, + GFP_KERNEL); + if (!cp->ctx_tbl) { + CNIC_ERR("failed to allocate ctx_arr\n"); + goto error; + } + + for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) { + cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i]; + cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI; + } ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1); - if (ret) + if (ret) { + CNIC_ERR("failed to allocate kwq\n"); goto error; + } cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr; - ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1); + ret = cnic_alloc_kcq(dev, &cp->kcq1, 1); if (ret) goto error; - cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr; ret = cnic_alloc_context(dev); - if (ret) + if (ret) { + CNIC_ERR("failed to allocate kcq\n"); goto error; + } +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_alloc_bnx2_ooo_resc(dev); +#endif return 0; error: @@ -846,26 +1188,31 @@ static int cnic_alloc_bnx2x_context(struct cnic_dev *dev) int ctx_blk_size = cp->ethdev->ctx_blk_size; int total_mem, blks, i; - total_mem = BNX2X_ISCSI_CONTEXT_MEM_SIZE * MAX_ISCSI_TBL_SZ; + total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space; blks = total_mem / ctx_blk_size; if (total_mem % ctx_blk_size) blks++; - if (blks > cp->ethdev->ctx_tbl_len) + if (blks > cp->ethdev->ctx_tbl_len) { + CNIC_ERR("blks(%d) > cp->ethdev->ctx_tbl_len(%d)\n", + blks, cp->ethdev->ctx_tbl_len); return -ENOMEM; + } - cp->ctx_arr = kzalloc(blks * sizeof(struct cnic_ctx), GFP_KERNEL); - if (cp->ctx_arr == NULL) + cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL); + if (cp->ctx_arr == NULL) { + CNIC_ERR("failed to allocate ctx_arr\n"); return -ENOMEM; + } cp->ctx_blks = blks; cp->ctx_blk_size = ctx_blk_size; - if (BNX2X_CHIP_IS_E1H(cp->chip_id)) + if (!BNX2X_CHIP_IS_57710(cp->chip_id)) cp->ctx_align = 0; else cp->ctx_align = ctx_blk_size; - cp->cids_per_blk = ctx_blk_size / BNX2X_ISCSI_CONTEXT_MEM_SIZE; + cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE; for (i = 0; i < blks; i++) { cp->ctx_arr[i].ctx = @@ -876,7 +1223,7 @@ static int cnic_alloc_bnx2x_context(struct cnic_dev *dev) if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) { if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) { - cnic_free_contex(dev); + cnic_free_context(dev); cp->ctx_blk_size += cp->ctx_align; i = -1; continue; @@ -889,33 +1236,73 @@ static int cnic_alloc_bnx2x_context(struct cnic_dev *dev) static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; + struct cnic_eth_dev *ethdev = cp->ethdev; + u32 start_cid = ethdev->starting_cid; int i, j, n, ret, pages; struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info; + +#if (NEW_BNX2X_HSI >= 60) + if (BNX2X_CHIP_IS_57710(cp->chip_id)) + cp->iro_arr = e1_iro_arr; + else if (BNX2X_CHIP_IS_E1H(cp->chip_id)) + cp->iro_arr = e1h_iro_arr; + else if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) + cp->iro_arr = e2_iro_arr; +#endif + + cp->max_cid_space = MAX_ISCSI_TBL_SZ; + cp->iscsi_start_cid = start_cid; + cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ; + + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) { + cp->max_cid_space += dev->max_fcoe_conn; + cp->fcoe_init_cid = ethdev->fcoe_init_cid; + if (!cp->fcoe_init_cid) + cp->fcoe_init_cid = 0x10; + } + + if (start_cid < BNX2X_ISCSI_START_CID) { + u32 delta = BNX2X_ISCSI_START_CID - start_cid; + + cp->iscsi_start_cid = BNX2X_ISCSI_START_CID; + cp->fcoe_start_cid += delta; + cp->max_cid_space += delta; + } + cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ, GFP_KERNEL); - if (!cp->iscsi_tbl) + if (!cp->iscsi_tbl) { + CNIC_ERR("failed to allocate iscsi_tbl\n"); goto error; + } cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) * - MAX_CNIC_L5_CONTEXT, GFP_KERNEL); - if (!cp->ctx_tbl) + cp->max_cid_space, GFP_KERNEL); + if (!cp->ctx_tbl) { + CNIC_ERR("failed to allocate ctx_tbl\n"); goto error; + } for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) { cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i]; cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI; } - pages = PAGE_ALIGN(MAX_CNIC_L5_CONTEXT * CNIC_KWQ16_DATA_SIZE) / + for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++) + cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE; + + pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) / PAGE_SIZE; ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0); - if (ret) + if (ret) { + CNIC_ERR("failed to allocate kwq\n"); return -ENOMEM; + } n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE; - for (i = 0, j = 0; i < MAX_ISCSI_TBL_SZ; i++) { + for (i = 0, j = 0; i < cp->max_cid_space; i++) { long off = CNIC_KWQ16_DATA_SIZE * (i % n); cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off; @@ -926,38 +1313,46 @@ static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev) j++; } - ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 0); - if (ret) + ret = cnic_alloc_kcq(dev, &cp->kcq1, 0); + + if (ret) { + CNIC_ERR("failed to allocate kcq\n"); goto error; - cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr; - - for (i = 0; i < KCQ_PAGE_CNT; i++) { - struct bnx2x_bd_chain_next *next = - (struct bnx2x_bd_chain_next *) - &cp->kcq[i][MAX_KCQE_CNT]; - int j = i + 1; - - if (j >= KCQ_PAGE_CNT) - j = 0; - next->addr_hi = (u64) cp->kcq_info.pg_map_arr[j] >> 32; - next->addr_lo = cp->kcq_info.pg_map_arr[j] & 0xffffffff; } + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) { +#if (NEW_BNX2X_HSI >= 64) + ret = cnic_alloc_kcq(dev, &cp->kcq2, 1); +#else + ret = cnic_alloc_kcq(dev, &cp->kcq2, 0); +#endif + + if (ret) + goto error; + } + +#if (NEW_BNX2X_HSI <= 60) pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS * BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE; ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1); if (ret) goto error; +#endif pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE; ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0); - if (ret) + if (ret) { + CNIC_ERR("failed to allocate gbl_buf_info\n"); goto error; + } ret = cnic_alloc_bnx2x_context(dev); if (ret) goto error; +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_alloc_bnx2x_ooo_resc(dev); +#endif return 0; error: @@ -967,8 +1362,8 @@ error: static inline u32 cnic_kwq_avail(struct cnic_local *cp) { - return (cp->max_kwq_idx - - ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx)); + return cp->max_kwq_idx - + ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx); } static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[], @@ -977,23 +1372,41 @@ static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[], struct cnic_local *cp = dev->cnic_priv; struct kwqe *prod_qe; u16 prod, sw_prod, i; +#if (CNIC_ISCSI_OOO_SUPPORT) + u32 opcode; + struct kwqe *kwqe; +#endif if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) return -EAGAIN; /* bnx2 is down */ spin_lock_bh(&cp->cnic_ulp_lock); if (num_wqes > cnic_kwq_avail(cp) && - !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) { + !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) { spin_unlock_bh(&cp->cnic_ulp_lock); return -EAGAIN; } - cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT; + clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags); prod = cp->kwq_prod_idx; sw_prod = prod & MAX_KWQ_IDX; for (i = 0; i < num_wqes; i++) { prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)]; +#if (CNIC_ISCSI_OOO_SUPPORT) + kwqe = wqes[i]; + opcode = KWQE_OPCODE(kwqe->kwqe_op_flag); + switch (opcode) { + case ISCSI_KWQE_OPCODE_UPDATE_CONN: + cnic_bnx2_ooo_iscsi_conn_update(dev, kwqe); + break; + case ISCSI_KWQE_OPCODE_DESTROY_CONN: + cnic_bnx2_ooo_iscsi_destroy(dev, kwqe); + break; + default: + break; + } +#endif memcpy(prod_qe, wqes[i], sizeof(struct kwqe)); prod++; sw_prod = prod & MAX_KWQ_IDX; @@ -1024,17 +1437,27 @@ static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid, struct cnic_local *cp = dev->cnic_priv; struct l5cm_spe kwqe; struct kwqe_16 *kwq[1]; + u16 type_16; int ret; kwqe.hdr.conn_and_cmd_data = - cpu_to_le32((cmd << SPE_HDR_CMD_ID_SHIFT) | - BNX2X_HW_CID(cp, cid)); - kwqe.hdr.type = cpu_to_le16(type); + cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) | + BNX2X_HW_CID(cp, cid))); +#if (NEW_BNX2X_HSI >= 60) + type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE; + type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) & + SPE_HDR_FUNCTION_ID; +#else + type_16 = type; +#endif + + kwqe.hdr.type = cpu_to_le16(type_16); kwqe.hdr.reserved1 = 0; kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo); kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi); kwq[0] = (struct kwqe_16 *) &kwqe; + spin_lock_bh(&cp->cnic_ulp_lock); ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1); spin_unlock_bh(&cp->cnic_ulp_lock); @@ -1044,7 +1467,7 @@ static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid, if (ret == 1) return 0; - return -EBUSY; + return ret; } static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type, @@ -1196,8 +1619,11 @@ static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid) cnic_free_dma(dev, &iscsi->hq_info); cnic_free_dma(dev, &iscsi->r2tq_info); cnic_free_dma(dev, &iscsi->task_array_info); + cnic_free_id(&cp->cid_tbl, ctx->cid); + } else { + cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid); } - cnic_free_id(&cp->cid_tbl, ctx->cid); + ctx->cid = 0; } @@ -1209,8 +1635,20 @@ static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid) struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; struct cnic_iscsi *iscsi = ctx->proto.iscsi; + if (ctx->ulp_proto_id == CNIC_ULP_FCOE) { + cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl); + if (cid == -1) { + CNIC_ERR("failed to allocate new id\n"); + ret = -ENOMEM; + goto error; + } + ctx->cid = cid; + return 0; + } + cid = cnic_alloc_new_id(&cp->cid_tbl); if (cid == -1) { + CNIC_ERR("failed to allocate new id\n"); ret = -ENOMEM; goto error; } @@ -1239,9 +1677,8 @@ error: return ret; } -static struct iscsi_context *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, - int init, - struct regpair *ctx_addr) +static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init, + struct regpair *ctx_addr) { struct cnic_local *cp = dev->cnic_priv; struct cnic_eth_dev *ethdev = cp->ethdev; @@ -1249,7 +1686,7 @@ static struct iscsi_context *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int off = (cid - ethdev->starting_cid) % cp->cids_per_blk; unsigned long align_off = 0; dma_addr_t ctx_map; - struct iscsi_context *ctx; + void *ctx; if (cp->ctx_align) { unsigned long mask = cp->ctx_align - 1; @@ -1259,11 +1696,11 @@ static struct iscsi_context *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, (cp->ctx_arr[blk].mapping & mask); } ctx_map = cp->ctx_arr[blk].mapping + align_off + - (off * BNX2X_ISCSI_CONTEXT_MEM_SIZE); - ctx = (struct iscsi_context *) (cp->ctx_arr[blk].ctx + align_off + - (off * BNX2X_ISCSI_CONTEXT_MEM_SIZE)); + (off * BNX2X_CONTEXT_MEM_SIZE); + ctx = cp->ctx_arr[blk].ctx + align_off + + (off * BNX2X_CONTEXT_MEM_SIZE); if (init) - memset(ctx, 0, sizeof(*ctx)); + memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE); ctx_addr->lo = ctx_map & 0xffffffff; ctx_addr->hi = (u64) ctx_map >> 32; @@ -1286,6 +1723,9 @@ static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[], struct iscsi_context *ictx; struct regpair context_addr; int i, j, n = 2, n_max; +#if (NEW_BNX2X_HSI >= 64) + u8 port = CNIC_PORT(cp); +#endif ctx->ctx_flags = 0; if (!req2->num_additional_wqes) @@ -1333,12 +1773,24 @@ static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[], (u64) iscsi->task_array_info.pgtbl_map >> 32; ictx->xstorm_st_context.iscsi.task_pbl_cache_idx = BNX2X_ISCSI_PBL_NOT_CACHED; -/* ictx->xstorm_st_context.iscsi.max_outstanding_r2ts = - ISCSI_DEFAULT_MAX_OUTSTANDING_R2T;*/ ictx->xstorm_st_context.iscsi.flags.flags |= XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA; ictx->xstorm_st_context.iscsi.flags.flags |= XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T; +#if (NEW_BNX2X_HSI >= 64) + ictx->xstorm_st_context.common.ethernet.reserved_vlan_type = + ETH_P_8021Q; + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) && + cp->port_mode == CHIP_2_PORT_MODE) { + + port = 0; + } +#if (NEW_BNX2X_HSI == 64) + ictx->xstorm_st_context.common.tx_switching = + (1 << XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT) | + (port << XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT); +#endif +#endif ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE; /* TSTORM requires the base address of RQ DB & not PTE */ @@ -1350,11 +1802,11 @@ static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[], ictx->tstorm_st_context.tcp.cwnd = 0x5A8; ictx->tstorm_st_context.tcp.flags2 |= TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN; - -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) ictx->tstorm_st_context.tcp.ooo_support_mode = TCP_TSTORM_OOO_DROP_AND_PROC_ACK; #endif + ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG; ictx->ustorm_st_context.ring.rq.pbl_base.lo = @@ -1512,7 +1964,7 @@ static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[], done: cqes[0] = (struct kcqe *) &kcqe; cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1); - return ret; + return 0; } @@ -1533,6 +1985,9 @@ static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe) if (!data) return -ENOMEM; +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_bnx2x_ooo_iscsi_conn_update(dev, kwqe); +#endif memcpy(data, kwqe, sizeof(struct kwqe)); ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN, @@ -1552,21 +2007,25 @@ static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid) ctx->wait_cond = 0; memset(&l5_data, 0, sizeof(l5_data)); hw_cid = BNX2X_HW_CID(cp, ctx->cid); - type = (NONE_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT) - & SPE_HDR_CONN_TYPE; - type |= ((cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) & - SPE_HDR_FUNCTION_ID); +#if (NEW_BNX2X_HSI >= 60) + type = NONE_CONNECTION_TYPE; ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL, hw_cid, type, &l5_data); +#else + type = ETH_CONNECTION_TYPE | (1 << SPE_HDR_COMMON_RAMROD_SHIFT); + + ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL, + hw_cid, type, &l5_data); +#endif if (ret == 0) { - wait_event_timeout(ctx->waitq, ctx->wait_cond, (HZ / 4)); + wait_event_timeout(ctx->waitq, ctx->wait_cond, BNX2X_RAMROD_TO); if (unlikely(test_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags))) return -EBUSY; } - return ret; + return 0; } static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe) @@ -1581,7 +2040,7 @@ static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe) struct kcqe *cqes[1]; if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) - goto skip_cfc_delete; + goto skip_cfc_delete; if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) { unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies; @@ -1595,6 +2054,7 @@ static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe) } ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid); + skip_cfc_delete: cnic_free_bnx2x_conn_resc(dev, l5_cid); @@ -1613,7 +2073,7 @@ destroy_reply: cqes[0] = (struct kcqe *) &kcqe; cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1); - return ret; + return 0; } static void cnic_init_storm_conn_bufs(struct cnic_dev *dev, @@ -1660,8 +2120,10 @@ static void cnic_init_storm_conn_bufs(struct cnic_dev *dev, tstorm_buf->ka_interval = kwqe3->ka_interval; tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count; } +#if (NEW_BNX2X_HSI <= 60) tstorm_buf->rcv_buf = kwqe3->rcv_buf; tstorm_buf->snd_buf = kwqe3->snd_buf; +#endif tstorm_buf->max_rt_time = 0xffffffff; } @@ -1669,6 +2131,11 @@ static void cnic_init_bnx2x_mac(struct cnic_dev *dev, u8 *mac) { struct cnic_local *cp = dev->cnic_priv; u32 pfid = cp->pfid; + memcpy(cp->ethdev->iscsi_mac, mac, 6); + + if (cp->ethdev->mf_mode == MULTI_FUNCTION_SI || + cp->ethdev->mf_mode == MULTI_FUNCTION_AFEX) + cnic_npar_ring_ctl(dev, 1); CNIC_WR8(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]); @@ -1688,6 +2155,18 @@ static void cnic_init_bnx2x_mac(struct cnic_dev *dev, u8 *mac) CNIC_WR8(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1, mac[4]); +#if (NEW_BNX2X_HSI >= 64) + CNIC_WR8(dev, BAR_TSTRORM_INTMEM + + TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]); + CNIC_WR8(dev, BAR_TSTRORM_INTMEM + + TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid) + 1, + mac[2]); + CNIC_WR8(dev, BAR_TSTRORM_INTMEM + + TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[1]); + CNIC_WR8(dev, BAR_TSTRORM_INTMEM + + TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1, + mac[0]); +#else CNIC_WR8(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]); CNIC_WR8(dev, BAR_TSTRORM_INTMEM + @@ -1699,6 +2178,7 @@ static void cnic_init_bnx2x_mac(struct cnic_dev *dev, u8 *mac) CNIC_WR8(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 3, mac[0]); +#endif } static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts) @@ -1732,9 +2212,6 @@ static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[], u32 l5_cid = kwqe1->pg_cid; struct cnic_sock *csk = &cp->csk_tbl[l5_cid]; struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; -#if !defined (__VMKLNX__) - struct neighbour *neigh = csk->dst->neighbour; -#endif /* !defined (__VMKLNX__) */ int ret; if (num < 2) { @@ -1753,8 +2230,7 @@ static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[], } if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) { - printk(KERN_ERR PFX "%s: conn_buf size too big\n", - dev->netdev->name); + CNIC_ERR("conn_buf size too big\n"); return -ENOMEM; } conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data); @@ -1764,7 +2240,6 @@ static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[], memset(conn_buf, 0, sizeof(*conn_buf)); conn_addr = &conn_buf->conn_addr_buf; -#if defined (__VMKLNX__) conn_addr->remote_addr_0 = csk->ha[0]; conn_addr->remote_addr_1 = csk->ha[1]; conn_addr->remote_addr_2 = csk->ha[2]; @@ -1772,16 +2247,9 @@ static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[], conn_addr->remote_addr_4 = csk->ha[4]; conn_addr->remote_addr_5 = csk->ha[5]; - +#if defined (__VMKLNX__) /* Use the stored MAC address */ cnic_init_bnx2x_mac(dev, cp->srcMACAddr); -#else /* !defined (__VMKLNX__) */ - conn_addr->remote_addr_0 = neigh->ha[0]; - conn_addr->remote_addr_1 = neigh->ha[1]; - conn_addr->remote_addr_2 = neigh->ha[2]; - conn_addr->remote_addr_3 = neigh->ha[3]; - conn_addr->remote_addr_4 = neigh->ha[4]; - conn_addr->remote_addr_5 = neigh->ha[5]; #endif /* defined (__VMKLNX__) */ if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) { @@ -1874,12 +2342,322 @@ static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe) return 0; } +static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe) +{ + struct fcoe_kwqe_stat *req; + struct fcoe_stat_ramrod_params *fcoe_stat; + union l5cm_specific_data l5_data; + struct cnic_local *cp = dev->cnic_priv; + int ret; + u32 cid; + + req = (struct fcoe_kwqe_stat *) kwqe; + cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid); + + fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data); + if (!fcoe_stat) + return -ENOMEM; + + memset(fcoe_stat, 0, sizeof(*fcoe_stat)); + memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req)); + +#if (NEW_BNX2X_HSI >= 64) + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT_FUNC, cid, + FCOE_CONNECTION_TYPE, &l5_data); +#else + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT, cid, + FCOE_CONNECTION_TYPE, &l5_data); +#endif + return ret; +} + +static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[], + u32 num, int *work) +{ + int ret; + struct cnic_local *cp = dev->cnic_priv; + u32 cid; + struct fcoe_init_ramrod_params *fcoe_init; + struct fcoe_kwqe_init1 *req1; + struct fcoe_kwqe_init2 *req2; + struct fcoe_kwqe_init3 *req3; + union l5cm_specific_data l5_data; + + if (num < 3) { + *work = num; + return -EINVAL; + } + req1 = (struct fcoe_kwqe_init1 *) wqes[0]; + req2 = (struct fcoe_kwqe_init2 *) wqes[1]; + req3 = (struct fcoe_kwqe_init3 *) wqes[2]; + if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) { + *work = 1; + return -EINVAL; + } + if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) { + *work = 2; + return -EINVAL; + } + + if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) { + printk(KERN_ERR PFX "%s: fcoe_init size too big\n", + dev->netdev->name); + return -ENOMEM; + } + fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data); + if (!fcoe_init) + return -ENOMEM; + + memset(fcoe_init, 0, sizeof(*fcoe_init)); + memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1)); + memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2)); + memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3)); +#if (NEW_BNX2X_HSI >= 64) + fcoe_init->eq_pbl_base.lo = cp->kcq2.dma.pgtbl_map & 0xffffffff; + fcoe_init->eq_pbl_base.hi = (u64) cp->kcq2.dma.pgtbl_map >> 32; + fcoe_init->eq_pbl_size = cp->kcq2.dma.num_pages; +#else + fcoe_init->eq_addr.lo = cp->kcq2.dma.pg_map_arr[0] & 0xffffffff; + fcoe_init->eq_addr.hi = (u64) cp->kcq2.dma.pg_map_arr[0] >> 32; + fcoe_init->eq_next_page_addr.lo = + cp->kcq2.dma.pg_map_arr[1] & 0xffffffff; + fcoe_init->eq_next_page_addr.hi = + (u64) cp->kcq2.dma.pg_map_arr[1] >> 32; +#endif + + fcoe_init->sb_num = cp->status_blk_num; + fcoe_init->eq_prod = MAX_KCQ_IDX; +#if (NEW_BNX2X_HSI >= 60) + fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS; +#else + fcoe_init->sb_id = HC_INDEX_U_FCOE_EQ_CONS; +#endif + cp->kcq2.sw_prod_idx = 0; + + cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid); + printk(KERN_ERR "bdbg: submitting INIT RAMROD \n"); +#if (NEW_BNX2X_HSI >= 64) + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT_FUNC, cid, + FCOE_CONNECTION_TYPE, &l5_data); +#else + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT, cid, + FCOE_CONNECTION_TYPE, &l5_data); +#endif + *work = 3; + return ret; +} + +static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[], + u32 num, int *work) +{ + int ret = 0; + u32 cid = -1, l5_cid; + struct cnic_local *cp = dev->cnic_priv; + struct fcoe_kwqe_conn_offload1 *req1; + struct fcoe_kwqe_conn_offload2 *req2; + struct fcoe_kwqe_conn_offload3 *req3; + struct fcoe_kwqe_conn_offload4 *req4; + struct fcoe_conn_offload_ramrod_params *fcoe_offload; + struct cnic_context *ctx; + struct fcoe_context *fctx; + struct regpair ctx_addr; + union l5cm_specific_data l5_data; + struct fcoe_kcqe kcqe; + struct kcqe *cqes[1]; + + if (num < 4) { + *work = num; + return -EINVAL; + } + req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0]; + req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1]; + req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2]; + req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3]; + + *work = 4; + + l5_cid = req1->fcoe_conn_id; + if (l5_cid >= dev->max_fcoe_conn) + goto err_reply; + + l5_cid += BNX2X_FCOE_L5_CID_BASE; + + ctx = &cp->ctx_tbl[l5_cid]; + if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) + goto err_reply; + + ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid); + if (ret) { + ret = 0; + goto err_reply; + } + cid = ctx->cid; + + fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr); + if (fctx) { + u32 hw_cid = BNX2X_HW_CID(cp, cid); + u32 val; + + val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG, + FCOE_CONNECTION_TYPE); + fctx->xstorm_ag_context.cdu_reserved = val; + val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG, + FCOE_CONNECTION_TYPE); + fctx->ustorm_ag_context.cdu_usage = val; + } + if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) { + printk(KERN_ERR PFX "%s: fcoe_offload size too big\n", + dev->netdev->name); + goto err_reply; + } + fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data); + if (!fcoe_offload) + goto err_reply; + + memset(fcoe_offload, 0, sizeof(*fcoe_offload)); + memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1)); + memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2)); + memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3)); + memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4)); + + cid = BNX2X_HW_CID(cp, cid); + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid, + FCOE_CONNECTION_TYPE, &l5_data); + if (!ret) + set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags); + + return ret; + +err_reply: + if (cid != -1) + cnic_free_bnx2x_conn_resc(dev, l5_cid); + + memset(&kcqe, 0, sizeof(kcqe)); + kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN; + kcqe.fcoe_conn_id = req1->fcoe_conn_id; + kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE; + + cqes[0] = (struct kcqe *) &kcqe; + cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1); + return ret; +} + +static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe) +{ + struct fcoe_kwqe_conn_enable_disable *req; + struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable; + union l5cm_specific_data l5_data; + int ret; + u32 cid, l5_cid; + struct cnic_local *cp = dev->cnic_priv; + + req = (struct fcoe_kwqe_conn_enable_disable *) kwqe; + cid = req->context_id; + l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE; + + if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) { + printk(KERN_ERR PFX "%s: fcoe_enable size too big\n", + dev->netdev->name); + return -ENOMEM; + } + fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data); + if (!fcoe_enable) + return -ENOMEM; + + memset(fcoe_enable, 0, sizeof(*fcoe_enable)); + memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req)); + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid, + FCOE_CONNECTION_TYPE, &l5_data); + return ret; +} + +static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe) +{ + struct fcoe_kwqe_conn_enable_disable *req; + struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable; + union l5cm_specific_data l5_data; + int ret; + u32 cid, l5_cid; + struct cnic_local *cp = dev->cnic_priv; + + req = (struct fcoe_kwqe_conn_enable_disable *) kwqe; + cid = req->context_id; + l5_cid = req->conn_id; + if (l5_cid >= dev->max_fcoe_conn) + return -EINVAL; + + l5_cid += BNX2X_FCOE_L5_CID_BASE; + + if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) { + printk(KERN_ERR PFX "%s: fcoe_disable size too big\n", + dev->netdev->name); + return -ENOMEM; + } + fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data); + if (!fcoe_disable) + return -ENOMEM; + + memset(fcoe_disable, 0, sizeof(*fcoe_disable)); + memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req)); + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid, + FCOE_CONNECTION_TYPE, &l5_data); + return ret; +} + +static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe) +{ + struct fcoe_kwqe_conn_destroy *req; + union l5cm_specific_data l5_data; + int ret; + u32 cid, l5_cid; + struct cnic_local *cp = dev->cnic_priv; + struct cnic_context *ctx; + struct fcoe_kcqe kcqe; + struct kcqe *cqes[1]; + + req = (struct fcoe_kwqe_conn_destroy *) kwqe; + cid = req->context_id; + l5_cid = req->conn_id; + if (l5_cid >= dev->max_fcoe_conn) + return -EINVAL; + + l5_cid += BNX2X_FCOE_L5_CID_BASE; + + ctx = &cp->ctx_tbl[l5_cid]; + + init_waitqueue_head(&ctx->waitq); + ctx->wait_cond = 0; + + memset(&kcqe, 0, sizeof(kcqe)); + kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_ERROR; + memset(&l5_data, 0, sizeof(l5_data)); + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid, + FCOE_CONNECTION_TYPE, &l5_data); + if (ret == 0) { + wait_event_timeout(ctx->waitq, ctx->wait_cond, BNX2X_RAMROD_TO); + if (ctx->wait_cond) + kcqe.completion_status = 0; + } + set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags); + //queue_delayed_work(cnic_wq, &cp->delete_task, // Anil + schedule_delayed_work(&cp->delete_task, + msecs_to_jiffies(2000)); + + kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN; + kcqe.fcoe_conn_id = req->conn_id; + kcqe.fcoe_conn_context_id = cid; + + cqes[0] = (struct kcqe *) &kcqe; + cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1); + return ret; +} + static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid) { struct cnic_local *cp = dev->cnic_priv; u32 i; - for (i = start_cid; i < MAX_ISCSI_TBL_SZ; i++) { + for (i = start_cid; i < cp->max_cid_space; i++) { struct cnic_context *ctx = &cp->ctx_tbl[i]; int j; @@ -1899,9 +2677,83 @@ static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid) } } +static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe) +{ + struct fcoe_kwqe_destroy *req; + union l5cm_specific_data l5_data; + struct cnic_local *cp = dev->cnic_priv; + int ret; + u32 cid; -static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[], - u32 num_wqes) + cnic_bnx2x_delete_wait(dev, MAX_ISCSI_TBL_SZ); + + req = (struct fcoe_kwqe_destroy *) kwqe; + cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid); + + memset(&l5_data, 0, sizeof(l5_data)); +#if (NEW_BNX2X_HSI >= 64) + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY_FUNC, cid, + FCOE_CONNECTION_TYPE, &l5_data); +#else + ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY, cid, + FCOE_CONNECTION_TYPE, &l5_data); +#endif + return ret; +} + +static void cnic_bnx2x_kwqe_err(struct cnic_dev *dev, struct kwqe *kwqe) +{ + struct cnic_local *cp = dev->cnic_priv; + struct kcqe kcqe; + struct kcqe *cqes[1]; + u32 cid; + u32 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag); + u32 layer_code = kwqe->kwqe_op_flag & KWQE_LAYER_MASK; + int ulp_type; + + cid = kwqe->kwqe_info0; + memset(&kcqe, 0, sizeof(kcqe)); + + if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_ISCSI) { + ulp_type = CNIC_ULP_ISCSI; + if (opcode == ISCSI_KWQE_OPCODE_UPDATE_CONN) + cid = kwqe->kwqe_info1; + + kcqe.kcqe_op_flag = (opcode + 0x10) << KCQE_FLAGS_OPCODE_SHIFT; + kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_ISCSI; + kcqe.kcqe_info1 = FCOE_KCQE_COMPLETION_STATUS_PARITY_ERROR; + kcqe.kcqe_info2 = cid; + cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &kcqe.kcqe_info0); + + } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L4) { + struct l4_kcq *l4kcqe = (struct l4_kcq *) &kcqe; + u32 kcqe_op; + + ulp_type = CNIC_ULP_L4; + if (opcode == L4_KWQE_OPCODE_VALUE_CONNECT1) + kcqe_op = L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE; + else if (opcode == L4_KWQE_OPCODE_VALUE_RESET) + kcqe_op = L4_KCQE_OPCODE_VALUE_RESET_COMP; + else if (opcode == L4_KWQE_OPCODE_VALUE_CLOSE) + kcqe_op = L4_KCQE_OPCODE_VALUE_CLOSE_COMP; + else + return; + + kcqe.kcqe_op_flag = (kcqe_op << KCQE_FLAGS_OPCODE_SHIFT) | + KCQE_FLAGS_LAYER_MASK_L4; + l4kcqe->status = L4_KCQE_COMPLETION_STATUS_PARITY_ERROR; + l4kcqe->cid = cid; + cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &l4kcqe->conn_id); + } else { + return; + } + + cqes[0] = (struct kcqe *) &kcqe; + cnic_reply_bnx2x_kcqes(dev, ulp_type, cqes, 1); +} + +static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev, + struct kwqe *wqes[], u32 num_wqes) { int i, work, ret; u32 opcode; @@ -1951,6 +2803,65 @@ static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[], case L4_KWQE_OPCODE_VALUE_UPLOAD_PG: ret = 0; break; + default: + ret = 0; + CNIC_ERR("Unknown type of KWQE(0x%x)\n", opcode); + break; + } + if (ret < 0) { + CNIC_ERR("KWQE(0x%x) failed\n", opcode); + + if (ret == -EIO || ret == -EAGAIN) + cnic_bnx2x_kwqe_err(dev, kwqe); + } + i += work; + } + return 0; +} + +static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev, + struct kwqe *wqes[], u32 num_wqes) +{ + struct cnic_local *cp = dev->cnic_priv; + int i, work, ret; + u32 opcode; + struct kwqe *kwqe; + + if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) + return -EAGAIN; /* bnx2 is down */ + + if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) + return -EINVAL; + + for (i = 0; i < num_wqes; ) { + kwqe = wqes[i]; + opcode = KWQE_OPCODE(kwqe->kwqe_op_flag); + work = 1; + + switch (opcode) { + case FCOE_KWQE_OPCODE_INIT1: + ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i], + num_wqes - i, &work); + break; + case FCOE_KWQE_OPCODE_OFFLOAD_CONN1: + ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i], + num_wqes - i, &work); + break; + case FCOE_KWQE_OPCODE_ENABLE_CONN: + ret = cnic_bnx2x_fcoe_enable(dev, kwqe); + break; + case FCOE_KWQE_OPCODE_DISABLE_CONN: + ret = cnic_bnx2x_fcoe_disable(dev, kwqe); + break; + case FCOE_KWQE_OPCODE_DESTROY_CONN: + ret = cnic_bnx2x_fcoe_destroy(dev, kwqe); + break; + case FCOE_KWQE_OPCODE_DESTROY: + ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe); + break; + case FCOE_KWQE_OPCODE_STAT: + ret = cnic_bnx2x_fcoe_stat(dev, kwqe); + break; default: ret = 0; printk(KERN_ERR PFX "%s: Unknown type of KWQE(0x%x)\n", @@ -1965,10 +2876,45 @@ static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[], return 0; } +static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[], + u32 num_wqes) +{ + int ret = -EINVAL; + u32 layer_code; + + if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) + return -EAGAIN; /* bnx2x is down */ + + if (!num_wqes) + return 0; + + layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK; + switch (layer_code) { + case KWQE_FLAGS_LAYER_MASK_L5_ISCSI: + case KWQE_FLAGS_LAYER_MASK_L4: + case KWQE_FLAGS_LAYER_MASK_L2: + ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes); + break; + + case KWQE_FLAGS_LAYER_MASK_L5_FCOE: + ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes); + break; + } + return ret; +} + +static inline u32 cnic_get_kcqe_layer_mask(u32 opflag) +{ + if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN)) + return KCQE_FLAGS_LAYER_MASK_L4; + + return opflag & KCQE_FLAGS_LAYER_MASK; +} + static void service_kcqes(struct cnic_dev *dev, int num_cqes) { struct cnic_local *cp = dev->cnic_priv; - int i, j; + int i, j, comp = 0; i = 0; j = 1; @@ -1976,19 +2922,19 @@ static void service_kcqes(struct cnic_dev *dev, int num_cqes) struct cnic_ulp_ops *ulp_ops; int ulp_type; u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag; - u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK; + u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag); if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION)) - cnic_kwq_completion(dev, 1); + comp++; while (j < num_cqes) { u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag; - if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer) + if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer) break; if (unlikely(next_op & KCQE_RAMROD_COMPLETION)) - cnic_kwq_completion(dev, 1); + comp++; j++; } @@ -1996,11 +2942,14 @@ static void service_kcqes(struct cnic_dev *dev, int num_cqes) ulp_type = CNIC_ULP_RDMA; else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI) ulp_type = CNIC_ULP_ISCSI; + else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE) + ulp_type = CNIC_ULP_FCOE; else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4) ulp_type = CNIC_ULP_L4; + else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2) + goto end; else { - printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n", - dev->netdev->name, kcqe_op_flag); + CNIC_ERR("Unknown type of KCQE(0x%x)\n", kcqe_op_flag); goto end; } @@ -2016,48 +2965,39 @@ end: i += j; j = 1; } + if (unlikely(comp)) + cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp); } -static u16 cnic_bnx2_next_idx(u16 idx) -{ - return (idx + 1); -} -static u16 cnic_bnx2_hw_idx(u16 idx) -{ - return idx; -} -static u16 cnic_bnx2x_next_idx(u16 idx) -{ - idx++; - if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT) - idx++; - - return idx; -} - -static u16 cnic_bnx2x_hw_idx(u16 idx) -{ - if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT) - idx++; - return idx; -} - -static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod) +static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info) { struct cnic_local *cp = dev->cnic_priv; - u16 i, ri, last; + u16 i, ri, hw_prod, last; struct kcqe *kcqe; int kcqe_cnt = 0, last_cnt = 0; + u32 kcq_diff; - i = ri = last = *sw_prod; + i = ri = last = info->sw_prod_idx; ri &= MAX_KCQ_IDX; + hw_prod = *info->hw_prod_idx_ptr; + hw_prod = info->hw_idx(hw_prod); + + if (unlikely(hw_prod < last)) + kcq_diff = (65536 + hw_prod) - last; + else + kcq_diff = hw_prod - last; + + if (unlikely(kcq_diff > MAX_KCQ_IDX)) + printk(KERN_WARNING PFX "%s: kcq abs(hw_prod(%d) - sw_prod(%d))" + " > MAX_KCQ_IDX(%lu)\n", dev->netdev->name, + hw_prod, last, (unsigned long) MAX_KCQ_IDX); while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) { - kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)]; + kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)]; cp->completed_kcq[kcqe_cnt++] = kcqe; - i = cp->next_idx(i); + i = info->next_idx(i); ri = i & MAX_KCQ_IDX; if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) { last_cnt = kcqe_cnt; @@ -2065,91 +3005,81 @@ static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod) } } - *sw_prod = last; + info->sw_prod_idx = last; return last_cnt; } -static int cnic_service_bnx2(void *data, void *status_blk) +static u32 cnic_service_bnx2_queues(struct cnic_dev *dev) { - struct cnic_dev *dev = data; - struct status_block *sblk = status_blk; struct cnic_local *cp = dev->cnic_priv; - u32 status_idx = sblk->status_idx; - u16 hw_prod, sw_prod; + u32 status_idx = (u16) *cp->kcq1.status_idx_ptr; int kcqe_cnt; - if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) - return status_idx; - + /* status block index must be read before reading other fields */ + rmb(); cp->kwq_con_idx = *cp->kwq_con_idx_ptr; - hw_prod = sblk->status_completion_producer_index; - sw_prod = cp->kcq_prod_idx; - while (sw_prod != hw_prod) { - kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod); - if (kcqe_cnt == 0) - goto done; + while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) { service_kcqes(dev, kcqe_cnt); /* Tell compiler that status_blk fields can change. */ barrier(); - if (status_idx != sblk->status_idx) { - status_idx = sblk->status_idx; - cp->kwq_con_idx = *cp->kwq_con_idx_ptr; - hw_prod = sblk->status_completion_producer_index; - } else - break; + status_idx = (u16) *cp->kcq1.status_idx_ptr; + /* status block index must be read first */ + rmb(); + cp->kwq_con_idx = *cp->kwq_con_idx_ptr; } -done: - CNIC_WR16(dev, cp->kcq_io_addr, sw_prod); + CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx); - cp->kcq_prod_idx = sw_prod; +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_handle_bnx2_ooo_rx_event(dev); + cnic_handle_bnx2_ooo_tx_event(dev); +#endif return status_idx; } +static int cnic_service_bnx2(void *data, void *status_blk) +{ + struct cnic_dev *dev = data; + + if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) { + struct status_block *sblk = status_blk; + + return sblk->status_idx; + } + + return cnic_service_bnx2_queues(dev); +} + static void cnic_service_bnx2_msix(unsigned long data) { struct cnic_dev *dev = (struct cnic_dev *) data; struct cnic_local *cp = dev->cnic_priv; - struct status_block_msix *status_blk = cp->status_blk.bnx2; - u32 status_idx = status_blk->status_idx; - u16 hw_prod, sw_prod; - int kcqe_cnt; - cp->kwq_con_idx = status_blk->status_cmd_consumer_index; + cp->last_status_idx = cnic_service_bnx2_queues(dev); - hw_prod = status_blk->status_completion_producer_index; - sw_prod = cp->kcq_prod_idx; - while (sw_prod != hw_prod) { - kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod); - if (kcqe_cnt == 0) - goto done; - - service_kcqes(dev, kcqe_cnt); - - /* Tell compiler that status_blk fields can change. */ - barrier(); - if (status_idx != status_blk->status_idx) { - status_idx = status_blk->status_idx; - cp->kwq_con_idx = status_blk->status_cmd_consumer_index; - hw_prod = status_blk->status_completion_producer_index; - } else - break; - } - -done: - CNIC_WR16(dev, cp->kcq_io_addr, sw_prod); - - cp->kcq_prod_idx = sw_prod; - cp->last_status_idx = status_idx; CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx); } +static void cnic_doirq(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + + if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) { + u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX; + + prefetch(cp->status_blk.gen); + prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]); + + tasklet_schedule(&cp->cnic_irq_task); + } +} + #if (LINUX_VERSION_CODE >= 0x20613) || (defined(VMWARE_ESX_DDK_VERSION) && \ - (VMWARE_ESX_DDK_VERSION <= 50000)) + (VMWARE_ESX_DDK_VERSION <= 55000)) static irqreturn_t cnic_irq(int irq, void *dev_instance) #else static irqreturn_t cnic_irq(int irq, void *dev_instance, struct pt_regs *regs) @@ -2157,16 +3087,11 @@ static irqreturn_t cnic_irq(int irq, void *dev_instance, struct pt_regs *regs) { struct cnic_dev *dev = dev_instance; struct cnic_local *cp = dev->cnic_priv; - u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX; if (cp->ack_int) cp->ack_int(dev); - prefetch(cp->status_blk.gen); - prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]); - - if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) - tasklet_schedule(&cp->cnic_irq_task); + cnic_doirq(dev); return IRQ_HANDLED; } @@ -2189,7 +3114,7 @@ static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm, CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack)); } -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment, u16 index, u8 op, u8 update) { @@ -2215,7 +3140,7 @@ static void cnic_ack_bnx2x_msix(struct cnic_dev *dev) IGU_INT_DISABLE, 0); } -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; @@ -2225,84 +3150,81 @@ static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev) } #endif -static void cnic_service_bnx2x_bh(unsigned long data) +static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info) { - struct cnic_dev *dev = (struct cnic_dev *) data; - struct cnic_local *cp = dev->cnic_priv; - u16 hw_prod, sw_prod; - u8 storm_id; + u32 last_status = *info->status_idx_ptr; int kcqe_cnt; - u32 status_idx; -#if (NEW_BNX2X_HSI == 60) - storm_id = USTORM_ID; -#else - storm_id = CSTORM_ID; -#endif - if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) - return; + /* status block index must be read before reading the KCQ */ + rmb(); + while ((kcqe_cnt = cnic_get_kcqes(dev, info))) { - status_idx = *cp->kcq_status_idx_ptr; - hw_prod = *cp->kcq_hw_prod_idx_ptr; - hw_prod = cp->hw_idx(hw_prod); - sw_prod = cp->kcq_prod_idx; - while (sw_prod != hw_prod) { - u32 kcq_diff; - if(hw_prod < sw_prod) - kcq_diff = (65536 + hw_prod) - sw_prod; - else - kcq_diff = hw_prod - sw_prod; - - if (kcq_diff > MAX_KCQ_IDX) - printk(KERN_WARNING PFX - "%s: kcq abs(hw_prod(%d) - sw_prod(%d))" - " > MAX_KCQ_IDX(%lu)\n", - dev->netdev->name, - hw_prod, sw_prod, (unsigned long) MAX_KCQ_IDX); - - kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod); - if (kcqe_cnt == 0) - goto done; - - CNIC_WR16(dev, cp->kcq_io_addr, sw_prod + MAX_KCQ_IDX); service_kcqes(dev, kcqe_cnt); /* Tell compiler that sblk fields can change. */ barrier(); - if (status_idx == *cp->kcq_status_idx_ptr) - break; - status_idx = *cp->kcq_status_idx_ptr; - hw_prod = *cp->kcq_hw_prod_idx_ptr; - hw_prod = cp->hw_idx(hw_prod); + last_status = *info->status_idx_ptr; + /* status block index must be read before reading the KCQ */ + rmb(); } + return last_status; +} + + +static void cnic_service_bnx2x_bh(unsigned long data) +{ + struct cnic_dev *dev = (struct cnic_dev *) data; + struct cnic_local *cp = dev->cnic_priv; + u32 status_idx, new_status_idx; + + if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) + return; + + while (1) { + status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1); + + CNIC_WR16(dev, cp->kcq1.io_addr, + cp->kcq1.sw_prod_idx + MAX_KCQ_IDX); +#if (NEW_BNX2X_HSI < 60) + cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, + status_idx, IGU_INT_ENABLE, 1); +#endif + +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_handle_bnx2x_ooo_tx_event(dev); + cnic_handle_bnx2x_ooo_rx_event(dev); +#endif + + if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) { + cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID, + status_idx, IGU_INT_ENABLE, 1); + break; + } +#if (NEW_BNX2X_HSI >= 60) + new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2); + + if (new_status_idx != status_idx) + continue; + + CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx + + MAX_KCQ_IDX); -done: -#if (NEW_BNX2X_HSI == 60) - if (BNX2X_CHIP_IS_E2(cp->chip_id)) cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, status_idx, IGU_INT_ENABLE, 1); - else #endif - cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, storm_id, - status_idx, IGU_INT_ENABLE, 1); - - cp->kcq_prod_idx = sw_prod; - return; + break; + } } static int cnic_service_bnx2x(void *data, void *status_blk) { struct cnic_dev *dev = data; struct cnic_local *cp = dev->cnic_priv; - u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX; - if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) { - prefetch(cp->status_blk.gen); - prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]); + if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)) + cnic_doirq(dev); - tasklet_schedule(&cp->cnic_irq_task); - } return 0; } @@ -2354,9 +3276,26 @@ static void cnic_ulp_start(struct cnic_dev *dev) } } +static int cnic_copy_ulp_stats(struct cnic_dev *dev, int ulp_type) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_ulp_ops *ulp_ops; + int rc; + + mutex_lock(&cnic_lock); + ulp_ops = cnic_ulp_tbl_prot(ulp_type); + if (ulp_ops && ulp_ops->cnic_get_stats) + rc = ulp_ops->cnic_get_stats(cp->ulp_handle[ulp_type]); + else + rc = -ENODEV; + mutex_unlock(&cnic_lock); + return rc; +} + static int cnic_ctl(void *data, struct cnic_ctl_info *info) { struct cnic_dev *dev = data; + int ulp_type = CNIC_ULP_ISCSI; switch (info->cmd) { case CNIC_CTL_STOP_CMD: @@ -2384,6 +3323,9 @@ static int cnic_ctl(void *data, struct cnic_ctl_info *info) u32 cid = BNX2X_SW_CID(comp->cid); u32 l5_cid; struct cnic_local *cp = dev->cnic_priv; + + if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) + break; if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) { struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; @@ -2400,6 +3342,15 @@ static int cnic_ctl(void *data, struct cnic_ctl_info *info) } break; } + case CNIC_CTL_FCOE_STATS_GET_CMD: + ulp_type = CNIC_ULP_FCOE; + /* fall through */ + case CNIC_CTL_ISCSI_STATS_GET_CMD: + cnic_hold(dev); + cnic_copy_ulp_stats(dev, ulp_type); + cnic_put(dev); + break; + default: return -EINVAL; } @@ -2534,9 +3485,7 @@ static int cnic_cm_offload_pg(struct cnic_sock *csk) l4kwqe->etype = ETH_P_IP; - /* All offloaded connections shall show an ipid of 0x8000+ */ - l4kwqe->ipid_start = 0x8000; - l4kwqe->ipid_count = 0; + l4kwqe->ipid_start = DEF_IPID_START; l4kwqe->host_opaque = csk->l5_cid; if (csk->vlan_id) { @@ -2545,7 +3494,7 @@ static int cnic_cm_offload_pg(struct cnic_sock *csk) l4kwqe->l2hdr_nbytes += 4; } - return (dev->submit_kwqes(dev, wqes, 1)); + return dev->submit_kwqes(dev, wqes, 1); } #if !defined (__VMKLNX__) @@ -2577,7 +3526,7 @@ static int cnic_cm_update_pg(struct cnic_sock *csk) l4kwqe->pg_host_opaque = csk->l5_cid; l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA; - return (dev->submit_kwqes(dev, wqes, 1)); + return dev->submit_kwqes(dev, wqes, 1); } #endif /* !defined (__VMKLNX__) */ @@ -2596,7 +3545,7 @@ static int cnic_cm_upload_pg(struct cnic_sock *csk) L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT; l4kwqe->cid = csk->pg_cid; - return (dev->submit_kwqes(dev, wqes, 1)); + return dev->submit_kwqes(dev, wqes, 1); } #ifdef HAVE_NETEVENT @@ -2747,10 +3696,10 @@ static int cnic_cm_conn_req(struct cnic_sock *csk) tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK; if (csk->tcp_flags & SK_TCP_SEG_SCALING) tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING; - + l4kwqe1->tcp_flags = tcp_flags; - return (dev->submit_kwqes(dev, wqes, num_wqes)); + return dev->submit_kwqes(dev, wqes, num_wqes); } static int cnic_cm_close_req(struct cnic_sock *csk) @@ -2767,7 +3716,7 @@ static int cnic_cm_close_req(struct cnic_sock *csk) l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT; l4kwqe->cid = csk->cid; - return (dev->submit_kwqes(dev, wqes, 1)); + return dev->submit_kwqes(dev, wqes, 1); } static int cnic_cm_abort_req(struct cnic_sock *csk) @@ -2784,7 +3733,7 @@ static int cnic_cm_abort_req(struct cnic_sock *csk) l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT; l4kwqe->cid = csk->cid; - return (dev->submit_kwqes(dev, wqes, 1)); + return dev->submit_kwqes(dev, wqes, 1); } static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid, @@ -2826,6 +3775,9 @@ static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid, csk1->snd_buf = DEF_SND_BUF; csk1->seed = DEF_SEED; +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_conn_ooo_init(cp, l5_cid); +#endif *csk = csk1; return 0; @@ -2846,7 +3798,7 @@ static void cnic_cm_cleanup(struct cnic_sock *csk) struct cnic_dev *dev = csk->dev; struct cnic_local *cp = dev->cnic_priv; - cnic_free_id(&cp->csk_port_tbl, ntohs(csk->src_port)); + cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port)); csk->src_port = 0; } } @@ -2858,8 +3810,6 @@ static void cnic_close_conn(struct cnic_sock *csk) clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags); } cnic_cm_cleanup(csk); - smp_mb__before_clear_bit(); - clear_bit(SK_F_OFFLD_SCHED, &csk->flags); } static int cnic_cm_destroy(struct cnic_sock *csk) @@ -2867,6 +3817,9 @@ static int cnic_cm_destroy(struct cnic_sock *csk) if (!cnic_in_use(csk)) return -EINVAL; +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_flush_ooo(csk->dev, csk->l5_cid); +#endif csk_hold(csk); clear_bit(SK_F_INUSE, &csk->flags); smp_mb__after_clear_bit(); @@ -3084,6 +4037,10 @@ static struct cnic_dev *cnic_cm_select_dev(vmk_IscsiNetHandle iscsiNetHandle, dev->netdev->name, status); cp->pmtu = 1500; } + if (cp->pmtu > dev->netdev->mtu) { + dev->pmtu_fails++; + cp->pmtu = dev->netdev->mtu; + } /* VLAN Tag */ if ((status = vmk_IscsiTransportGetVlan( iscsiNetHandle, @@ -3105,10 +4062,16 @@ static struct cnic_dev *cnic_cm_select_dev(vmk_IscsiNetHandle iscsiNetHandle, &cp->cnic_local_port_nr, &cp->cnic_local_port_min); if (status == VMK_OK) { + u32 port_id; + + get_random_bytes(&port_id, + sizeof(port_id)); + port_id %= cp->cnic_local_port_nr; + cnic_init_id_tbl(&cp->csk_port_tbl, cp->cnic_local_port_nr, cp->cnic_local_port_min, - cp->next_tcp_port); + port_id); } else { found = 0; printk(KERN_ALERT "%s TCP port alloc failed %d\n", @@ -3379,15 +4342,20 @@ static int cnic_cm_abort(struct cnic_sock *csk) return -EINVAL; if (cnic_abort_prep(csk)) - return (cnic_cm_abort_req(csk)); + return cnic_cm_abort_req(csk); /* Getting here means that we haven't started connect, or - * connect was not successful. + * connect was not successful, or it has been reset by the target. */ cp->close_conn(csk, opcode); - if (csk->state != opcode) + if (csk->state != opcode) { + /* Wait for remote reset sequence to complete */ + while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) + msleep(1); + return -EALREADY; + } return 0; } @@ -3399,7 +4367,13 @@ static int cnic_cm_close(struct cnic_sock *csk) if (cnic_close_prep(csk)) { csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP; - return (cnic_cm_close_req(csk)); + return cnic_cm_close_req(csk); + } else { + /* Wait for remote reset sequence to complete */ + while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) + msleep(1); + + return -EALREADY; } return 0; } @@ -3543,6 +4517,18 @@ done: csk_put(csk); } +static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe) +{ + struct cnic_local *cp = dev->cnic_priv; + struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe; + u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE; + struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; + + ctx->timestamp = jiffies; + ctx->wait_cond = 1; + wake_up(&ctx->waitq); +} + static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe) { struct cnic_local *cp = dev->cnic_priv; @@ -3551,10 +4537,23 @@ static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe) u32 l5_cid; struct cnic_sock *csk; - if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG || - opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) { + switch (opcode) { + case FCOE_RAMROD_CMD_ID_TERMINATE_CONN: + cnic_process_fcoe_term_conn(dev, kcqe); + return; + case L4_KCQE_OPCODE_VALUE_OFFLOAD_PG: + case L4_KCQE_OPCODE_VALUE_UPDATE_PG: cnic_cm_process_offld_pg(dev, l4kcqe); return; +#if (CNIC_ISCSI_OOO_SUPPORT) + case L4_KCQE_OPCODE_VALUE_OOO_FLUSH: + cnic_flush_ooo(dev, l4kcqe->cid); + return; + + case L4_KCQE_OPCODE_VALUE_OOO_EVENT_NOTIFICATION: + set_bit(IOOO_START_HANDLER, &cp->iooo_mgmr.flags); + return; +#endif } l5_cid = l4kcqe->conn_id; @@ -3583,6 +4582,17 @@ static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe) case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE: if (l4kcqe->status == 0) set_bit(SK_F_OFFLD_COMPLETE, &csk->flags); + else { + printk(KERN_WARNING PFX "%s: Connect completion " + "failed: " + "status: 0x%x cid: 0x%x " + "l5_cid: 0x%x", + dev->netdev->name, + l4kcqe->status, l4kcqe->cid, + l5_cid); + if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_PARITY_ERROR) + set_bit(SK_F_HW_ERR, &csk->flags); + } smp_mb__before_clear_bit(); clear_bit(SK_F_OFFLD_SCHED, &csk->flags); @@ -3594,6 +4604,9 @@ static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe) case L4_KCQE_OPCODE_VALUE_RESET_COMP: case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE: case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD: + if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_PARITY_ERROR) + set_bit(SK_F_HW_ERR, &csk->flags); + cp->close_conn(csk, opcode); break; @@ -3605,7 +4618,6 @@ static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe) cp->close_conn(csk, L4_KCQE_OPCODE_VALUE_RESET_COMP); else cnic_cm_upcall(cp, csk, opcode); - break; } csk_put(csk); @@ -3672,8 +4684,7 @@ static void cnic_free_dev(struct cnic_dev *dev) i++; } if (atomic_read(&dev->ref_count) != 0) - printk(KERN_ERR PFX "%s: Failed waiting for ref count to go" - " to zero.\n", dev->netdev->name); + CNIC_ERR("Failed waiting for ref count to goto zero.\n"); printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name); dev_put(dev->netdev); @@ -3693,11 +4704,10 @@ static int cnic_cm_alloc_mem(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; - cp->csk_tbl = kmalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ, + cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ, GFP_KERNEL); if (!cp->csk_tbl) return -ENOMEM; - memset(cp->csk_tbl, 0, sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ); return 0; } @@ -3807,7 +4817,9 @@ static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode) case L4_KCQE_OPCODE_VALUE_CLOSE_COMP: case L4_KCQE_OPCODE_VALUE_RESET_COMP: if (cnic_ready_to_close(csk, opcode)) { - if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) + if (test_bit(SK_F_HW_ERR, &csk->flags)) + close_complete = 1; + else if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE; else close_complete = 1; @@ -3876,7 +4888,7 @@ static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev) CNIC_WR8(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS); CNIC_WR8(dev, BAR_XSTRORM_INTMEM + - XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2); + XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 0); CNIC_WR(dev, BAR_XSTRORM_INTMEM + XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER); @@ -3903,7 +4915,7 @@ static void cnic_delete_task(void *data) #endif dev = cp->dev; - for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) { + for (i = 0; i < cp->max_cid_space; i++) { struct cnic_context *ctx = &cp->ctx_tbl[i]; int err; @@ -3994,8 +5006,6 @@ static int cnic_cm_shutdown(struct cnic_dev *dev) struct cnic_local *cp = dev->cnic_priv; int i; - cp->stop_cm(dev); - #ifdef HAVE_NETEVENT unregister_netevent_notifier(&cp->cm_nb); #else @@ -4068,19 +5078,6 @@ static int cnic_setup_5709_context(struct cnic_dev *dev, int valid) return ret; } -#if defined(__VMKLNX__) -static void cnic_stop_irq_task(struct cnic_dev *dev) -{ - struct cnic_local *cp = dev->cnic_priv; - struct cnic_eth_dev *ethdev = cp->ethdev; - - if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { - cp->disable_int_sync(dev); - tasklet_kill(&cp->cnic_irq_task); - } -} -#endif - static void cnic_free_irq(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; @@ -4089,9 +5086,9 @@ static void cnic_free_irq(struct cnic_dev *dev) if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { cp->disable_int_sync(dev); tasklet_kill(&cp->cnic_irq_task); - if (cp->cnic_local_flags & CNIC_LCL_FL_IRQ_REQD) + if (test_bit(CNIC_LCL_FL_IRQ_REQD, &cp->cnic_local_flags)) free_irq(ethdev->irq_arr[0].vector, dev); - cp->cnic_local_flags &= ~CNIC_LCL_FL_IRQ_REQD; + clear_bit(CNIC_LCL_FL_IRQ_REQD, &cp->cnic_local_flags); } } @@ -4101,14 +5098,15 @@ static int cnic_request_irq(struct cnic_dev *dev) struct cnic_eth_dev *ethdev = cp->ethdev; int err; - if (cp->cnic_local_flags & CNIC_LCL_FL_IRQ_REQD) + if (test_bit(CNIC_LCL_FL_IRQ_REQD, &cp->cnic_local_flags)) return 0; err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev); - if (err) + if (err) { + CNIC_ERR("Failed to request irq [%d]", err); tasklet_disable(&cp->cnic_irq_task); - else - cp->cnic_local_flags |= CNIC_LCL_FL_IRQ_REQD; + } else + set_bit(CNIC_LCL_FL_IRQ_REQD, &cp->cnic_local_flags); return err; } @@ -4147,11 +5145,8 @@ static int cnic_init_bnx2_irq(struct cnic_dev *dev) barrier(); } if (cp->status_blk.bnx2->status_completion_producer_index) { -#if !defined (__VMKLNX__) + cnic_free_irq(dev); -#else - cnic_stop_irq_task(dev); -#endif goto failed; } @@ -4174,8 +5169,7 @@ static int cnic_init_bnx2_irq(struct cnic_dev *dev) return 0; failed: - printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n", - dev->netdev->name); + CNIC_ERR("KCQ index not resetting to 0.\n"); return -EBUSY; } @@ -4205,14 +5199,98 @@ static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev) synchronize_irq(ethdev->irq_arr[0].vector); } -static void cnic_get_bnx2_iscsi_info(struct cnic_dev *dev) +#if (CNIC_ISCSI_OOO_SUPPORT) +static void cnic_init_bnx2_tx_ring_start(struct cnic_dev *dev, u32 cid, + dma_addr_t ring_map) { - u32 max_conn; + struct cnic_local *cp = dev->cnic_priv; + u32 cid_addr, val, offset0, offset1, offset2, offset3; - max_conn = cnic_reg_rd_ind(dev, BNX2_FW_MAX_ISCSI_CONN); - dev->max_iscsi_conn = max_conn; + cid_addr = GET_CID_ADDR(cid); + if (CHIP_NUM(cp) == CHIP_NUM_5709) { + int i; + u32 cid_addr2 = GET_CID_ADDR(cid + 4) + 0x40; + + for (i = 0; i < PHY_CTX_SIZE; i += 4) + cnic_ctx_wr(dev, cid_addr2, i, 0); + + offset0 = BNX2_L2CTX_TYPE_XI; + offset1 = BNX2_L2CTX_CMD_TYPE_XI; + offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI; + offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI; + } else { + cnic_init_context(dev, cid); + cnic_init_context(dev, cid + 1); + + offset0 = BNX2_L2CTX_TYPE; + offset1 = BNX2_L2CTX_CMD_TYPE; + offset2 = BNX2_L2CTX_TBDR_BHADDR_HI; + offset3 = BNX2_L2CTX_TBDR_BHADDR_LO; + } + val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2; + cnic_ctx_wr(dev, cid_addr, offset0, val); + + val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16); + cnic_ctx_wr(dev, cid_addr, offset1, val); + + val = (u64) ring_map >> 32; + cnic_ctx_wr(dev, cid_addr, offset2, val); + + val = (u64) ring_map & 0xffffffff; + cnic_ctx_wr(dev, cid_addr, offset3, val); } +static void cnic_init_bnx2_rx_ring_start(struct cnic_dev *dev, u32 cid, + u16 *sb_idx, dma_addr_t ring_map, + u32 sb_id) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_eth_dev *ethdev = cp->ethdev; + u32 cid_addr, val, coal_reg, coal_val; + int i; + + cnic_init_context(dev, cid); + coal_reg = BNX2_HC_COMMAND; + coal_val = CNIC_RD(dev, coal_reg); + if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { + coal_reg = BNX2_HC_COALESCE_NOW; + coal_val = 1 << (11 + sb_id); + } + i = 0; + while (*sb_idx != 0 && i < 10) { + CNIC_WR(dev, coal_reg, coal_val); + udelay(10); + i++; + barrier(); + } + + cid_addr = GET_CID_ADDR(cid); + val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE | + BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8); + cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val); + + if (sb_id == 0) + val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT; + else + val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id); + cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val); + + val = (u64) ring_map >> 32; + cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val); + + val = (u64) ring_map & 0xffffffff; + cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val); +} + +static void cnic_set_bnx2_rxbd(struct rx_bd *rxbd, u32 len, dma_addr_t map) +{ + rxbd->rx_bd_len = len; + rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END; + rxbd->rx_bd_haddr_hi = (u64) map >> 32; + rxbd->rx_bd_haddr_lo = (u64) map & 0xffffffff; +} +#endif + static int cnic_start_bnx2_hw(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; @@ -4247,7 +5325,7 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev) cp->max_kwq_idx = MAX_KWQ_IDX; cp->kwq_prod_idx = 0; cp->kwq_con_idx = 0; - cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT; + set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags); if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708) cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15; @@ -4272,32 +5350,41 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev) cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val); cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID); - cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX; - - cp->kcq_prod_idx = 0; - + cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX; + + cp->kcq1.sw_prod_idx = 0; + cp->kcq1.hw_prod_idx_ptr = + (u16 *) &sblk->status_completion_producer_index; + + cp->kcq1.status_idx_ptr = (u16 *) &sblk->status_idx; + /* Initialize the kernel complete queue context. */ val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE | (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ; cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val); - + val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16; cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val); - + val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT; cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val); - - val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32); + + val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32); cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val); - - val = (u32) cp->kcq_info.pgtbl_map; + + val = (u32) cp->kcq1.dma.pgtbl_map; cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val); cp->int_num = 0; if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { + struct status_block_msix *msblk = cp->status_blk.bnx2; u32 sb_id = cp->status_blk_num; u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id); + cp->kcq1.hw_prod_idx_ptr = + (u16 *) &msblk->status_completion_producer_index; + cp->kcq1.status_idx_ptr = (u16 *) &msblk->status_idx; + cp->kwq_con_idx_ptr = (u16 *) &msblk->status_cmd_consumer_index; cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT; cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); @@ -4327,8 +5414,7 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev) err = cnic_init_bnx2_irq(dev); if (err) { - printk(KERN_ERR PFX "%s: cnic_init_irq failed\n", - dev->netdev->name); + CNIC_ERR("cnic_init_irq failed\n"); val = cnic_reg_rd_ind(dev, BNX2_CP_SCRATCH + 0x20); cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, val & ~0x1); @@ -4339,8 +5425,9 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev) return err; } - cnic_get_bnx2_iscsi_info(dev); - +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_start_bnx2_ooo_hw(dev); +#endif return 0; } @@ -4373,13 +5460,13 @@ static int cnic_init_bnx2x_irq(struct cnic_dev *dev) tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh, (unsigned long) dev); - if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { + if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) err = cnic_request_irq(dev); - } + return err; } -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev, u16 sb_id, u8 sb_index, u8 disable) @@ -4404,13 +5491,13 @@ static void cnic_enable_bnx2x_int(struct cnic_dev *dev) struct cnic_local *cp = dev->cnic_priv; u8 sb_id = cp->status_blk_num; -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) CNIC_WR8(dev, BAR_CSTRORM_INTMEM + CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) + offsetof(struct hc_status_block_data_e1x, index_data) + sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS + - offsetof(struct hc_index_data, timeout), 64 / 12); - cnic_storm_memset_hc_disable(dev,sb_id, HC_INDEX_ISCSI_EQ_CONS, 0); + offsetof(struct hc_index_data, timeout), 64 / 4); + cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0); #elif (NEW_BNX2X_HSI == 50) int port = CNIC_PORT(cp); @@ -4438,181 +5525,136 @@ static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev) { } -static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev) + +static void cnic_init_bnx2x_kcq(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; - u32 base, addr, val; -#if (NEW_BNX2X_HSI == 60) - u32 base2; -#endif - int port = CNIC_PORT(cp); + u32 pfid = cp->pfid; - dev->max_iscsi_conn = 0; - base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR); -#if (NEW_BNX2X_HSI == 60) - if (base == 0) - return; + cp->kcq1.io_addr = BAR_CSTRORM_INTMEM + + CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0); + cp->kcq1.sw_prod_idx = 0; - base2 = CNIC_RD(dev, (CNIC_PATH(cp) ? MISC_REG_GENERIC_CR_1 : - MISC_REG_GENERIC_CR_0)); -#else - if (base < 0xa0000 || base >= 0xc0000) - return; -#endif +#if (NEW_BNX2X_HSI >= 60) + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) { + struct host_hc_status_block_e2 *sb = cp->status_blk.gen; - addr = BNX2X_SHMEM_ADDR(base, validity_map[port]); - val = CNIC_RD(dev, addr); + cp->kcq1.hw_prod_idx_ptr = + &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS]; + cp->kcq1.status_idx_ptr = + &sb->sb.running_index[SM_RX_ID]; + } else { + struct host_hc_status_block_e1x *sb = cp->status_blk.gen; - if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) { - u16 val16; - - addr = BNX2X_SHMEM_ADDR(base, - drv_lic_key[port].max_iscsi_conn); - val16 = (CNIC_RD(dev, addr) & BNX2X_MAX_ISCSI_INIT_CONN_MASK) >> BNX2X_MAX_ISCSI_INIT_CONN_SHIFT; - - if (val16) - val16 ^= 0x1e1e; - dev->max_iscsi_conn = val16; + cp->kcq1.hw_prod_idx_ptr = + &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS]; + cp->kcq1.status_idx_ptr = + &sb->sb.running_index[SM_RX_ID]; } - if (BNX2X_CHIP_IS_E1H(cp->chip_id)) { - int func = CNIC_FUNC(cp); -#if (NEW_BNX2X_HSI == 60) - u32 mf_cfg_addr; - - if (BNX2X_SHMEM2_HAS(base2, mf_cfg_addr)) - mf_cfg_addr = CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base2, - mf_cfg_addr)); - else - mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET; - - addr = mf_cfg_addr + - offsetof(struct mf_cfg, func_mf_config[func].e1hov_tag); #else - addr = BNX2X_SHMEM_ADDR(base, - mf_cfg.func_mf_config[func].e1hov_tag); + cp->kcq1.hw_prod_idx_ptr = + &cp->status_blk.bnx2x->c_status_block.index_values[HC_INDEX_C_ISCSI_EQ_CONS]; + cp->kcq1.status_idx_ptr = + &cp->status_blk.bnx2x->c_status_block.status_block_index; #endif - val = CNIC_RD(dev, addr); - val &= FUNC_MF_CFG_E1HOV_TAG_MASK; - if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) { -#if (NEW_BNX2X_HSI == 60) - addr = mf_cfg_addr + - offsetof(struct mf_cfg, - func_mf_config[func].config); -#else - addr = BNX2X_SHMEM_ADDR(base, - mf_cfg.func_mf_config[func].config); -#endif - val = CNIC_RD(dev, addr); - val &= FUNC_MF_CFG_PROTOCOL_MASK; - if (val != FUNC_MF_CFG_PROTOCOL_ISCSI) - dev->max_iscsi_conn = 0; - } + +#if (NEW_BNX2X_HSI >= 60) + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) { + struct host_hc_status_block_e2 *sb = cp->status_blk.gen; + + cp->kcq2.io_addr = BAR_USTRORM_INTMEM + + USTORM_FCOE_EQ_PROD_OFFSET(pfid); + cp->kcq2.sw_prod_idx = 0; + cp->kcq2.hw_prod_idx_ptr = + &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS]; + cp->kcq2.status_idx_ptr = + &sb->sb.running_index[SM_RX_ID]; } +#endif } static int cnic_start_bnx2x_hw(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; struct cnic_eth_dev *ethdev = cp->ethdev; - int func = CNIC_FUNC(cp), ret, i; + int func = CNIC_FUNC(cp), ret; +#if (NEW_BNX2X_HSI <= 60) + int i; +#endif u32 pfid; - u32 start_cid = ethdev->starting_cid; u16 eq_idx; -#if (NEW_BNX2X_HSI != 60) +#if (NEW_BNX2X_HSI < 60) int port = CNIC_PORT(cp); u8 sb_id = cp->status_blk_num; #endif - if (BNX2X_CHIP_IS_E2(cp->chip_id)) { + dev->stats_addr = ethdev->addr_drv_info_to_mcp; + cp->port_mode = CHIP_PORT_MODE_NONE; + + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) { u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR); if (!(val & 1)) val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN); else val = (val >> 1) & 1; - if (val) + if (val) { + cp->port_mode = CHIP_4_PORT_MODE; cp->pfid = func >> 1; - else + } else { + cp->port_mode = CHIP_2_PORT_MODE; cp->pfid = func & 0x6; + } + } else { cp->pfid = func; } pfid = cp->pfid; - ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ, start_cid, 0); + ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ, + cp->iscsi_start_cid, 0); if (ret) return -ENOMEM; -#if (NEW_BNX2X_HSI == 60) - switch (BNX2X_CHIP_NUM(cp->chip_id)) { - case BNX2X_CHIP_NUM_57710: - cp->iro_arr = e1_iro_arr; - break; - case BNX2X_CHIP_NUM_57711: - case BNX2X_CHIP_NUM_57711E: - cp->iro_arr = e1h_iro_arr; - break; - case BNX2X_CHIP_NUM_57712: - case BNX2X_CHIP_NUM_57712E: - cp->iro_arr = e2_iro_arr; - break; + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) { + ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl, + dev->max_fcoe_conn, + cp->fcoe_start_cid, 0); + + if (ret) + return -ENOMEM; } + +#if (NEW_BNX2X_HSI >= 60) cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2; #else cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num; #endif - cp->kcq_io_addr = BAR_CSTRORM_INTMEM + - CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0); - cp->kcq_prod_idx = 0; - -#if (NEW_BNX2X_HSI == 60) - if (BNX2X_CHIP_IS_E2(cp->chip_id)) { - struct host_hc_status_block_e2 *sb = cp->status_blk.gen; - - cp->kcq_hw_prod_idx_ptr = - &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS]; - cp->kcq_status_idx_ptr = - &sb->sb.running_index[SM_RX_ID]; - } else { - struct host_hc_status_block_e1x *sb = cp->status_blk.gen; - - cp->kcq_hw_prod_idx_ptr = - &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS]; - cp->kcq_status_idx_ptr = - &sb->sb.running_index[SM_RX_ID]; - } -#else - cp->kcq_hw_prod_idx_ptr = - &cp->status_blk.bnx2x->c_status_block.index_values[HC_INDEX_C_ISCSI_EQ_CONS]; - cp->kcq_status_idx_ptr = - &cp->status_blk.bnx2x->c_status_block.status_block_index; -#endif - - cnic_get_bnx2x_iscsi_info(dev); + cnic_init_bnx2x_kcq(dev); /* Only 1 EQ */ - CNIC_WR16(dev, cp->kcq_io_addr, MAX_KCQ_IDX); - CNIC_WR(dev, BAR_CSTRORM_INTMEM + + CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX); + CNIC_WR(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0); CNIC_WR(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0), - cp->kcq_info.pg_map_arr[1] & 0xffffffff); + cp->kcq1.dma.pg_map_arr[1] & 0xffffffff); CNIC_WR(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4, - (u64) cp->kcq_info.pg_map_arr[1] >> 32); + (u64) cp->kcq1.dma.pg_map_arr[1] >> 32); CNIC_WR(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0), - cp->kcq_info.pg_map_arr[0] & 0xffffffff); + cp->kcq1.dma.pg_map_arr[0] & 0xffffffff); CNIC_WR(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4, - (u64) cp->kcq_info.pg_map_arr[0] >> 32); + (u64) cp->kcq1.dma.pg_map_arr[0] >> 32); CNIC_WR8(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1); CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num); -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) CNIC_WR8(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0), HC_INDEX_ISCSI_EQ_CONS); @@ -4622,6 +5664,7 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev) HC_INDEX_C_ISCSI_EQ_CONS); #endif +#if (NEW_BNX2X_HSI <= 60) for (i = 0; i < cp->conn_buf_info.num_pages; i++) { CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i), @@ -4630,6 +5673,7 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev) TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i) + 4, cp->conn_buf_info.pgtbl[(2 * i) + 1]); } +#endif CNIC_WR(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid), @@ -4638,13 +5682,14 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev) USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4, (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32); -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF); #endif + cnic_setup_bnx2x_context(dev); -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) eq_idx = 0; #elif (NEW_BNX2X_HSI == 50) eq_idx = CNIC_RD16(dev, BAR_CSTRORM_INTMEM + @@ -4658,10 +5703,13 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev) index_values[HC_INDEX_C_ISCSI_EQ_CONS])); #endif if (eq_idx != 0) { - printk(KERN_ERR PFX "%s: EQ cons index %x != 0\n", - dev->netdev->name, eq_idx); + CNIC_ERR("EQ cons index %x != 0\n", eq_idx); return -EBUSY; } + +#if (CNIC_ISCSI_OOO_SUPPORT) + cnic_start_bnx2x_ooo_hw(dev); +#endif ret = cnic_init_bnx2x_irq(dev); if (ret) return ret; @@ -4691,8 +5739,7 @@ static int cnic_start_hw(struct cnic_dev *dev) err = cp->alloc_resc(dev); if (err) { - printk(KERN_ERR PFX "%s: allocate resource failure\n", - dev->netdev->name); + CNIC_ERR("allocate resource failure\n"); goto err1; } @@ -4700,6 +5747,8 @@ static int cnic_start_hw(struct cnic_dev *dev) if (err) goto err1; + set_bit(CNIC_LCL_FL_HW_START, &cp->cnic_local_flags); + err = cnic_cm_open(dev); if (err) goto err1; @@ -4735,11 +5784,7 @@ static void cnic_stop_bnx2_hw(struct cnic_dev *dev) cnic_init_context(dev, KCQ_CID); cnic_setup_5709_context(dev, 0); -#if !defined (__VMKLNX__) cnic_free_irq(dev); -#else - cnic_stop_irq_task(dev); -#endif cnic_free_resc(dev); } @@ -4747,18 +5792,18 @@ static void cnic_stop_bnx2_hw(struct cnic_dev *dev) static void cnic_stop_bnx2x_hw(struct cnic_dev *dev) { struct cnic_local *cp = dev->cnic_priv; -#if (NEW_BNX2X_HSI != 60) +#if (NEW_BNX2X_HSI < 60) u8 sb_id = cp->status_blk_num; int port = CNIC_PORT(cp); #endif + if (cp->ethdev->mf_mode == MULTI_FUNCTION_SI || + cp->ethdev->mf_mode == MULTI_FUNCTION_AFEX) + cnic_npar_ring_ctl(dev, 0); -#if !defined (__VMKLNX__) cnic_free_irq(dev); -#else - cnic_stop_irq_task(dev); -#endif -#if (NEW_BNX2X_HSI == 60) - *cp->kcq_hw_prod_idx_ptr = 0; + +#if (NEW_BNX2X_HSI >= 60) + *cp->kcq1.hw_prod_idx_ptr = 0; #elif (NEW_BNX2X_HSI == 50) CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) + @@ -4774,7 +5819,7 @@ static void cnic_stop_bnx2x_hw(struct cnic_dev *dev) #endif CNIC_WR(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0); - CNIC_WR16(dev, cp->kcq_io_addr, 0); + CNIC_WR16(dev, cp->kcq1.io_addr, 0); cnic_free_resc(dev); } @@ -4783,11 +5828,17 @@ static void cnic_stop_hw(struct cnic_dev *dev) if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) { struct cnic_local *cp = dev->cnic_priv; +#if (CNIC_ISCSI_OOO_SUPPORT) + /* Must stop the ooo engine before freeing kwqe resources */ + cp->stop_ooo_hw(dev); +#endif + cp->stop_cm(dev); clear_bit(CNIC_F_CNIC_UP, &dev->flags); rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL); synchronize_rcu(); cnic_cm_shutdown(dev); cp->stop_hw(dev); + clear_bit(CNIC_LCL_FL_HW_START, &cp->cnic_local_flags); pci_dev_put(dev->pcidev); #if !defined (__VMKLNX__) module_put(cp->ethdev->drv_owner); @@ -4795,7 +5846,8 @@ static void cnic_stop_hw(struct cnic_dev *dev) } } -static struct cnic_dev *alloc_cnic(struct net_device *dev) +static struct cnic_dev *cnic_alloc_dev(struct net_device *dev, + struct pci_dev *pdev) { struct cnic_dev *cdev; struct cnic_local *cp; @@ -4803,14 +5855,14 @@ static struct cnic_dev *alloc_cnic(struct net_device *dev) alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local); - cdev = kmalloc(alloc_size , GFP_KERNEL); + cdev = kzalloc(alloc_size , GFP_KERNEL); if (cdev == NULL) { printk(KERN_ERR PFX "%s: allocate dev struct failure\n", dev->name); return NULL; } - memset(cdev, 0, alloc_size); + cdev->version = CNIC_DEV_VER; cdev->netdev = dev; cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev); cdev->register_device = cnic_register_device; @@ -4838,7 +5890,7 @@ static struct cnic_dev *init_bnx2_cnic(struct net_device *dev) probe = cnic_register_get_callback("bnx2"); #else probe = vmk_ModuleGetSymbol("bnx2_cnic_probe"); -#endif /* VMWARE_ESX_DDK_VERSION >= 50000) */ +#endif /* (VMWARE_ESX_DDK_VERSION >= 50000) */ if (probe) { ethdev = (*probe)(dev); } @@ -4895,7 +5947,7 @@ static struct cnic_dev *init_bnx2_cnic(struct net_device *dev) } pci_dev_put(pdev); - cdev = alloc_cnic(dev); + cdev = cnic_alloc_dev(dev, pdev); if (cdev == NULL) goto cnic_err; @@ -4907,6 +5959,9 @@ static struct cnic_dev *init_bnx2_cnic(struct net_device *dev) cdev->pcidev = pdev; cp->chip_id = ethdev->chip_id; + cdev->max_iscsi_conn = ethdev->max_iscsi_conn; + printk (KERN_ERR PFX "%s - Num 1G iSCSI licenses = %d\n", dev->name, cdev->max_iscsi_conn); + cp->cnic_ops = &cnic_bnx2_ops; cp->start_hw = cnic_start_bnx2_hw; cp->stop_hw = cnic_stop_bnx2_hw; @@ -4918,8 +5973,10 @@ static struct cnic_dev *init_bnx2_cnic(struct net_device *dev) cp->enable_int = cnic_enable_bnx2_int; cp->disable_int_sync = cnic_disable_bnx2_int_sync; cp->close_conn = cnic_close_bnx2_conn; - cp->next_idx = cnic_bnx2_next_idx; - cp->hw_idx = cnic_bnx2_hw_idx; + +#if (CNIC_ISCSI_OOO_SUPPORT) + cp->stop_ooo_hw = cnic_stop_bnx2_ooo_hw; +#endif return cdev; cnic_err: @@ -4927,6 +5984,22 @@ cnic_err: return NULL; } +static void cnic_print_device_probe_info(struct cnic_dev *dev, + struct cnic_eth_dev *ethdev) +{ + + CNIC_INFO("version %x drv_state %x, chip_id %x, ctx_tbl_offset %x," + " ctx_tbl_len %x \n ctx_blk_size %d, starting_cid 0x%x, " + "max_iscsi_conn %d, max_fcoe_conn %d \n fcoe_init_cid 0x%x, " + "iscsi_l2_client_id %x, num_irq %d\n", + ethdev->version, ethdev->drv_state, ethdev->chip_id, + ethdev->ctx_tbl_offset, ethdev->ctx_tbl_len, + ethdev->ctx_blk_size, ethdev->starting_cid, + ethdev->max_iscsi_conn, ethdev->max_fcoe_conn, + ethdev->fcoe_init_cid, ethdev->iscsi_l2_client_id, + ethdev->num_irq); +} + static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev) { struct pci_dev *pdev; @@ -4985,19 +6058,46 @@ static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev) return NULL; dev_hold(dev); - cdev = alloc_cnic(dev); + cdev = cnic_alloc_dev(dev, pdev); if (cdev == NULL) { dev_put(dev); return NULL; } +#if defined (__VMKLNX__) + cnic_print_device_probe_info(cdev, ethdev); +#endif + set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags); cdev->submit_kwqes = cnic_submit_bnx2x_kwqes; cp = cdev->cnic_priv; cp->ethdev = ethdev; cdev->pcidev = pdev; +#if ((!defined (CNIC_INBOX) && (VMWARE_ESX_DDK_VERSION >= 50000)) || \ + (defined (CNIC_INBOX) && (VMWARE_ESX_DDK_VERSION >= 55000))) + cdev->cna_vlgrp = ethdev->cna_vlgrp; + cdev->fcoe_wwpn = (((u64)ethdev->fcoe_wwn_port_name_hi << 32) | + ethdev->fcoe_wwn_port_name_lo); + cdev->fcoe_wwnn = (((u64)ethdev->fcoe_wwn_node_name_hi << 32) | + ethdev->fcoe_wwn_node_name_lo); +#endif cp->chip_id = ethdev->chip_id; + + cdev->stats_addr = ethdev->addr_drv_info_to_mcp; + + if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)) { + cdev->max_iscsi_conn = ethdev->max_iscsi_conn; + printk (KERN_ERR PFX "%s - Num 10G iSCSI licenses = %d\n", dev->name, cdev->max_iscsi_conn); + } + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) && + !(ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE)) + cdev->max_fcoe_conn = ethdev->max_fcoe_conn; + + if (cdev->max_fcoe_conn > BNX2X_FCOE_NUM_CONNECTIONS) + cdev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS; + + memcpy(cdev->mac_addr, ethdev->iscsi_mac, 6); cp->cnic_ops = &cnic_bnx2x_ops; cp->start_hw = cnic_start_bnx2x_hw; @@ -5009,15 +6109,16 @@ static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev) cp->stop_cm = cnic_cm_stop_bnx2x_hw; cp->enable_int = cnic_enable_bnx2x_int; cp->disable_int_sync = cnic_disable_bnx2x_int_sync; -#if (NEW_BNX2X_HSI == 60) - if (BNX2X_CHIP_IS_E2(cp->chip_id)) +#if (NEW_BNX2X_HSI >= 60) + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) cp->ack_int = cnic_ack_bnx2x_e2_msix; else #endif cp->ack_int = cnic_ack_bnx2x_msix; cp->close_conn = cnic_close_bnx2x_conn; - cp->next_idx = cnic_bnx2x_next_idx; - cp->hw_idx = cnic_bnx2x_hw_idx; +#if (CNIC_ISCSI_OOO_SUPPORT) + cp->stop_ooo_hw = cnic_stop_bnx2x_ooo_hw; +#endif return cdev; } @@ -5029,7 +6130,7 @@ static struct cnic_dev *is_cnic_dev(struct net_device *dev) if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) { memset(&drvinfo, 0, sizeof(drvinfo)); dev->ethtool_ops->get_drvinfo(dev, &drvinfo); - + if (!strcmp(drvinfo.driver, "bnx2")) cdev = init_bnx2_cnic(dev); if (!strcmp(drvinfo.driver, "bnx2x")) @@ -5047,10 +6148,49 @@ static struct cnic_dev *is_cnic_dev(struct net_device *dev) return cdev; } +#if defined(__VMKLNX__) && \ + ((VMWARE_ESX_DDK_VERSION >= 50000) && !defined (CNIC_INBOX) || \ + (VMWARE_ESX_DDK_VERSION >= 55000) && defined (CNIC_INBOX)) +/** + * netdev event handler + */ +static int cnic_netdev_event_esx(struct notifier_block *this, unsigned long event, + void *ptr) +{ + struct net_device *netdev = ptr; + struct cnic_dev *dev; + int if_type; + + dev = cnic_from_netdev(netdev); + + if (dev) { + struct cnic_local *cp = dev->cnic_priv; + + for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) { + struct cnic_ulp_ops *ulp_ops; + void *ctx; + + ulp_ops = rcu_dereference(cp->ulp_ops[if_type]); + if (!ulp_ops || !ulp_ops->indicate_netevent) + continue; + + ctx = cp->ulp_handle[if_type]; + ulp_ops->indicate_netevent(ctx, event); + } + + } + return NOTIFY_DONE; +} + +static struct notifier_block cnic_netdev_notifier_esx = { + cnic_netdev_event_esx, + 0 +}; + +#elif !defined(__VMKLNX__) /** * IP event handler */ -#if !defined (__VMKLNX__) static int cnic_ip_event(struct notifier_block *this, unsigned long event, void *ptr) { @@ -5180,6 +6320,1119 @@ static struct notifier_block cnic_netdev_notifier = { }; #endif /* !defined (__VMKLNX__) */ +#if (CNIC_ISCSI_OOO_SUPPORT) +/* General OOO engine initialization after it is enabled successfully */ +static void ooo_init(struct iooo_mgmt *im) +{ + int i; + + /* Defaults */ + im->flags = 0; + + /* Rings */ + im->rxr.rx_max_ring = 0; + im->txr.tx_max_ring = 0; + + /* Packet descriptors */ + for (i = 0; i < MAX_OOO_RX_DESC_CNT; i++) + im->rxr.rx_pkt_desc[i] = NULL; + for (i = 0; i < MAX_OOO_TX_DESC_CNT; i++) + im->txr.tx_pkt_desc[i] = NULL; + im->blk_prod = MAX_IOOO_BLOCK_SUPPORTED - 1; + im->blk_cons = 0; + + /* Blocks */ + for (i = 0; i < MAX_IOOO_BLOCK_SUPPORTED; i++) { + im->blk_alloc[i] = i; + im->blk[i].id = i; + im->blk[i].pkt_cnt = 0; + INIT_LIST_HEAD(&im->blk[i].pd_head.list); + } + + /* Pending queues */ + INIT_LIST_HEAD(&im->txr.tx_pend_pd_head.list); + im->txr.tx_pend_pd_cnt = 0; + + /* Statistics */ + im->txr.tx_total_pkt_sent = 0; + + spin_lock_init(&im->lock); +} + +static int ooo_free_buf_single(struct cnic_dev *dev, + struct iooo_pkt_desc *pd) +{ + struct cnic_local *cp = dev->cnic_priv; + + if (!pd) { + CNIC_ERR("ooo_free_buf_single: pd = NULL!\n"); + return -EINVAL; + } + if (pd->buf) { + dma_free_coherent(&dev->pcidev->dev, + cp->iooo_mgmr.pkt_buf_size, + pd->buf, pd->mapping); + pd->buf = NULL; + } + if (pd->skb) { + if (cnic_reuse_ooo_pkt(pd->skb, dev)) + CNIC_ERR("ooo_free_buf_single: Error freeing skb\n"); + pd->skb = NULL; + } + kfree(pd); + + return 0; +} + +static void ooo_free_tx_pend(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + struct iooo_pkt_desc *pd; + struct list_head *pos, *q; + + list_for_each_safe(pos, q, &im->txr.tx_pend_pd_head.list) { + pd = list_entry(pos, struct iooo_pkt_desc, list); + list_del(pos); + if (ooo_free_buf_single(dev, pd)) + CNIC_ERR("Error freeing tx pend list\n"); + im->txr.tx_pend_pd_cnt--; + } + if (im->txr.tx_pend_pd_cnt) + CNIC_ERR("tx_pend_pd_cnt = %d\n", im->txr.tx_pend_pd_cnt); +} + +static int ooo_free_blk(struct cnic_dev *dev, struct iooo_block *blk) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + struct list_head *pos, *q; + struct iooo_pkt_desc *pd; + + if (test_bit(IOOO_BLK_EMPTY, &im->flags)) { + CNIC_ERR("Freeing an empty blk list?!\n"); + return -EINVAL; + } + + if (blk->pkt_cnt) { + list_for_each_safe(pos, q, &blk->pd_head.list) { + pd = list_entry(pos, struct iooo_pkt_desc, list); + list_del(pos); + ooo_free_buf_single(dev, pd); + blk->pkt_cnt--; + } + if (blk->pkt_cnt) { + CNIC_ERR("blk free error! pkt_cnt=%d\n", blk->pkt_cnt); + blk->pkt_cnt = 0; + } + } + + im->blk_prod++; + if (im->blk_prod >= MAX_IOOO_BLOCK_SUPPORTED) + im->blk_prod = 0; + + im->blk_alloc[im->blk_prod] = blk->id; + + if (im->blk_cons == im->blk_prod) + set_bit(IOOO_BLK_EMPTY, &im->flags); + clear_bit(IOOO_BLK_FULL, &im->flags); + return 0; +} + +static void ooo_free_tx_buf(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_tx_ring_info *txr = &cp->iooo_mgmr.txr; + u32 hw_tx_cons, sw_cons; + struct iooo_pkt_desc *pd; + + if (!test_bit(IOOO_START_TX_FREE, &cp->iooo_mgmr.flags)) + return; + + hw_tx_cons = *txr->tx_cons_idx_ptr; + while (hw_tx_cons != txr->tx_cons) { + sw_cons = txr->tx_cons % TX_DESC_CNT; + if (sw_cons != MAX_TX_DESC_CNT) { + pd = txr->tx_pkt_desc[txr->tx_cons & + (txr->tx_desc_cnt_max - 1)]; + txr->tx_pkt_desc[txr->tx_cons & + (txr->tx_desc_cnt_max - 1)] = NULL; + txr->tx_desc_cnt++; + if (pd) + ooo_free_buf_single(dev, pd); + } + txr->tx_cons++; + } +} + +static void ooo_free_all_buf(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + int i; + + for (i = 0; i < MAX_OOO_RX_DESC_CNT; i++) + if (im->rxr.rx_pkt_desc[i]) { + ooo_free_buf_single(dev, im->rxr.rx_pkt_desc[i]); + im->rxr.rx_pkt_desc[i] = NULL; + } + + for (i = 0; i < MAX_IOOO_BLOCK_SUPPORTED; i++) + if (im->blk[i].pkt_cnt) + ooo_free_blk(dev, &im->blk[i]); + + for (i = 0; i < MAX_OOO_TX_DESC_CNT; i++) + if (im->txr.tx_pkt_desc[i]) { + ooo_free_buf_single(dev, im->txr.tx_pkt_desc[i]); + im->txr.tx_pkt_desc[i] = NULL; + } + + ooo_free_tx_pend(dev); +} + +/* Whenever the rxbd's prod - cons < 1/2 MAX, replenish + gfp presents ATOMIC vs. KERNEL | COMP (sleep-able) */ +static int ooo_alloc_buf_single(struct cnic_dev *dev, int gfp, + struct iooo_pkt_desc **pd, int len) +{ + *pd = kmalloc(sizeof(struct iooo_pkt_desc), gfp); + if (*pd == NULL) { + CNIC_ERR("Failed to alloc rx pkt_desc\n"); + return -ENOMEM; + } + + (*pd)->buf = NULL; + if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) { + (*pd)->buf = dma_alloc_coherent(&dev->pcidev->dev, len, + &(*pd)->mapping, gfp); + if (!(*pd)->buf) { + CNIC_ERR("Failed to alloc rx buf\n"); + kfree(*pd); + return -ENOMEM; + } + } + + (*pd)->skb = NULL; + + return 0; +} + +static int ooo_alloc_blk(struct iooo_mgmt *im) +{ + int ret; + + if (test_bit(IOOO_BLK_FULL, &im->flags)) + return MAX_IOOO_BLOCK_SUPPORTED; + + ret = im->blk_alloc[im->blk_cons]; + + im->blk[ret].pkt_cnt = 0; + + im->blk_cons++; + if (im->blk_cons >= MAX_IOOO_BLOCK_SUPPORTED) + im->blk_cons = 0; + if (im->blk_cons == im->blk_prod) + set_bit(IOOO_BLK_FULL, &im->flags); + clear_bit(IOOO_BLK_EMPTY, &im->flags); + return ret; +} + +static int ooo_alloc_rx_buf(struct cnic_dev *dev, int gfp) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_rx_ring_info *rxr = &cp->iooo_mgmr.rxr; + struct iooo_pkt_desc *pd = NULL; + struct rx_bd *rxbd; + u32 ring, sw_rx_prod, want; + int ret = 0, cnt = 0; + + want = rxr->rx_desc_cnt_max - rxr->rx_desc_cnt - + (rxr->rx_desc_cnt_max / RX_DESC_CNT); + + while (want > cnt) { + ring = (rxr->rx_prod & (rxr->rx_desc_cnt_max - 1)) / + RX_DESC_CNT; + sw_rx_prod = rxr->rx_prod % RX_DESC_CNT; + rxbd = &rxr->rx_desc_ring[ring][sw_rx_prod]; + if (sw_rx_prod != MAX_RX_DESC_CNT) { + if ((gfp != GFP_KERNEL) && + (rxr->rx_desc_cnt >= want >> 1)) + goto done; + + ret = ooo_alloc_buf_single(dev, gfp, &pd, + cp->iooo_mgmr.pkt_buf_size); + if (ret) + goto done; + + rxr->rx_prod_bseq += cp->iooo_mgmr.pkt_buf_size; + rxr->rx_pkt_desc[rxr->rx_prod & + (rxr->rx_desc_cnt_max - 1)] = pd; + rxbd->rx_bd_haddr_hi = (u64) pd->mapping >> 32; + rxbd->rx_bd_haddr_lo = (u64) pd->mapping & 0xffffffff; + rxr->rx_desc_cnt++; + cnt++; + } + rxr->rx_prod++; + } +done: + CNIC_WR16(dev, rxr->rx_bidx_addr, rxr->rx_prod); + CNIC_WR(dev, rxr->rx_bseq_addr, rxr->rx_prod_bseq); + return ret; +} + +static void ooo_free_ring(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_tx_ring_info *txr = &cp->iooo_mgmr.txr; + struct iooo_rx_ring_info *rxr = &cp->iooo_mgmr.rxr; + int i; + + for (i = 0; i < rxr->rx_max_ring; i++) { + if (rxr->rx_desc_ring[i]) { + dma_free_coherent(&dev->pcidev->dev, + BCM_PAGE_SIZE, + rxr->rx_desc_ring[i], + rxr->rx_desc_mapping[i]); + rxr->rx_desc_ring[i] = NULL; + } + } + for (i = 0; i < txr->tx_max_ring; i++) { + if (txr->tx_desc_ring[i]) { + dma_free_coherent(&dev->pcidev->dev, + BCM_PAGE_SIZE, + txr->tx_desc_ring[i], + txr->tx_desc_mapping[i]); + txr->tx_desc_ring[i] = NULL; + } + } +} + +static int ooo_alloc_ring(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_tx_ring_info *txr = &cp->iooo_mgmr.txr; + struct iooo_rx_ring_info *rxr = &cp->iooo_mgmr.rxr; + int i; + + rxr->rx_max_ring = rxr->rx_desc_cnt_max / RX_DESC_CNT; + if (rxr->rx_desc_cnt_max % RX_DESC_CNT) + ++(rxr->rx_max_ring); + for (i = 0; i < rxr->rx_max_ring; i++) { + rxr->rx_desc_ring[i] = dma_alloc_coherent(&dev->pcidev->dev, + BCM_PAGE_SIZE, + &rxr->rx_desc_mapping[i], + GFP_KERNEL); + if (!rxr->rx_desc_ring[i]) + goto free; + } + + txr->tx_max_ring = txr->tx_desc_cnt_max / TX_DESC_CNT; + if (txr->tx_desc_cnt_max % TX_DESC_CNT) + ++(txr->tx_max_ring); + for (i = 0; i < txr->tx_max_ring; i++) { + txr->tx_desc_ring[i] = dma_alloc_coherent(&dev->pcidev->dev, + BCM_PAGE_SIZE, + &txr->tx_desc_mapping[i], + GFP_KERNEL); + if (!txr->tx_desc_ring[i]) + goto free; + } + return 0; + +free: + ooo_free_ring(dev); + return -ENOMEM; +} + +static void ooo_init_rings(struct iooo_mgmt *im) +{ + struct iooo_rx_ring_info *rxr = &im->rxr; + struct iooo_tx_ring_info *txr = &im->txr; + struct tx_bd *txbd; + u32 next; + int i, j; + + for (i = 0; i < rxr->rx_max_ring; i++) { + next = i + 1; + if (next >= rxr->rx_max_ring) + next = 0; + for (j = 0; j < MAX_RX_DESC_CNT; j++) + cnic_set_bnx2_rxbd(&rxr->rx_desc_ring[i][j], + im->pkt_buf_size, + (dma_addr_t) NULL); + cnic_set_bnx2_rxbd(&rxr->rx_desc_ring[i][j], + BCM_PAGE_SIZE, + rxr->rx_desc_mapping[next]); + } + for (i = 0; i < txr->tx_max_ring; i++) { + next = i + 1; + if (next >= txr->tx_max_ring) + next = 0; + for (j = 0; j < MAX_TX_DESC_CNT; j++) { + txbd = &txr->tx_desc_ring[i][j]; + txbd->tx_bd_vlan_tag_flags = TX_BD_FLAGS_START | + TX_BD_FLAGS_END; + } + txbd = &txr->tx_desc_ring[i][MAX_TX_DESC_CNT]; + txbd->tx_bd_haddr_hi = + (u64) txr->tx_desc_mapping[next] >> 32; + txbd->tx_bd_haddr_lo = + (u64) txr->tx_desc_mapping[next] & 0xffffffff; + } +} + +/* Actual placement of the pkt to the txbd */ +static int ooo_send(struct iooo_tx_ring_info *txr, + struct iooo_pkt_desc *pd) +{ + struct tx_bd *txbd; + u32 ring, sw_tx_prod; + int i; + + dma_addr_t txpd_mapping; + if (!txr->tx_desc_cnt) + return -ENOMEM; + + for (i = 0; i < 2; i++) { + ring = (txr->tx_prod & (txr->tx_desc_cnt_max - 1)) / + TX_DESC_CNT; + sw_tx_prod = txr->tx_prod % TX_DESC_CNT; + txbd = &txr->tx_desc_ring[ring][sw_tx_prod]; + if (sw_tx_prod != MAX_TX_DESC_CNT) { + txr->tx_pkt_desc[txr->tx_prod & + (txr->tx_desc_cnt_max - 1)] = pd; + txpd_mapping = pd->mapping + BNX2_RX_OFFSET; + txbd->tx_bd_mss_nbytes = pd->pkt_len; + txbd->tx_bd_haddr_hi = (u64) txpd_mapping >> 32; + txbd->tx_bd_haddr_lo = (u64) txpd_mapping & 0xffffffff; + txr->tx_prod_bseq += pd->pkt_len; + txr->tx_prod++; + txr->tx_desc_cnt--; + txr->tx_total_pkt_sent++; + return 0; + } else + txr->tx_prod++; + } + return 0; +} + +static int ooo_send_bnx2x(struct cnic_dev *dev, struct iooo_tx_ring_info *txr, + struct iooo_pkt_desc *pd) +{ + int ret; + + ret = cnic_send_ooo_pkt(pd->skb, dev); + if (NETDEV_TX_OK == ret) { + txr->tx_total_pkt_sent++; + /* Once sent, cnic no longer owns the skb */ + pd->skb = NULL; + ret = 0; + } else + CNIC_ERR("send_ooo ret=%d\n", ret); + + ooo_free_buf_single(dev, pd); + + return ret; +} + +static void ooo_send_pend(struct cnic_dev *dev, struct iooo_tx_ring_info *txr) +{ + struct iooo_pkt_desc *pd; + struct list_head *pos, *q; + int cnt = 0; + + if (list_empty(&txr->tx_pend_pd_head.list)) { + if (txr->tx_pend_pd_cnt) + CNIC_ERR("pend cnt out of sync=%d\n", + txr->tx_pend_pd_cnt); + return; + } + list_for_each_safe(pos, q, &txr->tx_pend_pd_head.list) { + pd = list_entry(pos, struct iooo_pkt_desc, list); + list_del(pos); + if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) + ooo_send(txr, pd); + else + ooo_send_bnx2x(dev, txr, pd); + + dev->ooo_tx_count++; + txr->tx_pend_pd_cnt--; + cnt++; + } + if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags) && cnt) { + CNIC_WR16(dev, txr->tx_bidx_addr, txr->tx_prod); + CNIC_WR(dev, txr->tx_bseq_addr, txr->tx_prod_bseq); + } +} + +static void ooo_send_pkt(struct iooo_tx_ring_info *txr, + struct iooo_pkt_desc *pd) +{ + list_add_tail(&pd->list, &txr->tx_pend_pd_head.list); + txr->tx_pend_pd_cnt++; +} + +static int ooo_send_blk(struct iooo_tx_ring_info *txr, + struct iooo_block *blk) +{ + struct iooo_pkt_desc *pd; + struct list_head *pos, *q; + + list_for_each_safe(pos, q, &blk->pd_head.list) { + pd = list_entry(pos, struct iooo_pkt_desc, list); + list_del(pos); + ooo_send_pkt(txr, pd); + blk->pkt_cnt--; + } + return blk->pkt_cnt; +} + +static void ooo_engine(struct cnic_dev *dev, struct iooo_pkt_desc *pkt_desc, + u32 l5_cid) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; + struct cnic_iscsi *iscsi = ctx->proto.iscsi; + struct iooo_block *pen = &iscsi->pen; + struct iooo_block *blk, *blk_nxt; + struct list_head *pos, *q; + int blk_idx, new_blk_idx; +/* + printk("cnic: cid=0x%x op %d blk %d dblk %d size %d bcnt=%d\n", + im->hsi.iscsi_cid, im->hsi.opcode, im->hsi.blk_idx, + im->hsi.drop_blk_idx, im->hsi.drop_size, + iscsi->blk_cnt); +*/ + if (im->hsi.drop_size) { + if (!im->hsi.drop_blk_idx || list_empty(&pen->list)) { + CNIC_ERR("drop_blk_idx=%d or list empty\n", + im->hsi.drop_blk_idx); + goto orphan; + } + blk_idx = 1; + list_for_each_safe(pos, q, &pen->list) { + if (im->hsi.drop_blk_idx == blk_idx++) { + blk = list_entry(pos, struct iooo_block, list); + ooo_free_blk(dev, blk); + iscsi->blk_cnt--; + im->hsi.drop_blk_idx++; + list_del(pos); + if (!(--im->hsi.drop_size)) + break; + } + } + } + + blk = NULL; + switch (im->hsi.opcode) { + case OOO_OPCODE_ADD_RIGHT: + blk_idx = 1; + list_for_each_entry(blk, &pen->list, list) { + if (im->hsi.blk_idx == blk_idx++) + break; + } + if (list_empty(&pen->list) || im->hsi.blk_idx != --blk_idx) { + CNIC_ERR("can't find block to add right to!\n"); + goto orphan; + } + list_add_tail(&pkt_desc->list, &blk->pd_head.list); + blk->pkt_cnt++; + break; + + case OOO_OPCODE_ADD_LEFT: + blk_idx = 1; + list_for_each_entry(blk, &pen->list, list) { + if (im->hsi.blk_idx == blk_idx++) + break; + } + if (list_empty(&pen->list) || im->hsi.blk_idx != --blk_idx) { + CNIC_ERR("can't find block to add left to!\n"); + goto orphan; + } + list_add(&pkt_desc->list, &blk->pd_head.list); + blk->pkt_cnt++; + break; + + case OOO_OPCODE_ADD_NEW: + new_blk_idx = ooo_alloc_blk(im); + if (MAX_IOOO_BLOCK_SUPPORTED == new_blk_idx) { + CNIC_ERR("max blk reached!\n"); + goto orphan; + } + /* Find blk to add to */ + if (im->hsi.blk_idx == 1) + blk = pen; + else { + blk_idx = 2; + list_for_each_entry(blk, &pen->list, list) { + if (im->hsi.blk_idx == blk_idx++) + break; + } + } + list_add(&im->blk[new_blk_idx].list, &blk->list); + iscsi->blk_cnt++; + + /* Attach pkt to blk */ + blk = &im->blk[new_blk_idx]; + list_add(&pkt_desc->list, &blk->pd_head.list); + blk->pkt_cnt++; + break; + + case OOO_OPCODE_JOIN: + if (!im->hsi.blk_idx) { + if (list_empty(&pen->list)) { + CNIC_ERR("can't find block to join 0!\n"); + goto orphan; + } + blk = list_first_entry(&pen->list, struct iooo_block, + list); + list_add(&pkt_desc->list, &blk->pd_head.list); + blk->pkt_cnt++; + if (ooo_send_blk(&im->txr, blk)) { + CNIC_ERR("blk sent err! pkt_cnt=%d\n", + blk->pkt_cnt); + blk->pkt_cnt = 0; + } + ooo_free_blk(dev, blk); + iscsi->blk_cnt--; + list_del(&blk->list); + } else { + blk_idx = 1; + blk = blk_nxt = NULL; + list_for_each_entry(blk, &pen->list, list) { + if (im->hsi.blk_idx == blk_idx++) { + blk_nxt = list_entry(blk->list.next, + struct iooo_block, list); + break; + } + } + if (!blk || !blk_nxt || blk_nxt == pen) { + CNIC_ERR("can't find block to join!\n"); + goto orphan; + } + list_add_tail(&pkt_desc->list, &blk->pd_head.list); + blk->pkt_cnt++; + /* Append all the pkts from the nxt blk to this blk */ + list_for_each_safe(pos, q, &blk_nxt->pd_head.list) { + list_move_tail(pos, &blk->pd_head.list); + blk->pkt_cnt++; + blk_nxt->pkt_cnt--; + } + ooo_free_blk(dev, blk_nxt); + iscsi->blk_cnt--; + list_del(&blk_nxt->list); + } + break; + + case OOO_OPCODE_ADD_PEN: + ooo_send_pkt(&im->txr, pkt_desc); + break; + + default: + break; + } + + return; + +orphan: + if (pkt_desc) + ooo_free_buf_single(dev, pkt_desc); +} + +static void ooo_handle_rx_event(struct cnic_dev *dev, + struct iooo_pkt_desc *pd) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + u32 l5_cid; + + /* For 0 len placement, just free the pkt */ + if (unlikely(!pd->pkt_len)) { + ooo_free_buf_single(dev, pd); + return; + } + + if (cnic_get_l5_cid(cp, im->hsi.iscsi_cid, &l5_cid) == 0) { + if (l5_cid >= MAX_CM_SK_TBL_SZ) { + CNIC_ERR("bad l5_cid=%d\n", l5_cid); + ooo_free_buf_single(dev, pd); + } else + ooo_engine(dev, pd, l5_cid); + } else { + CNIC_ERR("get l5_cid failed\n"); + ooo_free_buf_single(dev, pd); + } +} + +static void cnic_handle_bnx2_ooo_rx_event(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + struct iooo_pkt_desc *pkt_desc; + struct bnx2_ooo_fhdr *pkt_hsi; + u16 hw_rx_cons, sw_cons; + + /* Process only if ready to start handler */ + if (unlikely(!test_bit(IOOO_START_HANDLER, &im->flags))) + return; + + /* Handle RX placement */ + hw_rx_cons = *im->rxr.rx_cons_idx_ptr; + while (hw_rx_cons != im->rxr.rx_cons) { + sw_cons = im->rxr.rx_cons % RX_DESC_CNT; + if (sw_cons != MAX_RX_DESC_CNT) { + pkt_desc = im->rxr.rx_pkt_desc[im->rxr.rx_cons & + (im->rxr.rx_desc_cnt_max - 1)]; + if (!pkt_desc) { + CNIC_ERR("pkt_desc = NULL?! rx_cons=%d\n", + im->rxr.rx_cons & + (im->rxr.rx_desc_cnt_max - 1)); + goto out; + } + im->rxr.rx_pkt_desc[im->rxr.rx_cons & + (im->rxr.rx_desc_cnt_max - 1)] = NULL; + + pkt_hsi = (struct bnx2_ooo_fhdr *)pkt_desc->buf; + pkt_desc->pkt_len = pkt_hsi->pkt_len; + im->hsi.iscsi_cid = pkt_hsi->icid; + im->hsi.opcode = pkt_hsi->opcode; + im->hsi.blk_idx = pkt_hsi->blk_idx; + im->hsi.drop_size = pkt_hsi->drop_size; + im->hsi.drop_blk_idx = pkt_hsi->drop_blk_idx; + + ooo_handle_rx_event(dev, pkt_desc); + + im->rxr.rx_desc_cnt--; + } +out: + im->rxr.rx_cons++; + } + + /* If already stopped, keep processing the rx queue but do not alloc + more buffers */ + + if (unlikely(!test_bit(IOOO_START, &im->flags))) + return; + + ooo_alloc_rx_buf(dev, GFP_ATOMIC); +} + +static void cnic_handle_bnx2_ooo_tx_event(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + u16 hw_cons, sw_cons; + + if (unlikely(!test_bit(IOOO_START_HANDLER, &im->flags))) + return; + + /* Handle fwd ring tx completion */ + hw_cons = *im->txr.tx_cons_idx_ptr; + sw_cons = im->txr.tx_cons; + if (sw_cons == hw_cons && !im->txr.tx_pend_pd_cnt) + return; + + /* Must wait for at least 1 tx completion before attempting to free */ + if (!test_bit(IOOO_START_TX_FREE, &cp->iooo_mgmr.flags) && + im->txr.tx_desc_cnt < (im->txr.tx_desc_cnt_max >> 1)) + set_bit(IOOO_START_TX_FREE, &cp->iooo_mgmr.flags); + + spin_lock(&im->lock); + ooo_free_tx_buf(dev); + spin_unlock(&im->lock); + + if (unlikely(!test_bit(IOOO_START, &im->flags))) + return; + + ooo_send_pend(dev, &im->txr); +} + +static void cnic_handle_bnx2x_ooo_rx_event(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + struct iooo_pkt_desc *pkt_desc; + struct iooo_hsi_bnx2x *pkt_hsi; + struct cnic_ooo_cqe ooo_cqe; + int ret; + u16 hw_cons, sw_cons; + + /* Process only if ready to start */ + if (unlikely(!test_bit(IOOO_START, &im->flags))) + return; + + hw_cons = *im->rxr.rx_cons_idx_ptr; + sw_cons = im->rxr.rx_cons; + if (sw_cons == hw_cons) + return; + + im->rxr.rx_cons = hw_cons; + + ooo_cqe.cqe_type = 0xffffffff; + /* Handle the rx cqe */ + do { + ret = cnic_get_ooo_cqe(dev, &ooo_cqe); + if (ret < 0) { + CNIC_ERR("ERROR at retrieving OOO CQE\n"); + goto error; + } + if (0xffffffff == ooo_cqe.cqe_type) + goto empty; + else if (OOO_BD_CQE != ooo_cqe.cqe_type) { + CNIC_ERR("OOO CQE type=%d!\n", ooo_cqe.cqe_type); + goto reuse; + } + if (!ooo_alloc_buf_single(dev, GFP_ATOMIC, &pkt_desc, 0)) { + pkt_desc->skb = ooo_cqe.u.cqe.pkt_desc; + pkt_desc->pkt_len = pkt_desc->skb->len; + pkt_hsi = (struct iooo_hsi_bnx2x *) + ooo_cqe.u.cqe.raw_data; + /* Must mask out for port identifier (bit 23) */ + im->hsi.iscsi_cid = BNX2X_SW_CID(pkt_hsi->iscsi_cid); + im->hsi.opcode = pkt_hsi->opcode; + im->hsi.blk_idx = pkt_hsi->blk_idx; + im->hsi.drop_size = pkt_hsi->drop_size; + im->hsi.drop_blk_idx = pkt_hsi->drop_blk_idx; + + ooo_handle_rx_event(dev, pkt_desc); + + } else { + CNIC_ERR("Failed to allocate pk desc!\n"); +reuse: + cnic_reuse_ooo_pkt(ooo_cqe.u.cqe.pkt_desc, dev); + return; + } + } while (ret); +error: +empty: + /* Send any tx pending pkt */ + ooo_send_pend(dev, &im->txr); + + return; +} + +static void cnic_handle_bnx2x_ooo_tx_event(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + u16 hw_cons, sw_cons; + + /* Handle fwd ring tx completion */ + hw_cons = *im->txr.tx_cons_idx_ptr; + sw_cons = im->txr.tx_cons; + if (sw_cons == hw_cons) + return; + + im->txr.tx_cons = hw_cons; + + /* Handle tx completion by sending event to bnx2x */ + cnic_comp_ooo_tx_pkts(dev); + + /* Lastly, send any tx pending pkt */ + if (unlikely(!test_bit(IOOO_START, &im->flags))) + return; + + ooo_send_pend(dev, &im->txr); +} + +static void cnic_alloc_bnx2_ooo_resc(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + int ret; + + /* Chip specific */ + cp->iooo_mgmr.rxr.rx_desc_cnt_max = MAX_BNX2_OOO_RX_DESC_CNT; + cp->iooo_mgmr.txr.tx_desc_cnt_max = MAX_BNX2_OOO_TX_DESC_CNT; + cp->iooo_mgmr.pkt_buf_size = dev->netdev->mtu + ETH_HLEN + + BNX2_RX_OFFSET + 8; + /* General */ + ooo_init(&cp->iooo_mgmr); + + if (CHIP_NUM(cp) != CHIP_NUM_5709) + return; + + ret = ooo_alloc_ring(dev); + if (!ret) + set_bit(IOOO_RESC_AVAIL, &cp->iooo_mgmr.flags); +} + +static void cnic_alloc_bnx2x_ooo_resc(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + + /* General */ + ooo_init(&cp->iooo_mgmr); + set_bit(IOOO_RESC_AVAIL, &cp->iooo_mgmr.flags); +} + +static void cnic_stop_bnx2_ooo_hw(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + int cnt = 10; + struct kwqe *wqes[1], l2kwqe; + + if (!(test_bit(IOOO_START, &cp->iooo_mgmr.flags))) + return; + + /* Send kwqe to clean up the L2 OOO rx ring */ + memset(&l2kwqe, 0, sizeof(l2kwqe)); + wqes[0] = &l2kwqe; + l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) | + (L2_OOO_KWQE_OPCODE_VALUE_VM_FREE_RX_QUEUE << + KWQE_OPCODE_SHIFT) | (RX_CATCHUP_CID << + KWQE_QID_SHIFT); + dev->submit_kwqes(dev, wqes, 1); + + /* Wait for the hardware indexes to match producer */ + while ((*im->rxr.rx_cons_idx_ptr != im->rxr.rx_prod) + && cnt) { + msleep(10); + cnt--; + } + + if (!cnt) + CNIC_ERR("hw rx_cons=%d != sw rx_cons=%d rx_prod=%d\n", + *im->rxr.rx_cons_idx_ptr, + im->rxr.rx_cons, im->rxr.rx_prod); + + cnt = 10; + while ((*im->txr.tx_cons_idx_ptr != im->txr.tx_prod) + && cnt) { + msleep(10); + cnt--; + } + if (!cnt) + CNIC_ERR("hw tx_cons=%d != sw tx_cons=%d tx_prod=%d\n", + *im->txr.tx_cons_idx_ptr, + im->txr.tx_cons, im->txr.tx_prod); + clear_bit(IOOO_START, &im->flags); + clear_bit(IOOO_START_HANDLER, &im->flags); +} + +static void cnic_stop_bnx2x_ooo_hw(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_mgmt *im = &cp->iooo_mgmr; + + /* Nothing to do here as the free_ooo_resc gets called in stop_hw */ + clear_bit(IOOO_START, &im->flags); +} + +static void cnic_start_bnx2_ooo_hw(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct status_block *sblk = (struct status_block *) + ((unsigned long)cp->status_blk.gen & PAGE_MASK); + struct iooo_rx_ring_info *rxr = &cp->iooo_mgmr.rxr; + struct iooo_tx_ring_info *txr = &cp->iooo_mgmr.txr; + u32 val; + + if (!(test_bit(IOOO_RESC_AVAIL, &cp->iooo_mgmr.flags))) + return; + + rxr->rx_cid_addr = GET_CID_ADDR(RX_CATCHUP_CID); + rxr->rx_bidx_addr = MB_GET_CID_ADDR(RX_CATCHUP_CID) + + L5_KRNLQ_HOST_QIDX; + rxr->rx_bseq_addr = MB_GET_CID_ADDR(RX_CATCHUP_CID) + + L5_KRNLQ_HOST_FW_QIDX; + rxr->rx_prod = 0; + rxr->rx_prod_bseq = 0; + rxr->rx_cons = 0; + + rxr->rx_cons_idx_ptr = (u16 *) (&sblk->status_rx_quick_consumer_index1); + cnic_init_bnx2_rx_ring_start(dev, RX_CATCHUP_CID, rxr->rx_cons_idx_ptr, + rxr->rx_desc_mapping[0], 0); + if (*rxr->rx_cons_idx_ptr) + CNIC_ERR("stale hw rx_cons=%d\n", *rxr->rx_cons_idx_ptr); + + txr->tx_cid_addr = GET_CID_ADDR(TX_CATCHUP_CID); + txr->tx_bidx_addr = MB_GET_CID_ADDR(TX_CATCHUP_CID) + + BNX2_L2CTX_TX_HOST_BIDX; + txr->tx_bseq_addr = MB_GET_CID_ADDR(TX_CATCHUP_CID) + + BNX2_L2CTX_TX_HOST_BSEQ; + txr->tx_cons_idx_ptr = (u16 *) (&sblk->status_tx_quick_consumer_index1); + txr->tx_prod = 0; + txr->tx_prod_bseq = 0; + txr->tx_cons = 0; + + cnic_init_bnx2_tx_ring_start(dev, TX_CATCHUP_CID, + txr->tx_desc_mapping[0]); + + ooo_init_rings(&cp->iooo_mgmr); + + val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (TX_OOO_EST_NBD << 16); + cnic_ctx_wr(dev, txr->tx_cid_addr, BNX2_L2CTX_CMD_TYPE_XI, val); + + /* Allocate rx buf, no tx buf yet */ + rxr->rx_desc_cnt = 0; + txr->tx_desc_cnt = txr->tx_desc_cnt_max - txr->tx_desc_cnt_max / + TX_DESC_CNT; + ooo_alloc_rx_buf(dev, GFP_KERNEL); + set_bit(IOOO_START, &cp->iooo_mgmr.flags); +} + +static void cnic_start_bnx2x_ooo_hw(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iooo_rx_ring_info *rxr = &cp->iooo_mgmr.rxr; + struct iooo_tx_ring_info *txr = &cp->iooo_mgmr.txr; + int i; + + if (!(test_bit(IOOO_RESC_AVAIL, &cp->iooo_mgmr.flags))) + return; + + for (i = 0; i < MAX_OOO_RX_DESC_CNT; i++) + rxr->rx_pkt_desc[i] = NULL; + for (i = 0; i < MAX_OOO_TX_DESC_CNT; i++) + txr->tx_pkt_desc[i] = NULL; + + if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) { + struct host_hc_status_block_e2 *sb = cp->status_blk.gen; + + cp->iooo_mgmr.txr.tx_cons_idx_ptr = + &sb->sb.index_values[HC_INDEX_FWD_TX_CQ_CONS]; + cp->iooo_mgmr.rxr.rx_cons_idx_ptr = + &sb->sb.index_values[HC_INDEX_OOO_RX_CQ_CONS]; + } else { + struct host_hc_status_block_e1x *sb = cp->status_blk.gen; + + cp->iooo_mgmr.txr.tx_cons_idx_ptr = + &sb->sb.index_values[HC_INDEX_FWD_TX_CQ_CONS]; + cp->iooo_mgmr.rxr.rx_cons_idx_ptr = + &sb->sb.index_values[HC_INDEX_OOO_RX_CQ_CONS]; + } + set_bit(IOOO_START, &cp->iooo_mgmr.flags); +} + +static void cnic_free_ooo_resc(struct cnic_dev *dev) +{ + struct cnic_local *cp = dev->cnic_priv; + + if (!(test_bit(IOOO_RESC_AVAIL, &cp->iooo_mgmr.flags))) + return; + + clear_bit(IOOO_RESC_AVAIL, &cp->iooo_mgmr.flags); + ooo_free_all_buf(dev); + ooo_free_ring(dev); +} + +static void cnic_conn_ooo_init(struct cnic_local *cp, u32 l5_cid) +{ + struct cnic_context *ctx = &cp->ctx_tbl[l5_cid]; + struct cnic_iscsi *iscsi = ctx->proto.iscsi; + + iscsi->blk_cnt = 0; + iscsi->pen.pkt_cnt = 0; + INIT_LIST_HEAD(&iscsi->pen.list); + INIT_LIST_HEAD(&iscsi->pen.pd_head.list); +} + +/* Flush the associated iooo_block for the connection specified */ +static void cnic_flush_ooo(struct cnic_dev *dev, u32 l5_cid) +{ + struct cnic_local *cp = dev->cnic_priv; + struct cnic_context *ctx; + struct cnic_iscsi *iscsi; + struct list_head *pos, *q; + struct iooo_block *blk; + + spin_lock_bh(&cp->iooo_mgmr.lock); + if (l5_cid >= MAX_CM_SK_TBL_SZ) + goto skip; + + ctx = &cp->ctx_tbl[l5_cid]; + if (!ctx) + goto skip; + + iscsi = ctx->proto.iscsi; + + if (!iscsi->blk_cnt) + goto skip; + + list_for_each_safe(pos, q, &iscsi->pen.list) { + blk = list_entry(pos, struct iooo_block, list); + ooo_free_blk(dev, blk); + iscsi->blk_cnt--; + list_del(pos); + } + if (iscsi->blk_cnt) { + CNIC_ERR("blk cnt=%d != 0\n", iscsi->blk_cnt); + iscsi->blk_cnt = 0; + } +skip: + if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) + ooo_free_tx_buf(dev); + + clear_bit(IOOO_START_TX_FREE, &cp->iooo_mgmr.flags); + spin_unlock_bh(&cp->iooo_mgmr.lock); +} + +static void cnic_bnx2_ooo_iscsi_conn_update(struct cnic_dev *dev, + struct kwqe *kwqe) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iscsi_kwqe_conn_update *req = + (struct iscsi_kwqe_conn_update *) kwqe; + u32 l5_cid; + struct cnic_context *ctx; + + l5_cid = req->reserved2; + if (l5_cid >= MAX_ISCSI_TBL_SZ) + return; + + ctx = &cp->ctx_tbl[l5_cid]; + ctx->cid = req->context_id << 7; + + if (!(test_bit(IOOO_RESC_AVAIL, &cp->iooo_mgmr.flags))) + return; + + if (test_bit(CNIC_F_ISCSI_OOO_ENABLE, &dev->flags)) { + cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_OOO_RX_CID, + GET_CID_ADDR(RX_CATCHUP_CID)); + cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_OOO_FLAGS, + BNX2_IOOO_FLAGS_OVERRIDE | + BNX2_IOOO_FLAGS_ENABLE); + } +} + +static void cnic_bnx2_ooo_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iscsi_kwqe_conn_destroy *req = + (struct iscsi_kwqe_conn_destroy *) kwqe; + u32 l5_cid = req->reserved0; + struct cnic_context *ctx; + + if (l5_cid >= MAX_ISCSI_TBL_SZ) + return; + + ctx = &cp->ctx_tbl[l5_cid]; + ctx->cid = 0; +} + +static void cnic_bnx2x_ooo_iscsi_conn_update(struct cnic_dev *dev, + struct kwqe *kwqe) +{ + struct cnic_local *cp = dev->cnic_priv; + struct iscsi_kwqe_conn_update *req = + (struct iscsi_kwqe_conn_update *) kwqe; + + if (!(test_bit(IOOO_RESC_AVAIL, &cp->iooo_mgmr.flags))) + return; + + if (test_bit(CNIC_F_ISCSI_OOO_ENABLE, &dev->flags) && + !(cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI_OOO)) + req->conn_flags = + (req->conn_flags & + ~ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE) | + (TCP_TSTORM_OOO_SUPPORTED << + ISCSI_KWQE_CONN_UPDATE_OOO_SUPPORT_MODE_SHIFT); +} + +#endif /* CNIC_ISCSI_OOO_SUPPORT */ + static void cnic_release(void) { struct cnic_dev *dev; @@ -5189,10 +7442,6 @@ static void cnic_release(void) if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) cnic_stop_hw(dev); -#if defined (__VMKLNX__) - cnic_free_irq(dev); -#endif - cnic_unregister_netdev(dev); list_del_init(&dev->list); cnic_free_dev(dev); @@ -5205,6 +7454,7 @@ static int __init cnic_init(void) #if defined (__VMKLNX__) struct net_device *dev; #endif /* defined (__VMKLNX__) */ + INIT_LIST_HEAD(&cnic_dev_list); printk(KERN_INFO "%s", version); @@ -5215,6 +7465,8 @@ static int __init cnic_init(void) } #if defined (__VMKLNX__) + rtnl_lock(); + /* Find Teton devices */ #if (LINUX_VERSION_CODE >= 0x020618) for_each_netdev(&init_net, dev) @@ -5245,8 +7497,13 @@ static int __init cnic_init(void) } } -#else /* !defined (__VMKLNX__) */ + rtnl_unlock(); +#if ((VMWARE_ESX_DDK_VERSION >= 50000) && !defined (CNIC_INBOX) || \ + (VMWARE_ESX_DDK_VERSION >= 55000) && defined (CNIC_INBOX)) + register_netdevice_notifier(&cnic_netdev_notifier_esx); +#endif /* (VMWARE_ESX_DDK_VERSION >= 50000) && !defined (CNIC_INBOX) */ +#else /* !defined (__VMKLNX__) */ rc = register_inetaddr_notifier(&cnic_ip_notifier); if (rc) cnic_release(); @@ -5256,6 +7513,7 @@ static int __init cnic_init(void) cnic_release(); } #endif /* defined (__VMKLNX__) */ + return rc; } @@ -5264,12 +7522,11 @@ static void __exit cnic_exit(void) #if !defined (__VMKLNX__) unregister_inetaddr_notifier(&cnic_ip_notifier); unregister_netdevice_notifier(&cnic_netdev_notifier); +#elif (VMWARE_ESX_DDK_VERSION >= 50000) && !defined (CNIC_INBOX) || \ + (VMWARE_ESX_DDK_VERSION >= 55000) && defined (CNIC_INBOX) + unregister_netdevice_notifier(&cnic_netdev_notifier_esx); #endif /* !defined (__VMKLNX__) */ cnic_release(); -#if defined (__VMKLNX__) - cnic_register_release_all_callbacks(); -#endif - destroy_workqueue(cnic_wq); } diff --git a/vmkdrivers/src_9/drivers/net/bnx2/cnic.h b/vmkdrivers/src_9/drivers/net/bnx2/cnic.h index 008a69f..62021dc 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/cnic.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/cnic.h @@ -1,8 +1,8 @@ /* cnic.h: Broadcom CNIC core network driver. * - * Copyright (c) 2006-2010 Broadcom Corporation + * Copyright (c) 2006-2013 Broadcom Corporation * - * Portions Copyright (c) VMware, Inc. 2009-2010, All Rights Reserved. + * Portions Copyright (c) VMware, Inc. 2009-2013, All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -15,10 +15,29 @@ #ifndef CNIC_H #define CNIC_H +#define CNIC_MODULE_VERSION "1.72.52.v55.1" +#define CNIC_MODULE_RELDATE "February 12, 2013" #if !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) #error "Missing either LITTLE_ENDIAN or BIG_ENDIAN definition." #endif +/* for errors (never masked) */ +#define CNIC_INFO(__fmt, __args...) \ +do { \ + printk(KERN_INFO "[%s:%d(%s)]" __fmt, \ + __func__, __LINE__, \ + dev->netdev ? (dev->netdev->name) : "?", \ + ##__args); \ + } while (0) + +#define CNIC_ERR(__fmt, __args...) \ +do { \ + printk(KERN_ERR "[%s:%d(%s)]" __fmt, \ + __func__, __LINE__, \ + dev->netdev ? (dev->netdev->name) : "?", \ + ##__args); \ + } while (0) + #ifndef DIV_ROUND_UP #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) #endif @@ -38,7 +57,13 @@ #define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T (1) /* Formerly Cstorm iSCSI EQ index (HC_INDEX_C_ISCSI_EQ_CONS) */ -#define HC_INDEX_ISCSI_EQ_CONS 6 +#define HC_INDEX_ISCSI_EQ_CONS 6 + +/* Formerly Ustorm iSCSI EQ index (HC_INDEX_U_FCOE_EQ_CONS) */ +#define HC_INDEX_FCOE_EQ_CONS 3 + +#define HC_INDEX_FWD_TX_CQ_CONS 5 +#define HC_INDEX_OOO_RX_CQ_CONS 1 #define KWQ_PAGE_CNT 4 #define KCQ_PAGE_CNT 16 @@ -138,7 +163,7 @@ struct cnic_work_node { #define BNX2X_KWQ_DATA(cp, x) \ &(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)] -#define DEF_IPID_COUNT 0xc001 +#define DEF_IPID_START 0x8000 #define DEF_KA_TIMEOUT 10000 #define DEF_KA_INTERVAL 300000 @@ -154,6 +179,159 @@ struct cnic_work_node { #define DEF_SWS_TIMER 1000 #define DEF_MAX_CWND 0xffff +#define MAX_IOOO_BLOCK_SUPPORTED (256) +#define MAX_OOO_RX_DESC_CNT (RX_DESC_CNT * 4) +#define MAX_OOO_TX_DESC_CNT (RX_DESC_CNT * 4) +#define MAX_BNX2_OOO_RX_DESC_CNT (RX_DESC_CNT * 2) +#define MAX_BNX2_OOO_TX_DESC_CNT (RX_DESC_CNT * 2) + +#define MAX_RX_OOO_RING (10) +#define MAX_TX_OOO_RING (10) + +#define BNX2_RXP_SCRATCH_OOO_RX_CID (BNX2_RXP_SCRATCH + 0x31e0) +#define BNX2_RXP_SCRATCH_OOO_FLAGS (BNX2_RXP_SCRATCH + 0x31e4) + +#define RX_CATCHUP_CID (RX_CID + 1) +#define TX_CATCHUP_CID (TX_CID + 2) +#define BNX2_IOOO_FLAGS_ENABLE (1<<0) +#define BNX2_IOOO_FLAGS_OVERRIDE (1<<31) + +#define TX_OOO_EST_NBD 8 + +#if (CNIC_ISCSI_OOO_SUPPORT) +/* packet descriptor for 1g, 10g uses skb */ +struct iooo_pkt_desc { + struct list_head list; + u32 pkt_len; + void *buf; + dma_addr_t mapping; + struct sk_buff *skb; /* 10g */ +}; + +struct iooo_block { + struct list_head list; + u32 id; + u32 pkt_cnt; + struct iooo_pkt_desc pd_head; +}; + +struct bnx2_ooo_fhdr { + u8 drop_blk_idx; + u8 drop_size; + u8 opcode; + u8 blk_idx; + u32 icid; + u16 vlan_tag; + u16 pkt_len; + u16 tcp_udp_xsum; + u16 ip_xsum; +}; + +struct bnx2x_ooo_fhdr { + u8 qidx; + u8 pl_offset; + u8 status; + u8 error; + u32 rss_hash; + u16 pkt_len; + u16 vlan; + u16 flags; + u16 bd_len; + u32 cid; + u8 blk_idx; + u8 opcode; + u8 drop_size; + u8 drop_blk_idx; +}; + +struct iooo_tx_ring_info { + u32 tx_prod_bseq; + u16 tx_prod; + u32 tx_desc_cnt; + u32 tx_desc_cnt_max; + + u16 *tx_cons_idx_ptr; + u32 tx_cid_addr; + u32 tx_bidx_addr; + u32 tx_bseq_addr; + u32 tx_buf_size; + u32 tx_max_ring; + struct iooo_pkt_desc tx_pend_pd_head; + u32 tx_pend_pd_cnt; + u32 tx_total_pkt_sent; + + struct tx_bd *tx_desc_ring[MAX_TX_OOO_RING]; + struct iooo_pkt_desc *tx_pkt_desc[MAX_OOO_TX_DESC_CNT]; + + u16 tx_cons; + u16 hw_tx_cons; + + dma_addr_t tx_desc_mapping[MAX_TX_OOO_RING]; +}; + +struct iooo_rx_ring_info { + u32 rx_prod_bseq; + u16 rx_prod; + u16 rx_cons; + + u16 *rx_cons_idx_ptr; + u32 rx_cid_addr; + u32 rx_bidx_addr; + u32 rx_bseq_addr; + + u32 rx_max_ring; + + u32 rx_desc_cnt; + u32 rx_desc_cnt_max; + u32 rx_buf_size; + + struct iooo_pkt_desc *rx_pkt_desc[MAX_OOO_RX_DESC_CNT]; + struct rx_bd *rx_desc_ring[MAX_RX_OOO_RING]; + + dma_addr_t rx_desc_mapping[MAX_RX_OOO_RING]; +}; + +struct iooo_hsi { + u32 iscsi_cid; + u8 blk_idx; + u8 opcode; + u8 drop_size; + u8 drop_blk_idx; +}; + +struct iooo_hsi_bnx2x { + u32 iscsi_cid; + u8 drop_blk_idx; + u8 drop_size; + u8 opcode; + u8 blk_idx; +}; + +struct iooo_mgmt { + unsigned long flags; + /* Control flags */ +#define IOOO_RESC_AVAIL (0) +#define IOOO_START (1) + /* Runtime flags */ +#define IOOO_BLK_FULL (10) +#define IOOO_BLK_EMPTY (11) + /* - 1G specifics */ +#define IOOO_START_HANDLER (12) +#define IOOO_START_TX_FREE (13) + u16 blk_cons; + u16 blk_prod; + u16 blk_alloc[MAX_IOOO_BLOCK_SUPPORTED]; + struct iooo_block blk[MAX_IOOO_BLOCK_SUPPORTED]; + + struct iooo_hsi hsi; + struct iooo_rx_ring_info rxr; + struct iooo_tx_ring_info txr; + u32 pkt_buf_size; + spinlock_t lock; +}; + +#endif + struct cnic_ctx { u32 cid; void *ctx; @@ -189,6 +367,10 @@ struct cnic_iscsi { struct cnic_dma task_array_info; struct cnic_dma r2tq_info; struct cnic_dma hq_info; +#if (CNIC_ISCSI_OOO_SUPPORT) + struct iooo_block pen; + u32 blk_cnt; +#endif }; struct cnic_context { @@ -201,13 +383,27 @@ struct cnic_context { unsigned long ctx_flags; #define CTX_FL_OFFLD_START 0 #define CTX_FL_DELETE_WAIT 1 -#define CTX_FL_CID_ERROR 2 +#define CTX_FL_CID_ERROR 2 u8 ulp_proto_id; union { struct cnic_iscsi *iscsi; } proto; }; +struct kcq_info { + struct cnic_dma dma; + struct kcqe **kcq; + + u16 *hw_prod_idx_ptr; + u16 sw_prod_idx; + u16 *status_idx_ptr; + u32 io_addr; + + u16 (*next_idx)(u16); + u16 (*hw_idx)(u16); +}; + + struct l5cm_spe; struct iro { @@ -232,11 +428,12 @@ struct cnic_local { u32 cnic_local_flags; #define CNIC_LCL_FL_KWQ_INIT 0x00000001 #define CNIC_LCL_FL_IRQ_REQD 0x00000002 +#define CNIC_LCL_FL_HW_START 0x00000003 struct cnic_dev *dev; struct cnic_eth_dev *ethdev; - struct iro *iro_arr; + struct iro const *iro_arr; #define IRO (((struct cnic_local *) dev->cnic_priv)->iro_arr) u32 kwq_cid_addr; @@ -255,20 +452,16 @@ struct cnic_local { volatile u16 *kwq_con_idx_ptr; u16 kwq_con_idx; - struct cnic_dma kcq_info; - struct kcqe **kcq; - - u16 *kcq_hw_prod_idx_ptr; - u16 *kcq_status_idx_ptr; - - u16 kcq_prod_idx; - u32 kcq_io_addr; + struct kcq_info kcq1; + struct kcq_info kcq2; union { void *gen; struct status_block_msix *bnx2; -#if (NEW_BNX2X_HSI == 60) - struct host_hc_status_block_e1x *bnx2x; +#if (NEW_BNX2X_HSI >= 60) + struct host_hc_status_block_e1x *bnx2x_e1x; + struct host_hc_status_block_e2 *bnx2x_e2; + /* index values - which counter to update */ #define SM_RX_ID 0 #define SM_TX_ID 1 @@ -283,19 +476,26 @@ struct cnic_local { u32 last_status_idx; struct tasklet_struct cnic_irq_task; - struct kcqe *completed_kcq[MAX_COMPLETED_KCQE]; + struct kcqe *completed_kcq[MAX_COMPLETED_KCQE]; - struct cnic_sock *csk_tbl; + struct cnic_sock *csk_tbl; struct cnic_id_tbl csk_port_tbl; - u32 next_tcp_port; + u32 next_tcp_port; - struct cnic_dma conn_buf_info; - struct cnic_dma gbl_buf_info; + struct cnic_dma conn_buf_info; + struct cnic_dma gbl_buf_info; struct cnic_iscsi *iscsi_tbl; struct cnic_context *ctx_tbl; struct cnic_id_tbl cid_tbl; atomic_t iscsi_conn; + u32 iscsi_start_cid; + + u32 fcoe_init_cid; + u32 fcoe_start_cid; + struct cnic_id_tbl fcoe_cid_tbl; + + u32 max_cid_space; /* per connection parameters */ int num_iscsi_tasks; @@ -314,7 +514,11 @@ struct cnic_local { struct tasklet_struct cnic_task; +#ifdef INIT_DELAYED_WORK struct delayed_work delete_task; +#else + struct work_struct delete_task; +#endif #ifndef HAVE_NETEVENT struct timer_list cnic_timer; @@ -329,6 +533,11 @@ struct cnic_local { u32 chip_id; int func; u32 pfid; + u8 port_mode; +#define CHIP_4_PORT_MODE 0 +#define CHIP_2_PORT_MODE 1 +#define CHIP_PORT_MODE_NONE 2 + #if defined (__VMKLNX__) vmk_EthAddress srcMACAddr; vmk_EthAddress nextHopMACAddr; @@ -340,6 +549,10 @@ struct cnic_local { vmk_uint32 cnic_local_port_nr; #endif /* defined (__VMKLNX__) */ +#if (CNIC_ISCSI_OOO_SUPPORT) + struct iooo_mgmt iooo_mgmr; +#endif + struct cnic_ops *cnic_ops; int (*start_hw)(struct cnic_dev *); void (*stop_hw)(struct cnic_dev *); @@ -353,8 +566,9 @@ struct cnic_local { void (*disable_int_sync)(struct cnic_dev *); void (*ack_int)(struct cnic_dev *); void (*close_conn)(struct cnic_sock *, u32 opcode); - u16 (*next_idx)(u16); - u16 (*hw_idx)(u16); +#if (CNIC_ISCSI_OOO_SUPPORT) + void (*stop_ooo_hw)(struct cnic_dev *); +#endif }; struct bnx2x_bd_chain_next { @@ -417,6 +631,7 @@ static u8 calc_crc8( u32 data, u8 crc) #define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type) \ (0x80 | ((CDU_CRC8(_cid, _region, _type)) & 0x7f)) +#define BNX2X_ISCSI_START_CID 18 #define BNX2X_ISCSI_NUM_CONNECTIONS 128 #define BNX2X_ISCSI_TASK_CONTEXT_SIZE 128 #define BNX2X_ISCSI_CONTEXT_MEM_SIZE 1024 @@ -428,6 +643,12 @@ static u8 calc_crc8( u32 data, u8 crc) #define BNX2X_ISCSI_PBL_NOT_CACHED 0xff #define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff +#define BNX2X_FCOE_NUM_CONNECTIONS 1024 + +#define BNX2X_FCOE_L5_CID_BASE MAX_ISCSI_TBL_SZ + +#define BNX2X_CONTEXT_MEM_SIZE 1024 + #define BNX2X_CHIP_NUM_57710 0x164e #define BNX2X_CHIP_NUM_57711 0x164f #define BNX2X_CHIP_NUM_57711E 0x1650 @@ -435,8 +656,13 @@ static u8 calc_crc8( u32 data, u8 crc) #define BNX2X_CHIP_NUM_57712E 0x1663 #define BNX2X_CHIP_NUM_57713 0x1651 #define BNX2X_CHIP_NUM_57713E 0x1652 +#define BNX2X_CHIP_NUM_57800 0x168a +#define BNX2X_CHIP_NUM_57810 0x168e +#define BNX2X_CHIP_NUM_57840 0x168d #define BNX2X_CHIP_NUM(x) (x >> 16) +#define BNX2X_CHIP_IS_57710(x) \ + (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57710) #define BNX2X_CHIP_IS_57711(x) \ (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711) #define BNX2X_CHIP_IS_57711E(x) \ @@ -451,9 +677,19 @@ static u8 calc_crc8( u32 data, u8 crc) (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713) #define BNX2X_CHIP_IS_57713E(x) \ (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713E) +#define BNX2X_CHIP_IS_57800(x) \ + (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57800) +#define BNX2X_CHIP_IS_57810(x) \ + (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57810) +#define BNX2X_CHIP_IS_57840(x) \ + (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57840) #define BNX2X_CHIP_IS_E2(x) \ (BNX2X_CHIP_IS_57712(x) || BNX2X_CHIP_IS_57712E(x) || \ BNX2X_CHIP_IS_57713(x) || BNX2X_CHIP_IS_57713E(x)) +#define BNX2X_CHIP_IS_E3(x) \ + (BNX2X_CHIP_IS_57800(x) || BNX2X_CHIP_IS_57810(x) || \ + BNX2X_CHIP_IS_57840(x)) +#define BNX2X_CHIP_IS_E2_PLUS(x) (BNX2X_CHIP_IS_E2(x) || BNX2X_CHIP_IS_E3(x)) #define IS_E1H_OFFSET BNX2X_CHIP_IS_E1H(cp->chip_id) @@ -470,15 +706,15 @@ static u8 calc_crc8( u32 data, u8 crc) (CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base, size)) > \ offsetof(struct shmem2_region, field))) -#if (NEW_BNX2X_HSI == 60) +#if (NEW_BNX2X_HSI >= 60) #define CNIC_PORT(cp) ((cp)->pfid & 1) #else #define CNIC_PORT(cp) ((cp)->func % PORT_MAX) #endif #define CNIC_FUNC(cp) ((cp)->func) -#define CNIC_PATH(cp) (!BNX2X_CHIP_IS_E2(cp->chip_id) ? 0 :\ - (CNIC_FUNC(cp) & 1)) +#define CNIC_PATH(cp) (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ? \ + 0 : (CNIC_FUNC(cp) & 1) #define CNIC_E1HVN(cp) ((cp)->pfid >> 1) #define BNX2X_HW_CID(cp, x) ((CNIC_PORT(cp) << 23) | \ @@ -486,9 +722,13 @@ static u8 calc_crc8( u32 data, u8 crc) #define BNX2X_SW_CID(x) ((x) & 0x1ffff) -#define TCP_TSTORM_OOO_DROP_AND_PROC_ACK (0) -#define TCP_TSTORM_OOO_SEND_PURE_ACK (1) -#define TCP_TSTORM_OOO_SUPPORTED (2) - +#define TCP_TSTORM_OOO_MASK (3<<4) +#if (NEW_BNX2X_HSI == 60) +#define TCP_TSTORM_OOO_DROP_AND_PROC_ACK (0<<4) +#define TCP_TSTORM_OOO_SEND_PURE_ACK (1<<4) +#define TCP_TSTORM_OOO_SUPPORTED (2<<4) +#endif + +#define BNX2X_RAMROD_TO (HZ / 4) #endif diff --git a/vmkdrivers/src_9/drivers/net/bnx2/cnic_defs.h b/vmkdrivers/src_9/drivers/net/bnx2/cnic_defs.h index 45fe912..c935297 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/cnic_defs.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/cnic_defs.h @@ -1,7 +1,7 @@ /* cnic_defs.h: Broadcom CNIC core network driver. * - * Copyright (c) 2006-2010 Broadcom Corporation + * Copyright (c) 2006-2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -13,7 +13,8 @@ #define CNIC_DEFS_H /* KWQ (kernel work queue) request op codes */ -#define L2_KWQE_OPCODE_VALUE_FLUSH (4) +#define L2_OOO_KWQE_OPCODE_VALUE_FLUSH (4) +#define L2_OOO_KWQE_OPCODE_VALUE_VM_FREE_RX_QUEUE (8) #define L4_KWQE_OPCODE_VALUE_CONNECT1 (50) #define L4_KWQE_OPCODE_VALUE_CONNECT2 (51) @@ -44,13 +45,13 @@ #define FCOE_KCQE_OPCODE_CQ_EVENT_NOTIFICATION (0x20) #define FCOE_KCQE_OPCODE_FCOE_ERROR (0x21) -#define FCOE_RAMROD_CMD_ID_INIT (FCOE_KCQE_OPCODE_INIT_FUNC) -#define FCOE_RAMROD_CMD_ID_DESTROY (FCOE_KCQE_OPCODE_DESTROY_FUNC) +#define FCOE_RAMROD_CMD_ID_INIT_FUNC (FCOE_KCQE_OPCODE_INIT_FUNC) +#define FCOE_RAMROD_CMD_ID_DESTROY_FUNC (FCOE_KCQE_OPCODE_DESTROY_FUNC) +#define FCOE_RAMROD_CMD_ID_STAT_FUNC (FCOE_KCQE_OPCODE_STAT_FUNC) #define FCOE_RAMROD_CMD_ID_OFFLOAD_CONN (FCOE_KCQE_OPCODE_OFFLOAD_CONN) #define FCOE_RAMROD_CMD_ID_ENABLE_CONN (FCOE_KCQE_OPCODE_ENABLE_CONN) #define FCOE_RAMROD_CMD_ID_DISABLE_CONN (FCOE_KCQE_OPCODE_DISABLE_CONN) #define FCOE_RAMROD_CMD_ID_DESTROY_CONN (FCOE_KCQE_OPCODE_DESTROY_CONN) -#define FCOE_RAMROD_CMD_ID_STAT (FCOE_KCQE_OPCODE_STAT_FUNC) #define FCOE_RAMROD_CMD_ID_TERMINATE_CONN (0x81) #define FCOE_KWQE_OPCODE_INIT1 (0) @@ -66,6 +67,7 @@ #define FCOE_KWQE_OPCODE_DESTROY (10) #define FCOE_KWQE_OPCODE_STAT (11) +#define FCOE_KCQE_COMPLETION_STATUS_ERROR (0x1) #define FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE (0x3) /* KCQ (kernel completion queue) response op codes */ @@ -82,11 +84,16 @@ #define L4_KCQE_OPCODE_VALUE_UPLOAD_PG (14) /* KCQ (kernel completion queue) completion status */ -#define L4_KCQE_COMPLETION_STATUS_SUCCESS (0) -#define L4_KCQE_COMPLETION_STATUS_TIMEOUT (0x93) +#define L4_KCQE_COMPLETION_STATUS_SUCCESS (0) +#define L4_KCQE_COMPLETION_STATUS_NIC_ERROR (4) +#define L4_KCQE_COMPLETION_STATUS_PARITY_ERROR (0x81) +#define L4_KCQE_COMPLETION_STATUS_TIMEOUT (0x93) -#define L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL (0x83) -#define L4_KCQE_COMPLETION_STATUS_OFFLOADED_PG (0x89) +#define L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL (0x83) +#define L4_KCQE_COMPLETION_STATUS_OFFLOADED_PG (0x89) + +#define L4_KCQE_OPCODE_VALUE_OOO_EVENT_NOTIFICATION (0xa0) +#define L4_KCQE_OPCODE_VALUE_OOO_FLUSH (0xa1) #define L4_LAYER_CODE (4) #define L2_LAYER_CODE (2) @@ -637,20 +644,20 @@ struct cstorm_iscsi_ag_context { #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN_SHIFT 12 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN (0x1<<13) #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN_SHIFT 13 -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF (0x3<<14) -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_SHIFT 14 +#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF (0x3<<14) +#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_SHIFT 14 #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66 (0x3<<16) #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66_SHIFT 16 #define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN (0x1<<18) #define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN_SHIFT 18 -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION0_CF_EN (0x1<<19) -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION0_CF_EN_SHIFT 19 -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION1_CF_EN (0x1<<20) -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION1_CF_EN_SHIFT 20 -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION2_CF_EN (0x1<<21) -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION2_CF_EN_SHIFT 21 -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_EN (0x1<<22) -#define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_EN_SHIFT 22 +#define __CSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<19) +#define __CSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 19 +#define __CSTORM_ISCSI_AG_CONTEXT_AUX2_CF_EN (0x1<<20) +#define __CSTORM_ISCSI_AG_CONTEXT_AUX2_CF_EN_SHIFT 20 +#define __CSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<21) +#define __CSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 21 +#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN (0x1<<22) +#define __CSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN_SHIFT 22 #define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE (0x7<<23) #define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE_SHIFT 23 #define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE (0x3<<26) @@ -690,574 +697,668 @@ struct cstorm_iscsi_ag_context { #endif #if defined(__BIG_ENDIAN) u16 __reserved64; - u16 __cq_u_prod0; + u16 cq_u_prod; #elif defined(__LITTLE_ENDIAN) - u16 __cq_u_prod0; + u16 cq_u_prod; u16 __reserved64; #endif u32 __cq_u_prod1; #if defined(__BIG_ENDIAN) u16 __agg_vars3; - u16 __cq_u_prod2; + u16 cq_u_pend; #elif defined(__LITTLE_ENDIAN) - u16 __cq_u_prod2; + u16 cq_u_pend; u16 __agg_vars3; #endif #if defined(__BIG_ENDIAN) u16 __aux2_th; - u16 __cq_u_prod3; + u16 aux2_val; #elif defined(__LITTLE_ENDIAN) - u16 __cq_u_prod3; + u16 aux2_val; u16 __aux2_th; #endif }; /* - * Parameters initialized during offloaded according to FLOGI/PLOGI/PRLI and used in FCoE context section + * The fcoe extra aggregative context section of Tstorm */ -struct ustorm_fcoe_params { +struct tstorm_fcoe_extra_ag_context_section { + u32 __agg_val1; #if defined(__BIG_ENDIAN) - u16 fcoe_conn_id; - u16 flags; -#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS (0x1<<0) -#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS_SHIFT 0 -#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES (0x1<<1) -#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES_SHIFT 1 -#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT (0x1<<2) -#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT_SHIFT 2 -#define USTORM_FCOE_PARAMS_B_CONF_REQ (0x1<<3) -#define USTORM_FCOE_PARAMS_B_CONF_REQ_SHIFT 3 -#define USTORM_FCOE_PARAMS_B_REC_VALID (0x1<<4) -#define USTORM_FCOE_PARAMS_B_REC_VALID_SHIFT 4 -#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT (0x1<<5) -#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT_SHIFT 5 -#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT (0x1<<6) -#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT_SHIFT 6 -#define USTORM_FCOE_PARAMS_B_C2_VALID (0x1<<7) -#define USTORM_FCOE_PARAMS_B_C2_VALID_SHIFT 7 -#define USTORM_FCOE_PARAMS_B_ACK_0 (0x1<<8) -#define USTORM_FCOE_PARAMS_B_ACK_0_SHIFT 8 -#define USTORM_FCOE_PARAMS_RSRV0 (0x7F<<9) -#define USTORM_FCOE_PARAMS_RSRV0_SHIFT 9 + u8 __tcp_agg_vars2; + u8 __agg_val3; + u16 __agg_val2; #elif defined(__LITTLE_ENDIAN) - u16 flags; -#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS (0x1<<0) -#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS_SHIFT 0 -#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES (0x1<<1) -#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES_SHIFT 1 -#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT (0x1<<2) -#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT_SHIFT 2 -#define USTORM_FCOE_PARAMS_B_CONF_REQ (0x1<<3) -#define USTORM_FCOE_PARAMS_B_CONF_REQ_SHIFT 3 -#define USTORM_FCOE_PARAMS_B_REC_VALID (0x1<<4) -#define USTORM_FCOE_PARAMS_B_REC_VALID_SHIFT 4 -#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT (0x1<<5) -#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT_SHIFT 5 -#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT (0x1<<6) -#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT_SHIFT 6 -#define USTORM_FCOE_PARAMS_B_C2_VALID (0x1<<7) -#define USTORM_FCOE_PARAMS_B_C2_VALID_SHIFT 7 -#define USTORM_FCOE_PARAMS_B_ACK_0 (0x1<<8) -#define USTORM_FCOE_PARAMS_B_ACK_0_SHIFT 8 -#define USTORM_FCOE_PARAMS_RSRV0 (0x7F<<9) -#define USTORM_FCOE_PARAMS_RSRV0_SHIFT 9 - u16 fcoe_conn_id; + u16 __agg_val2; + u8 __agg_val3; + u8 __tcp_agg_vars2; #endif #if defined(__BIG_ENDIAN) - u8 hc_csdm_byte_en; - u8 func_id; - u8 port_id; - u8 vnic_id; + u16 __agg_val5; + u8 __agg_val6; + u8 __tcp_agg_vars3; #elif defined(__LITTLE_ENDIAN) - u8 vnic_id; - u8 port_id; - u8 func_id; - u8 hc_csdm_byte_en; -#endif -#if defined(__BIG_ENDIAN) - u16 rx_total_conc_seqs; - u16 rx_max_fc_pay_len; -#elif defined(__LITTLE_ENDIAN) - u16 rx_max_fc_pay_len; - u16 rx_total_conc_seqs; -#endif -#if defined(__BIG_ENDIAN) - u16 ox_id; - u16 rx_max_conc_seqs; -#elif defined(__LITTLE_ENDIAN) - u16 rx_max_conc_seqs; - u16 ox_id; + u8 __tcp_agg_vars3; + u8 __agg_val6; + u16 __agg_val5; #endif + u32 __lcq_prod; + u32 rtt_seq; + u32 rtt_time; + u32 __reserved66; + u32 wnd_right_edge; + u32 tcp_agg_vars1; +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN (0x1<<9) +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN_SHIFT 9 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) +#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) +#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 + u32 snd_max; + u32 __lcq_cons; + u32 __reserved2; }; /* - * FCoE 16-bits index structure + * The fcoe aggregative context of Tstorm */ -struct fcoe_idx16_fields { - u16 fields; -#define FCOE_IDX16_FIELDS_IDX (0x7FFF<<0) -#define FCOE_IDX16_FIELDS_IDX_SHIFT 0 -#define FCOE_IDX16_FIELDS_MSB (0x1<<15) -#define FCOE_IDX16_FIELDS_MSB_SHIFT 15 +struct tstorm_fcoe_ag_context { +#if defined(__BIG_ENDIAN) + u16 ulp_credit; + u8 agg_vars1; +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4) +#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4 +#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6) +#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6 +#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7) +#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7 + u8 state; +#elif defined(__LITTLE_ENDIAN) + u8 state; + u8 agg_vars1; +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4) +#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4 +#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6) +#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6 +#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7) +#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7 + u16 ulp_credit; +#endif +#if defined(__BIG_ENDIAN) + u16 __agg_val4; + u16 agg_vars2; +#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0) +#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0 +#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1) +#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1 +#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2) +#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2 +#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4) +#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4 +#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6) +#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6 +#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8) +#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8 +#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10) +#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10 +#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11) +#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11 +#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12) +#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12 +#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13) +#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13 +#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14) +#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 +#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15) +#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 +#elif defined(__LITTLE_ENDIAN) + u16 agg_vars2; +#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0) +#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0 +#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1) +#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1 +#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2) +#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2 +#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4) +#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4 +#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6) +#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6 +#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8) +#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8 +#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10) +#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10 +#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11) +#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11 +#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12) +#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12 +#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13) +#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13 +#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14) +#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 +#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15) +#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 + u16 __agg_val4; +#endif + struct tstorm_fcoe_extra_ag_context_section __extra_section; +}; + + + +/* + * The tcp aggregative context section of Tstorm + */ +struct tstorm_tcp_tcp_ag_context_section { + u32 __agg_val1; +#if defined(__BIG_ENDIAN) + u8 __tcp_agg_vars2; + u8 __agg_val3; + u16 __agg_val2; +#elif defined(__LITTLE_ENDIAN) + u16 __agg_val2; + u8 __agg_val3; + u8 __tcp_agg_vars2; +#endif +#if defined(__BIG_ENDIAN) + u16 __agg_val5; + u8 __agg_val6; + u8 __tcp_agg_vars3; +#elif defined(__LITTLE_ENDIAN) + u8 __tcp_agg_vars3; + u8 __agg_val6; + u16 __agg_val5; +#endif + u32 snd_nxt; + u32 rtt_seq; + u32 rtt_time; + u32 __reserved66; + u32 wnd_right_edge; + u32 tcp_agg_vars1; +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 +#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) +#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 +#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) +#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 +#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) +#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 +#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) +#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) +#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 + u32 snd_max; + u32 snd_una; + u32 __reserved2; }; /* - * FCoE 16-bits index union + * The iscsi aggregative context of Tstorm */ -union fcoe_idx16_field_union { - struct fcoe_idx16_fields fields; - u16 val; +struct tstorm_iscsi_ag_context { +#if defined(__BIG_ENDIAN) + u16 ulp_credit; + u8 agg_vars1; +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4) +#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4 +#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6) +#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6 +#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7) +#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7 + u8 state; +#elif defined(__LITTLE_ENDIAN) + u8 state; + u8 agg_vars1; +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4) +#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4 +#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6) +#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6 +#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7) +#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7 + u16 ulp_credit; +#endif +#if defined(__BIG_ENDIAN) + u16 __agg_val4; + u16 agg_vars2; +#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0) +#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0 +#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1) +#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1 +#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2) +#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2 +#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4) +#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4 +#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6) +#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6 +#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8) +#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8 +#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10) +#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10 +#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11) +#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11 +#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12) +#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12 +#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13) +#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13 +#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14) +#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 +#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15) +#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 +#elif defined(__LITTLE_ENDIAN) + u16 agg_vars2; +#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0) +#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0 +#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1) +#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1 +#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2) +#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2 +#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4) +#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4 +#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6) +#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6 +#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8) +#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8 +#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10) +#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10 +#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11) +#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11 +#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12) +#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12 +#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13) +#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13 +#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14) +#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 +#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15) +#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 + u16 __agg_val4; +#endif + struct tstorm_tcp_tcp_ag_context_section tcp; }; + + /* - * 4 regs size + * The fcoe aggregative context of Ustorm */ -struct fcoe_bd_ctx { - u32 buf_addr_hi; - u32 buf_addr_lo; +struct ustorm_fcoe_ag_context { #if defined(__BIG_ENDIAN) - u16 rsrv0; - u16 buf_len; + u8 __aux_counter_flags; + u8 agg_vars2; +#define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0) +#define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 0 +#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2) +#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 2 +#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) +#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 +#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) +#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 + u8 agg_vars1; +#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4) +#define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 4 +#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6) +#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 6 + u8 state; #elif defined(__LITTLE_ENDIAN) - u16 buf_len; - u16 rsrv0; + u8 state; + u8 agg_vars1; +#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4) +#define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 4 +#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6) +#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 6 + u8 agg_vars2; +#define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0) +#define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 0 +#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2) +#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 2 +#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) +#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 +#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) +#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 + u8 __aux_counter_flags; #endif #if defined(__BIG_ENDIAN) - u16 rsrv1; - u16 flags; + u8 cdu_usage; + u8 agg_misc2; + u16 pbf_tx_seq_ack; #elif defined(__LITTLE_ENDIAN) - u16 flags; - u16 rsrv1; + u16 pbf_tx_seq_ack; + u8 agg_misc2; + u8 cdu_usage; #endif -}; - -/* - * Parameters required for placement according to SGL - */ -struct ustorm_fcoe_data_place { + u32 agg_misc4; #if defined(__BIG_ENDIAN) - u16 cached_sge_off; - u8 cached_num_sges; - u8 cached_sge_idx; + u8 agg_val3_th; + u8 agg_val3; + u16 agg_misc3; #elif defined(__LITTLE_ENDIAN) - u8 cached_sge_idx; - u8 cached_num_sges; - u16 cached_sge_off; + u16 agg_misc3; + u8 agg_val3; + u8 agg_val3_th; #endif - struct fcoe_bd_ctx cached_sge[3]; -}; - -struct fcoe_task_ctx_entry_txwr_rxrd { + u32 expired_task_id; + u32 agg_misc4_th; #if defined(__BIG_ENDIAN) - u16 verify_tx_seq; - u8 init_flags; -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_TASK_TYPE (0x7<<0) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_TASK_TYPE_SHIFT 0 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_DEV_TYPE (0x1<<3) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_DEV_TYPE_SHIFT 3 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_CLASS_TYPE (0x1<<4) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_CLASS_TYPE_SHIFT 4 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_SINGLE_SGE (0x1<<5) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_SINGLE_SGE_SHIFT 5 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_RSRV5 (0x3<<6) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_RSRV5_SHIFT 6 - u8 tx_flags; -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_TX_STATE (0xF<<0) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_TX_STATE_SHIFT 0 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_RSRV4 (0xF<<4) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_RSRV4_SHIFT 4 -#elif defined(__LITTLE_ENDIAN) - u8 tx_flags; -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_TX_STATE (0xF<<0) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_TX_STATE_SHIFT 0 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_RSRV4 (0xF<<4) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_RSRV4_SHIFT 4 - u8 init_flags; -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_TASK_TYPE (0x7<<0) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_TASK_TYPE_SHIFT 0 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_DEV_TYPE (0x1<<3) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_DEV_TYPE_SHIFT 3 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_CLASS_TYPE (0x1<<4) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_CLASS_TYPE_SHIFT 4 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_SINGLE_SGE (0x1<<5) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_SINGLE_SGE_SHIFT 5 -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_RSRV5 (0x3<<6) -#define FCOE_TASK_CTX_ENTRY_TXWR_RXRD_RSRV5_SHIFT 6 - u16 verify_tx_seq; -#endif -}; - -struct fcoe_fcp_cmd_payload { - u32 opaque[8]; -}; - -struct fcoe_fc_hdr { -#if defined(__BIG_ENDIAN) - u8 cs_ctl; - u8 s_id[3]; -#elif defined(__LITTLE_ENDIAN) - u8 s_id[3]; - u8 cs_ctl; -#endif -#if defined(__BIG_ENDIAN) - u8 r_ctl; - u8 d_id[3]; -#elif defined(__LITTLE_ENDIAN) - u8 d_id[3]; - u8 r_ctl; -#endif -#if defined(__BIG_ENDIAN) - u8 seq_id; - u8 df_ctl; - u16 seq_cnt; -#elif defined(__LITTLE_ENDIAN) - u16 seq_cnt; - u8 df_ctl; - u8 seq_id; -#endif -#if defined(__BIG_ENDIAN) - u8 type; - u8 f_ctl[3]; -#elif defined(__LITTLE_ENDIAN) - u8 f_ctl[3]; - u8 type; -#endif - u32 parameters; -#if defined(__BIG_ENDIAN) - u16 ox_id; - u16 rx_id; -#elif defined(__LITTLE_ENDIAN) - u16 rx_id; - u16 ox_id; -#endif -}; - -struct fcoe_fc_frame { - struct fcoe_fc_hdr fc_hdr; - u32 reserved0[2]; -}; - -union fcoe_cmd_flow_info { - struct fcoe_fcp_cmd_payload fcp_cmd_payload; - struct fcoe_fc_frame mp_fc_frame; -}; - -struct fcoe_read_flow_info { - struct fcoe_fc_hdr fc_data_in_hdr; - u32 reserved[2]; -}; - -struct fcoe_fcp_xfr_rdy_payload { - u32 burst_len; - u32 data_ro; -}; - -struct fcoe_write_flow_info { - struct fcoe_fc_hdr fc_data_out_hdr; - struct fcoe_fcp_xfr_rdy_payload fcp_xfr_payload; -}; - -struct fcoe_fcp_rsp_flags { - u8 flags; -#define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID (0x1<<0) -#define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID_SHIFT 0 -#define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID (0x1<<1) -#define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID_SHIFT 1 -#define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER (0x1<<2) -#define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER_SHIFT 2 -#define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER (0x1<<3) -#define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER_SHIFT 3 -#define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ (0x1<<4) -#define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ_SHIFT 4 -#define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS (0x7<<5) -#define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS_SHIFT 5 -}; - -struct fcoe_fcp_rsp_payload { - struct regpair reserved0; - u32 fcp_resid; -#if defined(__BIG_ENDIAN) - u16 retry_delay_timer; - struct fcoe_fcp_rsp_flags fcp_flags; - u8 scsi_status_code; -#elif defined(__LITTLE_ENDIAN) - u8 scsi_status_code; - struct fcoe_fcp_rsp_flags fcp_flags; - u16 retry_delay_timer; -#endif - u32 fcp_rsp_len; - u32 fcp_sns_len; -}; - -/* - * Fixed size structure in order to plant it in Union structure - */ -struct fcoe_fcp_rsp_union { - struct fcoe_fcp_rsp_payload payload; - struct regpair reserved0; -}; - -/* - * Fixed size structure in order to plant it in Union structure - */ -struct fcoe_abts_rsp_union { - u32 r_ctl; - u32 abts_rsp_payload[7]; -}; - -union fcoe_rsp_flow_info { - struct fcoe_fcp_rsp_union fcp_rsp; - struct fcoe_abts_rsp_union abts_rsp; -}; - -struct fcoe_cleanup_flow_info { -#if defined(__BIG_ENDIAN) - u16 reserved1; - u16 task_id; -#elif defined(__LITTLE_ENDIAN) - u16 task_id; - u16 reserved1; -#endif - u32 reserved2[7]; -}; - -/* - * 32 bytes used for general purposes - */ -union fcoe_general_task_ctx { - union fcoe_cmd_flow_info cmd_info; - struct fcoe_read_flow_info read_info; - struct fcoe_write_flow_info write_info; - union fcoe_rsp_flow_info rsp_info; - struct fcoe_cleanup_flow_info cleanup_info; - u32 comp_info[8]; -}; - -struct fcoe_s_stat_ctx { - u8 flags; -#define FCOE_S_STAT_CTX_ACTIVE (0x1<<0) -#define FCOE_S_STAT_CTX_ACTIVE_SHIFT 0 -#define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND (0x1<<1) -#define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND_SHIFT 1 -#define FCOE_S_STAT_CTX_ABTS_PERFORMED (0x1<<2) -#define FCOE_S_STAT_CTX_ABTS_PERFORMED_SHIFT 2 -#define FCOE_S_STAT_CTX_SEQ_TIMEOUT (0x1<<3) -#define FCOE_S_STAT_CTX_SEQ_TIMEOUT_SHIFT 3 -#define FCOE_S_STAT_CTX_P_RJT (0x1<<4) -#define FCOE_S_STAT_CTX_P_RJT_SHIFT 4 -#define FCOE_S_STAT_CTX_ACK_EOFT (0x1<<5) -#define FCOE_S_STAT_CTX_ACK_EOFT_SHIFT 5 -#define FCOE_S_STAT_CTX_RSRV1 (0x3<<6) -#define FCOE_S_STAT_CTX_RSRV1_SHIFT 6 -}; - -/* - * Common section. Both TX and RX processing might write and read from it in different flows - */ -struct fcoe_task_ctx_entry_tx_rx_cmn { - u32 data_2_trns; - union fcoe_general_task_ctx general; -#if defined(__BIG_ENDIAN) - u16 tx_low_seq_cnt; - struct fcoe_s_stat_ctx tx_s_stat; - u8 tx_seq_id; -#elif defined(__LITTLE_ENDIAN) - u8 tx_seq_id; - struct fcoe_s_stat_ctx tx_s_stat; - u16 tx_low_seq_cnt; -#endif - u32 common_flags; -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_CID (0xFFFFFF<<0) -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_CID_SHIFT 0 -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_VALID (0x1<<24) -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_VALID_SHIFT 24 -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_SEQ_INIT (0x1<<25) -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_SEQ_INIT_SHIFT 25 -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_PEND_XFER (0x1<<26) -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_PEND_XFER_SHIFT 26 -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_PEND_CONF (0x1<<27) -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_PEND_CONF_SHIFT 27 -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_EXP_FIRST_FRAME (0x1<<28) -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_EXP_FIRST_FRAME_SHIFT 28 -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_RSRV (0x7<<29) -#define FCOE_TASK_CTX_ENTRY_TX_RX_CMN_RSRV_SHIFT 29 -}; - -struct fcoe_task_ctx_entry_rxwr_txrd { -#if defined(__BIG_ENDIAN) - u16 rx_id; - u16 rx_flags; -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_RX_STATE (0xF<<0) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_RX_STATE_SHIFT 0 -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_NUM_RQ_WQE (0x7<<4) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_NUM_RQ_WQE_SHIFT 4 -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_CONF_REQ (0x1<<7) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_CONF_REQ_SHIFT 7 -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_MISS_FRAME (0x1<<8) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_MISS_FRAME_SHIFT 8 -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_RESERVED0 (0x7F<<9) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_RESERVED0_SHIFT 9 -#elif defined(__LITTLE_ENDIAN) - u16 rx_flags; -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_RX_STATE (0xF<<0) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_RX_STATE_SHIFT 0 -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_NUM_RQ_WQE (0x7<<4) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_NUM_RQ_WQE_SHIFT 4 -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_CONF_REQ (0x1<<7) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_CONF_REQ_SHIFT 7 -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_MISS_FRAME (0x1<<8) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_MISS_FRAME_SHIFT 8 -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_RESERVED0 (0x7F<<9) -#define FCOE_TASK_CTX_ENTRY_RXWR_TXRD_RESERVED0_SHIFT 9 - u16 rx_id; -#endif -}; - -struct fcoe_seq_ctx { -#if defined(__BIG_ENDIAN) - u16 low_seq_cnt; - struct fcoe_s_stat_ctx s_stat; - u8 seq_id; -#elif defined(__LITTLE_ENDIAN) - u8 seq_id; - struct fcoe_s_stat_ctx s_stat; - u16 low_seq_cnt; -#endif -#if defined(__BIG_ENDIAN) - u16 err_seq_cnt; - u16 high_seq_cnt; -#elif defined(__LITTLE_ENDIAN) - u16 high_seq_cnt; - u16 err_seq_cnt; -#endif - u32 low_exp_ro; - u32 high_exp_ro; -}; - -struct fcoe_single_sge_ctx { - struct regpair cur_buf_addr; -#if defined(__BIG_ENDIAN) - u16 reserved0; - u16 cur_buf_rem; -#elif defined(__LITTLE_ENDIAN) - u16 cur_buf_rem; - u16 reserved0; -#endif -}; - -struct fcoe_mul_sges_ctx { - struct regpair cur_sge_addr; -#if defined(__BIG_ENDIAN) - u8 sgl_size; - u8 cur_sge_idx; - u16 cur_sge_off; -#elif defined(__LITTLE_ENDIAN) - u16 cur_sge_off; - u8 cur_sge_idx; - u8 sgl_size; -#endif -}; - -union fcoe_sgl_ctx { - struct fcoe_single_sge_ctx single_sge; - struct fcoe_mul_sges_ctx mul_sges; -}; - -struct fcoe_task_ctx_entry_rx_only { - struct fcoe_seq_ctx seq_ctx; - struct fcoe_seq_ctx ooo_seq_ctx; - u32 rsrv3; - union fcoe_sgl_ctx sgl_ctx; -}; - -struct ustorm_fcoe_task_ctx_entry_rd { - struct fcoe_task_ctx_entry_txwr_rxrd tx_wr_rx_rd; - struct fcoe_task_ctx_entry_tx_rx_cmn cmn; - struct fcoe_task_ctx_entry_rxwr_txrd rx_wr_tx_rd; - struct fcoe_task_ctx_entry_rx_only rx_wr; - u32 reserved; -}; - -/* - * Ustorm FCoE Storm Context - */ -struct ustorm_fcoe_st_context { - struct ustorm_fcoe_params fcoe_params; - struct regpair task_addr; - struct regpair cq_base_addr; - struct regpair rq_pbl_base; - struct regpair rq_cur_page_addr; - struct regpair confq_pbl_base_addr; - struct regpair conn_db_base; - struct regpair xfrq_base_addr; - struct regpair lcq_base_addr; -#if defined(__BIG_ENDIAN) - union fcoe_idx16_field_union rq_cons; - union fcoe_idx16_field_union rq_prod; -#elif defined(__LITTLE_ENDIAN) - union fcoe_idx16_field_union rq_prod; - union fcoe_idx16_field_union rq_cons; -#endif -#if defined(__BIG_ENDIAN) - u16 xfrq_prod; + u16 cq_prod; u16 cq_cons; #elif defined(__LITTLE_ENDIAN) u16 cq_cons; - u16 xfrq_prod; + u16 cq_prod; #endif #if defined(__BIG_ENDIAN) - u16 lcq_cons; - u16 hc_cram_address; + u16 __reserved2; + u8 decision_rules; +#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0) +#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 0 +#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) +#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 +#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6) +#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 6 +#define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7) +#define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 7 + u8 decision_rule_enable_bits; +#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0) +#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 0 +#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) +#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 +#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2) +#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 2 +#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3) +#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 +#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4) +#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 4 +#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5) +#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 5 +#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6) +#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 +#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) +#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 #elif defined(__LITTLE_ENDIAN) - u16 hc_cram_address; - u16 lcq_cons; + u8 decision_rule_enable_bits; +#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0) +#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 0 +#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) +#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 +#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2) +#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 2 +#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3) +#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 +#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4) +#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 4 +#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5) +#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 5 +#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6) +#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 +#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) +#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 + u8 decision_rules; +#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0) +#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 0 +#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) +#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 +#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6) +#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 6 +#define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7) +#define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 7 + u16 __reserved2; #endif -#if defined(__BIG_ENDIAN) - u16 sq_xfrq_lcq_confq_size; - u16 confq_prod; -#elif defined(__LITTLE_ENDIAN) - u16 confq_prod; - u16 sq_xfrq_lcq_confq_size; -#endif -#if defined(__BIG_ENDIAN) - u8 hc_csdm_agg_int; - u8 flags; -#define USTORM_FCOE_ST_CONTEXT_MID_SEQ_PROC_FLAG (0x1<<0) -#define USTORM_FCOE_ST_CONTEXT_MID_SEQ_PROC_FLAG_SHIFT 0 -#define USTORM_FCOE_ST_CONTEXT_CACHED_CONN_FLAG (0x1<<1) -#define USTORM_FCOE_ST_CONTEXT_CACHED_CONN_FLAG_SHIFT 1 -#define USTORM_FCOE_ST_CONTEXT_CACHED_TCE_FLAG (0x1<<2) -#define USTORM_FCOE_ST_CONTEXT_CACHED_TCE_FLAG_SHIFT 2 -#define USTORM_FCOE_ST_CONTEXT_RSRV1 (0x1F<<3) -#define USTORM_FCOE_ST_CONTEXT_RSRV1_SHIFT 3 - u8 available_rqes; - u8 sp_q_flush_cnt; -#elif defined(__LITTLE_ENDIAN) - u8 sp_q_flush_cnt; - u8 available_rqes; - u8 flags; -#define USTORM_FCOE_ST_CONTEXT_MID_SEQ_PROC_FLAG (0x1<<0) -#define USTORM_FCOE_ST_CONTEXT_MID_SEQ_PROC_FLAG_SHIFT 0 -#define USTORM_FCOE_ST_CONTEXT_CACHED_CONN_FLAG (0x1<<1) -#define USTORM_FCOE_ST_CONTEXT_CACHED_CONN_FLAG_SHIFT 1 -#define USTORM_FCOE_ST_CONTEXT_CACHED_TCE_FLAG (0x1<<2) -#define USTORM_FCOE_ST_CONTEXT_CACHED_TCE_FLAG_SHIFT 2 -#define USTORM_FCOE_ST_CONTEXT_RSRV1 (0x1F<<3) -#define USTORM_FCOE_ST_CONTEXT_RSRV1_SHIFT 3 - u8 hc_csdm_agg_int; -#endif - struct ustorm_fcoe_data_place data_place; - struct ustorm_fcoe_task_ctx_entry_rd tce; }; + /* - * The FCoE non-aggregative context of Tstorm + * The iscsi aggregative context of Ustorm */ -struct tstorm_fcoe_st_context { - struct regpair reserved0; - struct regpair reserved1; +struct ustorm_iscsi_ag_context { +#if defined(__BIG_ENDIAN) + u8 __aux_counter_flags; + u8 agg_vars2; +#define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0) +#define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0 +#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2) +#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2 +#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) +#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 +#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) +#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 + u8 agg_vars1; +#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4) +#define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4 +#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6) +#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6 + u8 state; +#elif defined(__LITTLE_ENDIAN) + u8 state; + u8 agg_vars1; +#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4) +#define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4 +#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6) +#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6 + u8 agg_vars2; +#define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0) +#define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0 +#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2) +#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2 +#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) +#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 +#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) +#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 + u8 __aux_counter_flags; +#endif +#if defined(__BIG_ENDIAN) + u8 cdu_usage; + u8 agg_misc2; + u16 __cq_local_comp_itt_val; +#elif defined(__LITTLE_ENDIAN) + u16 __cq_local_comp_itt_val; + u8 agg_misc2; + u8 cdu_usage; +#endif + u32 agg_misc4; +#if defined(__BIG_ENDIAN) + u8 agg_val3_th; + u8 agg_val3; + u16 agg_misc3; +#elif defined(__LITTLE_ENDIAN) + u16 agg_misc3; + u8 agg_val3; + u8 agg_val3_th; +#endif + u32 agg_val1; + u32 agg_misc4_th; +#if defined(__BIG_ENDIAN) + u16 agg_val2_th; + u16 agg_val2; +#elif defined(__LITTLE_ENDIAN) + u16 agg_val2; + u16 agg_val2_th; +#endif +#if defined(__BIG_ENDIAN) + u16 __reserved2; + u8 decision_rules; +#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) +#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 +#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) +#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 +#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) +#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 +#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7) +#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7 + u8 decision_rule_enable_bits; +#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0) +#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0 +#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) +#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 +#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2) +#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2 +#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3) +#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 +#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4) +#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4 +#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5) +#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5 +#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6) +#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 +#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) +#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 +#elif defined(__LITTLE_ENDIAN) + u8 decision_rule_enable_bits; +#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0) +#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0 +#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) +#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 +#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2) +#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2 +#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3) +#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 +#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4) +#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4 +#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5) +#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5 +#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6) +#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 +#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) +#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 + u8 decision_rules; +#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) +#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 +#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) +#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 +#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) +#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 +#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7) +#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7 + u16 __reserved2; +#endif }; + /* * The fcoe aggregative context section of Xstorm */ @@ -1268,8 +1369,8 @@ struct xstorm_fcoe_extra_ag_context_section { #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51_SHIFT 0 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 -#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_PBF_TX_SEQ_ACK_CF (0x3<<4) -#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_PBF_TX_SEQ_ACK_CF_SHIFT 4 +#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) +#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN (0x1<<6) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN_SHIFT 6 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG (0x1<<7) @@ -1284,20 +1385,20 @@ struct xstorm_fcoe_extra_ag_context_section { #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED51_SHIFT 0 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 -#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_PBF_TX_SEQ_ACK_CF (0x3<<4) -#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_PBF_TX_SEQ_ACK_CF_SHIFT 4 +#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) +#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN (0x1<<6) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_CLEAR_DA_TIMER_EN_SHIFT 6 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG (0x1<<7) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_DA_EXPIRATION_FLAG_SHIFT 7 #endif - u32 __task_addr_lo; - u32 __task_addr_hi; + u32 snd_nxt; + u32 tx_wnd; u32 __reserved55; - u32 __tx_prods; + u32 local_adv_wnd; #if defined(__BIG_ENDIAN) u8 __agg_val8_th; - u8 __agg_val8; + u8 __tx_dest; u16 tcp_agg_vars2; #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57 (0x1<<0) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57_SHIFT 0 @@ -1313,8 +1414,8 @@ struct xstorm_fcoe_extra_ag_context_section { #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60_SHIFT 5 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN (0x1<<6) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN_SHIFT 6 -#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_PBF_TX_SEQ_ACK_CF_EN (0x1<<7) -#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_PBF_TX_SEQ_ACK_CF_EN_SHIFT 7 +#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) +#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN (0x1<<8) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN_SHIFT 8 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) @@ -1323,8 +1424,8 @@ struct xstorm_fcoe_extra_ag_context_section { #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 -#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX8_CF (0x3<<14) -#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX8_CF_SHIFT 14 +#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) +#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 #elif defined(__LITTLE_ENDIAN) u16 tcp_agg_vars2; #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED57 (0x1<<0) @@ -1341,8 +1442,8 @@ struct xstorm_fcoe_extra_ag_context_section { #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED60_SHIFT 5 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN (0x1<<6) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_ACK_TO_FE_UPDATED_EN_SHIFT 6 -#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_PBF_TX_SEQ_ACK_CF_EN (0x1<<7) -#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_PBF_TX_SEQ_ACK_CF_EN_SHIFT 7 +#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) +#define XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN (0x1<<8) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED_TX_FIN_FLAG_EN_SHIFT 8 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) @@ -1351,9 +1452,9 @@ struct xstorm_fcoe_extra_ag_context_section { #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) #define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 -#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX8_CF (0x3<<14) -#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX8_CF_SHIFT 14 - u8 __agg_val8; +#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) +#define __XSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 + u8 __tx_dest; u8 __agg_val8_th; #endif u32 __sq_base_addr_lo; @@ -1587,9 +1688,9 @@ struct xstorm_fcoe_ag_context { #if defined(__BIG_ENDIAN) u8 __reserved1; u8 __agg_val6_th; - u16 __confq_tx_prod; + u16 __agg_val9; #elif defined(__LITTLE_ENDIAN) - u16 __confq_tx_prod; + u16 __agg_val9; u8 __agg_val6_th; u8 __reserved1; #endif @@ -1601,16 +1702,16 @@ struct xstorm_fcoe_ag_context { u16 confq_cons; #endif u32 agg_vars8; -#define __XSTORM_FCOE_AG_CONTEXT_CACHE_WQE_IDX (0xFFFFFF<<0) -#define __XSTORM_FCOE_AG_CONTEXT_CACHE_WQE_IDX_SHIFT 0 +#define XSTORM_FCOE_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0) +#define XSTORM_FCOE_AG_CONTEXT_AGG_MISC2_SHIFT 0 #define XSTORM_FCOE_AG_CONTEXT_AGG_MISC3 (0xFF<<24) #define XSTORM_FCOE_AG_CONTEXT_AGG_MISC3_SHIFT 24 #if defined(__BIG_ENDIAN) - u16 ox_id; + u16 agg_misc0; u16 sq_prod; #elif defined(__LITTLE_ENDIAN) u16 sq_prod; - u16 ox_id; + u16 agg_misc0; #endif #if defined(__BIG_ENDIAN) u8 agg_val3; @@ -1624,986 +1725,51 @@ struct xstorm_fcoe_ag_context { u8 agg_val3; #endif #if defined(__BIG_ENDIAN) - u16 __pbf_tx_seq_ack; + u16 __agg_misc1; u16 agg_limit1; #elif defined(__LITTLE_ENDIAN) u16 agg_limit1; - u16 __pbf_tx_seq_ack; + u16 __agg_misc1; #endif u32 completion_seq; u32 confq_pbl_base_lo; u32 confq_pbl_base_hi; }; -/* - * The fcoe extra aggregative context section of Tstorm - */ -struct tstorm_fcoe_extra_ag_context_section { - u32 __agg_val1; -#if defined(__BIG_ENDIAN) - u8 __tcp_agg_vars2; - u8 __agg_val3; - u16 __agg_val2; -#elif defined(__LITTLE_ENDIAN) - u16 __agg_val2; - u8 __agg_val3; - u8 __tcp_agg_vars2; -#endif -#if defined(__BIG_ENDIAN) - u16 __agg_val5; - u8 __agg_val6; - u8 __tcp_agg_vars3; -#elif defined(__LITTLE_ENDIAN) - u8 __tcp_agg_vars3; - u8 __agg_val6; - u16 __agg_val5; -#endif - u32 __lcq_prod; - u32 rtt_seq; - u32 rtt_time; - u32 __reserved66; - u32 wnd_right_edge; - u32 tcp_agg_vars1; -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN (0x1<<9) -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_LCQ_SND_EN_SHIFT 9 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) -#define __TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) -#define TSTORM_FCOE_EXTRA_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 - u32 snd_max; - u32 __lcq_cons; - u32 __reserved2; -}; -/* - * The fcoe aggregative context of Tstorm - */ -struct tstorm_fcoe_ag_context { -#if defined(__BIG_ENDIAN) - u16 ulp_credit; - u8 agg_vars1; -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 -#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4) -#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4 -#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6) -#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6 -#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7) -#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7 - u8 state; -#elif defined(__LITTLE_ENDIAN) - u8 state; - u8 agg_vars1; -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) -#define TSTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 -#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF (0x3<<4) -#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_SHIFT 4 -#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG (0x1<<6) -#define __TSTORM_FCOE_AG_CONTEXT_AUX3_FLAG_SHIFT 6 -#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG (0x1<<7) -#define __TSTORM_FCOE_AG_CONTEXT_AUX4_FLAG_SHIFT 7 - u16 ulp_credit; -#endif -#if defined(__BIG_ENDIAN) - u16 __agg_val4; - u16 agg_vars2; -#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0) -#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0 -#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1) -#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1 -#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2) -#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2 -#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4) -#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4 -#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6) -#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6 -#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8) -#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8 -#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10) -#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10 -#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11) -#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11 -#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12) -#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12 -#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13) -#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13 -#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14) -#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 -#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15) -#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 -#elif defined(__LITTLE_ENDIAN) - u16 agg_vars2; -#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG (0x1<<0) -#define __TSTORM_FCOE_AG_CONTEXT_AUX5_FLAG_SHIFT 0 -#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG (0x1<<1) -#define __TSTORM_FCOE_AG_CONTEXT_AUX6_FLAG_SHIFT 1 -#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF (0x3<<2) -#define __TSTORM_FCOE_AG_CONTEXT_AUX4_CF_SHIFT 2 -#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF (0x3<<4) -#define __TSTORM_FCOE_AG_CONTEXT_AUX5_CF_SHIFT 4 -#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF (0x3<<6) -#define __TSTORM_FCOE_AG_CONTEXT_AUX6_CF_SHIFT 6 -#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF (0x3<<8) -#define __TSTORM_FCOE_AG_CONTEXT_AUX7_CF_SHIFT 8 -#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG (0x1<<10) -#define __TSTORM_FCOE_AG_CONTEXT_AUX7_FLAG_SHIFT 10 -#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN (0x1<<11) -#define __TSTORM_FCOE_AG_CONTEXT_QUEUE0_FLUSH_CF_EN_SHIFT 11 -#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN (0x1<<12) -#define TSTORM_FCOE_AG_CONTEXT_AUX4_CF_EN_SHIFT 12 -#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN (0x1<<13) -#define TSTORM_FCOE_AG_CONTEXT_AUX5_CF_EN_SHIFT 13 -#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN (0x1<<14) -#define TSTORM_FCOE_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 -#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN (0x1<<15) -#define TSTORM_FCOE_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 - u16 __agg_val4; -#endif - struct tstorm_fcoe_extra_ag_context_section __extra_section; -}; - -/* - * The fcoe aggregative context of Ustorm - */ -struct ustorm_fcoe_ag_context { -#if defined(__BIG_ENDIAN) - u8 __aux_counter_flags; - u8 agg_vars2; -#define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0) -#define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 0 -#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2) -#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 2 -#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) -#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 -#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) -#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 - u8 agg_vars1; -#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) -#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 -#define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4) -#define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 4 -#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6) -#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 6 - u8 state; -#elif defined(__LITTLE_ENDIAN) - u8 state; - u8 agg_vars1; -#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) -#define __USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) -#define USTORM_FCOE_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 -#define USTORM_FCOE_AG_CONTEXT_INV_CF (0x3<<4) -#define USTORM_FCOE_AG_CONTEXT_INV_CF_SHIFT 4 -#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF (0x3<<6) -#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_SHIFT 6 - u8 agg_vars2; -#define USTORM_FCOE_AG_CONTEXT_TX_CF (0x3<<0) -#define USTORM_FCOE_AG_CONTEXT_TX_CF_SHIFT 0 -#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF (0x3<<2) -#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_SHIFT 2 -#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) -#define USTORM_FCOE_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 -#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) -#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 - u8 __aux_counter_flags; -#endif -#if defined(__BIG_ENDIAN) - u8 cdu_usage; - u8 agg_misc2; - u16 pbf_tx_seq_ack; -#elif defined(__LITTLE_ENDIAN) - u16 pbf_tx_seq_ack; - u8 agg_misc2; - u8 cdu_usage; -#endif - u32 agg_misc4; -#if defined(__BIG_ENDIAN) - u8 agg_val3_th; - u8 agg_val3; - u16 agg_misc3; -#elif defined(__LITTLE_ENDIAN) - u16 agg_misc3; - u8 agg_val3; - u8 agg_val3_th; -#endif - u32 expired_task_id; - u32 agg_misc4_th; -#if defined(__BIG_ENDIAN) - u16 cq_prod; - u16 cq_cons; -#elif defined(__LITTLE_ENDIAN) - u16 cq_cons; - u16 cq_prod; -#endif -#if defined(__BIG_ENDIAN) - u16 __reserved2; - u8 decision_rules; -#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0) -#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 0 -#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) -#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 -#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6) -#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 6 -#define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7) -#define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 7 - u8 decision_rule_enable_bits; -#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0) -#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 0 -#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) -#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 -#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2) -#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 2 -#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3) -#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 -#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4) -#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 4 -#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5) -#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 5 -#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6) -#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 -#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) -#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 -#elif defined(__LITTLE_ENDIAN) - u8 decision_rule_enable_bits; -#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN (0x1<<0) -#define __USTORM_FCOE_AG_CONTEXT_RESERVED_INV_CF_EN_SHIFT 0 -#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) -#define USTORM_FCOE_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 -#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN (0x1<<2) -#define USTORM_FCOE_AG_CONTEXT_TX_CF_EN_SHIFT 2 -#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN (0x1<<3) -#define __USTORM_FCOE_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 -#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN (0x1<<4) -#define __USTORM_FCOE_AG_CONTEXT_AUX1_CF_EN_SHIFT 4 -#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN (0x1<<5) -#define __USTORM_FCOE_AG_CONTEXT_QUEUE0_CF_EN_SHIFT 5 -#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN (0x1<<6) -#define __USTORM_FCOE_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 -#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN (0x1<<7) -#define __USTORM_FCOE_AG_CONTEXT_DQ_CF_EN_SHIFT 7 - u8 decision_rules; -#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE (0x7<<0) -#define USTORM_FCOE_AG_CONTEXT_CQ_DEC_RULE_SHIFT 0 -#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) -#define __USTORM_FCOE_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 -#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG (0x1<<6) -#define USTORM_FCOE_AG_CONTEXT_CQ_ARM_N_FLAG_SHIFT 6 -#define __USTORM_FCOE_AG_CONTEXT_RESERVED1 (0x1<<7) -#define __USTORM_FCOE_AG_CONTEXT_RESERVED1_SHIFT 7 - u16 __reserved2; -#endif -}; - -/* - * Ethernet context section - */ -struct xstorm_fcoe_eth_context_section { -#if defined(__BIG_ENDIAN) - u8 remote_addr_4; - u8 remote_addr_5; - u8 local_addr_0; - u8 local_addr_1; -#elif defined(__LITTLE_ENDIAN) - u8 local_addr_1; - u8 local_addr_0; - u8 remote_addr_5; - u8 remote_addr_4; -#endif -#if defined(__BIG_ENDIAN) - u8 remote_addr_0; - u8 remote_addr_1; - u8 remote_addr_2; - u8 remote_addr_3; -#elif defined(__LITTLE_ENDIAN) - u8 remote_addr_3; - u8 remote_addr_2; - u8 remote_addr_1; - u8 remote_addr_0; -#endif -#if defined(__BIG_ENDIAN) - u16 reserved_vlan_type; - u16 params; -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI (0x1<<12) -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT 12 -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 -#elif defined(__LITTLE_ENDIAN) - u16 params; -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI (0x1<<12) -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT 12 -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) -#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 - u16 reserved_vlan_type; -#endif -#if defined(__BIG_ENDIAN) - u8 local_addr_2; - u8 local_addr_3; - u8 local_addr_4; - u8 local_addr_5; -#elif defined(__LITTLE_ENDIAN) - u8 local_addr_5; - u8 local_addr_4; - u8 local_addr_3; - u8 local_addr_2; -#endif -}; - -/* - * Flags used in FCoE context section - 1 byte - */ -struct xstorm_fcoe_context_flags { - u8 flags; -#define XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q (0x3<<0) -#define XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q_SHIFT 0 -#define XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ (0x1<<2) -#define XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ_SHIFT 2 -#define XSTORM_FCOE_CONTEXT_FLAGS_B_EXCHANGE_CLEANUP_DEFFERED (0x1<<3) -#define XSTORM_FCOE_CONTEXT_FLAGS_B_EXCHANGE_CLEANUP_DEFFERED_SHIFT 3 -#define XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT (0x1<<4) -#define XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT_SHIFT 4 -#define XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE (0x1<<5) -#define XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE_SHIFT 5 -#define XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE (0x1<<6) -#define XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE_SHIFT 6 -#define XSTORM_FCOE_CONTEXT_FLAGS_B_ABTS_DEFFERED (0x1<<7) -#define XSTORM_FCOE_CONTEXT_FLAGS_B_ABTS_DEFFERED_SHIFT 7 -}; - -/* - * FCoE SQ element - */ -struct fcoe_sqe { - u16 wqe; -#define FCOE_SQE_TASK_ID (0x7FFF<<0) -#define FCOE_SQE_TASK_ID_SHIFT 0 -#define FCOE_SQE_TOGGLE_BIT (0x1<<15) -#define FCOE_SQE_TOGGLE_BIT_SHIFT 15 -}; - -/* - * FCoE XFRQ element - */ -struct fcoe_xfrqe { - u16 wqe; -#define FCOE_XFRQE_TASK_ID (0x7FFF<<0) -#define FCOE_XFRQE_TASK_ID_SHIFT 0 -#define FCOE_XFRQE_TOGGLE_BIT (0x1<<15) -#define FCOE_XFRQE_TOGGLE_BIT_SHIFT 15 -}; - -/* - * FCoE SQ\XFRQ element - */ -struct fcoe_cached_wqe { -#if defined(__BIG_ENDIAN) - struct fcoe_xfrqe xfrqe; - struct fcoe_sqe sqe; -#elif defined(__LITTLE_ENDIAN) - struct fcoe_sqe sqe; - struct fcoe_xfrqe xfrqe; -#endif -}; - -struct fcoe_task_ctx_entry_tx_only { - union fcoe_sgl_ctx sgl_ctx; -}; - -struct xstorm_fcoe_task_ctx_entry_rd { - struct fcoe_task_ctx_entry_tx_only tx_wr; - struct fcoe_task_ctx_entry_txwr_rxrd tx_wr_rx_rd; - struct fcoe_task_ctx_entry_tx_rx_cmn cmn; - struct fcoe_task_ctx_entry_rxwr_txrd rx_wr_tx_rd; -}; - -/* - * Cached SGEs - */ -struct common_fcoe_sgl { - struct fcoe_bd_ctx sge[2]; -}; - -/* - * FCP_DATA parameters required for transmission - */ -struct xstorm_fcoe_fcp_data { - u32 io_rem; -#if defined(__BIG_ENDIAN) - u16 cached_sge_off; - u8 cached_num_sges; - u8 cached_sge_idx; -#elif defined(__LITTLE_ENDIAN) - u8 cached_sge_idx; - u8 cached_num_sges; - u16 cached_sge_off; -#endif - struct common_fcoe_sgl cached_sgl; -}; - -/* - * FCoE context section - */ -struct xstorm_fcoe_context_section { -#if defined(__BIG_ENDIAN) - u8 vlan_flag; - u8 s_id[3]; -#elif defined(__LITTLE_ENDIAN) - u8 s_id[3]; - u8 vlan_flag; -#endif -#if defined(__BIG_ENDIAN) - u8 func_id; - u8 d_id[3]; -#elif defined(__LITTLE_ENDIAN) - u8 d_id[3]; - u8 func_id; -#endif -#if defined(__BIG_ENDIAN) - u16 sq_xfrq_lcq_confq_size; - u16 tx_max_fc_pay_len; -#elif defined(__LITTLE_ENDIAN) - u16 tx_max_fc_pay_len; - u16 sq_xfrq_lcq_confq_size; -#endif - u32 lcq_prod; -#if defined(__BIG_ENDIAN) - u8 port_id; - u8 tx_max_conc_seqs_c3; - u8 seq_id; - struct xstorm_fcoe_context_flags tx_flags; -#elif defined(__LITTLE_ENDIAN) - struct xstorm_fcoe_context_flags tx_flags; - u8 seq_id; - u8 tx_max_conc_seqs_c3; - u8 port_id; -#endif -#if defined(__BIG_ENDIAN) - u16 verify_tx_seq; - u8 func_mode; - u8 vnic_id; -#elif defined(__LITTLE_ENDIAN) - u8 vnic_id; - u8 func_mode; - u16 verify_tx_seq; -#endif - struct regpair confq_curr_page_addr; - struct fcoe_cached_wqe cached_wqe[8]; - struct regpair lcq_base_addr; - struct xstorm_fcoe_task_ctx_entry_rd tce; - struct xstorm_fcoe_fcp_data fcp_data; -#if defined(__BIG_ENDIAN) - u16 fcoe_tx_stat_params_ram_addr; - u16 cmng_port_ram_addr; -#elif defined(__LITTLE_ENDIAN) - u16 cmng_port_ram_addr; - u16 fcoe_tx_stat_params_ram_addr; -#endif -#if defined(__BIG_ENDIAN) - u8 fcp_cmd_pb_cmd_size; - u8 eth_hdr_size; - u16 pbf_addr; -#elif defined(__LITTLE_ENDIAN) - u16 pbf_addr; - u8 eth_hdr_size; - u8 fcp_cmd_pb_cmd_size; -#endif -#if defined(__BIG_ENDIAN) - u8 reserved2[2]; - u8 cos; - u8 dcb_version; -#elif defined(__LITTLE_ENDIAN) - u8 dcb_version; - u8 cos; - u8 reserved2[2]; -#endif - u32 reserved3; - struct regpair reserved4[2]; -}; - -/* - * Xstorm FCoE Storm Context - */ -struct xstorm_fcoe_st_context { - struct xstorm_fcoe_eth_context_section eth; - struct xstorm_fcoe_context_section fcoe; -}; - -/* - * Fcoe connection context - */ -struct fcoe_context { - struct ustorm_fcoe_st_context ustorm_st_context; - struct tstorm_fcoe_st_context tstorm_st_context; - struct xstorm_fcoe_ag_context xstorm_ag_context; - struct tstorm_fcoe_ag_context tstorm_ag_context; - struct ustorm_fcoe_ag_context ustorm_ag_context; - struct timers_block_context timers_context; - struct xstorm_fcoe_st_context xstorm_st_context; -}; - -/* - * iSCSI context region, used only in iSCSI - */ -struct ustorm_iscsi_rq_db { - struct regpair pbl_base; - struct regpair curr_pbe; -}; - -/* - * iSCSI context region, used only in iSCSI - */ -struct ustorm_iscsi_r2tq_db { - struct regpair pbl_base; - struct regpair curr_pbe; -}; - -/* - * iSCSI context region, used only in iSCSI - */ -struct ustorm_iscsi_cq_db { -#if defined(__BIG_ENDIAN) - u16 cq_sn; - u16 prod; -#elif defined(__LITTLE_ENDIAN) - u16 prod; - u16 cq_sn; -#endif - struct regpair curr_pbe; -}; - -/* - * iSCSI context region, used only in iSCSI - */ -struct rings_db { - struct ustorm_iscsi_rq_db rq; - struct ustorm_iscsi_r2tq_db r2tq; - struct ustorm_iscsi_cq_db cq[8]; -#if defined(__BIG_ENDIAN) - u16 rq_prod; - u16 r2tq_prod; -#elif defined(__LITTLE_ENDIAN) - u16 r2tq_prod; - u16 rq_prod; -#endif - struct regpair cq_pbl_base; -}; - -/* - * iSCSI context region, used only in iSCSI - */ -struct ustorm_iscsi_placement_db { - u32 sgl_base_lo; - u32 sgl_base_hi; - u32 local_sge_0_address_hi; - u32 local_sge_0_address_lo; -#if defined(__BIG_ENDIAN) - u16 curr_sge_offset; - u16 local_sge_0_size; -#elif defined(__LITTLE_ENDIAN) - u16 local_sge_0_size; - u16 curr_sge_offset; -#endif - u32 local_sge_1_address_hi; - u32 local_sge_1_address_lo; -#if defined(__BIG_ENDIAN) - u16 reserved6; - u16 local_sge_1_size; -#elif defined(__LITTLE_ENDIAN) - u16 local_sge_1_size; - u16 reserved6; -#endif -#if defined(__BIG_ENDIAN) - u8 sgl_size; - u8 local_sge_index_2b; - u16 reserved7; -#elif defined(__LITTLE_ENDIAN) - u16 reserved7; - u8 local_sge_index_2b; - u8 sgl_size; -#endif - u32 rem_pdu; - u32 place_db_bitfield_1; -#define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD (0xFFFFFF<<0) -#define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD_SHIFT 0 -#define USTORM_ISCSI_PLACEMENT_DB_CQ_ID (0xFF<<24) -#define USTORM_ISCSI_PLACEMENT_DB_CQ_ID_SHIFT 24 - u32 place_db_bitfield_2; -#define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE (0xFFFFFF<<0) -#define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE_SHIFT 0 -#define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX (0xFF<<24) -#define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX_SHIFT 24 - u32 nal; -#define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE (0xFFFFFF<<0) -#define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE_SHIFT 0 -#define USTORM_ISCSI_PLACEMENT_DB_EXP_PADDING_2B (0x3<<24) -#define USTORM_ISCSI_PLACEMENT_DB_EXP_PADDING_2B_SHIFT 24 -#define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B (0x7<<26) -#define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B_SHIFT 26 -#define USTORM_ISCSI_PLACEMENT_DB_NAL_LEN_3B (0x7<<29) -#define USTORM_ISCSI_PLACEMENT_DB_NAL_LEN_3B_SHIFT 29 -}; - -/* - * Ustorm iSCSI Storm Context - */ -struct ustorm_iscsi_st_context { - u32 exp_stat_sn; - u32 exp_data_sn; - struct rings_db ring; - struct regpair task_pbl_base; - struct regpair tce_phy_addr; - struct ustorm_iscsi_placement_db place_db; - u32 reserved8; - u32 rem_rcv_len; -#if defined(__BIG_ENDIAN) - u16 hdr_itt; - u16 iscsi_conn_id; -#elif defined(__LITTLE_ENDIAN) - u16 iscsi_conn_id; - u16 hdr_itt; -#endif - u32 nal_bytes; -#if defined(__BIG_ENDIAN) - u8 hdr_second_byte_union; - u8 bitfield_0; -#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0) -#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0 -#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1) -#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1 -#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2) -#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 2 -#define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3) -#define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 3 - u8 task_pdu_cache_index; - u8 task_pbe_cache_index; -#elif defined(__LITTLE_ENDIAN) - u8 task_pbe_cache_index; - u8 task_pdu_cache_index; - u8 bitfield_0; -#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0) -#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0 -#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1) -#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1 -#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2) -#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 2 -#define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3) -#define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 3 - u8 hdr_second_byte_union; -#endif -#if defined(__BIG_ENDIAN) - u16 reserved3; - u8 reserved2; - u8 acDecrement; -#elif defined(__LITTLE_ENDIAN) - u8 acDecrement; - u8 reserved2; - u16 reserved3; -#endif - u32 task_stat; -#if defined(__BIG_ENDIAN) - u8 hdr_opcode; - u8 num_cqs; - u16 reserved5; -#elif defined(__LITTLE_ENDIAN) - u16 reserved5; - u8 num_cqs; - u8 hdr_opcode; -#endif - u32 negotiated_rx; -#define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH (0xFFFFFF<<0) -#define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH_SHIFT 0 -#define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS (0xFF<<24) -#define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT 24 - u32 negotiated_rx_and_flags; -#define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH (0xFFFFFF<<0) -#define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH_SHIFT 0 -#define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED (0x1<<24) -#define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED_SHIFT 24 -#define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN (0x1<<25) -#define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN_SHIFT 25 -#define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN (0x1<<26) -#define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN_SHIFT 26 -#define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR (0x1<<27) -#define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR_SHIFT 27 -#define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID (0x1<<28) -#define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID_SHIFT 28 -#define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE (0x3<<29) -#define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE_SHIFT 29 -#define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED (0x1<<31) -#define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED_SHIFT 31 -}; - -/* - * TCP context region, shared in TOE, RDMA and ISCSI - */ -struct tstorm_tcp_st_context_section { - u32 flags1; -#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT (0xFFFFFF<<0) -#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT_SHIFT 0 -#define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID (0x1<<24) -#define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID_SHIFT 24 -#define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS (0x1<<25) -#define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS_SHIFT 25 -#define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0 (0x1<<26) -#define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0_SHIFT 26 -#define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD (0x1<<27) -#define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD_SHIFT 27 -#define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED (0x1<<28) -#define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED_SHIFT 28 -#define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE (0x1<<29) -#define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE_SHIFT 29 -#define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN (0x1<<30) -#define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN_SHIFT 30 -#define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN (0x1<<31) -#define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN_SHIFT 31 - u32 flags2; -#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION (0xFFFFFF<<0) -#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION_SHIFT 0 -#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN (0x1<<24) -#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN_SHIFT 24 -#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN (0x1<<25) -#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN_SHIFT 25 -#define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT (0x1<<26) -#define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT_SHIFT 26 -#define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT (0x1<<27) -#define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT_SHIFT 27 -#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<28) -#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 28 -#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<29) -#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 29 -#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK (0x1<<30) -#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK_SHIFT 30 -#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK (0x1<<31) -#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK_SHIFT 31 -#if defined(__BIG_ENDIAN) - u16 mss; - u8 tcp_sm_state; - u8 rto_exp; -#elif defined(__LITTLE_ENDIAN) - u8 rto_exp; - u8 tcp_sm_state; - u16 mss; -#endif - u32 rcv_nxt; - u32 timestamp_recent; - u32 timestamp_recent_time; - u32 cwnd; - u32 ss_thresh; - u32 cwnd_accum; - u32 prev_seg_seq; - u32 expected_rel_seq; - u32 recover; -#if defined(__BIG_ENDIAN) - u8 retransmit_count; - u8 ka_max_probe_count; - u8 persist_probe_count; - u8 ka_probe_count; -#elif defined(__LITTLE_ENDIAN) - u8 ka_probe_count; - u8 persist_probe_count; - u8 ka_max_probe_count; - u8 retransmit_count; -#endif -#if defined(__BIG_ENDIAN) - u8 statistics_counter_id; - u8 ooo_support_mode; - u8 snd_wnd_scale; - u8 dup_ack_count; -#elif defined(__LITTLE_ENDIAN) - u8 dup_ack_count; - u8 snd_wnd_scale; - u8 ooo_support_mode; - u8 statistics_counter_id; -#endif - u32 retransmit_start_time; - u32 ka_timeout; - u32 ka_interval; - u32 isle_start_seq; - u32 isle_end_seq; -#if defined(__BIG_ENDIAN) - u16 second_isle_address; - u16 recent_seg_wnd; -#elif defined(__LITTLE_ENDIAN) - u16 recent_seg_wnd; - u16 second_isle_address; -#endif -#if defined(__BIG_ENDIAN) - u8 max_isles_ever_happened; - u8 isles_number; - u16 last_isle_address; -#elif defined(__LITTLE_ENDIAN) - u16 last_isle_address; - u8 isles_number; - u8 max_isles_ever_happened; -#endif - u32 max_rt_time; -#if defined(__BIG_ENDIAN) - u16 lsb_mac_address; - u16 vlan_id; -#elif defined(__LITTLE_ENDIAN) - u16 vlan_id; - u16 lsb_mac_address; -#endif - u32 msb_mac_address; - u32 rightmost_received_seq; -}; - -/* - * Termination variables - */ -struct iscsi_term_vars { - u8 BitMap; -#define ISCSI_TERM_VARS_TCP_STATE (0xF<<0) -#define ISCSI_TERM_VARS_TCP_STATE_SHIFT 0 -#define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT (0x1<<4) -#define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT 4 -#define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT (0x1<<5) -#define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT 5 -#define ISCSI_TERM_VARS_TERM_ON_CHIP (0x1<<6) -#define ISCSI_TERM_VARS_TERM_ON_CHIP_SHIFT 6 -#define ISCSI_TERM_VARS_RSRV (0x1<<7) -#define ISCSI_TERM_VARS_RSRV_SHIFT 7 -}; - -/* - * iSCSI context region, used only in iSCSI - */ -struct tstorm_iscsi_st_context_section { -#if defined(__BIG_ENDIAN) - u16 rem_tcp_data_len; - u16 brb_offset; -#elif defined(__LITTLE_ENDIAN) - u16 brb_offset; - u16 rem_tcp_data_len; -#endif - u32 b2nh; -#if defined(__BIG_ENDIAN) - u16 rq_cons; - u8 flags; -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV (0x7<<5) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV_SHIFT 5 - u8 hdr_bytes_2_fetch; -#elif defined(__LITTLE_ENDIAN) - u8 hdr_bytes_2_fetch; - u8 flags; -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4 -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV (0x7<<5) -#define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV_SHIFT 5 - u16 rq_cons; -#endif - struct regpair rq_db_phy_addr; -#if defined(__BIG_ENDIAN) - struct iscsi_term_vars term_vars; - u8 scratchpad_idx; - u16 iscsi_conn_id; -#elif defined(__LITTLE_ENDIAN) - u16 iscsi_conn_id; - u8 scratchpad_idx; - struct iscsi_term_vars term_vars; -#endif - u32 process_nxt; -}; - -/* - * The iSCSI non-aggregative context of Tstorm - */ -struct tstorm_iscsi_st_context { - struct tstorm_tcp_st_context_section tcp; - struct tstorm_iscsi_st_context_section iscsi; -}; /* * The tcp aggregative context section of Xstorm */ struct xstorm_tcp_tcp_ag_context_section { #if defined(__BIG_ENDIAN) - u8 __tcp_agg_vars1; + u8 tcp_agg_vars1; +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF (0x3<<0) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF_SHIFT 0 +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 +#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) +#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN (0x1<<6) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN_SHIFT 6 +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG (0x1<<7) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG_SHIFT 7 u8 __da_cnt; u16 mss; #elif defined(__LITTLE_ENDIAN) u16 mss; u8 __da_cnt; - u8 __tcp_agg_vars1; + u8 tcp_agg_vars1; +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF (0x3<<0) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_DA_TIMER_CF_SHIFT 0 +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED (0x3<<2) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_SHIFT 2 +#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF (0x3<<4) +#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_SHIFT 4 +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN (0x1<<6) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CLEAR_DA_TIMER_EN_SHIFT 6 +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG (0x1<<7) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_EXPIRATION_FLAG_SHIFT 7 #endif u32 snd_nxt; u32 tx_wnd; @@ -2611,7 +1777,7 @@ struct xstorm_tcp_tcp_ag_context_section { u32 local_adv_wnd; #if defined(__BIG_ENDIAN) u8 __agg_val8_th; - u8 __agg_val8; + u8 __tx_dest; u16 tcp_agg_vars2; #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0) #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0 @@ -2627,8 +1793,8 @@ struct xstorm_tcp_tcp_ag_context_section { #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6) #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6 -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN (0x1<<7) -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN_SHIFT 7 +#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) +#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8) #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) @@ -2637,8 +1803,8 @@ struct xstorm_tcp_tcp_ag_context_section { #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF (0x3<<14) -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_SHIFT 14 +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 #elif defined(__LITTLE_ENDIAN) u16 tcp_agg_vars2; #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0) @@ -2655,8 +1821,8 @@ struct xstorm_tcp_tcp_ag_context_section { #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6) #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6 -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN (0x1<<7) -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN_SHIFT 7 +#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN (0x1<<7) +#define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SIDEBAND_SENT_CF_EN_SHIFT 7 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8) #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) @@ -2665,9 +1831,9 @@ struct xstorm_tcp_tcp_ag_context_section { #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF (0x3<<14) -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_SHIFT 14 - u8 __agg_val8; +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF (0x3<<14) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_SHIFT 14 + u8 __tx_dest; u8 __agg_val8_th; #endif u32 ack_to_far_end; @@ -2695,8 +1861,8 @@ struct xstorm_tcp_tcp_ag_context_section { u32 tcp_agg_vars6; #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN (0x1<<0) #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN_SHIFT 0 -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_EN (0x1<<1) -#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_EN_SHIFT 1 +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_EN (0x1<<1) +#define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_DEST_UPDATED_CF_EN_SHIFT 1 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN (0x1<<2) #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN_SHIFT 2 #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<3) @@ -2993,321 +2159,2100 @@ struct xstorm_iscsi_ag_context { u32 rst_seq_num; }; -/* - * The tcp aggregative context section of Tstorm - */ -struct tstorm_tcp_tcp_ag_context_section { - u32 __agg_val1; -#if defined(__BIG_ENDIAN) - u8 __tcp_agg_vars2; - u8 __agg_val3; - u16 __agg_val2; -#elif defined(__LITTLE_ENDIAN) - u16 __agg_val2; - u8 __agg_val3; - u8 __tcp_agg_vars2; -#endif -#if defined(__BIG_ENDIAN) - u16 __agg_val5; - u8 __agg_val6; - u8 __tcp_agg_vars3; -#elif defined(__LITTLE_ENDIAN) - u8 __tcp_agg_vars3; - u8 __agg_val6; - u16 __agg_val5; -#endif - u32 snd_nxt; - u32 rtt_seq; - u32 rtt_time; - u32 __reserved66; - u32 wnd_right_edge; - u32 tcp_agg_vars1; -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 -#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) -#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 -#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) -#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 -#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) -#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 -#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) -#define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) -#define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 - u32 snd_max; - u32 snd_una; - u32 __reserved2; -}; /* - * The iscsi aggregative context of Tstorm + * The L5cm aggregative context of XStorm */ -struct tstorm_iscsi_ag_context { +struct xstorm_l5cm_ag_context { #if defined(__BIG_ENDIAN) - u16 ulp_credit; + u16 agg_val1; u8 agg_vars1; -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 -#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4) -#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4 -#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6) -#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6 -#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7) -#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7 +#define __XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define __XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define __XSTORM_L5CM_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) +#define __XSTORM_L5CM_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 +#define XSTORM_L5CM_AG_CONTEXT_NAGLE_EN (0x1<<5) +#define XSTORM_L5CM_AG_CONTEXT_NAGLE_EN_SHIFT 5 +#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6) +#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6 +#define __XSTORM_L5CM_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7) +#define __XSTORM_L5CM_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7 u8 state; #elif defined(__LITTLE_ENDIAN) u8 state; u8 agg_vars1; -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) -#define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 -#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF (0x3<<4) -#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_SHIFT 4 -#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6) -#define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6 -#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG (0x1<<7) -#define __TSTORM_ISCSI_AG_CONTEXT_ACK_ON_FIN_SENT_FLAG_SHIFT 7 - u16 ulp_credit; +#define __XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) +#define __XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) +#define XSTORM_L5CM_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 +#define __XSTORM_L5CM_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) +#define __XSTORM_L5CM_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 +#define XSTORM_L5CM_AG_CONTEXT_NAGLE_EN (0x1<<5) +#define XSTORM_L5CM_AG_CONTEXT_NAGLE_EN_SHIFT 5 +#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6) +#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6 +#define __XSTORM_L5CM_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7) +#define __XSTORM_L5CM_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7 + u16 agg_val1; #endif #if defined(__BIG_ENDIAN) - u16 __agg_val4; - u16 agg_vars2; -#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0) -#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0 -#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1) -#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1 -#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2) -#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2 -#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4) -#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4 -#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6) -#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6 -#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8) -#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8 -#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10) -#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10 -#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11) -#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11 -#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12) -#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12 -#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13) -#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13 -#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14) -#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 -#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15) -#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 -#elif defined(__LITTLE_ENDIAN) - u16 agg_vars2; -#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG (0x1<<0) -#define __TSTORM_ISCSI_AG_CONTEXT_MSL_TIMER_SET_FLAG_SHIFT 0 -#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG (0x1<<1) -#define __TSTORM_ISCSI_AG_CONTEXT_FIN_SENT_FIRST_FLAG_SHIFT 1 -#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF (0x3<<2) -#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_SHIFT 2 -#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF (0x3<<4) -#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_SHIFT 4 -#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6) -#define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6 -#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8) -#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8 -#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10) -#define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10 -#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<11) -#define __TSTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 11 -#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN (0x1<<12) -#define __TSTORM_ISCSI_AG_CONTEXT_RST_SENT_CF_EN_SHIFT 12 -#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN (0x1<<13) -#define __TSTORM_ISCSI_AG_CONTEXT_WAKEUP_CALL_CF_EN_SHIFT 13 -#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14) -#define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 -#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15) -#define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 - u16 __agg_val4; -#endif - struct tstorm_tcp_tcp_ag_context_section tcp; -}; - -/* - * The iscsi aggregative context of Ustorm - */ -struct ustorm_iscsi_ag_context { -#if defined(__BIG_ENDIAN) - u8 __aux_counter_flags; + u8 cdu_reserved; + u8 __agg_vars4; + u8 agg_vars3; +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 +#define __XSTORM_L5CM_AG_CONTEXT_RX_TS_EN_CF (0x3<<6) +#define __XSTORM_L5CM_AG_CONTEXT_RX_TS_EN_CF_SHIFT 6 u8 agg_vars2; -#define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0) -#define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0 -#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2) -#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2 -#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) -#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 -#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) -#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 - u8 agg_vars1; -#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) -#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 -#define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4) -#define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4 -#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6) -#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6 - u8 state; +#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF (0x3<<0) +#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_SHIFT 0 +#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2) +#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2 +#define __XSTORM_L5CM_AG_CONTEXT_AUX8_FLAG (0x1<<3) +#define __XSTORM_L5CM_AG_CONTEXT_AUX8_FLAG_SHIFT 3 +#define __XSTORM_L5CM_AG_CONTEXT_AUX9_FLAG (0x1<<4) +#define __XSTORM_L5CM_AG_CONTEXT_AUX9_FLAG_SHIFT 4 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1 (0x3<<5) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1_SHIFT 5 +#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN (0x1<<7) +#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN_SHIFT 7 #elif defined(__LITTLE_ENDIAN) - u8 state; - u8 agg_vars1; -#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) -#define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) -#define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 -#define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4) -#define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4 -#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6) -#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6 u8 agg_vars2; -#define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0) -#define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0 -#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2) -#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2 -#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) -#define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 -#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) -#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 - u8 __aux_counter_flags; +#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF (0x3<<0) +#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_SHIFT 0 +#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2) +#define __XSTORM_L5CM_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2 +#define __XSTORM_L5CM_AG_CONTEXT_AUX8_FLAG (0x1<<3) +#define __XSTORM_L5CM_AG_CONTEXT_AUX8_FLAG_SHIFT 3 +#define __XSTORM_L5CM_AG_CONTEXT_AUX9_FLAG (0x1<<4) +#define __XSTORM_L5CM_AG_CONTEXT_AUX9_FLAG_SHIFT 4 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1 (0x3<<5) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE1_SHIFT 5 +#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN (0x1<<7) +#define XSTORM_L5CM_AG_CONTEXT_AUX4_CF_EN_SHIFT 7 + u8 agg_vars3; +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 +#define __XSTORM_L5CM_AG_CONTEXT_RX_TS_EN_CF (0x3<<6) +#define __XSTORM_L5CM_AG_CONTEXT_RX_TS_EN_CF_SHIFT 6 + u8 __agg_vars4; + u8 cdu_reserved; +#endif + u32 more_to_send; +#if defined(__BIG_ENDIAN) + u16 agg_vars5; +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5 (0x3<<0) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5_SHIFT 0 +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2 (0x3<<14) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2_SHIFT 14 + u16 agg_val4_th; +#elif defined(__LITTLE_ENDIAN) + u16 agg_val4_th; + u16 agg_vars5; +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5 (0x3<<0) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE5_SHIFT 0 +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) +#define XSTORM_L5CM_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2 (0x3<<14) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE2_SHIFT 14 +#endif + struct xstorm_tcp_tcp_ag_context_section tcp; +#if defined(__BIG_ENDIAN) + u16 agg_vars7; +#define __XSTORM_L5CM_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0) +#define __XSTORM_L5CM_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0 +#define __XSTORM_L5CM_AG_CONTEXT_AUX13_FLAG (0x1<<3) +#define __XSTORM_L5CM_AG_CONTEXT_AUX13_FLAG_SHIFT 3 +#define __XSTORM_L5CM_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4) +#define __XSTORM_L5CM_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 4 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3 (0x3<<6) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3_SHIFT 6 +#define XSTORM_L5CM_AG_CONTEXT_AUX1_CF (0x3<<8) +#define XSTORM_L5CM_AG_CONTEXT_AUX1_CF_SHIFT 8 +#define __XSTORM_L5CM_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10) +#define __XSTORM_L5CM_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 10 +#define __XSTORM_L5CM_AG_CONTEXT_AUX1_CF_EN (0x1<<11) +#define __XSTORM_L5CM_AG_CONTEXT_AUX1_CF_EN_SHIFT 11 +#define __XSTORM_L5CM_AG_CONTEXT_AUX10_FLAG (0x1<<12) +#define __XSTORM_L5CM_AG_CONTEXT_AUX10_FLAG_SHIFT 12 +#define __XSTORM_L5CM_AG_CONTEXT_AUX11_FLAG (0x1<<13) +#define __XSTORM_L5CM_AG_CONTEXT_AUX11_FLAG_SHIFT 13 +#define __XSTORM_L5CM_AG_CONTEXT_AUX12_FLAG (0x1<<14) +#define __XSTORM_L5CM_AG_CONTEXT_AUX12_FLAG_SHIFT 14 +#define __XSTORM_L5CM_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15) +#define __XSTORM_L5CM_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 15 + u8 agg_val3_th; + u8 agg_vars6; +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6 (0x7<<0) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6_SHIFT 0 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7 (0x7<<3) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7_SHIFT 3 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4 (0x3<<6) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4_SHIFT 6 +#elif defined(__LITTLE_ENDIAN) + u8 agg_vars6; +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6 (0x7<<0) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE6_SHIFT 0 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7 (0x7<<3) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE7_SHIFT 3 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4 (0x3<<6) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE4_SHIFT 6 + u8 agg_val3_th; + u16 agg_vars7; +#define __XSTORM_L5CM_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0) +#define __XSTORM_L5CM_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0 +#define __XSTORM_L5CM_AG_CONTEXT_AUX13_FLAG (0x1<<3) +#define __XSTORM_L5CM_AG_CONTEXT_AUX13_FLAG_SHIFT 3 +#define __XSTORM_L5CM_AG_CONTEXT_STORMS_SYNC_CF (0x3<<4) +#define __XSTORM_L5CM_AG_CONTEXT_STORMS_SYNC_CF_SHIFT 4 +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3 (0x3<<6) +#define XSTORM_L5CM_AG_CONTEXT_DECISION_RULE3_SHIFT 6 +#define XSTORM_L5CM_AG_CONTEXT_AUX1_CF (0x3<<8) +#define XSTORM_L5CM_AG_CONTEXT_AUX1_CF_SHIFT 8 +#define __XSTORM_L5CM_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10) +#define __XSTORM_L5CM_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 10 +#define __XSTORM_L5CM_AG_CONTEXT_AUX1_CF_EN (0x1<<11) +#define __XSTORM_L5CM_AG_CONTEXT_AUX1_CF_EN_SHIFT 11 +#define __XSTORM_L5CM_AG_CONTEXT_AUX10_FLAG (0x1<<12) +#define __XSTORM_L5CM_AG_CONTEXT_AUX10_FLAG_SHIFT 12 +#define __XSTORM_L5CM_AG_CONTEXT_AUX11_FLAG (0x1<<13) +#define __XSTORM_L5CM_AG_CONTEXT_AUX11_FLAG_SHIFT 13 +#define __XSTORM_L5CM_AG_CONTEXT_AUX12_FLAG (0x1<<14) +#define __XSTORM_L5CM_AG_CONTEXT_AUX12_FLAG_SHIFT 14 +#define __XSTORM_L5CM_AG_CONTEXT_RX_WND_SCL_EN (0x1<<15) +#define __XSTORM_L5CM_AG_CONTEXT_RX_WND_SCL_EN_SHIFT 15 #endif #if defined(__BIG_ENDIAN) - u8 cdu_usage; - u8 agg_misc2; - u16 __cq_local_comp_itt_val; + u16 __agg_val11_th; + u16 __gen_data; #elif defined(__LITTLE_ENDIAN) - u16 __cq_local_comp_itt_val; - u8 agg_misc2; - u8 cdu_usage; + u16 __gen_data; + u16 __agg_val11_th; #endif +#if defined(__BIG_ENDIAN) + u8 __reserved1; + u8 __agg_val6_th; + u16 __agg_val9; +#elif defined(__LITTLE_ENDIAN) + u16 __agg_val9; + u8 __agg_val6_th; + u8 __reserved1; +#endif +#if defined(__BIG_ENDIAN) + u16 agg_val2_th; + u16 agg_val2; +#elif defined(__LITTLE_ENDIAN) + u16 agg_val2; + u16 agg_val2_th; +#endif + u32 agg_vars8; +#define XSTORM_L5CM_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0) +#define XSTORM_L5CM_AG_CONTEXT_AGG_MISC2_SHIFT 0 +#define XSTORM_L5CM_AG_CONTEXT_AGG_MISC3 (0xFF<<24) +#define XSTORM_L5CM_AG_CONTEXT_AGG_MISC3_SHIFT 24 +#if defined(__BIG_ENDIAN) + u16 agg_misc0; + u16 agg_val4; +#elif defined(__LITTLE_ENDIAN) + u16 agg_val4; + u16 agg_misc0; +#endif +#if defined(__BIG_ENDIAN) + u8 agg_val3; + u8 agg_val6; + u8 agg_val5_th; + u8 agg_val5; +#elif defined(__LITTLE_ENDIAN) + u8 agg_val5; + u8 agg_val5_th; + u8 agg_val6; + u8 agg_val3; +#endif +#if defined(__BIG_ENDIAN) + u16 __agg_misc1; + u16 agg_limit1; +#elif defined(__LITTLE_ENDIAN) + u16 agg_limit1; + u16 __agg_misc1; +#endif + u32 completion_seq; u32 agg_misc4; + u32 rst_seq_num; +}; + +/* + * ABTS info $$KEEP_ENDIANNESS$$ + */ +struct fcoe_abts_info { + __le16 aborted_task_id; + __le16 reserved0; + __le32 reserved1; +}; + + +/* + * Fixed size structure in order to plant it in Union structure $$KEEP_ENDIANNESS$$ + */ +struct fcoe_abts_rsp_union { + u8 r_ctl; + u8 rsrv[3]; + __le32 abts_rsp_payload[7]; +}; + + +/* + * 4 regs size $$KEEP_ENDIANNESS$$ + */ +struct fcoe_bd_ctx { + __le32 buf_addr_hi; + __le32 buf_addr_lo; + __le16 buf_len; + __le16 rsrv0; + __le16 flags; + __le16 rsrv1; +}; + + +/* + * FCoE cached sges context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_cached_sge_ctx { + struct regpair cur_buf_addr; + __le16 cur_buf_rem; + __le16 second_buf_rem; + struct regpair second_buf_addr; +}; + + +/* + * Cleanup info $$KEEP_ENDIANNESS$$ + */ +struct fcoe_cleanup_info { + __le16 cleaned_task_id; + __le16 rolled_tx_seq_cnt; + __le32 rolled_tx_data_offset; +}; + + +/* + * Fcp RSP flags $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_rsp_flags { + u8 flags; +#define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID (0x1<<0) +#define FCOE_FCP_RSP_FLAGS_FCP_RSP_LEN_VALID_SHIFT 0 +#define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID (0x1<<1) +#define FCOE_FCP_RSP_FLAGS_FCP_SNS_LEN_VALID_SHIFT 1 +#define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER (0x1<<2) +#define FCOE_FCP_RSP_FLAGS_FCP_RESID_OVER_SHIFT 2 +#define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER (0x1<<3) +#define FCOE_FCP_RSP_FLAGS_FCP_RESID_UNDER_SHIFT 3 +#define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ (0x1<<4) +#define FCOE_FCP_RSP_FLAGS_FCP_CONF_REQ_SHIFT 4 +#define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS (0x7<<5) +#define FCOE_FCP_RSP_FLAGS_FCP_BIDI_FLAGS_SHIFT 5 +}; + +/* + * Fcp RSP payload $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_rsp_payload { + struct regpair reserved0; + __le32 fcp_resid; + u8 scsi_status_code; + struct fcoe_fcp_rsp_flags fcp_flags; + __le16 retry_delay_timer; + __le32 fcp_rsp_len; + __le32 fcp_sns_len; +}; + +/* + * Fixed size structure in order to plant it in Union structure $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_rsp_union { + struct fcoe_fcp_rsp_payload payload; + struct regpair reserved0; +}; + +/* + * FC header $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fc_hdr { + u8 s_id[3]; + u8 cs_ctl; + u8 d_id[3]; + u8 r_ctl; + __le16 seq_cnt; + u8 df_ctl; + u8 seq_id; + u8 f_ctl[3]; + u8 type; + __le32 parameters; + __le16 rx_id; + __le16 ox_id; +}; + +/* + * FC header union $$KEEP_ENDIANNESS$$ + */ +struct fcoe_mp_rsp_union { + struct fcoe_fc_hdr fc_hdr; + __le32 mp_payload_len; + __le32 rsrv; +}; + +/* + * Completion information $$KEEP_ENDIANNESS$$ + */ +union fcoe_comp_flow_info { + struct fcoe_fcp_rsp_union fcp_rsp; + struct fcoe_abts_rsp_union abts_rsp; + struct fcoe_mp_rsp_union mp_rsp; + __le32 opaque[8]; +}; + + +/* + * External ABTS info $$KEEP_ENDIANNESS$$ + */ +struct fcoe_ext_abts_info { + __le32 rsrv0[6]; + struct fcoe_abts_info ctx; +}; + + +/* + * External cleanup info $$KEEP_ENDIANNESS$$ + */ +struct fcoe_ext_cleanup_info { + __le32 rsrv0[6]; + struct fcoe_cleanup_info ctx; +}; + + +/* + * Fcoe FW Tx sequence context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fw_tx_seq_ctx { + __le32 data_offset; + __le16 seq_cnt; + __le16 rsrv0; +}; + +/* + * Fcoe external FW Tx sequence context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_ext_fw_tx_seq_ctx { + __le32 rsrv0[6]; + struct fcoe_fw_tx_seq_ctx ctx; +}; + + +/* + * FCoE multiple sges context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_mul_sges_ctx { + struct regpair cur_sge_addr; + __le16 cur_sge_off; + u8 cur_sge_idx; + u8 sgl_size; +}; + +/* + * FCoE external multiple sges context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_ext_mul_sges_ctx { + struct fcoe_mul_sges_ctx mul_sgl; + struct regpair rsrv0; +}; + + +/* + * FCP CMD payload $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_cmd_payload { + __le32 opaque[8]; +}; + + + + + +/* + * Fcp xfr rdy payload $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fcp_xfr_rdy_payload { + __le32 burst_len; + __le32 data_ro; +}; + + +/* + * FC frame $$KEEP_ENDIANNESS$$ + */ +struct fcoe_fc_frame { + struct fcoe_fc_hdr fc_hdr; + __le32 reserved0[2]; +}; + + + + +/* + * FCoE KCQ CQE parameters $$KEEP_ENDIANNESS$$ + */ +union fcoe_kcqe_params { + __le32 reserved0[4]; +}; + +/* + * FCoE KCQ CQE $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kcqe { + __le32 fcoe_conn_id; + __le32 completion_status; + __le32 fcoe_conn_context_id; + union fcoe_kcqe_params params; + __le16 qe_self_seq; + u8 op_code; + u8 flags; +#define FCOE_KCQE_RESERVED0 (0x7<<0) +#define FCOE_KCQE_RESERVED0_SHIFT 0 +#define FCOE_KCQE_RAMROD_COMPLETION (0x1<<3) +#define FCOE_KCQE_RAMROD_COMPLETION_SHIFT 3 +#define FCOE_KCQE_LAYER_CODE (0x7<<4) +#define FCOE_KCQE_LAYER_CODE_SHIFT 4 +#define FCOE_KCQE_LINKED_WITH_NEXT (0x1<<7) +#define FCOE_KCQE_LINKED_WITH_NEXT_SHIFT 7 +}; + + + +/* + * FCoE KWQE header $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_header { + u8 op_code; + u8 flags; +#define FCOE_KWQE_HEADER_RESERVED0 (0xF<<0) +#define FCOE_KWQE_HEADER_RESERVED0_SHIFT 0 +#define FCOE_KWQE_HEADER_LAYER_CODE (0x7<<4) +#define FCOE_KWQE_HEADER_LAYER_CODE_SHIFT 4 +#define FCOE_KWQE_HEADER_RESERVED1 (0x1<<7) +#define FCOE_KWQE_HEADER_RESERVED1_SHIFT 7 +}; + +/* + * FCoE firmware init request 1 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_init1 { + __le16 num_tasks; + struct fcoe_kwqe_header hdr; + __le32 task_list_pbl_addr_lo; + __le32 task_list_pbl_addr_hi; + __le32 dummy_buffer_addr_lo; + __le32 dummy_buffer_addr_hi; + __le16 sq_num_wqes; + __le16 rq_num_wqes; + __le16 rq_buffer_log_size; + __le16 cq_num_wqes; + __le16 mtu; + u8 num_sessions_log; + u8 flags; +#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE (0xF<<0) +#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE_SHIFT 0 +#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC (0x7<<4) +#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC_SHIFT 4 +#define FCOE_KWQE_INIT1_RESERVED1 (0x1<<7) +#define FCOE_KWQE_INIT1_RESERVED1_SHIFT 7 +}; + +/* + * FCoE firmware init request 2 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_init2 { + u8 hsi_major_version; + u8 hsi_minor_version; + struct fcoe_kwqe_header hdr; + __le32 hash_tbl_pbl_addr_lo; + __le32 hash_tbl_pbl_addr_hi; + __le32 t2_hash_tbl_addr_lo; + __le32 t2_hash_tbl_addr_hi; + __le32 t2_ptr_hash_tbl_addr_lo; + __le32 t2_ptr_hash_tbl_addr_hi; + __le32 free_list_count; +}; + +/* + * FCoE firmware init request 3 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_init3 { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + __le32 error_bit_map_lo; + __le32 error_bit_map_hi; + u8 perf_config; + u8 reserved21[3]; + __le32 reserved2[4]; +}; + +/* + * FCoE connection offload request 1 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_offload1 { + __le16 fcoe_conn_id; + struct fcoe_kwqe_header hdr; + __le32 sq_addr_lo; + __le32 sq_addr_hi; + __le32 rq_pbl_addr_lo; + __le32 rq_pbl_addr_hi; + __le32 rq_first_pbe_addr_lo; + __le32 rq_first_pbe_addr_hi; + __le16 rq_prod; + __le16 reserved0; +}; + +/* + * FCoE connection offload request 2 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_offload2 { + __le16 tx_max_fc_pay_len; + struct fcoe_kwqe_header hdr; + __le32 cq_addr_lo; + __le32 cq_addr_hi; + __le32 xferq_addr_lo; + __le32 xferq_addr_hi; + __le32 conn_db_addr_lo; + __le32 conn_db_addr_hi; + __le32 reserved1; +}; + +/* + * FCoE connection offload request 3 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_offload3 { + __le16 vlan_tag; +#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID (0xFFF<<0) +#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID_SHIFT 0 +#define FCOE_KWQE_CONN_OFFLOAD3_CFI (0x1<<12) +#define FCOE_KWQE_CONN_OFFLOAD3_CFI_SHIFT 12 +#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY (0x7<<13) +#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY_SHIFT 13 + struct fcoe_kwqe_header hdr; + u8 s_id[3]; + u8 tx_max_conc_seqs_c3; + u8 d_id[3]; + u8 flags; +#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS (0x1<<0) +#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS_SHIFT 0 +#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES (0x1<<1) +#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES_SHIFT 1 +#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT (0x1<<2) +#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT_SHIFT 2 +#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ (0x1<<3) +#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ_SHIFT 3 +#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID (0x1<<4) +#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID_SHIFT 4 +#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID (0x1<<5) +#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID_SHIFT 5 +#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0 (0x1<<6) +#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0_SHIFT 6 +#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG (0x1<<7) +#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG_SHIFT 7 + __le32 reserved; + __le32 confq_first_pbe_addr_lo; + __le32 confq_first_pbe_addr_hi; + __le16 tx_total_conc_seqs; + __le16 rx_max_fc_pay_len; + __le16 rx_total_conc_seqs; + u8 rx_max_conc_seqs_c3; + u8 rx_open_seqs_exch_c3; +}; + +/* + * FCoE connection offload request 4 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_offload4 { + u8 e_d_tov_timer_val; + u8 reserved2; + struct fcoe_kwqe_header hdr; + u8 src_mac_addr_lo[2]; + u8 src_mac_addr_mid[2]; + u8 src_mac_addr_hi[2]; + u8 dst_mac_addr_hi[2]; + u8 dst_mac_addr_lo[2]; + u8 dst_mac_addr_mid[2]; + __le32 lcq_addr_lo; + __le32 lcq_addr_hi; + __le32 confq_pbl_base_addr_lo; + __le32 confq_pbl_base_addr_hi; +}; + +/* + * FCoE connection enable request $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_enable_disable { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + u8 src_mac_addr_lo[2]; + u8 src_mac_addr_mid[2]; + u8 src_mac_addr_hi[2]; + u16 vlan_tag; +#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID (0xFFF<<0) +#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID_SHIFT 0 +#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI (0x1<<12) +#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI_SHIFT 12 +#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY (0x7<<13) +#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY_SHIFT 13 + u8 dst_mac_addr_lo[2]; + u8 dst_mac_addr_mid[2]; + u8 dst_mac_addr_hi[2]; + __le16 reserved1; + u8 s_id[3]; + u8 vlan_flag; + u8 d_id[3]; + u8 reserved3; + __le32 context_id; + __le32 conn_id; + __le32 reserved4; +}; + +/* + * FCoE connection destroy request $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_conn_destroy { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + __le32 context_id; + __le32 conn_id; + __le32 reserved1[5]; +}; + +/* + * FCoe destroy request $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_destroy { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + __le32 reserved1[7]; +}; + +/* + * FCoe statistics request $$KEEP_ENDIANNESS$$ + */ +struct fcoe_kwqe_stat { + __le16 reserved0; + struct fcoe_kwqe_header hdr; + __le32 stat_params_addr_lo; + __le32 stat_params_addr_hi; + __le32 reserved1[5]; +}; + +/* + * FCoE KWQ WQE $$KEEP_ENDIANNESS$$ + */ +union fcoe_kwqe { + struct fcoe_kwqe_init1 init1; + struct fcoe_kwqe_init2 init2; + struct fcoe_kwqe_init3 init3; + struct fcoe_kwqe_conn_offload1 conn_offload1; + struct fcoe_kwqe_conn_offload2 conn_offload2; + struct fcoe_kwqe_conn_offload3 conn_offload3; + struct fcoe_kwqe_conn_offload4 conn_offload4; + struct fcoe_kwqe_conn_enable_disable conn_enable_disable; + struct fcoe_kwqe_conn_destroy conn_destroy; + struct fcoe_kwqe_destroy destroy; + struct fcoe_kwqe_stat statistics; +}; + + + + + + + + + + + + + + + + +/* + * TX SGL context $$KEEP_ENDIANNESS$$ + */ +union fcoe_sgl_union_ctx { + struct fcoe_cached_sge_ctx cached_sge; + struct fcoe_ext_mul_sges_ctx sgl; + __le32 opaque[5]; +}; + +/* + * Data-In/ELS/BLS information $$KEEP_ENDIANNESS$$ + */ +struct fcoe_read_flow_info { + union fcoe_sgl_union_ctx sgl_ctx; + __le32 rsrv0[3]; +}; + + +/* + * Fcoe stat context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_s_stat_ctx { + u8 flags; +#define FCOE_S_STAT_CTX_ACTIVE (0x1<<0) +#define FCOE_S_STAT_CTX_ACTIVE_SHIFT 0 +#define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND (0x1<<1) +#define FCOE_S_STAT_CTX_ACK_ABORT_SEQ_COND_SHIFT 1 +#define FCOE_S_STAT_CTX_ABTS_PERFORMED (0x1<<2) +#define FCOE_S_STAT_CTX_ABTS_PERFORMED_SHIFT 2 +#define FCOE_S_STAT_CTX_SEQ_TIMEOUT (0x1<<3) +#define FCOE_S_STAT_CTX_SEQ_TIMEOUT_SHIFT 3 +#define FCOE_S_STAT_CTX_P_RJT (0x1<<4) +#define FCOE_S_STAT_CTX_P_RJT_SHIFT 4 +#define FCOE_S_STAT_CTX_ACK_EOFT (0x1<<5) +#define FCOE_S_STAT_CTX_ACK_EOFT_SHIFT 5 +#define FCOE_S_STAT_CTX_RSRV1 (0x3<<6) +#define FCOE_S_STAT_CTX_RSRV1_SHIFT 6 +}; + +/* + * Fcoe rx seq context $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_seq_ctx { + u8 seq_id; + struct fcoe_s_stat_ctx s_stat; + __le16 seq_cnt; + __le32 low_exp_ro; + __le32 high_exp_ro; +}; + + +/* + * Fcoe rx_wr union context $$KEEP_ENDIANNESS$$ + */ +union fcoe_rx_wr_union_ctx { + struct fcoe_read_flow_info read_info; + union fcoe_comp_flow_info comp_info; + __le32 opaque[8]; +}; + + + +/* + * FCoE SQ element $$KEEP_ENDIANNESS$$ + */ +struct fcoe_sqe { + __le16 wqe; +#define FCOE_SQE_TASK_ID (0x7FFF<<0) +#define FCOE_SQE_TASK_ID_SHIFT 0 +#define FCOE_SQE_TOGGLE_BIT (0x1<<15) +#define FCOE_SQE_TOGGLE_BIT_SHIFT 15 +}; + + + +/* + * 14 regs $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_tx_only { + union fcoe_sgl_union_ctx sgl_ctx; + __le32 rsrv0; +}; + +/* + * 32 bytes (8 regs) used for TX only purposes $$KEEP_ENDIANNESS$$ + */ +union fcoe_tx_wr_rx_rd_union_ctx { + struct fcoe_fc_frame tx_frame; + struct fcoe_fcp_cmd_payload fcp_cmd; + struct fcoe_ext_cleanup_info cleanup; + struct fcoe_ext_abts_info abts; + struct fcoe_ext_fw_tx_seq_ctx tx_seq; + __le32 opaque[8]; +}; + +/* + * tce_tx_wr_rx_rd_const $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_tx_wr_rx_rd_const { + u8 init_flags; +#define FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE (0x7<<0) +#define FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE_SHIFT 0 +#define FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE (0x1<<3) +#define FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT 3 +#define FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE (0x1<<4) +#define FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE_SHIFT 4 +#define FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE (0x3<<5) +#define FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE_SHIFT 5 +#define FCOE_TCE_TX_WR_RX_RD_CONST_SUPPORT_REC_TOV (0x1<<7) +#define FCOE_TCE_TX_WR_RX_RD_CONST_SUPPORT_REC_TOV_SHIFT 7 + u8 tx_flags; +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_VALID (0x1<<0) +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_VALID_SHIFT 0 +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE (0xF<<1) +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE_SHIFT 1 +#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV1 (0x1<<5) +#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV1_SHIFT 5 +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_SEQ_INIT (0x1<<6) +#define FCOE_TCE_TX_WR_RX_RD_CONST_TX_SEQ_INIT_SHIFT 6 +#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV2 (0x1<<7) +#define FCOE_TCE_TX_WR_RX_RD_CONST_RSRV2_SHIFT 7 + __le16 rsrv3; + __le32 verify_tx_seq; +}; + +/* + * tce_tx_wr_rx_rd $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_tx_wr_rx_rd { + union fcoe_tx_wr_rx_rd_union_ctx union_ctx; + struct fcoe_tce_tx_wr_rx_rd_const const_ctx; +}; + +/* + * tce_rx_wr_tx_rd_const $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_rx_wr_tx_rd_const { + __le32 data_2_trns; + __le32 init_flags; +#define FCOE_TCE_RX_WR_TX_RD_CONST_CID (0xFFFFFF<<0) +#define FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT 0 +#define FCOE_TCE_RX_WR_TX_RD_CONST_RSRV0 (0xFF<<24) +#define FCOE_TCE_RX_WR_TX_RD_CONST_RSRV0_SHIFT 24 +}; + +/* + * tce_rx_wr_tx_rd_var $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_rx_wr_tx_rd_var { + __le16 rx_flags; +#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV1 (0xF<<0) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV1_SHIFT 0 +#define FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE (0x7<<4) +#define FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE_SHIFT 4 +#define FCOE_TCE_RX_WR_TX_RD_VAR_CONF_REQ (0x1<<7) +#define FCOE_TCE_RX_WR_TX_RD_VAR_CONF_REQ_SHIFT 7 +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE (0xF<<8) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE_SHIFT 8 +#define FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME (0x1<<12) +#define FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME_SHIFT 12 +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_SEQ_INIT (0x1<<13) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_SEQ_INIT_SHIFT 13 +#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV2 (0x1<<14) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RSRV2_SHIFT 14 +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_VALID (0x1<<15) +#define FCOE_TCE_RX_WR_TX_RD_VAR_RX_VALID_SHIFT 15 + __le16 rx_id; + struct fcoe_fcp_xfr_rdy_payload fcp_xfr_rdy; +}; + +/* + * tce_rx_wr_tx_rd $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_rx_wr_tx_rd { + struct fcoe_tce_rx_wr_tx_rd_const const_ctx; + struct fcoe_tce_rx_wr_tx_rd_var var_ctx; +}; + +/* + * tce_rx_only $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tce_rx_only { + struct fcoe_rx_seq_ctx rx_seq_ctx; + union fcoe_rx_wr_union_ctx union_ctx; +}; + +/* + * task_ctx_entry $$KEEP_ENDIANNESS$$ + */ +struct fcoe_task_ctx_entry { + struct fcoe_tce_tx_only txwr_only; + struct fcoe_tce_tx_wr_rx_rd txwr_rxrd; + struct fcoe_tce_rx_wr_tx_rd rxwr_txrd; + struct fcoe_tce_rx_only rxwr_only; +}; + + + + + + + + + + +/* + * FCoE XFRQ element $$KEEP_ENDIANNESS$$ + */ +struct fcoe_xfrqe { + __le16 wqe; +#define FCOE_XFRQE_TASK_ID (0x7FFF<<0) +#define FCOE_XFRQE_TASK_ID_SHIFT 0 +#define FCOE_XFRQE_TOGGLE_BIT (0x1<<15) +#define FCOE_XFRQE_TOGGLE_BIT_SHIFT 15 +}; + + +/* + * Cached SGEs $$KEEP_ENDIANNESS$$ + */ +struct common_fcoe_sgl { + struct fcoe_bd_ctx sge[3]; +}; + + +/* + * FCoE SQ\XFRQ element + */ +struct fcoe_cached_wqe { + struct fcoe_sqe sqe; + struct fcoe_xfrqe xfrqe; +}; + + +/* + * FCoE connection enable\disable params passed by driver to FW in FCoE enable ramrod $$KEEP_ENDIANNESS$$ + */ +struct fcoe_conn_enable_disable_ramrod_params { + struct fcoe_kwqe_conn_enable_disable enable_disable_kwqe; +}; + + +/* + * FCoE connection offload params passed by driver to FW in FCoE offload ramrod $$KEEP_ENDIANNESS$$ + */ +struct fcoe_conn_offload_ramrod_params { + struct fcoe_kwqe_conn_offload1 offload_kwqe1; + struct fcoe_kwqe_conn_offload2 offload_kwqe2; + struct fcoe_kwqe_conn_offload3 offload_kwqe3; + struct fcoe_kwqe_conn_offload4 offload_kwqe4; +}; + + +struct ustorm_fcoe_mng_ctx { #if defined(__BIG_ENDIAN) - u8 agg_val3_th; - u8 agg_val3; - u16 agg_misc3; + u8 mid_seq_proc_flag; + u8 tce_in_cam_flag; + u8 tce_on_ior_flag; + u8 en_cached_tce_flag; #elif defined(__LITTLE_ENDIAN) - u16 agg_misc3; - u8 agg_val3; - u8 agg_val3_th; -#endif - u32 agg_val1; - u32 agg_misc4_th; -#if defined(__BIG_ENDIAN) - u16 agg_val2_th; - u16 agg_val2; -#elif defined(__LITTLE_ENDIAN) - u16 agg_val2; - u16 agg_val2_th; + u8 en_cached_tce_flag; + u8 tce_on_ior_flag; + u8 tce_in_cam_flag; + u8 mid_seq_proc_flag; #endif #if defined(__BIG_ENDIAN) - u16 __reserved2; - u8 decision_rules; -#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) -#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 -#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) -#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 -#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) -#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 -#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7) -#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7 - u8 decision_rule_enable_bits; -#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0) -#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0 -#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) -#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 -#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2) -#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2 -#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3) -#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 -#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4) -#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4 -#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5) -#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5 -#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6) -#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 -#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) -#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 + u8 tce_cam_addr; + u8 cached_conn_flag; + u16 rsrv0; #elif defined(__LITTLE_ENDIAN) - u8 decision_rule_enable_bits; -#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0) -#define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0 -#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) -#define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 -#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2) -#define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2 -#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3) -#define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 -#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4) -#define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4 -#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5) -#define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5 -#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6) -#define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 -#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) -#define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 - u8 decision_rules; -#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) -#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 -#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) -#define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 -#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) -#define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 -#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7) -#define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7 - u16 __reserved2; + u16 rsrv0; + u8 cached_conn_flag; + u8 tce_cam_addr; #endif +#if defined(__BIG_ENDIAN) + u16 dma_tce_ram_addr; + u16 tce_ram_addr; +#elif defined(__LITTLE_ENDIAN) + u16 tce_ram_addr; + u16 dma_tce_ram_addr; +#endif +#if defined(__BIG_ENDIAN) + u16 ox_id; + u16 wr_done_seq; +#elif defined(__LITTLE_ENDIAN) + u16 wr_done_seq; + u16 ox_id; +#endif + struct regpair task_addr; +}; + +/* + * Parameters initialized during offloaded according to FLOGI/PLOGI/PRLI and used in FCoE context section + */ +struct ustorm_fcoe_params { +#if defined(__BIG_ENDIAN) + u16 fcoe_conn_id; + u16 flags; +#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS (0x1<<0) +#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS_SHIFT 0 +#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES (0x1<<1) +#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES_SHIFT 1 +#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT (0x1<<2) +#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT_SHIFT 2 +#define USTORM_FCOE_PARAMS_B_CONF_REQ (0x1<<3) +#define USTORM_FCOE_PARAMS_B_CONF_REQ_SHIFT 3 +#define USTORM_FCOE_PARAMS_B_REC_VALID (0x1<<4) +#define USTORM_FCOE_PARAMS_B_REC_VALID_SHIFT 4 +#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT (0x1<<5) +#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT_SHIFT 5 +#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT (0x1<<6) +#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT_SHIFT 6 +#define USTORM_FCOE_PARAMS_RSRV0 (0x1FF<<7) +#define USTORM_FCOE_PARAMS_RSRV0_SHIFT 7 +#elif defined(__LITTLE_ENDIAN) + u16 flags; +#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS (0x1<<0) +#define USTORM_FCOE_PARAMS_B_MUL_N_PORT_IDS_SHIFT 0 +#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES (0x1<<1) +#define USTORM_FCOE_PARAMS_B_E_D_TOV_RES_SHIFT 1 +#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT (0x1<<2) +#define USTORM_FCOE_PARAMS_B_CONT_INCR_SEQ_CNT_SHIFT 2 +#define USTORM_FCOE_PARAMS_B_CONF_REQ (0x1<<3) +#define USTORM_FCOE_PARAMS_B_CONF_REQ_SHIFT 3 +#define USTORM_FCOE_PARAMS_B_REC_VALID (0x1<<4) +#define USTORM_FCOE_PARAMS_B_REC_VALID_SHIFT 4 +#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT (0x1<<5) +#define USTORM_FCOE_PARAMS_B_CQ_TOGGLE_BIT_SHIFT 5 +#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT (0x1<<6) +#define USTORM_FCOE_PARAMS_B_XFRQ_TOGGLE_BIT_SHIFT 6 +#define USTORM_FCOE_PARAMS_RSRV0 (0x1FF<<7) +#define USTORM_FCOE_PARAMS_RSRV0_SHIFT 7 + u16 fcoe_conn_id; +#endif +#if defined(__BIG_ENDIAN) + u8 hc_csdm_byte_en; + u8 func_id; + u8 port_id; + u8 vnic_id; +#elif defined(__LITTLE_ENDIAN) + u8 vnic_id; + u8 port_id; + u8 func_id; + u8 hc_csdm_byte_en; +#endif +#if defined(__BIG_ENDIAN) + u16 rx_total_conc_seqs; + u16 rx_max_fc_pay_len; +#elif defined(__LITTLE_ENDIAN) + u16 rx_max_fc_pay_len; + u16 rx_total_conc_seqs; +#endif +#if defined(__BIG_ENDIAN) + u8 task_pbe_idx_off; + u8 task_in_page_log_size; + u16 rx_max_conc_seqs; +#elif defined(__LITTLE_ENDIAN) + u16 rx_max_conc_seqs; + u8 task_in_page_log_size; + u8 task_pbe_idx_off; +#endif +}; + +/* + * FCoE 16-bits index structure + */ +struct fcoe_idx16_fields { + u16 fields; +#define FCOE_IDX16_FIELDS_IDX (0x7FFF<<0) +#define FCOE_IDX16_FIELDS_IDX_SHIFT 0 +#define FCOE_IDX16_FIELDS_MSB (0x1<<15) +#define FCOE_IDX16_FIELDS_MSB_SHIFT 15 +}; + +/* + * FCoE 16-bits index union + */ +union fcoe_idx16_field_union { + struct fcoe_idx16_fields fields; + u16 val; +}; + +/* + * Parameters required for placement according to SGL + */ +struct ustorm_fcoe_data_place_mng { +#if defined(__BIG_ENDIAN) + u16 sge_off; + u8 num_sges; + u8 sge_idx; +#elif defined(__LITTLE_ENDIAN) + u8 sge_idx; + u8 num_sges; + u16 sge_off; +#endif +}; + +/* + * Parameters required for placement according to SGL + */ +struct ustorm_fcoe_data_place { + struct ustorm_fcoe_data_place_mng cached_mng; + struct fcoe_bd_ctx cached_sge[2]; +}; + +/* + * TX processing shall write and RX processing shall read from this section + */ +union fcoe_u_tce_tx_wr_rx_rd_union { + struct fcoe_abts_info abts; + struct fcoe_cleanup_info cleanup; + struct fcoe_fw_tx_seq_ctx tx_seq_ctx; + u32 opaque[2]; +}; + +/* + * TX processing shall write and RX processing shall read from this section + */ +struct fcoe_u_tce_tx_wr_rx_rd { + union fcoe_u_tce_tx_wr_rx_rd_union union_ctx; + struct fcoe_tce_tx_wr_rx_rd_const const_ctx; +}; + +struct ustorm_fcoe_tce { + struct fcoe_u_tce_tx_wr_rx_rd txwr_rxrd; + struct fcoe_tce_rx_wr_tx_rd rxwr_txrd; + struct fcoe_tce_rx_only rxwr; +}; + +struct ustorm_fcoe_cache_ctx { + u32 rsrv0; + struct ustorm_fcoe_data_place data_place; + struct ustorm_fcoe_tce tce; +}; + +/* + * Ustorm FCoE Storm Context + */ +struct ustorm_fcoe_st_context { + struct ustorm_fcoe_mng_ctx mng_ctx; + struct ustorm_fcoe_params fcoe_params; + struct regpair cq_base_addr; + struct regpair rq_pbl_base; + struct regpair rq_cur_page_addr; + struct regpair confq_pbl_base_addr; + struct regpair conn_db_base; + struct regpair xfrq_base_addr; + struct regpair lcq_base_addr; +#if defined(__BIG_ENDIAN) + union fcoe_idx16_field_union rq_cons; + union fcoe_idx16_field_union rq_prod; +#elif defined(__LITTLE_ENDIAN) + union fcoe_idx16_field_union rq_prod; + union fcoe_idx16_field_union rq_cons; +#endif +#if defined(__BIG_ENDIAN) + u16 xfrq_prod; + u16 cq_cons; +#elif defined(__LITTLE_ENDIAN) + u16 cq_cons; + u16 xfrq_prod; +#endif +#if defined(__BIG_ENDIAN) + u16 lcq_cons; + u16 hc_cram_address; +#elif defined(__LITTLE_ENDIAN) + u16 hc_cram_address; + u16 lcq_cons; +#endif +#if defined(__BIG_ENDIAN) + u16 sq_xfrq_lcq_confq_size; + u16 confq_prod; +#elif defined(__LITTLE_ENDIAN) + u16 confq_prod; + u16 sq_xfrq_lcq_confq_size; +#endif +#if defined(__BIG_ENDIAN) + u8 hc_csdm_agg_int; + u8 rsrv2; + u8 available_rqes; + u8 sp_q_flush_cnt; +#elif defined(__LITTLE_ENDIAN) + u8 sp_q_flush_cnt; + u8 available_rqes; + u8 rsrv2; + u8 hc_csdm_agg_int; +#endif +#if defined(__BIG_ENDIAN) + u16 num_pend_tasks; + u16 pbf_ack_ram_addr; +#elif defined(__LITTLE_ENDIAN) + u16 pbf_ack_ram_addr; + u16 num_pend_tasks; +#endif + struct ustorm_fcoe_cache_ctx cache_ctx; +}; + +/* + * The FCoE non-aggregative context of Tstorm + */ +struct tstorm_fcoe_st_context { + struct regpair reserved0; + struct regpair reserved1; +}; + +/* + * Ethernet context section + */ +struct xstorm_fcoe_eth_context_section { +#if defined(__BIG_ENDIAN) + u8 remote_addr_4; + u8 remote_addr_5; + u8 local_addr_0; + u8 local_addr_1; +#elif defined(__LITTLE_ENDIAN) + u8 local_addr_1; + u8 local_addr_0; + u8 remote_addr_5; + u8 remote_addr_4; +#endif +#if defined(__BIG_ENDIAN) + u8 remote_addr_0; + u8 remote_addr_1; + u8 remote_addr_2; + u8 remote_addr_3; +#elif defined(__LITTLE_ENDIAN) + u8 remote_addr_3; + u8 remote_addr_2; + u8 remote_addr_1; + u8 remote_addr_0; +#endif +#if defined(__BIG_ENDIAN) + u16 reserved_vlan_type; + u16 params; +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI (0x1<<12) +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT 12 +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 +#elif defined(__LITTLE_ENDIAN) + u16 params; +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI (0x1<<12) +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_CFI_SHIFT 12 +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) +#define XSTORM_FCOE_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 + u16 reserved_vlan_type; +#endif +#if defined(__BIG_ENDIAN) + u8 local_addr_2; + u8 local_addr_3; + u8 local_addr_4; + u8 local_addr_5; +#elif defined(__LITTLE_ENDIAN) + u8 local_addr_5; + u8 local_addr_4; + u8 local_addr_3; + u8 local_addr_2; +#endif +}; + +/* + * Flags used in FCoE context section - 1 byte + */ +struct xstorm_fcoe_context_flags { + u8 flags; +#define XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q (0x3<<0) +#define XSTORM_FCOE_CONTEXT_FLAGS_B_PROC_Q_SHIFT 0 +#define XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ (0x1<<2) +#define XSTORM_FCOE_CONTEXT_FLAGS_B_MID_SEQ_SHIFT 2 +#define XSTORM_FCOE_CONTEXT_FLAGS_B_BLOCK_SQ (0x1<<3) +#define XSTORM_FCOE_CONTEXT_FLAGS_B_BLOCK_SQ_SHIFT 3 +#define XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT (0x1<<4) +#define XSTORM_FCOE_CONTEXT_FLAGS_B_REC_SUPPORT_SHIFT 4 +#define XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE (0x1<<5) +#define XSTORM_FCOE_CONTEXT_FLAGS_B_SQ_TOGGLE_SHIFT 5 +#define XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE (0x1<<6) +#define XSTORM_FCOE_CONTEXT_FLAGS_B_XFRQ_TOGGLE_SHIFT 6 +#define XSTORM_FCOE_CONTEXT_FLAGS_RESERVED0 (0x1<<7) +#define XSTORM_FCOE_CONTEXT_FLAGS_RESERVED0_SHIFT 7 +}; + +struct xstorm_fcoe_tce { + struct fcoe_tce_tx_only txwr; + struct fcoe_tce_tx_wr_rx_rd txwr_rxrd; +}; + +/* + * FCP_DATA parameters required for transmission + */ +struct xstorm_fcoe_fcp_data { + u32 io_rem; +#if defined(__BIG_ENDIAN) + u16 cached_sge_off; + u8 cached_num_sges; + u8 cached_sge_idx; +#elif defined(__LITTLE_ENDIAN) + u8 cached_sge_idx; + u8 cached_num_sges; + u16 cached_sge_off; +#endif + u32 buf_addr_hi_0; + u32 buf_addr_lo_0; +#if defined(__BIG_ENDIAN) + u16 num_of_pending_tasks; + u16 buf_len_0; +#elif defined(__LITTLE_ENDIAN) + u16 buf_len_0; + u16 num_of_pending_tasks; +#endif + u32 buf_addr_hi_1; + u32 buf_addr_lo_1; +#if defined(__BIG_ENDIAN) + u16 task_pbe_idx_off; + u16 buf_len_1; +#elif defined(__LITTLE_ENDIAN) + u16 buf_len_1; + u16 task_pbe_idx_off; +#endif + u32 buf_addr_hi_2; + u32 buf_addr_lo_2; +#if defined(__BIG_ENDIAN) + u16 ox_id; + u16 buf_len_2; +#elif defined(__LITTLE_ENDIAN) + u16 buf_len_2; + u16 ox_id; +#endif +}; + +/* + * FCoE 16-bits vlan structure + */ +struct fcoe_vlan_fields { + u16 fields; +#define FCOE_VLAN_FIELDS_VID (0xFFF<<0) +#define FCOE_VLAN_FIELDS_VID_SHIFT 0 +#define FCOE_VLAN_FIELDS_CLI (0x1<<12) +#define FCOE_VLAN_FIELDS_CLI_SHIFT 12 +#define FCOE_VLAN_FIELDS_PRI (0x7<<13) +#define FCOE_VLAN_FIELDS_PRI_SHIFT 13 +}; + +/* + * FCoE 16-bits vlan union + */ +union fcoe_vlan_field_union { + struct fcoe_vlan_fields fields; + u16 val; +}; + +/* + * FCoE 16-bits vlan, vif union + */ +union fcoe_vlan_vif_field_union { + union fcoe_vlan_field_union vlan; + u16 vif; +}; + +/* + * FCoE context section + */ +struct xstorm_fcoe_context_section { +#if defined(__BIG_ENDIAN) + u8 cs_ctl; + u8 s_id[3]; +#elif defined(__LITTLE_ENDIAN) + u8 s_id[3]; + u8 cs_ctl; +#endif +#if defined(__BIG_ENDIAN) + u8 rctl; + u8 d_id[3]; +#elif defined(__LITTLE_ENDIAN) + u8 d_id[3]; + u8 rctl; +#endif +#if defined(__BIG_ENDIAN) + u16 sq_xfrq_lcq_confq_size; + u16 tx_max_fc_pay_len; +#elif defined(__LITTLE_ENDIAN) + u16 tx_max_fc_pay_len; + u16 sq_xfrq_lcq_confq_size; +#endif + u32 lcq_prod; +#if defined(__BIG_ENDIAN) + u8 port_id; + u8 func_id; + u8 seq_id; + struct xstorm_fcoe_context_flags tx_flags; +#elif defined(__LITTLE_ENDIAN) + struct xstorm_fcoe_context_flags tx_flags; + u8 seq_id; + u8 func_id; + u8 port_id; +#endif +#if defined(__BIG_ENDIAN) + u16 mtu; + u8 func_mode; + u8 vnic_id; +#elif defined(__LITTLE_ENDIAN) + u8 vnic_id; + u8 func_mode; + u16 mtu; +#endif + struct regpair confq_curr_page_addr; + struct fcoe_cached_wqe cached_wqe[8]; + struct regpair lcq_base_addr; + struct xstorm_fcoe_tce tce; + struct xstorm_fcoe_fcp_data fcp_data; +#if defined(__BIG_ENDIAN) + u8 tx_max_conc_seqs_c3; + u8 vlan_flag; + u8 vntag_vlan; + u8 data_pb_cmd_size; +#elif defined(__LITTLE_ENDIAN) + u8 data_pb_cmd_size; + u8 vntag_vlan; + u8 vlan_flag; + u8 tx_max_conc_seqs_c3; +#endif +#if defined(__BIG_ENDIAN) + u16 fcoe_tx_stat_params_ram_addr; + u16 fcoe_tx_fc_seq_ram_addr; +#elif defined(__LITTLE_ENDIAN) + u16 fcoe_tx_fc_seq_ram_addr; + u16 fcoe_tx_stat_params_ram_addr; +#endif +#if defined(__BIG_ENDIAN) + u8 fcp_cmd_line_credit; + u8 eth_hdr_size; + u16 pbf_addr; +#elif defined(__LITTLE_ENDIAN) + u16 pbf_addr; + u8 eth_hdr_size; + u8 fcp_cmd_line_credit; +#endif +#if defined(__BIG_ENDIAN) + union fcoe_vlan_vif_field_union multi_func_val; + u8 page_log_size; + u8 all_conf_version; +#elif defined(__LITTLE_ENDIAN) + u8 all_conf_version; + u8 page_log_size; + union fcoe_vlan_vif_field_union multi_func_val; +#endif +#if defined(__BIG_ENDIAN) + u16 fcp_cmd_frame_size; + u16 pbf_addr_ff; +#elif defined(__LITTLE_ENDIAN) + u16 pbf_addr_ff; + u16 fcp_cmd_frame_size; +#endif +#if defined(__BIG_ENDIAN) + u8 vlan_num; + u8 cos; + u8 cache_xfrq_cons; + u8 cache_sq_cons; +#elif defined(__LITTLE_ENDIAN) + u8 cache_sq_cons; + u8 cache_xfrq_cons; + u8 cos; + u8 vlan_num; +#endif + u32 verify_tx_seq; +}; + +/* + * Xstorm FCoE Storm Context + */ +struct xstorm_fcoe_st_context { + struct xstorm_fcoe_eth_context_section eth; + struct xstorm_fcoe_context_section fcoe; +}; + +/* + * Fcoe connection context + */ +struct fcoe_context { + struct ustorm_fcoe_st_context ustorm_st_context; + struct tstorm_fcoe_st_context tstorm_st_context; + struct xstorm_fcoe_ag_context xstorm_ag_context; + struct tstorm_fcoe_ag_context tstorm_ag_context; + struct ustorm_fcoe_ag_context ustorm_ag_context; + struct timers_block_context timers_context; + struct xstorm_fcoe_st_context xstorm_st_context; +}; + + + + +/* + * FCoE init params passed by driver to FW in FCoE init ramrod $$KEEP_ENDIANNESS$$ + */ +struct fcoe_init_ramrod_params { + struct fcoe_kwqe_init1 init_kwqe1; + struct fcoe_kwqe_init2 init_kwqe2; + struct fcoe_kwqe_init3 init_kwqe3; + struct regpair eq_pbl_base; + __le32 eq_pbl_size; + __le32 reserved2; + __le16 eq_prod; + __le16 sb_num; + u8 sb_id; + u8 reserved0; + __le16 reserved1; +}; + + +/* + * FCoE statistics params buffer passed by driver to FW in FCoE statistics ramrod $$KEEP_ENDIANNESS$$ + */ +struct fcoe_stat_ramrod_params { + struct fcoe_kwqe_stat stat_kwqe; +}; + +/* + * CQ DB CQ producer and pending completion counter + */ +struct iscsi_cq_db_prod_pnd_cmpltn_cnt { +#if defined(__BIG_ENDIAN) + u16 cntr; + u16 prod; +#elif defined(__LITTLE_ENDIAN) + u16 prod; + u16 cntr; +#endif +}; + +/* + * CQ DB pending completion ITT array + */ +struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr { + struct iscsi_cq_db_prod_pnd_cmpltn_cnt prod_pend_comp[8]; +}; + +/* + * Cstorm CQ sequence to notify array, updated by driver + */ +struct iscsi_cq_db_sqn_2_notify_arr { + u16 sqn[8]; +}; + +/* + * Cstorm iSCSI Storm Context + */ +struct cstorm_iscsi_st_context { + struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr cq_c_prod_pend_comp_ctr_arr; + struct iscsi_cq_db_sqn_2_notify_arr cq_c_prod_sqn_arr; + struct iscsi_cq_db_sqn_2_notify_arr cq_c_sqn_2_notify_arr; + struct regpair hq_pbl_base; + struct regpair hq_curr_pbe; + struct regpair task_pbl_base; + struct regpair cq_db_base; +#if defined(__BIG_ENDIAN) + u16 hq_bd_itt; + u16 iscsi_conn_id; +#elif defined(__LITTLE_ENDIAN) + u16 iscsi_conn_id; + u16 hq_bd_itt; +#endif + u32 hq_bd_data_segment_len; + u32 hq_bd_buffer_offset; +#if defined(__BIG_ENDIAN) + u8 rsrv; + u8 cq_proc_en_bit_map; + u8 cq_pend_comp_itt_valid_bit_map; + u8 hq_bd_opcode; +#elif defined(__LITTLE_ENDIAN) + u8 hq_bd_opcode; + u8 cq_pend_comp_itt_valid_bit_map; + u8 cq_proc_en_bit_map; + u8 rsrv; +#endif + u32 hq_tcp_seq; +#if defined(__BIG_ENDIAN) + u16 flags; +#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0) +#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0 +#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1) +#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1 +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2) +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2 +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3) +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3 +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4) +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4 +#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5) +#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5 + u16 hq_cons; +#elif defined(__LITTLE_ENDIAN) + u16 hq_cons; + u16 flags; +#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0) +#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0 +#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1) +#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1 +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2) +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2 +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3) +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3 +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4) +#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4 +#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5) +#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5 +#endif + struct regpair rsrv1; +}; + + +/* + * SCSI read/write SQ WQE + */ +struct iscsi_cmd_pdu_hdr_little_endian { +#if defined(__BIG_ENDIAN) + u8 opcode; + u8 op_attr; +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES (0x7<<0) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES_SHIFT 0 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x3<<3) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 3 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG (0x1<<5) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG_SHIFT 5 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG (0x1<<6) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG_SHIFT 6 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 7 + u16 rsrv0; +#elif defined(__LITTLE_ENDIAN) + u16 rsrv0; + u8 op_attr; +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES (0x7<<0) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_ATTRIBUTES_SHIFT 0 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x3<<3) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 3 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG (0x1<<5) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_WRITE_FLAG_SHIFT 5 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG (0x1<<6) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_READ_FLAG_SHIFT 6 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 7 + u8 opcode; +#endif + u32 data_fields; +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) +#define ISCSI_CMD_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 + struct regpair lun; + u32 itt; + u32 expected_data_transfer_length; + u32 cmd_sn; + u32 exp_stat_sn; + u32 scsi_command_block[4]; +}; + + +/* + * Buffer per connection, used in Tstorm + */ +struct iscsi_conn_buf { + struct regpair reserved[8]; +}; + + +/* + * iSCSI context region, used only in iSCSI + */ +struct ustorm_iscsi_rq_db { + struct regpair pbl_base; + struct regpair curr_pbe; +}; + +/* + * iSCSI context region, used only in iSCSI + */ +struct ustorm_iscsi_r2tq_db { + struct regpair pbl_base; + struct regpair curr_pbe; +}; + +/* + * iSCSI context region, used only in iSCSI + */ +struct ustorm_iscsi_cq_db { +#if defined(__BIG_ENDIAN) + u16 cq_sn; + u16 prod; +#elif defined(__LITTLE_ENDIAN) + u16 prod; + u16 cq_sn; +#endif + struct regpair curr_pbe; +}; + +/* + * iSCSI context region, used only in iSCSI + */ +struct rings_db { + struct ustorm_iscsi_rq_db rq; + struct ustorm_iscsi_r2tq_db r2tq; + struct ustorm_iscsi_cq_db cq[8]; +#if defined(__BIG_ENDIAN) + u16 rq_prod; + u16 r2tq_prod; +#elif defined(__LITTLE_ENDIAN) + u16 r2tq_prod; + u16 rq_prod; +#endif + struct regpair cq_pbl_base; +}; + +/* + * iSCSI context region, used only in iSCSI + */ +struct ustorm_iscsi_placement_db { + u32 sgl_base_lo; + u32 sgl_base_hi; + u32 local_sge_0_address_hi; + u32 local_sge_0_address_lo; +#if defined(__BIG_ENDIAN) + u16 curr_sge_offset; + u16 local_sge_0_size; +#elif defined(__LITTLE_ENDIAN) + u16 local_sge_0_size; + u16 curr_sge_offset; +#endif + u32 local_sge_1_address_hi; + u32 local_sge_1_address_lo; +#if defined(__BIG_ENDIAN) + u8 exp_padding_2b; + u8 nal_len_3b; + u16 local_sge_1_size; +#elif defined(__LITTLE_ENDIAN) + u16 local_sge_1_size; + u8 nal_len_3b; + u8 exp_padding_2b; +#endif +#if defined(__BIG_ENDIAN) + u8 sgl_size; + u8 local_sge_index_2b; + u16 reserved7; +#elif defined(__LITTLE_ENDIAN) + u16 reserved7; + u8 local_sge_index_2b; + u8 sgl_size; +#endif + u32 rem_pdu; + u32 place_db_bitfield_1; +#define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD (0xFFFFFF<<0) +#define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD_SHIFT 0 +#define USTORM_ISCSI_PLACEMENT_DB_CQ_ID (0xFF<<24) +#define USTORM_ISCSI_PLACEMENT_DB_CQ_ID_SHIFT 24 + u32 place_db_bitfield_2; +#define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE (0xFFFFFF<<0) +#define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE_SHIFT 0 +#define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX (0xFF<<24) +#define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX_SHIFT 24 + u32 nal; +#define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE (0xFFFFFF<<0) +#define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE_SHIFT 0 +#define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B (0xFF<<24) +#define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B_SHIFT 24 +}; + +/* + * Ustorm iSCSI Storm Context + */ +struct ustorm_iscsi_st_context { + u32 exp_stat_sn; + u32 exp_data_sn; + struct rings_db ring; + struct regpair task_pbl_base; + struct regpair tce_phy_addr; + struct ustorm_iscsi_placement_db place_db; + u32 reserved8; + u32 rem_rcv_len; +#if defined(__BIG_ENDIAN) + u16 hdr_itt; + u16 iscsi_conn_id; +#elif defined(__LITTLE_ENDIAN) + u16 iscsi_conn_id; + u16 hdr_itt; +#endif + u32 nal_bytes; +#if defined(__BIG_ENDIAN) + u8 hdr_second_byte_union; + u8 bitfield_0; +#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0) +#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0 +#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1) +#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1 +#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2) +#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 2 +#define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3) +#define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 3 + u8 task_pdu_cache_index; + u8 task_pbe_cache_index; +#elif defined(__LITTLE_ENDIAN) + u8 task_pbe_cache_index; + u8 task_pdu_cache_index; + u8 bitfield_0; +#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0) +#define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0 +#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1) +#define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1 +#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC (0x1<<2) +#define USTORM_ISCSI_ST_CONTEXT_BRESETCRC_SHIFT 2 +#define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x1F<<3) +#define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 3 + u8 hdr_second_byte_union; +#endif +#if defined(__BIG_ENDIAN) + u16 reserved3; + u8 reserved2; + u8 acDecrement; +#elif defined(__LITTLE_ENDIAN) + u8 acDecrement; + u8 reserved2; + u16 reserved3; +#endif + u32 task_stat; +#if defined(__BIG_ENDIAN) + u8 hdr_opcode; + u8 num_cqs; + u16 reserved5; +#elif defined(__LITTLE_ENDIAN) + u16 reserved5; + u8 num_cqs; + u8 hdr_opcode; +#endif + u32 negotiated_rx; +#define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH (0xFFFFFF<<0) +#define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH_SHIFT 0 +#define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS (0xFF<<24) +#define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT 24 + u32 negotiated_rx_and_flags; +#define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH (0xFFFFFF<<0) +#define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH_SHIFT 0 +#define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED (0x1<<24) +#define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED_SHIFT 24 +#define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN (0x1<<25) +#define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN_SHIFT 25 +#define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN (0x1<<26) +#define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN_SHIFT 26 +#define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR (0x1<<27) +#define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR_SHIFT 27 +#define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID (0x1<<28) +#define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID_SHIFT 28 +#define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE (0x3<<29) +#define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE_SHIFT 29 +#define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED (0x1<<31) +#define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED_SHIFT 31 +}; + +/* + * TCP context region, shared in TOE, RDMA and ISCSI + */ +struct tstorm_tcp_st_context_section { + u32 flags1; +#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT (0xFFFFFF<<0) +#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT_SHIFT 0 +#define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID (0x1<<24) +#define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID_SHIFT 24 +#define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS (0x1<<25) +#define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS_SHIFT 25 +#define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0 (0x1<<26) +#define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED0_SHIFT 26 +#define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD (0x1<<27) +#define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD_SHIFT 27 +#define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED (0x1<<28) +#define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED_SHIFT 28 +#define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE (0x1<<29) +#define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE_SHIFT 29 +#define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN (0x1<<30) +#define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN_SHIFT 30 +#define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN (0x1<<31) +#define TSTORM_TCP_ST_CONTEXT_SECTION_LAST_ISLE_HAS_FIN_SHIFT 31 + u32 flags2; +#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION (0xFFFFFF<<0) +#define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION_SHIFT 0 +#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN (0x1<<24) +#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN_SHIFT 24 +#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN (0x1<<25) +#define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN_SHIFT 25 +#define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT (0x1<<26) +#define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT_SHIFT 26 +#define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT (0x1<<27) +#define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT_SHIFT 27 +#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<28) +#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 28 +#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<29) +#define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 29 +#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK (0x1<<30) +#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_RST_ATTACK_SHIFT 30 +#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK (0x1<<31) +#define __TSTORM_TCP_ST_CONTEXT_SECTION_IN_WINDOW_SYN_ATTACK_SHIFT 31 +#if defined(__BIG_ENDIAN) + u16 mss; + u8 tcp_sm_state; + u8 rto_exp; +#elif defined(__LITTLE_ENDIAN) + u8 rto_exp; + u8 tcp_sm_state; + u16 mss; +#endif + u32 rcv_nxt; + u32 timestamp_recent; + u32 timestamp_recent_time; + u32 cwnd; + u32 ss_thresh; + u32 cwnd_accum; + u32 prev_seg_seq; + u32 expected_rel_seq; + u32 recover; +#if defined(__BIG_ENDIAN) + u8 retransmit_count; + u8 ka_max_probe_count; + u8 persist_probe_count; + u8 ka_probe_count; +#elif defined(__LITTLE_ENDIAN) + u8 ka_probe_count; + u8 persist_probe_count; + u8 ka_max_probe_count; + u8 retransmit_count; +#endif +#if defined(__BIG_ENDIAN) + u8 statistics_counter_id; + u8 ooo_support_mode; + u8 snd_wnd_scale; + u8 dup_ack_count; +#elif defined(__LITTLE_ENDIAN) + u8 dup_ack_count; + u8 snd_wnd_scale; + u8 ooo_support_mode; + u8 statistics_counter_id; +#endif + u32 retransmit_start_time; + u32 ka_timeout; + u32 ka_interval; + u32 isle_start_seq; + u32 isle_end_seq; +#if defined(__BIG_ENDIAN) + u16 second_isle_address; + u16 recent_seg_wnd; +#elif defined(__LITTLE_ENDIAN) + u16 recent_seg_wnd; + u16 second_isle_address; +#endif +#if defined(__BIG_ENDIAN) + u8 max_isles_ever_happened; + u8 isles_number; + u16 last_isle_address; +#elif defined(__LITTLE_ENDIAN) + u16 last_isle_address; + u8 isles_number; + u8 max_isles_ever_happened; +#endif + u32 max_rt_time; +#if defined(__BIG_ENDIAN) + u16 lsb_mac_address; + u16 vlan_id; +#elif defined(__LITTLE_ENDIAN) + u16 vlan_id; + u16 lsb_mac_address; +#endif +#if defined(__BIG_ENDIAN) + u16 msb_mac_address; + u16 mid_mac_address; +#elif defined(__LITTLE_ENDIAN) + u16 mid_mac_address; + u16 msb_mac_address; +#endif + u32 rightmost_received_seq; +}; + +/* + * Termination variables + */ +struct iscsi_term_vars { + u8 BitMap; +#define ISCSI_TERM_VARS_TCP_STATE (0xF<<0) +#define ISCSI_TERM_VARS_TCP_STATE_SHIFT 0 +#define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT (0x1<<4) +#define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT 4 +#define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT (0x1<<5) +#define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT 5 +#define ISCSI_TERM_VARS_TERM_ON_CHIP (0x1<<6) +#define ISCSI_TERM_VARS_TERM_ON_CHIP_SHIFT 6 +#define ISCSI_TERM_VARS_RSRV (0x1<<7) +#define ISCSI_TERM_VARS_RSRV_SHIFT 7 +}; + +/* + * iSCSI context region, used only in iSCSI + */ +struct tstorm_iscsi_st_context_section { + u32 nalPayload; + u32 b2nh; +#if defined(__BIG_ENDIAN) + u16 rq_cons; + u8 flags; +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN (0x3<<5) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN_SHIFT 5 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0 (0x1<<7) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0_SHIFT 7 + u8 hdr_bytes_2_fetch; +#elif defined(__LITTLE_ENDIAN) + u8 hdr_bytes_2_fetch; + u8 flags; +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN (0x3<<5) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_NALLEN_SHIFT 5 +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0 (0x1<<7) +#define TSTORM_ISCSI_ST_CONTEXT_SECTION_RSRV0_SHIFT 7 + u16 rq_cons; +#endif + struct regpair rq_db_phy_addr; +#if defined(__BIG_ENDIAN) + struct iscsi_term_vars term_vars; + u8 rsrv1; + u16 iscsi_conn_id; +#elif defined(__LITTLE_ENDIAN) + u16 iscsi_conn_id; + u8 rsrv1; + struct iscsi_term_vars term_vars; +#endif + u32 process_nxt; +}; + +/* + * The iSCSI non-aggregative context of Tstorm + */ +struct tstorm_iscsi_st_context { + struct tstorm_tcp_st_context_section tcp; + struct tstorm_iscsi_st_context_section iscsi; }; /* @@ -3505,7 +4450,27 @@ struct xstorm_tcp_context_section { u16 window_scaling_factor; u16 pseudo_csum; #endif - u32 reserved2; +#if defined(__BIG_ENDIAN) + u16 reserved2; + u8 statistics_counter_id; + u8 statistics_params; +#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0) +#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0 +#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1) +#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1 +#define XSTORM_TCP_CONTEXT_SECTION_RESERVED (0x3F<<2) +#define XSTORM_TCP_CONTEXT_SECTION_RESERVED_SHIFT 2 +#elif defined(__LITTLE_ENDIAN) + u8 statistics_params; +#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0) +#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0 +#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1) +#define XSTORM_TCP_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1 +#define XSTORM_TCP_CONTEXT_SECTION_RESERVED (0x3F<<2) +#define XSTORM_TCP_CONTEXT_SECTION_RESERVED_SHIFT 2 + u8 statistics_counter_id; + u16 reserved2; +#endif u32 ts_time_diff; u32 __next_timer_expir; }; @@ -3518,29 +4483,37 @@ struct xstorm_common_context_section { union xstorm_ip_context_section_types ip_union; struct xstorm_tcp_context_section tcp; #if defined(__BIG_ENDIAN) - u16 reserved; - u8 statistics_params; -#define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0) -#define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0 -#define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1) -#define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1 -#define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID (0x1F<<2) -#define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID_SHIFT 2 + u16 flags; +#define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED (0x1<<0) +#define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT 0 +#define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT (0x7<<1) +#define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT 1 +#define XSTORM_COMMON_CONTEXT_SECTION_COS (0x7<<4) +#define XSTORM_COMMON_CONTEXT_SECTION_COS_SHIFT 4 #define XSTORM_COMMON_CONTEXT_SECTION_DCB_EXISTS (0x1<<7) #define XSTORM_COMMON_CONTEXT_SECTION_DCB_EXISTS_SHIFT 7 +#define XSTORM_COMMON_CONTEXT_SECTION_DCB_PRIORITY (0x7<<8) +#define XSTORM_COMMON_CONTEXT_SECTION_DCB_PRIORITY_SHIFT 8 +#define XSTORM_COMMON_CONTEXT_SECTION_RESERVED (0x1F<<11) +#define XSTORM_COMMON_CONTEXT_SECTION_RESERVED_SHIFT 11 + u8 conf_version; u8 ip_version_1b; #elif defined(__LITTLE_ENDIAN) u8 ip_version_1b; - u8 statistics_params; -#define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0) -#define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0 -#define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1) -#define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1 -#define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID (0x1F<<2) -#define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID_SHIFT 2 + u8 conf_version; + u16 flags; +#define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED (0x1<<0) +#define XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT 0 +#define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT (0x7<<1) +#define XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT 1 +#define XSTORM_COMMON_CONTEXT_SECTION_COS (0x7<<4) +#define XSTORM_COMMON_CONTEXT_SECTION_COS_SHIFT 4 #define XSTORM_COMMON_CONTEXT_SECTION_DCB_EXISTS (0x1<<7) #define XSTORM_COMMON_CONTEXT_SECTION_DCB_EXISTS_SHIFT 7 - u16 reserved; +#define XSTORM_COMMON_CONTEXT_SECTION_DCB_PRIORITY (0x7<<8) +#define XSTORM_COMMON_CONTEXT_SECTION_DCB_PRIORITY_SHIFT 8 +#define XSTORM_COMMON_CONTEXT_SECTION_RESERVED (0x1F<<11) +#define XSTORM_COMMON_CONTEXT_SECTION_RESERVED_SHIFT 11 #endif }; @@ -3678,100 +4651,7 @@ struct xstorm_iscsi_st_context { }; /* - * CQ DB CQ producer and pending completion counter - */ -struct iscsi_cq_db_prod_pnd_cmpltn_cnt { -#if defined(__BIG_ENDIAN) - u16 cntr; - u16 prod; -#elif defined(__LITTLE_ENDIAN) - u16 prod; - u16 cntr; -#endif -}; - -/* - * CQ DB pending completion ITT array - */ -struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr { - struct iscsi_cq_db_prod_pnd_cmpltn_cnt prod_pend_comp[8]; -}; - -/* - * Cstorm CQ sequence to notify array, updated by driver - */ -struct iscsi_cq_db_sqn_2_notify_arr { - u16 sqn[8]; -}; - -/* - * Cstorm iSCSI Storm Context - */ -struct cstorm_iscsi_st_context { - struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr cq_c_prod_pend_comp_ctr_arr; - struct iscsi_cq_db_sqn_2_notify_arr cq_c_prod_sqn_arr; - struct iscsi_cq_db_sqn_2_notify_arr cq_c_sqn_2_notify_arr; - struct regpair hq_pbl_base; - struct regpair hq_curr_pbe; - struct regpair task_pbl_base; - struct regpair cq_db_base; -#if defined(__BIG_ENDIAN) - u16 hq_bd_itt; - u16 iscsi_conn_id; -#elif defined(__LITTLE_ENDIAN) - u16 iscsi_conn_id; - u16 hq_bd_itt; -#endif - u32 hq_bd_data_segment_len; - u32 hq_bd_buffer_offset; -#if defined(__BIG_ENDIAN) - u8 timer_entry_idx; - u8 cq_proc_en_bit_map; - u8 cq_pend_comp_itt_valid_bit_map; - u8 hq_bd_opcode; -#elif defined(__LITTLE_ENDIAN) - u8 hq_bd_opcode; - u8 cq_pend_comp_itt_valid_bit_map; - u8 cq_proc_en_bit_map; - u8 timer_entry_idx; -#endif - u32 hq_tcp_seq; -#if defined(__BIG_ENDIAN) - u16 flags; -#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0) -#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0 -#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1) -#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1 -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2) -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2 -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3) -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3 -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4) -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4 -#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5) -#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5 - u16 hq_cons; -#elif defined(__LITTLE_ENDIAN) - u16 hq_cons; - u16 flags; -#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0) -#define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0 -#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1) -#define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1 -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2) -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2 -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3) -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3 -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4) -#define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4 -#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5) -#define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5 -#endif - struct regpair rsrv1; -}; - -/* - * Iscsi connection context + * Iscsi connection context */ struct iscsi_context { struct ustorm_iscsi_st_context ustorm_st_context; @@ -3787,584 +4667,389 @@ struct iscsi_context { struct cstorm_iscsi_st_context cstorm_st_context; }; + /* - * FCoE KCQ CQE parameters + * PDU header of an iSCSI DATA-OUT */ -union fcoe_kcqe_params { - u32 reserved0[4]; +struct iscsi_data_pdu_hdr_little_endian { +#if defined(__BIG_ENDIAN) + u8 opcode; + u8 op_attr; +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0) +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7) +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 7 + u16 rsrv0; +#elif defined(__LITTLE_ENDIAN) + u16 rsrv0; + u8 op_attr; +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0) +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG (0x1<<7) +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_FINAL_FLAG_SHIFT 7 + u8 opcode; +#endif + u32 data_fields; +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) +#define ISCSI_DATA_PDU_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 + struct regpair lun; + u32 itt; + u32 ttt; + u32 rsrv2; + u32 exp_stat_sn; + u32 rsrv3; + u32 data_sn; + u32 buffer_offset; + u32 rsrv4; +}; + + +/* + * PDU header of an iSCSI login request + */ +struct iscsi_login_req_hdr_little_endian { +#if defined(__BIG_ENDIAN) + u8 opcode; + u8 op_attr; +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG (0x3<<0) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG_SHIFT 0 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG (0x3<<2) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG_SHIFT 2 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0 (0x3<<4) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0_SHIFT 4 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 6 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT (0x1<<7) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT_SHIFT 7 + u8 version_max; + u8 version_min; +#elif defined(__LITTLE_ENDIAN) + u8 version_min; + u8 version_max; + u8 op_attr; +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG (0x3<<0) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_NSG_SHIFT 0 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG (0x3<<2) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CSG_SHIFT 2 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0 (0x3<<4) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_RSRV0_SHIFT 4 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 6 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT (0x1<<7) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TRANSIT_SHIFT 7 + u8 opcode; +#endif + u32 data_fields; +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) +#define ISCSI_LOGIN_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 + u32 isid_lo; +#if defined(__BIG_ENDIAN) + u16 isid_hi; + u16 tsih; +#elif defined(__LITTLE_ENDIAN) + u16 tsih; + u16 isid_hi; +#endif + u32 itt; +#if defined(__BIG_ENDIAN) + u16 cid; + u16 rsrv1; +#elif defined(__LITTLE_ENDIAN) + u16 rsrv1; + u16 cid; +#endif + u32 cmd_sn; + u32 exp_stat_sn; + u32 rsrv2[4]; }; /* - * FCoE KCQ CQE + * PDU header of an iSCSI logout request */ -struct fcoe_kcqe { - u32 fcoe_conn_id; - u32 completion_status; - u32 fcoe_conn_context_id; - union fcoe_kcqe_params params; +struct iscsi_logout_req_hdr_little_endian { #if defined(__BIG_ENDIAN) - u8 flags; -#define FCOE_KCQE_RESERVED0 (0x7<<0) -#define FCOE_KCQE_RESERVED0_SHIFT 0 -#define FCOE_KCQE_RAMROD_COMPLETION (0x1<<3) -#define FCOE_KCQE_RAMROD_COMPLETION_SHIFT 3 -#define FCOE_KCQE_LAYER_CODE (0x7<<4) -#define FCOE_KCQE_LAYER_CODE_SHIFT 4 -#define FCOE_KCQE_LINKED_WITH_NEXT (0x1<<7) -#define FCOE_KCQE_LINKED_WITH_NEXT_SHIFT 7 - u8 op_code; - u16 qe_self_seq; + u8 opcode; + u8 op_attr; +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE (0x7F<<0) +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE_SHIFT 0 +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7) +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 7 + u16 rsrv0; #elif defined(__LITTLE_ENDIAN) - u16 qe_self_seq; - u8 op_code; - u8 flags; -#define FCOE_KCQE_RESERVED0 (0x7<<0) -#define FCOE_KCQE_RESERVED0_SHIFT 0 -#define FCOE_KCQE_RAMROD_COMPLETION (0x1<<3) -#define FCOE_KCQE_RAMROD_COMPLETION_SHIFT 3 -#define FCOE_KCQE_LAYER_CODE (0x7<<4) -#define FCOE_KCQE_LAYER_CODE_SHIFT 4 -#define FCOE_KCQE_LINKED_WITH_NEXT (0x1<<7) -#define FCOE_KCQE_LINKED_WITH_NEXT_SHIFT 7 + u16 rsrv0; + u8 op_attr; +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE (0x7F<<0) +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_REASON_CODE_SHIFT 0 +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7) +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 7 + u8 opcode; #endif + u32 data_fields; +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) +#define ISCSI_LOGOUT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 + u32 rsrv2[2]; + u32 itt; +#if defined(__BIG_ENDIAN) + u16 cid; + u16 rsrv1; +#elif defined(__LITTLE_ENDIAN) + u16 rsrv1; + u16 cid; +#endif + u32 cmd_sn; + u32 exp_stat_sn; + u32 rsrv3[4]; }; /* - * FCoE KWQE header + * PDU header of an iSCSI TMF request */ -struct fcoe_kwqe_header { +struct iscsi_tmf_req_hdr_little_endian { #if defined(__BIG_ENDIAN) - u8 flags; -#define FCOE_KWQE_HEADER_RESERVED0 (0xF<<0) -#define FCOE_KWQE_HEADER_RESERVED0_SHIFT 0 -#define FCOE_KWQE_HEADER_LAYER_CODE (0x7<<4) -#define FCOE_KWQE_HEADER_LAYER_CODE_SHIFT 4 -#define FCOE_KWQE_HEADER_RESERVED1 (0x1<<7) -#define FCOE_KWQE_HEADER_RESERVED1_SHIFT 7 - u8 op_code; + u8 opcode; + u8 op_attr; +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION (0x7F<<0) +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION_SHIFT 0 +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7) +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 7 + u16 rsrv0; #elif defined(__LITTLE_ENDIAN) - u8 op_code; - u8 flags; -#define FCOE_KWQE_HEADER_RESERVED0 (0xF<<0) -#define FCOE_KWQE_HEADER_RESERVED0_SHIFT 0 -#define FCOE_KWQE_HEADER_LAYER_CODE (0x7<<4) -#define FCOE_KWQE_HEADER_LAYER_CODE_SHIFT 4 -#define FCOE_KWQE_HEADER_RESERVED1 (0x1<<7) -#define FCOE_KWQE_HEADER_RESERVED1_SHIFT 7 + u16 rsrv0; + u8 op_attr; +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION (0x7F<<0) +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_FUNCTION_SHIFT 0 +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1 (0x1<<7) +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_RSRV1_1_SHIFT 7 + u8 opcode; #endif + u32 data_fields; +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) +#define ISCSI_TMF_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 + struct regpair lun; + u32 itt; + u32 referenced_task_tag; + u32 cmd_sn; + u32 exp_stat_sn; + u32 ref_cmd_sn; + u32 exp_data_sn; + u32 rsrv2[2]; }; /* - * FCoE firmware init request 1 + * PDU header of an iSCSI Text request */ -struct fcoe_kwqe_init1 { +struct iscsi_text_req_hdr_little_endian { #if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 num_tasks; + u8 opcode; + u8 op_attr; +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1 (0x3F<<0) +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6) +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 6 +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL (0x1<<7) +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL_SHIFT 7 + u16 rsrv0; #elif defined(__LITTLE_ENDIAN) - u16 num_tasks; - struct fcoe_kwqe_header hdr; -#endif - u32 task_list_pbl_addr_lo; - u32 task_list_pbl_addr_hi; - u32 dummy_buffer_addr_lo; - u32 dummy_buffer_addr_hi; -#if defined(__BIG_ENDIAN) - u16 rq_num_wqes; - u16 sq_num_wqes; -#elif defined(__LITTLE_ENDIAN) - u16 sq_num_wqes; - u16 rq_num_wqes; -#endif -#if defined(__BIG_ENDIAN) - u16 cq_num_wqes; - u16 rq_buffer_log_size; -#elif defined(__LITTLE_ENDIAN) - u16 rq_buffer_log_size; - u16 cq_num_wqes; -#endif -#if defined(__BIG_ENDIAN) - u8 flags; -#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE (0xF<<0) -#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE_SHIFT 0 -#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC (0x7<<4) -#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC_SHIFT 4 -#define FCOE_KWQE_INIT1_RESERVED1 (0x1<<7) -#define FCOE_KWQE_INIT1_RESERVED1_SHIFT 7 - u8 num_sessions_log; - u16 mtu; -#elif defined(__LITTLE_ENDIAN) - u16 mtu; - u8 num_sessions_log; - u8 flags; -#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE (0xF<<0) -#define FCOE_KWQE_INIT1_LOG_PAGE_SIZE_SHIFT 0 -#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC (0x7<<4) -#define FCOE_KWQE_INIT1_LOG_CACHED_PBES_PER_FUNC_SHIFT 4 -#define FCOE_KWQE_INIT1_RESERVED1 (0x1<<7) -#define FCOE_KWQE_INIT1_RESERVED1_SHIFT 7 + u16 rsrv0; + u8 op_attr; +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1 (0x3F<<0) +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG (0x1<<6) +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_CONTINUE_FLG_SHIFT 6 +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL (0x1<<7) +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_FINAL_SHIFT 7 + u8 opcode; #endif + u32 data_fields; +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) +#define ISCSI_TEXT_REQ_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 + struct regpair lun; + u32 itt; + u32 ttt; + u32 cmd_sn; + u32 exp_stat_sn; + u32 rsrv3[4]; }; /* - * FCoE firmware init request 2 + * PDU header of an iSCSI Nop-Out */ -struct fcoe_kwqe_init2 { +struct iscsi_nop_out_hdr_little_endian { #if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 reserved0; + u8 opcode; + u8 op_attr; +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0) +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1 (0x1<<7) +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1_SHIFT 7 + u16 rsrv0; #elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct fcoe_kwqe_header hdr; + u16 rsrv0; + u8 op_attr; +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1 (0x7F<<0) +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV1_SHIFT 0 +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1 (0x1<<7) +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_RSRV2_1_SHIFT 7 + u8 opcode; #endif - u32 hash_tbl_pbl_addr_lo; - u32 hash_tbl_pbl_addr_hi; - u32 t2_hash_tbl_addr_lo; - u32 t2_hash_tbl_addr_hi; - u32 t2_ptr_hash_tbl_addr_lo; - u32 t2_ptr_hash_tbl_addr_hi; - u32 free_list_count; + u32 data_fields; +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH (0xFFFFFF<<0) +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_DATA_SEGMENT_LENGTH_SHIFT 0 +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH (0xFF<<24) +#define ISCSI_NOP_OUT_HDR_LITTLE_ENDIAN_TOTAL_AHS_LENGTH_SHIFT 24 + struct regpair lun; + u32 itt; + u32 ttt; + u32 cmd_sn; + u32 exp_stat_sn; + u32 rsrv3[4]; }; /* - * FCoE firmware init request 3 + * iscsi pdu headers in little endian form. */ -struct fcoe_kwqe_init3 { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct fcoe_kwqe_header hdr; -#endif - u32 error_bit_map_lo; - u32 error_bit_map_hi; -#if defined(__BIG_ENDIAN) - u8 reserved21[3]; - u8 cached_session_enable; -#elif defined(__LITTLE_ENDIAN) - u8 cached_session_enable; - u8 reserved21[3]; -#endif - u32 reserved2[4]; +union iscsi_pdu_headers_little_endian { + u32 fullHeaderSize[12]; + struct iscsi_cmd_pdu_hdr_little_endian command_pdu_hdr; + struct iscsi_data_pdu_hdr_little_endian data_out_pdu_hdr; + struct iscsi_login_req_hdr_little_endian login_req_pdu_hdr; + struct iscsi_logout_req_hdr_little_endian logout_req_pdu_hdr; + struct iscsi_tmf_req_hdr_little_endian tmf_req_pdu_hdr; + struct iscsi_text_req_hdr_little_endian text_req_pdu_hdr; + struct iscsi_nop_out_hdr_little_endian nop_out_pdu_hdr; }; -/* - * FCoE connection offload request 1 - */ -struct fcoe_kwqe_conn_offload1 { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 fcoe_conn_id; -#elif defined(__LITTLE_ENDIAN) - u16 fcoe_conn_id; - struct fcoe_kwqe_header hdr; -#endif - u32 sq_addr_lo; - u32 sq_addr_hi; - u32 rq_pbl_addr_lo; - u32 rq_pbl_addr_hi; - u32 rq_first_pbe_addr_lo; - u32 rq_first_pbe_addr_hi; -#if defined(__BIG_ENDIAN) - u16 reserved0; - u16 rq_prod; -#elif defined(__LITTLE_ENDIAN) - u16 rq_prod; - u16 reserved0; -#endif -}; - -/* - * FCoE connection offload request 2 - */ -struct fcoe_kwqe_conn_offload2 { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 tx_max_fc_pay_len; -#elif defined(__LITTLE_ENDIAN) - u16 tx_max_fc_pay_len; - struct fcoe_kwqe_header hdr; -#endif - u32 cq_addr_lo; - u32 cq_addr_hi; - u32 xferq_addr_lo; - u32 xferq_addr_hi; - u32 conn_db_addr_lo; - u32 conn_db_addr_hi; - u32 reserved1; -}; - -/* - * FCoE connection offload request 3 - */ -struct fcoe_kwqe_conn_offload3 { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 vlan_tag; -#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID (0xFFF<<0) -#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID_SHIFT 0 -#define FCOE_KWQE_CONN_OFFLOAD3_CFI (0x1<<12) -#define FCOE_KWQE_CONN_OFFLOAD3_CFI_SHIFT 12 -#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY (0x7<<13) -#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY_SHIFT 13 -#elif defined(__LITTLE_ENDIAN) - u16 vlan_tag; -#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID (0xFFF<<0) -#define FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID_SHIFT 0 -#define FCOE_KWQE_CONN_OFFLOAD3_CFI (0x1<<12) -#define FCOE_KWQE_CONN_OFFLOAD3_CFI_SHIFT 12 -#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY (0x7<<13) -#define FCOE_KWQE_CONN_OFFLOAD3_PRIORITY_SHIFT 13 - struct fcoe_kwqe_header hdr; -#endif -#if defined(__BIG_ENDIAN) - u8 tx_max_conc_seqs_c3; - u8 s_id[3]; -#elif defined(__LITTLE_ENDIAN) - u8 s_id[3]; - u8 tx_max_conc_seqs_c3; -#endif -#if defined(__BIG_ENDIAN) - u8 flags; -#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS (0x1<<0) -#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS_SHIFT 0 -#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES (0x1<<1) -#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES_SHIFT 1 -#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT (0x1<<2) -#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT_SHIFT 2 -#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ (0x1<<3) -#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ_SHIFT 3 -#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID (0x1<<4) -#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID_SHIFT 4 -#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID (0x1<<5) -#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID_SHIFT 5 -#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0 (0x1<<6) -#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0_SHIFT 6 -#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG (0x1<<7) -#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG_SHIFT 7 - u8 d_id[3]; -#elif defined(__LITTLE_ENDIAN) - u8 d_id[3]; - u8 flags; -#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS (0x1<<0) -#define FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS_SHIFT 0 -#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES (0x1<<1) -#define FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES_SHIFT 1 -#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT (0x1<<2) -#define FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT_SHIFT 2 -#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ (0x1<<3) -#define FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ_SHIFT 3 -#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID (0x1<<4) -#define FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID_SHIFT 4 -#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID (0x1<<5) -#define FCOE_KWQE_CONN_OFFLOAD3_B_C2_VALID_SHIFT 5 -#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0 (0x1<<6) -#define FCOE_KWQE_CONN_OFFLOAD3_B_ACK_0_SHIFT 6 -#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG (0x1<<7) -#define FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG_SHIFT 7 -#endif - u32 reserved; - u32 confq_first_pbe_addr_lo; - u32 confq_first_pbe_addr_hi; -#if defined(__BIG_ENDIAN) - u16 rx_max_fc_pay_len; - u16 tx_total_conc_seqs; -#elif defined(__LITTLE_ENDIAN) - u16 tx_total_conc_seqs; - u16 rx_max_fc_pay_len; -#endif -#if defined(__BIG_ENDIAN) - u8 rx_open_seqs_exch_c3; - u8 rx_max_conc_seqs_c3; - u16 rx_total_conc_seqs; -#elif defined(__LITTLE_ENDIAN) - u16 rx_total_conc_seqs; - u8 rx_max_conc_seqs_c3; - u8 rx_open_seqs_exch_c3; -#endif -}; - -/* - * FCoE connection offload request 4 - */ -struct fcoe_kwqe_conn_offload4 { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u8 reserved2; - u8 e_d_tov_timer_val; -#elif defined(__LITTLE_ENDIAN) - u8 e_d_tov_timer_val; - u8 reserved2; - struct fcoe_kwqe_header hdr; -#endif - u8 src_mac_addr_lo32[4]; -#if defined(__BIG_ENDIAN) - u8 dst_mac_addr_hi16[2]; - u8 src_mac_addr_hi16[2]; -#elif defined(__LITTLE_ENDIAN) - u8 src_mac_addr_hi16[2]; - u8 dst_mac_addr_hi16[2]; -#endif - u8 dst_mac_addr_lo32[4]; - u32 lcq_addr_lo; - u32 lcq_addr_hi; - u32 confq_pbl_base_addr_lo; - u32 confq_pbl_base_addr_hi; -}; - -/* - * FCoE connection enable request - */ -struct fcoe_kwqe_conn_enable_disable { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct fcoe_kwqe_header hdr; -#endif - u8 src_mac_addr_lo32[4]; -#if defined(__BIG_ENDIAN) - u16 vlan_tag; -#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID (0xFFF<<0) -#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID_SHIFT 0 -#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI (0x1<<12) -#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI_SHIFT 12 -#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY (0x7<<13) -#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY_SHIFT 13 - u8 src_mac_addr_hi16[2]; -#elif defined(__LITTLE_ENDIAN) - u8 src_mac_addr_hi16[2]; - u16 vlan_tag; -#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID (0xFFF<<0) -#define FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID_SHIFT 0 -#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI (0x1<<12) -#define FCOE_KWQE_CONN_ENABLE_DISABLE_CFI_SHIFT 12 -#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY (0x7<<13) -#define FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY_SHIFT 13 -#endif - u8 dst_mac_addr_lo32[4]; +struct iscsi_hq_bd { + union iscsi_pdu_headers_little_endian pdu_header; #if defined(__BIG_ENDIAN) u16 reserved1; - u8 dst_mac_addr_hi16[2]; + u16 lcl_cmp_flg; #elif defined(__LITTLE_ENDIAN) - u8 dst_mac_addr_hi16[2]; + u16 lcl_cmp_flg; u16 reserved1; #endif + u32 sgl_base_lo; + u32 sgl_base_hi; #if defined(__BIG_ENDIAN) - u8 vlan_flag; - u8 s_id[3]; + u8 sgl_size; + u8 sge_index; + u16 sge_offset; #elif defined(__LITTLE_ENDIAN) - u8 s_id[3]; - u8 vlan_flag; -#endif -#if defined(__BIG_ENDIAN) - u8 reserved3; - u8 d_id[3]; -#elif defined(__LITTLE_ENDIAN) - u8 d_id[3]; - u8 reserved3; -#endif - u32 context_id; - u32 conn_id; - u32 reserved4; -}; - -/* - * FCoE connection destroy request - */ -struct fcoe_kwqe_conn_destroy { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct fcoe_kwqe_header hdr; -#endif - u32 context_id; - u32 conn_id; - u32 reserved1[5]; -}; - -/* - * FCoe destroy request - */ -struct fcoe_kwqe_destroy { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct fcoe_kwqe_header hdr; -#endif - u32 reserved1[7]; -}; - -/* - * FCoe statistics request - */ -struct fcoe_kwqe_stat { -#if defined(__BIG_ENDIAN) - struct fcoe_kwqe_header hdr; - u16 reserved0; -#elif defined(__LITTLE_ENDIAN) - u16 reserved0; - struct fcoe_kwqe_header hdr; -#endif - u32 stat_params_addr_lo; - u32 stat_params_addr_hi; - u32 reserved1[5]; -}; - -/* - * FCoE KWQ WQE - */ -union fcoe_kwqe { - struct fcoe_kwqe_init1 init1; - struct fcoe_kwqe_init2 init2; - struct fcoe_kwqe_init3 init3; - struct fcoe_kwqe_conn_offload1 conn_offload1; - struct fcoe_kwqe_conn_offload2 conn_offload2; - struct fcoe_kwqe_conn_offload3 conn_offload3; - struct fcoe_kwqe_conn_offload4 conn_offload4; - struct fcoe_kwqe_conn_enable_disable conn_enable_disable; - struct fcoe_kwqe_conn_destroy conn_destroy; - struct fcoe_kwqe_destroy destroy; - struct fcoe_kwqe_stat statistics; -}; - -struct fcoe_task_ctx_entry { - struct fcoe_task_ctx_entry_tx_only tx_wr_only; - struct fcoe_task_ctx_entry_txwr_rxrd tx_wr_rx_rd; - struct fcoe_task_ctx_entry_tx_rx_cmn cmn; - struct fcoe_task_ctx_entry_rxwr_txrd rx_wr_tx_rd; - struct fcoe_task_ctx_entry_rx_only rx_wr_only; - u32 reserved[4]; -}; - -/* - * FCoE connection enable\disable params passed by driver to FW in FCoE enable ramrod - */ -struct fcoe_conn_enable_disable_ramrod_params { - struct fcoe_kwqe_conn_enable_disable enable_disable_kwqe; -}; - - -/* - * FCoE connection offload params passed by driver to FW in FCoE offload ramrod - */ -struct fcoe_conn_offload_ramrod_params { - struct fcoe_kwqe_conn_offload1 offload_kwqe1; - struct fcoe_kwqe_conn_offload2 offload_kwqe2; - struct fcoe_kwqe_conn_offload3 offload_kwqe3; - struct fcoe_kwqe_conn_offload4 offload_kwqe4; -}; - -/* - * FCoE init params passed by driver to FW in FCoE init ramrod - */ -struct fcoe_init_ramrod_params { - struct fcoe_kwqe_init1 init_kwqe1; - struct fcoe_kwqe_init2 init_kwqe2; - struct fcoe_kwqe_init3 init_kwqe3; - struct regpair eq_addr; - struct regpair eq_next_page_addr; -#if defined(__BIG_ENDIAN) - u16 sb_num; - u16 eq_prod; -#elif defined(__LITTLE_ENDIAN) - u16 eq_prod; - u16 sb_num; -#endif -#if defined(__BIG_ENDIAN) - u16 reserved1; - u8 reserved0; - u8 sb_id; -#elif defined(__LITTLE_ENDIAN) - u8 sb_id; - u8 reserved0; - u16 reserved1; + u16 sge_offset; + u8 sge_index; + u8 sgl_size; #endif }; /* - * FCoE statistics params buffer passed by driver to FW in FCoE statistics ramrod + * CQE data for L2 OOO connection $$KEEP_ENDIANNESS$$ */ -struct fcoe_stat_ramrod_params { - struct fcoe_kwqe_stat stat_kwqe; +struct iscsi_l2_ooo_data { + __le32 iscsi_cid; + u8 drop_isle; + u8 drop_size; + u8 ooo_opcode; + u8 ooo_isle; + u8 reserved[8]; }; -/* - * FCoE 16-bits vlan structure - */ -struct fcoe_vlan_fields { - u16 fields; -#define FCOE_VLAN_FIELDS_VID (0xFFF<<0) -#define FCOE_VLAN_FIELDS_VID_SHIFT 0 -#define FCOE_VLAN_FIELDS_CLI (0x1<<12) -#define FCOE_VLAN_FIELDS_CLI_SHIFT 12 -#define FCOE_VLAN_FIELDS_PRI (0x7<<13) -#define FCOE_VLAN_FIELDS_PRI_SHIFT 13 + + + + +struct iscsi_task_context_entry_xuc_c_write_only { + u32 total_data_acked; }; - -/* - * FCoE 16-bits vlan union - */ -union fcoe_vlan_field_union { - struct fcoe_vlan_fields fields; - u16 val; +struct iscsi_task_context_r2t_table_entry { + u32 ttt; + u32 desired_data_len; }; -/* - * Parameters used for Class 2 verifications - */ -struct ustorm_fcoe_c2_params { +struct iscsi_task_context_entry_xuc_u_write_only { + u32 exp_r2t_sn; + struct iscsi_task_context_r2t_table_entry r2t_table[4]; #if defined(__BIG_ENDIAN) - u16 e2e_credit; - u16 con_seq; + u16 data_in_count; + u8 cq_id; + u8 valid_1b; #elif defined(__LITTLE_ENDIAN) - u16 con_seq; - u16 e2e_credit; + u8 valid_1b; + u8 cq_id; + u16 data_in_count; #endif -#if defined(__BIG_ENDIAN) - u16 ackq_prod; - u16 open_seq_per_exch; -#elif defined(__LITTLE_ENDIAN) - u16 open_seq_per_exch; - u16 ackq_prod; -#endif - struct regpair ackq_pbl_base; - struct regpair ackq_cur_seg; }; -/* - * Parameters used for Class 2 verifications - */ -struct xstorm_fcoe_c2_params { -#if defined(__BIG_ENDIAN) - u16 reserved0; - u8 ackq_x_prod; - u8 max_conc_seqs_c2; -#elif defined(__LITTLE_ENDIAN) - u8 max_conc_seqs_c2; - u8 ackq_x_prod; - u16 reserved0; -#endif - struct regpair ackq_pbl_base; - struct regpair ackq_cur_seg; +struct iscsi_task_context_entry_xuc { + struct iscsi_task_context_entry_xuc_c_write_only write_c; + u32 exp_data_transfer_len; + struct iscsi_task_context_entry_xuc_x_write_only write_x; + u32 lun_lo; + struct iscsi_task_context_entry_xuc_xu_write_both write_xu; + u32 lun_hi; + struct iscsi_task_context_entry_xuc_u_write_only write_u; }; -/* - * Buffer per connection, used in Tstorm - */ -struct iscsi_conn_buf { - struct regpair reserved[8]; +struct iscsi_task_context_entry_u { + u32 exp_r2t_buff_offset; + u32 rem_rcv_len; + u32 exp_data_sn; }; +struct iscsi_task_context_entry { + struct iscsi_task_context_entry_x tce_x; +#if defined(__BIG_ENDIAN) + u16 data_out_count; + u16 rsrv0; +#elif defined(__LITTLE_ENDIAN) + u16 rsrv0; + u16 data_out_count; +#endif + struct iscsi_task_context_entry_xuc tce_xuc; + struct iscsi_task_context_entry_u tce_u; + u32 rsrv1[7]; +}; + + + + + + + + +struct iscsi_task_context_entry_xuc_x_init_only { + struct regpair lun; + u32 exp_data_transfer_len; +}; + + + + + + + + + + + + + + + + + /* * ipv6 structure */ @@ -4375,6 +5060,8 @@ struct ip_v6_addr { u32 ip_addr_hi_hi; }; + + /* * l5cm- connection identification params */ @@ -4456,8 +5143,7 @@ struct l5cm_xstorm_conn_buffer { * l5cm-tstorm connection buffer */ struct l5cm_tstorm_conn_buffer { - u32 snd_buf; - u32 rcv_buf; + u32 rsrv1[2]; #if defined(__BIG_ENDIAN) u16 params; #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE (0x1<<0) @@ -4489,6 +5175,72 @@ struct l5cm_active_conn_buffer { struct l5cm_tstorm_conn_buffer tstorm_conn_buffer; }; + + +/* + * The l5cm opaque buffer passed in add new connection ramrod passive side + */ +struct l5cm_hash_input_string { + u32 __opaque1; +#if defined(__BIG_ENDIAN) + u16 __opaque3; + u16 __opaque2; +#elif defined(__LITTLE_ENDIAN) + u16 __opaque2; + u16 __opaque3; +#endif + struct ip_v6_addr __opaque4; + struct ip_v6_addr __opaque5; + u32 __opaque6; + u32 __opaque7[5]; +}; + + +/* + * syn cookie component + */ +struct l5cm_syn_cookie_comp { + u32 __opaque; +}; + +/* + * data related to listeners of a TCP port + */ +struct l5cm_port_listener_data { + u8 params; +#define L5CM_PORT_LISTENER_DATA_ENABLE (0x1<<0) +#define L5CM_PORT_LISTENER_DATA_ENABLE_SHIFT 0 +#define L5CM_PORT_LISTENER_DATA_IP_INDEX (0xF<<1) +#define L5CM_PORT_LISTENER_DATA_IP_INDEX_SHIFT 1 +#define L5CM_PORT_LISTENER_DATA_NET_FILTER (0x1<<5) +#define L5CM_PORT_LISTENER_DATA_NET_FILTER_SHIFT 5 +#define L5CM_PORT_LISTENER_DATA_DEFFERED_MODE (0x1<<6) +#define L5CM_PORT_LISTENER_DATA_DEFFERED_MODE_SHIFT 6 +#define L5CM_PORT_LISTENER_DATA_MPA_MODE (0x1<<7) +#define L5CM_PORT_LISTENER_DATA_MPA_MODE_SHIFT 7 +}; + +/* + * Opaque structure passed from U to X when final ack arrives + */ +struct l5cm_opaque_buf { + u32 __opaque1; + u32 __opaque2; + u32 __opaque3; + u32 __opaque4; + struct l5cm_syn_cookie_comp __opaque5; +#if defined(__BIG_ENDIAN) + u16 rsrv2; + u8 rsrv; + struct l5cm_port_listener_data __opaque6; +#elif defined(__LITTLE_ENDIAN) + struct l5cm_port_listener_data __opaque6; + u8 rsrv; + u16 rsrv2; +#endif +}; + + /* * l5cm slow path element */ @@ -4497,6 +5249,109 @@ struct l5cm_packet_size { u32 rsrv; }; + +/* + * The final-ack union structure in PCS entry after final ack arrived + */ +struct l5cm_pcse_ack { + struct l5cm_xstorm_conn_buffer tx_socket_params; + struct l5cm_opaque_buf opaque_buf; + struct l5cm_tstorm_conn_buffer rx_socket_params; +}; + + +/* + * The syn union structure in PCS entry after syn arrived + */ +struct l5cm_pcse_syn { + struct l5cm_opaque_buf opaque_buf; + u32 rsrv[12]; +}; + + +/* + * pcs entry data for passive connections + */ +struct l5cm_pcs_attributes { +#if defined(__BIG_ENDIAN) + u16 pcs_id; + u8 status; + u8 flags; +#define L5CM_PCS_ATTRIBUTES_NET_FILTER (0x1<<0) +#define L5CM_PCS_ATTRIBUTES_NET_FILTER_SHIFT 0 +#define L5CM_PCS_ATTRIBUTES_CALCULATE_HASH (0x1<<1) +#define L5CM_PCS_ATTRIBUTES_CALCULATE_HASH_SHIFT 1 +#define L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT (0x1<<2) +#define L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT_SHIFT 2 +#define L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT (0x1<<3) +#define L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT_SHIFT 3 +#define L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC (0x1<<4) +#define L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC_SHIFT 4 +#define L5CM_PCS_ATTRIBUTES_L4_OFFLOAD (0x1<<5) +#define L5CM_PCS_ATTRIBUTES_L4_OFFLOAD_SHIFT 5 +#define L5CM_PCS_ATTRIBUTES_FORWARD_PACKET (0x1<<6) +#define L5CM_PCS_ATTRIBUTES_FORWARD_PACKET_SHIFT 6 +#define L5CM_PCS_ATTRIBUTES_RSRV (0x1<<7) +#define L5CM_PCS_ATTRIBUTES_RSRV_SHIFT 7 +#elif defined(__LITTLE_ENDIAN) + u8 flags; +#define L5CM_PCS_ATTRIBUTES_NET_FILTER (0x1<<0) +#define L5CM_PCS_ATTRIBUTES_NET_FILTER_SHIFT 0 +#define L5CM_PCS_ATTRIBUTES_CALCULATE_HASH (0x1<<1) +#define L5CM_PCS_ATTRIBUTES_CALCULATE_HASH_SHIFT 1 +#define L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT (0x1<<2) +#define L5CM_PCS_ATTRIBUTES_COMPARE_HASH_RESULT_SHIFT 2 +#define L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT (0x1<<3) +#define L5CM_PCS_ATTRIBUTES_QUERY_ULP_ACCEPT_SHIFT 3 +#define L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC (0x1<<4) +#define L5CM_PCS_ATTRIBUTES_FIND_DEST_MAC_SHIFT 4 +#define L5CM_PCS_ATTRIBUTES_L4_OFFLOAD (0x1<<5) +#define L5CM_PCS_ATTRIBUTES_L4_OFFLOAD_SHIFT 5 +#define L5CM_PCS_ATTRIBUTES_FORWARD_PACKET (0x1<<6) +#define L5CM_PCS_ATTRIBUTES_FORWARD_PACKET_SHIFT 6 +#define L5CM_PCS_ATTRIBUTES_RSRV (0x1<<7) +#define L5CM_PCS_ATTRIBUTES_RSRV_SHIFT 7 + u8 status; + u16 pcs_id; +#endif +}; + + +union l5cm_seg_params { + struct l5cm_pcse_syn syn_seg_params; + struct l5cm_pcse_ack ack_seg_params; +}; + +/* + * pcs entry data for passive connections + */ +struct l5cm_pcs_hdr { + struct l5cm_hash_input_string hash_input_string; + struct l5cm_conn_addr_params conn_addr_buf; + u32 cid; + u32 hash_result; + union l5cm_seg_params seg_params; + struct l5cm_pcs_attributes att; +#if defined(__BIG_ENDIAN) + u16 rsrv; + u16 rx_seg_size; +#elif defined(__LITTLE_ENDIAN) + u16 rx_seg_size; + u16 rsrv; +#endif +}; + +/* + * pcs entry for passive connections + */ +struct l5cm_pcs_entry { + struct l5cm_pcs_hdr hdr; + u8 rx_segment[1516]; +}; + + + + /* * l5cm connection parameters */ @@ -4531,6 +5386,29 @@ struct l5cm_spe { union l5cm_specific_data data; }; + + + +/* + * Termination variables + */ +struct l5cm_term_vars { + u8 BitMap; +#define L5CM_TERM_VARS_TCP_STATE (0xF<<0) +#define L5CM_TERM_VARS_TCP_STATE_SHIFT 0 +#define L5CM_TERM_VARS_FIN_RECEIVED_SBIT (0x1<<4) +#define L5CM_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT 4 +#define L5CM_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT (0x1<<5) +#define L5CM_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT 5 +#define L5CM_TERM_VARS_TERM_ON_CHIP (0x1<<6) +#define L5CM_TERM_VARS_TERM_ON_CHIP_SHIFT 6 +#define L5CM_TERM_VARS_RSRV (0x1<<7) +#define L5CM_TERM_VARS_RSRV_SHIFT 7 +}; + + + + /* * Tstorm Tcp flags */ @@ -4546,6 +5424,7 @@ struct tstorm_l5cm_tcp_flags { #define TSTORM_L5CM_TCP_FLAGS_RSRV1_SHIFT 14 }; + /* * Xstorm Tcp flags */ @@ -4561,4 +5440,38 @@ struct xstorm_l5cm_tcp_flags { #define XSTORM_L5CM_TCP_FLAGS_RSRV_SHIFT 3 }; -#endif /* CNIC_DEFS_H */ + + +/* + * Out-of-order states + */ +enum tcp_ooo_event { + TCP_EVENT_ADD_PEN=0, + TCP_EVENT_ADD_NEW_ISLE=1, + TCP_EVENT_ADD_ISLE_RIGHT=2, + TCP_EVENT_ADD_ISLE_LEFT=3, + TCP_EVENT_JOIN=4, + TCP_EVENT_NOP=5, + MAX_TCP_OOO_EVENT +}; + + +/* + * OOO support modes + */ +enum tcp_tstorm_ooo { + TCP_TSTORM_OOO_DROP_AND_PROC_ACK=0, + TCP_TSTORM_OOO_SEND_PURE_ACK=1, + TCP_TSTORM_OOO_SUPPORTED=2, + MAX_TCP_TSTORM_OOO +}; + + + + + + + + + +#endif /* __5710_HSI_CNIC_LE__ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2/cnic_if.h b/vmkdrivers/src_9/drivers/net/bnx2/cnic_if.h index 736557e..12ec5e6 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/cnic_if.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/cnic_if.h @@ -1,6 +1,6 @@ /* cnic_if.h: Broadcom CNIC core network driver. * - * Copyright (c) 2006 - 2010 Broadcom Corporation + * Copyright (c) 2006 - 2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -12,22 +12,35 @@ #ifndef CNIC_IF_H #define CNIC_IF_H -#define CNIC_MODULE_VERSION "1.10.2j.v50.7-3vmw" -#define CNIC_MODULE_RELDATE "Dec 14, 2011" +#include "bnx2x_mfw_req.h" #define CNIC_ULP_RDMA 0 #define CNIC_ULP_ISCSI 1 -#define CNIC_ULP_L4 2 -#define MAX_CNIC_ULP_TYPE_EXT 2 -#define MAX_CNIC_ULP_TYPE 3 +#define CNIC_ULP_FCOE 2 +#define CNIC_ULP_L4 3 +#define MAX_CNIC_ULP_TYPE_EXT 3 +#define MAX_CNIC_ULP_TYPE 4 + +#ifndef VLAN_TAG_PRESENT +#define VLAN_TAG_PRESENT 0x1000 +#endif struct kwqe { u32 kwqe_op_flag; +#define KWQE_QID_SHIFT 8 #define KWQE_OPCODE_MASK 0x00ff0000 #define KWQE_OPCODE_SHIFT 16 #define KWQE_FLAGS_LAYER_SHIFT 28 #define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT) +#define KWQE_LAYER_MASK 0x70000000 +#define KWQE_LAYER_SHIFT 28 +#define KWQE_FLAGS_LAYER_MASK_L2 (2<<28) +#define KWQE_FLAGS_LAYER_MASK_L3 (3<<28) +#define KWQE_FLAGS_LAYER_MASK_L4 (4<<28) +#define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28) +#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28) +#define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28) u32 kwqe_info0; u32 kwqe_info1; @@ -62,6 +75,7 @@ struct kcqe { #define KCQE_FLAGS_LAYER_MASK_L4 (4<<28) #define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28) #define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28) + #define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28) #define KCQE_FLAGS_NEXT (1<<31) #define KCQE_FLAGS_OPCODE_MASK (0xff<<16) #define KCQE_FLAGS_OPCODE_SHIFT (16) @@ -72,9 +86,12 @@ struct kcqe { #define MAX_CNIC_CTL_DATA 64 #define MAX_DRV_CTL_DATA 64 -#define CNIC_CTL_STOP_CMD 1 -#define CNIC_CTL_START_CMD 2 -#define CNIC_CTL_COMPLETION_CMD 3 +#define CNIC_CTL_STOP_CMD 1 +#define CNIC_CTL_START_CMD 2 +#define CNIC_CTL_COMPLETION_CMD 3 +#define CNIC_CTL_STOP_ISCSI_CMD 4 +#define CNIC_CTL_FCOE_STATS_GET_CMD 5 +#define CNIC_CTL_ISCSI_STATS_GET_CMD 6 #define DRV_CTL_IO_WR_CMD 0x101 #define DRV_CTL_IO_RD_CMD 0x102 @@ -88,7 +105,13 @@ struct kcqe { #define DRV_CTL_COMP_OOO_TX_PKTS 0x10a #define DRV_CTL_REUSE_OOO_PKT 0x10b #define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c - +#define DRV_CTL_ISCSI_STOPPED_CMD 0x10d +#define DRV_CTL_ULP_REGISTER_CMD 0x10e +#define DRV_CTL_ULP_UNREGISTER_CMD 0x10f +#if defined(__VMKLNX__) +#define DRV_CTL_START_NPAR_CMD 0x110 +#define DRV_CTL_STOP_NPAR_CMD 0x111 +#endif struct cnic_ctl_completion { u32 cid; @@ -126,11 +149,12 @@ enum { }; enum { - OOO_OPCODE_ADD_RIGHT, - OOO_OPCODE_ADD_LEFT, - OOO_OPCODE_JOIN, + OOO_OPCODE_ADD_PEN, OOO_OPCODE_ADD_NEW, - OOO_OPCODE_ADD_PENN + OOO_OPCODE_ADD_RIGHT, + OOO_OPCODE_ADD_LEFT, + OOO_OPCODE_JOIN, + OOO_OPCODE_NOP }; struct cnic_ooo_cqe { @@ -163,15 +187,22 @@ struct drv_ctl_ooo_pkt { struct sk_buff *skb; }; +struct drv_ctl_register_data { + int ulp_type; + struct fcoe_capabilities fcoe_features; +}; + struct drv_ctl_info { int cmd; union { struct drv_ctl_spq_credit credit; struct drv_ctl_io io; struct drv_ctl_l2_ring ring; + int ulp_type; + char bytes[MAX_DRV_CTL_DATA]; struct drv_ctl_ooo_cqe ooo_cqe; struct drv_ctl_ooo_pkt pkt_desc; - char bytes[MAX_DRV_CTL_DATA]; + struct drv_ctl_register_data register_data; } data; }; @@ -198,13 +229,15 @@ struct cnic_irq { struct cnic_eth_dev { u32 version; - #define CNIC_ETH_DEV_VER 0x12340001 /* Change this when the structure changes */ + #define CNIC_ETH_DEV_VER 0x07200101 /* Change this when the structure changes */ struct module *drv_owner; u32 drv_state; #define CNIC_DRV_STATE_REGD 0x00000001 #define CNIC_DRV_STATE_USING_MSIX 0x00000002 #define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004 +#define CNIC_DRV_STATE_NO_ISCSI 0x00000008 +#define CNIC_DRV_STATE_NO_FCOE 0x00000010 u32 chip_id; u32 max_kwqe_pending; struct pci_dev *pdev; @@ -214,7 +247,6 @@ struct cnic_eth_dev { void __iomem *io_base2; #endif #endif - u32 ctx_tbl_offset; u32 ctx_tbl_len; int ctx_blk_size; @@ -222,9 +254,16 @@ struct cnic_eth_dev { u32 max_iscsi_conn; u32 max_fcoe_conn; u32 max_rdma_conn; + u32 fcoe_init_cid; + u32 fcoe_wwn_port_name_hi; + u32 fcoe_wwn_port_name_lo; + u32 fcoe_wwn_node_name_hi; + u32 fcoe_wwn_node_name_lo; + u16 iscsi_l2_client_id; u16 iscsi_l2_cid; + u8 iscsi_mac[ETH_ALEN]; int num_irq; struct cnic_irq irq_arr[MAX_CNIC_VEC]; @@ -237,6 +276,14 @@ struct cnic_eth_dev { struct kwqe_16 *[], u32); int (*drv_ctl)(struct net_device *, struct drv_ctl_info *); unsigned long reserved1[2]; + +#if defined(__VMKLNX__) + u32 mf_mode; +#if (VMWARE_ESX_DDK_VERSION >= 50000) + struct vlan_group **cna_vlgrp; +#endif +#endif + union drv_info_to_mcp *addr_drv_info_to_mcp; }; struct cnic_sockaddr { @@ -296,6 +343,7 @@ struct cnic_sock { #define SK_F_IPV6 5 #define SK_F_NDISC_WAITING 6 #define SK_F_CLOSING 7 +#define SK_F_HW_ERR 8 atomic_t ref_count; u32 state; @@ -305,10 +353,13 @@ struct cnic_sock { }; struct cnic_dev { + struct list_head list; + u32 version; +#define CNIC_DEV_VER 0x07200002 /* Change this when the structure changes */ + struct net_device *netdev; struct pci_dev *pcidev; void __iomem *regview; - struct list_head list; int (*register_device)(struct cnic_dev *dev, int ulp_type, void *ulp_ctx); @@ -336,6 +387,7 @@ struct cnic_dev { #define CNIC_F_IF_GOING_DOWN 2 #define CNIC_F_BNX2_CLASS 3 #define CNIC_F_BNX2X_CLASS 4 +#define CNIC_F_ISCSI_OOO_ENABLE 8 atomic_t ref_count; int use_count; u8 mac_addr[6]; @@ -344,7 +396,18 @@ struct cnic_dev { int max_fcoe_conn; int max_rdma_conn; + union drv_info_to_mcp *stats_addr; + struct fcoe_capabilities *fcoe_cap; + void *cnic_priv; + unsigned int ooo_tx_count; + + struct vlan_group **cna_vlgrp; + u64 fcoe_wwnn; + u64 fcoe_wwpn; +#if defined (__VMKLNX__) + u32 pmtu_fails; +#endif /* defined (__VMKLNX__) */ }; #define CNIC_WR(dev, off, val) writel(val, dev->regview + off) @@ -354,6 +417,9 @@ struct cnic_dev { #define CNIC_RD16(dev, off) readw(dev->regview + off) struct cnic_ulp_ops { + u32 version; + #define CNIC_ULP_OPS_VER 0x07000101 /* Change this when the structure changes */ + /* Calls to these functions are protected by RCU. When * unregistering, we wait for any calls to complete before * continuing. @@ -372,6 +438,7 @@ struct cnic_ulp_ops { void (*cm_abort_complete)(struct cnic_sock *); void (*cm_remote_close)(struct cnic_sock *); void (*cm_remote_abort)(struct cnic_sock *); + int (*cnic_get_stats)(void *ulp_ctx); struct module *owner; atomic_t ref_count; }; @@ -380,7 +447,15 @@ extern int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops); extern int cnic_unregister_driver(int ulp_type); +#if defined(BNX2_INBOX) extern struct cnic_eth_dev *bnx2_cnic_probe(struct net_device *dev); -extern struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev); - +#else +extern struct cnic_eth_dev *bnx2_cnic_probe2(struct net_device *dev); +#endif + +#if defined(BNX2X_INBOX) +extern struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev); +#else +extern struct cnic_eth_dev *bnx2x_cnic_probe2(struct net_device *dev); +#endif #endif diff --git a/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.c b/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.c index aa9de73..04aea10 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.c +++ b/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.c @@ -1,8 +1,8 @@ /* cnic_register.c: Broadcom CNIC Registration Agent * - * Copyright (c) 2010 Broadcom Corporation + * Copyright (c) 2010-2013 Broadcom Corporation * - * Portions Copyright (c) VMware, Inc. 2010, All Rights Reserved. + * Portions Copyright (c) VMware, Inc. 2010-2013, All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.h b/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.h index de72250..28bedc0 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.h +++ b/vmkdrivers/src_9/drivers/net/bnx2/cnic_register.h @@ -1,8 +1,8 @@ /* cnic_register.h: Broadcom CNIC Registration Agent * - * Copyright (c) 2010 Broadcom Corporation + * Copyright (c) 2010-2013 Broadcom Corporation * - * Portions Copyright (c) VMware, Inc. 2010, All Rights Reserved. + * Portions Copyright (c) VMware, Inc. 2010-2013, All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -15,9 +15,8 @@ #ifndef CNIC_REGISTER_H #define CNIC_REGISTER_H -#define CNIC_REGISTER_MODULE_VERSION "1.1" -#define CNIC_REGISTER_MODULE_RELDATE "Aug 31, 2010" - +#define CNIC_REGISTER_MODULE_VERSION "1.72.2.v55.1" +#define CNIC_REGISTER_MODULE_RELDATE "February 06, 2013" extern int cnic_register_adapter(const char * name, void *callback); extern void *cnic_register_get_callback(const char * name); extern void cnic_register_cancel(const char * name); diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x.h index f6f3c2b..5f58d16 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x.h @@ -1,6 +1,6 @@ /* bnx2x.h: Broadcom Everest network driver. * - * Copyright (c) 2007-2011 Broadcom Corporation + * Copyright (c) 2007-2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -13,64 +13,71 @@ #ifndef BNX2X_H #define BNX2X_H +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#include +#endif + +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ +#include +#endif +#ifndef BYPASS_APP /* BNX2X_UPSTREAM */ #include +#include /* compilation time flags */ /* define this to make the driver freeze on error to allow getting debug info * (you will need to reboot afterwards) */ -/* #define BNX2X_STOP_ON_ERROR */ -#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) -#define BCM_VLAN 1 -#endif - - -#if (LINUX_VERSION_CODE >= 0x020617) && \ - !defined(NETIF_F_MULTI_QUEUE) || \ - (defined(__VMKLNX__) && VMWARE_ESX_DDK_VERSION >= 40000) /* BNX2X_UPSTREAM */ -#define BNX2X_MULTI_QUEUE -#endif - -#if (LINUX_VERSION_CODE >= 0x020618) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ -#define BNX2X_NEW_NAPI -#endif - -#if !defined(BNX2X_NEW_NAPI) && defined(NAPI_GRO_CB) /* ! BNX2X_UPSTREAM */ -#define USE_NAPI_GRO -#endif - -#if defined(BNX2X_MULTI_QUEUE) && !defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ -#define BNX2X_SAFC -#endif -#if defined(VMWARE_ESX_DDK_VERSION) /* ! BNX2X_UPSTREAM */ -#if VMWARE_ESX_DDK_VERSION >= 40000 -#define BNX2X_VMWARE_BMAPILNX -#else -#define __NO_TPA__ 1 -#endif +#ifndef BNX2X_MOD_VER +#define BNX2X_MOD_VER "" #endif +#define DRV_MODULE_NAME "bnx2x" +#define DRV_MODULE_VERSION "1.72.56.v55.2" BNX2X_MOD_VER +#define DRV_MODULE_RELDATE "$DateTime: 2013/02/12 13:47:50 $" +#define BNX2X_BC_VER 0x040200 #if defined(CONFIG_PCI_IOV) && defined(BNX2X_IOV) /* ! BNX2X_UPSTREAM */ #define BCM_IOV #endif - #ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ #include "bnx2x_compat.h" +#define BCM_VF 1 +#ifdef __VMKLNX__ +#include "vmkapi.h" #endif +#endif +#if (LINUX_VERSION_CODE >= 0x020626) || (defined(RHEL_RELEASE_CODE) && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0))) /* BNX2X_UPSTREAM */ +#if defined(CONFIG_DCB) +#define BCM_DCBNL +#endif +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) /* ! BNX2X_UPSTREAM */ +#define BCM_HAS_BUILD_SKB 1 +#endif + +#include "bnx2x_hsi.h" + #if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE) +#ifdef BNX2X_UPSTREAM /* BNX2X_UPSTREAM */ +#define BCM_CNIC 1 +#include "../cnic_if.h" +#else /* not BNX2X_UPSTREAM */ /* DEBUG DEBUG */ #ifndef BNX2X_VF /* No CNIC for VF at the moment */ #define BCM_CNIC 1 +#define BCM_OOO 1 #include "cnic_if.h" #endif /* BNX2X_VF */ #endif - +#endif #if !defined(BCM_CNIC) && (LINUX_VERSION_CODE >= 0x020610) /* ! BNX2X_UPSTREAM */ /* DEBUG DEBUG */ #ifndef BNX2X_VF /* No CNIC for VF at the moment */ #define BCM_CNIC 1 +#define BCM_OOO 1 #include "cnic_if.h" #endif /* BNX2X_VF */ #endif @@ -86,103 +93,134 @@ #if (LINUX_VERSION_CODE > 0x02061e) /* BNX2X_UPSTREAM */ #include #endif + #include "bnx2x_reg.h" #include "bnx2x_fw_defs.h" -#include "bnx2x_hsi.h" +#include "bnx2x_mfw_req.h" #include "bnx2x_link.h" -#include "bnx2x_sp_verbs.h" +#include "bnx2x_sp.h" #include "bnx2x_dcb.h" +#include "bnx2x_stats.h" +#endif /* BYPASS_APP */ + +#define INT_MODE_INTx 1 +#define INT_MODE_MSI 2 #if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) /* ! BNX2X_UPSTREAM */ #define BNX2X_NETQ + +struct netq_mac_filter { + u16 flags; + u8 mac[ETH_ALEN]; +}; #endif +#if defined(__VMKLNX__) && defined(BCM_IOV) /* ! BNX2X_UPSTREAM */ +#define BNX2X_PASSTHRU +#endif + +#if defined(__VMKLNX__) && !defined(BCM_IOV) && (((VMWARE_ESX_DDK_VERSION == 50000) && !defined(BNX2X_INBOX)) || (VMWARE_ESX_DDK_VERSION > 50000)) /* ! BNX2X_UPSTREAM */ +#define BNX2X_ESX_CNA +#endif + + /* error/debug prints */ /* for messages that are currently off */ #define BNX2X_MSG_OFF 0x0 -#define BNX2X_MSG_MCP 0x010000 /* was: NETIF_MSG_HW */ -#define BNX2X_MSG_STATS 0x020000 /* was: NETIF_MSG_TIMER */ -#define BNX2X_MSG_NVM 0x040000 /* was: NETIF_MSG_HW */ -#define BNX2X_MSG_DMAE 0x080000 /* was: NETIF_MSG_HW */ -#define BNX2X_MSG_SP 0x100000 /* was: NETIF_MSG_INTR */ -#define BNX2X_MSG_FP 0x200000 /* was: NETIF_MSG_INTR */ +#define BNX2X_MSG_MCP 0x0010000 /* was: NETIF_MSG_HW */ +#define BNX2X_MSG_STATS 0x0020000 /* was: NETIF_MSG_TIMER */ +#define BNX2X_MSG_NVM 0x0040000 /* was: NETIF_MSG_HW */ +#define BNX2X_MSG_DMAE 0x0080000 /* was: NETIF_MSG_HW */ +#define BNX2X_MSG_SP 0x0100000 /* was: NETIF_MSG_INTR */ +#define BNX2X_MSG_FP 0x0200000 /* was: NETIF_MSG_INTR */ #ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ -#define BNX2X_MSG_NETQ 0x400000 +#define BNX2X_MSG_NETQ 0x0400000 #endif -#define BNX2X_MSG_IOV 0x800000 -#define BNX2X_MSG_CNIC 0x1000000 - -#define DP_LEVEL KERN_NOTICE /* was: KERN_DEBUG */ +#define BNX2X_MSG_IOV 0x0800000 +#define BNX2X_MSG_IDLE 0x2000000 /* used for idle check*/ +#define BNX2X_MSG_ETHTOOL 0x4000000 +#define BNX2X_MSG_DCB 0x8000000 /* regular debug print */ -#define DP(__mask, __fmt, __args...) \ +#define DP(__mask, fmt, ...) \ do { \ - if (bp->msg_enable & (__mask)) \ - printk(DP_LEVEL "[%s:%d(%s)]" __fmt, \ - __func__, __LINE__, \ - bp->dev ? (bp->dev->name) : "?", \ - ##__args); \ + if (unlikely(bp->msg_enable & (__mask))) \ + pr_notice("[%s:%d(%s)]" fmt, \ + __func__, __LINE__, \ + bp->dev ? (bp->dev->name) : "?", \ + ##__VA_ARGS__); \ } while (0) -#define DP_CONT(__mask, __fmt, __args...) \ +#define DP_CONT(__mask, fmt, ...) \ do { \ - if (bp->msg_enable & (__mask)) \ - pr_cont(__fmt, ##__args); \ + if (unlikely(bp->msg_enable & (__mask))) \ + pr_cont(fmt, ##__VA_ARGS__); \ } while (0) /* errors debug print */ -#define BNX2X_DBG_ERR(__fmt, __args...) \ +#define BNX2X_DBG_ERR(fmt, ...) \ do { \ - if (netif_msg_probe(bp)) \ - pr_err("[%s:%d(%s)]" __fmt, \ + if (unlikely(netif_msg_probe(bp))) \ + pr_err("[%s:%d(%s)]" fmt, \ __func__, __LINE__, \ bp->dev ? (bp->dev->name) : "?", \ - ##__args); \ + ##__VA_ARGS__); \ } while (0) /* for errors (never masked) */ -#define BNX2X_ERR(__fmt, __args...) \ +#define BNX2X_ERR(fmt, ...) \ do { \ - pr_err("[%s:%d(%s)]" __fmt, \ + pr_err("[%s:%d(%s)]" fmt, \ __func__, __LINE__, \ bp->dev ? (bp->dev->name) : "?", \ - ##__args); \ - } while (0) + ##__VA_ARGS__); \ +} while (0) -#define BNX2X_ERROR(__fmt, __args...) do { \ - pr_err("[%s:%d]" __fmt, __func__, __LINE__, ##__args); \ - } while (0) +#define BNX2X_ERROR(fmt, ...) \ + pr_err("[%s:%d]" fmt, __func__, __LINE__, ##__VA_ARGS__) /* before we have a dev->name use dev_info() */ -#define BNX2X_DEV_INFO(__fmt, __args...) \ +#define BNX2X_DEV_INFO(fmt, ...) \ do { \ - if (netif_msg_probe(bp)) \ - dev_info(&bp->pdev->dev, __fmt, ##__args); \ + if (unlikely(netif_msg_probe(bp))) \ + dev_info(&bp->pdev->dev, fmt, ##__VA_ARGS__); \ } while (0) +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ +#define BNX2X_MAC_FMT "%pM" +#define BNX2X_MAC_PRN_LIST(mac) (mac) +#else +#define BNX2X_MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" +#define BNX2X_MAC_PRN_LIST(mac) (mac)[0], (mac)[1], (mac)[2], (mac)[3], \ + (mac)[4], (mac)[5] +#endif + #ifdef BNX2X_STOP_ON_ERROR -#define bnx2x_panic() do { \ - bp->panic = 1; \ - BNX2X_ERR("driver assert\n"); \ - bnx2x_int_disable(bp); \ - bnx2x_panic_dump(bp); \ - } while (0) +void bnx2x_int_disable(struct bnx2x *bp); +#define bnx2x_panic() \ +do { \ + bp->panic = 1; \ + BNX2X_ERR("driver assert\n"); \ + bnx2x_int_disable(bp); \ + bnx2x_panic_dump(bp); \ +} while (0) #else -#define bnx2x_panic() do { \ - bp->panic = 1; \ - BNX2X_ERR("driver assert\n"); \ - bnx2x_panic_dump(bp); \ - } while (0) +#define bnx2x_panic() \ +do { \ + bp->panic = 1; \ + BNX2X_ERR("driver assert\n"); \ + bnx2x_panic_dump(bp); \ +} while (0) #endif #ifdef BNX2X_UPSTREAM /* BNX2X_UPSTREAM */ #define bnx2x_mc_addr(ha) ((ha)->addr) +#define bnx2x_uc_addr(ha) ((ha)->addr) #endif - #define U64_LO(x) (u32)(((u64)(x)) & 0xffffffff) #define U64_HI(x) (u32)(((u64)(x)) >> 32) #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) @@ -234,14 +272,15 @@ do { \ #define SHMEM2_WR(bp, field, val) REG_WR(bp, SHMEM2_ADDR(bp, field), val) #define MF_CFG_ADDR(bp, field) (bp->common.mf_cfg_base + \ offsetof(struct mf_cfg, field)) -#define MF2_CFG_ADDR(bp,field) (bp->common.mf2_cfg_base + \ +#define MF2_CFG_ADDR(bp, field) (bp->common.mf2_cfg_base + \ offsetof(struct mf2_cfg, field)) #define MF_CFG_RD(bp, field) REG_RD(bp, MF_CFG_ADDR(bp, field)) -#define MF_CFG_WR(bp, field, val) REG_WR(bp, MF_CFG_ADDR(bp, field), (val)) +#define MF_CFG_WR(bp, field, val) REG_WR(bp,\ + MF_CFG_ADDR(bp, field), (val)) #define MF2_CFG_RD(bp, field) REG_RD(bp, MF2_CFG_ADDR(bp, field)) -#define SHMEM2_HAS(bp, field) ((bp)->common.shmem2_base && \ +#define SHMEM2_HAS(bp, field) ((bp)->common.shmem2_base && \ (SHMEM2_RD((bp), size) > \ offsetof(struct shmem2_region, field))) @@ -251,29 +290,21 @@ do { \ /* SP SB indices */ /* General SP events - stats query, cfc delete, etc */ -/* HC_INDEX_DEF_C_ETH_SLOW_PATH */ #define HC_SP_INDEX_ETH_DEF_CONS 3 /* EQ completions */ -/* HC_INDEX_DEF_C_EQ_CONS */ #define HC_SP_INDEX_EQ_CONS 7 /* FCoE L2 connection completions */ -/* HC_INDEX_DEF_C_ETH_FCOE_CQ_CONS */ -#define HC_SP_INDEX_ETH_FCOE_TX_CQ_CONS 6 -/* HC_INDEX_DEF_U_ETH_FCOE_RX_CQ_CONS */ -#define HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS 4 +#define HC_SP_INDEX_ETH_FCOE_TX_CQ_CONS 6 +#define HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS 4 /* iSCSI L2 */ -/* HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS */ #define HC_SP_INDEX_ETH_ISCSI_CQ_CONS 5 -/* HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS */ #define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS 1 -/******************/ - /* Special clients parameters */ -/** SB indices */ +/* SB indices */ /* FCoE L2 */ #define BNX2X_FCOE_L2_RX_INDEX \ (&bp->def_status_blk->sp_sb.\ @@ -283,70 +314,135 @@ do { \ (&bp->def_status_blk->sp_sb.\ index_values[HC_SP_INDEX_ETH_FCOE_TX_CQ_CONS]) +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ /* OOO connection */ #define HC_INDEX_OOO_RX_CQ_CONS HC_INDEX_ETH_RX_CQ_CONS #define BNX2X_RX_OOO_INDEX \ (&fp->sb_index_values[HC_INDEX_ETH_RX_CQ_CONS]) +/* It's an index that will never be advanced - we need it in + * order to use the general NAPI poll() for handling OOO + * ring SP in bnx2x_nic_load()/unload() + */ +#define BNX2X_TX_OOO_INDEX \ + (&fp->sb_index_values[HC_INDEX_OOO_TX_CQ_CONS]) + /* FWD connection */ #define HC_INDEX_FWD_TX_CQ_CONS C_SB_ETH_TX_CQ_INDEX #define BNX2X_TX_FWD_INDEX \ - (&fp->sb_index_values[C_SB_ETH_TX_CQ_INDEX]) - -/** CIDs and CLIDs: + (&fp->sb_index_values[HC_INDEX_ETH_TX_CQ_CONS_COS0]) +#endif +/** + * CIDs and CLIDs: * CLIDs below is a CLID for func 0, then the CLID for other * functions will be calculated by the formula: * * FUNC_N_CLID_X = N * NUM_SPECIAL_CLIENTS + FUNC_0_CLID_X * */ +enum { +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + BNX2X_OOO_ETH_CL_ID_IDX, +#endif + BNX2X_ISCSI_ETH_CL_ID_IDX, + BNX2X_FCOE_ETH_CL_ID_IDX, + BNX2X_MAX_CNIC_ETH_CL_ID_IDX, +}; -/* iSCSI L2 */ -#define BNX2X_ISCSI_ETH_CL_ID_IDX 1 -#define BNX2X_ISCSI_ETH_CID 17 +#define BNX2X_CNIC_START_ETH_CID(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) *\ + (bp)->max_cos) -/* OOO */ -#define BNX2X_OOO_ETH_CL_ID_IDX 0 -#define BNX2X_OOO_ETH_CID 16 - -/* Forwarding: has no client, only CID */ -#define BNX2X_FWD_ETH_CID 19 - -/* FCoE L2 */ -#define BNX2X_FCOE_ETH_CL_ID_IDX 2 -#define BNX2X_FCOE_ETH_CID 18 + /* iSCSI L2 */ +#define BNX2X_ISCSI_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp)) +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#define BNX2X_OOO_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp) + 1) + /* Forwarding: has no client, only CID */ +#define BNX2X_FWD_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp) + 2) + /* FCoE L2 */ +#define BNX2X_FCOE_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp) + 3) +#else + /* FCoE L2 */ +#define BNX2X_FCOE_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp) + 1) +#endif /** Additional rings budgeting */ #ifdef BCM_CNIC - -#define CNIC_CONTEXT_USE 1 +#define CNIC_PRESENT 1 +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ #define OOO_TX_CONTEXT_USE 1 #define OOO_RX_CONTEXT_USE 1 -#define FCOE_CONTEXT_USE 1 - +#endif +#define FCOE_PRESENT 1 #else - -#define CNIC_CONTEXT_USE 0 +#define CNIC_PRESENT 0 +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ #define OOO_TX_CONTEXT_USE 0 #define OOO_RX_CONTEXT_USE 0 -#define FCOE_CONTEXT_USE 0 - +#endif +#define FCOE_PRESENT 0 #endif /* BCM_CNIC */ - +#ifndef BCM_OOO /* BNX2X_UPSTREAM */ +#define NON_ETH_CONTEXT_USE (FCOE_PRESENT) +#else #define OOO_CONTEXT_USE (OOO_TX_CONTEXT_USE + OOO_RX_CONTEXT_USE) -#define NONE_ETH_CONTEXT_USE (FCOE_CONTEXT_USE + OOO_CONTEXT_USE) +#define NON_ETH_CONTEXT_USE (FCOE_PRESENT + OOO_CONTEXT_USE) +#endif +#define AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR \ + AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR #define SM_RX_ID 0 #define SM_TX_ID 1 -/* fast path */ +/* defines for multiple tx priority indices */ +#define FIRST_TX_ONLY_COS_INDEX 1 +#define FIRST_TX_COS_INDEX 0 +/* rules for calculating the cids of tx-only connections */ +#define CID_TO_FP(cid, bp) ((cid) % BNX2X_NUM_NON_CNIC_QUEUES(bp)) +#define CID_COS_TO_TX_ONLY_CID(cid, cos, bp) \ + (cid + cos * BNX2X_NUM_NON_CNIC_QUEUES(bp)) + +/* fp index inside class of service range */ +#define FP_COS_TO_TXQ(fp, cos, bp) \ + ((fp)->index + cos * BNX2X_NUM_NON_CNIC_QUEUES(bp)) + +/* Indexes for transmission queues array: + * txdata for RSS i CoS j is at location i + (j * num of RSS) + * txdata for FCoE (if exist) is at location max cos * num of RSS + * txdata for FWD (if exist) is one location after FCoE + * txdata for OOO (if exist) is one location after FWD + */ +enum { + FCOE_TXQ_IDX_OFFSET, + FWD_TXQ_IDX_OFFSET, + OOO_TXQ_IDX_OFFSET, +}; +#define MAX_ETH_TXQ_IDX(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) * (bp)->max_cos) +#ifdef BCM_CNIC +#define FCOE_TXQ_IDX(bp) (MAX_ETH_TXQ_IDX(bp) + FCOE_TXQ_IDX_OFFSET) +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#define FWD_TXQ_IDX(bp) (MAX_ETH_TXQ_IDX(bp) + FWD_TXQ_IDX_OFFSET) +#define OOO_TXQ_IDX(bp) (MAX_ETH_TXQ_IDX(bp) + OOO_TXQ_IDX_OFFSET) +#endif +#endif + +#ifndef BYPASS_APP /* BNX2X_UPSTREAM */ +/* fast path */ +/* + * This driver uses new build_skb() API : + * RX ring buffer contains pointer to kmalloc() data only, + * skb are built only after Hardware filled the frame. + */ struct sw_rx_bd { - struct sk_buff *skb; -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + u8 *data; +#else + struct sk_buff *data; +#endif +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ DEFINE_DMA_UNMAP_ADDR(mapping); #else DECLARE_PCI_UNMAP_ADDR(mapping) @@ -363,19 +459,27 @@ struct sw_tx_bd { struct sw_rx_page { struct page *page; -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ DEFINE_DMA_UNMAP_ADDR(mapping); #else DECLARE_PCI_UNMAP_ADDR(mapping) #endif - }; +#endif /* BYPASS_APP */ union db_prod { struct doorbell_set_prod data; u32 raw; }; +/* dropless fc FW/HW related params */ +#define BRB_SIZE(bp) (CHIP_IS_E3(bp) ? 1024 : 512) +#define MAX_AGG_QS(bp) (CHIP_IS_E1(bp) ? \ + ETH_MAX_AGGREGATION_QUEUES_E1 :\ + ETH_MAX_AGGREGATION_QUEUES_E1H_E2) +#define FW_DROP_LEVEL(bp) (3 + MAX_SPQ_PENDING + MAX_AGG_QS(bp)) +#define FW_PREFETCH_CNT 16 +#define DROPLESS_FC_HEADROOM 100 /* MC hsi */ #define BCM_PAGE_SHIFT 12 @@ -388,19 +492,40 @@ union db_prod { #define SGE_PAGE_SIZE PAGE_SIZE #define SGE_PAGE_SHIFT PAGE_SHIFT #define SGE_PAGE_ALIGN(addr) PAGE_ALIGN((typeof(PAGE_SIZE))(addr)) +#define SGE_PAGES (SGE_PAGE_SIZE * PAGES_PER_SGE) /* SGE ring related macros */ #define NUM_RX_SGE_PAGES 2 #define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) -#define MAX_RX_SGE_CNT (RX_SGE_CNT - 2) +#define NEXT_PAGE_SGE_DESC_CNT 2 +#define MAX_RX_SGE_CNT (RX_SGE_CNT - NEXT_PAGE_SGE_DESC_CNT) /* RX_SGE_CNT is promised to be a power of 2 */ #define RX_SGE_MASK (RX_SGE_CNT - 1) #define NUM_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES) #define MAX_RX_SGE (NUM_RX_SGE - 1) #define NEXT_SGE_IDX(x) ((((x) & RX_SGE_MASK) == \ - (MAX_RX_SGE_CNT - 1)) ? (x) + 3 : (x) + 1) + (MAX_RX_SGE_CNT - 1)) ? \ + (x) + 1 + NEXT_PAGE_SGE_DESC_CNT : \ + (x) + 1) #define RX_SGE(x) ((x) & MAX_RX_SGE) +/* + * Number of required SGEs is the sum of two: + * 1. Number of possible opened aggregations (next packet for + * these aggregations will probably consume SGE immidiatelly) + * 2. Rest of BRB blocks divided by 2 (block will consume new SGE only + * after placement on BD for new TPA aggregation) + * + * Takes into account NEXT_PAGE_SGE_DESC_CNT "next" elements on each page + */ +#define NUM_SGE_REQ (MAX_AGG_QS(bp) + \ + (BRB_SIZE(bp) - MAX_AGG_QS(bp)) / 2) +#define NUM_SGE_PG_REQ ((NUM_SGE_REQ + MAX_RX_SGE_CNT - 1) / \ + MAX_RX_SGE_CNT) +#define SGE_TH_LO(bp) (NUM_SGE_REQ + \ + NUM_SGE_PG_REQ * NEXT_PAGE_SGE_DESC_CNT) +#define SGE_TH_HI(bp) (SGE_TH_LO(bp) + DROPLESS_FC_HEADROOM) + /* Manipulate a bit vector defined as an array of u64 */ /* Number of bits in one sge_mask array element */ @@ -443,78 +568,99 @@ union db_prod { /* Number of u64 elements in SGE mask array */ -#define RX_SGE_MASK_LEN ((NUM_RX_SGE_PAGES * RX_SGE_CNT) / \ - BIT_VEC64_ELEM_SZ) +#define RX_SGE_MASK_LEN (NUM_RX_SGE / BIT_VEC64_ELEM_SZ) #define RX_SGE_MASK_LEN_MASK (RX_SGE_MASK_LEN - 1) #define NEXT_SGE_MASK_ELEM(el) (((el) + 1) & RX_SGE_MASK_LEN_MASK) union host_hc_status_block { /* pointer to fp status block e1x */ - volatile struct host_hc_status_block_e1x * e1x_sb; + struct host_hc_status_block_e1x *e1x_sb; /* pointer to fp status block e2 */ - volatile struct host_hc_status_block_e2 * e2_sb; + struct host_hc_status_block_e2 *e2_sb; }; -struct bnx2x_eth_q_stats { - u32 total_bytes_received_hi; - u32 total_bytes_received_lo; - u32 total_bytes_transmitted_hi; - u32 total_bytes_transmitted_lo; - u32 total_unicast_packets_received_hi; - u32 total_unicast_packets_received_lo; - u32 total_multicast_packets_received_hi; - u32 total_multicast_packets_received_lo; - u32 total_broadcast_packets_received_hi; - u32 total_broadcast_packets_received_lo; - u32 total_unicast_packets_transmitted_hi; - u32 total_unicast_packets_transmitted_lo; - u32 total_multicast_packets_transmitted_hi; - u32 total_multicast_packets_transmitted_lo; - u32 total_broadcast_packets_transmitted_hi; - u32 total_broadcast_packets_transmitted_lo; - u32 valid_bytes_received_hi; - u32 valid_bytes_received_lo; - - u32 etherstatsoverrsizepkts_hi; - u32 etherstatsoverrsizepkts_lo; - u32 no_buff_discard_hi; - u32 no_buff_discard_lo; - - u32 driver_xoff; - u32 rx_err_discard_pkt; - u32 rx_skb_alloc_failed; - u32 hw_csum_err; +#ifndef BYPASS_APP /* BNX2X_UPSTREAM */ +struct bnx2x_agg_info { + /* + * First aggregation buffer is a data buffer, the following - are pages. + * We will preallocate the data buffer for each aggregation when + * we open the interface and will replace the BD at the consumer + * with this one when we receive the TPA_START CQE in order to + * keep the Rx BD ring consistent. + */ + struct sw_rx_bd first_buf; + u8 tpa_state; +#define BNX2X_TPA_START 1 +#define BNX2X_TPA_STOP 2 +#define BNX2X_TPA_ERROR 3 + u8 placement_offset; + u16 parsing_flags; + u16 vlan_tag; + u16 len_on_bd; + u32 rxhash; + u16 gro_size; + u16 full_page; }; #define Q_STATS_OFFSET32(stat_name) \ (offsetof(struct bnx2x_eth_q_stats, stat_name) / 4) -struct bnx2x_fastpath { - struct bnx2x *bp; /* parent */ - -#define BNX2X_NAPI_WEIGHT 128 -#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ - struct napi_struct napi; -#else -#ifdef USE_NAPI_GRO - struct napi_struct napi; -#endif - struct net_device dummy_netdev; -#endif - union host_hc_status_block status_blk; - /* chip independed shortcuts into sb structure */ - __le16 *sb_index_values; - __le16 *sb_running_index; - /* chip independed shortcut into rx_prods_offset memory */ - u32 ustorm_rx_prods_offset; - - dma_addr_t status_blk_mapping; +struct bnx2x_fp_txdata { struct sw_tx_bd *tx_buf_ring; union eth_tx_bd_types *tx_desc_ring; dma_addr_t tx_desc_mapping; + u32 cid; + + union db_prod tx_db; + + u16 tx_pkt_prod; + u16 tx_pkt_cons; + u16 tx_bd_prod; + u16 tx_bd_cons; + + unsigned long tx_pkt; + + __le16 *tx_cons_sb; + + int txq_index; + struct bnx2x_fastpath *parent_fp; + int tx_ring_size; +}; + +enum bnx2x_tpa_mode_t { + TPA_MODE_LRO, + TPA_MODE_GRO +}; + +struct bnx2x_fastpath { + struct bnx2x *bp; /* parent */ + +#define BNX2X_NAPI_WEIGHT 128 +#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ + struct napi_struct napi; +#endif +#if !defined(BNX2X_NEW_NAPI) /* ! BNX2X_UPSTREAM */ + struct net_device dummy_netdev; +#endif + union host_hc_status_block status_blk; + /* chip independed shortcuts into sb structure */ + __le16 *sb_index_values; + __le16 *sb_running_index; + /* chip independed shortcut into rx_prods_offset memory */ + u32 ustorm_rx_prods_offset; + + u32 rx_buf_size; + + dma_addr_t status_blk_mapping; + + enum bnx2x_tpa_mode_t mode; + + u8 max_cos; /* actual number of active tx coses */ + struct bnx2x_fp_txdata *txdata_ptr[BNX2X_MULTI_TX_COS]; + struct sw_rx_bd *rx_buf_ring; /* BDs mappings ring */ struct sw_rx_page *rx_page_ring; /* SGE pages mappings ring */ @@ -531,38 +677,23 @@ struct bnx2x_fastpath { u64 sge_mask[RX_SGE_MASK_LEN]; u32 cid; - u16 state; -#define BNX2X_FP_STATE_CLOSED 0 -#define BNX2X_FP_STATE_IRQ 0x8000 -#define BNX2X_FP_STATE_OPENING 0x9000 -#define BNX2X_FP_STATE_OPEN 0xa000 -#define BNX2X_FP_STATE_HALTING 0xb000 -#define BNX2X_FP_STATE_HALTED 0xc000 -#define BNX2X_FP_STATE_TERMINATING 0xd000 -#define BNX2X_FP_STATE_TERMINATED 0xe000 + + __le16 fp_hc_idx; u8 index; /* number in fp array */ + u8 rx_queue; /* index for skb_record */ u8 cl_id; /* eth client id */ u8 cl_qzone_id; u8 fw_sb_id; /* status block number in FW */ u8 igu_sb_id; /* status block number in HW */ -#if defined(BNX2X_SAFC) || defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ u8 cos; /* unused for ESX - * alignment only */ #endif - union db_prod tx_db; - u16 tx_pkt_prod; - u16 tx_pkt_cons; - u16 tx_bd_prod; - u16 tx_bd_cons; - __le16 *tx_cons_sb; - - __le16 fp_hc_idx; - -#ifdef BCM_CNIC - /* number of availiable buffers on the OOO Rx ring */ +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + /* number of available buffers on the OOO Rx ring */ u16 rx_pkts_avail; #endif u16 rx_bd_prod; @@ -573,60 +704,15 @@ struct bnx2x_fastpath { /* The last maximal completed SGE */ u16 last_max_sge; __le16 *rx_cons_sb; - #ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - u16 netq_filter_event; - u16 netq_flags; -#define BNX2X_NETQ_RX_QUEUE_ALLOCATED 0x0001 -#define BNX2X_NETQ_TX_QUEUE_ALLOCATED 0x0002 -#define BNX2X_NETQ_RX_QUEUE_ACTIVE 0x0004 -#define BNX2X_NETQ_TX_QUEUE_ACTIVE 0x0008 - -#define BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp) \ - ((fp->netq_flags & BNX2X_NETQ_RX_QUEUE_ALLOCATED) == \ - BNX2X_NETQ_RX_QUEUE_ALLOCATED) -#define BNX2X_IS_NETQ_TX_QUEUE_ALLOCATED(fp) \ - ((fp->netq_flags & BNX2X_NETQ_TX_QUEUE_ALLOCATED) == \ - BNX2X_NETQ_TX_QUEUE_ALLOCATED) -#define BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(fp) \ - ((fp->netq_flags & BNX2X_NETQ_RX_QUEUE_ACTIVE) == \ - BNX2X_NETQ_RX_QUEUE_ACTIVE) -#define BNX2X_IS_NETQ_TX_QUEUE_ACTIVE(fp) \ - ((fp->netq_flags & BNX2X_NETQ_TX_QUEUE_ACTIVE) == \ - BNX2X_NETQ_TX_QUEUE_ACTIVE) - -#if (VMWARE_ESX_DDK_VERSION >= 41000) - -#define BNX2X_NETQ_FP_FEATURE_RESERVED_SHIFT_BIT 8 -#define BNX2X_NETQ_FP_NONE_RESERVED \ - (0 << BNX2X_NETQ_FP_FEATURE_RESERVED_SHIFT_BIT) - -#define BNX2X_NETQ_FP_LRO_RESERVED \ - (1 << BNX2X_NETQ_FP_FEATURE_RESERVED_SHIFT_BIT) - -#define BNX2X_NETQ_FP_LRO_RESERVED_MAX_NUM(bp) (!CHIP_IS_E1(bp) ? 2 : 1) -#define BNX2X_NETQ_FP_FEATURES_RESERVED 1 -#define BNX2X_NETQ_FP_FEATURES_RESERVED_MASK \ - (((1 << BNX2X_NETQ_FP_FEATURES_RESERVED) - 1) << \ - BNX2X_NETQ_FP_FEATURE_RESERVED_SHIFT_BIT) - -#define BNX2X_IS_NETQ_FP_FEAT_NONE_RESERVED(fp) \ - (!(fp->netq_flags & BNX2X_NETQ_FP_FEATURES_RESERVED_MASK)) -#define BNX2X_IS_NETQ_FP_FEAT_LRO_RESERVED(fp) \ - ((fp->netq_flags & BNX2X_NETQ_FP_FEATURES_RESERVED_MASK) == \ - BNX2X_NETQ_FP_LRO_RESERVED) + u32 netq_flags; + struct netq_mac_filter *mac_filters; #endif -#endif - - unsigned long tx_pkt, - rx_pkt, + unsigned long rx_pkt, rx_calls; /* TPA related */ - struct sw_rx_bd tpa_pool[ETH_MAX_AGGREGATION_QUEUES_E1H]; - u8 tpa_state[ETH_MAX_AGGREGATION_QUEUES_E1H]; -#define BNX2X_TPA_START 1 -#define BNX2X_TPA_STOP 2 + struct bnx2x_agg_info tpa_info[ETH_MAX_AGGREGATION_QUEUES_E1H_E2]; u8 disable_tpa; #ifdef BNX2X_STOP_ON_ERROR u64 tpa_queue_used; @@ -636,6 +722,7 @@ struct bnx2x_fastpath { struct ustorm_per_queue_stats old_uclient; struct xstorm_per_queue_stats old_xclient; struct bnx2x_eth_q_stats eth_q_stats; + struct bnx2x_eth_q_stats_old eth_q_stats_old; /* The size is calculated using the following: sizeof name field from netdev structure + @@ -647,45 +734,72 @@ struct bnx2x_fastpath { /* MACs object */ struct bnx2x_vlan_mac_obj mac_obj; - /* MACs object */ - struct bnx2x_vlan_mac_obj vlan_obj; + /* Queue State object */ + struct bnx2x_queue_sp_obj q_obj; - /* MACs object */ - struct bnx2x_vlan_mac_obj vlan_mac_obj; +#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ + /* VLANs object */ + struct bnx2x_vlan_mac_obj vlan_obj; +#endif }; #define bnx2x_fp(bp, nr, var) (bp->fp[nr].var) -/* FCoE L2 `fastpath' entry is right after the eth entries */ +/* Use 2500 as a mini-jumbo MTU for FCoE */ +#define BNX2X_FCOE_MINI_JUMBO_MTU 2500 + +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +/* + * FP entries mapping: + * ETH Leading + RSS + * OOO - if exist always has napi + * FCOE - does not have napi in ESX + * FWD - does not have napi + */ +#endif +#ifdef BCM_OOO /* non BNX2X_UPSTREAM */ +#define FCOE_IDX (BNX2X_NUM_QUEUES(bp) - NON_ETH_CONTEXT_USE +\ + OOO_RX_CONTEXT_USE) +#else /* BNX2X_UPSTREAM */ #define FCOE_IDX BNX2X_NUM_ETH_QUEUES(bp) +#endif #define bnx2x_fcoe_fp(bp) (&bp->fp[FCOE_IDX]) #define bnx2x_fcoe(bp, var) (bnx2x_fcoe_fp(bp)->var) +#define bnx2x_fcoe_tx(bp, var) (bnx2x_fcoe_fp(bp)-> \ + txdata_ptr[FIRST_TX_COS_INDEX] \ + ->var) -/* OOO Tx L2 (FWD) `fastpath' entry is after the FCoE L2 entry */ -#define FWD_IDX (BNX2X_NUM_ETH_QUEUES(bp) + \ - OOO_TX_CONTEXT_USE) -#define bnx2x_fwd_fp(bp) (&bp->fp[FWD_IDX]) -#define bnx2x_fwd(bp, var) (bnx2x_fwd_fp(bp)->var) - -/* OOO Rx L2 `fastpath' entry is the last entry */ -#define OOO_IDX (BNX2X_NUM_ETH_QUEUES(bp) + OOO_CONTEXT_USE) -#define bnx2x_ooo_fp(bp) (&bp->fp[OOO_IDX]) +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#define OOO_IDX(bp) (FCOE_IDX - OOO_RX_CONTEXT_USE) +#define bnx2x_ooo_fp(bp) (&bp->fp[OOO_IDX(bp)]) #define bnx2x_ooo(bp, var) (bnx2x_ooo_fp(bp)->var) +#define FWD_IDX(bp) (FCOE_IDX + OOO_TX_CONTEXT_USE) +#define bnx2x_fwd_fp(bp) (&bp->fp[FWD_IDX(bp)]) +#define bnx2x_fwd(bp, var) (bnx2x_fwd_fp(bp)->var) +#define bnx2x_fwd_txdata(fp) (fp->txdata_ptr[FIRST_TX_COS_INDEX]) +#endif + +#define IS_ETH_FP(fp) (fp->index < \ + BNX2X_NUM_ETH_QUEUES(fp->bp)) #ifdef BCM_CNIC #define IS_FCOE_FP(fp) (fp->index == FCOE_IDX) #define IS_FCOE_IDX(idx) ((idx) == FCOE_IDX) -#define IS_FWD_FP(fp) (fp->index == FWD_IDX) -#define IS_FWD_IDX(idx) ((idx) == FWD_IDX) -#define IS_OOO_FP(fp) (fp->index == OOO_IDX) -#define IS_OOO_IDX(idx) ((idx) == OOO_IDX) +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#define IS_FWD_FP(fp) (fp->index == FWD_IDX(fp->bp)) +#define IS_FWD_IDX(idx) ((idx) == FWD_IDX(bp)) +#define IS_OOO_FP(fp) (fp->index == OOO_IDX(fp->bp)) +#define IS_OOO_IDX(idx) ((idx) == OOO_IDX(bp)) +#endif #else #define IS_FCOE_FP(fp) false -#define IS_FWD_FP(fp) false -#define IS_OOO_FP(fp) false #define IS_FCOE_IDX(idx) false -#define IS_FWD_IDX(idx) false +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#define IS_OOO_FP(fp) false #define IS_OOO_IDX(idx) false +#define IS_FWD_FP(fp) false +#define IS_FWD_IDX(idx) false +#endif #endif #if defined(BNX2X_VMWARE_BMAPILNX) /* ! BNX2X_UPSTREAM */ @@ -730,6 +844,7 @@ struct bnx2x_ioctl_req { } __attribute__((packed)); #endif +#endif /* BYPASS_APP */ /* MC hsi */ #define MAX_FETCH_BD 13 /* HW max BDs per packet */ @@ -737,59 +852,102 @@ struct bnx2x_ioctl_req { #define NUM_TX_RINGS 16 #define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_tx_bd_types)) -#define MAX_TX_DESC_CNT (TX_DESC_CNT - 1) +#define NEXT_PAGE_TX_DESC_CNT 1 +#define MAX_TX_DESC_CNT (TX_DESC_CNT - NEXT_PAGE_TX_DESC_CNT) #define NUM_TX_BD (TX_DESC_CNT * NUM_TX_RINGS) #define MAX_TX_BD (NUM_TX_BD - 1) #define MAX_TX_AVAIL (MAX_TX_DESC_CNT * NUM_TX_RINGS - 2) #define NEXT_TX_IDX(x) ((((x) & MAX_TX_DESC_CNT) == \ - (MAX_TX_DESC_CNT - 1)) ? (x) + 2 : (x) + 1) + (MAX_TX_DESC_CNT - 1)) ? \ + (x) + 1 + NEXT_PAGE_TX_DESC_CNT : \ + (x) + 1) #define TX_BD(x) ((x) & MAX_TX_BD) #define TX_BD_POFF(x) ((x) & MAX_TX_DESC_CNT) /* The RX BD ring is special, each bd is 8 bytes but the last one is 16 */ #define NUM_RX_RINGS 8 #define RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd)) -#define MAX_RX_DESC_CNT (RX_DESC_CNT - 2) +#define NEXT_PAGE_RX_DESC_CNT 2 +#define MAX_RX_DESC_CNT (RX_DESC_CNT - NEXT_PAGE_RX_DESC_CNT) #define RX_DESC_MASK (RX_DESC_CNT - 1) #define NUM_RX_BD (RX_DESC_CNT * NUM_RX_RINGS) #define MAX_RX_BD (NUM_RX_BD - 1) #define MAX_RX_AVAIL (MAX_RX_DESC_CNT * NUM_RX_RINGS - 2) -#define MIN_RX_SIZE_OOO 40 -#define MIN_RX_SIZE 128 -#define MIN_RX_SIZE_TPA (max_t(u32, 72, MIN_RX_SIZE)) -#define MIN_RX_SIZE_NONTPA (max_t(u32, 10, MIN_RX_SIZE)) +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#define MIN_RX_AVAIL_OOO 40 +#endif + +/* dropless fc calculations for BDs + * + * Number of BDs should as number of buffers in BRB: + * Low threshold takes into account NEXT_PAGE_RX_DESC_CNT + * "next" elements on each page + */ +#define NUM_BD_REQ BRB_SIZE(bp) +#define NUM_BD_PG_REQ ((NUM_BD_REQ + MAX_RX_DESC_CNT - 1) / \ + MAX_RX_DESC_CNT) +#define BD_TH_LO(bp) (NUM_BD_REQ + \ + NUM_BD_PG_REQ * NEXT_PAGE_RX_DESC_CNT + \ + FW_DROP_LEVEL(bp)) +#define BD_TH_HI(bp) (BD_TH_LO(bp) + DROPLESS_FC_HEADROOM) + +#define MIN_RX_AVAIL ((bp)->dropless_fc ? BD_TH_HI(bp) + 128 : 128) + +#define MIN_RX_SIZE_TPA_HW (CHIP_IS_E1(bp) ? \ + ETH_MIN_RX_CQES_WITH_TPA_E1 : \ + ETH_MIN_RX_CQES_WITH_TPA_E1H_E2) +#define MIN_RX_SIZE_NONTPA_HW ETH_MIN_RX_CQES_WITHOUT_TPA +#define MIN_RX_SIZE_TPA (max_t(u32, MIN_RX_SIZE_TPA_HW, MIN_RX_AVAIL)) +#define MIN_RX_SIZE_NONTPA (max_t(u32, MIN_RX_SIZE_NONTPA_HW,\ + MIN_RX_AVAIL)) + #if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ #define INIT_JUMBO_RX_RING_SIZE (max_t(u32, (MAX_RX_AVAIL / 16), 512)) /* 512 */ #define INIT_RX_RING_SIZE (MAX_RX_AVAIL / 4) #endif #define NEXT_RX_IDX(x) ((((x) & RX_DESC_MASK) == \ - (MAX_RX_DESC_CNT - 1)) ? (x) + 3 : (x) + 1) + (MAX_RX_DESC_CNT - 1)) ? \ + (x) + 1 + NEXT_PAGE_RX_DESC_CNT : \ + (x) + 1) #define RX_BD(x) ((x) & MAX_RX_BD) -/* As long as CQE is 4 times bigger than BD entry we have to allocate - 4 times more pages for CQ ring in order to keep it balanced with - BD ring */ -#define NUM_RCQ_RINGS (NUM_RX_RINGS * 4) +/* + * As long as CQE is X times bigger than BD entry we have to allocate X times + * more pages for CQ ring in order to keep it balanced with BD ring + */ +#define CQE_BD_REL (sizeof(union eth_rx_cqe) / sizeof(struct eth_rx_bd)) +#define NUM_RCQ_RINGS (NUM_RX_RINGS * CQE_BD_REL) #define RCQ_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe)) -#define MAX_RCQ_DESC_CNT (RCQ_DESC_CNT - 1) +#define NEXT_PAGE_RCQ_DESC_CNT 1 +#define MAX_RCQ_DESC_CNT (RCQ_DESC_CNT - NEXT_PAGE_RCQ_DESC_CNT) #define NUM_RCQ_BD (RCQ_DESC_CNT * NUM_RCQ_RINGS) #define MAX_RCQ_BD (NUM_RCQ_BD - 1) #define MAX_RCQ_AVAIL (MAX_RCQ_DESC_CNT * NUM_RCQ_RINGS - 2) #define NEXT_RCQ_IDX(x) ((((x) & MAX_RCQ_DESC_CNT) == \ - (MAX_RCQ_DESC_CNT - 1)) ? (x) + 2 : (x) + 1) + (MAX_RCQ_DESC_CNT - 1)) ? \ + (x) + 1 + NEXT_PAGE_RCQ_DESC_CNT : \ + (x) + 1) #define RCQ_BD(x) ((x) & MAX_RCQ_BD) -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ +/* dropless fc calculations for RCQs + * + * Number of RCQs should be as number of buffers in BRB: + * Low threshold takes into account NEXT_PAGE_RCQ_DESC_CNT + * "next" elements on each page + */ +#define NUM_RCQ_REQ BRB_SIZE(bp) +#define NUM_RCQ_PG_REQ ((NUM_BD_REQ + MAX_RCQ_DESC_CNT - 1) / \ + MAX_RCQ_DESC_CNT) +#define RCQ_TH_LO(bp) (NUM_RCQ_REQ + \ + NUM_RCQ_PG_REQ * NEXT_PAGE_RCQ_DESC_CNT + \ + FW_DROP_LEVEL(bp)) +#define RCQ_TH_HI(bp) (RCQ_TH_LO(bp) + DROPLESS_FC_HEADROOM) + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ #define INIT_OOO_RING_SIZE (MAX_RCQ_DESC_CNT * NUM_RCQ_RINGS \ - MAX_SPQ_PENDING) -#else -/* The minimium number of entires in the OOO ring is 16. But having - * 40 entries should be enough for ESX */ -#define INIT_OOO_RING_SIZE 40 #endif - - /* This is needed for determining of last_max */ #define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) #define SUB_S32(a, b) (s32)((s32)(a) - (s32)(b)) @@ -845,13 +1003,11 @@ struct bnx2x_ioctl_req { /* stuff added to make the code fit 80Col */ - -#define CQE_TYPE(cqe_fp_flags) ((cqe_fp_flags) & ETH_FAST_PATH_RX_CQE_TYPE) - -#define TPA_TYPE_START ETH_FAST_PATH_RX_CQE_START_FLG -#define TPA_TYPE_END ETH_FAST_PATH_RX_CQE_END_FLG -#define TPA_TYPE(cqe_fp_flags) ((cqe_fp_flags) & \ - (TPA_TYPE_START | TPA_TYPE_END)) +#define CQE_TYPE(cqe_fp_flags) ((cqe_fp_flags) & ETH_FAST_PATH_RX_CQE_TYPE) +#define CQE_TYPE_START(cqe_type) ((cqe_type) == RX_ETH_CQE_TYPE_ETH_START_AGG) +#define CQE_TYPE_STOP(cqe_type) ((cqe_type) == RX_ETH_CQE_TYPE_ETH_STOP_AGG) +#define CQE_TYPE_SLOW(cqe_type) ((cqe_type) == RX_ETH_CQE_TYPE_ETH_RAMROD) +#define CQE_TYPE_FAST(cqe_type) ((cqe_type) == RX_ETH_CQE_TYPE_ETH_FASTPATH) #define ETH_RX_ERROR_FALGS ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG @@ -884,28 +1040,25 @@ struct bnx2x_ioctl_req { #define FP_CSB_FUNC_OFF \ offsetof(struct cstorm_status_block_c, func) -#define HC_INDEX_TOE_RX_CQ_CONS 0 /* Formerly Ustorm TOE CQ index */ - /* (HC_INDEX_U_TOE_RX_CQ_CONS) */ -#define HC_INDEX_ETH_RX_CQ_CONS 1 /* Formerly Ustorm ETH CQ index */ - /* (HC_INDEX_U_ETH_RX_CQ_CONS) */ -#define HC_INDEX_ETH_RX_BD_CONS 2 /* Formerly Ustorm ETH BD index */ - /* (HC_INDEX_U_ETH_RX_BD_CONS) */ +#define HC_INDEX_ETH_RX_CQ_CONS 1 -#define HC_INDEX_TOE_TX_CQ_CONS 4 /* Formerly Cstorm TOE CQ index */ - /* (HC_INDEX_C_TOE_TX_CQ_CONS) */ -#define HC_INDEX_ETH_TX_CQ_CONS 5 /* Formerly Cstorm ETH CQ index */ - /* (HC_INDEX_C_ETH_TX_CQ_CONS) */ +#define HC_INDEX_OOO_TX_CQ_CONS 4 -#define U_SB_ETH_RX_CQ_INDEX HC_INDEX_ETH_RX_CQ_CONS -#define U_SB_ETH_RX_BD_INDEX HC_INDEX_ETH_RX_BD_CONS -#define C_SB_ETH_TX_CQ_INDEX HC_INDEX_ETH_TX_CQ_CONS +#define HC_INDEX_ETH_TX_CQ_CONS_COS0 5 + +#define HC_INDEX_ETH_TX_CQ_CONS_COS1 6 + +#define HC_INDEX_ETH_TX_CQ_CONS_COS2 7 + +#define HC_INDEX_ETH_FIRST_TX_CQ_CONS HC_INDEX_ETH_TX_CQ_CONS_COS0 #define BNX2X_RX_SB_INDEX \ (&fp->sb_index_values[HC_INDEX_ETH_RX_CQ_CONS]) -#define BNX2X_TX_SB_INDEX \ - (&fp->sb_index_values[C_SB_ETH_TX_CQ_INDEX]) +#define BNX2X_TX_SB_INDEX_BASE BNX2X_TX_SB_INDEX_COS0 +#define BNX2X_TX_SB_INDEX_COS0 \ + (&fp->sb_index_values[HC_INDEX_ETH_TX_CQ_CONS_COS0]) /* end of fast path */ @@ -922,48 +1075,124 @@ struct bnx2x_common { #define CHIP_NUM_57711 0x164f #define CHIP_NUM_57711E 0x1650 #define CHIP_NUM_57712 0x1662 -#define CHIP_NUM_57712E 0x1663 -#define CHIP_NUM_57712VF 0x166f +#define CHIP_NUM_57712_MF 0x1663 +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define CHIP_NUM_57712_VF 0x166f +#endif #define CHIP_NUM_57713 0x1651 #define CHIP_NUM_57713E 0x1652 +#define CHIP_NUM_57800 0x168a +#define CHIP_NUM_57800_MF 0x16a5 +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define CHIP_NUM_57800_VF 0x16a9 +#endif +#define CHIP_NUM_57810 0x168e +#define CHIP_NUM_57810_MF 0x16ae +#define CHIP_NUM_57811 0x163d +#define CHIP_NUM_57811_MF 0x163e +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define CHIP_NUM_57810_VF 0x16af +#endif +#define CHIP_NUM_57840 0x168d +#define CHIP_NUM_57840_MF 0x16ab +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define CHIP_NUM_57840_VF 0x16ad +#endif #define CHIP_IS_E1(bp) (CHIP_NUM(bp) == CHIP_NUM_57710) #define CHIP_IS_57711(bp) (CHIP_NUM(bp) == CHIP_NUM_57711) #define CHIP_IS_57711E(bp) (CHIP_NUM(bp) == CHIP_NUM_57711E) #define CHIP_IS_57712(bp) (CHIP_NUM(bp) == CHIP_NUM_57712) -#define CHIP_IS_57712VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712VF) -#define CHIP_IS_57712E(bp) (CHIP_NUM(bp) == CHIP_NUM_57712E) -#define CHIP_IS_57713(bp) (CHIP_NUM(bp) == CHIP_NUM_57713) -#define CHIP_IS_57713E(bp) (CHIP_NUM(bp) == CHIP_NUM_57713E) +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define CHIP_IS_57712_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712_VF) +#endif +#define CHIP_IS_57712_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712_MF) +#define CHIP_IS_57800(bp) (CHIP_NUM(bp) == CHIP_NUM_57800) +#define CHIP_IS_57800_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_MF) +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define CHIP_IS_57800_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_VF) +#endif +#define CHIP_IS_57810(bp) (CHIP_NUM(bp) == CHIP_NUM_57810) +#define CHIP_IS_57810_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_MF) +#define CHIP_IS_57811(bp) (CHIP_NUM(bp) == CHIP_NUM_57811) +#define CHIP_IS_57811_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57811_MF) +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define CHIP_IS_57810_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_VF) +#endif +#define CHIP_IS_57840(bp) (CHIP_NUM(bp) == CHIP_NUM_57840) +#define CHIP_IS_57840_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57840_MF) +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define CHIP_IS_57840_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57840_VF) +#endif #define CHIP_IS_E1H(bp) (CHIP_IS_57711(bp) || \ CHIP_IS_57711E(bp)) +#ifdef BCM_VF /* not BNX2X_UPSTREAM */ #define CHIP_IS_E2(bp) (CHIP_IS_57712(bp) || \ - CHIP_IS_57712E(bp) || \ - CHIP_IS_57712VF(bp) || \ - CHIP_IS_57713(bp) || \ - CHIP_IS_57713E(bp)) + CHIP_IS_57712_MF(bp) || \ + CHIP_IS_57712_VF(bp)) +#define CHIP_IS_E3(bp) (CHIP_IS_57800(bp) || \ + CHIP_IS_57800_MF(bp) || \ + CHIP_IS_57800_VF(bp) || \ + CHIP_IS_57810(bp) || \ + CHIP_IS_57810_MF(bp) || \ + CHIP_IS_57810_VF(bp) || \ + CHIP_IS_57840(bp) || \ + CHIP_IS_57840_MF(bp) || \ + CHIP_IS_57811(bp) || \ + CHIP_IS_57811_MF(bp) || \ + CHIP_IS_57840_VF(bp)) +#else /* BNX2X_UPSTREAM */ +#define CHIP_IS_E2(bp) (CHIP_IS_57712(bp) || \ + CHIP_IS_57712_MF(bp)) +#define CHIP_IS_E3(bp) (CHIP_IS_57800(bp) || \ + CHIP_IS_57800_MF(bp) || \ + CHIP_IS_57810(bp) || \ + CHIP_IS_57810_MF(bp) || \ + CHIP_IS_57811(bp) || \ + CHIP_IS_57811_MF(bp) || \ + CHIP_IS_57840(bp) || \ + CHIP_IS_57840_MF(bp)) +#endif #define CHIP_IS_E1x(bp) (CHIP_IS_E1((bp)) || CHIP_IS_E1H((bp))) +#define USES_WARPCORE(bp) (CHIP_IS_E3(bp)) +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define IS_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712_VF || \ + CHIP_NUM(bp) == CHIP_NUM_57800_VF || \ + CHIP_NUM(bp) == CHIP_NUM_57810_VF || \ + CHIP_NUM(bp) == CHIP_NUM_57840_VF) +#define HAS_DSB(bp) (!IS_VF(bp)) +#endif +#define IS_E1H_OFFSET (!CHIP_IS_E1(bp)) -#define IS_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712VF) -#define HAS_DSB(bp) (!IS_VF(bp)) -#define IS_E1H_OFFSET (CHIP_IS_E1H(bp) || CHIP_IS_E2(bp)) - -#define CHIP_REV(bp) (bp->common.chip_id & 0x0000f000) -#define CHIP_REV_Ax 0x00000000 +#define CHIP_REV_SHIFT 12 +#define CHIP_REV_MASK (0xF << CHIP_REV_SHIFT) +#define CHIP_REV_VAL(bp) (bp->common.chip_id & CHIP_REV_MASK) +#define CHIP_REV_Ax (0x0 << CHIP_REV_SHIFT) +#define CHIP_REV_Bx (0x1 << CHIP_REV_SHIFT) /* assume maximum 5 revisions */ -#define CHIP_REV_IS_SLOW(bp) (CHIP_REV(bp) > 0x00005000) +#define CHIP_REV_IS_SLOW(bp) (CHIP_REV_VAL(bp) > 0x00005000) /* Emul versions are A=>0xe, B=>0xc, C=>0xa, D=>8, E=>6 */ #define CHIP_REV_IS_EMUL(bp) ((CHIP_REV_IS_SLOW(bp)) && \ - !(CHIP_REV(bp) & 0x00001000)) + !(CHIP_REV_VAL(bp) & 0x00001000)) /* FPGA versions are A=>0xf, B=>0xd, C=>0xb, D=>9, E=>7 */ #define CHIP_REV_IS_FPGA(bp) ((CHIP_REV_IS_SLOW(bp)) && \ - (CHIP_REV(bp) & 0x00001000)) + (CHIP_REV_VAL(bp) & 0x00001000)) #define CHIP_TIME(bp) ((CHIP_REV_IS_EMUL(bp)) ? 2000 : \ ((CHIP_REV_IS_FPGA(bp)) ? 200 : 1)) #define CHIP_METAL(bp) (bp->common.chip_id & 0x00000ff0) #define CHIP_BOND_ID(bp) (bp->common.chip_id & 0x0000000f) +#define CHIP_REV_SIM(bp) (((CHIP_REV_MASK - CHIP_REV_VAL(bp)) >>\ + (CHIP_REV_SHIFT + 1)) \ + << CHIP_REV_SHIFT) +#define CHIP_REV(bp) (CHIP_REV_IS_SLOW(bp) ? \ + CHIP_REV_SIM(bp) :\ + CHIP_REV_VAL(bp)) +#define CHIP_IS_E3B0(bp) (CHIP_IS_E3(bp) && \ + (CHIP_REV(bp) == CHIP_REV_Bx)) +#define CHIP_IS_E3A0(bp) (CHIP_IS_E3(bp) && \ + (CHIP_REV(bp) == CHIP_REV_Ax)) int flash_size; #define BNX2X_NVRAM_1MB_SIZE 0x20000 /* 1M bit in bytes */ @@ -984,8 +1213,8 @@ struct bnx2x_common { #define INT_BLOCK_IGU 1 #define INT_BLOCK_MODE_NORMAL 0 #define INT_BLOCK_MODE_BW_COMP 2 -#define CHIP_INT_MODE_IS_NBC(bp) \ - (CHIP_IS_E2(bp) && \ +#define CHIP_INT_MODE_IS_NBC(bp) \ + (!CHIP_IS_E1x(bp) && \ !((bp)->common.int_block & INT_BLOCK_MODE_BW_COMP)) #define CHIP_INT_MODE_IS_BC(bp) (!CHIP_INT_MODE_IS_NBC(bp)) @@ -995,37 +1224,20 @@ struct bnx2x_common { #define CHIP_PORT_MODE_NONE 0x2 #define CHIP_MODE(bp) (bp->common.chip_port_mode) #define CHIP_MODE_IS_4_PORT(bp) (CHIP_MODE(bp) == CHIP_4_PORT_MODE) + + u32 boot_mode; }; /* IGU MSIX STATISTICS on 57712: 64 for VFs; 4 for PFs; 4 for Attentions */ #define BNX2X_IGU_STAS_MSG_VF_CNT 64 #define BNX2X_IGU_STAS_MSG_PF_CNT 4 +#define MAX_IGU_ATTN_ACK_TO 100 /* end of common */ +#ifndef BYPASS_APP /* BNX2X_UPSTREAM */ /* port */ -struct nig_stats { - u32 brb_discard; - u32 brb_packet; - u32 brb_truncate; - u32 flow_ctrl_discard; - u32 flow_ctrl_octets; - u32 flow_ctrl_packet; - u32 mng_discard; - u32 mng_octet_inp; - u32 mng_octet_out; - u32 mng_packet_inp; - u32 mng_packet_out; - u32 pbf_octets; - u32 pbf_packet; - u32 safc_inp; - u32 egress_mac_pkt0_lo; - u32 egress_mac_pkt0_hi; - u32 egress_mac_pkt1_lo; - u32 egress_mac_pkt1_hi; -}; - struct bnx2x_port { u32 pmf; @@ -1052,279 +1264,24 @@ struct bnx2x_port { /* end of port */ -/**************************************************************************** -* Statistics Macros -****************************************************************************/ - -/* sum[hi:lo] += add[hi:lo] */ -#define ADD_64(s_hi, a_hi, s_lo, a_lo) \ - do { \ - s_lo += a_lo; \ - s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \ - } while (0) - -/* difference = minuend - subtrahend */ -#define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \ - do { \ - if (m_lo < s_lo) { \ - /* underflow */ \ - d_hi = m_hi - s_hi; \ - if (d_hi > 0) { \ - /* we can 'loan' 1 */ \ - d_hi--; \ - d_lo = m_lo + (UINT_MAX - s_lo) + 1; \ - } else { \ - /* m_hi <= s_hi */ \ - d_hi = 0; \ - d_lo = 0; \ - } \ - } else { \ - /* m_lo >= s_lo */ \ - if (m_hi < s_hi) { \ - d_hi = 0; \ - d_lo = 0; \ - } else { \ - /* m_hi >= s_hi */ \ - d_hi = m_hi - s_hi; \ - d_lo = m_lo - s_lo; \ - } \ - } \ - } while (0) - -#define UPDATE_STAT64(s, t) \ - do { \ - DIFF_64(diff.hi, new->s##_hi, pstats->mac_stx[0].t##_hi, \ - diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \ - pstats->mac_stx[0].t##_hi = new->s##_hi; \ - pstats->mac_stx[0].t##_lo = new->s##_lo; \ - ADD_64(pstats->mac_stx[1].t##_hi, diff.hi, \ - pstats->mac_stx[1].t##_lo, diff.lo); \ - } while (0) - -#define UPDATE_STAT64_NIG(s, t) \ - do { \ - DIFF_64(diff.hi, new->s##_hi, old->s##_hi, \ - diff.lo, new->s##_lo, old->s##_lo); \ - ADD_64(estats->t##_hi, diff.hi, \ - estats->t##_lo, diff.lo); \ - } while (0) - -/* sum[hi:lo] += add */ -#define ADD_EXTEND_64(s_hi, s_lo, a) \ - do { \ - s_lo += a; \ - s_hi += (s_lo < a) ? 1 : 0; \ - } while (0) - -#define UPDATE_EXTEND_STAT(s) \ - do { \ - ADD_EXTEND_64(pstats->mac_stx[1].s##_hi, \ - pstats->mac_stx[1].s##_lo, \ - new->s); \ - } while (0) - -#define UPDATE_EXTEND_TSTAT(s, t) \ - do { \ - diff = le32_to_cpu(tclient->s) - le32_to_cpu(old_tclient->s); \ - old_tclient->s = tclient->s; \ - ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ - } while (0) - -#define UPDATE_EXTEND_USTAT(s, t) \ - do { \ - diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \ - old_uclient->s = uclient->s; \ - ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ - } while (0) - -#define UPDATE_EXTEND_XSTAT(s, t) \ - do { \ - diff = le32_to_cpu(xclient->s) - le32_to_cpu(old_xclient->s); \ - old_xclient->s = xclient->s; \ - ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ - } while (0) - -/* minuend -= subtrahend */ -#define SUB_64(m_hi, s_hi, m_lo, s_lo) \ - do { \ - DIFF_64(m_hi, m_hi, s_hi, m_lo, m_lo, s_lo); \ - } while (0) - -/* minuend[hi:lo] -= subtrahend */ -#define SUB_EXTEND_64(m_hi, m_lo, s) \ - do { \ - SUB_64(m_hi, 0, m_lo, s); \ - } while (0) - -#define SUB_EXTEND_USTAT(s, t) \ - do { \ - diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \ - SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ - } while (0) - - -enum bnx2x_stats_event { - STATS_EVENT_PMF = 0, - STATS_EVENT_LINK_UP, - STATS_EVENT_UPDATE, - STATS_EVENT_STOP, - STATS_EVENT_MAX -}; - -enum bnx2x_stats_state { - STATS_STATE_DISABLED = 0, - STATS_STATE_ENABLED, - STATS_STATE_MAX -}; - -struct bnx2x_eth_stats { - u32 total_bytes_received_hi; - u32 total_bytes_received_lo; - u32 total_bytes_transmitted_hi; - u32 total_bytes_transmitted_lo; - u32 total_unicast_packets_received_hi; - u32 total_unicast_packets_received_lo; - u32 total_multicast_packets_received_hi; - u32 total_multicast_packets_received_lo; - u32 total_broadcast_packets_received_hi; - u32 total_broadcast_packets_received_lo; - u32 total_unicast_packets_transmitted_hi; - u32 total_unicast_packets_transmitted_lo; - u32 total_multicast_packets_transmitted_hi; - u32 total_multicast_packets_transmitted_lo; - u32 total_broadcast_packets_transmitted_hi; - u32 total_broadcast_packets_transmitted_lo; - u32 valid_bytes_received_hi; - u32 valid_bytes_received_lo; - - u32 error_bytes_received_hi; - u32 error_bytes_received_lo; - u32 etherstatsoverrsizepkts_hi; - u32 etherstatsoverrsizepkts_lo; - u32 no_buff_discard_hi; - u32 no_buff_discard_lo; - - u32 rx_stat_ifhcinbadoctets_hi; - u32 rx_stat_ifhcinbadoctets_lo; - u32 tx_stat_ifhcoutbadoctets_hi; - u32 tx_stat_ifhcoutbadoctets_lo; - u32 rx_stat_dot3statsfcserrors_hi; - u32 rx_stat_dot3statsfcserrors_lo; - u32 rx_stat_dot3statsalignmenterrors_hi; - u32 rx_stat_dot3statsalignmenterrors_lo; - u32 rx_stat_dot3statscarriersenseerrors_hi; - u32 rx_stat_dot3statscarriersenseerrors_lo; - u32 rx_stat_falsecarriererrors_hi; - u32 rx_stat_falsecarriererrors_lo; - u32 rx_stat_etherstatsundersizepkts_hi; - u32 rx_stat_etherstatsundersizepkts_lo; - u32 rx_stat_dot3statsframestoolong_hi; - u32 rx_stat_dot3statsframestoolong_lo; - u32 rx_stat_etherstatsfragments_hi; - u32 rx_stat_etherstatsfragments_lo; - u32 rx_stat_etherstatsjabbers_hi; - u32 rx_stat_etherstatsjabbers_lo; - u32 rx_stat_maccontrolframesreceived_hi; - u32 rx_stat_maccontrolframesreceived_lo; - u32 rx_stat_bmac_xpf_hi; - u32 rx_stat_bmac_xpf_lo; - u32 rx_stat_bmac_xcf_hi; - u32 rx_stat_bmac_xcf_lo; - u32 rx_stat_xoffstateentered_hi; - u32 rx_stat_xoffstateentered_lo; - u32 rx_stat_xonpauseframesreceived_hi; - u32 rx_stat_xonpauseframesreceived_lo; - u32 rx_stat_xoffpauseframesreceived_hi; - u32 rx_stat_xoffpauseframesreceived_lo; - u32 tx_stat_outxonsent_hi; - u32 tx_stat_outxonsent_lo; - u32 tx_stat_outxoffsent_hi; - u32 tx_stat_outxoffsent_lo; - u32 tx_stat_flowcontroldone_hi; - u32 tx_stat_flowcontroldone_lo; - u32 tx_stat_etherstatscollisions_hi; - u32 tx_stat_etherstatscollisions_lo; - u32 tx_stat_dot3statssinglecollisionframes_hi; - u32 tx_stat_dot3statssinglecollisionframes_lo; - u32 tx_stat_dot3statsmultiplecollisionframes_hi; - u32 tx_stat_dot3statsmultiplecollisionframes_lo; - u32 tx_stat_dot3statsdeferredtransmissions_hi; - u32 tx_stat_dot3statsdeferredtransmissions_lo; - u32 tx_stat_dot3statsexcessivecollisions_hi; - u32 tx_stat_dot3statsexcessivecollisions_lo; - u32 tx_stat_dot3statslatecollisions_hi; - u32 tx_stat_dot3statslatecollisions_lo; - u32 tx_stat_etherstatspkts64octets_hi; - u32 tx_stat_etherstatspkts64octets_lo; - u32 tx_stat_etherstatspkts65octetsto127octets_hi; - u32 tx_stat_etherstatspkts65octetsto127octets_lo; - u32 tx_stat_etherstatspkts128octetsto255octets_hi; - u32 tx_stat_etherstatspkts128octetsto255octets_lo; - u32 tx_stat_etherstatspkts256octetsto511octets_hi; - u32 tx_stat_etherstatspkts256octetsto511octets_lo; - u32 tx_stat_etherstatspkts512octetsto1023octets_hi; - u32 tx_stat_etherstatspkts512octetsto1023octets_lo; - u32 tx_stat_etherstatspkts1024octetsto1522octets_hi; - u32 tx_stat_etherstatspkts1024octetsto1522octets_lo; - u32 tx_stat_etherstatspktsover1522octets_hi; - u32 tx_stat_etherstatspktsover1522octets_lo; - u32 tx_stat_bmac_2047_hi; - u32 tx_stat_bmac_2047_lo; - u32 tx_stat_bmac_4095_hi; - u32 tx_stat_bmac_4095_lo; - u32 tx_stat_bmac_9216_hi; - u32 tx_stat_bmac_9216_lo; - u32 tx_stat_bmac_16383_hi; - u32 tx_stat_bmac_16383_lo; - u32 tx_stat_dot3statsinternalmactransmiterrors_hi; - u32 tx_stat_dot3statsinternalmactransmiterrors_lo; - u32 tx_stat_bmac_ufl_hi; - u32 tx_stat_bmac_ufl_lo; - - u32 pause_frames_received_hi; - u32 pause_frames_received_lo; - u32 pause_frames_sent_hi; - u32 pause_frames_sent_lo; - - u32 etherstatspkts1024octetsto1522octets_hi; - u32 etherstatspkts1024octetsto1522octets_lo; - u32 etherstatspktsover1522octets_hi; - u32 etherstatspktsover1522octets_lo; - - u32 brb_drop_hi; - u32 brb_drop_lo; - u32 brb_truncate_hi; - u32 brb_truncate_lo; - - u32 mac_filter_discard; - u32 outer_vlan_discard; - u32 brb_truncate_discard; - u32 mac_discard; - - u32 driver_xoff; - u32 rx_err_discard_pkt; - u32 rx_skb_alloc_failed; - u32 hw_csum_err; - - u32 nig_timer_max; -}; - #define STATS_OFFSET32(stat_name) \ (offsetof(struct bnx2x_eth_stats, stat_name) / 4) /* slow path */ -/* sriov */ +/* slow path work-queue */ +extern struct workqueue_struct *bnx2x_wq; + #define BNX2X_MAX_NUM_OF_VFS 64 +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +/* sriov */ #define BNX2X_VF_CID_WND 0 #define BNX2X_CIDS_PER_VF (1 << BNX2X_VF_CID_WND) #define BNX2X_FIRST_VF_CID 64 #define BNX2X_VF_CIDS (BNX2X_MAX_NUM_OF_VFS * BNX2X_CIDS_PER_VF) +#endif #define BNX2X_VF_ID_INVALID 0xFF - - - /* * The total number of L2 queues, MSIX vectors and HW contexts (CIDs) is * control by the number of fast-path status blocks supported by the @@ -1352,47 +1309,27 @@ struct bnx2x_eth_stats { /* fast-path interrupt contexts E2 */ #define FP_SB_MAX_E2 HC_SB_MAX_SB_E2 -/* - * cid_cnt paramter below refers to the value returned by - * 'bnx2x_get_l2_cid_count()' routine - */ - -/* - * The number of FP context allocated by the driver == max number of regular - * L2 queues + 1 for the FCoE L2 queue - */ -#define L2_FP_COUNT(cid_cnt) ((cid_cnt) - FCOE_CONTEXT_USE) - -/* - * The number of FP-SB allocated by the driver == max number of regular L2 - * queues + 1 for the CNIC which also consumes an FP-SB - */ -#define FP_SB_COUNT(cid_cnt) ((cid_cnt) - CNIC_CONTEXT_USE) -#define NUM_IGU_SB_REQUIRED(cid_cnt) \ - (FP_SB_COUNT(cid_cnt) - NONE_ETH_CONTEXT_USE) - union cdu_context { struct eth_context eth; char pad[1024]; }; /* CDU host DB constants */ -#define CDU_ILT_PAGE_SZ_HW 3 -#define CDU_ILT_PAGE_SZ (4096 << CDU_ILT_PAGE_SZ_HW) /* 32K */ +#define CDU_ILT_PAGE_SZ_HW 2 +#define CDU_ILT_PAGE_SZ (8192 << CDU_ILT_PAGE_SZ_HW) /* 32K */ #define ILT_PAGE_CIDS (CDU_ILT_PAGE_SZ / sizeof(union cdu_context)) #ifdef BCM_CNIC #define CNIC_ISCSI_CID_MAX 256 #define CNIC_FCOE_CID_MAX 2048 #define CNIC_CID_MAX (CNIC_ISCSI_CID_MAX + CNIC_FCOE_CID_MAX) -#define CNIC_ILT_LINES DIV_ROUND_UP(CNIC_CID_MAX, ILT_PAGE_CIDS) +#define CNIC_ILT_LINES DIV_ROUND_UP(CNIC_CID_MAX, ILT_PAGE_CIDS) #endif #define QM_ILT_PAGE_SZ_HW 0 #define QM_ILT_PAGE_SZ (4096 << QM_ILT_PAGE_SZ_HW) /* 4K */ #define QM_CID_ROUND 1024 - #ifdef BCM_CNIC /* TM (timers) host DB constants */ #define TM_ILT_PAGE_SZ_HW 0 @@ -1400,7 +1337,7 @@ union cdu_context { /* #define TM_CONN_NUM (CNIC_STARTING_CID+CNIC_ISCSI_CXT_MAX) */ #define TM_CONN_NUM 1024 #define TM_ILT_SZ (8 * TM_CONN_NUM) -#define TM_ILT_LINES DIV_ROUND_UP(TM_ILT_SZ, TM_ILT_PAGE_SZ) +#define TM_ILT_LINES DIV_ROUND_UP(TM_ILT_SZ, TM_ILT_PAGE_SZ) /* SRC (Searcher) host DB constants */ #define SRC_ILT_PAGE_SZ_HW 0 @@ -1409,7 +1346,7 @@ union cdu_context { #define SRC_CONN_NUM (1 << SRC_HASH_BITS) /* 1024 */ #define SRC_ILT_SZ (sizeof(struct src_ent) * SRC_CONN_NUM) #define SRC_T2_SZ SRC_ILT_SZ -#define SRC_ILT_LINES DIV_ROUND_UP(SRC_ILT_SZ, SRC_ILT_PAGE_SZ) +#define SRC_ILT_LINES DIV_ROUND_UP(SRC_ILT_SZ, SRC_ILT_PAGE_SZ) #if (SRC_CONN_NUM < CNIC_ISCSI_CID_MAX) /* ! BNX2X_UPSTREAM */ #error "Searcher tables are too small" @@ -1425,9 +1362,11 @@ struct bnx2x_slowpath { struct eth_classify_rules_ramrod_data e2; } mac_rdata; +#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ union { struct eth_classify_rules_ramrod_data e2; } vlan_rdata; +#endif union { struct tstorm_eth_mac_filter_config e1x; @@ -1439,20 +1378,47 @@ struct bnx2x_slowpath { struct eth_multicast_rules_ramrod_data e2; } mcast_rdata; - union { - struct eth_rss_update_ramrod_data_e1x e1x; - struct eth_rss_update_ramrod_data_e2 e2; - } rss_rdata; + struct eth_rss_update_ramrod_data rss_rdata; - /* Client State related ramrods are always sent under rtnl_lock */ + /* Queue State related ramrods are always sent under rtnl_lock */ union { struct client_init_ramrod_data init_data; struct client_update_ramrod_data update_data; - } client_data; + } q_rdata; - /* used for tx switching VM macs */ - struct eth_classify_rules_ramrod_data tx_switch_mac_rdata; + union { + struct function_start_data func_start; + /* pfc configuration for DCBX ramrod */ + struct flow_control_configuration pfc_config; + } func_rdata; + /* afex ramrod can not be a part of func_rdata union because these + * events might arrive in parallel to other events from func_rdata. + * Therefore, if they would have been defined in the same union, + * data can get coruupted. + */ + struct afex_vif_list_ramrod_data func_afex_rdata; + +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + /* + * To simplify the slow path flows we will use a separate ramrod + * data buffers for a bypass RSS group + */ + struct { + union { + struct mac_configuration_cmd e1x; + struct eth_classify_rules_ramrod_data e2; + } mac_rdata; + + union { + struct tstorm_eth_mac_filter_config e1x; + struct eth_filter_rules_ramrod_data e2; + } rx_mode_rdata; + + struct eth_rss_update_ramrod_data rss_rdata; + } bypass_sp_data; + +#endif /* used by dmae command executer */ struct dmae_command dmae[MAX_DMAE_C]; @@ -1461,12 +1427,11 @@ struct bnx2x_slowpath { struct nig_stats nig_stats; struct host_port_stats port_stats; struct host_func_stats func_stats; - struct host_func_stats func_stats_base; u32 wb_comp; u32 wb_data[4]; - /* pfc configuration for DCBX ramrod */ - struct flow_control_configuration pfc_config; + + union drv_info_to_mcp drv_info_to_mcp; }; #define bnx2x_sp(bp, var) (&bp->slowpath->var) @@ -1505,15 +1470,18 @@ struct bnx2x_ilt; struct bnx2x_vfdb; #endif -typedef enum { +enum bnx2x_recovery_state { BNX2X_RECOVERY_DONE, BNX2X_RECOVERY_INIT, BNX2X_RECOVERY_WAIT, -} bnx2x_recovery_state_t; + BNX2X_RECOVERY_FAILED, + BNX2X_RECOVERY_NIC_LOADING +}; - -/* Event queue (EQ or event ring) MC hsi - NUM_EQ_PAGES and EQ_DESC_CNT_PAGE must powers of 2 */ +/* + * Event queue (EQ or event ring) MC hsi + * NUM_EQ_PAGES and EQ_DESC_CNT_PAGE must be power of 2 + */ #define NUM_EQ_PAGES 1 #define EQ_DESC_CNT_PAGE (BCM_PAGE_SIZE / sizeof(union event_ring_elem)) #define EQ_DESC_MAX_PAGE (EQ_DESC_CNT_PAGE - 1) @@ -1551,19 +1519,45 @@ enum { enum { BNX2X_PORT_QUERY_IDX, BNX2X_PF_QUERY_IDX, + BNX2X_FCOE_QUERY_IDX, BNX2X_FIRST_QUEUE_QUERY_IDX, }; struct bnx2x_fw_stats_req { struct stats_query_header hdr; - struct stats_query_entry query[STATS_QUERY_CMD_COUNT]; + struct stats_query_entry query[FP_SB_MAX_E1x+ + BNX2X_FIRST_QUEUE_QUERY_IDX]; }; struct bnx2x_fw_stats_data { - struct stats_counter storm_counters; - struct per_port_stats port; - struct per_pf_stats pf; - struct per_queue_stats queue_stats[1]; + struct stats_counter storm_counters; + struct per_port_stats port; + struct per_pf_stats pf; + struct fcoe_statistics_params fcoe; + struct per_queue_stats queue_stats[1]; +}; + +/* Public slow path states */ +enum { + BNX2X_SP_RTNL_SETUP_TC, + BNX2X_SP_RTNL_TX_TIMEOUT, + BNX2X_SP_RTNL_AFEX_F_UPDATE, + BNX2X_SP_RTNL_FAN_FAILURE, +}; + +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ +enum bnx2x_bypass_state { + BNX2X_BYPASS_DISABLED, + BNX2X_BYPASS_QUEUES_STOPPED, + BNX2X_BYPASS_ACTIVE, +}; +#endif + +struct bnx2x_prev_path_list { + u8 bus; + u8 slot; + u8 path; + struct list_head list; }; struct bnx2x { @@ -1571,49 +1565,70 @@ struct bnx2x { * are grouped together in the beginning of the structure */ struct bnx2x_fastpath *fp; + struct bnx2x_fp_txdata *bnx2x_txq; + int bnx2x_txq_size; void __iomem *regview; void __iomem *doorbells; - u16 db_size; + u16 db_size; -#define VF2PF_MBOX_SIZE (sizeof(union vf_pf_msg) + \ + u8 pf_num; /* absolute PF number */ + u8 pfid; /* per-path PF number */ + int base_fw_ndsb; /**/ +#define BP_PATH(bp) (CHIP_IS_E1x(bp) ? 0 : (bp->pf_num & 1)) +#define BP_PORT(bp) (bp->pfid & 1) +#define BP_FUNC(bp) (bp->pfid) +#define BP_ABS_FUNC(bp) (bp->pf_num) +#define BP_VN(bp) ((bp)->pfid >> 1) +#define BP_MAX_VN_NUM(bp) (CHIP_MODE_IS_4_PORT(bp) ? 2 : 4) +#define BP_L_ID(bp) (BP_VN(bp) << 2) +#define BP_FW_MB_IDX_VN(bp, vn) (BP_PORT(bp) +\ + (vn) * ((CHIP_IS_E1x(bp) || (CHIP_MODE_IS_4_PORT(bp))) ? 2 : 1)) +#define BP_FW_MB_IDX(bp) BP_FW_MB_IDX_VN(bp, BP_VN(bp)) + +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ +#define VF2PF_MBOX_SIZE (sizeof(union vf_pf_msg) + \ sizeof(union pf_vf_msg)) - /* General mail box plus aquire response buffer at the end */ - void *vf2pf_mbox; - dma_addr_t vf2pf_mbox_mapping; + /* General mail box plus acquire response buffer at the end */ + void *vf2pf_mbox; + dma_addr_t vf2pf_mbox_mapping; struct pf_vf_msg_acquire_resp *aquire_resp; - +#endif struct net_device *dev; +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + struct net_device *cnadev; + struct vlan_group *cna_vlgrp; +#endif struct pci_dev *pdev; - struct iro *iro_arr; + const struct iro *iro_arr; #define IRO (bp->iro_arr) - atomic_t intr_sem; - bnx2x_recovery_state_t recovery_state; - int is_leader; + enum bnx2x_recovery_state recovery_state; + int is_leader; struct msix_entry *msix_table; -#define INT_MODE_INTx 1 -#define INT_MODE_MSI 2 int tx_ring_size; - -#ifdef BCM_VLAN +#if (LINUX_VERSION_CODE < 0x020625) /* ! BNX2X_UPSTREAM */ struct vlan_group *vlgrp; #endif +#if (LINUX_VERSION_CODE < 0x020627) /* ! BNX2X_UPSTREAM */ u32 rx_csum; - u32 rx_buf_size; +#endif /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */ #define ETH_OVREHEAD (ETH_HLEN + 8 + 8) #define ETH_MIN_PACKET_SIZE 60 #define ETH_MAX_PACKET_SIZE 1500 #define ETH_MAX_JUMBO_PACKET_SIZE 9600 +/* TCP with Timestamp Option (32) + IPv6 (40) */ +#define ETH_MAX_TPA_HEADER_SIZE 72 /* Max supported alignment is 256 (8 shift) */ #define BNX2X_RX_ALIGN_SHIFT ((L1_CACHE_SHIFT < 8) ? \ L1_CACHE_SHIFT : 8) -#define BNX2X_RX_ALIGN (1 << BNX2X_RX_ALIGN_SHIFT) + /* FW use 2 Cache lines Alignment for start packet and size */ +#define BNX2X_FW_RX_ALIGN (2 << BNX2X_RX_ALIGN_SHIFT) #define BNX2X_PXP_DRAM_ALIGN (BNX2X_RX_ALIGN_SHIFT - 5) struct host_sp_status_block *def_status_blk; @@ -1631,7 +1646,7 @@ struct bnx2x { struct eth_spe *spq_prod_bd; struct eth_spe *spq_last_bd; __le16 *dsb_sp_prod; - atomic_t spq_left; /* serialize spq */ + atomic_t cq_spq_left; /* ETH_XXX ramrods credit */ /* used to synchronize spq accesses */ spinlock_t spq_lock; @@ -1641,9 +1656,12 @@ struct bnx2x { u16 eq_prod; u16 eq_cons; __le16 *eq_cons_sb; + atomic_t eq_spq_left; /* COMMON_XXX ramrods credit */ #ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ + u16 number_of_mac_filters; + /* n queues allocated */ u16 n_rx_queues_allocated; u16 n_tx_queues_allocated; @@ -1672,39 +1690,29 @@ struct bnx2x { #define USING_MSI_FLAG (1 << 6) #define DISABLE_MSI_FLAG (1 << 7) #define TPA_ENABLE_FLAG (1 << 8) -#define NO_MCP_FLAG (1 << 9) +#define NO_MCP_FLAG (1 << 9) #define BP_NOMCP(bp) (bp->flags & NO_MCP_FLAG) -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ -#define SAFC_TX_FLAG (1 << 10) +#define GRO_ENABLE_FLAG (1 << 10) +#define MF_FUNC_DIS (1 << 11) +#define OWN_CNIC_IRQ (1 << 12) +#define NO_ISCSI_OOO_FLAG (1 << 13) +#define NO_ISCSI_FLAG (1 << 14) +#define NO_FCOE_FLAG (1 << 15) +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ +#define CNA_ENABLED (1 << 16) #endif -#define HW_VLAN_TX_FLAG (1 << 11) -#define HW_VLAN_RX_FLAG (1 << 12) -#define MF_FUNC_DIS (1 << 13) -#define OWN_CNIC_IRQ (1 << 14) -#define FCOE_MACS_SET (1 << 15) -#define NO_ISCSI_OOO_FLAG (1 << 16) -#define NO_FCOE_FLAG (1 << 17) +#define BC_SUPPORTS_PFC_STATS (1 << 17) +#define TX_SWITCHING (1 << 18) +#define BC_SUPPORTS_FCOE_FEATURES (1 << 19) +#define USING_SINGLE_MSIX_FLAG (1 << 20) +#define OWN_CNIC_INTA_FLAG (1 << 21) +#define NO_ISCSI(bp) ((bp)->flags & NO_ISCSI_FLAG) #define NO_ISCSI_OOO(bp) ((bp)->flags & NO_ISCSI_OOO_FLAG) #define NO_FCOE(bp) ((bp)->flags & NO_FCOE_FLAG) - int pf_num; /* absolute PF number */ - int pfid; /* per-path PF number */ - int base_fw_ndsb; /**/ -#define BP_PATH(bp) (!CHIP_IS_E2(bp) ? 0 : (bp->pf_num & 1)) -#define BP_PORT(bp) (bp->pfid & 1) -#define BP_FUNC(bp) (bp->pfid) -#define BP_ABS_FUNC(bp) (bp->pf_num) -#define BP_E1HVN(bp) (bp->pfid >> 1) -#define BP_VN(bp) (CHIP_MODE_IS_4_PORT(bp) ? 0:\ - BP_E1HVN(bp)) -#define BP_L_ID(bp) (BP_E1HVN(bp) << 2) -#define BP_FW_MB_IDX(bp) (BP_PORT(bp) +\ - BP_VN(bp) * (CHIP_IS_E1x(bp) ? 2 : 1)) - int pm_cap; - int pcie_cap; int mrrs; #if (LINUX_VERSION_CODE >= 0x020614) || (defined(__VMKLNX__)) /* BNX2X_UPSTREAM */ @@ -1713,9 +1721,15 @@ struct bnx2x { struct work_struct sp_task; #endif #if (LINUX_VERSION_CODE >= 0x020614) || (defined(__VMKLNX__)) /* BNX2X_UPSTREAM */ - struct delayed_work reset_task; + struct delayed_work sp_rtnl_task; #else - struct work_struct reset_task; + struct work_struct sp_rtnl_task; +#endif + +#if (LINUX_VERSION_CODE >= 0x020614) || (defined(__VMKLNX__)) /* BNX2X_UPSTREAM */ + struct delayed_work period_task; +#else + struct work_struct period_task; #endif struct timer_list timer; int current_interval; @@ -1734,18 +1748,17 @@ struct bnx2x { struct bnx2x_common common; struct bnx2x_port port; - struct cmng_struct_per_port cmng; - u32 vn_weight_sum; -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - u32 cos_weight_sum; -#endif + struct cmng_init cmng; + u32 mf_config[E1HVN_MAX]; - u32 mf2_config[E2_FUNC_MAX]; + u32 mf_ext_config; + u32 path_has_ovlan; /* E3 */ u16 mf_ov; u8 mf_mode; #define IS_MF(bp) (bp->mf_mode != 0) #define IS_MF_SI(bp) (bp->mf_mode == MULTI_FUNCTION_SI) #define IS_MF_SD(bp) (bp->mf_mode == MULTI_FUNCTION_SD) +#define IS_MF_AFEX(bp) (bp->mf_mode == MULTI_FUNCTION_AFEX) u8 wol; @@ -1772,32 +1785,14 @@ struct bnx2x { #define BNX2X_STATE_OPEN 0x3000 #define BNX2X_STATE_CLOSING_WAIT4_HALT 0x4000 #define BNX2X_STATE_CLOSING_WAIT4_DELETE 0x5000 -#define BNX2X_STATE_CLOSING_WAIT4_UNLOAD 0x6000 -#define BNX2X_STATE_FUNC_STARTED 0x7000 #define BNX2X_STATE_DIAG 0xe000 #define BNX2X_STATE_ERROR 0xf000 - int multi_mode; -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ -#define BNX2X_MAX_PRIORITY 8 -#define BNX2X_MAX_ENTRIES_PER_PRI 16 -#define BNX2X_MAX_COS 3 -#define BNX2X_MAX_TX_COS 2 - /* priority to cos mapping */ - u8 pri_map[BNX2X_MAX_PRIORITY]; - /* number of queues per cos */ - u8 qs_per_cos[BNX2X_MAX_COS]; - /* min rate per cos */ - u16 cos_min_rate[BNX2X_MAX_COS]; - /* cos to queue mapping */ - u8 cos_map[BNX2X_MAX_COS]; -#endif - int num_queues; -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ -#define BNX2X_COS_QUEUES(cos) ((qs_per_cos & (0xff << cos*8)) >> cos*8) -#define BNX2X_COS_RATE(cos) ((cos_min_rate & (0xff << cos*8)) >> cos*8) -#endif + uint num_queues; + /* The number of queues to whom MSI-X vector and napi was allocated */ + uint init_num_queues; + int disable_tpa; u32 rx_mode; #define BNX2X_RX_MODE_NONE 0 @@ -1805,11 +1800,11 @@ struct bnx2x { #define BNX2X_RX_MODE_ALLMULTI 2 #define BNX2X_RX_MODE_PROMISC 3 #define BNX2X_MAX_MULTICAST 64 -#define BNX2X_MAX_EMUL_MULTI 16 u8 igu_dsb_id; u8 igu_base_sb; u8 igu_sb_cnt; + dma_addr_t def_status_blk_mapping; struct bnx2x_slowpath *slowpath; @@ -1818,38 +1813,56 @@ struct bnx2x { /* Total number of FW statistics requests */ u8 fw_stats_num; - /* This is a memory buffer that will contain both statistics + /* + * This is a memory buffer that will contain both statistics * ramrod request and data. */ - void *fw_stats; + void *fw_stats; dma_addr_t fw_stats_mapping; - /* FW statistics request shortcut (points at the + /* + * FW statistics request shortcut (points at the * beginning of fw_stats buffer). */ struct bnx2x_fw_stats_req *fw_stats_req; dma_addr_t fw_stats_req_mapping; int fw_stats_req_sz; - /* FW statistics data shortcut (points at the begining of + /* + * FW statistics data shortcut (points at the beginning of * fw_stats buffer + fw_stats_req_sz). */ struct bnx2x_fw_stats_data *fw_stats_data; dma_addr_t fw_stats_data_mapping; int fw_stats_data_sz; - struct hw_context context; + /* For max 196 cids (64*3 + non-eth), 32KB ILT page size and 1KB + * context size we need 8 ILT entries. + */ +#define ILT_MAX_L2_LINES 8 + struct hw_context context[ILT_MAX_L2_LINES]; - struct bnx2x_ilt *ilt; + struct bnx2x_ilt *ilt; #define BP_ILT(bp) ((bp)->ilt) #define ILT_MAX_LINES 256 +/* + * Maximum supported number of RSS queues: number of IGU SBs minus one that goes + * to CNIC. + */ +#define BNX2X_MAX_RSS_COUNT(bp) ((bp)->igu_sb_cnt - CNIC_PRESENT) - int l2_cid_count; -#define L2_ILT_LINES(bp) (DIV_ROUND_UP((bp)->l2_cid_count, \ - ILT_PAGE_CIDS)) -#define BNX2X_DB_SIZE(bp) ((bp)->l2_cid_count * (1 << BNX2X_DB_SHIFT)) +/* + * Maximum CID count that might be required by the bnx2x: + * Max RSS * Max_Tx_Multi_Cos + CNIC L2 Clients (FCoE and iSCSI related) + */ +#define BNX2X_L2_CID_COUNT(bp) (BNX2X_NUM_ETH_QUEUES(bp) * BNX2X_MULTI_TX_COS \ + + NON_ETH_CONTEXT_USE + CNIC_PRESENT) +#define BNX2X_L2_MAX_CID(bp) (BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS \ + + NON_ETH_CONTEXT_USE + CNIC_PRESENT) +#define L2_ILT_LINES(bp) (DIV_ROUND_UP(BNX2X_L2_CID_COUNT(bp),\ + ILT_PAGE_CIDS)) - int qm_cid_count; + int qm_cid_count; int dropless_fc; @@ -1858,7 +1871,7 @@ struct bnx2x { #define BNX2X_CNIC_FLAG_MAC_SET 1 void *t2; dma_addr_t t2_mapping; - struct cnic_ops *cnic_ops; + struct cnic_ops __rcu *cnic_ops; void *cnic_data; u32 cnic_tag; struct cnic_eth_dev cnic_eth_dev; @@ -1870,7 +1883,6 @@ struct bnx2x { struct eth_spe *cnic_kwq_last; u16 cnic_kwq_pending; u16 cnic_spq_pending; - u8 iscsi_mac[ETH_ALEN]; u8 fip_mac[ETH_ALEN]; struct mutex cnic_mutex; struct bnx2x_vlan_mac_obj iscsi_l2_mac_obj; @@ -1881,7 +1893,7 @@ struct bnx2x { int dmae_ready; /* used to synchronize dmae accesses */ - struct mutex dmae_mutex; + spinlock_t dmae_lock; /* used to protect the FW mail box */ struct mutex fw_mb_mutex; @@ -1901,15 +1913,20 @@ struct bnx2x { struct net_device_stats net_stats; #endif struct bnx2x_eth_stats eth_stats; + struct host_func_stats func_stats; + struct bnx2x_eth_stats_old eth_stats_old; + struct bnx2x_net_stats_old net_stats_old; + struct bnx2x_fw_port_stats_old fw_stats_old; + bool stats_init; struct z_stream_s *strm; void *gunzip_buf; dma_addr_t gunzip_mapping; int gunzip_outlen; #define FW_BUF_SIZE 0x8000 -#define GUNZIP_BUF(bp) bp->gunzip_buf -#define GUNZIP_PHYS(bp) bp->gunzip_mapping -#define GUNZIP_OUTLEN(bp) bp->gunzip_outlen +#define GUNZIP_BUF(bp) (bp->gunzip_buf) +#define GUNZIP_PHYS(bp) (bp->gunzip_mapping) +#define GUNZIP_OUTLEN(bp) (bp->gunzip_outlen) #if (LINUX_VERSION_CODE < 0x02060b) /* ! BNX2X_UPSTREAM */ u32 pci_state[16]; @@ -1919,6 +1936,8 @@ struct bnx2x { u16 *init_ops_offsets; /* Data blob - has 32 bit granularity */ u32 *init_data; + u32 init_mode_flags; +#define INIT_MODE_FLAGS(bp) (bp->init_mode_flags) /* Zipped PRAM blobs - raw data */ const u8 *tsem_int_table_data; const u8 *tsem_pram_data; @@ -1928,17 +1947,17 @@ struct bnx2x { const u8 *xsem_pram_data; const u8 *csem_int_table_data; const u8 *csem_pram_data; -#define INIT_OPS(bp) bp->init_ops -#define INIT_OPS_OFFSETS(bp) bp->init_ops_offsets -#define INIT_DATA(bp) bp->init_data -#define INIT_TSEM_INT_TABLE_DATA(bp) bp->tsem_int_table_data -#define INIT_TSEM_PRAM_DATA(bp) bp->tsem_pram_data -#define INIT_USEM_INT_TABLE_DATA(bp) bp->usem_int_table_data -#define INIT_USEM_PRAM_DATA(bp) bp->usem_pram_data -#define INIT_XSEM_INT_TABLE_DATA(bp) bp->xsem_int_table_data -#define INIT_XSEM_PRAM_DATA(bp) bp->xsem_pram_data -#define INIT_CSEM_INT_TABLE_DATA(bp) bp->csem_int_table_data -#define INIT_CSEM_PRAM_DATA(bp) bp->csem_pram_data +#define INIT_OPS(bp) (bp->init_ops) +#define INIT_OPS_OFFSETS(bp) (bp->init_ops_offsets) +#define INIT_DATA(bp) (bp->init_data) +#define INIT_TSEM_INT_TABLE_DATA(bp) (bp->tsem_int_table_data) +#define INIT_TSEM_PRAM_DATA(bp) (bp->tsem_pram_data) +#define INIT_USEM_INT_TABLE_DATA(bp) (bp->usem_int_table_data) +#define INIT_USEM_PRAM_DATA(bp) (bp->usem_pram_data) +#define INIT_XSEM_INT_TABLE_DATA(bp) (bp->xsem_int_table_data) +#define INIT_XSEM_PRAM_DATA(bp) (bp->xsem_pram_data) +#define INIT_CSEM_INT_TABLE_DATA(bp) (bp->csem_int_table_data) +#define INIT_CSEM_PRAM_DATA(bp) (bp->csem_pram_data) #define PHY_FW_VER_LEN 20 char fw_ver[32]; @@ -1950,90 +1969,109 @@ struct bnx2x { struct bnx2x_vfdb *vfdb; #define IS_SRIOV(bp) (bp)->vfdb #endif +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ /* LLDP params */ struct bnx2x_config_lldp_params lldp_config_params; +#endif + /* DCB support on/off */ + u16 dcb_state; +#define BNX2X_DCB_STATE_OFF 0 +#define BNX2X_DCB_STATE_ON 1 + + /* DCBX engine mode */ + int dcbx_enabled; +#define BNX2X_DCBX_ENABLED_OFF 0 +#define BNX2X_DCBX_ENABLED_ON_NEG_OFF 1 +#define BNX2X_DCBX_ENABLED_ON_NEG_ON 2 +#define BNX2X_DCBX_ENABLED_INVALID (-1) + + bool dcbx_mode_uset; - /* DCBX params */ struct bnx2x_config_dcbx_params dcbx_config_params; - - struct bnx2x_dcbx_port_params dcbx_port_params; - int dcb_version; + struct bnx2x_dcbx_port_params dcbx_port_params; + int dcb_version; /* CAM credit pools */ - struct bnx2x_credit_pool_obj vlans_pool; - struct bnx2x_credit_pool_obj macs_pool; +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ + struct bnx2x_credit_pool_obj vlans_pool; +#endif + struct bnx2x_credit_pool_obj macs_pool; /* RX_MODE object */ - struct bnx2x_rx_mode_obj rx_mode_obj; + struct bnx2x_rx_mode_obj rx_mode_obj; /* MCAST object */ - struct bnx2x_mcast_obj mcast_obj; + struct bnx2x_mcast_obj mcast_obj; /* RSS configuration object */ - struct bnx2x_rss_config_obj rss_conf_obj; + struct bnx2x_rss_config_obj rss_conf_obj; - unsigned long sp_state; + /* Function State controlling object */ + struct bnx2x_func_sp_obj func_obj; + + unsigned long sp_state; + + /* operation indication for the sp_rtnl task */ + unsigned long sp_rtnl_state; + + /* DCBX Negotiation results */ + struct dcbx_features dcbx_local_feat; + u32 dcbx_error; + +#ifdef BCM_DCBNL + struct dcbx_features dcbx_remote_feat; + u32 dcbx_remote_flags; +#endif + /* AFEX: store default vlan used */ + int afex_def_vlan_tag; + enum mf_cfg_afex_vlan_mode afex_vlan_mode; + u32 pending_max; + + /* multiple tx classes of service */ + u8 max_cos; + +#define BNX2X_MAX_PRIORITY 8 + /* priority to cos mapping */ + u8 prio_to_cos[BNX2X_MAX_PRIORITY]; +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + struct cdev cdev; + dev_t cdev_devnum; +#define IS_IN_BYPASS_MODE(bp) ((bp)->bypass_state != BNX2X_BYPASS_DISABLED) +#define LEADING_BYPASS_FP(bp) (&(bp)->fp[BNX2X_NUM_ETH_QUEUES(bp)]) + u8 num_bypass_queues; + + /* RSS configuration object */ + struct bnx2x_rss_config_obj bypass_rss_obj; + + enum bnx2x_bypass_state bypass_state; +#endif +#if defined (__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + bool poll_disable_fwdmp; +#endif }; -/** - Init queue/func interface -**/ -/* queue init flags */ -enum { - BNX2X_QUEUE_FLG_TPA, - BNX2X_QUEUE_FLG_STATS, - BNX2X_QUEUE_FLG_ZERO_STATS, - BNX2X_QUEUE_FLG_OV, - BNX2X_QUEUE_FLG_VLAN, - BNX2X_QUEUE_FLG_COS, - BNX2X_QUEUE_FLG_HC, - BNX2X_QUEUE_FLG_DHC, - BNX2X_QUEUE_FLG_OOO, - BNX2X_QUEUE_FLG_TX_SWITCH, - BNX2X_QUEUE_FLG_TX_SEC, -}; - - - - - - - - - -#define QUEUE_DROP_IP_CS_ERR TSTORM_ETH_CLIENT_CONFIG_DROP_IP_CS_ERR -#define QUEUE_DROP_TCP_CS_ERR TSTORM_ETH_CLIENT_CONFIG_DROP_TCP_CS_ERR -#define QUEUE_DROP_TTL0 TSTORM_ETH_CLIENT_CONFIG_DROP_TTL0 -#define QUEUE_DROP_UDP_CS_ERR TSTORM_ETH_CLIENT_CONFIG_DROP_UDP_CS_ERR - - - -/* rss capabilities */ -#define RSS_IPV4_CAP 0x0001 -#define RSS_IPV4_TCP_CAP 0x0002 -#define RSS_IPV6_CAP 0x0004 -#define RSS_IPV6_TCP_CAP 0x0008 - - /* Tx queues may be less or equal to Rx queues */ -extern int num_queues; -#define BNX2X_NUM_QUEUES(bp) bp->num_queues -#define BNX2X_NUM_ETH_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - NONE_ETH_CONTEXT_USE) +extern uint num_queues; +#define BNX2X_NUM_QUEUES(bp) (bp->num_queues) +#define BNX2X_INIT_NUM_QUEUES(bp) (bp->init_num_queues) +#ifndef BNX2X_CHAR_DEV /* BNX2X_UPSTREAM */ +#define BNX2X_NUM_ETH_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - NON_ETH_CONTEXT_USE) +#else +#define BNX2X_NUM_ETH_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - \ + (bp)->num_bypass_queues - NON_ETH_CONTEXT_USE) +#endif +#define BNX2X_NUM_NON_CNIC_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - \ + NON_ETH_CONTEXT_USE) +#ifdef BCM_OOO +#define BNX2X_NUM_RX_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - OOO_TX_CONTEXT_USE) +#else /* BNX2X_UPSTREAM */ +#define BNX2X_NUM_RX_QUEUES(bp) BNX2X_NUM_QUEUES(bp) +#endif -/* ethtool statistics are displayed for all regualr ethernet queues and the - * fcoe L2 queue if not disabled - */ -#define BNX2X_NUM_STAT_QUEUES(bp) (NO_FCOE(bp) ? BNX2X_NUM_ETH_QUEUES(bp) : \ - (BNX2X_NUM_ETH_QUEUES(bp) + FCOE_CONTEXT_USE)) -#define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 1) - -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ +#define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 1) +#ifdef BNX2X_NETQ /* not BNX2X_UPSTREAM */ /* - * limit the total number of queues to 4 (default + 3 NetQueues) in SF and - * 2 (default + 1 NetQueue) in MF. If num_queue is provided then we're in - * engineering mode and the max is set the regular way. - * * Workaround for PR347954 for inbox bnx2x driver. * Disable NetQueue when Flex10 module is connected for inbox bnx2x driver */ @@ -2042,17 +2080,40 @@ extern int num_queues; #else #define BNX2X_MAX_QUEUES_E1HMF 2 #endif + +/* + * limit the total number of queues to 8/4 (default + 7/3 NetQueues) in SF and + * 2 (default + 1 NetQueue) in MF. + */ +#if (VMWARE_ESX_DDK_VERSION >= 41000) #define BNX2X_MAX_QUEUES_E1H 8 +#else +#define BNX2X_MAX_QUEUES_E1H 4 +#endif #define BNX2X_MAX_QUEUES_E1 4 #define BNX2X_MAX_ESX_QUEUES(bp) (IS_MF(bp) ? BNX2X_MAX_QUEUES_E1HMF : \ (CHIP_IS_E1(bp) ? BNX2X_MAX_QUEUES_E1 : \ BNX2X_MAX_QUEUES_E1H)) + +/* the max number of queues dictated by the HW/FW */ +#define BNX2X_MAX_HW_QUEUES(bp) (bp->igu_sb_cnt - CNIC_PRESENT) + +/* If num_queue is provided then we're in engineering mode and the max is set + * the through the HW max, otherwise limit the number of queues according to + * the ESX definitions above + */ #define BNX2X_MAX_QUEUES(bp) \ - ((num_queues == 0) ? \ - min_t(int, bp->igu_sb_cnt - CNIC_CONTEXT_USE, \ - BNX2X_MAX_ESX_QUEUES(bp)) : \ - (bp->igu_sb_cnt - CNIC_CONTEXT_USE)) + (num_queues ? \ + BNX2X_MAX_HW_QUEUES(bp) : \ + min_t(int, BNX2X_MAX_ESX_QUEUES(bp), BNX2X_MAX_HW_QUEUES(bp))) + +/* + * in ESX queue 0 is the default queue and the other queues are for NetQueue. + * We set the macro to 0 in order to avoid RSS configuration. + +#define is_eth_multi(bp) 0 + */ /* *the total numver of net queues is the number of regualr L2 queues -1 for @@ -2060,10 +2121,11 @@ extern int num_queues; */ #define BNX2X_NUM_NETQUEUES(bp) (BNX2X_NUM_ETH_QUEUES((bp)) - 1) -#else -#define BNX2X_MAX_QUEUES(bp) (bp->igu_sb_cnt - CNIC_CONTEXT_USE) +#else /* BNX2X_UPSTREAM */ +#define BNX2X_MAX_QUEUES(bp) BNX2X_MAX_RSS_COUNT(bp) +/* #define is_eth_multi(bp) (BNX2X_NUM_ETH_QUEUES(bp) > 1) */ #endif - +#define BNX2X_DEFAULT_NUM_QUEUES 8 #define RSS_IPV4_CAP_MASK \ TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY @@ -2082,112 +2144,10 @@ extern int num_queues; /* removed FUNC_FLG_UNMATCHED 0x0004 */ #define FUNC_FLG_TPA 0x0008 #define FUNC_FLG_SPQ 0x0010 +#define FUNC_FLG_LEADING 0x0020 /* PF only */ -struct rxq_pause_params { - u16 bd_th_lo; - u16 bd_th_hi; - u16 rcq_th_lo; - u16 rcq_th_hi; - u16 sge_th_lo; /* valid iff BNX2X_QUEUE_FLG_TPA */ - u16 sge_th_hi; /* valid iff BNX2X_QUEUE_FLG_TPA */ - u16 pri_map; -}; - -struct bnx2x_rxq_init_params { - /* cxt*/ - struct eth_context *cxt; - - /* dma */ - dma_addr_t dscr_map; - dma_addr_t sge_map; - dma_addr_t rcq_map; - dma_addr_t rcq_np_map; - - unsigned long flags; - u16 drop_flags; - u16 mtu; - u16 buf_sz; - u16 fw_sb_id; - u16 cl_id; - u16 spcl_id; - u16 cl_qzone_id; - - /* valid iff BNX2X_QUEUE_FLG_STATS */ - u16 stat_id; - - /* valid iff BNX2X_QUEUE_FLG_TPA */ - u16 tpa_agg_sz; - u16 sge_buf_sz; - u16 max_sges_pkt; - u8 max_tpa_queues; - - u8 cache_line_log; - - u8 sb_cq_index; - u32 cid; - - /* desired interrupts per sec. valid iff BNX2X_QUEUE_FLG_HC */ - u32 hc_rate; - - u8 rss_mode; -}; - -struct bnx2x_txq_init_params { - /* cxt*/ - struct eth_context *cxt; - - /* dma */ - dma_addr_t dscr_map; - - unsigned long flags; - u16 fw_sb_id; - u8 sb_cq_index; - u8 cos; /* valid iff BNX2X_QUEUE_FLG_COS */ - u32 cid; - u16 traffic_type; - u16 hc_rate; /* desired interrupts per sec. - * valid iff BNX2X_QUEUE_FLG_HC - */ - /* equals to the leading rss client id, used for TX classification*/ - u8 tss_leading_cl_id; -}; - -enum { - CLIENT_IS_FCOE, - CLIENT_IS_LEADING_RSS, - CLIENT_IS_FWD, - CLIENT_IS_OOO, - CLIENT_IS_MULTICAST, -}; - -struct bnx2x_client_ramrod_params { - u16 *pstate; - u16 state; - u16 index; - u8 cl_id; - u32 cid; - unsigned long client_flags; -}; - -struct bnx2x_client_init_params { - struct rxq_pause_params pause; - struct bnx2x_rxq_init_params rxq_params; - struct bnx2x_txq_init_params txq_params; - struct bnx2x_client_ramrod_params ramrod_params; -}; - -/* TODO: Reconsider if we still need this struct */ -struct bnx2x_rss_params { - int mode; - u16 cap; - u16 result_mask; -}; struct bnx2x_func_init_params { - - /* rss */ - struct bnx2x_rss_params *rss; /* valid iff FUNC_FLG_RSS */ - /* dma */ dma_addr_t fw_stat_map; /* valid iff FUNC_FLG_STATS */ dma_addr_t spq_map; /* valid iff FUNC_FLG_SPQ */ @@ -2199,124 +2159,245 @@ struct bnx2x_func_init_params { }; #define for_each_eth_queue(bp, var) \ - for (var = 0; var < BNX2X_NUM_ETH_QUEUES(bp); var++) + for ((var) = 0; (var) < BNX2X_NUM_ETH_QUEUES(bp); (var)++) #define for_each_nondefault_eth_queue(bp, var) \ - for (var = 1; var < BNX2X_NUM_ETH_QUEUES(bp); var++) - -#define for_each_napi_queue(bp, var) \ - for (var = 0; \ - var < BNX2X_NUM_ETH_QUEUES(bp) + FCOE_CONTEXT_USE; var++) \ - if (skip_queue(bp, var)) \ - continue; \ - else + for ((var) = 1; (var) < BNX2X_NUM_ETH_QUEUES(bp); (var)++) #define for_each_queue(bp, var) \ - for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++) \ + for ((var) = 0; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \ if (skip_queue(bp, var)) \ continue; \ else /* Skip forwarding FP */ #define for_each_rx_queue(bp, var) \ - for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++) \ + for ((var) = 0; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \ + if (skip_rx_queue(bp, var)) \ + continue; \ + else + +#define for_each_init_rx_queue(bp, var) \ + for ((var) = 0; (var) < BNX2X_INIT_NUM_QUEUES(bp); (var)++) \ if (skip_rx_queue(bp, var)) \ continue; \ else /* Skip OOO FP */ #define for_each_tx_queue(bp, var) \ - for (var = 0; var < BNX2X_NUM_QUEUES(bp); var++) \ + for ((var) = 0; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \ if (skip_tx_queue(bp, var)) \ continue; \ else #define for_each_nondefault_queue(bp, var) \ - for (var = 1; var < BNX2X_NUM_QUEUES(bp); var++) \ + for ((var) = 1; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \ if (skip_queue(bp, var)) \ continue; \ else -/* Skip rx queue if any of the following is TRUE: - * - iscsi-ooo support is disabled and this is the rx ooo queue OR - * - FCOE l2 support is diabled and this is the fcoe L2 queue OR - * - idx is an index of the Forwarding Client fp in the bp->fp[] array. - */ -#define skip_rx_queue(bp, idx) ((NO_ISCSI_OOO(bp) && IS_OOO_IDX(idx)) || \ - (NO_FCOE(bp) && IS_FCOE_IDX(idx)) || \ - IS_FWD_IDX(idx)) +#define for_each_cos_in_tx_queue(fp, var) \ + for ((var) = 0; (var) < (fp)->max_cos; (var)++) -/* Skip tx queue if any of the following is TRUE: - * - iscsi-ooo support is disabled and this is the tx fwd queue OR - * - FCOE l2 support is diabled and this is the fcoe L2 queue OR - * - idx is OOO Rx L2 `fastpath' entry. - */ -#define skip_tx_queue(bp, idx) ((NO_ISCSI_OOO(bp) && IS_FWD_IDX(idx)) || \ - (NO_FCOE(bp) && IS_FCOE_IDX(idx)) || \ - IS_OOO_IDX(idx)) -#define skip_queue(bp, idx) ((NO_FCOE(bp) && IS_FCOE_IDX(idx)) || \ - (NO_ISCSI_OOO(bp) && (IS_OOO_IDX(idx) || IS_FWD_IDX(idx)))) +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#define INVALID_TXQ_INDEX -1 + +#define txdata_has_netdev_queue(txdata) \ + (txdata->txq_index != INVALID_TXQ_INDEX) +#endif + +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ +static inline bool is_bypass_queue(struct bnx2x *bp, int idx) +{ + int pseudo_eth_q_num = BNX2X_NUM_QUEUES(bp) - NON_ETH_CONTEXT_USE; + if ((idx < pseudo_eth_q_num) && (idx >= BNX2X_NUM_ETH_QUEUES(bp))) + return true; + + return false; +} + +#define for_each_bypass_queue(bp, var) \ + for ((var) = BNX2X_NUM_ETH_QUEUES(bp); \ + (var) < BNX2X_NUM_ETH_QUEUES(bp) + (bp)->num_bypass_queues; \ + (var)++) + +#endif +static inline bool skip_rx_queue(struct bnx2x *bp, int idx) +{ +#ifndef BCM_OOO /* BNX2X_UPSTREAM */ + if (NO_FCOE(bp) && IS_FCOE_IDX(idx)) +#else + if ((NO_ISCSI_OOO(bp) && IS_OOO_IDX(idx)) || + (NO_FCOE(bp) && IS_FCOE_IDX(idx)) || + IS_FWD_IDX(idx)) +#endif + return true; +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + + /* Skip the bypass queues */ + if (is_bypass_queue(bp, idx)) + return true; +#endif + + return false; +} + +static inline bool skip_tx_queue(struct bnx2x *bp, int idx) +{ +#ifndef BCM_OOO /* BNX2X_UPSTREAM */ + if (NO_FCOE(bp) && IS_FCOE_IDX(idx)) +#else + if ((NO_ISCSI_OOO(bp) && IS_FWD_IDX(idx)) || + (NO_FCOE(bp) && IS_FCOE_IDX(idx)) || + IS_OOO_IDX(idx)) +#endif + return true; +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + + /* Skip the bypass queues */ + if (is_bypass_queue(bp, idx)) + return true; +#endif + + return false; +} + +static inline bool skip_queue(struct bnx2x *bp, int idx) +{ +#ifndef BCM_OOO /* BNX2X_UPSTREAM */ + if (NO_FCOE(bp) && IS_FCOE_IDX(idx)) +#else + if ((NO_FCOE(bp) && IS_FCOE_IDX(idx)) || + (NO_ISCSI_OOO(bp) && (IS_OOO_IDX(idx) || IS_FWD_IDX(idx)))) +#endif + return true; +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + + /* Skip the bypass queues */ + if (is_bypass_queue(bp, idx)) + return true; +#endif + + return false; +} #ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ #define for_each_net_queue(bp, var) \ - for (var = 1; var <= BNX2X_NUM_NETQUEUES(bp); var++) + for (var = 1; var <= BNX2X_NUM_NETQUEUES(bp); var++) + +#ifdef BNX2X_ESX_CNA +/** + * Called with netif_addr_lock_bh() taken. + * Sets an rx_mode config for an FCoE ETH client. + * Doesn't block. + * Completion should be checked outside. + * + * @return 1 if an ramrod has been sent, 0 otherwise. + */ +int bnx2x_set_fcoe_eth_rx_mode(struct bnx2x *bp, bool start); +#endif +#endif + + +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +/*self test*/ +int bnx2x_idle_chk(struct bnx2x *bp); #endif /** - Init queue/func API -**/ + * bnx2x_set_mac_one - configure a single MAC address + * + * @bp: driver handle + * @mac: MAC to configure + * @obj: MAC object handle + * @set: if 'true' add a new MAC, otherwise - delete + * @mac_type: the type of the MAC to configure (e.g. ETH, UC list) + * @ramrod_flags: RAMROD_XXX flags (e.g. RAMROD_CONT, RAMROD_COMP_WAIT) + * + * Configures one MAC according to provided parameters or continues the + * execution of previously scheduled commands if RAMROD_CONT is set in + * ramrod_flags. + * + * Returns zero if operation has successfully completed, a positive value if the + * operation has been successfully scheduled and a negative - if a requested + * operations has failed. + */ int bnx2x_set_mac_one(struct bnx2x *bp, u8 *mac, struct bnx2x_vlan_mac_obj *obj, bool set, - int mac_type, unsigned long ramrod_flags); + int mac_type, unsigned long *ramrod_flags); +/** + * Deletes all MACs configured for the specific MAC object. + * + * @param bp Function driver instance + * @param mac_obj MAC object to cleanup + * + * @return zero if all MACs were cleaned + */ -int bnx2x_set_vlan_one(struct bnx2x *bp, u16 vtag, - struct bnx2x_vlan_mac_obj *obj, bool set, - unsigned long ramrod_flags, bool consume_credit); +/** + * bnx2x_del_all_macs - delete all MACs configured for the specific MAC object + * + * @bp: driver handle + * @mac_obj: MAC object handle + * @mac_type: type of the MACs to clear (BNX2X_XXX_MAC) + * @wait_for_comp: if 'true' block until completion + * + * Deletes all MACs of the specific type (e.g. ETH, UC list). + * + * Returns zero if operation has successfully completed, a positive value if the + * operation has been successfully scheduled and a negative - if a requested + * operations has failed. + */ +int bnx2x_del_all_macs(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *mac_obj, + int mac_type, bool wait_for_comp); +/* Init Function API */ void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p); -int bnx2x_setup_fw_client(struct bnx2x *bp, - struct bnx2x_client_init_params *params, - u8 activate, - struct client_init_ramrod_data *data, - dma_addr_t data_mapping); void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, u8 vf_valid, int fw_sb_id, int igu_sb_id); -int bnx2x_wait_ramrod(struct bnx2x *bp, u16 state, int idx, - u16 *state_p, int poll); - u32 bnx2x_get_pretend_reg(struct bnx2x *bp); int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port); int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); +int bnx2x_set_mult_gpio(struct bnx2x *bp, u8 pins, u32 mode); int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); void bnx2x_read_mf_cfg(struct bnx2x *bp); -void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); /* dmae */ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, u32 len32); -void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, - u32 addr, u32 len); -void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl); +void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx); +u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type); +u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode); +u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, + bool with_comp, u8 comp_type); + +#ifdef BNX2X_IOV /* ! BNX2X_UPSTREAM */ void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, u8 src_type, u8 dst_type); int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae); +void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl); +#endif /* FLR related routines */ -u32 bnx2x_flr_clnup_poll_count(struct bnx2x* bp); +u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp); void bnx2x_tx_hw_flushed(struct bnx2x *bp, u32 poll_count); -int bnx2x_send_final_clnup(struct bnx2x* bp, u8 clnup_func, u32 poll_cnt); +int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, u32 poll_cnt); u8 bnx2x_is_pcie_pending(struct pci_dev *dev); -int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x* bp, u32 reg, - char* msg, u32 poll_cnt); +int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x *bp, u32 reg, + char *msg, u32 poll_cnt); +void bnx2x_calc_fc_adv(struct bnx2x *bp); int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, - u32 data_hi, u32 data_lo, int common); + u32 data_hi, u32 data_lo, int cmd_type); +void bnx2x_update_coalesce(struct bnx2x *bp); +int bnx2x_get_cur_phy_idx(struct bnx2x *bp); static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, int wait) @@ -2335,6 +2416,23 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, return val; } +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ +#define BNX2X_ILT_ZALLOC(x, y, size) \ + do { \ + x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ + if (x) \ + memset(x, 0, size); \ + } while (0) + +#define BNX2X_ILT_FREE(x, y, size) \ + do { \ + if (x) { \ + dma_free_coherent(&bp->pdev->dev, size, x, y); \ + x = NULL; \ + y = 0; \ + } \ + } while (0) +#else #define BNX2X_ILT_ZALLOC(x, y, size) \ do { \ x = pci_alloc_consistent(bp->pdev, size, y); \ @@ -2350,6 +2448,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, y = 0; \ } \ } while (0) +#endif #define ILOG2(x) (ilog2((x))) @@ -2374,9 +2473,10 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, #define LOAD_NORMAL 0 #define LOAD_OPEN 1 #define LOAD_DIAG 2 +#define LOAD_LOOPBACK_EXT 3 #define UNLOAD_NORMAL 0 #define UNLOAD_CLOSE 1 -#define UNLOAD_RECOVERY 2 +#define UNLOAD_RECOVERY 2 /* DMAE command defines */ @@ -2395,8 +2495,8 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, #define DMAE_COMP_PCI 0 #define DMAE_COMP_GRC 1 -/* E2 and onward - PCI error handling in the - completion */ +/* E2 and onward - PCI error handling in the completion */ + #define DMAE_COMP_REGULAR 0 #define DMAE_COM_SET_ERR 1 @@ -2417,6 +2517,11 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, #define DMAE_CMD_C_ENABLE DMAE_COMMAND_C_TYPE_ENABLE +#define DMAE_CMD_ENDIANITY_NO_SWAP (0 << DMAE_COMMAND_ENDIANITY_SHIFT) +#define DMAE_CMD_ENDIANITY_B_SWAP (1 << DMAE_COMMAND_ENDIANITY_SHIFT) +#define DMAE_CMD_ENDIANITY_DW_SWAP (2 << DMAE_COMMAND_ENDIANITY_SHIFT) +#define DMAE_CMD_ENDIANITY_B_DW_SWAP (3 << DMAE_COMMAND_ENDIANITY_SHIFT) + #define DMAE_CMD_PORT_0 0 #define DMAE_CMD_PORT_1 DMAE_COMMAND_PORT @@ -2441,15 +2546,9 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, #define MAX_DMAE_C_PER_PORT 8 #define INIT_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ - BP_E1HVN(bp)) + BP_VN(bp)) #define PMF_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ - E1HVN_MAX) - -#define DMAE_CMD_ENDIANITY_NO_SWAP (0 << DMAE_COMMAND_ENDIANITY_SHIFT) -#define DMAE_CMD_ENDIANITY_B_SWAP (1 << DMAE_COMMAND_ENDIANITY_SHIFT) -#define DMAE_CMD_ENDIANITY_DW_SWAP (2 << DMAE_COMMAND_ENDIANITY_SHIFT) -#define DMAE_CMD_ENDIANITY_B_DW_SWAP (3 << DMAE_COMMAND_ENDIANITY_SHIFT) - + E1HVN_MAX) /* PCIE link and speed */ #define PCICFG_LINK_WIDTH 0x1f00000 @@ -2457,13 +2556,22 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, #define PCICFG_LINK_SPEED 0xf0000 #define PCICFG_LINK_SPEED_SHIFT 16 - -#define BNX2X_NUM_TESTS 7 +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#define BNX2X_NUM_TEST_SF 8 +#define BNX2X_NUM_TEST_MF 4 +#else /* BNX2X_UPSTREAM */ +#define BNX2X_NUM_TEST_SF 7 +#define BNX2X_NUM_TEST_MF 3 +#endif +#define BNX2X_NUM_TESTS (IS_MF(bp) ? BNX2X_NUM_TEST_MF : \ + BNX2X_NUM_TEST_SF) #define BNX2X_PHY_LOOPBACK 0 #define BNX2X_MAC_LOOPBACK 1 +#define BNX2X_EXT_LOOPBACK 2 #define BNX2X_PHY_LOOPBACK_FAILED 1 #define BNX2X_MAC_LOOPBACK_FAILED 2 +#define BNX2X_EXT_LOOPBACK_FAILED 3 #define BNX2X_LOOPBACK_FAILED (BNX2X_MAC_LOOPBACK_FAILED | \ BNX2X_PHY_LOOPBACK_FAILED) @@ -2473,7 +2581,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, /* must be used on a CID before placing it on a HW ring */ #define HW_CID(bp, x) ((BP_PORT(bp) << 23) | \ - (BP_E1HVN(bp) << BNX2X_SWCID_SHIFT) | \ + (BP_VN(bp) << BNX2X_SWCID_SHIFT) | \ (x)) #define SP_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_spe)) @@ -2483,19 +2591,23 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, #define BNX2X_BTR 4 #define MAX_SPQ_PENDING 8 - -/* CMNG constants - derived from lab experiments, and not from system spec calculations !!! */ -#define DEF_MIN_RATE 100 -/* resolution of the rate shaping timer - 100 usec */ -#define RS_PERIODIC_TIMEOUT_USEC 100 -/* resolution of fairness algorithm in usecs - - coefficient for calculating the actual t fair */ -#define T_FAIR_COEF 10000000 +/* CMNG constants, as derived from system spec calculations */ +/* default MIN rate in case VNIC min rate is configured to zero - 100Mbps */ +#define DEF_MIN_RATE 100 +/* resolution of the rate shaping timer - 400 usec */ +#define RS_PERIODIC_TIMEOUT_USEC 400 /* number of bytes in single QM arbitration cycle - - coefficient for calculating the fairness timer */ -#define QM_ARB_BYTES 40000 -#define FAIR_MEM 2 + * coefficient for calculating the fairness timer */ +#define QM_ARB_BYTES 160000 +/* resolution of Min algorithm 1:100 */ +#define MIN_RES 100 +/* how many bytes above threshold for the minimal credit of Min algorithm*/ +#define MIN_ABOVE_THRESH 32768 +/* Fairness algorithm integration time coefficient - + * for calculating the actual Tfair */ +#define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES) +/* Memory of fairness algorithm . 2 cycles */ +#define FAIR_MEM 2 #define ATTN_NIG_FOR_FUNC (1L << 8) @@ -2540,12 +2652,14 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, (AEU_INPUTS_ATTN_BITS_TSDM_HW_INTERRUPT | \ AEU_INPUTS_ATTN_BITS_TCM_HW_INTERRUPT | \ AEU_INPUTS_ATTN_BITS_TSEMI_HW_INTERRUPT | \ - AEU_INPUTS_ATTN_BITS_PBF_HW_INTERRUPT) + AEU_INPUTS_ATTN_BITS_PBCLIENT_HW_INTERRUPT) #define HW_PRTY_ASSERT_SET_0 (AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR |\ - AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR) + AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR |\ + AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR |\ + AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR) #define HW_INTERRUT_ASSERT_SET_1 \ (AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT | \ AEU_INPUTS_ATTN_BITS_TIMERS_HW_INTERRUPT | \ @@ -2558,17 +2672,22 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, AEU_INPUTS_ATTN_BITS_UPB_HW_INTERRUPT | \ AEU_INPUTS_ATTN_BITS_CSDM_HW_INTERRUPT | \ AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT) -#define HW_PRTY_ASSERT_SET_1 (AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR |\ +#define HW_PRTY_ASSERT_SET_1 (AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR |\ AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR | \ + AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR |\ AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR | \ + AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR |\ AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR |\ + AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR |\ AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR |\ AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR | \ + AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR |\ AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR | \ - AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR) + AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR |\ + AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR) #define HW_INTERRUT_ASSERT_SET_2 \ (AEU_INPUTS_ATTN_BITS_CSEMI_HW_INTERRUPT | \ AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT | \ @@ -2580,6 +2699,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR |\ AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR | \ + AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR |\ AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR | \ AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR) @@ -2588,13 +2708,9 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \ AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) -#define RSS_FLAGS(bp) \ - (TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY | \ - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY | \ - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY | \ - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY | \ - (bp->multi_mode << \ - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE_SHIFT)) +#define HW_PRTY_ASSERT_SET_4 (AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR | \ + AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR) + #define MULTI_MASK 0x7f @@ -2625,21 +2741,9 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, (&bp->def_status_blk->sp_sb.\ index_values[HC_SP_INDEX_ETH_DEF_CONS]) -#define SET_FLAG(value, mask, flag) \ - do {\ - (value) &= ~(mask);\ - (value) |= ((flag) << (mask##_SHIFT));\ - }while(0) - -#define GET_FLAG(value, mask) \ - (((value) &= (mask)) >> (mask##_SHIFT)) - -#define GET_FIELD(value, fname) \ - (((value) & (fname##_MASK)) >> (fname##_SHIFT)) - #define CAM_IS_INVALID(x) \ (GET_FLAG(x.flags, \ - MAC_CONFIGURATION_ENTRY_ACTION_TYPE)== \ + MAC_CONFIGURATION_ENTRY_ACTION_TYPE) == \ (T_ETH_MAC_COMMAND_INVALIDATE)) /* Number of u32 elements in MC hash array */ @@ -2652,69 +2756,78 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, #define PXP2_REG_PXP2_INT_STS PXP2_REG_PXP2_INT_STS_0 #endif -#ifndef NIG_REG_NIG_PRTY_STS -#define NIG_REG_NIG_PRTY_STS 0x103d0 -#endif - #ifndef ETH_MAX_RX_CLIENTS_E2 -#define ETH_MAX_RX_CLIENTS_E2 ETH_MAX_RX_CLIENTS_E1H +#define ETH_MAX_RX_CLIENTS_E2 ETH_MAX_RX_CLIENTS_E1H #endif -#define BNX2X_VPD_LEN 128 -#define BNX2X_VPD_LRDT 0x80 /* Large Resource Data Type */ -#define BNX2X_VPD_LRDT_ID(x) (x | BNX2X_VPD_LRDT) - -/* Large Resource Data Type Item Names */ -#define BNX2X_VPD_LRDT_LIN_ID_STRING 0x02 /* Identifier String */ -#define BNX2X_VPD_LRDT_LIN_RO_DATA 0x10 /* Read-Only Data */ -#define BNX2X_VPD_LRDT_LIN_RW_DATA 0x11 /* Read-Write Data */ - -#define BNX2X_VPD_LRDT_ID_STRING \ - BNX2X_VPD_LRDT_ID(BNX2X_VPD_LRDT_LIN_ID_STRING) -#define BNX2X_VPD_LRDT_RO_DATA \ - BNX2X_VPD_LRDT_ID(BNX2X_VPD_LRDT_LIN_RO_DATA) -#define BNX2X_VPD_LRDT_RW_DATA \ - BNX2X_VPD_LRDT_ID(BNX2X_VPD_LRDT_LIN_RW_DATA) - -/* Small Resource Data Type Item Names */ -#define BNX2X_VPD_SRDT_SIN_END 0x78 /* End */ - -#define BNX2X_VPD_SRDT_END BNX2X_VPD_SRDT_SIN_END - -#define BNX2X_VPD_RO_KEYWORD_PARTNO "PN" -#define BNX2X_VPD_RO_KEYWORD_VENDOR0 "V0" -#define BNX2X_VPD_RO_KEYWORD_MANUFACTURERNO "MN" - -#define BNX2X_VPD_SRDT_SIN_MASK 0x78 -#define BNX2X_VPD_SRDT_LEN_MASK 0x07 - -#define BNX2X_VPD_LRDT_TAG_SIZE 3 -#define BNX2X_VPD_SRDT_TAG_SIZE 1 -#define BNX2X_VPD_INFO_FLD_HDR_SIZE 3 +#define BNX2X_VPD_LEN 128 #define VENDOR_ID_LEN 4 -#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ + /***********************************************************/ /* Functions */ /***********************************************************/ -#ifdef BNX2X_VMWARE_BMAPILNX /* ! BNX2X_UPSTREAM */ int bnx2x_open(struct net_device *dev); +#if defined(BNX2X_VMWARE_BMAPILNX) /* ! BNX2X_UPSTREAM */ int bnx2x_close(struct net_device *dev); #endif -#endif -/* MISC_REG_RESET_REG - this is here for the hsi to work don't touch */ - /* Congestion management fairness mode */ -#define CMNG_FNS_NONE 0 -#define CMNG_FNS_MINMAX 1 -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ -#define CMNG_FNS_COSWRR 2 -#endif - +#define CMNG_FNS_NONE 0 +#define CMNG_FNS_MINMAX 1 #define HC_SEG_ACCESS_DEF 0 /*Driver decision 0-3*/ #define HC_SEG_ACCESS_ATTN 4 #define HC_SEG_ACCESS_NORM 0 /*Driver decision 0-1*/ +static const u32 dmae_reg_go_c[] = { + DMAE_REG_GO_C0, DMAE_REG_GO_C1, DMAE_REG_GO_C2, DMAE_REG_GO_C3, + DMAE_REG_GO_C4, DMAE_REG_GO_C5, DMAE_REG_GO_C6, DMAE_REG_GO_C7, + DMAE_REG_GO_C8, DMAE_REG_GO_C9, DMAE_REG_GO_C10, DMAE_REG_GO_C11, + DMAE_REG_GO_C12, DMAE_REG_GO_C13, DMAE_REG_GO_C14, DMAE_REG_GO_C15 +}; + +void bnx2x_set_ethtool_ops(struct net_device *netdev); +void bnx2x_notify_link_changed(struct bnx2x *bp); + +#define BNX2X_MF_SD_PROTOCOL(bp) \ + ((bp)->mf_config[BP_VN(bp)] & FUNC_MF_CFG_PROTOCOL_MASK) + +#ifdef BCM_CNIC +#define BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) \ + (BNX2X_MF_SD_PROTOCOL(bp) == FUNC_MF_CFG_PROTOCOL_ISCSI) + +#define BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp) \ + (BNX2X_MF_SD_PROTOCOL(bp) == FUNC_MF_CFG_PROTOCOL_FCOE) + +#define IS_MF_ISCSI_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) +#define IS_MF_FCOE_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) + +#define BNX2X_MF_EXT_PROTOCOL_FCOE(bp) ((bp)->mf_ext_config & \ + MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD) + +#define IS_MF_FCOE_AFEX(bp) (IS_MF_AFEX(bp) && BNX2X_MF_EXT_PROTOCOL_FCOE(bp)) + +#define IS_MF_STORAGE_SD(bp) (IS_MF_SD(bp) && \ + (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) || \ + BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp))) + +#else +#define IS_MF_FCOE_AFEX(bp) false +#endif +#endif /* BYPASS_APP */ + +#define SET_FLAG(value, mask, flag) \ + do {\ + (value) &= ~(mask);\ + (value) |= ((flag) << (mask##_SHIFT));\ + } while (0) + +#define GET_FLAG(value, mask) \ + (((value) & (mask)) >> (mask##_SHIFT)) + +#define GET_FIELD(value, fname) \ + (((value) & (fname##_MASK)) >> (fname##_SHIFT)) + + #endif /* bnx2x.h */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57710_int_offsets.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57710_int_offsets.h index 592fed5..9c05f78 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57710_int_offsets.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57710_int_offsets.h @@ -1,328 +1,387 @@ -struct iro e1_iro_arr[326] = { - { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE - { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE - { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE - { 0x20, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE - { 0x3328, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) - { 0x3330, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) - { 0x3328, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) - { 0x3930, 0x0, 0x0, 0x0, 0x8}, // XSTORM_DCB_VERSION_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) - { 0x3120, 0x0, 0x0, 0x0, 0x8}, // XSTORM_VIRTUALIZATION_MODE_OFFSET - { 0x3360, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) - { 0x3368, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET - { 0x3370, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x3374, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET - { 0x3928, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET - { 0x3c40, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) - { 0x3940, 0xc8, 0x0, 0x0, 0x98}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) - { 0x3ad0, 0x98, 0x0, 0x0, 0x28}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) - { 0x3b10, 0x98, 0x0, 0x0, 0x28}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) - { 0x3378, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) - { 0x3d68, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) - { 0x3d69, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E1HOV_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_PATH_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DPM_BUFFER_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE - { 0x12c8, 0x80, 0x0, 0x0, 0x80}, // TSTORM_INDIRECTION_TABLE_OFFSET(pfId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x19c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x4860, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) - { 0x4861, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) - { 0x4030, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_PFC_STRUCT_PER_PORT_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_E2_INTEG_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0x4000, 0x18, 0x0, 0x0, 0x18}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) - { 0x4300, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) - { 0x4300, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) - { 0x4301, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) - { 0x3000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) - { 0x3000, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) - { 0x3004, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) - { 0x4b00, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) - { 0x4b50, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) - { 0x3800, 0x80, 0x0, 0x0, 0x80}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) - { 0x3800, 0x8, 0x80, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) - { 0x3900, 0x20, 0x0, 0x0, 0x20}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x5198, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) - { 0x5199, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) - { 0x3940, 0x10, 0x4, 0x0, 0x4}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) - { 0x51a8, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) - { 0x51b0, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_PATH_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE - { 0x23e8, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET - { 0x2e30, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) - { 0x2e31, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) - { 0x24e8, 0x28, 0x0, 0x0, 0x28}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) - { 0x2d90, 0x8, 0x0, 0x0, 0x8}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0x2500, 0x40, 0x0, 0x0, 0x8}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) - { 0x2508, 0x40, 0x0, 0x0, 0x28}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(portId,clientId) - { 0x3000, 0x0, 0x0, 0x0, 0x1000}, // USTORM_AGG_DATA_OFFSET - { 0x5091, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET - { 0x50b0, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET - { 0x45a0, 0x90, 0x8, 0x0, 0x8}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) - { 0x2960, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) - { 0x2961, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) - { 0x2970, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) - { 0x2978, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) - { 0x2fb0, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) - { 0x2fb4, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) - { 0x2fc0, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET - { 0x2fc8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET - { 0x3000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET - { 0x5040, 0x1, 0x1, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) - { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET - { 0x808, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) - { 0x80c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) - { 0x1000, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x1004, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x1008, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x100a, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x100c, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x100d, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x100e, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x1010, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x1014, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0x3000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) - { 0x3004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) - { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS - { 0x3068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) - { 0x3069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) - { 0x306c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) - { 0x306e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) - { 0x3070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x3074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x3066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) - { 0x3064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x3060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x3062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x3050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x3054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0x3058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x305c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x307c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x307d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x1c18, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) - { 0x1c30, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) - { 0x1c38, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_CQ_THR_LOW_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_THR_LOW_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_CQ_THR_HIGH_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET - { 0x4c10, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x4c12, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x4c14, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x4c20, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x4c30, 0x40, 0x8, 0x0, 0x8}, // TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfId,iscsiConBufPblEntry) - { 0x4c00, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x4c02, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x4c04, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x4cd0, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x4ce0, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) - { 0x4ce4, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) - { 0x4cf0, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) - { 0x4cf4, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) - { 0x4d00, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) - { 0x5000, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_OOO_PKTS_OFFSET(pfId) - { 0x5004, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_SPILL_PKTS_OFFSET(pfId) - { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_L2_RING_FULL_DROPS_OFFSET(pfId) - { 0x1400, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x1402, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x1404, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x1410, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x1414, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x1416, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0x19b8, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) - { 0x1420, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) - { 0x1424, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x19c8, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x2c10, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) - { 0x2c11, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) - { 0x2c12, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x2c13, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) - { 0x2c00, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x2c02, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x2c04, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x2c30, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x2c32, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) - { 0x2c34, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x2c20, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) - { 0x2c21, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) - { 0x2c22, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) - { 0x2c23, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) - { 0x2c24, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) - { 0x2c25, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) - { 0x2c26, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) - { 0x1400, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x1402, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x1404, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x1412, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) - { 0x1410, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) - { 0x141c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x1414, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x1427, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) - { 0x1424, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) - { 0x1426, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) - { 0x1590, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x15a0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x15b0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_TIMER_ARRAY_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FC_CRC_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIMER_ARRAY_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_DATA_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_TABLE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +*/ +static const struct iro e1_iro_arr[378] = { + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE + { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE + { 0x3320, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) + { 0x3328, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) + { 0x3320, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_HIGIG_HDR_LENGTH_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) + { 0x3358, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) + { 0x3360, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET + { 0x3368, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x336c, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET + { 0x3920, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET + { 0x3af8, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) + { 0x3938, 0x80, 0x0, 0x0, 0x48}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) + { 0x3a38, 0x40, 0x0, 0x0, 0x8}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) + { 0x3a48, 0x40, 0x0, 0x0, 0x18}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) + { 0x3370, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) + { 0x3c20, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) + { 0x3c21, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) + { 0x3c22, 0x8, 0x0, 0x0, 0x1}, // XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PCI_READ_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // LOAD_CONTEXT_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // QM_PAUSE_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TEST_UNUSED_FOCS_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PBF_ECHO_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // IGU_TEST_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_ZONE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DPM_BUFFER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TIME_SYNC_FLG_OFFSET(funcId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x19c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x4870, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) + { 0x4871, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) + { 0x4872, 0x8, 0x0, 0x0, 0x1}, // TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x4040, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VF_ZONE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_E2_INTEG_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0x4000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) + { 0x4800, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) + { 0x482e, 0x40, 0x0, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) + { 0x4800, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) + { 0x4801, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) + { 0x3000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) + { 0x3000, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) + { 0x3004, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) + { 0x3b80, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) + { 0x3bd0, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) + { 0x3bda, 0x10, 0x0, 0x0, 0x1}, // CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) + { 0x3800, 0x80, 0x0, 0x0, 0x80}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) + { 0x3800, 0x8, 0x80, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) + { 0x3900, 0x40, 0x0, 0x0, 0x40}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x5198, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) + { 0x5199, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) + { 0x519a, 0x8, 0x0, 0x0, 0x1}, // CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x3980, 0x10, 0x4, 0x0, 0x4}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) + { 0x51a8, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) + { 0x51b0, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_MODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_PF_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_VF_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_VF_VALID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_IGU_COMMAND_OFFSET + { 0x23e8, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) + { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET + { 0x2e70, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) + { 0x2e71, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) + { 0x2e72, 0x8, 0x0, 0x0, 0x1}, // USTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x24e8, 0x38, 0x0, 0x0, 0x38}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) + { 0x2dd0, 0x8, 0x0, 0x0, 0x8}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0x2500, 0x40, 0x0, 0x0, 0x8}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) + { 0x2508, 0x40, 0x0, 0x0, 0x20}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CQE_PAGE_NEXT_OFFSET(portId,clientId) + { 0x3000, 0x0, 0x0, 0x0, 0x1000}, // USTORM_AGG_DATA_OFFSET + { 0x50a1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET + { 0x50b8, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET + { 0x50c8, 0x90, 0x8, 0x0, 0x8}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) + { 0x2960, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) + { 0x2961, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) + { 0x2970, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) + { 0x2978, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TCP_TX_SWITCHING_EN_OFFSET(portId) + { 0x2fb0, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) + { 0x2fb4, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) + { 0x2fc0, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET + { 0x2fc8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET + { 0x3000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET + { 0x5040, 0x1, 0x1, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) + { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET + { 0x808, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) + { 0x80c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) + { 0x8b7, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_MAX_DOMINANCE_VALUE_OFFSET + { 0x8b6, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOMINANCE_THRESHOLD_OFFSET + { 0x1000, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x1004, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x1008, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x100a, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x100c, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x100d, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x100e, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x1010, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x1014, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x1018, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_PROD_OFFSET(rssId,portId) + { 0x101c, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_CONS_OFFSET(rssId,portId) + { 0x3000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) + { 0x3004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) + { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS + { 0x3068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) + { 0x3069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) + { 0x306c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) + { 0x306e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) + { 0x3070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x3074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x3066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) + { 0x3064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x3060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x3062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x3050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x3054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x3058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x305c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x307c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x307d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x1c18, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) + { 0x1c30, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) + { 0x1c38, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_CQ_THR_LOW_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_THR_LOW_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_CQ_THR_HIGH_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET + { 0x4c10, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x4c12, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x4c14, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x4c16, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x4c20, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x4c00, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x4c02, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x4c04, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x4c30, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x4c40, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) + { 0x4c44, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) + { 0x4c50, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) + { 0x4c54, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) + { 0x4c60, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) + { 0x1400, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x1402, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x1404, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x1410, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x1414, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x1416, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + { 0x19b8, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) + { 0x1420, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) + { 0x1424, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x19c8, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x2c10, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) + { 0x2c11, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) + { 0x2c12, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x2c13, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) + { 0x2c00, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x2c02, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x2c04, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x2c30, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x2c32, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) + { 0x2c34, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x2c20, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) + { 0x2c21, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) + { 0x2c22, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) + { 0x2c23, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) + { 0x2c24, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) + { 0x2c25, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) + { 0x2c26, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) + { 0x1480, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x1482, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x1484, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x1492, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) + { 0x1490, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) + { 0x149c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x1494, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x14a7, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) + { 0x14a4, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) + { 0x14a6, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) + { 0x1610, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x1620, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x1630, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TIMER_ARRAY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FC_CRC_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_ONE_OFFSET(cached_tbl_size) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_TWO_OFFSET(cached_tbl_size) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_ENTRY_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_ENTRY_MNG_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_CACHED_TCE_TBL_BIT_MAP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAIT_4_BD_READ_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_NON_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_ERR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_GLOBAL_TIMER_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_DEL_CACHED_TASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_SILENT_DROP_CACHED_TASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_DROP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_CRC_ERROR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_ERROR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_PREVIOUS_THREAD_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DATA_IN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_READ_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DROP_ERR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_ERRORS_NUMBER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_NUMBER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_BITMAP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_ENABLE_CONN_RACE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_CRC_ERROR_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIMER_ARRAY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_ABTS_BLOCK_SQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_CLEANUP_BLOCK_SQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_WAIT_FOR_YOUR_TURN_SP_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_AFEX_ERROR_PACKETS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_TABLE_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET }; diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57711_int_offsets.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57711_int_offsets.h index d129f19..0ff54a6 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57711_int_offsets.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57711_int_offsets.h @@ -1,328 +1,387 @@ -struct iro e1h_iro_arr[326] = { - { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE - { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE - { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE - { 0x20, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE - { 0x9000, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) - { 0x9008, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) - { 0x9000, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) - { 0x9ce8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_DCB_VERSION_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) - { 0x91a0, 0x0, 0x0, 0x0, 0x8}, // XSTORM_VIRTUALIZATION_MODE_OFFSET - { 0x93c0, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) - { 0x93c8, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET - { 0x93d0, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x93d4, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET - { 0x93d8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET - { 0x9a78, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) - { 0x93e8, 0xc8, 0x0, 0x0, 0x98}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) - { 0x9578, 0x98, 0x0, 0x0, 0x28}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) - { 0x95b8, 0x98, 0x0, 0x0, 0x28}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) - { 0xa000, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) - { 0xc0c0, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) - { 0xc0c1, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x9ca0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_E1HOV_OFFSET(pfId) - { 0x9ce0, 0x0, 0x0, 0x0, 0x1}, // XSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_PATH_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DPM_BUFFER_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE - { 0x12c8, 0x80, 0x0, 0x0, 0x80}, // TSTORM_INDIRECTION_TABLE_OFFSET(pfId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x1ec8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET - { 0xa080, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) - { 0xa081, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) - { 0x9060, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) - { 0x1ed0, 0x0, 0x0, 0x0, 0x1}, // TSTORM_FUNCTION_MODE_OFFSET - { 0x1ed8, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET - { 0x1eda, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET - { 0x1290, 0x8, 0x0, 0x0, 0x8}, // CSTORM_PFC_STRUCT_PER_PORT_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_E2_INTEG_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0xb000, 0x18, 0x0, 0x0, 0x18}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) - { 0xb300, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) - { 0xb300, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) - { 0xb301, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) - { 0x8000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) - { 0x8000, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) - { 0x8004, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) - { 0xbb00, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) - { 0xbc40, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) - { 0x8800, 0x80, 0x0, 0x0, 0x80}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) - { 0x8800, 0x8, 0x80, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) - { 0x8c00, 0x20, 0x0, 0x0, 0x20}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x1250, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) - { 0x1251, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) - { 0x8d00, 0x10, 0x4, 0x0, 0x4}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) - { 0x1300, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) - { 0x1308, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) - { 0x11c8, 0x0, 0x0, 0x0, 0x1}, // CSTORM_FUNCTION_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_MODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_PATH_ID_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE - { 0x8308, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET - { 0x8540, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) - { 0x8541, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) - { 0x6000, 0x28, 0x0, 0x0, 0x28}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) - { 0x8408, 0x8, 0x0, 0x0, 0x8}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) - { 0x8448, 0x0, 0x0, 0x0, 0x1}, // USTORM_FUNCTION_MODE_OFFSET - { 0x8494, 0x8, 0x0, 0x0, 0x2}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) - { 0x8496, 0x8, 0x0, 0x0, 0x2}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) - { 0x84a4, 0x10, 0x0, 0x0, 0x4}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_VF_ZONE_OFFSET(vfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_TEST_OPCODE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0x3000, 0x40, 0x0, 0x0, 0x8}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) - { 0x3008, 0x40, 0x0, 0x0, 0x28}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) - { 0x3200, 0x20, 0x0, 0x0, 0x20}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) - { 0x3720, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(portId,clientId) - { 0xa000, 0x0, 0x0, 0x0, 0x2000}, // USTORM_AGG_DATA_OFFSET - { 0x3ea1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET - { 0x3ec8, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET - { 0x1e00, 0xe0, 0x8, 0x0, 0x8}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) - { 0x4000, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) - { 0x4001, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) - { 0x4040, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) - { 0x4060, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) - { 0x4000, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) - { 0x4004, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) - { 0x4040, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET - { 0x4048, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET - { 0x8000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET - { 0x5040, 0x1, 0x4, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) - { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET - { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) - { 0x500c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) - { 0x3000, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x3004, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x3008, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x300a, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x300c, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x300d, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x300e, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x3010, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x3014, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0x5000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) - { 0x5004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) - { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS - { 0x5068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) - { 0x5069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) - { 0x506c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) - { 0x506e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) - { 0x5070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x5074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x5066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) - { 0x5064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x5060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x5062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x5050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x5054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0x5058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x505c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x507c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x507d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x4018, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) - { 0x4090, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) - { 0x4098, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) - { 0x4110, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_LOW_OFFSET - { 0x4112, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_LOW_OFFSET - { 0x4114, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_HIGH_OFFSET - { 0x4116, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET - { 0x6040, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x6042, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x6044, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x6080, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x60c0, 0x40, 0x8, 0x0, 0x8}, // TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfId,iscsiConBufPblEntry) - { 0x6000, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x6002, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x6004, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x6340, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x6380, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) - { 0x6384, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) - { 0x63c0, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) - { 0x63c4, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) - { 0x6400, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) - { 0x7000, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_OOO_PKTS_OFFSET(pfId) - { 0x7004, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_SPILL_PKTS_OFFSET(pfId) - { 0x7008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_L2_RING_FULL_DROPS_OFFSET(pfId) - { 0x7000, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x7002, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x7004, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x7040, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x7044, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x7046, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0x7660, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) - { 0x7080, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) - { 0x7084, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x76a0, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x8040, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) - { 0x8041, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) - { 0x8042, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x8043, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) - { 0x8000, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x8002, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x8004, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x80c0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x80c2, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) - { 0x80c4, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x8080, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) - { 0x8081, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) - { 0x8082, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) - { 0x8083, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) - { 0x8084, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) - { 0x8085, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) - { 0x8086, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) - { 0x6000, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x6002, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x6004, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x6042, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) - { 0x6040, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) - { 0x604c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x6044, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x6057, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) - { 0x6054, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) - { 0x6056, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) - { 0x6640, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x6680, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x66c0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0xd942, 0x18, 0x0, 0x0, 0x2}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) - { 0xde40, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET - { 0xe000, 0x0, 0x0, 0x0, 0x4}, // USTORM_TIMER_ARRAY_OFFSET - { 0xdd40, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FC_CRC_CNT_OFFSET - { 0xdd44, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET - { 0xdd48, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET - { 0xdd4c, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET - { 0xdd50, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET - { 0xdd54, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0xdd58, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET - { 0xdd40, 0x0, 0x0, 0x0, 0x20}, // USTORM_STAT_OFFSET - { 0xda00, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET - { 0xda00, 0x0, 0x0, 0x0, 0x68}, // USTORM_DEBUG_OFFSET - { 0xbb60, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET - { 0xd000, 0x0, 0x0, 0x0, 0x4}, // XSTORM_TIMER_ARRAY_OFFSET - { 0xb0c0, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET - { 0xb0c4, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET - { 0xb0c8, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET - { 0xb0c0, 0x0, 0x0, 0x0, 0x10}, // XSTORM_STAT_OFFSET - { 0xd6b0, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET - { 0xd6b4, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET - { 0xd6b8, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET - { 0xd6bc, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0xd6b0, 0x0, 0x0, 0x0, 0x10}, // TSTORM_STAT_OFFSET - { 0xd348, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_DATA_OFFSET - { 0xd358, 0x0, 0x0, 0x0, 0x80}, // TSTORM_REORDER_WAITING_TABLE_OFFSET - { 0x10, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE - { 0xd358, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +*/ +static const struct iro e1h_iro_arr[378] = { + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE + { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE + { 0x9000, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) + { 0x9008, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) + { 0x9000, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_HIGIG_HDR_LENGTH_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) + { 0x93b8, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) + { 0x93c0, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET + { 0x93c8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x93cc, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET + { 0x93d0, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET + { 0x9720, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) + { 0x93e0, 0x80, 0x0, 0x0, 0x48}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) + { 0x94e0, 0x40, 0x0, 0x0, 0x8}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) + { 0x94f0, 0x40, 0x0, 0x0, 0x18}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) + { 0xa000, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) + { 0xc0c0, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) + { 0xc0c1, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) + { 0xc0c2, 0x8, 0x0, 0x0, 0x1}, // XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PCI_READ_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // LOAD_CONTEXT_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // QM_PAUSE_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TEST_UNUSED_FOCS_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // PBF_ECHO_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT0_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT1_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // IGU_TEST_KUKUE_CODE_OPPCOE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VF_ZONE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DPM_BUFFER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_TIME_SYNC_FLG_OFFSET(funcId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x1ec8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET + { 0xa080, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) + { 0xa081, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) + { 0xa082, 0x8, 0x0, 0x0, 0x1}, // TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x9070, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) + { 0x1ed8, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET + { 0x1eda, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VF_ZONE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_E2_INTEG_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0xc000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) + { 0xc800, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) + { 0xc82e, 0x40, 0x0, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) + { 0xc800, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) + { 0xc801, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) + { 0x8000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) + { 0x8000, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) + { 0x8004, 0x8, 0x40, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) + { 0xb000, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) + { 0xb140, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) + { 0xb14a, 0x10, 0x0, 0x0, 0x1}, // CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) + { 0x8800, 0x80, 0x0, 0x0, 0x80}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) + { 0x8800, 0x8, 0x80, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) + { 0x8c00, 0x40, 0x0, 0x0, 0x40}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x1250, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) + { 0x1251, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) + { 0x1252, 0x8, 0x0, 0x0, 0x1}, // CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x8e00, 0x10, 0x4, 0x0, 0x4}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) + { 0x1290, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) + { 0x1298, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_MODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_PF_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_VF_ID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_VF_VALID_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_IGU_TEST_IGU_COMMAND_OFFSET + { 0x8308, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) + { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET + { 0x8500, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) + { 0x8501, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) + { 0x8502, 0x8, 0x0, 0x0, 0x1}, // USTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x6000, 0x38, 0x0, 0x0, 0x38}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) + { 0x8454, 0x8, 0x0, 0x0, 0x2}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) + { 0x8456, 0x8, 0x0, 0x0, 0x2}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) + { 0x8464, 0x10, 0x0, 0x0, 0x4}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_QUEUE_ZONE_OFFSET(queueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_TEST_OPCODE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0x3000, 0x40, 0x0, 0x0, 0x8}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) + { 0x3008, 0x40, 0x0, 0x0, 0x20}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) + { 0x3200, 0x20, 0x0, 0x0, 0x20}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) + { 0x37a8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CQE_PAGE_NEXT_OFFSET(portId,clientId) + { 0xa000, 0x0, 0x0, 0x0, 0x2000}, // USTORM_AGG_DATA_OFFSET + { 0x3ec1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET + { 0x3ee0, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET + { 0x1e00, 0xe0, 0x8, 0x0, 0x8}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) + { 0x4000, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) + { 0x4001, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) + { 0x4040, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) + { 0x4060, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TCP_TX_SWITCHING_EN_OFFSET(portId) + { 0x4000, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) + { 0x4004, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) + { 0x4040, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET + { 0x4048, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET + { 0x8000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET + { 0x5040, 0x1, 0x4, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) + { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET + { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) + { 0x500c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) + { 0x52c7, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_MAX_DOMINANCE_VALUE_OFFSET + { 0x52c6, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOMINANCE_THRESHOLD_OFFSET + { 0x3000, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x3004, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x3008, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x300a, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x300c, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x300d, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x300e, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x3010, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x3014, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x3018, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_PROD_OFFSET(rssId,portId) + { 0x301c, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_CONS_OFFSET(rssId,portId) + { 0x5000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) + { 0x5004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) + { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS + { 0x5068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) + { 0x5069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) + { 0x506c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) + { 0x506e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) + { 0x5070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x5074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x5066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) + { 0x5064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x5060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x5062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x5050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x5054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x5058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x505c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x507c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x507d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x4018, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) + { 0x4090, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) + { 0x4098, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) + { 0x4110, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_LOW_OFFSET + { 0x4112, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_LOW_OFFSET + { 0x4114, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_HIGH_OFFSET + { 0x4116, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET + { 0x6040, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x6042, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6044, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6046, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6080, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x6000, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x6002, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x6004, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x60c0, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x6100, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) + { 0x6104, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) + { 0x6140, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) + { 0x6144, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) + { 0x6180, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) + { 0x7000, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x7002, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x7004, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x7040, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x7044, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x7046, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + { 0x7660, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) + { 0x7080, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) + { 0x7084, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x76a0, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x8040, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) + { 0x8041, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) + { 0x8042, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x8043, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) + { 0x8000, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x8002, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x8004, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x80c0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x80c2, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) + { 0x80c4, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x8080, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) + { 0x8081, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) + { 0x8082, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) + { 0x8083, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) + { 0x8084, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) + { 0x8085, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) + { 0x8086, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) + { 0x6000, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x6002, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x6004, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x6042, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) + { 0x6040, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) + { 0x604c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x6044, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x6057, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) + { 0x6054, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) + { 0x6056, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) + { 0x6640, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x6680, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x66c0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_TIMER_ARRAY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FC_CRC_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_ONE_OFFSET(cached_tbl_size) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_TWO_OFFSET(cached_tbl_size) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_ENTRY_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_CACHED_TCE_ENTRY_MNG_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_CACHED_TCE_TBL_BIT_MAP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAIT_4_BD_READ_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_NON_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_ERR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_GLOBAL_TIMER_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_DEL_CACHED_TASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_SILENT_DROP_CACHED_TASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_DEBUG_CACHED_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_DROP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_CRC_ERROR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_ERROR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_PREVIOUS_THREAD_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DATA_IN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_READ_TCE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DROP_ERR_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_ERRORS_NUMBER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_NUMBER_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_BITMAP_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_ENABLE_CONN_RACE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_DEBUG_PARAMS_CRC_ERROR_TASK_IN_USE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_TIMER_ARRAY_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_ABTS_BLOCK_SQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_CLEANUP_BLOCK_SQ_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_STAT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_WAIT_FOR_YOUR_TURN_SP_CNT_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_AFEX_ERROR_PACKETS_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_PORT_DEBUG_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_DATA_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_TABLE_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET }; diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57712_int_offsets.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57712_int_offsets.h index dd1e337..7fddf12 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57712_int_offsets.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_57712_int_offsets.h @@ -1,328 +1,387 @@ -struct iro e2_iro_arr[326] = { - { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE - { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE - { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE - { 0x20, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE - { 0x3d, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID - { 0x3c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET - { 0xc, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET - { 0xe, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET - { 0x4, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET - { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK - { 0x1c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK - { 0x1c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK - { 0x13, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT - { 0x3e, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID - { 0x1, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE - { 0x2, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE - { 0x1, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL - { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION - { 0x50, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID - { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST - { 0x3, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE - { 0xab, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE - { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE - { 0xc000, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) - { 0xc008, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) - { 0xc000, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) - { 0x9ee8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_DCB_VERSION_OFFSET - { 0xc080, 0x10, 0x0, 0x0, 0x4}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) - { 0xc088, 0x10, 0x0, 0x0, 0x2}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) - { 0xc080, 0x10, 0x0, 0x0, 0x10}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) - { 0x9120, 0x0, 0x0, 0x0, 0x8}, // XSTORM_VIRTUALIZATION_MODE_OFFSET - { 0x9340, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) - { 0x9348, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET - { 0x9350, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x9354, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET - { 0x9358, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET - { 0x99f0, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) - { 0x9360, 0xc8, 0x0, 0x0, 0x98}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) - { 0x94f0, 0x98, 0x0, 0x0, 0x28}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) - { 0x9530, 0x98, 0x0, 0x0, 0x28}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) - {0x63010, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) - { 0x9c60, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) - { 0x9c61, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x9c18, 0x8, 0x0, 0x0, 0x2}, // XSTORM_E1HOV_OFFSET(pfId) - { 0x9c58, 0x0, 0x0, 0x0, 0x1}, // XSTORM_FUNCTION_MODE_OFFSET - { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX - { 0x9, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX - { 0x2, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE - { 0xc4c0, 0x0, 0x0, 0x0, 0x20}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0xc4e6, 0x0, 0x0, 0x0, 0x1}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET - { 0x6000, 0x20, 0x0, 0x0, 0x20}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x7300, 0x8, 0x0, 0x0, 0x8}, // XSTORM_VF_ZONE_OFFSET(vfId) - { 0x9ed8, 0x0, 0x0, 0x0, 0x1}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET - { 0x9ee0, 0x0, 0x0, 0x0, 0x1}, // XSTORM_PATH_ID_OFFSET - { 0x9ea0, 0x0, 0x0, 0x0, 0x8}, // XSTORM_E2_INTEG_RAM_OFFSET - { 0x9ea3, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET - { 0x9ea1, 0x0, 0x0, 0x0, 0x1}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET - { 0x9ea6, 0x0, 0x0, 0x0, 0x1}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET - { 0x9ea7, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE - { 0x3, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x3, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x5, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0xf, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - {0x60000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_DPM_BUFFER_OFFSET - { 0x9ea8, 0x0, 0x0, 0x0, 0x1}, // XSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x9ec8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x53, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE - { 0x9ed0, 0x0, 0x0, 0x0, 0x2}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET - { 0x9ed4, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET - { 0x9ed5, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET - { 0x9, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE - { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL - { 0x44, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION - { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST - { 0x50, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID - { 0x89, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x16c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x17a0, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) - { 0x17a1, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) - {0x62078, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) - { 0x16d0, 0x0, 0x0, 0x0, 0x1}, // TSTORM_FUNCTION_MODE_OFFSET - { 0x16d8, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET - { 0x16da, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_PFC_STRUCT_PER_PORT_OFFSET(portId) - { 0xa040, 0x0, 0x0, 0x0, 0x20}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) - { 0xe000, 0x20, 0x0, 0x0, 0x20}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0xf300, 0x8, 0x0, 0x0, 0x8}, // TSTORM_VF_ZONE_OFFSET(vfId) - { 0x16f0, 0x0, 0x0, 0x0, 0xb0}, // TSTORM_E2_INTEG_RAM_OFFSET - { 0x1737, 0x0, 0x0, 0x0, 0x1}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET - { 0x170f, 0x0, 0x0, 0x0, 0x1}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE - { 0x3, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x5, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x6, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0xd, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x1770, 0x0, 0x0, 0x0, 0x1}, // TSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x1790, 0x0, 0x0, 0x0, 0x8}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x51, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE - { 0x1778, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x177c, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x1780, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x1784, 0x0, 0x0, 0x0, 0x8}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0xb000, 0x18, 0x0, 0x0, 0x18}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) - { 0xc000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) - { 0xc000, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) - { 0xc001, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) - { 0xe200, 0x20, 0x0, 0x0, 0x20}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) - { 0xe204, 0x2, 0x8, 0x20, 0x2}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) - { 0xe200, 0x8, 0x20, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) - { 0xf400, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) - { 0xf540, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) - { 0xf5c0, 0x20, 0x0, 0x0, 0x20}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) - { 0xf5c0, 0x2, 0x20, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) - { 0xf300, 0x20, 0x0, 0x0, 0x20}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET - { 0x11a0, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) - { 0x11a1, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) - { 0x4000, 0x20, 0x4, 0x0, 0x10}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) - { 0x5900, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) - { 0x5908, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) - { 0x5700, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) - { 0x5701, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) - { 0x1148, 0x0, 0x0, 0x0, 0x1}, // CSTORM_FUNCTION_MODE_OFFSET - { 0x1150, 0x0, 0x0, 0x0, 0x1}, // CSTORM_IGU_MODE_OFFSET - { 0x1158, 0x0, 0x0, 0x0, 0x10}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x11a4, 0x8, 0x0, 0x0, 0x4}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) - { 0x4000, 0x20, 0x0, 0x0, 0x20}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x5300, 0x10, 0x0, 0x0, 0x10}, // CSTORM_VF_ZONE_OFFSET(vfId) - { 0x1498, 0x0, 0x0, 0x0, 0x1}, // CSTORM_PATH_ID_OFFSET - { 0x3, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x1, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0xb, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x1468, 0x0, 0x0, 0x0, 0x1}, // CSTORM_KUKU_TEST_OPCODE_OFFSET - { 0x1488, 0x0, 0x0, 0x0, 0x8}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x50, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE - { 0x8308, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) - { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE - { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) - { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET - { 0x8480, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) - { 0x8481, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) - { 0x4010, 0x28, 0x0, 0x0, 0x28}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) - { 0x8408, 0x0, 0x0, 0x0, 0x1}, // USTORM_FUNCTION_MODE_OFFSET - { 0x8454, 0x8, 0x0, 0x0, 0x2}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) - { 0x8456, 0x8, 0x0, 0x0, 0x2}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) - { 0x8464, 0x10, 0x0, 0x0, 0x4}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) - { 0x86c0, 0x0, 0x0, 0x0, 0x20}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET - { 0x6000, 0x20, 0x0, 0x0, 0x20}, // USTORM_QUEUE_ZONE_OFFSET(queueId) - { 0x7300, 0x8, 0x0, 0x0, 0x8}, // USTORM_VF_ZONE_OFFSET(vfId) - { 0x3, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES - { 0x5, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX - { 0x6, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX - { 0xd, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX - { 0x8768, 0x0, 0x0, 0x0, 0x1}, // USTORM_KUKU_TEST_OPCODE_OFFSET - { 0x8788, 0x0, 0x0, 0x0, 0x8}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET - { 0x50, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE - { 0x8770, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET - { 0x8774, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET - { 0x8778, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET - { 0x877c, 0x0, 0x0, 0x0, 0x8}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) - { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) - { 0x30a0, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET - {0x62a20, 0x2600, 0x40, 0x0, 0x8}, // USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(portId,clientId) - { 0xa000, 0x0, 0x0, 0x0, 0x2000}, // USTORM_AGG_DATA_OFFSET - { 0x30a1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET - { 0x30e8, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET - { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) - { 0x6000, 0x20, 0x0, 0x0, 0x8}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) - { 0x4000, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) - { 0x4001, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) - { 0x4040, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) - { 0x4060, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) - { 0x4000, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) - { 0x4004, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) - { 0x4040, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET - { 0x4048, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET - { 0x8000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET - { 0x5040, 0x1, 0x4, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) - { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET - { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) - { 0x500c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) - { 0x3000, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0x3004, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0x3008, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0x300a, 0x30, 0x18, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0x300c, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0x300d, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0x300e, 0x30, 0x18, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x3010, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0x3014, 0x30, 0x18, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0xc000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) - { 0xc004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) - { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS - { 0xc068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) - { 0xc069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) - { 0xc06c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) - { 0xc06e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) - { 0xc070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0xc074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0xc066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) - { 0xc064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) - { 0xc060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) - { 0xc062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) - { 0xc050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) - { 0xc054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) - { 0xc058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) - { 0xc05c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) - { 0xc07c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) - { 0xc07d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) - { 0x1018, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) - { 0x1090, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) - { 0x1098, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) - { 0x1110, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_LOW_OFFSET - { 0x1112, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_LOW_OFFSET - { 0x1114, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_HIGH_OFFSET - { 0x1116, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET - { 0x6040, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x6042, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x6044, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) - { 0x6080, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x60c0, 0x40, 0x8, 0x0, 0x8}, // TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfId,iscsiConBufPblEntry) - { 0x6000, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x6002, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x6004, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x6340, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x6380, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) - { 0x6384, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) - { 0x63c0, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) - { 0x63c4, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) - { 0x6400, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) - { 0x7000, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_OOO_PKTS_OFFSET(pfId) - { 0x7004, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_SPILL_PKTS_OFFSET(pfId) - { 0x7008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_STATS_L2_RING_FULL_DROPS_OFFSET(pfId) - { 0x9000, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x9002, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x9004, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x9040, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x9044, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x9046, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0x9660, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) - { 0x9080, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) - { 0x9084, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) - { 0x96a0, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) - { 0x8040, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) - { 0x8041, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) - { 0x8042, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) - { 0x8043, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) - { 0x8000, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x8002, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x8004, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x80c0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x80c2, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) - { 0x80c4, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) - { 0x8080, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) - { 0x8081, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) - { 0x8082, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) - { 0x8083, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) - { 0x8084, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) - { 0x8085, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) - { 0x8086, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) - { 0x6000, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) - { 0x6002, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) - { 0x6004, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) - { 0x6042, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) - { 0x6040, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) - { 0x604c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x6044, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) - { 0x6057, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) - { 0x6054, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) - { 0x6056, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) - { 0x6640, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) - { 0x6680, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) - { 0x66c0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) - { 0xda42, 0x18, 0x0, 0x0, 0x2}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) - { 0xde40, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET - { 0xe000, 0x0, 0x0, 0x0, 0x4}, // USTORM_TIMER_ARRAY_OFFSET - { 0xd0c0, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FC_CRC_CNT_OFFSET - { 0xd0c4, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET - { 0xd0c8, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET - { 0xd0cc, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET - { 0xd0d0, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET - { 0xd0d4, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0xd0d8, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET - { 0xd0c0, 0x0, 0x0, 0x0, 0x20}, // USTORM_STAT_OFFSET - { 0xdb00, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET - { 0xdb00, 0x0, 0x0, 0x0, 0x68}, // USTORM_DEBUG_OFFSET - { 0xb948, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET - { 0xd000, 0x0, 0x0, 0x0, 0x4}, // XSTORM_TIMER_ARRAY_OFFSET - { 0xb0c0, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET - { 0xb0c4, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET - { 0xb0c8, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET - { 0xb0c0, 0x0, 0x0, 0x0, 0x10}, // XSTORM_STAT_OFFSET - { 0xd6b0, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET - { 0xd6b4, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET - { 0xd6b8, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET - { 0xd6bc, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET - { 0xd6b0, 0x0, 0x0, 0x0, 0x10}, // TSTORM_STAT_OFFSET - { 0xd348, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_DATA_OFFSET - { 0xd358, 0x0, 0x0, 0x0, 0x80}, // TSTORM_REORDER_WAITING_TABLE_OFFSET - { 0x10, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE - { 0xd358, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +*/ +static const struct iro e2_iro_arr[378] = { + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE + { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE + { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE + { 0x3d, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID + { 0x3c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET + { 0xc, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET + { 0xe, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET + { 0x4, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET + { 0x18, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK + { 0x1c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK + { 0x1c, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK + { 0x13, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_AGG_INT + { 0x3e, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_EVENTID + { 0x1, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_PCI_READ_OPCODE + { 0x2, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_OPCODE + { 0x1, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_INCVAL + { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_REGION + { 0x50, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_CID + { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST + { 0x3, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_QM_PAUSE_OPCODE + { 0xab, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE + { 0xc000, 0x10, 0x0, 0x0, 0x8}, // XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) + { 0xc008, 0x10, 0x0, 0x0, 0x2}, // XSTORM_SPQ_PROD_OFFSET(funcId) + { 0xc000, 0x10, 0x0, 0x0, 0x10}, // XSTORM_SPQ_DATA_OFFSET(funcId) + { 0x9c08, 0x4, 0x0, 0x0, 0x4}, // XSTORM_HIGIG_HDR_LENGTH_OFFSET(portId) + { 0xc080, 0x10, 0x0, 0x0, 0x4}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) + { 0xc088, 0x10, 0x0, 0x0, 0x2}, // XSTORM_VF_SPQ_PROD_OFFSET(vfId) + { 0xc080, 0x10, 0x0, 0x0, 0x10}, // XSTORM_VF_SPQ_DATA_OFFSET(vfId) + { 0x9338, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId) + { 0x9340, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_IP_ID_MASK_OFFSET + { 0x9348, 0x0, 0x0, 0x0, 0x8}, // XSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x934c, 0x0, 0x0, 0x0, 0x2}, // XSTORM_COMMON_RTC_RESOLUTION_OFFSET + { 0x9350, 0x0, 0x0, 0x0, 0x8}, // XSTORM_FW_VERSION_OFFSET + { 0x9698, 0x40, 0x0, 0x0, 0x40}, // XSTORM_LICENSE_VALUES_OFFSET(pfId) + { 0x9358, 0x80, 0x0, 0x0, 0x48}, // XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) + { 0x9458, 0x40, 0x0, 0x0, 0x8}, // XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) + { 0x9468, 0x40, 0x0, 0x0, 0x18}, // XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) + { 0x63010, 0x28, 0x0, 0x0, 0x28}, // XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) + { 0x9950, 0x8, 0x0, 0x0, 0x1}, // XSTORM_FUNC_EN_OFFSET(funcId) + { 0x9951, 0x8, 0x0, 0x0, 0x1}, // XSTORM_VF_TO_PF_OFFSET(funcId) + { 0x9952, 0x8, 0x0, 0x0, 0x1}, // XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // XSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // XSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x9bb8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + { 0x1, 0x0, 0x0, 0x0, 0x0}, // PCI_READ_KUKUE_CODE_OPPCOE + { 0x2, 0x0, 0x0, 0x0, 0x0}, // LOAD_CONTEXT_KUKUE_CODE_OPPCOE + { 0x3, 0x0, 0x0, 0x0, 0x0}, // QM_PAUSE_KUKUE_CODE_OPPCOE + { 0x4, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT0_KUKUE_CODE_OPPCOE + { 0x5, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT0_KUKUE_CODE_OPPCOE + { 0x6, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT1_KUKUE_CODE_OPPCOE + { 0x7, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XON_PORT1_KUKUE_CODE_OPPCOE + { 0x8, 0x0, 0x0, 0x0, 0x0}, // TEST_UNUSED_FOCS_KUKUE_CODE_OPPCOE + { 0x9, 0x0, 0x0, 0x0, 0x0}, // PBF_ECHO_KUKUE_CODE_OPPCOE + { 0xa, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT0_KUKUE_CODE_OPPCOE + { 0xb, 0x0, 0x0, 0x0, 0x0}, // TIME_SYNC_PORT1_KUKUE_CODE_OPPCOE + { 0xc, 0x0, 0x0, 0x0, 0x0}, // IGU_TEST_KUKUE_CODE_OPPCOE + { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX + { 0x9, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_INDEX + { 0x2, 0x0, 0x0, 0x0, 0x0}, // XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE + { 0xc4c0, 0x0, 0x0, 0x0, 0x20}, // XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + { 0xc4e6, 0x0, 0x0, 0x0, 0x1}, // XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET + { 0x6000, 0x20, 0x0, 0x0, 0x20}, // XSTORM_QUEUE_ZONE_OFFSET(queueId) + { 0x7300, 0x8, 0x0, 0x0, 0x8}, // XSTORM_VF_ZONE_OFFSET(vfId) + { 0x9bf0, 0x0, 0x0, 0x0, 0x1}, // XSTORM_FIVE_TUPLE_SRC_EN_OFFSET + { 0x9b90, 0x0, 0x0, 0x0, 0x8}, // XSTORM_E2_INTEG_RAM_OFFSET + { 0x9b93, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET + { 0x9b91, 0x0, 0x0, 0x0, 0x1}, // XSTORM_SIDE_INFO_INPUT_LSB_OFFSET + { 0x9b96, 0x0, 0x0, 0x0, 0x1}, // XSTORM_E2_INTEG_VLAN_ID_OFFSET + { 0x9b97, 0x0, 0x0, 0x0, 0x0}, // XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + { 0x60000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_DPM_BUFFER_OFFSET + { 0x9b98, 0x0, 0x0, 0x0, 0x1}, // XSTORM_KUKU_TEST_OPCODE_OFFSET + { 0x9bd8, 0x0, 0x0, 0x0, 0x8}, // XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x53, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_OP_GEN_VALUE + { 0x9be0, 0x0, 0x0, 0x0, 0x2}, // XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET + { 0x9be4, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_PAUSE_TEST_GROUP_OFFSET + { 0x9be5, 0x0, 0x0, 0x0, 0x1}, // XSTORM_QM_PAUSE_TEST_PORT_OFFSET + { 0x9, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_OPCODE + { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_INCVAL + { 0x44, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_REGION + { 0x1, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST + { 0x50, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_CID + { 0x89, 0x0, 0x0, 0x0, 0x0}, // XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE + { 0x9953, 0x8, 0x0, 0x0, 0x1}, // XSTORM_KUKU_TIME_SYNC_FLG_OFFSET(funcId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x16c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_COMMON_RTC_PARAMS_OFFSET + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // TSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x17d0, 0x8, 0x0, 0x0, 0x1}, // TSTORM_FUNC_EN_OFFSET(funcId) + { 0x17d1, 0x8, 0x0, 0x0, 0x1}, // TSTORM_VF_TO_PF_OFFSET(funcId) + { 0x17d2, 0x8, 0x0, 0x0, 0x1}, // TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x62078, 0x38, 0x0, 0x0, 0x38}, // TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) + { 0x16e0, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET + { 0x16e2, 0x0, 0x0, 0x0, 0x2}, // TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET + { 0xa040, 0x0, 0x0, 0x0, 0x20}, // TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) + { 0xe000, 0x20, 0x0, 0x0, 0x20}, // TSTORM_QUEUE_ZONE_OFFSET(queueId) + { 0xf300, 0x8, 0x0, 0x0, 0x8}, // TSTORM_VF_ZONE_OFFSET(vfId) + { 0x16f8, 0x0, 0x0, 0x0, 0xd8}, // TSTORM_E2_INTEG_RAM_OFFSET + { 0x173f, 0x0, 0x0, 0x0, 0x1}, // TSTORM_LSB_SIDE_BAND_INFO_OFFSET + { 0x1717, 0x0, 0x0, 0x0, 0x1}, // TSTORM_MSB_SIDE_BAND_INFO_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_LINE_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_TEST_RESULT_OFFSET + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_VFC_OP_GEN_VALUE + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + { 0x1778, 0x0, 0x0, 0x0, 0x1}, // TSTORM_KUKU_TEST_OPCODE_OFFSET + { 0x17b8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x51, 0x0, 0x0, 0x0, 0x0}, // TSTORM_KUKU_OP_GEN_VALUE + { 0x17a0, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + { 0x17a4, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + { 0x17a8, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + { 0x17ac, 0x0, 0x0, 0x0, 0x8}, // TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + { 0x1798, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET + { 0x17c8, 0x0, 0x0, 0x0, 0x2}, // TSTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + { 0x60000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_OFFSET(sbId) + { 0xc000, 0x40, 0x0, 0x0, 0x40}, // CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) + { 0xc02e, 0x40, 0x0, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) + { 0xc000, 0x40, 0x2, 0x0, 0x1}, // CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) + { 0xc001, 0x40, 0x2, 0x0, 0x0}, // CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) + { 0xe200, 0x20, 0x0, 0x0, 0x20}, // CSTORM_SYNC_BLOCK_OFFSET(sbId) + { 0xe204, 0x2, 0x8, 0x20, 0x2}, // CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) + { 0xe200, 0x8, 0x20, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) + { 0xf500, 0x28, 0x0, 0x0, 0x28}, // CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) + { 0xf640, 0x10, 0x0, 0x0, 0x10}, // CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) + { 0xf64a, 0x10, 0x0, 0x0, 0x1}, // CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) + { 0xf6c0, 0x20, 0x0, 0x0, 0x20}, // CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) + { 0xf6c0, 0x2, 0x20, 0x0, 0x2}, // CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) + { 0xf300, 0x40, 0x0, 0x0, 0x40}, // CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // CSTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // CSTORM_ASSERT_LIST_INDEX_OFFSET + { 0x11a8, 0x8, 0x0, 0x0, 0x1}, // CSTORM_FUNC_EN_OFFSET(funcId) + { 0x11a9, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_TO_PF_OFFSET(funcId) + { 0x11aa, 0x8, 0x0, 0x0, 0x1}, // CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x4000, 0x20, 0x4, 0x0, 0x10}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) + { 0x5900, 0x30, 0x18, 0x0, 0x10}, // CSTORM_EVENT_RING_DATA_OFFSET(pfId) + { 0x5908, 0x30, 0x18, 0x0, 0x2}, // CSTORM_EVENT_RING_PROD_OFFSET(pfId) + { 0x5700, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) + { 0x5701, 0x8, 0x0, 0x0, 0x1}, // CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) + { 0x1158, 0x0, 0x0, 0x0, 0x1}, // CSTORM_IGU_MODE_OFFSET + { 0x1160, 0x0, 0x0, 0x0, 0x10}, // CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + { 0x11ac, 0x8, 0x0, 0x0, 0x4}, // CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) + { 0x4000, 0x20, 0x0, 0x0, 0x20}, // CSTORM_QUEUE_ZONE_OFFSET(queueId) + { 0x5300, 0x10, 0x0, 0x0, 0x10}, // CSTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + { 0x1470, 0x0, 0x0, 0x0, 0x1}, // CSTORM_KUKU_TEST_OPCODE_OFFSET + { 0x14b0, 0x0, 0x0, 0x0, 0x8}, // CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x50, 0x0, 0x0, 0x0, 0x0}, // CSTORM_KUKU_OP_GEN_VALUE + { 0x1478, 0x0, 0x0, 0x0, 0x4}, // CSTORM_IGU_TEST_PF_ID_OFFSET + { 0x147c, 0x0, 0x0, 0x0, 0x4}, // CSTORM_IGU_TEST_VF_ID_OFFSET + { 0x1480, 0x0, 0x0, 0x0, 0x4}, // CSTORM_IGU_TEST_VF_VALID_OFFSET + { 0x1484, 0x0, 0x0, 0x0, 0x4}, // CSTORM_IGU_TEST_ADDRESS_OFFSET + { 0x1488, 0x0, 0x0, 0x0, 0x8}, // CSTORM_IGU_TEST_IGU_COMMAND_OFFSET + { 0x2af0, 0x80, 0x0, 0x0, 0x80}, // USTORM_INDIRECTION_TABLE_OFFSET(portId) + { 0x1, 0x0, 0x0, 0x0, 0x0}, // USTORM_INDIRECTION_TABLE_ENTRY_SIZE + { 0x2008, 0x10, 0x0, 0x0, 0x10}, // USTORM_ASSERT_LIST_OFFSET(assertListEntry) + { 0x2000, 0x0, 0x0, 0x0, 0x8}, // USTORM_ASSERT_LIST_INDEX_OFFSET + { 0x2c70, 0x8, 0x0, 0x0, 0x1}, // USTORM_FUNC_EN_OFFSET(funcId) + { 0x2c71, 0x8, 0x0, 0x0, 0x1}, // USTORM_VF_TO_PF_OFFSET(funcId) + { 0x2c72, 0x8, 0x0, 0x0, 0x1}, // USTORM_RECORD_SLOW_PATH_OFFSET(funcId) + { 0x4158, 0x38, 0x0, 0x0, 0x38}, // USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) + { 0x2c44, 0x8, 0x0, 0x0, 0x2}, // USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) + { 0x2c46, 0x8, 0x0, 0x0, 0x2}, // USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) + { 0x2c54, 0x10, 0x0, 0x0, 0x4}, // USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) + { 0x2eb0, 0x0, 0x0, 0x0, 0x20}, // USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET + { 0x6000, 0x20, 0x0, 0x0, 0x20}, // USTORM_QUEUE_ZONE_OFFSET(queueId) + { 0x7300, 0x8, 0x0, 0x0, 0x8}, // USTORM_VF_ZONE_OFFSET(vfId) + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX + { 0x0, 0x0, 0x0, 0x0, 0x0}, // USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX + { 0x2f58, 0x0, 0x0, 0x0, 0x1}, // USTORM_KUKU_TEST_OPCODE_OFFSET + { 0x2f98, 0x0, 0x0, 0x0, 0x8}, // USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET + { 0x50, 0x0, 0x0, 0x0, 0x0}, // USTORM_KUKU_OP_GEN_VALUE + { 0x2f80, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET + { 0x2f84, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET + { 0x2f88, 0x0, 0x0, 0x0, 0x4}, // USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET + { 0x2f8c, 0x0, 0x0, 0x0, 0x8}, // USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET + { 0x2fa8, 0x0, 0x0, 0x0, 0x2}, // USTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) + { 0x3128, 0x0, 0x0, 0x0, 0x8}, // TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET + { 0x62a20, 0x2600, 0x40, 0x0, 0x8}, // USTORM_CQE_PAGE_NEXT_OFFSET(portId,clientId) + { 0xa000, 0x0, 0x0, 0x0, 0x2000}, // USTORM_AGG_DATA_OFFSET + { 0x40c1, 0x0, 0x0, 0x0, 0x1}, // USTORM_TPA_BTR_OFFSET + { 0x40f0, 0x0, 0x0, 0x0, 0x2}, // USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET + {UNDEF_IRO, 0x0, 0x0, 0x0, 0x0}, // USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) + { 0x6000, 0x20, 0x0, 0x0, 0x8}, // USTORM_RX_PRODS_E2_OFFSET(qzoneId) + { 0x4000, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) + { 0x4001, 0x8, 0x0, 0x0, 0x1}, // XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) + { 0x4040, 0x8, 0x4, 0x0, 0x2}, // XSTORM_TCP_IPID_OFFSET(pfId) + { 0x4060, 0x8, 0x4, 0x0, 0x4}, // XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) + { 0x4080, 0x8, 0x0, 0x0, 0x4}, // XSTORM_TCP_TX_SWITCHING_EN_OFFSET(portId) + { 0x4000, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) + { 0x4004, 0x8, 0x0, 0x0, 0x4}, // TSTORM_TCP_MAX_CWND_OFFSET(pfId) + { 0x4040, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_GLOBAL_PARAMS_OFFSET + { 0x4048, 0x0, 0x0, 0x0, 0x8}, // TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET + { 0x8000, 0x0, 0x0, 0x0, 0x10}, // TSTORM_TCP_ISLES_ARRAY_OFFSET + { 0x5040, 0x1, 0x4, 0x0, 0x1}, // XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) + { 0x5000, 0x0, 0x0, 0x0, 0x20}, // XSTORM_OUT_OCTETS_OFFSET + { 0x5008, 0x10, 0x0, 0x0, 0x4}, // TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) + { 0x500c, 0x10, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) + { 0x52c7, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_MAX_DOMINANCE_VALUE_OFFSET + { 0x52c6, 0x0, 0x0, 0x0, 0x1}, // TSTORM_TOE_DOMINANCE_THRESHOLD_OFFSET + { 0x3000, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0x3004, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0x3008, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0x300a, 0x40, 0x20, 0x0, 0x2}, // CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0x300c, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0x300d, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0x300e, 0x40, 0x20, 0x0, 0x1}, // CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x3010, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0x3014, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0x3018, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_PROD_OFFSET(rssId,portId) + { 0x301c, 0x40, 0x20, 0x0, 0x4}, // CSTORM_TOE_DYNAMIC_HC_CONS_OFFSET(rssId,portId) + { 0xc000, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) + { 0xc004, 0x100, 0x80, 0x8, 0x4}, // USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) + { 0xa, 0x0, 0x0, 0x0, 0x0}, // USTORM_TOE_GRQ_CACHE_NUM_BDS + { 0xc068, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) + { 0xc069, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) + { 0xc06c, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) + { 0xc06e, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) + { 0xc070, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0xc074, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0xc066, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) + { 0xc064, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) + { 0xc060, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) + { 0xc062, 0x100, 0x80, 0x0, 0x2}, // USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) + { 0xc050, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) + { 0xc054, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) + { 0xc058, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) + { 0xc05c, 0x100, 0x80, 0x0, 0x4}, // USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) + { 0xc07c, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) + { 0xc07d, 0x100, 0x80, 0x0, 0x1}, // USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) + { 0x1018, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) + { 0x1090, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) + { 0x1098, 0x10, 0x0, 0x0, 0x4}, // USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) + { 0x1110, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_LOW_OFFSET + { 0x1112, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_LOW_OFFSET + { 0x1114, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_CQ_THR_HIGH_OFFSET + { 0x1116, 0x0, 0x0, 0x0, 0x2}, // USTORM_TOE_GRQ_THR_HIGH_OFFSET + { 0x6040, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x6042, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6044, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6046, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) + { 0x6080, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x6000, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x6002, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x6004, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x60c0, 0x8, 0x0, 0x0, 0x8}, // TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x6100, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) + { 0x6104, 0x8, 0x0, 0x0, 0x1}, // TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) + { 0x6140, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) + { 0x6144, 0x8, 0x0, 0x0, 0x2}, // TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) + { 0x6180, 0x8, 0x0, 0x0, 0x4}, // TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) + { 0x3000, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x3002, 0x8, 0x0, 0x0, 0x1}, // USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x3004, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x3040, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x3044, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x3046, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + { 0x3660, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) + { 0x3080, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) + { 0x3084, 0x8, 0x0, 0x0, 0x2}, // USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) + { 0x36a0, 0x8, 0x0, 0x0, 0x8}, // USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) + { 0x8040, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) + { 0x8041, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) + { 0x8042, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) + { 0x8043, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) + { 0x8000, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x8002, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x8004, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x80c0, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x80c2, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) + { 0x80c4, 0x8, 0x0, 0x0, 0x2}, // XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) + { 0x8080, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) + { 0x8081, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) + { 0x8082, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) + { 0x8083, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) + { 0x8084, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) + { 0x8085, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) + { 0x8086, 0x8, 0x0, 0x0, 0x1}, // XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) + { 0x6000, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) + { 0x6002, 0x8, 0x0, 0x0, 0x1}, // CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) + { 0x6004, 0x8, 0x0, 0x0, 0x2}, // CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) + { 0x6042, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) + { 0x6040, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) + { 0x604c, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x6044, 0xc0, 0x18, 0x0, 0x8}, // CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) + { 0x6057, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) + { 0x6054, 0xc0, 0x18, 0x0, 0x2}, // CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) + { 0x6056, 0xc0, 0x18, 0x0, 0x1}, // CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) + { 0x6640, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) + { 0x6680, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) + { 0x66c0, 0x8, 0x0, 0x0, 0x8}, // CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) + { 0xda82, 0x18, 0x0, 0x0, 0x2}, // USTORM_FCOE_EQ_PROD_OFFSET(pfId) + { 0xdba0, 0x0, 0x0, 0x0, 0x0}, // USTORM_FCOE_TIMER_PARAM_OFFSET + { 0xe000, 0x0, 0x0, 0x0, 0x4}, // USTORM_TIMER_ARRAY_OFFSET + { 0xd100, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FC_CRC_CNT_OFFSET + { 0xd104, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_EOFA_DEL_CNT_OFFSET + { 0xd108, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_MISS_FRAME_CNT_OFFSET + { 0xd10c, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET + { 0xd110, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_DROP_SEQ_CNT_OFFSET + { 0xd114, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + { 0xd118, 0x0, 0x0, 0x0, 0x4}, // USTORM_STAT_FCP_RX_PKT_CNT_OFFSET + { 0xd100, 0x0, 0x0, 0x0, 0x20}, // USTORM_STAT_OFFSET + { 0x9280, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_DROP_PKT_CNT_OFFSET + { 0x9280, 0x0, 0x0, 0x0, 0x28}, // USTORM_DEBUG_OFFSET + { 0x8050, 0xa8, 0x0, 0x0, 0x1}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_ONE_OFFSET(cached_tbl_size) + { 0x8054, 0xa8, 0x0, 0x0, 0x1}, // USTORM_CACHED_TCE_MNG_INFO_DWORD_TWO_OFFSET(cached_tbl_size) + { 0x8000, 0x0, 0x0, 0x0, 0x50}, // USTORM_CACHED_TCE_ENTRY_TCE_OFFSET + { 0x8050, 0x0, 0x0, 0x0, 0x10}, // USTORM_CACHED_TCE_ENTRY_MNG_INFO_OFFSET + { 0x9600, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_CACHED_TCE_TBL_BIT_MAP_OFFSET + { 0x9400, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_WAIT_4_BD_READ_OFFSET + { 0x9404, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_DATA_OFFSET + { 0x9408, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_NON_DATA_OFFSET + { 0x940c, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_ERR_OFFSET + { 0x9410, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_GLOBAL_TIMER_TASK_IN_USE_OFFSET + { 0x9414, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_DEL_CACHED_TASK_OFFSET + { 0x9418, 0x0, 0x0, 0x0, 0x4}, // USTORM_DEBUG_CACHED_TCE_SILENT_DROP_CACHED_TASK_OFFSET + { 0x9400, 0x0, 0x0, 0x0, 0x40}, // USTORM_DEBUG_CACHED_TCE_OFFSET + { 0x9420, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_DROP_OFFSET + { 0x9424, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_CRC_ERROR_OFFSET + { 0x9428, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_ERROR_OFFSET + { 0x941c, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_PREVIOUS_THREAD_OFFSET + { 0x9430, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DATA_IN_OFFSET + { 0x942c, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_READ_TCE_OFFSET + { 0x9434, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DROP_ERR_OFFSET + { 0x9284, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_ERRORS_NUMBER_OFFSET + { 0x9280, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_NUMBER_OFFSET + { 0x9290, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_BITMAP_OFFSET + { 0x92a4, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_ENABLE_CONN_RACE_OFFSET + { 0x9438, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_TASK_IN_USE_OFFSET + { 0x943c, 0x0, 0x0, 0x0, 0x4}, // USTORM_FCOE_DEBUG_PARAMS_CRC_ERROR_TASK_IN_USE_OFFSET + { 0xb988, 0x0, 0x0, 0x0, 0x0}, // XSTORM_FCOE_TIMER_PARAM_OFFSET + { 0xd000, 0x0, 0x0, 0x0, 0x4}, // XSTORM_TIMER_ARRAY_OFFSET + { 0xb100, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET + { 0xb104, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET + { 0xb108, 0x0, 0x0, 0x0, 0x4}, // XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET + { 0xb100, 0x0, 0x0, 0x0, 0x10}, // XSTORM_STAT_OFFSET + { 0xbcb0, 0x0, 0x0, 0x0, 0x4}, // XSTORM_DEBUG_ABTS_BLOCK_SQ_CNT_OFFSET + { 0xbcb4, 0x0, 0x0, 0x0, 0x4}, // XSTORM_DEBUG_CLEANUP_BLOCK_SQ_CNT_OFFSET + { 0xbcb0, 0x0, 0x0, 0x0, 0x48}, // XSTORM_DEBUG_OFFSET + { 0xd858, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_VER_CNT_OFFSET + { 0xd850, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET + { 0xd854, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET + { 0xd85c, 0x0, 0x0, 0x0, 0x4}, // TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET + { 0xd850, 0x0, 0x0, 0x0, 0x10}, // TSTORM_STAT_OFFSET + { 0xd840, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PORT_DEBUG_WAIT_FOR_YOUR_TURN_SP_CNT_OFFSET + { 0xd844, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PORT_DEBUG_AFEX_ERROR_PACKETS_OFFSET + { 0xd840, 0x0, 0x0, 0x0, 0x8}, // TSTORM_PORT_DEBUG_OFFSET + { 0xd4c8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_DATA_OFFSET + { 0xd4d8, 0x0, 0x0, 0x0, 0x80}, // TSTORM_REORDER_WAITING_TABLE_OFFSET + { 0x10, 0x0, 0x0, 0x0, 0x0}, // TSTORM_WAITING_LIST_SIZE + { 0xd4d8, 0x0, 0x0, 0x0, 0x8}, // TSTORM_REORDER_WAITING_ENTRY_OFFSET }; diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_cmn.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_cmn.c new file mode 100644 index 0000000..c1b62d5 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_cmn.c @@ -0,0 +1,4663 @@ +/* bnx2x_cmn.c: Broadcom Everest network driver. + * + * Copyright (c) 2007-2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + * + * Maintained by: Eilon Greenstein + * Written by: Eliezer Tamir + * Based on code from Michael Chan's bnx2 driver + * UDP CSUM errata workaround by Arik Gendelman + * Slowpath and fastpath rework by Vladislav Zolotarov + * Statistics and Link management by Yitchak Gertner + * + */ +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#include +#include +#endif +#include +#include +#include +#include +#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ +#include +#else +#include +#endif +#if (LINUX_VERSION_CODE > 0x020607) /* BNX2X_UPSTREAM */ +#include +#endif +#include +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#include +#endif +#if (LINUX_VERSION_CODE < 0x020600) /* ! BNX2X_UPSTREAM */ +#define __NO_TPA__ 1 +#endif +#include "bnx2x_cmn.h" +#include "bnx2x_init.h" +#include "bnx2x_sp.h" + +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ +#include "bnx2x_esx.h" +#endif + +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ +#include "bnx2x_sriov.h" +#endif +#ifdef BCM_CNIC +/** + * bnx2x_move_fp - move content of the fastpath structure. + * + * @bp: driver handle + * @from: source FP index + * @to: destination FP index + * + * Makes sure the contents of the bp->fp[to].napi is kept + * intact. This is done by first copying the napi struct from + * the target to the source, and then mem copying the entire + * source onto the target. Update txdata pointers and related + * content. + */ +static inline void bnx2x_move_fp(struct bnx2x *bp, int from, int to) +{ + struct bnx2x_fastpath *from_fp = &bp->fp[from]; + struct bnx2x_fastpath *to_fp = &bp->fp[to]; + int old_max_eth_txqs, new_max_eth_txqs; + int old_txdata_index, new_txdata_index; + +#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ + /* Copy the NAPI object as it has been already initialized */ + from_fp->napi = to_fp->napi; +#endif +#if !defined(BNX2X_NEW_NAPI) /* ! BNX2X_UPSTREAM */ + /* Copy the "dummy" netdev object as it has been already + * initialized. + */ + from_fp->dummy_netdev = to_fp->dummy_netdev; +#endif + + /* Move bnx2x_fastpath contents */ + memcpy(to_fp, from_fp, sizeof(*to_fp)); + to_fp->index = to; + + /* Update txdata pointers in fp and move txdata content accordingly: + * Each fp consumes 'max_cos' txdata structures, so the index should be + * decremented by max_cos x delta. + */ + + old_max_eth_txqs = BNX2X_NUM_ETH_QUEUES(bp) * (bp)->max_cos; + new_max_eth_txqs = (BNX2X_NUM_ETH_QUEUES(bp) - from + to) * + (bp)->max_cos; + if (from == FCOE_IDX) { + old_txdata_index = old_max_eth_txqs + FCOE_TXQ_IDX_OFFSET; + new_txdata_index = new_max_eth_txqs + FCOE_TXQ_IDX_OFFSET; + } else if (from == FWD_IDX(bp)) { + old_txdata_index = old_max_eth_txqs + FWD_TXQ_IDX_OFFSET; + new_txdata_index = new_max_eth_txqs + FWD_TXQ_IDX_OFFSET; + } else { /* OOO_IDX */ + old_txdata_index = old_max_eth_txqs + OOO_TXQ_IDX_OFFSET; + new_txdata_index = new_max_eth_txqs + OOO_TXQ_IDX_OFFSET; + } + + memcpy(&bp->bnx2x_txq[new_txdata_index], + &bp->bnx2x_txq[old_txdata_index], + sizeof(struct bnx2x_fp_txdata)); + to_fp->txdata_ptr[0] = &bp->bnx2x_txq[new_txdata_index]; +} +#endif /* CNIC */ + +int load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */ + +/* free skb in the packet ring at pos idx + * return idx of last bd freed + */ +static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata, + u16 idx, unsigned int *pkts_compl, + unsigned int *bytes_compl) +{ + struct sw_tx_bd *tx_buf = &txdata->tx_buf_ring[idx]; + struct eth_tx_start_bd *tx_start_bd; + struct eth_tx_bd *tx_data_bd; + struct sk_buff *skb = tx_buf->skb; + u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons; + int nbd; + + /* prefetch skb end pointer to speedup dev_kfree_skb() */ + prefetch(&skb->end); + + DP(NETIF_MSG_TX_DONE, "fp[%d]: pkt_idx %d buff @(%p)->skb %p\n", + txdata->txq_index, idx, tx_buf, skb); + + /* unmap first bd */ + tx_start_bd = &txdata->tx_desc_ring[bd_idx].start_bd; +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd), + BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE); +#else + pci_unmap_single(bp->pdev, BD_UNMAP_ADDR(tx_start_bd), + BD_UNMAP_LEN(tx_start_bd), PCI_DMA_TODEVICE); +#endif + + + nbd = le16_to_cpu(tx_start_bd->nbd) - 1; +#ifdef BNX2X_STOP_ON_ERROR + if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) { + BNX2X_ERR("BAD nbd!\n"); + bnx2x_panic(); + } +#endif + new_cons = nbd + tx_buf->first_bd; + + /* Get the next bd */ + bd_idx = TX_BD(NEXT_TX_IDX(bd_idx)); + + /* Skip a parse bd... */ + --nbd; + bd_idx = TX_BD(NEXT_TX_IDX(bd_idx)); + + /* ...and the TSO split header bd since they have no mapping */ + if (tx_buf->flags & BNX2X_TSO_SPLIT_BD) { + --nbd; + bd_idx = TX_BD(NEXT_TX_IDX(bd_idx)); + } + + /* now free frags */ + while (nbd > 0) { + + tx_data_bd = &txdata->tx_desc_ring[bd_idx].reg_bd; +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_page(&bp->pdev->dev, BD_UNMAP_ADDR(tx_data_bd), + BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); +#else + pci_unmap_page(bp->pdev, BD_UNMAP_ADDR(tx_data_bd), + BD_UNMAP_LEN(tx_data_bd), PCI_DMA_TODEVICE); +#endif + if (--nbd) + bd_idx = TX_BD(NEXT_TX_IDX(bd_idx)); + } + + /* release skb */ + WARN_ON(!skb); + if (likely(skb)) { + (*pkts_compl)++; + (*bytes_compl) += skb->len; + } + + dev_kfree_skb_any(skb); + tx_buf->first_bd = 0; + tx_buf->skb = NULL; + + return new_cons; +} + +int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata) +{ + struct netdev_queue *txq; + u16 hw_cons, sw_cons, bd_cons = txdata->tx_bd_cons; + unsigned int pkts_compl = 0, bytes_compl = 0; + +#ifdef BNX2X_STOP_ON_ERROR + if (unlikely(bp->panic)) + return -1; +#endif + + txq = netdev_get_tx_queue(bp->dev, txdata->txq_index); + + hw_cons = le16_to_cpu(*txdata->tx_cons_sb); + sw_cons = txdata->tx_pkt_cons; + + while (sw_cons != hw_cons) { + u16 pkt_cons; + + pkt_cons = TX_BD(sw_cons); + + DP(NETIF_MSG_TX_DONE, + "queue[%d]: hw_cons %u sw_cons %u pkt_cons %u\n", + txdata->txq_index, hw_cons, sw_cons, pkt_cons); + + bd_cons = bnx2x_free_tx_pkt(bp, txdata, pkt_cons, + &pkts_compl, &bytes_compl); + + sw_cons++; + } + + netdev_tx_completed_queue(txq, pkts_compl, bytes_compl); + + txdata->tx_pkt_cons = sw_cons; + txdata->tx_bd_cons = bd_cons; + + /* Need to make the tx_bd_cons update visible to start_xmit() + * before checking for netif_tx_queue_stopped(). Without the + * memory barrier, there is a small possibility that + * start_xmit() will miss it and cause the queue to be stopped + * forever. + * On the other hand we need an rmb() here to ensure the proper + * ordering of bit testing in the following + * netif_tx_queue_stopped(txq) call. + */ + smp_mb(); + +#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ + if (unlikely(netif_tx_queue_stopped(txq))) { + /* Taking tx_lock() is needed to prevent reenabling the queue + * while it's empty. This could have happen if rx_action() gets + * suspended in bnx2x_tx_int() after the condition before + * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()): + * + * stops the queue->sees fresh tx_bd_cons->releases the queue-> + * sends some packets consuming the whole queue again-> + * stops the queue + */ + + __netif_tx_lock(txq, smp_processor_id()); + + if ((netif_tx_queue_stopped(txq)) && + (bp->state == BNX2X_STATE_OPEN) && + (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3)) + netif_tx_wake_queue(txq); + + __netif_tx_unlock(txq); + } +#else + if (unlikely(netif_queue_stopped(bp->dev))) { + + netif_tx_lock(bp->dev); + + if (netif_queue_stopped(bp->dev) && + (bp->state == BNX2X_STATE_OPEN) && + (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3)) + netif_wake_queue(bp->dev); + + netif_tx_unlock(bp->dev); + } +#endif + return 0; +} + +#if !defined(__NO_TPA__) /* BNX2X_UPSTREAM */ +static inline void bnx2x_update_last_max_sge(struct bnx2x_fastpath *fp, + u16 idx) +{ + u16 last_max = fp->last_max_sge; + + if (SUB_S16(idx, last_max) > 0) + fp->last_max_sge = idx; +} + +static inline void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp, + u16 sge_len, + struct eth_end_agg_rx_cqe *cqe) +{ + struct bnx2x *bp = fp->bp; + u16 last_max, last_elem, first_elem; + u16 delta = 0; + u16 i; + + if (!sge_len) + return; + + /* First mark all used pages */ + for (i = 0; i < sge_len; i++) + BIT_VEC64_CLEAR_BIT(fp->sge_mask, + RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[i]))); + + DP(NETIF_MSG_RX_STATUS, "fp_cqe->sgl[%d] = %d\n", + sge_len - 1, le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1])); + + /* Here we assume that the last SGE index is the biggest */ + prefetch((void *)(fp->sge_mask)); + bnx2x_update_last_max_sge(fp, + le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1])); + + last_max = RX_SGE(fp->last_max_sge); + last_elem = last_max >> BIT_VEC64_ELEM_SHIFT; + first_elem = RX_SGE(fp->rx_sge_prod) >> BIT_VEC64_ELEM_SHIFT; + + /* If ring is not full */ + if (last_elem + 1 != first_elem) + last_elem++; + + /* Now update the prod */ + for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) { + if (likely(fp->sge_mask[i])) + break; + + fp->sge_mask[i] = BIT_VEC64_ELEM_ONE_MASK; + delta += BIT_VEC64_ELEM_SZ; + } + + if (delta > 0) { + fp->rx_sge_prod += delta; + /* clear page-end entries */ + bnx2x_clear_sge_mask_next_elems(fp); + } + + DP(NETIF_MSG_RX_STATUS, + "fp->last_max_sge = %d fp->rx_sge_prod = %d\n", + fp->last_max_sge, fp->rx_sge_prod); +} + +/* Get Toeplitz hash value in the skb using the value from the + * CQE (calculated by HW). + */ +static u32 bnx2x_get_rxhash(const struct bnx2x *bp, + const struct eth_fast_path_rx_cqe *cqe) +{ +#if (LINUX_VERSION_CODE > 0x020622) /* BNX2X_UPSTREAM */ + /* Get Toeplitz hash from CQE */ + if ((bp->dev->features & NETIF_F_RXHASH) && + (cqe->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG)) + return le32_to_cpu(cqe->rss_hash_result); +#endif + return 0; +} + +static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue, + u16 cons, u16 prod, + struct eth_fast_path_rx_cqe *cqe) +{ + struct bnx2x *bp = fp->bp; + struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; + struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; + struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; + dma_addr_t mapping; + struct bnx2x_agg_info *tpa_info = &fp->tpa_info[queue]; + struct sw_rx_bd *first_buf = &tpa_info->first_buf; + + /* print error if current state != stop */ + if (tpa_info->tpa_state != BNX2X_TPA_STOP) + BNX2X_ERR("start of bin not in stop [%d]\n", queue); + + /* Try to map an empty data buffer from the aggregation info */ +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + mapping = dma_map_single(&bp->pdev->dev, + first_buf->data + NET_SKB_PAD, + fp->rx_buf_size, DMA_FROM_DEVICE); +#else + mapping = dma_map_single(&bp->pdev->dev, + first_buf->data->data, + fp->rx_buf_size, DMA_FROM_DEVICE); +#endif +#else + mapping = pci_map_single(bp->pdev, + first_buf->data->data, + fp->rx_buf_size, PCI_DMA_FROMDEVICE); +#endif + /* + * ...if it fails - move the skb from the consumer to the producer + * and set the current aggregation state as ERROR to drop it + * when TPA_STOP arrives. + */ + +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { +#else + if (unlikely(dma_mapping_error(mapping))) { +#endif + /* Move the BD from the consumer to the producer */ + bnx2x_reuse_rx_data(fp, cons, prod); + tpa_info->tpa_state = BNX2X_TPA_ERROR; + return; + } + + /* move empty data from pool to prod */ + prod_rx_buf->data = first_buf->data; +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_addr_set(prod_rx_buf, mapping, mapping); +#else + pci_unmap_addr_set(prod_rx_buf, mapping, mapping); +#endif + /* point prod_bd to new data */ + prod_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); + prod_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); + + /* move partial skb from cons to pool (don't unmap yet) */ + *first_buf = *cons_rx_buf; + + /* mark bin state as START */ + tpa_info->parsing_flags = + le16_to_cpu(cqe->pars_flags.flags); + tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag); + tpa_info->tpa_state = BNX2X_TPA_START; + tpa_info->len_on_bd = le16_to_cpu(cqe->len_on_bd); + tpa_info->placement_offset = cqe->placement_offset; + tpa_info->rxhash = bnx2x_get_rxhash(bp, cqe); + if (fp->mode == TPA_MODE_GRO) { + u16 gro_size = le16_to_cpu(cqe->pkt_len_or_gro_seg_len); + tpa_info->full_page = SGE_PAGES / gro_size * gro_size; + tpa_info->gro_size = gro_size; + } + +#ifdef BNX2X_STOP_ON_ERROR + fp->tpa_queue_used |= (1 << queue); +#if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ +#ifdef _ASM_GENERIC_INT_L64_H + DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n", +#else + DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n", +#endif +#else +#if defined(__powerpc64__) || defined(_ASM_IA64_TYPES_H) + DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n", +#else + DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n", +#endif +#endif + fp->tpa_queue_used); +#endif +} + +/* Timestamp option length allowed for TPA aggregation: + * + * nop nop kind length echo val + */ +#define TPA_TSTAMP_OPT_LEN 12 +/** + * bnx2x_set_lro_mss - calculate the approximate value of the MSS + * + * @bp: driver handle + * @parsing_flags: parsing flags from the START CQE + * @len_on_bd: total length of the first packet for the + * aggregation. + * + * Approximate value of the MSS for this aggregation calculated using + * the first packet of it. + */ +static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags, + u16 len_on_bd) +{ + /* + * TPA arrgregation won't have either IP options or TCP options + * other than timestamp or IPv6 extension headers. + */ + u16 hdrs_len = ETH_HLEN + sizeof(struct tcphdr); + + if (GET_FLAG(parsing_flags, PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) == + PRS_FLAG_OVERETH_IPV6) + hdrs_len += sizeof(struct ipv6hdr); + else /* IPv4 */ + hdrs_len += sizeof(struct iphdr); + +#if defined(OLD_VLAN) /* ! BNX2X_UPSTREAM */ +#ifdef BCM_VLAN + /* There is VLAN on data, take into an account */ + if ((bp->vlgrp == NULL) && (parsing_flags & PARSING_FLAGS_VLAN)) +#else + if (parsing_flags & PARSING_FLAGS_VLAN) +#endif + hdrs_len += VLAN_HLEN; +#endif + + /* Check if there was a TCP timestamp, if there is it's will + * always be 12 bytes length: nop nop kind length echo val. + * + * Otherwise FW would close the aggregation. + */ + if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG) + hdrs_len += TPA_TSTAMP_OPT_LEN; + + return len_on_bd - hdrs_len; +} + +static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, + struct bnx2x_agg_info *tpa_info, + u16 pages, + struct sk_buff *skb, + struct eth_end_agg_rx_cqe *cqe, + u16 cqe_idx) +{ + struct sw_rx_page *rx_pg, old_rx_pg; + u32 i, frag_len, frag_size; + int err, j, frag_id = 0; + u16 len_on_bd = tpa_info->len_on_bd; + u16 full_page = 0, gro_size = 0; + + frag_size = le16_to_cpu(cqe->pkt_len) - len_on_bd; + + if (fp->mode == TPA_MODE_GRO) { + gro_size = tpa_info->gro_size; + full_page = tpa_info->full_page; + } + +#ifndef __VMKLNX__ /* BNX2X_UPSTREAM */ + /* This is needed in order to enable forwarding support */ + if (frag_size) { + skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp, + tpa_info->parsing_flags, len_on_bd); + +#ifndef NO_GRO_SUPPORT /* BNX2X_UPSTREAM */ + /* set for GRO */ + if (fp->mode == TPA_MODE_GRO) + skb_shinfo(skb)->gso_type = + (GET_FLAG(tpa_info->parsing_flags, + PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) == + PRS_FLAG_OVERETH_IPV6) ? + SKB_GSO_TCPV6 : SKB_GSO_TCPV4; +#endif + } + +#else /* __VMKLNX__ */ + if (frag_size) { + skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp, + tpa_info->parsing_flags, len_on_bd); + if (skb_shinfo(skb)->gso_size) + skb_shinfo(skb)->gso_type = + (GET_FLAG(tpa_info->parsing_flags, + PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) == + PRS_FLAG_OVERETH_IPV6) ? + SKB_GSO_TCPV6 : SKB_GSO_TCPV4; + } +#endif + +#ifdef BNX2X_STOP_ON_ERROR + if (pages > min_t(u32, 8, MAX_SKB_FRAGS) * SGE_PAGES) { + BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n", + pages, cqe_idx); + BNX2X_ERR("cqe->pkt_len = %d\n", cqe->pkt_len); + bnx2x_panic(); + return -EINVAL; + } +#endif + + /* Run through the SGL and compose the fragmented skb */ + for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) { + u16 sge_idx = RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[j])); + + /* FW gives the indices of the SGE as if the ring is an array + (meaning that "next" element will consume 2 indices) */ + if (fp->mode == TPA_MODE_GRO) + frag_len = min_t(u32, frag_size, (u32)full_page); + else /* LRO */ + frag_len = min_t(u32, frag_size, (u32)SGE_PAGES); + + rx_pg = &fp->rx_page_ring[sge_idx]; + old_rx_pg = *rx_pg; + + /* If we fail to allocate a substitute page, we simply stop + where we are and drop the whole packet */ + err = bnx2x_alloc_rx_sge(bp, fp, sge_idx); + if (unlikely(err)) { + fp->eth_q_stats.rx_skb_alloc_failed++; + return err; + } + + /* Unmap the page as we r going to pass it to the stack */ +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_page(&bp->pdev->dev, + dma_unmap_addr(&old_rx_pg, mapping), + SGE_PAGES, DMA_FROM_DEVICE); +#else + pci_unmap_page(bp->pdev, pci_unmap_addr(&old_rx_pg, mapping), + SGE_PAGES, PCI_DMA_FROMDEVICE); +#endif + /* Add one frag and update the appropriate fields in the skb */ + if (fp->mode == TPA_MODE_LRO) + skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len); + else { /* GRO */ + int rem; + int offset = 0; + for (rem = frag_len; rem > 0; rem -= gro_size) { + int len = rem > gro_size ? gro_size : rem; + skb_fill_page_desc(skb, frag_id++, + old_rx_pg.page, offset, len); +#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ + if (offset) + get_page(old_rx_pg.page); +#endif + offset += len; + } + } + + skb->data_len += frag_len; + skb->truesize += SGE_PAGES; + skb->len += frag_len; + + frag_size -= frag_len; + } + + return 0; +} + +static inline void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp, + struct bnx2x_agg_info *tpa_info, + u16 pages, + struct eth_end_agg_rx_cqe *cqe, + u16 cqe_idx) +{ + struct sw_rx_bd *rx_buf = &tpa_info->first_buf; + u8 pad = tpa_info->placement_offset; + u16 len = tpa_info->len_on_bd; + struct sk_buff *skb = NULL; +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + u8 *new_data, *data = rx_buf->data; +#else + struct sk_buff *new_data, *data = rx_buf->data; +#endif + u8 old_tpa_state = tpa_info->tpa_state; + + tpa_info->tpa_state = BNX2X_TPA_STOP; + + /* If we there was an error during the handling of the TPA_START - + * drop this aggregation. + */ + if (old_tpa_state == BNX2X_TPA_ERROR) + goto drop; + + /* Try to allocate the new data */ +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + new_data = kmalloc(fp->rx_buf_size + NET_SKB_PAD, GFP_ATOMIC); +#else + new_data = netdev_alloc_skb(bp->dev, fp->rx_buf_size); +#endif + + /* Unmap skb in the pool anyway, as we are going to change + pool entry status to BNX2X_TPA_STOP even if new skb allocation + fails. */ +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping), + fp->rx_buf_size, DMA_FROM_DEVICE); +#else + pci_unmap_single(bp->pdev, pci_unmap_addr(rx_buf, mapping), + fp->rx_buf_size, PCI_DMA_FROMDEVICE); +#endif +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + if (likely(new_data)) + skb = build_skb(data); + + if (likely(skb)) { +#else + skb = data; + + if (likely(new_data)) { + prefetch(skb); + prefetch(((char *)(skb)) + L1_CACHE_BYTES); +#endif +#ifdef BNX2X_STOP_ON_ERROR + if (pad + len > fp->rx_buf_size) { + BNX2X_ERR("skb_put is about to fail... pad %d len %d rx_buf_size %d\n", + pad, len, fp->rx_buf_size); + bnx2x_panic(); + return; + } +#endif + +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + skb_reserve(skb, pad + NET_SKB_PAD); +#else + skb_reserve(skb, pad); +#endif + skb_put(skb, len); +#if (LINUX_VERSION_CODE > 0x020622) /* BNX2X_UPSTREAM */ + skb->rxhash = tpa_info->rxhash; +#endif + + skb->protocol = eth_type_trans(skb, bp->dev); + skb->ip_summed = CHECKSUM_UNNECESSARY; + + if (!bnx2x_fill_frag_skb(bp, fp, tpa_info, pages, + skb, cqe, cqe_idx)) { +#ifdef BCM_VLAN + if ((bp->vlgrp != NULL) && + (tpa_info->parsing_flags + & PARSING_FLAGS_VLAN)) + vlan_gro_receive(&fp->napi, bp->vlgrp, + tpa_info->vlan_tag, skb); + else +#elif !defined(OLD_VLAN) /* BNX2X_UPSTREAM */ + if (tpa_info->parsing_flags & PARSING_FLAGS_VLAN) + __vlan_hwaccel_put_tag(skb, tpa_info->vlan_tag); +#endif + napi_gro_receive(&fp->napi, skb); + } else { + DP(NETIF_MSG_RX_STATUS, + "Failed to allocate new pages - dropping packet!\n"); + dev_kfree_skb_any(skb); + } + +#if (LINUX_VERSION_CODE < 0x02061b) /* ! BNX2X_UPSTREAM */ + bp->dev->last_rx = jiffies; +#endif + + /* put new data in bin */ + rx_buf->data = new_data; + + return; + } +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + kfree(new_data); +#endif +drop: + /* drop the packet and keep the buffer in the bin */ + DP(NETIF_MSG_RX_STATUS, + "Failed to allocate or map a new skb - dropping packet!\n"); + fp->eth_q_stats.rx_skb_alloc_failed++; +} +#endif + +int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget) +{ + struct bnx2x *bp = fp->bp; + u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons; + u16 hw_comp_cons, sw_comp_cons, sw_comp_prod; + int rx_pkt = 0; + +#ifdef BNX2X_STOP_ON_ERROR + if (unlikely(bp->panic)) + return 0; +#endif + + /* CQ "next element" is of the size of the regular element, + that's why it's ok here */ + hw_comp_cons = le16_to_cpu(*fp->rx_cons_sb); + if ((hw_comp_cons & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT) + hw_comp_cons++; + + bd_cons = fp->rx_bd_cons; + bd_prod = fp->rx_bd_prod; + bd_prod_fw = bd_prod; + sw_comp_cons = fp->rx_comp_cons; + sw_comp_prod = fp->rx_comp_prod; + + /* Memory barrier necessary as speculative reads of the rx + * buffer can be ahead of the index in the status block + */ + rmb(); + + DP(NETIF_MSG_RX_STATUS, + "queue[%d]: hw_comp_cons %u sw_comp_cons %u\n", + fp->index, hw_comp_cons, sw_comp_cons); + + while (sw_comp_cons != hw_comp_cons) { + struct sw_rx_bd *rx_buf = NULL; + struct sk_buff *skb; + union eth_rx_cqe *cqe; + struct eth_fast_path_rx_cqe *cqe_fp; + u8 cqe_fp_flags; + enum eth_rx_cqe_type cqe_fp_type; + u16 len, pad, queue; +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + u8 *data; +#else + struct sk_buff *data; +#endif + +#ifdef BNX2X_STOP_ON_ERROR + if (unlikely(bp->panic)) + return 0; +#endif + + comp_ring_cons = RCQ_BD(sw_comp_cons); + bd_prod = RX_BD(bd_prod); + bd_cons = RX_BD(bd_cons); + + /* Prefetch the page containing the BD descriptor + at producer's index. It will be needed when new skb is + allocated */ + prefetch((void *)(PAGE_ALIGN((unsigned long) + (&fp->rx_desc_ring[bd_prod])) - + PAGE_SIZE + 1)); + + cqe = &fp->rx_comp_ring[comp_ring_cons]; + cqe_fp = &cqe->fast_path_cqe; + cqe_fp_flags = cqe_fp->type_error_flags; + cqe_fp_type = cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE; +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + cqe_fp->reserved1[7] = 0xFFFFFFFF; +#endif + + DP(NETIF_MSG_RX_STATUS, + "CQE type %x err %x status %x queue %x vlan %x len %u\n", + CQE_TYPE(cqe_fp_flags), + cqe_fp_flags, cqe_fp->status_flags, + le32_to_cpu(cqe_fp->rss_hash_result), + le16_to_cpu(cqe_fp->vlan_tag), + le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len)); + + /* is this a slowpath msg? */ + if (unlikely(CQE_TYPE_SLOW(cqe_fp_type))) { + bnx2x_sp_event(fp, cqe); + goto next_cqe; + } + + rx_buf = &fp->rx_buf_ring[bd_cons]; + data = rx_buf->data; +#ifndef BCM_HAS_BUILD_SKB /* ! BNX2X_UPSTREAM */ + prefetch(data); +#endif + +#if !defined(__NO_TPA__) /* BNX2X_UPSTREAM */ + if (!CQE_TYPE_FAST(cqe_fp_type)) { + struct bnx2x_agg_info *tpa_info; + u16 frag_size, pages; +#ifdef BNX2X_STOP_ON_ERROR + /* sanity check */ + if (fp->disable_tpa && + (CQE_TYPE_START(cqe_fp_type) || + CQE_TYPE_STOP(cqe_fp_type))) + BNX2X_ERR("START/STOP packet while disable_tpa type %x\n", + CQE_TYPE(cqe_fp_type)); +#endif + + if (CQE_TYPE_START(cqe_fp_type)) { + u16 queue = cqe_fp->queue_index; + DP(NETIF_MSG_RX_STATUS, + "calling tpa_start on queue %d\n", + queue); + + bnx2x_tpa_start(fp, queue, + bd_cons, bd_prod, + cqe_fp); + + goto next_rx; + + } + queue = cqe->end_agg_cqe.queue_index; + tpa_info = &fp->tpa_info[queue]; + DP(NETIF_MSG_RX_STATUS, + "calling tpa_stop on queue %d\n", + queue); + + frag_size = le16_to_cpu(cqe->end_agg_cqe.pkt_len) - + tpa_info->len_on_bd; + + if (fp->mode == TPA_MODE_GRO) + pages = (frag_size + tpa_info->full_page - 1) / + tpa_info->full_page; + else + pages = SGE_PAGE_ALIGN(frag_size) >> + SGE_PAGE_SHIFT; + + bnx2x_tpa_stop(bp, fp, tpa_info, pages, + &cqe->end_agg_cqe, comp_ring_cons); +#ifdef BNX2X_STOP_ON_ERROR + if (bp->panic) + return 0; +#endif + + bnx2x_update_sge_prod(fp, pages, &cqe->end_agg_cqe); + goto next_cqe; + } +#endif + /* non TPA */ + len = le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len); + pad = cqe_fp->placement_offset; +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_sync_single_for_cpu(&bp->pdev->dev, + dma_unmap_addr(rx_buf, mapping), + pad + RX_COPY_THRESH, + DMA_FROM_DEVICE); +#else + pci_dma_sync_single_for_cpu(bp->pdev, + pci_unmap_addr(rx_buf, mapping), + pad + RX_COPY_THRESH, + PCI_DMA_FROMDEVICE); +#endif +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + pad += NET_SKB_PAD; + prefetch(data + pad); /* speedup eth_type_trans() */ +#else + prefetch(((char *)(data)) + L1_CACHE_BYTES); +#endif + /* is this an error packet? */ + if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) { + DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS, + "ERROR flags %x rx packet %u\n", + cqe_fp_flags, sw_comp_cons); + fp->eth_q_stats.rx_err_discard_pkt++; + goto reuse_rx; + } + + /* Since we don't have a jumbo ring + * copy small packets if mtu > 1500 + */ + if ((bp->dev->mtu > ETH_MAX_PACKET_SIZE) && + (len <= RX_COPY_THRESH)) { + skb = netdev_alloc_skb(bp->dev, len + pad); + if (skb == NULL) { + DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS, + "ERROR packet dropped because of alloc failure\n"); + fp->eth_q_stats.rx_skb_alloc_failed++; + goto reuse_rx; + } +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + memcpy(skb->data, data + pad, len); +#else + /* aligned copy */ + skb_copy_from_linear_data_offset(data, pad, + skb->data + pad, len); + skb_reserve(skb, pad); + data = skb; +#endif + bnx2x_reuse_rx_data(fp, bd_cons, bd_prod); + } else { + if (likely(bnx2x_alloc_rx_data(bp, fp, bd_prod) == 0)) { +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_single(&bp->pdev->dev, + dma_unmap_addr(rx_buf, mapping), + fp->rx_buf_size, + DMA_FROM_DEVICE); +#else + pci_unmap_single(bp->pdev, + pci_unmap_addr(rx_buf, mapping), + fp->rx_buf_size, + PCI_DMA_FROMDEVICE); +#endif +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + skb = build_skb(data); + if (unlikely(!skb)) { + kfree(data); + fp->eth_q_stats.rx_skb_alloc_failed++; + goto next_rx; + } +#else + skb = data; +#endif + skb_reserve(skb, pad); + + } else { + DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS, + "ERROR packet dropped because of alloc failure\n"); + fp->eth_q_stats.rx_skb_alloc_failed++; +reuse_rx: + bnx2x_reuse_rx_data(fp, bd_cons, bd_prod); + goto next_rx; + } + } + + skb_put(skb, len); + +#if defined(BNX2X_ESX_CNA) /* non BNX2X_UPSTREAM */ + if (IS_FCOE_FP(fp) && bp->cnadev) + skb->protocol = eth_type_trans(skb, bp->cnadev); + else + skb->protocol = eth_type_trans(skb, bp->dev); +#else /* BNX2X_UPSTREAM */ + skb->protocol = eth_type_trans(skb, bp->dev); +#endif + +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + /* Set Toeplitz hash for a none-LRO skb */ + skb->rxhash = bnx2x_get_rxhash(bp, cqe_fp); +#endif + + skb_checksum_none_assert(skb); + +#if (LINUX_VERSION_CODE < 0x020627) /* non BNX2X_UPSTREAM */ + if (bp->rx_csum) { +#else /* BNX2X_UPSTREAM */ + if (bp->dev->features & NETIF_F_RXCSUM) { +#endif + + if (likely(BNX2X_RX_CSUM_OK(cqe))) + skb->ip_summed = CHECKSUM_UNNECESSARY; + else + fp->eth_q_stats.hw_csum_err++; + } + + skb_record_rx_queue(skb, fp->rx_queue); + +#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ +#if defined(BNX2X_ESX_CNA) + if (IS_FCOE_FP(fp) && bp->cnadev) + vmknetddi_queueops_set_skb_queueid(skb, + VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(1)); + else +#endif + vmknetddi_queueops_set_skb_queueid(skb, + VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(fp->index)); +#endif +#ifdef BCM_VLAN + if ((bp->vlgrp != NULL) && + (le16_to_cpu(cqe_fp->pars_flags.flags) & + PARSING_FLAGS_VLAN)) + vlan_gro_receive(&fp->napi, bp->vlgrp, + le16_to_cpu(cqe_fp->vlan_tag), skb); + else +#elif !defined(OLD_VLAN) /* BNX2X_UPSTREAM */ + if (le16_to_cpu(cqe_fp->pars_flags.flags) & + PARSING_FLAGS_VLAN) + __vlan_hwaccel_put_tag(skb, + le16_to_cpu(cqe_fp->vlan_tag)); +#endif + napi_gro_receive(&fp->napi, skb); + +#if (LINUX_VERSION_CODE < 0x02061b) /* ! BNX2X_UPSTREAM */ + bp->dev->last_rx = jiffies; +#endif + +next_rx: + rx_buf->data = NULL; + + bd_cons = NEXT_RX_IDX(bd_cons); + bd_prod = NEXT_RX_IDX(bd_prod); + bd_prod_fw = NEXT_RX_IDX(bd_prod_fw); + rx_pkt++; +next_cqe: + sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod); + sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons); + + if (rx_pkt == budget) + break; + } /* while */ + + fp->rx_bd_cons = bd_cons; + fp->rx_bd_prod = bd_prod_fw; + fp->rx_comp_cons = sw_comp_cons; + fp->rx_comp_prod = sw_comp_prod; + + /* Update producers */ + bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod, + fp->rx_sge_prod); + + fp->rx_pkt += rx_pkt; + fp->rx_calls++; + + return rx_pkt; +} + +#if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) +irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie, + struct pt_regs *regs) +#else /* BNX2X_UPSTREAM */ +irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie) +#endif +{ + struct bnx2x_fastpath *fp = fp_cookie; + struct bnx2x *bp = fp->bp; + u8 cos; + + DP(NETIF_MSG_INTR, + "got an MSI-X interrupt on IDX:SB [fp %d fw_sd %d igusb %d]\n", + fp->index, fp->fw_sb_id, fp->igu_sb_id); + bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0); + +#ifdef BNX2X_STOP_ON_ERROR + if (unlikely(bp->panic)) + return IRQ_HANDLED; +#endif + + /* Handle Rx and Tx according to MSI-X vector */ + prefetch(fp->rx_cons_sb); + + for_each_cos_in_tx_queue(fp, cos) + prefetch(fp->txdata_ptr[cos]->tx_cons_sb); + + prefetch(&fp->sb_running_index[SM_RX_ID]); +#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ + napi_schedule(&bnx2x_fp(bp, fp->index, napi)); +#else + napi_schedule(&bnx2x_fp(bp, fp->index, dummy_netdev)); +#endif + + return IRQ_HANDLED; +} + +/* HW Lock for shared dual port PHYs */ +void bnx2x_acquire_phy_lock(struct bnx2x *bp) +{ + mutex_lock(&bp->port.phy_mutex); + + if (bp->port.need_hw_lock) + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO); +} + +void bnx2x_release_phy_lock(struct bnx2x *bp) +{ + if (bp->port.need_hw_lock) + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO); + + mutex_unlock(&bp->port.phy_mutex); +} + +/* calculates MF speed according to current linespeed and MF configuration */ +u16 bnx2x_get_mf_speed(struct bnx2x *bp) +{ + u16 line_speed = bp->link_vars.line_speed; + if (IS_MF(bp)) { + u16 maxCfg = bnx2x_extract_max_cfg(bp, + bp->mf_config[BP_VN(bp)]); + + /* Calculate the current MAX line speed limit for the MF + * devices + */ + if (IS_MF_SI(bp)) + line_speed = (line_speed * maxCfg) / 100; + else { /* SD mode */ + u16 vn_max_rate = maxCfg * 100; + + if (vn_max_rate < line_speed) + line_speed = vn_max_rate; + } + } + + return line_speed; +} + +/** + * bnx2x_fill_report_data - fill link report data to report + * + * @bp: driver handle + * @data: link state to update + * + * It uses a none-atomic bit operations because is called under the mutex. + */ +static inline void bnx2x_fill_report_data(struct bnx2x *bp, + struct bnx2x_link_report_data *data) +{ + u16 line_speed = bnx2x_get_mf_speed(bp); + + memset(data, 0, sizeof(*data)); + + /* Fill the report data: efective line speed */ + data->line_speed = line_speed; + + /* Link is down */ + if (!bp->link_vars.link_up || (bp->flags & MF_FUNC_DIS)) + __set_bit(BNX2X_LINK_REPORT_LINK_DOWN, + &data->link_report_flags); + + /* Full DUPLEX */ + if (bp->link_vars.duplex == DUPLEX_FULL) + __set_bit(BNX2X_LINK_REPORT_FD, &data->link_report_flags); + + /* Rx Flow Control is ON */ + if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX) + __set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags); + + /* Tx Flow Control is ON */ + if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX) + __set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags); +} + +/** + * bnx2x_link_report - report link status to OS. + * + * @bp: driver handle + * + * Calls the __bnx2x_link_report() under the same locking scheme + * as a link/PHY state managing code to ensure a consistent link + * reporting. + */ + +void bnx2x_link_report(struct bnx2x *bp) +{ + bnx2x_acquire_phy_lock(bp); + __bnx2x_link_report(bp); + bnx2x_release_phy_lock(bp); +} + +/** + * __bnx2x_link_report - report link status to OS. + * + * @bp: driver handle + * + * None atomic inmlementation. + * Should be called under the phy_lock. + */ +void __bnx2x_link_report(struct bnx2x *bp) +{ + struct bnx2x_link_report_data cur_data; + + /* reread mf_cfg */ + if (!CHIP_IS_E1(bp)) + bnx2x_read_mf_cfg(bp); + + /* Read the current link report info */ + bnx2x_fill_report_data(bp, &cur_data); + + /* Don't report link down or exactly the same link status twice */ + if (!memcmp(&cur_data, &bp->last_reported_link, sizeof(cur_data)) || + (test_bit(BNX2X_LINK_REPORT_LINK_DOWN, + &bp->last_reported_link.link_report_flags) && + test_bit(BNX2X_LINK_REPORT_LINK_DOWN, + &cur_data.link_report_flags))) + return; + + bp->link_cnt++; + + /* We are going to report a new link parameters now - + * remember the current data for the next time. + */ + memcpy(&bp->last_reported_link, &cur_data, sizeof(cur_data)); + + if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN, + &cur_data.link_report_flags)) { + netif_carrier_off(bp->dev); +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + if (bp->flags & CNA_ENABLED) + netif_carrier_off(bp->cnadev); +#endif + netdev_err(bp->dev, "NIC Link is Down\n"); + return; + } else { + const char *duplex; + const char *flow; + + netif_carrier_on(bp->dev); +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + if (bp->flags & CNA_ENABLED) + netif_carrier_on(bp->cnadev); +#endif + + if (test_and_clear_bit(BNX2X_LINK_REPORT_FD, + &cur_data.link_report_flags)) + duplex = "full"; + else + duplex = "half"; + + /* Handle the FC at the end so that only these flags would be + * possibly set. This way we may easily check if there is no FC + * enabled. + */ + if (cur_data.link_report_flags) { + if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON, + &cur_data.link_report_flags)) { + if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON, + &cur_data.link_report_flags)) + flow = "ON - receive & transmit"; + else + flow = "ON - receive"; + } else { + flow = "ON - transmit"; + } + } else { + flow = "none"; + } + netdev_info(bp->dev, "NIC Link is Up, %d Mbps %s duplex, Flow control: %s\n", + cur_data.line_speed, duplex, flow); + } +} + +void bnx2x_init_rx_rings(struct bnx2x *bp) +{ + int func = BP_FUNC(bp); + u16 ring_prod; + int i, j; + + /* Allocate TPA resources */ + for_each_rx_queue(bp, j) { + struct bnx2x_fastpath *fp = &bp->fp[j]; + + DP(NETIF_MSG_IFUP, + "mtu %d rx_buf_size %d\n", bp->dev->mtu, fp->rx_buf_size); + + if (!fp->disable_tpa) { + /* Fill the per-aggregtion pool */ + for (i = 0; i < MAX_AGG_QS(bp); i++) { + struct bnx2x_agg_info *tpa_info = + &fp->tpa_info[i]; + struct sw_rx_bd *first_buf = + &tpa_info->first_buf; +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + first_buf->data = + kmalloc(fp->rx_buf_size + NET_SKB_PAD, + GFP_ATOMIC); +#else + first_buf->data = netdev_alloc_skb(bp->dev, + fp->rx_buf_size); +#endif + if (!first_buf->data) { + BNX2X_ERR("Failed to allocate TPA skb pool for queue[%d] - disabling TPA on this queue!\n", + j); + bnx2x_free_tpa_pool(bp, fp, i); + fp->disable_tpa = 1; + break; + } +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_addr_set(first_buf, mapping, 0); +#else + pci_unmap_addr_set(first_buf, mapping, 0); +#endif + tpa_info->tpa_state = BNX2X_TPA_STOP; + } + + /* "next page" elements initialization */ + bnx2x_set_next_page_sgl(fp); + + /* set SGEs bit mask */ + bnx2x_init_sge_ring_bit_mask(fp); + + /* Allocate SGEs and initialize the ring elements */ + for (i = 0, ring_prod = 0; + i < MAX_RX_SGE_CNT*NUM_RX_SGE_PAGES; i++) { + + if (bnx2x_alloc_rx_sge(bp, fp, ring_prod) < 0) { + BNX2X_ERR("was only able to allocate %d rx sges\n", + i); + BNX2X_ERR("disabling TPA for queue[%d]\n", + j); + /* Cleanup already allocated elements */ + bnx2x_free_rx_sge_range(bp, fp, + ring_prod); + bnx2x_free_tpa_pool(bp, fp, + MAX_AGG_QS(bp)); + fp->disable_tpa = 1; + ring_prod = 0; + break; + } + ring_prod = NEXT_SGE_IDX(ring_prod); + } + + fp->rx_sge_prod = ring_prod; + } + } + + for_each_rx_queue(bp, j) { + struct bnx2x_fastpath *fp = &bp->fp[j]; + + fp->rx_bd_cons = 0; + + /* Activate BD ring */ + /* Warning! + * this will generate an interrupt (to the TSTORM) + * must only be done after chip is initialized + */ +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (IS_OOO_FP(fp)) + bnx2x_update_ooo_prod(bp, fp, fp->rx_bd_prod, + fp->rx_comp_prod, + fp->rx_sge_prod); + else +#endif + bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod, + fp->rx_sge_prod); + + if (j != 0) + continue; + + if (CHIP_IS_E1(bp)) { + REG_WR(bp, BAR_USTRORM_INTMEM + + USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func), + U64_LO(fp->rx_comp_mapping)); + REG_WR(bp, BAR_USTRORM_INTMEM + + USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4, + U64_HI(fp->rx_comp_mapping)); + } + } +} + +static void bnx2x_free_tx_skbs(struct bnx2x *bp) +{ + int i; + u8 cos; + + for_each_tx_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + for_each_cos_in_tx_queue(fp, cos) { + struct bnx2x_fp_txdata *txdata = fp->txdata_ptr[cos]; + unsigned pkts_compl = 0, bytes_compl = 0; + + u16 sw_prod = txdata->tx_pkt_prod; + u16 sw_cons = txdata->tx_pkt_cons; + + while (sw_cons != sw_prod) { + bnx2x_free_tx_pkt(bp, txdata, TX_BD(sw_cons), + &pkts_compl, &bytes_compl); + sw_cons++; + } +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (txdata_has_netdev_queue(txdata)) +#endif + netdev_tx_reset_queue( + netdev_get_tx_queue(bp->dev, + txdata->txq_index)); + } + } +} + +static void bnx2x_free_rx_bds(struct bnx2x_fastpath *fp) +{ + struct bnx2x *bp = fp->bp; + int i; + + /* ring wasn't allocated */ + if (fp->rx_buf_ring == NULL) + return; + + for (i = 0; i < NUM_RX_BD; i++) { + struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[i]; +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + u8 *data = rx_buf->data; +#else + struct sk_buff *data = rx_buf->data; +#endif + + if (data == NULL) + continue; +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_single(&bp->pdev->dev, + dma_unmap_addr(rx_buf, mapping), + fp->rx_buf_size, DMA_FROM_DEVICE); +#else + pci_unmap_single(bp->pdev, + pci_unmap_addr(rx_buf, mapping), + fp->rx_buf_size, PCI_DMA_FROMDEVICE); +#endif + + rx_buf->data = NULL; +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + kfree(data); +#else + dev_kfree_skb(data); +#endif + } +} + +static void bnx2x_free_rx_skbs(struct bnx2x *bp) +{ + int j; + + for_each_rx_queue(bp, j) { + struct bnx2x_fastpath *fp = &bp->fp[j]; + + bnx2x_free_rx_bds(fp); + + if (!fp->disable_tpa) + bnx2x_free_tpa_pool(bp, fp, MAX_AGG_QS(bp)); + } +} + +void bnx2x_free_skbs(struct bnx2x *bp) +{ + bnx2x_free_tx_skbs(bp); + bnx2x_free_rx_skbs(bp); +} + +void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value) +{ + /* load old values */ + u32 mf_cfg = bp->mf_config[BP_VN(bp)]; + + if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) { + /* leave all but MAX value */ + mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK; + + /* set new MAX value */ + mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT) + & FUNC_MF_CFG_MAX_BW_MASK; + + bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg); + } +} + +/** + * bnx2x_free_msix_irqs - free previously requested MSI-X IRQ vectors + * + * @bp: driver handle + * @nvecs: number of vectors to be released + */ +static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs) +{ + int i, offset = 0; + + if (nvecs == offset) + return; +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ + /* VFs don't have a default SB */ + if (HAS_DSB(bp)) { +#endif + free_irq(bp->msix_table[offset].vector, bp->dev); + DP(NETIF_MSG_IFDOWN, "released sp irq (%d)\n", + bp->msix_table[offset].vector); + offset++; +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ + } +#endif +#ifdef BCM_CNIC + if (nvecs == offset) + return; +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (bp->flags & OWN_CNIC_IRQ) { + free_irq(bp->msix_table[offset].vector, + bnx2x_ooo_fp(bp)); + bp->flags &= ~OWN_CNIC_IRQ; + } +#endif + offset++; +#endif + + for_each_eth_queue(bp, i) { + if (nvecs == offset) + return; + DP(NETIF_MSG_IFDOWN, "about to release fp #%d->%d irq\n", + i, bp->msix_table[offset].vector); + + free_irq(bp->msix_table[offset++].vector, &bp->fp[i]); + } +} + +void bnx2x_free_irq(struct bnx2x *bp) +{ + if (bp->flags & USING_MSIX_FLAG && + !(bp->flags & USING_SINGLE_MSIX_FLAG)) + bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) + + CNIC_PRESENT + 1); + else + free_irq(bp->dev->irq, bp->dev); +} + +int bnx2x_enable_msix(struct bnx2x *bp) +{ + int msix_vec = 0, i, rc, req_cnt; + +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ + /* No Default SB for VFs */ + if (HAS_DSB(bp)) { +#endif + bp->msix_table[msix_vec].entry = msix_vec; + BNX2X_DEV_INFO("msix_table[0].entry = %d (slowpath)\n", + bp->msix_table[0].entry); + msix_vec++; +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ + } +#endif + +#ifdef BCM_CNIC + bp->msix_table[msix_vec].entry = msix_vec; + BNX2X_DEV_INFO("msix_table[%d].entry = %d (CNIC)\n", + bp->msix_table[msix_vec].entry, bp->msix_table[msix_vec].entry); + msix_vec++; +#endif + /* We need separate vectors for ETH queues only (not FCoE) */ + for_each_eth_queue(bp, i) { + bp->msix_table[msix_vec].entry = msix_vec; + BNX2X_DEV_INFO("msix_table[%d].entry = %d (fastpath #%u)\n", + msix_vec, msix_vec, i); + msix_vec++; + } + +#ifdef BCM_VF /* not BNX2X_UPSTREAM */ + req_cnt = BNX2X_NUM_ETH_QUEUES(bp) + CNIC_PRESENT + + (HAS_DSB(bp) ? 1 : 0); +#else /* BNX2X_UPSTREAM */ + req_cnt = BNX2X_NUM_ETH_QUEUES(bp) + CNIC_PRESENT + 1; +#endif + + rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], req_cnt); + + /* + * reconfigure number of tx/rx queues according to available + * MSI-X vectors + */ + if (rc >= BNX2X_MIN_MSIX_VEC_CNT) { + /* how less vectors we will have? */ + int diff = req_cnt - rc; + + BNX2X_DEV_INFO("Trying to use less MSI-X vectors: %d\n", rc); + + rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc); + + if (rc) { + BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc); + goto no_msix; + } + /* + * decrease number of queues by number of unallocated entries + */ + bp->num_queues -= diff; + + BNX2X_DEV_INFO("New queue configuration set: %d\n", + bp->num_queues); + } else if (rc > 0) { + /* Get by with single vector */ + rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], 1); + if (rc) { + BNX2X_DEV_INFO("Single MSI-X is not attainable rc %d\n", + rc); + goto no_msix; + } + + BNX2X_DEV_INFO("Using single MSI-X vector\n"); + bp->flags |= USING_SINGLE_MSIX_FLAG; + + } else if (rc < 0) { + BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc); + goto no_msix; + } + + bp->flags |= USING_MSIX_FLAG; + + return 0; + +no_msix: +#if defined(CONFIG_XEN) /* ! BNX2X_UPSTREAM */ + /* + * XEN kernel is enabling the MSIX capability in any case during call + * to pci_enable_msix() - but there is no way to disable it back in + * case of failure. + */ + bnx2x_msix_set_enable(bp->pdev, false); +#endif + /* fall to INTx if not enough memory */ + if (rc == -ENOMEM) + bp->flags |= DISABLE_MSI_FLAG; + + return rc; +} + +static int bnx2x_req_msix_irqs(struct bnx2x *bp) +{ + int i, rc, offset = 0; + +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ + if (HAS_DSB(bp)) { +#endif + rc = request_irq(bp->msix_table[offset++].vector, + bnx2x_msix_sp_int, 0, + bp->dev->name, bp->dev); + if (rc) { + BNX2X_ERR("request sp irq failed\n"); + return -EBUSY; + } +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ + } +#endif + +#ifdef BCM_CNIC +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (!NO_ISCSI_OOO(bp)) { + snprintf(bnx2x_ooo(bp, name), sizeof(bnx2x_ooo(bp, name)), + "%s-fp-ooo", bp->dev->name); + rc = request_irq(bp->msix_table[offset].vector, + bnx2x_msix_fp_int, 0, + bnx2x_ooo(bp, name), bnx2x_ooo_fp(bp)); + if (rc) { + BNX2X_ERR("request for cnic irq (%d) failed rc %d\n", + bp->msix_table[offset].vector, rc); + bnx2x_free_msix_irqs(bp, offset); + return -EBUSY; + } + bp->flags |= OWN_CNIC_IRQ; + } +#endif + offset++; +#endif + for_each_eth_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", + bp->dev->name, i); + + rc = request_irq(bp->msix_table[offset].vector, + bnx2x_msix_fp_int, 0, fp->name, fp); + if (rc) { + BNX2X_ERR("request fp #%d irq (%d) failed rc %d\n", i, + bp->msix_table[offset].vector, rc); + bnx2x_free_msix_irqs(bp, offset); + return -EBUSY; + } + + offset++; + } + + i = BNX2X_NUM_ETH_QUEUES(bp); +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ + if (HAS_DSB(bp)) { +#endif + offset = 1 + CNIC_PRESENT; + netdev_info(bp->dev, "using MSI-X IRQs: sp %d fp[%d] %d ... fp[%d] %d\n", + bp->msix_table[0].vector, + 0, bp->msix_table[offset].vector, + i - 1, bp->msix_table[offset + i - 1].vector); +#ifdef BCM_VF /* ! BNX2X_UPSTREAM */ + } else { + offset = CNIC_PRESENT; + netdev_info(bp->dev, "using MSI-X IRQs: fp[%d] %d ... fp[%d] %d\n", + 0, bp->msix_table[offset].vector, + i - 1, bp->msix_table[offset + i - 1].vector); + } +#endif + + return 0; +} + +int bnx2x_enable_msi(struct bnx2x *bp) +{ + int rc; + + rc = pci_enable_msi(bp->pdev); + if (rc) { + BNX2X_DEV_INFO("MSI is not attainable\n"); + return -1; + } + bp->flags |= USING_MSI_FLAG; + + return 0; +} + +int bnx2x_req_irq(struct bnx2x *bp) +{ + unsigned long flags; + unsigned int irq; + + if (bp->flags & (USING_MSI_FLAG | USING_MSIX_FLAG)) + flags = 0; + else + flags = IRQF_SHARED; + + if (bp->flags & USING_MSIX_FLAG) + irq = bp->msix_table[0].vector; + else + irq = bp->pdev->irq; + + return request_irq(irq, bnx2x_interrupt, flags, bp->dev->name, bp->dev); +} + +static inline int bnx2x_setup_irqs(struct bnx2x *bp) +{ + int rc = 0; + if (bp->flags & USING_MSIX_FLAG && + !(bp->flags & USING_SINGLE_MSIX_FLAG)) { + rc = bnx2x_req_msix_irqs(bp); + if (rc) + return rc; + } else { + rc = bnx2x_req_irq(bp); + if (rc) { + BNX2X_ERR("IRQ request failed rc %d, aborting\n", rc); + return rc; + } + if (bp->flags & USING_MSI_FLAG) { + bp->dev->irq = bp->pdev->irq; + netdev_info(bp->dev, "using MSI IRQ %d\n", + bp->dev->irq); + } + if (bp->flags & USING_MSIX_FLAG) { + bp->dev->irq = bp->msix_table[0].vector; + netdev_info(bp->dev, "using MSIX IRQ %d\n", + bp->dev->irq); + } + } + + return 0; +} + +static inline void bnx2x_napi_enable(struct bnx2x *bp) +{ + int i; + + for_each_rx_queue(bp, i) +#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ + napi_enable(&bnx2x_fp(bp, i, napi)); +#else + netif_poll_enable(&bnx2x_fp(bp, i, dummy_netdev)); +#endif +} + +static inline void bnx2x_napi_disable(struct bnx2x *bp) +{ + int i; + + for_each_rx_queue(bp, i) +#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ + napi_disable(&bnx2x_fp(bp, i, napi)); +#else + netif_poll_disable(&bnx2x_fp(bp, i, dummy_netdev)); +#endif +} + +void bnx2x_netif_start(struct bnx2x *bp) +{ + if (netif_running(bp->dev)) { + bnx2x_napi_enable(bp); + bnx2x_int_enable(bp); + if (bp->state == BNX2X_STATE_OPEN) { + netif_tx_wake_all_queues(bp->dev); +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + if ((bp->flags & CNA_ENABLED) && + BNX2X_IS_NETQ_TX_QUEUE_ALLOCATED( + bnx2x_fcoe_fp(bp))) + netif_tx_wake_all_queues(bp->cnadev); +#endif + } + } +} + +void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw) +{ + bnx2x_int_disable_sync(bp, disable_hw); +#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ + bnx2x_napi_disable(bp); +#else + if (netif_running(bp->dev)) + bnx2x_napi_disable(bp); +#endif +} + +#if (defined(BCM_CNIC) && defined(BNX2X_MULTI_QUEUE)) /* BNX2X_UPSTREAM */ +u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb) +{ + struct bnx2x *bp = netdev_priv(dev); + +#ifdef BCM_CNIC + if (!NO_FCOE(bp)) { + struct ethhdr *hdr = (struct ethhdr *)skb->data; + u16 ether_type = ntohs(hdr->h_proto); + + /* Skip VLAN tag if present */ + if (ether_type == ETH_P_8021Q) { + struct vlan_ethhdr *vhdr = + (struct vlan_ethhdr *)skb->data; + + ether_type = ntohs(vhdr->h_vlan_encapsulated_proto); + } + + /* If ethertype is FCoE or FIP - use FCoE ring */ + if ((ether_type == ETH_P_FCOE) || (ether_type == ETH_P_FIP)) + return bnx2x_fcoe_tx(bp, txq_index); + } +#endif + /* select a non-FCoE queue */ + return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp)); +} +#endif + + +void bnx2x_set_num_queues(struct bnx2x *bp) +{ + /* RSS queues */ + bp->num_queues = bnx2x_calc_num_queues(bp); + +#ifdef BCM_CNIC + /* override in STORAGE SD modes */ + if (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)) + bp->num_queues = 1; +#endif + /* Add special queues */ + bp->num_queues += NON_ETH_CONTEXT_USE; + + BNX2X_DEV_INFO("set number of queues to %d\n", bp->num_queues); +} + +/** + * bnx2x_set_real_num_queues - configure netdev->real_num_[tx,rx]_queues + * + * @bp: Driver handle + * + * We currently support for at most 16 Tx queues for each CoS thus we will + * allocate a multiple of 16 for ETH L2 rings according to the value of the + * bp->max_cos. + * + * If there is an FCoE L2 queue the appropriate Tx queue will have the next + * index after all ETH L2 indices. + * + * If the actual number of Tx queues (for each CoS) is less than 16 then there + * will be the holes at the end of each group of 16 ETh L2 indices (0..15, + * 16..31,...) with indices that are not coupled with any real Tx queue. + * + * The proper configuration of skb->queue_mapping is handled by + * bnx2x_select_queue() and __skb_tx_hash(). + * + * bnx2x_setup_tc() takes care of the proper TC mappings so that __skb_tx_hash() + * will return a proper Tx index if TC is enabled (netdev->num_tc > 0). + */ +static inline int bnx2x_set_real_num_queues(struct bnx2x *bp) +{ + int rc, tx, rx; + + tx = BNX2X_NUM_ETH_QUEUES(bp) * bp->max_cos; + rx = BNX2X_NUM_QUEUES(bp) - NON_ETH_CONTEXT_USE; + +/* account for fcoe queue */ +#ifdef BCM_CNIC + if (!NO_FCOE(bp)) { + rx += FCOE_PRESENT; + tx += FCOE_PRESENT; + } +#endif + +#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 36)) /* BNX2X_UPSTREAM */ + rc = netif_set_real_num_tx_queues(bp->dev, tx); + if (rc) { + BNX2X_ERR("Failed to set real number of Tx queues: %d\n", rc); + return rc; + } +#else + netif_set_real_num_tx_queues(bp->dev, tx); +#endif +#endif + rc = netif_set_real_num_rx_queues(bp->dev, rx); + if (rc) { + BNX2X_ERR("Failed to set real number of Rx queues: %d\n", rc); + return rc; + } + + DP(NETIF_MSG_IFUP, "Setting real num queues to (tx, rx) (%d, %d)\n", + tx, rx); + + return rc; +} + +static inline void bnx2x_set_rx_buf_size(struct bnx2x *bp) +{ + int i; + + for_each_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + u32 mtu; + + /* Always use a mini-jumbo MTU for the FCoE L2 ring */ + if (IS_FCOE_IDX(i)) + /* + * Although there are no IP frames expected to arrive to + * this ring we still want to add an + * IP_HEADER_ALIGNMENT_PADDING to prevent a buffer + * overrun attack. + */ + mtu = BNX2X_FCOE_MINI_JUMBO_MTU; + else + mtu = bp->dev->mtu; + fp->rx_buf_size = BNX2X_FW_RX_ALIGN + + IP_HEADER_ALIGNMENT_PADDING + + ETH_OVREHEAD + + mtu; + } +} + +static inline int bnx2x_init_rss_pf(struct bnx2x *bp) +{ + int i; + u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0}; + u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp); + + /* Prepare the initial contents fo the indirection table if RSS is + * enabled + */ + for (i = 0; i < sizeof(ind_table); i++) + ind_table[i] = + bp->fp->cl_id + + ethtool_rxfh_indir_default(i, num_eth_queues); + + /* + * For 57710 and 57711 SEARCHER configuration (rss_keys) is + * per-port, so if explicit configuration is needed , do it only + * for a PMF. + * + * For 57712 and newer on the other hand it's a per-function + * configuration. + */ + return bnx2x_config_rss_eth(bp, ind_table, + bp->port.pmf || !CHIP_IS_E1x(bp)); +} + +int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj, + u8 *ind_table, bool config_hash) +{ + struct bnx2x_config_rss_params params = {NULL}; + int i; + + /* Although RSS is meaningless when there is a single HW queue we + * still need it enabled in order to have HW Rx hash generated. + * + * if (!is_eth_multi(bp)) + * bp->multi_mode = ETH_RSS_MODE_DISABLED; + */ + + params.rss_obj = rss_obj; + + __set_bit(RAMROD_COMP_WAIT, ¶ms.ramrod_flags); + +#ifndef BNX2X_NETQ /* BNX2X_UPSTREAM */ + __set_bit(BNX2X_RSS_MODE_REGULAR, ¶ms.rss_flags); + + /* RSS configuration */ + __set_bit(BNX2X_RSS_IPV4, ¶ms.rss_flags); + __set_bit(BNX2X_RSS_IPV4_TCP, ¶ms.rss_flags); + __set_bit(BNX2X_RSS_IPV6, ¶ms.rss_flags); + __set_bit(BNX2X_RSS_IPV6_TCP, ¶ms.rss_flags); +#endif + + /* Hash bits */ + params.rss_result_mask = MULTI_MASK; + + memcpy(params.ind_table, ind_table, sizeof(params.ind_table)); + + if (config_hash) { + /* RSS keys */ + for (i = 0; i < sizeof(params.rss_key) / 4; i++) + params.rss_key[i] = random32(); + + __set_bit(BNX2X_RSS_SET_SRCH, ¶ms.rss_flags); + } + + return bnx2x_config_rss(bp, ¶ms); +} + +static inline int bnx2x_init_hw(struct bnx2x *bp, u32 load_code) +{ + struct bnx2x_func_state_params func_params = {NULL}; + + /* Prepare parameters for function state transitions */ + __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); + + func_params.f_obj = &bp->func_obj; + func_params.cmd = BNX2X_F_CMD_HW_INIT; + + func_params.params.hw_init.load_phase = load_code; + + return bnx2x_func_state_change(bp, &func_params); +} + +/* + * Cleans the object that have internal lists without sending + * ramrods. Should be run when interrutps are disabled. + */ +static void bnx2x_squeeze_objects(struct bnx2x *bp) +{ + int rc; + unsigned long ramrod_flags = 0, vlan_mac_flags = 0; + struct bnx2x_mcast_ramrod_params rparam = {NULL}; + struct bnx2x_vlan_mac_obj *mac_obj = &bp->fp->mac_obj; + + /***************** Cleanup MACs' object first *************************/ + + /* Wait for completion of requested */ + __set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + /* Perform a dry cleanup */ + __set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags); + + /* Clean ETH primary MAC */ + __set_bit(BNX2X_ETH_MAC, &vlan_mac_flags); + rc = mac_obj->delete_all(bp, &bp->fp->mac_obj, &vlan_mac_flags, + &ramrod_flags); + if (rc != 0) + BNX2X_ERR("Failed to clean ETH MACs: %d\n", rc); + + /* Cleanup UC list */ + vlan_mac_flags = 0; + __set_bit(BNX2X_UC_LIST_MAC, &vlan_mac_flags); + rc = mac_obj->delete_all(bp, mac_obj, &vlan_mac_flags, + &ramrod_flags); + if (rc != 0) + BNX2X_ERR("Failed to clean UC list MACs: %d\n", rc); + + /***************** Now clean mcast object *****************************/ + rparam.mcast_obj = &bp->mcast_obj; + __set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags); + + /* Add a DEL command... */ + rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_DEL); + if (rc < 0) + BNX2X_ERR("Failed to add a new DEL command to a multi-cast object: %d\n", + rc); + + /* ...and wait until all pending commands are cleared */ + rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT); + while (rc != 0) { + if (rc < 0) { + BNX2X_ERR("Failed to clean multi-cast object: %d\n", + rc); + return; + } + + rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT); + } +} + +#ifndef BNX2X_STOP_ON_ERROR +#define LOAD_ERROR_EXIT(bp, label) \ + do { \ + (bp)->state = BNX2X_STATE_ERROR; \ + goto label; \ + } while (0) +#else +#define LOAD_ERROR_EXIT(bp, label) \ + do { \ + (bp)->state = BNX2X_STATE_ERROR; \ + (bp)->panic = 1; \ + return -EBUSY; \ + } while (0) +#endif + +bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err) +{ + /* build FW version dword */ + u32 my_fw = (BCM_5710_FW_MAJOR_VERSION) + + (BCM_5710_FW_MINOR_VERSION << 8) + + (BCM_5710_FW_REVISION_VERSION << 16) + + (BCM_5710_FW_ENGINEERING_VERSION << 24); + + /* read loaded FW from chip */ + u32 loaded_fw = REG_RD(bp, XSEM_REG_PRAM); + + DP(NETIF_MSG_IFUP, "loaded fw %x, my fw %x\n", loaded_fw, my_fw); + + if (loaded_fw != my_fw) { + if (is_err) + BNX2X_ERR("bnx2x with FW %x was already loaded, which mismatches my %x FW. aborting", + loaded_fw, my_fw); + return false; + } + + return true; +} + +/* must be called with rtnl_lock */ +int bnx2x_nic_load(struct bnx2x *bp, int load_mode) +{ + int port = BP_PORT(bp); + u32 load_code; + int i, rc; +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + u32 ncsi_oem_data_addr; +#endif + +#ifdef BNX2X_STOP_ON_ERROR + if (unlikely(bp->panic)) { + BNX2X_ERR("Can't load NIC when there is panic\n"); + return -EPERM; + } +#endif + + bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD; + + /* Set the initial link reported state to link down */ + bnx2x_acquire_phy_lock(bp); + memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link)); + __set_bit(BNX2X_LINK_REPORT_LINK_DOWN, + &bp->last_reported_link.link_report_flags); + bnx2x_release_phy_lock(bp); + + /* must be called before memory allocation and HW init */ + bnx2x_ilt_set_info(bp); + + /* + * Zero fastpath structures preserving invariants like napi, which are + * allocated only once, fp index, max_cos, bp pointer. + * Also set fp->disable_tpa and txdata_ptr. + */ + DP(NETIF_MSG_IFUP, "num queues: %d", bp->num_queues); + for_each_queue(bp, i) + bnx2x_bz_fp(bp, i); + memset(bp->bnx2x_txq, 0, bp->bnx2x_txq_size * + sizeof(struct bnx2x_fp_txdata)); + +#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ + bnx2x_fp(bp, 0, disable_tpa) = 1; + + /* + * The following routine iterates over all the net-queues allocating + * the queues that will use LRO. It sets their internal state + * including the 'disable_tpa' field. This must be done prior to + * setting up the queue below. + */ + bnx2x_reserve_netq_feature(bp); + +#endif + + /* Set the receive queues buffer size */ + bnx2x_set_rx_buf_size(bp); + + if (bnx2x_alloc_mem(bp)) { + rc = -ENOMEM; + LOAD_ERROR_EXIT(bp, load_error_mem); + } + + /* As long as bnx2x_alloc_mem() may possibly update + * bp->num_queues, bnx2x_set_real_num_queues() should always + * come after it. + */ + + rc = bnx2x_set_real_num_queues(bp); + if (rc) { + BNX2X_ERR("Unable to set real_num_queues\n"); + LOAD_ERROR_EXIT(bp, load_error0); + } + +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + /* configure multi cos mappings in kernel. + * this configuration may be overriden by a multi class queue discipline + * or by a dcbx negotiation result. + */ + bnx2x_setup_tc(bp->dev, bp->max_cos); +#endif + + bnx2x_napi_enable(bp); + + /* set pf load just before approaching the MCP */ + bnx2x_set_pf_load(bp); + + /* Send LOAD_REQUEST command to MCP + * Returns the type of LOAD command: + * if it is the first port to be initialized + * common blocks should be initialized, otherwise - not + */ + if (!BP_NOMCP(bp)) { + /* init fw_seq */ + bp->fw_seq = + (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) & + DRV_MSG_SEQ_NUMBER_MASK); + BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq); +#ifndef __VMKLNX__ /* BNX2X_UPSTREAM */ + /* Get current FW pulse sequence */ + bp->fw_drv_pulse_wr_seq = + (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb) & + DRV_PULSE_SEQ_MASK); + BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq); +#endif + + load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0); + if (!load_code) { + BNX2X_ERR("MCP response failure, aborting\n"); + rc = -EBUSY; + LOAD_ERROR_EXIT(bp, load_error1); + } + if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED) { + BNX2X_ERR("Driver load refused\n"); + rc = -EBUSY; /* other port in diagnostic mode */ + LOAD_ERROR_EXIT(bp, load_error1); + } + if (load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP && + load_code != FW_MSG_CODE_DRV_LOAD_COMMON) { + /* abort nic load if version mismatch */ + if (!bnx2x_test_firmware_version(bp, true)) { + rc = -EBUSY; + LOAD_ERROR_EXIT(bp, load_error2); + } + } + + } else { + int path = BP_PATH(bp); + + DP(NETIF_MSG_IFUP, "NO MCP - load counts[%d] %d, %d, %d\n", + path, load_count[path][0], load_count[path][1], + load_count[path][2]); + load_count[path][0]++; + load_count[path][1 + port]++; + DP(NETIF_MSG_IFUP, "NO MCP - new load counts[%d] %d, %d, %d\n", + path, load_count[path][0], load_count[path][1], + load_count[path][2]); + if (load_count[path][0] == 1) + load_code = FW_MSG_CODE_DRV_LOAD_COMMON; + else if (load_count[path][1 + port] == 1) + load_code = FW_MSG_CODE_DRV_LOAD_PORT; + else + load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION; + } + + if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) || + (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) || + (load_code == FW_MSG_CODE_DRV_LOAD_PORT)) { + bp->port.pmf = 1; + /* + * We need the barrier to ensure the ordering between the + * writing to bp->port.pmf here and reading it from the + * bnx2x_periodic_task(). + */ + smp_mb(); + } else + bp->port.pmf = 0; + + DP(NETIF_MSG_IFUP, "pmf %d\n", bp->port.pmf); + +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + /* write 0 to driver version of ncsi OEM specific data, as it should + * not be supported in Linux + */ + if (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) { + if (SHMEM2_HAS(bp, ncsi_oem_data_addr)) { + ncsi_oem_data_addr = SHMEM2_RD(bp, ncsi_oem_data_addr); + if (ncsi_oem_data_addr) { + REG_WR(bp, + ncsi_oem_data_addr + + offsetof(struct glob_ncsi_oem_data, + driver_version), + 0); + } + } + } +#endif + /* Init Function state controlling object */ + bnx2x__init_func_obj(bp); + + /* Initialize HW */ + rc = bnx2x_init_hw(bp, load_code); + if (rc) { + BNX2X_ERR("HW init failed, aborting\n"); + bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0); + LOAD_ERROR_EXIT(bp, load_error2); + } + + /* Connect to IRQs */ + rc = bnx2x_setup_irqs(bp); + if (rc) { + BNX2X_ERR("IRQs setup failed\n"); + bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0); + LOAD_ERROR_EXIT(bp, load_error2); + } + + /* Setup NIC internals and enable interrupts */ + bnx2x_nic_init(bp, load_code); + + /* Init per-function objects */ + bnx2x_init_bp_objs(bp); + +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ + bnx2x_iov_nic_init(bp); +#endif + if (((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) || + (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP)) && + (bp->common.shmem2_base)) { + if (SHMEM2_HAS(bp, dcc_support)) + SHMEM2_WR(bp, dcc_support, + (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV | + SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV)); + if (SHMEM2_HAS(bp, afex_driver_support)) + SHMEM2_WR(bp, afex_driver_support, + SHMEM_AFEX_SUPPORTED_VERSION_ONE); + } + + /* Set AFEX default VLAN tag to an invalid value */ + bp->afex_def_vlan_tag = -1; + + bp->state = BNX2X_STATE_OPENING_WAIT4_PORT; + rc = bnx2x_func_start(bp); + if (rc) { + BNX2X_ERR("Function start failed!\n"); + bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0); + LOAD_ERROR_EXIT(bp, load_error3); + } + + /* Send LOAD_DONE command to MCP */ + if (!BP_NOMCP(bp)) { + load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0); + if (!load_code) { + BNX2X_ERR("MCP response failure, aborting\n"); + rc = -EBUSY; + LOAD_ERROR_EXIT(bp, load_error3); + } + } + + /* initialize FW coalescing state machines in RAM */ + bnx2x_update_coalesce(bp); + + rc = bnx2x_setup_leading(bp); + if (rc) { + BNX2X_ERR("Setup leading failed!\n"); + LOAD_ERROR_EXIT(bp, load_error3); + } + +#ifdef BCM_CNIC + /* Enable Timer scan */ + REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 1); +#endif + + for_each_nondefault_queue(bp, i) { + rc = bnx2x_setup_queue(bp, &bp->fp[i], 0); + if (rc) { + BNX2X_ERR("Queue setup failed\n"); + LOAD_ERROR_EXIT(bp, load_error4); + } + } + + rc = bnx2x_init_rss_pf(bp); + if (rc) { + BNX2X_ERR("PF RSS init failed\n"); + LOAD_ERROR_EXIT(bp, load_error4); + } + + /* Now when Clients are configured we are ready to work */ + bp->state = BNX2X_STATE_OPEN; + + /* Configure a ucast MAC */ + rc = bnx2x_set_eth_mac(bp, true); + if (rc) { + BNX2X_ERR("Setting Ethernet MAC failed\n"); + LOAD_ERROR_EXIT(bp, load_error4); + } + + if (bp->pending_max) { + bnx2x_update_max_mf_config(bp, bp->pending_max); + bp->pending_max = 0; + } + + if (bp->port.pmf || IS_VF(bp)) + bnx2x_initial_phy_init(bp, load_mode); + + /* Start fast path */ + + /* Initialize Rx filter. */ + netif_addr_lock_bh(bp->dev); + bnx2x_set_rx_mode(bp->dev); + netif_addr_unlock_bh(bp->dev); + + /* Start the Tx */ + switch (load_mode) { + case LOAD_NORMAL: + /* Tx queue should be only reenabled */ + netif_tx_wake_all_queues(bp->dev); + break; + + case LOAD_OPEN: + netif_tx_start_all_queues(bp->dev); + smp_mb__after_clear_bit(); + break; + + case LOAD_DIAG: + case LOAD_LOOPBACK_EXT: + bp->state = BNX2X_STATE_DIAG; + break; + + default: + break; + } + + if (bp->port.pmf) + bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0); + else + bnx2x__link_status_update(bp); + + /* start the timer */ + mod_timer(&bp->timer, jiffies + bp->current_interval); + +#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ + vmknetddi_queueops_invalidate_state(bp->dev); + bp->n_rx_queues_allocated = 0; + bp->n_tx_queues_allocated = 0; +#endif +#ifdef BCM_CNIC +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + /* Release CNIC's IRQ now, CNIC will connect to it */ + if (bp->flags & OWN_CNIC_IRQ) { +#ifdef BCM_VF + int cnic_idx = HAS_DSB(bp) ? 1 : 0; +#else + int cnic_idx = 1; +#endif + synchronize_irq(bp->msix_table[cnic_idx].vector); + free_irq(bp->msix_table[cnic_idx].vector, bnx2x_ooo_fp(bp)); + bp->flags &= ~OWN_CNIC_IRQ; + } + bp->flags &= ~OWN_CNIC_INTA_FLAG; +#endif + /* re-read iscsi info */ + bnx2x_get_iscsi_info(bp); + bnx2x_setup_cnic_irq_info(bp); + bnx2x_setup_cnic_info(bp); + if (bp->state == BNX2X_STATE_OPEN) + bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD); +#endif + + /* mark driver is loaded in shmem2 */ + if (SHMEM2_HAS(bp, drv_capabilities_flag)) { + u32 val; + val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]); + SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)], + val | DRV_FLAGS_CAPABILITIES_LOADED_SUPPORTED | + DRV_FLAGS_CAPABILITIES_LOADED_L2); + } + + /* Wait for all pending SP commands to complete */ + if (!bnx2x_wait_sp_comp(bp, ~0x0UL)) { + BNX2X_ERR("Timeout waiting for SP elements to complete\n"); + bnx2x_nic_unload(bp, UNLOAD_CLOSE); + return -EBUSY; + } + +#if !defined(__VMKLNX__) || \ + (((VMWARE_ESX_DDK_VERSION == 50000) && !defined(BNX2X_INBOX)) || \ + (VMWARE_ESX_DDK_VERSION > 50000)) /* BNX2X_UPSTREAM */ + if (bp->state != BNX2X_STATE_DIAG) + bnx2x_dcbx_init(bp); +#endif + return 0; + +#ifndef BNX2X_STOP_ON_ERROR +load_error4: +#ifdef BCM_CNIC + /* Disable Timer scan */ + REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0); +#endif +load_error3: + bnx2x_int_disable_sync(bp, 1); + + /* Clean queueable objects */ + bnx2x_squeeze_objects(bp); + + /* Free SKBs, SGEs, TPA pool and driver internals */ + bnx2x_free_skbs(bp); + for_each_rx_queue(bp, i) + bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); + + /* Release IRQs */ + bnx2x_free_irq(bp); +load_error2: + if (!BP_NOMCP(bp)) { + bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0); + bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); + } + + bp->port.pmf = 0; +load_error1: + bnx2x_napi_disable(bp); + /* clear pf_load status, as it was already set */ + bnx2x_clear_pf_load(bp); +load_error0: + bnx2x_free_mem(bp); +load_error_mem: + return rc; +#endif /* ! BNX2X_STOP_ON_ERROR */ +} + +/* must be called with rtnl_lock */ +int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode) +{ + int i; + bool global = false; + + /* mark driver is unloaded in shmem2 */ + if (SHMEM2_HAS(bp, drv_capabilities_flag)) { + u32 val; + val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]); + SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)], + val & ~DRV_FLAGS_CAPABILITIES_LOADED_L2); + } + + if (bp->recovery_state != BNX2X_RECOVERY_DONE && + (bp->state == BNX2X_STATE_CLOSED || + bp->state == BNX2X_STATE_ERROR)) { + /* We can get here if the driver has been unloaded + * during parity error recovery and is either waiting for a + * leader to complete or for other functions to unload and + * then ifdown has been issued. In this case we want to + * unload and let other functions to complete a recovery + * process. + */ + bp->recovery_state = BNX2X_RECOVERY_DONE; + bp->is_leader = 0; + bnx2x_release_leader_lock(bp); + smp_mb(); + + DP(NETIF_MSG_IFDOWN, "Releasing a leadership...\n"); + BNX2X_ERR("Can't unload in closed or error state\n"); + return -EINVAL; + } +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ + /* + * On older version of ESX 'device close' could be called with no + * prior successful call to 'device open'. The valid states at this + * point are either 'open' (device open) or 'diag' (self-test) + */ + if(bp->state != BNX2X_STATE_OPEN && bp->state != BNX2X_STATE_DIAG) { + BNX2X_ERR("called dev_close() with no prior successful call to dev_open()\n"); + return -EBUSY; + } +#endif + + /* + * Nothing to do during unload if previous bnx2x_nic_load() + * have not completed succesfully - all resourses are released. + * + * we can get here only after unsuccessful ndo_* callback, during which + * dev->IFF_UP flag is still on. + */ + if (bp->state == BNX2X_STATE_CLOSED || bp->state == BNX2X_STATE_ERROR) + return 0; + + /* + * It's important to set the bp->state to the value different from + * BNX2X_STATE_OPEN and only then stop the Tx. Otherwise bnx2x_tx_int() + * may restart the Tx from the NAPI context (see bnx2x_tx_int()). + */ + bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT; + smp_mb(); + + /* Stop Tx */ + bnx2x_tx_disable(bp); +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + netdev_reset_tc(bp->dev); +#endif + +#ifdef BCM_CNIC + bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD); +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + /* Reaquire the CNIC's IRQ */ + if ((!NO_ISCSI_OOO(bp)) && (bp->flags & USING_MSIX_FLAG) + && (!(bp->flags & OWN_CNIC_IRQ))) { +#ifdef BCM_VF + int cnic_idx = HAS_DSB(bp) ? 1 : 0; +#else + int cnic_idx = 1; +#endif + if (request_irq(bp->msix_table[cnic_idx].vector, + bnx2x_msix_fp_int, 0, + bnx2x_ooo(bp, name), bnx2x_ooo_fp(bp))) + BNX2X_ERR("Failed to connect to CNIC IRQ\n"); + else + bp->flags |= OWN_CNIC_IRQ; + } + if (!NO_ISCSI_OOO(bp)) + bp->flags |= OWN_CNIC_INTA_FLAG; +#endif +#endif + + bp->rx_mode = BNX2X_RX_MODE_NONE; + +#if (LINUX_VERSION_CODE < 0x02061f) /* ! BNX2X_UPSTREAM */ + /* In kernels starting from 2.6.31 netdev layer does this */ + bp->dev->trans_start = jiffies; /* prevent tx timeout */ +#endif + del_timer_sync(&bp->timer); + + /* Set ALWAYS_ALIVE bit in shmem */ + bp->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE; + +#ifndef __VMKLNX__ /* Remove FW pulse timer update */ /* BNX2X_UPSTREAM */ + bnx2x_drv_pulse(bp); +#endif /* !__VMKLNX__ */ + + bnx2x_stats_handle(bp, STATS_EVENT_STOP); + bnx2x_save_statistics(bp); + + /* Cleanup the chip if needed */ + if (unload_mode != UNLOAD_RECOVERY) + bnx2x_chip_cleanup(bp, unload_mode); + else { + /* Send the UNLOAD_REQUEST to the MCP */ + bnx2x_send_unload_req(bp, unload_mode); + + /* + * Prevent transactions to host from the functions on the + * engine that doesn't reset global blocks in case of global + * attention once gloabl blocks are reset and gates are opened + * (the engine which leader will perform the recovery + * last). + */ + if (!CHIP_IS_E1x(bp)) + bnx2x_pf_disable(bp); + + /* Disable HW interrupts, NAPI */ + bnx2x_netif_stop(bp, 1); + + /* Release IRQs */ + bnx2x_free_irq(bp); + + /* Report UNLOAD_DONE to MCP */ + bnx2x_send_unload_done(bp); + } + + /* + * At this stage no more interrupts will arrive so we may safly clean + * the queueable objects here in case they failed to get cleaned so far. + */ + bnx2x_squeeze_objects(bp); + + /* There should be no more pending SP commands at this stage */ + bp->sp_state = 0; + + bp->port.pmf = 0; + + /* Free SKBs, SGEs, TPA pool and driver internals */ + bnx2x_free_skbs(bp); + for_each_rx_queue(bp, i) + bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); + + bnx2x_free_mem(bp); + + bp->state = BNX2X_STATE_CLOSED; + + /* Check if there are pending parity attentions. If there are - set + * RECOVERY_IN_PROGRESS. + */ + if (bnx2x_chk_parity_attn(bp, &global, false)) { + bnx2x_set_reset_in_progress(bp); + + /* Set RESET_IS_GLOBAL if needed */ + if (global) + bnx2x_set_reset_global(bp); + } + + + /* The last driver must disable a "close the gate" if there is no + * parity attention or "process kill" pending. + */ + if (!bnx2x_clear_pf_load(bp) && bnx2x_reset_is_done(bp, BP_PATH(bp))) + bnx2x_disable_close_the_gate(bp); + + return 0; +} + +int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state) +{ + u16 pmcsr; + + /* If there is no power capability, silently succeed */ + if (!bp->pm_cap) { + BNX2X_DEV_INFO("No power capability. Breaking.\n"); + return 0; + } + + pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr); + + switch (state) { + case PCI_D0: + pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, + ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) | + PCI_PM_CTRL_PME_STATUS)); + + if (pmcsr & PCI_PM_CTRL_STATE_MASK) + /* delay required during transition out of D3hot */ + msleep(20); + break; + + case PCI_D3hot: +#if (LINUX_VERSION_CODE >= 0x020614) /* BNX2X_UPSTREAM */ + /* If there are other clients above don't + shut down the power */ + if (atomic_read(&bp->pdev->enable_cnt) != 1) + return 0; +#endif + /* Don't shut down the power for emulation and FPGA */ + if (CHIP_REV_IS_SLOW(bp)) + return 0; + + pmcsr &= ~PCI_PM_CTRL_STATE_MASK; + pmcsr |= 3; + + if (bp->wol) + pmcsr |= PCI_PM_CTRL_PME_ENABLE; + + pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, + pmcsr); + + /* No more memory access after this point until + * device is brought back to D0. + */ + break; + + default: + dev_err(&bp->pdev->dev, "Can't support state = %d\n", state); + return -EINVAL; + } + return 0; +} + +/* + * net_device service functions + */ +#if defined(BNX2X_NEW_NAPI) /* BNX2X_UPSTREAM */ +int bnx2x_poll(struct napi_struct *napi, int budget) +#else +int bnx2x_poll(struct net_device *dev, int *budget) +#endif +{ + int work_done = 0; + u8 cos; +#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ + struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath, + napi); + struct bnx2x *bp = fp->bp; +#else /* non BNX2X_UPSTREAM */ + struct bnx2x_fastpath *fp = dev->priv; + struct bnx2x *bp = fp->bp; + int orig_budget = min(*budget, dev->quota); +#endif + + while (1) { +#ifdef BNX2X_STOP_ON_ERROR + if (unlikely(bp->panic)) { + napi_complete(napi); + return 0; + } +#endif + +#ifndef BNX2X_MULTI_QUEUE /* ! BNX2X_UPSTREAM */ + /* There is only one Tx queue on kernels 2.6.26 and below */ + if (fp->index == 0) +#endif + for_each_cos_in_tx_queue(fp, cos) + if (bnx2x_tx_queue_has_work(fp->txdata_ptr[cos])) + bnx2x_tx_int(bp, fp->txdata_ptr[cos]); + + + if (bnx2x_has_rx_work(fp)) { +#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ + work_done += bnx2x_rx_int(fp, budget - work_done); + + /* must not complete if we consumed full budget */ + if (work_done >= budget) + break; +#else + work_done = bnx2x_rx_int(fp, orig_budget); + + *budget -= work_done; + dev->quota -= work_done; + orig_budget = min(*budget, dev->quota); + if (orig_budget <= 0) + break; +#endif + } + + /* Fall out from the NAPI loop if needed */ + if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) { +#ifdef BCM_CNIC + /* No need to update SB for FCoE L2 ring as long as + * it's connected to the default SB and the SB + * has been updated when NAPI was scheduled. + */ + if (IS_FCOE_FP(fp)) { + napi_complete(napi); +#ifndef BNX2X_NEW_NAPI + return 0; +#else /* BNX2X_UPSTREAM */ + break; +#endif + } +#endif + + bnx2x_update_fpsb_idx(fp); + /* bnx2x_has_rx_work() reads the status block, + * thus we need to ensure that status block indices + * have been actually read (bnx2x_update_fpsb_idx) + * prior to this check (bnx2x_has_rx_work) so that + * we won't write the "newer" value of the status block + * to IGU (if there was a DMA right after + * bnx2x_has_rx_work and if there is no rmb, the memory + * reading (bnx2x_update_fpsb_idx) may be postponed + * to right before bnx2x_ack_sb). In this case there + * will never be another interrupt until there is + * another update of the status block, while there + * is still unhandled work. + */ + rmb(); + + if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) { + napi_complete(napi); + /* Re-enable interrupts */ + DP(NETIF_MSG_RX_STATUS, + "Update index to %d\n", fp->fp_hc_idx); + bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, + le16_to_cpu(fp->fp_hc_idx), + IGU_INT_ENABLE, 1); +#ifndef BNX2X_NEW_NAPI + return 0; +#else /* BNX2X_UPSTREAM */ + break; +#endif + } + } + } + +#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ + return work_done; +#else + return 1; +#endif +} + +#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ +/* we split the first BD into headers and data BDs + * to ease the pain of our fellow microcode engineers + * we use one mapping for both BDs + * So far this has only been observed to happen + * in Other Operating Systems(TM) + */ +static noinline u16 bnx2x_tx_split(struct bnx2x *bp, + struct bnx2x_fp_txdata *txdata, + struct sw_tx_bd *tx_buf, + struct eth_tx_start_bd **tx_bd, u16 hlen, + u16 bd_prod, int nbd) +{ + struct eth_tx_start_bd *h_tx_bd = *tx_bd; + struct eth_tx_bd *d_tx_bd; + dma_addr_t mapping; + int old_len = le16_to_cpu(h_tx_bd->nbytes); + + /* first fix first BD */ + h_tx_bd->nbd = cpu_to_le16(nbd); + h_tx_bd->nbytes = cpu_to_le16(hlen); + + DP(NETIF_MSG_TX_QUEUED, "TSO split header size is %d (%x:%x) nbd %d\n", + h_tx_bd->nbytes, h_tx_bd->addr_hi, h_tx_bd->addr_lo, h_tx_bd->nbd); + + /* now get a new data BD + * (after the pbd) and fill it */ + bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); + d_tx_bd = &txdata->tx_desc_ring[bd_prod].reg_bd; + + mapping = HILO_U64(le32_to_cpu(h_tx_bd->addr_hi), + le32_to_cpu(h_tx_bd->addr_lo)) + hlen; + + d_tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); + d_tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); + d_tx_bd->nbytes = cpu_to_le16(old_len - hlen); + + /* this marks the BD as one that has no individual mapping */ + tx_buf->flags |= BNX2X_TSO_SPLIT_BD; + + DP(NETIF_MSG_TX_QUEUED, + "TSO split data size is %d (%x:%x)\n", + d_tx_bd->nbytes, d_tx_bd->addr_hi, d_tx_bd->addr_lo); + + /* update tx_bd */ + *tx_bd = (struct eth_tx_start_bd *)d_tx_bd; + + return bd_prod; +} +#endif + +static inline u16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix) +{ + if (fix > 0) + csum = (__force u16) + ~csum_fold(csum_sub((__force __wsum) csum, + csum_partial(t_header - fix, fix, 0))); + + else if (fix < 0) + csum = (__force u16) + ~csum_fold(csum_add((__force __wsum) csum, + csum_partial(t_header, -fix, 0))); + + return swab16(csum); +} + +static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb) +{ + u32 rc; + + if (skb->ip_summed != CHECKSUM_PARTIAL) + rc = XMIT_PLAIN; + + else { + if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) { + rc = XMIT_CSUM_V6; + if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) + rc |= XMIT_CSUM_TCP; + + } else { + rc = XMIT_CSUM_V4; + if (ip_hdr(skb)->protocol == IPPROTO_TCP) + rc |= XMIT_CSUM_TCP; + } + } + +#ifdef NETIF_F_GSO /* BNX2X_UPSTREAM */ + /* + * Don't try to align it to the upstream because NETIF_F_GSO is + * introduced in 2.6.18 together with the skb_is_gso(skb) which checks + * gso_size. At the same time gso_type could be SKB_GSO_TCPV4 or + * SKB_GSO_UDP, thus we can't use skb_is_gso(skb) from that kerel here. + */ + if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) + rc |= (XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP); + +#ifdef NETIF_F_TSO6 /* BNX2X_UPSTREAM */ + else if (skb_is_gso_v6(skb)) + rc |= (XMIT_GSO_V6 | XMIT_CSUM_TCP | XMIT_CSUM_V6); +#endif +#elif defined(NETIF_F_TSO) /* none BNX2X_UPSTREAM */ + if (skb_is_gso(skb)) + rc |= (XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP); +#endif + + return rc; +} + +#if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3) +/* check if packet requires linearization (packet is too fragmented) + no need to check fragmentation if page size > 8K (there will be no + violation to FW restrictions) */ +static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb, + u32 xmit_type) +{ + int to_copy = 0; + int hlen = 0; + int first_bd_sz = 0; + + /* 3 = 1 (for linear data BD) + 2 (for PBD and last BD) */ + if (skb_shinfo(skb)->nr_frags >= (MAX_FETCH_BD - 3)) { + + if (xmit_type & XMIT_GSO) { +#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ + unsigned short lso_mss = skb_shinfo(skb)->gso_size; + /* Check if LSO packet needs to be copied: + 3 = 1 (for headers BD) + 2 (for PBD and last BD) */ + int wnd_size = MAX_FETCH_BD - 3; + /* Number of windows to check */ + int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size; + int wnd_idx = 0; + int frag_idx = 0; + u32 wnd_sum = 0; + + /* Headers length */ + hlen = (int)(skb_transport_header(skb) - skb->data) + + tcp_hdrlen(skb); + + /* Amount of data (w/o headers) on linear part of SKB*/ + first_bd_sz = skb_headlen(skb) - hlen; + + wnd_sum = first_bd_sz; + + /* Calculate the first sum - it's special */ + for (frag_idx = 0; frag_idx < wnd_size - 1; frag_idx++) + wnd_sum += + skb_shinfo(skb)->frags[frag_idx].size; + + /* If there was data on linear skb data - check it */ + if (first_bd_sz > 0) { + if (unlikely(wnd_sum < lso_mss)) { + to_copy = 1; + goto exit_lbl; + } + + wnd_sum -= first_bd_sz; + } + + /* Others are easier: run through the frag list and + check all windows */ + for (wnd_idx = 0; wnd_idx <= num_wnds; wnd_idx++) { + wnd_sum += + skb_shinfo(skb)->frags[wnd_idx + wnd_size - 1].size; + + if (unlikely(wnd_sum < lso_mss)) { + to_copy = 1; + break; + } + wnd_sum -= + skb_shinfo(skb)->frags[wnd_idx].size; + } +#endif + } else { + /* in non-LSO too fragmented packet should always + be linearized */ + to_copy = 1; + } + } + +#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ +exit_lbl: +#endif + if (unlikely(to_copy)) + DP(NETIF_MSG_TX_QUEUED, + "Linearization IS REQUIRED for %s packet. num_frags %d hlen %d first_bd_sz %d\n", + (xmit_type & XMIT_GSO) ? "LSO" : "non-LSO", + skb_shinfo(skb)->nr_frags, hlen, first_bd_sz); + + return to_copy; +} +#endif + +#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ +static inline void bnx2x_set_pbd_gso_e2(struct sk_buff *skb, u32 *parsing_data, + u32 xmit_type) +{ + *parsing_data |= (skb_shinfo(skb)->gso_size << + ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT) & + ETH_TX_PARSE_BD_E2_LSO_MSS; + if ((xmit_type & XMIT_GSO_V6) && + (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) + *parsing_data |= ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR; +} + +/** + * bnx2x_set_pbd_gso - update PBD in GSO case. + * + * @skb: packet skb + * @pbd: parse BD + * @xmit_type: xmit flags + */ +static inline void bnx2x_set_pbd_gso(struct sk_buff *skb, + struct eth_tx_parse_bd_e1x *pbd, + u32 xmit_type) +{ + pbd->lso_mss = cpu_to_le16(skb_shinfo(skb)->gso_size); + pbd->tcp_send_seq = swab32(tcp_hdr(skb)->seq); + pbd->tcp_flags = pbd_tcp_flags(skb); + + if (xmit_type & XMIT_GSO_V4) { + pbd->ip_id = swab16(ip_hdr(skb)->id); + pbd->tcp_pseudo_csum = + swab16(~csum_tcpudp_magic(ip_hdr(skb)->saddr, + ip_hdr(skb)->daddr, + 0, IPPROTO_TCP, 0)); + + } else + pbd->tcp_pseudo_csum = + swab16(~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, + &ipv6_hdr(skb)->daddr, + 0, IPPROTO_TCP, 0)); + + pbd->global_data |= ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN; +} +#endif /* NETIF_F_TSO */ + +/** + * bnx2x_set_pbd_csum_e2 - update PBD with checksum and return header length + * + * @bp: driver handle + * @skb: packet skb + * @parsing_data: data to be updated + * @xmit_type: xmit flags + * + * 57712 related + */ +static inline u8 bnx2x_set_pbd_csum_e2(struct bnx2x *bp, struct sk_buff *skb, + u32 *parsing_data, u32 xmit_type) +{ + *parsing_data |= + ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) << + ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT) & + ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W; + + if (xmit_type & XMIT_CSUM_TCP) { + *parsing_data |= ((tcp_hdrlen(skb) / 4) << + ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT) & + ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW; + + return skb_transport_header(skb) + tcp_hdrlen(skb) - skb->data; + } else + /* We support checksum offload for TCP and UDP only. + * No need to pass the UDP header length - it's a constant. + */ + return skb_transport_header(skb) + + sizeof(struct udphdr) - skb->data; +} + +static inline void bnx2x_set_sbd_csum(struct bnx2x *bp, struct sk_buff *skb, + struct eth_tx_start_bd *tx_start_bd, u32 xmit_type) +{ + tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM; + + if (xmit_type & XMIT_CSUM_V4) + tx_start_bd->bd_flags.as_bitfield |= + ETH_TX_BD_FLAGS_IP_CSUM; + else + tx_start_bd->bd_flags.as_bitfield |= + ETH_TX_BD_FLAGS_IPV6; + + if (!(xmit_type & XMIT_CSUM_TCP)) + tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IS_UDP; +} + +/** + * bnx2x_set_pbd_csum - update PBD with checksum and return header length + * + * @bp: driver handle + * @skb: packet skb + * @pbd: parse BD to be updated + * @xmit_type: xmit flags + */ +static inline u8 bnx2x_set_pbd_csum(struct bnx2x *bp, struct sk_buff *skb, + struct eth_tx_parse_bd_e1x *pbd, + u32 xmit_type) +{ + u8 hlen = (skb_network_header(skb) - skb->data) >> 1; + + /* for now NS flag is not used in Linux */ + pbd->global_data = + (hlen | ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) << + ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT)); + + pbd->ip_hlen_w = (skb_transport_header(skb) - + skb_network_header(skb)) >> 1; + + hlen += pbd->ip_hlen_w; + + /* We support checksum offload for TCP and UDP only */ + if (xmit_type & XMIT_CSUM_TCP) + hlen += tcp_hdrlen(skb) / 2; + else + hlen += sizeof(struct udphdr) / 2; + + pbd->total_hlen_w = cpu_to_le16(hlen); + hlen = hlen*2; + + if (xmit_type & XMIT_CSUM_TCP) { + pbd->tcp_pseudo_csum = swab16(tcp_hdr(skb)->check); + + } else { + s8 fix = SKB_CS_OFF(skb); /* signed! */ + + DP(NETIF_MSG_TX_QUEUED, + "hlen %d fix %d csum before fix %x\n", + le16_to_cpu(pbd->total_hlen_w), fix, SKB_CS(skb)); + + /* HW bug: fixup the CSUM */ + pbd->tcp_pseudo_csum = + bnx2x_csum_fix(skb_transport_header(skb), + SKB_CS(skb), fix); + + DP(NETIF_MSG_TX_QUEUED, "csum after fix %x\n", + pbd->tcp_pseudo_csum); + } + + return hlen; +} + +/* called with netif_tx_lock + * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call + * netif_wake_queue() + */ +netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev) +{ +#ifdef BNX2X_ESX_CNA /* non BNX2X_UPSTREAM */ + struct bnx2x *bp; + + if (dev->features & NETIF_F_CNA) + bp = dev->priv; + else + bp = netdev_priv(dev); +#else /* BNX2X_UPSTREAM */ + struct bnx2x *bp = netdev_priv(dev); +#endif + +#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ + struct netdev_queue *txq; +#endif + struct bnx2x_fp_txdata *txdata; + struct sw_tx_bd *tx_buf; + struct eth_tx_start_bd *tx_start_bd, *first_bd; + struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL; + struct eth_tx_parse_bd_e1x *pbd_e1x = NULL; + struct eth_tx_parse_bd_e2 *pbd_e2 = NULL; + u32 pbd_e2_parsing_data = 0; + u16 pkt_prod, bd_prod; + int nbd, txq_index; + dma_addr_t mapping; + u32 xmit_type = bnx2x_xmit_type(bp, skb); + int i; + u8 hlen = 0; + __le16 pkt_size = 0; + struct ethhdr *eth; + u8 mac_type = UNICAST_ADDRESS; + +#ifdef BNX2X_STOP_ON_ERROR + if (unlikely(bp->panic)) + return NETDEV_TX_BUSY; +#endif + +#ifdef BNX2X_NETQ /* non BNX2X_UPSTREAM */ +#if !defined(BNX2X_ESX_CNA) + VMK_ASSERT(skb->queue_mapping <= BNX2X_NUM_NETQUEUES(bp)); +#endif +#if defined(BNX2X_ESX_CNA) + if (dev->features & NETIF_F_CNA) + txq_index = bnx2x_fcoe_tx(bp, txq_index); + else +#endif + txq_index = skb->queue_mapping; + txq = netdev_get_tx_queue(dev, txq_index); +#else /* BNX2X_UPSTREAM */ +#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ + txq_index = skb_get_queue_mapping(skb); + txq = netdev_get_tx_queue(dev, txq_index); + +#if defined(__VMKLNX__) && defined(VMWARE_ESX_DDK_VERSION) && (VMWARE_ESX_DDK_VERSION < 50000) + /* Drop the packet if the queue has been stopped */ + if (unlikely(netif_tx_queue_stopped(txq))) { + dev_kfree_skb_any(skb); + return NETDEV_TX_OK; + } +#endif +#else + txq_index = 0; + +#if defined(__VMKLNX__) && defined(VMWARE_ESX_DDK_VERSION) && (VMWARE_ESX_DDK_VERSION < 50000) + /* Drop the packet if the queue has been stopped */ + if (unlikely(netif_queue_stopped(dev))) { + dev_kfree_skb_any(skb); + return NETDEV_TX_OK; + } +#endif +#endif +#endif + + BUG_ON(txq_index >= MAX_ETH_TXQ_IDX(bp) + FCOE_PRESENT); + + txdata = &bp->bnx2x_txq[txq_index]; + + /* enable this debug print to view the transmission queue being used + DP(NETIF_MSG_TX_QUEUED, "indices: txq %d, fp %d, txdata %d\n", + txq_index, fp_index, txdata_index); */ + + /* enable this debug print to view the tranmission details + DP(NETIF_MSG_TX_QUEUED, + "transmitting packet cid %d fp index %d txdata_index %d tx_data ptr %p fp pointer %p\n", + txdata->cid, fp_index, txdata_index, txdata, fp); */ + + if (unlikely(bnx2x_tx_avail(bp, txdata) < + (skb_shinfo(skb)->nr_frags + 3))) { + + if (txdata->tx_ring_size == 0) { + txdata->parent_fp->eth_q_stats.driver_filtered_tx_pkt++; + dev_kfree_skb(skb); + return NETDEV_TX_OK; + } + txdata->parent_fp->eth_q_stats.driver_xoff++; +#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ + netif_tx_stop_queue(txq); +#else + netif_stop_queue(dev); +#endif + BNX2X_ERR("BUG! Tx ring full when queue awake!\n"); + return NETDEV_TX_BUSY; + } + +#ifdef NETIF_F_GSO /* BNX2X_UPSTREAM */ + DP(NETIF_MSG_TX_QUEUED, + "queue[%d]: SKB: summed %x protocol %x protocol(%x,%x) gso type %x xmit_type %x\n", + txq_index, skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr, + ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type); +#endif + + eth = (struct ethhdr *)skb->data; + + /* set flag according to packet type (UNICAST_ADDRESS is default)*/ + if (unlikely(is_multicast_ether_addr(eth->h_dest))) { + if (is_broadcast_ether_addr(eth->h_dest)) + mac_type = BROADCAST_ADDRESS; + else + mac_type = MULTICAST_ADDRESS; + } + +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION <= 40000) /* ! BNX2X_UPSTREAM */ + if (xmit_type & XMIT_CSUM){ + /* + * The first sg element might not contain all the headers. + * Look at PR379952/PR405074. + * Do a simple check and if this holds pull tail on the skb. + * This should happen only when the VMs are using 3.0.x tools + * so it is a corner case. + */ + unsigned int hdr_len = + (unsigned int)(skb_transport_header(skb) + + sizeof(struct tcphdr) - skb->data); + if (!pskb_may_pull(skb, hdr_len)) { + DP(NETIF_MSG_TX_QUEUED, + "pskb_may_pull() failed. Silently dropping...\n"); + dev_kfree_skb_any(skb); + return NETDEV_TX_OK; + } + } +#endif +#if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3) + /* First, check if we need to linearize the skb (due to FW + restrictions). No need to check fragmentation if page size > 8K + (there will be no violation to FW restrictions) */ + if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) { + /* Statistics of linearization */ + bp->lin_cnt++; +#if (LINUX_VERSION_CODE > 0x020611) || defined(SLE_VERSION_CODE) /* BNX2X_UPSTREAM */ + if (skb_linearize(skb) != 0) { +#else + if (skb_linearize(skb, GFP_ATOMIC) != 0) { +#endif + DP(NETIF_MSG_TX_QUEUED, + "SKB linearization failed - silently dropping this SKB\n"); + dev_kfree_skb_any(skb); + return NETDEV_TX_OK; + } + } +#endif + /* Map skb linear data for DMA */ +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + mapping = dma_map_single(&bp->pdev->dev, skb->data, + skb_headlen(skb), DMA_TO_DEVICE); +#else + mapping = pci_map_single(bp->pdev, skb->data, + skb_headlen(skb), PCI_DMA_TODEVICE); +#endif +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { +#else + if (unlikely(dma_mapping_error(mapping))) { +#endif + DP(NETIF_MSG_TX_QUEUED, + "SKB mapping failed - silently dropping this SKB\n"); + dev_kfree_skb_any(skb); + return NETDEV_TX_OK; + } + /* + Please read carefully. First we use one BD which we mark as start, + then we have a parsing info BD (used for TSO or xsum), + and only then we have the rest of the TSO BDs. + (don't forget to mark the last one as last, + and to unmap only AFTER you write to the BD ...) + And above all, all pdb sizes are in words - NOT DWORDS! + */ + + /* get current pkt produced now - advance it just before sending packet + * since mapping of pages may fail and cause packet to be dropped + */ + pkt_prod = txdata->tx_pkt_prod; + bd_prod = TX_BD(txdata->tx_bd_prod); + + /* get a tx_buf and first BD + * tx_start_bd may be changed during SPLIT, + * but first_bd will always stay first + */ + tx_buf = &txdata->tx_buf_ring[TX_BD(pkt_prod)]; + tx_start_bd = &txdata->tx_desc_ring[bd_prod].start_bd; + first_bd = tx_start_bd; + + tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; + SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_ETH_ADDR_TYPE, + mac_type); + + /* header nbd */ + SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_HDR_NBDS, 1); + + /* remember the first BD of the packet */ + tx_buf->first_bd = txdata->tx_bd_prod; + tx_buf->skb = skb; + tx_buf->flags = 0; + + DP(NETIF_MSG_TX_QUEUED, + "sending pkt %u @%p next_idx %u bd %u @%p\n", + pkt_prod, tx_buf, txdata->tx_pkt_prod, bd_prod, tx_start_bd); + +#if defined(OLD_VLAN) +#if !defined(BNX2X_ESX_CNA) + if ((bp->vlgrp != NULL) && vlan_tx_tag_present(skb)) { +#else + if (((IS_FCOE_FP(txdata->parent_fp) && (bp->cna_vlgrp != NULL)) || + (!IS_FCOE_FP(txdata->parent_fp) && (bp->vlgrp != NULL))) && + vlan_tx_tag_present(skb)) { +#endif +#else /* BNX2X_UPSTREAM */ + if (vlan_tx_tag_present(skb)) { +#endif + tx_start_bd->vlan_or_ethertype = + cpu_to_le16(vlan_tx_tag_get(skb)); + tx_start_bd->bd_flags.as_bitfield |= + (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT); + } else { + /* used by FW for packet accounting */ + tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod); + + /* if NPAR-SD is active then FW should do the tagging + * regardless of value of priority. Otherwise, if priority + * indicates this is a control packet we need to indicate to + * FW to avoid tagging. + */ + if (!IS_MF_AFEX(bp) && (skb->priority == TC_PRIO_CONTROL)) + SET_FLAG(tx_start_bd->general_data, + ETH_TX_START_BD_FORCE_VLAN_MODE, 1); + } + + /* turn on parsing and get a BD */ + bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); + + if (xmit_type & XMIT_CSUM) + bnx2x_set_sbd_csum(bp, skb, tx_start_bd, xmit_type); + + if (!CHIP_IS_E1x(bp)) { + pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2; + memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2)); + /* Set PBD in checksum offload case */ + if (xmit_type & XMIT_CSUM) + hlen = bnx2x_set_pbd_csum_e2(bp, skb, + &pbd_e2_parsing_data, + xmit_type); +#ifndef BCM_IOV /* BNX2X_UPSTREAM */ + if (IS_MF_SI(bp)) { +#endif + /* + * fill in the MAC addresses in the PBD - for local + * switching + */ + bnx2x_set_fw_mac_addr(&pbd_e2->src_mac_addr_hi, + &pbd_e2->src_mac_addr_mid, + &pbd_e2->src_mac_addr_lo, + eth->h_source); + bnx2x_set_fw_mac_addr(&pbd_e2->dst_mac_addr_hi, + &pbd_e2->dst_mac_addr_mid, + &pbd_e2->dst_mac_addr_lo, + eth->h_dest); +#ifndef BCM_IOV /* BNX2X_UPSTREAM */ + } +#endif + } else { + pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x; + memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x)); + /* Set PBD in checksum offload case */ + if (xmit_type & XMIT_CSUM) + hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type); + + } + + /* Setup the data pointer of the first BD of the packet */ + tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); + tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); + nbd = 2; /* start_bd + pbd + frags (updated when pages are mapped) */ + tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb)); + pkt_size = tx_start_bd->nbytes; + + DP(NETIF_MSG_TX_QUEUED, + "first bd @%p addr (%x:%x) nbd %d nbytes %d flags %x vlan %x\n", + tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo, + le16_to_cpu(tx_start_bd->nbd), le16_to_cpu(tx_start_bd->nbytes), + tx_start_bd->bd_flags.as_bitfield, + le16_to_cpu(tx_start_bd->vlan_or_ethertype)); + +#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ + if (xmit_type & XMIT_GSO) { + + DP(NETIF_MSG_TX_QUEUED, + "TSO packet len %d hlen %d total len %d tso size %d\n", + skb->len, hlen, skb_headlen(skb), + skb_shinfo(skb)->gso_size); + + tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO; + + if (unlikely(skb_headlen(skb) > hlen)) + bd_prod = bnx2x_tx_split(bp, txdata, tx_buf, + &tx_start_bd, hlen, + bd_prod, ++nbd); + if (!CHIP_IS_E1x(bp)) + bnx2x_set_pbd_gso_e2(skb, &pbd_e2_parsing_data, + xmit_type); + else + bnx2x_set_pbd_gso(skb, pbd_e1x, xmit_type); + } +#endif + + /* Set the PBD's parsing_data field if not zero + * (for the chips newer than 57711). + */ + if (pbd_e2_parsing_data) + pbd_e2->parsing_data = cpu_to_le32(pbd_e2_parsing_data); + + tx_data_bd = (struct eth_tx_bd *)tx_start_bd; + + /* Handle fragmented skb */ + for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { + skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; + +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + mapping = skb_frag_dma_map(&bp->pdev->dev, frag, 0, frag->size, + DMA_TO_DEVICE); +#else + mapping = pci_map_page(bp->pdev, frag->page, frag->page_offset, + frag->size, PCI_DMA_TODEVICE); +#endif +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { +#else + if (unlikely(dma_mapping_error(mapping))) { +#endif + unsigned int pkts_compl = 0, bytes_compl = 0; + + DP(NETIF_MSG_TX_QUEUED, + "Unable to map page - dropping packet...\n"); + + /* we need unmap all buffers already mapped + * for this SKB; + * first_bd->nbd need to be properly updated + * before call to bnx2x_free_tx_pkt + */ + first_bd->nbd = cpu_to_le16(nbd); + bnx2x_free_tx_pkt(bp, txdata, + TX_BD(txdata->tx_pkt_prod), + &pkts_compl, &bytes_compl); + return NETDEV_TX_OK; + } + + bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); + tx_data_bd = &txdata->tx_desc_ring[bd_prod].reg_bd; + if (total_pkt_bd == NULL) + total_pkt_bd = &txdata->tx_desc_ring[bd_prod].reg_bd; + + tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); + tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); + tx_data_bd->nbytes = cpu_to_le16(frag->size); + le16_add_cpu(&pkt_size, frag->size); + nbd++; + + DP(NETIF_MSG_TX_QUEUED, + "frag %d bd @%p addr (%x:%x) nbytes %d\n", + i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo, + le16_to_cpu(tx_data_bd->nbytes)); + } + + DP(NETIF_MSG_TX_QUEUED, "last bd @%p\n", tx_data_bd); + + /* update with actual num BDs */ + first_bd->nbd = cpu_to_le16(nbd); + + bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); + + /* now send a tx doorbell, counting the next BD + * if the packet contains or ends with it + */ + if (TX_BD_POFF(bd_prod) < nbd) + nbd++; + + /* total_pkt_bytes should be set on the first data BD if + * it's not an LSO packet and there is more than one + * data BD. In this case pkt_size is limited by an MTU value. + * However we prefer to set it for an LSO packet (while we don't + * have to) in order to save some CPU cycles in a none-LSO + * case, when we much more care about them. + */ + if (total_pkt_bd != NULL) + total_pkt_bd->total_pkt_bytes = pkt_size; + + if (pbd_e1x) + DP(NETIF_MSG_TX_QUEUED, + "PBD (E1X) @%p ip_data %x ip_hlen %u ip_id %u lso_mss %u tcp_flags %x xsum %x seq %u hlen %u\n", + pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w, + pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags, + pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq, + le16_to_cpu(pbd_e1x->total_hlen_w)); + if (pbd_e2) + DP(NETIF_MSG_TX_QUEUED, + "PBD (E2) @%p dst %x %x %x src %x %x %x parsing_data %x\n", + pbd_e2, pbd_e2->dst_mac_addr_hi, pbd_e2->dst_mac_addr_mid, + pbd_e2->dst_mac_addr_lo, pbd_e2->src_mac_addr_hi, + pbd_e2->src_mac_addr_mid, pbd_e2->src_mac_addr_lo, + pbd_e2->parsing_data); + DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d bd %u\n", nbd, bd_prod); + +#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ + netdev_tx_sent_queue(txq, skb->len); +#endif + + txdata->tx_pkt_prod++; + /* + * Make sure that the BD data is updated before updating the producer + * since FW might read the BD right after the producer is updated. + * This is only applicable for weak-ordered memory model archs such + * as IA-64. The following barrier is also mandatory since FW will + * assumes packets must have BDs. + */ + wmb(); + + txdata->tx_db.data.prod += nbd; + barrier(); + + DOORBELL(bp, txdata->cid, txdata->tx_db.raw); + + mmiowb(); + + txdata->tx_bd_prod += nbd; +#if (LINUX_VERSION_CODE < 0x02061f) /* ! BNX2X_UPSTREAM */ + /* In kernels starting from 2.6.31 netdev layer does this */ + dev->trans_start = jiffies; +#endif + + if (unlikely(bnx2x_tx_avail(bp, txdata) < MAX_SKB_FRAGS + 3)) { +#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ + netif_tx_stop_queue(txq); +#else + netif_stop_queue(dev); +#endif + + /* paired memory barrier is in bnx2x_tx_int(), we have to keep + * ordering of set_bit() in netif_tx_stop_queue() and read of + * fp->bd_tx_cons */ + smp_mb(); + + txdata->parent_fp->eth_q_stats.driver_xoff++; + if (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3) +#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ + netif_tx_wake_queue(txq); +#else + netif_wake_queue(dev); +#endif + } + txdata->tx_pkt++; + + return NETDEV_TX_OK; +} + +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ +/** + * bnx2x_setup_tc - routine to configure net_device for multi tc + * + * @netdev: net device to configure + * @tc: number of traffic classes to enable + * + * callback connected to the ndo_setup_tc function pointer + */ +int bnx2x_setup_tc(struct net_device *dev, u8 num_tc) +{ + int cos, prio, count, offset; + struct bnx2x *bp = netdev_priv(dev); + + /* setup tc must be called under rtnl lock */ + ASSERT_RTNL(); + + /* no traffic classes requested. aborting */ + if (!num_tc) { + netdev_reset_tc(dev); + return 0; + } + + /* requested to support too many traffic classes */ + if (num_tc > bp->max_cos) { + BNX2X_ERR("support for too many traffic classes requested: %d. max supported is %d\n", + num_tc, bp->max_cos); + return -EINVAL; + } + + /* declare amount of supported traffic classes */ + if (netdev_set_num_tc(dev, num_tc)) { + BNX2X_ERR("failed to declare %d traffic classes\n", num_tc); + return -EINVAL; + } + + /* configure priority to traffic class mapping */ + for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) { + netdev_set_prio_tc_map(dev, prio, bp->prio_to_cos[prio]); + DP(BNX2X_MSG_SP | NETIF_MSG_IFUP, + "mapping priority %d to tc %d\n", + prio, bp->prio_to_cos[prio]); + } + + + /* Use this configuration to diffrentiate tc0 from other COSes + This can be used for ets or pfc, and save the effort of setting + up a multio class queue disc or negotiating DCBX with a switch + netdev_set_prio_tc_map(dev, 0, 0); + DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", 0, 0); + for (prio = 1; prio < 16; prio++) { + netdev_set_prio_tc_map(dev, prio, 1); + DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", prio, 1); + } */ + + /* configure traffic class to transmission queue mapping */ + for (cos = 0; cos < bp->max_cos; cos++) { + count = BNX2X_NUM_ETH_QUEUES(bp); + offset = cos * BNX2X_NUM_NON_CNIC_QUEUES(bp); + netdev_set_tc_queue(dev, cos, count, offset); + DP(BNX2X_MSG_SP | NETIF_MSG_IFUP, + "mapping tc %d to offset %d count %d\n", + cos, offset, count); + } + + return 0; +} +#endif + +/* called with rtnl_lock */ +int bnx2x_change_mac_addr(struct net_device *dev, void *p) +{ + struct sockaddr *addr = p; + struct bnx2x *bp = netdev_priv(dev); + int rc = 0; + + if (!bnx2x_is_valid_ether_addr(bp, addr->sa_data)) { + BNX2X_ERR("Requested MAC address is not valid\n"); + return -EINVAL; + } + +#ifdef BCM_CNIC + if ((IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)) && + !is_zero_ether_addr(addr->sa_data)) { + BNX2X_ERR("Can't configure non-zero address on iSCSI or FCoE functions in MF-SD mode\n"); + return -EINVAL; + } +#endif + + if (netif_running(dev)) { + rc = bnx2x_set_eth_mac(bp, false); + if (rc) + return rc; + } + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) /* BNX2X_UPSTREAM */ + dev->addr_assign_type &= ~NET_ADDR_RANDOM; +#endif + memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); + + if (netif_running(dev)) + rc = bnx2x_set_eth_mac(bp, true); + + return rc; +} + +static void bnx2x_free_fp_mem_at(struct bnx2x *bp, int fp_index) +{ + union host_hc_status_block *sb = &bnx2x_fp(bp, fp_index, status_blk); + struct bnx2x_fastpath *fp = &bp->fp[fp_index]; + u8 cos; + + /* Common */ +#ifdef BCM_CNIC +#ifdef BCM_OOO /* not BNX2X_UPSTREAM */ + /* OOO and Forwarding clients use CNIC status block + * FCoE client uses default status block + */ + if (IS_OOO_IDX(fp_index) || + IS_FWD_IDX(fp_index) || + IS_FCOE_IDX(fp_index)) { +#else /* BNX2X_UPSTREAM */ + if (IS_FCOE_IDX(fp_index)) { +#endif + memset(sb, 0, sizeof(union host_hc_status_block)); + fp->status_blk_mapping = 0; + + } else { +#endif + /* status blocks */ + if (!CHIP_IS_E1x(bp)) + BNX2X_PCI_FREE(sb->e2_sb, + bnx2x_fp(bp, fp_index, + status_blk_mapping), + sizeof(struct host_hc_status_block_e2)); + else + BNX2X_PCI_FREE(sb->e1x_sb, + bnx2x_fp(bp, fp_index, + status_blk_mapping), + sizeof(struct host_hc_status_block_e1x)); +#ifdef BCM_CNIC + } +#endif + /* Rx */ + if (!skip_rx_queue(bp, fp_index)) { + bnx2x_free_rx_bds(fp); + + /* fastpath rx rings: rx_buf rx_desc rx_comp */ + BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_buf_ring)); + BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_desc_ring), + bnx2x_fp(bp, fp_index, rx_desc_mapping), + sizeof(struct eth_rx_bd) * NUM_RX_BD); + + BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_comp_ring), + bnx2x_fp(bp, fp_index, rx_comp_mapping), + sizeof(struct eth_fast_path_rx_cqe) * + NUM_RCQ_BD); + + /* SGE ring */ + BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_page_ring)); + BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_sge_ring), + bnx2x_fp(bp, fp_index, rx_sge_mapping), + BCM_PAGE_SIZE * NUM_RX_SGE_PAGES); + } + + /* Tx */ + if (!skip_tx_queue(bp, fp_index)) { + /* fastpath tx rings: tx_buf tx_desc */ + for_each_cos_in_tx_queue(fp, cos) { + struct bnx2x_fp_txdata *txdata = fp->txdata_ptr[cos]; + + DP(NETIF_MSG_IFDOWN, + "freeing tx memory of fp %d cos %d cid %d\n", + fp_index, cos, txdata->cid); + + BNX2X_FREE(txdata->tx_buf_ring); + BNX2X_PCI_FREE(txdata->tx_desc_ring, + txdata->tx_desc_mapping, + sizeof(union eth_tx_bd_types) * NUM_TX_BD); + } + } + /* end of fastpath */ +} + +void bnx2x_free_fp_mem(struct bnx2x *bp) +{ + int i; + for_each_queue(bp, i) + bnx2x_free_fp_mem_at(bp, i); +} + +static inline void set_sb_shortcuts(struct bnx2x *bp, int index) +{ + union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk); + if (!CHIP_IS_E1x(bp)) { + bnx2x_fp(bp, index, sb_index_values) = + (__le16 *)status_blk.e2_sb->sb.index_values; + bnx2x_fp(bp, index, sb_running_index) = + (__le16 *)status_blk.e2_sb->sb.running_index; + } else { + bnx2x_fp(bp, index, sb_index_values) = + (__le16 *)status_blk.e1x_sb->sb.index_values; + bnx2x_fp(bp, index, sb_running_index) = + (__le16 *)status_blk.e1x_sb->sb.running_index; + } +} + +static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index) +{ + union host_hc_status_block *sb; + struct bnx2x_fastpath *fp = &bp->fp[index]; + int ring_size = 0; + u8 cos; + int rx_ring_size = 0; + +#ifdef BCM_CNIC + if (!bp->rx_ring_size && + (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) { + rx_ring_size = MIN_RX_SIZE_NONTPA; + bp->rx_ring_size = rx_ring_size; + } else +#endif + if (!bp->rx_ring_size) { + rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp); + + if (CHIP_IS_E3(bp)) { + u32 cfg = SHMEM_RD(bp, + dev_info.port_hw_config[BP_PORT(bp)]. + default_cfg); + + /* Decrease ring size for 1G functions */ + if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) == + PORT_HW_CFG_NET_SERDES_IF_SGMII) + rx_ring_size /= 10; + } + + /* allocate at least number of buffers required by FW */ + rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA : + MIN_RX_SIZE_TPA, rx_ring_size); + + bp->rx_ring_size = rx_ring_size; + } else /* if rx_ring_size specified - use it */ + rx_ring_size = bp->rx_ring_size; + + /* Common */ + sb = &bnx2x_fp(bp, index, status_blk); +#ifdef BCM_CNIC +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (IS_OOO_IDX(index) || IS_FWD_IDX(index)) { + if (!CHIP_IS_E1x(bp)) + sb->e2_sb = bp->cnic_sb.e2_sb; + else + sb->e1x_sb = bp->cnic_sb.e1x_sb; + + bnx2x_fp(bp, index, status_blk_mapping) = + bp->cnic_sb_mapping; + } else +#endif + if (!IS_FCOE_IDX(index)) { +#endif + /* status blocks */ + if (!CHIP_IS_E1x(bp)) + BNX2X_PCI_ALLOC(sb->e2_sb, + &bnx2x_fp(bp, index, status_blk_mapping), + sizeof(struct host_hc_status_block_e2)); + else + BNX2X_PCI_ALLOC(sb->e1x_sb, + &bnx2x_fp(bp, index, status_blk_mapping), + sizeof(struct host_hc_status_block_e1x)); +#ifdef BCM_CNIC + } +#endif + + /* FCoE Queue uses Default SB and doesn't ACK the SB, thus no need to + * set shortcuts for it. + */ + if (!IS_FCOE_IDX(index)) + set_sb_shortcuts(bp, index); + + /* Tx */ + if (!skip_tx_queue(bp, index)) { + /* fastpath tx rings: tx_buf tx_desc */ + for_each_cos_in_tx_queue(fp, cos) { + struct bnx2x_fp_txdata *txdata = fp->txdata_ptr[cos]; + + DP(NETIF_MSG_IFUP, + "allocating tx memory of fp %d cos %d\n", + index, cos); + + BNX2X_ALLOC(txdata->tx_buf_ring, + sizeof(struct sw_tx_bd) * NUM_TX_BD); + BNX2X_PCI_ALLOC(txdata->tx_desc_ring, + &txdata->tx_desc_mapping, + sizeof(union eth_tx_bd_types) * NUM_TX_BD); + } + } + + /* Rx */ + if (!skip_rx_queue(bp, index)) { + /* fastpath rx rings: rx_buf rx_desc rx_comp */ + BNX2X_ALLOC(bnx2x_fp(bp, index, rx_buf_ring), + sizeof(struct sw_rx_bd) * NUM_RX_BD); + BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_desc_ring), + &bnx2x_fp(bp, index, rx_desc_mapping), + sizeof(struct eth_rx_bd) * NUM_RX_BD); + +#ifndef BNX2X_CHAR_DEV /* BNX2X_UPSTREAM */ + BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_comp_ring), +#else + BNX2X_PCI_FALLOC(bnx2x_fp(bp, index, rx_comp_ring), +#endif + &bnx2x_fp(bp, index, rx_comp_mapping), + sizeof(struct eth_fast_path_rx_cqe) * + NUM_RCQ_BD); + + /* SGE ring */ + BNX2X_ALLOC(bnx2x_fp(bp, index, rx_page_ring), + sizeof(struct sw_rx_page) * NUM_RX_SGE); + BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_sge_ring), + &bnx2x_fp(bp, index, rx_sge_mapping), + BCM_PAGE_SIZE * NUM_RX_SGE_PAGES); + /* RX BD ring */ + bnx2x_set_next_page_rx_bd(fp); + + /* CQ ring */ + bnx2x_set_next_page_rx_cq(fp); + + /* BDs */ +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (IS_OOO_FP(fp)) { + ring_size = bnx2x_alloc_ooo_rx_bd_ring(fp); + if (ring_size < min_t(int, + /* Delete me! For integration only! */ + min_t(int, + bp->tx_ring_size / 2, + 500), +/* min_t(int, + bp->tx_ring_size / 2, + bp->rx_ring_size), + */ + INIT_OOO_RING_SIZE)) + goto alloc_mem_err; + } else { +#endif + ring_size = bnx2x_alloc_rx_bds(fp, rx_ring_size); + if (ring_size < rx_ring_size) + goto alloc_mem_err; +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + } +#endif + } + + return 0; + +/* handles low memory cases */ +alloc_mem_err: + BNX2X_ERR("Unable to allocate full memory for queue %d (size %d)\n", + index, ring_size); + /* FW will drop all packets if queue is not big enough, + * In these cases we disable the queue + * Min size is different for OOO, TPA and non-TPA queues + */ +#ifdef BCM_OOO /* not BNX2X_UPSTREAM*/ + if ((IS_OOO_IDX(index) && ring_size < MIN_RX_AVAIL_OOO) || + (!IS_OOO_IDX(index) && + ring_size < (fp->disable_tpa ? + MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA))) { +#else /* BNX2X_UPSTREAM */ + if (ring_size < (fp->disable_tpa ? + MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA)) { +#endif + /* release memory allocated for this queue */ + bnx2x_free_fp_mem_at(bp, index); + return -ENOMEM; + } + return 0; +} + +int bnx2x_alloc_fp_mem(struct bnx2x *bp) +{ + int i; + + /** + * 1. Allocate FP for leading - fatal if error + * 2. {CNIC} Allocate FCoE FP - fatal if error + * 3. {CNIC} Allocate OOO + FWD - disable OOO if error + * 4. Allocate RSS - fix number of queues if error + */ + + /* leading */ + if (bnx2x_alloc_fp_mem_at(bp, 0)) + return -ENOMEM; + +#ifdef BCM_CNIC + if (!NO_FCOE(bp)) + /* FCoE */ + if (bnx2x_alloc_fp_mem_at(bp, FCOE_IDX)) + /* we will fail load process instead of mark + * NO_FCOE_FLAG + */ + return -ENOMEM; +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (!NO_ISCSI_OOO(bp)) { + /* OOO + FWD */ + if (bnx2x_alloc_fp_mem_at(bp, OOO_IDX(bp))) + bp->flags |= NO_ISCSI_OOO_FLAG; + else if (bnx2x_alloc_fp_mem_at(bp, FWD_IDX(bp))) { + bnx2x_free_fp_mem_at(bp, OOO_IDX(bp)); + bp->flags |= NO_ISCSI_OOO_FLAG; + } + } +#endif +#endif + + /* RSS */ + for_each_nondefault_eth_queue(bp, i) + if (bnx2x_alloc_fp_mem_at(bp, i)) + break; + + /* handle memory failures */ + if (i != BNX2X_NUM_ETH_QUEUES(bp)) { + int delta = BNX2X_NUM_ETH_QUEUES(bp) - i; + + WARN_ON(delta < 0); +#ifdef BCM_CNIC + /** + * move non eth FPs next to last eth FP + * must be done in that order + * FCOE_IDX < FWD_IDX < OOO_IDX + */ + + /* move FCoE fp even NO_FCOE_FLAG is on */ + bnx2x_move_fp(bp, FCOE_IDX, FCOE_IDX - delta); +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + /* move OOO and FWD - even NO_ISCSI_OOO_FLAG is on */ + bnx2x_move_fp(bp, FWD_IDX(bp), FWD_IDX(bp) - delta); + bnx2x_move_fp(bp, OOO_IDX(bp), OOO_IDX(bp) - delta); +#endif +#endif + bp->num_queues -= delta; + BNX2X_ERR("Adjusted num of queues from %d to %d\n", + bp->num_queues + delta, bp->num_queues); + } + + return 0; +} + +void bnx2x_free_mem_bp(struct bnx2x *bp) +{ + kfree(bp->fp); + kfree(bp->bnx2x_txq); + kfree(bp->msix_table); + kfree(bp->ilt); +} + +int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp) +{ + struct bnx2x_fastpath *fp; + struct msix_entry *tbl; + struct bnx2x_ilt *ilt; + int msix_table_size = 0; + + /* + * The biggest MSI-X table we might need is as a maximum number of fast + * path IGU SBs plus default SB (for PF). + */ +#ifdef BCM_VF + msix_table_size = bp->igu_sb_cnt + (HAS_DSB(bp) ? 1 : 0); +#else /* BNX2X_UPSTREAM */ + msix_table_size = bp->igu_sb_cnt + 1; +#endif + + /* fp array: RSS plus CNIC related L2 queues */ + fp = kcalloc(BNX2X_MAX_RSS_COUNT(bp) + NON_ETH_CONTEXT_USE, + sizeof(*fp), GFP_KERNEL); + if (!fp) + goto alloc_err; + bp->fp = fp; + + /* Allocate memory for the transmission queues array */ + bp->bnx2x_txq_size = BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS; +#ifdef BCM_CNIC + bp->bnx2x_txq_size++; +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + bp->bnx2x_txq_size += 2; +#endif +#endif + bp->bnx2x_txq = kcalloc(bp->bnx2x_txq_size, + sizeof(struct bnx2x_fp_txdata), GFP_KERNEL); + if (!bp->bnx2x_txq) + goto alloc_err; + + /* msix table */ + tbl = kcalloc(msix_table_size, sizeof(*tbl), GFP_KERNEL); + if (!tbl) + goto alloc_err; + bp->msix_table = tbl; + + /* ilt */ + ilt = kzalloc(sizeof(*ilt), GFP_KERNEL); + if (!ilt) + goto alloc_err; + bp->ilt = ilt; + + return 0; +alloc_err: + bnx2x_free_mem_bp(bp); + return -ENOMEM; + +} + +int bnx2x_reload_if_running(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (unlikely(!netif_running(dev))) + return 0; + + bnx2x_nic_unload(bp, UNLOAD_NORMAL); + return bnx2x_nic_load(bp, LOAD_NORMAL); +} + +int bnx2x_get_cur_phy_idx(struct bnx2x *bp) +{ + u32 sel_phy_idx = 0; + if (bp->link_params.num_phys <= 1) + return INT_PHY; + + if (bp->link_vars.link_up) { + sel_phy_idx = EXT_PHY1; + /* In case link is SERDES, check if the EXT_PHY2 is the one */ + if ((bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) && + (bp->link_params.phy[EXT_PHY2].supported & SUPPORTED_FIBRE)) + sel_phy_idx = EXT_PHY2; + } else { + + switch (bnx2x_phy_selection(&bp->link_params)) { + case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT: + case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY: + case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY: + sel_phy_idx = EXT_PHY1; + break; + case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY: + case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY: + sel_phy_idx = EXT_PHY2; + break; + } + } + + return sel_phy_idx; + +} +int bnx2x_get_link_cfg_idx(struct bnx2x *bp) +{ + u32 sel_phy_idx = bnx2x_get_cur_phy_idx(bp); + /* + * The selected activated PHY is always after swapping (in case PHY + * swapping is enabled). So when swapping is enabled, we need to reverse + * the configuration + */ + + if (bp->link_params.multi_phy_config & + PORT_HW_CFG_PHY_SWAPPED_ENABLED) { + if (sel_phy_idx == EXT_PHY1) + sel_phy_idx = EXT_PHY2; + else if (sel_phy_idx == EXT_PHY2) + sel_phy_idx = EXT_PHY1; + } + return LINK_CONFIG_IDX(sel_phy_idx); +} + +#if defined(NETDEV_FCOE_WWNN) && defined(BCM_CNIC) +int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type) +{ + struct bnx2x *bp = netdev_priv(dev); + struct cnic_eth_dev *cp = &bp->cnic_eth_dev; + + switch (type) { + case NETDEV_FCOE_WWNN: + *wwn = HILO_U64(cp->fcoe_wwn_node_name_hi, + cp->fcoe_wwn_node_name_lo); + break; + case NETDEV_FCOE_WWPN: + *wwn = HILO_U64(cp->fcoe_wwn_port_name_hi, + cp->fcoe_wwn_port_name_lo); + break; + default: + BNX2X_ERR("Wrong WWN type requested - %d\n", type); + return -EINVAL; + } + + return 0; +} +#endif + +/* called with rtnl_lock */ +int bnx2x_change_mtu(struct net_device *dev, int new_mtu) +{ + struct bnx2x *bp = netdev_priv(dev); +#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ + int rc = 0; +#endif + + if (bp->recovery_state != BNX2X_RECOVERY_DONE) { + BNX2X_ERR("Can't perform change MTU during parity recovery\n"); + return -EAGAIN; + } + + if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) || + ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE)) { + BNX2X_ERR("Can't support requested MTU size\n"); + return -EINVAL; + } + +#ifdef __VMKLNX__ /* non BNX2X_UPSTREAM */ + if (dev->mtu == new_mtu) + return rc; + if (netif_running(dev)) { + +#if (VMWARE_ESX_DDK_VERSION < 50000) + /* There is no need to hold rtnl_lock + * when calling change MTU into driver + * from VMkernel ESX 5.0 onwards. + */ + rtnl_lock(); +#endif + bnx2x_nic_unload(bp, UNLOAD_NORMAL); + dev->mtu = new_mtu; + + if (bp->dev->mtu > ETH_MAX_PACKET_SIZE) + bp->rx_ring_size = INIT_JUMBO_RX_RING_SIZE; + else + bp->rx_ring_size = INIT_RX_RING_SIZE; + + rc = bnx2x_nic_load(bp, LOAD_NORMAL); + +#if (VMWARE_ESX_DDK_VERSION < 50000) + rtnl_unlock(); +#endif + } else + dev->mtu = new_mtu; + + return rc; +#else /* BNX2X_UPSTREAM */ + /* This does not race with packet allocation + * because the actual alloc size is + * only updated as part of load + */ + dev->mtu = new_mtu; + + return bnx2x_reload_if_running(dev); +#endif +} +#if (LINUX_VERSION_CODE >= 0x020627) /* BNX2X_UPSTREAM */ + +netdev_features_t bnx2x_fix_features(struct net_device *dev, + netdev_features_t features) +{ + struct bnx2x *bp = netdev_priv(dev); + + /* TPA requires Rx CSUM offloading */ + if (!(features & NETIF_F_RXCSUM) || bp->disable_tpa) { + features &= ~NETIF_F_LRO; + features &= ~NETIF_F_GRO; + } + + return features; +} + +int bnx2x_set_features(struct net_device *dev, netdev_features_t features) +{ + struct bnx2x *bp = netdev_priv(dev); + u32 flags = bp->flags; + bool bnx2x_reload = false; + + if (features & NETIF_F_LRO) + flags |= TPA_ENABLE_FLAG; + else + flags &= ~TPA_ENABLE_FLAG; + + if (features & NETIF_F_GRO) + flags |= GRO_ENABLE_FLAG; + else + flags &= ~GRO_ENABLE_FLAG; + + if (features & NETIF_F_LOOPBACK) { + if (bp->link_params.loopback_mode != LOOPBACK_BMAC) { + bp->link_params.loopback_mode = LOOPBACK_BMAC; + bnx2x_reload = true; + } + } else { + if (bp->link_params.loopback_mode != LOOPBACK_NONE) { + bp->link_params.loopback_mode = LOOPBACK_NONE; + bnx2x_reload = true; + } + } + + if (flags ^ bp->flags) { + bp->flags = flags; + bnx2x_reload = true; + } + + if (bnx2x_reload) { + if (bp->recovery_state == BNX2X_RECOVERY_DONE) + return bnx2x_reload_if_running(dev); + /* else: bnx2x_nic_load() will be called at end of recovery */ + } + + return 0; +} +#endif /*0x020627*/ + +void bnx2x_tx_timeout(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + +#ifdef BNX2X_STOP_ON_ERROR + if (!bp->panic) + bnx2x_panic(); +#endif + + smp_mb__before_clear_bit(); + set_bit(BNX2X_SP_RTNL_TX_TIMEOUT, &bp->sp_rtnl_state); + smp_mb__after_clear_bit(); + + /* This allows the netif to be shutdown gracefully before resetting */ + schedule_delayed_work(&bp->sp_rtnl_task, 0); +} + +int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state) +{ + struct net_device *dev = pci_get_drvdata(pdev); + struct bnx2x *bp; + + if (!dev) { + dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); + return -ENODEV; + } + bp = netdev_priv(dev); + + rtnl_lock(); + +#if (LINUX_VERSION_CODE >= 0x02060b) /* BNX2X_UPSTREAM */ + pci_save_state(pdev); +#else + pci_save_state(pdev, bp->pci_state); +#endif + + if (!netif_running(dev)) { + rtnl_unlock(); + return 0; + } + +#if (LINUX_VERSION_CODE < 0x020618) /* ! BNX2X_UPSTREAM */ + flush_scheduled_work(); +#endif + netif_device_detach(dev); + + bnx2x_nic_unload(bp, UNLOAD_CLOSE); + + bnx2x_set_power_state(bp, pci_choose_state(pdev, state)); + + rtnl_unlock(); + + return 0; +} + +int bnx2x_resume(struct pci_dev *pdev) +{ + struct net_device *dev = pci_get_drvdata(pdev); + struct bnx2x *bp; + int rc; + + if (!dev) { + dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); + return -ENODEV; + } + bp = netdev_priv(dev); + + if (bp->recovery_state != BNX2X_RECOVERY_DONE) { + BNX2X_ERR("Handling parity error recovery. Try again later\n"); + return -EAGAIN; + } + + rtnl_lock(); + +#if (LINUX_VERSION_CODE >= 0x02060b) /* BNX2X_UPSTREAM */ + pci_restore_state(pdev); +#else + pci_restore_state(pdev, bp->pci_state); +#endif + + if (!netif_running(dev)) { + rtnl_unlock(); + return 0; + } + + bnx2x_set_power_state(bp, PCI_D0); + netif_device_attach(dev); + + rc = bnx2x_nic_load(bp, LOAD_OPEN); + + rtnl_unlock(); + + return rc; +} + +#ifdef BCM_VLAN /* ! BNX2X_UPSTREAM */ +static int bnx2x_set_vlan_stripping(struct bnx2x *bp, bool set) +{ + struct bnx2x_queue_state_params q_params = {NULL}; + struct bnx2x_queue_update_params *update_params = + &q_params.params.update; + int i, rc; + + /* We want to wait for completion in this context */ + __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags); + + /* Set the command */ + q_params.cmd = BNX2X_Q_CMD_UPDATE; + + /* Enable VLAN stripping if requested */ + if (set) + __set_bit(BNX2X_Q_UPDATE_IN_VLAN_REM, + &update_params->update_flags); + + /* Indicate that VLAN stripping configuration has changed */ + __set_bit(BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG, + &update_params->update_flags); + + for_each_rx_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + +#ifdef BCM_OOO /* BNX2X_UPSTREAM */ + /* Don't configure VLAN stripping for iSCSI OOO ring */ + if (IS_OOO_IDX(i)) + continue; +#endif + +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + if (IS_FCOE_IDX(i)) + continue; +# endif + /* Set the appropriate Queue object */ + q_params.q_obj = &fp->q_obj; + + /* Update the Queue state */ + rc = bnx2x_queue_state_change(bp, &q_params); + if (rc) { + BNX2X_ERR("Failed to configure VLAN stripping for Queue %d\n", + i); + return rc; + } + } + + return 0; +} + +/* called with rtnl_lock */ +void bnx2x_vlan_rx_register(struct net_device *dev, struct vlan_group *vlgrp) +{ + struct bnx2x *bp = netdev_priv(dev); + int rc = 0; + + /* + * Configure VLAN stripping if NIC is up. + * Otherwise just set the bp->vlgrp and stripping will be + * configured in bnx2x_nic_load(). + */ + if (bp->state == BNX2X_STATE_OPEN) { + bool set = (vlgrp != NULL); + rc = bnx2x_set_vlan_stripping(bp, set); + if (rc) { + netdev_err(dev, "Failed to %s HW VLAN stripping\n", + set ? "set" : "clear"); + if (set) + bnx2x_set_vlan_stripping(bp, false); + } + } + + /* + * If we failed to configure VLAN stripping we don't + * want to use HW accelerated flow in bnx2x_rx_int(). + * Thus we will leave bp->vlgrp to be equal to NULL to + * disable it. + */ + bp->vlgrp = rc ? NULL : vlgrp; +} + +/* called with rtnl_lock */ +#if (LINUX_VERSION_CODE < 0x020616) /* ! BNX2X_UPSTREAM */ +void bnx2x_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (bp->vlgrp) + vlan_group_set_device(bp->vlgrp, vid, NULL); +} +#endif +#endif /* BCM_VLAN */ + +void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt, + u32 cid) +{ + /* ustorm cxt validation */ + cxt->ustorm_ag_context.cdu_usage = + CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid), + CDU_REGION_NUMBER_UCM_AG, ETH_CONNECTION_TYPE); + /* xcontext validation */ + cxt->xstorm_ag_context.cdu_reserved = + CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid), + CDU_REGION_NUMBER_XCM_AG, ETH_CONNECTION_TYPE); +} + +static inline void storm_memset_hc_timeout(struct bnx2x *bp, u8 port, + u8 fw_sb_id, u8 sb_index, + u8 ticks) +{ + + u32 addr = BAR_CSTRORM_INTMEM + + CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(fw_sb_id, sb_index); + REG_WR8(bp, addr, ticks); + DP(NETIF_MSG_IFUP, + "port %x fw_sb_id %d sb_index %d ticks %d\n", + port, fw_sb_id, sb_index, ticks); +} + +static inline void storm_memset_hc_disable(struct bnx2x *bp, u8 port, + u16 fw_sb_id, u8 sb_index, + u8 disable) +{ + u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT); + u32 addr = BAR_CSTRORM_INTMEM + + CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(fw_sb_id, sb_index); + u8 flags = REG_RD8(bp, addr); + /* clear and set */ + flags &= ~HC_INDEX_DATA_HC_ENABLED; + flags |= enable_flag; + REG_WR8(bp, addr, flags); + DP(NETIF_MSG_IFUP, + "port %x fw_sb_id %d sb_index %d disable %d\n", + port, fw_sb_id, sb_index, disable); +} + +void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id, + u8 sb_index, u8 disable, u16 usec) +{ + int port = BP_PORT(bp); + u8 ticks = usec / BNX2X_BTR; + + storm_memset_hc_timeout(bp, port, fw_sb_id, sb_index, ticks); + + disable = disable ? 1 : (usec ? 0 : 1); + storm_memset_hc_disable(bp, port, fw_sb_id, sb_index, disable); +} diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_cmn.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_cmn.h new file mode 100644 index 0000000..ad41044 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_cmn.h @@ -0,0 +1,2180 @@ +/* bnx2x_cmn.h: Broadcom Everest network driver. + * + * Copyright (c) 2007-2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + * + * Maintained by: Eilon Greenstein + * Written by: Eliezer Tamir + * Based on code from Michael Chan's bnx2 driver + * UDP CSUM errata workaround by Arik Gendelman + * Slowpath and fastpath rework by Vladislav Zolotarov + * Statistics and Link management by Yitchak Gertner + * + */ +#ifndef BNX2X_CMN_H +#define BNX2X_CMN_H + +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#include +#endif +#include +#include +#include +#include + + +#include "bnx2x.h" + +/* This is used as a replacement for an MCP if it's not present */ +extern int load_count[2][3]; /* per-path: 0-common, 1-port0, 2-port1 */ + +extern uint num_queues; +extern uint int_mode; + +/************************ Macros ********************************/ +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ +#define BNX2X_PCI_FREE(x, y, size) \ + do { \ + if (x) { \ + dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \ + x = NULL; \ + y = 0; \ + } \ + } while (0) +#else +#define BNX2X_PCI_FREE(x, y, size) \ + do { \ + if (x) { \ + pci_free_consistent(bp->pdev, size, (void*)x, y); \ + x = NULL; \ + y = 0; \ + } \ + } while (0) +#endif + +#define BNX2X_FREE(x) \ + do { \ + if (x) { \ + kfree((void *)x); \ + x = NULL; \ + } \ + } while (0) + +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ +#define BNX2X_PCI_ALLOC(x, y, size) \ + do { \ + x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ + if (x == NULL) \ + goto alloc_mem_err; \ + memset((void *)x, 0, size); \ + } while (0) +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ +#define BNX2X_PCI_FALLOC(x, y, size) \ + do { \ + x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ + if (x == NULL) \ + goto alloc_mem_err; \ + memset((void *)x, 0xFFFFFFFF, size); \ + } while (0) +#endif /* CHAR_DEV */ +#else +#define BNX2X_PCI_ALLOC(x, y, size) \ + do { \ + x = pci_alloc_consistent(bp->pdev, size, y); \ + if (x == NULL) \ + goto alloc_mem_err; \ + memset((void *)x, 0, size); \ + } while (0) +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ +#define BNX2X_PCI_FALLOC(x, y, size) \ + do { \ + x = pci_alloc_consistent(bp->pdev, size, y); \ + if (x == NULL) \ + goto alloc_mem_err; \ + memset((void *)x, 0xFFFFFFFF, size); \ + } while (0) +#endif /* CHAR_DEV */ +#endif + +#define BNX2X_ALLOC(x, size) \ + do { \ + x = kzalloc(size, GFP_KERNEL); \ + if (x == NULL) \ + goto alloc_mem_err; \ + } while (0) + +/*********************** Interfaces **************************** + * Functions that need to be implemented by each driver version + */ +/* Init */ + +/** + * bnx2x_send_unload_req - request unload mode from the MCP. + * + * @bp: driver handle + * @unload_mode: requested function's unload mode + * + * Return unload mode returned by the MCP: COMMON, PORT or FUNC. + */ +u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode); + +/** + * bnx2x_send_unload_done - send UNLOAD_DONE command to the MCP. + * + * @bp: driver handle + */ +void bnx2x_send_unload_done(struct bnx2x *bp); + +/** + * bnx2x_config_rss_pf - configure RSS parameters in a PF. + * + * @bp: driver handle + * @rss_obj RSS object to use + * @ind_table: indirection table to configure + * @config_hash: re-configure RSS hash keys configuration + */ +int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj, + u8 *ind_table, bool config_hash); + +/** + * bnx2x__init_func_obj - init function object + * + * @bp: driver handle + * + * Initializes the Function Object with the appropriate + * parameters which include a function slow path driver + * interface. + */ +void bnx2x__init_func_obj(struct bnx2x *bp); + +/** + * bnx2x_setup_queue - setup eth queue. + * + * @bp: driver handle + * @fp: pointer to the fastpath structure + * @leading: boolean + * + */ +int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp, + bool leading); + +/** + * bnx2x_init_eth_fp - Initialize SB and internals of ETH queue driver handle + * + * @bp function driver handle + * @fp_idx queue index + */ +void bnx2x_init_eth_fp(struct bnx2x *bp, int fp_idx); + +/** + * bnx2x_stop_queue - stop an eth queue + * + * @bp driver handle + * @index index of the queue + * + */ +int bnx2x_stop_queue(struct bnx2x *bp, int index); + +/** + * bnx2x_setup_leading - bring up a leading eth queue. + * + * @bp: driver handle + */ +int bnx2x_setup_leading(struct bnx2x *bp); + +/** + * bnx2x_fw_command - send the MCP a request + * + * @bp: driver handle + * @command: request + * @param: request's parameter + * + * block until there is a reply + */ +u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); + +/** + * bnx2x_initial_phy_init - initialize link parameters structure variables. + * + * @bp: driver handle + * @load_mode: current mode + */ +u8 bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode); + +/** + * bnx2x_link_set - configure hw according to link parameters structure. + * + * @bp: driver handle + */ +void bnx2x_link_set(struct bnx2x *bp); + +/** + * bnx2x_link_test - query link status. + * + * @bp: driver handle + * @is_serdes: bool + * + * Returns 0 if link is UP. + */ +u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes); + +/** + * bnx2x_drv_pulse - write driver pulse to shmem + * + * @bp: driver handle + * + * writes the value in bp->fw_drv_pulse_wr_seq to drv_pulse mbox + * in the shmem. + */ +void bnx2x_drv_pulse(struct bnx2x *bp); + +/** + * bnx2x_igu_ack_sb - update IGU with current SB value + * + * @bp: driver handle + * @igu_sb_id: SB id + * @segment: SB segment + * @index: SB index + * @op: SB operation + * @update: is HW update required + */ +void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, + u16 index, u8 op, u8 update); + +/* Disable transactions from chip to host */ +void bnx2x_pf_disable(struct bnx2x *bp); + +/** + * bnx2x__link_status_update - handles link status change. + * + * @bp: driver handle + */ +void bnx2x__link_status_update(struct bnx2x *bp); + +/** + * bnx2x_req_irq - request single ISR irq (MSI or INT#x). + * + * @bp: driver handle + * + */ +int bnx2x_req_irq(struct bnx2x *bp); + +#if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) +irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie, + struct pt_regs *regs); +#else /* BNX2X_UPSTREAM */ +/** + * bnx2x_msix_fp_int - FP and SP MSI-X ISR. + * + * @irq: irq id + * @fp_cookie: private cookie + * + */ +irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie); +#endif + +/** + * bnx2x_link_report - report link status to upper layer. + * + * @bp: driver handle + */ +void bnx2x_link_report(struct bnx2x *bp); + +/* None-atomic version of bnx2x_link_report() */ +void __bnx2x_link_report(struct bnx2x *bp); + +/** + * bnx2x_get_mf_speed - calculate MF speed. + * + * @bp: driver handle + * + * Takes into account current linespeed and MF configuration. + */ +u16 bnx2x_get_mf_speed(struct bnx2x *bp); + +#if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) +irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance, + struct pt_regs *regs); +irqreturn_t bnx2x_interrupt(int irq, void *dev_instance, + struct pt_regs *regs); +#else /* BNX2X_UPSTREAM */ +/** + * bnx2x_msix_sp_int - MSI-X slowpath interrupt handler + * + * @irq: irq number + * @dev_instance: private instance + */ +irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance); + +/** + * bnx2x_interrupt - non MSI-X interrupt handler + * + * @irq: irq number + * @dev_instance: private instance + */ +irqreturn_t bnx2x_interrupt(int irq, void *dev_instance); +#endif +#ifdef BCM_CNIC + +/** + * bnx2x_cnic_notify - send command to cnic driver + * + * @bp: driver handle + * @cmd: command + */ +int bnx2x_cnic_notify(struct bnx2x *bp, int cmd); + +/** + * bnx2x_setup_cnic_irq_info - provides cnic with IRQ information + * + * @bp: driver handle + */ +void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); +#endif + +/** + * bnx2x_setup_cnic_info - provides cnic with updated info + * + * @bp: driver handle + */ +void bnx2x_setup_cnic_info(struct bnx2x *bp); + +/** + * bnx2x_int_enable - enable HW interrupts. + * + * @bp: driver handle + */ +void bnx2x_int_enable(struct bnx2x *bp); + +/** + * bnx2x_int_disable - disable HW interrupts. + * + * @bp: driver handle + */ +void bnx2x_int_disable(struct bnx2x *bp); + +/** + * bnx2x_int_disable_sync - disable interrupts. + * + * @bp: driver handle + * @disable_hw: true, disable HW interrupts. + * + * This function ensures that there are no + * ISRs or SP DPCs (sp_task) are running after it returns. + */ +void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw); + +/** + * bnx2x_nic_init - init driver internals. + * + * @bp: driver handle + * @load_code: COMMON, PORT or FUNCTION + * + * Initializes: + * - rings + * - status blocks + * - etc. + */ +void bnx2x_nic_init(struct bnx2x *bp, u32 load_code); + +/** + * bnx2x_alloc_mem - allocate driver's memory. + * + * @bp: driver handle + */ +int bnx2x_alloc_mem(struct bnx2x *bp); + +/** + * bnx2x_free_mem - release driver's memory. + * + * @bp: driver handle + */ +void bnx2x_free_mem(struct bnx2x *bp); + +/** + * bnx2x_set_num_queues - set number of queues according to mode. + * + * @bp: driver handle + */ +void bnx2x_set_num_queues(struct bnx2x *bp); + +/** + * bnx2x_chip_cleanup - cleanup chip internals. + * + * @bp: driver handle + * @unload_mode: COMMON, PORT, FUNCTION + * + * - Cleanup MAC configuration. + * - Closes clients. + * - etc. + */ +void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode); + +/** + * bnx2x_acquire_hw_lock - acquire HW lock. + * + * @bp: driver handle + * @resource: resource bit which was locked + */ +int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource); + +/** + * bnx2x_release_hw_lock - release HW lock. + * + * @bp: driver handle + * @resource: resource bit which was locked + */ +int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); + +/** + * bnx2x_release_leader_lock - release recovery leader lock + * + * @bp: driver handle + */ +int bnx2x_release_leader_lock(struct bnx2x *bp); + +/** + * bnx2x_set_eth_mac - configure eth MAC address in the HW + * + * @bp: driver handle + * @set: set or clear + * + * Configures according to the value in netdev->dev_addr. + */ +int bnx2x_set_eth_mac(struct bnx2x *bp, bool set); + +/** + * bnx2x_set_rx_mode - set MAC filtering configurations. + * + * @dev: netdevice + * + * called with netif_tx_lock from dev_mcast.c + * If bp->state is OPEN, should be called with + * netif_addr_lock_bh() + */ +void bnx2x_set_rx_mode(struct net_device *dev); + +/** + * bnx2x_set_storm_rx_mode - configure MAC filtering rules in a FW. + * + * @bp: driver handle + * + * If bp->state is OPEN, should be called with + * netif_addr_lock_bh(). + */ +void bnx2x_set_storm_rx_mode(struct bnx2x *bp); + +/** + * bnx2x_fill_accept_flags - fill the ACCEPT flags according to the Rx mode + * + * @bp driver handle + * @rx_mode requested Rx mode + * @rx_accept_flags pointer to the Rx accept flags + * @tx_accept_flags pointer to the Tx accept flags + * + */ +int bnx2x_fill_accept_flags(struct bnx2x *bp, u32 rx_mode, + unsigned long *rx_accept_flags, + unsigned long *tx_accept_flags); + +/** + * bnx2x_set_q_rx_mode - configures rx_mode for a single queue. + * + * @bp: driver handle + * @cl_id: client id + * @rx_mode_flags: rx mode configuration + * @rx_accept_flags: rx accept configuration + * @tx_accept_flags: tx accept configuration (tx switch) + * @ramrod_flags: ramrod configuration + */ +int bnx2x_set_q_rx_mode(struct bnx2x *bp, u8 cl_id, + unsigned long rx_mode_flags, + unsigned long rx_accept_flags, + unsigned long tx_accept_flags, + unsigned long ramrod_flags); + +/* Parity errors related */ +void bnx2x_set_pf_load(struct bnx2x *bp); +bool bnx2x_clear_pf_load(struct bnx2x *bp); +bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print); +bool bnx2x_reset_is_done(struct bnx2x *bp, int engine); +void bnx2x_set_reset_in_progress(struct bnx2x *bp); +void bnx2x_set_reset_global(struct bnx2x *bp); +void bnx2x_disable_close_the_gate(struct bnx2x *bp); + +/** + * bnx2x_sp_event - handle ramrods completion. + * + * @fp: fastpath handle for the event + * @rr_cqe: eth_rx_cqe + */ +void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); + +/** + * bnx2x_ilt_set_info - prepare ILT configurations. + * + * @bp: driver handle + */ +void bnx2x_ilt_set_info(struct bnx2x *bp); + +/** + * bnx2x_dcbx_init - initialize dcbx protocol. + * + * @bp: driver handle + */ +void bnx2x_dcbx_init(struct bnx2x *bp); + +/** + * bnx2x_set_power_state - set power state to the requested value. + * + * @bp: driver handle + * @state: required state D0 or D3hot + * + * Currently only D0 and D3hot are supported. + */ +int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state); + +/** + * bnx2x_update_max_mf_config - update MAX part of MF configuration in HW. + * + * @bp: driver handle + * @value: new value + */ +void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value); +/* Error handling */ +void bnx2x_panic_dump(struct bnx2x *bp); + +void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl); + +/* validate currect fw is loaded */ +bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err); + +/* dev_close main block */ +int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode); + +/* dev_open main block */ +int bnx2x_nic_load(struct bnx2x *bp, int load_mode); + +#if !defined(BNX2X_NEW_NAPI) && defined(USE_NAPI_GRO) /* ! BNX2X_UPSTREAM */ +int __bnx2x_poll(struct napi_struct *napi, int budget); +#endif +/* hard_xmit callback */ +netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev); + +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ +/* setup_tc callback */ +int bnx2x_setup_tc(struct net_device *dev, u8 num_tc); +#endif + +#if (defined(BCM_CNIC) && defined(BNX2X_MULTI_QUEUE)) /* BNX2X_UPSTREAM */ +/* select_queue callback */ +u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb); +#endif + +/* reload helper */ +int bnx2x_reload_if_running(struct net_device *dev); + +int bnx2x_change_mac_addr(struct net_device *dev, void *p); + +/* NAPI poll Rx part */ +int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget); + +void bnx2x_update_rx_prod(struct bnx2x *bp, struct bnx2x_fastpath *fp, + u16 bd_prod, u16 rx_comp_prod, u16 rx_sge_prod); + +/* NAPI poll Tx part */ +int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata); + +/* suspend/resume callbacks */ +int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state); +int bnx2x_resume(struct pci_dev *pdev); + +/* Release IRQ vectors */ +void bnx2x_free_irq(struct bnx2x *bp); + +void bnx2x_free_fp_mem(struct bnx2x *bp); +int bnx2x_alloc_fp_mem(struct bnx2x *bp); +void bnx2x_init_rx_rings(struct bnx2x *bp); +void bnx2x_free_skbs(struct bnx2x *bp); +void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw); +void bnx2x_netif_start(struct bnx2x *bp); + +/** + * bnx2x_enable_msix - set msix configuration. + * + * @bp: driver handle + * + * fills msix_table, requests vectors, updates num_queues + * according to number of available vectors. + */ +int bnx2x_enable_msix(struct bnx2x *bp); + +/** + * bnx2x_enable_msi - request msi mode from OS, updated internals accordingly + * + * @bp: driver handle + */ +int bnx2x_enable_msi(struct bnx2x *bp); + +#if defined(BNX2X_NEW_NAPI) /* BNX2X_UPSTREAM */ +/** + * bnx2x_poll - NAPI callback + * + * @napi: napi structure + * @budget: + * + */ +int bnx2x_poll(struct napi_struct *napi, int budget); +#else +int bnx2x_poll(struct net_device *dev, int *budget); +#endif + +/** + * bnx2x_alloc_mem_bp - allocate memories outsize main driver structure + * + * @bp: driver handle + */ +int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp); + +/** + * bnx2x_free_mem_bp - release memories outsize main driver structure + * + * @bp: driver handle + */ +void bnx2x_free_mem_bp(struct bnx2x *bp); + +/** + * bnx2x_change_mtu - change mtu netdev callback + * + * @dev: net device + * @new_mtu: requested mtu + * + */ +int bnx2x_change_mtu(struct net_device *dev, int new_mtu); + +#if defined(NETDEV_FCOE_WWNN) && defined(BCM_CNIC) +/** + * bnx2x_fcoe_get_wwn - return the requested WWN value for this port + * + * @dev: net_device + * @wwn: output buffer + * @type: WWN type: NETDEV_FCOE_WWNN (node) or NETDEV_FCOE_WWPN (port) + * + */ +int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type); +#endif + +#if (LINUX_VERSION_CODE >= 0x020627) /* BNX2X_UPSTREAM */ +netdev_features_t bnx2x_fix_features(struct net_device *dev, + netdev_features_t features); +int bnx2x_set_features(struct net_device *dev, netdev_features_t features); +#endif + +/** + * bnx2x_tx_timeout - tx timeout netdev callback + * + * @dev: net device + */ +void bnx2x_tx_timeout(struct net_device *dev); +#ifdef BCM_VLAN /* ! BNX2X_UPSTREAM */ +/* called with rtnl_lock */ +void bnx2x_vlan_rx_register(struct net_device *dev, + struct vlan_group *vlgrp); + +#if (LINUX_VERSION_CODE < 0x020616) +void bnx2x_vlan_rx_kill_vid(struct net_device *dev, u16 vid); +#endif +#endif + +/*********************** Inlines **********************************/ +/*********************** Fast path ********************************/ +static inline void bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp) +{ + barrier(); /* status block is written to by the chip */ + fp->fp_hc_idx = fp->sb_running_index[SM_RX_ID]; +} + +static inline void bnx2x_update_rx_prod_gen(struct bnx2x *bp, + struct bnx2x_fastpath *fp, u16 bd_prod, + u16 rx_comp_prod, u16 rx_sge_prod, u32 start) +{ + struct ustorm_eth_rx_producers rx_prods = {0}; + u32 i; + + /* Update producers */ + rx_prods.bd_prod = bd_prod; + rx_prods.cqe_prod = rx_comp_prod; + rx_prods.sge_prod = rx_sge_prod; + + /* + * Make sure that the BD and SGE data is updated before updating the + * producers since FW might read the BD/SGE right after the producer + * is updated. + * This is only applicable for weak-ordered memory model archs such + * as IA-64. The following barrier is also mandatory since FW will + * assumes BDs must have buffers. + */ + wmb(); + + for (i = 0; i < sizeof(rx_prods)/4; i++) + REG_WR(bp, start + i*4, ((u32 *)&rx_prods)[i]); + + mmiowb(); /* keep prod updates ordered */ + + DP(NETIF_MSG_RX_STATUS, + "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", + fp->index, bd_prod, rx_comp_prod, rx_sge_prod); +} + +static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id, + u8 segment, u16 index, u8 op, + u8 update, u32 igu_addr) +{ + struct igu_regular cmd_data = {0}; + + cmd_data.sb_id_and_flags = + ((index << IGU_REGULAR_SB_INDEX_SHIFT) | + (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | + (update << IGU_REGULAR_BUPDATE_SHIFT) | + (op << IGU_REGULAR_ENABLE_INT_SHIFT)); + + DP(NETIF_MSG_INTR, "write 0x%08x to IGU addr 0x%x\n", + cmd_data.sb_id_and_flags, igu_addr); + REG_WR(bp, igu_addr, cmd_data.sb_id_and_flags); + + /* Make sure that ACK is written */ + mmiowb(); + barrier(); +} + +static inline void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, + u8 idu_sb_id, bool is_Pf) +{ + u32 data, ctl, cnt = 100; + u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA; + u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL; + u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4; + u32 sb_bit = 1 << (idu_sb_id%32); + u32 func_encode = func | (is_Pf ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT; + u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id; + + /* Not supported in BC mode */ + if (CHIP_INT_MODE_IS_BC(bp)) + return; + + data = (IGU_USE_REGISTER_cstorm_type_0_sb_cleanup + << IGU_REGULAR_CLEANUP_TYPE_SHIFT) | + IGU_REGULAR_CLEANUP_SET | + IGU_REGULAR_BCLEANUP; + + ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT | + func_encode << IGU_CTRL_REG_FID_SHIFT | + IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT; + + DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", + data, igu_addr_data); + REG_WR(bp, igu_addr_data, data); + mmiowb(); + barrier(); + DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", + ctl, igu_addr_ctl); + REG_WR(bp, igu_addr_ctl, ctl); + mmiowb(); + barrier(); + + /* wait for clean up to finish */ + while (!(REG_RD(bp, igu_addr_ack) & sb_bit) && --cnt) + msleep(20); + + + if (!(REG_RD(bp, igu_addr_ack) & sb_bit)) { + DP(NETIF_MSG_HW, + "Unable to finish IGU cleanup: idu_sb_id %d offset %d bit %d (cnt %d)\n", + idu_sb_id, idu_sb_id/32, idu_sb_id%32, cnt); + } +} + +static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id, + u8 storm, u16 index, u8 op, u8 update) +{ + u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + + COMMAND_REG_INT_ACK); + struct igu_ack_register igu_ack; + + igu_ack.status_block_index = index; + igu_ack.sb_id_and_flags = + ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | + (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | + (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | + (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); + +#if (LINUX_VERSION_CODE < 0x020600) /* ! BNX2X_UPSTREAM */ + /* x86's writel() in 2.4.x does not have barrier(). */ + barrier(); +#endif + REG_WR(bp, hc_addr, (*(u32 *)&igu_ack)); + + /* Make sure that ACK is written */ + mmiowb(); + barrier(); +} + +static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 storm, + u16 index, u8 op, u8 update) +{ + if (bp->common.int_block == INT_BLOCK_HC) + bnx2x_hc_ack_sb(bp, igu_sb_id, storm, index, op, update); + else { + u8 segment; + + if (CHIP_INT_MODE_IS_BC(bp)) + segment = storm; + else if (igu_sb_id != bp->igu_dsb_id) + segment = IGU_SEG_ACCESS_DEF; + else if (storm == ATTENTION_ID) + segment = IGU_SEG_ACCESS_ATTN; + else + segment = IGU_SEG_ACCESS_DEF; + bnx2x_igu_ack_sb(bp, igu_sb_id, segment, index, op, update); + } +} + +static inline u16 bnx2x_hc_ack_int(struct bnx2x *bp) +{ + u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + + COMMAND_REG_SIMD_MASK); + u32 result = REG_RD(bp, hc_addr); + + barrier(); + return result; +} + +static inline u16 bnx2x_igu_ack_int(struct bnx2x *bp) +{ + u32 igu_addr = (BAR_IGU_INTMEM + IGU_REG_SISR_MDPC_WMASK_LSB_UPPER*8); + u32 result = REG_RD(bp, igu_addr); + + DP(NETIF_MSG_INTR, "read 0x%08x from IGU addr 0x%x\n", + result, igu_addr); + + barrier(); + return result; +} + +static inline u16 bnx2x_ack_int(struct bnx2x *bp) +{ + barrier(); + if (bp->common.int_block == INT_BLOCK_HC) + return bnx2x_hc_ack_int(bp); + else + return bnx2x_igu_ack_int(bp); +} + +static inline int bnx2x_has_tx_work_unload(struct bnx2x_fp_txdata *txdata) +{ + /* Tell compiler that consumer and producer can change */ + barrier(); + return txdata->tx_pkt_prod != txdata->tx_pkt_cons; +} + +static inline u16 bnx2x_tx_avail(struct bnx2x *bp, + struct bnx2x_fp_txdata *txdata) +{ + s16 used; + u16 prod; + u16 cons; + + prod = txdata->tx_bd_prod; + cons = txdata->tx_bd_cons; + + used = SUB_S16(prod, cons); + +#ifdef BNX2X_STOP_ON_ERROR + WARN_ON(used < 0); + WARN_ON(used > txdata->tx_ring_size); + WARN_ON((txdata->tx_ring_size - used) > MAX_TX_AVAIL); +#endif + + return (s16)(txdata->tx_ring_size) - used; +} + +static inline int bnx2x_tx_queue_has_work(struct bnx2x_fp_txdata *txdata) +{ + u16 hw_cons; + + /* Tell compiler that status block fields can change */ + barrier(); + hw_cons = le16_to_cpu(*txdata->tx_cons_sb); + return hw_cons != txdata->tx_pkt_cons; +} + +static inline bool bnx2x_has_tx_work(struct bnx2x_fastpath *fp) +{ + u8 cos; + for_each_cos_in_tx_queue(fp, cos) + if (bnx2x_tx_queue_has_work(fp->txdata_ptr[cos])) + return true; + return false; +} + +static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp) +{ + u16 rx_cons_sb; + + /* Tell compiler that status block fields can change */ + barrier(); + rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb); + if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT) + rx_cons_sb++; + return (fp->rx_comp_cons != rx_cons_sb); +} + +/** + * bnx2x_tx_disable - disables tx from stack point of view + * + * @bp: driver handle + */ +static inline void bnx2x_tx_disable(struct bnx2x *bp) +{ + netif_tx_disable(bp->dev); + netif_carrier_off(bp->dev); +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + if (bp->flags & CNA_ENABLED) { + netif_tx_disable(bp->cnadev); + netif_carrier_off(bp->cnadev); + } +#endif +} + +static inline void bnx2x_free_rx_sge(struct bnx2x *bp, + struct bnx2x_fastpath *fp, u16 index) +{ + struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; + struct page *page = sw_buf->page; + struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; + + /* Skip "next page" elements */ + if (!page) + return; + +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping), + SGE_PAGES, DMA_FROM_DEVICE); +#else + pci_unmap_page(bp->pdev, pci_unmap_addr(sw_buf, mapping), + SGE_PAGES, PCI_DMA_FROMDEVICE); +#endif + __free_pages(page, PAGES_PER_SGE_SHIFT); + + sw_buf->page = NULL; + sge->addr_hi = 0; + sge->addr_lo = 0; +} + +static inline void bnx2x_add_all_napi(struct bnx2x *bp) +{ + int i; + + /* Add NAPI objects */ + for_each_rx_queue(bp, i) +#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ +#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ +#if (VMWARE_ESX_DDK_VERSION >= 50000) + if (!bnx2x_fp(bp, i, napi).net_poll) +#else + if (!bnx2x_fp(bp, i, napi).worldlet) +#endif +#ifdef BNX2X_ESX_CNA + if (!IS_FCOE_IDX(i)) +#endif +#endif /* __VMKLNX__ */ + netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), + bnx2x_poll, BNX2X_NAPI_WEIGHT); +#else /* non BNX2X_UPSTREAM */ + { + /* initialize net_device for each rx queue */ + struct net_device *dummy_netdev = &bnx2x_fp(bp, i, dummy_netdev); +#if defined(USE_NAPI_GRO) + struct napi_struct *napi = &bnx2x_fp(bp, i, napi); + napi->dev = bp->dev; +#endif + dummy_netdev->priv = &bp->fp[i]; + dummy_netdev->poll = bnx2x_poll; + dummy_netdev->weight = BNX2X_NAPI_WEIGHT; + set_bit(__LINK_STATE_START, &dummy_netdev->state); + } +#endif +} + +static inline void bnx2x_del_all_napi(struct bnx2x *bp) +{ +#if defined(BNX2X_NEW_NAPI) && (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + int i; + + for_each_init_rx_queue(bp, i) + netif_napi_del(&bnx2x_fp(bp, i, napi)); +#endif +} + +void bnx2x_set_int_mode(struct bnx2x *bp); + +static inline void bnx2x_disable_msi(struct bnx2x *bp) +{ + if (bp->flags & USING_MSIX_FLAG) { + pci_disable_msix(bp->pdev); + bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG); + } else if (bp->flags & USING_MSI_FLAG) { + pci_disable_msi(bp->pdev); + bp->flags &= ~USING_MSI_FLAG; + } +} + +static inline uint bnx2x_calc_num_queues(struct bnx2x *bp) +{ + uint num = min_t(uint, num_online_cpus(), BNX2X_DEFAULT_NUM_QUEUES); + + return num_queues ? + min_t(uint, num_queues, BNX2X_MAX_QUEUES(bp)) : + min_t(uint, num, BNX2X_MAX_QUEUES(bp)); +} + +static inline void bnx2x_clear_sge_mask_next_elems(struct bnx2x_fastpath *fp) +{ + int i, j; + + for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { + int idx = RX_SGE_CNT * i - 1; + + for (j = 0; j < 2; j++) { + BIT_VEC64_CLEAR_BIT(fp->sge_mask, idx); + idx--; + } + } +} + +static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp) +{ + /* Set the mask to all 1-s: it's faster to compare to 0 than to 0xf-s */ + memset(fp->sge_mask, 0xff, sizeof(fp->sge_mask)); + + /* Clear the two last indices in the page to 1: + these are the indices that correspond to the "next" element, + hence will never be indicated and should be removed from + the calculations. */ + bnx2x_clear_sge_mask_next_elems(fp); +} + +static inline int bnx2x_alloc_rx_sge(struct bnx2x *bp, + struct bnx2x_fastpath *fp, u16 index) +{ + struct page *page = alloc_pages(GFP_ATOMIC, PAGES_PER_SGE_SHIFT); + struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; + struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; + dma_addr_t mapping; + + if (unlikely(page == NULL)) { + BNX2X_ERR("Can't alloc sge\n"); + return -ENOMEM; + } + +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + mapping = dma_map_page(&bp->pdev->dev, page, 0, + SGE_PAGES, DMA_FROM_DEVICE); +#else + mapping = pci_map_page(bp->pdev, page, 0, + SGE_PAGES, PCI_DMA_FROMDEVICE); +#endif +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { +#else + if (unlikely(dma_mapping_error(mapping))) { +#endif + __free_pages(page, PAGES_PER_SGE_SHIFT); + BNX2X_ERR("Can't map sge\n"); + return -ENOMEM; + } + + sw_buf->page = page; +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_addr_set(sw_buf, mapping, mapping); +#else + pci_unmap_addr_set(sw_buf, mapping, mapping); +#endif + + sge->addr_hi = cpu_to_le32(U64_HI(mapping)); + sge->addr_lo = cpu_to_le32(U64_LO(mapping)); + + return 0; +} + +static inline int bnx2x_alloc_rx_data(struct bnx2x *bp, + struct bnx2x_fastpath *fp, u16 index) +{ +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + u8 *data; +#else + struct sk_buff *data; +#endif + struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[index]; + struct eth_rx_bd *rx_bd = &fp->rx_desc_ring[index]; + dma_addr_t mapping; + +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + data = kmalloc(fp->rx_buf_size + NET_SKB_PAD, GFP_ATOMIC); +#else + data = netdev_alloc_skb(bp->dev, fp->rx_buf_size); +#endif + if (unlikely(data == NULL)) + return -ENOMEM; + +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + mapping = dma_map_single(&bp->pdev->dev, data + NET_SKB_PAD, + fp->rx_buf_size, + DMA_FROM_DEVICE); +#else + mapping = dma_map_single(&bp->pdev->dev, data->data, fp->rx_buf_size, + DMA_FROM_DEVICE); +#endif +#else /* < 0x020622*/ + mapping = pci_map_single(bp->pdev, data->data, fp->rx_buf_size, + PCI_DMA_FROMDEVICE); +#endif +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { +#else + if (unlikely(dma_mapping_error(mapping))) { +#endif +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + kfree(data); +#else + dev_kfree_skb_any(data); +#endif + BNX2X_ERR("Can't map rx data\n"); + return -ENOMEM; + } + + rx_buf->data = data; +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_addr_set(rx_buf, mapping, mapping); +#else + pci_unmap_addr_set(rx_buf, mapping, mapping); +#endif + + rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); + rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); + + return 0; +} + +/* note that we are not allocating a new buffer, + * we are just moving one from cons to prod + * we are not creating a new mapping, + * so there is no need to check for dma_mapping_error(). + */ +static inline void bnx2x_reuse_rx_data(struct bnx2x_fastpath *fp, + u16 cons, u16 prod) +{ + struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; + struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; + struct eth_rx_bd *cons_bd = &fp->rx_desc_ring[cons]; + struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; + +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_addr_set(prod_rx_buf, mapping, + dma_unmap_addr(cons_rx_buf, mapping)); +#else + pci_unmap_addr_set(prod_rx_buf, mapping, + pci_unmap_addr(cons_rx_buf, mapping)); +#endif + prod_rx_buf->data = cons_rx_buf->data; + *prod_bd = *cons_bd; +} + +/************************* Init ******************************************/ + +/* returns func by VN for current port */ +static inline int func_by_vn(struct bnx2x *bp, int vn) +{ + return 2 * vn + BP_PORT(bp); +} + +static inline int bnx2x_config_rss_eth(struct bnx2x *bp, u8 *ind_table, + bool config_hash) +{ + return bnx2x_config_rss_pf(bp, &bp->rss_conf_obj, ind_table, + config_hash); +} + +/** + * bnx2x_func_start - init function + * + * @bp: driver handle + * + * Must be called before sending CLIENT_SETUP for the first client. + */ +static inline int bnx2x_func_start(struct bnx2x *bp) +{ + struct bnx2x_func_state_params func_params = {NULL}; + struct bnx2x_func_start_params *start_params = + &func_params.params.start; + + /* Prepare parameters for function state transitions */ + __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); + + func_params.f_obj = &bp->func_obj; + func_params.cmd = BNX2X_F_CMD_START; + + /* Function parameters */ + start_params->mf_mode = bp->mf_mode; + start_params->sd_vlan_tag = bp->mf_ov; + +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + if (CHIP_IS_E2(bp) || CHIP_IS_E3(bp)) + start_params->network_cos_mode = STATIC_COS; + else /* CHIP_IS_E1X */ + start_params->network_cos_mode = FW_WRR; +#else + start_params->network_cos_mode = OVERRIDE_COS; +#endif + + return bnx2x_func_state_change(bp, &func_params); +} + +/** + * bnx2x_set_fw_mac_addr - fill in a MAC address in FW format + * + * @fw_hi: pointer to upper part + * @fw_mid: pointer to middle part + * @fw_lo: pointer to lower part + * @mac: pointer to MAC address + */ +static inline void bnx2x_set_fw_mac_addr(__le16 *fw_hi, __le16 *fw_mid, + __le16 *fw_lo, u8 *mac) +{ + ((u8 *)fw_hi)[0] = mac[1]; + ((u8 *)fw_hi)[1] = mac[0]; + ((u8 *)fw_mid)[0] = mac[3]; + ((u8 *)fw_mid)[1] = mac[2]; + ((u8 *)fw_lo)[0] = mac[5]; + ((u8 *)fw_lo)[1] = mac[4]; +} + +static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp, + struct bnx2x_fastpath *fp, int last) +{ + int i; + + if (fp->disable_tpa) + return; + + for (i = 0; i < last; i++) + bnx2x_free_rx_sge(bp, fp, i); +} + +static inline void bnx2x_free_tpa_pool(struct bnx2x *bp, + struct bnx2x_fastpath *fp, int last) +{ + int i; + + for (i = 0; i < last; i++) { + struct bnx2x_agg_info *tpa_info = &fp->tpa_info[i]; + struct sw_rx_bd *first_buf = &tpa_info->first_buf; +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + u8 *data = first_buf->data; +#else + struct sk_buff *data = first_buf->data; +#endif + + if (data == NULL) { + DP(NETIF_MSG_IFDOWN, "tpa bin %d empty on free\n", i); + continue; + } + if (tpa_info->tpa_state == BNX2X_TPA_START) +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_single(&bp->pdev->dev, + dma_unmap_addr(first_buf, mapping), + fp->rx_buf_size, DMA_FROM_DEVICE); +#else + pci_unmap_single(bp->pdev, + pci_unmap_addr(first_buf, mapping), + fp->rx_buf_size, PCI_DMA_FROMDEVICE); +#endif +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + kfree(data); +#else + dev_kfree_skb(data); +#endif + first_buf->data = NULL; + } +} + +static inline void bnx2x_init_tx_ring_one(struct bnx2x_fp_txdata *txdata) +{ + int i; + + for (i = 1; i <= NUM_TX_RINGS; i++) { + struct eth_tx_next_bd *tx_next_bd = + &txdata->tx_desc_ring[TX_DESC_CNT * i - 1].next_bd; + + tx_next_bd->addr_hi = + cpu_to_le32(U64_HI(txdata->tx_desc_mapping + + BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); + tx_next_bd->addr_lo = + cpu_to_le32(U64_LO(txdata->tx_desc_mapping + + BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); + } + + SET_FLAG(txdata->tx_db.data.header.header, DOORBELL_HDR_DB_TYPE, 1); + txdata->tx_db.data.zero_fill1 = 0; + txdata->tx_db.data.prod = 0; + + txdata->tx_pkt_prod = 0; + txdata->tx_pkt_cons = 0; + txdata->tx_bd_prod = 0; + txdata->tx_bd_cons = 0; + txdata->tx_pkt = 0; +} + +static inline void bnx2x_init_tx_rings(struct bnx2x *bp) +{ + int i; + u8 cos; + + for_each_tx_queue(bp, i) + for_each_cos_in_tx_queue(&bp->fp[i], cos) + bnx2x_init_tx_ring_one(bp->fp[i].txdata_ptr[cos]); +} + +static inline void bnx2x_set_next_page_rx_bd(struct bnx2x_fastpath *fp) +{ + int i; + + for (i = 1; i <= NUM_RX_RINGS; i++) { + struct eth_rx_bd *rx_bd; + + rx_bd = &fp->rx_desc_ring[RX_DESC_CNT * i - 2]; + rx_bd->addr_hi = + cpu_to_le32(U64_HI(fp->rx_desc_mapping + + BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); + rx_bd->addr_lo = + cpu_to_le32(U64_LO(fp->rx_desc_mapping + + BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); + } +} + +static inline void bnx2x_set_next_page_sgl(struct bnx2x_fastpath *fp) +{ + int i; + + for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { + struct eth_rx_sge *sge; + + sge = &fp->rx_sge_ring[RX_SGE_CNT * i - 2]; + sge->addr_hi = + cpu_to_le32(U64_HI(fp->rx_sge_mapping + + BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES))); + + sge->addr_lo = + cpu_to_le32(U64_LO(fp->rx_sge_mapping + + BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES))); + } +} + +static inline void bnx2x_set_next_page_rx_cq(struct bnx2x_fastpath *fp) +{ + int i; + for (i = 1; i <= NUM_RCQ_RINGS; i++) { + struct eth_rx_cqe_next_page *nextpg; + + nextpg = (struct eth_rx_cqe_next_page *) + &fp->rx_comp_ring[RCQ_DESC_CNT * i - 1]; + nextpg->addr_hi = + cpu_to_le32(U64_HI(fp->rx_comp_mapping + + BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS))); + nextpg->addr_lo = + cpu_to_le32(U64_LO(fp->rx_comp_mapping + + BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS))); + } +} + +/* Returns the number of actually allocated BDs */ +static inline int bnx2x_alloc_rx_bds(struct bnx2x_fastpath *fp, + int rx_ring_size) +{ + struct bnx2x *bp = fp->bp; + u16 ring_prod, cqe_ring_prod; + int i, failure_cnt = 0; + + fp->rx_comp_cons = 0; + cqe_ring_prod = ring_prod = 0; + + /* This routine is called only during fo init so + * fp->eth_q_stats.rx_skb_alloc_failed = 0 + */ + for (i = 0; i < rx_ring_size; i++) { + if (bnx2x_alloc_rx_data(bp, fp, ring_prod) < 0) { + failure_cnt++; + continue; + } + ring_prod = NEXT_RX_IDX(ring_prod); + cqe_ring_prod = NEXT_RCQ_IDX(cqe_ring_prod); + WARN_ON(ring_prod <= (i - failure_cnt)); + } + + if (failure_cnt) + BNX2X_ERR("was only able to allocate %d rx skbs on queue[%d]\n", + (i - failure_cnt), fp->index); + + fp->rx_bd_prod = ring_prod; + /* Limit the CQE producer by the CQE ring size */ + fp->rx_comp_prod = min_t(u16, NUM_RCQ_RINGS*RCQ_DESC_CNT, + cqe_ring_prod); + fp->rx_pkt = fp->rx_calls = 0; + + fp->eth_q_stats.rx_skb_alloc_failed += failure_cnt; + + return i - failure_cnt; +} + +/* TODO: move it to the sp_verbs object!!! */ +/* Statistics ID are global per chip/path, while Client IDs for E1x are per + * port. + */ +static inline u8 bnx2x_stats_id(struct bnx2x_fastpath *fp) +{ + struct bnx2x *bp = fp->bp; + if (!CHIP_IS_E1x(bp)) { +#ifdef BCM_CNIC + /* there are special statistics counters for FCoE 136..140 */ + if (IS_FCOE_FP(fp)) + return fp->bp->cnic_base_cl_id + (fp->bp->pf_num >> 1); +#endif + return fp->cl_id; + } + return fp->cl_id + BP_PORT(bp) * FP_SB_MAX_E1x; +} + +static inline void bnx2x_init_vlan_mac_fp_objs(struct bnx2x_fastpath *fp, + bnx2x_obj_type obj_type) +{ + struct bnx2x *bp = fp->bp; + + /* Configure classification DBs */ + bnx2x_init_mac_obj(bp, &fp->mac_obj, fp->cl_id, fp->cid, + BP_FUNC(bp), bnx2x_sp(bp, mac_rdata), + bnx2x_sp_mapping(bp, mac_rdata), + BNX2X_FILTER_MAC_PENDING, + &bp->sp_state, obj_type, + &bp->macs_pool); +} + +/** + * bnx2x_get_path_func_num - get number of active functions + * + * @bp: driver handle + * + * Calculates the number of active (not hidden) functions on the + * current path. + */ +static inline u8 bnx2x_get_path_func_num(struct bnx2x *bp) +{ + u8 func_num = 0, i; + + /* 57710 has only one function per-port */ + if (CHIP_IS_E1(bp)) + return 1; + + /* Calculate a number of functions enabled on the current + * PATH/PORT. + */ + if (CHIP_REV_IS_SLOW(bp)) { + if (IS_MF(bp)) + func_num = 4; + else + func_num = 2; + } else { + for (i = 0; i < E1H_FUNC_MAX / 2; i++) { + u32 func_config = + MF_CFG_RD(bp, + func_mf_config[BP_PORT(bp) + 2 * i]. + config); + func_num += + ((func_config & FUNC_MF_CFG_FUNC_HIDE) ? 0 : 1); + } + } + + WARN_ON(!func_num); + + return func_num; +} + +static inline void bnx2x_init_bp_objs(struct bnx2x *bp) +{ + /* mcast rules must be added to tx if tx switching is enabled */ + bnx2x_obj_type o_type = bp->flags & TX_SWITCHING ? + BNX2X_OBJ_TYPE_RX_TX : BNX2X_OBJ_TYPE_RX; + + /* RX_MODE controlling object */ + bnx2x_init_rx_mode_obj(bp, &bp->rx_mode_obj); + + /* multicast configuration controlling object */ + bnx2x_init_mcast_obj(bp, &bp->mcast_obj, bp->fp->cl_id, bp->fp->cid, + BP_FUNC(bp), BP_FUNC(bp), + bnx2x_sp(bp, mcast_rdata), + bnx2x_sp_mapping(bp, mcast_rdata), + BNX2X_FILTER_MCAST_PENDING, &bp->sp_state, + o_type); + + /* Setup CAM credit pools */ + bnx2x_init_mac_credit_pool(bp, &bp->macs_pool, BP_FUNC(bp), + bnx2x_get_path_func_num(bp)); +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ + bnx2x_init_vlan_credit_pool(bp, &bp->vlans_pool, BP_ABS_FUNC(bp)>>1, + bnx2x_get_path_func_num(bp)); +#endif + + /* RSS configuration object */ + bnx2x_init_rss_config_obj(bp, &bp->rss_conf_obj, bp->fp->cl_id, + bp->fp->cid, BP_FUNC(bp), BP_FUNC(bp), + bnx2x_sp(bp, rss_rdata), + bnx2x_sp_mapping(bp, rss_rdata), + BNX2X_FILTER_RSS_CONF_PENDING, &bp->sp_state, + BNX2X_OBJ_TYPE_RX); +} + +static inline u8 bnx2x_fp_qzone_id(struct bnx2x_fastpath *fp) +{ + if (CHIP_IS_E1x(fp->bp)) + return fp->cl_id + BP_PORT(fp->bp) * ETH_MAX_RX_CLIENTS_E1H; + else + return fp->cl_id; +} + +static inline u32 bnx2x_rx_ustorm_prods_offset(struct bnx2x_fastpath *fp) +{ + struct bnx2x *bp = fp->bp; + u32 offset = BAR_USTRORM_INTMEM; + + if (!CHIP_IS_E1x(bp)) + offset += USTORM_RX_PRODS_E2_OFFSET(fp->cl_qzone_id); + else + offset += USTORM_RX_PRODS_E1X_OFFSET(BP_PORT(bp), fp->cl_id); + + return offset; +} + +static inline void bnx2x_init_txdata(struct bnx2x *bp, + struct bnx2x_fp_txdata *txdata, u32 cid, + int txq_index, __le16 *tx_cons_sb, + struct bnx2x_fastpath *fp) +{ + txdata->cid = cid; + txdata->txq_index = txq_index; + txdata->tx_cons_sb = tx_cons_sb; + txdata->parent_fp = fp; + txdata->tx_ring_size = IS_FCOE_FP(fp) ? MAX_TX_AVAIL : bp->tx_ring_size; + + DP(NETIF_MSG_IFUP, "created tx data cid %d, txq %d\n", + txdata->cid, txdata->txq_index); +} + +#ifdef BCM_CNIC +static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx) +{ + return bp->cnic_base_cl_id + cl_idx + + (bp->pf_num >> 1) * BNX2X_MAX_CNIC_ETH_CL_ID_IDX; +} + +static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp) +{ + + /* the 'first' id is allocated for the cnic */ + return bp->base_fw_ndsb; +} + +static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp) +{ + return bp->igu_base_sb; +} + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +/** + * bnx2x_update_ooo_prod - updates rx OOO producers + * + * @bp: driver handle + * @fp: poinet to the fastpath + * @bd_prod current BD producer + * @rx_comp_prod current RX completion producer + * @rx_sge_prod cuurent RX SGE producer + * + * updates rx producers according to + * iSCSI OOO ETH ring spec. + */ +static inline void bnx2x_update_ooo_prod(struct bnx2x *bp, + struct bnx2x_fastpath *fp, u16 bd_prod, + u16 rx_comp_prod, u16 rx_sge_prod) +{ + struct ustorm_eth_rx_producers rx_prods = {0}; + u32 i; + u32 start = fp->ustorm_rx_prods_offset; + + /* Update producers */ + rx_prods.bd_prod = bd_prod + 0x4000; + rx_prods.cqe_prod = rx_comp_prod + 0x4000; + rx_prods.sge_prod = rx_sge_prod; + + /* + * Make sure that the BD and SGE data is updated before updating the + * producers since FW might read the BD/SGE right after the producer + * is updated. + * This is only applicable for weak-ordered memory model archs such + * as IA-64. The following barrier is also mandatory since FW will + * assumes BDs must have buffers. + */ + wmb(); + + for (i = 0; i < sizeof(rx_prods)/4; i++) + REG_WR(bp, start + i*4, ((u32 *)&rx_prods)[i]); + + mmiowb(); /* keep prod updates ordered */ + barrier(); + + REG_WR16(bp, BAR_TSTRORM_INTMEM + + TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(BP_FUNC(bp)), + fp->rx_pkts_avail); + + mmiowb(); /* keep prod updates ordered */ + + DP(NETIF_MSG_RX_STATUS, + "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", + fp->index, bd_prod, rx_comp_prod, rx_sge_prod); +} + +static inline int bnx2x_alloc_ooo_rx_bd_ring(struct bnx2x_fastpath *fp) +{ + struct bnx2x *bp = fp->bp; + int i, rx_ring_size; + + /* - OOO BD ring size should be less or equal to half FWD + * Tx ring size. + * - OOO BD ring size must be less than than CQE ring size + * minus maximum number of outstanding ramrods. + */ +#if 1 + /* Delete me! For integration only! */ + rx_ring_size = min_t(int, bp->tx_ring_size / 2, 500); +#else + rx_ring_size = bp->rx_ring_size ? bp->rx_ring_size : + MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp); + + rx_ring_size = min_t(int, bp->tx_ring_size / 2, + rx_ring_size); +#endif + + rx_ring_size = min_t(int, rx_ring_size, INIT_OOO_RING_SIZE); + + fp->rx_pkts_avail = bnx2x_alloc_rx_bds(fp, rx_ring_size); + + /* Add more CQEs for ramrods to ensure the demand above */ + for (i = 0; i < MAX_SPQ_PENDING; i++) + fp->rx_comp_prod = NEXT_RCQ_IDX(fp->rx_comp_prod); + + return fp->rx_pkts_avail; +} + +static inline void bnx2x_init_ooo_fp(struct bnx2x *bp) +{ + struct bnx2x_fastpath *fp = bnx2x_ooo_fp(bp); + unsigned long q_type = 0; + + /* + * OOO ring should not pass any packet to the stack, + * so rx_queue 0 is good for us + * we don't need set it explicitly - assumed zero_fp did this + * bnx2x_ooo(bp, rx_queue) = 0; + */ + + bnx2x_ooo(bp, cl_id) = bnx2x_cnic_eth_cl_id(bp, + BNX2X_OOO_ETH_CL_ID_IDX); + bnx2x_ooo(bp, cid) = BNX2X_OOO_ETH_CID(bp); + bnx2x_ooo(bp, fw_sb_id) = bnx2x_cnic_fw_sb_id(bp); + bnx2x_ooo(bp, igu_sb_id) = bnx2x_cnic_igu_sb_id(bp); + bnx2x_ooo(bp, rx_cons_sb) = BNX2X_RX_OOO_INDEX; + + /* + * Initialize ooo fp's tx-data: + * - OOO ring doesn't have a netdev_queue + * - Tx SB index will never be advanced - we need it in + * order to use the general NAPI poll() for handling OOO + * ring slow path in bnx2x_nic_load()/unload(). + */ + bnx2x_init_txdata(bp, bnx2x_ooo(bp, txdata_ptr[FIRST_TX_COS_INDEX]), + fp->cid, INVALID_TXQ_INDEX, BNX2X_TX_OOO_INDEX, fp); + + DP(NETIF_MSG_IFUP, "created ooo tx data (fp index %d)\n", fp->index); + + /* qZone id equals to FW (per path) client id */ + bnx2x_ooo(bp, cl_qzone_id) = bnx2x_fp_qzone_id(fp); + /* init shortcut */ + bnx2x_ooo(bp, ustorm_rx_prods_offset) = + bnx2x_rx_ustorm_prods_offset(fp); + + /* Init OOO related internal memory */ + /* Set OOO ring CID */ + REG_WR(bp, BAR_TSTRORM_INTMEM + + TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(BP_FUNC(bp)), + HW_CID(bp, bnx2x_ooo(bp, cid))); + + /* Set OOO ring Client ID */ + REG_WR8(bp, BAR_TSTRORM_INTMEM + + TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(BP_FUNC(bp)), + bnx2x_ooo(bp, cl_id)); + + /* Configure classification DBs */ + bnx2x_init_vlan_mac_fp_objs(fp, BNX2X_OBJ_TYPE_RX); + + /* Configure Queue State object */ + __set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type); + + /* No multi-CoS for OOO queue */ + BUG_ON(fp->max_cos != 1); + + bnx2x_init_queue_obj(bp, &fp->q_obj, fp->cl_id, &fp->cid, 1, + BP_FUNC(bp), bnx2x_sp(bp, q_rdata), + bnx2x_sp_mapping(bp, q_rdata), q_type); +} + +static inline void bnx2x_init_fwd_fp(struct bnx2x *bp) +{ + struct bnx2x_fastpath *fp = bnx2x_fwd_fp(bp); + unsigned long q_type = 0; + + /* + * FWD ring should not pass any packet to the stack, + * so rx_queue 0 is good for us + * we don't need set it explicitly - assumed zero_fp did this + * bnx2x_fwd(bp, rx_queue) = 0; + */ + + bnx2x_fwd(bp, cl_id) = -1; /* No CL_ID for forwarding */ + bnx2x_fwd(bp, cid) = BNX2X_FWD_ETH_CID(bp); + bnx2x_fwd(bp, fw_sb_id) = bnx2x_cnic_fw_sb_id(bp); /* Connect to CNIC SB */ + bnx2x_fwd(bp, igu_sb_id) = bnx2x_cnic_igu_sb_id(bp); + bnx2x_fwd(bp, rx_cons_sb) = NULL; + + /* Forwarding ring doesn't have a netdev_queue */ + bnx2x_init_txdata(bp, bnx2x_fwd(bp, txdata_ptr[FIRST_TX_COS_INDEX]), + fp->cid, INVALID_TXQ_INDEX, BNX2X_TX_FWD_INDEX, fp); + + DP(NETIF_MSG_IFUP, "created fwd tx data (fp index %d)\n", fp->index); + + /* Configure Queue State object */ + __set_bit(BNX2X_Q_TYPE_FWD, &q_type); + __set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type); + + /* No multi-CoS for Forwarding queue */ + BUG_ON(fp->max_cos != 1); + + bnx2x_init_queue_obj(bp, &fp->q_obj, fp->cl_id, &fp->cid, 1, + BP_FUNC(bp), bnx2x_sp(bp, q_rdata), + bnx2x_sp_mapping(bp, q_rdata), q_type); +} +#endif /* OOO */ + +static inline void bnx2x_init_fcoe_fp(struct bnx2x *bp) +{ + struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); + unsigned long q_type = 0; + + bnx2x_fcoe(bp, rx_queue) = BNX2X_NUM_ETH_QUEUES(bp); + bnx2x_fcoe(bp, cl_id) = bnx2x_cnic_eth_cl_id(bp, + BNX2X_FCOE_ETH_CL_ID_IDX); + bnx2x_fcoe(bp, cid) = BNX2X_FCOE_ETH_CID(bp); + bnx2x_fcoe(bp, fw_sb_id) = DEF_SB_ID; + bnx2x_fcoe(bp, igu_sb_id) = bp->igu_dsb_id; + bnx2x_fcoe(bp, rx_cons_sb) = BNX2X_FCOE_L2_RX_INDEX; + bnx2x_init_txdata(bp, bnx2x_fcoe(bp, txdata_ptr[0]), + fp->cid, FCOE_TXQ_IDX(bp), BNX2X_FCOE_L2_TX_INDEX, + fp); + + DP(NETIF_MSG_IFUP, "created fcoe tx data (fp index %d)\n", fp->index); + + /* qZone id equals to FW (per path) client id */ + bnx2x_fcoe(bp, cl_qzone_id) = bnx2x_fp_qzone_id(fp); + /* init shortcut */ + bnx2x_fcoe(bp, ustorm_rx_prods_offset) = + bnx2x_rx_ustorm_prods_offset(fp); + + /* Configure Queue State object */ + __set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type); + __set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type); + + /* No multi-CoS for FCoE L2 client */ + BUG_ON(fp->max_cos != 1); + + bnx2x_init_queue_obj(bp, &fp->q_obj, fp->cl_id, &fp->cid, 1, + BP_FUNC(bp), bnx2x_sp(bp, q_rdata), + bnx2x_sp_mapping(bp, q_rdata), q_type); + + DP(NETIF_MSG_IFUP, + "queue[%d]: bnx2x_init_sb(%p,%p) cl_id %d fw_sb %d igu_sb %d\n", + fp->index, bp, fp->status_blk.e2_sb, fp->cl_id, fp->fw_sb_id, + fp->igu_sb_id); +} +#endif + +static inline int bnx2x_clean_tx_queue(struct bnx2x *bp, + struct bnx2x_fp_txdata *txdata) +{ + int cnt = 1000; + + while (bnx2x_has_tx_work_unload(txdata)) { + if (!cnt) { + BNX2X_ERR("timeout waiting for queue[%d]: txdata->tx_pkt_prod(%d) != txdata->tx_pkt_cons(%d)\n", + txdata->txq_index, txdata->tx_pkt_prod, + txdata->tx_pkt_cons); +#ifdef BNX2X_STOP_ON_ERROR + bnx2x_panic(); + return -EBUSY; +#else + break; +#endif + } + cnt--; + usleep_range(1000, 1000); + } + + return 0; +} + +int bnx2x_get_link_cfg_idx(struct bnx2x *bp); + +static inline void __storm_memset_struct(struct bnx2x *bp, + u32 addr, size_t size, u32 *data) +{ + int i; + for (i = 0; i < size/4; i++) + REG_WR(bp, addr + (i * 4), data[i]); +} + +static inline void storm_memset_func_cfg(struct bnx2x *bp, + struct tstorm_eth_function_common_config *tcfg, + u16 abs_fid) +{ + size_t size = sizeof(struct tstorm_eth_function_common_config); + + u32 addr = BAR_TSTRORM_INTMEM + + TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(abs_fid); + + __storm_memset_struct(bp, addr, size, (u32 *)tcfg); +} + +static inline void storm_memset_cmng(struct bnx2x *bp, + struct cmng_init *cmng, + u8 port) +{ + int vn; + size_t size = sizeof(struct cmng_struct_per_port); + + u32 addr = BAR_XSTRORM_INTMEM + + XSTORM_CMNG_PER_PORT_VARS_OFFSET(port); + + __storm_memset_struct(bp, addr, size, (u32 *)&cmng->port); + + for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { + int func = func_by_vn(bp, vn); + + addr = BAR_XSTRORM_INTMEM + + XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func); + size = sizeof(struct rate_shaping_vars_per_vn); + __storm_memset_struct(bp, addr, size, + (u32 *)&cmng->vnic.vnic_max_rate[vn]); + + addr = BAR_XSTRORM_INTMEM + + XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func); + size = sizeof(struct fairness_vars_per_vn); + __storm_memset_struct(bp, addr, size, + (u32 *)&cmng->vnic.vnic_min_rate[vn]); + } +} + +/** + * bnx2x_wait_sp_comp - wait for the outstanding SP commands. + * + * @bp: driver handle + * @mask: bits that need to be cleared + */ +static inline bool bnx2x_wait_sp_comp(struct bnx2x *bp, unsigned long mask) +{ + int tout = 5000; /* Wait for 5 secs tops */ + + while (tout--) { + smp_mb(); + netif_addr_lock_bh(bp->dev); + if (!(bp->sp_state & mask)) { + netif_addr_unlock_bh(bp->dev); + return true; + } + netif_addr_unlock_bh(bp->dev); + + usleep_range(1000, 1000); + } + + smp_mb(); + + netif_addr_lock_bh(bp->dev); + if (bp->sp_state & mask) { + BNX2X_ERR("Filtering completion timed out. sp_state 0x%lx, mask 0x%lx\n", + bp->sp_state, mask); + netif_addr_unlock_bh(bp->dev); + return false; + } + netif_addr_unlock_bh(bp->dev); + + return true; +} + +/** + * bnx2x_set_ctx_validation - set CDU context validation values + * + * @bp: driver handle + * @cxt: context of the connection on the host memory + * @cid: SW CID of the connection to be configured + */ +void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt, + u32 cid); + +void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id, + u8 sb_index, u8 disable, u16 usec); +void bnx2x_acquire_phy_lock(struct bnx2x *bp); +void bnx2x_release_phy_lock(struct bnx2x *bp); + +/** + * bnx2x_extract_max_cfg - extract MAX BW part from MF configuration. + * + * @bp: driver handle + * @mf_cfg: MF configuration + * + */ +static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg) +{ + u16 max_cfg = (mf_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> + FUNC_MF_CFG_MAX_BW_SHIFT; + if (!max_cfg) { + DP(NETIF_MSG_IFUP | BNX2X_MSG_ETHTOOL, + "Max BW configured to 0 - using 100 instead\n"); + max_cfg = 100; + } + return max_cfg; +} + +/* checks if HW supports GRO for given MTU */ +static inline bool bnx2x_mtu_allows_gro(int mtu) +{ + /* gro frags per page */ + int fpp = SGE_PAGE_SIZE / (mtu - ETH_MAX_TPA_HEADER_SIZE); + + /* + * 1. number of frags should not grow above MAX_SKB_FRAGS + * 2. frag must fit the page + */ + return mtu <= SGE_PAGE_SIZE && (U_ETH_SGL_SIZE * fpp) <= MAX_SKB_FRAGS; +} + +/** + * bnx2x_bz_fp - zero content of the fastpath structure. + * + * @bp: driver handle + * @index: fastpath index to be zeroed + * + * Makes sure the contents of the bp->fp[index].napi is kept + * intact. + */ +static inline void bnx2x_bz_fp(struct bnx2x *bp, int index) +{ + struct bnx2x_fastpath *fp = &bp->fp[index]; + int cos; +#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ + struct napi_struct orig_napi = fp->napi; +#endif +#if !defined(BNX2X_NEW_NAPI) /* ! BNX2X_UPSTREAM */ + struct net_device orig_netdev = fp->dummy_netdev; +#endif + /* bzero bnx2x_fastpath contents */ + if (bp->stats_init) + memset(fp, 0, sizeof(*fp)); + else { + /* Keep Queue statistics */ + struct bnx2x_eth_q_stats *tmp_eth_q_stats; + struct bnx2x_eth_q_stats_old *tmp_eth_q_stats_old; + + tmp_eth_q_stats = kzalloc(sizeof(struct bnx2x_eth_q_stats), + GFP_KERNEL); + if (tmp_eth_q_stats) + memcpy(tmp_eth_q_stats, &fp->eth_q_stats, + sizeof(struct bnx2x_eth_q_stats)); + + tmp_eth_q_stats_old = + kzalloc(sizeof(struct bnx2x_eth_q_stats_old), + GFP_KERNEL); + if (tmp_eth_q_stats_old) + memcpy(tmp_eth_q_stats_old, &fp->eth_q_stats_old, + sizeof(struct bnx2x_eth_q_stats_old)); + + memset(fp, 0, sizeof(*fp)); + + if (tmp_eth_q_stats) { + memcpy(&fp->eth_q_stats, tmp_eth_q_stats, + sizeof(struct bnx2x_eth_q_stats)); + kfree(tmp_eth_q_stats); + } + + if (tmp_eth_q_stats_old) { + memcpy(&fp->eth_q_stats_old, tmp_eth_q_stats_old, + sizeof(struct bnx2x_eth_q_stats_old)); + kfree(tmp_eth_q_stats_old); + } + + } + +#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ + /* Restore the NAPI object as it has been already initialized */ + fp->napi = orig_napi; +#endif +#if !defined(BNX2X_NEW_NAPI) /* ! BNX2X_UPSTREAM */ + /* Restore the "dummy" netdev object as it has been already + * initialized. + */ + fp->dummy_netdev = orig_netdev; +#endif + + fp->bp = bp; + fp->index = index; + if (IS_ETH_FP(fp)) + fp->max_cos = bp->max_cos; + else + /* Special queues support only one CoS */ + fp->max_cos = 1; + + /* Init txdata pointers */ +#ifdef BCM_CNIC + if (IS_FCOE_FP(fp)) + fp->txdata_ptr[0] = &bp->bnx2x_txq[FCOE_TXQ_IDX(bp)]; +#ifdef BCM_OOO + if (IS_FWD_FP(fp)) + fp->txdata_ptr[0] = &bp->bnx2x_txq[FWD_TXQ_IDX(bp)]; + if (IS_OOO_FP(fp)) + fp->txdata_ptr[0] = &bp->bnx2x_txq[OOO_TXQ_IDX(bp)]; +#endif +#endif + if (IS_ETH_FP(fp)) + for_each_cos_in_tx_queue(fp, cos) + fp->txdata_ptr[cos] = &bp->bnx2x_txq[cos * + BNX2X_NUM_ETH_QUEUES(bp) + index]; + + /* + * set the tpa flag for each queue. The tpa flag determines the queue + * minimal size so it must be set prior to queue memory allocation + */ +#ifndef BNX2X_NETQ /* BNX2X_UPSTREAM */ +#ifdef NO_GRO_SUPPORT + fp->disable_tpa = (bp->flags & TPA_ENABLE_FLAG) == 0; +#else + + fp->disable_tpa = !(bp->flags & TPA_ENABLE_FLAG || + (bp->flags & GRO_ENABLE_FLAG && + bnx2x_mtu_allows_gro(bp->dev->mtu))); + if (bp->flags & TPA_ENABLE_FLAG) + fp->mode = TPA_MODE_LRO; + else if (bp->flags & GRO_ENABLE_FLAG) + fp->mode = TPA_MODE_GRO; +#endif +#endif + +#ifdef BCM_CNIC +#ifdef BCM_OOO + /* We don't want TPA on FCoE, FWD and OOO L2 rings */ + if (IS_FCOE_FP(fp) || IS_OOO_FP(fp) || IS_FWD_FP(fp)) +#else /* BNX2X_UPSTREAM */ + /* We don't want TPA on an FCoE L2 ring */ + if (IS_FCOE_FP(fp)) +#endif + fp->disable_tpa = 1; +#endif +} + +#ifdef BCM_CNIC +/** + * bnx2x_get_iscsi_info - update iSCSI params according to licensing info. + * + * @bp: driver handle + * + */ +void bnx2x_get_iscsi_info(struct bnx2x *bp); +#endif + +/** + * bnx2x_link_sync_notify - send notification to other functions. + * + * @bp: driver handle + * + */ +static inline void bnx2x_link_sync_notify(struct bnx2x *bp) +{ + int func; + int vn; + + /* Set the attention towards other drivers on the same port */ + for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { + if (vn == BP_VN(bp)) + continue; + + func = func_by_vn(bp, vn); + REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + + (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); + } +} + +/** + * bnx2x_update_drv_flags - update flags in shmem + * + * @bp: driver handle + * @flags: flags to update + * @set: set or clear + * + */ +static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set) +{ + if (SHMEM2_HAS(bp, drv_flags)) { + u32 drv_flags; + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); + drv_flags = SHMEM2_RD(bp, drv_flags); + + if (set) + SET_FLAGS(drv_flags, flags); + else + RESET_FLAGS(drv_flags, flags); + + SHMEM2_WR(bp, drv_flags, drv_flags); + DP(NETIF_MSG_IFUP, "drv_flags 0x%08x\n", drv_flags); + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); + } +} + +static inline bool bnx2x_is_valid_ether_addr(struct bnx2x *bp, u8 *addr) +{ + if (is_valid_ether_addr(addr)) + return true; +#ifdef BCM_CNIC + if (is_zero_ether_addr(addr) && + (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) + return true; +#endif + return false; +} + +#endif /* BNX2X_CMN_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.c deleted file mode 100644 index d7f495a..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.c +++ /dev/null @@ -1,3943 +0,0 @@ -/* bnx2x_common.c: Broadcom Everest network driver. - * - * Copyright (c) 2007-2011 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation. - * - * Maintained by: Eilon Greenstein - * Written by: Eliezer Tamir - * Based on code from Michael Chan's bnx2 driver - * UDP CSUM errata workaround by Arik Gendelman - * Slowpath and fastpath rework by Vladislav Zolotarov - * Statistics and Link management by Yitchak Gertner - * - */ -#include -#include -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include -#endif -#include -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include /* for dev_info() */ -#endif -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include -#endif -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ -#include -#else -#include -#endif -#include -#include -#if (LINUX_VERSION_CODE > 0x020607) /* BNX2X_UPSTREAM */ -#include -#endif -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include -#endif -#include -#if (LINUX_VERSION_CODE >= 0x02061b) && !defined(BNX2X_DRIVER_DISK) && !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ -#include -#endif -#include -#include -#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ -#include -#else -#include -#endif -#if defined(BNX2X_UPSTREAM) && !defined(BNX2X_USE_INIT_VALUES) /* BNX2X_UPSTREAM */ -#include -#endif - -#if (LINUX_VERSION_CODE < 0x020600) /* ! BNX2X_UPSTREAM */ -#define __NO_TPA__ 1 -#endif - -#include "bnx2x.h" -#include "bnx2x_init.h" -#include "bnx2x_dump.h" -#include "bnx2x_common.h" - -#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ -#include "bnx2x_esx.h" -#endif - -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ -#include "bnx2x_vf.h" -#endif - -/** - * zeros the contents of the bp->fp[index]. - * Makes sure the contents of the bp->fp[index]. napi is kept - * intact. - * - * @param bp - * @param index - */ -static inline void bnx2x_bz_fp(struct bnx2x *bp, int index) -{ - struct bnx2x_fastpath *fp = &bp->fp[index]; -#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ - struct napi_struct orig_napi = fp->napi; -#endif -#if !defined(BNX2X_NEW_NAPI) /* !BNX2X_UPSTREAM */ - struct net_device orig_netdev = fp->dummy_netdev; -#endif - /* bzero bnx2x_fastpath contents */ - memset(fp, 0, sizeof(*fp)); - -#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ - /* Restore the NAPI object as it has been already initialized */ - fp->napi = orig_napi; -#endif -#if !defined(BNX2X_NEW_NAPI) /* !BNX2X_UPSTREAM */ - /* Restore the "dummy" netdev object as it has been already - * initialized. - */ - fp->dummy_netdev = orig_netdev; -#endif -} - -/** - * Moves the contents of the bp->fp[from] to the bp->fp[to]. - * Makes sure the contents of the bp->fp[to].napi is kept - * intact. - * - * @param bp - * @param from - * @param to - */ -static inline void bnx2x_move_fp(struct bnx2x *bp, int from, int to) -{ - struct bnx2x_fastpath *from_fp = &bp->fp[from]; - struct bnx2x_fastpath *to_fp = &bp->fp[to]; -#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ - struct napi_struct orig_napi = to_fp->napi; -#endif -#if !defined(BNX2X_NEW_NAPI) /* !BNX2X_UPSTREAM */ - struct net_device orig_netdev = to_fp->dummy_netdev; -#endif - /* Move bnx2x_fastpath contents */ - memcpy(to_fp, from_fp, sizeof(*to_fp)); - to_fp->index = to; - -#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ - /* Restore the NAPI object as it has been already initialized */ - to_fp->napi = orig_napi; -#endif -#if !defined(BNX2X_NEW_NAPI) /* !BNX2X_UPSTREAM */ - /* Restore the "dummy" netdev object as it has been already - * initialized. - */ - to_fp->dummy_netdev = orig_netdev; -#endif -} - -int load_count[2][3] = {{0}}; /* per-path: 0-common, 1-port0, 2-port1 */ -extern int disable_tpa; - -int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state) -{ - struct net_device *dev = pci_get_drvdata(pdev); - struct bnx2x *bp; - - if (!dev) { - dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); - return -ENODEV; - } - bp = netdev_priv(dev); - - rtnl_lock(); - -#if (LINUX_VERSION_CODE >= 0x02060b) /* BNX2X_UPSTREAM */ - pci_save_state(pdev); -#else - pci_save_state(pdev, bp->pci_state); -#endif - - if (!netif_running(dev)) { - rtnl_unlock(); - return 0; - } - -#if (LINUX_VERSION_CODE < 0x020618) /* ! BNX2X_UPSTREAM */ - flush_scheduled_work(); -#endif - netif_device_detach(dev); - - bnx2x_nic_unload(bp, UNLOAD_CLOSE); - - bnx2x_set_power_state(bp, pci_choose_state(pdev, state)); - - rtnl_unlock(); - - return 0; -} - -int bnx2x_resume(struct pci_dev *pdev) -{ - struct net_device *dev = pci_get_drvdata(pdev); - struct bnx2x *bp; - int rc; - - if (!dev) { - dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); - return -ENODEV; - } - bp = netdev_priv(dev); - - if (bp->recovery_state != BNX2X_RECOVERY_DONE) { - netdev_err(dev, "Handling parity error recovery. Try again later\n"); - return -EAGAIN; - } - - rtnl_lock(); - -#if (LINUX_VERSION_CODE >= 0x02060b) /* BNX2X_UPSTREAM */ - pci_restore_state(pdev); -#else - pci_restore_state(pdev, bp->pci_state); -#endif - - if (!netif_running(dev)) { - rtnl_unlock(); - return 0; - } - - bnx2x_set_power_state(bp, PCI_D0); - netif_device_attach(dev); - - /* Since the chip was reset, clear the FW sequence number */ - bp->fw_seq = 0; - rc = bnx2x_nic_load(bp, LOAD_OPEN); - -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - /* Invalidate netqueue state as filters have been lost after reinit */ - vmknetddi_queueops_invalidate_state(dev); -#endif - rtnl_unlock(); - - return rc; -} - - -/* free skb in the packet ring at pos idx - * return idx of last bd freed - */ -static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fastpath *fp, - u16 idx) -{ - struct sw_tx_bd *tx_buf = &fp->tx_buf_ring[idx]; - struct eth_tx_start_bd *tx_start_bd; - struct eth_tx_bd *tx_data_bd; - struct sk_buff *skb = tx_buf->skb; - u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons; - int nbd; - - /* prefetch skb end pointer to speedup dev_kfree_skb() */ - prefetch(&skb->end); - - DP(BNX2X_MSG_OFF, "pkt_idx %d buff @(%p)->skb %p\n", - idx, tx_buf, skb); - - /* unmap first bd */ - DP(BNX2X_MSG_OFF, "free bd_idx %d\n", bd_idx); - tx_start_bd = &fp->tx_desc_ring[bd_idx].start_bd; -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd), - BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE); -#else - pci_unmap_single(bp->pdev, BD_UNMAP_ADDR(tx_start_bd), - BD_UNMAP_LEN(tx_start_bd), PCI_DMA_TODEVICE); -#endif - - - nbd = le16_to_cpu(tx_start_bd->nbd) - 1; -#ifdef BNX2X_STOP_ON_ERROR - if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) { - BNX2X_ERR("BAD nbd!\n"); - bnx2x_panic(); - } -#endif - new_cons = nbd + tx_buf->first_bd; - - /* Get the next bd */ - bd_idx = TX_BD(NEXT_TX_IDX(bd_idx)); - - /* Skip a parse bd... */ - --nbd; - bd_idx = TX_BD(NEXT_TX_IDX(bd_idx)); - - /* ...and the TSO split header bd since they have no mapping */ - if (tx_buf->flags & BNX2X_TSO_SPLIT_BD) { - --nbd; - bd_idx = TX_BD(NEXT_TX_IDX(bd_idx)); - } - - /* now free frags */ - while (nbd > 0) { - - DP(BNX2X_MSG_OFF, "free frag bd_idx %d\n", bd_idx); - tx_data_bd = &fp->tx_desc_ring[bd_idx].reg_bd; -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_page(&bp->pdev->dev, BD_UNMAP_ADDR(tx_data_bd), - BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); -#else - pci_unmap_page(bp->pdev, BD_UNMAP_ADDR(tx_data_bd), - BD_UNMAP_LEN(tx_data_bd), PCI_DMA_TODEVICE); -#endif - if (--nbd) - bd_idx = TX_BD(NEXT_TX_IDX(bd_idx)); - } - - /* release skb */ - WARN_ON(!skb); - dev_kfree_skb(skb); - tx_buf->first_bd = 0; - tx_buf->skb = NULL; - - return new_cons; -} - -int bnx2x_tx_int(struct bnx2x_fastpath *fp) -{ -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - struct netdev_queue *txq; -#endif - struct bnx2x *bp = fp->bp; - u16 hw_cons, sw_cons, bd_cons = fp->tx_bd_cons; - -#ifdef BNX2X_STOP_ON_ERROR - if (unlikely(bp->panic)) - return -1; -#endif - -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - txq = netdev_get_tx_queue(bp->dev, fp->index); -#endif - hw_cons = le16_to_cpu(*fp->tx_cons_sb); - sw_cons = fp->tx_pkt_cons; - - while (sw_cons != hw_cons) { - u16 pkt_cons; - - pkt_cons = TX_BD(sw_cons); - - DP(NETIF_MSG_TX_DONE, "queue[%d]: hw_cons %u sw_cons %u " - " pkt_cons %u\n", - fp->index, hw_cons, sw_cons, pkt_cons); - - bd_cons = bnx2x_free_tx_pkt(bp, fp, pkt_cons); - sw_cons++; - } - - fp->tx_pkt_cons = sw_cons; - fp->tx_bd_cons = bd_cons; - - /* Need to make the tx_bd_cons update visible to start_xmit() - * before checking for netif_tx_queue_stopped(). Without the - * memory barrier, there is a small possibility that - * start_xmit() will miss it and cause the queue to be stopped - * forever. - * On the other hand we need an rmb() here to ensure the proper - * ordering of bit testing in the following - * netif_tx_queue_stopped(txq) call. - */ - smp_mb(); - -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - if (unlikely(netif_tx_queue_stopped(txq))) { - - /* Taking tx_lock() is needed to prevent reenabling the queue - * while it's empty. This could have happen if rx_action() gets - * suspended in bnx2x_tx_int() after the condition before - * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()): - * - * stops the queue->sees fresh tx_bd_cons->releases the queue-> - * sends some packets consuming the whole queue again-> - * stops the queue - */ - - __netif_tx_lock(txq, smp_processor_id()); - - if ((netif_tx_queue_stopped(txq)) && - (bp->state == BNX2X_STATE_OPEN) && - (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3)) - netif_tx_wake_queue(txq); - - __netif_tx_unlock(txq); - } -#else - if (unlikely(netif_queue_stopped(bp->dev))) { - - netif_tx_lock(bp->dev); - - if (netif_queue_stopped(bp->dev) && - (bp->state == BNX2X_STATE_OPEN) && - (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3)) - netif_wake_queue(bp->dev); - - netif_tx_unlock(bp->dev); - } -#endif - return 0; -} - -#if !defined(__NO_TPA__) /* BNX2X_UPSTREAM */ -static inline void bnx2x_update_last_max_sge(struct bnx2x_fastpath *fp, - u16 idx) -{ - u16 last_max = fp->last_max_sge; - - if (SUB_S16(idx, last_max) > 0) - fp->last_max_sge = idx; -} - -static void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp, - struct eth_fast_path_rx_cqe *fp_cqe) -{ - struct bnx2x *bp = fp->bp; - u16 sge_len = SGE_PAGE_ALIGN(le16_to_cpu(fp_cqe->pkt_len) - - le16_to_cpu(fp_cqe->len_on_bd)) >> - SGE_PAGE_SHIFT; - u16 last_max, last_elem, first_elem; - u16 delta = 0; - u16 i; - - if (!sge_len) - return; - - /* First mark all used pages */ - for (i = 0; i < sge_len; i++) - BIT_VEC64_CLEAR_BIT(fp->sge_mask, - RX_SGE(le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[i]))); - - DP(NETIF_MSG_RX_STATUS, "fp_cqe->sgl[%d] = %d\n", - sge_len - 1, le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[sge_len - 1])); - - /* Here we assume that the last SGE index is the biggest */ - prefetch((void *)(fp->sge_mask)); - bnx2x_update_last_max_sge(fp, - le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[sge_len - 1])); - - last_max = RX_SGE(fp->last_max_sge); - last_elem = last_max >> BIT_VEC64_ELEM_SHIFT; - first_elem = RX_SGE(fp->rx_sge_prod) >> BIT_VEC64_ELEM_SHIFT; - - /* If ring is not full */ - if (last_elem + 1 != first_elem) - last_elem++; - - /* Now update the prod */ - for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) { - if (likely(fp->sge_mask[i])) - break; - - fp->sge_mask[i] = BIT_VEC64_ELEM_ONE_MASK; - delta += BIT_VEC64_ELEM_SZ; - } - - if (delta > 0) { - fp->rx_sge_prod += delta; - /* clear page-end entries */ - bnx2x_clear_sge_mask_next_elems(fp); - } - - DP(NETIF_MSG_RX_STATUS, - "fp->last_max_sge = %d fp->rx_sge_prod = %d\n", - fp->last_max_sge, fp->rx_sge_prod); -} - -static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue, - struct sk_buff *skb, u16 cons, u16 prod) -{ - struct bnx2x *bp = fp->bp; - struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; - struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; - struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; - dma_addr_t mapping; - - /* move empty skb from pool to prod and map it */ - prod_rx_buf->skb = fp->tpa_pool[queue].skb; -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - mapping = dma_map_single(&bp->pdev->dev, fp->tpa_pool[queue].skb->data, - bp->rx_buf_size, DMA_FROM_DEVICE); - dma_unmap_addr_set(prod_rx_buf, mapping, mapping); -#else - mapping = pci_map_single(bp->pdev, fp->tpa_pool[queue].skb->data, - bp->rx_buf_size, PCI_DMA_FROMDEVICE); - pci_unmap_addr_set(prod_rx_buf, mapping, mapping); -#endif - - /* move partial skb from cons to pool (don't unmap yet) */ - fp->tpa_pool[queue] = *cons_rx_buf; - - /* mark bin state as start - print error if current state != stop */ - if (fp->tpa_state[queue] != BNX2X_TPA_STOP) - BNX2X_ERR("start of bin not in stop [%d]\n", queue); - - fp->tpa_state[queue] = BNX2X_TPA_START; - - /* point prod_bd to new skb */ - prod_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - prod_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - -#ifdef BNX2X_STOP_ON_ERROR - fp->tpa_queue_used |= (1 << queue); -#if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ -#ifdef _ASM_GENERIC_INT_L64_H - DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n", -#else - DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n", -#endif -#else -#if defined(__powerpc64__) || defined(_ASM_IA64_TYPES_H) - DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n", -#else - DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n", -#endif -#endif - fp->tpa_queue_used); -#endif -} - -static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, - struct sk_buff *skb, - struct eth_fast_path_rx_cqe *fp_cqe, - u16 cqe_idx) -{ - struct sw_rx_page *rx_pg, old_rx_pg; - u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd); - u32 i, frag_len, frag_size, pages; - int err; - int j; - - frag_size = le16_to_cpu(fp_cqe->pkt_len) - len_on_bd; - pages = SGE_PAGE_ALIGN(frag_size) >> SGE_PAGE_SHIFT; - -#ifndef __VMKLNX__ /* BNX2X_UPSTREAM */ - /* This is needed in order to enable forwarding support */ - if (frag_size) - skb_shinfo(skb)->gso_size = 1; -#else /* __VMKLNX__ */ - if (frag_size) { - /* Setting gso_size to the - * [pNic MTU - (TCP_HDR+IP_HDR+ETH_HDR)] - */ - u16 eth_hlen = eth_header_len((struct ethhdr *)skb->data); - struct iphdr *iph = (struct iphdr *)(skb->data + eth_hlen); - u16 ip_hlen = iph->ihl << 2; - struct tcphdr *tcph = (struct tcphdr *)((char *)iph + ip_hlen); - unsigned short lso_mss = bp->dev->mtu - - (eth_hlen + ip_hlen + (tcph->doff << 2)); - - skb_shinfo(skb)->gso_size = lso_mss; - skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; - } -#endif - -#ifdef BNX2X_STOP_ON_ERROR - if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) { - BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n", - pages, cqe_idx); - BNX2X_ERR("fp_cqe->pkt_len = %d fp_cqe->len_on_bd = %d\n", - fp_cqe->pkt_len, len_on_bd); - bnx2x_panic(); - return -EINVAL; - } -#endif - - /* Run through the SGL and compose the fragmented skb */ - for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) { - u16 sge_idx = RX_SGE(le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[j])); - - /* FW gives the indices of the SGE as if the ring is an array - (meaning that "next" element will consume 2 indices) */ - frag_len = min(frag_size, (u32)(SGE_PAGE_SIZE*PAGES_PER_SGE)); - rx_pg = &fp->rx_page_ring[sge_idx]; - old_rx_pg = *rx_pg; - - /* If we fail to allocate a substitute page, we simply stop - where we are and drop the whole packet */ - err = bnx2x_alloc_rx_sge(bp, fp, sge_idx); - if (unlikely(err)) { - fp->eth_q_stats.rx_skb_alloc_failed++; - return err; - } - - /* Unmap the page as we r going to pass it to the stack */ -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(&old_rx_pg, mapping), - SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE); -#else - pci_unmap_page(bp->pdev, pci_unmap_addr(&old_rx_pg, mapping), - SGE_PAGE_SIZE*PAGES_PER_SGE, PCI_DMA_FROMDEVICE); -#endif - - /* Add one frag and update the appropriate fields in the skb */ - skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len); - - skb->data_len += frag_len; - skb->truesize += frag_len; - skb->len += frag_len; - - frag_size -= frag_len; - } - - return 0; -} - -static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp, - u16 queue, int pad, int len, union eth_rx_cqe *cqe, - u16 cqe_idx) -{ - struct sw_rx_bd *rx_buf = &fp->tpa_pool[queue]; - struct sk_buff *skb = rx_buf->skb; - /* alloc new skb */ - struct sk_buff *new_skb = netdev_alloc_skb(bp->dev, bp->rx_buf_size); - - /* Unmap skb in the pool anyway, as we are going to change - pool entry status to BNX2X_TPA_STOP even if new skb allocation - fails. */ -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, DMA_FROM_DEVICE); -#else - pci_unmap_single(bp->pdev, pci_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, PCI_DMA_FROMDEVICE); -#endif - - if (likely(new_skb)) { - /* fix ip xsum and give it to the stack */ - /* (no need to map the new skb) */ - - prefetch(skb); - prefetch(((char *)(skb)) + L1_CACHE_BYTES); - -#ifdef BNX2X_STOP_ON_ERROR - if (pad + len > bp->rx_buf_size) { - BNX2X_ERR("skb_put is about to fail... " - "pad %d len %d rx_buf_size %d\n", - pad, len, bp->rx_buf_size); - bnx2x_panic(); - return; - } -#endif - - skb_reserve(skb, pad); - skb_put(skb, len); - - skb->protocol = eth_type_trans(skb, bp->dev); - skb->ip_summed = CHECKSUM_UNNECESSARY; - - if (!bnx2x_fill_frag_skb(bp, fp, skb, - &cqe->fast_path_cqe, cqe_idx)) { -#ifdef BCM_VLAN - if ((bp->vlgrp != NULL) && - (le16_to_cpu(cqe->fast_path_cqe. - pars_flags.flags) & PARSING_FLAGS_VLAN)) - vlan_gro_receive(&fp->napi, bp->vlgrp, - le16_to_cpu(cqe->fast_path_cqe. - vlan_tag), skb); - else -#endif - napi_gro_receive(&fp->napi, skb); - } else { - DP(NETIF_MSG_RX_STATUS, "Failed to allocate new pages" - " - dropping packet!\n"); - dev_kfree_skb(skb); - } - -#if (LINUX_VERSION_CODE < 0x02061b) /* ! BNX2X_UPSTREAM */ - bp->dev->last_rx = jiffies; -#endif - - /* put new skb in bin */ - fp->tpa_pool[queue].skb = new_skb; - - } else { - /* else drop the packet and keep the buffer in the bin */ - DP(NETIF_MSG_RX_STATUS, - "Failed to allocate new skb - dropping packet!\n"); - fp->eth_q_stats.rx_skb_alloc_failed++; - } - - fp->tpa_state[queue] = BNX2X_TPA_STOP; -} -#endif - -static inline void bnx2x_set_skb_rxhash(struct bnx2x *bp, union eth_rx_cqe *cqe, - struct sk_buff *skb) -{ -#if (LINUX_VERSION_CODE > 0x020622) /* BNX2X_UPSTREAM */ - /* Set Toeplitz hash from CQE */ - if ((bp->dev->features & NETIF_F_RXHASH) && - (cqe->fast_path_cqe.status_flags & - ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG)) - skb->rxhash = - le32_to_cpu(cqe->fast_path_cqe.rss_hash_result); -#endif -} - - -int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget) -{ - struct bnx2x *bp = fp->bp; - u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons; - u16 hw_comp_cons, sw_comp_cons, sw_comp_prod; - int rx_pkt = 0; - -#ifdef BNX2X_STOP_ON_ERROR - if (unlikely(bp->panic)) - return 0; -#endif - - /* CQ "next element" is of the size of the regular element, - that's why it's ok here */ - hw_comp_cons = le16_to_cpu(*fp->rx_cons_sb); - if ((hw_comp_cons & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT) - hw_comp_cons++; - - bd_cons = fp->rx_bd_cons; - bd_prod = fp->rx_bd_prod; - bd_prod_fw = bd_prod; - sw_comp_cons = fp->rx_comp_cons; - sw_comp_prod = fp->rx_comp_prod; - - /* Memory barrier necessary as speculative reads of the rx - * buffer can be ahead of the index in the status block - */ - rmb(); - - DP(NETIF_MSG_RX_STATUS, - "queue[%d]: hw_comp_cons %u sw_comp_cons %u\n", - fp->index, hw_comp_cons, sw_comp_cons); - - while (sw_comp_cons != hw_comp_cons) { - struct sw_rx_bd *rx_buf = NULL; - struct sk_buff *skb; - union eth_rx_cqe *cqe; - u8 cqe_fp_flags; - u16 len, pad; - - comp_ring_cons = RCQ_BD(sw_comp_cons); - bd_prod = RX_BD(bd_prod); - bd_cons = RX_BD(bd_cons); - - /* Prefetch the page containing the BD descriptor - at producer's index. It will be needed when new skb is - allocated */ - prefetch((void *)(PAGE_ALIGN((unsigned long) - (&fp->rx_desc_ring[bd_prod])) - - PAGE_SIZE + 1)); - - cqe = &fp->rx_comp_ring[comp_ring_cons]; - cqe_fp_flags = cqe->fast_path_cqe.type_error_flags; - - DP(NETIF_MSG_RX_STATUS, "CQE type %x err %x status %x" - " queue %x vlan %x len %u\n", CQE_TYPE(cqe_fp_flags), - cqe_fp_flags, cqe->fast_path_cqe.status_flags, - le32_to_cpu(cqe->fast_path_cqe.rss_hash_result), - le16_to_cpu(cqe->fast_path_cqe.vlan_tag), - le16_to_cpu(cqe->fast_path_cqe.pkt_len)); - - /* is this a slowpath msg? */ - if (unlikely(CQE_TYPE(cqe_fp_flags))) { - bnx2x_sp_event(fp, cqe); - goto next_cqe; - - /* this is an rx packet */ - } else { - rx_buf = &fp->rx_buf_ring[bd_cons]; - skb = rx_buf->skb; - prefetch(skb); - len = le16_to_cpu(cqe->fast_path_cqe.pkt_len); - pad = cqe->fast_path_cqe.placement_offset; - -#if !defined(__NO_TPA__) /* BNX2X_UPSTREAM */ - /* If CQE is marked both TPA_START and TPA_END - it is a non-TPA CQE */ - if ((!fp->disable_tpa) && - (TPA_TYPE(cqe_fp_flags) != - (TPA_TYPE_START | TPA_TYPE_END))) { - u16 queue = cqe->fast_path_cqe.queue_index; - - if (TPA_TYPE(cqe_fp_flags) == TPA_TYPE_START) { - DP(NETIF_MSG_RX_STATUS, - "calling tpa_start on queue %d\n", - queue); - - bnx2x_tpa_start(fp, queue, skb, - bd_cons, bd_prod); - - /* Set Toeplitz hash for LRO skb */ - bnx2x_set_skb_rxhash(bp, cqe, skb); - - goto next_rx; - } - - if (TPA_TYPE(cqe_fp_flags) == TPA_TYPE_END) { - DP(NETIF_MSG_RX_STATUS, - "calling tpa_stop on queue %d\n", - queue); - - if (!BNX2X_RX_SUM_FIX(cqe)) - BNX2X_ERR("STOP on none TCP " - "data\n"); - - /* This is a size of the linear data - on this skb */ - len = le16_to_cpu(cqe->fast_path_cqe. - len_on_bd); - bnx2x_tpa_stop(bp, fp, queue, pad, - len, cqe, comp_ring_cons); -#ifdef BNX2X_STOP_ON_ERROR - if (bp->panic) - return 0; -#endif - - bnx2x_update_sge_prod(fp, - &cqe->fast_path_cqe); - goto next_cqe; - } - } -#endif - -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_sync_single_for_device(&bp->pdev->dev, - dma_unmap_addr(rx_buf, mapping), - pad + RX_COPY_THRESH, - DMA_FROM_DEVICE); -#else - pci_dma_sync_single_for_device(bp->pdev, - pci_unmap_addr(rx_buf, mapping), - pad + RX_COPY_THRESH, - PCI_DMA_FROMDEVICE); -#endif - prefetch(((char *)(skb)) + L1_CACHE_BYTES); - - /* is this an error packet? */ - if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) { - DP(NETIF_MSG_RX_ERR, - "ERROR flags %x rx packet %u\n", - cqe_fp_flags, sw_comp_cons); - fp->eth_q_stats.rx_err_discard_pkt++; - goto reuse_rx; - } - - /* Since we don't have a jumbo ring - * copy small packets if mtu > 1500 - */ - if ((bp->dev->mtu > ETH_MAX_PACKET_SIZE) && - (len <= RX_COPY_THRESH)) { - struct sk_buff *new_skb; - - new_skb = netdev_alloc_skb(bp->dev, - len + pad); - if (new_skb == NULL) { - DP(NETIF_MSG_RX_ERR, - "ERROR packet dropped " - "because of alloc failure\n"); - fp->eth_q_stats.rx_skb_alloc_failed++; - goto reuse_rx; - } - - /* aligned copy */ - skb_copy_from_linear_data_offset(skb, pad, - new_skb->data + pad, len); - skb_reserve(new_skb, pad); - skb_put(new_skb, len); - - bnx2x_reuse_rx_skb(fp, bd_cons, bd_prod); - - skb = new_skb; - - } else - if (likely(bnx2x_alloc_rx_skb(bp, fp, bd_prod) == 0)) { -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_single(&bp->pdev->dev, - dma_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, - DMA_FROM_DEVICE); -#else - pci_unmap_single(bp->pdev, - pci_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, - PCI_DMA_FROMDEVICE); -#endif - skb_reserve(skb, pad); - skb_put(skb, len); - - } else { - DP(NETIF_MSG_RX_ERR, - "ERROR packet dropped because " - "of alloc failure\n"); - fp->eth_q_stats.rx_skb_alloc_failed++; -reuse_rx: - bnx2x_reuse_rx_skb(fp, bd_cons, bd_prod); - goto next_rx; - } - - skb->protocol = eth_type_trans(skb, bp->dev); - - /* Set Toeplitz hash for a none-LRO skb */ - bnx2x_set_skb_rxhash(bp, cqe, skb); - - skb->ip_summed = CHECKSUM_NONE; - if (bp->rx_csum) { - if (likely(BNX2X_RX_CSUM_OK(cqe))) - skb->ip_summed = CHECKSUM_UNNECESSARY; - else - fp->eth_q_stats.hw_csum_err++; - } - } - - skb_record_rx_queue(skb, fp->index); - -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - vmknetddi_queueops_set_skb_queueid(skb, - VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(fp->index)); -#endif -#ifdef BCM_VLAN - if ((bp->vlgrp != NULL) && - (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) & - PARSING_FLAGS_VLAN)) - vlan_gro_receive(&fp->napi, bp->vlgrp, - le16_to_cpu(cqe->fast_path_cqe.vlan_tag), skb); - else -#endif - napi_gro_receive(&fp->napi, skb); - -#if (LINUX_VERSION_CODE < 0x02061b) /* ! BNX2X_UPSTREAM */ - bp->dev->last_rx = jiffies; -#endif - -next_rx: - rx_buf->skb = NULL; - - bd_cons = NEXT_RX_IDX(bd_cons); - bd_prod = NEXT_RX_IDX(bd_prod); - bd_prod_fw = NEXT_RX_IDX(bd_prod_fw); - rx_pkt++; -next_cqe: - sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod); - sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons); - - if (rx_pkt == budget) - break; - } /* while */ - - fp->rx_bd_cons = bd_cons; - fp->rx_bd_prod = bd_prod_fw; - fp->rx_comp_cons = sw_comp_cons; - fp->rx_comp_prod = sw_comp_prod; - - /* Update producers */ - bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod, - fp->rx_sge_prod); - - fp->rx_pkt += rx_pkt; - fp->rx_calls++; - - return rx_pkt; -} - -#ifdef BCM_CNIC -#if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) -irqreturn_t bnx2x_msix_cnic_int(int irq, void *fp_cookie, - struct pt_regs *regs) -#else /* BNX2X_UPSTREAM */ -irqreturn_t bnx2x_msix_cnic_int(int irq, void *fp_cookie) -#endif -{ - struct bnx2x_fastpath *fp = fp_cookie; - struct bnx2x *bp = fp->bp; - - bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0); - - bnx2x_update_fpsb_idx(fp); - - DP(BNX2X_MSG_FP,"Update index to %d\n",fp->fp_hc_idx); - bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, - le16_to_cpu(fp->fp_hc_idx), - IGU_INT_ENABLE, 1); - - return IRQ_HANDLED; -} -#endif - -#if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) -irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie, - struct pt_regs *regs) -#else /* BNX2X_UPSTREAM */ -irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie) -#endif -{ - struct bnx2x_fastpath *fp = fp_cookie; - struct bnx2x *bp = fp->bp; - - /* Return here if interrupt is disabled */ - if (unlikely(atomic_read(&bp->intr_sem) != 0)) { - DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n"); - return IRQ_HANDLED; - } - - DP(BNX2X_MSG_FP, "got an MSI-X interrupt on IDX:SB " - "[fp %d fw_sd %d igusb %d]\n", - fp->index, fp->fw_sb_id, fp->igu_sb_id); - bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0); -#ifdef BNX2X_STOP_ON_ERROR - if (unlikely(bp->panic)) - return IRQ_HANDLED; -#endif - - prefetch(fp->rx_cons_sb); - prefetch(fp->tx_cons_sb); - prefetch(&fp->sb_running_index[SM_RX_ID]); -#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ - napi_schedule(&bnx2x_fp(bp, fp->index, napi)); -#else - napi_schedule(&bnx2x_fp(bp, fp->index, dummy_netdev)); -#endif - - - return IRQ_HANDLED; -} - - -/** - * Fill in a MAC address the way the FW likes it - * - * @param fw_hi - * @param fw_mid - * @param fw_lo - * @param mac - */ -static inline void -bnx2x_set_fw_mac_addr(u16 *fw_hi, u16 *fw_mid, u16 *fw_lo, u8 *mac) -{ - ((u8 *)fw_hi)[0] = mac[1]; - ((u8 *)fw_hi)[1] = mac[0]; - ((u8 *)fw_mid)[0] = mac[3]; - ((u8 *)fw_mid)[1] = mac[2]; - ((u8 *)fw_lo)[0] = mac[5]; - ((u8 *)fw_lo)[1] = mac[4]; -} - - -#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ -/* we split the first BD into headers and data BDs - * to ease the pain of our fellow microcode engineers - * we use one mapping for both BDs - * So far this has only been observed to happen - * in Other Operating Systems(TM) - */ -static noinline u16 bnx2x_tx_split(struct bnx2x *bp, - struct bnx2x_fastpath *fp, - struct sw_tx_bd *tx_buf, - struct eth_tx_start_bd **tx_bd, u16 hlen, - u16 bd_prod, int nbd) -{ - struct eth_tx_start_bd *h_tx_bd = *tx_bd; - struct eth_tx_bd *d_tx_bd; - dma_addr_t mapping; - int old_len = le16_to_cpu(h_tx_bd->nbytes); - - /* first fix first BD */ - h_tx_bd->nbd = cpu_to_le16(nbd); - h_tx_bd->nbytes = cpu_to_le16(hlen); - - DP(NETIF_MSG_TX_QUEUED, "TSO split header size is %d " - "(%x:%x) nbd %d\n", h_tx_bd->nbytes, h_tx_bd->addr_hi, - h_tx_bd->addr_lo, h_tx_bd->nbd); - - /* now get a new data BD - * (after the pbd) and fill it */ - bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); - d_tx_bd = &fp->tx_desc_ring[bd_prod].reg_bd; - - mapping = HILO_U64(le32_to_cpu(h_tx_bd->addr_hi), - le32_to_cpu(h_tx_bd->addr_lo)) + hlen; - - d_tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - d_tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - d_tx_bd->nbytes = cpu_to_le16(old_len - hlen); - - /* this marks the BD as one that has no individual mapping */ - tx_buf->flags |= BNX2X_TSO_SPLIT_BD; - - DP(NETIF_MSG_TX_QUEUED, - "TSO split data size is %d (%x:%x)\n", - d_tx_bd->nbytes, d_tx_bd->addr_hi, d_tx_bd->addr_lo); - - /* update tx_bd */ - *tx_bd = (struct eth_tx_start_bd *)d_tx_bd; - - return bd_prod; -} -#endif - -static inline u16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix) -{ - if (fix > 0) - csum = (u16) ~csum_fold(csum_sub(csum, - csum_partial(t_header - fix, fix, 0))); - - else if (fix < 0) - csum = (u16) ~csum_fold(csum_add(csum, - csum_partial(t_header, -fix, 0))); - - return swab16(csum); -} - -#if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3) -/* check if packet requires linearization (packet is too fragmented) - no need to check fragmentation if page size > 8K (there will be no - violation to FW restrictions) */ -static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb, - u32 xmit_type) -{ - int to_copy = 0; - int hlen = 0; - int first_bd_sz = 0; - - /* 3 = 1 (for linear data BD) + 2 (for PBD and last BD) */ - if (skb_shinfo(skb)->nr_frags >= (MAX_FETCH_BD - 3)) { - - if (xmit_type & XMIT_GSO) { -#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ - unsigned short lso_mss = skb_shinfo(skb)->gso_size; - /* Check if LSO packet needs to be copied: - 3 = 1 (for headers BD) + 2 (for PBD and last BD) */ - int wnd_size = MAX_FETCH_BD - 3; - /* Number of windows to check */ - int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size; - int wnd_idx = 0; - int frag_idx = 0; - u32 wnd_sum = 0; - - /* Headers length */ - hlen = (int)(skb_transport_header(skb) - skb->data) + - tcp_hdrlen(skb); - - /* Amount of data (w/o headers) on linear part of SKB*/ - first_bd_sz = skb_headlen(skb) - hlen; - - wnd_sum = first_bd_sz; - - /* Calculate the first sum - it's special */ - for (frag_idx = 0; frag_idx < wnd_size - 1; frag_idx++) - wnd_sum += - skb_shinfo(skb)->frags[frag_idx].size; - - /* If there was data on linear skb data - check it */ - if (first_bd_sz > 0) { - if (unlikely(wnd_sum < lso_mss)) { - to_copy = 1; - goto exit_lbl; - } - - wnd_sum -= first_bd_sz; - } - - /* Others are easier: run through the frag list and - check all windows */ - for (wnd_idx = 0; wnd_idx <= num_wnds; wnd_idx++) { - wnd_sum += - skb_shinfo(skb)->frags[wnd_idx + wnd_size - 1].size; - - if (unlikely(wnd_sum < lso_mss)) { - to_copy = 1; - break; - } - wnd_sum -= - skb_shinfo(skb)->frags[wnd_idx].size; - } -#endif - } else { - /* in non-LSO too fragmented packet should always - be linearized */ - to_copy = 1; - } - } - -#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ -exit_lbl: -#endif - if (unlikely(to_copy)) - DP(NETIF_MSG_TX_QUEUED, - "Linearization IS REQUIRED for %s packet. " - "num_frags %d hlen %d first_bd_sz %d\n", - (xmit_type & XMIT_GSO) ? "LSO" : "non-LSO", - skb_shinfo(skb)->nr_frags, hlen, first_bd_sz); - - return to_copy; -} -#endif - -#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ -static inline void bnx2x_set_pbd_gso_e2(struct sk_buff *skb, - struct eth_tx_parse_bd_e2 *pbd, - u32 xmit_type) -{ - pbd->parsing_data |= cpu_to_le16(skb_shinfo(skb)->gso_size) << - ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT; - if ((xmit_type & XMIT_GSO_V6) && - (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) - pbd->parsing_data |= ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR; -} - -/** - * Update PBD in GSO case. - * - * @param skb - * @param tx_start_bd - * @param pbd - * @param xmit_type - */ -static inline void bnx2x_set_pbd_gso(struct sk_buff *skb, - struct eth_tx_parse_bd_e1x *pbd, - u32 xmit_type) -{ - pbd->lso_mss = cpu_to_le16(skb_shinfo(skb)->gso_size); - pbd->tcp_send_seq = swab32(tcp_hdr(skb)->seq); - pbd->tcp_flags = pbd_tcp_flags(skb); - - if (xmit_type & XMIT_GSO_V4) { - pbd->ip_id = swab16(ip_hdr(skb)->id); - pbd->tcp_pseudo_csum = - swab16(~csum_tcpudp_magic(ip_hdr(skb)->saddr, - ip_hdr(skb)->daddr, - 0, IPPROTO_TCP, 0)); - - } else - pbd->tcp_pseudo_csum = - swab16(~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, - &ipv6_hdr(skb)->daddr, - 0, IPPROTO_TCP, 0)); - - pbd->global_data |= ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN; -} -#endif /* NETIF_F_TSO */ - -static inline u8 bnx2x_get_hlen_csum_tcp(struct sk_buff *skb) -{ - return skb_transport_header(skb) + tcp_hdrlen(skb) - skb->data; -} - -static inline u8 bnx2x_get_hlen_csum_udp(struct sk_buff *skb) -{ - return skb_transport_header(skb) + sizeof(struct udphdr) - skb->data; -} - -/** - * - * @param skb - * @param tx_start_bd - * @param pbd_e2 - * @param xmit_type - * - * @return header len - */ -static inline u8 bnx2x_set_pbd_csum_e2(struct bnx2x *bp, struct sk_buff *skb, - struct eth_tx_parse_bd_e2 *pbd, - u32 xmit_type) -{ - pbd->parsing_data |= cpu_to_le16(((u8 *)skb_transport_header(skb) - - skb->data) / 2) << - ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT; - - if (xmit_type & XMIT_CSUM_TCP) { - pbd->parsing_data |= cpu_to_le16(tcp_hdrlen(skb)/4) << - ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT; - - return bnx2x_get_hlen_csum_tcp(skb); - } else - /* no need to pass the UDP header length - it's a constant */ - return bnx2x_get_hlen_csum_udp(skb); -} - -static inline void bnx2x_set_sbd_csum(struct bnx2x *bp, struct sk_buff *skb, - struct eth_tx_start_bd *tx_start_bd, u32 xmit_type) -{ - - tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM; - - if (xmit_type & XMIT_CSUM_V4) - tx_start_bd->bd_flags.as_bitfield |= - ETH_TX_BD_FLAGS_IP_CSUM; - else - tx_start_bd->bd_flags.as_bitfield |= - ETH_TX_BD_FLAGS_IPV6; - - if (!(xmit_type & XMIT_CSUM_TCP)) - tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IS_UDP; - -} - - -/** - * - * @param skb - * @param tx_start_bd - * @param pbd - * @param xmit_type - * - * @return Header length - */ -static inline u8 bnx2x_set_pbd_csum(struct bnx2x *bp, struct sk_buff *skb, - struct eth_tx_parse_bd_e1x *pbd, - u32 xmit_type) -{ - u8 hlen = (skb_network_header(skb) - skb->data) / 2; - - /* for now NS flag is not used in Linux */ - pbd->global_data = - (hlen | ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) << - ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT)); - - pbd->ip_hlen_w = (skb_transport_header(skb) - - skb_network_header(skb)) / 2; - - hlen += pbd->ip_hlen_w; - - /* We support checksum offload for TCP and UDP only */ - if (xmit_type & XMIT_CSUM_TCP) - hlen += tcp_hdrlen(skb) / 2; - else - hlen += sizeof(struct udphdr) / 2; - - pbd->total_hlen_w = cpu_to_le16(hlen); - hlen = hlen*2; - - if (xmit_type & XMIT_CSUM_TCP) { - pbd->tcp_pseudo_csum = swab16(tcp_hdr(skb)->check); - - } else { - s8 fix = SKB_CS_OFF(skb); /* signed! */ - - DP(NETIF_MSG_TX_QUEUED, - "hlen %d fix %d csum before fix %x\n", - le16_to_cpu(pbd->total_hlen_w), fix, SKB_CS(skb)); - - /* HW bug: fixup the CSUM */ - pbd->tcp_pseudo_csum = - bnx2x_csum_fix(skb_transport_header(skb), - SKB_CS(skb), fix); - - DP(NETIF_MSG_TX_QUEUED, "csum after fix %x\n", - pbd->tcp_pseudo_csum); - } - - return hlen; -} - -static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb) -{ - u32 rc; - - if (skb->ip_summed != CHECKSUM_PARTIAL) - rc = XMIT_PLAIN; - - else { - if (skb->protocol == htons(ETH_P_IPV6)) { - rc = XMIT_CSUM_V6; - if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) - rc |= XMIT_CSUM_TCP; - - } else { - rc = XMIT_CSUM_V4; - if (ip_hdr(skb)->protocol == IPPROTO_TCP) - rc |= XMIT_CSUM_TCP; - } - } - -#ifdef NETIF_F_GSO /* BNX2X_UPSTREAM */ - if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) - rc |= (XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP); - -#ifdef NETIF_F_TSO6 /* BNX2X_UPSTREAM */ - else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) - rc |= (XMIT_GSO_V6 | XMIT_CSUM_TCP | XMIT_CSUM_V6); -#endif -#elif defined(NETIF_F_TSO) /* ! BNX2X_UPSTREAM */ - if (skb_shinfo(skb)->gso_size) - rc |= (XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP); -#endif - - return rc; -} - -/* called with netif_tx_lock - * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call - * netif_wake_queue() - */ -int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - struct bnx2x_fastpath *fp; -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - struct netdev_queue *txq; -#endif - struct sw_tx_bd *tx_buf; - struct eth_tx_start_bd *tx_start_bd; - struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL; - struct eth_tx_parse_bd_e1x *pbd_e1x = NULL; - struct eth_tx_parse_bd_e2 *pbd_e2 = NULL; - u16 pkt_prod, bd_prod; - int nbd, fp_index; - dma_addr_t mapping; - u32 xmit_type = bnx2x_xmit_type(bp, skb); - int i; - u8 hlen = 0; - __le16 pkt_size = 0; - struct ethhdr *eth; - u8 mac_type = UNICAST_ADDRESS; - -#ifdef BNX2X_STOP_ON_ERROR - if (unlikely(bp->panic)) - return NETDEV_TX_BUSY; -#endif - -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - VMK_ASSERT(skb->queue_mapping <= BNX2X_NUM_NETQUEUES(bp)); - fp_index = skb->queue_mapping; - txq = netdev_get_tx_queue(dev, fp_index); -#else -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - fp_index = skb_get_queue_mapping(skb); - txq = netdev_get_tx_queue(dev, fp_index); -#else - fp_index = 0; -#endif -#endif - - fp = &bp->fp[fp_index]; - - if (unlikely(bnx2x_tx_avail(fp) < (skb_shinfo(skb)->nr_frags + 3))) { - fp->eth_q_stats.driver_xoff++; -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - netif_tx_stop_queue(txq); -#else - netif_stop_queue(dev); -#endif - BNX2X_ERR("BUG! Tx ring full when queue awake!\n"); - return NETDEV_TX_BUSY; - } - -#ifdef NETIF_F_GSO /* BNX2X_UPSTREAM */ - DP(NETIF_MSG_TX_QUEUED, "queue[%d]: SKB: summed %x protocol %x " - "protocol(%x,%x) gso type %x xmit_type %x\n", - fp_index, skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr, - ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type); -#endif - - eth = (struct ethhdr*)skb->data; - - /* set flag according to packet type (UNICAST_ADDRESS is default)*/ - if (unlikely(is_multicast_ether_addr(eth->h_dest))) { - if (is_broadcast_ether_addr(eth->h_dest)) - mac_type = BROADCAST_ADDRESS; - else - mac_type = MULTICAST_ADDRESS; - } - -#if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3) - /* First, check if we need to linearize the skb (due to FW - restrictions). No need to check fragmentation if page size > 8K - (there will be no violation to FW restrictions) */ - if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) { - /* Statistics of linearization */ - bp->lin_cnt++; -#if (LINUX_VERSION_CODE > 0x020611) || defined(SLE_VERSION_CODE) /* BNX2X_UPSTREAM */ - if (skb_linearize(skb) != 0) { -#else - if (skb_linearize(skb, GFP_ATOMIC) != 0) { -#endif - DP(NETIF_MSG_TX_QUEUED, "SKB linearization failed - " - "silently dropping this SKB\n"); - dev_kfree_skb(skb); - return NETDEV_TX_OK; - } - } -#endif - - /* - Please read carefully. First we use one BD which we mark as start, - then we have a parsing info BD (used for TSO or xsum), - and only then we have the rest of the TSO BDs. - (don't forget to mark the last one as last, - and to unmap only AFTER you write to the BD ...) - And above all, all pdb sizes are in words - NOT DWORDS! - */ - - pkt_prod = fp->tx_pkt_prod++; - bd_prod = TX_BD(fp->tx_bd_prod); - - /* get a tx_buf and first BD */ - tx_buf = &fp->tx_buf_ring[TX_BD(pkt_prod)]; - tx_start_bd = &fp->tx_desc_ring[bd_prod].start_bd; - - tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; - SET_FLAG(tx_start_bd->general_data, - ETH_TX_START_BD_ETH_ADDR_TYPE, - mac_type); - /* header nbd */ - SET_FLAG(tx_start_bd->general_data, - ETH_TX_START_BD_HDR_NBDS, - 1); - - /* remember the first BD of the packet */ - tx_buf->first_bd = fp->tx_bd_prod; - tx_buf->skb = skb; - tx_buf->flags = 0; - - DP(NETIF_MSG_TX_QUEUED, - "sending pkt %u @%p next_idx %u bd %u @%p\n", - pkt_prod, tx_buf, fp->tx_pkt_prod, bd_prod, tx_start_bd); - -#ifdef BCM_VLAN - if ((bp->vlgrp != NULL) && vlan_tx_tag_present(skb)) { - tx_start_bd->vlan_or_ethertype = cpu_to_le16(vlan_tx_tag_get(skb)); - tx_start_bd->bd_flags.as_bitfield |= - (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT); - } else -#endif - tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod); - - /* turn on parsing and get a BD */ - bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); - - if (xmit_type & XMIT_CSUM) - bnx2x_set_sbd_csum(bp, skb,tx_start_bd, xmit_type); - - if (CHIP_IS_E2(bp)){ - pbd_e2 = &fp->tx_desc_ring[bd_prod].parse_bd_e2; - memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2)); - /* Set PBD in checksum offload case */ - if (xmit_type & XMIT_CSUM) - hlen = bnx2x_set_pbd_csum_e2(bp, skb, pbd_e2, xmit_type); -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - /* fill in the MAC addresses in the PBD - for local switching */ - bnx2x_set_fw_mac_addr(&pbd_e2->src_mac_addr_hi, - &pbd_e2->src_mac_addr_mid, - &pbd_e2->src_mac_addr_lo, - eth->h_source); - bnx2x_set_fw_mac_addr(&pbd_e2->dst_mac_addr_hi, - &pbd_e2->dst_mac_addr_mid, - &pbd_e2->dst_mac_addr_lo, - eth->h_dest); -#endif - } else { - pbd_e1x = &fp->tx_desc_ring[bd_prod].parse_bd_e1x; - memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x)); - /* Set PBD in checksum offload case */ - if (xmit_type & XMIT_CSUM) - hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type); - - } - - /* Map skb linear data for DMA */ -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - mapping = dma_map_single(&bp->pdev->dev, skb->data, - skb_headlen(skb), DMA_TO_DEVICE); -#else - mapping = pci_map_single(bp->pdev, skb->data, - skb_headlen(skb), PCI_DMA_TODEVICE); -#endif - - /* Setup the data pointer of the first BD of the packet */ - tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - nbd = skb_shinfo(skb)->nr_frags + 2; /* start_bd + pbd + frags */ - tx_start_bd->nbd = cpu_to_le16(nbd); - tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb)); - pkt_size = tx_start_bd->nbytes; - - DP(NETIF_MSG_TX_QUEUED, "first bd @%p addr (%x:%x) nbd %d" - " nbytes %d flags %x vlan %x\n", - tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo, - le16_to_cpu(tx_start_bd->nbd), le16_to_cpu(tx_start_bd->nbytes), - tx_start_bd->bd_flags.as_bitfield, le16_to_cpu(tx_start_bd->vlan_or_ethertype)); - -#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ - if (xmit_type & XMIT_GSO) { - - DP(NETIF_MSG_TX_QUEUED, - "TSO packet len %d hlen %d total len %d tso size %d\n", - skb->len, hlen, skb_headlen(skb), - skb_shinfo(skb)->gso_size); - - tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO; - - if (unlikely(skb_headlen(skb) > hlen)) - bd_prod = bnx2x_tx_split(bp, fp, tx_buf, &tx_start_bd, - hlen, bd_prod, ++nbd); - if (CHIP_IS_E2(bp)) - bnx2x_set_pbd_gso_e2(skb, pbd_e2, xmit_type); - else - bnx2x_set_pbd_gso(skb, pbd_e1x, xmit_type); - } -#endif - tx_data_bd = (struct eth_tx_bd *)tx_start_bd; - - /* Handle fragmented skb */ - for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { - skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; - - bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); - tx_data_bd = &fp->tx_desc_ring[bd_prod].reg_bd; - if (total_pkt_bd == NULL) - total_pkt_bd = &fp->tx_desc_ring[bd_prod].reg_bd; - -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - mapping = dma_map_page(&bp->pdev->dev, frag->page, frag->page_offset, - frag->size, DMA_TO_DEVICE); -#else - mapping = pci_map_page(bp->pdev, frag->page, frag->page_offset, - frag->size, PCI_DMA_TODEVICE); -#endif - - tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - tx_data_bd->nbytes = cpu_to_le16(frag->size); - le16_add_cpu(&pkt_size, frag->size); - - DP(NETIF_MSG_TX_QUEUED, - "frag %d bd @%p addr (%x:%x) nbytes %d\n", - i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo, - le16_to_cpu(tx_data_bd->nbytes)); - } - - DP(NETIF_MSG_TX_QUEUED, "last bd @%p\n", tx_data_bd); - - bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); - - /* now send a tx doorbell, counting the next BD - * if the packet contains or ends with it - */ - if (TX_BD_POFF(bd_prod) < nbd) - nbd++; - - if (total_pkt_bd != NULL) - total_pkt_bd->total_pkt_bytes = pkt_size; - - if (pbd_e1x) - DP(NETIF_MSG_TX_QUEUED, - "PBD (E1X) @%p ip_data %x ip_hlen %u ip_id %u lso_mss %u" - " tcp_flags %x xsum %x seq %u hlen %u\n", - pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w, - pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags, - pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq, - le16_to_cpu(pbd_e1x->total_hlen_w)); - if (pbd_e2) - DP(NETIF_MSG_TX_QUEUED, - "PBD (E2) @%p dst %x %x %x src %x %x %x parsing_data %x\n", - pbd_e2, pbd_e2->dst_mac_addr_hi, pbd_e2->dst_mac_addr_mid, - pbd_e2->dst_mac_addr_lo, pbd_e2->src_mac_addr_hi, - pbd_e2->src_mac_addr_mid, pbd_e2->src_mac_addr_lo, - pbd_e2->parsing_data); - DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d bd %u\n", nbd, bd_prod); - - /* - * Make sure that the BD data is updated before updating the producer - * since FW might read the BD right after the producer is updated. - * This is only applicable for weak-ordered memory model archs such - * as IA-64. The following barrier is also mandatory since FW will - * assumes packets must have BDs. - */ - wmb(); - - fp->tx_db.data.prod += nbd; - barrier(); - - DOORBELL(bp, fp->cid, fp->tx_db.raw); - - mmiowb(); - - fp->tx_bd_prod += nbd; -#if (LINUX_VERSION_CODE < 0x02061f) /* ! BNX2X_UPSTREAM */ - /* In kernels starting from 2.6.31 netdev layer does this */ - dev->trans_start = jiffies; -#endif - - if (unlikely(bnx2x_tx_avail(fp) < MAX_SKB_FRAGS + 3)) { -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - netif_tx_stop_queue(txq); -#else - netif_stop_queue(dev); -#endif - /* paired memory barrier is in bnx2x_tx_int(), we have to keep - * ordering of set_bit() in netif_tx_stop_queue() and read of - * fp->bd_tx_cons */ - smp_mb(); - - fp->eth_q_stats.driver_xoff++; - if (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3) -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - netif_tx_wake_queue(txq); -#else - netif_wake_queue(dev); -#endif - } - fp->tx_pkt++; - - return NETDEV_TX_OK; -} - -/* called with rtnl_lock */ -int bnx2x_change_mac_addr(struct net_device *dev, void *p) -{ - struct sockaddr *addr = p; - struct bnx2x *bp = netdev_priv(dev); - - if (!is_valid_ether_addr((u8 *)(addr->sa_data))) - return -EINVAL; - - memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); - if (netif_running(dev)) - bnx2x_set_eth_mac(bp, 1); - - return 0; -} - - -#if defined(BNX2X_NEW_NAPI) /* BNX2X_UPSTREAM */ -int bnx2x_poll(struct napi_struct *napi, int budget) -#else -int bnx2x_poll(struct net_device *dev, int *budget) -#endif -{ - int work_done = 0; -#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ - struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath, - napi); - struct bnx2x *bp = fp->bp; -#else /* ! BNX2X_UPSTREAM */ - struct bnx2x_fastpath *fp = dev->priv; - struct bnx2x *bp = fp->bp; - int orig_budget = min(*budget, dev->quota); -#endif - - while (1) { -#ifdef BNX2X_STOP_ON_ERROR - if (unlikely(bp->panic)) { - napi_complete(napi); - return 0; - } -#endif - -#ifndef BNX2X_MULTI_QUEUE /* ! BNX2X_UPSTREAM */ - /* There is only one Tx queue on kernels 2.6.26 and below */ - if (fp->index == 0) -#endif - if (bnx2x_has_tx_work(fp)) - bnx2x_tx_int(fp); - - if (bnx2x_has_rx_work(fp)) { -#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ - work_done += bnx2x_rx_int(fp, budget - work_done); - - /* must not complete if we consumed full budget */ - if (work_done >= budget) - break; -#else - work_done = bnx2x_rx_int(fp, orig_budget); - - *budget -= work_done; - dev->quota -= work_done; - orig_budget = min(*budget, dev->quota); - if (orig_budget <= 0) - break; -#endif - } - - /* Fall out from the NAPI loop if needed */ - if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) { -#ifdef BCM_CNIC - /* No need to update SB for FCoE L2 ring as long as it's - * connected to the default SB and the SB has been updated when - * NAPI was scheduled. - */ - if (IS_FCOE_FP(fp)) { - napi_complete(napi); -#ifndef BNX2X_NEW_NAPI - return 0; -#else /* BNX2X_UPSTREAM */ - break; -#endif - } -#endif - - bnx2x_update_fpsb_idx(fp); - /* bnx2x_has_rx_work() reads the status block, thus we need - * to ensure that status block indices have been actually read - * (bnx2x_update_fpsb_idx) prior to this check - * (bnx2x_has_rx_work) so that we won't write the "newer" - * value of the status block to IGU (if there was a DMA right - * after bnx2x_has_rx_work and if there is no rmb, the memory - * reading (bnx2x_update_fpsb_idx) may be postponed to right - * before bnx2x_ack_sb). In this case there will never be - * another interrupt until there is another update of the - * status block, while there is still unhandled work. - */ - rmb(); - - if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) { - napi_complete(napi); - /* Re-enable interrupts */ - DP(NETIF_MSG_HW, "Update index to %d\n",fp->fp_hc_idx); - bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, - le16_to_cpu(fp->fp_hc_idx), - IGU_INT_ENABLE, 1); - - -#ifndef BNX2X_NEW_NAPI - return 0; -#else /* BNX2X_UPSTREAM */ - break; -#endif - } - } - } - -#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ - return work_done; -#else - return 1; -#endif -} - - -/* end of fast path */ - - -static void bnx2x_free_rx_bds(struct bnx2x_fastpath *fp) -{ - struct bnx2x *bp = fp->bp; - int i; - - /* ring wasn't allocated */ - if (fp->rx_buf_ring == NULL) - return; - - for (i = 0; i < NUM_RX_BD; i++) { - struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[i]; - struct sk_buff *skb = rx_buf->skb; - - if (skb == NULL) - continue; -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_single(&bp->pdev->dev, - dma_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, DMA_FROM_DEVICE); -#else - pci_unmap_single(bp->pdev, - pci_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, PCI_DMA_FROMDEVICE); -#endif - - rx_buf->skb = NULL; - dev_kfree_skb(skb); - } -} - -static void bnx2x_free_fp_mem_at(struct bnx2x *bp, int fp_index) -{ - union host_hc_status_block *sb = &bnx2x_fp(bp, fp_index, status_blk); - struct bnx2x_fastpath *fp = &bp->fp[fp_index]; - - /* Common */ -#ifdef BCM_CNIC - /* OOO and Forwarding clients use CNIC status block - * FCoE client uses default status block - */ - if ((IS_OOO_IDX(fp_index) || - IS_FWD_IDX(fp_index) || - IS_FCOE_IDX(fp_index))) { - memset(sb, 0, sizeof(union host_hc_status_block)); - fp->status_blk_mapping = 0; - - } else { -#endif - /* status blocks */ - if (CHIP_IS_E2(bp)) - BNX2X_PCI_FREE(sb->e2_sb, - bnx2x_fp(bp, fp_index, - status_blk_mapping), - sizeof(struct host_hc_status_block_e2)); - else - BNX2X_PCI_FREE(sb->e1x_sb, - bnx2x_fp(bp, fp_index, - status_blk_mapping), - sizeof(struct host_hc_status_block_e1x)); -#ifdef BCM_CNIC - } -#endif - /* Rx */ - if (!skip_rx_queue(bp, fp_index)) { - bnx2x_free_rx_bds(fp); - - /* fastpath rx rings: rx_buf rx_desc rx_comp */ - BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_buf_ring)); - BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_desc_ring), - bnx2x_fp(bp, fp_index, rx_desc_mapping), - sizeof(struct eth_rx_bd) * NUM_RX_BD); - - BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_comp_ring), - bnx2x_fp(bp, fp_index, rx_comp_mapping), - sizeof(struct eth_fast_path_rx_cqe) * - NUM_RCQ_BD); - - /* SGE ring */ - BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_page_ring)); - BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_sge_ring), - bnx2x_fp(bp, fp_index, rx_sge_mapping), - BCM_PAGE_SIZE * NUM_RX_SGE_PAGES); - } - - /* Tx */ - if (!skip_tx_queue(bp, fp_index)) { - /* fastpath tx rings: tx_buf tx_desc */ - BNX2X_FREE(bnx2x_fp(bp, fp_index, tx_buf_ring)); - BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, tx_desc_ring), - bnx2x_fp(bp, fp_index, tx_desc_mapping), - sizeof(union eth_tx_bd_types) * NUM_TX_BD); - } - /* end of fastpath */ -} - -void bnx2x_free_fp_mem(struct bnx2x *bp) -{ - int i; - for_each_queue(bp, i) - bnx2x_free_fp_mem_at(bp, i); -} - -static inline void set_sb_shortcuts(struct bnx2x *bp, int index) { - union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk); - if (CHIP_IS_E2(bp)) { - bnx2x_fp(bp, index, sb_index_values) = - (__le16*)status_blk.e2_sb->sb.index_values; - bnx2x_fp(bp, index, sb_running_index) = - (__le16*)status_blk.e2_sb->sb.running_index; - } else { - bnx2x_fp(bp, index, sb_index_values) = - (__le16*)status_blk.e1x_sb->sb.index_values; - bnx2x_fp(bp, index, sb_running_index) = - (__le16*)status_blk.e1x_sb->sb.running_index; - } -} - -static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index) { - union host_hc_status_block *sb; - struct bnx2x_fastpath *fp = &bp->fp[index]; - int ring_size = 0; - - bnx2x_fp(bp, index, bp) = bp; - bnx2x_fp(bp, index, index) = index; - - /* Common */ - sb = &bnx2x_fp(bp, index, status_blk); -#ifdef BCM_CNIC - if (IS_OOO_IDX(index) || IS_FWD_IDX(index)) { - if (CHIP_IS_E2(bp)) - sb->e2_sb = bp->cnic_sb.e2_sb; - else - sb->e1x_sb = bp->cnic_sb.e1x_sb; - - bnx2x_fp(bp, index, status_blk_mapping) = - bp->cnic_sb_mapping; - } else if (!IS_FCOE_IDX(index)){ -#endif - /* status blocks */ - if (CHIP_IS_E2(bp)) - BNX2X_PCI_ALLOC(sb->e2_sb, - &bnx2x_fp(bp, index, status_blk_mapping), - sizeof(struct host_hc_status_block_e2)); - else - BNX2X_PCI_ALLOC(sb->e1x_sb, - &bnx2x_fp(bp, index, status_blk_mapping), - sizeof(struct host_hc_status_block_e1x)); -#ifdef BCM_CNIC - } -#endif - set_sb_shortcuts(bp, index); - - /* Tx */ - if(!skip_tx_queue(bp, index)) { - /* fastpath tx rings: tx_buf tx_desc */ - BNX2X_ALLOC(bnx2x_fp(bp, index, tx_buf_ring), - sizeof(struct sw_tx_bd) * NUM_TX_BD); - BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, tx_desc_ring), - &bnx2x_fp(bp, index, tx_desc_mapping), - sizeof(union eth_tx_bd_types) * NUM_TX_BD); - } - - /* Rx */ - if (!skip_rx_queue(bp, index)) { - /* fastpath rx rings: rx_buf rx_desc rx_comp */ - BNX2X_ALLOC(bnx2x_fp(bp, index, rx_buf_ring), - sizeof(struct sw_rx_bd) * NUM_RX_BD); - BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_desc_ring), - &bnx2x_fp(bp, index, rx_desc_mapping), - sizeof(struct eth_rx_bd) * NUM_RX_BD); - - BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_comp_ring), - &bnx2x_fp(bp, index, rx_comp_mapping), - sizeof(struct eth_fast_path_rx_cqe) * - NUM_RCQ_BD); - - /* SGE ring */ - BNX2X_ALLOC(bnx2x_fp(bp, index, rx_page_ring), - sizeof(struct sw_rx_page) * NUM_RX_SGE); - BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_sge_ring), - &bnx2x_fp(bp, index, rx_sge_mapping), - BCM_PAGE_SIZE * NUM_RX_SGE_PAGES); - /* RX BD ring */ - bnx2x_set_next_page_rx_bd(fp); - - /* CQ ring */ - bnx2x_set_next_page_rx_cq(fp); - - /* BDs */ -#ifdef BCM_CNIC - if (IS_OOO_FP(fp)) { - ring_size = bnx2x_alloc_ooo_rx_bd_ring(fp); - if (ring_size < min_t(int, - /* Delete me! For integration only! */ - min_t(int, - bp->tx_ring_size / 2, - 500), -/* min_t(int, - bp->tx_ring_size / 2, - bp->rx_ring_size), - */ - INIT_OOO_RING_SIZE)) - goto alloc_mem_err; - } else { -#endif - ring_size = bnx2x_alloc_rx_bds(fp, bp->rx_ring_size); - if (ring_size < bp->rx_ring_size) - goto alloc_mem_err; -#ifdef BCM_CNIC - } -#endif - } - - return 0; - -/* handles low memory cases */ -alloc_mem_err: - BNX2X_ERR("Unable to allocate full memory for queue %d (size %d)\n", - index, ring_size); - /* FW will drop all packets if queue is not big enough, - * In these cases we disable the queue - * Min size diferent for OOO, TPA and non-TPA queues - */ - if ((IS_OOO_IDX(index) && ring_size < MIN_RX_SIZE_OOO) || - (!IS_OOO_IDX(index) && - ring_size < (fp->disable_tpa ? - MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA))) { - /* release memory allocated for this queue */ - bnx2x_free_fp_mem_at(bp, index); - return -ENOMEM; - } - return 0; -} - - -int bnx2x_alloc_fp_mem(struct bnx2x *bp) -{ - int i; - - /** - * 1. Allocate FP for leading - fatal if error - * 2. {CNIC} Allocate FCoE FP - fatal if error - * 3. {CNIC} Allocate OOO + FWD - disable OOO if error - * 4. Allocate RSS - fix number of queues if error - */ - - /* leading */ - if (bnx2x_alloc_fp_mem_at(bp, 0)) - return -ENOMEM; -#ifdef BCM_CNIC - /* FCoE */ - if (bnx2x_alloc_fp_mem_at(bp, FCOE_IDX)) - return -ENOMEM; - - /* OOO + FWD */ - if (bnx2x_alloc_fp_mem_at(bp, OOO_IDX)) - bp->flags |= NO_ISCSI_OOO_FLAG; - else if (bnx2x_alloc_fp_mem_at(bp, FWD_IDX)) { - bnx2x_free_fp_mem_at(bp, OOO_IDX); - bp->flags |= NO_ISCSI_OOO_FLAG; - } -#endif - /* RSS */ - for_each_nondefault_eth_queue(bp, i) - if (bnx2x_alloc_fp_mem_at(bp, i)) - break; - - /* handle memory failures */ - if(i != BNX2X_NUM_ETH_QUEUES(bp)) { - int delta = BNX2X_NUM_ETH_QUEUES(bp) - i; -#ifdef BCM_CNIC - /** - * move non eth FPs next to last eth FP - * must be done in that order - * FCOE_IDX < FWD_IDX < OOO_IDX - */ - - /* move FCoE fp */ - bnx2x_move_fp(bp, FCOE_IDX, FCOE_IDX - delta); - /* move OOO and FWD - even NO_ISCSI_OOO_FLAG is on */ - bnx2x_move_fp(bp, FWD_IDX, FWD_IDX - delta); - bnx2x_move_fp(bp, OOO_IDX, OOO_IDX - delta); -#endif - bp->num_queues -= delta; - BNX2X_ERR("Adjusted num of queues from %d to %d\n", - bp->num_queues + delta, bp->num_queues); -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - bp->dev->real_num_tx_queues -= delta; -#endif - } - - return 0; -} - -static void bnx2x_free_tx_skbs(struct bnx2x *bp) -{ - int i; - - for_each_tx_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - - u16 bd_cons = fp->tx_bd_cons; - u16 sw_prod = fp->tx_pkt_prod; - u16 sw_cons = fp->tx_pkt_cons; - - while (sw_cons != sw_prod) { - bd_cons = bnx2x_free_tx_pkt(bp, fp, TX_BD(sw_cons)); - sw_cons++; - } - } -} - -void bnx2x_init_rx_rings(struct bnx2x *bp) -{ - int func = BP_FUNC(bp); - int max_agg_queues = CHIP_IS_E1(bp) ? ETH_MAX_AGGREGATION_QUEUES_E1 : - ETH_MAX_AGGREGATION_QUEUES_E1H; - u16 ring_prod; - int i, j; - - DP(NETIF_MSG_IFUP, - "mtu %d rx_buf_size %d\n", bp->dev->mtu, bp->rx_buf_size); - - /* Allocate TPA resources */ - for_each_rx_queue(bp, j) { - struct bnx2x_fastpath *fp = &bp->fp[j]; - - if (!fp->disable_tpa) { - /* Fill the per-aggregtion pool */ - for (i = 0; i < max_agg_queues; i++) { - fp->tpa_pool[i].skb = - netdev_alloc_skb(bp->dev, - bp->rx_buf_size); - if (!fp->tpa_pool[i].skb) { - BNX2X_ERR("Failed to allocate TPA " - "skb pool for queue[%d] - " - "disabling TPA on this " - "queue!\n", j); - bnx2x_free_tpa_pool(bp, fp, i); - fp->disable_tpa = 1; - break; - } -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_addr_set((struct sw_rx_bd *) -#else - pci_unmap_addr_set((struct sw_rx_bd *) -#endif - &bp->fp->tpa_pool[i], - mapping, 0); - fp->tpa_state[i] = BNX2X_TPA_STOP; - } - - /* "next page" elements initialization */ - bnx2x_set_next_page_sgl(fp); - - /* set SGEs bit mask */ - bnx2x_init_sge_ring_bit_mask(fp); - - /* Allocate SGEs and initialize the ring elements */ - for (i = 0, ring_prod = 0; - i < MAX_RX_SGE_CNT*NUM_RX_SGE_PAGES; i++) { - - if (bnx2x_alloc_rx_sge(bp, fp, ring_prod) < 0) { - BNX2X_ERR("was only able to allocate " - "%d rx sges\n", i); - BNX2X_ERR("disabling TPA for queue[%d]\n", j); - /* Cleanup already allocated elements */ - bnx2x_free_rx_sge_range(bp, fp, ring_prod); - bnx2x_free_tpa_pool(bp, fp, max_agg_queues); - fp->disable_tpa = 1; - ring_prod = 0; - break; - } - ring_prod = NEXT_SGE_IDX(ring_prod); - } - - fp->rx_sge_prod = ring_prod; - } - } - - for_each_rx_queue(bp, j) { - struct bnx2x_fastpath *fp = &bp->fp[j]; - - fp->rx_bd_cons = 0; - - /* Activate BD ring */ - /* Warning! - * this will generate an interrupt (to the TSTORM) - * must only be done after chip is initialized - */ -#ifdef BCM_CNIC - if (IS_OOO_FP(fp)) - bnx2x_update_ooo_prod(bp, fp, fp->rx_bd_prod, - fp->rx_comp_prod, - fp->rx_sge_prod); - else -#endif - bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod, - fp->rx_sge_prod); - - if (j != 0) - continue; - - if (!CHIP_IS_E2(bp)){ - REG_WR(bp, BAR_USTRORM_INTMEM + - USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func), - U64_LO(fp->rx_comp_mapping)); - REG_WR(bp, BAR_USTRORM_INTMEM + - USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4, - U64_HI(fp->rx_comp_mapping)); - } - } -} - -static void bnx2x_free_rx_skbs(struct bnx2x *bp) -{ - int j; - - for_each_rx_queue(bp, j) { - struct bnx2x_fastpath *fp = &bp->fp[j]; - - bnx2x_free_rx_bds(fp); - - if (!fp->disable_tpa) - bnx2x_free_tpa_pool(bp, fp, CHIP_IS_E1(bp) ? - ETH_MAX_AGGREGATION_QUEUES_E1 : - ETH_MAX_AGGREGATION_QUEUES_E1H); - } -} - -void bnx2x_free_skbs(struct bnx2x *bp) -{ - bnx2x_free_tx_skbs(bp); - bnx2x_free_rx_skbs(bp); -} - -void bnx2x_napi_enable(struct bnx2x *bp) -{ - int i; - - for_each_napi_queue(bp, i) -#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ - napi_enable(&bnx2x_fp(bp, i, napi)); -#else - netif_poll_enable(&bnx2x_fp(bp, i, dummy_netdev)); -#endif -} - -void bnx2x_napi_disable(struct bnx2x *bp) -{ - int i; - - for_each_napi_queue(bp, i) -#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ - napi_disable(&bnx2x_fp(bp, i, napi)); -#else - netif_poll_disable(&bnx2x_fp(bp, i, dummy_netdev)); -#endif -} - -/* Fill Link report data according to the current link - * configuration. - * - * @param bp - * @param data - */ -static inline void bnx2x_fill_report_data(struct bnx2x *bp, - struct bnx2x_link_report_data *data) -{ - u16 line_speed = bp->link_vars.line_speed; - - /* Calculate the current MAX line speed limit for the DCC capable - * devices. - */ - if (IS_MF(bp)) { - u16 vn_max_rate = ((bp->mf_config[BP_VN(bp)] & - FUNC_MF_CFG_MAX_BW_MASK) >> - FUNC_MF_CFG_MAX_BW_SHIFT) * 100; - - if (vn_max_rate < line_speed) - line_speed = vn_max_rate; - } - - memset(data, 0, sizeof(*data)); - - /* Fill the report data: efective line speed */ - data->line_speed = line_speed; - - /* Link is down */ - if (!bp->link_vars.link_up || (bp->flags & MF_FUNC_DIS)) - set_bit(BNX2X_LINK_REPORT_LINK_DOWN, &data->link_report_flags); - - /* Full DUPLEX */ - if (bp->link_vars.duplex == DUPLEX_FULL) - set_bit(BNX2X_LINK_REPORT_FD, &data->link_report_flags); - - /* Rx Flow Control is ON */ - if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX) - set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags); - - /* Tx Flow Control is ON */ - if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX) - set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags); -} - -void bnx2x_link_report(struct bnx2x *bp) -{ - struct bnx2x_link_report_data cur_data; - - /* reread mf_cfg */ - if (!CHIP_IS_E1(bp)) - bnx2x_read_mf_cfg(bp); - - /* Read the current link report info */ - bnx2x_fill_report_data(bp, &cur_data); - - /* Don't report link down or exactly the same link status twice */ - if (!memcmp(&cur_data, &bp->last_reported_link, sizeof(cur_data)) || - (test_bit(BNX2X_LINK_REPORT_LINK_DOWN, - &bp->last_reported_link.link_report_flags) && - test_bit(BNX2X_LINK_REPORT_LINK_DOWN, - &cur_data.link_report_flags))) - return; - - bp->link_cnt++; - - /* We are going to report a new link parameters now - - * remember the current data for the next time. - */ - memcpy(&bp->last_reported_link, &cur_data, sizeof(cur_data)); - - if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN, - &cur_data.link_report_flags)) { - netif_carrier_off(bp->dev); - netdev_err(bp->dev, "NIC Link is Down\n"); - return; - } else { - netif_carrier_on(bp->dev); - netdev_info(bp->dev, "NIC Link is Up, "); - pr_cont("%d Mbps ", cur_data.line_speed); - - if (test_and_clear_bit(BNX2X_LINK_REPORT_FD, - &cur_data.link_report_flags)) - pr_cont("full duplex"); - else - pr_cont("half duplex"); - - /* Handle the FC at the end so that only these flags would be - * possibly set. This way we may easily check if there is no FC - * enabled. - */ - if (cur_data.link_report_flags) { - if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON, - &cur_data.link_report_flags)) { - pr_cont(", receive "); - if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON, - &cur_data.link_report_flags)) - pr_cont("& transmit "); - } else { - pr_cont(", transmit "); - } - pr_cont("flow control ON"); - } - pr_cont("\n"); - } -} - -/** - * Free previously requested MSI-X IRQ vectors - * - * @param bp - * @param nvecs Number of vectors from bp->msix_table[] - * that have been requested and thus have to - * be released. - */ -void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs) -{ - int i, offset = 0; - - if (nvecs != offset) { - /* VFs don't have a default SB */ - if (HAS_DSB(bp)) { - offset++; - free_irq(bp->msix_table[0].vector, bp->dev); - DP(NETIF_MSG_IFDOWN, "released sp irq (%d)\n", - bp->msix_table[0].vector); - } - } else - return; - -#ifdef BCM_CNIC - if (nvecs != offset) { -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ - if (bp->flags & OWN_CNIC_IRQ) { - free_irq(bp->msix_table[offset].vector, bnx2x_ooo_fp(bp)); - bp->flags &= ~OWN_CNIC_IRQ; - } -#endif - offset++; - } else - return; -#endif - - for_each_eth_queue(bp, i) { - if (nvecs != offset) { - DP(NETIF_MSG_IFDOWN, "about to release fp #%d->%d irq " - "state %x\n", i, bp->msix_table[offset].vector, - bnx2x_fp(bp, i, state)); - - free_irq(bp->msix_table[offset++].vector, &bp->fp[i]); - } else - return; - } -} - -void bnx2x_free_irq(struct bnx2x *bp) -{ - if (bp->flags & USING_MSIX_FLAG) { - bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) + - CNIC_CONTEXT_USE + 1); - } else if (bp->flags & USING_MSI_FLAG) { - free_irq(bp->pdev->irq, bp->dev); - } else - free_irq(bp->pdev->irq, bp->dev); -} - -int bnx2x_enable_msix(struct bnx2x *bp) -{ - int msix_vec = 0, i, rc, req_cnt; - - /* No Default SB for VFs */ - if (HAS_DSB(bp)) { - bp->msix_table[msix_vec].entry = msix_vec; - msix_vec++; - - DP(NETIF_MSG_IFUP, "msix_table[0].entry = %d (slowpath)\n", - bp->msix_table[0].entry); - } - -#ifdef BCM_CNIC - bp->msix_table[msix_vec].entry = msix_vec; - DP(NETIF_MSG_IFUP, "msix_table[%d].entry = %d (CNIC)\n", - bp->msix_table[msix_vec].entry, bp->msix_table[msix_vec].entry); - msix_vec++; -#endif - /* We need separate vectors for ETH queues only (not FCoE) */ - for_each_eth_queue(bp, i) { - bp->msix_table[msix_vec].entry = msix_vec; - DP(NETIF_MSG_IFUP, "msix_table[%d].entry = %d " - "(fastpath #%u)\n", msix_vec, msix_vec, i); - msix_vec++; - } - - req_cnt = BNX2X_NUM_ETH_QUEUES(bp)+ CNIC_CONTEXT_USE + - (HAS_DSB(bp) ? 1 : 0); - - rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], req_cnt); - - /* - * reconfigure number of tx/rx queues according to available - * MSI-X vectors - */ - if (rc >= BNX2X_MIN_MSIX_VEC_CNT) { - /* how less vectors we will have? */ - int diff = req_cnt - rc; - - DP(NETIF_MSG_IFUP, - "Trying to use less MSI-X vectors: %d\n", rc); - - rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc); - - if (rc) { - DP(NETIF_MSG_IFUP, - "MSI-X is not attainable rc %d\n", rc); - return rc; - } - /* - * decrease number of queues by number of unallocated entries - */ - bp->num_queues -= diff; - - DP(NETIF_MSG_IFUP, "New queue configuration set: %d\n", - bp->num_queues); - } else if (rc) { - /* fall to INTx if not enough memory */ - if (rc == -ENOMEM) - bp->flags |= DISABLE_MSI_FLAG; - DP(NETIF_MSG_IFUP, "MSI-X is not attainable rc %d\n", rc); - return rc; - } - - bp->flags |= USING_MSIX_FLAG; - - return 0; -} - - -int bnx2x_req_msix_irqs(struct bnx2x *bp) -{ - int i, rc, offset = 0; - - if (HAS_DSB(bp)) { - rc = request_irq(bp->msix_table[offset++].vector, bnx2x_msix_sp_int, 0, - bp->dev->name, bp->dev); - if (rc) { - BNX2X_ERR("request sp irq failed\n"); - return -EBUSY; - } - } - -#ifdef BCM_CNIC -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ - if (!NO_ISCSI_OOO(bp)) { - snprintf(bnx2x_ooo(bp, name), sizeof(bnx2x_ooo(bp, name)), - "%s-fp-ooo", bp->dev->name); - rc = request_irq(bp->msix_table[offset].vector, - bnx2x_msix_cnic_int, 0, - bnx2x_ooo(bp, name), bnx2x_ooo_fp(bp)); - if (rc) { - BNX2X_ERR("request for cnic irq (%d) failed rc %d\n", - bp->msix_table[offset].vector, rc); - bnx2x_free_msix_irqs(bp, offset); - return -EBUSY; - } - bnx2x_ooo(bp, state) = BNX2X_FP_STATE_IRQ; - bp->flags |= OWN_CNIC_IRQ; - } -#endif - offset++; -#endif - for_each_eth_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - snprintf(fp->name, sizeof(fp->name),"%s-fp-%d", - bp->dev->name, i); - - rc = request_irq(bp->msix_table[offset].vector, - bnx2x_msix_fp_int, 0, fp->name, fp); - if (rc) { - BNX2X_ERR("request fp #%d irq (%d) failed rc %d\n", i, - bp->msix_table[offset].vector, rc); - bnx2x_free_msix_irqs(bp, offset); - return -EBUSY; - } - - offset++; - fp->state = BNX2X_FP_STATE_IRQ; - } - - i = BNX2X_NUM_ETH_QUEUES(bp); - if (HAS_DSB(bp)) { - offset = 1 + CNIC_CONTEXT_USE; - netdev_info(bp->dev, "using MSI-X IRQs: sp %d fp[%d] %d" - " ... fp[%d] %d\n", - bp->msix_table[0].vector, - 0, bp->msix_table[offset].vector, - i - 1, bp->msix_table[offset + i - 1].vector); - } - else { - offset = CNIC_CONTEXT_USE; - netdev_info(bp->dev, "using MSI-X IRQs: fp[%d] %d" - " ... fp[%d] %d\n", - 0, bp->msix_table[offset].vector, - i - 1, bp->msix_table[offset + i - 1].vector); - } - - return 0; -} - -int bnx2x_enable_msi(struct bnx2x *bp) -{ - int rc; - - rc = pci_enable_msi(bp->pdev); - if (rc) { - DP(NETIF_MSG_IFUP, "MSI is not attainable\n"); - return -1; - } - bp->flags |= USING_MSI_FLAG; - - return 0; -} - -int bnx2x_req_irq(struct bnx2x *bp) -{ - unsigned long flags; - int rc; - - if (bp->flags & USING_MSI_FLAG) - flags = 0; - else - flags = IRQF_SHARED; - - rc = request_irq(bp->pdev->irq, bnx2x_interrupt, flags, - bp->dev->name, bp->dev); - if (!rc) - bnx2x_fp(bp, 0, state) = BNX2X_FP_STATE_IRQ; - - return rc; -} - -int bnx2x_setup_irqs(struct bnx2x *bp) -{ - int rc = 0; - if (bp->flags & USING_MSIX_FLAG) { - rc = bnx2x_req_msix_irqs(bp); - if (rc) - return rc; - } else { - /* Fall to INTx if failed to enable MSI-X due to lack of - memory (in bnx2x_set_int_mode()) */ - if (!(bp->flags & DISABLE_MSI_FLAG) && (int_mode != INT_MODE_INTx)) - bnx2x_enable_msi(bp); - bnx2x_ack_int(bp); - rc = bnx2x_req_irq(bp); - if (rc) { - BNX2X_ERR("IRQ request failed rc %d, aborting\n", rc); - return rc; - } - if (bp->flags & USING_MSI_FLAG) { - bp->dev->irq = bp->pdev->irq; - netdev_info(bp->dev, "using MSI IRQ %d\n", - bp->pdev->irq); - } - } - - return 0; -} - -void bnx2x_netif_start(struct bnx2x *bp) -{ - int intr_sem; - - intr_sem = atomic_dec_and_test(&bp->intr_sem); - smp_wmb(); /* Ensure that bp->intr_sem update is SMP-safe */ - - if (intr_sem) { - if (netif_running(bp->dev)) { - bnx2x_napi_enable(bp); - bnx2x_int_enable(bp); - if (bp->state == BNX2X_STATE_OPEN) - netif_tx_wake_all_queues(bp->dev); - } - } -} - -void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw) -{ - bnx2x_int_disable_sync(bp, disable_hw); -#if defined(BNX2X_NEW_NAPI) || defined(USE_NAPI_GRO) /* BNX2X_UPSTREAM */ - bnx2x_napi_disable(bp); -#else - if (netif_running(bp->dev)) - bnx2x_napi_disable(bp); -#endif -} - -#if defined(BNX2X_SAFC) || (defined(BCM_CNIC) && defined(BNX2X_MULTI_QUEUE)) /* ! BNX2X_UPSTREAM */ -static inline int bnx2x_safc_select_queue(struct bnx2x *bp, - struct net_device *dev, - struct sk_buff *skb, - u32 adjust_for_fcoe) -{ - int fp_index = 0; - -#ifdef BNX2X_SAFC - int i; - - /* Determine which tx ring we will be placed on */ - switch (bp->multi_mode) { - case ETH_RSS_MODE_VLAN_PRI: - case ETH_RSS_MODE_E1HOV_PRI: -#ifdef BCM_VLAN - if ((bp->vlgrp != NULL) && vlan_tx_tag_present(skb)) { - i = ((vlan_tx_tag_get(skb) >> 13) & 0x7); - fp_index = bp->cos_map[bp->pri_map[i]]; - } -#endif - break; - - case ETH_RSS_MODE_IP_DSCP: - if (skb->protocol == htons(ETH_P_IP)) { - i = ((ip_hdr(skb)->tos >> 2) & 0x7); - fp_index = bp->cos_map[bp->pri_map[i]]; - } - break; - default: - fp_index = skb_tx_hash(dev, skb) - adjust_for_fcoe; - } -#else - fp_index = skb_tx_hash(dev, skb) - adjust_for_fcoe; -#endif - return fp_index; -} - -u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb) -{ - int fp_index = 0; - struct bnx2x *bp = netdev_priv(dev); - -#ifdef BCM_CNIC - if (NO_FCOE(bp)) - /* Select according to SAFC if defined. no fcoe adjustment */ - return bnx2x_safc_select_queue(bp, dev, skb, 0); - else { - struct ethhdr *hdr = (struct ethhdr *)skb->data; - u16 ether_type = ntohs(hdr->h_proto); - - /* Skip VLAN tag if present */ - if (ether_type == ETH_P_8021Q) { - struct vlan_ethhdr *vhdr = - (struct vlan_ethhdr *)skb->data; - - ether_type = ntohs(vhdr->h_vlan_encapsulated_proto); - } - - /* If ethertype is FCoE or FIP - use FCoE ring */ - if ((ether_type == ETH_P_FCOE) || (ether_type == ETH_P_FIP)) - return bnx2x_fcoe(bp, index); - } -#endif - /* Select according to SAFC (if defined) adjust for fcoe */ - fp_index = bnx2x_safc_select_queue(bp, dev, skb, - FCOE_CONTEXT_USE); - return (fp_index >= 0 ? fp_index : 0); -} -#endif - -#if !defined(BNX2X_NEW_NAPI) && defined(USE_NAPI_GRO) /* ! BNX2X_UPSTREAM */ -int __bnx2x_poll(struct napi_struct *napi, int budget) -{ - int _budget = budget; - - napi->dev->poll(napi->dev, &_budget); - return (budget - _budget); -} -#endif - -void bnx2x_set_num_queues(struct bnx2x *bp) -{ -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - int i; -#endif - - switch (bp->multi_mode) { - case ETH_RSS_MODE_DISABLED: - bp->num_queues = 1; - break; - - case ETH_RSS_MODE_REGULAR: - bp->num_queues = bnx2x_calc_num_queues(bp); - break; - -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - case ETH_RSS_MODE_VLAN_PRI: - case ETH_RSS_MODE_E1HOV_PRI: - case ETH_RSS_MODE_IP_DSCP: - bp->num_queues = 0; - for (i = 0; i < BNX2X_MAX_COS; i++) - bp->num_queues += bp->qs_per_cos[i]; - break; -#endif - - default: - bp->num_queues = 1; - break; - } - - /* Add special queues */ - bp->num_queues += NONE_ETH_CONTEXT_USE; -} - -#ifdef BCM_CNIC -static inline void bnx2x_set_fcoe_eth_macs(struct bnx2x *bp) -{ - if (!NO_FCOE(bp)) { - if (!IS_MF(bp)) - bnx2x_set_fip_eth_mac_addr(bp, 1); - bnx2x_set_all_enode_macs(bp, 1); - bp->flags |= FCOE_MACS_SET; - } -} -#endif - - -static inline int bnx2x_config_rss_pf(struct bnx2x *bp) -{ - struct bnx2x_config_rss_params params = {0}; - int i; - - params.rss_obj = &bp->rss_conf_obj; - - set_bit(RAMROD_COMP_WAIT, ¶ms.ramrod_flags); - - /* RSS mode */ - switch (bp->multi_mode) { - case ETH_RSS_MODE_DISABLED: - set_bit(BNX2X_RSS_MODE_DISABLED, ¶ms.rss_flags); - break; - case ETH_RSS_MODE_REGULAR: - set_bit(BNX2X_RSS_MODE_REGULAR, ¶ms.rss_flags); - break; - case ETH_RSS_MODE_VLAN_PRI: - set_bit(BNX2X_RSS_MODE_VLAN_PRI, ¶ms.rss_flags); - break; - case ETH_RSS_MODE_E1HOV_PRI: - set_bit(BNX2X_RSS_MODE_E1HOV_PRI, ¶ms.rss_flags); - break; - case ETH_RSS_MODE_IP_DSCP: - set_bit(BNX2X_RSS_MODE_IP_DSCP, ¶ms.rss_flags); - break; - case ETH_RSS_MODE_E2_INTEG: - set_bit(BNX2X_RSS_MODE_E2_INTEG, ¶ms.rss_flags); - break; - default: - BNX2X_ERR("Unknown multi_mode: %d\n", bp->multi_mode); - return -EINVAL; - } - - /* If RSS is enabled */ - if (bp->multi_mode != ETH_RSS_MODE_DISABLED) { - /* RSS configuration */ - set_bit(BNX2X_RSS_IPV4, ¶ms.rss_flags); - set_bit(BNX2X_RSS_IPV4_TCP, ¶ms.rss_flags); - set_bit(BNX2X_RSS_IPV6, ¶ms.rss_flags); - set_bit(BNX2X_RSS_IPV6_TCP, ¶ms.rss_flags); - - /* RSS scope */ - set_bit(BNX2X_RSS_UPDATE_ETH, ¶ms.rss_flags); - - /* Hash bits */ - params.rss_result_mask = MULTI_MASK; - - -#ifdef BNX2X_SAFC - for (i = 0; i < sizeof(params.ind_table); i++) { - int cos = bp->pri_map[i / BNX2X_MAX_ENTRIES_PER_PRI]; - params.ind_table[i] = bp->fp->cl_id + bp->cos_map[cos] + - (i % bp->qs_per_cos[cos]); - } -#else /* BNX2X_UPSTREAM */ - for (i = 0; i < sizeof(params.ind_table); i++) - params.ind_table[i] = bp->fp->cl_id + - (i % (bp->num_queues - NONE_ETH_CONTEXT_USE)); -#endif - - /* RSS keys: think of taking the upstream version (random32()) */ - for (i = 0; i < sizeof(params.rss_key) / 4; i++) - params.rss_key[i] = 0xc0cac01a; - } - - return bnx2x_config_rss(bp, ¶ms); -} - -#ifndef BNX2X_STOP_ON_ERROR -#define LOAD_ERROR_EXIT(bp, label) goto label -#else -#define LOAD_ERROR_EXIT(bp, label) \ - do { \ - (bp)->panic = 1; \ - return -EBUSY; \ - } while (0) -#endif - - -/* NIC load - must be called with rtnl_lock */ -int bnx2x_nic_load(struct bnx2x *bp, int load_mode) -{ - int port = BP_PORT(bp); - u32 load_code; - int i, rc; - -#ifdef BNX2X_STOP_ON_ERROR - if (unlikely(bp->panic)) - return -EPERM; -#endif - - bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD; - - bp->rx_buf_size = bp->dev->mtu + ETH_OVREHEAD + BNX2X_RX_ALIGN + - BNX2X_FW_IP_HDR_ALIGN_PAD; - - /* Set the initial link reported state to an illegal value. This will - * ensure that any link state change will be immediatelly reported. - */ - memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link)); - - /* must be called before memory allocation and HW init */ - bnx2x_ilt_set_info(bp); - - /* zero fastpath structures preserving invariants like napi which are - * allocated only once - */ - for_each_queue(bp, i) - bnx2x_bz_fp(bp, i); - - /* set the tpa flag for each queue. The tpa flag determines the queue - * minimal size so it must be set prior to queue memory allocation - */ - -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - /* disable LRO (TPA) for the default queue */ - bnx2x_fp(bp, 0, disable_tpa) = 1; - - /* Iterate over the net-queues determining which support LRO (TPA) */ - bnx2x_reserve_netq_feature(bp); - -#else /* Linux */ - for_each_queue(bp, i) - bnx2x_fp(bp, i, disable_tpa) = - ((bp->flags & TPA_ENABLE_FLAG) == 0); -#endif - -#ifdef BCM_CNIC - /* We don't want TPA on FCoE, FWD and OOO L2 rings */ - bnx2x_fcoe(bp, disable_tpa) = 1; - bnx2x_fwd(bp, disable_tpa) = 1; - bnx2x_ooo(bp, disable_tpa) = 1; -#endif - - if (bnx2x_alloc_mem(bp)) - return -ENOMEM; - - bnx2x_napi_enable(bp); - - /* Send LOAD_REQUEST command to MCP - * Returns the type of LOAD command: - * if it is the first port to be initialized - * common blocks should be initialized, otherwise - not - */ - if (!BP_NOMCP(bp)) { - load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0); - if (!load_code) { - BNX2X_ERR("MCP response failure, aborting\n"); - rc = -EBUSY; - goto load_error1; - } - if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED) { - rc = -EBUSY; /* other port in diagnostic mode */ - goto load_error1; - } - - } else { - int path = BP_PATH(bp); - - DP(NETIF_MSG_IFUP, "NO MCP - load counts[%d] %d, %d, %d\n", - path, load_count[path][0], load_count[path][1], - load_count[path][2]); - load_count[path][0]++; - load_count[path][1 + port]++; - DP(NETIF_MSG_IFUP, "NO MCP - new load counts[%d] %d, %d, %d\n", - path, load_count[path][0], load_count[path][1], - load_count[path][2]); - if (load_count[path][0] == 1) - load_code = FW_MSG_CODE_DRV_LOAD_COMMON; - else if (load_count[path][1 + port] == 1) - load_code = FW_MSG_CODE_DRV_LOAD_PORT; - else - load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION; - } - - if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) || - (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) || - (load_code == FW_MSG_CODE_DRV_LOAD_PORT)) - bp->port.pmf = 1; - else - bp->port.pmf = 0; - DP(NETIF_MSG_LINK, "pmf %d\n", bp->port.pmf); - - /* Initialize HW */ - rc = bnx2x_init_hw(bp, load_code); - if (rc) { - BNX2X_ERR("HW init failed, aborting\n"); - bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0); - goto load_error2; - } - - /* Connect to IRQs */ - rc = bnx2x_setup_irqs(bp); - if (rc) { - bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0); - goto load_error2; - } - - /* Setup NIC internals and enable interrupts */ - bnx2x_nic_init(bp, load_code); - - /* Init per-function objects */ - bnx2x_init_bp_objs(bp); - -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - bnx2x_iov_nic_init(bp); -#endif - if (((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) || - (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP)) && - (bp->common.shmem2_base)) - SHMEM2_WR(bp, dcc_support, - (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV | - SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV)); - - /* Send LOAD_DONE command to MCP */ - if (!BP_NOMCP(bp)) { - load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0); - if (!load_code) { - BNX2X_ERR("MCP response failure, aborting\n"); - rc = -EBUSY; - goto load_error3; - } - } - - - /* TEMPORARY disabled for 6.1 branch ONLY - * do not integrate into other branches - */ - /* bnx2x_dcbx_init(bp); */ - - bp->state = BNX2X_STATE_OPENING_WAIT4_PORT; - - rc = bnx2x_func_start(bp); - if (rc) { - BNX2X_ERR("Function start failed!\n"); - LOAD_ERROR_EXIT(bp, load_error3); - } - - rc = bnx2x_setup_leading(bp); - if (rc) { - BNX2X_ERR("Setup leading failed!\n"); - LOAD_ERROR_EXIT(bp, load_error3); - } - - if (!CHIP_IS_E1(bp) && - (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED)) { - DP(NETIF_MSG_IFUP, "mf_cfg function disabled\n"); - bp->flags |= MF_FUNC_DIS; - } - -#ifdef BCM_CNIC - /* Enable Timer scan */ - REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 1); -#endif - - for_each_nondefault_queue(bp, i) { - rc = bnx2x_setup_client(bp, &bp->fp[i], 0); - if (rc) { -#ifdef BCM_CNIC - LOAD_ERROR_EXIT(bp, load_error4); -#else - LOAD_ERROR_EXIT(bp, load_error3); -#endif - } - } -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - - /* For ESX RSS is disabled. The RSS configuration command with an - * RSS-disabled flag will over-write the the HW RSS-hash - * configuration. As HW RSS-hash is required for proper TPA - * opearion we avoid sendig the RSS configuration command all-together. - */ - bp->multi_mode = ETH_RSS_MODE_DISABLED; -#else - rc = bnx2x_config_rss_pf(bp); - if (rc) -#ifdef BCM_CNIC - LOAD_ERROR_EXIT(bp, load_error4); -#else - LOAD_ERROR_EXIT(bp, load_error3); -#endif -#endif - - /* Now when Clients are configured we are ready to work */ - bp->state = BNX2X_STATE_OPEN; - -#ifdef BCM_CNIC - bnx2x_set_fcoe_eth_macs(bp); -#endif - - /* Configure a ucast MAC */ - bnx2x_set_eth_mac(bp, 1); - - if (bp->port.pmf || IS_VF(bp)) - bnx2x_initial_phy_init(bp, load_mode); - - /* Start fast path */ - - /* Initialize Rx filter. */ - netif_addr_lock_bh(bp->dev); - bnx2x_set_rx_mode(bp->dev); - netif_addr_unlock_bh(bp->dev); - - /* Start the Tx */ - switch (load_mode) { - case LOAD_NORMAL: - /* Tx queue should be only reenabled */ - netif_tx_wake_all_queues(bp->dev); - break; - - case LOAD_OPEN: - netif_tx_start_all_queues(bp->dev); - smp_mb__after_clear_bit(); - break; - - case LOAD_DIAG: - bp->state = BNX2X_STATE_DIAG; - break; - - default: - break; - } - - if (!bp->port.pmf) - bnx2x__link_status_update(bp); - - /* start the timer */ - mod_timer(&bp->timer, jiffies + bp->current_interval); - -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - /* - * vmknetddi_queueops_invalidate_state(bp->dev) should be called - * here instead of being littered throughout the code right after - * bnx2x_nic_load - */ - bp->n_rx_queues_allocated = 0; - bp->n_tx_queues_allocated = 0; -#endif - -#ifdef BCM_CNIC -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ - /* Release CNIC's IRQ now, CNIC will connect to it */ - if ((bp->flags & USING_MSIX_FLAG) && (!NO_ISCSI_OOO(bp))) { - int cnic_idx = HAS_DSB(bp) ? 1 : 0; - synchronize_irq(bp->msix_table[cnic_idx].vector); - free_irq(bp->msix_table[cnic_idx].vector, bnx2x_ooo_fp(bp)); - bp->flags &= ~OWN_CNIC_IRQ; - } -#endif - - bnx2x_setup_cnic_irq_info(bp); - if (bp->state == BNX2X_STATE_OPEN) - bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD); -#endif - bnx2x_inc_load_cnt(bp); - -#ifdef BCM_VLAN - /* Configure HW VLAN stripping if there are registered VLAN devices */ - if (bp->vlgrp) - bnx2x_vlan_rx_register(bp->dev, bp->vlgrp); -#endif - - return 0; - -#ifdef BCM_CNIC -#ifndef BNX2X_STOP_ON_ERROR -load_error4: -#endif - /* Disable Timer scan */ - REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0); -#endif -load_error3: - bnx2x_int_disable_sync(bp, 1); - - /* Free SKBs, SGEs, TPA pool and driver internals */ - bnx2x_free_skbs(bp); - for_each_rx_queue(bp, i) - bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); - - /* Release IRQs */ - bnx2x_free_irq(bp); -load_error2: - if (!BP_NOMCP(bp)) { - bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0); - bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); - } - - bp->port.pmf = 0; -load_error1: - bnx2x_napi_disable(bp); - bnx2x_free_mem(bp); - - return rc; -} - - -/* must be called with rtnl_lock */ -int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode) -{ - int i; - - if (bp->state == BNX2X_STATE_CLOSED) { - /* We can get here only if the driver has been unloaded - * during parity error recovery and is either waiting for a - * leader to complete of for other functions to unload and - * then ifdown has been issued. In this case we want to - * unload and let other functions to complete a recovery - * process by releasing LEADER lock. - */ - bp->recovery_state = BNX2X_RECOVERY_DONE; - bp->is_leader = 0; - bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESERVED_08); - smp_wmb(); - - return -EINVAL; - } -#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ - /* - * On older version of ESX 'device close' could be called with no - * prior successful call to 'device open'. The valid states at this - * point are either 'open' (device open) or 'diag' (self-test) - */ - if(bp->state != BNX2X_STATE_OPEN && bp->state != BNX2X_STATE_DIAG) { - BNX2X_ERR("called dev_close() with no prior successful call " - "to dev_open()\n"); - return -EBUSY; - } -#endif - -#ifdef BCM_CNIC - bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD); - -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ - /* Reaquire the CNIC's IRQ */ - if ((!NO_ISCSI_OOO(bp)) && (bp->flags & USING_MSIX_FLAG) - && (!(bp->flags & OWN_CNIC_IRQ))) { - int cnic_idx = HAS_DSB(bp) ? 1 : 0; - if (request_irq(bp->msix_table[cnic_idx].vector, - bnx2x_msix_cnic_int, 0, bnx2x_ooo(bp, name), bnx2x_ooo_fp(bp))) - BNX2X_ERR("Failed to connect to CNIC IRQ\n"); - else - bp->flags |= OWN_CNIC_IRQ; - } -#endif -#endif - bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT; - smp_mb(); - - bp->rx_mode = BNX2X_RX_MODE_NONE; - - /* Stop Tx */ - bnx2x_tx_disable(bp); - -#if (LINUX_VERSION_CODE < 0x02061f) /* ! BNX2X_UPSTREAM */ - /* In kernels starting from 2.6.31 netdev layer does this */ - bp->dev->trans_start = jiffies; /* prevent tx timeout */ -#endif - - del_timer_sync(&bp->timer); - - /* Set ALWAYS_ALIVE bit in shmem */ - bp->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE; - -#ifndef __VMKLNX__ /* Remove FW pulse timer update */ /* BNX2X_UPSTREAM */ - bnx2x_drv_pulse(bp); -#endif /* !__VMKLNX__ */ - - bnx2x_stats_handle(bp, STATS_EVENT_STOP); - - /* Cleanup the chip if needed */ - if (unload_mode != UNLOAD_RECOVERY) - bnx2x_chip_cleanup(bp, unload_mode); - else { - /* Disable HW interrupts, NAPI */ - bnx2x_netif_stop(bp, 1); - - /* Release IRQs */ - bnx2x_free_irq(bp); - } - - bp->port.pmf = 0; - - /* Free SKBs, SGEs, TPA pool and driver internals */ - bnx2x_free_skbs(bp); - for_each_rx_queue(bp, i) - bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); - - bnx2x_free_mem(bp); - - bp->state = BNX2X_STATE_CLOSED; - - - - /* The last driver must disable a "close the gate" if there is no - * parity attention or "process kill" pending. - */ - if ((!bnx2x_dec_load_cnt(bp)) && (!bnx2x_chk_parity_attn(bp)) && - bnx2x_reset_is_done(bp)) - bnx2x_disable_close_the_gate(bp); - - /* Reset MCP mail box sequence if there is on going recovery */ - if (unload_mode == UNLOAD_RECOVERY) - bp->fw_seq = 0; - - return 0; -} - -int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state) -{ - u16 pmcsr; - - /* If there is no power capability, silently succeed */ - if (!bp->pm_cap) { - DP(NETIF_MSG_HW, "No power capability. Breaking.\n"); - return 0; - } - - pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr); - - switch (state) { - case PCI_D0: - pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, - ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) | - PCI_PM_CTRL_PME_STATUS)); - - if (pmcsr & PCI_PM_CTRL_STATE_MASK) - /* delay required during transition out of D3hot */ - msleep(20); - break; - - case PCI_D3hot: -#if (LINUX_VERSION_CODE >= 0x020614) /* BNX2X_UPSTREAM */ - /* If there are other clients above don't - shut down the power */ - if (atomic_read(&bp->pdev->enable_cnt) != 1) - return 0; -#endif - /* Don't shut down the power for emulation and FPGA */ - if (CHIP_REV_IS_SLOW(bp)) - return 0; - - pmcsr &= ~PCI_PM_CTRL_STATE_MASK; - pmcsr |= 3; - - if (bp->wol) - pmcsr |= PCI_PM_CTRL_PME_ENABLE; - - pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, - pmcsr); - - /* No more memory access after this point until - * device is brought back to D0. - */ - break; - - default: - return -EINVAL; - } - return 0; -} - -void bnx2x_free_mem_bp(struct bnx2x *bp) -{ - if (bp->fp) - kfree(bp->fp); - if (bp->msix_table) - kfree(bp->msix_table); - if (bp->ilt) - kfree(bp->ilt); -} - -int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp) -{ - struct bnx2x_fastpath *fp; - struct msix_entry *tbl; - struct bnx2x_ilt *ilt; - - /* fp array */ - fp = kzalloc(L2_FP_COUNT(bp->l2_cid_count)*sizeof(*fp), GFP_KERNEL); - if (!fp) - goto alloc_err; - bp->fp = fp; - - /* msix table */ - tbl = kzalloc((FP_SB_COUNT(bp->l2_cid_count) + 1) * sizeof(*tbl), - GFP_KERNEL); - if (!tbl) - goto alloc_err; - bp->msix_table = tbl; - - /* ilt */ - ilt = kzalloc(sizeof(*ilt), GFP_KERNEL); - if (!ilt) - goto alloc_err; - bp->ilt = ilt; - - return 0; -alloc_err: - bnx2x_free_mem_bp(bp); - return -ENOMEM; - -} - -/* Common ethtool_ops */ -/* All ethtool functions called with rtnl_lock */ -int bnx2x_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct bnx2x *bp = netdev_priv(dev); - int cfg_idx = bnx2x_get_link_cfg_idx(bp); - /* Dual Media boards present all available port types */ - cmd->supported = bp->port.supported[cfg_idx] | - (bp->port.supported[cfg_idx ^ 1] & - (SUPPORTED_TP | SUPPORTED_FIBRE)); - cmd->advertising = bp->port.advertising[cfg_idx]; - - if ((bp->state == BNX2X_STATE_OPEN) && - !(bp->flags & MF_FUNC_DIS) && - (bp->link_vars.link_up)) { - cmd->speed = bp->link_vars.line_speed; - cmd->duplex = bp->link_vars.duplex; - } else { - - cmd->speed = bp->link_params.req_line_speed[cfg_idx]; - cmd->duplex = bp->link_params.req_duplex[cfg_idx]; - } - if (IS_MF(bp)) { - u16 vn_max_rate = ((bp->mf_config[BP_VN(bp)] & - FUNC_MF_CFG_MAX_BW_MASK) >> FUNC_MF_CFG_MAX_BW_SHIFT) * - 100; - - if (vn_max_rate < cmd->speed) - cmd->speed = vn_max_rate; - } - - if (bp->port.supported[cfg_idx] & SUPPORTED_TP) - cmd->port = PORT_TP; - else if(bp->port.supported[cfg_idx] & SUPPORTED_FIBRE) - cmd->port = PORT_FIBRE; - else - BNX2X_ERR("XGXS PHY Failure detected\n"); - - cmd->phy_address = bp->mdio.prtad; - cmd->transceiver = XCVR_INTERNAL; - - if (bp->link_params.req_line_speed[cfg_idx] == SPEED_AUTO_NEG) - cmd->autoneg = AUTONEG_ENABLE; - else - cmd->autoneg = AUTONEG_DISABLE; - - cmd->maxtxpkt = 0; - cmd->maxrxpkt = 0; - - DP(NETIF_MSG_LINK, "ethtool_cmd: cmd %d\n" - DP_LEVEL " supported 0x%x advertising 0x%x speed %d\n" - DP_LEVEL " duplex %d port %d phy_address %d transceiver %d\n" - DP_LEVEL " autoneg %d maxtxpkt %d maxrxpkt %d\n", - cmd->cmd, cmd->supported, cmd->advertising, - cmd->speed, cmd->duplex, cmd->port, cmd->phy_address, - cmd->transceiver, cmd->autoneg, cmd->maxtxpkt, cmd->maxrxpkt); - - return 0; -} - -u32 bnx2x_get_msglevel(struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - - return bp->msg_enable; -} - -void bnx2x_set_msglevel(struct net_device *dev, u32 level) -{ - struct bnx2x *bp = netdev_priv(dev); - - if (capable(CAP_NET_ADMIN)) - bp->msg_enable = level; -} - -int bnx2x_get_coalesce(struct net_device *dev, - struct ethtool_coalesce *coal) -{ - struct bnx2x *bp = netdev_priv(dev); - - memset(coal, 0, sizeof(struct ethtool_coalesce)); - - coal->rx_coalesce_usecs = bp->rx_ticks; - coal->tx_coalesce_usecs = bp->tx_ticks; - - return 0; -} - -void bnx2x_get_ringparam(struct net_device *dev, - struct ethtool_ringparam *ering) -{ - struct bnx2x *bp = netdev_priv(dev); - - ering->rx_max_pending = MAX_RX_AVAIL; - ering->rx_mini_max_pending = 0; - ering->rx_jumbo_max_pending = 0; - - ering->rx_pending = bp->rx_ring_size; - ering->rx_mini_pending = 0; - ering->rx_jumbo_pending = 0; - - ering->tx_max_pending = MAX_TX_AVAIL; - ering->tx_pending = bp->tx_ring_size; -} - -int bnx2x_set_ringparam(struct net_device *dev, - struct ethtool_ringparam *ering) -{ - struct bnx2x *bp = netdev_priv(dev); - int rc = 0; - - if (bp->recovery_state != BNX2X_RECOVERY_DONE) { - netdev_err(dev, "Handling parity error recovery. Try again later\n"); - return -EAGAIN; - } - - if ((ering->rx_pending > MAX_RX_AVAIL) || - (ering->tx_pending > MAX_TX_AVAIL) || - (ering->tx_pending <= MAX_SKB_FRAGS + 4)) - return -EINVAL; - - bp->rx_ring_size = ering->rx_pending; - bp->tx_ring_size = ering->tx_pending; - - if (netif_running(dev)) { - bnx2x_nic_unload(bp, UNLOAD_NORMAL); - rc = bnx2x_nic_load(bp, LOAD_NORMAL); -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - /* - * Invalidate netqueue state as filters - * have been lost after reinit. - */ - vmknetddi_queueops_invalidate_state(dev); -#endif - } - - return rc; -} - -int bnx2x_get_link_cfg_idx(struct bnx2x *bp) -{ - u32 sel_phy_idx = 0; - if (bp->link_vars.link_up) { - sel_phy_idx = EXT_PHY1; - /* In case link is SERDES, check if the EXT_PHY2 is the one */ - if ((bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) && - (bp->link_params.phy[EXT_PHY2].supported & SUPPORTED_FIBRE)) - sel_phy_idx = EXT_PHY2; - } else { - - switch (bnx2x_phy_selection(&bp->link_params)) { - case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT: - case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY: - case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY: - sel_phy_idx = EXT_PHY1; - break; - case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY: - case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY: - sel_phy_idx = EXT_PHY2; - break; - } - } - /* - * The selected actived PHY is always after swapping (in case PHY - * swapping is enabled). So when swapping is enabled, we need to reverse - * the configuration - */ - - if (bp->link_params.multi_phy_config & - PORT_HW_CFG_PHY_SWAPPED_ENABLED) { - if (sel_phy_idx == EXT_PHY1) - sel_phy_idx = EXT_PHY2; - else if (sel_phy_idx == EXT_PHY2) - sel_phy_idx = EXT_PHY1; - } - return LINK_CONFIG_IDX(sel_phy_idx); -} - -void bnx2x_get_pauseparam(struct net_device *dev, - struct ethtool_pauseparam *epause) -{ - struct bnx2x *bp = netdev_priv(dev); - int cfg_idx = bnx2x_get_link_cfg_idx(bp); - epause->autoneg = (bp->link_params.req_flow_ctrl[cfg_idx] == - BNX2X_FLOW_CTRL_AUTO); - - epause->rx_pause = ((bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX) == - BNX2X_FLOW_CTRL_RX); - epause->tx_pause = ((bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX) == - BNX2X_FLOW_CTRL_TX); - - DP(NETIF_MSG_LINK, "ethtool_pauseparam: cmd %d\n" - DP_LEVEL " autoneg %d rx_pause %d tx_pause %d\n", - epause->cmd, epause->autoneg, epause->rx_pause, epause->tx_pause); -} - -#if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ -int bnx2x_set_flags(struct net_device *dev, u32 data) -{ - struct bnx2x *bp = netdev_priv(dev); - int changed = 0; - int rc = 0; - - if (data & ~(ETH_FLAG_LRO | ETH_FLAG_RXHASH)) - return -EINVAL; - - if (bp->recovery_state != BNX2X_RECOVERY_DONE) { - netdev_err(dev, "Handling parity error recovery. Try again later\n"); - return -EAGAIN; - } - - /* TPA requires Rx CSUM offloading */ - if ((data & ETH_FLAG_LRO) && bp->rx_csum) { - if (! disable_tpa) { - if (!(dev->features & NETIF_F_LRO)) { - dev->features |= NETIF_F_LRO; - bp->flags |= TPA_ENABLE_FLAG; - changed = 1; - } - } else - rc = -EINVAL; - - } else if (dev->features & NETIF_F_LRO) { - dev->features &= ~NETIF_F_LRO; - bp->flags &= ~TPA_ENABLE_FLAG; - changed = 1; - } - -#if (LINUX_VERSION_CODE > 0x020622) /* BNX2X_UPSTREAM */ - /* Rx Toeplitz hash HW acceleration */ - if (data & ETH_FLAG_RXHASH) - dev->features |= NETIF_F_RXHASH; - else - dev->features &= ~NETIF_F_RXHASH; -#endif - - if (changed && netif_running(dev)) { - bnx2x_nic_unload(bp, UNLOAD_NORMAL); - rc = bnx2x_nic_load(bp, LOAD_NORMAL); -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - /* - * Invalidate netqueue state as filters - * have been lost after reinit. - */ - vmknetddi_queueops_invalidate_state(dev); -#endif - } - - return rc; -} -#endif - -u32 bnx2x_get_rx_csum(struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - - return bp->rx_csum; -} - -int bnx2x_set_rx_csum(struct net_device *dev, u32 data) -{ - struct bnx2x *bp = netdev_priv(dev); - int rc = 0; - - if (bp->recovery_state != BNX2X_RECOVERY_DONE) { - netdev_err(dev, "Handling parity error recovery. Try again later\n"); - return -EAGAIN; - } - - bp->rx_csum = data; - - /* Disable TPA, when Rx CSUM is disabled. Otherwise all - TPA'ed packets will be discarded due to wrong TCP CSUM */ - if (!data) { -#if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ - u32 flags = ethtool_op_get_flags(dev); - - rc = bnx2x_set_flags(dev, (flags & ~ETH_FLAG_LRO)); -#else - bp->flags &= ~TPA_ENABLE_FLAG; - if (netif_running(dev)) { - bnx2x_nic_unload(bp, UNLOAD_NORMAL); - rc = bnx2x_nic_load(bp, LOAD_NORMAL); -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - /* - * Invalidate netqueue state as filters - * have been lost after reinit. - */ - vmknetddi_queueops_invalidate_state(dev); -#endif - } -#endif - } - - return rc; -} - -#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ -int bnx2x_set_tso(struct net_device *dev, u32 data) -{ - if (data) { - dev->features |= (NETIF_F_TSO | NETIF_F_TSO_ECN); -#ifdef NETIF_F_TSO6 /* BNX2X_UPSTREAM */ - dev->features |= NETIF_F_TSO6; -#endif - } else { - dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO_ECN); -#ifdef NETIF_F_TSO6 /* BNX2X_UPSTREAM */ - dev->features &= ~NETIF_F_TSO6; -#endif - } - - return 0; -} -#endif - -/* end of ethtool_ops */ - -/* called with rtnl_lock */ -int bnx2x_change_mtu(struct net_device *dev, int new_mtu) -{ - struct bnx2x *bp = netdev_priv(dev); - int rc = 0; - - if (bp->recovery_state != BNX2X_RECOVERY_DONE) { - netdev_err(dev, "Handling parity error recovery. Try again later\n"); - return -EAGAIN; - } - - if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) || - ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE)) - return -EINVAL; - -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - if (dev->mtu == new_mtu) - return rc; - if (netif_running(dev)) { -#if (VMWARE_ESX_DDK_VERSION < 50000) /* ! BNX2X_UPSTREAM */ - /* There is no need to hold rtnl_lock - * when calling change MTU into driver - * from VMkernel ESX 5.0 onwards. - */ - rtnl_lock(); -#endif - bnx2x_nic_unload(bp, UNLOAD_NORMAL); - dev->mtu = new_mtu; - - if (bp->dev->mtu > ETH_MAX_PACKET_SIZE) - bp->rx_ring_size = INIT_JUMBO_RX_RING_SIZE; - else - bp->rx_ring_size = INIT_RX_RING_SIZE; - - rc = bnx2x_nic_load(bp, LOAD_NORMAL); -#if (VMWARE_ESX_DDK_VERSION < 50000) /* ! BNX2X_UPSTREAM */ - rtnl_unlock(); -#endif -#if defined(__VMKNETDDI_QUEUEOPS__) - /* Invalidate netqueue state as filters - * have been lost after reinit */ - vmknetddi_queueops_invalidate_state(dev); -#endif - } else - dev->mtu = new_mtu; -#else /* ! __VMKLNX__ */ - - /* This does not race with packet allocation - * because the actual alloc size is - * only updated as part of load - */ - dev->mtu = new_mtu; - - if (netif_running(dev)) { - bnx2x_nic_unload(bp, UNLOAD_NORMAL); - rc = bnx2x_nic_load(bp, LOAD_NORMAL); - } -#endif - - return rc; -} - -void bnx2x_tx_timeout(struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - -#ifdef BNX2X_STOP_ON_ERROR - if (!bp->panic) - bnx2x_panic(); -#endif - - /* This allows the netif to be shutdown gracefully before resetting */ - schedule_delayed_work(&bp->reset_task, 0); -} - -#ifdef BCM_VLAN - -static int bnx2x_set_vlan_stripping(struct bnx2x *bp) -{ - struct bnx2x_client_update_params params = {0}; - int i, rc; - - set_bit(BNX2X_CL_UPDATE_IN_VLAN_REM, ¶ms.update_flags); - set_bit(BNX2X_CL_UPDATE_IN_VLAN_REM_CHNG, ¶ms.update_flags); - - params.rdata = (void*)bnx2x_sp(bp, client_data.update_data); - params.rdata_mapping = bnx2x_sp_mapping(bp, client_data.update_data); - - for_each_napi_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - - /* Skip FCoE Client for E1x */ - if (IS_FCOE_IDX(i) && CHIP_IS_E1x(bp)) - continue; - - params.cl_id = fp->cl_id; - params.cid = fp->cid; - - rc = bnx2x_fw_cl_update(bp, ¶ms); - if (rc) - return rc; - } - - return 0; -} - - -static int bnx2x_clear_vlan_stripping(struct bnx2x *bp) -{ - struct bnx2x_client_update_params params = {0}; - int i, rc; - - set_bit(BNX2X_CL_UPDATE_IN_VLAN_REM_CHNG, ¶ms.update_flags); - - params.rdata = (void*)bnx2x_sp(bp, client_data.update_data); - params.rdata_mapping = bnx2x_sp_mapping(bp, client_data.update_data); - - for_each_napi_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - - /* Skip FCoE Client for E1x */ - if (IS_FCOE_IDX(i) && CHIP_IS_E1x(bp)) - continue; - - params.cl_id = fp->cl_id; - params.cid = fp->cid; - - rc = bnx2x_fw_cl_update(bp, ¶ms); - if (rc) - return rc; - } - - return 0; -} - -/* called with rtnl_lock */ -void bnx2x_vlan_rx_register(struct net_device *dev, struct vlan_group *vlgrp) -{ - struct bnx2x *bp = netdev_priv(dev); - int rc; - - /* Configure VLAN stripping if NIC is up. - * Otherwise just set the bp->vlgrp and stripping will be - * configured in bnx2x_nic_load(). - */ - if (bp->state == BNX2X_STATE_OPEN) { - if (vlgrp != NULL) { - rc = bnx2x_set_vlan_stripping(bp); - - /* If we failed to configure VLAN stripping we don't - * want to use HW accelerated flow in bnx2x_rx_int(). - * Thus we will leave bp->vlgrp to be equal to NULL to - * disable it. - */ - if (rc) { - netdev_err(dev, "Failed to set HW " - "VLAN stripping\n"); - bnx2x_clear_vlan_stripping(bp); - } else - bp->vlgrp = vlgrp; - } else { - rc = bnx2x_clear_vlan_stripping(bp); - - if (rc) - netdev_err(dev, "Failed to clear HW " - "VLAN stripping\n"); - - bp->vlgrp = NULL; - } - } else - bp->vlgrp = vlgrp; -} -#if (LINUX_VERSION_CODE < 0x020616) /* ! BNX2X_UPSTREAM */ -void bnx2x_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid) -{ - struct bnx2x *bp = netdev_priv(dev); - - if (bp->vlgrp) - vlan_group_set_device(bp->vlgrp, vid, NULL); -} -#endif -#endif /* BCM_VLAN */ - -/* HW Lock for shared dual port PHYs */ -void bnx2x_acquire_phy_lock(struct bnx2x *bp) -{ - mutex_lock(&bp->port.phy_mutex); - - if (bp->port.need_hw_lock) - bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO); -} - -void bnx2x_release_phy_lock(struct bnx2x *bp) -{ - if (bp->port.need_hw_lock) - bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO); - - mutex_unlock(&bp->port.phy_mutex); -} - diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.h deleted file mode 100644 index 75d8f39..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_common.h +++ /dev/null @@ -1,1522 +0,0 @@ -/* bnx2x_common.h: Broadcom Everest network driver. - * - * Copyright (c) 2007-2011 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation. - * - * Maintained by: Eilon Greenstein - * Written by: Eliezer Tamir - * Based on code from Michael Chan's bnx2 driver - * UDP CSUM errata workaround by Arik Gendelman - * Slowpath and fastpath rework by Vladislav Zolotarov - * Statistics and Link management by Yitchak Gertner - * - */ -#ifndef BNX2X_COMMON_H -#define BNX2X_COMMON_H - -#include -#include -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include -#endif -#include -#include -#include - -extern struct iro e1_iro_arr[]; -extern struct iro e1h_iro_arr[]; -extern struct iro e2_iro_arr[]; -/* This is used as a replacement for an MCP if it's not present */ -extern int load_count[2][3]; /* per-path: 0-common, 1-port0, 2-port1 */ - -extern int int_mode; -extern int num_queues; - -/************************ Macros ********************************/ -#define BNX2X_FW_IP_HDR_ALIGN_PAD 2 /* FW places hdr with this padding */ - -#define IGU_U_SB_OFFSET(bp) ((bp)->igu_sb_cnt/2) - -#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ -#define BNX2X_PCI_FREE(x, y, size) \ - do { \ - if (x) { \ - dma_free_coherent(&bp->pdev->dev, size, (void*)x, y); \ - x = NULL; \ - y = 0; \ - } \ - } while (0) -#else -#define BNX2X_PCI_FREE(x, y, size) \ - do { \ - if (x) { \ - pci_free_consistent(bp->pdev, size, (void*)x, y); \ - x = NULL; \ - y = 0; \ - } \ - } while (0) -#endif - -#define BNX2X_FREE(x) \ - do { \ - if (x) { \ - kfree((void*)x); \ - x = NULL; \ - } \ - } while (0) - -#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ -#define BNX2X_PCI_ALLOC(x, y, size) \ - do { \ - x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ - if (x == NULL) \ - goto alloc_mem_err; \ - memset((void*)x, 0, size); \ - } while (0) -#else -#define BNX2X_PCI_ALLOC(x, y, size) \ - do { \ - x = pci_alloc_consistent(bp->pdev, size, y); \ - if (x == NULL) \ - goto alloc_mem_err; \ - memset((void*)x, 0, size); \ - } while (0) -#endif - -#define BNX2X_ALLOC(x, size) \ - do { \ - x = kzalloc(size, GFP_KERNEL); \ - if (x == NULL) \ - goto alloc_mem_err; \ - } while (0) - -/*********************** Interfaces **************************** - * Functions that need to be implemented by each driver version - */ -/* Init */ - -/** - * Init HW blocks according to current initialization stage: - * COMMON, PORT or FUNCTION. - * - * @param bp - * @param load_code: COMMON, PORT or FUNCTION - * - * @return int - */ -int bnx2x_init_hw(struct bnx2x *bp, u32 load_code); - -/** - * Init driver internals: - * - rings - * - status blocks - * - etc. - * - * @param bp - * @param load_code COMMON, PORT or FUNCTION - */ -void bnx2x_nic_init(struct bnx2x *bp, u32 load_code); - -/** - * Setup non-leading eth Client. - * - * @param bp - * @param fp - * - * @return int - */ -int bnx2x_setup_client(struct bnx2x *bp, struct bnx2x_fastpath *fp, - int leading); - -/** - * Bring up a leading (the first) eth Client. - * - * @param bp - * - * @return int - */ -int bnx2x_setup_leading(struct bnx2x *bp); - -/** - * Init/halt function before/after sending - * CLIENT_SETUP/CFC_DEL for the first/last client. - * - * @param bp - * - * @return int - */ -int bnx2x_func_start(struct bnx2x *bp); -int bnx2x_func_stop(struct bnx2x *bp); - -/** - * Bring down a non-leading eth Client. - * - * @param bp - * @param p - * - * @return int - */ -int bnx2x_stop_fw_client(struct bnx2x *bp, struct bnx2x_client_ramrod_params *p); - -/** - * Prepare ILT configurations according to current driver - * parameters. - * - * @param bp - */ -void bnx2x_ilt_set_info(struct bnx2x *bp); - -/** - * Configure eth MAC address in the HW according to the value in - * netdev->dev_addr. - * - * @param bp - * @param set - */ -void bnx2x_set_eth_mac(struct bnx2x *bp, bool set); - - -#ifdef BCM_CNIC -/** - * Set/Clear FIP MAC(s) at the next enties in the CAM after the ETH - * MAC(s). This function will wait until the ramdord completion - * returns. - * - * @param bp driver handle - * @param set set or clear the CAM entry - * - * @return 0 if cussess, -ENODEV if ramrod doesn't return. - */ -int bnx2x_set_fip_eth_mac_addr(struct bnx2x *bp, bool set); - -/** - * Set iSCSI MAC(s) at the next enties in the CAM after the ETH - * MAC(s). This function will wait until the ramdord completion - * returns. - * - * @param bp driver handle - * @param set set or clear the CAM entry - * - * @return 0 if cussess, -ENODEV if ramrod doesn't return. - */ -int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, bool set); - -/** - * Set/Clear ALL_ENODE mcast MAC. - * - * @param bp - * @param set - * - * @return int - */ -int bnx2x_set_all_enode_macs(struct bnx2x *bp, bool set); -#endif - - -/** - * Send the MCP a request, block until there is a reply. - * - * @param bp - * @param command - * @param param - * - * @return u32 - */ -u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); - -/** - * Initialize link parameters structure variables. - * - * @param bp - * @param load_mode - * - * @return u8 - */ -u8 bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode); - -/** - * Free driver's memories. - * - * @param bp - */ -void bnx2x_free_mem(struct bnx2x *bp); - -/** - * Allocate driver's memory. - * - * @param bp - * - * @return int - */ -int bnx2x_alloc_mem(struct bnx2x *bp); - -/** - * Acquire HW lock. - * - * @param bp - * @param resource Resource bit which was locked - * - * @return int - */ -int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource); - -/** - * Release HW lock. - * - * @param bp - * @param resource Resource bit which was locked - * - * @return int - */ -int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); - -/** - * Configure MAC filtering rules in a FW according to bp->rx_mode. - * If bp->state is OPEN, - * should be called with netif_addr_lock_bh(). - * - * @param bp - * @param wait If true, wait for completion - */ -void bnx2x_set_storm_rx_mode(struct bnx2x *bp, bool wait); - -/** - * Disable interrupts. This function ensures that there are no - * ISRs or SP DPCs (sp_task) are running after it returns. - * - * @param bp - * @param disable_hw if true, disable HW interrupts. - */ -void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw); - -/** - * Disable interrupts. - * @param bp - */ -void bnx2x_int_disable(struct bnx2x *bp); - -/** - * Enable HW interrupts. - * - * @param bp - */ -void bnx2x_int_enable(struct bnx2x *bp); - -/** - * Write driver pulse to shmem: writes the value in - * bp->fw_drv_pulse_wr_seq to drv_pulse mbox in the shmem. - * - * @param bp - */ -void bnx2x_drv_pulse(struct bnx2x *bp); - -/** - * Write an ack to IGU. - * - * @param bp - * @param igu_sb_id - * @param segment - * @param index - * @param op - * @param update - */ -void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, - u16 index, u8 op, u8 update); - -/** - * - * @param bp - */ -void bnx2x_dcbx_init(struct bnx2x *bp); - -/** - * Set power state to the requested value. Currently only D0 and - * D3hot are supported. - * - * @param bp - * @param state D0 or D3hot - * - * @return int - */ -int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state); - -#if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) -irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance, - struct pt_regs *regs); -irqreturn_t bnx2x_interrupt(int irq, void *dev_instance, - struct pt_regs *regs); -#else /* BNX2X_UPSTREAM */ -irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance); -irqreturn_t bnx2x_interrupt(int irq, void *dev_instance); -#endif - -/** - * Cleanup chip internals: - * - Cleanup MAC configuration. - * - Close clients. - * - etc. - * - * @param bp - * @param unload_mode - */ -void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode); - -/** - * Set MAC filtering configurations. If bp->state is OPEN, - * should be called with netif_addr_lock_bh(). - * - * @remarks called with netif_tx_lock from dev_mcast.c - * - * @param dev - */ -void bnx2x_set_rx_mode(struct net_device *dev); - -/** - * disables tx from stack point of view - * - * @param bp - */ - -static inline void bnx2x_tx_disable(struct bnx2x *bp) -{ - netif_tx_disable(bp->dev); - netif_carrier_off(bp->dev); -} - -/** Configures rx_mode for a single client. - * - * @param bp - * @param cl_id - * @param rx_mode_flags - * @param accept_flags - * @param wait - */ -void bnx2x_set_cl_rx_mode(struct bnx2x *bp, u8 cl_id, - unsigned long rx_mode_flags, - unsigned long accept_flags, - unsigned long ramrod_flags); - -/* Parity errors related */ -void bnx2x_inc_load_cnt(struct bnx2x *bp); -u32 bnx2x_dec_load_cnt(struct bnx2x *bp); -bool bnx2x_chk_parity_attn(struct bnx2x *bp); -bool bnx2x_reset_is_done(struct bnx2x *bp); -void bnx2x_disable_close_the_gate(struct bnx2x *bp); - -void bnx2x__link_status_update(struct bnx2x *bp); - -/* Handle ramrods completion */ -void bnx2x_sp_event(struct bnx2x_fastpath *fp, - union eth_rx_cqe *rr_cqe); - -/* Statistics */ -void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event); - -#ifdef BCM_CNIC -int bnx2x_cnic_notify(struct bnx2x *bp, int cmd); -void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); -#endif - -/* Error handling */ -void bnx2x_panic_dump(struct bnx2x *bp); -/********************************************************/ - -/**************** Common functions ***********************/ - -/* dev_close main block */ -int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode); - -#if !defined(BNX2X_NEW_NAPI) && defined(USE_NAPI_GRO) /* ! BNX2X_UPSTREAM */ -int __bnx2x_poll(struct napi_struct *napi, int budget); -#endif - -void bnx2x_set_num_queues(struct bnx2x *bp); - -/* dev_open main block */ -int bnx2x_nic_load(struct bnx2x *bp, int load_mode); - -#if defined(BNX2X_SAFC) || defined(BCM_CNIC) /* ! BNX2X_UPSTREAM */ -u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb); -#endif - -/* hard_xmit callback */ -int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev); - -int bnx2x_change_mac_addr(struct net_device *dev, void *p); - -/* NAPI poll Rx part */ -int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget); - -void bnx2x_update_rx_prod(struct bnx2x *bp, struct bnx2x_fastpath *fp, - u16 bd_prod, u16 rx_comp_prod, u16 rx_sge_prod); - -/* NAPI poll Tx part */ -int bnx2x_tx_int(struct bnx2x_fastpath *fp); - -/* suspend/resume callbacks */ -int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state); -int bnx2x_resume(struct pci_dev *pdev); - -/** - * Request single ISR interrupt line (MSI or INT#x). - * - * @param bp - * - * @return int - */ -int bnx2x_req_irq(struct bnx2x *bp); - -/** - * Enable MSI. - * - * @param bp - * - * @return int - */ -int bnx2x_enable_msi(struct bnx2x *bp); - -void bnx2x_free_fp_mem(struct bnx2x *bp); -int bnx2x_alloc_fp_mem(struct bnx2x *bp); -void bnx2x_napi_enable(struct bnx2x *bp); -void bnx2x_init_rx_rings(struct bnx2x *bp); -void bnx2x_free_skbs(struct bnx2x *bp); -void bnx2x_napi_disable(struct bnx2x *bp); -void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw); -void bnx2x_netif_start(struct bnx2x *bp); - -#if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) -irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie, - struct pt_regs *regs); -#ifdef BCM_CNIC -irqreturn_t bnx2x_msix_cnic_int(int irq, void *fp_cookie, - struct pt_regs *regs); -#endif -#else /* BNX2X_UPSTREAM */ -/** - * FP and SP MSI-X ISR. - * - * @param irq - * @param fp_cookie - * - * @return irqreturn_t - */ -irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie); -#ifdef BCM_CNIC -irqreturn_t bnx2x_msix_cnic_int(int irq, void *fp_cookie); -#endif -#endif - - -void bnx2x_free_msix_irqs(struct bnx2x *bp, int num_queues); -int bnx2x_enable_msix(struct bnx2x *bp); -int bnx2x_req_msix_irqs(struct bnx2x *bp); -/** - * Request IRQ vectors from OS. - * - * @param bp - * - * @return int - */ -int bnx2x_setup_irqs(struct bnx2x *bp); - -/* Release IRQ vectors */ -void bnx2x_free_irq(struct bnx2x *bp); - -void bnx2x_link_report(struct bnx2x *bp); - -/* ethtool callbacks */ -int bnx2x_get_settings(struct net_device *dev, struct ethtool_cmd *cmd); -u32 bnx2x_get_msglevel(struct net_device *dev); -void bnx2x_set_msglevel(struct net_device *dev, u32 level); -int bnx2x_get_coalesce(struct net_device *dev, - struct ethtool_coalesce *coal); -void bnx2x_get_ringparam(struct net_device *dev, - struct ethtool_ringparam *ering); -int bnx2x_set_ringparam(struct net_device *dev, - struct ethtool_ringparam *ering); -void bnx2x_get_pauseparam(struct net_device *dev, - struct ethtool_pauseparam *epause); -#if defined(BNX2X_NEW_NAPI) /* BNX2X_UPSTREAM */ -int bnx2x_poll(struct napi_struct *napi, int budget); -#else -int bnx2x_poll(struct net_device *dev, int *budget); -#endif - -int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp); -void bnx2x_free_mem_bp(struct bnx2x *bp); - -#if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ -int bnx2x_set_flags(struct net_device *dev, u32 data); -#endif - -u32 bnx2x_get_rx_csum(struct net_device *dev); -int bnx2x_set_rx_csum(struct net_device *dev, u32 data); -int bnx2x_set_tso(struct net_device *dev, u32 data); -int bnx2x_change_mtu(struct net_device *dev, int new_mtu); -void bnx2x_tx_timeout(struct net_device *dev); -#ifdef BCM_VLAN -/* called with rtnl_lock */ -void bnx2x_vlan_rx_register(struct net_device *dev, - struct vlan_group *vlgrp); - -void bnx2x_vlan_rx_kill_vid(struct net_device *dev, u16 vid); -void bnx2x_vlan_rx_add_vid(struct net_device *dev, u16 vid); -#endif - -/*********************** Inlines **********************************/ -/*********************** Fast path ********************************/ -static inline int bnx2x_has_tx_work(struct bnx2x_fastpath *fp) -{ - u16 hw_cons; - - /* Tell compiler that status block fields can change */ - barrier(); - hw_cons = le16_to_cpu(*fp->tx_cons_sb); - return hw_cons != fp->tx_pkt_cons; -} - -static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp) -{ - u16 rx_cons_sb; - - /* Tell compiler that status block fields can change */ - barrier(); - rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb); - if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT) - rx_cons_sb++; - return (fp->rx_comp_cons != rx_cons_sb); -} - -static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id, - u8 segment, u16 index, u8 op, - u8 update, u32 igu_addr) -{ - struct igu_regular cmd_data = {0}; - - cmd_data.sb_id_and_flags = - ((index << IGU_REGULAR_SB_INDEX_SHIFT) | - (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | - (update << IGU_REGULAR_BUPDATE_SHIFT) | - (op << IGU_REGULAR_ENABLE_INT_SHIFT)); - - DP(NETIF_MSG_HW, "write 0x%08x to IGU addr 0x%x\n", - cmd_data.sb_id_and_flags, igu_addr); - REG_WR(bp, igu_addr, cmd_data.sb_id_and_flags); - - /* Make sure that ACK is written */ - mmiowb(); - barrier(); -} - -static inline void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, - u8 idu_sb_id, bool is_Pf) -{ - u32 data, ctl, cnt = 100; - u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA; - u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL; - u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4; - u32 sb_bit = 1 << (idu_sb_id%32); - u32 func_encode = func | - ((is_Pf == true ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT); - u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id; - - /* Not supported in BC mode */ - if (CHIP_INT_MODE_IS_BC(bp)) - return; - - data = (IGU_USE_REGISTER_cstorm_type_0_sb_cleanup - << IGU_REGULAR_CLEANUP_TYPE_SHIFT) | - IGU_REGULAR_CLEANUP_SET | - IGU_REGULAR_BCLEANUP; - - ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT | - func_encode << IGU_CTRL_REG_FID_SHIFT | - IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT; - - DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", - data, igu_addr_data); - REG_WR(bp, igu_addr_data, data); - mmiowb(); - barrier(); - DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", - ctl, igu_addr_ctl); - REG_WR(bp, igu_addr_ctl, ctl); - mmiowb(); - barrier(); - - /* wait for clean up to finish */ - while (!(REG_RD(bp, igu_addr_ack) & sb_bit) && --cnt) - msleep(10); - - - if (!(REG_RD(bp, igu_addr_ack) & sb_bit)) { - DP(NETIF_MSG_HW, "Unable to finish IGU cleanup: " - "idu_sb_id %d offset %d bit %d (cnt %d)\n", - idu_sb_id, idu_sb_id/32, idu_sb_id%32, cnt); - } -} - -static inline void bnx2x_update_rx_prod_gen(struct bnx2x *bp, - struct bnx2x_fastpath *fp, u16 bd_prod, - u16 rx_comp_prod, u16 rx_sge_prod, u32 start) -{ - struct ustorm_eth_rx_producers rx_prods = {0}; - u32 i; - - /* Update producers */ - rx_prods.bd_prod = bd_prod; - rx_prods.cqe_prod = rx_comp_prod; - rx_prods.sge_prod = rx_sge_prod; - - /* - * Make sure that the BD and SGE data is updated before updating the - * producers since FW might read the BD/SGE right after the producer - * is updated. - * This is only applicable for weak-ordered memory model archs such - * as IA-64. The following barrier is also mandatory since FW will - * assumes BDs must have buffers. - */ - wmb(); - - for (i = 0; i < sizeof(rx_prods)/4; i++) - REG_WR(bp, start + i*4, ((u32 *)&rx_prods)[i]); - - mmiowb(); /* keep prod updates ordered */ - - DP(NETIF_MSG_RX_STATUS, - "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", - fp->index, bd_prod, rx_comp_prod, rx_sge_prod); -} - -static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id, - u8 storm, u16 index, u8 op, u8 update) -{ - u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + - COMMAND_REG_INT_ACK); - struct igu_ack_register igu_ack; - - igu_ack.status_block_index = index; - igu_ack.sb_id_and_flags = - ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | - (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | - (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | - (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); - -#if (LINUX_VERSION_CODE < 0x020600) /* ! BNX2X_UPSTREAM */ - /* x86's writel() in 2.4.x does not have barrier(). */ - barrier(); -#endif - DP(BNX2X_MSG_OFF, "write 0x%08x to HC addr 0x%x\n", - (*(u32 *)&igu_ack), hc_addr); - REG_WR(bp, hc_addr, (*(u32 *)&igu_ack)); - - /* Make sure that ACK is written */ - mmiowb(); - barrier(); -} - -static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 storm, - u16 index, u8 op, u8 update) -{ - if (bp->common.int_block == INT_BLOCK_HC) - bnx2x_hc_ack_sb(bp, igu_sb_id, storm, index, op, update); - else { - u8 segment; - - if (CHIP_INT_MODE_IS_BC(bp)) - segment = storm; - else if (igu_sb_id != bp->igu_dsb_id) - segment = IGU_SEG_ACCESS_DEF; - else if (storm == ATTENTION_ID) - segment = IGU_SEG_ACCESS_ATTN; - else - segment = IGU_SEG_ACCESS_DEF; - bnx2x_igu_ack_sb(bp, igu_sb_id, segment, index, op, update); - } -} - -static inline void bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp) -{ - barrier(); /* status block is written to by the chip */ - fp->fp_hc_idx = fp->sb_running_index[SM_RX_ID]; -} - -static inline u16 bnx2x_hc_ack_int(struct bnx2x *bp) -{ - u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + - COMMAND_REG_SIMD_MASK); - u32 result = REG_RD(bp, hc_addr); - - DP(BNX2X_MSG_OFF, "read 0x%08x from HC addr 0x%x\n", - result, hc_addr); - - barrier(); - return result; -} - -static inline u16 bnx2x_igu_ack_int(struct bnx2x *bp) -{ - u32 igu_addr = (BAR_IGU_INTMEM + IGU_REG_SISR_MDPC_WMASK_LSB_UPPER*8); - u32 result = REG_RD(bp, igu_addr); - - DP(NETIF_MSG_HW, "read 0x%08x from IGU addr 0x%x\n", - result, igu_addr); - - barrier(); - return result; -} - -static inline u16 bnx2x_ack_int(struct bnx2x *bp) -{ - barrier(); - if (bp->common.int_block == INT_BLOCK_HC) - return bnx2x_hc_ack_int(bp); - else - return bnx2x_igu_ack_int(bp); -} - -static inline int bnx2x_alloc_rx_skb(struct bnx2x *bp, - struct bnx2x_fastpath *fp, u16 index) -{ - struct sk_buff *skb; - struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[index]; - struct eth_rx_bd *rx_bd = &fp->rx_desc_ring[index]; - dma_addr_t mapping; - - skb = netdev_alloc_skb(bp->dev, bp->rx_buf_size); - if (unlikely(skb == NULL)) - return -ENOMEM; - -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - mapping = dma_map_single(&bp->pdev->dev, skb->data, bp->rx_buf_size, - DMA_FROM_DEVICE); -#else - mapping = pci_map_single(bp->pdev, skb->data, bp->rx_buf_size, - PCI_DMA_FROMDEVICE); -#endif -#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ - if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { -#else - if (unlikely(dma_mapping_error(mapping))) { -#endif - dev_kfree_skb(skb); - return -ENOMEM; - } - - rx_buf->skb = skb; -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_addr_set(rx_buf, mapping, mapping); -#else - pci_unmap_addr_set(rx_buf, mapping, mapping); -#endif - - rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - - return 0; -} - -/* note that we are not allocating a new skb, - * we are just moving one from cons to prod - * we are not creating a new mapping, - * so there is no need to check for dma_mapping_error(). - */ -static inline void bnx2x_reuse_rx_skb(struct bnx2x_fastpath *fp, - u16 cons, u16 prod) -{ - struct bnx2x *bp = fp->bp; - struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; - struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; - struct eth_rx_bd *cons_bd = &fp->rx_desc_ring[cons]; - struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; - -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_sync_single_for_device(&bp->pdev->dev, - dma_unmap_addr(cons_rx_buf, mapping), - RX_COPY_THRESH, DMA_FROM_DEVICE); - - dma_unmap_addr_set(prod_rx_buf, mapping, - dma_unmap_addr(cons_rx_buf, mapping)); -#else - pci_dma_sync_single_for_device(bp->pdev, - pci_unmap_addr(cons_rx_buf, mapping), - RX_COPY_THRESH, PCI_DMA_FROMDEVICE); - - pci_unmap_addr_set(prod_rx_buf, mapping, - pci_unmap_addr(cons_rx_buf, mapping)); -#endif - prod_rx_buf->skb = cons_rx_buf->skb; - *prod_bd = *cons_bd; -} - -static inline int bnx2x_has_tx_work_unload(struct bnx2x_fastpath *fp) -{ - /* Tell compiler that consumer and producer can change */ - barrier(); - return (fp->tx_pkt_prod != fp->tx_pkt_cons); -} - -static inline u16 bnx2x_tx_avail(struct bnx2x_fastpath *fp) -{ - s16 used; - u16 prod; - u16 cons; - - prod = fp->tx_bd_prod; - cons = fp->tx_bd_cons; - - /* NUM_TX_RINGS = number of "next-page" entries - It will be used as a threshold */ - used = SUB_S16(prod, cons) + (s16)NUM_TX_RINGS; - -#ifdef BNX2X_STOP_ON_ERROR - WARN_ON(used < 0); - WARN_ON(used > fp->bp->tx_ring_size); - WARN_ON((fp->bp->tx_ring_size - used) > MAX_TX_AVAIL); -#endif - - return (s16)(fp->bp->tx_ring_size) - used; -} - -static inline void bnx2x_clear_sge_mask_next_elems(struct bnx2x_fastpath *fp) -{ - int i, j; - - for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { - int idx = RX_SGE_CNT * i - 1; - - for (j = 0; j < 2; j++) { - BIT_VEC64_CLEAR_BIT(fp->sge_mask, idx); - idx--; - } - } -} - -/************************* Init ******************************************/ -static inline void bnx2x_add_all_napi(struct bnx2x *bp) -{ - int i; - - /* Add NAPI objects */ - for_each_napi_queue(bp, i) -#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - if (!bnx2x_fp(bp, i, napi).net_poll) -#endif /* __VMKLNX__ */ - netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), - bnx2x_poll, BNX2X_NAPI_WEIGHT); -#else /* ! BNX2X_UPSTREAM */ - { - /* initialize net_device for each rx queue */ - struct net_device *dummy_netdev = &bnx2x_fp(bp, i, dummy_netdev); -#if defined(USE_NAPI_GRO) - struct napi_struct *napi = &bnx2x_fp(bp, i, napi); - napi->dev = bp->dev; -#endif - dummy_netdev->priv = &bp->fp[i]; - dummy_netdev->poll = bnx2x_poll; - dummy_netdev->weight = BNX2X_NAPI_WEIGHT; - set_bit(__LINK_STATE_START, &dummy_netdev->state); - } -#endif -} - -static inline void bnx2x_del_all_napi(struct bnx2x *bp) -{ -#if defined(BNX2X_NEW_NAPI) && (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ - int i; - - for_each_napi_queue(bp, i) - netif_napi_del(&bnx2x_fp(bp, i, napi)); -#endif -} - -static inline void bnx2x_disable_msi(struct bnx2x *bp) -{ - if (bp->flags & USING_MSIX_FLAG) { - pci_disable_msix(bp->pdev); - bp->flags &= ~USING_MSIX_FLAG; - } else if (bp->flags & USING_MSI_FLAG) { - pci_disable_msi(bp->pdev); - bp->flags &= ~USING_MSI_FLAG; - } -} - -static inline int bnx2x_calc_num_queues(struct bnx2x *bp) -{ - return (num_queues ? - min_t(int, num_queues, BNX2X_MAX_QUEUES(bp)) : - min_t(int, num_online_cpus(), BNX2X_MAX_QUEUES(bp))); -} - -static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp) -{ - /* Set the mask to all 1-s: it's faster to compare to 0 than to 0xf-s */ - memset(fp->sge_mask, 0xff, - (NUM_RX_SGE >> BIT_VEC64_ELEM_SHIFT)*sizeof(u64)); - - /* Clear the two last indices in the page to 1: - these are the indices that correspond to the "next" element, - hence will never be indicated and should be removed from - the calculations. */ - bnx2x_clear_sge_mask_next_elems(fp); -} - -static inline int bnx2x_alloc_rx_sge(struct bnx2x *bp, - struct bnx2x_fastpath *fp, u16 index) -{ - struct page *page = alloc_pages(GFP_ATOMIC, PAGES_PER_SGE_SHIFT); - struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; - struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; - dma_addr_t mapping; - - if (unlikely(page == NULL)) - return -ENOMEM; - -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - mapping = dma_map_page(&bp->pdev->dev, page, 0, SGE_PAGE_SIZE*PAGES_PER_SGE, - DMA_FROM_DEVICE); -#else - mapping = pci_map_page(bp->pdev, page, 0, SGE_PAGE_SIZE*PAGES_PER_SGE, - PCI_DMA_FROMDEVICE); -#endif -#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ - if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { -#else - if (unlikely(dma_mapping_error(mapping))) { -#endif - __free_pages(page, PAGES_PER_SGE_SHIFT); - return -ENOMEM; - } - - sw_buf->page = page; -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_addr_set(sw_buf, mapping, mapping); -#else - pci_unmap_addr_set(sw_buf, mapping, mapping); -#endif - - sge->addr_hi = cpu_to_le32(U64_HI(mapping)); - sge->addr_lo = cpu_to_le32(U64_LO(mapping)); - - return 0; -} - -static inline void bnx2x_free_rx_sge(struct bnx2x *bp, - struct bnx2x_fastpath *fp, u16 index) -{ - struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; - struct page *page = sw_buf->page; - struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; - - /* Skip "next page" elements */ - if (!page) - return; - -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping), - SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE); -#else - pci_unmap_page(bp->pdev, pci_unmap_addr(sw_buf, mapping), - SGE_PAGE_SIZE*PAGES_PER_SGE, PCI_DMA_FROMDEVICE); -#endif - __free_pages(page, PAGES_PER_SGE_SHIFT); - - sw_buf->page = NULL; - sge->addr_hi = 0; - sge->addr_lo = 0; -} - - -static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp, - struct bnx2x_fastpath *fp, int last) -{ - int i; - - if (fp->disable_tpa) - return; - - for (i = 0; i < last; i++) - bnx2x_free_rx_sge(bp, fp, i); -} - - -static inline void bnx2x_free_tpa_pool(struct bnx2x *bp, - struct bnx2x_fastpath *fp, int last) -{ - int i; - - for (i = 0; i < last; i++) { - struct sw_rx_bd *rx_buf = &(fp->tpa_pool[i]); - struct sk_buff *skb = rx_buf->skb; - - if (skb == NULL) { - DP(NETIF_MSG_IFDOWN, "tpa bin %d empty on free\n", i); - continue; - } - - if (fp->tpa_state[i] == BNX2X_TPA_START) -#if (LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ - dma_unmap_single(&bp->pdev->dev, - dma_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, DMA_FROM_DEVICE); -#else - pci_unmap_single(bp->pdev, - pci_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, PCI_DMA_FROMDEVICE); -#endif - - dev_kfree_skb(skb); - rx_buf->skb = NULL; - } -} - -static inline void bnx2x_set_next_page_rx_bd(struct bnx2x_fastpath *fp) -{ - int i; - - for (i = 1; i <= NUM_RX_RINGS; i++) { - struct eth_rx_bd *rx_bd; - - rx_bd = &fp->rx_desc_ring[RX_DESC_CNT * i - 2]; - rx_bd->addr_hi = - cpu_to_le32(U64_HI(fp->rx_desc_mapping + - BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); - rx_bd->addr_lo = - cpu_to_le32(U64_LO(fp->rx_desc_mapping + - BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); - } -} - -static inline void bnx2x_set_next_page_sgl(struct bnx2x_fastpath *fp) -{ - int i; - - for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { - struct eth_rx_sge *sge; - - sge = &fp->rx_sge_ring[RX_SGE_CNT * i - 2]; - sge->addr_hi = - cpu_to_le32(U64_HI(fp->rx_sge_mapping + - BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES))); - - sge->addr_lo = - cpu_to_le32(U64_LO(fp->rx_sge_mapping + - BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES))); - } -} - -static inline void bnx2x_set_next_page_rx_cq(struct bnx2x_fastpath *fp) -{ - int i; - for (i = 1; i <= NUM_RCQ_RINGS; i++) { - struct eth_rx_cqe_next_page *nextpg; - - nextpg = (struct eth_rx_cqe_next_page *) - &fp->rx_comp_ring[RCQ_DESC_CNT * i - 1]; - nextpg->addr_hi = - cpu_to_le32(U64_HI(fp->rx_comp_mapping + - BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS))); - nextpg->addr_lo = - cpu_to_le32(U64_LO(fp->rx_comp_mapping + - BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS))); - } -} - -/* Returns the number of actually allocated BDs */ -static inline int bnx2x_alloc_rx_bds(struct bnx2x_fastpath *fp, - int rx_ring_size) -{ - struct bnx2x *bp = fp->bp; - u16 ring_prod, cqe_ring_prod; - int i; - - fp->rx_comp_cons = 0; - cqe_ring_prod = ring_prod = 0; - - /* This routine is called only during for init so - * fp->eth_q_stats.rx_skb_alloc_failed = 0 - */ - for (i = 0; i < rx_ring_size; i++) { - if (bnx2x_alloc_rx_skb(bp, fp, ring_prod) < 0) { - fp->eth_q_stats.rx_skb_alloc_failed++; - continue; - } - ring_prod = NEXT_RX_IDX(ring_prod); - cqe_ring_prod = NEXT_RCQ_IDX(cqe_ring_prod); - WARN_ON(ring_prod <= (i - fp->eth_q_stats.rx_skb_alloc_failed)); - } - if (fp->eth_q_stats.rx_skb_alloc_failed) - BNX2X_ERR("was only able to allocate " - "%d rx skbs on queue[%d]\n", - (i - fp->eth_q_stats.rx_skb_alloc_failed), fp->index); - - fp->rx_bd_prod = ring_prod; - /* Limit the CQE producer by the CQE ring size */ - fp->rx_comp_prod = min_t(u16, NUM_RCQ_RINGS*RCQ_DESC_CNT, - cqe_ring_prod); - fp->rx_pkt = fp->rx_calls = 0; - - return (i - fp->eth_q_stats.rx_skb_alloc_failed); -} - -static inline void bnx2x_init_tx_ring_one(struct bnx2x_fastpath *fp) -{ - int i; - - for (i = 1; i <= NUM_TX_RINGS; i++) { - struct eth_tx_next_bd *tx_next_bd = - &fp->tx_desc_ring[TX_DESC_CNT * i - 1].next_bd; - - tx_next_bd->addr_hi = - cpu_to_le32(U64_HI(fp->tx_desc_mapping + - BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); - tx_next_bd->addr_lo = - cpu_to_le32(U64_LO(fp->tx_desc_mapping + - BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); - } - - SET_FLAG(fp->tx_db.data.header.header, DOORBELL_HDR_DB_TYPE, 1); - fp->tx_db.data.zero_fill1 = 0; - fp->tx_db.data.prod = 0; - - fp->tx_pkt_prod = 0; - fp->tx_pkt_cons = 0; - fp->tx_bd_prod = 0; - fp->tx_bd_cons = 0; - fp->tx_pkt = 0; -} - -static inline void bnx2x_init_tx_rings(struct bnx2x *bp) -{ - int i; - - for_each_tx_queue(bp, i) - bnx2x_init_tx_ring_one(&bp->fp[i]); - -} - -static inline void bnx2x_init_vlan_mac_fp_objs(struct bnx2x_fastpath *fp, - bnx2x_obj_type obj_type) -{ - struct bnx2x *bp = fp->bp; - - /* Configure classification DBs */ - bnx2x_init_mac_obj(bp, &fp->mac_obj, fp->cl_id, fp->cid, - BP_FUNC(bp), bnx2x_sp(bp, mac_rdata), - bnx2x_sp_mapping(bp, mac_rdata), - BNX2X_FILTER_MAC_PENDING, - &bp->sp_state, obj_type, - &bp->macs_pool); - - bnx2x_init_vlan_obj(bp, &fp->vlan_obj, fp->cl_id, fp->cid, - BP_FUNC(bp), bnx2x_sp(bp, vlan_rdata), - bnx2x_sp_mapping(bp, vlan_rdata), - BNX2X_FILTER_VLAN_PENDING, - &bp->sp_state, obj_type, - &bp->vlans_pool); -} - -static inline void bnx2x_init_bp_objs(struct bnx2x *bp) -{ - /* RX_MODE controlling object */ - bnx2x_init_rx_mode_obj(bp, &bp->rx_mode_obj); - - /* multicast configuration controlling object */ - bnx2x_init_mcast_obj(bp, &bp->mcast_obj, bp->fp->cl_id, bp->fp->cid, - BP_FUNC(bp), bnx2x_sp(bp, mcast_rdata), - bnx2x_sp_mapping(bp, mcast_rdata), - BNX2X_FILTER_MCAST_PENDING, &bp->sp_state, - BNX2X_OBJ_TYPE_RX); - - /* Setup CAM credit pools */ - bnx2x_init_mac_credit_pool(bp, &bp->macs_pool); - bnx2x_init_vlan_credit_pool(bp, &bp->vlans_pool); - - /* RSS configuration object */ - bnx2x_init_rss_config_obj(bp, &bp->rss_conf_obj, bp->fp->cl_id, - bp->fp->cid, BP_FUNC(bp), - bnx2x_sp(bp, rss_rdata), - bnx2x_sp_mapping(bp, rss_rdata), - BNX2X_FILTER_RSS_CONF_PENDING, &bp->sp_state, - BNX2X_OBJ_TYPE_RX); -} - -static inline u8 bnx2x_fp_cl_qzone_id(struct bnx2x_fastpath *fp) -{ - if (CHIP_IS_E1x(fp->bp)) - return fp->cl_id + BP_PORT(fp->bp) * ETH_MAX_RX_CLIENTS_E1H; - else - return fp->cl_id; -} - -static inline u32 bnx2x_rx_ustorm_prods_offset(struct bnx2x_fastpath *fp) -{ - struct bnx2x *bp = fp->bp; - - if (CHIP_IS_E2(bp)) - return USTORM_RX_PRODS_E2_OFFSET(fp->cl_qzone_id); - else - return USTORM_RX_PRODS_E1X_OFFSET(BP_PORT(bp), fp->cl_id); -} - - -#ifdef BCM_CNIC -/** - * Updates Rx producers according to iSCSI OOO ETH ring spec. - * - * @param bp - * @param fp - * @param bd_prod - * @param rx_comp_prod - * @param rx_sge_prod - */ -static inline void bnx2x_update_ooo_prod(struct bnx2x *bp, - struct bnx2x_fastpath *fp, u16 bd_prod, - u16 rx_comp_prod, u16 rx_sge_prod) -{ - struct ustorm_eth_rx_producers rx_prods = {0}; - u32 i; - u32 start = BAR_USTRORM_INTMEM + fp->ustorm_rx_prods_offset; - - /* Update producers */ - rx_prods.bd_prod = bd_prod + 0x4000; - rx_prods.cqe_prod = rx_comp_prod + 0x4000; - rx_prods.sge_prod = rx_sge_prod; - - /* - * Make sure that the BD and SGE data is updated before updating the - * producers since FW might read the BD/SGE right after the producer - * is updated. - * This is only applicable for weak-ordered memory model archs such - * as IA-64. The following barrier is also mandatory since FW will - * assumes BDs must have buffers. - */ - wmb(); - - for (i = 0; i < sizeof(rx_prods)/4; i++) - REG_WR(bp, start + i*4, ((u32 *)&rx_prods)[i]); - - mmiowb(); /* keep prod updates ordered */ - barrier(); - - REG_WR16(bp, BAR_TSTRORM_INTMEM + - TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(BP_FUNC(bp)), - fp->rx_pkts_avail); - - mmiowb(); /* keep prod updates ordered */ - - DP(NETIF_MSG_RX_STATUS, - "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", - fp->index, bd_prod, rx_comp_prod, rx_sge_prod); -} - -static inline int bnx2x_alloc_ooo_rx_bd_ring(struct bnx2x_fastpath *fp) -{ - struct bnx2x *bp = fp->bp; - int rx_ring_size = bp->rx_ring_size, i; - - /* - OOO BD ring size should be less or equal to half FWD - * Tx ring size. - * - OOO BD ring size must be less than than CQE ring size - * minus maximum number of outstanding ramrods. - */ - /* Delete me! For integration only! */ - rx_ring_size = min_t(int, bp->tx_ring_size / 2, 500); - - /*rx_ring_size = min_t(int, bp->tx_ring_size / 2, - bp->rx_ring_size); */ - - rx_ring_size = min_t(int, rx_ring_size, INIT_OOO_RING_SIZE); - - fp->rx_pkts_avail = bnx2x_alloc_rx_bds(fp, rx_ring_size); - - /* Add more CQEs for ramrods to ensure the demand above */ - for (i = 0; i < MAX_SPQ_PENDING; i++) - fp->rx_comp_prod = NEXT_RCQ_IDX(fp->rx_comp_prod); - - return fp->rx_pkts_avail; -} - -static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx) -{ - return bp->cnic_base_cl_id + cl_idx + - BP_E1HVN(bp) * NONE_ETH_CONTEXT_USE; -} - -static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp) { - - /* the 'first' id is allocated for the cnic */ - if (CHIP_IS_E1x(bp)) - return bp->base_fw_ndsb + BP_L_ID(bp); - else - return bp->base_fw_ndsb; -} -static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp) { - return bp->igu_base_sb; -} - - - -static inline void bnx2x_init_fcoe_fp(struct bnx2x *bp) -{ - struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); - - bnx2x_fcoe(bp, cl_id) = bnx2x_cnic_eth_cl_id(bp, - BNX2X_FCOE_ETH_CL_ID_IDX); - bnx2x_fcoe(bp, cid) = BNX2X_FCOE_ETH_CID; - bnx2x_fcoe(bp, fw_sb_id) = DEF_SB_ID; - bnx2x_fcoe(bp, igu_sb_id) = bp->igu_dsb_id; - bnx2x_fcoe(bp, bp) = bp; - bnx2x_fcoe(bp, state) = BNX2X_FP_STATE_CLOSED; - bnx2x_fcoe(bp, index) = FCOE_IDX; - bnx2x_fcoe(bp, rx_cons_sb) = BNX2X_FCOE_L2_RX_INDEX; - bnx2x_fcoe(bp, tx_cons_sb) = BNX2X_FCOE_L2_TX_INDEX; - /* qZone id equals to FW (per path) client id */ - bnx2x_fcoe(bp, cl_qzone_id) = bnx2x_fp_cl_qzone_id(fp); - /* init shortcut */ - bnx2x_fcoe(bp, ustorm_rx_prods_offset) = bnx2x_rx_ustorm_prods_offset(fp); - - /* Configure classification DBs */ - bnx2x_init_vlan_mac_fp_objs(fp, BNX2X_OBJ_TYPE_RX); -} - -static inline void bnx2x_init_ooo_fp(struct bnx2x *bp) -{ - struct bnx2x_fastpath *fp = bnx2x_ooo_fp(bp); - - bnx2x_ooo(bp, cl_id) = bnx2x_cnic_eth_cl_id(bp, - BNX2X_OOO_ETH_CL_ID_IDX); - bnx2x_ooo(bp, cid) = BNX2X_OOO_ETH_CID; - bnx2x_ooo(bp, fw_sb_id) = bnx2x_cnic_fw_sb_id(bp); - bnx2x_ooo(bp, igu_sb_id) = bnx2x_cnic_igu_sb_id(bp); - bnx2x_ooo(bp, bp) = bp; - bnx2x_ooo(bp, state) = BNX2X_FP_STATE_CLOSED; - bnx2x_ooo(bp, index) = OOO_IDX; - bnx2x_ooo(bp, rx_cons_sb) = BNX2X_RX_OOO_INDEX; - bnx2x_ooo(bp, tx_cons_sb) = NULL; /* No Tx for OOO client */ - /* qZone id equals to FW (per path) client id */ - bnx2x_ooo(bp, cl_qzone_id) = bnx2x_fp_cl_qzone_id(fp); - /* init shortcut */ - bnx2x_ooo(bp, ustorm_rx_prods_offset) = - bnx2x_rx_ustorm_prods_offset(fp); - - /* Init OOO related internal memory */ - /* Set OOO ring CID */ - REG_WR(bp, BAR_TSTRORM_INTMEM + - TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(BP_FUNC(bp)), - HW_CID(bp, bnx2x_ooo(bp, cid))); - - /* Set OOO ring Client ID */ - REG_WR8(bp, BAR_TSTRORM_INTMEM + - TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(BP_FUNC(bp)), - bnx2x_ooo(bp, cl_id)); - - /* Configure classification DBs */ - bnx2x_init_vlan_mac_fp_objs(fp, BNX2X_OBJ_TYPE_RX); -} - -static inline void bnx2x_init_fwd_fp(struct bnx2x *bp) -{ - struct bnx2x_fastpath *fp = bnx2x_fwd_fp(bp); - - bnx2x_fwd(bp, cl_id) = -1; /* No CL_ID for forwarding */ - bnx2x_fwd(bp, cid) = BNX2X_FWD_ETH_CID; - bnx2x_fwd(bp, fw_sb_id) = bnx2x_cnic_fw_sb_id(bp); /* Connect to CNIC SB */ - bnx2x_fwd(bp, igu_sb_id) = bnx2x_cnic_igu_sb_id(bp); - bnx2x_fwd(bp, bp) = bp; - bnx2x_fwd(bp, state) = BNX2X_FP_STATE_CLOSED; - bnx2x_fwd(bp, index) = FWD_IDX; - bnx2x_fwd(bp, rx_cons_sb) = NULL; - bnx2x_fwd(bp, tx_cons_sb) = BNX2X_TX_FWD_INDEX; -} -#endif - -static inline int bnx2x_clean_tx_queue(struct bnx2x *bp, - struct bnx2x_fastpath *fp) -{ - int cnt = 1000; - - while (bnx2x_has_tx_work_unload(fp)) { - if (!cnt) { - BNX2X_ERR("timeout waiting for queue[%d]: " - "fp->tx_pkt_prod(%d) != fp->tx_pkt_cons(%d)\n", - fp->index, fp->tx_pkt_prod, fp->tx_pkt_cons); -#ifdef BNX2X_STOP_ON_ERROR - bnx2x_panic(); - return -EBUSY; -#else - break; -#endif - } - cnt--; - msleep(1); - } - - return 0; -} - -void bnx2x_acquire_phy_lock(struct bnx2x *bp); -void bnx2x_release_phy_lock(struct bnx2x *bp); -int bnx2x_get_link_cfg_idx(struct bnx2x *bp); - -static inline void __storm_memset_struct(struct bnx2x *bp, - u32 addr, size_t size, u32 *data) -{ - int i; - for (i = 0; i < size/4; i++) - REG_WR(bp, addr + (i * 4), data[i]); -} - -static inline void storm_memset_func_cfg(struct bnx2x *bp, - struct tstorm_eth_function_common_config *tcfg, - u16 abs_fid) -{ - size_t size = sizeof(struct tstorm_eth_function_common_config); - - u32 addr = BAR_TSTRORM_INTMEM + - TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(abs_fid); - - __storm_memset_struct(bp, addr, size, (u32*)tcfg); -} - -static inline void storm_memset_cmng(struct bnx2x *bp, - struct cmng_struct_per_port *cmng, - u8 port) -{ - size_t size = sizeof(struct cmng_struct_per_port); - - u32 addr = BAR_XSTRORM_INTMEM + - XSTORM_CMNG_PER_PORT_VARS_OFFSET(port); - - __storm_memset_struct(bp, addr, size, (u32*)cmng); -} - -/* Waits for all outstanding SP commands to complete. */ -static inline bool bnx2x_wait_sp_comp(struct bnx2x *bp) -{ - int tout = 5000; /* Wait for 5 secs tops */ - - while (tout--) { - smp_mb(); - if (!bp->sp_state) - return true; - - msleep(1); - } - - smp_mb(); - if (bp->sp_state) { - BNX2X_ERR("Filtering completion timed out. sp_state 0x%lx\n", - bp->sp_state); - return false; - } - - return true; -} - - -#endif /* BNX2X_COMMON_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_compat.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_compat.h index f72982c..2438504 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_compat.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_compat.h @@ -1,6 +1,6 @@ /* bnx2x_compat.h: Broadcom Everest network driver. * - * Copyright 2007-2011 Broadcom Corporation + * Copyright 2007-2013 Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you @@ -18,25 +18,89 @@ #ifndef __VMKLNX__ #define VMWARE_ESX_DDK_VERSION 0 -#define __COMPAT_LAYER_2_6_18_PLUS__ 0 -#define __USE_COMPAT_LAYER_2_6_18_PLUS__ 0 #endif +#include #include #include +#ifndef KERNEL_VERSION +#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) +#endif + #if (LINUX_VERSION_CODE < 0x02061D) #include /* for vpd */ #endif #include #include +#include +#include -#if (LINUX_VERSION_CODE < 0x02061e) +#ifndef RHEL_RELEASE_VERSION +#define RHEL_RELEASE_VERSION(a, b) 0 +#endif + +#if (LINUX_VERSION_CODE < 0x020625) && (!defined(RHEL_RELEASE_CODE) || (RHEL_RELEASE_CODE <= RHEL_RELEASE_VERSION(6,3))) +#define OLD_VLAN 1 +#endif + +#if defined(OLD_VLAN) && (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) +#define BCM_VLAN 1 +#endif + +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,38)) +#define BCM_MULTI_COS +#endif + + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)) && \ + !defined(NETIF_F_MULTI_QUEUE) || \ + (defined(__VMKLNX__) && VMWARE_ESX_DDK_VERSION >= 40000) +#define BNX2X_MULTI_QUEUE +#endif + +#if (LINUX_VERSION_CODE >= 0x020618) || defined(__VMKLNX__) +#define BNX2X_NEW_NAPI +#endif + +#if !defined(BNX2X_NEW_NAPI) && defined(NAPI_GRO_CB) +#define USE_NAPI_GRO +#endif + +#if defined(BNX2X_MULTI_QUEUE) && !defined(__VMKLNX__) +#define BNX2X_SAFC +#endif + +#if defined(__VMKLNX__) +#if (VMWARE_ESX_DDK_VERSION >= 40000) +#define BNX2X_VMWARE_BMAPILNX +#else +#define __NO_TPA__ 1 +#endif +#if (VMWARE_ESX_DDK_VERSION == 41000) +typedef int bool; +#define false 0 +#define true 1 +#endif +#endif + +#ifndef __wsum +#define __wsum u32 +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)) #define skb_record_rx_queue(skb, index) - #ifdef BNX2X_MULTI_QUEUE -#include +static inline bool skb_rx_queue_recorded(const struct sk_buff *skb) +{ + return (skb->queue_mapping != 0); +} + +static inline u16 skb_get_rx_queue(const struct sk_buff *skb) +{ + return skb->queue_mapping - 1; +} #if !defined(__VMKLNX__) #include #else @@ -82,12 +146,31 @@ static inline u32 jhash_1word(u32 a, u32 initval) return jhash_3words(a, 0, 0, initval); } #endif +#endif +#endif +#if defined(BNX2X_MULTI_QUEUE) && \ + (!defined(RHEL_RELEASE_CODE) || RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,1)) && \ + (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) + +#include +#if !defined(__VMKLNX__) +#include +#endif #include static u32 bnx2x_skb_tx_hashrnd; -static inline u16 skb_tx_hash(const struct net_device *dev, - const struct sk_buff *skb) +static inline u16 __skb_tx_hash(const struct net_device *dev, + const struct sk_buff *skb, + unsigned int num_tx_queues) { u32 hash; + u16 qcount = num_tx_queues; + + if (skb_rx_queue_recorded(skb)) { + hash = skb_get_rx_queue(skb); + while (unlikely(hash >= num_tx_queues)) + hash -= num_tx_queues; + return hash; + } #if !defined(__VMKLNX__) if (skb->sk && skb->sk->sk_hash) @@ -98,10 +181,9 @@ static inline u16 skb_tx_hash(const struct net_device *dev, hash = jhash_1word(hash, bnx2x_skb_tx_hashrnd); - return (u16) (((u64) hash * dev->real_num_tx_queues) >> 32); + return (u16) (((u64) hash * qcount) >> 32); } #endif -#endif #if (LINUX_VERSION_CODE < 0x020618) && (VMWARE_ESX_DDK_VERSION < 40000) && !defined(NETIF_F_GRO) #define napi_complete(napi) netif_rx_complete(dev) @@ -118,6 +200,7 @@ static inline u16 skb_tx_hash(const struct net_device *dev, #endif #ifndef NETIF_F_GRO +#define NO_GRO_SUPPORT #define napi_gro_receive(napi, skb) netif_receive_skb(skb) #define vlan_gro_receive(napi, vlgrp, vlan, skb) \ vlan_hwaccel_receive_skb(skb, vlgrp, vlan) @@ -362,7 +445,7 @@ static inline int skb_is_gso(const struct sk_buff *skb) #define work_struct tq_struct #endif -#if !defined(HAVE_NETDEV_PRIV) && (LINUX_VERSION_CODE != 0x020603) && (LINUX_VERSION_CODE != 0x020604) && (LINUX_VERSION_CODE != 0x020605) +#if !defined(HAVE_NETDEV_PRIV) && (LINUX_VERSION_CODE < 0x030000) && (LINUX_VERSION_CODE != 0x020603) && (LINUX_VERSION_CODE != 0x020604) && (LINUX_VERSION_CODE != 0x020605) #define netdev_priv(dev) (dev)->priv #endif @@ -386,6 +469,18 @@ static inline int skb_is_gso(const struct sk_buff *skb) #define ADVERTISED_Asym_Pause (1 << 14) #endif +#ifndef ADVERTISED_1000baseKX_Full +#define ADVERTISED_1000baseKX_Full (1 << 17) +#endif + +#ifndef ADVERTISED_10000baseKX4_Full +#define ADVERTISED_10000baseKX4_Full (1 << 18) +#endif + +#ifndef ADVERTISED_10000baseKR_Full +#define ADVERTISED_10000baseKR_Full (1 << 19) +#endif + #ifndef NETDEV_TX_OK #define NETDEV_TX_OK 0 /* driver took care of packet */ #endif @@ -418,6 +513,19 @@ static inline int skb_is_gso(const struct sk_buff *skb) #define ETH_P_FIP 0x8914 #endif +#ifndef PORT_DA +#define PORT_DA 0x05 +#endif + +#ifndef PORT_NONE +#define PORT_NONE 0xef +#endif + +#ifndef PORT_OTHER +#define PORT_OTHER 0xff +#endif + + #if (LINUX_VERSION_CODE < 0x020618) #ifndef NETIF_F_HW_CSUM @@ -717,6 +825,17 @@ static inline int mdio_mii_ioctl(const struct mdio_if_info *mdio, } #endif +#if (LINUX_VERSION_CODE < 0x020624) && \ + (!defined(RHEL_RELEASE_CODE) || RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6, 3)) +static inline void usleep_range(unsigned long min, unsigned long max) +{ + if (min < 1000) + udelay(min); + else + msleep(min / 1000); +} +#endif + #if (LINUX_VERSION_CODE < 0x02061D) static inline ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, u8 *buf) @@ -727,7 +846,7 @@ pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, u8 *buf) if (!vpd_cap) return -ENODEV; - for (i = 0; i < count; i += 4) { + for (i = pos; i < count + pos; i += 4) { u32 tmp, j = 0; __le32 v; u16 tmp16; @@ -738,14 +857,14 @@ pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, u8 *buf) PCI_VPD_ADDR, &tmp16); if (tmp16 & 0x8000) break; - msleep(1); + usleep_range(1000, 1000); } if (!(tmp16 & 0x8000)) break; pci_read_config_dword(dev, vpd_cap + PCI_VPD_DATA, &tmp); v = cpu_to_le32(tmp); - memcpy(&buf[i], &v, sizeof(v)); + memcpy(&buf[i - pos], &v, sizeof(v)); } return i; @@ -782,28 +901,16 @@ int bnx2x_ilog2(int x) #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) #endif -#if (LINUX_VERSION_CODE < 0x02060c) +#if (LINUX_VERSION_CODE < 0x02060c) && !defined(RHEL_RELEASE_CODE) #define is_multicast_ether_addr(addr) (0x01 & (addr)[0]) #endif -#if (LINUX_VERSION_CODE < 0x02060e) +#if (LINUX_VERSION_CODE < 0x02060e) && !defined(RHEL_RELEASE_CODE) #define is_broadcast_ether_addr(addr)\ (((addr)[0] & (addr)[1] & (addr)[2] & (addr)[3] \ & (addr)[4] & (addr)[5]) == 0xff) #endif -#if (LINUX_VERSION_CODE < 0x020622) -static inline void list_rotate_left(struct list_head *head) -{ - struct list_head *first; - - if (!list_empty(head)) { - first = head->next; - list_move_tail(first, head); - } -} -#endif - #ifndef roundup #define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) #endif @@ -818,38 +925,55 @@ static inline void list_rotate_left(struct list_head *head) #undef netdev_info #endif +#if (LINUX_VERSION_CODE < 0x020624) #ifndef netdev_printk - -#if (LINUX_VERSION_CODE < 0x020615) -#define NET_PARENT_DEV(netdev) ((netdev)->class_dev.dev) -#else -#define NET_PARENT_DEV(netdev) ((netdev)->dev.parent) -#endif - -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ -#define netdev_printk(level, netdev, format, args...) \ - dev_printk(level, NET_PARENT_DEV(netdev), \ - "%s: " format, \ - netdev_name(netdev), ##args) - -#else -#define netdev_printk(level, netdev, format, args...) \ - printk(level \ - "%s %s: %s: " format, \ - DRV_MODULE_NAME, pci_name(netdev->pdev), \ - netdev_name(netdev), ##args) -#endif - - static inline const char *netdev_name(const struct net_device *dev) { if (dev->reg_state != NETREG_REGISTERED) return "(unregistered net_device)"; return dev->name; } - - #endif +#if (LINUX_VERSION_CODE < 0x020615) +#define NET_PARENT_DEV(netdev) ((netdev)->class_dev.dev) +#else +#define NET_PARENT_DEV(netdev) ((netdev)->dev.parent) +#endif + +#if (LINUX_VERSION_CODE < 0x020612) +static inline const char *dev_driver_string(struct device *dev) +{ + return dev->driver ? dev->driver->name : + (dev->bus ? dev->bus->name : ""); +} +#endif + +#if !defined(__VMKLNX__) +#if (LINUX_VERSION_CODE < 0x02061a) +#undef netdev_printk +#define netdev_printk(level, netdev, format, args...) \ + printk("%s" \ + "%s %s: %s: " format, level, \ + dev_driver_string(NET_PARENT_DEV(netdev)), \ + NET_PARENT_DEV(netdev)->bus_id, \ + netdev_name(netdev), ##args) +#elif (LINUX_VERSION_CODE >= 0x02061a) && (LINUX_VERSION_CODE < 0x020624) +#undef netdev_printk +#define netdev_printk(level, netdev, format, args...) \ + printk("%s" \ + "%s %s: %s: " format, level, \ + dev_driver_string(NET_PARENT_DEV(netdev)), \ + dev_name(NET_PARENT_DEV(netdev)), \ + netdev_name(netdev), ##args) +#endif +#else /*(__VMKLNX__)*/ +#define netdev_printk(level, netdev, format, args...) \ + printk("%s" \ + "%s %s: %s: " format, level, \ + DRV_MODULE_NAME, pci_name(netdev->pdev), \ + netdev_name(netdev), ##args) +#endif/*(__VMKLNX__)*/ +#endif/*(LINUX_VERSION_CODE < 0x020624)*/ #ifndef netdev_err #define netdev_err(dev, format, args...) \ @@ -885,6 +1009,21 @@ static inline const char *netdev_name(const struct net_device *dev) printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__) #endif +#ifndef pr_notice +#define pr_notice(fmt, ...) \ + printk(KERN_NOTICE pr_fmt(fmt), ##__VA_ARGS__) + #endif + +#ifndef pr_info +#define pr_info(fmt, ...) \ + printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__) +#endif + +#ifndef pr_cont +#define pr_cont(fmt, ...) \ + printk(KERN_CONT fmt, ##__VA_ARGS__) +#endif + #ifndef netdev_mc_count #define netdev_mc_count(dev) ((dev)->mc_count) #endif @@ -899,15 +1038,25 @@ static inline const char *netdev_name(const struct net_device *dev) for (mclist = (dev)->mc_list; mclist; mclist = mclist->next) #endif +#if (LINUX_VERSION_CODE < 0x02061f) +#define netdev_for_each_uc_addr(uclist, dev) \ + for (uclist = (dev)->uc_list; uclist; uclist = uclist->next) +#elif !defined(netdev_for_each_uc_addr) +#define netdev_for_each_uc_addr(uclist, dev) \ + list_for_each_entry(uclist, &((dev)->uc).list, list) +#endif + +#if (LINUX_VERSION_CODE < 0x02061f) +#define bnx2x_uc_addr(ha) ((ha)->dmi_addr) +#else +#define bnx2x_uc_addr(ha) ((ha)->addr) +#endif + #ifndef netdev_hw_addr_list_for_each #define bnx2x_mc_addr(ha) ((ha)->dmi_addr) #else -#ifdef BNX2X_OLD_FCOE -#define bnx2x_mc_addr(ha) ((ha)->dmi_addr) -#else #define bnx2x_mc_addr(ha) ((ha)->addr) #endif -#endif #ifndef PCI_SRIOV_NUM_BARS #define PCI_SRIOV_NUM_BARS 6 @@ -956,7 +1105,6 @@ static inline const char *netdev_name(const struct net_device *dev) #ifndef PCI_EXP_DEVCTL2 #define PCI_EXP_DEVCTL2 40 #endif - #if (LINUX_VERSION_CODE < 0x02061b) #define netif_addr_lock_bh(dev) netif_tx_lock_bh(dev) #define netif_addr_unlock_bh(dev) netif_tx_unlock_bh(dev) @@ -966,12 +1114,42 @@ static inline const char *netdev_name(const struct net_device *dev) #define ETH_FLAG_RXHASH (0x1 << 28) #endif +#if (LINUX_VERSION_CODE < 0x020618) +#define ETH_FLAG_LRO (1 << 15) +#endif + +#if (LINUX_VERSION_CODE < 0x020622) +#define ETH_FLAG_NTUPLE (1 << 27) +#endif + +#if (LINUX_VERSION_CODE < 0x020625) +#define ETH_FLAG_TXVLAN (1 << 7) /* TX VLAN offload enabled */ +#define ETH_FLAG_RXVLAN (1 << 8) /* RX VLAN offload enabled */ +#endif + #if (LINUX_VERSION_CODE < 0x020613) /* The below code is similar to what is done random32() in * 2.6.19 but much simpler. ;) */ +#if !defined(RHEL_RELEASE_CODE) +#define TAUSWORTHE(s,a,b,c,d) ((((s)&(c))<<(d)) ^ ((((s) <<(a)) ^ (s))>>(b))) +static inline u32 random32(void) { + static u32 s1 = 4294967294UL; + static u32 s2 = 4294967288UL; + static u32 s3 = 4294967280UL; + u32 cycles; + /* This would be our seed for this step */ + cycles = get_cycles(); + + s1 = TAUSWORTHE(s1 + cycles, 13, 19, 4294967294UL, 12); + s2 = TAUSWORTHE(s2 + cycles, 2, 25, 4294967288UL, 4); + s3 = TAUSWORTHE(s3 + cycles, 3, 11, 4294967280UL, 17); + + return (s1 ^ s2 ^ s3); +} +#elif (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,6)) #define TAUSWORTHE(s,a,b,c,d) ((((s)&(c))<<(d)) ^ ((((s) <<(a)) ^ (s))>>(b))) static inline u32 random32(void) { static u32 s1 = 4294967294UL; @@ -989,8 +1167,124 @@ static inline u32 random32(void) { return (s1 ^ s2 ^ s3); } #endif +#endif +#if ((!defined(RHEL_RELEASE_CODE) && (LINUX_VERSION_CODE < 0x020625)) || \ + (defined(RHEL_RELEASE_CODE) && \ + (((RHEL_MAJOR == 6) && (RHEL_MINOR < 1)) || \ + ((RHEL_MAJOR == 5) && (RHEL_MINOR < 7)) || \ + (RHEL_MAJOR < 5)))) +static inline void skb_checksum_none_assert(struct sk_buff *skb) +{ + skb->ip_summed = CHECKSUM_NONE; +} +#endif +#if ((!defined(RHEL_RELEASE_CODE) && (LINUX_VERSION_CODE < 0x020622)) || \ + (defined(RHEL_RELEASE_CODE) && \ + (((RHEL_MAJOR == 6) && (RHEL_MINOR < 1)) || \ + ((RHEL_MAJOR == 5) && (RHEL_MINOR < 7)) || \ + (RHEL_MAJOR < 5)))) +#define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ +#define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT) + +/* Large Resource Data Type Item Names */ +#define PCI_VPD_LRDT_LIN_ID_STRING 0x02 /* Identifier String */ +#define PCI_VPD_LRDT_LIN_RO_DATA 0x10 /* Read-Only Data */ +#define PCI_VPD_LRDT_LIN_RW_DATA 0x11 /* Read-Write Data */ + +#define PCI_VPD_LRDT_ID_STRING \ + PCI_VPD_LRDT_ID(PCI_VPD_LRDT_LIN_ID_STRING) +#define PCI_VPD_LRDT_RO_DATA \ + PCI_VPD_LRDT_ID(PCI_VPD_LRDT_LIN_RO_DATA) +#define PCI_VPD_LRDT_RW_DATA \ + PCI_VPD_LRDT_ID(PCI_VPD_LRDT_LIN_RW_DATA) + +/* Small Resource Data Type Item Names */ +#define PCI_VPD_SRDT_SIN_END 0x78 /* End */ + +#define PCI_VPD_SRDT_END PCI_VPD_SRDT_SIN_END + +#define PCI_VPD_RO_KEYWORD_PARTNO "PN" +#define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" +#define PCI_VPD_RO_KEYWORD_MFR_ID "MN" + +#define PCI_VPD_SRDT_SIN_MASK 0x78 +#define PCI_VPD_SRDT_LEN_MASK 0x07 + +#define PCI_VPD_LRDT_TAG_SIZE 3 +#define PCI_VPD_SRDT_TAG_SIZE 1 +#define PCI_VPD_INFO_FLD_HDR_SIZE 3 + +static inline u16 pci_vpd_lrdt_size(u8 *lrdt) +{ + return (u16)lrdt[1] + ((u16)lrdt[2] << 8); +} + +static inline u8 pci_vpd_srdt_size(u8 *srdt) +{ + return (*srdt) & PCI_VPD_SRDT_LEN_MASK; +} + +static inline int __devinit pci_vpd_find_tag(char *data, unsigned int start, + unsigned int len, u8 tagid) +{ + int i; + + for (i = start; i < len; ) { + u8 val = (u8)data[i]; + + if (val & PCI_VPD_LRDT) { + /* Don't return success of the tag isn't complete */ + if (i + PCI_VPD_LRDT_TAG_SIZE > len) + break; + + if (val == tagid) + return i; + + i += PCI_VPD_LRDT_TAG_SIZE + + pci_vpd_lrdt_size(&data[i]); + } else { + u8 tag = val & ~PCI_VPD_SRDT_LEN_MASK; + + if (tag == tagid) + return i; + + if (tag == PCI_VPD_SRDT_SIN_END) + break; + + i += PCI_VPD_SRDT_TAG_SIZE + + pci_vpd_srdt_size(&data[i]); + } + } + + return -1; +} + +static inline u8 pci_vpd_info_field_size(u8 *info_field) +{ + return info_field[2]; +} + +static inline int __devinit pci_vpd_find_info_keyword(u8 *rodata, + unsigned int start, + unsigned int rosize, + char *kw) +{ + int i; + + for (i = start; i + PCI_VPD_INFO_FLD_HDR_SIZE <= start + rosize;) { + if (rodata[i + 0] == kw[0] && + rodata[i + 1] == kw[1]) + return i; + + i += PCI_VPD_INFO_FLD_HDR_SIZE + + pci_vpd_info_field_size(&rodata[i]); + } + + return -1; +} +#endif #ifndef PCI_MSIX_FLAGS_QSIZE #define PCI_MSIX_FLAGS_QSIZE 0x7FF #endif @@ -1004,4 +1298,352 @@ static inline u32 random32(void) { #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) #endif +#if (!defined(SLES_DISTRO) || (LINUX_VERSION_CODE < 0x020610)) && (LINUX_VERSION_CODE < 0x020612) +static inline int list_is_last(const struct list_head *list, + const struct list_head *head) +{ + return list->next == head; +} +#endif + +#if (LINUX_VERSION_CODE < 0x020625) +static inline int netif_set_real_num_rx_queues(struct net_device *dev, int num) +{ + return 0; +} +#endif + +#if defined(SLES_DISTRO) && (SLES_DISTRO == 0x1101) && defined(MODULE_ALIAS_NETDEV) +/* Special SLES11.1 updated kernel 2.6.32.XX */ +#define SLES11_SP1_UP1 +#endif + +#if !defined(RHEL_RELEASE_CODE) && (LINUX_VERSION_CODE < 0x020623) && defined(BNX2X_MULTI_QUEUE) && (!defined(SLES_DISTRO) || (SLES_DISTRO < 0x1102) && !defined(SLES11_SP1_UP1)) +static inline void netif_set_real_num_tx_queues(struct net_device *dev, + unsigned int txq) +{ + dev->real_num_tx_queues = txq; +} +#endif + +/* vlan structure defines*/ +#ifndef VLAN_PRIO_MASK +#define VLAN_PRIO_MASK 0xe000 /* Priority Code Point */ +#endif +#ifndef VLAN_PRIO_SHIFT +#define VLAN_PRIO_SHIFT 13 +#endif + + +#if defined(OLD_VLAN) && \ + (!defined(RHEL_RELEASE_CODE) || \ + (((RHEL_MAJOR == 6) && (RHEL_MINOR < 1)) || \ + ((RHEL_MAJOR == 5) && (RHEL_MINOR < 7)) || \ + (RHEL_MAJOR < 5))) +/** + * vlan_get_protocol - get protocol EtherType. + * @skb: skbuff to query + * + * Returns the EtherType of the packet, regardless of whether it is + * vlan encapsulated (normal or hardware accelerated) or not. + */ +static inline __be16 vlan_get_protocol(const struct sk_buff *skb) +{ + __be16 protocol = 0; + +#ifdef BCM_VLAN + if (vlan_tx_tag_present(skb) || + skb->protocol != cpu_to_be16(ETH_P_8021Q)) +#else + if (skb->protocol != cpu_to_be16(ETH_P_8021Q)) +#endif + protocol = skb->protocol; + else { + __be16 proto, *protop; + protop = skb_header_pointer(skb, offsetof(struct vlan_ethhdr, + h_vlan_encapsulated_proto), + sizeof(proto), &proto); + if (likely(protop)) + protocol = *protop; + } + + return protocol; +} +#endif + +#if (LINUX_VERSION_CODE < 0x020624) + +static const u32 bnx2x_flags_dup_features = + (ETH_FLAG_LRO | ETH_FLAG_NTUPLE | ETH_FLAG_RXHASH); + + +static inline int bnx2x_ethtool_op_set_flags(struct net_device *dev, u32 data, + u32 supported) +{ + if (data & ~supported) + return -EINVAL; + + dev->features = ((dev->features & ~bnx2x_flags_dup_features) | + (data & bnx2x_flags_dup_features)); + return 0; +} +#endif + +#if defined(NETIF_F_TSO6) && ((!defined(RHEL_RELEASE_CODE) && (LINUX_VERSION_CODE < 0x020618)) || \ + (defined(RHEL_RELEASE_CODE) && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,5))) || \ + defined(__VMKLNX__)) +static inline int skb_is_gso_v6(const struct sk_buff *skb) +{ + return skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6; +} +#endif + +#if (LINUX_VERSION_CODE >= 0x020620) || \ + (defined(__VMKLNX__) && \ + (((VMWARE_ESX_DDK_VERSION == 50000) && !defined(BNX2X_INBOX)) || \ + (VMWARE_ESX_DDK_VERSION > 50000))) +#define BCM_DCB 1 +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)) +static inline void ethtool_cmd_speed_set(struct ethtool_cmd *ep, + __u32 speed) +{ + ep->speed = (__u16)speed; +} + +static inline __u32 ethtool_cmd_speed(struct ethtool_cmd *ep) +{ + return ep->speed; +} +#endif + +#ifndef SPEED_UNKNOWN +#define SPEED_UNKNOWN (-1) +#endif + +#ifndef DUPLEX_UNKNOWN +#define DUPLEX_UNKNOWN (0xff) +#endif + +#ifndef __rcu +#define __rcu +#endif + +#ifndef NETIF_F_LOOPBACK +#define NETIF_F_LOOPBACK (1 << 31) /* Enable loopback */ +#endif + +#ifndef SUPPORTED_20000baseMLD2_Full +#define SUPPORTED_20000baseMLD2_Full (1 << 21) +#endif + +#ifndef SUPPORTED_20000baseKR2_Full +#define SUPPORTED_20000baseKR2_Full (1 << 22) +#endif + +#ifndef MDIO_PMA_LASI_RXCTRL +#define MDIO_PMA_LASI_RXCTRL 0x9000 +#endif + +#ifndef MDIO_PMA_LASI_TXCTRL +#define MDIO_PMA_LASI_TXCTRL 0x9001 +#endif + +#ifndef MDIO_PMA_LASI_CTRL +#define MDIO_PMA_LASI_CTRL 0x9002 +#endif + +#ifndef MDIO_PMA_LASI_RXSTAT +#define MDIO_PMA_LASI_RXSTAT 0x9003 +#endif + +#ifndef MDIO_PMA_LASI_TXSTAT +#define MDIO_PMA_LASI_TXSTAT 0x9004 +#endif + +#ifndef MDIO_PMA_LASI_STAT +#define MDIO_PMA_LASI_STAT 0x9005 +#endif + +#ifndef rcu_dereference_protected +#define rcu_dereference_protected(p, c) (p) +#endif + +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) && defined(BNX2X_MULTI_QUEUE)) && \ + (!defined(RHEL_RELEASE_CODE) || RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,2)) +/* Older kernels do not support different amount of mqs. + * Only txqs is used for TX structure allocation. + */ +static inline struct net_device *alloc_etherdev_mqs(int sizeof_priv, + unsigned int txqs, + unsigned int rxqs) +{ + return alloc_etherdev_mq(sizeof_priv, txqs); +} +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27)) && !defined(__VMKLNX__) +struct netdev_queue { }; +static inline struct netdev_queue *netdev_get_tx_queue(struct net_device *dev, + int q) +{ + return NULL; +} +#endif + +#if (!defined(RHEL_RELEASE_CODE) || RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,1)) && \ + (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)) +/* older kernels do not support the interface for multiple queues + * for traffic classes + */ +struct netdev_queue; +static inline void netdev_reset_tc(struct net_device *dev) { } +static inline int netdev_set_tc_queue(struct net_device *dev, u8 tc,u16 count, u16 offset) {return 0; } +static inline int netdev_set_num_tc(struct net_device *dev, u8 num_tc) {return 0; } +static inline int netdev_get_num_tc(struct net_device *dev) { return 0; } +static inline int netdev_set_prio_tc_map(struct net_device *dev, u8 prio, u8 tc) {return 0; } +#endif + +#if (!defined(RHEL_RELEASE_CODE) || RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,8)) && \ + (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) +static inline int pci_pcie_cap(struct pci_dev *dev) +{ + return pci_find_capability(dev, PCI_CAP_ID_EXP); +} +#endif + +#if ((!defined(RHEL_RELEASE_CODE) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))) || \ + (defined(RHEL_RELEASE_CODE) && \ + (((RHEL_MAJOR == 6) && (RHEL_MINOR < 1)) || \ + ((RHEL_MAJOR == 5) && (RHEL_MINOR < 8)) || \ + (RHEL_MAJOR < 5)))) +static inline bool pci_is_pcie(struct pci_dev *dev) +{ + return !!pci_pcie_cap(dev); +} +#endif + +#ifndef RCU_INIT_POINTER +#define RCU_INIT_POINTER(ptr, val) rcu_assign_pointer(ptr, val) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0)) && \ + (!defined(RHEL_RELEASE_CODE) || RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,2)) && \ + (!defined(SLES_DISTRO) || (SLES_DISTRO != 0x1102)) +#ifndef DCB_CMD_CEE_GET +#define DCB_CMD_CEE_GET (-1) /* invalid value */ +#endif +static inline int dcbnl_cee_notify(struct net_device *dev, int event, int cmd, + u32 seq, u32 pid) +{ + return -EOPNOTSUPP; +} +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)) && \ + (!defined(RHEL_RELEASE_CODE) || RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6, 3)) +static inline struct page *skb_frag_page(const skb_frag_t *frag) +{ + return frag->page; +} + +static inline dma_addr_t skb_frag_dma_map(struct device *dev, + const skb_frag_t *frag, + size_t offset, size_t size, + enum dma_data_direction dir) +{ + return dma_map_page(dev, skb_frag_page(frag), + frag->page_offset + offset, size, dir); +} +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) || \ + (defined(RHEL_RELEASE_CODE) && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6, 2)) +#define DCB_CEE_SUPPORT 1 +#endif +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0)) +#define netdev_features_t u32 +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0)) +static inline u32 ethtool_rxfh_indir_default(u32 index, u32 n_rx_rings) +{ + return index % n_rx_rings; +} +static inline void netdev_tx_completed_queue(struct netdev_queue *q, + unsigned int a, unsigned int b) { } +static inline void netdev_tx_reset_queue(struct netdev_queue *q) { } +static inline void netdev_tx_sent_queue(struct netdev_queue *q, + unsigned int len) { } +#endif + +#ifndef eth_hw_addr_random +#define eth_hw_addr_random(dev) random_ether_addr(dev->dev_addr) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 14)) +static inline void +pci_intx(struct pci_dev *pdev, int enable) +{ + u16 pci_command, new; + + pci_read_config_word(pdev, PCI_COMMAND, &pci_command); + + if (enable) { + new = pci_command & ~PCI_COMMAND_INTX_DISABLE; + } else { + new = pci_command | PCI_COMMAND_INTX_DISABLE; + } + + if (new != pci_command) { + pci_write_config_word(pdev, PCI_COMMAND, new); + } +} +#endif + +#ifndef DEFINE_SEMAPHORE +#define DEFINE_SEMAPHORE(sem) DECLARE_MUTEX(sem) +#endif + +#ifndef PCI_EXP_DEVCTL_BCR_FLR +#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 +#endif + +#ifndef PCI_EXP_DEVCAP_FLR +#define PCI_EXP_DEVCAP_FLR 0x10000000 +#endif + +#if defined(CONFIG_XEN) +#ifndef PCI_MSIX_FLAGS +#define PCI_MSIX_FLAGS 2 +#endif + +#ifndef PCI_MSIX_FLAGS_ENABLE +#define PCI_MSIX_FLAGS_ENABLE (1 << 15) +#endif + +static inline void bnx2x_msix_set_enable(struct pci_dev *dev, int enable) +{ + int pos; + u16 control; + + pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); + if (pos) { + pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); + control &= ~PCI_MSIX_FLAGS_ENABLE; + if (enable) + control |= PCI_MSIX_FLAGS_ENABLE; + pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); + } +} +#endif + +#ifndef ETH_TEST_FL_EXTERNAL_LB /* ! BNX2X_UPSTREAM */ +#define ETH_TEST_FL_EXTERNAL_LB (1 << 2) +#endif +#ifndef ETH_TEST_FL_EXTERNAL_LB_DONE /* ! BNX2X_UPSTREAM */ +#define ETH_TEST_FL_EXTERNAL_LB_DONE (1 << 3) +#endif + #endif /* __BNX2X_COMPAT_H__ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.c index 38f24ae..72cc829 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.c +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.c @@ -1,6 +1,6 @@ /* bnx2x_dcb.c: Broadcom Everest network driver. * - * Copyright 2009-2011 Broadcom Corporation + * Copyright 2009-2013 Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you @@ -16,20 +16,37 @@ * Written by: Dmitry Kravkov * */ +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ #include +#endif + +#if (LINUX_VERSION_CODE > 0x02060f) /* BNX2X_UPSTREAM */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#endif + +#include +#include #include +#include +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)) /* BNX2X_UPSTREAM */ +#include +#endif #include "bnx2x.h" -#include "bnx2x_common.h" +#include "bnx2x_cmn.h" #include "bnx2x_dcb.h" - +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#include "bnx2x_compat.h" +#endif /* forward declarations of dcbx related functions */ -static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp); +static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp); static void bnx2x_pfc_set_pfc(struct bnx2x *bp); static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp); -static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp); -static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x*, u32* ,u8* ); +static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp); +static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, + u32 *set_configuration_ets_pg, + u32 *pri_pg_tbl); static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, u32 *pg_pri_orginal_spread, struct pg_help_data *help_data); @@ -41,34 +58,56 @@ static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, struct cos_help_data *cos_data, u32 *pg_pri_orginal_spread, struct dcbx_ets_feature *ets); -static void bnx2x_pfc_fw_struct_e2(struct bnx2x *bp); +static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, + struct bnx2x_func_tx_start_params*); +/* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */ +static void bnx2x_read_data(struct bnx2x *bp, u32 *buff, + u32 addr, u32 len) +{ + int i; + for (i = 0; i < len; i += 4, buff++) + *buff = REG_RD(bp, addr + i); +} + +static void bnx2x_write_data(struct bnx2x *bp, u32 *buff, + u32 addr, u32 len) +{ + int i; + for (i = 0; i < len; i += 4, buff++) + REG_WR(bp, addr + i, *buff); +} static void bnx2x_pfc_set(struct bnx2x *bp) { struct bnx2x_nig_brb_pfc_port_params pfc_params = {0}; u32 pri_bit, val = 0; - u8 pri; + int i; + + pfc_params.num_of_rx_cos_priority_mask = + bp->dcbx_port_params.ets.num_of_cos; /* Tx COS configuration */ - if (bp->dcbx_port_params.ets.cos_params[0].pauseable) - pfc_params.rx_cos0_priority_mask = - bp->dcbx_port_params.ets.cos_params[0].pri_bitmask; - if (bp->dcbx_port_params.ets.cos_params[1].pauseable) - pfc_params.rx_cos1_priority_mask = - bp->dcbx_port_params.ets.cos_params[1].pri_bitmask; + for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++) + /* + * We configure only the pauseable bits (non pauseable aren't + * configured at all) it's done to avoid false pauses from + * network + */ + pfc_params.rx_cos_priority_mask[i] = + bp->dcbx_port_params.ets.cos_params[i].pri_bitmask + & DCBX_PFC_PRI_PAUSE_MASK(bp); - - /** + /* * Rx COS configuration * Changing PFC RX configuration . * In RX COS0 will always be configured to lossy and COS1 to lossless */ - for (pri = 0 ; pri < MAX_PFC_PRIORITIES ; pri++) { - pri_bit = 1 << pri; + for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) { + pri_bit = 1 << i; if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp)) - val |= 1 << (pri * 4); + val |= 1 << (i * 4); } pfc_params.pkt_priority_to_cos = val; @@ -92,81 +131,56 @@ static void bnx2x_pfc_clear(struct bnx2x *bp) { struct bnx2x_nig_brb_pfc_port_params nig_params = {0}; nig_params.pause_enable = 1; -#ifdef BNX2X_SAFC - if (bp->flags & SAFC_TX_FLAG) { - u32 high = 0, low = 0; - int i; - - for (i = 0; i < BNX2X_MAX_PRIORITY; i++) { - if (bp->pri_map[i] == 1) - high |= (1 << i); - if (bp->pri_map[i] == 0) - low |= (1 << i); - } - - nig_params.llfc_low_priority_classes = high; - nig_params.llfc_low_priority_classes = low; - - nig_params.pause_enable = 0; - nig_params.llfc_enable = 1; - nig_params.llfc_out_en = 1; - } -#endif /* BNX2X_SAFC */ bnx2x_acquire_phy_lock(bp); bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED; bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params); bnx2x_release_phy_lock(bp); } -static int bnx2x_is_valid_lldp_params(struct bnx2x *bp) { - return 1; -} - -static int bnx2x_is_valid_dcbx_params(struct bnx2x *bp) { - return 1; -} - static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp, - struct lldp_local_mib *local_mib) { -#ifdef BNX2X_DUMP_DCBX + struct dcbx_features *features, + u32 error) +{ u8 i = 0; - BNX2X_ERR("local_mib.error %x\n",local_mib->error); + DP(NETIF_MSG_LINK, "local_mib.error %x\n", error); /* PG */ - BNX2X_ERR("local_mib.features.ets.enabled %x\n", - local_mib->features.ets.enabled); - for( i = 0; i < DCBX_MAX_NUM_PG; i++) - BNX2X_ERR("local_mib.features.ets.pg_bw_tbl[%x] %x\n", i, - local_mib->features.ets.pg_bw_tbl[i]); - for( i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) - BNX2X_ERR("local_mib.features.ets.pri_pg_tbl[%x] %x\n", i, - local_mib->features.ets.pri_pg_tbl[i]); + DP(NETIF_MSG_LINK, + "local_mib.features.ets.enabled %x\n", features->ets.enabled); + for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) + DP(NETIF_MSG_LINK, + "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i, + DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i)); + for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) + DP(NETIF_MSG_LINK, + "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i, + DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i)); /* pfc */ - BNX2X_ERR("local_mib.features.pfc.pri_en_bitmap %x\n", - local_mib->features.pfc.pri_en_bitmap); - BNX2X_ERR("local_mib.features.pfc.pfc_caps %x\n", - local_mib->features.pfc.pfc_caps); - BNX2X_ERR("local_mib.features.pfc.enabled %x\n", - local_mib->features.pfc.enabled); + DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n", + features->pfc.pri_en_bitmap); + DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n", + features->pfc.pfc_caps); + DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n", + features->pfc.enabled); - BNX2X_ERR("local_mib.features.app.default_pri %x\n", - local_mib->features.app.default_pri); - BNX2X_ERR("local_mib.features.app.tc_supported %x\n", - local_mib->features.app.tc_supported); - BNX2X_ERR("local_mib.features.app.enabled %x\n", - local_mib->features.app.enabled); - for( i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { - BNX2X_ERR("local_mib.features.app.app_pri_tbl[%x].app_id[0] %x" - "\n", i, local_mib->features.app.app_pri_tbl[i].app_id[0]); - BNX2X_ERR("local_mib.features.app.app_pri_tbl[%x].app_id[1] %x" - "\n", i, local_mib->features.app.app_pri_tbl[i].app_id[1]); - BNX2X_ERR("local_mib.features.app.app_pri_tbl[%x].pri_bitmap %x" - "\n", i, local_mib->features.app.app_pri_tbl[i].pri_bitmap); - BNX2X_ERR("local_mib.features.app.app_pri_tbl[%x].appBitfield " - "%x\n",i,local_mib->features.app.app_pri_tbl[i].appBitfield); + DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n", + features->app.default_pri); + DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n", + features->app.tc_supported); + DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n", + features->app.enabled); + for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { + DP(BNX2X_MSG_DCB, + "dcbx_features.app.app_pri_tbl[%x].app_id %x\n", + i, features->app.app_pri_tbl[i].app_id); + DP(BNX2X_MSG_DCB, + "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n", + i, features->app.app_pri_tbl[i].pri_bitmap); + DP(BNX2X_MSG_DCB, + "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n", + i, features->app.app_pri_tbl[i].appBitfield); } -#endif /* BNX2X_DUMP_DCBX */ } static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp, @@ -174,19 +188,19 @@ static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp, u8 llfc_traf_type) { u32 pri = MAX_PFC_PRIORITIES; - u32 index = MAX_PFC_PRIORITIES -1; + u32 index = MAX_PFC_PRIORITIES - 1; u32 pri_mask; u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; /* Choose the highest priority */ - while((MAX_PFC_PRIORITIES == pri ) && (0 != index)) { + while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) { pri_mask = 1 << index; - if(GET_FLAGS(pri_bitmap , pri_mask)) + if (GET_FLAGS(pri_bitmap, pri_mask)) pri = index ; index--; } - if(pri < MAX_PFC_PRIORITIES) + if (pri < MAX_PFC_PRIORITIES) ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri); } @@ -194,50 +208,50 @@ static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp, struct dcbx_app_priority_feature *app, u32 error) { u8 index; - u16 app_protocol_id; u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; - if (GET_FLAGS(error,DCBX_LOCAL_APP_ERROR)) - DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_ERROR\n"); + if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) + DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n"); - if( app->enabled && !GET_FLAGS(error,DCBX_LOCAL_APP_ERROR)) { + if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH)) + DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n"); + + if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND)) + DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n"); + if (app->enabled && + !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH | + DCBX_REMOTE_APP_TLV_NOT_FOUND)) { bp->dcbx_port_params.app.enabled = true; - for( index=0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) + for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) ttp[index] = 0; - if(app->default_pri < MAX_PFC_PRIORITIES) + if (app->default_pri < MAX_PFC_PRIORITIES) ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri; - for(index=0 ; index < DCBX_MAX_APP_PROTOCOL; index++) { + for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) { struct dcbx_app_priority_entry *entry = app->app_pri_tbl; - app_protocol_id = entry[index].app_id[0] | - entry[index].app_id[1] << 8; - - /* Arrays that there cell are less than 32 bit are still - * in big endian mode.*/ - app_protocol_id = be16_to_cpu(app_protocol_id); - if(GET_FLAGS(entry[index].appBitfield, + if (GET_FLAGS(entry[index].appBitfield, DCBX_APP_SF_ETH_TYPE) && - ETH_TYPE_FCOE == app_protocol_id) + ETH_TYPE_FCOE == entry[index].app_id) bnx2x_dcbx_get_ap_priority(bp, entry[index].pri_bitmap, LLFC_TRAFFIC_TYPE_FCOE); - if(GET_FLAGS(entry[index].appBitfield, + if (GET_FLAGS(entry[index].appBitfield, DCBX_APP_SF_PORT) && - TCP_PORT_ISCSI == app_protocol_id) + TCP_PORT_ISCSI == entry[index].app_id) bnx2x_dcbx_get_ap_priority(bp, entry[index].pri_bitmap, LLFC_TRAFFIC_TYPE_ISCSI); } } else { - DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_DISABLED\n"); + DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n"); bp->dcbx_port_params.app.enabled = false; - for( index=0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) + for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++) ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY; } } @@ -246,8 +260,7 @@ static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, struct dcbx_ets_feature *ets, u32 error) { int i = 0; - u32 *buff; - u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG] = {0}; + u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0}; struct pg_help_data pg_help_data; struct bnx2x_dcbx_cos_params *cos_params = bp->dcbx_port_params.ets.cos_params; @@ -255,29 +268,24 @@ static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, memset(&pg_help_data, 0, sizeof(struct pg_help_data)); - if (GET_FLAGS(error,DCBX_LOCAL_ETS_ERROR)) - DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ERROR\n"); + if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR)) + DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n"); - - buff = (u32*)ets->pg_bw_tbl; - for ( i = 0; i < sizeof(ets->pg_bw_tbl)/sizeof(u32); i++) - /* Arrays that there cell are less than 32 bit are still - * in big endian mode. */ - buff[i] = be32_to_cpu(buff[i]); + if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND)) + DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n"); /* Clean up old settings of ets on COS */ - for(i = 0; i < E2_NUM_OF_COS ; i++) { - + for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) { cos_params[i].pauseable = false; - cos_params[i].strict = BNX2X_DCBX_COS_NOT_STRICT; + cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID; cos_params[i].bw_tbl = DCBX_INVALID_COS_BW; - cos_params[i].pri_bitmask = DCBX_PFC_PRI_GET_NON_PAUSE(bp,0); + cos_params[i].pri_bitmask = 0; } - if(bp->dcbx_port_params.app.enabled && - !GET_FLAGS(error,DCBX_LOCAL_ETS_ERROR) && - ets->enabled) { - DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ENABLE\n"); + if (bp->dcbx_port_params.app.enabled && ets->enabled && + !GET_FLAGS(error, + DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) { + DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n"); bp->dcbx_port_params.ets.enabled = true; bnx2x_dcbx_get_ets_pri_pg_tbl(bp, @@ -292,11 +300,12 @@ static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, ets, pg_pri_orginal_spread); } else { - DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_DISABLED\n"); + DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n"); bp->dcbx_port_params.ets.enabled = false; - memset(ets->pri_pg_tbl, 0, sizeof(ets->pri_pg_tbl)); - for(i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++) - ets->pg_bw_tbl[i] = 1; + ets->pri_pg_tbl[0] = 0; + + for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++) + DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1); } } @@ -304,49 +313,71 @@ static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp, struct dcbx_pfc_feature *pfc, u32 error) { - if (GET_FLAGS(error,DCBX_LOCAL_PFC_ERROR)) - DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_ERROR\n"); + if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR)) + DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n"); - if(bp->dcbx_port_params.app.enabled && - !GET_FLAGS(error,DCBX_LOCAL_PFC_ERROR) && - pfc->enabled) { + if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND)) + DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n"); + if (bp->dcbx_port_params.app.enabled && pfc->enabled && + !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH | + DCBX_REMOTE_PFC_TLV_NOT_FOUND)) { bp->dcbx_port_params.pfc.enabled = true; bp->dcbx_port_params.pfc.priority_non_pauseable_mask = ~(pfc->pri_en_bitmap); - BNX2X_ERR("priority_non_pauseable_mask 0x%x\n", - bp->dcbx_port_params.pfc.priority_non_pauseable_mask); } else { - DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_DISABLED\n"); + DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n"); bp->dcbx_port_params.pfc.enabled = false; bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0; } } -static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp, - struct bnx2x_dcbx_port_params *dcbx_port_params, - struct lldp_local_mib *local_mib) +/* maps unmapped priorities to to the same COS as L2 */ +static void bnx2x_dcbx_map_nw(struct bnx2x *bp) { - bnx2x_dcbx_get_ap_feature(bp, - &local_mib->features.app, - local_mib->error); + int i; + u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */ + u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; + u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW]; + struct bnx2x_dcbx_cos_params *cos_params = + bp->dcbx_port_params.ets.cos_params; - bnx2x_dcbx_get_pfc_feature(bp, - &local_mib->features.pfc, - local_mib->error); + /* get unmapped priorities by clearing mapped bits */ + for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) + unmapped &= ~(1 << ttp[i]); - bnx2x_dcbx_get_ets_feature(bp, - &local_mib->features.ets, - local_mib->error); + /* find cos for nw prio and extend it with unmapped */ + for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) { + if (cos_params[i].pri_bitmask & nw_prio) { + /* extend the bitmask with unmapped */ + DP(BNX2X_MSG_DCB, + "cos %d extended with 0x%08x\n", i, unmapped); + cos_params[i].pri_bitmask |= unmapped; + break; + } + } +} + +static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp, + struct dcbx_features *features, + u32 error) +{ + bnx2x_dcbx_get_ap_feature(bp, &features->app, error); + + bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error); + + bnx2x_dcbx_get_ets_feature(bp, &features->ets, error); + + bnx2x_dcbx_map_nw(bp); } #define DCBX_LOCAL_MIB_MAX_TRY_READ (100) static int bnx2x_dcbx_read_mib(struct bnx2x *bp, u32 *base_mib_addr, u32 offset, - bnx2x_dcbx_read_mib_type read_mib_type) + int read_mib_type) { - int max_try_read = 0, i; - u32 *buff, mib_size, prefix_seq_num, suffix_seq_num; + int max_try_read = 0; + u32 mib_size, prefix_seq_num, suffix_seq_num; struct lldp_remote_mib *remote_mib ; struct lldp_local_mib *local_mib; @@ -365,30 +396,28 @@ static int bnx2x_dcbx_read_mib(struct bnx2x *bp, offset += BP_PORT(bp) * mib_size; do { - buff = base_mib_addr; - for(i = 0 ;i < mib_size; i += 4, buff++) - *buff = REG_RD(bp, offset + i); + bnx2x_read_data(bp, base_mib_addr, offset, mib_size); max_try_read++; switch (read_mib_type) { case DCBX_READ_LOCAL_MIB: - local_mib = (struct lldp_local_mib*) base_mib_addr; + local_mib = (struct lldp_local_mib *) base_mib_addr; prefix_seq_num = local_mib->prefix_seq_num; suffix_seq_num = local_mib->suffix_seq_num; break; case DCBX_READ_REMOTE_MIB: - remote_mib = (struct lldp_remote_mib*) base_mib_addr; + remote_mib = (struct lldp_remote_mib *) base_mib_addr; prefix_seq_num = remote_mib->prefix_seq_num; suffix_seq_num = remote_mib->suffix_seq_num; break; default: return 1; /*error*/ } - }while((prefix_seq_num != suffix_seq_num)&& + } while ((prefix_seq_num != suffix_seq_num) && (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ)); - if(max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) { + if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) { BNX2X_ERR("MIB could not be read\n"); return 1; } @@ -396,62 +425,52 @@ static int bnx2x_dcbx_read_mib(struct bnx2x *bp, return 0; } - -static void bnx2x_pfc_set_pfc(struct bnx2x *bp) { - if (CHIP_IS_E2(bp)) { - if(BP_PORT(bp)){ - BNX2X_ERR("4 port mode is not supported"); - return; - } - - if(bp->dcbx_port_params.pfc.enabled) - - /* 1. Fills up common PFC structures if required.*/ - /* 2. Configure NIG, MAC and BRB via the elink: - * elink must first check if BMAC is not in reset - * and only then configures the BMAC - * Or, configure EMAC. - */ - bnx2x_pfc_set(bp); - - else - bnx2x_pfc_clear(bp); - } -} - -static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp) +static void bnx2x_pfc_set_pfc(struct bnx2x *bp) { - DP(NETIF_MSG_LINK, "sending STOP TRAFFIC\n"); - bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STOP_TRAFFIC, - 0 /* connectionless */, - 0 /* dataHi is zero */, - 0 /* dataLo is zero */, - 1 /* common */); + if (bp->dcbx_port_params.pfc.enabled && + !(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR)) + /* + * 1. Fills up common PFC structures if required + * 2. Configure NIG, MAC and BRB via the elink + */ + bnx2x_pfc_set(bp); + else + bnx2x_pfc_clear(bp); } -static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp) +static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp) { - bnx2x_pfc_fw_struct_e2(bp); - DP(NETIF_MSG_LINK, "sending START TRAFFIC\n"); - bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_START_TRAFFIC, - 0, /* connectionless */ - U64_HI(bnx2x_sp_mapping(bp, pfc_config)), - U64_LO(bnx2x_sp_mapping(bp, pfc_config)), - 1 /* commmon */); + struct bnx2x_func_state_params func_params = {NULL}; + + func_params.f_obj = &bp->func_obj; + func_params.cmd = BNX2X_F_CMD_TX_STOP; + + DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n"); + return bnx2x_func_state_change(bp, &func_params); } -static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) +static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp) +{ + struct bnx2x_func_state_params func_params = {NULL}; + struct bnx2x_func_tx_start_params *tx_params = + &func_params.params.tx_start; + + func_params.f_obj = &bp->func_obj; + func_params.cmd = BNX2X_F_CMD_TX_START; + + bnx2x_dcbx_fw_struct(bp, tx_params); + + DP(BNX2X_MSG_DCB, "START TRAFFIC\n"); + return bnx2x_func_state_change(bp, &func_params); +} + +static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp) { struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); - u8 status = 0; + int rc = 0; - bnx2x_ets_disabled(&bp->link_params); - - if (!ets->enabled) - return; - - if ((ets->num_of_cos == 0 ) || (ets->num_of_cos > E2_NUM_OF_COS)) { - BNX2X_ERR("illegal num of cos= %x",ets->num_of_cos); + if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) { + BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos); return; } @@ -460,9 +479,9 @@ static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) return; /* sanity */ - if (((BNX2X_DCBX_COS_NOT_STRICT == ets->cos_params[0].strict)&& + if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) && (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) || - ((BNX2X_DCBX_COS_NOT_STRICT == ets->cos_params[1].strict)&& + ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) && (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) { BNX2X_ERR("all COS should have at least bw_limit or strict" "ets->cos_params[0].strict= %x" @@ -494,105 +513,296 @@ static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1); } else { - if (ets->cos_params[0].strict == BNX2X_DCBX_COS_HIGH_STRICT) - status = bnx2x_ets_strict(&bp->link_params, 0); + if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST) + rc = bnx2x_ets_strict(&bp->link_params, 0); else if (ets->cos_params[1].strict - == BNX2X_DCBX_COS_HIGH_STRICT) - status = bnx2x_ets_strict(&bp->link_params, 1); - - if (status) + == BNX2X_DCBX_STRICT_COS_HIGHEST) + rc = bnx2x_ets_strict(&bp->link_params, 1); + if (rc) BNX2X_ERR("update_ets_params failed\n"); } } -void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) { - u32 dcbx_neg_res_offset; +/* + * In E3B0 the configuration may have more than 2 COS. + */ +static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp) +{ + struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets); + struct bnx2x_ets_params ets_params = { 0 }; + u8 i; - dcbx_neg_res_offset = SHMEM2_RD(bp,dcbx_neg_res_offset); + ets_params.num_of_cos = ets->num_of_cos; - DP(NETIF_MSG_LINK, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset); + for (i = 0; i < ets->num_of_cos; i++) { + /* COS is SP */ + if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) { + if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) { + BNX2X_ERR("COS can't be not BW and not SP\n"); + return; + } + + ets_params.cos[i].state = bnx2x_cos_state_strict; + ets_params.cos[i].params.sp_params.pri = + ets->cos_params[i].strict; + } else { /* COS is BW */ + if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) { + BNX2X_ERR("COS can't be not BW and not SP\n"); + return; + } + ets_params.cos[i].state = bnx2x_cos_state_bw; + ets_params.cos[i].params.bw_params.bw = + (u8)ets->cos_params[i].bw_tbl; + } + } + + /* Configure the ETS in HW */ + if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars, + &ets_params)) { + BNX2X_ERR("bnx2x_ets_e3b0_config failed\n"); + bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); + } +} + +static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp) +{ + bnx2x_ets_disabled(&bp->link_params, &bp->link_vars); + + if (!bp->dcbx_port_params.ets.enabled || + (bp->dcbx_error & DCBX_REMOTE_MIB_ERROR)) + return; + + if (CHIP_IS_E3B0(bp)) + bnx2x_dcbx_update_ets_config(bp); + else + bnx2x_dcbx_2cos_limit_update_ets_config(bp); +} + +#ifdef BCM_DCBNL +static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp) +{ + struct lldp_remote_mib remote_mib = {0}; + u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset); + int rc; + + DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n", + dcbx_remote_mib_offset); + + if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) { + BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n"); + return -EINVAL; + } + + rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset, + DCBX_READ_REMOTE_MIB); + + if (rc) { + BNX2X_ERR("Faild to read remote mib from FW\n"); + return rc; + } + + /* save features and flags */ + bp->dcbx_remote_feat = remote_mib.features; + bp->dcbx_remote_flags = remote_mib.flags; + return 0; +} +#endif + +static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp) +{ + struct lldp_local_mib local_mib = {0}; + u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset); + int rc; + + DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset); if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) { BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n"); - return; + return -EINVAL; } + rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset, + DCBX_READ_LOCAL_MIB); + + if (rc) { + BNX2X_ERR("Faild to read local mib from FW\n"); + return rc; + } + + /* save features and error */ + bp->dcbx_local_feat = local_mib.features; + bp->dcbx_error = local_mib.error; + return 0; +} + + +#ifdef BCM_DCBNL +static inline +u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent) +{ + u8 pri; + + /* Choose the highest priority */ + for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--) + if (ent->pri_bitmap & (1 << pri)) + break; + return pri; +} + +static inline +u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent) +{ + return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) == + DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM : + DCB_APP_IDTYPE_ETHTYPE; +} + +int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall) +{ + int i, err = 0; + + for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) { + struct dcbx_app_priority_entry *ent = + &bp->dcbx_local_feat.app.app_pri_tbl[i]; + + if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { + u8 up = bnx2x_dcbx_dcbnl_app_up(ent); + + /* avoid invalid user-priority */ + if (up) { + struct dcb_app app; + app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent); + app.protocol = ent->app_id; + app.priority = delall ? 0 : up; + err = dcb_setapp(bp->dev, &app); + } + } + } + return err; +} +#endif + +static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp) +{ + u8 prio, cos; + for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) { + for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) { + if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask + & (1 << prio)) { + bp->prio_to_cos[prio] = cos; + DP(BNX2X_MSG_DCB, + "tx_mapping %d --> %d\n", prio, cos); + } + } + } + + /* setup tc must be called under rtnl lock, but we can't take it here + * as we are handling an attetntion on a work queue which must be + * flushed at some rtnl-locked contexts (e.g. if down) + */ + if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state)) + schedule_delayed_work(&bp->sp_rtnl_task, 0); +} + +void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) +{ switch (state) { case BNX2X_DCBX_STATE_NEG_RECEIVED: { - struct lldp_local_mib local_mib = {0}; - DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_NEG_RECEIVED\n"); - if(bnx2x_dcbx_read_mib(bp, (u32*)&local_mib, dcbx_neg_res_offset, - DCBX_READ_LOCAL_MIB)) + DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n"); +#ifdef BCM_DCBNL + /** + * Delete app tlvs from dcbnl before reading new + * negotiation results + */ + bnx2x_dcbnl_update_applist(bp, true); + + /* Read rmeote mib if dcbx is in the FW */ + if (bnx2x_dcbx_read_shmem_remote_mib(bp)) + return; +#endif + /* Read neg results if dcbx is in the FW */ + if (bnx2x_dcbx_read_shmem_neg_results(bp)) return; + bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, + bp->dcbx_error); - bnx2x_dump_dcbx_drv_param(bp, &local_mib); + bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, + bp->dcbx_error); - bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_port_params, &local_mib); - BNX2X_ERR( "dcbx_port_params.ets.enabled %d\n", bp->dcbx_port_params.ets.enabled); + /* mark DCBX result for PMF migration */ + bnx2x_update_drv_flags(bp, + 1 << DRV_FLAGS_DCB_CONFIGURED, + 1); +#ifdef BCM_DCBNL + /* + * Add new app tlvs to dcbnl + */ + bnx2x_dcbnl_update_applist(bp, false); +#endif + /* + * reconfigure the netdevice with the results of the new + * dcbx negotiation. + */ + bnx2x_dcbx_update_tc_mapping(bp); - if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) { - bnx2x_dcbx_stop_hw_tx(bp); - return; - } - /* fall through */ - } - case BNX2X_DCBX_STATE_TX_PAUSED: - DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_PAUSED\n"); - BNX2X_ERR( "dcbx_port_params.ets.enabled %d\n", bp->dcbx_port_params.ets.enabled); - bnx2x_pfc_set_pfc(bp); - BNX2X_ERR( "dcbx_port_params.ets.enabled %d\n", bp->dcbx_port_params.ets.enabled); + /* + * allow other funtions to update their netdevices + * accordingly + */ + if (IS_MF(bp)) + bnx2x_link_sync_notify(bp); + + bnx2x_dcbx_stop_hw_tx(bp); - bnx2x_dcbx_update_ets_params(bp); - if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD){ - bnx2x_dcbx_resume_hw_tx(bp); return; } - /* fall through */ - case BNX2X_DCBX_STATE_TX_RELEASED: - DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_RELEASED\n"); - if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) - bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0); + case BNX2X_DCBX_STATE_TX_PAUSED: + DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n"); + bnx2x_pfc_set_pfc(bp); + bnx2x_dcbx_update_ets_params(bp); + bnx2x_dcbx_resume_hw_tx(bp); + + return; + case BNX2X_DCBX_STATE_TX_RELEASED: + DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n"); + bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0); +#ifdef BCM_DCBNL + /* + * Send a notification for the new negotiated parameters + */ + dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); +#endif return; default: BNX2X_ERR("Unknown DCBX_STATE\n"); } } - -#define LLDP_STATS_OFFSET(bp) (BP_PORT(bp)*\ - sizeof(struct lldp_dcbx_stat)) - -static void bnx2x_dcbx_lldp_updated_stat(struct bnx2x *bp, - u32 dcbx_stat_offset) -{ - -} - -/* calculate struct offset in array according to chip information */ -#define LLDP_PARAMS_OFFSET(bp) (BP_PORT(bp)*sizeof(struct lldp_params)) - #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \ BP_PORT(bp)*sizeof(struct lldp_admin_mib)) +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +/* calculate struct offset in array according to chip information */ +#define LLDP_PARAMS_OFFSET(bp) (BP_PORT(bp)*sizeof(struct lldp_params)) + +#define LLDP_STATS_OFFSET(bp) (BP_PORT(bp)*\ + sizeof(struct lldp_dcbx_stat)) static void bnx2x_dcbx_lldp_updated_params(struct bnx2x *bp, u32 dcbx_lldp_params_offset) { struct lldp_params lldp_params = {0}; - u32 i = 0, *buff = NULL; u32 offset = dcbx_lldp_params_offset + LLDP_PARAMS_OFFSET(bp); - DP(NETIF_MSG_LINK, "lldp_offset 0x%x\n", offset); + DP(BNX2X_MSG_DCB, "lldp_offset 0x%x\n", offset); - if(bnx2x_is_valid_lldp_params(bp) && - (bp->lldp_config_params.overwrite_settings == - BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE)) { + if (bp->lldp_config_params.overwrite_settings == + BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) { /* Read the data first */ - buff = (u32*)&lldp_params; - for(i = 0; i < sizeof(struct lldp_params); i += 4, buff++) - *buff = REG_RD(bp, (offset+ i)); + bnx2x_read_data(bp, (u32 *)&lldp_params, offset, + sizeof(struct lldp_params)); lldp_params.msg_tx_hold = (u8)bp->lldp_config_params.msg_tx_hold; @@ -606,24 +816,16 @@ static void bnx2x_dcbx_lldp_updated_params(struct bnx2x *bp, (u8)bp->lldp_config_params.tx_fast; /* Write the data.*/ - buff = (u32*)&lldp_params; - for( i = 0; i < sizeof(struct lldp_params); i += 4, buff++) - REG_WR(bp, (offset+ i) , *buff); - - - } else if(BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE == - bp->lldp_config_params.overwrite_settings) - bp->lldp_config_params.overwrite_settings = - BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID; + bnx2x_write_data(bp, (u32 *)&lldp_params, offset, + sizeof(struct lldp_params)); + } } - +#endif static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, u32 dcbx_lldp_params_offset) { struct lldp_admin_mib admin_mib; u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0; - u32 *buff; - u16 *buff16; u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp); /*shortcuts*/ @@ -631,128 +833,98 @@ static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params; memset(&admin_mib, 0, sizeof(struct lldp_admin_mib)); - buff = (u32*)&admin_mib; + /* Read the data first */ - for( i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++) - *buff = REG_RD(bp, (offset+ i)); + bnx2x_read_data(bp, (u32 *)&admin_mib, offset, + sizeof(struct lldp_admin_mib)); + if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON) + SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); + else + RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); - if(BNX2X_DCBX_CONFIG_INV_VALUE == dp->admin_dcbx_enable) { - if(dp->admin_dcbx_enable) - SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); - else - RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED); - } + if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) { - if(bnx2x_is_valid_dcbx_params(bp) && - (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE == - dp->overwrite_settings)) { - RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_CEE_VERSION_MASK); + RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK); admin_mib.ver_cfg_flags |= (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) & DCBX_CEE_VERSION_MASK; af->ets.enabled = (u8)dp->admin_ets_enable; - af->pfc.enabled =(u8)dp->admin_pfc_enable; + af->pfc.enabled = (u8)dp->admin_pfc_enable; /* FOR IEEE dp->admin_tc_supported_tx_enable */ - if(dp->admin_ets_configuration_tx_enable) + if (dp->admin_ets_configuration_tx_enable) SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_CONFIG_TX_ENABLED); else RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_CONFIG_TX_ENABLED); /* For IEEE admin_ets_recommendation_tx_enable */ - if(dp->admin_pfc_tx_enable) + if (dp->admin_pfc_tx_enable) SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_CONFIG_TX_ENABLED); else RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_CONFIG_TX_ENABLED); - if(dp->admin_application_priority_tx_enable) + if (dp->admin_application_priority_tx_enable) SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_CONFIG_TX_ENABLED); else RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_CONFIG_TX_ENABLED); - if(dp->admin_ets_willing) + if (dp->admin_ets_willing) SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); else RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING); /* For IEEE admin_ets_reco_valid */ - if(dp->admin_pfc_willing) + if (dp->admin_pfc_willing) SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); else RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING); - if(dp->admin_app_priority_willing) - SET_FLAGS(admin_mib.ver_cfg_flags,DCBX_APP_WILLING); + if (dp->admin_app_priority_willing) + SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); else - RESET_FLAGS(admin_mib.ver_cfg_flags,DCBX_APP_WILLING); + RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING); - /* - * Arrays that there cell are less than 32 bit are still - * in big endian mode. - */ - buff = (u32*)&af->ets.pg_bw_tbl[0]; - buff[0] = be32_to_cpu(buff[0]); - buff[1] = be32_to_cpu(buff[1]); + for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) { + DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i, + (u8)dp->admin_configuration_bw_precentage[i]); - for(i = 0 ; i < DCBX_MAX_NUM_PG; i++) { - af->ets.pg_bw_tbl[i] = (u8) - dp->admin_configuration_bw_precentage[i]; - DP(NETIF_MSG_LINK, "pg_bw_tbl[%d] = %02x\n", - i, af->ets.pg_bw_tbl[i]); + DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n", + i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i)); } - buff[0] = cpu_to_be32(buff[0]); - buff[1] = cpu_to_be32(buff[1]); + for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { + DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i, + (u8)dp->admin_configuration_ets_pg[i]); - /* Arrays that there cell are less than 32 bit are still - * in big endian mode.*/ - buff = (u32 *)&af->ets.pri_pg_tbl[0]; - buff[0] = be32_to_cpu(buff[0]); - - for( i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { - u8 val_0, val_1; - val_0 = (u8)dp->admin_configuration_ets_pg[i*2] & 0xF; - val_1 = (u8)(dp->admin_configuration_ets_pg[i*2 +1] & - 0xF) << 4; - af->ets.pri_pg_tbl[i] = (u8) (val_0 | val_1); - DP(NETIF_MSG_LINK, "pri_pg_tbl[%d] = %02x\n", - i, af->ets.pri_pg_tbl[i]); + DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n", + i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i)); } - buff[0] = cpu_to_be32(buff[0]); - /*For IEEE admin_recommendation_bw_precentage *For IEEE admin_recommendation_ets_pg */ af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap; - for( i = 0; i < 4; i++) { - if(dp->admin_priority_app_table[i].valid) { + for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { + if (dp->admin_priority_app_table[i].valid) { struct bnx2x_admin_priority_app_table *table = dp->admin_priority_app_table; - if((ETH_TYPE_FCOE == table[i].app_id) && + if ((ETH_TYPE_FCOE == table[i].app_id) && (TRAFFIC_TYPE_ETH == table[i].traffic_type)) traf_type = FCOE_APP_IDX; - else if((TCP_PORT_ISCSI == table[i].app_id) && + else if ((TCP_PORT_ISCSI == table[i].app_id) && (TRAFFIC_TYPE_PORT == table[i].traffic_type)) traf_type = ISCSI_APP_IDX; else traf_type = other_traf_type++; - - af->app.app_pri_tbl[traf_type].app_id[0] = - table[i].app_id & 0xff; - af->app.app_pri_tbl[traf_type].app_id[1] = - (table[i].app_id >> 8) & 0xff; - - buff16 = (u16*) - &af->app.app_pri_tbl[traf_type].app_id[0]; - buff16[0] = cpu_to_be16(buff16[0]); + af->app.app_pri_tbl[traf_type].app_id = + table[i].app_id; af->app.app_pri_tbl[traf_type].pri_bitmap = (u8)(1 << table[i].priority); @@ -768,20 +940,34 @@ static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, af->app.default_pri = (u8)dp->admin_default_priority; - } else if(BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE == - dp->overwrite_settings) - dp->overwrite_settings = BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID; + } /* Write the data. */ - buff = (u32 *)&admin_mib; - for( i = 0; i < sizeof(struct lldp_admin_mib); i+=4,buff++) - REG_WR(bp, (offset+ i) , *buff); + bnx2x_write_data(bp, (u32 *)&admin_mib, offset, + sizeof(struct lldp_admin_mib)); + } -void bnx2x_dcbx_init_params(struct bnx2x *bp) { +void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled) +{ + if (!CHIP_IS_E1x(bp)) { + bp->dcb_state = dcb_on; + bp->dcbx_enabled = dcbx_enabled; + } else { + bp->dcb_state = false; + bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID; + } + DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n", + dcb_on ? "ON" : "OFF", + dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" : + dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" : + dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ? + "on-chip with negotiation" : "invalid"); +} + +void bnx2x_dcbx_init_params(struct bnx2x *bp) +{ bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */ - bp->dcbx_config_params.dcb_enable = 1; - bp->dcbx_config_params.admin_dcbx_enable = 2; bp->dcbx_config_params.admin_ets_willing = 1; bp->dcbx_config_params.admin_pfc_willing = 1; bp->dcbx_config_params.overwrite_settings = 1; @@ -793,30 +979,30 @@ void bnx2x_dcbx_init_params(struct bnx2x *bp) { bp->dcbx_config_params.admin_application_priority_tx_enable = 1; bp->dcbx_config_params.admin_ets_reco_valid = 1; bp->dcbx_config_params.admin_app_priority_willing = 1; - bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 00; - bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 50; - bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 50; + bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100; + bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0; + bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0; bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0; bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0; bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0; bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0; bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0; - bp->dcbx_config_params.admin_configuration_ets_pg[0] = 1; + bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0; bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0; bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0; - bp->dcbx_config_params.admin_configuration_ets_pg[3] = 2; + bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0; bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0; bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0; bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0; bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0; - bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 0; - bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 1; - bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 2; + bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100; + bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0; + bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0; bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0; - bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 7; - bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 5; - bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 6; - bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 7; + bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0; + bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0; + bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0; + bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0; bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0; bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1; bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2; @@ -825,154 +1011,102 @@ void bnx2x_dcbx_init_params(struct bnx2x *bp) { bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5; bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6; bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7; - bp->dcbx_config_params.admin_pfc_bitmap = 0x8; /* FCoE(3) enable */ - bp->dcbx_config_params.admin_priority_app_table[0].valid = 1; - bp->dcbx_config_params.admin_priority_app_table[1].valid = 1; + bp->dcbx_config_params.admin_pfc_bitmap = 0x0; + bp->dcbx_config_params.admin_priority_app_table[0].valid = 0; + bp->dcbx_config_params.admin_priority_app_table[1].valid = 0; bp->dcbx_config_params.admin_priority_app_table[2].valid = 0; bp->dcbx_config_params.admin_priority_app_table[3].valid = 0; - bp->dcbx_config_params.admin_priority_app_table[0].priority = 3; - bp->dcbx_config_params.admin_priority_app_table[1].priority = 0; - bp->dcbx_config_params.admin_priority_app_table[2].priority = 0; - bp->dcbx_config_params.admin_priority_app_table[3].priority = 0; - bp->dcbx_config_params.admin_priority_app_table[0].traffic_type = 0; - bp->dcbx_config_params.admin_priority_app_table[1].traffic_type = 1; - bp->dcbx_config_params.admin_priority_app_table[2].traffic_type = 0; - bp->dcbx_config_params.admin_priority_app_table[3].traffic_type = 0; - bp->dcbx_config_params.admin_priority_app_table[0].app_id = 0x8906; - bp->dcbx_config_params.admin_priority_app_table[1].app_id = 3260; - bp->dcbx_config_params.admin_priority_app_table[2].app_id = 0; - bp->dcbx_config_params.admin_priority_app_table[3].app_id = 0; - bp->dcbx_config_params.admin_default_priority = - bp->dcbx_config_params.admin_priority_app_table[1].priority; + bp->dcbx_config_params.admin_default_priority = 0; } -void bnx2x_dcbx_init(struct bnx2x *bp) { +void bnx2x_dcbx_init(struct bnx2x *bp) +{ u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE; + +#ifndef BCM_DCB /* ! BNX2X_UPSTREAM */ + return; +#endif + if (bp->dcbx_enabled <= 0) + return; + /* validate: * chip of good for dcbx version, - * dcb wanted + * dcb is wanted * the function is pmf * shmem2 contains DCBX support fields */ - DP(NETIF_MSG_LINK, "dcb_enable %d bp->port.pmf %d\n", - bp->dcbx_config_params.dcb_enable, bp->port.pmf ); + DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n", + bp->dcb_state, bp->port.pmf); - if((CHIP_IS_E1H(bp) || (CHIP_IS_E2(bp) && !CHIP_MODE_IS_4_PORT(bp))) && - bp->dcbx_config_params.dcb_enable && - bp->port.pmf && - SHMEM2_HAS(bp, dcbx_lldp_params_offset)) { - dcbx_lldp_params_offset = SHMEM2_RD(bp,dcbx_lldp_params_offset); - DP(NETIF_MSG_LINK, "dcbx_lldp_params_offset 0x%x\n", + if (bp->dcb_state == BNX2X_DCB_STATE_ON && bp->port.pmf && + SHMEM2_HAS(bp, dcbx_lldp_params_offset)) { + dcbx_lldp_params_offset = + SHMEM2_RD(bp, dcbx_lldp_params_offset); + + DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n", dcbx_lldp_params_offset); + + bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0); + if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) { - u32 dcbx_stat_offset; +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ bnx2x_dcbx_lldp_updated_params(bp, dcbx_lldp_params_offset); - if(SHMEM2_HAS(bp, dcbx_lldp_dcbx_stat_offset) && - (dcbx_stat_offset = - SHMEM2_RD(bp,dcbx_lldp_dcbx_stat_offset)) != - SHMEM_LLDP_DCBX_STAT_NONE) - bnx2x_dcbx_lldp_updated_stat(bp, - dcbx_stat_offset); - - - +#endif bnx2x_dcbx_admin_mib_updated_params(bp, dcbx_lldp_params_offset); - /* set default configuration BC has */ - bnx2x_dcbx_set_params(bp, - BNX2X_DCBX_STATE_NEG_RECEIVED); - - bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG,0); + /* Let HW start negotiation */ + bnx2x_fw_command(bp, + DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0); } } } - -void bnx2x_dcb_init_intmem_pfc(struct bnx2x *bp) -{ - struct priority_cos pricos[MAX_PFC_TRAFFIC_TYPES]; - u32 i = 0, addr; - memset(pricos, 0, sizeof(pricos)); - /* Default initialization */ - for (i = 0; i < MAX_PFC_TRAFFIC_TYPES; i++) - pricos[i].priority = LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED; - - /* Store per port struct to internal memory */ - addr = BAR_XSTRORM_INTMEM + - XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) + - offsetof(struct cmng_struct_per_port, - traffic_type_to_priority_cos); - __storm_memset_struct(bp, addr, sizeof(pricos), (u32*)pricos); - - - /* LLFC disabled.*/ - REG_WR8(bp ,BAR_XSTRORM_INTMEM + - XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) + - offsetof(struct cmng_struct_per_port, llfc_mode), - LLFC_MODE_NONE); - - /* DCBX disabled.*/ - REG_WR8(bp ,BAR_XSTRORM_INTMEM + - XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) + - offsetof(struct cmng_struct_per_port, dcb_enabled), - DCB_DISABLED); -} - - static void bnx2x_dcbx_print_cos_params(struct bnx2x *bp, - struct flow_control_configuration *pfc_fw_cfg) + struct bnx2x_func_tx_start_params *pfc_fw_cfg) { -#ifdef BNX2X_DUMP_DCBX u8 pri = 0; u8 cos = 0; - BNX2X_ERR("pfc_fw_cfg->dcb_version %x\n",pfc_fw_cfg->dcb_version); - BNX2X_ERR("pdev->params.dcbx_port_params.pfc." - "priority_non_pauseable_mask %x\n", - bp->dcbx_port_params.pfc.priority_non_pauseable_mask); + DP(BNX2X_MSG_DCB, + "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version); + DP(BNX2X_MSG_DCB, + "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n", + bp->dcbx_port_params.pfc.priority_non_pauseable_mask); - for( cos =0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) { - BNX2X_ERR("pdev->params.dcbx_port_params.ets." - "cos_params[%d].pri_bitmask %x\n",cos, - bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask); + for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) { + DP(BNX2X_MSG_DCB, + "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n", + cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask); - BNX2X_ERR("pdev->params.dcbx_port_params.ets." - "cos_params[%d].bw_tbl %x\n",cos, - bp->dcbx_port_params.ets.cos_params[cos].bw_tbl); + DP(BNX2X_MSG_DCB, + "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n", + cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl); - BNX2X_ERR("pdev->params.dcbx_port_params.ets." - "cos_params[%d].strict %x\n",cos, - bp->dcbx_port_params.ets.cos_params[cos].strict); + DP(BNX2X_MSG_DCB, + "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n", + cos, bp->dcbx_port_params.ets.cos_params[cos].strict); - BNX2X_ERR("pdev->params.dcbx_port_params.ets." - "cos_params[%d].pauseable %x\n",cos, - bp->dcbx_port_params.ets.cos_params[cos].pauseable); + DP(BNX2X_MSG_DCB, + "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n", + cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable); } for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { - BNX2X_ERR("pfc_fw_cfg->traffic_type_to_priority_cos[%d]." - "priority %x\n",pri, - pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority); + DP(BNX2X_MSG_DCB, + "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n", + pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority); - BNX2X_ERR("pfc_fw_cfg->traffic_type_to_priority_cos[%d]." - "cos %x\n",pri, - pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos); + DP(BNX2X_MSG_DCB, + "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n", + pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos); } -#endif } -/* helper: read len bytes from addr into buff by REG_RD */ -static inline void bnx2x_read_data(struct bnx2x *bp, u32* buff, - u32 addr, u32 len) -{ - int i; - for( i = 0 ;i < len; i += 4, buff++) - *buff = REG_RD(bp, (addr + i)); -} +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ -int bnx2x_dcb_get_lldp_params_ioctl(struct bnx2x *bp, void *uaddr) +int bnx2x_dcb_get_lldp_params_ioctl(struct bnx2x *bp, void __user *uaddr) { struct bnx2x_lldp_params_get lldp_params; struct lldp_params mcp_lldp_params; @@ -980,22 +1114,40 @@ int bnx2x_dcb_get_lldp_params_ioctl(struct bnx2x *bp, void *uaddr) int i; u32 offset, stat_offset; - if (copy_from_user(&lldp_params, uaddr, - sizeof(struct bnx2x_lldp_params_get))) - return -EFAULT; + if (!bp->port.pmf) { + DP(BNX2X_MSG_DCB, "Query is supported on pmf only\n"); + return -EINVAL; + } - if (lldp_params.ver_num != LLDP_PARAMS_VER_NUM) + if (bp->dcbx_enabled != BNX2X_DCBX_ENABLED_ON_NEG_ON) { + DP(BNX2X_MSG_DCB, "DCBX is not enabled\n"); + return -EINVAL; + } + + if (copy_from_user(&lldp_params, uaddr, + sizeof(struct bnx2x_lldp_params_get))) { + DP(BNX2X_MSG_DCB, "Copy user ioctl params failed\n"); + return -EFAULT; + } + + if (lldp_params.ver_num != LLDP_PARAMS_VER_NUM) { + DP(BNX2X_MSG_DCB, "Wrong ioctl parameters version\n"); return -EINVAL; /* incorrect version */ + } if(CHIP_IS_E1(bp) || !(SHMEM2_HAS(bp, dcbx_lldp_params_offset)) || - !(SHMEM2_HAS(bp, dcbx_lldp_dcbx_stat_offset))) + !(SHMEM2_HAS(bp, dcbx_lldp_dcbx_stat_offset))) { + DP(BNX2X_MSG_DCB, "DCB not supported\n"); return -EINVAL; /* unsupported feature */ + } offset = SHMEM2_RD(bp, dcbx_lldp_params_offset); stat_offset = SHMEM2_RD(bp, dcbx_lldp_dcbx_stat_offset); if (offset == SHMEM_LLDP_DCBX_PARAMS_NONE || - stat_offset == SHMEM_LLDP_DCBX_STAT_NONE) + stat_offset == SHMEM_LLDP_DCBX_STAT_NONE) { + DP(BNX2X_MSG_DCB, "DCB not configured\n"); return -EINVAL; /* feature not configured */ + } memset(&lldp_params, 0, sizeof(struct bnx2x_lldp_params_get)); @@ -1043,14 +1195,16 @@ int bnx2x_dcb_get_lldp_params_ioctl(struct bnx2x *bp, void *uaddr) lldp_params.local_chassis_id[i] = lldp_dcbx_stat.local_chassis_id[i]; if (copy_to_user(uaddr, &lldp_params, - sizeof(struct bnx2x_lldp_params_get))) + sizeof(struct bnx2x_lldp_params_get))) { + DP(BNX2X_MSG_DCB, "Copy ioctl params to user failed\n"); return -EFAULT; - DP(NETIF_MSG_LINK, "get_lldp_params done (%d)\n", + } + DP(BNX2X_MSG_DCB, "get_lldp_params done (%d)\n", (int)sizeof(struct bnx2x_lldp_params_get)); return 0; } - +#endif /* ! BNX2X_UPSTREAM */ /* fills help_data according to pg_info */ static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, u32 *pg_pri_orginal_spread, @@ -1092,19 +1246,13 @@ static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, help_data->num_of_pg++; } } - DP(NETIF_MSG_LINK,"add_traf_type %d pg_found %s num_of_pg %d\n", - add_traf_type, - (false == pg_found) ? "NO": "YES", - help_data->num_of_pg); + DP(BNX2X_MSG_DCB, + "add_traf_type %d pg_found %s num_of_pg %d\n", + add_traf_type, (false == pg_found) ? "NO" : "YES", + help_data->num_of_pg); } } - -/******************************************************************************* - * Description: single priority group - * - * Return: - ******************************************************************************/ static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp, struct cos_help_data *cos_data, u32 pri_join_mask) @@ -1117,11 +1265,6 @@ static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp, cos_data->num_of_cos = 1; } -/******************************************************************************* - * Description: updating the cos bw - * - * Return: - ******************************************************************************/ static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp, struct cos_entry_help_data *data, u8 pg_bw) @@ -1132,15 +1275,10 @@ static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp, data->cos_bw += pg_bw; } -/******************************************************************************* - * Description: single priority group - * - * Return: - ******************************************************************************/ static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, - struct cos_help_data *cos_data, - u32 *pg_pri_orginal_spread, - struct dcbx_ets_feature *ets) + struct cos_help_data *cos_data, + u32 *pg_pri_orginal_spread, + struct dcbx_ets_feature *ets) { u32 pri_tested = 0; u8 i = 0; @@ -1152,7 +1290,7 @@ static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, cos_data->data[1].pausable = false; cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0; - for (i=0 ; i < num_of_pri ; i++) { + for (i = 0 ; i < num_of_pri ; i++) { pri_tested = 1 << bp->dcbx_port_params. app.traffic_type_priority[i]; @@ -1166,14 +1304,14 @@ static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params. app.traffic_type_priority[i]]; /* There can be only one strict pg */ - if ( pg_entry < DCBX_MAX_NUM_PG) + if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry], - ets->pg_bw_tbl[pg_entry]); + DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry)); else /* If we join a group and one is strict * than the bw rulls */ cos_data->data[entry].strict = - BNX2X_DCBX_COS_HIGH_STRICT; + BNX2X_DCBX_STRICT_COS_HIGHEST; } if ((0 == cos_data->data[0].pri_join_mask) && (0 == cos_data->data[1].pri_join_mask)) @@ -1182,10 +1320,10 @@ static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, #ifndef POWER_OF_2 -#define POWER_OF_2(x) ((0 != x) && (0 == (x &(x-1)))) +#define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) #endif -static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp, +static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp, struct pg_help_data *pg_help_data, struct cos_help_data *cos_data, u32 pri_join_mask, @@ -1201,14 +1339,14 @@ static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp, return; } /* single priority group */ - if ( pg_help_data->data[0].pg < DCBX_MAX_NUM_PG) { + if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { /* If there are both pauseable and non-pauseable priorities, * the pauseable priorities go to the first queue and * the non-pauseable priorities go to the second queue. */ if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { /* Pauseable */ - cos_data->data[0].pausable= true; + cos_data->data[0].pausable = true; /* Non pauseable.*/ cos_data->data[1].pausable = false; @@ -1253,7 +1391,7 @@ static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp, * they will all go to the same queue. */ bnx2x_dcbx_ets_disabled_entry_data(bp, - cos_data,pri_join_mask); + cos_data, pri_join_mask); } else { /* priority group which is not BW limited (PG#15):*/ if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) { @@ -1262,17 +1400,19 @@ static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp, * queue and the non-pauseable priorities * go to the second queue. */ - if (DCBX_PFC_PRI_GET_PAUSE(bp,pri_join_mask) > - DCBX_PFC_PRI_GET_NON_PAUSE(bp,pri_join_mask)) { + if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) > + DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) { cos_data->data[0].strict = - BNX2X_DCBX_COS_HIGH_STRICT; + BNX2X_DCBX_STRICT_COS_HIGHEST; cos_data->data[1].strict = - BNX2X_DCBX_COS_LOW_STRICT; + BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( + BNX2X_DCBX_STRICT_COS_HIGHEST); } else { cos_data->data[0].strict = - BNX2X_DCBX_COS_LOW_STRICT; + BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( + BNX2X_DCBX_STRICT_COS_HIGHEST); cos_data->data[1].strict = - BNX2X_DCBX_COS_HIGH_STRICT; + BNX2X_DCBX_STRICT_COS_HIGHEST; } /* Pauseable */ cos_data->data[0].pausable = true; @@ -1286,9 +1426,9 @@ static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp, */ cos_data->data[0].pausable = cos_data->data[1].pausable = - IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,pri_join_mask); + IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); - for (i=0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) { + for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) { pri_tested = 1 << bp->dcbx_port_params. app.traffic_type_priority[i]; /* Remove priority tested */ @@ -1299,8 +1439,7 @@ static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp, } if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX) - BNX2X_ERR("Invalid value for pri_join_mask -" - " could not find a priority \n"); + BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n"); cos_data->data[0].pri_join_mask = pri_mask_without_pri; cos_data->data[1].pri_join_mask = pri_tested; @@ -1308,23 +1447,26 @@ static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp, * and that with the highest priority * gets the highest strict priority in the arbiter. */ - cos_data->data[0].strict = BNX2X_DCBX_COS_LOW_STRICT; - cos_data->data[1].strict = BNX2X_DCBX_COS_HIGH_STRICT; + cos_data->data[0].strict = + BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI( + BNX2X_DCBX_STRICT_COS_HIGHEST); + cos_data->data[1].strict = + BNX2X_DCBX_STRICT_COS_HIGHEST; } } } -static void bnx2x_dcbx_two_pg_to_cos_params( - struct bnx2x *bp, - struct pg_help_data *pg_help_data, - struct dcbx_ets_feature *ets, - struct cos_help_data *cos_data, - u32 *pg_pri_orginal_spread, +static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( + struct bnx2x *bp, + struct pg_help_data *pg_help_data, + struct dcbx_ets_feature *ets, + struct cos_help_data *cos_data, + u32 *pg_pri_orginal_spread, u32 pri_join_mask, u8 num_of_dif_pri) { u8 i = 0; - u8 pg[E2_NUM_OF_COS] = {0}; + u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 }; /* If there are both pauseable and non-pauseable priorities, * the pauseable priorities go to the first queue and @@ -1348,7 +1490,8 @@ static void bnx2x_dcbx_two_pg_to_cos_params( cos_data->data[0].pausable = true; /* Non pauseable. */ cos_data->data[1].pausable = false; - if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_help_data->data[0].pg_priority)) { + if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, + pg_help_data->data[0].pg_priority)) { /* 0 is pauseable */ cos_data->data[0].pri_join_mask = pg_help_data->data[0].pg_priority; @@ -1369,7 +1512,7 @@ static void bnx2x_dcbx_two_pg_to_cos_params( * only non-pauseable, each PG goes to a queue. */ cos_data->data[0].pausable = cos_data->data[1].pausable = - IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,pri_join_mask); + IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); cos_data->data[0].pri_join_mask = pg_help_data->data[0].pg_priority; pg[0] = pg_help_data->data[0].pg; @@ -1379,20 +1522,68 @@ static void bnx2x_dcbx_two_pg_to_cos_params( } /* There can be only one strict pg */ - for (i=0 ; i < E2_NUM_OF_COS; i++) { - if ( pg[i] < DCBX_MAX_NUM_PG) - cos_data->data[i].cos_bw = ets->pg_bw_tbl[pg[i]]; + for (i = 0 ; i < ARRAY_SIZE(pg); i++) { + if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES) + cos_data->data[i].cos_bw = + DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]); else - cos_data->data[i].strict = BNX2X_DCBX_COS_HIGH_STRICT; + cos_data->data[i].strict = + BNX2X_DCBX_STRICT_COS_HIGHEST; } } -/******************************************************************************* - * Description: Still - * - * Return: - ******************************************************************************/ -static void bnx2x_dcbx_three_pg_to_cos_params( +static int bnx2x_dcbx_join_pgs( + struct bnx2x *bp, + struct dcbx_ets_feature *ets, + struct pg_help_data *pg_help_data, + u8 required_num_of_pg) +{ + u8 entry_joined = pg_help_data->num_of_pg - 1; + u8 entry_removed = entry_joined + 1; + u8 pg_joined = 0; + + if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data) + <= pg_help_data->num_of_pg) { + + BNX2X_ERR("required_num_of_pg can't be zero\n"); + return -EINVAL; + } + + while (required_num_of_pg < pg_help_data->num_of_pg) { + entry_joined = pg_help_data->num_of_pg - 2; + entry_removed = entry_joined + 1; + /* protect index */ + entry_removed %= ARRAY_SIZE(pg_help_data->data); + + pg_help_data->data[entry_joined].pg_priority |= + pg_help_data->data[entry_removed].pg_priority; + + pg_help_data->data[entry_joined].num_of_dif_pri += + pg_help_data->data[entry_removed].num_of_dif_pri; + + if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG || + pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG) + /* Entries joined strict priority rules */ + pg_help_data->data[entry_joined].pg = + DCBX_STRICT_PRI_PG; + else { + /* Entries can be joined join BW */ + pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl, + pg_help_data->data[entry_joined].pg) + + DCBX_PG_BW_GET(ets->pg_bw_tbl, + pg_help_data->data[entry_removed].pg); + + DCBX_PG_BW_SET(ets->pg_bw_tbl, + pg_help_data->data[entry_joined].pg, pg_joined); + } + /* Joined the entries */ + pg_help_data->num_of_pg--; + } + + return 0; +} + +static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( struct bnx2x *bp, struct pg_help_data *pg_help_data, struct dcbx_ets_feature *ets, @@ -1415,7 +1606,7 @@ static void bnx2x_dcbx_three_pg_to_cos_params( */ if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) bnx2x_dcbx_separate_pauseable_from_non(bp, - cos_data, pg_pri_orginal_spread,ets); + cos_data, pg_pri_orginal_spread, ets); else { /* If two BW-limited PG-s were combined to one queue, * the BW is their sum. @@ -1435,15 +1626,15 @@ static void bnx2x_dcbx_three_pg_to_cos_params( */ cos_data->data[0].pausable = cos_data->data[1].pausable = - IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,pri_join_mask); + IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask); - for (i=0 ; i < num_of_pri; i++) { + for (i = 0 ; i < num_of_pri; i++) { pri_tested = 1 << bp->dcbx_port_params. app.traffic_type_priority[i]; pg_entry = (u8)pg_pri_orginal_spread[bp-> dcbx_port_params.app.traffic_type_priority[i]]; - if (pg_entry < DCBX_MAX_NUM_PG) { + if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) { entry = 0; if (i == (num_of_pri-1) && @@ -1456,203 +1647,372 @@ static void bnx2x_dcbx_three_pg_to_cos_params( pri_tested; bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry], - ets->pg_bw_tbl[pg_entry]); + DCBX_PG_BW_GET(ets->pg_bw_tbl, + pg_entry)); } else { b_found_strict = true; cos_data->data[1].pri_join_mask |= pri_tested; /* If we join a group and one is strict * than the bw rulls */ cos_data->data[1].strict = - BNX2X_DCBX_COS_HIGH_STRICT; + BNX2X_DCBX_STRICT_COS_HIGHEST; } } } } -static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, +static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, struct pg_help_data *help_data, struct dcbx_ets_feature *ets, - u32 *pg_pri_orginal_spread) + struct cos_help_data *cos_data, + u32 *pg_pri_orginal_spread, + u32 pri_join_mask, + u8 num_of_dif_pri) { - struct cos_help_data cos_data ; - u8 i = 0; - u32 pri_join_mask = 0; - u8 num_of_dif_pri = 0; - memset(&cos_data, 0, sizeof(cos_data)); - /* Validate the pg value */ - for ( i = 0; i < help_data->num_of_pg ; i++) { - if (DCBX_STRICT_PRIORITY != help_data->data[i].pg && - DCBX_MAX_NUM_PG <= help_data->data[i].pg) - BNX2X_ERR("Invalid pg[%d] data %x\n",i, - help_data->data[i].pg); - pri_join_mask |= help_data->data[i].pg_priority; - num_of_dif_pri += help_data->data[i].num_of_dif_pri; - } - - /* default settings */ - cos_data.num_of_cos = 2; - for ( i = 0; i < E2_NUM_OF_COS ; i++) { - cos_data.data[i].pri_join_mask = pri_join_mask; - cos_data.data[i].pausable = false; - cos_data.data[i].strict = BNX2X_DCBX_COS_NOT_STRICT; - cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW; - } + /* default E2 settings */ + cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2; switch (help_data->num_of_pg) { case 1: - - bxn2x_dcbx_single_pg_to_cos_params( + bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params( bp, help_data, - &cos_data, + cos_data, pri_join_mask, num_of_dif_pri); break; case 2: - bnx2x_dcbx_two_pg_to_cos_params( + bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params( bp, help_data, ets, - &cos_data, + cos_data, pg_pri_orginal_spread, pri_join_mask, num_of_dif_pri); break; case 3: - bnx2x_dcbx_three_pg_to_cos_params( + bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( bp, help_data, ets, - &cos_data, + cos_data, pg_pri_orginal_spread, pri_join_mask, num_of_dif_pri); - break; default: BNX2X_ERR("Wrong pg_help_data.num_of_pg\n"); - bnx2x_dcbx_ets_disabled_entry_data(bp,&cos_data,pri_join_mask); + bnx2x_dcbx_ets_disabled_entry_data(bp, + cos_data, pri_join_mask); + } +} + +static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp, + struct cos_help_data *cos_data, + u8 entry, + u8 num_spread_of_entries, + u8 strict_app_pris) +{ + u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST; + u8 num_of_app_pri = MAX_PFC_PRIORITIES; + u8 app_pri_bit = 0; + + while (num_spread_of_entries && num_of_app_pri > 0) { + app_pri_bit = 1 << (num_of_app_pri - 1); + if (app_pri_bit & strict_app_pris) { + struct cos_entry_help_data *data = &cos_data-> + data[entry]; + num_spread_of_entries--; + if (num_spread_of_entries == 0) { + /* last entry needed put all the entries left */ + data->cos_bw = DCBX_INVALID_COS_BW; + data->strict = strict_pri; + data->pri_join_mask = strict_app_pris; + data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, + data->pri_join_mask); + } else { + strict_app_pris &= ~app_pri_bit; + + data->cos_bw = DCBX_INVALID_COS_BW; + data->strict = strict_pri; + data->pri_join_mask = app_pri_bit; + data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, + data->pri_join_mask); + } + + strict_pri = + BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri); + entry++; + } + + num_of_app_pri--; } - for (i=0; i < cos_data.num_of_cos ; i++) { - struct bnx2x_dcbx_cos_params *params = + if (num_spread_of_entries) { + BNX2X_ERR("Didn't succeed to spread strict priorities\n"); + return -EINVAL; + } + + return 0; +} + +static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp, + struct cos_help_data *cos_data, + u8 entry, + u8 num_spread_of_entries, + u8 strict_app_pris) +{ + + if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry, + num_spread_of_entries, + strict_app_pris)) { + struct cos_entry_help_data *data = &cos_data-> + data[entry]; + /* Fill BW entry */ + data->cos_bw = DCBX_INVALID_COS_BW; + data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST; + data->pri_join_mask = strict_app_pris; + data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, + data->pri_join_mask); + return 1; + } + + return num_spread_of_entries; +} + +static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp, + struct pg_help_data *help_data, + struct dcbx_ets_feature *ets, + struct cos_help_data *cos_data, + u32 pri_join_mask) + +{ + u8 need_num_of_entries = 0; + u8 i = 0; + u8 entry = 0; + + /* + * if the number of requested PG-s in CEE is greater than 3 + * then the results are not determined since this is a violation + * of the standard. + */ + if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) { + if (bnx2x_dcbx_join_pgs(bp, ets, help_data, + DCBX_COS_MAX_NUM_E3B0)) { + BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n"); + bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, + pri_join_mask); + return; + } + } + + for (i = 0 ; i < help_data->num_of_pg; i++) { + struct pg_entry_help_data *pg = &help_data->data[i]; + if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { + struct cos_entry_help_data *data = &cos_data-> + data[entry]; + /* Fill BW entry */ + data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg); + data->strict = BNX2X_DCBX_STRICT_INVALID; + data->pri_join_mask = pg->pg_priority; + data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp, + data->pri_join_mask); + + entry++; + } else { + need_num_of_entries = min_t(u8, + (u8)pg->num_of_dif_pri, + (u8)DCBX_COS_MAX_NUM_E3B0 - + help_data->num_of_pg + 1); + /* + * If there are still VOQ-s which have no associated PG, + * then associate these VOQ-s to PG15. These PG-s will + * be used for SP between priorities on PG15. + */ + entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data, + entry, need_num_of_entries, pg->pg_priority); + } + } + + /* the entry will represent the number of COSes used */ + cos_data->num_of_cos = entry; +} +static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp, + struct pg_help_data *help_data, + struct dcbx_ets_feature *ets, + u32 *pg_pri_orginal_spread) +{ + struct cos_help_data cos_data; + u8 i = 0; + u32 pri_join_mask = 0; + u8 num_of_dif_pri = 0; + + memset(&cos_data, 0, sizeof(cos_data)); + + /* Validate the pg value */ + for (i = 0; i < help_data->num_of_pg ; i++) { + if (DCBX_STRICT_PRIORITY != help_data->data[i].pg && + DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg) + BNX2X_ERR("Invalid pg[%d] data %x\n", i, + help_data->data[i].pg); + pri_join_mask |= help_data->data[i].pg_priority; + num_of_dif_pri += help_data->data[i].num_of_dif_pri; + } + + /* defaults */ + cos_data.num_of_cos = 1; + for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) { + cos_data.data[i].pri_join_mask = 0; + cos_data.data[i].pausable = false; + cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID; + cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW; + } + + if (CHIP_IS_E3B0(bp)) + bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets, + &cos_data, pri_join_mask); + else /* E2 + E3A0 */ + bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp, + help_data, ets, + &cos_data, + pg_pri_orginal_spread, + pri_join_mask, + num_of_dif_pri); + + for (i = 0; i < cos_data.num_of_cos ; i++) { + struct bnx2x_dcbx_cos_params *p = &bp->dcbx_port_params.ets.cos_params[i]; - params->pauseable = cos_data.data[i].pausable; - params->strict = cos_data.data[i].strict; - params->bw_tbl = cos_data.data[i].cos_bw; - if (params->pauseable){ - params->pri_bitmask = - DCBX_PFC_PRI_GET_PAUSE(bp, - cos_data.data[i].pri_join_mask); - DP(NETIF_MSG_LINK, "COS %d PAUSABLE prijoinmask 0x%x\n", - i, cos_data.data[i].pri_join_mask); - } else { - params->pri_bitmask = - DCBX_PFC_PRI_GET_NON_PAUSE(bp, - cos_data.data[i].pri_join_mask); - DP(NETIF_MSG_LINK, "COS %d NONPAUSABLE prijoinmask " - "0x%x\n", - i, cos_data.data[i].pri_join_mask); + p->strict = cos_data.data[i].strict; + p->bw_tbl = cos_data.data[i].cos_bw; + p->pri_bitmask = cos_data.data[i].pri_join_mask; + p->pauseable = cos_data.data[i].pausable; + + /* sanity */ + if (p->bw_tbl != DCBX_INVALID_COS_BW || + p->strict != BNX2X_DCBX_STRICT_INVALID) { + if (p->pri_bitmask == 0) + BNX2X_ERR("Invalid pri_bitmask for %d\n", i); + + if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) { + + if (p->pauseable && + DCBX_PFC_PRI_GET_NON_PAUSE(bp, + p->pri_bitmask) != 0) + BNX2X_ERR("Inconsistent config for pausable COS %d\n", + i); + + if (!p->pauseable && + DCBX_PFC_PRI_GET_PAUSE(bp, + p->pri_bitmask) != 0) + BNX2X_ERR("Inconsistent config for nonpausable COS %d\n", + i); + } } + + if (p->pauseable) + DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n", + i, cos_data.data[i].pri_join_mask); + else + DP(BNX2X_MSG_DCB, + "COS %d NONPAUSABLE prijoinmask 0x%x\n", + i, cos_data.data[i].pri_join_mask); } bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ; } static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp, - u32 * set_configuration_ets_pg, - u8 * mcp_pri_pg_tbl) + u32 *set_configuration_ets_pg, + u32 *pri_pg_tbl) { int i; - u32 *buff; - int size_in_bytes = DCBX_MAX_NUM_PRI_PG_ENTRIES; - int size_in_dwords = size_in_bytes/sizeof(u32); - /* convert */ - buff = (u32 *)&mcp_pri_pg_tbl[0]; - for( i = 0; i < size_in_dwords; i++) - buff[i] = be32_to_cpu(buff[i]); + for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) { + set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i); - /* Nibble handling */ - for(i=0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES*2; i++) { - if(0 == (i % 2)) - set_configuration_ets_pg[i] = - mcp_pri_pg_tbl[i/2] & (0xF); - else - set_configuration_ets_pg[i] = - (mcp_pri_pg_tbl[i/2] >> 4) & (0xF); - DP(NETIF_MSG_LINK,"set_configuration_ets_pg[%d] = 0x%x\n", + DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n", i, set_configuration_ets_pg[i]); } } +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ static void bnx2x_dcbx_get_bw_precentage_tbl(struct bnx2x *bp, u32 * set_configuration_bw, - u8 * mcp_pg_bw_tbl) { + u32 * pg_bw_tbl) { int i; - u32 *buff; - int size_in_bytes = DCBX_MAX_NUM_PG; - int size_in_dwords = size_in_bytes/sizeof(u32); - /* convert */ - buff = (u32 *)&mcp_pg_bw_tbl[0]; - for( i = 0; i < size_in_dwords ;i++) - buff[i] = be32_to_cpu(buff[i]); - - for( i = 0 ;i < size_in_bytes ; i++) - set_configuration_bw[i] = mcp_pg_bw_tbl[i]; + for(i = 0 ;i < DCBX_MAX_NUM_PG_BW_ENTRIES ; i++) + set_configuration_bw[i] = DCBX_PG_BW_GET(pg_bw_tbl, i); } +/* assumes that app_array is not smaller than num_entries */ static void bnx2x_dcbx_get_priority_app_table(struct bnx2x *bp, - struct bnx2x_admin_priority_app_table * set_priority_app, - struct dcbx_app_priority_entry * mcp_array) + struct bnx2x_admin_priority_app_table *set_priority_app, + int num_entries, + struct dcbx_app_priority_entry *app_array) { int i; - u16 *buff16; - for(i = 0 ;i < DCBX_MAX_APP_PROTOCOL; i++) { + for (i = 0; i < num_entries; i++) { set_priority_app[i].valid = - GET_FLAGS(mcp_array[i].appBitfield, DCBX_APP_ENTRY_VALID) ? + GET_FLAGS(app_array[i].appBitfield, DCBX_APP_ENTRY_VALID) ? true : false; - if(GET_FLAGS(mcp_array[i].appBitfield,DCBX_APP_SF_ETH_TYPE)) + if(GET_FLAGS(app_array[i].appBitfield,DCBX_APP_SF_ETH_TYPE)) set_priority_app[i].traffic_type = TRAFFIC_TYPE_ETH; else set_priority_app[i].traffic_type = TRAFFIC_TYPE_PORT; - set_priority_app[i].priority = mcp_array[i].pri_bitmap; + set_priority_app[i].priority = app_array[i].pri_bitmap; - /* Arrays that there cell are less than 32 bit are still - * in big endian mode. */ - buff16 = (u16 *)&mcp_array[i].app_id[0]; - buff16[0] = be16_to_cpu(buff16[0]); - set_priority_app[i].app_id = (mcp_array[i].app_id[0]) | - (mcp_array[i].app_id[1] << 8); + set_priority_app[i].app_id = app_array[i].app_id; } } -int bnx2x_dcb_set_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr) +int bnx2x_dcb_set_dcbx_params_ioctl(struct bnx2x *bp, void __user *uaddr) { struct bnx2x_dcbx_params_set dcbx_params; int rc = 0; if (bp->recovery_state != BNX2X_RECOVERY_DONE) { - netdev_err(bp->dev, "Handling parity error recovery. " - "Try again later\n"); + DP(BNX2X_MSG_DCB, + "Handling parity error recovery. Try again later\n"); return -EAGAIN; } - if(copy_from_user(&dcbx_params, uaddr, - sizeof(struct bnx2x_dcbx_params_set))) - return -EFAULT; + if (!bp->port.pmf) { + DP(BNX2X_MSG_DCB, "Configuration is supported on pmf only\n"); + return -EINVAL; + } - if (dcbx_params.ver_num != DCBX_PARAMS_VER_NUM) + if(copy_from_user(&dcbx_params, uaddr, + sizeof(struct bnx2x_dcbx_params_set))) { + DP(BNX2X_MSG_DCB, "Copy user ioctl params failed\n"); + return -EFAULT; + } + + if (dcbx_params.ver_num != DCBX_PARAMS_VER_NUM) { + DP(BNX2X_MSG_DCB, "Wrong ioctl parameters version\n"); return -EINVAL; /* incorrect version */ + } + + if (dcbx_params.dcbx_enabled != BNX2X_DCBX_ENABLED_OFF && + dcbx_params.dcbx_enabled != BNX2X_DCBX_ENABLED_ON_NEG_OFF && + dcbx_params.dcbx_enabled != BNX2X_DCBX_ENABLED_ON_NEG_ON) { + BNX2X_ERR("Invalid dcbx_state requested: (%d)\n", + dcbx_params.dcbx_enabled); + + return -EINVAL; /* invalid state requested */ + } + + bnx2x_dcbx_set_state(bp, dcbx_params.dcb_state, + dcbx_params.dcbx_enabled); memcpy(&bp->dcbx_config_params, &dcbx_params.config_dcbx_params, sizeof(struct bnx2x_config_dcbx_params)); @@ -1661,52 +2021,63 @@ int bnx2x_dcb_set_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr) bnx2x_nic_unload(bp, UNLOAD_NORMAL); rc = bnx2x_nic_load(bp, LOAD_NORMAL); } - DP(NETIF_MSG_LINK, "set_dcbx_params done (%d)\n", rc); + DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc); return rc; } -int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr){ +int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void __user *uaddr) +{ struct bnx2x_dcbx_params_get *dcbx_params; - int i, rc = 0; + int rc = 0; struct lldp_admin_mib admin_mib; struct lldp_dcbx_stat lldp_dcbx_stat; - u32 *buff, offset, stat_offset; + u32 offset, stat_offset, dcbx_err_state = 0; + + if (!bp->port.pmf) { + DP(BNX2X_MSG_DCB, "Query is supported on pmf only\n"); + return -EINVAL; + } /* E3.0 might be 4...not supported in current shmem */ if (2 != PORT_MAX ) { - BNX2X_ERR("Not supported port configuration"); + DP(BNX2X_MSG_DCB, "Not supported port configuration\n"); return -EINVAL; } dcbx_params = kmalloc(sizeof(struct bnx2x_dcbx_params_get), GFP_KERNEL); if (!dcbx_params) { - BNX2X_ERR("Can't allocate memory\n"); + DP(BNX2X_MSG_DCB, "Can't allocate memory\n"); return -ENOMEM; } if (copy_from_user(dcbx_params, uaddr, - sizeof(struct bnx2x_dcbx_params_get))) + sizeof(struct bnx2x_dcbx_params_get))) { + DP(BNX2X_MSG_DCB, "Copy user ioctl params failed\n"); return -EFAULT; + } - if (dcbx_params->ver_num != DCBX_PARAMS_VER_NUM) + if (dcbx_params->ver_num != DCBX_PARAMS_VER_NUM) { + DP(BNX2X_MSG_DCB, "Wrong ioctl parameters version\n"); return -EINVAL; /* incorrect version */ + } /* chip or MCP does not support dcbx */ - if(CHIP_IS_E1(bp) || !(SHMEM2_HAS(bp, dcbx_lldp_params_offset)) - || !(SHMEM2_HAS(bp, dcbx_lldp_dcbx_stat_offset))) + if(CHIP_IS_E1x(bp) || !SHMEM2_HAS(bp, dcbx_lldp_params_offset) + || !SHMEM2_HAS(bp, dcbx_lldp_dcbx_stat_offset)) { + DP(BNX2X_MSG_DCB, "DCB not supported\n"); return -EINVAL; /* unsupported feature */ + } stat_offset = SHMEM2_RD(bp, dcbx_lldp_dcbx_stat_offset); offset = SHMEM2_RD(bp,dcbx_lldp_params_offset); if (offset == SHMEM_LLDP_DCBX_PARAMS_NONE || stat_offset == SHMEM_LLDP_DCBX_STAT_NONE){ - BNX2X_ERR("DCBX not supported by BC"); + DP(BNX2X_MSG_DCB, "DCBX not supported by BC\n"); return -EINVAL; } - memset(dcbx_params, 0, sizeof(struct bnx2x_dcbx_params_get)); dcbx_params->ver_num = LLDP_PARAMS_VER_NUM; @@ -1714,19 +2085,14 @@ int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr){ dcbx_params->config_dcbx_params.overwrite_settings = bp->dcbx_config_params.overwrite_settings; - dcbx_params->config_dcbx_params.dcb_enable = - bp->dcbx_config_params.dcb_enable; + dcbx_params->dcb_state = bp->dcb_state; + dcbx_params->dcbx_enabled = bp->dcbx_enabled; offset += LLDP_ADMIN_MIB_OFFSET(bp); /* Read the data first */ - buff = (u32 *)&admin_mib; - for(i = 0 ; i < sizeof(struct lldp_admin_mib); i += 4, buff++) - *buff = REG_RD(bp,(offset + i)); - - dcbx_params->config_dcbx_params.admin_dcbx_enable = - GET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED) ? - true : false; + bnx2x_read_data(bp, (u32 *)&admin_mib, offset, + sizeof(struct lldp_admin_mib)); dcbx_params->config_dcbx_params.admin_dcbx_version = (admin_mib.ver_cfg_flags & DCBX_CEE_VERSION_MASK ) @@ -1782,6 +2148,7 @@ int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr){ bnx2x_dcbx_get_priority_app_table(bp, dcbx_params->config_dcbx_params.admin_priority_app_table, + DCBX_CONFIG_MAX_APP_PROTOCOL, admin_mib.features.app.app_pri_tbl); dcbx_params->config_dcbx_params.admin_default_priority = @@ -1790,6 +2157,7 @@ int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr){ /* Get negotiation results MIB data */ offset = SHMEM2_RD(bp, dcbx_neg_res_offset); + if (SHMEM_DCBX_NEG_RES_NONE != offset) { struct lldp_local_mib local_mib; @@ -1823,14 +2191,18 @@ int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr){ bnx2x_dcbx_get_priority_app_table(bp, dcbx_params->local_priority_app_table, + DCBX_MAX_APP_PROTOCOL, local_mib.features.app.app_pri_tbl); dcbx_params->pfc_mismatch = - GET_FLAGS(local_mib.error,DCBX_LOCAL_PFC_MISMATCH) ? + GET_FLAGS(local_mib.error, DCBX_LOCAL_PFC_MISMATCH) ? true : false; dcbx_params->priority_app_mismatch = - GET_FLAGS(local_mib.error,DCBX_LOCAL_APP_MISMATCH) ? + GET_FLAGS(local_mib.error, DCBX_LOCAL_APP_MISMATCH) ? true : false; + + if (GET_FLAGS(local_mib.error, DCBX_REMOTE_MIB_ERROR)) + dcbx_err_state |= 1; } @@ -1880,6 +2252,7 @@ int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr){ bnx2x_dcbx_get_priority_app_table(bp, dcbx_params->remote_priority_app_table, + DCBX_MAX_APP_PROTOCOL, remote_mib.features.app.app_pri_tbl); } @@ -1896,10 +2269,28 @@ int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr){ dcbx_params->pfc_frames_received); bnx2x_release_phy_lock(bp); + if (!(SHMEM2_HAS(bp, drv_flags) && + GET_FLAGS(SHMEM2_RD(bp, drv_flags), + 1 << DRV_FLAGS_DCB_CONFIGURED))) + dcbx_err_state |= 1; + + if (!dcbx_err_state) { + dcbx_params->dcb_current_state |= + BNX2X_DCBX_CURRENT_STATE_IS_SYNC; + if (bp->dcbx_port_params.app.enabled) + dcbx_params->dcb_current_state |= + BNX2X_PRIORITY_TAGGING_IS_CURRENTLY_OPERATIONAL; + if (bp->dcbx_port_params.pfc.enabled) + dcbx_params->dcb_current_state |= + BNX2X_PFC_IS_CURRENTLY_OPERATIONAL; + if (bp->dcbx_port_params.ets.enabled) + dcbx_params->dcb_current_state |= + BNX2X_ETS_IS_CURRENTLY_OPERATIONAL; + } if(copy_to_user(uaddr, dcbx_params, - sizeof(struct bnx2x_dcbx_params_get))){ - BNX2X_ERR("Can't copy to user\n"); + sizeof(struct bnx2x_dcbx_params_get))) { + DP(BNX2X_MSG_DCB, "Copy ioctl params to user failed\n"); rc = -EFAULT; } out: @@ -1907,49 +2298,734 @@ out: return rc; } - -/******************************************************************************* - * Description: Fill pfc_config struct that will be sent in DCBX start ramrod - * - * Return: - ******************************************************************************/ -static void bnx2x_pfc_fw_struct_e2(struct bnx2x *bp) +#endif /* ! BNX2X_UPSTREAM */ +static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, + struct bnx2x_func_tx_start_params *pfc_fw_cfg) { - struct flow_control_configuration *pfc_fw_cfg = 0; u16 pri_bit = 0; u8 cos = 0, pri = 0; struct priority_cos *tt2cos; u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; - pfc_fw_cfg = (struct flow_control_configuration*) - bnx2x_sp(bp, pfc_config); - memset(pfc_fw_cfg, 0, sizeof(struct flow_control_configuration)); + memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg)); + + /* to disable DCB - the structure must be zeroed */ + if (bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) + return; /*shortcut*/ tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos; /* Fw version should be incremented each update */ pfc_fw_cfg->dcb_version = ++bp->dcb_version; - pfc_fw_cfg->dcb_enabled = DCB_ENABLED; - - /* Default initialization */ - for (pri = 0; pri < MAX_PFC_TRAFFIC_TYPES ; pri++) { - tt2cos[pri].priority = LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED; - tt2cos[pri].cos = 0; - } + pfc_fw_cfg->dcb_enabled = 1; /* Fill priority parameters */ - for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++){ + for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) { tt2cos[pri].priority = ttp[pri]; pri_bit = 1 << tt2cos[pri].priority; /* Fill COS parameters based on COS calculated to - * make it more generally for future use */ - for ( cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) + * make it more general for future use */ + for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) if (bp->dcbx_port_params.ets.cos_params[cos]. pri_bitmask & pri_bit) tt2cos[pri].cos = cos; } + + /* we never want the FW to add a 0 vlan tag */ + pfc_fw_cfg->dont_add_pri_0_en = 1; + bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg); } +void bnx2x_dcbx_pmf_update(struct bnx2x *bp) +{ + /* if we need to syncronize DCBX result from prev PMF + * read it from shmem and update bp and netdev accordingly + */ + if (SHMEM2_HAS(bp, drv_flags) && + GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) { + /* Read neg results if dcbx is in the FW */ + if (bnx2x_dcbx_read_shmem_neg_results(bp)) + return; + + bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat, + bp->dcbx_error); + bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat, + bp->dcbx_error); +#ifdef BCM_DCBNL + /* + * Add new app tlvs to dcbnl + */ + bnx2x_dcbnl_update_applist(bp, false); + /* + * Send a notification for the new negotiated parameters + */ + dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0); +#endif + /* + * reconfigure the netdevice with the results of the new + * dcbx negotiation. + */ + bnx2x_dcbx_update_tc_mapping(bp); + + } +} + +/* DCB netlink */ +#ifdef BCM_DCBNL + +#define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \ + DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC) + +static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp) +{ + /* validate dcbnl call that may change HW state: + * DCB is on and DCBX mode was SUCCESSFULLY set by the user. + */ + return bp->dcb_state && bp->dcbx_mode_uset; +} + +static u8 bnx2x_dcbnl_get_state(struct net_device *netdev) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state); + return bp->dcb_state; +} + +static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); + + bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled); + return 0; +} + +static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev, + u8 *perm_addr) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n"); + + /* first the HW mac address */ + memcpy(perm_addr, netdev->dev_addr, netdev->addr_len); + +#ifdef BCM_CNIC + /* second SAN address */ + memcpy(perm_addr+netdev->addr_len, bp->fip_mac, netdev->addr_len); +#endif +} + +static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio, + u8 prio_type, u8 pgid, u8 bw_pct, + u8 up_map) +{ + struct bnx2x *bp = netdev_priv(netdev); + + DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid); + if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) + return; + + /** + * bw_pct ingnored - band-width percentage devision between user + * priorities within the same group is not + * standard and hence not supported + * + * prio_type igonred - priority levels within the same group are not + * standard and hence are not supported. According + * to the standard pgid 15 is dedicated to strict + * prioirty traffic (on the port level). + * + * up_map ignored + */ + + bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid; + bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; +} + +static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev, + int pgid, u8 bw_pct) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct); + + if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) + return; + + bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct; + bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1; +} + +static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio, + u8 prio_type, u8 pgid, u8 bw_pct, + u8 up_map) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); +} + +static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev, + int pgid, u8 bw_pct) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n"); +} + +static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio, + u8 *prio_type, u8 *pgid, u8 *bw_pct, + u8 *up_map) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "prio = %d\n", prio); + + /** + * bw_pct ingnored - band-width percentage devision between user + * priorities within the same group is not + * standard and hence not supported + * + * prio_type igonred - priority levels within the same group are not + * standard and hence are not supported. According + * to the standard pgid 15 is dedicated to strict + * prioirty traffic (on the port level). + * + * up_map ignored + */ + *up_map = *bw_pct = *prio_type = *pgid = 0; + + if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES) + return; + + *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio); +} + +static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev, + int pgid, u8 *bw_pct) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid); + + *bw_pct = 0; + + if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES) + return; + + *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid); +} + +static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio, + u8 *prio_type, u8 *pgid, u8 *bw_pct, + u8 *up_map) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); + + *prio_type = *pgid = *bw_pct = *up_map = 0; +} + +static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev, + int pgid, u8 *bw_pct) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n"); + + *bw_pct = 0; +} + +static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio, + u8 setting) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting); + + if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES) + return; + + bp->dcbx_config_params.admin_pfc_bitmap |= ((setting ? 1 : 0) << prio); + + if (setting) + bp->dcbx_config_params.admin_pfc_tx_enable = 1; +} + +static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio, + u8 *setting) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "prio = %d\n", prio); + + *setting = 0; + + if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES) + return; + + *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1; +} + +static u8 bnx2x_dcbnl_set_all(struct net_device *netdev) +{ + struct bnx2x *bp = netdev_priv(netdev); + int rc = 0; + + DP(BNX2X_MSG_DCB, "SET-ALL\n"); + + if (!bnx2x_dcbnl_set_valid(bp)) + return 1; + + if (bp->recovery_state != BNX2X_RECOVERY_DONE) { + netdev_err(bp->dev, + "Handling parity error recovery. Try again later\n"); + return 1; + } + if (netif_running(bp->dev)) { + bnx2x_nic_unload(bp, UNLOAD_NORMAL); + rc = bnx2x_nic_load(bp, LOAD_NORMAL); + } + DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc); + if (rc) + return 1; + + return 0; +} + +static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap) +{ + struct bnx2x *bp = netdev_priv(netdev); + u8 rval = 0; + + if (bp->dcb_state) { + switch (capid) { + case DCB_CAP_ATTR_PG: + *cap = true; + break; + case DCB_CAP_ATTR_PFC: + *cap = true; + break; + case DCB_CAP_ATTR_UP2TC: + *cap = false; + break; + case DCB_CAP_ATTR_PG_TCS: + *cap = 0x80; /* 8 priorities for PGs */ + break; + case DCB_CAP_ATTR_PFC_TCS: + *cap = 0x80; /* 8 priorities for PFC */ + break; + case DCB_CAP_ATTR_GSP: + *cap = true; + break; + case DCB_CAP_ATTR_BCN: + *cap = false; + break; + case DCB_CAP_ATTR_DCBX: + *cap = BNX2X_DCBX_CAPS; + break; + default: + BNX2X_ERR("Non valid capability ID\n"); + rval = -EINVAL; + break; + } + } else { + DP(BNX2X_MSG_DCB, "DCB disabled\n"); + rval = -EINVAL; + } + + DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap); + return rval; +} + +static u8 bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num) +{ + struct bnx2x *bp = netdev_priv(netdev); + u8 rval = 0; + + DP(BNX2X_MSG_DCB, "tcid %d\n", tcid); + + if (bp->dcb_state) { + switch (tcid) { + case DCB_NUMTCS_ATTR_PG: + *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : + DCBX_COS_MAX_NUM_E2; + break; + case DCB_NUMTCS_ATTR_PFC: + *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 : + DCBX_COS_MAX_NUM_E2; + break; + default: + BNX2X_ERR("Non valid TC-ID\n"); + rval = -EINVAL; + break; + } + } else { + DP(BNX2X_MSG_DCB, "DCB disabled\n"); + rval = -EINVAL; + } + + return rval; +} + +static u8 bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num); + return -EINVAL; +} + +static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled); + + if (!bp->dcb_state) + return 0; + + return bp->dcbx_local_feat.pfc.enabled; +} + +static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off"); + + if (!bnx2x_dcbnl_set_valid(bp)) + return; + + bp->dcbx_config_params.admin_pfc_tx_enable = + bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0); +} + +static void bnx2x_admin_app_set_ent( + struct bnx2x_admin_priority_app_table *app_ent, + u8 idtype, u16 idval, u8 up) +{ + app_ent->valid = 1; + + switch (idtype) { + case DCB_APP_IDTYPE_ETHTYPE: + app_ent->traffic_type = TRAFFIC_TYPE_ETH; + break; + case DCB_APP_IDTYPE_PORTNUM: + app_ent->traffic_type = TRAFFIC_TYPE_PORT; + break; + default: + break; /* never gets here */ + } + app_ent->app_id = idval; + app_ent->priority = up; +} + +static bool bnx2x_admin_app_is_equal( + struct bnx2x_admin_priority_app_table *app_ent, + u8 idtype, u16 idval) +{ + if (!app_ent->valid) + return false; + + switch (idtype) { + case DCB_APP_IDTYPE_ETHTYPE: + if (app_ent->traffic_type != TRAFFIC_TYPE_ETH) + return false; + break; + case DCB_APP_IDTYPE_PORTNUM: + if (app_ent->traffic_type != TRAFFIC_TYPE_PORT) + return false; + break; + default: + return false; + } + if (app_ent->app_id != idval) + return false; + + return true; +} + +static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up) +{ + int i, ff; + + /* iterate over the app entries looking for idtype and idval */ + for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { + struct bnx2x_admin_priority_app_table *app_ent = + &bp->dcbx_config_params.admin_priority_app_table[i]; + if (bnx2x_admin_app_is_equal(app_ent, idtype, idval)) + break; + + if (ff < 0 && !app_ent->valid) + ff = i; + } + if (i < DCBX_CONFIG_MAX_APP_PROTOCOL) + /* if found overwrite up */ + bp->dcbx_config_params. + admin_priority_app_table[i].priority = up; + else if (ff >= 0) + /* not found use first-free */ + bnx2x_admin_app_set_ent( + &bp->dcbx_config_params.admin_priority_app_table[ff], + idtype, idval, up); + else { + /* app table is full */ + BNX2X_ERR("Application table is too large\n"); + return -EBUSY; + } + + /* up configured, if not 0 make sure feature is enabled */ + if (up) + bp->dcbx_config_params.admin_application_priority_tx_enable = 1; + + return 0; +} + +static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype, + u16 idval, u8 up) +{ + struct bnx2x *bp = netdev_priv(netdev); + + DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n", + idtype, idval, up); + + if (!bnx2x_dcbnl_set_valid(bp)) { + DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); + return -EINVAL; + } + + /* verify idtype */ + switch (idtype) { + case DCB_APP_IDTYPE_ETHTYPE: + case DCB_APP_IDTYPE_PORTNUM: + break; + default: + DP(BNX2X_MSG_DCB, "Wrong ID type\n"); + return -EINVAL; + } + return bnx2x_set_admin_app_up(bp, idtype, idval, up); +} + +static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev) +{ + struct bnx2x *bp = netdev_priv(netdev); + u8 state; + + state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE; + + if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF) + state |= DCB_CAP_DCBX_STATIC; + + return state; +} + +static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state) +{ + struct bnx2x *bp = netdev_priv(netdev); + DP(BNX2X_MSG_DCB, "state = %02x\n", state); + + /* set dcbx mode */ + + if ((state & BNX2X_DCBX_CAPS) != state) { + BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n", + state); + return 1; + } + + if (bp->dcb_state != BNX2X_DCB_STATE_ON) { + BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n"); + return 1; + } + + if (state & DCB_CAP_DCBX_STATIC) + bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF; + else + bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON; + + bp->dcbx_mode_uset = true; + return 0; +} + +static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, + u8 *flags) +{ + struct bnx2x *bp = netdev_priv(netdev); + u8 rval = 0; + + DP(BNX2X_MSG_DCB, "featid %d\n", featid); + + if (bp->dcb_state) { + *flags = 0; + switch (featid) { + case DCB_FEATCFG_ATTR_PG: + if (bp->dcbx_local_feat.ets.enabled) + *flags |= DCB_FEATCFG_ENABLE; + if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR) + *flags |= DCB_FEATCFG_ERROR; + break; + case DCB_FEATCFG_ATTR_PFC: + if (bp->dcbx_local_feat.pfc.enabled) + *flags |= DCB_FEATCFG_ENABLE; + if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR | + DCBX_LOCAL_PFC_MISMATCH)) + *flags |= DCB_FEATCFG_ERROR; + break; + case DCB_FEATCFG_ATTR_APP: + if (bp->dcbx_local_feat.app.enabled) + *flags |= DCB_FEATCFG_ENABLE; + if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR | + DCBX_LOCAL_APP_MISMATCH)) + *flags |= DCB_FEATCFG_ERROR; + break; + default: + BNX2X_ERR("Non valid featrue-ID\n"); + rval = -EINVAL; + break; + } + } else { + DP(BNX2X_MSG_DCB, "DCB disabled\n"); + rval = -EINVAL; + } + + return rval; +} + +static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, + u8 flags) +{ + struct bnx2x *bp = netdev_priv(netdev); + u8 rval = 0; + + DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags); + + /* ignore the 'advertise' flag */ + if (bnx2x_dcbnl_set_valid(bp)) { + switch (featid) { + case DCB_FEATCFG_ATTR_PG: + bp->dcbx_config_params.admin_ets_enable = + flags & DCB_FEATCFG_ENABLE ? 1 : 0; + bp->dcbx_config_params.admin_ets_willing = + flags & DCB_FEATCFG_WILLING ? 1 : 0; + break; + case DCB_FEATCFG_ATTR_PFC: + bp->dcbx_config_params.admin_pfc_enable = + flags & DCB_FEATCFG_ENABLE ? 1 : 0; + bp->dcbx_config_params.admin_pfc_willing = + flags & DCB_FEATCFG_WILLING ? 1 : 0; + break; + case DCB_FEATCFG_ATTR_APP: + /* ignore enable, always enabled */ + bp->dcbx_config_params.admin_app_priority_willing = + flags & DCB_FEATCFG_WILLING ? 1 : 0; + break; + default: + BNX2X_ERR("Non valid featrue-ID\n"); + rval = -EINVAL; + break; + } + } else { + DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); + rval = -EINVAL; + } + + return rval; +} + +#ifdef DCB_CEE_SUPPORT /* BNX2X_UPSTREAM */ +static int bnx2x_peer_appinfo(struct net_device *netdev, + struct dcb_peer_app_info *info, u16* app_count) +{ + int i; + struct bnx2x *bp = netdev_priv(netdev); + + DP(BNX2X_MSG_DCB, "APP-INFO\n"); + + info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0; + info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0; + *app_count = 0; + + for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) + if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield & + DCBX_APP_ENTRY_VALID) + (*app_count)++; + return 0; +} + +static int bnx2x_peer_apptable(struct net_device *netdev, + struct dcb_app *table) +{ + int i, j; + struct bnx2x *bp = netdev_priv(netdev); + + DP(BNX2X_MSG_DCB, "APP-TABLE\n"); + + for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) { + struct dcbx_app_priority_entry *ent = + &bp->dcbx_remote_feat.app.app_pri_tbl[i]; + + if (ent->appBitfield & DCBX_APP_ENTRY_VALID) { + table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent); + table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent); + table[j++].protocol = ent->app_id; + } + } + return 0; +} + +static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg) +{ + int i; + struct bnx2x *bp = netdev_priv(netdev); + + pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0; + + for (i = 0; i < CEE_DCBX_MAX_PGS; i++) { + pg->pg_bw[i] = + DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i); + pg->prio_pg[i] = + DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i); + } + return 0; +} + +static int bnx2x_cee_peer_getpfc(struct net_device *netdev, + struct cee_pfc *pfc) +{ + struct bnx2x *bp = netdev_priv(netdev); + pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps; + pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap; + return 0; +} +#endif + +#if (LINUX_VERSION_CODE >= 0x020621) /* BNX2X_UPSTREAM */ +const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = { +#else +struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = { +#endif + .getstate = bnx2x_dcbnl_get_state, + .setstate = bnx2x_dcbnl_set_state, + .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr, + .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx, + .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx, + .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx, + .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx, + .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx, + .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx, + .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx, + .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx, + .setpfccfg = bnx2x_dcbnl_set_pfc_cfg, + .getpfccfg = bnx2x_dcbnl_get_pfc_cfg, + .setall = bnx2x_dcbnl_set_all, + .getcap = bnx2x_dcbnl_get_cap, + .getnumtcs = bnx2x_dcbnl_get_numtcs, + .setnumtcs = bnx2x_dcbnl_set_numtcs, + .getpfcstate = bnx2x_dcbnl_get_pfc_state, + .setpfcstate = bnx2x_dcbnl_set_pfc_state, + .setapp = bnx2x_dcbnl_set_app_up, + .getdcbx = bnx2x_dcbnl_get_dcbx, + .setdcbx = bnx2x_dcbnl_set_dcbx, + .getfeatcfg = bnx2x_dcbnl_get_featcfg, + .setfeatcfg = bnx2x_dcbnl_set_featcfg, +#ifdef DCB_CEE_SUPPORT /* BNX2X_UPSTREAM */ + .peer_getappinfo = bnx2x_peer_appinfo, + .peer_getapptable = bnx2x_peer_apptable, + .cee_peer_getpg = bnx2x_cee_peer_getpg, + .cee_peer_getpfc = bnx2x_cee_peer_getpfc, +#endif +}; + +#endif /* BCM_DCBNL */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.h index 37d43e6..3db0910 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dcb.h @@ -1,6 +1,6 @@ /* bnx2x_dcb.h: Broadcom Everest network driver. * - * Copyright 2009-2011 Broadcom Corporation + * Copyright 2009-2013 Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you @@ -19,11 +19,10 @@ #ifndef BNX2X_DCB_H #define BNX2X_DCB_H -/* Un-comment this to dump dcbx parameters when received from FW */ -/* #define BNX2X_DUMP_DCBX 1 */ - #include "bnx2x_hsi.h" +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ #include "bnx2x_compat.h" +#endif #define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */ struct bnx2x_dcbx_app_params { @@ -31,22 +30,30 @@ struct bnx2x_dcbx_app_params { u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX]; }; -#define E2_NUM_OF_COS 2 -#define BNX2X_DCBX_COS_NOT_STRICT 0 -#define BNX2X_DCBX_COS_LOW_STRICT 1 -#define BNX2X_DCBX_COS_HIGH_STRICT 2 +#define DCBX_COS_MAX_NUM_E2 DCBX_E2E3_MAX_NUM_COS +/* bnx2x currently limits numbers of supported COSes to 3 to be extended to 6 */ +#define BNX2X_MAX_COS_SUPPORT 3 +#define DCBX_COS_MAX_NUM_E3B0 BNX2X_MAX_COS_SUPPORT +#define DCBX_COS_MAX_NUM BNX2X_MAX_COS_SUPPORT struct bnx2x_dcbx_cos_params { u32 bw_tbl; u32 pri_bitmask; + /* + * strict priority: valid values are 0..5; 0 is highest priority. + * There can't be two COSes with the same priority. + */ u8 strict; +#define BNX2X_DCBX_STRICT_INVALID DCBX_COS_MAX_NUM +#define BNX2X_DCBX_STRICT_COS_HIGHEST 0 +#define BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(sp) ((sp) + 1) u8 pauseable; }; struct bnx2x_dcbx_pg_params { u32 enabled; u8 num_of_cos; /* valid COS entries */ - struct bnx2x_dcbx_cos_params cos_params[E2_NUM_OF_COS]; + struct bnx2x_dcbx_cos_params cos_params[DCBX_COS_MAX_NUM]; }; struct bnx2x_dcbx_pfc_params { @@ -55,20 +62,18 @@ struct bnx2x_dcbx_pfc_params { }; struct bnx2x_dcbx_port_params { - u32 dcbx_enabled; struct bnx2x_dcbx_pfc_params pfc; struct bnx2x_dcbx_pg_params ets; struct bnx2x_dcbx_app_params app; }; -#define BNX2X_DCBX_CONFIG_INV_VALUE (0xFFFFFFFF) +#define BNX2X_DCBX_CONFIG_INV_VALUE (0xFFFFFFFF) #define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE 0 #define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE 1 -#define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID (BNX2X_DCBX_CONFIG_INV_VALUE) +#define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID (BNX2X_DCBX_CONFIG_INV_VALUE) +#define BNX2X_IS_ETS_ENABLED(bp) ((bp)->dcb_state == BNX2X_DCB_STATE_ON &&\ + (bp)->dcbx_port_params.ets.enabled) -/******************************************************************************* - * LLDP protocol configuration parameters. - ******************************************************************************/ struct bnx2x_config_lldp_params { u32 overwrite_settings; u32 msg_tx_hold; @@ -77,11 +82,7 @@ struct bnx2x_config_lldp_params { u32 msg_tx_interval; u32 tx_fast; }; - - -/******************************************************************************* - * LLDP structure for IOCTL get params - ******************************************************************************/ +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ struct bnx2x_lldp_params_get{ u32 ver_num; #define LLDP_PARAMS_VER_NUM 2 @@ -98,8 +99,9 @@ struct bnx2x_lldp_params_get{ u32 local_chassis_id[LOCAL_CHASSIS_ID_STAT_LEN]; u32 local_port_id[LOCAL_PORT_ID_STAT_LEN]; }; +#endif /* ! BNX2X_UPSTREAM */ -struct bnx2x_admin_priority_app_table{ +struct bnx2x_admin_priority_app_table { u32 valid; u32 priority; #define INVALID_TRAFFIC_TYPE_PRIORITY (0xFFFFFFFF) @@ -109,12 +111,8 @@ struct bnx2x_admin_priority_app_table{ u32 app_id; }; -/******************************************************************************* - * DCBX protocol configuration parameters. - ******************************************************************************/ +#define DCBX_CONFIG_MAX_APP_PROTOCOL 4 struct bnx2x_config_dcbx_params { - u32 dcb_enable; - u32 admin_dcbx_enable; u32 overwrite_settings; u32 admin_dcbx_version; u32 admin_ets_enable; @@ -133,19 +131,27 @@ struct bnx2x_config_dcbx_params { u32 admin_recommendation_bw_precentage[8]; u32 admin_recommendation_ets_pg[8]; u32 admin_pfc_bitmap; - struct bnx2x_admin_priority_app_table admin_priority_app_table[4]; + struct bnx2x_admin_priority_app_table + admin_priority_app_table[DCBX_CONFIG_MAX_APP_PROTOCOL]; u32 admin_default_priority; }; -/******************************************************************************* - * DCBX structure for IOCTL get params - ******************************************************************************/ -#define DCBX_PARAMS_VER_NUM 2 +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#define DCBX_PARAMS_VER_NUM 3 struct bnx2x_dcbx_params_get { u32 ver_num; + u32 dcb_state; + u32 dcbx_enabled; struct bnx2x_config_dcbx_params config_dcbx_params; /* The reserved field should follow in case the struct above will increase*/ - u32 _reserved[20]; + u32 _reserved[19]; + + u32 dcb_current_state; +#define BNX2X_DCBX_CURRENT_STATE_IS_SYNC (1 << 0) +#define BNX2X_PFC_IS_CURRENTLY_OPERATIONAL (1 << 1) +#define BNX2X_ETS_IS_CURRENTLY_OPERATIONAL (1 << 2) +#define BNX2X_PRIORITY_TAGGING_IS_CURRENTLY_OPERATIONAL (1 << 3) + u32 local_tc_supported; u32 local_pfc_caps; u32 remote_tc_supported; @@ -159,13 +165,15 @@ struct bnx2x_dcbx_params_get { u32 remote_recommendation_bw_precentage[8]; u32 remote_recommendation_ets_pg[8]; u32 remote_pfc_bitmap; - struct bnx2x_admin_priority_app_table remote_priority_app_table[16]; + struct bnx2x_admin_priority_app_table + remote_priority_app_table[DCBX_MAX_APP_PROTOCOL]; u32 local_ets_enable; u32 local_pfc_enable; u32 local_configuration_bw_precentage[8]; u32 local_configuration_ets_pg[8]; u32 local_pfc_bitmap; - struct bnx2x_admin_priority_app_table local_priority_app_table[16]; + struct bnx2x_admin_priority_app_table + local_priority_app_table[DCBX_MAX_APP_PROTOCOL]; u32 pfc_mismatch; u32 priority_app_mismatch; u32 dcbx_frames_sent; @@ -174,21 +182,22 @@ struct bnx2x_dcbx_params_get { u32 pfc_frames_received[2]; }; -/******************************************************************************* - * DCBX structure for B10_IOC_SET_DCBX_PARAMS. - ******************************************************************************/ struct bnx2x_dcbx_params_set { u32 ver_num; + u32 dcb_state; + u32 dcbx_enabled; struct bnx2x_config_dcbx_params config_dcbx_params; }; -#define GET_FLAGS(flags,bits) ((flags) & (bits)) -#define SET_FLAGS(flags, bits) ((flags) |= (bits)) -#define RESET_FLAGS(flags, bits) ((flags) &= ~(bits)) -typedef enum { +#endif /* ! BNX2X_UPSTREAM */ +#define GET_FLAGS(flags, bits) ((flags) & (bits)) +#define SET_FLAGS(flags, bits) ((flags) |= (bits)) +#define RESET_FLAGS(flags, bits) ((flags) &= ~(bits)) + +enum { DCBX_READ_LOCAL_MIB, DCBX_READ_REMOTE_MIB -}bnx2x_dcbx_read_mib_type; +}; #define ETH_TYPE_FCOE (0x8906) #define TCP_PORT_ISCSI (0xCBC) @@ -202,17 +211,15 @@ typedef enum { -struct cos_entry_help_data -{ +struct cos_entry_help_data { u32 pri_join_mask; u32 cos_bw; u8 strict; bool pausable; }; -struct cos_help_data -{ - struct cos_entry_help_data data[E2_NUM_OF_COS]; +struct cos_help_data { + struct cos_entry_help_data data[DCBX_COS_MAX_NUM]; u8 num_of_cos; }; @@ -228,6 +235,8 @@ struct cos_help_data ((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp))) #define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri) \ (DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri)) +#define DCBX_IS_PFC_PRI_SOME_PAUSE(bp, pg_pri) \ + (0 != DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri)) #define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri) \ (pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri))) #define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\ @@ -237,39 +246,44 @@ struct cos_help_data IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri)))) -struct pg_entry_help_data -{ +struct pg_entry_help_data { u8 num_of_dif_pri; u8 pg; u32 pg_priority; }; -struct pg_help_data -{ +struct pg_help_data { struct pg_entry_help_data data[LLFC_DRIVER_TRAFFIC_TYPE_MAX]; u8 num_of_pg; }; /* forward DCB/PFC related declarations */ struct bnx2x; -void bnx2x_dcb_init_intmem_pfc(struct bnx2x *bp); -#if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (defined(VMWARE_ESX_DDK_VERSION) && (VMWARE_ESX_DDK_VERSION >= 40000)) /* BNX2X_UPSTREAM */ -void bnx2x_dcbx_timeout(struct work_struct *work); void bnx2x_dcbx_update(struct work_struct *work); -#else -void bnx2x_dcbx_timeout(void *data); -void bnx2x_dcbx_update(void *data); -#endif void bnx2x_dcbx_init_params(struct bnx2x *bp); -int bnx2x_dcb_get_lldp_params_ioctl(struct bnx2x *bp, void *uaddr); -int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr); -int bnx2x_dcb_set_dcbx_params_ioctl(struct bnx2x *bp, void *uaddr); +void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled); +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +int bnx2x_dcb_get_lldp_params_ioctl(struct bnx2x *bp, void __user *uaddr); +int bnx2x_dcb_get_dcbx_params_ioctl(struct bnx2x *bp, void __user *uaddr); +int bnx2x_dcb_set_dcbx_params_ioctl(struct bnx2x *bp, void __user *uaddr); +#endif enum { BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1, - BNX2X_DCBX_STATE_TX_PAUSED = 0x2, - BNX2X_DCBX_STATE_TX_RELEASED = 0x4 + BNX2X_DCBX_STATE_TX_PAUSED, + BNX2X_DCBX_STATE_TX_RELEASED }; + void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state); +void bnx2x_dcbx_pmf_update(struct bnx2x *bp); +/* DCB netlink */ +#ifdef BCM_DCBNL +#if (LINUX_VERSION_CODE >= 0x020621) /* BNX2X_UPSTREAM */ +extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops; +#else +extern struct dcbnl_rtnl_ops bnx2x_dcbnl_ops; +#endif +int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall); +#endif /* BCM_DCBNL */ #endif /* BNX2X_DCB_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dump.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dump.h index 2fa703d..f957e84 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dump.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_dump.h @@ -1,6 +1,6 @@ /* bnx2x_dump.h: Broadcom Everest network driver. * - * Copyright (c) 2010-2011 Broadcom Corporation + * Copyright (c) 2011-2013 Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you @@ -11,8 +11,6 @@ * software in any way with any other Broadcom software provided under a * license other than the GPL, without Broadcom's express prior written * consent. - * - * Written by: Yitchak Gertner */ @@ -26,35 +24,120 @@ -#define TSTORM_WAITP_ADDR 0x1b8a80 -#define CSTORM_WAITP_ADDR 0x238a80 -#define XSTORM_WAITP_ADDR 0x2b8a80 -#define USTORM_WAITP_ADDR 0x338a80 -#define TSTORM_CAM_MODE 0x1B1440 +/*definitions */ +#define XSTORM_WAITP_ADDR 0x2b8a80 +#define TSTORM_WAITP_ADDR 0x1b8a80 +#define USTORM_WAITP_ADDR 0x338a80 +#define CSTORM_WAITP_ADDR 0x238a80 +#define TSTORM_CAM_MODE 0x1B1440 +#define MAX_TIMER_PENDING 200 +#define TIMER_SCAN_DONT_CARE 0xFF #define RI_E1 0x1 #define RI_E1H 0x2 #define RI_E2 0x4 -#define RI_ONLINE 0x100 -#define RI_PATH0_DUMP 0x200 -#define RI_PATH1_DUMP 0x400 -#define RI_E1_OFFLINE (RI_E1) -#define RI_E1_ONLINE (RI_E1 | RI_ONLINE) -#define RI_E1H_OFFLINE (RI_E1H) -#define RI_E1H_ONLINE (RI_E1H | RI_ONLINE) -#define RI_E2_OFFLINE (RI_E2) -#define RI_E2_ONLINE (RI_E2 | RI_ONLINE) -#define RI_E1E1H_OFFLINE (RI_E1 | RI_E1H) -#define RI_E1E1H_ONLINE (RI_E1 | RI_E1H | RI_ONLINE) -#define RI_E1HE2_OFFLINE (RI_E2 | RI_E1H) -#define RI_E1HE2_ONLINE (RI_E2 | RI_E1H | RI_ONLINE) -#define RI_E1E2_OFFLINE (RI_E2 | RI_E1) -#define RI_E1E2_ONLINE (RI_E2 | RI_E1 | RI_ONLINE) -#define RI_ALL_OFFLINE (RI_E1 | RI_E1H | RI_E2) -#define RI_ALL_ONLINE (RI_E1 | RI_E1H | RI_E2 | RI_ONLINE) +#define RI_E3 0x8 +#define RI_E3B0 0x10 +#define RI_ONLINE 0x100 +#define RI_OFFLINE 0x0 +#define RI_PATH0_DUMP 0x200 +#define RI_PATH1_DUMP 0x400 -#define MAX_TIMER_PENDING 200 -#define TIMER_SCAN_DONT_CARE 0xFF +#define MAX_VFC_WRITE_SIZE 2 + +#define RI_SRC_XSTORM 0 +#define RI_SRC_TSTORM 1 +#define RI_SRC_USTORM 2 +#define RI_SRC_CSTORM 3 +#define RI_OTHER_BLOCK 4 + +#define RI_TYPE_IGU 0 +#define RI_TYPE_VFC 1 +#define RI_TYPE_SPLIT 2 + +#define RI_VFC_IS_READY 1 +#define RI_VFC_IS_BUSY 2 +#define RI_VFC_IS_ONGOING_SEND 4 +#define RI_E1_ONLINE (RI_E1 | RI_ONLINE) +#define RI_E1H_ONLINE (RI_E1H | RI_ONLINE) +#define RI_E1E1H_ONLINE (RI_E1 | RI_E1H | RI_ONLINE) +#define RI_E2_ONLINE (RI_E2 | RI_ONLINE) +#define RI_E1E2_ONLINE (RI_E1 | RI_E2 | RI_ONLINE) +#define RI_E1HE2_ONLINE (RI_E1H | RI_E2 | RI_ONLINE) +#define RI_E1E1HE2_ONLINE (RI_E1 | RI_E1H | RI_E2 | RI_ONLINE) +#define RI_E3_ONLINE (RI_E3 | RI_ONLINE) +#define RI_E1E3_ONLINE (RI_E1 | RI_E3 | RI_ONLINE) +#define RI_E1HE3_ONLINE (RI_E1H | RI_E3 | RI_ONLINE) +#define RI_E1E1HE3_ONLINE (RI_E1 | RI_E1H | RI_E3 | RI_ONLINE) +#define RI_E2E3_ONLINE (RI_E2 | RI_E3 | RI_ONLINE) +#define RI_E1E2E3_ONLINE (RI_E1 | RI_E2 | RI_E3 | RI_ONLINE) +#define RI_E1HE2E3_ONLINE (RI_E1H | RI_E2 | RI_E3 | RI_ONLINE) +#define RI_E1E1HE2E3_ONLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3 | RI_ONLINE) +#define RI_E3B0_ONLINE (RI_E3B0 | RI_ONLINE) +#define RI_E1E3B0_ONLINE (RI_E1 | RI_E3B0 | RI_ONLINE) +#define RI_E1HE3B0_ONLINE (RI_E1H | RI_E3B0 | RI_ONLINE) +#define RI_E1E1HE3B0_ONLINE (RI_E1 | RI_E1H | RI_E3B0 | RI_ONLINE) +#define RI_E2E3B0_ONLINE (RI_E2 | RI_E3B0 | RI_ONLINE) +#define RI_E1E2E3B0_ONLINE (RI_E1 | RI_E2 | RI_E3B0 | RI_ONLINE) +#define RI_E1HE2E3B0_ONLINE (RI_E1H | RI_E2 | RI_E3B0 | RI_ONLINE) +#define RI_E1E1HE2E3B0_ONLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3B0 | RI_ONLINE) +#define RI_E3E3B0_ONLINE (RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1E3E3B0_ONLINE (RI_E1 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1HE3E3B0_ONLINE (RI_E1H | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1E1HE3E3B0_ONLINE \ + (RI_E1 | RI_E1H | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E2E3E3B0_ONLINE (RI_E2 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1E2E3E3B0_ONLINE \ + (RI_E1 | RI_E2 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1HE2E3E3B0_ONLINE \ + (RI_E1H | RI_E2 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1E1HE2E3E3B0_ONLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1_OFFLINE (RI_E1 | RI_OFFLINE) +#define RI_E1H_OFFLINE (RI_E1H | RI_OFFLINE) +#define RI_E1E1H_OFFLINE (RI_E1 | RI_E1H | RI_OFFLINE) +#define RI_E2_OFFLINE (RI_E2 | RI_OFFLINE) +#define RI_E1E2_OFFLINE (RI_E1 | RI_E2 | RI_OFFLINE) +#define RI_E1HE2_OFFLINE (RI_E1H | RI_E2 | RI_OFFLINE) +#define RI_E1E1HE2_OFFLINE (RI_E1 | RI_E1H | RI_E2 | RI_OFFLINE) +#define RI_E3_OFFLINE (RI_E3 | RI_OFFLINE) +#define RI_E1E3_OFFLINE (RI_E1 | RI_E3 | RI_OFFLINE) +#define RI_E1HE3_OFFLINE (RI_E1H | RI_E3 | RI_OFFLINE) +#define RI_E1E1HE3_OFFLINE (RI_E1 | RI_E1H | RI_E3 | RI_OFFLINE) +#define RI_E2E3_OFFLINE (RI_E2 | RI_E3 | RI_OFFLINE) +#define RI_E1E2E3_OFFLINE (RI_E1 | RI_E2 | RI_E3 | RI_OFFLINE) +#define RI_E1HE2E3_OFFLINE (RI_E1H | RI_E2 | RI_E3 | RI_OFFLINE) +#define RI_E1E1HE2E3_OFFLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3 | RI_OFFLINE) +#define RI_E3B0_OFFLINE (RI_E3B0 | RI_OFFLINE) +#define RI_E1E3B0_OFFLINE (RI_E1 | RI_E3B0 | RI_OFFLINE) +#define RI_E1HE3B0_OFFLINE (RI_E1H | RI_E3B0 | RI_OFFLINE) +#define RI_E1E1HE3B0_OFFLINE (RI_E1 | RI_E1H | RI_E3B0 | RI_OFFLINE) +#define RI_E2E3B0_OFFLINE (RI_E2 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E2E3B0_OFFLINE (RI_E1 | RI_E2 | RI_E3B0 | RI_OFFLINE) +#define RI_E1HE2E3B0_OFFLINE (RI_E1H | RI_E2 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E1HE2E3B0_OFFLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3B0 | RI_OFFLINE) +#define RI_E3E3B0_OFFLINE (RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E3E3B0_OFFLINE (RI_E1 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1HE3E3B0_OFFLINE (RI_E1H | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E1HE3E3B0_OFFLINE \ + (RI_E1 | RI_E1H | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E2E3E3B0_OFFLINE (RI_E2 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E2E3E3B0_OFFLINE \ + (RI_E1 | RI_E2 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1HE2E3E3B0_OFFLINE \ + (RI_E1H | RI_E2 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E1HE2E3E3B0_OFFLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_ALL_ONLINE RI_E1E1HE2E3E3B0_ONLINE +#define RI_ALL_OFFLINE RI_E1E1HE2E3E3B0_OFFLINE + +#define DBG_DMP_TRACE_BUFFER_SIZE 0x800 +#define DBG_DMP_TRACE_BUFFER_OFFSET(shmem0_offset) \ + ((shmem0_offset) - DBG_DMP_TRACE_BUFFER_SIZE) struct dump_sign { u32 time_stamp; @@ -65,13 +148,54 @@ struct dump_sign { struct dump_hdr { u32 hdr_size; /* in dwords, excluding this field */ struct dump_sign dump_sign; - u32 xstorm_waitp; - u32 tstorm_waitp; - u32 ustorm_waitp; - u32 cstorm_waitp; - u16 info; - u8 idle_chk; - u8 reserved; + u32 xstorm_waitp; + u32 tstorm_waitp; + u32 ustorm_waitp; + u32 cstorm_waitp; + u16 info; + u8 idle_chk; + u8 reserved; +}; + +#define HDR_SIGNATURE 0x11ff22ee + +struct extension_hdr { + u32 hdr_signature; + u32 hdr_size; /* in dwords, excluding this field */ + u32 data_size; /* in dwords */ + u32 additional_data; + u32 data_source; /* storm number or none if from a block. */ + u32 data_type; + u32 reserved; + u32 error; +}; + +struct igu_data { + u32 valid; /* is valid for the current chip */ + u32 max_size; /* max read iterations */ + u32 is_last_commands; /* put value in the additional_data field */ + u32 is_data_valid; /* non-zero for valid */ + u32 data[]; +}; + +struct vfc_general { + u32 valid; /* is valid for the current chip */ + u32 vfc_status; + u32 vfc_address; + u32 vfc_data_write; + u32 vfc_data_read; +}; + +struct vfc_read_write_vector { +u32 read_size; +u32 address_value; +u32 write_value_num_valid; +u32 write_value[MAX_VFC_WRITE_SIZE]; +}; + +struct vfc_read_task { + const struct vfc_read_write_vector *read_write_vectors; +u32 array_size; }; struct reg_addr { @@ -88,879 +212,1010 @@ struct wreg_addr { u16 info; }; -#define REGS_COUNT 1288 -static const struct reg_addr reg_addrs[REGS_COUNT] = { - { 0x2000, 65, RI_ALL_OFFLINE }, { 0x2104, 1, RI_ALL_ONLINE }, - { 0x2108, 2, RI_ALL_OFFLINE }, { 0x2110, 2, RI_ALL_ONLINE }, - { 0x2118, 1, RI_ALL_OFFLINE }, { 0x211c, 8, RI_ALL_ONLINE }, - { 0x213c, 262, RI_ALL_OFFLINE }, { 0x2800, 5, RI_ALL_OFFLINE }, - { 0x2814, 1, RI_ALL_ONLINE }, { 0x2818, 1, RI_ALL_OFFLINE }, - { 0x281c, 2, RI_ALL_ONLINE }, { 0x2824, 12, RI_ALL_OFFLINE }, - { 0x2854, 1, RI_ALL_ONLINE }, { 0x2858, 1, RI_ALL_OFFLINE }, - { 0x285c, 1, RI_ALL_ONLINE }, { 0x2860, 79, RI_ALL_OFFLINE }, - { 0x3000, 287, RI_ALL_OFFLINE }, { 0x3800, 331, RI_ALL_OFFLINE }, - { 0x8800, 6, RI_E1E2_OFFLINE }, { 0x8818, 1, RI_E2_OFFLINE }, - { 0x9000, 4, RI_E2_OFFLINE }, { 0x9010, 7, RI_E2_ONLINE }, - { 0x902c, 1, RI_E2_OFFLINE }, { 0x9030, 1, RI_E2_ONLINE }, - { 0x9034, 13, RI_E2_OFFLINE }, { 0x9068, 6, RI_E2_ONLINE }, - { 0x9080, 2, RI_E2_OFFLINE }, { 0x9088, 8, RI_E2_ONLINE }, - { 0x90a8, 98, RI_E2_OFFLINE }, { 0x9230, 2, RI_E2_ONLINE }, - { 0x9238, 3, RI_E2_OFFLINE }, { 0x9244, 1, RI_E2_ONLINE }, - { 0x9248, 18, RI_E2_OFFLINE }, { 0x9298, 1, RI_E2_ONLINE }, - { 0x92a4, 1, RI_E2_OFFLINE }, { 0x92b4, 1, RI_E2_OFFLINE }, - { 0x9400, 33, RI_E2_OFFLINE }, { 0xa000, 27, RI_ALL_OFFLINE }, - { 0xa06c, 1, RI_E1E1H_OFFLINE }, { 0xa070, 71, RI_ALL_OFFLINE }, - { 0xa18c, 4, RI_E1E1H_OFFLINE }, { 0xa19c, 62, RI_ALL_OFFLINE }, - { 0xa294, 2, RI_E1E1H_OFFLINE }, { 0xa29c, 6, RI_ALL_OFFLINE }, - { 0xa2b4, 1, RI_ALL_ONLINE }, { 0xa2b8, 50, RI_ALL_OFFLINE }, - { 0xa388, 1, RI_ALL_OFFLINE }, { 0xa398, 1, RI_ALL_OFFLINE }, - { 0xa39c, 7, RI_E1HE2_OFFLINE }, { 0xa3c0, 1, RI_E1HE2_OFFLINE }, - { 0xa3c4, 1, RI_E1HE2_ONLINE }, { 0xa3c8, 1, RI_E1HE2_OFFLINE }, - { 0xa3d0, 1, RI_E1HE2_OFFLINE }, { 0xa3d8, 1, RI_E1HE2_OFFLINE }, - { 0xa3e0, 1, RI_E1HE2_OFFLINE }, { 0xa3e8, 1, RI_E1HE2_OFFLINE }, - { 0xa3f0, 1, RI_E1HE2_OFFLINE }, { 0xa3f8, 1, RI_E1HE2_OFFLINE }, - { 0xa400, 2, RI_ALL_OFFLINE }, { 0xa408, 2, RI_ALL_ONLINE }, - { 0xa410, 7, RI_ALL_OFFLINE }, { 0xa42c, 12, RI_ALL_ONLINE }, - { 0xa45c, 1, RI_ALL_OFFLINE }, { 0xa460, 1, RI_ALL_ONLINE }, - { 0xa464, 18, RI_ALL_OFFLINE }, { 0xa4ac, 2, RI_E1E1H_OFFLINE }, - { 0xa4b4, 1, RI_ALL_OFFLINE }, { 0xa4b8, 2, RI_E1E1H_OFFLINE }, - { 0xa4c0, 3, RI_ALL_OFFLINE }, { 0xa4cc, 5, RI_E1E1H_OFFLINE }, - { 0xa4e0, 9, RI_ALL_OFFLINE }, { 0xa504, 1, RI_E1E1H_OFFLINE }, - { 0xa508, 3, RI_ALL_OFFLINE }, { 0xa518, 1, RI_ALL_OFFLINE }, - { 0xa520, 1, RI_ALL_OFFLINE }, { 0xa528, 1, RI_ALL_OFFLINE }, - { 0xa530, 1, RI_ALL_OFFLINE }, { 0xa538, 1, RI_ALL_OFFLINE }, - { 0xa540, 1, RI_ALL_OFFLINE }, { 0xa548, 1, RI_E1E1H_OFFLINE }, - { 0xa550, 1, RI_E1E1H_OFFLINE }, { 0xa558, 1, RI_E1E1H_OFFLINE }, - { 0xa560, 1, RI_E1E1H_OFFLINE }, { 0xa568, 1, RI_E1E1H_OFFLINE }, - { 0xa570, 1, RI_ALL_OFFLINE }, { 0xa580, 1, RI_ALL_ONLINE }, - { 0xa590, 1, RI_ALL_ONLINE }, { 0xa5a0, 1, RI_ALL_OFFLINE }, - { 0xa5c0, 1, RI_ALL_OFFLINE }, { 0xa5e0, 1, RI_E1HE2_OFFLINE }, - { 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RI_E2_OFFLINE }, { 0x180398, 1, RI_E2_OFFLINE }, - { 0x1803a0, 5, RI_E2_OFFLINE }, { 0x180400, 1, RI_ALL_OFFLINE }, - { 0x180404, 255, RI_E1E1H_OFFLINE }, { 0x181000, 1024, RI_ALL_OFFLINE }, - { 0x1a0000, 5632, RI_ALL_OFFLINE }, { 0x1a5800, 10753, RI_E1HE2_OFFLINE }, - { 0x1b0004, 15, RI_E1H_OFFLINE }, { 0x1b0040, 1, RI_E1HE2_OFFLINE }, - { 0x1b0044, 239, RI_E1H_OFFLINE }, { 0x1b0400, 1, RI_E1HE2_OFFLINE }, - { 0x1b0404, 255, RI_E1H_OFFLINE }, { 0x1b0800, 1, RI_E2_OFFLINE }, - { 0x1b0840, 1, RI_E2_OFFLINE }, { 0x1b0c00, 1, RI_ALL_OFFLINE }, - { 0x1b1000, 1, RI_ALL_OFFLINE }, { 0x1b1040, 1, RI_E1HE2_OFFLINE }, - { 0x1b1400, 1, RI_E2_OFFLINE }, { 0x1b1440, 1, RI_E2_OFFLINE }, - { 0x1b1480, 1, RI_E2_OFFLINE }, { 0x1b14c0, 1, RI_E2_OFFLINE }, - { 0x1b1800, 128, RI_ALL_OFFLINE }, { 0x1b1c00, 128, RI_ALL_OFFLINE }, - { 0x1b2000, 1, RI_ALL_OFFLINE }, { 0x1b2400, 5632, RI_E2_OFFLINE }, - { 0x1b8000, 1, RI_ALL_ONLINE }, { 0x1b8040, 1, RI_ALL_ONLINE }, - { 0x1b8080, 1, RI_ALL_ONLINE }, { 0x1b80c0, 1, RI_ALL_ONLINE }, - { 0x1b8100, 1, RI_E2_OFFLINE }, { 0x1b8140, 1, RI_E2_OFFLINE }, - { 0x1b8180, 1, RI_E2_OFFLINE }, { 0x1b81c0, 1, RI_E2_OFFLINE }, - { 0x1b8200, 1, RI_ALL_ONLINE }, { 0x1b8240, 1, RI_ALL_ONLINE }, - { 0x1b8280, 1, RI_ALL_ONLINE }, { 0x1b82c0, 1, RI_ALL_ONLINE }, - { 0x1b8300, 1, RI_E2_OFFLINE }, { 0x1b8340, 1, RI_E2_OFFLINE }, - { 0x1b8380, 1, RI_E2_OFFLINE }, { 0x1b83c0, 1, RI_E2_OFFLINE }, - { 0x1b8400, 1, RI_E2_OFFLINE }, { 0x1b8440, 1, RI_E2_OFFLINE }, - { 0x1b8480, 1, RI_E2_OFFLINE }, { 0x1b84c0, 1, RI_E2_OFFLINE }, - { 0x1b8500, 1, RI_E2_OFFLINE }, { 0x1b8540, 1, RI_E2_OFFLINE }, - { 0x1b8580, 1, RI_E2_OFFLINE }, { 0x1b85c0, 19, RI_E2_OFFLINE }, - { 0x1b8800, 1, RI_E2_OFFLINE }, { 0x1b8840, 1, RI_E2_OFFLINE }, - { 0x1b8880, 1, RI_E2_OFFLINE }, { 0x1b88c0, 1, RI_E2_OFFLINE }, - { 0x1b8900, 1, RI_E2_OFFLINE }, { 0x1b8940, 1, RI_E2_OFFLINE }, - { 0x1b8980, 1, RI_E2_OFFLINE }, { 0x1b89c0, 1, RI_E2_OFFLINE }, - { 0x1b8a00, 1, RI_ALL_ONLINE }, { 0x1b8a40, 1, RI_E2_OFFLINE }, - { 0x1b8a80, 1, RI_ALL_ONLINE }, { 0x1b8ac0, 1, RI_E2_OFFLINE }, - { 0x1b8b00, 1, RI_E2_OFFLINE }, { 0x1b8b40, 1, RI_E2_OFFLINE }, - { 0x1b8b80, 1, RI_E2_OFFLINE }, { 0x1b8bc0, 1, RI_E2_OFFLINE }, - { 0x1b8c00, 1, RI_E2_OFFLINE }, { 0x1b8c40, 1, RI_E2_OFFLINE }, - { 0x1b8c80, 1, RI_E2_OFFLINE }, { 0x1b8cc0, 2, RI_E2_OFFLINE }, - { 0x1b8d00, 1, RI_E2_OFFLINE }, { 0x1b8d40, 1, RI_E2_OFFLINE }, - { 0x1b8d80, 1, RI_E2_OFFLINE }, { 0x1b8dc0, 1, RI_E2_OFFLINE }, - { 0x1b8e00, 1, RI_E2_OFFLINE }, { 0x1b8e40, 1, RI_E2_OFFLINE }, - { 0x1b8e80, 2, RI_E2_OFFLINE }, { 0x1b8ec0, 1, RI_E2_OFFLINE }, - { 0x1b8f00, 1, RI_E2_OFFLINE }, { 0x1b8f40, 1, RI_E2_OFFLINE }, - { 0x1b8f80, 1, RI_E2_OFFLINE }, { 0x1b8fc0, 3, RI_E2_OFFLINE }, - { 0x1b8fd0, 6, RI_E2_OFFLINE }, { 0x1b9000, 1, RI_E2_OFFLINE }, - { 0x1b9040, 3, RI_E2_OFFLINE }, { 0x1b9400, 34, RI_E2_OFFLINE }, - { 0x1b9490, 10, RI_E2_OFFLINE }, { 0x1b94e0, 1, RI_E2_OFFLINE }, - { 0x1b94f0, 1, RI_E2_OFFLINE }, { 0x1b94fc, 1, RI_E2_OFFLINE }, - { 0x1bffe0, 1, RI_E2_OFFLINE }, { 0x1bfff0, 1, RI_E2_OFFLINE }, - { 0x1bfffc, 1, RI_E2_OFFLINE }, { 0x1c0000, 2, RI_ALL_OFFLINE }, - { 0x200000, 65, RI_ALL_OFFLINE }, { 0x200104, 1, RI_ALL_ONLINE }, - { 0x200110, 1, RI_ALL_OFFLINE }, { 0x200114, 1, RI_ALL_ONLINE }, - { 0x200120, 1, RI_ALL_OFFLINE }, { 0x200130, 1, RI_ALL_OFFLINE }, - { 0x200140, 1, RI_ALL_OFFLINE }, { 0x20014c, 2, RI_E1HE2_OFFLINE }, - { 0x200200, 27, RI_ALL_OFFLINE }, { 0x20026c, 1, RI_ALL_ONLINE }, - { 0x200270, 12, RI_ALL_OFFLINE }, { 0x2002a0, 1, RI_ALL_ONLINE }, - { 0x2002a4, 13, RI_ALL_OFFLINE }, { 0x2002d8, 1, RI_ALL_ONLINE }, - { 0x2002dc, 1, RI_ALL_OFFLINE }, { 0x2002e0, 2, RI_ALL_ONLINE }, - { 0x200340, 4, RI_ALL_OFFLINE }, { 0x200380, 1, RI_E2_OFFLINE }, - { 0x200388, 1, RI_E2_OFFLINE }, { 0x200390, 1, RI_E2_OFFLINE }, - { 0x200398, 1, RI_E2_OFFLINE }, { 0x2003a0, 1, RI_E2_OFFLINE }, - { 0x2003a8, 2, RI_E2_OFFLINE }, { 0x200400, 1, RI_ALL_OFFLINE }, - { 0x200404, 255, RI_E1E1H_OFFLINE }, { 0x202000, 2048, RI_ALL_OFFLINE }, - { 0x220000, 5632, RI_ALL_OFFLINE }, { 0x225800, 10753, RI_E1HE2_OFFLINE }, - { 0x230004, 15, RI_E1H_OFFLINE }, { 0x230040, 1, RI_E1HE2_OFFLINE }, - { 0x230044, 239, RI_E1H_OFFLINE }, { 0x230400, 1, RI_E1HE2_OFFLINE }, - { 0x230404, 255, RI_E1H_OFFLINE }, { 0x230800, 1, RI_E2_OFFLINE }, - { 0x230840, 1, RI_E2_OFFLINE }, { 0x230c00, 1, RI_E2_OFFLINE }, - { 0x231000, 1, RI_E2_OFFLINE }, { 0x231040, 1, RI_E2_OFFLINE }, - { 0x231400, 1, RI_E2_OFFLINE }, { 0x231440, 1, RI_E2_OFFLINE }, - { 0x231480, 1, RI_E2_OFFLINE }, { 0x2314c0, 1, RI_E2_OFFLINE }, - { 0x231800, 128, RI_ALL_OFFLINE }, { 0x231c00, 128, RI_ALL_OFFLINE }, - { 0x232000, 1, RI_ALL_OFFLINE }, { 0x232400, 5632, RI_E2_OFFLINE }, - { 0x238000, 1, RI_ALL_ONLINE }, { 0x238040, 1, RI_ALL_ONLINE }, - { 0x238080, 1, RI_ALL_ONLINE }, { 0x2380c0, 1, RI_ALL_ONLINE }, - { 0x238100, 1, RI_E2_OFFLINE }, { 0x238140, 1, RI_E2_OFFLINE }, - { 0x238180, 1, RI_E2_OFFLINE }, { 0x2381c0, 1, RI_E2_OFFLINE }, - { 0x238200, 1, RI_ALL_ONLINE }, { 0x238240, 1, RI_ALL_ONLINE }, - { 0x238280, 1, RI_ALL_ONLINE }, { 0x2382c0, 1, RI_ALL_ONLINE }, - { 0x238300, 1, RI_E2_OFFLINE }, { 0x238340, 1, RI_E2_OFFLINE }, - { 0x238380, 1, RI_E2_OFFLINE }, { 0x2383c0, 1, RI_E2_OFFLINE }, - { 0x238400, 1, RI_E2_OFFLINE }, { 0x238440, 1, RI_E2_OFFLINE }, - { 0x238480, 1, RI_E2_OFFLINE }, { 0x2384c0, 1, RI_E2_OFFLINE }, - { 0x238500, 1, RI_E2_OFFLINE }, { 0x238540, 1, RI_E2_OFFLINE }, - { 0x238580, 1, RI_E2_OFFLINE }, { 0x2385c0, 19, RI_E2_OFFLINE }, - { 0x238800, 1, RI_E2_OFFLINE }, { 0x238840, 1, RI_E2_OFFLINE }, - { 0x238880, 1, RI_E2_OFFLINE }, { 0x2388c0, 1, RI_E2_OFFLINE }, - { 0x238900, 1, RI_E2_OFFLINE }, { 0x238940, 1, RI_E2_OFFLINE }, - { 0x238980, 1, RI_E2_OFFLINE }, { 0x2389c0, 1, RI_E2_OFFLINE }, - { 0x238a00, 1, RI_ALL_ONLINE }, { 0x238a40, 1, RI_E2_OFFLINE }, - { 0x238a80, 1, RI_ALL_ONLINE }, { 0x238ac0, 1, RI_E2_OFFLINE }, - { 0x238b00, 1, RI_E2_OFFLINE }, { 0x238b40, 1, RI_E2_OFFLINE }, - { 0x238b80, 1, RI_E2_OFFLINE }, { 0x238bc0, 1, RI_E2_OFFLINE }, - { 0x238c00, 1, RI_E2_OFFLINE }, { 0x238c40, 1, RI_E2_OFFLINE }, - { 0x238c80, 1, RI_E2_OFFLINE }, { 0x238cc0, 2, RI_E2_OFFLINE }, - { 0x238d00, 1, RI_E2_OFFLINE }, { 0x238d40, 1, RI_E2_OFFLINE }, - { 0x238d80, 1, RI_E2_OFFLINE }, { 0x238dc0, 1, RI_E2_OFFLINE }, - { 0x238e00, 1, RI_E2_OFFLINE }, { 0x238e40, 1, RI_E2_OFFLINE }, - { 0x238e80, 2, RI_E2_OFFLINE }, { 0x238ec0, 1, RI_E2_OFFLINE }, - { 0x238f00, 1, RI_E2_OFFLINE }, { 0x238f40, 1, RI_E2_OFFLINE }, - { 0x238f80, 1, RI_E2_OFFLINE }, { 0x238fc0, 3, RI_E2_OFFLINE }, - { 0x238fd0, 6, RI_E2_OFFLINE }, { 0x239000, 1, RI_E2_OFFLINE }, - { 0x239040, 3, RI_E2_OFFLINE }, { 0x23ffe0, 1, RI_E2_OFFLINE }, - { 0x23fff0, 1, RI_E2_OFFLINE }, { 0x23fffc, 1, RI_E2_OFFLINE }, - { 0x240000, 2, RI_ALL_OFFLINE }, { 0x280000, 65, RI_ALL_OFFLINE }, - { 0x280104, 1, RI_ALL_ONLINE }, { 0x280110, 1, RI_ALL_OFFLINE }, - { 0x280114, 1, RI_ALL_ONLINE }, { 0x280120, 1, RI_ALL_OFFLINE }, - { 0x280130, 1, RI_ALL_OFFLINE }, { 0x280140, 1, RI_ALL_OFFLINE }, - { 0x28014c, 2, RI_E1HE2_OFFLINE }, { 0x280200, 27, RI_ALL_OFFLINE }, - { 0x28026c, 1, RI_ALL_ONLINE }, { 0x280270, 12, RI_ALL_OFFLINE }, - { 0x2802a0, 1, RI_ALL_ONLINE }, { 0x2802a4, 13, RI_ALL_OFFLINE }, - { 0x2802d8, 1, RI_ALL_ONLINE }, { 0x2802dc, 1, RI_ALL_OFFLINE }, - { 0x2802e0, 2, RI_ALL_ONLINE }, { 0x280340, 4, RI_ALL_OFFLINE }, - { 0x280380, 1, RI_E2_OFFLINE }, { 0x280388, 1, RI_E2_OFFLINE }, - { 0x280390, 1, RI_E2_OFFLINE }, { 0x280398, 1, RI_E2_OFFLINE }, - { 0x2803a0, 1, RI_E2_OFFLINE }, { 0x2803a8, 2, RI_E2_OFFLINE }, - { 0x280400, 1, RI_ALL_OFFLINE }, { 0x280404, 255, RI_E1E1H_OFFLINE }, - { 0x282000, 2048, RI_ALL_OFFLINE }, { 0x2a0000, 5632, RI_ALL_OFFLINE }, - { 0x2a5800, 10753, RI_E1HE2_OFFLINE }, { 0x2b0004, 15, RI_E1H_OFFLINE }, - { 0x2b0040, 1, RI_E1HE2_OFFLINE }, { 0x2b0044, 239, RI_E1H_OFFLINE }, - { 0x2b0400, 1, RI_E1HE2_OFFLINE }, { 0x2b0404, 255, RI_E1H_OFFLINE }, - { 0x2b0800, 1, RI_E2_OFFLINE }, { 0x2b0840, 1, RI_E2_OFFLINE }, - { 0x2b0c00, 1, RI_E2_OFFLINE }, { 0x2b1000, 1, RI_E2_OFFLINE }, - { 0x2b1040, 1, RI_E2_OFFLINE }, { 0x2b1400, 1, RI_E2_OFFLINE }, - { 0x2b1440, 1, RI_E2_OFFLINE }, { 0x2b1480, 1, RI_E2_OFFLINE }, - { 0x2b14c0, 1, RI_E2_OFFLINE }, { 0x2b1800, 128, RI_ALL_OFFLINE }, - { 0x2b1c00, 128, RI_ALL_OFFLINE }, { 0x2b2000, 1, RI_ALL_OFFLINE }, - { 0x2b2400, 5632, RI_E2_OFFLINE }, { 0x2b8000, 1, RI_ALL_ONLINE }, - { 0x2b8040, 1, RI_ALL_ONLINE }, { 0x2b8080, 1, RI_ALL_ONLINE }, - { 0x2b80c0, 1, RI_E2_OFFLINE }, { 0x2b8100, 1, RI_E2_OFFLINE }, - { 0x2b8140, 1, RI_E2_OFFLINE }, { 0x2b8180, 1, RI_E2_OFFLINE }, - { 0x2b81c0, 1, RI_E2_OFFLINE }, { 0x2b8200, 1, RI_ALL_ONLINE }, - { 0x2b8240, 1, RI_ALL_ONLINE }, { 0x2b8280, 1, RI_ALL_ONLINE }, - { 0x2b82c0, 1, RI_ALL_ONLINE }, { 0x2b8300, 1, RI_E2_OFFLINE }, - { 0x2b8340, 1, RI_E2_OFFLINE }, { 0x2b8380, 1, RI_E2_OFFLINE }, - { 0x2b83c0, 1, RI_E2_OFFLINE }, { 0x2b8400, 1, RI_E2_OFFLINE }, - { 0x2b8440, 1, RI_E2_OFFLINE }, { 0x2b8480, 1, RI_E2_OFFLINE }, - { 0x2b84c0, 1, RI_E2_OFFLINE }, { 0x2b8500, 1, RI_E2_OFFLINE }, - { 0x2b8540, 1, RI_E2_OFFLINE }, { 0x2b8580, 1, RI_E2_OFFLINE }, - { 0x2b85c0, 19, RI_E2_OFFLINE }, { 0x2b8800, 1, RI_E2_OFFLINE }, - { 0x2b8840, 1, RI_E2_OFFLINE }, { 0x2b8880, 1, RI_E2_OFFLINE }, - { 0x2b88c0, 1, RI_E2_OFFLINE }, { 0x2b8900, 1, RI_E2_OFFLINE }, - { 0x2b8940, 1, RI_E2_OFFLINE }, { 0x2b8980, 1, RI_E2_OFFLINE }, - { 0x2b89c0, 1, RI_E2_OFFLINE }, { 0x2b8a00, 1, RI_ALL_ONLINE }, - { 0x2b8a40, 1, RI_E2_OFFLINE }, { 0x2b8a80, 1, RI_ALL_ONLINE }, - { 0x2b8ac0, 1, RI_E2_OFFLINE }, { 0x2b8b00, 1, RI_E2_OFFLINE }, - { 0x2b8b40, 1, RI_E2_OFFLINE }, { 0x2b8b80, 1, RI_E2_OFFLINE }, - { 0x2b8bc0, 1, RI_E2_OFFLINE }, { 0x2b8c00, 1, RI_E2_OFFLINE }, - { 0x2b8c40, 1, RI_E2_OFFLINE }, { 0x2b8c80, 1, RI_E2_OFFLINE }, - { 0x2b8cc0, 2, RI_E2_OFFLINE }, { 0x2b8d00, 1, RI_E2_OFFLINE }, - { 0x2b8d40, 1, RI_E2_OFFLINE }, { 0x2b8d80, 1, RI_E2_OFFLINE }, - { 0x2b8dc0, 1, RI_E2_OFFLINE }, { 0x2b8e00, 1, RI_E2_OFFLINE }, - { 0x2b8e40, 1, RI_E2_OFFLINE }, { 0x2b8e80, 2, RI_E2_OFFLINE }, - { 0x2b8ec0, 1, RI_E2_OFFLINE }, { 0x2b8f00, 1, RI_E2_OFFLINE }, - { 0x2b8f40, 1, RI_E2_OFFLINE }, { 0x2b8f80, 1, RI_E2_OFFLINE }, - { 0x2b8fc0, 3, RI_E2_OFFLINE }, { 0x2b8fd0, 6, RI_E2_OFFLINE }, - { 0x2b9000, 1, RI_E2_OFFLINE }, { 0x2b9040, 3, RI_E2_OFFLINE }, - { 0x2b9400, 34, RI_E2_OFFLINE }, { 0x2b9490, 10, RI_E2_OFFLINE }, - { 0x2b94e0, 1, RI_E2_OFFLINE }, { 0x2b94f0, 1, RI_E2_OFFLINE }, - { 0x2b94fc, 1, RI_E2_OFFLINE }, { 0x2bffe0, 1, RI_E2_OFFLINE }, - { 0x2bfff0, 1, RI_E2_OFFLINE }, { 0x2bfffc, 1, RI_E2_OFFLINE }, - { 0x2c0000, 2, RI_ALL_ONLINE }, { 0x300000, 65, RI_ALL_OFFLINE }, - { 0x300104, 1, RI_ALL_ONLINE }, { 0x300110, 1, RI_ALL_OFFLINE }, - { 0x300114, 1, RI_ALL_ONLINE }, { 0x300120, 1, RI_ALL_OFFLINE }, - { 0x300130, 1, RI_ALL_OFFLINE }, { 0x300140, 1, RI_ALL_OFFLINE }, - { 0x30014c, 2, RI_E1HE2_OFFLINE }, { 0x300200, 27, RI_ALL_OFFLINE }, - { 0x30026c, 1, RI_ALL_ONLINE }, { 0x300270, 12, RI_ALL_OFFLINE }, - { 0x3002a0, 1, RI_ALL_ONLINE }, { 0x3002a4, 13, RI_ALL_OFFLINE }, - { 0x3002d8, 1, RI_ALL_ONLINE }, { 0x3002dc, 1, RI_ALL_OFFLINE }, - { 0x3002e0, 2, RI_ALL_ONLINE }, { 0x300340, 4, RI_ALL_OFFLINE }, - { 0x300380, 1, RI_E2_OFFLINE }, { 0x300388, 1, RI_E2_OFFLINE }, - { 0x300390, 1, RI_E2_OFFLINE }, { 0x300398, 1, RI_E2_OFFLINE }, - { 0x3003a0, 1, RI_E2_OFFLINE }, { 0x3003a8, 2, RI_E2_OFFLINE }, - { 0x300400, 1, RI_ALL_OFFLINE }, { 0x300404, 255, RI_E1E1H_OFFLINE }, - { 0x302000, 2048, RI_ALL_OFFLINE }, { 0x320000, 5632, RI_ALL_OFFLINE }, - { 0x325800, 10753, RI_E1HE2_OFFLINE }, { 0x330004, 15, RI_E1H_OFFLINE }, - { 0x330040, 1, RI_E1HE2_OFFLINE }, { 0x330044, 239, RI_E1H_OFFLINE }, - { 0x330400, 1, RI_E1HE2_OFFLINE }, { 0x330404, 255, RI_E1H_OFFLINE }, - { 0x330800, 1, RI_E2_OFFLINE }, { 0x330840, 1, RI_E2_OFFLINE }, - { 0x330c00, 1, RI_E2_OFFLINE }, { 0x331000, 1, RI_E2_OFFLINE }, - { 0x331040, 1, RI_E2_OFFLINE }, { 0x331400, 1, RI_E2_OFFLINE }, - { 0x331440, 1, RI_E2_OFFLINE }, { 0x331480, 1, RI_E2_OFFLINE }, - { 0x3314c0, 1, RI_E2_OFFLINE }, { 0x331800, 128, RI_ALL_OFFLINE }, - { 0x331c00, 128, RI_ALL_OFFLINE }, { 0x332000, 1, RI_ALL_OFFLINE }, - { 0x332400, 5632, RI_E2_OFFLINE }, { 0x338000, 1, RI_ALL_ONLINE }, - { 0x338040, 1, RI_ALL_ONLINE }, { 0x338080, 1, RI_ALL_ONLINE }, - { 0x3380c0, 1, RI_ALL_ONLINE }, { 0x338100, 1, RI_E2_OFFLINE }, - { 0x338140, 1, RI_E2_OFFLINE }, { 0x338180, 1, RI_E2_OFFLINE }, - { 0x3381c0, 1, RI_E2_OFFLINE }, { 0x338200, 1, RI_ALL_ONLINE }, - { 0x338240, 1, RI_ALL_ONLINE }, { 0x338280, 1, RI_ALL_ONLINE }, - { 0x3382c0, 1, RI_ALL_ONLINE }, { 0x338300, 1, RI_E2_OFFLINE }, - { 0x338340, 1, RI_E2_OFFLINE }, { 0x338380, 1, RI_E2_OFFLINE }, - { 0x3383c0, 1, RI_E2_OFFLINE }, { 0x338400, 1, RI_E2_OFFLINE }, - { 0x338440, 1, RI_E2_OFFLINE }, { 0x338480, 1, RI_E2_OFFLINE }, - { 0x3384c0, 1, RI_E2_OFFLINE }, { 0x338500, 1, RI_E2_OFFLINE }, - { 0x338540, 1, RI_E2_OFFLINE }, { 0x338580, 1, RI_E2_OFFLINE }, - { 0x3385c0, 19, RI_E2_OFFLINE }, { 0x338800, 1, RI_E2_OFFLINE }, - { 0x338840, 1, RI_E2_OFFLINE }, { 0x338880, 1, RI_E2_OFFLINE }, - { 0x3388c0, 1, RI_E2_OFFLINE }, { 0x338900, 1, RI_E2_OFFLINE }, - { 0x338940, 1, RI_E2_OFFLINE }, { 0x338980, 1, RI_E2_OFFLINE }, - { 0x3389c0, 1, RI_E2_OFFLINE }, { 0x338a00, 1, RI_ALL_ONLINE }, - { 0x338a40, 1, RI_E2_OFFLINE }, { 0x338a80, 1, RI_ALL_ONLINE }, - { 0x338ac0, 1, RI_E2_OFFLINE }, { 0x338b00, 1, RI_E2_OFFLINE }, - { 0x338b40, 1, RI_E2_OFFLINE }, { 0x338b80, 1, RI_E2_OFFLINE }, - { 0x338bc0, 1, RI_E2_OFFLINE }, { 0x338c00, 1, RI_E2_OFFLINE }, - { 0x338c40, 1, RI_E2_OFFLINE }, { 0x338c80, 1, RI_E2_OFFLINE }, - { 0x338cc0, 2, RI_E2_OFFLINE }, { 0x338d00, 1, RI_E2_OFFLINE }, - { 0x338d40, 1, RI_E2_OFFLINE }, { 0x338d80, 1, RI_E2_OFFLINE }, - { 0x338dc0, 1, RI_E2_OFFLINE }, { 0x338e00, 1, RI_E2_OFFLINE }, - { 0x338e40, 1, RI_E2_OFFLINE }, { 0x338e80, 2, RI_E2_OFFLINE }, - { 0x338ec0, 1, RI_E2_OFFLINE }, { 0x338f00, 1, RI_E2_OFFLINE }, - { 0x338f40, 1, RI_E2_OFFLINE }, { 0x338f80, 1, RI_E2_OFFLINE }, - { 0x338fc0, 3, RI_E2_OFFLINE }, { 0x338fd0, 6, RI_E2_OFFLINE }, - { 0x339000, 1, RI_E2_OFFLINE }, { 0x339040, 3, RI_E2_OFFLINE }, - { 0x33ffe0, 1, RI_E2_OFFLINE }, { 0x33fff0, 1, RI_E2_OFFLINE }, - { 0x33fffc, 1, RI_E2_OFFLINE }, { 0x340000, 2, RI_ALL_OFFLINE }, - { 0x3a0000, 32768, RI_E2_ONLINE }, { 0x3c0000, 8192, RI_E2_ONLINE } +static const struct reg_addr reg_addrs[] = { + { 0x2000, 341, RI_ALL_ONLINE }, + { 0x2800, 103, RI_ALL_ONLINE }, + { 0x3000, 287, RI_ALL_ONLINE }, + { 0x3800, 331, RI_ALL_ONLINE }, + { 0x8800, 6, RI_ALL_ONLINE }, + { 0x8818, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x9000, 147, RI_E2E3E3B0_ONLINE }, + { 0x924c, 1, RI_E2_ONLINE }, + { 0x9250, 16, RI_E2E3E3B0_ONLINE }, + { 0x9400, 33, RI_E2E3E3B0_ONLINE }, + { 0x9484, 5, RI_E3E3B0_ONLINE }, + { 0xa000, 27, RI_ALL_ONLINE }, + { 0xa06c, 1, RI_E1E1H_ONLINE }, + { 0xa070, 71, RI_ALL_ONLINE }, + { 0xa18c, 4, RI_E1E1H_ONLINE }, + { 0xa19c, 62, RI_ALL_ONLINE }, + { 0xa294, 2, RI_E1E1H_ONLINE }, + { 0xa29c, 2, RI_ALL_ONLINE }, + { 0xa2a4, 2, RI_E1E1HE2_ONLINE }, + { 0xa2ac, 52, RI_ALL_ONLINE }, + { 0xa39c, 7, RI_E1HE2E3E3B0_ONLINE }, + { 0xa3b8, 2, RI_E3E3B0_ONLINE }, + { 0xa3c0, 3, RI_E1HE2E3E3B0_ONLINE }, + { 0xa3d0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa3d8, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa3e0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa3e8, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa3f0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa3f8, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa400, 40, RI_ALL_ONLINE }, + { 0xa4a0, 1, RI_E1E1HE2_ONLINE }, + { 0xa4a4, 2, RI_ALL_ONLINE }, + { 0xa4ac, 2, RI_E1E1H_ONLINE }, + { 0xa4b4, 1, RI_E1E1HE2_ONLINE }, + { 0xa4b8, 2, RI_E1E1H_ONLINE }, + { 0xa4c0, 3, RI_ALL_ONLINE }, + { 0xa4cc, 5, RI_E1E1H_ONLINE }, + { 0xa4e0, 3, RI_ALL_ONLINE }, + { 0xa4fc, 2, RI_ALL_ONLINE }, + { 0xa504, 1, RI_E1E1H_ONLINE }, + { 0xa508, 3, RI_ALL_ONLINE }, + { 0xa518, 1, RI_ALL_ONLINE }, + { 0xa520, 1, RI_ALL_ONLINE }, + { 0xa528, 1, RI_ALL_ONLINE }, + { 0xa530, 1, RI_ALL_ONLINE }, + { 0xa538, 1, RI_ALL_ONLINE }, + { 0xa540, 1, RI_ALL_ONLINE }, + { 0xa548, 1, RI_E1E1H_ONLINE }, + { 0xa550, 1, RI_E1E1H_ONLINE }, + { 0xa558, 1, RI_E1E1H_ONLINE }, + { 0xa560, 1, RI_E1E1H_ONLINE }, + { 0xa568, 1, RI_E1E1H_ONLINE }, + { 0xa570, 1, RI_ALL_ONLINE }, + { 0xa580, 1, RI_ALL_ONLINE }, + { 0xa590, 1, RI_ALL_ONLINE }, + { 0xa5a0, 1, RI_E1E1HE2_ONLINE }, + { 0xa5c0, 1, RI_ALL_ONLINE }, + { 0xa5e0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa5e8, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa5f0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0xa5f8, 1, RI_E1HE2_ONLINE }, + { 0xa5fc, 9, RI_E1HE2E3E3B0_ONLINE }, + { 0xa620, 6, RI_E2E3E3B0_ONLINE }, + { 0xa638, 20, RI_E2_ONLINE }, + { 0xa688, 42, RI_E2E3E3B0_ONLINE }, + { 0xa730, 1, RI_E2_ONLINE }, + { 0xa734, 2, RI_E2E3E3B0_ONLINE }, + { 0xa73c, 4, RI_E2_ONLINE }, + { 0xa74c, 5, RI_E2E3E3B0_ONLINE }, + { 0xa760, 5, RI_E2_ONLINE }, + { 0xa774, 7, RI_E2E3E3B0_ONLINE }, + { 0xa790, 15, RI_E2_ONLINE }, + { 0xa7cc, 4, RI_E2E3E3B0_ONLINE }, + { 0xa7e0, 6, RI_E3E3B0_ONLINE }, + { 0xa800, 18, RI_E2_ONLINE }, + { 0xa848, 33, RI_E2E3E3B0_ONLINE }, + { 0xa8cc, 2, RI_E3E3B0_ONLINE }, + { 0xa8d4, 4, RI_E2E3E3B0_ONLINE }, + { 0xa8e4, 1, RI_E3E3B0_ONLINE }, + { 0xa8e8, 1, RI_E2E3E3B0_ONLINE }, + { 0xa8f0, 1, RI_E2E3E3B0_ONLINE }, + { 0xa8f8, 30, RI_E3E3B0_ONLINE }, + { 0xa974, 73, RI_E3E3B0_ONLINE }, + { 0xac30, 1, RI_E3E3B0_ONLINE }, + { 0xac40, 1, RI_E3E3B0_ONLINE }, + { 0xac50, 1, RI_E3E3B0_ONLINE }, + { 0xac60, 1, RI_E3B0_ONLINE }, + { 0x10000, 9, RI_ALL_ONLINE }, + { 0x10024, 1, RI_E1E1HE2_ONLINE }, + { 0x10028, 5, RI_ALL_ONLINE }, + { 0x1003c, 6, RI_E1E1HE2_ONLINE }, + { 0x10054, 20, RI_ALL_ONLINE }, + { 0x100a4, 4, RI_E1E1HE2_ONLINE }, + { 0x100b4, 11, RI_ALL_ONLINE }, + { 0x100e0, 4, RI_E1E1HE2_ONLINE }, + { 0x100f0, 8, RI_ALL_ONLINE }, + { 0x10110, 6, RI_E1E1HE2_ONLINE }, + { 0x10128, 110, RI_ALL_ONLINE }, + { 0x102e0, 4, RI_E1E1HE2_ONLINE }, + { 0x102f0, 18, RI_ALL_ONLINE }, + { 0x10338, 20, RI_E1E1HE2_ONLINE }, + { 0x10388, 10, RI_ALL_ONLINE }, + { 0x10400, 6, RI_E1E1HE2_ONLINE }, + { 0x10418, 6, RI_ALL_ONLINE }, + { 0x10430, 10, RI_E1E1HE2_ONLINE }, + { 0x10458, 22, RI_ALL_ONLINE }, + { 0x104b0, 12, RI_E1E1HE2_ONLINE }, + { 0x104e0, 1, RI_ALL_ONLINE }, + { 0x104e8, 2, RI_ALL_ONLINE }, + { 0x104f4, 2, RI_ALL_ONLINE }, + { 0x10500, 146, RI_ALL_ONLINE }, + { 0x10750, 2, RI_E1E1HE2_ONLINE }, + { 0x10760, 2, RI_E1E1HE2_ONLINE }, + { 0x10770, 2, RI_E1E1HE2_ONLINE }, + { 0x10780, 2, RI_E1E1HE2_ONLINE }, + { 0x10790, 2, RI_ALL_ONLINE }, + { 0x107a0, 2, RI_E1E1HE2_ONLINE }, + { 0x107b0, 2, RI_E1E1HE2_ONLINE }, + { 0x107c0, 2, RI_E1E1HE2_ONLINE }, + { 0x107d0, 2, RI_E1E1HE2_ONLINE }, + { 0x107e0, 2, RI_ALL_ONLINE }, + { 0x10880, 2, RI_ALL_ONLINE }, + { 0x10900, 2, RI_ALL_ONLINE }, + { 0x16000, 1, RI_E1HE2_ONLINE }, + { 0x16004, 25, RI_E1HE2E3E3B0_ONLINE }, + { 0x16070, 8, RI_E1HE2E3E3B0_ONLINE }, + { 0x16090, 4, RI_E1HE2E3_ONLINE }, + { 0x160a0, 6, RI_E1HE2E3E3B0_ONLINE }, + { 0x160c0, 7, RI_E1HE2E3E3B0_ONLINE }, + { 0x160dc, 2, RI_E1HE2_ONLINE }, + { 0x160e4, 10, RI_E1HE2E3E3B0_ONLINE }, + { 0x1610c, 2, RI_E1HE2_ONLINE }, + { 0x16114, 6, RI_E1HE2E3E3B0_ONLINE }, + { 0x16140, 48, RI_E1HE2E3E3B0_ONLINE }, + { 0x16204, 5, RI_E1HE2E3E3B0_ONLINE }, + { 0x18000, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x18008, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x18010, 35, RI_E2E3E3B0_ONLINE }, + { 0x180a4, 2, RI_E2E3E3B0_ONLINE }, + { 0x180c0, 9, RI_E2E3E3B0_ONLINE }, + { 0x180e4, 1, RI_E2E3_ONLINE }, + { 0x180e8, 2, RI_E2E3E3B0_ONLINE }, + { 0x180f0, 1, RI_E2E3_ONLINE }, + { 0x180f4, 79, RI_E2E3E3B0_ONLINE }, + { 0x18230, 1, RI_E2E3_ONLINE }, + { 0x18234, 2, RI_E2E3E3B0_ONLINE }, + { 0x1823c, 1, RI_E2E3_ONLINE }, + { 0x18240, 13, RI_E2E3E3B0_ONLINE }, + { 0x18274, 1, RI_E2_ONLINE }, + { 0x18278, 81, RI_E2E3E3B0_ONLINE }, + { 0x18440, 63, RI_E2E3E3B0_ONLINE }, + { 0x18570, 42, RI_E3E3B0_ONLINE }, + { 0x18618, 25, RI_E3B0_ONLINE }, + { 0x18680, 44, RI_E3B0_ONLINE }, + { 0x18748, 12, RI_E3B0_ONLINE }, + { 0x18788, 1, RI_E3B0_ONLINE }, + { 0x1879c, 6, RI_E3B0_ONLINE }, + { 0x187c4, 51, RI_E3B0_ONLINE }, + { 0x18a00, 48, RI_E3B0_ONLINE }, + { 0x20000, 24, RI_ALL_ONLINE }, + { 0x20060, 8, RI_ALL_ONLINE }, + { 0x20080, 94, RI_ALL_ONLINE }, + { 0x201f8, 1, RI_E1E1H_ONLINE }, + { 0x201fc, 1, RI_ALL_ONLINE }, + { 0x20200, 1, RI_E1E1H_ONLINE }, + { 0x20204, 1, RI_ALL_ONLINE }, + { 0x20208, 1, RI_E1E1H_ONLINE }, + { 0x2020c, 39, RI_ALL_ONLINE }, + { 0x202c8, 1, RI_E2E3E3B0_ONLINE }, + { 0x202d8, 4, RI_E2E3E3B0_ONLINE }, + { 0x202f0, 1, RI_E3B0_ONLINE }, + { 0x20400, 2, RI_ALL_ONLINE }, + { 0x2040c, 8, RI_ALL_ONLINE }, + { 0x2042c, 18, RI_E1HE2E3E3B0_ONLINE }, + { 0x20480, 1, RI_ALL_ONLINE }, + { 0x20500, 1, RI_ALL_ONLINE }, + { 0x20600, 1, RI_ALL_ONLINE }, + { 0x28000, 1, RI_ALL_ONLINE }, + { 0x28004, 8191, RI_ALL_OFFLINE }, + { 0x30000, 1, RI_ALL_ONLINE }, + { 0x30004, 16383, RI_ALL_OFFLINE }, + { 0x40000, 98, RI_ALL_ONLINE }, + { 0x401a8, 8, RI_E1HE2E3E3B0_ONLINE }, + { 0x401c8, 1, RI_E1H_ONLINE }, + { 0x401cc, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x401d4, 2, RI_E2E3E3B0_ONLINE }, + { 0x40200, 4, RI_ALL_ONLINE }, + { 0x40220, 6, RI_E2E3E3B0_ONLINE }, + { 0x40238, 8, RI_E2E3_ONLINE }, + { 0x40258, 4, RI_E2E3E3B0_ONLINE }, + { 0x40268, 2, RI_E3E3B0_ONLINE }, + { 0x40270, 17, RI_E3B0_ONLINE }, + { 0x40400, 43, RI_ALL_ONLINE }, + { 0x404cc, 3, RI_E1HE2E3E3B0_ONLINE }, + { 0x404e0, 1, RI_E2E3E3B0_ONLINE }, + { 0x40500, 2, RI_ALL_ONLINE }, + { 0x40510, 2, RI_ALL_ONLINE }, + { 0x40520, 2, RI_ALL_ONLINE }, + { 0x40530, 2, RI_ALL_ONLINE }, + { 0x40540, 2, RI_ALL_ONLINE }, + { 0x40550, 10, RI_E2E3E3B0_ONLINE }, + { 0x40610, 2, RI_E2E3E3B0_ONLINE }, + { 0x42000, 164, RI_ALL_ONLINE }, + { 0x422c0, 4, RI_E2E3E3B0_ONLINE }, + { 0x422d4, 5, RI_E1HE2E3E3B0_ONLINE }, + { 0x422e8, 1, RI_E2E3E3B0_ONLINE }, + { 0x42400, 49, RI_ALL_ONLINE }, + { 0x424c8, 38, RI_ALL_ONLINE }, + { 0x42568, 2, RI_ALL_ONLINE }, + { 0x42640, 5, RI_E2E3E3B0_ONLINE }, + { 0x42800, 1, RI_ALL_ONLINE }, + { 0x50000, 1, RI_ALL_ONLINE }, + { 0x50004, 19, RI_ALL_ONLINE }, + { 0x50050, 8, RI_ALL_ONLINE }, + { 0x50070, 88, RI_ALL_ONLINE }, + { 0x501f0, 4, RI_E1HE2E3E3B0_ONLINE }, + { 0x50200, 2, RI_ALL_ONLINE }, + { 0x5020c, 7, RI_ALL_ONLINE }, + { 0x50228, 6, RI_E1HE2E3E3B0_ONLINE }, + { 0x50240, 1, RI_ALL_ONLINE }, + { 0x50280, 1, RI_ALL_ONLINE }, + { 0x50300, 1, RI_E2E3E3B0_ONLINE }, + { 0x5030c, 1, RI_E2E3E3B0_ONLINE }, + { 0x50318, 1, RI_E2E3E3B0_ONLINE }, + { 0x5031c, 1, RI_E2E3E3B0_ONLINE }, + { 0x50320, 2, RI_E2E3E3B0_ONLINE }, + { 0x50330, 1, RI_E3B0_ONLINE }, + { 0x52000, 1, RI_ALL_ONLINE }, + { 0x54000, 1, RI_ALL_ONLINE }, + { 0x54004, 3327, RI_ALL_OFFLINE }, + { 0x58000, 1, RI_ALL_ONLINE }, + { 0x58004, 8191, RI_E1E1H_OFFLINE }, + { 0x60000, 26, RI_ALL_ONLINE }, + { 0x60068, 8, RI_E1E1H_ONLINE }, + { 0x60088, 12, RI_ALL_ONLINE }, + { 0x600b8, 9, RI_E1E1H_ONLINE }, + { 0x600dc, 1, RI_ALL_ONLINE }, + { 0x600e0, 5, RI_E1E1H_ONLINE }, + { 0x600f4, 1, RI_E1E1HE2_ONLINE }, + { 0x600f8, 1, RI_E1E1H_ONLINE }, + { 0x600fc, 8, RI_ALL_ONLINE }, + { 0x6013c, 24, RI_E1H_ONLINE }, + { 0x6019c, 2, RI_E2E3E3B0_ONLINE }, + { 0x601ac, 18, RI_E2E3E3B0_ONLINE }, + { 0x60200, 1, RI_ALL_ONLINE }, + { 0x60204, 2, RI_ALL_OFFLINE }, + { 0x60210, 13, RI_E2E3E3B0_ONLINE }, + { 0x60244, 16, RI_E3B0_ONLINE }, + { 0x61000, 1, RI_ALL_ONLINE }, + { 0x61004, 511, RI_ALL_OFFLINE }, + { 0x61800, 512, RI_E3E3B0_OFFLINE }, + { 0x70000, 8, RI_ALL_ONLINE }, + { 0x70020, 8184, RI_ALL_OFFLINE }, + { 0x78000, 8192, RI_E3E3B0_OFFLINE }, + { 0x85000, 3, RI_ALL_OFFLINE }, + { 0x8501c, 7, RI_ALL_OFFLINE }, + { 0x85048, 1, RI_ALL_OFFLINE }, + { 0x85200, 32, RI_ALL_OFFLINE }, + { 0xb0000, 16384, RI_E1H_OFFLINE }, + { 0xc1000, 7, RI_ALL_ONLINE }, + { 0xc103c, 2, RI_E2E3E3B0_ONLINE }, + { 0xc1800, 2, RI_ALL_ONLINE }, + { 0xc2000, 164, RI_ALL_ONLINE }, + { 0xc22c0, 5, RI_E2E3E3B0_ONLINE }, + { 0xc22d8, 4, RI_E2E3E3B0_ONLINE }, + { 0xc2400, 49, RI_ALL_ONLINE }, + { 0xc24c8, 38, RI_ALL_ONLINE }, + { 0xc2568, 2, RI_ALL_ONLINE }, + { 0xc2600, 1, RI_ALL_ONLINE }, + { 0xc4000, 165, RI_ALL_ONLINE }, + { 0xc42d8, 2, RI_E2E3E3B0_ONLINE }, + { 0xc42e0, 7, RI_E1HE2E3E3B0_ONLINE }, + { 0xc42fc, 1, RI_E2E3E3B0_ONLINE }, + { 0xc4400, 51, RI_ALL_ONLINE }, + { 0xc44d0, 38, RI_ALL_ONLINE }, + { 0xc4570, 2, RI_ALL_ONLINE }, + { 0xc4578, 5, RI_E2E3E3B0_ONLINE }, + { 0xc4600, 1, RI_ALL_ONLINE }, + { 0xd0000, 19, RI_ALL_ONLINE }, + { 0xd004c, 8, RI_ALL_ONLINE }, + { 0xd006c, 91, RI_ALL_ONLINE }, + { 0xd01fc, 1, RI_E2E3E3B0_ONLINE }, + { 0xd0200, 2, RI_ALL_ONLINE }, + { 0xd020c, 7, RI_ALL_ONLINE }, + { 0xd0228, 18, RI_E1HE2E3E3B0_ONLINE }, + { 0xd0280, 1, RI_ALL_ONLINE }, + { 0xd0300, 1, RI_ALL_ONLINE }, + { 0xd0400, 1, RI_ALL_ONLINE }, + { 0xd0818, 1, RI_E3B0_ONLINE }, + { 0xd4000, 1, RI_ALL_ONLINE }, + { 0xd4004, 2559, RI_ALL_OFFLINE }, + { 0xd8000, 1, RI_ALL_ONLINE }, + { 0xd8004, 8191, RI_ALL_OFFLINE }, + { 0xe0000, 21, RI_ALL_ONLINE }, + { 0xe0054, 8, RI_ALL_ONLINE }, + { 0xe0074, 49, RI_ALL_ONLINE }, + { 0xe0138, 1, RI_E1E1H_ONLINE }, + { 0xe013c, 35, RI_ALL_ONLINE }, + { 0xe01f4, 1, RI_E2_ONLINE }, + { 0xe01f8, 1, RI_E2E3E3B0_ONLINE }, + { 0xe0200, 2, RI_ALL_ONLINE }, + { 0xe020c, 8, RI_ALL_ONLINE }, + { 0xe022c, 18, RI_E1HE2E3E3B0_ONLINE }, + { 0xe0280, 1, RI_ALL_ONLINE }, + { 0xe0300, 1, RI_ALL_ONLINE }, + { 0xe0400, 1, RI_E3B0_ONLINE }, + { 0xe1000, 1, RI_ALL_ONLINE }, + { 0xe2000, 1, RI_ALL_ONLINE }, + { 0xe2004, 2047, RI_ALL_OFFLINE }, + { 0xf0000, 1, RI_ALL_ONLINE }, + { 0xf0004, 16383, RI_ALL_OFFLINE }, + { 0x101000, 12, RI_ALL_ONLINE }, + { 0x101050, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x101054, 3, RI_E2E3E3B0_ONLINE }, + { 0x101100, 1, RI_ALL_ONLINE }, + { 0x101800, 8, RI_ALL_ONLINE }, + { 0x102000, 18, RI_ALL_ONLINE }, + { 0x102068, 6, RI_E2E3E3B0_ONLINE }, + { 0x102080, 17, RI_ALL_ONLINE }, + { 0x1020c8, 8, RI_E1H_ONLINE }, + { 0x1020e8, 9, RI_E2E3E3B0_ONLINE }, + { 0x102400, 1, RI_ALL_ONLINE }, + { 0x103000, 26, RI_ALL_ONLINE }, + { 0x103098, 5, RI_E1HE2E3E3B0_ONLINE }, + { 0x1030ac, 2, RI_E2E3E3B0_ONLINE }, + { 0x1030b4, 1, RI_E2_ONLINE }, + { 0x1030b8, 7, RI_E2E3E3B0_ONLINE }, + { 0x1030d8, 8, RI_E2E3E3B0_ONLINE }, + { 0x103400, 1, RI_E2E3E3B0_ONLINE }, + { 0x103404, 135, RI_E2E3E3B0_OFFLINE }, + { 0x103800, 8, RI_ALL_ONLINE }, + { 0x104000, 63, RI_ALL_ONLINE }, + { 0x10411c, 16, RI_E2E3E3B0_ONLINE }, + { 0x104200, 17, RI_ALL_ONLINE }, + { 0x104400, 64, RI_ALL_ONLINE }, + { 0x104500, 192, RI_ALL_OFFLINE }, + { 0x104800, 64, RI_ALL_ONLINE }, + { 0x104900, 192, RI_ALL_OFFLINE }, + { 0x105000, 256, RI_ALL_ONLINE }, + { 0x105400, 768, RI_ALL_OFFLINE }, + { 0x107000, 7, RI_E2E3E3B0_ONLINE }, + { 0x10701c, 1, RI_E3E3B0_ONLINE }, + { 0x108000, 33, RI_E1E1H_ONLINE }, + { 0x1080ac, 5, RI_E1H_ONLINE }, + { 0x108100, 5, RI_E1E1H_ONLINE }, + { 0x108120, 5, RI_E1E1H_ONLINE }, + { 0x108200, 74, RI_E1E1H_ONLINE }, + { 0x108400, 74, RI_E1E1H_ONLINE }, + { 0x108800, 152, RI_E1E1H_ONLINE }, + { 0x110000, 111, RI_E2E3E3B0_ONLINE }, + { 0x1101dc, 1, RI_E3E3B0_ONLINE }, + { 0x110200, 4, RI_E2E3E3B0_ONLINE }, + { 0x120000, 2, RI_ALL_ONLINE }, + { 0x120008, 4, RI_ALL_ONLINE }, + { 0x120018, 3, RI_ALL_ONLINE }, + { 0x120024, 4, RI_ALL_ONLINE }, + { 0x120034, 3, RI_ALL_ONLINE }, + { 0x120040, 4, RI_ALL_ONLINE }, + { 0x120050, 3, RI_ALL_ONLINE }, + { 0x12005c, 4, RI_ALL_ONLINE }, + { 0x12006c, 3, RI_ALL_ONLINE }, + { 0x120078, 4, RI_ALL_ONLINE }, + { 0x120088, 3, RI_ALL_ONLINE }, + { 0x120094, 4, RI_ALL_ONLINE }, + { 0x1200a4, 3, RI_ALL_ONLINE }, + { 0x1200b0, 4, RI_ALL_ONLINE }, + { 0x1200c0, 3, RI_ALL_ONLINE }, + { 0x1200cc, 4, RI_ALL_ONLINE }, + { 0x1200dc, 3, RI_ALL_ONLINE }, + { 0x1200e8, 4, RI_ALL_ONLINE }, + { 0x1200f8, 3, RI_ALL_ONLINE }, + { 0x120104, 4, RI_ALL_ONLINE }, + { 0x120114, 1, RI_ALL_ONLINE }, + { 0x120118, 22, RI_ALL_ONLINE }, + { 0x120170, 2, RI_E1E1H_ONLINE }, + { 0x120178, 243, RI_ALL_ONLINE }, + { 0x120544, 4, RI_E1E1H_ONLINE }, + { 0x120554, 6, RI_ALL_ONLINE }, + { 0x12059c, 6, RI_E1HE2E3E3B0_ONLINE }, + { 0x1205b4, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1205b8, 15, RI_E1HE2E3E3B0_ONLINE }, + { 0x1205f4, 1, RI_E1HE2_ONLINE }, + { 0x1205f8, 4, RI_E2E3E3B0_ONLINE }, + { 0x120618, 1, RI_E2E3E3B0_ONLINE }, + { 0x12061c, 20, RI_E1HE2E3E3B0_ONLINE }, + { 0x12066c, 11, RI_E1HE2E3E3B0_ONLINE }, + { 0x120698, 3, RI_E2E3E3B0_ONLINE }, + { 0x1206a4, 1, RI_E2_ONLINE }, + { 0x1206a8, 1, RI_E2E3E3B0_ONLINE }, + { 0x1206b0, 75, RI_E2E3E3B0_ONLINE }, + { 0x1207dc, 1, RI_E2_ONLINE }, + { 0x1207fc, 1, RI_E2E3E3B0_ONLINE }, + { 0x12080c, 65, RI_ALL_ONLINE }, + { 0x120910, 7, RI_E2E3E3B0_ONLINE }, + { 0x120930, 9, RI_E2E3E3B0_ONLINE }, + { 0x12095c, 37, RI_E3E3B0_ONLINE }, + { 0x120a00, 2, RI_E1E1HE2_ONLINE }, + { 0x120b00, 1, RI_E3E3B0_ONLINE }, + { 0x122000, 2, RI_ALL_ONLINE }, + { 0x122008, 2046, RI_E1_OFFLINE }, + { 0x128000, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x128008, 6142, RI_E1HE2E3E3B0_OFFLINE }, + { 0x130000, 35, RI_E2E3E3B0_ONLINE }, + { 0x130100, 29, RI_E2E3E3B0_ONLINE }, + { 0x130180, 1, RI_E2E3E3B0_ONLINE }, + { 0x130200, 1, RI_E2E3E3B0_ONLINE }, + { 0x130280, 1, RI_E2E3E3B0_ONLINE }, + { 0x130300, 5, RI_E2E3E3B0_ONLINE }, + { 0x130380, 1, RI_E2E3E3B0_ONLINE }, + { 0x130400, 1, RI_E2E3E3B0_ONLINE }, + { 0x130480, 5, RI_E2E3E3B0_ONLINE }, + { 0x130800, 72, RI_E2E3E3B0_ONLINE }, + { 0x131000, 136, RI_E2E3E3B0_ONLINE }, + { 0x132000, 148, RI_E2E3E3B0_ONLINE }, + { 0x134000, 544, RI_E2E3E3B0_ONLINE }, + { 0x140000, 1, RI_ALL_ONLINE }, + { 0x140004, 9, RI_E1E1HE2E3_ONLINE }, + { 0x140028, 8, RI_ALL_ONLINE }, + { 0x140048, 10, RI_E1E1HE2E3_ONLINE }, + { 0x140070, 1, RI_ALL_ONLINE }, + { 0x140074, 10, RI_E1E1HE2E3_ONLINE }, + { 0x14009c, 1, RI_ALL_ONLINE }, + { 0x1400a0, 5, RI_E1E1HE2E3_ONLINE }, + { 0x1400b4, 7, RI_ALL_ONLINE }, + { 0x1400d0, 10, RI_E1E1HE2E3_ONLINE }, + { 0x1400f8, 2, RI_ALL_ONLINE }, + { 0x140100, 5, RI_E1E1H_ONLINE }, + { 0x140114, 5, RI_E1E1HE2E3_ONLINE }, + { 0x140128, 7, RI_ALL_ONLINE }, + { 0x140144, 9, RI_E1E1HE2E3_ONLINE }, + { 0x140168, 8, RI_ALL_ONLINE }, + { 0x140188, 3, RI_E1E1HE2E3_ONLINE }, + { 0x140194, 13, RI_ALL_ONLINE }, + { 0x140200, 6, RI_E1E1HE2E3_ONLINE }, + { 0x140260, 4, RI_E2E3_ONLINE }, + { 0x140280, 4, RI_E2E3_ONLINE }, + { 0x1402e0, 2, RI_E2E3_ONLINE }, + { 0x1402e8, 2, RI_E2E3E3B0_ONLINE }, + { 0x1402f0, 9, RI_E2E3_ONLINE }, + { 0x140314, 44, RI_E3B0_ONLINE }, + { 0x144000, 4, RI_E1E1H_ONLINE }, + { 0x148000, 4, RI_E1E1H_ONLINE }, + { 0x14c000, 4, RI_E1E1H_ONLINE }, + { 0x150000, 4, RI_E1E1H_ONLINE }, + { 0x154000, 4, RI_E1E1H_ONLINE }, + { 0x158000, 4, RI_E1E1H_ONLINE }, + { 0x15c000, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x15c008, 5, RI_E1H_ONLINE }, + { 0x15c020, 8, RI_E2E3E3B0_ONLINE }, + { 0x15c040, 1, RI_E2E3_ONLINE }, + { 0x15c044, 2, RI_E2E3E3B0_ONLINE }, + { 0x15c04c, 8, RI_E2E3_ONLINE }, + { 0x15c06c, 8, RI_E2E3E3B0_ONLINE }, + { 0x15c090, 13, RI_E2E3E3B0_ONLINE }, + { 0x15c0c8, 24, RI_E2E3E3B0_ONLINE }, + { 0x15c128, 2, RI_E2E3_ONLINE }, + { 0x15c130, 8, RI_E2E3E3B0_ONLINE }, + { 0x15c150, 2, RI_E3E3B0_ONLINE }, + { 0x15c158, 2, RI_E3_ONLINE }, + { 0x15c160, 149, RI_E3B0_ONLINE }, + { 0x161000, 7, RI_ALL_ONLINE }, + { 0x16103c, 2, RI_E2E3E3B0_ONLINE }, + { 0x161800, 2, RI_ALL_ONLINE }, + { 0x162000, 54, RI_E3E3B0_ONLINE }, + { 0x162200, 60, RI_E3E3B0_ONLINE }, + { 0x162400, 54, RI_E3E3B0_ONLINE }, + { 0x162600, 60, RI_E3E3B0_ONLINE }, + { 0x162800, 54, RI_E3E3B0_ONLINE }, + { 0x162a00, 60, RI_E3E3B0_ONLINE }, + { 0x162c00, 54, RI_E3E3B0_ONLINE }, + { 0x162e00, 60, RI_E3E3B0_ONLINE }, + { 0x164000, 60, RI_ALL_ONLINE }, + { 0x164110, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x164118, 15, RI_E2E3E3B0_ONLINE }, + { 0x164200, 1, RI_ALL_ONLINE }, + { 0x164208, 1, RI_ALL_ONLINE }, + { 0x164210, 1, RI_ALL_ONLINE }, + { 0x164218, 1, RI_ALL_ONLINE }, + { 0x164220, 1, RI_ALL_ONLINE }, + { 0x164228, 1, RI_ALL_ONLINE }, + { 0x164230, 1, RI_ALL_ONLINE }, + { 0x164238, 1, RI_ALL_ONLINE }, + { 0x164240, 1, RI_ALL_ONLINE }, + { 0x164248, 1, RI_ALL_ONLINE }, + { 0x164250, 1, RI_ALL_ONLINE }, + { 0x164258, 1, RI_ALL_ONLINE }, + { 0x164260, 1, RI_ALL_ONLINE }, + { 0x164270, 2, RI_ALL_ONLINE }, + { 0x164280, 2, RI_ALL_ONLINE }, + { 0x164800, 2, RI_ALL_ONLINE }, + { 0x165000, 2, RI_ALL_ONLINE }, + { 0x166000, 164, RI_ALL_ONLINE }, + { 0x1662cc, 7, RI_E2E3E3B0_ONLINE }, + { 0x166400, 49, RI_ALL_ONLINE }, + { 0x1664c8, 38, RI_ALL_ONLINE }, + { 0x166568, 2, RI_ALL_ONLINE }, + { 0x166570, 5, RI_E2E3E3B0_ONLINE }, + { 0x166800, 1, RI_ALL_ONLINE }, + { 0x168000, 137, RI_ALL_ONLINE }, + { 0x168224, 2, RI_E1E1H_ONLINE }, + { 0x16822c, 29, RI_ALL_ONLINE }, + { 0x1682a0, 12, RI_E1E1H_ONLINE }, + { 0x1682d0, 12, RI_ALL_ONLINE }, + { 0x168300, 2, RI_E1E1H_ONLINE }, + { 0x168308, 68, RI_ALL_ONLINE }, + { 0x168418, 2, RI_E1E1H_ONLINE }, + { 0x168420, 6, RI_ALL_ONLINE }, + { 0x168800, 19, RI_ALL_ONLINE }, + { 0x168900, 1, RI_ALL_ONLINE }, + { 0x168a00, 128, RI_ALL_ONLINE }, + { 0x16a000, 1, RI_ALL_ONLINE }, + { 0x16a004, 1535, RI_ALL_OFFLINE }, + { 0x16c000, 1, RI_ALL_ONLINE }, + { 0x16c004, 1535, RI_ALL_OFFLINE }, + { 0x16e000, 16, RI_E1H_ONLINE }, + { 0x16e040, 8, RI_E2E3E3B0_ONLINE }, + { 0x16e100, 1, RI_E1H_ONLINE }, + { 0x16e200, 2, RI_E1H_ONLINE }, + { 0x16e400, 161, RI_E1H_ONLINE }, + { 0x16e684, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x16e68c, 12, RI_E1H_ONLINE }, + { 0x16e6bc, 4, RI_E1HE2E3E3B0_ONLINE }, + { 0x16e6cc, 4, RI_E1H_ONLINE }, + { 0x16e6e0, 2, RI_E2E3E3B0_ONLINE }, + { 0x16e6e8, 5, RI_E2E3_ONLINE }, + { 0x16e6fc, 5, RI_E2E3E3B0_ONLINE }, + { 0x16e768, 17, RI_E2E3E3B0_ONLINE }, + { 0x16e7ac, 12, RI_E3B0_ONLINE }, + { 0x170000, 24, RI_ALL_ONLINE }, + { 0x170060, 4, RI_E1E1H_ONLINE }, + { 0x170070, 65, RI_ALL_ONLINE }, + { 0x170194, 11, RI_E2E3E3B0_ONLINE }, + { 0x1701c4, 1, RI_E2E3E3B0_ONLINE }, + { 0x1701cc, 7, RI_E2E3E3B0_ONLINE }, + { 0x1701e8, 1, RI_E3E3B0_ONLINE }, + { 0x1701ec, 1, RI_E2E3E3B0_ONLINE }, + { 0x1701f4, 1, RI_E2E3E3B0_ONLINE }, + { 0x170200, 4, RI_ALL_ONLINE }, + { 0x170214, 1, RI_ALL_ONLINE }, + { 0x170218, 77, RI_E2E3E3B0_ONLINE }, + { 0x170400, 64, RI_E2E3E3B0_ONLINE }, + { 0x178000, 1, RI_ALL_ONLINE }, + { 0x180000, 61, RI_ALL_ONLINE }, + { 0x18013c, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x180200, 58, RI_ALL_ONLINE }, + { 0x180340, 4, RI_ALL_ONLINE }, + { 0x180380, 1, RI_E2E3E3B0_ONLINE }, + { 0x180388, 1, RI_E2E3E3B0_ONLINE }, + { 0x180390, 1, RI_E2E3E3B0_ONLINE }, + { 0x180398, 1, RI_E2E3E3B0_ONLINE }, + { 0x1803a0, 5, RI_E2E3E3B0_ONLINE }, + { 0x1803b4, 2, RI_E3E3B0_ONLINE }, + { 0x180404, 255, RI_E1E1H_OFFLINE }, + { 0x181000, 4, RI_ALL_ONLINE }, + { 0x181010, 1020, RI_ALL_OFFLINE }, + { 0x182000, 4, RI_E3E3B0_ONLINE }, + { 0x1a0000, 1, RI_ALL_ONLINE }, + { 0x1a0004, 5631, RI_ALL_OFFLINE }, + { 0x1a5800, 2560, RI_E1HE2E3E3B0_OFFLINE }, + { 0x1a8000, 1, RI_ALL_ONLINE }, + { 0x1a8004, 8191, RI_E1HE2E3E3B0_OFFLINE }, + { 0x1b0000, 1, RI_ALL_ONLINE }, + { 0x1b0004, 15, RI_E1H_OFFLINE }, + { 0x1b0040, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b0044, 239, RI_E1H_OFFLINE }, + { 0x1b0400, 1, RI_ALL_ONLINE }, + { 0x1b0404, 255, RI_E1H_OFFLINE }, + { 0x1b0800, 1, RI_ALL_ONLINE }, + { 0x1b0840, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b0c00, 1, RI_ALL_ONLINE }, + { 0x1b1000, 1, RI_ALL_ONLINE }, + { 0x1b1040, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b1400, 1, RI_ALL_ONLINE }, + { 0x1b1440, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b1480, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b14c0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b1800, 128, RI_ALL_OFFLINE }, + { 0x1b1c00, 128, RI_ALL_OFFLINE }, + { 0x1b2000, 1, RI_ALL_ONLINE }, + { 0x1b2400, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b2404, 5631, RI_E2E3E3B0_OFFLINE }, + { 0x1b8000, 1, RI_ALL_ONLINE }, + { 0x1b8040, 1, RI_ALL_ONLINE }, + { 0x1b8080, 1, RI_ALL_ONLINE }, + { 0x1b80c0, 1, RI_ALL_ONLINE }, + { 0x1b8100, 1, RI_ALL_ONLINE }, + { 0x1b8140, 1, RI_ALL_ONLINE }, + { 0x1b8180, 1, RI_ALL_ONLINE }, + { 0x1b81c0, 1, RI_ALL_ONLINE }, + { 0x1b8200, 1, RI_ALL_ONLINE }, + { 0x1b8240, 1, RI_ALL_ONLINE }, + { 0x1b8280, 1, RI_ALL_ONLINE }, + { 0x1b82c0, 1, RI_ALL_ONLINE }, + { 0x1b8300, 1, RI_ALL_ONLINE }, + { 0x1b8340, 1, RI_ALL_ONLINE }, + { 0x1b8380, 1, RI_ALL_ONLINE }, + { 0x1b83c0, 1, RI_ALL_ONLINE }, + { 0x1b8400, 1, RI_ALL_ONLINE }, + { 0x1b8440, 1, RI_ALL_ONLINE }, + { 0x1b8480, 1, RI_ALL_ONLINE }, + { 0x1b84c0, 1, RI_ALL_ONLINE }, + { 0x1b8500, 1, RI_ALL_ONLINE }, + { 0x1b8540, 1, RI_ALL_ONLINE }, + { 0x1b8580, 1, RI_ALL_ONLINE }, + { 0x1b85c0, 19, RI_E2E3E3B0_ONLINE }, + { 0x1b8800, 1, RI_ALL_ONLINE }, + { 0x1b8840, 1, RI_ALL_ONLINE }, + { 0x1b8880, 1, RI_ALL_ONLINE }, + { 0x1b88c0, 1, RI_ALL_ONLINE }, + { 0x1b8900, 1, RI_ALL_ONLINE }, + { 0x1b8940, 1, RI_ALL_ONLINE }, + { 0x1b8980, 1, RI_ALL_ONLINE }, + { 0x1b89c0, 1, RI_ALL_ONLINE }, + { 0x1b8a00, 1, RI_ALL_ONLINE }, + { 0x1b8a40, 1, RI_ALL_ONLINE }, + { 0x1b8a80, 1, RI_ALL_ONLINE }, + { 0x1b8ac0, 1, RI_ALL_ONLINE }, + { 0x1b8b00, 1, RI_ALL_ONLINE }, + { 0x1b8b40, 1, RI_ALL_ONLINE }, + { 0x1b8b80, 1, RI_ALL_ONLINE }, + { 0x1b8bc0, 1, RI_ALL_ONLINE }, + { 0x1b8c00, 1, RI_ALL_ONLINE }, + { 0x1b8c40, 1, RI_ALL_ONLINE }, + { 0x1b8c80, 1, RI_ALL_ONLINE }, + { 0x1b8cc0, 1, RI_ALL_ONLINE }, + { 0x1b8cc4, 1, RI_E2E3E3B0_ONLINE }, + { 0x1b8d00, 1, RI_ALL_ONLINE }, + { 0x1b8d40, 1, RI_ALL_ONLINE }, + { 0x1b8d80, 1, RI_ALL_ONLINE }, + { 0x1b8dc0, 1, RI_ALL_ONLINE }, + { 0x1b8e00, 1, RI_ALL_ONLINE }, + { 0x1b8e40, 1, RI_ALL_ONLINE }, + { 0x1b8e80, 1, RI_ALL_ONLINE }, + { 0x1b8e84, 1, RI_E2E3E3B0_ONLINE }, + { 0x1b8ec0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b8f00, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b8f40, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b8f80, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b8fc0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x1b8fc4, 2, RI_E2E3E3B0_ONLINE }, + { 0x1b8fd0, 6, RI_E2E3E3B0_ONLINE }, + { 0x1b8fe8, 2, RI_E3E3B0_ONLINE }, + { 0x1b9000, 1, RI_E2E3E3B0_ONLINE }, + { 0x1b9040, 3, RI_E2E3E3B0_ONLINE }, + { 0x1b905c, 1, RI_E3E3B0_ONLINE }, + { 0x1b9064, 1, RI_E3B0_ONLINE }, + { 0x1b9080, 10, RI_E3B0_ONLINE }, + { 0x1b9400, 14, RI_E2E3E3B0_OFFLINE }, + { 0x1b943c, 19, RI_E2E3E3B0_OFFLINE }, + { 0x1b9490, 10, RI_E2E3E3B0_OFFLINE }, + { 0x1c0000, 2, RI_ALL_ONLINE }, + { 0x200000, 65, RI_ALL_ONLINE }, + { 0x20014c, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x200200, 58, RI_ALL_ONLINE }, + { 0x200340, 4, RI_ALL_ONLINE }, + { 0x200380, 1, RI_E2E3E3B0_ONLINE }, + { 0x200388, 1, RI_E2E3E3B0_ONLINE }, + { 0x200390, 1, RI_E2E3E3B0_ONLINE }, + { 0x200398, 1, RI_E2E3E3B0_ONLINE }, + { 0x2003a0, 1, RI_E2E3E3B0_ONLINE }, + { 0x2003a8, 2, RI_E2E3E3B0_ONLINE }, + { 0x200404, 255, RI_E1E1H_OFFLINE }, + { 0x202000, 4, RI_ALL_ONLINE }, + { 0x202010, 2044, RI_ALL_OFFLINE }, + { 0x204000, 4, RI_E3E3B0_ONLINE }, + { 0x220000, 1, RI_ALL_ONLINE }, + { 0x220004, 5631, RI_ALL_OFFLINE }, + { 0x225800, 2560, RI_E1HE2E3E3B0_OFFLINE }, + { 0x228000, 1, RI_ALL_ONLINE }, + { 0x228004, 8191, RI_E1HE2E3E3B0_OFFLINE }, + { 0x230000, 1, RI_ALL_ONLINE }, + { 0x230004, 15, RI_E1H_OFFLINE }, + { 0x230040, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x230044, 239, RI_E1H_OFFLINE }, + { 0x230400, 1, RI_ALL_ONLINE }, + { 0x230404, 255, RI_E1H_OFFLINE }, + { 0x230800, 1, RI_ALL_ONLINE }, + { 0x230840, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x230c00, 1, RI_ALL_ONLINE }, + { 0x231000, 1, RI_ALL_ONLINE }, + { 0x231040, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x231400, 1, RI_ALL_ONLINE }, + { 0x231440, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x231480, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2314c0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x231800, 128, RI_ALL_OFFLINE }, + { 0x231c00, 128, RI_ALL_OFFLINE }, + { 0x232000, 1, RI_ALL_ONLINE }, + { 0x232400, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x232404, 5631, RI_E2E3E3B0_OFFLINE }, + { 0x238000, 1, RI_ALL_ONLINE }, + { 0x238040, 1, RI_ALL_ONLINE }, + { 0x238080, 1, RI_ALL_ONLINE }, + { 0x2380c0, 1, RI_ALL_ONLINE }, + { 0x238100, 1, RI_ALL_ONLINE }, + { 0x238140, 1, RI_ALL_ONLINE }, + { 0x238180, 1, RI_ALL_ONLINE }, + { 0x2381c0, 1, RI_ALL_ONLINE }, + { 0x238200, 1, RI_ALL_ONLINE }, + { 0x238240, 1, RI_ALL_ONLINE }, + { 0x238280, 1, RI_ALL_ONLINE }, + { 0x2382c0, 1, RI_ALL_ONLINE }, + { 0x238300, 1, RI_ALL_ONLINE }, + { 0x238340, 1, RI_ALL_ONLINE }, + { 0x238380, 1, RI_ALL_ONLINE }, + { 0x2383c0, 1, RI_ALL_ONLINE }, + { 0x238400, 1, RI_ALL_ONLINE }, + { 0x238440, 1, RI_ALL_ONLINE }, + { 0x238480, 1, RI_ALL_ONLINE }, + { 0x2384c0, 1, RI_ALL_ONLINE }, + { 0x238500, 1, RI_ALL_ONLINE }, + { 0x238540, 1, RI_ALL_ONLINE }, + { 0x238580, 1, RI_ALL_ONLINE }, + { 0x2385c0, 19, RI_E2E3E3B0_ONLINE }, + { 0x238800, 1, RI_ALL_ONLINE }, + { 0x238840, 1, RI_ALL_ONLINE }, + { 0x238880, 1, RI_ALL_ONLINE }, + { 0x2388c0, 1, RI_ALL_ONLINE }, + { 0x238900, 1, RI_ALL_ONLINE }, + { 0x238940, 1, RI_ALL_ONLINE }, + { 0x238980, 1, RI_ALL_ONLINE }, + { 0x2389c0, 1, RI_ALL_ONLINE }, + { 0x238a00, 1, RI_ALL_ONLINE }, + { 0x238a40, 1, RI_ALL_ONLINE }, + { 0x238a80, 1, RI_ALL_ONLINE }, + { 0x238ac0, 1, RI_ALL_ONLINE }, + { 0x238b00, 1, RI_ALL_ONLINE }, + { 0x238b40, 1, RI_ALL_ONLINE }, + { 0x238b80, 1, RI_ALL_ONLINE }, + { 0x238bc0, 1, RI_ALL_ONLINE }, + { 0x238c00, 1, RI_ALL_ONLINE }, + { 0x238c40, 1, RI_ALL_ONLINE }, + { 0x238c80, 1, RI_ALL_ONLINE }, + { 0x238cc0, 1, RI_ALL_ONLINE }, + { 0x238cc4, 1, RI_E2E3E3B0_ONLINE }, + { 0x238d00, 1, RI_ALL_ONLINE }, + { 0x238d40, 1, RI_ALL_ONLINE }, + { 0x238d80, 1, RI_ALL_ONLINE }, + { 0x238dc0, 1, RI_ALL_ONLINE }, + { 0x238e00, 1, RI_ALL_ONLINE }, + { 0x238e40, 1, RI_ALL_ONLINE }, + { 0x238e80, 1, RI_ALL_ONLINE }, + { 0x238e84, 1, RI_E2E3E3B0_ONLINE }, + { 0x238ec0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x238f00, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x238f40, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x238f80, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x238fc0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x238fc4, 2, RI_E2E3E3B0_ONLINE }, + { 0x238fd0, 6, RI_E2E3E3B0_ONLINE }, + { 0x238fe8, 2, RI_E3E3B0_ONLINE }, + { 0x239000, 1, RI_E2E3E3B0_ONLINE }, + { 0x239040, 3, RI_E2E3E3B0_ONLINE }, + { 0x23905c, 1, RI_E3E3B0_ONLINE }, + { 0x239064, 1, RI_E3B0_ONLINE }, + { 0x239080, 10, RI_E3B0_ONLINE }, + { 0x240000, 2, RI_ALL_ONLINE }, + { 0x280000, 65, RI_ALL_ONLINE }, + { 0x28014c, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x280200, 58, RI_ALL_ONLINE }, + { 0x280340, 4, RI_ALL_ONLINE }, + { 0x280380, 1, RI_E2E3E3B0_ONLINE }, + { 0x280388, 1, RI_E2E3E3B0_ONLINE }, + { 0x280390, 1, RI_E2E3E3B0_ONLINE }, + { 0x280398, 1, RI_E2E3E3B0_ONLINE }, + { 0x2803a0, 1, RI_E2E3E3B0_ONLINE }, + { 0x2803a8, 2, RI_E2E3E3B0_ONLINE }, + { 0x280404, 255, RI_E1E1H_OFFLINE }, + { 0x282000, 4, RI_ALL_ONLINE }, + { 0x282010, 2044, RI_ALL_OFFLINE }, + { 0x284000, 4, RI_E3E3B0_ONLINE }, + { 0x2a0000, 1, RI_ALL_ONLINE }, + { 0x2a0004, 5631, RI_ALL_OFFLINE }, + { 0x2a5800, 2560, RI_E1HE2E3E3B0_OFFLINE }, + { 0x2a8000, 1, RI_ALL_ONLINE }, + { 0x2a8004, 8191, RI_E1HE2E3E3B0_OFFLINE }, + { 0x2b0000, 1, RI_ALL_ONLINE }, + { 0x2b0004, 15, RI_E1H_OFFLINE }, + { 0x2b0040, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b0044, 239, RI_E1H_OFFLINE }, + { 0x2b0400, 1, RI_ALL_ONLINE }, + { 0x2b0404, 255, RI_E1H_OFFLINE }, + { 0x2b0800, 1, RI_ALL_ONLINE }, + { 0x2b0840, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b0c00, 1, RI_ALL_ONLINE }, + { 0x2b1000, 1, RI_ALL_ONLINE }, + { 0x2b1040, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b1400, 1, RI_ALL_ONLINE }, + { 0x2b1440, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b1480, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b14c0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b1800, 128, RI_ALL_OFFLINE }, + { 0x2b1c00, 128, RI_ALL_OFFLINE }, + { 0x2b2000, 1, RI_ALL_ONLINE }, + { 0x2b2400, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b2404, 5631, RI_E2E3E3B0_OFFLINE }, + { 0x2b8000, 1, RI_ALL_ONLINE }, + { 0x2b8040, 1, RI_ALL_ONLINE }, + { 0x2b8080, 1, RI_ALL_ONLINE }, + { 0x2b80c0, 1, RI_ALL_ONLINE }, + { 0x2b8100, 1, RI_ALL_ONLINE }, + { 0x2b8140, 1, RI_ALL_ONLINE }, + { 0x2b8180, 1, RI_ALL_ONLINE }, + { 0x2b81c0, 1, RI_ALL_ONLINE }, + { 0x2b8200, 1, RI_ALL_ONLINE }, + { 0x2b8240, 1, RI_ALL_ONLINE }, + { 0x2b8280, 1, RI_ALL_ONLINE }, + { 0x2b82c0, 1, RI_ALL_ONLINE }, + { 0x2b8300, 1, RI_ALL_ONLINE }, + { 0x2b8340, 1, RI_ALL_ONLINE }, + { 0x2b8380, 1, RI_ALL_ONLINE }, + { 0x2b83c0, 1, RI_ALL_ONLINE }, + { 0x2b8400, 1, RI_ALL_ONLINE }, + { 0x2b8440, 1, RI_ALL_ONLINE }, + { 0x2b8480, 1, RI_ALL_ONLINE }, + { 0x2b84c0, 1, RI_ALL_ONLINE }, + { 0x2b8500, 1, RI_ALL_ONLINE }, + { 0x2b8540, 1, RI_ALL_ONLINE }, + { 0x2b8580, 1, RI_ALL_ONLINE }, + { 0x2b85c0, 19, RI_E2E3E3B0_ONLINE }, + { 0x2b8800, 1, RI_ALL_ONLINE }, + { 0x2b8840, 1, RI_ALL_ONLINE }, + { 0x2b8880, 1, RI_ALL_ONLINE }, + { 0x2b88c0, 1, RI_ALL_ONLINE }, + { 0x2b8900, 1, RI_ALL_ONLINE }, + { 0x2b8940, 1, RI_ALL_ONLINE }, + { 0x2b8980, 1, RI_ALL_ONLINE }, + { 0x2b89c0, 1, RI_ALL_ONLINE }, + { 0x2b8a00, 1, RI_ALL_ONLINE }, + { 0x2b8a40, 1, RI_ALL_ONLINE }, + { 0x2b8a80, 1, RI_ALL_ONLINE }, + { 0x2b8ac0, 1, RI_ALL_ONLINE }, + { 0x2b8b00, 1, RI_ALL_ONLINE }, + { 0x2b8b40, 1, RI_ALL_ONLINE }, + { 0x2b8b80, 1, RI_ALL_ONLINE }, + { 0x2b8bc0, 1, RI_ALL_ONLINE }, + { 0x2b8c00, 1, RI_ALL_ONLINE }, + { 0x2b8c40, 1, RI_ALL_ONLINE }, + { 0x2b8c80, 1, RI_ALL_ONLINE }, + { 0x2b8cc0, 1, RI_ALL_ONLINE }, + { 0x2b8cc4, 1, RI_E2E3E3B0_ONLINE }, + { 0x2b8d00, 1, RI_ALL_ONLINE }, + { 0x2b8d40, 1, RI_ALL_ONLINE }, + { 0x2b8d80, 1, RI_ALL_ONLINE }, + { 0x2b8dc0, 1, RI_ALL_ONLINE }, + { 0x2b8e00, 1, RI_ALL_ONLINE }, + { 0x2b8e40, 1, RI_ALL_ONLINE }, + { 0x2b8e80, 1, RI_ALL_ONLINE }, + { 0x2b8e84, 1, RI_E2E3E3B0_ONLINE }, + { 0x2b8ec0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b8f00, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b8f40, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b8f80, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b8fc0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x2b8fc4, 2, RI_E2E3E3B0_ONLINE }, + { 0x2b8fd0, 6, RI_E2E3E3B0_ONLINE }, + { 0x2b8fe8, 2, RI_E3E3B0_ONLINE }, + { 0x2b9000, 1, RI_E2E3E3B0_ONLINE }, + { 0x2b9040, 3, RI_E2E3E3B0_ONLINE }, + { 0x2b905c, 1, RI_E3E3B0_ONLINE }, + { 0x2b9064, 1, RI_E3B0_ONLINE }, + { 0x2b9080, 10, RI_E3B0_ONLINE }, + { 0x2b9400, 14, RI_E2E3E3B0_ONLINE }, + { 0x2b943c, 19, RI_E2E3E3B0_ONLINE }, + { 0x2b9490, 10, RI_E2E3E3B0_ONLINE }, + { 0x2c0000, 2, RI_ALL_ONLINE }, + { 0x300000, 65, RI_ALL_ONLINE }, + { 0x30014c, 2, RI_E1HE2E3E3B0_ONLINE }, + { 0x300200, 58, RI_ALL_ONLINE }, + { 0x300340, 4, RI_ALL_ONLINE }, + { 0x300380, 1, RI_E2E3E3B0_ONLINE }, + { 0x300388, 1, RI_E2E3E3B0_ONLINE }, + { 0x300390, 1, RI_E2E3E3B0_ONLINE }, + { 0x300398, 1, RI_E2E3E3B0_ONLINE }, + { 0x3003a0, 1, RI_E2E3E3B0_ONLINE }, + { 0x3003a8, 2, RI_E2E3E3B0_ONLINE }, + { 0x300404, 255, RI_E1E1H_OFFLINE }, + { 0x302000, 4, RI_ALL_ONLINE }, + { 0x302010, 2044, RI_ALL_OFFLINE }, + { 0x304000, 4, RI_E3E3B0_ONLINE }, + { 0x320000, 1, RI_ALL_ONLINE }, + { 0x320004, 5631, RI_ALL_OFFLINE }, + { 0x325800, 2560, RI_E1HE2E3E3B0_OFFLINE }, + { 0x328000, 1, RI_ALL_ONLINE }, + { 0x328004, 8191, RI_E1HE2E3E3B0_OFFLINE }, + { 0x330000, 1, RI_ALL_ONLINE }, + { 0x330004, 15, RI_E1H_OFFLINE }, + { 0x330040, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x330044, 239, RI_E1H_OFFLINE }, + { 0x330400, 1, RI_ALL_ONLINE }, + { 0x330404, 255, RI_E1H_OFFLINE }, + { 0x330800, 1, RI_ALL_ONLINE }, + { 0x330840, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x330c00, 1, RI_ALL_ONLINE }, + { 0x331000, 1, RI_ALL_ONLINE }, + { 0x331040, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x331400, 1, RI_ALL_ONLINE }, + { 0x331440, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x331480, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x3314c0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x331800, 128, RI_ALL_OFFLINE }, + { 0x331c00, 128, RI_ALL_OFFLINE }, + { 0x332000, 1, RI_ALL_ONLINE }, + { 0x332400, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x332404, 5631, RI_E2E3E3B0_OFFLINE }, + { 0x338000, 1, RI_ALL_ONLINE }, + { 0x338040, 1, RI_ALL_ONLINE }, + { 0x338080, 1, RI_ALL_ONLINE }, + { 0x3380c0, 1, RI_ALL_ONLINE }, + { 0x338100, 1, RI_ALL_ONLINE }, + { 0x338140, 1, RI_ALL_ONLINE }, + { 0x338180, 1, RI_ALL_ONLINE }, + { 0x3381c0, 1, RI_ALL_ONLINE }, + { 0x338200, 1, RI_ALL_ONLINE }, + { 0x338240, 1, RI_ALL_ONLINE }, + { 0x338280, 1, RI_ALL_ONLINE }, + { 0x3382c0, 1, RI_ALL_ONLINE }, + { 0x338300, 1, RI_ALL_ONLINE }, + { 0x338340, 1, RI_ALL_ONLINE }, + { 0x338380, 1, RI_ALL_ONLINE }, + { 0x3383c0, 1, RI_ALL_ONLINE }, + { 0x338400, 1, RI_ALL_ONLINE }, + { 0x338440, 1, RI_ALL_ONLINE }, + { 0x338480, 1, RI_ALL_ONLINE }, + { 0x3384c0, 1, RI_ALL_ONLINE }, + { 0x338500, 1, RI_ALL_ONLINE }, + { 0x338540, 1, RI_ALL_ONLINE }, + { 0x338580, 1, RI_ALL_ONLINE }, + { 0x3385c0, 19, RI_E2E3E3B0_ONLINE }, + { 0x338800, 1, RI_ALL_ONLINE }, + { 0x338840, 1, RI_ALL_ONLINE }, + { 0x338880, 1, RI_ALL_ONLINE }, + { 0x3388c0, 1, RI_ALL_ONLINE }, + { 0x338900, 1, RI_ALL_ONLINE }, + { 0x338940, 1, RI_ALL_ONLINE }, + { 0x338980, 1, RI_ALL_ONLINE }, + { 0x3389c0, 1, RI_ALL_ONLINE }, + { 0x338a00, 1, RI_ALL_ONLINE }, + { 0x338a40, 1, RI_ALL_ONLINE }, + { 0x338a80, 1, RI_ALL_ONLINE }, + { 0x338ac0, 1, RI_ALL_ONLINE }, + { 0x338b00, 1, RI_ALL_ONLINE }, + { 0x338b40, 1, RI_ALL_ONLINE }, + { 0x338b80, 1, RI_ALL_ONLINE }, + { 0x338bc0, 1, RI_ALL_ONLINE }, + { 0x338c00, 1, RI_ALL_ONLINE }, + { 0x338c40, 1, RI_ALL_ONLINE }, + { 0x338c80, 1, RI_ALL_ONLINE }, + { 0x338cc0, 1, RI_ALL_ONLINE }, + { 0x338cc4, 1, RI_E2E3E3B0_ONLINE }, + { 0x338d00, 1, RI_ALL_ONLINE }, + { 0x338d40, 1, RI_ALL_ONLINE }, + { 0x338d80, 1, RI_ALL_ONLINE }, + { 0x338dc0, 1, RI_ALL_ONLINE }, + { 0x338e00, 1, RI_ALL_ONLINE }, + { 0x338e40, 1, RI_ALL_ONLINE }, + { 0x338e80, 1, RI_ALL_ONLINE }, + { 0x338e84, 1, RI_E2E3E3B0_ONLINE }, + { 0x338ec0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x338f00, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x338f40, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x338f80, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x338fc0, 1, RI_E1HE2E3E3B0_ONLINE }, + { 0x338fc4, 2, RI_E2E3E3B0_ONLINE }, + { 0x338fd0, 6, RI_E2E3E3B0_ONLINE }, + { 0x338fe8, 2, RI_E3E3B0_ONLINE }, + { 0x339000, 1, RI_E2E3E3B0_ONLINE }, + { 0x339040, 3, RI_E2E3E3B0_ONLINE }, + { 0x33905c, 1, RI_E3E3B0_ONLINE }, + { 0x339064, 1, RI_E3B0_ONLINE }, + { 0x339080, 10, RI_E3B0_ONLINE }, + { 0x340000, 2, RI_ALL_ONLINE }, }; +#define REGS_COUNT ARRAY_SIZE(reg_addrs) -#define IDLE_REGS_COUNT 297 -static const struct reg_addr idle_addrs[IDLE_REGS_COUNT] = { - { 0x2104, 1, RI_ALL_ONLINE }, { 0x2110, 2, RI_ALL_ONLINE }, - { 0x211c, 8, RI_ALL_ONLINE }, { 0x2814, 1, RI_ALL_ONLINE }, - { 0x281c, 2, RI_ALL_ONLINE }, { 0x2854, 1, RI_ALL_ONLINE }, - { 0x285c, 1, RI_ALL_ONLINE }, { 0x9010, 7, RI_E2_ONLINE }, - { 0x9030, 1, RI_E2_ONLINE }, { 0x9068, 6, RI_E2_ONLINE }, - { 0x9088, 8, RI_E2_ONLINE }, { 0x9230, 2, RI_E2_ONLINE }, - { 0x9244, 1, RI_E2_ONLINE }, { 0x9298, 1, RI_E2_ONLINE }, - { 0x92a8, 1, RI_E2_ONLINE }, { 0xa38c, 1, RI_ALL_ONLINE }, - { 0xa3c4, 1, RI_E1HE2_ONLINE }, { 0xa408, 1, RI_ALL_ONLINE }, - { 0xa42c, 12, RI_ALL_ONLINE }, { 0xa600, 5, RI_E1HE2_ONLINE }, - { 0xa618, 1, RI_E1HE2_ONLINE }, { 0xa714, 1, RI_E2_ONLINE }, - { 0xa720, 1, RI_E2_ONLINE }, { 0xa750, 1, RI_E2_ONLINE }, - { 0xc09c, 1, RI_E1E1H_ONLINE }, { 0x103b0, 1, RI_ALL_ONLINE }, - { 0x103c0, 1, RI_ALL_ONLINE }, { 0x103d0, 1, RI_E1H_ONLINE }, - { 0x183bc, 1, RI_E2_ONLINE }, { 0x183cc, 1, RI_E2_ONLINE }, - { 0x2021c, 11, RI_ALL_ONLINE }, { 0x202a8, 1, RI_ALL_ONLINE }, - { 0x202b8, 1, RI_ALL_ONLINE }, { 0x20404, 1, RI_ALL_ONLINE }, - { 0x2040c, 2, RI_ALL_ONLINE }, { 0x2041c, 2, RI_ALL_ONLINE }, - { 0x40154, 14, RI_ALL_ONLINE }, { 0x40198, 1, RI_ALL_ONLINE }, - { 0x404ac, 1, RI_ALL_ONLINE }, { 0x404bc, 1, RI_ALL_ONLINE }, - { 0x42290, 1, RI_ALL_ONLINE }, { 0x422a0, 1, RI_ALL_ONLINE }, - { 0x422b0, 1, RI_ALL_ONLINE }, { 0x42548, 1, RI_ALL_ONLINE }, - { 0x42550, 1, RI_ALL_ONLINE }, { 0x42558, 1, RI_ALL_ONLINE }, - { 0x50160, 8, RI_ALL_ONLINE }, { 0x501d0, 1, RI_ALL_ONLINE }, - { 0x501e0, 1, RI_ALL_ONLINE }, { 0x50204, 1, RI_ALL_ONLINE }, - { 0x5020c, 2, RI_ALL_ONLINE }, { 0x5021c, 1, RI_ALL_ONLINE }, - { 0x60090, 1, RI_ALL_ONLINE }, { 0x6011c, 1, RI_ALL_ONLINE }, - { 0x6012c, 1, RI_ALL_ONLINE }, { 0xc101c, 1, RI_ALL_ONLINE }, - { 0xc102c, 1, RI_ALL_ONLINE }, { 0xc2290, 1, RI_ALL_ONLINE }, - { 0xc22a0, 1, RI_ALL_ONLINE }, { 0xc22b0, 1, RI_ALL_ONLINE }, - { 0xc2548, 1, RI_ALL_ONLINE }, { 0xc2550, 1, RI_ALL_ONLINE }, - { 0xc2558, 1, RI_ALL_ONLINE }, { 0xc4294, 1, RI_ALL_ONLINE }, - { 0xc42a4, 1, RI_ALL_ONLINE }, { 0xc42b4, 1, RI_ALL_ONLINE }, - { 0xc4550, 1, RI_ALL_ONLINE }, { 0xc4558, 1, RI_ALL_ONLINE }, - { 0xc4560, 1, RI_ALL_ONLINE }, { 0xd016c, 8, RI_ALL_ONLINE }, - { 0xd01d8, 1, RI_ALL_ONLINE }, { 0xd01e8, 1, RI_ALL_ONLINE }, - { 0xd0204, 1, RI_ALL_ONLINE }, { 0xd020c, 3, RI_ALL_ONLINE }, - { 0xe0154, 8, RI_ALL_ONLINE }, { 0xe01c8, 1, RI_ALL_ONLINE }, - { 0xe01d8, 1, RI_ALL_ONLINE }, { 0xe0204, 1, RI_ALL_ONLINE }, - { 0xe020c, 2, RI_ALL_ONLINE }, { 0xe021c, 2, RI_ALL_ONLINE }, - { 0x101014, 1, RI_ALL_ONLINE }, { 0x101030, 1, RI_ALL_ONLINE }, - { 0x101040, 1, RI_ALL_ONLINE }, { 0x102058, 1, RI_ALL_ONLINE }, - { 0x102080, 16, RI_ALL_ONLINE }, { 0x103004, 2, RI_ALL_ONLINE }, - { 0x103068, 1, RI_ALL_ONLINE }, { 0x103078, 1, RI_ALL_ONLINE }, - { 0x103088, 1, RI_ALL_ONLINE }, { 0x10309c, 2, RI_E1HE2_ONLINE }, - { 0x1030b8, 2, RI_E2_ONLINE }, { 0x1030cc, 1, RI_E2_ONLINE }, - { 0x1030e0, 1, RI_E2_ONLINE }, { 0x104004, 1, RI_ALL_ONLINE }, - { 0x104018, 1, RI_ALL_ONLINE }, { 0x104020, 1, RI_ALL_ONLINE }, - { 0x10403c, 1, RI_ALL_ONLINE }, { 0x1040fc, 1, RI_ALL_ONLINE }, - { 0x10410c, 1, RI_ALL_ONLINE }, { 0x104400, 64, RI_ALL_ONLINE }, - { 0x104800, 64, RI_ALL_ONLINE }, { 0x105000, 3, RI_ALL_ONLINE }, - { 0x105010, 3, RI_ALL_ONLINE }, { 0x105020, 3, RI_ALL_ONLINE }, - { 0x105030, 3, RI_ALL_ONLINE }, { 0x105040, 3, RI_ALL_ONLINE }, - { 0x105050, 3, RI_ALL_ONLINE }, { 0x105060, 3, RI_ALL_ONLINE }, - { 0x105070, 3, RI_ALL_ONLINE }, { 0x105080, 3, RI_ALL_ONLINE }, - { 0x105090, 3, RI_ALL_ONLINE }, { 0x1050a0, 3, RI_ALL_ONLINE }, - { 0x1050b0, 3, RI_ALL_ONLINE }, { 0x1050c0, 3, RI_ALL_ONLINE }, - { 0x1050d0, 3, RI_ALL_ONLINE }, { 0x1050e0, 3, RI_ALL_ONLINE }, - { 0x1050f0, 3, RI_ALL_ONLINE }, { 0x105100, 3, RI_ALL_ONLINE }, - { 0x105110, 3, RI_ALL_ONLINE }, { 0x105120, 3, RI_ALL_ONLINE }, - { 0x105130, 3, RI_ALL_ONLINE }, { 0x105140, 3, RI_ALL_ONLINE }, - { 0x105150, 3, RI_ALL_ONLINE }, { 0x105160, 3, RI_ALL_ONLINE }, - { 0x105170, 3, RI_ALL_ONLINE }, { 0x105180, 3, RI_ALL_ONLINE }, - { 0x105190, 3, RI_ALL_ONLINE }, { 0x1051a0, 3, RI_ALL_ONLINE }, - { 0x1051b0, 3, RI_ALL_ONLINE }, { 0x1051c0, 3, RI_ALL_ONLINE }, - { 0x1051d0, 3, RI_ALL_ONLINE }, { 0x1051e0, 3, RI_ALL_ONLINE }, - { 0x1051f0, 3, RI_ALL_ONLINE }, { 0x105200, 3, RI_ALL_ONLINE }, - { 0x105210, 3, RI_ALL_ONLINE }, { 0x105220, 3, RI_ALL_ONLINE }, - { 0x105230, 3, RI_ALL_ONLINE }, { 0x105240, 3, RI_ALL_ONLINE }, - { 0x105250, 3, RI_ALL_ONLINE }, { 0x105260, 3, RI_ALL_ONLINE }, - { 0x105270, 3, RI_ALL_ONLINE }, { 0x105280, 3, RI_ALL_ONLINE }, - { 0x105290, 3, RI_ALL_ONLINE }, { 0x1052a0, 3, RI_ALL_ONLINE }, - { 0x1052b0, 3, RI_ALL_ONLINE }, { 0x1052c0, 3, RI_ALL_ONLINE }, - { 0x1052d0, 3, RI_ALL_ONLINE }, { 0x1052e0, 3, RI_ALL_ONLINE }, - { 0x1052f0, 3, RI_ALL_ONLINE }, { 0x105300, 3, RI_ALL_ONLINE }, - { 0x105310, 3, RI_ALL_ONLINE }, { 0x105320, 3, RI_ALL_ONLINE }, - { 0x105330, 3, RI_ALL_ONLINE }, { 0x105340, 3, RI_ALL_ONLINE }, - { 0x105350, 3, RI_ALL_ONLINE }, { 0x105360, 3, RI_ALL_ONLINE }, - { 0x105370, 3, RI_ALL_ONLINE }, { 0x105380, 3, RI_ALL_ONLINE }, - { 0x105390, 3, RI_ALL_ONLINE }, { 0x1053a0, 3, RI_ALL_ONLINE }, - { 0x1053b0, 3, RI_ALL_ONLINE }, { 0x1053c0, 3, RI_ALL_ONLINE }, - { 0x1053d0, 3, RI_ALL_ONLINE }, { 0x1053e0, 3, RI_ALL_ONLINE }, - { 0x1053f0, 3, RI_ALL_ONLINE }, { 0x108094, 1, RI_E1E1H_ONLINE }, - { 0x1201b0, 2, RI_ALL_ONLINE }, { 0x12032c, 1, RI_ALL_ONLINE }, - { 0x12036c, 3, RI_ALL_ONLINE }, { 0x120408, 2, RI_ALL_ONLINE }, - { 0x120414, 15, RI_ALL_ONLINE }, { 0x120478, 2, RI_ALL_ONLINE }, - { 0x12052c, 1, RI_ALL_ONLINE }, { 0x120564, 3, RI_ALL_ONLINE }, - { 0x12057c, 1, RI_ALL_ONLINE }, { 0x12058c, 1, RI_ALL_ONLINE }, - { 0x120608, 1, RI_E1HE2_ONLINE }, { 0x120808, 3, RI_ALL_ONLINE }, - { 0x120818, 1, RI_ALL_ONLINE }, { 0x120820, 1, RI_ALL_ONLINE }, - { 0x120828, 1, RI_ALL_ONLINE }, { 0x120830, 1, RI_ALL_ONLINE }, - { 0x120838, 1, RI_ALL_ONLINE }, { 0x120840, 1, RI_ALL_ONLINE }, - { 0x120848, 1, RI_ALL_ONLINE }, { 0x120850, 1, RI_ALL_ONLINE }, - { 0x120858, 1, RI_ALL_ONLINE }, { 0x120860, 1, RI_ALL_ONLINE }, - { 0x120868, 1, RI_ALL_ONLINE }, { 0x120870, 1, RI_ALL_ONLINE }, - { 0x120878, 1, RI_ALL_ONLINE }, { 0x120880, 1, RI_ALL_ONLINE }, - { 0x120888, 1, RI_ALL_ONLINE }, { 0x120890, 1, RI_ALL_ONLINE }, - { 0x120898, 1, RI_ALL_ONLINE }, { 0x1208a0, 1, RI_ALL_ONLINE }, - { 0x1208a8, 1, RI_ALL_ONLINE }, { 0x1208b0, 1, RI_ALL_ONLINE }, - { 0x1208b8, 1, RI_ALL_ONLINE }, { 0x1208c0, 1, RI_ALL_ONLINE }, - { 0x1208c8, 1, RI_ALL_ONLINE }, { 0x1208d0, 1, RI_ALL_ONLINE }, - { 0x1208d8, 1, RI_ALL_ONLINE }, { 0x1208e0, 1, RI_ALL_ONLINE }, - { 0x1208e8, 1, RI_ALL_ONLINE }, { 0x1208f0, 1, RI_ALL_ONLINE }, - { 0x1208f8, 1, RI_ALL_ONLINE }, { 0x120900, 1, RI_ALL_ONLINE }, - { 0x120908, 1, RI_ALL_ONLINE }, { 0x120940, 1, RI_E2_ONLINE }, - { 0x130030, 1, RI_E2_ONLINE }, { 0x13009c, 1, RI_E2_ONLINE }, - { 0x130130, 1, RI_E2_ONLINE }, { 0x13016c, 1, RI_E2_ONLINE }, - { 0x130480, 1, RI_E2_ONLINE }, { 0x14005c, 2, RI_ALL_ONLINE }, - { 0x1400d0, 2, RI_ALL_ONLINE }, { 0x1400e0, 1, RI_ALL_ONLINE }, - { 0x1401c8, 1, RI_ALL_ONLINE }, { 0x140200, 6, RI_ALL_ONLINE }, - { 0x16101c, 1, RI_ALL_ONLINE }, { 0x16102c, 1, RI_ALL_ONLINE }, - { 0x164014, 2, RI_ALL_ONLINE }, { 0x1640f0, 1, RI_ALL_ONLINE }, - { 0x166290, 1, RI_ALL_ONLINE }, { 0x1662a0, 1, RI_ALL_ONLINE }, - { 0x1662b0, 1, RI_ALL_ONLINE }, { 0x166548, 1, RI_ALL_ONLINE }, - { 0x166550, 1, RI_ALL_ONLINE }, { 0x166558, 1, RI_ALL_ONLINE }, - { 0x168000, 1, RI_ALL_ONLINE }, { 0x168008, 1, RI_ALL_ONLINE }, - { 0x168010, 1, RI_ALL_ONLINE }, { 0x168018, 1, RI_ALL_ONLINE }, - { 0x168028, 2, RI_ALL_ONLINE }, { 0x168058, 4, RI_ALL_ONLINE }, - { 0x168070, 1, RI_ALL_ONLINE }, { 0x168238, 1, RI_ALL_ONLINE }, - { 0x1682d0, 2, RI_ALL_ONLINE }, { 0x1682e0, 1, RI_ALL_ONLINE }, - { 0x168300, 2, RI_E1E1H_ONLINE }, { 0x168308, 65, RI_ALL_ONLINE }, - { 0x168410, 2, RI_ALL_ONLINE }, { 0x168438, 1, RI_ALL_ONLINE }, - { 0x168448, 1, RI_ALL_ONLINE }, { 0x168a00, 128, RI_ALL_ONLINE }, - { 0x16e200, 2, RI_E1H_ONLINE }, { 0x16e208, 126, RI_E1H_ONLINE }, - { 0x16e404, 2, RI_E1H_ONLINE }, { 0x16e584, 64, RI_E1H_ONLINE }, - { 0x16e684, 2, RI_E1HE2_ONLINE }, { 0x16e68c, 4, RI_E1H_ONLINE }, - { 0x16e6fc, 4, RI_E2_ONLINE }, { 0x1700a4, 1, RI_ALL_ONLINE }, - { 0x1700ac, 2, RI_ALL_ONLINE }, { 0x1700c0, 1, RI_ALL_ONLINE }, - { 0x170174, 1, RI_ALL_ONLINE }, { 0x170184, 1, RI_ALL_ONLINE }, - { 0x1800f4, 1, RI_ALL_ONLINE }, { 0x180104, 1, RI_ALL_ONLINE }, - { 0x180114, 1, RI_ALL_ONLINE }, { 0x180124, 1, RI_ALL_ONLINE }, - { 0x18026c, 1, RI_ALL_ONLINE }, { 0x1802a0, 1, RI_ALL_ONLINE }, - { 0x1b8000, 1, RI_ALL_ONLINE }, { 0x1b8040, 1, RI_ALL_ONLINE }, - { 0x1b8080, 1, RI_ALL_ONLINE }, { 0x1b80c0, 1, RI_ALL_ONLINE }, - { 0x200104, 1, RI_ALL_ONLINE }, { 0x200114, 1, RI_ALL_ONLINE }, - { 0x200124, 1, RI_ALL_ONLINE }, { 0x200134, 1, RI_ALL_ONLINE }, - { 0x20026c, 1, RI_ALL_ONLINE }, { 0x2002a0, 1, RI_ALL_ONLINE }, - { 0x238000, 1, RI_ALL_ONLINE }, { 0x238040, 1, RI_ALL_ONLINE }, - { 0x238080, 1, RI_ALL_ONLINE }, { 0x2380c0, 1, RI_ALL_ONLINE }, - { 0x280104, 1, RI_ALL_ONLINE }, { 0x280114, 1, RI_ALL_ONLINE }, - { 0x280124, 1, RI_ALL_ONLINE }, { 0x280134, 1, RI_ALL_ONLINE }, - { 0x28026c, 1, RI_ALL_ONLINE }, { 0x2802a0, 1, RI_ALL_ONLINE }, - { 0x2b8000, 1, RI_ALL_ONLINE }, { 0x2b8040, 1, RI_ALL_ONLINE }, - { 0x2b8080, 1, RI_ALL_ONLINE }, { 0x300104, 1, RI_ALL_ONLINE }, - { 0x300114, 1, RI_ALL_ONLINE }, { 0x300124, 1, RI_ALL_ONLINE }, - { 0x300134, 1, RI_ALL_ONLINE }, { 0x30026c, 1, RI_ALL_ONLINE }, - { 0x3002a0, 1, RI_ALL_ONLINE }, { 0x338000, 1, RI_ALL_ONLINE }, - { 0x338040, 1, RI_ALL_ONLINE }, { 0x338080, 1, RI_ALL_ONLINE }, - { 0x3380c0, 1, RI_ALL_ONLINE } -}; - -#define WREGS_COUNT_E1 1 -static const u32 read_reg_e1_0[] = { 0x1b1000 }; - -static const struct wreg_addr wreg_addrs_e1[WREGS_COUNT_E1] = { - { 0x1b0c00, 192, 1, read_reg_e1_0, RI_E1_OFFLINE } -}; - -#define WREGS_COUNT_E1H 1 -static const u32 read_reg_e1h_0[] = { 0x1b1040, 0x1b1000 }; - -static const struct wreg_addr wreg_addrs_e1h[WREGS_COUNT_E1H] = { - { 0x1b0c00, 256, 2, read_reg_e1h_0, RI_E1H_OFFLINE } -}; - -#define WREGS_COUNT_E2 1 -static const u32 read_reg_e2_0[] = { 0x1b1040, 0x1b1000 }; - -static const struct wreg_addr wreg_addrs_e2[WREGS_COUNT_E2] = { - { 0x1b0c00, 128, 2, read_reg_e2_0, RI_E2_OFFLINE } -}; - -static const struct dump_sign dump_sign_all = { 0x4ba11c54, 0x60007, 0x2 }; - -#define TIMER_REGS_COUNT_E1 2 - -static const u32 timer_status_regs_e1[TIMER_REGS_COUNT_E1] = - { 0x164014, 0x164018 }; -static const u32 timer_scan_regs_e1[TIMER_REGS_COUNT_E1] = - { 0x1640d0, 0x1640d4 }; - -#define TIMER_REGS_COUNT_E1H 2 - -static const u32 timer_status_regs_e1h[TIMER_REGS_COUNT_E1H] = - { 0x164014, 0x164018 }; -static const u32 timer_scan_regs_e1h[TIMER_REGS_COUNT_E1H] = - { 0x1640d0, 0x1640d4 }; - -#define TIMER_REGS_COUNT_E2 2 - -static const u32 timer_status_regs_e2[TIMER_REGS_COUNT_E2] = - { 0x164014, 0x164018 }; -static const u32 timer_scan_regs_e2[TIMER_REGS_COUNT_E2] = - { 0x1640d0, 0x1640d4 }; - -#define PAGE_MODE_VALUES_E1 0 - -static const u32 page_vals_e1[] = { 0 }; - -static const u32 page_write_regs_e1[] = { 0 }; - -static const struct reg_addr page_read_regs_e1[] = { { 0x0, 0, RI_E1_ONLINE } }; - -#define PAGE_MODE_VALUES_E1H 0 - -static const u32 page_vals_e1h[] = { 0 }; - -static const u32 page_write_regs_e1h[] = { 0 }; - -static const struct reg_addr page_read_regs_e1h[] = - { { 0x0, 0, RI_E1H_ONLINE } }; +static const struct dump_sign dump_sign_all = { 0x4f0ae30c, 0x70038, 0x3a }; #define PAGE_MODE_VALUES_E2 2 -static const u32 page_vals_e2[] = { 0, 128 }; +#define PAGE_READ_REGS_E2 1 #define PAGE_WRITE_REGS_E2 1 +static const u32 page_vals_e2[] = { 0, 128 }; + static const u32 page_write_regs_e2[] = { 328476 }; -#define PAGE_READ_REGS_E2 1 +static const struct reg_addr page_read_regs_e2[] = { + { 0x58000, 4608, RI_E2_ONLINE } +}; -static const struct reg_addr page_read_regs_e2[] = - { { 0x58000, 4608, RI_E2_ONLINE } }; +#define PAGE_MODE_VALUES_E3 2 + +#define PAGE_READ_REGS_E3 1 + +#define PAGE_WRITE_REGS_E3 1 + +static const u32 page_vals_e3[] = { 0, 128 }; + +static const u32 page_write_regs_e3[] = { 328476 }; + +static const struct reg_addr page_read_regs_e3[] = { + { 0x58000, 4608, RI_E3E3B0_ONLINE } +}; #endif /* BNX2X_DUMP_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.c index aac51bb..8b6a9cc 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.c +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.c @@ -1,9 +1,9 @@ /* bnx2x_esx.c: Broadcom Everest network driver. * - * Copyright 2007-2011 Broadcom Corporation + * Copyright 2008-2013 Broadcom Corporation * - * Portions Copyright (c) VMware, Inc. 2008-2011, All Rights Reserved. - * Copyright (c) 2007-2011 Broadcom Corporation + * Portions Copyright (c) VMware, Inc. 2008-2013, All Rights Reserved. + * Copyright (c) 2007-2013 Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you @@ -34,8 +34,34 @@ #include #include "bnx2x.h" -#include "bnx2x_common.h" +#include "bnx2x_cmn.h" +#include "bnx2x_esx.h" +#include "bnx2x_init.h" +/* empty implementations for thes kernel primitives because they seems to be compiled out */ +inline void local_bh_enable(void) {} +inline void local_bh_disable(void) {} + +#if defined(VMX86_DEBUG) +int psod_on_panic = 1; +#else +int psod_on_panic; +#endif /* VMX86_DEBUG */ +module_param(psod_on_panic, int, 0); +MODULE_PARM_DESC(psod_on_panic, " PSOD on panic"); + +#ifdef BNX2X_NETQ +static int multi_rx_filters = -1; +module_param(multi_rx_filters, int, 0); +MODULE_PARM_DESC(multi_rx_filters, "Define the number of RX filters per " + "NetQueue: (allowed values: -1 to " + "Max # of RX filters per NetQueue, " + "-1: use the default number of RX filters; " + "0: Disable use of multiple RX filters; " + "1..Max # the number of RX filters " + "per NetQueue: will force the number " + "of RX filters to use for NetQueue"); +#endif #ifdef BNX2X_VMWARE_BMAPILNX int @@ -52,8 +78,8 @@ bnx2x_ioctl_cim(struct net_device *dev, struct ifreq *ifr) unsigned long uaddr32 = (unsigned long)useraddr & 0xffffffff; if (copy_from_user(&req, (void __user *)uaddr32, sizeof(req))) { - BNX2X_ERR("%s: bnx2x_ioctl() could not copy from user" - "bnx2x_ioctl_req\n", bp->dev->name); + BNX2X_ERR("%s: bnx2x_ioctl() could not copy from user\n", + bp->dev->name); return -EFAULT; } @@ -79,8 +105,8 @@ bnx2x_ioctl_cim(struct net_device *dev, struct ifreq *ifr) mem_len = pci_resource_len(bp->pdev, 0); if(mem_len < req.cmd_req.reg_read.reg_offset) { BNX2X_ERR("%s: bnx2x_ioctl() reg read: " - "out of range: max reg: 0x%x " - "req reg: 0x%x\n", + "out of range: max reg: 0x%x " + "req reg: 0x%x\n", bp->dev->name, mem_len, req.cmd_req.reg_read.reg_offset); rc = -EINVAL; @@ -90,7 +116,7 @@ bnx2x_ioctl_cim(struct net_device *dev, struct ifreq *ifr) val = REG_RD(bp, req.cmd_req.reg_read.reg_offset); DP(NETIF_MSG_LINK, "%s: bnx2x_ioctl() reg read: " - "reg: 0x%x value:0x%x", + "reg: 0x%x value:0x%x", bp->dev->name, req.cmd_req.reg_read.reg_offset, req.cmd_req.reg_read.reg_value); @@ -111,9 +137,8 @@ bnx2x_ioctl_cim(struct net_device *dev, struct ifreq *ifr) rc = -EINVAL; break; } - DP(NETIF_MSG_LINK, "%s: bnx2x_ioctl() reg write: " - "reg: 0x%x value:0x%x", + "reg: 0x%x value:0x%x", bp->dev->name, req.cmd_req.reg_write.reg_offset, req.cmd_req.reg_write.reg_value); @@ -156,28 +181,98 @@ bnx2x_ioctl_cim(struct net_device *dev, struct ifreq *ifr) #ifdef BNX2X_NETQ -/* handles an sp event specific to a netq. The routine is called for all sp - * events, return 0 if it handled the event, non-zero otherwise - */ -int bnx2x_netq_sp_event(struct bnx2x *bp, struct bnx2x_fastpath *fp, - int cid, int command) -{ - /* The only 'empty ramrod' is sent when clearing the netq rx filter */ - if (command == RAMROD_CMD_ID_ETH_EMPTY) { - DP(BNX2X_MSG_NETQ, "got Empty rmarod. CID %d\n", cid); - fp->netq_filter_event = 0; - return 0; - } - return 1; -} - - /* not including the default queue - qid 0*/ static inline int bnx2x_netq_valid_qid(struct bnx2x *bp, u16 qid) { return ((qid > 0) && (qid <= BNX2X_NUM_NETQUEUES(bp))); } +static int bnx2x_num_active_rx_mac_filters(struct bnx2x_fastpath *fp) + +{ + struct bnx2x *bp = fp->bp; + int i, count = 0; + + for (i = 0; i < bp->number_of_mac_filters; i++) { + if (BNX2X_IS_NETQ_RX_FILTER_ACTIVE(fp, i)) + count++; + } + + return count; +} + +static int bnx2x_is_last_rx_mac_filter(struct bnx2x_fastpath *fp) +{ + return (bnx2x_num_active_rx_mac_filters(fp) == 1 ? 1 : 0); +} + +static void bnx2x_add_rx_mac_entry(struct netq_mac_filter *filter, + u8 *mac) +{ + memcpy(filter->mac, mac, ETH_ALEN); + filter->flags |= BNX2X_NETQ_RX_FILTER_ACTIVE; +} + +static void bnx2x_clear_rx_mac_entry(struct netq_mac_filter *filter) +{ + memset(filter->mac, 0, ETH_ALEN); + filter->flags &= ~BNX2X_NETQ_RX_FILTER_ACTIVE; +} + +static int bnx2x_find_rx_mac_filter_add(struct bnx2x *bp, + struct bnx2x_fastpath *fp, u8 *mac) +{ + int i; + + if (fp->mac_filters == NULL) { + if (bp->number_of_mac_filters == 0) { + DP(BNX2X_MSG_NETQ, "number_of_mac_filters == 0\n"); + return -ENODEV; + } + + fp->mac_filters = kzalloc(sizeof(struct netq_mac_filter) * + bp->number_of_mac_filters, + GFP_ATOMIC); + if (fp->mac_filters == NULL) { + DP(BNX2X_MSG_NETQ, "Failed to allocate " + "RX MAC filter table\n"); + return -ENOMEM; + } + DP(BNX2X_MSG_NETQ, "Allocated RX MAC filter table with %d " + "entries on RX queue %d\n", + bp->number_of_mac_filters, fp->index); + + bnx2x_add_rx_mac_entry(&fp->mac_filters[0], mac); + return 0; + } + + for (i = 0; i < bp->number_of_mac_filters; i++) { + if (!BNX2X_IS_NETQ_RX_FILTER_ACTIVE(fp, i)) { + bnx2x_add_rx_mac_entry(&fp->mac_filters[i], mac); + return i; + } + } + + DP(BNX2X_MSG_NETQ, "RX filters on NetQ RX Queue %d exhausted\n", + fp->index); + return -ENODEV; +} + +static void bnx2x_remove_rx_mac_filter(struct bnx2x *bp, + struct bnx2x_fastpath *fp, u16 fid, + int is_last_mac_filter) +{ + fp->mac_filters[fid].flags &= ~BNX2X_NETQ_RX_FILTER_ACTIVE; + + if (is_last_mac_filter) { + fp->netq_flags &= ~BNX2X_NETQ_RX_QUEUE_ACTIVE; + kfree(fp->mac_filters); + fp->mac_filters = NULL; + + DP(BNX2X_MSG_NETQ, "Freed RX MAC filter table\n"); + } +} + void bnx2x_reserve_netq_feature(struct bnx2x *bp) { int i; @@ -210,6 +305,7 @@ void bnx2x_reserve_netq_feature(struct bnx2x *bp) * already reserved the max number of LRO queues */ DP(BNX2X_MSG_NETQ, "Queue[%d] is non-LRO\n", i); + fp->netq_flags |= BNX2X_NETQ_FP_NONE_RESERVED; fp->disable_tpa = 1; } break; @@ -217,6 +313,7 @@ void bnx2x_reserve_netq_feature(struct bnx2x *bp) default: /* Do not reserve for LRO */ DP(BNX2X_MSG_NETQ, "Queue[%d] is non-LRO\n", i); + fp->netq_flags |= BNX2X_NETQ_FP_NONE_RESERVED; fp->disable_tpa = 1; break; } @@ -253,8 +350,61 @@ static int bnx2x_get_queue_count(vmknetddi_queueop_get_queue_count_args_t *args) static int bnx2x_get_filter_count(vmknetddi_queueop_get_filter_count_args_t *args) { - /* Only support 1 Mac filter per queue */ - args->count = 1; + struct bnx2x *bp; + int total_filters = 0; + + bp = netdev_priv(args->netdev); + + if ((BNX2X_NUM_NETQUEUES(bp) == 0 && !IS_MF_FCOE_AFEX(bp)) || + (BNX2X_NUM_NETQUEUES(bp) == 0 && IS_MF_FCOE_AFEX(bp) && + !BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp))) { + bp->number_of_mac_filters = 0; + args->count = 0; + return VMKNETDDI_QUEUEOPS_OK; + } + + if (multi_rx_filters == 0) { + DP(BNX2X_MSG_NETQ, "Multiple RX filters disabled forced to " + "use only 1 filter.\n"); + bp->number_of_mac_filters = 1; + args->count = 1; + return VMKNETDDI_QUEUEOPS_OK; + } + +#if defined(BNX2X_ESX_CNA) + if (args->netdev->features & NETIF_F_CNA) { + args->count = 2; + return VMKNETDDI_QUEUEOPS_OK; + } +#endif + /* Calculate the number of credits left */ + total_filters = bp->macs_pool.check(&bp->macs_pool); + if (total_filters > 3) + total_filters = total_filters - 3; + else + total_filters = 0; + + DP(BNX2X_MSG_NETQ, "Total Avaiable filters: %d\n", total_filters); + DP(BNX2X_MSG_NETQ, "# NetQueue: %d\n", BNX2X_NUM_NETQUEUES(bp)); + bp->number_of_mac_filters = (total_filters / BNX2X_NUM_NETQUEUES(bp)); + + if (multi_rx_filters > 0) { + if (bp->number_of_mac_filters < multi_rx_filters) + DP(BNX2X_MSG_NETQ, "Forced RX filter setting %d higher " + "then checked value %d\n", + multi_rx_filters, + bp->number_of_mac_filters); + + + bp->number_of_mac_filters = min_t(int, + bp->number_of_mac_filters, + multi_rx_filters); + } + + DP(BNX2X_MSG_NETQ, "NetQueue assigned per filters: %d\n", + bp->number_of_mac_filters); + + args->count = bp->number_of_mac_filters; return VMKNETDDI_QUEUEOPS_OK; } @@ -361,7 +511,7 @@ bnx2x_alloc_rx_queue_with_lro(struct net_device *netdev, return VMKNETDDI_QUEUEOPS_ERR; } - for_each_nondefault_queue(bp, i) { + for_each_net_queue(bp, i) { struct bnx2x_fastpath *fp = &bp->fp[i]; /* if this Rx queue is not used */ if (!BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp) && @@ -371,7 +521,7 @@ bnx2x_alloc_rx_queue_with_lro(struct net_device *netdev, *p_qid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(fp->index); *napi_p = &fp->napi; DP(BNX2X_MSG_NETQ, - "RX NetQ allocated on %d with LRO feature\n", i); + "RX NetQ allocated on %d with LRO feature\n", i); return VMKNETDDI_QUEUEOPS_OK; } } @@ -379,9 +529,14 @@ bnx2x_alloc_rx_queue_with_lro(struct net_device *netdev, return VMKNETDDI_QUEUEOPS_ERR; } +#if (VMWARE_ESX_DDK_VERSION >= 50000) #define BNX2X_NETQ_SUPPORTED_FEATURES \ (VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PAIR | \ ((bp->flags & TPA_ENABLE_FLAG) ? VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO : 0)) +#else +#define BNX2X_NETQ_SUPPORTED_FEATURES \ + ((bp->flags & TPA_ENABLE_FLAG) ? VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO : 0) +#endif /* * bnx2x_alloc_queue_with_attr - Alloc queue with NETQ features. * @@ -456,15 +611,31 @@ bnx2x_get_supported_feature(vmknetddi_queueop_get_sup_feat_args_t *args) struct bnx2x *bp = netdev_priv(args->netdev); args->features = BNX2X_NETQ_SUPPORTED_FEATURES; +#if (VMWARE_ESX_DDK_VERSION >= 50000) DP(BNX2X_MSG_NETQ, "Netq features supported: %s %s %s\n", (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO) ? "LRO" : "", (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PAIR) ? "PAIR" : "", (args->features) ? "" : "NONE" ); +#else + DP(BNX2X_MSG_NETQ, "Netq features supported: %s %s\n", + (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO) ? "LRO" : "", + (args->features) ? "" : "NONE" + ); +#endif return VMKNETDDI_QUEUEOPS_OK; } +#if (VMWARE_ESX_DDK_VERSION >= 50000) +static int +bnx2x_get_supported_filter_class(vmknetddi_queueop_get_sup_filter_class_args_t *args) +{ + args->class = VMKNETDDI_QUEUEOPS_FILTER_MACADDR; + + return VMKNETDDI_QUEUEOPS_OK; +} +#endif #endif static int bnx2x_free_tx_queue(struct net_device *netdev, @@ -472,11 +643,12 @@ static int bnx2x_free_tx_queue(struct net_device *netdev, { struct bnx2x *bp = netdev_priv(netdev); u16 index = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(qid); + struct bnx2x_fastpath *fp; if (!bnx2x_netq_valid_qid(bp, index)) return VMKNETDDI_QUEUEOPS_ERR; - struct bnx2x_fastpath *fp = &bp->fp[index]; + fp = &bp->fp[index]; if (!BNX2X_IS_NETQ_TX_QUEUE_ALLOCATED(fp)) { DP(BNX2X_MSG_NETQ, "NetQ TX Queue %d is not allocated\n", @@ -485,7 +657,8 @@ static int bnx2x_free_tx_queue(struct net_device *netdev, } fp->netq_flags &= ~BNX2X_NETQ_TX_QUEUE_ALLOCATED; - bp->n_tx_queues_allocated--; + if (bp->n_tx_queues_allocated) + bp->n_tx_queues_allocated--; DP(BNX2X_MSG_NETQ, "Free NetQ TX Queue: %x\n", index); @@ -496,7 +669,9 @@ static inline void bnx2x_netq_free_rx_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp) { fp->netq_flags &= ~BNX2X_NETQ_RX_QUEUE_ALLOCATED; - bp->n_rx_queues_allocated--; + + if (bp->n_rx_queues_allocated) + bp->n_rx_queues_allocated--; } static int bnx2x_free_rx_queue(struct net_device *netdev, @@ -504,13 +679,14 @@ static int bnx2x_free_rx_queue(struct net_device *netdev, { struct bnx2x *bp = netdev_priv(netdev); u16 index = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(qid); + struct bnx2x_fastpath *fp; if (!bnx2x_netq_valid_qid(bp, index)) { DP(BNX2X_MSG_NETQ, "NetQ RX Queue %d is invalid\n", index); return VMKNETDDI_QUEUEOPS_ERR; } - struct bnx2x_fastpath *fp = &bp->fp[index]; + fp = &bp->fp[index]; if (!BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp)) { DP(BNX2X_MSG_NETQ, "NetQ RX Queue %d is not allocated\n", @@ -561,7 +737,7 @@ static int bnx2x_get_queue_vector(vmknetddi_queueop_get_queue_vector_args_t *arg * 1 - CNIC fast-path operations (if compiled in) * 2 - Max NetQs - Net-queues starting form the default queue */ - qid += (1 + CNIC_CONTEXT_USE); + qid += (1 + CNIC_PRESENT); args->vector = bp->msix_table[qid].vector; return VMKNETDDI_QUEUEOPS_OK; @@ -595,49 +771,78 @@ static inline int bnx2x_netq_set_mac_one(u8 *mac, struct bnx2x *bp, set_bit(RAMROD_COMP_WAIT, &ramrod_flags); return bnx2x_set_mac_one(bp, mac, &fp->mac_obj, add, - BNX2X_NETQ_ETH_MAC, ramrod_flags); + BNX2X_NETQ_ETH_MAC, &ramrod_flags); } static int bnx2x_netq_remove_rx_filter(struct bnx2x *bp, struct bnx2x_fastpath *fp, u16 fid) { - struct bnx2x_list_elem *first = NULL; unsigned long ramrod_flags = 0; - + struct bnx2x_queue_state_params qstate = {0}; + u8 *macaddr; + int is_last_mac_filter, rc; DECLARE_MAC_BUF(mac); - /* Only support one Mac filter per queue */ - if (fid != 0) { - DP(BNX2X_MSG_NETQ, "Invalid filter id %d\n", fid); + if (fid >= bp->number_of_mac_filters) { + DP(BNX2X_MSG_NETQ, "Couldn't remove invalid RX filter %d " + "on NetQ RX Queue %d\n", fid, fp->index); return VMKNETDDI_QUEUEOPS_ERR; + } else { + if (fp->mac_filters == NULL) { + DP(BNX2X_MSG_NETQ, "Error Freeing RX filter " + "with empty RX MAC filter table\n"); + return VMKNETDDI_QUEUEOPS_ERR; + } + + macaddr = fp->mac_filters[fid].mac; + + DP(BNX2X_MSG_NETQ, "NetQ remove RX filter: queue:%d mac:%s " + "filter id:%d]\n", + fp->index, print_mac(mac, macaddr), fid); } + is_last_mac_filter = bnx2x_is_last_rx_mac_filter(fp); + /* clear MAC */ - first = list_first_entry(&fp->mac_obj.head, - struct bnx2x_list_elem, link); - DP(BNX2X_MSG_NETQ, "remove rx filter %s from queue[%d]\n", - print_mac(mac, first->data.mac.mac), fp->index); - bnx2x_netq_set_mac_one(first->data.mac.mac, bp, fp, 0); /* set to drop-all*/ - set_bit(RAMROD_RX, &ramrod_flags); - set_bit(RAMROD_TX, &ramrod_flags); - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - bnx2x_set_cl_rx_mode(bp, fp->cl_id, 0, 0, ramrod_flags); + if (is_last_mac_filter) { + set_bit(RAMROD_RX, &ramrod_flags); + set_bit(RAMROD_TX, &ramrod_flags); + set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + rc = bnx2x_set_q_rx_mode(bp, fp->cl_id, 0, 0, 0, ramrod_flags); - /* send empty-ramrod to flush packets lurking in the HW */ - fp->netq_filter_event = 1; - bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_EMPTY, fp->cid, 0, fp->cl_id, 0); + if (rc) { + BNX2X_ERR("NetQ could not remove RX filter, " + "rx mode failed: queue:%d mac:%s " + "filter id:%d]\n", + fp->index, print_mac(mac, macaddr), fid); + return VMKNETDDI_QUEUEOPS_ERR; + } + } - /* Wait for completion */ - if(bnx2x_wait_ramrod(bp, 0, fp->index, &fp->netq_filter_event, 0)) { - /* timeout */ - BNX2X_ERR("Remove RX filter for netq %x failed - " - "HW flush timed out\n", fp->index); + /* delete MAC */ + rc = bnx2x_netq_set_mac_one(macaddr, bp, fp, 0); + if (rc) { + BNX2X_ERR("NetQ could not remove RX filter: queue:%d mac:%s " + "filter id:%d]\n", + fp->index, print_mac(mac, macaddr), fid); return VMKNETDDI_QUEUEOPS_ERR; } - fp->netq_flags &= ~BNX2X_NETQ_RX_QUEUE_ACTIVE; + /* send empty-ramrod to flush packets lurking in the HW */ + qstate.q_obj = &fp->q_obj; + ramrod_flags = 0; + set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + qstate.ramrod_flags = ramrod_flags; /* wait for completion */ + qstate.cmd = BNX2X_Q_CMD_EMPTY; + if (bnx2x_queue_state_change(bp, &qstate)) { + BNX2X_ERR("RX %d queue state not changed for fid: %d\n", + fp->index, fid); + return VMKNETDDI_QUEUEOPS_ERR; + } + bnx2x_remove_rx_mac_filter(bp, fp, fid, is_last_mac_filter); + return VMKNETDDI_QUEUEOPS_OK; } @@ -661,7 +866,7 @@ static int bnx2x_remove_rx_filter(vmknetddi_queueop_remove_rx_filter_args_t *arg } /* Verfiy the queue is allocated and has an active filter */ - if (!BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(fp) || + if (!BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(fp) || !BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp)) { DP(BNX2X_MSG_NETQ, "NetQ RX Queue %d is not allocated/active " "0x%x\n", qid, fp->netq_flags); @@ -670,13 +875,12 @@ static int bnx2x_remove_rx_filter(vmknetddi_queueop_remove_rx_filter_args_t *arg /* Do the work */ rc = bnx2x_netq_remove_rx_filter(bp, fp, fid); - if (!rc) - DP(BNX2X_MSG_NETQ, "NetQ remove RX filter: %x\n", qid); + DP(BNX2X_MSG_NETQ, "NetQ %d remove RX filter %d\n", qid, fid); return rc; } - + static int bnx2x_apply_rx_filter(vmknetddi_queueop_apply_rx_filter_args_t *args) { @@ -686,6 +890,7 @@ static int bnx2x_apply_rx_filter(vmknetddi_queueop_apply_rx_filter_args_t *args) u16 qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); u16 vlan_id; unsigned long accept_flags = 0, ramrod_flags = 0; + int filter_id, rc; vmknetddi_queueops_filter_class_t filter; DECLARE_MAC_BUF(mac); @@ -709,31 +914,63 @@ static int bnx2x_apply_rx_filter(vmknetddi_queueop_apply_rx_filter_args_t *args) fp = &bp->fp[qid]; - if (BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(fp) || - !BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp)) + if (!BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp)) { + BNX2X_ERR("Trying to apply filter on non allocated Queue %d\n", + qid); return VMKNETDDI_QUEUEOPS_ERR; + } macaddr = (void *)vmknetddi_queueops_get_filter_macaddr(&args->filter); vlan_id = vmknetddi_queueops_get_filter_vlanid(&args->filter); - /* set to recv-unicast */ - set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags); - set_bit(RAMROD_RX, &ramrod_flags); - set_bit(RAMROD_TX, &ramrod_flags); - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - bnx2x_set_cl_rx_mode(bp, fp->cl_id, 0, accept_flags, ramrod_flags); + filter_id = bnx2x_find_rx_mac_filter_add(bp, fp, macaddr); + if (filter_id < 0) { + BNX2X_ERR("NetQ could not add RX filter, no filters " + "avaliable: queue:%d mac:%s " + "vlan id:%d]\n", + qid, print_mac(mac, macaddr), vlan_id); + return VMKNETDDI_QUEUEOPS_ERR; + } + + if (bnx2x_num_active_rx_mac_filters(fp) == 1) { + /* set to recv-unicast */ + set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); + set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags); + set_bit(RAMROD_RX, &ramrod_flags); + set_bit(RAMROD_TX, &ramrod_flags); + set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + rc = bnx2x_set_q_rx_mode(bp, fp->cl_id, 0, accept_flags, + accept_flags, ramrod_flags); + + if (rc) { + BNX2X_ERR("NetQ could not add RX filter, " + " rx mode failed: queue:%d mac:%s " + "vlan id:%d filter id:%d]\n", + qid, print_mac(mac, macaddr), vlan_id, + filter_id); + return VMKNETDDI_QUEUEOPS_ERR; + } + } /* add MAC */ - bnx2x_netq_set_mac_one(macaddr, bp, fp, 1); + rc = bnx2x_netq_set_mac_one(macaddr, bp, fp, 1); + if (rc) { + BNX2X_ERR("NetQ could not add RX filter: queue:%d mac:%s " + "vlan id:%d filter id:%d]\n", + qid, print_mac(mac, macaddr), vlan_id, filter_id); + bnx2x_clear_rx_mac_entry(&fp->mac_filters[filter_id]); + return VMKNETDDI_QUEUEOPS_ERR; + } fp->netq_flags |= BNX2X_NETQ_RX_QUEUE_ACTIVE; - args->filterid = VMKNETDDI_QUEUEOPS_MK_FILTERID(0); + args->filterid = VMKNETDDI_QUEUEOPS_MK_FILTERID(filter_id); +#if (VMWARE_ESX_DDK_VERSION >= 50000) /* Need by feature: VMKNETDDI_QUEUEOPS_FEATURE_PAIRQUEUE */ args->pairtxqid = qid; - - DP(BNX2X_MSG_NETQ, "NetQ set RX filter: %d [%s %d]\n", - qid, print_mac(mac, macaddr), vlan_id); +#endif + DP(BNX2X_MSG_NETQ, "NetQ set RX filter: queue:%d mac:%s " + "vlan id:%d filter id:%d]\n", + qid, print_mac(mac, macaddr), vlan_id, filter_id); return VMKNETDDI_QUEUEOPS_OK; } @@ -751,15 +988,21 @@ static int bnx2x_get_netqueue_version(vmknetddi_queueop_get_version_args_t *args void bnx2x_netq_clear_rx_queues(struct bnx2x *bp) { - int i; + int i; spin_lock(&bp->netq_lock); for_each_net_queue(bp, i) { struct bnx2x_fastpath *fp = &bp->fp[i]; - if (BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(fp)) - bnx2x_netq_remove_rx_filter(bp, fp, 0); + if (BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(fp)) { + int j; + + for (j = 0; j < bp->number_of_mac_filters; j++) + if (fp->mac_filters != NULL && + BNX2X_IS_NETQ_RX_FILTER_ACTIVE(fp, j)) + bnx2x_netq_remove_rx_filter(bp, fp, j); + } if (BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp)) bnx2x_netq_free_rx_queue(bp, fp); @@ -842,6 +1085,12 @@ int bnx2x_netqueue_ops(vmknetddi_queueops_op_t op, void *args) rc = bnx2x_get_supported_feature( (vmknetddi_queueop_get_sup_feat_args_t *)args); break; +#if (VMWARE_ESX_DDK_VERSION >= 50000) + case VMKNETDDI_QUEUEOPS_OP_GET_SUPPORTED_FILTER_CLASS: + rc = bnx2x_get_supported_filter_class( + (vmknetddi_queueop_get_sup_filter_class_args_t *)args); + break; +#endif #endif default: @@ -856,6 +1105,616 @@ int bnx2x_netqueue_ops(vmknetddi_queueops_op_t op, void *args) #endif /* BNX2X_NETQ */ +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ +static int bnx2x_cna_get_queue_count( + vmknetddi_queueop_get_queue_count_args_t *args) +{ + struct net_device *netdev = args->netdev; + struct bnx2x *bp = netdev->priv; + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + args->count = 2; + return VMKNETDDI_QUEUEOPS_OK; + + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { + args->count = 2; + return VMKNETDDI_QUEUEOPS_OK; + + } else { + DP(BNX2X_MSG_NETQ, "invalid queue type: %x\n", args->type); + return VMKNETDDI_QUEUEOPS_ERR; + } +} +static int bnx2x_cna_alloc_rx_queue(struct net_device *netdev, + vmknetddi_queueops_queueid_t *p_qid, + struct napi_struct **napi_p) +{ + struct bnx2x *bp = netdev->priv; + struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); + + if (!BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp)) { + napi_synchronize(&bnx2x_fcoe(bp, napi)); + + fp->netq_flags |= BNX2X_NETQ_RX_QUEUE_ALLOCATED; + *p_qid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(1); + *napi_p = &fp->napi; + + DP(BNX2X_MSG_NETQ, "RX CNA NetQ allocated on %d\n", 1); + return VMKNETDDI_QUEUEOPS_OK; + } + + DP(BNX2X_MSG_NETQ, "No free CNA rx queues found!\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} + +static int bnx2x_cna_get_filter_count(vmknetddi_queueop_get_filter_count_args_t *args) +{ + args->count = 2; + return VMKNETDDI_QUEUEOPS_OK; +} + +static int bnx2x_cna_alloc_tx_queue(struct net_device *netdev, + vmknetddi_queueops_queueid_t *p_qid, + u16 *queue_mapping) +{ + struct bnx2x *bp = netdev->priv; + struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); + + if (!BNX2X_IS_NETQ_TX_QUEUE_ALLOCATED(fp)) { + fp->netq_flags |= BNX2X_NETQ_TX_QUEUE_ALLOCATED; + + /* TODO determine remapping */ + *p_qid = VMKNETDDI_QUEUEOPS_MK_TX_QUEUEID(1); + *queue_mapping = 1; + + /* Start Tx */ + netif_tx_start_all_queues(netdev); + + DP(BNX2X_MSG_NETQ, "CNA NetQ TX Queue ID %d Mapping: %d\n", + *p_qid, *queue_mapping); + + return VMKNETDDI_QUEUEOPS_OK; + } + + DP(BNX2X_MSG_NETQ, "No free tx queues for CNA device found!\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} + +static int bnx2x_cna_alloc_queue(vmknetddi_queueop_alloc_queue_args_t *args) +{ + struct bnx2x *bp; + + if (args->netdev->features & NETIF_F_CNA) + bp = args->netdev->priv; + else + bp = netdev_priv(args->netdev); + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { + return bnx2x_cna_alloc_tx_queue(args->netdev, &args->queueid, + &args->queue_mapping); + + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + return bnx2x_cna_alloc_rx_queue(args->netdev, &args->queueid, + &args->napi); + } else { + DP(BNX2X_MSG_NETQ, "invalid queue type: %x\n", args->queueid); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + +static int bnx2x_cna_free_tx_queue(struct net_device *netdev, + vmknetddi_queueops_queueid_t qid) +{ + struct bnx2x *bp = netdev->priv; + struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); + + if (!BNX2X_IS_NETQ_TX_QUEUE_ALLOCATED(fp)) { + DP(BNX2X_MSG_NETQ, "CNA NetQ TX Queue is not allocated\n"); + return VMKNETDDI_QUEUEOPS_ERR; + } + + fp->netq_flags &= ~BNX2X_NETQ_TX_QUEUE_ALLOCATED; + + /* Stop TX */ + netif_tx_disable(netdev); + netif_carrier_off(netdev); + + DP(BNX2X_MSG_NETQ, "Free CNA NetQ TX Queue\n"); + + return VMKNETDDI_QUEUEOPS_OK; +} + +static int bnx2x_cna_free_rx_queue(struct net_device *netdev, + vmknetddi_queueops_queueid_t qid) +{ + struct bnx2x *bp = netdev->priv; + u16 index = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(qid); + struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); + + if (!BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp)) { + DP(BNX2X_MSG_NETQ, "CNA NetQ RX Queue is not allocated\n"); + return VMKNETDDI_QUEUEOPS_ERR; + } + + bnx2x_netq_free_rx_queue(bp, fp); + + DP(BNX2X_MSG_NETQ, "Free CNA NetQ RX Queue: %x\n", index); + + return VMKNETDDI_QUEUEOPS_OK; +} + +static int bnx2x_cna_free_queue(vmknetddi_queueop_free_queue_args_t *args) +{ + if (VMKNETDDI_QUEUEOPS_IS_TX_QUEUEID(args->queueid)) + return bnx2x_cna_free_tx_queue(args->netdev, args->queueid); + + else if (VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID(args->queueid)) + return bnx2x_cna_free_rx_queue(args->netdev, args->queueid); + + else { + struct net_device *netdev = args->netdev; + struct bnx2x *bp = netdev_priv(netdev); + + DP(BNX2X_MSG_NETQ, "invalid queue type: %x\n", args->queueid); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + +static int bnx2x_cna_get_queue_vector(vmknetddi_queueop_get_queue_vector_args_t *args) +{ + struct net_device *netdev = args->netdev; + struct bnx2x *bp = netdev->priv; + int qid; + + qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); + + /* may be invoked also for the default queue */ + if (qid > BNX2X_NUM_NETQUEUES(bp)) { + DP(BNX2X_MSG_NETQ, "NetQ Queue %d is invalid\n", qid); + return VMKNETDDI_QUEUEOPS_ERR; + } + + /* + * msix_table indices: + * 0 - default SB (slow-path operations) + * 1 - CNIC fast-path operations (if compiled in) + * 2 - Max NetQs - Net-queues starting form the default queue + */ + qid += (1 + CNIC_PRESENT); + + args->vector = bp->msix_table[qid].vector; + return VMKNETDDI_QUEUEOPS_OK; +} + +static int bnx2x_cna_get_default_queue(vmknetddi_queueop_get_default_queue_args_t *args) +{ + struct bnx2x *bp = args->netdev->priv; + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + args->queueid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(0); + args->napi = &bp->fp[0].napi; + return VMKNETDDI_QUEUEOPS_OK; + + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { + args->queueid = VMKNETDDI_QUEUEOPS_MK_TX_QUEUEID(0); + args->queue_mapping = 0; + return VMKNETDDI_QUEUEOPS_OK; + + } else + return VMKNETDDI_QUEUEOPS_ERR; +} + +static int bnx2x_cna_remove_rx_filter( + vmknetddi_queueop_remove_rx_filter_args_t *args) +{ + struct bnx2x *bp = args->netdev->priv; + u16 qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); + struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); + struct bnx2x_queue_state_params qstate = {0}; + unsigned long sp_bits = 0; + + if (!VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID(args->queueid)) { + BNX2X_ERR("Queue ID %d is not RX queue\n", + args->queueid); + return VMKNETDDI_QUEUEOPS_ERR; + } + + /* Verfiy the queue is allocated and has an active filter */ + if (!BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(fp) || + !BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp)) { + DP(BNX2X_MSG_NETQ, "NetQ RX Queue %d is not allocated/active " + "0x%x\n", qid, fp->netq_flags); + return VMKNETDDI_QUEUEOPS_ERR; + } + + /* Stop receiving */ + netif_addr_lock_bh(bp->dev); + bnx2x_set_fcoe_eth_rx_mode(bp, false); + netif_addr_unlock_bh(bp->dev); + + /* bits to wait on */ + set_bit(BNX2X_FILTER_RX_MODE_PENDING, &sp_bits); + set_bit(BNX2X_FILTER_FCOE_ETH_STOP_SCHED, &sp_bits); + + if (!bnx2x_wait_sp_comp(bp, sp_bits)) { + BNX2X_ERR("rx_mode completion timed out!\n"); + return VMKNETDDI_QUEUEOPS_ERR; + } else { + /* send empty-ramrod to flush packets lurking in the HW */ + qstate.q_obj = &fp->q_obj; + qstate.cmd = BNX2X_Q_CMD_EMPTY; + /* wait for completion */ + set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags); + if (bnx2x_queue_state_change(bp, &qstate)) + return VMKNETDDI_QUEUEOPS_ERR; + } + + DP(BNX2X_MSG_NETQ, "Free CNA NetQ RX Queue: %x\n", qid); + return VMKNETDDI_QUEUEOPS_OK; +} + +static int bnx2x_cna_apply_rx_filter( + vmknetddi_queueop_apply_rx_filter_args_t *args) +{ + struct bnx2x *bp = args->netdev->priv; + struct bnx2x_fastpath *fp; + u16 qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); + unsigned long sp_bits = 0; + + fp = bnx2x_fcoe_fp(bp); + + fp->netq_flags |= BNX2X_NETQ_RX_QUEUE_ACTIVE; + args->filterid = VMKNETDDI_QUEUEOPS_MK_FILTERID(0); + + /* Need by feature: VMKNETDDI_QUEUEOPS_FEATURE_PAIRQUEUE */ + args->pairtxqid = qid; + + /* Start receiving */ + netif_addr_lock_bh(bp->dev); + bnx2x_set_fcoe_eth_rx_mode(bp, true); + netif_addr_unlock_bh(bp->dev); + + /* bits to wait on */ + set_bit(BNX2X_FILTER_RX_MODE_PENDING, &sp_bits); + set_bit(BNX2X_FILTER_FCOE_ETH_START_SCHED, &sp_bits); + + if (!bnx2x_wait_sp_comp(bp, sp_bits)) + BNX2X_ERR("rx_mode completion timed out!\n"); + + DP(BNX2X_MSG_NETQ, "NetQ set CNA RX filter\n"); + + return VMKNETDDI_QUEUEOPS_OK; +} + +int bnx2x_cna_netqueue_ops(vmknetddi_queueops_op_t op, void *args) +{ + vmknetddi_queueop_get_queue_count_args_t *p; + struct bnx2x *bp; + int rc = VMKNETDDI_QUEUEOPS_ERR; + + if (op == VMKNETDDI_QUEUEOPS_OP_GET_VERSION) + return bnx2x_get_netqueue_version( + (vmknetddi_queueop_get_version_args_t *)args); + else if (op == VMKNETDDI_QUEUEOPS_OP_GET_FEATURES) + return bnx2x_get_netqueue_features( + (vmknetddi_queueop_get_features_args_t *)args); + + p = (vmknetddi_queueop_get_queue_count_args_t *)args; + + bp = p->netdev->priv; + + spin_lock(&bp->netq_lock); + + switch (op) { + case VMKNETDDI_QUEUEOPS_OP_GET_QUEUE_COUNT: + rc = bnx2x_cna_get_queue_count( + (vmknetddi_queueop_get_queue_count_args_t *)args); + break; + + case VMKNETDDI_QUEUEOPS_OP_GET_FILTER_COUNT: + rc = bnx2x_cna_get_filter_count( + (vmknetddi_queueop_get_filter_count_args_t *)args); + break; + + case VMKNETDDI_QUEUEOPS_OP_ALLOC_QUEUE: + rc = bnx2x_cna_alloc_queue( + (vmknetddi_queueop_alloc_queue_args_t *)args); + break; + + case VMKNETDDI_QUEUEOPS_OP_FREE_QUEUE: + rc = bnx2x_cna_free_queue( + (vmknetddi_queueop_free_queue_args_t *)args); + break; + + case VMKNETDDI_QUEUEOPS_OP_GET_QUEUE_VECTOR: + rc = bnx2x_cna_get_queue_vector( + (vmknetddi_queueop_get_queue_vector_args_t *)args); + break; + + case VMKNETDDI_QUEUEOPS_OP_GET_DEFAULT_QUEUE: + rc = bnx2x_cna_get_default_queue( + (vmknetddi_queueop_get_default_queue_args_t *)args); + break; + + case VMKNETDDI_QUEUEOPS_OP_APPLY_RX_FILTER: + rc = bnx2x_cna_apply_rx_filter( + (vmknetddi_queueop_apply_rx_filter_args_t *)args); + break; + + case VMKNETDDI_QUEUEOPS_OP_REMOVE_RX_FILTER: + rc = bnx2x_cna_remove_rx_filter( + (vmknetddi_queueop_remove_rx_filter_args_t *)args); + break; + + case VMKNETDDI_QUEUEOPS_OP_GET_STATS: + rc = bnx2x_get_queue_stats( + (vmknetddi_queueop_get_stats_args_t *)args); + break; + +#if (VMWARE_ESX_DDK_VERSION >= 41000) + case VMKNETDDI_QUEUEOPS_OP_ALLOC_QUEUE_WITH_ATTR: + rc = VMKNETDDI_QUEUEOPS_ERR; + break; + + case VMKNETDDI_QUEUEOPS_OP_GET_SUPPORTED_FEAT: + rc = bnx2x_get_supported_feature( + (vmknetddi_queueop_get_sup_feat_args_t *)args); + break; + + +#endif + + default: + printk(KERN_WARNING "Unhandled NETQUEUE OP %d\n", op); + rc = VMKNETDDI_QUEUEOPS_ERR; + } + + spin_unlock(&bp->netq_lock); + + return rc; +} +/* CNA related */ +static int bnx2x_cna_open(struct net_device *cnadev) +{ + struct bnx2x *bp = cnadev->priv; + strcpy(cnadev->name, bp->dev->name); + + netif_set_poll_cna(&bnx2x_fcoe(bp, napi)); + + vmknetddi_queueops_invalidate_state(cnadev); + + if (BNX2X_IS_NETQ_TX_QUEUE_ALLOCATED(bnx2x_fcoe_fp(bp))) + netif_tx_start_all_queues(cnadev); + + DP(NETIF_MSG_PROBE, "CNA pseudo device opened %s\n", cnadev->name); + return 0; +} + +static int bnx2x_cna_close(struct net_device *cnadev) +{ + struct bnx2x *bp = cnadev->priv; + + netif_tx_disable(cnadev); + netif_carrier_off(cnadev); + + DP(NETIF_MSG_PROBE, "CNA pseudo device closed %s\n", cnadev->name); + return 0; +} + +static int bnx2x_cna_change_mtu(struct net_device *cnadev, int new_mtu) +{ + struct bnx2x *bp = cnadev->priv; + + if (cnadev->mtu == new_mtu) + return 0; + + if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) || + ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE)) + return -EINVAL; + + + + DP(BNX2X_MSG_SP, "changing MTU from %d to %d\n", + cnadev->mtu, new_mtu); + + /* must set new MTU before calling down or up */ + cnadev->mtu = new_mtu; + + return dev_close(cnadev) || dev_open(cnadev); +} + +static inline int bnx2x_cna_set_vlan_stripping(struct bnx2x *bp, bool set) +{ + struct bnx2x_queue_state_params q_params = {0}; + struct bnx2x_queue_update_params *update_params = + &q_params.params.update; + int rc; + struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); + + /* We want to wait for completion in this context */ + set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags); + + /* Set the command */ + q_params.cmd = BNX2X_Q_CMD_UPDATE; + + /* Enable VLAN stripping if requested */ + if (set) + set_bit(BNX2X_Q_UPDATE_IN_VLAN_REM, + &update_params->update_flags); + + /* Indicate that VLAN stripping configuration has changed */ + set_bit(BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG, &update_params->update_flags); + + /* Set the appropriate Queue object */ + q_params.q_obj = &fp->q_obj; + + /* Update the Queue state */ + rc = bnx2x_queue_state_change(bp, &q_params); + if (rc) { + BNX2X_ERR("Failed to configure VLAN stripping " + "for CNA FCoE ring\n"); + return rc; + } + + return 0; +} + +/* called with rtnl_lock */ +static void bnx2x_cna_vlan_rx_register(struct net_device *dev, + struct vlan_group *vlgrp) +{ + struct bnx2x *bp = dev->priv; + int rc; + + /* Configure VLAN stripping if NIC is up. + * Otherwise just set the bp->vlgrp and stripping will be + * configured in bnx2x_nic_load(). + */ + if (bp->state == BNX2X_STATE_OPEN) { + if (vlgrp != NULL) { + rc = bnx2x_cna_set_vlan_stripping(bp, true); + + /* If we failed to configure VLAN stripping we don't + * want to use HW accelerated flow in bnx2x_rx_int(). + * Thus we will leave bp->vlgrp to be equal to NULL to + * disable it. + */ + if (rc) { + netdev_err(dev, "Failed to set HW " + "VLAN stripping for a CNA " + "device\n"); + bnx2x_cna_set_vlan_stripping(bp, false); + } else + bp->cna_vlgrp = vlgrp; + } else { + rc = bnx2x_cna_set_vlan_stripping(bp, false); + + if (rc) + netdev_err(dev, "Failed to clear HW " + "VLAN strippingfor a CNA " + "device\n"); + + bp->cna_vlgrp = NULL; + } + } else + bp->cna_vlgrp = vlgrp; +} + +static void bnx2x_cna_vlan_rx_add_vid(struct net_device *dev, uint16_t vid) +{ + struct bnx2x *bp = dev->priv; + + if (bp->cna_vlgrp) + vlan_group_set_device(bp->cna_vlgrp, vid, dev); +} + +static void bnx2x_cna_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid) +{ + struct bnx2x *bp = dev->priv; + + if (bp->cna_vlgrp) + vlan_group_set_device(bp->cna_vlgrp, vid, NULL); +} + +/* TODO: think of a better name */ +int bnx2x_cna_enable(struct bnx2x *bp, int tx_count, int rx_count) +{ + struct net_device *cnadev; + struct net_device *netdev; + int err; + + //u16 device_caps; + if (NO_FCOE(bp)) + return -EINVAL; + + bp->flags |= CNA_ENABLED; + + netdev = bp->dev; + + /** + * Oppositely to regular net device, CNA device doesn't have + * a private allocated region as we don't want to duplicate + * bnx2x information. Though, the CNA device still need + * to access the bnx2x if FP. Thereby, cnadev->priv needs to + * point to netdev->priv. + */ + cnadev = alloc_etherdev_mqs(0, tx_count, rx_count); + if (!cnadev) { + err = -ENOMEM; + goto err_alloc_etherdev; + } + bp->cnadev = cnadev; + + cnadev->priv = bp; + + cnadev->open = &bnx2x_cna_open; + cnadev->stop = &bnx2x_cna_close; + cnadev->change_mtu = &bnx2x_cna_change_mtu; + cnadev->do_ioctl = netdev->do_ioctl; + cnadev->hard_start_xmit = netdev->hard_start_xmit; +#ifdef NETIF_F_HW_VLAN_TX + cnadev->vlan_rx_register = bnx2x_cna_vlan_rx_register; + cnadev->vlan_rx_add_vid = bnx2x_cna_vlan_rx_add_vid; + cnadev->vlan_rx_kill_vid = bnx2x_cna_vlan_rx_kill_vid; +#endif + bnx2x_set_ethtool_ops(cnadev); + +#ifdef CONFIG_DCB + cnadev->dcbnl_ops = netdev->dcbnl_ops; +#endif + + cnadev->mtu = netdev->mtu; + cnadev->pdev = netdev->pdev; + cnadev->gso_max_size = GSO_MAX_SIZE; + cnadev->features = netdev->features | NETIF_F_HWDCB | NETIF_F_CNA | + NETIF_F_HW_VLAN_FILTER; + + /* set the MAC address to SAN mac address */ + memcpy(cnadev->dev_addr, bp->fip_mac, ETH_ALEN); + + netif_carrier_off(cnadev); + netif_tx_stop_all_queues(cnadev); + + VMKNETDDI_REGISTER_QUEUEOPS(cnadev, bnx2x_cna_netqueue_ops); + + netif_napi_add(bp->cnadev, &bnx2x_fp(bp, FCOE_IDX, napi), + bnx2x_poll, BNX2X_NAPI_WEIGHT); + + err = register_netdev(cnadev); + if (err) + goto err_register; + + DP(NETIF_MSG_PROBE, "CNA pseudo device registered %s\n", netdev->name); + + return err; + +err_register: + DP(NETIF_MSG_PROBE, "CNA pseudo device cannot be registered %s\n", + netdev->name); + free_netdev(cnadev); +err_alloc_etherdev: + DP(NETIF_MSG_PROBE, "CNA cannot be enabled on %s\n", netdev->name); + bp->flags &= ~CNA_ENABLED; + return err; +} + +void bnx2x_cna_disable(struct bnx2x *bp) +{ + struct net_device *cnadev = bp->cnadev; + + if (bp->flags & CNA_ENABLED) { + bp->flags &= ~CNA_ENABLED; + unregister_netdev(cnadev); + DP(NETIF_MSG_PROBE, "CNA pseudo device unregistered %s\n", + cnadev->name); + + free_netdev(cnadev); + bp->cnadev = NULL; + } +} +#endif +/*******************/ + /* * NPA - Pass-Through @@ -866,12 +1725,15 @@ int bnx2x_netqueue_ops(vmknetddi_queueops_op_t op, void *args) #include #include -#include "bnx2x_vf.h" +#include "bnx2x_sriov.h" #define BNX2X_UNREFERENCED(x) (void)(x) -#define VMK_RET(rc) (((rc) == VF_API_SUCCESS) ? VMK_OK : VMK_FAILURE) #define ENABLE_STR(en) ((en) ? "enable" : "disable") +#define VMK_RET(rc) \ + ((rc == 0) ? VMK_OK : \ + (rc == -ENOMEM) ? VMK_NO_MEMORY : \ + VMK_FAILURE) /* useful wrappers */ inline int @@ -901,8 +1763,8 @@ bnx2x_vmk_pci_read_config_byte(vmk_PCIDevice dev, vmk_uint16 offset, vmk_uint8 *val) { vmk_uint32 val32; - VMK_ReturnStatus vmkRet = vmk_PCIReadConfigSpace(dev, VMK_ACCESS_8, - offset, &val32); + VMK_ReturnStatus vmkRet = vmk_PCIReadConfig(dev, VMK_PCI_CONFIG_ACCESS_8, + offset, &val32); *val = (vmk_uint8)val32; return vmkRet; @@ -913,8 +1775,8 @@ bnx2x_vmk_pci_read_config_word(vmk_PCIDevice dev, vmk_uint16 offset, vmk_uint16 *val) { vmk_uint32 val32; - VMK_ReturnStatus vmkRet = vmk_PCIReadConfigSpace(dev, VMK_ACCESS_16, - offset, &val32); + VMK_ReturnStatus vmkRet = vmk_PCIReadConfig(dev, VMK_PCI_CONFIG_ACCESS_16, + offset, &val32); *val = (vmk_uint16)val32; return vmkRet; @@ -924,7 +1786,7 @@ inline int bnx2x_vmk_pci_read_config_dword(vmk_PCIDevice dev, vmk_uint16 offset, vmk_uint32 *val) { - return vmk_PCIReadConfigSpace(dev, VMK_ACCESS_32, offset, val); + return vmk_PCIReadConfig(dev, VMK_PCI_CONFIG_ACCESS_32, offset, val); } /* Must be called only after VF-Enable*/ @@ -967,7 +1829,7 @@ bnx2x_vmk_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf) -#if VMKLNX_DDI_VERSION >= VMKLNX_MAKE_VERSION(9, 2, 0 ,0) +#if VMKLNX_DDI_VERSION >= VMKLNX_MAKE_VERSION(9, 2, 0, 0) /*#if VMKLNX_DDI_VERSION >= VMKLNX_MAKE_VERSION(10, 0)*/ pdev = pci_find_slot(seg, bus, PCI_DEVFN(slot, func)); #else @@ -975,18 +1837,18 @@ bnx2x_vmk_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf) #endif if (!pdev) { - printk("Cannot get pci_dev of VF %d.\n", vf->abs_vfid); + printk(KERN_ERR"Cannot get pci_dev of VF %d.\n", vf->abs_vfid); return; } - for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i+=2, n++) { + for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) { vf->bars[n].bar = pci_resource_start(pdev, i); vf->bars[n].size = pci_resource_len(pdev, i); } } -#define PCI_SRIOV_CAP_POS_E2 0x1c0 +#define PCI_SRIOV_CAP_POS_E2 0x1c0 void bnx2x_vmk_get_sriov_cap_pos(struct bnx2x *bp, vmk_uint16 *pos) @@ -1003,7 +1865,6 @@ struct bnx2x_virtf *vf_by_vmkVFID(struct bnx2x *bp, vmk_VFID vmkVf) return (vmkVf < BNX2X_NR_VIRTFN(bp) ? BP_VF(bp, vmkVf) : NULL); } - #ifdef BNX2X_PASSTHRU // --------------------------------------------------------------------------- // @@ -1041,7 +1902,7 @@ bnx2x_pt_vf_acquire(struct net_device *netdev, vmk_NetVFRequirements *props, resc.num_mc_filters = 0; resc.num_vlan_filters = 0; - if(bnx2x_vf_acquire(bp, vf, &resc) != VF_API_SUCCESS) { + if (bnx2x_vf_acquire(bp, vf, &resc)) { BNX2X_ERR("VF[%d] - Failed to provision resources, rxqs=%d, txqs=%d, intr=%d\n", vf->abs_vfid, props->numRxQueues, @@ -1052,15 +1913,13 @@ bnx2x_pt_vf_acquire(struct net_device *netdev, vmk_NetVFRequirements *props, *vmkVf = i; - /* + /** * set the identity mapping between queues and SBs * (must be done prior to get_info) */ - for_each_vf_rxq(vf, i) { - bnx2x_vf_rxq(vf, i, sb_idx) = i; - if (i < vf->txq_count) - bnx2x_vf_txq(vf, i, sb_idx) = i; - } + for_each_vfq(vf, i) + bnx2x_vfq(vf, i, sb_idx) = i; + /* * save features and MTU to be set on a per queue basis later @@ -1070,30 +1929,43 @@ bnx2x_pt_vf_acquire(struct net_device *netdev, vmk_NetVFRequirements *props, vf->queue_flags = 0; if ((props->features | props->optFeatures) & VMK_NETVF_F_RXVLAN) - set_bit(BNX2X_QUEUE_FLG_VLAN, &vf->queue_flags); + set_bit(BNX2X_Q_FLG_VLAN, &vf->queue_flags); if ((props->features | props->optFeatures) & VMK_NETVF_F_LRO) - set_bit(BNX2X_QUEUE_FLG_TPA, &vf->queue_flags); + set_bit(BNX2X_Q_FLG_TPA, &vf->queue_flags); + +#ifdef BNX2X_PASSTHRU_NO_BC_FLR + if (BP_NOMCP(bp)) + mod_timer(&bp->vfdb->flr_timer, jiffies + HZ/100); +#endif + return VMK_OK; } - static int bnx2x_pt_vf_init(struct net_device *netdev, vmk_VFID vmkVf, vmk_NetVFParameters *params) { struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); + struct bnx2x_vfop_cmd cmd = { + .done = NULL, + .block = true, + }; u64 *sb_map; - vf_api_t rc; - int i; + int i, rc; DP(BNX2X_MSG_IOV, "VF index %d\n", vmkVf); + /* sanity */ if (!vf || vf->state != VF_ACQUIRED) return VMK_BAD_PARAM; /* initialize function */ +#ifdef BNX2X_PASSTHRU_NO_BC_FLR + if (BP_NOMCP(bp)) + mod_timer(&bp->vfdb->flr_timer, jiffies + HZ/100); +#endif /* verify shared region and save plugin stats pointer */ if (!params->u.npa.sharedRegion || params->u.npa.sharedRegionLength < @@ -1106,7 +1978,7 @@ bnx2x_pt_vf_init(struct net_device *netdev, vmk_VFID vmkVf, memset((u8*)vf->plugin_stats, 0, sizeof(struct bnx2x_vf_plugin_stats)); /* set GPA of sbs */ - sb_map = kzalloc(sizeof(*sb_map) * vf->sb_count, GFP_ATOMIC); + sb_map = kzalloc(sizeof(*sb_map) * sb_count(vf), GFP_ATOMIC); if (!sb_map) return VMK_NO_MEMORY; @@ -1116,113 +1988,160 @@ bnx2x_pt_vf_init(struct net_device *netdev, vmk_VFID vmkVf, DP(BNX2X_MSG_IOV, "VF[%d], SB[%d] - map 0x%llx, igu %d, fw %d " "hc %d, mod-level %d\n", vf->abs_vfid, i, sb_map[i], - __vf_igu_sb(vf, i), - __vf_fw_sb(vf, i), - __vf_hc_qzone(vf, i), - params->u.npa.intr[i].intrMod.modLevel); + vf_igu_sb(vf,i), + vf_fw_sb(vf,i), + vf_hc_qzone(vf,i), + params->u.npa.intr[i].modLevel); } rc = bnx2x_vf_init(bp, vf, sb_map); kfree(sb_map); - if (rc != VF_API_SUCCESS) + if (rc) goto vf_init_error; /* queues */ - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - struct bnx2x_client_init_params initp = {{0}}; + for_each_vfq(vf, i) { + struct bnx2x_vf_queue *q = vfq_get(vf,i); struct bnx2xpi_txrx_params txrxp = {{0}}; + struct bnx2x_queue_setup_params *setup_p; + struct bnx2x_queue_init_params *init_p; + unsigned long q_type = 0, q_flags = 0; - txrxp.rx.base = params->u.npa.rxQueues[i].basePA; - txrxp.rx.nr_desc = params->u.npa.rxQueues[i].size; - txrxp.rx.byte_len = params->u.npa.rxQueues[i].length; + /** + * reinit the VF operation context + */ + memset(&vf->op_params.qctor, 0 , sizeof(vf->op_params.qctor)); + setup_p = &vf->op_params.qctor.prep_qsetup; + init_p = &vf->op_params.qctor.qstate.params.init; - DP(BNX2X_MSG_IOV, "VF[%d], RXQ[%d] - base 0x%llx, nr_desc %d, len %d\n", - vf->abs_vfid, - rxq->index, - txrxp.rx.base, - txrxp.rx.nr_desc, - txrxp.rx.byte_len); + /* prepare flags */ + q_flags = vf->queue_flags; + __set_bit(BNX2X_Q_FLG_HC, &q_flags); + __set_bit(BNX2X_Q_FLG_STATS, &q_flags); + if (IS_MF_SD(bp)) + __set_bit(BNX2X_Q_FLG_OV, &q_flags); + /* TXQ */ + if (i < txq_count(vf)) { + struct bnx2x_txq_setup_params *txq_params = + &setup_p->txq_params; - /* first txq - rx queue count >= tx queue count */ - if (i < vf->txq_count) { - struct bnx2x_vfq *txq = VF_TXQ(vf, i); - + set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type); txrxp.tx.base = params->u.npa.txQueues[i].basePA; txrxp.tx.nr_desc = params->u.npa.txQueues[i].size; txrxp.tx.byte_len = params->u.npa.txQueues[i].length; - DP(BNX2X_MSG_IOV, "VF[%d], TXQ[%d] - base 0x%llx, nr_desc %d, len %d\n", + DP(BNX2X_MSG_IOV, "VF[%d], TXQ[%d] - base 0x%llx, " + "nr_desc %d, len %d\n", vf->abs_vfid, - txq->index, + q->index, txrxp.tx.base, txrxp.tx.nr_desc, txrxp.tx.byte_len); - /* prepare txq init parameters */ - initp.txq_params.flags = 0; - initp.txq_params.dscr_map = bnx2xpi_tx_decr_offset(&txrxp); - initp.txq_params.sb_cq_index = PLUGIN_SB_ETH_TX_CQ_INDEX; - initp.txq_params.hc_rate = 20000; /* intr p/s default */ - initp.txq_params.traffic_type = LLFC_TRAFFIC_TYPE_NW; - bnx2x_vf_txq_setup(bp, vf, txq, &initp); + + /* tx init */ + init_p->tx.hc_rate = 20000; /* intr p/s default */ + init_p->tx.sb_cq_index = PLUGIN_SB_ETH_TX_CQ_INDEX; + init_p->tx.flags = q_flags; + + /* tx setup flags */ + setup_p->flags = q_flags; + + /* tx setup general - nothing */ + + /** + * TODO: We need to add the mtu for txq as well + */ + + /* tx setup tx */ + txq_params->dscr_map = bnx2xpi_tx_decr_offset(&txrxp); + txq_params->sb_cq_index = PLUGIN_SB_ETH_TX_CQ_INDEX; + txq_params->traffic_type = LLFC_TRAFFIC_TYPE_NW; + + bnx2x_vfop_qctor_dump_tx(bp, vf, init_p, setup_p, + q->index, q->sb_idx); } - /* prepare rxq init parameters */ - initp.rxq_params.flags = vf->queue_flags; - set_bit(BNX2X_QUEUE_FLG_STATS, &initp.rxq_params.flags); + /* RXQ */ + if (i < rxq_count(vf)) { + struct bnx2x_rxq_setup_params *rxq_params = + &setup_p->rxq_params; - initp.rxq_params.dscr_map = bnx2xpi_rx_decr_offset(&txrxp); - initp.rxq_params.sge_map = bnx2xpi_sge_offset(&txrxp); - initp.rxq_params.rcq_map = bnx2xpi_rcq_offset(&txrxp); - initp.rxq_params.rcq_np_map = bnx2xpi_rcq_np_offset(&txrxp); - initp.rxq_params.mtu = vf->mtu; - initp.rxq_params.buf_sz = SHELL_SMALL_RECV_BUFFER_SIZE - - PLUGIN_RX_ALIGN - BNX2X_FW_IP_HDR_ALIGN_PAD; - initp.rxq_params.cache_line_log = PLUGIN_RX_ALIGN_SHIFT; - initp.rxq_params.sb_cq_index = PLUGIN_SB_ETH_RX_CQ_INDEX; - initp.rxq_params.stat_id = vfq_cl_id(vf, rxq); - initp.rxq_params.hc_rate = 40000; /* intr p/s default */ - if (test_bit(BNX2X_QUEUE_FLG_TPA, &vf->queue_flags)) { - initp.rxq_params.tpa_agg_sz = min_t(u32, PLUGIN_MAX_SGES * SHELL_LARGE_RECV_BUFFER_SIZE, 0xffff); - initp.rxq_params.max_sges_pkt = DIV_ROUND_UP(vf->mtu, SHELL_LARGE_RECV_BUFFER_SIZE); - initp.rxq_params.sge_buf_sz = min_t(u32, SHELL_LARGE_RECV_BUFFER_SIZE, 0xffff); + set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type); + txrxp.rx.base = params->u.npa.rxQueues[i].basePA; + txrxp.rx.nr_desc = params->u.npa.rxQueues[i].size; + txrxp.rx.byte_len = params->u.npa.rxQueues[i].length; + + DP(BNX2X_MSG_IOV, "VF[%d], RXQ[%d] - base 0x%llx, " + "nr_desc %d, len %d\n", + vf->abs_vfid, + q->index, + txrxp.rx.base, + txrxp.rx.nr_desc, + txrxp.rx.byte_len); + + /* rx init */ + init_p->rx.hc_rate = 40000; /* intr p/s default */ + init_p->rx.sb_cq_index = PLUGIN_SB_ETH_RX_CQ_INDEX; + init_p->rx.flags = q_flags; + + /* rx setup flags */ + setup_p->flags = q_flags; + + /* rx setup general */ + setup_p->gen_params.mtu = vf->mtu; + + /* rx setup rx */ + rxq_params->drop_flags = 0; + rxq_params->dscr_map = bnx2xpi_rx_decr_offset(&txrxp); + rxq_params->sge_map = bnx2xpi_sge_offset(&txrxp); + rxq_params->rcq_map = bnx2xpi_rcq_offset(&txrxp); + rxq_params->rcq_np_map = bnx2xpi_rcq_np_offset(&txrxp); + rxq_params->buf_sz = SHELL_SMALL_RECV_BUFFER_SIZE - + PLUGIN_RX_ALIGN - IP_HEADER_ALIGNMENT_PADDING; + rxq_params->cache_line_log = PLUGIN_RX_ALIGN_SHIFT; + rxq_params->sb_cq_index = PLUGIN_SB_ETH_RX_CQ_INDEX; + + if (test_bit(BNX2X_Q_FLG_TPA, &vf->queue_flags)) { + rxq_params->tpa_agg_sz = + min_t(u32, + PLUGIN_MAX_SGES * + SHELL_LARGE_RECV_BUFFER_SIZE, + 0xffff); + + rxq_params->max_sges_pkt = DIV_ROUND_UP( + vf->mtu, SHELL_LARGE_RECV_BUFFER_SIZE); + + rxq_params->sge_buf_sz = + min_t(u32, + SHELL_LARGE_RECV_BUFFER_SIZE, + 0xffff); + } + bnx2x_vfop_qctor_dump_rx(bp, vf, init_p, setup_p, + q->index, q->sb_idx); } - DP(BNX2X_MSG_IOV, "VF[%d:%d] offsets - tx 0x%llx, rx 0x%llx, " - "rcq 0x%llx, rcq-np 0x%llx, sge 0x%llx\n", - vf->abs_vfid, - rxq->index, - initp.txq_params.dscr_map, - initp.rxq_params.dscr_map, - initp.rxq_params.rcq_map, - initp.rxq_params.rcq_np_map, - initp.rxq_params.sge_map); + /* complete the prepareations */ + bnx2x_vfop_qctor_prep(bp, vf, q, &vf->op_params.qctor, q_type); - DP(BNX2X_MSG_IOV, "VF[%d:%d] rx flags 0x%lx, tx flags 0x%lx\n", - vf->abs_vfid, rxq->index, - initp.rxq_params.flags, initp.txq_params.flags); - - if (bnx2x_vf_rxq_setup(bp, vf, rxq, &initp, 0)) + /* invoke setup operation - blocking */ + DP(BNX2X_MSG_IOV, "VFQ SETUP[%d:%d]\n", vf->abs_vfid, i); + if (bnx2x_vfop_qsetup_cmd(bp, vf, &cmd, i)) goto vf_init_error; - storm_memset_rcq_np(bp, initp.rxq_params.rcq_np_map, - vfq_cl_id(vf, rxq)); - - /* add vlan 0 and mark as 'untagged' */ - if (VF_IS_LEADING_RXQ(rxq)) { - unsigned long ramrod_flags = 0; - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - bnx2x_vf_set_vlan(bp, rxq, 0, true, ramrod_flags); - } + /** + * set the next-page directly in the storm RAM. + */ + storm_memset_rcq_np(bp, setup_p->rxq_params.rcq_np_map, + vfq_cl_id(vf,q)); } return VMK_OK; vf_init_error: - /* release the VF */ - bnx2x_vf_release(bp, vf); + /* release the VF (blocking) */ + bnx2x_vf_release(bp, vf, true); return VMK_FAILURE; } @@ -1239,7 +2158,7 @@ bnx2x_pt_vf_release(struct net_device *netdev, vmk_VFID vmkVf) if (!vf) return VMK_BAD_PARAM; - bnx2x_vf_release(bp, vf); + bnx2x_vf_release(bp, vf, true); /* blocking */ return VMK_OK; } @@ -1298,18 +2217,18 @@ bnx2x_pt_vf_get_info(struct net_device *netdev, vmk_VFID vmkVf, memset(info->u.npa.pluginData, 0, sizeof (info->u.npa.pluginData)); plugin_data = (struct bnx2x_plugin_device_info *)(info->u.npa.pluginData); - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - plugin_data->sb_info[i].sb_qid = vfq_qzone_id(vf, rxq); - plugin_data->sb_info[i].hw_sb_id = vfq_igu_sb_id(vf ,rxq); - plugin_data->hw_qid[i] = vfq_qzone_id(vf, rxq); + for_each_vfq(vf, i) { + struct bnx2x_vf_queue *q = vfq_get(vf, i); + plugin_data->sb_info[i].sb_qid = vfq_qzone_id(vf, q); + plugin_data->sb_info[i].hw_sb_id = vf_igu_sb(vf ,q->sb_idx); + plugin_data->hw_qid[i] = vfq_qzone_id(vf, q); } plugin_data->chip_id = bp->common.chip_id; plugin_data->pci_func = bp->pf_num; plugin_data->fp_flags = BNX2X_PLUGIN_SHARED_SB_IDX; - plugin_data->fp_flags |= test_bit(BNX2X_QUEUE_FLG_TPA, &vf->queue_flags) ? + plugin_data->fp_flags |= test_bit(BNX2X_Q_FLG_TPA, &vf->queue_flags) ? 0 : BNX2X_PLUGIN_DISABLE_TPA; return VMK_OK; @@ -1320,6 +2239,7 @@ bnx2x_pt_vf_quiesce(struct net_device *netdev, vmk_VFID vmkVf) { struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); + struct bnx2x_vfop_cmd cmd; DP(BNX2X_MSG_IOV, "Invoked\n"); @@ -1327,11 +2247,13 @@ bnx2x_pt_vf_quiesce(struct net_device *netdev, vmk_VFID vmkVf) if (!vf) return VMK_BAD_PARAM; - /* quiesxce only if vf is enabled otherwise exit gracefully */ + /* quiesce only if vf is enabled otherwise exit gracefully */ if (vf->state != VF_ENABLED) return VMK_OK; - return (VMK_RET(bnx2x_vf_trigger(bp, vf, false))); + cmd.done = NULL; + cmd.block = true; + return VMK_RET(bnx2x_vfop_trigger_cmd(bp, vf, &cmd, false)); } static int @@ -1339,6 +2261,7 @@ bnx2x_pt_vf_activate(struct net_device *netdev, vmk_VFID vmkVf) { struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); + struct bnx2x_vfop_cmd cmd; DP(BNX2X_MSG_IOV, "Invoked\n"); @@ -1346,18 +2269,20 @@ bnx2x_pt_vf_activate(struct net_device *netdev, vmk_VFID vmkVf) if (!vf || vf->state != VF_ENABLED) return VMK_BAD_PARAM; - return (VMK_RET(bnx2x_vf_trigger(bp, vf, true))); + cmd.done = NULL; + cmd.block = true; + return VMK_RET(bnx2x_vfop_trigger_cmd(bp, vf, &cmd, true)); } + static int bnx2x_pt_vf_set_mac(struct net_device *netdev, vmk_VFID vmkVf, vmk_EthAddress mac) { struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); - struct bnx2x_vfq *rxq = NULL; - unsigned long ramrod_flags = 0; - vf_api_t rc; + struct bnx2x_vfop_cmd cmd; + int rc; DECLARE_MAC_BUF(mac_buf); DP(BNX2X_MSG_IOV, "%s\n", print_mac(mac_buf, mac)); @@ -1366,16 +2291,13 @@ bnx2x_pt_vf_set_mac(struct net_device *netdev, vmk_VFID vmkVf, if (!vf || vf->state != VF_ENABLED) return VMK_BAD_PARAM; - rxq = VF_LEADING_RXQ(vf); - - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - rc = bnx2x_vf_set_mac(bp, rxq, mac, 1, ramrod_flags); - - if (rc) { + cmd.done = NULL; + cmd.block = true; + rc = bnx2x_vfop_mac_set_cmd(bp, vf, &cmd, 0, mac, true); + if (rc) BNX2X_ERR("Failed to add mac-vlan rule rc=%d\n", rc); - return VMK_FAILURE; - } - return VMK_OK; + + return VMK_RET(rc); } // --------------------------------------------------------------------------- @@ -1388,7 +2310,8 @@ bnx2x_pt_vf_set_multicast(struct net_device *netdev, vmk_VFID vmkVf, { struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); - vf_api_t rc; + struct bnx2x_vfop_cmd cmd; + DP(BNX2X_MSG_IOV, "VF index %d, mcast_num %d\n", vmkVf, (int)nmac); @@ -1399,9 +2322,11 @@ bnx2x_pt_vf_set_multicast(struct net_device *netdev, vmk_VFID vmkVf, if (nmac > VMK_NPA_MAX_MULTICAST_FILTERS) return VMK_BAD_PARAM; - rc = bnx2x_vf_set_mcasts(bp, vf ,(bnx2x_mac_addr_t *)mac, nmac, false); - - return VMK_RET(rc); + cmd.done = NULL; + cmd.block = true; + return VMK_RET(bnx2x_vfop_mcast_cmd(bp, vf, &cmd, + (bnx2x_mac_addr_t *)mac, nmac, + false)); } static int @@ -1413,9 +2338,8 @@ bnx2x_pt_vf_set_rx_mode(struct net_device *netdev, vmk_VFID vmkVf, { struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); - struct bnx2x_vfq *rxq = NULL; - vf_api_t rc = VF_API_SUCCESS; unsigned long accept_flags = 0; + struct bnx2x_vfop_cmd cmd; DP(BNX2X_MSG_IOV, "VF index %d, ucast %d, mcast %d, bcast %d, " "allmulti %d\n", @@ -1425,8 +2349,6 @@ bnx2x_pt_vf_set_rx_mode(struct net_device *netdev, vmk_VFID vmkVf, if (!vf || vf->state != VF_ENABLED) return VMK_BAD_PARAM; - rxq = VF_LEADING_RXQ(vf); - /* build accept flags */ if (unicast) set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); @@ -1437,27 +2359,48 @@ bnx2x_pt_vf_set_rx_mode(struct net_device *netdev, vmk_VFID vmkVf, if (allmulti) set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &accept_flags); + /** + * Emulation/FPGA CAM is narrow so use ANY_VLAN instead of vlan 0 + */ + if (CHIP_REV_IS_SLOW(bp)) + set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags); + DP(BNX2X_MSG_IOV, "RX-MASK=0x%lx\n", accept_flags); - rc = bnx2x_vf_set_rxq_mode(bp, vf, rxq, accept_flags); - return VMK_RET(rc); + cmd.done = NULL; + cmd.block = true; + return VMK_RET(bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, 0, accept_flags)); } // --------------------------------------------------------------------------- // // VLAN control // -static int -bnx2x_pt_vf_add_vlan_range(struct net_device *netdev, vmk_VFID vmkVf, vmk_VlanID first, - vmk_VlanID last) + +static inline int +bnx2x_vf_set_vlan(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid, + u16 vtag, bool add) +{ + struct bnx2x_vfop_cmd cmd = { + .done = NULL, + .block = true, + }; + return VMK_RET(bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, vtag, add)); +} + +static int bnx2x_pt_vf_vlan_range(struct net_device *netdev, vmk_VFID vmkVf, + vmk_VlanID first, vmk_VlanID last, bool add) { - vmk_VlanID vlan_id; - int vlan_cnt; struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); - struct bnx2x_vfq *rxq = NULL; - unsigned long ramrod_flags = 0; - vf_api_t rc = VF_API_SUCCESS; + struct bnx2x_vfop_filters *vlans = NULL; + size_t fsz; + vmk_VlanID vid; + + struct bnx2x_vfop_cmd cmd = { + .done = NULL, + .block = true, + }; DP(BNX2X_MSG_IOV, "VF index %d, first %d, last %d\n", vmkVf, first, last); @@ -1470,156 +2413,57 @@ bnx2x_pt_vf_add_vlan_range(struct net_device *netdev, vmk_VFID vmkVf, vmk_VlanID if (first > last || first > 4095 || last > 4095) return VMK_BAD_PARAM; - rxq = VF_LEADING_RXQ(vf); + fsz = (last-first+1)*sizeof(struct bnx2x_vfop_filter) + + sizeof(struct bnx2x_vfop_filters); - /* set common ramrod flags used for all add/del ops below */ - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + vlans = kzalloc(fsz, GFP_KERNEL); + if (!vlans) + return VMK_NO_MEMORY; - /* count how many vlans need to be added */ - for (vlan_id = first, vlan_cnt = 0; vlan_id <= last; vlan_id++) { - /* ignore vlan 0*/ - if (!vlan_id) - continue; - if (!bnx2x_vf_check_vlan_op(bp, rxq, vlan_id, true)) - continue; - vlan_cnt++; - } - if ((atomic_read(&rxq->vlan_count) + vlan_cnt) > vf->vlan_rules_count) { - BNX2X_ERR("Add VLAN range: invalid range %d-%d count %d\n", - first, last, vlan_cnt); - return VMK_BAD_PARAM; + INIT_LIST_HEAD(&vlans->head); + for (vid = first; vid <= last; vid++) { + list_add_tail(&vlans->filters[vid].link, &vlans->head); + vlans->filters[vid].vid = vid; + vlans->filters[vid].add = add; + vlans->filters[vid].type = BNX2X_VFOP_FILTER_VLAN; } - /* add the range */ - for (vlan_id = first, vlan_cnt = 0; vlan_id <= last; vlan_id++) { - /* ignore vlan 0*/ - if (!vlan_id) - continue; - if (!bnx2x_vf_check_vlan_op(bp, rxq, vlan_id, true)) - continue; - rc = bnx2x_vf_set_vlan(bp, rxq, vlan_id, true, ramrod_flags); - if (rc) { - BNX2X_ERR("Add VLAN range: failed to delete " - "vlan %d\n", vlan_id); - break; - } - vlan_cnt++; - } - if (!rc && !atomic_read(&rxq->vlan_count) && vlan_cnt) { - /* delete vlan 0*/ - rc = bnx2x_vf_set_vlan(bp, rxq, 0, false, ramrod_flags); - } - atomic_add(vlan_cnt, &rxq->vlan_count); - - return VMK_RET(rc); + return VMK_RET(bnx2x_vfop_vlan_list_cmd(bp, vf, &cmd, vlans, 0, false)); } -static int +static inline int +bnx2x_pt_vf_add_vlan_range(struct net_device *netdev, vmk_VFID vmkVf, + vmk_VlanID first, vmk_VlanID last) +{ + return bnx2x_pt_vf_vlan_range(netdev, vmkVf, first, last, true); +} + +static inline int bnx2x_pt_vf_del_vlan_range(struct net_device *netdev, vmk_VFID vmkVf, - vmk_VlanID first, vmk_VlanID last) + vmk_VlanID first, vmk_VlanID last) { - vmk_VlanID vlan_id; - int vlan_cnt; - struct bnx2x *bp = netdev_priv(netdev); - struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); - struct bnx2x_vfq *rxq = NULL; - unsigned long ramrod_flags = 0; - vf_api_t rc = VF_API_SUCCESS; - - DP(BNX2X_MSG_IOV, "VF index %d, first %d, last %d\n", - vmkVf, first, last); - - /* sanity */ - if (!vf || vf->state != VF_ENABLED) - return VMK_BAD_PARAM; - - /* a valid range does not include vlan 0 - igonre first == 0 */ - if (first > last || first > 4095 || last > 4095) - return VMK_BAD_PARAM; - - rxq = VF_LEADING_RXQ(vf); - - /* set common ramrod flags used for all add/del ops below */ - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - - /* check that the range is valid and caclculate the range size */ - for (vlan_id = first, vlan_cnt = 0; vlan_id <= last; vlan_id++) { - /* ignore vlan 0*/ - if (!vlan_id) - continue; - if (!bnx2x_vf_check_vlan_op(bp, rxq, vlan_id, false)) - break; - vlan_cnt++; - } - if (vlan_id <= last) { - BNX2X_ERR("Delete VLAN range: invalid range %d-%d\n", - first, last); - return VMK_BAD_PARAM; - } - if (!vlan_cnt) - /* nothing to do */ - return VMK_OK; - - if (vlan_cnt == atomic_read(&rxq->vlan_count)) - /* add vlan 0 before deleting the range */ - rc = bnx2x_vf_set_vlan(bp, rxq, 0, true, ramrod_flags); - - if (rc) { - BNX2X_ERR("Delete VLAN range: failed to add vlan 0\n"); - return VMK_FAILURE; - } - - /* delete the range */ - for (vlan_id = first, vlan_cnt = 0; vlan_id <= last; vlan_id++) { - /* ignore vlan 0*/ - if (!vlan_id) - continue; - - rc = bnx2x_vf_set_vlan(bp, rxq, vlan_id, false, ramrod_flags); - if (rc) { - BNX2X_ERR("Delete VLAN range: failed to delete " - "vlan %d\n", vlan_id); - break; - } - vlan_cnt++; - } - atomic_sub(vlan_cnt, &rxq->vlan_count); - return VMK_RET(rc); + return bnx2x_pt_vf_vlan_range(netdev, vmkVf, first, last, false); } -static int -bnx2x_default_vlan_ramrod(struct bnx2x *bp, struct bnx2x_virtf *vf, bool enable, - u16 vid, u8 prio) +static int bnx2x_vf_defvlan(struct bnx2x *bp, struct bnx2x_virtf *vf, + bool enable, u16 vid, u8 prio) { - struct client_update_ramrod_data *client_update; - int i; - - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - - /* turn anti-spoffing on or off on each tx queue */ - if (i >= vf->txq_count) - break; - - client_update = BP_VF_SP(bp, vf, client_update); - memset(client_update, 0, sizeof(*client_update)); - - client_update->client_id = vfq_cl_id(vf, rxq); - client_update->default_vlan = cpu_to_le16(vid | (prio << 12)); - client_update->default_vlan_enable_flg = enable ? 1 : 0; - client_update->anti_spoofing_change_flg = 1; - client_update->inner_vlan_removal_change_flg = 1; - client_update->inner_vlan_removal_enable_flg = enable ? 1 : 0; - - if (bnx2x_vf_queue_update_ramrod(bp, rxq, - BP_VF_SP_MAP(bp, vf, client_update), true)) /* block */ - return VMK_FAILURE; - } - return VMK_OK; + struct bnx2x_vfop_cmd cmd = { + .done = NULL, + .block = true, + }; + return VMK_RET(bnx2x_vfop_defvlan_cmd(bp, vf, &cmd, enable, vid, prio)); } - - +static inline int +bnx2x_vf_clear_vlans(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid) +{ + struct bnx2x_vfop_cmd cmd = { + .done = NULL, + .block = true, + }; + return VMK_RET(bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false)); +} static int bnx2x_pt_vf_set_default_vlan(struct net_device *netdev, vmk_VFID vmkVf, @@ -1628,9 +2472,7 @@ bnx2x_pt_vf_set_default_vlan(struct net_device *netdev, vmk_VFID vmkVf, { struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); - struct bnx2x_vfq *rxq = NULL; - unsigned long ramrod_flags = 0; - vf_api_t rc = VF_API_SUCCESS; + int rc = 0; DP(BNX2X_MSG_IOV, "VF index %d, vid %d, pri %d, %s\n", vmkVf, vid, prio, ENABLE_STR(enable)); @@ -1642,12 +2484,6 @@ bnx2x_pt_vf_set_default_vlan(struct net_device *netdev, vmk_VFID vmkVf, if ((enable && vid == 0 && prio == 0) || vid > 4095 || prio > 7) return VMK_BAD_PARAM; - rxq = VF_LEADING_RXQ(vf); - - /* set common ramrod flags used for all add/del ops below */ - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - - if (!enable) { /* disable */ if (!vf->def_vlan_enabled) @@ -1655,15 +2491,22 @@ bnx2x_pt_vf_set_default_vlan(struct net_device *netdev, vmk_VFID vmkVf, return VMK_OK; /* turn off default vlan */ - bnx2x_default_vlan_ramrod(bp, vf ,false, vid, prio); + rc = bnx2x_vf_defvlan(bp, vf, false, vid, prio); + if (rc) + goto vmkpt_err; - /* reset vlan classification - add vlan 0 and remove the - * default vlan (remove all vlans except 0) + /** + * reset vlan classification - remove the default vlan + * (remove all) and add vlan 0 */ - rc = bnx2x_vf_set_vlan(bp, rxq, 0, true, ramrod_flags); - if (!rc) - rc = bnx2x_vf_clear_vlans(bp, rxq, true, 0, - ramrod_flags); + rc = bnx2x_vf_clear_vlans(bp, vf, 0); + if (rc) + goto vmkpt_err; + + rc = bnx2x_vf_set_vlan(bp, vf, 0, 0, true); + if (rc) + goto vmkpt_err; + vf->def_vlan_enabled = false; } else { @@ -1672,20 +2515,31 @@ bnx2x_pt_vf_set_default_vlan(struct net_device *netdev, vmk_VFID vmkVf, /* nothing to do */ return VMK_OK; - /* set vlan classifiaction - add default valn and - * remove all the rest + /** + * set vlan classifiaction - clear all vlans and add the + * default vlan */ - rc = bnx2x_vf_set_vlan(bp, rxq, vid, true, ramrod_flags); - if (!rc) - rc = bnx2x_vf_clear_vlans(bp, rxq, true, vid, - ramrod_flags); + rc = bnx2x_vf_clear_vlans(bp, vf, 0); + if (rc) + goto vmkpt_err; + + rc = bnx2x_vf_set_vlan(bp, vf, 0, vid, true); + if (rc) + goto vmkpt_err; /* turn on default vlan */ - bnx2x_default_vlan_ramrod(bp, vf ,true, vid, prio); + rc = bnx2x_vf_defvlan(bp, vf, true, vid, prio); + if (rc) + goto vmkpt_err; vf->def_vlan_enabled = true; } +vmkpt_done: return VMK_RET(rc); +vmkpt_err: + BNX2X_ERR("failed to set default vlan, VF[%d], vid %d, pri %d, %s " + "rc %d\n", vmkVf, vid, prio, ENABLE_STR(enable), rc); + goto vmkpt_done; } // --------------------------------------------------------------------------- @@ -1698,34 +2552,11 @@ bnx2x_pt_vf_set_antispoof(struct net_device *netdev, vmk_VFID vmkVf, { struct bnx2x *bp = netdev_priv(netdev); struct bnx2x_virtf *vf = vf_by_vmkVFID(bp, vmkVf); - struct client_update_ramrod_data *client_update; - int i; - - DP(BNX2X_MSG_IOV, "VF index %d, %s\n", vmkVf, ENABLE_STR(enable)); - - /* sanity */ - if (!vf || vf->state != VF_ENABLED) - return VMK_BAD_PARAM; - - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - - /* turn anti-spoffing on or off on each tx queue */ - if (i >= vf->txq_count) - break; - - client_update = BP_VF_SP(bp, vf, client_update); - memset(client_update, 0, sizeof(*client_update)); - - client_update->client_id = vfq_cl_id(vf, rxq); - client_update->anti_spoofing_enable_flg = enable ? 1 : 0; - client_update->anti_spoofing_change_flg = 1; - - if (bnx2x_vf_queue_update_ramrod(bp, rxq, - BP_VF_SP_MAP(bp, vf, client_update), true)) /* block */ - return VMK_FAILURE; - } - return VMK_OK; + struct bnx2x_vfop_cmd cmd = { + .done = NULL, + .block = true, + }; + return VMK_RET(bnx2x_vfop_antispoof_cmd(bp, vf, &cmd, enable)); } static int @@ -1783,7 +2614,7 @@ bnx2x_pt_vf_get_queue_stats(struct net_device *netdev, vmk_VFID vmkVf, if (!vf || vf->state != VF_ENABLED) return VMK_BAD_PARAM; - if (vf->rxq_count < numRxQueues || vf->txq_count < numTxQueues) + if (rxq_count(vf) < numRxQueues || txq_count(vf) < numTxQueues) return VMK_BAD_PARAM; // First clear output structures. @@ -1900,35 +2731,44 @@ bnx2x_pt_vf_get_queue_stats(struct net_device *netdev, vmk_VFID vmkVf, // // Non-passthrough vNIC control // -static int -bnx2x_pt_pf_add_mac_filter(struct net_device *netdev, vmk_EthAddress mac) +static inline int bnx2x_pt_pf_mac_filter(struct bnx2x *bp, vmk_EthAddress mac, + bool add) { - struct bnx2x *bp = netdev_priv(netdev); + unsigned long ramrod_flags = 0; + int rc; + + set_bit(RAMROD_COMP_WAIT, &ramrod_flags); DECLARE_MAC_BUF(mac_buf); - DP(BNX2X_MSG_IOV, "%s\n", print_mac(mac_buf, mac)); + DP(BNX2X_MSG_IOV, "%s %s\n", add ? "Adding" : "Deleting", + print_mac(mac_buf, mac)); - bnx2x_iov_set_tx_mac(bp, mac, 1); - return VMK_OK; + rc = bnx2x_set_mac_one(bp, mac, &bp->fp->mac_obj, add, + BNX2X_ETH_MAC, &ramrod_flags); + if (rc == -EEXIST) + rc = 0; + + return rc; } -static int +static inline int +bnx2x_pt_pf_add_mac_filter(struct net_device *netdev, vmk_EthAddress mac) +{ + return VMK_RET(bnx2x_pt_pf_mac_filter(netdev_priv(netdev), mac, true)); +} + +static inline int bnx2x_pt_pf_del_mac_filter(struct net_device *netdev, vmk_EthAddress mac) { - struct bnx2x *bp = netdev_priv(netdev); - - DECLARE_MAC_BUF(mac_buf); - DP(BNX2X_MSG_IOV, "%s\n", print_mac(mac_buf, mac)); - - bnx2x_iov_set_tx_mac(bp, mac, 0); - return VMK_OK; + return VMK_RET(bnx2x_pt_pf_mac_filter(netdev_priv(netdev), mac, false)); } static int bnx2x_pt_pf_mirror_all(struct net_device *netdev, uint8_t enable) { struct bnx2x *bp = netdev_priv(netdev); - unsigned long accept_flags = 0, ramrod_flags = 0; + unsigned long rx_accept_flags = 0, tx_accept_flags = 0; + unsigned long ramrod_flags = 0; DP(BNX2X_MSG_IOV, "%s\n", ENABLE_STR(enable)); @@ -1941,12 +2781,21 @@ bnx2x_pt_pf_mirror_all(struct net_device *netdev, uint8_t enable) /* no support for concurrent rx_mode requests */ return VMK_BUSY; - set_bit(BNX2X_ACCEPT_ALL_UNICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_BROADCAST, &accept_flags); + /* rx -promiscuous */ + set_bit(BNX2X_ACCEPT_ALL_UNICAST, &rx_accept_flags); + set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &rx_accept_flags); + set_bit(BNX2X_ACCEPT_BROADCAST, &rx_accept_flags); + + /* tx all-multi */ + set_bit(BNX2X_ACCEPT_UNICAST, &tx_accept_flags); + set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &tx_accept_flags); + set_bit(BNX2X_ACCEPT_BROADCAST, &tx_accept_flags); + set_bit(RAMROD_RX, &ramrod_flags); + set_bit(RAMROD_TX, &ramrod_flags); set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - bnx2x_set_cl_rx_mode(bp, bp->fp->cl_id, 0, accept_flags, ramrod_flags); + bnx2x_set_q_rx_mode(bp, bp->fp->cl_id, 0, rx_accept_flags, + tx_accept_flags, ramrod_flags); return VMK_OK; } @@ -2110,3 +2959,772 @@ bnx2x_pt_passthru_ops(void *client_data, vmk_NetPTOP op, void *args) #endif /* BNX2X_PASSTHRU */ #endif /* BCM_IOV */ + +#if (VMWARE_ESX_DDK_VERSION >= 55000) +#define MISC_REG_AEU_MASK_ATTN_MCP 0xa068 +#define NIG_REG_BMAC1_PAUSE_OUT_EN 0x10114 +#define NIG_REG_EMAC1_PAUSE_OUT_EN 0x1011c + +static struct dmp_config dmpcfg; +vmklnx_DumpFileHandle bnx2x_fwdmp_dh; +void *bnx2x_fwdmp_va; +struct bnx2x_fwdmp_info bnx2x_fwdmp_bp[BNX2X_MAX_NIC+1]; + +static void esx_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val) +{ + pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, addr); + pci_write_config_dword(bp->pdev, PCICFG_GRC_DATA, val); + pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, + PCICFG_VENDOR_ID_OFFSET); +} + +static u32 esx_reg_rd_ind(struct bnx2x *bp, u32 addr) +{ + u32 val; + + pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, addr); + pci_read_config_dword(bp->pdev, PCICFG_GRC_DATA, &val); + pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, + PCICFG_VENDOR_ID_OFFSET); + + return val; +} + +static u32 * +read_idle_chk(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 i, j; + + /* Read the idle chk registers */ + for (i = 0; i < IDLE_REGS_COUNT; i++) + if (dmpcfg.mode == (idle_addrs[i].info & dmpcfg.mode)) + for (j = 0; j < idle_addrs[i].size; j++) { + if ((dmp->fw_hdr.dmp_size + 4) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + break; + } + *dst++ = RD_IND(bp, + idle_addrs[i].addr + j*4); + dmp->fw_hdr.dmp_size += 4; + } + return dst; +} + +static u32 * +read_mcp_traces(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 trace_shmem_base; + u32 addr; + u32 i; + + if (dmp->fw_hdr.dmp_size + DBG_DMP_TRACE_BUFFER_SIZE > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, FWDMP_FLAGS_SPACE_NEEDED); + return dst; + } + + if (BP_PATH(bp) == 0) + trace_shmem_base = bp->common.shmem_base; + else + trace_shmem_base = SHMEM2_RD(bp, other_shmem_base_addr); + + addr = trace_shmem_base - DBG_DMP_TRACE_BUFFER_SIZE; + for (i = 0; i < DBG_DMP_TRACE_BUFFER_SIZE;) { + if ((dmp->fw_hdr.dmp_size + 4) + > DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, FWDMP_FLAGS_SPACE_NEEDED); + break; + } + *dst++ = RD_IND(bp, addr + i); + i += 4; + dmp->fw_hdr.dmp_size += 4; + } + return dst; +} + +static u32 * +read_regular_regs(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 i, j; + + /* Read the regular address registers */ + for (i = 0; i < REGS_COUNT; i++) + if (dmpcfg.mode == (reg_addrs[i].info & dmpcfg.mode)) + for (j = 0; j < reg_addrs[i].size; j++) { + if ((dmp->fw_hdr.dmp_size + 4) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + break; + } + *dst++ = RD_IND(bp, reg_addrs[i].addr + j*4); + dmp->fw_hdr.dmp_size += 4; + } + return dst; +} + +static u32 * +read_wregs(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 i, j, k; + u32 reg_add_read = 0; + const struct wreg_addr *pwreg_addrs = dmpcfg.pwreg_addrs; + + for (i = 0; i < dmpcfg.wregs_count; i++) { + if (dmpcfg.mode == (pwreg_addrs[i].info & dmpcfg.mode)) { + reg_add_read = pwreg_addrs[i].addr; + for (j = 0; j < pwreg_addrs[i].size; j++) { + if ((dmp->fw_hdr.dmp_size + 4) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + break; + } + *dst++ = RD_IND(bp, reg_add_read); + reg_add_read += 4; + dmp->fw_hdr.dmp_size += 4; + for (k = 0; + k < pwreg_addrs[i].read_regs_count; k++) { + if ((dmp->fw_hdr.dmp_size + 4) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + break; + } + *dst++ = RD_IND(bp, + pwreg_addrs[i].read_regs[k]); + dmp->fw_hdr.dmp_size += 4; + } + } + } + } + return dst; +} + +static u32 * +read_page_mode(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 index_page_vals = 0; + u32 index_page_write_regs = 0; + const struct reg_addr *page_read_regs = dmpcfg.page_read_regs; + u32 i, j; + + /* If one of the array size is zero, this means that + page mode is disabled. */ + if ((0 == dmpcfg.page_mode_values_count) || + (0 == dmpcfg.page_write_regs_count) || + (0 == dmpcfg.page_read_regs_count)) + return dst; + + for (index_page_vals = 0; + index_page_vals < dmpcfg.page_mode_values_count; + index_page_vals++) { + for (index_page_write_regs = 0; + index_page_write_regs < dmpcfg.page_write_regs_count; + index_page_write_regs++) { + WR_IND(bp, + dmpcfg.page_write_regs[index_page_write_regs], + dmpcfg.page_vals[index_page_vals]); + } + for (i = 0; i < dmpcfg.page_read_regs_count; i++) { + if (dmpcfg.mode == + (page_read_regs[i].info & dmpcfg.mode)) { + for (j = 0; j < page_read_regs[i].size; j++) { + if ((dmp->fw_hdr.dmp_size + 4) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + break; + } + *dst++ = RD_IND(bp, + page_read_regs[i].addr + j*4); + dmp->fw_hdr.dmp_size += 4; + } + } + } + } + return dst; +} + +static void +get_vfc_info(struct bnx2x *bp, + const struct vfc_general **xvfc_info, + const struct vfc_general **tvfc_info) +{ + if (CHIP_IS_E1(bp)) { + *xvfc_info = &vfc_general_x_e1; + *tvfc_info = &vfc_general_t_e1; + } else if (CHIP_IS_E1H(bp)) { + *xvfc_info = &vfc_general_x_e1h; + *tvfc_info = &vfc_general_t_e1h; + } else if (CHIP_IS_E2(bp)) { + *xvfc_info = &vfc_general_x_e2; + *tvfc_info = &vfc_general_t_e2; + } else if (CHIP_IS_E3(bp)) { + *xvfc_info = &vfc_general_x_e3; + *tvfc_info = &vfc_general_t_e3; + } else { + *xvfc_info = NULL; + *tvfc_info = NULL; + } +} + +static void get_vfc_ops(struct bnx2x *bp, + const struct vfc_read_task **xvfc_ops, + const struct vfc_read_task **tvfc_ops) +{ + if (CHIP_IS_E2(bp)) { + *xvfc_ops = &vfc_task_x_e2; + *tvfc_ops = &vfc_task_t_e2; + } else if (CHIP_IS_E3(bp)) { + *xvfc_ops = &vfc_task_x_e3; + *tvfc_ops = &vfc_task_t_e3; + } else { + *xvfc_ops = NULL; + *tvfc_ops = NULL; + } +} + +static void +init_extension_header(u32 data_type, + u32 data_source, + struct extension_hdr *header) +{ + header->hdr_signature = HDR_SIGNATURE; + header->hdr_size = (sizeof(*header) - + sizeof(header->hdr_size)) / sizeof(u32); + header->data_type = data_type; + header->data_source = data_source; +} + +static u8 +wait_for_reg_value_equals(struct bnx2x *bp, + u32 offset, + u32 mask, + u32 expected_value, + u32 timeout_us) +{ + u32 reg_value = 0; + u32 wait_cnt = 0; + u32 wait_cnt_limit = timeout_us/DEFAULT_WAIT_INTERVAL_MICSEC; + + reg_value = RD_IND(bp, offset); + while (((reg_value & mask) != expected_value) && + (wait_cnt++ != wait_cnt_limit)) { + udelay(DEFAULT_WAIT_INTERVAL_MICSEC); + reg_value = RD_IND(bp, offset); + } + return ((reg_value & mask) == expected_value); +} + +static u32 * +read_vfc_block(struct bnx2x *bp, + const struct vfc_general *vfc_info, + const struct vfc_read_task *vfc_ops, + struct extension_hdr *header, + u32 *dst, + struct chip_core_dmp *dmp, + u8 *rc) +{ + u32 cur_op_idx, i; + const struct vfc_read_write_vector *current_entry = NULL; + u32 *dst_start = dst; + + if (!vfc_info->valid || !vfc_info->valid) { + *rc = false; + return dst; + } + if (!wait_for_reg_value_equals(bp, vfc_info->vfc_status, + 0xFFFFFFFF, 0, 1000)) { + header->error = true; + *rc = false; + goto exit; + } + if (dmp->fw_hdr.dmp_size + sizeof(*header) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, FWDMP_FLAGS_SPACE_NEEDED); + *rc = false; + return dst; + } + dst += sizeof(*header)/sizeof(u32); + dmp->fw_hdr.dmp_size += sizeof(*header); + for (cur_op_idx = 0; cur_op_idx < vfc_ops->array_size; ++cur_op_idx) { + current_entry = &vfc_ops->read_write_vectors[cur_op_idx]; + for (i = 0; i < current_entry->write_value_num_valid; ++i) { + WR_IND(bp, + vfc_info->vfc_data_write, + current_entry->write_value[i]); + } + WR_IND(bp, + vfc_info->vfc_address, current_entry->address_value); + for (i = 0; i < current_entry->read_size; ++i) { + if (!wait_for_reg_value_equals(bp, vfc_info->vfc_status, + RI_VFC_IS_READY, RI_VFC_IS_READY, 1000)) { + u32 reg_value; + + reg_value = + RD_IND(bp, vfc_info->vfc_status); + header->error = true; + *rc = false; + goto exit; + } + if ((dmp->fw_hdr.dmp_size + 4) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + *rc = false; + break; + } + *dst++ = RD_IND(bp, vfc_info->vfc_data_read); + header->data_size++; + dmp->fw_hdr.dmp_size += 4; + } + } +exit: + memcpy((u8 *)dst_start, header, sizeof(*header)); + return dst; +} + +static u32 * +read_vfc(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp, u8 *status) +{ + u8 rc = false; + struct extension_hdr xvfc_header = {0}; + struct extension_hdr tvfc_header = {0}; + + const struct vfc_general *xvfc_info = NULL; + const struct vfc_general *tvfc_info = NULL; + const struct vfc_read_task *xvfc_ops = NULL; + const struct vfc_read_task *tvfc_ops = NULL; + + get_vfc_info(bp, &xvfc_info, &tvfc_info); + get_vfc_ops(bp, &xvfc_ops, &tvfc_ops); + if ((xvfc_info == NULL) || (tvfc_info == NULL)) { + *status = false; + return dst; + } + init_extension_header(RI_TYPE_VFC, RI_SRC_XSTORM, &xvfc_header); + init_extension_header(RI_TYPE_VFC, RI_SRC_TSTORM, &tvfc_header); + dst = read_vfc_block(bp, + xvfc_info, xvfc_ops, &xvfc_header, dst, dmp, &rc); + if (!rc) { + *status = rc; + return dst; + } + dst = read_vfc_block(bp, + tvfc_info, tvfc_ops, &tvfc_header, dst, dmp, &rc); + *status = rc; + return dst; +} + +static const struct igu_data *get_igu_info(struct bnx2x *bp) +{ + if (CHIP_IS_E1(bp)) + return &igu_address_e1; + else if (CHIP_IS_E1H(bp)) + return &igu_address_e1h; + else if (CHIP_IS_E2(bp)) + return &igu_address_e2; + else if (CHIP_IS_E3(bp)) + return &igu_address_e3; + else + return NULL; +} + +static u32 * +read_igu(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp, u8 *status) +{ + struct extension_hdr igu_header = {0}; + const struct igu_data *igu_info = get_igu_info(bp); + u32 iter_cnt = 0; + u32 more_data = 0; + u32 *dst_start = dst; + + init_extension_header(RI_TYPE_IGU, RI_OTHER_BLOCK, &igu_header); + if (!igu_info) { + *status = false; + return dst; + } + if (!igu_info->valid) { + *status = true; + return dst; + } + more_data = RD_IND(bp, igu_info->is_data_valid); + if (!more_data) { + *status = true; + return dst; + } + if (dmp->fw_hdr.dmp_size + sizeof(igu_header) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, FWDMP_FLAGS_SPACE_NEEDED); + *status = false; + return dst; + } + dst += sizeof(igu_header)/sizeof(u32); + dmp->fw_hdr.dmp_size += sizeof(igu_header); + igu_header.additional_data = RD_IND(bp, igu_info->is_last_commands); + do { + if ((dmp->fw_hdr.dmp_size + 4) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + igu_header.error = true; + *status = false; + break; + } + *dst++ = RD_IND(bp, igu_info->data[0]); + ++igu_header.data_size; + dmp->fw_hdr.dmp_size += 4; + if ((dmp->fw_hdr.dmp_size + 4) > + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + igu_header.error = true; + *status = false; + break; + } + *dst++ = RD_IND(bp, igu_info->data[1]); + ++igu_header.data_size; + dmp->fw_hdr.dmp_size += 4; + more_data = RD_IND(bp, igu_info->is_data_valid); + ++iter_cnt; + } while (more_data && (iter_cnt < igu_info->max_size)); + + memcpy((u8 *)dst_start, &igu_header, sizeof(igu_header)); + return dst; +} + +static u32 * +read_additional_blocks(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u8 dmp_status = false; + + dst = read_vfc(bp, dst, dmp, &dmp_status); + if (dmp_status) + dst = read_igu(bp, dst, dmp, &dmp_status); + return dst; +} + +static u32 * +dmp_stop_timer(struct bnx2x *bp, u32 *dst, struct chip_core_dmp *dmp) +{ + u32 i, j; + u32 *timer_scan_reg; + + if ((dmp->fw_hdr.dmp_size + (2 * dmpcfg.regs_timer_count)) >= + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0) { + SET_FLAGS(dmp->fw_hdr.flags, + FWDMP_FLAGS_SPACE_NEEDED); + return dst; + } + if (dmp->fw_hdr.flags & FWDMP_FLAGS_LIVE_DUMP) { + /* driver shouldn't read the timer in online + since it could cause attention. However, + it should fills the buffer and move on */ + for (i = 0; + i < 2 * dmpcfg.regs_timer_count; + i++) { + *dst++ = 0; + dmp->fw_hdr.dmp_size += 4; + } + return dst; + } + for (i = 0; i < dmpcfg.regs_timer_count; i++) { + *dst = RD_IND(bp, dmpcfg.regs_timer_status_addrs[i]); + timer_scan_reg = dst + dmpcfg.regs_timer_count; + if (*dst == 1) { + WR_IND(bp, dmpcfg.regs_timer_status_addrs[i], 0); + for (j = 0; j < DRV_DUMP_MAX_TIMER_PENDING; j++) { + *timer_scan_reg = RD_IND(bp, + dmpcfg.regs_timer_scan_addrs[i]); + if (*timer_scan_reg == 0) + break; + } + } else { + *timer_scan_reg = DRV_DUMP_TIMER_SCAN_DONT_CARE; + } + dst++; + dmp->fw_hdr.dmp_size += 4; + } + dst += dmpcfg.regs_timer_count; + dmp->fw_hdr.dmp_size += 4 * dmpcfg.regs_timer_count; + return dst; +} + +static void +dmp_rollback_timer(struct bnx2x *bp, + struct chip_core_dmp *dmp, + u32 *tmr_status) +{ + u32 i; + + if (dmp->fw_hdr.flags & FWDMP_FLAGS_LIVE_DUMP) + return; + for (i = 0; i < dmpcfg.regs_timer_count; i++) { + if (*tmr_status == 1) + WR_IND(bp, dmpcfg.regs_timer_status_addrs[i], 1); + tmr_status++; + } +} + +static void +init_dump_header(struct bnx2x *bp, + struct esx_dump_hdr *dump_hdr, + struct dmp_config *dmpcfg, + struct chip_core_dmp *dmp) +{ + dump_hdr->hdr_size = (sizeof(struct esx_dump_hdr)/4) - 1; + dump_hdr->dump_sign = hd_param_all; + dump_hdr->idle_chk = 1; + dump_hdr->xstorm_waitp = RD_IND(bp, DRV_DUMP_XSTORM_WAITP_ADDRESS); + dump_hdr->tstorm_waitp = RD_IND(bp, DRV_DUMP_TSTORM_WAITP_ADDRESS); + dump_hdr->ustorm_waitp = RD_IND(bp, DRV_DUMP_USTORM_WAITP_ADDRESS); + dump_hdr->cstorm_waitp = RD_IND(bp, DRV_DUMP_CSTORM_WAITP_ADDRESS); + + if (CHIP_IS_E1(bp)) { + if (dmp->fw_hdr.flags & FWDMP_FLAGS_LIVE_DUMP) + dump_hdr->info = RI_E1_ONLINE; + else + dump_hdr->info = RI_E1_OFFLINE; + dmpcfg->wregs_count = WREGS_COUNT_E1; + dmpcfg->pwreg_addrs = wreg_addrs_e1; + dmpcfg->regs_timer_count = TIMER_REGS_COUNT_E1; + dmpcfg->regs_timer_status_addrs = timer_status_regs_e1; + dmpcfg->regs_timer_scan_addrs = timer_scan_regs_e1; + dmpcfg->page_mode_values_count = + PAGE_MODE_VALUES_E1; + dmpcfg->page_vals = page_vals_e1; + dmpcfg->page_write_regs_count = PAGE_WRITE_REGS_E1; + dmpcfg->page_write_regs = page_write_regs_e1; + dmpcfg->page_read_regs_count = PAGE_READ_REGS_E1; + dmpcfg->page_read_regs = page_read_regs_e1; + } else if (CHIP_IS_E1H(bp)) { + if (dmp->fw_hdr.flags & FWDMP_FLAGS_LIVE_DUMP) + dump_hdr->info = RI_E1H_ONLINE; + else + dump_hdr->info = RI_E1H_OFFLINE; + dmpcfg->wregs_count = WREGS_COUNT_E1H; + dmpcfg->pwreg_addrs = wreg_addrs_e1h; + dmpcfg->regs_timer_count = TIMER_REGS_COUNT_E1H; + dmpcfg->regs_timer_status_addrs = timer_status_regs_e1h; + dmpcfg->regs_timer_scan_addrs = timer_scan_regs_e1h; + dmpcfg->page_mode_values_count = + PAGE_MODE_VALUES_E1H; + dmpcfg->page_vals = page_vals_e1h; + dmpcfg->page_write_regs_count = PAGE_WRITE_REGS_E1H; + dmpcfg->page_write_regs = page_write_regs_e1h; + dmpcfg->page_read_regs_count = PAGE_READ_REGS_E1H; + dmpcfg->page_read_regs = page_read_regs_e1h; + } else if (CHIP_IS_E2(bp)) { + if (dmp->fw_hdr.flags & FWDMP_FLAGS_LIVE_DUMP) + dump_hdr->info = RI_E2_ONLINE | + (BP_PATH(bp) ? RI_PATH1_DUMP : RI_PATH0_DUMP); + else + dump_hdr->info = RI_E2_OFFLINE | + (BP_PATH(bp) ? RI_PATH1_DUMP : RI_PATH0_DUMP); + dmpcfg->wregs_count = WREGS_COUNT_E2; + dmpcfg->pwreg_addrs = wreg_addrs_e2; + dmpcfg->regs_timer_count = TIMER_REGS_COUNT_E2; + dmpcfg->regs_timer_status_addrs = timer_status_regs_e2; + dmpcfg->regs_timer_scan_addrs = timer_scan_regs_e2; + dmpcfg->page_mode_values_count = + PAGE_MODE_VALUES_E2; + dmpcfg->page_vals = page_vals_e2; + dmpcfg->page_write_regs_count = PAGE_WRITE_REGS_E2; + dmpcfg->page_write_regs = page_write_regs_e2; + dmpcfg->page_read_regs_count = PAGE_READ_REGS_E2; + dmpcfg->page_read_regs = page_read_regs_e2; + } else if (CHIP_IS_E3A0(bp)) { + if (dmp->fw_hdr.flags & FWDMP_FLAGS_LIVE_DUMP) + dump_hdr->info = RI_E3_ONLINE | + (BP_PATH(bp) ? RI_PATH1_DUMP : RI_PATH0_DUMP); + else + dump_hdr->info = RI_E3_OFFLINE | + (BP_PATH(bp) ? RI_PATH1_DUMP : RI_PATH0_DUMP); + dmpcfg->wregs_count = WREGS_COUNT_E3; + dmpcfg->pwreg_addrs = wreg_addrs_e3; + dmpcfg->regs_timer_count = TIMER_REGS_COUNT_E3; + dmpcfg->regs_timer_status_addrs = timer_status_regs_e3; + dmpcfg->regs_timer_scan_addrs = timer_scan_regs_e3; + dmpcfg->page_mode_values_count = + PAGE_MODE_VALUES_E3; + dmpcfg->page_vals = page_vals_e3; + dmpcfg->page_write_regs_count = PAGE_WRITE_REGS_E3; + dmpcfg->page_write_regs = page_write_regs_e3; + dmpcfg->page_read_regs_count = PAGE_READ_REGS_E3; + dmpcfg->page_read_regs = page_read_regs_e3; + } else if (CHIP_IS_E3B0(bp)) { + if (dmp->fw_hdr.flags & FWDMP_FLAGS_LIVE_DUMP) + dump_hdr->info = RI_E3B0_ONLINE | + (BP_PATH(bp) ? RI_PATH1_DUMP : RI_PATH0_DUMP); + else + dump_hdr->info = RI_E3B0_OFFLINE | + (BP_PATH(bp) ? RI_PATH1_DUMP : RI_PATH0_DUMP); + dmpcfg->wregs_count = WREGS_COUNT_E3B0; + dmpcfg->pwreg_addrs = wreg_addrs_e3b0; + dmpcfg->regs_timer_count = TIMER_REGS_COUNT_E3B0; + dmpcfg->regs_timer_status_addrs = timer_status_regs_e3b0; + dmpcfg->regs_timer_scan_addrs = timer_scan_regs_e3b0; + dmpcfg->page_mode_values_count = + PAGE_MODE_VALUES_E3; + dmpcfg->page_vals = page_vals_e3; + dmpcfg->page_write_regs_count = PAGE_WRITE_REGS_E3; + dmpcfg->page_write_regs = page_write_regs_e3; + dmpcfg->page_read_regs_count = PAGE_READ_REGS_E3; + dmpcfg->page_read_regs = page_read_regs_e3; + } + dmpcfg->mode = dump_hdr->info & ~(RI_PATH1_DUMP | RI_PATH0_DUMP); +} + +static void disable_pause(struct bnx2x *bp) +{ + if (CHIP_IS_E1x(bp) || CHIP_IS_E2(bp)) { + WR_IND(bp, NIG_REG_BMAC0_PAUSE_OUT_EN, 0); + WR_IND(bp, NIG_REG_BMAC1_PAUSE_OUT_EN, 0); + WR_IND(bp, NIG_REG_EMAC0_PAUSE_OUT_EN, 0); + WR_IND(bp, NIG_REG_EMAC1_PAUSE_OUT_EN, 0); + } else { + WR_IND(bp, NIG_REG_P0_MAC_PAUSE_OUT_EN, 0); + WR_IND(bp, NIG_REG_P1_MAC_PAUSE_OUT_EN, 0); + } +} + +VMK_ReturnStatus bnx2x_fwdmp_callback(void *cookie, vmk_Bool liveDump) +{ + VMK_ReturnStatus status = VMK_OK; + u32 idx; + u32 *dst, *tmr_status; + struct bnx2x *bp; + struct esx_dump_hdr dump_hdr = {0}; + struct chip_core_dmp *dmp; + + for (idx = 0; idx < BNX2X_MAX_NIC; idx++) { + if (bnx2x_fwdmp_va && bnx2x_fwdmp_bp[idx].bp) { + if (bnx2x_fwdmp_bp[idx].disable_fwdmp) + continue; + bp = bnx2x_fwdmp_bp[idx].bp; + dst = bnx2x_fwdmp_va; + /* build the fw dump header */ + dmp = (struct chip_core_dmp *)dst; + snprintf(dmp->fw_hdr.name, sizeof(dmp->fw_hdr.name), + "%s", bp->dev->name); + dmp->fw_hdr.bp = (void *)bp; + dmp->fw_hdr.chip_id = bp->common.chip_id; + dmp->fw_hdr.len = sizeof(struct fw_dmp_hdr); + dmp->fw_hdr.ver = 0x000700006; + dmp->fw_hdr.dmp_size = dmp->fw_hdr.len; + dmp->fw_hdr.flags = 0; + if (liveDump) + SET_FLAGS(dmp->fw_hdr.flags, FWDMP_FLAGS_LIVE_DUMP); + memset(&dmpcfg, 0, sizeof(struct dmp_config)); + memset(&dump_hdr, 0, sizeof(struct esx_dump_hdr)); + dst = dmp->fw_dmp_buf; + bnx2x_disable_blocks_parity(bp); + /* build the GRC dump header */ + init_dump_header(bp, &dump_hdr, &dmpcfg, dmp); + memcpy(dst, &dump_hdr, sizeof(struct esx_dump_hdr)); + dst += dump_hdr.hdr_size + 1; + dmp->fw_hdr.dmp_size += (dump_hdr.hdr_size + 1) * 4; + /* stop the timers before idle check. */ + tmr_status = dst; + dst = dmp_stop_timer(bp, dst, dmp); + if (dmp->fw_hdr.flags & FWDMP_FLAGS_SPACE_NEEDED) + goto write_file; + /* dump 1st idle check */ + dst = read_idle_chk(bp, dst, dmp); + if (dmp->fw_hdr.flags & FWDMP_FLAGS_SPACE_NEEDED) + goto write_file; + /* dump 2nd idle check */ + dst = read_idle_chk(bp, dst, dmp); + /* Enable the timers after idle check. */ + dmp_rollback_timer(bp, dmp, tmr_status); + if (dmp->fw_hdr.flags & FWDMP_FLAGS_SPACE_NEEDED) + goto write_file; + /* dump mcp traces */ + dst = read_mcp_traces(bp, dst, dmp); + if (dmp->fw_hdr.flags & FWDMP_FLAGS_SPACE_NEEDED) + goto write_file; + /* dump regular address registers */ + dst = read_regular_regs(bp, dst, dmp); + if (dmp->fw_hdr.flags & FWDMP_FLAGS_SPACE_NEEDED) + goto write_file; + /* dump wide bus registers */ + dst = read_wregs(bp, dst, dmp); + if (dmp->fw_hdr.flags & FWDMP_FLAGS_SPACE_NEEDED) + goto write_file; + /* dump read page mode registers */ + dst = read_page_mode(bp, dst, dmp); + if (dmp->fw_hdr.flags & FWDMP_FLAGS_SPACE_NEEDED) + goto write_file; + /* dump additional blocks */ + dst = read_additional_blocks(bp, dst, dmp); + if (((dmp->fw_hdr.dmp_size + 4) <= + DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0)) { + *dst++ = BNX2X_FWDMP_MARKER_END; + dmp->fw_hdr.dmp_size += 4; + } +write_file: + status = vmklnx_dump_range(bnx2x_fwdmp_dh, + bnx2x_fwdmp_va, dmp->fw_hdr.dmp_size); + if (status != VMK_OK) { + BNX2X_ERR("failed to dump firmware/chip " + "data %x %d!\n", status, idx); + break; + } + /* Re-enable parity attentions */ + bnx2x_clear_blocks_parity(bp); + bnx2x_enable_blocks_parity(bp); + if (!(dmp->fw_hdr.flags & FWDMP_FLAGS_LIVE_DUMP)) + disable_pause(bp); + } + } + /* restore firmware dump on disabled adapters */ + for (idx = 0; idx < BNX2X_MAX_NIC; idx++) { + if (bnx2x_fwdmp_bp[idx].bp && bnx2x_fwdmp_bp[idx].disable_fwdmp) + bnx2x_fwdmp_bp[idx].disable_fwdmp = 0; + } + return status; +} + +/* + * Disable firmware dump on netdump worker NIC (bp) such that, the + * grcDump, which is very intrusive, won't interrupt netdump + * traffic. Besides the netdump worker NIC, we also need to disable + * grcDump on other functions that shared the same device as worker + * NIC function. + */ +void bnx2x_disable_esx_fwdmp(struct bnx2x *bp) +{ + u32 i, j; + for (i = 0; i < BNX2X_MAX_NIC; i++) { + if (bnx2x_fwdmp_bp[i].bp == bp) { + struct bnx2x *fw_bp; + + bnx2x_fwdmp_bp[i].disable_fwdmp = 1; + netdev_info(bp->dev, + "Firmware dump disabled on netdump worker " + "(bp=%p, %d).\n", + bp, i); + for (j = 0; j < BNX2X_MAX_NIC; j++) { + fw_bp = bnx2x_fwdmp_bp[j].bp; + /* disable fw dmp on the functions that + shared the same device as well */ + if (fw_bp && fw_bp != bp && + fw_bp->pdev->bus == bp->pdev->bus) { + bnx2x_fwdmp_bp[j].disable_fwdmp = 1; + netdev_info(fw_bp->dev, + "Firmware dump disabled on function " + "sharing the same device (bp=%p, %d).\n", + fw_bp, j); + fw_bp->poll_disable_fwdmp = 1; + } + } + bp->poll_disable_fwdmp = 1; + break; + } + } +} +#endif +/*******************/ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.h index a30d530..3084c2d 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_esx.h @@ -1,6 +1,6 @@ /* bnx2x_esx.h: Broadcom Everest network driver. * - * Copyright 2008-2011 Broadcom Corporation + * Copyright 2008-2013 Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you @@ -19,15 +19,80 @@ #ifndef BNX2X_ESX_H #define BNX2X_ESX_H +extern int psod_on_panic; + #ifdef BNX2X_VMWARE_BMAPILNX /* ! BNX2X_UPSTREAM */ int bnx2x_ioctl_cim(struct net_device *dev, struct ifreq *ifr); #endif +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ +int bnx2x_cna_enable(struct bnx2x *bp, int tx_count, int rx_count); +void bnx2x_cna_disable(struct bnx2x *bp); +#endif + #ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ + +/* NetQueue flags mamangment macros. The field fp->netq_flags is part of the + * bnx2x_fastpath strucutre + */ +#define BNX2X_NETQ_RX_QUEUE_ALLOCATED 0x0001 +#define BNX2X_NETQ_TX_QUEUE_ALLOCATED 0x0002 +#define BNX2X_NETQ_RX_QUEUE_ACTIVE 0x0004 +#define BNX2X_NETQ_TX_QUEUE_ACTIVE 0x0008 + +#define BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp) \ + ((fp->netq_flags & BNX2X_NETQ_RX_QUEUE_ALLOCATED) == \ + BNX2X_NETQ_RX_QUEUE_ALLOCATED) +#define BNX2X_IS_NETQ_TX_QUEUE_ALLOCATED(fp) \ + ((fp->netq_flags & BNX2X_NETQ_TX_QUEUE_ALLOCATED) == \ + BNX2X_NETQ_TX_QUEUE_ALLOCATED) +#define BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(fp) \ + ((fp->netq_flags & BNX2X_NETQ_RX_QUEUE_ACTIVE) == \ + BNX2X_NETQ_RX_QUEUE_ACTIVE) +#define BNX2X_IS_NETQ_TX_QUEUE_ACTIVE(fp) \ + ((fp->netq_flags & BNX2X_NETQ_TX_QUEUE_ACTIVE) == \ + BNX2X_NETQ_TX_QUEUE_ACTIVE) + +/* NetQueue RX filter define's and macros */ +#define BNX2X_NETQ_RX_FILTER_ACTIVE 0x0001 + +#define BNX2X_IS_NETQ_RX_FILTER_ACTIVE(fp, i) \ + ((fp->mac_filters[i].flags & \ + BNX2X_NETQ_RX_FILTER_ACTIVE) == \ + BNX2X_NETQ_RX_FILTER_ACTIVE) + +/* For 4.1 and up we use the upper byte of the netq_flags field to store the + * supported and reserved features for this specific netq. this field is set + * once when the bnx2x is initially loaded and therefore should be preserved + * as invariant when the fp is zero'd or moved. + */ + +/* limit the number of lro queues */ +#define BNX2X_NETQ_FP_LRO_RESERVED_MAX_NUM(bp) (!CHIP_IS_E1(bp) ? 2 : 1) + +#define BNX2X_NETQ_FP_FEATURE_RESERVED_SHIFT_BIT 8 +#define BNX2X_NETQ_FP_FEATURES_RESERVED 1 + +#define BNX2X_NETQ_FP_FEATURES_RESERVED_MASK \ + (((1 << BNX2X_NETQ_FP_FEATURES_RESERVED) - 1) << \ + BNX2X_NETQ_FP_FEATURE_RESERVED_SHIFT_BIT) + +#define BNX2X_NETQ_FP_NONE_RESERVED \ + (1 << BNX2X_NETQ_FP_FEATURE_RESERVED_SHIFT_BIT) + +#define BNX2X_NETQ_FP_LRO_RESERVED \ + (0 << BNX2X_NETQ_FP_FEATURE_RESERVED_SHIFT_BIT) + + +#define BNX2X_IS_NETQ_FP_FEAT_NONE_RESERVED(fp) \ + ((fp->netq_flags & BNX2X_NETQ_FP_FEATURES_RESERVED_MASK) == \ + BNX2X_NETQ_FP_NONE_RESERVED) +#define BNX2X_IS_NETQ_FP_FEAT_LRO_RESERVED(fp) \ + ((fp->netq_flags & BNX2X_NETQ_FP_FEATURES_RESERVED_MASK) == \ + BNX2X_NETQ_FP_LRO_RESERVED) + int bnx2x_netqueue_ops(vmknetddi_queueops_op_t op, void *args); void bnx2x_reserve_netq_feature(struct bnx2x *bp); -int bnx2x_netq_sp_event(struct bnx2x *bp, struct bnx2x_fastpath *fp, - int cid, int command); void bnx2x_netq_clear_rx_queues(struct bnx2x *bp); #endif @@ -72,4 +137,112 @@ bnx2x_vmk_get_sriov_cap_pos(struct bnx2x *bp, vmk_uint16 *pos); #endif +#if (VMWARE_ESX_DDK_VERSION >= 55000) +#include +#include "hw_dump.h" + +#define BNX2X_MAX_NIC 32 +#define BNX2X_DUMPNAME "bnx2x_fwdmp" + +#define DRV_DUMP_PRELIMINARY_DATA_SIZE DBG_DMP_TRACE_BUFFER_SIZE +#define DRV_DUMP_TRACE_BUFFER_SIZE (0x800) +#define DRV_DUMP_VFC_DATA_SIZE (0x10000) +#define DRV_DUMP_IGU_DATA_SIZE (0x10000) + +#define DRV_DUMP_SPLIT_REGISTERS_SIZE_DEFUALT (0x2000) +#define DRV_DUMP_SPLIT_REGISTERS_SIZE_E1 DRV_DUMP_SPLIT_REGISTERS_SIZE_DEFUALT +#define DRV_DUMP_SPLIT_REGISTERS_SIZE_E1H DRV_DUMP_SPLIT_REGISTERS_SIZE_DEFUALT +#define DRV_DUMP_SPLIT_REGISTERS_SIZE_E2 DRV_DUMP_SPLIT_REGISTERS_SIZE_DEFUALT +#define DRV_DUMP_SPLIT_REGISTERS_SIZE_E3A0 DRV_DUMP_SPLIT_REGISTERS_SIZE_DEFUALT +#define DRV_DUMP_SPLIT_REGISTERS_SIZE_E3B0 DRV_DUMP_SPLIT_REGISTERS_SIZE_DEFUALT + +#define DRV_DUMP_EXTRA_BLOCKS_SIZE (DRV_DUMP_VFC_DATA_SIZE + \ + DRV_DUMP_IGU_DATA_SIZE) +#define DRV_DUMP_CRASH_DMP_BUF_SIZE_E1 (0xB0000 + \ + DRV_DUMP_PRELIMINARY_DATA_SIZE + \ + DRV_DUMP_EXTRA_BLOCKS_SIZE + \ + DRV_DUMP_SPLIT_REGISTERS_SIZE_E1) +#define DRV_DUMP_CRASH_DMP_BUF_SIZE_E1H (0xE0000 + \ + DRV_DUMP_PRELIMINARY_DATA_SIZE + \ + DRV_DUMP_EXTRA_BLOCKS_SIZE + \ + DRV_DUMP_SPLIT_REGISTERS_SIZE_E1H) +#define DRV_DUMP_CRASH_DMP_BUF_SIZE_E2 (0x100000 + \ + DRV_DUMP_PRELIMINARY_DATA_SIZE + \ + DRV_DUMP_EXTRA_BLOCKS_SIZE + \ + DRV_DUMP_SPLIT_REGISTERS_SIZE_E2) +#define DRV_DUMP_CRASH_DMP_BUF_SIZE_E3A0 (0x140000 + \ + DRV_DUMP_PRELIMINARY_DATA_SIZE + \ + DRV_DUMP_EXTRA_BLOCKS_SIZE + \ + DRV_DUMP_SPLIT_REGISTERS_SIZE_E3A0) +#define DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0 (0x140000 + \ + DRV_DUMP_PRELIMINARY_DATA_SIZE + \ + DRV_DUMP_EXTRA_BLOCKS_SIZE + \ + DRV_DUMP_SPLIT_REGISTERS_SIZE_E3B0) + +#define NIC_NAME_SIZE (sizeof(((struct net_device *)0)->name)) +#define DEFAULT_WAIT_INTERVAL_MICSEC 30 + +#define BNX2X_FWDMP_MARKER_END 0x454E44 + +#define RD_IND(bp, offset) esx_reg_rd_ind(bp, offset) +#define WR_IND(bp, offset, val) esx_reg_wr_ind(bp, offset, val) + +struct bnx2x_fwdmp_info { + struct bnx2x *bp; + int disable_fwdmp; +}; + +struct esx_dump_hdr { + u32 hdr_size; /* in dwords, excluding this field */ + struct hd_param dump_sign; + u32 xstorm_waitp; + u32 tstorm_waitp; + u32 ustorm_waitp; + u32 cstorm_waitp; + u16 info; + u8 idle_chk; + u8 reserved; +}; + +struct dmp_config { + u32 mode; + u32 wregs_count; + const struct wreg_addr *pwreg_addrs; + u32 regs_timer_count; + const u32 *regs_timer_status_addrs; + const u32 *regs_timer_scan_addrs; + u32 page_mode_values_count; + const u32 *page_vals; + u32 page_write_regs_count; + const u32 *page_write_regs; + u32 page_read_regs_count; + const struct reg_addr *page_read_regs; +}; + +struct fw_dmp_hdr { + u32 ver; + u32 len; + char name[NIC_NAME_SIZE]; + void *bp; + u32 chip_id; + u32 dmp_size; /*actual firmware/chip dump size */ + u32 flags; + #define FWDMP_FLAGS_SPACE_NEEDED 0x00000001 + #define FWDMP_FLAGS_LIVE_DUMP 0x00000002 + u32 reserved; +} __attribute__((packed)); + +struct chip_core_dmp { + struct fw_dmp_hdr fw_hdr; + u32 fw_dmp_buf[(DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0 - + sizeof(struct fw_dmp_hdr))]; +}; + +extern vmklnx_DumpFileHandle bnx2x_fwdmp_dh; +extern void *bnx2x_fwdmp_va; +extern struct bnx2x_fwdmp_info bnx2x_fwdmp_bp[BNX2X_MAX_NIC+1]; + +VMK_ReturnStatus bnx2x_fwdmp_callback(void *cookie, vmk_Bool liveDump); +void bnx2x_disable_esx_fwdmp(struct bnx2x *bp); +#endif #endif /* BNX2X_ESX_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_ethtool.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_ethtool.c new file mode 100644 index 0000000..61b786a --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_ethtool.c @@ -0,0 +1,3084 @@ +/* bnx2x_ethtool.c: Broadcom Everest network driver. + * + * Copyright (c) 2007-2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + * + * Maintained by: Eilon Greenstein + * Written by: Eliezer Tamir + * Based on code from Michael Chan's bnx2 driver + * UDP CSUM errata workaround by Arik Gendelman + * Slowpath and fastpath rework by Vladislav Zolotarov + * Statistics and Link management by Yitchak Gertner + * + */ + +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#include +#endif +#if (LINUX_VERSION_CODE > 0x02060f) /* BNX2X_UPSTREAM */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#endif + +#include +#include +#include +#include +#include +#include "bnx2x.h" +#include "bnx2x_cmn.h" +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + +#endif +#include "bnx2x_dump.h" +#include "bnx2x_init.h" + +/* Note: in the format strings below %s is replaced by the queue-name which is + * either its index or 'fcoe' for the fcoe queue. Make sure the format string + * length does not exceed ETH_GSTRING_LEN - MAX_QUEUE_NAME_LEN + 2 + */ +#define MAX_QUEUE_NAME_LEN 4 +static const struct { + long offset; + int size; + char string[ETH_GSTRING_LEN]; +} bnx2x_q_stats_arr[] = { +/* 1 */ { Q_STATS_OFFSET32(total_bytes_received_hi), 8, "[%s]: rx_bytes" }, + { Q_STATS_OFFSET32(total_unicast_packets_received_hi), + 8, "[%s]: rx_ucast_packets" }, + { Q_STATS_OFFSET32(total_multicast_packets_received_hi), + 8, "[%s]: rx_mcast_packets" }, + { Q_STATS_OFFSET32(total_broadcast_packets_received_hi), + 8, "[%s]: rx_bcast_packets" }, + { Q_STATS_OFFSET32(no_buff_discard_hi), 8, "[%s]: rx_discards" }, + { Q_STATS_OFFSET32(rx_err_discard_pkt), + 4, "[%s]: rx_phy_ip_err_discards"}, + { Q_STATS_OFFSET32(rx_skb_alloc_failed), + 4, "[%s]: rx_skb_alloc_discard" }, + { Q_STATS_OFFSET32(hw_csum_err), 4, "[%s]: rx_csum_offload_errors" }, + + { Q_STATS_OFFSET32(total_bytes_transmitted_hi), 8, "[%s]: tx_bytes" }, +/* 10 */{ Q_STATS_OFFSET32(total_unicast_packets_transmitted_hi), + 8, "[%s]: tx_ucast_packets" }, + { Q_STATS_OFFSET32(total_multicast_packets_transmitted_hi), + 8, "[%s]: tx_mcast_packets" }, + { Q_STATS_OFFSET32(total_broadcast_packets_transmitted_hi), + 8, "[%s]: tx_bcast_packets" }, + { Q_STATS_OFFSET32(total_tpa_aggregations_hi), + 8, "[%s]: tpa_aggregations" }, + { Q_STATS_OFFSET32(total_tpa_aggregated_frames_hi), + 8, "[%s]: tpa_aggregated_frames"}, + { Q_STATS_OFFSET32(total_tpa_bytes_hi), 8, "[%s]: tpa_bytes"}, + { Q_STATS_OFFSET32(driver_filtered_tx_pkt), + 4, "[%s]: driver_filtered_tx_pkt" } + +}; + +#define BNX2X_NUM_Q_STATS ARRAY_SIZE(bnx2x_q_stats_arr) + +static const struct { + long offset; + int size; + u32 flags; +#define STATS_FLAGS_PORT 1 +#define STATS_FLAGS_FUNC 2 +#define STATS_FLAGS_BOTH (STATS_FLAGS_FUNC | STATS_FLAGS_PORT) + char string[ETH_GSTRING_LEN]; +} bnx2x_stats_arr[] = { +/* 1 */ { STATS_OFFSET32(total_bytes_received_hi), + 8, STATS_FLAGS_BOTH, "rx_bytes" }, + { STATS_OFFSET32(error_bytes_received_hi), + 8, STATS_FLAGS_BOTH, "rx_error_bytes" }, + { STATS_OFFSET32(total_unicast_packets_received_hi), + 8, STATS_FLAGS_BOTH, "rx_ucast_packets" }, + { STATS_OFFSET32(total_multicast_packets_received_hi), + 8, STATS_FLAGS_BOTH, "rx_mcast_packets" }, + { STATS_OFFSET32(total_broadcast_packets_received_hi), + 8, STATS_FLAGS_BOTH, "rx_bcast_packets" }, + { STATS_OFFSET32(rx_stat_dot3statsfcserrors_hi), + 8, STATS_FLAGS_PORT, "rx_crc_errors" }, + { STATS_OFFSET32(rx_stat_dot3statsalignmenterrors_hi), + 8, STATS_FLAGS_PORT, "rx_align_errors" }, + { STATS_OFFSET32(rx_stat_etherstatsundersizepkts_hi), + 8, STATS_FLAGS_PORT, "rx_undersize_packets" }, + { STATS_OFFSET32(etherstatsoverrsizepkts_hi), + 8, STATS_FLAGS_PORT, "rx_oversize_packets" }, +/* 10 */{ STATS_OFFSET32(rx_stat_etherstatsfragments_hi), + 8, STATS_FLAGS_PORT, "rx_fragments" }, + { STATS_OFFSET32(rx_stat_etherstatsjabbers_hi), + 8, STATS_FLAGS_PORT, "rx_jabbers" }, + { STATS_OFFSET32(no_buff_discard_hi), + 8, STATS_FLAGS_BOTH, "rx_discards" }, + { STATS_OFFSET32(mac_filter_discard), + 4, STATS_FLAGS_PORT, "rx_filtered_packets" }, + { STATS_OFFSET32(mf_tag_discard), + 4, STATS_FLAGS_PORT, "rx_mf_tag_discard" }, + { STATS_OFFSET32(pfc_frames_received_hi), + 8, STATS_FLAGS_PORT, "pfc_frames_received" }, + { STATS_OFFSET32(pfc_frames_sent_hi), + 8, STATS_FLAGS_PORT, "pfc_frames_sent" }, + { STATS_OFFSET32(brb_drop_hi), + 8, STATS_FLAGS_PORT, "rx_brb_discard" }, + { STATS_OFFSET32(brb_truncate_hi), + 8, STATS_FLAGS_PORT, "rx_brb_truncate" }, + { STATS_OFFSET32(pause_frames_received_hi), + 8, STATS_FLAGS_PORT, "rx_pause_frames" }, + { STATS_OFFSET32(rx_stat_maccontrolframesreceived_hi), + 8, STATS_FLAGS_PORT, "rx_mac_ctrl_frames" }, + { STATS_OFFSET32(nig_timer_max), + 4, STATS_FLAGS_PORT, "rx_constant_pause_events" }, +/* 20 */{ STATS_OFFSET32(rx_err_discard_pkt), + 4, STATS_FLAGS_BOTH, "rx_phy_ip_err_discards"}, + { STATS_OFFSET32(rx_skb_alloc_failed), + 4, STATS_FLAGS_BOTH, "rx_skb_alloc_discard" }, + { STATS_OFFSET32(hw_csum_err), + 4, STATS_FLAGS_BOTH, "rx_csum_offload_errors" }, + + { STATS_OFFSET32(total_bytes_transmitted_hi), + 8, STATS_FLAGS_BOTH, "tx_bytes" }, + { STATS_OFFSET32(tx_stat_ifhcoutbadoctets_hi), + 8, STATS_FLAGS_PORT, "tx_error_bytes" }, + { STATS_OFFSET32(total_unicast_packets_transmitted_hi), + 8, STATS_FLAGS_BOTH, "tx_ucast_packets" }, + { STATS_OFFSET32(total_multicast_packets_transmitted_hi), + 8, STATS_FLAGS_BOTH, "tx_mcast_packets" }, + { STATS_OFFSET32(total_broadcast_packets_transmitted_hi), + 8, STATS_FLAGS_BOTH, "tx_bcast_packets" }, + { STATS_OFFSET32(tx_stat_dot3statsinternalmactransmiterrors_hi), + 8, STATS_FLAGS_PORT, "tx_mac_errors" }, + { STATS_OFFSET32(rx_stat_dot3statscarriersenseerrors_hi), + 8, STATS_FLAGS_PORT, "tx_carrier_errors" }, +/* 30 */{ STATS_OFFSET32(tx_stat_dot3statssinglecollisionframes_hi), + 8, STATS_FLAGS_PORT, "tx_single_collisions" }, + { STATS_OFFSET32(tx_stat_dot3statsmultiplecollisionframes_hi), + 8, STATS_FLAGS_PORT, "tx_multi_collisions" }, + { STATS_OFFSET32(tx_stat_dot3statsdeferredtransmissions_hi), + 8, STATS_FLAGS_PORT, "tx_deferred" }, + { STATS_OFFSET32(tx_stat_dot3statsexcessivecollisions_hi), + 8, STATS_FLAGS_PORT, "tx_excess_collisions" }, + { STATS_OFFSET32(tx_stat_dot3statslatecollisions_hi), + 8, STATS_FLAGS_PORT, "tx_late_collisions" }, + { STATS_OFFSET32(tx_stat_etherstatscollisions_hi), + 8, STATS_FLAGS_PORT, "tx_total_collisions" }, + { STATS_OFFSET32(tx_stat_etherstatspkts64octets_hi), + 8, STATS_FLAGS_PORT, "tx_64_byte_packets" }, + { STATS_OFFSET32(tx_stat_etherstatspkts65octetsto127octets_hi), + 8, STATS_FLAGS_PORT, "tx_65_to_127_byte_packets" }, + { STATS_OFFSET32(tx_stat_etherstatspkts128octetsto255octets_hi), + 8, STATS_FLAGS_PORT, "tx_128_to_255_byte_packets" }, + { STATS_OFFSET32(tx_stat_etherstatspkts256octetsto511octets_hi), + 8, STATS_FLAGS_PORT, "tx_256_to_511_byte_packets" }, +/* 40 */{ STATS_OFFSET32(tx_stat_etherstatspkts512octetsto1023octets_hi), + 8, STATS_FLAGS_PORT, "tx_512_to_1023_byte_packets" }, + { STATS_OFFSET32(etherstatspkts1024octetsto1522octets_hi), + 8, STATS_FLAGS_PORT, "tx_1024_to_1522_byte_packets" }, + { STATS_OFFSET32(etherstatspktsover1522octets_hi), + 8, STATS_FLAGS_PORT, "tx_1523_to_9022_byte_packets" }, + { STATS_OFFSET32(pause_frames_sent_hi), + 8, STATS_FLAGS_PORT, "tx_pause_frames" }, + { STATS_OFFSET32(total_tpa_aggregations_hi), + 8, STATS_FLAGS_FUNC, "tpa_aggregations" }, + { STATS_OFFSET32(total_tpa_aggregated_frames_hi), + 8, STATS_FLAGS_FUNC, "tpa_aggregated_frames"}, + { STATS_OFFSET32(total_tpa_bytes_hi), + 8, STATS_FLAGS_FUNC, "tpa_bytes"}, + { STATS_OFFSET32(recoverable_error), + 4, STATS_FLAGS_FUNC, "recoverable_errors" }, + { STATS_OFFSET32(unrecoverable_error), + 4, STATS_FLAGS_FUNC, "unrecoverable_errors" }, + { STATS_OFFSET32(driver_filtered_tx_pkt), + 4, STATS_FLAGS_FUNC, "driver_filtered_tx_pkt" } +}; + +#define BNX2X_NUM_STATS ARRAY_SIZE(bnx2x_stats_arr) +static int bnx2x_get_port_type(struct bnx2x *bp) +{ + int port_type; + u32 phy_idx = bnx2x_get_cur_phy_idx(bp); + switch (bp->link_params.phy[phy_idx].media_type) { + case ETH_PHY_SFP_FIBER: + case ETH_PHY_XFP_FIBER: + case ETH_PHY_KR: + case ETH_PHY_CX4: + port_type = PORT_FIBRE; + break; + case ETH_PHY_DA_TWINAX: + port_type = PORT_DA; + break; + case ETH_PHY_BASE_T: + port_type = PORT_TP; + break; + case ETH_PHY_NOT_PRESENT: + port_type = PORT_NONE; + break; + case ETH_PHY_UNSPECIFIED: + default: + port_type = PORT_OTHER; + break; + } + return port_type; +} + +static int bnx2x_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) +{ +#ifdef BNX2X_ESX_CNA /* non BNX2X_UPSTREAM */ + struct bnx2x *bp; + + if (dev->features & NETIF_F_CNA) + bp = dev->priv; + else + bp = netdev_priv(dev); +#else /* BNX2X_UPSTREAM */ + struct bnx2x *bp = netdev_priv(dev); +#endif + int cfg_idx = bnx2x_get_link_cfg_idx(bp); + + /* Dual Media boards present all available port types */ + cmd->supported = bp->port.supported[cfg_idx] | + (bp->port.supported[cfg_idx ^ 1] & + (SUPPORTED_TP | SUPPORTED_FIBRE)); + cmd->advertising = bp->port.advertising[cfg_idx]; + + if ((bp->state == BNX2X_STATE_OPEN) && (bp->link_vars.link_up)) { + if (!(bp->flags & MF_FUNC_DIS)) { + ethtool_cmd_speed_set(cmd, bp->link_vars.line_speed); + cmd->duplex = bp->link_vars.duplex; + } else { + ethtool_cmd_speed_set( + cmd, bp->link_params.req_line_speed[cfg_idx]); + cmd->duplex = bp->link_params.req_duplex[cfg_idx]; + } + + if (IS_MF(bp) && !BP_NOMCP(bp)) + ethtool_cmd_speed_set(cmd, bnx2x_get_mf_speed(bp)); + } else { + cmd->duplex = DUPLEX_UNKNOWN; + ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN); + } + + cmd->port = bnx2x_get_port_type(bp); + + cmd->phy_address = bp->mdio.prtad; + cmd->transceiver = XCVR_INTERNAL; + + if (bp->link_params.req_line_speed[cfg_idx] == SPEED_AUTO_NEG) + cmd->autoneg = AUTONEG_ENABLE; + else + cmd->autoneg = AUTONEG_DISABLE; + +#if (LINUX_VERSION_CODE >= 0x02061f) /* BNX2X_UPSTREAM */ + /* Publish LP advertised speeds and FC */ + if (bp->link_vars.link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) { + u32 status = bp->link_vars.link_status; + + cmd->lp_advertising |= ADVERTISED_Autoneg; + if (status & LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE) + cmd->lp_advertising |= ADVERTISED_Pause; + if (status & LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE) + cmd->lp_advertising |= ADVERTISED_Asym_Pause; + + if (status & LINK_STATUS_LINK_PARTNER_10THD_CAPABLE) + cmd->lp_advertising |= ADVERTISED_10baseT_Half; + if (status & LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE) + cmd->lp_advertising |= ADVERTISED_10baseT_Full; + if (status & LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE) + cmd->lp_advertising |= ADVERTISED_100baseT_Half; + if (status & LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE) + cmd->lp_advertising |= ADVERTISED_100baseT_Full; + if (status & LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE) + cmd->lp_advertising |= ADVERTISED_1000baseT_Half; + if (status & LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE) + cmd->lp_advertising |= ADVERTISED_1000baseT_Full; + if (status & LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE) + cmd->lp_advertising |= ADVERTISED_2500baseX_Full; + if (status & LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE) + cmd->lp_advertising |= ADVERTISED_10000baseT_Full; + } +#endif + + cmd->maxtxpkt = 0; + cmd->maxrxpkt = 0; + + DP(BNX2X_MSG_ETHTOOL, "ethtool_cmd: cmd %d\n" + " supported 0x%x advertising 0x%x speed %u\n" + " duplex %d port %d phy_address %d transceiver %d\n" + " autoneg %d maxtxpkt %d maxrxpkt %d\n", + cmd->cmd, cmd->supported, cmd->advertising, + ethtool_cmd_speed(cmd), + cmd->duplex, cmd->port, cmd->phy_address, cmd->transceiver, + cmd->autoneg, cmd->maxtxpkt, cmd->maxrxpkt); + + return 0; +} + +static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) +{ + struct bnx2x *bp = netdev_priv(dev); + u32 advertising, cfg_idx, old_multi_phy_config, new_multi_phy_config; + u32 speed; + + if (IS_MF_SD(bp)) + return 0; + + DP(BNX2X_MSG_ETHTOOL, "ethtool_cmd: cmd %d\n" + " supported 0x%x advertising 0x%x speed %u\n" + " duplex %d port %d phy_address %d transceiver %d\n" + " autoneg %d maxtxpkt %d maxrxpkt %d\n", + cmd->cmd, cmd->supported, cmd->advertising, + ethtool_cmd_speed(cmd), + cmd->duplex, cmd->port, cmd->phy_address, cmd->transceiver, + cmd->autoneg, cmd->maxtxpkt, cmd->maxrxpkt); + + speed = ethtool_cmd_speed(cmd); + + /* If received a request for an unknown duplex, assume full*/ + if (cmd->duplex == DUPLEX_UNKNOWN) + cmd->duplex = DUPLEX_FULL; + + if (IS_MF_SI(bp)) { + u32 part; + u32 line_speed = bp->link_vars.line_speed; + + /* use 10G if no link detected */ + if (!line_speed) + line_speed = 10000; + + if (bp->common.bc_ver < REQ_BC_VER_4_SET_MF_BW) { + DP(BNX2X_MSG_ETHTOOL, + "To set speed BC %X or higher is required, please upgrade BC\n", + REQ_BC_VER_4_SET_MF_BW); + return -EINVAL; + } + + part = (speed * 100) / line_speed; + + if (line_speed < speed || !part) { + DP(BNX2X_MSG_ETHTOOL, + "Speed setting should be in a range from 1%% to 100%% of actual line speed\n"); + return -EINVAL; + } + + if (bp->state != BNX2X_STATE_OPEN) + /* store value for following "load" */ + bp->pending_max = part; + else + bnx2x_update_max_mf_config(bp, part); + + return 0; + } + + cfg_idx = bnx2x_get_link_cfg_idx(bp); + old_multi_phy_config = bp->link_params.multi_phy_config; + switch (cmd->port) { + case PORT_TP: + if (bp->port.supported[cfg_idx] & SUPPORTED_TP) + break; /* no port change */ + + if (!(bp->port.supported[0] & SUPPORTED_TP || + bp->port.supported[1] & SUPPORTED_TP)) { + DP(BNX2X_MSG_ETHTOOL, "Unsupported port type\n"); + return -EINVAL; + } + bp->link_params.multi_phy_config &= + ~PORT_HW_CFG_PHY_SELECTION_MASK; + if (bp->link_params.multi_phy_config & + PORT_HW_CFG_PHY_SWAPPED_ENABLED) + bp->link_params.multi_phy_config |= + PORT_HW_CFG_PHY_SELECTION_SECOND_PHY; + else + bp->link_params.multi_phy_config |= + PORT_HW_CFG_PHY_SELECTION_FIRST_PHY; + break; + case PORT_FIBRE: + case PORT_DA: + if (bp->port.supported[cfg_idx] & SUPPORTED_FIBRE) + break; /* no port change */ + + if (!(bp->port.supported[0] & SUPPORTED_FIBRE || + bp->port.supported[1] & SUPPORTED_FIBRE)) { + DP(BNX2X_MSG_ETHTOOL, "Unsupported port type\n"); + return -EINVAL; + } + bp->link_params.multi_phy_config &= + ~PORT_HW_CFG_PHY_SELECTION_MASK; + if (bp->link_params.multi_phy_config & + PORT_HW_CFG_PHY_SWAPPED_ENABLED) + bp->link_params.multi_phy_config |= + PORT_HW_CFG_PHY_SELECTION_FIRST_PHY; + else + bp->link_params.multi_phy_config |= + PORT_HW_CFG_PHY_SELECTION_SECOND_PHY; + break; + default: + DP(BNX2X_MSG_ETHTOOL, "Unsupported port type\n"); + return -EINVAL; + } + /* Save new config in case command complete successfully */ + new_multi_phy_config = bp->link_params.multi_phy_config; + /* Get the new cfg_idx */ + cfg_idx = bnx2x_get_link_cfg_idx(bp); + /* Restore old config in case command failed */ + bp->link_params.multi_phy_config = old_multi_phy_config; + DP(BNX2X_MSG_ETHTOOL, "cfg_idx = %x\n", cfg_idx); + + if (cmd->autoneg == AUTONEG_ENABLE) { + u32 an_supported_speed = bp->port.supported[cfg_idx]; + if (bp->link_params.phy[EXT_PHY1].type == + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) + an_supported_speed |= (SUPPORTED_100baseT_Half | + SUPPORTED_100baseT_Full); + if (!(bp->port.supported[cfg_idx] & SUPPORTED_Autoneg)) { + DP(BNX2X_MSG_ETHTOOL, "Autoneg not supported\n"); + return -EINVAL; + } + + /* advertise the requested speed and duplex if supported */ + if (cmd->advertising & ~an_supported_speed) { + DP(BNX2X_MSG_ETHTOOL, + "Advertisement parameters are not supported\n"); + return -EINVAL; + } + + bp->link_params.req_line_speed[cfg_idx] = SPEED_AUTO_NEG; + bp->link_params.req_duplex[cfg_idx] = cmd->duplex; + bp->port.advertising[cfg_idx] = (ADVERTISED_Autoneg | + cmd->advertising); + if (cmd->advertising) { + + bp->link_params.speed_cap_mask[cfg_idx] = 0; + if (cmd->advertising & ADVERTISED_10baseT_Half) { + bp->link_params.speed_cap_mask[cfg_idx] |= + PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF; + } + if (cmd->advertising & ADVERTISED_10baseT_Full) + bp->link_params.speed_cap_mask[cfg_idx] |= + PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL; + + if (cmd->advertising & ADVERTISED_100baseT_Full) + bp->link_params.speed_cap_mask[cfg_idx] |= + PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL; + + if (cmd->advertising & ADVERTISED_100baseT_Half) { + bp->link_params.speed_cap_mask[cfg_idx] |= + PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF; + } + if (cmd->advertising & ADVERTISED_1000baseT_Half) { + bp->link_params.speed_cap_mask[cfg_idx] |= + PORT_HW_CFG_SPEED_CAPABILITY_D0_1G; + } + if (cmd->advertising & (ADVERTISED_1000baseT_Full | + ADVERTISED_1000baseKX_Full)) + bp->link_params.speed_cap_mask[cfg_idx] |= + PORT_HW_CFG_SPEED_CAPABILITY_D0_1G; + + if (cmd->advertising & (ADVERTISED_10000baseT_Full | + ADVERTISED_10000baseKX4_Full | + ADVERTISED_10000baseKR_Full)) + bp->link_params.speed_cap_mask[cfg_idx] |= + PORT_HW_CFG_SPEED_CAPABILITY_D0_10G; + } + } else { /* forced speed */ + /* advertise the requested speed and duplex if supported */ + switch (speed) { + case SPEED_10: + if (cmd->duplex == DUPLEX_FULL) { + if (!(bp->port.supported[cfg_idx] & + SUPPORTED_10baseT_Full)) { + DP(BNX2X_MSG_ETHTOOL, + "10M full not supported\n"); + return -EINVAL; + } + + advertising = (ADVERTISED_10baseT_Full | + ADVERTISED_TP); + } else { + if (!(bp->port.supported[cfg_idx] & + SUPPORTED_10baseT_Half)) { + DP(BNX2X_MSG_ETHTOOL, + "10M half not supported\n"); + return -EINVAL; + } + + advertising = (ADVERTISED_10baseT_Half | + ADVERTISED_TP); + } + break; + + case SPEED_100: + if (cmd->duplex == DUPLEX_FULL) { + if (!(bp->port.supported[cfg_idx] & + SUPPORTED_100baseT_Full)) { + DP(BNX2X_MSG_ETHTOOL, + "100M full not supported\n"); + return -EINVAL; + } + + advertising = (ADVERTISED_100baseT_Full | + ADVERTISED_TP); + } else { + if (!(bp->port.supported[cfg_idx] & + SUPPORTED_100baseT_Half)) { + DP(BNX2X_MSG_ETHTOOL, + "100M half not supported\n"); + return -EINVAL; + } + + advertising = (ADVERTISED_100baseT_Half | + ADVERTISED_TP); + } + break; + + case SPEED_1000: + if (cmd->duplex != DUPLEX_FULL) { + DP(BNX2X_MSG_ETHTOOL, + "1G half not supported\n"); + return -EINVAL; + } + + if (!(bp->port.supported[cfg_idx] & + SUPPORTED_1000baseT_Full)) { + DP(BNX2X_MSG_ETHTOOL, + "1G full not supported\n"); + return -EINVAL; + } + + advertising = (ADVERTISED_1000baseT_Full | + ADVERTISED_TP); + break; + + case SPEED_2500: + if (cmd->duplex != DUPLEX_FULL) { + DP(BNX2X_MSG_ETHTOOL, + "2.5G half not supported\n"); + return -EINVAL; + } + + if (!(bp->port.supported[cfg_idx] + & SUPPORTED_2500baseX_Full)) { + DP(BNX2X_MSG_ETHTOOL, + "2.5G full not supported\n"); + return -EINVAL; + } + + advertising = (ADVERTISED_2500baseX_Full | + ADVERTISED_TP); + break; + + case SPEED_10000: + if (cmd->duplex != DUPLEX_FULL) { + DP(BNX2X_MSG_ETHTOOL, + "10G half not supported\n"); + return -EINVAL; + } + + if (!(bp->port.supported[cfg_idx] + & SUPPORTED_10000baseT_Full)) { + DP(BNX2X_MSG_ETHTOOL, + "10G full not supported\n"); + return -EINVAL; + } + + advertising = (ADVERTISED_10000baseT_Full | + ADVERTISED_FIBRE); + break; + + default: + DP(BNX2X_MSG_ETHTOOL, "Unsupported speed %u\n", speed); + return -EINVAL; + } + + bp->link_params.req_line_speed[cfg_idx] = speed; + bp->link_params.req_duplex[cfg_idx] = cmd->duplex; + bp->port.advertising[cfg_idx] = advertising; + } + + DP(BNX2X_MSG_ETHTOOL, "req_line_speed %d\n" + " req_duplex %d advertising 0x%x\n", + bp->link_params.req_line_speed[cfg_idx], + bp->link_params.req_duplex[cfg_idx], + bp->port.advertising[cfg_idx]); + + /* Set new config */ + bp->link_params.multi_phy_config = new_multi_phy_config; + if (netif_running(dev)) { + bnx2x_stats_handle(bp, STATS_EVENT_STOP); + bnx2x_link_set(bp); + } + + return 0; +} + +#define IS_E1_ONLINE(info) (((info) & RI_E1_ONLINE) == RI_E1_ONLINE) +#define IS_E1H_ONLINE(info) (((info) & RI_E1H_ONLINE) == RI_E1H_ONLINE) +#define IS_E2_ONLINE(info) (((info) & RI_E2_ONLINE) == RI_E2_ONLINE) +#define IS_E3_ONLINE(info) (((info) & RI_E3_ONLINE) == RI_E3_ONLINE) +#define IS_E3B0_ONLINE(info) (((info) & RI_E3B0_ONLINE) == RI_E3B0_ONLINE) + +static inline bool bnx2x_is_reg_online(struct bnx2x *bp, + const struct reg_addr *reg_info) +{ + if (CHIP_IS_E1(bp)) + return IS_E1_ONLINE(reg_info->info); + else if (CHIP_IS_E1H(bp)) + return IS_E1H_ONLINE(reg_info->info); + else if (CHIP_IS_E2(bp)) + return IS_E2_ONLINE(reg_info->info); + else if (CHIP_IS_E3A0(bp)) + return IS_E3_ONLINE(reg_info->info); + else if (CHIP_IS_E3B0(bp)) + return IS_E3B0_ONLINE(reg_info->info); + else + return false; +} + +/******* Paged registers info selectors ********/ +static inline const u32 *__bnx2x_get_page_addr_ar(struct bnx2x *bp) +{ + if (CHIP_IS_E2(bp)) + return page_vals_e2; + else if (CHIP_IS_E3(bp)) + return page_vals_e3; + else + return NULL; +} + +static inline u32 __bnx2x_get_page_reg_num(struct bnx2x *bp) +{ + if (CHIP_IS_E2(bp)) + return PAGE_MODE_VALUES_E2; + else if (CHIP_IS_E3(bp)) + return PAGE_MODE_VALUES_E3; + else + return 0; +} + +static inline const u32 *__bnx2x_get_page_write_ar(struct bnx2x *bp) +{ + if (CHIP_IS_E2(bp)) + return page_write_regs_e2; + else if (CHIP_IS_E3(bp)) + return page_write_regs_e3; + else + return NULL; +} + +static inline u32 __bnx2x_get_page_write_num(struct bnx2x *bp) +{ + if (CHIP_IS_E2(bp)) + return PAGE_WRITE_REGS_E2; + else if (CHIP_IS_E3(bp)) + return PAGE_WRITE_REGS_E3; + else + return 0; +} + +static inline const struct reg_addr *__bnx2x_get_page_read_ar(struct bnx2x *bp) +{ + if (CHIP_IS_E2(bp)) + return page_read_regs_e2; + else if (CHIP_IS_E3(bp)) + return page_read_regs_e3; + else + return NULL; +} + +static inline u32 __bnx2x_get_page_read_num(struct bnx2x *bp) +{ + if (CHIP_IS_E2(bp)) + return PAGE_READ_REGS_E2; + else if (CHIP_IS_E3(bp)) + return PAGE_READ_REGS_E3; + else + return 0; +} + +static inline int __bnx2x_get_regs_len(struct bnx2x *bp) +{ + int num_pages = __bnx2x_get_page_reg_num(bp); + int page_write_num = __bnx2x_get_page_write_num(bp); + const struct reg_addr *page_read_addr = __bnx2x_get_page_read_ar(bp); + int page_read_num = __bnx2x_get_page_read_num(bp); + int regdump_len = 0; + int i, j, k; + + for (i = 0; i < REGS_COUNT; i++) + if (bnx2x_is_reg_online(bp, ®_addrs[i])) + regdump_len += reg_addrs[i].size; + + for (i = 0; i < num_pages; i++) + for (j = 0; j < page_write_num; j++) + for (k = 0; k < page_read_num; k++) + if (bnx2x_is_reg_online(bp, &page_read_addr[k])) + regdump_len += page_read_addr[k].size; + + return regdump_len; +} + +static int bnx2x_get_regs_len(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + int regdump_len = 0; + + regdump_len = __bnx2x_get_regs_len(bp); + regdump_len *= 4; + regdump_len += sizeof(struct dump_hdr); + + return regdump_len; +} + +/** + * bnx2x_read_pages_regs - read "paged" registers + * + * @bp device handle + * @p output buffer + * + * Reads "paged" memories: memories that may only be read by first writing to a + * specific address ("write address") and then reading from a specific address + * ("read address"). There may be more than one write address per "page" and + * more than one read address per write address. + */ +static inline void bnx2x_read_pages_regs(struct bnx2x *bp, u32 *p) +{ + u32 i, j, k, n; + /* addresses of the paged registers */ + const u32 *page_addr = __bnx2x_get_page_addr_ar(bp); + /* number of paged registers */ + int num_pages = __bnx2x_get_page_reg_num(bp); + /* write addresses */ + const u32 *write_addr = __bnx2x_get_page_write_ar(bp); + /* number of write addresses */ + int write_num = __bnx2x_get_page_write_num(bp); + /* read addresses info */ + const struct reg_addr *read_addr = __bnx2x_get_page_read_ar(bp); + /* number of read addresses */ + int read_num = __bnx2x_get_page_read_num(bp); + + for (i = 0; i < num_pages; i++) { + for (j = 0; j < write_num; j++) { + REG_WR(bp, write_addr[j], page_addr[i]); + for (k = 0; k < read_num; k++) + if (bnx2x_is_reg_online(bp, &read_addr[k])) + for (n = 0; n < + read_addr[k].size; n++) + *p++ = REG_RD(bp, + read_addr[k].addr + n*4); + } + } +} + +static inline void __bnx2x_get_regs(struct bnx2x *bp, u32 *p) +{ + u32 i, j; + + /* Read the regular registers */ + for (i = 0; i < REGS_COUNT; i++) + if (bnx2x_is_reg_online(bp, ®_addrs[i])) + for (j = 0; j < reg_addrs[i].size; j++) + *p++ = REG_RD(bp, reg_addrs[i].addr + j*4); + + /* Read "paged" registes */ + bnx2x_read_pages_regs(bp, p); +} + +static void bnx2x_get_regs(struct net_device *dev, + struct ethtool_regs *regs, void *_p) +{ + u32 *p = _p; + struct bnx2x *bp = netdev_priv(dev); + struct dump_hdr dump_hdr = {0}; + + regs->version = 0; + memset(p, 0, regs->len); + + if (!netif_running(bp->dev)) + return; + + /* Disable parity attentions as long as following dump may + * cause false alarms by reading never written registers. We + * will re-enable parity attentions right after the dump. + */ + bnx2x_disable_blocks_parity(bp); + + dump_hdr.hdr_size = (sizeof(struct dump_hdr) / 4) - 1; + dump_hdr.dump_sign = dump_sign_all; + dump_hdr.xstorm_waitp = REG_RD(bp, XSTORM_WAITP_ADDR); + dump_hdr.tstorm_waitp = REG_RD(bp, TSTORM_WAITP_ADDR); + dump_hdr.ustorm_waitp = REG_RD(bp, USTORM_WAITP_ADDR); + dump_hdr.cstorm_waitp = REG_RD(bp, CSTORM_WAITP_ADDR); + + if (CHIP_IS_E1(bp)) + dump_hdr.info = RI_E1_ONLINE; + else if (CHIP_IS_E1H(bp)) + dump_hdr.info = RI_E1H_ONLINE; + else if (!CHIP_IS_E1x(bp)) + dump_hdr.info = RI_E2_ONLINE | + (BP_PATH(bp) ? RI_PATH1_DUMP : RI_PATH0_DUMP); + + memcpy(p, &dump_hdr, sizeof(struct dump_hdr)); + p += dump_hdr.hdr_size + 1; + + /* Actually read the registers */ + __bnx2x_get_regs(bp, p); + + /* Re-enable parity attentions */ + bnx2x_clear_blocks_parity(bp); + bnx2x_enable_blocks_parity(bp); +} + +static void bnx2x_get_drvinfo(struct net_device *dev, + struct ethtool_drvinfo *info) +{ +#ifdef BNX2X_ESX_CNA /* non BNX2X_UPSTREAM */ + struct bnx2x *bp; + + if (dev->features & NETIF_F_CNA) + bp = dev->priv; + else + bp = netdev_priv(dev); +#else /* BNX2X_UPSTREAM */ + struct bnx2x *bp = netdev_priv(dev); +#endif + u8 phy_fw_ver[PHY_FW_VER_LEN]; + + strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); + strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); + + phy_fw_ver[0] = '\0'; + bnx2x_get_ext_phy_fw_version(&bp->link_params, + phy_fw_ver, PHY_FW_VER_LEN); + strlcpy(info->fw_version, bp->fw_ver, sizeof(info->fw_version)); + snprintf(info->fw_version + strlen(bp->fw_ver), 32 - strlen(bp->fw_ver), + "bc %d.%d.%d%s%s", + (bp->common.bc_ver & 0xff0000) >> 16, + (bp->common.bc_ver & 0xff00) >> 8, + (bp->common.bc_ver & 0xff), + ((phy_fw_ver[0] != '\0') ? " phy " : ""), phy_fw_ver); + strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); + info->n_stats = BNX2X_NUM_STATS; + info->testinfo_len = BNX2X_NUM_TESTS; + info->eedump_len = bp->common.flash_size; + info->regdump_len = bnx2x_get_regs_len(dev); +} + +static void bnx2x_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (bp->flags & NO_WOL_FLAG) { + wol->supported = 0; + wol->wolopts = 0; + } else { + wol->supported = WAKE_MAGIC; + if (bp->wol) + wol->wolopts = WAKE_MAGIC; + else + wol->wolopts = 0; + } + memset(&wol->sopass, 0, sizeof(wol->sopass)); +} + +static int bnx2x_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (wol->wolopts & ~WAKE_MAGIC) { + DP(BNX2X_MSG_ETHTOOL, "WOL not supproted\n"); + return -EINVAL; + } + + if (wol->wolopts & WAKE_MAGIC) { + if (bp->flags & NO_WOL_FLAG) { + DP(BNX2X_MSG_ETHTOOL, "WOL not supproted\n"); + return -EINVAL; + } + bp->wol = 1; + } else + bp->wol = 0; + + return 0; +} + +static u32 bnx2x_get_msglevel(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + + return bp->msg_enable; +} + +static void bnx2x_set_msglevel(struct net_device *dev, u32 level) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (capable(CAP_NET_ADMIN)) { + /* dump MCP trace */ + if (level & BNX2X_MSG_MCP) + bnx2x_fw_dump_lvl(bp, KERN_INFO); + bp->msg_enable = level; + } +} + +static int bnx2x_nway_reset(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (!bp->port.pmf) + return 0; + + if (netif_running(dev)) { + bnx2x_stats_handle(bp, STATS_EVENT_STOP); + bnx2x_link_set(bp); + } + + return 0; +} + +static u32 bnx2x_get_link(struct net_device *dev) +{ +#ifdef BNX2X_ESX_CNA /* non BNX2X_UPSTREAM */ + struct bnx2x *bp; + + if (dev->features & NETIF_F_CNA) + bp = dev->priv; + else + bp = netdev_priv(dev); +#else /* BNX2X_UPSTREAM */ + struct bnx2x *bp = netdev_priv(dev); +#endif + + if (bp->flags & MF_FUNC_DIS || (bp->state != BNX2X_STATE_OPEN)) + return 0; + + return bp->link_vars.link_up; +} + +#if (LINUX_VERSION_CODE >= 0x020418) /* BNX2X_UPSTREAM */ +static int bnx2x_get_eeprom_len(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + + return bp->common.flash_size; +} +#endif + +/* Per pf misc lock must be acquired before the per port mcp lock. Otherwise, + * had we done things the other way around, if two pfs from the same port would + * attempt to access nvram at the same time, we could run into a scenario such + * as: + * pf A takes the port lock. + * pf B succeeds in taking the same lock since they are from the same port. + * pf A takes the per pf misc lock. Performs eeprom access. + * pf A finishes. Unlocks the per pf misc lock. + * Pf B takes the lock and proceeds to perform it's own access. + * pf A unlocks the per port lock, while pf B is still working (!). + * mcp takes the per port lock and corrupts pf B's access (and/or has it's own + * access corrupted by pf B).* + */ +static int bnx2x_acquire_nvram_lock(struct bnx2x *bp) +{ + int port = BP_PORT(bp); + int count, i; + u32 val = 0; + + /* acquire HW lock: protect against other PFs in PF Direct Assignment */ + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_NVRAM); + + /* adjust timeout for emulation/FPGA */ + count = BNX2X_NVRAM_TIMEOUT_COUNT; + if (CHIP_REV_IS_SLOW(bp)) + count *= 100; + + /* request access to nvram interface */ + REG_WR(bp, MCP_REG_MCPR_NVM_SW_ARB, + (MCPR_NVM_SW_ARB_ARB_REQ_SET1 << port)); + + for (i = 0; i < count*10; i++) { + val = REG_RD(bp, MCP_REG_MCPR_NVM_SW_ARB); + if (val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port)) + break; + + udelay(5); + } + + if (!(val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port))) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "cannot get access to nvram interface\n"); + return -EBUSY; + } + + return 0; +} + +static int bnx2x_release_nvram_lock(struct bnx2x *bp) +{ + int port = BP_PORT(bp); + int count, i; + u32 val = 0; + + /* adjust timeout for emulation/FPGA */ + count = BNX2X_NVRAM_TIMEOUT_COUNT; + if (CHIP_REV_IS_SLOW(bp)) + count *= 100; + + /* relinquish nvram interface */ + REG_WR(bp, MCP_REG_MCPR_NVM_SW_ARB, + (MCPR_NVM_SW_ARB_ARB_REQ_CLR1 << port)); + + for (i = 0; i < count*10; i++) { + val = REG_RD(bp, MCP_REG_MCPR_NVM_SW_ARB); + if (!(val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port))) + break; + + udelay(5); + } + + if (val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "cannot free access to nvram interface\n"); + return -EBUSY; + } + + /* release HW lock: protect against other PFs in PF Direct Assignment */ + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_NVRAM); + return 0; +} + +static void bnx2x_enable_nvram_access(struct bnx2x *bp) +{ + u32 val; + + val = REG_RD(bp, MCP_REG_MCPR_NVM_ACCESS_ENABLE); + + /* enable both bits, even on read */ + REG_WR(bp, MCP_REG_MCPR_NVM_ACCESS_ENABLE, + (val | MCPR_NVM_ACCESS_ENABLE_EN | + MCPR_NVM_ACCESS_ENABLE_WR_EN)); +} + +static void bnx2x_disable_nvram_access(struct bnx2x *bp) +{ + u32 val; + + val = REG_RD(bp, MCP_REG_MCPR_NVM_ACCESS_ENABLE); + + /* disable both bits, even after read */ + REG_WR(bp, MCP_REG_MCPR_NVM_ACCESS_ENABLE, + (val & ~(MCPR_NVM_ACCESS_ENABLE_EN | + MCPR_NVM_ACCESS_ENABLE_WR_EN))); +} + +static int bnx2x_nvram_read_dword(struct bnx2x *bp, u32 offset, __be32 *ret_val, + u32 cmd_flags) +{ + int count, i, rc; + u32 val; + + /* build the command word */ + cmd_flags |= MCPR_NVM_COMMAND_DOIT; + + /* need to clear DONE bit separately */ + REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, MCPR_NVM_COMMAND_DONE); + + /* address of the NVRAM to read from */ + REG_WR(bp, MCP_REG_MCPR_NVM_ADDR, + (offset & MCPR_NVM_ADDR_NVM_ADDR_VALUE)); + + /* issue a read command */ + REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); + + /* adjust timeout for emulation/FPGA */ + count = BNX2X_NVRAM_TIMEOUT_COUNT; + if (CHIP_REV_IS_SLOW(bp)) + count *= 100; + + /* wait for completion */ + *ret_val = 0; + rc = -EBUSY; + for (i = 0; i < count; i++) { + udelay(5); + val = REG_RD(bp, MCP_REG_MCPR_NVM_COMMAND); + + if (val & MCPR_NVM_COMMAND_DONE) { + val = REG_RD(bp, MCP_REG_MCPR_NVM_READ); + /* we read nvram data in cpu order + * but ethtool sees it as an array of bytes + * converting to big-endian will do the work */ + *ret_val = cpu_to_be32(val); + rc = 0; + break; + } + } + if (rc == -EBUSY) + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "nvram read timeout expired\n"); + return rc; +} + +static int bnx2x_nvram_read(struct bnx2x *bp, u32 offset, u8 *ret_buf, + int buf_size) +{ + int rc; + u32 cmd_flags; + __be32 val; + + if ((offset & 0x03) || (buf_size & 0x03) || (buf_size == 0)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "Invalid parameter: offset 0x%x buf_size 0x%x\n", + offset, buf_size); + return -EINVAL; + } + + if (offset + buf_size > bp->common.flash_size) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "Invalid parameter: offset (0x%x) + buf_size (0x%x) > flash_size (0x%x)\n", + offset, buf_size, bp->common.flash_size); + return -EINVAL; + } + + /* request access to nvram interface */ + rc = bnx2x_acquire_nvram_lock(bp); + if (rc) + return rc; + + /* enable access to nvram interface */ + bnx2x_enable_nvram_access(bp); + + /* read the first word(s) */ + cmd_flags = MCPR_NVM_COMMAND_FIRST; + while ((buf_size > sizeof(u32)) && (rc == 0)) { + rc = bnx2x_nvram_read_dword(bp, offset, &val, cmd_flags); + memcpy(ret_buf, &val, 4); + + /* advance to the next dword */ + offset += sizeof(u32); + ret_buf += sizeof(u32); + buf_size -= sizeof(u32); + cmd_flags = 0; + } + + if (rc == 0) { + cmd_flags |= MCPR_NVM_COMMAND_LAST; + rc = bnx2x_nvram_read_dword(bp, offset, &val, cmd_flags); + memcpy(ret_buf, &val, 4); + } + + /* disable access to nvram interface */ + bnx2x_disable_nvram_access(bp); + bnx2x_release_nvram_lock(bp); + + return rc; +} + +static int bnx2x_get_eeprom(struct net_device *dev, + struct ethtool_eeprom *eeprom, u8 *eebuf) +{ + struct bnx2x *bp = netdev_priv(dev); + int rc; + + if (!netif_running(dev)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "cannot access eeprom when the interface is down\n"); + return -EAGAIN; + } + + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, "ethtool_eeprom: cmd %d\n" + " magic 0x%x offset 0x%x (%d) len 0x%x (%d)\n", + eeprom->cmd, eeprom->magic, eeprom->offset, eeprom->offset, + eeprom->len, eeprom->len); + + /* parameters already validated in ethtool_get_eeprom */ + + rc = bnx2x_nvram_read(bp, eeprom->offset, eebuf, eeprom->len); + + return rc; +} + +static int bnx2x_nvram_write_dword(struct bnx2x *bp, u32 offset, u32 val, + u32 cmd_flags) +{ + int count, i, rc; + + /* build the command word */ + cmd_flags |= MCPR_NVM_COMMAND_DOIT | MCPR_NVM_COMMAND_WR; + + /* need to clear DONE bit separately */ + REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, MCPR_NVM_COMMAND_DONE); + + /* write the data */ + REG_WR(bp, MCP_REG_MCPR_NVM_WRITE, val); + + /* address of the NVRAM to write to */ + REG_WR(bp, MCP_REG_MCPR_NVM_ADDR, + (offset & MCPR_NVM_ADDR_NVM_ADDR_VALUE)); + + /* issue the write command */ + REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); + + /* adjust timeout for emulation/FPGA */ + count = BNX2X_NVRAM_TIMEOUT_COUNT; + if (CHIP_REV_IS_SLOW(bp)) + count *= 100; + + /* wait for completion */ + rc = -EBUSY; + for (i = 0; i < count; i++) { + udelay(5); + val = REG_RD(bp, MCP_REG_MCPR_NVM_COMMAND); + if (val & MCPR_NVM_COMMAND_DONE) { + rc = 0; + break; + } + } + + if (rc == -EBUSY) + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "nvram write timeout expired\n"); + return rc; +} + +#define BYTE_OFFSET(offset) (8 * (offset & 0x03)) + +static int bnx2x_nvram_write1(struct bnx2x *bp, u32 offset, u8 *data_buf, + int buf_size) +{ + int rc; + u32 cmd_flags; + u32 align_offset; + __be32 val; + + if (offset + buf_size > bp->common.flash_size) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "Invalid parameter: offset (0x%x) + buf_size (0x%x) > flash_size (0x%x)\n", + offset, buf_size, bp->common.flash_size); + return -EINVAL; + } + + /* request access to nvram interface */ + rc = bnx2x_acquire_nvram_lock(bp); + if (rc) + return rc; + + /* enable access to nvram interface */ + bnx2x_enable_nvram_access(bp); + + cmd_flags = (MCPR_NVM_COMMAND_FIRST | MCPR_NVM_COMMAND_LAST); + align_offset = (offset & ~0x03); + rc = bnx2x_nvram_read_dword(bp, align_offset, &val, cmd_flags); + + if (rc == 0) { + val &= ~(0xff << BYTE_OFFSET(offset)); + val |= (*data_buf << BYTE_OFFSET(offset)); + + /* nvram data is returned as an array of bytes + * convert it back to cpu order */ + val = be32_to_cpu(val); + + rc = bnx2x_nvram_write_dword(bp, align_offset, val, + cmd_flags); + } + + /* disable access to nvram interface */ + bnx2x_disable_nvram_access(bp); + bnx2x_release_nvram_lock(bp); + + return rc; +} + +static int bnx2x_nvram_write(struct bnx2x *bp, u32 offset, u8 *data_buf, + int buf_size) +{ + int rc; + u32 cmd_flags; + u32 val; + u32 written_so_far; + + if (buf_size == 1) /* ethtool */ + return bnx2x_nvram_write1(bp, offset, data_buf, buf_size); + + if ((offset & 0x03) || (buf_size & 0x03) || (buf_size == 0)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "Invalid parameter: offset 0x%x buf_size 0x%x\n", + offset, buf_size); + return -EINVAL; + } + + if (offset + buf_size > bp->common.flash_size) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "Invalid parameter: offset (0x%x) + buf_size (0x%x) > flash_size (0x%x)\n", + offset, buf_size, bp->common.flash_size); + return -EINVAL; + } + + /* request access to nvram interface */ + rc = bnx2x_acquire_nvram_lock(bp); + if (rc) + return rc; + + /* enable access to nvram interface */ + bnx2x_enable_nvram_access(bp); + + written_so_far = 0; + cmd_flags = MCPR_NVM_COMMAND_FIRST; + while ((written_so_far < buf_size) && (rc == 0)) { + if (written_so_far == (buf_size - sizeof(u32))) + cmd_flags |= MCPR_NVM_COMMAND_LAST; + else if (((offset + 4) % BNX2X_NVRAM_PAGE_SIZE) == 0) + cmd_flags |= MCPR_NVM_COMMAND_LAST; + else if ((offset % BNX2X_NVRAM_PAGE_SIZE) == 0) + cmd_flags |= MCPR_NVM_COMMAND_FIRST; + + memcpy(&val, data_buf, 4); + + rc = bnx2x_nvram_write_dword(bp, offset, val, cmd_flags); + + /* advance to the next dword */ + offset += sizeof(u32); + data_buf += sizeof(u32); + written_so_far += sizeof(u32); + cmd_flags = 0; + } + + /* disable access to nvram interface */ + bnx2x_disable_nvram_access(bp); + bnx2x_release_nvram_lock(bp); + + return rc; +} + +static int bnx2x_set_eeprom(struct net_device *dev, + struct ethtool_eeprom *eeprom, u8 *eebuf) +{ + struct bnx2x *bp = netdev_priv(dev); + int port = BP_PORT(bp); + int rc = 0; + u32 ext_phy_config; + if (!netif_running(dev)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "cannot access eeprom when the interface is down\n"); + return -EAGAIN; + } + + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, "ethtool_eeprom: cmd %d\n" + " magic 0x%x offset 0x%x (%d) len 0x%x (%d)\n", + eeprom->cmd, eeprom->magic, eeprom->offset, eeprom->offset, + eeprom->len, eeprom->len); + + /* parameters already validated in ethtool_set_eeprom */ + + /* PHY eeprom can be accessed only by the PMF */ + if ((eeprom->magic >= 0x50485900) && (eeprom->magic <= 0x504859FF) && + !bp->port.pmf) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "wrong magic or interface is not pmf\n"); + return -EINVAL; + } + + ext_phy_config = + SHMEM_RD(bp, + dev_info.port_hw_config[port].external_phy_config); + + if (eeprom->magic == 0x50485950) { + /* 'PHYP' (0x50485950): prepare phy for FW upgrade */ + bnx2x_stats_handle(bp, STATS_EVENT_STOP); + + bnx2x_acquire_phy_lock(bp); + rc |= bnx2x_link_reset(&bp->link_params, + &bp->link_vars, 0); + if (XGXS_EXT_PHY_TYPE(ext_phy_config) == + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101) + bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, + MISC_REGISTERS_GPIO_HIGH, port); + bnx2x_release_phy_lock(bp); + bnx2x_link_report(bp); + + } else if (eeprom->magic == 0x50485952) { + /* 'PHYR' (0x50485952): re-init link after FW upgrade */ + if (bp->state == BNX2X_STATE_OPEN) { + bnx2x_acquire_phy_lock(bp); + rc |= bnx2x_link_reset(&bp->link_params, + &bp->link_vars, 1); + + rc |= bnx2x_phy_init(&bp->link_params, + &bp->link_vars); + bnx2x_release_phy_lock(bp); + bnx2x_calc_fc_adv(bp); + } + } else if (eeprom->magic == 0x53985943) { + /* 'PHYC' (0x53985943): PHY FW upgrade completed */ + if (XGXS_EXT_PHY_TYPE(ext_phy_config) == + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101) { + + /* DSP Remove Download Mode */ + bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, + MISC_REGISTERS_GPIO_LOW, port); + + bnx2x_acquire_phy_lock(bp); + + bnx2x_sfx7101_sp_sw_reset(bp, + &bp->link_params.phy[EXT_PHY1]); + + /* wait 0.5 sec to allow it to run */ + msleep(500); + bnx2x_ext_phy_hw_reset(bp, port); + msleep(500); + bnx2x_release_phy_lock(bp); + } + } else + rc = bnx2x_nvram_write(bp, eeprom->offset, eebuf, eeprom->len); + + return rc; +} + +static int bnx2x_get_coalesce(struct net_device *dev, + struct ethtool_coalesce *coal) +{ + struct bnx2x *bp = netdev_priv(dev); + + memset(coal, 0, sizeof(struct ethtool_coalesce)); + + coal->rx_coalesce_usecs = bp->rx_ticks; + coal->tx_coalesce_usecs = bp->tx_ticks; + + return 0; +} + +static int bnx2x_set_coalesce(struct net_device *dev, + struct ethtool_coalesce *coal) +{ + struct bnx2x *bp = netdev_priv(dev); + + bp->rx_ticks = (u16)coal->rx_coalesce_usecs; + if (bp->rx_ticks > BNX2X_MAX_COALESCE_TOUT) + bp->rx_ticks = BNX2X_MAX_COALESCE_TOUT; + + bp->tx_ticks = (u16)coal->tx_coalesce_usecs; + if (bp->tx_ticks > BNX2X_MAX_COALESCE_TOUT) + bp->tx_ticks = BNX2X_MAX_COALESCE_TOUT; + + if (netif_running(dev)) + bnx2x_update_coalesce(bp); + + return 0; +} + +static void bnx2x_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *ering) +{ + struct bnx2x *bp = netdev_priv(dev); + + ering->rx_max_pending = MAX_RX_AVAIL; + + if (bp->rx_ring_size) + ering->rx_pending = bp->rx_ring_size; + else + ering->rx_pending = MAX_RX_AVAIL; + + ering->tx_max_pending = IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL; + ering->tx_pending = bp->tx_ring_size; +} + +static int bnx2x_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *ering) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (bp->recovery_state != BNX2X_RECOVERY_DONE) { + DP(BNX2X_MSG_ETHTOOL, + "Handling parity error recovery. Try again later\n"); + return -EAGAIN; + } + + if ((ering->rx_pending > MAX_RX_AVAIL) || + (ering->rx_pending < MIN_RX_SIZE_TPA) || + (ering->tx_pending > (IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL)) || + (ering->tx_pending <= MAX_SKB_FRAGS + 4)) { + DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n"); + return -EINVAL; + } + + bp->rx_ring_size = ering->rx_pending; + bp->tx_ring_size = ering->tx_pending; + + return bnx2x_reload_if_running(dev); +} + +static void bnx2x_get_pauseparam(struct net_device *dev, + struct ethtool_pauseparam *epause) +{ + struct bnx2x *bp = netdev_priv(dev); + int cfg_idx = bnx2x_get_link_cfg_idx(bp); + int cfg_reg; + + epause->autoneg = (bp->link_params.req_flow_ctrl[cfg_idx] == + BNX2X_FLOW_CTRL_AUTO); + + if (!epause->autoneg) + cfg_reg = bp->link_params.req_flow_ctrl[cfg_idx]; + else + cfg_reg = bp->link_params.req_fc_auto_adv; + + epause->rx_pause = ((cfg_reg & BNX2X_FLOW_CTRL_RX) == + BNX2X_FLOW_CTRL_RX); + epause->tx_pause = ((cfg_reg & BNX2X_FLOW_CTRL_TX) == + BNX2X_FLOW_CTRL_TX); + + DP(BNX2X_MSG_ETHTOOL, "ethtool_pauseparam: cmd %d\n" + " autoneg %d rx_pause %d tx_pause %d\n", + epause->cmd, epause->autoneg, epause->rx_pause, epause->tx_pause); +} + +static int bnx2x_set_pauseparam(struct net_device *dev, + struct ethtool_pauseparam *epause) +{ + struct bnx2x *bp = netdev_priv(dev); + u32 cfg_idx = bnx2x_get_link_cfg_idx(bp); + if (IS_MF(bp)) + return 0; + + DP(BNX2X_MSG_ETHTOOL, "ethtool_pauseparam: cmd %d\n" + " autoneg %d rx_pause %d tx_pause %d\n", + epause->cmd, epause->autoneg, epause->rx_pause, epause->tx_pause); + + bp->link_params.req_flow_ctrl[cfg_idx] = BNX2X_FLOW_CTRL_AUTO; + + if (epause->rx_pause) + bp->link_params.req_flow_ctrl[cfg_idx] |= BNX2X_FLOW_CTRL_RX; + + if (epause->tx_pause) + bp->link_params.req_flow_ctrl[cfg_idx] |= BNX2X_FLOW_CTRL_TX; + + if (bp->link_params.req_flow_ctrl[cfg_idx] == BNX2X_FLOW_CTRL_AUTO) + bp->link_params.req_flow_ctrl[cfg_idx] = BNX2X_FLOW_CTRL_NONE; + + if (epause->autoneg) { + if (!(bp->port.supported[cfg_idx] & SUPPORTED_Autoneg)) { + DP(BNX2X_MSG_ETHTOOL, "autoneg not supported\n"); + return -EINVAL; + } + + if (bp->link_params.req_line_speed[cfg_idx] == SPEED_AUTO_NEG) { + bp->link_params.req_flow_ctrl[cfg_idx] = + BNX2X_FLOW_CTRL_AUTO; + } + } + + DP(BNX2X_MSG_ETHTOOL, + "req_flow_ctrl 0x%x\n", bp->link_params.req_flow_ctrl[cfg_idx]); + + if (netif_running(dev)) { + bnx2x_stats_handle(bp, STATS_EVENT_STOP); + bnx2x_link_set(bp); + } + + return 0; +} + +#if (LINUX_VERSION_CODE < 0x020627) /* ! BNX2X_UPSTREAM */ +#if (LINUX_VERSION_CODE >= 0x02061a) +static int bnx2x_set_flags(struct net_device *dev, u32 data) +{ + struct bnx2x *bp = netdev_priv(dev); + int rc = 0; + + if (bp->recovery_state != BNX2X_RECOVERY_DONE) { + DP(BNX2X_MSG_ETHTOOL, + "Handling parity error recovery. Try again later\n"); + return -EAGAIN; + } + +#if (LINUX_VERSION_CODE >= 0x020625) + if (!(data & ETH_FLAG_RXVLAN)) { + DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n"); + return -EINVAL; + } +#endif + + if ((data & ETH_FLAG_LRO) && bp->rx_csum && bp->disable_tpa) { + DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n"); + return -EINVAL; + } + +#if (LINUX_VERSION_CODE >= 0x020624) + rc = ethtool_op_set_flags(dev, data, ETH_FLAG_LRO | ETH_FLAG_RXVLAN | + ETH_FLAG_TXVLAN | ETH_FLAG_RXHASH); +#else + rc = bnx2x_ethtool_op_set_flags(dev, data, + ETH_FLAG_LRO | ETH_FLAG_RXVLAN | + ETH_FLAG_TXVLAN | ETH_FLAG_RXHASH); +#endif + if (rc) + return rc; + + /* TPA requires Rx CSUM offloading */ + if ((data & ETH_FLAG_LRO) && bp->rx_csum) + bp->flags |= TPA_ENABLE_FLAG; + else { + dev->features &= ~NETIF_F_LRO; + bp->flags &= ~TPA_ENABLE_FLAG; + } + + return bnx2x_reload_if_running(dev); +} +#endif + +static u32 bnx2x_get_rx_csum(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + + return bp->rx_csum; +} + +static int bnx2x_set_rx_csum(struct net_device *dev, u32 data) +{ + struct bnx2x *bp = netdev_priv(dev); + int rc = 0; + + if (bp->recovery_state != BNX2X_RECOVERY_DONE) { + DP(BNX2X_MSG_ETHTOOL, + "Handling parity error recovery. Try again later\n"); + return -EAGAIN; + } + + bp->rx_csum = data; + + /* Disable TPA/GRO, when Rx CSUM is disabled. Otherwise all + * TPA'ed packets will be discarded due to wrong TCP CSUM + */ + if (!data) { +#if (LINUX_VERSION_CODE >= 0x02061a) + u32 flags = ethtool_op_get_flags(dev); + + bp->flags &= ~GRO_ENABLE_FLAG; + + rc = bnx2x_set_flags(dev, (flags & ~ETH_FLAG_LRO)); +#else + bp->flags &= ~TPA_ENABLE_FLAG; + bp->flags &= ~GRO_ENABLE_FLAG; + + rc = bnx2x_reload_if_running(dev); +#endif + } else { + bp->flags |= GRO_ENABLE_FLAG; + rc = bnx2x_reload_if_running(dev); + } + + return rc; +} + +#ifdef NETIF_F_TSO +static int bnx2x_set_tso(struct net_device *dev, u32 data) +{ + if (data) { + dev->features |= (NETIF_F_TSO | NETIF_F_TSO_ECN); +#ifdef NETIF_F_TSO6 + dev->features |= NETIF_F_TSO6; +#endif + } else { + dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO_ECN); +#ifdef NETIF_F_TSO6 + dev->features &= ~NETIF_F_TSO6; +#endif + } + + return 0; +} +#endif +#endif /* < 0x020627*/ + +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +char *bnx2x_tests_str_arr[8] = { + "register_test (offline) ", + "memory_test (offline) ", + "int_loopback_test (offline)", + "ext_loopback_test (offline)", + "nvram_test (online) ", + "interrupt_test (online) ", + "link_test (online) ", + "idle check (online) " +}; +#else /* BNX2X_UPSTREAM */ +char *bnx2x_tests_str_arr[7] = { + "register_test (offline) ", + "memory_test (offline) ", + "int_loopback_test (offline)", + "ext_loopback_test (offline)", + "nvram_test (online) ", + "interrupt_test (online) ", + "link_test (online) " +}; +#endif + +enum { + BNX2X_CHIP_E1_OFST = 0, + BNX2X_CHIP_E1H_OFST, + BNX2X_CHIP_E2_OFST, + BNX2X_CHIP_E3_OFST, + BNX2X_CHIP_E3B0_OFST, + BNX2X_CHIP_MAX_OFST +}; + +#define BNX2X_CHIP_MASK_E1 (1 << BNX2X_CHIP_E1_OFST) +#define BNX2X_CHIP_MASK_E1H (1 << BNX2X_CHIP_E1H_OFST) +#define BNX2X_CHIP_MASK_E2 (1 << BNX2X_CHIP_E2_OFST) +#define BNX2X_CHIP_MASK_E3 (1 << BNX2X_CHIP_E3_OFST) +#define BNX2X_CHIP_MASK_E3B0 (1 << BNX2X_CHIP_E3B0_OFST) + +#define BNX2X_CHIP_MASK_ALL ((1 << BNX2X_CHIP_MAX_OFST) - 1) +#define BNX2X_CHIP_MASK_E1X (BNX2X_CHIP_MASK_E1 | BNX2X_CHIP_MASK_E1H) + +static int bnx2x_test_registers(struct bnx2x *bp) +{ + int idx, i, rc = -ENODEV; + u32 wr_val = 0, hw; + int port = BP_PORT(bp); + static const struct { + u32 hw; + u32 offset0; + u32 offset1; + u32 mask; + } reg_tbl[] = { +/* 0 */ { BNX2X_CHIP_MASK_ALL, + BRB1_REG_PAUSE_LOW_THRESHOLD_0, 4, 0x000003ff }, + { BNX2X_CHIP_MASK_ALL, + DORQ_REG_DB_ADDR0, 4, 0xffffffff }, + { BNX2X_CHIP_MASK_E1X, + HC_REG_AGG_INT_0, 4, 0x000003ff }, + { BNX2X_CHIP_MASK_ALL, + PBF_REG_MAC_IF0_ENABLE, 4, 0x00000001 }, + { BNX2X_CHIP_MASK_E1X | BNX2X_CHIP_MASK_E2 | BNX2X_CHIP_MASK_E3, + PBF_REG_P0_INIT_CRD, 4, 0x000007ff }, + { BNX2X_CHIP_MASK_E3B0, + PBF_REG_INIT_CRD_Q0, 4, 0x000007ff }, + { BNX2X_CHIP_MASK_ALL, + PRS_REG_CID_PORT_0, 4, 0x00ffffff }, + { BNX2X_CHIP_MASK_ALL, + PXP2_REG_PSWRQ_CDU0_L2P, 4, 0x000fffff }, + { BNX2X_CHIP_MASK_ALL, + PXP2_REG_RQ_CDU0_EFIRST_MEM_ADDR, 8, 0x0003ffff }, + { BNX2X_CHIP_MASK_ALL, + PXP2_REG_PSWRQ_TM0_L2P, 4, 0x000fffff }, +/* 10 */ { BNX2X_CHIP_MASK_ALL, + PXP2_REG_RQ_USDM0_EFIRST_MEM_ADDR, 8, 0x0003ffff }, + { BNX2X_CHIP_MASK_ALL, + PXP2_REG_PSWRQ_TSDM0_L2P, 4, 0x000fffff }, + { BNX2X_CHIP_MASK_ALL, + QM_REG_CONNNUM_0, 4, 0x000fffff }, + { BNX2X_CHIP_MASK_ALL, + TM_REG_LIN0_MAX_ACTIVE_CID, 4, 0x0003ffff }, + { BNX2X_CHIP_MASK_ALL, + SRC_REG_KEYRSS0_0, 40, 0xffffffff }, + { BNX2X_CHIP_MASK_ALL, + SRC_REG_KEYRSS0_7, 40, 0xffffffff }, + { BNX2X_CHIP_MASK_ALL, + XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 4, 0x00000001 }, + { BNX2X_CHIP_MASK_ALL, + XCM_REG_WU_DA_CNT_CMD00, 4, 0x00000003 }, + { BNX2X_CHIP_MASK_ALL, + XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 4, 0x000000ff }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_T_BIT, 4, 0x00000001 }, +/* 20 */ { BNX2X_CHIP_MASK_E1X | BNX2X_CHIP_MASK_E2, + NIG_REG_EMAC0_IN_EN, 4, 0x00000001 }, + { BNX2X_CHIP_MASK_E1X | BNX2X_CHIP_MASK_E2, + NIG_REG_BMAC0_IN_EN, 4, 0x00000001 }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_XCM0_OUT_EN, 4, 0x00000001 }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_BRB0_OUT_EN, 4, 0x00000001 }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_XCM_MASK, 4, 0x00000007 }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_ACPI_PAT_6_LEN, 68, 0x000000ff }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_ACPI_PAT_0_CRC, 68, 0xffffffff }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_DEST_MAC_0_0, 160, 0xffffffff }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_DEST_IP_0_1, 160, 0xffffffff }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_IPV4_IPV6_0, 160, 0x00000001 }, +/* 30 */ { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_DEST_UDP_0, 160, 0x0000ffff }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_DEST_TCP_0, 160, 0x0000ffff }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LLH0_VLAN_ID_0, 160, 0x00000fff }, + { BNX2X_CHIP_MASK_E1X | BNX2X_CHIP_MASK_E2, + NIG_REG_XGXS_SERDES0_MODE_SEL, 4, 0x00000001 }, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0, 4, 0x00000001}, + { BNX2X_CHIP_MASK_ALL, + NIG_REG_STATUS_INTERRUPT_PORT0, 4, 0x07ffffff }, + { BNX2X_CHIP_MASK_E1X | BNX2X_CHIP_MASK_E2, + NIG_REG_XGXS0_CTRL_EXTREMOTEMDIOST, 24, 0x00000001 }, + { BNX2X_CHIP_MASK_E1X | BNX2X_CHIP_MASK_E2, + NIG_REG_SERDES0_CTRL_PHY_ADDR, 16, 0x0000001f }, + + { BNX2X_CHIP_MASK_ALL, 0xffffffff, 0, 0x00000000 } + }; + + if (!netif_running(bp->dev)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "cannot access eeprom when the interface is down\n"); + return rc; + } + + if (CHIP_IS_E1(bp)) + hw = BNX2X_CHIP_MASK_E1; + else if (CHIP_IS_E1H(bp)) + hw = BNX2X_CHIP_MASK_E1H; + else if (CHIP_IS_E2(bp)) + hw = BNX2X_CHIP_MASK_E2; + else if (CHIP_IS_E3B0(bp)) + hw = BNX2X_CHIP_MASK_E3B0; + else /* e3 A0 */ + hw = BNX2X_CHIP_MASK_E3; + + /* Repeat the test twice: + First by writing 0x00000000, second by writing 0xffffffff */ + for (idx = 0; idx < 2; idx++) { + + switch (idx) { + case 0: + wr_val = 0; + break; + case 1: + wr_val = 0xffffffff; + break; + } + + for (i = 0; reg_tbl[i].offset0 != 0xffffffff; i++) { + u32 offset, mask, save_val, val; + if (!(hw & reg_tbl[i].hw)) + continue; + + offset = reg_tbl[i].offset0 + port*reg_tbl[i].offset1; + mask = reg_tbl[i].mask; + + save_val = REG_RD(bp, offset); + + REG_WR(bp, offset, wr_val & mask); + + val = REG_RD(bp, offset); + + /* Restore the original register's value */ + REG_WR(bp, offset, save_val); + + /* verify value is as expected */ + if ((val & mask) != (wr_val & mask)) { + DP(BNX2X_MSG_ETHTOOL, + "offset 0x%x: val 0x%x != 0x%x mask 0x%x\n", + offset, val, wr_val, mask); + goto test_reg_exit; + } + } + } + + rc = 0; + +test_reg_exit: + return rc; +} + +static int bnx2x_test_memory(struct bnx2x *bp) +{ + int i, j, rc = -ENODEV; + u32 val, index; + static const struct { + u32 offset; + int size; + } mem_tbl[] = { + { CCM_REG_XX_DESCR_TABLE, CCM_REG_XX_DESCR_TABLE_SIZE }, + { CFC_REG_ACTIVITY_COUNTER, CFC_REG_ACTIVITY_COUNTER_SIZE }, + { CFC_REG_LINK_LIST, CFC_REG_LINK_LIST_SIZE }, + { DMAE_REG_CMD_MEM, DMAE_REG_CMD_MEM_SIZE }, + { TCM_REG_XX_DESCR_TABLE, TCM_REG_XX_DESCR_TABLE_SIZE }, + { UCM_REG_XX_DESCR_TABLE, UCM_REG_XX_DESCR_TABLE_SIZE }, + { XCM_REG_XX_DESCR_TABLE, XCM_REG_XX_DESCR_TABLE_SIZE }, + + { 0xffffffff, 0 } + }; + + static const struct { + char *name; + u32 offset; + u32 hw_mask[BNX2X_CHIP_MAX_OFST]; + } prty_tbl[] = { + { "CCM_PRTY_STS", CCM_REG_CCM_PRTY_STS, + {0x3ffc0, 0, 0, 0} }, + { "CFC_PRTY_STS", CFC_REG_CFC_PRTY_STS, + {0x2, 0x2, 0, 0} }, + { "DMAE_PRTY_STS", DMAE_REG_DMAE_PRTY_STS, + {0, 0, 0, 0} }, + { "TCM_PRTY_STS", TCM_REG_TCM_PRTY_STS, + {0x3ffc0, 0, 0, 0} }, + { "UCM_PRTY_STS", UCM_REG_UCM_PRTY_STS, + {0x3ffc0, 0, 0, 0} }, + { "XCM_PRTY_STS", XCM_REG_XCM_PRTY_STS, + {0x3ffc1, 0, 0, 0} }, + + { NULL, 0xffffffff, {0, 0, 0, 0} } + }; + + if (!netif_running(bp->dev)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "cannot access eeprom when the interface is down\n"); + return rc; + } + + if (CHIP_IS_E1(bp)) + index = BNX2X_CHIP_E1_OFST; + else if (CHIP_IS_E1H(bp)) + index = BNX2X_CHIP_E1H_OFST; + else if (CHIP_IS_E2(bp)) + index = BNX2X_CHIP_E2_OFST; + else /* e3 */ + index = BNX2X_CHIP_E3_OFST; + + /* pre-Check the parity status */ + for (i = 0; prty_tbl[i].offset != 0xffffffff; i++) { + val = REG_RD(bp, prty_tbl[i].offset); + if (val & ~(prty_tbl[i].hw_mask[index])) { + DP(BNX2X_MSG_ETHTOOL, + "%s is 0x%x\n", prty_tbl[i].name, val); + goto test_mem_exit; + } + } + + /* Go through all the memories */ + for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) + for (j = 0; j < mem_tbl[i].size; j++) + REG_RD(bp, mem_tbl[i].offset + j*4); + + /* Check the parity status */ + for (i = 0; prty_tbl[i].offset != 0xffffffff; i++) { + val = REG_RD(bp, prty_tbl[i].offset); + if (val & ~(prty_tbl[i].hw_mask[index])) { + DP(BNX2X_MSG_ETHTOOL, + "%s is 0x%x\n", prty_tbl[i].name, val); + goto test_mem_exit; + } + } + + rc = 0; + +test_mem_exit: + return rc; +} + +static void bnx2x_wait_for_link(struct bnx2x *bp, u8 link_up, u8 is_serdes) +{ + int cnt = 1400; + + if (link_up) { + while (bnx2x_link_test(bp, is_serdes) && cnt--) + msleep(20); + + if (cnt <= 0 && bnx2x_link_test(bp, is_serdes)) + DP(BNX2X_MSG_ETHTOOL, "Timeout waiting for link up\n"); + + cnt = 1400; + while (!bp->link_vars.link_up && cnt--) + msleep(20); + + if (cnt <= 0 && !bp->link_vars.link_up) + DP(BNX2X_MSG_ETHTOOL, + "Timeout waiting for link init\n"); + } +} + +static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode) +{ + unsigned int pkt_size, num_pkts, i; + struct sk_buff *skb; + unsigned char *packet; + struct bnx2x_fastpath *fp_rx = &bp->fp[0]; + struct bnx2x_fastpath *fp_tx = &bp->fp[0]; + struct bnx2x_fp_txdata *txdata = fp_tx->txdata_ptr[0]; + u16 tx_start_idx, tx_idx; + u16 rx_start_idx, rx_idx; + u16 pkt_prod, bd_prod; + struct sw_tx_bd *tx_buf; + struct eth_tx_start_bd *tx_start_bd; + struct eth_tx_parse_bd_e1x *pbd_e1x = NULL; + struct eth_tx_parse_bd_e2 *pbd_e2 = NULL; + dma_addr_t mapping; + union eth_rx_cqe *cqe; + u8 cqe_fp_flags, cqe_fp_type; + struct sw_rx_bd *rx_buf; + u16 len; + int rc = -ENODEV; + u8 *data; + struct netdev_queue *txq = netdev_get_tx_queue(bp->dev, + txdata->txq_index); + + /* check the loopback mode */ + switch (loopback_mode) { + case BNX2X_PHY_LOOPBACK: + if (bp->link_params.loopback_mode != LOOPBACK_XGXS) { + DP(BNX2X_MSG_ETHTOOL, "PHY loopback not supported\n"); + return -EINVAL; + } + break; + case BNX2X_MAC_LOOPBACK: + if (CHIP_IS_E3(bp)) { + int cfg_idx = bnx2x_get_link_cfg_idx(bp); + if (bp->port.supported[cfg_idx] & + (SUPPORTED_10000baseT_Full | + SUPPORTED_20000baseMLD2_Full | + SUPPORTED_20000baseKR2_Full)) + bp->link_params.loopback_mode = LOOPBACK_XMAC; + else + bp->link_params.loopback_mode = LOOPBACK_UMAC; + } else + bp->link_params.loopback_mode = LOOPBACK_BMAC; + + bnx2x_phy_init(&bp->link_params, &bp->link_vars); + break; + case BNX2X_EXT_LOOPBACK: + if (bp->link_params.loopback_mode != LOOPBACK_EXT) { + DP(BNX2X_MSG_ETHTOOL, + "Can't configure external loopback\n"); + return -EINVAL; + } + break; + default: + DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n"); + return -EINVAL; + } + + /* prepare the loopback packet */ + pkt_size = (((bp->dev->mtu < ETH_MAX_PACKET_SIZE) ? + bp->dev->mtu : ETH_MAX_PACKET_SIZE) + ETH_HLEN); + skb = netdev_alloc_skb(bp->dev, fp_rx->rx_buf_size); + if (!skb) { + DP(BNX2X_MSG_ETHTOOL, "Can't allocate skb\n"); + rc = -ENOMEM; + goto test_loopback_exit; + } + packet = skb_put(skb, pkt_size); + memcpy(packet, bp->dev->dev_addr, ETH_ALEN); + memset(packet + ETH_ALEN, 0, ETH_ALEN); + memset(packet + 2*ETH_ALEN, 0x77, (ETH_HLEN - 2*ETH_ALEN)); + for (i = ETH_HLEN; i < pkt_size; i++) + packet[i] = (unsigned char) (i & 0xff); +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + mapping = dma_map_single(&bp->pdev->dev, skb->data, + skb_headlen(skb), DMA_TO_DEVICE); +#else + mapping = pci_map_single(bp->pdev, skb->data, + skb_headlen(skb), PCI_DMA_TODEVICE); +#endif +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { +#else + if (unlikely(dma_mapping_error(mapping))) { +#endif + rc = -ENOMEM; + dev_kfree_skb(skb); + DP(BNX2X_MSG_ETHTOOL, "Unable to map SKB\n"); + goto test_loopback_exit; + } + + /* send the loopback packet */ + num_pkts = 0; + tx_start_idx = le16_to_cpu(*txdata->tx_cons_sb); + rx_start_idx = le16_to_cpu(*fp_rx->rx_cons_sb); + + netdev_tx_sent_queue(txq, skb->len); + + pkt_prod = txdata->tx_pkt_prod++; + tx_buf = &txdata->tx_buf_ring[TX_BD(pkt_prod)]; + tx_buf->first_bd = txdata->tx_bd_prod; + tx_buf->skb = skb; + tx_buf->flags = 0; + + bd_prod = TX_BD(txdata->tx_bd_prod); + tx_start_bd = &txdata->tx_desc_ring[bd_prod].start_bd; + tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); + tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); + tx_start_bd->nbd = cpu_to_le16(2); /* start + pbd */ + tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb)); + tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod); + tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; + SET_FLAG(tx_start_bd->general_data, + ETH_TX_START_BD_ETH_ADDR_TYPE, + UNICAST_ADDRESS); + SET_FLAG(tx_start_bd->general_data, + ETH_TX_START_BD_HDR_NBDS, + 1); + + /* turn on parsing and get a BD */ + bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); + + pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x; + pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2; + + memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2)); + memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x)); + + wmb(); + + txdata->tx_db.data.prod += 2; + barrier(); + DOORBELL(bp, txdata->cid, txdata->tx_db.raw); + + mmiowb(); + barrier(); + + num_pkts++; + txdata->tx_bd_prod += 2; /* start + pbd */ +#if (LINUX_VERSION_CODE < 0x02061f) /* ! BNX2X_UPSTREAM */ + /* In kernels starting from 2.6.31 netdev layer does this */ + bp->dev->trans_start = jiffies; +#endif + + udelay(100); + + tx_idx = le16_to_cpu(*txdata->tx_cons_sb); + if (tx_idx != tx_start_idx + num_pkts) + goto test_loopback_exit; + + /* Unlike HC IGU won't generate an interrupt for status block + * updates that have been performed while interrupts were + * disabled. + */ + if (bp->common.int_block == INT_BLOCK_IGU) { +#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ + /* Disable local BHes to prevent a dead-lock situation between + * sch_direct_xmit() and bnx2x_run_loopback() (calling + * bnx2x_tx_int()), as both are taking netif_tx_lock(). + */ + local_bh_disable(); + bnx2x_tx_int(bp, txdata); + local_bh_enable(); +#else + bnx2x_tx_int(bp, txdata); +#endif + } + + rx_idx = le16_to_cpu(*fp_rx->rx_cons_sb); + if (rx_idx != rx_start_idx + num_pkts) + goto test_loopback_exit; + + cqe = &fp_rx->rx_comp_ring[RCQ_BD(fp_rx->rx_comp_cons)]; + cqe_fp_flags = cqe->fast_path_cqe.type_error_flags; + cqe_fp_type = cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE; + if (!CQE_TYPE_FAST(cqe_fp_type) || (cqe_fp_flags & ETH_RX_ERROR_FALGS)) + goto test_loopback_rx_exit; + + len = le16_to_cpu(cqe->fast_path_cqe.pkt_len_or_gro_seg_len); + if (len != pkt_size) + goto test_loopback_rx_exit; + + rx_buf = &fp_rx->rx_buf_ring[RX_BD(fp_rx->rx_bd_cons)]; +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_sync_single_for_cpu(&bp->pdev->dev, + dma_unmap_addr(rx_buf, mapping), + fp_rx->rx_buf_size, DMA_FROM_DEVICE); +#else + pci_dma_sync_single_for_cpu(bp->pdev, + pci_unmap_addr(rx_buf, mapping), + fp_rx->rx_buf_size, PCI_DMA_FROMDEVICE); +#endif +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + data = rx_buf->data + NET_SKB_PAD + cqe->fast_path_cqe.placement_offset; +#else + skb = rx_buf->data; + skb_reserve(skb, cqe->fast_path_cqe.placement_offset); + data = skb->data; +#endif + for (i = ETH_HLEN; i < pkt_size; i++) + if (*(data + i) != (unsigned char) (i & 0xff)) + goto test_loopback_rx_exit; + + rc = 0; + +test_loopback_rx_exit: +#if (LINUX_VERSION_CODE < 0x02061b) /* ! BNX2X_UPSTREAM */ + bp->dev->last_rx = jiffies; +#endif + + fp_rx->rx_bd_cons = NEXT_RX_IDX(fp_rx->rx_bd_cons); + fp_rx->rx_bd_prod = NEXT_RX_IDX(fp_rx->rx_bd_prod); + fp_rx->rx_comp_cons = NEXT_RCQ_IDX(fp_rx->rx_comp_cons); + fp_rx->rx_comp_prod = NEXT_RCQ_IDX(fp_rx->rx_comp_prod); + + /* Update producers */ + bnx2x_update_rx_prod(bp, fp_rx, fp_rx->rx_bd_prod, fp_rx->rx_comp_prod, + fp_rx->rx_sge_prod); + +test_loopback_exit: + bp->link_params.loopback_mode = LOOPBACK_NONE; + + return rc; +} + +static int bnx2x_test_loopback(struct bnx2x *bp) +{ + int rc = 0, res; + + if (BP_NOMCP(bp)) + return rc; + + if (!netif_running(bp->dev)) + return BNX2X_LOOPBACK_FAILED; + + bnx2x_netif_stop(bp, 1); + bnx2x_acquire_phy_lock(bp); + + res = bnx2x_run_loopback(bp, BNX2X_PHY_LOOPBACK); + if (res) { + DP(BNX2X_MSG_ETHTOOL, " PHY loopback failed (res %d)\n", res); + rc |= BNX2X_PHY_LOOPBACK_FAILED; + } + + res = bnx2x_run_loopback(bp, BNX2X_MAC_LOOPBACK); + if (res) { + DP(BNX2X_MSG_ETHTOOL, " MAC loopback failed (res %d)\n", res); + rc |= BNX2X_MAC_LOOPBACK_FAILED; + } + + bnx2x_release_phy_lock(bp); + bnx2x_netif_start(bp); + + return rc; +} + +static int bnx2x_test_ext_loopback(struct bnx2x *bp) +{ + int rc; + u8 is_serdes = + (bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) > 0; + + if (BP_NOMCP(bp)) + return -ENODEV; + + if (!netif_running(bp->dev)) + return BNX2X_EXT_LOOPBACK_FAILED; + + bnx2x_nic_unload(bp, UNLOAD_NORMAL); + rc = bnx2x_nic_load(bp, LOAD_LOOPBACK_EXT); + if (rc != 0) { + DP(BNX2X_MSG_ETHTOOL, + "can't perform self-test, nic_load (for external lb) failed\n"); + return -ENODEV; + } + bnx2x_wait_for_link(bp, 1, is_serdes); + + bnx2x_netif_stop(bp, 1); + + rc = bnx2x_run_loopback(bp, BNX2X_EXT_LOOPBACK); + if (rc) + DP(BNX2X_MSG_ETHTOOL, " EXT loopback failed (res %d)\n", rc); + + bnx2x_netif_start(bp); + + return rc; +} + +#define CRC32_RESIDUAL 0xdebb20e3 + +static int bnx2x_test_nvram(struct bnx2x *bp) +{ + static const struct { + int offset; + int size; + } nvram_tbl[] = { + { 0, 0x14 }, /* bootstrap */ + { 0x14, 0xec }, /* dir */ + { 0x100, 0x350 }, /* manuf_info */ + { 0x450, 0xf0 }, /* feature_info */ + { 0x640, 0x64 }, /* upgrade_key_info */ + { 0x708, 0x70 }, /* manuf_key_info */ + { 0, 0 } + }; + __be32 *buf; + u8 *data; + int i, rc; + u32 magic, crc; + + if (BP_NOMCP(bp)) + return 0; + + buf = kmalloc(0x350, GFP_KERNEL); + if (!buf) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, "kmalloc failed\n"); + rc = -ENOMEM; + goto test_nvram_exit; + } + data = (u8 *)buf; + + rc = bnx2x_nvram_read(bp, 0, data, 4); + if (rc) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "magic value read (rc %d)\n", rc); + goto test_nvram_exit; + } + + magic = be32_to_cpu(buf[0]); + if (magic != 0x669955aa) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "wrong magic value (0x%08x)\n", magic); + rc = -ENODEV; + goto test_nvram_exit; + } + + for (i = 0; nvram_tbl[i].size; i++) { + + rc = bnx2x_nvram_read(bp, nvram_tbl[i].offset, data, + nvram_tbl[i].size); + if (rc) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "nvram_tbl[%d] read data (rc %d)\n", i, rc); + goto test_nvram_exit; + } + + crc = ether_crc_le(nvram_tbl[i].size, data); + if (crc != CRC32_RESIDUAL) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "nvram_tbl[%d] wrong crc value (0x%08x)\n", i, crc); + rc = -ENODEV; + goto test_nvram_exit; + } + } + +test_nvram_exit: + kfree(buf); + return rc; +} + +/* Send an EMPTY ramrod on the first queue */ +static int bnx2x_test_intr(struct bnx2x *bp) +{ + struct bnx2x_queue_state_params params = {NULL}; + + if (!netif_running(bp->dev)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "cannot access eeprom when the interface is down\n"); + return -ENODEV; + } + + params.q_obj = &bp->fp->q_obj; + params.cmd = BNX2X_Q_CMD_EMPTY; + + __set_bit(RAMROD_COMP_WAIT, ¶ms.ramrod_flags); + + return bnx2x_queue_state_change(bp, ¶ms); +} + +static void bnx2x_self_test(struct net_device *dev, + struct ethtool_test *etest, u64 *buf) +{ + struct bnx2x *bp = netdev_priv(dev); + u8 is_serdes; + int rc; + + if (bp->recovery_state != BNX2X_RECOVERY_DONE) { + netdev_err(bp->dev, + "Handling parity error recovery. Try again later\n"); + etest->flags |= ETH_TEST_FL_FAILED; + return; + } + DP(BNX2X_MSG_ETHTOOL, + "Self-test command parameters: offline = %d, external_lb = %d\n", + (etest->flags & ETH_TEST_FL_OFFLINE), + (etest->flags & ETH_TEST_FL_EXTERNAL_LB)>>2); + + memset(buf, 0, sizeof(u64) * BNX2X_NUM_TESTS); + + if (!netif_running(dev)) { + DP(BNX2X_MSG_ETHTOOL, + "can't perform self-test when interface is down\n"); + return; + } + + is_serdes = (bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) > 0; + + /* offline tests are not supported in MF mode */ + if ((etest->flags & ETH_TEST_FL_OFFLINE) && !IS_MF(bp)) { + int port = BP_PORT(bp); + u32 val; + u8 link_up; + + /* save current value of input enable for TX port IF */ + val = REG_RD(bp, NIG_REG_EGRESS_UMP0_IN_EN + port*4); + /* disable input for TX port IF */ + REG_WR(bp, NIG_REG_EGRESS_UMP0_IN_EN + port*4, 0); + + link_up = bp->link_vars.link_up; + + bnx2x_nic_unload(bp, UNLOAD_NORMAL); + rc = bnx2x_nic_load(bp, LOAD_DIAG); + if (rc != 0) { + etest->flags |= ETH_TEST_FL_FAILED; + DP(BNX2X_MSG_ETHTOOL, + "can't perform self-test, nic_load (for offline) failed\n"); + return; + } + + /* wait until link state is restored */ + bnx2x_wait_for_link(bp, 1, is_serdes); + + if (bnx2x_test_registers(bp) != 0) { + buf[0] = 1; + etest->flags |= ETH_TEST_FL_FAILED; + } + if (bnx2x_test_memory(bp) != 0) { + buf[1] = 1; + etest->flags |= ETH_TEST_FL_FAILED; + } + + buf[2] = bnx2x_test_loopback(bp); /* internal LB */ + if (buf[2] != 0) + etest->flags |= ETH_TEST_FL_FAILED; + + if (etest->flags & ETH_TEST_FL_EXTERNAL_LB) { + buf[3] = bnx2x_test_ext_loopback(bp); /* external LB */ + if (buf[3] != 0) + etest->flags |= ETH_TEST_FL_FAILED; + etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; + } + + bnx2x_nic_unload(bp, UNLOAD_NORMAL); + + /* restore input for TX port IF */ + REG_WR(bp, NIG_REG_EGRESS_UMP0_IN_EN + port*4, val); + rc = bnx2x_nic_load(bp, LOAD_NORMAL); + if (rc != 0) { + etest->flags |= ETH_TEST_FL_FAILED; + DP(BNX2X_MSG_ETHTOOL, + "can't perform self-test, nic_load (for online) failed\n"); + return; + } + /* wait until link state is restored */ + bnx2x_wait_for_link(bp, link_up, is_serdes); + + } + if (bnx2x_test_nvram(bp) != 0) { + if (!IS_MF(bp)) + buf[4] = 1; + else + buf[0] = 1; + etest->flags |= ETH_TEST_FL_FAILED; + } + if (bnx2x_test_intr(bp) != 0) { + if (!IS_MF(bp)) + buf[5] = 1; + else + buf[1] = 1; + etest->flags |= ETH_TEST_FL_FAILED; + } + + if (bnx2x_link_test(bp, is_serdes) != 0) { + if (!IS_MF(bp)) + buf[6] = 1; + else + buf[2] = 1; + etest->flags |= ETH_TEST_FL_FAILED; + } +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + /* run the idle check twice */ + bnx2x_idle_chk(bp); + rc = bnx2x_idle_chk(bp); + if (!IS_MF(bp)) + buf[7] = rc; + else + buf[3] = rc; + if (rc != 0) + etest->flags |= ETH_TEST_FL_FAILED; +#endif + +#ifdef BNX2X_EXTRA_DEBUG + bnx2x_panic_dump(bp); +#endif +} + +#define IS_PORT_STAT(i) \ + ((bnx2x_stats_arr[i].flags & STATS_FLAGS_BOTH) == STATS_FLAGS_PORT) +#define IS_FUNC_STAT(i) (bnx2x_stats_arr[i].flags & STATS_FLAGS_FUNC) +#define IS_MF_MODE_STAT(bp) \ + (IS_MF(bp) && !(bp->msg_enable & BNX2X_MSG_STATS)) + +/* ethtool statistics are displayed for all regular ethernet queues and the + * fcoe L2 queue if not disabled + */ +static inline int bnx2x_num_stat_queues(struct bnx2x *bp) +{ +#if 0 + uint num_queues = BNX2X_NUM_ETH_QUEUES(bp); + + if (!NO_FCOE(bp)) + num_queues += FCOE_PRESENT; +#ifdef BCM_OOO + if (!NO_ISCSI_OOO(bp)) + num_queues += OOO_RX_CONTEXT_USE; +#endif + + return num_queues; +#else /* BNX2X_UPSTREAM */ + return BNX2X_NUM_ETH_QUEUES(bp); +#endif +} + +#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ +static int bnx2x_get_sset_count(struct net_device *dev, int stringset) +{ + struct bnx2x *bp = netdev_priv(dev); + int i, num_stats; + + switch (stringset) { + case ETH_SS_STATS: + if (is_multi(bp)) { + num_stats = bnx2x_num_stat_queues(bp) * + BNX2X_NUM_Q_STATS; + } else + num_stats = 0; + if (IS_MF_MODE_STAT(bp)) { + for (i = 0; i < BNX2X_NUM_STATS; i++) + if (IS_FUNC_STAT(i)) + num_stats++; + } else + num_stats += BNX2X_NUM_STATS; + + return num_stats; + + case ETH_SS_TEST: + return BNX2X_NUM_TESTS; + + default: + return -EINVAL; + } +} +#else +static int bnx2x_self_test_count(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + return BNX2X_NUM_TESTS; +} + +static int bnx2x_get_stats_count(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); int i, num_stats; + + if (is_multi(bp)) { + num_stats = bnx2x_num_stat_queues(bp) * BNX2X_NUM_Q_STATS; + } else { + num_stats = 0; + } + + if (IS_MF_MODE_STAT(bp)) { + for (i = 0; i < BNX2X_NUM_STATS; i++) + if (IS_FUNC_STAT(i)) + num_stats++; + } else { + num_stats += BNX2X_NUM_STATS; + } + + return num_stats; +} +#endif + +static void bnx2x_get_strings(struct net_device *dev, u32 stringset, u8 *buf) +{ + struct bnx2x *bp = netdev_priv(dev); + int i, j, k, offset, start; + char queue_name[MAX_QUEUE_NAME_LEN+1]; + + switch (stringset) { + case ETH_SS_STATS: + k = 0; + if (is_multi(bp)) { + for_each_eth_queue(bp, i) { + memset(queue_name, 0, sizeof(queue_name)); +#if 0 /* ! BNX2X_UPSTREAM */ + if (IS_FCOE_IDX(i)) + sprintf(queue_name, "fcoe"); +#ifdef BCM_OOO + else if (IS_OOO_IDX(i)) + sprintf(queue_name, "ooo"); +#endif + else +#endif + sprintf(queue_name, "%d", i); + for (j = 0; j < BNX2X_NUM_Q_STATS; j++) + snprintf(buf + (k + j)*ETH_GSTRING_LEN, + ETH_GSTRING_LEN, + bnx2x_q_stats_arr[j].string, + queue_name); + k += BNX2X_NUM_Q_STATS; + } + } + + + for (i = 0, j = 0; i < BNX2X_NUM_STATS; i++) { + if (IS_MF_MODE_STAT(bp) && IS_PORT_STAT(i)) + continue; + strcpy(buf + (k + j)*ETH_GSTRING_LEN, + bnx2x_stats_arr[i].string); + j++; + } + + break; + + case ETH_SS_TEST: + /* First 4 tests cannot be done in MF mode */ + if (!IS_MF(bp)) + start = 0; + else + start = 4; + for (i = 0, j = start; j < (start+BNX2X_NUM_TESTS); i++, j++) { + offset = sprintf(buf+32*i, "%s", + bnx2x_tests_str_arr[j]); + *(buf+offset) = '\0'; + } + break; + } +} + +static void bnx2x_get_ethtool_stats(struct net_device *dev, + struct ethtool_stats *stats, u64 *buf) +{ + struct bnx2x *bp = netdev_priv(dev); + u32 *hw_stats, *offset; + int i, j, k = 0; + + if (is_multi(bp)) { + for_each_eth_queue(bp, i) { + hw_stats = (u32 *)&bp->fp[i].eth_q_stats; + for (j = 0; j < BNX2X_NUM_Q_STATS; j++) { + if (bnx2x_q_stats_arr[j].size == 0) { + /* skip this counter */ + buf[k + j] = 0; + continue; + } + offset = (hw_stats + + bnx2x_q_stats_arr[j].offset); + if (bnx2x_q_stats_arr[j].size == 4) { + /* 4-byte counter */ + buf[k + j] = (u64) *offset; + continue; + } + /* 8-byte counter */ + buf[k + j] = HILO_U64(*offset, *(offset + 1)); + } + k += BNX2X_NUM_Q_STATS; + } + } + + hw_stats = (u32 *)&bp->eth_stats; + for (i = 0, j = 0; i < BNX2X_NUM_STATS; i++) { + if (IS_MF_MODE_STAT(bp) && IS_PORT_STAT(i)) + continue; + if (bnx2x_stats_arr[i].size == 0) { + /* skip this counter */ + buf[k + j] = 0; + j++; + continue; + } + offset = (hw_stats + bnx2x_stats_arr[i].offset); + if (bnx2x_stats_arr[i].size == 4) { + /* 4-byte counter */ + buf[k + j] = (u64) *offset; + j++; + continue; + } + /* 8-byte counter */ + buf[k + j] = HILO_U64(*offset, *(offset + 1)); + j++; + } +} + +#if (LINUX_VERSION_CODE > 0x020627) /* BNX2X_UPSTREAM */ +static int bnx2x_set_phys_id(struct net_device *dev, + enum ethtool_phys_id_state state) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (!netif_running(dev)) { + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, + "cannot access eeprom when the interface is down\n"); + return -EAGAIN; + } + + if (!bp->port.pmf) { + DP(BNX2X_MSG_ETHTOOL, "Interface is not pmf\n"); + return -EOPNOTSUPP; + } + + switch (state) { + case ETHTOOL_ID_ACTIVE: + return 1; /* cycle on/off once per second */ + + case ETHTOOL_ID_ON: + bnx2x_set_led(&bp->link_params, &bp->link_vars, + LED_MODE_ON, SPEED_1000); + break; + + case ETHTOOL_ID_OFF: + bnx2x_set_led(&bp->link_params, &bp->link_vars, + LED_MODE_FRONT_PANEL_OFF, 0); + + break; + + case ETHTOOL_ID_INACTIVE: + bnx2x_set_led(&bp->link_params, &bp->link_vars, + LED_MODE_OPER, + bp->link_vars.line_speed); + } + + return 0; +} +#else +static int bnx2x_phys_id(struct net_device *dev, u32 data) +{ + struct bnx2x *bp = netdev_priv(dev); + int i; + + if (!netif_running(dev)) + return 0; + + if (!bp->port.pmf) + return 0; + + if (data == 0) + data = 2; + + for (i = 0; i < (data * 2); i++) { + if ((i % 2) == 0) + bnx2x_set_led(&bp->link_params, &bp->link_vars, + LED_MODE_ON, SPEED_1000); + else + bnx2x_set_led(&bp->link_params, &bp->link_vars, + LED_MODE_OFF, 0); + + msleep_interruptible(500); + if (signal_pending(current)) + break; + } + + bnx2x_set_led(&bp->link_params, &bp->link_vars, + LED_MODE_OPER, bp->link_vars.line_speed); + + return 0; +} +#endif /* 0x020627 */ + +#if (LINUX_VERSION_CODE >= 0x020624) /* BNX2X_UPSTREAM */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)) +static int bnx2x_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, + void *rules __always_unused) +#else /* BNX2X_UPSTREAM */ +static int bnx2x_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, + u32 *rules __always_unused) +#endif +{ + struct bnx2x *bp = netdev_priv(dev); + + switch (info->cmd) { + case ETHTOOL_GRXRINGS: + info->data = BNX2X_NUM_ETH_QUEUES(bp); + return 0; + + default: + DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n"); + return -EOPNOTSUPP; + } +} + +static u32 bnx2x_get_rxfh_indir_size(struct net_device *dev) +{ + return T_ETH_INDIRECTION_TABLE_SIZE; +} + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) /* BNX2X_UPSTREAM */ +static int bnx2x_get_rxfh_indir(struct net_device *dev, u32 *indir) +#else +static int bnx2x_get_rxfh_indir(struct net_device *dev, + struct ethtool_rxfh_indir *indir) +#endif +{ + struct bnx2x *bp = netdev_priv(dev); +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0)) /* ! BNX2X_UPSTREAM */ + size_t copy_size = bnx2x_get_rxfh_indir_size(dev); +#endif + u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0}; + size_t i; + + /* Get the current configuration of the RSS indirection table */ + bnx2x_get_rss_ind_table(&bp->rss_conf_obj, ind_table); + + /* + * We can't use a memcpy() as an internal storage of an + * indirection table is a u8 array while indir->ring_index + * points to an array of u32. + * + * Indirection table contains the FW Client IDs, so we need to + * align the returned table to the Client ID of the leading RSS + * queue. + */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) /* BNX2X_UPSTREAM */ + for (i = 0; i < T_ETH_INDIRECTION_TABLE_SIZE; i++) + indir[i] = ind_table[i] - bp->fp->cl_id; +#else + for (i = 0; i < copy_size; i++) + indir->ring_index[i] = ind_table[i] - bp->fp->cl_id; +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0)) /* ! BNX2X_UPSTREAM */ + indir->size = T_ETH_INDIRECTION_TABLE_SIZE; +#endif + return 0; +} + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) /* BNX2X_UPSTREAM */ +static int bnx2x_set_rxfh_indir(struct net_device *dev, const u32 *indir) +#else +static int bnx2x_set_rxfh_indir(struct net_device *dev, + const struct ethtool_rxfh_indir *indir) +#endif +{ + struct bnx2x *bp = netdev_priv(dev); + size_t i; + u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0}; +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0)) /* ! BNX2X_UPSTREAM */ + u32 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp); + + /* validate the size */ + if (indir->size != T_ETH_INDIRECTION_TABLE_SIZE) { + DP(BNX2X_MSG_ETHTOOL, "Wrong indirection table size\n"); + return -EINVAL; + } +#endif + + for (i = 0; i < T_ETH_INDIRECTION_TABLE_SIZE; i++) { +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0)) /* ! BNX2X_UPSTREAM */ + /* validate the indices */ + if (indir->ring_index[i] >= num_eth_queues) { + DP(BNX2X_MSG_ETHTOOL, "Ring index > num of queues\n"); + return -EINVAL; + } +#endif + /* + * The same as in bnx2x_get_rxfh_indir: we can't use a memcpy() + * as an internal storage of an indirection table is a u8 array + * while indir->ring_index points to an array of u32. + * + * Indirection table contains the FW Client IDs, so we need to + * align the received table to the Client ID of the leading RSS + * queue + */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) /* BNX2X_UPSTREAM */ + ind_table[i] = indir[i] + bp->fp->cl_id; +#else + ind_table[i] = indir->ring_index[i] + bp->fp->cl_id; +#endif + } + + return bnx2x_config_rss_eth(bp, ind_table, false); +} +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) /* BNX2X_UPSTREAM */ +/** + * bnx2x_get_channels - gets the number of RSS queues. + * + * @dev: net device + * @channels: returns the number of max / current queues + */ +static void bnx2x_get_channels(struct net_device *dev, + struct ethtool_channels *channels) +{ + struct bnx2x *bp = netdev_priv(dev); + + channels->max_rx = channels->max_tx = channels->max_other = 0; + channels->max_combined = BNX2X_MAX_RSS_COUNT(bp); + channels->rx_count = channels->tx_count = channels->other_count = 0; + channels->combined_count = BNX2X_NUM_QUEUES(bp) - NON_ETH_CONTEXT_USE; +} + +/** + * bnx2x_change_num_queues - change the number of RSS queues. + * + * @bp: bnx2x private structure + * + * Re-configure interrupt mode to get the new number of MSI-X + * vectors and re-add NAPI objects. + */ +static void bnx2x_change_num_queues(struct bnx2x *bp, int num_rss) +{ + bnx2x_del_all_napi(bp); + bnx2x_disable_msi(bp); + BNX2X_NUM_QUEUES(bp) = num_rss + NON_ETH_CONTEXT_USE; + bnx2x_set_int_mode(bp); + bnx2x_add_all_napi(bp); +} + +/** + * bnx2x_set_channels - sets the number of RSS queues. + * + * @dev: net device + * @channels: includes the number of queues requested + */ +static int bnx2x_set_channels(struct net_device *dev, + struct ethtool_channels *channels) +{ + struct bnx2x *bp = netdev_priv(dev); + +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + DP(BNX2X_MSG_ETHTOOL, "command not supported with char device\n"); + return -EINVAL; +#endif + + DP(BNX2X_MSG_ETHTOOL, + "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", + channels->rx_count, channels->tx_count, channels->other_count, + channels->combined_count); + + /* We don't support separate rx / tx channels. + * We don't allow setting 'other' channels. + */ + if (channels->rx_count || channels->tx_count || channels->other_count + || (channels->combined_count > BNX2X_MAX_RSS_COUNT(bp))) { + DP(BNX2X_MSG_ETHTOOL, "command parameters not supported\n"); + return -EINVAL; + } + + /* Check if there was a change in the active parameters */ + if (channels->combined_count == + BNX2X_NUM_QUEUES(bp) - NON_ETH_CONTEXT_USE) { + DP(BNX2X_MSG_ETHTOOL, "No change in active parameters\n"); + return 0; + } + + /* Set the requested number of queues in bp context. + * Note that the actual number of queues created during load may be + * less than requested if memory is low. + */ + if (unlikely(!netif_running(dev))) { + bnx2x_change_num_queues(bp, channels->combined_count); + return 0; + } else { + bnx2x_nic_unload(bp, UNLOAD_NORMAL); + bnx2x_change_num_queues(bp, channels->combined_count); + return bnx2x_nic_load(bp, LOAD_NORMAL); + } +} +#endif + +#if (LINUX_VERSION_CODE >= 0x020613) /* BNX2X_UPSTREAM */ +static const struct ethtool_ops bnx2x_ethtool_ops = { +#else +static struct ethtool_ops bnx2x_ethtool_ops = { +#endif + .get_settings = bnx2x_get_settings, + .set_settings = bnx2x_set_settings, + .get_drvinfo = bnx2x_get_drvinfo, + .get_regs_len = bnx2x_get_regs_len, + .get_regs = bnx2x_get_regs, + .get_wol = bnx2x_get_wol, + .set_wol = bnx2x_set_wol, + .get_msglevel = bnx2x_get_msglevel, + .set_msglevel = bnx2x_set_msglevel, + .nway_reset = bnx2x_nway_reset, + .get_link = bnx2x_get_link, +#if (LINUX_VERSION_CODE >= 0x020418) /* BNX2X_UPSTREAM */ + .get_eeprom_len = bnx2x_get_eeprom_len, +#endif + .get_eeprom = bnx2x_get_eeprom, + .set_eeprom = bnx2x_set_eeprom, + .get_coalesce = bnx2x_get_coalesce, + .set_coalesce = bnx2x_set_coalesce, + .get_ringparam = bnx2x_get_ringparam, + .set_ringparam = bnx2x_set_ringparam, + .get_pauseparam = bnx2x_get_pauseparam, + .set_pauseparam = bnx2x_set_pauseparam, +#if (LINUX_VERSION_CODE < 0x020627) /* ! BNX2X_UPSTREAM */ + .get_rx_csum = bnx2x_get_rx_csum, + .set_rx_csum = bnx2x_set_rx_csum, + .get_tx_csum = ethtool_op_get_tx_csum, +#if (LINUX_VERSION_CODE >= 0x020618) + .set_tx_csum = ethtool_op_set_tx_ipv6_csum, +#else + .set_tx_csum = bnx2x_set_tx_hw_csum, +#endif +#if (LINUX_VERSION_CODE >= 0x02061a) + .set_flags = bnx2x_set_flags, + .get_flags = ethtool_op_get_flags, +#endif + .get_sg = ethtool_op_get_sg, + .set_sg = ethtool_op_set_sg, +#ifdef NETIF_F_TSO + .get_tso = ethtool_op_get_tso, + .set_tso = bnx2x_set_tso, +#endif +#endif /* 0x020627 */ + .self_test = bnx2x_self_test, +#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ + .get_sset_count = bnx2x_get_sset_count, +#else + .get_stats_count = bnx2x_get_stats_count, + .self_test_count = bnx2x_self_test_count, +#endif + .get_strings = bnx2x_get_strings, +#if (LINUX_VERSION_CODE > 0x020627) /* BNX2X_UPSTREAM */ + .set_phys_id = bnx2x_set_phys_id, +#else + .phys_id = bnx2x_phys_id, +#endif + .get_ethtool_stats = bnx2x_get_ethtool_stats, +#if (LINUX_VERSION_CODE >= 0x020624) /* BNX2X_UPSTREAM */ + .get_rxnfc = bnx2x_get_rxnfc, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) /* BNX2X_UPSTREAM */ + .get_rxfh_indir_size = bnx2x_get_rxfh_indir_size, +#endif + .get_rxfh_indir = bnx2x_get_rxfh_indir, + .set_rxfh_indir = bnx2x_set_rxfh_indir, +#endif +#ifdef ETHTOOL_GPERMADDR /* ! BNX2X_UPSTREAM */ +#if (LINUX_VERSION_CODE < 0x020617) + .get_perm_addr = ethtool_op_get_perm_addr, +#endif +#endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) /* BNX2X_UPSTREAM */ + .get_channels = bnx2x_get_channels, + .set_channels = bnx2x_set_channels +#endif +}; + +void bnx2x_set_ethtool_ops(struct net_device *netdev) +{ + SET_ETHTOOL_OPS(netdev, &bnx2x_ethtool_ops); +} + +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ +/* The following exported routine is used by GDB to perform GRC dump. */ + +struct bnx2x_dbg_reg_addrs { + void *reg_addrs; + void *parity_data; + void *page_write_regs_e2; + void *page_vals_e2; + void *page_read_regs_e2; + u32 regdump_len; +}; + +extern u32 bnx2x_dbg_buf[]; + +void bnx2x_dbg_get_reg_addrs(struct net_device *dev) +{ + struct bnx2x_dbg_reg_addrs *dbg_reg_addrs; + + dbg_reg_addrs = (struct bnx2x_dbg_reg_addrs *)bnx2x_dbg_buf; + + dbg_reg_addrs->reg_addrs = (void *)®_addrs[0]; + dbg_reg_addrs->parity_data = (void *)&bnx2x_blocks_parity_data[0]; + dbg_reg_addrs->page_write_regs_e2 = (void *)&page_write_regs_e2[0]; + dbg_reg_addrs->page_vals_e2 = (void *)&page_vals_e2[0]; + dbg_reg_addrs->page_read_regs_e2 = (void *)&page_read_regs_e2[0]; + dbg_reg_addrs->regdump_len = bnx2x_get_regs_len(dev); +} +EXPORT_SYMBOL(bnx2x_dbg_get_reg_addrs); +#endif + diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_fw_defs.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_fw_defs.h index 1053713..2850997 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_fw_defs.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_fw_defs.h @@ -1,6 +1,6 @@ /* bnx2x_fw_defs.h: Broadcom Everest network driver. * - * Copyright (c) 2007-2010 Broadcom Corporation + * Copyright (c) 2007-2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -10,220 +10,218 @@ #ifndef BNX2X_FW_DEFS_H #define BNX2X_FW_DEFS_H -#define CSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[135].base) +#define CSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[148].base) #define CSTORM_ASSERT_LIST_OFFSET(assertListEntry) \ - (IRO[134].base + ((assertListEntry) * IRO[134].m1)) + (IRO[147].base + ((assertListEntry) * IRO[147].m1)) #define CSTORM_EVENT_RING_DATA_OFFSET(pfId) \ - (IRO[139].base + (((pfId)>>1) * IRO[139].m1) + (((pfId)&1) * \ - IRO[139].m2)) + (IRO[153].base + (((pfId)>>1) * IRO[153].m1) + (((pfId)&1) * \ + IRO[153].m2)) +#define CSTORM_EVENT_RING_PROD_OFFSET(pfId) \ + (IRO[154].base + (((pfId)>>1) * IRO[154].m1) + (((pfId)&1) * \ + IRO[154].m2)) #define CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) \ - (IRO[146].base + ((funcId) * IRO[146].m1)) + (IRO[159].base + ((funcId) * IRO[159].m1)) #define CSTORM_FUNC_EN_OFFSET(funcId) \ - (IRO[136].base + ((funcId) * IRO[136].m1)) -#define CSTORM_FUNCTION_MODE_OFFSET (IRO[143].base) -#define CSTORM_IGU_MODE_OFFSET (IRO[144].base) + (IRO[149].base + ((funcId) * IRO[149].m1)) +#define CSTORM_IGU_MODE_OFFSET (IRO[157].base) #define CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \ - (IRO[296].base + ((pfId) * IRO[296].m1)) + (IRO[316].base + ((pfId) * IRO[316].m1)) #define CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ - (IRO[297].base + ((pfId) * IRO[297].m1)) - #define CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) \ - (IRO[289].base + ((pfId) * IRO[289].m1) + ((iscsiEqId) * \ - IRO[289].m2)) - #define CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) \ - (IRO[291].base + ((pfId) * IRO[291].m1) + ((iscsiEqId) * \ - IRO[291].m2)) - #define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) \ - (IRO[290].base + ((pfId) * IRO[290].m1) + ((iscsiEqId) * \ - IRO[290].m2)) - #define \ - CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) \ - (IRO[292].base + ((pfId) * IRO[292].m1) + ((iscsiEqId) * \ - IRO[292].m2)) - #define CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) \ - (IRO[288].base + ((pfId) * IRO[288].m1) + ((iscsiEqId) * \ - IRO[288].m2)) - #define CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) \ - (IRO[294].base + ((pfId) * IRO[294].m1) + ((iscsiEqId) * \ - IRO[294].m2)) - #define CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) \ - (IRO[293].base + ((pfId) * IRO[293].m1) + ((iscsiEqId) * \ - IRO[293].m2)) + (IRO[317].base + ((pfId) * IRO[317].m1)) +#define CSTORM_ISCSI_EQ_CONS_OFFSET(pfId, iscsiEqId) \ + (IRO[309].base + ((pfId) * IRO[309].m1) + ((iscsiEqId) * IRO[309].m2)) +#define CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId, iscsiEqId) \ + (IRO[311].base + ((pfId) * IRO[311].m1) + ((iscsiEqId) * IRO[311].m2)) +#define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId, iscsiEqId) \ + (IRO[310].base + ((pfId) * IRO[310].m1) + ((iscsiEqId) * IRO[310].m2)) +#define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId, iscsiEqId) \ + (IRO[312].base + ((pfId) * IRO[312].m1) + ((iscsiEqId) * IRO[312].m2)) +#define CSTORM_ISCSI_EQ_PROD_OFFSET(pfId, iscsiEqId) \ + (IRO[308].base + ((pfId) * IRO[308].m1) + ((iscsiEqId) * IRO[308].m2)) +#define CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId, iscsiEqId) \ + (IRO[314].base + ((pfId) * IRO[314].m1) + ((iscsiEqId) * IRO[314].m2)) +#define CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId, iscsiEqId) \ + (IRO[313].base + ((pfId) * IRO[313].m1) + ((iscsiEqId) * IRO[313].m2)) #define CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \ - (IRO[295].base + ((pfId) * IRO[295].m1)) + (IRO[315].base + ((pfId) * IRO[315].m1)) #define CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ - (IRO[287].base + ((pfId) * IRO[287].m1)) + (IRO[307].base + ((pfId) * IRO[307].m1)) #define CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ - (IRO[286].base + ((pfId) * IRO[286].m1)) + (IRO[306].base + ((pfId) * IRO[306].m1)) #define CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ - (IRO[285].base + ((pfId) * IRO[285].m1)) -#define CSTORM_PATH_ID_OFFSET (IRO[149].base) + (IRO[305].base + ((pfId) * IRO[305].m1)) +#define CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \ + (IRO[151].base + ((funcId) * IRO[151].m1)) #define CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) \ - (IRO[130].base + ((pfId) * IRO[130].m1)) + (IRO[142].base + ((pfId) * IRO[142].m1)) +#define CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) \ + (IRO[143].base + ((pfId) * IRO[143].m1)) #define CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) \ - (IRO[129].base + ((pfId) * IRO[129].m1)) -#define CSTORM_SP_STATUS_BLOCK_SIZE (IRO[129].size) + (IRO[141].base + ((pfId) * IRO[141].m1)) +#define CSTORM_SP_STATUS_BLOCK_SIZE (IRO[141].size) #define CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) \ - (IRO[131].base + ((pfId) * IRO[131].m1)) -#define CSTORM_SP_SYNC_BLOCK_SIZE (IRO[131].size) + (IRO[144].base + ((pfId) * IRO[144].m1)) +#define CSTORM_SP_SYNC_BLOCK_SIZE (IRO[144].size) +#define CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId, hcIndex) \ + (IRO[136].base + ((sbId) * IRO[136].m1) + ((hcIndex) * IRO[136].m2)) #define CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) \ - (IRO[122].base + ((sbId) * IRO[122].m1)) + (IRO[133].base + ((sbId) * IRO[133].m1)) +#define CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) \ + (IRO[134].base + ((sbId) * IRO[134].m1)) +#define CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId, hcIndex) \ + (IRO[135].base + ((sbId) * IRO[135].m1) + ((hcIndex) * IRO[135].m2)) #define CSTORM_STATUS_BLOCK_OFFSET(sbId) \ - (IRO[121].base + ((sbId) * IRO[121].m1)) -#define CSTORM_STATUS_BLOCK_SIZE (IRO[121].size) + (IRO[132].base + ((sbId) * IRO[132].m1)) +#define CSTORM_STATUS_BLOCK_SIZE (IRO[132].size) #define CSTORM_SYNC_BLOCK_OFFSET(sbId) \ - (IRO[125].base + ((sbId) * IRO[125].m1)) -#define CSTORM_SYNC_BLOCK_SIZE (IRO[125].size) + (IRO[137].base + ((sbId) * IRO[137].m1)) +#define CSTORM_SYNC_BLOCK_SIZE (IRO[137].size) #define CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) \ - (IRO[141].base + ((vfId) * IRO[141].m1)) + (IRO[155].base + ((vfId) * IRO[155].m1)) #define CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) \ - (IRO[142].base + ((vfId) * IRO[142].m1)) + (IRO[156].base + ((vfId) * IRO[156].m1)) #define CSTORM_VF_TO_PF_OFFSET(funcId) \ - (IRO[137].base + ((funcId) * IRO[137].m1)) -#define TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET (IRO[186].base) + (IRO[150].base + ((funcId) * IRO[150].m1)) +#define TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET (IRO[204].base) #define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) \ - (IRO[185].base + ((pfId) * IRO[185].m1)) -#define TSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[92].base) + (IRO[203].base + ((pfId) * IRO[203].m1)) +#define TSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[102].base) #define TSTORM_ASSERT_LIST_OFFSET(assertListEntry) \ - (IRO[91].base + ((assertListEntry) * IRO[91].m1)) -#define TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET (IRO[97].base) -#define TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET \ - (IRO[98].base) -#define TSTORM_FUNC_EN_OFFSET(funcId) \ - (IRO[93].base + ((funcId) * IRO[93].m1)) + (IRO[101].base + ((assertListEntry) * IRO[101].m1)) #define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) \ - (IRO[183].base + ((pfId) * IRO[183].m1)) -#define TSTORM_FUNCTION_MODE_OFFSET (IRO[96].base) - #define \ - TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfId,iscsiConBufPblEntry) \ - (IRO[245].base + ((pfId) * IRO[245].m1) + ((iscsiConBufPblEntry) \ - * IRO[245].m2)) + (IRO[201].base + ((pfId) * IRO[201].m1)) +#define TSTORM_FUNC_EN_OFFSET(funcId) \ + (IRO[103].base + ((funcId) * IRO[103].m1)) #define TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \ - (IRO[249].base + ((pfId) * IRO[249].m1)) + (IRO[272].base + ((pfId) * IRO[272].m1)) #define TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) \ - (IRO[250].base + ((pfId) * IRO[250].m1)) + (IRO[273].base + ((pfId) * IRO[273].m1)) #define TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) \ - (IRO[251].base + ((pfId) * IRO[251].m1)) + (IRO[274].base + ((pfId) * IRO[274].m1)) #define TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) \ - (IRO[252].base + ((pfId) * IRO[252].m1)) + (IRO[275].base + ((pfId) * IRO[275].m1)) #define TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ - (IRO[248].base + ((pfId) * IRO[248].m1)) + (IRO[271].base + ((pfId) * IRO[271].m1)) #define TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ - (IRO[247].base + ((pfId) * IRO[247].m1)) + (IRO[270].base + ((pfId) * IRO[270].m1)) #define TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ - (IRO[246].base + ((pfId) * IRO[246].m1)) + (IRO[269].base + ((pfId) * IRO[269].m1)) #define TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \ - (IRO[244].base + ((pfId) * IRO[244].m1)) + (IRO[268].base + ((pfId) * IRO[268].m1)) #define TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) \ - (IRO[254].base + ((pfId) * IRO[254].m1)) + (IRO[277].base + ((pfId) * IRO[277].m1)) #define TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \ - (IRO[241].base + ((pfId) * IRO[241].m1)) -#define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ - (IRO[242].base + ((pfId) * IRO[242].m1)) -#define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ - (IRO[243].base + ((pfId) * IRO[243].m1)) -#define TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) \ - (IRO[184].base + ((pfId) * IRO[184].m1)) -#define TSTORM_TCP_MAX_CWND_OFFSET(pfId) \ - (IRO[198].base + ((pfId) * IRO[198].m1)) -#define TSTORM_VF_TO_PF_OFFSET(funcId) \ - (IRO[94].base + ((funcId) * IRO[94].m1)) -#define USTORM_AGG_DATA_OFFSET (IRO[188].base) -#define USTORM_AGG_DATA_SIZE (IRO[188].size) -#define USTORM_ASSERT_LIST_INDEX_OFFSET (IRO[160].base) -#define USTORM_ASSERT_LIST_OFFSET(assertListEntry) \ - (IRO[159].base + ((assertListEntry) * IRO[159].m1)) - #define USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(portId,clientId) \ - (IRO[187].base + ((portId) * IRO[187].m1) + ((clientId) * \ - IRO[187].m2)) -#define USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) \ - (IRO[166].base + ((portId) * IRO[166].m1)) -#define USTORM_FCOE_EQ_PROD_OFFSET(pfId) \ - (IRO[298].base + ((pfId) * IRO[298].m1)) -#define USTORM_FUNC_EN_OFFSET(funcId) \ - (IRO[161].base + ((funcId) * IRO[161].m1)) -#define USTORM_FUNCTION_MODE_OFFSET (IRO[165].base) -#define USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \ - (IRO[262].base + ((pfId) * IRO[262].m1)) -#define USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ - (IRO[263].base + ((pfId) * IRO[263].m1)) -#define USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \ - (IRO[267].base + ((pfId) * IRO[267].m1)) -#define USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) \ (IRO[264].base + ((pfId) * IRO[264].m1)) -#define USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ - (IRO[260].base + ((pfId) * IRO[260].m1)) -#define USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ - (IRO[259].base + ((pfId) * IRO[259].m1)) -#define USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ - (IRO[258].base + ((pfId) * IRO[258].m1)) -#define USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \ - (IRO[261].base + ((pfId) * IRO[261].m1)) -#define USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) \ +#define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ (IRO[265].base + ((pfId) * IRO[265].m1)) -#define USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \ +#define TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) \ (IRO[266].base + ((pfId) * IRO[266].m1)) +#define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ + (IRO[267].base + ((pfId) * IRO[267].m1)) +#define TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) \ + (IRO[202].base + ((pfId) * IRO[202].m1)) +#define TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \ + (IRO[105].base + ((funcId) * IRO[105].m1)) +#define TSTORM_TCP_MAX_CWND_OFFSET(pfId) \ + (IRO[217].base + ((pfId) * IRO[217].m1)) +#define TSTORM_VF_TO_PF_OFFSET(funcId) \ + (IRO[104].base + ((funcId) * IRO[104].m1)) +#define USTORM_AGG_DATA_OFFSET (IRO[206].base) +#define USTORM_AGG_DATA_SIZE (IRO[206].size) +#define USTORM_ASSERT_LIST_INDEX_OFFSET (IRO[177].base) +#define USTORM_ASSERT_LIST_OFFSET(assertListEntry) \ + (IRO[176].base + ((assertListEntry) * IRO[176].m1)) +#define USTORM_CQE_PAGE_NEXT_OFFSET(portId, clientId) \ + (IRO[205].base + ((portId) * IRO[205].m1) + ((clientId) * \ + IRO[205].m2)) +#define USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) \ + (IRO[183].base + ((portId) * IRO[183].m1)) +#define USTORM_FCOE_EQ_PROD_OFFSET(pfId) \ + (IRO[318].base + ((pfId) * IRO[318].m1)) +#define USTORM_FUNC_EN_OFFSET(funcId) \ + (IRO[178].base + ((funcId) * IRO[178].m1)) +#define USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \ + (IRO[282].base + ((pfId) * IRO[282].m1)) +#define USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ + (IRO[283].base + ((pfId) * IRO[283].m1)) +#define USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \ + (IRO[287].base + ((pfId) * IRO[287].m1)) +#define USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) \ + (IRO[284].base + ((pfId) * IRO[284].m1)) +#define USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ + (IRO[280].base + ((pfId) * IRO[280].m1)) +#define USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ + (IRO[279].base + ((pfId) * IRO[279].m1)) +#define USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ + (IRO[278].base + ((pfId) * IRO[278].m1)) +#define USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \ + (IRO[281].base + ((pfId) * IRO[281].m1)) +#define USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) \ + (IRO[285].base + ((pfId) * IRO[285].m1)) +#define USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \ + (IRO[286].base + ((pfId) * IRO[286].m1)) #define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) \ - (IRO[164].base + ((pfId) * IRO[164].m1)) - #define USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) \ - (IRO[191].base + ((portId) * IRO[191].m1) + ((clientId) * \ - IRO[191].m2)) + (IRO[182].base + ((pfId) * IRO[182].m1)) +#define USTORM_RECORD_SLOW_PATH_OFFSET(funcId) \ + (IRO[180].base + ((funcId) * IRO[180].m1)) +#define USTORM_RX_PRODS_E1X_OFFSET(portId, clientId) \ + (IRO[209].base + ((portId) * IRO[209].m1) + ((clientId) * \ + IRO[209].m2)) #define USTORM_RX_PRODS_E2_OFFSET(qzoneId) \ - (IRO[192].base + ((qzoneId) * IRO[192].m1)) -#define USTORM_TPA_BTR_OFFSET (IRO[189].base) -#define USTORM_TPA_BTR_SIZE (IRO[189].size) + (IRO[210].base + ((qzoneId) * IRO[210].m1)) +#define USTORM_TPA_BTR_OFFSET (IRO[207].base) +#define USTORM_TPA_BTR_SIZE (IRO[207].size) #define USTORM_VF_TO_PF_OFFSET(funcId) \ - (IRO[162].base + ((funcId) * IRO[162].m1)) -#define XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE (IRO[56].base) -#define XSTORM_AGG_INT_FINAL_CLEANUP_INDEX (IRO[55].base) -#define XSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[51].base) + (IRO[179].base + ((funcId) * IRO[179].m1)) +#define XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE (IRO[67].base) +#define XSTORM_AGG_INT_FINAL_CLEANUP_INDEX (IRO[66].base) +#define XSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[51].base) #define XSTORM_ASSERT_LIST_OFFSET(assertListEntry) \ (IRO[50].base + ((assertListEntry) * IRO[50].m1)) #define XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) \ - (IRO[44].base + ((portId) * IRO[44].m1)) -#define XSTORM_E1HOV_OFFSET(pfId) \ - (IRO[52].base + ((pfId) * IRO[52].m1)) + (IRO[43].base + ((portId) * IRO[43].m1)) #define XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) \ - (IRO[46].base + ((pfId) * IRO[46].m1)) -#define XSTORM_FUNC_EN_OFFSET(funcId) \ - (IRO[48].base + ((funcId) * IRO[48].m1)) -#define XSTORM_FUNCTION_MODE_OFFSET (IRO[53].base) -#define XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \ - (IRO[275].base + ((pfId) * IRO[275].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) \ - (IRO[278].base + ((pfId) * IRO[278].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) \ - (IRO[279].base + ((pfId) * IRO[279].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) \ - (IRO[280].base + ((pfId) * IRO[280].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) \ - (IRO[281].base + ((pfId) * IRO[281].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) \ - (IRO[282].base + ((pfId) * IRO[282].m1)) -#define XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) \ - (IRO[283].base + ((pfId) * IRO[283].m1)) -#define XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) \ - (IRO[284].base + ((pfId) * IRO[284].m1)) -#define XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ - (IRO[274].base + ((pfId) * IRO[274].m1)) -#define XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ - (IRO[273].base + ((pfId) * IRO[273].m1)) -#define XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ - (IRO[272].base + ((pfId) * IRO[272].m1)) -#define XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \ - (IRO[277].base + ((pfId) * IRO[277].m1)) -#define XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) \ - (IRO[276].base + ((pfId) * IRO[276].m1)) -#define XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) \ - (IRO[271].base + ((pfId) * IRO[271].m1)) -#define XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \ - (IRO[270].base + ((pfId) * IRO[270].m1)) -#define XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) \ - (IRO[269].base + ((pfId) * IRO[269].m1)) -#define XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) \ - (IRO[268].base + ((pfId) * IRO[268].m1)) -#define XSTORM_PATH_ID_OFFSET (IRO[62].base) -#define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) \ (IRO[45].base + ((pfId) * IRO[45].m1)) +#define XSTORM_FUNC_EN_OFFSET(funcId) \ + (IRO[47].base + ((funcId) * IRO[47].m1)) +#define XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \ + (IRO[295].base + ((pfId) * IRO[295].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) \ + (IRO[298].base + ((pfId) * IRO[298].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) \ + (IRO[299].base + ((pfId) * IRO[299].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) \ + (IRO[300].base + ((pfId) * IRO[300].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) \ + (IRO[301].base + ((pfId) * IRO[301].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) \ + (IRO[302].base + ((pfId) * IRO[302].m1)) +#define XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) \ + (IRO[303].base + ((pfId) * IRO[303].m1)) +#define XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) \ + (IRO[304].base + ((pfId) * IRO[304].m1)) +#define XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \ + (IRO[294].base + ((pfId) * IRO[294].m1)) +#define XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \ + (IRO[293].base + ((pfId) * IRO[293].m1)) +#define XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \ + (IRO[292].base + ((pfId) * IRO[292].m1)) +#define XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \ + (IRO[297].base + ((pfId) * IRO[297].m1)) +#define XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) \ + (IRO[296].base + ((pfId) * IRO[296].m1)) +#define XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) \ + (IRO[291].base + ((pfId) * IRO[291].m1)) +#define XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \ + (IRO[290].base + ((pfId) * IRO[290].m1)) +#define XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) \ + (IRO[289].base + ((pfId) * IRO[289].m1)) +#define XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) \ + (IRO[288].base + ((pfId) * IRO[288].m1)) +#define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) \ + (IRO[44].base + ((pfId) * IRO[44].m1)) +#define XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \ + (IRO[49].base + ((funcId) * IRO[49].m1)) #define XSTORM_SPQ_DATA_OFFSET(funcId) \ (IRO[32].base + ((funcId) * IRO[32].m1)) #define XSTORM_SPQ_DATA_SIZE (IRO[32].size) @@ -232,14 +230,14 @@ #define XSTORM_SPQ_PROD_OFFSET(funcId) \ (IRO[31].base + ((funcId) * IRO[31].m1)) #define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) \ - (IRO[193].base + ((portId) * IRO[193].m1)) + (IRO[211].base + ((portId) * IRO[211].m1)) #define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) \ - (IRO[194].base + ((portId) * IRO[194].m1)) + (IRO[212].base + ((portId) * IRO[212].m1)) #define XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) \ - (IRO[196].base + (((pfId)>>1) * IRO[196].m1) + (((pfId)&1) * \ - IRO[196].m2)) + (IRO[214].base + (((pfId)>>1) * IRO[214].m1) + (((pfId)&1) * \ + IRO[214].m2)) #define XSTORM_VF_TO_PF_OFFSET(funcId) \ - (IRO[49].base + ((funcId) * IRO[49].m1)) + (IRO[48].base + ((funcId) * IRO[48].m1)) #define COMMON_ASM_INVALID_ASSERT_OPCODE 0x0 /** @@ -253,32 +251,15 @@ #include "Microcode\Generated\DataTypes\eth_rx_cqe_next_page.h" #endif -/* RSS hash types */ -#define DEFAULT_HASH_TYPE 0 -#define IPV4_HASH_TYPE 1 -#define TCP_IPV4_HASH_TYPE 2 -#define IPV6_HASH_TYPE 3 -#define TCP_IPV6_HASH_TYPE 4 -#define VLAN_PRI_HASH_TYPE 5 -#define E1HOV_PRI_HASH_TYPE 6 -#define DSCP_HASH_TYPE 7 - /* Ethernet Ring parameters */ #define X_ETH_LOCAL_RING_SIZE 13 -#define FIRST_BD_IN_PKT 0 +#define FIRST_BD_IN_PKT 0 #define PARSE_BD_INDEX 1 #define NUM_OF_ETH_BDS_IN_PAGE ((PAGE_SIZE)/(STRUCT_SIZE(eth_tx_bd)/8)) #define U_ETH_NUM_OF_SGES_TO_FETCH 8 #define U_ETH_MAX_SGES_FOR_PACKET 3 -/*Tx params*/ -#define X_ETH_NO_VLAN 0 -#define X_ETH_OUTBAND_VLAN 1 -#define X_ETH_INBAND_VLAN 2 -#define X_ETH_FW_ADDED_VLAN 3 -#define X_ETH_MAX_VLAN_MODES 3 - /* Rx ring params */ #define U_ETH_LOCAL_BD_RING_SIZE 8 #define U_ETH_LOCAL_SGE_RING_SIZE 10 @@ -294,34 +275,24 @@ #define U_ETH_BDS_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_bd)/8)) #define U_ETH_SGES_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_sge)/8)) -#define U_ETH_BDS_PER_PAGE_MASK (U_ETH_BDS_PER_PAGE-1) -#define U_ETH_CQE_PER_PAGE_MASK (TU_ETH_CQES_PER_PAGE-1) +#define U_ETH_BDS_PER_PAGE_MASK (U_ETH_BDS_PER_PAGE-1) +#define U_ETH_CQE_PER_PAGE_MASK (TU_ETH_CQES_PER_PAGE-1) #define U_ETH_SGES_PER_PAGE_MASK (U_ETH_SGES_PER_PAGE-1) #define U_ETH_UNDEFINED_Q 0xFF -/* values of command IDs in the ramrod message */ -#define RAMROD_CMD_ID_ETH_UNUSED 0 -#define RAMROD_CMD_ID_ETH_CLIENT_SETUP 1 -#define RAMROD_CMD_ID_ETH_RSS_UPDATE 2 -#define RAMROD_CMD_ID_ETH_HALT 3 -#define RAMROD_CMD_ID_ETH_FORWARD_SETUP 4 -#define RAMROD_CMD_ID_ETH_CLIENT_UPDATE 5 -#define RAMROD_CMD_ID_ETH_EMPTY 6 -#define RAMROD_CMD_ID_ETH_TERMINATE 7 - - -/* command values for set mac command */ -#define T_ETH_MAC_COMMAND_SET 0 -#define T_ETH_MAC_COMMAND_INVALIDATE 1 - #define T_ETH_INDIRECTION_TABLE_SIZE 128 -#define RSS_KEYS_ARRAY_SIZE 10 +#define T_ETH_RSS_KEY 10 +#define ETH_NUM_OF_RSS_ENGINES_E2 72 + +#define FILTER_RULES_COUNT 16 +#define MULTICAST_RULES_COUNT 16 +#define CLASSIFY_RULES_COUNT 16 /*The CRC32 seed, that is used for the hash(reduction) multicast address */ #define ETH_CRC32_HASH_SEED 0x00000000 -#define ETH_CRC32_HASH_BIT_SIZE (8) +#define ETH_CRC32_HASH_BIT_SIZE (8) #define ETH_CRC32_HASH_MASK EVAL((1<= 10G) */ -#define PORT_FEATURE_CON_SWITCH_10G_SWITCH 0x01000000 -#define PORT_FEATURE_CON_SWITCH_AUTO_DETECT 0x02000000 -#define PORT_FEATURE_CON_SWITCH_ONE_TIME_DETECT 0x03000000 + u32 link_config; /* Used as HW defaults for the driver */ + #define PORT_FEATURE_CONNECTED_SWITCH_MASK 0x03000000 + #define PORT_FEATURE_CONNECTED_SWITCH_SHIFT 24 + /* (forced) low speed switch (< 10G) */ + #define PORT_FEATURE_CON_SWITCH_1G_SWITCH 0x00000000 + /* (forced) high speed switch (>= 10G) */ + #define PORT_FEATURE_CON_SWITCH_10G_SWITCH 0x01000000 + #define PORT_FEATURE_CON_SWITCH_AUTO_DETECT 0x02000000 + #define PORT_FEATURE_CON_SWITCH_ONE_TIME_DETECT 0x03000000 -#define PORT_FEATURE_LINK_SPEED_MASK 0x000f0000 -#define PORT_FEATURE_LINK_SPEED_SHIFT 16 -#define PORT_FEATURE_LINK_SPEED_AUTO 0x00000000 -#define PORT_FEATURE_LINK_SPEED_10M_FULL 0x00010000 -#define PORT_FEATURE_LINK_SPEED_10M_HALF 0x00020000 -#define PORT_FEATURE_LINK_SPEED_100M_HALF 0x00030000 -#define PORT_FEATURE_LINK_SPEED_100M_FULL 0x00040000 -#define PORT_FEATURE_LINK_SPEED_1G 0x00050000 -#define PORT_FEATURE_LINK_SPEED_2_5G 0x00060000 -#define PORT_FEATURE_LINK_SPEED_10G_CX4 0x00070000 -#define PORT_FEATURE_LINK_SPEED_10G_KX4 0x00080000 -#define PORT_FEATURE_LINK_SPEED_10G_KR 0x00090000 -#define PORT_FEATURE_LINK_SPEED_12G 0x000a0000 -#define PORT_FEATURE_LINK_SPEED_12_5G 0x000b0000 -#define PORT_FEATURE_LINK_SPEED_13G 0x000c0000 -#define PORT_FEATURE_LINK_SPEED_15G 0x000d0000 -#define PORT_FEATURE_LINK_SPEED_16G 0x000e0000 + #define PORT_FEATURE_LINK_SPEED_MASK 0x000f0000 + #define PORT_FEATURE_LINK_SPEED_SHIFT 16 + #define PORT_FEATURE_LINK_SPEED_AUTO 0x00000000 + #define PORT_FEATURE_LINK_SPEED_10M_FULL 0x00010000 + #define PORT_FEATURE_LINK_SPEED_10M_HALF 0x00020000 + #define PORT_FEATURE_LINK_SPEED_100M_HALF 0x00030000 + #define PORT_FEATURE_LINK_SPEED_100M_FULL 0x00040000 + #define PORT_FEATURE_LINK_SPEED_1G 0x00050000 + #define PORT_FEATURE_LINK_SPEED_2_5G 0x00060000 + #define PORT_FEATURE_LINK_SPEED_10G_CX4 0x00070000 + #define PORT_FEATURE_LINK_SPEED_20G 0x00080000 -#define PORT_FEATURE_FLOW_CONTROL_MASK 0x00000700 -#define PORT_FEATURE_FLOW_CONTROL_SHIFT 8 -#define PORT_FEATURE_FLOW_CONTROL_AUTO 0x00000000 -#define PORT_FEATURE_FLOW_CONTROL_TX 0x00000100 -#define PORT_FEATURE_FLOW_CONTROL_RX 0x00000200 -#define PORT_FEATURE_FLOW_CONTROL_BOTH 0x00000300 -#define PORT_FEATURE_FLOW_CONTROL_NONE 0x00000400 + #define PORT_FEATURE_FLOW_CONTROL_MASK 0x00000700 + #define PORT_FEATURE_FLOW_CONTROL_SHIFT 8 + #define PORT_FEATURE_FLOW_CONTROL_AUTO 0x00000000 + #define PORT_FEATURE_FLOW_CONTROL_TX 0x00000100 + #define PORT_FEATURE_FLOW_CONTROL_RX 0x00000200 + #define PORT_FEATURE_FLOW_CONTROL_BOTH 0x00000300 + #define PORT_FEATURE_FLOW_CONTROL_NONE 0x00000400 - /* The default for MCP link configuration, - uses the same defines as link_config */ - u32 mfw_wol_link_cfg; + /* The default for MCP link configuration, + uses the same defines as link_config */ + u32 mfw_wol_link_cfg; - /* The default for the driver of the second external phy, - uses the same defines as link_config */ - u32 link_config2; /* 0x47C */ + /* The default for the driver of the second external phy, + uses the same defines as link_config */ + u32 link_config2; /* 0x47C */ - /* The default for MCP of the second external phy, - uses the same defines as link_config */ - u32 mfw_wol_link_cfg2; /* 0x480 */ + /* The default for MCP of the second external phy, + uses the same defines as link_config */ + u32 mfw_wol_link_cfg2; /* 0x480 */ - u32 Reserved2[17]; /* 0x484 */ + u32 Reserved2[17]; /* 0x484 */ }; /**************************************************************************** - * Device Information * + * Device Information * ****************************************************************************/ struct shm_dev_info { /* size */ - u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */ + u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */ - struct shared_hw_cfg shared_hw_config; /* 40 */ + struct shared_hw_cfg shared_hw_config; /* 40 */ - struct port_hw_cfg port_hw_config[PORT_MAX]; /* 400*2=800 */ + struct port_hw_cfg port_hw_config[PORT_MAX]; /* 400*2=800 */ - struct shared_feat_cfg shared_feature_config; /* 4 */ + struct shared_feat_cfg shared_feature_config; /* 4 */ - struct port_feat_cfg port_feature_config[PORT_MAX];/* 116*2=232 */ + struct port_feat_cfg port_feature_config[PORT_MAX];/* 116*2=232 */ }; +struct extended_dev_info_shared_cfg { /* NVRAM OFFSET */ + + /* Threshold in celcius to start using the fan */ + u32 temperature_monitor1; /* 0x4000 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_THRESH_MASK 0x0000007F + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_THRESH_SHIFT 0 + + /* Threshold in celcius to shut down the board */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_THRESH_MASK 0x00007F00 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_THRESH_SHIFT 8 + + /* EPIO of fan temperature status */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_MASK 0x00FF0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_SHIFT 16 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_NA 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO0 0x00010000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO1 0x00020000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO2 0x00030000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO3 0x00040000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO4 0x00050000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO5 0x00060000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO6 0x00070000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO7 0x00080000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO8 0x00090000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO9 0x000a0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO10 0x000b0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO11 0x000c0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO12 0x000d0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO13 0x000e0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO14 0x000f0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO15 0x00100000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO16 0x00110000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO17 0x00120000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO18 0x00130000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO19 0x00140000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO20 0x00150000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO21 0x00160000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO22 0x00170000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO23 0x00180000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO24 0x00190000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO25 0x001a0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO26 0x001b0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO27 0x001c0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO28 0x001d0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO29 0x001e0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO30 0x001f0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_FAN_EPIO_EPIO31 0x00200000 + + /* EPIO of shut down temperature status */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_MASK 0xFF000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_SHIFT 24 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_NA 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO0 0x01000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO1 0x02000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO2 0x03000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO3 0x04000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO4 0x05000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO5 0x06000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO6 0x07000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO7 0x08000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO8 0x09000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO9 0x0a000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO10 0x0b000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO11 0x0c000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO12 0x0d000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO13 0x0e000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO14 0x0f000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO15 0x10000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO16 0x11000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO17 0x12000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO18 0x13000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO19 0x14000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO20 0x15000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO21 0x16000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO22 0x17000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO23 0x18000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO24 0x19000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO25 0x1a000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO26 0x1b000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO27 0x1c000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO28 0x1d000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO29 0x1e000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO30 0x1f000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SHUT_EPIO_EPIO31 0x20000000 + + + /* EPIO of shut down temperature status */ + u32 temperature_monitor2; /* 0x4004 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_PERIOD_MASK 0x0000FFFF + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_PERIOD_SHIFT 0 + + + /* MFW flavor to be used */ + u32 mfw_cfg; /* 0x4008 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_MFW_FLAVOR_MASK 0x000000FF + #define EXTENDED_DEV_INFO_SHARED_CFG_MFW_FLAVOR_SHIFT 0 + #define EXTENDED_DEV_INFO_SHARED_CFG_MFW_FLAVOR_NA 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_MFW_FLAVOR_A 0x00000001 + + + u32 smbus_config; /* 0x400C */ + #define EXTENDED_DEV_INFO_SHARED_CFG_SMBUS_ADDR_MASK 0x000000FF + #define EXTENDED_DEV_INFO_SHARED_CFG_SMBUS_ADDR_SHIFT 0 + + + /* Switching regulator loop gain */ + u32 board_cfg; /* 0x4010 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_MASK 0x0000000F + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_SHIFT 0 + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_HW_DEFAULT 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X2 0x00000008 + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X4 0x00000009 + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X8 0x0000000a + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X16 0x0000000b + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_DIV8 0x0000000c + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_DIV4 0x0000000d + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_DIV2 0x0000000e + #define EXTENDED_DEV_INFO_SHARED_CFG_LOOP_GAIN_X1 0x0000000f + + /* whether shadow swim feature is supported */ + #define EXTENDED_DEV_INFO_SHARED_CFG_SHADOW_SWIM_MASK 0x00000100 + #define EXTENDED_DEV_INFO_SHARED_CFG_SHADOW_SWIM_SHIFT 8 + #define EXTENDED_DEV_INFO_SHARED_CFG_SHADOW_SWIM_DISABLED 0x00000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_SHADOW_SWIM_ENABLED 0x00000100 + + + /* Threshold in celcius for max continuous operation */ + u32 temperature_report; /* 0x4014 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_MCOT_MASK 0x0000007F + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_MCOT_SHIFT 0 + + /* Threshold in celcius for sensor caution */ + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SCT_MASK 0x00007F00 + #define EXTENDED_DEV_INFO_SHARED_CFG_TEMP_SCT_SHIFT 8 + + + /* wwn node prefix to be used (unless value is 0) */ + u32 wwn_prefix; /* 0x4018 */ + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_NODE_PREFIX0_MASK 0x000000FF + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_NODE_PREFIX0_SHIFT 0 + + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_NODE_PREFIX1_MASK 0x0000FF00 + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_NODE_PREFIX1_SHIFT 8 + + /* wwn port prefix to be used (unless value is 0) */ + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_PORT_PREFIX0_MASK 0x00FF0000 + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_PORT_PREFIX0_SHIFT 16 + + /* wwn port prefix to be used (unless value is 0) */ + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_PORT_PREFIX1_MASK 0xFF000000 + #define EXTENDED_DEV_INFO_SHARED_CFG_WWN_PORT_PREFIX1_SHIFT 24 + +}; + + #if !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) -#error "Missing either LITTLE_ENDIAN or BIG_ENDIAN definition." + #error "Missing either LITTLE_ENDIAN or BIG_ENDIAN definition." #endif -#define FUNC_0 0 -#define FUNC_1 1 -#define FUNC_2 2 -#define FUNC_3 3 -#define FUNC_4 4 -#define FUNC_5 5 -#define FUNC_6 6 -#define FUNC_7 7 -#define E1_FUNC_MAX 2 -#define E1H_FUNC_MAX 8 -#define E2_FUNC_MAX 4 /* per path */ +#define FUNC_0 0 +#define FUNC_1 1 +#define FUNC_2 2 +#define FUNC_3 3 +#define FUNC_4 4 +#define FUNC_5 5 +#define FUNC_6 6 +#define FUNC_7 7 +#define E1_FUNC_MAX 2 +#define E1H_FUNC_MAX 8 +#define E2_FUNC_MAX 4 /* per path */ -#define VN_0 0 -#define VN_1 1 -#define VN_2 2 -#define VN_3 3 -#define E1VN_MAX 1 -#define E1HVN_MAX 4 +#define VN_0 0 +#define VN_1 1 +#define VN_2 2 +#define VN_3 3 +#define E1VN_MAX 1 +#define E1HVN_MAX 4 -#define E2_VF_MAX 64 +#define E2_VF_MAX 64 /* HC_REG_VF_CONFIGURATION_SIZE */ /* This value (in milliseconds) determines the frequency of the driver * issuing the PULSE message code. The firmware monitors this periodic * pulse to determine when to switch to an OS-absent mode. */ -#define DRV_PULSE_PERIOD_MS 250 +#define DRV_PULSE_PERIOD_MS 250 /* This value (in milliseconds) determines how long the driver should * wait for an acknowledgement from the firmware before timing out. Once * the firmware has timed out, the driver will assume there is no firmware * running and there won't be any firmware-driver synchronization during a * driver reset. */ -#define FW_ACK_TIME_OUT_MS 5000 +#define FW_ACK_TIME_OUT_MS 5000 -#define FW_ACK_POLL_TIME_MS 1 +#define FW_ACK_POLL_TIME_MS 1 #define FW_ACK_NUM_OF_POLL (FW_ACK_TIME_OUT_MS/FW_ACK_POLL_TIME_MS) -/* LED Blink rate that will achieve ~15.9Hz */ -#define LED_BLINK_RATE_VAL 480 +#define MFW_TRACE_SIGNATURE 0x54524342 /**************************************************************************** - * Driver <-> FW Mailbox * + * Driver <-> FW Mailbox * ****************************************************************************/ struct drv_port_mb { - u32 link_status; - /* Driver should update this field on any link change event */ + u32 link_status; + /* Driver should update this field on any link change event */ -#define LINK_STATUS_LINK_FLAG_MASK 0x00000001 -#define LINK_STATUS_LINK_UP 0x00000001 -#define LINK_STATUS_SPEED_AND_DUPLEX_MASK 0x0000001E -#define LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE (0<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_10THD (1<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_10TFD (2<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_100TXHD (3<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_100T4 (4<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_100TXFD (5<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_1000THD (6<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_1000TFD (7<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_1000XFD (7<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_2500THD (8<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_2500TFD (9<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_2500XFD (9<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_10GTFD (10<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_10GXFD (10<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_12GTFD (11<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_12GXFD (11<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_12_5GTFD (12<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_12_5GXFD (12<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_13GTFD (13<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_13GXFD (13<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_15GTFD (14<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_15GXFD (14<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_16GTFD (15<<1) -#define LINK_STATUS_SPEED_AND_DUPLEX_16GXFD (15<<1) + #define LINK_STATUS_LINK_FLAG_MASK 0x00000001 + #define LINK_STATUS_LINK_UP 0x00000001 + #define LINK_STATUS_SPEED_AND_DUPLEX_MASK 0x0000001E + #define LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE (0<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_10THD (1<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_10TFD (2<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_100TXHD (3<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_100T4 (4<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_100TXFD (5<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_1000THD (6<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_1000TFD (7<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_1000XFD (7<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_2500THD (8<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_2500TFD (9<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_2500XFD (9<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_10GTFD (10<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_10GXFD (10<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_20GTFD (11<<1) + #define LINK_STATUS_SPEED_AND_DUPLEX_20GXFD (11<<1) -#define LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK 0x00000020 -#define LINK_STATUS_AUTO_NEGOTIATE_ENABLED 0x00000020 + #define LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK 0x00000020 + #define LINK_STATUS_AUTO_NEGOTIATE_ENABLED 0x00000020 -#define LINK_STATUS_AUTO_NEGOTIATE_COMPLETE 0x00000040 -#define LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK 0x00000080 -#define LINK_STATUS_PARALLEL_DETECTION_USED 0x00000080 + #define LINK_STATUS_AUTO_NEGOTIATE_COMPLETE 0x00000040 + #define LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK 0x00000080 + #define LINK_STATUS_PARALLEL_DETECTION_USED 0x00000080 -#define LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE 0x00000200 -#define LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE 0x00000400 -#define LINK_STATUS_LINK_PARTNER_100T4_CAPABLE 0x00000800 -#define LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE 0x00001000 -#define LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE 0x00002000 -#define LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE 0x00004000 -#define LINK_STATUS_LINK_PARTNER_10THD_CAPABLE 0x00008000 + #define LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE 0x00000200 + #define LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE 0x00000400 + #define LINK_STATUS_LINK_PARTNER_100T4_CAPABLE 0x00000800 + #define LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE 0x00001000 + #define LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE 0x00002000 + #define LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE 0x00004000 + #define LINK_STATUS_LINK_PARTNER_10THD_CAPABLE 0x00008000 -#define LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK 0x00010000 -#define LINK_STATUS_TX_FLOW_CONTROL_ENABLED 0x00010000 + #define LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK 0x00010000 + #define LINK_STATUS_TX_FLOW_CONTROL_ENABLED 0x00010000 -#define LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK 0x00020000 -#define LINK_STATUS_RX_FLOW_CONTROL_ENABLED 0x00020000 + #define LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK 0x00020000 + #define LINK_STATUS_RX_FLOW_CONTROL_ENABLED 0x00020000 -#define LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK 0x000C0000 -#define LINK_STATUS_LINK_PARTNER_NOT_PAUSE_CAPABLE (0<<18) -#define LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE (1<<18) -#define LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE (2<<18) -#define LINK_STATUS_LINK_PARTNER_BOTH_PAUSE (3<<18) + #define LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK 0x000C0000 + #define LINK_STATUS_LINK_PARTNER_NOT_PAUSE_CAPABLE (0<<18) + #define LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE (1<<18) + #define LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE (2<<18) + #define LINK_STATUS_LINK_PARTNER_BOTH_PAUSE (3<<18) -#define LINK_STATUS_SERDES_LINK 0x00100000 + #define LINK_STATUS_SERDES_LINK 0x00100000 -#define LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE 0x00200000 -#define LINK_STATUS_LINK_PARTNER_2500XHD_CAPABLE 0x00400000 -#define LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE 0x00800000 -#define LINK_STATUS_LINK_PARTNER_12GXFD_CAPABLE 0x01000000 -#define LINK_STATUS_LINK_PARTNER_12_5GXFD_CAPABLE 0x02000000 -#define LINK_STATUS_LINK_PARTNER_13GXFD_CAPABLE 0x04000000 -#define LINK_STATUS_LINK_PARTNER_15GXFD_CAPABLE 0x08000000 -#define LINK_STATUS_LINK_PARTNER_16GXFD_CAPABLE 0x10000000 + #define LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE 0x00200000 + #define LINK_STATUS_LINK_PARTNER_2500XHD_CAPABLE 0x00400000 + #define LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE 0x00800000 + #define LINK_STATUS_LINK_PARTNER_20GXFD_CAPABLE 0x10000000 - u32 port_stx; + #define LINK_STATUS_PFC_ENABLED 0x20000000 - u32 stat_nig_timer; + #define LINK_STATUS_PHYSICAL_LINK_FLAG 0x40000000 - /* MCP firmware does not use this field */ - u32 ext_phy_fw_version; + u32 port_stx; + + u32 stat_nig_timer; + + /* MCP firmware does not use this field */ + u32 ext_phy_fw_version; }; struct drv_func_mb { - u32 drv_mb_header; -#define DRV_MSG_CODE_MASK 0xffff0000 -#define DRV_MSG_CODE_LOAD_REQ 0x10000000 -#define DRV_MSG_CODE_LOAD_DONE 0x11000000 -#define DRV_MSG_CODE_UNLOAD_REQ_WOL_EN 0x20000000 -#define DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS 0x20010000 -#define DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP 0x20020000 -#define DRV_MSG_CODE_UNLOAD_DONE 0x21000000 -#define DRV_MSG_CODE_DCC_OK 0x30000000 -#define DRV_MSG_CODE_DCC_FAILURE 0x31000000 -#define DRV_MSG_CODE_DIAG_ENTER_REQ 0x50000000 -#define DRV_MSG_CODE_DIAG_EXIT_REQ 0x60000000 -#define DRV_MSG_CODE_VALIDATE_KEY 0x70000000 -#define DRV_MSG_CODE_GET_CURR_KEY 0x80000000 -#define DRV_MSG_CODE_GET_UPGRADE_KEY 0x81000000 -#define DRV_MSG_CODE_GET_MANUF_KEY 0x82000000 -#define DRV_MSG_CODE_LOAD_L2B_PRAM 0x90000000 - /* - * The optic module verification command requires bootcode - * v5.0.6 or later - */ -#define DRV_MSG_CODE_VRFY_FIRST_PHY_OPT_MDL 0xa0000000 -#define REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL 0x00050006 - /* - * The specific optic module verification command requires bootcode - * v5.2.12 or later - */ -#define DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL 0xa1000000 -#define REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL 0x00050234 -#define DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG 0xb0000000 -#define DRV_MSG_CODE_DCBX_PMF_DRV_OK 0xb2000000 + u32 drv_mb_header; + #define DRV_MSG_CODE_MASK 0xffff0000 + #define DRV_MSG_CODE_LOAD_REQ 0x10000000 + #define DRV_MSG_CODE_LOAD_DONE 0x11000000 + #define DRV_MSG_CODE_UNLOAD_REQ_WOL_EN 0x20000000 + #define DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS 0x20010000 + #define DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP 0x20020000 + #define DRV_MSG_CODE_UNLOAD_DONE 0x21000000 + #define DRV_MSG_CODE_DCC_OK 0x30000000 + #define DRV_MSG_CODE_DCC_FAILURE 0x31000000 + #define DRV_MSG_CODE_DIAG_ENTER_REQ 0x50000000 + #define DRV_MSG_CODE_DIAG_EXIT_REQ 0x60000000 + #define DRV_MSG_CODE_VALIDATE_KEY 0x70000000 + #define DRV_MSG_CODE_GET_CURR_KEY 0x80000000 + #define DRV_MSG_CODE_GET_UPGRADE_KEY 0x81000000 + #define DRV_MSG_CODE_GET_MANUF_KEY 0x82000000 + #define DRV_MSG_CODE_LOAD_L2B_PRAM 0x90000000 + /* + * The optic module verification command requires bootcode + * v5.0.6 or later, te specific optic module verification command + * requires bootcode v5.2.12 or later + */ + #define DRV_MSG_CODE_VRFY_FIRST_PHY_OPT_MDL 0xa0000000 + #define REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL 0x00050006 + #define DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL 0xa1000000 + #define REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL 0x00050234 + #define DRV_MSG_CODE_VRFY_AFEX_SUPPORTED 0xa2000000 + #define REQ_BC_VER_4_VRFY_AFEX_SUPPORTED 0x00070002 + #define REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED 0x00070014 + #define REQ_BC_VER_4_PFC_STATS_SUPPORTED 0x00070201 + #define REQ_BC_VER_4_FCOE_FEATURES 0x00070209 -#define DRV_MSG_CODE_VF_DISABLED_DONE 0xc0000000 + #define DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG 0xb0000000 + #define DRV_MSG_CODE_DCBX_PMF_DRV_OK 0xb2000000 -#define BIOS_MSG_CODE_LIC_CHALLENGE 0xff010000 -#define BIOS_MSG_CODE_LIC_RESPONSE 0xff020000 -#define BIOS_MSG_CODE_VIRT_MAC_PRIM 0xff030000 -#define BIOS_MSG_CODE_VIRT_MAC_ISCSI 0xff040000 + #define DRV_MSG_CODE_VF_DISABLED_DONE 0xc0000000 -#define DRV_MSG_SEQ_NUMBER_MASK 0x0000ffff + #define DRV_MSG_CODE_AFEX_DRIVER_SETMAC 0xd0000000 + #define DRV_MSG_CODE_AFEX_LISTGET_ACK 0xd1000000 + #define DRV_MSG_CODE_AFEX_LISTSET_ACK 0xd2000000 + #define DRV_MSG_CODE_AFEX_STATSGET_ACK 0xd3000000 + #define DRV_MSG_CODE_AFEX_VIFSET_ACK 0xd4000000 - u32 drv_mb_param; + #define DRV_MSG_CODE_DRV_INFO_ACK 0xd8000000 + #define DRV_MSG_CODE_DRV_INFO_NACK 0xd9000000 - u32 fw_mb_header; -#define FW_MSG_CODE_MASK 0xffff0000 -#define FW_MSG_CODE_DRV_LOAD_COMMON 0x10100000 -#define FW_MSG_CODE_DRV_LOAD_PORT 0x10110000 -#define FW_MSG_CODE_DRV_LOAD_FUNCTION 0x10120000 - /* Load common chip is supported from bc 6.0.0 */ -#define REQ_BC_VER_4_DRV_LOAD_COMMON_CHIP 0x00060000 -#define FW_MSG_CODE_DRV_LOAD_COMMON_CHIP 0x10130000 + #define DRV_MSG_CODE_SET_MF_BW 0xe0000000 + #define REQ_BC_VER_4_SET_MF_BW 0x00060202 + #define DRV_MSG_CODE_SET_MF_BW_ACK 0xe1000000 -#define FW_MSG_CODE_DRV_LOAD_REFUSED 0x10200000 -#define FW_MSG_CODE_DRV_LOAD_DONE 0x11100000 -#define FW_MSG_CODE_DRV_UNLOAD_COMMON 0x20100000 -#define FW_MSG_CODE_DRV_UNLOAD_PORT 0x20110000 -#define FW_MSG_CODE_DRV_UNLOAD_FUNCTION 0x20120000 -#define FW_MSG_CODE_DRV_UNLOAD_DONE 0x21100000 -#define FW_MSG_CODE_DCC_DONE 0x30100000 -#define FW_MSG_CODE_LLDP_DONE 0x40100000 -#define FW_MSG_CODE_DIAG_ENTER_DONE 0x50100000 -#define FW_MSG_CODE_DIAG_REFUSE 0x50200000 -#define FW_MSG_CODE_DIAG_EXIT_DONE 0x60100000 -#define FW_MSG_CODE_VALIDATE_KEY_SUCCESS 0x70100000 -#define FW_MSG_CODE_VALIDATE_KEY_FAILURE 0x70200000 -#define FW_MSG_CODE_GET_KEY_DONE 0x80100000 -#define FW_MSG_CODE_NO_KEY 0x80f00000 -#define FW_MSG_CODE_LIC_INFO_NOT_READY 0x80f80000 -#define FW_MSG_CODE_L2B_PRAM_LOADED 0x90100000 -#define FW_MSG_CODE_L2B_PRAM_T_LOAD_FAILURE 0x90210000 -#define FW_MSG_CODE_L2B_PRAM_C_LOAD_FAILURE 0x90220000 -#define FW_MSG_CODE_L2B_PRAM_X_LOAD_FAILURE 0x90230000 -#define FW_MSG_CODE_L2B_PRAM_U_LOAD_FAILURE 0x90240000 -#define FW_MSG_CODE_VRFY_OPT_MDL_SUCCESS 0xa0100000 -#define FW_MSG_CODE_VRFY_OPT_MDL_INVLD_IMG 0xa0200000 -#define FW_MSG_CODE_VRFY_OPT_MDL_UNAPPROVED 0xa0300000 -#define FW_MSG_CODE_VF_DISABLED_DONE 0xb0000000 + #define DRV_MSG_CODE_LINK_STATUS_CHANGED 0x01000000 -#define FW_MSG_CODE_LIC_CHALLENGE 0xff010000 -#define FW_MSG_CODE_LIC_RESPONSE 0xff020000 -#define FW_MSG_CODE_VIRT_MAC_PRIM 0xff030000 -#define FW_MSG_CODE_VIRT_MAC_ISCSI 0xff040000 + #define DRV_MSG_CODE_INITIATE_FLR 0x02000000 + #define REQ_BC_VER_4_INITIATE_FLR 0x00070213 -#define FW_MSG_SEQ_NUMBER_MASK 0x0000ffff + #define BIOS_MSG_CODE_LIC_CHALLENGE 0xff010000 + #define BIOS_MSG_CODE_LIC_RESPONSE 0xff020000 + #define BIOS_MSG_CODE_VIRT_MAC_PRIM 0xff030000 + #define BIOS_MSG_CODE_VIRT_MAC_ISCSI 0xff040000 - u32 fw_mb_param; + #define DRV_MSG_SEQ_NUMBER_MASK 0x0000ffff - u32 drv_pulse_mb; -#define DRV_PULSE_SEQ_MASK 0x00007fff -#define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000 - /* The system time is in the format of - * (year-2001)*12*32 + month*32 + day. */ -#define DRV_PULSE_ALWAYS_ALIVE 0x00008000 - /* Indicate to the firmware not to go into the - * OS-absent when it is not getting driver pulse. - * This is used for debugging as well for PXE(MBA). */ + u32 drv_mb_param; + #define DRV_MSG_CODE_SET_MF_BW_MIN_MASK 0x00ff0000 + #define DRV_MSG_CODE_SET_MF_BW_MAX_MASK 0xff000000 - u32 mcp_pulse_mb; -#define MCP_PULSE_SEQ_MASK 0x00007fff -#define MCP_PULSE_ALWAYS_ALIVE 0x00008000 - /* Indicates to the driver not to assert due to lack - * of MCP response */ -#define MCP_EVENT_MASK 0xffff0000 -#define MCP_EVENT_OTHER_DRIVER_RESET_REQ 0x00010000 + #define DRV_MSG_CODE_UNLOAD_NON_D3_POWER 0x00000001 - u32 iscsi_boot_signature; - u32 iscsi_boot_block_offset; + u32 fw_mb_header; + #define FW_MSG_CODE_MASK 0xffff0000 + #define FW_MSG_CODE_DRV_LOAD_COMMON 0x10100000 + #define FW_MSG_CODE_DRV_LOAD_PORT 0x10110000 + #define FW_MSG_CODE_DRV_LOAD_FUNCTION 0x10120000 + /* Load common chip is supported from bc 6.0.0 */ + #define REQ_BC_VER_4_DRV_LOAD_COMMON_CHIP 0x00060000 + #define FW_MSG_CODE_DRV_LOAD_COMMON_CHIP 0x10130000 - u32 drv_status; -#define DRV_STATUS_PMF 0x00000001 -#define DRV_STATUS_VF_DISABLED 0x00000002 + #define FW_MSG_CODE_DRV_LOAD_REFUSED 0x10200000 + #define FW_MSG_CODE_DRV_LOAD_DONE 0x11100000 + #define FW_MSG_CODE_DRV_UNLOAD_COMMON 0x20100000 + #define FW_MSG_CODE_DRV_UNLOAD_PORT 0x20110000 + #define FW_MSG_CODE_DRV_UNLOAD_FUNCTION 0x20120000 + #define FW_MSG_CODE_DRV_UNLOAD_DONE 0x21100000 + #define FW_MSG_CODE_DCC_DONE 0x30100000 + #define FW_MSG_CODE_LLDP_DONE 0x40100000 + #define FW_MSG_CODE_DIAG_ENTER_DONE 0x50100000 + #define FW_MSG_CODE_DIAG_REFUSE 0x50200000 + #define FW_MSG_CODE_DIAG_EXIT_DONE 0x60100000 + #define FW_MSG_CODE_VALIDATE_KEY_SUCCESS 0x70100000 + #define FW_MSG_CODE_VALIDATE_KEY_FAILURE 0x70200000 + #define FW_MSG_CODE_GET_KEY_DONE 0x80100000 + #define FW_MSG_CODE_NO_KEY 0x80f00000 + #define FW_MSG_CODE_LIC_INFO_NOT_READY 0x80f80000 + #define FW_MSG_CODE_L2B_PRAM_LOADED 0x90100000 + #define FW_MSG_CODE_L2B_PRAM_T_LOAD_FAILURE 0x90210000 + #define FW_MSG_CODE_L2B_PRAM_C_LOAD_FAILURE 0x90220000 + #define FW_MSG_CODE_L2B_PRAM_X_LOAD_FAILURE 0x90230000 + #define FW_MSG_CODE_L2B_PRAM_U_LOAD_FAILURE 0x90240000 + #define FW_MSG_CODE_VRFY_OPT_MDL_SUCCESS 0xa0100000 + #define FW_MSG_CODE_VRFY_OPT_MDL_INVLD_IMG 0xa0200000 + #define FW_MSG_CODE_VRFY_OPT_MDL_UNAPPROVED 0xa0300000 + #define FW_MSG_CODE_VF_DISABLED_DONE 0xb0000000 + #define FW_MSG_CODE_HW_SET_INVALID_IMAGE 0xb0100000 -#define DRV_STATUS_DCC_EVENT_MASK 0x0000ff00 -#define DRV_STATUS_DCC_DISABLE_ENABLE_PF 0x00000100 -#define DRV_STATUS_DCC_BANDWIDTH_ALLOCATION 0x00000200 -#define DRV_STATUS_DCC_CHANGE_MAC_ADDRESS 0x00000400 -#define DRV_STATUS_DCC_RESERVED1 0x00000800 -#define DRV_STATUS_DCC_SET_PROTOCOL 0x00001000 -#define DRV_STATUS_DCC_SET_PRIORITY 0x00002000 + #define FW_MSG_CODE_AFEX_DRIVER_SETMAC_DONE 0xd0100000 + #define FW_MSG_CODE_AFEX_LISTGET_ACK 0xd1100000 + #define FW_MSG_CODE_AFEX_LISTSET_ACK 0xd2100000 + #define FW_MSG_CODE_AFEX_STATSGET_ACK 0xd3100000 + #define FW_MSG_CODE_AFEX_VIFSET_ACK 0xd4100000 -#define DRV_STATUS_DCBX_EVENT_MASK 0x000f0000 -#define DRV_STATUS_DCBX_NEGOTIATION_RESULTS 0x00010000 + #define FW_MSG_CODE_DRV_INFO_ACK 0xd8100000 + #define FW_MSG_CODE_DRV_INFO_NACK 0xd9100000 - u32 virt_mac_upper; -#define VIRT_MAC_SIGN_MASK 0xffff0000 -#define VIRT_MAC_SIGNATURE 0x564d0000 - u32 virt_mac_lower; + #define FW_MSG_CODE_SET_MF_BW_SENT 0xe0000000 + #define FW_MSG_CODE_SET_MF_BW_DONE 0xe1000000 + + #define FW_MSG_CODE_LINK_CHANGED_ACK 0x01100000 + + #define FW_MSG_CODE_FLR_ACK 0x02000000 + #define FW_MSG_CODE_FLR_NACK 0x02100000 + + #define FW_MSG_CODE_LIC_CHALLENGE 0xff010000 + #define FW_MSG_CODE_LIC_RESPONSE 0xff020000 + #define FW_MSG_CODE_VIRT_MAC_PRIM 0xff030000 + #define FW_MSG_CODE_VIRT_MAC_ISCSI 0xff040000 + + #define FW_MSG_SEQ_NUMBER_MASK 0x0000ffff + + u32 fw_mb_param; + + u32 drv_pulse_mb; + #define DRV_PULSE_SEQ_MASK 0x00007fff + #define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000 + /* + * The system time is in the format of + * (year-2001)*12*32 + month*32 + day. + */ + #define DRV_PULSE_ALWAYS_ALIVE 0x00008000 + /* + * Indicate to the firmware not to go into the + * OS-absent when it is not getting driver pulse. + * This is used for debugging as well for PXE(MBA). + */ + + u32 mcp_pulse_mb; + #define MCP_PULSE_SEQ_MASK 0x00007fff + #define MCP_PULSE_ALWAYS_ALIVE 0x00008000 + /* Indicates to the driver not to assert due to lack + * of MCP response */ + #define MCP_EVENT_MASK 0xffff0000 + #define MCP_EVENT_OTHER_DRIVER_RESET_REQ 0x00010000 + + u32 iscsi_boot_signature; + u32 iscsi_boot_block_offset; + + u32 drv_status; + #define DRV_STATUS_PMF 0x00000001 + #define DRV_STATUS_VF_DISABLED 0x00000002 + #define DRV_STATUS_SET_MF_BW 0x00000004 + #define DRV_STATUS_LINK_EVENT 0x00000008 + + #define DRV_STATUS_DCC_EVENT_MASK 0x0000ff00 + #define DRV_STATUS_DCC_DISABLE_ENABLE_PF 0x00000100 + #define DRV_STATUS_DCC_BANDWIDTH_ALLOCATION 0x00000200 + #define DRV_STATUS_DCC_CHANGE_MAC_ADDRESS 0x00000400 + #define DRV_STATUS_DCC_RESERVED1 0x00000800 + #define DRV_STATUS_DCC_SET_PROTOCOL 0x00001000 + #define DRV_STATUS_DCC_SET_PRIORITY 0x00002000 + + #define DRV_STATUS_DCBX_EVENT_MASK 0x000f0000 + #define DRV_STATUS_DCBX_NEGOTIATION_RESULTS 0x00010000 + #define DRV_STATUS_AFEX_EVENT_MASK 0x03f00000 + #define DRV_STATUS_AFEX_LISTGET_REQ 0x00100000 + #define DRV_STATUS_AFEX_LISTSET_REQ 0x00200000 + #define DRV_STATUS_AFEX_STATSGET_REQ 0x00400000 + #define DRV_STATUS_AFEX_VIFSET_REQ 0x00800000 + + #define DRV_STATUS_DRV_INFO_REQ 0x04000000 + + u32 virt_mac_upper; + #define VIRT_MAC_SIGN_MASK 0xffff0000 + #define VIRT_MAC_SIGNATURE 0x564d0000 + u32 virt_mac_lower; }; /**************************************************************************** - * Management firmware state * + * Management firmware state * ****************************************************************************/ /* Allocate 440 bytes for management firmware */ -#define MGMTFW_STATE_WORD_SIZE 110 +#define MGMTFW_STATE_WORD_SIZE 110 struct mgmtfw_state { - u32 opaque[MGMTFW_STATE_WORD_SIZE]; + u32 opaque[MGMTFW_STATE_WORD_SIZE]; }; /**************************************************************************** - * Multi-Function configuration * + * Multi-Function configuration * ****************************************************************************/ struct shared_mf_cfg { - u32 clp_mb; -#define SHARED_MF_CLP_SET_DEFAULT 0x00000000 - /* set by CLP */ -#define SHARED_MF_CLP_EXIT 0x00000001 - /* set by MCP */ -#define SHARED_MF_CLP_EXIT_DONE 0x00010000 + u32 clp_mb; + #define SHARED_MF_CLP_SET_DEFAULT 0x00000000 + /* set by CLP */ + #define SHARED_MF_CLP_EXIT 0x00000001 + /* set by MCP */ + #define SHARED_MF_CLP_EXIT_DONE 0x00010000 }; struct port_mf_cfg { - u32 dynamic_cfg; /* device control channel */ -#define PORT_MF_CFG_E1HOV_TAG_MASK 0x0000ffff -#define PORT_MF_CFG_E1HOV_TAG_SHIFT 0 -#define PORT_MF_CFG_E1HOV_TAG_DEFAULT PORT_MF_CFG_E1HOV_TAG_MASK + u32 dynamic_cfg; /* device control channel */ + #define PORT_MF_CFG_E1HOV_TAG_MASK 0x0000ffff + #define PORT_MF_CFG_E1HOV_TAG_SHIFT 0 + #define PORT_MF_CFG_E1HOV_TAG_DEFAULT PORT_MF_CFG_E1HOV_TAG_MASK - u32 reserved[3]; + u32 reserved[1]; }; struct func_mf_cfg { - u32 config; - /* E/R/I/D */ - /* function 0 of each port cannot be hidden */ -#define FUNC_MF_CFG_FUNC_HIDE 0x00000001 + u32 config; + /* E/R/I/D */ + /* function 0 of each port cannot be hidden */ + #define FUNC_MF_CFG_FUNC_HIDE 0x00000001 -#define FUNC_MF_CFG_PROTOCOL_MASK 0x00000006 -#define FUNC_MF_CFG_PROTOCOL_FCOE 0x00000000 -#define FUNC_MF_CFG_PROTOCOL_ETHERNET 0x00000002 -#define FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA 0x00000004 -#define FUNC_MF_CFG_PROTOCOL_ISCSI 0x00000006 -#define FUNC_MF_CFG_PROTOCOL_DEFAULT\ - FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA + #define FUNC_MF_CFG_PROTOCOL_MASK 0x00000006 + #define FUNC_MF_CFG_PROTOCOL_FCOE 0x00000000 + #define FUNC_MF_CFG_PROTOCOL_ETHERNET 0x00000002 + #define FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA 0x00000004 + #define FUNC_MF_CFG_PROTOCOL_ISCSI 0x00000006 + #define FUNC_MF_CFG_PROTOCOL_DEFAULT \ + FUNC_MF_CFG_PROTOCOL_ETHERNET_WITH_RDMA -#define FUNC_MF_CFG_FUNC_DISABLED 0x00000008 + #define FUNC_MF_CFG_FUNC_DISABLED 0x00000008 + #define FUNC_MF_CFG_FUNC_DELETED 0x00000010 - /* PRI */ - /* 0 - low priority, 3 - high priority */ -#define FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK 0x00000300 -#define FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT 8 -#define FUNC_MF_CFG_TRANSMIT_PRIORITY_DEFAULT 0x00000000 + /* PRI */ + /* 0 - low priority, 3 - high priority */ + #define FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK 0x00000300 + #define FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT 8 + #define FUNC_MF_CFG_TRANSMIT_PRIORITY_DEFAULT 0x00000000 - /* MINBW, MAXBW */ - /* value range - 0..100, increments in 100Mbps */ -#define FUNC_MF_CFG_MIN_BW_MASK 0x00ff0000 -#define FUNC_MF_CFG_MIN_BW_SHIFT 16 -#define FUNC_MF_CFG_MIN_BW_DEFAULT 0x00000000 -#define FUNC_MF_CFG_MAX_BW_MASK 0xff000000 -#define FUNC_MF_CFG_MAX_BW_SHIFT 24 -#define FUNC_MF_CFG_MAX_BW_DEFAULT 0x64000000 + /* MINBW, MAXBW */ + /* value range - 0..100, increments in 100Mbps */ + #define FUNC_MF_CFG_MIN_BW_MASK 0x00ff0000 + #define FUNC_MF_CFG_MIN_BW_SHIFT 16 + #define FUNC_MF_CFG_MIN_BW_DEFAULT 0x00000000 + #define FUNC_MF_CFG_MAX_BW_MASK 0xff000000 + #define FUNC_MF_CFG_MAX_BW_SHIFT 24 + #define FUNC_MF_CFG_MAX_BW_DEFAULT 0x64000000 - u32 mac_upper; /* MAC */ -#define FUNC_MF_CFG_UPPERMAC_MASK 0x0000ffff -#define FUNC_MF_CFG_UPPERMAC_SHIFT 0 -#define FUNC_MF_CFG_UPPERMAC_DEFAULT FUNC_MF_CFG_UPPERMAC_MASK - u32 mac_lower; -#define FUNC_MF_CFG_LOWERMAC_DEFAULT 0xffffffff + u32 mac_upper; /* MAC */ + #define FUNC_MF_CFG_UPPERMAC_MASK 0x0000ffff + #define FUNC_MF_CFG_UPPERMAC_SHIFT 0 + #define FUNC_MF_CFG_UPPERMAC_DEFAULT FUNC_MF_CFG_UPPERMAC_MASK + u32 mac_lower; + #define FUNC_MF_CFG_LOWERMAC_DEFAULT 0xffffffff - u32 e1hov_tag; /* VNI */ -#define FUNC_MF_CFG_E1HOV_TAG_MASK 0x0000ffff -#define FUNC_MF_CFG_E1HOV_TAG_SHIFT 0 -#define FUNC_MF_CFG_E1HOV_TAG_DEFAULT FUNC_MF_CFG_E1HOV_TAG_MASK + u32 e1hov_tag; /* VNI */ + #define FUNC_MF_CFG_E1HOV_TAG_MASK 0x0000ffff + #define FUNC_MF_CFG_E1HOV_TAG_SHIFT 0 + #define FUNC_MF_CFG_E1HOV_TAG_DEFAULT FUNC_MF_CFG_E1HOV_TAG_MASK - u32 reserved[2]; + /* afex default VLAN ID - 12 bits */ + #define FUNC_MF_CFG_AFEX_VLAN_MASK 0x0fff0000 + #define FUNC_MF_CFG_AFEX_VLAN_SHIFT 16 + u32 afex_config; + #define FUNC_MF_CFG_AFEX_COS_FILTER_MASK 0x000000ff + #define FUNC_MF_CFG_AFEX_COS_FILTER_SHIFT 0 + #define FUNC_MF_CFG_AFEX_MBA_ENABLED_MASK 0x0000ff00 + #define FUNC_MF_CFG_AFEX_MBA_ENABLED_SHIFT 8 + #define FUNC_MF_CFG_AFEX_MBA_ENABLED_VAL 0x00000100 + #define FUNC_MF_CFG_AFEX_VLAN_MODE_MASK 0x000f0000 + #define FUNC_MF_CFG_AFEX_VLAN_MODE_SHIFT 16 + + u32 reserved; +}; + +enum mf_cfg_afex_vlan_mode { + FUNC_MF_CFG_AFEX_VLAN_TRUNK_MODE = 0, + FUNC_MF_CFG_AFEX_VLAN_ACCESS_MODE, + FUNC_MF_CFG_AFEX_VLAN_TRUNK_TAG_NATIVE_MODE }; /* This structure is not applicable and should not be accessed on 57711 */ struct func_ext_cfg { - u32 func_cfg; -#define MACP_FUNC_CFG_FLAGS_MASK 0x000000FF -#define MACP_FUNC_CFG_FLAGS_SHIFT 0 -#define MACP_FUNC_CFG_FLAGS_ENABLED 0x00000001 -#define MACP_FUNC_CFG_FLAGS_ETHERNET 0x00000002 -#define MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD 0x00000004 -#define MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD 0x00000008 + u32 func_cfg; + #define MACP_FUNC_CFG_FLAGS_MASK 0x000000FF + #define MACP_FUNC_CFG_FLAGS_SHIFT 0 + #define MACP_FUNC_CFG_FLAGS_ENABLED 0x00000001 + #define MACP_FUNC_CFG_FLAGS_ETHERNET 0x00000002 + #define MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD 0x00000004 + #define MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD 0x00000008 - u32 iscsi_mac_addr_upper; + u32 iscsi_mac_addr_upper; + u32 iscsi_mac_addr_lower; - u32 iscsi_mac_addr_lower; + u32 fcoe_mac_addr_upper; + u32 fcoe_mac_addr_lower; - u32 fcoe_mac_addr_upper; + u32 fcoe_wwn_port_name_upper; + u32 fcoe_wwn_port_name_lower; - u32 fcoe_mac_addr_lower; + u32 fcoe_wwn_node_name_upper; + u32 fcoe_wwn_node_name_lower; - u32 reserved0[5]; + u32 preserve_data; + #define MF_FUNC_CFG_PRESERVE_L2_MAC (1<<0) + #define MF_FUNC_CFG_PRESERVE_ISCSI_MAC (1<<1) + #define MF_FUNC_CFG_PRESERVE_FCOE_MAC (1<<2) + #define MF_FUNC_CFG_PRESERVE_FCOE_WWN_P (1<<3) + #define MF_FUNC_CFG_PRESERVE_FCOE_WWN_N (1<<4) + #define MF_FUNC_CFG_PRESERVE_TX_BW (1<<5) }; struct mf_cfg { - struct shared_mf_cfg shared_mf_config; /* 0x4 */ - struct port_mf_cfg port_mf_config[PORT_MAX]; /* 0x10 * 2 = 0x20 */ - /* for all chips, there are 8 mf functions */ - struct func_mf_cfg func_mf_config[E1H_FUNC_MAX]; /* 0x18 * 8 = 0xc0 */ - /* Extended configuration per function - this array does not exist and - * should not be accessed on 57711 */ - struct func_ext_cfg func_ext_config[E1H_FUNC_MAX]; /* 0x28 * 8 = 0x140*/ + struct shared_mf_cfg shared_mf_config; /* 0x4 */ + struct port_mf_cfg port_mf_config[NVM_PATH_MAX][PORT_MAX]; + /* 0x10*2=0x20 */ + /* for all chips, there are 8 mf functions */ + struct func_mf_cfg func_mf_config[E1H_FUNC_MAX]; /* 0x18 * 8 = 0xc0 */ + /* + * Extended configuration per function - this array does not exist and + * should not be accessed on 57711 + */ + struct func_ext_cfg func_ext_config[E1H_FUNC_MAX]; /* 0x28 * 8 = 0x140*/ }; /* 0x224 */ /**************************************************************************** - * Shared Memory Region * + * Shared Memory Region * ****************************************************************************/ struct shmem_region { /* SharedMem Offset (size) */ - u32 validity_map[PORT_MAX]; /* 0x0 (4*2 = 0x8) */ -#define SHR_MEM_FORMAT_REV_MASK 0xff000000 -#define SHR_MEM_FORMAT_REV_ID ('A'<<24) - /* validity bits */ -#define SHR_MEM_VALIDITY_PCI_CFG 0x00100000 -#define SHR_MEM_VALIDITY_MB 0x00200000 -#define SHR_MEM_VALIDITY_DEV_INFO 0x00400000 -#define SHR_MEM_VALIDITY_RESERVED 0x00000007 - /* One licensing bit should be set */ -#define SHR_MEM_VALIDITY_LIC_KEY_IN_EFFECT_MASK 0x00000038 -#define SHR_MEM_VALIDITY_LIC_MANUF_KEY_IN_EFFECT 0x00000008 -#define SHR_MEM_VALIDITY_LIC_UPGRADE_KEY_IN_EFFECT 0x00000010 -#define SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT 0x00000020 + u32 validity_map[PORT_MAX]; /* 0x0 (4*2 = 0x8) */ + #define SHR_MEM_FORMAT_REV_MASK 0xff000000 + #define SHR_MEM_FORMAT_REV_ID ('A'<<24) + /* validity bits */ + #define SHR_MEM_VALIDITY_PCI_CFG 0x00100000 + #define SHR_MEM_VALIDITY_MB 0x00200000 + #define SHR_MEM_VALIDITY_DEV_INFO 0x00400000 + #define SHR_MEM_VALIDITY_RESERVED 0x00000007 + /* One licensing bit should be set */ + #define SHR_MEM_VALIDITY_LIC_KEY_IN_EFFECT_MASK 0x00000038 + #define SHR_MEM_VALIDITY_LIC_MANUF_KEY_IN_EFFECT 0x00000008 + #define SHR_MEM_VALIDITY_LIC_UPGRADE_KEY_IN_EFFECT 0x00000010 + #define SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT 0x00000020 /* Active MFW */ -#define SHR_MEM_VALIDITY_ACTIVE_MFW_UNKNOWN 0x00000000 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_MASK 0x000001c0 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_IPMI 0x00000040 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_UMP 0x00000080 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_NCSI 0x000000c0 -#define SHR_MEM_VALIDITY_ACTIVE_MFW_NONE 0x000001c0 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_UNKNOWN 0x00000000 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_MASK 0x000001c0 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_IPMI 0x00000040 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_UMP 0x00000080 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_NCSI 0x000000c0 + #define SHR_MEM_VALIDITY_ACTIVE_MFW_NONE 0x000001c0 - struct shm_dev_info dev_info; /* 0x8 (0x438) */ + struct shm_dev_info dev_info; /* 0x8 (0x438) */ - struct license_key drv_lic_key[PORT_MAX]; /* 0x440 (52*2=0x68) */ + struct license_key drv_lic_key[PORT_MAX]; /* 0x440 (52*2=0x68) */ - /* FW information (for internal FW use) */ - u32 fw_info_fio_offset; /* 0x4a8 (0x4) */ - struct mgmtfw_state mgmtfw_state; /* 0x4ac (0x1b8) */ + /* FW information (for internal FW use) */ + u32 fw_info_fio_offset; /* 0x4a8 (0x4) */ + struct mgmtfw_state mgmtfw_state; /* 0x4ac (0x1b8) */ + + struct drv_port_mb port_mb[PORT_MAX]; /* 0x664 (16*2=0x20) */ - struct drv_port_mb port_mb[PORT_MAX]; /* 0x664 (16*2=0x20) */ #ifdef BMAPI - /* This is a variable length array */ - /* the number of function depends on the chip type */ - struct drv_func_mb func_mb[1]; /* 0x684 - (44*2/4/8=0x58/0xb0/0x160) */ + /* This is a variable length array */ + /* the number of function depends on the chip type */ + struct drv_func_mb func_mb[1]; /* 0x684 (44*2/4/8=0x58/0xb0/0x160) */ #else - /* the number of function depends on the chip type */ - struct drv_func_mb func_mb[]; /* 0x684 - (44*2/4/8=0x58/0xb0/0x160) */ + /* the number of function depends on the chip type */ + struct drv_func_mb func_mb[]; /* 0x684 (44*2/4/8=0x58/0xb0/0x160) */ #endif /* BMAPI */ }; /* 57710 = 0x6dc | 57711 = 0x7E4 | 57712 = 0x734 */ /**************************************************************************** - * Shared Memory 2 Region * + * Shared Memory 2 Region * ****************************************************************************/ -/* The fw_flr_ack is actually built in the following way: */ -/* 8 bit: PF ack */ -/* 64 bit: VF ack */ -/* 8 bit: ios_dis_ack */ +/* The fw_flr_ack is actually built in the following way: */ +/* 8 bit: PF ack */ +/* 64 bit: VF ack */ +/* 8 bit: ios_dis_ack */ /* In order to maintain endianity in the mailbox hsi, we want to keep using */ /* u32. The fw must have the VF right after the PF since this is how it */ /* access arrays(it expects always the VF to reside after the PF, and that */ -/* makes the calculation much easier for it. ) */ +/* makes the calculation much easier for it. ) */ /* In order to answer both limitations, and keep the struct small, the code */ /* will abuse the structure defined here to achieve the actual partition */ -/* above */ +/* above */ /****************************************************************************/ struct fw_flr_ack { - u32 pf_ack; - u32 vf_ack[1]; - u32 iov_dis_ack; + u32 pf_ack; + u32 vf_ack[1]; + u32 iov_dis_ack; }; struct fw_flr_mb { - u32 aggint; - u32 opgen_addr; - struct fw_flr_ack ack; + u32 aggint; + u32 opgen_addr; + struct fw_flr_ack ack; }; +/**** SUPPORT FOR SHMEM ARRRAYS *** + * The SHMEM HSI is aligned on 32 bit boundaries which makes it difficult to + * define arrays with storage types smaller then unsigned dwords. + * The macros below add generic support for SHMEM arrays with numeric elements + * that can span 2,4,8 or 16 bits. The array underlying type is a 32 bit dword + * array with individual bit-filed elements accessed using shifts and masks. + * + */ + +/* eb is the bitwidth of a single element */ +#define SHMEM_ARRAY_MASK(eb) ((1<<(eb))-1) +#define SHMEM_ARRAY_ENTRY(i, eb) ((i)/(32/(eb))) + +/* the bit-position macro allows the used to flip the order of the arrays + * elements on a per byte or word boundary. + * + * example: an array with 8 entries each 4 bit wide. This array will fit into + * a single dword. The diagrmas below show the array order of the nibbles. + * + * SHMEM_ARRAY_BITPOS(i, 4, 4) defines the stadard ordering: + * + * | | | | + * 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | + * | | | | + * + * SHMEM_ARRAY_BITPOS(i, 4, 8) defines a flip ordering per byte: + * + * | | | | + * 1 | 0 | 3 | 2 | 5 | 4 | 7 | 6 | + * | | | | + * + * SHMEM_ARRAY_BITPOS(i, 4, 16) defines a flip ordering per word: + * + * | | | | + * 3 | 2 | 1 | 0 | 7 | 6 | 5 | 4 | + * | | | | + */ +#define SHMEM_ARRAY_BITPOS(i, eb, fb) \ + ((((32/(fb)) - 1 - ((i)/((fb)/(eb))) % (32/(fb))) * (fb)) + \ + (((i)%((fb)/(eb))) * (eb))) + +#define SHMEM_ARRAY_GET(a, i, eb, fb) \ + ((a[SHMEM_ARRAY_ENTRY(i, eb)] >> SHMEM_ARRAY_BITPOS(i, eb, fb)) & \ + SHMEM_ARRAY_MASK(eb)) + +#define SHMEM_ARRAY_SET(a, i, eb, fb, val) \ +do { \ + a[SHMEM_ARRAY_ENTRY(i, eb)] &= ~(SHMEM_ARRAY_MASK(eb) << \ + SHMEM_ARRAY_BITPOS(i, eb, fb)); \ + a[SHMEM_ARRAY_ENTRY(i, eb)] |= (((val) & SHMEM_ARRAY_MASK(eb)) << \ + SHMEM_ARRAY_BITPOS(i, eb, fb)); \ +} while (0) + + /****START OF DCBX STRUCTURES DECLARATIONS****/ -#define DCBX_MAX_NUM_PRI_PG_ENTRIES 4 -#define DCBX_MAX_NUM_PG 8 -#define DCBX_STRICT_PRI_PG 15 -#define DCBX_MAX_APP_PROTOCOL 16 -#define FCOE_APP_IDX 0 -#define ISCSI_APP_IDX 1 -#define PREDEFINED_APP_IDX_MAX 2 +#define DCBX_MAX_NUM_PRI_PG_ENTRIES 8 +#define DCBX_PRI_PG_BITWIDTH 4 +#define DCBX_PRI_PG_FBITS 8 +#define DCBX_PRI_PG_GET(a, i) \ + SHMEM_ARRAY_GET(a, i, DCBX_PRI_PG_BITWIDTH, DCBX_PRI_PG_FBITS) +#define DCBX_PRI_PG_SET(a, i, val) \ + SHMEM_ARRAY_SET(a, i, DCBX_PRI_PG_BITWIDTH, DCBX_PRI_PG_FBITS, val) +#define DCBX_MAX_NUM_PG_BW_ENTRIES 8 +#define DCBX_BW_PG_BITWIDTH 8 +#define DCBX_PG_BW_GET(a, i) \ + SHMEM_ARRAY_GET(a, i, DCBX_BW_PG_BITWIDTH, DCBX_BW_PG_BITWIDTH) +#define DCBX_PG_BW_SET(a, i, val) \ + SHMEM_ARRAY_SET(a, i, DCBX_BW_PG_BITWIDTH, DCBX_BW_PG_BITWIDTH, val) +#define DCBX_STRICT_PRI_PG 15 +#define DCBX_MAX_APP_PROTOCOL 16 +#define DCBX_MAX_APP_LOCAL 32 +#define FCOE_APP_IDX 0 +#define ISCSI_APP_IDX 1 +#define PREDEFINED_APP_IDX_MAX 2 -struct dcbx_ets_feature{ - u32 enabled; - u8 pg_bw_tbl[DCBX_MAX_NUM_PG]; - u8 pri_pg_tbl[DCBX_MAX_NUM_PRI_PG_ENTRIES]; + +/* Big/Little endian have the same representation. */ +struct dcbx_ets_feature { + /* + * For Admin MIB - is this feature supported by the + * driver | For Local MIB - should this feature be enabled. + */ + u32 enabled; + u32 pg_bw_tbl[2]; + u32 pri_pg_tbl[1]; }; +/* Driver structure in LE */ struct dcbx_pfc_feature { #ifdef __BIG_ENDIAN - u8 pri_en_bitmap; -#define DCBX_PFC_PRI_0 0x01 -#define DCBX_PFC_PRI_1 0x02 -#define DCBX_PFC_PRI_2 0x04 -#define DCBX_PFC_PRI_3 0x08 -#define DCBX_PFC_PRI_4 0x10 -#define DCBX_PFC_PRI_5 0x20 -#define DCBX_PFC_PRI_6 0x40 -#define DCBX_PFC_PRI_7 0x80 - u8 pfc_caps; - u8 reserved; - u8 enabled; + u8 pri_en_bitmap; + #define DCBX_PFC_PRI_0 0x01 + #define DCBX_PFC_PRI_1 0x02 + #define DCBX_PFC_PRI_2 0x04 + #define DCBX_PFC_PRI_3 0x08 + #define DCBX_PFC_PRI_4 0x10 + #define DCBX_PFC_PRI_5 0x20 + #define DCBX_PFC_PRI_6 0x40 + #define DCBX_PFC_PRI_7 0x80 + u8 pfc_caps; + u8 reserved; + u8 enabled; #elif defined(__LITTLE_ENDIAN) - u8 enabled; - u8 reserved; - u8 pfc_caps; - u8 pri_en_bitmap; -#define DCBX_PFC_PRI_0 0x01 -#define DCBX_PFC_PRI_1 0x02 -#define DCBX_PFC_PRI_2 0x04 -#define DCBX_PFC_PRI_3 0x08 -#define DCBX_PFC_PRI_4 0x10 -#define DCBX_PFC_PRI_5 0x20 -#define DCBX_PFC_PRI_6 0x40 -#define DCBX_PFC_PRI_7 0x80 + u8 enabled; + u8 reserved; + u8 pfc_caps; + u8 pri_en_bitmap; + #define DCBX_PFC_PRI_0 0x01 + #define DCBX_PFC_PRI_1 0x02 + #define DCBX_PFC_PRI_2 0x04 + #define DCBX_PFC_PRI_3 0x08 + #define DCBX_PFC_PRI_4 0x10 + #define DCBX_PFC_PRI_5 0x20 + #define DCBX_PFC_PRI_6 0x40 + #define DCBX_PFC_PRI_7 0x80 #endif }; struct dcbx_app_priority_entry { #ifdef __BIG_ENDIAN - u8 app_id[2]; -#define DCBX_APP_PROTOCOL_UPPER_MASK 0x00FF -#define DCBX_APP_PROTOCOL_LOWER_MASK 0xFF00 - u8 pri_bitmap; - u8 appBitfield; -#define DCBX_APP_ENTRY_VALID 0x01 -#define DCBX_APP_ENTRY_SF_MASK 0x30 -#define DCBX_APP_ENTRY_SF_SHIFT 4 -#define DCBX_APP_SF_ETH_TYPE 0x10 -#define DCBX_APP_SF_PORT 0x20 + u16 app_id; + u8 pri_bitmap; + u8 appBitfield; + #define DCBX_APP_ENTRY_VALID 0x01 + #define DCBX_APP_ENTRY_SF_MASK 0x30 + #define DCBX_APP_ENTRY_SF_SHIFT 4 + #define DCBX_APP_SF_ETH_TYPE 0x10 + #define DCBX_APP_SF_PORT 0x20 #elif defined(__LITTLE_ENDIAN) - u8 appBitfield; -#define DCBX_APP_ENTRY_VALID 0x01 -#define DCBX_APP_ENTRY_SF_MASK 0x30 -#define DCBX_APP_ENTRY_SF_SHIFT 4 -#define DCBX_APP_SF_ETH_TYPE 0x10 -#define DCBX_APP_SF_PORT 0x20 - u8 pri_bitmap; - u8 app_id[2]; + u8 appBitfield; + #define DCBX_APP_ENTRY_VALID 0x01 + #define DCBX_APP_ENTRY_SF_MASK 0x30 + #define DCBX_APP_ENTRY_SF_SHIFT 4 + #define DCBX_APP_SF_ETH_TYPE 0x10 + #define DCBX_APP_SF_PORT 0x20 + u8 pri_bitmap; + u16 app_id; #endif }; +/* FW structure in BE */ struct dcbx_app_priority_feature { #ifdef __BIG_ENDIAN - u8 reserved; - u8 default_pri; - u8 tc_supported; - u8 enabled; + u8 reserved; + u8 default_pri; + u8 tc_supported; + u8 enabled; #elif defined(__LITTLE_ENDIAN) - u8 enabled; - u8 tc_supported; - u8 default_pri; - u8 reserved; + u8 enabled; + u8 tc_supported; + u8 default_pri; + u8 reserved; #endif - struct dcbx_app_priority_entry app_pri_tbl[DCBX_MAX_APP_PROTOCOL]; + struct dcbx_app_priority_entry app_pri_tbl[DCBX_MAX_APP_PROTOCOL]; }; +/* FW structure in BE */ struct dcbx_features { - struct dcbx_ets_feature ets; - struct dcbx_pfc_feature pfc; - struct dcbx_app_priority_feature app; + /* PG feature */ + struct dcbx_ets_feature ets; + /* PFC feature */ + struct dcbx_pfc_feature pfc; + /* APP feature */ + struct dcbx_app_priority_feature app; }; +/* LLDP protocol parameters */ +/* FW structure in BE */ struct lldp_params { #ifdef __BIG_ENDIAN - u8 msg_fast_tx_interval; - u8 msg_tx_hold; - u8 msg_tx_interval; - u8 admin_status; -#define LLDP_TX_ONLY 0x01 -#define LLDP_RX_ONLY 0x02 -#define LLDP_TX_RX 0x03 -#define LLDP_DISABLED 0x04 - u8 reserved1; - u8 tx_fast; - u8 tx_crd_max; - u8 tx_crd; + u8 msg_fast_tx_interval; + u8 msg_tx_hold; + u8 msg_tx_interval; + u8 admin_status; + #define LLDP_TX_ONLY 0x01 + #define LLDP_RX_ONLY 0x02 + #define LLDP_TX_RX 0x03 + #define LLDP_DISABLED 0x04 + u8 reserved1; + u8 tx_fast; + u8 tx_crd_max; + u8 tx_crd; #elif defined(__LITTLE_ENDIAN) - u8 admin_status; -#define LLDP_TX_ONLY 0x01 -#define LLDP_RX_ONLY 0x02 -#define LLDP_TX_RX 0x03 -#define LLDP_DISABLED 0x04 - u8 msg_tx_interval; - u8 msg_tx_hold; - u8 msg_fast_tx_interval; - u8 tx_crd; - u8 tx_crd_max; - u8 tx_fast; - u8 reserved1; + u8 admin_status; + #define LLDP_TX_ONLY 0x01 + #define LLDP_RX_ONLY 0x02 + #define LLDP_TX_RX 0x03 + #define LLDP_DISABLED 0x04 + u8 msg_tx_interval; + u8 msg_tx_hold; + u8 msg_fast_tx_interval; + u8 tx_crd; + u8 tx_crd_max; + u8 tx_fast; + u8 reserved1; #endif -#define REM_CHASSIS_ID_STAT_LEN 4 -#define REM_PORT_ID_STAT_LEN 4 - u32 peer_chassis_id[REM_CHASSIS_ID_STAT_LEN]; - u32 peer_port_id[REM_PORT_ID_STAT_LEN]; + #define REM_CHASSIS_ID_STAT_LEN 4 + #define REM_PORT_ID_STAT_LEN 4 + /* Holds remote Chassis ID TLV header, subtype and 9B of payload. */ + u32 peer_chassis_id[REM_CHASSIS_ID_STAT_LEN]; + /* Holds remote Port ID TLV header, subtype and 9B of payload. */ + u32 peer_port_id[REM_PORT_ID_STAT_LEN]; }; struct lldp_dcbx_stat { -#define LOCAL_CHASSIS_ID_STAT_LEN 2 -#define LOCAL_PORT_ID_STAT_LEN 2 + #define LOCAL_CHASSIS_ID_STAT_LEN 2 + #define LOCAL_PORT_ID_STAT_LEN 2 + /* Holds local Chassis ID 8B payload of constant subtype 4. */ u32 local_chassis_id[LOCAL_CHASSIS_ID_STAT_LEN]; + /* Holds local Port ID 8B payload of constant subtype 3. */ u32 local_port_id[LOCAL_PORT_ID_STAT_LEN]; + /* Number of DCBX frames transmitted. */ u32 num_tx_dcbx_pkts; + /* Number of DCBX frames received. */ u32 num_rx_dcbx_pkts; }; +/* ADMIN MIB - DCBX local machine default configuration. */ struct lldp_admin_mib { - u32 ver_cfg_flags; -#define DCBX_ETS_CONFIG_TX_ENABLED 0x00000001 -#define DCBX_PFC_CONFIG_TX_ENABLED 0x00000002 -#define DCBX_APP_CONFIG_TX_ENABLED 0x00000004 -#define DCBX_ETS_RECO_TX_ENABLED 0x00000008 -#define DCBX_ETS_RECO_VALID 0x00000010 -#define DCBX_ETS_WILLING 0x00000020 -#define DCBX_PFC_WILLING 0x00000040 -#define DCBX_APP_WILLING 0x00000080 -#define DCBX_VERSION_CEE 0x00000100 -#define DCBX_VERSION_IEEE 0x00000200 -#define DCBX_DCBX_ENABLED 0x00000400 -#define DCBX_CEE_VERSION_MASK 0x0000f000 -#define DCBX_CEE_VERSION_SHIFT 12 -#define DCBX_CEE_MAX_VERSION_MASK 0x000f0000 -#define DCBX_CEE_MAX_VERSION_SHIFT 16 - struct dcbx_features features; + u32 ver_cfg_flags; + #define DCBX_ETS_CONFIG_TX_ENABLED 0x00000001 + #define DCBX_PFC_CONFIG_TX_ENABLED 0x00000002 + #define DCBX_APP_CONFIG_TX_ENABLED 0x00000004 + #define DCBX_ETS_RECO_TX_ENABLED 0x00000008 + #define DCBX_ETS_RECO_VALID 0x00000010 + #define DCBX_ETS_WILLING 0x00000020 + #define DCBX_PFC_WILLING 0x00000040 + #define DCBX_APP_WILLING 0x00000080 + #define DCBX_VERSION_CEE 0x00000100 + #define DCBX_VERSION_IEEE 0x00000200 + #define DCBX_DCBX_ENABLED 0x00000400 + #define DCBX_CEE_VERSION_MASK 0x0000f000 + #define DCBX_CEE_VERSION_SHIFT 12 + #define DCBX_CEE_MAX_VERSION_MASK 0x000f0000 + #define DCBX_CEE_MAX_VERSION_SHIFT 16 + struct dcbx_features features; }; +/* REMOTE MIB - remote machine DCBX configuration. */ struct lldp_remote_mib { - u32 prefix_seq_num; - u32 flags; -#define DCBX_ETS_TLV_RX 0x00000001 -#define DCBX_PFC_TLV_RX 0x00000002 -#define DCBX_APP_TLV_RX 0x00000004 -#define DCBX_ETS_RX_ERROR 0x00000010 -#define DCBX_PFC_RX_ERROR 0x00000020 -#define DCBX_APP_RX_ERROR 0x00000040 -#define DCBX_ETS_REM_WILLING 0x00000100 -#define DCBX_PFC_REM_WILLING 0x00000200 -#define DCBX_APP_REM_WILLING 0x00000400 -#define DCBX_REMOTE_ETS_RECO_VALID 0x00001000 - struct dcbx_features features; - u32 suffix_seq_num; + u32 prefix_seq_num; + u32 flags; + #define DCBX_ETS_TLV_RX 0x00000001 + #define DCBX_PFC_TLV_RX 0x00000002 + #define DCBX_APP_TLV_RX 0x00000004 + #define DCBX_ETS_RX_ERROR 0x00000010 + #define DCBX_PFC_RX_ERROR 0x00000020 + #define DCBX_APP_RX_ERROR 0x00000040 + #define DCBX_ETS_REM_WILLING 0x00000100 + #define DCBX_PFC_REM_WILLING 0x00000200 + #define DCBX_APP_REM_WILLING 0x00000400 + #define DCBX_REMOTE_ETS_RECO_VALID 0x00001000 + #define DCBX_REMOTE_MIB_VALID 0x00002000 + struct dcbx_features features; + u32 suffix_seq_num; }; +/* LOCAL MIB - operational DCBX configuration - transmitted on Tx LLDPDU. */ struct lldp_local_mib { - u32 prefix_seq_num; - u32 error; -#define DCBX_LOCAL_ETS_ERROR 0x00000001 -#define DCBX_LOCAL_PFC_ERROR 0x00000002 -#define DCBX_LOCAL_APP_ERROR 0x00000004 -#define DCBX_LOCAL_PFC_MISMATCH 0x00000010 -#define DCBX_LOCAL_APP_MISMATCH 0x00000020 - struct dcbx_features features; - u32 suffix_seq_num; + u32 prefix_seq_num; + /* Indicates if there is mismatch with negotiation results. */ + u32 error; + #define DCBX_LOCAL_ETS_ERROR 0x00000001 + #define DCBX_LOCAL_PFC_ERROR 0x00000002 + #define DCBX_LOCAL_APP_ERROR 0x00000004 + #define DCBX_LOCAL_PFC_MISMATCH 0x00000010 + #define DCBX_LOCAL_APP_MISMATCH 0x00000020 + #define DCBX_REMOTE_MIB_ERROR 0x00000040 + #define DCBX_REMOTE_ETS_TLV_NOT_FOUND 0x00000080 + #define DCBX_REMOTE_PFC_TLV_NOT_FOUND 0x00000100 + #define DCBX_REMOTE_APP_TLV_NOT_FOUND 0x00000200 + struct dcbx_features features; + u32 suffix_seq_num; +}; + +struct lldp_local_mib_ext { + u32 prefix_seq_num; + /* APP TLV extension - 16 more entries for negotiation results*/ + struct dcbx_app_priority_entry app_pri_tbl_ext[DCBX_MAX_APP_PROTOCOL]; + u32 suffix_seq_num; }; /***END OF DCBX STRUCTURES DECLARATIONS***/ struct shmem2_region { - u32 size; + u32 size; /* 0x0000 */ - u32 dcc_support; -#define SHMEM_DCC_SUPPORT_NONE 0x00000000 -#define SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV 0x00000001 -#define SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV 0x00000004 -#define SHMEM_DCC_SUPPORT_CHANGE_MAC_ADDRESS_TLV 0x00000008 -#define SHMEM_DCC_SUPPORT_SET_PROTOCOL_TLV 0x00000040 -#define SHMEM_DCC_SUPPORT_SET_PRIORITY_TLV 0x00000080 + u32 dcc_support; /* 0x0004 */ + #define SHMEM_DCC_SUPPORT_NONE 0x00000000 + #define SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV 0x00000001 + #define SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV 0x00000004 + #define SHMEM_DCC_SUPPORT_CHANGE_MAC_ADDRESS_TLV 0x00000008 + #define SHMEM_DCC_SUPPORT_SET_PROTOCOL_TLV 0x00000040 + #define SHMEM_DCC_SUPPORT_SET_PRIORITY_TLV 0x00000080 - u32 ext_phy_fw_version2[PORT_MAX]; - /* - * For backwards compatibility, if the mf_cfg_addr does not exist - * (the size filed is smaller than 0xc) the mf_cfg resides at the - * end of struct shmem_region - */ - u32 mf_cfg_addr; -#define SHMEM_MF_CFG_ADDR_NONE 0x00000000 + u32 ext_phy_fw_version2[PORT_MAX]; /* 0x0008 */ + /* + * For backwards compatibility, if the mf_cfg_addr does not exist + * (the size filed is smaller than 0xc) the mf_cfg resides at the + * end of struct shmem_region + */ + u32 mf_cfg_addr; /* 0x0010 */ + #define SHMEM_MF_CFG_ADDR_NONE 0x00000000 - struct fw_flr_mb flr_mb; - u32 dcbx_lldp_params_offset; -#define SHMEM_LLDP_DCBX_PARAMS_NONE 0x00000000 - u32 dcbx_neg_res_offset; -#define SHMEM_DCBX_NEG_RES_NONE 0x00000000 - u32 dcbx_remote_mib_offset; -#define SHMEM_DCBX_REMOTE_MIB_NONE 0x00000000 - /* - * The other shmemX_base_addr holds the other path's shmem address - * required for example in case of common phy init, or for path1 to know - * the address of mcp debug trace which is located in offset from shmem - * of path0 - */ - u32 other_shmem_base_addr; - u32 other_shmem2_base_addr; - /* - * mcp_vf_disabled is set by the MCP to indicate the driver about VFs - * which were disabled/flred - */ - u32 mcp_vf_disabled[E2_VF_MAX / 32]; + struct fw_flr_mb flr_mb; /* 0x0014 */ + u32 dcbx_lldp_params_offset; /* 0x0028 */ + #define SHMEM_LLDP_DCBX_PARAMS_NONE 0x00000000 + u32 dcbx_neg_res_offset; /* 0x002c */ + #define SHMEM_DCBX_NEG_RES_NONE 0x00000000 + u32 dcbx_remote_mib_offset; /* 0x0030 */ + #define SHMEM_DCBX_REMOTE_MIB_NONE 0x00000000 + /* + * The other shmemX_base_addr holds the other path's shmem address + * required for example in case of common phy init, or for path1 to know + * the address of mcp debug trace which is located in offset from shmem + * of path0 + */ + u32 other_shmem_base_addr; /* 0x0034 */ + u32 other_shmem2_base_addr; /* 0x0038 */ + /* + * mcp_vf_disabled is set by the MCP to indicate the driver about VFs + * which were disabled/flred + */ + u32 mcp_vf_disabled[E2_VF_MAX / 32]; /* 0x003c */ - /* - * drv_ack_vf_disabled is set by the PF driver to ack handled disabled - * VFs - */ - u32 drv_ack_vf_disabled[E2_FUNC_MAX][E2_VF_MAX / 32]; + /* + * drv_ack_vf_disabled is set by the PF driver to ack handled disabled + * VFs + */ + u32 drv_ack_vf_disabled[E2_FUNC_MAX][E2_VF_MAX / 32]; /* 0x0044 */ - u32 dcbx_lldp_dcbx_stat_offset; -#define SHMEM_LLDP_DCBX_STAT_NONE 0x00000000 + u32 dcbx_lldp_dcbx_stat_offset; /* 0x0064 */ + #define SHMEM_LLDP_DCBX_STAT_NONE 0x00000000 - /* edebug_driver_if field is used to transfer messages between edebug app - * to the driver through shmem2. - * - * message format: - * bits 0-2 - function number / instance of driver to perform request - * bits 3-5 - op code / is_ack? - * bits 6-63 - data - */ - u32 edebug_driver_if[2]; -#define EDEBUG_DRIVER_IF_OP_CODE_GET_PHYS_ADDR 1 -#define EDEBUG_DRIVER_IF_OP_CODE_GET_BUS_ADDR 2 -#define EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT 3 + /* + * edebug_driver_if field is used to transfer messages between edebug + * app to the driver through shmem2. + * + * message format: + * bits 0-2 - function number / instance of driver to perform request + * bits 3-5 - op code / is_ack? + * bits 6-63 - data + */ + u32 edebug_driver_if[2]; /* 0x0068 */ + #define EDEBUG_DRIVER_IF_OP_CODE_GET_PHYS_ADDR 1 + #define EDEBUG_DRIVER_IF_OP_CODE_GET_BUS_ADDR 2 + #define EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT 3 + + u32 nvm_retain_bitmap_addr; /* 0x0070 */ + + /* afex support of that driver */ + u32 afex_driver_support; /* 0x0074 */ + #define SHMEM_AFEX_VERSION_MASK 0x100f + #define SHMEM_AFEX_SUPPORTED_VERSION_ONE 0x1001 + #define SHMEM_AFEX_REDUCED_DRV_LOADED 0x8000 + + /* driver receives addr in scratchpad to which it should respond */ + u32 afex_scratchpad_addr_to_write[E2_FUNC_MAX]; + + /* + * generic params from MCP to driver (value depends on the msg sent + * to driver + */ + u32 afex_param1_to_driver[E2_FUNC_MAX]; /* 0x0088 */ + u32 afex_param2_to_driver[E2_FUNC_MAX]; /* 0x0098 */ + + u32 swim_base_addr; /* 0x0108 */ + u32 swim_funcs; + u32 swim_main_cb; + + /* + * bitmap notifying which VIF profiles stored in nvram are enabled by + * switch + */ + u32 afex_profiles_enabled[2]; + + /* generic flags controlled by the driver */ + u32 drv_flags; + #define DRV_FLAGS_DCB_CONFIGURED 0x0 + #define DRV_FLAGS_DCB_CONFIGURATION_ABORTED 0x1 + #define DRV_FLAGS_DCB_MFW_CONFIGURED 0x2 + + #define DRV_FLAGS_PORT_MASK ((1 << DRV_FLAGS_DCB_CONFIGURED) | \ + (1 << DRV_FLAGS_DCB_CONFIGURATION_ABORTED) | \ + (1 << DRV_FLAGS_DCB_MFW_CONFIGURED)) + /* Port offset*/ + #define DRV_FLAGS_P0_OFFSET 0 + #define DRV_FLAGS_P1_OFFSET 16 + #define DRV_FLAGS_GET_PORT_OFFSET(_port) ((0 == _port) ? \ + DRV_FLAGS_P0_OFFSET : \ + DRV_FLAGS_P1_OFFSET) + + #define DRV_FLAGS_GET_PORT_MASK(_port) (DRV_FLAGS_PORT_MASK << \ + DRV_FLAGS_GET_PORT_OFFSET(_port)) + + #define DRV_FLAGS_FILED_BY_PORT(_field_bit, _port) (1 << ( \ + (_field_bit) + DRV_FLAGS_GET_PORT_OFFSET(_port))) + + /* pointer to extended dev_info shared data copied from nvm image */ + u32 extended_dev_info_shared_addr; + u32 ncsi_oem_data_addr; + + u32 sensor_data_addr; + u32 buffer_block_addr; + u32 sensor_data_req_update_interval; + u32 temperature_in_half_celsius; + u32 glob_struct_in_host; + + u32 dcbx_neg_res_ext_offset; + #define SHMEM_DCBX_NEG_RES_EXT_NONE 0x00000000 + + u32 drv_capabilities_flag[E2_FUNC_MAX]; + #define DRV_FLAGS_CAPABILITIES_LOADED_SUPPORTED 0x00000001 + #define DRV_FLAGS_CAPABILITIES_LOADED_L2 0x00000002 + #define DRV_FLAGS_CAPABILITIES_LOADED_FCOE 0x00000004 + #define DRV_FLAGS_CAPABILITIES_LOADED_ISCSI 0x00000008 + + u32 extended_dev_info_shared_cfg_size; + + u32 dcbx_en[PORT_MAX]; + + /* The offset points to the multi threaded meta structure */ + u32 multi_thread_data_offset; + + /* address of DMAable host address holding values from the drivers */ + u32 drv_info_host_addr_lo; + u32 drv_info_host_addr_hi; + + /* general values written by the MFW (such as current version) */ + u32 drv_info_control; + #define DRV_INFO_CONTROL_VER_MASK 0x000000ff + #define DRV_INFO_CONTROL_VER_SHIFT 0 + #define DRV_INFO_CONTROL_OP_CODE_MASK 0x0000ff00 + #define DRV_INFO_CONTROL_OP_CODE_SHIFT 8 + u32 ibft_host_addr; /* initialized by option ROM */ }; struct emac_stats { - u32 rx_stat_ifhcinoctets; - u32 rx_stat_ifhcinbadoctets; - u32 rx_stat_etherstatsfragments; - u32 rx_stat_ifhcinucastpkts; - u32 rx_stat_ifhcinmulticastpkts; - u32 rx_stat_ifhcinbroadcastpkts; - u32 rx_stat_dot3statsfcserrors; - u32 rx_stat_dot3statsalignmenterrors; - u32 rx_stat_dot3statscarriersenseerrors; - u32 rx_stat_xonpauseframesreceived; - u32 rx_stat_xoffpauseframesreceived; - u32 rx_stat_maccontrolframesreceived; - u32 rx_stat_xoffstateentered; - u32 rx_stat_dot3statsframestoolong; - u32 rx_stat_etherstatsjabbers; - u32 rx_stat_etherstatsundersizepkts; - u32 rx_stat_etherstatspkts64octets; - u32 rx_stat_etherstatspkts65octetsto127octets; - u32 rx_stat_etherstatspkts128octetsto255octets; - u32 rx_stat_etherstatspkts256octetsto511octets; - u32 rx_stat_etherstatspkts512octetsto1023octets; - u32 rx_stat_etherstatspkts1024octetsto1522octets; - u32 rx_stat_etherstatspktsover1522octets; + u32 rx_stat_ifhcinoctets; + u32 rx_stat_ifhcinbadoctets; + u32 rx_stat_etherstatsfragments; + u32 rx_stat_ifhcinucastpkts; + u32 rx_stat_ifhcinmulticastpkts; + u32 rx_stat_ifhcinbroadcastpkts; + u32 rx_stat_dot3statsfcserrors; + u32 rx_stat_dot3statsalignmenterrors; + u32 rx_stat_dot3statscarriersenseerrors; + u32 rx_stat_xonpauseframesreceived; + u32 rx_stat_xoffpauseframesreceived; + u32 rx_stat_maccontrolframesreceived; + u32 rx_stat_xoffstateentered; + u32 rx_stat_dot3statsframestoolong; + u32 rx_stat_etherstatsjabbers; + u32 rx_stat_etherstatsundersizepkts; + u32 rx_stat_etherstatspkts64octets; + u32 rx_stat_etherstatspkts65octetsto127octets; + u32 rx_stat_etherstatspkts128octetsto255octets; + u32 rx_stat_etherstatspkts256octetsto511octets; + u32 rx_stat_etherstatspkts512octetsto1023octets; + u32 rx_stat_etherstatspkts1024octetsto1522octets; + u32 rx_stat_etherstatspktsover1522octets; - u32 rx_stat_falsecarriererrors; + u32 rx_stat_falsecarriererrors; - u32 tx_stat_ifhcoutoctets; - u32 tx_stat_ifhcoutbadoctets; - u32 tx_stat_etherstatscollisions; - u32 tx_stat_outxonsent; - u32 tx_stat_outxoffsent; - u32 tx_stat_flowcontroldone; - u32 tx_stat_dot3statssinglecollisionframes; - u32 tx_stat_dot3statsmultiplecollisionframes; - u32 tx_stat_dot3statsdeferredtransmissions; - u32 tx_stat_dot3statsexcessivecollisions; - u32 tx_stat_dot3statslatecollisions; - u32 tx_stat_ifhcoutucastpkts; - u32 tx_stat_ifhcoutmulticastpkts; - u32 tx_stat_ifhcoutbroadcastpkts; - u32 tx_stat_etherstatspkts64octets; - u32 tx_stat_etherstatspkts65octetsto127octets; - u32 tx_stat_etherstatspkts128octetsto255octets; - u32 tx_stat_etherstatspkts256octetsto511octets; - u32 tx_stat_etherstatspkts512octetsto1023octets; - u32 tx_stat_etherstatspkts1024octetsto1522octets; - u32 tx_stat_etherstatspktsover1522octets; - u32 tx_stat_dot3statsinternalmactransmiterrors; + u32 tx_stat_ifhcoutoctets; + u32 tx_stat_ifhcoutbadoctets; + u32 tx_stat_etherstatscollisions; + u32 tx_stat_outxonsent; + u32 tx_stat_outxoffsent; + u32 tx_stat_flowcontroldone; + u32 tx_stat_dot3statssinglecollisionframes; + u32 tx_stat_dot3statsmultiplecollisionframes; + u32 tx_stat_dot3statsdeferredtransmissions; + u32 tx_stat_dot3statsexcessivecollisions; + u32 tx_stat_dot3statslatecollisions; + u32 tx_stat_ifhcoutucastpkts; + u32 tx_stat_ifhcoutmulticastpkts; + u32 tx_stat_ifhcoutbroadcastpkts; + u32 tx_stat_etherstatspkts64octets; + u32 tx_stat_etherstatspkts65octetsto127octets; + u32 tx_stat_etherstatspkts128octetsto255octets; + u32 tx_stat_etherstatspkts256octetsto511octets; + u32 tx_stat_etherstatspkts512octetsto1023octets; + u32 tx_stat_etherstatspkts1024octetsto1522octets; + u32 tx_stat_etherstatspktsover1522octets; + u32 tx_stat_dot3statsinternalmactransmiterrors; }; @@ -1832,245 +2497,412 @@ struct bmac2_stats { u32 rx_stat_gripj_hi; }; +struct mstat_stats { + struct { + /* OTE MSTAT on E3 has a bug where this register's contents are + * actually tx_gtxpok + tx_gtxpf + (possibly)tx_gtxpp + */ + u32 tx_gtxpok_lo; + u32 tx_gtxpok_hi; + u32 tx_gtxpf_lo; + u32 tx_gtxpf_hi; + u32 tx_gtxpp_lo; + u32 tx_gtxpp_hi; + u32 tx_gtfcs_lo; + u32 tx_gtfcs_hi; + u32 tx_gtuca_lo; + u32 tx_gtuca_hi; + u32 tx_gtmca_lo; + u32 tx_gtmca_hi; + u32 tx_gtgca_lo; + u32 tx_gtgca_hi; + u32 tx_gtpkt_lo; + u32 tx_gtpkt_hi; + u32 tx_gt64_lo; + u32 tx_gt64_hi; + u32 tx_gt127_lo; + u32 tx_gt127_hi; + u32 tx_gt255_lo; + u32 tx_gt255_hi; + u32 tx_gt511_lo; + u32 tx_gt511_hi; + u32 tx_gt1023_lo; + u32 tx_gt1023_hi; + u32 tx_gt1518_lo; + u32 tx_gt1518_hi; + u32 tx_gt2047_lo; + u32 tx_gt2047_hi; + u32 tx_gt4095_lo; + u32 tx_gt4095_hi; + u32 tx_gt9216_lo; + u32 tx_gt9216_hi; + u32 tx_gt16383_lo; + u32 tx_gt16383_hi; + u32 tx_gtufl_lo; + u32 tx_gtufl_hi; + u32 tx_gterr_lo; + u32 tx_gterr_hi; + u32 tx_gtbyt_lo; + u32 tx_gtbyt_hi; + u32 tx_collisions_lo; + u32 tx_collisions_hi; + u32 tx_singlecollision_lo; + u32 tx_singlecollision_hi; + u32 tx_multiplecollisions_lo; + u32 tx_multiplecollisions_hi; + u32 tx_deferred_lo; + u32 tx_deferred_hi; + u32 tx_excessivecollisions_lo; + u32 tx_excessivecollisions_hi; + u32 tx_latecollisions_lo; + u32 tx_latecollisions_hi; + } stats_tx; + + struct { + u32 rx_gr64_lo; + u32 rx_gr64_hi; + u32 rx_gr127_lo; + u32 rx_gr127_hi; + u32 rx_gr255_lo; + u32 rx_gr255_hi; + u32 rx_gr511_lo; + u32 rx_gr511_hi; + u32 rx_gr1023_lo; + u32 rx_gr1023_hi; + u32 rx_gr1518_lo; + u32 rx_gr1518_hi; + u32 rx_gr2047_lo; + u32 rx_gr2047_hi; + u32 rx_gr4095_lo; + u32 rx_gr4095_hi; + u32 rx_gr9216_lo; + u32 rx_gr9216_hi; + u32 rx_gr16383_lo; + u32 rx_gr16383_hi; + u32 rx_grpkt_lo; + u32 rx_grpkt_hi; + u32 rx_grfcs_lo; + u32 rx_grfcs_hi; + u32 rx_gruca_lo; + u32 rx_gruca_hi; + u32 rx_grmca_lo; + u32 rx_grmca_hi; + u32 rx_grbca_lo; + u32 rx_grbca_hi; + u32 rx_grxpf_lo; + u32 rx_grxpf_hi; + u32 rx_grxpp_lo; + u32 rx_grxpp_hi; + u32 rx_grxuo_lo; + u32 rx_grxuo_hi; + u32 rx_grovr_lo; + u32 rx_grovr_hi; + u32 rx_grxcf_lo; + u32 rx_grxcf_hi; + u32 rx_grflr_lo; + u32 rx_grflr_hi; + u32 rx_grpok_lo; + u32 rx_grpok_hi; + u32 rx_grbyt_lo; + u32 rx_grbyt_hi; + u32 rx_grund_lo; + u32 rx_grund_hi; + u32 rx_grfrg_lo; + u32 rx_grfrg_hi; + u32 rx_grerb_lo; + u32 rx_grerb_hi; + u32 rx_grfre_lo; + u32 rx_grfre_hi; + + u32 rx_alignmenterrors_lo; + u32 rx_alignmenterrors_hi; + u32 rx_falsecarrier_lo; + u32 rx_falsecarrier_hi; + u32 rx_llfcmsgcnt_lo; + u32 rx_llfcmsgcnt_hi; + } stats_rx; +}; + union mac_stats { - struct emac_stats emac_stats; - struct bmac1_stats bmac1_stats; - struct bmac2_stats bmac2_stats; + struct emac_stats emac_stats; + struct bmac1_stats bmac1_stats; + struct bmac2_stats bmac2_stats; + struct mstat_stats mstat_stats; }; struct mac_stx { - /* in_bad_octets */ - u32 rx_stat_ifhcinbadoctets_hi; - u32 rx_stat_ifhcinbadoctets_lo; + /* in_bad_octets */ + u32 rx_stat_ifhcinbadoctets_hi; + u32 rx_stat_ifhcinbadoctets_lo; - /* out_bad_octets */ - u32 tx_stat_ifhcoutbadoctets_hi; - u32 tx_stat_ifhcoutbadoctets_lo; + /* out_bad_octets */ + u32 tx_stat_ifhcoutbadoctets_hi; + u32 tx_stat_ifhcoutbadoctets_lo; - /* crc_receive_errors */ - u32 rx_stat_dot3statsfcserrors_hi; - u32 rx_stat_dot3statsfcserrors_lo; - /* alignment_errors */ - u32 rx_stat_dot3statsalignmenterrors_hi; - u32 rx_stat_dot3statsalignmenterrors_lo; - /* carrier_sense_errors */ - u32 rx_stat_dot3statscarriersenseerrors_hi; - u32 rx_stat_dot3statscarriersenseerrors_lo; - /* false_carrier_detections */ - u32 rx_stat_falsecarriererrors_hi; - u32 rx_stat_falsecarriererrors_lo; + /* crc_receive_errors */ + u32 rx_stat_dot3statsfcserrors_hi; + u32 rx_stat_dot3statsfcserrors_lo; + /* alignment_errors */ + u32 rx_stat_dot3statsalignmenterrors_hi; + u32 rx_stat_dot3statsalignmenterrors_lo; + /* carrier_sense_errors */ + u32 rx_stat_dot3statscarriersenseerrors_hi; + u32 rx_stat_dot3statscarriersenseerrors_lo; + /* false_carrier_detections */ + u32 rx_stat_falsecarriererrors_hi; + u32 rx_stat_falsecarriererrors_lo; - /* runt_packets_received */ - u32 rx_stat_etherstatsundersizepkts_hi; - u32 rx_stat_etherstatsundersizepkts_lo; - /* jabber_packets_received */ - u32 rx_stat_dot3statsframestoolong_hi; - u32 rx_stat_dot3statsframestoolong_lo; + /* runt_packets_received */ + u32 rx_stat_etherstatsundersizepkts_hi; + u32 rx_stat_etherstatsundersizepkts_lo; + /* jabber_packets_received */ + u32 rx_stat_dot3statsframestoolong_hi; + u32 rx_stat_dot3statsframestoolong_lo; - /* error_runt_packets_received */ - u32 rx_stat_etherstatsfragments_hi; - u32 rx_stat_etherstatsfragments_lo; - /* error_jabber_packets_received */ - u32 rx_stat_etherstatsjabbers_hi; - u32 rx_stat_etherstatsjabbers_lo; + /* error_runt_packets_received */ + u32 rx_stat_etherstatsfragments_hi; + u32 rx_stat_etherstatsfragments_lo; + /* error_jabber_packets_received */ + u32 rx_stat_etherstatsjabbers_hi; + u32 rx_stat_etherstatsjabbers_lo; - /* control_frames_received */ - u32 rx_stat_maccontrolframesreceived_hi; - u32 rx_stat_maccontrolframesreceived_lo; - u32 rx_stat_bmac_xpf_hi; - u32 rx_stat_bmac_xpf_lo; - u32 rx_stat_bmac_xcf_hi; - u32 rx_stat_bmac_xcf_lo; + /* control_frames_received */ + u32 rx_stat_maccontrolframesreceived_hi; + u32 rx_stat_maccontrolframesreceived_lo; + u32 rx_stat_mac_xpf_hi; + u32 rx_stat_mac_xpf_lo; + u32 rx_stat_mac_xcf_hi; + u32 rx_stat_mac_xcf_lo; - /* xoff_state_entered */ - u32 rx_stat_xoffstateentered_hi; - u32 rx_stat_xoffstateentered_lo; - /* pause_xon_frames_received */ - u32 rx_stat_xonpauseframesreceived_hi; - u32 rx_stat_xonpauseframesreceived_lo; - /* pause_xoff_frames_received */ - u32 rx_stat_xoffpauseframesreceived_hi; - u32 rx_stat_xoffpauseframesreceived_lo; - /* pause_xon_frames_transmitted */ - u32 tx_stat_outxonsent_hi; - u32 tx_stat_outxonsent_lo; - /* pause_xoff_frames_transmitted */ - u32 tx_stat_outxoffsent_hi; - u32 tx_stat_outxoffsent_lo; - /* flow_control_done */ - u32 tx_stat_flowcontroldone_hi; - u32 tx_stat_flowcontroldone_lo; + /* xoff_state_entered */ + u32 rx_stat_xoffstateentered_hi; + u32 rx_stat_xoffstateentered_lo; + /* pause_xon_frames_received */ + u32 rx_stat_xonpauseframesreceived_hi; + u32 rx_stat_xonpauseframesreceived_lo; + /* pause_xoff_frames_received */ + u32 rx_stat_xoffpauseframesreceived_hi; + u32 rx_stat_xoffpauseframesreceived_lo; + /* pause_xon_frames_transmitted */ + u32 tx_stat_outxonsent_hi; + u32 tx_stat_outxonsent_lo; + /* pause_xoff_frames_transmitted */ + u32 tx_stat_outxoffsent_hi; + u32 tx_stat_outxoffsent_lo; + /* flow_control_done */ + u32 tx_stat_flowcontroldone_hi; + u32 tx_stat_flowcontroldone_lo; - /* ether_stats_collisions */ - u32 tx_stat_etherstatscollisions_hi; - u32 tx_stat_etherstatscollisions_lo; - /* single_collision_transmit_frames */ - u32 tx_stat_dot3statssinglecollisionframes_hi; - u32 tx_stat_dot3statssinglecollisionframes_lo; - /* multiple_collision_transmit_frames */ - u32 tx_stat_dot3statsmultiplecollisionframes_hi; - u32 tx_stat_dot3statsmultiplecollisionframes_lo; - /* deferred_transmissions */ - u32 tx_stat_dot3statsdeferredtransmissions_hi; - u32 tx_stat_dot3statsdeferredtransmissions_lo; - /* excessive_collision_frames */ - u32 tx_stat_dot3statsexcessivecollisions_hi; - u32 tx_stat_dot3statsexcessivecollisions_lo; - /* late_collision_frames */ - u32 tx_stat_dot3statslatecollisions_hi; - u32 tx_stat_dot3statslatecollisions_lo; + /* ether_stats_collisions */ + u32 tx_stat_etherstatscollisions_hi; + u32 tx_stat_etherstatscollisions_lo; + /* single_collision_transmit_frames */ + u32 tx_stat_dot3statssinglecollisionframes_hi; + u32 tx_stat_dot3statssinglecollisionframes_lo; + /* multiple_collision_transmit_frames */ + u32 tx_stat_dot3statsmultiplecollisionframes_hi; + u32 tx_stat_dot3statsmultiplecollisionframes_lo; + /* deferred_transmissions */ + u32 tx_stat_dot3statsdeferredtransmissions_hi; + u32 tx_stat_dot3statsdeferredtransmissions_lo; + /* excessive_collision_frames */ + u32 tx_stat_dot3statsexcessivecollisions_hi; + u32 tx_stat_dot3statsexcessivecollisions_lo; + /* late_collision_frames */ + u32 tx_stat_dot3statslatecollisions_hi; + u32 tx_stat_dot3statslatecollisions_lo; - /* frames_transmitted_64_bytes */ - u32 tx_stat_etherstatspkts64octets_hi; - u32 tx_stat_etherstatspkts64octets_lo; - /* frames_transmitted_65_127_bytes */ - u32 tx_stat_etherstatspkts65octetsto127octets_hi; - u32 tx_stat_etherstatspkts65octetsto127octets_lo; - /* frames_transmitted_128_255_bytes */ - u32 tx_stat_etherstatspkts128octetsto255octets_hi; - u32 tx_stat_etherstatspkts128octetsto255octets_lo; - /* frames_transmitted_256_511_bytes */ - u32 tx_stat_etherstatspkts256octetsto511octets_hi; - u32 tx_stat_etherstatspkts256octetsto511octets_lo; - /* frames_transmitted_512_1023_bytes */ - u32 tx_stat_etherstatspkts512octetsto1023octets_hi; - u32 tx_stat_etherstatspkts512octetsto1023octets_lo; - /* frames_transmitted_1024_1522_bytes */ - u32 tx_stat_etherstatspkts1024octetsto1522octets_hi; - u32 tx_stat_etherstatspkts1024octetsto1522octets_lo; - /* frames_transmitted_1523_9022_bytes */ - u32 tx_stat_etherstatspktsover1522octets_hi; - u32 tx_stat_etherstatspktsover1522octets_lo; - u32 tx_stat_bmac_2047_hi; - u32 tx_stat_bmac_2047_lo; - u32 tx_stat_bmac_4095_hi; - u32 tx_stat_bmac_4095_lo; - u32 tx_stat_bmac_9216_hi; - u32 tx_stat_bmac_9216_lo; - u32 tx_stat_bmac_16383_hi; - u32 tx_stat_bmac_16383_lo; + /* frames_transmitted_64_bytes */ + u32 tx_stat_etherstatspkts64octets_hi; + u32 tx_stat_etherstatspkts64octets_lo; + /* frames_transmitted_65_127_bytes */ + u32 tx_stat_etherstatspkts65octetsto127octets_hi; + u32 tx_stat_etherstatspkts65octetsto127octets_lo; + /* frames_transmitted_128_255_bytes */ + u32 tx_stat_etherstatspkts128octetsto255octets_hi; + u32 tx_stat_etherstatspkts128octetsto255octets_lo; + /* frames_transmitted_256_511_bytes */ + u32 tx_stat_etherstatspkts256octetsto511octets_hi; + u32 tx_stat_etherstatspkts256octetsto511octets_lo; + /* frames_transmitted_512_1023_bytes */ + u32 tx_stat_etherstatspkts512octetsto1023octets_hi; + u32 tx_stat_etherstatspkts512octetsto1023octets_lo; + /* frames_transmitted_1024_1522_bytes */ + u32 tx_stat_etherstatspkts1024octetsto1522octets_hi; + u32 tx_stat_etherstatspkts1024octetsto1522octets_lo; + /* frames_transmitted_1523_9022_bytes */ + u32 tx_stat_etherstatspktsover1522octets_hi; + u32 tx_stat_etherstatspktsover1522octets_lo; + u32 tx_stat_mac_2047_hi; + u32 tx_stat_mac_2047_lo; + u32 tx_stat_mac_4095_hi; + u32 tx_stat_mac_4095_lo; + u32 tx_stat_mac_9216_hi; + u32 tx_stat_mac_9216_lo; + u32 tx_stat_mac_16383_hi; + u32 tx_stat_mac_16383_lo; - /* internal_mac_transmit_errors */ - u32 tx_stat_dot3statsinternalmactransmiterrors_hi; - u32 tx_stat_dot3statsinternalmactransmiterrors_lo; + /* internal_mac_transmit_errors */ + u32 tx_stat_dot3statsinternalmactransmiterrors_hi; + u32 tx_stat_dot3statsinternalmactransmiterrors_lo; - /* if_out_discards */ - u32 tx_stat_bmac_ufl_hi; - u32 tx_stat_bmac_ufl_lo; + /* if_out_discards */ + u32 tx_stat_mac_ufl_hi; + u32 tx_stat_mac_ufl_lo; }; -#define MAC_STX_IDX_MAX 2 +#define MAC_STX_IDX_MAX 2 struct host_port_stats { - u32 host_port_stats_start; + u32 host_port_stats_counter; - struct mac_stx mac_stx[MAC_STX_IDX_MAX]; + struct mac_stx mac_stx[MAC_STX_IDX_MAX]; - u32 brb_drop_hi; - u32 brb_drop_lo; + u32 brb_drop_hi; + u32 brb_drop_lo; - u32 host_port_stats_end; + u32 not_used; /* obsolete */ + u32 pfc_frames_tx_hi; + u32 pfc_frames_tx_lo; + u32 pfc_frames_rx_hi; + u32 pfc_frames_rx_lo; }; struct host_func_stats { - u32 host_func_stats_start; + u32 host_func_stats_start; - u32 total_bytes_received_hi; - u32 total_bytes_received_lo; + u32 total_bytes_received_hi; + u32 total_bytes_received_lo; - u32 total_bytes_transmitted_hi; - u32 total_bytes_transmitted_lo; + u32 total_bytes_transmitted_hi; + u32 total_bytes_transmitted_lo; - u32 total_unicast_packets_received_hi; - u32 total_unicast_packets_received_lo; + u32 total_unicast_packets_received_hi; + u32 total_unicast_packets_received_lo; - u32 total_multicast_packets_received_hi; - u32 total_multicast_packets_received_lo; + u32 total_multicast_packets_received_hi; + u32 total_multicast_packets_received_lo; - u32 total_broadcast_packets_received_hi; - u32 total_broadcast_packets_received_lo; + u32 total_broadcast_packets_received_hi; + u32 total_broadcast_packets_received_lo; - u32 total_unicast_packets_transmitted_hi; - u32 total_unicast_packets_transmitted_lo; + u32 total_unicast_packets_transmitted_hi; + u32 total_unicast_packets_transmitted_lo; - u32 total_multicast_packets_transmitted_hi; - u32 total_multicast_packets_transmitted_lo; + u32 total_multicast_packets_transmitted_hi; + u32 total_multicast_packets_transmitted_lo; - u32 total_broadcast_packets_transmitted_hi; - u32 total_broadcast_packets_transmitted_lo; + u32 total_broadcast_packets_transmitted_hi; + u32 total_broadcast_packets_transmitted_lo; - u32 valid_bytes_received_hi; - u32 valid_bytes_received_lo; + u32 valid_bytes_received_hi; + u32 valid_bytes_received_lo; - u32 host_func_stats_end; + u32 host_func_stats_end; +}; + +/* VIC definitions */ +#define VICSTATST_UIF_INDEX 2 + +/* + * stats collected for afex. + * NOTE: structure is exactly as expected to be received by the switch. + * order must remain exactly as is unless protocol changes ! + */ +struct afex_stats { + u32 tx_unicast_frames_hi; + u32 tx_unicast_frames_lo; + u32 tx_unicast_bytes_hi; + u32 tx_unicast_bytes_lo; + u32 tx_multicast_frames_hi; + u32 tx_multicast_frames_lo; + u32 tx_multicast_bytes_hi; + u32 tx_multicast_bytes_lo; + u32 tx_broadcast_frames_hi; + u32 tx_broadcast_frames_lo; + u32 tx_broadcast_bytes_hi; + u32 tx_broadcast_bytes_lo; + u32 tx_frames_discarded_hi; + u32 tx_frames_discarded_lo; + u32 tx_frames_dropped_hi; + u32 tx_frames_dropped_lo; + + u32 rx_unicast_frames_hi; + u32 rx_unicast_frames_lo; + u32 rx_unicast_bytes_hi; + u32 rx_unicast_bytes_lo; + u32 rx_multicast_frames_hi; + u32 rx_multicast_frames_lo; + u32 rx_multicast_bytes_hi; + u32 rx_multicast_bytes_lo; + u32 rx_broadcast_frames_hi; + u32 rx_broadcast_frames_lo; + u32 rx_broadcast_bytes_hi; + u32 rx_broadcast_bytes_lo; + u32 rx_frames_discarded_hi; + u32 rx_frames_discarded_lo; + u32 rx_frames_dropped_hi; + u32 rx_frames_dropped_lo; +}; + +/* To maintain backward compatibility between FW and drivers, new elements */ +/* should be added to the end of the structure. */ + +/* Per Port Statistics */ +struct port_info { + u32 size; /* size of this structure (i.e. sizeof(port_info)) */ + u32 enabled; /* 0 =Disabled, 1= Enabled */ + u32 link_speed; /* multiplier of 100Mb */ + u32 wol_support; /* WoL Support (i.e. Non-Zero if WOL supported ) */ + u32 flow_control; /* 802.3X Flow Ctrl. 0=off 1=RX 2=TX 3=RX&TX.*/ + u32 flex10; /* Flex10 mode enabled. non zero = yes */ + u32 rx_drops; /* RX Discards. Counters roll over, never reset */ + u32 rx_errors; /* RX Errors. Physical Port Stats L95, All PFs and NC-SI. + This is flagged by Consumer as an error. */ + u32 rx_uncast_lo; /* RX Unicast Packets. Free running counters: */ + u32 rx_uncast_hi; /* RX Unicast Packets. Free running counters: */ + u32 rx_mcast_lo; /* RX Multicast Packets */ + u32 rx_mcast_hi; /* RX Multicast Packets */ + u32 rx_bcast_lo; /* RX Broadcast Packets */ + u32 rx_bcast_hi; /* RX Broadcast Packets */ + u32 tx_uncast_lo; /* TX Unicast Packets */ + u32 tx_uncast_hi; /* TX Unicast Packets */ + u32 tx_mcast_lo; /* TX Multicast Packets */ + u32 tx_mcast_hi; /* TX Multicast Packets */ + u32 tx_bcast_lo; /* TX Broadcast Packets */ + u32 tx_bcast_hi; /* TX Broadcast Packets */ + u32 tx_errors; /* TX Errors */ + u32 tx_discards; /* TX Discards */ + u32 rx_frames_lo; /* RX Frames received */ + u32 rx_frames_hi; /* RX Frames received */ + u32 rx_bytes_lo; /* RX Bytes received */ + u32 rx_bytes_hi; /* RX Bytes received */ + u32 tx_frames_lo; /* TX Frames sent */ + u32 tx_frames_hi; /* TX Frames sent */ + u32 tx_bytes_lo; /* TX Bytes sent */ + u32 tx_bytes_hi; /* TX Bytes sent */ + u32 link_status; /* Port P Link Status. 1:0 bit for port enabled. + 1:1 bit for link good, + 2:1 Set if link changed between last poll. */ + u32 tx_pfc_frames_lo; /* PFC Frames sent. */ + u32 tx_pfc_frames_hi; /* PFC Frames sent. */ + u32 rx_pfc_frames_lo; /* PFC Frames Received. */ + u32 rx_pfc_frames_hi; /* PFC Frames Received. */ }; -#define BCM_5710_FW_MAJOR_VERSION 6 -#define BCM_5710_FW_MINOR_VERSION 1 -#define BCM_5710_FW_REVISION_VERSION 38 -#define BCM_5710_FW_ENGINEERING_VERSION 0 +#define BCM_5710_FW_MAJOR_VERSION 7 +#define BCM_5710_FW_MINOR_VERSION 2 +#define BCM_5710_FW_REVISION_VERSION 53 +#define BCM_5710_FW_ENGINEERING_VERSION 0 #define BCM_5710_FW_COMPILE_FLAGS 1 /* - * common data for all protocols - */ -struct doorbell_hdr { - u8 header; -#define DOORBELL_HDR_RX (0x1<<0) -#define DOORBELL_HDR_RX_SHIFT 0 -#define DOORBELL_HDR_DB_TYPE (0x1<<1) -#define DOORBELL_HDR_DB_TYPE_SHIFT 1 -#define DOORBELL_HDR_DPM_SIZE (0x3<<2) -#define DOORBELL_HDR_DPM_SIZE_SHIFT 2 -#define DOORBELL_HDR_CONN_TYPE (0xF<<4) -#define DOORBELL_HDR_CONN_TYPE_SHIFT 4 -}; - -/* - * doorbell message sent to the chip - */ -struct doorbell { -#if defined(__BIG_ENDIAN) - u16 zero_fill2; - u8 zero_fill1; - struct doorbell_hdr header; -#elif defined(__LITTLE_ENDIAN) - struct doorbell_hdr header; - u8 zero_fill1; - u16 zero_fill2; -#endif -}; - - -/* - * doorbell message sent to the chip - */ -struct doorbell_set_prod { -#if defined(__BIG_ENDIAN) - u16 prod; - u8 zero_fill1; - struct doorbell_hdr header; -#elif defined(__LITTLE_ENDIAN) - struct doorbell_hdr header; - u8 zero_fill1; - u16 prod; -#endif -}; - - -struct regpair { - __le32 lo; - __le32 hi; -}; - - -/* - * attention bits + * attention bits $$KEEP_ENDIANNESS$$ */ struct atten_sp_status_block { __le32 attn_bits; @@ -2191,115 +3023,21 @@ struct dmae_command { }; -struct double_regpair { - u32 regpair0_lo; - u32 regpair0_hi; - u32 regpair1_lo; - u32 regpair1_hi; -}; - - /* - * The eth storm context of Ustorm + * common data for all protocols */ -struct ustorm_eth_st_context { - u32 reserved0[48]; +struct doorbell_hdr { + u8 header; +#define DOORBELL_HDR_RX (0x1<<0) +#define DOORBELL_HDR_RX_SHIFT 0 +#define DOORBELL_HDR_DB_TYPE (0x1<<1) +#define DOORBELL_HDR_DB_TYPE_SHIFT 1 +#define DOORBELL_HDR_DPM_SIZE (0x3<<2) +#define DOORBELL_HDR_DPM_SIZE_SHIFT 2 +#define DOORBELL_HDR_CONN_TYPE (0xF<<4) +#define DOORBELL_HDR_CONN_TYPE_SHIFT 4 }; -/* - * The eth storm context of Tstorm - */ -struct tstorm_eth_st_context { - u32 __reserved0[28]; -}; - -/* - * The eth aggregative context of Xstorm - */ -struct xstorm_eth_ag_context { - u32 reserved0; -#if defined(__BIG_ENDIAN) - u8 cdu_reserved; - u8 reserved2; - u16 reserved1; -#elif defined(__LITTLE_ENDIAN) - u16 reserved1; - u8 reserved2; - u8 cdu_reserved; -#endif - u32 reserved3[30]; -}; - -/* - * The eth aggregative context of Tstorm - */ -struct tstorm_eth_ag_context { - u32 __reserved0[14]; -}; - -/* - * The eth aggregative context of Ustorm - */ -struct ustorm_eth_ag_context { - u32 __reserved0; -#if defined(__BIG_ENDIAN) - u8 cdu_usage; - u8 __reserved2; - u16 __reserved1; -#elif defined(__LITTLE_ENDIAN) - u16 __reserved1; - u8 __reserved2; - u8 cdu_usage; -#endif - u32 __reserved3[6]; -}; - -/* - * Timers connection context - */ -struct timers_block_context { - u32 __reserved_0; - u32 __reserved_1; - u32 __reserved_2; - u32 flags; -#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS (0x3<<0) -#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS_SHIFT 0 -#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG (0x1<<2) -#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG_SHIFT 2 -#define __TIMERS_BLOCK_CONTEXT_RESERVED0 (0x1FFFFFFF<<3) -#define __TIMERS_BLOCK_CONTEXT_RESERVED0_SHIFT 3 -}; - -/* - * The eth storm context of Xstorm - */ -struct xstorm_eth_st_context { - u32 reserved0[60]; -}; - -/* - * The eth storm context of Cstorm - */ -struct cstorm_eth_st_context { - u32 __reserved0[4]; -}; - -/* - * Ethernet connection context - */ -struct eth_context { - struct ustorm_eth_st_context ustorm_st_context; - struct tstorm_eth_st_context tstorm_st_context; - struct xstorm_eth_ag_context xstorm_ag_context; - struct tstorm_eth_ag_context tstorm_ag_context; - struct cstorm_eth_ag_context cstorm_ag_context; - struct ustorm_eth_ag_context ustorm_ag_context; - struct timers_block_context timers_context; - struct xstorm_eth_st_context xstorm_st_context; - struct cstorm_eth_st_context cstorm_st_context; -}; - - /* * Ethernet doorbell */ @@ -2329,12 +3067,12 @@ struct eth_tx_doorbell { /* - * 3 lines. status block + * 3 lines. status block $$KEEP_ENDIANNESS$$ */ struct hc_status_block_e1x { __le16 index_values[HC_SB_MAX_INDICES_E1X]; __le16 running_index[HC_SB_MAX_SM]; - u32 rsrv; + __le32 rsrv[11]; }; /* @@ -2346,12 +3084,12 @@ struct host_hc_status_block_e1x { /* - * 3 lines. status block + * 3 lines. status block $$KEEP_ENDIANNESS$$ */ struct hc_status_block_e2 { __le16 index_values[HC_SB_MAX_INDICES_E2]; __le16 running_index[HC_SB_MAX_SM]; - u32 reserved; + __le32 reserved[11]; }; /* @@ -2363,7 +3101,7 @@ struct host_hc_status_block_e2 { /* - * 5 lines. slow-path status block + * 5 lines. slow-path status block $$KEEP_ENDIANNESS$$ */ struct hc_sp_status_block { __le16 index_values[HC_SP_SB_MAX_INDICES]; @@ -2471,6 +3209,15 @@ union igu_consprod_reg { }; +/* + * Igu control commands + */ +enum igu_ctrl_cmd { + IGU_CTRL_CMD_TYPE_RD, + IGU_CTRL_CMD_TYPE_WR, + MAX_IGU_CTRL_CMD}; + + /* * Control register for the IGU command register */ @@ -2489,6 +3236,27 @@ struct igu_ctrl_reg { }; +/* + * Igu interrupt command + */ +enum igu_int_cmd { + IGU_INT_ENABLE, + IGU_INT_DISABLE, + IGU_INT_NOP, + IGU_INT_NOP2, + MAX_IGU_INT_CMD}; + + +/* + * Igu segments + */ +enum igu_seg_access { + IGU_SEG_ACCESS_NORM, + IGU_SEG_ACCESS_DEF, + IGU_SEG_ACCESS_ATTN, + MAX_IGU_SEG_ACCESS}; + + /* * Parser parsing flags field */ @@ -2523,6 +3291,45 @@ struct parsing_flags { }; +/* + * Parsing flags for TCP ACK type + */ +enum prs_flags_ack_type { + PRS_FLAG_PUREACK_PIGGY, + PRS_FLAG_PUREACK_PURE, + MAX_PRS_FLAGS_ACK_TYPE}; + + +/* + * Parsing flags for Ethernet address type + */ +enum prs_flags_eth_addr_type { + PRS_FLAG_ETHTYPE_NON_UNICAST, + PRS_FLAG_ETHTYPE_UNICAST, + MAX_PRS_FLAGS_ETH_ADDR_TYPE}; + + +/* + * Parsing flags for over-ethernet protocol + */ +enum prs_flags_over_eth { + PRS_FLAG_OVERETH_UNKNOWN, + PRS_FLAG_OVERETH_IPV4, + PRS_FLAG_OVERETH_IPV6, + PRS_FLAG_OVERETH_LLCSNAP_UNKNOWN, + MAX_PRS_FLAGS_OVER_ETH}; + + +/* + * Parsing flags for over-IP protocol + */ +enum prs_flags_over_ip { + PRS_FLAG_OVERIP_UNKNOWN, + PRS_FLAG_OVERIP_TCP, + PRS_FLAG_OVERIP_UDP, + MAX_PRS_FLAGS_OVER_IP}; + + /* * SDM operation gen command (generate aggregative interrupt) */ @@ -2542,27 +3349,125 @@ struct sdm_op_gen { /* - * client init fc data + * Timers connection context */ -struct client_init_fc_data { - __le16 cqe_pause_thr_low; - __le16 cqe_pause_thr_high; - __le16 bd_pause_thr_low; - __le16 bd_pause_thr_high; - __le16 sge_pause_thr_low; - __le16 sge_pause_thr_high; - __le16 rx_cos_mask; - u8 safc_group_num; - u8 safc_group_en_flg; - u8 traffic_type; - u8 reserved0; - __le16 reserved1; - __le32 reserved2; +struct timers_block_context { + u32 __reserved_0; + u32 __reserved_1; + u32 __reserved_2; + u32 flags; +#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS (0x3<<0) +#define __TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS_SHIFT 0 +#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG (0x1<<2) +#define TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG_SHIFT 2 +#define __TIMERS_BLOCK_CONTEXT_RESERVED0 (0x1FFFFFFF<<3) +#define __TIMERS_BLOCK_CONTEXT_RESERVED0_SHIFT 3 }; /* - * client init ramrod data + * The eth aggregative context of Tstorm + */ +struct tstorm_eth_ag_context { + u32 __reserved0[14]; +}; + + +/* + * The eth aggregative context of Ustorm + */ +struct ustorm_eth_ag_context { + u32 __reserved0; +#if defined(__BIG_ENDIAN) + u8 cdu_usage; + u8 __reserved2; + u16 __reserved1; +#elif defined(__LITTLE_ENDIAN) + u16 __reserved1; + u8 __reserved2; + u8 cdu_usage; +#endif + u32 __reserved3[6]; +}; + + +/* + * The eth aggregative context of Xstorm + */ +struct xstorm_eth_ag_context { + u32 reserved0; +#if defined(__BIG_ENDIAN) + u8 cdu_reserved; + u8 reserved2; + u16 reserved1; +#elif defined(__LITTLE_ENDIAN) + u16 reserved1; + u8 reserved2; + u8 cdu_reserved; +#endif + u32 reserved3[30]; +}; + + +/* + * doorbell message sent to the chip + */ +struct doorbell { +#if defined(__BIG_ENDIAN) + u16 zero_fill2; + u8 zero_fill1; + struct doorbell_hdr header; +#elif defined(__LITTLE_ENDIAN) + struct doorbell_hdr header; + u8 zero_fill1; + u16 zero_fill2; +#endif +}; + + +/* + * doorbell message sent to the chip + */ +struct doorbell_set_prod { +#if defined(__BIG_ENDIAN) + u16 prod; + u8 zero_fill1; + struct doorbell_hdr header; +#elif defined(__LITTLE_ENDIAN) + struct doorbell_hdr header; + u8 zero_fill1; + u16 prod; +#endif +}; + + +struct regpair { + __le32 lo; + __le32 hi; +}; + + +/* + * Classify rule opcodes in E2/E3 + */ +enum classify_rule { + CLASSIFY_RULE_OPCODE_MAC, + CLASSIFY_RULE_OPCODE_VLAN, + CLASSIFY_RULE_OPCODE_PAIR, + MAX_CLASSIFY_RULE}; + + +/* + * Classify rule types in E2/E3 + */ +enum classify_rule_action_type { + CLASSIFY_RULE_REMOVE, + CLASSIFY_RULE_ADD, + MAX_CLASSIFY_RULE_ACTION_TYPE}; + + +/* + * client init ramrod data $$KEEP_ENDIANNESS$$ */ struct client_init_general_data { u8 client_id; @@ -2572,18 +3477,27 @@ struct client_init_general_data { u8 activate_flg; u8 sp_client_id; __le16 mtu; - __le16 default_vlan; - u8 default_vlan_flg; u8 statistics_zero_flg; - __le32 reserved1; + u8 func_id; + u8 cos; + u8 traffic_type; + u32 reserved0; }; /* - * client init rx data + * client init rx data $$KEEP_ENDIANNESS$$ */ struct client_init_rx_data { - u8 tpa_en_flg; + u8 tpa_en; +#define CLIENT_INIT_RX_DATA_TPA_EN_IPV4 (0x1<<0) +#define CLIENT_INIT_RX_DATA_TPA_EN_IPV4_SHIFT 0 +#define CLIENT_INIT_RX_DATA_TPA_EN_IPV6 (0x1<<1) +#define CLIENT_INIT_RX_DATA_TPA_EN_IPV6_SHIFT 1 +#define CLIENT_INIT_RX_DATA_TPA_MODE (0x1<<2) +#define CLIENT_INIT_RX_DATA_TPA_MODE_SHIFT 2 +#define CLIENT_INIT_RX_DATA_RESERVED5 (0x1F<<3) +#define CLIENT_INIT_RX_DATA_RESERVED5_SHIFT 3 u8 vmqueue_mode_en_flg; u8 extra_data_over_sgl_en_flg; u8 cache_line_alignment_log_size; @@ -2598,12 +3512,13 @@ struct client_init_rx_data { u8 outer_vlan_removal_enable_flg; u8 status_block_id; u8 rx_sb_index_number; - u8 rss_mode; + u8 dont_verify_rings_pause_thr_flg; u8 max_tpa_queues; - u8 reserved0; + u8 silent_vlan_removal_flg; __le16 max_bytes_on_bd; __le16 sge_buff_size; - __le16 reserved1; + u8 approx_mcast_engine_id; + u8 rss_engine_id; struct regpair bd_page_base; struct regpair sge_page_base; struct regpair cqe_page_base; @@ -2627,12 +3542,20 @@ struct client_init_rx_data { #define CLIENT_INIT_RX_DATA_ACCEPT_ANY_VLAN_SHIFT 6 #define CLIENT_INIT_RX_DATA_RESERVED2 (0x1FF<<7) #define CLIENT_INIT_RX_DATA_RESERVED2_SHIFT 7 - __le16 reserved3; - __le32 reserved4[2]; + __le16 cqe_pause_thr_low; + __le16 cqe_pause_thr_high; + __le16 bd_pause_thr_low; + __le16 bd_pause_thr_high; + __le16 sge_pause_thr_low; + __le16 sge_pause_thr_high; + __le16 rx_cos_mask; + __le16 silent_vlan_value; + __le16 silent_vlan_mask; + __le32 reserved6[2]; }; /* - * client init tx data + * client init tx data $$KEEP_ENDIANNESS$$ */ struct client_init_tx_data { u8 enforce_security_flg; @@ -2641,7 +3564,7 @@ struct client_init_tx_data { u8 tss_leading_client_id; u8 tx_switching_flg; u8 anti_spoofing_flg; - __le16 reserved0; + __le16 default_vlan; struct regpair tx_bd_page_base; __le16 state; #define CLIENT_INIT_TX_DATA_UCAST_ACCEPT_ALL (0x1<<0) @@ -2654,27 +3577,27 @@ struct client_init_tx_data { #define CLIENT_INIT_TX_DATA_ACCEPT_ANY_VLAN_SHIFT 3 #define CLIENT_INIT_TX_DATA_RESERVED1 (0xFFF<<4) #define CLIENT_INIT_TX_DATA_RESERVED1_SHIFT 4 - __le16 reserved2; + u8 default_vlan_flg; + u8 force_default_pri_flg; __le32 reserved3; }; /* - * client init ramrod data + * client init ramrod data $$KEEP_ENDIANNESS$$ */ struct client_init_ramrod_data { struct client_init_general_data general; struct client_init_rx_data rx; struct client_init_tx_data tx; - struct client_init_fc_data fc; }; /* - * client update ramrod data + * client update ramrod data $$KEEP_ENDIANNESS$$ */ struct client_update_ramrod_data { u8 client_id; - u8 reserved0; + u8 func_id; u8 inner_vlan_removal_enable_flg; u8 inner_vlan_removal_change_flg; u8 outer_vlan_removal_enable_flg; @@ -2686,24 +3609,54 @@ struct client_update_ramrod_data { __le16 default_vlan; u8 default_vlan_enable_flg; u8 default_vlan_change_flg; - __le16 reserved1; - __le32 reserved2[2]; + __le16 silent_vlan_value; + __le16 silent_vlan_mask; + u8 silent_vlan_removal_flg; + u8 silent_vlan_change_flg; + __le32 echo; }; /* - * + * The eth storm context of Cstorm + */ +struct cstorm_eth_st_context { + u32 __reserved0[4]; +}; + + +struct double_regpair { + u32 regpair0_lo; + u32 regpair0_hi; + u32 regpair1_lo; + u32 regpair1_hi; +}; + + +/* + * Ethernet address typesm used in ethernet tx BDs + */ +enum eth_addr_type { + UNKNOWN_ADDRESS, + UNICAST_ADDRESS, + MULTICAST_ADDRESS, + BROADCAST_ADDRESS, + MAX_ETH_ADDR_TYPE}; + + +/* + * $$KEEP_ENDIANNESS$$ */ struct eth_classify_cmd_header { u8 cmd_general_data; -#define ETH_CLASSIFY_CMD_HEADER_OPCODE (0x3<<0) -#define ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT 0 -#define ETH_CLASSIFY_CMD_HEADER_IS_ADD (0x1<<2) -#define ETH_CLASSIFY_CMD_HEADER_IS_ADD_SHIFT 2 -#define ETH_CLASSIFY_CMD_HEADER_RX_CMD (0x1<<3) -#define ETH_CLASSIFY_CMD_HEADER_RX_CMD_SHIFT 3 -#define ETH_CLASSIFY_CMD_HEADER_TX_CMD (0x1<<4) -#define ETH_CLASSIFY_CMD_HEADER_TX_CMD_SHIFT 4 +#define ETH_CLASSIFY_CMD_HEADER_RX_CMD (0x1<<0) +#define ETH_CLASSIFY_CMD_HEADER_RX_CMD_SHIFT 0 +#define ETH_CLASSIFY_CMD_HEADER_TX_CMD (0x1<<1) +#define ETH_CLASSIFY_CMD_HEADER_TX_CMD_SHIFT 1 +#define ETH_CLASSIFY_CMD_HEADER_OPCODE (0x3<<2) +#define ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT 2 +#define ETH_CLASSIFY_CMD_HEADER_IS_ADD (0x1<<4) +#define ETH_CLASSIFY_CMD_HEADER_IS_ADD_SHIFT 4 #define ETH_CLASSIFY_CMD_HEADER_RESERVED0 (0x7<<5) #define ETH_CLASSIFY_CMD_HEADER_RESERVED0_SHIFT 5 u8 func_id; @@ -2713,55 +3666,55 @@ struct eth_classify_cmd_header { /* - * header for eth classification config ramrod + * header for eth classification config ramrod $$KEEP_ENDIANNESS$$ */ struct eth_classify_header { u8 rule_cnt; u8 reserved0; - u16 reserved1; - u32 echo; + __le16 reserved1; + __le32 echo; }; /* - * Command for adding/removing a MAC classification rule + * Command for adding/removing a MAC classification rule $$KEEP_ENDIANNESS$$ */ struct eth_classify_mac_cmd { struct eth_classify_cmd_header header; - u32 reserved0; - u16 mac_lsb; - u16 mac_mid; - u16 mac_msb; - u16 reserved1; + __le32 reserved0; + __le16 mac_lsb; + __le16 mac_mid; + __le16 mac_msb; + __le16 reserved1; }; /* - * Command for adding/removing a MAC-VLAN pair classification rule + * Command for adding/removing a MAC-VLAN pair classification rule $$KEEP_ENDIANNESS$$ */ struct eth_classify_pair_cmd { struct eth_classify_cmd_header header; - u32 reserved0; - u16 mac_lsb; - u16 mac_mid; - u16 mac_msb; - u16 vlan; + __le32 reserved0; + __le16 mac_lsb; + __le16 mac_mid; + __le16 mac_msb; + __le16 vlan; }; /* - * Command for adding/removing a VLAN classification rule + * Command for adding/removing a VLAN classification rule $$KEEP_ENDIANNESS$$ */ struct eth_classify_vlan_cmd { struct eth_classify_cmd_header header; - u32 reserved0; - u32 reserved1; - u16 reserved2; - u16 vlan; + __le32 reserved0; + __le32 reserved1; + __le16 reserved2; + __le16 vlan; }; /* - * union for eth classification rule + * union for eth classification rule $$KEEP_ENDIANNESS$$ */ union eth_classify_rule_cmd { struct eth_classify_mac_cmd mac; @@ -2770,20 +3723,57 @@ union eth_classify_rule_cmd { }; /* - * parameters for eth classification configuration ramrod + * parameters for eth classification configuration ramrod $$KEEP_ENDIANNESS$$ */ struct eth_classify_rules_ramrod_data { struct eth_classify_header header; - union eth_classify_rule_cmd rules[16]; + union eth_classify_rule_cmd rules[CLASSIFY_RULES_COUNT]; }; /* - * The data contain client ID need to the ramrod + * The data contain client ID need to the ramrod $$KEEP_ENDIANNESS$$ */ struct eth_common_ramrod_data { - u32 client_id; - u32 reserved1; + __le32 client_id; + __le32 reserved1; +}; + + +/* + * The eth storm context of Ustorm + */ +struct ustorm_eth_st_context { + u32 reserved0[52]; +}; + +/* + * The eth storm context of Tstorm + */ +struct tstorm_eth_st_context { + u32 __reserved0[28]; +}; + +/* + * The eth storm context of Xstorm + */ +struct xstorm_eth_st_context { + u32 reserved0[60]; +}; + +/* + * Ethernet connection context + */ +struct eth_context { + struct ustorm_eth_st_context ustorm_st_context; + struct tstorm_eth_st_context tstorm_st_context; + struct xstorm_eth_ag_context xstorm_ag_context; + struct tstorm_eth_ag_context tstorm_ag_context; + struct cstorm_eth_ag_context cstorm_ag_context; + struct ustorm_eth_ag_context ustorm_ag_context; + struct timers_block_context timers_context; + struct xstorm_eth_st_context xstorm_st_context; + struct cstorm_eth_st_context cstorm_st_context; }; @@ -2796,24 +3786,47 @@ union eth_sgl_or_raw_data { }; /* - * regular eth FP CQE parameters struct + * eth FP end aggregation CQE parameters struct $$KEEP_ENDIANNESS$$ + */ +struct eth_end_agg_rx_cqe { + u8 type_error_flags; +#define ETH_END_AGG_RX_CQE_TYPE (0x3<<0) +#define ETH_END_AGG_RX_CQE_TYPE_SHIFT 0 +#define ETH_END_AGG_RX_CQE_SGL_RAW_SEL (0x1<<2) +#define ETH_END_AGG_RX_CQE_SGL_RAW_SEL_SHIFT 2 +#define ETH_END_AGG_RX_CQE_RESERVED0 (0x1F<<3) +#define ETH_END_AGG_RX_CQE_RESERVED0_SHIFT 3 + u8 reserved1; + u8 queue_index; + u8 reserved2; + __le32 timestamp_delta; + __le16 num_of_coalesced_segs; + __le16 pkt_len; + u8 pure_ack_count; + u8 reserved3; + __le16 reserved4; + union eth_sgl_or_raw_data sgl_or_raw_data; + __le32 reserved5[8]; +}; + + +/* + * regular eth FP CQE parameters struct $$KEEP_ENDIANNESS$$ */ struct eth_fast_path_rx_cqe { u8 type_error_flags; -#define ETH_FAST_PATH_RX_CQE_TYPE (0x1<<0) +#define ETH_FAST_PATH_RX_CQE_TYPE (0x3<<0) #define ETH_FAST_PATH_RX_CQE_TYPE_SHIFT 0 -#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG (0x1<<1) -#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT 1 -#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG (0x1<<2) -#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT 2 -#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG (0x1<<3) -#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT 3 -#define ETH_FAST_PATH_RX_CQE_START_FLG (0x1<<4) -#define ETH_FAST_PATH_RX_CQE_START_FLG_SHIFT 4 -#define ETH_FAST_PATH_RX_CQE_END_FLG (0x1<<5) -#define ETH_FAST_PATH_RX_CQE_END_FLG_SHIFT 5 -#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL (0x3<<6) -#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL_SHIFT 6 +#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL (0x1<<2) +#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL_SHIFT 2 +#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG (0x1<<3) +#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT 3 +#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG (0x1<<4) +#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT 4 +#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG (0x1<<5) +#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT 5 +#define ETH_FAST_PATH_RX_CQE_RESERVED0 (0x3<<6) +#define ETH_FAST_PATH_RX_CQE_RESERVED0_SHIFT 6 u8 status_flags; #define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE (0x7<<0) #define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE_SHIFT 0 @@ -2827,19 +3840,20 @@ struct eth_fast_path_rx_cqe { #define ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG_SHIFT 6 #define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG (0x1<<7) #define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG_SHIFT 7 - u8 placement_offset; u8 queue_index; + u8 placement_offset; __le32 rss_hash_result; __le16 vlan_tag; - __le16 pkt_len; + __le16 pkt_len_or_gro_seg_len; __le16 len_on_bd; struct parsing_flags pars_flags; union eth_sgl_or_raw_data sgl_or_raw_data; + __le32 reserved1[8]; }; /* - * Command for setting classification flags for a client + * Command for setting classification flags for a client $$KEEP_ENDIANNESS$$ */ struct eth_filter_rules_cmd { u8 cmd_general_data; @@ -2852,7 +3866,7 @@ struct eth_filter_rules_cmd { u8 func_id; u8 client_id; u8 reserved1; - u16 state; + __le16 state; #define ETH_FILTER_RULES_CMD_UCAST_DROP_ALL (0x1<<0) #define ETH_FILTER_RULES_CMD_UCAST_DROP_ALL_SHIFT 0 #define ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL (0x1<<1) @@ -2869,54 +3883,65 @@ struct eth_filter_rules_cmd { #define ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN_SHIFT 6 #define ETH_FILTER_RULES_CMD_RESERVED2 (0x1FF<<7) #define ETH_FILTER_RULES_CMD_RESERVED2_SHIFT 7 - u16 reserved3; + __le16 reserved3; + struct regpair reserved4; }; /* - * parameters for eth classification filters ramrod + * parameters for eth classification filters ramrod $$KEEP_ENDIANNESS$$ */ struct eth_filter_rules_ramrod_data { struct eth_classify_header header; - struct eth_filter_rules_cmd rules[16]; + struct eth_filter_rules_cmd rules[FILTER_RULES_COUNT]; }; /* - * The data for RSS setup ramrod + * parameters for eth classification configuration ramrod $$KEEP_ENDIANNESS$$ + */ +struct eth_general_rules_ramrod_data { + struct eth_classify_header header; + union eth_classify_rule_cmd rules[CLASSIFY_RULES_COUNT]; +}; + + +/* + * The data for Halt ramrod */ struct eth_halt_ramrod_data { - u32 client_id; - u32 reserved0; + __le32 client_id; + __le32 reserved0; }; /* - * Command for setting multicast classification for a client + * Command for setting multicast classification for a client $$KEEP_ENDIANNESS$$ */ struct eth_multicast_rules_cmd { u8 cmd_general_data; -#define ETH_MULTICAST_RULES_CMD_IS_ADD (0x1<<0) -#define ETH_MULTICAST_RULES_CMD_IS_ADD_SHIFT 0 -#define ETH_MULTICAST_RULES_CMD_RX_CMD (0x1<<1) -#define ETH_MULTICAST_RULES_CMD_RX_CMD_SHIFT 1 -#define ETH_MULTICAST_RULES_CMD_TX_CMD (0x1<<2) -#define ETH_MULTICAST_RULES_CMD_TX_CMD_SHIFT 2 +#define ETH_MULTICAST_RULES_CMD_RX_CMD (0x1<<0) +#define ETH_MULTICAST_RULES_CMD_RX_CMD_SHIFT 0 +#define ETH_MULTICAST_RULES_CMD_TX_CMD (0x1<<1) +#define ETH_MULTICAST_RULES_CMD_TX_CMD_SHIFT 1 +#define ETH_MULTICAST_RULES_CMD_IS_ADD (0x1<<2) +#define ETH_MULTICAST_RULES_CMD_IS_ADD_SHIFT 2 #define ETH_MULTICAST_RULES_CMD_RESERVED0 (0x1F<<3) #define ETH_MULTICAST_RULES_CMD_RESERVED0_SHIFT 3 u8 func_id; u8 bin_id; - u8 reserved1; - u32 reserved2; + u8 engine_id; + __le32 reserved2; + struct regpair reserved3; }; /* - * parameters for multicast classification ramrod + * parameters for multicast classification ramrod $$KEEP_ENDIANNESS$$ */ struct eth_multicast_rules_ramrod_data { struct eth_classify_header header; - struct eth_multicast_rules_cmd rules[16]; + struct eth_multicast_rules_cmd rules[MULTICAST_RULES_COUNT]; }; @@ -2937,77 +3962,61 @@ union eth_ramrod_data { /* - * Common configuration parameters per function in Tstorm + * RSS toeplitz hash type, as reported in CQE */ -struct tstorm_eth_function_common_config { - u16 config_flags; -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY (0x1<<0) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY_SHIFT 0 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY (0x1<<1) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY_SHIFT 1 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY (0x1<<2) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY_SHIFT 2 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY (0x1<<3) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY_SHIFT 3 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE (0x7<<4) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE_SHIFT 4 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_ENABLE_TPA (0x1<<7) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_ENABLE_TPA_SHIFT 7 -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE (0x1<<8) -#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE_SHIFT 8 -#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0 (0x7F<<9) -#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0_SHIFT 9 - u8 rss_result_mask; - u8 reserved1; - u16 vlan_id[2]; -}; - -/* - * RSS idirection table update configuration - */ -struct rss_update_config { - u16 flags; -#define RSS_UPDATE_CONFIG_ETH_UPDATE_ENABLE (0x1<<0) -#define RSS_UPDATE_CONFIG_ETH_UPDATE_ENABLE_SHIFT 0 -#define RSS_UPDATE_CONFIG_TOE_UPDATE_ENABLE (0x1<<1) -#define RSS_UPDATE_CONFIG_TOE_UPDATE_ENABLE_SHIFT 1 -#define __RSS_UPDATE_CONFIG_RESERVED0 (0x3FFF<<2) -#define __RSS_UPDATE_CONFIG_RESERVED0_SHIFT 2 - u16 toe_rss_bitmap; - u32 reserved1; -}; - -/* - * parameters for RSS update ramrod (E1x) - */ -struct eth_rss_update_ramrod_data_e1x { - struct tstorm_eth_function_common_config func_config; - u8 indirection_table[T_ETH_INDIRECTION_TABLE_SIZE]; - struct rss_update_config rss_config; -}; +enum eth_rss_hash_type { + DEFAULT_HASH_TYPE, + IPV4_HASH_TYPE, + TCP_IPV4_HASH_TYPE, + IPV6_HASH_TYPE, + TCP_IPV6_HASH_TYPE, + VLAN_PRI_HASH_TYPE, + E1HOV_PRI_HASH_TYPE, + DSCP_HASH_TYPE, + MAX_ETH_RSS_HASH_TYPE}; /* - * parameters for RSS update ramrod (E2) + * Ethernet RSS mode */ -struct eth_rss_update_ramrod_data_e2 { +enum eth_rss_mode { + ETH_RSS_MODE_DISABLED, + ETH_RSS_MODE_REGULAR, + ETH_RSS_MODE_VLAN_PRI, + ETH_RSS_MODE_E1HOV_PRI, + ETH_RSS_MODE_IP_DSCP, + MAX_ETH_RSS_MODE}; + + +/* + * parameters for RSS update ramrod (E2) $$KEEP_ENDIANNESS$$ + */ +struct eth_rss_update_ramrod_data { + u8 rss_engine_id; u8 capabilities; -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_CAPABILITY (0x1<<0) -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_CAPABILITY_SHIFT 0 -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_TCP_CAPABILITY (0x1<<1) -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_TCP_CAPABILITY_SHIFT 1 -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_CAPABILITY (0x1<<2) -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_CAPABILITY_SHIFT 2 -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_TCP_CAPABILITY (0x1<<3) -#define ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_TCP_CAPABILITY_SHIFT 3 -#define __ETH_RSS_UPDATE_RAMROD_DATA_E2_RESERVED0 (0xF<<4) -#define __ETH_RSS_UPDATE_RAMROD_DATA_E2_RESERVED0_SHIFT 4 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY (0x1<<0) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY_SHIFT 0 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY (0x1<<1) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY_SHIFT 1 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_UDP_CAPABILITY (0x1<<2) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV4_UDP_CAPABILITY_SHIFT 2 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY (0x1<<3) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY_SHIFT 3 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY (0x1<<4) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY_SHIFT 4 +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY (0x1<<5) +#define ETH_RSS_UPDATE_RAMROD_DATA_IPV6_UDP_CAPABILITY_SHIFT 5 +#define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY (0x1<<6) +#define ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY_SHIFT 6 +#define __ETH_RSS_UPDATE_RAMROD_DATA_RESERVED0 (0x1<<7) +#define __ETH_RSS_UPDATE_RAMROD_DATA_RESERVED0_SHIFT 7 u8 rss_result_mask; - u16 reserved1; - u32 __reserved2; + u8 rss_mode; + __le32 __reserved2; u8 indirection_table[T_ETH_INDIRECTION_TABLE_SIZE]; - u32 rss_key[RSS_KEYS_ARRAY_SIZE]; - struct rss_update_config rss_config; + __le32 rss_key[T_ETH_RSS_KEY]; + __le32 echo; + __le32 reserved3; }; @@ -3021,16 +4030,16 @@ struct eth_rx_bd { /* - * Eth Rx Cqe structure- general structure for ramrods + * Eth Rx Cqe structure- general structure for ramrods $$KEEP_ENDIANNESS$$ */ struct common_ramrod_eth_rx_cqe { u8 ramrod_type; -#define COMMON_RAMROD_ETH_RX_CQE_TYPE (0x1<<0) +#define COMMON_RAMROD_ETH_RX_CQE_TYPE (0x3<<0) #define COMMON_RAMROD_ETH_RX_CQE_TYPE_SHIFT 0 -#define COMMON_RAMROD_ETH_RX_CQE_ERROR (0x1<<1) -#define COMMON_RAMROD_ETH_RX_CQE_ERROR_SHIFT 1 -#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0 (0x3F<<2) -#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT 2 +#define COMMON_RAMROD_ETH_RX_CQE_ERROR (0x1<<2) +#define COMMON_RAMROD_ETH_RX_CQE_ERROR_SHIFT 2 +#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0 (0x1F<<3) +#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT 3 u8 conn_type; __le16 reserved1; __le32 conn_and_cmd_data; @@ -3039,7 +4048,8 @@ struct common_ramrod_eth_rx_cqe { #define COMMON_RAMROD_ETH_RX_CQE_CMD_ID (0xFF<<24) #define COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT 24 struct ramrod_data protocol_data; - __le32 reserved2[4]; + __le32 echo; + __le32 reserved2[11]; }; /* @@ -3048,7 +4058,7 @@ struct common_ramrod_eth_rx_cqe { struct eth_rx_cqe_next_page { __le32 addr_lo; __le32 addr_hi; - __le32 reserved[6]; + __le32 reserved[14]; }; /* @@ -3058,9 +4068,30 @@ union eth_rx_cqe { struct eth_fast_path_rx_cqe fast_path_cqe; struct common_ramrod_eth_rx_cqe ramrod_cqe; struct eth_rx_cqe_next_page next_page_cqe; + struct eth_end_agg_rx_cqe end_agg_cqe; }; +/* + * Values for RX ETH CQE type field + */ +enum eth_rx_cqe_type { + RX_ETH_CQE_TYPE_ETH_FASTPATH, + RX_ETH_CQE_TYPE_ETH_RAMROD, + RX_ETH_CQE_TYPE_ETH_START_AGG, + RX_ETH_CQE_TYPE_ETH_STOP_AGG, + MAX_ETH_RX_CQE_TYPE}; + + +/* + * Type of SGL/Raw field in ETH RX fast path CQE + */ +enum eth_rx_fp_sel { + ETH_FP_CQE_REGULAR, + ETH_FP_CQE_RAW, + MAX_ETH_RX_FP_SEL}; + + /* * The eth Rx SGE Descriptor */ @@ -3071,7 +4102,7 @@ struct eth_rx_sge { /* - * common data for all protocols + * common data for all protocols $$KEEP_ENDIANNESS$$ */ struct spe_hdr { __le32 conn_and_cmd_data; @@ -3112,7 +4143,38 @@ struct eth_spe { /* - * Tx regular BD structure + * Ethernet command ID for slow path elements + */ +enum eth_spqe_cmd_id { + RAMROD_CMD_ID_ETH_UNUSED, + RAMROD_CMD_ID_ETH_CLIENT_SETUP, + RAMROD_CMD_ID_ETH_HALT, + RAMROD_CMD_ID_ETH_FORWARD_SETUP, + RAMROD_CMD_ID_ETH_TX_QUEUE_SETUP, + RAMROD_CMD_ID_ETH_CLIENT_UPDATE, + RAMROD_CMD_ID_ETH_EMPTY, + RAMROD_CMD_ID_ETH_TERMINATE, + RAMROD_CMD_ID_ETH_TPA_UPDATE, + RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES, + RAMROD_CMD_ID_ETH_FILTER_RULES, + RAMROD_CMD_ID_ETH_MULTICAST_RULES, + RAMROD_CMD_ID_ETH_RSS_UPDATE, + RAMROD_CMD_ID_ETH_SET_MAC, + MAX_ETH_SPQE_CMD_ID}; + + +/* + * eth tpa update command + */ +enum eth_tpa_update_command { + TPA_UPDATE_NONE_COMMAND, + TPA_UPDATE_ENABLE_COMMAND, + TPA_UPDATE_DISABLE_COMMAND, + MAX_ETH_TPA_UPDATE_COMMAND}; + + +/* + * Tx regular BD structure $$KEEP_ENDIANNESS$$ */ struct eth_tx_bd { __le32 addr_lo; @@ -3145,7 +4207,7 @@ struct eth_tx_bd_flags { }; /* - * The eth Tx Buffer Descriptor + * The eth Tx Buffer Descriptor $$KEEP_ENDIANNESS$$ */ struct eth_tx_start_bd { __le32 addr_lo; @@ -3155,14 +4217,18 @@ struct eth_tx_start_bd { __le16 vlan_or_ethertype; struct eth_tx_bd_flags bd_flags; u8 general_data; -#define ETH_TX_START_BD_HDR_NBDS (0x3F<<0) +#define ETH_TX_START_BD_HDR_NBDS (0xF<<0) #define ETH_TX_START_BD_HDR_NBDS_SHIFT 0 +#define ETH_TX_START_BD_FORCE_VLAN_MODE (0x1<<4) +#define ETH_TX_START_BD_FORCE_VLAN_MODE_SHIFT 4 +#define ETH_TX_START_BD_RESREVED (0x1<<5) +#define ETH_TX_START_BD_RESREVED_SHIFT 5 #define ETH_TX_START_BD_ETH_ADDR_TYPE (0x3<<6) #define ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT 6 }; /* - * Tx parsing BD structure for ETH E1/E1h + * Tx parsing BD structure for ETH E1/E1h $$KEEP_ENDIANNESS$$ */ struct eth_tx_parse_bd_e1x { u8 global_data; @@ -3203,7 +4269,7 @@ struct eth_tx_parse_bd_e1x { }; /* - * Tx parsing BD structure for ETH E2 + * Tx parsing BD structure for ETH E2 $$KEEP_ENDIANNESS$$ */ struct eth_tx_parse_bd_e2 { __le16 dst_mac_addr_lo; @@ -3252,17 +4318,38 @@ struct eth_tx_bds_array { /* - * MAC filtering configuration command header + * VLAN mode on TX BDs + */ +enum eth_tx_vlan_type { + X_ETH_NO_VLAN, + X_ETH_OUTBAND_VLAN, + X_ETH_INBAND_VLAN, + X_ETH_FW_ADDED_VLAN, + MAX_ETH_TX_VLAN_TYPE}; + + +/* + * Ethernet VLAN filtering mode in E1x + */ +enum eth_vlan_filter_mode { + ETH_VLAN_FILTER_ANY_VLAN, + ETH_VLAN_FILTER_SPECIFIC_VLAN, + ETH_VLAN_FILTER_CLASSIFY, + MAX_ETH_VLAN_FILTER_MODE}; + + +/* + * MAC filtering configuration command header $$KEEP_ENDIANNESS$$ */ struct mac_configuration_hdr { u8 length; u8 offset; - u16 client_id; - u32 echo; + __le16 client_id; + __le32 echo; }; /* - * MAC address in list for ramrod + * MAC address in list for ramrod $$KEEP_ENDIANNESS$$ */ struct mac_configuration_entry { __le16 lsb_mac_addr; @@ -3283,8 +4370,8 @@ struct mac_configuration_entry { #define MAC_CONFIGURATION_ENTRY_BROADCAST_SHIFT 5 #define MAC_CONFIGURATION_ENTRY_RESERVED1 (0x3<<6) #define MAC_CONFIGURATION_ENTRY_RESERVED1_SHIFT 6 - u16 reserved0; - u32 clients_bit_vector; + __le16 reserved0; + __le32 clients_bit_vector; }; /* @@ -3296,6 +4383,45 @@ struct mac_configuration_cmd { }; +/* + * Set-MAC command type (in E1x) + */ +enum set_mac_action_type { + T_ETH_MAC_COMMAND_INVALIDATE, + T_ETH_MAC_COMMAND_SET, + MAX_SET_MAC_ACTION_TYPE}; + + +/* + * Ethernet TPA Modes + */ +enum tpa_mode { + TPA_LRO, + TPA_GRO, + MAX_TPA_MODE}; + + +/* + * tpa update ramrod data $$KEEP_ENDIANNESS$$ + */ +struct tpa_update_ramrod_data { + u8 update_ipv4; + u8 update_ipv6; + u8 client_id; + u8 max_tpa_queues; + u8 max_sges_for_packet; + u8 complete_on_both_clients; + u8 dont_verify_rings_pause_thr_flg; + u8 tpa_mode; + __le16 sge_buff_size; + __le16 max_agg_size; + __le32 sge_page_base_lo; + __le32 sge_page_base_hi; + __le16 sge_pause_thr_low; + __le16 sge_pause_thr_high; +}; + + /* * approximate-match multicast filtering for E1H per function in Tstorm */ @@ -3305,35 +4431,50 @@ struct tstorm_eth_approximate_match_multicast_filtering { /* - * MAC filtering configuration parameters per port in Tstorm + * Common configuration parameters per function in Tstorm $$KEEP_ENDIANNESS$$ */ -struct tstorm_eth_mac_filter_config { - u32 ucast_drop_all; - u32 ucast_accept_all; - u32 mcast_drop_all; - u32 mcast_accept_all; - u32 bcast_drop_all; - u32 bcast_accept_all; - u32 vlan_filter[2]; - u32 unmatched_unicast; - u32 reserved; +struct tstorm_eth_function_common_config { + __le16 config_flags; +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY (0x1<<0) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY_SHIFT 0 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY (0x1<<1) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY_SHIFT 1 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY (0x1<<2) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY_SHIFT 2 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY (0x1<<3) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY_SHIFT 3 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE (0x7<<4) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE_SHIFT 4 +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE (0x1<<7) +#define TSTORM_ETH_FUNCTION_COMMON_CONFIG_VLAN_FILTERING_ENABLE_SHIFT 7 +#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0 (0xFF<<8) +#define __TSTORM_ETH_FUNCTION_COMMON_CONFIG_RESERVED0_SHIFT 8 + u8 rss_result_mask; + u8 reserved1; + __le16 vlan_id[2]; }; /* - * common flag to indicate existance of TPA. + * MAC filtering configuration parameters per port in Tstorm $$KEEP_ENDIANNESS$$ */ -struct tstorm_eth_tpa_exist { -#if defined(__BIG_ENDIAN) - u16 reserved1; - u8 reserved0; - u8 tpa_exist; -#elif defined(__LITTLE_ENDIAN) - u8 tpa_exist; - u8 reserved0; - u16 reserved1; -#endif - u32 reserved2; +struct tstorm_eth_mac_filter_config { + __le32 ucast_drop_all; + __le32 ucast_accept_all; + __le32 mcast_drop_all; + __le32 mcast_accept_all; + __le32 bcast_accept_all; + __le32 vlan_filter[2]; + __le32 unmatched_unicast; +}; + + +/* + * tx only queue init ramrod data $$KEEP_ENDIANNESS$$ + */ +struct tx_queue_init_ramrod_data { + struct client_init_general_data general; + struct client_init_tx_data tx; }; @@ -3359,7 +4500,74 @@ struct ustorm_eth_rx_producers { /* - * cfc delete event data + * FCoE RX statistics parameters section#0 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section0 { + __le32 fcoe_rx_pkt_cnt; + __le32 fcoe_rx_byte_cnt; +}; + + +/* + * FCoE RX statistics parameters section#1 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section1 { + __le32 fcoe_ver_cnt; + __le32 fcoe_rx_drop_pkt_cnt; +}; + + +/* + * FCoE RX statistics parameters section#2 $$KEEP_ENDIANNESS$$ + */ +struct fcoe_rx_stat_params_section2 { + __le32 fc_crc_cnt; + __le32 eofa_del_cnt; + __le32 miss_frame_cnt; + __le32 seq_timeout_cnt; + __le32 drop_seq_cnt; + __le32 fcoe_rx_drop_pkt_cnt; + __le32 fcp_rx_pkt_cnt; + __le32 reserved0; +}; + + +/* + * FCoE TX statistics parameters $$KEEP_ENDIANNESS$$ + */ +struct fcoe_tx_stat_params { + __le32 fcoe_tx_pkt_cnt; + __le32 fcoe_tx_byte_cnt; + __le32 fcp_tx_pkt_cnt; + __le32 reserved0; +}; + +/* + * FCoE statistics parameters $$KEEP_ENDIANNESS$$ + */ +struct fcoe_statistics_params { + struct fcoe_tx_stat_params tx_stat; + struct fcoe_rx_stat_params_section0 rx_stat0; + struct fcoe_rx_stat_params_section1 rx_stat1; + struct fcoe_rx_stat_params_section2 rx_stat2; +}; + + +/* + * The data afex vif list ramrod need $$KEEP_ENDIANNESS$$ + */ +struct afex_vif_list_ramrod_data { + u8 afex_vif_list_command; + u8 func_bit_map; + __le16 vif_list_index; + u8 func_to_clear; + u8 echo; + __le16 reserved1; +}; + + +/* + * cfc delete event data $$KEEP_ENDIANNESS$$ */ struct cfc_del_event_data { u32 cid; @@ -3372,22 +4580,18 @@ struct cfc_del_event_data { * per-port SAFC demo variables */ struct cmng_flags_per_port { - u8 con_number[NUM_OF_PROTOCOLS]; u32 cmng_enables; #define CMNG_FLAGS_PER_PORT_FAIRNESS_VN (0x1<<0) #define CMNG_FLAGS_PER_PORT_FAIRNESS_VN_SHIFT 0 #define CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN (0x1<<1) #define CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN_SHIFT 1 -#define CMNG_FLAGS_PER_PORT_FAIRNESS_PROTOCOL (0x1<<2) -#define CMNG_FLAGS_PER_PORT_FAIRNESS_PROTOCOL_SHIFT 2 -#define CMNG_FLAGS_PER_PORT_RATE_SHAPING_PROTOCOL (0x1<<3) -#define CMNG_FLAGS_PER_PORT_RATE_SHAPING_PROTOCOL_SHIFT 3 -#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS (0x1<<4) -#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_SHIFT 4 -#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE (0x1<<5) -#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE_SHIFT 5 -#define __CMNG_FLAGS_PER_PORT_RESERVED0 (0x3FFFFFF<<6) -#define __CMNG_FLAGS_PER_PORT_RESERVED0_SHIFT 6 +#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS (0x1<<2) +#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_SHIFT 2 +#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE (0x1<<3) +#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE_SHIFT 3 +#define __CMNG_FLAGS_PER_PORT_RESERVED0 (0xFFFFFFF<<4) +#define __CMNG_FLAGS_PER_PORT_RESERVED0_SHIFT 4 + u32 __reserved1; }; @@ -3406,6 +4610,7 @@ struct fairness_vars_per_port { u32 upper_bound; u32 fair_threshold; u32 fairness_timeout; + u32 reserved0; }; /* @@ -3422,42 +4627,9 @@ struct safc_struct_per_port { u16 __reserved1; #endif u8 cos_to_traffic_types[MAX_COS_NUMBER]; - u32 __reserved2; u16 cos_to_pause_mask[NUM_OF_SAFC_BITS]; }; -/* - * per-port PFC variables - */ -struct pfc_struct_per_port { - u8 priority_to_traffic_types[MAX_PFC_PRIORITIES]; -#if defined(__BIG_ENDIAN) - u16 pfc_pause_quanta_in_nanosec; - u8 __reserved0; - u8 priority_non_pausable_mask; -#elif defined(__LITTLE_ENDIAN) - u8 priority_non_pausable_mask; - u8 __reserved0; - u16 pfc_pause_quanta_in_nanosec; -#endif -}; - -/* - * Priority and cos - */ -struct priority_cos { -#if defined(__BIG_ENDIAN) - u16 reserved1; - u8 cos; - u8 priority; -#elif defined(__LITTLE_ENDIAN) - u8 priority; - u8 cos; - u16 reserved1; -#endif - u32 reserved2; -}; - /* * Per-port congestion management variables */ @@ -3465,20 +4637,111 @@ struct cmng_struct_per_port { struct rate_shaping_vars_per_port rs_vars; struct fairness_vars_per_port fair_vars; struct safc_struct_per_port safc_vars; - struct pfc_struct_per_port pfc_vars; -#if defined(__BIG_ENDIAN) - u16 __reserved1; - u8 dcb_enabled; - u8 llfc_mode; -#elif defined(__LITTLE_ENDIAN) - u8 llfc_mode; - u8 dcb_enabled; - u16 __reserved1; -#endif - struct priority_cos traffic_type_to_priority_cos[MAX_PFC_TRAFFIC_TYPES]; struct cmng_flags_per_port flags; }; +/* + * a single rate shaping counter. can be used as protocol or vnic counter + */ +struct rate_shaping_counter { + u32 quota; +#if defined(__BIG_ENDIAN) + u16 __reserved0; + u16 rate; +#elif defined(__LITTLE_ENDIAN) + u16 rate; + u16 __reserved0; +#endif +}; + +/* + * per-vnic rate shaping variables + */ +struct rate_shaping_vars_per_vn { + struct rate_shaping_counter vn_counter; +}; + +/* + * per-vnic fairness variables + */ +struct fairness_vars_per_vn { + u32 cos_credit_delta[MAX_COS_NUMBER]; + u32 vn_credit_delta; + u32 __reserved0; +}; + +/* + * cmng port init state + */ +struct cmng_vnic { + struct rate_shaping_vars_per_vn vnic_max_rate[4]; + struct fairness_vars_per_vn vnic_min_rate[4]; +}; + +/* + * cmng port init state + */ +struct cmng_init { + struct cmng_struct_per_port port; + struct cmng_vnic vnic; +}; + + +/* + * driver parameters for congestion management init, all rates are in Mbps + */ +struct cmng_init_input { + u32 port_rate; + u16 vnic_min_rate[4]; + u16 vnic_max_rate[4]; + u16 cos_min_rate[MAX_COS_NUMBER]; + u16 cos_to_pause_mask[MAX_COS_NUMBER]; + struct cmng_flags_per_port flags; +}; + + +/* + * Protocol-common command ID for slow path elements + */ +enum common_spqe_cmd_id { + RAMROD_CMD_ID_COMMON_UNUSED, + RAMROD_CMD_ID_COMMON_FUNCTION_START, + RAMROD_CMD_ID_COMMON_FUNCTION_STOP, + RAMROD_CMD_ID_COMMON_FUNCTION_UPDATE, + RAMROD_CMD_ID_COMMON_CFC_DEL, + RAMROD_CMD_ID_COMMON_CFC_DEL_WB, + RAMROD_CMD_ID_COMMON_STAT_QUERY, + RAMROD_CMD_ID_COMMON_STOP_TRAFFIC, + RAMROD_CMD_ID_COMMON_START_TRAFFIC, + RAMROD_CMD_ID_COMMON_AFEX_VIF_LISTS, + MAX_COMMON_SPQE_CMD_ID}; + + +/* + * Per-protocol connection types + */ +enum connection_type { + ETH_CONNECTION_TYPE, + TOE_CONNECTION_TYPE, + RDMA_CONNECTION_TYPE, + ISCSI_CONNECTION_TYPE, + FCOE_CONNECTION_TYPE, + RESERVED_CONNECTION_TYPE_0, + RESERVED_CONNECTION_TYPE_1, + RESERVED_CONNECTION_TYPE_2, + NONE_CONNECTION_TYPE, + MAX_CONNECTION_TYPE}; + + +/* + * Cos modes + */ +enum cos_mode { + OVERRIDE_COS, + STATIC_COS, + FW_WRR, + MAX_COS_MODE}; + /* * Dynamic HC counters set by the driver @@ -3544,9 +4807,9 @@ struct cstorm_vf_zone_data { /* - * Dynamic host coalescing init parameters + * Dynamic host coalescing init parameters, per state machine */ -struct dynamic_hc_config { +struct dynamic_hc_sm_config { u32 threshold[3]; u8 shift_per_protocol[HC_SB_MAX_DYNAMIC_INDICES]; u8 hc_timeout0[HC_SB_MAX_DYNAMIC_INDICES]; @@ -3555,6 +4818,13 @@ struct dynamic_hc_config { u8 hc_timeout3[HC_SB_MAX_DYNAMIC_INDICES]; }; +/* + * Dynamic host coalescing init parameters + */ +struct dynamic_hc_config { + struct dynamic_hc_sm_config sm_config[HC_SB_MAX_SM]; +}; + struct e2_integ_data { #if defined(__BIG_ENDIAN) @@ -3605,7 +4875,17 @@ struct e2_integ_data { /* - * pf-vf event data + * set mac event data $$KEEP_ENDIANNESS$$ + */ +struct eth_event_data { + u32 echo; + u32 reserved0; + u32 reserved1; +}; + + +/* + * pf-vf event data $$KEEP_ENDIANNESS$$ */ struct vf_pf_event_data { u8 vf_id; @@ -3616,16 +4896,7 @@ struct vf_pf_event_data { }; /* - * set mac event data - */ -struct set_mac_event_data { - u32 echo; - u32 reserved0; - u32 reserved1; -}; - -/* - * VF FLR event data + * VF FLR event data $$KEEP_ENDIANNESS$$ */ struct vf_flr_event_data { u8 vf_id; @@ -3636,7 +4907,7 @@ struct vf_flr_event_data { }; /* - * malicious VF event data + * malicious VF event data $$KEEP_ENDIANNESS$$ */ struct malicious_vf_event_data { u8 vf_id; @@ -3646,15 +4917,27 @@ struct malicious_vf_event_data { u32 reserved3; }; +/* + * vif list event data $$KEEP_ENDIANNESS$$ + */ +struct vif_list_event_data { + u8 func_bit_map; + u8 echo; + __le16 reserved0; + __le32 reserved1; + __le32 reserved2; +}; + /* * union for all event ring message types */ union event_data { struct vf_pf_event_data vf_pf_event; - struct set_mac_event_data set_mac_event; + struct eth_event_data eth_event; struct cfc_del_event_data cfc_del_event; struct vf_flr_event_data vf_flr_event; struct malicious_vf_event_data malicious_vf_event; + struct vif_list_event_data vif_list_event; }; @@ -3677,7 +4960,7 @@ struct event_ring_data { /* - * event ring message element (each element is 128 bits) + * event ring message element (each element is 128 bits) $$KEEP_ENDIANNESS$$ */ struct event_ring_msg { u8 opcode; @@ -3704,31 +4987,88 @@ union event_ring_elem { /* - * per-vnic fairness variables + * Common event ring opcodes */ -struct fairness_vars_per_vn { - u32 cos_credit_delta[MAX_COS_NUMBER]; - u32 protocol_credit_delta[NUM_OF_PROTOCOLS]; - u32 vn_credit_delta; - u32 __reserved0; +enum event_ring_opcode { + EVENT_RING_OPCODE_VF_PF_CHANNEL, + EVENT_RING_OPCODE_FUNCTION_START, + EVENT_RING_OPCODE_FUNCTION_STOP, + EVENT_RING_OPCODE_CFC_DEL, + EVENT_RING_OPCODE_CFC_DEL_WB, + EVENT_RING_OPCODE_STAT_QUERY, + EVENT_RING_OPCODE_STOP_TRAFFIC, + EVENT_RING_OPCODE_START_TRAFFIC, + EVENT_RING_OPCODE_VF_FLR, + EVENT_RING_OPCODE_MALICIOUS_VF, + EVENT_RING_OPCODE_FORWARD_SETUP, + EVENT_RING_OPCODE_RSS_UPDATE_RULES, + EVENT_RING_OPCODE_FUNCTION_UPDATE, + EVENT_RING_OPCODE_AFEX_VIF_LISTS, + EVENT_RING_OPCODE_SET_MAC, + EVENT_RING_OPCODE_CLASSIFICATION_RULES, + EVENT_RING_OPCODE_FILTERS_RULES, + EVENT_RING_OPCODE_MULTICAST_RULES, + MAX_EVENT_RING_OPCODE}; + + +/* + * Modes for fairness algorithm + */ +enum fairness_mode { + FAIRNESS_COS_WRR_MODE, + FAIRNESS_COS_ETS_MODE, + MAX_FAIRNESS_MODE}; + + +/* + * Priority and cos $$KEEP_ENDIANNESS$$ + */ +struct priority_cos { + u8 priority; + u8 cos; + __le16 reserved1; +}; + +/* + * The data for flow control configuration $$KEEP_ENDIANNESS$$ + */ +struct flow_control_configuration { + struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES]; + u8 dcb_enabled; + u8 dcb_version; + u8 dont_add_pri_0_en; + u8 reserved1; + __le32 reserved2; }; /* - * The data for flow control configuration + * $$KEEP_ENDIANNESS$$ */ -struct flow_control_configuration { - struct priority_cos traffic_type_to_priority_cos[MAX_PFC_TRAFFIC_TYPES]; -#if defined(__BIG_ENDIAN) - u16 reserved1; - u8 dcb_version; - u8 dcb_enabled; -#elif defined(__LITTLE_ENDIAN) - u8 dcb_enabled; - u8 dcb_version; - u16 reserved1; -#endif - u32 reserved2; +struct function_start_data { + __le16 function_mode; + __le16 sd_vlan_tag; + __le16 vif_id; + u8 path_id; + u8 network_cos_mode; +}; + + +/* + * $$KEEP_ENDIANNESS$$ + */ +struct function_update_data { + u8 vif_id_change_flg; + u8 afex_default_vlan_change_flg; + u8 allowed_priorities_change_flg; + u8 network_cos_mode_change_flg; + __le16 vif_id; + __le16 afex_default_vlan; + u8 allowed_priorities; + u8 network_cos_mode; + u8 lb_mode_en; + u8 reserved0; + __le32 reserved1; }; @@ -3760,7 +5100,7 @@ struct fw_version { /* - * Dynamic Host-Coalescing - Driver(host) counters + * Dynamic Host-Coalescing - Driver(host) counters */ struct hc_dynamic_sb_drv_counters { u32 dynamic_hc_drv_counter[HC_SB_MAX_DYNAMIC_INDICES]; @@ -3841,32 +5181,43 @@ struct hc_sb_data { struct pci_entity p_func; #if defined(__BIG_ENDIAN) u8 rsrv0; + u8 state; u8 dhc_qzone_id; - u8 __dynamic_hc_level; u8 same_igu_sb_1b; #elif defined(__LITTLE_ENDIAN) u8 same_igu_sb_1b; - u8 __dynamic_hc_level; u8 dhc_qzone_id; + u8 state; u8 rsrv0; #endif struct regpair rsrv1[2]; }; +/* + * Segment types for host coaslescing + */ +enum hc_segment { + HC_REGULAR_SEGMENT, + HC_DEFAULT_SEGMENT, + MAX_HC_SEGMENT}; + + /* * The fast-path status block meta-data */ struct hc_sp_status_block_data { struct regpair host_sb_addr; #if defined(__BIG_ENDIAN) - u16 rsrv; + u8 rsrv1; + u8 state; u8 igu_seg_id; u8 igu_sb_id; #elif defined(__LITTLE_ENDIAN) u8 igu_sb_id; u8 igu_seg_id; - u16 rsrv; + u8 state; + u8 rsrv1; #endif struct pci_entity p_func; }; @@ -3891,14 +5242,43 @@ struct hc_status_block_data_e2 { /* - * Protocol-common statistics collected by the Tstorm (per pf) + * IGU block operartion modes (in Everest2) + */ +enum igu_mode { + HC_IGU_BC_MODE, + HC_IGU_NBC_MODE, + MAX_IGU_MODE}; + + +/* + * IP versions + */ +enum ip_ver { + IP_V4, + IP_V6, + MAX_IP_VER}; + + +/* + * Multi-function modes + */ +enum mf_mode { + SINGLE_FUNCTION, + MULTI_FUNCTION_SD, + MULTI_FUNCTION_SI, + MULTI_FUNCTION_AFEX, + MAX_MF_MODE}; + + +/* + * Protocol-common statistics collected by the Tstorm (per pf) $$KEEP_ENDIANNESS$$ */ struct tstorm_per_pf_stats { struct regpair rcv_error_bytes; }; /* - * + * $$KEEP_ENDIANNESS$$ */ struct per_pf_stats { struct tstorm_per_pf_stats tstorm_pf_statistics; @@ -3906,17 +5286,19 @@ struct per_pf_stats { /* - * Protocol-common statistics collected by the Tstorm (per port) + * Protocol-common statistics collected by the Tstorm (per port) $$KEEP_ENDIANNESS$$ */ struct tstorm_per_port_stats { __le32 mac_discard; __le32 mac_filter_discard; __le32 brb_truncate_discard; - __le32 outer_vlan_discard; + __le32 mf_tag_discard; + __le32 packet_drop; + __le32 reserved; }; /* - * + * $$KEEP_ENDIANNESS$$ */ struct per_port_stats { struct tstorm_per_port_stats tstorm_port_statistics; @@ -3924,7 +5306,7 @@ struct per_port_stats { /* - * Protocol-common statistics collected by the Tstorm (per client) + * Protocol-common statistics collected by the Tstorm (per client) $$KEEP_ENDIANNESS$$ */ struct tstorm_per_queue_stats { struct regpair rcv_ucast_bytes; @@ -3942,7 +5324,7 @@ struct tstorm_per_queue_stats { }; /* - * Protocol-common statistics collected by the Ustorm (per client) + * Protocol-common statistics collected by the Ustorm (per client) $$KEEP_ENDIANNESS$$ */ struct ustorm_per_queue_stats { struct regpair ucast_no_buff_bytes; @@ -3951,11 +5333,14 @@ struct ustorm_per_queue_stats { __le32 ucast_no_buff_pkts; __le32 mcast_no_buff_pkts; __le32 bcast_no_buff_pkts; - __le32 reserved; + __le32 coalesced_pkts; + struct regpair coalesced_bytes; + __le32 coalesced_events; + __le32 coalesced_aborts; }; /* - * Protocol-common statistics collected by the Xstorm (per client) + * Protocol-common statistics collected by the Xstorm (per client) $$KEEP_ENDIANNESS$$ */ struct xstorm_per_queue_stats { struct regpair ucast_bytes_sent; @@ -3968,7 +5353,7 @@ struct xstorm_per_queue_stats { }; /* - * + * $$KEEP_ENDIANNESS$$ */ struct per_queue_stats { struct tstorm_per_queue_stats tstorm_queue_statistics; @@ -3978,7 +5363,7 @@ struct per_queue_stats { /* - * FW version stored in first line of pram + * FW version stored in first line of pram $$KEEP_ENDIANNESS$$ */ struct pram_fw_version { u8 major; @@ -4006,6 +5391,7 @@ union protocol_common_specific_data { u8 protocol_data[8]; struct regpair phy_address; struct regpair mac_config_addr; + struct afex_vif_list_ramrod_data afex_vif_list_data; }; /* @@ -4017,30 +5403,6 @@ struct protocol_common_spe { }; -/* - * a single rate shaping counter. can be used as protocol or vnic counter - */ -struct rate_shaping_counter { - u32 quota; -#if defined(__BIG_ENDIAN) - u16 __reserved0; - u16 rate; -#elif defined(__LITTLE_ENDIAN) - u16 rate; - u16 __reserved0; -#endif -}; - - -/* - * per-vnic rate shaping variables - */ -struct rate_shaping_vars_per_vn { - struct rate_shaping_counter protocol_counters[NUM_OF_PROTOCOLS]; - struct rate_shaping_counter vn_counter; -}; - - /* * The send queue element */ @@ -4051,18 +5413,26 @@ struct slow_path_element { /* - * Protocol-common statistics counter + * Protocol-common statistics counter $$KEEP_ENDIANNESS$$ */ struct stats_counter { __le16 xstats_counter; + __le16 reserved0; + __le32 reserved1; __le16 tstats_counter; + __le16 reserved2; + __le32 reserved3; __le16 ustats_counter; + __le16 reserved4; + __le32 reserved5; __le16 cstats_counter; + __le16 reserved6; + __le32 reserved7; }; /* - * + * $$KEEP_ENDIANNESS$$ */ struct stats_query_entry { u8 kind; @@ -4073,7 +5443,7 @@ struct stats_query_entry { }; /* - * statistic command + * statistic command $$KEEP_ENDIANNESS$$ */ struct stats_query_cmd_group { struct stats_query_entry query[STATS_QUERY_CMD_COUNT]; @@ -4081,7 +5451,7 @@ struct stats_query_cmd_group { /* - * statistic command header + * statistic command header $$KEEP_ENDIANNESS$$ */ struct stats_query_header { u8 cmd_num; @@ -4093,31 +5463,47 @@ struct stats_query_header { /* - * per-port PFC variables + * Types of statistcis query entry */ -struct storm_pfc_struct_per_port { -#if defined(__BIG_ENDIAN) - u16 mid_mac_addr; - u16 msb_mac_addr; -#elif defined(__LITTLE_ENDIAN) - u16 msb_mac_addr; - u16 mid_mac_addr; -#endif -#if defined(__BIG_ENDIAN) - u16 pfc_pause_quanta_in_nanosec; - u16 lsb_mac_addr; -#elif defined(__LITTLE_ENDIAN) - u16 lsb_mac_addr; - u16 pfc_pause_quanta_in_nanosec; -#endif -}; +enum stats_query_type { + STATS_TYPE_QUEUE, + STATS_TYPE_PORT, + STATS_TYPE_PF, + STATS_TYPE_TOE, + STATS_TYPE_FCOE, + MAX_STATS_QUERY_TYPE}; + /* - * Per-port congestion management variables + * Indicate of the function status block state */ -struct storm_cmng_struct_per_port { - struct storm_pfc_struct_per_port pfc_vars; -}; +enum status_block_state { + SB_DISABLED, + SB_ENABLED, + SB_CLEANED, + MAX_STATUS_BLOCK_STATE}; + + +/* + * Storm IDs (including attentions for IGU related enums) + */ +enum storm_id { + USTORM_ID, + CSTORM_ID, + XSTORM_ID, + TSTORM_ID, + ATTENTION_ID, + MAX_STORM_ID}; + + +/* + * Taffic types used in ETS and flow control algorithms + */ +enum traffic_type { + LLFC_TRAFFIC_TYPE_NW, + LLFC_TRAFFIC_TYPE_FCOE, + LLFC_TRAFFIC_TYPE_ISCSI, + MAX_TRAFFIC_TYPE}; /* @@ -4170,6 +5556,26 @@ struct vf_pf_channel_data { }; +/* + * State of VF-PF channel + */ +enum vf_pf_channel_state { + VF_PF_CHANNEL_STATE_READY, + VF_PF_CHANNEL_STATE_WAITING_FOR_ACK, + MAX_VF_PF_CHANNEL_STATE}; + + +/* + * vif_list_rule_kind + */ +enum vif_list_rule_kind { + VIF_LIST_RULE_SET, + VIF_LIST_RULE_GET, + VIF_LIST_RULE_CLEAR_ALL, + VIF_LIST_RULE_CLEAR_FUNC, + MAX_VIF_LIST_RULE_KIND}; + + /* * zone A per-queue data */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init.h index 937c23d..ac36a60 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init.h @@ -1,7 +1,7 @@ /* bnx2x_init.h: Broadcom Everest network driver. * Structures and macroes needed during the initialization. * - * Copyright (c) 2007-2011 Broadcom Corporation + * Copyright (c) 2007-2012 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -15,98 +15,40 @@ #ifndef BNX2X_INIT_H #define BNX2X_INIT_H -/* RAM0 size in bytes */ -#define STORM_INTMEM_SIZE_E1 0x5800 -#define STORM_INTMEM_SIZE_E1H 0x10000 -#define STORM_INTMEM_SIZE(bp) ((CHIP_IS_E1(bp) ? STORM_INTMEM_SIZE_E1 : \ - STORM_INTMEM_SIZE_E1H) / 4) - +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +*/ /* Init operation types and structures */ -/* Common for both E1 and E1H */ -#define OP_RD 0x1 /* read single register */ -#define OP_WR 0x2 /* write single register */ -#define OP_IW 0x3 /* write single register using mailbox */ -#define OP_SW 0x4 /* copy a string to the device */ -#define OP_SI 0x5 /* copy a string using mailbox */ -#define OP_ZR 0x6 /* clear memory */ -#define OP_ZP 0x7 /* unzip then copy with DMAE */ -#define OP_WR_64 0x8 /* write 64 bit pattern */ -#define OP_WB 0x9 /* copy a string using DMAE */ - -/* FPGA and EMUL specific operations */ -#define OP_WR_EMUL 0xa /* write single register on Emulation */ -#define OP_WR_FPGA 0xb /* write single register on FPGA */ -#define OP_WR_ASIC 0xc /* write single register on ASIC */ - -/* Init stages */ -/* Never reorder stages !!! */ -#define COMMON_STAGE 0 -#define PORT0_STAGE 1 -#define PORT1_STAGE 2 -#define FUNC0_STAGE 3 -#define FUNC1_STAGE 4 -#define FUNC2_STAGE 5 -#define FUNC3_STAGE 6 -#define FUNC4_STAGE 7 -#define FUNC5_STAGE 8 -#define FUNC6_STAGE 9 -#define FUNC7_STAGE 10 -#define STAGE_IDX_MAX 11 - -#define STAGE_START 0 -#define STAGE_END 1 - - -/* Indices of blocks */ -#define PRS_BLOCK 0 -#define SRCH_BLOCK 1 -#define TSDM_BLOCK 2 -#define TCM_BLOCK 3 -#define BRB1_BLOCK 4 -#define TSEM_BLOCK 5 -#define PXPCS_BLOCK 6 -#define EMAC0_BLOCK 7 -#define EMAC1_BLOCK 8 -#define DBU_BLOCK 9 -#define MISC_BLOCK 10 -#define DBG_BLOCK 11 -#define NIG_BLOCK 12 -#define MCP_BLOCK 13 -#define UPB_BLOCK 14 -#define CSDM_BLOCK 15 -#define USDM_BLOCK 16 -#define CCM_BLOCK 17 -#define UCM_BLOCK 18 -#define USEM_BLOCK 19 -#define CSEM_BLOCK 20 -#define XPB_BLOCK 21 -#define DQ_BLOCK 22 -#define TIMERS_BLOCK 23 -#define XSDM_BLOCK 24 -#define QM_BLOCK 25 -#define PBF_BLOCK 26 -#define XCM_BLOCK 27 -#define XSEM_BLOCK 28 -#define CDU_BLOCK 29 -#define DMAE_BLOCK 30 -#define PXP_BLOCK 31 -#define CFC_BLOCK 32 -#define HC_BLOCK 33 -#define PXP2_BLOCK 34 -#define MISC_AEU_BLOCK 35 -#define PGLUE_B_BLOCK 36 -#define IGU_BLOCK 37 -#define ATC_BLOCK 38 -#define QM_4PORT_BLOCK 39 -#define XSEM_4PORT_BLOCK 40 +enum { + OP_RD = 0x1, /* read a single register */ + OP_WR, /* write a single register */ + OP_SW, /* copy a string to the device */ + OP_ZR, /* clear memory */ + OP_ZP, /* unzip then copy with DMAE */ + OP_WR_64, /* write 64 bit pattern */ + OP_WB, /* copy a string using DMAE */ + OP_WB_ZR, /* Clear a string using DMAE or indirect-wr */ + OP_IF_MODE_OR, /* Skip the following ops if all init modes don't match */ + OP_IF_MODE_AND, /* Skip the following ops if any init modes don't match */ + OP_MAX +}; +enum { + STAGE_START, + STAGE_END, +}; /* Returns the index of start or end of a specific block stage in ops array*/ #define BLOCK_OPS_IDX(block, stage, end) \ - (2*(((block)*STAGE_IDX_MAX) + (stage)) + (end)) + (2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end)) +/* structs for the various opcodes */ struct raw_op { u32 op:8; u32 offset:24; @@ -116,7 +58,7 @@ struct raw_op { struct op_read { u32 op:8; u32 offset:24; - u32 pad; + u32 val; }; struct op_write { @@ -125,15 +67,15 @@ struct op_write { u32 val; }; -struct op_string_write { +struct op_arr_write { u32 op:8; u32 offset:24; -#ifdef __LITTLE_ENDIAN - u16 data_off; - u16 data_len; -#else /* __BIG_ENDIAN */ +#ifdef __BIG_ENDIAN u16 data_len; u16 data_off; +#else /* __LITTLE_ENDIAN */ + u16 data_off; + u16 data_len; #endif }; @@ -143,14 +85,435 @@ struct op_zero { u32 len; }; +struct op_if_mode { + u32 op:8; + u32 cmd_offset:24; + u32 mode_bit_map; +}; + + union init_op { struct op_read read; struct op_write write; - struct op_string_write str_wr; + struct op_arr_write arr_wr; struct op_zero zero; struct raw_op raw; + struct op_if_mode if_mode; }; + +/* Init Phases */ +enum { + PHASE_COMMON, + PHASE_PORT0, + PHASE_PORT1, + PHASE_PF0, + PHASE_PF1, + PHASE_PF2, + PHASE_PF3, + PHASE_PF4, + PHASE_PF5, + PHASE_PF6, + PHASE_PF7, + NUM_OF_INIT_PHASES +}; + +/* Init Modes */ +enum { + MODE_ASIC = 0x00000001, + MODE_FPGA = 0x00000002, + MODE_EMUL = 0x00000004, + MODE_E2 = 0x00000008, + MODE_E3 = 0x00000010, + MODE_PORT2 = 0x00000020, + MODE_PORT4 = 0x00000040, + MODE_SF = 0x00000080, + MODE_MF = 0x00000100, + MODE_MF_SD = 0x00000200, + MODE_MF_SI = 0x00000400, + MODE_MF_AFEX = 0x00000800, + MODE_E3_A0 = 0x00001000, + MODE_E3_B0 = 0x00002000, + MODE_COS3 = 0x00004000, + MODE_COS6 = 0x00008000, + MODE_LITTLE_ENDIAN = 0x00010000, + MODE_BIG_ENDIAN = 0x00020000, +}; + +/* Init Blocks */ +enum { + BLOCK_ATC, + BLOCK_BRB1, + BLOCK_CCM, + BLOCK_CDU, + BLOCK_CFC, + BLOCK_CSDM, + BLOCK_CSEM, + BLOCK_DBG, + BLOCK_DMAE, + BLOCK_DORQ, + BLOCK_HC, + BLOCK_IGU, + BLOCK_MISC, + BLOCK_NIG, + BLOCK_PBF, + BLOCK_PGLUE_B, + BLOCK_PRS, + BLOCK_PXP2, + BLOCK_PXP, + BLOCK_QM, + BLOCK_SRC, + BLOCK_TCM, + BLOCK_TM, + BLOCK_TSDM, + BLOCK_TSEM, + BLOCK_UCM, + BLOCK_UPB, + BLOCK_USDM, + BLOCK_USEM, + BLOCK_XCM, + BLOCK_XPB, + BLOCK_XSDM, + BLOCK_XSEM, + BLOCK_MISC_AEU, + NUM_OF_INIT_BLOCKS +}; + +#ifdef __KERNEL__ +#include "bnx2x.h" + +/* Vnics per mode */ +#define BNX2X_PORT2_MODE_NUM_VNICS 4 + + +/* QM queue numbers */ +#define BNX2X_ETH_Q 0 +#define BNX2X_TOE_Q 3 +#define BNX2X_TOE_ACK_Q 6 +#define BNX2X_ISCSI_Q 9 +#define BNX2X_ISCSI_ACK_Q 11 +#define BNX2X_FCOE_Q 10 + +/* Vnics per mode */ +#define BNX2X_PORT4_MODE_NUM_VNICS 2 + +/* COS offset for port1 in E3 B0 4port mode */ +#define BNX2X_E3B0_PORT1_COS_OFFSET 3 + +/* QM Register addresses */ +#define BNX2X_Q_VOQ_REG_ADDR(pf_q_num)\ + (QM_REG_QVOQIDX_0 + 4 * (pf_q_num)) +#define BNX2X_VOQ_Q_REG_ADDR(cos, pf_q_num)\ + (QM_REG_VOQQMASK_0_LSB + 4 * ((cos) * 2 + ((pf_q_num) >> 5))) +#define BNX2X_Q_CMDQ_REG_ADDR(pf_q_num)\ + (QM_REG_BYTECRDCMDQ_0 + 4 * ((pf_q_num) >> 4)) + +/* extracts the QM queue number for the specified port and vnic */ +#define BNX2X_PF_Q_NUM(q_num, port, vnic)\ + ((((port) << 1) | (vnic)) * 16 + (q_num)) + + +/* Maps the specified queue to the specified COS */ +static inline void bnx2x_map_q_cos(struct bnx2x *bp, u32 q_num, u32 new_cos) +{ + /* find current COS mapping */ + u32 curr_cos = REG_RD(bp, QM_REG_QVOQIDX_0 + q_num * 4); + + /* check if queue->COS mapping has changed */ + if (curr_cos != new_cos) { + u32 num_vnics = BNX2X_PORT2_MODE_NUM_VNICS; + u32 reg_addr, reg_bit_map, vnic; + + /* update parameters for 4port mode */ + if (INIT_MODE_FLAGS(bp) & MODE_PORT4) { + num_vnics = BNX2X_PORT4_MODE_NUM_VNICS; + if (BP_PORT(bp)) { + curr_cos += BNX2X_E3B0_PORT1_COS_OFFSET; + new_cos += BNX2X_E3B0_PORT1_COS_OFFSET; + } + } + + /* change queue mapping for each VNIC */ + for (vnic = 0; vnic < num_vnics; vnic++) { + u32 pf_q_num = + BNX2X_PF_Q_NUM(q_num, BP_PORT(bp), vnic); + u32 q_bit_map = 1 << (pf_q_num & 0x1f); + + /* overwrite queue->VOQ mapping */ + REG_WR(bp, BNX2X_Q_VOQ_REG_ADDR(pf_q_num), new_cos); + + /* clear queue bit from current COS bit map */ + reg_addr = BNX2X_VOQ_Q_REG_ADDR(curr_cos, pf_q_num); + reg_bit_map = REG_RD(bp, reg_addr); + REG_WR(bp, reg_addr, reg_bit_map & (~q_bit_map)); + + /* set queue bit in new COS bit map */ + reg_addr = BNX2X_VOQ_Q_REG_ADDR(new_cos, pf_q_num); + reg_bit_map = REG_RD(bp, reg_addr); + REG_WR(bp, reg_addr, reg_bit_map | q_bit_map); + + /* set/clear queue bit in command-queue bit map + (E2/E3A0 only, valid COS values are 0/1) */ + if (!(INIT_MODE_FLAGS(bp) & MODE_E3_B0)) { + reg_addr = BNX2X_Q_CMDQ_REG_ADDR(pf_q_num); + reg_bit_map = REG_RD(bp, reg_addr); + q_bit_map = 1 << (2 * (pf_q_num & 0xf)); + reg_bit_map = new_cos ? + (reg_bit_map | q_bit_map) : + (reg_bit_map & (~q_bit_map)); + REG_WR(bp, reg_addr, reg_bit_map); + } + } + } +} + +/* Configures the QM according to the specified per-traffic-type COSes */ +static inline void bnx2x_dcb_config_qm(struct bnx2x *bp, enum cos_mode mode, + struct priority_cos *traffic_cos) +{ + bnx2x_map_q_cos(bp, BNX2X_FCOE_Q, + traffic_cos[LLFC_TRAFFIC_TYPE_FCOE].cos); + bnx2x_map_q_cos(bp, BNX2X_ISCSI_Q, + traffic_cos[LLFC_TRAFFIC_TYPE_ISCSI].cos); + bnx2x_map_q_cos(bp, BNX2X_ISCSI_ACK_Q, + traffic_cos[LLFC_TRAFFIC_TYPE_ISCSI].cos); + if (mode != STATIC_COS) { + /* required only in OVERRIDE_COS mode */ + bnx2x_map_q_cos(bp, BNX2X_ETH_Q, + traffic_cos[LLFC_TRAFFIC_TYPE_NW].cos); + bnx2x_map_q_cos(bp, BNX2X_TOE_Q, + traffic_cos[LLFC_TRAFFIC_TYPE_NW].cos); + bnx2x_map_q_cos(bp, BNX2X_TOE_ACK_Q, + traffic_cos[LLFC_TRAFFIC_TYPE_NW].cos); + } +} + + +/* + * congestion managment port init api description + * the api works as follows: + * the driver should pass the cmng_init_input struct, the port_init function + * will prepare the required internal ram structure which will be passed back + * to the driver (cmng_init) that will write it into the internal ram. + * + * IMPORTANT REMARKS: + * 1. the cmng_init struct does not represent the contiguous internal ram + * structure. the driver should use the XSTORM_CMNG_PERPORT_VARS_OFFSET + * offset in order to write the port sub struct and the + * PFID_FROM_PORT_AND_VNIC offset for writing the vnic sub struct (in other + * words - don't use memcpy!). + * 2. although the cmng_init struct is filled for the maximal vnic number + * possible, the driver should only write the valid vnics into the internal + * ram according to the appropriate port mode. + */ +#define BITS_TO_BYTES(x) ((x)/8) + +/* CMNG constants, as derived from system spec calculations */ + +/* default MIN rate in case VNIC min rate is configured to zero- 100Mbps */ +#define DEF_MIN_RATE 100 + +/* resolution of the rate shaping timer - 400 usec */ +#define RS_PERIODIC_TIMEOUT_USEC 400 + +/* + * number of bytes in single QM arbitration cycle - + * coefficient for calculating the fairness timer + */ +#define QM_ARB_BYTES 160000 + +/* resolution of Min algorithm 1:100 */ +#define MIN_RES 100 + +/* + * how many bytes above threshold for + * the minimal credit of Min algorithm + */ +#define MIN_ABOVE_THRESH 32768 + +/* + * Fairness algorithm integration time coefficient - + * for calculating the actual Tfair + */ +#define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES) + +/* Memory of fairness algorithm - 2 cycles */ +#define FAIR_MEM 2 +#define SAFC_TIMEOUT_USEC 52 + +#define SDM_TICKS 4 + + +static inline void bnx2x_init_max(const struct cmng_init_input *input_data, + u32 r_param, struct cmng_init *ram_data) +{ + u32 vnic; + struct cmng_vnic *vdata = &ram_data->vnic; + struct cmng_struct_per_port *pdata = &ram_data->port; + /* + * rate shaping per-port variables + * 100 micro seconds in SDM ticks = 25 + * since each tick is 4 microSeconds + */ + + pdata->rs_vars.rs_periodic_timeout = + RS_PERIODIC_TIMEOUT_USEC / SDM_TICKS; + + /* this is the threshold below which no timer arming will occur. + * 1.25 coefficient is for the threshold to be a little bigger + * then the real time to compensate for timer in-accuracy + */ + pdata->rs_vars.rs_threshold = + (5 * RS_PERIODIC_TIMEOUT_USEC * r_param)/4; + + /* rate shaping per-vnic variables */ + for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) { + /* global vnic counter */ + vdata->vnic_max_rate[vnic].vn_counter.rate = + input_data->vnic_max_rate[vnic]; + /* + * maximal Mbps for this vnic + * the quota in each timer period - number of bytes + * transmitted in this period + */ + vdata->vnic_max_rate[vnic].vn_counter.quota = + RS_PERIODIC_TIMEOUT_USEC * + (u32)vdata->vnic_max_rate[vnic].vn_counter.rate / 8; + } + +} + +static inline void bnx2x_init_min(const struct cmng_init_input *input_data, + u32 r_param, struct cmng_init *ram_data) +{ + u32 vnic, fair_periodic_timeout_usec, vnicWeightSum, tFair; + struct cmng_vnic *vdata = &ram_data->vnic; + struct cmng_struct_per_port *pdata = &ram_data->port; + + /* this is the resolution of the fairness timer */ + fair_periodic_timeout_usec = QM_ARB_BYTES / r_param; + + /* + * fairness per-port variables + * for 10G it is 1000usec. for 1G it is 10000usec. + */ + tFair = T_FAIR_COEF / input_data->port_rate; + + /* this is the threshold below which we won't arm the timer anymore */ + pdata->fair_vars.fair_threshold = QM_ARB_BYTES; + + /* + * we multiply by 1e3/8 to get bytes/msec. We don't want the credits + * to pass a credit of the T_FAIR*FAIR_MEM (algorithm resolution) + */ + pdata->fair_vars.upper_bound = r_param * tFair * FAIR_MEM; + + /* since each tick is 4 microSeconds */ + pdata->fair_vars.fairness_timeout = + fair_periodic_timeout_usec / SDM_TICKS; + + /* calculate sum of weights */ + vnicWeightSum = 0; + + for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) + vnicWeightSum += input_data->vnic_min_rate[vnic]; + + /* global vnic counter */ + if (vnicWeightSum > 0) { + /* fairness per-vnic variables */ + for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) { + /* + * this is the credit for each period of the fairness + * algorithm - number of bytes in T_FAIR (this vnic + * share of the port rate) + */ + vdata->vnic_min_rate[vnic].vn_credit_delta = + ((u32)(input_data->vnic_min_rate[vnic]) * 100 * + (T_FAIR_COEF / (8 * 100 * vnicWeightSum))); + if (vdata->vnic_min_rate[vnic].vn_credit_delta < + pdata->fair_vars.fair_threshold + + MIN_ABOVE_THRESH) { + vdata->vnic_min_rate[vnic].vn_credit_delta = + pdata->fair_vars.fair_threshold + + MIN_ABOVE_THRESH; + } + } + } +} + +static inline void bnx2x_init_fw_wrr(const struct cmng_init_input *input_data, + u32 r_param, struct cmng_init *ram_data) +{ + u32 vnic, cos; + u32 cosWeightSum = 0; + struct cmng_vnic *vdata = &ram_data->vnic; + struct cmng_struct_per_port *pdata = &ram_data->port; + + for (cos = 0; cos < MAX_COS_NUMBER; cos++) + cosWeightSum += input_data->cos_min_rate[cos]; + + if (cosWeightSum > 0) { + + for (vnic = 0; vnic < BNX2X_PORT2_MODE_NUM_VNICS; vnic++) { + /* + * Since cos and vnic shouldn't work together the rate + * to divide between the coses is the port rate. + */ + u32 *ccd = vdata->vnic_min_rate[vnic].cos_credit_delta; + for (cos = 0; cos < MAX_COS_NUMBER; cos++) { + /* + * this is the credit for each period of + * the fairness algorithm - number of bytes + * in T_FAIR (this cos share of the vnic rate) + */ + ccd[cos] = + ((u32)input_data->cos_min_rate[cos] * 100 * + (T_FAIR_COEF / (8 * 100 * cosWeightSum))); + if (ccd[cos] < pdata->fair_vars.fair_threshold + + MIN_ABOVE_THRESH) { + ccd[cos] = + pdata->fair_vars.fair_threshold + + MIN_ABOVE_THRESH; + } + } + } + } +} + +static inline void bnx2x_init_safc(const struct cmng_init_input *input_data, + struct cmng_init *ram_data) +{ + /* in microSeconds */ + ram_data->port.safc_vars.safc_timeout_usec = SAFC_TIMEOUT_USEC; +} + +/* Congestion management port init */ +static inline void bnx2x_init_cmng(const struct cmng_init_input *input_data, + struct cmng_init *ram_data) +{ + u32 r_param; + memset(ram_data, 0, sizeof(struct cmng_init)); + + ram_data->port.flags = input_data->flags; + + /* + * number of bytes transmitted in a rate of 10Gbps + * in one usec = 1.25KB. + */ + r_param = BITS_TO_BYTES(input_data->port_rate); + bnx2x_init_max(input_data, r_param, ram_data); + bnx2x_init_min(input_data, r_param, ram_data); + bnx2x_init_fw_wrr(input_data, r_param, ram_data); + bnx2x_init_safc(input_data, ram_data); +} + + + +/* Returns the index of start or end of a specific block stage in ops array*/ +#define BLOCK_OPS_IDX(block, stage, end) \ + (2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end)) + + #define INITOP_SET 0 /* set the HW directly */ #define INITOP_CLEAR 1 /* clear the HW directly */ #define INITOP_INIT 2 /* set the init-value array */ @@ -177,7 +540,7 @@ struct ilt_client_info { struct bnx2x_ilt { u32 start_line; struct ilt_line *lines; - struct ilt_client_info clients[4]; + struct ilt_client_info clients[4]; #define ILT_CLIENT_CDU 0 #define ILT_CLIENT_QM 1 #define ILT_CLIENT_SRC 2 @@ -192,7 +555,246 @@ struct src_ent { u64 next; }; +/**************************************************************************** +* Parity configuration +****************************************************************************/ +#define BLOCK_PRTY_INFO(block, en_mask, m1, m1h, m2, m3) \ +{ \ + block##_REG_##block##_PRTY_MASK, \ + block##_REG_##block##_PRTY_STS_CLR, \ + en_mask, {m1, m1h, m2, m3}, #block \ +} + +#define BLOCK_PRTY_INFO_0(block, en_mask, m1, m1h, m2, m3) \ +{ \ + block##_REG_##block##_PRTY_MASK_0, \ + block##_REG_##block##_PRTY_STS_CLR_0, \ + en_mask, {m1, m1h, m2, m3}, #block"_0" \ +} + +#define BLOCK_PRTY_INFO_1(block, en_mask, m1, m1h, m2, m3) \ +{ \ + block##_REG_##block##_PRTY_MASK_1, \ + block##_REG_##block##_PRTY_STS_CLR_1, \ + en_mask, {m1, m1h, m2, m3}, #block"_1" \ +} + +static const struct { + u32 mask_addr; + u32 sts_clr_addr; + u32 en_mask; /* Mask to enable parity attentions */ + struct { + u32 e1; /* 57710 */ + u32 e1h; /* 57711 */ + u32 e2; /* 57712 */ + u32 e3; /* 578xx */ + } reg_mask; /* Register mask (all valid bits) */ + char name[7]; /* Block's longest name is 6 characters long + * (name + suffix) + */ +} bnx2x_blocks_parity_data[] = { + /* bit 19 masked */ + /* REG_WR(bp, PXP_REG_PXP_PRTY_MASK, 0x80000); */ + /* bit 5,18,20-31 */ + /* REG_WR(bp, PXP2_REG_PXP2_PRTY_MASK_0, 0xfff40020); */ + /* bit 5 */ + /* REG_WR(bp, PXP2_REG_PXP2_PRTY_MASK_1, 0x20); */ + /* REG_WR(bp, HC_REG_HC_PRTY_MASK, 0x0); */ + /* REG_WR(bp, MISC_REG_MISC_PRTY_MASK, 0x0); */ + + /* Block IGU, MISC, PXP and PXP2 parity errors as long as we don't + * want to handle "system kill" flow at the moment. + */ + BLOCK_PRTY_INFO(PXP, 0x7ffffff, 0x3ffffff, 0x3ffffff, 0x7ffffff, + 0x7ffffff), + BLOCK_PRTY_INFO_0(PXP2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff), + BLOCK_PRTY_INFO_1(PXP2, 0x1ffffff, 0x7f, 0x7f, 0x7ff, 0x1ffffff), + BLOCK_PRTY_INFO(HC, 0x7, 0x7, 0x7, 0, 0), + BLOCK_PRTY_INFO(NIG, 0xffffffff, 0x3fffffff, 0xffffffff, 0, 0), + BLOCK_PRTY_INFO_0(NIG, 0xffffffff, 0, 0, 0xffffffff, 0xffffffff), + BLOCK_PRTY_INFO_1(NIG, 0xffff, 0, 0, 0xff, 0xffff), + BLOCK_PRTY_INFO(IGU, 0x7ff, 0, 0, 0x7ff, 0x7ff), + BLOCK_PRTY_INFO(MISC, 0x1, 0x1, 0x1, 0x1, 0x1), + BLOCK_PRTY_INFO(QM, 0, 0x1ff, 0xfff, 0xfff, 0xfff), + BLOCK_PRTY_INFO(ATC, 0x1f, 0, 0, 0x1f, 0x1f), + BLOCK_PRTY_INFO(PGLUE_B, 0x3, 0, 0, 0x3, 0x3), + BLOCK_PRTY_INFO(DORQ, 0, 0x3, 0x3, 0x3, 0x3), + {GRCBASE_UPB + PB_REG_PB_PRTY_MASK, + GRCBASE_UPB + PB_REG_PB_PRTY_STS_CLR, 0xf, + {0xf, 0xf, 0xf, 0xf}, "UPB"}, + {GRCBASE_XPB + PB_REG_PB_PRTY_MASK, + GRCBASE_XPB + PB_REG_PB_PRTY_STS_CLR, 0, + {0xf, 0xf, 0xf, 0xf}, "XPB"}, + BLOCK_PRTY_INFO(SRC, 0x4, 0x7, 0x7, 0x7, 0x7), + BLOCK_PRTY_INFO(CDU, 0, 0x1f, 0x1f, 0x1f, 0x1f), + BLOCK_PRTY_INFO(CFC, 0, 0xf, 0xf, 0xf, 0x3f), + BLOCK_PRTY_INFO(DBG, 0, 0x1, 0x1, 0x1, 0x1), + BLOCK_PRTY_INFO(DMAE, 0, 0xf, 0xf, 0xf, 0xf), + BLOCK_PRTY_INFO(BRB1, 0, 0xf, 0xf, 0xf, 0xf), + BLOCK_PRTY_INFO(PRS, (1<<6), 0xff, 0xff, 0xff, 0xff), + BLOCK_PRTY_INFO(PBF, 0, 0, 0x3ffff, 0xfffff, 0xfffffff), + BLOCK_PRTY_INFO(TM, 0, 0, 0x7f, 0x7f, 0x7f), + BLOCK_PRTY_INFO(TSDM, 0x18, 0x7ff, 0x7ff, 0x7ff, 0x7ff), + BLOCK_PRTY_INFO(CSDM, 0x8, 0x7ff, 0x7ff, 0x7ff, 0x7ff), + BLOCK_PRTY_INFO(USDM, 0x38, 0x7ff, 0x7ff, 0x7ff, 0x7ff), + BLOCK_PRTY_INFO(XSDM, 0x8, 0x7ff, 0x7ff, 0x7ff, 0x7ff), + BLOCK_PRTY_INFO(TCM, 0, 0, 0x7ffffff, 0x7ffffff, 0x7ffffff), + BLOCK_PRTY_INFO(CCM, 0, 0, 0x7ffffff, 0x7ffffff, 0x7ffffff), + BLOCK_PRTY_INFO(UCM, 0, 0, 0x7ffffff, 0x7ffffff, 0x7ffffff), + BLOCK_PRTY_INFO(XCM, 0, 0, 0x3fffffff, 0x3fffffff, 0x3fffffff), + BLOCK_PRTY_INFO_0(TSEM, 0, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff), + BLOCK_PRTY_INFO_1(TSEM, 0, 0x3, 0x1f, 0x3f, 0x3f), + BLOCK_PRTY_INFO_0(USEM, 0, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff), + BLOCK_PRTY_INFO_1(USEM, 0, 0x3, 0x1f, 0x1f, 0x1f), + BLOCK_PRTY_INFO_0(CSEM, 0, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff), + BLOCK_PRTY_INFO_1(CSEM, 0, 0x3, 0x1f, 0x1f, 0x1f), + BLOCK_PRTY_INFO_0(XSEM, 0, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff), + BLOCK_PRTY_INFO_1(XSEM, 0, 0x3, 0x1f, 0x3f, 0x3f), +}; +/* [28] MCP Latched rom_parity + * [29] MCP Latched ump_rx_parity + * [30] MCP Latched ump_tx_parity + * [31] MCP Latched scpad_parity + */ +#define MISC_AEU_ENABLE_MCP_PRTY_BITS \ + (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \ + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) + +/* Below registers control the MCP parity attention output. When + * MISC_AEU_ENABLE_MCP_PRTY_BITS are set - attentions are + * enabled, when cleared - disabled. + */ +static const u32 mcp_attn_ctl_regs[] = { + MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, + MISC_REG_AEU_ENABLE4_NIG_0, + MISC_REG_AEU_ENABLE4_PXP_0, + MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, + MISC_REG_AEU_ENABLE4_NIG_1, + MISC_REG_AEU_ENABLE4_PXP_1 +}; + +static inline void bnx2x_set_mcp_parity(struct bnx2x *bp, u8 enable) +{ + int i; + u32 reg_val; + + for (i = 0; i < ARRAY_SIZE(mcp_attn_ctl_regs); i++) { + reg_val = REG_RD(bp, mcp_attn_ctl_regs[i]); + + if (enable) + reg_val |= MISC_AEU_ENABLE_MCP_PRTY_BITS; + else + reg_val &= ~MISC_AEU_ENABLE_MCP_PRTY_BITS; + + REG_WR(bp, mcp_attn_ctl_regs[i], reg_val); + } +} + +static inline u32 bnx2x_parity_reg_mask(struct bnx2x *bp, int idx) +{ + if (CHIP_IS_E1(bp)) + return bnx2x_blocks_parity_data[idx].reg_mask.e1; + else if (CHIP_IS_E1H(bp)) + return bnx2x_blocks_parity_data[idx].reg_mask.e1h; + else if (CHIP_IS_E2(bp)) + return bnx2x_blocks_parity_data[idx].reg_mask.e2; + else /* CHIP_IS_E3 */ + return bnx2x_blocks_parity_data[idx].reg_mask.e3; +} + +static inline void bnx2x_disable_blocks_parity(struct bnx2x *bp) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(bnx2x_blocks_parity_data); i++) { + u32 dis_mask = bnx2x_parity_reg_mask(bp, i); + + if (dis_mask) { + REG_WR(bp, bnx2x_blocks_parity_data[i].mask_addr, + dis_mask); + DP(NETIF_MSG_HW, "Setting parity mask " + "for %s to\t\t0x%x\n", + bnx2x_blocks_parity_data[i].name, dis_mask); + } + } + + /* Disable MCP parity attentions */ + bnx2x_set_mcp_parity(bp, false); +} + +/** + * Clear the parity error status registers. + */ +static inline void bnx2x_clear_blocks_parity(struct bnx2x *bp) +{ + int i; + u32 reg_val, mcp_aeu_bits = + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY | + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY; + + /* Clear SEM_FAST parities */ + REG_WR(bp, XSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); + REG_WR(bp, TSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); + REG_WR(bp, USEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); + REG_WR(bp, CSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); + + for (i = 0; i < ARRAY_SIZE(bnx2x_blocks_parity_data); i++) { + u32 reg_mask = bnx2x_parity_reg_mask(bp, i); + + if (reg_mask) { + reg_val = REG_RD(bp, bnx2x_blocks_parity_data[i]. + sts_clr_addr); + if (reg_val & reg_mask) + DP(NETIF_MSG_HW, + "Parity errors in %s: 0x%x\n", + bnx2x_blocks_parity_data[i].name, + reg_val & reg_mask); + } + } + + /* Check if there were parity attentions in MCP */ + reg_val = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_4_MCP); + if (reg_val & mcp_aeu_bits) + DP(NETIF_MSG_HW, "Parity error in MCP: 0x%x\n", + reg_val & mcp_aeu_bits); + + /* Clear parity attentions in MCP: + * [7] clears Latched rom_parity + * [8] clears Latched ump_rx_parity + * [9] clears Latched ump_tx_parity + * [10] clears Latched scpad_parity (both ports) + */ + REG_WR(bp, MISC_REG_AEU_CLR_LATCH_SIGNAL, 0x780); +} + +static inline void bnx2x_enable_blocks_parity(struct bnx2x *bp) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(bnx2x_blocks_parity_data); i++) { + u32 reg_mask = bnx2x_parity_reg_mask(bp, i); + + if (reg_mask) + REG_WR(bp, bnx2x_blocks_parity_data[i].mask_addr, + bnx2x_blocks_parity_data[i].en_mask & reg_mask); + } + + /* Enable MCP parity attentions */ + bnx2x_set_mcp_parity(bp, true); +} + + +#endif // __KERNEL__ #endif /* BNX2X_INIT_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_ops.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_ops.h index dddbf0a..38c0e5b 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_ops.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_ops.h @@ -2,7 +2,7 @@ * Static functions needed during the initialization. * This file is "included" in bnx2x_main.c. * - * Copyright (c) 2007-2011 Broadcom Corporation + * Copyright (c) 2007-2012 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -41,10 +41,13 @@ #endif static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len); +static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); +static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, + dma_addr_t phys_addr, u32 addr, + u32 len); - -static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data, - u32 len) +static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, + const u32 *data, u32 len) { u32 i; @@ -52,24 +55,32 @@ static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data, REG_WR(bp, addr + i*4, data[i]); } -static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data, - u32 len) +static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, + const u32 *data, u32 len) { u32 i; for (i = 0; i < len; i++) - REG_WR_IND(bp, addr + i*4, data[i]); + bnx2x_reg_wr_ind(bp, addr + i*4, data[i]); } -static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len) +static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len, + u8 wb) { if (bp->dmae_ready) bnx2x_write_dmae_phys_len(bp, GUNZIP_PHYS(bp), addr, len); + + /* in E1 chips BIOS initiated ZLR may interrupt widebus writes */ + else if (wb && CHIP_IS_E1(bp)) + bnx2x_init_ind_wr(bp, addr, GUNZIP_BUF(bp), len); + + /* in later chips PXP root complex handles BIOS ZLR w/o interrupting */ else bnx2x_init_str_wr(bp, addr, GUNZIP_BUF(bp), len); } -static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) +static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, + u32 len, u8 wb) { u32 buf_len = (((len*4) > FW_BUF_SIZE) ? FW_BUF_SIZE : (len*4)); u32 buf_len32 = buf_len/4; @@ -80,7 +91,7 @@ static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) for (i = 0; i < len; i += buf_len32) { u32 cur_len = min(buf_len32, len - i); - bnx2x_write_big_buf(bp, addr + i*4, cur_len); + bnx2x_write_big_buf(bp, addr + i*4, cur_len, wb); } } @@ -88,12 +99,18 @@ static void bnx2x_write_big_buf_wb(struct bnx2x *bp, u32 addr, u32 len) { if (bp->dmae_ready) bnx2x_write_dmae_phys_len(bp, GUNZIP_PHYS(bp), addr, len); - else + + /* in E1 chips BIOS initiated ZLR may interrupt widebus writes */ + else if (CHIP_IS_E1(bp)) bnx2x_init_ind_wr(bp, addr, GUNZIP_BUF(bp), len); + + /* in later chips PXP root complex handles BIOS ZLR w/o interrupting */ + else + bnx2x_init_str_wr(bp, addr, GUNZIP_BUF(bp), len); } -static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data, - u32 len64) +static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, + const u32 *data, u32 len64) { u32 buf_len32 = FW_BUF_SIZE/4; u32 len = len64*2; @@ -131,7 +148,8 @@ static void bnx2x_init_wr_64(struct bnx2x *bp, u32 addr, const u32 *data, #define IF_IS_PRAM_ADDR(base, addr) \ if (((base) <= (addr)) && ((base) + 0x40000 >= (addr))) -static const u8 *bnx2x_sel_blob(struct bnx2x *bp, u32 addr, const u8 *data) +static const u8 *bnx2x_sel_blob(struct bnx2x *bp, u32 addr, + const u8 *data) { IF_IS_INT_TABLE_ADDR(TSEM_REG_INT_TABLE, addr) data = INIT_TSEM_INT_TABLE_DATA(bp); @@ -160,27 +178,23 @@ static const u8 *bnx2x_sel_blob(struct bnx2x *bp, u32 addr, const u8 *data) return data; } -static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, const u32 *data, - u32 len) +static void bnx2x_init_wr_wb(struct bnx2x *bp, u32 addr, + const u32 *data, u32 len) { - const u32 *old_data = data; + if (bp->dmae_ready) + VIRT_WR_DMAE_LEN(bp, data, addr, len, 0); - - data = (const u32 *)bnx2x_sel_blob(bp, addr, (const u8 *)data); - - - - if (bp->dmae_ready) { - if (old_data != data) - VIRT_WR_DMAE_LEN(bp, data, addr, len, 1); - else - VIRT_WR_DMAE_LEN(bp, data, addr, len, 0); - } - else + /* in E1 chips BIOS initiated ZLR may interrupt widebus writes */ + else if (CHIP_IS_E1(bp)) bnx2x_init_ind_wr(bp, addr, data, len); + + /* in later chips PXP root complex handles BIOS ZLR w/o interrupting */ + else + bnx2x_init_str_wr(bp, addr, data, len); } -static void bnx2x_wr_64(struct bnx2x *bp, u32 reg, u32 val_lo, u32 val_hi) +static void bnx2x_wr_64(struct bnx2x *bp, u32 reg, u32 val_lo, + u32 val_hi) { u32 wb_write[2]; @@ -188,8 +202,8 @@ static void bnx2x_wr_64(struct bnx2x *bp, u32 reg, u32 val_lo, u32 val_hi) wb_write[1] = val_hi; REG_WR_DMAE_LEN(bp, reg, wb_write, 2); } - -static void bnx2x_init_wr_zp(struct bnx2x *bp, u32 addr, u32 len, u32 blob_off) +static void bnx2x_init_wr_zp(struct bnx2x *bp, u32 addr, u32 len, + u32 blob_off) { const u8 *data = NULL; int rc; @@ -213,39 +227,33 @@ static void bnx2x_init_wr_zp(struct bnx2x *bp, u32 addr, u32 len, u32 blob_off) static void bnx2x_init_block(struct bnx2x *bp, u32 block, u32 stage) { u16 op_start = - INIT_OPS_OFFSETS(bp)[BLOCK_OPS_IDX(block,stage,STAGE_START)]; + INIT_OPS_OFFSETS(bp)[BLOCK_OPS_IDX(block, stage, + STAGE_START)]; u16 op_end = - INIT_OPS_OFFSETS(bp)[BLOCK_OPS_IDX(block,stage,STAGE_END)]; + INIT_OPS_OFFSETS(bp)[BLOCK_OPS_IDX(block, stage, + STAGE_END)]; union init_op *op; - int hw_wr; - u32 i, op_type, addr, len; + u32 op_idx, op_type, addr, len; const u32 *data, *data_base; /* If empty block */ if (op_start == op_end) return; - if (CHIP_REV_IS_FPGA(bp)) - hw_wr = OP_WR_FPGA; - else if (CHIP_REV_IS_EMUL(bp)) - hw_wr = OP_WR_EMUL; - else - hw_wr = OP_WR_ASIC; - data_base = INIT_DATA(bp); - for (i = op_start; i < op_end; i++) { + for (op_idx = op_start; op_idx < op_end; op_idx++) { - op = (union init_op *)&(INIT_OPS(bp)[i]); - - op_type = op->str_wr.op; - addr = op->str_wr.offset; - len = op->str_wr.data_len; - data = data_base + op->str_wr.data_off; - - /* HW/EMUL specific */ - if ((op_type > OP_WB) && (op_type == hw_wr)) - op_type = OP_WR; + op = (union init_op *)&(INIT_OPS(bp)[op_idx]); + /* Get generic data */ + op_type = op->raw.op; + addr = op->raw.offset; + /* Get data that's used for OP_SW, OP_WB, OP_FW, OP_ZP and + * OP_WR64 (we assume that op_arr_write and op_write have the + * same structure). + */ + len = op->arr_wr.data_len; + data = data_base + op->arr_wr.data_off; switch (op_type) { case OP_RD: @@ -260,21 +268,39 @@ static void bnx2x_init_block(struct bnx2x *bp, u32 block, u32 stage) case OP_WB: bnx2x_init_wr_wb(bp, addr, data, len); break; - case OP_SI: - bnx2x_init_ind_wr(bp, addr, data, len); - break; case OP_ZR: - bnx2x_init_fill(bp, addr, 0, op->zero.len); + bnx2x_init_fill(bp, addr, 0, op->zero.len, 0); + break; + case OP_WB_ZR: + bnx2x_init_fill(bp, addr, 0, op->zero.len, 1); break; case OP_ZP: bnx2x_init_wr_zp(bp, addr, len, - op->str_wr.data_off); + op->arr_wr.data_off); break; case OP_WR_64: bnx2x_init_wr_64(bp, addr, data, len); break; + case OP_IF_MODE_AND: + /* if any of the flags doesn't match, skip the + * conditional block. + */ + if ((INIT_MODE_FLAGS(bp) & + op->if_mode.mode_bit_map) != + op->if_mode.mode_bit_map) + op_idx += op->if_mode.cmd_offset; + break; + case OP_IF_MODE_OR: + /* if all the flags don't match, skip the conditional + * block. + */ + if ((INIT_MODE_FLAGS(bp) & + op->if_mode.mode_bit_map) == 0) + op_idx += op->if_mode.cmd_offset; + break; default: - /* happens whenever an op is of a diff HW */ + /* Should never get here! */ + break; } } @@ -444,7 +470,8 @@ static const struct arb_line write_arb_addr[NUM_WR_Q-1] = { PXP2_REG_RQ_BW_WR_UBOUND30} }; -static void bnx2x_init_pxp_arb(struct bnx2x *bp, int r_order, int w_order) +static void bnx2x_init_pxp_arb(struct bnx2x *bp, int r_order, + int w_order) { u32 val, i; @@ -515,24 +542,24 @@ static void bnx2x_init_pxp_arb(struct bnx2x *bp, int r_order, int w_order) REG_WR(bp, PXP2_REG_RQ_RD_MBS0, r_order); REG_WR(bp, PXP2_REG_RQ_RD_MBS1, r_order); - if (r_order == MAX_RD_ORD) + if ((CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) && (r_order == MAX_RD_ORD)) REG_WR(bp, PXP2_REG_RQ_PDR_LIMIT, 0xe00); - /* Todo: E3 will have a different initialization value - * 0x4<< w_order - */ - if (CHIP_IS_E2(bp)) + if (CHIP_IS_E3(bp)) + REG_WR(bp, PXP2_REG_WR_USDMDP_TH, (0x4 << w_order)); + else if (CHIP_IS_E2(bp)) REG_WR(bp, PXP2_REG_WR_USDMDP_TH, (0x8 << w_order)); else REG_WR(bp, PXP2_REG_WR_USDMDP_TH, (0x18 << w_order)); - if (CHIP_IS_E1H(bp) || CHIP_IS_E2(bp)) { - /* MPS w_order optimal TH presently TH - * 128 0 0 2 - * 256 1 1 3 - * >=512 2 2 3 - */ - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1(bp)) { + /* MPS w_order optimal TH presently TH + * 128 0 0 2 + * 256 1 1 3 + * >=512 2 2 3 + */ + /* DMAE is special */ + if (!CHIP_IS_E1H(bp)) { /* E2 can use optimal TH */ val = w_order; REG_WR(bp, PXP2_REG_WR_DMAE_MPS, val); @@ -550,7 +577,6 @@ static void bnx2x_init_pxp_arb(struct bnx2x *bp, int r_order, int w_order) REG_WR(bp, PXP2_REG_WR_TM_MPS, val); REG_WR(bp, PXP2_REG_WR_SRC_MPS, val); REG_WR(bp, PXP2_REG_WR_DBG_MPS, val); - REG_WR(bp, PXP2_REG_WR_CDU_MPS, val); } @@ -562,7 +588,6 @@ static void bnx2x_init_pxp_arb(struct bnx2x *bp, int r_order, int w_order) REG_WR(bp, PXP2_REG_PGL_TAGS_LIMIT, 0x20); } - /**************************************************************************** * ILT management ****************************************************************************/ @@ -580,16 +605,16 @@ static void bnx2x_init_pxp_arb(struct bnx2x *bp, int r_order, int w_order) #define ILT_MEMOP_FREE 1 /* the phys address is shifted right 12 bits and has an added - 1=valid bit added to the 53rd bit - then since this is a wide register(TM) - we split it into two 32 bit writes + * 1=valid bit added to the 53rd bit + * then since this is a wide register(TM) + * we split it into two 32 bit writes */ #define ILT_ADDR1(x) ((u32)(((u64)x >> 12) & 0xFFFFFFFF)) #define ILT_ADDR2(x) ((u32)((1 << 20) | ((u64)x >> 44))) #define ILT_RANGE(f, l) (((l) << 10) | f) -static int bnx2x_ilt_line_mem_op(struct bnx2x *bp, struct ilt_line *line, - u32 size, u8 memop) +static int bnx2x_ilt_line_mem_op(struct bnx2x *bp, + struct ilt_line *line, u32 size, u8 memop) { if (memop == ILT_MEMOP_FREE) { BNX2X_ILT_FREE(line->page, line->page_mapping, line->size); @@ -603,7 +628,8 @@ static int bnx2x_ilt_line_mem_op(struct bnx2x *bp, struct ilt_line *line, } -static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num, u8 memop) +static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num, + u8 memop) { int i, rc; struct bnx2x_ilt *ilt = BP_ILT(bp); @@ -612,7 +638,7 @@ static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num, u8 memop) if (!ilt || !ilt->lines) return -1; - if (ilt_cli->flags & (ILT_CLIENT_SKIP_INIT| ILT_CLIENT_SKIP_MEM)) + if (ilt_cli->flags & (ILT_CLIENT_SKIP_INIT | ILT_CLIENT_SKIP_MEM)) return 0; for (rc = 0, i = ilt_cli->start; i <= ilt_cli->end && !rc; i++) { @@ -622,7 +648,7 @@ static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num, u8 memop) return rc; } -int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) +static int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) { int rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_CDU, memop); if (!rc) @@ -648,8 +674,8 @@ static void bnx2x_ilt_line_wr(struct bnx2x *bp, int abs_idx, bnx2x_wr_64(bp, reg, ILT_ADDR1(page_mapping), ILT_ADDR2(page_mapping)); } -static void bnx2x_ilt_line_init_op(struct bnx2x *bp, struct bnx2x_ilt *ilt, - int idx, u8 initop) +static void bnx2x_ilt_line_init_op(struct bnx2x *bp, + struct bnx2x_ilt *ilt, int idx, u8 initop) { dma_addr_t null_mapping; int abs_idx = ilt->start_line + idx; @@ -668,7 +694,7 @@ static void bnx2x_ilt_line_init_op(struct bnx2x *bp, struct bnx2x_ilt *ilt, } } -void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, +static void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, struct ilt_client_info *ilt_cli, u32 ilt_start, u8 initop) { @@ -721,7 +747,10 @@ void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, } } -void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, struct ilt_client_info *ilt_cli, u8 initop) +static void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, + struct bnx2x_ilt *ilt, + struct ilt_client_info *ilt_cli, + u8 initop) { int i; @@ -735,15 +764,16 @@ void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, struc bnx2x_ilt_boundry_init_op(bp, ilt_cli, ilt->start_line, initop); } -void bnx2x_ilt_client_init_op(struct bnx2x *bp, struct ilt_client_info *ilt_cli, u8 initop) +static void bnx2x_ilt_client_init_op(struct bnx2x *bp, + struct ilt_client_info *ilt_cli, u8 initop) { struct bnx2x_ilt *ilt = BP_ILT(bp); bnx2x_ilt_client_init_op_ilt(bp, ilt, ilt_cli, initop); - } -static void bnx2x_ilt_client_id_init_op(struct bnx2x *bp, int cli_num, u8 initop) +static void bnx2x_ilt_client_id_init_op(struct bnx2x *bp, + int cli_num, u8 initop) { struct bnx2x_ilt *ilt = BP_ILT(bp); struct ilt_client_info *ilt_cli = &ilt->clients[cli_num]; @@ -751,7 +781,7 @@ static void bnx2x_ilt_client_id_init_op(struct bnx2x *bp, int cli_num, u8 initop bnx2x_ilt_client_init_op(bp, ilt_cli, initop); } -void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) +static void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) { bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_CDU, initop); bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_QM, initop); @@ -760,7 +790,7 @@ void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) } static void bnx2x_ilt_init_client_psz(struct bnx2x *bp, int cli_num, - u32 psz_reg, u8 initop) + u32 psz_reg, u8 initop) { struct bnx2x_ilt *ilt = BP_ILT(bp); struct ilt_client_info *ilt_cli = &ilt->clients[cli_num]; @@ -779,9 +809,11 @@ static void bnx2x_ilt_init_client_psz(struct bnx2x *bp, int cli_num, } } -/* called during init common stage, ilt clients should be initialized - prioir to calling this function */ -void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) +/* + * called during init common stage, ilt clients should be initialized + * prioir to calling this function + */ +static void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) { bnx2x_ilt_init_client_psz(bp, ILT_CLIENT_CDU, PXP2_REG_RQ_CDU_P_SIZE, initop); @@ -801,8 +833,8 @@ void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) #define QM_INIT(cid_cnt) (cid_cnt > QM_INIT_MIN_CID_COUNT) /* called during init port stage */ -void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, - u8 initop) +static void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, + u8 initop) { int port = BP_PORT(bp); @@ -820,31 +852,22 @@ void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, } } -static void bnx2x_qm_set_ptr_table(struct bnx2x *bp, int qm_cid_count) +static void bnx2x_qm_set_ptr_table(struct bnx2x *bp, int qm_cid_count, + u32 base_reg, u32 reg) { int i; - u32 wb_data[2]; - - wb_data[0] = wb_data[1] = 0; - + u32 wb_data[2] = {0, 0}; for (i = 0; i < 4 * QM_QUEUES_PER_FUNC; i++) { - REG_WR(bp, QM_REG_BASEADDR + i*4, + REG_WR(bp, base_reg + i*4, qm_cid_count * 4 * (i % QM_QUEUES_PER_FUNC)); - bnx2x_init_ind_wr(bp, QM_REG_PTRTBL + i*8, - wb_data, 2); - - if (CHIP_IS_E1H(bp)) { - REG_WR(bp, QM_REG_BASEADDR_EXT_A + i*4, - qm_cid_count * 4 * (i % QM_QUEUES_PER_FUNC)); - bnx2x_init_ind_wr(bp, QM_REG_PTRTBL_EXT_A + i*8, - wb_data, 2); - } + bnx2x_init_wr_wb(bp, reg + i*8, + wb_data, 2); } } /* called during init common stage */ -void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, - u8 initop) +static void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, + u8 initop) { if (!QM_INIT(qm_cid_count)) return; @@ -853,7 +876,12 @@ void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, case INITOP_INIT: /* set in the init-value array */ case INITOP_SET: - bnx2x_qm_set_ptr_table(bp, qm_cid_count); + bnx2x_qm_set_ptr_table(bp, qm_cid_count, + QM_REG_BASEADDR, QM_REG_PTRTBL); + if (CHIP_IS_E1H(bp)) + bnx2x_qm_set_ptr_table(bp, qm_cid_count, + QM_REG_BASEADDR_EXT_A, + QM_REG_PTRTBL_EXT_A); break; case INITOP_CLEAR: break; @@ -863,17 +891,18 @@ void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, /**************************************************************************** * SRC initializations ****************************************************************************/ - +#ifdef BCM_CNIC /* called during init func stage */ -void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, - dma_addr_t t2_mapping, int src_cid_count) +static void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, + dma_addr_t t2_mapping, int src_cid_count) { int i; int port = BP_PORT(bp); /* Initialize T2 */ for (i = 0; i < src_cid_count-1; i++) - t2[i].next = (u64)(t2_mapping + (i+1)*sizeof(struct src_ent)); + t2[i].next = (u64)(t2_mapping + + (i+1)*sizeof(struct src_ent)); /* tell the searcher where the T2 table is */ REG_WR(bp, SRC_REG_COUNTFREE0 + port*4, src_cid_count); @@ -887,5 +916,5 @@ void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, U64_HI((u64)t2_mapping + (src_cid_count-1) * sizeof(struct src_ent))); } - +#endif #endif /* BNX2X_INIT_OPS_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.c index 7c31d0d..ae58acc 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.c +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1.c @@ -1,27 +1,22 @@ -/* init_ops array contains the list of operations needed to initialize the chip. - * - * For each block in the chip there are three init stages: - * common - HW used by both ports, - * port1 and port2 - initialization for a specific Ethernet port. - * When a port is opened or closed, the management CPU tells the driver - * whether to init/disable common HW in addition to the port HW. - * This way the first port going up will first initializes the common HW, - * and the last port going down also resets the common HW - * - * For each init stage/block there is a list of actions needed in a format: - * {operation, register, data} - * where: - * OP_WR - write a value to the chip. - * OP_RD - read a register (usually a clear on read register). - * OP_SW - string write, write a section of consecutive addresses to the chip. - * OP_SI - copy a string using indirect writes. - * OP_ZR - clear a range of memory. - * OP_ZP - unzip and copy using DMAE. - * OP_WB - string copy using DMAE. - * - * The #defines mark the stages. - * - */ +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +* +* This file contains an array of operations needed to initialize the chip: +* OP_WR - write a single register. +* OP_RD - read a single register. +* OP_SW - write an array to consecutive registers. +* OP_WB - write an array using DMAE. +* OP_ZR - clear consecutive registers. +* OP_WB_ZR - clear consecutive registers using DMAE. +* OP_ZP - unzip and write an array using DMAE. +* OP_WR_64 - write a 64-bit pattern to consecutive registers. +* OP_IF_MODE_OR - skip next ops if all modes do not match. +* OP_IF_MODE_AND - skip next ops if at least one mode does not match. +*/ #ifdef __KERNEL__ #include #include @@ -29,13237 +24,12920 @@ #include #include #include "bnx2x_compat.h" -#include "bnx2x_init.h" #include "bnx2x.h" +#include "bnx2x_init.h" #endif - static const struct raw_op init_ops_e1[] = { -/* #define PRS_COMMON_START 0 */ - {OP_WR, PRS_REG_INC_VALUE, 0xf}, - {OP_WR, PRS_REG_EVENT_ID_1, 0x45}, - {OP_WR, PRS_REG_EVENT_ID_2, 0x0}, - {OP_WR, PRS_REG_EVENT_ID_3, 0x6}, - {OP_WR, PRS_REG_NO_MATCH_EVENT_ID, 0x4}, - {OP_WR, PRS_REG_CM_HDR_TYPE_0, 0x0}, - {OP_WR, PRS_REG_CM_HDR_TYPE_1, 0x12170000}, - {OP_WR, PRS_REG_CM_HDR_TYPE_2, 0x22170000}, - {OP_WR, PRS_REG_CM_HDR_TYPE_3, 0x32170000}, - {OP_ZR, PRS_REG_CM_HDR_TYPE_4, 0x5}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_1, 0x12150000}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_2, 0x22150000}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_3, 0x32150000}, - {OP_ZR, PRS_REG_CM_HDR_LOOPBACK_TYPE_4, 0x4}, - {OP_WR, PRS_REG_CM_NO_MATCH_HDR, 0x2100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_0, 0x100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_1, 0x10100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_2, 0x20100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_3, 0x30100000}, - {OP_ZR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_4, 0x4}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_0, 0x100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_1, 0x12140000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_2, 0x22140000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_3, 0x32140000}, - {OP_ZR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_4, 0x4}, - {OP_RD, PRS_REG_NUM_OF_PACKETS, 0x0}, - {OP_RD, PRS_REG_NUM_OF_CFC_FLUSH_MESSAGES, 0x0}, - {OP_RD, PRS_REG_NUM_OF_TRANSPARENT_FLUSH_MESSAGES, 0x0}, - {OP_RD, PRS_REG_NUM_OF_DEAD_CYCLES, 0x0}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_0, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_1, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_2, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_3, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_4, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_5, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_6, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_7, 0xff}, - {OP_WR, PRS_REG_PURE_REGIONS, 0x3e}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_0, 0x0}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_1, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_2, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_3, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_4, 0x0}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_5, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_6, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_7, 0x3f}, -/* #define PRS_COMMON_END 1 */ -/* #define TSDM_COMMON_START 44 */ - {OP_WR, TSDM_REG_CFC_RSP_START_ADDR, 0x211}, - {OP_WR, TSDM_REG_CMP_COUNTER_START_ADDR, 0x200}, - {OP_WR, TSDM_REG_Q_COUNTER_START_ADDR, 0x204}, - {OP_WR, TSDM_REG_PCK_END_MSG_START_ADDR, 0x219}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_ZR, TSDM_REG_AGG_INT_EVENT_0, 0x80}, - {OP_WR, TSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, TSDM_REG_ENABLE_IN2, 0x3f}, - {OP_WR, TSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, TSDM_REG_ENABLE_OUT2, 0xf}, - {OP_RD, TSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR, TSDM_REG_INIT_CREDIT_PXP_CTRL, 0x1}, - {OP_WR_ASIC, TSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, TSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, TSDM_REG_TIMER_TICK, 0xa}, -/* #define TSDM_COMMON_END 45 */ -/* #define TCM_COMMON_START 66 */ - {OP_ZR, TCM_REG_AG_CTX, 0xd00}, - {OP_WR, TCM_REG_XX_MAX_LL_SZ, 0x20}, - {OP_WR, TCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, TCM_REG_TQM_TCM_HDR_P, 0x2150020}, - {OP_WR, TCM_REG_TQM_TCM_HDR_S, 0x2150020}, - {OP_WR, TCM_REG_TM_TCM_HDR, 0x30}, - {OP_WR, TCM_REG_ERR_TCM_HDR, 0x8100000}, - {OP_WR, TCM_REG_ERR_EVNT_ID, 0x33}, - {OP_WR, TCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, TCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, TCM_REG_STORM_WEIGHT, 0x2}, - {OP_WR, TCM_REG_PRS_WEIGHT, 0x5}, - {OP_WR, TCM_REG_PBF_WEIGHT, 0x6}, - {OP_WR, TCM_REG_USEM_WEIGHT, 0x2}, - {OP_WR, TCM_REG_CSEM_WEIGHT, 0x2}, - {OP_WR, TCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, TCM_REG_TSDM_WEIGHT, 0x5}, - {OP_WR, TCM_REG_TQM_P_WEIGHT, 0x2}, - {OP_WR, TCM_REG_TQM_S_WEIGHT, 0x2}, - {OP_WR, TCM_REG_TM_WEIGHT, 0x2}, - {OP_WR, TCM_REG_TCM_TQM_USE_Q, 0x1}, - {OP_WR, TCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, TCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, TCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, TCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, TCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, TCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, TCM_REG_TQM_INIT_CRD, 0x20}, - {OP_WR, TCM_REG_XX_INIT_CRD, 0x13}, - {OP_WR, TCM_REG_XX_MSG_NUM, 0x20}, - {OP_ZR, TCM_REG_XX_TABLE, 0xa}, - {OP_SW, TCM_REG_XX_DESCR_TABLE, 0x200000}, - {OP_WR, TCM_REG_N_SM_CTX_LD_0, 0x7}, - {OP_WR, TCM_REG_N_SM_CTX_LD_1, 0x7}, - {OP_WR, TCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, TCM_REG_N_SM_CTX_LD_3, 0x8}, - {OP_ZR, TCM_REG_N_SM_CTX_LD_4, 0x4}, - {OP_WR, TCM_REG_TCM_REG0_SZ, 0x6}, - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0xd}, - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x2d}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x20}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x0}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x20}, - {OP_WR, TCM_REG_TCM_STORM0_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_STORM1_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_TQM_IFEN, 0x1}, - {OP_WR, TCM_REG_STORM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_TQM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_TSDM_IFEN, 0x1}, - {OP_WR, TCM_REG_TM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_PRS_IFEN, 0x1}, - {OP_WR, TCM_REG_PBF_IFEN, 0x1}, - {OP_WR, TCM_REG_USEM_IFEN, 0x1}, - {OP_WR, TCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_CFC_IFEN, 0x1}, -/* #define TCM_COMMON_END 67 */ -/* #define BRB1_COMMON_START 88 */ - {OP_SW, BRB1_REG_LL_RAM, 0x2000020}, - {OP_WR, BRB1_REG_SOFT_RESET, 0x1}, - {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_4, 0x0}, - {OP_SW, BRB1_REG_FREE_LIST_PRS_CRDT, 0x30220}, - {OP_WR, BRB1_REG_SOFT_RESET, 0x0}, -/* #define BRB1_COMMON_END 89 */ -/* #define BRB1_PORT0_START 90 */ - {OP_WR, BRB1_REG_PAUSE_LOW_THRESHOLD_0, 0xb8}, - {OP_WR, BRB1_REG_PAUSE_HIGH_THRESHOLD_0, 0x114}, - {OP_RD, BRB1_REG_NUM_OF_PAUSE_CYCLES_0, 0x0}, - {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_0, 0x0}, -/* #define BRB1_PORT0_END 91 */ -/* #define BRB1_PORT1_START 92 */ - {OP_WR, BRB1_REG_PAUSE_LOW_THRESHOLD_1, 0xb8}, - {OP_WR, BRB1_REG_PAUSE_HIGH_THRESHOLD_1, 0x114}, - {OP_RD, BRB1_REG_NUM_OF_PAUSE_CYCLES_1, 0x0}, - {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_1, 0x0}, -/* #define BRB1_PORT1_END 93 */ -/* #define TSEM_COMMON_START 110 */ - {OP_ZP, TSEM_REG_INT_TABLE, 0x770000}, - {OP_WR_64, TSEM_REG_INT_TABLE + 0x360, 0x140223}, - {OP_ZP, TSEM_REG_PRAM, 0x29840000}, - {OP_ZP, TSEM_REG_PRAM + 0x8000, 0x32d20a62}, - {OP_ZP, TSEM_REG_PRAM + 0x10000, 0x1d451717}, - {OP_WR_64, TSEM_REG_PRAM + 0x14540, 0x57580225}, - {OP_RD, TSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, TSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, TSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, TSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, TSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, TSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, TSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, TSEM_REG_TS_0_AS, 0x0}, - {OP_WR, TSEM_REG_TS_1_AS, 0x1}, - {OP_WR, TSEM_REG_TS_2_AS, 0x4}, - {OP_WR, TSEM_REG_TS_3_AS, 0x0}, - {OP_WR, TSEM_REG_TS_4_AS, 0x1}, - {OP_WR, TSEM_REG_TS_5_AS, 0x3}, - {OP_WR, TSEM_REG_TS_6_AS, 0x0}, - {OP_WR, TSEM_REG_TS_7_AS, 0x1}, - {OP_WR, TSEM_REG_TS_8_AS, 0x4}, - {OP_WR, TSEM_REG_TS_9_AS, 0x0}, - {OP_WR, TSEM_REG_TS_10_AS, 0x1}, - {OP_WR, TSEM_REG_TS_11_AS, 0x3}, - {OP_WR, TSEM_REG_TS_12_AS, 0x0}, - {OP_WR, TSEM_REG_TS_13_AS, 0x1}, - {OP_WR, TSEM_REG_TS_14_AS, 0x4}, - {OP_WR, TSEM_REG_TS_15_AS, 0x0}, - {OP_WR, TSEM_REG_TS_16_AS, 0x4}, - {OP_WR, TSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, TSEM_REG_TS_18_AS, 0x2}, - {OP_WR, TSEM_REG_ENABLE_IN, 0x3fff}, - {OP_WR, TSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, TSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, TSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, TSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, TSEM_REG_THREADS_LIST, 0xff}, - {OP_ZR, TSEM_REG_PASSIVE_BUFFER, 0x400}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18000, 0x34}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18040, 0x18}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18080, 0xc}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x180c0, 0x20}, - {OP_WR_ASIC, TSEM_REG_FAST_MEMORY + 0x18300, 0x7a120}, - {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x18300, 0x138}, - {OP_WR_FPGA, TSEM_REG_FAST_MEMORY + 0x18300, 0x1388}, - {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, TSEM_REG_FAST_MEMORY + 0x18340, 0x1f4}, - {OP_WR_FPGA, TSEM_REG_FAST_MEMORY + 0x18340, 0x5}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18380, 0x7a120}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x19d0, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x1000, 0x272}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x19c8, 0x20227}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4030, 0x1f8}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4860, 0x40229}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x800, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x808, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x818, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2fd0, 0x6}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x2fd0 + 0x18, 0x2022d}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x2fc0, 0x4022f}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000, 0x10233}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x10, 0x10234}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x20, 0x10235}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x30, 0x10236}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x40, 0x10237}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x50, 0x10238}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x60, 0x10239}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x70, 0x1023a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x80, 0x1023b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x90, 0x1023c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa0, 0x1023d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb0, 0x1023e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc0, 0x1023f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd0, 0x10240}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe0, 0x10241}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf0, 0x10242}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x100, 0x10243}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x104, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x110, 0x10244}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x114, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x120, 0x10245}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x124, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x130, 0x10246}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x134, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x140, 0x10247}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x144, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x150, 0x10248}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x154, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x160, 0x10249}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x164, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x170, 0x1024a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x174, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x180, 0x1024b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x184, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x190, 0x1024c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x194, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1a0, 0x1024d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1b0, 0x1024e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1c0, 0x1024f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1d0, 0x10250}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1e0, 0x10251}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1f0, 0x10252}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x1f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x200, 0x10253}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x204, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x210, 0x10254}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x214, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x220, 0x10255}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x224, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x230, 0x10256}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x234, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x240, 0x10257}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x244, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x250, 0x10258}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x254, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x260, 0x10259}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x264, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x270, 0x1025a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x274, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x280, 0x1025b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x284, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x290, 0x1025c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x294, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2a0, 0x1025d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2b0, 0x1025e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2c0, 0x1025f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2d0, 0x10260}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2e0, 0x10261}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2f0, 0x10262}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x2f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x300, 0x10263}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x304, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x310, 0x10264}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x314, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x320, 0x10265}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x324, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x330, 0x10266}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x334, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x340, 0x10267}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x344, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x350, 0x10268}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x354, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x360, 0x10269}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x364, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x370, 0x1026a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x374, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x380, 0x1026b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x384, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x390, 0x1026c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x394, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3a0, 0x1026d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3b0, 0x1026e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3c0, 0x1026f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3d0, 0x10270}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3e0, 0x10271}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3f0, 0x10272}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x3f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x400, 0x10273}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x404, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x410, 0x10274}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x414, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x420, 0x10275}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x424, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x430, 0x10276}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x434, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x440, 0x10277}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x444, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x450, 0x10278}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x454, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x460, 0x10279}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x464, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x470, 0x1027a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x474, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x480, 0x1027b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x484, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x490, 0x1027c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x494, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4a0, 0x1027d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4b0, 0x1027e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4c0, 0x1027f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4d0, 0x10280}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4e0, 0x10281}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4f0, 0x10282}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x4f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x500, 0x10283}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x504, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x510, 0x10284}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x514, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x520, 0x10285}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x524, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x530, 0x10286}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x534, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x540, 0x10287}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x544, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x550, 0x10288}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x554, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x560, 0x10289}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x564, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x570, 0x1028a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x574, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x580, 0x1028b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x584, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x590, 0x1028c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x594, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5a0, 0x1028d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5b0, 0x1028e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5c0, 0x1028f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5d0, 0x10290}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5e0, 0x10291}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5f0, 0x10292}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x5f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x600, 0x10293}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x604, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x610, 0x10294}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x614, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x620, 0x10295}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x624, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x630, 0x10296}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x634, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x640, 0x10297}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x644, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x650, 0x10298}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x654, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x660, 0x10299}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x664, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x670, 0x1029a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x674, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x680, 0x1029b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x684, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x690, 0x1029c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x694, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6a0, 0x1029d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6b0, 0x1029e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6c0, 0x1029f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6d0, 0x102a0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6e0, 0x102a1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6f0, 0x102a2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x6f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x700, 0x102a3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x704, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x710, 0x102a4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x714, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x720, 0x102a5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x724, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x730, 0x102a6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x734, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x740, 0x102a7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x744, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x750, 0x102a8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x754, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x760, 0x102a9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x764, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x770, 0x102aa}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x774, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x780, 0x102ab}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x784, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x790, 0x102ac}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x794, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7a0, 0x102ad}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7b0, 0x102ae}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7c0, 0x102af}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7d0, 0x102b0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7e0, 0x102b1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7f0, 0x102b2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x7f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x800, 0x102b3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x804, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x810, 0x102b4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x814, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x820, 0x102b5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x824, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x830, 0x102b6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x834, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x840, 0x102b7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x844, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x850, 0x102b8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x854, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x860, 0x102b9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x864, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x870, 0x102ba}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x874, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x880, 0x102bb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x884, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x890, 0x102bc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x894, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8a0, 0x102bd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8b0, 0x102be}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8c0, 0x102bf}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8d0, 0x102c0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8e0, 0x102c1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8f0, 0x102c2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x8f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x900, 0x102c3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x904, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x910, 0x102c4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x914, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x920, 0x102c5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x924, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x930, 0x102c6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x934, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x940, 0x102c7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x944, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x950, 0x102c8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x954, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x960, 0x102c9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x964, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x970, 0x102ca}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x974, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x980, 0x102cb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x984, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x990, 0x102cc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x994, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9a0, 0x102cd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9b0, 0x102ce}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9c0, 0x102cf}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9d0, 0x102d0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9e0, 0x102d1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9f0, 0x102d2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0x9f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa00, 0x102d3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa10, 0x102d4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa20, 0x102d5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa30, 0x102d6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa40, 0x102d7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa50, 0x102d8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa60, 0x102d9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa70, 0x102da}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa80, 0x102db}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa90, 0x102dc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xa94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xaa0, 0x102dd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xaa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xab0, 0x102de}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xab4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xac0, 0x102df}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xac4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xad0, 0x102e0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xad4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xae0, 0x102e1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xae4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xaf0, 0x102e2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xaf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb00, 0x102e3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb10, 0x102e4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb20, 0x102e5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb30, 0x102e6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb40, 0x102e7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb50, 0x102e8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb60, 0x102e9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb70, 0x102ea}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb80, 0x102eb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb90, 0x102ec}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xb94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xba0, 0x102ed}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xba4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbb0, 0x102ee}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbc0, 0x102ef}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbd0, 0x102f0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbe0, 0x102f1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbe4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbf0, 0x102f2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xbf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc00, 0x102f3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc10, 0x102f4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc20, 0x102f5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc30, 0x102f6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc40, 0x102f7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc50, 0x102f8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc60, 0x102f9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc70, 0x102fa}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc80, 0x102fb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc90, 0x102fc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xc94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xca0, 0x102fd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xca4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xcb0, 0x102fe}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xcb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xcc0, 0x102ff}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xcc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xcd0, 0x10300}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xcd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xce0, 0x10301}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xce4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xcf0, 0x10302}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xcf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd00, 0x10303}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd10, 0x10304}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd20, 0x10305}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd30, 0x10306}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd40, 0x10307}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd50, 0x10308}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd60, 0x10309}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd70, 0x1030a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd80, 0x1030b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd90, 0x1030c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xd94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xda0, 0x1030d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xda4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xdb0, 0x1030e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xdb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xdc0, 0x1030f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xdc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xdd0, 0x10310}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xdd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xde0, 0x10311}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xde4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xdf0, 0x10312}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xdf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe00, 0x10313}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe10, 0x10314}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe20, 0x10315}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe30, 0x10316}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe40, 0x10317}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe50, 0x10318}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe60, 0x10319}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe70, 0x1031a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe80, 0x1031b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe90, 0x1031c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xe94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xea0, 0x1031d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xea4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xeb0, 0x1031e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xeb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xec0, 0x1031f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xec4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xed0, 0x10320}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xed4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xee0, 0x10321}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xee4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xef0, 0x10322}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xef4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf00, 0x10323}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf10, 0x10324}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf20, 0x10325}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf30, 0x10326}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf40, 0x10327}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf50, 0x10328}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf60, 0x10329}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf70, 0x1032a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf80, 0x1032b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf90, 0x1032c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xf94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfa0, 0x1032d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfb0, 0x1032e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfc0, 0x1032f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfd0, 0x10330}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfe0, 0x10331}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000 + 0xfe4, 0x7}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4cb0, 0x80332}, -/* #define TSEM_COMMON_END 111 */ -/* #define TSEM_PORT0_START 112 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4000, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4020, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4810, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2580, 0x12}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x800, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x820, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x2fb0, 0x2033a}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4cf0, 0x2033c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5000, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9c0, 0x48}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2500, 0x10}, -/* #define TSEM_PORT0_END 113 */ -/* #define TSEM_PORT1_START 114 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4010, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4028, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4818, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x25c8, 0x12}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x810, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x868, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x2fb8, 0x2033e}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4cf8, 0x20340}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5010, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xae0, 0x48}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2540, 0x10}, -/* #define TSEM_PORT1_END 115 */ -/* #define MISC_COMMON_START 220 */ - {OP_WR, MISC_REG_GENERIC_HW_0, 0xaffdc}, - {OP_WR, MISC_REG_GRC_TIMEOUT_EN, 0x1}, - {OP_WR, MISC_REG_PLL_STORM_CTRL_1, 0x71d2911}, - {OP_WR, MISC_REG_PLL_STORM_CTRL_2, 0x0}, - {OP_WR, MISC_REG_PLL_STORM_CTRL_3, 0x9c0424}, - {OP_WR, MISC_REG_PLL_STORM_CTRL_4, 0x0}, - {OP_WR, MISC_REG_LCPLL_CTRL_1, 0x209}, - {OP_WR, MISC_REG_SPIO, 0xff000000}, -/* #define MISC_COMMON_END 221 */ -/* #define NIG_COMMON_START 264 */ - {OP_WR, NIG_REG_PBF_LB_IN_EN, 0x1}, - {OP_WR, NIG_REG_PRS_REQ_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_DEBUG_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB_LB_OUT_EN, 0x1}, - {OP_WR, NIG_REG_PRS_EOP_OUT_EN, 0x1}, -/* #define NIG_COMMON_END 265 */ -/* #define NIG_PORT0_START 266 */ - {OP_WR, NIG_REG_LLH0_CM_HEADER, 0x300000}, - {OP_WR, NIG_REG_LLH0_EVENT_ID, 0x28}, - {OP_WR, NIG_REG_LLH0_ERROR_MASK, 0x0}, - {OP_WR, NIG_REG_LLH0_XCM_MASK, 0x4}, - {OP_WR, NIG_REG_LLH0_BRB1_NOT_MCP, 0x1}, - {OP_WR, NIG_REG_STATUS_INTERRUPT_PORT0, 0x0}, - {OP_WR, NIG_REG_LLH0_XCM_INIT_CREDIT, 0x30}, - {OP_WR, NIG_REG_BRB0_PAUSE_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_PBF0_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB0_OUT_EN, 0x1}, - {OP_WR, NIG_REG_XCM0_OUT_EN, 0x1}, -/* #define NIG_PORT0_END 267 */ -/* #define NIG_PORT1_START 268 */ - {OP_WR, NIG_REG_LLH1_CM_HEADER, 0x300000}, - {OP_WR, NIG_REG_LLH1_EVENT_ID, 0x28}, - {OP_WR, NIG_REG_LLH1_ERROR_MASK, 0x0}, - {OP_WR, NIG_REG_LLH1_XCM_MASK, 0x4}, - {OP_WR, NIG_REG_LLH1_BRB1_NOT_MCP, 0x1}, - {OP_WR, NIG_REG_STATUS_INTERRUPT_PORT1, 0x0}, - {OP_WR, NIG_REG_LLH1_XCM_INIT_CREDIT, 0x30}, - {OP_WR, NIG_REG_BRB1_PAUSE_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_PBF1_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB1_OUT_EN, 0x1}, - {OP_WR, NIG_REG_XCM1_OUT_EN, 0x1}, -/* #define NIG_PORT1_END 269 */ -/* #define UPB_COMMON_START 308 */ - {OP_WR, GRCBASE_UPB + PB_REG_CONTROL, 0x20}, -/* #define UPB_COMMON_END 309 */ -/* #define CSDM_COMMON_START 330 */ - {OP_WR, CSDM_REG_CFC_RSP_START_ADDR, 0xa11}, - {OP_WR, CSDM_REG_CMP_COUNTER_START_ADDR, 0xa00}, - {OP_WR, CSDM_REG_Q_COUNTER_START_ADDR, 0xa04}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_0, 0x20}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_1, 0x21}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_2, 0x22}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_3, 0x23}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_4, 0x24}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_5, 0x25}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_6, 0x26}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_7, 0x27}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_8, 0x28}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_9, 0x29}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_10, 0x2a}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_11, 0x2b}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_12, 0x2c}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_13, 0x2d}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_14, 0x2e}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_15, 0x2f}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_16, 0x10}, - {OP_ZR, CSDM_REG_AGG_INT_EVENT_17, 0x4f}, - {OP_WR, CSDM_REG_AGG_INT_MODE_0, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_1, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_2, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_3, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_4, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_5, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_6, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_7, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_8, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_9, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_10, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_11, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_12, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_13, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_14, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_15, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_16, 0x1}, - {OP_ZR, CSDM_REG_AGG_INT_MODE_17, 0xf}, - {OP_WR, CSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, CSDM_REG_ENABLE_IN2, 0x3f}, - {OP_WR, CSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, CSDM_REG_ENABLE_OUT2, 0xf}, - {OP_RD, CSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR, CSDM_REG_INIT_CREDIT_PXP_CTRL, 0x1}, - {OP_WR_ASIC, CSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, CSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, CSDM_REG_TIMER_TICK, 0xa}, -/* #define CSDM_COMMON_END 331 */ -/* #define USDM_COMMON_START 352 */ - {OP_WR, USDM_REG_CFC_RSP_START_ADDR, 0x562}, - {OP_WR, USDM_REG_CMP_COUNTER_START_ADDR, 0x551}, - {OP_WR, USDM_REG_Q_COUNTER_START_ADDR, 0x555}, - {OP_WR, USDM_REG_PCK_END_MSG_START_ADDR, 0x572}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, USDM_REG_AGG_INT_EVENT_0, 0x46}, - {OP_WR, USDM_REG_AGG_INT_EVENT_1, 0xc}, - {OP_ZR, USDM_REG_AGG_INT_EVENT_2, 0x5e}, - {OP_WR, USDM_REG_AGG_INT_MODE_0, 0x1}, - {OP_ZR, USDM_REG_AGG_INT_MODE_1, 0x1f}, - {OP_WR, USDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, USDM_REG_ENABLE_IN2, 0x3f}, - {OP_WR, USDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, USDM_REG_ENABLE_OUT2, 0xf}, - {OP_RD, USDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q2_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, USDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, USDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR, USDM_REG_INIT_CREDIT_PXP_CTRL, 0x1}, - {OP_WR_ASIC, USDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, USDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, USDM_REG_TIMER_TICK, 0xa}, -/* #define USDM_COMMON_END 353 */ -/* #define CCM_COMMON_START 374 */ - {OP_ZR, CCM_REG_AG_CTX, 0xa00}, - {OP_WR, CCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, CCM_REG_CQM_CCM_HDR_P, 0x2150020}, - {OP_WR, CCM_REG_CQM_CCM_HDR_S, 0x2150020}, - {OP_WR, CCM_REG_ERR_CCM_HDR, 0x8100000}, - {OP_WR, CCM_REG_ERR_EVNT_ID, 0x33}, - {OP_WR, CCM_REG_STORM_WEIGHT, 0x2}, - {OP_WR, CCM_REG_TSEM_WEIGHT, 0x0}, - {OP_WR, CCM_REG_XSEM_WEIGHT, 0x5}, - {OP_WR, CCM_REG_USEM_WEIGHT, 0x5}, - {OP_ZR, CCM_REG_PBF_WEIGHT, 0x2}, - {OP_WR, CCM_REG_CSDM_WEIGHT, 0x2}, - {OP_WR, CCM_REG_CQM_P_WEIGHT, 0x3}, - {OP_WR, CCM_REG_CQM_S_WEIGHT, 0x2}, - {OP_WR, CCM_REG_CCM_CQM_USE_Q, 0x1}, - {OP_WR, CCM_REG_CNT_AUX1_Q, 0x2}, - {OP_WR, CCM_REG_CNT_AUX2_Q, 0x2}, - {OP_WR, CCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, CCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, CCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, CCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, CCM_REG_CQM_INIT_CRD, 0x20}, - {OP_WR, CCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, CCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, CCM_REG_XX_INIT_CRD, 0x3}, - {OP_WR, CCM_REG_XX_MSG_NUM, 0x18}, - {OP_ZR, CCM_REG_XX_TABLE, 0x12}, - {OP_SW, CCM_REG_XX_DESCR_TABLE, 0x180342}, - {OP_ZR, CCM_REG_XX_DESCR_TABLE + 0x60, 0xc}, - {OP_WR, CCM_REG_N_SM_CTX_LD_0, 0x1}, - {OP_WR, CCM_REG_N_SM_CTX_LD_1, 0x2}, - {OP_WR, CCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, CCM_REG_N_SM_CTX_LD_3, 0x8}, - {OP_ZR, CCM_REG_N_SM_CTX_LD_4, 0x4}, - {OP_WR, CCM_REG_CCM_REG0_SZ, 0x4}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x9}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x29}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0xa}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x2a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x0}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x20}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x0}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x20}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x20}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x0}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x20}, - {OP_WR, CCM_REG_CCM_STORM0_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_STORM1_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_CQM_IFEN, 0x1}, - {OP_WR, CCM_REG_STORM_CCM_IFEN, 0x1}, - {OP_WR, CCM_REG_CQM_CCM_IFEN, 0x1}, - {OP_WR, CCM_REG_CSDM_IFEN, 0x1}, - {OP_WR, CCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, CCM_REG_XSEM_IFEN, 0x1}, - {OP_WR, CCM_REG_USEM_IFEN, 0x1}, - {OP_WR, CCM_REG_PBF_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_CFC_IFEN, 0x1}, -/* #define CCM_COMMON_END 375 */ -/* #define UCM_COMMON_START 396 */ - {OP_ZR, UCM_REG_AG_CTX, 0x800}, - {OP_WR, UCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, UCM_REG_UQM_UCM_HDR_P, 0x2150020}, - {OP_WR, UCM_REG_UQM_UCM_HDR_S, 0x2150020}, - {OP_WR, UCM_REG_TM_UCM_HDR, 0x30}, - {OP_WR, UCM_REG_ERR_UCM_HDR, 0x8100000}, - {OP_WR, UCM_REG_ERR_EVNT_ID, 0x33}, - {OP_WR, UCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, UCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, UCM_REG_STORM_WEIGHT, 0x2}, - {OP_WR, UCM_REG_TSEM_WEIGHT, 0x4}, - {OP_WR, UCM_REG_CSEM_WEIGHT, 0x0}, - {OP_WR, UCM_REG_XSEM_WEIGHT, 0x2}, - {OP_WR, UCM_REG_DORQ_WEIGHT, 0x2}, - {OP_WR, UCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, UCM_REG_USDM_WEIGHT, 0x2}, - {OP_WR, UCM_REG_UQM_P_WEIGHT, 0x7}, - {OP_WR, UCM_REG_UQM_S_WEIGHT, 0x2}, - {OP_WR, UCM_REG_TM_WEIGHT, 0x2}, - {OP_WR, UCM_REG_UCM_UQM_USE_Q, 0x1}, - {OP_WR, UCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, UCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, UCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, UCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, UCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, UCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, UCM_REG_TM_INIT_CRD, 0x4}, - {OP_WR, UCM_REG_UQM_INIT_CRD, 0x20}, - {OP_WR, UCM_REG_XX_INIT_CRD, 0xe}, - {OP_WR, UCM_REG_XX_MSG_NUM, 0x1b}, - {OP_ZR, UCM_REG_XX_TABLE, 0x12}, - {OP_SW, UCM_REG_XX_DESCR_TABLE, 0x1b035a}, - {OP_ZR, UCM_REG_XX_DESCR_TABLE + 0x6c, 0x5}, - {OP_WR, UCM_REG_N_SM_CTX_LD_0, 0xc}, - {OP_WR, UCM_REG_N_SM_CTX_LD_1, 0x8}, - {OP_WR, UCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, UCM_REG_N_SM_CTX_LD_3, 0x10}, - {OP_ZR, UCM_REG_N_SM_CTX_LD_4, 0x4}, - {OP_WR, UCM_REG_UCM_REG0_SZ, 0x3}, - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0xf}, - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x2f}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, UCM_REG_UCM_STORM0_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_STORM1_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_UQM_IFEN, 0x1}, - {OP_WR, UCM_REG_STORM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_UQM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_USDM_IFEN, 0x1}, - {OP_WR, UCM_REG_TM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_TM_IFEN, 0x1}, - {OP_WR, UCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_XSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_DORQ_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_CFC_IFEN, 0x1}, -/* #define UCM_COMMON_END 397 */ -/* #define USEM_COMMON_START 418 */ - {OP_ZP, USEM_REG_INT_TABLE, 0xab0000}, - {OP_WR_64, USEM_REG_INT_TABLE + 0x368, 0x130375}, - {OP_ZP, USEM_REG_PRAM, 0x33c10000}, - {OP_ZP, USEM_REG_PRAM + 0x8000, 0x32da0cf1}, - {OP_ZP, USEM_REG_PRAM + 0x10000, 0x1ca719a8}, - {OP_WR_64, USEM_REG_PRAM + 0x13e70, 0x58320377}, - {OP_RD, USEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, USEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, USEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, USEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, USEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, USEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, USEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, USEM_REG_TS_0_AS, 0x0}, - {OP_WR, USEM_REG_TS_1_AS, 0x1}, - {OP_WR, USEM_REG_TS_2_AS, 0x4}, - {OP_WR, USEM_REG_TS_3_AS, 0x0}, - {OP_WR, USEM_REG_TS_4_AS, 0x1}, - {OP_WR, USEM_REG_TS_5_AS, 0x3}, - {OP_WR, USEM_REG_TS_6_AS, 0x0}, - {OP_WR, USEM_REG_TS_7_AS, 0x1}, - {OP_WR, USEM_REG_TS_8_AS, 0x4}, - {OP_WR, USEM_REG_TS_9_AS, 0x0}, - {OP_WR, USEM_REG_TS_10_AS, 0x1}, - {OP_WR, USEM_REG_TS_11_AS, 0x3}, - {OP_WR, USEM_REG_TS_12_AS, 0x0}, - {OP_WR, USEM_REG_TS_13_AS, 0x1}, - {OP_WR, USEM_REG_TS_14_AS, 0x4}, - {OP_WR, USEM_REG_TS_15_AS, 0x0}, - {OP_WR, USEM_REG_TS_16_AS, 0x4}, - {OP_WR, USEM_REG_TS_17_AS, 0x3}, - {OP_ZR, USEM_REG_TS_18_AS, 0x2}, - {OP_WR, USEM_REG_ENABLE_IN, 0x3fff}, - {OP_WR, USEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, USEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, USEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, USEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, USEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, USEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18000, 0x1a}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18040, 0x4e}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18080, 0x10}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x180c0, 0x20}, - {OP_WR_ASIC, USEM_REG_FAST_MEMORY + 0x18300, 0x7a120}, - {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x18300, 0x138}, - {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18300, 0x1388}, - {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, USEM_REG_FAST_MEMORY + 0x18340, 0x1f4}, - {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18340, 0x5}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18380, 0x7a120}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x183c0, 0x1f4}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2a88, 0xc2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x23e8, 0x1a8}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x2e30, 0x40379}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x50a0, 0x4}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x50b8, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5080, 0x4}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x5080 + 0x10, 0x1037d}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5080 + 0x14, 0x3}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5000, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3000, 0x400}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1c00, 0x4}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x1830, 0x2037e}, -/* #define USEM_COMMON_END 419 */ -/* #define USEM_PORT0_START 420 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2da0, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3000, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3100, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3200, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3300, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3400, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3500, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3600, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3700, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3800, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3900, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3a00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3b00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3c00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3d00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3e00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3f00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1c10, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x45a0, 0x24}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4000, 0xb4}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x46c0, 0x120}, -/* #define USEM_PORT0_END 421 */ -/* #define USEM_PORT1_START 422 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2da8, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3080, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3180, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3280, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3380, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3480, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3580, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3680, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3780, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3880, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3980, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3a80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3b80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3c80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3d80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3e80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3f80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1c20, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4630, 0x24}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x42d0, 0xb4}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4b40, 0x120}, -/* #define USEM_PORT1_END 423 */ -/* #define CSEM_COMMON_START 440 */ - {OP_ZP, CSEM_REG_INT_TABLE, 0x870000}, - {OP_WR_64, CSEM_REG_INT_TABLE + 0x380, 0x100380}, - {OP_ZP, CSEM_REG_PRAM, 0x32aa0000}, - {OP_ZP, CSEM_REG_PRAM + 0x8000, 0x9eb0cab}, - {OP_WR_64, CSEM_REG_PRAM + 0x9280, 0x6c160382}, - {OP_RD, CSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, CSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, CSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, CSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, CSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, CSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, CSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, CSEM_REG_TS_0_AS, 0x0}, - {OP_WR, CSEM_REG_TS_1_AS, 0x1}, - {OP_WR, CSEM_REG_TS_2_AS, 0x4}, - {OP_WR, CSEM_REG_TS_3_AS, 0x0}, - {OP_WR, CSEM_REG_TS_4_AS, 0x1}, - {OP_WR, CSEM_REG_TS_5_AS, 0x3}, - {OP_WR, CSEM_REG_TS_6_AS, 0x0}, - {OP_WR, CSEM_REG_TS_7_AS, 0x1}, - {OP_WR, CSEM_REG_TS_8_AS, 0x4}, - {OP_WR, CSEM_REG_TS_9_AS, 0x0}, - {OP_WR, CSEM_REG_TS_10_AS, 0x1}, - {OP_WR, CSEM_REG_TS_11_AS, 0x3}, - {OP_WR, CSEM_REG_TS_12_AS, 0x0}, - {OP_WR, CSEM_REG_TS_13_AS, 0x1}, - {OP_WR, CSEM_REG_TS_14_AS, 0x4}, - {OP_WR, CSEM_REG_TS_15_AS, 0x0}, - {OP_WR, CSEM_REG_TS_16_AS, 0x4}, - {OP_WR, CSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, CSEM_REG_TS_18_AS, 0x2}, - {OP_WR, CSEM_REG_ENABLE_IN, 0x3fff}, - {OP_WR, CSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, CSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, CSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, CSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, CSEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, CSEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18000, 0x10}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18040, 0x12}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18080, 0x30}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x180c0, 0xe}, - {OP_WR_ASIC, CSEM_REG_FAST_MEMORY + 0x18300, 0x7a120}, - {OP_WR_EMUL, CSEM_REG_FAST_MEMORY + 0x18300, 0x138}, - {OP_WR_FPGA, CSEM_REG_FAST_MEMORY + 0x18300, 0x1388}, - {OP_WR_EMUL, CSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, CSEM_REG_FAST_MEMORY + 0x18340, 0x1f4}, - {OP_WR_FPGA, CSEM_REG_FAST_MEMORY + 0x18340, 0x5}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18380, 0x7a120}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5000, 0x42}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000, 0xc6}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x318, 0x50384}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x32c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x358, 0x50389}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x36c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x398, 0x5038e}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x3ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x3d8, 0x50393}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x3ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x418, 0x50398}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x42c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x458, 0x5039d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x46c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x498, 0x503a2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x4ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x4d8, 0x503a7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x4ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x518, 0x503ac}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x52c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x558, 0x503b1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x56c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x598, 0x503b6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x5ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x5d8, 0x503bb}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x5ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x618, 0x503c0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x62c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x658, 0x503c5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x66c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x698, 0x503ca}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x6ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x6d8, 0x503cf}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x6ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x718, 0x503d4}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x72c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x758, 0x503d9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x76c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x798, 0x503de}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x7ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x7d8, 0x503e3}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x7ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x818, 0x503e8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x82c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x858, 0x503ed}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x86c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x898, 0x503f2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x8ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x8d8, 0x503f7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x8ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x918, 0x503fc}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x92c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x958, 0x50401}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x96c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x998, 0x50406}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x9ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0x9d8, 0x5040b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0x9ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0xa18, 0x50410}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0xa2c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0xa58, 0x50415}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0xa6c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0xa98, 0x5041a}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0xaac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4000 + 0xad8, 0x5041f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000 + 0xaec, 0x5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4b00, 0x17}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4b00 + 0x5c, 0x10424}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4b00 + 0x60, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x4b00 + 0x6c, 0x10425}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3800, 0x40}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3000, 0x200}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x5198, 0x40426}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1000, 0xc0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x15c0, 0x240}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x1ec8, 0x8042a}, -/* #define CSEM_COMMON_END 441 */ -/* #define CSEM_PORT0_START 442 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3900, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5108, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x51a8, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1300, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1410, 0x30}, -/* #define CSEM_PORT0_END 443 */ -/* #define CSEM_PORT1_START 444 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3920, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5110, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x51c0, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1308, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x14d0, 0x30}, -/* #define CSEM_PORT1_END 445 */ -/* #define XPB_COMMON_START 462 */ - {OP_WR, GRCBASE_XPB + PB_REG_CONTROL, 0x28}, -/* #define XPB_COMMON_END 463 */ -/* #define DQ_COMMON_START 484 */ - {OP_WR, DORQ_REG_MODE_ACT, 0x2}, - {OP_WR, DORQ_REG_NORM_CID_OFST, 0x3}, - {OP_WR, DORQ_REG_OUTST_REQ, 0x4}, - {OP_WR, DORQ_REG_DPM_CID_ADDR, 0x0}, - {OP_WR, DORQ_REG_RSP_INIT_CRD, 0x2}, - {OP_WR, DORQ_REG_NORM_CMHEAD_TX, 0x90}, - {OP_WR, DORQ_REG_CMHEAD_RX, 0x90}, - {OP_WR, DORQ_REG_SHRT_CMHEAD, 0x800090}, - {OP_WR, DORQ_REG_ERR_CMHEAD, 0x8100000}, - {OP_WR, DORQ_REG_AGG_CMD0, 0x8a}, - {OP_WR, DORQ_REG_AGG_CMD1, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD2, 0x81}, - {OP_WR, DORQ_REG_AGG_CMD3, 0x80}, - {OP_WR, DORQ_REG_SHRT_ACT_CNT, 0x6}, - {OP_WR, DORQ_REG_DQ_FIFO_FULL_TH, 0x7d0}, - {OP_WR, DORQ_REG_DQ_FIFO_AFULL_TH, 0x76c}, - {OP_WR, DORQ_REG_REGN, 0x7c1004}, - {OP_WR, DORQ_REG_IF_EN, 0xf}, -/* #define DQ_COMMON_END 485 */ -/* #define TIMERS_COMMON_START 506 */ - {OP_ZR, TM_REG_CLIN_PRIOR0_CLIENT, 0x2}, - {OP_WR, TM_REG_LIN_SETCLR_FIFO_ALFULL_THR, 0x1c}, - {OP_WR, TM_REG_CFC_AC_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_CFC_CLD_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT0_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT1_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT2_VAL, 0x1}, - {OP_WR, TM_REG_EXP_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_PCIARB_CRDCNT_VAL, 0x1}, - {OP_WR_ASIC, TM_REG_TIMER_TICK_SIZE, 0x3d090}, - {OP_WR_EMUL, TM_REG_TIMER_TICK_SIZE, 0x9c}, - {OP_WR_FPGA, TM_REG_TIMER_TICK_SIZE, 0x9c4}, - {OP_WR, TM_REG_CL0_CONT_REGION, 0x8}, - {OP_WR, TM_REG_CL1_CONT_REGION, 0xc}, - {OP_WR, TM_REG_CL2_CONT_REGION, 0x10}, - {OP_WR, TM_REG_TM_CONTEXT_REGION, 0x20}, - {OP_WR, TM_REG_EN_TIMERS, 0x1}, - {OP_WR, TM_REG_EN_REAL_TIME_CNT, 0x1}, - {OP_WR, TM_REG_EN_CL0_INPUT, 0x1}, - {OP_WR, TM_REG_EN_CL1_INPUT, 0x1}, - {OP_WR, TM_REG_EN_CL2_INPUT, 0x1}, -/* #define TIMERS_COMMON_END 507 */ -/* #define TIMERS_PORT0_START 508 */ - {OP_WR, TM_REG_LIN0_LOGIC_ADDR, 0x0}, - {OP_WR, TM_REG_LIN0_PHY_ADDR_VALID, 0x0}, - {OP_ZR, TM_REG_LIN0_PHY_ADDR, 0x2}, -/* #define TIMERS_PORT0_END 509 */ -/* #define TIMERS_PORT1_START 510 */ - {OP_WR, TM_REG_LIN1_LOGIC_ADDR, 0x0}, - {OP_WR, TM_REG_LIN1_PHY_ADDR_VALID, 0x0}, - {OP_ZR, TM_REG_LIN1_PHY_ADDR, 0x2}, -/* #define TIMERS_PORT1_END 511 */ -/* #define XSDM_COMMON_START 528 */ - {OP_WR, XSDM_REG_CFC_RSP_START_ADDR, 0x614}, - {OP_WR, XSDM_REG_CMP_COUNTER_START_ADDR, 0x600}, - {OP_WR, XSDM_REG_Q_COUNTER_START_ADDR, 0x604}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_0, 0x20}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_1, 0x20}, - {OP_ZR, XSDM_REG_AGG_INT_EVENT_2, 0x2}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_4, 0x23}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_5, 0x24}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_6, 0x25}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_7, 0x26}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_8, 0x27}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_9, 0x29}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_10, 0x2a}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_11, 0x2b}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_12, 0x2c}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_13, 0x2d}, - {OP_ZR, XSDM_REG_AGG_INT_EVENT_14, 0x12}, - {OP_WR, XSDM_REG_AGG_INT_T_0, 0x1}, - {OP_WR, XSDM_REG_AGG_INT_T_1, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_T_2, 0x3e}, - {OP_WR, XSDM_REG_AGG_INT_MODE_0, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_MODE_1, 0x1f}, - {OP_WR, XSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, XSDM_REG_ENABLE_IN2, 0x3f}, - {OP_WR, XSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, XSDM_REG_ENABLE_OUT2, 0xf}, - {OP_RD, XSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR, XSDM_REG_INIT_CREDIT_PXP_CTRL, 0x1}, - {OP_WR_ASIC, XSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, XSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, XSDM_REG_TIMER_TICK, 0xa}, -/* #define XSDM_COMMON_END 529 */ -/* #define QM_COMMON_START 550 */ - {OP_WR, QM_REG_ACTCTRINITVAL_0, 0x6}, - {OP_WR, QM_REG_ACTCTRINITVAL_1, 0x5}, - {OP_WR, QM_REG_ACTCTRINITVAL_2, 0xa}, - {OP_WR, QM_REG_ACTCTRINITVAL_3, 0x5}, - {OP_WR, QM_REG_PCIREQAT, 0x2}, - {OP_WR, QM_REG_CMINITCRD_0, 0x4}, - {OP_WR, QM_REG_CMINITCRD_1, 0x4}, - {OP_WR, QM_REG_CMINITCRD_2, 0x4}, - {OP_WR, QM_REG_CMINITCRD_3, 0x4}, - {OP_WR, QM_REG_CMINITCRD_4, 0x4}, - {OP_WR, QM_REG_CMINITCRD_5, 0x4}, - {OP_WR, QM_REG_CMINITCRD_6, 0x4}, - {OP_WR, QM_REG_CMINITCRD_7, 0x4}, - {OP_WR, QM_REG_OUTLDREQ, 0x4}, - {OP_WR, QM_REG_CTXREG_0, 0x7c}, - {OP_WR, QM_REG_CTXREG_1, 0x3d}, - {OP_WR, QM_REG_CTXREG_2, 0x3f}, - {OP_WR, QM_REG_CTXREG_3, 0x9c}, - {OP_WR, QM_REG_ENSEC, 0x7}, - {OP_ZR, QM_REG_QVOQIDX_0, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_0, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_5, 0x0}, - {OP_WR, QM_REG_QVOQIDX_6, 0x4}, - {OP_WR, QM_REG_QVOQIDX_7, 0x4}, - {OP_WR, QM_REG_QVOQIDX_8, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_1, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_9, 0x5}, - {OP_WR, QM_REG_QVOQIDX_10, 0x5}, - {OP_WR, QM_REG_QVOQIDX_11, 0x5}, - {OP_WR, QM_REG_QVOQIDX_12, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_2, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_13, 0x8}, - {OP_WR, QM_REG_QVOQIDX_14, 0x6}, - {OP_WR, QM_REG_QVOQIDX_15, 0x7}, - {OP_WR, QM_REG_QVOQIDX_16, 0x0}, - {OP_WR, QM_REG_WRRWEIGHTS_3, 0x1010120}, - {OP_ZR, QM_REG_QVOQIDX_17, 0x4}, - {OP_WR, QM_REG_WRRWEIGHTS_4, 0x1010101}, - {OP_ZR, QM_REG_QVOQIDX_21, 0x4}, - {OP_WR, QM_REG_WRRWEIGHTS_5, 0x1010101}, - {OP_ZR, QM_REG_QVOQIDX_25, 0x4}, - {OP_WR, QM_REG_WRRWEIGHTS_6, 0x1010101}, - {OP_ZR, QM_REG_QVOQIDX_29, 0x3}, - {OP_WR, QM_REG_QVOQIDX_32, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_7, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_33, 0x1}, - {OP_WR, QM_REG_QVOQIDX_34, 0x1}, - {OP_WR, QM_REG_QVOQIDX_35, 0x1}, - {OP_WR, QM_REG_QVOQIDX_36, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_8, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_37, 0x1}, - {OP_WR, QM_REG_QVOQIDX_38, 0x4}, - {OP_WR, QM_REG_QVOQIDX_39, 0x4}, - {OP_WR, QM_REG_QVOQIDX_40, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_9, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_41, 0x5}, - {OP_WR, QM_REG_QVOQIDX_42, 0x5}, - {OP_WR, QM_REG_QVOQIDX_43, 0x5}, - {OP_WR, QM_REG_QVOQIDX_44, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_10, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_45, 0x8}, - {OP_WR, QM_REG_QVOQIDX_46, 0x6}, - {OP_WR, QM_REG_QVOQIDX_47, 0x7}, - {OP_WR, QM_REG_QVOQIDX_48, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_11, 0x1010120}, - {OP_WR, QM_REG_QVOQIDX_49, 0x1}, - {OP_WR, QM_REG_QVOQIDX_50, 0x1}, - {OP_WR, QM_REG_QVOQIDX_51, 0x1}, - {OP_WR, QM_REG_QVOQIDX_52, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_12, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_53, 0x1}, - {OP_WR, QM_REG_QVOQIDX_54, 0x1}, - {OP_WR, QM_REG_QVOQIDX_55, 0x1}, - {OP_WR, QM_REG_QVOQIDX_56, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_13, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_57, 0x1}, - {OP_WR, QM_REG_QVOQIDX_58, 0x1}, - {OP_WR, QM_REG_QVOQIDX_59, 0x1}, - {OP_WR, QM_REG_QVOQIDX_60, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_14, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_61, 0x1}, - {OP_WR, QM_REG_QVOQIDX_62, 0x1}, - {OP_WR, QM_REG_QVOQIDX_63, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_15, 0x1010101}, - {OP_WR, QM_REG_VOQQMASK_0_LSB, 0xffff003f}, - {OP_ZR, QM_REG_VOQQMASK_0_MSB, 0x2}, - {OP_WR, QM_REG_VOQQMASK_1_MSB, 0xffff003f}, - {OP_WR, QM_REG_VOQQMASK_2_LSB, 0x100}, - {OP_WR, QM_REG_VOQQMASK_2_MSB, 0x100}, - {OP_ZR, QM_REG_VOQQMASK_3_LSB, 0x2}, - {OP_WR, QM_REG_VOQQMASK_4_LSB, 0xc0}, - {OP_WR, QM_REG_VOQQMASK_4_MSB, 0xc0}, - {OP_WR, QM_REG_VOQQMASK_5_LSB, 0x1e00}, - {OP_WR, QM_REG_VOQQMASK_5_MSB, 0x1e00}, - {OP_WR, QM_REG_VOQQMASK_6_LSB, 0x4000}, - {OP_WR, QM_REG_VOQQMASK_6_MSB, 0x4000}, - {OP_WR, QM_REG_VOQQMASK_7_LSB, 0x8000}, - {OP_WR, QM_REG_VOQQMASK_7_MSB, 0x8000}, - {OP_WR, QM_REG_VOQQMASK_8_LSB, 0x2000}, - {OP_WR, QM_REG_VOQQMASK_8_MSB, 0x2000}, - {OP_ZR, QM_REG_VOQQMASK_9_LSB, 0x7}, - {OP_WR, QM_REG_VOQPORT_1, 0x1}, - {OP_ZR, QM_REG_VOQPORT_2, 0xa}, - {OP_WR, QM_REG_CMINTVOQMASK_0, 0xc08}, - {OP_WR, QM_REG_CMINTVOQMASK_1, 0x40}, - {OP_WR, QM_REG_CMINTVOQMASK_2, 0x100}, - {OP_WR, QM_REG_CMINTVOQMASK_3, 0x20}, - {OP_WR, QM_REG_CMINTVOQMASK_4, 0x17}, - {OP_WR, QM_REG_CMINTVOQMASK_5, 0x80}, - {OP_WR, QM_REG_CMINTVOQMASK_6, 0x200}, - {OP_WR, QM_REG_CMINTVOQMASK_7, 0x0}, - {OP_WR, QM_REG_HWAEMPTYMASK_LSB, 0xffff01ff}, - {OP_WR, QM_REG_HWAEMPTYMASK_MSB, 0xffff01ff}, - {OP_WR, QM_REG_ENBYPVOQMASK, 0x13}, - {OP_WR, QM_REG_VOQCREDITAFULLTHR, 0x13f}, - {OP_WR, QM_REG_VOQINITCREDIT_0, 0x140}, - {OP_WR, QM_REG_VOQINITCREDIT_1, 0x140}, - {OP_ZR, QM_REG_VOQINITCREDIT_2, 0x2}, - {OP_WR, QM_REG_VOQINITCREDIT_4, 0xc0}, - {OP_ZR, QM_REG_VOQINITCREDIT_5, 0x7}, - {OP_WR, QM_REG_TASKCRDCOST_0, 0x48}, - {OP_WR, QM_REG_TASKCRDCOST_1, 0x48}, - {OP_ZR, QM_REG_TASKCRDCOST_2, 0x2}, - {OP_WR, QM_REG_TASKCRDCOST_4, 0x48}, - {OP_ZR, QM_REG_TASKCRDCOST_5, 0x7}, - {OP_WR, QM_REG_BYTECRDINITVAL, 0x8000}, - {OP_WR, QM_REG_BYTECRDCOST, 0x25e4}, - {OP_WR, QM_REG_BYTECREDITAFULLTHR, 0x7fff}, - {OP_WR, QM_REG_ENBYTECRD_LSB, 0x7}, - {OP_WR, QM_REG_ENBYTECRD_MSB, 0x7}, - {OP_WR, QM_REG_BYTECRDPORT_LSB, 0x0}, - {OP_WR, QM_REG_BYTECRDPORT_MSB, 0xffffffff}, - {OP_WR, QM_REG_FUNCNUMSEL_LSB, 0x0}, - {OP_WR, QM_REG_FUNCNUMSEL_MSB, 0xffffffff}, - {OP_WR, QM_REG_CMINTEN, 0xff}, -/* #define QM_COMMON_END 551 */ -/* #define PBF_COMMON_START 572 */ - {OP_WR, PBF_REG_INIT, 0x1}, - {OP_WR, PBF_REG_INIT_P4, 0x1}, - {OP_WR, PBF_REG_MAC_LB_ENABLE, 0x1}, - {OP_WR, PBF_REG_IF_ENABLE_REG, 0x7fff}, - {OP_WR, PBF_REG_INIT_P4, 0x0}, - {OP_WR, PBF_REG_INIT, 0x0}, - {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P4, 0x0}, -/* #define PBF_COMMON_END 573 */ -/* #define PBF_PORT0_START 574 */ - {OP_WR, PBF_REG_INIT_P0, 0x1}, - {OP_WR, PBF_REG_MAC_IF0_ENABLE, 0x1}, - {OP_WR, PBF_REG_INIT_P0, 0x0}, - {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P0, 0x0}, -/* #define PBF_PORT0_END 575 */ -/* #define PBF_PORT1_START 576 */ - {OP_WR, PBF_REG_INIT_P1, 0x1}, - {OP_WR, PBF_REG_MAC_IF1_ENABLE, 0x1}, - {OP_WR, PBF_REG_INIT_P1, 0x0}, - {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P1, 0x0}, -/* #define PBF_PORT1_END 577 */ -/* #define XCM_COMMON_START 594 */ - {OP_ZR, XCM_REG_AG_CTX, 0x2000}, - {OP_WR, XCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, XCM_REG_XQM_XCM_HDR_P, 0x3150020}, - {OP_WR, XCM_REG_XQM_XCM_HDR_S, 0x3150020}, - {OP_WR, XCM_REG_TM_XCM_HDR, 0x1000030}, - {OP_WR, XCM_REG_ERR_XCM_HDR, 0x8100000}, - {OP_WR, XCM_REG_ERR_EVNT_ID, 0x33}, - {OP_WR, XCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, XCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, XCM_REG_STORM_WEIGHT, 0x3}, - {OP_WR, XCM_REG_TSEM_WEIGHT, 0x6}, - {OP_WR, XCM_REG_CSEM_WEIGHT, 0x3}, - {OP_WR, XCM_REG_USEM_WEIGHT, 0x3}, - {OP_WR, XCM_REG_DORQ_WEIGHT, 0x2}, - {OP_WR, XCM_REG_PBF_WEIGHT, 0x0}, - {OP_WR, XCM_REG_NIG0_WEIGHT, 0x2}, - {OP_WR, XCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, XCM_REG_XSDM_WEIGHT, 0x6}, - {OP_WR, XCM_REG_XQM_P_WEIGHT, 0x4}, - {OP_WR, XCM_REG_XQM_S_WEIGHT, 0x2}, - {OP_WR, XCM_REG_TM_WEIGHT, 0x2}, - {OP_WR, XCM_REG_XCM_XQM_USE_Q, 0x1}, - {OP_WR, XCM_REG_XQM_BYP_ACT_UPD, 0x6}, - {OP_WR, XCM_REG_UNA_GT_NXT_Q, 0x0}, - {OP_WR, XCM_REG_AUX1_Q, 0x2}, - {OP_WR, XCM_REG_AUX_CNT_FLG_Q_19, 0x1}, - {OP_WR, XCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, XCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, XCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, XCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, XCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, XCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, XCM_REG_TM_INIT_CRD, 0x4}, - {OP_WR, XCM_REG_XQM_INIT_CRD, 0x20}, - {OP_WR, XCM_REG_XX_INIT_CRD, 0x2}, - {OP_WR, XCM_REG_XX_MSG_NUM, 0x1f}, - {OP_ZR, XCM_REG_XX_TABLE, 0x12}, - {OP_SW, XCM_REG_XX_DESCR_TABLE, 0x200432}, - {OP_WR, XCM_REG_N_SM_CTX_LD_0, 0xf}, - {OP_WR, XCM_REG_N_SM_CTX_LD_1, 0x7}, - {OP_WR, XCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, XCM_REG_N_SM_CTX_LD_3, 0xe}, - {OP_ZR, XCM_REG_N_SM_CTX_LD_4, 0x4}, - {OP_WR, XCM_REG_XCM_REG0_SZ, 0x4}, - {OP_WR, XCM_REG_XCM_STORM0_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_STORM1_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_XQM_IFEN, 0x1}, - {OP_WR, XCM_REG_STORM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XQM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XSDM_IFEN, 0x1}, - {OP_WR, XCM_REG_TM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_TM_IFEN, 0x1}, - {OP_WR, XCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, XCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, XCM_REG_USEM_IFEN, 0x1}, - {OP_WR, XCM_REG_DORQ_IFEN, 0x1}, - {OP_WR, XCM_REG_PBF_IFEN, 0x1}, - {OP_WR, XCM_REG_NIG0_IFEN, 0x1}, - {OP_WR, XCM_REG_NIG1_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_CFC_IFEN, 0x1}, -/* #define XCM_COMMON_END 595 */ -/* #define XCM_PORT0_START 596 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, -/* #define XCM_PORT0_END 597 */ -/* #define XCM_PORT1_START 598 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, -/* #define XCM_PORT1_END 599 */ -/* #define XSEM_COMMON_START 616 */ - {OP_ZP, XSEM_REG_INT_TABLE, 0x8f0000}, - {OP_WR_64, XSEM_REG_INT_TABLE + 0x368, 0x130452}, - {OP_ZP, XSEM_REG_PRAM, 0x32df0000}, - {OP_ZP, XSEM_REG_PRAM + 0x8000, 0x37270cb8}, - {OP_ZP, XSEM_REG_PRAM + 0x10000, 0x38e21a82}, - {OP_ZP, XSEM_REG_PRAM + 0x18000, 0x1b0528bb}, - {OP_WR_64, XSEM_REG_PRAM + 0x1b950, 0x48d60454}, - {OP_RD, XSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, XSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, XSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, XSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, XSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, XSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, XSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, XSEM_REG_TS_0_AS, 0x0}, - {OP_WR, XSEM_REG_TS_1_AS, 0x1}, - {OP_WR, XSEM_REG_TS_2_AS, 0x4}, - {OP_WR, XSEM_REG_TS_3_AS, 0x0}, - {OP_WR, XSEM_REG_TS_4_AS, 0x1}, - {OP_WR, XSEM_REG_TS_5_AS, 0x3}, - {OP_WR, XSEM_REG_TS_6_AS, 0x0}, - {OP_WR, XSEM_REG_TS_7_AS, 0x1}, - {OP_WR, XSEM_REG_TS_8_AS, 0x4}, - {OP_WR, XSEM_REG_TS_9_AS, 0x0}, - {OP_WR, XSEM_REG_TS_10_AS, 0x1}, - {OP_WR, XSEM_REG_TS_11_AS, 0x3}, - {OP_WR, XSEM_REG_TS_12_AS, 0x0}, - {OP_WR, XSEM_REG_TS_13_AS, 0x1}, - {OP_WR, XSEM_REG_TS_14_AS, 0x4}, - {OP_WR, XSEM_REG_TS_15_AS, 0x0}, - {OP_WR, XSEM_REG_TS_16_AS, 0x4}, - {OP_WR, XSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, XSEM_REG_TS_18_AS, 0x2}, - {OP_WR, XSEM_REG_ENABLE_IN, 0x3fff}, - {OP_WR, XSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, XSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, XSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, XSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, XSEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, XSEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18000, 0x0}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18040, 0x18}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18080, 0xc}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x180c0, 0x66}, - {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18300, 0x7a120}, - {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18300, 0x138}, - {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18300, 0x1388}, - {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18340, 0x1f4}, - {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18340, 0x5}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18380, 0x7a120}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3c00, 0x4}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3c00 + 0x10, 0x20456}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3c00 + 0x18, 0x6}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3000, 0x48}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3128, 0x8e}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3368, 0x3}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3368 + 0xc, 0x10458}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3368 + 0x10, 0x168}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3930, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3930 + 0x8, 0x20459}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3928, 0x2045b}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3ce0, 0x2045d}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3d68, 0x4045f}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x2500, 0x20463}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x2500 + 0x8, 0x100}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x2970, 0x4}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x2960, 0x40465}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x2f48, 0x20469}, -/* #define XSEM_COMMON_END 617 */ -/* #define XSEM_PORT0_START 618 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3918, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3940, 0x32}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3c40, 0x10046b}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5020, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5030, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5000, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5010, 0x2}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x50b8, 0x1}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5048, 0xe}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3c30, 0x2047b}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3ad0, 0x26}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x5040, 0x0}, -/* #define XSEM_PORT0_END 619 */ -/* #define XSEM_PORT1_START 620 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3920, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3a08, 0x32}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3c80, 0x10047d}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5028, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5038, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5008, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5018, 0x2}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x50bc, 0x1}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5080, 0xe}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3c38, 0x2048d}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3b68, 0x26}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x5044, 0x0}, -/* #define XSEM_PORT1_END 621 */ -/* #define CDU_COMMON_START 638 */ - {OP_WR, CDU_REG_CDU_CONTROL0, 0x1}, - {OP_WR, CDU_REG_CDU_DEBUG, 0x264}, - {OP_WR, CDU_REG_CDU_CHK_MASK0, 0x3d000}, - {OP_WR, CDU_REG_CDU_CHK_MASK1, 0x3d}, - {OP_WB, CDU_REG_L1TT, 0x200048f}, - {OP_WB, CDU_REG_MATT, 0x10068f}, - {OP_ZR, CDU_REG_MATT + 0x40, 0x8}, - {OP_WB, CDU_REG_MATT + 0x60, 0x8069f}, - {OP_ZR, CDU_REG_MATT + 0x80, 0x2}, - {OP_WB, CDU_REG_MATT + 0x88, 0x606a7}, - {OP_ZR, CDU_REG_MATT + 0xa0, 0x18}, - {OP_WR, CDU_REG_CDU_DEBUG, 0x0}, -/* #define CDU_COMMON_END 639 */ -/* #define DMAE_COMMON_START 660 */ - {OP_ZR, DMAE_REG_CMD_MEM, 0xe0}, - {OP_WR, DMAE_REG_CRC16C_INIT, 0x0}, - {OP_WR, DMAE_REG_CRC16T10_INIT, 0x1}, - {OP_WR, DMAE_REG_PXP_REQ_INIT_CRD, 0x1}, - {OP_WR, DMAE_REG_PCI_IFEN, 0x1}, - {OP_WR, DMAE_REG_GRC_IFEN, 0x1}, -/* #define DMAE_COMMON_END 661 */ -/* #define PXP_COMMON_START 682 */ - {OP_WB, PXP_REG_HST_INBOUND_INT + 0x400, 0x506ad}, - {OP_WB, PXP_REG_HST_INBOUND_INT + 0x420, 0x506b2}, - {OP_WB, PXP_REG_HST_INBOUND_INT, 0x506b7}, -/* #define PXP_COMMON_END 683 */ -/* #define CFC_COMMON_START 704 */ - {OP_WR, CFC_REG_CONTROL0, 0x10}, - {OP_WR, CFC_REG_DISABLE_ON_ERROR, 0x3fff}, - {OP_WR, CFC_REG_INTERFACES, 0x280000}, - {OP_WR, CFC_REG_LCREQ_WEIGHTS, 0x84924a}, - {OP_ZR, CFC_REG_LINK_LIST, 0x100}, - {OP_WR, CFC_REG_INTERFACES, 0x0}, -/* #define CFC_COMMON_END 705 */ -/* #define HC_COMMON_START 726 */ - {OP_ZR, HC_REG_USTORM_ADDR_FOR_COALESCE, 0x4}, -/* #define HC_COMMON_END 727 */ -/* #define HC_PORT0_START 728 */ - {OP_WR, HC_REG_CONFIG_0, 0x1080}, - {OP_ZR, HC_REG_UC_RAM_ADDR_0, 0x2}, - {OP_WR, HC_REG_ATTN_NUM_P0, 0x10}, - {OP_WR, HC_REG_LEADING_EDGE_0, 0xffff}, - {OP_WR, HC_REG_TRAILING_EDGE_0, 0xffff}, - {OP_WR, HC_REG_AGG_INT_0, 0x0}, - {OP_WR, HC_REG_ATTN_IDX, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT, 0x2}, - {OP_WR, HC_REG_VQID_0, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_0, 0x0}, - {OP_ZR, HC_REG_P0_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND, 0x2}, - {OP_WR, HC_REG_CONFIG_0, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a}, -/* #define HC_PORT0_END 729 */ -/* #define HC_PORT1_START 730 */ - {OP_WR, HC_REG_CONFIG_1, 0x1080}, - {OP_ZR, HC_REG_UC_RAM_ADDR_1, 0x2}, - {OP_WR, HC_REG_ATTN_NUM_P1, 0x10}, - {OP_WR, HC_REG_LEADING_EDGE_1, 0xffff}, - {OP_WR, HC_REG_TRAILING_EDGE_1, 0xffff}, - {OP_WR, HC_REG_AGG_INT_1, 0x0}, - {OP_WR, HC_REG_ATTN_IDX + 0x4, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT + 0x8, 0x2}, - {OP_WR, HC_REG_VQID_1, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_1, 0x0}, - {OP_ZR, HC_REG_P1_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK + 0x4, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND + 0x8, 0x2}, - {OP_WR, HC_REG_CONFIG_1, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a}, -/* #define HC_PORT1_END 731 */ -/* #define PXP2_COMMON_START 748 */ - {OP_WR, PXP2_REG_PGL_CONTROL0, 0xe38340}, - {OP_WR, PXP2_REG_PGL_CONTROL1, 0x3c10}, - {OP_WR, PXP2_REG_PGL_DEBUG, 0x2}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_0, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_0, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_0, 0xffff3330}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_1, 0xffff3340}, - {OP_WR, PXP2_REG_PGL_INT_USDM_0, 0xf0003000}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ6, 0x8}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ9, 0x8}, - {OP_ZR, PXP2_REG_RD_MAX_BLKS_VQ10, 0x2}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ17, 0x4}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ19, 0x4}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ22, 0x0}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ25, 0x0}, - {OP_WR, PXP2_REG_RD_START_INIT, 0x1}, - {OP_WR, PXP2_REG_WR_DMAE_TH, 0x3f}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD0, 0x40}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD1, 0x1808}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD2, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD3, 0x803}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD4, 0x40}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD5, 0x3}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD6, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD7, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD8, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD9, 0x10003}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD10, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD11, 0x803}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD12, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD13, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD14, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD15, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD16, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD17, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD18, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD19, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD20, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD22, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD23, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD24, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD25, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD26, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD27, 0x3}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD28, 0x2403}, - {OP_WR, PXP2_REG_RQ_BW_WR_ADD29, 0x2f}, - {OP_WR, PXP2_REG_RQ_BW_WR_ADD30, 0x9}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND0, 0x19}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB1, 0x184}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB2, 0x183}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB3, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND4, 0x19}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND5, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB6, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB7, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB8, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB9, 0xc86}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB10, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB11, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND12, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND13, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND14, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND15, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND16, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND17, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND18, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND19, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND20, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND22, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND23, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND24, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND25, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND26, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND27, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB28, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_WR_UBOUND29, 0x13}, - {OP_WR, PXP2_REG_RQ_BW_WR_UBOUND30, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_L1, 0x1004}, - {OP_WR, PXP2_REG_PSWRQ_BW_L2, 0x1004}, - {OP_WR, PXP2_REG_PSWRQ_BW_RD, 0x106440}, - {OP_WR, PXP2_REG_PSWRQ_BW_WR, 0x106440}, - {OP_WR, PXP2_REG_RQ_RBC_DONE, 0x1}, -/* #define PXP2_COMMON_END 749 */ -/* #define MISC_AEU_COMMON_START 770 */ - {OP_ZR, MISC_REG_AEU_GENERAL_ATTN_0, 0x16}, -/* #define MISC_AEU_COMMON_END 771 */ -/* #define MISC_AEU_PORT0_START 772 */ - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0, 0xbf5c0000}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0, 0xfff51fef}, - {OP_WR, MISC_REG_AEU_ENABLE3_FUNC_0_OUT_0, 0xffff}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, 0xf00003e0}, - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_1, 0xa000}, - {OP_ZR, MISC_REG_AEU_ENABLE3_FUNC_0_OUT_1, 0x5}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_2, 0xfe00000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_3, 0x14}, - {OP_WR, MISC_REG_AEU_ENABLE1_NIG_0, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_NIG_0, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_NIG_0, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_NIG_0, 0xf0000000}, - {OP_WR, MISC_REG_AEU_ENABLE1_PXP_0, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_PXP_0, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_PXP_0, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_PXP_0, 0xf0000000}, - {OP_ZR, MISC_REG_AEU_INVERTER_1_FUNC_0, 0x4}, - {OP_WR, MISC_REG_AEU_MASK_ATTN_FUNC_0, 0x307}, -/* #define MISC_AEU_PORT0_END 773 */ -/* #define MISC_AEU_PORT1_START 774 */ - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0, 0xbf5c0000}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0, 0xfff51fef}, - {OP_WR, MISC_REG_AEU_ENABLE3_FUNC_1_OUT_0, 0xffff}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, 0xf00003e0}, - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_1, 0xa000}, - {OP_ZR, MISC_REG_AEU_ENABLE3_FUNC_1_OUT_1, 0x5}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_2, 0xfe00000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_3, 0x14}, - {OP_WR, MISC_REG_AEU_ENABLE1_NIG_1, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_NIG_1, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_NIG_1, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_NIG_1, 0xf0000000}, - {OP_WR, MISC_REG_AEU_ENABLE1_PXP_1, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_PXP_1, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_PXP_1, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_PXP_1, 0xf0000000}, - {OP_ZR, MISC_REG_AEU_INVERTER_1_FUNC_1, 0x4}, - {OP_WR, MISC_REG_AEU_MASK_ATTN_FUNC_1, 0x307}, -/* #define MISC_AEU_PORT1_END 775 */ - +/* #define BRB1_COMMON_START 22 */ + {OP_WR, 0x600dc, 0x1}, + {OP_SW, 0x61000, 0x2000000}, + {OP_RD, 0x600d8, 0x0}, + {OP_SW, 0x60200, 0x30200}, + {OP_WR, 0x600dc, 0x0}, +/* #define BRB1_COMMON_END 23 */ +/* #define BRB1_PORT0_START 24 */ + {OP_WR, 0x60068, 0xb8}, + {OP_WR, 0x60078, 0x114}, + {OP_RD, 0x600b8, 0x0}, + {OP_RD, 0x600c8, 0x0}, +/* #define BRB1_PORT0_END 25 */ +/* #define BRB1_PORT1_START 26 */ + {OP_WR, 0x6006c, 0xb8}, + {OP_WR, 0x6007c, 0x114}, + {OP_RD, 0x600bc, 0x0}, + {OP_RD, 0x600cc, 0x0}, +/* #define BRB1_PORT1_END 27 */ +/* #define CCM_COMMON_START 44 */ + {OP_WR, 0xd0044, 0x32}, + {OP_SW, 0xd004c, 0x40203}, + {OP_ZR, 0xd005c, 0x4}, + {OP_SW, 0xd008c, 0x110207}, + {OP_WR, 0xd015c, 0x1}, + {OP_SW, 0xd0164, 0x20218}, + {OP_WR, 0xd0204, 0x1}, + {OP_SW, 0xd020c, 0x3021a}, + {OP_SW, 0xd0220, 0x2021d}, + {OP_ZR, 0xd0280, 0x12}, + {OP_SW, 0xd0300, 0x18021f}, + {OP_ZR, 0xd0360, 0xc}, + {OP_ZR, 0xd4000, 0xa00}, + {OP_SW, 0xd0004, 0xf0237}, +/* #define CCM_COMMON_END 45 */ +/* #define CCM_PORT0_START 46 */ + {OP_WR, 0xd0114, 0xd}, +/* #define CCM_PORT0_END 47 */ +/* #define CCM_PORT1_START 48 */ + {OP_WR, 0xd0118, 0x2d}, +/* #define CCM_PORT1_END 49 */ +/* #define CDU_COMMON_START 66 */ + {OP_SW, 0x101000, 0x30246}, + {OP_WR, 0x101010, 0x264}, + {OP_WB, 0x101100, 0x100249}, + {OP_WB_ZR, 0x101140, 0x8}, + {OP_WB, 0x101160, 0x100259}, + {OP_WB_ZR, 0x1011a0, 0x18}, + {OP_WB, 0x101800, 0x2000269}, + {OP_WR, 0x101010, 0x0}, +/* #define CDU_COMMON_END 67 */ +/* #define CFC_COMMON_START 88 */ + {OP_ZR, 0x104c00, 0x100}, + {OP_WR, 0x104028, 0x10}, + {OP_WR, 0x104044, 0x3fff}, + {OP_WR, 0x104058, 0x280000}, + {OP_WR, 0x104084, 0x84924a}, + {OP_WR, 0x104058, 0x0}, +/* #define CFC_COMMON_END 89 */ +/* #define CSDM_COMMON_START 110 */ + {OP_SW, 0xc2008, 0x30469}, + {OP_SW, 0xc201c, 0x4046c}, + {OP_SW, 0xc2038, 0x110470}, + {OP_ZR, 0xc207c, 0x4f}, + {OP_SW, 0xc21b8, 0x110481}, + {OP_ZR, 0xc21fc, 0xf}, + {OP_SW, 0xc2238, 0x40492}, + {OP_RD, 0xc2248, 0x0}, + {OP_RD, 0xc224c, 0x0}, + {OP_RD, 0xc2250, 0x0}, + {OP_RD, 0xc2254, 0x0}, + {OP_RD, 0xc2258, 0x0}, + {OP_RD, 0xc225c, 0x0}, + {OP_RD, 0xc2260, 0x0}, + {OP_RD, 0xc2264, 0x0}, + {OP_RD, 0xc2268, 0x0}, + {OP_RD, 0xc226c, 0x0}, + {OP_RD, 0xc2270, 0x0}, + {OP_RD, 0xc2274, 0x0}, + {OP_RD, 0xc2278, 0x0}, + {OP_RD, 0xc227c, 0x0}, + {OP_WR, 0xc24bc, 0x1}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0xc2000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0xc2000, 0xa}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0xc2000, 0x1}, +/* #define CSDM_COMMON_END 111 */ +/* #define CSEM_COMMON_START 132 */ + {OP_ZP, 0x200400, 0x840000}, + {OP_WR_64, 0x200780, 0x100496}, + {OP_ZR, 0x220000, 0x1600}, + {OP_ZR, 0x228000, 0x40}, + {OP_ZR, 0x223bd0, 0x8}, + {OP_ZR, 0x224800, 0x6}, + {OP_SW, 0x224818, 0x40498}, + {OP_ZR, 0x224828, 0xc}, + {OP_SW, 0x224858, 0x4049c}, + {OP_ZR, 0x224868, 0xc}, + {OP_SW, 0x224898, 0x404a0}, + {OP_ZR, 0x2248a8, 0xc}, + {OP_SW, 0x2248d8, 0x404a4}, + {OP_ZR, 0x2248e8, 0xc}, + {OP_SW, 0x224918, 0x404a8}, + {OP_ZR, 0x224928, 0xc}, + {OP_SW, 0x224958, 0x404ac}, + {OP_ZR, 0x224968, 0xc}, + {OP_SW, 0x224998, 0x404b0}, + {OP_ZR, 0x2249a8, 0xc}, + {OP_SW, 0x2249d8, 0x404b4}, + {OP_ZR, 0x2249e8, 0xc}, + {OP_SW, 0x224a18, 0x404b8}, + {OP_ZR, 0x224a28, 0xc}, + {OP_SW, 0x224a58, 0x404bc}, + {OP_ZR, 0x224a68, 0xc}, + {OP_SW, 0x224a98, 0x404c0}, + {OP_ZR, 0x224aa8, 0xc}, + {OP_SW, 0x224ad8, 0x404c4}, + {OP_ZR, 0x224ae8, 0xc}, + {OP_SW, 0x224b18, 0x404c8}, + {OP_ZR, 0x224b28, 0xc}, + {OP_SW, 0x224b58, 0x404cc}, + {OP_ZR, 0x224b68, 0xc}, + {OP_SW, 0x224b98, 0x404d0}, + {OP_ZR, 0x224ba8, 0xc}, + {OP_SW, 0x224bd8, 0x404d4}, + {OP_ZR, 0x224be8, 0xc}, + {OP_SW, 0x224c18, 0x404d8}, + {OP_ZR, 0x224c28, 0xc}, + {OP_SW, 0x224c58, 0x404dc}, + {OP_ZR, 0x224c68, 0xc}, + {OP_SW, 0x224c98, 0x404e0}, + {OP_ZR, 0x224ca8, 0xc}, + {OP_SW, 0x224cd8, 0x404e4}, + {OP_ZR, 0x224ce8, 0xc}, + {OP_SW, 0x224d18, 0x404e8}, + {OP_ZR, 0x224d28, 0xc}, + {OP_SW, 0x224d58, 0x404ec}, + {OP_ZR, 0x224d68, 0xc}, + {OP_SW, 0x224d98, 0x404f0}, + {OP_ZR, 0x224da8, 0xc}, + {OP_SW, 0x224dd8, 0x404f4}, + {OP_ZR, 0x224de8, 0xc}, + {OP_SW, 0x224e18, 0x404f8}, + {OP_ZR, 0x224e28, 0xc}, + {OP_SW, 0x224e58, 0x404fc}, + {OP_ZR, 0x224e68, 0xc}, + {OP_SW, 0x224e98, 0x40500}, + {OP_ZR, 0x224ea8, 0xc}, + {OP_SW, 0x224ed8, 0x40504}, + {OP_ZR, 0x224ee8, 0xc}, + {OP_SW, 0x224f18, 0x40508}, + {OP_ZR, 0x224f28, 0xc}, + {OP_SW, 0x224f58, 0x4050c}, + {OP_ZR, 0x224f68, 0xc}, + {OP_SW, 0x224f98, 0x40510}, + {OP_ZR, 0x224fa8, 0xc}, + {OP_SW, 0x224fd8, 0x40514}, + {OP_ZR, 0x224fe8, 0x6}, + {OP_SW, 0x225198, 0x40518}, + {OP_WR, 0x238000, 0x10}, + {OP_WR, 0x238040, 0x12}, + {OP_WR, 0x238080, 0x30}, + {OP_WR, 0x2380c0, 0xe}, + {OP_WR, 0x238380, 0x7a120}, + {OP_WR, 0x2383c0, 0x1f4}, + {OP_WR, 0x238bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x1}, /* asic */ + {OP_WR, 0x238300, 0x7a120}, + {OP_WR, 0x238340, 0x1f4}, + {OP_IF_MODE_AND, 2, 0x2}, /* fpga */ + {OP_WR, 0x238300, 0x1388}, + {OP_WR, 0x238340, 0x5}, + {OP_IF_MODE_AND, 2, 0x4}, /* emul */ + {OP_WR, 0x238300, 0x138}, + {OP_WR, 0x238340, 0x0}, + {OP_ZP, 0x240000, 0x33240000}, + {OP_ZP, 0x248000, 0xf130cc9}, + {OP_WR_64, 0x249c40, 0x6ade051c}, + {OP_RD, 0x200000, 0x0}, + {OP_RD, 0x200004, 0x0}, + {OP_RD, 0x200008, 0x0}, + {OP_RD, 0x20000c, 0x0}, + {OP_RD, 0x200010, 0x0}, + {OP_RD, 0x200014, 0x0}, + {OP_SW, 0x200020, 0x1a051e}, + {OP_SW, 0x2000a4, 0x20538}, + {OP_WR, 0x200224, 0x0}, + {OP_WR, 0x200234, 0x0}, + {OP_WR, 0x20024c, 0x0}, + {OP_WR, 0x2002e4, 0xffff}, + {OP_WB_ZR, 0x202000, 0x800}, +/* #define CSEM_COMMON_END 133 */ +/* #define CSEM_PORT0_START 134 */ + {OP_ZR, 0x221400, 0x2}, + {OP_ZR, 0x221490, 0x30}, + {OP_ZR, 0x223900, 0x10}, + {OP_ZR, 0x225108, 0x2}, + {OP_ZR, 0x2251a8, 0x6}, +/* #define CSEM_PORT0_END 135 */ +/* #define CSEM_PORT1_START 136 */ + {OP_ZR, 0x221408, 0x2}, + {OP_ZR, 0x221550, 0x30}, + {OP_ZR, 0x223940, 0x10}, + {OP_ZR, 0x225110, 0x2}, + {OP_ZR, 0x2251c0, 0x6}, +/* #define CSEM_PORT1_END 137 */ +/* #define DMAE_COMMON_START 176 */ + {OP_ZR, 0x102400, 0xe0}, + {OP_SW, 0x10201c, 0x2053a}, + {OP_WR, 0x1020c0, 0x1}, + {OP_SW, 0x102004, 0x2053c}, +/* #define DMAE_COMMON_END 177 */ +/* #define DORQ_COMMON_START 198 */ + {OP_WR, 0x170008, 0x2}, + {OP_WR, 0x17002c, 0x3}, + {OP_SW, 0x170038, 0x2053e}, + {OP_SW, 0x170044, 0x60540}, + {OP_SW, 0x170060, 0x50546}, + {OP_SW, 0x170078, 0x2054b}, + {OP_WR, 0x170004, 0xf}, +/* #define DORQ_COMMON_END 199 */ +/* #define HC_COMMON_START 220 */ + {OP_ZR, 0x108068, 0x4}, +/* #define HC_COMMON_END 221 */ +/* #define HC_PORT0_START 222 */ + {OP_WR, 0x108000, 0x1080}, + {OP_ZR, 0x108040, 0x2}, + {OP_ZR, 0x108028, 0x2}, + {OP_WR, 0x108038, 0x10}, + {OP_SW, 0x108040, 0x2054d}, + {OP_WR, 0x108050, 0x0}, + {OP_WR, 0x108100, 0x0}, + {OP_ZR, 0x108120, 0x2}, + {OP_WR, 0x108008, 0x2b5}, + {OP_WR, 0x108010, 0x0}, + {OP_WR, 0x108108, 0x1ffff}, + {OP_ZR, 0x108200, 0x4a}, + {OP_ZR, 0x108140, 0x2}, + {OP_WR, 0x108000, 0x1a80}, + {OP_ZR, 0x109000, 0x24}, + {OP_ZR, 0x109120, 0x4a}, + {OP_ZR, 0x109370, 0x4a}, + {OP_ZR, 0x1095c0, 0x4a}, +/* #define HC_PORT0_END 223 */ +/* #define HC_PORT1_START 224 */ + {OP_WR, 0x108004, 0x1080}, + {OP_ZR, 0x108048, 0x2}, + {OP_ZR, 0x108030, 0x2}, + {OP_WR, 0x10803c, 0x10}, + {OP_SW, 0x108048, 0x2054f}, + {OP_WR, 0x108054, 0x0}, + {OP_WR, 0x108104, 0x0}, + {OP_ZR, 0x108128, 0x2}, + {OP_WR, 0x10800c, 0x2b5}, + {OP_WR, 0x108014, 0x0}, + {OP_WR, 0x10810c, 0x1ffff}, + {OP_ZR, 0x108400, 0x4a}, + {OP_ZR, 0x108148, 0x2}, + {OP_WR, 0x108004, 0x1a80}, + {OP_ZR, 0x109090, 0x24}, + {OP_ZR, 0x109248, 0x4a}, + {OP_ZR, 0x109498, 0x4a}, + {OP_ZR, 0x1096e8, 0x4a}, +/* #define HC_PORT1_END 225 */ +/* #define MISC_COMMON_START 264 */ + {OP_WR, 0xa468, 0xaffdc}, + {OP_WR, 0xa280, 0x1}, + {OP_SW, 0xa294, 0x40551}, + {OP_WR, 0xa4fc, 0xff000000}, +/* #define MISC_COMMON_END 265 */ +/* #define NIG_COMMON_START 286 */ + {OP_SW, 0x100b4, 0x20555}, + {OP_WR, 0x100dc, 0x1}, + {OP_SW, 0x10100, 0x20557}, +/* #define NIG_COMMON_END 287 */ +/* #define NIG_PORT0_START 288 */ + {OP_WR, 0x1007c, 0x300000}, + {OP_WR, 0x10084, 0x28}, + {OP_WR, 0x1008c, 0x0}, + {OP_WR, 0x10130, 0x4}, + {OP_ZR, 0x10138, 0x11}, + {OP_WR, 0x10244, 0x1f}, + {OP_WR, 0x1025c, 0x1}, + {OP_WR, 0x10328, 0x0}, + {OP_WR, 0x10554, 0x30}, + {OP_WR, 0x100c4, 0x1}, + {OP_WR, 0x100cc, 0x1}, + {OP_WR, 0x100f8, 0x1}, + {OP_WR, 0x100f0, 0x1}, +/* #define NIG_PORT0_END 289 */ +/* #define NIG_PORT1_START 290 */ + {OP_WR, 0x10080, 0x300000}, + {OP_WR, 0x10088, 0x28}, + {OP_WR, 0x10090, 0x0}, + {OP_WR, 0x10134, 0x4}, + {OP_ZR, 0x1017c, 0x11}, + {OP_WR, 0x10248, 0x1f}, + {OP_WR, 0x102dc, 0x1}, + {OP_WR, 0x1032c, 0x0}, + {OP_WR, 0x10564, 0x30}, + {OP_WR, 0x100c8, 0x1}, + {OP_WR, 0x100d0, 0x1}, + {OP_WR, 0x100fc, 0x1}, + {OP_WR, 0x100f4, 0x1}, +/* #define NIG_PORT1_END 291 */ +/* #define PBF_COMMON_START 308 */ + {OP_WR, 0x140000, 0x1}, + {OP_WR, 0x14000c, 0x1}, + {OP_SW, 0x140040, 0x20559}, + {OP_WR, 0x14000c, 0x0}, + {OP_WR, 0x140000, 0x0}, + {OP_WR, 0x14006c, 0x0}, +/* #define PBF_COMMON_END 309 */ +/* #define PBF_PORT0_START 310 */ + {OP_WR, 0x140004, 0x1}, + {OP_WR, 0x140030, 0x1}, + {OP_WR, 0x140004, 0x0}, + {OP_WR, 0x14005c, 0x0}, +/* #define PBF_PORT0_END 311 */ +/* #define PBF_PORT1_START 312 */ + {OP_WR, 0x140008, 0x1}, + {OP_WR, 0x140034, 0x1}, + {OP_WR, 0x140008, 0x0}, + {OP_WR, 0x140060, 0x0}, +/* #define PBF_PORT1_END 313 */ +/* #define PRS_COMMON_START 352 */ + {OP_SW, 0x40004, 0x12055b}, + {OP_SW, 0x40054, 0x3056d}, + {OP_WR, 0x40070, 0x4}, + {OP_SW, 0x40078, 0x40570}, + {OP_ZR, 0x40088, 0x5}, + {OP_SW, 0x4009c, 0x30574}, + {OP_ZR, 0x400a8, 0x4}, + {OP_SW, 0x400b8, 0x50577}, + {OP_ZR, 0x400cc, 0x4}, + {OP_SW, 0x400dc, 0x4057c}, + {OP_ZR, 0x400ec, 0x4}, + {OP_RD, 0x40124, 0x0}, + {OP_RD, 0x40128, 0x0}, + {OP_RD, 0x4012c, 0x0}, + {OP_RD, 0x40130, 0x0}, + {OP_WR, 0x40134, 0xf}, +/* #define PRS_COMMON_END 353 */ +/* #define PXP2_COMMON_START 374 */ + {OP_SW, 0x120490, 0x220580}, + {OP_WR, 0x120520, 0x2}, + {OP_WR, 0x120388, 0x64}, + {OP_WR, 0x120390, 0x8}, + {OP_SW, 0x12039c, 0x305a2}, + {OP_WR, 0x1203bc, 0x4}, + {OP_WR, 0x1203c4, 0x4}, + {OP_WR, 0x1203d0, 0x0}, + {OP_WR, 0x1203dc, 0x0}, + {OP_WR, 0x12036c, 0x1}, + {OP_WR, 0x120368, 0x3f}, + {OP_SW, 0x1201bc, 0x3c05a5}, + {OP_SW, 0x1202b0, 0x205e1}, + {OP_SW, 0x120324, 0x205e3}, + {OP_WR, 0x1201b0, 0x1}, +/* #define PXP2_COMMON_END 375 */ +/* #define PXP_COMMON_START 396 */ + {OP_WB, 0x103800, 0x505e5}, + {OP_WB, 0x103c00, 0x505ea}, + {OP_WB, 0x103c20, 0x505ef}, +/* #define PXP_COMMON_END 397 */ +/* #define QM_COMMON_START 418 */ + {OP_SW, 0x168030, 0x805f4}, + {OP_WR, 0x168054, 0x2}, + {OP_SW, 0x168060, 0x505fc}, + {OP_ZR, 0x168074, 0x7}, + {OP_SW, 0x168090, 0x20601}, + {OP_SW, 0x16809c, 0x50603}, + {OP_ZR, 0x1680b0, 0x7}, + {OP_SW, 0x1680cc, 0x80608}, + {OP_WR, 0x1680f0, 0x7}, + {OP_ZR, 0x1680f4, 0xc}, + {OP_SW, 0x168124, 0x40610}, + {OP_ZR, 0x168134, 0xc}, + {OP_SW, 0x168164, 0x3b0614}, + {OP_ZR, 0x168250, 0x4}, + {OP_SW, 0x168260, 0x2064f}, + {OP_ZR, 0x168268, 0x8}, + {OP_SW, 0x168288, 0x80651}, + {OP_ZR, 0x1682a8, 0xa}, + {OP_WR, 0x168804, 0x4}, + {OP_SW, 0x16880c, 0x100659}, + {OP_WR, 0x1680ec, 0xff}, +/* #define QM_COMMON_END 419 */ +/* #define SRC_COMMON_START 440 */ + {OP_SW, 0x40408, 0x140669}, +/* #define SRC_COMMON_END 441 */ +/* #define TCM_COMMON_START 462 */ + {OP_SW, 0x50044, 0x2067d}, + {OP_SW, 0x50050, 0x4067f}, + {OP_ZR, 0x50060, 0x4}, + {OP_SW, 0x50090, 0x130683}, + {OP_WR, 0x50114, 0x1}, + {OP_SW, 0x5011c, 0x20696}, + {OP_WR, 0x50204, 0x1}, + {OP_SW, 0x5020c, 0x20698}, + {OP_SW, 0x5021c, 0x3069a}, + {OP_ZR, 0x50240, 0xa}, + {OP_SW, 0x50280, 0x20069d}, + {OP_ZR, 0x54000, 0xd00}, + {OP_SW, 0x50004, 0x1006bd}, +/* #define TCM_COMMON_END 463 */ +/* #define TCM_PORT0_START 464 */ + {OP_WR, 0x500e0, 0xe}, +/* #define TCM_PORT0_END 465 */ +/* #define TCM_PORT1_START 466 */ + {OP_WR, 0x500e4, 0x2e}, +/* #define TCM_PORT1_END 467 */ +/* #define TM_COMMON_START 484 */ + {OP_ZR, 0x164024, 0x2}, + {OP_SW, 0x164030, 0x306cd}, + {OP_WR, 0x164044, 0x20}, + {OP_WR, 0x164070, 0x1c}, + {OP_WR, 0x164208, 0x1}, + {OP_WR, 0x164210, 0x1}, + {OP_WR, 0x164220, 0x1}, + {OP_WR, 0x164228, 0x1}, + {OP_WR, 0x164230, 0x1}, + {OP_WR, 0x164238, 0x1}, + {OP_WR, 0x164260, 0x1}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0x16401c, 0x3d090}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x16401c, 0x9c4}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x16401c, 0x9c}, + {OP_WR, 0x164000, 0x1}, + {OP_WR, 0x1640d8, 0x1}, + {OP_SW, 0x164008, 0x306d0}, +/* #define TM_COMMON_END 485 */ +/* #define TM_PORT0_START 486 */ + {OP_WR, 0x164240, 0x0}, + {OP_WR, 0x164248, 0x0}, + {OP_WB_ZR, 0x164270, 0x2}, +/* #define TM_PORT0_END 487 */ +/* #define TM_PORT1_START 488 */ + {OP_WR, 0x164250, 0x0}, + {OP_WR, 0x164258, 0x0}, + {OP_WB_ZR, 0x164280, 0x2}, +/* #define TM_PORT1_END 489 */ +/* #define TSDM_COMMON_START 506 */ + {OP_SW, 0x42008, 0x406d3}, + {OP_SW, 0x4201c, 0x406d7}, + {OP_ZR, 0x42038, 0x80}, + {OP_SW, 0x42238, 0x406db}, + {OP_RD, 0x42248, 0x0}, + {OP_RD, 0x4224c, 0x0}, + {OP_RD, 0x42250, 0x0}, + {OP_RD, 0x42254, 0x0}, + {OP_RD, 0x42258, 0x0}, + {OP_RD, 0x4225c, 0x0}, + {OP_RD, 0x42260, 0x0}, + {OP_RD, 0x42264, 0x0}, + {OP_RD, 0x42268, 0x0}, + {OP_RD, 0x4226c, 0x0}, + {OP_RD, 0x42270, 0x0}, + {OP_RD, 0x42274, 0x0}, + {OP_RD, 0x42278, 0x0}, + {OP_RD, 0x4227c, 0x0}, + {OP_WR, 0x424bc, 0x1}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0x42000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x42000, 0xa}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x42000, 0x1}, +/* #define TSDM_COMMON_END 507 */ +/* #define TSEM_COMMON_START 528 */ + {OP_ZP, 0x180400, 0x690000}, + {OP_WR_64, 0x180760, 0x1406df}, + {OP_ZR, 0x1a0000, 0x1600}, + {OP_ZR, 0x1a8000, 0x40}, + {OP_SW, 0x1a08b0, 0x206e1}, + {OP_SW, 0x1a19c8, 0x206e3}, + {OP_SW, 0x1a2fc0, 0x406e5}, + {OP_ZR, 0x1a2fd0, 0x6}, + {OP_SW, 0x1a2fe8, 0x206e9}, + {OP_SW, 0x1a3000, 0x3f906eb}, + {OP_ZR, 0x1a3fe4, 0x7}, + {OP_SW, 0x1a4870, 0x40ae4}, + {OP_WR, 0x1b8000, 0x34}, + {OP_WR, 0x1b8040, 0x18}, + {OP_WR, 0x1b8080, 0xc}, + {OP_WR, 0x1b80c0, 0x20}, + {OP_WR, 0x1b8380, 0x7a120}, + {OP_WR, 0x1b83c0, 0x1f4}, + {OP_WR, 0x1b8bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x1}, /* asic */ + {OP_WR, 0x1b8300, 0x7a120}, + {OP_WR, 0x1b8340, 0x1f4}, + {OP_IF_MODE_AND, 2, 0x2}, /* fpga */ + {OP_WR, 0x1b8300, 0x1388}, + {OP_WR, 0x1b8340, 0x5}, + {OP_IF_MODE_AND, 2, 0x4}, /* emul */ + {OP_WR, 0x1b8300, 0x138}, + {OP_WR, 0x1b8340, 0x0}, + {OP_ZP, 0x1c0000, 0x2cc30000}, + {OP_ZP, 0x1c8000, 0x34370b31}, + {OP_ZP, 0x1d0000, 0x20f5183f}, + {OP_WR_64, 0x1d4d30, 0x565a0ae8}, + {OP_RD, 0x180000, 0x0}, + {OP_RD, 0x180004, 0x0}, + {OP_RD, 0x180008, 0x0}, + {OP_RD, 0x18000c, 0x0}, + {OP_RD, 0x180010, 0x0}, + {OP_RD, 0x180014, 0x0}, + {OP_SW, 0x180020, 0x1a0aea}, + {OP_SW, 0x1800a4, 0x20b04}, + {OP_WR, 0x180224, 0x0}, + {OP_WR, 0x180234, 0x0}, + {OP_WR, 0x18024c, 0x0}, + {OP_WR, 0x1802e4, 0xff}, + {OP_WB_ZR, 0x181000, 0x400}, +/* #define TSEM_COMMON_END 529 */ +/* #define TSEM_PORT0_START 530 */ + {OP_ZR, 0x1a0800, 0x2}, + {OP_ZR, 0x1a0820, 0x12}, + {OP_ZR, 0x1a09c0, 0x48}, + {OP_ZR, 0x1a2500, 0x10}, + {OP_ZR, 0x1a2580, 0x12}, + {OP_ZR, 0x1a2610, 0x12}, + {OP_SW, 0x1a2fb0, 0x20b06}, + {OP_ZR, 0x1a4000, 0x6}, + {OP_ZR, 0x1a4030, 0x2}, + {OP_ZR, 0x1a4820, 0x2}, + {OP_SW, 0x1a4c50, 0x20b08}, +/* #define TSEM_PORT0_END 531 */ +/* #define TSEM_PORT1_START 532 */ + {OP_ZR, 0x1a0810, 0x2}, + {OP_ZR, 0x1a0868, 0x12}, + {OP_ZR, 0x1a0ae0, 0x48}, + {OP_ZR, 0x1a2540, 0x10}, + {OP_ZR, 0x1a25c8, 0x12}, + {OP_ZR, 0x1a2658, 0x12}, + {OP_SW, 0x1a2fb8, 0x20b0a}, + {OP_ZR, 0x1a4018, 0x6}, + {OP_ZR, 0x1a4038, 0x2}, + {OP_ZR, 0x1a4828, 0x2}, + {OP_SW, 0x1a4c58, 0x20b0c}, +/* #define TSEM_PORT1_END 533 */ +/* #define UCM_COMMON_START 550 */ + {OP_WR, 0xe004c, 0x32}, + {OP_SW, 0xe0054, 0x40b0e}, + {OP_ZR, 0xe0064, 0x4}, + {OP_SW, 0xe0094, 0x130b12}, + {OP_WR, 0xe0144, 0x1}, + {OP_SW, 0xe014c, 0x20b25}, + {OP_WR, 0xe0204, 0x1}, + {OP_SW, 0xe020c, 0x20b27}, + {OP_SW, 0xe021c, 0x40b29}, + {OP_SW, 0xe0280, 0x1b0b2d}, + {OP_ZR, 0xe02ec, 0x17}, + {OP_ZR, 0xe2000, 0x800}, + {OP_SW, 0xe0004, 0x110b48}, +/* #define UCM_COMMON_END 551 */ +/* #define UCM_PORT0_START 552 */ + {OP_WR, 0xe0110, 0xf}, +/* #define UCM_PORT0_END 553 */ +/* #define UCM_PORT1_START 554 */ + {OP_WR, 0xe0114, 0x2f}, +/* #define UCM_PORT1_END 555 */ +/* #define UPB_COMMON_START 572 */ + {OP_WR, 0xc1000, 0x28}, +/* #define UPB_COMMON_END 573 */ +/* #define USDM_COMMON_START 594 */ + {OP_SW, 0xc4008, 0x40b59}, + {OP_SW, 0xc401c, 0x40b5d}, + {OP_SW, 0xc4038, 0x20b61}, + {OP_ZR, 0xc4040, 0x5e}, + {OP_WR, 0xc41b8, 0x1}, + {OP_ZR, 0xc41bc, 0x1f}, + {OP_SW, 0xc4238, 0x40b63}, + {OP_RD, 0xc4248, 0x0}, + {OP_RD, 0xc424c, 0x0}, + {OP_RD, 0xc4250, 0x0}, + {OP_RD, 0xc4254, 0x0}, + {OP_RD, 0xc4258, 0x0}, + {OP_RD, 0xc425c, 0x0}, + {OP_RD, 0xc4260, 0x0}, + {OP_RD, 0xc4264, 0x0}, + {OP_RD, 0xc4268, 0x0}, + {OP_RD, 0xc426c, 0x0}, + {OP_RD, 0xc4270, 0x0}, + {OP_RD, 0xc4274, 0x0}, + {OP_RD, 0xc4278, 0x0}, + {OP_RD, 0xc427c, 0x0}, + {OP_RD, 0xc4280, 0x0}, + {OP_WR, 0xc44c0, 0x1}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0xc4000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0xc4000, 0xa}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0xc4000, 0x1}, +/* #define USDM_COMMON_END 595 */ +/* #define USEM_COMMON_START 616 */ + {OP_ZP, 0x300400, 0x9c0000}, + {OP_WR_64, 0x300768, 0x130b67}, + {OP_ZR, 0x320000, 0x1600}, + {OP_ZR, 0x328000, 0x40}, + {OP_SW, 0x321830, 0x20b69}, + {OP_SW, 0x322e70, 0x40b6b}, + {OP_ZR, 0x325080, 0x8}, + {OP_SW, 0x3250a0, 0x20b6f}, + {OP_WR, 0x338000, 0x1a}, + {OP_WR, 0x338040, 0x4e}, + {OP_WR, 0x338080, 0x10}, + {OP_WR, 0x3380c0, 0x20}, + {OP_WR, 0x338380, 0x7a120}, + {OP_WR, 0x3383c0, 0x1f4}, + {OP_WR, 0x338bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x1}, /* asic */ + {OP_WR, 0x338300, 0x7a120}, + {OP_WR, 0x338340, 0x1f4}, + {OP_IF_MODE_AND, 2, 0x2}, /* fpga */ + {OP_WR, 0x338300, 0x1388}, + {OP_WR, 0x338340, 0x5}, + {OP_IF_MODE_AND, 2, 0x4}, /* emul */ + {OP_WR, 0x338300, 0x138}, + {OP_WR, 0x338340, 0x0}, + {OP_ZP, 0x340000, 0x37120000}, + {OP_ZP, 0x348000, 0x31c80dc5}, + {OP_ZP, 0x350000, 0x2b541a37}, + {OP_WR_64, 0x3561c0, 0x53c80b71}, + {OP_RD, 0x300000, 0x0}, + {OP_RD, 0x300004, 0x0}, + {OP_RD, 0x300008, 0x0}, + {OP_RD, 0x30000c, 0x0}, + {OP_RD, 0x300010, 0x0}, + {OP_RD, 0x300014, 0x0}, + {OP_SW, 0x300020, 0x1a0b73}, + {OP_SW, 0x3000a4, 0x20b8d}, + {OP_WR, 0x300224, 0x0}, + {OP_WR, 0x300234, 0x0}, + {OP_WR, 0x30024c, 0x0}, + {OP_WR, 0x3002e4, 0xffff}, + {OP_WB_ZR, 0x302000, 0x800}, +/* #define USEM_COMMON_END 617 */ +/* #define USEM_PORT0_START 618 */ + {OP_ZR, 0x322de0, 0x2}, + {OP_ZR, 0x324000, 0xd8}, + {OP_ZR, 0x3246c0, 0x120}, + {OP_ZR, 0x3250c8, 0x24}, +/* #define USEM_PORT0_END 619 */ +/* #define USEM_PORT1_START 620 */ + {OP_ZR, 0x322de8, 0x2}, + {OP_ZR, 0x324360, 0xd8}, + {OP_ZR, 0x324b40, 0x120}, + {OP_ZR, 0x325158, 0x24}, +/* #define USEM_PORT1_END 621 */ +/* #define XCM_COMMON_START 638 */ + {OP_WR, 0x20058, 0x32}, + {OP_SW, 0x20060, 0x40b8f}, + {OP_ZR, 0x20070, 0x4}, + {OP_SW, 0x200a0, 0xe0b93}, + {OP_SW, 0x200dc, 0x70ba1}, + {OP_WR, 0x200fc, 0x6}, + {OP_WR, 0x20120, 0x0}, + {OP_WR, 0x20134, 0x2}, + {OP_WR, 0x201b0, 0x1}, + {OP_WR, 0x2020c, 0x1}, + {OP_SW, 0x20214, 0x20ba8}, + {OP_WR, 0x20404, 0x1}, + {OP_SW, 0x2040c, 0x20baa}, + {OP_SW, 0x2041c, 0x40bac}, + {OP_SW, 0x20480, 0x1f0bb0}, + {OP_ZR, 0x204fc, 0x13}, + {OP_ZR, 0x28000, 0x2000}, + {OP_SW, 0x20004, 0x140bcf}, +/* #define XCM_COMMON_END 639 */ +/* #define XCM_PORT0_START 640 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PORT0_END 641 */ +/* #define XCM_PORT1_START 642 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PORT1_END 643 */ +/* #define XPB_COMMON_START 660 */ + {OP_WR, 0x161000, 0x28}, +/* #define XPB_COMMON_END 661 */ +/* #define XSDM_COMMON_START 682 */ + {OP_SW, 0x166008, 0x30be3}, + {OP_SW, 0x16601c, 0x40be6}, + {OP_SW, 0x166038, 0xd0bea}, + {OP_ZR, 0x16606c, 0x13}, + {OP_SW, 0x1660b8, 0x20bf7}, + {OP_ZR, 0x1660c0, 0x3e}, + {OP_WR, 0x1661b8, 0x1}, + {OP_ZR, 0x1661bc, 0x1f}, + {OP_SW, 0x166238, 0x40bf9}, + {OP_RD, 0x166248, 0x0}, + {OP_RD, 0x16624c, 0x0}, + {OP_RD, 0x166250, 0x0}, + {OP_RD, 0x166254, 0x0}, + {OP_RD, 0x166258, 0x0}, + {OP_RD, 0x16625c, 0x0}, + {OP_RD, 0x166260, 0x0}, + {OP_RD, 0x166264, 0x0}, + {OP_RD, 0x166268, 0x0}, + {OP_RD, 0x16626c, 0x0}, + {OP_RD, 0x166270, 0x0}, + {OP_RD, 0x166274, 0x0}, + {OP_RD, 0x166278, 0x0}, + {OP_RD, 0x16627c, 0x0}, + {OP_WR, 0x1664bc, 0x1}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0x166000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x166000, 0xa}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x166000, 0x1}, +/* #define XSDM_COMMON_END 683 */ +/* #define XSEM_COMMON_START 704 */ + {OP_ZP, 0x280400, 0x880000}, + {OP_WR_64, 0x280768, 0x130bfd}, + {OP_ZR, 0x2a0000, 0x1600}, + {OP_ZR, 0x2a8000, 0x40}, + {OP_SW, 0x2a2500, 0x20bff}, + {OP_SW, 0x2a2960, 0x40c01}, + {OP_SW, 0x2a2f48, 0x20c05}, + {OP_SW, 0x2a3368, 0x20c07}, + {OP_SW, 0x2a3920, 0x20c09}, + {OP_SW, 0x2a3930, 0x20c0b}, + {OP_SW, 0x2a3ac8, 0x20c0d}, + {OP_ZR, 0x2a3ad0, 0x6}, + {OP_SW, 0x2a3b98, 0x20c0f}, + {OP_SW, 0x2a3c20, 0x40c11}, + {OP_WR, 0x2a3cd0, 0x0}, + {OP_WR, 0x2b8000, 0x0}, + {OP_WR, 0x2b8040, 0x18}, + {OP_WR, 0x2b8080, 0xc}, + {OP_WR, 0x2b80c0, 0x66}, + {OP_WR, 0x2b8380, 0x7a120}, + {OP_WR, 0x2b83c0, 0x1f4}, + {OP_WR, 0x2b8bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x1}, /* asic */ + {OP_WR, 0x2b8300, 0x7a120}, + {OP_WR, 0x2b8340, 0x1f4}, + {OP_IF_MODE_AND, 2, 0x2}, /* fpga */ + {OP_WR, 0x2b8300, 0x1388}, + {OP_WR, 0x2b8340, 0x5}, + {OP_IF_MODE_AND, 2, 0x4}, /* emul */ + {OP_WR, 0x2b8300, 0x138}, + {OP_WR, 0x2b8340, 0x0}, + {OP_IF_MODE_AND, 1, 0x20}, /* port2 */ + {OP_WR, 0x2a3cd4, 0x0}, + {OP_ZP, 0x2c0000, 0x38a20000}, + {OP_ZP, 0x2c8000, 0x39e40e29}, + {OP_ZP, 0x2d0000, 0x39951ca2}, + {OP_ZP, 0x2d8000, 0x11522b08}, + {OP_WR_64, 0x2da160, 0x4bd40c15}, + {OP_RD, 0x280000, 0x0}, + {OP_RD, 0x280004, 0x0}, + {OP_RD, 0x280008, 0x0}, + {OP_RD, 0x28000c, 0x0}, + {OP_RD, 0x280010, 0x0}, + {OP_RD, 0x280014, 0x0}, + {OP_SW, 0x280020, 0x1a0c17}, + {OP_SW, 0x2800a4, 0x20c31}, + {OP_WR, 0x280224, 0x0}, + {OP_WR, 0x280234, 0x0}, + {OP_WR, 0x28024c, 0x0}, + {OP_WR, 0x2802e4, 0xffff}, + {OP_WB_ZR, 0x282000, 0x800}, +/* #define XSEM_COMMON_END 705 */ +/* #define XSEM_PORT0_START 706 */ + {OP_ZR, 0x2a3910, 0x2}, + {OP_ZR, 0x2a3938, 0x20}, + {OP_ZR, 0x2a3a38, 0x10}, + {OP_SW, 0x2a3ae8, 0x20c33}, + {OP_SW, 0x2a3af8, 0x100c35}, + {OP_ZR, 0x2a3c30, 0x2}, + {OP_ZR, 0x2a5000, 0x2}, + {OP_ZR, 0x2a5010, 0x2}, + {OP_ZR, 0x2a5020, 0x2}, + {OP_ZR, 0x2a5030, 0x2}, + {OP_WR, 0x2a5040, 0x0}, + {OP_ZR, 0x2a5048, 0xe}, +/* #define XSEM_PORT0_END 707 */ +/* #define XSEM_PORT1_START 708 */ + {OP_ZR, 0x2a3918, 0x2}, + {OP_ZR, 0x2a39b8, 0x20}, + {OP_ZR, 0x2a3a78, 0x10}, + {OP_SW, 0x2a3af0, 0x20c45}, + {OP_SW, 0x2a3b38, 0x100c47}, + {OP_ZR, 0x2a3c38, 0x2}, + {OP_ZR, 0x2a5008, 0x2}, + {OP_ZR, 0x2a5018, 0x2}, + {OP_ZR, 0x2a5028, 0x2}, + {OP_ZR, 0x2a5038, 0x2}, + {OP_WR, 0x2a5044, 0x0}, + {OP_ZR, 0x2a5080, 0xe}, +/* #define XSEM_PORT1_END 709 */ +/* #define MISC_AEU_COMMON_START 726 */ + {OP_ZR, 0xa000, 0x16}, +/* #define MISC_AEU_COMMON_END 727 */ +/* #define MISC_AEU_PORT0_START 728 */ + {OP_SW, 0xa06c, 0x60c57}, + {OP_ZR, 0xa084, 0x5}, + {OP_WR, 0xa098, 0xfe00000}, + {OP_ZR, 0xa09c, 0x14}, + {OP_SW, 0xa0ec, 0x80c5d}, + {OP_ZR, 0xa22c, 0x4}, + {OP_WR, 0xa060, 0x307}, +/* #define MISC_AEU_PORT0_END 729 */ +/* #define MISC_AEU_PORT1_START 730 */ + {OP_SW, 0xa10c, 0x60c65}, + {OP_ZR, 0xa124, 0x5}, + {OP_WR, 0xa138, 0xfe00000}, + {OP_ZR, 0xa13c, 0x14}, + {OP_SW, 0xa18c, 0x80c6b}, + {OP_ZR, 0xa23c, 0x4}, + {OP_WR, 0xa064, 0x307}, +/* #define MISC_AEU_PORT1_END 731 */ }; static const u16 init_ops_offsets_e1[] = { - 0x0000, 0x002e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x002e, - 0x004d, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x004d, 0x008b, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x008b, 0x0090, - 0x0090, 0x0094, 0x0094, 0x0098, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0098, 0x02dd, 0x02dd, 0x02e8, 0x02e8, 0x02f3, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x02f3, 0x02fb, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x02fb, 0x0300, 0x0300, 0x030b, 0x030b, 0x0316, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0316, 0x0317, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0317, 0x0358, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0358, 0x037c, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x037c, 0x03bc, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x03bc, 0x03f8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x03f8, 0x043f, 0x043f, 0x0454, 0x0454, - 0x0469, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0469, - 0x04ef, 0x04ef, 0x04f4, 0x04f4, 0x04f9, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x04f9, 0x04fa, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x04fa, 0x050c, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x050c, 0x0521, 0x0521, 0x0524, 0x0524, 0x0527, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0527, 0x0557, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0557, 0x05de, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x05de, 0x05e5, 0x05e5, 0x05e9, - 0x05e9, 0x05ed, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x01d4, 0x01e1, 0x01e1, 0x01e2, 0x01e2, 0x01e3, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01e3, 0x01e4, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x01e4, 0x0201, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0201, 0x022a, 0x022a, 0x022e, 0x022e, + 0x0232, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0232, + 0x0244, 0x0244, 0x024c, 0x024c, 0x0254, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0254, 0x0255, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0255, 0x0273, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0273, 0x02a6, 0x02a6, 0x02b2, 0x02b2, 0x02be, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x02be, 0x02bf, 0x02bf, + 0x02c6, 0x02c6, 0x02cd, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, }; static const u32 init_data_e1[] = { - 0x00010000, 0x000204c0, 0x00030980, 0x00040e40, 0x00051300, 0x000617c0, - 0x00071c80, 0x00082140, 0x00092600, 0x000a2ac0, 0x000b2f80, 0x000c3440, - 0x000d3900, 0x000e3dc0, 0x000f4280, 0x00104740, 0x00114c00, 0x001250c0, - 0x00135580, 0x00145a40, 0x00155f00, 0x001663c0, 0x00176880, 0x00186d40, - 0x00197200, 0x001a76c0, 0x001b7b80, 0x001c8040, 0x001d8500, 0x001e89c0, - 0x001f8e80, 0x00009340, 0x00002000, 0x00004000, 0x00006000, 0x00008000, - 0x0000a000, 0x0000c000, 0x0000e000, 0x00010000, 0x00012000, 0x00014000, - 0x00016000, 0x00018000, 0x0001a000, 0x0001c000, 0x0001e000, 0x00020000, - 0x00022000, 0x00024000, 0x00026000, 0x00028000, 0x0002a000, 0x0002c000, - 0x0002e000, 0x00030000, 0x00032000, 0x00034000, 0x00036000, 0x00038000, - 0x0003a000, 0x0003c000, 0x0003e000, 0x00040000, 0x00042000, 0x00044000, - 0x00046000, 0x00048000, 0x0004a000, 0x0004c000, 0x0004e000, 0x00050000, - 0x00052000, 0x00054000, 0x00056000, 0x00058000, 0x0005a000, 0x0005c000, - 0x0005e000, 0x00060000, 0x00062000, 0x00064000, 0x00066000, 0x00068000, - 0x0006a000, 0x0006c000, 0x0006e000, 0x00070000, 0x00072000, 0x00074000, - 0x00076000, 0x00078000, 0x0007a000, 0x0007c000, 0x0007e000, 0x00080000, - 0x00082000, 0x00084000, 0x00086000, 0x00088000, 0x0008a000, 0x0008c000, - 0x0008e000, 0x00090000, 0x00092000, 0x00094000, 0x00096000, 0x00098000, - 0x0009a000, 0x0009c000, 0x0009e000, 0x000a0000, 0x000a2000, 0x000a4000, - 0x000a6000, 0x000a8000, 0x000aa000, 0x000ac000, 0x000ae000, 0x000b0000, - 0x000b2000, 0x000b4000, 0x000b6000, 0x000b8000, 0x000ba000, 0x000bc000, - 0x000be000, 0x000c0000, 0x000c2000, 0x000c4000, 0x000c6000, 0x000c8000, - 0x000ca000, 0x000cc000, 0x000ce000, 0x000d0000, 0x000d2000, 0x000d4000, - 0x000d6000, 0x000d8000, 0x000da000, 0x000dc000, 0x000de000, 0x000e0000, - 0x000e2000, 0x000e4000, 0x000e6000, 0x000e8000, 0x000ea000, 0x000ec000, - 0x000ee000, 0x000f0000, 0x000f2000, 0x000f4000, 0x000f6000, 0x000f8000, - 0x000fa000, 0x000fc000, 0x000fe000, 0x00100000, 0x00102000, 0x00104000, - 0x00106000, 0x00108000, 0x0010a000, 0x0010c000, 0x0010e000, 0x00110000, - 0x00112000, 0x00114000, 0x00116000, 0x00118000, 0x0011a000, 0x0011c000, - 0x0011e000, 0x00120000, 0x00122000, 0x00124000, 0x00126000, 0x00128000, - 0x0012a000, 0x0012c000, 0x0012e000, 0x00130000, 0x00132000, 0x00134000, - 0x00136000, 0x00138000, 0x0013a000, 0x0013c000, 0x0013e000, 0x00140000, - 0x00142000, 0x00144000, 0x00146000, 0x00148000, 0x0014a000, 0x0014c000, - 0x0014e000, 0x00150000, 0x00152000, 0x00154000, 0x00156000, 0x00158000, - 0x0015a000, 0x0015c000, 0x0015e000, 0x00160000, 0x00162000, 0x00164000, - 0x00166000, 0x00168000, 0x0016a000, 0x0016c000, 0x0016e000, 0x00170000, - 0x00172000, 0x00174000, 0x00176000, 0x00178000, 0x0017a000, 0x0017c000, - 0x0017e000, 0x00180000, 0x00182000, 0x00184000, 0x00186000, 0x00188000, - 0x0018a000, 0x0018c000, 0x0018e000, 0x00190000, 0x00192000, 0x00194000, - 0x00196000, 0x00198000, 0x0019a000, 0x0019c000, 0x0019e000, 0x001a0000, - 0x001a2000, 0x001a4000, 0x001a6000, 0x001a8000, 0x001aa000, 0x001ac000, - 0x001ae000, 0x001b0000, 0x001b2000, 0x001b4000, 0x001b6000, 0x001b8000, - 0x001ba000, 0x001bc000, 0x001be000, 0x001c0000, 0x001c2000, 0x001c4000, - 0x001c6000, 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0x000086cc, 0x000086ce, - 0x000086d0, 0x000086d2, 0x000086d4, 0x000086d6, 0x000086d8, 0x000086da, - 0x000086dc, 0x000086de, 0x000086e0, 0x000086e2, 0x000086e4, 0x000086e6, - 0x000086e8, 0x000086ea, 0x000086ec, 0x000086ee, 0x000086f0, 0x000086f2, - 0x000086f4, 0x000086f6, 0x000086f8, 0x000086fa, 0x000086fc, 0x000086fe, - 0x00008700, 0x00008702, 0x00008704, 0x00008706, 0x00008708, 0x0000870a, - 0x0000870c, 0x0000870e, 0x00008710, 0x00008712, 0x00008714, 0x00008716, - 0x00008718, 0x0000871a, 0x0000871c, 0x0000871e, 0x00008720, 0x00008722, - 0x00008724, 0x00008726, 0x00008728, 0x0000872a, 0x0000872c, 0x0000872e, - 0x00008730, 0x00008732, 0x00008734, 0x00008736, 0x00008738, 0x0000873a, - 0x0000873c, 0x0000873e, 0x00008740, 0x00008742, 0x00008744, 0x00008746, - 0x00008748, 0x0000874a, 0x0000874c, 0x0000874e, 0x00008750, 0x00008752, - 0x00008754, 0x00008756, 0x00008758, 0x0000875a, 0x0000875c, 0x0000875e, - 0x00008760, 0x00008762, 0x00008764, 0x00008766, 0x00008768, 0x0000876a, - 0x0000876c, 0x0000876e, 0x00008770, 0x00008772, 0x00008774, 0x00008776, - 0x00008778, 0x0000877a, 0x0000877c, 0x0000877e, 0x00008780, 0x00008782, - 0x00008784, 0x00008786, 0x00008788, 0x0000878a, 0x0000878c, 0x0000878e, - 0x00008790, 0x00008792, 0x00008794, 0x00008796, 0x00008798, 0x0000879a, - 0x0000879c, 0x0000879e, 0x000087a0, 0x000087a2, 0x000087a4, 0x000087a6, - 0x000087a8, 0x000087aa, 0x000087ac, 0x000087ae, 0x000087b0, 0x000087b2, - 0x000087b4, 0x000087b6, 0x000087b8, 0x000087ba, 0x000087bc, 0x000087be, - 0x000087c0, 0x000087c2, 0x000087c4, 0x000087c6, 0x000087c8, 0x000087ca, - 0x000087cc, 0x000087ce, 0x000087d0, 0x000087d2, 0x000087d4, 0x000087d6, - 0x000087d8, 0x000087da, 0x000087dc, 0x000087de, 0x000087e0, 0x000087e2, - 0x000087e4, 0x000087e6, 0x000087e8, 0x000087ea, 0x000087ec, 0x000087ee, - 0x000087f0, 0x000087f2, 0x000087f4, 0x000087f6, 0x000087f8, 0x000087fa, - 0x000087fc, 0x000087fe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000003, 0x00bebc20, - 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, - 0x00002000, 0x000040c0, 0x00006180, 0x00008240, 0x0000a300, 0x0000c3c0, - 0x0000e480, 0x00010540, 0x00012600, 0x000146c0, 0x00016780, 0x00018840, - 0x0001a900, 0x0001c9c0, 0x0001ea80, 0x00020b40, 0x00022c00, 0x00024cc0, - 0x00026d80, 0x00028e40, 0x0002af00, 0x0002cfc0, 0x0002f080, 0x00001140, - 0x00008000, 0x00010380, 0x00018700, 0x00020a80, 0x00028e00, 0x00031180, - 0x00039500, 0x00041880, 0x00049c00, 0x00051f80, 0x0005a300, 0x00062680, - 0x0006aa00, 0x00072d80, 0x0007b100, 0x00083480, 0x0008b800, 0x00093b80, - 0x0009bf00, 0x000a4280, 0x000ac600, 0x000b4980, 0x000bcd00, 0x000c5080, - 0x000cd400, 0x000d5780, 0x00005b00, 0x00007ff8, 0x00007ff8, 0x000001c8, - 0x00003500, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x00001900, - 0xffffffff, 0xffffffff, 0x00007ff8, 0x00007ff8, 0x00000392, 0x00001500, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 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0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, - 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, - 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, - 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, - 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, - 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, - 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x000000ff, 0x000000ff, - 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0x00001000, 0x00002080, 0x00003100, 0x00004180, 0x00005200, 0x00006280, - 0x00007300, 0x00008380, 0x00009400, 0x0000a480, 0x0000b500, 0x0000c580, - 0x0000d600, 0x0000e680, 0x0000f700, 0x00010780, 0x00011800, 0x00012880, - 0x00013900, 0x00014980, 0x00015a00, 0x00016a80, 0x00017b00, 0x00018b80, - 0x00019c00, 0x0001ac80, 0x0001bd00, 0x0001cd80, 0x0001de00, 0x0001ee80, - 0x00000f00, 0x00000000, 0x00007ff8, 0x00007ff8, 0x00000264, 0x00003500, - 0x10000000, 0x000028ad, 0x00010001, 0xffffffff, 0xffffffff, 0x00260106, - 0xccccccc1, 0x7058103c, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x00000000, 0x00000001, 0xcccc0201, 0xcccccccc, 0xcccc0201, - 0xcccccccc, 0xffffffff, 0xffffffff, 0x0000ffff, 0x00000000, 0x0000ffff, - 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, - 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, - 0x00000000, 0x000e0000, 0x011600d6, 0x0000ffff, 0x00000000, 0x0000ffff, - 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, - 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, - 0x00000000, 0x00720000, 0x012300f3, 0xfffffff3, 0x318fffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, - 0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, - 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, - 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, - 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, - 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, - 0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, - 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7, 0x31efffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, - 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, - 0xcdcdcdcd, 0xfffffff3, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, - 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, - 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, - 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014, - 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, - 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, - 0xcdcdcdcd, 0xfffffff7, 0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, - 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x304fffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x320fffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, - 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, - 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, - 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, - 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, - 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, - 0xcdcdcdcd, 0xffffff8a, 0x042fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, - 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97, 0x05cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, - 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, - 0xcdcdcdcd, 0xfffffff3, 0x300fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, - 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x300fffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, - 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, - 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014, - 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, - 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, - 0xcdcdcdcd, 0xffffff97, 0x040fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, - 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x300fffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, - 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, - 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, - 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, - 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0x000c0000, - 0x000700c0, 0x00028130, 0x000b8158, 0x00020210, 0x00010230, 0x000f0240, - 0x00010330, 0x00080000, 0x00080080, 0x00028100, 0x000b8128, 0x000201e0, - 0x00010200, 0x00070210, 0x00020280, 0x00100000, 0x00080100, 0x00028180, - 0x000b81a8, 0x00020260, 0x00018280, 0x000e8298, 0x00080380, 0x00028000, - 0x000b8028, 0x000200e0, 0x00010100, 0x00008110, 0x00000118, 0xcccccccc, - 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000, 0xcccccccc, 0xcccccccc, - 0xcccccccc, 0xcccccccc, 0x00002000, 0xcccccccc, 0xcccccccc, 0xcccccccc, - 0xcccccccc, 0x00002000 -}; - -static const u8 tsem_int_table_data_e1[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, - 0xcf, 0xc0, 0xf0, 0x03, 0x8a, 0xf5, 0xd9, 0x18, 0x18, 0xde, 0x71, 0x22, - 0xf8, 0x43, 0x01, 0xfb, 0xb3, 0x30, 0x30, 0x84, 0x01, 0x71, 0x31, 0x10, - 0xc7, 0xb2, 0xe0, 0x57, 0xab, 0xc2, 0x84, 0x29, 0xe6, 0x2d, 0x8d, 0x60, - 0x6b, 0x49, 0x32, 0x30, 0xf8, 0x00, 0xb1, 0x84, 0x38, 0x03, 0x03, 0x9b, - 0x14, 0x42, 0x7c, 0x03, 0x50, 0x4d, 0x2c, 0x90, 0xaf, 0x09, 0x15, 0x9b, - 0x09, 0xa4, 0x85, 0xa5, 0x29, 0x77, 0xfb, 0x28, 0x1e, 0x78, 0xfc, 0x4d, - 0x1d, 0x95, 0xff, 0x50, 0x15, 0x42, 0xe7, 0x41, 0xc5, 0xbf, 0xa3, 0xc9, - 0x3f, 0x82, 0xca, 0xff, 0x52, 0x80, 0x8a, 0xa9, 0x63, 0x37, 0xf7, 0x37, - 0x54, 0x1e, 0x00, 0x4d, 0xbf, 0x30, 0x30, 0x60, 0x03, 0x00, 0x00, 0x00 -}; - -static const u8 tsem_pram_data_e1[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xed, 0x7d, - 0x0d, 0x78, 0x54, 0xd5, 0xb5, 0xe8, 0x3e, 0x73, 0x7e, 0xe6, 0xcc, 0x64, - 0x66, 0x72, 0x12, 0x86, 0x64, 0x06, 0x02, 0x9e, 0xc4, 0x80, 0x41, 0x03, - 0x0e, 0x31, 0xfc, 0x55, 0xaa, 0x27, 0x21, 0x60, 0xec, 0xa5, 0x75, 0x04, - 0x94, 0xd4, 0x67, 0xeb, 0xa0, 0xa8, 0x08, 0x02, 0x01, 0x69, 0x9b, 0xde, - 0x72, 0xef, 0x1c, 0xc8, 0x2f, 0x7f, 0x1a, 0xac, 0x0f, 0x7d, 0xd6, 0xb6, - 0x23, 0xc5, 0x36, 0xfa, 0x50, 0xa3, 0x37, 0xb5, 0xdc, 0xf7, 0x61, 0xdf, - 0xa4, 0x5a, 0x8b, 0x7d, 0xf7, 0xbe, 0x46, 0xa4, 0xca, 0xad, 0xd8, 0x17, - 0x94, 0x5a, 0xb1, 0x40, 0xa9, 0xb7, 0x3c, 0xe8, 0xad, 0x2d, 0x6f, 0xad, - 0xbd, 0xf7, 0x99, 0x9c, 0x73, 0x32, 0x93, 0x1f, 0x8b, 0xd5, 0xef, 0xf5, - 0x86, 0x4f, 0x77, 0xf6, 0x39, 0xfb, 0x67, 0xed, 0xf5, 0xb7, 0xd7, 0x5e, - 0x6b, 0xed, 0x13, 0x45, 0x98, 0x4c, 0x94, 0xab, 0x09, 0x39, 0x8f, 0x3f, - 0x50, 0xfe, 0xab, 0x40, 0x08, 0x99, 0x31, 0x50, 0x5a, 0xcf, 0x89, 0x9a, - 0x58, 0x43, 0xc2, 0x84, 0xac, 0x88, 0x28, 0xfa, 0x56, 0x78, 0xb7, 0x4a, - 0x34, 0xf4, 0x4d, 0xd5, 0xf0, 0xfc, 0x22, 0x4f, 0xec, 0x31, 0x82, 0xcf, - 0x27, 0xd7, 0x91, 0x69, 0x84, 0xc8, 0xd8, 0x2f, 0x4a, 0x48, 0x15, 0xfe, - 0x0f, 0xfa, 0x4b, 0x85, 0x1d, 0x45, 0x89, 0x00, 0x3c, 0x13, 0x6f, 0xce, - 0xc7, 0xd2, 0x1a, 0xcf, 0x2a, 0x57, 0x48, 0x84, 0x68, 0x55, 0xf8, 0x7e, - 0xfb, 0xe4, 0x6c, 0xef, 0x33, 0xf3, 0xa7, 0xe4, 0xd3, 0xfd, 0x2a, 0xa1, - 0x3f, 0xe7, 0xcb, 0x08, 0x69, 0x3a, 0x52, 0x5a, 0xff, 0x62, 0x05, 0xaf, - 0xc3, 0x7f, 0xe3, 0x49, 0x30, 0xfc, 0xce, 0x65, 0xf0, 0xcb, 0x2c, 0x32, - 0xeb, 0xbc, 0x48, 0xc8, 0xfb, 0x25, 0x8b, 0xf2, 0xd3, 0x7a, 0xee, 0xf1, - 0xde, 0x4b, 0x1e, 0xd0, 0xa4, 0x49, 0x84, 0x9c, 0x4d, 0xea, 0xf5, 0x2f, - 0xca, 0x83, 0xdf, 0xaf, 0x12, 0x49, 0x63, 0x77, 0xe5, 0xe0, 0xe7, 0x9f, - 0x22, 0x00, 0xc4, 0x58, 0xc4, 0x87, 0xa9, 0xc4, 0xa7, 0x0e, 0xac, 0x7b, - 0x15, 0x21, 0x69, 0x6f, 0x21, 0x21, 0xed, 0x25, 0x9b, 0xd9, 0x7a, 0xc3, - 0x80, 0xac, 0x39, 0xf0, 0xbc, 0xeb, 0x65, 0x4d, 0xb2, 0xc1, 0xb9, 0x4a, - 0x82, 0x76, 0x55, 0x83, 0xd7, 0x43, 0x88, 0x49, 0xc7, 0xb5, 0xc6, 0xc9, - 0xf4, 0x4f, 0x1d, 0x70, 0xf4, 0x77, 0xf7, 0xcb, 0x8c, 0xc7, 0xfb, 0x13, - 0x09, 0xfe, 0xcd, 0x24, 0xc4, 0xc7, 0x9a, 0x90, 0x07, 0x85, 0xc4, 0xd5, - 0x48, 0x07, 0x6f, 0xc9, 0x22, 0x73, 0x1c, 0xe0, 0x63, 0xd5, 0xde, 0x1a, - 0x92, 0xa8, 0xcc, 0x0d, 0x7f, 0x86, 0x5e, 0x1f, 0x12, 0x7e, 0xab, 0x5f, - 0x4e, 0x3a, 0xf2, 0x76, 0xef, 0xef, 0x69, 0x6e, 0x23, 0xd0, 0xef, 0x1d, - 0xa5, 0xf3, 0x73, 0x9f, 0x02, 0x3e, 0xfa, 0xf5, 0x33, 0x62, 0x6c, 0x33, - 0xf2, 0xd1, 0x23, 0x97, 0xd4, 0x91, 0x10, 0x3c, 0x27, 0x8c, 0x8f, 0x2c, - 0x3a, 0x1d, 0xdf, 0xd3, 0x5c, 0x94, 0x8d, 0x3f, 0x72, 0xd1, 0xe9, 0x1f, - 0x10, 0x03, 0x33, 0x06, 0xf8, 0x6b, 0x85, 0xe7, 0xe6, 0xfc, 0x34, 0xf9, - 0xf0, 0xfc, 0x75, 0x27, 0xf2, 0x57, 0x9e, 0x8d, 0xbf, 0xba, 0x17, 0x0f, - 0x39, 0xde, 0x87, 0xe5, 0xaf, 0x16, 0x37, 0x7f, 0x71, 0x7c, 0x9c, 0xe8, - 0x66, 0xeb, 0x27, 0x0f, 0x8d, 0x61, 0x74, 0xe1, 0xf4, 0x72, 0xd3, 0x27, - 0x27, 0x5d, 0x3e, 0x6c, 0xbf, 0xc1, 0xfc, 0xb4, 0x05, 0x9f, 0x7b, 0xbb, - 0x17, 0x9b, 0xe3, 0x48, 0x16, 0x7e, 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0xf0, 0x34, 0x08, 0x60, 0xb4, 0xba, 0xd9, 0x8a, 0x5d, 0x5c, 0x47, 0xf8, - 0x3f, 0xcc, 0x87, 0xe5, 0x19, 0x40, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const u8 usem_int_table_data_e1[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, - 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0xdf, 0x66, 0x47, 0xe5, 0xbb, 0x72, 0xa0, - 0xf2, 0x4b, 0xd1, 0xe4, 0x7f, 0xb2, 0xa1, 0xf2, 0xaf, 0xa1, 0xf1, 0x09, - 0xe1, 0x5a, 0x26, 0xd2, 0xd4, 0xa3, 0x63, 0x4e, 0x66, 0x06, 0x06, 0x01, - 0x20, 0x16, 0x07, 0x62, 0x39, 0x66, 0xfc, 0x6a, 0x03, 0x08, 0xd8, 0x75, - 0x40, 0x84, 0x81, 0xa1, 0x5a, 0x9c, 0x81, 0x61, 0x26, 0x90, 0x16, 0x02, - 0xd2, 0xd1, 0x40, 0x5c, 0x03, 0xc4, 0xb7, 0x80, 0x7c, 0x16, 0x51, 0x06, - 0x06, 0x61, 0x20, 0xce, 0x12, 0x63, 0x60, 0xb0, 0x06, 0xd2, 0x05, 0x40, - 0xec, 0x25, 0x0a, 0xd1, 0xd7, 0x0b, 0xa4, 0xdd, 0xc5, 0xc8, 0x73, 0xbf, - 0x34, 0x2f, 0x65, 0xfe, 0x1f, 0xc5, 0x94, 0x61, 0x19, 0x19, 0x54, 0x3e, - 0x8f, 0x2a, 0x03, 0x83, 0xad, 0x1a, 0x03, 0x43, 0xb3, 0x3a, 0x84, 0x2f, - 0x82, 0x24, 0x3f, 0x03, 0x28, 0xc6, 0xab, 0x0a, 0x61, 0xaf, 0x92, 0x63, - 0x60, 0x90, 0x07, 0xf2, 0x79, 0x64, 0xb0, 0x9b, 0xbb, 0x1a, 0x28, 0xaf, - 0x00, 0x94, 0x5f, 0x01, 0x35, 0x07, 0x00, 0x8b, 0x36, 0x0e, 0x0a, 0x68, - 0x03, 0x00, 0x00, 0x00 -}; - -static const u8 usem_pram_data_e1[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xdd, 0x7d, - 0x0b, 0x78, 0x54, 0xd5, 0xb5, 0xf0, 0x3e, 0x8f, 0x79, 0x64, 0x32, 0x33, - 0x39, 0x49, 0x26, 0x61, 0x08, 0x41, 0x4f, 0x30, 0x60, 0xd4, 0x10, 0x86, - 0x57, 0x08, 0x88, 0x7a, 0x12, 0x02, 0x8d, 0x8a, 0x38, 0x3c, 0xd4, 0xd8, - 0x4b, 0xdb, 0x81, 0xfa, 0x88, 0xca, 0x23, 0x0a, 0xd5, 0x68, 0xfd, 0x9b, - 0x81, 0x3c, 0x79, 0x1a, 0x15, 0x15, 0xb1, 0xa5, 0x13, 0xb5, 0x5e, 0x44, - 0xd4, 0xa8, 0xa8, 0x14, 0xad, 0x4e, 0x84, 0xab, 0x69, 0xeb, 0x6d, 0xa3, - 0x57, 0x2b, 0x6d, 0xf5, 0xde, 0x48, 0x6d, 0xb5, 0x56, 0xb9, 0xf1, 0x41, - 0xb5, 0xff, 0xa5, 0xf2, 0xaf, 0xb5, 0xf6, 0x3e, 0xc9, 0x39, 0x27, 0x33, - 0x09, 0x72, 0xfb, 0xff, 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0x00000000, 0x00200000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00400000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00000000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00010000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00020000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00040000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00080000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00100000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00200000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00400000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 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0x00000000, 0x00000000, 0x00000000, 0x000087f8, 0x00000000, 0x00000000, + 0x00000000, 0x000087fa, 0x00000000, 0x00000000, 0x00000000, 0x000087fc, + 0x00000000, 0x00000000, 0x00000000, 0x000087fe, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x000001d2, 0x00001500, 0x00000001, 0x00000002, + 0x00000003, 0x00000000, 0x00000004, 0x00000001, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000004, 0x00000003, 0x00000000, 0x00000000, + 0x00003fff, 0x000003ff, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, + 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, 0x0000000d, 0x0000000c, + 0x00000000, 0x00000010, 0x02150020, 0x02150020, 0x00000030, 0x08100000, + 0x00000033, 0x00000030, 0x00000031, 0x00000002, 0x00000004, 0x00000000, + 0x00000002, 0x00000002, 0x00000000, 0x00000002, 0x00000007, 0x00000002, + 0x00000002, 0x00000001, 0x00000003, 0x00000001, 0x00000002, 0x00000040, + 0x00000040, 0x00000004, 0x00000020, 0x0000000f, 0x0000001b, 0x00008000, + 0x000103c0, 0x00018780, 0x00020b40, 0x00028f00, 0x000312c0, 0x00039680, + 0x00041a40, 0x00049e00, 0x000521c0, 0x0005a580, 0x00062940, 0x0006ad00, + 0x000730c0, 0x0007b480, 0x00083840, 0x0008bc00, 0x00093fc0, 0x0009c380, + 0x000a4740, 0x000acb00, 0x000b4ec0, 0x000bd280, 0x000c5640, 0x000cda00, + 0x000d5dc0, 0x00006180, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x000005aa, 0x00000599, 0x0000059d, 0x000003c0, 0x0000ffff, + 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x00000046, 0x0000000c, 0x07ffffff, + 0x0000003f, 0x07ffffff, 0x0000000f, 0x00007ff8, 0x00007ff8, 0xffffffff, + 0xffffffff, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x00001900, + 0x00000000, 0x000001d3, 0x00003500, 0x00000001, 0x00000002, 0x00000003, + 0x00000000, 0x00000004, 0x00000001, 0x00000000, 0x00000001, 0x00000004, + 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, 0x00000004, + 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, 0x00000004, + 0x00000000, 0x00000004, 0x00000003, 0x00000000, 0x00000000, 0x00003fff, + 0x000003ff, 0x0000000f, 0x00000007, 0x00000000, 0x0000000e, 0x03150020, + 0x03150020, 0x01000030, 0x08100000, 0x00000033, 0x00000030, 0x00000031, + 0x00000003, 0x00000006, 0x00000003, 0x00000003, 0x00000002, 0x00000000, + 0x00000002, 0x00000000, 0x00000006, 0x00000004, 0x00000002, 0x00000002, + 0x00000001, 0x00000004, 0x00000001, 0x00000002, 0x00000040, 0x00000040, + 0x00000004, 0x00000020, 0x00000002, 0x0000001f, 0x00001000, 0x00002080, + 0x00003100, 0x00004180, 0x00005200, 0x00006280, 0x00007300, 0x00008380, + 0x00009400, 0x0000a480, 0x0000b500, 0x0000c580, 0x0000d600, 0x0000e680, + 0x0000f700, 0x00010780, 0x00011800, 0x00012880, 0x00013900, 0x00014980, + 0x00015a00, 0x00016a80, 0x00017b00, 0x00018b80, 0x00019c00, 0x0001ac80, + 0x0001bd00, 0x0001cd80, 0x0001de00, 0x0001ee80, 0x00000f00, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000614, 0x00000600, 0x00000604, 0x0000ffff, 0x0000ffff, + 0x0000ffff, 0x0000ffff, 0x00000020, 0x00000020, 0x00000000, 0x00000000, + 0x00000023, 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000029, + 0x0000002a, 0x0000002b, 0x0000002c, 0x00000001, 0x00000001, 0x07ffffff, + 0x0000003f, 0x07ffffff, 0x0000000f, 0x00007ff8, 0x00007ff8, 0x00000000, + 0x00000001, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xffffffff, + 0xffffffff, 0x00000000, 0x00010001, 0x00350207, 0xccccccc1, 0xffffffff, + 0xffffffff, 0x10000000, 0x000028ad, 0x7058103c, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x00000282, 0x00001500, 0x00000001, + 0x00000002, 0x00000003, 0x00000000, 0x00000004, 0x00000001, 0x00000000, + 0x00000001, 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, + 0x00000001, 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, + 0x00000001, 0x00000004, 0x00000000, 0x00000004, 0x00000003, 0x00000000, + 0x00000000, 0x00003fff, 0x000003ff, 0x000e0000, 0x011600d6, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, + 0x00000000, 0x0000ffff, 0x00000000, 0x00720000, 0x012300f3, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, + 0x00000000, 0x0000ffff, 0x00000000, 0xbf5c0000, 0xfff51fef, 0x0000ffff, + 0xf00003e0, 0x00000000, 0x0000a000, 0x55540000, 0x55555555, 0x00005555, + 0xf0000000, 0x55540000, 0x55555555, 0x00005555, 0xf0000000, 0xbf5c0000, + 0xfff51fef, 0x0000ffff, 0xf00003e0, 0x00000000, 0x0000a000, 0x55540000, + 0x55555555, 0x00005555, 0xf0000000, 0x55540000, 0x55555555, 0x00005555, + 0xf0000000, }; static const u8 csem_int_table_data_e1[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x13, 0xe4, - 0x60, 0x60, 0xf8, 0x51, 0x0f, 0xc1, 0xfe, 0x48, 0x6c, 0x62, 0xf1, 0x42, - 0x16, 0xd2, 0xf5, 0x20, 0xe3, 0x39, 0x40, 0xfd, 0xd3, 0x81, 0x78, 0x12, - 0x10, 0xf7, 0x02, 0x71, 0x07, 0x10, 0x37, 0x03, 0x71, 0x1d, 0x10, 0x57, - 0x02, 0xf1, 0x17, 0x56, 0x06, 0x86, 0xf7, 0x40, 0xfc, 0x0a, 0x88, 0x9f, - 0x02, 0xf1, 0x03, 0x20, 0xbe, 0x0d, 0xc4, 0xd7, 0x80, 0xf8, 0x22, 0x2b, - 0xc2, 0x9c, 0x95, 0x6c, 0x0c, 0x0c, 0x1b, 0xd8, 0xf0, 0xdb, 0x65, 0x80, - 0x45, 0x3e, 0x88, 0x13, 0xc1, 0x7e, 0x0e, 0xf4, 0xff, 0x59, 0x20, 0x7e, - 0x4f, 0x46, 0x38, 0x8c, 0xe2, 0xe1, 0x81, 0x4b, 0x79, 0x18, 0x18, 0x1a, - 0x79, 0x11, 0x7c, 0x11, 0x3e, 0x54, 0xf9, 0x32, 0x1e, 0x04, 0x5b, 0x51, - 0x88, 0x32, 0xbb, 0x0c, 0x80, 0xfa, 0x01, 0x1e, 0x7d, 0xf7, 0xca, 0x80, - 0x03, 0x00, 0x00, 0x00 -}; + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xf3, 0xe6, + 0x60, 0x60, 0xf8, 0x51, 0x8f, 0xc0, 0xad, 0x68, 0x7c, 0x74, 0xfc, 0x0a, + 0x4d, 0x3e, 0x9b, 0x05, 0xbf, 0x7a, 0x42, 0x38, 0x0d, 0xa8, 0x3f, 0x11, + 0x88, 0x63, 0x80, 0x38, 0x1c, 0x88, 0x83, 0x80, 0xd8, 0x17, 0x88, 0x3d, + 0x80, 0xd8, 0x19, 0x88, 0x0b, 0xd8, 0x80, 0x76, 0x00, 0x71, 0x1a, 0x10, + 0x27, 0x02, 0x71, 0x0c, 0x10, 0x87, 0x03, 0x71, 0x10, 0x10, 0xfb, 0xb2, + 0x21, 0xcc, 0xd1, 0x63, 0x67, 0x60, 0x30, 0x65, 0xc7, 0x6f, 0xd7, 0x4a, + 0x36, 0x4c, 0xb1, 0xa7, 0x5c, 0x08, 0xb6, 0x0d, 0x27, 0x65, 0x7e, 0x19, + 0xc5, 0x43, 0x1f, 0xff, 0xe1, 0x65, 0x60, 0xf8, 0xce, 0x87, 0xe0, 0x37, + 0xf2, 0xa3, 0xca, 0xff, 0xe5, 0x45, 0xb0, 0xe3, 0x85, 0x29, 0xb3, 0x2b, + 0x0f, 0xa8, 0x1f, 0x00, 0xbd, 0xa2, 0x3b, 0x7c, 0x80, 0x03, 0x00, 0x00, + }; static const u8 csem_pram_data_e1[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xd5, 0x7d, - 0x0b, 0x78, 0x15, 0xd5, 0xb5, 0xf0, 0x9e, 0x33, 0x33, 0xe7, 0x91, 0x9c, - 0xc7, 0xe4, 0xc9, 0x09, 0x04, 0x99, 0x84, 0x00, 0x41, 0x02, 0x1e, 0x92, - 0x10, 0x41, 0xe9, 0x75, 0x20, 0x08, 0xf1, 0xca, 0x6f, 0x03, 0x52, 0x44, - 0xcb, 0xd5, 0x03, 0x22, 0x86, 0x67, 0x52, 0xc4, 0x5b, 0xfe, 0x6a, 0xff, - 0x9c, 0x3c, 0x08, 0x20, 0xa2, 0x51, 0x40, 0xd1, 0xa2, 0x3d, 0x50, 0xb0, - 0xa8, 0xd0, 0x46, 0x08, 0x96, 0xda, 0xe0, 0x3d, 0x01, 0x8a, 0xf1, 0xfe, - 0x6a, 0x43, 0x45, 0x45, 0xab, 0x35, 0x6a, 0xeb, 0x93, 0x47, 0x8a, 0x52, - 0xbd, 0xad, 0xbd, 0xdc, 0xb5, 0xd6, 0xde, 0x93, 0x73, 0x66, 0x72, 0x02, - 0x58, 0xed, 0xfd, 0xef, 0x1f, 0x3e, 0xbe, 0xc9, 0x9e, 0xd9, 0x8f, 0xb5, - 0xd7, 0x5e, 0xaf, 0xbd, 0xd6, 0xda, 0x3b, 0x4e, 0x69, 0x28, 0x73, 0x0c, - 0x62, 0xec, 0x2c, 0xfe, 0x5c, 0xc1, 0xd8, 0xfd, 0x32, 0x63, 0x2c, 0x2b, - 0xfe, 0x1c, 0x7d, 0xc7, 0xb5, 0x8b, 0x76, 0x95, 0xc2, 0xef, 0x7f, 0x75, - 0x86, 0xb6, 0xeb, 0xf1, 0x7a, 0xe6, 0x73, 0x10, 0x93, 0x18, 0x1b, 0x03, - 0xdf, 0x59, 0x90, 0xb1, 0x32, 0xc6, 0xae, 0x70, 0xc3, 0xaf, 0x50, 0xaf, - 0xfc, 0xb9, 0xe3, 0xbf, 0xbb, 0x24, 0x93, 0xb1, 0x76, 0x26, 0x33, 0x17, - 0xbc, 0x8a, 0x29, 0xe5, 0x19, 0xff, 0x0b, 0xfa, 0x69, 0xff, 0x92, 0x85, - 0xf0, 0xbb, 0xe3, 0x39, 0x6f, 0x6e, 0x97, 0x17, 0xdb, 0x45, 0x18, 0xcb, - 0x66, 0xec, 0x9f, 0x18, 0x6f, 0x17, 0xcb, 0xd3, 0x73, 0xb5, 0x22, 0x2c, - 0x30, 0x07, 0xbe, 0x37, 0xdc, 0xf4, 0x3b, 0xf4, 0x33, 0x78, 0x73, 0x0d, - 0xb4, 0x3f, 0xf3, 0x85, 0x97, 0xda, 0xdb, 0xe1, 0x30, 0x9f, 0xec, 0x4b, - 0x07, 0x8b, 0x89, 0x36, 0x67, 0xf3, 0xb1, 0x5f, 0xe5, 0xb3, 0xae, 0x42, - 0x51, 0xce, 0x63, 0x30, 0x38, 0x13, 0xf0, 0xe6, 0xd2, 0xb8, 0x26, 0xbc, - 0x87, 0xde, 0xfa, 0x80, 0xe0, 0x3d, 0xa0, 0x00, 0xbc, 0x7a, 0x92, 0xf1, - 0xdd, 0x00, 0x7f, 0x66, 0x1c, 0xfe, 0x76, 0x76, 0x6d, 0x80, 0x15, 0x71, - 0xf8, 0x8d, 0xb2, 0x38, 0xfc, 0x5f, 0x15, 0x1e, 0x9a, 0x3f, 0xe0, 0xb9, - 0xa1, 0x56, 0xbf, 0xba, 0x60, 0x08, 0x63, 0x77, 0xd7, 0xb2, 0xab, 0x0b, - 0x54, 0xc6, 0xee, 0xaa, 0x75, 0x53, 0x79, 0x75, 0xad, 0x46, 0xe5, 0x95, - 0xb5, 0x41, 0x7a, 0x36, 0x28, 0xd0, 0x04, 0xe0, 0x68, 0x68, 0x65, 0xd1, - 0x08, 0xb4, 0xf7, 0x85, 0xa0, 0xbe, 0xd9, 0x3f, 0xfc, 0x4f, 0x2d, 0x84, - 0x76, 0x85, 0xf1, 0xb2, 0x47, 0xd7, 0x2c, 0x65, 0x67, 0x66, 0xd0, 0x52, - 0x56, 0xbc, 0xba, 0xa5, 0xdc, 0xe0, 0x9d, 0xe8, 0x0e, 0x7b, 0x71, 0x7c, - 0x98, 0xbb, 0x0b, 0xc7, 0x77, 0xd3, 0x13, 0xc0, 0x3c, 0x1a, 0x04, 0x7c, - 0x8c, 0xe2, 0x55, 0x59, 0x8a, 0xde, 0x3c, 0x0b, 0xe1, 0xc8, 0xf0, 0x3a, - 0xf5, 0x28, 0xc0, 0x31, 0xca, 0x3b, 0x7f, 0x2a, 0xf3, 0x63, 0xbd, 0x21, - 0x84, 0x37, 0xa7, 0xc0, 0xeb, 0xb2, 0x9c, 0xfb, 0xbb, 0x18, 0xac, 0xdb, - 0x67, 0x50, 0x8f, 0x41, 0xbd, 0x91, 0xde, 0xc9, 0x1f, 0x61, 0x27, 0xff, - 0x3e, 0xe4, 0x69, 0x3e, 0x8f, 0x4a, 0xc6, 0xfa, 0x01, 0x09, 0xad, 0xfe, - 0x61, 0xa4, 0x4b, 0x82, 0x7a, 0x2b, 0x73, 0x9c, 0x7a, 0x3d, 0x94, 0x9f, - 0x80, 0xf1, 0x57, 0xbb, 0x12, 0xf0, 0xb8, 0x4f, 0x79, 0x17, 0xf1, 0xe6, - 0x86, 0x7f, 0x88, 0xc7, 0x11, 0x3b, 0xa0, 0x6c, 0x99, 0xb7, 0xb5, 0x3c, - 0x92, 0xf1, 0xfa, 0x26, 0x9e, 0xcd, 0x7e, 0xbe, 0x6a, 0xbf, 0x99, 0x53, - 0xcf, 0xdd, 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0x91, 0xe8, 0x45, 0x85, 0xf5, 0xb3, + 0x00, 0x63, 0x81, 0x70, 0xf7, 0xb6, 0x8e, 0xab, 0x71, 0x2e, 0x8e, 0xff, + 0xe9, 0x98, 0x7c, 0x08, 0x7f, 0x33, 0x20, 0x24, 0x11, 0xfe, 0xa7, 0x83, + 0x0c, 0x8f, 0xd1, 0x58, 0xc6, 0xc0, 0x45, 0x7a, 0x0f, 0x68, 0x12, 0xe5, + 0xd1, 0xe9, 0x72, 0xe4, 0xb0, 0x50, 0xca, 0x9e, 0xab, 0x32, 0xe2, 0xee, + 0x5e, 0x18, 0x60, 0xcf, 0xef, 0xa3, 0x57, 0x3a, 0xb8, 0x6f, 0x16, 0xb8, + 0x65, 0x1a, 0xcf, 0x01, 0xb5, 0x99, 0x0a, 0xd2, 0xcc, 0x50, 0x64, 0x21, + 0xb5, 0xf1, 0x91, 0x2c, 0x39, 0xf3, 0x32, 0xe2, 0x8c, 0x52, 0xca, 0xed, + 0xfc, 0x16, 0xb7, 0x8b, 0x0c, 0x97, 0x0d, 0xdc, 0xe1, 0x62, 0x6c, 0x56, + 0xd8, 0x7b, 0x6a, 0x43, 0xee, 0x69, 0x02, 0x97, 0x7b, 0xba, 0x0f, 0xac, + 0x94, 0x27, 0x17, 0xb8, 0x78, 0x1c, 0x7b, 0x6c, 0x5c, 0xcf, 0xd8, 0x20, + 0xb0, 0xf7, 0x55, 0x86, 0x5c, 0x33, 0x65, 0x58, 0x20, 0xa1, 0xfc, 0xf7, + 0xca, 0x60, 0x4d, 0xc7, 0xf5, 0xfb, 0xba, 0x45, 0x16, 0x9f, 0x87, 0x06, + 0xdc, 0x1a, 0xe5, 0x33, 0x8f, 0x4b, 0xdf, 0xf7, 0x0f, 0xdc, 0x97, 0xcb, + 0x5a, 0x0f, 0x78, 0xcc, 0x1b, 0xd7, 0xb3, 0x12, 0xf7, 0xd1, 0x7b, 0xb2, + 0xe9, 0x32, 0xde, 0x70, 0x99, 0x7d, 0x22, 0xb7, 0xd5, 0x77, 0x26, 0xbd, + 0xbc, 0xa2, 0xbe, 0x07, 0x62, 0x3f, 0x24, 0x7e, 0x73, 0xc2, 0x16, 0xd6, + 0xa7, 0x88, 0x56, 0x55, 0xa2, 0x7e, 0x73, 0x96, 0x8b, 0xfb, 0x8d, 0xbe, + 0xc7, 0xc8, 0x40, 0x3e, 0x95, 0x2d, 0x02, 0x9c, 0xa3, 0xef, 0x25, 0xf2, + 0xb9, 0x7e, 0x06, 0xff, 0x4a, 0x4c, 0x39, 0x0e, 0x2f, 0xad, 0xe7, 0x7a, + 0xd1, 0x2b, 0xde, 0x73, 0x4e, 0xfe, 0xfd, 0x06, 0xed, 0x03, 0x98, 0xab, + 0x90, 0x7d, 0x84, 0x48, 0x96, 0x78, 0xcb, 0xf6, 0xdd, 0xed, 0x18, 0xcd, + 0x02, 0x26, 0x77, 0xc6, 0xea, 0xd8, 0xb5, 0xa7, 0xca, 0xe2, 0xdf, 0xf3, + 0x78, 0xc2, 0xc7, 0xce, 0x09, 0x58, 0x87, 0x04, 0x9f, 0x8f, 0xd5, 0x1d, + 0x8f, 0xd5, 0x1e, 0xa1, 0xbe, 0x17, 0xbd, 0x7e, 0x35, 0xb1, 0x3f, 0x5e, + 0xe6, 0x5a, 0x55, 0xe3, 0x42, 0x9c, 0x08, 0x6e, 0x85, 0xd9, 0x07, 0x02, + 0xe0, 0xa6, 0x7c, 0x3e, 0x12, 0x76, 0x28, 0x74, 0x4f, 0x13, 0x69, 0x9d, + 0x8b, 0xbb, 0xe9, 0x53, 0xf4, 0xd3, 0x23, 0x3a, 0xbe, 0x2e, 0xa4, 0x67, + 0x94, 0xd2, 0xf7, 0x42, 0x7b, 0xb4, 0xa5, 0x6e, 0xc2, 0xf3, 0xf2, 0xe1, + 0x56, 0x0f, 0xd9, 0xdd, 0x6b, 0xcd, 0x99, 0x4a, 0xb8, 0x1d, 0xed, 0x08, + 0xd4, 0xb8, 0x50, 0xcf, 0x0b, 0xc2, 0xde, 0xf1, 0x8c, 0x89, 0xac, 0x95, + 0xfb, 0x87, 0xc5, 0xf1, 0x6c, 0x03, 0x5f, 0x05, 0xd9, 0x19, 0xbb, 0x00, + 0x86, 0xcf, 0xcd, 0x56, 0xce, 0xef, 0x66, 0x1a, 0xa7, 0x36, 0x4c, 0xc7, + 0x56, 0x94, 0x67, 0x1b, 0xe2, 0xde, 0xea, 0x24, 0xf9, 0x80, 0xe1, 0x56, + 0xd5, 0xdf, 0x5f, 0xaa, 0x1f, 0xa7, 0x69, 0xcd, 0x78, 0xde, 0xcf, 0x24, + 0x3f, 0x03, 0xdf, 0x4d, 0xd1, 0x63, 0x25, 0x7e, 0x90, 0x17, 0x38, 0x37, + 0x1d, 0xa9, 0x3c, 0xdb, 0xe7, 0xde, 0x60, 0xa7, 0x96, 0x1b, 0xf5, 0xb0, + 0xc5, 0xf5, 0x48, 0x3d, 0x87, 0xf4, 0xba, 0xc7, 0xd0, 0x4b, 0x8c, 0xeb, + 0x35, 0xf4, 0x1c, 0xd5, 0x34, 0x31, 0x97, 0xce, 0x71, 0x37, 0x0f, 0x08, + 0x4c, 0xbf, 0x9f, 0x93, 0xdd, 0xa6, 0x58, 0xb4, 0xbb, 0xe8, 0x7d, 0xc2, + 0x0f, 0x2c, 0xda, 0x78, 0x92, 0xc3, 0xd0, 0x0b, 0x0d, 0xcd, 0xbe, 0x37, + 0x52, 0x74, 0x7b, 0x19, 0x7a, 0x2a, 0xe4, 0x07, 0xaa, 0x03, 0x3e, 0xf4, + 0x83, 0xe1, 0x47, 0xb4, 0xd7, 0xb6, 0xf4, 0x64, 0x3d, 0x4d, 0xa0, 0xeb, + 0xe3, 0x46, 0x7f, 0x4c, 0x1e, 0xaa, 0x87, 0x81, 0x87, 0xff, 0x02, 0x43, + 0xc6, 0x7a, 0x90, 0x40, 0x1c, 0x00, 0x00, 0x00, }; + +static const u8 tsem_int_table_data_e1[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, + 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0xb7, 0x73, 0xa2, 0xf2, 0xa5, 0x59, 0x51, + 0xf9, 0x0d, 0x6c, 0xa8, 0xfc, 0x81, 0xc6, 0x29, 0xcc, 0x0c, 0x0c, 0xd9, + 0x40, 0xdc, 0x0a, 0xc4, 0x45, 0xcc, 0xf8, 0xd5, 0x86, 0x31, 0x61, 0x8a, + 0x31, 0xcb, 0x22, 0xd8, 0x3b, 0xa4, 0x18, 0x18, 0x24, 0x24, 0x20, 0x6c, + 0x6f, 0x89, 0x81, 0xf7, 0xdb, 0x28, 0xa6, 0x3d, 0xfe, 0xa3, 0x81, 0xca, + 0x67, 0x54, 0x87, 0xd0, 0x55, 0x50, 0xf1, 0xbf, 0x68, 0xf2, 0x4c, 0x50, + 0xf9, 0x8d, 0xca, 0x10, 0xfa, 0x9f, 0x06, 0x76, 0x73, 0x37, 0x41, 0xe5, + 0x01, 0xe3, 0x3a, 0x53, 0xdc, 0x60, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + }; + +static const u8 tsem_pram_data_e1[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xed, 0x7d, + 0x0d, 0x78, 0x54, 0xd5, 0xb5, 0xe8, 0x9e, 0x33, 0xe7, 0x9c, 0x39, 0x33, + 0x99, 0x99, 0x9c, 0x84, 0x10, 0x26, 0x21, 0xc1, 0x93, 0x10, 0x20, 0x68, + 0x80, 0x01, 0x22, 0x04, 0x8b, 0x76, 0x12, 0x82, 0xc6, 0x36, 0x57, 0x86, + 0x1f, 0x35, 0xb5, 0xa8, 0x03, 0x52, 0x8d, 0x40, 0x20, 0xd2, 0x58, 0x53, + 0x6b, 0x3b, 0x07, 0xf2, 0x63, 0xe4, 0xef, 0x05, 0xf5, 0x52, 0xf4, 0xa2, + 0x77, 0xa0, 0xd4, 0x62, 0xaf, 0xed, 0x8d, 0xdc, 0x68, 0xe9, 0xfb, 0xb0, + 0xdf, 0x44, 0xac, 0x17, 0x9f, 0x6d, 0x6f, 0x0a, 0x28, 0xda, 0xe2, 0x35, + 0x5a, 0xeb, 0xad, 0x56, 0xbc, 0xd1, 0x6a, 0xa5, 0xdf, 0x67, 0xeb, 0x5b, + 0x6b, 0xff, 0x64, 0xce, 0x39, 0x99, 0x49, 0x82, 0x55, 0x6f, 0xdf, 0xf7, + 0x1a, 0xbf, 0x76, 0xb3, 0xcf, 0x3e, 0x7b, 0xef, 0xb5, 0xd7, 0xdf, 0x5e, + 0x7b, 0xad, 0xb5, 0xcf, 0x78, 0xa4, 0x0b, 0x89, 0xfa, 0x79, 0x42, 0x3e, + 0xc2, 0x3f, 0x28, 0x8f, 0xbb, 0x08, 0x21, 0xe3, 0x53, 0xa5, 0x78, 0x4e, + 0xb4, 0xc8, 0xb5, 0xa4, 0x92, 0x90, 0xc6, 0x90, 0x6a, 0x6c, 0x85, 0xb6, + 0x75, 0x6e, 0xd2, 0xdc, 0x53, 0x81, 0xf5, 0xa9, 0xb5, 0x64, 0x26, 0x21, + 0x0a, 0xbe, 0x5f, 0x40, 0xe0, 0x9f, 0x05, 0xb4, 0x9f, 0x9c, 0xab, 0x85, + 0x93, 0x79, 0xd0, 0xfe, 0x9c, 0xbb, 0xca, 0x6d, 0xa4, 0xc6, 0x71, 0x96, + 0x8d, 0x32, 0x21, 0xfa, 0x1c, 0x28, 0xc9, 0xf6, 0x7e, 0x77, 0x10, 0xc6, + 0x48, 0x28, 0x83, 0x03, 0x1a, 0xa1, 0x7f, 0x1f, 0x95, 0x12, 0xd2, 0x7a, + 0x7a, 0x76, 0xdd, 0x53, 0xa2, 0x0e, 0xff, 0x0b, 0x91, 0x40, 0xde, 0xeb, + 0x17, 0xc0, 0x3f, 0xe6, 0x93, 0xf9, 0x1f, 0xb9, 0x09, 0x79, 0x57, 0x6f, + 0xc8, 0x4e, 0x8e, 0x30, 0xfe, 0x9b, 0xf1, 0x63, 0xba, 0x3c, 0x85, 0x90, + 0x0f, 0xe2, 0xe1, 0xba, 0xa7, 0xa6, 0x0c, 0x6f, 0x17, 0xeb, 0x58, 0x47, + 0xc8, 0x6b, 0x9e, 0x5c, 0x5c, 0xa7, 0xa9, 0x7e, 0x69, 0x06, 0x21, 0xf3, + 0x88, 0x46, 0xd7, 0x21, 0xd6, 0x27, 0xe7, 0x76, 0xe5, 0xc7, 0xfc, 0xf0, + 0xde, 0xc1, 0x67, 0x74, 0xb9, 0x3c, 0x05, 0x0f, 0xc9, 0x83, 0x45, 0x2e, + 0x80, 0xe7, 0x32, 0x49, 0x7a, 0xe6, 0x0c, 0x87, 0x7f, 0x08, 0x7f, 0xc4, + 0xa4, 0xe3, 0xc1, 0x3c, 0x49, 0x3a, 0x8f, 0xe8, 0x37, 0x00, 0xf0, 0x59, + 0xd6, 0xe7, 0xec, 0x3f, 0x34, 0x2e, 0xef, 0x4f, 0x64, 0xf8, 0x6f, 0x1e, + 0x21, 0x3e, 0xf6, 0x0a, 0x79, 0xd0, 0x15, 0xfb, 0x1c, 0x3e, 0xf7, 0xd6, + 0xde, 0x6a, 0x16, 0x02, 0x1e, 0xd6, 0x3d, 0xb2, 0x94, 0x20, 0x9c, 0xb8, + 0x8e, 0xe8, 0x8c, 0x14, 0xfc, 0x62, 0x5e, 0xb1, 0x8e, 0xa1, 0xf9, 0x1d, + 0xeb, 0xc9, 0xb4, 0x8e, 0xa1, 0xf9, 0x79, 0xbf, 0x4c, 0xf8, 0x16, 0xef, + 0xbd, 0x5b, 0xdb, 0xd1, 0x49, 0x24, 0x42, 0x4e, 0x2a, 0x46, 0x71, 0x14, + 0xf9, 0xa4, 0x6e, 0x5a, 0x2d, 0x01, 0xfa, 0x2e, 0x43, 0x3e, 0x59, 0x90, + 0xa2, 0xcb, 0xd2, 0xc5, 0x1d, 0x14, 0x9e, 0x4c, 0x74, 0x01, 0xfe, 0x30, + 0x74, 0xc4, 0x97, 0xdb, 0xcf, 0xf8, 0xe9, 0xf9, 0xb6, 0x2a, 0x20, 0x3b, + 0x69, 0x21, 0x5e, 0x42, 0x2e, 0x4c, 0x33, 0xff, 0x28, 0xfc, 0x13, 0x73, + 0xf2, 0x4f, 0xed, 0x95, 0x9f, 0x0a, 0xff, 0x7c, 0x83, 0xf3, 0x0f, 0xa9, + 0x1b, 0x4f, 0xe5, 0x42, 0xac, 0xdf, 0x89, 0xef, 0xc6, 0x5a, 0xe5, 0x15, + 0xcf, 0xcc, 0x11, 0xf0, 0xcd, 0xfb, 0x0b, 0xfa, 0x0d, 0xe3, 0xbf, 0x4c, + 0xfd, 0x86, 0xf3, 0x89, 0x99, 0x96, 0x4f, 0xf8, 0xf8, 0x82, 0x5f, 0xc4, + 0x3c, 0x7f, 0x2d, 0xbc, 0xa3, 0xf1, 0x07, 0x21, 0xdd, 0x94, 0x7e, 0x84, + 0x44, 0xdd, 0x38, 0x6f, 0xaa, 0x9e, 0x20, 0xac, 0x2e, 0xde, 0xb3, 0x94, + 0xf9, 0xc0, 0x06, 0x7c, 0x3d, 0xee, 0xbc, 0xce, 0x77, 0xdc, 0x33, 0xb1, + 0xf4, 0x99, 0xa8, 0x37, 0xdc, 0x79, 0xf2, 0xeb, 0x03, 0x56, 0x39, 0xe2, + 0xfd, 0x14, 0x95, 0xc4, 0x90, 0x3e, 0x6d, 0xf8, 0xa8, 0x80, 0x77, 0x06, + 0x3e, 0x92, 0x8b, 0xc2, 0xdf, 0x41, 0x3d, 0xf6, 0x10, 0x51, 0xe9, 0xbc, + 0x72, 0x9e, 0x46, 0xc7, 0x01, 0x3c, 0x3d, 0x44, 0xe1, 0xa8, 0xb7, 0xe3, + 0xcf, 0xab, 0x47, 0x09, 0xf2, 0xb3, 0x92, 0x5f, 0x9e, 0x1d, 0x83, 0xf1, + 0x88, 0x3f, 0x37, 0xad, 0x1c, 0xdc, 0x19, 0x6f, 0xae, 0x93, 0x2d, 0x7c, + 0x72, 0xa7, 0x42, 0x1a, 0x7a, 0xfc, 0x6c, 0x5d, 0x74, 0x9e, 0x49, 0x24, + 0x31, 0x0e, 0xf1, 0xf7, 0xe1, 0x22, 0x63, 0x59, 0x20, 0xf3, 0x38, 0x4e, + 0x7c, 0xb5, 0x29, 0xe1, 0x17, 0x62, 0xa0, 0x7f, 0xcd, 0xf1, 0x6a, 0xf8, + 0xbb, 0xb8, 0x7e, 0x57, 0xfa, 0xf5, 0x24, 0x87, 0xd6, 0xa3, 0x9a, 0x88, + 0x1f, 0x58, 0x4f, 0x72, 0xa4, 0xf5, 0xb4, 0x05, 0xa6, 0xf2, 0xf5, 0xa4, + 0x97, 0xeb, 0x76, 0xbe, 0x1e, 0x01, 0xff, 0xd0, 0x73, 0xb1, 0xae, 0x0c, + 0xfd, 0x9c, 0xf0, 0x67, 0x6a, 0x6f, 0x57, 0x22, 0xa1, 0x55, 0x30, 0x84, + 0x19, 0x48, 0xbf, 0x2e, 0x05, 0xd7, 0x55, 0x42, 0xc8, 0x69, 0x5c, 0x17, + 0xd2, 0xd3, 0xaf, 0x52, 0x3a, 0x29, 0x79, 0xdd, 0x94, 0x7f, 0x61, 0x7d, + 0xa7, 0x29, 0x7f, 0x38, 0xd6, 0x07, 0x7c, 0x45, 0xf9, 0xc8, 0xb9, 0x3e, + 0x59, 0xd7, 0x28, 0x5e, 0xc4, 0xfc, 0xb2, 0xf6, 0xb5, 0x3a, 0x79, 0x6e, + 0x0a, 0xce, 0x37, 0x88, 0x4e, 0xd7, 0xa9, 0x0c, 0xc1, 0x11, 0xa6, 0xe3, + 0xb8, 0x75, 0x42, 0xfb, 0xfd, 0x9c, 0xc4, 0xde, 0xc0, 0x76, 0xe0, 0xbf, + 0x7e, 0xca, 0x7f, 0xfe, 0x08, 0xc1, 0xf1, 0xd5, 0x10, 0x0c, 0x30, 0x0b, + 0xcb, 0x48, 0x83, 0x09, 0x74, 0x6d, 0xef, 0x5b, 0x40, 0x2a, 0x66, 0x50, + 0xb5, 0x45, 0xd6, 0x43, 0xa9, 0xfa, 0x63, 0xa4, 0x1e, 0xde, 0x6b, 0xff, + 0xb3, 0xbb, 0x01, 0xf9, 0x91, 0xe4, 0x55, 0xda, 0xe4, 0xe4, 0x35, 0x24, + 0xc6, 0xf8, 0xcc, 0x78, 0x13, 0x7a, 0x53, 0xd4, 0x4f, 0x20, 0xfe, 0x2b, + 0x86, 0xd3, 0xff, 0xc4, 0x3f, 0x78, 0x68, 0xbd, 0x7d, 0x7c, 0xf8, 0x3b, + 0x88, 0x4b, 0xc9, 0xc5, 0xf8, 0xc1, 0x89, 0x1f, 0xc0, 0x9b, 0xe4, 0xb2, + 0xd0, 0x53, 0xd6, 0x19, 0x3e, 0x4f, 0xfc, 0xc3, 0x34, 0x86, 0xaf, 0x0c, + 0x72, 0xbc, 0x4c, 0xfb, 0xaa, 0x0d, 0x5f, 0xf0, 0x17, 0x41, 0xb9, 0x2c, + 0xe6, 0xe3, 0x0a, 0xbc, 0xed, 0x2a, 0x61, 0xf8, 0x7a, 0xc0, 0xa8, 0x7a, + 0x52, 0x32, 0x08, 0x29, 0x2d, 0x0b, 0x87, 0x09, 0xe8, 0x89, 0xbb, 0x8d, + 0x3d, 0xd5, 0xb0, 0x52, 0x72, 0xca, 0x13, 0xcb, 0xc5, 0xf9, 0xb3, 0x2a, + 0x12, 0x2e, 0x9c, 0xaf, 0xb8, 0x85, 0xd0, 0x72, 0x2b, 0x5f, 0xd7, 0x62, + 0xf7, 0x42, 0xef, 0xab, 0x50, 0xde, 0x53, 0x5f, 0x9a, 0xbd, 0x1a, 0xe0, + 0xaa, 0x72, 0xb9, 0xd2, 0xf2, 0xd1, 0xde, 0x38, 0xc0, 0xae, 0x10, 0xd2, + 0x15, 0xd7, 0x08, 0xd5, 0xd3, 0x2f, 0x31, 0xf8, 0x33, 0xf1, 0xdb, 0xb6, + 0xb8, 0x61, 0x93, 0xcf, 0x6d, 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0xe4, + 0xc9, 0xb7, 0x45, 0xf9, 0x28, 0xef, 0x04, 0x82, 0x81, 0xf1, 0x94, 0x1b, + 0x35, 0x48, 0xef, 0x49, 0x91, 0x87, 0x79, 0x9e, 0xe2, 0xb3, 0x74, 0x3e, + 0x29, 0x09, 0x3c, 0x2c, 0xaf, 0x69, 0x6a, 0x9e, 0xf0, 0x4f, 0x5b, 0xde, + 0x3a, 0x7b, 0x86, 0xfc, 0xa0, 0x60, 0xae, 0x67, 0x46, 0x5e, 0x59, 0x28, + 0xce, 0xd9, 0x12, 0x77, 0x88, 0xe3, 0x42, 0x75, 0x79, 0x0a, 0xf7, 0x43, + 0x3a, 0x39, 0x8e, 0x6f, 0x91, 0x61, 0x03, 0xed, 0x4b, 0x8b, 0x35, 0x68, + 0xa6, 0x71, 0x23, 0xc5, 0x97, 0x87, 0x5b, 0xf7, 0xf9, 0xbb, 0x02, 0xff, + 0x90, 0xef, 0xa0, 0xbc, 0x24, 0x25, 0x8b, 0xc6, 0x6b, 0xef, 0x45, 0x3a, + 0xea, 0x08, 0x77, 0x6d, 0xbd, 0x1a, 0x1d, 0xa1, 0x79, 0xae, 0xcd, 0xff, + 0x5a, 0xdc, 0x54, 0xab, 0x9f, 0xa8, 0x7d, 0x38, 0x9b, 0xce, 0x4d, 0x31, + 0xe5, 0x77, 0x5d, 0x45, 0x3f, 0x2e, 0x57, 0x71, 0xe8, 0x35, 0x41, 0x44, + 0xfe, 0x97, 0x8a, 0x1b, 0x68, 0xf9, 0x5f, 0xf9, 0x2c, 0x9f, 0xd6, 0xab, + 0xfb, 0x1c, 0xb9, 0x4f, 0xf7, 0x11, 0x4e, 0xf8, 0xbc, 0x18, 0xf5, 0x2b, + 0xc5, 0xc7, 0x2d, 0xd1, 0xa8, 0xdb, 0x8b, 0x43, 0xf3, 0x62, 0x7f, 0x0f, + 0xdd, 0x7f, 0x2c, 0x6c, 0x73, 0xbc, 0x74, 0x34, 0x99, 0xbe, 0x27, 0x9b, + 0x40, 0x61, 0x96, 0x41, 0x3a, 0xb4, 0x79, 0x7f, 0x33, 0xde, 0xb5, 0x3a, + 0x2f, 0x2c, 0x1e, 0x8d, 0xfc, 0x26, 0xfe, 0xbf, 0x16, 0xb3, 0xa3, 0x98, + 0x3f, 0x5a, 0x0e, 0x9e, 0x3e, 0x43, 0xff, 0xdf, 0x81, 0x7b, 0x9e, 0x9f, + 0x50, 0x42, 0xf8, 0x6a, 0xe3, 0x22, 0xf1, 0x45, 0x5c, 0xd3, 0x08, 0xcf, + 0xe3, 0x06, 0xbf, 0x59, 0xcd, 0x3f, 0x7b, 0x30, 0x8f, 0xe3, 0xd1, 0xc7, + 0x39, 0xbf, 0x4b, 0xc3, 0xf7, 0xdb, 0xe2, 0xd9, 0x9f, 0x16, 0x60, 0xbf, + 0xb0, 0x7f, 0xf7, 0x57, 0xe3, 0x29, 0xbf, 0xb5, 0x45, 0xbd, 0x3f, 0x6a, + 0xd1, 0xee, 0x2d, 0xba, 0xf5, 0x71, 0x1a, 0xc4, 0xc3, 0x4b, 0x71, 0x83, + 0xa1, 0xf7, 0x15, 0xc0, 0xf7, 0x1e, 0x16, 0x55, 0x6f, 0x58, 0xb4, 0xf1, + 0xe3, 0x8c, 0xba, 0xf1, 0x75, 0x71, 0xee, 0x9f, 0x11, 0xfd, 0xfb, 0x54, + 0xf9, 0x80, 0xfd, 0x7d, 0x06, 0x35, 0x1e, 0x4c, 0x7a, 0x66, 0x30, 0x1e, + 0xac, 0xea, 0xa1, 0x32, 0x55, 0x24, 0x49, 0xa7, 0x44, 0x1c, 0xb8, 0x8c, + 0x4a, 0x32, 0x0c, 0xf2, 0xe3, 0x59, 0x2f, 0x95, 0x6a, 0xef, 0x43, 0xba, + 0x68, 0xff, 0x36, 0x49, 0x5e, 0xd6, 0xe7, 0x5a, 0xdc, 0xa8, 0x53, 0xd5, + 0xdf, 0xf2, 0xd2, 0xb5, 0x1c, 0x4f, 0x2b, 0x87, 0x6d, 0x5c, 0x5a, 0x64, + 0x07, 0xeb, 0x43, 0xcb, 0x07, 0x22, 0x8e, 0x32, 0x18, 0x0f, 0x7a, 0xe4, + 0xb0, 0xce, 0x3f, 0xff, 0x3f, 0xf0, 0x24, 0xef, 0x3e, 0x30, 0x4d, 0x00, + 0x00, 0x00, 0x00, 0x00, }; + +static const u8 usem_int_table_data_e1[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, + 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0x67, 0x71, 0xa2, 0xf2, 0xcf, 0xa3, 0xf1, + 0x79, 0xd0, 0xf8, 0x1b, 0x38, 0x50, 0xf9, 0xff, 0xd9, 0x50, 0xf9, 0x93, + 0xd0, 0xe4, 0xd1, 0xf1, 0x1a, 0x26, 0xfc, 0xf2, 0x84, 0xb0, 0x25, 0x33, + 0x03, 0x83, 0x03, 0x10, 0xbb, 0x03, 0xb1, 0x1f, 0x33, 0x7e, 0xb5, 0x65, + 0x44, 0xd8, 0xf5, 0x40, 0x12, 0x42, 0xb7, 0x02, 0xe9, 0x9d, 0x40, 0xfc, + 0x10, 0x88, 0x9b, 0x05, 0x19, 0x18, 0x9a, 0x84, 0x19, 0x18, 0xae, 0x02, + 0xe9, 0xc9, 0x82, 0x94, 0xb9, 0x17, 0x1d, 0x57, 0xf3, 0x53, 0xd7, 0xbc, + 0x51, 0x4c, 0x1a, 0x6e, 0x92, 0x43, 0xe5, 0xd7, 0x68, 0x32, 0x30, 0x2c, + 0xd7, 0x62, 0x60, 0x78, 0xa7, 0x0d, 0xe1, 0x57, 0x21, 0xc9, 0x33, 0xeb, + 0x30, 0x30, 0xd4, 0x6a, 0x42, 0xd8, 0xbb, 0x95, 0x19, 0x18, 0xda, 0x80, + 0x6a, 0x8a, 0xe4, 0xb0, 0x9b, 0xbb, 0x07, 0x28, 0xdf, 0x0e, 0x94, 0x17, + 0xd6, 0x81, 0xf0, 0x01, 0x61, 0xaa, 0x21, 0x03, 0x68, 0x03, 0x00, 0x00, + }; + +static const u8 usem_pram_data_e1[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xcd, 0x7d, + 0x0d, 0x7c, 0x14, 0xd5, 0xb5, 0xf8, 0x9d, 0xd9, 0x99, 0xdd, 0xd9, 0xcd, + 0x66, 0x33, 0x49, 0x36, 0x61, 0x03, 0x21, 0x4c, 0x42, 0x80, 0x80, 0x01, + 0x36, 0x21, 0x81, 0x80, 0x51, 0x37, 0x21, 0xd0, 0xa0, 0x51, 0xc3, 0x87, + 0x8a, 0x08, 0xba, 0x41, 0xac, 0xa8, 0xa0, 0x11, 0xa9, 0xc6, 0x96, 0x36, + 0x0b, 0x49, 0x20, 0x44, 0xd0, 0x40, 0xfd, 0x00, 0xaa, 0xb8, 0x7c, 0x88, + 0xd4, 0xa7, 0x6d, 0xb4, 0xa8, 0xbc, 0xb6, 0xea, 0x22, 0x58, 0x83, 0xa5, + 0x1a, 0x15, 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0xff, 0xbf, 0x2a, 0xf9, + 0x1f, 0xfd, 0xfe, 0xe9, 0x56, 0x67, 0xfc, 0x6c, 0x00, 0xbd, 0x0b, 0x50, + 0x88, 0xfb, 0x16, 0xff, 0x2f, 0x1d, 0xf4, 0x3d, 0x8c, 0x85, 0xcc, 0x43, + 0xe5, 0xb5, 0xcc, 0x47, 0xe5, 0x12, 0x60, 0x23, 0xe4, 0x77, 0x5f, 0xe0, + 0x6e, 0x0b, 0x9e, 0x6f, 0xd6, 0xb2, 0x36, 0x7a, 0xbe, 0xb2, 0x68, 0xd1, + 0x40, 0xac, 0xd7, 0xb3, 0xee, 0x89, 0x69, 0x30, 0xde, 0xd5, 0x1b, 0x56, + 0xff, 0x29, 0x0d, 0x40, 0x99, 0xd9, 0x72, 0xf7, 0xa4, 0xfe, 0x00, 0xf7, + 0x8c, 0x60, 0xf5, 0x9f, 0xb0, 0x2c, 0xdf, 0xae, 0x1c, 0xc6, 0xf3, 0x3c, + 0x90, 0x9f, 0xf7, 0x70, 0xfe, 0x2e, 0xa5, 0x61, 0xdd, 0x25, 0x78, 0xae, + 0xf1, 0xf0, 0xf8, 0x75, 0x03, 0xe0, 0xf9, 0x74, 0x11, 0xa7, 0x00, 0xbe, + 0xf3, 0xaa, 0x68, 0x47, 0xb3, 0x3d, 0x5d, 0x01, 0xa0, 0xdf, 0xc1, 0xbb, + 0xf3, 0x29, 0x0e, 0x7c, 0x44, 0xd0, 0xe1, 0xb1, 0x4c, 0xef, 0x11, 0x7c, + 0xbf, 0x6a, 0x0d, 0xe7, 0x33, 0x79, 0x1f, 0xba, 0x47, 0x7e, 0x8a, 0x96, + 0xbf, 0x33, 0x00, 0xcf, 0xbc, 0xcc, 0xdd, 0xf4, 0x5d, 0xc6, 0xfa, 0xbd, + 0xd6, 0x44, 0xe4, 0xc3, 0x5a, 0xdc, 0x61, 0xaa, 0x7a, 0x3f, 0x51, 0xda, + 0x6b, 0xee, 0x27, 0x2c, 0x07, 0x3f, 0x01, 0xfb, 0xe1, 0xf7, 0xe6, 0xe8, + 0xbb, 0x8d, 0x6f, 0x47, 0xd1, 0x7d, 0xf3, 0xa3, 0x0a, 0x10, 0xa2, 0xa0, + 0xb7, 0x7c, 0x48, 0xbf, 0xf3, 0x66, 0x95, 0xc7, 0xd5, 0xbe, 0x34, 0xc1, + 0x92, 0x54, 0xdc, 0x47, 0x6f, 0x26, 0xbc, 0x2c, 0xb5, 0x05, 0x87, 0x21, + 0x5e, 0xc0, 0x4e, 0x2b, 0x43, 0x50, 0x2f, 0xbe, 0xdf, 0x76, 0xfb, 0x70, + 0x8c, 0xe7, 0x95, 0x04, 0x07, 0xa2, 0xff, 0xaa, 0x3d, 0x68, 0xf5, 0x34, + 0xbb, 0x0c, 0x7a, 0x9f, 0xbe, 0x77, 0x24, 0xe3, 0x74, 0x3f, 0xd6, 0x78, + 0xdc, 0x2c, 0x12, 0xde, 0x48, 0x38, 0xac, 0x16, 0x16, 0xc0, 0xfb, 0x3d, + 0x4a, 0xd1, 0x73, 0x5f, 0xa1, 0x9f, 0x01, 0x7a, 0x82, 0xeb, 0x87, 0x03, + 0x1c, 0xfe, 0x9b, 0x55, 0x7f, 0xda, 0x28, 0x95, 0xfb, 0x2f, 0x14, 0xff, + 0x4b, 0xf7, 0x51, 0xbc, 0x80, 0xa5, 0xda, 0x3c, 0xfc, 0xfb, 0x8c, 0xc6, + 0xf9, 0xd7, 0x8a, 0x79, 0x3b, 0xfe, 0xcd, 0xe3, 0xcf, 0xf2, 0xbe, 0x55, + 0x24, 0x1c, 0x8a, 0x83, 0xcf, 0xd7, 0x0b, 0x9e, 0x68, 0x0e, 0x8f, 0xb4, + 0x3f, 0xbd, 0xe1, 0xe1, 0x74, 0x90, 0xf0, 0x5c, 0x3a, 0xc4, 0xc5, 0xe3, + 0x87, 0x03, 0xbd, 0xb4, 0xee, 0xd5, 0xa6, 0xd5, 0xe9, 0x8d, 0x68, 0xcf, + 0xc6, 0x46, 0x15, 0xe0, 0x91, 0xce, 0x34, 0xb3, 0x3f, 0x1f, 0xf1, 0xf7, + 0x6a, 0x14, 0x8f, 0x8f, 0xc9, 0x78, 0x98, 0xdc, 0xe7, 0xb2, 0xd3, 0xcd, + 0xe9, 0xfc, 0x3c, 0x29, 0x64, 0xf8, 0xae, 0x0f, 0x8b, 0x88, 0x2b, 0xf9, + 0x6c, 0x0e, 0x0d, 0xe9, 0x31, 0x5d, 0xca, 0x4f, 0x91, 0x66, 0x90, 0x9f, + 0x9e, 0xb8, 0x53, 0xb1, 0x31, 0xee, 0x34, 0x83, 0x79, 0xc8, 0x2e, 0xe4, + 0xb3, 0xb7, 0x24, 0x9e, 0x28, 0xde, 0xf4, 0xff, 0xa3, 0x83, 0x43, 0x18, + 0xc0, 0x61, 0x00, 0x00, }; static const u8 xsem_int_table_data_e1[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x29, - 0xc8, 0xc0, 0xf0, 0xa3, 0x1e, 0x81, 0x2f, 0xf2, 0xa0, 0xf2, 0xd1, 0xf1, - 0x7e, 0x6e, 0xfc, 0xf2, 0xa4, 0x62, 0x19, 0x06, 0x04, 0xfb, 0x0b, 0x17, - 0x03, 0xc3, 0x4d, 0x0e, 0x06, 0x86, 0x5b, 0x40, 0xec, 0xc2, 0xc9, 0xc0, - 0xe0, 0x0a, 0xc4, 0x4b, 0x80, 0xf8, 0x2e, 0x10, 0xdf, 0x03, 0x62, 0x19, - 0x20, 0x96, 0x05, 0xe2, 0xaf, 0x40, 0xf9, 0x37, 0x5c, 0x10, 0x3d, 0x4a, - 0xec, 0x0c, 0x0c, 0x9a, 0x40, 0x6c, 0x00, 0xc4, 0xe6, 0xec, 0xf8, 0xed, - 0xe2, 0x63, 0xc1, 0x14, 0xcb, 0x96, 0x65, 0x60, 0xf8, 0xae, 0x88, 0xe0, - 0x3b, 0x2b, 0x31, 0x30, 0xd8, 0xab, 0x50, 0xd7, 0x8f, 0xa3, 0x78, 0xf0, - 0x62, 0x27, 0x33, 0x54, 0x7e, 0x8c, 0x3e, 0x2a, 0x3f, 0xc5, 0x90, 0x81, - 0xe1, 0x30, 0x92, 0x9a, 0x58, 0x7d, 0xd2, 0xcc, 0xff, 0x06, 0xd4, 0xfb, - 0x1d, 0x88, 0x01, 0xfc, 0x12, 0x15, 0xbc, 0x68, 0x03, 0x00, 0x00, 0x00 -}; + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xcb, 0xe2, + 0x67, 0x60, 0xf8, 0x51, 0x8f, 0xc0, 0xb3, 0xb9, 0x50, 0xf9, 0xe8, 0xd8, + 0x9b, 0x13, 0x95, 0xef, 0xc4, 0x8d, 0x5f, 0x3d, 0x21, 0x2c, 0xc3, 0x80, + 0x60, 0x37, 0x72, 0x30, 0x30, 0xb4, 0x33, 0x43, 0xb0, 0x2b, 0x14, 0x7f, + 0x61, 0x62, 0x60, 0xb8, 0x0f, 0xc5, 0x2b, 0x98, 0x21, 0x78, 0x17, 0x0b, + 0x42, 0x0f, 0x07, 0x3b, 0x03, 0x03, 0x3f, 0x10, 0x8b, 0x01, 0xb1, 0x2c, + 0x3b, 0x7e, 0xbb, 0xe4, 0x59, 0x31, 0xc5, 0x44, 0xe4, 0x18, 0x18, 0xb6, + 0x28, 0x22, 0xf8, 0x3e, 0x92, 0x0c, 0x0c, 0x1d, 0x40, 0xfc, 0x50, 0x92, + 0x32, 0x7f, 0x8d, 0xe2, 0xa1, 0x81, 0xef, 0x19, 0xa1, 0xf2, 0x9d, 0x75, + 0x50, 0xf9, 0x2e, 0x7a, 0x0c, 0x0c, 0xe9, 0xc6, 0x48, 0x7c, 0x1d, 0xd2, + 0xcc, 0xbf, 0x02, 0xd4, 0x7b, 0x15, 0x88, 0x01, 0x1f, 0xd8, 0x89, 0x19, + 0x68, 0x03, 0x00, 0x00, }; static const u8 xsem_pram_data_e1[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xed, 0x7d, - 0x7b, 0x7c, 0x54, 0xd5, 0xb9, 0xe8, 0xda, 0x33, 0x7b, 0xcf, 0xfb, 0xb1, - 0x93, 0x0c, 0x61, 0x02, 0x21, 0xec, 0x84, 0x00, 0x01, 0x03, 0x6e, 0x42, - 0x08, 0xc1, 0xc6, 0x76, 0x08, 0x8f, 0xd2, 0x4a, 0xed, 0x88, 0x56, 0xd1, - 0x7a, 0x74, 0x08, 0x10, 0x40, 0x5e, 0xc1, 0x67, 0x5a, 0xe1, 0x64, 0x87, - 0x3c, 0x08, 0x10, 0x24, 0x20, 0xd6, 0xd4, 0xa2, 0x0c, 0x2f, 0xc5, 0x07, - 0x35, 0x5a, 0x50, 0x7b, 0x4a, 0xdb, 0x01, 0xa9, 0xc5, 0x5e, 0xdb, 0xa6, - 0xbd, 0xb6, 0xd2, 0x56, 0x3d, 0x28, 0x18, 0x51, 0x91, 0x46, 0xaa, 0x32, - 0x3d, 0xb7, 0x1e, 0xce, 0xfa, 0xbe, 0xb5, 0x76, 0x66, 0xef, 0x9d, 0x99, - 0x80, 0xb7, 0xbd, 0xa7, 0x7f, 0xdc, 0x13, 0x7f, 0xed, 0x62, 0xed, 0xf5, - 0xfe, 0xd6, 0xf7, 0x5e, 0xdf, 0x5a, 0xe3, 0x10, 0x46, 0x11, 0x71, 0x38, - 0x21, 0x17, 0xe0, 0xef, 0x4b, 0x84, 0x2c, 0xb0, 0x11, 0x42, 0x26, 0xa5, - 0x52, 0x42, 0x44, 0xe5, 0x84, 0x0b, 0x52, 0xa2, 0x5d, 0x18, 0x61, 0xca, - 0x93, 0x0b, 0xf6, 0x4b, 0xc9, 0xff, 0x6d, 0xb4, 0x39, 0xaf, 0x11, 0x32, - 0x08, 0xd2, 0x6f, 0x13, 0x92, 0x4b, 0xc8, 0x5d, 0xbc, 0x8c, 0xfe, 0x45, - 0x20, 0x3f, 0x9d, 0x67, 0xf4, 0xf9, 0xe8, 0x29, 0x51, 0x1d, 0x24, 0x51, - 0x92, 0xea, 0x67, 0x3a, 0x61, 0x79, 0xc5, 0x26, 0x90, 0x0b, 0x02, 0x7c, - 0x35, 0x97, 0xeb, 0xe3, 0xd4, 0xbb, 0x02, 0xe3, 0x49, 0x90, 0x90, 0xf3, - 0x6e, 0x96, 0x6a, 0xd5, 0xb4, 0xa8, 0x9c, 0xa6, 0x6f, 0xba, 0xe3, 0x4d, - 0x85, 0x84, 0x9c, 0x23, 0xb1, 0x11, 0x6c, 0x9d, 0x75, 0x97, 0x47, 0xc7, - 0x61, 0x3a, 0x19, 0xd2, 0x26, 0x81, 0xcc, 0xed, 0xf2, 0xa5, 0x99, 0x07, - 0x59, 0x8b, 0x70, 0x69, 0x6a, 0x98, 0x3b, 0xf1, 0xd4, 0xc8, 0xd4, 0x77, - 0xbb, 0xa8, 0x26, 0xa0, 0x5f, 0xfa, 0x3f, 0x75, 0xaf, 0xd2, 0xbf, 0xdd, - 0x44, 0x3a, 0x3f, 0x1c, 0xc7, 0x47, 0x44, 0x58, 0x27, 0x2e, 0x9b, 0xd6, - 0x1b, 0x6f, 0x8b, 0x4d, 0x84, 0x79, 0x3a, 0x49, 0x34, 0x62, 0x2f, 0x64, - 0x60, 0x88, 0xfa, 0x09, 0xa9, 0x84, 0x42, 0x5a, 0xff, 0xb0, 0xbf, 0xe2, - 0x78, 0x2c, 0x44, 0xe7, 0x59, 0xee, 0x50, 0x9d, 0xf4, 0xd3, 0xed, 0xfe, - 0xbb, 0x09, 0x29, 0x22, 0xa4, 0x7d, 0xc2, 0xef, 0xc3, 0xb1, 0x52, 0xda, - 0x4e, 0xac, 0x23, 0x32, 0x9d, 0xa7, 0xd3, 0x47, 0x22, 0x5d, 0xa5, 0xfd, - 0xc7, 0x9d, 0x41, 0x6c, 0x7c, 0x1f, 0xd7, 0x10, 0x52, 0x91, 0x82, 0xb7, - 0xb5, 0x5e, 0x6a, 0x7d, 0x66, 0x38, 0x9e, 0x25, 0x0c, 0x0f, 0x36, 0x36, - 0xa8, 0x13, 0x45, 0x89, 0x90, 0x4d, 0x92, 0xb2, 0xb9, 0x8a, 0xce, 0x47, - 0xfb, 0xa5, 0x5d, 0xdd, 0x8b, 0xb5, 0xba, 0xe7, 0x92, 0x10, 0xcc, 0x27, - 0xd7, 0xb6, 0x81, 0xee, 0x43, 0x5b, 0xc3, 0xe2, 0x2b, 0x8b, 0x29, 0x5c, - 0x5a, 0x1a, 0x4a, 0x26, 0x8a, 0x34, 0x6d, 0x93, 0x12, 0xe1, 0xf9, 0x50, - 0xff, 0x65, 0x09, 0xe1, 0x72, 0x78, 0xc2, 0xa8, 0xe0, 0x09, 0x03, 0x5c, - 0x27, 0xf3, 0xf9, 0x6d, 0x1c, 0xe7, 0x99, 0x1b, 0x4f, 0x33, 0xff, 0xc9, - 0x24, 0x80, 0xe5, 0xed, 0x6e, 0xbe, 0x6f, 0x6f, 0x08, 0xf1, 0xbd, 0x08, - 0x27, 0xd6, 0xaf, 0x4f, 0x95, 0xcb, 0x36, 0xd0, 0x7e, 0xcf, 0x17, 0xb6, - 0x39, 0xe9, 0xce, 0x90, 0xe9, 0xe3, 0xca, 0x09, 0xf4, 0x6f, 0x0f, 0x69, - 0x11, 0x0a, 0x6b, 0x22, 0xaa, 0x74, 0x9f, 0xf4, 0xf5, 0x20, 0xf8, 0xa3, - 0xb4, 0x90, 0xa6, 0x61, 0x9a, 0x09, 0x21, 0xdc, 0xe2, 0x11, 0xda, 0x9f, - 0xf7, 0xaf, 0x76, 0x35, 0x01, 0xfb, 0xe7, 0xf7, 0xe1, 0x3c, 0x09, 0x59, - 0x65, 0x82, 0x17, 0xdd, 0x17, 0x5f, 0x1e, 0xcd, 0x7b, 0xf4, 0xec, 0x9e, - 0x3c, 0x2c, 0x97, 0x64, 0xb6, 0x8f, 0x9e, 0xd7, 0x17, 0xcd, 0x86, 0xa9, - 0x92, 0x12, 0x06, 0x3f, 0x99, 0xfe, 0x77, 0x81, 0xee, 0x93, 0x53, 0x31, - 0xc0, 0x93, 0xfe, 0x4f, 0x32, 0xc2, 0xb7, 0x10, 0xa6, 0x62, 0xce, 0x7b, - 0x3f, 0xfb, 0x41, 0x14, 0xd6, 0xd9, 0xae, 0xde, 0xee, 0x69, 0x04, 0xbc, - 0xb6, 0xdf, 0x1c, 0x8c, 0xf9, 0x20, 0xff, 0xac, 0x1c, 0x4b, 0x83, 0x8f, - 0x7a, 0xea, 0x8d, 0x55, 0x4c, 0x9c, 0x9e, 0x43, 0xf1, 0xfd, 0xf5, 0xf7, - 0xaa, 0x8e, 0xba, 0x52, 0xe3, 0xfd, 0x2b, 0xf1, 0x87, 0x7a, 0x2e, 0x23, - 0x00, 0xc8, 0xc9, 0x48, 0x17, 0xbc, 0xbf, 0x4c, 0xfd, 0x9c, 0x6f, 0x38, - 0x5d, 0x75, 0x74, 0x24, 0xae, 0xcf, 0x66, 0xa4, 0xcf, 0x4c, 0xf5, 0x37, - 0x34, 0xd0, 0x9d, 0x18, 0x9d, 0xca, 0x6f, 0x2c, 0x64, 0x74, 0x03, 0xfb, - 0x73, 0x8d, 0x3f, 0xf5, 0xfd, 0x87, 0x44, 0x60, 0x78, 0xa8, 0x4d, 0x45, - 0xba, 0x17, 0x39, 0xfe, 0x6f, 0xbc, 0x92, 0xf4, 0xda, 0xe9, 0x7a, 0xd7, - 0x4d, 0x70, 0x28, 0x6b, 0xe9, 0xfa, 0xc5, 0x7c, 0x47, 0x42, 0x08, 0xb0, - 0x31, 0x7b, 0x01, 0xbe, 0xf0, 0x0f, 0xf8, 0xae, 0xb6, 0x76, 0x0b, 0xe3, - 0x21, 0x73, 0x97, 0x89, 0x6f, 0xb4, 0x5c, 0x76, 0xb5, 0x9a, 0x48, 0x43, - 0x6f, 0x7a, 0x2a, 0x86, 0x28, 0x7c, 0x0d, 0xf0, 0xb8, 0xd8, 0xfa, 0xad, - 0xf0, 0x7b, 0x34, 0x03, 0xfc, 0x48, 0x34, 0x8c, 0xf0, 0xb1, 0xbb, 0xd8, - 0x3a, 0x32, 0xc2, 0x31, 0x38, 0x27, 0x48, 0x4a, 0xa1, 0x37, 0x95, 0x20, - 0x5f, 0x99, 0x54, 0xa1, 0x24, 0x0c, 0xf0, 0x6c, 0xe1, 0xf0, 0xcb, 0x13, - 0x62, 0x07, 0x00, 0x3e, 0x7d, 0xfc, 0xc4, 0x57, 0x47, 0x80, 0xbe, 0x9b, - 0xa4, 0xe8, 0xdc, 0x79, 0x80, 0xf7, 0x13, 0x1c, 0x48, 0x6f, 0xd6, 0x71, - 0xce, 0x02, 0xfd, 0x0c, 0x42, 0xb8, 0x23, 0x3e, 0x6b, 0x59, 0x24, 0xbe, - 0x17, 0xf9, 0xa1, 0x4b, 0x04, 0xfc, 0x74, 0xe8, 0xf8, 0x7a, 0x26, 0x16, - 0xbe, 0x06, 0xf9, 0x1b, 0x89, 0xba, 0x72, 0x39, 0x5c, 0x01, 0x1f, 0x4b, - 0x5f, 0xfa, 0x2b, 0xc0, 0x55, 0x2c, 0x21, 0x09, 0xef, 0x78, 0xfc, 0xde, - 0x2c, 0x96, 0x51, 0xbc, 0x2d, 0x21, 0x9a, 0xf7, 0x72, 0xda, 0x5e, 0x24, - 0x22, 0xe4, 0x4f, 0xc2, 0x26, 0x0c, 0xc2, 0xf2, 0xe9, 0x8e, 0x6c, 0xa0, - 0xf7, 0x99, 0x2a, 0xcc, 0x6f, 0xa3, 0xc4, 0xf7, 0x5b, 0x9e, 0x67, 0xda, - 0xef, 0x93, 0x7c, 0xbf, 0x53, 0xe5, 0xb1, 0xf0, 0x37, 0x4c, 0xe5, 0x12, - 0x9b, 0xb7, 0x9f, 0x96, 0x03, 0x7c, 0xe4, 0xf9, 0x38, 0xbf, 0x7e, 0xed, - 0xb3, 0xd2, 0xf3, 0xe1, 0x3f, 0x72, 0xbe, 0x71, 0x92, 0xd2, 0x19, 0xc3, - 0xab, 0xf9, 0x61, 0xe0, 0x9b, 0x2d, 0x25, 0x37, 0x77, 0xd7, 0xd0, 0xfd, - 0x10, 0x27, 0xce, 0x4c, 0x22, 0x18, 0x64, 0x82, 0x70, 0xd0, 0xf9, 0xad, - 0xde, 0x5e, 0x0a, 0x31, 0xf8, 0x52, 0xfe, 0x7b, 0x12, 0xda, 0x8b, 0x72, - 0x94, 0xe0, 0xbe, 0x72, 0xfe, 0x6b, 0x95, 0x4f, 0x19, 0xf9, 0xa5, 0x45, - 0x2e, 0x49, 0x61, 0x33, 0xbd, 0x13, 0xd9, 0x80, 0x7f, 0x45, 0xf0, 0xff, - 0xf9, 0x72, 0x8f, 0x37, 0x55, 0x3f, 0x25, 0x0f, 0x79, 0xba, 0x3d, 0xdf, - 0x76, 0x29, 0x7c, 0xba, 0xc9, 0x42, 0x77, 0xb4, 0xab, 0x48, 0x3a, 0x38, - 0x0d, 0x16, 0x74, 0xba, 0x0b, 0x21, 0x1c, 0x74, 0xba, 0x23, 0x5c, 0xde, - 0xea, 0x78, 0x40, 0xb6, 0x31, 0x7a, 0x0f, 0xf0, 0x71, 0x1d, 0x30, 0x1f, - 0x2a, 0xef, 0xdd, 0x24, 0x8e, 0x9d, 0x7b, 0x49, 0x02, 0xf3, 0x7e, 0x52, - 0x87, 0xf9, 0x4f, 0x2a, 0xcb, 0x12, 0x82, 0x02, 0xf2, 0xe7, 0x44, 0x1b, - 0xf0, 0x2b, 0x67, 0xa5, 0x8d, 0x68, 0x85, 0xfd, 0xc7, 0xdf, 0xdc, 0xe0, - 0x22, 0x09, 0x67, 0xe6, 0x75, 0x6c, 0xbe, 0x32, 0x3d, 0xdf, 0x77, 0x02, - 0x13, 0x18, 0x94, 0xa2, 0x03, 0x42, 0x6e, 0x96, 0x81, 0x0e, 0x05, 0x2d, - 0x46, 0x2e, 0x00, 0x3d, 0x92, 0x0e, 0x2e, 0xd7, 0xd4, 0x70, 0x74, 0x5c, - 0x3a, 0xf8, 0xd4, 0x93, 0x93, 0x94, 0xfe, 0x9c, 0x47, 0xbe, 0x42, 0x14, - 0x5a, 0x2e, 0xfa, 0xd4, 0x48, 0x04, 0xe4, 0x25, 0x20, 0xc5, 0x14, 0xd8, - 0x86, 0x72, 0x96, 0x8a, 0xaa, 0x09, 0xef, 0xfa, 0xf6, 0x95, 0x34, 0x62, - 0xff, 0xce, 0x50, 0x04, 0xe5, 0x2d, 0xc5, 0x93, 0x31, 0x02, 0xec, 0x8f, - 0xcb, 0x8c, 0x4f, 0x8e, 0x30, 0xc7, 0x9b, 0x7c, 0x4a, 0x7c, 0x79, 0x99, - 0xe7, 0xd3, 0xb7, 0xbf, 0xbc, 0x5e, 0x46, 0x7c, 0xea, 0xc3, 0x07, 0x7d, - 0x7d, 0x9a, 0x83, 0xe1, 0xa3, 0x9e, 0xaf, 0xe3, 0xf8, 0x69, 0xc1, 0x1b, - 0x48, 0x73, 0x8d, 0xfb, 0x7b, 0x47, 0x5a, 0xfc, 0x15, 0x2f, 0x9f, 0x79, - 0x7c, 0xd7, 0x00, 0x78, 0x25, 0x46, 0x2c, 0xf8, 0xdb, 0xd7, 0x3f, 0xc3, - 0x97, 0x30, 0x47, 0x97, 0x82, 0x50, 0xef, 0x61, 0x00, 0xe5, 0x46, 0xc2, - 0xe0, 0xb9, 0x39, 0x7c, 0xbc, 0x73, 0x1e, 0x1d, 0xb7, 0xb3, 0x6a, 0xeb, - 0x4b, 0x80, 0x17, 0x92, 0x4d, 0x6b, 0x75, 0x1a, 0xf0, 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0x6b, 0x94, + 0xde, 0x93, 0xc1, 0x6c, 0xfa, 0xe3, 0xd4, 0x7b, 0x32, 0xf1, 0x3d, 0x53, + 0x98, 0x41, 0xef, 0xc7, 0x94, 0x2b, 0xd7, 0x10, 0x5c, 0x64, 0x77, 0x73, + 0xff, 0x7d, 0xd3, 0x7e, 0xfd, 0x3d, 0x70, 0x75, 0x05, 0xbf, 0xff, 0xac, + 0xd6, 0xfc, 0xa4, 0xdb, 0x99, 0x29, 0x7f, 0x5d, 0xbf, 0xe2, 0x79, 0xae, + 0xcb, 0x3d, 0x69, 0x95, 0xf8, 0xfb, 0xed, 0x0e, 0xfe, 0x0e, 0x3f, 0x39, + 0x82, 0xf8, 0xe3, 0x26, 0xf5, 0x55, 0x1f, 0xdf, 0x23, 0xfc, 0x81, 0xb8, + 0xe2, 0xf1, 0x12, 0x75, 0x75, 0xc5, 0xd2, 0x84, 0xff, 0x75, 0x7f, 0xeb, + 0x7c, 0x75, 0xbf, 0xea, 0xfe, 0x83, 0x7b, 0xcf, 0x9c, 0xb6, 0xbb, 0x98, + 0xdf, 0x16, 0xfd, 0x10, 0x98, 0xbf, 0x6e, 0x67, 0xfe, 0xfa, 0x7c, 0x68, + 0x1f, 0x86, 0x17, 0xe4, 0x1b, 0xd4, 0x71, 0xbf, 0xeb, 0xef, 0xcf, 0x5f, + 0xd3, 0xeb, 0x88, 0x3f, 0x15, 0xc7, 0x25, 0x37, 0xd6, 0x13, 0xac, 0x23, + 0xa9, 0xf3, 0x71, 0xbc, 0x22, 0xf6, 0xb1, 0x7c, 0xc6, 0xfa, 0xd2, 0x46, + 0xf6, 0x6d, 0x70, 0xb7, 0x0a, 0xfc, 0x9d, 0x2f, 0x24, 0xfc, 0x95, 0xf5, + 0xe5, 0x9f, 0xc8, 0xae, 0xcb, 0xa9, 0xd9, 0x12, 0x0e, 0xb1, 0x89, 0xec, + 0x7d, 0x05, 0x08, 0xbf, 0x22, 0xbf, 0xee, 0x8e, 0xc2, 0x30, 0xdd, 0x1b, + 0x96, 0xcf, 0x71, 0x76, 0x19, 0xe9, 0xfb, 0x7d, 0xc0, 0xf1, 0x8e, 0xf6, + 0x7e, 0xda, 0xdd, 0xb1, 0x90, 0x7f, 0x37, 0x08, 0xfc, 0xfc, 0xf7, 0x0d, + 0xe1, 0x41, 0xee, 0x97, 0x10, 0xfb, 0x1e, 0xca, 0x09, 0x13, 0x5e, 0x24, + 0x7c, 0x4b, 0x78, 0xb8, 0x9b, 0xce, 0xe1, 0xbe, 0x50, 0x28, 0x2d, 0x7c, + 0x1c, 0xd7, 0xbb, 0xc3, 0x62, 0xa8, 0xd4, 0xce, 0xbe, 0x33, 0xdc, 0x4b, + 0xb9, 0xca, 0xf4, 0x6c, 0x06, 0xf6, 0x7d, 0x8a, 0x4f, 0xab, 0x93, 0xf1, + 0xc9, 0xee, 0xe6, 0xe7, 0xe3, 0x77, 0x4b, 0x8c, 0x8f, 0xdf, 0xde, 0xbe, + 0x81, 0xf2, 0xde, 0x7f, 0x89, 0xd7, 0xbd, 0x9f, 0x54, 0x64, 0x70, 0xdc, + 0x65, 0x8c, 0x2d, 0x25, 0xfc, 0xfa, 0xf0, 0xfd, 0x36, 0xa0, 0x78, 0xd3, + 0xfd, 0xcb, 0x9e, 0xe6, 0x9d, 0x09, 0xff, 0x1a, 0x34, 0xff, 0xe6, 0xbb, + 0xb9, 0x7f, 0xf3, 0xad, 0x62, 0x34, 0x85, 0xfc, 0xb4, 0x63, 0x8d, 0x9a, + 0xec, 0xa7, 0x77, 0xb0, 0xbd, 0x52, 0x9e, 0xfc, 0x02, 0x71, 0xb6, 0x99, + 0xe4, 0xab, 0x96, 0x58, 0xdd, 0xeb, 0xaf, 0x56, 0xf3, 0xe8, 0x77, 0xc3, + 0xfe, 0xea, 0x6c, 0x91, 0xf0, 0xcf, 0x0b, 0x5f, 0x7d, 0xef, 0xc3, 0xfb, + 0x48, 0xbe, 0xb7, 0x4c, 0x0c, 0x37, 0xf6, 0x7b, 0xb8, 0xbc, 0xfd, 0xbf, + 0x2c, 0x61, 0xf8, 0x68, 0x4c, 0x0c, 0x3f, 0xba, 0x9d, 0xce, 0x6f, 0xb2, + 0x2a, 0x84, 0x87, 0x8f, 0x08, 0xfe, 0xa7, 0xc8, 0x7f, 0x86, 0xdc, 0x8a, + 0x15, 0x41, 0xec, 0x83, 0x8f, 0x89, 0x7d, 0x66, 0x0a, 0x86, 0x7e, 0x9b, + 0xc8, 0xf4, 0xee, 0xdf, 0x69, 0x65, 0x79, 0xd6, 0xef, 0xe2, 0x76, 0xe8, + 0x3f, 0xb8, 0x28, 0x1c, 0x72, 0x25, 0xf9, 0x6b, 0xa7, 0xc8, 0xed, 0x6d, + 0x8c, 0xa7, 0xd3, 0xef, 0xa8, 0xcb, 0xe7, 0x68, 0x78, 0x1d, 0xe7, 0xa4, + 0x3f, 0xfa, 0x45, 0xbb, 0xbf, 0xe3, 0xf7, 0xa4, 0xdf, 0x2d, 0x2e, 0x69, + 0xb8, 0xe0, 0x92, 0x66, 0xff, 0xa9, 0x75, 0xc0, 0xf5, 0xa4, 0xf3, 0x7f, + 0x69, 0xbd, 0x35, 0xcb, 0x1f, 0x65, 0x79, 0xad, 0x7d, 0xef, 0xcf, 0x50, + 0xf3, 0x08, 0xe7, 0x4c, 0xb7, 0xef, 0xe1, 0x2e, 0x4f, 0xef, 0x3c, 0xf2, + 0xbb, 0x4d, 0x94, 0x09, 0x67, 0xcf, 0xe4, 0x97, 0xb4, 0xcd, 0xd2, 0x13, + 0xc7, 0x93, 0xfc, 0x41, 0x6d, 0x8b, 0xf4, 0x4c, 0xeb, 0x5e, 0xce, 0xfc, + 0xaf, 0xfb, 0xe7, 0x88, 0xde, 0x7f, 0x30, 0xde, 0xc8, 0x0f, 0xd3, 0xfd, + 0x05, 0xb3, 0xb9, 0xff, 0xf5, 0x7b, 0xf7, 0x9c, 0xd0, 0xf8, 0xa3, 0xec, + 0x47, 0x11, 0x88, 0x95, 0x53, 0x5e, 0x60, 0x3e, 0x95, 0xd1, 0x3d, 0x6d, + 0x8c, 0xea, 0xd1, 0x92, 0x44, 0x7c, 0x0a, 0x2a, 0xe6, 0xa0, 0x23, 0x11, + 0x8f, 0x7a, 0x5d, 0x9a, 0x9e, 0x97, 0x42, 0x07, 0xd6, 0xa9, 0xf4, 0x9b, + 0xe5, 0x65, 0x84, 0xf5, 0xd9, 0x2b, 0x62, 0x54, 0xcf, 0xcb, 0xf3, 0x64, + 0x1f, 0xf8, 0x95, 0xe2, 0xa4, 0x79, 0x77, 0xdb, 0x99, 0x3c, 0x1a, 0xff, + 0x8a, 0xbc, 0xfc, 0x84, 0xf2, 0xf2, 0x6a, 0xb6, 0xff, 0x8f, 0x34, 0x66, + 0x6a, 0x75, 0x20, 0xdf, 0x10, 0x2e, 0x27, 0xfa, 0x63, 0x22, 0xec, 0xd0, + 0x7e, 0xdf, 0x13, 0xc8, 0xce, 0x1f, 0x6a, 0xf6, 0x6b, 0xc0, 0x3a, 0x33, + 0x0b, 0xf3, 0x41, 0xaa, 0xd4, 0xde, 0xb7, 0xf6, 0x4e, 0xab, 0x37, 0x9a, + 0xbd, 0xeb, 0xb5, 0xfd, 0x1f, 0x7e, 0x86, 0x79, 0xb3, 0x24, 0xe1, 0xaf, + 0x06, 0xed, 0x5e, 0x52, 0xbf, 0x37, 0x65, 0x9c, 0xea, 0x56, 0xfd, 0x5e, + 0x13, 0xcf, 0x87, 0x8e, 0x2a, 0x75, 0x1a, 0x1d, 0x56, 0x77, 0x75, 0x3a, + 0xe0, 0xbc, 0x9c, 0x45, 0xfa, 0xe8, 0xe7, 0x1a, 0x76, 0xfe, 0x5f, 0x16, + 0xe1, 0xda, 0x19, 0xcf, 0xc7, 0x66, 0x67, 0x5c, 0x48, 0xd3, 0xea, 0x1e, + 0xea, 0xfb, 0xb2, 0xe4, 0x33, 0x57, 0x52, 0x7d, 0x87, 0x89, 0x45, 0x64, + 0x9f, 0x37, 0xbf, 0x34, 0xb0, 0xdf, 0x03, 0xc6, 0xd1, 0xde, 0x4e, 0x8a, + 0x93, 0x27, 0x73, 0xf8, 0xbd, 0x29, 0x83, 0xd3, 0x90, 0x2b, 0x39, 0x7e, + 0xcf, 0x37, 0xfb, 0xec, 0x74, 0xee, 0x4d, 0xcf, 0x1f, 0x4a, 0xe9, 0xf7, + 0x0b, 0xf8, 0x62, 0x74, 0x36, 0xc9, 0x71, 0x2c, 0xcb, 0xe7, 0xa8, 0x44, + 0xfd, 0xf7, 0xcd, 0x9d, 0x64, 0xbf, 0x6b, 0x8c, 0xe5, 0xc5, 0x4d, 0x44, + 0x77, 0xac, 0xf6, 0x62, 0x21, 0xc9, 0xd5, 0xd0, 0xf1, 0x3a, 0xab, 0xcb, + 0x0d, 0x7a, 0x5d, 0xfe, 0x0b, 0x76, 0x9a, 0x6e, 0x1f, 0xdd, 0x6e, 0x09, + 0x7d, 0x27, 0xb3, 0x08, 0xb7, 0xfe, 0xad, 0xec, 0xf5, 0xff, 0xec, 0xd3, + 0x34, 0x18, 0x60, 0x21, 0x00, 0x00, 0x00, 0x00, }; #ifdef __KERNEL__ void bnx2x_init_e1_firmware(struct bnx2x *bp) @@ -13278,3 +12956,4 @@ void bnx2x_init_e1_firmware(struct bnx2x *bp) } #endif +// Total size: 39292 regs diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.c index 6ab9e8a..f5fc8a3 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.c +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e1h.c @@ -1,27 +1,22 @@ -/* init_ops array contains the list of operations needed to initialize the chip. - * - * For each block in the chip there are three init stages: - * common - HW used by both ports, - * port1 and port2 - initialization for a specific Ethernet port. - * When a port is opened or closed, the management CPU tells the driver - * whether to init/disable common HW in addition to the port HW. - * This way the first port going up will first initializes the common HW, - * and the last port going down also resets the common HW - * - * For each init stage/block there is a list of actions needed in a format: - * {operation, register, data} - * where: - * OP_WR - write a value to the chip. - * OP_RD - read a register (usually a clear on read register). - * OP_SW - string write, write a section of consecutive addresses to the chip. - * OP_SI - copy a string using indirect writes. - * OP_ZR - clear a range of memory. - * OP_ZP - unzip and copy using DMAE. - * OP_WB - string copy using DMAE. - * - * The #defines mark the stages. - * - */ +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +* +* This file contains an array of operations needed to initialize the chip: +* OP_WR - write a single register. +* OP_RD - read a single register. +* OP_SW - write an array to consecutive registers. +* OP_WB - write an array using DMAE. +* OP_ZR - clear consecutive registers. +* OP_WB_ZR - clear consecutive registers using DMAE. +* OP_ZP - unzip and write an array using DMAE. +* OP_WR_64 - write a 64-bit pattern to consecutive registers. +* OP_IF_MODE_OR - skip next ops if all modes do not match. +* OP_IF_MODE_AND - skip next ops if at least one mode does not match. +*/ #ifdef __KERNEL__ #include #include @@ -29,17778 +24,13822 @@ #include #include #include "bnx2x_compat.h" -#include "bnx2x_init.h" #include "bnx2x.h" +#include "bnx2x_init.h" #endif - static const struct raw_op init_ops_e1h[] = { -/* #define PRS_COMMON_START 0 */ - {OP_WR, PRS_REG_INC_VALUE, 0xf}, - {OP_WR, PRS_REG_EVENT_ID_1, 0x45}, - {OP_WR, PRS_REG_EVENT_ID_3, 0x6}, - {OP_WR, PRS_REG_NO_MATCH_EVENT_ID, 0x4}, - {OP_WR, PRS_REG_CM_HDR_TYPE_0, 0x0}, - {OP_WR, PRS_REG_CM_HDR_TYPE_1, 0x12170000}, - {OP_WR, PRS_REG_CM_HDR_TYPE_2, 0x22170000}, - {OP_WR, PRS_REG_CM_HDR_TYPE_3, 0x32170000}, - {OP_ZR, PRS_REG_CM_HDR_TYPE_4, 0x5}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_1, 0x12150000}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_2, 0x22150000}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_3, 0x32150000}, - {OP_ZR, PRS_REG_CM_HDR_LOOPBACK_TYPE_4, 0x4}, - {OP_WR, PRS_REG_CM_NO_MATCH_HDR, 0x2100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_0, 0x100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_1, 0x10100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_2, 0x20100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_3, 0x30100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_4, 0x40100000}, - {OP_ZR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_5, 0x3}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_0, 0x100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_1, 0x12140000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_2, 0x22140000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_3, 0x32140000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_4, 0x42140000}, - {OP_ZR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_5, 0x3}, - {OP_RD, PRS_REG_NUM_OF_PACKETS, 0x0}, - {OP_RD, PRS_REG_NUM_OF_CFC_FLUSH_MESSAGES, 0x0}, - {OP_RD, PRS_REG_NUM_OF_TRANSPARENT_FLUSH_MESSAGES, 0x0}, - {OP_RD, PRS_REG_NUM_OF_DEAD_CYCLES, 0x0}, - {OP_WR, PRS_REG_FCOE_TYPE, 0x8906}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_0, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_1, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_2, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_3, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_4, 0x7f}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_5, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_6, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_7, 0xff}, - {OP_WR, PRS_REG_PURE_REGIONS, 0x3e}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_0, 0x0}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_1, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_2, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_3, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_4, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_5, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_6, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_7, 0x3f}, -/* #define PRS_COMMON_END 1 */ -/* #define SRCH_COMMON_START 22 */ - {OP_WR, SRC_REG_E1HMF_ENABLE, 0x1}, -/* #define SRCH_COMMON_END 23 */ -/* #define TSDM_COMMON_START 44 */ - {OP_WR, TSDM_REG_CFC_RSP_START_ADDR, 0x211}, - {OP_WR, TSDM_REG_CMP_COUNTER_START_ADDR, 0x200}, - {OP_WR, TSDM_REG_Q_COUNTER_START_ADDR, 0x204}, - {OP_WR, TSDM_REG_PCK_END_MSG_START_ADDR, 0x219}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, TSDM_REG_AGG_INT_EVENT_0, 0x20}, - {OP_ZR, TSDM_REG_AGG_INT_EVENT_1, 0x1f}, - {OP_WR, TSDM_REG_AGG_INT_T_0, 0x1}, - {OP_ZR, TSDM_REG_AGG_INT_T_1, 0x5f}, - {OP_WR, TSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, TSDM_REG_ENABLE_IN2, 0x3f}, - {OP_WR, TSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, TSDM_REG_ENABLE_OUT2, 0xf}, - {OP_RD, TSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR_ASIC, TSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, TSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, TSDM_REG_TIMER_TICK, 0xa}, -/* #define TSDM_COMMON_END 45 */ -/* #define TCM_COMMON_START 66 */ - {OP_ZR, TCM_REG_AG_CTX, 0xd00}, - {OP_WR, TCM_REG_XX_MAX_LL_SZ, 0x20}, - {OP_WR, TCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, TCM_REG_TQM_TCM_HDR_P, 0x2150020}, - {OP_WR, TCM_REG_TQM_TCM_HDR_S, 0x2150020}, - {OP_WR, TCM_REG_TM_TCM_HDR, 0x30}, - {OP_WR, TCM_REG_ERR_TCM_HDR, 0x8100000}, - {OP_WR, TCM_REG_ERR_EVNT_ID, 0x33}, - {OP_WR, TCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, TCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, TCM_REG_STORM_WEIGHT, 0x2}, - {OP_WR, TCM_REG_PRS_WEIGHT, 0x5}, - {OP_WR, TCM_REG_PBF_WEIGHT, 0x6}, - {OP_WR, TCM_REG_USEM_WEIGHT, 0x2}, - {OP_WR, TCM_REG_CSEM_WEIGHT, 0x2}, - {OP_WR, TCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, TCM_REG_TSDM_WEIGHT, 0x5}, - {OP_WR, TCM_REG_TQM_P_WEIGHT, 0x2}, - {OP_WR, TCM_REG_TQM_S_WEIGHT, 0x2}, - {OP_WR, TCM_REG_TM_WEIGHT, 0x2}, - {OP_WR, TCM_REG_TCM_TQM_USE_Q, 0x1}, - {OP_WR, TCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, TCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, TCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, TCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, TCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, TCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, TCM_REG_TQM_INIT_CRD, 0x20}, - {OP_WR, TCM_REG_XX_INIT_CRD, 0x13}, - {OP_WR, TCM_REG_XX_MSG_NUM, 0x20}, - {OP_ZR, TCM_REG_XX_TABLE, 0xa}, - {OP_SW, TCM_REG_XX_DESCR_TABLE, 0x200000}, - {OP_WR, TCM_REG_N_SM_CTX_LD_0, 0x7}, - {OP_WR, TCM_REG_N_SM_CTX_LD_1, 0x7}, - {OP_WR, TCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, TCM_REG_N_SM_CTX_LD_3, 0x8}, - {OP_WR, TCM_REG_N_SM_CTX_LD_4, 0x1}, - {OP_ZR, TCM_REG_N_SM_CTX_LD_5, 0x3}, - {OP_WR, TCM_REG_TCM_REG0_SZ, 0x6}, - {OP_WR, TCM_REG_TCM_STORM0_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_STORM1_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_TQM_IFEN, 0x1}, - {OP_WR, TCM_REG_STORM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_TQM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_TSDM_IFEN, 0x1}, - {OP_WR, TCM_REG_TM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_PRS_IFEN, 0x1}, - {OP_WR, TCM_REG_PBF_IFEN, 0x1}, - {OP_WR, TCM_REG_USEM_IFEN, 0x1}, - {OP_WR, TCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_CFC_IFEN, 0x1}, -/* #define TCM_COMMON_END 67 */ -/* #define TCM_FUNC0_START 72 */ - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0xd}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define TCM_FUNC0_END 73 */ -/* #define TCM_FUNC1_START 74 */ - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x2d}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x20}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x20}, -/* #define TCM_FUNC1_END 75 */ -/* #define TCM_FUNC2_START 76 */ - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0x1d}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x10}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x10}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x10}, -/* #define TCM_FUNC2_END 77 */ -/* #define TCM_FUNC3_START 78 */ - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x3d}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x30}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x30}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x30}, -/* #define TCM_FUNC3_END 79 */ -/* #define TCM_FUNC4_START 80 */ - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0x4d}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x40}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x40}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x40}, -/* #define TCM_FUNC4_END 81 */ -/* #define TCM_FUNC5_START 82 */ - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x6d}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x60}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x60}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x60}, -/* #define TCM_FUNC5_END 83 */ -/* #define TCM_FUNC6_START 84 */ - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0x5d}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x50}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x50}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x50}, -/* #define TCM_FUNC6_END 85 */ -/* #define TCM_FUNC7_START 86 */ - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x7d}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x70}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x70}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x70}, -/* #define TCM_FUNC7_END 87 */ -/* #define BRB1_COMMON_START 88 */ - {OP_SW, BRB1_REG_LL_RAM, 0x2000020}, - {OP_WR, BRB1_REG_SOFT_RESET, 0x1}, - {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_4, 0x0}, - {OP_SW, BRB1_REG_FREE_LIST_PRS_CRDT, 0x30220}, - {OP_WR, BRB1_REG_SOFT_RESET, 0x0}, -/* #define BRB1_COMMON_END 89 */ -/* #define BRB1_PORT0_START 90 */ - {OP_RD, BRB1_REG_NUM_OF_PAUSE_CYCLES_0, 0x0}, - {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_0, 0x0}, - {OP_WR, BRB1_REG_LOW_LLFC_HIGH_THRESHOLD_0, 0x0}, -/* #define BRB1_PORT0_END 91 */ -/* #define BRB1_PORT1_START 92 */ - {OP_RD, BRB1_REG_NUM_OF_PAUSE_CYCLES_1, 0x0}, - {OP_RD, BRB1_REG_NUM_OF_FULL_CYCLES_1, 0x0}, - {OP_WR, BRB1_REG_LOW_LLFC_HIGH_THRESHOLD_1, 0x0}, -/* #define BRB1_PORT1_END 93 */ -/* #define TSEM_COMMON_START 110 */ - {OP_ZP, TSEM_REG_INT_TABLE, 0x900000}, - {OP_WR_64, TSEM_REG_INT_TABLE + 0x3d8, 0x50223}, - {OP_ZP, TSEM_REG_PRAM, 0x2b370000}, - {OP_ZP, TSEM_REG_PRAM + 0x8000, 0x32b20ace}, - {OP_ZP, TSEM_REG_PRAM + 0x10000, 0x20f5177b}, - {OP_WR_64, TSEM_REG_PRAM + 0x14f60, 0x56140225}, - {OP_RD, TSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, TSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, TSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, TSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, TSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, TSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, TSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, TSEM_REG_TS_0_AS, 0x0}, - {OP_WR, TSEM_REG_TS_1_AS, 0x1}, - {OP_WR, TSEM_REG_TS_2_AS, 0x4}, - {OP_WR, TSEM_REG_TS_3_AS, 0x0}, - {OP_WR, TSEM_REG_TS_4_AS, 0x1}, - {OP_WR, TSEM_REG_TS_5_AS, 0x3}, - {OP_WR, TSEM_REG_TS_6_AS, 0x0}, - {OP_WR, TSEM_REG_TS_7_AS, 0x1}, - {OP_WR, TSEM_REG_TS_8_AS, 0x4}, - {OP_WR, TSEM_REG_TS_9_AS, 0x0}, - {OP_WR, TSEM_REG_TS_10_AS, 0x1}, - {OP_WR, TSEM_REG_TS_11_AS, 0x3}, - {OP_WR, TSEM_REG_TS_12_AS, 0x0}, - {OP_WR, TSEM_REG_TS_13_AS, 0x1}, - {OP_WR, TSEM_REG_TS_14_AS, 0x4}, - {OP_WR, TSEM_REG_TS_15_AS, 0x0}, - {OP_WR, TSEM_REG_TS_16_AS, 0x4}, - {OP_WR, TSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, TSEM_REG_TS_18_AS, 0x2}, - {OP_WR, TSEM_REG_ENABLE_IN, 0x3fff}, - {OP_WR, TSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, TSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, TSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, TSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, TSEM_REG_THREADS_LIST, 0xff}, - {OP_ZR, TSEM_REG_PASSIVE_BUFFER, 0x400}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18000, 0x34}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18040, 0x18}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18080, 0xc}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x180c0, 0x20}, - {OP_WR_ASIC, TSEM_REG_FAST_MEMORY + 0x18300, 0x7a120}, - {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x18300, 0x138}, - {OP_WR_FPGA, TSEM_REG_FAST_MEMORY + 0x18300, 0x1388}, - {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, TSEM_REG_FAST_MEMORY + 0x18340, 0x1f4}, - {OP_WR_FPGA, TSEM_REG_FAST_MEMORY + 0x18340, 0x5}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18380, 0x7a120}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x11480, 0x1}, - {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x11480, 0x0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa0c0, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x1000, 0x3b2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x1ec8, 0x20227}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x1ec8 + 0x8, 0x8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9060, 0x310}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0xa080, 0x100229}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5000, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5008, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5018, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5028, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5038, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5048, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5058, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5068, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5078, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4050, 0x6}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4050 + 0x18, 0x20239}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4040, 0x4023b}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000, 0x1023f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x10, 0x10240}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x20, 0x10241}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x30, 0x10242}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x40, 0x10243}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x50, 0x10244}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x60, 0x10245}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x70, 0x10246}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x80, 0x10247}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x90, 0x10248}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa0, 0x10249}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb0, 0x1024a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc0, 0x1024b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd0, 0x1024c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe0, 0x1024d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf0, 0x1024e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x100, 0x1024f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x104, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x110, 0x10250}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x114, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x120, 0x10251}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x124, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x130, 0x10252}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x134, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x140, 0x10253}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x144, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x150, 0x10254}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x154, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x160, 0x10255}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x164, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x170, 0x10256}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x174, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x180, 0x10257}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x184, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x190, 0x10258}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x194, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1a0, 0x10259}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1b0, 0x1025a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1c0, 0x1025b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1d0, 0x1025c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1e0, 0x1025d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1f0, 0x1025e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x200, 0x1025f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x204, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x210, 0x10260}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x214, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x220, 0x10261}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x224, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x230, 0x10262}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x234, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x240, 0x10263}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x244, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x250, 0x10264}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x254, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x260, 0x10265}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x264, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x270, 0x10266}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x274, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x280, 0x10267}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x284, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x290, 0x10268}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x294, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2a0, 0x10269}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2b0, 0x1026a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2c0, 0x1026b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2d0, 0x1026c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2e0, 0x1026d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2f0, 0x1026e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x300, 0x1026f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x304, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x310, 0x10270}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x314, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x320, 0x10271}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x324, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x330, 0x10272}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x334, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x340, 0x10273}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x344, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x350, 0x10274}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x354, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x360, 0x10275}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x364, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x370, 0x10276}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x374, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x380, 0x10277}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x384, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x390, 0x10278}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x394, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3a0, 0x10279}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3b0, 0x1027a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3c0, 0x1027b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3d0, 0x1027c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3e0, 0x1027d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3f0, 0x1027e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x400, 0x1027f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x404, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x410, 0x10280}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x414, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x420, 0x10281}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x424, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x430, 0x10282}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x434, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x440, 0x10283}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x444, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x450, 0x10284}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x454, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x460, 0x10285}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x464, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x470, 0x10286}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x474, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x480, 0x10287}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x484, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x490, 0x10288}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x494, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4a0, 0x10289}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4b0, 0x1028a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4c0, 0x1028b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4d0, 0x1028c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4e0, 0x1028d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4f0, 0x1028e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x500, 0x1028f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x504, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x510, 0x10290}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x514, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x520, 0x10291}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x524, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x530, 0x10292}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x534, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x540, 0x10293}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x544, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x550, 0x10294}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x554, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x560, 0x10295}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x564, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x570, 0x10296}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x574, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x580, 0x10297}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x584, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x590, 0x10298}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x594, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5a0, 0x10299}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5b0, 0x1029a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5c0, 0x1029b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5d0, 0x1029c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5e0, 0x1029d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5f0, 0x1029e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x600, 0x1029f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x604, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x610, 0x102a0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x614, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x620, 0x102a1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x624, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x630, 0x102a2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x634, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x640, 0x102a3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x644, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x650, 0x102a4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x654, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x660, 0x102a5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x664, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x670, 0x102a6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x674, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x680, 0x102a7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x684, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x690, 0x102a8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x694, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6a0, 0x102a9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6b0, 0x102aa}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6c0, 0x102ab}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6d0, 0x102ac}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6e0, 0x102ad}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6f0, 0x102ae}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x700, 0x102af}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x704, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x710, 0x102b0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x714, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x720, 0x102b1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x724, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x730, 0x102b2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x734, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x740, 0x102b3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x744, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x750, 0x102b4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x754, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x760, 0x102b5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x764, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x770, 0x102b6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x774, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x780, 0x102b7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x784, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x790, 0x102b8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x794, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7a0, 0x102b9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7b0, 0x102ba}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7c0, 0x102bb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7d0, 0x102bc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7e0, 0x102bd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7f0, 0x102be}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x800, 0x102bf}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x804, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x810, 0x102c0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x814, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x820, 0x102c1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x824, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x830, 0x102c2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x834, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x840, 0x102c3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x844, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x850, 0x102c4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x854, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x860, 0x102c5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x864, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x870, 0x102c6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x874, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x880, 0x102c7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x884, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x890, 0x102c8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x894, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8a0, 0x102c9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8b0, 0x102ca}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8c0, 0x102cb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8d0, 0x102cc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8e0, 0x102cd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8f0, 0x102ce}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x900, 0x102cf}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x904, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x910, 0x102d0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x914, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x920, 0x102d1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x924, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x930, 0x102d2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x934, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x940, 0x102d3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x944, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x950, 0x102d4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x954, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x960, 0x102d5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x964, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x970, 0x102d6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x974, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x980, 0x102d7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x984, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x990, 0x102d8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x994, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9a0, 0x102d9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9b0, 0x102da}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9c0, 0x102db}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9d0, 0x102dc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9e0, 0x102dd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9f0, 0x102de}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa00, 0x102df}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa10, 0x102e0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa20, 0x102e1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa30, 0x102e2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa40, 0x102e3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa50, 0x102e4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa60, 0x102e5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa70, 0x102e6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa80, 0x102e7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa90, 0x102e8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xaa0, 0x102e9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xaa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xab0, 0x102ea}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xab4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xac0, 0x102eb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xac4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xad0, 0x102ec}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xad4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xae0, 0x102ed}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xae4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xaf0, 0x102ee}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xaf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb00, 0x102ef}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb10, 0x102f0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb20, 0x102f1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb30, 0x102f2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb40, 0x102f3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb50, 0x102f4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb60, 0x102f5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb70, 0x102f6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb80, 0x102f7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb90, 0x102f8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xba0, 0x102f9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xba4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbb0, 0x102fa}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbc0, 0x102fb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbd0, 0x102fc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbe0, 0x102fd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbe4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbf0, 0x102fe}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc00, 0x102ff}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc10, 0x10300}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc20, 0x10301}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc30, 0x10302}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc40, 0x10303}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc50, 0x10304}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc60, 0x10305}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc70, 0x10306}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc80, 0x10307}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc90, 0x10308}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xca0, 0x10309}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xca4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcb0, 0x1030a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcc0, 0x1030b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcd0, 0x1030c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xce0, 0x1030d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xce4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcf0, 0x1030e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd00, 0x1030f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd10, 0x10310}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd20, 0x10311}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd30, 0x10312}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd40, 0x10313}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd50, 0x10314}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd60, 0x10315}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd70, 0x10316}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd80, 0x10317}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd90, 0x10318}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xda0, 0x10319}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xda4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdb0, 0x1031a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdc0, 0x1031b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdd0, 0x1031c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xde0, 0x1031d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xde4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdf0, 0x1031e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe00, 0x1031f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe10, 0x10320}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe20, 0x10321}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe30, 0x10322}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe40, 0x10323}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe50, 0x10324}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe60, 0x10325}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe70, 0x10326}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe80, 0x10327}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe90, 0x10328}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xea0, 0x10329}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xea4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xeb0, 0x1032a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xeb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xec0, 0x1032b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xec4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xed0, 0x1032c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xed4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xee0, 0x1032d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xee4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xef0, 0x1032e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xef4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf00, 0x1032f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf10, 0x10330}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf20, 0x10331}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf30, 0x10332}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf40, 0x10333}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf50, 0x10334}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf60, 0x10335}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf70, 0x10336}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf80, 0x10337}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf90, 0x10338}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfa0, 0x10339}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfb0, 0x1033a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfc0, 0x1033b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfd0, 0x1033c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfe0, 0x1033d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfe4, 0x7}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x62c0, 0x20033e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3720, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd000, 0x72}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd248, 0x10}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd6b0, 0x20}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd470, 0x90}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd468, 0x2}, -/* #define TSEM_COMMON_END 111 */ -/* #define TSEM_PORT0_START 112 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9000, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3300, 0x12}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd458, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd348, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd358, 0x20}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3390, 0x70}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000, 0x10}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3080, 0x10}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3100, 0x10}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3180, 0x10}, -/* #define TSEM_PORT0_END 113 */ -/* #define TSEM_PORT1_START 114 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9010, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3348, 0x12}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd460, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd350, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd3d8, 0x20}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3550, 0x70}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3040, 0x10}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x30c0, 0x10}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3140, 0x10}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x31c0, 0x10}, -/* #define TSEM_PORT1_END 115 */ -/* #define TSEM_FUNC0_START 116 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9020, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa000, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5000, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5080, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4000, 0x2035e}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63c0, 0x20360}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7000, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3200, 0x8}, -/* #define TSEM_FUNC0_END 117 */ -/* #define TSEM_FUNC1_START 118 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9028, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa008, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5010, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x50c8, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4008, 0x20362}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63c8, 0x20364}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7010, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3220, 0x8}, -/* #define TSEM_FUNC1_END 119 */ -/* #define TSEM_FUNC2_START 120 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9030, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa010, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5020, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5110, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4010, 0x20366}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63d0, 0x20368}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7020, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3240, 0x8}, -/* #define TSEM_FUNC2_END 121 */ -/* #define TSEM_FUNC3_START 122 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9038, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa018, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5030, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5158, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4018, 0x2036a}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63d8, 0x2036c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7030, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3260, 0x8}, -/* #define TSEM_FUNC3_END 123 */ -/* #define TSEM_FUNC4_START 124 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9040, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa020, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5040, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x51a0, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4020, 0x2036e}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63e0, 0x20370}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7040, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3280, 0x8}, -/* #define TSEM_FUNC4_END 125 */ -/* #define TSEM_FUNC5_START 126 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9048, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa028, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5050, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x51e8, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4028, 0x20372}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63e8, 0x20374}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7050, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x32a0, 0x8}, -/* #define TSEM_FUNC5_END 127 */ -/* #define TSEM_FUNC6_START 128 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9050, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa030, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5060, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5230, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4030, 0x20376}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63f0, 0x20378}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7060, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x32c0, 0x8}, -/* #define TSEM_FUNC6_END 129 */ -/* #define TSEM_FUNC7_START 130 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x9058, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa038, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5070, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5278, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4038, 0x2037a}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63f8, 0x2037c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7070, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x32e0, 0x8}, -/* #define TSEM_FUNC7_END 131 */ -/* #define MISC_COMMON_START 220 */ - {OP_WR, MISC_REG_GENERIC_HW_0, 0xb01c8}, - {OP_WR, MISC_REG_PLL_STORM_CTRL_1, 0x71d2911}, - {OP_WR, MISC_REG_PLL_STORM_CTRL_2, 0x0}, - {OP_WR, MISC_REG_PLL_STORM_CTRL_3, 0x9c0424}, - {OP_WR, MISC_REG_PLL_STORM_CTRL_4, 0x0}, - {OP_WR, MISC_REG_LCPLL_CTRL_1, 0x209}, -/* #define MISC_COMMON_END 221 */ -/* #define MISC_FUNC0_START 226 */ - {OP_WR, MISC_REG_NIG_WOL_P0, 0x0}, -/* #define MISC_FUNC0_END 227 */ -/* #define MISC_FUNC1_START 228 */ - {OP_WR, MISC_REG_NIG_WOL_P1, 0x0}, -/* #define MISC_FUNC1_END 229 */ -/* #define MISC_FUNC2_START 230 */ - {OP_WR, MISC_REG_NIG_WOL_P0, 0x0}, -/* #define MISC_FUNC2_END 231 */ -/* #define MISC_FUNC3_START 232 */ - {OP_WR, MISC_REG_NIG_WOL_P1, 0x0}, -/* #define MISC_FUNC3_END 233 */ -/* #define MISC_FUNC4_START 234 */ - {OP_WR, MISC_REG_NIG_WOL_P0, 0x0}, -/* #define MISC_FUNC4_END 235 */ -/* #define MISC_FUNC5_START 236 */ - {OP_WR, MISC_REG_NIG_WOL_P1, 0x0}, -/* #define MISC_FUNC5_END 237 */ -/* #define MISC_FUNC6_START 238 */ - {OP_WR, MISC_REG_NIG_WOL_P0, 0x0}, -/* #define MISC_FUNC6_END 239 */ -/* #define MISC_FUNC7_START 240 */ - {OP_WR, MISC_REG_NIG_WOL_P1, 0x0}, -/* #define MISC_FUNC7_END 241 */ -/* #define NIG_COMMON_START 264 */ - {OP_WR, NIG_REG_PPP_STORM_ID, 0x1}, - {OP_WR, NIG_REG_PPP_ADDRESS, 0x25e}, - {OP_WR, NIG_REG_PPP_TRIG, 0x2}, - {OP_WR, NIG_REG_PPP_T124PARAM, 0x18}, - {OP_WR, NIG_REG_PPP_OUT_EN, 0x1}, - {OP_WR, NIG_REG_PBF_LB_IN_EN, 0x1}, - {OP_WR, NIG_REG_PRS_REQ_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_DEBUG_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB_LB_OUT_EN, 0x1}, - {OP_WR, NIG_REG_PRS_EOP_OUT_EN, 0x1}, -/* #define NIG_COMMON_END 265 */ -/* #define NIG_PORT0_START 266 */ - {OP_WR, NIG_REG_LLH0_CM_HEADER, 0x300000}, - {OP_WR, NIG_REG_LLH0_EVENT_ID, 0x28}, - {OP_WR, NIG_REG_LLH0_ERROR_MASK, 0x0}, - {OP_WR, NIG_REG_LLH0_XCM_MASK, 0x4}, - {OP_WR, NIG_REG_LLH0_BRB1_NOT_MCP, 0x1}, - {OP_WR, NIG_REG_STATUS_INTERRUPT_PORT0, 0x0}, - {OP_WR, NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0, 0xffff}, - {OP_WR, NIG_REG_LLFC_EGRESS_SRC_ENABLE_0, 0x7}, - {OP_WR, NIG_REG_LLH0_CLS_TYPE, 0x1}, - {OP_WR, NIG_REG_LLH0_XCM_INIT_CREDIT, 0x30}, - {OP_WR, NIG_REG_BRB0_PAUSE_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_PBF0_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB0_OUT_EN, 0x1}, - {OP_WR, NIG_REG_XCM0_OUT_EN, 0x1}, -/* #define NIG_PORT0_END 267 */ -/* #define NIG_PORT1_START 268 */ - {OP_WR, NIG_REG_LLH1_CM_HEADER, 0x300000}, - {OP_WR, NIG_REG_LLH1_EVENT_ID, 0x28}, - {OP_WR, NIG_REG_LLH1_ERROR_MASK, 0x0}, - {OP_WR, NIG_REG_LLH1_XCM_MASK, 0x4}, - {OP_WR, NIG_REG_LLH1_BRB1_NOT_MCP, 0x1}, - {OP_WR, NIG_REG_STATUS_INTERRUPT_PORT1, 0x0}, - {OP_WR, NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1, 0xffff}, - {OP_WR, NIG_REG_LLFC_EGRESS_SRC_ENABLE_1, 0x7}, - {OP_WR, NIG_REG_LLH1_CLS_TYPE, 0x1}, - {OP_WR, NIG_REG_LLH1_XCM_INIT_CREDIT, 0x30}, - {OP_WR, NIG_REG_BRB1_PAUSE_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_PBF1_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB1_OUT_EN, 0x1}, - {OP_WR, NIG_REG_XCM1_OUT_EN, 0x1}, -/* #define NIG_PORT1_END 269 */ -/* #define UPB_COMMON_START 308 */ - {OP_WR, GRCBASE_UPB + PB_REG_CONTROL, 0x20}, -/* #define UPB_COMMON_END 309 */ -/* #define CSDM_COMMON_START 330 */ - {OP_WR, CSDM_REG_CFC_RSP_START_ADDR, 0x211}, - {OP_WR, CSDM_REG_CMP_COUNTER_START_ADDR, 0x200}, - {OP_WR, CSDM_REG_Q_COUNTER_START_ADDR, 0x204}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_0, 0x20}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_1, 0x21}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_2, 0x22}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_3, 0x23}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_4, 0x24}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_5, 0x25}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_6, 0x26}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_7, 0x27}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_8, 0x28}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_9, 0x29}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_10, 0x2a}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_11, 0x2b}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_12, 0x2c}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_13, 0x2d}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_14, 0x2e}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_15, 0x2f}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_16, 0x10}, - {OP_ZR, CSDM_REG_AGG_INT_EVENT_17, 0x7}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_24, 0x11}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_25, 0x12}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_26, 0x13}, - {OP_ZR, CSDM_REG_AGG_INT_EVENT_27, 0x1d}, - {OP_WR, CSDM_REG_AGG_INT_T_24, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_T_25, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_T_26, 0x1}, - {OP_ZR, CSDM_REG_AGG_INT_T_27, 0x1d}, - {OP_WR, CSDM_REG_AGG_INT_FIC_24, 0x1}, - {OP_ZR, CSDM_REG_AGG_INT_FIC_25, 0x7}, - {OP_WR, CSDM_REG_AGG_INT_MODE_0, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_1, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_2, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_3, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_4, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_5, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_6, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_7, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_8, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_9, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_10, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_11, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_12, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_13, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_14, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_15, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_16, 0x1}, - {OP_ZR, CSDM_REG_AGG_INT_MODE_17, 0x7}, - {OP_WR, CSDM_REG_AGG_INT_MODE_24, 0x1}, - {OP_ZR, CSDM_REG_AGG_INT_MODE_25, 0x7}, - {OP_WR, CSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, CSDM_REG_ENABLE_IN2, 0x3f}, - {OP_WR, CSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, CSDM_REG_ENABLE_OUT2, 0xf}, - {OP_RD, CSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR_ASIC, CSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, CSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, CSDM_REG_TIMER_TICK, 0xa}, -/* #define CSDM_COMMON_END 331 */ -/* #define USDM_COMMON_START 352 */ - {OP_WR, USDM_REG_CFC_RSP_START_ADDR, 0x1011}, - {OP_WR, USDM_REG_CMP_COUNTER_START_ADDR, 0x1000}, - {OP_WR, USDM_REG_Q_COUNTER_START_ADDR, 0x1004}, - {OP_WR, USDM_REG_PCK_END_MSG_START_ADDR, 0x1021}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, USDM_REG_AGG_INT_EVENT_0, 0x46}, - {OP_WR, USDM_REG_AGG_INT_EVENT_1, 0x10}, - {OP_ZR, USDM_REG_AGG_INT_EVENT_2, 0x2}, - {OP_WR, USDM_REG_AGG_INT_EVENT_4, 0x18}, - {OP_WR, USDM_REG_AGG_INT_EVENT_5, 0xf0}, - {OP_ZR, USDM_REG_AGG_INT_EVENT_6, 0x1f}, - {OP_WR, USDM_REG_AGG_INT_T_5, 0x1}, - {OP_ZR, USDM_REG_AGG_INT_T_6, 0x3a}, - {OP_WR, USDM_REG_AGG_INT_MODE_0, 0x1}, - {OP_ZR, USDM_REG_AGG_INT_MODE_1, 0x3}, - {OP_WR, USDM_REG_AGG_INT_MODE_4, 0x1}, - {OP_WR, USDM_REG_AGG_INT_MODE_5, 0x1}, - {OP_ZR, USDM_REG_AGG_INT_MODE_6, 0x1a}, - {OP_WR, USDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, USDM_REG_ENABLE_IN2, 0x3f}, - {OP_WR, USDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, USDM_REG_ENABLE_OUT2, 0xf}, - {OP_RD, USDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q2_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, USDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, USDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR_ASIC, USDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, USDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, USDM_REG_TIMER_TICK, 0xa}, -/* #define USDM_COMMON_END 353 */ -/* #define CCM_COMMON_START 374 */ - {OP_ZR, CCM_REG_AG_CTX, 0xa00}, - {OP_WR, CCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, CCM_REG_CQM_CCM_HDR_P, 0x2150020}, - {OP_WR, CCM_REG_CQM_CCM_HDR_S, 0x2150020}, - {OP_WR, CCM_REG_ERR_CCM_HDR, 0x8100000}, - {OP_WR, CCM_REG_ERR_EVNT_ID, 0x33}, - {OP_WR, CCM_REG_STORM_WEIGHT, 0x2}, - {OP_WR, CCM_REG_TSEM_WEIGHT, 0x0}, - {OP_WR, CCM_REG_XSEM_WEIGHT, 0x5}, - {OP_WR, CCM_REG_USEM_WEIGHT, 0x5}, - {OP_ZR, CCM_REG_PBF_WEIGHT, 0x2}, - {OP_WR, CCM_REG_CSDM_WEIGHT, 0x2}, - {OP_WR, CCM_REG_CQM_P_WEIGHT, 0x3}, - {OP_WR, CCM_REG_CQM_S_WEIGHT, 0x2}, - {OP_WR, CCM_REG_CCM_CQM_USE_Q, 0x1}, - {OP_WR, CCM_REG_CNT_AUX1_Q, 0x2}, - {OP_WR, CCM_REG_CNT_AUX2_Q, 0x2}, - {OP_WR, CCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, CCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, CCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, CCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, CCM_REG_CQM_INIT_CRD, 0x20}, - {OP_WR, CCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, CCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, CCM_REG_XX_INIT_CRD, 0x3}, - {OP_WR, CCM_REG_XX_MSG_NUM, 0x18}, - {OP_ZR, CCM_REG_XX_TABLE, 0x12}, - {OP_SW, CCM_REG_XX_DESCR_TABLE, 0x18037e}, - {OP_ZR, CCM_REG_XX_DESCR_TABLE + 0x60, 0xc}, - {OP_WR, CCM_REG_N_SM_CTX_LD_0, 0x1}, - {OP_WR, CCM_REG_N_SM_CTX_LD_1, 0x2}, - {OP_WR, CCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, CCM_REG_N_SM_CTX_LD_3, 0x8}, - {OP_ZR, CCM_REG_N_SM_CTX_LD_4, 0x4}, - {OP_WR, CCM_REG_CCM_REG0_SZ, 0x4}, - {OP_WR, CCM_REG_CCM_STORM0_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_STORM1_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_CQM_IFEN, 0x1}, - {OP_WR, CCM_REG_STORM_CCM_IFEN, 0x1}, - {OP_WR, CCM_REG_CQM_CCM_IFEN, 0x1}, - {OP_WR, CCM_REG_CSDM_IFEN, 0x1}, - {OP_WR, CCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, CCM_REG_XSEM_IFEN, 0x1}, - {OP_WR, CCM_REG_USEM_IFEN, 0x1}, - {OP_WR, CCM_REG_PBF_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_CFC_IFEN, 0x1}, -/* #define CCM_COMMON_END 375 */ -/* #define CCM_FUNC0_START 380 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x9}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0xa}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x0}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x0}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0xb}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define CCM_FUNC0_END 381 */ -/* #define CCM_FUNC1_START 382 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x29}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x2a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x20}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x20}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x2b}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x20}, -/* #define CCM_FUNC1_END 383 */ -/* #define CCM_FUNC2_START 384 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x19}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0x1a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x10}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x10}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x10}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0x1b}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x10}, -/* #define CCM_FUNC2_END 385 */ -/* #define CCM_FUNC3_START 386 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x39}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x3a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x30}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x30}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x30}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x3b}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x30}, -/* #define CCM_FUNC3_END 387 */ -/* #define CCM_FUNC4_START 388 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x49}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0x4a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x40}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x40}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x40}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0x4b}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x40}, -/* #define CCM_FUNC4_END 389 */ -/* #define CCM_FUNC5_START 390 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x69}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x6a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x60}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x60}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x60}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x6b}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x60}, -/* #define CCM_FUNC5_END 391 */ -/* #define CCM_FUNC6_START 392 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x59}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0x5a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x50}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x50}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x50}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0x5b}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x50}, -/* #define CCM_FUNC6_END 393 */ -/* #define CCM_FUNC7_START 394 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x79}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x7a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x70}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x70}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x70}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x7b}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x70}, -/* #define CCM_FUNC7_END 395 */ -/* #define UCM_COMMON_START 396 */ - {OP_ZR, UCM_REG_AG_CTX, 0x800}, - {OP_WR, UCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, UCM_REG_UQM_UCM_HDR_P, 0x2150020}, - {OP_WR, UCM_REG_UQM_UCM_HDR_S, 0x2150020}, - {OP_WR, UCM_REG_TM_UCM_HDR, 0x30}, - {OP_WR, UCM_REG_ERR_UCM_HDR, 0x8100000}, - {OP_WR, UCM_REG_ERR_EVNT_ID, 0x33}, - {OP_WR, UCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, UCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, UCM_REG_STORM_WEIGHT, 0x2}, - {OP_WR, UCM_REG_TSEM_WEIGHT, 0x4}, - {OP_WR, UCM_REG_CSEM_WEIGHT, 0x0}, - {OP_WR, UCM_REG_XSEM_WEIGHT, 0x2}, - {OP_WR, UCM_REG_DORQ_WEIGHT, 0x2}, - {OP_WR, UCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, UCM_REG_USDM_WEIGHT, 0x2}, - {OP_WR, UCM_REG_UQM_P_WEIGHT, 0x7}, - {OP_WR, UCM_REG_UQM_S_WEIGHT, 0x2}, - {OP_WR, UCM_REG_TM_WEIGHT, 0x2}, - {OP_WR, UCM_REG_UCM_UQM_USE_Q, 0x1}, - {OP_WR, UCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, UCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, UCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, UCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, UCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, UCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, UCM_REG_TM_INIT_CRD, 0x4}, - {OP_WR, UCM_REG_UQM_INIT_CRD, 0x20}, - {OP_WR, UCM_REG_XX_INIT_CRD, 0xe}, - {OP_WR, UCM_REG_XX_MSG_NUM, 0x1b}, - {OP_ZR, UCM_REG_XX_TABLE, 0x12}, - {OP_SW, UCM_REG_XX_DESCR_TABLE, 0x1b0396}, - {OP_ZR, UCM_REG_XX_DESCR_TABLE + 0x6c, 0x5}, - {OP_WR, UCM_REG_N_SM_CTX_LD_0, 0xc}, - {OP_WR, UCM_REG_N_SM_CTX_LD_1, 0x8}, - {OP_WR, UCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, UCM_REG_N_SM_CTX_LD_3, 0x10}, - {OP_WR, UCM_REG_N_SM_CTX_LD_4, 0x10}, - {OP_ZR, UCM_REG_N_SM_CTX_LD_5, 0x3}, - {OP_WR, UCM_REG_UCM_REG0_SZ, 0x3}, - {OP_WR, UCM_REG_UCM_STORM0_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_STORM1_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_UQM_IFEN, 0x1}, - {OP_WR, UCM_REG_STORM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_UQM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_USDM_IFEN, 0x1}, - {OP_WR, UCM_REG_TM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_TM_IFEN, 0x1}, - {OP_WR, UCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_XSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_DORQ_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_CFC_IFEN, 0x1}, -/* #define UCM_COMMON_END 397 */ -/* #define UCM_FUNC0_START 402 */ - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0xf}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define UCM_FUNC0_END 403 */ -/* #define UCM_FUNC1_START 404 */ - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x2f}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, UCM_REG_PHYS_QNUM2_1, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_1, 0x0}, -/* #define UCM_FUNC1_END 405 */ -/* #define UCM_FUNC2_START 406 */ - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0x1f}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x10}, - {OP_WR, UCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define UCM_FUNC2_END 407 */ -/* #define UCM_FUNC3_START 408 */ - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x3f}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x30}, - {OP_WR, UCM_REG_PHYS_QNUM2_1, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_1, 0x0}, -/* #define UCM_FUNC3_END 409 */ -/* #define UCM_FUNC4_START 410 */ - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0x4f}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x40}, - {OP_WR, UCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define UCM_FUNC4_END 411 */ -/* #define UCM_FUNC5_START 412 */ - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x6f}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x60}, - {OP_WR, UCM_REG_PHYS_QNUM2_1, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_1, 0x0}, -/* #define UCM_FUNC5_END 413 */ -/* #define UCM_FUNC6_START 414 */ - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0x5f}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x50}, - {OP_WR, UCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define UCM_FUNC6_END 415 */ -/* #define UCM_FUNC7_START 416 */ - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x7f}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x70}, - {OP_WR, UCM_REG_PHYS_QNUM2_1, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_1, 0x0}, -/* #define UCM_FUNC7_END 417 */ -/* #define USEM_COMMON_START 418 */ - {OP_ZP, USEM_REG_INT_TABLE, 0xc60000}, - {OP_WR_64, USEM_REG_INT_TABLE + 0x3d8, 0x503b1}, - {OP_ZP, USEM_REG_PRAM, 0x33d40000}, - {OP_ZP, USEM_REG_PRAM + 0x8000, 0x30f40cf6}, - {OP_ZP, USEM_REG_PRAM + 0x10000, 0x35781934}, - {OP_ZP, USEM_REG_PRAM + 0x18000, 0x32772693}, - {OP_ZP, USEM_REG_PRAM + 0x20000, 0x111e3331}, - {OP_WR_64, USEM_REG_PRAM + 0x22ad0, 0x3aa603b3}, - {OP_RD, USEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, USEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, USEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, USEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, USEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, USEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, USEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, USEM_REG_TS_0_AS, 0x0}, - {OP_WR, USEM_REG_TS_1_AS, 0x1}, - {OP_WR, USEM_REG_TS_2_AS, 0x4}, - {OP_WR, USEM_REG_TS_3_AS, 0x0}, - {OP_WR, USEM_REG_TS_4_AS, 0x1}, - {OP_WR, USEM_REG_TS_5_AS, 0x3}, - {OP_WR, USEM_REG_TS_6_AS, 0x0}, - {OP_WR, USEM_REG_TS_7_AS, 0x1}, - {OP_WR, USEM_REG_TS_8_AS, 0x4}, - {OP_WR, USEM_REG_TS_9_AS, 0x0}, - {OP_WR, USEM_REG_TS_10_AS, 0x1}, - {OP_WR, USEM_REG_TS_11_AS, 0x3}, - {OP_WR, USEM_REG_TS_12_AS, 0x0}, - {OP_WR, USEM_REG_TS_13_AS, 0x1}, - {OP_WR, USEM_REG_TS_14_AS, 0x4}, - {OP_WR, USEM_REG_TS_15_AS, 0x0}, - {OP_WR, USEM_REG_TS_16_AS, 0x4}, - {OP_WR, USEM_REG_TS_17_AS, 0x3}, - {OP_ZR, USEM_REG_TS_18_AS, 0x2}, - {OP_WR, USEM_REG_ENABLE_IN, 0x3fff}, - {OP_WR, USEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, USEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, USEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, USEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, USEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, USEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18000, 0x1a}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18040, 0x4e}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18080, 0x10}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x180c0, 0x20}, - {OP_WR_ASIC, USEM_REG_FAST_MEMORY + 0x18300, 0x7a120}, - {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x18300, 0x138}, - {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18300, 0x1388}, - {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, USEM_REG_FAST_MEMORY + 0x18340, 0x1f4}, - {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18340, 0x5}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18380, 0x7a120}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x183c0, 0x1f4}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x11480, 0x1}, - {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x11480, 0x0}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8000, 0x102}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x6000, 0x230}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x8540, 0x1003b5}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3eb0, 0x6}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3ed8, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3e80, 0x8}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x3e80 + 0x20, 0x103c5}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3e80 + 0x24, 0x3}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3e00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5000, 0x400}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4000, 0x4}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x74c0, 0x803c6}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4110, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xd000, 0x30}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xdd40, 0x44}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xda00, 0xd0}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xdea0, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xe000, 0x800}, -/* #define USEM_COMMON_END 419 */ -/* #define USEM_PORT0_START 420 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5000, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5100, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5200, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5300, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5400, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5500, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5600, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5700, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5800, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5900, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5a00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5b00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5c00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5d00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5e00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5f00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8490, 0x2}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x84a0, 0x203ce}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x84a0 + 0x8, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xde90, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1e00, 0x38}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1000, 0x1c0}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3000, 0x1c0}, -/* #define USEM_PORT0_END 421 */ -/* #define USEM_PORT1_START 422 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5080, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5180, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5280, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5380, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5480, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5580, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5680, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5780, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5880, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5980, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5a80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5b80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5c80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5d80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5e80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x5f80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8498, 0x2}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x84b0, 0x203d0}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x84b0 + 0x8, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xde98, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1ee0, 0x38}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1700, 0x1c0}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3700, 0x1c0}, -/* #define USEM_PORT1_END 423 */ -/* #define USEM_FUNC0_START 424 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8450, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4010, 0x2}, -/* #define USEM_FUNC0_END 425 */ -/* #define USEM_FUNC1_START 426 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8458, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4020, 0x2}, -/* #define USEM_FUNC1_END 427 */ -/* #define USEM_FUNC2_START 428 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8460, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4030, 0x2}, -/* #define USEM_FUNC2_END 429 */ -/* #define USEM_FUNC3_START 430 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8468, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4040, 0x2}, -/* #define USEM_FUNC3_END 431 */ -/* #define USEM_FUNC4_START 432 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8470, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4050, 0x2}, -/* #define USEM_FUNC4_END 433 */ -/* #define USEM_FUNC5_START 434 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8478, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4060, 0x2}, -/* #define USEM_FUNC5_END 435 */ -/* #define USEM_FUNC6_START 436 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8480, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4070, 0x2}, -/* #define USEM_FUNC6_END 437 */ -/* #define USEM_FUNC7_START 438 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8488, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4080, 0x2}, -/* #define USEM_FUNC7_END 439 */ -/* #define CSEM_COMMON_START 440 */ - {OP_ZP, CSEM_REG_INT_TABLE, 0x910000}, - {OP_WR_64, CSEM_REG_INT_TABLE + 0x380, 0x1003d2}, - {OP_ZP, CSEM_REG_PRAM, 0x2ca80000}, - {OP_ZP, CSEM_REG_PRAM + 0x8000, 0x16270b2b}, - {OP_WR_64, CSEM_REG_PRAM + 0xad90, 0x68b403d4}, - {OP_RD, CSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, CSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, CSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, CSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, CSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, CSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, CSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, CSEM_REG_TS_0_AS, 0x0}, - {OP_WR, CSEM_REG_TS_1_AS, 0x1}, - {OP_WR, CSEM_REG_TS_2_AS, 0x4}, - {OP_WR, CSEM_REG_TS_3_AS, 0x0}, - {OP_WR, CSEM_REG_TS_4_AS, 0x1}, - {OP_WR, CSEM_REG_TS_5_AS, 0x3}, - {OP_WR, CSEM_REG_TS_6_AS, 0x0}, - {OP_WR, CSEM_REG_TS_7_AS, 0x1}, - {OP_WR, CSEM_REG_TS_8_AS, 0x4}, - {OP_WR, CSEM_REG_TS_9_AS, 0x0}, - {OP_WR, CSEM_REG_TS_10_AS, 0x1}, - {OP_WR, CSEM_REG_TS_11_AS, 0x3}, - {OP_WR, CSEM_REG_TS_12_AS, 0x0}, - {OP_WR, CSEM_REG_TS_13_AS, 0x1}, - {OP_WR, CSEM_REG_TS_14_AS, 0x4}, - {OP_WR, CSEM_REG_TS_15_AS, 0x0}, - {OP_WR, CSEM_REG_TS_16_AS, 0x4}, - {OP_WR, CSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, CSEM_REG_TS_18_AS, 0x2}, - {OP_WR, CSEM_REG_ENABLE_IN, 0x3fff}, - {OP_WR, CSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, CSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, CSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, CSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, CSEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, CSEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18000, 0x10}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18040, 0x12}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18080, 0x30}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x180c0, 0xe}, - {OP_WR_ASIC, CSEM_REG_FAST_MEMORY + 0x18300, 0x7a120}, - {OP_WR_EMUL, CSEM_REG_FAST_MEMORY + 0x18300, 0x138}, - {OP_WR_FPGA, CSEM_REG_FAST_MEMORY + 0x18300, 0x1388}, - {OP_WR_EMUL, CSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, CSEM_REG_FAST_MEMORY + 0x18340, 0x1f4}, - {OP_WR_FPGA, CSEM_REG_FAST_MEMORY + 0x18340, 0x5}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18380, 0x7a120}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x11480, 0x1}, - {OP_WR_EMUL, CSEM_REG_FAST_MEMORY + 0x11480, 0x0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1000, 0x42}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000, 0xc6}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x318, 0x503d6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x32c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x358, 0x503db}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x36c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x398, 0x503e0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x3ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x3d8, 0x503e5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x3ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x418, 0x503ea}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x42c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x458, 0x503ef}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x46c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x498, 0x503f4}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x4ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x4d8, 0x503f9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x4ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x518, 0x503fe}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x52c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x558, 0x50403}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x56c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x598, 0x50408}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x5ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x5d8, 0x5040d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x5ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x618, 0x50412}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x62c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x658, 0x50417}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x66c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x698, 0x5041c}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x6ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x6d8, 0x50421}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x6ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x718, 0x50426}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x72c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x758, 0x5042b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x76c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x798, 0x50430}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x7ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x7d8, 0x50435}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x7ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x818, 0x5043a}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x82c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x858, 0x5043f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x86c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x898, 0x50444}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x8ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x8d8, 0x50449}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x8ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x918, 0x5044e}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x92c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x958, 0x50453}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x96c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x998, 0x50458}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x9ac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0x9d8, 0x5045d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0x9ec, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0xa18, 0x50462}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0xa2c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0xa58, 0x50467}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0xa6c, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0xa98, 0x5046c}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0xaac, 0xb}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xb000 + 0xad8, 0x50471}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000 + 0xaec, 0x5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xbb00, 0x53}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x14c, 0x10476}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x150, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x15c, 0x10477}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x160, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x16c, 0x10478}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x170, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x17c, 0x10479}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x180, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x18c, 0x1047a}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x190, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x19c, 0x1047b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x1a0, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x1ac, 0x1047c}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x1b0, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xbb00 + 0x1bc, 0x1047d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8800, 0x100}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8000, 0x200}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x1250, 0x10047e}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3000, 0xc0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6700, 0x100}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x9000, 0x400}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x6b08, 0x20048e}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x12a0, 0xffffffff}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x11c8, 0x2}, -/* #define CSEM_COMMON_END 441 */ -/* #define CSEM_PORT0_START 442 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x12a8, 0x9}, -/* #define CSEM_PORT0_END 443 */ -/* #define CSEM_PORT1_START 444 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x12cc, 0x9}, -/* #define CSEM_PORT1_END 445 */ -/* #define CSEM_FUNC0_START 446 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8c00, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1108, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1300, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3300, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6040, 0x30}, -/* #define CSEM_FUNC0_END 447 */ -/* #define CSEM_FUNC1_START 448 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8c20, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1110, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1318, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3308, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6100, 0x30}, -/* #define CSEM_FUNC1_END 449 */ -/* #define CSEM_FUNC2_START 450 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8c40, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1118, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1330, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3310, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x61c0, 0x30}, -/* #define CSEM_FUNC2_END 451 */ -/* #define CSEM_FUNC3_START 452 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8c60, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1120, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1348, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3318, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6280, 0x30}, -/* #define CSEM_FUNC3_END 453 */ -/* #define CSEM_FUNC4_START 454 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8c80, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1128, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1360, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3320, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6340, 0x30}, -/* #define CSEM_FUNC4_END 455 */ -/* #define CSEM_FUNC5_START 456 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8ca0, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1130, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1378, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3328, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6400, 0x30}, -/* #define CSEM_FUNC5_END 457 */ -/* #define CSEM_FUNC6_START 458 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8cc0, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1138, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1390, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3330, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x64c0, 0x30}, -/* #define CSEM_FUNC6_END 459 */ -/* #define CSEM_FUNC7_START 460 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x8ce0, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1140, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x13a8, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3338, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6580, 0x30}, -/* #define CSEM_FUNC7_END 461 */ -/* #define XPB_COMMON_START 462 */ - {OP_WR, GRCBASE_XPB + PB_REG_CONTROL, 0x28}, -/* #define XPB_COMMON_END 463 */ -/* #define DQ_COMMON_START 484 */ - {OP_WR, DORQ_REG_MODE_ACT, 0x2}, - {OP_WR, DORQ_REG_NORM_CID_OFST, 0x3}, - {OP_WR, DORQ_REG_OUTST_REQ, 0x4}, - {OP_WR, DORQ_REG_RSP_INIT_CRD, 0x2}, - {OP_WR, DORQ_REG_NORM_CMHEAD_TX, 0x90}, - {OP_WR, DORQ_REG_CMHEAD_RX, 0x90}, - {OP_WR, DORQ_REG_SHRT_CMHEAD, 0x800090}, - {OP_WR, DORQ_REG_ERR_CMHEAD, 0x8100000}, - {OP_WR, DORQ_REG_AGG_CMD0, 0x8a}, - {OP_WR, DORQ_REG_AGG_CMD1, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD2, 0x81}, - {OP_WR, DORQ_REG_AGG_CMD3, 0x80}, - {OP_WR, DORQ_REG_SHRT_ACT_CNT, 0x6}, - {OP_WR, DORQ_REG_DQ_FIFO_FULL_TH, 0x7d0}, - {OP_WR, DORQ_REG_DQ_FIFO_AFULL_TH, 0x76c}, - {OP_WR, DORQ_REG_REGN, 0x7c1004}, - {OP_WR, DORQ_REG_IF_EN, 0xf}, -/* #define DQ_COMMON_END 485 */ -/* #define TIMERS_COMMON_START 506 */ - {OP_ZR, TM_REG_CLIN_PRIOR0_CLIENT, 0x2}, - {OP_WR, TM_REG_LIN_SETCLR_FIFO_ALFULL_THR, 0x1c}, - {OP_WR, TM_REG_CFC_AC_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_CFC_CLD_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT0_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT1_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT2_VAL, 0x1}, - {OP_WR, TM_REG_EXP_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_PCIARB_CRDCNT_VAL, 0x2}, - {OP_WR_ASIC, TM_REG_TIMER_TICK_SIZE, 0x3d090}, - {OP_WR_EMUL, TM_REG_TIMER_TICK_SIZE, 0x9c}, - {OP_WR_FPGA, TM_REG_TIMER_TICK_SIZE, 0x9c4}, - {OP_WR, TM_REG_CL0_CONT_REGION, 0x8}, - {OP_WR, TM_REG_CL1_CONT_REGION, 0xc}, - {OP_WR, TM_REG_CL2_CONT_REGION, 0x10}, - {OP_WR, TM_REG_TM_CONTEXT_REGION, 0x20}, - {OP_WR, TM_REG_EN_TIMERS, 0x1}, - {OP_WR, TM_REG_EN_REAL_TIME_CNT, 0x1}, - {OP_WR, TM_REG_EN_CL0_INPUT, 0x1}, - {OP_WR, TM_REG_EN_CL1_INPUT, 0x1}, - {OP_WR, TM_REG_EN_CL2_INPUT, 0x1}, -/* #define TIMERS_COMMON_END 507 */ -/* #define TIMERS_PORT0_START 508 */ - {OP_WR, TM_REG_LIN0_LOGIC_ADDR, 0x0}, - {OP_WR, TM_REG_LIN0_PHY_ADDR_VALID, 0x0}, - {OP_ZR, TM_REG_LIN0_PHY_ADDR, 0x2}, -/* #define TIMERS_PORT0_END 509 */ -/* #define TIMERS_PORT1_START 510 */ - {OP_WR, TM_REG_LIN1_LOGIC_ADDR, 0x0}, - {OP_WR, TM_REG_LIN1_PHY_ADDR_VALID, 0x0}, - {OP_ZR, TM_REG_LIN1_PHY_ADDR, 0x2}, -/* #define TIMERS_PORT1_END 511 */ -/* #define XSDM_COMMON_START 528 */ - {OP_WR, XSDM_REG_CFC_RSP_START_ADDR, 0x1224}, - {OP_WR, XSDM_REG_CMP_COUNTER_START_ADDR, 0x1210}, - {OP_WR, XSDM_REG_Q_COUNTER_START_ADDR, 0x1214}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_0, 0x20}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_1, 0x20}, - {OP_ZR, XSDM_REG_AGG_INT_EVENT_2, 0x2}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_4, 0x23}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_5, 0x24}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_6, 0x25}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_7, 0x26}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_8, 0x27}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_9, 0x29}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_10, 0x2a}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_11, 0x2b}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_12, 0x2c}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_13, 0x2d}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_14, 0xec}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_15, 0x11}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_16, 0x12}, - {OP_ZR, XSDM_REG_AGG_INT_EVENT_17, 0xf}, - {OP_WR, XSDM_REG_AGG_INT_T_0, 0x1}, - {OP_WR, XSDM_REG_AGG_INT_T_1, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_T_2, 0xc}, - {OP_WR, XSDM_REG_AGG_INT_T_14, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_T_15, 0x31}, - {OP_WR, XSDM_REG_AGG_INT_MODE_0, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_MODE_1, 0xd}, - {OP_WR, XSDM_REG_AGG_INT_MODE_14, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_MODE_15, 0x11}, - {OP_WR, XSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, XSDM_REG_ENABLE_IN2, 0x3f}, - {OP_WR, XSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, XSDM_REG_ENABLE_OUT2, 0xf}, - {OP_RD, XSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR_ASIC, XSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, XSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, XSDM_REG_TIMER_TICK, 0xa}, -/* #define XSDM_COMMON_END 529 */ -/* #define QM_COMMON_START 550 */ - {OP_WR, QM_REG_ACTCTRINITVAL_0, 0x6}, - {OP_WR, QM_REG_ACTCTRINITVAL_1, 0x5}, - {OP_WR, QM_REG_ACTCTRINITVAL_2, 0xa}, - {OP_WR, QM_REG_ACTCTRINITVAL_3, 0x5}, - {OP_WR, QM_REG_PCIREQAT, 0x2}, - {OP_WR, QM_REG_CMINITCRD_0, 0x4}, - {OP_WR, QM_REG_CMINITCRD_1, 0x4}, - {OP_WR, QM_REG_CMINITCRD_2, 0x4}, - {OP_WR, QM_REG_CMINITCRD_3, 0x4}, - {OP_WR, QM_REG_CMINITCRD_4, 0x4}, - {OP_WR, QM_REG_CMINITCRD_5, 0x4}, - {OP_WR, QM_REG_CMINITCRD_6, 0x4}, - {OP_WR, QM_REG_CMINITCRD_7, 0x4}, - {OP_WR, QM_REG_OUTLDREQ, 0x4}, - {OP_WR, QM_REG_CTXREG_0, 0x7c}, - {OP_WR, QM_REG_CTXREG_1, 0x3d}, - {OP_WR, QM_REG_CTXREG_2, 0x3f}, - {OP_WR, QM_REG_CTXREG_3, 0x9c}, - {OP_WR, QM_REG_ENSEC, 0x7}, - {OP_ZR, QM_REG_QVOQIDX_0, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_0, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_5, 0x0}, - {OP_WR, QM_REG_QVOQIDX_6, 0x4}, - {OP_WR, QM_REG_QVOQIDX_7, 0x4}, - {OP_WR, QM_REG_QVOQIDX_8, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_1, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_9, 0x5}, - {OP_WR, QM_REG_QVOQIDX_10, 0x5}, - {OP_WR, QM_REG_QVOQIDX_11, 0x5}, - {OP_WR, QM_REG_QVOQIDX_12, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_2, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_13, 0x8}, - {OP_WR, QM_REG_QVOQIDX_14, 0x6}, - {OP_WR, QM_REG_QVOQIDX_15, 0x7}, - {OP_WR, QM_REG_QVOQIDX_16, 0x0}, - {OP_WR, QM_REG_WRRWEIGHTS_3, 0x1010120}, - {OP_ZR, QM_REG_QVOQIDX_17, 0x4}, - {OP_WR, QM_REG_WRRWEIGHTS_4, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_21, 0x0}, - {OP_WR, QM_REG_QVOQIDX_22, 0x4}, - {OP_WR, QM_REG_QVOQIDX_23, 0x4}, - {OP_WR, QM_REG_QVOQIDX_24, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_5, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_25, 0x5}, - {OP_WR, QM_REG_QVOQIDX_26, 0x5}, - {OP_WR, QM_REG_QVOQIDX_27, 0x5}, - {OP_WR, QM_REG_QVOQIDX_28, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_6, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_29, 0x8}, - {OP_WR, QM_REG_QVOQIDX_30, 0x6}, - {OP_WR, QM_REG_QVOQIDX_31, 0x7}, - {OP_WR, QM_REG_QVOQIDX_32, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_7, 0x1010120}, - {OP_WR, QM_REG_QVOQIDX_33, 0x1}, - {OP_WR, QM_REG_QVOQIDX_34, 0x1}, - {OP_WR, QM_REG_QVOQIDX_35, 0x1}, - {OP_WR, QM_REG_QVOQIDX_36, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_8, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_37, 0x1}, - {OP_WR, QM_REG_QVOQIDX_38, 0x4}, - {OP_WR, QM_REG_QVOQIDX_39, 0x4}, - {OP_WR, QM_REG_QVOQIDX_40, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_9, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_41, 0x5}, - {OP_WR, QM_REG_QVOQIDX_42, 0x5}, - {OP_WR, QM_REG_QVOQIDX_43, 0x5}, - {OP_WR, QM_REG_QVOQIDX_44, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_10, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_45, 0x8}, - {OP_WR, QM_REG_QVOQIDX_46, 0x6}, - {OP_WR, QM_REG_QVOQIDX_47, 0x7}, - {OP_WR, QM_REG_QVOQIDX_48, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_11, 0x1010120}, - {OP_WR, QM_REG_QVOQIDX_49, 0x1}, - {OP_WR, QM_REG_QVOQIDX_50, 0x1}, - {OP_WR, QM_REG_QVOQIDX_51, 0x1}, - {OP_WR, QM_REG_QVOQIDX_52, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_12, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_53, 0x1}, - {OP_WR, QM_REG_QVOQIDX_54, 0x4}, - {OP_WR, QM_REG_QVOQIDX_55, 0x4}, - {OP_WR, QM_REG_QVOQIDX_56, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_13, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_57, 0x5}, - {OP_WR, QM_REG_QVOQIDX_58, 0x5}, - {OP_WR, QM_REG_QVOQIDX_59, 0x5}, - {OP_WR, QM_REG_QVOQIDX_60, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_14, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_61, 0x8}, - {OP_WR, QM_REG_QVOQIDX_62, 0x6}, - {OP_WR, QM_REG_QVOQIDX_63, 0x7}, - {OP_WR, QM_REG_QVOQIDX_64, 0x0}, - {OP_WR, QM_REG_WRRWEIGHTS_15, 0x1010120}, - {OP_ZR, QM_REG_QVOQIDX_65, 0x4}, - {OP_WR, QM_REG_WRRWEIGHTS_16, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_69, 0x0}, - {OP_WR, QM_REG_QVOQIDX_70, 0x4}, - {OP_WR, QM_REG_QVOQIDX_71, 0x4}, - {OP_WR, QM_REG_QVOQIDX_72, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_17, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_73, 0x5}, - {OP_WR, QM_REG_QVOQIDX_74, 0x5}, - {OP_WR, QM_REG_QVOQIDX_75, 0x5}, - {OP_WR, QM_REG_QVOQIDX_76, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_18, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_77, 0x8}, - {OP_WR, QM_REG_QVOQIDX_78, 0x6}, - {OP_WR, QM_REG_QVOQIDX_79, 0x7}, - {OP_WR, QM_REG_QVOQIDX_80, 0x0}, - {OP_WR, QM_REG_WRRWEIGHTS_19, 0x1010120}, - {OP_ZR, QM_REG_QVOQIDX_81, 0x4}, - {OP_WR, QM_REG_WRRWEIGHTS_20, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_85, 0x0}, - {OP_WR, QM_REG_QVOQIDX_86, 0x4}, - {OP_WR, QM_REG_QVOQIDX_87, 0x4}, - {OP_WR, QM_REG_QVOQIDX_88, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_21, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_89, 0x5}, - {OP_WR, QM_REG_QVOQIDX_90, 0x5}, - {OP_WR, QM_REG_QVOQIDX_91, 0x5}, - {OP_WR, QM_REG_QVOQIDX_92, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_22, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_93, 0x8}, - {OP_WR, QM_REG_QVOQIDX_94, 0x6}, - {OP_WR, QM_REG_QVOQIDX_95, 0x7}, - {OP_WR, QM_REG_QVOQIDX_96, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_23, 0x1010120}, - {OP_WR, QM_REG_QVOQIDX_97, 0x1}, - {OP_WR, QM_REG_QVOQIDX_98, 0x1}, - {OP_WR, QM_REG_QVOQIDX_99, 0x1}, - {OP_WR, QM_REG_QVOQIDX_100, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_24, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_101, 0x1}, - {OP_WR, QM_REG_QVOQIDX_102, 0x4}, - {OP_WR, QM_REG_QVOQIDX_103, 0x4}, - {OP_WR, QM_REG_QVOQIDX_104, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_25, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_105, 0x5}, - {OP_WR, QM_REG_QVOQIDX_106, 0x5}, - {OP_WR, QM_REG_QVOQIDX_107, 0x5}, - {OP_WR, QM_REG_QVOQIDX_108, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_26, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_109, 0x8}, - {OP_WR, QM_REG_QVOQIDX_110, 0x6}, - {OP_WR, QM_REG_QVOQIDX_111, 0x7}, - {OP_WR, QM_REG_QVOQIDX_112, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_27, 0x1010120}, - {OP_WR, QM_REG_QVOQIDX_113, 0x1}, - {OP_WR, QM_REG_QVOQIDX_114, 0x1}, - {OP_WR, QM_REG_QVOQIDX_115, 0x1}, - {OP_WR, QM_REG_QVOQIDX_116, 0x1}, - {OP_WR, QM_REG_WRRWEIGHTS_28, 0x1010101}, - {OP_WR, QM_REG_QVOQIDX_117, 0x1}, - {OP_WR, QM_REG_QVOQIDX_118, 0x4}, - {OP_WR, QM_REG_QVOQIDX_119, 0x4}, - {OP_WR, QM_REG_QVOQIDX_120, 0x2}, - {OP_WR, QM_REG_WRRWEIGHTS_29, 0x8012004}, - {OP_WR, QM_REG_QVOQIDX_121, 0x5}, - {OP_WR, QM_REG_QVOQIDX_122, 0x5}, - {OP_WR, QM_REG_QVOQIDX_123, 0x5}, - {OP_WR, QM_REG_QVOQIDX_124, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_30, 0x20081001}, - {OP_WR, QM_REG_QVOQIDX_125, 0x8}, - {OP_WR, QM_REG_QVOQIDX_126, 0x6}, - {OP_WR, QM_REG_QVOQIDX_127, 0x7}, - {OP_WR, QM_REG_WRRWEIGHTS_31, 0x1010120}, - {OP_WR, QM_REG_VOQQMASK_0_LSB, 0x3f003f}, - {OP_WR, QM_REG_VOQQMASK_0_MSB, 0x0}, - {OP_WR, QM_REG_VOQQMASK_0_LSB_EXT_A, 0x3f003f}, - {OP_WR, QM_REG_VOQQMASK_0_MSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_1_LSB, 0x0}, - {OP_WR, QM_REG_VOQQMASK_1_MSB, 0x3f003f}, - {OP_WR, QM_REG_VOQQMASK_1_LSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_1_MSB_EXT_A, 0x3f003f}, - {OP_WR, QM_REG_VOQQMASK_2_LSB, 0x1000100}, - {OP_WR, QM_REG_VOQQMASK_2_MSB, 0x1000100}, - {OP_WR, QM_REG_VOQQMASK_2_LSB_EXT_A, 0x1000100}, - {OP_WR, QM_REG_VOQQMASK_2_MSB_EXT_A, 0x1000100}, - {OP_ZR, QM_REG_VOQQMASK_3_LSB, 0x2}, - {OP_WR, QM_REG_VOQQMASK_3_LSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_3_MSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_4_LSB, 0xc000c0}, - {OP_WR, QM_REG_VOQQMASK_4_MSB, 0xc000c0}, - {OP_WR, QM_REG_VOQQMASK_4_LSB_EXT_A, 0xc000c0}, - {OP_WR, QM_REG_VOQQMASK_4_MSB_EXT_A, 0xc000c0}, - {OP_WR, QM_REG_VOQQMASK_5_LSB, 0x1e001e00}, - {OP_WR, QM_REG_VOQQMASK_5_MSB, 0x1e001e00}, - {OP_WR, QM_REG_VOQQMASK_5_LSB_EXT_A, 0x1e001e00}, - {OP_WR, QM_REG_VOQQMASK_5_MSB_EXT_A, 0x1e001e00}, - {OP_WR, QM_REG_VOQQMASK_6_LSB, 0x40004000}, - {OP_WR, QM_REG_VOQQMASK_6_MSB, 0x40004000}, - {OP_WR, QM_REG_VOQQMASK_6_LSB_EXT_A, 0x40004000}, - {OP_WR, QM_REG_VOQQMASK_6_MSB_EXT_A, 0x40004000}, - {OP_WR, QM_REG_VOQQMASK_7_LSB, 0x80008000}, - {OP_WR, QM_REG_VOQQMASK_7_MSB, 0x80008000}, - {OP_WR, QM_REG_VOQQMASK_7_LSB_EXT_A, 0x80008000}, - {OP_WR, QM_REG_VOQQMASK_7_MSB_EXT_A, 0x80008000}, - {OP_WR, QM_REG_VOQQMASK_8_LSB, 0x20002000}, - {OP_WR, QM_REG_VOQQMASK_8_MSB, 0x20002000}, - {OP_WR, QM_REG_VOQQMASK_8_LSB_EXT_A, 0x20002000}, - {OP_WR, QM_REG_VOQQMASK_8_MSB_EXT_A, 0x20002000}, - {OP_ZR, QM_REG_VOQQMASK_9_LSB, 0x2}, - {OP_WR, QM_REG_VOQQMASK_9_LSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_9_MSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_10_LSB, 0x0}, - {OP_WR, QM_REG_VOQQMASK_10_MSB, 0x0}, - {OP_WR, QM_REG_VOQQMASK_10_LSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_10_MSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_11_LSB, 0x0}, - {OP_WR, QM_REG_VOQQMASK_11_MSB, 0x0}, - {OP_WR, QM_REG_VOQQMASK_11_LSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQQMASK_11_MSB_EXT_A, 0x0}, - {OP_WR, QM_REG_VOQPORT_0, 0x0}, - {OP_WR, QM_REG_VOQPORT_1, 0x1}, - {OP_ZR, QM_REG_VOQPORT_2, 0xa}, - {OP_WR, QM_REG_CMINTVOQMASK_0, 0xc08}, - {OP_WR, QM_REG_CMINTVOQMASK_1, 0x40}, - {OP_WR, QM_REG_CMINTVOQMASK_2, 0x100}, - {OP_WR, QM_REG_CMINTVOQMASK_3, 0x20}, - {OP_WR, QM_REG_CMINTVOQMASK_4, 0x17}, - {OP_WR, QM_REG_CMINTVOQMASK_5, 0x80}, - {OP_WR, QM_REG_CMINTVOQMASK_6, 0x200}, - {OP_WR, QM_REG_CMINTVOQMASK_7, 0x0}, - {OP_WR, QM_REG_HWAEMPTYMASK_LSB, 0x1ff01ff}, - {OP_WR, QM_REG_HWAEMPTYMASK_MSB, 0x1ff01ff}, - {OP_WR, QM_REG_HWAEMPTYMASK_LSB_EXT_A, 0x1ff01ff}, - {OP_WR, QM_REG_HWAEMPTYMASK_MSB_EXT_A, 0x1ff01ff}, - {OP_WR, QM_REG_ENBYPVOQMASK, 0x13}, - {OP_WR, QM_REG_VOQCREDITAFULLTHR, 0x13f}, - {OP_WR, QM_REG_VOQINITCREDIT_0, 0x140}, - {OP_WR, QM_REG_VOQINITCREDIT_1, 0x140}, - {OP_ZR, QM_REG_VOQINITCREDIT_2, 0x2}, - {OP_WR, QM_REG_VOQINITCREDIT_4, 0xc0}, - {OP_ZR, QM_REG_VOQINITCREDIT_5, 0x7}, - {OP_WR, QM_REG_TASKCRDCOST_0, 0x48}, - {OP_WR, QM_REG_TASKCRDCOST_1, 0x48}, - {OP_ZR, QM_REG_TASKCRDCOST_2, 0x2}, - {OP_WR, QM_REG_TASKCRDCOST_4, 0x48}, - {OP_ZR, QM_REG_TASKCRDCOST_5, 0x7}, - {OP_WR, QM_REG_BYTECRDINITVAL, 0x8000}, - {OP_WR, QM_REG_BYTECRDCOST, 0x25e4}, - {OP_WR, QM_REG_BYTECREDITAFULLTHR, 0x7fff}, - {OP_WR, QM_REG_ENBYTECRD_LSB, 0xf000f}, - {OP_WR, QM_REG_ENBYTECRD_MSB, 0xf000f}, - {OP_WR, QM_REG_ENBYTECRD_LSB_EXT_A, 0xf000f}, - {OP_WR, QM_REG_ENBYTECRD_MSB_EXT_A, 0xf000f}, - {OP_WR, QM_REG_BYTECRDPORT_LSB, 0x0}, - {OP_WR, QM_REG_BYTECRDPORT_MSB, 0xffffffff}, - {OP_WR, QM_REG_BYTECRDPORT_LSB_EXT_A, 0x0}, - {OP_WR, QM_REG_BYTECRDPORT_MSB_EXT_A, 0xffffffff}, - {OP_WR, QM_REG_PQ2PCIFUNC_0, 0x0}, - {OP_WR, QM_REG_PQ2PCIFUNC_1, 0x2}, - {OP_WR, QM_REG_PQ2PCIFUNC_2, 0x1}, - {OP_WR, QM_REG_PQ2PCIFUNC_3, 0x3}, - {OP_WR, QM_REG_PQ2PCIFUNC_4, 0x4}, - {OP_WR, QM_REG_PQ2PCIFUNC_5, 0x6}, - {OP_WR, QM_REG_PQ2PCIFUNC_6, 0x5}, - {OP_WR, QM_REG_PQ2PCIFUNC_7, 0x7}, - {OP_WR, QM_REG_CMINTEN, 0xff}, -/* #define QM_COMMON_END 551 */ -/* #define PBF_COMMON_START 572 */ - {OP_WR, PBF_REG_INIT, 0x1}, - {OP_WR, PBF_REG_INIT_P4, 0x1}, - {OP_WR, PBF_REG_MAC_LB_ENABLE, 0x1}, - {OP_WR, PBF_REG_IF_ENABLE_REG, 0x7fff}, - {OP_WR, PBF_REG_INIT_P4, 0x0}, - {OP_WR, PBF_REG_INIT, 0x0}, - {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P4, 0x0}, -/* #define PBF_COMMON_END 573 */ -/* #define PBF_PORT0_START 574 */ - {OP_WR, PBF_REG_INIT_P0, 0x1}, - {OP_WR, PBF_REG_MAC_IF0_ENABLE, 0x1}, - {OP_WR, PBF_REG_INIT_P0, 0x0}, - {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P0, 0x0}, -/* #define PBF_PORT0_END 575 */ -/* #define PBF_PORT1_START 576 */ - {OP_WR, PBF_REG_INIT_P1, 0x1}, - {OP_WR, PBF_REG_MAC_IF1_ENABLE, 0x1}, - {OP_WR, PBF_REG_INIT_P1, 0x0}, - {OP_WR, PBF_REG_DISABLE_NEW_TASK_PROC_P1, 0x0}, -/* #define PBF_PORT1_END 577 */ -/* #define XCM_COMMON_START 594 */ - {OP_ZR, XCM_REG_AG_CTX, 0x2000}, - {OP_WR, XCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, XCM_REG_XQM_XCM_HDR_P, 0x3150020}, - {OP_WR, XCM_REG_XQM_XCM_HDR_S, 0x3150020}, - {OP_WR, XCM_REG_TM_XCM_HDR, 0x1000030}, - {OP_WR, XCM_REG_ERR_XCM_HDR, 0x8100000}, - {OP_WR, XCM_REG_ERR_EVNT_ID, 0x33}, - {OP_WR, XCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, XCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, XCM_REG_STORM_WEIGHT, 0x3}, - {OP_WR, XCM_REG_TSEM_WEIGHT, 0x6}, - {OP_WR, XCM_REG_CSEM_WEIGHT, 0x3}, - {OP_WR, XCM_REG_USEM_WEIGHT, 0x3}, - {OP_WR, XCM_REG_DORQ_WEIGHT, 0x2}, - {OP_WR, XCM_REG_PBF_WEIGHT, 0x0}, - {OP_WR, XCM_REG_NIG0_WEIGHT, 0x2}, - {OP_WR, XCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, XCM_REG_XSDM_WEIGHT, 0x6}, - {OP_WR, XCM_REG_XQM_P_WEIGHT, 0x4}, - {OP_WR, XCM_REG_XQM_S_WEIGHT, 0x2}, - {OP_WR, XCM_REG_TM_WEIGHT, 0x2}, - {OP_WR, XCM_REG_XCM_XQM_USE_Q, 0x1}, - {OP_WR, XCM_REG_XQM_BYP_ACT_UPD, 0x6}, - {OP_WR, XCM_REG_UNA_GT_NXT_Q, 0x0}, - {OP_WR, XCM_REG_AUX1_Q, 0x2}, - {OP_WR, XCM_REG_AUX_CNT_FLG_Q_19, 0x1}, - {OP_WR, XCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, XCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, XCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, XCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, XCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, XCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, XCM_REG_TM_INIT_CRD, 0x4}, - {OP_WR, XCM_REG_XQM_INIT_CRD, 0x20}, - {OP_WR, XCM_REG_XX_INIT_CRD, 0x2}, - {OP_WR, XCM_REG_XX_MSG_NUM, 0x20}, - {OP_ZR, XCM_REG_XX_TABLE, 0x12}, - {OP_SW, XCM_REG_XX_DESCR_TABLE, 0x2004ae}, - {OP_WR, XCM_REG_N_SM_CTX_LD_0, 0xf}, - {OP_WR, XCM_REG_N_SM_CTX_LD_1, 0x7}, - {OP_WR, XCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, XCM_REG_N_SM_CTX_LD_3, 0xe}, - {OP_WR, XCM_REG_N_SM_CTX_LD_4, 0xe}, - {OP_ZR, XCM_REG_N_SM_CTX_LD_5, 0x3}, - {OP_WR, XCM_REG_XCM_REG0_SZ, 0x4}, - {OP_WR, XCM_REG_XCM_STORM0_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_STORM1_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_XQM_IFEN, 0x1}, - {OP_WR, XCM_REG_STORM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XQM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XSDM_IFEN, 0x1}, - {OP_WR, XCM_REG_TM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_TM_IFEN, 0x1}, - {OP_WR, XCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, XCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, XCM_REG_USEM_IFEN, 0x1}, - {OP_WR, XCM_REG_DORQ_IFEN, 0x1}, - {OP_WR, XCM_REG_PBF_IFEN, 0x1}, - {OP_WR, XCM_REG_NIG0_IFEN, 0x1}, - {OP_WR, XCM_REG_NIG1_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_CFC_IFEN, 0x1}, -/* #define XCM_COMMON_END 595 */ -/* #define XCM_FUNC0_START 600 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define XCM_FUNC0_END 601 */ -/* #define XCM_FUNC1_START 602 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_1, 0x0}, -/* #define XCM_FUNC1_END 603 */ -/* #define XCM_FUNC2_START 604 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define XCM_FUNC2_END 605 */ -/* #define XCM_FUNC3_START 606 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_1, 0x0}, -/* #define XCM_FUNC3_END 607 */ -/* #define XCM_FUNC4_START 608 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define XCM_FUNC4_END 609 */ -/* #define XCM_FUNC5_START 610 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_1, 0x0}, -/* #define XCM_FUNC5_END 611 */ -/* #define XCM_FUNC6_START 612 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define XCM_FUNC6_END 613 */ -/* #define XCM_FUNC7_START 614 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_1, 0x0}, -/* #define XCM_FUNC7_END 615 */ -/* #define XSEM_COMMON_START 616 */ - {OP_ZP, XSEM_REG_INT_TABLE, 0xa40000}, - {OP_WR_64, XSEM_REG_INT_TABLE + 0x3b8, 0x904ce}, - {OP_ZP, XSEM_REG_PRAM, 0x345c0000}, - {OP_ZP, XSEM_REG_PRAM + 0x8000, 0x38050d18}, - {OP_ZP, XSEM_REG_PRAM + 0x10000, 0x384f1b1a}, - {OP_ZP, XSEM_REG_PRAM + 0x18000, 0x3796292e}, - {OP_ZP, XSEM_REG_PRAM + 0x20000, 0x28793714}, - {OP_WR_64, XSEM_REG_PRAM + 0x26eb0, 0x322a04d0}, - {OP_RD, XSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, XSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, XSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, XSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, XSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, XSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, XSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, XSEM_REG_TS_0_AS, 0x0}, - {OP_WR, XSEM_REG_TS_1_AS, 0x1}, - {OP_WR, XSEM_REG_TS_2_AS, 0x4}, - {OP_WR, XSEM_REG_TS_3_AS, 0x0}, - {OP_WR, XSEM_REG_TS_4_AS, 0x1}, - {OP_WR, XSEM_REG_TS_5_AS, 0x3}, - {OP_WR, XSEM_REG_TS_6_AS, 0x0}, - {OP_WR, XSEM_REG_TS_7_AS, 0x1}, - {OP_WR, XSEM_REG_TS_8_AS, 0x4}, - {OP_WR, XSEM_REG_TS_9_AS, 0x0}, - {OP_WR, XSEM_REG_TS_10_AS, 0x1}, - {OP_WR, XSEM_REG_TS_11_AS, 0x3}, - {OP_WR, XSEM_REG_TS_12_AS, 0x0}, - {OP_WR, XSEM_REG_TS_13_AS, 0x1}, - {OP_WR, XSEM_REG_TS_14_AS, 0x4}, - {OP_WR, XSEM_REG_TS_15_AS, 0x0}, - {OP_WR, XSEM_REG_TS_16_AS, 0x4}, - {OP_WR, XSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, XSEM_REG_TS_18_AS, 0x2}, - {OP_WR, XSEM_REG_ENABLE_IN, 0x3fff}, - {OP_WR, XSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, XSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, XSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, XSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, XSEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, XSEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18000, 0x0}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18040, 0x18}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18080, 0xc}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x180c0, 0x66}, - {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18300, 0x7a120}, - {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18300, 0x138}, - {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18300, 0x1388}, - {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18340, 0x1f4}, - {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18340, 0x5}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18380, 0x7a120}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x183c0, 0x1f4}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x11480, 0x1}, - {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x11480, 0x0}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9a38, 0x4}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9a38 + 0x10, 0x204d2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9a38 + 0x18, 0x6}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9080, 0x48}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x91a8, 0x86}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9000, 0x20}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x93c8, 0x3}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x93c8 + 0xc, 0x504d4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9ce8, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xa000, 0x230}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9c98, 0x104d9}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9c98 + 0x4, 0x11}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0xc0c0, 0x1004da}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3000, 0x204ea}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3000 + 0x8, 0x100}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x4040, 0x10}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x4000, 0x1004ec}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x8408, 0x804fc}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9ce0, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xb000, 0x50}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xbb70, 0x70}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xb150, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xbb60, 0x4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xd000, 0x800}, -/* #define XSEM_COMMON_END 617 */ -/* #define XSEM_PORT0_START 618 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x93e8, 0x32}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5020, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5030, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5000, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5010, 0x2}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x5208, 0x1}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9a68, 0x20504}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9578, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9578 + 0x88, 0x10506}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9578 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x96a8, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x96a8 + 0x88, 0x10507}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x96a8 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x97d8, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x97d8 + 0x88, 0x10508}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x97d8 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9908, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9908 + 0x88, 0x10509}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9908 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xb140, 0x2}, -/* #define XSEM_PORT0_END 619 */ -/* #define XSEM_PORT1_START 620 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x94b0, 0x32}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5028, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5038, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5008, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5018, 0x2}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x520c, 0x1}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9a70, 0x2050a}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9610, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9610 + 0x88, 0x1050c}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9610 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9740, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9740 + 0x88, 0x1050d}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9740 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9870, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9870 + 0x88, 0x1050e}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9870 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x99a0, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x99a0 + 0x88, 0x1050f}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x99a0 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xb148, 0x2}, -/* #define XSEM_PORT1_END 621 */ -/* #define XSEM_FUNC0_START 622 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc000, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9a78, 0x100510}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5048, 0xe}, -/* #define XSEM_FUNC0_END 623 */ -/* #define XSEM_FUNC1_START 624 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc008, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9ab8, 0x100520}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5080, 0xe}, -/* #define XSEM_FUNC1_END 625 */ -/* #define XSEM_FUNC2_START 626 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc010, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9af8, 0x100530}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x50b8, 0xe}, -/* #define XSEM_FUNC2_END 627 */ -/* #define XSEM_FUNC3_START 628 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc018, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9b38, 0x100540}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x50f0, 0xe}, -/* #define XSEM_FUNC3_END 629 */ -/* #define XSEM_FUNC4_START 630 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc020, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9b78, 0x100550}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5128, 0xe}, -/* #define XSEM_FUNC4_END 631 */ -/* #define XSEM_FUNC5_START 632 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc028, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9bb8, 0x100560}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5160, 0xe}, -/* #define XSEM_FUNC5_END 633 */ -/* #define XSEM_FUNC6_START 634 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc030, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9bf8, 0x100570}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5198, 0xe}, -/* #define XSEM_FUNC6_END 635 */ -/* #define XSEM_FUNC7_START 636 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc038, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9c38, 0x100580}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x51d0, 0xe}, -/* #define XSEM_FUNC7_END 637 */ -/* #define CDU_COMMON_START 638 */ - {OP_WR, CDU_REG_CDU_CONTROL0, 0x1}, - {OP_WR, CDU_REG_MF_MODE, 0x1}, - {OP_WR, CDU_REG_CDU_CHK_MASK0, 0x3d000}, - {OP_WR, CDU_REG_CDU_CHK_MASK1, 0x3d}, - {OP_WB, CDU_REG_L1TT, 0x2000590}, - {OP_WB, CDU_REG_MATT, 0x100790}, - {OP_ZR, CDU_REG_MATT + 0x40, 0x8}, - {OP_WB, CDU_REG_MATT + 0x60, 0x1007a0}, - {OP_ZR, CDU_REG_MATT + 0xa0, 0x18}, -/* #define CDU_COMMON_END 639 */ -/* #define DMAE_COMMON_START 660 */ - {OP_ZR, DMAE_REG_CMD_MEM, 0xe0}, - {OP_WR, DMAE_REG_CRC16C_INIT, 0x0}, - {OP_WR, DMAE_REG_CRC16T10_INIT, 0x1}, - {OP_WR, DMAE_REG_PXP_REQ_INIT_CRD, 0x2}, - {OP_WR, DMAE_REG_PCI_IFEN, 0x1}, - {OP_WR, DMAE_REG_GRC_IFEN, 0x1}, -/* #define DMAE_COMMON_END 661 */ -/* #define PXP_COMMON_START 682 */ - {OP_WB, PXP_REG_HST_INBOUND_INT + 0x400, 0x507b0}, - {OP_WB, PXP_REG_HST_INBOUND_INT, 0x507b5}, - {OP_WB, PXP_REG_HST_INBOUND_INT + 0x20, 0x507ba}, -/* #define PXP_COMMON_END 683 */ -/* #define CFC_COMMON_START 704 */ - {OP_ZR, CFC_REG_LINK_LIST, 0x100}, - {OP_WR, CFC_REG_CONTROL0, 0x10}, - {OP_WR, CFC_REG_DISABLE_ON_ERROR, 0x3fff}, - {OP_WR, CFC_REG_INTERFACES, 0x280000}, - {OP_WR, CFC_REG_LCREQ_WEIGHTS, 0x84924a}, - {OP_WR, CFC_REG_INTERFACES, 0x0}, -/* #define CFC_COMMON_END 705 */ -/* #define HC_FUNC0_START 732 */ - {OP_WR, HC_REG_CONFIG_0, 0x1080}, - {OP_WR, HC_REG_FUNC_NUM_P0, 0x0}, - {OP_WR, HC_REG_ATTN_NUM_P0, 0x10}, - {OP_WR, HC_REG_ATTN_IDX, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT, 0x2}, - {OP_WR, HC_REG_VQID_0, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_0, 0x0}, - {OP_ZR, HC_REG_P0_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND, 0x2}, - {OP_WR, HC_REG_CONFIG_0, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a}, -/* #define HC_FUNC0_END 733 */ -/* #define HC_FUNC1_START 734 */ - {OP_WR, HC_REG_CONFIG_1, 0x1080}, - {OP_WR, HC_REG_FUNC_NUM_P1, 0x1}, - {OP_WR, HC_REG_ATTN_NUM_P1, 0x10}, - {OP_WR, HC_REG_ATTN_IDX + 0x4, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT + 0x8, 0x2}, - {OP_WR, HC_REG_VQID_1, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_1, 0x0}, - {OP_ZR, HC_REG_P1_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK + 0x4, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND + 0x8, 0x2}, - {OP_WR, HC_REG_CONFIG_1, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a}, -/* #define HC_FUNC1_END 735 */ -/* #define HC_FUNC2_START 736 */ - {OP_WR, HC_REG_CONFIG_0, 0x1080}, - {OP_WR, HC_REG_FUNC_NUM_P0, 0x2}, - {OP_WR, HC_REG_ATTN_NUM_P0, 0x10}, - {OP_WR, HC_REG_ATTN_IDX, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT, 0x2}, - {OP_WR, HC_REG_VQID_0, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_0, 0x0}, - {OP_ZR, HC_REG_P0_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND, 0x2}, - {OP_WR, HC_REG_CONFIG_0, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a}, -/* #define HC_FUNC2_END 737 */ -/* #define HC_FUNC3_START 738 */ - {OP_WR, HC_REG_CONFIG_1, 0x1080}, - {OP_WR, HC_REG_FUNC_NUM_P1, 0x3}, - {OP_WR, HC_REG_ATTN_NUM_P1, 0x10}, - {OP_WR, HC_REG_ATTN_IDX + 0x4, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT + 0x8, 0x2}, - {OP_WR, HC_REG_VQID_1, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_1, 0x0}, - {OP_ZR, HC_REG_P1_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK + 0x4, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND + 0x8, 0x2}, - {OP_WR, HC_REG_CONFIG_1, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a}, -/* #define HC_FUNC3_END 739 */ -/* #define HC_FUNC4_START 740 */ - {OP_WR, HC_REG_CONFIG_0, 0x1080}, - {OP_WR, HC_REG_FUNC_NUM_P0, 0x4}, - {OP_WR, HC_REG_ATTN_NUM_P0, 0x10}, - {OP_WR, HC_REG_ATTN_IDX, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT, 0x2}, - {OP_WR, HC_REG_VQID_0, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_0, 0x0}, - {OP_ZR, HC_REG_P0_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND, 0x2}, - {OP_WR, HC_REG_CONFIG_0, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a}, -/* #define HC_FUNC4_END 741 */ -/* #define HC_FUNC5_START 742 */ - {OP_WR, HC_REG_CONFIG_1, 0x1080}, - {OP_WR, HC_REG_FUNC_NUM_P1, 0x5}, - {OP_WR, HC_REG_ATTN_NUM_P1, 0x10}, - {OP_WR, HC_REG_ATTN_IDX + 0x4, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT + 0x8, 0x2}, - {OP_WR, HC_REG_VQID_1, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_1, 0x0}, - {OP_ZR, HC_REG_P1_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK + 0x4, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND + 0x8, 0x2}, - {OP_WR, HC_REG_CONFIG_1, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a}, -/* #define HC_FUNC5_END 743 */ -/* #define HC_FUNC6_START 744 */ - {OP_WR, HC_REG_CONFIG_0, 0x1080}, - {OP_WR, HC_REG_FUNC_NUM_P0, 0x6}, - {OP_WR, HC_REG_ATTN_NUM_P0, 0x10}, - {OP_WR, HC_REG_ATTN_IDX, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT, 0x2}, - {OP_WR, HC_REG_VQID_0, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_0, 0x0}, - {OP_ZR, HC_REG_P0_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND, 0x2}, - {OP_WR, HC_REG_CONFIG_0, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x120, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x370, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x5c0, 0x4a}, -/* #define HC_FUNC6_END 745 */ -/* #define HC_FUNC7_START 746 */ - {OP_WR, HC_REG_CONFIG_1, 0x1080}, - {OP_WR, HC_REG_FUNC_NUM_P1, 0x7}, - {OP_WR, HC_REG_ATTN_NUM_P1, 0x10}, - {OP_WR, HC_REG_ATTN_IDX + 0x4, 0x0}, - {OP_ZR, HC_REG_ATTN_BIT + 0x8, 0x2}, - {OP_WR, HC_REG_VQID_1, 0x2b5}, - {OP_WR, HC_REG_PCI_CONFIG_1, 0x0}, - {OP_ZR, HC_REG_P1_PROD_CONS, 0x4a}, - {OP_WR, HC_REG_INT_MASK + 0x4, 0x1ffff}, - {OP_ZR, HC_REG_PBA_COMMAND + 0x8, 0x2}, - {OP_WR, HC_REG_CONFIG_1, 0x1a80}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x90, 0x24}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x248, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x498, 0x4a}, - {OP_ZR, HC_REG_STATISTIC_COUNTERS + 0x6e8, 0x4a}, -/* #define HC_FUNC7_END 747 */ -/* #define PXP2_COMMON_START 748 */ - {OP_WR, PXP2_REG_RQ_DRAM_ALIGN, 0x1}, - {OP_WR, PXP2_REG_PGL_CONTROL0, 0xe38340}, - {OP_WR, PXP2_REG_PGL_CONTROL1, 0x3c10}, - {OP_WR, PXP2_REG_RQ_ELT_DISABLE, 0x1}, - {OP_WR, PXP2_REG_WR_REV_MODE, 0x0}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_0, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_0, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_0, 0xff809000}, - {OP_WR, PXP2_REG_PGL_INT_USDM_0, 0xf0005000}, - {OP_WR, PXP2_REG_PGL_INT_USDM_1, 0xf0001000}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ6, 0x8}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ9, 0x8}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ10, 0x8}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ11, 0x2}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ17, 0x4}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ18, 0x5}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ19, 0x4}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ22, 0x0}, - {OP_WR, PXP2_REG_RD_START_INIT, 0x1}, - {OP_WR, PXP2_REG_WR_DMAE_TH, 0x3f}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD0, 0x40}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD1, 0x1808}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD2, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD3, 0x803}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD4, 0x40}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD5, 0x3}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD6, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD7, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD8, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD9, 0x10003}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD10, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD11, 0x803}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD12, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD13, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD14, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD15, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD16, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD17, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD18, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD19, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD20, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD22, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD23, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD24, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD25, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD26, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD27, 0x3}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD28, 0x2403}, - {OP_WR, PXP2_REG_RQ_BW_WR_ADD29, 0x2f}, - {OP_WR, PXP2_REG_RQ_BW_WR_ADD30, 0x9}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND0, 0x19}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB1, 0x184}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB2, 0x183}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB3, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND4, 0x19}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND5, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB6, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB7, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB8, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB9, 0xc86}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB10, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB11, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND12, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND13, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND14, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND15, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND16, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND17, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND18, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND19, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND20, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND22, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND23, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND24, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND25, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND26, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND27, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB28, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_WR_UBOUND29, 0x13}, - {OP_WR, PXP2_REG_RQ_BW_WR_UBOUND30, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_L1, 0x1004}, - {OP_WR, PXP2_REG_PSWRQ_BW_L2, 0x1004}, - {OP_WR, PXP2_REG_PSWRQ_BW_RD, 0x106440}, - {OP_WR, PXP2_REG_PSWRQ_BW_WR, 0x106440}, - {OP_WR, PXP2_REG_RQ_ILT_MODE, 0x1}, - {OP_WR, PXP2_REG_RQ_RBC_DONE, 0x1}, -/* #define PXP2_COMMON_END 749 */ -/* #define MISC_AEU_COMMON_START 770 */ - {OP_ZR, MISC_REG_AEU_GENERAL_ATTN_0, 0xc}, - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_20, 0x0}, - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_21, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE1_NIG_0, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_NIG_0, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_NIG_0, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_NIG_0, 0xf0000000}, - {OP_WR, MISC_REG_AEU_ENABLE1_PXP_0, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_PXP_0, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_PXP_0, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_PXP_0, 0xf0000000}, - {OP_WR, MISC_REG_AEU_ENABLE1_NIG_1, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_NIG_1, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_NIG_1, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_NIG_1, 0xf0000000}, - {OP_WR, MISC_REG_AEU_ENABLE1_PXP_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE2_PXP_1, 0x10000}, - {OP_WR, MISC_REG_AEU_ENABLE3_PXP_1, 0x5014}, - {OP_WR, MISC_REG_AEU_ENABLE4_PXP_1, 0x0}, - {OP_WR, MISC_REG_AEU_CLR_LATCH_SIGNAL, 0xc00}, - {OP_WR, MISC_REG_AEU_GENERAL_MASK, 0x3}, -/* #define MISC_AEU_COMMON_END 771 */ -/* #define MISC_AEU_PORT0_START 772 */ - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0, 0xff5c0000}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0, 0xfff55fff}, - {OP_WR, MISC_REG_AEU_ENABLE3_FUNC_0_OUT_0, 0xffff}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, 0xf00003e0}, - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_1, 0xa000}, - {OP_ZR, MISC_REG_AEU_ENABLE3_FUNC_0_OUT_1, 0x5}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_2, 0xfe00000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_3, 0x7}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_4, 0x400}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_5, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_5, 0x1000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_6, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_6, 0x4000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_7, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_7, 0x10000}, - {OP_ZR, MISC_REG_AEU_INVERTER_1_FUNC_0, 0x4}, -/* #define MISC_AEU_PORT0_END 773 */ -/* #define MISC_AEU_PORT1_START 774 */ - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0, 0xff5c0000}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0, 0xfff55fff}, - {OP_WR, MISC_REG_AEU_ENABLE3_FUNC_1_OUT_0, 0xffff}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, 0xf00003e0}, - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_1, 0xa000}, - {OP_ZR, MISC_REG_AEU_ENABLE3_FUNC_1_OUT_1, 0x5}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_2, 0xfe00000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_3, 0x7}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_4, 0x800}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_5, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_5, 0x2000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_6, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_6, 0x8000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_7, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_7, 0x20000}, - {OP_ZR, MISC_REG_AEU_INVERTER_1_FUNC_1, 0x4}, -/* #define MISC_AEU_PORT1_END 775 */ -/* #define MISC_AEU_FUNC0_START 776 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_12, 0x0}, -/* #define MISC_AEU_FUNC0_END 777 */ -/* #define MISC_AEU_FUNC1_START 778 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_13, 0x0}, -/* #define MISC_AEU_FUNC1_END 779 */ -/* #define MISC_AEU_FUNC2_START 780 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_14, 0x0}, -/* #define MISC_AEU_FUNC2_END 781 */ -/* #define MISC_AEU_FUNC3_START 782 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_15, 0x0}, -/* #define MISC_AEU_FUNC3_END 783 */ -/* #define MISC_AEU_FUNC4_START 784 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_16, 0x0}, -/* #define MISC_AEU_FUNC4_END 785 */ -/* #define MISC_AEU_FUNC5_START 786 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_17, 0x0}, -/* #define MISC_AEU_FUNC5_END 787 */ -/* #define MISC_AEU_FUNC6_START 788 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_18, 0x0}, -/* #define MISC_AEU_FUNC6_END 789 */ -/* #define MISC_AEU_FUNC7_START 790 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_19, 0x0}, -/* #define MISC_AEU_FUNC7_END 791 */ - +/* #define BRB1_COMMON_START 22 */ + {OP_WR, 0x600dc, 0x1}, + {OP_SW, 0x61000, 0x2000000}, + {OP_RD, 0x600d8, 0x0}, + {OP_SW, 0x60200, 0x30200}, + {OP_WR, 0x600dc, 0x0}, +/* #define BRB1_COMMON_END 23 */ +/* #define BRB1_PORT0_START 24 */ + {OP_RD, 0x600b8, 0x0}, + {OP_RD, 0x600c8, 0x0}, + {OP_WR, 0x6016c, 0x0}, +/* #define BRB1_PORT0_END 25 */ +/* #define BRB1_PORT1_START 26 */ + {OP_RD, 0x600bc, 0x0}, + {OP_RD, 0x600cc, 0x0}, + {OP_WR, 0x60170, 0x0}, +/* #define BRB1_PORT1_END 27 */ +/* #define CCM_COMMON_START 44 */ + {OP_WR, 0xd0044, 0x32}, + {OP_SW, 0xd004c, 0x40203}, + {OP_ZR, 0xd005c, 0x4}, + {OP_SW, 0xd008c, 0x110207}, + {OP_WR, 0xd015c, 0x1}, + {OP_SW, 0xd0164, 0x20218}, + {OP_WR, 0xd0204, 0x1}, + {OP_SW, 0xd020c, 0x3021a}, + {OP_SW, 0xd0220, 0x2021d}, + {OP_ZR, 0xd0280, 0x12}, + {OP_SW, 0xd0300, 0x18021f}, + {OP_ZR, 0xd0360, 0xc}, + {OP_ZR, 0xd4000, 0xa00}, + {OP_SW, 0xd0004, 0xf0237}, +/* #define CCM_COMMON_END 45 */ +/* #define CCM_PF0_START 50 */ + {OP_WR, 0xd0114, 0xd}, +/* #define CCM_PF0_END 51 */ +/* #define CCM_PF1_START 52 */ + {OP_WR, 0xd0118, 0x2d}, +/* #define CCM_PF1_END 53 */ +/* #define CCM_PF2_START 54 */ + {OP_WR, 0xd0114, 0x1d}, +/* #define CCM_PF2_END 55 */ +/* #define CCM_PF3_START 56 */ + {OP_WR, 0xd0118, 0x3d}, +/* #define CCM_PF3_END 57 */ +/* #define CCM_PF4_START 58 */ + {OP_WR, 0xd0114, 0x4d}, +/* #define CCM_PF4_END 59 */ +/* #define CCM_PF5_START 60 */ + {OP_WR, 0xd0118, 0x6d}, +/* #define CCM_PF5_END 61 */ +/* #define CCM_PF6_START 62 */ + {OP_WR, 0xd0114, 0x5d}, +/* #define CCM_PF6_END 63 */ +/* #define CCM_PF7_START 64 */ + {OP_WR, 0xd0118, 0x7d}, +/* #define CCM_PF7_END 65 */ +/* #define CDU_COMMON_START 66 */ + {OP_SW, 0x101000, 0x30246}, + {OP_WR, 0x101050, 0x1}, + {OP_WB, 0x101100, 0x100249}, + {OP_WB_ZR, 0x101140, 0x8}, + {OP_WB, 0x101160, 0x100259}, + {OP_WB_ZR, 0x1011a0, 0x18}, + {OP_WB, 0x101800, 0x2000269}, +/* #define CDU_COMMON_END 67 */ +/* #define CFC_COMMON_START 88 */ + {OP_ZR, 0x104c00, 0x100}, + {OP_WR, 0x104028, 0x10}, + {OP_WR, 0x104044, 0x3fff}, + {OP_WR, 0x104058, 0x280000}, + {OP_WR, 0x104084, 0x84924a}, + {OP_WR, 0x104058, 0x0}, +/* #define CFC_COMMON_END 89 */ +/* #define CSDM_COMMON_START 110 */ + {OP_SW, 0xc2008, 0x30469}, + {OP_SW, 0xc201c, 0x4046c}, + {OP_SW, 0xc2038, 0x110470}, + {OP_ZR, 0xc207c, 0x4f}, + {OP_SW, 0xc21b8, 0x110481}, + {OP_ZR, 0xc21fc, 0xf}, + {OP_SW, 0xc2238, 0x40492}, + {OP_RD, 0xc2248, 0x0}, + {OP_RD, 0xc224c, 0x0}, + {OP_RD, 0xc2250, 0x0}, + {OP_RD, 0xc2254, 0x0}, + {OP_RD, 0xc2258, 0x0}, + {OP_RD, 0xc225c, 0x0}, + {OP_RD, 0xc2260, 0x0}, + {OP_RD, 0xc2264, 0x0}, + {OP_RD, 0xc2268, 0x0}, + {OP_RD, 0xc226c, 0x0}, + {OP_RD, 0xc2270, 0x0}, + {OP_RD, 0xc2274, 0x0}, + {OP_RD, 0xc2278, 0x0}, + {OP_RD, 0xc227c, 0x0}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0xc2000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0xc2000, 0xa}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0xc2000, 0x1}, +/* #define CSDM_COMMON_END 111 */ +/* #define CSEM_COMMON_START 132 */ + {OP_ZP, 0x200400, 0x840000}, + {OP_WR_64, 0x200780, 0x100496}, + {OP_ZR, 0x220000, 0x4000}, + {OP_ZR, 0x232400, 0x40}, + {OP_SW, 0x221250, 0x100498}, + {OP_ZR, 0x22b140, 0x20}, + {OP_ZR, 0x22c800, 0x6}, + {OP_SW, 0x22c818, 0x404a8}, + {OP_ZR, 0x22c828, 0xc}, + {OP_SW, 0x22c858, 0x404ac}, + {OP_ZR, 0x22c868, 0xc}, + {OP_SW, 0x22c898, 0x404b0}, + {OP_ZR, 0x22c8a8, 0xc}, + {OP_SW, 0x22c8d8, 0x404b4}, + {OP_ZR, 0x22c8e8, 0xc}, + {OP_SW, 0x22c918, 0x404b8}, + {OP_ZR, 0x22c928, 0xc}, + {OP_SW, 0x22c958, 0x404bc}, + {OP_ZR, 0x22c968, 0xc}, + {OP_SW, 0x22c998, 0x404c0}, + {OP_ZR, 0x22c9a8, 0xc}, + {OP_SW, 0x22c9d8, 0x404c4}, + {OP_ZR, 0x22c9e8, 0xc}, + {OP_SW, 0x22ca18, 0x404c8}, + {OP_ZR, 0x22ca28, 0xc}, + {OP_SW, 0x22ca58, 0x404cc}, + {OP_ZR, 0x22ca68, 0xc}, + {OP_SW, 0x22ca98, 0x404d0}, + {OP_ZR, 0x22caa8, 0xc}, + {OP_SW, 0x22cad8, 0x404d4}, + {OP_ZR, 0x22cae8, 0xc}, + {OP_SW, 0x22cb18, 0x404d8}, + {OP_ZR, 0x22cb28, 0xc}, + {OP_SW, 0x22cb58, 0x404dc}, + {OP_ZR, 0x22cb68, 0xc}, + {OP_SW, 0x22cb98, 0x404e0}, + {OP_ZR, 0x22cba8, 0xc}, + {OP_SW, 0x22cbd8, 0x404e4}, + {OP_ZR, 0x22cbe8, 0xc}, + {OP_SW, 0x22cc18, 0x404e8}, + {OP_ZR, 0x22cc28, 0xc}, + {OP_SW, 0x22cc58, 0x404ec}, + {OP_ZR, 0x22cc68, 0xc}, + {OP_SW, 0x22cc98, 0x404f0}, + {OP_ZR, 0x22cca8, 0xc}, + {OP_SW, 0x22ccd8, 0x404f4}, + {OP_ZR, 0x22cce8, 0xc}, + {OP_SW, 0x22cd18, 0x404f8}, + {OP_ZR, 0x22cd28, 0xc}, + {OP_SW, 0x22cd58, 0x404fc}, + {OP_ZR, 0x22cd68, 0xc}, + {OP_SW, 0x22cd98, 0x40500}, + {OP_ZR, 0x22cda8, 0xc}, + {OP_SW, 0x22cdd8, 0x40504}, + {OP_ZR, 0x22cde8, 0xc}, + {OP_SW, 0x22ce18, 0x40508}, + {OP_ZR, 0x22ce28, 0xc}, + {OP_SW, 0x22ce58, 0x4050c}, + {OP_ZR, 0x22ce68, 0xc}, + {OP_SW, 0x22ce98, 0x40510}, + {OP_ZR, 0x22cea8, 0xc}, + {OP_SW, 0x22ced8, 0x40514}, + {OP_ZR, 0x22cee8, 0xc}, + {OP_SW, 0x22cf18, 0x40518}, + {OP_ZR, 0x22cf28, 0xc}, + {OP_SW, 0x22cf58, 0x4051c}, + {OP_ZR, 0x22cf68, 0xc}, + {OP_SW, 0x22cf98, 0x40520}, + {OP_ZR, 0x22cfa8, 0xc}, + {OP_SW, 0x22cfd8, 0x40524}, + {OP_ZR, 0x22cfe8, 0x6}, + {OP_WR, 0x238000, 0x10}, + {OP_WR, 0x238040, 0x12}, + {OP_WR, 0x238080, 0x30}, + {OP_WR, 0x2380c0, 0xe}, + {OP_WR, 0x238380, 0x7a120}, + {OP_WR, 0x2383c0, 0x1f4}, + {OP_WR, 0x238bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x1}, /* asic */ + {OP_WR, 0x238300, 0x7a120}, + {OP_WR, 0x238340, 0x1f4}, + {OP_IF_MODE_AND, 2, 0x2}, /* fpga */ + {OP_WR, 0x238300, 0x1388}, + {OP_WR, 0x238340, 0x5}, + {OP_IF_MODE_AND, 2, 0x4}, /* emul */ + {OP_WR, 0x238300, 0x138}, + {OP_WR, 0x238340, 0x0}, + {OP_ZP, 0x240000, 0x32e70000}, + {OP_ZP, 0x248000, 0xff80cba}, + {OP_WR_64, 0x249e00, 0x6aa60528}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x231480, 0x0}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x231480, 0x0}, + {OP_RD, 0x200000, 0x0}, + {OP_RD, 0x200004, 0x0}, + {OP_RD, 0x200008, 0x0}, + {OP_RD, 0x20000c, 0x0}, + {OP_RD, 0x200010, 0x0}, + {OP_RD, 0x200014, 0x0}, + {OP_SW, 0x200020, 0x1a052a}, + {OP_SW, 0x2000a4, 0x20544}, + {OP_WR, 0x200224, 0x0}, + {OP_WR, 0x200234, 0x0}, + {OP_WR, 0x20024c, 0x0}, + {OP_WR, 0x2002e4, 0xffff}, + {OP_WB_ZR, 0x202000, 0x800}, +/* #define CSEM_COMMON_END 133 */ +/* #define CSEM_PF0_START 138 */ + {OP_ZR, 0x221108, 0x2}, + {OP_ZR, 0x221290, 0x6}, + {OP_ZR, 0x223400, 0x2}, + {OP_ZR, 0x226040, 0x30}, + {OP_ZR, 0x228c00, 0x10}, +/* #define CSEM_PF0_END 139 */ +/* #define CSEM_PF1_START 140 */ + {OP_ZR, 0x221110, 0x2}, + {OP_ZR, 0x2212a8, 0x6}, + {OP_ZR, 0x223408, 0x2}, + {OP_ZR, 0x226100, 0x30}, + {OP_ZR, 0x228c40, 0x10}, +/* #define CSEM_PF1_END 141 */ +/* #define CSEM_PF2_START 142 */ + {OP_ZR, 0x221118, 0x2}, + {OP_ZR, 0x2212c0, 0x6}, + {OP_ZR, 0x223410, 0x2}, + {OP_ZR, 0x2261c0, 0x30}, + {OP_ZR, 0x228c80, 0x10}, +/* #define CSEM_PF2_END 143 */ +/* #define CSEM_PF3_START 144 */ + {OP_ZR, 0x221120, 0x2}, + {OP_ZR, 0x2212d8, 0x6}, + {OP_ZR, 0x223418, 0x2}, + {OP_ZR, 0x226280, 0x30}, + {OP_ZR, 0x228cc0, 0x10}, +/* #define CSEM_PF3_END 145 */ +/* #define CSEM_PF4_START 146 */ + {OP_ZR, 0x221128, 0x2}, + {OP_ZR, 0x2212f0, 0x6}, + {OP_ZR, 0x223420, 0x2}, + {OP_ZR, 0x226340, 0x30}, + {OP_ZR, 0x228d00, 0x10}, +/* #define CSEM_PF4_END 147 */ +/* #define CSEM_PF5_START 148 */ + {OP_ZR, 0x221130, 0x2}, + {OP_ZR, 0x221308, 0x6}, + {OP_ZR, 0x223428, 0x2}, + {OP_ZR, 0x226400, 0x30}, + {OP_ZR, 0x228d40, 0x10}, +/* #define CSEM_PF5_END 149 */ +/* #define CSEM_PF6_START 150 */ + {OP_ZR, 0x221138, 0x2}, + {OP_ZR, 0x221320, 0x6}, + {OP_ZR, 0x223430, 0x2}, + {OP_ZR, 0x2264c0, 0x30}, + {OP_ZR, 0x228d80, 0x10}, +/* #define CSEM_PF6_END 151 */ +/* #define CSEM_PF7_START 152 */ + {OP_ZR, 0x221140, 0x2}, + {OP_ZR, 0x221338, 0x6}, + {OP_ZR, 0x223438, 0x2}, + {OP_ZR, 0x226580, 0x30}, + {OP_ZR, 0x228dc0, 0x10}, +/* #define CSEM_PF7_END 153 */ +/* #define DMAE_COMMON_START 176 */ + {OP_ZR, 0x102400, 0xe0}, + {OP_SW, 0x10201c, 0x20546}, + {OP_WR, 0x1020c0, 0x2}, + {OP_SW, 0x102004, 0x20548}, +/* #define DMAE_COMMON_END 177 */ +/* #define DORQ_COMMON_START 198 */ + {OP_WR, 0x170008, 0x2}, + {OP_WR, 0x17002c, 0x3}, + {OP_SW, 0x170038, 0x2054a}, + {OP_SW, 0x170048, 0x5054c}, + {OP_SW, 0x170060, 0x50551}, + {OP_SW, 0x170078, 0x20556}, + {OP_WR, 0x170004, 0xf}, +/* #define DORQ_COMMON_END 199 */ +/* #define HC_PF0_START 226 */ + {OP_WR, 0x108000, 0x1080}, + {OP_ZR, 0x108040, 0x2}, + {OP_WR, 0x1080ac, 0x0}, + {OP_WR, 0x108038, 0x10}, + {OP_WR, 0x108100, 0x0}, + {OP_ZR, 0x108120, 0x2}, + {OP_WR, 0x108008, 0x2b5}, + {OP_WR, 0x108010, 0x0}, + {OP_WR, 0x108108, 0x1ffff}, + {OP_ZR, 0x108200, 0x4a}, + {OP_ZR, 0x108140, 0x2}, + {OP_WR, 0x108000, 0x1a80}, + {OP_ZR, 0x109000, 0x24}, + {OP_ZR, 0x109120, 0x4a}, + {OP_ZR, 0x109370, 0x4a}, + {OP_ZR, 0x1095c0, 0x4a}, +/* #define HC_PF0_END 227 */ +/* #define HC_PF1_START 228 */ + {OP_WR, 0x108004, 0x1080}, + {OP_ZR, 0x108048, 0x2}, + {OP_WR, 0x1080b0, 0x1}, + {OP_WR, 0x10803c, 0x10}, + {OP_WR, 0x108104, 0x0}, + {OP_ZR, 0x108128, 0x2}, + {OP_WR, 0x10800c, 0x2b5}, + {OP_WR, 0x108014, 0x0}, + {OP_WR, 0x10810c, 0x1ffff}, + {OP_ZR, 0x108400, 0x4a}, + {OP_ZR, 0x108148, 0x2}, + {OP_WR, 0x108004, 0x1a80}, + {OP_ZR, 0x109090, 0x24}, + {OP_ZR, 0x109248, 0x4a}, + {OP_ZR, 0x109498, 0x4a}, + {OP_ZR, 0x1096e8, 0x4a}, +/* #define HC_PF1_END 229 */ +/* #define HC_PF2_START 230 */ + {OP_WR, 0x108000, 0x1080}, + {OP_ZR, 0x108040, 0x2}, + {OP_WR, 0x1080ac, 0x2}, + {OP_WR, 0x108038, 0x10}, + {OP_WR, 0x108100, 0x0}, + {OP_ZR, 0x108120, 0x2}, + {OP_WR, 0x108008, 0x2b5}, + {OP_WR, 0x108010, 0x0}, + {OP_WR, 0x108108, 0x1ffff}, + {OP_ZR, 0x108200, 0x4a}, + {OP_ZR, 0x108140, 0x2}, + {OP_WR, 0x108000, 0x1a80}, + {OP_ZR, 0x109000, 0x24}, + {OP_ZR, 0x109120, 0x4a}, + {OP_ZR, 0x109370, 0x4a}, + {OP_ZR, 0x1095c0, 0x4a}, +/* #define HC_PF2_END 231 */ +/* #define HC_PF3_START 232 */ + {OP_WR, 0x108004, 0x1080}, + {OP_ZR, 0x108048, 0x2}, + {OP_WR, 0x1080b0, 0x3}, + {OP_WR, 0x10803c, 0x10}, + {OP_WR, 0x108104, 0x0}, + {OP_ZR, 0x108128, 0x2}, + {OP_WR, 0x10800c, 0x2b5}, + {OP_WR, 0x108014, 0x0}, + {OP_WR, 0x10810c, 0x1ffff}, + {OP_ZR, 0x108400, 0x4a}, + {OP_ZR, 0x108148, 0x2}, + {OP_WR, 0x108004, 0x1a80}, + {OP_ZR, 0x109090, 0x24}, + {OP_ZR, 0x109248, 0x4a}, + {OP_ZR, 0x109498, 0x4a}, + {OP_ZR, 0x1096e8, 0x4a}, +/* #define HC_PF3_END 233 */ +/* #define HC_PF4_START 234 */ + {OP_WR, 0x108000, 0x1080}, + {OP_ZR, 0x108040, 0x2}, + {OP_WR, 0x1080ac, 0x4}, + {OP_WR, 0x108038, 0x10}, + {OP_WR, 0x108100, 0x0}, + {OP_ZR, 0x108120, 0x2}, + {OP_WR, 0x108008, 0x2b5}, + {OP_WR, 0x108010, 0x0}, + {OP_WR, 0x108108, 0x1ffff}, + {OP_ZR, 0x108200, 0x4a}, + {OP_ZR, 0x108140, 0x2}, + {OP_WR, 0x108000, 0x1a80}, + {OP_ZR, 0x109000, 0x24}, + {OP_ZR, 0x109120, 0x4a}, + {OP_ZR, 0x109370, 0x4a}, + {OP_ZR, 0x1095c0, 0x4a}, +/* #define HC_PF4_END 235 */ +/* #define HC_PF5_START 236 */ + {OP_WR, 0x108004, 0x1080}, + {OP_ZR, 0x108048, 0x2}, + {OP_WR, 0x1080b0, 0x5}, + {OP_WR, 0x10803c, 0x10}, + {OP_WR, 0x108104, 0x0}, + {OP_ZR, 0x108128, 0x2}, + {OP_WR, 0x10800c, 0x2b5}, + {OP_WR, 0x108014, 0x0}, + {OP_WR, 0x10810c, 0x1ffff}, + {OP_ZR, 0x108400, 0x4a}, + {OP_ZR, 0x108148, 0x2}, + {OP_WR, 0x108004, 0x1a80}, + {OP_ZR, 0x109090, 0x24}, + {OP_ZR, 0x109248, 0x4a}, + {OP_ZR, 0x109498, 0x4a}, + {OP_ZR, 0x1096e8, 0x4a}, +/* #define HC_PF5_END 237 */ +/* #define HC_PF6_START 238 */ + {OP_WR, 0x108000, 0x1080}, + {OP_ZR, 0x108040, 0x2}, + {OP_WR, 0x1080ac, 0x6}, + {OP_WR, 0x108038, 0x10}, + {OP_WR, 0x108100, 0x0}, + {OP_ZR, 0x108120, 0x2}, + {OP_WR, 0x108008, 0x2b5}, + {OP_WR, 0x108010, 0x0}, + {OP_WR, 0x108108, 0x1ffff}, + {OP_ZR, 0x108200, 0x4a}, + {OP_ZR, 0x108140, 0x2}, + {OP_WR, 0x108000, 0x1a80}, + {OP_ZR, 0x109000, 0x24}, + {OP_ZR, 0x109120, 0x4a}, + {OP_ZR, 0x109370, 0x4a}, + {OP_ZR, 0x1095c0, 0x4a}, +/* #define HC_PF6_END 239 */ +/* #define HC_PF7_START 240 */ + {OP_WR, 0x108004, 0x1080}, + {OP_ZR, 0x108048, 0x2}, + {OP_WR, 0x1080b0, 0x7}, + {OP_WR, 0x10803c, 0x10}, + {OP_WR, 0x108104, 0x0}, + {OP_ZR, 0x108128, 0x2}, + {OP_WR, 0x10800c, 0x2b5}, + {OP_WR, 0x108014, 0x0}, + {OP_WR, 0x10810c, 0x1ffff}, + {OP_ZR, 0x108400, 0x4a}, + {OP_ZR, 0x108148, 0x2}, + {OP_WR, 0x108004, 0x1a80}, + {OP_ZR, 0x109090, 0x24}, + {OP_ZR, 0x109248, 0x4a}, + {OP_ZR, 0x109498, 0x4a}, + {OP_ZR, 0x1096e8, 0x4a}, +/* #define HC_PF7_END 241 */ +/* #define MISC_COMMON_START 264 */ + {OP_WR, 0xa468, 0xb01c8}, + {OP_SW, 0xa294, 0x40558}, + {OP_IF_MODE_AND, 1, 0x80}, /* sf */ + {OP_WR, 0xa5f8, 0x0}, + {OP_IF_MODE_AND, 1, 0x100}, /* mf */ + {OP_WR, 0xa5f8, 0x1}, +/* #define MISC_COMMON_END 265 */ +/* #define MISC_PF0_START 270 */ + {OP_WR, 0xa270, 0x0}, +/* #define MISC_PF0_END 271 */ +/* #define MISC_PF1_START 272 */ + {OP_WR, 0xa274, 0x0}, +/* #define MISC_PF1_END 273 */ +/* #define MISC_PF2_START 274 */ + {OP_WR, 0xa270, 0x0}, +/* #define MISC_PF2_END 275 */ +/* #define MISC_PF3_START 276 */ + {OP_WR, 0xa274, 0x0}, +/* #define MISC_PF3_END 277 */ +/* #define MISC_PF4_START 278 */ + {OP_WR, 0xa270, 0x0}, +/* #define MISC_PF4_END 279 */ +/* #define MISC_PF5_START 280 */ + {OP_WR, 0xa274, 0x0}, +/* #define MISC_PF5_END 281 */ +/* #define MISC_PF6_START 282 */ + {OP_WR, 0xa270, 0x0}, +/* #define MISC_PF6_END 283 */ +/* #define MISC_PF7_START 284 */ + {OP_WR, 0xa274, 0x0}, +/* #define MISC_PF7_END 285 */ +/* #define NIG_COMMON_START 286 */ + {OP_SW, 0x100b4, 0x2055c}, + {OP_WR, 0x100dc, 0x1}, + {OP_SW, 0x10100, 0x2055e}, +/* #define NIG_COMMON_END 287 */ +/* #define NIG_PORT0_START 288 */ + {OP_WR, 0x1007c, 0x300000}, + {OP_WR, 0x10084, 0x28}, + {OP_WR, 0x1008c, 0x0}, + {OP_WR, 0x10130, 0x4}, + {OP_WR, 0x10244, 0x1f}, + {OP_WR, 0x1025c, 0x1}, + {OP_WR, 0x10328, 0x0}, + {OP_WR, 0x10554, 0x30}, + {OP_WR, 0x16058, 0xffff}, + {OP_WR, 0x16070, 0x7}, + {OP_WR, 0x16080, 0x1}, + {OP_WR, 0x100c4, 0x1}, + {OP_WR, 0x100cc, 0x1}, + {OP_WR, 0x100f8, 0x1}, + {OP_WR, 0x100f0, 0x1}, +/* #define NIG_PORT0_END 289 */ +/* #define NIG_PORT1_START 290 */ + {OP_WR, 0x10080, 0x300000}, + {OP_WR, 0x10088, 0x28}, + {OP_WR, 0x10090, 0x0}, + {OP_WR, 0x10134, 0x4}, + {OP_WR, 0x10248, 0x1f}, + {OP_WR, 0x102dc, 0x1}, + {OP_WR, 0x1032c, 0x0}, + {OP_WR, 0x10564, 0x30}, + {OP_WR, 0x1605c, 0xffff}, + {OP_WR, 0x16074, 0x7}, + {OP_WR, 0x16084, 0x1}, + {OP_WR, 0x100c8, 0x1}, + {OP_WR, 0x100d0, 0x1}, + {OP_WR, 0x100fc, 0x1}, + {OP_WR, 0x100f4, 0x1}, +/* #define NIG_PORT1_END 291 */ +/* #define NIG_PF0_START 292 */ + {OP_ZR, 0x10138, 0x11}, +/* #define NIG_PF0_END 293 */ +/* #define NIG_PF1_START 294 */ + {OP_ZR, 0x1017c, 0x11}, +/* #define NIG_PF1_END 295 */ +/* #define NIG_PF2_START 296 */ + {OP_ZR, 0x10138, 0x11}, +/* #define NIG_PF2_END 297 */ +/* #define NIG_PF3_START 298 */ + {OP_ZR, 0x1017c, 0x11}, +/* #define NIG_PF3_END 299 */ +/* #define NIG_PF4_START 300 */ + {OP_ZR, 0x10138, 0x11}, +/* #define NIG_PF4_END 301 */ +/* #define NIG_PF5_START 302 */ + {OP_ZR, 0x1017c, 0x11}, +/* #define NIG_PF5_END 303 */ +/* #define NIG_PF6_START 304 */ + {OP_ZR, 0x10138, 0x11}, +/* #define NIG_PF6_END 305 */ +/* #define NIG_PF7_START 306 */ + {OP_ZR, 0x1017c, 0x11}, +/* #define NIG_PF7_END 307 */ +/* #define PBF_COMMON_START 308 */ + {OP_WR, 0x140000, 0x1}, + {OP_WR, 0x14000c, 0x1}, + {OP_SW, 0x140040, 0x20560}, + {OP_WR, 0x14000c, 0x0}, + {OP_WR, 0x140000, 0x0}, + {OP_WR, 0x14006c, 0x0}, +/* #define PBF_COMMON_END 309 */ +/* #define PBF_PORT0_START 310 */ + {OP_WR, 0x140004, 0x1}, + {OP_WR, 0x140030, 0x1}, + {OP_WR, 0x140004, 0x0}, + {OP_WR, 0x14005c, 0x0}, +/* #define PBF_PORT0_END 311 */ +/* #define PBF_PORT1_START 312 */ + {OP_WR, 0x140008, 0x1}, + {OP_WR, 0x140034, 0x1}, + {OP_WR, 0x140008, 0x0}, + {OP_WR, 0x140060, 0x0}, +/* #define PBF_PORT1_END 313 */ +/* #define PRS_COMMON_START 352 */ + {OP_SW, 0x40004, 0x120562}, + {OP_WR, 0x40054, 0x43}, + {OP_WR, 0x4005c, 0x6}, + {OP_WR, 0x40070, 0x4}, + {OP_SW, 0x40078, 0x40574}, + {OP_ZR, 0x40088, 0x5}, + {OP_SW, 0x4009c, 0x30578}, + {OP_ZR, 0x400a8, 0x4}, + {OP_SW, 0x400b8, 0x5057b}, + {OP_ZR, 0x400cc, 0x4}, + {OP_SW, 0x400dc, 0x40580}, + {OP_ZR, 0x400ec, 0x4}, + {OP_RD, 0x40124, 0x0}, + {OP_RD, 0x40128, 0x0}, + {OP_RD, 0x4012c, 0x0}, + {OP_RD, 0x40130, 0x0}, + {OP_WR, 0x40134, 0xf}, + {OP_WR, 0x401d0, 0x8906}, +/* #define PRS_COMMON_END 353 */ +/* #define PXP2_COMMON_START 374 */ + {OP_WR, 0x1205b0, 0x1}, + {OP_SW, 0x120490, 0x220584}, + {OP_SW, 0x12066c, 0x205a6}, + {OP_WR, 0x120388, 0x64}, + {OP_WR, 0x120390, 0x8}, + {OP_SW, 0x12039c, 0x305a8}, + {OP_SW, 0x1203bc, 0x305ab}, + {OP_WR, 0x1203d0, 0x0}, + {OP_WR, 0x12036c, 0x1}, + {OP_WR, 0x120368, 0x3f}, + {OP_SW, 0x1201bc, 0x3c05ae}, + {OP_SW, 0x1202b0, 0x205ea}, + {OP_SW, 0x120324, 0x205ec}, + {OP_WR, 0x1205b4, 0x1}, + {OP_WR, 0x1201b0, 0x1}, +/* #define PXP2_COMMON_END 375 */ +/* #define PXP_COMMON_START 396 */ + {OP_WB, 0x103800, 0x505ee}, + {OP_WB, 0x103820, 0x505f3}, + {OP_WB, 0x103c00, 0x505f8}, +/* #define PXP_COMMON_END 397 */ +/* #define QM_COMMON_START 418 */ + {OP_SW, 0x168030, 0x805fd}, + {OP_WR, 0x168054, 0x2}, + {OP_SW, 0x168060, 0x50605}, + {OP_ZR, 0x168074, 0x7}, + {OP_SW, 0x168090, 0x2060a}, + {OP_SW, 0x16809c, 0x5060c}, + {OP_ZR, 0x1680b0, 0x7}, + {OP_SW, 0x1680cc, 0x80611}, + {OP_WR, 0x1680f0, 0x7}, + {OP_ZR, 0x1680f4, 0xc}, + {OP_SW, 0x168124, 0x40619}, + {OP_ZR, 0x168134, 0xc}, + {OP_SW, 0x168164, 0x32061d}, + {OP_SW, 0x168234, 0x7064f}, + {OP_ZR, 0x168250, 0x4}, + {OP_SW, 0x168260, 0x20656}, + {OP_ZR, 0x168268, 0x8}, + {OP_SW, 0x168288, 0x80658}, + {OP_ZR, 0x1682a8, 0xa}, + {OP_WR, 0x168804, 0x4}, + {OP_SW, 0x16880c, 0x100660}, + {OP_SW, 0x16e000, 0x100670}, + {OP_ZR, 0x16e40c, 0xc}, + {OP_SW, 0x16e43c, 0x40680}, + {OP_ZR, 0x16e44c, 0xc}, + {OP_SW, 0x16e47c, 0x2e0684}, + {OP_ZR, 0x16e534, 0x4}, + {OP_SW, 0x16e544, 0x206b2}, + {OP_ZR, 0x16e54c, 0x8}, + {OP_SW, 0x16e56c, 0x606b4}, + {OP_SW, 0x16e6bc, 0x806ba}, + {OP_WR, 0x1680ec, 0xff}, +/* #define QM_COMMON_END 419 */ +/* #define SRC_COMMON_START 440 */ + {OP_SW, 0x40408, 0x1406c2}, + {OP_WR, 0x404cc, 0x1}, +/* #define SRC_COMMON_END 441 */ +/* #define TCM_COMMON_START 462 */ + {OP_SW, 0x50044, 0x206d6}, + {OP_SW, 0x50050, 0x406d8}, + {OP_ZR, 0x50060, 0x4}, + {OP_SW, 0x50090, 0x1306dc}, + {OP_WR, 0x50114, 0x1}, + {OP_SW, 0x5011c, 0x206ef}, + {OP_WR, 0x50204, 0x1}, + {OP_SW, 0x5020c, 0x206f1}, + {OP_SW, 0x5021c, 0x306f3}, + {OP_ZR, 0x50240, 0xa}, + {OP_SW, 0x50280, 0x2006f6}, + {OP_ZR, 0x54000, 0xd00}, + {OP_SW, 0x50004, 0x100716}, +/* #define TCM_COMMON_END 463 */ +/* #define TCM_PF0_START 468 */ + {OP_WR, 0x500e0, 0xe}, +/* #define TCM_PF0_END 469 */ +/* #define TCM_PF1_START 470 */ + {OP_WR, 0x500e4, 0x2e}, +/* #define TCM_PF1_END 471 */ +/* #define TCM_PF2_START 472 */ + {OP_WR, 0x500e0, 0x1e}, +/* #define TCM_PF2_END 473 */ +/* #define TCM_PF3_START 474 */ + {OP_WR, 0x500e4, 0x3e}, +/* #define TCM_PF3_END 475 */ +/* #define TCM_PF4_START 476 */ + {OP_WR, 0x500e0, 0x4e}, +/* #define TCM_PF4_END 477 */ +/* #define TCM_PF5_START 478 */ + {OP_WR, 0x500e4, 0x6e}, +/* #define TCM_PF5_END 479 */ +/* #define TCM_PF6_START 480 */ + {OP_WR, 0x500e0, 0x5e}, +/* #define TCM_PF6_END 481 */ +/* #define TCM_PF7_START 482 */ + {OP_WR, 0x500e4, 0x7e}, +/* #define TCM_PF7_END 483 */ +/* #define TM_COMMON_START 484 */ + {OP_ZR, 0x164024, 0x2}, + {OP_SW, 0x164030, 0x30726}, + {OP_WR, 0x164044, 0x20}, + {OP_WR, 0x164070, 0x1c}, + {OP_WR, 0x164208, 0x1}, + {OP_WR, 0x164210, 0x1}, + {OP_WR, 0x164220, 0x1}, + {OP_WR, 0x164228, 0x1}, + {OP_WR, 0x164230, 0x1}, + {OP_WR, 0x164238, 0x1}, + {OP_WR, 0x164260, 0x2}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0x16401c, 0x3d090}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x16401c, 0x9c4}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x16401c, 0x9c}, + {OP_WR, 0x164000, 0x1}, + {OP_WR, 0x1640d8, 0x1}, + {OP_SW, 0x164008, 0x30729}, +/* #define TM_COMMON_END 485 */ +/* #define TM_PORT0_START 486 */ + {OP_WR, 0x164240, 0x0}, + {OP_WR, 0x164248, 0x0}, + {OP_WB_ZR, 0x164270, 0x2}, +/* #define TM_PORT0_END 487 */ +/* #define TM_PORT1_START 488 */ + {OP_WR, 0x164250, 0x0}, + {OP_WR, 0x164258, 0x0}, + {OP_WB_ZR, 0x164280, 0x2}, +/* #define TM_PORT1_END 489 */ +/* #define TSDM_COMMON_START 506 */ + {OP_SW, 0x42008, 0x4072c}, + {OP_SW, 0x4201c, 0x40730}, + {OP_WR, 0x42038, 0x20}, + {OP_ZR, 0x4203c, 0x1f}, + {OP_WR, 0x420b8, 0x1}, + {OP_ZR, 0x420bc, 0x5f}, + {OP_SW, 0x42238, 0x40734}, + {OP_RD, 0x42248, 0x0}, + {OP_RD, 0x4224c, 0x0}, + {OP_RD, 0x42250, 0x0}, + {OP_RD, 0x42254, 0x0}, + {OP_RD, 0x42258, 0x0}, + {OP_RD, 0x4225c, 0x0}, + {OP_RD, 0x42260, 0x0}, + {OP_RD, 0x42264, 0x0}, + {OP_RD, 0x42268, 0x0}, + {OP_RD, 0x4226c, 0x0}, + {OP_RD, 0x42270, 0x0}, + {OP_RD, 0x42274, 0x0}, + {OP_RD, 0x42278, 0x0}, + {OP_RD, 0x4227c, 0x0}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0x42000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x42000, 0xa}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x42000, 0x1}, +/* #define TSDM_COMMON_END 507 */ +/* #define TSEM_COMMON_START 528 */ + {OP_ZP, 0x180400, 0x6f0000}, + {OP_WR_64, 0x180760, 0x140738}, + {OP_ZR, 0x1a0000, 0x4000}, + {OP_ZR, 0x1b2400, 0x40}, + {OP_SW, 0x1a1ec8, 0x2073a}, + {OP_SW, 0x1a4040, 0x4073c}, + {OP_ZR, 0x1a4050, 0x6}, + {OP_SW, 0x1a4068, 0x20740}, + {OP_SW, 0x1a52c0, 0x20742}, + {OP_SW, 0x1a8000, 0x3f90744}, + {OP_ZR, 0x1a8fe4, 0x7}, + {OP_SW, 0x1aa080, 0x100b3d}, + {OP_WR, 0x1b8000, 0x34}, + {OP_WR, 0x1b8040, 0x18}, + {OP_WR, 0x1b8080, 0xc}, + {OP_WR, 0x1b80c0, 0x20}, + {OP_WR, 0x1b8380, 0x7a120}, + {OP_WR, 0x1b83c0, 0x1f4}, + {OP_WR, 0x1b8bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x1}, /* asic */ + {OP_WR, 0x1b8300, 0x7a120}, + {OP_WR, 0x1b8340, 0x1f4}, + {OP_IF_MODE_AND, 2, 0x2}, /* fpga */ + {OP_WR, 0x1b8300, 0x1388}, + {OP_WR, 0x1b8340, 0x5}, + {OP_IF_MODE_AND, 2, 0x4}, /* emul */ + {OP_WR, 0x1b8300, 0x138}, + {OP_WR, 0x1b8340, 0x0}, + {OP_ZP, 0x1c0000, 0x2f7b0000}, + {OP_ZP, 0x1c8000, 0x337b0bdf}, + {OP_ZP, 0x1d0000, 0x228b18be}, + {OP_WR_64, 0x1d5060, 0x55f40b4d}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x1b1480, 0x0}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x1b1480, 0x0}, + {OP_RD, 0x180000, 0x0}, + {OP_RD, 0x180004, 0x0}, + {OP_RD, 0x180008, 0x0}, + {OP_RD, 0x18000c, 0x0}, + {OP_RD, 0x180010, 0x0}, + {OP_RD, 0x180014, 0x0}, + {OP_SW, 0x180020, 0x1a0b4f}, + {OP_SW, 0x1800a4, 0x20b69}, + {OP_WR, 0x180224, 0x0}, + {OP_WR, 0x180234, 0x0}, + {OP_WR, 0x18024c, 0x0}, + {OP_WR, 0x1802e4, 0xff}, + {OP_WB_ZR, 0x181000, 0x400}, +/* #define TSEM_COMMON_END 529 */ +/* #define TSEM_PORT0_START 530 */ + {OP_ZR, 0x1a3000, 0x10}, + {OP_ZR, 0x1a3080, 0x10}, + {OP_ZR, 0x1a3100, 0x10}, + {OP_ZR, 0x1a3180, 0x10}, + {OP_ZR, 0x1a3300, 0x12}, + {OP_ZR, 0x1a3390, 0x12}, + {OP_ZR, 0x1a3420, 0x70}, + {OP_ZR, 0x1a9000, 0x6}, +/* #define TSEM_PORT0_END 531 */ +/* #define TSEM_PORT1_START 532 */ + {OP_ZR, 0x1a3040, 0x10}, + {OP_ZR, 0x1a30c0, 0x10}, + {OP_ZR, 0x1a3140, 0x10}, + {OP_ZR, 0x1a31c0, 0x10}, + {OP_ZR, 0x1a3348, 0x12}, + {OP_ZR, 0x1a33d8, 0x12}, + {OP_ZR, 0x1a35e0, 0x70}, + {OP_ZR, 0x1a9018, 0x6}, +/* #define TSEM_PORT1_END 533 */ +/* #define TSEM_PF0_START 534 */ + {OP_SW, 0x1a4000, 0x20b6b}, + {OP_ZR, 0x1a5000, 0x2}, + {OP_ZR, 0x1a5080, 0x12}, + {OP_SW, 0x1a6140, 0x20b6d}, + {OP_ZR, 0x1a9030, 0x2}, + {OP_ZR, 0x1aa000, 0x2}, +/* #define TSEM_PF0_END 535 */ +/* #define TSEM_PF1_START 536 */ + {OP_SW, 0x1a4008, 0x20b6f}, + {OP_ZR, 0x1a5010, 0x2}, + {OP_ZR, 0x1a50c8, 0x12}, + {OP_SW, 0x1a6148, 0x20b71}, + {OP_ZR, 0x1a9038, 0x2}, + {OP_ZR, 0x1aa008, 0x2}, +/* #define TSEM_PF1_END 537 */ +/* #define TSEM_PF2_START 538 */ + {OP_SW, 0x1a4010, 0x20b73}, + {OP_ZR, 0x1a5020, 0x2}, + {OP_ZR, 0x1a5110, 0x12}, + {OP_SW, 0x1a6150, 0x20b75}, + {OP_ZR, 0x1a9040, 0x2}, + {OP_ZR, 0x1aa010, 0x2}, +/* #define TSEM_PF2_END 539 */ +/* #define TSEM_PF3_START 540 */ + {OP_SW, 0x1a4018, 0x20b77}, + {OP_ZR, 0x1a5030, 0x2}, + {OP_ZR, 0x1a5158, 0x12}, + {OP_SW, 0x1a6158, 0x20b79}, + {OP_ZR, 0x1a9048, 0x2}, + {OP_ZR, 0x1aa018, 0x2}, +/* #define TSEM_PF3_END 541 */ +/* #define TSEM_PF4_START 542 */ + {OP_SW, 0x1a4020, 0x20b7b}, + {OP_ZR, 0x1a5040, 0x2}, + {OP_ZR, 0x1a51a0, 0x12}, + {OP_SW, 0x1a6160, 0x20b7d}, + {OP_ZR, 0x1a9050, 0x2}, + {OP_ZR, 0x1aa020, 0x2}, +/* #define TSEM_PF4_END 543 */ +/* #define TSEM_PF5_START 544 */ + {OP_SW, 0x1a4028, 0x20b7f}, + {OP_ZR, 0x1a5050, 0x2}, + {OP_ZR, 0x1a51e8, 0x12}, + {OP_SW, 0x1a6168, 0x20b81}, + {OP_ZR, 0x1a9058, 0x2}, + {OP_ZR, 0x1aa028, 0x2}, +/* #define TSEM_PF5_END 545 */ +/* #define TSEM_PF6_START 546 */ + {OP_SW, 0x1a4030, 0x20b83}, + {OP_ZR, 0x1a5060, 0x2}, + {OP_ZR, 0x1a5230, 0x12}, + {OP_SW, 0x1a6170, 0x20b85}, + {OP_ZR, 0x1a9060, 0x2}, + {OP_ZR, 0x1aa030, 0x2}, +/* #define TSEM_PF6_END 547 */ +/* #define TSEM_PF7_START 548 */ + {OP_SW, 0x1a4038, 0x20b87}, + {OP_ZR, 0x1a5070, 0x2}, + {OP_ZR, 0x1a5278, 0x12}, + {OP_SW, 0x1a6178, 0x20b89}, + {OP_ZR, 0x1a9068, 0x2}, + {OP_ZR, 0x1aa038, 0x2}, +/* #define TSEM_PF7_END 549 */ +/* #define UCM_COMMON_START 550 */ + {OP_WR, 0xe004c, 0x32}, + {OP_SW, 0xe0054, 0x40b8b}, + {OP_ZR, 0xe0064, 0x4}, + {OP_SW, 0xe0094, 0x130b8f}, + {OP_WR, 0xe0144, 0x1}, + {OP_SW, 0xe014c, 0x20ba2}, + {OP_WR, 0xe0204, 0x1}, + {OP_SW, 0xe020c, 0x20ba4}, + {OP_SW, 0xe021c, 0x40ba6}, + {OP_SW, 0xe0280, 0x1b0baa}, + {OP_ZR, 0xe02ec, 0x17}, + {OP_ZR, 0xe2000, 0x800}, + {OP_SW, 0xe0004, 0x110bc5}, +/* #define UCM_COMMON_END 551 */ +/* #define UCM_PF0_START 556 */ + {OP_WR, 0xe0110, 0xf}, +/* #define UCM_PF0_END 557 */ +/* #define UCM_PF1_START 558 */ + {OP_WR, 0xe0114, 0x2f}, +/* #define UCM_PF1_END 559 */ +/* #define UCM_PF2_START 560 */ + {OP_WR, 0xe0110, 0x1f}, +/* #define UCM_PF2_END 561 */ +/* #define UCM_PF3_START 562 */ + {OP_WR, 0xe0114, 0x3f}, +/* #define UCM_PF3_END 563 */ +/* #define UCM_PF4_START 564 */ + {OP_WR, 0xe0110, 0x4f}, +/* #define UCM_PF4_END 565 */ +/* #define UCM_PF5_START 566 */ + {OP_WR, 0xe0114, 0x6f}, +/* #define UCM_PF5_END 567 */ +/* #define UCM_PF6_START 568 */ + {OP_WR, 0xe0110, 0x5f}, +/* #define UCM_PF6_END 569 */ +/* #define UCM_PF7_START 570 */ + {OP_WR, 0xe0114, 0x7f}, +/* #define UCM_PF7_END 571 */ +/* #define UPB_COMMON_START 572 */ + {OP_WR, 0xc1000, 0x28}, +/* #define UPB_COMMON_END 573 */ +/* #define USDM_COMMON_START 594 */ + {OP_SW, 0xc4008, 0x40bd6}, + {OP_SW, 0xc401c, 0x40bda}, + {OP_SW, 0xc4038, 0x50bde}, + {OP_ZR, 0xc404c, 0x5b}, + {OP_SW, 0xc41b8, 0x50be3}, + {OP_ZR, 0xc41cc, 0x1b}, + {OP_SW, 0xc4238, 0x40be8}, + {OP_RD, 0xc4248, 0x0}, + {OP_RD, 0xc424c, 0x0}, + {OP_RD, 0xc4250, 0x0}, + {OP_RD, 0xc4254, 0x0}, + {OP_RD, 0xc4258, 0x0}, + {OP_RD, 0xc425c, 0x0}, + {OP_RD, 0xc4260, 0x0}, + {OP_RD, 0xc4264, 0x0}, + {OP_RD, 0xc4268, 0x0}, + {OP_RD, 0xc426c, 0x0}, + {OP_RD, 0xc4270, 0x0}, + {OP_RD, 0xc4274, 0x0}, + {OP_RD, 0xc4278, 0x0}, + {OP_RD, 0xc427c, 0x0}, + {OP_RD, 0xc4280, 0x0}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0xc4000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0xc4000, 0xa}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0xc4000, 0x1}, +/* #define USDM_COMMON_END 595 */ +/* #define USEM_COMMON_START 616 */ + {OP_ZP, 0x300400, 0x9c0000}, + {OP_WR_64, 0x300768, 0x130bec}, + {OP_ZR, 0x320000, 0x4000}, + {OP_ZR, 0x332400, 0x40}, + {OP_ZR, 0x323e80, 0x10}, + {OP_SW, 0x323ec0, 0x20bee}, + {OP_SW, 0x3274c0, 0x80bf0}, + {OP_SW, 0x328500, 0x100bf8}, + {OP_WR, 0x338000, 0x1a}, + {OP_WR, 0x338040, 0x4e}, + {OP_WR, 0x338080, 0x10}, + {OP_WR, 0x3380c0, 0x20}, + {OP_WR, 0x338380, 0x7a120}, + {OP_WR, 0x3383c0, 0x1f4}, + {OP_WR, 0x338bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x1}, /* asic */ + {OP_WR, 0x338300, 0x7a120}, + {OP_WR, 0x338340, 0x1f4}, + {OP_IF_MODE_AND, 2, 0x2}, /* fpga */ + {OP_WR, 0x338300, 0x1388}, + {OP_WR, 0x338340, 0x5}, + {OP_IF_MODE_AND, 2, 0x4}, /* emul */ + {OP_WR, 0x338300, 0x138}, + {OP_WR, 0x338340, 0x0}, + {OP_ZP, 0x340000, 0x36690000}, + {OP_ZP, 0x348000, 0x30bc0d9b}, + {OP_ZP, 0x350000, 0x346819ca}, + {OP_WR_64, 0x3577d0, 0x51060c08}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x331480, 0x0}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x331480, 0x0}, + {OP_RD, 0x300000, 0x0}, + {OP_RD, 0x300004, 0x0}, + {OP_RD, 0x300008, 0x0}, + {OP_RD, 0x30000c, 0x0}, + {OP_RD, 0x300010, 0x0}, + {OP_RD, 0x300014, 0x0}, + {OP_SW, 0x300020, 0x1a0c0a}, + {OP_SW, 0x3000a4, 0x20c24}, + {OP_WR, 0x300224, 0x0}, + {OP_WR, 0x300234, 0x0}, + {OP_WR, 0x30024c, 0x0}, + {OP_WR, 0x3002e4, 0xffff}, + {OP_WB_ZR, 0x302000, 0x800}, +/* #define USEM_COMMON_END 617 */ +/* #define USEM_PORT0_START 618 */ + {OP_ZR, 0x321000, 0x1c0}, + {OP_ZR, 0x321e00, 0x38}, + {OP_ZR, 0x323000, 0x1c0}, + {OP_ZR, 0x325000, 0x20}, + {OP_ZR, 0x325100, 0x20}, + {OP_ZR, 0x325200, 0x20}, + {OP_ZR, 0x325300, 0x20}, + {OP_ZR, 0x325400, 0x20}, + {OP_ZR, 0x325500, 0x20}, + {OP_ZR, 0x325600, 0x20}, + {OP_ZR, 0x325700, 0x20}, + {OP_ZR, 0x325800, 0x20}, + {OP_ZR, 0x325900, 0x20}, + {OP_ZR, 0x325a00, 0x20}, + {OP_ZR, 0x325b00, 0x20}, + {OP_ZR, 0x325c00, 0x20}, + {OP_ZR, 0x325d00, 0x20}, + {OP_ZR, 0x325e00, 0x20}, + {OP_ZR, 0x325f00, 0x20}, + {OP_ZR, 0x328450, 0x2}, + {OP_SW, 0x328460, 0x40c26}, +/* #define USEM_PORT0_END 619 */ +/* #define USEM_PORT1_START 620 */ + {OP_ZR, 0x321700, 0x1c0}, + {OP_ZR, 0x321ee0, 0x38}, + {OP_ZR, 0x323700, 0x1c0}, + {OP_ZR, 0x325080, 0x20}, + {OP_ZR, 0x325180, 0x20}, + {OP_ZR, 0x325280, 0x20}, + {OP_ZR, 0x325380, 0x20}, + {OP_ZR, 0x325480, 0x20}, + {OP_ZR, 0x325580, 0x20}, + {OP_ZR, 0x325680, 0x20}, + {OP_ZR, 0x325780, 0x20}, + {OP_ZR, 0x325880, 0x20}, + {OP_ZR, 0x325980, 0x20}, + {OP_ZR, 0x325a80, 0x20}, + {OP_ZR, 0x325b80, 0x20}, + {OP_ZR, 0x325c80, 0x20}, + {OP_ZR, 0x325d80, 0x20}, + {OP_ZR, 0x325e80, 0x20}, + {OP_ZR, 0x325f80, 0x20}, + {OP_ZR, 0x328458, 0x2}, + {OP_SW, 0x328470, 0x40c2a}, +/* #define USEM_PORT1_END 621 */ +/* #define USEM_PF0_START 622 */ + {OP_ZR, 0x324010, 0x2}, + {OP_ZR, 0x328410, 0x2}, +/* #define USEM_PF0_END 623 */ +/* #define USEM_PF1_START 624 */ + {OP_ZR, 0x324020, 0x2}, + {OP_ZR, 0x328418, 0x2}, +/* #define USEM_PF1_END 625 */ +/* #define USEM_PF2_START 626 */ + {OP_ZR, 0x324030, 0x2}, + {OP_ZR, 0x328420, 0x2}, +/* #define USEM_PF2_END 627 */ +/* #define USEM_PF3_START 628 */ + {OP_ZR, 0x324040, 0x2}, + {OP_ZR, 0x328428, 0x2}, +/* #define USEM_PF3_END 629 */ +/* #define USEM_PF4_START 630 */ + {OP_ZR, 0x324050, 0x2}, + {OP_ZR, 0x328430, 0x2}, +/* #define USEM_PF4_END 631 */ +/* #define USEM_PF5_START 632 */ + {OP_ZR, 0x324060, 0x2}, + {OP_ZR, 0x328438, 0x2}, +/* #define USEM_PF5_END 633 */ +/* #define USEM_PF6_START 634 */ + {OP_ZR, 0x324070, 0x2}, + {OP_ZR, 0x328440, 0x2}, +/* #define USEM_PF6_END 635 */ +/* #define USEM_PF7_START 636 */ + {OP_ZR, 0x324080, 0x2}, + {OP_ZR, 0x328448, 0x2}, +/* #define USEM_PF7_END 637 */ +/* #define XCM_COMMON_START 638 */ + {OP_WR, 0x20058, 0x32}, + {OP_SW, 0x20060, 0x40c2e}, + {OP_ZR, 0x20070, 0x4}, + {OP_SW, 0x200a0, 0xe0c32}, + {OP_SW, 0x200dc, 0x70c40}, + {OP_WR, 0x200fc, 0x6}, + {OP_WR, 0x20120, 0x0}, + {OP_WR, 0x20134, 0x2}, + {OP_WR, 0x201b0, 0x1}, + {OP_WR, 0x2020c, 0x1}, + {OP_SW, 0x20214, 0x20c47}, + {OP_WR, 0x20404, 0x1}, + {OP_SW, 0x2040c, 0x20c49}, + {OP_SW, 0x2041c, 0x40c4b}, + {OP_SW, 0x20480, 0x200c4f}, + {OP_ZR, 0x20500, 0x12}, + {OP_ZR, 0x28000, 0x2000}, + {OP_SW, 0x20004, 0x140c6f}, +/* #define XCM_COMMON_END 639 */ +/* #define XCM_PF0_START 644 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PF0_END 645 */ +/* #define XCM_PF1_START 646 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PF1_END 647 */ +/* #define XCM_PF2_START 648 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PF2_END 649 */ +/* #define XCM_PF3_START 650 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PF3_END 651 */ +/* #define XCM_PF4_START 652 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PF4_END 653 */ +/* #define XCM_PF5_START 654 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PF5_END 655 */ +/* #define XCM_PF6_START 656 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PF6_END 657 */ +/* #define XCM_PF7_START 658 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PF7_END 659 */ +/* #define XPB_COMMON_START 660 */ + {OP_WR, 0x161000, 0x28}, +/* #define XPB_COMMON_END 661 */ +/* #define XSDM_COMMON_START 682 */ + {OP_SW, 0x166008, 0x30c83}, + {OP_SW, 0x16601c, 0x40c86}, + {OP_SW, 0x166038, 0xd0c8a}, + {OP_ZR, 0x16606c, 0x13}, + {OP_SW, 0x1660b8, 0x20c97}, + {OP_ZR, 0x1660c0, 0x3e}, + {OP_WR, 0x1661b8, 0x1}, + {OP_ZR, 0x1661bc, 0x1f}, + {OP_SW, 0x166238, 0x40c99}, + {OP_RD, 0x166248, 0x0}, + {OP_RD, 0x16624c, 0x0}, + {OP_RD, 0x166250, 0x0}, + {OP_RD, 0x166254, 0x0}, + {OP_RD, 0x166258, 0x0}, + {OP_RD, 0x16625c, 0x0}, + {OP_RD, 0x166260, 0x0}, + {OP_RD, 0x166264, 0x0}, + {OP_RD, 0x166268, 0x0}, + {OP_RD, 0x16626c, 0x0}, + {OP_RD, 0x166270, 0x0}, + {OP_RD, 0x166274, 0x0}, + {OP_RD, 0x166278, 0x0}, + {OP_RD, 0x16627c, 0x0}, + {OP_IF_MODE_AND, 1, 0x1}, /* asic */ + {OP_WR, 0x166000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x166000, 0xa}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x166000, 0x1}, +/* #define XSDM_COMMON_END 683 */ +/* #define XSEM_COMMON_START 704 */ + {OP_ZP, 0x280400, 0x8b0000}, + {OP_WR_64, 0x280768, 0x130c9d}, + {OP_ZR, 0x2a0000, 0x4000}, + {OP_ZR, 0x2b2400, 0x40}, + {OP_SW, 0x2a3000, 0x20c9f}, + {OP_SW, 0x2a4000, 0x100ca1}, + {OP_SW, 0x2a8408, 0x80cb1}, + {OP_SW, 0x2a93c8, 0x40cb9}, + {OP_SW, 0x2a96f0, 0x20cbd}, + {OP_ZR, 0x2a96f8, 0x6}, + {OP_SW, 0x2a9940, 0x20cbf}, + {OP_WR, 0x2a9a28, 0x1}, + {OP_SW, 0x2ac0c0, 0x100cc1}, + {OP_WR, 0x2b8000, 0x0}, + {OP_WR, 0x2b8040, 0x18}, + {OP_WR, 0x2b8080, 0xc}, + {OP_WR, 0x2b80c0, 0x66}, + {OP_WR, 0x2b8380, 0x7a120}, + {OP_WR, 0x2b83c0, 0x1f4}, + {OP_WR, 0x2b8bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x1}, /* asic */ + {OP_WR, 0x2b8300, 0x7a120}, + {OP_WR, 0x2b8340, 0x1f4}, + {OP_IF_MODE_AND, 2, 0x2}, /* fpga */ + {OP_WR, 0x2b8300, 0x1388}, + {OP_WR, 0x2b8340, 0x5}, + {OP_IF_MODE_AND, 2, 0x4}, /* emul */ + {OP_WR, 0x2b8300, 0x138}, + {OP_WR, 0x2b8340, 0x0}, + {OP_IF_MODE_AND, 1, 0x20}, /* port2 */ + {OP_WR, 0x2a9a2c, 0x0}, + {OP_ZP, 0x2c0000, 0x38800000}, + {OP_ZP, 0x2c8000, 0x3a670e20}, + {OP_ZP, 0x2d0000, 0x39be1cba}, + {OP_ZP, 0x2d8000, 0x13bf2b2a}, + {OP_WR_64, 0x2da700, 0x4b200cd1}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x2b1480, 0x0}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x2b1480, 0x0}, + {OP_RD, 0x280000, 0x0}, + {OP_RD, 0x280004, 0x0}, + {OP_RD, 0x280008, 0x0}, + {OP_RD, 0x28000c, 0x0}, + {OP_RD, 0x280010, 0x0}, + {OP_RD, 0x280014, 0x0}, + {OP_SW, 0x280020, 0x1a0cd3}, + {OP_SW, 0x2800a4, 0x20ced}, + {OP_WR, 0x280224, 0x0}, + {OP_WR, 0x280234, 0x0}, + {OP_WR, 0x28024c, 0x0}, + {OP_WR, 0x2802e4, 0xffff}, + {OP_WB_ZR, 0x282000, 0x800}, +/* #define XSEM_COMMON_END 705 */ +/* #define XSEM_PORT0_START 706 */ + {OP_ZR, 0x2a5000, 0x2}, + {OP_ZR, 0x2a5010, 0x2}, + {OP_ZR, 0x2a5020, 0x2}, + {OP_ZR, 0x2a5030, 0x2}, + {OP_ZR, 0x2a93e0, 0x20}, + {OP_ZR, 0x2a94e0, 0xe}, + {OP_SW, 0x2a9518, 0x20cef}, + {OP_ZR, 0x2a9560, 0xe}, + {OP_SW, 0x2a9598, 0x20cf1}, + {OP_ZR, 0x2a95e0, 0xe}, + {OP_SW, 0x2a9618, 0x20cf3}, + {OP_ZR, 0x2a9660, 0xe}, + {OP_SW, 0x2a9698, 0x20cf5}, + {OP_SW, 0x2a9710, 0x20cf7}, +/* #define XSEM_PORT0_END 707 */ +/* #define XSEM_PORT1_START 708 */ + {OP_ZR, 0x2a5008, 0x2}, + {OP_ZR, 0x2a5018, 0x2}, + {OP_ZR, 0x2a5028, 0x2}, + {OP_ZR, 0x2a5038, 0x2}, + {OP_ZR, 0x2a9460, 0x20}, + {OP_ZR, 0x2a9520, 0xe}, + {OP_SW, 0x2a9558, 0x20cf9}, + {OP_ZR, 0x2a95a0, 0xe}, + {OP_SW, 0x2a95d8, 0x20cfb}, + {OP_ZR, 0x2a9620, 0xe}, + {OP_SW, 0x2a9658, 0x20cfd}, + {OP_ZR, 0x2a96a0, 0xe}, + {OP_SW, 0x2a96d8, 0x20cff}, + {OP_SW, 0x2a9718, 0x20d01}, +/* #define XSEM_PORT1_END 709 */ +/* #define XSEM_PF0_START 710 */ + {OP_ZR, 0x2a5048, 0xe}, + {OP_SW, 0x2a9720, 0x100d03}, + {OP_ZR, 0x2a9950, 0x2}, + {OP_ZR, 0x2ac000, 0x2}, +/* #define XSEM_PF0_END 711 */ +/* #define XSEM_PF1_START 712 */ + {OP_ZR, 0x2a5080, 0xe}, + {OP_SW, 0x2a9760, 0x100d13}, + {OP_ZR, 0x2a9958, 0x2}, + {OP_ZR, 0x2ac008, 0x2}, +/* #define XSEM_PF1_END 713 */ +/* #define XSEM_PF2_START 714 */ + {OP_ZR, 0x2a50b8, 0xe}, + {OP_SW, 0x2a97a0, 0x100d23}, + {OP_ZR, 0x2a9960, 0x2}, + {OP_ZR, 0x2ac010, 0x2}, +/* #define XSEM_PF2_END 715 */ +/* #define XSEM_PF3_START 716 */ + {OP_ZR, 0x2a50f0, 0xe}, + {OP_SW, 0x2a97e0, 0x100d33}, + {OP_ZR, 0x2a9968, 0x2}, + {OP_ZR, 0x2ac018, 0x2}, +/* #define XSEM_PF3_END 717 */ +/* #define XSEM_PF4_START 718 */ + {OP_ZR, 0x2a5128, 0xe}, + {OP_SW, 0x2a9820, 0x100d43}, + {OP_ZR, 0x2a9970, 0x2}, + {OP_ZR, 0x2ac020, 0x2}, +/* #define XSEM_PF4_END 719 */ +/* #define XSEM_PF5_START 720 */ + {OP_ZR, 0x2a5160, 0xe}, + {OP_SW, 0x2a9860, 0x100d53}, + {OP_ZR, 0x2a9978, 0x2}, + {OP_ZR, 0x2ac028, 0x2}, +/* #define XSEM_PF5_END 721 */ +/* #define XSEM_PF6_START 722 */ + {OP_ZR, 0x2a5198, 0xe}, + {OP_SW, 0x2a98a0, 0x100d63}, + {OP_ZR, 0x2a9980, 0x2}, + {OP_ZR, 0x2ac030, 0x2}, +/* #define XSEM_PF6_END 723 */ +/* #define XSEM_PF7_START 724 */ + {OP_ZR, 0x2a51d0, 0xe}, + {OP_SW, 0x2a98e0, 0x100d73}, + {OP_ZR, 0x2a9988, 0x2}, + {OP_ZR, 0x2ac038, 0x2}, +/* #define XSEM_PF7_END 725 */ +/* #define MISC_AEU_COMMON_START 726 */ + {OP_ZR, 0xa000, 0xc}, + {OP_ZR, 0xa050, 0x2}, + {OP_SW, 0xa0ec, 0x80d83}, + {OP_SW, 0xa18c, 0x80d8b}, + {OP_WR, 0xa45c, 0xc00}, + {OP_WR, 0xa61c, 0x3}, +/* #define MISC_AEU_COMMON_END 727 */ +/* #define MISC_AEU_PORT0_START 728 */ + {OP_SW, 0xa06c, 0x60d93}, + {OP_ZR, 0xa084, 0x5}, + {OP_WR, 0xa098, 0xfe00000}, + {OP_ZR, 0xa09c, 0x7}, + {OP_SW, 0xa0b8, 0xd0d99}, + {OP_ZR, 0xa22c, 0x4}, +/* #define MISC_AEU_PORT0_END 729 */ +/* #define MISC_AEU_PORT1_START 730 */ + {OP_SW, 0xa10c, 0x60da6}, + {OP_ZR, 0xa124, 0x5}, + {OP_WR, 0xa138, 0xfe00000}, + {OP_ZR, 0xa13c, 0x7}, + {OP_SW, 0xa158, 0xd0dac}, + {OP_ZR, 0xa23c, 0x4}, +/* #define MISC_AEU_PORT1_END 731 */ +/* #define MISC_AEU_PF0_START 732 */ + {OP_WR, 0xa030, 0x0}, +/* #define MISC_AEU_PF0_END 733 */ +/* #define MISC_AEU_PF1_START 734 */ + {OP_WR, 0xa034, 0x0}, +/* #define MISC_AEU_PF1_END 735 */ +/* #define MISC_AEU_PF2_START 736 */ + {OP_WR, 0xa038, 0x0}, +/* #define MISC_AEU_PF2_END 737 */ +/* #define MISC_AEU_PF3_START 738 */ + {OP_WR, 0xa03c, 0x0}, +/* #define MISC_AEU_PF3_END 739 */ +/* #define MISC_AEU_PF4_START 740 */ + {OP_WR, 0xa040, 0x0}, +/* #define MISC_AEU_PF4_END 741 */ +/* #define MISC_AEU_PF5_START 742 */ + {OP_WR, 0xa044, 0x0}, +/* #define MISC_AEU_PF5_END 743 */ +/* #define MISC_AEU_PF6_START 744 */ + {OP_WR, 0xa048, 0x0}, +/* #define MISC_AEU_PF6_END 745 */ +/* #define MISC_AEU_PF7_START 746 */ + {OP_WR, 0xa04c, 0x0}, +/* #define MISC_AEU_PF7_END 747 */ }; static const u16 init_ops_offsets_e1h[] = { - 0x0000, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0030, 0x0031, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0031, - 0x0052, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0052, 0x0089, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0089, 0x008d, 0x008d, 0x0091, 0x0091, 0x0095, 0x0095, 0x0099, 0x0099, - 0x009d, 0x009d, 0x00a1, 0x00a1, 0x00a5, 0x00a5, 0x00a9, 0x00a9, 0x00ae, - 0x00ae, 0x00b1, 0x00b1, 0x00b4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x00b4, 0x0308, 0x0308, 0x0312, 0x0312, 0x031c, 0x031c, - 0x0324, 0x0324, 0x032c, 0x032c, 0x0334, 0x0334, 0x033c, 0x033c, 0x0344, - 0x0344, 0x034c, 0x034c, 0x0354, 0x0354, 0x035c, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x035c, 0x0362, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0362, 0x0363, 0x0363, 0x0364, 0x0364, 0x0365, 0x0365, 0x0366, - 0x0366, 0x0367, 0x0367, 0x0368, 0x0368, 0x0369, 0x0369, 0x036a, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x036a, 0x0374, 0x0374, 0x0382, 0x0382, 0x0390, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0390, 0x0391, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0391, 0x03dd, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x03dd, 0x0408, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0408, 0x043a, 0x0000, 0x0000, - 0x0000, 0x0000, 0x043a, 0x0441, 0x0441, 0x0448, 0x0448, 0x044f, 0x044f, - 0x0456, 0x0456, 0x045d, 0x045d, 0x0464, 0x0464, 0x046b, 0x046b, 0x0472, - 0x0472, 0x04ab, 0x0000, 0x0000, 0x0000, 0x0000, 0x04ab, 0x04af, 0x04af, - 0x04b3, 0x04b3, 0x04b7, 0x04b7, 0x04bb, 0x04bb, 0x04bf, 0x04bf, 0x04c3, - 0x04c3, 0x04c7, 0x04c7, 0x04cb, 0x04cb, 0x051c, 0x051c, 0x0533, 0x0533, - 0x054a, 0x054a, 0x054c, 0x054c, 0x054e, 0x054e, 0x0550, 0x0550, 0x0552, - 0x0552, 0x0554, 0x0554, 0x0556, 0x0556, 0x0558, 0x0558, 0x055a, 0x055a, - 0x05f1, 0x05f1, 0x05f2, 0x05f2, 0x05f3, 0x05f3, 0x05f8, 0x05f8, 0x05fd, - 0x05fd, 0x0602, 0x0602, 0x0607, 0x0607, 0x060c, 0x060c, 0x0611, 0x0611, - 0x0616, 0x0616, 0x061b, 0x061b, 0x061c, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x061c, 0x062d, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x062d, 0x0642, 0x0642, 0x0645, 0x0645, 0x0648, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0648, 0x067e, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x067e, 0x0781, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0781, 0x0788, 0x0788, 0x078c, - 0x078c, 0x0790, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0790, 0x07d1, 0x0000, 0x0000, 0x0000, 0x0000, 0x07d1, 0x07da, 0x07da, - 0x07e3, 0x07e3, 0x07ec, 0x07ec, 0x07f5, 0x07f5, 0x07fe, 0x07fe, 0x0807, - 0x0807, 0x0810, 0x0810, 0x0819, 0x0819, 0x0870, 0x0870, 0x0884, 0x0884, - 0x0898, 0x0898, 0x089b, 0x089b, 0x089e, 0x089e, 0x08a1, 0x08a1, 0x08a4, - 0x08a4, 0x08a7, 0x08a7, 0x08aa, 0x08aa, 0x08ad, 0x08ad, 0x08b0, 0x08b0, - 0x08b9, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x08b9, 0x08bf, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x08bf, 0x08c2, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x08c2, 0x08c8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x08c8, 0x08d7, 0x08d7, 0x08e6, 0x08e6, 0x08f5, - 0x08f5, 0x0904, 0x0904, 0x0913, 0x0913, 0x0922, 0x0922, 0x0931, 0x0931, - 0x0940, 0x0940, 0x09b1, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x09b1, 0x09c6, 0x09c6, 0x09d7, - 0x09d7, 0x09e8, 0x09e8, 0x09e9, 0x09e9, 0x09ea, 0x09ea, 0x09eb, 0x09eb, - 0x09ec, 0x09ec, 0x09ed, 0x09ed, 0x09ee, 0x09ee, 0x09ef, 0x09ef, 0x09f0, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0005, 0x0005, 0x0008, 0x0008, + 0x000b, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x000b, + 0x0019, 0x0000, 0x0000, 0x0000, 0x0000, 0x0019, 0x001a, 0x001a, 0x001b, + 0x001b, 0x001c, 0x001c, 0x001d, 0x001d, 0x001e, 0x001e, 0x001f, 0x001f, + 0x0020, 0x0020, 0x0021, 0x0021, 0x0028, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0028, 0x002e, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x002e, 0x0049, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0049, 0x00b4, 0x0000, + 0x0000, 0x0000, 0x0000, 0x00b4, 0x00b9, 0x00b9, 0x00be, 0x00be, 0x00c3, + 0x00c3, 0x00c8, 0x00c8, 0x00cd, 0x00cd, 0x00d2, 0x00d2, 0x00d7, 0x00d7, + 0x00dc, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x00dc, 0x00e0, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00e0, 0x00e7, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x00e7, 0x00f7, 0x00f7, 0x0107, 0x0107, 0x0117, 0x0117, 0x0127, + 0x0127, 0x0137, 0x0137, 0x0147, 0x0147, 0x0157, 0x0157, 0x0167, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0167, 0x016d, 0x0000, 0x0000, 0x0000, 0x0000, + 0x016d, 0x016e, 0x016e, 0x016f, 0x016f, 0x0170, 0x0170, 0x0171, 0x0171, + 0x0172, 0x0172, 0x0173, 0x0173, 0x0174, 0x0174, 0x0175, 0x0175, 0x0178, + 0x0178, 0x0187, 0x0187, 0x0196, 0x0196, 0x0197, 0x0197, 0x0198, 0x0198, + 0x0199, 0x0199, 0x019a, 0x019a, 0x019b, 0x019b, 0x019c, 0x019c, 0x019d, + 0x019d, 0x019e, 0x019e, 0x01a4, 0x01a4, 0x01a8, 0x01a8, 0x01ac, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x01ac, 0x01be, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01be, 0x01cd, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x01cd, 0x01d0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x01d0, 0x01f0, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01f0, + 0x01f2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x01f2, 0x01ff, 0x0000, 0x0000, 0x0000, 0x0000, + 0x01ff, 0x0200, 0x0200, 0x0201, 0x0201, 0x0202, 0x0202, 0x0203, 0x0203, + 0x0204, 0x0204, 0x0205, 0x0205, 0x0206, 0x0206, 0x0207, 0x0207, 0x021b, + 0x021b, 0x021e, 0x021e, 0x0221, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0221, 0x023c, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x023c, 0x026d, 0x026d, + 0x0275, 0x0275, 0x027d, 0x027d, 0x0283, 0x0283, 0x0289, 0x0289, 0x028f, + 0x028f, 0x0295, 0x0295, 0x029b, 0x029b, 0x02a1, 0x02a1, 0x02a7, 0x02a7, + 0x02ad, 0x02ad, 0x02ba, 0x0000, 0x0000, 0x0000, 0x0000, 0x02ba, 0x02bb, + 0x02bb, 0x02bc, 0x02bc, 0x02bd, 0x02bd, 0x02be, 0x02be, 0x02bf, 0x02bf, + 0x02c0, 0x02c0, 0x02c1, 0x02c1, 0x02c2, 0x02c2, 0x02c3, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x02c3, 0x02df, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x02df, 0x030c, 0x030c, 0x0321, 0x0321, + 0x0336, 0x0336, 0x0338, 0x0338, 0x033a, 0x033a, 0x033c, 0x033c, 0x033e, + 0x033e, 0x0340, 0x0340, 0x0342, 0x0342, 0x0344, 0x0344, 0x0346, 0x0346, + 0x0358, 0x0000, 0x0000, 0x0000, 0x0000, 0x0358, 0x0360, 0x0360, 0x0368, + 0x0368, 0x0370, 0x0370, 0x0378, 0x0378, 0x0380, 0x0380, 0x0388, 0x0388, + 0x0390, 0x0390, 0x0398, 0x0398, 0x0399, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0399, 0x03b6, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x03b6, 0x03eb, 0x03eb, 0x03f9, 0x03f9, 0x0407, 0x0407, + 0x040b, 0x040b, 0x040f, 0x040f, 0x0413, 0x0413, 0x0417, 0x0417, 0x041b, + 0x041b, 0x041f, 0x041f, 0x0423, 0x0423, 0x0427, 0x0427, 0x042d, 0x042d, + 0x0433, 0x0433, 0x0439, 0x0439, 0x043a, 0x043a, 0x043b, 0x043b, 0x043c, + 0x043c, 0x043d, 0x043d, 0x043e, 0x043e, 0x043f, 0x043f, 0x0440, 0x0440, + 0x0441, }; static const u32 init_data_e1h[] = { - 0x00010000, 0x000204c0, 0x00030980, 0x00040e40, 0x00051300, 0x000617c0, - 0x00071c80, 0x00082140, 0x00092600, 0x000a2ac0, 0x000b2f80, 0x000c3440, - 0x000d3900, 0x000e3dc0, 0x000f4280, 0x00104740, 0x00114c00, 0x001250c0, - 0x00135580, 0x00145a40, 0x00155f00, 0x001663c0, 0x00176880, 0x00186d40, - 0x00197200, 0x001a76c0, 0x001b7b80, 0x001c8040, 0x001d8500, 0x001e89c0, - 0x001f8e80, 0x00009340, 0x00002000, 0x00004000, 0x00006000, 0x00008000, - 0x0000a000, 0x0000c000, 0x0000e000, 0x00010000, 0x00012000, 0x00014000, - 0x00016000, 0x00018000, 0x0001a000, 0x0001c000, 0x0001e000, 0x00020000, - 0x00022000, 0x00024000, 0x00026000, 0x00028000, 0x0002a000, 0x0002c000, - 0x0002e000, 0x00030000, 0x00032000, 0x00034000, 0x00036000, 0x00038000, - 0x0003a000, 0x0003c000, 0x0003e000, 0x00040000, 0x00042000, 0x00044000, - 0x00046000, 0x00048000, 0x0004a000, 0x0004c000, 0x0004e000, 0x00050000, - 0x00052000, 0x00054000, 0x00056000, 0x00058000, 0x0005a000, 0x0005c000, - 0x0005e000, 0x00060000, 0x00062000, 0x00064000, 0x00066000, 0x00068000, - 0x0006a000, 0x0006c000, 0x0006e000, 0x00070000, 0x00072000, 0x00074000, - 0x00076000, 0x00078000, 0x0007a000, 0x0007c000, 0x0007e000, 0x00080000, - 0x00082000, 0x00084000, 0x00086000, 0x00088000, 0x0008a000, 0x0008c000, - 0x0008e000, 0x00090000, 0x00092000, 0x00094000, 0x00096000, 0x00098000, - 0x0009a000, 0x0009c000, 0x0009e000, 0x000a0000, 0x000a2000, 0x000a4000, - 0x000a6000, 0x000a8000, 0x000aa000, 0x000ac000, 0x000ae000, 0x000b0000, - 0x000b2000, 0x000b4000, 0x000b6000, 0x000b8000, 0x000ba000, 0x000bc000, - 0x000be000, 0x000c0000, 0x000c2000, 0x000c4000, 0x000c6000, 0x000c8000, - 0x000ca000, 0x000cc000, 0x000ce000, 0x000d0000, 0x000d2000, 0x000d4000, - 0x000d6000, 0x000d8000, 0x000da000, 0x000dc000, 0x000de000, 0x000e0000, - 0x000e2000, 0x000e4000, 0x000e6000, 0x000e8000, 0x000ea000, 0x000ec000, - 0x000ee000, 0x000f0000, 0x000f2000, 0x000f4000, 0x000f6000, 0x000f8000, - 0x000fa000, 0x000fc000, 0x000fe000, 0x00100000, 0x00102000, 0x00104000, - 0x00106000, 0x00108000, 0x0010a000, 0x0010c000, 0x0010e000, 0x00110000, - 0x00112000, 0x00114000, 0x00116000, 0x00118000, 0x0011a000, 0x0011c000, - 0x0011e000, 0x00120000, 0x00122000, 0x00124000, 0x00126000, 0x00128000, - 0x0012a000, 0x0012c000, 0x0012e000, 0x00130000, 0x00132000, 0x00134000, - 0x00136000, 0x00138000, 0x0013a000, 0x0013c000, 0x0013e000, 0x00140000, - 0x00142000, 0x00144000, 0x00146000, 0x00148000, 0x0014a000, 0x0014c000, - 0x0014e000, 0x00150000, 0x00152000, 0x00154000, 0x00156000, 0x00158000, - 0x0015a000, 0x0015c000, 0x0015e000, 0x00160000, 0x00162000, 0x00164000, - 0x00166000, 0x00168000, 0x0016a000, 0x0016c000, 0x0016e000, 0x00170000, - 0x00172000, 0x00174000, 0x00176000, 0x00178000, 0x0017a000, 0x0017c000, - 0x0017e000, 0x00180000, 0x00182000, 0x00184000, 0x00186000, 0x00188000, - 0x0018a000, 0x0018c000, 0x0018e000, 0x00190000, 0x00192000, 0x00194000, - 0x00196000, 0x00198000, 0x0019a000, 0x0019c000, 0x0019e000, 0x001a0000, - 0x001a2000, 0x001a4000, 0x001a6000, 0x001a8000, 0x001aa000, 0x001ac000, - 0x001ae000, 0x001b0000, 0x001b2000, 0x001b4000, 0x001b6000, 0x001b8000, - 0x001ba000, 0x001bc000, 0x001be000, 0x001c0000, 0x001c2000, 0x001c4000, - 0x001c6000, 0x001c8000, 0x001ca000, 0x001cc000, 0x001ce000, 0x001d0000, - 0x001d2000, 0x001d4000, 0x001d6000, 0x001d8000, 0x001da000, 0x001dc000, - 0x001de000, 0x001e0000, 0x001e2000, 0x001e4000, 0x001e6000, 0x001e8000, - 0x001ea000, 0x001ec000, 0x001ee000, 0x001f0000, 0x001f2000, 0x001f4000, - 0x001f6000, 0x001f8000, 0x001fa000, 0x001fc000, 0x001fe000, 0x00200000, - 0x00202000, 0x00204000, 0x00206000, 0x00208000, 0x0020a000, 0x0020c000, - 0x0020e000, 0x00210000, 0x00212000, 0x00214000, 0x00216000, 0x00218000, - 0x0021a000, 0x0021c000, 0x0021e000, 0x00220000, 0x00222000, 0x00224000, - 0x00226000, 0x00228000, 0x0022a000, 0x0022c000, 0x0022e000, 0x00230000, - 0x00232000, 0x00234000, 0x00236000, 0x00238000, 0x0023a000, 0x0023c000, - 0x0023e000, 0x00240000, 0x00242000, 0x00244000, 0x00246000, 0x00248000, - 0x0024a000, 0x0024c000, 0x0024e000, 0x00250000, 0x00252000, 0x00254000, - 0x00256000, 0x00258000, 0x0025a000, 0x0025c000, 0x0025e000, 0x00260000, - 0x00262000, 0x00264000, 0x00266000, 0x00268000, 0x0026a000, 0x0026c000, - 0x0026e000, 0x00270000, 0x00272000, 0x00274000, 0x00276000, 0x00278000, - 0x0027a000, 0x0027c000, 0x0027e000, 0x00280000, 0x00282000, 0x00284000, - 0x00286000, 0x00288000, 0x0028a000, 0x0028c000, 0x0028e000, 0x00290000, - 0x00292000, 0x00294000, 0x00296000, 0x00298000, 0x0029a000, 0x0029c000, - 0x0029e000, 0x002a0000, 0x002a2000, 0x002a4000, 0x002a6000, 0x002a8000, - 0x002aa000, 0x002ac000, 0x002ae000, 0x002b0000, 0x002b2000, 0x002b4000, - 0x002b6000, 0x002b8000, 0x002ba000, 0x002bc000, 0x002be000, 0x002c0000, - 0x002c2000, 0x002c4000, 0x002c6000, 0x002c8000, 0x002ca000, 0x002cc000, - 0x002ce000, 0x002d0000, 0x002d2000, 0x002d4000, 0x002d6000, 0x002d8000, - 0x002da000, 0x002dc000, 0x002de000, 0x002e0000, 0x002e2000, 0x002e4000, - 0x002e6000, 0x002e8000, 0x002ea000, 0x002ec000, 0x002ee000, 0x002f0000, - 0x002f2000, 0x002f4000, 0x002f6000, 0x002f8000, 0x002fa000, 0x002fc000, - 0x002fe000, 0x00300000, 0x00302000, 0x00304000, 0x00306000, 0x00308000, - 0x0030a000, 0x0030c000, 0x0030e000, 0x00310000, 0x00312000, 0x00314000, - 0x00316000, 0x00318000, 0x0031a000, 0x0031c000, 0x0031e000, 0x00320000, - 0x00322000, 0x00324000, 0x00326000, 0x00328000, 0x0032a000, 0x0032c000, - 0x0032e000, 0x00330000, 0x00332000, 0x00334000, 0x00336000, 0x00338000, - 0x0033a000, 0x0033c000, 0x0033e000, 0x00340000, 0x00342000, 0x00344000, - 0x00346000, 0x00348000, 0x0034a000, 0x0034c000, 0x0034e000, 0x00350000, - 0x00352000, 0x00354000, 0x00356000, 0x00358000, 0x0035a000, 0x0035c000, - 0x0035e000, 0x00360000, 0x00362000, 0x00364000, 0x00366000, 0x00368000, - 0x0036a000, 0x0036c000, 0x0036e000, 0x00370000, 0x00372000, 0x00374000, - 0x00376000, 0x00378000, 0x0037a000, 0x0037c000, 0x0037e000, 0x00380000, - 0x00382000, 0x00384000, 0x00386000, 0x00388000, 0x0038a000, 0x0038c000, - 0x0038e000, 0x00390000, 0x00392000, 0x00394000, 0x00396000, 0x00398000, - 0x0039a000, 0x0039c000, 0x0039e000, 0x003a0000, 0x003a2000, 0x003a4000, - 0x003a6000, 0x003a8000, 0x003aa000, 0x003ac000, 0x003ae000, 0x003b0000, - 0x003b2000, 0x003b4000, 0x003b6000, 0x003b8000, 0x003ba000, 0x003bc000, - 0x003be000, 0x003c0000, 0x003c2000, 0x003c4000, 0x003c6000, 0x003c8000, - 0x003ca000, 0x003cc000, 0x003ce000, 0x003d0000, 0x003d2000, 0x003d4000, - 0x003d6000, 0x003d8000, 0x003da000, 0x003dc000, 0x003de000, 0x003e0000, - 0x003e2000, 0x003e4000, 0x003e6000, 0x003e8000, 0x003ea000, 0x003ec000, - 0x003ee000, 0x003f0000, 0x003f2000, 0x003f4000, 0x003f6000, 0x003f8000, - 0x003fa000, 0x003fc000, 0x003fe000, 0x003fe001, 0x00000000, 0x000001ff, - 0x00000200, 0x00007ff8, 0x00007ff8, 0x000001a2, 0x00003500, 0x00000000, - 0x00000001, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x00000001, - 0x00000000, 0x00201001, 0x00000000, 0x01009000, 0x00000100, 0x00009002, - 0x00009004, 0x00009006, 0x00009008, 0x0000900a, 0x0000900c, 0x0000900e, - 0x00009010, 0x00009012, 0x00009014, 0x00009016, 0x00009018, 0x0000901a, - 0x0000901c, 0x0000901e, 0x00009020, 0x00009022, 0x00009024, 0x00009026, - 0x00009028, 0x0000902a, 0x0000902c, 0x0000902e, 0x00009030, 0x00009032, - 0x00009034, 0x00009036, 0x00009038, 0x0000903a, 0x0000903c, 0x0000903e, - 0x00009040, 0x00009042, 0x00009044, 0x00009046, 0x00009048, 0x0000904a, - 0x0000904c, 0x0000904e, 0x00009050, 0x00009052, 0x00009054, 0x00009056, - 0x00009058, 0x0000905a, 0x0000905c, 0x0000905e, 0x00009060, 0x00009062, - 0x00009064, 0x00009066, 0x00009068, 0x0000906a, 0x0000906c, 0x0000906e, - 0x00009070, 0x00009072, 0x00009074, 0x00009076, 0x00009078, 0x0000907a, - 0x0000907c, 0x0000907e, 0x00009080, 0x00009082, 0x00009084, 0x00009086, - 0x00009088, 0x0000908a, 0x0000908c, 0x0000908e, 0x00009090, 0x00009092, - 0x00009094, 0x00009096, 0x00009098, 0x0000909a, 0x0000909c, 0x0000909e, - 0x000090a0, 0x000090a2, 0x000090a4, 0x000090a6, 0x000090a8, 0x000090aa, - 0x000090ac, 0x000090ae, 0x000090b0, 0x000090b2, 0x000090b4, 0x000090b6, - 0x000090b8, 0x000090ba, 0x000090bc, 0x000090be, 0x000090c0, 0x000090c2, - 0x000090c4, 0x000090c6, 0x000090c8, 0x000090ca, 0x000090cc, 0x000090ce, - 0x000090d0, 0x000090d2, 0x000090d4, 0x000090d6, 0x000090d8, 0x000090da, - 0x000090dc, 0x000090de, 0x000090e0, 0x000090e2, 0x000090e4, 0x000090e6, - 0x000090e8, 0x000090ea, 0x000090ec, 0x000090ee, 0x000090f0, 0x000090f2, - 0x000090f4, 0x000090f6, 0x000090f8, 0x000090fa, 0x000090fc, 0x000090fe, - 0x00009100, 0x00009102, 0x00009104, 0x00009106, 0x00009108, 0x0000910a, - 0x0000910c, 0x0000910e, 0x00009110, 0x00009112, 0x00009114, 0x00009116, - 0x00009118, 0x0000911a, 0x0000911c, 0x0000911e, 0x00009120, 0x00009122, - 0x00009124, 0x00009126, 0x00009128, 0x0000912a, 0x0000912c, 0x0000912e, - 0x00009130, 0x00009132, 0x00009134, 0x00009136, 0x00009138, 0x0000913a, - 0x0000913c, 0x0000913e, 0x00009140, 0x00009142, 0x00009144, 0x00009146, - 0x00009148, 0x0000914a, 0x0000914c, 0x0000914e, 0x00009150, 0x00009152, - 0x00009154, 0x00009156, 0x00009158, 0x0000915a, 0x0000915c, 0x0000915e, - 0x00009160, 0x00009162, 0x00009164, 0x00009166, 0x00009168, 0x0000916a, - 0x0000916c, 0x0000916e, 0x00009170, 0x00009172, 0x00009174, 0x00009176, - 0x00009178, 0x0000917a, 0x0000917c, 0x0000917e, 0x00009180, 0x00009182, - 0x00009184, 0x00009186, 0x00009188, 0x0000918a, 0x0000918c, 0x0000918e, - 0x00009190, 0x00009192, 0x00009194, 0x00009196, 0x00009198, 0x0000919a, - 0x0000919c, 0x0000919e, 0x000091a0, 0x000091a2, 0x000091a4, 0x000091a6, - 0x000091a8, 0x000091aa, 0x000091ac, 0x000091ae, 0x000091b0, 0x000091b2, - 0x000091b4, 0x000091b6, 0x000091b8, 0x000091ba, 0x000091bc, 0x000091be, - 0x000091c0, 0x000091c2, 0x000091c4, 0x000091c6, 0x000091c8, 0x000091ca, - 0x000091cc, 0x000091ce, 0x000091d0, 0x000091d2, 0x000091d4, 0x000091d6, - 0x000091d8, 0x000091da, 0x000091dc, 0x000091de, 0x000091e0, 0x000091e2, - 0x000091e4, 0x000091e6, 0x000091e8, 0x000091ea, 0x000091ec, 0x000091ee, - 0x000091f0, 0x000091f2, 0x000091f4, 0x000091f6, 0x000091f8, 0x000091fa, - 0x000091fc, 0x000091fe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000003, 0x00bebc20, - 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, - 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, - 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, - 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, - 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, - 0x00002000, 0x000040c0, 0x00006180, 0x00008240, 0x0000a300, 0x0000c3c0, - 0x0000e480, 0x00010540, 0x00012600, 0x000146c0, 0x00016780, 0x00018840, - 0x0001a900, 0x0001c9c0, 0x0001ea80, 0x00020b40, 0x00022c00, 0x00024cc0, - 0x00026d80, 0x00028e40, 0x0002af00, 0x0002cfc0, 0x0002f080, 0x00001140, - 0x00008000, 0x00010380, 0x00018700, 0x00020a80, 0x00028e00, 0x00031180, - 0x00039500, 0x00041880, 0x00049c00, 0x00051f80, 0x0005a300, 0x00062680, - 0x0006aa00, 0x00072d80, 0x0007b100, 0x00083480, 0x0008b800, 0x00093b80, - 0x0009bf00, 0x000a4280, 0x000ac600, 0x000b4980, 0x000bcd00, 0x000c5080, - 0x000cd400, 0x000d5780, 0x00005b00, 0x00007ff8, 0x00007ff8, 0x00000138, - 0x00003500, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x00001900, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0x00000000, 0x03938700, 0x00000000, 0x03938700, - 0x00007ff8, 0x00007ff8, 0x000006b9, 0x00001500, 0x0000ff00, 0x0fffffff, - 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, - 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, - 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, - 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, - 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, - 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, - 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, - 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, - 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, - 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, - 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, - 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, - 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, - 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, - 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, - 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, - 0x0000ff00, 0x0fffffff, 0x000000ff, 0x0000ff00, 0x0fffffff, 0x0000ff00, - 0x0fffffff, 0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff, - 0x000000ff, 0x000000ff, 0x000000ff, 0x000000ff, 0x0000ff00, 0x00000000, - 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, - 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, - 0x0000ff00, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00001000, 0x00002080, - 0x00003100, 0x00004180, 0x00005200, 0x00006280, 0x00007300, 0x00008380, - 0x00009400, 0x0000a480, 0x0000b500, 0x0000c580, 0x0000d600, 0x0000e680, - 0x0000f700, 0x00010780, 0x00011800, 0x00012880, 0x00013900, 0x00014980, - 0x00015a00, 0x00016a80, 0x00017b00, 0x00018b80, 0x00019c00, 0x0001ac80, - 0x0001bd00, 0x0001cd80, 0x0001de00, 0x0001ee80, 0x0001ff00, 0x00000f80, - 0x00007ff8, 0x00007ff8, 0x00000381, 0x00003500, 0x10000000, 0x000028ad, - 0x00010001, 0x00260106, 0xccccccc5, 0xffffffff, 0xffffffff, 0x7058103c, - 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, - 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, - 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x00000000, 0x00000001, - 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, - 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, - 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0x000e0000, 0x011600d6, 0x002625a0, 0x002625a0, 0x002625a0, 0x002625a0, - 0x00720000, 0x012300f3, 0x002625a0, 0x002625a0, 0x002625a0, 0x002625a0, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0xfffffff3, 0x318fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x30efffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, - 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, - 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, - 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7, 0x31efffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x302fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, - 0xfffffff3, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, - 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, - 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, - 0xfffffff7, 0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x304fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x320fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, - 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, - 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, - 0xffffff8a, 0x042fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, - 0x0010cf3c, 0xcdcdcdcd, 0xffffff97, 0x05cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x310fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, - 0xfffffff3, 0x320fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x302fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, - 0xffffff06, 0x1cbfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cc014, 0xf3cf3cf3, - 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, - 0xfffffff7, 0x31cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0x000c0000, 0x000700c0, - 0x00028130, 0x000b8158, 0x00020210, 0x00010230, 0x000f0240, 0x00010330, - 0x00080000, 0x00080080, 0x00028100, 0x000b8128, 0x000201e0, 0x00010200, - 0x00070210, 0x00020280, 0x00100000, 0x00080100, 0x00028180, 0x000b81a8, - 0x00020260, 0x00018280, 0x000e8298, 0x00080380, 0x00100000, 0x00010100, - 0x00028110, 0x00090138, 0x000201c8, 0x000101e8, 0x000e01f8, 0x000002d8, - 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000, 0xcccccccc, - 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000, 0xcccccccc, 0xcccccccc, - 0xcccccccc, 0xcccccccc, 0x04002000 -}; - -static const u8 tsem_int_table_data_e1h[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, - 0xcf, 0xc0, 0xf0, 0x03, 0x8a, 0x45, 0xd8, 0x19, 0x18, 0xb4, 0xb9, 0x11, - 0x7c, 0x7a, 0x60, 0x16, 0x06, 0xca, 0xf4, 0xeb, 0xb1, 0x32, 0x30, 0x98, - 0x01, 0x71, 0x28, 0x10, 0xdb, 0xb1, 0xe2, 0x57, 0xdb, 0xc7, 0x84, 0x29, - 0xf6, 0x4a, 0x1a, 0xc1, 0x3e, 0x28, 0xc9, 0xc0, 0xf0, 0x14, 0x88, 0xd7, - 0x8a, 0x33, 0x30, 0x2c, 0x90, 0x42, 0x88, 0x07, 0xca, 0x30, 0x30, 0xfc, - 0x04, 0xf2, 0x8f, 0x40, 0xc5, 0xcc, 0x80, 0x7a, 0x36, 0x4a, 0x53, 0xe6, - 0xee, 0x51, 0x3c, 0x38, 0xb0, 0xb9, 0x26, 0x2a, 0x5f, 0x4a, 0x1d, 0x42, - 0xaf, 0xd3, 0x80, 0xd0, 0x16, 0x68, 0xf2, 0xd2, 0x50, 0x79, 0x3d, 0x25, - 0x08, 0x6d, 0xa9, 0x89, 0xdd, 0x5c, 0x7d, 0x25, 0xe2, 0xec, 0x67, 0x95, - 0x45, 0xe5, 0x73, 0xc8, 0xe2, 0x57, 0x5f, 0x83, 0x26, 0xcf, 0x86, 0xc6, - 0x67, 0x87, 0xf2, 0x01, 0x16, 0xb7, 0xe6, 0x53, 0xd8, 0x03, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; - -static const u8 tsem_pram_data_e1h[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xed, 0x7d, - 0x0b, 0x74, 0x54, 0x57, 0xb9, 0xf0, 0x3e, 0x73, 0x1e, 0xf3, 0x9e, 0x39, - 0x81, 0x3c, 0x66, 0x20, 0x49, 0x4f, 0x42, 0x80, 0x80, 0xa1, 0x0c, 0x10, - 0x42, 0x68, 0xb1, 0x9e, 0x40, 0xa0, 0x51, 0xa3, 0x0e, 0x8f, 0xd2, 0xa8, - 0x5c, 0x3b, 0x20, 0x6d, 0xc3, 0x2b, 0xa4, 0x88, 0x6d, 0xae, 0x76, 0x39, - 0x03, 0x79, 0x42, 0xa0, 0x4d, 0x5a, 0x2f, 0x72, 0x15, 0x7b, 0xa7, 0x48, - 0x7b, 0x53, 0x17, 0x6a, 0xc4, 0xd8, 0x52, 0x17, 0x75, 0x4d, 0xa0, 0xb7, - 0x8d, 0xeb, 0xfa, 0xff, 0xa6, 0xb4, 0xb6, 0xfd, 0x15, 0xbc, 0xe9, 0xc3, - 0xda, 0x22, 0x60, 0xec, 0x2f, 0x17, 0xbc, 0xbf, 0xca, 0xbf, 0xbf, 0x6f, - 0xef, 0x93, 0x39, 0x67, 0x32, 0x93, 0x84, 0xda, 0xd6, 0xba, 0xee, 0x4d, - 0x57, 0xd9, 0xd9, 0xe7, 0xec, 0xb3, 0xf7, 0xb7, 0xbf, 0xf7, 0xfe, 0xf6, - 0xb7, 0x77, 0x14, 0x61, 0x06, 0xc9, 0xbd, 0x8e, 0x90, 0xab, 0xf0, 0xf3, - 0x11, 0x42, 0x0e, 0x0b, 0x84, 0x90, 0x85, 0xc9, 0x92, 0x6c, 0xf5, 0xdb, - 0x48, 0x2e, 0x21, 0x5f, 0x74, 0x10, 0xfc, 0xb9, 0xec, 0xf4, 0x5d, 0x4f, - 0xfc, 0x84, 0x34, 0x39, 0x58, 0x79, 0x8f, 0xcb, 0x77, 0x18, 0xca, 0xf6, - 0x28, 0x21, 0x09, 0x3b, 0xbc, 0x2f, 0x8c, 0x13, 0x1f, 0x21, 0xb4, 0x79, - 0xa9, 0x94, 0x0d, 0x5f, 0xb8, 0x42, 0x8f, 0x14, 0x41, 0xd9, 0x38, 0x37, - 0x3c, 0x07, 0xcb, 0x45, 0x50, 0x4e, 0x22, 0x36, 0x42, 0x72, 0xa0, 0x9e, - 0xaf, 0xbe, 0xe1, 0x66, 0x7d, 0x5f, 0x15, 0xe9, 0x3f, 0x67, 0x22, 0x55, - 0x30, 0x9e, 0xc8, 0x1e, 0x11, 0x89, 0x54, 0x86, 0x12, 0xf8, 0xfd, 0x97, - 0x09, 0xa9, 0x48, 0xc2, 0x41, 0x1a, 0x3f, 0xa5, 0x86, 0xbd, 0x49, 0xb8, - 0x53, 0x4b, 0x51, 0x55, 0x48, 0x82, 0xb7, 0xbd, 0x0a, 0xff, 0x88, 0xeb, - 0xfc, 0x11, 0x4f, 0xe6, 0xf6, 0x4d, 0x67, 0xaa, 0xe2, 0x4f, 0x97, 0x26, - 0xdb, 0x4f, 0x27, 0xde, 0x6c, 0x84, 0x4b, 0x22, 0x12, 0xc2, 0xc5, 0xbf, - 0x27, 0x24, 0x46, 0x00, 0x3e, 0x27, 0x07, 0x23, 0xb5, 0x9f, 0xcb, 0x51, - 0x3d, 0xfe, 0xb4, 0x3c, 0x1a, 0x6f, 0x99, 0xc6, 0x35, 0xf0, 0xd6, 0x1a, - 0x75, 0x60, 0xd9, 0x1c, 0x55, 0xb1, 0xa4, 0x5d, 0xe8, 0xbd, 0x74, 0x3c, - 0xb9, 0x84, 0xe8, 0x87, 0xd3, 0xc0, 0x5d, 0x4d, 0x04, 0x8e, 0x3f, 0x0e, - 0x0f, 0x8c, 0xa3, 0xd1, 0xf6, 0x80, 0x73, 0xfa, 0xff, 0xde, 0x32, 0x12, - 0x77, 0x03, 0x0d, 0x49, 0xc4, 0x82, 0xb7, 0xbd, 0x25, 0xc7, 0x1c, 0x7a, - 0x59, 0x66, 0x78, 0x48, 0x99, 0x09, 0x6f, 0xc5, 0xa3, 0xe7, 0xab, 0x70, - 0xb8, 0x94, 0x0c, 0x70, 0xdd, 0x0a, 0x70, 0x2d, 0x1c, 0x0d, 0x97, 0x12, - 0x48, 0x85, 0xab, 0x9e, 0x98, 0xf1, 0x73, 0xad, 0x70, 0xd9, 0x67, 0x11, - 0x32, 0x58, 0x06, 0xf4, 0x89, 0xd3, 0x77, 0xf0, 0xf4, 0x0b, 0x96, 0xfe, - 0x6c, 0xa5, 0xf1, 0xd8, 0x50, 0x9a, 0xfe, 0x48, 0x29, 0xed, 0x87, 0xd2, - 0x59, 0xd2, 0xf8, 0xfc, 0x26, 0x48, 0x27, 0x47, 0xbe, 0xcd, 0xc2, 0x4f, - 0x4a, 0xb6, 0x0b, 0xfb, 0x31, 0xea, 0x92, 0x67, 0x92, 0x95, 0xdf, 0x52, - 0xf9, 0x1a, 0xf0, 0x81, 0xf4, 0xea, 0xe2, 0xf8, 0x19, 0x94, 0x98, 0x3c, - 0x18, 0x75, 0x9d, 0x00, 0x3f, 0x27, 0xdb, 0xc5, 0x2c, 0xf4, 0x35, 0xe4, - 0x21, 0x75, 0x9e, 0x62, 0x5e, 0x45, 0xdd, 0xc3, 0x63, 0xc0, 0x2d, 0x66, - 0x2b, 0x16, 0x38, 0x93, 0xfd, 0xd2, 0x01, 0x69, 0x3f, 0x01, 0x83, 0xae, - 0x40, 0x93, 0x20, 0x21, 0xd3, 0x4a, 0xb5, 0xa5, 0x36, 0x8a, 0x9b, 0x83, - 0xda, 0x95, 0xc0, 0x06, 0xe8, 0x5f, 0x54, 0x9d, 0xbb, 0xe9, 0xbb, 0x60, - 0xe9, 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0xf0, 0xdd, 0xfc, 0xa2, 0x57, 0x72, 0x0b, 0xd0, 0x1e, 0xa8, 0xe3, - 0x83, 0xf1, 0x0c, 0xf8, 0xa5, 0xf7, 0x33, 0x9f, 0x0b, 0xfc, 0xfe, 0x2c, - 0xe0, 0xb7, 0x0d, 0xf1, 0x1b, 0x9c, 0xb7, 0xff, 0xa1, 0x78, 0xf5, 0x25, - 0xf3, 0xf3, 0x5c, 0xdf, 0x86, 0xcb, 0x29, 0xf8, 0x2e, 0x71, 0x29, 0xde, - 0x7f, 0xc3, 0x77, 0x44, 0x4a, 0xfe, 0x8b, 0xb5, 0x6a, 0xf3, 0x5a, 0x80, - 0x2f, 0x27, 0xe6, 0x37, 0x7a, 0x9f, 0x6b, 0x31, 0x3a, 0x1f, 0x33, 0x2a, - 0xf6, 0xc4, 0xa8, 0x8e, 0x1f, 0x22, 0x69, 0xc6, 0x8f, 0x89, 0xb4, 0xef, - 0x45, 0xfc, 0xbc, 0xa1, 0xe8, 0x0d, 0xe8, 0xef, 0xd2, 0xc1, 0xfa, 0xad, - 0x8a, 0x7e, 0x6a, 0x55, 0xe2, 0xee, 0xe0, 0xfc, 0x4b, 0xab, 0x87, 0xe7, - 0x4d, 0x5b, 0x13, 0x0d, 0xe4, 0x47, 0xa3, 0xff, 0x83, 0xed, 0xaa, 0xff, - 0xf3, 0xe0, 0x3e, 0x9e, 0x37, 0x7d, 0x30, 0x95, 0xfb, 0xd9, 0xb8, 0x4f, - 0xa4, 0xb3, 0x70, 0x68, 0x37, 0xf9, 0x0b, 0x3d, 0x79, 0x71, 0xc1, 0x4a, - 0xef, 0x72, 0xd7, 0x1b, 0x1c, 0x27, 0x70, 0x1f, 0xcc, 0xb1, 0x8c, 0xec, - 0x99, 0x38, 0x14, 0xe8, 0x8c, 0xe7, 0x21, 0x7f, 0xfa, 0x89, 0x92, 0x47, - 0xe0, 0xf6, 0xb1, 0x48, 0xb1, 0x87, 0x45, 0x38, 0x0f, 0xee, 0x2b, 0x27, - 0x92, 0xec, 0x64, 0xa1, 0xb2, 0x2e, 0xc4, 0x17, 0x94, 0xbf, 0x1b, 0xcb, - 0x1c, 0x8a, 0xff, 0xa0, 0xe4, 0xdf, 0x56, 0xef, 0xd6, 0xe4, 0x1f, 0xfe, - 0x1b, 0x58, 0x34, 0xdd, 0x1d, 0x60, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const u8 usem_int_table_data_e1h[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, - 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0xcb, 0x73, 0xa2, 0xf2, 0xbb, 0xd1, 0xf8, - 0x73, 0xd8, 0x51, 0xf9, 0x07, 0xd0, 0xf8, 0x65, 0xac, 0xa8, 0x7c, 0x61, - 0x34, 0xfd, 0xe8, 0xf8, 0x3a, 0x13, 0x7e, 0x79, 0x42, 0x38, 0x85, 0x99, - 0x81, 0x21, 0x07, 0x88, 0x4b, 0x80, 0xb8, 0x86, 0x19, 0xbf, 0xda, 0x95, - 0x04, 0xec, 0x6a, 0x17, 0x63, 0x60, 0x08, 0x94, 0x64, 0x60, 0x88, 0x07, - 0xd2, 0x4f, 0x24, 0x18, 0x18, 0xf4, 0x81, 0xec, 0x20, 0x20, 0x5e, 0x04, - 0xe4, 0x9f, 0x05, 0xe2, 0x7b, 0x40, 0x6c, 0x0d, 0x14, 0x67, 0x17, 0x67, - 0x60, 0xb0, 0x03, 0x62, 0x71, 0x71, 0x88, 0xbe, 0x18, 0x10, 0x5b, 0x82, - 0x3c, 0xf7, 0xb7, 0xf2, 0x51, 0xe6, 0xff, 0x51, 0x4c, 0x19, 0x66, 0x94, - 0x43, 0xe5, 0xff, 0x53, 0x63, 0x60, 0x30, 0xd7, 0x60, 0x60, 0x68, 0xd0, - 0x84, 0x8a, 0xc9, 0x22, 0xe4, 0xa6, 0x03, 0xc5, 0xfe, 0xab, 0x41, 0xd8, - 0x53, 0x15, 0x18, 0x18, 0xa4, 0x80, 0xfc, 0xf7, 0xb2, 0xd8, 0xcd, 0x9d, - 0x06, 0x94, 0x97, 0x06, 0xca, 0xaf, 0xd0, 0xc4, 0x6f, 0xff, 0x4c, 0x5d, - 0x54, 0xfe, 0x6b, 0x33, 0x54, 0xbe, 0x3f, 0x9a, 0xbc, 0x96, 0x23, 0x2a, - 0x7f, 0x8f, 0x13, 0x2a, 0xff, 0x88, 0x33, 0x84, 0x06, 0x00, 0xb5, 0x31, - 0xb4, 0xb3, 0xd8, 0x03, 0x00, 0x00, 0x00, 0x00 -}; - -static const u8 usem_pram_data_e1h[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xdd, 0x7d, - 0x0b, 0x78, 0x54, 0xd5, 0xb9, 0xe8, 0xda, 0xaf, 0x99, 0x3d, 0xcf, 0xec, - 0x24, 0x93, 0x30, 0xe4, 0x01, 0x3b, 0x21, 0x81, 0xa8, 0x11, 0x86, 0xf0, - 0x0a, 0x0f, 0x71, 0x27, 0x04, 0x8c, 0x36, 0xc5, 0x09, 0xa0, 0xa5, 0xbd, - 0xb4, 0x1d, 0xd0, 0xda, 0x88, 0x3c, 0x22, 0xd2, 0x8a, 0x55, 0x9b, 0x09, - 0x49, 0x48, 0x78, 0xc5, 0xd8, 0x5a, 0xe5, 0x40, 0x8f, 0x0e, 0xa8, 0x1c, - 0x50, 0x6c, 0xa3, 0x45, 0x6b, 0xd5, 0xda, 0x09, 0xd0, 0x16, 0x1f, 0xad, - 0xd1, 0x62, 0xc5, 0xd6, 0x9e, 0x46, 0xea, 0xf1, 0x58, 0x0e, 0x70, 0xe2, - 0x03, 0xf5, 0xb4, 0x28, 0x77, 0xfd, 0xff, 0x5a, 0x3b, 0xd9, 0x7b, 0x67, - 0x26, 0xa0, 0x3d, 0xf7, 0x7e, 0xe7, 0x5e, 0xce, 0x63, 0xb9, 0x66, 0xaf, - 0xc7, 0xbf, 0xfe, 0xf5, 0xbf, 0xd7, 0xbf, 0x56, 0x5c, 0xc2, 0x58, 0xa2, - 0x8d, 0x26, 0xe4, 0x2c, 0xfc, 0xbb, 0x94, 0x90, 0x4a, 0x81, 0x10, 0x32, - 0x65, 0xb0, 0x24, 0xa4, 0x8b, 0x97, 0x31, 0x57, 0xf4, 0x62, 0x6b, 0x3d, - 0x4a, 0x58, 0x3d, 0x4e, 0x48, 0x8e, 0xa3, 0xcc, 0x25, 0x44, 0x22, 0xe6, - 0xbf, 0x9b, 0xb0, 0xfe, 0x2d, 0x95, 0xd5, 0xa4, 0x11, 0x53, 0x17, 0xef, - 0x24, 0x83, 0xf3, 0x39, 0x4b, 0x29, 0xe4, 0x22, 0xc9, 0x32, 0xd6, 0xf6, - 0x2c, 0xb1, 0x8e, 0x4b, 0x0c, 0x18, 0x27, 0xcc, 0x47, 0x2d, 0x09, 0x47, - 0x45, 0x91, 0x96, 0x3e, 0x80, 0x73, 0x3a, 0x21, 0xdb, 0x0a, 0x2a, 0x5f, - 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0x00256000, 0x00258000, + 0x0025a000, 0x0025c000, 0x0025e000, 0x00260000, 0x00262000, 0x00264000, + 0x00266000, 0x00268000, 0x0026a000, 0x0026c000, 0x0026e000, 0x00270000, + 0x00272000, 0x00274000, 0x00276000, 0x00278000, 0x0027a000, 0x0027c000, + 0x0027e000, 0x00280000, 0x00282000, 0x00284000, 0x00286000, 0x00288000, + 0x0028a000, 0x0028c000, 0x0028e000, 0x00290000, 0x00292000, 0x00294000, + 0x00296000, 0x00298000, 0x0029a000, 0x0029c000, 0x0029e000, 0x002a0000, + 0x002a2000, 0x002a4000, 0x002a6000, 0x002a8000, 0x002aa000, 0x002ac000, + 0x002ae000, 0x002b0000, 0x002b2000, 0x002b4000, 0x002b6000, 0x002b8000, + 0x002ba000, 0x002bc000, 0x002be000, 0x002c0000, 0x002c2000, 0x002c4000, + 0x002c6000, 0x002c8000, 0x002ca000, 0x002cc000, 0x002ce000, 0x002d0000, + 0x002d2000, 0x002d4000, 0x002d6000, 0x002d8000, 0x002da000, 0x002dc000, + 0x002de000, 0x002e0000, 0x002e2000, 0x002e4000, 0x002e6000, 0x002e8000, + 0x002ea000, 0x002ec000, 0x002ee000, 0x002f0000, 0x002f2000, 0x002f4000, + 0x002f6000, 0x002f8000, 0x002fa000, 0x002fc000, 0x002fe000, 0x00300000, + 0x00302000, 0x00304000, 0x00306000, 0x00308000, 0x0030a000, 0x0030c000, + 0x0030e000, 0x00310000, 0x00312000, 0x00314000, 0x00316000, 0x00318000, + 0x0031a000, 0x0031c000, 0x0031e000, 0x00320000, 0x00322000, 0x00324000, + 0x00326000, 0x00328000, 0x0032a000, 0x0032c000, 0x0032e000, 0x00330000, + 0x00332000, 0x00334000, 0x00336000, 0x00338000, 0x0033a000, 0x0033c000, + 0x0033e000, 0x00340000, 0x00342000, 0x00344000, 0x00346000, 0x00348000, + 0x0034a000, 0x0034c000, 0x0034e000, 0x00350000, 0x00352000, 0x00354000, + 0x00356000, 0x00358000, 0x0035a000, 0x0035c000, 0x0035e000, 0x00360000, + 0x00362000, 0x00364000, 0x00366000, 0x00368000, 0x0036a000, 0x0036c000, + 0x0036e000, 0x00370000, 0x00372000, 0x00374000, 0x00376000, 0x00378000, + 0x0037a000, 0x0037c000, 0x0037e000, 0x00380000, 0x00382000, 0x00384000, + 0x00386000, 0x00388000, 0x0038a000, 0x0038c000, 0x0038e000, 0x00390000, + 0x00392000, 0x00394000, 0x00396000, 0x00398000, 0x0039a000, 0x0039c000, + 0x0039e000, 0x003a0000, 0x003a2000, 0x003a4000, 0x003a6000, 0x003a8000, + 0x003aa000, 0x003ac000, 0x003ae000, 0x003b0000, 0x003b2000, 0x003b4000, + 0x003b6000, 0x003b8000, 0x003ba000, 0x003bc000, 0x003be000, 0x003c0000, + 0x003c2000, 0x003c4000, 0x003c6000, 0x003c8000, 0x003ca000, 0x003cc000, + 0x003ce000, 0x003d0000, 0x003d2000, 0x003d4000, 0x003d6000, 0x003d8000, + 0x003da000, 0x003dc000, 0x003de000, 0x003e0000, 0x003e2000, 0x003e4000, + 0x003e6000, 0x003e8000, 0x003ea000, 0x003ec000, 0x003ee000, 0x003f0000, + 0x003f2000, 0x003f4000, 0x003f6000, 0x003f8000, 0x003fa000, 0x003fc000, + 0x003fe000, 0x003fe001, 0x00000000, 0x000001ff, 0x00000200, 0x00000001, + 0x00000002, 0x00000000, 0x00000008, 0x02150020, 0x02150020, 0x08100000, + 0x00000033, 0x00000002, 0x00000000, 0x00000005, 0x00000005, 0x00000000, + 0x00000000, 0x00000002, 0x00000003, 0x00000002, 0x00000001, 0x00000004, + 0x00000002, 0x00000002, 0x00000001, 0x00000002, 0x00000020, 0x00000040, + 0x00000040, 0x00000003, 0x00000018, 0x00002000, 0x000040c0, 0x00006180, + 0x00008240, 0x0000a300, 0x0000c3c0, 0x0000e480, 0x00010540, 0x00012600, + 0x000146c0, 0x00016780, 0x00018840, 0x0001a900, 0x0001c9c0, 0x0001ea80, + 0x00020b40, 0x00022c00, 0x00024cc0, 0x00026d80, 0x00028e40, 0x0002af00, + 0x0002cfc0, 0x0002f080, 0x00001140, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x0003d000, 0x0000003d, 0x00000001, 0x000d0000, 0x000700d0, 0x00028140, + 0x000b8168, 0x00020220, 0x00010240, 0x000f0250, 0x00010340, 0x000c0000, + 0x000800c0, 0x00028140, 0x000b8168, 0x00020220, 0x00010240, 0x00070250, + 0x000202c0, 0x00100000, 0x00080100, 0x00028180, 0x000b81a8, 0x00020260, + 0x00018280, 0x000e8298, 0x00080380, 0x00000000, 0x00000000, 0x00028000, + 0x00090028, 0x000200b8, 0x000100d8, 0x000000e8, 0x000000e8, 0xfffffff3, + 0x01afffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xfffffff1, 0x00efffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00010000, 0x00000000, 0xfffffff6, 0x005fffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00020000, 0x00000000, 0xfffff406, + 0x1cbfffff, 0x00000005, 0x00000000, 0x00000014, 0x00000000, 0x00040000, + 0x00000000, 0xfffffff2, 0x004fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00080000, 0x00000000, 0xfffffffa, 0x002fffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0xfffffff7, + 0x01efffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, + 0x00000000, 0xfffffff5, 0x002fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00400000, 0x00000000, 0xfffffff3, 0x018fffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffff1, + 0x010fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, + 0x00000000, 0xfffffff6, 0x005fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, 0x00000000, 0xfffff406, 0x1cbfffff, 0x00000005, + 0x00000000, 0x00000014, 0x00000000, 0x00040000, 0x00000000, 0xfffffff2, + 0x004fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, + 0x00000000, 0xfffffffa, 0x002fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00100000, 0x00000000, 0xfffffff7, 0x00efffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000000, 0xfffffff5, + 0x004fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00010000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00020000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00040000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00080000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00100000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00200000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00400000, 0x00000000, 0xfffffff3, + 0x020fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xfffffff1, 0x010fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00010000, 0x00000000, 0xfffffff6, 0x005fffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00020000, 0x00000000, 0xfffff406, + 0x1cbfffff, 0x00000005, 0x00000000, 0x00000014, 0x00000000, 0x00040000, + 0x00000000, 0xfffffff2, 0x004fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00080000, 0x00000000, 0xffffff8a, 0x042fffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0xffffff97, + 0x05cfffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, + 0x00000000, 0xfffffff5, 0x010fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00400000, 0x00000000, 0xfffffff3, 0x000fffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffff1, + 0x000fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, + 0x00000000, 0xfffffff6, 0x005fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, 0x00000000, 0xffffff06, 0x1cbfffff, 0x00000000, + 0x00000000, 0x00000014, 0x00000000, 0x00040000, 0x00000000, 0xfffffff2, + 0x004fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, + 0x00000000, 0xfffffffa, 0x002fffff, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00100000, 0x00000000, 0xfffffff7, 0x000fffff, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00400000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00010000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00020000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00040000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00080000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00100000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00200000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00400000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00000000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00010000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00020000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00040000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00080000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00100000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00200000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00400000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00000000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00010000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00020000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00040000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00080000, + 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, + 0x00000000, 0x00100000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, + 0x00000000, 0x000000cc, 0x00000000, 0x00200000, 0x00000000, 0xffffffff, + 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00400000, + 0x00000000, 0x00000211, 0x00000200, 0x00000204, 0x0000ffff, 0x0000ffff, + 0x0000ffff, 0x0000ffff, 0x00000020, 0x00000021, 0x00000022, 0x00000023, + 0x00000024, 0x00000025, 0x00000026, 0x00000027, 0x00000028, 0x00000029, + 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 0x0000002e, 0x0000002f, + 0x00000010, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x07ffffff, 0x0000003f, 0x07ffffff, 0x0000000f, 0x00007ff8, 0x00007ff8, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x00000316, 0x00001500, 0x00000001, 0x00000002, 0x00000003, 0x00000000, + 0x00000004, 0x00000001, 0x00000000, 0x00000001, 0x00000004, 0x00000000, + 0x00000001, 0x00000003, 0x00000000, 0x00000001, 0x00000004, 0x00000000, + 0x00000001, 0x00000003, 0x00000000, 0x00000001, 0x00000004, 0x00000000, + 0x00000004, 0x00000003, 0x00000000, 0x00000000, 0x00003fff, 0x000003ff, + 0x00000000, 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0x00000000, 0x00000002, 0x00000007, 0x00000002, 0x00000002, + 0x00000001, 0x00000003, 0x00000001, 0x00000002, 0x00000040, 0x00000040, + 0x00000004, 0x00000020, 0x0000000f, 0x0000001b, 0x00008000, 0x000103c0, + 0x00018780, 0x00020b40, 0x00028f00, 0x000312c0, 0x00039680, 0x00041a40, + 0x00049e00, 0x000521c0, 0x0005a580, 0x00062940, 0x0006ad00, 0x000730c0, + 0x0007b480, 0x00083840, 0x0008bc00, 0x00093fc0, 0x0009c380, 0x000a4740, + 0x000acb00, 0x000b4ec0, 0x000bd280, 0x000c5640, 0x000cda00, 0x000d5dc0, + 0x00006180, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00001011, 0x00001000, 0x00001004, 0x00001021, 0x0000ffff, 0x0000ffff, + 0x0000ffff, 0x0000ffff, 0x00000046, 0x00000010, 0x00000000, 0x00000000, + 0x00000018, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000001, + 0x07ffffff, 0x0000003f, 0x07ffffff, 0x0000000f, 0x00007ff8, 0x00007ff8, + 0x00001900, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000014a, 0x00003500, 0x00000001, 0x00000002, + 0x00000003, 0x00000000, 0x00000004, 0x00000001, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000004, 0x00000003, 0x00000000, 0x00000000, + 0x00003fff, 0x000003ff, 0x00000000, 0x03938700, 0x00000000, 0x00000000, + 0x00000000, 0x03938700, 0x00000000, 0x00000000, 0x0000000f, 0x00000007, + 0x00000000, 0x0000000e, 0x03150020, 0x03150020, 0x01000030, 0x08100000, + 0x00000033, 0x00000030, 0x00000031, 0x00000003, 0x00000006, 0x00000003, + 0x00000003, 0x00000002, 0x00000000, 0x00000002, 0x00000000, 0x00000006, + 0x00000004, 0x00000002, 0x00000002, 0x00000001, 0x00000004, 0x00000001, + 0x00000002, 0x00000040, 0x00000040, 0x00000004, 0x00000020, 0x00000002, + 0x00000020, 0x00001000, 0x00002080, 0x00003100, 0x00004180, 0x00005200, + 0x00006280, 0x00007300, 0x00008380, 0x00009400, 0x0000a480, 0x0000b500, + 0x0000c580, 0x0000d600, 0x0000e680, 0x0000f700, 0x00010780, 0x00011800, + 0x00012880, 0x00013900, 0x00014980, 0x00015a00, 0x00016a80, 0x00017b00, + 0x00018b80, 0x00019c00, 0x0001ac80, 0x0001bd00, 0x0001cd80, 0x0001de00, + 0x0001ee80, 0x0001ff00, 0x00000f80, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00001224, + 0x00001210, 0x00001214, 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff, + 0x00000020, 0x00000020, 0x00000000, 0x00000000, 0x00000023, 0x00000024, + 0x00000025, 0x00000026, 0x00000027, 0x00000029, 0x0000002a, 0x0000002b, + 0x0000002c, 0x00000001, 0x00000001, 0x07ffffff, 0x0000003f, 0x07ffffff, + 0x0000000f, 0x00007ff8, 0x00007ff8, 0x00000000, 0x00000001, 0xcccc0201, + 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, + 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, + 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000000, + 0x00010001, 0x00350207, 0xccccccc5, 0x10000000, 0x000028ad, 0x7058103c, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x00000266, + 0x00001500, 0x00000001, 0x00000002, 0x00000003, 0x00000000, 0x00000004, + 0x00000001, 0x00000000, 0x00000001, 0x00000004, 0x00000000, 0x00000001, + 0x00000003, 0x00000000, 0x00000001, 0x00000004, 0x00000000, 0x00000001, + 0x00000003, 0x00000000, 0x00000001, 0x00000004, 0x00000000, 0x00000004, + 0x00000003, 0x00000000, 0x00000000, 0x00003fff, 0x000003ff, 0x002625a0, + 0x00000000, 0x002625a0, 0x00000000, 0x002625a0, 0x00000000, 0x002625a0, + 0x00000000, 0x000e0000, 0x011600d6, 0x002625a0, 0x00000000, 0x002625a0, + 0x00000000, 0x002625a0, 0x00000000, 0x002625a0, 0x00000000, 0x00720000, + 0x012300f3, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, + 0x00000000, 0x0000ffff, 0x00000000, 0x55540000, 0x55555555, 0x00005555, + 0xf0000000, 0x55540000, 0x55555555, 0x00005555, 0xf0000000, 0x55540000, + 0x55555555, 0x00005555, 0xf0000000, 0x00000000, 0x00010000, 0x00005014, + 0x00000000, 0xff5c0000, 0xfff55fff, 0x0000ffff, 0xf00003e0, 0x00000000, + 0x0000a000, 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00001000, + 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x00000000, 0x00000000, + 0x00000000, 0x00010000, 0xff5c0000, 0xfff55fff, 0x0000ffff, 0xf00003e0, + 0x00000000, 0x0000a000, 0x00000800, 0x00000000, 0x00000000, 0x00000000, + 0x00002000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, }; static const u8 csem_int_table_data_e1h[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x73, 0xe6, - 0x66, 0x60, 0xf8, 0x51, 0x0f, 0xc1, 0x4d, 0x48, 0x6c, 0x62, 0xf1, 0x09, - 0x76, 0x06, 0x06, 0x6d, 0x16, 0x06, 0x86, 0x54, 0x56, 0x06, 0x06, 0x17, - 0x56, 0xd2, 0xf5, 0x1f, 0x06, 0xea, 0xdf, 0x07, 0xc4, 0x3b, 0x81, 0x78, - 0x0b, 0x10, 0xaf, 0x07, 0xe2, 0x55, 0x40, 0xbc, 0x14, 0x88, 0x17, 0x00, - 0xb1, 0x34, 0x27, 0x03, 0x83, 0x18, 0x10, 0x0b, 0x02, 0x31, 0x0f, 0x10, - 0xb3, 0x03, 0x31, 0x13, 0x10, 0xff, 0xe5, 0x00, 0xea, 0xe7, 0x40, 0x98, - 0x73, 0x0d, 0x28, 0x76, 0x8f, 0x13, 0xbf, 0x5d, 0xd1, 0x58, 0xe4, 0xbb, - 0x78, 0x10, 0x6c, 0x19, 0x20, 0x9b, 0x11, 0x88, 0x55, 0x79, 0x48, 0xf7, - 0xc7, 0x28, 0x1e, 0x1e, 0x78, 0x3b, 0x3f, 0x03, 0xc3, 0x69, 0x01, 0x04, - 0x3f, 0x41, 0x10, 0x55, 0x7e, 0x07, 0x3f, 0x82, 0x5d, 0x27, 0x4a, 0x99, - 0x5d, 0xfd, 0x40, 0xfd, 0x00, 0x53, 0xb3, 0x0f, 0xc5, 0x80, 0x03, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x8b, 0xe1, + 0x60, 0x60, 0xf8, 0x51, 0x8f, 0xc0, 0xd3, 0xd1, 0xf8, 0xe8, 0xf8, 0x2f, + 0x9a, 0x7c, 0x1e, 0x0b, 0x7e, 0xf5, 0x84, 0x70, 0x26, 0x50, 0x7f, 0x0a, + 0x10, 0xc7, 0x03, 0x71, 0x14, 0x10, 0x87, 0x02, 0x71, 0x00, 0x10, 0x7b, + 0x03, 0xb1, 0x1b, 0x10, 0x17, 0xb3, 0x01, 0xed, 0x00, 0xe2, 0x4c, 0x20, + 0x4e, 0x01, 0xe2, 0x78, 0x20, 0x8e, 0x02, 0xe2, 0x50, 0x20, 0x0e, 0x60, + 0x43, 0x98, 0x63, 0xc5, 0xce, 0xc0, 0xe0, 0xc4, 0x8e, 0xdf, 0xae, 0x0d, + 0x6c, 0x98, 0x62, 0xbf, 0xb9, 0x10, 0xec, 0x40, 0x4e, 0xca, 0xfc, 0x32, + 0x8a, 0x87, 0x3e, 0x96, 0xe0, 0x63, 0x60, 0x90, 0xe2, 0x47, 0xf0, 0x97, + 0xf1, 0xa3, 0xca, 0x4b, 0xf2, 0x21, 0xd8, 0x93, 0x85, 0x29, 0xb3, 0x6b, + 0x09, 0x50, 0x3f, 0x00, 0x62, 0x52, 0x6d, 0x0e, 0x80, 0x03, 0x00, 0x00, + }; static const u8 csem_pram_data_e1h[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xd5, 0x7d, - 0x0b, 0x78, 0x54, 0xd5, 0xb9, 0xe8, 0xda, 0x8f, 0x99, 0xd9, 0x93, 0x79, - 0x64, 0xe7, 0x3d, 0x91, 0x04, 0x36, 0x21, 0x20, 0x6a, 0xc0, 0x21, 0x84, - 0x18, 0x34, 0x1e, 0x77, 0x42, 0xc0, 0x78, 0x2e, 0xa7, 0x8e, 0x88, 0x34, - 0xf6, 0xda, 0x76, 0x50, 0x04, 0xe4, 0x95, 0x54, 0x69, 0xe5, 0x9e, 0xea, - 0xc9, 0x0e, 0x09, 0x10, 0x8c, 0x68, 0xe4, 0x61, 0x41, 0xd1, 0x8e, 0x14, - 0x5b, 0x6c, 0x51, 0x23, 0x62, 0x8b, 0x8a, 0x7e, 0x13, 0xb4, 0x16, 0x6f, - 0x6d, 0x1b, 0x5b, 0x5a, 0xb5, 0xd5, 0xdb, 0xa8, 0x6d, 0x7d, 0x21, 0xc4, - 0x07, 0xd5, 0xb6, 0x78, 0x3d, 0xff, 0xbf, 0x1e, 0x99, 0xbd, 0x77, 0x66, - 0x12, 0xac, 0x62, 0x3d, 0xe4, 0xe3, 0xdb, 0x59, 0x7b, 0xaf, 0xc7, 0xbf, - 0xfe, 0xf7, 0xfa, 0xd7, 0xbf, 0x56, 0xbc, 0xd2, 0x04, 0x92, 0x7b, 0x1e, - 0x21, 0x1f, 0xe3, 0x3f, 0x78, 0x3e, 0xec, 0x25, 0x84, 0x14, 0xa4, 0x9e, - 0x53, 0xbe, 0x7d, 0xf1, 0xd2, 0x7b, 0xab, 0xe0, 0xf7, 0x7f, 0x78, 0xa3, - 0x77, 0x1b, 0xa9, 0x7a, 0xe2, 0x39, 0x86, 0x48, 0x84, 0x4c, 0x83, 0xef, - 0xc4, 0x24, 0xa4, 0x90, 0x90, 0xf3, 0x34, 0xf8, 0x15, 0xea, 0xcd, 0xf8, - 0xd9, 0xe1, 0x3f, 0x9c, 0x99, 0x4f, 0x48, 0x2f, 0x51, 0x88, 0x0f, 0x5e, - 0x25, 0xd5, 0x19, 0x79, 0xff, 0x01, 0xfd, 0xf4, 0x1e, 0x27, 0x51, 0xfc, - 0x2e, 0xff, 0x2c, 0x58, 0xd2, 0x1f, 0xc4, 0x76, 0x16, 0x6d, 0xf7, 0x6f, - 0x84, 0xb5, 0x4b, 0x8e, 0x35, 0x4a, 0xf4, 0x0a, 0x2c, 0x10, 0x19, 0xdf, - 0x9b, 0x1a, 0xfd, 0x1d, 0xfa, 0x19, 0xb7, 0xbd, 0x05, 0xda, 0x1f, 0xfb, - 0x30, 0x48, 0xdb, 0xbb, 0xe1, 0x10, 0x4f, 0x72, 0x5c, 0x26, 0x49, 0xde, - 0xe6, 0xe3, 0x32, 0xec, 0x57, 0x7d, 0xbf, 0x7f, 0x22, 0x2f, 0x8f, 0x25, - 0x30, 0x38, 0xe1, 0xf0, 0x36, 0x10, 0x52, 0x9d, 0x82, 0xf7, 0xc9, 0x97, - 0x5e, 0xa3, 0xf0, 0x1e, 0x50, 0x01, 0x5e, 0x23, 0xcd, 0xf8, 0x1a, 0xc0, - 0x9f, 0x9f, 0x82, 0xbf, 0x97, 0x5c, 0x9c, 0x4d, 0x2a, 0x18, 0xfc, 0x66, - 0x75, 0x0a, 0xfe, 0x4f, 0x0a, 0x0f, 0x9d, 0x3f, 0xe0, 0xb9, 0xbd, 0xd5, - 0x78, 0xb4, 0x7c, 0x3c, 0x21, 0x37, 0xb6, 0x92, 0x47, 0xcb, 0x3d, 0x84, - 0xdc, 0xd0, 0xaa, 0xd1, 0x72, 0x67, 0xab, 0x4e, 0xcb, 0x6b, 0x5a, 0x23, - 0xf4, 0xd9, 0xae, 0x42, 0x13, 0x80, 0xa3, 0x7d, 0x2f, 0x49, 0x58, 0xd0, - 0x3e, 0x14, 0x85, 0xfa, 0xa2, 0x7f, 0xf8, 0x1f, 0x98, 0x08, 0xed, 0x26, - 0xa6, 0xca, 0x7e, 0x43, 0x77, 0x94, 0xbd, 0xf9, 0x11, 0x47, 0x59, 0x0d, - 0x1a, 0x8e, 0x72, 0x7b, 0xb0, 0x5e, 0x8b, 0x07, 0x71, 0x7c, 0x98, 0xbb, - 0x0f, 0xc7, 0xd7, 0xe8, 0x13, 0xc0, 0x3c, 0x14, 0x01, 0x7c, 0x4c, 0x66, - 0x55, 0x49, 0x96, 0xd1, 0xdd, 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0x8d, 0xf0, 0x91, 0xa2, 0xb9, 0xf2, 0x6d, 0xc7, 0xd7, 0xc7, + 0x31, 0x96, 0x0b, 0xac, 0xb7, 0x73, 0x5b, 0x7c, 0xe2, 0xe9, 0xaa, 0xc4, + 0xef, 0x46, 0xde, 0xc8, 0xa9, 0x8b, 0x12, 0xc6, 0xa7, 0xe4, 0xf3, 0x71, + 0x3d, 0xf2, 0xda, 0x33, 0xa2, 0xd4, 0x27, 0xa3, 0xd7, 0xaf, 0x26, 0xf7, + 0xcf, 0x07, 0xdc, 0x5b, 0x9f, 0xa5, 0x3c, 0x20, 0x79, 0x34, 0xc6, 0x07, + 0x02, 0xe0, 0xa1, 0xfc, 0x3e, 0x13, 0x0e, 0x69, 0x54, 0x3f, 0x64, 0x5a, + 0x87, 0x58, 0x7e, 0x90, 0xee, 0x2c, 0xa7, 0xdf, 0x95, 0xc8, 0x5d, 0x9f, + 0xa2, 0xbf, 0x1e, 0x35, 0x78, 0xf6, 0x41, 0xba, 0xc8, 0x03, 0xaf, 0xe8, + 0x1b, 0x3d, 0xc4, 0xeb, 0xcd, 0x39, 0x76, 0x2f, 0xe1, 0x5f, 0x61, 0xcf, + 0xab, 0x24, 0xfe, 0xde, 0x9f, 0x15, 0x60, 0xf9, 0x1f, 0x48, 0x9d, 0xf3, + 0x59, 0x98, 0xaa, 0x2f, 0xf1, 0x67, 0x26, 0x78, 0xed, 0x00, 0x5f, 0x35, + 0xe1, 0x7d, 0x33, 0x4d, 0xc8, 0xc7, 0x6e, 0x81, 0xf9, 0xfa, 0x94, 0x5d, + 0xcc, 0xff, 0x21, 0xdd, 0x79, 0x98, 0x46, 0x07, 0xa6, 0x6b, 0x3b, 0xea, + 0x77, 0x10, 0xe3, 0xc0, 0x4e, 0xdf, 0x49, 0xd3, 0xc4, 0xb9, 0x14, 0xa3, + 0xc4, 0xe7, 0x90, 0xf1, 0x7d, 0x34, 0xf4, 0x61, 0xa6, 0x4e, 0x9f, 0xe0, + 0x6f, 0xca, 0x7e, 0x26, 0x25, 0x46, 0x97, 0x47, 0x46, 0xf9, 0xb0, 0x77, + 0xa5, 0x87, 0xbe, 0x2f, 0x3f, 0x9b, 0x6d, 0xf7, 0x52, 0xdc, 0xd9, 0xc8, + 0x3e, 0x47, 0xc2, 0x3e, 0xf3, 0x7c, 0xd3, 0xce, 0xd4, 0xf3, 0xc9, 0xee, + 0x7b, 0x4d, 0xbb, 0xe5, 0xc4, 0xf9, 0xa6, 0xfd, 0x53, 0xcf, 0x0f, 0x59, + 0x16, 0x0a, 0x1c, 0x9e, 0xa4, 0xf5, 0x88, 0xc3, 0x51, 0x03, 0x87, 0xbf, + 0xe7, 0x43, 0x41, 0x9f, 0x4f, 0x38, 0x98, 0xf6, 0xa3, 0x63, 0xf8, 0x77, + 0x2b, 0xcd, 0xc0, 0xd5, 0xc4, 0x41, 0x23, 0xbf, 0x51, 0x1d, 0xf1, 0xa1, + 0xdf, 0x4c, 0xbf, 0x23, 0xae, 0x07, 0xd3, 0x05, 0x0e, 0xa6, 0xfd, 0x78, + 0x4d, 0xb3, 0xb3, 0x1c, 0x0f, 0xfa, 0xaf, 0x6c, 0xaa, 0x7d, 0x7f, 0x01, + 0x31, 0x64, 0xb4, 0xf9, 0x00, 0x1e, 0x00, 0x00, }; + +static const u8 tsem_int_table_data_e1h[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, + 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0x67, 0x70, 0xa1, 0xf2, 0x4f, 0xb3, 0xa2, + 0xf2, 0xd1, 0xb1, 0x09, 0x3b, 0x7e, 0x79, 0x42, 0x98, 0x85, 0x81, 0x32, + 0xfd, 0xbc, 0x40, 0x03, 0x44, 0x81, 0xd8, 0x10, 0x88, 0x65, 0x59, 0xf0, + 0xab, 0xdd, 0xc1, 0x84, 0x29, 0xe6, 0x20, 0x8b, 0x60, 0x7f, 0x96, 0x62, + 0x60, 0xf0, 0x97, 0x80, 0xb0, 0x5b, 0x24, 0x28, 0x73, 0xd7, 0x28, 0x1e, + 0x1a, 0x38, 0x49, 0x13, 0x95, 0x9f, 0xa0, 0x0e, 0xa1, 0xef, 0x69, 0x40, + 0xe8, 0x64, 0x34, 0xf9, 0x44, 0xa8, 0x3c, 0x9f, 0x0a, 0x84, 0x4e, 0xd1, + 0xc4, 0x6e, 0x2e, 0x3f, 0x54, 0x1e, 0x00, 0xce, 0x52, 0x67, 0xa9, 0x60, + 0x03, 0x00, 0x00, 0x00, }; + +static const u8 tsem_pram_data_e1h[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xed, 0x7d, + 0x0b, 0x78, 0x54, 0xd5, 0xd5, 0xe8, 0x3e, 0x73, 0xce, 0x9c, 0x39, 0xf3, + 0x3e, 0x09, 0x43, 0x98, 0x90, 0x04, 0x4f, 0x42, 0x80, 0xa0, 0x20, 0x87, + 0x10, 0x20, 0xd8, 0xf8, 0x77, 0xc2, 0x43, 0x63, 0x4b, 0xeb, 0xf0, 0x50, + 0xd3, 0xbf, 0xa8, 0x03, 0x52, 0x8d, 0x20, 0x10, 0x2d, 0x54, 0x6e, 0x5f, + 0x73, 0x20, 0x0f, 0xc2, 0x43, 0x0c, 0xe0, 0x55, 0xa4, 0xd4, 0x8e, 0x29, + 0x6d, 0x69, 0xab, 0x6d, 0xd4, 0x68, 0xe9, 0xbd, 0xb6, 0x9d, 0x08, 0xb5, + 0xf4, 0xb6, 0xff, 0xbd, 0x11, 0x7c, 0x60, 0x8b, 0x7f, 0x63, 0x6b, 0xad, + 0x5a, 0xf1, 0xa6, 0x0f, 0x2b, 0x7e, 0x5f, 0xad, 0x77, 0xaf, 0xb5, 0xf7, + 0x9e, 0x39, 0x67, 0x32, 0x93, 0x80, 0xd5, 0xfe, 0xbd, 0xdf, 0x57, 0xf4, + 0x63, 0xb3, 0xcf, 0xd9, 0x8f, 0xb5, 0xd7, 0x5a, 0x7b, 0xad, 0xb5, 0xd7, + 0x5a, 0xfb, 0x8c, 0xc7, 0x35, 0x9b, 0x94, 0x5c, 0x40, 0xc8, 0xbb, 0xf0, + 0xe7, 0xc3, 0x84, 0x7c, 0x53, 0x22, 0x84, 0x8c, 0xcd, 0x96, 0xe4, 0x96, + 0xb0, 0x8b, 0x94, 0x10, 0xb2, 0x49, 0x23, 0xf8, 0xe7, 0x2d, 0x6f, 0xe8, + 0x62, 0x12, 0x26, 0x64, 0xb3, 0xc6, 0xca, 0xdb, 0x7d, 0xa1, 0x1e, 0x28, + 0x77, 0x24, 0x09, 0x49, 0x4f, 0x81, 0xf7, 0x13, 0x52, 0x24, 0x44, 0x88, + 0x9f, 0x90, 0x1a, 0x25, 0x02, 0x3d, 0x7c, 0xe6, 0xd7, 0x2a, 0xa1, 0x6c, + 0x9d, 0x1b, 0x9f, 0x8e, 0xe5, 0x0c, 0x28, 0x8b, 0x89, 0x8b, 0x8d, 0x4f, + 0xca, 0xf5, 0x97, 0xfd, 0x6c, 0xec, 0x77, 0x65, 0xf8, 0xfb, 0x73, 0x84, + 0xcc, 0xc9, 0xce, 0x47, 0x4e, 0x27, 0x1a, 0x61, 0x7e, 0x99, 0x88, 0x3f, + 0x4d, 0x04, 0xfa, 0xcb, 0x64, 0xd7, 0x1f, 0xe4, 0x8b, 0x09, 0x51, 0x5a, + 0xc3, 0xe4, 0xf3, 0xb5, 0xb4, 0xae, 0xab, 0x24, 0xcd, 0xfb, 0xbc, 0x0b, + 0x7f, 0xc9, 0x2b, 0xc2, 0x89, 0x40, 0x76, 0x5d, 0xb9, 0xe5, 0xe6, 0xd3, + 0x8d, 0xa9, 0x63, 0x35, 0xd9, 0xf6, 0x13, 0x49, 0x30, 0x82, 0x70, 0x28, + 0x44, 0x41, 0x38, 0x78, 0x7f, 0x42, 0x2c, 0x02, 0xf3, 0x7b, 0xe0, 0x9f, + 0xc6, 0xf0, 0x71, 0xde, 0x4a, 0xc6, 0x52, 0xc7, 0xdc, 0xc3, 0xf1, 0x54, + 0x68, 0x5e, 0x81, 0xa7, 0xb6, 0xa4, 0x46, 0xd2, 0x74, 0xd0, 0x8e, 0xa4, + 0x8e, 0xa5, 0x5c, 0x4e, 0x62, 0xa9, 0x00, 0xae, 0x33, 0xf6, 0xf0, 0x34, + 0x5a, 0xc2, 0xdc, 0x14, 0x7f, 0x5d, 0xd5, 0x46, 0x8f, 0x5f, 0xb2, 0xc1, + 0xe1, 0x65, 0x70, 0xc4, 0x08, 0x7d, 0x38, 0x1b, 0x9e, 0x27, 0x1c, 0xf8, + 0xea, 0x2a, 0xdf, 0xab, 0xc5, 0x46, 0x58, 0x37, 0xa9, 0xa6, 0x78, 0x12, + 0xeb, 0xae, 0x1a, 0xbe, 0x3e, 0x85, 0x0e, 0xdd, 0x4b, 0xe7, 0x57, 0x28, + 0x3c, 0x3d, 0x74, 0x1c, 0x45, 0x1f, 0x19, 0x8e, 0x25, 0x19, 0x38, 0x5a, + 0x88, 0x7d, 0xfd, 0xe7, 0x0f, 0xc7, 0xa7, 0x1d, 0xfd, 0x7d, 0x53, 0x09, + 0x19, 0x00, 0x1c, 0x28, 0x74, 0x3e, 0x5a, 0xba, 0x0c, 0xcb, 0x1a, 0x9c, + 0x06, 0x73, 0x32, 0x3a, 0x2b, 0x06, 0xef, 0x77, 0x8e, 0x78, 0xf7, 0xd7, + 0xb8, 0xb2, 0xf3, 0xc1, 0xb0, 0x01, 0x9f, 0x83, 0x5f, 0xd4, 0x48, 0xb1, + 0xe3, 0xfd, 0x70, 0xbe, 0xb4, 0x38, 0xbf, 0x76, 0xf3, 0xf5, 0xc6, 0x65, + 0xc6, 0xcf, 0xa2, 0x9e, 0x26, 0xac, 0x2e, 0xda, 0xd9, 0x4a, 0x1b, 0xff, + 0xca, 0x91, 0x4e, 0xe4, 0x5b, 0x39, 0xe2, 0xb3, 0xe4, 0x10, 0x94, 0xca, + 0xcb, 0x83, 0x76, 0xbe, 0xe5, 0xfd, 0x3c, 0x13, 0x48, 0xa2, 0x97, 0xae, + 0xbb, 0x0d, 0x1e, 0x95, 0xf2, 0xce, 0x94, 0x0e, 0x4a, 0xc4, 0xfc, 0xea, + 0x0e, 0xba, 0x9f, 0xbe, 0x40, 0x54, 0x9c, 0x57, 0x29, 0xd7, 0x2c, 0x18, + 0x6f, 0x93, 0x94, 0xf8, 0x02, 0xc2, 0xb1, 0x98, 0x92, 0x90, 0xf2, 0x83, + 0x8f, 0x77, 0xf1, 0xea, 0xad, 0x84, 0x54, 0xc1, 0x78, 0x35, 0xe1, 0x04, + 0xe0, 0x2f, 0x50, 0x4c, 0xc8, 0xbc, 0xe1, 0xf8, 0xe9, 0x48, 0x5a, 0x29, + 0xc5, 0x6d, 0xab, 0xbb, 0x49, 0x33, 0xf0, 0x01, 0x21, 0x29, 0x36, 0x4f, + 0x09, 0x49, 0x8d, 0xa1, 0xf0, 0x92, 0xbf, 0x2e, 0x30, 0x96, 0x06, 0x0b, + 0x8f, 0x93, 0xa1, 0x2f, 0x5f, 0x47, 0x5b, 0x85, 0x79, 0x2a, 0x51, 0x47, + 0x6b, 0xa5, 0xaa, 0xf9, 0x35, 0xfa, 0xb4, 0x23, 0x77, 0x3d, 0xe5, 0x74, + 0x3d, 0x94, 0x85, 0xee, 0x81, 0xf5, 0xd0, 0xf6, 0x4a, 0x54, 0x15, 0xeb, + 0xb9, 0x07, 0xf1, 0x97, 0xb3, 0x1e, 0x37, 0xc5, 0xb7, 0x44, 0xdb, 0xb7, + 0x05, 0x27, 0xb3, 0xf5, 0x44, 0xf2, 0xc3, 0xd1, 0xc6, 0xd7, 0x23, 0xe0, + 0xcf, 0x3c, 0x17, 0xeb, 0x2a, 0xd0, 0x2f, 0x17, 0xfe, 0x42, 0xef, 0xdb, + 0x2b, 0x62, 0xd1, 0x95, 0x14, 0x7e, 0x2b, 0xc8, 0xd6, 0x25, 0x4b, 0xce, + 0x75, 0xb9, 0xcb, 0x19, 0x9d, 0x1e, 0xe1, 0xeb, 0x72, 0x07, 0x54, 0xa4, + 0xb7, 0x3b, 0xd2, 0x4d, 0x40, 0xae, 0xd0, 0xf5, 0x3d, 0x92, 0x6f, 0x7d, + 0x94, 0xaf, 0x90, 0x8f, 0x32, 0xeb, 0x0b, 0x44, 0x10, 0x4e, 0x45, 0x67, + 0x74, 0x16, 0xf3, 0x2b, 0x5a, 0x67, 0x4a, 0x99, 0x95, 0x85, 0x33, 0x4d, + 0x74, 0x36, 0x4f, 0x06, 0x0e, 0x93, 0xc9, 0x49, 0x9d, 0x60, 0xbf, 0x43, + 0x24, 0x91, 0x86, 0xf7, 0x94, 0xff, 0x06, 0x90, 0xff, 0x02, 0x31, 0x02, + 0xe3, 0xab, 0x51, 0xfa, 0x7e, 0x06, 0x94, 0xb1, 0x66, 0x8b, 0xd2, 0xb5, + 0xbd, 0x7f, 0x1e, 0x99, 0x06, 0xfd, 0x02, 0x26, 0xb9, 0x85, 0x96, 0x6a, + 0x20, 0x41, 0x16, 0xd3, 0x76, 0xed, 0xef, 0xc8, 0x1c, 0x6f, 0x75, 0x38, + 0xbe, 0x80, 0xe3, 0x7f, 0x72, 0x39, 0x5e, 0x08, 0x6f, 0x4b, 0x01, 0x1e, + 0x1b, 0x9e, 0x4f, 0x56, 0x08, 0xbe, 0x72, 0xd2, 0xff, 0xe4, 0xc7, 0x3c, + 0x58, 0x6f, 0x1f, 0x6b, 0x7e, 0x15, 0x70, 0xf9, 0x3c, 0xc7, 0x5b, 0x2e, + 0x7e, 0x28, 0xde, 0x9e, 0xb7, 0x8f, 0xaf, 0xe8, 0x0c, 0x9f, 0x27, 0x3f, + 0x36, 0x85, 0xe1, 0xab, 0x69, 0xac, 0x03, 0xbe, 0x0c, 0x1c, 0x5a, 0x9b, + 0x03, 0x5f, 0x04, 0x44, 0x28, 0xdd, 0x97, 0x15, 0x82, 0xaf, 0x38, 0xde, + 0xf6, 0x54, 0x30, 0x7c, 0x7d, 0xb9, 0xbc, 0x66, 0xbe, 0xcb, 0x20, 0xa4, + 0xd2, 0x30, 0x4d, 0x58, 0xe2, 0xde, 0xf2, 0xc3, 0x8d, 0xb4, 0x20, 0xbb, + 0xb5, 0xc4, 0xab, 0xc0, 0x4f, 0x9a, 0x41, 0x24, 0x98, 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0xef, 0xed, 0xab, 0x2c, 0x9c, 0xbf, 0x8d, 0xf3, 0x3b, + 0x29, 0xff, 0xc4, 0xb3, 0xcf, 0xc2, 0x71, 0x8d, 0xd0, 0xbc, 0xa4, 0xfc, + 0xdf, 0x58, 0x7c, 0x52, 0x50, 0x1c, 0x73, 0x6b, 0x76, 0x8a, 0xf8, 0xff, + 0x49, 0xd2, 0xc4, 0x77, 0xf3, 0x71, 0xf7, 0x84, 0x71, 0x3c, 0x06, 0xfc, + 0x3d, 0xc9, 0x94, 0x5b, 0x35, 0x40, 0xef, 0x31, 0x91, 0xc7, 0x79, 0x91, + 0xe2, 0xbb, 0x74, 0x4e, 0x1f, 0x06, 0x5d, 0x5e, 0xd4, 0xd6, 0x6c, 0xe1, + 0xd7, 0x36, 0xbd, 0x7d, 0xf6, 0x34, 0xf9, 0x4f, 0x33, 0xb2, 0xdd, 0xdb, + 0xb3, 0x83, 0xf2, 0x88, 0x9a, 0x22, 0xf7, 0x73, 0x5c, 0xa9, 0x3b, 0x5b, + 0xe1, 0xf9, 0x90, 0x4e, 0xbe, 0x07, 0xb0, 0xc8, 0xb0, 0x9a, 0xf6, 0xa7, + 0xc9, 0xea, 0xe7, 0xef, 0x68, 0x86, 0x8b, 0x4f, 0x0f, 0xb5, 0xee, 0x8b, + 0x8f, 0xf4, 0xfc, 0x43, 0x4e, 0x0a, 0xe5, 0x35, 0x29, 0x19, 0xf4, 0xbe, + 0x36, 0x2f, 0xd2, 0xd1, 0x4d, 0x74, 0x68, 0xeb, 0xd5, 0xe8, 0x08, 0x8c, + 0x73, 0xf3, 0x73, 0xa0, 0xc5, 0x5d, 0xb5, 0xfa, 0xd1, 0xea, 0x67, 0x33, + 0xe9, 0xfc, 0xe4, 0x53, 0x7e, 0xd8, 0x0d, 0xf4, 0xe6, 0x61, 0x15, 0x87, + 0x53, 0x26, 0x08, 0xc9, 0x1f, 0x53, 0x71, 0x03, 0x2d, 0x7f, 0x2c, 0x87, + 0xe5, 0xd4, 0xa7, 0xd9, 0x37, 0xce, 0x1f, 0xfb, 0x48, 0xc5, 0x29, 0x1f, + 0xf5, 0x2e, 0xc5, 0xd7, 0x2d, 0xe1, 0xa8, 0x2b, 0xf2, 0x03, 0xe3, 0x62, + 0x7f, 0x37, 0xdd, 0x9f, 0xcc, 0x6f, 0x49, 0x79, 0xf5, 0x10, 0xe2, 0xb0, + 0x74, 0xdb, 0x78, 0xfe, 0x9e, 0x40, 0xa3, 0x43, 0x1b, 0xf7, 0xcb, 0x64, + 0xe7, 0xfb, 0xd9, 0x41, 0xf1, 0x6c, 0xe4, 0x37, 0xf1, 0xff, 0x77, 0x54, + 0x86, 0x31, 0x7f, 0x34, 0xed, 0xfb, 0xe0, 0x34, 0xfd, 0xff, 0x0a, 0x8f, + 0xfe, 0x7c, 0x7c, 0x01, 0xe1, 0xab, 0xbd, 0x17, 0x8a, 0x2f, 0xe2, 0x9a, + 0x44, 0x78, 0x1e, 0x31, 0xf8, 0xcc, 0x6a, 0xfe, 0xda, 0x59, 0x1a, 0x77, + 0xe7, 0xc1, 0x23, 0x9c, 0x1f, 0xa6, 0xe1, 0xfb, 0x5d, 0xf1, 0xec, 0x4b, + 0xea, 0x61, 0x3f, 0xb2, 0x6f, 0xcb, 0xb5, 0x64, 0xca, 0x8f, 0x6d, 0x52, + 0xef, 0x9f, 0x9a, 0xb4, 0x7b, 0x8f, 0x2e, 0x7d, 0x7c, 0x07, 0xf1, 0xf0, + 0x50, 0xbc, 0x61, 0xf0, 0x7d, 0x07, 0xf0, 0xbd, 0x89, 0x45, 0xd5, 0x1f, + 0x16, 0xed, 0xfd, 0xb1, 0x46, 0xdd, 0xfb, 0x6b, 0x22, 0x5d, 0xd7, 0x88, + 0xfe, 0x5d, 0xaa, 0x9c, 0xc0, 0xfe, 0x5e, 0x83, 0x1a, 0x4f, 0x26, 0x7d, + 0x33, 0x10, 0x4f, 0x56, 0xf5, 0x51, 0x91, 0x2a, 0x8a, 0xa4, 0x93, 0x22, + 0x8e, 0x5c, 0x44, 0x25, 0xe9, 0xf9, 0x9c, 0x28, 0xd6, 0x4f, 0x85, 0xda, + 0x7c, 0x48, 0x17, 0xed, 0xdf, 0x5a, 0xc9, 0xc3, 0xf1, 0x9a, 0x01, 0xfd, + 0xae, 0xc6, 0x95, 0xe5, 0x45, 0x2b, 0x39, 0x0e, 0x57, 0x0c, 0x1d, 0x5c, + 0x5a, 0xe4, 0x14, 0xd6, 0x8b, 0x96, 0x8f, 0x44, 0xfc, 0x65, 0x20, 0x8e, + 0xf4, 0xdc, 0x01, 0xf6, 0xeb, 0xff, 0x13, 0xa9, 0x97, 0x6c, 0xd2, 0x60, + 0x50, 0x00, 0x00, 0x00, }; + +static const u8 usem_int_table_data_e1h[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, + 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0x97, 0x73, 0xa3, 0xf2, 0xef, 0xa0, 0xf1, + 0x67, 0xb2, 0xa3, 0xf2, 0x65, 0xb9, 0x50, 0xf9, 0x7c, 0xac, 0xa8, 0xfc, + 0x6c, 0x34, 0xfd, 0x84, 0xf0, 0x5f, 0x4e, 0xd2, 0xd4, 0xc7, 0x33, 0x33, + 0x30, 0xa4, 0x03, 0x71, 0x3e, 0x10, 0x97, 0x33, 0xe3, 0x57, 0x7b, 0x9b, + 0x89, 0xb0, 0x79, 0x45, 0x32, 0x10, 0x5a, 0x14, 0x48, 0x7b, 0x02, 0x71, + 0x31, 0x10, 0x6f, 0x11, 0x66, 0x60, 0xd8, 0x26, 0xca, 0xc0, 0xc0, 0x21, + 0xc2, 0xc0, 0x70, 0x54, 0x98, 0x34, 0xf7, 0x11, 0xc2, 0xab, 0x04, 0xa9, + 0x6b, 0xde, 0x28, 0x26, 0x0d, 0x2b, 0x29, 0xa2, 0xf2, 0x75, 0x75, 0x80, + 0x69, 0x4a, 0x97, 0x81, 0x61, 0xa5, 0x1e, 0x84, 0x2f, 0x89, 0x24, 0x7f, + 0x00, 0x28, 0xa6, 0xa7, 0x03, 0x61, 0xa7, 0xab, 0x31, 0x30, 0xd8, 0x01, + 0xf9, 0x02, 0x8a, 0xd8, 0xcd, 0xcd, 0x00, 0xca, 0xdb, 0x03, 0xe5, 0x2f, + 0x42, 0xcd, 0x01, 0x00, 0xa5, 0xa0, 0xbb, 0xb0, 0x68, 0x03, 0x00, 0x00, + }; + +static const u8 usem_pram_data_e1h[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xdd, 0x7d, + 0x09, 0x78, 0x54, 0x55, 0x9a, 0xe8, 0xb9, 0xb7, 0xee, 0xad, 0x2d, 0x55, + 0x95, 0xca, 0x4a, 0x05, 0x42, 0xb8, 0x09, 0x01, 0x02, 0x06, 0xa8, 0x84, + 0x24, 0x44, 0x40, 0xbb, 0x12, 0x82, 0x46, 0xc5, 0xb6, 0x58, 0x54, 0x44, + 0x84, 0x4a, 0xa4, 0x5d, 0x41, 0x23, 0xd2, 0x63, 0xec, 0x8e, 0x2f, 0x15, + 0x52, 0x09, 0x01, 0xc1, 0x0e, 0x8c, 0x76, 0x83, 0xb2, 0x14, 0x88, 0x80, + 0x8e, 0x3a, 0x51, 0x51, 0x69, 0xbf, 0xb6, 0xa7, 0x58, 0x6c, 0x23, 0xd2, + 0x76, 0x54, 0x54, 0xb4, 0xb5, 0x3b, 0xa0, 0xa3, 0x8e, 0xad, 0xbe, 0x48, + 0xbb, 0xbd, 0x19, 0x6d, 0xde, 0xff, 0xff, 0xe7, 0xdc, 0xaa, 0x7b, 0x8b, + 0x2c, 0x38, 0xdb, 0x9b, 0xef, 0xc5, 0xaf, 0xfb, 0x70, 0xee, 0xd9, 0xff, + 0xfd, 0xff, 0xcf, 0x52, 0x36, 0xb9, 0x9c, 0x79, 0x47, 0x31, 0x76, 0x1a, + 0xff, 0x7e, 0xc4, 0xd8, 0xc5, 0x12, 0x63, 0xac, 0x3c, 0x91, 0x32, 0xd6, + 0x29, 0x52, 0xcd, 0x1a, 0x74, 0x1b, 0xf3, 0xbd, 0x52, 0x70, 0x22, 0xa6, + 0x61, 0xc6, 0xb2, 0x92, 0xd2, 0x6c, 0xc6, 0x2c, 0x8c, 0xff, 0x59, 0x32, + 0xdb, 0xbf, 0xb0, 0x4c, 0xc2, 0xd4, 0x19, 0xb6, 0x78, 0x30, 0x55, 0x3e, + 0xec, 0xb5, 0xf3, 0xb2, 0xd3, 0x2c, 0xd1, 0x4e, 0xcd, 0x63, 0xa1, 0xae, + 0x62, 0xc6, 0x5a, 0xf1, 0x53, 0x8e, 0x68, 0x9c, 0xc9, 0x98, 0xe2, 0xf3, + 0x3f, 0xb8, 0x36, 0x9f, 0xb1, 0x5c, 0x66, 0xa5, 0x7a, 0x4a, 0xa6, 0x9d, + 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0xfb, 0x91, 0xbf, 0xe6, 0xef, 0x1b, + 0x9c, 0x53, 0x60, 0x02, 0x0a, 0x7a, 0x78, 0xf7, 0x41, 0xd8, 0xa1, 0x92, + 0x1f, 0xc2, 0xbf, 0x33, 0xf6, 0xb9, 0x49, 0xf8, 0xeb, 0xfa, 0x7a, 0x53, + 0x0a, 0x32, 0x43, 0xfa, 0xfa, 0x9c, 0xc9, 0x3f, 0x22, 0x36, 0x93, 0xf4, + 0xf9, 0x51, 0xc4, 0xbf, 0x36, 0xd6, 0xbb, 0x75, 0x28, 0xae, 0x97, 0x7f, + 0xa3, 0xb8, 0x1a, 0x00, 0x96, 0x73, 0xf1, 0xfe, 0xbe, 0x75, 0xd1, 0x06, + 0xfd, 0x40, 0xef, 0x2f, 0x49, 0xff, 0xdf, 0xf7, 0x35, 0xee, 0x8f, 0x0b, + 0xb7, 0x7f, 0xe5, 0x38, 0xc2, 0xe1, 0xb4, 0x5a, 0x98, 0x0f, 0xf7, 0x35, + 0xbb, 0xec, 0x9e, 0xa2, 0x67, 0xbf, 0x50, 0x7a, 0x84, 0xd7, 0x9b, 0x32, + 0x42, 0xa5, 0xfd, 0xb1, 0x0e, 0x94, 0x43, 0xda, 0x58, 0x8f, 0xa3, 0x27, + 0x38, 0x36, 0x8a, 0xfe, 0xdb, 0xfe, 0xad, 0x1a, 0xbe, 0x2b, 0x15, 0x8e, + 0x4f, 0xc5, 0xce, 0xfb, 0xb9, 0x92, 0xdf, 0xd4, 0x1a, 0xc9, 0xe1, 0x92, + 0x7a, 0xeb, 0xca, 0x78, 0xe4, 0xf3, 0xf5, 0xfe, 0x60, 0x2e, 0x5f, 0x24, + 0x7c, 0x20, 0x40, 0x72, 0xed, 0xd0, 0xbf, 0xd9, 0x1c, 0x49, 0xef, 0x7f, + 0xbe, 0x1c, 0xc1, 0xfd, 0x6f, 0xd2, 0xaf, 0x26, 0xd7, 0xc9, 0xf7, 0x9a, + 0xbd, 0xe7, 0x90, 0x4e, 0x5e, 0x8e, 0xe0, 0x7e, 0xb9, 0x36, 0xe7, 0xbb, + 0x59, 0xa4, 0x7f, 0x2f, 0x35, 0xa4, 0xf1, 0x73, 0x80, 0x01, 0xc3, 0x3b, + 0x44, 0x53, 0x25, 0x5f, 0x15, 0x69, 0x06, 0xbe, 0x62, 0x61, 0x7e, 0x2d, + 0x56, 0xdc, 0xb3, 0xdf, 0xd1, 0x63, 0xb3, 0x93, 0xfc, 0x9b, 0xce, 0x5c, + 0xa4, 0x5f, 0xf2, 0xd8, 0x1b, 0x12, 0x7f, 0x06, 0x3f, 0xe4, 0xff, 0x02, + 0x9d, 0x15, 0x39, 0xc8, 0xd0, 0x77, 0x00, 0x00, }; static const u8 xsem_int_table_data_e1h[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x7b, 0x2d, - 0xc4, 0xc0, 0xf0, 0xa3, 0x1e, 0x81, 0x0f, 0xf3, 0xa2, 0xf2, 0xd1, 0xf1, - 0x2c, 0x1e, 0x4c, 0x31, 0x51, 0x46, 0x08, 0xc6, 0xa7, 0x0f, 0x17, 0xb6, - 0x42, 0xd2, 0x77, 0x9e, 0x9b, 0x81, 0x61, 0x09, 0x27, 0x03, 0xc3, 0x52, - 0x20, 0xe6, 0xe7, 0x62, 0x60, 0x10, 0x00, 0xe2, 0x02, 0x20, 0xde, 0x08, - 0xc4, 0x9b, 0x80, 0xf8, 0x39, 0x50, 0xfc, 0x05, 0x10, 0x1f, 0x00, 0xe2, - 0x63, 0xdc, 0x10, 0x3d, 0xcf, 0xd8, 0x19, 0x18, 0xde, 0x01, 0xf1, 0x37, - 0x20, 0xfe, 0xc7, 0x8e, 0xdf, 0x2e, 0x03, 0x56, 0x4c, 0xb1, 0x42, 0x39, - 0x06, 0x06, 0x26, 0x65, 0x04, 0x3f, 0x10, 0xc8, 0xee, 0x52, 0x25, 0xcf, - 0x2f, 0xa3, 0x78, 0xe8, 0xe1, 0x0b, 0xe6, 0xa8, 0xfc, 0xc3, 0x06, 0xa8, - 0xfc, 0x77, 0x46, 0x0c, 0x0c, 0xa1, 0x16, 0x08, 0xfe, 0x11, 0x03, 0xd2, - 0xcc, 0xef, 0x02, 0xea, 0xed, 0xb6, 0xc0, 0x2d, 0xff, 0xc0, 0x06, 0x95, - 0x7f, 0xc0, 0x0e, 0x95, 0x1f, 0x8f, 0x26, 0xdf, 0xe9, 0x03, 0xa1, 0x01, - 0xc0, 0x2f, 0x80, 0xf9, 0xb8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xeb, 0xe0, + 0x67, 0x60, 0xf8, 0x51, 0x8f, 0xc0, 0xdb, 0xb8, 0x50, 0xf9, 0xe8, 0xd8, + 0x93, 0x13, 0x95, 0x1f, 0xc7, 0x8d, 0x5f, 0x3d, 0x21, 0x2c, 0xc3, 0x80, + 0x60, 0xd7, 0x73, 0x30, 0x30, 0x94, 0x32, 0x43, 0xb0, 0x21, 0x14, 0x3f, + 0x64, 0x62, 0x60, 0x38, 0x03, 0xc5, 0x33, 0x98, 0x21, 0x78, 0x15, 0x0b, + 0x42, 0xcf, 0x7f, 0x36, 0x06, 0x06, 0x76, 0x76, 0x06, 0x06, 0x7e, 0x20, + 0x16, 0x67, 0xc7, 0x6f, 0x17, 0x3f, 0x2b, 0xa6, 0x58, 0x95, 0x1c, 0x03, + 0x83, 0xac, 0x12, 0x82, 0x9f, 0x23, 0xc9, 0xc0, 0xb0, 0x19, 0x88, 0x79, + 0xa5, 0x28, 0xf3, 0xd7, 0x28, 0x1e, 0x1a, 0xb8, 0xcd, 0x18, 0x95, 0x7f, + 0x54, 0x07, 0x95, 0xff, 0x52, 0x8f, 0x81, 0x41, 0xd8, 0x04, 0xc1, 0x3f, + 0xa6, 0x43, 0x9a, 0xf9, 0xcd, 0x40, 0xbd, 0x2d, 0x40, 0x0c, 0x00, 0x82, + 0x0f, 0x89, 0x66, 0x68, 0x03, 0x00, 0x00, 0x00, }; static const u8 xsem_pram_data_e1h[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xc5, 0x7d, - 0x0b, 0x78, 0x54, 0xd5, 0xb5, 0xf0, 0x3e, 0x8f, 0x39, 0xf3, 0xc8, 0x64, - 0x72, 0x32, 0x79, 0x38, 0x09, 0x49, 0x38, 0x09, 0x01, 0x02, 0x26, 0x38, - 0x84, 0x10, 0x83, 0x62, 0x3b, 0x3c, 0x0b, 0x8a, 0x74, 0xa4, 0xa0, 0xa0, - 0x56, 0x07, 0x82, 0x04, 0xe4, 0x15, 0x1f, 0x95, 0x58, 0xf5, 0xcf, 0x81, - 0x24, 0x10, 0x48, 0xc0, 0x41, 0x69, 0x0d, 0x8a, 0x74, 0x78, 0x29, 0x56, - 0xa9, 0x41, 0x51, 0x69, 0x8b, 0xed, 0xf0, 0xa8, 0x62, 0xaf, 0x6d, 0x73, - 0xbd, 0x5a, 0x69, 0xaf, 0xfa, 0x05, 0xd1, 0x40, 0x2d, 0xe5, 0xc6, 0xd7, - 0x65, 0xda, 0x5b, 0x2f, 0xff, 0x5e, 0x6b, 0xef, 0x93, 0x39, 0x67, 0x32, - 0x13, 0xf0, 0xf6, 0xfe, 0x7f, 0xe3, 0xd7, 0x2e, 0xf6, 0xd9, 0xef, 0xb5, - 0xd7, 0x6b, 0xaf, 0xbd, 0xf6, 0x1e, 0x45, 0x18, 0x46, 0xb2, 0xbf, 0x49, - 0xc8, 0x05, 0xf8, 0xa3, 0x70, 0xb5, 0x44, 0x08, 0x19, 0x1b, 0x87, 0x24, - 0xa8, 0x0b, 0xa4, 0x9a, 0x90, 0xef, 0x39, 0x08, 0xfe, 0x19, 0xe5, 0x12, - 0x61, 0x73, 0x23, 0x21, 0x51, 0x3b, 0x21, 0xb1, 0x3b, 0x08, 0xe9, 0x72, - 0xd3, 0x82, 0x72, 0xd0, 0x41, 0x00, 0x7e, 0x31, 0x5d, 0x24, 0xb9, 0x84, - 0xa4, 0xf3, 0xfa, 0x9b, 0x84, 0xe0, 0xb4, 0x21, 0xd9, 0x84, 0xe8, 0x39, - 0x22, 0xd9, 0xa3, 0x11, 0xd2, 0x92, 0x3d, 0x2b, 0x23, 0xe4, 0x4e, 0xdd, - 0xee, 0x73, 0xbc, 0xdd, 0x9f, 0x34, 0x3a, 0x10, 0x76, 0x36, 0xaa, 0x08, - 0x5f, 0x68, 0xf4, 0x21, 0x3c, 0xd0, 0xa8, 0x91, 0xe8, 0x70, 0x42, 0x5e, - 0x6e, 0x2c, 0x43, 0x78, 0xb0, 0xd1, 0x8f, 0xdf, 0x7f, 0xd6, 0x58, 0x83, - 0xf0, 0x50, 0x63, 0x00, 0xe1, 0x2f, 0x1a, 0xa7, 0x21, 0x8c, 0x36, 0x06, - 0x11, 0x1e, 0x69, 0x9c, 0x8b, 0xf0, 0x58, 0x63, 0x08, 0xeb, 0xbd, 0xd6, - 0xb8, 0x18, 0xe1, 0xf1, 0xc6, 0x7a, 0xfc, 0xfe, 0xeb, 0xc6, 0x06, 0x84, - 0x6f, 0x36, 0xea, 0xf8, 0xfd, 0xb7, 0x8d, 0xad, 0x08, 0xbb, 0x1a, 0xc3, - 0x08, 0xdf, 0x6a, 0xec, 0x40, 0xf8, 0x76, 0x63, 0x04, 0xcb, 0xfd, 0xbe, - 0x71, 0x2f, 0xc2, 0x13, 0x8d, 0x9d, 0xf8, 0xfd, 0x8f, 0x8d, 0x07, 0x11, - 0xbe, 0xd7, 0x18, 0x45, 0x78, 0x13, 0xc9, 0x24, 0x24, 0x87, 0x90, 0x39, - 0x73, 0xde, 0x71, 0xcc, 0x2f, 0x27, 0x64, 0xf8, 0x93, 0xf7, 0xbe, 0x35, - 0x9d, 0xe2, 0x61, 0x63, 0x85, 0xe8, 0x77, 0x6b, 0x90, 0x3e, 0xe6, 0x33, - 0xe3, 0x61, 0xe3, 0x57, 0xd2, 0xdc, 0xce, 0xf2, 0xfe, 0xf8, 0xb8, 0x91, - 0x08, 0xd8, 0xce, 0xc6, 0x74, 0x82, 0xf9, 0x1b, 0x0f, 0xff, 0x94, 0x68, - 0xe9, 0x84, 0xb4, 0x57, 0x44, 0x7d, 0x3a, 0xad, 0x3f, 0x9d, 0xf7, 0x33, - 0x62, 0xcf, 0x01, 0xec, 0xc7, 0x28, 0x97, 0xd8, 0xce, 0xc7, 0x44, 0x62, - 0xed, 0xd8, 0x68, 0x3e, 0xad, 0x37, 0x6c, 0x2b, 0x2b, 0x6f, 0xe4, 0x4f, - 0x87, 0x7e, 0xc6, 0xc6, 0xf3, 0x9f, 0xea, 0x78, 0xc1, 0x51, 0xeb, 0x36, - 0xe7, 0xb3, 0xfa, 0x4f, 0x6f, 0x7b, 0xc1, 0x01, 0xe3, 0x6e, 0x8b, 0xc9, - 0x24, 0x8a, 0xeb, 0x1e, 0x22, 0x84, 0xb6, 0xe3, 0xf2, 0x75, 0x75, 0xe4, - 0x54, 0x11, 0x62, 0x3f, 0x61, 0x27, 0x76, 0xda, 0x54, 0x86, 0x2f, 0x4c, - 0xba, 0xe9, 0xf7, 0xf6, 0xd1, 0xf7, 0x05, 0xc4, 0x2a, 0x98, 0x37, 0x41, - 0xf2, 0xd8, 0xf8, 0xd5, 0x8b, 0x44, 0xa0, 0x69, 0x9d, 0xce, 0x61, 0x0f, - 0x4d, 0x6b, 0xf0, 0xf1, 0xca, 0x78, 0x3f, 0x57, 0x12, 0x11, 0xc7, 0x31, - 0xfc, 0xc9, 0x03, 0xac, 0x9f, 0xd9, 0xef, 0x38, 0x42, 0xb4, 0x9d, 0x5f, - 0xfc, 0x55, 0x21, 0x84, 0xe2, 0xaf, 0x7d, 0x8e, 0x10, 0x49, 0xa3, 0xed, - 0xb7, 0x8f, 0x7d, 0xcb, 0x17, 0x80, 0xba, 0xfa, 0x33, 0x12, 0xd0, 0x9b, - 0x42, 0x8c, 0xbf, 0xa8, 0x2f, 0x48, 0xfb, 0xda, 0x38, 0xf6, 0x65, 0x9f, - 0x4e, 0x61, 0xdb, 0x57, 0x2f, 0x9e, 0x58, 0x00, 0xfd, 0x8d, 0x20, 0x7e, - 0xe8, 0xaf, 0xed, 0xf0, 0x56, 0xa2, 0x41, 0xfe, 0xd0, 0x2e, 0x9f, 0x4e, - 0xdb, 0x6d, 0xe2, 0xf3, 0x6e, 0x9b, 0x37, 0x7f, 0xb0, 0x9a, 0x04, 0x6f, - 0x06, 0xa4, 0xed, 0x12, 0xb1, 0x86, 0x4e, 0xd7, 0x4d, 0x02, 0x91, 0x24, - 0xf4, 0xfb, 0x5d, 0x98, 0x1d, 0xc5, 0x8f, 0xa4, 0xea, 0x44, 0xa3, 0xed, - 0x38, 0x68, 0xb9, 0x64, 0xeb, 0xf0, 0x5d, 0x18, 0x29, 0x2d, 0xd7, 0x96, - 0x1e, 0x9c, 0x23, 0x02, 0x5f, 0xcc, 0xb1, 0xf9, 0x81, 0x2f, 0x26, 0x95, - 0x45, 0x48, 0x8f, 0x3b, 0x3e, 0x6e, 0x48, 0x9f, 0xa2, 0x69, 0xd7, 0x17, - 0x11, 0x22, 0xa5, 0xc3, 0xb8, 0xdf, 0xe8, 0x00, 0x3c, 0x3a, 0xfd, 0xca, - 0x18, 0x27, 0x1d, 0x8d, 0xab, 0xb7, 0x6b, 0x2e, 0xa4, 0x5d, 0x55, 0x8b, - 0x02, 0x0e, 0x5a, 0xbf, 0x7d, 0x44, 0xd4, 0xb7, 0x88, 0x96, 0x57, 0xb4, - 0x4e, 0x9c, 0x2f, 0x29, 0x23, 0xfe, 0xa1, 0xf4, 0xbb, 0x43, 0x0b, 0x11, - 0x58, 0xc7, 0xb6, 0x14, 0xf4, 0x55, 0x0b, 0xf8, 0xce, 0x81, 0x75, 0xfa, - 0x3d, 0xf6, 0x6b, 0xd0, 0xe1, 0x3b, 0xb3, 0x5f, 0x74, 0x2c, 0x30, 0x95, - 0x7f, 0xda, 0xa0, 0x0f, 0x81, 0xd1, 0x17, 0x69, 0x8f, 0x38, 0x6e, 0x48, - 0x8f, 0xe7, 0x3f, 0x69, 0xe4, 0x3b, 0x19, 0xfd, 0x10, 0x87, 0x35, 0x7f, - 0x6b, 0x02, 0x1d, 0x93, 0x82, 0x14, 0xf9, 0x36, 0x8a, 0x68, 0xc0, 0xcb, - 0x08, 0x31, 0xb2, 0x47, 0x00, 0xbc, 0x47, 0x1c, 0xb3, 0x2a, 0xfa, 0x8f, - 0x7b, 0x43, 0xf4, 0x19, 0x5c, 0x47, 0x57, 0x59, 0x04, 0xe9, 0x23, 0x31, - 0x9f, 0xf2, 0x49, 0x6b, 0x09, 0x6d, 0x27, 0xbd, 0x5c, 0xf4, 0x3b, 0x01, - 0x3f, 0x63, 0x19, 0xbf, 0x18, 0xf3, 0xbc, 0x18, 0xdf, 0xb5, 0x72, 0xbc, - 0xb4, 0x95, 0xcf, 0x4a, 0x87, 0xf6, 0x2f, 0x26, 0xb7, 0x2a, 0x3a, 0x45, - 0x12, 0x2d, 0xe3, 0x32, 0x93, 0xfe, 0xef, 0x8a, 0x83, 0x2e, 0x12, 0x75, - 0xc4, 0xd3, 0xa3, 0xa3, 0x5e, 0x4b, 0x7a, 0xcc, 0xf1, 0x7c, 0x4b, 0xf9, - 0xb1, 0x5d, 0x25, 0x96, 0xfc, 0x2b, 0x4f, 0x8c, 0xb4, 0xe4, 0x8f, 0xeb, - 0xae, 0xb4, 0xa4, 0xaf, 0x3e, 0x73, 0x95, 0xa5, 0xfc, 0x35, 0xbd, 0x13, - 0x2d, 0xe9, 0x6f, 0xc6, 0xae, 0xb5, 0x94, 0x9f, 0x40, 0xbe, 0x63, 0x49, - 0x4f, 0x72, 0xdc, 0x62, 0x29, 0x3f, 0x45, 0xad, 0xb5, 0xe4, 0x7f, 0xcb, - 0xb7, 0xd4, 0x92, 0x3f, 0x5d, 0xbb, 0xc7, 0x92, 0xbe, 0xae, 0xec, 0x01, - 0x4b, 0xf9, 0xeb, 0xfd, 0x4d, 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0x8e, 0xff, 0xb7, 0x8e, + 0xfd, 0xbe, 0x70, 0x0a, 0xfd, 0x63, 0xcf, 0x22, 0x5a, 0x1c, 0xb1, 0x23, + 0x9f, 0xe1, 0x6a, 0x8e, 0xc7, 0xf3, 0x8d, 0xca, 0xdb, 0xd5, 0x0c, 0x0f, + 0x2e, 0x48, 0xb9, 0x9f, 0x1d, 0x77, 0x7f, 0x56, 0x41, 0xbf, 0x8b, 0xc0, + 0x5f, 0x86, 0xa7, 0x92, 0x3c, 0x6f, 0xe6, 0xfa, 0x8e, 0xd0, 0xba, 0x6d, + 0xe5, 0x97, 0xd8, 0xef, 0x25, 0x23, 0x05, 0x71, 0x03, 0xf1, 0x1f, 0x69, + 0xf8, 0xa2, 0x88, 0xe4, 0x5b, 0x11, 0x7c, 0x87, 0xd5, 0xf3, 0x15, 0x5a, + 0x3d, 0xff, 0x1b, 0xf6, 0x1a, 0x6b, 0x27, 0xcd, 0x7e, 0x09, 0xbd, 0x2f, + 0xe5, 0x12, 0x1e, 0xfe, 0xbf, 0xb2, 0x9b, 0x16, 0x37, 0xff, 0x03, 0xa8, + 0xaf, 0xde, 0x1e, 0x00, 0x27, 0x00, 0x00, 0x00, }; #ifdef __KERNEL__ void bnx2x_init_e1h_firmware(struct bnx2x *bp) @@ -17819,3 +13858,4 @@ void bnx2x_init_e1h_firmware(struct bnx2x *bp) } #endif +// Total size: 41295 regs diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e2.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e2.c index 6e0e8fd..3c2129c 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e2.c +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_init_values_e2.c @@ -1,27 +1,22 @@ -/* init_ops array contains the list of operations needed to initialize the chip. - * - * For each block in the chip there are three init stages: - * common - HW used by both ports, - * port1 and port2 - initialization for a specific Ethernet port. - * When a port is opened or closed, the management CPU tells the driver - * whether to init/disable common HW in addition to the port HW. - * This way the first port going up will first initializes the common HW, - * and the last port going down also resets the common HW - * - * For each init stage/block there is a list of actions needed in a format: - * {operation, register, data} - * where: - * OP_WR - write a value to the chip. - * OP_RD - read a register (usually a clear on read register). - * OP_SW - string write, write a section of consecutive addresses to the chip. - * OP_SI - copy a string using indirect writes. - * OP_ZR - clear a range of memory. - * OP_ZP - unzip and copy using DMAE. - * OP_WB - string copy using DMAE. - * - * The #defines mark the stages. - * - */ +/* +* ©2011 Broadcom Corporation +* Unless you and Broadcom execute a separate written software license +* agreement governing use of this software, this software is licensed to +* you under the terms of the GNU General Public License version 2, +* available at http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +* +* This file contains an array of operations needed to initialize the chip: +* OP_WR - write a single register. +* OP_RD - read a single register. +* OP_SW - write an array to consecutive registers. +* OP_WB - write an array using DMAE. +* OP_ZR - clear consecutive registers. +* OP_WB_ZR - clear consecutive registers using DMAE. +* OP_ZP - unzip and write an array using DMAE. +* OP_WR_64 - write a 64-bit pattern to consecutive registers. +* OP_IF_MODE_OR - skip next ops if all modes do not match. +* OP_IF_MODE_AND - skip next ops if at least one mode does not match. +*/ #ifdef __KERNEL__ #include #include @@ -29,22427 +24,24269 @@ #include #include #include "bnx2x_compat.h" -#include "bnx2x_init.h" #include "bnx2x.h" +#include "bnx2x_init.h" #endif - static const struct raw_op init_ops_e2[] = { -/* #define PRS_COMMON_START 0 */ - {OP_WR, PRS_REG_INC_VALUE, 0xf}, - {OP_WR, PRS_REG_EVENT_ID_1, 0x45}, - {OP_WR, PRS_REG_EVENT_ID_3, 0x6}, - {OP_WR, PRS_REG_NO_MATCH_EVENT_ID, 0x4}, - {OP_WR, PRS_REG_CM_HDR_TYPE_0, 0x0}, - {OP_WR, PRS_REG_CM_HDR_TYPE_1, 0x12170000}, - {OP_WR, PRS_REG_CM_HDR_TYPE_2, 0x22170000}, - {OP_WR, PRS_REG_CM_HDR_TYPE_3, 0x32170000}, - {OP_ZR, PRS_REG_CM_HDR_TYPE_4, 0x5}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_1, 0x12150000}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_2, 0x22150000}, - {OP_WR, PRS_REG_CM_HDR_LOOPBACK_TYPE_3, 0x32150000}, - {OP_ZR, PRS_REG_CM_HDR_LOOPBACK_TYPE_4, 0x4}, - {OP_WR, PRS_REG_CM_NO_MATCH_HDR, 0x2100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_0, 0x100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_1, 0x10100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_2, 0x20100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_3, 0x30100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_4, 0x40100000}, - {OP_ZR, PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_5, 0x3}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_0, 0x100000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_1, 0x12140000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_2, 0x22140000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_3, 0x32140000}, - {OP_WR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_4, 0x42140000}, - {OP_ZR, PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_5, 0x3}, - {OP_RD, PRS_REG_NUM_OF_PACKETS, 0x0}, - {OP_RD, PRS_REG_NUM_OF_CFC_FLUSH_MESSAGES, 0x0}, - {OP_RD, PRS_REG_NUM_OF_TRANSPARENT_FLUSH_MESSAGES, 0x0}, - {OP_RD, PRS_REG_NUM_OF_DEAD_CYCLES, 0x0}, - {OP_WR, PRS_REG_FCOE_TYPE, 0x8906}, - {OP_WR, PRS_REG_LOAD_CANCELLED_EVENT_ID, 0x36}, - {OP_WR, PRS_REG_CONTEXT_ERROR_EVENT_ID, 0x36}, - {OP_WR, PRS_REG_CM_LOAD_CANCELLED_HDR, 0x8100000}, - {OP_WR, PRS_REG_CM_CONTEXT_ERROR_HDR, 0x8100000}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_0, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_1, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_2, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_3, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_4, 0x7f}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_5, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_6, 0xff}, - {OP_WR, PRS_REG_FLUSH_REGIONS_TYPE_7, 0xff}, - {OP_WR, PRS_REG_PURE_REGIONS, 0x3e}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_0, 0x0}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_1, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_2, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_3, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_4, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_5, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_6, 0x3f}, - {OP_WR, PRS_REG_PACKET_REGIONS_TYPE_7, 0x3f}, -/* #define PRS_COMMON_END 1 */ -/* #define SRCH_COMMON_START 22 */ - {OP_WR, SRC_REG_E1HMF_ENABLE, 0x1}, -/* #define SRCH_COMMON_END 23 */ -/* #define TSDM_COMMON_START 44 */ - {OP_WR, TSDM_REG_CFC_RSP_START_ADDR, 0x211}, - {OP_WR, TSDM_REG_CMP_COUNTER_START_ADDR, 0x200}, - {OP_WR, TSDM_REG_Q_COUNTER_START_ADDR, 0x204}, - {OP_WR, TSDM_REG_PCK_END_MSG_START_ADDR, 0x219}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, TSDM_REG_AGG_INT_EVENT_0, 0x20}, - {OP_ZR, TSDM_REG_AGG_INT_EVENT_1, 0x1f}, - {OP_WR, TSDM_REG_AGG_INT_T_0, 0x1}, - {OP_ZR, TSDM_REG_AGG_INT_T_1, 0x5f}, - {OP_WR, TSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, TSDM_REG_ENABLE_IN2, 0x7f}, - {OP_WR, TSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, TSDM_REG_ENABLE_OUT2, 0x3f}, - {OP_RD, TSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, TSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX4, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX5, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX6, 0xffff}, - {OP_WR, TSDM_REG_CMP_COUNTER_MAX7, 0xffff}, - {OP_WR_ASIC, TSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, TSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, TSDM_REG_TIMER_TICK, 0x3}, -/* #define TSDM_COMMON_END 45 */ -/* #define TCM_COMMON_START 66 */ - {OP_ZR, TCM_REG_AG_CTX, 0xd00}, - {OP_WR, TCM_REG_XX_MAX_LL_SZ, 0x20}, - {OP_WR, TCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, TCM_REG_TQM_TCM_HDR_P, 0x2150020}, - {OP_WR, TCM_REG_TQM_TCM_HDR_S, 0x2150020}, - {OP_WR, TCM_REG_TM_TCM_HDR, 0x30}, - {OP_WR, TCM_REG_ERR_TCM_HDR, 0x8100000}, - {OP_WR, TCM_REG_ERR_EVNT_ID, 0x36}, - {OP_WR, TCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, TCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, TCM_REG_PRS_WEIGHT, 0x4}, - {OP_WR, TCM_REG_PBF_WEIGHT, 0x5}, - {OP_WR, TCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, TCM_REG_TSDM_WEIGHT, 0x4}, - {OP_WR, TCM_REG_TCM_TQM_USE_Q, 0x1}, - {OP_WR, TCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, TCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, TCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, TCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, TCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, TCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, TCM_REG_TQM_INIT_CRD, 0x20}, - {OP_WR, TCM_REG_XX_INIT_CRD, 0x1c}, - {OP_WR, TCM_REG_XX_MSG_NUM, 0x20}, - {OP_ZR, TCM_REG_XX_TABLE, 0xa}, - {OP_SW, TCM_REG_XX_DESCR_TABLE, 0x200000}, - {OP_WR, TCM_REG_N_SM_CTX_LD_0, 0x7}, - {OP_WR, TCM_REG_N_SM_CTX_LD_1, 0x7}, - {OP_WR, TCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, TCM_REG_N_SM_CTX_LD_3, 0x8}, - {OP_WR, TCM_REG_N_SM_CTX_LD_4, 0x1}, - {OP_ZR, TCM_REG_N_SM_CTX_LD_5, 0x3}, - {OP_WR, TCM_REG_TCM_REG0_SZ, 0x6}, - {OP_WR, TCM_REG_TCM_STORM0_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_STORM1_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_TQM_IFEN, 0x1}, - {OP_WR, TCM_REG_STORM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_TQM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_TSDM_IFEN, 0x1}, - {OP_WR, TCM_REG_TM_TCM_IFEN, 0x1}, - {OP_WR, TCM_REG_PRS_IFEN, 0x1}, - {OP_WR, TCM_REG_PBF_IFEN, 0x1}, - {OP_WR, TCM_REG_USEM_IFEN, 0x1}, - {OP_WR, TCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, TCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, TCM_REG_TCM_CFC_IFEN, 0x1}, -/* #define TCM_COMMON_END 67 */ -/* #define TCM_FUNC0_START 72 */ - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0xd}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define TCM_FUNC0_END 73 */ -/* #define TCM_FUNC1_START 74 */ - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x2d}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x20}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x20}, -/* #define TCM_FUNC1_END 75 */ -/* #define TCM_FUNC2_START 76 */ - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0x1d}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x10}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x10}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x10}, -/* #define TCM_FUNC2_END 77 */ -/* #define TCM_FUNC3_START 78 */ - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x3d}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x30}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x30}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x30}, -/* #define TCM_FUNC3_END 79 */ -/* #define TCM_FUNC4_START 80 */ - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0x4d}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x40}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x40}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x40}, -/* #define TCM_FUNC4_END 81 */ -/* #define TCM_FUNC5_START 82 */ - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x6d}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x60}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x60}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x60}, -/* #define TCM_FUNC5_END 83 */ -/* #define TCM_FUNC6_START 84 */ - {OP_WR, TCM_REG_PHYS_QNUM0_0, 0x5d}, - {OP_WR, TCM_REG_PHYS_QNUM1_0, 0x50}, - {OP_WR, TCM_REG_PHYS_QNUM2_0, 0x50}, - {OP_WR, TCM_REG_PHYS_QNUM3_0, 0x50}, -/* #define TCM_FUNC6_END 85 */ -/* #define TCM_FUNC7_START 86 */ - {OP_WR, TCM_REG_PHYS_QNUM0_1, 0x7d}, - {OP_WR, TCM_REG_PHYS_QNUM1_1, 0x70}, - {OP_WR, TCM_REG_PHYS_QNUM2_1, 0x70}, - {OP_WR, TCM_REG_PHYS_QNUM3_1, 0x70}, -/* #define TCM_FUNC7_END 87 */ -/* #define BRB1_COMMON_START 88 */ - {OP_SW, BRB1_REG_LL_RAM, 0x2000020}, - {OP_WR, BRB1_REG_SOFT_RESET, 0x1}, - {OP_SW, BRB1_REG_FREE_LIST_PRS_CRDT, 0x30220}, - {OP_WR, BRB1_REG_SOFT_RESET, 0x0}, -/* #define BRB1_COMMON_END 89 */ -/* #define TSEM_COMMON_START 110 */ - {OP_ZP, TSEM_REG_INT_TABLE, 0xa70000}, - {OP_WR_64, TSEM_REG_INT_TABLE + 0x3d8, 0x50223}, - {OP_ZP, TSEM_REG_PRAM, 0x2c4c0000}, - {OP_ZP, TSEM_REG_PRAM + 0x8000, 0x30fa0b14}, - {OP_ZP, TSEM_REG_PRAM + 0x10000, 0x35ee1753}, - {OP_ZP, TSEM_REG_PRAM + 0x18000, 0x30c124cf}, - {OP_ZP, TSEM_REG_PRAM + 0x20000, 0xe803100}, - {OP_WR_64, TSEM_REG_PRAM + 0x22560, 0x3b540225}, - {OP_RD, TSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, TSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, TSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, TSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, TSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, TSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, TSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, TSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, TSEM_REG_TS_0_AS, 0x0}, - {OP_WR, TSEM_REG_TS_1_AS, 0x1}, - {OP_WR, TSEM_REG_TS_2_AS, 0x4}, - {OP_WR, TSEM_REG_TS_3_AS, 0x0}, - {OP_WR, TSEM_REG_TS_4_AS, 0x1}, - {OP_WR, TSEM_REG_TS_5_AS, 0x3}, - {OP_WR, TSEM_REG_TS_6_AS, 0x0}, - {OP_WR, TSEM_REG_TS_7_AS, 0x1}, - {OP_WR, TSEM_REG_TS_8_AS, 0x4}, - {OP_WR, TSEM_REG_TS_9_AS, 0x0}, - {OP_WR, TSEM_REG_TS_10_AS, 0x1}, - {OP_WR, TSEM_REG_TS_11_AS, 0x3}, - {OP_WR, TSEM_REG_TS_12_AS, 0x0}, - {OP_WR, TSEM_REG_TS_13_AS, 0x1}, - {OP_WR, TSEM_REG_TS_14_AS, 0x4}, - {OP_WR, TSEM_REG_TS_15_AS, 0x0}, - {OP_WR, TSEM_REG_TS_16_AS, 0x4}, - {OP_WR, TSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, TSEM_REG_TS_18_AS, 0x2}, - {OP_WR, TSEM_REG_ENABLE_IN, 0x7fff}, - {OP_WR, TSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, TSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, TSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, TSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, TSEM_REG_THREADS_LIST, 0xff}, - {OP_ZR, TSEM_REG_PASSIVE_BUFFER, 0x400}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18000, 0x34}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18040, 0x18}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18080, 0xc}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x180c0, 0x20}, - {OP_WR_ASIC, TSEM_REG_FAST_MEMORY + 0x18300, 0x86470}, - {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x18300, 0x157}, - {OP_WR_FPGA, TSEM_REG_FAST_MEMORY + 0x18300, 0x55f}, - {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, TSEM_REG_FAST_MEMORY + 0x18340, 0x226}, - {OP_WR_FPGA, TSEM_REG_FAST_MEMORY + 0x18340, 0x1}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x18380, 0x86470}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x183c0, 0x226}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x11480, 0x1}, - {OP_WR_EMUL, TSEM_REG_FAST_MEMORY + 0x11480, 0x0}, - {OP_WR, TSEM_REG_FAST_MEMORY + 0x19440, 0x1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x19448, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x19e0, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x1000, 0xb2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x16c8, 0x20227}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x16c8 + 0x8, 0x8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14478, 0x770}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x17a0, 0x900229}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5000, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5008, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5018, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5028, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5038, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5048, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5058, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5068, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5078, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x4050, 0x6}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4050 + 0x18, 0x202b9}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4040, 0x402bb}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000, 0x102bf}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x10, 0x102c0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x20, 0x102c1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x30, 0x102c2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x40, 0x102c3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x50, 0x102c4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x60, 0x102c5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x70, 0x102c6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x80, 0x102c7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x90, 0x102c8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa0, 0x102c9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb0, 0x102ca}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc0, 0x102cb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd0, 0x102cc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe0, 0x102cd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf0, 0x102ce}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x100, 0x102cf}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x104, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x110, 0x102d0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x114, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x120, 0x102d1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x124, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x130, 0x102d2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x134, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x140, 0x102d3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x144, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x150, 0x102d4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x154, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x160, 0x102d5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x164, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x170, 0x102d6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x174, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x180, 0x102d7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x184, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x190, 0x102d8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x194, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1a0, 0x102d9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1b0, 0x102da}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1c0, 0x102db}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1d0, 0x102dc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1e0, 0x102dd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1f0, 0x102de}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x1f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x200, 0x102df}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x204, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x210, 0x102e0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x214, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x220, 0x102e1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x224, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x230, 0x102e2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x234, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x240, 0x102e3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x244, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x250, 0x102e4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x254, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x260, 0x102e5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x264, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x270, 0x102e6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x274, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x280, 0x102e7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x284, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x290, 0x102e8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x294, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2a0, 0x102e9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2b0, 0x102ea}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2c0, 0x102eb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2d0, 0x102ec}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2e0, 0x102ed}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2f0, 0x102ee}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x2f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x300, 0x102ef}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x304, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x310, 0x102f0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x314, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x320, 0x102f1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x324, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x330, 0x102f2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x334, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x340, 0x102f3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x344, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x350, 0x102f4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x354, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x360, 0x102f5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x364, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x370, 0x102f6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x374, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x380, 0x102f7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x384, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x390, 0x102f8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x394, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3a0, 0x102f9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3b0, 0x102fa}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3c0, 0x102fb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3d0, 0x102fc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3e0, 0x102fd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3f0, 0x102fe}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x3f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x400, 0x102ff}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x404, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x410, 0x10300}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x414, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x420, 0x10301}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x424, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x430, 0x10302}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x434, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x440, 0x10303}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x444, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x450, 0x10304}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x454, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x460, 0x10305}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x464, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x470, 0x10306}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x474, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x480, 0x10307}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x484, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x490, 0x10308}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x494, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4a0, 0x10309}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4b0, 0x1030a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4c0, 0x1030b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4d0, 0x1030c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4e0, 0x1030d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4f0, 0x1030e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x4f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x500, 0x1030f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x504, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x510, 0x10310}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x514, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x520, 0x10311}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x524, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x530, 0x10312}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x534, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x540, 0x10313}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x544, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x550, 0x10314}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x554, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x560, 0x10315}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x564, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x570, 0x10316}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x574, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x580, 0x10317}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x584, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x590, 0x10318}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x594, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5a0, 0x10319}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5b0, 0x1031a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5c0, 0x1031b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5d0, 0x1031c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5e0, 0x1031d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5f0, 0x1031e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x5f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x600, 0x1031f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x604, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x610, 0x10320}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x614, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x620, 0x10321}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x624, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x630, 0x10322}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x634, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x640, 0x10323}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x644, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x650, 0x10324}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x654, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x660, 0x10325}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x664, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x670, 0x10326}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x674, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x680, 0x10327}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x684, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x690, 0x10328}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x694, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6a0, 0x10329}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6b0, 0x1032a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6c0, 0x1032b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6d0, 0x1032c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6e0, 0x1032d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6f0, 0x1032e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x6f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x700, 0x1032f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x704, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x710, 0x10330}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x714, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x720, 0x10331}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x724, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x730, 0x10332}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x734, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x740, 0x10333}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x744, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x750, 0x10334}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x754, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x760, 0x10335}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x764, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x770, 0x10336}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x774, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x780, 0x10337}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x784, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x790, 0x10338}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x794, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7a0, 0x10339}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7b0, 0x1033a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7c0, 0x1033b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7d0, 0x1033c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7e0, 0x1033d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7f0, 0x1033e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x7f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x800, 0x1033f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x804, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x810, 0x10340}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x814, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x820, 0x10341}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x824, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x830, 0x10342}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x834, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x840, 0x10343}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x844, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x850, 0x10344}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x854, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x860, 0x10345}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x864, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x870, 0x10346}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x874, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x880, 0x10347}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x884, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x890, 0x10348}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x894, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8a0, 0x10349}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8b0, 0x1034a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8c0, 0x1034b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8d0, 0x1034c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8e0, 0x1034d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8f0, 0x1034e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x8f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x900, 0x1034f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x904, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x910, 0x10350}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x914, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x920, 0x10351}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x924, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x930, 0x10352}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x934, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x940, 0x10353}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x944, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x950, 0x10354}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x954, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x960, 0x10355}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x964, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x970, 0x10356}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x974, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x980, 0x10357}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x984, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x990, 0x10358}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x994, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9a0, 0x10359}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9a4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9b0, 0x1035a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9b4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9c0, 0x1035b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9c4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9d0, 0x1035c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9d4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9e0, 0x1035d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9e4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9f0, 0x1035e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0x9f4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa00, 0x1035f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa10, 0x10360}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa20, 0x10361}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa30, 0x10362}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa40, 0x10363}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa50, 0x10364}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa60, 0x10365}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa70, 0x10366}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa80, 0x10367}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa90, 0x10368}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xa94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xaa0, 0x10369}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xaa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xab0, 0x1036a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xab4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xac0, 0x1036b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xac4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xad0, 0x1036c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xad4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xae0, 0x1036d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xae4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xaf0, 0x1036e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xaf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb00, 0x1036f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb10, 0x10370}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb20, 0x10371}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb30, 0x10372}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb40, 0x10373}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb50, 0x10374}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb60, 0x10375}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb70, 0x10376}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb80, 0x10377}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb90, 0x10378}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xb94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xba0, 0x10379}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xba4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbb0, 0x1037a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbc0, 0x1037b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbd0, 0x1037c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbe0, 0x1037d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbe4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbf0, 0x1037e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xbf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc00, 0x1037f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc10, 0x10380}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc20, 0x10381}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc30, 0x10382}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc40, 0x10383}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc50, 0x10384}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc60, 0x10385}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc70, 0x10386}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc80, 0x10387}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc90, 0x10388}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xc94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xca0, 0x10389}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xca4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcb0, 0x1038a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcc0, 0x1038b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcd0, 0x1038c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xce0, 0x1038d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xce4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcf0, 0x1038e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xcf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd00, 0x1038f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd10, 0x10390}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd20, 0x10391}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd30, 0x10392}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd40, 0x10393}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd50, 0x10394}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd60, 0x10395}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd70, 0x10396}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd80, 0x10397}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd90, 0x10398}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xd94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xda0, 0x10399}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xda4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdb0, 0x1039a}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdc0, 0x1039b}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdd0, 0x1039c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xde0, 0x1039d}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xde4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdf0, 0x1039e}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xdf4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe00, 0x1039f}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe10, 0x103a0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe20, 0x103a1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe30, 0x103a2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe40, 0x103a3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe50, 0x103a4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe60, 0x103a5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe70, 0x103a6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe80, 0x103a7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe90, 0x103a8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xe94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xea0, 0x103a9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xea4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xeb0, 0x103aa}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xeb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xec0, 0x103ab}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xec4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xed0, 0x103ac}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xed4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xee0, 0x103ad}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xee4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xef0, 0x103ae}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xef4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf00, 0x103af}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf04, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf10, 0x103b0}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf14, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf20, 0x103b1}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf24, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf30, 0x103b2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf34, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf40, 0x103b3}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf44, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf50, 0x103b4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf54, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf60, 0x103b5}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf64, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf70, 0x103b6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf74, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf80, 0x103b7}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf84, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf90, 0x103b8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xf94, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfa0, 0x103b9}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfa4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfb0, 0x103ba}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfb4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfc0, 0x103bb}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfc4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfd0, 0x103bc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfd4, 0x3}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfe0, 0x103bd}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x8000 + 0xfe4, 0x247}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x62c0, 0x2003be}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x16f0, 0x2c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa040, 0x8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xe000, 0x540}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3168, 0x260}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3098, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3090, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x30a8, 0x24}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3138, 0xc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3d28, 0x6}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x12410, 0x660}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x12410 + 0x1980, 0x1403de}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd000, 0x72}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd248, 0x10}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd6b0, 0x20}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd470, 0x90}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd468, 0x2}, -/* #define TSEM_COMMON_END 111 */ -/* #define TSEM_PORT0_START 112 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14400, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3000, 0x12}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd458, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd348, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd358, 0x20}, -/* #define TSEM_PORT0_END 113 */ -/* #define TSEM_PORT1_START 114 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14410, 0x4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x3048, 0x12}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd460, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd350, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xd3d8, 0x20}, -/* #define TSEM_PORT1_END 115 */ -/* #define TSEM_FUNC0_START 116 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14420, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa000, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5000, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5080, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4000, 0x203f2}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63c0, 0x203f4}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7000, 0x4}, -/* #define TSEM_FUNC0_END 117 */ -/* #define TSEM_FUNC1_START 118 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14428, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa008, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5010, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x50c8, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4008, 0x203f6}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63c8, 0x203f8}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7010, 0x4}, -/* #define TSEM_FUNC1_END 119 */ -/* #define TSEM_FUNC2_START 120 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14430, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa010, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5020, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5110, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4010, 0x203fa}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63d0, 0x203fc}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7020, 0x4}, -/* #define TSEM_FUNC2_END 121 */ -/* #define TSEM_FUNC3_START 122 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14438, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa018, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5030, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5158, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4018, 0x203fe}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63d8, 0x20400}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7030, 0x4}, -/* #define TSEM_FUNC3_END 123 */ -/* #define TSEM_FUNC4_START 124 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14440, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa020, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5040, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x51a0, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4020, 0x20402}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63e0, 0x20404}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7040, 0x4}, -/* #define TSEM_FUNC4_END 125 */ -/* #define TSEM_FUNC5_START 126 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14448, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa028, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5050, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x51e8, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4028, 0x20406}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63e8, 0x20408}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7050, 0x4}, -/* #define TSEM_FUNC5_END 127 */ -/* #define TSEM_FUNC6_START 128 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14450, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa030, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5060, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5230, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4030, 0x2040a}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63f0, 0x2040c}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7060, 0x4}, -/* #define TSEM_FUNC6_END 129 */ -/* #define TSEM_FUNC7_START 130 */ - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x14458, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0xa038, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5070, 0x2}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x5278, 0x12}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x4038, 0x2040e}, - {OP_SW, TSEM_REG_FAST_MEMORY + 0x63f8, 0x20410}, - {OP_ZR, TSEM_REG_FAST_MEMORY + 0x7070, 0x4}, -/* #define TSEM_FUNC7_END 131 */ -/* #define MISC_COMMON_START 220 */ - {OP_WR, MISC_REG_LCPLL_CTRL_1, 0x209}, -/* #define MISC_COMMON_END 221 */ -/* #define MISC_FUNC0_START 226 */ - {OP_WR, MISC_REG_NIG_WOL_P0, 0x0}, -/* #define MISC_FUNC0_END 227 */ -/* #define MISC_FUNC1_START 228 */ - {OP_WR, MISC_REG_NIG_WOL_P1, 0x0}, -/* #define MISC_FUNC1_END 229 */ -/* #define MISC_FUNC2_START 230 */ - {OP_WR, MISC_REG_NIG_WOL_P0, 0x0}, -/* #define MISC_FUNC2_END 231 */ -/* #define MISC_FUNC3_START 232 */ - {OP_WR, MISC_REG_NIG_WOL_P1, 0x0}, -/* #define MISC_FUNC3_END 233 */ -/* #define MISC_FUNC4_START 234 */ - {OP_WR, MISC_REG_NIG_WOL_P0, 0x0}, -/* #define MISC_FUNC4_END 235 */ -/* #define MISC_FUNC5_START 236 */ - {OP_WR, MISC_REG_NIG_WOL_P1, 0x0}, -/* #define MISC_FUNC5_END 237 */ -/* #define MISC_FUNC6_START 238 */ - {OP_WR, MISC_REG_NIG_WOL_P0, 0x0}, -/* #define MISC_FUNC6_END 239 */ -/* #define MISC_FUNC7_START 240 */ - {OP_WR, MISC_REG_NIG_WOL_P1, 0x0}, -/* #define MISC_FUNC7_END 241 */ -/* #define NIG_COMMON_START 264 */ - {OP_WR, NIG_REG_PBF_LB_IN_EN, 0x1}, - {OP_WR, NIG_REG_PRS_REQ_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_PBF0_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_PBF1_IN_EN, 0x1}, - {OP_WR, NIG_REG_EGRESS_DEBUG_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB_LB_OUT_EN, 0x1}, - {OP_WR, NIG_REG_PRS_EOP_OUT_EN, 0x1}, -/* #define NIG_COMMON_END 265 */ -/* #define NIG_PORT0_START 266 */ - {OP_WR, NIG_REG_LLH0_CM_HEADER, 0x300000}, - {OP_WR, NIG_REG_LLH0_EVENT_ID, 0x28}, - {OP_WR, NIG_REG_LLH0_ERROR_MASK, 0x0}, - {OP_WR, NIG_REG_LLH0_XCM_MASK, 0x4}, - {OP_WR, NIG_REG_LLH0_BRB1_NOT_MCP, 0x1}, - {OP_WR, NIG_REG_STATUS_INTERRUPT_PORT0, 0x0}, - {OP_WR, NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0, 0xffff}, - {OP_WR, NIG_REG_LLFC_EGRESS_SRC_ENABLE_0, 0x7}, - {OP_WR, NIG_REG_LLH0_XCM_INIT_CREDIT, 0x30}, - {OP_WR, NIG_REG_BRB0_PAUSE_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB0_OUT_EN, 0x1}, - {OP_WR, NIG_REG_XCM0_OUT_EN, 0x1}, -/* #define NIG_PORT0_END 267 */ -/* #define NIG_PORT1_START 268 */ - {OP_WR, NIG_REG_LLH1_CM_HEADER, 0x300000}, - {OP_WR, NIG_REG_LLH1_EVENT_ID, 0x28}, - {OP_WR, NIG_REG_LLH1_ERROR_MASK, 0x0}, - {OP_WR, NIG_REG_LLH1_XCM_MASK, 0x4}, - {OP_WR, NIG_REG_LLH1_BRB1_NOT_MCP, 0x1}, - {OP_WR, NIG_REG_STATUS_INTERRUPT_PORT1, 0x0}, - {OP_WR, NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1, 0xffff}, - {OP_WR, NIG_REG_LLFC_EGRESS_SRC_ENABLE_1, 0x7}, - {OP_WR, NIG_REG_LLH1_XCM_INIT_CREDIT, 0x30}, - {OP_WR, NIG_REG_BRB1_PAUSE_IN_EN, 0x1}, - {OP_WR, NIG_REG_BRB1_OUT_EN, 0x1}, - {OP_WR, NIG_REG_XCM1_OUT_EN, 0x1}, -/* #define NIG_PORT1_END 269 */ -/* #define UPB_COMMON_START 308 */ - {OP_WR, GRCBASE_UPB + PB_REG_CONTROL, 0x20}, -/* #define UPB_COMMON_END 309 */ -/* #define CSDM_COMMON_START 330 */ - {OP_WR, CSDM_REG_CFC_RSP_START_ADDR, 0x211}, - {OP_WR, CSDM_REG_CMP_COUNTER_START_ADDR, 0x200}, - {OP_WR, CSDM_REG_Q_COUNTER_START_ADDR, 0x204}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_0, 0x0}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_1, 0x37}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_2, 0x21}, - {OP_WR, CSDM_REG_AGG_INT_EVENT_3, 0x20}, - {OP_ZR, CSDM_REG_AGG_INT_EVENT_4, 0x1d}, - {OP_WR, CSDM_REG_AGG_INT_T_1, 0x1}, - {OP_ZR, CSDM_REG_AGG_INT_T_2, 0x3f}, - {OP_WR, CSDM_REG_AGG_INT_MODE_1, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_2, 0x1}, - {OP_WR, CSDM_REG_AGG_INT_MODE_3, 0x1}, - {OP_ZR, CSDM_REG_AGG_INT_MODE_4, 0x1c}, - {OP_WR, CSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, CSDM_REG_ENABLE_IN2, 0x7f}, - {OP_WR, CSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, CSDM_REG_ENABLE_OUT2, 0x3f}, - {OP_RD, CSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, CSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX4, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX5, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX6, 0xffff}, - {OP_WR, CSDM_REG_CMP_COUNTER_MAX7, 0xffff}, - {OP_WR_ASIC, CSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, CSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, CSDM_REG_TIMER_TICK, 0x3}, -/* #define CSDM_COMMON_END 331 */ -/* #define USDM_COMMON_START 352 */ - {OP_WR, USDM_REG_CFC_RSP_START_ADDR, 0x1011}, - {OP_WR, USDM_REG_CMP_COUNTER_START_ADDR, 0x1000}, - {OP_WR, USDM_REG_Q_COUNTER_START_ADDR, 0x1004}, - {OP_WR, USDM_REG_PCK_END_MSG_START_ADDR, 0x1021}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, USDM_REG_AGG_INT_EVENT_0, 0x46}, - {OP_WR, USDM_REG_AGG_INT_EVENT_1, 0xc}, - {OP_ZR, USDM_REG_AGG_INT_EVENT_2, 0x2}, - {OP_WR, USDM_REG_AGG_INT_EVENT_4, 0x18}, - {OP_WR, USDM_REG_AGG_INT_EVENT_5, 0xf0}, - {OP_ZR, USDM_REG_AGG_INT_EVENT_6, 0x1f}, - {OP_WR, USDM_REG_AGG_INT_T_5, 0x1}, - {OP_ZR, USDM_REG_AGG_INT_T_6, 0x3a}, - {OP_WR, USDM_REG_AGG_INT_MODE_0, 0x1}, - {OP_ZR, USDM_REG_AGG_INT_MODE_1, 0x3}, - {OP_WR, USDM_REG_AGG_INT_MODE_4, 0x1}, - {OP_WR, USDM_REG_AGG_INT_MODE_5, 0x1}, - {OP_ZR, USDM_REG_AGG_INT_MODE_6, 0x1a}, - {OP_WR, USDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, USDM_REG_ENABLE_IN2, 0x7f}, - {OP_WR, USDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, USDM_REG_ENABLE_OUT2, 0x3f}, - {OP_RD, USDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q2_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, USDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, USDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, USDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX4, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX5, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX6, 0xffff}, - {OP_WR, USDM_REG_CMP_COUNTER_MAX7, 0xffff}, - {OP_WR_ASIC, USDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, USDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, USDM_REG_TIMER_TICK, 0x3}, -/* #define USDM_COMMON_END 353 */ -/* #define CCM_COMMON_START 374 */ - {OP_ZR, CCM_REG_AG_CTX, 0xa00}, - {OP_WR, CCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, CCM_REG_CQM_CCM_HDR_P, 0x2150020}, - {OP_WR, CCM_REG_CQM_CCM_HDR_S, 0x2150020}, - {OP_WR, CCM_REG_ERR_CCM_HDR, 0x8100000}, - {OP_WR, CCM_REG_ERR_EVNT_ID, 0x36}, - {OP_WR, CCM_REG_TSEM_WEIGHT, 0x0}, - {OP_WR, CCM_REG_XSEM_WEIGHT, 0x4}, - {OP_WR, CCM_REG_USEM_WEIGHT, 0x4}, - {OP_ZR, CCM_REG_PBF_WEIGHT, 0x2}, - {OP_WR, CCM_REG_CQM_P_WEIGHT, 0x2}, - {OP_WR, CCM_REG_CCM_CQM_USE_Q, 0x1}, - {OP_WR, CCM_REG_CNT_AUX1_Q, 0x2}, - {OP_WR, CCM_REG_CNT_AUX2_Q, 0x2}, - {OP_WR, CCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, CCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, CCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, CCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, CCM_REG_CQM_INIT_CRD, 0x20}, - {OP_WR, CCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, CCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, CCM_REG_XX_INIT_CRD, 0x3}, - {OP_WR, CCM_REG_XX_MSG_NUM, 0x18}, - {OP_ZR, CCM_REG_XX_TABLE, 0x12}, - {OP_SW, CCM_REG_XX_DESCR_TABLE, 0x180412}, - {OP_ZR, CCM_REG_XX_DESCR_TABLE + 0x60, 0xc}, - {OP_WR, CCM_REG_N_SM_CTX_LD_0, 0x1}, - {OP_WR, CCM_REG_N_SM_CTX_LD_1, 0x2}, - {OP_WR, CCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, CCM_REG_N_SM_CTX_LD_3, 0x8}, - {OP_ZR, CCM_REG_N_SM_CTX_LD_4, 0x4}, - {OP_WR, CCM_REG_CCM_REG0_SZ, 0x4}, - {OP_WR, CCM_REG_CCM_STORM0_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_STORM1_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_CQM_IFEN, 0x1}, - {OP_WR, CCM_REG_STORM_CCM_IFEN, 0x1}, - {OP_WR, CCM_REG_CQM_CCM_IFEN, 0x1}, - {OP_WR, CCM_REG_CSDM_IFEN, 0x1}, - {OP_WR, CCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, CCM_REG_XSEM_IFEN, 0x1}, - {OP_WR, CCM_REG_USEM_IFEN, 0x1}, - {OP_WR, CCM_REG_PBF_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, CCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, CCM_REG_CCM_CFC_IFEN, 0x1}, -/* #define CCM_COMMON_END 375 */ -/* #define CCM_FUNC0_START 380 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x9}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0xa}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x0}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x0}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0xb}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define CCM_FUNC0_END 381 */ -/* #define CCM_FUNC1_START 382 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x29}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x2a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x20}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x20}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x2b}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x20}, -/* #define CCM_FUNC1_END 383 */ -/* #define CCM_FUNC2_START 384 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x19}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0x1a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x10}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x10}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x10}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0x1b}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x10}, -/* #define CCM_FUNC2_END 385 */ -/* #define CCM_FUNC3_START 386 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x39}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x3a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x30}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x30}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x30}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x3b}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x30}, -/* #define CCM_FUNC3_END 387 */ -/* #define CCM_FUNC4_START 388 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x49}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0x4a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x40}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x40}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x40}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0x4b}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x40}, -/* #define CCM_FUNC4_END 389 */ -/* #define CCM_FUNC5_START 390 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x69}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x6a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x60}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x60}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x60}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x6b}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x60}, -/* #define CCM_FUNC5_END 391 */ -/* #define CCM_FUNC6_START 392 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_0, 0x59}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_0, 0x5a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_0, 0x50}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_0, 0x50}, - {OP_WR, CCM_REG_PHYS_QNUM1_0, 0x50}, - {OP_WR, CCM_REG_PHYS_QNUM2_0, 0x5b}, - {OP_WR, CCM_REG_PHYS_QNUM3_0, 0x50}, -/* #define CCM_FUNC6_END 393 */ -/* #define CCM_FUNC7_START 394 */ - {OP_WR, CCM_REG_QOS_PHYS_QNUM0_1, 0x79}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM1_1, 0x7a}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM2_1, 0x70}, - {OP_WR, CCM_REG_QOS_PHYS_QNUM3_1, 0x70}, - {OP_WR, CCM_REG_PHYS_QNUM1_1, 0x70}, - {OP_WR, CCM_REG_PHYS_QNUM2_1, 0x7b}, - {OP_WR, CCM_REG_PHYS_QNUM3_1, 0x70}, -/* #define CCM_FUNC7_END 395 */ -/* #define UCM_COMMON_START 396 */ - {OP_ZR, UCM_REG_AG_CTX, 0x800}, - {OP_WR, UCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, UCM_REG_UQM_UCM_HDR_P, 0x2150020}, - {OP_WR, UCM_REG_UQM_UCM_HDR_S, 0x2150020}, - {OP_WR, UCM_REG_TM_UCM_HDR, 0x30}, - {OP_WR, UCM_REG_ERR_UCM_HDR, 0x8100000}, - {OP_WR, UCM_REG_ERR_EVNT_ID, 0x36}, - {OP_WR, UCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, UCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, UCM_REG_TSEM_WEIGHT, 0x3}, - {OP_WR, UCM_REG_CSEM_WEIGHT, 0x0}, - {OP_WR, UCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, UCM_REG_UQM_P_WEIGHT, 0x6}, - {OP_WR, UCM_REG_UCM_UQM_USE_Q, 0x1}, - {OP_WR, UCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, UCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, UCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, UCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, UCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, UCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, UCM_REG_TM_INIT_CRD, 0x4}, - {OP_WR, UCM_REG_UQM_INIT_CRD, 0x20}, - {OP_WR, UCM_REG_XX_INIT_CRD, 0xe}, - {OP_WR, UCM_REG_XX_MSG_NUM, 0x1b}, - {OP_ZR, UCM_REG_XX_TABLE, 0x12}, - {OP_SW, UCM_REG_XX_DESCR_TABLE, 0x1b042a}, - {OP_ZR, UCM_REG_XX_DESCR_TABLE + 0x6c, 0x5}, - {OP_WR, UCM_REG_N_SM_CTX_LD_0, 0xc}, - {OP_WR, UCM_REG_N_SM_CTX_LD_1, 0x8}, - {OP_WR, UCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, UCM_REG_N_SM_CTX_LD_3, 0x10}, - {OP_WR, UCM_REG_N_SM_CTX_LD_4, 0x10}, - {OP_ZR, UCM_REG_N_SM_CTX_LD_5, 0x3}, - {OP_WR, UCM_REG_UCM_REG0_SZ, 0x3}, - {OP_WR, UCM_REG_UCM_STORM0_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_STORM1_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_UQM_IFEN, 0x1}, - {OP_WR, UCM_REG_STORM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_UQM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_USDM_IFEN, 0x1}, - {OP_WR, UCM_REG_TM_UCM_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_TM_IFEN, 0x1}, - {OP_WR, UCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_XSEM_IFEN, 0x1}, - {OP_WR, UCM_REG_DORQ_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, UCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, UCM_REG_UCM_CFC_IFEN, 0x1}, -/* #define UCM_COMMON_END 397 */ -/* #define UCM_FUNC0_START 402 */ - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0xf}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM2_0, 0x0}, - {OP_WR, UCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define UCM_FUNC0_END 403 */ -/* #define UCM_FUNC1_START 404 */ - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x2f}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x20}, - {OP_WR, UCM_REG_PHYS_QNUM2_1, 0x20}, - {OP_WR, UCM_REG_PHYS_QNUM3_1, 0x20}, -/* #define UCM_FUNC1_END 405 */ -/* #define UCM_FUNC2_START 406 */ - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0x1f}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x10}, - {OP_WR, UCM_REG_PHYS_QNUM2_0, 0x10}, - {OP_WR, UCM_REG_PHYS_QNUM3_0, 0x10}, -/* #define UCM_FUNC2_END 407 */ -/* #define UCM_FUNC3_START 408 */ - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x3f}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x30}, - {OP_WR, UCM_REG_PHYS_QNUM2_1, 0x30}, - {OP_WR, UCM_REG_PHYS_QNUM3_1, 0x30}, -/* #define UCM_FUNC3_END 409 */ -/* #define UCM_FUNC4_START 410 */ - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0x4f}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x40}, - {OP_WR, UCM_REG_PHYS_QNUM2_0, 0x40}, - {OP_WR, UCM_REG_PHYS_QNUM3_0, 0x40}, -/* #define UCM_FUNC4_END 411 */ -/* #define UCM_FUNC5_START 412 */ - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x6f}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x60}, - {OP_WR, UCM_REG_PHYS_QNUM2_1, 0x60}, - {OP_WR, UCM_REG_PHYS_QNUM3_1, 0x60}, -/* #define UCM_FUNC5_END 413 */ -/* #define UCM_FUNC6_START 414 */ - {OP_WR, UCM_REG_PHYS_QNUM0_0, 0x5f}, - {OP_WR, UCM_REG_PHYS_QNUM1_0, 0x50}, - {OP_WR, UCM_REG_PHYS_QNUM2_0, 0x50}, - {OP_WR, UCM_REG_PHYS_QNUM3_0, 0x50}, -/* #define UCM_FUNC6_END 415 */ -/* #define UCM_FUNC7_START 416 */ - {OP_WR, UCM_REG_PHYS_QNUM0_1, 0x7f}, - {OP_WR, UCM_REG_PHYS_QNUM1_1, 0x70}, - {OP_WR, UCM_REG_PHYS_QNUM2_1, 0x70}, - {OP_WR, UCM_REG_PHYS_QNUM3_1, 0x70}, -/* #define UCM_FUNC7_END 417 */ -/* #define USEM_COMMON_START 418 */ - {OP_ZP, USEM_REG_INT_TABLE, 0xd30000}, - {OP_WR_64, USEM_REG_INT_TABLE + 0x3d8, 0x50445}, - {OP_ZP, USEM_REG_PRAM, 0x30d80000}, - {OP_ZP, USEM_REG_PRAM + 0x8000, 0x33c30c37}, - {OP_ZP, USEM_REG_PRAM + 0x10000, 0x387b1928}, - {OP_ZP, USEM_REG_PRAM + 0x18000, 0x33912747}, - {OP_ZP, USEM_REG_PRAM + 0x20000, 0x2713342c}, - {OP_WR_64, USEM_REG_PRAM + 0x25b90, 0x348e0447}, - {OP_RD, USEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, USEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, USEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, USEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, USEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, USEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, USEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, USEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, USEM_REG_TS_0_AS, 0x0}, - {OP_WR, USEM_REG_TS_1_AS, 0x1}, - {OP_WR, USEM_REG_TS_2_AS, 0x4}, - {OP_WR, USEM_REG_TS_3_AS, 0x0}, - {OP_WR, USEM_REG_TS_4_AS, 0x1}, - {OP_WR, USEM_REG_TS_5_AS, 0x3}, - {OP_WR, USEM_REG_TS_6_AS, 0x0}, - {OP_WR, USEM_REG_TS_7_AS, 0x1}, - {OP_WR, USEM_REG_TS_8_AS, 0x4}, - {OP_WR, USEM_REG_TS_9_AS, 0x0}, - {OP_WR, USEM_REG_TS_10_AS, 0x1}, - {OP_WR, USEM_REG_TS_11_AS, 0x3}, - {OP_WR, USEM_REG_TS_12_AS, 0x0}, - {OP_WR, USEM_REG_TS_13_AS, 0x1}, - {OP_WR, USEM_REG_TS_14_AS, 0x4}, - {OP_WR, USEM_REG_TS_15_AS, 0x0}, - {OP_WR, USEM_REG_TS_16_AS, 0x4}, - {OP_WR, USEM_REG_TS_17_AS, 0x3}, - {OP_ZR, USEM_REG_TS_18_AS, 0x2}, - {OP_WR, USEM_REG_ENABLE_IN, 0x7fff}, - {OP_WR, USEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, USEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, USEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, USEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, USEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, USEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18000, 0x1a}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18040, 0x4e}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18080, 0x10}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x180c0, 0x20}, - {OP_WR_ASIC, USEM_REG_FAST_MEMORY + 0x18300, 0x86470}, - {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x18300, 0x157}, - {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18300, 0x55f}, - {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, USEM_REG_FAST_MEMORY + 0x18340, 0x226}, - {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18340, 0x1}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x18380, 0x86470}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x183c0, 0x226}, - {OP_WR, USEM_REG_FAST_MEMORY + 0x11480, 0x1}, - {OP_WR_EMUL, USEM_REG_FAST_MEMORY + 0x11480, 0x0}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8000, 0x102}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x4010, 0x550}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x8480, 0x8f0449}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8480 + 0x23c, 0x9}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x30c0, 0xa}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x30f0, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3080, 0x8}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x3080 + 0x20, 0x104d8}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3080 + 0x24, 0x7}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x3000, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc000, 0x470}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1000, 0x4}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x94c0, 0x804d9}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x6000, 0x540}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x14e00, 0x980}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x12400, 0x980}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1110, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xdb00, 0xd4}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xdea0, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xe000, 0x800}, -/* #define USEM_COMMON_END 419 */ -/* #define USEM_PORT0_START 420 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc000, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc100, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc200, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc300, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc400, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc500, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc600, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc700, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc800, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc900, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xca00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xcb00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xcc00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xcd00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xce00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xcf00, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8450, 0x2}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x8460, 0x204e1}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8460 + 0x8, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xde90, 0x2}, -/* #define USEM_PORT0_END 421 */ -/* #define USEM_PORT1_START 422 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc080, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc180, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc280, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc380, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc480, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc580, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc680, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc780, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc880, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xc980, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xca80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xcb80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xcc80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xcd80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xce80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xcf80, 0x20}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8458, 0x2}, - {OP_SW, USEM_REG_FAST_MEMORY + 0x8470, 0x204e3}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8470 + 0x8, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0xde98, 0x2}, -/* #define USEM_PORT1_END 423 */ -/* #define USEM_FUNC0_START 424 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8410, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1010, 0x2}, -/* #define USEM_FUNC0_END 425 */ -/* #define USEM_FUNC1_START 426 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8418, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1020, 0x2}, -/* #define USEM_FUNC1_END 427 */ -/* #define USEM_FUNC2_START 428 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8420, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1030, 0x2}, -/* #define USEM_FUNC2_END 429 */ -/* #define USEM_FUNC3_START 430 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8428, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1040, 0x2}, -/* #define USEM_FUNC3_END 431 */ -/* #define USEM_FUNC4_START 432 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8430, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1050, 0x2}, -/* #define USEM_FUNC4_END 433 */ -/* #define USEM_FUNC5_START 434 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8438, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1060, 0x2}, -/* #define USEM_FUNC5_END 435 */ -/* #define USEM_FUNC6_START 436 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8440, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1070, 0x2}, -/* #define USEM_FUNC6_END 437 */ -/* #define USEM_FUNC7_START 438 */ - {OP_ZR, USEM_REG_FAST_MEMORY + 0x8448, 0x2}, - {OP_ZR, USEM_REG_FAST_MEMORY + 0x1080, 0x2}, -/* #define USEM_FUNC7_END 439 */ -/* #define CSEM_COMMON_START 440 */ - {OP_ZP, CSEM_REG_INT_TABLE, 0x770000}, - {OP_WR_64, CSEM_REG_INT_TABLE + 0x380, 0x1004e5}, - {OP_ZP, CSEM_REG_PRAM, 0x304c0000}, - {OP_ZP, CSEM_REG_PRAM + 0x8000, 0x25b50c14}, - {OP_WR_64, CSEM_REG_PRAM + 0xd070, 0x645804e7}, - {OP_RD, CSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, CSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, CSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, CSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, CSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, CSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, CSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, CSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, CSEM_REG_TS_0_AS, 0x0}, - {OP_WR, CSEM_REG_TS_1_AS, 0x1}, - {OP_WR, CSEM_REG_TS_2_AS, 0x4}, - {OP_WR, CSEM_REG_TS_3_AS, 0x0}, - {OP_WR, CSEM_REG_TS_4_AS, 0x1}, - {OP_WR, CSEM_REG_TS_5_AS, 0x3}, - {OP_WR, CSEM_REG_TS_6_AS, 0x0}, - {OP_WR, CSEM_REG_TS_7_AS, 0x1}, - {OP_WR, CSEM_REG_TS_8_AS, 0x4}, - {OP_WR, CSEM_REG_TS_9_AS, 0x0}, - {OP_WR, CSEM_REG_TS_10_AS, 0x1}, - {OP_WR, CSEM_REG_TS_11_AS, 0x3}, - {OP_WR, CSEM_REG_TS_12_AS, 0x0}, - {OP_WR, CSEM_REG_TS_13_AS, 0x1}, - {OP_WR, CSEM_REG_TS_14_AS, 0x4}, - {OP_WR, CSEM_REG_TS_15_AS, 0x0}, - {OP_WR, CSEM_REG_TS_16_AS, 0x4}, - {OP_WR, CSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, CSEM_REG_TS_18_AS, 0x2}, - {OP_WR, CSEM_REG_ENABLE_IN, 0x7fff}, - {OP_WR, CSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, CSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, CSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, CSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, CSEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, CSEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18000, 0x10}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18040, 0x12}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18080, 0x30}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x180c0, 0xe}, - {OP_WR_ASIC, CSEM_REG_FAST_MEMORY + 0x18300, 0x86470}, - {OP_WR_EMUL, CSEM_REG_FAST_MEMORY + 0x18300, 0x157}, - {OP_WR_FPGA, CSEM_REG_FAST_MEMORY + 0x18300, 0x55f}, - {OP_WR_EMUL, CSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, CSEM_REG_FAST_MEMORY + 0x18340, 0x226}, - {OP_WR_FPGA, CSEM_REG_FAST_MEMORY + 0x18340, 0x1}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x18380, 0x86470}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x183c0, 0x226}, - {OP_WR, CSEM_REG_FAST_MEMORY + 0x11480, 0x1}, - {OP_WR_EMUL, CSEM_REG_FAST_MEMORY + 0x11480, 0x0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1000, 0x42}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xb000, 0x330}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400, 0x53}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xf400 + 0x14c, 0x104e9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400 + 0x150, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xf400 + 0x15c, 0x104ea}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400 + 0x160, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xf400 + 0x16c, 0x104eb}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400 + 0x170, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xf400 + 0x17c, 0x104ec}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400 + 0x180, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xf400 + 0x18c, 0x104ed}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400 + 0x190, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xf400 + 0x19c, 0x104ee}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400 + 0x1a0, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xf400 + 0x1ac, 0x104ef}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400 + 0x1b0, 0x3}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xf400 + 0x1bc, 0x104f0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf400 + 0x1c0, 0x46}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xe200, 0x440}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x11a0, 0x9004f1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3000, 0xc0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6700, 0x100}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x9000, 0x400}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x6b08, 0x200581}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1150, 0x6}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0x1168, 0x605a1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1168 + 0x18, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x4000, 0x5c0}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000, 0x6}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x18, 0x605a7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x58, 0x605ad}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x98, 0x605b3}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xd8, 0x605b9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xf0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x118, 0x605bf}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x130, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x158, 0x605c5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x170, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x198, 0x605cb}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1d8, 0x605d1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x218, 0x605d7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x230, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x258, 0x605dd}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x270, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x298, 0x605e3}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2d8, 0x605e9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x318, 0x605ef}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x330, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x358, 0x605f5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x370, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x398, 0x605fb}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x3b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x3d8, 0x60601}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x3f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x418, 0x60607}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x430, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x458, 0x6060d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x470, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x498, 0x60613}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x4b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x4d8, 0x60619}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x4f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x518, 0x6061f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x530, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x558, 0x60625}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x570, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x598, 0x6062b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x5b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x5d8, 0x60631}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x5f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x618, 0x60637}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x630, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x658, 0x6063d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x670, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x698, 0x60643}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x6b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x6d8, 0x60649}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x6f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x718, 0x6064f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x730, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x758, 0x60655}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x770, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x798, 0x6065b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x7b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x7d8, 0x60661}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x7f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x818, 0x60667}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x830, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x858, 0x6066d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x870, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x898, 0x60673}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x8b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x8d8, 0x60679}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x8f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x918, 0x6067f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x930, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x958, 0x60685}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x970, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x998, 0x6068b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x9b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x9d8, 0x60691}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x9f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xa18, 0x60697}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xa30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xa58, 0x6069d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xa70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xa98, 0x606a3}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xab0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xad8, 0x606a9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xaf0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xb18, 0x606af}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xb30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xb58, 0x606b5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xb70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xb98, 0x606bb}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xbb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xbd8, 0x606c1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xbf0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xc18, 0x606c7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xc30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xc58, 0x606cd}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xc70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xc98, 0x606d3}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xcb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xcd8, 0x606d9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xcf0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xd18, 0x606df}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xd30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xd58, 0x606e5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xd70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xd98, 0x606eb}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xdb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xdd8, 0x606f1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xdf0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xe18, 0x606f7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xe30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xe58, 0x606fd}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xe70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xe98, 0x60703}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xeb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xed8, 0x60709}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xef0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xf18, 0x6070f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xf30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xf58, 0x60715}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xf70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xf98, 0x6071b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xfb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0xfd8, 0x60721}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0xff0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1018, 0x60727}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1030, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1058, 0x6072d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1070, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1098, 0x60733}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x10b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x10d8, 0x60739}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x10f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1118, 0x6073f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1130, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1158, 0x60745}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1170, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1198, 0x6074b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x11b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x11d8, 0x60751}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x11f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1218, 0x60757}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1230, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1258, 0x6075d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1270, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1298, 0x60763}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x12b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x12d8, 0x60769}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x12f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1318, 0x6076f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1330, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1358, 0x60775}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1370, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1398, 0x6077b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x13b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x13d8, 0x60781}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x13f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1418, 0x60787}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1430, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1458, 0x6078d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1470, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1498, 0x60793}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x14b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x14d8, 0x60799}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x14f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1518, 0x6079f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1530, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1558, 0x607a5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1570, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1598, 0x607ab}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x15b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x15d8, 0x607b1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x15f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1618, 0x607b7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1630, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1658, 0x607bd}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1670, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1698, 0x607c3}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x16b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x16d8, 0x607c9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x16f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1718, 0x607cf}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1730, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1758, 0x607d5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1770, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1798, 0x607db}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x17b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x17d8, 0x607e1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x17f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1818, 0x607e7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1830, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1858, 0x607ed}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1870, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1898, 0x607f3}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x18b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x18d8, 0x607f9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x18f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1918, 0x607ff}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1930, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1958, 0x60805}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1970, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1998, 0x6080b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x19b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x19d8, 0x60811}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x19f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1a18, 0x60817}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1a30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1a58, 0x6081d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1a70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1a98, 0x60823}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1ab0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1ad8, 0x60829}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1af0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1b18, 0x6082f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1b30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1b58, 0x60835}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1b70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1b98, 0x6083b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1bb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1bd8, 0x60841}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1bf0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1c18, 0x60847}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1c30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1c58, 0x6084d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1c70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1c98, 0x60853}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1cb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1cd8, 0x60859}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1cf0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1d18, 0x6085f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1d30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1d58, 0x60865}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1d70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1d98, 0x6086b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1db0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1dd8, 0x60871}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1df0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1e18, 0x60877}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1e30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1e58, 0x6087d}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1e70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1e98, 0x60883}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1eb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1ed8, 0x60889}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1ef0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1f18, 0x6088f}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1f30, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1f58, 0x60895}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1f70, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1f98, 0x6089b}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1fb0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1fd8, 0x608a1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x1ff0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2018, 0x608a7}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2030, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2058, 0x608ad}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2070, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2098, 0x608b3}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x20b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x20d8, 0x608b9}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x20f0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2118, 0x608bf}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2130, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2158, 0x608c5}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2170, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x2198, 0x608cb}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x21b0, 0xa}, - {OP_SW, CSEM_REG_FAST_MEMORY + 0xc000 + 0x21d8, 0x608d1}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xc000 + 0x21f0, 0x4}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1498, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1148, 0x2}, -/* #define CSEM_COMMON_END 441 */ -/* #define CSEM_FUNC0_START 446 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf300, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1108, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5900, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3300, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6040, 0x30}, -/* #define CSEM_FUNC0_END 447 */ -/* #define CSEM_FUNC1_START 448 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf320, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1110, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5918, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3308, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6100, 0x30}, -/* #define CSEM_FUNC1_END 449 */ -/* #define CSEM_FUNC2_START 450 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf340, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1118, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5930, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3310, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x61c0, 0x30}, -/* #define CSEM_FUNC2_END 451 */ -/* #define CSEM_FUNC3_START 452 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf360, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1120, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5948, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3318, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6280, 0x30}, -/* #define CSEM_FUNC3_END 453 */ -/* #define CSEM_FUNC4_START 454 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf380, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1128, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5960, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3320, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6340, 0x30}, -/* #define CSEM_FUNC4_END 455 */ -/* #define CSEM_FUNC5_START 456 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf3a0, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1130, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5978, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3328, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6400, 0x30}, -/* #define CSEM_FUNC5_END 457 */ -/* #define CSEM_FUNC6_START 458 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf3c0, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1138, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x5990, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3330, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x64c0, 0x30}, -/* #define CSEM_FUNC6_END 459 */ -/* #define CSEM_FUNC7_START 460 */ - {OP_ZR, CSEM_REG_FAST_MEMORY + 0xf3e0, 0x8}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x1140, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x59a8, 0x6}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x3338, 0x2}, - {OP_ZR, CSEM_REG_FAST_MEMORY + 0x6580, 0x30}, -/* #define CSEM_FUNC7_END 461 */ -/* #define XPB_COMMON_START 462 */ - {OP_WR, GRCBASE_XPB + PB_REG_CONTROL, 0x28}, -/* #define XPB_COMMON_END 463 */ -/* #define DQ_COMMON_START 484 */ - {OP_WR, DORQ_REG_MODE_ACT, 0x2}, - {OP_WR, DORQ_REG_NORM_CID_OFST, 0x3}, - {OP_WR, DORQ_REG_OUTST_REQ, 0x4}, - {OP_WR, DORQ_REG_DPM_CID_ADDR, 0x0}, - {OP_WR, DORQ_REG_RSP_INIT_CRD, 0x2}, - {OP_WR, DORQ_REG_NORM_CMHEAD_TX, 0x90}, - {OP_WR, DORQ_REG_CMHEAD_RX, 0x90}, - {OP_WR, DORQ_REG_SHRT_CMHEAD, 0x800090}, - {OP_WR, DORQ_REG_ERR_CMHEAD, 0x8100000}, - {OP_WR, DORQ_REG_SHRT_ACT_CNT, 0xc}, - {OP_WR, DORQ_REG_DQ_FIFO_FULL_TH, 0x9ff}, - {OP_WR, DORQ_REG_DQ_FIFO_AFULL_TH, 0x76c}, - {OP_WR, DORQ_REG_CANCEL_CMHEAD, 0x8100000}, - {OP_WR, DORQ_REG_CM_T_FLAG, 0x1}, - {OP_WR, DORQ_REG_AGG_CMD_0, 0x8a}, - {OP_WR, DORQ_REG_AGG_CMD_1, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_2, 0x81}, - {OP_WR, DORQ_REG_AGG_CMD_3, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_4, 0x8a}, - {OP_WR, DORQ_REG_AGG_CMD_5, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_6, 0x81}, - {OP_WR, DORQ_REG_AGG_CMD_7, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_12, 0x8a}, - {OP_WR, DORQ_REG_AGG_CMD_13, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_14, 0x81}, - {OP_WR, DORQ_REG_AGG_CMD_15, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_16, 0x8a}, - {OP_WR, DORQ_REG_AGG_CMD_17, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_18, 0x81}, - {OP_WR, DORQ_REG_AGG_CMD_19, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_32, 0x8a}, - {OP_WR, DORQ_REG_AGG_CMD_33, 0x80}, - {OP_WR, DORQ_REG_AGG_CMD_34, 0x81}, - {OP_WR, DORQ_REG_AGG_CMD_35, 0x80}, - {OP_WR, DORQ_REG_REGN, 0x7c1004}, - {OP_WR, DORQ_REG_IF_EN, 0xf}, -/* #define DQ_COMMON_END 485 */ -/* #define DQ_FUNC0_START 490 */ - {OP_WR, DORQ_REG_MAX_RVFID_SIZE, 0x2}, - {OP_WR, DORQ_REG_VF_NORM_CID_OFST, 0x2}, -/* #define DQ_FUNC0_END 491 */ -/* #define DQ_FUNC1_START 492 */ - {OP_WR, DORQ_REG_MAX_RVFID_SIZE, 0x2}, - {OP_WR, DORQ_REG_VF_NORM_CID_OFST, 0x2}, -/* #define DQ_FUNC1_END 493 */ -/* #define DQ_FUNC2_START 494 */ - {OP_WR, DORQ_REG_MAX_RVFID_SIZE, 0x2}, - {OP_WR, DORQ_REG_VF_NORM_CID_OFST, 0x2}, -/* #define DQ_FUNC2_END 495 */ -/* #define DQ_FUNC3_START 496 */ - {OP_WR, DORQ_REG_MAX_RVFID_SIZE, 0x2}, - {OP_WR, DORQ_REG_VF_NORM_CID_OFST, 0x2}, -/* #define DQ_FUNC3_END 497 */ -/* #define DQ_FUNC4_START 498 */ - {OP_WR, DORQ_REG_MAX_RVFID_SIZE, 0x2}, - {OP_WR, DORQ_REG_VF_NORM_CID_OFST, 0x2}, -/* #define DQ_FUNC4_END 499 */ -/* #define DQ_FUNC5_START 500 */ - {OP_WR, DORQ_REG_MAX_RVFID_SIZE, 0x2}, - {OP_WR, DORQ_REG_VF_NORM_CID_OFST, 0x2}, -/* #define DQ_FUNC5_END 501 */ -/* #define DQ_FUNC6_START 502 */ - {OP_WR, DORQ_REG_MAX_RVFID_SIZE, 0x2}, - {OP_WR, DORQ_REG_VF_NORM_CID_OFST, 0x2}, -/* #define DQ_FUNC6_END 503 */ -/* #define DQ_FUNC7_START 504 */ - {OP_WR, DORQ_REG_MAX_RVFID_SIZE, 0x2}, - {OP_WR, DORQ_REG_VF_NORM_CID_OFST, 0x2}, -/* #define DQ_FUNC7_END 505 */ -/* #define TIMERS_COMMON_START 506 */ - {OP_ZR, TM_REG_CLIN_PRIOR0_CLIENT, 0x2}, - {OP_WR, TM_REG_LIN_SETCLR_FIFO_ALFULL_THR, 0x1c}, - {OP_WR, TM_REG_CFC_AC_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_CFC_CLD_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT0_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT1_VAL, 0x1}, - {OP_WR, TM_REG_CLOUT_CRDCNT2_VAL, 0x1}, - {OP_WR, TM_REG_EXP_CRDCNT_VAL, 0x1}, - {OP_WR, TM_REG_PCIARB_CRDCNT_VAL, 0x2}, - {OP_WR_ASIC, TM_REG_TIMER_TICK_SIZE, 0x3d090}, - {OP_WR_EMUL, TM_REG_TIMER_TICK_SIZE, 0x9c}, - {OP_WR_FPGA, TM_REG_TIMER_TICK_SIZE, 0x271}, - {OP_WR, TM_REG_CL0_CONT_REGION, 0x28}, - {OP_WR, TM_REG_CL1_CONT_REGION, 0x2c}, - {OP_WR, TM_REG_CL2_CONT_REGION, 0x30}, - {OP_WR, TM_REG_TM_CONTEXT_REGION, 0x20}, - {OP_WR, TM_REG_EN_TIMERS, 0x1}, - {OP_WR, TM_REG_EN_REAL_TIME_CNT, 0x1}, - {OP_WR, TM_REG_EN_CL0_INPUT, 0x1}, - {OP_WR, TM_REG_EN_CL1_INPUT, 0x1}, - {OP_WR, TM_REG_EN_CL2_INPUT, 0x1}, -/* #define TIMERS_COMMON_END 507 */ -/* #define TIMERS_PORT0_START 508 */ - {OP_WR, TM_REG_LIN0_LOGIC_ADDR, 0x0}, - {OP_WR, TM_REG_LIN0_PHY_ADDR_VALID, 0x0}, - {OP_ZR, TM_REG_LIN0_PHY_ADDR, 0x2}, -/* #define TIMERS_PORT0_END 509 */ -/* #define TIMERS_PORT1_START 510 */ - {OP_WR, TM_REG_LIN1_LOGIC_ADDR, 0x0}, - {OP_WR, TM_REG_LIN1_PHY_ADDR_VALID, 0x0}, - {OP_ZR, TM_REG_LIN1_PHY_ADDR, 0x2}, -/* #define TIMERS_PORT1_END 511 */ -/* #define XSDM_COMMON_START 528 */ - {OP_WR, XSDM_REG_CFC_RSP_START_ADDR, 0x1214}, - {OP_WR, XSDM_REG_CMP_COUNTER_START_ADDR, 0x1200}, - {OP_WR, XSDM_REG_Q_COUNTER_START_ADDR, 0x1204}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX0, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX1, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX2, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX3, 0xffff}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_0, 0x20}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_1, 0x38}, - {OP_ZR, XSDM_REG_AGG_INT_EVENT_2, 0x2}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_4, 0x23}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_5, 0x24}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_6, 0x25}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_7, 0x26}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_8, 0x27}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_9, 0x39}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_10, 0x3a}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_11, 0x2b}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_12, 0x2c}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_13, 0x2d}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_14, 0xec}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_15, 0x0}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_16, 0x29}, - {OP_WR, XSDM_REG_AGG_INT_EVENT_17, 0x2a}, - {OP_ZR, XSDM_REG_AGG_INT_EVENT_18, 0xe}, - {OP_WR, XSDM_REG_AGG_INT_T_0, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_T_1, 0x8}, - {OP_WR, XSDM_REG_AGG_INT_T_9, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_T_10, 0x4}, - {OP_WR, XSDM_REG_AGG_INT_T_14, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_T_15, 0x31}, - {OP_WR, XSDM_REG_AGG_INT_MODE_0, 0x1}, - {OP_WR, XSDM_REG_AGG_INT_MODE_1, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_MODE_2, 0x7}, - {OP_WR, XSDM_REG_AGG_INT_MODE_9, 0x1}, - {OP_WR, XSDM_REG_AGG_INT_MODE_10, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_MODE_11, 0x3}, - {OP_WR, XSDM_REG_AGG_INT_MODE_14, 0x1}, - {OP_ZR, XSDM_REG_AGG_INT_MODE_15, 0x11}, - {OP_WR, XSDM_REG_ENABLE_IN1, 0x7ffffff}, - {OP_WR, XSDM_REG_ENABLE_IN2, 0x7f}, - {OP_WR, XSDM_REG_ENABLE_OUT1, 0x7ffffff}, - {OP_WR, XSDM_REG_ENABLE_OUT2, 0x3f}, - {OP_RD, XSDM_REG_NUM_OF_Q0_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q1_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q3_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q4_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q5_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q6_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q7_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q8_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q9_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q10_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_Q11_CMD, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_PKT_END_MSG, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_PXP_ASYNC_REQ, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_ACK_AFTER_PLACE, 0x0}, - {OP_RD, XSDM_REG_NUM_OF_DPM_REQ, 0x0}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX4, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX5, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX6, 0xffff}, - {OP_WR, XSDM_REG_CMP_COUNTER_MAX7, 0xffff}, - {OP_WR_ASIC, XSDM_REG_TIMER_TICK, 0x3e8}, - {OP_WR_EMUL, XSDM_REG_TIMER_TICK, 0x1}, - {OP_WR_FPGA, XSDM_REG_TIMER_TICK, 0x3}, -/* #define XSDM_COMMON_END 529 */ -/* #define QM_COMMON_START 550 */ - {OP_WR, QM_REG_ACTCTRINITVAL_0, 0xc}, - {OP_WR, QM_REG_ACTCTRINITVAL_1, 0x5}, - {OP_WR, QM_REG_ACTCTRINITVAL_2, 0xa}, - {OP_WR, QM_REG_ACTCTRINITVAL_3, 0x5}, - {OP_WR, QM_REG_PCIREQAT, 0x2}, - {OP_WR, QM_REG_CMINITCRD_0, 0x4}, - {OP_WR, QM_REG_CMINITCRD_1, 0x4}, - {OP_WR, QM_REG_CMINITCRD_2, 0x4}, - {OP_WR, QM_REG_CMINITCRD_3, 0x4}, - {OP_WR, QM_REG_CMINITCRD_4, 0x4}, - {OP_WR, QM_REG_CMINITCRD_5, 0x4}, - {OP_WR, QM_REG_CMINITCRD_6, 0x4}, - {OP_WR, QM_REG_CMINITCRD_7, 0x4}, - {OP_WR, QM_REG_OUTLDREQ, 0x6}, - {OP_WR, QM_REG_CTXREG_0, 0x7c}, - {OP_WR, QM_REG_CTXREG_1, 0x3d}, - {OP_WR, QM_REG_CTXREG_2, 0x3f}, - {OP_WR, QM_REG_CTXREG_3, 0x9c}, - {OP_WR, QM_REG_BYTECRDCMDQ_0, 0x6000}, - {OP_WR, QM_REG_BYTECRDCMDQ_1, 0x6000}, - {OP_WR, QM_REG_BYTECRDCMDQ_2, 0x6000}, - {OP_WR, QM_REG_BYTECRDCMDQ_3, 0x6000}, - {OP_WR, QM_REG_BYTECRDCOST, 0x25e4}, - {OP_WR, QM_REG_BYTECRDINITVAL, 0x8000}, - {OP_WR, QM_REG_BYTECREDITAFULLTHR, 0x25e3}, - {OP_WR, QM_REG_CMINTVOQMASK_0, 0xc08}, - {OP_WR, QM_REG_CMINTVOQMASK_1, 0x40}, - {OP_WR, QM_REG_CMINTVOQMASK_2, 0x100}, - {OP_WR, QM_REG_CMINTVOQMASK_3, 0x20}, - {OP_WR, QM_REG_CMINTVOQMASK_4, 0x17}, - {OP_WR, QM_REG_CMINTVOQMASK_5, 0x80}, - {OP_WR, QM_REG_CMINTVOQMASK_6, 0x200}, - {OP_WR, QM_REG_CMINTVOQMASK_7, 0x0}, - {OP_WR, QM_REG_ENBYPVOQMASK, 0x13}, - {OP_WR, QM_REG_ENBYTECRD_LSB, 0xcf00cf}, - {OP_WR, QM_REG_ENBYTECRD_MSB, 0xcf00cf}, - {OP_WR, QM_REG_ENSEC, 0x7}, - {OP_WR, QM_REG_HWAEMPTYMASK_LSB, 0x1ff01ff}, - {OP_WR, QM_REG_HWAEMPTYMASK_MSB, 0x1ff01ff}, - {OP_ZR, QM_REG_QVOQIDX_0, 0x2}, - {OP_WR, QM_REG_QVOQIDX_10, 0x5}, - {OP_WR, QM_REG_QVOQIDX_11, 0x5}, - {OP_WR, QM_REG_QVOQIDX_12, 0x5}, - {OP_WR, QM_REG_QVOQIDX_13, 0x8}, - {OP_WR, QM_REG_QVOQIDX_14, 0x6}, - {OP_WR, QM_REG_QVOQIDX_15, 0x7}, - {OP_ZR, QM_REG_QVOQIDX_16, 0x4}, - {OP_WR, QM_REG_QVOQIDX_2, 0x0}, - {OP_ZR, QM_REG_QVOQIDX_20, 0x2}, - {OP_WR, QM_REG_QVOQIDX_22, 0x4}, - {OP_WR, QM_REG_QVOQIDX_23, 0x1}, - {OP_WR, QM_REG_QVOQIDX_24, 0x2}, - {OP_WR, QM_REG_QVOQIDX_25, 0x5}, - {OP_WR, QM_REG_QVOQIDX_26, 0x5}, - {OP_WR, QM_REG_QVOQIDX_27, 0x5}, - {OP_WR, QM_REG_QVOQIDX_28, 0x5}, - {OP_WR, QM_REG_QVOQIDX_29, 0x8}, - {OP_WR, QM_REG_QVOQIDX_3, 0x0}, - {OP_WR, QM_REG_QVOQIDX_30, 0x6}, - {OP_WR, QM_REG_QVOQIDX_31, 0x7}, - {OP_ZR, QM_REG_QVOQIDX_32, 0x6}, - {OP_WR, QM_REG_QVOQIDX_38, 0x4}, - {OP_WR, QM_REG_QVOQIDX_39, 0x1}, - {OP_WR, QM_REG_QVOQIDX_4, 0x0}, - {OP_WR, QM_REG_QVOQIDX_40, 0x2}, - {OP_WR, QM_REG_QVOQIDX_41, 0x5}, - {OP_WR, QM_REG_QVOQIDX_42, 0x5}, - {OP_WR, QM_REG_QVOQIDX_43, 0x5}, - {OP_WR, QM_REG_QVOQIDX_44, 0x5}, - {OP_WR, QM_REG_QVOQIDX_45, 0x8}, - {OP_WR, QM_REG_QVOQIDX_46, 0x6}, - {OP_WR, QM_REG_QVOQIDX_47, 0x7}, - {OP_ZR, QM_REG_QVOQIDX_48, 0x2}, - {OP_WR, QM_REG_QVOQIDX_5, 0x0}, - {OP_ZR, QM_REG_QVOQIDX_50, 0x4}, - {OP_WR, QM_REG_QVOQIDX_54, 0x4}, - {OP_WR, QM_REG_QVOQIDX_55, 0x1}, - {OP_WR, QM_REG_QVOQIDX_56, 0x2}, - {OP_WR, QM_REG_QVOQIDX_57, 0x5}, - {OP_WR, QM_REG_QVOQIDX_58, 0x5}, - {OP_WR, QM_REG_QVOQIDX_59, 0x5}, - {OP_WR, QM_REG_QVOQIDX_6, 0x4}, - {OP_WR, QM_REG_QVOQIDX_60, 0x5}, - {OP_WR, QM_REG_QVOQIDX_61, 0x8}, - {OP_WR, QM_REG_QVOQIDX_62, 0x6}, - {OP_WR, QM_REG_QVOQIDX_63, 0x7}, - {OP_WR, QM_REG_QVOQIDX_7, 0x1}, - {OP_WR, QM_REG_QVOQIDX_8, 0x2}, - {OP_WR, QM_REG_QVOQIDX_9, 0x5}, - {OP_WR, QM_REG_TASKCRDCOST_0, 0x4c}, - {OP_WR, QM_REG_TASKCRDCOST_1, 0x4c}, - {OP_ZR, QM_REG_TASKCRDCOST_10, 0x2}, - {OP_WR, QM_REG_TASKCRDCOST_2, 0x0}, - {OP_WR, QM_REG_TASKCRDCOST_3, 0x0}, - {OP_WR, QM_REG_TASKCRDCOST_4, 0x4c}, - {OP_ZR, QM_REG_TASKCRDCOST_5, 0x5}, - {OP_WR, QM_REG_VOQCMDQ, 0x204}, - {OP_WR, QM_REG_VOQQMASK_0_LSB, 0x3f003f}, - {OP_WR, QM_REG_VOQQMASK_0_MSB, 0x3f003f}, - {OP_ZR, QM_REG_VOQQMASK_10_LSB, 0x4}, - {OP_WR, QM_REG_VOQQMASK_1_LSB, 0x800080}, - {OP_WR, QM_REG_VOQQMASK_1_MSB, 0x800080}, - {OP_WR, QM_REG_VOQQMASK_2_LSB, 0x1000100}, - {OP_WR, QM_REG_VOQQMASK_2_MSB, 0x1000100}, - {OP_ZR, QM_REG_VOQQMASK_3_LSB, 0x2}, - {OP_WR, QM_REG_VOQQMASK_4_LSB, 0x400040}, - {OP_WR, QM_REG_VOQQMASK_4_MSB, 0x400040}, - {OP_WR, QM_REG_VOQQMASK_5_LSB, 0x1e001e00}, - {OP_WR, QM_REG_VOQQMASK_5_MSB, 0x1e001e00}, - {OP_WR, QM_REG_VOQQMASK_6_LSB, 0x40004000}, - {OP_WR, QM_REG_VOQQMASK_6_MSB, 0x40004000}, - {OP_WR, QM_REG_VOQQMASK_7_LSB, 0x80008000}, - {OP_WR, QM_REG_VOQQMASK_7_MSB, 0x80008000}, - {OP_WR, QM_REG_VOQQMASK_8_LSB, 0x20002000}, - {OP_WR, QM_REG_VOQQMASK_8_MSB, 0x20002000}, - {OP_ZR, QM_REG_VOQQMASK_9_LSB, 0x2}, - {OP_WR, QM_REG_VOQCREDITAFULLTHR, 0x4b}, - {OP_WR, QM_REG_VOQINITCREDIT_0, 0x140}, - {OP_WR, QM_REG_VOQINITCREDIT_1, 0x140}, - {OP_ZR, QM_REG_VOQINITCREDIT_10, 0x2}, - {OP_WR, QM_REG_VOQINITCREDIT_2, 0x0}, - {OP_WR, QM_REG_VOQINITCREDIT_3, 0x0}, - {OP_WR, QM_REG_VOQINITCREDIT_4, 0x140}, - {OP_ZR, QM_REG_VOQINITCREDIT_5, 0x5}, - {OP_WR, QM_REG_WRRWEIGHTS_0, 0x1010101}, - {OP_WR, QM_REG_WRRWEIGHTS_1, 0x1012004}, - {OP_WR, QM_REG_WRRWEIGHTS_10, 0x20081001}, - {OP_WR, QM_REG_WRRWEIGHTS_11, 0x1010120}, - {OP_WR, QM_REG_WRRWEIGHTS_12, 0x1010101}, - {OP_WR, QM_REG_WRRWEIGHTS_13, 0x1012004}, - {OP_WR, QM_REG_WRRWEIGHTS_14, 0x20081001}, - {OP_WR, QM_REG_WRRWEIGHTS_15, 0x1010120}, - {OP_WR, QM_REG_WRRWEIGHTS_2, 0x20081001}, - {OP_WR, QM_REG_WRRWEIGHTS_3, 0x1010120}, - {OP_WR, QM_REG_WRRWEIGHTS_4, 0x1010101}, - {OP_WR, QM_REG_WRRWEIGHTS_5, 0x1012004}, - {OP_WR, QM_REG_WRRWEIGHTS_6, 0x20081001}, - {OP_WR, QM_REG_WRRWEIGHTS_7, 0x1010120}, - {OP_WR, QM_REG_WRRWEIGHTS_8, 0x1010101}, - {OP_WR, QM_REG_WRRWEIGHTS_9, 0x1012004}, - {OP_WR, QM_REG_PQ2PCIFUNC_0, 0x0}, - {OP_WR, QM_REG_PQ2PCIFUNC_1, 0x2}, - {OP_WR, QM_REG_PQ2PCIFUNC_2, 0x4}, - {OP_WR, QM_REG_PQ2PCIFUNC_3, 0x6}, - {OP_WR, QM_REG_PQ_MODE, 0x1}, - {OP_WR, QM_REG_CMINTEN, 0xff}, -/* #define QM_COMMON_END 551 */ -/* #define PBF_COMMON_START 572 */ - {OP_WR, PBF_REG_INIT, 0x1}, - {OP_WR, PBF_REG_E15_FW_COMPAT_MODE, 0x0}, - {OP_WR, PBF_REG_RST_FLG_MODE, 0x1}, - {OP_WR, PBF_REG_SYN_FLG_MODE, 0x1}, - {OP_WR, PBF_REG_DROP_PKT_UPON_ERR, 0x1}, - {OP_WR, PBF_REG_NO_PAD_IN_PKT, 0x0}, - {OP_WR, PBF_REG_INIT_P0, 0x1}, - {OP_WR, PBF_REG_INIT_P1, 0x1}, - {OP_WR, PBF_REG_INIT_P4, 0x1}, - {OP_WR, PBF_REG_MAC_IF0_ENABLE, 0x1}, - {OP_WR, PBF_REG_MAC_IF1_ENABLE, 0x1}, - {OP_WR, PBF_REG_MAC_LB_ENABLE, 0x1}, - {OP_WR, PBF_REG_IF_ENABLE_REG, 0xffff}, - {OP_ZR, PBF_REG_INIT_P0, 0x3}, - {OP_WR, PBF_REG_INIT, 0x0}, -/* #define PBF_COMMON_END 573 */ -/* #define XCM_COMMON_START 594 */ - {OP_ZR, XCM_REG_AG_CTX, 0x2000}, - {OP_WR, XCM_REG_XX_OVFL_EVNT_ID, 0x32}, - {OP_WR, XCM_REG_XQM_XCM_HDR_P, 0x3150020}, - {OP_WR, XCM_REG_XQM_XCM_HDR_S, 0x3150020}, - {OP_WR, XCM_REG_TM_XCM_HDR, 0x1000030}, - {OP_WR, XCM_REG_ERR_XCM_HDR, 0x8100000}, - {OP_WR, XCM_REG_ERR_EVNT_ID, 0x36}, - {OP_WR, XCM_REG_EXPR_EVNT_ID, 0x30}, - {OP_WR, XCM_REG_STOP_EVNT_ID, 0x31}, - {OP_WR, XCM_REG_STORM_WEIGHT, 0x2}, - {OP_WR, XCM_REG_TSEM_WEIGHT, 0x5}, - {OP_WR, XCM_REG_CSEM_WEIGHT, 0x2}, - {OP_WR, XCM_REG_USEM_WEIGHT, 0x2}, - {OP_WR, XCM_REG_PBF_WEIGHT, 0x7}, - {OP_WR, XCM_REG_CP_WEIGHT, 0x0}, - {OP_WR, XCM_REG_XSDM_WEIGHT, 0x5}, - {OP_WR, XCM_REG_XQM_P_WEIGHT, 0x3}, - {OP_WR, XCM_REG_XCM_XQM_USE_Q, 0x1}, - {OP_WR, XCM_REG_XQM_BYP_ACT_UPD, 0xc}, - {OP_WR, XCM_REG_UNA_GT_NXT_Q, 0x0}, - {OP_WR, XCM_REG_AUX1_Q, 0x2}, - {OP_WR, XCM_REG_AUX_CNT_FLG_Q_19, 0x1}, - {OP_WR, XCM_REG_GR_ARB_TYPE, 0x1}, - {OP_WR, XCM_REG_GR_LD0_PR, 0x1}, - {OP_WR, XCM_REG_GR_LD1_PR, 0x2}, - {OP_WR, XCM_REG_CFC_INIT_CRD, 0x1}, - {OP_WR, XCM_REG_FIC0_INIT_CRD, 0x40}, - {OP_WR, XCM_REG_FIC1_INIT_CRD, 0x40}, - {OP_WR, XCM_REG_TM_INIT_CRD, 0x4}, - {OP_WR, XCM_REG_XQM_INIT_CRD, 0x20}, - {OP_WR, XCM_REG_XX_INIT_CRD, 0x2}, - {OP_WR, XCM_REG_XX_MSG_NUM, 0x20}, - {OP_ZR, XCM_REG_XX_TABLE, 0x12}, - {OP_SW, XCM_REG_XX_DESCR_TABLE, 0x2008d7}, - {OP_WR, XCM_REG_N_SM_CTX_LD_0, 0xf}, - {OP_WR, XCM_REG_N_SM_CTX_LD_1, 0x7}, - {OP_WR, XCM_REG_N_SM_CTX_LD_2, 0x0}, - {OP_WR, XCM_REG_N_SM_CTX_LD_3, 0xe}, - {OP_WR, XCM_REG_N_SM_CTX_LD_4, 0xe}, - {OP_ZR, XCM_REG_N_SM_CTX_LD_5, 0x3}, - {OP_WR, XCM_REG_XCM_REG0_SZ, 0x4}, - {OP_WR, XCM_REG_XCM_STORM0_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_STORM1_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_XQM_IFEN, 0x1}, - {OP_WR, XCM_REG_STORM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XQM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XSDM_IFEN, 0x1}, - {OP_WR, XCM_REG_TM_XCM_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_TM_IFEN, 0x1}, - {OP_WR, XCM_REG_TSEM_IFEN, 0x1}, - {OP_WR, XCM_REG_CSEM_IFEN, 0x1}, - {OP_WR, XCM_REG_USEM_IFEN, 0x1}, - {OP_WR, XCM_REG_DORQ_IFEN, 0x1}, - {OP_WR, XCM_REG_PBF_IFEN, 0x1}, - {OP_WR, XCM_REG_NIG0_IFEN, 0x1}, - {OP_WR, XCM_REG_NIG1_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_AG_WR_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_AG_RD_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_SM_WR_IFEN, 0x1}, - {OP_WR, XCM_REG_CDU_SM_RD_IFEN, 0x1}, - {OP_WR, XCM_REG_XCM_CFC_IFEN, 0x1}, -/* #define XCM_COMMON_END 595 */ -/* #define XCM_FUNC0_START 600 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_0, 0x0}, -/* #define XCM_FUNC0_END 601 */ -/* #define XCM_FUNC1_START 602 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_1, 0x20}, -/* #define XCM_FUNC1_END 603 */ -/* #define XCM_FUNC2_START 604 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_0, 0x10}, -/* #define XCM_FUNC2_END 605 */ -/* #define XCM_FUNC3_START 606 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_1, 0x30}, -/* #define XCM_FUNC3_END 607 */ -/* #define XCM_FUNC4_START 608 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_0, 0x40}, -/* #define XCM_FUNC4_END 609 */ -/* #define XCM_FUNC5_START 610 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_1, 0x60}, -/* #define XCM_FUNC5_END 611 */ -/* #define XCM_FUNC6_START 612 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_0, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD00, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD10, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL00, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL10, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_0, 0x50}, -/* #define XCM_FUNC6_END 613 */ -/* #define XCM_FUNC7_START 614 */ - {OP_WR, XCM_REG_GLB_DEL_ACK_TMR_VAL_1, 0xc8}, - {OP_WR, XCM_REG_GLB_DEL_ACK_MAX_CNT_1, 0x2}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01, 0x0}, - {OP_WR, XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11, 0x0}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD01, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_CMD11, 0x2}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL01, 0xff}, - {OP_WR, XCM_REG_WU_DA_CNT_UPD_VAL11, 0xff}, - {OP_WR, XCM_REG_PHYS_QNUM3_1, 0x70}, -/* #define XCM_FUNC7_END 615 */ -/* #define XSEM_COMMON_START 616 */ - {OP_ZP, XSEM_REG_INT_TABLE, 0xb10000}, - {OP_WR_64, XSEM_REG_INT_TABLE + 0x3b8, 0x908f7}, - {OP_ZP, XSEM_REG_PRAM, 0x2a070000}, - {OP_ZP, XSEM_REG_PRAM + 0x8000, 0x37fc0a82}, - {OP_ZP, XSEM_REG_PRAM + 0x10000, 0x35b21882}, - {OP_ZP, XSEM_REG_PRAM + 0x18000, 0x39f225ef}, - {OP_ZP, XSEM_REG_PRAM + 0x20000, 0x3a30346c}, - {OP_ZP, XSEM_REG_PRAM + 0x28000, 0x330e42f9}, - {OP_ZP, XSEM_REG_PRAM + 0x30000, 0xdca4fbd}, - {OP_WR_64, XSEM_REG_PRAM + 0x32060, 0x1bf408f9}, - {OP_RD, XSEM_REG_MSG_NUM_FIC0, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FIC1, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC0, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC1, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC2, 0x0}, - {OP_RD, XSEM_REG_MSG_NUM_FOC3, 0x0}, - {OP_WR, XSEM_REG_ARB_ELEMENT0, 0x1}, - {OP_WR, XSEM_REG_ARB_ELEMENT1, 0x2}, - {OP_WR, XSEM_REG_ARB_ELEMENT2, 0x3}, - {OP_WR, XSEM_REG_ARB_ELEMENT3, 0x0}, - {OP_WR, XSEM_REG_ARB_ELEMENT4, 0x4}, - {OP_WR, XSEM_REG_ARB_CYCLE_SIZE, 0x1}, - {OP_WR, XSEM_REG_TS_0_AS, 0x0}, - {OP_WR, XSEM_REG_TS_1_AS, 0x1}, - {OP_WR, XSEM_REG_TS_2_AS, 0x4}, - {OP_WR, XSEM_REG_TS_3_AS, 0x0}, - {OP_WR, XSEM_REG_TS_4_AS, 0x1}, - {OP_WR, XSEM_REG_TS_5_AS, 0x3}, - {OP_WR, XSEM_REG_TS_6_AS, 0x0}, - {OP_WR, XSEM_REG_TS_7_AS, 0x1}, - {OP_WR, XSEM_REG_TS_8_AS, 0x4}, - {OP_WR, XSEM_REG_TS_9_AS, 0x0}, - {OP_WR, XSEM_REG_TS_10_AS, 0x1}, - {OP_WR, XSEM_REG_TS_11_AS, 0x3}, - {OP_WR, XSEM_REG_TS_12_AS, 0x0}, - {OP_WR, XSEM_REG_TS_13_AS, 0x1}, - {OP_WR, XSEM_REG_TS_14_AS, 0x4}, - {OP_WR, XSEM_REG_TS_15_AS, 0x0}, - {OP_WR, XSEM_REG_TS_16_AS, 0x4}, - {OP_WR, XSEM_REG_TS_17_AS, 0x3}, - {OP_ZR, XSEM_REG_TS_18_AS, 0x2}, - {OP_WR, XSEM_REG_ENABLE_IN, 0x7fff}, - {OP_WR, XSEM_REG_ENABLE_OUT, 0x3ff}, - {OP_WR, XSEM_REG_FIC0_DISABLE, 0x0}, - {OP_WR, XSEM_REG_FIC1_DISABLE, 0x0}, - {OP_WR, XSEM_REG_PAS_DISABLE, 0x0}, - {OP_WR, XSEM_REG_THREADS_LIST, 0xffff}, - {OP_ZR, XSEM_REG_PASSIVE_BUFFER, 0x800}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18bc0, 0x1}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18000, 0x0}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18040, 0x18}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18080, 0xc}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x180c0, 0x66}, - {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18300, 0x86470}, - {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18300, 0x157}, - {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18300, 0x55f}, - {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x18340, 0x0}, - {OP_WR_ASIC, XSEM_REG_FAST_MEMORY + 0x18340, 0x226}, - {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18340, 0x1}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x18380, 0x86470}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x183c0, 0x226}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x11480, 0x1}, - {OP_WR_EMUL, XSEM_REG_FAST_MEMORY + 0x11480, 0x0}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x19440, 0x1}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x19448, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x99b0, 0x4}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x99b0 + 0x10, 0x408fb}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x99b0 + 0x20, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x99b0 + 0x28, 0x208ff}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9000, 0x48}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x2008, 0xc8}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x2000, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9128, 0x86}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc000, 0x120}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9348, 0x3}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9348 + 0xc, 0x30901}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9ee8, 0x4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x15410, 0x550}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9c10, 0x10904}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9c10 + 0x4, 0x11}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9c60, 0x8f0905}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9c60 + 0x23c, 0x3}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x3000, 0x20994}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x3000 + 0x8, 0x100}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x4040, 0x10}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x4000, 0x100996}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x8408, 0x809a6}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0xc4e0, 0x409ae}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0xc500, 0x209b2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9ed8, 0x4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x6000, 0x540}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xa948, 0x130}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xa930, 0x6}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xa000, 0x24c}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x13410, 0x660}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x13410 + 0x1980, 0x1409b4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9c58, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xb000, 0x50}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xbb70, 0x70}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xbb68, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xb948, 0x4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xd000, 0x800}, -/* #define XSEM_COMMON_END 617 */ -/* #define XSEM_PORT0_START 618 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9360, 0x32}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5020, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5030, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5000, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5010, 0x2}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x5208, 0x1}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x99e0, 0x209c8}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x94f0, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x94f0 + 0x88, 0x109ca}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x94f0 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9620, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9620 + 0x88, 0x109cb}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9620 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9750, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9750 + 0x88, 0x109cc}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9750 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9880, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9880 + 0x88, 0x109cd}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9880 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xbb58, 0x2}, -/* #define XSEM_PORT0_END 619 */ -/* #define XSEM_PORT1_START 620 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9428, 0x32}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5028, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5038, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5008, 0x2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5018, 0x2}, - {OP_WR, XSEM_REG_FAST_MEMORY + 0x520c, 0x1}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x99e8, 0x209ce}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9588, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9588 + 0x88, 0x109d0}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9588 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x96b8, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x96b8 + 0x88, 0x109d1}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x96b8 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x97e8, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x97e8 + 0x88, 0x109d2}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x97e8 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9918, 0x22}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9918 + 0x88, 0x109d3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x9918 + 0x8c, 0x3}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xbb60, 0x2}, -/* #define XSEM_PORT1_END 621 */ -/* #define XSEM_FUNC0_START 622 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc480, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x99f0, 0x1009d4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5048, 0xe}, -/* #define XSEM_FUNC0_END 623 */ -/* #define XSEM_FUNC1_START 624 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc488, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9a30, 0x1009e4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5080, 0xe}, -/* #define XSEM_FUNC1_END 625 */ -/* #define XSEM_FUNC2_START 626 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc490, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9a70, 0x1009f4}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x50b8, 0xe}, -/* #define XSEM_FUNC2_END 627 */ -/* #define XSEM_FUNC3_START 628 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc498, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9ab0, 0x100a04}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x50f0, 0xe}, -/* #define XSEM_FUNC3_END 629 */ -/* #define XSEM_FUNC4_START 630 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc4a0, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9af0, 0x100a14}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5128, 0xe}, -/* #define XSEM_FUNC4_END 631 */ -/* #define XSEM_FUNC5_START 632 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc4a8, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9b30, 0x100a24}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5160, 0xe}, -/* #define XSEM_FUNC5_END 633 */ -/* #define XSEM_FUNC6_START 634 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc4b0, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9b70, 0x100a34}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x5198, 0xe}, -/* #define XSEM_FUNC6_END 635 */ -/* #define XSEM_FUNC7_START 636 */ - {OP_ZR, XSEM_REG_FAST_MEMORY + 0xc4b8, 0x2}, - {OP_SW, XSEM_REG_FAST_MEMORY + 0x9bb0, 0x100a44}, - {OP_ZR, XSEM_REG_FAST_MEMORY + 0x51d0, 0xe}, -/* #define XSEM_FUNC7_END 637 */ -/* #define CDU_COMMON_START 638 */ - {OP_WR, CDU_REG_CDU_CONTROL0, 0x1}, - {OP_WR, CDU_REG_MF_MODE, 0x1}, - {OP_WR, CDU_REG_CDU_CHK_MASK0, 0x3d000}, - {OP_WR, CDU_REG_CDU_CHK_MASK1, 0x3d}, - {OP_WB, CDU_REG_L1TT, 0x2000a54}, - {OP_WB, CDU_REG_MATT, 0x100c54}, - {OP_ZR, CDU_REG_MATT + 0x40, 0x8}, - {OP_WB, CDU_REG_MATT + 0x60, 0x100c64}, - {OP_ZR, CDU_REG_MATT + 0xa0, 0x18}, -/* #define CDU_COMMON_END 639 */ -/* #define DMAE_COMMON_START 660 */ - {OP_ZR, DMAE_REG_CMD_MEM, 0xe0}, - {OP_WR, DMAE_REG_CRC16C_INIT, 0x0}, - {OP_WR, DMAE_REG_CRC16T10_INIT, 0x1}, - {OP_WR, DMAE_REG_PXP_REQ_INIT_CRD, 0x2}, - {OP_WR, DMAE_REG_PCI_IFEN, 0x1}, - {OP_WR, DMAE_REG_GRC_IFEN, 0x1}, -/* #define DMAE_COMMON_END 661 */ -/* #define PXP_COMMON_START 682 */ - {OP_WR, PXP_REG_HST_ZONE_PERM_TABLE_INIT, 0x1}, - {OP_WB, PXP_REG_HST_INBOUND_INT + 0x400, 0x50c74}, - {OP_WB, PXP_REG_HST_INBOUND_INT, 0x50c79}, - {OP_WB, PXP_REG_HST_INBOUND_INT + 0x120, 0x50c7e}, - {OP_WB, PXP_REG_HST_INBOUND_INT + 0x300, 0x50c83}, -/* #define PXP_COMMON_END 683 */ -/* #define CFC_COMMON_START 704 */ - {OP_ZR, CFC_REG_LINK_LIST, 0x100}, - {OP_WR, CFC_REG_CONTROL0, 0x10}, - {OP_WR, CFC_REG_DISABLE_ON_ERROR, 0x3fff}, - {OP_WR, CFC_REG_INTERFACES, 0x280000}, - {OP_WR, CFC_REG_LCREQ_WEIGHTS, 0x84924a}, - {OP_WR, CFC_REG_INTERFACES, 0x0}, -/* #define CFC_COMMON_END 705 */ -/* #define CFC_FUNC0_START 710 */ - {OP_WR, CFC_REG_DISABLE_ROBUSTWB_PF, 0x1}, -/* #define CFC_FUNC0_END 711 */ -/* #define CFC_FUNC1_START 712 */ - {OP_WR, CFC_REG_DISABLE_ROBUSTWB_PF, 0x1}, -/* #define CFC_FUNC1_END 713 */ -/* #define CFC_FUNC2_START 714 */ - {OP_WR, CFC_REG_DISABLE_ROBUSTWB_PF, 0x1}, -/* #define CFC_FUNC2_END 715 */ -/* #define CFC_FUNC3_START 716 */ - {OP_WR, CFC_REG_DISABLE_ROBUSTWB_PF, 0x1}, -/* #define CFC_FUNC3_END 717 */ -/* #define CFC_FUNC4_START 718 */ - {OP_WR, CFC_REG_DISABLE_ROBUSTWB_PF, 0x1}, -/* #define CFC_FUNC4_END 719 */ -/* #define CFC_FUNC5_START 720 */ - {OP_WR, CFC_REG_DISABLE_ROBUSTWB_PF, 0x1}, -/* #define CFC_FUNC5_END 721 */ -/* #define CFC_FUNC6_START 722 */ - {OP_WR, CFC_REG_DISABLE_ROBUSTWB_PF, 0x1}, -/* #define CFC_FUNC6_END 723 */ -/* #define CFC_FUNC7_START 724 */ - {OP_WR, CFC_REG_DISABLE_ROBUSTWB_PF, 0x1}, -/* #define CFC_FUNC7_END 725 */ -/* #define PXP2_COMMON_START 748 */ - {OP_WR, PXP2_REG_PGL_CONTROL0, 0x1f68040}, - {OP_WR, PXP2_REG_PGL_CONTROL1, 0x3c10}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_0, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_TSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_USDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_0, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_1, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_2, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_3, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_4, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_5, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_6, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_CSDM_7, 0xffffffff}, - {OP_WR, PXP2_REG_PGL_INT_XSDM_0, 0xf800c000}, - {OP_WR, PXP2_REG_PGL_INT_USDM_0, 0xf000c000}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ6, 0x8}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ9, 0x8}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ10, 0x8}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ11, 0x2}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ17, 0x4}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ18, 0x5}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ19, 0x4}, - {OP_WR, PXP2_REG_RD_MAX_BLKS_VQ22, 0x0}, - {OP_WR, PXP2_REG_RD_START_INIT, 0x1}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD0, 0x40}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD1, 0x1808}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD2, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD3, 0x803}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD4, 0x40}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD5, 0x3}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD6, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD7, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD8, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD9, 0x10003}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD10, 0x803}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD11, 0x803}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD12, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD13, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD14, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD15, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD16, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD17, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD18, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD19, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD20, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD22, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD23, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD24, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD25, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD26, 0x3}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD27, 0x3}, - {OP_WR, PXP2_REG_PSWRQ_BW_ADD28, 0x2403}, - {OP_WR, PXP2_REG_RQ_BW_WR_ADD29, 0x2f}, - {OP_WR, PXP2_REG_RQ_BW_WR_ADD30, 0x9}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND0, 0x19}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB1, 0x184}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB2, 0x183}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB3, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND4, 0x19}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND5, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB6, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB7, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB8, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB9, 0xc86}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB10, 0x306}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB11, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND12, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND13, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND14, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND15, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND16, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND17, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND18, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND19, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND20, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND22, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND23, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND24, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND25, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND26, 0x6}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND27, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_UB28, 0x306}, - {OP_WR, PXP2_REG_RQ_BW_WR_UBOUND29, 0x13}, - {OP_WR, PXP2_REG_RQ_BW_WR_UBOUND30, 0x6}, - {OP_WR, PXP2_REG_PSWRQ_BW_L1, 0x1004}, - {OP_WR, PXP2_REG_PSWRQ_BW_L2, 0x1004}, - {OP_WR, PXP2_REG_PSWRQ_BW_RD, 0x106440}, - {OP_WR, PXP2_REG_PSWRQ_BW_WR, 0x106440}, - {OP_WR, PXP2_REG_RQ_ILT_MODE, 0x1}, - {OP_WR, PXP2_REG_RQ_BW_RD_ADD_TREQ, 0x40}, - {OP_WR, PXP2_REG_RQ_BW_RD_UBOUND_TREQ, 0x19}, - {OP_WR, PXP2_REG_RQ_BW_RD_L_TREQ, 0x1}, - {OP_WR, PXP2_REG_RQ_ELT_DISABLE, 0x1}, - {OP_WR, PXP2_REG_RQ_RBC_DONE, 0x1}, -/* #define PXP2_COMMON_END 749 */ -/* #define PXP2_FUNC0_START 754 */ - {OP_WR, PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE, 0x3}, -/* #define PXP2_FUNC0_END 755 */ -/* #define PXP2_FUNC1_START 756 */ - {OP_WR, PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE, 0x3}, -/* #define PXP2_FUNC1_END 757 */ -/* #define PXP2_FUNC2_START 758 */ - {OP_WR, PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE, 0x3}, -/* #define PXP2_FUNC2_END 759 */ -/* #define PXP2_FUNC3_START 760 */ - {OP_WR, PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE, 0x3}, -/* #define PXP2_FUNC3_END 761 */ -/* #define PXP2_FUNC4_START 762 */ - {OP_WR, PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE, 0x3}, -/* #define PXP2_FUNC4_END 763 */ -/* #define PXP2_FUNC5_START 764 */ - {OP_WR, PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE, 0x3}, -/* #define PXP2_FUNC5_END 765 */ -/* #define PXP2_FUNC6_START 766 */ - {OP_WR, PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE, 0x3}, -/* #define PXP2_FUNC6_END 767 */ -/* #define PXP2_FUNC7_START 768 */ - {OP_WR, PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE, 0x3}, -/* #define PXP2_FUNC7_END 769 */ -/* #define MISC_AEU_COMMON_START 770 */ - {OP_ZR, MISC_REG_AEU_GENERAL_ATTN_0, 0xc}, - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_20, 0x0}, - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_21, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE1_NIG_0, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_NIG_0, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_NIG_0, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_NIG_0, 0xf0000000}, - {OP_WR, MISC_REG_AEU_ENABLE1_PXP_0, 0x55540000}, - {OP_WR, MISC_REG_AEU_ENABLE2_PXP_0, 0x55555555}, - {OP_WR, MISC_REG_AEU_ENABLE3_PXP_0, 0x5555}, - {OP_WR, MISC_REG_AEU_ENABLE4_PXP_0, 0xf0000000}, - {OP_WR, MISC_REG_AEU_ENABLE1_PXP_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE2_PXP_1, 0x10000}, - {OP_WR, MISC_REG_AEU_ENABLE3_PXP_1, 0x5014}, - {OP_WR, MISC_REG_AEU_ENABLE4_PXP_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE5_NIG_0, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE5_PXP_0, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE5_PXP_1, 0x0}, - {OP_WR, MISC_REG_AEU_CLR_LATCH_SIGNAL, 0xc00}, - {OP_WR, MISC_REG_AEU_GENERAL_MASK, 0x3}, -/* #define MISC_AEU_COMMON_END 771 */ -/* #define MISC_AEU_PORT0_START 772 */ - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0, 0xfff55fff}, - {OP_WR, MISC_REG_AEU_ENABLE3_FUNC_0_OUT_0, 0xffff}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, 0xf00003e0}, - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_0_OUT_1, 0xa000}, - {OP_ZR, MISC_REG_AEU_ENABLE3_FUNC_0_OUT_1, 0x5}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_2, 0xfe00000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_3, 0x7}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_4, 0x400}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_5, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_5, 0x1000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_6, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_6, 0x4000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_0_OUT_7, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_0_OUT_7, 0x10000}, - {OP_ZR, MISC_REG_AEU_INVERTER_1_FUNC_0, 0x4}, - {OP_WR, MISC_REG_AEU_ENABLE5_FUNC_0_OUT_0, 0xfc}, - {OP_ZR, MISC_REG_AEU_ENABLE5_FUNC_0_OUT_1, 0x7}, - {OP_WR, MISC_REG_AEU_INVERTER_5_FUNC_0, 0x0}, -/* #define MISC_AEU_PORT0_END 773 */ -/* #define MISC_AEU_PORT1_START 774 */ - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0, 0xff5c0000}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0, 0xfff55fff}, - {OP_WR, MISC_REG_AEU_ENABLE3_FUNC_1_OUT_0, 0xffff}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, 0xf00003e0}, - {OP_WR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_1, 0x0}, - {OP_WR, MISC_REG_AEU_ENABLE2_FUNC_1_OUT_1, 0xa000}, - {OP_ZR, MISC_REG_AEU_ENABLE3_FUNC_1_OUT_1, 0x5}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_2, 0xfe00000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_3, 0x7}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_4, 0x800}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_5, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_5, 0x2000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_6, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_6, 0x8000}, - {OP_ZR, MISC_REG_AEU_ENABLE1_FUNC_1_OUT_7, 0x3}, - {OP_WR, MISC_REG_AEU_ENABLE4_FUNC_1_OUT_7, 0x20000}, - {OP_ZR, MISC_REG_AEU_INVERTER_1_FUNC_1, 0x4}, - {OP_WR, MISC_REG_AEU_ENABLE5_FUNC_1_OUT_0, 0xfc}, - {OP_ZR, MISC_REG_AEU_ENABLE5_FUNC_1_OUT_1, 0x7}, - {OP_WR, MISC_REG_AEU_INVERTER_5_FUNC_1, 0x0}, -/* #define MISC_AEU_PORT1_END 775 */ -/* #define MISC_AEU_FUNC0_START 776 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_12, 0x0}, -/* #define MISC_AEU_FUNC0_END 777 */ -/* #define MISC_AEU_FUNC1_START 778 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_13, 0x0}, -/* #define MISC_AEU_FUNC1_END 779 */ -/* #define MISC_AEU_FUNC2_START 780 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_14, 0x0}, -/* #define MISC_AEU_FUNC2_END 781 */ -/* #define MISC_AEU_FUNC3_START 782 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_15, 0x0}, -/* #define MISC_AEU_FUNC3_END 783 */ -/* #define MISC_AEU_FUNC4_START 784 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_16, 0x0}, -/* #define MISC_AEU_FUNC4_END 785 */ -/* #define MISC_AEU_FUNC5_START 786 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_17, 0x0}, -/* #define MISC_AEU_FUNC5_END 787 */ -/* #define MISC_AEU_FUNC6_START 788 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_18, 0x0}, -/* #define MISC_AEU_FUNC6_END 789 */ -/* #define MISC_AEU_FUNC7_START 790 */ - {OP_WR, MISC_REG_AEU_GENERAL_ATTN_19, 0x0}, -/* #define MISC_AEU_FUNC7_END 791 */ -/* #define PGLUE_B_COMMON_START 792 */ - {OP_WR, PGLUE_B_REG_TSDM_START_OFFSET_A, 0xe000}, - {OP_WR, PGLUE_B_REG_TSDM_START_OFFSET_B, 0xf300}, - {OP_WR, PGLUE_B_REG_TSDM_VF_SHIFT_B, 0x3}, - {OP_WR, PGLUE_B_REG_TSDM_ZONE_A_SIZE_PF, 0x1}, - {OP_ZR, PGLUE_B_REG_TSDM_INB_INT_A_PF_ENABLE, 0x3}, - {OP_WR, PGLUE_B_REG_XSDM_START_OFFSET_A, 0x6000}, - {OP_WR, PGLUE_B_REG_XSDM_START_OFFSET_B, 0x7300}, - {OP_WR, PGLUE_B_REG_XSDM_VF_SHIFT_B, 0x3}, - {OP_WR, PGLUE_B_REG_XSDM_ZONE_A_SIZE_PF, 0x1}, - {OP_ZR, PGLUE_B_REG_XSDM_INB_INT_A_PF_ENABLE, 0x3}, - {OP_WR, PGLUE_B_REG_CSDM_START_OFFSET_A, 0x4000}, - {OP_WR, PGLUE_B_REG_CSDM_START_OFFSET_B, 0x5300}, - {OP_WR, PGLUE_B_REG_CSDM_VF_SHIFT_B, 0x4}, - {OP_WR, PGLUE_B_REG_CSDM_ZONE_A_SIZE_PF, 0x1}, - {OP_ZR, PGLUE_B_REG_CSDM_INB_INT_A_PF_ENABLE, 0x2}, - {OP_WR, PGLUE_B_REG_CSDM_INB_INT_B_VF_ENABLE, 0x1}, - {OP_WR, PGLUE_B_REG_USDM_START_OFFSET_A, 0x6000}, - {OP_WR, PGLUE_B_REG_USDM_START_OFFSET_B, 0x7300}, - {OP_WR, PGLUE_B_REG_USDM_VF_SHIFT_B, 0x3}, - {OP_WR, PGLUE_B_REG_USDM_ZONE_A_SIZE_PF, 0x1}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_PF_ENABLE, 0x1}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_VF_ENABLE, 0x1}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_B_VF_ENABLE, 0x0}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_0, 0x300}, - {OP_WR, PGLUE_B_REG_CSDM_INB_INT_B_VF, 0x3f008}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_1, 0x300}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_2, 0x300}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_3, 0x300}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_4, 0x300}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_5, 0x300}, - {OP_WR, PGLUE_B_REG_USDM_INB_INT_A_6, 0x300}, -/* #define PGLUE_B_COMMON_END 793 */ -/* #define PGLUE_B_FUNC0_START 798 */ - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE, 0x1}, -/* #define PGLUE_B_FUNC0_END 799 */ -/* #define PGLUE_B_FUNC1_START 800 */ - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE, 0x1}, -/* #define PGLUE_B_FUNC1_END 801 */ -/* #define PGLUE_B_FUNC2_START 802 */ - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE, 0x1}, -/* #define PGLUE_B_FUNC2_END 803 */ -/* #define PGLUE_B_FUNC3_START 804 */ - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE, 0x1}, -/* #define PGLUE_B_FUNC3_END 805 */ -/* #define PGLUE_B_FUNC4_START 806 */ - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE, 0x1}, -/* #define PGLUE_B_FUNC4_END 807 */ -/* #define PGLUE_B_FUNC5_START 808 */ - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE, 0x1}, -/* #define PGLUE_B_FUNC5_END 809 */ -/* #define PGLUE_B_FUNC6_START 810 */ - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE, 0x1}, -/* #define PGLUE_B_FUNC6_END 811 */ -/* #define PGLUE_B_FUNC7_START 812 */ - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 0x1}, - {OP_WR, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE, 0x1}, -/* #define PGLUE_B_FUNC7_END 813 */ -/* #define IGU_COMMON_START 814 */ - {OP_WR, IGU_REG_TIMER_MASKING_VALUE, 0x61a8}, -/* #define IGU_COMMON_END 815 */ -/* #define IGU_FUNC0_START 820 */ - {OP_ZR, IGU_REG_ATTENTION_ACK_BITS, 0x3}, - {OP_WR, IGU_REG_TRAILING_EDGE_LATCH, 0x0}, - {OP_WR, IGU_REG_LEADING_EDGE_LATCH, 0x0}, -/* #define IGU_FUNC0_END 821 */ -/* #define IGU_FUNC1_START 822 */ - {OP_ZR, IGU_REG_ATTENTION_ACK_BITS, 0x3}, - {OP_WR, IGU_REG_TRAILING_EDGE_LATCH, 0x0}, - {OP_WR, IGU_REG_LEADING_EDGE_LATCH, 0x0}, -/* #define IGU_FUNC1_END 823 */ -/* #define IGU_FUNC2_START 824 */ - {OP_ZR, IGU_REG_ATTENTION_ACK_BITS, 0x3}, - {OP_WR, IGU_REG_TRAILING_EDGE_LATCH, 0x0}, - {OP_WR, IGU_REG_LEADING_EDGE_LATCH, 0x0}, -/* #define IGU_FUNC2_END 825 */ -/* #define IGU_FUNC3_START 826 */ - {OP_ZR, IGU_REG_ATTENTION_ACK_BITS, 0x3}, - {OP_WR, IGU_REG_TRAILING_EDGE_LATCH, 0x0}, - {OP_WR, IGU_REG_LEADING_EDGE_LATCH, 0x0}, -/* #define IGU_FUNC3_END 827 */ -/* #define IGU_FUNC4_START 828 */ - {OP_ZR, IGU_REG_ATTENTION_ACK_BITS, 0x3}, - {OP_WR, IGU_REG_TRAILING_EDGE_LATCH, 0x0}, - {OP_WR, IGU_REG_LEADING_EDGE_LATCH, 0x0}, -/* #define IGU_FUNC4_END 829 */ -/* #define IGU_FUNC5_START 830 */ - {OP_ZR, IGU_REG_ATTENTION_ACK_BITS, 0x3}, - {OP_WR, IGU_REG_TRAILING_EDGE_LATCH, 0x0}, - {OP_WR, IGU_REG_LEADING_EDGE_LATCH, 0x0}, -/* #define IGU_FUNC5_END 831 */ -/* #define IGU_FUNC6_START 832 */ - {OP_ZR, IGU_REG_ATTENTION_ACK_BITS, 0x3}, - {OP_WR, IGU_REG_TRAILING_EDGE_LATCH, 0x0}, - {OP_WR, IGU_REG_LEADING_EDGE_LATCH, 0x0}, -/* #define IGU_FUNC6_END 833 */ -/* #define IGU_FUNC7_START 834 */ - {OP_ZR, IGU_REG_ATTENTION_ACK_BITS, 0x3}, - {OP_WR, IGU_REG_TRAILING_EDGE_LATCH, 0x0}, - {OP_WR, IGU_REG_LEADING_EDGE_LATCH, 0x0}, -/* #define IGU_FUNC7_END 835 */ -/* #define ATC_COMMON_START 836 */ - {OP_WR, ATC_REG_ATC_INIT_ARRAY, 0x1}, -/* #define ATC_COMMON_END 837 */ -/* #define QM_4PORT_COMMON_START 858 */ - {OP_WR, QM_REG_BYTECRDCMDQ_0, 0x2000}, - {OP_WR, QM_REG_BYTECRDCMDQ_1, 0x2000}, - {OP_WR, QM_REG_BYTECRDCMDQ_2, 0x6555}, - {OP_WR, QM_REG_BYTECRDCMDQ_3, 0x6555}, - {OP_WR, QM_REG_QVOQIDX_23, 0x0}, - {OP_WR, QM_REG_QVOQIDX_32, 0x1}, - {OP_WR, QM_REG_QVOQIDX_33, 0x1}, - {OP_WR, QM_REG_QVOQIDX_34, 0x1}, - {OP_WR, QM_REG_QVOQIDX_35, 0x1}, - {OP_WR, QM_REG_QVOQIDX_36, 0x1}, - {OP_WR, QM_REG_QVOQIDX_37, 0x1}, - {OP_WR, QM_REG_QVOQIDX_48, 0x1}, - {OP_WR, QM_REG_QVOQIDX_49, 0x1}, - {OP_WR, QM_REG_QVOQIDX_50, 0x1}, - {OP_WR, QM_REG_QVOQIDX_51, 0x1}, - {OP_WR, QM_REG_QVOQIDX_52, 0x1}, - {OP_WR, QM_REG_QVOQIDX_53, 0x1}, - {OP_WR, QM_REG_QVOQIDX_7, 0x0}, - {OP_WR, QM_REG_VOQQMASK_0_LSB, 0xbf00bf}, - {OP_ZR, QM_REG_VOQQMASK_0_MSB, 0x2}, - {OP_WR, QM_REG_VOQQMASK_1_MSB, 0xbf00bf}, - {OP_WR, QM_REG_PQ2PCIFUNC_2, 0x1}, - {OP_WR, QM_REG_PQ2PCIFUNC_3, 0x3}, - {OP_WR, QM_REG_PQ_MODE, 0x0}, -/* #define QM_4PORT_COMMON_END 859 */ -/* #define XSEM_4PORT_COMMON_START 880 */ - {OP_SW, XSEM_REG_FAST_MEMORY + 0xc4e0, 0xa0c88}, -/* #define XSEM_4PORT_COMMON_END 881 */ - +/* #define ATC_COMMON_START 0 */ + {OP_WR, 0x1100b8, 0x1}, +/* #define ATC_COMMON_END 1 */ +/* #define BRB1_COMMON_START 22 */ + {OP_WR, 0x600dc, 0x1}, + {OP_SW, 0x61000, 0x1ff0000}, + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_WR, 0x617fc, 0x3fe001}, + {OP_IF_MODE_AND, 1, 0x10}, /* e3 */ + {OP_SW, 0x617fc, 0x20101ff}, + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_SW, 0x60200, 0x30400}, + {OP_IF_MODE_AND, 1, 0x10}, /* e3 */ + {OP_SW, 0x60200, 0x30403}, + {OP_WR, 0x600dc, 0x0}, +/* #define BRB1_COMMON_END 23 */ +/* #define BRB1_PORT0_START 24 */ + {OP_ZR, 0x601c8, 0x2}, + {OP_ZR, 0x601d8, 0x2}, + {OP_IF_MODE_AND, 2, 0x8}, /* e2 */ + {OP_SW, 0x601c0, 0x20406}, + {OP_SW, 0x601d0, 0x20408}, + {OP_IF_MODE_AND, 2, 0x10}, /* e3 */ + {OP_SW, 0x601c0, 0x2040a}, + {OP_SW, 0x601d0, 0x2040c}, +/* #define BRB1_PORT0_END 25 */ +/* #define BRB1_PORT1_START 26 */ + {OP_ZR, 0x60228, 0x2}, + {OP_ZR, 0x60238, 0x2}, + {OP_IF_MODE_AND, 2, 0x8}, /* e2 */ + {OP_SW, 0x60220, 0x2040e}, + {OP_SW, 0x60230, 0x20410}, + {OP_IF_MODE_AND, 2, 0x10}, /* e3 */ + {OP_SW, 0x60220, 0x20412}, + {OP_SW, 0x60230, 0x20414}, +/* #define BRB1_PORT1_END 27 */ +/* #define CCM_COMMON_START 44 */ + {OP_WR, 0xd0044, 0x32}, + {OP_SW, 0xd004c, 0x40416}, + {OP_ZR, 0xd005c, 0x4}, + {OP_SW, 0xd008c, 0x4041a}, + {OP_SW, 0xd00a0, 0x5041e}, + {OP_WR, 0xd00b8, 0x2}, + {OP_SW, 0xd00c0, 0x40423}, + {OP_WR, 0xd015c, 0x1}, + {OP_SW, 0xd0164, 0x20427}, + {OP_WR, 0xd0204, 0x1}, + {OP_SW, 0xd020c, 0x30429}, + {OP_SW, 0xd0220, 0x2042c}, + {OP_ZR, 0xd0280, 0x12}, + {OP_SW, 0xd0300, 0x18042e}, + {OP_ZR, 0xd4000, 0xa00}, + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_ZR, 0xd0360, 0xc}, + {OP_SW, 0xd0004, 0xf0446}, +/* #define CCM_COMMON_END 45 */ +/* #define CCM_PF0_START 50 */ + {OP_WR, 0xd0114, 0xd}, +/* #define CCM_PF0_END 51 */ +/* #define CCM_PF1_START 52 */ + {OP_WR, 0xd0118, 0x2d}, +/* #define CCM_PF1_END 53 */ +/* #define CCM_PF2_START 54 */ + {OP_WR, 0xd0114, 0x1d}, +/* #define CCM_PF2_END 55 */ +/* #define CCM_PF3_START 56 */ + {OP_WR, 0xd0118, 0x3d}, +/* #define CCM_PF3_END 57 */ +/* #define CCM_PF4_START 58 */ + {OP_WR, 0xd0114, 0x4d}, +/* #define CCM_PF4_END 59 */ +/* #define CCM_PF5_START 60 */ + {OP_WR, 0xd0118, 0x6d}, +/* #define CCM_PF5_END 61 */ +/* #define CCM_PF6_START 62 */ + {OP_WR, 0xd0114, 0x5d}, +/* #define CCM_PF6_END 63 */ +/* #define CCM_PF7_START 64 */ + {OP_WR, 0xd0118, 0x7d}, +/* #define CCM_PF7_END 65 */ +/* #define CDU_COMMON_START 66 */ + {OP_SW, 0x101000, 0x30455}, + {OP_WR, 0x101050, 0x1}, + {OP_WB, 0x101100, 0x100458}, + {OP_WB_ZR, 0x101140, 0x8}, + {OP_WB, 0x101160, 0x100468}, + {OP_WB_ZR, 0x1011a0, 0x18}, + {OP_WB, 0x101800, 0x2000478}, +/* #define CDU_COMMON_END 67 */ +/* #define CFC_COMMON_START 88 */ + {OP_ZR, 0x104c00, 0x100}, + {OP_WR, 0x107004, 0x1}, + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_SW, 0x1040d4, 0x20678}, + {OP_WR, 0x104028, 0x10}, + {OP_WR, 0x104044, 0x3fff}, + {OP_WR, 0x104058, 0x280000}, + {OP_WR, 0x104084, 0x84924a}, + {OP_WR, 0x104058, 0x0}, +/* #define CFC_COMMON_END 89 */ +/* #define CFC_PF0_START 94 */ + {OP_WR, 0x104138, 0x1}, +/* #define CFC_PF0_END 95 */ +/* #define CFC_PF1_START 96 */ + {OP_WR, 0x104138, 0x1}, +/* #define CFC_PF1_END 97 */ +/* #define CFC_PF2_START 98 */ + {OP_WR, 0x104138, 0x1}, +/* #define CFC_PF2_END 99 */ +/* #define CFC_PF3_START 100 */ + {OP_WR, 0x104138, 0x1}, +/* #define CFC_PF3_END 101 */ +/* #define CFC_PF4_START 102 */ + {OP_WR, 0x104138, 0x1}, +/* #define CFC_PF4_END 103 */ +/* #define CFC_PF5_START 104 */ + {OP_WR, 0x104138, 0x1}, +/* #define CFC_PF5_END 105 */ +/* #define CFC_PF6_START 106 */ + {OP_WR, 0x104138, 0x1}, +/* #define CFC_PF6_END 107 */ +/* #define CFC_PF7_START 108 */ + {OP_WR, 0x104138, 0x1}, +/* #define CFC_PF7_END 109 */ +/* #define CSDM_COMMON_START 110 */ + {OP_SW, 0xc2008, 0x3067a}, + {OP_SW, 0xc201c, 0x4067d}, + {OP_SW, 0xc2038, 0x40681}, + {OP_ZR, 0xc2048, 0x1d}, + {OP_WR, 0xc20bc, 0x1}, + {OP_ZR, 0xc20c0, 0x3f}, + {OP_SW, 0xc21bc, 0x30685}, + {OP_ZR, 0xc21c8, 0x1c}, + {OP_SW, 0xc2238, 0x40688}, + {OP_RD, 0xc2248, 0x0}, + {OP_RD, 0xc224c, 0x0}, + {OP_RD, 0xc2250, 0x0}, + {OP_RD, 0xc2254, 0x0}, + {OP_RD, 0xc2258, 0x0}, + {OP_RD, 0xc225c, 0x0}, + {OP_RD, 0xc2260, 0x0}, + {OP_RD, 0xc2264, 0x0}, + {OP_RD, 0xc2268, 0x0}, + {OP_RD, 0xc226c, 0x0}, + {OP_RD, 0xc2270, 0x0}, + {OP_RD, 0xc2274, 0x0}, + {OP_RD, 0xc2278, 0x0}, + {OP_RD, 0xc227c, 0x0}, + {OP_SW, 0xc22d8, 0x4068c}, + {OP_IF_MODE_AND, 1, 0x9}, /* asic+e2 */ + {OP_WR, 0xc2000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */ + {OP_WR, 0xc2000, 0x3}, + {OP_IF_MODE_AND, 1, 0xc}, /* emul+e2 */ + {OP_WR, 0xc2000, 0x1}, + {OP_IF_MODE_AND, 1, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0xc2000, 0x5dc}, + {OP_IF_MODE_AND, 1, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0xc2000, 0x4}, + {OP_IF_MODE_AND, 1, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0xc2000, 0x1}, + {OP_IF_MODE_AND, 1, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0xc2000, 0x5dc}, + {OP_IF_MODE_AND, 1, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0xc2000, 0x4}, + {OP_IF_MODE_AND, 1, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0xc2000, 0x1}, +/* #define CSDM_COMMON_END 111 */ +/* #define CSEM_COMMON_START 132 */ + {OP_ZP, 0x200400, 0x710000}, + {OP_WR_64, 0x200780, 0x100690}, + {OP_ZR, 0x220000, 0x4000}, + {OP_ZR, 0x232400, 0x1600}, + {OP_SW, 0x221170, 0x80692}, + {OP_SW, 0x2211a8, 0x90069a}, + {OP_ZR, 0x22c000, 0x6}, + {OP_SW, 0x22c018, 0x4072a}, + {OP_ZR, 0x22c028, 0xc}, + {OP_SW, 0x22c058, 0x4072e}, + {OP_ZR, 0x22c068, 0xc}, + {OP_SW, 0x22c098, 0x40732}, + {OP_ZR, 0x22c0a8, 0xc}, + {OP_SW, 0x22c0d8, 0x40736}, + {OP_ZR, 0x22c0e8, 0xc}, + {OP_SW, 0x22c118, 0x4073a}, + {OP_ZR, 0x22c128, 0xc}, + {OP_SW, 0x22c158, 0x4073e}, + {OP_ZR, 0x22c168, 0xc}, + {OP_SW, 0x22c198, 0x40742}, + {OP_ZR, 0x22c1a8, 0xc}, + {OP_SW, 0x22c1d8, 0x40746}, + {OP_ZR, 0x22c1e8, 0xc}, + {OP_SW, 0x22c218, 0x4074a}, + {OP_ZR, 0x22c228, 0xc}, + {OP_SW, 0x22c258, 0x4074e}, + {OP_ZR, 0x22c268, 0xc}, + {OP_SW, 0x22c298, 0x40752}, + {OP_ZR, 0x22c2a8, 0xc}, + {OP_SW, 0x22c2d8, 0x40756}, + {OP_ZR, 0x22c2e8, 0xc}, + {OP_SW, 0x22c318, 0x4075a}, + {OP_ZR, 0x22c328, 0xc}, + {OP_SW, 0x22c358, 0x4075e}, + {OP_ZR, 0x22c368, 0xc}, + {OP_SW, 0x22c398, 0x40762}, + {OP_ZR, 0x22c3a8, 0xc}, + {OP_SW, 0x22c3d8, 0x40766}, + {OP_ZR, 0x22c3e8, 0xc}, + {OP_SW, 0x22c418, 0x4076a}, + {OP_ZR, 0x22c428, 0xc}, + {OP_SW, 0x22c458, 0x4076e}, + {OP_ZR, 0x22c468, 0xc}, + {OP_SW, 0x22c498, 0x40772}, + {OP_ZR, 0x22c4a8, 0xc}, + {OP_SW, 0x22c4d8, 0x40776}, + {OP_ZR, 0x22c4e8, 0xc}, + {OP_SW, 0x22c518, 0x4077a}, + {OP_ZR, 0x22c528, 0xc}, + {OP_SW, 0x22c558, 0x4077e}, + {OP_ZR, 0x22c568, 0xc}, + {OP_SW, 0x22c598, 0x40782}, + {OP_ZR, 0x22c5a8, 0xc}, + {OP_SW, 0x22c5d8, 0x40786}, + {OP_ZR, 0x22c5e8, 0xc}, + {OP_SW, 0x22c618, 0x4078a}, + {OP_ZR, 0x22c628, 0xc}, + {OP_SW, 0x22c658, 0x4078e}, + {OP_ZR, 0x22c668, 0xc}, + {OP_SW, 0x22c698, 0x40792}, + {OP_ZR, 0x22c6a8, 0xc}, + {OP_SW, 0x22c6d8, 0x40796}, + {OP_ZR, 0x22c6e8, 0xc}, + {OP_SW, 0x22c718, 0x4079a}, + {OP_ZR, 0x22c728, 0xc}, + {OP_SW, 0x22c758, 0x4079e}, + {OP_ZR, 0x22c768, 0xc}, + {OP_SW, 0x22c798, 0x407a2}, + {OP_ZR, 0x22c7a8, 0xc}, + {OP_SW, 0x22c7d8, 0x407a6}, + {OP_ZR, 0x22c7e8, 0xc}, + {OP_SW, 0x22c818, 0x407aa}, + {OP_ZR, 0x22c828, 0xc}, + {OP_SW, 0x22c858, 0x407ae}, + {OP_ZR, 0x22c868, 0xc}, + {OP_SW, 0x22c898, 0x407b2}, + {OP_ZR, 0x22c8a8, 0xc}, + {OP_SW, 0x22c8d8, 0x407b6}, + {OP_ZR, 0x22c8e8, 0xc}, + {OP_SW, 0x22c918, 0x407ba}, + {OP_ZR, 0x22c928, 0xc}, + {OP_SW, 0x22c958, 0x407be}, + {OP_ZR, 0x22c968, 0xc}, + {OP_SW, 0x22c998, 0x407c2}, + {OP_ZR, 0x22c9a8, 0xc}, + {OP_SW, 0x22c9d8, 0x407c6}, + {OP_ZR, 0x22c9e8, 0xc}, + {OP_SW, 0x22ca18, 0x407ca}, + {OP_ZR, 0x22ca28, 0xc}, + {OP_SW, 0x22ca58, 0x407ce}, + {OP_ZR, 0x22ca68, 0xc}, + {OP_SW, 0x22ca98, 0x407d2}, + {OP_ZR, 0x22caa8, 0xc}, + {OP_SW, 0x22cad8, 0x407d6}, + {OP_ZR, 0x22cae8, 0xc}, + {OP_SW, 0x22cb18, 0x407da}, + {OP_ZR, 0x22cb28, 0xc}, + {OP_SW, 0x22cb58, 0x407de}, + {OP_ZR, 0x22cb68, 0xc}, + {OP_SW, 0x22cb98, 0x407e2}, + {OP_ZR, 0x22cba8, 0xc}, + {OP_SW, 0x22cbd8, 0x407e6}, + {OP_ZR, 0x22cbe8, 0xc}, + {OP_SW, 0x22cc18, 0x407ea}, + {OP_ZR, 0x22cc28, 0xc}, + {OP_SW, 0x22cc58, 0x407ee}, + {OP_ZR, 0x22cc68, 0xc}, + {OP_SW, 0x22cc98, 0x407f2}, + {OP_ZR, 0x22cca8, 0xc}, + {OP_SW, 0x22ccd8, 0x407f6}, + {OP_ZR, 0x22cce8, 0xc}, + {OP_SW, 0x22cd18, 0x407fa}, + {OP_ZR, 0x22cd28, 0xc}, + {OP_SW, 0x22cd58, 0x407fe}, + {OP_ZR, 0x22cd68, 0xc}, + {OP_SW, 0x22cd98, 0x40802}, + {OP_ZR, 0x22cda8, 0xc}, + {OP_SW, 0x22cdd8, 0x40806}, + {OP_ZR, 0x22cde8, 0xc}, + {OP_SW, 0x22ce18, 0x4080a}, + {OP_ZR, 0x22ce28, 0xc}, + {OP_SW, 0x22ce58, 0x4080e}, + {OP_ZR, 0x22ce68, 0xc}, + {OP_SW, 0x22ce98, 0x40812}, + {OP_ZR, 0x22cea8, 0xc}, + {OP_SW, 0x22ced8, 0x40816}, + {OP_ZR, 0x22cee8, 0xc}, + {OP_SW, 0x22cf18, 0x4081a}, + {OP_ZR, 0x22cf28, 0xc}, + {OP_SW, 0x22cf58, 0x4081e}, + {OP_ZR, 0x22cf68, 0xc}, + {OP_SW, 0x22cf98, 0x40822}, + {OP_ZR, 0x22cfa8, 0xc}, + {OP_SW, 0x22cfd8, 0x40826}, + {OP_ZR, 0x22cfe8, 0xc}, + {OP_SW, 0x22d018, 0x4082a}, + {OP_ZR, 0x22d028, 0xc}, + {OP_SW, 0x22d058, 0x4082e}, + {OP_ZR, 0x22d068, 0xc}, + {OP_SW, 0x22d098, 0x40832}, + {OP_ZR, 0x22d0a8, 0xc}, + {OP_SW, 0x22d0d8, 0x40836}, + {OP_ZR, 0x22d0e8, 0xc}, + {OP_SW, 0x22d118, 0x4083a}, + {OP_ZR, 0x22d128, 0xc}, + {OP_SW, 0x22d158, 0x4083e}, + {OP_ZR, 0x22d168, 0xc}, + {OP_SW, 0x22d198, 0x40842}, + {OP_ZR, 0x22d1a8, 0xc}, + {OP_SW, 0x22d1d8, 0x40846}, + {OP_ZR, 0x22d1e8, 0xc}, + {OP_SW, 0x22d218, 0x4084a}, + {OP_ZR, 0x22d228, 0xc}, + {OP_SW, 0x22d258, 0x4084e}, + {OP_ZR, 0x22d268, 0xc}, + {OP_SW, 0x22d298, 0x40852}, + {OP_ZR, 0x22d2a8, 0xc}, + {OP_SW, 0x22d2d8, 0x40856}, + {OP_ZR, 0x22d2e8, 0xc}, + {OP_SW, 0x22d318, 0x4085a}, + {OP_ZR, 0x22d328, 0xc}, + {OP_SW, 0x22d358, 0x4085e}, + {OP_ZR, 0x22d368, 0xc}, + {OP_SW, 0x22d398, 0x40862}, + {OP_ZR, 0x22d3a8, 0xc}, + {OP_SW, 0x22d3d8, 0x40866}, + {OP_ZR, 0x22d3e8, 0xc}, + {OP_SW, 0x22d418, 0x4086a}, + {OP_ZR, 0x22d428, 0xc}, + {OP_SW, 0x22d458, 0x4086e}, + {OP_ZR, 0x22d468, 0xc}, + {OP_SW, 0x22d498, 0x40872}, + {OP_ZR, 0x22d4a8, 0xc}, + {OP_SW, 0x22d4d8, 0x40876}, + {OP_ZR, 0x22d4e8, 0xc}, + {OP_SW, 0x22d518, 0x4087a}, + {OP_ZR, 0x22d528, 0xc}, + {OP_SW, 0x22d558, 0x4087e}, + {OP_ZR, 0x22d568, 0xc}, + {OP_SW, 0x22d598, 0x40882}, + {OP_ZR, 0x22d5a8, 0xc}, + {OP_SW, 0x22d5d8, 0x40886}, + {OP_ZR, 0x22d5e8, 0xc}, + {OP_SW, 0x22d618, 0x4088a}, + {OP_ZR, 0x22d628, 0xc}, + {OP_SW, 0x22d658, 0x4088e}, + {OP_ZR, 0x22d668, 0xc}, + {OP_SW, 0x22d698, 0x40892}, + {OP_ZR, 0x22d6a8, 0xc}, + {OP_SW, 0x22d6d8, 0x40896}, + {OP_ZR, 0x22d6e8, 0xc}, + {OP_SW, 0x22d718, 0x4089a}, + {OP_ZR, 0x22d728, 0xc}, + {OP_SW, 0x22d758, 0x4089e}, + {OP_ZR, 0x22d768, 0xc}, + {OP_SW, 0x22d798, 0x408a2}, + {OP_ZR, 0x22d7a8, 0xc}, + {OP_SW, 0x22d7d8, 0x408a6}, + {OP_ZR, 0x22d7e8, 0xc}, + {OP_SW, 0x22d818, 0x408aa}, + {OP_ZR, 0x22d828, 0xc}, + {OP_SW, 0x22d858, 0x408ae}, + {OP_ZR, 0x22d868, 0xc}, + {OP_SW, 0x22d898, 0x408b2}, + {OP_ZR, 0x22d8a8, 0xc}, + {OP_SW, 0x22d8d8, 0x408b6}, + {OP_ZR, 0x22d8e8, 0xc}, + {OP_SW, 0x22d918, 0x408ba}, + {OP_ZR, 0x22d928, 0xc}, + {OP_SW, 0x22d958, 0x408be}, + {OP_ZR, 0x22d968, 0xc}, + {OP_SW, 0x22d998, 0x408c2}, + {OP_ZR, 0x22d9a8, 0xc}, + {OP_SW, 0x22d9d8, 0x408c6}, + {OP_ZR, 0x22d9e8, 0xc}, + {OP_SW, 0x22da18, 0x408ca}, + {OP_ZR, 0x22da28, 0xc}, + {OP_SW, 0x22da58, 0x408ce}, + {OP_ZR, 0x22da68, 0xc}, + {OP_SW, 0x22da98, 0x408d2}, + {OP_ZR, 0x22daa8, 0xc}, + {OP_SW, 0x22dad8, 0x408d6}, + {OP_ZR, 0x22dae8, 0xc}, + {OP_SW, 0x22db18, 0x408da}, + {OP_ZR, 0x22db28, 0xc}, + {OP_SW, 0x22db58, 0x408de}, + {OP_ZR, 0x22db68, 0xc}, + {OP_SW, 0x22db98, 0x408e2}, + {OP_ZR, 0x22dba8, 0xc}, + {OP_SW, 0x22dbd8, 0x408e6}, + {OP_ZR, 0x22dbe8, 0xc}, + {OP_SW, 0x22dc18, 0x408ea}, + {OP_ZR, 0x22dc28, 0xc}, + {OP_SW, 0x22dc58, 0x408ee}, + {OP_ZR, 0x22dc68, 0xc}, + {OP_SW, 0x22dc98, 0x408f2}, + {OP_ZR, 0x22dca8, 0xc}, + {OP_SW, 0x22dcd8, 0x408f6}, + {OP_ZR, 0x22dce8, 0xc}, + {OP_SW, 0x22dd18, 0x408fa}, + {OP_ZR, 0x22dd28, 0xc}, + {OP_SW, 0x22dd58, 0x408fe}, + {OP_ZR, 0x22dd68, 0xc}, + {OP_SW, 0x22dd98, 0x40902}, + {OP_ZR, 0x22dda8, 0xc}, + {OP_SW, 0x22ddd8, 0x40906}, + {OP_ZR, 0x22dde8, 0xc}, + {OP_SW, 0x22de18, 0x4090a}, + {OP_ZR, 0x22de28, 0xc}, + {OP_SW, 0x22de58, 0x4090e}, + {OP_ZR, 0x22de68, 0xc}, + {OP_SW, 0x22de98, 0x40912}, + {OP_ZR, 0x22dea8, 0xc}, + {OP_SW, 0x22ded8, 0x40916}, + {OP_ZR, 0x22dee8, 0xc}, + {OP_SW, 0x22df18, 0x4091a}, + {OP_ZR, 0x22df28, 0xc}, + {OP_SW, 0x22df58, 0x4091e}, + {OP_ZR, 0x22df68, 0xc}, + {OP_SW, 0x22df98, 0x40922}, + {OP_ZR, 0x22dfa8, 0xc}, + {OP_SW, 0x22dfd8, 0x40926}, + {OP_ZR, 0x22dfe8, 0xc}, + {OP_SW, 0x22e018, 0x4092a}, + {OP_ZR, 0x22e028, 0xc}, + {OP_SW, 0x22e058, 0x4092e}, + {OP_ZR, 0x22e068, 0xc}, + {OP_SW, 0x22e098, 0x40932}, + {OP_ZR, 0x22e0a8, 0xc}, + {OP_SW, 0x22e0d8, 0x40936}, + {OP_ZR, 0x22e0e8, 0xc}, + {OP_SW, 0x22e118, 0x4093a}, + {OP_ZR, 0x22e128, 0xc}, + {OP_SW, 0x22e158, 0x4093e}, + {OP_ZR, 0x22e168, 0xc}, + {OP_SW, 0x22e198, 0x40942}, + {OP_ZR, 0x22e1a8, 0xc}, + {OP_SW, 0x22e1d8, 0x40946}, + {OP_ZR, 0x22e1e8, 0x6}, + {OP_ZR, 0x22f640, 0x20}, + {OP_WR, 0x238000, 0x10}, + {OP_WR, 0x238040, 0x12}, + {OP_WR, 0x238080, 0x30}, + {OP_WR, 0x2380c0, 0xe}, + {OP_WR, 0x238bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x8}, /* e2 */ + {OP_WR, 0x238380, 0x86470}, + {OP_WR, 0x2383c0, 0x226}, + {OP_IF_MODE_AND, 2, 0x9}, /* asic+e2 */ + {OP_WR, 0x238300, 0x86470}, + {OP_WR, 0x238340, 0x226}, + {OP_IF_MODE_AND, 2, 0xa}, /* fpga+e2 */ + {OP_WR, 0x238300, 0x55f}, + {OP_WR, 0x238340, 0x1}, + {OP_IF_MODE_AND, 2, 0xc}, /* emul+e2 */ + {OP_WR, 0x238300, 0x157}, + {OP_WR, 0x238340, 0x0}, + {OP_IF_MODE_AND, 2, 0x1000}, /* e3_a0 */ + {OP_WR, 0x238380, 0xc96a8}, + {OP_WR, 0x2383c0, 0x339}, + {OP_IF_MODE_AND, 2, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0x238300, 0xc96a8}, + {OP_WR, 0x238340, 0x339}, + {OP_IF_MODE_AND, 2, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0x238300, 0x80e}, + {OP_WR, 0x238340, 0x2}, + {OP_IF_MODE_AND, 2, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0x238300, 0x203}, + {OP_WR, 0x238340, 0x0}, + {OP_IF_MODE_AND, 2, 0x2000}, /* e3_b0 */ + {OP_WR, 0x238380, 0xcf850}, + {OP_WR, 0x2383c0, 0x352}, + {OP_IF_MODE_AND, 2, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0x238300, 0xcf850}, + {OP_WR, 0x238340, 0x352}, + {OP_IF_MODE_AND, 2, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0x238300, 0x84d}, + {OP_WR, 0x238340, 0x2}, + {OP_IF_MODE_AND, 2, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0x238300, 0x213}, + {OP_WR, 0x238340, 0x0}, + {OP_ZP, 0x240000, 0x31b30000}, + {OP_ZP, 0x248000, 0x282a0c6d}, + {OP_WR_64, 0x24d460, 0x63da094a}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x231480, 0x0}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x231480, 0x0}, + {OP_IF_MODE_AND, 1, 0x11}, /* e3+asic */ + {OP_WR, 0x231480, 0x0}, + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_WR, 0x2000bc, 0x32}, + {OP_IF_MODE_AND, 4, 0x10}, /* e3 */ + {OP_WR, 0x2000bc, 0x2}, + {OP_WR, 0x238840, 0x1}, + {OP_RD, 0x200138, 0x0}, + {OP_WR, 0x238840, 0x0}, + {OP_IF_MODE_AND, 1, 0x11}, /* e3+asic */ + {OP_WR, 0x231480, 0x1}, + {OP_RD, 0x200000, 0x0}, + {OP_RD, 0x200004, 0x0}, + {OP_RD, 0x200008, 0x0}, + {OP_RD, 0x20000c, 0x0}, + {OP_RD, 0x200010, 0x0}, + {OP_RD, 0x200014, 0x0}, + {OP_SW, 0x200020, 0x1a094c}, + {OP_SW, 0x2000a4, 0x20966}, + {OP_WR, 0x200224, 0x0}, + {OP_WR, 0x200234, 0x0}, + {OP_WR, 0x20024c, 0x0}, + {OP_WR, 0x2002e4, 0xffff}, + {OP_WB_ZR, 0x202000, 0x800}, + {OP_IF_MODE_AND, 1, 0x10}, /* e3 */ + {OP_WB_ZR, 0x204000, 0x200}, +/* #define CSEM_COMMON_END 133 */ +/* #define CSEM_PF0_START 138 */ + {OP_ZR, 0x221108, 0x2}, + {OP_ZR, 0x223400, 0x2}, + {OP_ZR, 0x225900, 0x6}, + {OP_ZR, 0x226040, 0x30}, + {OP_ZR, 0x22f300, 0x10}, +/* #define CSEM_PF0_END 139 */ +/* #define CSEM_PF1_START 140 */ + {OP_ZR, 0x221110, 0x2}, + {OP_ZR, 0x223408, 0x2}, + {OP_ZR, 0x225918, 0x6}, + {OP_ZR, 0x226100, 0x30}, + {OP_ZR, 0x22f340, 0x10}, +/* #define CSEM_PF1_END 141 */ +/* #define CSEM_PF2_START 142 */ + {OP_ZR, 0x221118, 0x2}, + {OP_ZR, 0x223410, 0x2}, + {OP_ZR, 0x225930, 0x6}, + {OP_ZR, 0x2261c0, 0x30}, + {OP_ZR, 0x22f380, 0x10}, +/* #define CSEM_PF2_END 143 */ +/* #define CSEM_PF3_START 144 */ + {OP_ZR, 0x221120, 0x2}, + {OP_ZR, 0x223418, 0x2}, + {OP_ZR, 0x225948, 0x6}, + {OP_ZR, 0x226280, 0x30}, + {OP_ZR, 0x22f3c0, 0x10}, +/* #define CSEM_PF3_END 145 */ +/* #define CSEM_PF4_START 146 */ + {OP_ZR, 0x221128, 0x2}, + {OP_ZR, 0x223420, 0x2}, + {OP_ZR, 0x225960, 0x6}, + {OP_ZR, 0x226340, 0x30}, + {OP_ZR, 0x22f400, 0x10}, +/* #define CSEM_PF4_END 147 */ +/* #define CSEM_PF5_START 148 */ + {OP_ZR, 0x221130, 0x2}, + {OP_ZR, 0x223428, 0x2}, + {OP_ZR, 0x225978, 0x6}, + {OP_ZR, 0x226400, 0x30}, + {OP_ZR, 0x22f440, 0x10}, +/* #define CSEM_PF5_END 149 */ +/* #define CSEM_PF6_START 150 */ + {OP_ZR, 0x221138, 0x2}, + {OP_ZR, 0x223430, 0x2}, + {OP_ZR, 0x225990, 0x6}, + {OP_ZR, 0x2264c0, 0x30}, + {OP_ZR, 0x22f480, 0x10}, +/* #define CSEM_PF6_END 151 */ +/* #define CSEM_PF7_START 152 */ + {OP_ZR, 0x221140, 0x2}, + {OP_ZR, 0x223438, 0x2}, + {OP_ZR, 0x2259a8, 0x6}, + {OP_ZR, 0x226580, 0x30}, + {OP_ZR, 0x22f4c0, 0x10}, +/* #define CSEM_PF7_END 153 */ +/* #define DMAE_COMMON_START 176 */ + {OP_ZR, 0x102400, 0xe0}, + {OP_SW, 0x10201c, 0x20968}, + {OP_WR, 0x1020c0, 0x2}, + {OP_SW, 0x102004, 0x2096a}, +/* #define DMAE_COMMON_END 177 */ +/* #define DORQ_COMMON_START 198 */ + {OP_WR, 0x170008, 0x2}, + {OP_WR, 0x17002c, 0x3}, + {OP_WR, 0x170038, 0x7c1004}, + {OP_SW, 0x170044, 0x6096c}, + {OP_WR, 0x170070, 0xc}, + {OP_SW, 0x170078, 0x20972}, + {OP_WR, 0x1701c4, 0x8100000}, + {OP_WR, 0x170344, 0x1}, + {OP_SW, 0x170400, 0x80974}, + {OP_SW, 0x170430, 0x8097c}, + {OP_SW, 0x170480, 0x40984}, + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_WR, 0x17003c, 0x4}, + {OP_IF_MODE_AND, 1, 0x10}, /* e3 */ + {OP_WR, 0x17003c, 0x8}, + {OP_WR, 0x170004, 0xf}, +/* #define DORQ_COMMON_END 199 */ +/* #define DORQ_PF0_START 204 */ + {OP_WR, 0x1701ec, 0x2}, + {OP_WR, 0x1701f4, 0x2}, +/* #define DORQ_PF0_END 205 */ +/* #define DORQ_PF1_START 206 */ + {OP_WR, 0x1701ec, 0x2}, + {OP_WR, 0x1701f4, 0x2}, +/* #define DORQ_PF1_END 207 */ +/* #define DORQ_PF2_START 208 */ + {OP_WR, 0x1701ec, 0x2}, + {OP_WR, 0x1701f4, 0x2}, +/* #define DORQ_PF2_END 209 */ +/* #define DORQ_PF3_START 210 */ + {OP_WR, 0x1701ec, 0x2}, + {OP_WR, 0x1701f4, 0x2}, +/* #define DORQ_PF3_END 211 */ +/* #define DORQ_PF4_START 212 */ + {OP_WR, 0x1701ec, 0x2}, + {OP_WR, 0x1701f4, 0x2}, +/* #define DORQ_PF4_END 213 */ +/* #define DORQ_PF5_START 214 */ + {OP_WR, 0x1701ec, 0x2}, + {OP_WR, 0x1701f4, 0x2}, +/* #define DORQ_PF5_END 215 */ +/* #define DORQ_PF6_START 216 */ + {OP_WR, 0x1701ec, 0x2}, + {OP_WR, 0x1701f4, 0x2}, +/* #define DORQ_PF6_END 217 */ +/* #define DORQ_PF7_START 218 */ + {OP_WR, 0x1701ec, 0x2}, + {OP_WR, 0x1701f4, 0x2}, +/* #define DORQ_PF7_END 219 */ +/* #define IGU_COMMON_START 242 */ + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_WR, 0x130078, 0x32}, + {OP_WR, 0x13003c, 0x61a8}, +/* #define IGU_COMMON_END 243 */ +/* #define IGU_PF0_START 248 */ + {OP_ZR, 0x130108, 0x3}, + {OP_WR, 0x130104, 0x0}, + {OP_WR, 0x130134, 0x0}, +/* #define IGU_PF0_END 249 */ +/* #define IGU_PF1_START 250 */ + {OP_ZR, 0x130108, 0x3}, + {OP_WR, 0x130104, 0x0}, + {OP_WR, 0x130134, 0x0}, +/* #define IGU_PF1_END 251 */ +/* #define IGU_PF2_START 252 */ + {OP_ZR, 0x130108, 0x3}, + {OP_WR, 0x130104, 0x0}, + {OP_WR, 0x130134, 0x0}, +/* #define IGU_PF2_END 253 */ +/* #define IGU_PF3_START 254 */ + {OP_ZR, 0x130108, 0x3}, + {OP_WR, 0x130104, 0x0}, + {OP_WR, 0x130134, 0x0}, +/* #define IGU_PF3_END 255 */ +/* #define IGU_PF4_START 256 */ + {OP_ZR, 0x130108, 0x3}, + {OP_WR, 0x130104, 0x0}, + {OP_WR, 0x130134, 0x0}, +/* #define IGU_PF4_END 257 */ +/* #define IGU_PF5_START 258 */ + {OP_ZR, 0x130108, 0x3}, + {OP_WR, 0x130104, 0x0}, + {OP_WR, 0x130134, 0x0}, +/* #define IGU_PF5_END 259 */ +/* #define IGU_PF6_START 260 */ + {OP_ZR, 0x130108, 0x3}, + {OP_WR, 0x130104, 0x0}, + {OP_WR, 0x130134, 0x0}, +/* #define IGU_PF6_END 261 */ +/* #define IGU_PF7_START 262 */ + {OP_ZR, 0x130108, 0x3}, + {OP_WR, 0x130104, 0x0}, + {OP_WR, 0x130134, 0x0}, +/* #define IGU_PF7_END 263 */ +/* #define MISC_COMMON_START 264 */ + {OP_IF_MODE_AND, 1, 0x88}, /* e2+sf */ + {OP_WR, 0xa5f8, 0x0}, + {OP_IF_MODE_AND, 1, 0x108}, /* e2+mf */ + {OP_WR, 0xa5f8, 0x1}, +/* #define MISC_COMMON_END 265 */ +/* #define MISC_PORT0_START 266 */ + {OP_IF_MODE_AND, 1, 0x90}, /* e3+sf */ + {OP_WR, 0xaa84, 0x0}, + {OP_IF_MODE_AND, 1, 0x110}, /* e3+mf */ + {OP_WR, 0xaa84, 0x1}, +/* #define MISC_PORT0_END 267 */ +/* #define MISC_PORT1_START 268 */ + {OP_IF_MODE_AND, 1, 0x90}, /* e3+sf */ + {OP_WR, 0xaa88, 0x0}, + {OP_IF_MODE_AND, 1, 0x110}, /* e3+mf */ + {OP_WR, 0xaa88, 0x1}, +/* #define MISC_PORT1_END 269 */ +/* #define MISC_PF0_START 270 */ + {OP_WR, 0xa270, 0x0}, +/* #define MISC_PF0_END 271 */ +/* #define MISC_PF1_START 272 */ + {OP_WR, 0xa274, 0x0}, +/* #define MISC_PF1_END 273 */ +/* #define MISC_PF2_START 274 */ + {OP_WR, 0xa270, 0x0}, +/* #define MISC_PF2_END 275 */ +/* #define MISC_PF3_START 276 */ + {OP_WR, 0xa274, 0x0}, +/* #define MISC_PF3_END 277 */ +/* #define MISC_PF4_START 278 */ + {OP_WR, 0xa270, 0x0}, +/* #define MISC_PF4_END 279 */ +/* #define MISC_PF5_START 280 */ + {OP_WR, 0xa274, 0x0}, +/* #define MISC_PF5_END 281 */ +/* #define MISC_PF6_START 282 */ + {OP_WR, 0xa270, 0x0}, +/* #define MISC_PF6_END 283 */ +/* #define MISC_PF7_START 284 */ + {OP_WR, 0xa274, 0x0}, +/* #define MISC_PF7_END 285 */ +/* #define NIG_COMMON_START 286 */ + {OP_WR, 0x16204, 0x0}, + {OP_SW, 0x100b4, 0x20988}, + {OP_SW, 0x100cc, 0x2098a}, + {OP_WR, 0x100dc, 0x1}, + {OP_SW, 0x10100, 0x2098c}, +/* #define NIG_COMMON_END 287 */ +/* #define NIG_PORT0_START 288 */ + {OP_WR, 0x1007c, 0x300000}, + {OP_WR, 0x10084, 0x28}, + {OP_WR, 0x1008c, 0x0}, + {OP_WR, 0x10130, 0x4}, + {OP_WR, 0x10244, 0x3f}, + {OP_WR, 0x1025c, 0x1}, + {OP_WR, 0x10328, 0x0}, + {OP_WR, 0x10554, 0x30}, + {OP_WR, 0x16058, 0xffff}, + {OP_WR, 0x16060, 0x0}, + {OP_WR, 0x16070, 0x7}, + {OP_WR, 0x160b0, 0x0}, + {OP_WR, 0x160c0, 0x1}, + {OP_WR, 0x160c8, 0x0}, + {OP_WR, 0x16208, 0x0}, + {OP_ZR, 0x18054, 0x3}, + {OP_WR, 0x18078, 0x0}, + {OP_WR, 0x18124, 0x0}, + {OP_IF_MODE_AND, 1, 0x80}, /* sf */ + {OP_WR, 0x18038, 0x6}, + {OP_IF_MODE_AND, 1, 0x200}, /* mf_sd */ + {OP_WR, 0x18038, 0x7}, + {OP_IF_MODE_AND, 1, 0x400}, /* mf_si */ + {OP_WR, 0x18038, 0x6}, + {OP_IF_MODE_AND, 1, 0x800}, /* mf_afex */ + {OP_WR, 0x18038, 0xe}, + {OP_WR, 0x100c4, 0x1}, + {OP_WR, 0x100f8, 0x1}, + {OP_WR, 0x100f0, 0x1}, +/* #define NIG_PORT0_END 289 */ +/* #define NIG_PORT1_START 290 */ + {OP_WR, 0x10080, 0x300000}, + {OP_WR, 0x10088, 0x28}, + {OP_WR, 0x10090, 0x0}, + {OP_WR, 0x10134, 0x4}, + {OP_WR, 0x10248, 0x3f}, + {OP_WR, 0x102dc, 0x1}, + {OP_WR, 0x1032c, 0x0}, + {OP_WR, 0x10564, 0x30}, + {OP_WR, 0x1605c, 0xffff}, + {OP_WR, 0x16064, 0x0}, + {OP_WR, 0x16074, 0x7}, + {OP_WR, 0x160b4, 0x0}, + {OP_WR, 0x160c4, 0x1}, + {OP_WR, 0x160cc, 0x0}, + {OP_WR, 0x1620c, 0x0}, + {OP_ZR, 0x181a8, 0x4}, + {OP_WR, 0x181d0, 0x0}, + {OP_IF_MODE_AND, 1, 0x80}, /* sf */ + {OP_WR, 0x1818c, 0x6}, + {OP_IF_MODE_AND, 1, 0x200}, /* mf_sd */ + {OP_WR, 0x1818c, 0x7}, + {OP_IF_MODE_AND, 1, 0x400}, /* mf_si */ + {OP_WR, 0x1818c, 0x6}, + {OP_IF_MODE_AND, 1, 0x800}, /* mf_afex */ + {OP_WR, 0x1818c, 0xe}, + {OP_WR, 0x100c8, 0x1}, + {OP_WR, 0x100fc, 0x1}, + {OP_WR, 0x100f4, 0x1}, +/* #define NIG_PORT1_END 291 */ +/* #define NIG_PF0_START 292 */ + {OP_ZR, 0x10138, 0x11}, +/* #define NIG_PF0_END 293 */ +/* #define NIG_PF1_START 294 */ + {OP_ZR, 0x1017c, 0x11}, +/* #define NIG_PF1_END 295 */ +/* #define NIG_PF2_START 296 */ + {OP_ZR, 0x10138, 0x11}, +/* #define NIG_PF2_END 297 */ +/* #define NIG_PF3_START 298 */ + {OP_ZR, 0x1017c, 0x11}, +/* #define NIG_PF3_END 299 */ +/* #define NIG_PF4_START 300 */ + {OP_ZR, 0x10138, 0x11}, +/* #define NIG_PF4_END 301 */ +/* #define NIG_PF5_START 302 */ + {OP_ZR, 0x1017c, 0x11}, +/* #define NIG_PF5_END 303 */ +/* #define NIG_PF6_START 304 */ + {OP_ZR, 0x10138, 0x11}, +/* #define NIG_PF6_END 305 */ +/* #define NIG_PF7_START 306 */ + {OP_ZR, 0x1017c, 0x11}, +/* #define NIG_PF7_END 307 */ +/* #define PBF_COMMON_START 308 */ + {OP_WR, 0x15c090, 0x8926}, + {OP_WR, 0x15c09c, 0x4}, + {OP_WR, 0x140000, 0x1}, + {OP_WR, 0x15c024, 0x0}, + {OP_SW, 0x15c0ec, 0x2098e}, + {OP_SW, 0x15c100, 0x20990}, + {OP_IF_MODE_AND, 1, 0x2000}, /* e3_b0 */ + {OP_SW, 0x15c1f4, 0x80992}, + {OP_SW, 0x140030, 0x2099a}, + {OP_WR, 0x140040, 0x1}, + {OP_IF_MODE_OR, 2, 0x1008}, /* e2|e3_a0 */ + {OP_SW, 0x140004, 0x3099c}, + {OP_WR, 0x140044, 0xffff}, + {OP_IF_MODE_AND, 4, 0x2000}, /* e3_b0 */ + {OP_SW, 0x140038, 0x2099f}, + {OP_WR, 0x140044, 0xfffff}, + {OP_SW, 0x15c160, 0x709a1}, + {OP_SW, 0x15c198, 0x209a8}, + {OP_IF_MODE_OR, 1, 0x1008}, /* e2|e3_a0 */ + {OP_ZR, 0x140004, 0x3}, + {OP_IF_MODE_AND, 1, 0x2000}, /* e3_b0 */ + {OP_ZR, 0x15c160, 0x7}, + {OP_WR, 0x140000, 0x0}, +/* #define PBF_COMMON_END 309 */ +/* #define PGLUE_B_COMMON_START 330 */ + {OP_WR, 0x90c4, 0xe000}, + {OP_WR, 0x90cc, 0xf300}, + {OP_SW, 0x90d4, 0x209aa}, + {OP_WR, 0x90e0, 0x7300}, + {OP_SW, 0x90e8, 0x209ac}, + {OP_WR, 0x90f4, 0x7300}, + {OP_SW, 0x90fc, 0x209ae}, + {OP_WR, 0x9108, 0x5300}, + {OP_WR, 0x9110, 0x4}, + {OP_SW, 0x9128, 0x709b0}, + {OP_SW, 0x916c, 0x609b7}, + {OP_ZR, 0x9184, 0x6}, + {OP_SW, 0x919c, 0x509bd}, +/* #define PGLUE_B_COMMON_END 331 */ +/* #define PGLUE_B_PF0_START 336 */ + {OP_SW, 0x942c, 0x309c2}, +/* #define PGLUE_B_PF0_END 337 */ +/* #define PGLUE_B_PF1_START 338 */ + {OP_SW, 0x942c, 0x309c5}, +/* #define PGLUE_B_PF1_END 339 */ +/* #define PGLUE_B_PF2_START 340 */ + {OP_SW, 0x942c, 0x309c8}, +/* #define PGLUE_B_PF2_END 341 */ +/* #define PGLUE_B_PF3_START 342 */ + {OP_SW, 0x942c, 0x309cb}, +/* #define PGLUE_B_PF3_END 343 */ +/* #define PGLUE_B_PF4_START 344 */ + {OP_SW, 0x942c, 0x309ce}, +/* #define PGLUE_B_PF4_END 345 */ +/* #define PGLUE_B_PF5_START 346 */ + {OP_SW, 0x942c, 0x309d1}, +/* #define PGLUE_B_PF5_END 347 */ +/* #define PGLUE_B_PF6_START 348 */ + {OP_SW, 0x942c, 0x309d4}, +/* #define PGLUE_B_PF6_END 349 */ +/* #define PGLUE_B_PF7_START 350 */ + {OP_SW, 0x942c, 0x309d7}, +/* #define PGLUE_B_PF7_END 351 */ +/* #define PRS_COMMON_START 352 */ + {OP_SW, 0x40004, 0x1209da}, + {OP_WR, 0x40054, 0x43}, + {OP_WR, 0x4005c, 0x6}, + {OP_WR, 0x40070, 0x4}, + {OP_SW, 0x40078, 0x409ec}, + {OP_ZR, 0x40088, 0x5}, + {OP_SW, 0x4009c, 0x309f0}, + {OP_ZR, 0x400a8, 0x4}, + {OP_SW, 0x400b8, 0x1109f3}, + {OP_RD, 0x40124, 0x0}, + {OP_RD, 0x40128, 0x0}, + {OP_RD, 0x4012c, 0x0}, + {OP_RD, 0x40130, 0x0}, + {OP_WR, 0x40134, 0xf}, + {OP_SW, 0x401d0, 0x20a04}, + {OP_WR, 0x4022c, 0x4}, + {OP_SW, 0x40258, 0x40a06}, +/* #define PRS_COMMON_END 353 */ +/* #define PXP2_COMMON_START 374 */ + {OP_SW, 0x120494, 0x210a0a}, + {OP_WR, 0x120388, 0x64}, + {OP_WR, 0x120390, 0x8}, + {OP_SW, 0x12039c, 0x30a2b}, + {OP_SW, 0x1203bc, 0x30a2e}, + {OP_WR, 0x1203d0, 0x0}, + {OP_WR, 0x12036c, 0x1}, + {OP_SW, 0x1201bc, 0x3c0a31}, + {OP_SW, 0x1202b0, 0x20a6d}, + {OP_SW, 0x120324, 0x20a6f}, + {OP_WR, 0x1205b4, 0x1}, + {OP_SW, 0x1205f8, 0x30a71}, + {OP_WR, 0x12066c, 0x1}, + {OP_WR, 0x1201b0, 0x1}, +/* #define PXP2_COMMON_END 375 */ +/* #define PXP2_PF0_START 380 */ + {OP_WR, 0x1207d8, 0x0}, +/* #define PXP2_PF0_END 381 */ +/* #define PXP2_PF1_START 382 */ + {OP_WR, 0x1207d8, 0x0}, +/* #define PXP2_PF1_END 383 */ +/* #define PXP2_PF2_START 384 */ + {OP_WR, 0x1207d8, 0x0}, +/* #define PXP2_PF2_END 385 */ +/* #define PXP2_PF3_START 386 */ + {OP_WR, 0x1207d8, 0x0}, +/* #define PXP2_PF3_END 387 */ +/* #define PXP2_PF4_START 388 */ + {OP_WR, 0x1207d8, 0x0}, +/* #define PXP2_PF4_END 389 */ +/* #define PXP2_PF5_START 390 */ + {OP_WR, 0x1207d8, 0x0}, +/* #define PXP2_PF5_END 391 */ +/* #define PXP2_PF6_START 392 */ + {OP_WR, 0x1207d8, 0x0}, +/* #define PXP2_PF6_END 393 */ +/* #define PXP2_PF7_START 394 */ + {OP_WR, 0x1207d8, 0x0}, +/* #define PXP2_PF7_END 395 */ +/* #define PXP_COMMON_START 396 */ + {OP_WR, 0x1030d8, 0x1}, + {OP_WB, 0x103800, 0x50a74}, + {OP_WB, 0x103920, 0x50a79}, + {OP_WB, 0x103b00, 0x50a7e}, + {OP_WB, 0x103c00, 0x50a83}, +/* #define PXP_COMMON_END 397 */ +/* #define QM_COMMON_START 418 */ + {OP_SW, 0x168030, 0x80a88}, + {OP_WR, 0x168054, 0x2}, + {OP_ZR, 0x16807c, 0x5}, + {OP_SW, 0x168090, 0x20a90}, + {OP_SW, 0x16809c, 0x20a92}, + {OP_WR, 0x1680ac, 0x54}, + {OP_ZR, 0x1680b8, 0x5}, + {OP_SW, 0x1680cc, 0x80a94}, + {OP_WR, 0x1680f0, 0x7}, + {OP_SW, 0x168100, 0x60a9c}, + {OP_SW, 0x168128, 0x30aa2}, + {OP_SW, 0x168140, 0x60aa5}, + {OP_SW, 0x168168, 0x30aab}, + {OP_SW, 0x1681a8, 0x30aae}, + {OP_SW, 0x1681e8, 0x30ab1}, + {OP_SW, 0x1681f8, 0x30ab4}, + {OP_SW, 0x168208, 0x70ab7}, + {OP_SW, 0x168234, 0x20abe}, + {OP_ZR, 0x168278, 0x4}, + {OP_SW, 0x168288, 0x60ac0}, + {OP_WR, 0x168810, 0x20200101}, + {OP_WR, 0x168820, 0x20200101}, + {OP_WR, 0x168838, 0x20200101}, + {OP_WR, 0x168848, 0x20200101}, + {OP_SW, 0x16e6bc, 0x20ac6}, + {OP_IF_MODE_AND, 20, 0x8}, /* e2 */ + {OP_SW, 0x168060, 0x70ac8}, + {OP_ZR, 0x1680a4, 0x2}, + {OP_ZR, 0x1680b0, 0x2}, + {OP_SW, 0x1680f4, 0x30acf}, + {OP_SW, 0x168118, 0x40ad2}, + {OP_SW, 0x168134, 0x30ad6}, + {OP_SW, 0x168158, 0x40ad9}, + {OP_SW, 0x168174, 0xd0add}, + {OP_SW, 0x1681b4, 0xd0aea}, + {OP_WR, 0x1681f4, 0x1fc}, + {OP_WR, 0x168204, 0x3}, + {OP_SW, 0x16823c, 0xb0af7}, + {OP_ZR, 0x168268, 0x4}, + {OP_WR, 0x16880c, 0x1010101}, + {OP_SW, 0x168814, 0x30b02}, + {OP_SW, 0x168824, 0x50b05}, + {OP_SW, 0x16883c, 0x30b0a}, + {OP_SW, 0x16e6c4, 0x20b0d}, + {OP_SW, 0x16e6e8, 0x50b0f}, + {OP_WR, 0x16e794, 0x1}, + {OP_IF_MODE_AND, 28, 0x1000}, /* e3_a0 */ + {OP_SW, 0x168060, 0x70b14}, + {OP_ZR, 0x1680a4, 0x2}, + {OP_ZR, 0x1680b0, 0x2}, + {OP_SW, 0x1680f4, 0x30b1b}, + {OP_SW, 0x168118, 0x40b1e}, + {OP_SW, 0x168134, 0x30b22}, + {OP_SW, 0x168158, 0x40b25}, + {OP_WR, 0x168178, 0x1}, + {OP_WR, 0x168184, 0x1}, + {OP_WR, 0x168190, 0x1}, + {OP_WR, 0x1681a4, 0x4}, + {OP_WR, 0x1681b8, 0x1}, + {OP_WR, 0x1681c4, 0x1}, + {OP_WR, 0x1681d0, 0x1}, + {OP_WR, 0x1681e4, 0x4}, + {OP_WR, 0x1681f4, 0x1fc}, + {OP_WR, 0x168204, 0x3}, + {OP_SW, 0x16823c, 0x20b29}, + {OP_WR, 0x168248, 0x920092}, + {OP_WR, 0x168250, 0x1240124}, + {OP_SW, 0x168258, 0x40b2b}, + {OP_ZR, 0x168268, 0x4}, + {OP_WR, 0x16880c, 0x1010101}, + {OP_SW, 0x168814, 0x30b2f}, + {OP_SW, 0x168824, 0x50b32}, + {OP_SW, 0x16883c, 0x30b37}, + {OP_SW, 0x16e6e8, 0x20b3a}, + {OP_WR, 0x16e6f8, 0x204}, + {OP_IF_MODE_AND, 14, 0x1020}, /* e3_a0+port2 */ + {OP_WR, 0x168174, 0x0}, + {OP_SW, 0x16817c, 0x20b3c}, + {OP_SW, 0x168188, 0x20b3e}, + {OP_SW, 0x168194, 0x40b40}, + {OP_WR, 0x1681b4, 0x0}, + {OP_SW, 0x1681bc, 0x20b44}, + {OP_SW, 0x1681c8, 0x20b46}, + {OP_SW, 0x1681d4, 0x40b48}, + {OP_WR, 0x168244, 0xe490e49}, + {OP_WR, 0x16824c, 0x920092}, + {OP_WR, 0x168254, 0x1240124}, + {OP_SW, 0x16e6c4, 0x20b4c}, + {OP_SW, 0x16e6f0, 0x20b4e}, + {OP_WR, 0x16e794, 0x1}, + {OP_IF_MODE_AND, 14, 0x1040}, /* e3_a0+port4 */ + {OP_WR, 0x168174, 0x1}, + {OP_SW, 0x16817c, 0x20b50}, + {OP_SW, 0x168188, 0x20b52}, + {OP_SW, 0x168194, 0x40b54}, + {OP_WR, 0x1681b4, 0x1}, + {OP_SW, 0x1681bc, 0x20b58}, + {OP_SW, 0x1681c8, 0x20b5a}, + {OP_SW, 0x1681d4, 0x40b5c}, + {OP_WR, 0x168244, 0x0}, + {OP_WR, 0x16824c, 0xfff0fff}, + {OP_WR, 0x168254, 0x0}, + {OP_SW, 0x16e6c4, 0x20b60}, + {OP_SW, 0x16e6f0, 0x20b62}, + {OP_WR, 0x16e794, 0x0}, + {OP_IF_MODE_AND, 7, 0x2000}, /* e3_b0 */ + {OP_SW, 0x168060, 0x70b64}, + {OP_SW, 0x1680a4, 0x20b6b}, + {OP_SW, 0x1680b0, 0x20b6d}, + {OP_WR, 0x1681f4, 0x1c0}, + {OP_WR, 0x168204, 0x3f}, + {OP_WR, 0x16823c, 0x7f}, + {OP_SW, 0x16e7bc, 0x80b6f}, + {OP_IF_MODE_AND, 15, 0x4020}, /* cos3+port2 */ + {OP_SW, 0x1680f4, 0x30b77}, + {OP_SW, 0x168118, 0x40b7a}, + {OP_SW, 0x168134, 0x30b7e}, + {OP_SW, 0x168158, 0x40b81}, + {OP_SW, 0x168174, 0xd0b85}, + {OP_SW, 0x1681b4, 0xd0b92}, + {OP_SW, 0x168240, 0x60b9f}, + {OP_ZR, 0x168258, 0x6}, + {OP_SW, 0x168270, 0x20ba5}, + {OP_WR, 0x16880c, 0x1010101}, + {OP_SW, 0x168814, 0x30ba7}, + {OP_SW, 0x168824, 0x50baa}, + {OP_SW, 0x16883c, 0x30baf}, + {OP_SW, 0x16e6c4, 0x20bb2}, + {OP_WR, 0x16e794, 0x1}, + {OP_IF_MODE_AND, 13, 0x4040}, /* cos3+port4 */ + {OP_SW, 0x1680f4, 0x30bb4}, + {OP_SW, 0x168118, 0x40bb7}, + {OP_SW, 0x168134, 0x30bbb}, + {OP_SW, 0x168158, 0x40bbe}, + {OP_SW, 0x168174, 0xd0bc2}, + {OP_SW, 0x1681b4, 0xd0bcf}, + {OP_SW, 0x168240, 0xe0bdc}, + {OP_WR, 0x16880c, 0x1010101}, + {OP_SW, 0x168814, 0x30bea}, + {OP_SW, 0x168824, 0x50bed}, + {OP_SW, 0x16883c, 0x30bf2}, + {OP_SW, 0x16e6c4, 0x20bf5}, + {OP_WR, 0x16e794, 0x0}, + {OP_IF_MODE_AND, 13, 0x8000}, /* cos6 */ + {OP_SW, 0x1680f4, 0x30bf7}, + {OP_SW, 0x168118, 0x40bfa}, + {OP_SW, 0x168134, 0x30bfe}, + {OP_SW, 0x168158, 0x40c01}, + {OP_SW, 0x168174, 0xd0c05}, + {OP_SW, 0x1681b4, 0xd0c12}, + {OP_SW, 0x168240, 0xe0c1f}, + {OP_WR, 0x16880c, 0x1010120}, + {OP_SW, 0x168814, 0x30c2d}, + {OP_SW, 0x168824, 0x50c30}, + {OP_SW, 0x16883c, 0x30c35}, + {OP_SW, 0x16e6c4, 0x20c38}, + {OP_WR, 0x16e794, 0x1}, + {OP_WR, 0x1680ec, 0xff}, +/* #define QM_COMMON_END 419 */ +/* #define SRC_COMMON_START 440 */ + {OP_SW, 0x40408, 0x140c3a}, + {OP_WR, 0x404cc, 0x1}, +/* #define SRC_COMMON_END 441 */ +/* #define TCM_COMMON_START 462 */ + {OP_SW, 0x50044, 0x20c4e}, + {OP_SW, 0x50050, 0x80c50}, + {OP_SW, 0x50090, 0x70c58}, + {OP_SW, 0x500b0, 0x20c5f}, + {OP_SW, 0x500c0, 0x20c61}, + {OP_SW, 0x500d4, 0x20c63}, + {OP_WR, 0x50114, 0x1}, + {OP_SW, 0x5011c, 0x20c65}, + {OP_WR, 0x50204, 0x1}, + {OP_SW, 0x5020c, 0x20c67}, + {OP_WR, 0x5021c, 0x20}, + {OP_ZR, 0x50240, 0xa}, + {OP_ZR, 0x54000, 0xd00}, + {OP_IF_MODE_AND, 2, 0x8}, /* e2 */ + {OP_SW, 0x50220, 0x20c69}, + {OP_SW, 0x50280, 0x200c6b}, + {OP_IF_MODE_AND, 2, 0x10}, /* e3 */ + {OP_SW, 0x50220, 0x20c8b}, + {OP_SW, 0x50280, 0x1d0c8d}, + {OP_SW, 0x50004, 0x100caa}, +/* #define TCM_COMMON_END 463 */ +/* #define TCM_PF0_START 468 */ + {OP_WR, 0x500e0, 0xe}, +/* #define TCM_PF0_END 469 */ +/* #define TCM_PF1_START 470 */ + {OP_WR, 0x500e4, 0x2e}, +/* #define TCM_PF1_END 471 */ +/* #define TCM_PF2_START 472 */ + {OP_WR, 0x500e0, 0x1e}, +/* #define TCM_PF2_END 473 */ +/* #define TCM_PF3_START 474 */ + {OP_WR, 0x500e4, 0x3e}, +/* #define TCM_PF3_END 475 */ +/* #define TCM_PF4_START 476 */ + {OP_WR, 0x500e0, 0x4e}, +/* #define TCM_PF4_END 477 */ +/* #define TCM_PF5_START 478 */ + {OP_WR, 0x500e4, 0x6e}, +/* #define TCM_PF5_END 479 */ +/* #define TCM_PF6_START 480 */ + {OP_WR, 0x500e0, 0x5e}, +/* #define TCM_PF6_END 481 */ +/* #define TCM_PF7_START 482 */ + {OP_WR, 0x500e4, 0x7e}, +/* #define TCM_PF7_END 483 */ +/* #define TM_COMMON_START 484 */ + {OP_ZR, 0x164024, 0x2}, + {OP_SW, 0x164030, 0x30cba}, + {OP_WR, 0x164044, 0x20}, + {OP_WR, 0x164070, 0x1c}, + {OP_WR, 0x164208, 0x1}, + {OP_WR, 0x164210, 0x1}, + {OP_WR, 0x164220, 0x1}, + {OP_WR, 0x164228, 0x1}, + {OP_WR, 0x164230, 0x1}, + {OP_WR, 0x164238, 0x1}, + {OP_WR, 0x164260, 0x2}, + {OP_IF_MODE_AND, 1, 0x9}, /* asic+e2 */ + {OP_WR, 0x16401c, 0x3d090}, + {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */ + {OP_WR, 0x16401c, 0x271}, + {OP_IF_MODE_AND, 1, 0xc}, /* emul+e2 */ + {OP_WR, 0x16401c, 0x9c}, + {OP_IF_MODE_AND, 1, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0x16401c, 0x5b8d8}, + {OP_IF_MODE_AND, 1, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0x16401c, 0x3a9}, + {OP_IF_MODE_AND, 1, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0x16401c, 0xea}, + {OP_IF_MODE_AND, 1, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0x16401c, 0x5b8d8}, + {OP_IF_MODE_AND, 1, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0x16401c, 0x3a9}, + {OP_IF_MODE_AND, 1, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0x16401c, 0xea}, + {OP_WR, 0x164000, 0x1}, + {OP_WR, 0x1640d8, 0x1}, + {OP_SW, 0x164008, 0x30cbd}, +/* #define TM_COMMON_END 485 */ +/* #define TM_PORT0_START 486 */ + {OP_WR, 0x164240, 0x0}, + {OP_WR, 0x164248, 0x0}, + {OP_WB_ZR, 0x164270, 0x2}, +/* #define TM_PORT0_END 487 */ +/* #define TM_PORT1_START 488 */ + {OP_WR, 0x164250, 0x0}, + {OP_WR, 0x164258, 0x0}, + {OP_WB_ZR, 0x164280, 0x2}, +/* #define TM_PORT1_END 489 */ +/* #define TSDM_COMMON_START 506 */ + {OP_SW, 0x42008, 0x40cc0}, + {OP_SW, 0x4201c, 0x40cc4}, + {OP_WR, 0x42038, 0x20}, + {OP_ZR, 0x4203c, 0x1f}, + {OP_WR, 0x420b8, 0x1}, + {OP_ZR, 0x420bc, 0x5f}, + {OP_SW, 0x42238, 0x40cc8}, + {OP_RD, 0x42248, 0x0}, + {OP_RD, 0x4224c, 0x0}, + {OP_RD, 0x42250, 0x0}, + {OP_RD, 0x42254, 0x0}, + {OP_RD, 0x42258, 0x0}, + {OP_RD, 0x4225c, 0x0}, + {OP_RD, 0x42260, 0x0}, + {OP_RD, 0x42264, 0x0}, + {OP_RD, 0x42268, 0x0}, + {OP_RD, 0x4226c, 0x0}, + {OP_RD, 0x42270, 0x0}, + {OP_RD, 0x42274, 0x0}, + {OP_RD, 0x42278, 0x0}, + {OP_RD, 0x4227c, 0x0}, + {OP_SW, 0x422c0, 0x40ccc}, + {OP_IF_MODE_AND, 1, 0x9}, /* asic+e2 */ + {OP_WR, 0x42000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */ + {OP_WR, 0x42000, 0x3}, + {OP_IF_MODE_AND, 1, 0xc}, /* emul+e2 */ + {OP_WR, 0x42000, 0x1}, + {OP_IF_MODE_AND, 1, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0x42000, 0x5dc}, + {OP_IF_MODE_AND, 1, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0x42000, 0x4}, + {OP_IF_MODE_AND, 1, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0x42000, 0x1}, + {OP_IF_MODE_AND, 1, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0x42000, 0x5dc}, + {OP_IF_MODE_AND, 1, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0x42000, 0x4}, + {OP_IF_MODE_AND, 1, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0x42000, 0x1}, +/* #define TSDM_COMMON_END 507 */ +/* #define TSEM_COMMON_START 528 */ + {OP_ZP, 0x180400, 0x8b0000}, + {OP_WR_64, 0x1807b8, 0x90cd0}, + {OP_ZR, 0x1a0000, 0x4000}, + {OP_ZR, 0x1b2400, 0x1600}, + {OP_SW, 0x1a16c8, 0x20cd2}, + {OP_SW, 0x1a17d0, 0x900cd4}, + {OP_SW, 0x1a4040, 0x40d64}, + {OP_ZR, 0x1a4050, 0x6}, + {OP_SW, 0x1a4068, 0x20d68}, + {OP_SW, 0x1a52c0, 0x20d6a}, + {OP_SW, 0x1a8000, 0x3f90d6c}, + {OP_ZR, 0x1a8fe4, 0x7}, + {OP_SW, 0x1b3d90, 0x141165}, + {OP_WR, 0x1b8000, 0x34}, + {OP_WR, 0x1b8040, 0x18}, + {OP_WR, 0x1b8080, 0xc}, + {OP_WR, 0x1b80c0, 0x20}, + {OP_WR, 0x1b8bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x8}, /* e2 */ + {OP_WR, 0x1b8380, 0x86470}, + {OP_WR, 0x1b83c0, 0x226}, + {OP_IF_MODE_AND, 2, 0x9}, /* asic+e2 */ + {OP_WR, 0x1b8300, 0x86470}, + {OP_WR, 0x1b8340, 0x226}, + {OP_IF_MODE_AND, 2, 0xa}, /* fpga+e2 */ + {OP_WR, 0x1b8300, 0x55f}, + {OP_WR, 0x1b8340, 0x1}, + {OP_IF_MODE_AND, 2, 0xc}, /* emul+e2 */ + {OP_WR, 0x1b8300, 0x157}, + {OP_WR, 0x1b8340, 0x0}, + {OP_IF_MODE_AND, 2, 0x1000}, /* e3_a0 */ + {OP_WR, 0x1b8380, 0xc96a8}, + {OP_WR, 0x1b83c0, 0x339}, + {OP_IF_MODE_AND, 2, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0x1b8300, 0xc96a8}, + {OP_WR, 0x1b8340, 0x339}, + {OP_IF_MODE_AND, 2, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0x1b8300, 0x80e}, + {OP_WR, 0x1b8340, 0x2}, + {OP_IF_MODE_AND, 2, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0x1b8300, 0x203}, + {OP_WR, 0x1b8340, 0x0}, + {OP_IF_MODE_AND, 2, 0x2000}, /* e3_b0 */ + {OP_WR, 0x1b8380, 0xcf850}, + {OP_WR, 0x1b83c0, 0x352}, + {OP_IF_MODE_AND, 2, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0x1b8300, 0xcf850}, + {OP_WR, 0x1b8340, 0x352}, + {OP_IF_MODE_AND, 2, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0x1b8300, 0x84d}, + {OP_WR, 0x1b8340, 0x2}, + {OP_IF_MODE_AND, 2, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0x1b8300, 0x213}, + {OP_WR, 0x1b8340, 0x0}, + {OP_ZR, 0x1b9448, 0x2}, + {OP_ZP, 0x1c0000, 0x32200000}, + {OP_ZP, 0x1c8000, 0x333f0c88}, + {OP_ZP, 0x1d0000, 0x362f1958}, + {OP_ZP, 0x1d8000, 0x37d226e4}, + {OP_ZP, 0x1e0000, 0xe2d34d9}, + {OP_WR_64, 0x1e2260, 0x3bb41179}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x1b1480, 0x0}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x1b1480, 0x0}, + {OP_IF_MODE_AND, 1, 0x11}, /* e3+asic */ + {OP_WR, 0x1b1480, 0x0}, + {OP_IF_MODE_AND, 2, 0x8}, /* e2 */ + {OP_WR, 0x1800bc, 0x32}, + {OP_WR, 0x1b945c, 0x32}, + {OP_IF_MODE_AND, 7, 0x10}, /* e3 */ + {OP_WR, 0x1800bc, 0x2}, + {OP_WR, 0x1b945c, 0x2}, + {OP_WR, 0x1b8840, 0x1}, + {OP_WR, 0x1b942c, 0x2}, + {OP_RD, 0x180128, 0x0}, + {OP_WR, 0x1b8840, 0x0}, + {OP_WR, 0x1b942c, 0x0}, + {OP_WR, 0x1b9440, 0x1}, + {OP_IF_MODE_AND, 1, 0x11}, /* e3+asic */ + {OP_WR, 0x1b1480, 0x1}, + {OP_RD, 0x180000, 0x0}, + {OP_RD, 0x180004, 0x0}, + {OP_RD, 0x180008, 0x0}, + {OP_RD, 0x18000c, 0x0}, + {OP_RD, 0x180010, 0x0}, + {OP_RD, 0x180014, 0x0}, + {OP_SW, 0x180020, 0x1a117b}, + {OP_SW, 0x1800a4, 0x21195}, + {OP_WR, 0x180224, 0x0}, + {OP_WR, 0x180234, 0x0}, + {OP_WR, 0x18024c, 0x0}, + {OP_WR, 0x1802e4, 0xff}, + {OP_WB_ZR, 0x181000, 0x400}, + {OP_IF_MODE_AND, 1, 0x10}, /* e3 */ + {OP_WB_ZR, 0x182000, 0x600}, +/* #define TSEM_COMMON_END 529 */ +/* #define TSEM_PORT0_START 530 */ + {OP_SW, 0x1a1a20, 0x41197}, + {OP_ZR, 0x1a3000, 0x12}, + {OP_ZR, 0x1a3090, 0x12}, + {OP_ZR, 0x1ad4c8, 0x2}, + {OP_ZR, 0x1ad4d8, 0x20}, + {OP_ZR, 0x1ad5d8, 0x2}, + {OP_ZR, 0x1b4400, 0x6}, +/* #define TSEM_PORT0_END 531 */ +/* #define TSEM_PORT1_START 532 */ + {OP_SW, 0x1a1a30, 0x4119b}, + {OP_ZR, 0x1a3048, 0x12}, + {OP_ZR, 0x1a30d8, 0x12}, + {OP_ZR, 0x1ad4d0, 0x2}, + {OP_ZR, 0x1ad558, 0x20}, + {OP_ZR, 0x1ad5e0, 0x2}, + {OP_ZR, 0x1b4418, 0x6}, +/* #define TSEM_PORT1_END 533 */ +/* #define TSEM_PF0_START 534 */ + {OP_SW, 0x1a4000, 0x2119f}, + {OP_ZR, 0x1a5000, 0x2}, + {OP_ZR, 0x1a5080, 0x12}, + {OP_SW, 0x1a6140, 0x211a1}, + {OP_ZR, 0x1aa000, 0x2}, + {OP_ZR, 0x1b4430, 0x2}, +/* #define TSEM_PF0_END 535 */ +/* #define TSEM_PF1_START 536 */ + {OP_SW, 0x1a4008, 0x211a3}, + {OP_ZR, 0x1a5010, 0x2}, + {OP_ZR, 0x1a50c8, 0x12}, + {OP_SW, 0x1a6148, 0x211a5}, + {OP_ZR, 0x1aa008, 0x2}, + {OP_ZR, 0x1b4438, 0x2}, +/* #define TSEM_PF1_END 537 */ +/* #define TSEM_PF2_START 538 */ + {OP_SW, 0x1a4010, 0x211a7}, + {OP_ZR, 0x1a5020, 0x2}, + {OP_ZR, 0x1a5110, 0x12}, + {OP_SW, 0x1a6150, 0x211a9}, + {OP_ZR, 0x1aa010, 0x2}, + {OP_ZR, 0x1b4440, 0x2}, +/* #define TSEM_PF2_END 539 */ +/* #define TSEM_PF3_START 540 */ + {OP_SW, 0x1a4018, 0x211ab}, + {OP_ZR, 0x1a5030, 0x2}, + {OP_ZR, 0x1a5158, 0x12}, + {OP_SW, 0x1a6158, 0x211ad}, + {OP_ZR, 0x1aa018, 0x2}, + {OP_ZR, 0x1b4448, 0x2}, +/* #define TSEM_PF3_END 541 */ +/* #define TSEM_PF4_START 542 */ + {OP_SW, 0x1a4020, 0x211af}, + {OP_ZR, 0x1a5040, 0x2}, + {OP_ZR, 0x1a51a0, 0x12}, + {OP_SW, 0x1a6160, 0x211b1}, + {OP_ZR, 0x1aa020, 0x2}, + {OP_ZR, 0x1b4450, 0x2}, +/* #define TSEM_PF4_END 543 */ +/* #define TSEM_PF5_START 544 */ + {OP_SW, 0x1a4028, 0x211b3}, + {OP_ZR, 0x1a5050, 0x2}, + {OP_ZR, 0x1a51e8, 0x12}, + {OP_SW, 0x1a6168, 0x211b5}, + {OP_ZR, 0x1aa028, 0x2}, + {OP_ZR, 0x1b4458, 0x2}, +/* #define TSEM_PF5_END 545 */ +/* #define TSEM_PF6_START 546 */ + {OP_SW, 0x1a4030, 0x211b7}, + {OP_ZR, 0x1a5060, 0x2}, + {OP_ZR, 0x1a5230, 0x12}, + {OP_SW, 0x1a6170, 0x211b9}, + {OP_ZR, 0x1aa030, 0x2}, + {OP_ZR, 0x1b4460, 0x2}, +/* #define TSEM_PF6_END 547 */ +/* #define TSEM_PF7_START 548 */ + {OP_SW, 0x1a4038, 0x211bb}, + {OP_ZR, 0x1a5070, 0x2}, + {OP_ZR, 0x1a5278, 0x12}, + {OP_SW, 0x1a6178, 0x211bd}, + {OP_ZR, 0x1aa038, 0x2}, + {OP_ZR, 0x1b4468, 0x2}, +/* #define TSEM_PF7_END 549 */ +/* #define UCM_COMMON_START 550 */ + {OP_WR, 0xe004c, 0x32}, + {OP_SW, 0xe0054, 0x811bf}, + {OP_SW, 0xe0094, 0x711c7}, + {OP_SW, 0xe00b4, 0x211ce}, + {OP_WR, 0xe00c4, 0x0}, + {OP_WR, 0xe00cc, 0x6}, + {OP_SW, 0xe00d8, 0x211d0}, + {OP_WR, 0xe0144, 0x1}, + {OP_SW, 0xe014c, 0x211d2}, + {OP_WR, 0xe0204, 0x1}, + {OP_SW, 0xe020c, 0x211d4}, + {OP_SW, 0xe021c, 0x411d6}, + {OP_SW, 0xe0280, 0x1b11da}, + {OP_ZR, 0xe0300, 0x12}, + {OP_ZR, 0xe2000, 0x800}, + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_ZR, 0xe02ec, 0x5}, + {OP_SW, 0xe0004, 0x1111f5}, +/* #define UCM_COMMON_END 551 */ +/* #define UCM_PF0_START 556 */ + {OP_WR, 0xe0110, 0xf}, +/* #define UCM_PF0_END 557 */ +/* #define UCM_PF1_START 558 */ + {OP_WR, 0xe0114, 0x2f}, +/* #define UCM_PF1_END 559 */ +/* #define UCM_PF2_START 560 */ + {OP_WR, 0xe0110, 0x1f}, +/* #define UCM_PF2_END 561 */ +/* #define UCM_PF3_START 562 */ + {OP_WR, 0xe0114, 0x3f}, +/* #define UCM_PF3_END 563 */ +/* #define UCM_PF4_START 564 */ + {OP_WR, 0xe0110, 0x4f}, +/* #define UCM_PF4_END 565 */ +/* #define UCM_PF5_START 566 */ + {OP_WR, 0xe0114, 0x6f}, +/* #define UCM_PF5_END 567 */ +/* #define UCM_PF6_START 568 */ + {OP_WR, 0xe0110, 0x5f}, +/* #define UCM_PF6_END 569 */ +/* #define UCM_PF7_START 570 */ + {OP_WR, 0xe0114, 0x7f}, +/* #define UCM_PF7_END 571 */ +/* #define UPB_COMMON_START 572 */ + {OP_WR, 0xc1000, 0x28}, +/* #define UPB_COMMON_END 573 */ +/* #define USDM_COMMON_START 594 */ + {OP_SW, 0xc4008, 0x41206}, + {OP_SW, 0xc401c, 0x4120a}, + {OP_SW, 0xc4038, 0x6120e}, + {OP_ZR, 0xc4050, 0x1f}, + {OP_WR, 0xc40cc, 0x1}, + {OP_ZR, 0xc40d0, 0x3a}, + {OP_SW, 0xc41b8, 0x61214}, + {OP_ZR, 0xc41d0, 0x1a}, + {OP_SW, 0xc4238, 0x4121a}, + {OP_RD, 0xc4248, 0x0}, + {OP_RD, 0xc424c, 0x0}, + {OP_RD, 0xc4250, 0x0}, + {OP_RD, 0xc4254, 0x0}, + {OP_RD, 0xc4258, 0x0}, + {OP_RD, 0xc425c, 0x0}, + {OP_RD, 0xc4260, 0x0}, + {OP_RD, 0xc4264, 0x0}, + {OP_RD, 0xc4268, 0x0}, + {OP_RD, 0xc426c, 0x0}, + {OP_RD, 0xc4270, 0x0}, + {OP_RD, 0xc4274, 0x0}, + {OP_RD, 0xc4278, 0x0}, + {OP_RD, 0xc427c, 0x0}, + {OP_RD, 0xc4280, 0x0}, + {OP_SW, 0xc42d8, 0x4121e}, + {OP_IF_MODE_AND, 1, 0x9}, /* asic+e2 */ + {OP_WR, 0xc4000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */ + {OP_WR, 0xc4000, 0x3}, + {OP_IF_MODE_AND, 1, 0xc}, /* emul+e2 */ + {OP_WR, 0xc4000, 0x1}, + {OP_IF_MODE_AND, 1, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0xc4000, 0x5dc}, + {OP_IF_MODE_AND, 1, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0xc4000, 0x4}, + {OP_IF_MODE_AND, 1, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0xc4000, 0x1}, + {OP_IF_MODE_AND, 1, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0xc4000, 0x5dc}, + {OP_IF_MODE_AND, 1, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0xc4000, 0x4}, + {OP_IF_MODE_AND, 1, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0xc4000, 0x1}, +/* #define USDM_COMMON_END 595 */ +/* #define USEM_COMMON_START 616 */ + {OP_ZP, 0x300400, 0xc00000}, + {OP_WR_64, 0x3007e8, 0x31222}, + {OP_ZR, 0x320000, 0x4000}, + {OP_ZR, 0x332400, 0x1600}, + {OP_SW, 0x322c70, 0x901224}, + {OP_SW, 0x3234c0, 0x812b4}, + {OP_ZR, 0x324080, 0x10}, + {OP_SW, 0x3240c0, 0x212bc}, + {OP_SW, 0x337400, 0x412be}, + {OP_WR, 0x338000, 0x1a}, + {OP_WR, 0x338040, 0x4e}, + {OP_WR, 0x338080, 0x10}, + {OP_WR, 0x3380c0, 0x20}, + {OP_WR, 0x338bc0, 0x1}, + {OP_IF_MODE_AND, 2, 0x8}, /* e2 */ + {OP_WR, 0x338380, 0x86470}, + {OP_WR, 0x3383c0, 0x226}, + {OP_IF_MODE_AND, 2, 0x9}, /* asic+e2 */ + {OP_WR, 0x338300, 0x86470}, + {OP_WR, 0x338340, 0x226}, + {OP_IF_MODE_AND, 2, 0xa}, /* fpga+e2 */ + {OP_WR, 0x338300, 0x55f}, + {OP_WR, 0x338340, 0x1}, + {OP_IF_MODE_AND, 2, 0xc}, /* emul+e2 */ + {OP_WR, 0x338300, 0x157}, + {OP_WR, 0x338340, 0x0}, + {OP_IF_MODE_AND, 2, 0x1000}, /* e3_a0 */ + {OP_WR, 0x338380, 0xc96a8}, + {OP_WR, 0x3383c0, 0x339}, + {OP_IF_MODE_AND, 2, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0x338300, 0xc96a8}, + {OP_WR, 0x338340, 0x339}, + {OP_IF_MODE_AND, 2, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0x338300, 0x80e}, + {OP_WR, 0x338340, 0x2}, + {OP_IF_MODE_AND, 2, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0x338300, 0x203}, + {OP_WR, 0x338340, 0x0}, + {OP_IF_MODE_AND, 2, 0x2000}, /* e3_b0 */ + {OP_WR, 0x338380, 0xcf850}, + {OP_WR, 0x3383c0, 0x352}, + {OP_IF_MODE_AND, 2, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0x338300, 0xcf850}, + {OP_WR, 0x338340, 0x352}, + {OP_IF_MODE_AND, 2, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0x338300, 0x84d}, + {OP_WR, 0x338340, 0x2}, + {OP_IF_MODE_AND, 2, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0x338300, 0x213}, + {OP_WR, 0x338340, 0x0}, + {OP_ZP, 0x340000, 0x35140000}, + {OP_ZP, 0x348000, 0x352e0d45}, + {OP_ZP, 0x350000, 0x38931a91}, + {OP_ZP, 0x358000, 0x377d28b6}, + {OP_ZP, 0x360000, 0x34dc3696}, + {OP_ZP, 0x368000, 0x1e3e43cd}, + {OP_WR_64, 0x36c630, 0x273a12c2}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x331480, 0x0}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x331480, 0x0}, + {OP_IF_MODE_AND, 1, 0x11}, /* e3+asic */ + {OP_WR, 0x331480, 0x0}, + {OP_IF_MODE_AND, 1, 0x8}, /* e2 */ + {OP_WR, 0x3000bc, 0x32}, + {OP_IF_MODE_AND, 4, 0x10}, /* e3 */ + {OP_WR, 0x3000bc, 0x2}, + {OP_WR, 0x338840, 0x1}, + {OP_RD, 0x300138, 0x0}, + {OP_WR, 0x338840, 0x0}, + {OP_IF_MODE_AND, 1, 0x11}, /* e3+asic */ + {OP_WR, 0x331480, 0x1}, + {OP_RD, 0x300000, 0x0}, + {OP_RD, 0x300004, 0x0}, + {OP_RD, 0x300008, 0x0}, + {OP_RD, 0x30000c, 0x0}, + {OP_RD, 0x300010, 0x0}, + {OP_RD, 0x300014, 0x0}, + {OP_SW, 0x300020, 0x1a12c4}, + {OP_SW, 0x3000a4, 0x212de}, + {OP_WR, 0x300224, 0x0}, + {OP_WR, 0x300234, 0x0}, + {OP_WR, 0x30024c, 0x0}, + {OP_WR, 0x3002e4, 0xffff}, + {OP_WB_ZR, 0x302000, 0x800}, + {OP_IF_MODE_AND, 1, 0x10}, /* e3 */ + {OP_WB_ZR, 0x304000, 0x200}, +/* #define USEM_COMMON_END 617 */ +/* #define USEM_PORT0_START 618 */ + {OP_ZR, 0x322c40, 0x2}, + {OP_SW, 0x322c50, 0x412e0}, + {OP_ZR, 0x3293c0, 0x2}, + {OP_ZR, 0x329400, 0x10}, + {OP_ZR, 0x32c000, 0x20}, + {OP_ZR, 0x32c100, 0x20}, + {OP_ZR, 0x32c200, 0x20}, + {OP_ZR, 0x32c300, 0x20}, + {OP_ZR, 0x32c400, 0x20}, + {OP_ZR, 0x32c500, 0x20}, + {OP_ZR, 0x32c600, 0x20}, + {OP_ZR, 0x32c700, 0x20}, + {OP_ZR, 0x32c800, 0x20}, + {OP_ZR, 0x32c900, 0x20}, + {OP_ZR, 0x32ca00, 0x20}, + {OP_ZR, 0x32cb00, 0x20}, + {OP_ZR, 0x32cc00, 0x20}, + {OP_ZR, 0x32cd00, 0x20}, + {OP_ZR, 0x32ce00, 0x20}, + {OP_ZR, 0x32cf00, 0x20}, + {OP_ZR, 0x32db80, 0x2}, +/* #define USEM_PORT0_END 619 */ +/* #define USEM_PORT1_START 620 */ + {OP_ZR, 0x322c48, 0x2}, + {OP_SW, 0x322c60, 0x412e4}, + {OP_ZR, 0x3293c8, 0x2}, + {OP_ZR, 0x329440, 0x10}, + {OP_ZR, 0x32c080, 0x20}, + {OP_ZR, 0x32c180, 0x20}, + {OP_ZR, 0x32c280, 0x20}, + {OP_ZR, 0x32c380, 0x20}, + {OP_ZR, 0x32c480, 0x20}, + {OP_ZR, 0x32c580, 0x20}, + {OP_ZR, 0x32c680, 0x20}, + {OP_ZR, 0x32c780, 0x20}, + {OP_ZR, 0x32c880, 0x20}, + {OP_ZR, 0x32c980, 0x20}, + {OP_ZR, 0x32ca80, 0x20}, + {OP_ZR, 0x32cb80, 0x20}, + {OP_ZR, 0x32cc80, 0x20}, + {OP_ZR, 0x32cd80, 0x20}, + {OP_ZR, 0x32ce80, 0x20}, + {OP_ZR, 0x32cf80, 0x20}, + {OP_ZR, 0x32db88, 0x2}, +/* #define USEM_PORT1_END 621 */ +/* #define USEM_PF0_START 622 */ + {OP_ZR, 0x321010, 0x2}, + {OP_ZR, 0x322c00, 0x2}, +/* #define USEM_PF0_END 623 */ +/* #define USEM_PF1_START 624 */ + {OP_ZR, 0x321020, 0x2}, + {OP_ZR, 0x322c08, 0x2}, +/* #define USEM_PF1_END 625 */ +/* #define USEM_PF2_START 626 */ + {OP_ZR, 0x321030, 0x2}, + {OP_ZR, 0x322c10, 0x2}, +/* #define USEM_PF2_END 627 */ +/* #define USEM_PF3_START 628 */ + {OP_ZR, 0x321040, 0x2}, + {OP_ZR, 0x322c18, 0x2}, +/* #define USEM_PF3_END 629 */ +/* #define USEM_PF4_START 630 */ + {OP_ZR, 0x321050, 0x2}, + {OP_ZR, 0x322c20, 0x2}, +/* #define USEM_PF4_END 631 */ +/* #define USEM_PF5_START 632 */ + {OP_ZR, 0x321060, 0x2}, + {OP_ZR, 0x322c28, 0x2}, +/* #define USEM_PF5_END 633 */ +/* #define USEM_PF6_START 634 */ + {OP_ZR, 0x321070, 0x2}, + {OP_ZR, 0x322c30, 0x2}, +/* #define USEM_PF6_END 635 */ +/* #define USEM_PF7_START 636 */ + {OP_ZR, 0x321080, 0x2}, + {OP_ZR, 0x322c38, 0x2}, +/* #define USEM_PF7_END 637 */ +/* #define XCM_COMMON_START 638 */ + {OP_WR, 0x20058, 0x32}, + {OP_SW, 0x20060, 0x812e8}, + {OP_SW, 0x200a0, 0xb12f0}, + {OP_WR, 0x200d0, 0x7}, + {OP_SW, 0x200dc, 0x312fb}, + {OP_SW, 0x200f0, 0x212fe}, + {OP_WR, 0x200fc, 0xc}, + {OP_WR, 0x20120, 0x0}, + {OP_WR, 0x20134, 0x2}, + {OP_WR, 0x201b0, 0x1}, + {OP_WR, 0x2020c, 0x1}, + {OP_SW, 0x20214, 0x21300}, + {OP_WR, 0x20404, 0x1}, + {OP_SW, 0x2040c, 0x21302}, + {OP_SW, 0x2041c, 0x41304}, + {OP_SW, 0x20480, 0x201308}, + {OP_ZR, 0x20500, 0x12}, + {OP_ZR, 0x28000, 0x2000}, + {OP_SW, 0x20004, 0x141328}, +/* #define XCM_COMMON_END 639 */ +/* #define XCM_PF0_START 644 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PF0_END 645 */ +/* #define XCM_PF1_START 646 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PF1_END 647 */ +/* #define XCM_PF2_START 648 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PF2_END 649 */ +/* #define XCM_PF3_START 650 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PF3_END 651 */ +/* #define XCM_PF4_START 652 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PF4_END 653 */ +/* #define XCM_PF5_START 654 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PF5_END 655 */ +/* #define XCM_PF6_START 656 */ + {OP_WR, 0x20108, 0xc8}, + {OP_WR, 0x20118, 0x2}, + {OP_WR, 0x201c4, 0x0}, + {OP_WR, 0x201cc, 0x0}, + {OP_WR, 0x201d4, 0x2}, + {OP_WR, 0x201dc, 0x2}, + {OP_WR, 0x201e4, 0xff}, + {OP_WR, 0x201ec, 0xff}, +/* #define XCM_PF6_END 657 */ +/* #define XCM_PF7_START 658 */ + {OP_WR, 0x2010c, 0xc8}, + {OP_WR, 0x2011c, 0x2}, + {OP_WR, 0x201c8, 0x0}, + {OP_WR, 0x201d0, 0x0}, + {OP_WR, 0x201d8, 0x2}, + {OP_WR, 0x201e0, 0x2}, + {OP_WR, 0x201e8, 0xff}, + {OP_WR, 0x201f0, 0xff}, +/* #define XCM_PF7_END 659 */ +/* #define XPB_COMMON_START 660 */ + {OP_WR, 0x161000, 0x28}, +/* #define XPB_COMMON_END 661 */ +/* #define XSDM_COMMON_START 682 */ + {OP_SW, 0x166008, 0x3133c}, + {OP_SW, 0x16601c, 0x4133f}, + {OP_SW, 0x166038, 0x121343}, + {OP_ZR, 0x166080, 0xe}, + {OP_WR, 0x1660b8, 0x1}, + {OP_ZR, 0x1660bc, 0x8}, + {OP_WR, 0x1660dc, 0x1}, + {OP_ZR, 0x1660e0, 0x4}, + {OP_WR, 0x1660f0, 0x1}, + {OP_ZR, 0x1660f4, 0x31}, + {OP_SW, 0x1661b8, 0x21355}, + {OP_ZR, 0x1661c0, 0x7}, + {OP_SW, 0x1661dc, 0x61357}, + {OP_ZR, 0x1661f4, 0x11}, + {OP_SW, 0x166238, 0x4135d}, + {OP_RD, 0x166248, 0x0}, + {OP_RD, 0x16624c, 0x0}, + {OP_RD, 0x166250, 0x0}, + {OP_RD, 0x166254, 0x0}, + {OP_RD, 0x166258, 0x0}, + {OP_RD, 0x16625c, 0x0}, + {OP_RD, 0x166260, 0x0}, + {OP_RD, 0x166264, 0x0}, + {OP_RD, 0x166268, 0x0}, + {OP_RD, 0x16626c, 0x0}, + {OP_RD, 0x166270, 0x0}, + {OP_RD, 0x166274, 0x0}, + {OP_RD, 0x166278, 0x0}, + {OP_RD, 0x16627c, 0x0}, + {OP_RD, 0x1662d4, 0x0}, + {OP_SW, 0x1662d8, 0x41361}, + {OP_IF_MODE_AND, 1, 0x9}, /* asic+e2 */ + {OP_WR, 0x166000, 0x3e8}, + {OP_IF_MODE_AND, 1, 0xa}, /* fpga+e2 */ + {OP_WR, 0x166000, 0x3}, + {OP_IF_MODE_AND, 1, 0xc}, /* emul+e2 */ + {OP_WR, 0x166000, 0x1}, + {OP_IF_MODE_AND, 1, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0x166000, 0x5dc}, + {OP_IF_MODE_AND, 1, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0x166000, 0x4}, + {OP_IF_MODE_AND, 1, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0x166000, 0x1}, + {OP_IF_MODE_AND, 1, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0x166000, 0x5dc}, + {OP_IF_MODE_AND, 1, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0x166000, 0x4}, + {OP_IF_MODE_AND, 1, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0x166000, 0x1}, +/* #define XSDM_COMMON_END 683 */ +/* #define XSEM_COMMON_START 704 */ + {OP_ZP, 0x280400, 0xaa0000}, + {OP_WR_64, 0x2807c8, 0x71365}, + {OP_ZR, 0x2a0000, 0x4000}, + {OP_ZR, 0x2b2400, 0x1600}, + {OP_SW, 0x2a3000, 0x21367}, + {OP_SW, 0x2a4000, 0x101369}, + {OP_SW, 0x2a8408, 0x81379}, + {OP_SW, 0x2a9348, 0x41381}, + {OP_SW, 0x2a9668, 0x81385}, + {OP_SW, 0x2a98b8, 0x2138d}, + {OP_SW, 0x2a9950, 0x90138f}, + {OP_SW, 0x2b4d90, 0x14141f}, + {OP_WR, 0x2b8000, 0x0}, + {OP_WR, 0x2b8040, 0x18}, + {OP_WR, 0x2b8080, 0xc}, + {OP_WR, 0x2b80c0, 0x66}, + {OP_WR, 0x2b8bc0, 0x1}, + {OP_IF_MODE_AND, 3, 0x8}, /* e2 */ + {OP_WR, 0x2a9ca8, 0x2}, + {OP_WR, 0x2b8380, 0x86470}, + {OP_WR, 0x2b83c0, 0x226}, + {OP_IF_MODE_AND, 2, 0x9}, /* asic+e2 */ + {OP_WR, 0x2b8300, 0x86470}, + {OP_WR, 0x2b8340, 0x226}, + {OP_IF_MODE_AND, 2, 0xa}, /* fpga+e2 */ + {OP_WR, 0x2b8300, 0x55f}, + {OP_WR, 0x2b8340, 0x1}, + {OP_IF_MODE_AND, 2, 0xc}, /* emul+e2 */ + {OP_WR, 0x2b8300, 0x157}, + {OP_WR, 0x2b8340, 0x0}, + {OP_IF_MODE_AND, 3, 0x20}, /* port2 */ + {OP_WR, 0x2a9cac, 0x0}, + {OP_SW, 0x2ac4e0, 0x41433}, + {OP_SW, 0x2ac500, 0x21437}, + {OP_IF_MODE_AND, 2, 0x40}, /* port4 */ + {OP_WR, 0x2a9cac, 0x1}, + {OP_SW, 0x2ac4e0, 0xa1439}, + {OP_IF_MODE_AND, 3, 0x1000}, /* e3_a0 */ + {OP_WR, 0x2a9ca8, 0x3}, + {OP_WR, 0x2b8380, 0xc96a8}, + {OP_WR, 0x2b83c0, 0x339}, + {OP_IF_MODE_AND, 2, 0x1001}, /* asic+e3_a0 */ + {OP_WR, 0x2b8300, 0xc96a8}, + {OP_WR, 0x2b8340, 0x339}, + {OP_IF_MODE_AND, 2, 0x1002}, /* fpga+e3_a0 */ + {OP_WR, 0x2b8300, 0x80e}, + {OP_WR, 0x2b8340, 0x2}, + {OP_IF_MODE_AND, 2, 0x1004}, /* emul+e3_a0 */ + {OP_WR, 0x2b8300, 0x203}, + {OP_WR, 0x2b8340, 0x0}, + {OP_IF_MODE_AND, 3, 0x2000}, /* e3_b0 */ + {OP_WR, 0x2a9ca8, 0x4}, + {OP_WR, 0x2b8380, 0xcf850}, + {OP_WR, 0x2b83c0, 0x352}, + {OP_IF_MODE_AND, 2, 0x2001}, /* asic+e3_b0 */ + {OP_WR, 0x2b8300, 0xcf850}, + {OP_WR, 0x2b8340, 0x352}, + {OP_IF_MODE_AND, 2, 0x2002}, /* fpga+e3_b0 */ + {OP_WR, 0x2b8300, 0x84d}, + {OP_WR, 0x2b8340, 0x2}, + {OP_IF_MODE_AND, 2, 0x2004}, /* emul+e3_b0 */ + {OP_WR, 0x2b8300, 0x213}, + {OP_WR, 0x2b8340, 0x0}, + {OP_IF_MODE_AND, 1, 0x4000}, /* cos3 */ + {OP_WR, 0x2a9cb0, 0x0}, + {OP_IF_MODE_AND, 1, 0x8000}, /* cos6 */ + {OP_WR, 0x2a9cb0, 0x1}, + {OP_ZR, 0x2b9448, 0x2}, + {OP_ZP, 0x2c0000, 0x35440000}, + {OP_ZP, 0x2c8000, 0x382c0d51}, + {OP_ZP, 0x2d0000, 0x39c81b5c}, + {OP_ZP, 0x2d8000, 0x3cc529ce}, + {OP_ZP, 0x2e0000, 0x3aa83900}, + {OP_ZP, 0x2e8000, 0x31a647aa}, + {OP_ZP, 0x2f0000, 0x23c25414}, + {OP_WR_64, 0x2f4e80, 0x16301443}, + {OP_IF_MODE_AND, 1, 0x2}, /* fpga */ + {OP_WR, 0x2b1480, 0x0}, + {OP_IF_MODE_AND, 1, 0x4}, /* emul */ + {OP_WR, 0x2b1480, 0x0}, + {OP_IF_MODE_AND, 1, 0x11}, /* e3+asic */ + {OP_WR, 0x2b1480, 0x0}, + {OP_IF_MODE_AND, 2, 0x8}, /* e2 */ + {OP_WR, 0x2800bc, 0x32}, + {OP_WR, 0x2b945c, 0x32}, + {OP_IF_MODE_AND, 7, 0x10}, /* e3 */ + {OP_WR, 0x2800bc, 0x2}, + {OP_WR, 0x2b945c, 0x2}, + {OP_WR, 0x2b8840, 0x1}, + {OP_WR, 0x2b942c, 0x2}, + {OP_RD, 0x280138, 0x0}, + {OP_WR, 0x2b8840, 0x0}, + {OP_WR, 0x2b942c, 0x0}, + {OP_WR, 0x2b9440, 0x1}, + {OP_IF_MODE_AND, 1, 0x11}, /* e3+asic */ + {OP_WR, 0x2b1480, 0x1}, + {OP_RD, 0x280000, 0x0}, + {OP_RD, 0x280004, 0x0}, + {OP_RD, 0x280008, 0x0}, + {OP_RD, 0x28000c, 0x0}, + {OP_RD, 0x280010, 0x0}, + {OP_RD, 0x280014, 0x0}, + {OP_SW, 0x280020, 0x1a1445}, + {OP_SW, 0x2800a4, 0x2145f}, + {OP_WR, 0x280224, 0x0}, + {OP_WR, 0x280234, 0x0}, + {OP_WR, 0x28024c, 0x0}, + {OP_WR, 0x2802e4, 0xffff}, + {OP_WB_ZR, 0x282000, 0x800}, + {OP_IF_MODE_AND, 1, 0x10}, /* e3 */ + {OP_WB_ZR, 0x284000, 0x200}, +/* #define XSEM_COMMON_END 705 */ +/* #define XSEM_PORT0_START 706 */ + {OP_ZR, 0x2a5000, 0x2}, + {OP_ZR, 0x2a5010, 0x2}, + {OP_ZR, 0x2a5020, 0x2}, + {OP_ZR, 0x2a5030, 0x2}, + {OP_ZR, 0x2a9358, 0x20}, + {OP_ZR, 0x2a9458, 0xe}, + {OP_SW, 0x2a9490, 0x21461}, + {OP_ZR, 0x2a94d8, 0xe}, + {OP_SW, 0x2a9510, 0x21463}, + {OP_ZR, 0x2a9558, 0xe}, + {OP_SW, 0x2a9590, 0x21465}, + {OP_ZR, 0x2a95d8, 0xe}, + {OP_SW, 0x2a9610, 0x21467}, + {OP_SW, 0x2a9688, 0x21469}, + {OP_ZR, 0x2abc98, 0x2}, +/* #define XSEM_PORT0_END 707 */ +/* #define XSEM_PORT1_START 708 */ + {OP_ZR, 0x2a5008, 0x2}, + {OP_ZR, 0x2a5018, 0x2}, + {OP_ZR, 0x2a5028, 0x2}, + {OP_ZR, 0x2a5038, 0x2}, + {OP_ZR, 0x2a93d8, 0x20}, + {OP_ZR, 0x2a9498, 0xe}, + {OP_SW, 0x2a94d0, 0x2146b}, + {OP_ZR, 0x2a9518, 0xe}, + {OP_SW, 0x2a9550, 0x2146d}, + {OP_ZR, 0x2a9598, 0xe}, + {OP_SW, 0x2a95d0, 0x2146f}, + {OP_ZR, 0x2a9618, 0xe}, + {OP_SW, 0x2a9650, 0x21471}, + {OP_SW, 0x2a9690, 0x21473}, + {OP_ZR, 0x2abca0, 0x2}, +/* #define XSEM_PORT1_END 709 */ +/* #define XSEM_PF0_START 710 */ + {OP_ZR, 0x2a5048, 0xe}, + {OP_SW, 0x2a9698, 0x101475}, + {OP_ZR, 0x2a98d0, 0x2}, + {OP_ZR, 0x2a9910, 0x2}, + {OP_ZR, 0x2ac480, 0x2}, +/* #define XSEM_PF0_END 711 */ +/* #define XSEM_PF1_START 712 */ + {OP_ZR, 0x2a5080, 0xe}, + {OP_SW, 0x2a96d8, 0x101485}, + {OP_ZR, 0x2a98d8, 0x2}, + {OP_ZR, 0x2a9918, 0x2}, + {OP_ZR, 0x2ac488, 0x2}, +/* #define XSEM_PF1_END 713 */ +/* #define XSEM_PF2_START 714 */ + {OP_ZR, 0x2a50b8, 0xe}, + {OP_SW, 0x2a9718, 0x101495}, + {OP_ZR, 0x2a98e0, 0x2}, + {OP_ZR, 0x2a9920, 0x2}, + {OP_ZR, 0x2ac490, 0x2}, +/* #define XSEM_PF2_END 715 */ +/* #define XSEM_PF3_START 716 */ + {OP_ZR, 0x2a50f0, 0xe}, + {OP_SW, 0x2a9758, 0x1014a5}, + {OP_ZR, 0x2a98e8, 0x2}, + {OP_ZR, 0x2a9928, 0x2}, + {OP_ZR, 0x2ac498, 0x2}, +/* #define XSEM_PF3_END 717 */ +/* #define XSEM_PF4_START 718 */ + {OP_ZR, 0x2a5128, 0xe}, + {OP_SW, 0x2a9798, 0x1014b5}, + {OP_ZR, 0x2a98f0, 0x2}, + {OP_ZR, 0x2a9930, 0x2}, + {OP_ZR, 0x2ac4a0, 0x2}, +/* #define XSEM_PF4_END 719 */ +/* #define XSEM_PF5_START 720 */ + {OP_ZR, 0x2a5160, 0xe}, + {OP_SW, 0x2a97d8, 0x1014c5}, + {OP_ZR, 0x2a98f8, 0x2}, + {OP_ZR, 0x2a9938, 0x2}, + {OP_ZR, 0x2ac4a8, 0x2}, +/* #define XSEM_PF5_END 721 */ +/* #define XSEM_PF6_START 722 */ + {OP_ZR, 0x2a5198, 0xe}, + {OP_SW, 0x2a9818, 0x1014d5}, + {OP_ZR, 0x2a9900, 0x2}, + {OP_ZR, 0x2a9940, 0x2}, + {OP_ZR, 0x2ac4b0, 0x2}, +/* #define XSEM_PF6_END 723 */ +/* #define XSEM_PF7_START 724 */ + {OP_ZR, 0x2a51d0, 0xe}, + {OP_SW, 0x2a9858, 0x1014e5}, + {OP_ZR, 0x2a9908, 0x2}, + {OP_ZR, 0x2a9948, 0x2}, + {OP_ZR, 0x2ac4b8, 0x2}, +/* #define XSEM_PF7_END 725 */ +/* #define MISC_AEU_COMMON_START 726 */ + {OP_ZR, 0xa000, 0xc}, + {OP_ZR, 0xa050, 0x2}, + {OP_SW, 0xa0ec, 0x814f5}, + {OP_SW, 0xa19c, 0x414fd}, + {OP_WR, 0xa45c, 0xc00}, + {OP_ZR, 0xa6a8, 0x2}, + {OP_WR, 0xa6d0, 0x0}, + {OP_WR, 0xa61c, 0x3}, +/* #define MISC_AEU_COMMON_END 727 */ +/* #define MISC_AEU_PORT0_START 728 */ + {OP_SW, 0xa070, 0x51501}, + {OP_ZR, 0xa084, 0x5}, + {OP_WR, 0xa098, 0xfe00000}, + {OP_ZR, 0xa09c, 0x7}, + {OP_SW, 0xa0b8, 0xd1506}, + {OP_ZR, 0xa22c, 0x4}, + {OP_WR, 0xa688, 0xfc}, + {OP_ZR, 0xa68c, 0x7}, + {OP_WR, 0xa6f4, 0x0}, +/* #define MISC_AEU_PORT0_END 729 */ +/* #define MISC_AEU_PORT1_START 730 */ + {OP_SW, 0xa10c, 0x61513}, + {OP_ZR, 0xa124, 0x5}, + {OP_WR, 0xa138, 0xfe00000}, + {OP_ZR, 0xa13c, 0x7}, + {OP_SW, 0xa158, 0xd1519}, + {OP_ZR, 0xa23c, 0x4}, + {OP_WR, 0xa6b0, 0xfc}, + {OP_ZR, 0xa6b4, 0x7}, + {OP_WR, 0xa6f8, 0x0}, +/* #define MISC_AEU_PORT1_END 731 */ +/* #define MISC_AEU_PF0_START 732 */ + {OP_WR, 0xa030, 0x0}, +/* #define MISC_AEU_PF0_END 733 */ +/* #define MISC_AEU_PF1_START 734 */ + {OP_WR, 0xa034, 0x0}, +/* #define MISC_AEU_PF1_END 735 */ +/* #define MISC_AEU_PF2_START 736 */ + {OP_WR, 0xa038, 0x0}, +/* #define MISC_AEU_PF2_END 737 */ +/* #define MISC_AEU_PF3_START 738 */ + {OP_WR, 0xa03c, 0x0}, +/* #define MISC_AEU_PF3_END 739 */ +/* #define MISC_AEU_PF4_START 740 */ + {OP_WR, 0xa040, 0x0}, +/* #define MISC_AEU_PF4_END 741 */ +/* #define MISC_AEU_PF5_START 742 */ + {OP_WR, 0xa044, 0x0}, +/* #define MISC_AEU_PF5_END 743 */ +/* #define MISC_AEU_PF6_START 744 */ + {OP_WR, 0xa048, 0x0}, +/* #define MISC_AEU_PF6_END 745 */ +/* #define MISC_AEU_PF7_START 746 */ + {OP_WR, 0xa04c, 0x0}, +/* #define MISC_AEU_PF7_END 747 */ }; static const u16 init_ops_offsets_e2[] = { - 0x0000, 0x0034, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0034, 0x0035, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0035, - 0x005a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x005a, 0x008b, 0x0000, 0x0000, 0x0000, 0x0000, - 0x008b, 0x008f, 0x008f, 0x0093, 0x0093, 0x0097, 0x0097, 0x009b, 0x009b, - 0x009f, 0x009f, 0x00a3, 0x00a3, 0x00a7, 0x00a7, 0x00ab, 0x00ab, 0x00af, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x00af, 0x0311, 0x0311, 0x0316, 0x0316, 0x031b, 0x031b, - 0x0322, 0x0322, 0x0329, 0x0329, 0x0330, 0x0330, 0x0337, 0x0337, 0x033e, - 0x033e, 0x0345, 0x0345, 0x034c, 0x034c, 0x0353, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0353, 0x0354, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0354, 0x0355, 0x0355, 0x0356, 0x0356, 0x0357, 0x0357, 0x0358, - 0x0358, 0x0359, 0x0359, 0x035a, 0x035a, 0x035b, 0x035b, 0x035c, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x035c, 0x0363, 0x0363, 0x036f, 0x036f, 0x037b, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x037b, 0x037c, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x037c, 0x03a7, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x03a7, 0x03d6, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03d6, 0x0405, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0405, 0x040c, 0x040c, 0x0413, 0x0413, 0x041a, 0x041a, - 0x0421, 0x0421, 0x0428, 0x0428, 0x042f, 0x042f, 0x0436, 0x0436, 0x043d, - 0x043d, 0x0470, 0x0000, 0x0000, 0x0000, 0x0000, 0x0470, 0x0474, 0x0474, - 0x0478, 0x0478, 0x047c, 0x047c, 0x0480, 0x0480, 0x0484, 0x0484, 0x0488, - 0x0488, 0x048c, 0x048c, 0x0490, 0x0490, 0x04e3, 0x04e3, 0x04f7, 0x04f7, - 0x050b, 0x050b, 0x050d, 0x050d, 0x050f, 0x050f, 0x0511, 0x0511, 0x0513, - 0x0513, 0x0515, 0x0515, 0x0517, 0x0517, 0x0519, 0x0519, 0x051b, 0x051b, - 0x0687, 0x0000, 0x0000, 0x0000, 0x0000, 0x0687, 0x068c, 0x068c, 0x0691, - 0x0691, 0x0696, 0x0696, 0x069b, 0x069b, 0x06a0, 0x06a0, 0x06a5, 0x06a5, - 0x06aa, 0x06aa, 0x06af, 0x06af, 0x06b0, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x06b0, 0x06d4, - 0x0000, 0x0000, 0x0000, 0x0000, 0x06d4, 0x06d6, 0x06d6, 0x06d8, 0x06d8, - 0x06da, 0x06da, 0x06dc, 0x06dc, 0x06de, 0x06de, 0x06e0, 0x06e0, 0x06e2, - 0x06e2, 0x06e4, 0x06e4, 0x06f9, 0x06f9, 0x06fc, 0x06fc, 0x06ff, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x06ff, 0x0740, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0740, 0x07d2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07d2, 0x07e1, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x07e1, 0x081e, 0x0000, 0x0000, 0x0000, 0x0000, 0x081e, 0x0827, 0x0827, - 0x0830, 0x0830, 0x0839, 0x0839, 0x0842, 0x0842, 0x084b, 0x084b, 0x0854, - 0x0854, 0x085d, 0x085d, 0x0866, 0x0866, 0x08cc, 0x08cc, 0x08e0, 0x08e0, - 0x08f4, 0x08f4, 0x08f7, 0x08f7, 0x08fa, 0x08fa, 0x08fd, 0x08fd, 0x0900, - 0x0900, 0x0903, 0x0903, 0x0906, 0x0906, 0x0909, 0x0909, 0x090c, 0x090c, - 0x0915, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0915, 0x091b, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x091b, 0x0920, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0920, 0x0926, 0x0000, 0x0000, 0x0000, 0x0000, 0x0926, - 0x0927, 0x0927, 0x0928, 0x0928, 0x0929, 0x0929, 0x092a, 0x092a, 0x092b, - 0x092b, 0x092c, 0x092c, 0x092d, 0x092d, 0x092e, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x092e, 0x099f, 0x0000, 0x0000, 0x0000, 0x0000, 0x099f, 0x09a0, - 0x09a0, 0x09a1, 0x09a1, 0x09a2, 0x09a2, 0x09a3, 0x09a3, 0x09a4, 0x09a4, - 0x09a5, 0x09a5, 0x09a6, 0x09a6, 0x09a7, 0x09a7, 0x09bb, 0x09bb, 0x09ce, - 0x09ce, 0x09e2, 0x09e2, 0x09e3, 0x09e3, 0x09e4, 0x09e4, 0x09e5, 0x09e5, - 0x09e6, 0x09e6, 0x09e7, 0x09e7, 0x09e8, 0x09e8, 0x09e9, 0x09e9, 0x09ea, - 0x09ea, 0x0a09, 0x0000, 0x0000, 0x0000, 0x0000, 0x0a09, 0x0a0c, 0x0a0c, - 0x0a0f, 0x0a0f, 0x0a12, 0x0a12, 0x0a15, 0x0a15, 0x0a18, 0x0a18, 0x0a1b, - 0x0a1b, 0x0a1e, 0x0a1e, 0x0a21, 0x0a21, 0x0a22, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0a22, 0x0a25, 0x0a25, 0x0a28, 0x0a28, 0x0a2b, 0x0a2b, 0x0a2e, - 0x0a2e, 0x0a31, 0x0a31, 0x0a34, 0x0a34, 0x0a37, 0x0a37, 0x0a3a, 0x0a3a, - 0x0a3b, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0a3b, 0x0a53, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0a53, 0x0a54, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000 + 0x0000, 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x000c, 0x000c, 0x0014, 0x0014, + 0x001c, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x001c, + 0x002e, 0x0000, 0x0000, 0x0000, 0x0000, 0x002e, 0x002f, 0x002f, 0x0030, + 0x0030, 0x0031, 0x0031, 0x0032, 0x0032, 0x0033, 0x0033, 0x0034, 0x0034, + 0x0035, 0x0035, 0x0036, 0x0036, 0x003d, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x003d, 0x0046, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0046, 0x0047, 0x0047, 0x0048, 0x0048, + 0x0049, 0x0049, 0x004a, 0x004a, 0x004b, 0x004b, 0x004c, 0x004c, 0x004d, + 0x004d, 0x004e, 0x004e, 0x0078, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0078, 0x01da, 0x0000, + 0x0000, 0x0000, 0x0000, 0x01da, 0x01df, 0x01df, 0x01e4, 0x01e4, 0x01e9, + 0x01e9, 0x01ee, 0x01ee, 0x01f3, 0x01f3, 0x01f8, 0x01f8, 0x01fd, 0x01fd, + 0x0202, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0202, 0x0206, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0206, 0x0216, 0x0000, 0x0000, 0x0000, 0x0000, 0x0216, 0x0218, 0x0218, + 0x021a, 0x021a, 0x021c, 0x021c, 0x021e, 0x021e, 0x0220, 0x0220, 0x0222, + 0x0222, 0x0224, 0x0224, 0x0226, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0226, + 0x0229, 0x0000, 0x0000, 0x0000, 0x0000, 0x0229, 0x022c, 0x022c, 0x022f, + 0x022f, 0x0232, 0x0232, 0x0235, 0x0235, 0x0238, 0x0238, 0x023b, 0x023b, + 0x023e, 0x023e, 0x0241, 0x0241, 0x0245, 0x0245, 0x0249, 0x0249, 0x024d, + 0x024d, 0x024e, 0x024e, 0x024f, 0x024f, 0x0250, 0x0250, 0x0251, 0x0251, + 0x0252, 0x0252, 0x0253, 0x0253, 0x0254, 0x0254, 0x0255, 0x0255, 0x025a, + 0x025a, 0x0277, 0x0277, 0x0293, 0x0293, 0x0294, 0x0294, 0x0295, 0x0295, + 0x0296, 0x0296, 0x0297, 0x0297, 0x0298, 0x0298, 0x0299, 0x0299, 0x029a, + 0x029a, 0x029b, 0x029b, 0x02b2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x02b2, 0x02bf, 0x0000, + 0x0000, 0x0000, 0x0000, 0x02bf, 0x02c0, 0x02c0, 0x02c1, 0x02c1, 0x02c2, + 0x02c2, 0x02c3, 0x02c3, 0x02c4, 0x02c4, 0x02c5, 0x02c5, 0x02c6, 0x02c6, + 0x02c7, 0x02c7, 0x02d8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x02d8, 0x02e6, 0x0000, 0x0000, + 0x0000, 0x0000, 0x02e6, 0x02e7, 0x02e7, 0x02e8, 0x02e8, 0x02e9, 0x02e9, + 0x02ea, 0x02ea, 0x02eb, 0x02eb, 0x02ec, 0x02ec, 0x02ed, 0x02ed, 0x02ee, + 0x02ee, 0x02f3, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x02f3, 0x0391, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0391, + 0x0393, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0393, 0x03a7, 0x0000, 0x0000, 0x0000, 0x0000, + 0x03a7, 0x03a8, 0x03a8, 0x03a9, 0x03a9, 0x03aa, 0x03aa, 0x03ab, 0x03ab, + 0x03ac, 0x03ac, 0x03ad, 0x03ad, 0x03ae, 0x03ae, 0x03af, 0x03af, 0x03cf, + 0x03cf, 0x03d2, 0x03d2, 0x03d5, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x03d5, 0x03fd, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03fd, 0x045d, 0x045d, + 0x0464, 0x0464, 0x046b, 0x046b, 0x0471, 0x0471, 0x0477, 0x0477, 0x047d, + 0x047d, 0x0483, 0x0483, 0x0489, 0x0489, 0x048f, 0x048f, 0x0495, 0x0495, + 0x049b, 0x049b, 0x04ad, 0x0000, 0x0000, 0x0000, 0x0000, 0x04ad, 0x04ae, + 0x04ae, 0x04af, 0x04af, 0x04b0, 0x04b0, 0x04b1, 0x04b1, 0x04b2, 0x04b2, + 0x04b3, 0x04b3, 0x04b4, 0x04b4, 0x04b5, 0x04b5, 0x04b6, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x04b6, 0x04e1, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x04e1, 0x0538, 0x0538, 0x054d, 0x054d, + 0x0562, 0x0562, 0x0564, 0x0564, 0x0566, 0x0566, 0x0568, 0x0568, 0x056a, + 0x056a, 0x056c, 0x056c, 0x056e, 0x056e, 0x0570, 0x0570, 0x0572, 0x0572, + 0x0585, 0x0000, 0x0000, 0x0000, 0x0000, 0x0585, 0x058d, 0x058d, 0x0595, + 0x0595, 0x059d, 0x059d, 0x05a5, 0x05a5, 0x05ad, 0x05ad, 0x05b5, 0x05b5, + 0x05bd, 0x05bd, 0x05c5, 0x05c5, 0x05c6, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x05c6, 0x05f7, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x05f7, 0x0666, 0x0666, 0x0675, 0x0675, 0x0684, 0x0684, + 0x0689, 0x0689, 0x068e, 0x068e, 0x0693, 0x0693, 0x0698, 0x0698, 0x069d, + 0x069d, 0x06a2, 0x06a2, 0x06a7, 0x06a7, 0x06ac, 0x06ac, 0x06b4, 0x06b4, + 0x06bd, 0x06bd, 0x06c6, 0x06c6, 0x06c7, 0x06c7, 0x06c8, 0x06c8, 0x06c9, + 0x06c9, 0x06ca, 0x06ca, 0x06cb, 0x06cb, 0x06cc, 0x06cc, 0x06cd, 0x06cd, + 0x06ce, }; static const u32 init_data_e2[] = { - 0x00010000, 0x00020700, 0x00030e00, 0x00041500, 0x00051c00, 0x00062300, - 0x00072a00, 0x00083100, 0x00093800, 0x000a3f00, 0x000b4600, 0x000c4d00, - 0x000d5400, 0x000e5b00, 0x000f6200, 0x00106900, 0x00117000, 0x00127700, - 0x00137e00, 0x00148500, 0x00158c00, 0x00169300, 0x00179a00, 0x0018a100, - 0x0019a800, 0x001aaf00, 0x001bb600, 0x001cbd00, 0x001dc400, 0x001ecb00, - 0x001fd200, 0x0000d900, 0x00002000, 0x00004000, 0x00006000, 0x00008000, - 0x0000a000, 0x0000c000, 0x0000e000, 0x00010000, 0x00012000, 0x00014000, - 0x00016000, 0x00018000, 0x0001a000, 0x0001c000, 0x0001e000, 0x00020000, - 0x00022000, 0x00024000, 0x00026000, 0x00028000, 0x0002a000, 0x0002c000, - 0x0002e000, 0x00030000, 0x00032000, 0x00034000, 0x00036000, 0x00038000, - 0x0003a000, 0x0003c000, 0x0003e000, 0x00040000, 0x00042000, 0x00044000, - 0x00046000, 0x00048000, 0x0004a000, 0x0004c000, 0x0004e000, 0x00050000, - 0x00052000, 0x00054000, 0x00056000, 0x00058000, 0x0005a000, 0x0005c000, - 0x0005e000, 0x00060000, 0x00062000, 0x00064000, 0x00066000, 0x00068000, - 0x0006a000, 0x0006c000, 0x0006e000, 0x00070000, 0x00072000, 0x00074000, - 0x00076000, 0x00078000, 0x0007a000, 0x0007c000, 0x0007e000, 0x00080000, - 0x00082000, 0x00084000, 0x00086000, 0x00088000, 0x0008a000, 0x0008c000, - 0x0008e000, 0x00090000, 0x00092000, 0x00094000, 0x00096000, 0x00098000, - 0x0009a000, 0x0009c000, 0x0009e000, 0x000a0000, 0x000a2000, 0x000a4000, - 0x000a6000, 0x000a8000, 0x000aa000, 0x000ac000, 0x000ae000, 0x000b0000, - 0x000b2000, 0x000b4000, 0x000b6000, 0x000b8000, 0x000ba000, 0x000bc000, - 0x000be000, 0x000c0000, 0x000c2000, 0x000c4000, 0x000c6000, 0x000c8000, - 0x000ca000, 0x000cc000, 0x000ce000, 0x000d0000, 0x000d2000, 0x000d4000, - 0x000d6000, 0x000d8000, 0x000da000, 0x000dc000, 0x000de000, 0x000e0000, - 0x000e2000, 0x000e4000, 0x000e6000, 0x000e8000, 0x000ea000, 0x000ec000, - 0x000ee000, 0x000f0000, 0x000f2000, 0x000f4000, 0x000f6000, 0x000f8000, - 0x000fa000, 0x000fc000, 0x000fe000, 0x00100000, 0x00102000, 0x00104000, - 0x00106000, 0x00108000, 0x0010a000, 0x0010c000, 0x0010e000, 0x00110000, - 0x00112000, 0x00114000, 0x00116000, 0x00118000, 0x0011a000, 0x0011c000, - 0x0011e000, 0x00120000, 0x00122000, 0x00124000, 0x00126000, 0x00128000, - 0x0012a000, 0x0012c000, 0x0012e000, 0x00130000, 0x00132000, 0x00134000, - 0x00136000, 0x00138000, 0x0013a000, 0x0013c000, 0x0013e000, 0x00140000, - 0x00142000, 0x00144000, 0x00146000, 0x00148000, 0x0014a000, 0x0014c000, - 0x0014e000, 0x00150000, 0x00152000, 0x00154000, 0x00156000, 0x00158000, - 0x0015a000, 0x0015c000, 0x0015e000, 0x00160000, 0x00162000, 0x00164000, - 0x00166000, 0x00168000, 0x0016a000, 0x0016c000, 0x0016e000, 0x00170000, - 0x00172000, 0x00174000, 0x00176000, 0x00178000, 0x0017a000, 0x0017c000, - 0x0017e000, 0x00180000, 0x00182000, 0x00184000, 0x00186000, 0x00188000, - 0x0018a000, 0x0018c000, 0x0018e000, 0x00190000, 0x00192000, 0x00194000, - 0x00196000, 0x00198000, 0x0019a000, 0x0019c000, 0x0019e000, 0x001a0000, - 0x001a2000, 0x001a4000, 0x001a6000, 0x001a8000, 0x001aa000, 0x001ac000, - 0x001ae000, 0x001b0000, 0x001b2000, 0x001b4000, 0x001b6000, 0x001b8000, - 0x001ba000, 0x001bc000, 0x001be000, 0x001c0000, 0x001c2000, 0x001c4000, - 0x001c6000, 0x001c8000, 0x001ca000, 0x001cc000, 0x001ce000, 0x001d0000, - 0x001d2000, 0x001d4000, 0x001d6000, 0x001d8000, 0x001da000, 0x001dc000, - 0x001de000, 0x001e0000, 0x001e2000, 0x001e4000, 0x001e6000, 0x001e8000, - 0x001ea000, 0x001ec000, 0x001ee000, 0x001f0000, 0x001f2000, 0x001f4000, - 0x001f6000, 0x001f8000, 0x001fa000, 0x001fc000, 0x001fe000, 0x00200000, - 0x00202000, 0x00204000, 0x00206000, 0x00208000, 0x0020a000, 0x0020c000, - 0x0020e000, 0x00210000, 0x00212000, 0x00214000, 0x00216000, 0x00218000, - 0x0021a000, 0x0021c000, 0x0021e000, 0x00220000, 0x00222000, 0x00224000, - 0x00226000, 0x00228000, 0x0022a000, 0x0022c000, 0x0022e000, 0x00230000, - 0x00232000, 0x00234000, 0x00236000, 0x00238000, 0x0023a000, 0x0023c000, - 0x0023e000, 0x00240000, 0x00242000, 0x00244000, 0x00246000, 0x00248000, - 0x0024a000, 0x0024c000, 0x0024e000, 0x00250000, 0x00252000, 0x00254000, - 0x00256000, 0x00258000, 0x0025a000, 0x0025c000, 0x0025e000, 0x00260000, - 0x00262000, 0x00264000, 0x00266000, 0x00268000, 0x0026a000, 0x0026c000, - 0x0026e000, 0x00270000, 0x00272000, 0x00274000, 0x00276000, 0x00278000, - 0x0027a000, 0x0027c000, 0x0027e000, 0x00280000, 0x00282000, 0x00284000, - 0x00286000, 0x00288000, 0x0028a000, 0x0028c000, 0x0028e000, 0x00290000, - 0x00292000, 0x00294000, 0x00296000, 0x00298000, 0x0029a000, 0x0029c000, - 0x0029e000, 0x002a0000, 0x002a2000, 0x002a4000, 0x002a6000, 0x002a8000, - 0x002aa000, 0x002ac000, 0x002ae000, 0x002b0000, 0x002b2000, 0x002b4000, - 0x002b6000, 0x002b8000, 0x002ba000, 0x002bc000, 0x002be000, 0x002c0000, - 0x002c2000, 0x002c4000, 0x002c6000, 0x002c8000, 0x002ca000, 0x002cc000, - 0x002ce000, 0x002d0000, 0x002d2000, 0x002d4000, 0x002d6000, 0x002d8000, - 0x002da000, 0x002dc000, 0x002de000, 0x002e0000, 0x002e2000, 0x002e4000, - 0x002e6000, 0x002e8000, 0x002ea000, 0x002ec000, 0x002ee000, 0x002f0000, - 0x002f2000, 0x002f4000, 0x002f6000, 0x002f8000, 0x002fa000, 0x002fc000, - 0x002fe000, 0x00300000, 0x00302000, 0x00304000, 0x00306000, 0x00308000, - 0x0030a000, 0x0030c000, 0x0030e000, 0x00310000, 0x00312000, 0x00314000, - 0x00316000, 0x00318000, 0x0031a000, 0x0031c000, 0x0031e000, 0x00320000, - 0x00322000, 0x00324000, 0x00326000, 0x00328000, 0x0032a000, 0x0032c000, - 0x0032e000, 0x00330000, 0x00332000, 0x00334000, 0x00336000, 0x00338000, - 0x0033a000, 0x0033c000, 0x0033e000, 0x00340000, 0x00342000, 0x00344000, - 0x00346000, 0x00348000, 0x0034a000, 0x0034c000, 0x0034e000, 0x00350000, - 0x00352000, 0x00354000, 0x00356000, 0x00358000, 0x0035a000, 0x0035c000, - 0x0035e000, 0x00360000, 0x00362000, 0x00364000, 0x00366000, 0x00368000, - 0x0036a000, 0x0036c000, 0x0036e000, 0x00370000, 0x00372000, 0x00374000, - 0x00376000, 0x00378000, 0x0037a000, 0x0037c000, 0x0037e000, 0x00380000, - 0x00382000, 0x00384000, 0x00386000, 0x00388000, 0x0038a000, 0x0038c000, - 0x0038e000, 0x00390000, 0x00392000, 0x00394000, 0x00396000, 0x00398000, - 0x0039a000, 0x0039c000, 0x0039e000, 0x003a0000, 0x003a2000, 0x003a4000, - 0x003a6000, 0x003a8000, 0x003aa000, 0x003ac000, 0x003ae000, 0x003b0000, - 0x003b2000, 0x003b4000, 0x003b6000, 0x003b8000, 0x003ba000, 0x003bc000, - 0x003be000, 0x003c0000, 0x003c2000, 0x003c4000, 0x003c6000, 0x003c8000, - 0x003ca000, 0x003cc000, 0x003ce000, 0x003d0000, 0x003d2000, 0x003d4000, - 0x003d6000, 0x003d8000, 0x003da000, 0x003dc000, 0x003de000, 0x003e0000, - 0x003e2000, 0x003e4000, 0x003e6000, 0x003e8000, 0x003ea000, 0x003ec000, - 0x003ee000, 0x003f0000, 0x003f2000, 0x003f4000, 0x003f6000, 0x003f8000, - 0x003fa000, 0x003fc000, 0x003fe000, 0x003fe001, 0x00000000, 0x000001ff, - 0x00000200, 0x00007ff8, 0x00007ff8, 0x0000059f, 0x00003500, 0x00000000, - 0x00000001, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x00000001, 0x00000000, 0x00201001, 0x00000000, 0x01009000, - 0x00000100, 0x00009002, 0x00009004, 0x00009006, 0x00009008, 0x0000900a, - 0x0000900c, 0x0000900e, 0x00009010, 0x00009012, 0x00009014, 0x00009016, - 0x00009018, 0x0000901a, 0x0000901c, 0x0000901e, 0x00009020, 0x00009022, - 0x00009024, 0x00009026, 0x00009028, 0x0000902a, 0x0000902c, 0x0000902e, - 0x00009030, 0x00009032, 0x00009034, 0x00009036, 0x00009038, 0x0000903a, - 0x0000903c, 0x0000903e, 0x00009040, 0x00009042, 0x00009044, 0x00009046, - 0x00009048, 0x0000904a, 0x0000904c, 0x0000904e, 0x00009050, 0x00009052, - 0x00009054, 0x00009056, 0x00009058, 0x0000905a, 0x0000905c, 0x0000905e, - 0x00009060, 0x00009062, 0x00009064, 0x00009066, 0x00009068, 0x0000906a, - 0x0000906c, 0x0000906e, 0x00009070, 0x00009072, 0x00009074, 0x00009076, - 0x00009078, 0x0000907a, 0x0000907c, 0x0000907e, 0x00009080, 0x00009082, - 0x00009084, 0x00009086, 0x00009088, 0x0000908a, 0x0000908c, 0x0000908e, - 0x00009090, 0x00009092, 0x00009094, 0x00009096, 0x00009098, 0x0000909a, - 0x0000909c, 0x0000909e, 0x000090a0, 0x000090a2, 0x000090a4, 0x000090a6, - 0x000090a8, 0x000090aa, 0x000090ac, 0x000090ae, 0x000090b0, 0x000090b2, - 0x000090b4, 0x000090b6, 0x000090b8, 0x000090ba, 0x000090bc, 0x000090be, - 0x000090c0, 0x000090c2, 0x000090c4, 0x000090c6, 0x000090c8, 0x000090ca, - 0x000090cc, 0x000090ce, 0x000090d0, 0x000090d2, 0x000090d4, 0x000090d6, - 0x000090d8, 0x000090da, 0x000090dc, 0x000090de, 0x000090e0, 0x000090e2, - 0x000090e4, 0x000090e6, 0x000090e8, 0x000090ea, 0x000090ec, 0x000090ee, - 0x000090f0, 0x000090f2, 0x000090f4, 0x000090f6, 0x000090f8, 0x000090fa, - 0x000090fc, 0x000090fe, 0x00009100, 0x00009102, 0x00009104, 0x00009106, - 0x00009108, 0x0000910a, 0x0000910c, 0x0000910e, 0x00009110, 0x00009112, - 0x00009114, 0x00009116, 0x00009118, 0x0000911a, 0x0000911c, 0x0000911e, - 0x00009120, 0x00009122, 0x00009124, 0x00009126, 0x00009128, 0x0000912a, - 0x0000912c, 0x0000912e, 0x00009130, 0x00009132, 0x00009134, 0x00009136, - 0x00009138, 0x0000913a, 0x0000913c, 0x0000913e, 0x00009140, 0x00009142, - 0x00009144, 0x00009146, 0x00009148, 0x0000914a, 0x0000914c, 0x0000914e, - 0x00009150, 0x00009152, 0x00009154, 0x00009156, 0x00009158, 0x0000915a, - 0x0000915c, 0x0000915e, 0x00009160, 0x00009162, 0x00009164, 0x00009166, - 0x00009168, 0x0000916a, 0x0000916c, 0x0000916e, 0x00009170, 0x00009172, - 0x00009174, 0x00009176, 0x00009178, 0x0000917a, 0x0000917c, 0x0000917e, - 0x00009180, 0x00009182, 0x00009184, 0x00009186, 0x00009188, 0x0000918a, - 0x0000918c, 0x0000918e, 0x00009190, 0x00009192, 0x00009194, 0x00009196, - 0x00009198, 0x0000919a, 0x0000919c, 0x0000919e, 0x000091a0, 0x000091a2, - 0x000091a4, 0x000091a6, 0x000091a8, 0x000091aa, 0x000091ac, 0x000091ae, - 0x000091b0, 0x000091b2, 0x000091b4, 0x000091b6, 0x000091b8, 0x000091ba, - 0x000091bc, 0x000091be, 0x000091c0, 0x000091c2, 0x000091c4, 0x000091c6, - 0x000091c8, 0x000091ca, 0x000091cc, 0x000091ce, 0x000091d0, 0x000091d2, - 0x000091d4, 0x000091d6, 0x000091d8, 0x000091da, 0x000091dc, 0x000091de, - 0x000091e0, 0x000091e2, 0x000091e4, 0x000091e6, 0x000091e8, 0x000091ea, - 0x000091ec, 0x000091ee, 0x000091f0, 0x000091f2, 0x000091f4, 0x000091f6, - 0x000091f8, 0x000091fa, 0x000091fc, 0x000091fe, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0x0000ffff, 0x00000000, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0x0000ffff, 0x00000000, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, - 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, - 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, - 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, - 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, - 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, 0x00002000, 0x000040c0, - 0x00006180, 0x00008240, 0x0000a300, 0x0000c3c0, 0x0000e480, 0x00010540, - 0x00012600, 0x000146c0, 0x00016780, 0x00018840, 0x0001a900, 0x0001c9c0, - 0x0001ea80, 0x00020b40, 0x00022c00, 0x00024cc0, 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0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x0000ff00, 0x0fffffff, 0x0000ff00, 0x0fffffff, 0x000000ff, - 0x0000ff00, 0x00001000, 0x00002080, 0x00003100, 0x00004180, 0x00005200, - 0x00006280, 0x00007300, 0x00008380, 0x00009400, 0x0000a480, 0x0000b500, - 0x0000c580, 0x0000d600, 0x0000e680, 0x0000f700, 0x00010780, 0x00011800, - 0x00012880, 0x00013900, 0x00014980, 0x00015a00, 0x00016a80, 0x00017b00, - 0x00018b80, 0x00019c00, 0x0001ac80, 0x0001bd00, 0x0001cd80, 0x0001de00, - 0x0001ee80, 0x0001ff00, 0x00000f80, 0x00007ff8, 0x00007ff8, 0x000004ea, - 0x00003500, 0x10000000, 0x000028ad, 0x00002918, 0x00002919, 0x00000005, - 0x00000006, 0x00010001, 0x00260106, 0xccccccc9, 0x7058103c, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, - 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x00000001, - 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, - 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, - 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0x03030303, 0x13430202, 0x50505020, 0x70608050, 0x02000200, 0x06040604, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0x0000ffff, 0x00000000, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0x0000ffff, 0x00000000, 0x000e0000, 0x011600d6, 0x002625a0, 0x002625a0, - 0x002625a0, 0x002625a0, 0x00720000, 0x012300f3, 0x002625a0, 0x002625a0, - 0x002625a0, 0x002625a0, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, - 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0xfffffff3, 0x318fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, - 0xfffffff1, 0x30efffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, - 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, - 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0008cf3c, 0xcdcdcdcd, 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7, 0x31efffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, - 0xfffffff5, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x310fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x310fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, - 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, 0x0c30c305, 0xc30c30c3, - 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, - 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7, 0x30efffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xfffffff5, 0x304fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x320fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, - 0xfffffff1, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0001cf3c, 0xcdcdcdcd, 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xfffff406, 0x1cbfffff, - 0x0c30c305, 0xc30c30c3, 0xcf300014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, - 0xfffffff2, 0x304fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0008cf3c, 0xcdcdcdcd, 0xffffff8a, 0x042fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cc000, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffff97, 0x05cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cc000, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, - 0xfffffff5, 0x310fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0040cf3c, 0xcdcdcdcd, 0xfffffff3, 0x320fffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xfffffff1, 0x302fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, - 0xfffffff6, 0x305fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0002cf3c, 0xcdcdcdcd, 0xffffff06, 0x1cbfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cc014, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xfffffff2, 0x304fffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, - 0xfffffffa, 0x302fffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf300, 0xf3cf3cf3, - 0x0010cf3c, 0xcdcdcdcd, 0xfffffff7, 0x31cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf300, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0001cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0008cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0040cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0000cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0001cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0002cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0004cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0008cf3c, 0xcdcdcdcd, - 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, - 0x0010cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, 0x0c30c30c, 0xc30c30c3, - 0xcf3cf3cc, 0xf3cf3cf3, 0x0020cf3c, 0xcdcdcdcd, 0xffffffff, 0x30cfffff, - 0x0c30c30c, 0xc30c30c3, 0xcf3cf3cc, 0xf3cf3cf3, 0x0040cf3c, 0xcdcdcdcd, - 0x000c0000, 0x000700c0, 0x00028130, 0x000b8158, 0x00020210, 0x00010230, - 0x000f0240, 0x00010330, 0x00080000, 0x00080080, 0x00028100, 0x000b8128, - 0x000201e0, 0x00010200, 0x00070210, 0x00020280, 0x00100000, 0x00080100, - 0x00028180, 0x000b81a8, 0x00020260, 0x00018280, 0x000e8298, 0x00080380, - 0x00100000, 0x00010100, 0x00028110, 0x00090138, 0x000201c8, 0x000101e8, - 0x000e01f8, 0x000002d8, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, - 0x00002000, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x00002000, - 0xcccccccc, 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x04002000, 0xcccccccc, - 0xcccccccc, 0xcccccccc, 0xcccccccc, 0x41002000, 0x03030303, 0x03430202, - 0x50505020, 0x70608050, 0x13131313, 0x13431212, 0x50505020, 0x70608050, - 0x03010200, 0x00000000 -}; - -static const u8 tsem_int_table_data_e2[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, - 0xcf, 0xc0, 0xf0, 0x03, 0x8a, 0xf5, 0x79, 0x19, 0x18, 0xae, 0x8a, 0x21, - 0xf8, 0xf4, 0xc0, 0x2c, 0x0c, 0x94, 0xe9, 0xef, 0xe7, 0x62, 0x60, 0x98, - 0x05, 0xc4, 0x5b, 0xb8, 0x50, 0xc5, 0xe5, 0x59, 0x20, 0xb4, 0x10, 0x50, - 0x3c, 0x8f, 0x93, 0x81, 0x61, 0x2f, 0x10, 0x4f, 0x67, 0x67, 0x60, 0xe8, - 0x64, 0x64, 0x60, 0x98, 0x03, 0xc4, 0xeb, 0x99, 0xa0, 0x6a, 0xb5, 0x10, - 0x7a, 0x16, 0x68, 0x30, 0x30, 0x1c, 0x07, 0xe2, 0x08, 0x35, 0x06, 0x86, - 0x36, 0x4d, 0x84, 0x78, 0xb2, 0x36, 0x03, 0xc3, 0x0b, 0x20, 0x7f, 0x03, - 0x54, 0x4c, 0x13, 0xa8, 0x67, 0xb9, 0x16, 0x65, 0xee, 0x1e, 0xc5, 0x83, - 0x03, 0x5f, 0x33, 0x47, 0xe5, 0x6f, 0x32, 0x85, 0xd0, 0xbe, 0x50, 0xf1, - 0xeb, 0x68, 0xf2, 0x9b, 0xa1, 0xf2, 0x27, 0x0c, 0x20, 0xf4, 0x0d, 0x73, - 0xec, 0xe6, 0x9e, 0x34, 0x20, 0xce, 0xfe, 0x83, 0xf6, 0xa8, 0xfc, 0xb9, - 0xf6, 0xf8, 0xd5, 0xcf, 0x71, 0x46, 0xe5, 0x6f, 0x45, 0x53, 0xbf, 0x12, - 0xca, 0x07, 0x00, 0x03, 0x51, 0xa3, 0x58, 0xd8, 0x03, 0x00, 0x00, 0x00 -}; - -static const u8 tsem_pram_data_e2[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xd5, 0x7d, - 0x0d, 0x78, 0x54, 0xc5, 0xb9, 0xf0, 0x9c, 0x3d, 0x3f, 0xfb, 0xbf, 0x39, - 0x24, 0x9b, 0x70, 0x36, 0x04, 0x3c, 0x81, 0x80, 0x8b, 0x8d, 0xba, 0x42, - 0x82, 0xa1, 0x45, 0x3d, 0x09, 0x29, 0xc6, 0xde, 0x68, 0x57, 0xa4, 0x36, - 0xed, 0xa5, 0x76, 0x51, 0x44, 0x10, 0x84, 0x15, 0xad, 0xa4, 0x5e, 0x75, - 0x37, 0xff, 0x21, 0x12, 0x5c, 0xc4, 0xd6, 0xc8, 0xa5, 0xba, 0x52, 0xb4, - 0xd8, 0xeb, 0x4f, 0x6c, 0x69, 0xb5, 0x5f, 0xeb, 0x7d, 0x36, 0xfe, 0xf0, - 0xe9, 0xfd, 0x6a, 0x6f, 0xa4, 0x96, 0x42, 0xc5, 0xde, 0x28, 0x8a, 0x16, - 0xd1, 0x52, 0xbc, 0x14, 0xef, 0xfd, 0x50, 0xee, 0xbc, 0x33, 0x73, 0xb2, - 0xe7, 0x9c, 0x9c, 0xdd, 0x2c, 0xfe, 0x5c, 0xdb, 0xf8, 0x3c, 0x0e, 0xe7, - 0xcc, 0x9c, 0x99, 0x77, 0xde, 0xf7, 0x9d, 0x77, 0xde, 0xbf, 0x99, 0x95, - 0xb8, 0x19, 0x68, 0xc6, 0x69, 0x08, 0x9d, 0x84, 0xbf, 0x0b, 0x10, 0xba, - 0x4f, 0x44, 0x08, 0xd5, 0x66, 0x4b, 0x75, 0xd5, 0x97, 0x7a, 0x47, 0x6a, - 0x10, 0x3a, 0x86, 0xfc, 0xa9, 0xbe, 0x20, 0x42, 0x1d, 0x02, 0xd2, 0x10, - 0x7e, 0x4e, 0xee, 0xf7, 0xa7, 0x1f, 0xe0, 0x10, 0xfc, 0x85, 0x05, 0xfc, - 0xbc, 0x8e, 0x3f, 0x23, 0xd2, 0x57, 0x89, 0xd0, 0xdd, 0xde, 0xdb, 0xee, - 0x83, 0xf6, 0xad, 0x49, 0x01, 0x39, 0x71, 0xd9, 0x93, 0x40, 0x28, 0xe3, - 0xc4, 0xf5, 0x9e, 0xc0, 0x36, 0x54, 0x84, 0x90, 0x0b, 0xc5, 0x1f, 0x83, - 0x7a, 0xfc, 0x17, 0x7d, 0x00, 0xf7, 0x77, 0xdc, 0x3d, 0x25, 0x8d, 0x02, - 0xd9, 0xf1, 0x4b, 0x91, 0x83, 0x8c, 0x8b, 0x50, 0x85, 0x7c, 0xd0, 0x4b, - 0xda, 0xa1, 0x93, 0x3c, 0xfe, 0xdf, 0xfe, 0x58, 0x3d, 0x2a, 0x43, 0x88, - 0x47, 0xfa, 0x5f, 0x2b, 0x1a, 0xc4, 0xfd, 0x08, 0x2f, 0xf3, 0x69, 0x18, - 0x97, 0xe7, 0x9b, 0xe5, 0x27, 0xa6, 0x66, 0xfb, 0xb1, 0x96, 0xbc, 0x2c, - 0xa1, 0x8c, 0x8b, 0xf5, 0x07, 0xff, 0xe3, 0x17, 0x17, 0xc5, 0x7c, 0xb9, - 0xdb, 0xb7, 0xee, 0x5f, 0x92, 0x7e, 0xd6, 0xd0, 0xfe, 0x74, 0xe4, 0x0f, - 0x1e, 0xfc, 0x02, 0xfe, 0x87, 0x80, 0x04, 0x02, 0x0f, 0xbf, 0x01, 0x01, - 0x1e, 0x8e, 0x55, 0xa1, 0x34, 0x5f, 0x99, 0xbb, 0x9f, 0xe3, 0x89, 0x58, - 0xfa, 0xd9, 0xe9, 0x80, 0xc7, 0x7f, 0x2c, 0x8a, 0x9e, 0x99, 0xbb, 0x9d, - 0x8e, 0xa7, 0xae, 0x84, 0x8b, 0x94, 0x1d, 0x09, 0x99, 0x94, 0x98, 0x0c, - 0xda, 0x20, 0x86, 0x53, 0xac, 0x42, 0xda, 0x36, 0x1b, 0x78, 0xe7, 0x23, - 0x8e, 0xe0, 0x4b, 0x0c, 0x26, 0x09, 0x3c, 0x7d, 0x55, 0x8e, 0xb4, 0x97, - 0xd0, 0x25, 0x86, 0x10, 0xc6, 0xaf, 0x97, 0xe1, 0xa7, 0xaf, 0xea, 0x27, - 0x2e, 0xad, 0x3a, 0xf7, 0xf8, 0xa8, 0xda, 0x80, 0x1f, 0x8c, 0x47, 0x09, - 0xd1, 0xfe, 0x10, 0x9e, 0xdf, 0x03, 0xf8, 0x7b, 0x29, 0xc7, 0xf8, 0x97, - 0xc1, 0xf8, 0xa5, 0xb8, 0x5e, 0x19, 0x3b, 0x7e, 0xb2, 0xe6, 0xe3, 0x8f, - 0xef, 0x9c, 0x89, 0xd0, 0x70, 0x35, 0xe0, 0x3b, 0x8d, 0xeb, 0x10, 0x72, - 0x84, 0xe3, 0x28, 0x82, 0xe7, 0xe3, 0xc1, 0xfd, 0x5d, 0x98, 0x07, 0xdf, - 0x28, 0x8c, 0xfb, 0x09, 0xe3, 0xcf, 0x54, 0xda, 0xcf, 0x78, 0x78, 0x77, - 0x55, 0x38, 0x4c, 0x7c, 0x21, 0x05, 0x3d, 0xe4, 0x7b, 0xfd, 0x59, 0xf0, - 0x15, 0x9b, 0xf9, 0xc6, 0xca, 0x97, 0x80, 0x27, 0x98, 0x3f, 0x8a, 0x25, - 0x39, 0x0c, 0x1f, 0x92, 0x51, 0xe4, 0x01, 0x15, 0xe8, 0x11, 0x51, 0x8c, - 0xfc, 0x85, 0x50, 0x1b, 0xa1, 0x93, 0x20, 0x44, 0xb5, 0xa8, 0x0d, 0x1e, - 0x5a, 0x81, 0xef, 0x71, 0x3f, 0x9c, 0x1c, 0x69, 0x01, 0x3c, 0x0a, 0x3e, - 0x09, 0x39, 0x2b, 0x73, 0xb7, 0x5f, 0xcb, 0xf0, 0xae, 0x8f, 0xaf, 0x97, - 0x4e, 0x14, 0xcf, 0x70, 0x40, 0x37, 0x95, 0xc2, 0x81, 0x4e, 0x5c, 0xa6, - 0x5e, 0x7a, 0xe6, 0x58, 0x38, 0x5c, 0x42, 0x34, 0x06, 0xfc, 0x01, 0xeb, - 0x62, 0x1b, 0x1e, 0xa7, 0x73, 0xc2, 0xe5, 0x6a, 0xcc, 0x30, 0xce, 0xed, - 0x3a, 0x3c, 0xaa, 0xd6, 0x02, 0xed, 0x5c, 0xb8, 0x9d, 0x93, 0x83, 0xef, - 0x22, 0xb6, 0xf0, 0x74, 0x32, 0x78, 0xf4, 0x7e, 0x10, 0x4a, 0x91, 0x71, - 0x38, 0x35, 0x8e, 0x46, 0x7c, 0x59, 0xf8, 0xba, 0xdc, 0xd1, 0x96, 0x25, - 0x20, 0x3f, 0x26, 0x48, 0x04, 0xbe, 0x4e, 0x3f, 0x6a, 0x19, 0x34, 0xf4, - 0x97, 0x61, 0xfd, 0x3c, 0xae, 0xf7, 0x27, 0xe2, 0x7a, 0x1b, 0xbe, 0x43, - 0xa8, 0x9d, 0xf4, 0xdf, 0x50, 0x56, 0xe7, 0x82, 0xfe, 0x3b, 0x94, 0x06, - 0x17, 0xf2, 0x91, 0x69, 0xbb, 0x80, 0xde, 0x9d, 0xbe, 0x85, 0x45, 0x28, - 0x0f, 0xbf, 0x6d, 0x64, 0xeb, 0x6d, 0x03, 0x5b, 0x6f, 0x7d, 0x6c, 0xbd, - 0xf5, 0x26, 0x14, 0x52, 0x76, 0xfa, 0x76, 0x37, 0xc1, 0xbc, 0x8f, 0xd5, - 0x60, 0x3c, 0xe4, 0xe1, 0xb7, 0xa2, 0x3a, 0x87, 0x89, 0x5f, 0xfc, 0x11, - 0x8f, 0x85, 0x5f, 0xd2, 0x04, 0x4e, 0x6f, 0xd8, 0xcc, 0x47, 0x6e, 0xb5, - 0xdc, 0xf4, 0x9d, 0x58, 0x26, 0x38, 0x80, 0xee, 0x9d, 0x3e, 0x47, 0x1a, - 0xa6, 0x3e, 0x1e, 0xfc, 0xbd, 0x0c, 0x7e, 0xbd, 0xdd, 0x7a, 0x21, 0xe5, - 0x92, 0x6d, 0xf1, 0x44, 0xc7, 0xd7, 0x9f, 0xdd, 0xaa, 0x19, 0xde, 0xcf, - 0x0e, 0x7f, 0xf4, 0x7b, 0xbf, 0x38, 0x2c, 0xdb, 0xc1, 0xf5, 0x69, 0xe1, - 0x4d, 0xe7, 0xab, 0x5c, 0x70, 0x4a, 0x25, 0x52, 0x3c, 0x0d, 0xfc, 0x27, - 0x44, 0x15, 0xe3, 0x3a, 0x38, 0xc8, 0xe4, 0xa6, 0x54, 0xe2, 0x8a, 0xa7, - 0x81, 0x5f, 0x5d, 0xb9, 0xea, 0x3d, 0xf4, 0x7b, 0x1f, 0xae, 0xf7, 0xe3, - 0xf1, 0x7d, 0x51, 0x15, 0x96, 0x06, 0xcf, 0xe4, 0xb2, 0x1b, 0xd6, 0x83, - 0x61, 0x7e, 0x1f, 0xb1, 0xef, 0xae, 0xe1, 0x1c, 0xfa, 0xba, 0x54, 0xa2, - 0xf8, 0x3b, 0xae, 0x2a, 0x49, 0xd6, 0xb5, 0x5b, 0xa5, 0xeb, 0xda, 0xfa, - 0x9d, 0x5e, 0xbe, 0xcb, 0xf8, 0xbe, 0xf7, 0xc3, 0x0e, 0xe5, 0x4a, 0x58, - 0x27, 0xa5, 0x2e, 0xb2, 0x4e, 0xb8, 0x2a, 0xbc, 0x8e, 0xaa, 0xc7, 0x8e, - 0xb3, 0x11, 0x69, 0xff, 0x05, 0xed, 0x6f, 0x46, 0xda, 0x7f, 0x93, 0x7d, - 0xe0, 0x23, 0x3e, 0x66, 0xb7, 0x5e, 0x3e, 0x60, 0xfb, 0xaa, 0xbb, 0x39, - 0xaa, 0xba, 0xf0, 0x3f, 0x4b, 0x00, 0xfe, 0xea, 0xb1, 0x70, 0x94, 0x71, - 0x74, 0xfc, 0x1b, 0x74, 0xf8, 0x93, 0x18, 0xfe, 0x33, 0x0b, 0x87, 0x5f, - 0xe4, 0x28, 0x5c, 0xe3, 0xc1, 0xaf, 0x8f, 0x83, 0xe1, 0x9f, 0xc0, 0xd5, - 0x12, 0xf8, 0x8b, 0xb9, 0xd2, 0xdc, 0xf0, 0xcb, 0x0c, 0x9e, 0x62, 0xa4, - 0xb6, 0x09, 0x20, 0x67, 0xab, 0xb0, 0x7c, 0x23, 0xf4, 0xbf, 0x54, 0x35, - 0xca, 0xf7, 0xeb, 0xd9, 0xf8, 0xc5, 0x0c, 0x3e, 0x2c, 0xef, 0x08, 0xdd, - 0xf4, 0xfa, 0x55, 0x1c, 0xc5, 0x43, 0xa1, 0xf3, 0x39, 0x8d, 0x2b, 0x8c, - 0x1e, 0xfa, 0xb8, 0x78, 0x3e, 0x5f, 0x60, 0xf3, 0xa9, 0xe6, 0xf2, 0xd0, - 0xe3, 0x0c, 0x36, 0x9f, 0xeb, 0x61, 0xaf, 0xc4, 0xa5, 0x3b, 0x1a, 0x55, - 0x15, 0x07, 0xd9, 0xb2, 0x6d, 0xf9, 0xea, 0x22, 0x06, 0xc7, 0xad, 0x0c, - 0x7e, 0x94, 0x6c, 0x3b, 0x25, 0xbe, 0xaa, 0x2b, 0x70, 0x1e, 0x17, 0x65, - 0xe9, 0xd2, 0xc8, 0xe6, 0xf1, 0xe5, 0x7c, 0xf3, 0x98, 0xcf, 0xe6, 0x91, - 0xe2, 0xd1, 0xdc, 0x37, 0x30, 0xf0, 0xc9, 0xd3, 0xd9, 0xbe, 0x83, 0x16, - 0x9a, 0xe8, 0xd2, 0xce, 0xf0, 0x93, 0x72, 0xea, 0x74, 0x69, 0x37, 0xd1, - 0xa5, 0xf5, 0x14, 0xe9, 0xb2, 0xb0, 0xc0, 0xf9, 0xb4, 0x67, 0xe9, 0x72, - 0x05, 0x47, 0xd7, 0xc9, 0xb7, 0xf3, 0xf1, 0x99, 0xa1, 0xfd, 0x52, 0xd6, - 0xfe, 0x6a, 0xd6, 0x1e, 0xa1, 0x72, 0x5c, 0xdf, 0xf6, 0x68, 0x32, 0x59, - 0x0d, 0xf5, 0xd1, 0x15, 0xf0, 0x5e, 0x1f, 0x0f, 0xb7, 0xbb, 0xd6, 0xd8, - 0xee, 0x23, 0x74, 0x4b, 0x32, 0xe9, 0x23, 0xed, 0x56, 0x03, 0xfe, 0xb8, - 0xa6, 0xd1, 0x76, 0x6b, 0x8c, 0xed, 0x10, 0xfa, 0x5e, 0x52, 0xc3, 0xed, - 0xba, 0x30, 0x2e, 0xd0, 0x17, 0x11, 0x3a, 0x87, 0x1b, 0xd2, 0x58, 0xff, - 0xdf, 0x21, 0xdf, 0x35, 0xd3, 0xfd, 0x13, 0x7f, 0x77, 0x13, 0xa3, 0x03, - 0xf9, 0xae, 0x8c, 0xeb, 0xd5, 0xfb, 0xbf, 0x19, 0xde, 0xb7, 0xcd, 0xbf, - 0x4d, 0x6f, 0xf7, 0x4f, 0x66, 0x78, 0x1f, 0xd7, 0xdb, 0x25, 0x48, 0x7f, - 0xd1, 0x51, 0x38, 0x92, 0xc6, 0xfe, 0x2e, 0x6a, 0xbb, 0x9f, 0xb4, 0x1b, - 0xa3, 0xdf, 0x54, 0x14, 0x23, 0x14, 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0xdc, 0x04, 0xa1, 0x24, 0xc9, 0x7b, - 0x1d, 0xfc, 0xb1, 0x7b, 0xd0, 0x79, 0x87, 0x6c, 0x6b, 0x58, 0xfe, 0xe8, - 0xba, 0xbe, 0x3c, 0x26, 0x4d, 0x5b, 0x38, 0x0d, 0x87, 0x85, 0x95, 0x6e, - 0x96, 0x17, 0x77, 0x5d, 0x03, 0x8f, 0xd6, 0x82, 0x21, 0x66, 0xb7, 0xee, - 0xca, 0xfc, 0xf7, 0xf3, 0xab, 0x75, 0x7b, 0x77, 0x7b, 0x0f, 0x9a, 0x69, - 0x3d, 0xa8, 0x2a, 0xca, 0xcb, 0x8f, 0xad, 0x26, 0x17, 0xaf, 0x1a, 0x5f, - 0x31, 0x61, 0x88, 0xfd, 0x7f, 0x85, 0x3e, 0x6f, 0xfe, 0xf5, 0x3b, 0x75, - 0xbd, 0x23, 0xae, 0x3f, 0x23, 0xff, 0xd5, 0x17, 0x33, 0xb0, 0xbc, 0xc2, - 0x86, 0x3c, 0x53, 0xdc, 0xb7, 0x2d, 0xd0, 0xf2, 0x9e, 0x1d, 0x1d, 0x06, - 0xe6, 0x87, 0x2e, 0x78, 0x8d, 0x9a, 0x9f, 0xcc, 0xf1, 0x0f, 0xa3, 0xf6, - 0xf7, 0x66, 0xe0, 0xc9, 0x33, 0xda, 0xef, 0x34, 0x07, 0x6d, 0x59, 0xf7, - 0xee, 0xe7, 0xdd, 0x3f, 0x77, 0x26, 0xf3, 0xd8, 0x79, 0xe4, 0xbc, 0x68, - 0x7a, 0x4c, 0xfb, 0x9d, 0xd1, 0x7a, 0x74, 0x5b, 0x98, 0x9c, 0xa4, 0x47, - 0xb2, 0x5b, 0x95, 0x37, 0xef, 0xb9, 0x1e, 0xb1, 0x5b, 0x4b, 0xfa, 0xde, - 0x2c, 0xcc, 0x67, 0xe3, 0x67, 0xd3, 0x78, 0xf8, 0x19, 0x4b, 0xff, 0xb9, - 0x78, 0x88, 0x55, 0x86, 0x9c, 0x49, 0xf4, 0xe7, 0xf0, 0xfe, 0x3f, 0xc0, - 0x4d, 0xff, 0xaf, 0xc6, 0x8b, 0xe7, 0xb0, 0x6a, 0x44, 0x1f, 0x63, 0xe9, - 0x2d, 0x57, 0x4f, 0xcf, 0x91, 0x9e, 0x32, 0xea, 0xd0, 0x1b, 0xad, 0xa7, - 0xdc, 0x71, 0x25, 0xed, 0x5f, 0xae, 0x53, 0xce, 0xeb, 0x7d, 0xef, 0x7f, - 0xe6, 0x7d, 0xa3, 0x6f, 0x60, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const u8 usem_int_table_data_e2[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, - 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0x9f, 0xe3, 0x43, 0xe5, 0xdb, 0xf3, 0xa3, - 0xf2, 0x0d, 0x79, 0x51, 0xf9, 0x73, 0x79, 0x50, 0xf9, 0x65, 0x68, 0xfc, - 0x43, 0x68, 0xe6, 0x7d, 0x43, 0x93, 0xa7, 0x14, 0x07, 0x73, 0x30, 0x30, - 0xc4, 0x01, 0x71, 0x26, 0x07, 0xaa, 0xb8, 0x0a, 0x03, 0x84, 0x16, 0x86, - 0xd2, 0x2c, 0x40, 0xfa, 0x1a, 0x3b, 0x03, 0xc3, 0x6d, 0x20, 0xe3, 0x1d, - 0x88, 0xc3, 0x86, 0x69, 0xd6, 0x29, 0x19, 0xa0, 0x59, 0xf2, 0x0c, 0x0c, - 0x0b, 0x81, 0x74, 0x38, 0x10, 0x5b, 0x00, 0xd9, 0x89, 0x40, 0xfc, 0x12, - 0xc8, 0x16, 0x95, 0x65, 0x60, 0xd0, 0x00, 0xe2, 0xa9, 0x72, 0x40, 0x3b, - 0x81, 0xf4, 0x44, 0x20, 0x4e, 0x97, 0x85, 0xe8, 0xdb, 0x08, 0xa4, 0x0b, - 0xe4, 0xc8, 0x73, 0xbf, 0x9f, 0x08, 0x75, 0xc3, 0x63, 0x14, 0x93, 0x86, - 0x55, 0x55, 0x50, 0xf9, 0x86, 0xba, 0x0c, 0x0c, 0x25, 0x7a, 0x0c, 0x0c, - 0x47, 0xf5, 0x21, 0x7c, 0x49, 0x24, 0xf9, 0x87, 0x40, 0x31, 0x23, 0x5d, - 0x08, 0xfb, 0xa6, 0x1a, 0x03, 0x43, 0x34, 0x90, 0xcf, 0xab, 0x82, 0xdd, - 0xdc, 0x5b, 0x40, 0xf9, 0x18, 0xa0, 0xfc, 0x77, 0x7d, 0xfc, 0xf6, 0x5f, - 0x35, 0x46, 0xe5, 0x8b, 0xd9, 0xa2, 0xf2, 0x3b, 0xd1, 0xe4, 0x5d, 0xdd, - 0x51, 0xf9, 0xb7, 0x3d, 0x50, 0xf9, 0x37, 0x3c, 0x21, 0x34, 0x00, 0x93, - 0x28, 0xb9, 0x32, 0xd8, 0x03, 0x00, 0x00, 0x00 -}; - -static const u8 usem_pram_data_e2[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xdd, 0x7d, - 0x0b, 0x78, 0x54, 0xd5, 0xb9, 0xe8, 0xbf, 0x1f, 0xb3, 0xe7, 0x91, 0x99, - 0xc9, 0x24, 0x99, 0xe0, 0x04, 0x12, 0xd8, 0x81, 0x00, 0x69, 0x8b, 0xba, - 0x83, 0x01, 0x83, 0x22, 0xee, 0x84, 0x88, 0xe1, 0x48, 0x61, 0x78, 0xa8, - 0xb1, 0x87, 0x7a, 0x06, 0xb4, 0x16, 0x54, 0x64, 0xf0, 0x50, 0x4d, 0x3d, - 0x6a, 0x76, 0xc8, 0x13, 0x0c, 0x1a, 0xdf, 0x14, 0x50, 0x07, 0xaa, 0x16, - 0xbd, 0xb4, 0x46, 0xaf, 0x5a, 0x7b, 0xeb, 0x63, 0x02, 0xd4, 0xa3, 0xbd, - 0x1e, 0x8d, 0x1c, 0x54, 0x5a, 0xe9, 0xb9, 0x41, 0x2d, 0xed, 0xf5, 0x41, - 0xa3, 0x36, 0x4a, 0xcf, 0xa1, 0x7a, 0xd7, 0xff, 0xaf, 0xb5, 0x93, 0x3d, - 0x93, 0x99, 0x10, 0x4e, 0xdb, 0xcf, 0x7e, 0x17, 0xbf, 0x76, 0x65, 0xed, - 0xf5, 0xfa, 0xd7, 0xff, 0x5a, 0xff, 0xfa, 0xd7, 0xbf, 0xd6, 0x68, 0xd2, - 0x14, 0xd0, 0x27, 0x00, 0x7c, 0x89, 0xff, 0xce, 0x05, 0xe8, 0x93, 0x00, - 0x60, 0xc6, 0x50, 0x6a, 0xd5, 0x18, 0x49, 0xa8, 0x64, 0xe9, 0x4c, 0x30, - 0x9a, 0xd9, 0xa7, 0x1a, 0x25, 0xe6, 0xc5, 0xef, 0xfe, 0x50, 0xb7, 0x89, - 0x55, 0xc0, 0x9f, 0x80, 0xe8, 0xa9, 0x00, 0x8a, 0x3f, 0x66, 0xbd, 0x1a, - 0x06, 0xf0, 0x02, 0xf4, 0x2b, 0x79, 0x58, 0x00, 0x26, 0x8c, 0x01, 0x70, - 0xe3, 0x5f, 0x3a, 0x80, 0x1a, 0x8a, 0x99, 0xd8, 0x8f, 0xcf, 0x64, 0x75, - 0x2b, 0x00, 0x5c, 0xe1, 0x6e, 0x88, 0x4d, 0x63, 0x29, 0x6c, 0x0f, 0x1d, - 0xf9, 0x06, 0x80, 0xcc, 0x7a, 0xfa, 0xb2, 0x00, 0x2b, 0x5b, 0x00, 0x85, - 0x38, 0x6e, 0x9f, 0xa5, 0xa4, 0x8e, 0x1b, 0xa1, 0x71, 0x67, 0x77, 0x83, - 0x8a, 0xd5, 0x3c, 0x6c, 0xdc, 0x00, 0x8e, 0xab, 0x4b, 0x0b, 0xd9, 0xb8, - 0x85, 0x56, 0xea, 0xb8, 0x05, 0x83, 0xe3, 0xea, 0xd5, 0x38, 0xee, 0x18, - 0x1c, 0x97, 0x95, 0x57, 0x94, 0xc5, 0x4a, 0xb1, 0xff, 0x53, 0xc2, 0x56, - 0x93, 0xc2, 0xca, 0x8b, 0x66, 0x27, 0x24, 0x95, 0xa5, 0x01, 0x84, 0x23, - 0x87, 0xe0, 0x28, 0x73, 0xc2, 0x51, 0x16, 0x3b, 0xa3, 0xa3, 0x8f, 0xb5, - 0x1f, 0x80, 0x40, 0xd7, 0x26, 0x36, 0x4e, 0xb3, 0x0a, 0x34, 0x0f, 0xeb, - 0x50, 0x20, 0xf1, 0x10, 0x43, 0x40, 0xd3, 0x39, 0xf1, 0x07, 0xb0, 0x3c, - 0x60, 0xa9, 0xb0, 0xa1, 0x92, 0xc6, 0x2f, 0x57, 0x59, 0x7a, 0xbd, 0xf2, - 0x75, 0x63, 0x53, 0x29, 0xc0, 0xa6, 0x46, 0x80, 0xe4, 0x54, 0x80, 0x8e, - 0x46, 0x0f, 0xa5, 0x6d, 0x8d, 0x21, 0x48, 0x32, 0xa4, 0xb4, 0x34, 0x46, - 0x28, 0xbd, 0x37, 0xe7, 0xe6, 0x1f, 0xf5, 0xb1, 0x7e, 0x1b, 0x2c, 0x77, - 0xc8, 0xcd, 0x52, 0x35, 0xf6, 0xcf, 0x8f, 0x61, 0x7f, 0x6c, 0xce, 0x51, - 0x1c, 0x2f, 0x10, 0xe6, 0xfd, 0x83, 0xea, 0x09, 0x3d, 0x14, 0xc2, 0x3c, - 0x98, 0xdd, 0x0c, 0x6f, 0x81, 0x32, 0x9e, 0xb6, 0x81, 0x44, 0x74, 0xba, - 0x00, 0x7c, 0x94, 0xae, 0xc5, 0x7c, 0x21, 0x4e, 0x3d, 0xe9, 0x41, 0xba, - 0x34, 0x1b, 0x4b, 0x72, 0xc1, 0x3f, 0x44, 0xdf, 0xf4, 0x34, 0xa7, 0x5c, - 0x86, 0x64, 0x39, 0xc1, 0x0d, 0x5f, 0xb2, 0xff, 0x79, 0x75, 0x1f, 0x6b, - 0x39, 0x94, 0x77, 0x47, 0xf2, 0x53, 0xf2, 0xae, 0xd0, 0xd8, 0x94, 0xfa, - 0x00, 0xc5, 0x84, 0x37, 0xca, 0x2b, 0x00, 0x25, 0xc8, 0x14, 0x6c, 0xfc, - 0x80, 0xda, 0x0b, 0x06, 0xc2, 0xc9, 0xf0, 0xd5, 0x9d, 0x61, 0xfc, 0xb3, - 0x41, 0xa1, 0x7a, 0x8a, 0x52, 0xd1, 0x9f, 0x64, 0xf3, 0xf3, 0x9f, 0xa9, - 0x19, 0x3b, 0x59, 0xd3, 0xcd, 0x12, 0xd4, 0xe3, 0xbc, 0xec, 0x7a, 0xaf, - 0x22, 0x45, 0xd8, 0xbc, 0x0e, 0x83, 0x87, 0xea, 0x87, 0xa1, 0x7f, 0xef, - 0x97, 0x88, 0x17, 0x43, 0x4e, 0x6c, 0x62, 0x63, 0xf9, 0x2a, 0x26, 0x76, - 0x27, 0xc3, 0xc8, 0xab, 0x9a, 0x31, 0x99, 0xd1, 0xd1, 0xe7, 0x4a, 0x84, - 0xf2, 0xa7, 0x0d, 0x1f, 0x0f, 0x2a, 0xd5, 0x0f, 0xfb, 0x6c, 0xb8, 0x27, - 0x7e, 0xf5, 0xf8, 0x51, 0x94, 0x9e, 0x78, 0x34, 0xc3, 0xb8, 0x8f, 0x08, - 0xfa, 0x9d, 0x7b, 0xfc, 0x35, 0x0f, 0xf2, 0xb7, 0xa7, 0x42, 0x8e, 0x26, - 0xa6, 0x21, 0xbc, 0x56, 0x94, 0x4d, 0x1e, 0x3a, 0x75, 0x55, 0xc6, 0x79, - 0x7f, 0x75, 0x70, 0x8f, 0x4c, 0xaf, 0x7b, 0x90, 0x5e, 0x85, 0x48, 0x5f, - 0x0f, 0xd1, 0x4d, 0x45, 0x7a, 0x55, 0x0e, 0xd1, 0xab, 0xc3, 0x60, 0xf4, - 0x42, 0xf9, 0xa9, 0xe4, 0xf4, 0xea, 0x50, 0x2d, 0xcf, 0x68, 0xe8, 0xf5, - 0x4f, 0xf8, 0xc7, 0x8c, 0x21, 0xbc, 0xe4, 0x0c, 0xe2, 0xa5, 0x9b, 0xe3, - 0x65, 0xda, 0x57, 0x8c, 0x97, 0xe6, 0x3d, 0xf5, 0xd1, 0x0c, 0xf3, 0x38, - 0x5b, 0xc8, 0xa7, 0x0a, 0x86, 0x51, 0x4e, 0x78, 0xd0, 0x74, 0x84, 0xb3, - 0xb3, 0x89, 0xf3, 0xad, 0xc5, 0xf8, 0xf6, 0x21, 0x3d, 0x3b, 0xbc, 0xe9, - 0x78, 0x50, 0x72, 0x0f, 0x45, 0x50, 0x6f, 0xa6, 0xe3, 0x3d, 0x47, 0xe2, - 0x7c, 0x73, 0x4c, 0xe0, 0xdd, 0xc6, 0xd3, 0x46, 0x43, 0xae, 0x4b, 0xf8, - 0x11, 0x4f, 0x5d, 0x75, 0xa8, 0xb7, 0x3a, 0xcb, 0x64, 0x19, 0xf5, 0xd2, - 0x57, 0x85, 0x27, 0x1b, 0xae, 0x4d, 0x83, 0x70, 0x25, 0x38, 0x5c, 0xe5, - 0x5f, 0x2d, 0x5c, 0x4a, 0x4e, 0xb2, 0x3e, 0x93, 0x3c, 0xda, 0xf4, 0xb3, - 0xe1, 0xbe, 0x05, 0xe1, 0xe6, 0x7c, 0x57, 0xc7, 0xf9, 0x4e, 0xfe, 0x4a, - 0xf9, 0xce, 0x86, 0xcb, 0x8b, 0xf2, 0xc0, 0xe9, 0x1c, 0xe5, 0x74, 0x56, - 0xff, 0x2e, 0xe8, 0xdc, 0x36, 0x48, 0xe7, 0x18, 0xa7, 0x73, 0xe4, 0xab, - 0xa1, 0xb3, 0xbd, 0x9e, 0x83, 0xc7, 0xa8, 0x47, 0xba, 0xad, 0x0a, 0x31, - 0x39, 0x64, 0x70, 0x5c, 0xa5, 0x58, 0xda, 0x0a, 0x5c, 0x5f, 0x73, 0x24, - 0x78, 0xc8, 0x60, 0x7c, 0x80, 0xf0, 0x17, 0x01, 0xb4, 0xfa, 0x37, 0xbc, - 0xa9, 0xeb, 0x00, 0xf3, 0x25, 0x2f, 0xd1, 0x1f, 0x94, 0xe5, 0xb9, 0x31, - 0x07, 0xbc, 0xab, 0x98, 0x11, 0x12, 0x9a, 0x8e, 0xdf, 0x3b, 0xa7, 0xc4, - 0x46, 0x98, 0x07, 0x24, 0x5c, 0xfd, 0x7d, 0x36, 0x9c, 0x4c, 0x7e, 0x1b, - 0x0e, 0x1d, 0x6e, 0xdb, 0xe7, 0x80, 0x7b, 0xba, 0x14, 0x08, 0xa3, 0xfd, - 0x03, 0x67, 0xc2, 0x99, 0x08, 0xe7, 0x27, 0xfe, 0x25, 0xb9, 0x49, 0xc8, - 0xde, 0xdf, 0xfb, 0x8d, 0x9e, 0x26, 0xd5, 0x05, 0xf0, 0x79, 0x63, 0x5f, - 0xdb, 0xbe, 0xc9, 0xc3, 0xcb, 0xaf, 0x52, 0x20, 0xde, 0x9d, 0x41, 0x0f, - 0x45, 0x25, 0xae, 0x17, 0xc0, 0xd3, 0xad, 0xd1, 0xfc, 0x6f, 0x64, 0x32, - 0x58, 0x81, 0x78, 0x98, 0x52, 0x0b, 0x41, 0x46, 0x0f, 0xff, 0x86, 0x31, - 0x38, 0x0f, 0xf0, 0xb3, 0xc2, 0x59, 0xac, 0x9f, 0x5d, 0xde, 0x26, 0xd5, - 0x01, 0x67, 0xb6, 0xf9, 0x0c, 0xe2, 0xd5, 0x6e, 0xc7, 0xcc, 0x1d, 0x77, - 0xfe, 0xf0, 0xf6, 0xd9, 0xda, 0x3d, 0x26, 0xc5, 0x96, 0x49, 0x2c, 0x6d, - 0x0d, 0xcb, 0xb5, 0x08, 0x97, 0x56, 0x0c, 0x09, 0xa4, 0x81, 0xba, 0x7b, - 0xb1, 0x35, 0x16, 0xb2, 0xc3, 0xdb, 0x1a, 0xfe, 0xeb, 0xc0, 0x9b, 0x95, - 0x6e, 0xa2, 0xde, 0x27, 0xfe, 0x0d, 0x6d, 0xc0, 0xda, 0x35, 0xbb, 0x8c, - 0x97, 0x74, 0xc6, 0x27, 0x2d, 0x85, 0xb2, 0xb1, 0x01, 0x86, 0xe0, 0xb0, - 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0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x0003d000, + 0x0000003d, 0x00000001, 0x000d0000, 0x000700d0, 0x00028140, 0x000b8168, + 0x00020220, 0x00010240, 0x000f0250, 0x00010340, 0x000c0000, 0x000800c0, + 0x00028140, 0x000b8168, 0x00020220, 0x00010240, 0x00070250, 0x000202c0, + 0x00100000, 0x00080100, 0x00028180, 0x000b81a8, 0x00020260, 0x00018280, + 0x000e8298, 0x00080380, 0x000f0000, 0x000100f0, 0x00028100, 0x00090128, + 0x000201b8, 0x000101d8, 0x000e01e8, 0x000002c8, 0xfffffff3, 0x01afffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xfffffff1, 0x00efffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00010000, 0x00000000, 0xfffffff6, 0x005fffff, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, 0x00000000, 0xfffff406, 0x1cbfffff, + 0x00000005, 0x00000000, 0x00000014, 0x00000000, 0x00040000, 0x00000000, + 0xfffffff2, 0x004fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00080000, 0x00000000, 0xfffffffa, 0x002fffff, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0xfffffff7, 0x01efffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000000, + 0xfffffff5, 0x002fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00400000, 0x00000000, 0xfffffff3, 0x018fffff, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffff1, 0x010fffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000, + 0xfffffff6, 0x005fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00020000, 0x00000000, 0xfffff406, 0x1cbfffff, 0x00000005, 0x00000000, + 0x00000014, 0x00000000, 0x00040000, 0x00000000, 0xfffffff2, 0x004fffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, + 0xfffffffa, 0x002fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00100000, 0x00000000, 0xfffffff7, 0x00efffff, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00200000, 0x00000000, 0xfffffff5, 0x004fffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00000000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00010000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00020000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00040000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00080000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00100000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00200000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00400000, 0x00000000, 0xfffffff3, 0x020fffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xfffffff1, 0x010fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00010000, 0x00000000, 0xfffffff6, 0x005fffff, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, 0x00000000, 0xfffff406, 0x1cbfffff, + 0x00000005, 0x00000000, 0x00000014, 0x00000000, 0x00040000, 0x00000000, + 0xfffffff2, 0x004fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00080000, 0x00000000, 0xffffff8a, 0x042fffff, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0xffffff97, 0x05cfffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000000, + 0xfffffff5, 0x010fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00400000, 0x00000000, 0xfffffff3, 0x01efffff, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffff1, 0x002fffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000, + 0xfffffff6, 0x005fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00020000, 0x00000000, 0xffffff06, 0x1cbfffff, 0x00000000, 0x00000000, + 0x00000014, 0x00000000, 0x00040000, 0x00000000, 0xfffffff2, 0x004fffff, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, + 0xfffffffa, 0x002fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00100000, 0x00000000, 0xfffffff7, 0x01cfffff, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00200000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00400000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00000000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00010000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00020000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00040000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00080000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00100000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00200000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00400000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00000000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00010000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00020000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00040000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00080000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00100000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00200000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00400000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00010000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00020000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00040000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00080000, 0x00000000, + 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, 0x000000cc, 0x00000000, + 0x00100000, 0x00000000, 0xffffffff, 0x00cfffff, 0x00000000, 0x00000000, + 0x000000cc, 0x00000000, 0x00200000, 0x00000000, 0xffffffff, 0x00cfffff, + 0x00000000, 0x00000000, 0x000000cc, 0x00000000, 0x00400000, 0x00000000, + 0x00000032, 0x00000032, 0x00000211, 0x00000200, 0x00000204, 0x0000ffff, + 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x00000000, 0x00000037, 0x00000021, + 0x00000020, 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0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 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0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, 0x0000ff1c, 0x0fffffff, + 0x0000ff1c, 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0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000003, + 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, + 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, + 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, + 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, + 0x00bebc20, 0x00000000, 0x00000005, 0x00000003, 0x00bebc20, 0x00000000, + 0x00000005, 0x0000000d, 0x0000000c, 0x00000000, 0x00000010, 0x0000000f, + 0x00000000, 0x00000000, 0x00000000, 0x02150020, 0x02150020, 0x00000030, + 0x08100000, 0x00000036, 0x00000030, 0x00000031, 0x00000003, 0x00000000, + 0x00000001, 0x00000003, 0x00000001, 0x00000002, 0x00000040, 0x00000040, + 0x00000004, 0x00000020, 0x0000000f, 0x0000001b, 0x00008000, 0x000103c0, + 0x00018780, 0x00020b40, 0x00028f00, 0x000312c0, 0x00039680, 0x00041a40, + 0x00049e00, 0x000521c0, 0x0005a580, 0x00062940, 0x0006ad00, 0x000730c0, + 0x0007b480, 0x00083840, 0x0008bc00, 0x00093fc0, 0x0009c380, 0x000a4740, + 0x000acb00, 0x000b4ec0, 0x000bd280, 0x000c5640, 0x000cda00, 0x000d5dc0, + 0x00006180, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x0000050e, 0x000004fd, 0x00000501, 0x0000051e, 0x0000ffff, 0x0000ffff, + 0x0000ffff, 0x0000ffff, 0x00000046, 0x0000000c, 0x00000000, 0x00000000, + 0x0000001c, 0x000000f4, 0x00000001, 0x00000000, 0x00000000, 0x00000000, + 0x00000001, 0x00000001, 0x07ffffff, 0x0000007f, 0x07ffffff, 0x0000003f, + 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x00007ff8, 0x00007ff8, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0x00001900, 0x00000000, 0x00000001, 0x00000000, + 0x00000000, 0x00000000, 0x000001c4, 0x00003500, 0x00000001, 0x00000002, + 0x00000003, 0x00000000, 0x00000004, 0x00000001, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, 0x00000001, + 0x00000004, 0x00000000, 0x00000004, 0x00000003, 0x00000000, 0x00000000, + 0x00007fff, 0x000003ff, 0x00000000, 0x03938700, 0x00000000, 0x00000000, + 0x00000000, 0x03938700, 0x00000000, 0x00000000, 0x0000000f, 0x00000007, + 0x00000000, 0x0000000e, 0x0000000e, 0x00000000, 0x00000000, 0x00000000, + 0x03150020, 0x03150020, 0x01000030, 0x08100000, 0x00000036, 0x00000030, + 0x00000031, 0x00000002, 0x00000005, 0x00000002, 0x00000002, 0x00000000, + 0x00000005, 0x00000003, 0x00000001, 0x00000004, 0x00000001, 0x00000002, + 0x00000040, 0x00000040, 0x00000004, 0x00000020, 0x00000002, 0x00000020, + 0x00001000, 0x00002080, 0x00003100, 0x00004180, 0x00005200, 0x00006280, + 0x00007300, 0x00008380, 0x00009400, 0x0000a480, 0x0000b500, 0x0000c580, + 0x0000d600, 0x0000e680, 0x0000f700, 0x00010780, 0x00011800, 0x00012880, + 0x00013900, 0x00014980, 0x00015a00, 0x00016a80, 0x00017b00, 0x00018b80, + 0x00019c00, 0x0001ac80, 0x0001bd00, 0x0001cd80, 0x0001de00, 0x0001ee80, + 0x0001ff00, 0x00000f80, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00001214, 0x00001200, + 0x00001204, 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x00000020, + 0x00000038, 0x00000000, 0x00000000, 0x00000023, 0x00000024, 0x00000025, + 0x00000026, 0x00000027, 0x00000039, 0x0000003a, 0x0000002b, 0x0000002c, + 0x00000000, 0x000000ec, 0x00000000, 0x00000029, 0x0000002a, 0x00000001, + 0x00000001, 0x00000001, 0x00000001, 0x00000000, 0x00000000, 0x00000000, + 0x00000001, 0x07ffffff, 0x0000007f, 0x07ffffff, 0x0000003f, 0x0000ffff, + 0x0000ffff, 0x0000ffff, 0x0000ffff, 0x00007ff8, 0x00007ff8, 0x00000000, + 0x00000001, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, + 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, + 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xcccc0201, 0xcccccccc, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0x00000000, 0x00010001, 0x00350207, 0xccccccc9, 0x10000000, + 0x000028ad, 0x00002918, 0x00002919, 0x00000000, 0x00000000, 0x00000005, + 0x00000006, 0x7058103c, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, 0x00000000, 0x0000ff00, + 0x00000000, 0x0000ff00, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000ffff, + 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0x0000ffff, 0x00000000, 0x03231303, + 0x13032313, 0x03030323, 0xa0b09043, 0x02000200, 0x06040604, 0x03231303, + 0x13032313, 0x03030323, 0xa0b09043, 0x13131313, 0x13131313, 0x13131313, + 0xa0b09043, 0x03010200, 0x00000000, 0x0000054b, 0x00003500, 0x00000001, + 0x00000002, 0x00000003, 0x00000000, 0x00000004, 0x00000001, 0x00000000, + 0x00000001, 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, + 0x00000001, 0x00000004, 0x00000000, 0x00000001, 0x00000003, 0x00000000, + 0x00000001, 0x00000004, 0x00000000, 0x00000004, 0x00000003, 0x00000000, + 0x00000000, 0x00007fff, 0x000003ff, 0x002625a0, 0x00000000, 0x002625a0, + 0x00000000, 0x002625a0, 0x00000000, 0x002625a0, 0x00000000, 0x000e0000, + 0x011600d6, 0x002625a0, 0x00000000, 0x002625a0, 0x00000000, 0x002625a0, + 0x00000000, 0x002625a0, 0x00000000, 0x00720000, 0x012300f3, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff, + 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x0000ffff, + 0x00000000, 0x55540000, 0x55555555, 0x00005555, 0xf0000000, 0x55540000, + 0x55555555, 0x00005555, 0xf0000000, 0x00000000, 0x00010000, 0x00005014, + 0x00000000, 0xfff55fff, 0x0000ffff, 0xf00003e0, 0x00000000, 0x0000a000, + 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000000, + 0x00000000, 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, + 0x00010000, 0xff5c0000, 0xfff55fff, 0x0000ffff, 0xf00003e0, 0x00000000, + 0x0000a000, 0x00000800, 0x00000000, 0x00000000, 0x00000000, 0x00002000, + 0x00000000, 0x00000000, 0x00000000, 0x00008000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, }; static const u8 csem_int_table_data_e2[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x4b, 0xe7, - 0x67, 0x60, 0xf8, 0x51, 0x8f, 0x84, 0xf9, 0xd0, 0xf8, 0x34, 0xc6, 0xe7, - 0x99, 0x18, 0x18, 0xfe, 0x32, 0x51, 0x6e, 0xce, 0x7c, 0x5e, 0x54, 0x7e, - 0x1c, 0x07, 0x03, 0xc3, 0x3e, 0x6e, 0x06, 0x86, 0x33, 0xec, 0x0c, 0x0c, - 0x3b, 0xd8, 0x18, 0x18, 0x66, 0x02, 0x69, 0x29, 0xa0, 0x1a, 0x3f, 0x56, - 0x06, 0x86, 0x44, 0x20, 0x5e, 0xc7, 0x01, 0x51, 0xb7, 0x44, 0x00, 0xa1, - 0x47, 0x17, 0xc8, 0x16, 0x00, 0x62, 0x4b, 0x01, 0xca, 0xdd, 0x33, 0x8a, - 0x87, 0x26, 0x7e, 0x22, 0xcc, 0xc0, 0xf0, 0x4b, 0x04, 0xc1, 0x9f, 0x26, - 0x8a, 0x2a, 0xff, 0x54, 0x18, 0xc1, 0xbe, 0x20, 0x49, 0x99, 0x5d, 0xcf, - 0x80, 0xfa, 0x01, 0x22, 0x3d, 0x7c, 0xd0, 0x80, 0x03, 0x00, 0x00, 0x00 -}; + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x53, 0xe6, + 0x67, 0x60, 0xf8, 0x51, 0x8f, 0xc0, 0xb5, 0x7c, 0xa8, 0x7c, 0x42, 0xf8, + 0x31, 0x89, 0xea, 0xd1, 0xf1, 0x43, 0x26, 0x06, 0x06, 0x3e, 0x66, 0xca, + 0xcc, 0x00, 0xe1, 0x22, 0x5e, 0x54, 0x7e, 0x28, 0x3b, 0x03, 0x83, 0x0d, + 0x37, 0x03, 0xc3, 0x26, 0x36, 0x06, 0x86, 0x1c, 0x20, 0xb6, 0x06, 0xe2, + 0xeb, 0x3c, 0x08, 0xf9, 0x79, 0xec, 0x10, 0x3a, 0x51, 0x10, 0x21, 0xb6, + 0x97, 0x9f, 0x72, 0x77, 0x8c, 0xe2, 0xa1, 0x8d, 0x2f, 0x88, 0x30, 0x30, + 0x5c, 0x12, 0x45, 0xf0, 0x53, 0xc5, 0x50, 0xe5, 0x2f, 0x8a, 0x20, 0xd8, + 0xf1, 0x52, 0x94, 0xd9, 0x55, 0x00, 0xd4, 0x0f, 0x00, 0xb8, 0x33, 0x81, + 0x16, 0x80, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, }; static const u8 csem_pram_data_e2[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xd5, 0x7d, - 0x0d, 0x7c, 0x54, 0xd5, 0x95, 0xf8, 0x79, 0x33, 0x6f, 0xde, 0xbc, 0xf9, - 0x4a, 0x5e, 0xbe, 0x60, 0x02, 0x09, 0xbe, 0x84, 0x04, 0x02, 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0xb5, + 0x27, 0x83, 0xd1, 0x4c, 0x86, 0x6d, 0x7c, 0x28, 0x7c, 0x23, 0xa9, 0xa1, + 0xb0, 0xc7, 0x96, 0xf1, 0xa1, 0x4b, 0x94, 0x6a, 0xf6, 0xc6, 0xbf, 0x28, + 0x7d, 0x6c, 0xf0, 0xa1, 0x85, 0x47, 0x1c, 0x8c, 0x4e, 0x0f, 0xe7, 0xd1, + 0x25, 0x78, 0x4c, 0x21, 0xbb, 0x3b, 0x1a, 0xb4, 0x6e, 0x73, 0x5f, 0x5c, + 0x87, 0x33, 0x46, 0xd7, 0x76, 0xd1, 0x79, 0x6e, 0xc8, 0x17, 0x7a, 0xc5, + 0x97, 0x22, 0xe4, 0x2f, 0x72, 0x16, 0x38, 0x8f, 0x66, 0xed, 0x6f, 0xbc, + 0xad, 0x83, 0xcf, 0x91, 0xaa, 0x69, 0x99, 0x74, 0xaf, 0xb1, 0xf3, 0x70, + 0x23, 0xb7, 0xf7, 0x63, 0xf4, 0xca, 0xf5, 0x55, 0x59, 0xe6, 0x7b, 0x1f, + 0xe3, 0x7b, 0x48, 0xbf, 0x6b, 0x6d, 0x41, 0x3e, 0xa7, 0xa7, 0x41, 0x8c, + 0x1f, 0x0b, 0xe1, 0x5e, 0xcf, 0x39, 0x2e, 0xbf, 0x48, 0xdc, 0xc3, 0x9b, + 0xe7, 0xed, 0xb2, 0x87, 0xd8, 0x5e, 0x77, 0xdd, 0x87, 0x82, 0x8c, 0xfb, + 0xd2, 0xf3, 0xc5, 0xf7, 0xbf, 0xc7, 0xb5, 0x4a, 0xf0, 0x47, 0x54, 0x9a, + 0xbe, 0x12, 0x71, 0x1e, 0x9c, 0x5f, 0xe1, 0x7b, 0x14, 0x73, 0xfe, 0x71, + 0x10, 0x62, 0xfe, 0x41, 0xb5, 0x96, 0xf9, 0xdb, 0x3c, 0x7a, 0x4f, 0x32, + 0xf9, 0x33, 0x45, 0x25, 0x7a, 0x48, 0x61, 0x8f, 0xfc, 0x4d, 0xca, 0x95, + 0xd3, 0xad, 0xcb, 0x03, 0xbc, 0xdf, 0xb4, 0x7b, 0x22, 0xe7, 0x7e, 0x30, + 0x32, 0x7a, 0xdf, 0xe4, 0x6b, 0xcf, 0xe5, 0xfc, 0xeb, 0x1a, 0x49, 0x8e, + 0x28, 0x74, 0x5f, 0xe3, 0x2a, 0x10, 0x75, 0xc0, 0x61, 0x08, 0x91, 0x5f, + 0x8e, 0xea, 0x3c, 0xee, 0xfb, 0xa1, 0xb3, 0xf3, 0x67, 0xce, 0xcc, 0xa7, + 0x7d, 0x04, 0xc4, 0xdf, 0x89, 0x4a, 0xac, 0xaf, 0xdc, 0x16, 0xdc, 0xc4, + 0xf5, 0x32, 0x73, 0xac, 0xfa, 0x99, 0x02, 0x80, 0xd3, 0x9e, 0xe8, 0x3d, + 0xbf, 0xbd, 0x58, 0xd4, 0xd3, 0xd8, 0xe9, 0x9e, 0x5d, 0xe5, 0x7a, 0xcf, + 0x0a, 0xc2, 0xed, 0xc5, 0x9c, 0xc0, 0xcc, 0xfc, 0x51, 0x5c, 0xf7, 0x39, + 0x88, 0x27, 0xb3, 0x05, 0x47, 0x89, 0xbf, 0x4f, 0x24, 0xf0, 0x9c, 0x02, + 0xfa, 0x18, 0xa2, 0xf3, 0x85, 0xa4, 0x42, 0xde, 0xaf, 0x55, 0x6f, 0xf4, + 0x48, 0x72, 0x21, 0xef, 0xb7, 0x73, 0x12, 0x84, 0xa4, 0xf1, 0x3d, 0xef, + 0xf1, 0x53, 0x9c, 0xa1, 0x6a, 0xa6, 0x23, 0xd5, 0x03, 0x8d, 0xed, 0xed, + 0x5e, 0x5f, 0xd4, 0x0b, 0xa3, 0x54, 0x69, 0x54, 0x67, 0x04, 0x8f, 0x4d, + 0xd6, 0x68, 0xfe, 0x16, 0xb3, 0x5e, 0x36, 0xb1, 0xfe, 0xf9, 0x42, 0x92, + 0xa8, 0x0f, 0xb2, 0xea, 0x0a, 0x1e, 0x49, 0x7e, 0x81, 0xeb, 0x49, 0xad, + 0x3a, 0x02, 0x3a, 0xef, 0x04, 0xeb, 0xbc, 0xf2, 0x95, 0xd4, 0x15, 0x18, + 0xf6, 0xab, 0x8a, 0xa2, 0x75, 0xaf, 0x48, 0x87, 0xa5, 0x26, 0x1d, 0xb8, + 0xfe, 0x15, 0x2d, 0xe4, 0x20, 0x41, 0x87, 0x30, 0xc7, 0xfb, 0x29, 0xba, + 0xf8, 0x5e, 0xae, 0x8a, 0x7c, 0xb2, 0x89, 0xb8, 0x37, 0xe2, 0x24, 0x1d, + 0xa9, 0x23, 0x9f, 0x4a, 0xa3, 0x7c, 0xa2, 0xfa, 0x6e, 0xd2, 0x1b, 0xcb, + 0x27, 0x5b, 0x72, 0x1c, 0xda, 0xc6, 0xf5, 0x91, 0x48, 0x07, 0x6a, 0x5b, + 0xe7, 0x4d, 0x3c, 0xdf, 0xff, 0x05, 0x08, 0x61, 0x9e, 0xb3, 0x60, 0x54, + 0x00, 0x00, 0x00, 0x00, }; + +static const u8 tsem_int_table_data_e2[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, + 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0x4f, 0x17, 0x45, 0xe5, 0x9b, 0x72, 0xa3, + 0xf2, 0xd1, 0xf1, 0x09, 0x1e, 0xfc, 0xf2, 0x84, 0x30, 0x0b, 0x03, 0x65, + 0xfa, 0x0f, 0x71, 0x30, 0x30, 0x9c, 0x02, 0xe2, 0x7b, 0x1c, 0x68, 0xee, + 0x66, 0x82, 0xd0, 0x69, 0x40, 0xf1, 0x24, 0x76, 0x06, 0x06, 0x23, 0x20, + 0x7d, 0x96, 0x15, 0x21, 0x1f, 0x0f, 0xb5, 0x57, 0x4c, 0x1b, 0x21, 0x36, + 0x4f, 0x83, 0x81, 0xe1, 0x96, 0x2a, 0x84, 0xcd, 0xa7, 0x46, 0x99, 0xbb, + 0x46, 0xf1, 0xd0, 0xc0, 0xbe, 0xe6, 0xa8, 0x7c, 0x7f, 0x53, 0x08, 0x7d, + 0xda, 0x0c, 0x42, 0xfb, 0xa1, 0xc9, 0x07, 0x40, 0xe5, 0xff, 0x1a, 0x42, + 0xd5, 0x9b, 0x63, 0x37, 0xf7, 0x9f, 0x21, 0x71, 0xf6, 0x4b, 0xd9, 0xa1, + 0xf2, 0x17, 0xda, 0xe2, 0x57, 0x3f, 0xcb, 0x09, 0x42, 0x03, 0x00, 0x8a, + 0x23, 0xe4, 0x01, 0xb8, 0x03, 0x00, 0x00, 0x00, }; + +static const u8 tsem_pram_data_e2[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xd5, 0x7d, + 0x0d, 0x78, 0x54, 0xd5, 0x99, 0xf0, 0xb9, 0x77, 0xee, 0xcc, 0xdc, 0x99, + 0xdc, 0x99, 0xdc, 0xc0, 0x24, 0x4c, 0x60, 0x80, 0x99, 0x90, 0x48, 0xd0, + 0x88, 0x13, 0x0c, 0x18, 0x15, 0xeb, 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0xf5, 0x21, 0xd5, 0x39, 0xf2, 0x16, 0x53, 0x68, 0xf3, 0xf8, 0xf7, 0x57, + 0x9d, 0xfd, 0x6e, 0x4f, 0xcb, 0x3e, 0x1a, 0x5f, 0x9f, 0xdd, 0x04, 0x2a, + 0xea, 0x0f, 0x54, 0x6a, 0x3e, 0x1d, 0xc7, 0xcd, 0x73, 0xbe, 0x6f, 0xf9, + 0x55, 0x18, 0x26, 0xfc, 0x77, 0x47, 0x62, 0x03, 0x94, 0xbf, 0xae, 0x19, + 0x4f, 0x97, 0xb6, 0x5d, 0x92, 0x7b, 0x7f, 0x77, 0x64, 0x45, 0x09, 0xb0, + 0x7c, 0xa2, 0x6d, 0xda, 0x78, 0xb4, 0xdd, 0xc9, 0x5f, 0xdd, 0x71, 0xdb, + 0xf7, 0x0b, 0x3a, 0xd9, 0xa5, 0xb5, 0x36, 0x60, 0xd7, 0xa2, 0xaa, 0xed, + 0x52, 0x52, 0x2e, 0x56, 0xaf, 0xfd, 0x31, 0xa1, 0xe6, 0xd9, 0x79, 0xa0, + 0x52, 0x80, 0xac, 0x87, 0xaf, 0xc8, 0x8f, 0x85, 0x84, 0x8b, 0x1c, 0x6b, + 0x28, 0x2f, 0xf6, 0x9d, 0x65, 0x12, 0x07, 0xf9, 0xcd, 0x8b, 0x24, 0x4f, + 0x1e, 0xb4, 0xbd, 0xc4, 0xac, 0xd2, 0xe8, 0x9e, 0xce, 0x5f, 0x9c, 0x0f, + 0xa7, 0x12, 0x01, 0xbe, 0xbf, 0x29, 0xf8, 0xe2, 0xf2, 0x70, 0x27, 0xd9, + 0x9f, 0x27, 0x0f, 0xeb, 0x71, 0xbe, 0xbf, 0x4d, 0x7e, 0x77, 0xab, 0x56, + 0x07, 0xf8, 0x77, 0xb7, 0x0e, 0x85, 0xfc, 0xcb, 0x69, 0x07, 0xb7, 0x9c, + 0x9e, 0x82, 0xef, 0x6d, 0xd5, 0xf9, 0xdf, 0xd3, 0xae, 0x4a, 0x24, 0xdf, + 0x23, 0xbf, 0x5e, 0x12, 0x5d, 0x59, 0xbe, 0x41, 0x9d, 0xfa, 0x9e, 0x62, + 0xdc, 0xd0, 0x3f, 0x48, 0xb0, 0x75, 0xf0, 0x3c, 0x42, 0xb0, 0x7c, 0x30, + 0x41, 0x3c, 0x13, 0xb4, 0x11, 0x1d, 0x71, 0xc6, 0xda, 0x42, 0xa3, 0x6f, + 0xb8, 0x72, 0xc1, 0x77, 0x57, 0xf0, 0xe6, 0x1d, 0xe2, 0xf9, 0xf2, 0x67, + 0x09, 0x9f, 0xc3, 0xaf, 0x82, 0xba, 0x56, 0x47, 0xff, 0x56, 0x56, 0x8c, + 0xf7, 0x05, 0xf6, 0x13, 0x9a, 0x59, 0x1d, 0x76, 0x80, 0x78, 0xe8, 0x27, + 0x9e, 0x9e, 0x05, 0xaa, 0xb3, 0xcb, 0xb3, 0xff, 0x61, 0x7c, 0x2c, 0xdf, + 0xa9, 0x0b, 0xc4, 0xc7, 0x1a, 0x87, 0xc7, 0x2e, 0x1f, 0x33, 0x2d, 0x31, + 0xe6, 0x1f, 0x0a, 0xcf, 0x23, 0xd3, 0x62, 0xb0, 0xfc, 0x26, 0xd3, 0xfb, + 0xf1, 0x2b, 0x13, 0x38, 0xee, 0x5c, 0x8b, 0x60, 0x8b, 0xbe, 0x0b, 0xf3, + 0x32, 0xd3, 0xeb, 0xf0, 0xb2, 0x85, 0xfb, 0xa7, 0xa9, 0xf8, 0x38, 0x4a, + 0x7c, 0xbc, 0x62, 0x3a, 0x3e, 0xf2, 0xfd, 0xd8, 0xf4, 0x27, 0xee, 0x5b, + 0x59, 0xbf, 0xc0, 0x87, 0x19, 0x18, 0xcc, 0xcd, 0xf2, 0x7b, 0x60, 0x59, + 0x4f, 0xe9, 0xb4, 0x9f, 0xb9, 0x92, 0x12, 0xa7, 0xba, 0xad, 0x3b, 0xda, + 0xb0, 0xa2, 0xd3, 0xe3, 0x5f, 0xfb, 0xaf, 0x32, 0xa2, 0xad, 0xf3, 0x59, + 0xbf, 0x8f, 0xfc, 0xe5, 0x5c, 0x95, 0xdb, 0x21, 0xf3, 0x34, 0x54, 0xa7, + 0xb4, 0x56, 0xf4, 0xf7, 0x78, 0xf2, 0x8c, 0xaf, 0xb4, 0xf2, 0x38, 0xd8, + 0xd7, 0xba, 0x62, 0x5a, 0xfb, 0xdb, 0x91, 0x4e, 0x8e, 0x90, 0x7f, 0x7e, + 0x24, 0xad, 0x8f, 0x14, 0xf3, 0xd3, 0x41, 0xe7, 0x1e, 0xa6, 0xef, 0xea, + 0x2d, 0x40, 0xf7, 0x6c, 0x7b, 0xaf, 0xde, 0xc2, 0xfc, 0x6e, 0xf7, 0xa2, + 0xba, 0x18, 0xc5, 0xc7, 0x44, 0x6b, 0x3e, 0x6f, 0x8f, 0x2d, 0xda, 0x1c, + 0x19, 0xc3, 0xf1, 0x0f, 0x45, 0x77, 0x44, 0x08, 0xef, 0xee, 0x63, 0x0f, + 0xb0, 0xf3, 0x9a, 0xd4, 0xe7, 0xec, 0x13, 0xfd, 0x9d, 0x2e, 0x90, 0xdf, + 0xec, 0xe6, 0xfe, 0xbb, 0xec, 0xea, 0x07, 0x23, 0x1b, 0x42, 0xe7, 0xeb, + 0x9b, 0x3c, 0xc7, 0x02, 0x3e, 0xad, 0x69, 0xd6, 0x13, 0x84, 0x47, 0x5f, + 0xa8, 0x57, 0xa7, 0xf5, 0xf4, 0x21, 0x11, 0x28, 0xcf, 0xea, 0xb3, 0x7c, + 0xd7, 0xb2, 0xfb, 0x1b, 0x6b, 0x45, 0x1e, 0xbf, 0xea, 0x5b, 0xf3, 0xf3, + 0x82, 0xc2, 0xba, 0xe8, 0x7f, 0x06, 0xc0, 0x0e, 0x6c, 0x60, 0x22, 0x00, + 0x00, 0x00, 0x00, 0x00, }; + +static const u8 usem_int_table_data_e2[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xfb, 0x51, + 0xcf, 0xc0, 0xf0, 0x03, 0x09, 0xdb, 0xf1, 0xa3, 0xf2, 0x17, 0xa3, 0xf1, + 0x5b, 0x79, 0x51, 0xf9, 0x8c, 0x68, 0x7c, 0x0d, 0x34, 0xfe, 0x1a, 0x2e, + 0x54, 0xbe, 0x11, 0x9a, 0x79, 0x91, 0x68, 0xea, 0x49, 0xc5, 0x1b, 0xd9, + 0x18, 0x18, 0x76, 0x02, 0xf1, 0x41, 0x36, 0x54, 0x71, 0x55, 0x06, 0x08, + 0x2d, 0x0c, 0xa5, 0x59, 0x80, 0xb4, 0x22, 0x92, 0x9a, 0xd3, 0xcc, 0xd8, + 0xcd, 0x2b, 0x54, 0x80, 0xd0, 0x22, 0x40, 0xda, 0x03, 0x88, 0x8b, 0x80, + 0x78, 0x82, 0x38, 0x03, 0x43, 0xaf, 0x24, 0x03, 0xc3, 0x13, 0x20, 0xbd, + 0x40, 0x9c, 0x32, 0xf7, 0xa2, 0xe3, 0x36, 0x51, 0xea, 0x9a, 0x37, 0x8a, + 0x49, 0xc3, 0xa6, 0xaa, 0xa8, 0xfc, 0x0c, 0x03, 0x06, 0x86, 0x39, 0x86, + 0x0c, 0x0c, 0xcf, 0x8c, 0x20, 0x7c, 0x1d, 0x24, 0xf9, 0x7f, 0x40, 0xb1, + 0x4c, 0x03, 0x08, 0x7b, 0x87, 0x16, 0x03, 0x43, 0x35, 0x90, 0xaf, 0xac, + 0x8a, 0xdd, 0xdc, 0x9d, 0x40, 0xf9, 0x1a, 0xa0, 0x3c, 0xbf, 0x31, 0x7e, + 0xfb, 0x2f, 0x5b, 0xa0, 0xf2, 0x03, 0xd1, 0xf8, 0x32, 0xae, 0xa8, 0x7c, + 0x66, 0x34, 0x79, 0xb5, 0x60, 0x54, 0xfe, 0x92, 0x50, 0x54, 0xfe, 0x9b, + 0x30, 0x08, 0x0d, 0x00, 0x26, 0x4b, 0xdb, 0xdb, 0xe8, 0x03, 0x00, 0x00, + }; + +static const u8 usem_pram_data_e2[] = { + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xed, 0x7d, + 0x7b, 0x7c, 0x54, 0xd5, 0xb9, 0xe8, 0xda, 0xaf, 0x99, 0x49, 0x66, 0x26, + 0xd9, 0x09, 0x93, 0x30, 0x60, 0x12, 0x76, 0x42, 0x80, 0xa0, 0x01, 0x27, + 0x90, 0x20, 0x20, 0xad, 0x3b, 0x21, 0xd0, 0xa0, 0xa8, 0x23, 0xa2, 0xa5, + 0x16, 0x70, 0x40, 0x6a, 0xa9, 0x8a, 0x0e, 0x94, 0xd6, 0xe0, 0x41, 0xb3, + 0xf3, 0x0e, 0x01, 0x6d, 0xf0, 0xa0, 0xa2, 0x20, 0x0c, 0xf1, 0x41, 0xa4, + 0x6a, 0x53, 0x0f, 0x28, 0xb5, 0xf5, 0xfc, 0x86, 0x47, 0xa9, 0x5a, 0x6e, + 0x8d, 0x96, 0x5a, 0x54, 0xb0, 0x03, 0x3e, 0xaa, 0x1e, 0xf1, 0x44, 0x7a, + 0x14, 0xcf, 0xbd, 0x58, 0xce, 0xf7, 0x7d, 0x6b, 0xef, 0xcc, 0x9e, 0xc9, + 0x04, 0xa2, 0xb7, 0xf7, 0x78, 0xfe, 0xb8, 0xf1, 0xe7, 0x6f, 0xb1, 0xf6, + 0x7a, 0x7f, 0xef, 0xf5, 0xad, 0x6f, 0xad, 0x71, 0x8a, 0x15, 0x4c, 0x1b, + 0xc1, 0xd8, 0x19, 0xfc, 0xbb, 0x84, 0xb1, 0xfd, 0x02, 0x63, 0xac, 0x22, + 0x9e, 0x1a, 0x55, 0x81, 0x28, 0x2b, 0x87, 0x74, 0x12, 0x0b, 0x34, 0xc2, + 0xa7, 0x27, 0xc4, 0x50, 0x1a, 0xcb, 0x61, 0xcc, 0xa3, 0x76, 0xeb, 0x58, + 0x85, 0xa9, 0x11, 0x16, 0xf4, 0x32, 0x26, 0x79, 0x42, 0xc6, 0x1f, 0x7c, + 0x8c, 0xa5, 0x31, 0xd6, 0x2b, 0x65, 0x61, 0x01, 0xd3, 0x59, 0x2e, 0x63, + 0x4e, 0xfc, 0x97, 0xc6, 0x98, 0xac, 0x86, 0x74, 0xec, 0x27, 0x5d, 0x87, + 0xba, 0x65, 0x8c, 0x29, 0xbe, 0x6e, 0x16, 0x2a, 0x85, 0x94, 0x6d, 0x56, + 0xdf, 0xbf, 0x80, 0x31, 0x11, 0xba, 0x3c, 0x33, 0x04, 0x2b, 0x1b, 0x0c, + 0xfb, 0x37, 0xaa, 0x62, 0x86, 0x94, 0x38, 0xae, 0x9f, 0xc6, 0x9d, 0xd6, + 0xcd, 0x64, 0xac, 0xe6, 0xb2, 0xc6, 0xd5, 0x84, 0x2b, 0x60, 0xdc, 0x1c, + 0x23, 0x71, 0xdc, 0x21, 0x7d, 0xe3, 0x6a, 0x95, 0x38, 0x6e, 0x2e, 0x8e, + 0x0b, 0xe5, 0x43, 0x7d, 0x46, 0xbd, 0x04, 0xdf, 0x67, 0xcd, 0x0b, 0x15, + 0xe1, 0xfa, 0x86, 0x4d, 0x8b, 0x08, 0x32, 0xe4, 0xef, 0x99, 0xf2, 0x2c, + 0xcd, 0xc7, 0x8b, 0xf3, 0x71, 0xd3, 0x7c, 0x8a, 0xed, 0xf3, 0x29, 0x9c, + 0x77, 0xfb, 0xd6, 0x18, 0x8c, 0xf3, 0x99, 0x21, 0xb3, 0x76, 0xe8, 0xaf, + 0xfe, 0x5b, 0xe1, 0xed, 0x98, 0x97, 0x0d, 0xa7, 0xda, 0xe0, 0xc3, 0xf9, + 0x86, 0xb7, 0xc6, 0x70, 0xbe, 0x0e, 0x97, 0xda, 0x18, 0x60, 0xec, 0x01, + 0x77, 0x06, 0xc3, 0x71, 0x6b, 0x8f, 0x78, 0x23, 0x4e, 0x00, 0xd4, 0xba, + 0x3a, 0xc6, 0xa2, 0x63, 0x18, 0x6b, 0xaf, 0x73, 0xb1, 0x28, 0x00, 0xa5, + 0xad, 0x4e, 0xa5, 0x7c, 0x4b, 0x9d, 0x9f, 0x52, 0x00, 0xa4, 0xf1, 0x13, + 0xa8, 0x7f, 0x6a, 0xaa, 0x18, 0x69, 0x87, 0xfa, 0xb2, 0x8f, 0xe9, 0xdd, + 0xa5, 0xb6, 0xb4, 0x98, 0xa7, 0x06, 0x13, 0x08, 0x2f, 0xb3, 0x58, 0x3a, + 0xcd, 0xeb, 0x26, 0xcc, 0xe7, 0xe0, 0x52, 0x03, 0xae, 0xe0, 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0xd2, 0xb1, + 0xe6, 0xc9, 0x73, 0x3e, 0x7e, 0xfe, 0xc6, 0xeb, 0x99, 0x6a, 0xbc, 0xfe, + 0xf9, 0x0b, 0x1a, 0xa7, 0x8a, 0xfa, 0xa7, 0xaa, 0xf3, 0x7b, 0x5f, 0xfb, + 0x1b, 0xd7, 0xca, 0x9d, 0x64, 0x2f, 0xe8, 0xb7, 0xa8, 0xce, 0xd0, 0x4f, + 0x7e, 0x0a, 0xfb, 0x67, 0x8a, 0x7c, 0xcc, 0x4f, 0x8d, 0xa6, 0xa7, 0xe4, + 0x97, 0xe8, 0xf7, 0x61, 0x7d, 0x54, 0x17, 0xc2, 0xf6, 0xdf, 0xc4, 0xef, + 0xca, 0x3a, 0xa9, 0x2e, 0x84, 0x6d, 0x81, 0x32, 0x54, 0x46, 0xf4, 0x17, + 0xbc, 0x4c, 0x35, 0x16, 0x8c, 0x8b, 0xfa, 0x9c, 0xbf, 0x3f, 0x2c, 0x88, + 0x39, 0x7f, 0x7f, 0x98, 0x5c, 0x1c, 0xfe, 0x90, 0xe8, 0xbb, 0xf6, 0xe5, + 0x71, 0x8e, 0xe7, 0x49, 0xfa, 0x24, 0xc7, 0x77, 0x47, 0x4a, 0x82, 0x67, + 0x96, 0xdb, 0xea, 0xb5, 0x7f, 0x87, 0xf6, 0x3f, 0xae, 0x69, 0xc2, 0x5f, + 0x65, 0xff, 0x19, 0x4d, 0x73, 0x3e, 0x3d, 0xfb, 0xdf, 0x96, 0x31, 0x7c, + 0x0f, 0xdd, 0x47, 0xf9, 0x93, 0x67, 0xb6, 0x21, 0x6f, 0xc5, 0x7d, 0xd4, + 0x5f, 0xeb, 0x62, 0xf1, 0xd3, 0xe1, 0x7c, 0x11, 0xd7, 0x04, 0xbc, 0x4c, + 0x5f, 0xe8, 0xba, 0x29, 0xe3, 0xbf, 0x88, 0xa7, 0xdc, 0xa8, 0x1e, 0x63, + 0xc7, 0xc5, 0xe3, 0x29, 0xef, 0xf9, 0x69, 0x8e, 0xfb, 0x53, 0x89, 0xad, + 0xd7, 0x1d, 0x61, 0xf5, 0x90, 0xc4, 0xe7, 0xf2, 0xf2, 0x6c, 0xc7, 0xef, + 0x33, 0xbd, 0xe7, 0xaf, 0x62, 0xf3, 0xfc, 0x40, 0xd8, 0xeb, 0xa4, 0x92, + 0x70, 0x51, 0x13, 0xab, 0x7b, 0xc3, 0x73, 0xd2, 0x88, 0xbf, 0x4b, 0x77, + 0xc6, 0x9d, 0x96, 0x9d, 0xdd, 0x59, 0x6c, 0xcc, 0x27, 0x7e, 0x5b, 0x76, + 0x6f, 0xc5, 0xa3, 0x67, 0xfa, 0x8e, 0xd1, 0x51, 0xda, 0xe8, 0xf9, 0xac, + 0xba, 0x21, 0xbf, 0xc2, 0xb6, 0x8f, 0x8e, 0xa4, 0x08, 0xbb, 0xb7, 0x4a, + 0xbf, 0x37, 0xa0, 0x79, 0x1f, 0x14, 0xf7, 0x3b, 0x41, 0x19, 0x90, 0x1b, + 0x53, 0xe2, 0xf3, 0xa6, 0x12, 0x8f, 0xd8, 0xa1, 0xde, 0x00, 0xd3, 0xdf, + 0x94, 0x58, 0x31, 0xbb, 0xdf, 0xea, 0xca, 0x0f, 0x18, 0x94, 0xc7, 0xa4, + 0x14, 0x06, 0xc0, 0x7e, 0x2e, 0xff, 0xa5, 0x39, 0x65, 0x41, 0xa2, 0x2f, + 0x45, 0x19, 0x00, 0xe2, 0x4b, 0x8a, 0xf5, 0x3b, 0xa4, 0xa2, 0x42, 0x36, + 0x8f, 0x35, 0xae, 0xa6, 0x49, 0x76, 0xf0, 0xc7, 0x5a, 0xcf, 0xea, 0xff, + 0x5a, 0xe4, 0x4f, 0x1e, 0x5a, 0xdf, 0x76, 0x7f, 0xf3, 0x9d, 0xfb, 0xc1, + 0x43, 0x79, 0x47, 0x38, 0x96, 0xc4, 0x7e, 0x97, 0x1f, 0xbe, 0x3f, 0xdb, + 0x43, 0xf7, 0x93, 0x6e, 0xa1, 0xbc, 0x87, 0x9d, 0x53, 0x14, 0xb2, 0xf1, + 0x52, 0x93, 0x77, 0x3f, 0xc9, 0xf5, 0xb8, 0x39, 0x8d, 0xfd, 0x5e, 0x03, + 0xdb, 0x54, 0xaa, 0x47, 0x1e, 0xef, 0x14, 0xf7, 0xe1, 0xf1, 0xb9, 0x8b, + 0x19, 0x59, 0x9b, 0x83, 0x0e, 0xab, 0xb5, 0xf2, 0xac, 0xe3, 0x9d, 0xfc, + 0x1c, 0xfe, 0x79, 0xd3, 0xe5, 0xc8, 0xb3, 0x46, 0xe3, 0x73, 0x62, 0x7e, + 0xe5, 0x4d, 0x8e, 0x0c, 0x51, 0x0a, 0x7a, 0xcf, 0xdb, 0x0b, 0xd7, 0xd3, + 0xef, 0xe3, 0xbc, 0x22, 0x0f, 0xff, 0xe2, 0xdb, 0x4d, 0xcf, 0x51, 0xbe, + 0x35, 0xd9, 0x08, 0xdf, 0x47, 0xfc, 0x7a, 0x07, 0xe1, 0x86, 0x9d, 0x93, + 0x4c, 0x02, 0x76, 0x4e, 0xd2, 0xfc, 0xe0, 0x03, 0x33, 0x6e, 0xc1, 0x75, + 0xbf, 0x2b, 0xf4, 0xda, 0x6f, 0x9d, 0x8f, 0x8c, 0x72, 0x2e, 0x62, 0x8d, + 0x1b, 0xc6, 0x17, 0xbf, 0x85, 0x2f, 0xb0, 0x8a, 0xf1, 0x61, 0x14, 0x7c, + 0x91, 0xcc, 0xdb, 0x19, 0x6e, 0x3f, 0x85, 0x0a, 0xe8, 0x2a, 0x8e, 0xc7, + 0xd7, 0x7e, 0x91, 0x67, 0x9c, 0x2b, 0x52, 0xf9, 0xf9, 0x67, 0x13, 0xe8, + 0xf6, 0xfa, 0x40, 0xe7, 0xfe, 0xc5, 0x1c, 0x67, 0x34, 0x5b, 0x9d, 0xe4, + 0x13, 0xe0, 0xcc, 0x83, 0x56, 0xfe, 0x4a, 0x38, 0x83, 0x6d, 0x47, 0xe7, + 0x06, 0xfe, 0xbb, 0x90, 0xcb, 0xe3, 0xcc, 0xd3, 0xc4, 0x27, 0x35, 0x4b, + 0x76, 0xe0, 0x8a, 0xe2, 0x73, 0xe2, 0x4c, 0x69, 0xb1, 0x11, 0x25, 0xbb, + 0xba, 0x04, 0xde, 0xec, 0xfc, 0x34, 0xf0, 0x06, 0xfc, 0xe9, 0x0e, 0x7d, + 0x4e, 0x6c, 0x2d, 0x7d, 0x46, 0x3b, 0xff, 0xae, 0xb0, 0x73, 0x53, 0x9a, + 0x7b, 0xb1, 0x9d, 0x23, 0xbd, 0x2f, 0xd1, 0xbe, 0x20, 0x8b, 0xcb, 0xc9, + 0x3a, 0x57, 0x83, 0x32, 0x8d, 0xd9, 0x9b, 0x64, 0xbe, 0xc6, 0xce, 0xd1, + 0xe2, 0xeb, 0x87, 0x81, 0xfd, 0x4e, 0xfe, 0x13, 0xae, 0xff, 0x49, 0xc7, + 0xfd, 0x2f, 0xdf, 0xf7, 0x76, 0x53, 0x30, 0x46, 0x00, 0x00, 0x00, 0x00, + }; static const u8 xsem_int_table_data_e2[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x33, 0x92, - 0x65, 0x60, 0xf8, 0x51, 0x8f, 0xc0, 0x6a, 0x62, 0xa8, 0x7c, 0x74, 0x6c, - 0x2a, 0x8e, 0x5f, 0x9e, 0x54, 0xbc, 0x82, 0x19, 0xc1, 0xd6, 0x17, 0x61, - 0x60, 0x90, 0x10, 0x62, 0x60, 0x90, 0x04, 0xe2, 0x7a, 0x20, 0x6e, 0x00, - 0xe2, 0x7b, 0x40, 0x2c, 0x26, 0xcc, 0xc0, 0x20, 0x0e, 0xc4, 0x11, 0x40, - 0x76, 0x24, 0x10, 0x1b, 0x01, 0xb1, 0x9a, 0x08, 0x44, 0x4f, 0x98, 0x00, - 0x03, 0x43, 0x22, 0x10, 0xe7, 0x08, 0xa0, 0x9a, 0x6b, 0xc1, 0x08, 0xa1, - 0x57, 0x33, 0x30, 0x30, 0xc8, 0x00, 0x31, 0x0b, 0x10, 0xaf, 0xe0, 0x64, - 0x60, 0x78, 0xc7, 0x0e, 0x11, 0x0f, 0x64, 0x82, 0xd0, 0xe7, 0x8d, 0x19, - 0x18, 0x1e, 0x5a, 0x20, 0xf4, 0x79, 0x5b, 0x32, 0x30, 0x74, 0x5b, 0x53, - 0xd7, 0x8f, 0xa3, 0x78, 0xf0, 0x62, 0x77, 0x3f, 0x54, 0xbe, 0x85, 0x3b, - 0x2a, 0x3f, 0xd9, 0x93, 0x81, 0xe1, 0x02, 0x92, 0x1a, 0x4b, 0x77, 0xd2, - 0xcc, 0xe7, 0xf6, 0x67, 0x60, 0xe0, 0xf1, 0xc7, 0x2d, 0x1f, 0x11, 0x8c, - 0xca, 0xb7, 0x0c, 0x45, 0xe5, 0x9f, 0x0e, 0x42, 0xe3, 0x27, 0x41, 0x68, - 0x00, 0xff, 0x54, 0x12, 0x71, 0xb8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00 -}; + 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0x0b, 0x96, + 0x62, 0x60, 0xf8, 0x51, 0x8f, 0xc0, 0x0b, 0x85, 0x50, 0xf9, 0xe8, 0xd8, + 0x4e, 0x04, 0x95, 0xbf, 0x59, 0x18, 0xbf, 0x7a, 0x42, 0x98, 0x9d, 0x05, + 0xc1, 0xfe, 0xc3, 0xcf, 0xc0, 0xf0, 0x86, 0x1d, 0x82, 0xd7, 0x40, 0x71, + 0x1c, 0x10, 0x7b, 0x42, 0xb1, 0x00, 0x07, 0x04, 0x4b, 0x70, 0x22, 0xf4, + 0xb4, 0xf2, 0x31, 0x30, 0xf4, 0x02, 0xf1, 0x54, 0x3e, 0x54, 0x73, 0x53, + 0x18, 0x21, 0xf4, 0x1d, 0x06, 0x06, 0x86, 0x06, 0x20, 0x96, 0x03, 0xe2, + 0xd9, 0x48, 0xfa, 0xdc, 0x98, 0x20, 0x34, 0x8f, 0x39, 0x03, 0x43, 0xa5, + 0x35, 0x42, 0x5c, 0xd3, 0x80, 0x81, 0xa1, 0x04, 0x88, 0xfd, 0x0c, 0x29, + 0xf3, 0xd7, 0x28, 0x1e, 0x1a, 0x58, 0xc8, 0x0f, 0x95, 0xef, 0xec, 0x8e, + 0xca, 0x4f, 0xf3, 0x64, 0x60, 0xd8, 0x80, 0xa4, 0xc6, 0xc5, 0x9d, 0x34, + 0xf3, 0xf5, 0xfc, 0x19, 0x18, 0xf4, 0xfd, 0x71, 0xcb, 0x37, 0x05, 0xa3, + 0xf2, 0x13, 0x62, 0x51, 0xf9, 0x5f, 0x83, 0x50, 0xf9, 0x8c, 0x19, 0xa8, + 0xfc, 0xa8, 0x10, 0x08, 0x0d, 0x00, 0x63, 0xb8, 0x62, 0x77, 0xc8, 0x03, + 0x00, 0x00, 0x00, 0x00, }; static const u8 xsem_pram_data_e2[] = { - 0x1f, 0x8b, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b, 0xed, 0x7d, - 0x0d, 0x78, 0x54, 0xd5, 0xb5, 0xe8, 0x3e, 0x3f, 0x73, 0xe6, 0xcc, 0x64, - 0x92, 0x9c, 0x90, 0x09, 0x4c, 0x30, 0x81, 0x33, 0x49, 0x80, 0x28, 0xa1, - 0x3d, 0x40, 0xc0, 0x20, 0x51, 0x4f, 0xc2, 0x4f, 0xb1, 0xb5, 0xd7, 0x11, - 0xad, 0x1f, 0xb5, 0x5e, 0x7b, 0x00, 0x4b, 0xa9, 0x55, 0xef, 0x94, 0xda, - 0x1a, 0xeb, 0x4f, 0x4e, 0xfe, 0x43, 0x44, 0x1c, 0xc4, 0xda, 0xa8, 0xd4, - 0x0e, 0x7f, 0xb7, 0xd0, 0xaa, 0xc5, 0x4a, 0xad, 0xf6, 0x7a, 0xef, 0x37, - 0xa0, 0xb6, 0xb4, 0x8f, 0xb6, 0x79, 0xbd, 0xd6, 0xa2, 0xd5, 0x67, 0x6a, - 0x69, 0xa5, 0x56, 0x5f, 0x79, 0x5a, 0xca, 0xbc, 0x5e, 0xfa, 0x78, 0x7b, - 0xad, 0xbd, 0x4f, 0x72, 0xce, 0xe4, 0x64, 0x26, 0x14, 0x7b, 0x5f, 0xdf, - 0x7b, 0x0e, 0xfa, 0x6d, 0xd6, 0x39, 0x7b, 0xaf, 0xbd, 0xf6, 0xda, 0x6b, - 0xaf, 0xbd, 0xd6, 0xda, 0x6b, 0x1f, 0x14, 0x61, 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0xa4, 0x73, 0xa0, 0xdb, 0x10, 0x9b, 0x83, + 0xef, 0xac, 0xf2, 0x78, 0xf6, 0x65, 0xe8, 0x14, 0xf0, 0xc7, 0x30, 0xff, + 0x71, 0xd1, 0xcb, 0x08, 0x7f, 0xfa, 0x61, 0x41, 0x18, 0xb1, 0x9b, 0xa8, + 0x1e, 0x1b, 0x8e, 0x32, 0xd7, 0x08, 0xfd, 0x09, 0x28, 0x2b, 0x75, 0xaa, + 0xf3, 0x88, 0x7c, 0x97, 0x64, 0xa3, 0xfe, 0x83, 0xbe, 0xcb, 0x03, 0x3b, + 0x62, 0x1a, 0x1b, 0xa0, 0xfe, 0xd5, 0x98, 0x05, 0xb5, 0x61, 0xca, 0x42, + 0xa5, 0x36, 0x1d, 0xbf, 0x9f, 0x48, 0xc7, 0xef, 0x81, 0x7c, 0xd4, 0xbf, + 0x06, 0x2b, 0xd9, 0xf0, 0xbb, 0x52, 0xd6, 0x43, 0xed, 0xb5, 0x2c, 0x44, + 0xe3, 0x39, 0x18, 0x2f, 0xe4, 0x41, 0x46, 0xfa, 0xde, 0x77, 0x76, 0x88, + 0xc7, 0x15, 0xf3, 0x98, 0x4a, 0x89, 0xe5, 0x7c, 0xa6, 0xd9, 0x18, 0x95, + 0x9e, 0xf8, 0xa8, 0x7f, 0x1d, 0xd3, 0xa9, 0x9d, 0xcf, 0x7c, 0xaf, 0x9c, + 0x83, 0x73, 0xee, 0x58, 0x58, 0x95, 0x87, 0x7a, 0x3a, 0xa7, 0xd6, 0xa8, + 0xfb, 0x1c, 0xa1, 0x97, 0x2b, 0x93, 0xa3, 0x8b, 0x30, 0xe9, 0x81, 0x76, + 0x9d, 0xca, 0xf3, 0x1e, 0x5b, 0x93, 0x1f, 0x9c, 0x28, 0x8e, 0x76, 0x7d, + 0xad, 0x35, 0x3e, 0x9c, 0xca, 0xe3, 0x31, 0x13, 0xbd, 0xdb, 0x32, 0x83, + 0xff, 0x1e, 0xb5, 0x7b, 0xbc, 0x68, 0x3f, 0x3c, 0xea, 0x96, 0x28, 0xce, + 0xfe, 0x68, 0xda, 0xf8, 0xf5, 0x28, 0xd7, 0xd7, 0x70, 0xbd, 0x2f, 0xdb, + 0x7d, 0x54, 0x5f, 0x65, 0x33, 0xec, 0x98, 0x65, 0xb5, 0x53, 0x5f, 0x02, + 0x13, 0x91, 0x35, 0x45, 0xf9, 0x28, 0x3e, 0xda, 0x94, 0x24, 0x53, 0x7d, + 0x82, 0x69, 0x5f, 0xdd, 0xf4, 0xdb, 0x98, 0x97, 0x1a, 0xb3, 0xff, 0xf7, + 0xec, 0xd2, 0x3f, 0xda, 0xb4, 0x5b, 0x6a, 0x0b, 0xc7, 0x19, 0xbf, 0xc2, + 0xb8, 0xdf, 0xb3, 0xf8, 0x9f, 0xf3, 0xd1, 0xbe, 0xd7, 0xee, 0x40, 0x7c, + 0x99, 0xdf, 0x73, 0x3a, 0x35, 0xa6, 0xe8, 0xf3, 0xb1, 0xdf, 0x41, 0xdf, + 0x73, 0x46, 0xd5, 0x40, 0x9f, 0x7f, 0xdf, 0xd9, 0x48, 0xdf, 0xd5, 0xf8, + 0x98, 0x07, 0xc7, 0xc1, 0xde, 0xaf, 0x25, 0xbe, 0x60, 0x3c, 0xde, 0xdb, + 0x04, 0x74, 0x89, 0xff, 0x5f, 0x0c, 0xb3, 0xef, 0xf3, 0x19, 0xfd, 0x3d, + 0x71, 0x57, 0x64, 0xaf, 0xb3, 0x95, 0x81, 0x75, 0x94, 0xe7, 0x31, 0xfc, + 0xb8, 0xf5, 0xb5, 0xbe, 0xfb, 0xe9, 0x7e, 0x1a, 0x53, 0x25, 0xab, 0x1f, + 0xb7, 0x1e, 0xfc, 0xb8, 0x5c, 0xba, 0xff, 0x03, 0xb8, 0xbf, 0x62, 0xf2, + 0xb5, 0x33, 0x4a, 0xb7, 0x45, 0x8f, 0xe5, 0x6b, 0xa6, 0x4e, 0x8b, 0x45, + 0x7a, 0x1b, 0xe1, 0x9f, 0x2b, 0xc4, 0xcf, 0xef, 0x50, 0x9f, 0x82, 0x5f, + 0x7b, 0xf0, 0x7b, 0x21, 0x19, 0xe5, 0xc2, 0xdd, 0xa1, 0x37, 0xe9, 0xfb, + 0x83, 0xbb, 0x9f, 0xfb, 0x17, 0xfa, 0xbe, 0x6e, 0xa3, 0xe1, 0x2f, 0xdf, + 0x65, 0xd0, 0x15, 0xab, 0x2f, 0xa4, 0xbe, 0xec, 0x13, 0x0f, 0xe3, 0x3d, + 0x3e, 0xea, 0x4b, 0xa7, 0xba, 0x9d, 0x8f, 0xfa, 0x6c, 0x64, 0xe7, 0x7c, + 0xd4, 0x9c, 0xb6, 0x1f, 0x2f, 0xf1, 0xd1, 0x0b, 0x9f, 0x71, 0xfd, 0x0b, + 0xe3, 0xfc, 0x7b, 0x90, 0x46, 0xf3, 0xff, 0x63, 0x41, 0x75, 0x24, 0xe6, + 0xf7, 0x65, 0x6c, 0xa5, 0xa6, 0xcd, 0x27, 0xbf, 0x96, 0xff, 0xff, 0x3f, + 0x4c, 0x7d, 0xfc, 0xd1, 0x0b, 0x6b, 0xb8, 0x3e, 0xee, 0xb3, 0x19, 0xfa, + 0x98, 0xd7, 0xaf, 0x3c, 0xdf, 0x77, 0x8d, 0x8a, 0x74, 0x5b, 0xf9, 0xf5, + 0x12, 0xf6, 0x7f, 0x71, 0xdd, 0x12, 0xa7, 0x07, 0xeb, 0xef, 0x2a, 0x1f, + 0xff, 0x24, 0xc7, 0x6f, 0xa1, 0xe3, 0x48, 0xfd, 0x2c, 0xaa, 0xca, 0xd6, + 0x7f, 0x25, 0x3d, 0x22, 0x53, 0x3d, 0x90, 0x89, 0xc7, 0x31, 0x78, 0x51, + 0xc6, 0xd4, 0xbd, 0x50, 0x7d, 0x8d, 0x79, 0xde, 0xf3, 0x5d, 0xd7, 0x52, + 0xdd, 0x4b, 0x33, 0xd8, 0x77, 0xb6, 0x4b, 0xe4, 0xcf, 0xa5, 0x3e, 0x07, + 0x7d, 0x3f, 0xf0, 0xb1, 0x9d, 0xfd, 0x48, 0x88, 0x19, 0x07, 0x6e, 0xc4, + 0x7b, 0x47, 0xbe, 0xe7, 0xfa, 0x5a, 0xef, 0xcb, 0xf8, 0xee, 0x42, 0xdf, + 0xcf, 0x89, 0x0e, 0xc6, 0xbc, 0x6f, 0xfd, 0x94, 0x2b, 0xfb, 0x6e, 0xec, + 0x0a, 0xe7, 0xb5, 0x18, 0x7c, 0x02, 0x07, 0xa5, 0x3a, 0xc3, 0xd8, 0xd0, + 0x7c, 0xb2, 0x73, 0x6d, 0x9a, 0x47, 0xc3, 0xef, 0x34, 0x63, 0x8b, 0x3b, + 0x98, 0x35, 0xae, 0x93, 0xe6, 0x5d, 0xfc, 0x06, 0x9e, 0x2f, 0x56, 0x52, + 0x04, 0x94, 0x0f, 0xb1, 0xaa, 0x41, 0x1f, 0xea, 0x9c, 0xb0, 0xfd, 0x8e, + 0xd4, 0x86, 0xd7, 0xc5, 0x9a, 0xfb, 0x99, 0xfd, 0xff, 0x0f, 0x5e, 0x7d, + 0xe7, 0xe5, 0x80, 0x4e, 0x00, 0x00, 0x00, 0x00, }; #ifdef __KERNEL__ void bnx2x_init_e2_firmware(struct bnx2x *bp) @@ -22468,3 +24305,4 @@ void bnx2x_init_e2_firmware(struct bnx2x *bp) } #endif +// Total size: 72722 regs diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.c index 5cdc8c7..90b831a 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.c +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.c @@ -1,4 +1,4 @@ -/* Copyright 2008-2011 Broadcom Corporation +/* Copyright 2008-2013 Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you @@ -26,19 +26,28 @@ #include #include "bnx2x.h" -#include "bnx2x_common.h" - +#include "bnx2x_cmn.h" /********************************************************/ #define ETH_HLEN 14 /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */ -#define ETH_OVREHEAD (ETH_HLEN + 8 + 8) -#define ETH_MIN_PACKET_SIZE 60 -#define ETH_MAX_PACKET_SIZE 1500 +#define ETH_OVREHEAD (ETH_HLEN + 8 + 8) +#define ETH_MIN_PACKET_SIZE 60 +#define ETH_MAX_PACKET_SIZE 1500 #define ETH_MAX_JUMBO_PACKET_SIZE 9600 -#define MDIO_ACCESS_TIMEOUT 1000 -#define BMAC_CONTROL_RX_ENABLE 2 +#define MDIO_ACCESS_TIMEOUT 1000 +#define WC_LANE_MAX 4 +#define I2C_SWITCH_WIDTH 2 +#define I2C_BSC0 0 +#define I2C_BSC1 1 +#define I2C_WA_RETRY_CNT 3 +#define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1) +#define MCPR_IMC_COMMAND_READ_OP 1 +#define MCPR_IMC_COMMAND_WRITE_OP 2 +/* LED Blink rate that will achieve ~15.9Hz */ +#define LED_BLINK_RATE_VAL_E3 354 +#define LED_BLINK_RATE_VAL_E1X_E2 480 /***********************************************************/ /* Shortcut definitions */ /***********************************************************/ @@ -83,7 +92,7 @@ #define AUTONEG_CL37 SHARED_HW_CFG_AN_ENABLE_CL37 #define AUTONEG_CL73 SHARED_HW_CFG_AN_ENABLE_CL73 -#define AUTONEG_BAM SHARED_HW_CFG_AN_ENABLE_BAM +#define AUTONEG_BAM SHARED_HW_CFG_AN_ENABLE_BAM #define AUTONEG_PARALLEL \ SHARED_HW_CFG_AN_ENABLE_PARALLEL_DETECTION #define AUTONEG_SGMII_FIBER_AUTODET \ @@ -106,16 +115,13 @@ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_HIG #define GP_STATUS_10G_CX4 \ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_CX4 -#define GP_STATUS_12G_HIG \ - MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_12G_HIG -#define GP_STATUS_12_5G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_12_5G -#define GP_STATUS_13G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_13G -#define GP_STATUS_15G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_15G -#define GP_STATUS_16G MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_16G #define GP_STATUS_1G_KX MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_1G_KX #define GP_STATUS_10G_KX4 \ MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KX4 - +#define GP_STATUS_10G_KR MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KR +#define GP_STATUS_10G_XFI MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_XFI +#define GP_STATUS_20G_DXGXS MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_20G_DXGXS +#define GP_STATUS_10G_SFI MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_SFI #define LINK_10THD LINK_STATUS_SPEED_AND_DUPLEX_10THD #define LINK_10TFD LINK_STATUS_SPEED_AND_DUPLEX_10TFD #define LINK_100TXHD LINK_STATUS_SPEED_AND_DUPLEX_100TXHD @@ -129,24 +135,13 @@ #define LINK_2500XFD LINK_STATUS_SPEED_AND_DUPLEX_2500XFD #define LINK_10GTFD LINK_STATUS_SPEED_AND_DUPLEX_10GTFD #define LINK_10GXFD LINK_STATUS_SPEED_AND_DUPLEX_10GXFD -#define LINK_12GTFD LINK_STATUS_SPEED_AND_DUPLEX_12GTFD -#define LINK_12GXFD LINK_STATUS_SPEED_AND_DUPLEX_12GXFD -#define LINK_12_5GTFD LINK_STATUS_SPEED_AND_DUPLEX_12_5GTFD -#define LINK_12_5GXFD LINK_STATUS_SPEED_AND_DUPLEX_12_5GXFD -#define LINK_13GTFD LINK_STATUS_SPEED_AND_DUPLEX_13GTFD -#define LINK_13GXFD LINK_STATUS_SPEED_AND_DUPLEX_13GXFD -#define LINK_15GTFD LINK_STATUS_SPEED_AND_DUPLEX_15GTFD -#define LINK_15GXFD LINK_STATUS_SPEED_AND_DUPLEX_15GXFD -#define LINK_16GTFD LINK_STATUS_SPEED_AND_DUPLEX_16GTFD -#define LINK_16GXFD LINK_STATUS_SPEED_AND_DUPLEX_16GXFD +#define LINK_20GTFD LINK_STATUS_SPEED_AND_DUPLEX_20GTFD +#define LINK_20GXFD LINK_STATUS_SPEED_AND_DUPLEX_20GXFD + -#define PHY_XGXS_FLAG 0x1 -#define PHY_SGMII_FLAG 0x2 -#define PHY_SERDES_FLAG 0x4 -/* */ #define SFP_EEPROM_CON_TYPE_ADDR 0x2 - #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 + #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21 @@ -159,28 +154,153 @@ #define SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE 0x4 #define SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE 0x8 -#define SFP_EEPROM_OPTIONS_ADDR 0x40 +#define SFP_EEPROM_OPTIONS_ADDR 0x40 #define SFP_EEPROM_OPTIONS_LINEAR_RX_OUT_MASK 0x1 -#define SFP_EEPROM_OPTIONS_SIZE 2 +#define SFP_EEPROM_OPTIONS_SIZE 2 -#define EDC_MODE_LINEAR 0x0022 -#define EDC_MODE_LIMITING 0x0044 -#define EDC_MODE_PASSIVE_DAC 0x0055 +#define EDC_MODE_LINEAR 0x0022 +#define EDC_MODE_LIMITING 0x0044 +#define EDC_MODE_PASSIVE_DAC 0x0055 +/* BRB default for class 0 E2 */ +#define DEFAULT0_E2_BRB_MAC_PAUSE_XOFF_THR 170 +#define DEFAULT0_E2_BRB_MAC_PAUSE_XON_THR 250 +#define DEFAULT0_E2_BRB_MAC_FULL_XOFF_THR 10 +#define DEFAULT0_E2_BRB_MAC_FULL_XON_THR 50 -#define ETS_BW_LIMIT_CREDIT_UPPER_BOUND (0x5000) +/* BRB thresholds for E2*/ +#define PFC_E2_BRB_MAC_PAUSE_XOFF_THR_PAUSE 170 +#define PFC_E2_BRB_MAC_PAUSE_XOFF_THR_NON_PAUSE 0 + +#define PFC_E2_BRB_MAC_PAUSE_XON_THR_PAUSE 250 +#define PFC_E2_BRB_MAC_PAUSE_XON_THR_NON_PAUSE 0 + +#define PFC_E2_BRB_MAC_FULL_XOFF_THR_PAUSE 10 +#define PFC_E2_BRB_MAC_FULL_XOFF_THR_NON_PAUSE 90 + +#define PFC_E2_BRB_MAC_FULL_XON_THR_PAUSE 50 +#define PFC_E2_BRB_MAC_FULL_XON_THR_NON_PAUSE 250 + +/* BRB default for class 0 E3A0 */ +#define DEFAULT0_E3A0_BRB_MAC_PAUSE_XOFF_THR 290 +#define DEFAULT0_E3A0_BRB_MAC_PAUSE_XON_THR 410 +#define DEFAULT0_E3A0_BRB_MAC_FULL_XOFF_THR 10 +#define DEFAULT0_E3A0_BRB_MAC_FULL_XON_THR 50 + +/* BRB thresholds for E3A0 */ +#define PFC_E3A0_BRB_MAC_PAUSE_XOFF_THR_PAUSE 290 +#define PFC_E3A0_BRB_MAC_PAUSE_XOFF_THR_NON_PAUSE 0 + +#define PFC_E3A0_BRB_MAC_PAUSE_XON_THR_PAUSE 410 +#define PFC_E3A0_BRB_MAC_PAUSE_XON_THR_NON_PAUSE 0 + +#define PFC_E3A0_BRB_MAC_FULL_XOFF_THR_PAUSE 10 +#define PFC_E3A0_BRB_MAC_FULL_XOFF_THR_NON_PAUSE 170 + +#define PFC_E3A0_BRB_MAC_FULL_XON_THR_PAUSE 50 +#define PFC_E3A0_BRB_MAC_FULL_XON_THR_NON_PAUSE 410 + +/* BRB default for E3B0 */ +#define DEFAULT0_E3B0_BRB_MAC_PAUSE_XOFF_THR 330 +#define DEFAULT0_E3B0_BRB_MAC_PAUSE_XON_THR 490 +#define DEFAULT0_E3B0_BRB_MAC_FULL_XOFF_THR 15 +#define DEFAULT0_E3B0_BRB_MAC_FULL_XON_THR 55 + +/* BRB thresholds for E3B0 2 port mode*/ +#define PFC_E3B0_2P_BRB_MAC_PAUSE_XOFF_THR_PAUSE 1025 +#define PFC_E3B0_2P_BRB_MAC_PAUSE_XOFF_THR_NON_PAUSE 0 + +#define PFC_E3B0_2P_BRB_MAC_PAUSE_XON_THR_PAUSE 1025 +#define PFC_E3B0_2P_BRB_MAC_PAUSE_XON_THR_NON_PAUSE 0 + +#define PFC_E3B0_2P_BRB_MAC_FULL_XOFF_THR_PAUSE 10 +#define PFC_E3B0_2P_BRB_MAC_FULL_XOFF_THR_NON_PAUSE 1025 + +#define PFC_E3B0_2P_BRB_MAC_FULL_XON_THR_PAUSE 50 +#define PFC_E3B0_2P_BRB_MAC_FULL_XON_THR_NON_PAUSE 1025 + +/* only for E3B0*/ +#define PFC_E3B0_2P_BRB_FULL_LB_XOFF_THR 1025 +#define PFC_E3B0_2P_BRB_FULL_LB_XON_THR 1025 + +/* Lossy +Lossless GUARANTIED == GUART */ +#define PFC_E3B0_2P_MIX_PAUSE_LB_GUART 284 +/* Lossless +Lossless*/ +#define PFC_E3B0_2P_PAUSE_LB_GUART 236 +/* Lossy +Lossy*/ +#define PFC_E3B0_2P_NON_PAUSE_LB_GUART 342 + +/* Lossy +Lossless*/ +#define PFC_E3B0_2P_MIX_PAUSE_MAC_0_CLASS_T_GUART 284 +/* Lossless +Lossless*/ +#define PFC_E3B0_2P_PAUSE_MAC_0_CLASS_T_GUART 236 +/* Lossy +Lossy*/ +#define PFC_E3B0_2P_NON_PAUSE_MAC_0_CLASS_T_GUART 336 +#define PFC_E3B0_2P_BRB_MAC_0_CLASS_T_GUART_HYST 80 + +#define PFC_E3B0_2P_BRB_MAC_1_CLASS_T_GUART 0 +#define PFC_E3B0_2P_BRB_MAC_1_CLASS_T_GUART_HYST 0 + +/* BRB thresholds for E3B0 4 port mode */ +#define PFC_E3B0_4P_BRB_MAC_PAUSE_XOFF_THR_PAUSE 304 +#define PFC_E3B0_4P_BRB_MAC_PAUSE_XOFF_THR_NON_PAUSE 0 + +#define PFC_E3B0_4P_BRB_MAC_PAUSE_XON_THR_PAUSE 384 +#define PFC_E3B0_4P_BRB_MAC_PAUSE_XON_THR_NON_PAUSE 0 + +#define PFC_E3B0_4P_BRB_MAC_FULL_XOFF_THR_PAUSE 10 +#define PFC_E3B0_4P_BRB_MAC_FULL_XOFF_THR_NON_PAUSE 304 + +#define PFC_E3B0_4P_BRB_MAC_FULL_XON_THR_PAUSE 50 +#define PFC_E3B0_4P_BRB_MAC_FULL_XON_THR_NON_PAUSE 384 + +/* only for E3B0*/ +#define PFC_E3B0_4P_BRB_FULL_LB_XOFF_THR 304 +#define PFC_E3B0_4P_BRB_FULL_LB_XON_THR 384 +#define PFC_E3B0_4P_LB_GUART 120 + +#define PFC_E3B0_4P_BRB_MAC_0_CLASS_T_GUART 120 +#define PFC_E3B0_4P_BRB_MAC_0_CLASS_T_GUART_HYST 80 + +#define PFC_E3B0_4P_BRB_MAC_1_CLASS_T_GUART 80 +#define PFC_E3B0_4P_BRB_MAC_1_CLASS_T_GUART_HYST 120 + +/* Pause defines*/ +#define DEFAULT_E3B0_BRB_FULL_LB_XOFF_THR 330 +#define DEFAULT_E3B0_BRB_FULL_LB_XON_THR 490 +#define DEFAULT_E3B0_LB_GUART 40 + +#define DEFAULT_E3B0_BRB_MAC_0_CLASS_T_GUART 40 +#define DEFAULT_E3B0_BRB_MAC_0_CLASS_T_GUART_HYST 0 + +#define DEFAULT_E3B0_BRB_MAC_1_CLASS_T_GUART 40 +#define DEFAULT_E3B0_BRB_MAC_1_CLASS_T_GUART_HYST 0 + +/* ETS defines*/ +#define DCBX_INVALID_COS (0xFF) + +#define ETS_BW_LIMIT_CREDIT_UPPER_BOUND (0x5000) #define ETS_BW_LIMIT_CREDIT_WEIGHT (0x5000) +#define ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS (1360) +#define ETS_E3B0_NIG_MIN_W_VAL_20GBPS (2720) +#define ETS_E3B0_PBF_MIN_W_VAL (10000) + +#define MAX_PACKET_SIZE (9700) +#define WC_UC_TIMEOUT 1000 +#define WC_RDY_TIMEOUT_MSEC 100 +#define MAX_KR_LINK_RETRY 4 + /**********************************************************/ /* INTERFACE */ /**********************************************************/ -#define CL45_WR_OVER_CL22(_bp, _phy, _bank, _addr, _val) \ +#define CL22_WR_OVER_CL45(_bp, _phy, _bank, _addr, _val) \ bnx2x_cl45_write(_bp, _phy, \ (_phy)->def_md_devad, \ (_bank + (_addr & 0xf)), \ _val) -#define CL45_RD_OVER_CL22(_bp, _phy, _bank, _addr, _val) \ +#define CL22_RD_OVER_CL45(_bp, _phy, _bank, _addr, _val) \ bnx2x_cl45_read(_bp, _phy, \ (_phy)->def_md_devad, \ (_bank + (_addr & 0xf)), \ @@ -205,17 +325,88 @@ static u32 bnx2x_bits_dis(struct bnx2x *bp, u32 reg, u32 bits) } /******************************************************************/ -/* ETS section */ +/* EPIO/GPIO section */ /******************************************************************/ -void bnx2x_ets_disabled(struct link_params *params) +static void bnx2x_get_epio(struct bnx2x *bp, u32 epio_pin, u32 *en) +{ + u32 epio_mask, gp_oenable; + *en = 0; + /* Sanity check */ + if (epio_pin > 31) { + DP(NETIF_MSG_LINK, "Invalid EPIO pin %d to get\n", epio_pin); + return; + } + + epio_mask = 1 << epio_pin; + /* Set this EPIO to output */ + gp_oenable = REG_RD(bp, MCP_REG_MCPR_GP_OENABLE); + REG_WR(bp, MCP_REG_MCPR_GP_OENABLE, gp_oenable & ~epio_mask); + + *en = (REG_RD(bp, MCP_REG_MCPR_GP_INPUTS) & epio_mask) >> epio_pin; +} +static void bnx2x_set_epio(struct bnx2x *bp, u32 epio_pin, u32 en) +{ + u32 epio_mask, gp_output, gp_oenable; + + /* Sanity check */ + if (epio_pin > 31) { + DP(NETIF_MSG_LINK, "Invalid EPIO pin %d to set\n", epio_pin); + return; + } + DP(NETIF_MSG_LINK, "Setting EPIO pin %d to %d\n", epio_pin, en); + epio_mask = 1 << epio_pin; + /* Set this EPIO to output */ + gp_output = REG_RD(bp, MCP_REG_MCPR_GP_OUTPUTS); + if (en) + gp_output |= epio_mask; + else + gp_output &= ~epio_mask; + + REG_WR(bp, MCP_REG_MCPR_GP_OUTPUTS, gp_output); + + /* Set the value for this EPIO */ + gp_oenable = REG_RD(bp, MCP_REG_MCPR_GP_OENABLE); + REG_WR(bp, MCP_REG_MCPR_GP_OENABLE, gp_oenable | epio_mask); +} + +static void bnx2x_set_cfg_pin(struct bnx2x *bp, u32 pin_cfg, u32 val) +{ + if (pin_cfg == PIN_CFG_NA) + return; + if (pin_cfg >= PIN_CFG_EPIO0) { + bnx2x_set_epio(bp, pin_cfg - PIN_CFG_EPIO0, val); + } else { + u8 gpio_num = (pin_cfg - PIN_CFG_GPIO0_P0) & 0x3; + u8 gpio_port = (pin_cfg - PIN_CFG_GPIO0_P0) >> 2; + bnx2x_set_gpio(bp, gpio_num, (u8)val, gpio_port); + } +} + +static u32 bnx2x_get_cfg_pin(struct bnx2x *bp, u32 pin_cfg, u32 *val) +{ + if (pin_cfg == PIN_CFG_NA) + return -EINVAL; + if (pin_cfg >= PIN_CFG_EPIO0) { + bnx2x_get_epio(bp, pin_cfg - PIN_CFG_EPIO0, val); + } else { + u8 gpio_num = (pin_cfg - PIN_CFG_GPIO0_P0) & 0x3; + u8 gpio_port = (pin_cfg - PIN_CFG_GPIO0_P0) >> 2; + *val = bnx2x_get_gpio(bp, gpio_num, gpio_port); + } + return 0; + +} +/******************************************************************/ +/* ETS section */ +/******************************************************************/ +static void bnx2x_ets_e2e3a0_disabled(struct link_params *params) { /* ETS disabled configuration*/ struct bnx2x *bp = params->bp; - DP(NETIF_MSG_LINK, "ETS disabled configuration\n"); + DP(NETIF_MSG_LINK, "ETS E2E3 disabled configuration\n"); - /** - * mapping between entry priority to client number (0,1,2 -debug and + /* mapping between entry priority to client number (0,1,2 -debug and * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST) * 3bits client num. * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 @@ -223,8 +414,7 @@ void bnx2x_ets_disabled(struct link_params *params) */ REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, 0x4688); - /** - * Bitmap of 5bits length. Each bit specifies whether the entry behaves + /* Bitmap of 5bits length. Each bit specifies whether the entry behaves * as strict. Bits 0,1,2 - debug and management entries, 3 - * COS0 entry, 4 - COS1 entry. * COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT @@ -235,13 +425,11 @@ void bnx2x_ets_disabled(struct link_params *params) REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7); /* defines which entries (clients) are subjected to WFQ arbitration */ REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0); - /** - * For strict priority entries defines the number of consecutive - * slots for the highest priority. - */ + /* For strict priority entries defines the number of consecutive + * slots for the highest priority. + */ REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100); - /** - * mapping between the CREDIT_WEIGHT registers and actual client + /* mapping between the CREDIT_WEIGHT registers and actual client * numbers */ REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, 0); @@ -253,8 +441,7 @@ void bnx2x_ets_disabled(struct link_params *params) REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, 0); /* ETS mode disable */ REG_WR(bp, PBF_REG_ETS_ENABLED, 0); - /** - * If ETS mode is enabled (there is no strict priority) defines a WFQ + /* If ETS mode is enabled (there is no strict priority) defines a WFQ * weight for COS0/COS1. */ REG_WR(bp, PBF_REG_COS0_WEIGHT, 0x2710); @@ -265,52 +452,789 @@ void bnx2x_ets_disabled(struct link_params *params) /* Defines the number of consecutive slots for the strict priority */ REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0); } +/****************************************************************************** +* Description: +* Getting min_w_val will be set according to line speed . +*. +******************************************************************************/ +static u32 bnx2x_ets_get_min_w_val_nig(const struct link_vars *vars) +{ + u32 min_w_val = 0; + /* Calculate min_w_val.*/ + if (vars->link_up) { + if (vars->line_speed == SPEED_20000) + min_w_val = ETS_E3B0_NIG_MIN_W_VAL_20GBPS; + else + min_w_val = ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS; + } else + min_w_val = ETS_E3B0_NIG_MIN_W_VAL_20GBPS; + /* If the link isn't up (static configuration for example ) The + * link will be according to 20GBPS. + */ + return min_w_val; +} +/****************************************************************************** +* Description: +* Getting credit upper bound form min_w_val. +*. +******************************************************************************/ +static u32 bnx2x_ets_get_credit_upper_bound(const u32 min_w_val) +{ + const u32 credit_upper_bound = (u32)MAXVAL((150 * min_w_val), + MAX_PACKET_SIZE); + return credit_upper_bound; +} +/****************************************************************************** +* Description: +* Set credit upper bound for NIG. +*. +******************************************************************************/ +static void bnx2x_ets_e3b0_set_credit_upper_bound_nig( + const struct link_params *params, + const u32 min_w_val) +{ + struct bnx2x *bp = params->bp; + const u8 port = params->port; + const u32 credit_upper_bound = + bnx2x_ets_get_credit_upper_bound(min_w_val); -void bnx2x_ets_bw_limit_common(const struct link_params *params) + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_0 : + NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_0, credit_upper_bound); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_1 : + NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_1, credit_upper_bound); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_2 : + NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_2, credit_upper_bound); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_3 : + NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_3, credit_upper_bound); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_4 : + NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_4, credit_upper_bound); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_5 : + NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_5, credit_upper_bound); + + if (!port) { + REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_6, + credit_upper_bound); + REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_7, + credit_upper_bound); + REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_8, + credit_upper_bound); + } +} +/****************************************************************************** +* Description: +* Will return the NIG ETS registers to init values.Except +* credit_upper_bound. +* That isn't used in this configuration (No WFQ is enabled) and will be +* configured acording to spec +*. +******************************************************************************/ +static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params, + const struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + const u8 port = params->port; + const u32 min_w_val = bnx2x_ets_get_min_w_val_nig(vars); + /* Mapping between entry priority to client number (0,1,2 -debug and + * management clients, 3 - COS0 client, 4 - COS1, ... 8 - + * COS5)(HIGHEST) 4bits client num.TODO_ETS - Should be done by + * reset value or init tool + */ + if (port) { + REG_WR(bp, NIG_REG_P1_TX_ARB_PRIORITY_CLIENT2_LSB, 0x543210); + REG_WR(bp, NIG_REG_P1_TX_ARB_PRIORITY_CLIENT2_MSB, 0x0); + } else { + REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB, 0x76543210); + REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB, 0x8); + } + /* For strict priority entries defines the number of consecutive + * slots for the highest priority. + */ + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS : + NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100); + /* Mapping between the CREDIT_WEIGHT registers and actual client + * numbers + */ + if (port) { + /*Port 1 has 6 COS*/ + REG_WR(bp, NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_LSB, 0x210543); + REG_WR(bp, NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_MSB, 0x0); + } else { + /*Port 0 has 9 COS*/ + REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_LSB, + 0x43210876); + REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_MSB, 0x5); + } + + /* Bitmap of 5bits length. Each bit specifies whether the entry behaves + * as strict. Bits 0,1,2 - debug and management entries, 3 - + * COS0 entry, 4 - COS1 entry. + * COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT + * bit4 bit3 bit2 bit1 bit0 + * MCP and debug are strict + */ + if (port) + REG_WR(bp, NIG_REG_P1_TX_ARB_CLIENT_IS_STRICT, 0x3f); + else + REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x1ff); + /* defines which entries (clients) are subjected to WFQ arbitration */ + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ : + NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0); + + /* Please notice the register address are note continuous and a + * for here is note appropriate.In 2 port mode port0 only COS0-5 + * can be used. DEBUG1,DEBUG1,MGMT are never used for WFQ* In 4 + * port mode port1 only COS0-2 can be used. DEBUG1,DEBUG1,MGMT + * are never used for WFQ + */ + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_0 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0, 0x0); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_1 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_1, 0x0); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_2 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_2, 0x0); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_3 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_3, 0x0); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_4 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_4, 0x0); + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_5 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_5, 0x0); + if (!port) { + REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_6, 0x0); + REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_7, 0x0); + REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_8, 0x0); + } + + bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val); +} +/****************************************************************************** +* Description: +* Set credit upper bound for PBF. +*. +******************************************************************************/ +static void bnx2x_ets_e3b0_set_credit_upper_bound_pbf( + const struct link_params *params, + const u32 min_w_val) +{ + struct bnx2x *bp = params->bp; + const u32 credit_upper_bound = + bnx2x_ets_get_credit_upper_bound(min_w_val); + const u8 port = params->port; + u32 base_upper_bound = 0; + u8 max_cos = 0; + u8 i = 0; + /* In 2 port mode port0 has COS0-5 that can be used for WFQ.In 4 + * port mode port1 has COS0-2 that can be used for WFQ. + */ + if (!port) { + base_upper_bound = PBF_REG_COS0_UPPER_BOUND_P0; + max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0; + } else { + base_upper_bound = PBF_REG_COS0_UPPER_BOUND_P1; + max_cos = DCBX_E3B0_MAX_NUM_COS_PORT1; + } + + for (i = 0; i < max_cos; i++) + REG_WR(bp, base_upper_bound + (i << 2), credit_upper_bound); +} + +/****************************************************************************** +* Description: +* Will return the PBF ETS registers to init values.Except +* credit_upper_bound. +* That isn't used in this configuration (No WFQ is enabled) and will be +* configured acording to spec +*. +******************************************************************************/ +static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params) +{ + struct bnx2x *bp = params->bp; + const u8 port = params->port; + const u32 min_w_val_pbf = ETS_E3B0_PBF_MIN_W_VAL; + u8 i = 0; + u32 base_weight = 0; + u8 max_cos = 0; + + /* Mapping between entry priority to client number 0 - COS0 + * client, 2 - COS1, ... 5 - COS5)(HIGHEST) 4bits client num. + * TODO_ETS - Should be done by reset value or init tool + */ + if (port) + /* 0x688 (|011|0 10|00 1|000) */ + REG_WR(bp, PBF_REG_ETS_ARB_PRIORITY_CLIENT_P1 , 0x688); + else + /* (10 1|100 |011|0 10|00 1|000) */ + REG_WR(bp, PBF_REG_ETS_ARB_PRIORITY_CLIENT_P0 , 0x2C688); + + /* TODO_ETS - Should be done by reset value or init tool */ + if (port) + /* 0x688 (|011|0 10|00 1|000)*/ + REG_WR(bp, PBF_REG_ETS_ARB_CLIENT_CREDIT_MAP_P1, 0x688); + else + /* 0x2C688 (10 1|100 |011|0 10|00 1|000) */ + REG_WR(bp, PBF_REG_ETS_ARB_CLIENT_CREDIT_MAP_P0, 0x2C688); + + REG_WR(bp, (port) ? PBF_REG_ETS_ARB_NUM_STRICT_ARB_SLOTS_P1 : + PBF_REG_ETS_ARB_NUM_STRICT_ARB_SLOTS_P0 , 0x100); + + + REG_WR(bp, (port) ? PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P1 : + PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P0 , 0); + + REG_WR(bp, (port) ? PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1 : + PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0 , 0); + /* In 2 port mode port0 has COS0-5 that can be used for WFQ. + * In 4 port mode port1 has COS0-2 that can be used for WFQ. + */ + if (!port) { + base_weight = PBF_REG_COS0_WEIGHT_P0; + max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0; + } else { + base_weight = PBF_REG_COS0_WEIGHT_P1; + max_cos = DCBX_E3B0_MAX_NUM_COS_PORT1; + } + + for (i = 0; i < max_cos; i++) + REG_WR(bp, base_weight + (0x4 * i), 0); + + bnx2x_ets_e3b0_set_credit_upper_bound_pbf(params, min_w_val_pbf); +} +/****************************************************************************** +* Description: +* E3B0 disable will return basicly the values to init values. +*. +******************************************************************************/ +static int bnx2x_ets_e3b0_disabled(const struct link_params *params, + const struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + + if (!CHIP_IS_E3B0(bp)) { + DP(NETIF_MSG_LINK, + "bnx2x_ets_e3b0_disabled the chip isn't E3B0\n"); + return -EINVAL; + } + + bnx2x_ets_e3b0_nig_disabled(params, vars); + + bnx2x_ets_e3b0_pbf_disabled(params); + + return 0; +} + +/****************************************************************************** +* Description: +* Disable will return basicly the values to init values. +* +******************************************************************************/ +int bnx2x_ets_disabled(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + int bnx2x_status = 0; + + if ((CHIP_IS_E2(bp)) || (CHIP_IS_E3A0(bp))) + bnx2x_ets_e2e3a0_disabled(params); + else if (CHIP_IS_E3B0(bp)) + bnx2x_status = bnx2x_ets_e3b0_disabled(params, vars); + else { + DP(NETIF_MSG_LINK, "bnx2x_ets_disabled - chip not supported\n"); + return -EINVAL; + } + + return bnx2x_status; +} + +/****************************************************************************** +* Description +* Set the COS mappimg to SP and BW until this point all the COS are not +* set as SP or BW. +******************************************************************************/ +static int bnx2x_ets_e3b0_cli_map(const struct link_params *params, + const struct bnx2x_ets_params *ets_params, + const u8 cos_sp_bitmap, + const u8 cos_bw_bitmap) +{ + struct bnx2x *bp = params->bp; + const u8 port = params->port; + const u8 nig_cli_sp_bitmap = 0x7 | (cos_sp_bitmap << 3); + const u8 pbf_cli_sp_bitmap = cos_sp_bitmap; + const u8 nig_cli_subject2wfq_bitmap = cos_bw_bitmap << 3; + const u8 pbf_cli_subject2wfq_bitmap = cos_bw_bitmap; + + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CLIENT_IS_STRICT : + NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, nig_cli_sp_bitmap); + + REG_WR(bp, (port) ? PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P1 : + PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P0 , pbf_cli_sp_bitmap); + + REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ : + NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, + nig_cli_subject2wfq_bitmap); + + REG_WR(bp, (port) ? PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1 : + PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0, + pbf_cli_subject2wfq_bitmap); + + return 0; +} + +/****************************************************************************** +* Description: +* This function is needed because NIG ARB_CREDIT_WEIGHT_X are +* not continues and ARB_CREDIT_WEIGHT_0 + offset is suitable. +******************************************************************************/ +static int bnx2x_ets_e3b0_set_cos_bw(struct bnx2x *bp, + const u8 cos_entry, + const u32 min_w_val_nig, + const u32 min_w_val_pbf, + const u16 total_bw, + const u8 bw, + const u8 port) +{ + u32 nig_reg_adress_crd_weight = 0; + u32 pbf_reg_adress_crd_weight = 0; + /* Calculate and set BW for this COS - use 1 instead of 0 for BW */ + const u32 cos_bw_nig = ((bw ? bw : 1) * min_w_val_nig) / total_bw; + const u32 cos_bw_pbf = ((bw ? bw : 1) * min_w_val_pbf) / total_bw; + + switch (cos_entry) { + case 0: + nig_reg_adress_crd_weight = + (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_0 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0; + pbf_reg_adress_crd_weight = (port) ? + PBF_REG_COS0_WEIGHT_P1 : PBF_REG_COS0_WEIGHT_P0; + break; + case 1: + nig_reg_adress_crd_weight = (port) ? + NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_1 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_1; + pbf_reg_adress_crd_weight = (port) ? + PBF_REG_COS1_WEIGHT_P1 : PBF_REG_COS1_WEIGHT_P0; + break; + case 2: + nig_reg_adress_crd_weight = (port) ? + NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_2 : + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_2; + + pbf_reg_adress_crd_weight = (port) ? + PBF_REG_COS2_WEIGHT_P1 : PBF_REG_COS2_WEIGHT_P0; + break; + case 3: + if (port) + return -EINVAL; + nig_reg_adress_crd_weight = + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_3; + pbf_reg_adress_crd_weight = + PBF_REG_COS3_WEIGHT_P0; + break; + case 4: + if (port) + return -EINVAL; + nig_reg_adress_crd_weight = + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_4; + pbf_reg_adress_crd_weight = PBF_REG_COS4_WEIGHT_P0; + break; + case 5: + if (port) + return -EINVAL; + nig_reg_adress_crd_weight = + NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_5; + pbf_reg_adress_crd_weight = PBF_REG_COS5_WEIGHT_P0; + break; + } + + REG_WR(bp, nig_reg_adress_crd_weight, cos_bw_nig); + + REG_WR(bp, pbf_reg_adress_crd_weight, cos_bw_pbf); + + return 0; +} +/****************************************************************************** +* Description: +* Calculate the total BW.A value of 0 isn't legal. +* +******************************************************************************/ +static int bnx2x_ets_e3b0_get_total_bw( + const struct link_params *params, + struct bnx2x_ets_params *ets_params, + u16 *total_bw) +{ + struct bnx2x *bp = params->bp; + u8 cos_idx = 0; + u8 is_bw_cos_exist = 0; + + *total_bw = 0 ; + /* Calculate total BW requested */ + for (cos_idx = 0; cos_idx < ets_params->num_of_cos; cos_idx++) { + if (ets_params->cos[cos_idx].state == bnx2x_cos_state_bw) { + is_bw_cos_exist = 1; + if (!ets_params->cos[cos_idx].params.bw_params.bw) { + DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config BW" + "was set to 0\n"); + /* This is to prevent a state when ramrods + * can't be sent + */ + ets_params->cos[cos_idx].params.bw_params.bw + = 1; + } + *total_bw += + ets_params->cos[cos_idx].params.bw_params.bw; + } + } + + /* Check total BW is valid */ + if ((is_bw_cos_exist == 1) && (*total_bw != 100)) { + if (*total_bw == 0) { + DP(NETIF_MSG_LINK, + "bnx2x_ets_E3B0_config total BW shouldn't be 0\n"); + return -EINVAL; + } + DP(NETIF_MSG_LINK, + "bnx2x_ets_E3B0_config total BW should be 100\n"); + /* We can handle a case whre the BW isn't 100 this can happen + * if the TC are joined. + */ + } + return 0; +} + +/****************************************************************************** +* Description: +* Invalidate all the sp_pri_to_cos. +* +******************************************************************************/ +static void bnx2x_ets_e3b0_sp_pri_to_cos_init(u8 *sp_pri_to_cos) +{ + u8 pri = 0; + for (pri = 0; pri < DCBX_MAX_NUM_COS; pri++) + sp_pri_to_cos[pri] = DCBX_INVALID_COS; +} +/****************************************************************************** +* Description: +* Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers +* according to sp_pri_to_cos. +* +******************************************************************************/ +static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params, + u8 *sp_pri_to_cos, const u8 pri, + const u8 cos_entry) +{ + struct bnx2x *bp = params->bp; + const u8 port = params->port; + const u8 max_num_of_cos = (port) ? DCBX_E3B0_MAX_NUM_COS_PORT1 : + DCBX_E3B0_MAX_NUM_COS_PORT0; + + if (sp_pri_to_cos[pri] != DCBX_INVALID_COS) { + DP(NETIF_MSG_LINK, "bnx2x_ets_e3b0_sp_pri_to_cos_set invalid " + "parameter There can't be two COS's with " + "the same strict pri\n"); + return -EINVAL; + } + + if (pri > max_num_of_cos) { + DP(NETIF_MSG_LINK, "bnx2x_ets_e3b0_sp_pri_to_cos_set invalid " + "parameter Illegal strict priority\n"); + return -EINVAL; + } + + sp_pri_to_cos[pri] = cos_entry; + return 0; + +} + +/****************************************************************************** +* Description: +* Returns the correct value according to COS and priority in +* the sp_pri_cli register. +* +******************************************************************************/ +static u64 bnx2x_e3b0_sp_get_pri_cli_reg(const u8 cos, const u8 cos_offset, + const u8 pri_set, + const u8 pri_offset, + const u8 entry_size) +{ + u64 pri_cli_nig = 0; + pri_cli_nig = ((u64)(cos + cos_offset)) << (entry_size * + (pri_set + pri_offset)); + + return pri_cli_nig; +} +/****************************************************************************** +* Description: +* Returns the correct value according to COS and priority in the +* sp_pri_cli register for NIG. +* +******************************************************************************/ +static u64 bnx2x_e3b0_sp_get_pri_cli_reg_nig(const u8 cos, const u8 pri_set) +{ + /* MCP Dbg0 and dbg1 are always with higher strict pri*/ + const u8 nig_cos_offset = 3; + const u8 nig_pri_offset = 3; + + return bnx2x_e3b0_sp_get_pri_cli_reg(cos, nig_cos_offset, pri_set, + nig_pri_offset, 4); + +} +/****************************************************************************** +* Description: +* Returns the correct value according to COS and priority in the +* sp_pri_cli register for PBF. +* +******************************************************************************/ +static u64 bnx2x_e3b0_sp_get_pri_cli_reg_pbf(const u8 cos, const u8 pri_set) +{ + const u8 pbf_cos_offset = 0; + const u8 pbf_pri_offset = 0; + + return bnx2x_e3b0_sp_get_pri_cli_reg(cos, pbf_cos_offset, pri_set, + pbf_pri_offset, 3); + +} + +/****************************************************************************** +* Description: +* Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers +* according to sp_pri_to_cos.(which COS has higher priority) +* +******************************************************************************/ +static int bnx2x_ets_e3b0_sp_set_pri_cli_reg(const struct link_params *params, + u8 *sp_pri_to_cos) +{ + struct bnx2x *bp = params->bp; + u8 i = 0; + const u8 port = params->port; + /* MCP Dbg0 and dbg1 are always with higher strict pri*/ + u64 pri_cli_nig = 0x210; + u32 pri_cli_pbf = 0x0; + u8 pri_set = 0; + u8 pri_bitmask = 0; + const u8 max_num_of_cos = (port) ? DCBX_E3B0_MAX_NUM_COS_PORT1 : + DCBX_E3B0_MAX_NUM_COS_PORT0; + + u8 cos_bit_to_set = (1 << max_num_of_cos) - 1; + + /* Set all the strict priority first */ + for (i = 0; i < max_num_of_cos; i++) { + if (sp_pri_to_cos[i] != DCBX_INVALID_COS) { + if (sp_pri_to_cos[i] >= DCBX_MAX_NUM_COS) { + DP(NETIF_MSG_LINK, + "bnx2x_ets_e3b0_sp_set_pri_cli_reg " + "invalid cos entry\n"); + return -EINVAL; + } + + pri_cli_nig |= bnx2x_e3b0_sp_get_pri_cli_reg_nig( + sp_pri_to_cos[i], pri_set); + + pri_cli_pbf |= bnx2x_e3b0_sp_get_pri_cli_reg_pbf( + sp_pri_to_cos[i], pri_set); + pri_bitmask = 1 << sp_pri_to_cos[i]; + /* COS is used remove it from bitmap.*/ + if (!(pri_bitmask & cos_bit_to_set)) { + DP(NETIF_MSG_LINK, + "bnx2x_ets_e3b0_sp_set_pri_cli_reg " + "invalid There can't be two COS's with" + " the same strict pri\n"); + return -EINVAL; + } + cos_bit_to_set &= ~pri_bitmask; + pri_set++; + } + } + + /* Set all the Non strict priority i= COS*/ + for (i = 0; i < max_num_of_cos; i++) { + pri_bitmask = 1 << i; + /* Check if COS was already used for SP */ + if (pri_bitmask & cos_bit_to_set) { + /* COS wasn't used for SP */ + pri_cli_nig |= bnx2x_e3b0_sp_get_pri_cli_reg_nig( + i, pri_set); + + pri_cli_pbf |= bnx2x_e3b0_sp_get_pri_cli_reg_pbf( + i, pri_set); + /* COS is used remove it from bitmap.*/ + cos_bit_to_set &= ~pri_bitmask; + pri_set++; + } + } + + if (pri_set != max_num_of_cos) { + DP(NETIF_MSG_LINK, "bnx2x_ets_e3b0_sp_set_pri_cli_reg not all " + "entries were set\n"); + return -EINVAL; + } + + if (port) { + /* Only 6 usable clients*/ + REG_WR(bp, NIG_REG_P1_TX_ARB_PRIORITY_CLIENT2_LSB, + (u32)pri_cli_nig); + + REG_WR(bp, PBF_REG_ETS_ARB_PRIORITY_CLIENT_P1 , pri_cli_pbf); + } else { + /* Only 9 usable clients*/ + const u32 pri_cli_nig_lsb = (u32) (pri_cli_nig); + const u32 pri_cli_nig_msb = (u32) ((pri_cli_nig >> 32) & 0xF); + + REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB, + pri_cli_nig_lsb); + REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB, + pri_cli_nig_msb); + + REG_WR(bp, PBF_REG_ETS_ARB_PRIORITY_CLIENT_P0 , pri_cli_pbf); + } + return 0; +} + +/****************************************************************************** +* Description: +* Configure the COS to ETS according to BW and SP settings. +******************************************************************************/ +int bnx2x_ets_e3b0_config(const struct link_params *params, + const struct link_vars *vars, + struct bnx2x_ets_params *ets_params) +{ + struct bnx2x *bp = params->bp; + int bnx2x_status = 0; + const u8 port = params->port; + u16 total_bw = 0; + const u32 min_w_val_nig = bnx2x_ets_get_min_w_val_nig(vars); + const u32 min_w_val_pbf = ETS_E3B0_PBF_MIN_W_VAL; + u8 cos_bw_bitmap = 0; + u8 cos_sp_bitmap = 0; + u8 sp_pri_to_cos[DCBX_MAX_NUM_COS] = {0}; + const u8 max_num_of_cos = (port) ? DCBX_E3B0_MAX_NUM_COS_PORT1 : + DCBX_E3B0_MAX_NUM_COS_PORT0; + u8 cos_entry = 0; + + if (!CHIP_IS_E3B0(bp)) { + DP(NETIF_MSG_LINK, + "bnx2x_ets_e3b0_disabled the chip isn't E3B0\n"); + return -EINVAL; + } + + if ((ets_params->num_of_cos > max_num_of_cos)) { + DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config the number of COS " + "isn't supported\n"); + return -EINVAL; + } + + /* Prepare sp strict priority parameters*/ + bnx2x_ets_e3b0_sp_pri_to_cos_init(sp_pri_to_cos); + + /* Prepare BW parameters*/ + bnx2x_status = bnx2x_ets_e3b0_get_total_bw(params, ets_params, + &total_bw); + if (bnx2x_status != 0) { + DP(NETIF_MSG_LINK, + "bnx2x_ets_E3B0_config get_total_bw failed\n"); + return -EINVAL; + } + + /* Upper bound is set according to current link speed (min_w_val + * should be the same for upper bound and COS credit val). + */ + bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val_nig); + bnx2x_ets_e3b0_set_credit_upper_bound_pbf(params, min_w_val_pbf); + + + for (cos_entry = 0; cos_entry < ets_params->num_of_cos; cos_entry++) { + if (bnx2x_cos_state_bw == ets_params->cos[cos_entry].state) { + cos_bw_bitmap |= (1 << cos_entry); + /* The function also sets the BW in HW(not the mappin + * yet) + */ + bnx2x_status = bnx2x_ets_e3b0_set_cos_bw( + bp, cos_entry, min_w_val_nig, min_w_val_pbf, + total_bw, + ets_params->cos[cos_entry].params.bw_params.bw, + port); + } else if (bnx2x_cos_state_strict == + ets_params->cos[cos_entry].state){ + cos_sp_bitmap |= (1 << cos_entry); + + bnx2x_status = bnx2x_ets_e3b0_sp_pri_to_cos_set( + params, + sp_pri_to_cos, + ets_params->cos[cos_entry].params.sp_params.pri, + cos_entry); + + } else { + DP(NETIF_MSG_LINK, + "bnx2x_ets_e3b0_config cos state not valid\n"); + return -EINVAL; + } + if (bnx2x_status != 0) { + DP(NETIF_MSG_LINK, + "bnx2x_ets_e3b0_config set cos bw failed\n"); + return bnx2x_status; + } + } + + /* Set SP register (which COS has higher priority) */ + bnx2x_status = bnx2x_ets_e3b0_sp_set_pri_cli_reg(params, + sp_pri_to_cos); + + if (bnx2x_status != 0) { + DP(NETIF_MSG_LINK, + "bnx2x_ets_E3B0_config set_pri_cli_reg failed\n"); + return bnx2x_status; + } + + /* Set client mapping of BW and strict */ + bnx2x_status = bnx2x_ets_e3b0_cli_map(params, ets_params, + cos_sp_bitmap, + cos_bw_bitmap); + + if (bnx2x_status != 0) { + DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config SP failed\n"); + return bnx2x_status; + } + return 0; +} +static void bnx2x_ets_bw_limit_common(const struct link_params *params) { /* ETS disabled configuration */ struct bnx2x *bp = params->bp; DP(NETIF_MSG_LINK, "ETS enabled BW limit configuration\n"); - /** - * defines which entries (clients) are subjected to WFQ arbitration - * COS0 0x8 - * COS1 0x10 - */ + /* Defines which entries (clients) are subjected to WFQ arbitration + * COS0 0x8 + * COS1 0x10 + */ REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0x18); - /** - * mapping between the ARB_CREDIT_WEIGHT registers and actual - * client numbers (WEIGHT_0 does not actually have to represent - * client 0) - * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 - * cos1-001 cos0-000 dbg1-100 dbg0-011 MCP-010 - */ + /* Mapping between the ARB_CREDIT_WEIGHT registers and actual + * client numbers (WEIGHT_0 does not actually have to represent + * client 0) + * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 + * cos1-001 cos0-000 dbg1-100 dbg0-011 MCP-010 + */ REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, 0x111A); REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_0, - ETS_BW_LIMIT_CREDIT_UPPER_BOUND); + ETS_BW_LIMIT_CREDIT_UPPER_BOUND); REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_1, - ETS_BW_LIMIT_CREDIT_UPPER_BOUND); + ETS_BW_LIMIT_CREDIT_UPPER_BOUND); /* ETS mode enabled*/ REG_WR(bp, PBF_REG_ETS_ENABLED, 1); /* Defines the number of consecutive slots for the strict priority */ REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0); - /** - * Bitmap of 5bits length. Each bit specifies whether the entry behaves - * as strict. Bits 0,1,2 - debug and management entries, 3 - COS0 - * entry, 4 - COS1 entry. - * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT - * bit4 bit3 bit2 bit1 bit0 - * MCP and debug are strict - */ + /* Bitmap of 5bits length. Each bit specifies whether the entry behaves + * as strict. Bits 0,1,2 - debug and management entries, 3 - COS0 + * entry, 4 - COS1 entry. + * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT + * bit4 bit3 bit2 bit1 bit0 + * MCP and debug are strict + */ REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7); /* Upper bound that COS0_WEIGHT can reach in the WFQ arbiter.*/ REG_WR(bp, PBF_REG_COS0_UPPER_BOUND, - ETS_BW_LIMIT_CREDIT_UPPER_BOUND); + ETS_BW_LIMIT_CREDIT_UPPER_BOUND); REG_WR(bp, PBF_REG_COS1_UPPER_BOUND, - ETS_BW_LIMIT_CREDIT_UPPER_BOUND); + ETS_BW_LIMIT_CREDIT_UPPER_BOUND); } void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, @@ -324,10 +1248,10 @@ void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, DP(NETIF_MSG_LINK, "ETS enabled BW limit configuration\n"); - if ((0 == total_bw) || - (0 == cos0_bw) || - (0 == cos1_bw)) { - DP(NETIF_MSG_LINK, "bnx2x_ets_bw_limit: Total BW can't be zero \n"); + if ((!total_bw) || + (!cos0_bw) || + (!cos1_bw)) { + DP(NETIF_MSG_LINK, "Total BW can't be zero\n"); return; } @@ -345,18 +1269,14 @@ void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, REG_WR(bp, PBF_REG_COS1_WEIGHT, cos1_credit_weight); } -u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos) +int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos) { /* ETS disabled configuration*/ struct bnx2x *bp = params->bp; u32 val = 0; - if ((1 < strict_cos) && (NULL == params)) - return -EINVAL; - DP(NETIF_MSG_LINK, "ETS enabled strict configuration\n"); - /** - * Bitmap of 5bits length. Each bit specifies whether the entry behaves + /* Bitmap of 5bits length. Each bit specifies whether the entry behaves * as strict. Bits 0,1,2 - debug and management entries, * 3 - COS0 entry, 4 - COS1 entry. * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT @@ -364,8 +1284,7 @@ u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos) * MCP and debug are strict */ REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x1F); - /** - * For strict priority entries defines the number of consecutive slots + /* For strict priority entries defines the number of consecutive slots * for the highest priority. */ REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100); @@ -377,41 +1296,83 @@ u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos) /* Defines the number of consecutive slots for the strict priority */ REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, strict_cos); - /** - * mapping between entry priority to client number (0,1,2 -debug and - * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST) - * 3bits client num. - * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 - * dbg0-010 dbg1-001 cos1-100 cos0-011 MCP-000 - * dbg0-010 dbg1-001 cos0-011 cos1-100 MCP-000 - */ - val = (0 == strict_cos) ? 0x2318 : 0x22E0; + /* Mapping between entry priority to client number (0,1,2 -debug and + * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST) + * 3bits client num. + * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 + * dbg0-010 dbg1-001 cos1-100 cos0-011 MCP-000 + * dbg0-010 dbg1-001 cos0-011 cos1-100 MCP-000 + */ + val = (!strict_cos) ? 0x2318 : 0x22E0; REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, val); return 0; } /******************************************************************/ -/* ETS section */ +/* PFC section */ /******************************************************************/ - -static void bnx2x_bmac2_get_pfc_stat(struct link_params *params, - u32 pfc_frames_sent[2], - u32 pfc_frames_received[2]) +static void bnx2x_update_pfc_xmac(struct link_params *params, + struct link_vars *vars, + u8 is_lb) { - /* Read pfc statistic */ struct bnx2x *bp = params->bp; - u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM : - NIG_REG_INGRESS_BMAC0_MEM; + u32 xmac_base; + u32 pause_val, pfc0_val, pfc1_val; - DP(NETIF_MSG_LINK, "pfc statistic read from BMAC\n"); + /* XMAC base adrr */ + xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; - REG_RD_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_STAT_GTPP, - pfc_frames_sent, 2); + /* Initialize pause and pfc registers */ + pause_val = 0x18000; + pfc0_val = 0xFFFF8000; + pfc1_val = 0x2; - REG_RD_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_STAT_GRPP, - pfc_frames_received, 2); + /* No PFC support */ + if (!(params->feature_config_flags & + FEATURE_CONFIG_PFC_ENABLED)) { + /* RX flow control - Process pause frame in receive direction + */ + if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX) + pause_val |= XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN; + + /* TX flow control - Send pause packet when buffer is full */ + if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) + pause_val |= XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN; + } else {/* PFC support */ + pfc1_val |= XMAC_PFC_CTRL_HI_REG_PFC_REFRESH_EN | + XMAC_PFC_CTRL_HI_REG_PFC_STATS_EN | + XMAC_PFC_CTRL_HI_REG_RX_PFC_EN | + XMAC_PFC_CTRL_HI_REG_TX_PFC_EN | + XMAC_PFC_CTRL_HI_REG_FORCE_PFC_XON; + /* Write pause and PFC registers */ + REG_WR(bp, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val); + REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val); + REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val); + pfc1_val &= ~XMAC_PFC_CTRL_HI_REG_FORCE_PFC_XON; + + } + + /* Write pause and PFC registers */ + REG_WR(bp, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val); + REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val); + REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val); + + + /* Set MAC address for source TX Pause/PFC frames */ + REG_WR(bp, xmac_base + XMAC_REG_CTRL_SA_LO, + ((params->mac_addr[2] << 24) | + (params->mac_addr[3] << 16) | + (params->mac_addr[4] << 8) | + (params->mac_addr[5]))); + REG_WR(bp, xmac_base + XMAC_REG_CTRL_SA_HI, + ((params->mac_addr[0] << 8) | + (params->mac_addr[1]))); + + udelay(30); } + + static void bnx2x_emac_get_pfc_stat(struct link_params *params, u32 pfc_frames_sent[2], u32 pfc_frames_received[2]) @@ -443,35 +1404,67 @@ static void bnx2x_emac_get_pfc_stat(struct link_params *params, pfc_frames_sent[0] = val_xon + val_xoff; } +/* Read pfc statistic*/ void bnx2x_pfc_statistic(struct link_params *params, struct link_vars *vars, u32 pfc_frames_sent[2], u32 pfc_frames_received[2]) { /* Read pfc statistic */ struct bnx2x *bp = params->bp; - u32 val = 0; + DP(NETIF_MSG_LINK, "pfc statistic\n"); if (!vars->link_up) return; - val = REG_RD(bp, MISC_REG_RESET_REG_2); - if ((val & (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) - == 0) { - DP(NETIF_MSG_LINK, "About to read stats from EMAC\n"); + if (vars->mac_type == MAC_TYPE_EMAC) { + DP(NETIF_MSG_LINK, "About to read PFC stats from EMAC\n"); bnx2x_emac_get_pfc_stat(params, pfc_frames_sent, pfc_frames_received); - } else { - DP(NETIF_MSG_LINK, "About to read stats from BMAC\n"); - bnx2x_bmac2_get_pfc_stat(params, pfc_frames_sent, - pfc_frames_received); } } /******************************************************************/ -/* MAC/PBF section */ +/* MAC/PBF section */ /******************************************************************/ +static void bnx2x_set_mdio_clk(struct bnx2x *bp, u32 chip_id, u8 port) +{ + u32 mode, emac_base; + /* Set clause 45 mode, slow down the MDIO clock to 2.5MHz + * (a value of 49==0x31) and make sure that the AUTO poll is off + */ + + if (CHIP_IS_E2(bp)) + emac_base = GRCBASE_EMAC0; + else + emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; + mode = REG_RD(bp, emac_base + EMAC_REG_EMAC_MDIO_MODE); + mode &= ~(EMAC_MDIO_MODE_AUTO_POLL | + EMAC_MDIO_MODE_CLOCK_CNT); + if (USES_WARPCORE(bp)) + mode |= (74L << EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT); + else + mode |= (49L << EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT); + + mode |= (EMAC_MDIO_MODE_CLAUSE_45); + REG_WR(bp, emac_base + EMAC_REG_EMAC_MDIO_MODE, mode); + + udelay(40); +} +static u8 bnx2x_is_4_port_mode(struct bnx2x *bp) +{ + u32 port4mode_ovwr_val; + /* Check 4-port override enabled */ + port4mode_ovwr_val = REG_RD(bp, MISC_REG_PORT4MODE_EN_OVWR); + if (port4mode_ovwr_val & (1<<0)) { + /* Return 4-port mode override value */ + return ((port4mode_ovwr_val & (1<<1)) == (1<<1)); + } + /* Return 4-port mode from input pin */ + return (u8)REG_RD(bp, MISC_REG_PORT4MODE_EN); +} + static void bnx2x_emac_init(struct link_params *params, - struct link_vars *vars) + struct link_vars *vars) { /* reset and unreset the emac core */ struct bnx2x *bp = params->bp; @@ -481,10 +1474,10 @@ static void bnx2x_emac_init(struct link_params *params, u16 timeout; REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, - (MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE << port)); + (MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE << port)); udelay(5); REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, - (MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE << port)); + (MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE << port)); /* init emac - use read-modify-write */ /* self clear reset */ @@ -501,7 +1494,7 @@ static void bnx2x_emac_init(struct link_params *params, } timeout--; } while (val & EMAC_MODE_RESET); - + bnx2x_set_mdio_clk(bp, params->chip_id, port); /* Set mac address */ val = ((params->mac_addr[0] << 8) | params->mac_addr[1]); @@ -514,8 +1507,248 @@ static void bnx2x_emac_init(struct link_params *params, EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + 4, val); } -u8 bnx2x_emac_enable(struct link_params *params, +static void bnx2x_set_xumac_nig(struct link_params *params, + u16 tx_pause_en, + u8 enable) +{ + struct bnx2x *bp = params->bp; + + REG_WR(bp, params->port ? NIG_REG_P1_MAC_IN_EN : NIG_REG_P0_MAC_IN_EN, + enable); + REG_WR(bp, params->port ? NIG_REG_P1_MAC_OUT_EN : NIG_REG_P0_MAC_OUT_EN, + enable); + REG_WR(bp, params->port ? NIG_REG_P1_MAC_PAUSE_OUT_EN : + NIG_REG_P0_MAC_PAUSE_OUT_EN, tx_pause_en); +} + +static void bnx2x_umac_disable(struct link_params *params) +{ + u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; + struct bnx2x *bp = params->bp; + if (!(REG_RD(bp, MISC_REG_RESET_REG_2) & + (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port))) + return; + + /* Disable RX and TX */ + REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, 0); +} + +static void bnx2x_umac_enable(struct link_params *params, struct link_vars *vars, u8 lb) +{ + u32 val; + u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; + struct bnx2x *bp = params->bp; + /* Reset UMAC */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, + (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port)); + msleep(1); + + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, + (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port)); + + DP(NETIF_MSG_LINK, "enabling UMAC\n"); + + /* This register opens the gate for the UMAC despite its name */ + REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1); + + val = UMAC_COMMAND_CONFIG_REG_PROMIS_EN | + UMAC_COMMAND_CONFIG_REG_PAD_EN | + UMAC_COMMAND_CONFIG_REG_SW_RESET | + UMAC_COMMAND_CONFIG_REG_NO_LGTH_CHECK; + switch (vars->line_speed) { + case SPEED_10: + val |= (0<<2); + break; + case SPEED_100: + val |= (1<<2); + break; + case SPEED_1000: + val |= (2<<2); + break; + case SPEED_2500: + val |= (3<<2); + break; + default: + DP(NETIF_MSG_LINK, "Invalid speed for UMAC %d\n", + vars->line_speed); + break; + } + if (!(vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)) + val |= UMAC_COMMAND_CONFIG_REG_IGNORE_TX_PAUSE; + + if (!(vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)) + val |= UMAC_COMMAND_CONFIG_REG_PAUSE_IGNORE; + + if (vars->duplex == DUPLEX_HALF) + val |= UMAC_COMMAND_CONFIG_REG_HD_ENA; + + REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, val); + udelay(50); + + /* Set MAC address for source TX Pause/PFC frames (under SW reset) */ + REG_WR(bp, umac_base + UMAC_REG_MAC_ADDR0, + ((params->mac_addr[2] << 24) | + (params->mac_addr[3] << 16) | + (params->mac_addr[4] << 8) | + (params->mac_addr[5]))); + REG_WR(bp, umac_base + UMAC_REG_MAC_ADDR1, + ((params->mac_addr[0] << 8) | + (params->mac_addr[1]))); + + /* Enable RX and TX */ + val &= ~UMAC_COMMAND_CONFIG_REG_PAD_EN; + val |= UMAC_COMMAND_CONFIG_REG_TX_ENA | + UMAC_COMMAND_CONFIG_REG_RX_ENA; + REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, val); + udelay(50); + + /* Remove SW Reset */ + val &= ~UMAC_COMMAND_CONFIG_REG_SW_RESET; + + /* Check loopback mode */ + if (lb) + val |= UMAC_COMMAND_CONFIG_REG_LOOP_ENA; + REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, val); + + /* Maximum Frame Length (RW). Defines a 14-Bit maximum frame + * length used by the MAC receive logic to check frames. + */ + REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710); + bnx2x_set_xumac_nig(params, + ((vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) != 0), 1); + vars->mac_type = MAC_TYPE_UMAC; + +} + +/* Define the XMAC mode */ +static void bnx2x_xmac_init(struct link_params *params, u32 max_speed) +{ + struct bnx2x *bp = params->bp; + u32 is_port4mode = bnx2x_is_4_port_mode(bp); + + /* In 4-port mode, need to set the mode only once, so if XMAC is + * already out of reset, it means the mode has already been set, + * and it must not* reset the XMAC again, since it controls both + * ports of the path + */ + + if ((CHIP_NUM(bp) == CHIP_NUM_57840) && + (REG_RD(bp, MISC_REG_RESET_REG_2) & + MISC_REGISTERS_RESET_REG_2_XMAC)) { + DP(NETIF_MSG_LINK, + "XMAC already out of reset in 4-port mode\n"); + return; + } + + /* Hard reset */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, + MISC_REGISTERS_RESET_REG_2_XMAC); + msleep(1); + + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, + MISC_REGISTERS_RESET_REG_2_XMAC); + if (is_port4mode) { + DP(NETIF_MSG_LINK, "Init XMAC to 2 ports x 10G per path\n"); + + /* Set the number of ports on the system side to up to 2 */ + REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 1); + + /* Set the number of ports on the Warp Core to 10G */ + REG_WR(bp, MISC_REG_XMAC_PHY_PORT_MODE, 3); + } else { + /* Set the number of ports on the system side to 1 */ + REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 0); + if (max_speed == SPEED_10000) { + DP(NETIF_MSG_LINK, + "Init XMAC to 10G x 1 port per path\n"); + /* Set the number of ports on the Warp Core to 10G */ + REG_WR(bp, MISC_REG_XMAC_PHY_PORT_MODE, 3); + } else { + DP(NETIF_MSG_LINK, + "Init XMAC to 20G x 2 ports per path\n"); + /* Set the number of ports on the Warp Core to 20G */ + REG_WR(bp, MISC_REG_XMAC_PHY_PORT_MODE, 1); + } + } + /* Soft reset */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, + MISC_REGISTERS_RESET_REG_2_XMAC_SOFT); + msleep(1); + + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, + MISC_REGISTERS_RESET_REG_2_XMAC_SOFT); + +} + +static void bnx2x_xmac_disable(struct link_params *params) +{ + u8 port = params->port; + struct bnx2x *bp = params->bp; + u32 pfc_ctrl, xmac_base = (port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; + + if (REG_RD(bp, MISC_REG_RESET_REG_2) & + MISC_REGISTERS_RESET_REG_2_XMAC) { + /* Send an indication to change the state in the NIG back to XON + * Clearing this bit enables the next set of this bit to get + * rising edge + */ + pfc_ctrl = REG_RD(bp, xmac_base + XMAC_REG_PFC_CTRL_HI); + REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, + (pfc_ctrl & ~(1<<1))); + REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, + (pfc_ctrl | (1<<1))); + DP(NETIF_MSG_LINK, "Disable XMAC on port %x\n", port); + REG_WR(bp, xmac_base + XMAC_REG_CTRL, 0); + } +} + +static int bnx2x_xmac_enable(struct link_params *params, + struct link_vars *vars, u8 lb) +{ + u32 val, xmac_base; + struct bnx2x *bp = params->bp; + DP(NETIF_MSG_LINK, "enabling XMAC\n"); + + xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; + + bnx2x_xmac_init(params, vars->line_speed); + + /* This register determines on which events the MAC will assert + * error on the i/f to the NIG along w/ EOP. + */ + + /* This register tells the NIG whether to send traffic to UMAC + * or XMAC + */ + REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 0); + + /* Set Max packet size */ + REG_WR(bp, xmac_base + XMAC_REG_RX_MAX_SIZE, 0x2710); + + /* CRC append for Tx packets */ + REG_WR(bp, xmac_base + XMAC_REG_TX_CTRL, 0xC800); + + /* update PFC */ + bnx2x_update_pfc_xmac(params, vars, 0); + + /* Enable TX and RX */ + val = XMAC_CTRL_REG_TX_EN | XMAC_CTRL_REG_RX_EN; + + /* Check loopback mode */ + if (lb) + val |= XMAC_CTRL_REG_LINE_LOCAL_LPBK; + REG_WR(bp, xmac_base + XMAC_REG_CTRL, val); + bnx2x_set_xumac_nig(params, + ((vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) != 0), 1); + + vars->mac_type = MAC_TYPE_XMAC; + + return 0; +} + +static int bnx2x_emac_enable(struct link_params *params, + struct link_vars *vars, u8 lb) { struct bnx2x *bp = params->bp; u8 port = params->port; @@ -524,6 +1757,10 @@ u8 bnx2x_emac_enable(struct link_params *params, DP(NETIF_MSG_LINK, "enabling EMAC\n"); + /* Disable BMAC */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, + (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); + /* enable emac and not bmac */ REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + port*4, 1); @@ -531,8 +1768,7 @@ u8 bnx2x_emac_enable(struct link_params *params, if (CHIP_REV_IS_EMUL(bp)) { /* Use lane 1 (of lanes 0-3) */ REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 1); - REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + - port*4, 1); + REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1); } /* for fpga */ else @@ -541,8 +1777,7 @@ u8 bnx2x_emac_enable(struct link_params *params, DP(NETIF_MSG_LINK, "bnx2x_emac_enable: Setting FPGA\n"); REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 1); - REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, - 0); + REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 0); } else /* ASIC */ if (vars->phy_flags & PHY_XGXS_FLAG) { @@ -552,17 +1787,14 @@ u8 bnx2x_emac_enable(struct link_params *params, DP(NETIF_MSG_LINK, "XGXS\n"); /* select the master lanes (out of 0-3) */ - REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + - port*4, ser_lane); + REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, ser_lane); /* select XGXS */ - REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + - port*4, 1); + REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1); } else { /* SerDes */ DP(NETIF_MSG_LINK, "SerDes\n"); /* select SerDes */ - REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + - port*4, 0); + REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 0); } bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_RX_MODE, @@ -573,8 +1805,7 @@ u8 bnx2x_emac_enable(struct link_params *params, if (CHIP_REV_IS_SLOW(bp)) { /* config GMII mode */ val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); - EMAC_WR(bp, EMAC_REG_EMAC_MODE, - (val | EMAC_MODE_PORT_GMII)); + EMAC_WR(bp, EMAC_REG_EMAC_MODE, (val | EMAC_MODE_PORT_GMII)); } else { /* ASIC */ /* pause enable/disable */ bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_RX_MODE, @@ -604,24 +1835,27 @@ u8 bnx2x_emac_enable(struct link_params *params, val = REG_RD(bp, emac_base + EMAC_REG_EMAC_RX_MODE); val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS; - /** - * Setting this bit causes MAC control frames (except for pause - * frames) to be passed on for processing. This setting has no - * affect on the operation of the pause frames. This bit effects - * all packets regardless of RX Parser packet sorting logic. - */ + /* Setting this bit causes MAC control frames (except for pause + * frames) to be passed on for processing. This setting has no + * affect on the operation of the pause frames. This bit effects + * all packets regardless of RX Parser packet sorting logic. + * Turn the PFC off to make sure we are in Xon state before + * enabling it. + */ + EMAC_WR(bp, EMAC_REG_RX_PFC_MODE, 0); if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) { DP(NETIF_MSG_LINK, "PFC is enabled\n"); + /* Enable PFC again */ EMAC_WR(bp, EMAC_REG_RX_PFC_MODE, - EMAC_REG_RX_PFC_MODE_RX_EN | - EMAC_REG_RX_PFC_MODE_TX_EN | - EMAC_REG_RX_PFC_MODE_PRIORITIES); + EMAC_REG_RX_PFC_MODE_RX_EN | + EMAC_REG_RX_PFC_MODE_TX_EN | + EMAC_REG_RX_PFC_MODE_PRIORITIES); EMAC_WR(bp, EMAC_REG_RX_PFC_PARAM, - ((0x0101 << - EMAC_REG_RX_PFC_PARAM_OPCODE_BITSHIFT) | - (0x00ff << - EMAC_REG_RX_PFC_PARAM_PRIORITY_EN_BITSHIFT))); + ((0x0101 << + EMAC_REG_RX_PFC_PARAM_OPCODE_BITSHIFT) | + (0x00ff << + EMAC_REG_RX_PFC_PARAM_PRIORITY_EN_BITSHIFT))); val |= EMAC_RX_MODE_KEEP_MAC_CONTROL; } EMAC_WR(bp, EMAC_REG_EMAC_RX_MODE, val); @@ -634,23 +1868,23 @@ u8 bnx2x_emac_enable(struct link_params *params, val &= ~0x810; EMAC_WR(bp, EMAC_REG_EMAC_MODE, val); - /* enable emac */ + /* Enable emac */ REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 1); - /* enable emac for jumbo packets */ + /* Enable emac for jumbo packets */ EMAC_WR(bp, EMAC_REG_EMAC_RX_MTU_SIZE, - (EMAC_RX_MTU_SIZE_JUMBO_ENA | - (ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD))); + (EMAC_RX_MTU_SIZE_JUMBO_ENA | + (ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD))); - /* strip CRC */ + /* Strip CRC */ REG_WR(bp, NIG_REG_NIG_INGRESS_EMAC0_NO_CRC + port*4, 0x1); - /* disable the NIG in/out to the bmac */ + /* Disable the NIG in/out to the bmac */ REG_WR(bp, NIG_REG_BMAC0_IN_EN + port*4, 0x0); REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + port*4, 0x0); REG_WR(bp, NIG_REG_BMAC0_OUT_EN + port*4, 0x0); - /* enable the NIG in/out to the emac */ + /* Enable the NIG in/out to the emac */ REG_WR(bp, NIG_REG_EMAC0_IN_EN + port*4, 0x1); val = 0; if ((params->feature_config_flags & @@ -662,12 +1896,11 @@ u8 bnx2x_emac_enable(struct link_params *params, REG_WR(bp, NIG_REG_EGRESS_EMAC0_OUT_EN + port*4, 0x1); if (CHIP_REV_IS_EMUL(bp)) { - /* take the BigMac out of reset */ - REG_WR(bp, - GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, - (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); + /* Take the BigMac out of reset */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, + (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); - /* enable access for bmac registers */ + /* Enable access for bmac registers */ REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x1); } else REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x0); @@ -685,17 +1918,16 @@ static void bnx2x_update_pfc_bmac1(struct link_params *params, NIG_REG_INGRESS_BMAC0_MEM; u32 val = 0x14; - if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) { - DP(NETIF_MSG_LINK, "PFC is enabled\n"); - val |= (1<<6); - } else if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX) + if ((!(params->feature_config_flags & + FEATURE_CONFIG_PFC_ENABLED)) && + (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)) + /* Enable BigMAC to react on received Pause packets */ val |= (1<<5); wb_data[0] = val; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_CONTROL, wb_data, 2); - /* tx control */ + /* TX control */ val = 0xc0; if (!(params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) && @@ -710,8 +1942,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params, struct link_vars *vars, u8 is_lb) { - /* - * Set rx control: Strip CRC and enable BigMAC to relay + /* Set rx control: Strip CRC and enable BigMAC to relay * control packets to the system as well */ u32 wb_data[2]; @@ -720,17 +1951,14 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params, NIG_REG_INGRESS_BMAC0_MEM; u32 val = 0x14; - if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) - /* When PFC is enabled, set BigMAC to relay control packets - * to the system as well*/ - val |= (1<<6); - else if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX) + if ((!(params->feature_config_flags & + FEATURE_CONFIG_PFC_ENABLED)) && + (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)) /* Enable BigMAC to react on received Pause packets */ val |= (1<<5); wb_data[0] = val; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_CONTROL, wb_data, 2); udelay(30); /* Tx control */ @@ -741,8 +1969,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params, val |= 0x800000; wb_data[0] = val; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_CONTROL, wb_data, 2); if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) { DP(NETIF_MSG_LINK, "PFC is enabled\n"); @@ -750,33 +1977,36 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params, wb_data[0] = 0x0; wb_data[0] |= (1<<0); /* RX */ wb_data[0] |= (1<<1); /* TX */ + wb_data[0] |= (1<<2); /* Force initial Xon */ wb_data[0] |= (1<<3); /* 8 cos */ wb_data[0] |= (1<<5); /* STATS */ wb_data[1] = 0; + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, + wb_data, 2); + /* Clear the force Xon */ + wb_data[0] &= ~(1<<2); } else { DP(NETIF_MSG_LINK, "PFC is disabled\n"); - /* disable PFC RX & TX & STATS and set 8 COS */ + /* Disable PFC RX & TX & STATS and set 8 COS */ wb_data[0] = 0x8; wb_data[1] = 0; } - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2); - /** - * Set Time (based unit is 512 bit time) between automatic - * re-sending of PP packets amd enable automatic re-send of - * Per-Priroity Packet as long as pp_gen is asserted and - * pp_disable is low. - */ + /* Set Time (based unit is 512 bit time) between automatic + * re-sending of PP packets amd enable automatic re-send of + * Per-Priroity Packet as long as pp_gen is asserted and + * pp_disable is low. + */ val = 0x8000; if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) val |= (1<<16); /* enable automatic re-send */ wb_data[0] = val; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_PAUSE_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_PAUSE_CONTROL, + wb_data, 2); /* mac control */ val = 0x3; /* Enable RX and TX */ @@ -790,94 +2020,449 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params, wb_data[0] = val; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2); } -static void bnx2x_update_pfc_brb(struct link_params *params, - struct link_vars *vars, - struct bnx2x_nig_brb_pfc_port_params *pfc_params) +/* PFC BRB internal port configuration params */ +struct bnx2x_pfc_brb_threshold_val { + u32 pause_xoff; + u32 pause_xon; + u32 full_xoff; + u32 full_xon; +}; + +struct bnx2x_pfc_brb_e3b0_val { + u32 per_class_guaranty_mode; + u32 lb_guarantied_hyst; + u32 full_lb_xoff_th; + u32 full_lb_xon_threshold; + u32 lb_guarantied; + u32 mac_0_class_t_guarantied; + u32 mac_0_class_t_guarantied_hyst; + u32 mac_1_class_t_guarantied; + u32 mac_1_class_t_guarantied_hyst; +}; + +struct bnx2x_pfc_brb_th_val { + struct bnx2x_pfc_brb_threshold_val pauseable_th; + struct bnx2x_pfc_brb_threshold_val non_pauseable_th; + struct bnx2x_pfc_brb_threshold_val default_class0; + struct bnx2x_pfc_brb_threshold_val default_class1; + +}; +static int bnx2x_pfc_brb_get_config_params( + struct link_params *params, + struct bnx2x_pfc_brb_th_val *config_val) { struct bnx2x *bp = params->bp; - int set_pfc = params->feature_config_flags & - FEATURE_CONFIG_PFC_ENABLED; + DP(NETIF_MSG_LINK, "Setting PFC BRB configuration\n"); + + config_val->default_class1.pause_xoff = 0; + config_val->default_class1.pause_xon = 0; + config_val->default_class1.full_xoff = 0; + config_val->default_class1.full_xon = 0; + + if (CHIP_IS_E2(bp)) { + /* Class0 defaults */ + config_val->default_class0.pause_xoff = + DEFAULT0_E2_BRB_MAC_PAUSE_XOFF_THR; + config_val->default_class0.pause_xon = + DEFAULT0_E2_BRB_MAC_PAUSE_XON_THR; + config_val->default_class0.full_xoff = + DEFAULT0_E2_BRB_MAC_FULL_XOFF_THR; + config_val->default_class0.full_xon = + DEFAULT0_E2_BRB_MAC_FULL_XON_THR; + /* Pause able*/ + config_val->pauseable_th.pause_xoff = + PFC_E2_BRB_MAC_PAUSE_XOFF_THR_PAUSE; + config_val->pauseable_th.pause_xon = + PFC_E2_BRB_MAC_PAUSE_XON_THR_PAUSE; + config_val->pauseable_th.full_xoff = + PFC_E2_BRB_MAC_FULL_XOFF_THR_PAUSE; + config_val->pauseable_th.full_xon = + PFC_E2_BRB_MAC_FULL_XON_THR_PAUSE; + /* Non pause able*/ + config_val->non_pauseable_th.pause_xoff = + PFC_E2_BRB_MAC_PAUSE_XOFF_THR_NON_PAUSE; + config_val->non_pauseable_th.pause_xon = + PFC_E2_BRB_MAC_PAUSE_XON_THR_NON_PAUSE; + config_val->non_pauseable_th.full_xoff = + PFC_E2_BRB_MAC_FULL_XOFF_THR_NON_PAUSE; + config_val->non_pauseable_th.full_xon = + PFC_E2_BRB_MAC_FULL_XON_THR_NON_PAUSE; + } else if (CHIP_IS_E3A0(bp)) { + /* Class0 defaults */ + config_val->default_class0.pause_xoff = + DEFAULT0_E3A0_BRB_MAC_PAUSE_XOFF_THR; + config_val->default_class0.pause_xon = + DEFAULT0_E3A0_BRB_MAC_PAUSE_XON_THR; + config_val->default_class0.full_xoff = + DEFAULT0_E3A0_BRB_MAC_FULL_XOFF_THR; + config_val->default_class0.full_xon = + DEFAULT0_E3A0_BRB_MAC_FULL_XON_THR; + /* Pause able */ + config_val->pauseable_th.pause_xoff = + PFC_E3A0_BRB_MAC_PAUSE_XOFF_THR_PAUSE; + config_val->pauseable_th.pause_xon = + PFC_E3A0_BRB_MAC_PAUSE_XON_THR_PAUSE; + config_val->pauseable_th.full_xoff = + PFC_E3A0_BRB_MAC_FULL_XOFF_THR_PAUSE; + config_val->pauseable_th.full_xon = + PFC_E3A0_BRB_MAC_FULL_XON_THR_PAUSE; + /* Non pause able*/ + config_val->non_pauseable_th.pause_xoff = + PFC_E3A0_BRB_MAC_PAUSE_XOFF_THR_NON_PAUSE; + config_val->non_pauseable_th.pause_xon = + PFC_E3A0_BRB_MAC_PAUSE_XON_THR_NON_PAUSE; + config_val->non_pauseable_th.full_xoff = + PFC_E3A0_BRB_MAC_FULL_XOFF_THR_NON_PAUSE; + config_val->non_pauseable_th.full_xon = + PFC_E3A0_BRB_MAC_FULL_XON_THR_NON_PAUSE; + } else if (CHIP_IS_E3B0(bp)) { + /* Class0 defaults */ + config_val->default_class0.pause_xoff = + DEFAULT0_E3B0_BRB_MAC_PAUSE_XOFF_THR; + config_val->default_class0.pause_xon = + DEFAULT0_E3B0_BRB_MAC_PAUSE_XON_THR; + config_val->default_class0.full_xoff = + DEFAULT0_E3B0_BRB_MAC_FULL_XOFF_THR; + config_val->default_class0.full_xon = + DEFAULT0_E3B0_BRB_MAC_FULL_XON_THR; + + if (params->phy[INT_PHY].flags & + FLAGS_4_PORT_MODE) { + config_val->pauseable_th.pause_xoff = + PFC_E3B0_4P_BRB_MAC_PAUSE_XOFF_THR_PAUSE; + config_val->pauseable_th.pause_xon = + PFC_E3B0_4P_BRB_MAC_PAUSE_XON_THR_PAUSE; + config_val->pauseable_th.full_xoff = + PFC_E3B0_4P_BRB_MAC_FULL_XOFF_THR_PAUSE; + config_val->pauseable_th.full_xon = + PFC_E3B0_4P_BRB_MAC_FULL_XON_THR_PAUSE; + /* Non pause able*/ + config_val->non_pauseable_th.pause_xoff = + PFC_E3B0_4P_BRB_MAC_PAUSE_XOFF_THR_NON_PAUSE; + config_val->non_pauseable_th.pause_xon = + PFC_E3B0_4P_BRB_MAC_PAUSE_XON_THR_NON_PAUSE; + config_val->non_pauseable_th.full_xoff = + PFC_E3B0_4P_BRB_MAC_FULL_XOFF_THR_NON_PAUSE; + config_val->non_pauseable_th.full_xon = + PFC_E3B0_4P_BRB_MAC_FULL_XON_THR_NON_PAUSE; + } else { + config_val->pauseable_th.pause_xoff = + PFC_E3B0_2P_BRB_MAC_PAUSE_XOFF_THR_PAUSE; + config_val->pauseable_th.pause_xon = + PFC_E3B0_2P_BRB_MAC_PAUSE_XON_THR_PAUSE; + config_val->pauseable_th.full_xoff = + PFC_E3B0_2P_BRB_MAC_FULL_XOFF_THR_PAUSE; + config_val->pauseable_th.full_xon = + PFC_E3B0_2P_BRB_MAC_FULL_XON_THR_PAUSE; + /* Non pause able*/ + config_val->non_pauseable_th.pause_xoff = + PFC_E3B0_2P_BRB_MAC_PAUSE_XOFF_THR_NON_PAUSE; + config_val->non_pauseable_th.pause_xon = + PFC_E3B0_2P_BRB_MAC_PAUSE_XON_THR_NON_PAUSE; + config_val->non_pauseable_th.full_xoff = + PFC_E3B0_2P_BRB_MAC_FULL_XOFF_THR_NON_PAUSE; + config_val->non_pauseable_th.full_xon = + PFC_E3B0_2P_BRB_MAC_FULL_XON_THR_NON_PAUSE; + } + } else + return -EINVAL; + + return 0; +} + +static void bnx2x_pfc_brb_get_e3b0_config_params( + struct link_params *params, + struct bnx2x_pfc_brb_e3b0_val + *e3b0_val, + struct bnx2x_nig_brb_pfc_port_params *pfc_params, + const u8 pfc_enabled) +{ + if (pfc_enabled && pfc_params) { + e3b0_val->per_class_guaranty_mode = 1; + e3b0_val->lb_guarantied_hyst = 80; + + if (params->phy[INT_PHY].flags & + FLAGS_4_PORT_MODE) { + e3b0_val->full_lb_xoff_th = + PFC_E3B0_4P_BRB_FULL_LB_XOFF_THR; + e3b0_val->full_lb_xon_threshold = + PFC_E3B0_4P_BRB_FULL_LB_XON_THR; + e3b0_val->lb_guarantied = + PFC_E3B0_4P_LB_GUART; + e3b0_val->mac_0_class_t_guarantied = + PFC_E3B0_4P_BRB_MAC_0_CLASS_T_GUART; + e3b0_val->mac_0_class_t_guarantied_hyst = + PFC_E3B0_4P_BRB_MAC_0_CLASS_T_GUART_HYST; + e3b0_val->mac_1_class_t_guarantied = + PFC_E3B0_4P_BRB_MAC_1_CLASS_T_GUART; + e3b0_val->mac_1_class_t_guarantied_hyst = + PFC_E3B0_4P_BRB_MAC_1_CLASS_T_GUART_HYST; + } else { + e3b0_val->full_lb_xoff_th = + PFC_E3B0_2P_BRB_FULL_LB_XOFF_THR; + e3b0_val->full_lb_xon_threshold = + PFC_E3B0_2P_BRB_FULL_LB_XON_THR; + e3b0_val->mac_0_class_t_guarantied_hyst = + PFC_E3B0_2P_BRB_MAC_0_CLASS_T_GUART_HYST; + e3b0_val->mac_1_class_t_guarantied = + PFC_E3B0_2P_BRB_MAC_1_CLASS_T_GUART; + e3b0_val->mac_1_class_t_guarantied_hyst = + PFC_E3B0_2P_BRB_MAC_1_CLASS_T_GUART_HYST; + + if (pfc_params->cos0_pauseable != + pfc_params->cos1_pauseable) { + /* Nonpauseable= Lossy + pauseable = Lossless*/ + e3b0_val->lb_guarantied = + PFC_E3B0_2P_MIX_PAUSE_LB_GUART; + e3b0_val->mac_0_class_t_guarantied = + PFC_E3B0_2P_MIX_PAUSE_MAC_0_CLASS_T_GUART; + } else if (pfc_params->cos0_pauseable) { + /* Lossless +Lossless*/ + e3b0_val->lb_guarantied = + PFC_E3B0_2P_PAUSE_LB_GUART; + e3b0_val->mac_0_class_t_guarantied = + PFC_E3B0_2P_PAUSE_MAC_0_CLASS_T_GUART; + } else { + /* Lossy +Lossy*/ + e3b0_val->lb_guarantied = + PFC_E3B0_2P_NON_PAUSE_LB_GUART; + e3b0_val->mac_0_class_t_guarantied = + PFC_E3B0_2P_NON_PAUSE_MAC_0_CLASS_T_GUART; + } + } + } else { + e3b0_val->per_class_guaranty_mode = 0; + e3b0_val->lb_guarantied_hyst = 0; + e3b0_val->full_lb_xoff_th = + DEFAULT_E3B0_BRB_FULL_LB_XOFF_THR; + e3b0_val->full_lb_xon_threshold = + DEFAULT_E3B0_BRB_FULL_LB_XON_THR; + e3b0_val->lb_guarantied = + DEFAULT_E3B0_LB_GUART; + e3b0_val->mac_0_class_t_guarantied = + DEFAULT_E3B0_BRB_MAC_0_CLASS_T_GUART; + e3b0_val->mac_0_class_t_guarantied_hyst = + DEFAULT_E3B0_BRB_MAC_0_CLASS_T_GUART_HYST; + e3b0_val->mac_1_class_t_guarantied = + DEFAULT_E3B0_BRB_MAC_1_CLASS_T_GUART; + e3b0_val->mac_1_class_t_guarantied_hyst = + DEFAULT_E3B0_BRB_MAC_1_CLASS_T_GUART_HYST; + } +} +static int bnx2x_update_pfc_brb(struct link_params *params, + struct link_vars *vars, + struct bnx2x_nig_brb_pfc_port_params + *pfc_params) +{ + struct bnx2x *bp = params->bp; + struct bnx2x_pfc_brb_th_val config_val = { {0} }; + struct bnx2x_pfc_brb_threshold_val *reg_th_config = + &config_val.pauseable_th; + struct bnx2x_pfc_brb_e3b0_val e3b0_val = {0}; + const int set_pfc = params->feature_config_flags & + FEATURE_CONFIG_PFC_ENABLED; + const u8 pfc_enabled = (set_pfc && pfc_params); + int bnx2x_status = 0; + u8 port = params->port; /* default - pause configuration */ - u32 pause_xoff_th = PFC_BRB_MAC_PAUSE_XOFF_THRESHOLD_PAUSEABLE; - u32 pause_xon_th = PFC_BRB_MAC_PAUSE_XON_THRESHOLD_PAUSEABLE; - u32 full_xoff_th = PFC_BRB_MAC_FULL_XOFF_THRESHOLD_PAUSEABLE; - u32 full_xon_th = PFC_BRB_MAC_FULL_XON_THRESHOLD_PAUSEABLE; + reg_th_config = &config_val.pauseable_th; + bnx2x_status = bnx2x_pfc_brb_get_config_params(params, &config_val); + if (bnx2x_status != 0) + return bnx2x_status; - if (set_pfc && pfc_params) + if (pfc_enabled) { /* First COS */ - if (!pfc_params->cos0_pauseable) { - pause_xoff_th = - PFC_BRB_MAC_PAUSE_XOFF_THRESHOLD_NON_PAUSEABLE; - pause_xon_th = - PFC_BRB_MAC_PAUSE_XON_THRESHOLD_NON_PAUSEABLE; - full_xoff_th = - PFC_BRB_MAC_FULL_XOFF_THRESHOLD_NON_PAUSEABLE; - full_xon_th = - PFC_BRB_MAC_FULL_XON_THRESHOLD_NON_PAUSEABLE; - } + if (pfc_params->cos0_pauseable) + reg_th_config = &config_val.pauseable_th; + else + reg_th_config = &config_val.non_pauseable_th; + } else + reg_th_config = &config_val.default_class0; /* The number of free blocks below which the pause signal to class 0 - of MAC #n is asserted. n=0,1 */ - REG_WR(bp, BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 , pause_xoff_th); + * of MAC #n is asserted. n=0,1 + */ + REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XOFF_THRESHOLD_1 : + BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 , + reg_th_config->pause_xoff); /* The number of free blocks above which the pause signal to class 0 - of MAC #n is de-asserted. n=0,1 */ - REG_WR(bp, BRB1_REG_PAUSE_0_XON_THRESHOLD_0 , pause_xon_th); + * of MAC #n is de-asserted. n=0,1 + */ + REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XON_THRESHOLD_1 : + BRB1_REG_PAUSE_0_XON_THRESHOLD_0 , reg_th_config->pause_xon); /* The number of free blocks below which the full signal to class 0 - of MAC #n is asserted. n=0,1 */ - REG_WR(bp, BRB1_REG_FULL_0_XOFF_THRESHOLD_0 , full_xoff_th); + * of MAC #n is asserted. n=0,1 + */ + REG_WR(bp, (port) ? BRB1_REG_FULL_0_XOFF_THRESHOLD_1 : + BRB1_REG_FULL_0_XOFF_THRESHOLD_0 , reg_th_config->full_xoff); /* The number of free blocks above which the full signal to class 0 - of MAC #n is de-asserted. n=0,1 */ - REG_WR(bp, BRB1_REG_FULL_0_XON_THRESHOLD_0 , full_xon_th); + * of MAC #n is de-asserted. n=0,1 + */ + REG_WR(bp, (port) ? BRB1_REG_FULL_0_XON_THRESHOLD_1 : + BRB1_REG_FULL_0_XON_THRESHOLD_0 , reg_th_config->full_xon); - if (set_pfc && pfc_params) { + if (pfc_enabled) { /* Second COS */ - if (pfc_params->cos1_pauseable) { - pause_xoff_th = - PFC_BRB_MAC_PAUSE_XOFF_THRESHOLD_PAUSEABLE; - pause_xon_th = - PFC_BRB_MAC_PAUSE_XON_THRESHOLD_PAUSEABLE; - full_xoff_th = - PFC_BRB_MAC_FULL_XOFF_THRESHOLD_PAUSEABLE; - full_xon_th = - PFC_BRB_MAC_FULL_XON_THRESHOLD_PAUSEABLE; - } else { - pause_xoff_th = - PFC_BRB_MAC_PAUSE_XOFF_THRESHOLD_NON_PAUSEABLE; - pause_xon_th = - PFC_BRB_MAC_PAUSE_XON_THRESHOLD_NON_PAUSEABLE; - full_xoff_th = - PFC_BRB_MAC_FULL_XOFF_THRESHOLD_NON_PAUSEABLE; - full_xon_th = - PFC_BRB_MAC_FULL_XON_THRESHOLD_NON_PAUSEABLE; - } - /** - * The number of free blocks below which the pause signal to - * class 1 of MAC #n is asserted. n=0,1 - **/ - REG_WR(bp, BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0, - pause_xoff_th); - /** - * The number of free blocks above which the pause signal to - * class 1 of MAC #n is de-asserted. n=0,1 - **/ - REG_WR(bp, BRB1_REG_PAUSE_1_XON_THRESHOLD_0, - pause_xon_th); - /** - * The number of free blocks below which the full signal to - * class 1 of MAC #n is asserted. n=0,1 - **/ - REG_WR(bp, BRB1_REG_FULL_1_XOFF_THRESHOLD_0, - full_xoff_th); - /** - * The number of free blocks above which the full signal to - * class 1 of MAC #n is de-asserted. n=0,1 - **/ - REG_WR(bp, BRB1_REG_FULL_1_XON_THRESHOLD_0, full_xon_th); + if (pfc_params->cos1_pauseable) + reg_th_config = &config_val.pauseable_th; + else + reg_th_config = &config_val.non_pauseable_th; + } else + reg_th_config = &config_val.default_class1; + /* The number of free blocks below which the pause signal to + * class 1 of MAC #n is asserted. n=0,1 + */ + REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XOFF_THRESHOLD_1 : + BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0, + reg_th_config->pause_xoff); + + /* The number of free blocks above which the pause signal to + * class 1 of MAC #n is de-asserted. n=0,1 + */ + REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XON_THRESHOLD_1 : + BRB1_REG_PAUSE_1_XON_THRESHOLD_0, + reg_th_config->pause_xon); + /* The number of free blocks below which the full signal to + * class 1 of MAC #n is asserted. n=0,1 + */ + REG_WR(bp, (port) ? BRB1_REG_FULL_1_XOFF_THRESHOLD_1 : + BRB1_REG_FULL_1_XOFF_THRESHOLD_0, + reg_th_config->full_xoff); + /* The number of free blocks above which the full signal to + * class 1 of MAC #n is de-asserted. n=0,1 + */ + REG_WR(bp, (port) ? BRB1_REG_FULL_1_XON_THRESHOLD_1 : + BRB1_REG_FULL_1_XON_THRESHOLD_0, + reg_th_config->full_xon); + + if (CHIP_IS_E3B0(bp)) { + bnx2x_pfc_brb_get_e3b0_config_params( + params, + &e3b0_val, + pfc_params, + pfc_enabled); + + REG_WR(bp, BRB1_REG_PER_CLASS_GUARANTY_MODE, + e3b0_val.per_class_guaranty_mode); + + /* The hysteresis on the guarantied buffer space for the Lb + * port before signaling XON. + */ + REG_WR(bp, BRB1_REG_LB_GUARANTIED_HYST, + e3b0_val.lb_guarantied_hyst); + + /* The number of free blocks below which the full signal to the + * LB port is asserted. + */ + REG_WR(bp, BRB1_REG_FULL_LB_XOFF_THRESHOLD, + e3b0_val.full_lb_xoff_th); + /* The number of free blocks above which the full signal to the + * LB port is de-asserted. + */ + REG_WR(bp, BRB1_REG_FULL_LB_XON_THRESHOLD, + e3b0_val.full_lb_xon_threshold); + /* The number of blocks guarantied for the MAC #n port. n=0,1 + */ + + /* The number of blocks guarantied for the LB port. */ + REG_WR(bp, BRB1_REG_LB_GUARANTIED, + e3b0_val.lb_guarantied); + + /* The number of blocks guarantied for the MAC #n port. */ + REG_WR(bp, BRB1_REG_MAC_GUARANTIED_0, + 2 * e3b0_val.mac_0_class_t_guarantied); + REG_WR(bp, BRB1_REG_MAC_GUARANTIED_1, + 2 * e3b0_val.mac_1_class_t_guarantied); + /* The number of blocks guarantied for class #t in MAC0. t=0,1 + */ + REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED, + e3b0_val.mac_0_class_t_guarantied); + REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED, + e3b0_val.mac_0_class_t_guarantied); + /* The hysteresis on the guarantied buffer space for class in + * MAC0. t=0,1 + */ + REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED_HYST, + e3b0_val.mac_0_class_t_guarantied_hyst); + REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED_HYST, + e3b0_val.mac_0_class_t_guarantied_hyst); + + /* The number of blocks guarantied for class #t in MAC1.t=0,1 + */ + REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED, + e3b0_val.mac_1_class_t_guarantied); + REG_WR(bp, BRB1_REG_MAC_1_CLASS_1_GUARANTIED, + e3b0_val.mac_1_class_t_guarantied); + /* The hysteresis on the guarantied buffer space for class #t + * in MAC1. t=0,1 + */ + REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED_HYST, + e3b0_val.mac_1_class_t_guarantied_hyst); + REG_WR(bp, BRB1_REG_MAC_1_CLASS_1_GUARANTIED_HYST, + e3b0_val.mac_1_class_t_guarantied_hyst); } + + return bnx2x_status; +} + +/****************************************************************************** +* Description: +* This function is needed because NIG ARB_CREDIT_WEIGHT_X are +* not continues and ARB_CREDIT_WEIGHT_0 + offset is suitable. +******************************************************************************/ +static int bnx2x_pfc_nig_rx_priority_mask(struct bnx2x *bp, + u8 cos_entry, + u32 priority_mask, u8 port) +{ + u32 nig_reg_rx_priority_mask_add = 0; + + switch (cos_entry) { + case 0: + nig_reg_rx_priority_mask_add = (port) ? + NIG_REG_P1_RX_COS0_PRIORITY_MASK : + NIG_REG_P0_RX_COS0_PRIORITY_MASK; + break; + case 1: + nig_reg_rx_priority_mask_add = (port) ? + NIG_REG_P1_RX_COS1_PRIORITY_MASK : + NIG_REG_P0_RX_COS1_PRIORITY_MASK; + break; + case 2: + nig_reg_rx_priority_mask_add = (port) ? + NIG_REG_P1_RX_COS2_PRIORITY_MASK : + NIG_REG_P0_RX_COS2_PRIORITY_MASK; + break; + case 3: + if (port) + return -EINVAL; + nig_reg_rx_priority_mask_add = NIG_REG_P0_RX_COS3_PRIORITY_MASK; + break; + case 4: + if (port) + return -EINVAL; + nig_reg_rx_priority_mask_add = NIG_REG_P0_RX_COS4_PRIORITY_MASK; + break; + case 5: + if (port) + return -EINVAL; + nig_reg_rx_priority_mask_add = NIG_REG_P0_RX_COS5_PRIORITY_MASK; + break; + } + + REG_WR(bp, nig_reg_rx_priority_mask_add, priority_mask); + + return 0; +} +static void bnx2x_update_mng(struct link_params *params, u32 link_status) +{ + struct bnx2x *bp = params->bp; + + REG_WR(bp, params->shmem_base + + offsetof(struct shmem_region, + port_mb[params->port].link_status), link_status); } static void bnx2x_update_pfc_nig(struct link_params *params, @@ -885,156 +2470,160 @@ static void bnx2x_update_pfc_nig(struct link_params *params, struct bnx2x_nig_brb_pfc_port_params *nig_params) { u32 xcm_mask = 0, ppp_enable = 0, pause_enable = 0, llfc_out_en = 0; - u32 llfc_enable = 0, xcm0_out_en = 0, p0_hwpfc_enable = 0; + u32 llfc_enable = 0, xcm_out_en = 0, hwpfc_enable = 0; u32 pkt_priority_to_cos = 0; - u32 val; struct bnx2x *bp = params->bp; - int port = params->port; + u8 port = params->port; + int set_pfc = params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED; DP(NETIF_MSG_LINK, "updating pfc nig parameters\n"); - /** - * When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set + /* When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set * MAC control frames (that are not pause packets) * will be forwarded to the XCM. */ - xcm_mask = REG_RD(bp, - port ? NIG_REG_LLH1_XCM_MASK : - NIG_REG_LLH0_XCM_MASK); - /** - * nig params will override non PFC params, since it's possible to + xcm_mask = REG_RD(bp, port ? NIG_REG_LLH1_XCM_MASK : + NIG_REG_LLH0_XCM_MASK); + /* NIG params will override non PFC params, since it's possible to * do transition from PFC to SAFC */ if (set_pfc) { pause_enable = 0; llfc_out_en = 0; llfc_enable = 0; + if (CHIP_IS_E3(bp)) + ppp_enable = 0; + else ppp_enable = 1; xcm_mask &= ~(port ? NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN : NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN); - xcm0_out_en = 0; - p0_hwpfc_enable = 1; + xcm_out_en = 0; + hwpfc_enable = 1; } else { if (nig_params) { llfc_out_en = nig_params->llfc_out_en; llfc_enable = nig_params->llfc_enable; pause_enable = nig_params->pause_enable; - } else /*defaul non PFC mode - PAUSE */ + } else /* Default non PFC mode - PAUSE */ pause_enable = 1; xcm_mask |= (port ? NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN : NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN); - xcm0_out_en = 1; + xcm_out_en = 1; } + if (CHIP_IS_E3(bp)) + REG_WR(bp, port ? NIG_REG_BRB1_PAUSE_IN_EN : + NIG_REG_BRB0_PAUSE_IN_EN, pause_enable); REG_WR(bp, port ? NIG_REG_LLFC_OUT_EN_1 : - NIG_REG_LLFC_OUT_EN_0, llfc_out_en); + NIG_REG_LLFC_OUT_EN_0, llfc_out_en); REG_WR(bp, port ? NIG_REG_LLFC_ENABLE_1 : - NIG_REG_LLFC_ENABLE_0, llfc_enable); + NIG_REG_LLFC_ENABLE_0, llfc_enable); REG_WR(bp, port ? NIG_REG_PAUSE_ENABLE_1 : - NIG_REG_PAUSE_ENABLE_0, pause_enable); + NIG_REG_PAUSE_ENABLE_0, pause_enable); REG_WR(bp, port ? NIG_REG_PPP_ENABLE_1 : - NIG_REG_PPP_ENABLE_0, ppp_enable); + NIG_REG_PPP_ENABLE_0, ppp_enable); REG_WR(bp, port ? NIG_REG_LLH1_XCM_MASK : - NIG_REG_LLH0_XCM_MASK, xcm_mask); + NIG_REG_LLH0_XCM_MASK, xcm_mask); - REG_WR(bp, NIG_REG_LLFC_EGRESS_SRC_ENABLE_0, 0x7); + REG_WR(bp, port ? NIG_REG_LLFC_EGRESS_SRC_ENABLE_1 : + NIG_REG_LLFC_EGRESS_SRC_ENABLE_0, 0x7); - /* output enable for RX_XCM # IF */ - REG_WR(bp, NIG_REG_XCM0_OUT_EN, xcm0_out_en); + /* Output enable for RX_XCM # IF */ + REG_WR(bp, port ? NIG_REG_XCM1_OUT_EN : + NIG_REG_XCM0_OUT_EN, xcm_out_en); /* HW PFC TX enable */ - REG_WR(bp, NIG_REG_P0_HWPFC_ENABLE, p0_hwpfc_enable); - - /* 0x2 = BMAC, 0x1= EMAC */ - switch (vars->mac_type) { - case MAC_TYPE_EMAC: - val = 1; - break; - case MAC_TYPE_BMAC: - val = 0; - break; - default: - val = 0; - break; - } - REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT, val); + REG_WR(bp, port ? NIG_REG_P1_HWPFC_ENABLE : + NIG_REG_P0_HWPFC_ENABLE, hwpfc_enable); if (nig_params) { + u8 i = 0; pkt_priority_to_cos = nig_params->pkt_priority_to_cos; - REG_WR(bp, port ? NIG_REG_P1_RX_COS0_PRIORITY_MASK : - NIG_REG_P0_RX_COS0_PRIORITY_MASK, - nig_params->rx_cos0_priority_mask); - - REG_WR(bp, port ? NIG_REG_P1_RX_COS1_PRIORITY_MASK : - NIG_REG_P0_RX_COS1_PRIORITY_MASK, - nig_params->rx_cos1_priority_mask); + for (i = 0; i < nig_params->num_of_rx_cos_priority_mask; i++) + bnx2x_pfc_nig_rx_priority_mask(bp, i, + nig_params->rx_cos_priority_mask[i], port); REG_WR(bp, port ? NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_1 : - NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0, - nig_params->llfc_high_priority_classes); + NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0, + nig_params->llfc_high_priority_classes); REG_WR(bp, port ? NIG_REG_LLFC_LOW_PRIORITY_CLASSES_1 : - NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0, - nig_params->llfc_low_priority_classes); + NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0, + nig_params->llfc_low_priority_classes); } REG_WR(bp, port ? NIG_REG_P1_PKT_PRIORITY_TO_COS : - NIG_REG_P0_PKT_PRIORITY_TO_COS, - pkt_priority_to_cos); + NIG_REG_P0_PKT_PRIORITY_TO_COS, + pkt_priority_to_cos); } - -void bnx2x_update_pfc(struct link_params *params, +int bnx2x_update_pfc(struct link_params *params, struct link_vars *vars, struct bnx2x_nig_brb_pfc_port_params *pfc_params) { - /** - * The PFC and pause are orthogonal to one another, meaning when + /* The PFC and pause are orthogonal to one another, meaning when * PFC is enabled, the pause are disabled, and when PFC is * disabled, pause are set according to the pause result. */ u32 val; struct bnx2x *bp = params->bp; + int bnx2x_status = 0; + u8 bmac_loopback = (params->loopback_mode == LOOPBACK_BMAC); - /* update NIG params */ + if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) + vars->link_status |= LINK_STATUS_PFC_ENABLED; + else + vars->link_status &= ~LINK_STATUS_PFC_ENABLED; + + bnx2x_update_mng(params, vars->link_status); + + /* Update NIG params */ bnx2x_update_pfc_nig(params, vars, pfc_params); - /* update BRB params */ - bnx2x_update_pfc_brb(params, vars, pfc_params); + /* Update BRB params */ + bnx2x_status = bnx2x_update_pfc_brb(params, vars, pfc_params); + if (bnx2x_status != 0) + return bnx2x_status; if (!vars->link_up) - return; - - val = REG_RD(bp, MISC_REG_RESET_REG_2); - if ((val & (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) - == 0) { - DP(NETIF_MSG_LINK, "About to update PFC in EMAC\n"); - bnx2x_emac_enable(params, vars, 0); - return; - } + return bnx2x_status; DP(NETIF_MSG_LINK, "About to update PFC in BMAC\n"); - if (CHIP_IS_E2(bp)) - bnx2x_update_pfc_bmac2(params, vars, 0); + if (CHIP_IS_E3(bp)) + bnx2x_update_pfc_xmac(params, vars, 0); else - bnx2x_update_pfc_bmac1(params, vars); + { + val = REG_RD(bp, MISC_REG_RESET_REG_2); + if ((val & + (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) + == 0) { + DP(NETIF_MSG_LINK, "About to update PFC in EMAC\n"); + bnx2x_emac_enable(params, vars, 0); + return bnx2x_status; + } + if (CHIP_IS_E2(bp)) + bnx2x_update_pfc_bmac2(params, vars, bmac_loopback); + else + bnx2x_update_pfc_bmac1(params, vars); - val = 0; - if ((params->feature_config_flags & - FEATURE_CONFIG_PFC_ENABLED) || - (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)) - val = 1; - REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + params->port*4, val); + val = 0; + if ((params->feature_config_flags & + FEATURE_CONFIG_PFC_ENABLED) || + (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)) + val = 1; + REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + params->port*4, val); + } + return bnx2x_status; } -static u8 bnx2x_bmac1_enable(struct link_params *params, - struct link_vars *vars, - u8 is_lb) +static int bnx2x_bmac1_enable(struct link_params *params, + struct link_vars *vars, + u8 is_lb) { struct bnx2x *bp = params->bp; u8 port = params->port; @@ -1048,21 +2637,19 @@ static u8 bnx2x_bmac1_enable(struct link_params *params, /* XGXS control */ wb_data[0] = 0x3c; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + - BIGMAC_REGISTER_BMAC_XGXS_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_BMAC_XGXS_CONTROL, + wb_data, 2); - /* tx MAC SA */ + /* TX MAC SA */ wb_data[0] = ((params->mac_addr[2] << 24) | (params->mac_addr[3] << 16) | (params->mac_addr[4] << 8) | params->mac_addr[5]); wb_data[1] = ((params->mac_addr[0] << 8) | params->mac_addr[1]); - REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_SOURCE_ADDR, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_SOURCE_ADDR, wb_data, 2); - /* mac control */ + /* MAC control */ val = 0x3; if (is_lb) { val |= 0x4; @@ -1070,50 +2657,44 @@ static u8 bnx2x_bmac1_enable(struct link_params *params, } wb_data[0] = val; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_BMAC_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_BMAC_CONTROL, wb_data, 2); - /* set rx mtu */ + /* Set rx mtu */ wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_MAX_SIZE, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_MAX_SIZE, wb_data, 2); bnx2x_update_pfc_bmac1(params, vars); - /* set tx mtu */ + /* Set tx mtu */ wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_MAX_SIZE, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_MAX_SIZE, wb_data, 2); - /* set cnt max size */ + /* Set cnt max size */ wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_CNT_MAX_SIZE, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_CNT_MAX_SIZE, wb_data, 2); - /* configure safc */ + /* Configure SAFC */ wb_data[0] = 0x1000200; wb_data[1] = 0; REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_LLFC_MSG_FLDS, - wb_data, 2); - /* fix for emulation */ + wb_data, 2); + /* Fix for emulation */ if (CHIP_REV_IS_EMUL(bp)) { wb_data[0] = 0xf000; wb_data[1] = 0; - REG_WR_DMAE(bp, - bmac_addr + BIGMAC_REGISTER_TX_PAUSE_THRESHOLD, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_PAUSE_THRESHOLD, + wb_data, 2); } - return 0; } -static u8 bnx2x_bmac2_enable(struct link_params *params, - struct link_vars *vars, - u8 is_lb) +static int bnx2x_bmac2_enable(struct link_params *params, + struct link_vars *vars, + u8 is_lb) { struct bnx2x *bp = params->bp; u8 port = params->port; @@ -1125,20 +2706,18 @@ static u8 bnx2x_bmac2_enable(struct link_params *params, wb_data[0] = 0; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2); udelay(30); /* XGXS control: Reset phy HW, MDIO registers, PHY PLL and BMAC */ wb_data[0] = 0x3c; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + - BIGMAC2_REGISTER_BMAC_XGXS_CONTROL, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_XGXS_CONTROL, + wb_data, 2); udelay(30); - /* tx MAC SA */ + /* TX MAC SA */ wb_data[0] = ((params->mac_addr[2] << 24) | (params->mac_addr[3] << 16) | (params->mac_addr[4] << 8) | @@ -1146,7 +2725,7 @@ static u8 bnx2x_bmac2_enable(struct link_params *params, wb_data[1] = ((params->mac_addr[0] << 8) | params->mac_addr[1]); REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_SOURCE_ADDR, - wb_data, 2); + wb_data, 2); udelay(30); @@ -1154,49 +2733,47 @@ static u8 bnx2x_bmac2_enable(struct link_params *params, wb_data[0] = 0x1000200; wb_data[1] = 0; REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_LLFC_MSG_FLDS, - wb_data, 2); + wb_data, 2); udelay(30); - /* set rx mtu */ + /* Set RX MTU */ wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_MAX_SIZE, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_MAX_SIZE, wb_data, 2); udelay(30); - /* set tx mtu */ + /* Set TX MTU */ wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_MAX_SIZE, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_MAX_SIZE, wb_data, 2); udelay(30); - /* set cnt max size */ + /* Set cnt max size */ wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD - 2; wb_data[1] = 0; - REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_CNT_MAX_SIZE, - wb_data, 2); + REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_CNT_MAX_SIZE, wb_data, 2); udelay(30); bnx2x_update_pfc_bmac2(params, vars, is_lb); return 0; } -u8 bnx2x_bmac_enable(struct link_params *params, - struct link_vars *vars, - u8 is_lb) +static int bnx2x_bmac_enable(struct link_params *params, + struct link_vars *vars, + u8 is_lb) { - u8 rc, port = params->port; + int rc = 0; + u8 port = params->port; struct bnx2x *bp = params->bp; u32 val; - /* reset and unreset the BigMac */ + /* Reset and unreset the BigMac */ REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, - (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); + (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); msleep(1); REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, - (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); + (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); - /* enable access for bmac registers */ + /* Enable access for bmac registers */ REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x1); /* Enable BMAC according to BMAC type*/ @@ -1223,23 +2800,12 @@ u8 bnx2x_bmac_enable(struct link_params *params, return rc; } -static void bnx2x_update_mng(struct link_params *params, u32 link_status) -{ - struct bnx2x *bp = params->bp; - - REG_WR(bp, params->shmem_base + - offsetof(struct shmem_region, - port_mb[params->port].link_status), - link_status); -} - static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u32 chip_id, u8 port) { u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM : NIG_REG_INGRESS_BMAC0_MEM; u32 wb_data[2]; - u32 nig_bmac_enable = REG_RD(bp, NIG_REG_BMAC0_REGS_OUT_EN + - port*4); + u32 nig_bmac_enable = REG_RD(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4); /* Only if the bmac is out of reset */ if (REG_RD(bp, MISC_REG_RESET_REG_2) & @@ -1249,12 +2815,12 @@ static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u32 chip_id, u8 port) if (CHIP_IS_E2(bp)) { /* Clear Rx Enable bit in BMAC_CONTROL register */ REG_RD_DMAE(bp, bmac_addr + - BIGMAC2_REGISTER_BMAC_CONTROL, - wb_data, 2); + BIGMAC2_REGISTER_BMAC_CONTROL, + wb_data, 2); wb_data[0] &= ~BMAC_CONTROL_RX_ENABLE; REG_WR_DMAE(bp, bmac_addr + - BIGMAC2_REGISTER_BMAC_CONTROL, - wb_data, 2); + BIGMAC2_REGISTER_BMAC_CONTROL, + wb_data, 2); } else { /* Clear Rx Enable bit in BMAC_CONTROL register */ REG_RD_DMAE(bp, bmac_addr + @@ -1269,18 +2835,18 @@ static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u32 chip_id, u8 port) } } -u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl, - u32 line_speed) +static int bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl, + u32 line_speed) { struct bnx2x *bp = params->bp; u8 port = params->port; u32 init_crd, crd; u32 count = 1000; - /* disable port */ + /* Disable port */ REG_WR(bp, PBF_REG_DISABLE_NEW_TASK_PROC_P0 + port*4, 0x1); - /* wait for init credit */ + /* Wait for init credit */ init_crd = REG_RD(bp, PBF_REG_P0_INIT_CRD + port*4); crd = REG_RD(bp, PBF_REG_P0_CREDIT + port*8); DP(NETIF_MSG_LINK, "init_crd 0x%x crd 0x%x\n", init_crd, crd); @@ -1294,7 +2860,7 @@ u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl, crd = REG_RD(bp, PBF_REG_P0_CREDIT + port*8); if (init_crd != crd) { DP(NETIF_MSG_LINK, "BUG! init_crd 0x%x != crd 0x%x\n", - init_crd, crd); + init_crd, crd); return -EINVAL; } @@ -1304,62 +2870,48 @@ u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl, line_speed == SPEED_1000 || line_speed == SPEED_2500) { REG_WR(bp, PBF_REG_P0_PAUSE_ENABLE + port*4, 1); - /* update threshold */ + /* Update threshold */ REG_WR(bp, PBF_REG_P0_ARB_THRSH + port*4, 0); - /* update init credit */ - init_crd = 778; /* (800-18-4) */ + /* Update init credit */ + init_crd = 778; /* (800-18-4) */ } else { u32 thresh = (ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD)/16; REG_WR(bp, PBF_REG_P0_PAUSE_ENABLE + port*4, 0); - /* update threshold */ + /* Update threshold */ REG_WR(bp, PBF_REG_P0_ARB_THRSH + port*4, thresh); - /* update init credit */ + /* Update init credit */ switch (line_speed) { case SPEED_10000: init_crd = thresh + 553 - 22; break; - - case SPEED_12000: - init_crd = thresh + 664 - 22; - break; - - case SPEED_13000: - init_crd = thresh + 742 - 22; - break; - - case SPEED_16000: - init_crd = thresh + 778 - 22; - break; default: DP(NETIF_MSG_LINK, "Invalid line_speed 0x%x\n", - line_speed); + line_speed); return -EINVAL; } } REG_WR(bp, PBF_REG_P0_INIT_CRD + port*4, init_crd); DP(NETIF_MSG_LINK, "PBF updated to speed %d credit %d\n", - line_speed, init_crd); + line_speed, init_crd); - /* probe the credit changes */ + /* Probe the credit changes */ REG_WR(bp, PBF_REG_INIT_P0 + port*4, 0x1); msleep(5); REG_WR(bp, PBF_REG_INIT_P0 + port*4, 0x0); - /* enable port */ + /* Enable port */ REG_WR(bp, PBF_REG_DISABLE_NEW_TASK_PROC_P0 + port*4, 0x0); return 0; } /** - * get_emac_base + * bnx2x_get_emac_base - retrive emac base address * - * @param cb - * @param mdc_mdio_access - * @param port - * - * @return u32 + * @bp: driver handle + * @mdc_mdio_access: access type + * @port: port id * * This function selects the MDC/MDIO access (through emac0 or * emac1) depend on the mdc_mdio_access, port, port swapped. Each @@ -1398,42 +2950,34 @@ static u32 bnx2x_get_emac_base(struct bnx2x *bp, break; } return emac_base; + } /******************************************************************/ -/* CL45 access functions */ +/* CL22 access functions */ /******************************************************************/ -u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, - u8 devad, u16 reg, u16 val) +static int bnx2x_cl22_write(struct bnx2x *bp, + struct bnx2x_phy *phy, + u16 reg, u16 val) { - u32 tmp, saved_mode; - u8 i, rc = 0; - /** - * Set clause 45 mode, slow down the MDIO clock to 2.5MHz - * (a value of 49==0x31) and make sure that the AUTO poll is off - */ + u32 tmp, mode; + u8 i; + int rc = 0; + /* Switch to CL22 */ + mode = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); + REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, + mode & ~EMAC_MDIO_MODE_CLAUSE_45); - saved_mode = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); - tmp = saved_mode & ~(EMAC_MDIO_MODE_AUTO_POLL | - EMAC_MDIO_MODE_CLOCK_CNT); - tmp |= (EMAC_MDIO_MODE_CLAUSE_45 | - (49 << EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT)); - REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, tmp); - REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); - udelay(40); - - /* address */ - - tmp = ((phy->addr << 21) | (devad << 16) | reg | - EMAC_MDIO_COMM_COMMAND_ADDRESS | + /* Address */ + tmp = ((phy->addr << 21) | (reg << 16) | val | + EMAC_MDIO_COMM_COMMAND_WRITE_22 | EMAC_MDIO_COMM_START_BUSY); REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, tmp); for (i = 0; i < 50; i++) { udelay(10); - tmp = REG_RD(bp, phy->mdio_ctrl + - EMAC_REG_EMAC_MDIO_COMM); + tmp = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM); if (!(tmp & EMAC_MDIO_COMM_START_BUSY)) { udelay(5); break; @@ -1442,67 +2986,36 @@ u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, if (tmp & EMAC_MDIO_COMM_START_BUSY) { DP(NETIF_MSG_LINK, "write phy register failed\n"); rc = -EFAULT; - } else { - /* data */ - tmp = ((phy->addr << 21) | (devad << 16) | val | - EMAC_MDIO_COMM_COMMAND_WRITE_45 | - EMAC_MDIO_COMM_START_BUSY); - REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, tmp); - - for (i = 0; i < 50; i++) { - udelay(10); - - tmp = REG_RD(bp, phy->mdio_ctrl + - EMAC_REG_EMAC_MDIO_COMM); - if (!(tmp & EMAC_MDIO_COMM_START_BUSY)) { - udelay(5); - break; - } - } - if (tmp & EMAC_MDIO_COMM_START_BUSY) { - DP(NETIF_MSG_LINK, "write phy register failed\n"); - rc = -EFAULT; - } } - - /* Restore the saved mode */ - REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, saved_mode); - + REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, mode); return rc; } -u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, - u8 devad, u16 reg, u16 *ret_val) +static int bnx2x_cl22_read(struct bnx2x *bp, + struct bnx2x_phy *phy, + u16 reg, u16 *ret_val) { - u32 val, saved_mode; + u32 val, mode; u16 i; - u8 rc = 0; - /** - * Set clause 45 mode, slow down the MDIO clock to 2.5MHz - * (a value of 49==0x31) and make sure that the AUTO poll is off - */ + int rc = 0; - saved_mode = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); - val = saved_mode & ((EMAC_MDIO_MODE_AUTO_POLL | - EMAC_MDIO_MODE_CLOCK_CNT)); - val |= (EMAC_MDIO_MODE_CLAUSE_45 | - (49L << EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT)); - REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, val); - REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); - udelay(40); + /* Switch to CL22 */ + mode = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); + REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, + mode & ~EMAC_MDIO_MODE_CLAUSE_45); - /* address */ - val = ((phy->addr << 21) | (devad << 16) | reg | - EMAC_MDIO_COMM_COMMAND_ADDRESS | + /* Address */ + val = ((phy->addr << 21) | (reg << 16) | + EMAC_MDIO_COMM_COMMAND_READ_22 | EMAC_MDIO_COMM_START_BUSY); REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, val); for (i = 0; i < 50; i++) { udelay(10); - val = REG_RD(bp, phy->mdio_ctrl + - EMAC_REG_EMAC_MDIO_COMM); + val = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM); if (!(val & EMAC_MDIO_COMM_START_BUSY)) { + *ret_val = (u16)(val & EMAC_MDIO_COMM_DATA); udelay(5); break; } @@ -1512,9 +3025,46 @@ u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, *ret_val = 0; rc = -EFAULT; + } + REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, mode); + return rc; +} +/******************************************************************/ +/* CL45 access functions */ +/******************************************************************/ +static int bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, + u8 devad, u16 reg, u16 *ret_val) +{ + u32 val; + u16 i; + int rc = 0; + if (phy->flags & FLAGS_MDC_MDIO_WA_B0) + bnx2x_bits_en(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_STATUS, + EMAC_MDIO_STATUS_10MB); + /* Address */ + val = ((phy->addr << 21) | (devad << 16) | reg | + EMAC_MDIO_COMM_COMMAND_ADDRESS | + EMAC_MDIO_COMM_START_BUSY); + REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, val); + + for (i = 0; i < 50; i++) { + udelay(10); + + val = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM); + if (!(val & EMAC_MDIO_COMM_START_BUSY)) { + udelay(5); + break; + } + } + if (val & EMAC_MDIO_COMM_START_BUSY) { + DP(NETIF_MSG_LINK, "read phy register failed\n"); + netdev_err(bp->dev, "MDC/MDIO access timeout\n" + ); + *ret_val = 0; + rc = -EFAULT; } else { - /* data */ + /* Data */ val = ((phy->addr << 21) | (devad << 16) | EMAC_MDIO_COMM_COMMAND_READ_45 | EMAC_MDIO_COMM_START_BUSY); @@ -1524,7 +3074,7 @@ u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, udelay(10); val = REG_RD(bp, phy->mdio_ctrl + - EMAC_REG_EMAC_MDIO_COMM); + EMAC_REG_EMAC_MDIO_COMM); if (!(val & EMAC_MDIO_COMM_START_BUSY)) { *ret_val = (u16)(val & EMAC_MDIO_COMM_DATA); break; @@ -1532,24 +3082,229 @@ u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, } if (val & EMAC_MDIO_COMM_START_BUSY) { DP(NETIF_MSG_LINK, "read phy register failed\n"); - + netdev_err(bp->dev, "MDC/MDIO access timeout\n" + ); *ret_val = 0; rc = -EFAULT; } } + /* Work around for E3 A0 */ + if (phy->flags & FLAGS_MDC_MDIO_WA) { + phy->flags ^= FLAGS_DUMMY_READ; + if (phy->flags & FLAGS_DUMMY_READ) { + u16 temp_val; + bnx2x_cl45_read(bp, phy, devad, 0xf, &temp_val); + } + } - /* Restore the saved mode */ - REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, saved_mode); - + if (phy->flags & FLAGS_MDC_MDIO_WA_B0) + bnx2x_bits_dis(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_STATUS, + EMAC_MDIO_STATUS_10MB); return rc; } -u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr, - u8 devad, u16 reg, u16 *ret_val) +static int bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, + u8 devad, u16 reg, u16 val) +{ + u32 tmp; + u8 i; + int rc = 0; + if (phy->flags & FLAGS_MDC_MDIO_WA_B0) + bnx2x_bits_en(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_STATUS, + EMAC_MDIO_STATUS_10MB); + + /* Address */ + tmp = ((phy->addr << 21) | (devad << 16) | reg | + EMAC_MDIO_COMM_COMMAND_ADDRESS | + EMAC_MDIO_COMM_START_BUSY); + REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, tmp); + + for (i = 0; i < 50; i++) { + udelay(10); + + tmp = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM); + if (!(tmp & EMAC_MDIO_COMM_START_BUSY)) { + udelay(5); + break; + } + } + if (tmp & EMAC_MDIO_COMM_START_BUSY) { + DP(NETIF_MSG_LINK, "write phy register failed\n"); + netdev_err(bp->dev, "MDC/MDIO access timeout\n" + ); + rc = -EFAULT; + } else { + /* Data */ + tmp = ((phy->addr << 21) | (devad << 16) | val | + EMAC_MDIO_COMM_COMMAND_WRITE_45 | + EMAC_MDIO_COMM_START_BUSY); + REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, tmp); + + for (i = 0; i < 50; i++) { + udelay(10); + + tmp = REG_RD(bp, phy->mdio_ctrl + + EMAC_REG_EMAC_MDIO_COMM); + if (!(tmp & EMAC_MDIO_COMM_START_BUSY)) { + udelay(5); + break; + } + } + if (tmp & EMAC_MDIO_COMM_START_BUSY) { + DP(NETIF_MSG_LINK, "write phy register failed\n"); + netdev_err(bp->dev, "MDC/MDIO access timeout\n" + ); + rc = -EFAULT; + } + } + /* Work around for E3 A0 */ + if (phy->flags & FLAGS_MDC_MDIO_WA) { + phy->flags ^= FLAGS_DUMMY_READ; + if (phy->flags & FLAGS_DUMMY_READ) { + u16 temp_val; + bnx2x_cl45_read(bp, phy, devad, 0xf, &temp_val); + } + } + if (phy->flags & FLAGS_MDC_MDIO_WA_B0) + bnx2x_bits_dis(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_STATUS, + EMAC_MDIO_STATUS_10MB); + return rc; +} +/******************************************************************/ +/* BSC access functions from E3 */ +/******************************************************************/ +static void bnx2x_bsc_module_sel(struct link_params *params) +{ + int idx; + u32 board_cfg, sfp_ctrl; + u32 i2c_pins[I2C_SWITCH_WIDTH], i2c_val[I2C_SWITCH_WIDTH]; + struct bnx2x *bp = params->bp; + u8 port = params->port; + /* Read I2C output PINs */ + board_cfg = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.shared_hw_config.board)); + i2c_pins[I2C_BSC0] = board_cfg & SHARED_HW_CFG_E3_I2C_MUX0_MASK; + i2c_pins[I2C_BSC1] = (board_cfg & SHARED_HW_CFG_E3_I2C_MUX1_MASK) >> + SHARED_HW_CFG_E3_I2C_MUX1_SHIFT; + + /* Read I2C output value */ + sfp_ctrl = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].e3_cmn_pin_cfg)); + i2c_val[I2C_BSC0] = (sfp_ctrl & PORT_HW_CFG_E3_I2C_MUX0_MASK) > 0; + i2c_val[I2C_BSC1] = (sfp_ctrl & PORT_HW_CFG_E3_I2C_MUX1_MASK) > 0; + DP(NETIF_MSG_LINK, "Setting BSC switch\n"); + for (idx = 0; idx < I2C_SWITCH_WIDTH; idx++) + bnx2x_set_cfg_pin(bp, i2c_pins[idx], i2c_val[idx]); +} + +static int bnx2x_bsc_read(struct link_params *params, + struct bnx2x_phy *phy, + u8 sl_devid, + u16 sl_addr, + u8 lc_addr, + u8 xfer_cnt, + u32 *data_array) +{ + u32 val, i; + int rc = 0; + struct bnx2x *bp = params->bp; + + if ((sl_devid != 0xa0) && (sl_devid != 0xa2)) { + DP(NETIF_MSG_LINK, "invalid sl_devid 0x%x\n", sl_devid); + return -EINVAL; + } + + if (xfer_cnt > 16) { + DP(NETIF_MSG_LINK, "invalid xfer_cnt %d. Max is 16 bytes\n", + xfer_cnt); + return -EINVAL; + } + bnx2x_bsc_module_sel(params); + + xfer_cnt = 16 - lc_addr; + + /* Enable the engine */ + val = REG_RD(bp, MCP_REG_MCPR_IMC_COMMAND); + val |= MCPR_IMC_COMMAND_ENABLE; + REG_WR(bp, MCP_REG_MCPR_IMC_COMMAND, val); + + /* Program slave device ID */ + val = (sl_devid << 16) | sl_addr; + REG_WR(bp, MCP_REG_MCPR_IMC_SLAVE_CONTROL, val); + + /* Start xfer with 0 byte to update the address pointer ???*/ + val = (MCPR_IMC_COMMAND_ENABLE) | + (MCPR_IMC_COMMAND_WRITE_OP << + MCPR_IMC_COMMAND_OPERATION_BITSHIFT) | + (lc_addr << MCPR_IMC_COMMAND_TRANSFER_ADDRESS_BITSHIFT) | (0); + REG_WR(bp, MCP_REG_MCPR_IMC_COMMAND, val); + + /* Poll for completion */ + i = 0; + val = REG_RD(bp, MCP_REG_MCPR_IMC_COMMAND); + while (((val >> MCPR_IMC_COMMAND_IMC_STATUS_BITSHIFT) & 0x3) != 1) { + udelay(10); + val = REG_RD(bp, MCP_REG_MCPR_IMC_COMMAND); + if (i++ > 1000) { + DP(NETIF_MSG_LINK, "wr 0 byte timed out after %d try\n", + i); + rc = -EFAULT; + break; + } + } + if (rc == -EFAULT) + return rc; + + /* Start xfer with read op */ + val = (MCPR_IMC_COMMAND_ENABLE) | + (MCPR_IMC_COMMAND_READ_OP << + MCPR_IMC_COMMAND_OPERATION_BITSHIFT) | + (lc_addr << MCPR_IMC_COMMAND_TRANSFER_ADDRESS_BITSHIFT) | + (xfer_cnt); + REG_WR(bp, MCP_REG_MCPR_IMC_COMMAND, val); + + /* Poll for completion */ + i = 0; + val = REG_RD(bp, MCP_REG_MCPR_IMC_COMMAND); + while (((val >> MCPR_IMC_COMMAND_IMC_STATUS_BITSHIFT) & 0x3) != 1) { + udelay(10); + val = REG_RD(bp, MCP_REG_MCPR_IMC_COMMAND); + if (i++ > 1000) { + DP(NETIF_MSG_LINK, "rd op timed out after %d try\n", i); + rc = -EFAULT; + break; + } + } + if (rc == -EFAULT) + return rc; + + for (i = (lc_addr >> 2); i < 4; i++) { + data_array[i] = REG_RD(bp, (MCP_REG_MCPR_IMC_DATAREG0 + i*4)); +#ifdef __BIG_ENDIAN + data_array[i] = ((data_array[i] & 0x000000ff) << 24) | + ((data_array[i] & 0x0000ff00) << 8) | + ((data_array[i] & 0x00ff0000) >> 8) | + ((data_array[i] & 0xff000000) >> 24); +#endif + } + return rc; +} + +static void bnx2x_cl45_read_or_write(struct bnx2x *bp, struct bnx2x_phy *phy, + u8 devad, u16 reg, u16 or_val) +{ + u16 val; + bnx2x_cl45_read(bp, phy, devad, reg, &val); + bnx2x_cl45_write(bp, phy, devad, reg, val | or_val); +} + +int bnx2x_phy_read(struct link_params *params, u8 phy_addr, + u8 devad, u16 reg, u16 *ret_val) { u8 phy_index; - /** - * Probe for the phy according to the given phy_addr, and execute + /* Probe for the phy according to the given phy_addr, and execute * the read request on it */ for (phy_index = 0; phy_index < params->num_phys; phy_index++) { @@ -1562,12 +3317,11 @@ u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr, return -EINVAL; } -u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr, - u8 devad, u16 reg, u16 val) +int bnx2x_phy_write(struct link_params *params, u8 phy_addr, + u8 devad, u16 reg, u16 val) { u8 phy_index; - /** - * Probe for the phy according to the given phy_addr, and execute + /* Probe for the phy according to the given phy_addr, and execute * the write request on it */ for (phy_index = 0; phy_index < params->num_phys; phy_index++) { @@ -1579,9 +3333,62 @@ u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr, } return -EINVAL; } +static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy, + struct link_params *params) +{ + u8 lane = 0; + struct bnx2x *bp = params->bp; + u32 path_swap, path_swap_ovr; + u8 path, port; -static void bnx2x_set_aer_mmd_xgxs(struct link_params *params, - struct bnx2x_phy *phy) + path = BP_PATH(bp); + port = params->port; + + if (bnx2x_is_4_port_mode(bp)) { + u32 port_swap, port_swap_ovr; + + /* Figure out path swap value */ + path_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PATH_SWAP_OVWR); + if (path_swap_ovr & 0x1) + path_swap = (path_swap_ovr & 0x2); + else + path_swap = REG_RD(bp, MISC_REG_FOUR_PORT_PATH_SWAP); + + if (path_swap) + path = path ^ 1; + + /* Figure out port swap value */ + port_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PORT_SWAP_OVWR); + if (port_swap_ovr & 0x1) + port_swap = (port_swap_ovr & 0x2); + else + port_swap = REG_RD(bp, MISC_REG_FOUR_PORT_PORT_SWAP); + + if (port_swap) + port = port ^ 1; + + lane = (port<<1) + path; + } else { /* Two port mode - no port swap */ + + /* Figure out path swap value */ + path_swap_ovr = + REG_RD(bp, MISC_REG_TWO_PORT_PATH_SWAP_OVWR); + if (path_swap_ovr & 0x1) { + path_swap = (path_swap_ovr & 0x2); + } else { + path_swap = + REG_RD(bp, MISC_REG_TWO_PORT_PATH_SWAP); + } + if (path_swap) + path = path ^ 1; + + lane = path << 1 ; + } + return lane; +} + +static void bnx2x_set_aer_mmd(struct link_params *params, + struct bnx2x_phy *phy) { u32 ser_lane; u16 offset, aer_val; @@ -1590,40 +3397,31 @@ static void bnx2x_set_aer_mmd_xgxs(struct link_params *params, PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); - offset = phy->addr + ser_lane; - if (CHIP_IS_E2(bp)) { - if (phy->flags & FLAGS_4_PORT_MODE) { - /** - * In E2, 4-port mode, the port within the XGXS is - * controlled by setting the port's specific AER. - * The AER is set using the 5 MSB which define the - * DEVAD_STRAP, and the LSB which stands for the port - * id within the XGXS. The ports starts counting from 1 - */ - aer_val = 0x0800 + (BP_PATH(bp)) + - params->port*2; - DP(NETIF_MSG_LINK, "AER path:port [%x:%x] , aer val =" - " 0x%x\n", BP_PATH(bp), - params->port, aer_val); - } else { + offset = (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) ? + (phy->addr + ser_lane) : 0; + + if (USES_WARPCORE(bp)) { + aer_val = bnx2x_get_warpcore_lane(phy, params); + /* In Dual-lane mode, two lanes are joined together, + * so in order to configure them, the AER broadcast method is + * used here. + * 0x200 is the broadcast address for lanes 0,1 + * 0x201 is the broadcast address for lanes 2,3 + */ + if (phy->flags & FLAGS_WC_DUAL_MODE) + aer_val = (aer_val >> 1) | 0x200; + } else if (CHIP_IS_E2(bp)) aer_val = 0x3800 + offset - 1; - } - } else + else aer_val = 0x3800 + offset; - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_AER_BLOCK, - MDIO_AER_BLOCK_AER_REG, aer_val); -} -static void bnx2x_set_aer_mmd_serdes(struct bnx2x *bp, - struct bnx2x_phy *phy) -{ - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_AER_BLOCK, - MDIO_AER_BLOCK_AER_REG, 0x3800); + + CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, + MDIO_AER_BLOCK_AER_REG, aer_val); + } /******************************************************************/ -/* Internal phy section */ +/* Internal phy section */ /******************************************************************/ static void bnx2x_set_serdes_access(struct bnx2x *bp, u8 port) @@ -1648,515 +3446,35 @@ static void bnx2x_serdes_deassert(struct bnx2x *bp, u8 port) val = SERDES_RESET_BITS << (port*16); - /* reset and unreset the SerDes/XGXS */ - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, - val); + /* Reset and unreset the SerDes/XGXS */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val); udelay(500); - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, - val); + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val); bnx2x_set_serdes_access(bp, port); - REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_DEVAD + - port*0x10, - DEFAULT_PHY_DEV_ADDR); + REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_DEVAD + port*0x10, + DEFAULT_PHY_DEV_ADDR); } + static void bnx2x_xgxs_deassert(struct link_params *params) { struct bnx2x *bp = params->bp; - u8 port, reset_xgxs = 1; + u8 port; + u32 val; DP(NETIF_MSG_LINK, "bnx2x_xgxs_deassert\n"); - if (params->phy[INT_PHY].flags & FLAGS_4_PORT_MODE) { - /** - * In 4 port mode, all ports reside in XGXS0, so take it out - * of reset only for the first port. - */ - DP(NETIF_MSG_LINK, "bnx2x_xgxs_deassert 0x%x\n", - REG_RD(bp, MISC_REG_RESET_REG_3)); - if ((REG_RD(bp, MISC_REG_RESET_REG_3) & - XGXS_RESET_BITS) == XGXS_RESET_BITS) - reset_xgxs = 0; - port = 0; - REG_WR(bp, MISC_REG_XGXS0_CTRL_MD_ST, 0); - } else - port = params->port; - if (reset_xgxs) { - u32 val; - val = XGXS_RESET_BITS << (port*16); + port = params->port; - /* reset and unreset the SerDes/XGXS */ - REG_WR(bp, GRCBASE_MISC + - MISC_REGISTERS_RESET_REG_3_CLEAR, val); - udelay(500); - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, - val); - } + val = XGXS_RESET_BITS << (port*16); - REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + - port*0x18, 0); + /* Reset and unreset the SerDes/XGXS */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val); + udelay(500); + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val); + + REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + port*0x18, 0); REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, - params->phy[INT_PHY].def_md_devad); -} -void bnx2x_link_status_update(struct link_params *params, - struct link_vars *vars) -{ - struct bnx2x *bp = params->bp; - u8 link_10g; - u8 port = params->port; - - vars->link_status = REG_RD(bp, params->shmem_base + - offsetof(struct shmem_region, - port_mb[port].link_status)); - - vars->link_up = (vars->link_status & LINK_STATUS_LINK_UP); - - if (vars->link_up) { - DP(NETIF_MSG_LINK, "phy link up\n"); - - vars->phy_link_up = 1; - vars->duplex = DUPLEX_FULL; - switch (vars->link_status & - LINK_STATUS_SPEED_AND_DUPLEX_MASK) { - case LINK_10THD: - vars->duplex = DUPLEX_HALF; - /* fall thru */ - case LINK_10TFD: - vars->line_speed = SPEED_10; - break; - - case LINK_100TXHD: - vars->duplex = DUPLEX_HALF; - /* fall thru */ - case LINK_100T4: - case LINK_100TXFD: - vars->line_speed = SPEED_100; - break; - - case LINK_1000THD: - vars->duplex = DUPLEX_HALF; - /* fall thru */ - case LINK_1000TFD: - vars->line_speed = SPEED_1000; - break; - - case LINK_2500THD: - vars->duplex = DUPLEX_HALF; - /* fall thru */ - case LINK_2500TFD: - vars->line_speed = SPEED_2500; - break; - - case LINK_10GTFD: - vars->line_speed = SPEED_10000; - break; - - case LINK_12GTFD: - vars->line_speed = SPEED_12000; - break; - - case LINK_12_5GTFD: - vars->line_speed = SPEED_12500; - break; - - case LINK_13GTFD: - vars->line_speed = SPEED_13000; - break; - - case LINK_15GTFD: - vars->line_speed = SPEED_15000; - break; - - case LINK_16GTFD: - vars->line_speed = SPEED_16000; - break; - - default: - break; - } - vars->flow_ctrl = 0; - if (vars->link_status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED) - vars->flow_ctrl |= BNX2X_FLOW_CTRL_TX; - - if (vars->link_status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED) - vars->flow_ctrl |= BNX2X_FLOW_CTRL_RX; - - if (!vars->flow_ctrl) - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - - if (vars->line_speed && - ((vars->line_speed == SPEED_10) || - (vars->line_speed == SPEED_100))) { - vars->phy_flags |= PHY_SGMII_FLAG; - } else { - vars->phy_flags &= ~PHY_SGMII_FLAG; - } - - /* anything 10 and over uses the bmac */ - link_10g = ((vars->line_speed == SPEED_10000) || - (vars->line_speed == SPEED_12000) || - (vars->line_speed == SPEED_12500) || - (vars->line_speed == SPEED_13000) || - (vars->line_speed == SPEED_15000) || - (vars->line_speed == SPEED_16000)); - if (link_10g) - vars->mac_type = MAC_TYPE_BMAC; - else - vars->mac_type = MAC_TYPE_EMAC; - - } else { /* link down */ - DP(NETIF_MSG_LINK, "phy link down\n"); - - vars->phy_link_up = 0; - - vars->line_speed = 0; - vars->duplex = DUPLEX_FULL; - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - - /* indicate no mac active */ - vars->mac_type = MAC_TYPE_NONE; - } - - DP(NETIF_MSG_LINK, "link_status 0x%x phy_link_up %x\n", - vars->link_status, vars->phy_link_up); - DP(NETIF_MSG_LINK, "line_speed %x duplex %x flow_ctrl 0x%x\n", - vars->line_speed, vars->duplex, vars->flow_ctrl); -} -static void bnx2x_set_master_ln(struct link_params *params, - struct bnx2x_phy *phy) -{ - u16 new_master_ln, ser_lane; - struct bnx2x *bp = params->bp; - ser_lane = ((params->lane_config & - PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> - PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); - - /* set the master_ln for AN */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK2, - MDIO_XGXS_BLOCK2_TEST_MODE_LANE, - &new_master_ln); - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK2 , - MDIO_XGXS_BLOCK2_TEST_MODE_LANE, - (new_master_ln | ser_lane)); -} - -static u8 bnx2x_reset_unicore(struct link_params *params, - struct bnx2x_phy *phy, - u8 set_serdes) -{ - u16 mii_control; - u16 i; - struct bnx2x *bp = params->bp; - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, &mii_control); - - /* reset the unicore */ - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, - (mii_control | - MDIO_COMBO_IEEO_MII_CONTROL_RESET)); - - if (set_serdes) - bnx2x_set_serdes_access(bp, params->port); - - /* wait for the reset to self clear */ - for (i = 0; i < MDIO_ACCESS_TIMEOUT; i++) { - udelay(5); - - /* the reset erased the previous bank value */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, - &mii_control); - - if (!(mii_control & MDIO_COMBO_IEEO_MII_CONTROL_RESET)) { - udelay(5); - return 0; - } - } - - DP(NETIF_MSG_LINK, "BUG! XGXS is still in reset!\n"); - return -EINVAL; - -} - -static void bnx2x_set_swap_lanes(struct link_params *params, - struct bnx2x_phy *phy) -{ - struct bnx2x *bp = params->bp; - /** - * Each two bits represents a lane number: - * No swap is 0123 => 0x1b no need to enable the swap - */ - u16 ser_lane, rx_lane_swap, tx_lane_swap; - - ser_lane = ((params->lane_config & - PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> - PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); - rx_lane_swap = ((params->lane_config & - PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK) >> - PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT); - tx_lane_swap = ((params->lane_config & - PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK) >> - PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT); - - if (rx_lane_swap != 0x1b) { - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK2, - MDIO_XGXS_BLOCK2_RX_LN_SWAP, - (rx_lane_swap | - MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE | - MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE)); - } else { - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK2, - MDIO_XGXS_BLOCK2_RX_LN_SWAP, 0); - } - - if (tx_lane_swap != 0x1b) { - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK2, - MDIO_XGXS_BLOCK2_TX_LN_SWAP, - (tx_lane_swap | - MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE)); - } else { - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK2, - MDIO_XGXS_BLOCK2_TX_LN_SWAP, 0); - } -} - - -static void bnx2x_set_parallel_detection(struct bnx2x_phy *phy, - struct link_params *params, - u8 is_xgxs) -{ - struct bnx2x *bp = params->bp; - u16 control2; - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, - &control2); - if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G) - control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; - else - control2 &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; - DP(NETIF_MSG_LINK, "phy->speed_cap_mask = 0x%x, control2 = 0x%x\n", - phy->speed_cap_mask, control2); - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, - control2); - if (is_xgxs && - (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) { - DP(NETIF_MSG_LINK, "XGXS\n"); - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_10G_PARALLEL_DETECT, - MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK, - MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK_CNT); - - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_10G_PARALLEL_DETECT, - MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL, - &control2); - - control2 |= - MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN; - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_10G_PARALLEL_DETECT, - MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL, - control2); - - /* Disable parallel detection of HiG */ - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK2, - MDIO_XGXS_BLOCK2_UNICORE_MODE_10G, - MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS | - MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS); - } -} - -static void bnx2x_set_autoneg(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars, - u8 enable_cl73) -{ - struct bnx2x *bp = params->bp; - u16 reg_val; - - /* CL37 Autoneg */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, ®_val); - - /* CL37 Autoneg Enabled */ - if (vars->line_speed == SPEED_AUTO_NEG) - reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_AN_EN; - else /* CL37 Autoneg Disabled */ - reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | - MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN); - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, reg_val); - - /* Enable/Disable Autodetection */ - - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, ®_val); - reg_val &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN | - MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT); - reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE; - if (vars->line_speed == SPEED_AUTO_NEG) - reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET; - else - reg_val &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET; - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, reg_val); - - /* Enable TetonII and BAM autoneg */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_BAM_NEXT_PAGE, - MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL, - ®_val); - if (vars->line_speed == SPEED_AUTO_NEG) { - /* Enable BAM aneg Mode and TetonII aneg Mode */ - reg_val |= (MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE | - MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN); - } else { - /* TetonII and BAM Autoneg Disabled */ - reg_val &= ~(MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE | - MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN); - } - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_BAM_NEXT_PAGE, - MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL, - reg_val); - - if (enable_cl73) { - /* Enable Cl73 FSM status bits */ - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_USERB0, - MDIO_CL73_USERB0_CL73_UCTRL, - 0xe); - - /* Enable BAM Station Manager*/ - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_USERB0, - MDIO_CL73_USERB0_CL73_BAM_CTRL1, - MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN | - MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN | - MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN); - - /* Advertise CL73 link speeds */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB1, - MDIO_CL73_IEEEB1_AN_ADV2, - ®_val); - if (phy->speed_cap_mask & - PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) - reg_val |= MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4; - if (phy->speed_cap_mask & - PORT_HW_CFG_SPEED_CAPABILITY_D0_1G) - reg_val |= MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX; - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB1, - MDIO_CL73_IEEEB1_AN_ADV2, - reg_val); - - /* CL73 Autoneg Enabled */ - reg_val = MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN; - - } else /* CL73 Autoneg Disabled */ - reg_val = 0; - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB0, - MDIO_CL73_IEEEB0_CL73_AN_CONTROL, reg_val); -} - -/* program SerDes, forced speed */ -static void bnx2x_program_serdes(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) -{ - struct bnx2x *bp = params->bp; - u16 reg_val; - - /* program duplex, disable autoneg and sgmii*/ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, ®_val); - reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX | - MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | - MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK); - if (phy->req_duplex == DUPLEX_FULL) - reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX; - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, reg_val); - - /* program speed - - needed only if the speed is greater than 1G (2.5G or 10G) */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_MISC1, ®_val); - /* clearing the speed value before setting the right speed */ - DP(NETIF_MSG_LINK, "MDIO_REG_BANK_SERDES_DIGITAL = 0x%x\n", reg_val); - - reg_val &= ~(MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK | - MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL); - - if (!((vars->line_speed == SPEED_1000) || - (vars->line_speed == SPEED_100) || - (vars->line_speed == SPEED_10))) { - - reg_val |= (MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M | - MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL); - if (vars->line_speed == SPEED_10000) - reg_val |= - MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4; - if (vars->line_speed == SPEED_13000) - reg_val |= - MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_13G; - } - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_MISC1, reg_val); - -} - -static void bnx2x_set_brcm_cl37_advertisment(struct bnx2x_phy *phy, - struct link_params *params) -{ - struct bnx2x *bp = params->bp; - u16 val = 0; - - /* configure the 48 bits for BAM AN */ - - /* set extended capabilities */ - if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G) - val |= MDIO_OVER_1G_UP1_2_5G; - if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) - val |= MDIO_OVER_1G_UP1_10G; - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_OVER_1G, - MDIO_OVER_1G_UP1, val); - - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_OVER_1G, - MDIO_OVER_1G_UP3, 0x400); + params->phy[INT_PHY].def_md_devad); } static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy, @@ -2164,8 +3482,7 @@ static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy, { struct bnx2x *bp = params->bp; *ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX; - /** - * resolve pause mode and advertisement Please refer to Table + /* Resolve pause mode and advertisement Please refer to Table * 28B-3 of the 802.3ab-1999 spec */ @@ -2195,25 +3512,1577 @@ static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy, DP(NETIF_MSG_LINK, "ieee_fc = 0x%x\n", *ieee_fc); } -static void bnx2x_set_ieee_aneg_advertisment(struct bnx2x_phy *phy, - struct link_params *params, - u16 ieee_fc) +static void set_phy_vars(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u8 actual_phy_idx, phy_index, link_cfg_idx; + u8 phy_config_swapped = params->multi_phy_config & + PORT_HW_CFG_PHY_SWAPPED_ENABLED; + for (phy_index = INT_PHY; phy_index < params->num_phys; + phy_index++) { + link_cfg_idx = LINK_CONFIG_IDX(phy_index); + actual_phy_idx = phy_index; + if (phy_config_swapped) { + if (phy_index == EXT_PHY1) + actual_phy_idx = EXT_PHY2; + else if (phy_index == EXT_PHY2) + actual_phy_idx = EXT_PHY1; + } + params->phy[actual_phy_idx].req_flow_ctrl = + params->req_flow_ctrl[link_cfg_idx]; + + params->phy[actual_phy_idx].req_line_speed = + params->req_line_speed[link_cfg_idx]; + + params->phy[actual_phy_idx].speed_cap_mask = + params->speed_cap_mask[link_cfg_idx]; + + params->phy[actual_phy_idx].req_duplex = + params->req_duplex[link_cfg_idx]; + + if (params->req_line_speed[link_cfg_idx] == + SPEED_AUTO_NEG) + vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_ENABLED; + + DP(NETIF_MSG_LINK, "req_flow_ctrl %x, req_line_speed %x," + " speed_cap_mask %x\n", + params->phy[actual_phy_idx].req_flow_ctrl, + params->phy[actual_phy_idx].req_line_speed, + params->phy[actual_phy_idx].speed_cap_mask); + } +} + +static void bnx2x_ext_phy_set_pause(struct link_params *params, + struct bnx2x_phy *phy, + struct link_vars *vars) +{ + u16 val; + struct bnx2x *bp = params->bp; + /* Read modify write pause advertizing */ + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, &val); + + val &= ~MDIO_AN_REG_ADV_PAUSE_BOTH; + + /* Please refer to Table 28B-3 of 802.3ab-1999 spec. */ + bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); + if ((vars->ieee_fc & + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) == + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) { + val |= MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC; + } + if ((vars->ieee_fc & + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) == + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) { + val |= MDIO_AN_REG_ADV_PAUSE_PAUSE; + } + DP(NETIF_MSG_LINK, "Ext phy AN advertize 0x%x\n", val); + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, val); +} + +static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result) +{ /* LD LP */ + switch (pause_result) { /* ASYM P ASYM P */ + case 0xb: /* 1 0 1 1 */ + vars->flow_ctrl = BNX2X_FLOW_CTRL_TX; + break; + + case 0xe: /* 1 1 1 0 */ + vars->flow_ctrl = BNX2X_FLOW_CTRL_RX; + break; + + case 0x5: /* 0 1 0 1 */ + case 0x7: /* 0 1 1 1 */ + case 0xd: /* 1 1 0 1 */ + case 0xf: /* 1 1 1 1 */ + vars->flow_ctrl = BNX2X_FLOW_CTRL_BOTH; + break; + + default: + break; + } + if (pause_result & (1<<0)) + vars->link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE; + if (pause_result & (1<<1)) + vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE; + +} + +static void bnx2x_ext_phy_update_adv_fc(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + u16 ld_pause; /* local */ + u16 lp_pause; /* link partner */ + u16 pause_result; + struct bnx2x *bp = params->bp; + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE) { + bnx2x_cl22_read(bp, phy, 0x4, &ld_pause); + bnx2x_cl22_read(bp, phy, 0x5, &lp_pause); + } else if (CHIP_IS_E3(bp) && + SINGLE_MEDIA_DIRECT(params)) { + u8 lane = bnx2x_get_warpcore_lane(phy, params); + u16 gp_status, gp_mask; + bnx2x_cl45_read(bp, phy, + MDIO_AN_DEVAD, MDIO_WC_REG_GP2_STATUS_GP_2_4, + &gp_status); + gp_mask = (MDIO_WC_REG_GP2_STATUS_GP_2_4_CL73_AN_CMPL | + MDIO_WC_REG_GP2_STATUS_GP_2_4_CL37_LP_AN_CAP) << + lane; + if ((gp_status & gp_mask) == gp_mask) { + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_ADV_PAUSE, &ld_pause); + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_LP_AUTO_NEG, &lp_pause); + } else { + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_CL37_FC_LD, &ld_pause); + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_CL37_FC_LP, &lp_pause); + ld_pause = ((ld_pause & + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) + << 3); + lp_pause = ((lp_pause & + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) + << 3); + } + } else { + bnx2x_cl45_read(bp, phy, + MDIO_AN_DEVAD, + MDIO_AN_REG_ADV_PAUSE, &ld_pause); + bnx2x_cl45_read(bp, phy, + MDIO_AN_DEVAD, + MDIO_AN_REG_LP_AUTO_NEG, &lp_pause); + } + pause_result = (ld_pause & + MDIO_AN_REG_ADV_PAUSE_MASK) >> 8; + pause_result |= (lp_pause & + MDIO_AN_REG_ADV_PAUSE_MASK) >> 10; + DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x\n", pause_result); + bnx2x_pause_resolve(vars, pause_result); + +} +static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + u8 ret = 0; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + if (phy->req_flow_ctrl != BNX2X_FLOW_CTRL_AUTO) { + /* Update the advertised flow-controled of LD/LP in AN */ + if (phy->req_line_speed == SPEED_AUTO_NEG) + bnx2x_ext_phy_update_adv_fc(phy, params, vars); + /* But set the flow-control result as the requested one */ + vars->flow_ctrl = phy->req_flow_ctrl; + } else if (phy->req_line_speed != SPEED_AUTO_NEG) + vars->flow_ctrl = params->req_fc_auto_adv; + else if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) { + ret = 1; + bnx2x_ext_phy_update_adv_fc(phy, params, vars); + } + return ret; +} +/******************************************************************/ +/* Warpcore section */ +/******************************************************************/ +/* The init_internal_warpcore should mirror the xgxs, + * i.e. reset the lane (if needed), set aer for the + * init configuration, and set/clear SGMII flag. Internal + * phy init is done purely in phy_init stage. + */ +static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { + u16 val16 = 0, lane, bam37 = 0, cl72_ctrl; + struct bnx2x *bp = params->bp; + DP(NETIF_MSG_LINK, "Enable Auto Negotiation for KR\n"); + /* Set to default registers that may be overriden by 10G force */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7); + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_PAR_DET_10G_CTRL, 0); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK1_LANECTRL0, 0xff); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK1_LANECTRL1, 0x5555); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, + MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0x0); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_CONTROL, 0x7415); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x6190); + /* Disable Autoneg: re-enable it after adv is done. */ + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0); + + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, &cl72_ctrl); + cl72_ctrl &= 0x08ff; + cl72_ctrl |= 0x3800; + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, cl72_ctrl); + + /* Check adding advertisement for 1G KX */ + if (((vars->line_speed == SPEED_AUTO_NEG) && + (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)) || + (vars->line_speed == SPEED_1000)) { + u16 sd_digital; + val16 |= (1<<5); + + /* Enable CL37 1G Parallel Detect */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, &sd_digital); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, + (sd_digital | 0x1)); + + DP(NETIF_MSG_LINK, "Advertize 1G\n"); + } + if (((vars->line_speed == SPEED_AUTO_NEG) && + (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) || + (vars->line_speed == SPEED_10000)) { + /* Check adding advertisement for 10G KR */ + val16 |= (1<<7); + /* Enable 10G Parallel Detect */ + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_PAR_DET_10G_CTRL, 1); + + DP(NETIF_MSG_LINK, "Advertize 10G\n"); + } + + /* Set Transmit PMD settings */ + lane = bnx2x_get_warpcore_lane(phy, params); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_TX0_TX_DRIVER + 0x10*lane, + ((0x02 << MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET) | + (0x06 << MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET) | + (0x09 << MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET))); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_CL72_USERB0_CL72_OS_DEF_CTRL, + 0x03f0); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_CL72_USERB0_CL72_2P5_DEF_CTRL, + 0x03f0); + + /* Advertised speeds */ + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, val16); + + /* Advertised and set FEC (Forward Error Correction) */ + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT2, + (MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_ABILITY | + MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_REQ)); + + /* Enable CL37 BAM */ + if (REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, dev_info. + port_hw_config[params->port].default_cfg)) & + PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED) { + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL, &bam37); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL6_MP5_NEXTPAGECTRL, bam37 | 1); + DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); + } + + /* Advertise pause */ + bnx2x_ext_phy_set_pause(params, phy, vars); + /* Set KR Autoneg Work-Around flag for Warpcore version older than D108 + */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_UC_INFO_B1_VERSION, &val16); + if (val16 < 0xd108) { + DP(NETIF_MSG_LINK, "Enable AN KR work-around\n"); + vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; + } + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL5_MISC7, &val16); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL5_MISC7, val16 | 0x100); + + /* Over 1G - AN local device user page 1 */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL3_UP1, 0x1f); + + /* Enable Autoneg */ + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x1200); + +} + +static void bnx2x_warpcore_set_10G_KR(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; u16 val; - /* for AN, we are always publishing full duplex */ - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_AUTO_NEG_ADV, ieee_fc); - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB1, - MDIO_CL73_IEEEB1_AN_ADV1, &val); + /* Disable Autoneg */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7); + + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_PAR_DET_10G_CTRL, 0); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, 0x3f00); + + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, 0); + + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL3_UP1, 0x1); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL5_MISC7, 0xa); + + /* Disable CL36 PCS Tx */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK1_LANECTRL0, 0x0); + + /* Double Wide Single Data Rate @ pll rate */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK1_LANECTRL1, 0xFFFF); + + /* Leave cl72 training enable, needed for KR */ + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, + MDIO_WC_REG_PMD_IEEE9BLK_TENGBASE_KR_PMD_CONTROL_REGISTER_150, + 0x2); + + /* Leave CL72 enabled */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, + &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, + val | 0x3800); + + /* Set speed via PMA/PMD register */ + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x2040); + + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, + MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0xB); + + /* Enable encoded forced speed */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x30); + + /* Turn TX scramble payload only the 64/66 scrambler */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_TX66_CONTROL, 0x9); + + /* Turn RX scramble payload only the 64/66 scrambler */ + bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_CONTROL, 0xF9); + + /* Set and clear loopback to cause a reset to 64/66 decoder */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x4000); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x0); + +} + +static void bnx2x_warpcore_set_10G_XFI(struct bnx2x_phy *phy, + struct link_params *params, + u8 is_xfi) +{ + struct bnx2x *bp = params->bp; + u16 misc1_val, tap_val, tx_driver_val, lane, val; + /* Hold rxSeqStart */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DSC2B0_DSC_MISC_CTRL0, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DSC2B0_DSC_MISC_CTRL0, (val | 0x8000)); + + /* Hold tx_fifo_reset */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, (val | 0x1)); + + /* Disable CL73 AN */ + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0); + + /* Disable 100FX Enable and Auto-Detect */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_FX100_CTRL1, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_FX100_CTRL1, (val & 0xFFFA)); + + /* Disable 100FX Idle detect */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_FX100_CTRL3, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_FX100_CTRL3, (val | 0x0080)); + + /* Set Block address to Remote PHY & Clear forced_speed[5] */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL4_MISC3, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL4_MISC3, (val & 0xFF7F)); + + /* Turn off auto-detect & fiber mode */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, + (val & 0xFFEE)); + + /* Set filter_force_link, disable_false_link and parallel_detect */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, + ((val | 0x0006) & 0xFFFE)); + + /* Set XFI / SFI */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_MISC1, &misc1_val); + + misc1_val &= ~(0x1f); + + if (is_xfi) { + misc1_val |= 0x5; + tap_val = ((0x08 << MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET) | + (0x37 << MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET) | + (0x00 << MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET)); + tx_driver_val = + ((0x00 << MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET) | + (0x02 << MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET) | + (0x03 << MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET)); + + } else { + misc1_val |= 0x9; + tap_val = ((0x0f << MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET) | + (0x2b << MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET) | + (0x02 << MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET)); + tx_driver_val = + ((0x03 << MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET) | + (0x02 << MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET) | + (0x06 << MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET)); + } + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_MISC1, misc1_val); + + /* Set Transmit PMD settings */ + lane = bnx2x_get_warpcore_lane(phy, params); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_TX_FIR_TAP, + tap_val | MDIO_WC_REG_TX_FIR_TAP_ENABLE); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_TX0_TX_DRIVER + 0x10*lane, + tx_driver_val); + + /* Enable fiber mode, enable and invert sig_det */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, val | 0xd); + + /* Set Block address to Remote PHY & Set forced_speed[5], 40bit mode */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL4_MISC3, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL4_MISC3, val | 0x8080); + + /* 10G XFI Full Duplex */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x100); + + /* Release tx_fifo_reset */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, val & 0xFFFE); + + /* Release rxSeqStart */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DSC2B0_DSC_MISC_CTRL0, &val); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DSC2B0_DSC_MISC_CTRL0, (val & 0x7FFF)); +} + +static void bnx2x_warpcore_set_20G_KR2(struct bnx2x *bp, + struct bnx2x_phy *phy) +{ + DP(NETIF_MSG_LINK, "KR2 still not supported !!!\n"); +} + +static void bnx2x_warpcore_set_20G_DXGXS(struct bnx2x *bp, + struct bnx2x_phy *phy, + u16 lane) +{ + /* Rx0 anaRxControl1G */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX0_ANARXCONTROL1G, 0x90); + + /* Rx2 anaRxControl1G */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX2_ANARXCONTROL1G, 0x90); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_SCW0, 0xE070); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_SCW1, 0xC0D0); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_SCW2, 0xA0B0); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_SCW3, 0x8090); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_SCW0_MASK, 0xF0F0); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_SCW1_MASK, 0xF0F0); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_SCW2_MASK, 0xF0F0); + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_SCW3_MASK, 0xF0F0); + + /* Serdes Digital Misc1 */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_MISC1, 0x6008); + + /* Serdes Digital4 Misc3 */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL4_MISC3, 0x8088); + + /* Set Transmit PMD settings */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_TX_FIR_TAP, + ((0x12 << MDIO_WC_REG_TX_FIR_TAP_POST_TAP_OFFSET) | + (0x2d << MDIO_WC_REG_TX_FIR_TAP_MAIN_TAP_OFFSET) | + (0x00 << MDIO_WC_REG_TX_FIR_TAP_PRE_TAP_OFFSET) | + MDIO_WC_REG_TX_FIR_TAP_ENABLE)); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_TX0_TX_DRIVER + 0x10*lane, + ((0x02 << MDIO_WC_REG_TX0_TX_DRIVER_POST2_COEFF_OFFSET) | + (0x02 << MDIO_WC_REG_TX0_TX_DRIVER_IDRIVER_OFFSET) | + (0x02 << MDIO_WC_REG_TX0_TX_DRIVER_IPRE_DRIVER_OFFSET))); +} + +static void bnx2x_warpcore_set_sgmii_speed(struct bnx2x_phy *phy, + struct link_params *params, + u8 fiber_mode, + u8 always_autoneg) +{ + struct bnx2x *bp = params->bp; + u16 val16, digctrl_kx1, digctrl_kx2; + + /* Clear XFI clock comp in non-10G single lane mode. */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_CONTROL, &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_CONTROL, val16 & ~(3<<13)); + + if (always_autoneg || phy->req_line_speed == SPEED_AUTO_NEG) { + /* SGMII Autoneg */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_COMBO_IEEE0_MIICTRL, + val16 | 0x1000); + DP(NETIF_MSG_LINK, "set SGMII AUTONEG\n"); + } else { + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); + val16 &= 0xcebf; + switch (phy->req_line_speed) { + case SPEED_10: + break; + case SPEED_100: + val16 |= 0x2000; + break; + case SPEED_1000: + val16 |= 0x0040; + break; + default: + DP(NETIF_MSG_LINK, + "Speed not supported: 0x%x\n", phy->req_line_speed); + return; + } + + if (phy->req_duplex == DUPLEX_FULL) + val16 |= 0x0100; + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_COMBO_IEEE0_MIICTRL, val16); + + DP(NETIF_MSG_LINK, "set SGMII force speed %d\n", + phy->req_line_speed); + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); + DP(NETIF_MSG_LINK, " (readback) %x\n", val16); + } + + /* SGMII Slave mode and disable signal detect */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, &digctrl_kx1); + if (fiber_mode) + digctrl_kx1 = 1; + else + digctrl_kx1 &= 0xff4a; + + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, + digctrl_kx1); + + /* Turn off parallel detect */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, &digctrl_kx2); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, + (digctrl_kx2 & ~(1<<2))); + + /* Re-enable parallel detect */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, + (digctrl_kx2 | (1<<2))); + + /* Enable autodet */ + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, + (digctrl_kx1 | 0x10)); +} + +static void bnx2x_warpcore_reset_lane(struct bnx2x *bp, + struct bnx2x_phy *phy, + u8 reset) +{ + u16 val; + /* Take lane out of reset after configuration is finished */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL5_MISC6, &val); + if (reset) + val |= 0xC000; + else + val &= 0x3FFF; + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL5_MISC6, val); + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL5_MISC6, &val); +} +/* Clear SFI/XFI link settings registers */ +static void bnx2x_warpcore_clear_regs(struct bnx2x_phy *phy, + struct link_params *params, + u16 lane) +{ + struct bnx2x *bp = params->bp; + u16 val16; + + /* Set XFI clock comp as default. */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_CONTROL, &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RX66_CONTROL, val16 | (3<<13)); + + bnx2x_warpcore_reset_lane(bp, phy, 1); + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_FX100_CTRL1, 0x014a); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_FX100_CTRL3, 0x0800); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL4_MISC3, 0x8008); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, 0x0195); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x0007); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, 0x0002); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_MISC1, 0x6000); + lane = bnx2x_get_warpcore_lane(phy, params); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_TX_FIR_TAP, 0x0000); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_TX0_TX_DRIVER + 0x10*lane, 0x0990); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x2040); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0x0140); + bnx2x_warpcore_reset_lane(bp, phy, 0); +} + +static int bnx2x_get_mod_abs_int_cfg(struct bnx2x *bp, + u32 chip_id, + u32 shmem_base, u8 port, + u8 *gpio_num, u8 *gpio_port) +{ + u32 cfg_pin; + *gpio_num = 0; + *gpio_port = 0; + if (CHIP_IS_E3(bp)) { + cfg_pin = (REG_RD(bp, shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].e3_sfp_ctrl)) & + PORT_HW_CFG_E3_MOD_ABS_MASK) >> + PORT_HW_CFG_E3_MOD_ABS_SHIFT; + + /* Should not happen. This function called upon interrupt + * triggered by GPIO ( since EPIO can only generate interrupts + * to MCP). + * So if this function was called and none of the GPIOs was set, + * it means the shit hit the fan. + */ + if ((cfg_pin < PIN_CFG_GPIO0_P0) || + (cfg_pin > PIN_CFG_GPIO3_P1)) { + DP(NETIF_MSG_LINK, + "ERROR: Invalid cfg pin %x for module detect indication\n", + cfg_pin); + return -EINVAL; + } + + *gpio_num = (cfg_pin - PIN_CFG_GPIO0_P0) & 0x3; + *gpio_port = (cfg_pin - PIN_CFG_GPIO0_P0) >> 2; + } else { + *gpio_num = MISC_REGISTERS_GPIO_3; + *gpio_port = port; + } + DP(NETIF_MSG_LINK, "MOD_ABS int GPIO%d_P%d\n", *gpio_num, *gpio_port); + return 0; +} + +static int bnx2x_is_sfp_module_plugged(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + u8 gpio_num, gpio_port; + u32 gpio_val; + if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, + params->shmem_base, params->port, + &gpio_num, &gpio_port) != 0) + return 0; + gpio_val = bnx2x_get_gpio(bp, gpio_num, gpio_port); + + /* Call the handling function in case module is detected */ + if (gpio_val == 0) + return 1; + else + return 0; +} +static int bnx2x_warpcore_get_sigdet(struct bnx2x_phy *phy, + struct link_params *params) +{ + u16 gp2_status_reg0, lane; + struct bnx2x *bp = params->bp; + + lane = bnx2x_get_warpcore_lane(phy, params); + + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, MDIO_WC_REG_GP2_STATUS_GP_2_0, + &gp2_status_reg0); + + return (gp2_status_reg0 >> (8+lane)) & 0x1; +} + +static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u32 serdes_net_if; + u16 gp_status1 = 0, lnkup = 0, lnkup_kr = 0; + u16 lane = bnx2x_get_warpcore_lane(phy, params); + + vars->turn_to_run_wc_rt = vars->turn_to_run_wc_rt ? 0 : 1; + + if (!vars->turn_to_run_wc_rt) + return; + + /* Return if there is no link partner */ + if (!(bnx2x_warpcore_get_sigdet(phy, params))) { + DP(NETIF_MSG_LINK, "bnx2x_warpcore_get_sigdet false\n"); + return; + } + + if (vars->rx_tx_asic_rst) { + serdes_net_if = (REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, dev_info. + port_hw_config[params->port].default_cfg)) & + PORT_HW_CFG_NET_SERDES_IF_MASK); + + switch (serdes_net_if) { + case PORT_HW_CFG_NET_SERDES_IF_KR: + /* Do we get link yet? */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, 0x81d1, + &gp_status1); + lnkup = (gp_status1 >> (8+lane)) & 0x1;/* 1G */ + /*10G KR*/ + lnkup_kr = (gp_status1 >> (12+lane)) & 0x1; + + DP(NETIF_MSG_LINK, + "gp_status1 0x%x\n", gp_status1); + + if (lnkup_kr || lnkup) { + vars->rx_tx_asic_rst = 0; + DP(NETIF_MSG_LINK, + "link up, rx_tx_asic_rst 0x%x\n", + vars->rx_tx_asic_rst); + } else { + /* Reset the lane to see if link comes up.*/ + bnx2x_warpcore_reset_lane(bp, phy, 1); + bnx2x_warpcore_reset_lane(bp, phy, 0); + + /* Restart Autoneg */ + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, 0x1200); + + vars->rx_tx_asic_rst--; + DP(NETIF_MSG_LINK, "0x%x retry left\n", + vars->rx_tx_asic_rst); + } + break; + + default: + break; + } + + } /*params->rx_tx_asic_rst*/ + +} +static void bnx2x_warpcore_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u32 serdes_net_if; + u8 fiber_mode; + u16 lane = bnx2x_get_warpcore_lane(phy, params); + serdes_net_if = (REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, dev_info. + port_hw_config[params->port].default_cfg)) & + PORT_HW_CFG_NET_SERDES_IF_MASK); + DP(NETIF_MSG_LINK, "Begin Warpcore init, link_speed %d, " + "serdes_net_if = 0x%x\n", + vars->line_speed, serdes_net_if); + bnx2x_set_aer_mmd(params, phy); + + vars->phy_flags |= PHY_XGXS_FLAG; + if ((serdes_net_if == PORT_HW_CFG_NET_SERDES_IF_SGMII) || + (phy->req_line_speed && + ((phy->req_line_speed == SPEED_100) || + (phy->req_line_speed == SPEED_10)))) { + vars->phy_flags |= PHY_SGMII_FLAG; + DP(NETIF_MSG_LINK, "Setting SGMII mode\n"); + bnx2x_warpcore_clear_regs(phy, params, lane); + bnx2x_warpcore_set_sgmii_speed(phy, params, 0, 1); + } else { + switch (serdes_net_if) { + case PORT_HW_CFG_NET_SERDES_IF_KR: + /* Enable KR Auto Neg */ + if (params->loopback_mode != LOOPBACK_EXT) + bnx2x_warpcore_enable_AN_KR(phy, params, vars); + else { + DP(NETIF_MSG_LINK, "Setting KR 10G-Force\n"); + bnx2x_warpcore_set_10G_KR(phy, params, vars); + } + break; + + case PORT_HW_CFG_NET_SERDES_IF_XFI: + bnx2x_warpcore_clear_regs(phy, params, lane); + if (vars->line_speed == SPEED_10000) { + DP(NETIF_MSG_LINK, "Setting 10G XFI\n"); + bnx2x_warpcore_set_10G_XFI(phy, params, 1); + } else { + if (SINGLE_MEDIA_DIRECT(params)) { + DP(NETIF_MSG_LINK, "1G Fiber\n"); + fiber_mode = 1; + } else { + DP(NETIF_MSG_LINK, "10/100/1G SGMII\n"); + fiber_mode = 0; + } + bnx2x_warpcore_set_sgmii_speed(phy, + params, + fiber_mode, + 0); + } + + break; + + case PORT_HW_CFG_NET_SERDES_IF_SFI: + + bnx2x_warpcore_clear_regs(phy, params, lane); + if (vars->line_speed == SPEED_10000) { + DP(NETIF_MSG_LINK, "Setting 10G SFI\n"); + bnx2x_warpcore_set_10G_XFI(phy, params, 0); + } else if (vars->line_speed == SPEED_1000) { + DP(NETIF_MSG_LINK, "Setting 1G Fiber\n"); + bnx2x_warpcore_set_sgmii_speed( + phy, params, 1, 0); + } + /* Issue Module detection */ + if (bnx2x_is_sfp_module_plugged(phy, params)) + bnx2x_sfp_module_detection(phy, params); + break; + + case PORT_HW_CFG_NET_SERDES_IF_DXGXS: + if (vars->line_speed != SPEED_20000) { + DP(NETIF_MSG_LINK, "Speed not supported yet\n"); + return; + } + DP(NETIF_MSG_LINK, "Setting 20G DXGXS\n"); + bnx2x_warpcore_set_20G_DXGXS(bp, phy, lane); + /* Issue Module detection */ + + bnx2x_sfp_module_detection(phy, params); + break; + + case PORT_HW_CFG_NET_SERDES_IF_KR2: + if (vars->line_speed != SPEED_20000) { + DP(NETIF_MSG_LINK, "Speed not supported yet\n"); + return; + } + DP(NETIF_MSG_LINK, "Setting 20G KR2\n"); + bnx2x_warpcore_set_20G_KR2(bp, phy); + break; + + default: + DP(NETIF_MSG_LINK, + "Unsupported Serdes Net Interface 0x%x\n", + serdes_net_if); + return; + } + } + + /* Take lane out of reset after configuration is finished */ + bnx2x_warpcore_reset_lane(bp, phy, 0); + DP(NETIF_MSG_LINK, "Exit config init\n"); +} + +static void bnx2x_sfp_e3_set_transmitter(struct link_params *params, + struct bnx2x_phy *phy, + u8 tx_en) +{ + struct bnx2x *bp = params->bp; + u32 cfg_pin; + u8 port = params->port; + + cfg_pin = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].e3_sfp_ctrl)) & + PORT_HW_CFG_TX_LASER_MASK; + /* Set the !tx_en since this pin is DISABLE_TX_LASER */ + DP(NETIF_MSG_LINK, "Setting WC TX to %d\n", tx_en); + /* For 20G, the expected pin to be used is 3 pins after the current */ + + bnx2x_set_cfg_pin(bp, cfg_pin, tx_en ^ 1); + if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_20G) + bnx2x_set_cfg_pin(bp, cfg_pin + 3, tx_en ^ 1); +} + +static void bnx2x_warpcore_link_reset(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + u16 val16; + bnx2x_sfp_e3_set_transmitter(params, phy, 0); + bnx2x_set_mdio_clk(bp, params->chip_id, params->port); + bnx2x_set_aer_mmd(params, phy); + /* Global register */ + bnx2x_warpcore_reset_lane(bp, phy, 1); + + /* Clear loopback settings (if any) */ + /* 10G & 20G */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_COMBO_IEEE0_MIICTRL, val16 & + 0xBFFF); + + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_IEEE0BLK_MIICNTL, val16 & 0xfffe); + + /* Update those 1-copy registers */ + CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, + MDIO_AER_BLOCK_AER_REG, 0); + /* Enable 1G MDIO (1-copy) */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, + &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, + val16 & ~0x10); + + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK1_LANECTRL2, &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK1_LANECTRL2, + val16 & 0xff00); + +} + +static void bnx2x_set_warpcore_loopback(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + u16 val16; + u32 lane; + DP(NETIF_MSG_LINK, "Setting Warpcore loopback type %x, speed %d\n", + params->loopback_mode, phy->req_line_speed); + + if (phy->req_line_speed < SPEED_10000) { + /* 10/100/1000 */ + + /* Update those 1-copy registers */ + CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, + MDIO_AER_BLOCK_AER_REG, 0); + /* Enable 1G MDIO (1-copy) */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, + &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, + val16 | 0x10); + /* Set 1G loopback based on lane (1-copy) */ + lane = bnx2x_get_warpcore_lane(phy, params); + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK1_LANECTRL2, &val16); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_XGXSBLK1_LANECTRL2, + val16 | (1<bp; + u8 link_10g_plus; + if (vars->link_status & LINK_STATUS_PHYSICAL_LINK_FLAG) + vars->phy_flags |= PHY_PHYSICAL_LINK_FLAG; + vars->link_up = (vars->link_status & LINK_STATUS_LINK_UP); + if (vars->link_up) { + DP(NETIF_MSG_LINK, "phy link up\n"); + + vars->phy_link_up = 1; + vars->duplex = DUPLEX_FULL; + switch (vars->link_status & + LINK_STATUS_SPEED_AND_DUPLEX_MASK) { + case LINK_10THD: + vars->duplex = DUPLEX_HALF; + /* Fall thru */ + case LINK_10TFD: + vars->line_speed = SPEED_10; + break; + + case LINK_100TXHD: + vars->duplex = DUPLEX_HALF; + /* Fall thru */ + case LINK_100T4: + case LINK_100TXFD: + vars->line_speed = SPEED_100; + break; + + case LINK_1000THD: + vars->duplex = DUPLEX_HALF; + /* Fall thru */ + case LINK_1000TFD: + vars->line_speed = SPEED_1000; + break; + + case LINK_2500THD: + vars->duplex = DUPLEX_HALF; + /* Fall thru */ + case LINK_2500TFD: + vars->line_speed = SPEED_2500; + break; + + case LINK_10GTFD: + vars->line_speed = SPEED_10000; + break; + case LINK_20GTFD: + vars->line_speed = SPEED_20000; + break; + default: + break; + } + vars->flow_ctrl = 0; + if (vars->link_status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED) + vars->flow_ctrl |= BNX2X_FLOW_CTRL_TX; + + if (vars->link_status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED) + vars->flow_ctrl |= BNX2X_FLOW_CTRL_RX; + + if (!vars->flow_ctrl) + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + + if (vars->line_speed && + ((vars->line_speed == SPEED_10) || + (vars->line_speed == SPEED_100))) { + vars->phy_flags |= PHY_SGMII_FLAG; + } else { + vars->phy_flags &= ~PHY_SGMII_FLAG; + } + if (vars->line_speed && + USES_WARPCORE(bp) && + (vars->line_speed == SPEED_1000)) + vars->phy_flags |= PHY_SGMII_FLAG; + /* Anything 10 and over uses the bmac */ + link_10g_plus = (vars->line_speed >= SPEED_10000); + + if (link_10g_plus) { + if (USES_WARPCORE(bp)) + vars->mac_type = MAC_TYPE_XMAC; + else + vars->mac_type = MAC_TYPE_BMAC; + } else { + if (USES_WARPCORE(bp)) + vars->mac_type = MAC_TYPE_UMAC; + else + vars->mac_type = MAC_TYPE_EMAC; + } + } else { /* Link down */ + DP(NETIF_MSG_LINK, "phy link down\n"); + + vars->phy_link_up = 0; + + vars->line_speed = 0; + vars->duplex = DUPLEX_FULL; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + + /* Indicate no mac active */ + vars->mac_type = MAC_TYPE_NONE; + if (vars->link_status & LINK_STATUS_PHYSICAL_LINK_FLAG) + vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG; + } +} + +void bnx2x_link_status_update(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u8 port = params->port; + u32 sync_offset, media_types; + /* Update PHY configuration */ + set_phy_vars(params, vars); + + vars->link_status = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + port_mb[port].link_status)); + + vars->phy_flags = PHY_XGXS_FLAG; + bnx2x_sync_link(params, vars); + /* Sync media type */ + sync_offset = params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].media_type); + media_types = REG_RD(bp, sync_offset); + + params->phy[INT_PHY].media_type = + (media_types & PORT_HW_CFG_MEDIA_TYPE_PHY0_MASK) >> + PORT_HW_CFG_MEDIA_TYPE_PHY0_SHIFT; + params->phy[EXT_PHY1].media_type = + (media_types & PORT_HW_CFG_MEDIA_TYPE_PHY1_MASK) >> + PORT_HW_CFG_MEDIA_TYPE_PHY1_SHIFT; + params->phy[EXT_PHY2].media_type = + (media_types & PORT_HW_CFG_MEDIA_TYPE_PHY2_MASK) >> + PORT_HW_CFG_MEDIA_TYPE_PHY2_SHIFT; + DP(NETIF_MSG_LINK, "media_types = 0x%x\n", media_types); + + /* Sync AEU offset */ + sync_offset = params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].aeu_int_mask); + + vars->aeu_int_mask = REG_RD(bp, sync_offset); + + /* Sync PFC status */ + if (vars->link_status & LINK_STATUS_PFC_ENABLED) + params->feature_config_flags |= + FEATURE_CONFIG_PFC_ENABLED; + else + params->feature_config_flags &= + ~FEATURE_CONFIG_PFC_ENABLED; + + DP(NETIF_MSG_LINK, "link_status 0x%x phy_link_up %x int_mask 0x%x\n", + vars->link_status, vars->phy_link_up, vars->aeu_int_mask); + DP(NETIF_MSG_LINK, "line_speed %x duplex %x flow_ctrl 0x%x\n", + vars->line_speed, vars->duplex, vars->flow_ctrl); +} + +static void bnx2x_set_master_ln(struct link_params *params, + struct bnx2x_phy *phy) +{ + struct bnx2x *bp = params->bp; + u16 new_master_ln, ser_lane; + ser_lane = ((params->lane_config & + PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> + PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); + + /* Set the master_ln for AN */ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_XGXS_BLOCK2, + MDIO_XGXS_BLOCK2_TEST_MODE_LANE, + &new_master_ln); + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_XGXS_BLOCK2 , + MDIO_XGXS_BLOCK2_TEST_MODE_LANE, + (new_master_ln | ser_lane)); +} + +static int bnx2x_reset_unicore(struct link_params *params, + struct bnx2x_phy *phy, + u8 set_serdes) +{ + struct bnx2x *bp = params->bp; + u16 mii_control; + u16 i; + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, &mii_control); + + /* Reset the unicore */ + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, + (mii_control | + MDIO_COMBO_IEEO_MII_CONTROL_RESET)); + if (set_serdes) + bnx2x_set_serdes_access(bp, params->port); + + /* Wait for the reset to self clear */ + for (i = 0; i < MDIO_ACCESS_TIMEOUT; i++) { + udelay(5); + + /* The reset erased the previous bank value */ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, + &mii_control); + + if (!(mii_control & MDIO_COMBO_IEEO_MII_CONTROL_RESET)) { + udelay(5); + return 0; + } + } + + netdev_err(bp->dev, "Warning: PHY was not initialized," + " Port %d\n", + params->port); + DP(NETIF_MSG_LINK, "BUG! XGXS is still in reset!\n"); + return -EINVAL; + +} + +static void bnx2x_set_swap_lanes(struct link_params *params, + struct bnx2x_phy *phy) +{ + struct bnx2x *bp = params->bp; + /* Each two bits represents a lane number: + * No swap is 0123 => 0x1b no need to enable the swap + */ + u16 rx_lane_swap, tx_lane_swap; + + rx_lane_swap = ((params->lane_config & + PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK) >> + PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT); + tx_lane_swap = ((params->lane_config & + PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK) >> + PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT); + + if (rx_lane_swap != 0x1b) { + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_XGXS_BLOCK2, + MDIO_XGXS_BLOCK2_RX_LN_SWAP, + (rx_lane_swap | + MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE | + MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE)); + } else { + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_XGXS_BLOCK2, + MDIO_XGXS_BLOCK2_RX_LN_SWAP, 0); + } + + if (tx_lane_swap != 0x1b) { + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_XGXS_BLOCK2, + MDIO_XGXS_BLOCK2_TX_LN_SWAP, + (tx_lane_swap | + MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE)); + } else { + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_XGXS_BLOCK2, + MDIO_XGXS_BLOCK2_TX_LN_SWAP, 0); + } +} + +static void bnx2x_set_parallel_detection(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + u16 control2; + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, + &control2); + if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G) + control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; + else + control2 &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; + DP(NETIF_MSG_LINK, "phy->speed_cap_mask = 0x%x, control2 = 0x%x\n", + phy->speed_cap_mask, control2); + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, + control2); + + if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) && + (phy->speed_cap_mask & + PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) { + DP(NETIF_MSG_LINK, "XGXS\n"); + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_10G_PARALLEL_DETECT, + MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK, + MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK_CNT); + + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_10G_PARALLEL_DETECT, + MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL, + &control2); + + + control2 |= + MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN; + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_10G_PARALLEL_DETECT, + MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL, + control2); + + /* Disable parallel detection of HiG */ + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_XGXS_BLOCK2, + MDIO_XGXS_BLOCK2_UNICORE_MODE_10G, + MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS | + MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS); + } +} + +static void bnx2x_set_autoneg(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars, + u8 enable_cl73) +{ + struct bnx2x *bp = params->bp; + u16 reg_val; + + /* CL37 Autoneg */ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, ®_val); + + /* CL37 Autoneg Enabled */ + if (vars->line_speed == SPEED_AUTO_NEG) + reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_AN_EN; + else /* CL37 Autoneg Disabled */ + reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | + MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN); + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, reg_val); + + /* Enable/Disable Autodetection */ + + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, ®_val); + reg_val &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN | + MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT); + reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE; + if (vars->line_speed == SPEED_AUTO_NEG) + reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET; + else + reg_val &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET; + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, reg_val); + + /* Enable TetonII and BAM autoneg */ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_BAM_NEXT_PAGE, + MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL, + ®_val); + if (vars->line_speed == SPEED_AUTO_NEG) { + /* Enable BAM aneg Mode and TetonII aneg Mode */ + reg_val |= (MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE | + MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN); + } else { + /* TetonII and BAM Autoneg Disabled */ + reg_val &= ~(MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE | + MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN); + } + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_BAM_NEXT_PAGE, + MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL, + reg_val); + + if (enable_cl73) { + /* Enable Cl73 FSM status bits */ + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_USERB0, + MDIO_CL73_USERB0_CL73_UCTRL, + 0xe); + + /* Enable BAM Station Manager*/ + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_USERB0, + MDIO_CL73_USERB0_CL73_BAM_CTRL1, + MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN | + MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_STATION_MNGR_EN | + MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN); + + /* Advertise CL73 link speeds */ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB1, + MDIO_CL73_IEEEB1_AN_ADV2, + ®_val); + if (phy->speed_cap_mask & + PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) + reg_val |= MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4; + if (phy->speed_cap_mask & + PORT_HW_CFG_SPEED_CAPABILITY_D0_1G) + reg_val |= MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX; + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB1, + MDIO_CL73_IEEEB1_AN_ADV2, + reg_val); + + /* CL73 Autoneg Enabled */ + reg_val = MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN; + + } else /* CL73 Autoneg Disabled */ + reg_val = 0; + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB0, + MDIO_CL73_IEEEB0_CL73_AN_CONTROL, reg_val); +} + +/* Program SerDes, forced speed */ +static void bnx2x_program_serdes(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u16 reg_val; + + /* Program duplex, disable autoneg and sgmii*/ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, ®_val); + reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX | + MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | + MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK); + if (phy->req_duplex == DUPLEX_FULL) + reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX; + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, reg_val); + + /* Program speed + * - needed only if the speed is greater than 1G (2.5G or 10G) + */ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_MISC1, ®_val); + /* Clearing the speed value before setting the right speed */ + DP(NETIF_MSG_LINK, "MDIO_REG_BANK_SERDES_DIGITAL = 0x%x\n", reg_val); + + reg_val &= ~(MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_MASK | + MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL); + + if (!((vars->line_speed == SPEED_1000) || + (vars->line_speed == SPEED_100) || + (vars->line_speed == SPEED_10))) { + + reg_val |= (MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_156_25M | + MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL); + if (vars->line_speed == SPEED_10000) + reg_val |= + MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_10G_CX4; + } + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_MISC1, reg_val); + +} + +static void bnx2x_set_brcm_cl37_advertisement(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + u16 val = 0; + + /* Set extended capabilities */ + if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G) + val |= MDIO_OVER_1G_UP1_2_5G; + if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) + val |= MDIO_OVER_1G_UP1_10G; + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_OVER_1G, + MDIO_OVER_1G_UP1, val); + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_OVER_1G, + MDIO_OVER_1G_UP3, 0x400); +} + +static void bnx2x_set_ieee_aneg_advertisement(struct bnx2x_phy *phy, + struct link_params *params, + u16 ieee_fc) +{ + struct bnx2x *bp = params->bp; + u16 val; + /* For AN, we are always publishing full duplex */ + + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_AUTO_NEG_ADV, ieee_fc); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB1, + MDIO_CL73_IEEEB1_AN_ADV1, &val); val &= ~MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_BOTH; val |= ((ieee_fc<<3) & MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK); - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB1, - MDIO_CL73_IEEEB1_AN_ADV1, val); + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB1, + MDIO_CL73_IEEEB1_AN_ADV1, val); } static void bnx2x_restart_autoneg(struct bnx2x_phy *phy, @@ -2227,32 +5096,32 @@ static void bnx2x_restart_autoneg(struct bnx2x_phy *phy, /* Enable and restart BAM/CL37 aneg */ if (enable_cl73) { - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB0, - MDIO_CL73_IEEEB0_CL73_AN_CONTROL, - &mii_control); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB0, + MDIO_CL73_IEEEB0_CL73_AN_CONTROL, + &mii_control); - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB0, - MDIO_CL73_IEEEB0_CL73_AN_CONTROL, - (mii_control | - MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN | - MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN)); + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB0, + MDIO_CL73_IEEEB0_CL73_AN_CONTROL, + (mii_control | + MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN | + MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN)); } else { - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, - &mii_control); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, + &mii_control); DP(NETIF_MSG_LINK, - "bnx2x_restart_autoneg mii_control before = 0x%x\n", - mii_control); - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, - (mii_control | - MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | - MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN)); + "bnx2x_restart_autoneg mii_control before = 0x%x\n", + mii_control); + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, + (mii_control | + MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | + MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN)); } } @@ -2263,32 +5132,31 @@ static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy, struct bnx2x *bp = params->bp; u16 control1; - /* in SGMII mode, the unicore is always slave */ + /* In SGMII mode, the unicore is always slave */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, - &control1); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, + &control1); control1 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT; - - /* set sgmii mode (and not fiber) */ + /* Set sgmii mode (and not fiber) */ control1 &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE | MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET | MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_MSTR_MODE); - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, - control1); + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, + control1); - /* if forced speed */ + /* If forced speed */ if (!(vars->line_speed == SPEED_AUTO_NEG)) { - /* set speed, disable autoneg */ + /* Set speed, disable autoneg */ u16 mii_control; - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, - &mii_control); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, + &mii_control); mii_control &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK| MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX); @@ -2303,112 +5171,129 @@ static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy, MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_1000; break; case SPEED_10: - /* there is nothing to set for 10M */ + /* There is nothing to set for 10M */ break; default: - /* invalid speed for SGMII */ + /* Invalid speed for SGMII */ DP(NETIF_MSG_LINK, "Invalid line_speed 0x%x\n", - vars->line_speed); + vars->line_speed); break; } - /* setting the full duplex */ + /* Setting the full duplex */ if (phy->req_duplex == DUPLEX_FULL) mii_control |= MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX; - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_MII_CONTROL, - mii_control); + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_MII_CONTROL, + mii_control); } else { /* AN mode */ - /* enable and restart AN */ + /* Enable and restart AN */ bnx2x_restart_autoneg(phy, params, 0); } } -/** - * link management +/* Link management */ - -static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result) -{ /* LD LP */ - switch (pause_result) { /* ASYM P ASYM P */ - case 0xb: /* 1 0 1 1 */ - vars->flow_ctrl = BNX2X_FLOW_CTRL_TX; - break; - - case 0xe: /* 1 1 1 0 */ - vars->flow_ctrl = BNX2X_FLOW_CTRL_RX; - break; - - case 0x5: /* 0 1 0 1 */ - case 0x7: /* 0 1 1 1 */ - case 0xd: /* 1 1 0 1 */ - case 0xf: /* 1 1 1 1 */ - vars->flow_ctrl = BNX2X_FLOW_CTRL_BOTH; - break; - - default: - break; - } - if (pause_result & (1<<0)) - vars->link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE; - if (pause_result & (1<<1)) - vars->link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE; -} - - -static u8 bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy, - struct link_params *params) +static int bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy, + struct link_params *params) { struct bnx2x *bp = params->bp; u16 pd_10g, status2_1000x; if (phy->req_line_speed != SPEED_AUTO_NEG) return 0; - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_STATUS2, - &status2_1000x); - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_STATUS2, - &status2_1000x); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_A_1000X_STATUS2, + &status2_1000x); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_SERDES_DIGITAL, + MDIO_SERDES_DIGITAL_A_1000X_STATUS2, + &status2_1000x); if (status2_1000x & MDIO_SERDES_DIGITAL_A_1000X_STATUS2_AN_DISABLED) { DP(NETIF_MSG_LINK, "1G parallel detect link on port %d\n", - params->port); + params->port); return 1; } - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_10G_PARALLEL_DETECT, - MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS, - &pd_10g); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_10G_PARALLEL_DETECT, + MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS, + &pd_10g); if (pd_10g & MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS_PD_LINK) { DP(NETIF_MSG_LINK, "10G parallel detect link on port %d\n", - params->port); + params->port); return 1; } return 0; } +static void bnx2x_update_adv_fc(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars, + u32 gp_status) +{ + u16 ld_pause; /* local driver */ + u16 lp_pause; /* link partner */ + u16 pause_result; + struct bnx2x *bp = params->bp; + if ((gp_status & + (MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE | + MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE)) == + (MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE | + MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE)) { + + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB1, + MDIO_CL73_IEEEB1_AN_ADV1, + &ld_pause); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB1, + MDIO_CL73_IEEEB1_AN_LP_ADV1, + &lp_pause); + pause_result = (ld_pause & + MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK) >> 8; + pause_result |= (lp_pause & + MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_MASK) >> 10; + DP(NETIF_MSG_LINK, "pause_result CL73 0x%x\n", pause_result); + } else { + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_AUTO_NEG_ADV, + &ld_pause); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_COMBO_IEEE0, + MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1, + &lp_pause); + pause_result = (ld_pause & + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>5; + pause_result |= (lp_pause & + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>7; + DP(NETIF_MSG_LINK, "pause_result CL37 0x%x\n", pause_result); + } + bnx2x_pause_resolve(vars, pause_result); + +} + static void bnx2x_flow_ctrl_resolve(struct bnx2x_phy *phy, struct link_params *params, struct link_vars *vars, u32 gp_status) { struct bnx2x *bp = params->bp; - u16 ld_pause; /* local driver */ - u16 lp_pause; /* link partner */ - u16 pause_result; - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - /* resolve from gp_status in case of AN complete and not sgmii */ - if (phy->req_flow_ctrl != BNX2X_FLOW_CTRL_AUTO) + /* Resolve from gp_status in case of AN complete and not sgmii */ + if (phy->req_flow_ctrl != BNX2X_FLOW_CTRL_AUTO) { + /* Update the advertised flow-controled of LD/LP in AN */ + if (phy->req_line_speed == SPEED_AUTO_NEG) + bnx2x_update_adv_fc(phy, params, vars, gp_status); + /* But set the flow-control result as the requested one */ vars->flow_ctrl = phy->req_flow_ctrl; - else if (phy->req_line_speed != SPEED_AUTO_NEG) + } else if (phy->req_line_speed != SPEED_AUTO_NEG) vars->flow_ctrl = params->req_fc_auto_adv; else if ((gp_status & MDIO_AN_CL73_OR_37_COMPLETE) && (!(vars->phy_flags & PHY_SGMII_FLAG))) { @@ -2416,45 +5301,7 @@ static void bnx2x_flow_ctrl_resolve(struct bnx2x_phy *phy, vars->flow_ctrl = params->req_fc_auto_adv; return; } - if ((gp_status & - (MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE | - MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE)) == - (MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE | - MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE)) { - - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB1, - MDIO_CL73_IEEEB1_AN_ADV1, - &ld_pause); - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB1, - MDIO_CL73_IEEEB1_AN_LP_ADV1, - &lp_pause); - pause_result = (ld_pause & - MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK) - >> 8; - pause_result |= (lp_pause & - MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_MASK) - >> 10; - DP(NETIF_MSG_LINK, "pause_result CL73 0x%x\n", - pause_result); - } else { - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_AUTO_NEG_ADV, - &ld_pause); - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_COMBO_IEEE0, - MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1, - &lp_pause); - pause_result = (ld_pause & - MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>5; - pause_result |= (lp_pause & - MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>7; - DP(NETIF_MSG_LINK, "pause_result CL37 0x%x\n", - pause_result); - } - bnx2x_pause_resolve(vars, pause_result); + bnx2x_update_adv_fc(phy, params, vars, gp_status); } DP(NETIF_MSG_LINK, "flow_ctrl 0x%x\n", vars->flow_ctrl); } @@ -2463,67 +5310,65 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy, struct link_params *params) { struct bnx2x *bp = params->bp; - u16 rx_status, ustat_val, cl37_fsm_recieved; + u16 rx_status, ustat_val, cl37_fsm_received; DP(NETIF_MSG_LINK, "bnx2x_check_fallback_to_cl37\n"); /* Step 1: Make sure signal is detected */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_RX0, - MDIO_RX0_RX_STATUS, - &rx_status); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_RX0, + MDIO_RX0_RX_STATUS, + &rx_status); if ((rx_status & MDIO_RX0_RX_STATUS_SIGDET) != (MDIO_RX0_RX_STATUS_SIGDET)) { DP(NETIF_MSG_LINK, "Signal is not detected. Restoring CL73." - "rx_status(0x80b0) = 0x%x\n", rx_status); - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB0, - MDIO_CL73_IEEEB0_CL73_AN_CONTROL, - MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN); + "rx_status(0x80b0) = 0x%x\n", rx_status); + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB0, + MDIO_CL73_IEEEB0_CL73_AN_CONTROL, + MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN); return; } /* Step 2: Check CL73 state machine */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_USERB0, - MDIO_CL73_USERB0_CL73_USTAT1, - &ustat_val); + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_USERB0, + MDIO_CL73_USERB0_CL73_USTAT1, + &ustat_val); if ((ustat_val & (MDIO_CL73_USERB0_CL73_USTAT1_LINK_STATUS_CHECK | MDIO_CL73_USERB0_CL73_USTAT1_AN_GOOD_CHECK_BAM37)) != (MDIO_CL73_USERB0_CL73_USTAT1_LINK_STATUS_CHECK | MDIO_CL73_USERB0_CL73_USTAT1_AN_GOOD_CHECK_BAM37)) { DP(NETIF_MSG_LINK, "CL73 state-machine is not stable. " - "ustat_val(0x8371) = 0x%x\n", ustat_val); + "ustat_val(0x8371) = 0x%x\n", ustat_val); return; } - /** - * Step 3: Check CL37 Message Pages received to indicate LP - * supports only CL37 + /* Step 3: Check CL37 Message Pages received to indicate LP + * supports only CL37 */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_REMOTE_PHY, - MDIO_REMOTE_PHY_MISC_RX_STATUS, - &cl37_fsm_recieved); - if ((cl37_fsm_recieved & + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_REMOTE_PHY, + MDIO_REMOTE_PHY_MISC_RX_STATUS, + &cl37_fsm_received); + if ((cl37_fsm_received & (MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG | MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG)) != (MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG | MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG)) { DP(NETIF_MSG_LINK, "No CL37 FSM were received. " - "misc_rx_status(0x8330) = 0x%x\n", - cl37_fsm_recieved); + "misc_rx_status(0x8330) = 0x%x\n", + cl37_fsm_received); return; } - /** - * The combined cl37/cl73 fsm state information indicating that + /* The combined cl37/cl73 fsm state information indicating that * we are connected to a device which does not support cl73, but * does support cl37 BAM. In this case we disable cl73 and * restart cl37 auto-neg */ /* Disable CL73 */ - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_CL73_IEEEB0, - MDIO_CL73_IEEEB0_CL73_AN_CONTROL, - 0); + CL22_WR_OVER_CL45(bp, phy, + MDIO_REG_BANK_CL73_IEEEB0, + MDIO_CL73_IEEEB0_CL73_AN_CONTROL, + 0); /* Restart CL37 autoneg */ bnx2x_restart_autoneg(phy, params, 0); DP(NETIF_MSG_LINK, "Disabling CL73, and restarting CL37 autoneg\n"); @@ -2542,108 +5387,25 @@ static void bnx2x_xgxs_an_resolve(struct bnx2x_phy *phy, vars->link_status |= LINK_STATUS_PARALLEL_DETECTION_USED; } -static u8 bnx2x_xgxs_quad_read_status(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) -{ - u16 sgmii_link; - struct bnx2x *bp = params->bp; - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_SERDES_DIGITAL, - MDIO_SERDES_DIGITAL_A_1000X_STATUS1, - &sgmii_link); - DP(NETIF_MSG_LINK, "port [%x:%x] sgmii_link = 0x%x\n", BP_PATH(bp), - params->port, sgmii_link); - if ((sgmii_link & (MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SGMII | - MDIO_SERDES_DIGITAL_A_1000X_STATUS1_LINK)) == - (MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SGMII | - MDIO_SERDES_DIGITAL_A_1000X_STATUS1_LINK)) - vars->phy_link_up = 1; - else - vars->phy_link_up = 0; - if (sgmii_link & MDIO_SERDES_DIGITAL_A_1000X_STATUS1_DUPLEX) - vars->duplex = DUPLEX_FULL; - else - vars->duplex = DUPLEX_HALF; - - if (vars->phy_link_up) { - switch (sgmii_link & - MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_MASK) { - case MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_10M: - vars->line_speed = SPEED_10; - if (vars->duplex == DUPLEX_FULL) - vars->link_status |= LINK_10TFD; - else - vars->link_status |= LINK_10THD; - break; - case MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_100M: - vars->line_speed = SPEED_100; - if (vars->duplex == DUPLEX_FULL) - vars->link_status |= LINK_100TXFD; - else - vars->link_status |= LINK_100TXHD; - break; - case MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_1G: - vars->line_speed = SPEED_1000; - if (vars->duplex == DUPLEX_FULL) - vars->link_status |= LINK_1000TFD; - else - vars->link_status |= LINK_1000THD; - break; - default: - DP(NETIF_MSG_LINK, "link speed unsupported" - " 1000x_link_status 0x%x\n", sgmii_link); - return -EINVAL; - } - DP(NETIF_MSG_LINK, "phy link up @ %d Mbps\n", vars->line_speed); - } else { - DP(NETIF_MSG_LINK, "phy link down\n"); - - vars->phy_link_up = 0; - - vars->duplex = DUPLEX_FULL; - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - vars->mac_type = MAC_TYPE_NONE; - } - return 0; -} -static u8 bnx2x_link_settings_status(struct bnx2x_phy *phy, +static int bnx2x_get_link_speed_duplex(struct bnx2x_phy *phy, struct link_params *params, - struct link_vars *vars) + struct link_vars *vars, + u16 is_link_up, + u16 speed_mask, + u16 is_duplex) { struct bnx2x *bp = params->bp; - u16 new_line_speed, gp_status; - u8 rc = 0; - - /* Read gp_status */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_GP_STATUS, - MDIO_GP_STATUS_TOP_AN_STATUS1, - &gp_status); - if (phy->req_line_speed == SPEED_AUTO_NEG) vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_ENABLED; - if (gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS) { - DP(NETIF_MSG_LINK, "phy link up gp_status=0x%x\n", - gp_status); + if (is_link_up) { + DP(NETIF_MSG_LINK, "phy link up\n"); vars->phy_link_up = 1; vars->link_status |= LINK_STATUS_LINK_UP; - if (gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_DUPLEX_STATUS) - vars->duplex = DUPLEX_FULL; - else - vars->duplex = DUPLEX_HALF; - if (SINGLE_MEDIA_DIRECT(params)) { - bnx2x_flow_ctrl_resolve(phy, params, vars, gp_status); - if (phy->req_line_speed == SPEED_AUTO_NEG) - bnx2x_xgxs_an_resolve(phy, params, vars, - gp_status); - } - - switch (gp_status & GP_STATUS_SPEED_MASK) { + switch (speed_mask) { case GP_STATUS_10M: - new_line_speed = SPEED_10; + vars->line_speed = SPEED_10; if (vars->duplex == DUPLEX_FULL) vars->link_status |= LINK_10TFD; else @@ -2651,15 +5413,16 @@ static u8 bnx2x_link_settings_status(struct bnx2x_phy *phy, break; case GP_STATUS_100M: - new_line_speed = SPEED_100; + vars->line_speed = SPEED_100; if (vars->duplex == DUPLEX_FULL) vars->link_status |= LINK_100TXFD; else vars->link_status |= LINK_100TXHD; break; + case GP_STATUS_1G: case GP_STATUS_1G_KX: - new_line_speed = SPEED_1000; + vars->line_speed = SPEED_1000; if (vars->duplex == DUPLEX_FULL) vars->link_status |= LINK_1000TFD; else @@ -2667,7 +5430,7 @@ static u8 bnx2x_link_settings_status(struct bnx2x_phy *phy, break; case GP_STATUS_2_5G: - new_line_speed = SPEED_2500; + vars->line_speed = SPEED_2500; if (vars->duplex == DUPLEX_FULL) vars->link_status |= LINK_2500TFD; else @@ -2677,51 +5440,29 @@ static u8 bnx2x_link_settings_status(struct bnx2x_phy *phy, case GP_STATUS_5G: case GP_STATUS_6G: DP(NETIF_MSG_LINK, - "link speed unsupported gp_status 0x%x\n", - gp_status); + "link speed unsupported gp_status 0x%x\n", + speed_mask); return -EINVAL; case GP_STATUS_10G_KX4: case GP_STATUS_10G_HIG: case GP_STATUS_10G_CX4: - new_line_speed = SPEED_10000; + case GP_STATUS_10G_KR: + case GP_STATUS_10G_SFI: + case GP_STATUS_10G_XFI: + vars->line_speed = SPEED_10000; vars->link_status |= LINK_10GTFD; break; - - case GP_STATUS_12G_HIG: - new_line_speed = SPEED_12000; - vars->link_status |= LINK_12GTFD; + case GP_STATUS_20G_DXGXS: + vars->line_speed = SPEED_20000; + vars->link_status |= LINK_20GTFD; break; - - case GP_STATUS_12_5G: - new_line_speed = SPEED_12500; - vars->link_status |= LINK_12_5GTFD; - break; - - case GP_STATUS_13G: - new_line_speed = SPEED_13000; - vars->link_status |= LINK_13GTFD; - break; - - case GP_STATUS_15G: - new_line_speed = SPEED_15000; - vars->link_status |= LINK_15GTFD; - break; - - case GP_STATUS_16G: - new_line_speed = SPEED_16000; - vars->link_status |= LINK_16GTFD; - break; - default: DP(NETIF_MSG_LINK, - "link speed unsupported gp_status 0x%x\n", - gp_status); + "link speed unsupported gp_status 0x%x\n", + speed_mask); return -EINVAL; } - - vars->line_speed = new_line_speed; - } else { /* link_down */ DP(NETIF_MSG_LINK, "phy link down\n"); @@ -2730,7 +5471,46 @@ static u8 bnx2x_link_settings_status(struct bnx2x_phy *phy, vars->duplex = DUPLEX_FULL; vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; vars->mac_type = MAC_TYPE_NONE; + } + DP(NETIF_MSG_LINK, " phy_link_up %x line_speed %d\n", + vars->phy_link_up, vars->line_speed); + return 0; +} +static int bnx2x_link_settings_status(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + + u16 gp_status, duplex = DUPLEX_HALF, link_up = 0, speed_mask; + int rc = 0; + + /* Read gp_status */ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_GP_STATUS, + MDIO_GP_STATUS_TOP_AN_STATUS1, + &gp_status); + if (gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_DUPLEX_STATUS) + duplex = DUPLEX_FULL; + if (gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS) + link_up = 1; + speed_mask = gp_status & GP_STATUS_SPEED_MASK; + DP(NETIF_MSG_LINK, "gp_status 0x%x, is_link_up %d, speed_mask 0x%x\n", + gp_status, link_up, speed_mask); + rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, speed_mask, + duplex); + if (rc == -EINVAL) + return rc; + + if (gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS) { + if (SINGLE_MEDIA_DIRECT(params)) { + bnx2x_flow_ctrl_resolve(phy, params, vars, gp_status); + if (phy->req_line_speed == SPEED_AUTO_NEG) + bnx2x_xgxs_an_resolve(phy, params, vars, + gp_status); + } + } else { /* Link_down */ if ((phy->req_line_speed == SPEED_AUTO_NEG) && SINGLE_MEDIA_DIRECT(params)) { /* Check signal is detected */ @@ -2738,13 +5518,139 @@ static u8 bnx2x_link_settings_status(struct bnx2x_phy *phy, } } - DP(NETIF_MSG_LINK, "gp_status 0x%x phy_link_up %x line_speed %d\n", - gp_status, vars->phy_link_up, vars->line_speed); + /* Read LP advertised speeds*/ + if (SINGLE_MEDIA_DIRECT(params) && + (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE)) { + u16 val; + + CL22_RD_OVER_CL45(bp, phy, MDIO_REG_BANK_CL73_IEEEB1, + MDIO_CL73_IEEEB1_AN_LP_ADV2, &val); + + if (val & MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE; + if (val & (MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4 | + MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KR)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE; + + CL22_RD_OVER_CL45(bp, phy, MDIO_REG_BANK_OVER_1G, + MDIO_OVER_1G_LP_UP1, &val); + + if (val & MDIO_OVER_1G_UP1_2_5G) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE; + if (val & (MDIO_OVER_1G_UP1_10G | MDIO_OVER_1G_UP1_10GH)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE; + } + DP(NETIF_MSG_LINK, "duplex %x flow_ctrl 0x%x link_status 0x%x\n", vars->duplex, vars->flow_ctrl, vars->link_status); return rc; } +static int bnx2x_warpcore_read_status(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u8 lane; + u16 gp_status1, gp_speed, link_up, duplex = DUPLEX_FULL; + int rc = 0; + lane = bnx2x_get_warpcore_lane(phy, params); + /* Read gp_status */ + if (phy->req_line_speed > SPEED_10000) { + u16 temp_link_up; + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + 1, &temp_link_up); + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + 1, &link_up); + DP(NETIF_MSG_LINK, "PCS RX link status = 0x%x-->0x%x\n", + temp_link_up, link_up); + link_up &= (1<<2); + if (link_up) + bnx2x_ext_phy_resolve_fc(phy, params, vars); + } else { + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_GP2_STATUS_GP_2_1, &gp_status1); + DP(NETIF_MSG_LINK, "0x81d1 = 0x%x\n", gp_status1); + /* Check for either KR or generic link up. */ + gp_status1 = ((gp_status1 >> 8) & 0xf) | + ((gp_status1 >> 12) & 0xf); + link_up = gp_status1 & (1 << lane); + if (link_up && SINGLE_MEDIA_DIRECT(params)) { + u16 pd, gp_status4; + if (phy->req_line_speed == SPEED_AUTO_NEG) { + /* Check Autoneg complete */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_GP2_STATUS_GP_2_4, + &gp_status4); + if (gp_status4 & ((1<<12)<link_status |= + LINK_STATUS_AUTO_NEGOTIATE_COMPLETE; + + /* Check parallel detect used */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_PAR_DET_10G_STATUS, + &pd); + if (pd & (1<<15)) + vars->link_status |= + LINK_STATUS_PARALLEL_DETECTION_USED; + } + bnx2x_ext_phy_resolve_fc(phy, params, vars); + } + } + + if ((vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) && + SINGLE_MEDIA_DIRECT(params)) { + u16 val; + + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_LP_AUTO_NEG2, &val); + + if (val & MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE; + if (val & (MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4 | + MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KR)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE; + + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_DIGITAL3_LP_UP1, &val); + + if (val & MDIO_OVER_1G_UP1_2_5G) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE; + if (val & (MDIO_OVER_1G_UP1_10G | MDIO_OVER_1G_UP1_10GH)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE; + + } + + + if (lane < 2) { + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_GP2_STATUS_GP_2_2, &gp_speed); + } else { + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_GP2_STATUS_GP_2_3, &gp_speed); + } + DP(NETIF_MSG_LINK, "lane %d gp_speed 0x%x\n", lane, gp_speed); + + if ((lane & 1) == 0) + gp_speed <<= 8; + gp_speed &= 0x3f00; + + + rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, gp_speed, + duplex); + + DP(NETIF_MSG_LINK, "duplex %x flow_ctrl 0x%x link_status 0x%x\n", + vars->duplex, vars->flow_ctrl, vars->link_status); + return rc; +} static void bnx2x_set_gmii_tx_driver(struct link_params *params) { struct bnx2x *bp = params->bp; @@ -2753,12 +5659,12 @@ static void bnx2x_set_gmii_tx_driver(struct link_params *params) u16 tx_driver; u16 bank; - /* read precomp */ - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_OVER_1G, - MDIO_OVER_1G_LP_UP2, &lp_up2); + /* Read precomp */ + CL22_RD_OVER_CL45(bp, phy, + MDIO_REG_BANK_OVER_1G, + MDIO_OVER_1G_LP_UP2, &lp_up2); - /* bits [10:7] at lp_up2, positioned at [15:12] */ + /* Bits [10:7] at lp_up2, positioned at [15:12] */ lp_up2 = (((lp_up2 & MDIO_OVER_1G_LP_UP2_PREEMPHASIS_MASK) >> MDIO_OVER_1G_LP_UP2_PREEMPHASIS_SHIFT) << MDIO_TX0_TX_DRIVER_PREEMPHASIS_SHIFT); @@ -2768,24 +5674,24 @@ static void bnx2x_set_gmii_tx_driver(struct link_params *params) for (bank = MDIO_REG_BANK_TX0; bank <= MDIO_REG_BANK_TX3; bank += (MDIO_REG_BANK_TX1 - MDIO_REG_BANK_TX0)) { - CL45_RD_OVER_CL22(bp, phy, - bank, - MDIO_TX0_TX_DRIVER, &tx_driver); + CL22_RD_OVER_CL45(bp, phy, + bank, + MDIO_TX0_TX_DRIVER, &tx_driver); - /* replace tx_driver bits [15:12] */ + /* Replace tx_driver bits [15:12] */ if (lp_up2 != (tx_driver & MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK)) { tx_driver &= ~MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK; tx_driver |= lp_up2; - CL45_WR_OVER_CL22(bp, phy, - bank, - MDIO_TX0_TX_DRIVER, tx_driver); + CL22_WR_OVER_CL45(bp, phy, + bank, + MDIO_TX0_TX_DRIVER, tx_driver); } } } -static u8 bnx2x_emac_program(struct link_params *params, - struct link_vars *vars) +static int bnx2x_emac_program(struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; u8 port = params->port; @@ -2834,28 +5740,30 @@ static u8 bnx2x_emac_program(struct link_params *params, static void bnx2x_set_preemphasis(struct bnx2x_phy *phy, struct link_params *params) { - struct bnx2x *bp = params->bp; + u16 bank, i = 0; + struct bnx2x *bp = params->bp; + for (bank = MDIO_REG_BANK_RX0, i = 0; bank <= MDIO_REG_BANK_RX3; bank += (MDIO_REG_BANK_RX1-MDIO_REG_BANK_RX0), i++) { - CL45_WR_OVER_CL22(bp, phy, - bank, - MDIO_RX0_RX_EQ_BOOST, - phy->rx_preemphasis[i]); + CL22_WR_OVER_CL45(bp, phy, + bank, + MDIO_RX0_RX_EQ_BOOST, + phy->rx_preemphasis[i]); } for (bank = MDIO_REG_BANK_TX0, i = 0; bank <= MDIO_REG_BANK_TX3; bank += (MDIO_REG_BANK_TX1 - MDIO_REG_BANK_TX0), i++) { - CL45_WR_OVER_CL22(bp, phy, - bank, - MDIO_TX0_TX_DRIVER, - phy->tx_preemphasis[i]); + CL22_WR_OVER_CL45(bp, phy, + bank, + MDIO_TX0_TX_DRIVER, + phy->tx_preemphasis[i]); } } -static void bnx2x_init_internal_phy(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static void bnx2x_xgxs_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; u8 enable_cl73 = (SINGLE_MEDIA_DIRECT(params) || @@ -2866,32 +5774,32 @@ static void bnx2x_init_internal_phy(struct bnx2x_phy *phy, FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED)) bnx2x_set_preemphasis(phy, params); - /* forced speed requested? */ + /* Forced speed requested? */ if (vars->line_speed != SPEED_AUTO_NEG || (SINGLE_MEDIA_DIRECT(params) && params->loopback_mode == LOOPBACK_EXT)) { DP(NETIF_MSG_LINK, "not SGMII, no AN\n"); - /* disable autoneg */ + /* Disable autoneg */ bnx2x_set_autoneg(phy, params, vars, 0); - /* program speed and duplex */ + /* Program speed and duplex */ bnx2x_program_serdes(phy, params, vars); } else { /* AN_mode */ DP(NETIF_MSG_LINK, "not SGMII, AN\n"); /* AN enabled */ - bnx2x_set_brcm_cl37_advertisment(phy, params); + bnx2x_set_brcm_cl37_advertisement(phy, params); - /* program duplex & pause advertisement (for aneg) */ - bnx2x_set_ieee_aneg_advertisment(phy, params, - vars->ieee_fc); + /* Program duplex & pause advertisement (for aneg) */ + bnx2x_set_ieee_aneg_advertisement(phy, params, + vars->ieee_fc); - /* enable autoneg */ + /* Enable autoneg */ bnx2x_set_autoneg(phy, params, vars, enable_cl73); - /* enable and restart AN */ + /* Enable and restart AN */ bnx2x_restart_autoneg(phy, params, enable_cl73); } @@ -2901,29 +5809,13 @@ static void bnx2x_init_internal_phy(struct bnx2x_phy *phy, bnx2x_initialize_sgmii_process(phy, params, vars); } } -static u8 bnx2x_init_serdes(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) -{ - u8 rc; - vars->phy_flags |= PHY_SGMII_FLAG; - bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); - bnx2x_set_aer_mmd_serdes(params->bp, phy); - rc = bnx2x_reset_unicore(params, phy, 1); - /* reset the SerDes and wait for reset bit return low */ - if (rc != 0) - return rc; - bnx2x_set_aer_mmd_serdes(params->bp, phy); - return rc; -} - -static u8 bnx2x_init_xgxs(struct bnx2x_phy *phy, +static int bnx2x_prepare_xgxs(struct bnx2x_phy *phy, struct link_params *params, struct link_vars *vars) { - u8 rc; - vars->phy_flags = PHY_XGXS_FLAG; + int rc; + vars->phy_flags |= PHY_XGXS_FLAG; if ((phy->req_line_speed && ((phy->req_line_speed == SPEED_100) || (phy->req_line_speed == SPEED_10))) || @@ -2931,51 +5823,55 @@ static u8 bnx2x_init_xgxs(struct bnx2x_phy *phy, (phy->speed_cap_mask >= PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL) && (phy->speed_cap_mask < - PORT_HW_CFG_SPEED_CAPABILITY_D0_1G) - )) + PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)) || + (phy->type == PORT_HW_CFG_SERDES_EXT_PHY_TYPE_DIRECT_SD)) vars->phy_flags |= PHY_SGMII_FLAG; else vars->phy_flags &= ~PHY_SGMII_FLAG; bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); - bnx2x_set_aer_mmd_xgxs(params, phy); - bnx2x_set_master_ln(params, phy); + bnx2x_set_aer_mmd(params, phy); + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) + bnx2x_set_master_ln(params, phy); rc = bnx2x_reset_unicore(params, phy, 0); - /* reset the SerDes and wait for reset bit return low */ + /* Reset the SerDes and wait for reset bit return low */ if (rc != 0) return rc; - bnx2x_set_aer_mmd_xgxs(params, phy); - - /* setting the masterLn_def again after the reset */ - bnx2x_set_master_ln(params, phy); - bnx2x_set_swap_lanes(params, phy); + bnx2x_set_aer_mmd(params, phy); + /* Setting the masterLn_def again after the reset */ + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) { + bnx2x_set_master_ln(params, phy); + bnx2x_set_swap_lanes(params, phy); + } return rc; } -static u8 bnx2x_init_xgxs_quad(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) -{ - vars->phy_flags = PHY_XGXS_FLAG | PHY_SGMII_FLAG; - bnx2x_set_aer_mmd_xgxs(params, phy); - /* reset the SerDes and wait for reset bit return low */ - return bnx2x_reset_unicore(params, phy, 0); -} static u16 bnx2x_wait_reset_complete(struct bnx2x *bp, - struct bnx2x_phy *phy) + struct bnx2x_phy *phy, + struct link_params *params) { u16 cnt, ctrl; - /* Wait for soft reset to get cleared upto 1 sec */ + /* Wait for soft reset to get cleared up to 1 sec */ for (cnt = 0; cnt < 1000; cnt++) { - bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, &ctrl); + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE) + bnx2x_cl22_read(bp, phy, + MDIO_PMA_REG_CTRL, &ctrl); + else + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, + MDIO_PMA_REG_CTRL, &ctrl); if (!(ctrl & (1<<15))) break; msleep(1); } + + if (cnt == 1000) + netdev_err(bp->dev, "Warning: PHY was not initialized," + " Port %d\n", + params->port); DP(NETIF_MSG_LINK, "control reg 0x%x (after %d ms)\n", ctrl, cnt); return cnt; } @@ -2987,7 +5883,11 @@ static void bnx2x_link_int_enable(struct link_params *params) struct bnx2x *bp = params->bp; /* Setting the status to report on link up for either XGXS or SerDes */ - if (params->switch_cfg == SWITCH_CFG_10G) { + if (CHIP_IS_E3(bp)) { + mask = NIG_MASK_XGXS0_LINK_STATUS; + if (!(SINGLE_MEDIA_DIRECT(params))) + mask |= NIG_MASK_MI_INT; + } else if (params->switch_cfg == SWITCH_CFG_10G) { mask = (NIG_MASK_XGXS0_LINK10G | NIG_MASK_XGXS0_LINK_STATUS); DP(NETIF_MSG_LINK, "enabled XGXS interrupt\n"); @@ -2997,6 +5897,7 @@ static void bnx2x_link_int_enable(struct link_params *params) mask |= NIG_MASK_MI_INT; DP(NETIF_MSG_LINK, "enabled external phy int\n"); } + } else { /* SerDes */ mask = NIG_MASK_SERDES0_LINK_STATUS; DP(NETIF_MSG_LINK, "enabled SerDes interrupt\n"); @@ -3012,15 +5913,15 @@ static void bnx2x_link_int_enable(struct link_params *params) mask); DP(NETIF_MSG_LINK, "port %x, is_xgxs %x, int_status 0x%x\n", port, - (params->switch_cfg == SWITCH_CFG_10G), - REG_RD(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4)); + (params->switch_cfg == SWITCH_CFG_10G), + REG_RD(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4)); DP(NETIF_MSG_LINK, " int_mask 0x%x, MI_INT %x, SERDES_LINK %x\n", - REG_RD(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4), - REG_RD(bp, NIG_REG_EMAC0_STATUS_MISC_MI_INT + port*0x18), - REG_RD(bp, NIG_REG_SERDES0_STATUS_LINK_STATUS+port*0x3c)); + REG_RD(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4), + REG_RD(bp, NIG_REG_EMAC0_STATUS_MISC_MI_INT + port*0x18), + REG_RD(bp, NIG_REG_SERDES0_STATUS_LINK_STATUS+port*0x3c)); DP(NETIF_MSG_LINK, " 10G %x, XGXS_LINK %x\n", - REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68), - REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK_STATUS + port*0x68)); + REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68), + REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK_STATUS + port*0x68)); } static void bnx2x_rearm_latch_signal(struct bnx2x *bp, u8 port, @@ -3028,8 +5929,7 @@ static void bnx2x_rearm_latch_signal(struct bnx2x *bp, u8 port, { u32 latch_status = 0; - /** - * Disable the MI INT ( external phy int ) by writing 1 to the + /* Disable the MI INT ( external phy int ) by writing 1 to the * status register. Link down indication is high-active-signal, * so in this case we need to write the status to clear the XOR */ @@ -3053,75 +5953,52 @@ static void bnx2x_rearm_latch_signal(struct bnx2x *bp, u8 port, /* For all latched-signal=up : Re-Arm Latch signals */ REG_WR(bp, NIG_REG_LATCH_STATUS_0 + port*8, - (latch_status & 0xfffe) | (latch_status & 1)); + (latch_status & 0xfffe) | (latch_status & 1)); } /* For all latched-signal=up,Write original_signal to status */ } static void bnx2x_link_int_ack(struct link_params *params, - struct link_vars *vars, u8 is_10g) + struct link_vars *vars, u8 is_10g_plus) { struct bnx2x *bp = params->bp; u8 port = params->port; - - /** First reset all status we assume only one line will be - * change at a time + u32 mask; + /* First reset all status we assume only one line will be + * change at a time */ - bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4, (NIG_STATUS_XGXS0_LINK10G | NIG_STATUS_XGXS0_LINK_STATUS | NIG_STATUS_SERDES0_LINK_STATUS)); if (vars->phy_link_up) { - if (is_10g) { - /** - * Disable the 10G link interrupt by writing 1 to the - * status register - */ - DP(NETIF_MSG_LINK, "10G XGXS phy link up\n"); - bnx2x_bits_en(bp, - NIG_REG_STATUS_INTERRUPT_PORT0 + port*4, - NIG_STATUS_XGXS0_LINK10G); - - } else if (params->switch_cfg == SWITCH_CFG_10G) { - u32 mask; - /** - * Disable the link interrupt by writing 1 to the - * relevant lane in the status register - */ - if (params->phy[INT_PHY].flags & - FLAGS_4_PORT_MODE) - mask = NIG_STATUS_XGXS0_LINK_STATUS; - else { + if (USES_WARPCORE(bp)) + mask = NIG_STATUS_XGXS0_LINK_STATUS; + else { + if (is_10g_plus) + mask = NIG_STATUS_XGXS0_LINK10G; + else if (params->switch_cfg == SWITCH_CFG_10G) { + /* Disable the link interrupt by writing 1 to + * the relevant lane in the status register + */ u32 ser_lane = ((params->lane_config & - PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> - PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); + PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> + PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); mask = ((1 << ser_lane) << NIG_STATUS_XGXS0_LINK_STATUS_SIZE); - } - DP(NETIF_MSG_LINK, "%d speed XGXS phy link up." - " int ack mask 0x%x\n", - vars->line_speed, mask); - bnx2x_bits_en(bp, - NIG_REG_STATUS_INTERRUPT_PORT0 + port*4, - mask); - - } else { /* SerDes */ - DP(NETIF_MSG_LINK, "SerDes phy link up\n"); - /** - * Disable the link interrupt by writing 1 to the status - * register - */ - bnx2x_bits_en(bp, - NIG_REG_STATUS_INTERRUPT_PORT0 + port*4, - NIG_STATUS_SERDES0_LINK_STATUS); + } else + mask = NIG_STATUS_SERDES0_LINK_STATUS; } - + DP(NETIF_MSG_LINK, "Ack link up interrupt with mask 0x%x\n", + mask); + bnx2x_bits_en(bp, + NIG_REG_STATUS_INTERRUPT_PORT0 + port*4, + mask); } } -static u8 bnx2x_format_ver(u32 num, u8 *str, u16 *len) +static int bnx2x_format_ver(u32 num, u8 *str, u16 *len) { u8 *str_ptr = str; u32 mask = 0xf0000000; @@ -3159,18 +6036,20 @@ static u8 bnx2x_format_ver(u32 num, u8 *str, u16 *len) return 0; } -static u8 bnx2x_null_format_ver(u32 spirom_ver, u8 *str, u16 *len) + +static int bnx2x_null_format_ver(u32 spirom_ver, u8 *str, u16 *len) { str[0] = '\0'; (*len)--; return 0; } -u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded, - u8 *version, u16 len) + +int bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 *version, + u16 len) { struct bnx2x *bp; u32 spirom_ver = 0; - u8 status = 0; + int status = 0; u8 *ver_p = version; u16 remain_len = len; if (version == NULL || params == NULL) @@ -3183,14 +6062,13 @@ u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded, if (params->phy[EXT_PHY1].format_fw_ver) { status |= params->phy[EXT_PHY1].format_fw_ver(spirom_ver, - ver_p, - &remain_len); + ver_p, + &remain_len); ver_p += (len - remain_len); } if ((params->num_phys == MAX_PHYS) && (params->phy[EXT_PHY2].ver_addr != 0)) { - spirom_ver = REG_RD(bp, - params->phy[EXT_PHY2].ver_addr); + spirom_ver = REG_RD(bp, params->phy[EXT_PHY2].ver_addr); if (params->phy[EXT_PHY2].format_fw_ver) { *ver_p = '/'; ver_p++; @@ -3205,63 +6083,26 @@ u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded, *ver_p = '\0'; return status; } -static void bnx2x_set_xgxs_quad_loopback(struct bnx2x_phy *phy, - struct link_params *params) -{ - u16 lane_ctrl, g_port; - u16 mii_ctrl; - struct bnx2x *bp = params->bp; - g_port = (BP_PATH(bp) + (params->port<<1)); - CL45_RD_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK1, - MDIO_BLOCK1_LANE_CTRL2, - &lane_ctrl); - lane_ctrl |= (1 << g_port); - CL45_WR_OVER_CL22(bp, phy, - MDIO_REG_BANK_XGXS_BLOCK1, - MDIO_BLOCK1_LANE_CTRL2, - lane_ctrl); - bnx2x_cl45_read(bp, phy, 5, - (MDIO_REG_BANK_COMBO_IEEE0 + - (MDIO_COMBO_IEEE0_MII_CONTROL & 0xf)), - &mii_ctrl); - bnx2x_cl45_write(bp, phy, 5, - (MDIO_REG_BANK_COMBO_IEEE0 + - (MDIO_COMBO_IEEE0_MII_CONTROL & 0xf)), - mii_ctrl | - MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK); - - DP(NETIF_MSG_LINK, "XGXS 1G loopback enable on port %x\n", g_port); -} static void bnx2x_set_xgxs_loopback(struct bnx2x_phy *phy, struct link_params *params) { u8 port = params->port; struct bnx2x *bp = params->bp; - u32 md_devad; + if (phy->req_line_speed != SPEED_1000) { + u32 md_devad = 0; - if (phy->req_line_speed == SPEED_1000) { - u16 mii_ctrl; - DP(NETIF_MSG_LINK, "XGXS 1G loopback enable\n"); - bnx2x_cl45_read(bp, phy, 5, - (MDIO_REG_BANK_COMBO_IEEE0 + - (MDIO_COMBO_IEEE0_MII_CONTROL & 0xf)), - &mii_ctrl); - bnx2x_cl45_write(bp, phy, 5, - (MDIO_REG_BANK_COMBO_IEEE0 + - (MDIO_COMBO_IEEE0_MII_CONTROL & 0xf)), - mii_ctrl | - MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK); - } else { DP(NETIF_MSG_LINK, "XGXS 10G loopback enable\n"); - /* change the uni_phy_addr in the nig */ - md_devad = REG_RD(bp, (NIG_REG_XGXS0_CTRL_MD_DEVAD + - port*0x18)); + if (!CHIP_IS_E3(bp)) { + /* Change the uni_phy_addr in the nig */ + md_devad = REG_RD(bp, (NIG_REG_XGXS0_CTRL_MD_DEVAD + + port*0x18)); - REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, 0x5); + REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, + 0x5); + } bnx2x_cl45_write(bp, phy, 5, @@ -3275,155 +6116,42 @@ static void bnx2x_set_xgxs_loopback(struct bnx2x_phy *phy, (MDIO_CL73_IEEEB0_CL73_AN_CONTROL & 0xf)), 0x6041); msleep(200); - /* set aer mmd back */ - bnx2x_set_aer_mmd_xgxs(params, phy); + /* Set aer mmd back */ + bnx2x_set_aer_mmd(params, phy); - /* and md_devad */ - REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, - md_devad); + if (!CHIP_IS_E3(bp)) { + /* And md_devad */ + REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, + md_devad); + } + } else { + u16 mii_ctrl; + DP(NETIF_MSG_LINK, "XGXS 1G loopback enable\n"); + bnx2x_cl45_read(bp, phy, 5, + (MDIO_REG_BANK_COMBO_IEEE0 + + (MDIO_COMBO_IEEE0_MII_CONTROL & 0xf)), + &mii_ctrl); + bnx2x_cl45_write(bp, phy, 5, + (MDIO_REG_BANK_COMBO_IEEE0 + + (MDIO_COMBO_IEEE0_MII_CONTROL & 0xf)), + mii_ctrl | + MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK); } } - -/* - *------------------------------------------------------------------------ - * bnx2x_override_led_value - - * - * Override the led value of the requested led - * - *------------------------------------------------------------------------ - */ -u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, - u32 led_idx, u32 value) -{ - u32 reg_val; - - /* If port 0 then use EMAC0, else use EMAC1*/ - u32 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; - - DP(NETIF_MSG_LINK, - "bnx2x_override_led_value() port %x led_idx %d value %d\n", - port, led_idx, value); - - switch (led_idx) { - case 0: /* 10MB led */ - /** - * Read the current value of the LED register in the EMAC block - */ - reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); - /* Set the OVERRIDE bit to 1 */ - reg_val |= EMAC_LED_OVERRIDE; - /** - * If value is 1, set the 10M_OVERRIDE bit, otherwise reset it. - */ - reg_val = (value == 1) ? (reg_val | EMAC_LED_10MB_OVERRIDE) : - (reg_val & ~EMAC_LED_10MB_OVERRIDE); - REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); - break; - case 1: /* 100MB led */ - /** - * Read the current value of the LED register in the EMAC block - */ - reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); - /* Set the OVERRIDE bit to 1 */ - reg_val |= EMAC_LED_OVERRIDE; - /* If value is 1, set the 100M_OVERRIDE bit, - otherwise reset it.*/ - reg_val = (value == 1) ? (reg_val | EMAC_LED_100MB_OVERRIDE) : - (reg_val & ~EMAC_LED_100MB_OVERRIDE); - REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); - break; - case 2: /* 1000MB led */ - /** - * Read the current value of the LED register in the EMAC block - */ - reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); - /* Set the OVERRIDE bit to 1 */ - reg_val |= EMAC_LED_OVERRIDE; - /* If value is 1, set the 1000M_OVERRIDE bit, otherwise - reset it. */ - reg_val = (value == 1) ? (reg_val | EMAC_LED_1000MB_OVERRIDE) : - (reg_val & ~EMAC_LED_1000MB_OVERRIDE); - REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); - break; - case 3: /* 2500MB led */ - /** - * Read the current value of the LED register in the EMAC block - */ - reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); - /* Set the OVERRIDE bit to 1 */ - reg_val |= EMAC_LED_OVERRIDE; - /** - * If value is 1, set the 2500M_OVERRIDE bit, otherwise reset - * it. - */ - reg_val = (value == 1) ? (reg_val | EMAC_LED_2500MB_OVERRIDE) : - (reg_val & ~EMAC_LED_2500MB_OVERRIDE); - REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); - break; - case 4: /*10G led */ - if (port == 0) { - REG_WR(bp, NIG_REG_LED_10G_P0, - value); - } else { - REG_WR(bp, NIG_REG_LED_10G_P1, - value); - } - break; - case 5: /* TRAFFIC led */ - /* Find if the traffic control is via BMAC or EMAC */ - if (port == 0) - reg_val = REG_RD(bp, NIG_REG_NIG_EMAC0_EN); - else - reg_val = REG_RD(bp, NIG_REG_NIG_EMAC1_EN); - - /* Override the traffic led in the EMAC:*/ - if (reg_val == 1) { - /** - * Read the current value of the LED register in - * the EMAC block - */ - reg_val = REG_RD(bp, emac_base + - EMAC_REG_EMAC_LED); - /* Set the TRAFFIC_OVERRIDE bit to 1 */ - reg_val |= EMAC_LED_OVERRIDE; - /* If value is 1, set the TRAFFIC bit, otherwise - reset it.*/ - reg_val = (value == 1) ? (reg_val | EMAC_LED_TRAFFIC) : - (reg_val & ~EMAC_LED_TRAFFIC); - REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, - reg_val); - } else { /* Override the traffic led in the BMAC: */ - REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 - + port*4, 1); - REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 + - port*4, value); - } - break; - default: - DP(NETIF_MSG_LINK, - "bnx2x_override_led_value() unknown led index %d " - "(should be 0-5)\n", led_idx); - return -EINVAL; - } - - return 0; -} - - -u8 bnx2x_set_led(struct link_params *params, - struct link_vars *vars, u8 mode, u32 speed) +int bnx2x_set_led(struct link_params *params, + struct link_vars *vars, u8 mode, u32 speed) { u8 port = params->port; u16 hw_led_mode = params->hw_led_mode; - u8 rc = 0, phy_idx; + int rc = 0; + u8 phy_idx; u32 tmp; u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; struct bnx2x *bp = params->bp; - DP(NETIF_MSG_LINK, "bnx2x_set_led: port %x, mode %d\n", port, mode); DP(NETIF_MSG_LINK, "speed 0x%x, hw_led_mode 0x%x\n", - speed, hw_led_mode); + speed, hw_led_mode); /* In case */ for (phy_idx = EXT_PHY1; phy_idx < MAX_PHYS; phy_idx++) { if (params->phy[phy_idx].set_link_led) { @@ -3439,90 +6167,169 @@ u8 bnx2x_set_led(struct link_params *params, case LED_MODE_OFF: REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 0); REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, - SHARED_HW_CFG_LED_MAC1); + SHARED_HW_CFG_LED_MAC1); tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); - EMAC_WR(bp, EMAC_REG_EMAC_LED, (tmp | EMAC_LED_OVERRIDE)); - + if (params->phy[EXT_PHY1].type == + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE) + tmp &= ~(EMAC_LED_1000MB_OVERRIDE | + EMAC_LED_100MB_OVERRIDE | + EMAC_LED_10MB_OVERRIDE); + else + tmp |= EMAC_LED_OVERRIDE; + EMAC_WR(bp, EMAC_REG_EMAC_LED, tmp); break; case LED_MODE_OPER: - /** - * For all other phys, OPER mode is same as ON, so in case + /* For all other phys, OPER mode is same as ON, so in case * link is down, do nothing - **/ + */ if (!vars->link_up) break; case LED_MODE_ON: - if (SINGLE_MEDIA_DIRECT(params)) { - /** - * This is a work-around for HW issue found when link - * is up in CL73 - */ - REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0); - REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1); - } else { - REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, - hw_led_mode); - } + if (((params->phy[EXT_PHY1].type == + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) || + (params->phy[EXT_PHY1].type == + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722)) && + CHIP_IS_E2(bp) && params->num_phys == 2) { + /* This is a work-around for E2+8727 Configurations */ + if (mode == LED_MODE_ON || + speed == SPEED_10000){ + REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0); + REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1); - REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + - port*4, 0); + tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); + EMAC_WR(bp, EMAC_REG_EMAC_LED, + (tmp | EMAC_LED_OVERRIDE)); + /* Return here without enabling traffic + * LED blink and setting rate in ON mode. + * In oper mode, enabling LED blink + * and setting rate is needed. + */ + if (mode == LED_MODE_ON) + return rc; + } + } else if (SINGLE_MEDIA_DIRECT(params)) { + /* This is a work-around for HW issue found when link + * is up in CL73 + */ + if ((!CHIP_IS_E3(bp)) || + (CHIP_IS_E3(bp) && + mode == LED_MODE_ON)) + REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1); + + if (CHIP_IS_E1x(bp) || + CHIP_IS_E2(bp) || + (mode == LED_MODE_ON)) + REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0); + else + REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, + hw_led_mode); + } else if ((params->phy[EXT_PHY1].type == + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE) && + (mode == LED_MODE_ON)) { + REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0); + tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); + EMAC_WR(bp, EMAC_REG_EMAC_LED, tmp | + EMAC_LED_OVERRIDE | EMAC_LED_1000MB_OVERRIDE); + /* Break here; otherwise, it'll disable the + * intended override. + */ + break; + } else + REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, + hw_led_mode); + + REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + port*4, 0); /* Set blinking rate to ~15.9Hz */ - REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4, - LED_BLINK_RATE_VAL); + if (CHIP_IS_E3(bp)) + REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4, + LED_BLINK_RATE_VAL_E3); + else + REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4, + LED_BLINK_RATE_VAL_E1X_E2); REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 + - port*4, 1); + port*4, 1); tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); EMAC_WR(bp, EMAC_REG_EMAC_LED, - (tmp & (~EMAC_LED_OVERRIDE))); + (tmp & (~EMAC_LED_OVERRIDE))); if (CHIP_IS_E1(bp) && ((speed == SPEED_2500) || (speed == SPEED_1000) || (speed == SPEED_100) || (speed == SPEED_10))) { - /* On Everest 1 Ax chip versions for speeds less than - 10G LED scheme is different */ + /* For speeds less than 10G LED scheme is different */ REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 - + port*4, 1); + + port*4, 1); REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 + - port*4, 0); + port*4, 0); REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_TRAFFIC_P0 + - port*4, 1); + port*4, 1); } break; default: rc = -EINVAL; DP(NETIF_MSG_LINK, "bnx2x_set_led: Invalid led mode %d\n", - mode); + mode); break; } return rc; } -/** - * This function comes to reflect the actual link state read DIRECTLY from the +/* This function comes to reflect the actual link state read DIRECTLY from the * HW */ -u8 bnx2x_test_link(struct link_params *params, struct link_vars *vars, - u8 is_serdes) +int bnx2x_test_link(struct link_params *params, struct link_vars *vars, + u8 is_serdes) { struct bnx2x *bp = params->bp; u16 gp_status = 0, phy_index = 0; u8 ext_phy_link_up = 0, serdes_phy_type; struct link_vars temp_vars; + struct bnx2x_phy *int_phy = ¶ms->phy[INT_PHY]; + if (CHIP_REV_IS_FPGA(bp)) + return 0; + if (CHIP_REV_IS_EMUL(bp)) + return 0; - CL45_RD_OVER_CL22(bp, ¶ms->phy[INT_PHY], - MDIO_REG_BANK_GP_STATUS, - MDIO_GP_STATUS_TOP_AN_STATUS1, - &gp_status); - /* link is up only if both local phy and external phy are up */ + if (CHIP_IS_E3(bp)) { + u16 link_up; + if (params->req_line_speed[LINK_CONFIG_IDX(INT_PHY)] + > SPEED_10000) { + /* Check 20G link */ + bnx2x_cl45_read(bp, int_phy, MDIO_WC_DEVAD, + 1, &link_up); + bnx2x_cl45_read(bp, int_phy, MDIO_WC_DEVAD, + 1, &link_up); + link_up &= (1<<2); + } else { + /* Check 10G link and below*/ + u8 lane = bnx2x_get_warpcore_lane(int_phy, params); + bnx2x_cl45_read(bp, int_phy, MDIO_WC_DEVAD, + MDIO_WC_REG_GP2_STATUS_GP_2_1, + &gp_status); + gp_status = ((gp_status >> 8) & 0xf) | + ((gp_status >> 12) & 0xf); + link_up = gp_status & (1 << lane); + } + if (!link_up) + return -ESRCH; + } else { + CL22_RD_OVER_CL45(bp, int_phy, + MDIO_REG_BANK_GP_STATUS, + MDIO_GP_STATUS_TOP_AN_STATUS1, + &gp_status); + /* Link is up only if both local phy and external phy are up */ if (!(gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS)) return -ESRCH; + } + /* In XGXS loopback mode, do not check external PHY */ + if (params->loopback_mode == LOOPBACK_XGXS) + return 0; switch (params->num_phys) { case 1: @@ -3539,7 +6346,9 @@ u8 bnx2x_test_link(struct link_params *params, struct link_vars *vars, serdes_phy_type = ((params->phy[phy_index].media_type == ETH_PHY_SFP_FIBER) || (params->phy[phy_index].media_type == - ETH_PHY_XFP_FIBER)); + ETH_PHY_XFP_FIBER) || + (params->phy[phy_index].media_type == + ETH_PHY_DA_TWINAX)); if (is_serdes != serdes_phy_type) continue; @@ -3557,31 +6366,25 @@ u8 bnx2x_test_link(struct link_params *params, struct link_vars *vars, return -ESRCH; } -static u8 bnx2x_link_initialize(struct link_params *params, - struct link_vars *vars) +static int bnx2x_link_initialize(struct link_params *params, + struct link_vars *vars) { - u8 rc = 0; + int rc = 0; u8 phy_index, non_ext_phy; struct bnx2x *bp = params->bp; - /** - * In case of external phy existence, the line speed would be the - * line speed linked up by the external phy. In case it is direct - * only, then the line_speed during initialization will be - * equal to the req_line_speed - */ + /* In case of external phy existence, the line speed would be the + * line speed linked up by the external phy. In case it is direct + * only, then the line_speed during initialization will be + * equal to the req_line_speed + */ vars->line_speed = params->phy[INT_PHY].req_line_speed; - /** - * Initialize the internal phy in case this is a direct board + /* Initialize the internal phy in case this is a direct board * (no external phys), or this board has external phy which requires * to first. */ - - if (params->phy[INT_PHY].config_init) - params->phy[INT_PHY].config_init( - ¶ms->phy[INT_PHY], - params, vars); - + if (!USES_WARPCORE(bp)) + bnx2x_prepare_xgxs(¶ms->phy[INT_PHY], params, vars); /* init ext phy and enable link state int */ non_ext_phy = (SINGLE_MEDIA_DIRECT(params) || (params->loopback_mode == LOOPBACK_XGXS)); @@ -3590,34 +6393,45 @@ static u8 bnx2x_link_initialize(struct link_params *params, (params->phy[EXT_PHY1].flags & FLAGS_INIT_XGXS_FIRST) || (params->loopback_mode == LOOPBACK_EXT_PHY)) { struct bnx2x_phy *phy = ¶ms->phy[INT_PHY]; - if (vars->line_speed == SPEED_AUTO_NEG) - bnx2x_set_parallel_detection(phy, params, - (params->switch_cfg == - SWITCH_CFG_10G)); - bnx2x_init_internal_phy(phy, params, vars); + if (vars->line_speed == SPEED_AUTO_NEG && + (CHIP_IS_E1x(bp) || + CHIP_IS_E2(bp))) + bnx2x_set_parallel_detection(phy, params); + if (params->phy[INT_PHY].config_init) + params->phy[INT_PHY].config_init(phy, + params, + vars); } /* Init external phy*/ - if (!non_ext_phy) + if (non_ext_phy) { + if (params->phy[INT_PHY].supported & + SUPPORTED_FIBRE) + vars->link_status |= LINK_STATUS_SERDES_LINK; + } else { for (phy_index = EXT_PHY1; phy_index < params->num_phys; phy_index++) { - /** - * No need to initialize second phy in case of first + /* No need to initialize second phy in case of first * phy only selection. In case of second phy, we do * need to initialize the first phy, since they are * connected. - **/ + */ + if (params->phy[phy_index].supported & + SUPPORTED_FIBRE) + vars->link_status |= LINK_STATUS_SERDES_LINK; + if (phy_index == EXT_PHY2 && (bnx2x_phy_selection(params) == PORT_HW_CFG_PHY_SELECTION_FIRST_PHY)) { - DP(NETIF_MSG_LINK, "Not initializing second phy\n"); + DP(NETIF_MSG_LINK, + "Not initializing second phy\n"); continue; } params->phy[phy_index].config_init( ¶ms->phy[phy_index], params, vars); } - + } /* Reset the interrupt indication after phy was initialized */ bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + params->port*4, @@ -3631,10 +6445,9 @@ static u8 bnx2x_link_initialize(struct link_params *params, static void bnx2x_int_link_reset(struct bnx2x_phy *phy, struct link_params *params) { - /* reset the SerDes/XGXS */ - REG_WR(params->bp, GRCBASE_MISC + - MISC_REGISTERS_RESET_REG_3_CLEAR, - (0x1ff << (params->port*16))); + /* Reset the SerDes/XGXS */ + REG_WR(params->bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, + (0x1ff << (params->port*16))); } static void bnx2x_common_ext_link_reset(struct bnx2x_phy *phy, @@ -3648,54 +6461,71 @@ static void bnx2x_common_ext_link_reset(struct bnx2x_phy *phy, else gpio_port = params->port; bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, - MISC_REGISTERS_GPIO_OUTPUT_LOW, - gpio_port); + MISC_REGISTERS_GPIO_OUTPUT_LOW, + gpio_port); bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_LOW, - gpio_port); + MISC_REGISTERS_GPIO_OUTPUT_LOW, + gpio_port); DP(NETIF_MSG_LINK, "reset external PHY\n"); } -static u8 bnx2x_update_link_down(struct link_params *params, - struct link_vars *vars) +static int bnx2x_update_link_down(struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; u8 port = params->port; DP(NETIF_MSG_LINK, "Port %x: Link is down\n", port); bnx2x_set_led(params, vars, LED_MODE_OFF, 0); - - /* indicate no mac active */ + vars->phy_flags &= ~PHY_PHYSICAL_LINK_FLAG; + /* Indicate no mac active */ vars->mac_type = MAC_TYPE_NONE; - /* update shared memory */ - vars->link_status = 0; + /* Update shared memory */ + vars->link_status &= ~(LINK_STATUS_SPEED_AND_DUPLEX_MASK | + LINK_STATUS_LINK_UP | + LINK_STATUS_PHYSICAL_LINK_FLAG | + LINK_STATUS_AUTO_NEGOTIATE_COMPLETE | + LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK | + LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK | + LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK | + LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE | + LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE); vars->line_speed = 0; bnx2x_update_mng(params, vars->link_status); - /* activate nig drain */ + /* Activate nig drain */ REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 1); - /* disable emac */ - REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0); + /* Disable emac */ + if (!CHIP_IS_E3(bp)) + REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0); msleep(10); + /* Reset BigMac/Xmac */ + if (CHIP_IS_E1x(bp) || + CHIP_IS_E2(bp)) + bnx2x_bmac_rx_disable(bp, params->chip_id, params->port); + + if (CHIP_IS_E3(bp)) { + bnx2x_xmac_disable(params); + bnx2x_umac_disable(params); + } - /* reset BigMac */ - bnx2x_bmac_rx_disable(bp, params->chip_id, params->port); - REG_WR(bp, GRCBASE_MISC + - MISC_REGISTERS_RESET_REG_2_CLEAR, - (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); return 0; } -static u8 bnx2x_update_link_up(struct link_params *params, - struct link_vars *vars, - u8 link_10g) +static int bnx2x_update_link_up(struct link_params *params, + struct link_vars *vars, + u8 link_10g) { - u8 rc = 0; struct bnx2x *bp = params->bp; - vars->link_status |= LINK_STATUS_LINK_UP; + u8 phy_idx, port = params->port; + int rc = 0; + + vars->link_status |= (LINK_STATUS_LINK_UP | + LINK_STATUS_PHYSICAL_LINK_FLAG); + vars->phy_flags |= PHY_PHYSICAL_LINK_FLAG; if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) vars->link_status |= @@ -3704,38 +6534,68 @@ static u8 bnx2x_update_link_up(struct link_params *params, if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX) vars->link_status |= LINK_STATUS_RX_FLOW_CONTROL_ENABLED; - - if (link_10g) { - bnx2x_bmac_enable(params, vars, 0); + if (USES_WARPCORE(bp)) { + if (link_10g) { + if (bnx2x_xmac_enable(params, vars, 0) == + -ESRCH) { + DP(NETIF_MSG_LINK, "Found errors on XMAC\n"); + vars->link_up = 0; + vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG; + vars->link_status &= ~LINK_STATUS_LINK_UP; + } + } else + bnx2x_umac_enable(params, vars, 0); bnx2x_set_led(params, vars, - LED_MODE_OPER, SPEED_10000); - } else { - rc = bnx2x_emac_program(params, vars); + LED_MODE_OPER, vars->line_speed); + } + if ((CHIP_IS_E1x(bp) || + CHIP_IS_E2(bp))) { + if (link_10g) { + if (bnx2x_bmac_enable(params, vars, 0) == + -ESRCH) { + DP(NETIF_MSG_LINK, "Found errors on BMAC\n"); + vars->link_up = 0; + vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG; + vars->link_status &= ~LINK_STATUS_LINK_UP; + } - bnx2x_emac_enable(params, vars, 0); + bnx2x_set_led(params, vars, + LED_MODE_OPER, SPEED_10000); + } else { + rc = bnx2x_emac_program(params, vars); + bnx2x_emac_enable(params, vars, 0); - /* AN complete? */ - if ((vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) - && (!(vars->phy_flags & PHY_SGMII_FLAG)) && - SINGLE_MEDIA_DIRECT(params)) - bnx2x_set_gmii_tx_driver(params); + /* AN complete? */ + if ((vars->link_status & + LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) + && (!(vars->phy_flags & PHY_SGMII_FLAG)) && + SINGLE_MEDIA_DIRECT(params)) + bnx2x_set_gmii_tx_driver(params); + } } /* PBF - link up */ - if (!(CHIP_IS_E2(bp))) + if (CHIP_IS_E1x(bp)) rc |= bnx2x_pbf_update(params, vars->flow_ctrl, vars->line_speed); - /* disable drain */ - REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); + /* Disable drain */ + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 0); - /* update shared memory */ + /* Update shared memory */ bnx2x_update_mng(params, vars->link_status); + + /* Check remote fault */ + for (phy_idx = INT_PHY; phy_idx < MAX_PHYS; phy_idx++) { + if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) { + bnx2x_check_half_open_conn(params, vars, 0); + break; + } + } msleep(20); return rc; } -/** - * The bnx2x_link_update function should be called upon link +/* The bnx2x_link_update function should be called upon link * interrupt. * Link is considered up as follows: * - DIRECT_SINGLE_MEDIA - Only XGXS link (internal link) needs @@ -3747,17 +6607,18 @@ static u8 bnx2x_update_link_up(struct link_params *params, * external phy needs to be up, and at least one of the 2 * external phy link must be up. */ -u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) +int bnx2x_link_update(struct link_params *params, struct link_vars *vars) { struct bnx2x *bp = params->bp; struct link_vars phy_vars[MAX_PHYS]; u8 port = params->port; - u8 link_10g, phy_index; - u8 ext_phy_link_up = 0, cur_link_up, rc = 0; + u8 link_10g_plus, phy_index; + u8 ext_phy_link_up = 0, cur_link_up; + int rc = 0; u8 is_mi_int = 0; u16 ext_phy_line_speed = 0, prev_line_speed = vars->line_speed; u8 active_external_phy = INT_PHY; - vars->link_status = 0; + vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG; for (phy_index = INT_PHY; phy_index < params->num_phys; phy_index++) { phy_vars[phy_index].flow_ctrl = 0; @@ -3766,38 +6627,38 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) phy_vars[phy_index].duplex = DUPLEX_FULL; phy_vars[phy_index].phy_link_up = 0; phy_vars[phy_index].link_up = 0; + phy_vars[phy_index].fault_detected = 0; } - if (params->phy[INT_PHY].flags & FLAGS_4_PORT_MODE) - bnx2x_set_aer_mmd_xgxs(params, ¶ms->phy[INT_PHY]); + if (USES_WARPCORE(bp)) + bnx2x_set_aer_mmd(params, ¶ms->phy[INT_PHY]); DP(NETIF_MSG_LINK, "port %x, XGXS?%x, int_status 0x%x\n", port, (vars->phy_flags & PHY_XGXS_FLAG), REG_RD(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4)); is_mi_int = (u8)(REG_RD(bp, NIG_REG_EMAC0_STATUS_MISC_MI_INT + - port*0x18) > 0); + port*0x18) > 0); DP(NETIF_MSG_LINK, "int_mask 0x%x MI_INT %x, SERDES_LINK %x\n", REG_RD(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4), is_mi_int, - REG_RD(bp, - NIG_REG_SERDES0_STATUS_LINK_STATUS + port*0x3c)); + REG_RD(bp, NIG_REG_SERDES0_STATUS_LINK_STATUS + port*0x3c)); DP(NETIF_MSG_LINK, " 10G %x, XGXS_LINK %x\n", - REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68), - REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK_STATUS + port*0x68)); + REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68), + REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK_STATUS + port*0x68)); - /* disable emac */ - REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0); + /* Disable emac */ + if (!CHIP_IS_E3(bp)) + REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0); - /** - * Step 1: - * Check external link change only for external phys, and apply - * priority selection between them in case the link on both phys - * is up. Note that the instead of the common vars, a temporary - * vars argument is used since each phy may have different link/ - * speed/duplex result - */ + /* Step 1: + * Check external link change only for external phys, and apply + * priority selection between them in case the link on both phys + * is up. Note that instead of the common vars, a temporary + * vars argument is used since each phy may have different link/ + * speed/duplex result + */ for (phy_index = EXT_PHY1; phy_index < params->num_phys; phy_index++) { struct bnx2x_phy *phy = ¶ms->phy[phy_index]; @@ -3822,30 +6683,27 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) switch (bnx2x_phy_selection(params)) { case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT: case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY: - /** - * In this option, the first PHY makes sure to pass the + /* In this option, the first PHY makes sure to pass the * traffic through itself only. * Its not clear how to reset the link on the second phy - **/ + */ active_external_phy = EXT_PHY1; break; case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY: - /** - * In this option, the first PHY makes sure to pass the + /* In this option, the first PHY makes sure to pass the * traffic through the second PHY. - **/ + */ active_external_phy = EXT_PHY2; break; default: - /** - * Link indication on both PHYs with the following cases + /* Link indication on both PHYs with the following cases * is invalid: * - FIRST_PHY means that second phy wasn't initialized, * hence its link is expected to be down * - SECOND_PHY means that first phy should not be able * to link up by itself (using configuration) * - DEFAULT should be overriden during initialiazation - **/ + */ DP(NETIF_MSG_LINK, "Invalid link indication" "mpc=0x%x. DISABLING LINK !!!\n", params->multi_phy_config); @@ -3855,19 +6713,17 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) } } prev_line_speed = vars->line_speed; - /** - * Step 2: - * Read the status of the internal phy. In case of - * DIRECT_SINGLE_MEDIA board, this link is the external link, - * otherwise this is the link between the 577xx and the first - * external phy - */ + /* Step 2: + * Read the status of the internal phy. In case of + * DIRECT_SINGLE_MEDIA board, this link is the external link, + * otherwise this is the link between the 577xx and the first + * external phy + */ if (params->phy[INT_PHY].read_status) params->phy[INT_PHY].read_status( ¶ms->phy[INT_PHY], params, vars); - /** - * The INT_PHY flow control reside in the vars. This include the + /* The INT_PHY flow control reside in the vars. This include the * case where the speed or flow control are not set to AUTO. * Otherwise, the active external phy flow control result is set * to the vars. The ext_phy_line_speed is needed to check if the @@ -3876,19 +6732,18 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) */ if (active_external_phy > INT_PHY) { vars->flow_ctrl = phy_vars[active_external_phy].flow_ctrl; - /** - * Link speed is taken from the XGXS. AN and FC result from + /* Link speed is taken from the XGXS. AN and FC result from * the external phy. */ vars->link_status |= phy_vars[active_external_phy].link_status; - /** - * if active_external_phy is first PHY and link is up - disable + /* if active_external_phy is first PHY and link is up - disable * disable TX on second external PHY */ if (active_external_phy == EXT_PHY1) { - if (params->phy[EXT_PHY2].phy_specific_func){ - DP(NETIF_MSG_LINK, "Disabling TX on EXT_PHY2\n"); + if (params->phy[EXT_PHY2].phy_specific_func) { + DP(NETIF_MSG_LINK, + "Disabling TX on EXT_PHY2\n"); params->phy[EXT_PHY2].phy_specific_func( ¶ms->phy[EXT_PHY2], params, DISABLE_TX); @@ -3900,9 +6755,10 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) if (params->phy[active_external_phy].supported & SUPPORTED_FIBRE) vars->link_status |= LINK_STATUS_SERDES_LINK; + else + vars->link_status &= ~LINK_STATUS_SERDES_LINK; DP(NETIF_MSG_LINK, "Active external phy selected: %x\n", active_external_phy); - } for (phy_index = EXT_PHY1; phy_index < params->num_phys; @@ -3915,12 +6771,10 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) break; } } - DP(NETIF_MSG_LINK, "vars->flow_ctrl = 0x%x, vars->link_status = 0x%x," " ext_phy_line_speed = %d\n", vars->flow_ctrl, vars->link_status, ext_phy_line_speed); - /** - * Upon link speed change set the NIG into drain mode. Comes to + /* Upon link speed change set the NIG into drain mode. Comes to * deals with possible FIFO glitch due to clk change when speed * is decreased without link down indicator */ @@ -3934,30 +6788,24 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) ext_phy_line_speed); vars->phy_link_up = 0; } else if (prev_line_speed != vars->line_speed) { - REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE - + params->port*4, 0); + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, + 0); msleep(1); } } - /* anything 10 and over uses the bmac */ - link_10g = ((vars->line_speed == SPEED_10000) || - (vars->line_speed == SPEED_12000) || - (vars->line_speed == SPEED_12500) || - (vars->line_speed == SPEED_13000) || - (vars->line_speed == SPEED_15000) || - (vars->line_speed == SPEED_16000)); + /* Anything 10 and over uses the bmac */ + link_10g_plus = (vars->line_speed >= SPEED_10000); - bnx2x_link_int_ack(params, vars, link_10g); + bnx2x_link_int_ack(params, vars, link_10g_plus); - /** - * In case external phy link is up, and internal link is down - * (not initialized yet probably after link initialization, it - * needs to be initialized. - * Note that after link down-up as result of cable plug, the xgxs - * link would probably become up again without the need - * initialize it - */ + /* In case external phy link is up, and internal link is down + * (not initialized yet probably after link initialization, it + * needs to be initialized. + * Note that after link down-up as result of cable plug, the xgxs + * link would probably become up again without the need + * initialize it + */ if (!(SINGLE_MEDIA_DIRECT(params))) { DP(NETIF_MSG_LINK, "ext_phy_link_up = %d, int_link_up = %d," " init_preceding = %d\n", ext_phy_link_up, @@ -3972,46 +6820,59 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars) vars->phy_flags |= PHY_SGMII_FLAG; else vars->phy_flags &= ~PHY_SGMII_FLAG; - bnx2x_init_internal_phy(¶ms->phy[INT_PHY], - params, + + if (params->phy[INT_PHY].config_init) + params->phy[INT_PHY].config_init( + ¶ms->phy[INT_PHY], params, vars); } } - /** - * Link is up only if both local phy and external phy (in case of - * non-direct board) are up + /* Link is up only if both local phy and external phy (in case of + * non-direct board) are up and no fault detected on active PHY. */ vars->link_up = (vars->phy_link_up && (ext_phy_link_up || - SINGLE_MEDIA_DIRECT(params))); + SINGLE_MEDIA_DIRECT(params)) && + (phy_vars[active_external_phy].fault_detected == 0)); + + /* Update the PFC configuration in case it was changed */ + if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) + vars->link_status |= LINK_STATUS_PFC_ENABLED; + else + vars->link_status &= ~LINK_STATUS_PFC_ENABLED; if (vars->link_up) - rc = bnx2x_update_link_up(params, vars, link_10g); + rc = bnx2x_update_link_up(params, vars, link_10g_plus); else rc = bnx2x_update_link_down(params, vars); + /* Update MCP link status was changed */ + if (params->feature_config_flags & + FEATURE_CONFIG_BC_SUPPORTS_AFEX) + bnx2x_fw_command(bp, + DRV_MSG_CODE_LINK_STATUS_CHANGED, + 0); + return rc; } -/******************************************************************/ -/* */ -/* EXTERNAL PHY SECTION */ -/* */ -/******************************************************************/ +/*****************************************************************************/ +/* External Phy section */ +/*****************************************************************************/ void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port) { bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, - MISC_REGISTERS_GPIO_OUTPUT_LOW, port); + MISC_REGISTERS_GPIO_OUTPUT_LOW, port); msleep(1); bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, port); + MISC_REGISTERS_GPIO_OUTPUT_HIGH, port); } static void bnx2x_save_spirom_version(struct bnx2x *bp, u8 port, u32 spirom_ver, u32 ver_addr) { DP(NETIF_MSG_LINK, "FW version 0x%x:0x%x for port %d\n", - (u16)(spirom_ver>>16), (u16)spirom_ver, port); + (u16)(spirom_ver>>16), (u16)spirom_ver, port); if (ver_addr) REG_WR(bp, ver_addr, spirom_ver); @@ -4031,70 +6892,6 @@ static void bnx2x_save_bcm_spirom_ver(struct bnx2x *bp, phy->ver_addr); } - -static void bnx2x_ext_phy_set_pause(struct link_params *params, - struct bnx2x_phy *phy, - struct link_vars *vars) -{ - u16 val; - struct bnx2x *bp = params->bp; - /* read modify write pause advertizing */ - bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, &val); - - val &= ~MDIO_AN_REG_ADV_PAUSE_BOTH; - - /* Please refer to Table 28B-3 of 802.3ab-1999 spec. */ - bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); - if ((vars->ieee_fc & - MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) == - MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) { - val |= MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC; - } - if ((vars->ieee_fc & - MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) == - MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) { - val |= MDIO_AN_REG_ADV_PAUSE_PAUSE; - } - DP(NETIF_MSG_LINK, "Ext phy AN advertize 0x%x\n", val); - bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, val); -} - -static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) -{ - struct bnx2x *bp = params->bp; - u16 ld_pause; /* local */ - u16 lp_pause; /* link partner */ - u16 pause_result; - u8 ret = 0; - /* read twice */ - - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - - if (phy->req_flow_ctrl != BNX2X_FLOW_CTRL_AUTO) - vars->flow_ctrl = phy->req_flow_ctrl; - else if (phy->req_line_speed != SPEED_AUTO_NEG) - vars->flow_ctrl = params->req_fc_auto_adv; - else if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) { - ret = 1; - bnx2x_cl45_read(bp, phy, - MDIO_AN_DEVAD, - MDIO_AN_REG_ADV_PAUSE, &ld_pause); - bnx2x_cl45_read(bp, phy, - MDIO_AN_DEVAD, - MDIO_AN_REG_LP_AUTO_NEG, &lp_pause); - pause_result = (ld_pause & - MDIO_AN_REG_ADV_PAUSE_MASK) >> 8; - pause_result |= (lp_pause & - MDIO_AN_REG_ADV_PAUSE_MASK) >> 10; - DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x\n", - pause_result); - bnx2x_pause_resolve(vars, pause_result); - } - return ret; -} - static void bnx2x_ext_phy_10G_an_resolve(struct bnx2x *bp, struct bnx2x_phy *phy, struct link_vars *vars) @@ -4113,7 +6910,7 @@ static void bnx2x_ext_phy_10G_an_resolve(struct bnx2x *bp, } /******************************************************************/ -/* common BCM8073/BCM8727 PHY SECTION */ +/* common BCM8073/BCM8727 PHY SECTION */ /******************************************************************/ static void bnx2x_8073_resolve_fc(struct bnx2x_phy *phy, struct link_params *params, @@ -4148,13 +6945,13 @@ static void bnx2x_8073_resolve_fc(struct bnx2x_phy *phy, pause_result); } } -static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, - struct bnx2x_phy *phy, - u8 port) +static int bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, + struct bnx2x_phy *phy, + u8 port) { u32 count = 0; u16 fw_ver1, fw_msgout; - u8 rc = 0; + int rc = 0; /* Boot port from external ROM */ /* EDC grst */ @@ -4163,7 +6960,7 @@ static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, MDIO_PMA_REG_GEN_CTRL, 0x0001); - /* ucode reboot and rst */ + /* Ucode reboot and rst */ bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, @@ -4188,12 +6985,10 @@ static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, /* Delay 100ms per the PHY specifications */ msleep(100); - /* poll then timeout after 300ms for code download via SPI port - related - * to 8073 sometimes taking longer to download */ - do - { + /* 8073 sometimes taking longer to download */ + do { count++; - if(count > 300){ + if (count > 300) { DP(NETIF_MSG_LINK, "bnx2x_8073_8727_external_rom_boot port %x:" "Download failed. fw version = 0x%x\n", @@ -4203,11 +6998,11 @@ static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, } bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_ROM_VER1, &fw_ver1); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_ROM_VER1, &fw_ver1); bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_M8051_MSGOUT_REG, &fw_msgout); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_M8051_MSGOUT_REG, &fw_msgout); msleep(1); } while (fw_ver1 == 0 || fw_ver1 == 0x4321 || @@ -4228,52 +7023,10 @@ static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, return rc; } -static void bnx2x_8073_8727_set_xaui_low_power_mode(struct bnx2x *bp, - struct bnx2x_phy *phy) -{ - u16 val; - bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_CHIP_REV, &val); - - if (val == 0) { - /* Mustn't set low power mode in 8073 A0 */ - return; - } - - /* Disable PLL sequencer (use read-modify-write to clear bit 13) */ - bnx2x_cl45_read(bp, phy, - MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, &val); - val &= ~(1<<13); - bnx2x_cl45_write(bp, phy, - MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val); - - /* PLL controls */ - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805E, 0x1077); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805D, 0x0000); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805C, 0x030B); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805B, 0x1240); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805A, 0x2490); - - /* Tx Controls */ - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A7, 0x0C74); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A6, 0x9041); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A5, 0x4640); - - /* Rx Controls */ - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FE, 0x01C4); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FD, 0x9249); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FC, 0x2015); - - /* Enable PLL sequencer (use read-modify-write to set bit 13) */ - bnx2x_cl45_read(bp, phy, MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, &val); - val |= (1<<13); - bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val); -} - /******************************************************************/ -/* BCM8073 PHY SECTION */ +/* BCM8073 PHY SECTION */ /******************************************************************/ -static u8 bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy) +static int bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy) { /* This is only required for 8073A1, version 102 only */ u16 val; @@ -4283,9 +7036,10 @@ static u8 bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy) MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_CHIP_REV, &val); - /* No need to workaround in 8073 A1 */ - if (val != 1) + if (val != 1) { + /* No need to workaround in 8073 A1 */ return 0; + } bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, @@ -4297,7 +7051,8 @@ static u8 bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy) return 1; } -static u8 bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy) + +static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy) { u16 val, cnt, cnt1 ; @@ -4311,9 +7066,8 @@ static u8 bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy) } /* XAUI workaround in 8073 A0: */ - /** - * After loading the boot ROM and restarting Autoneg, poll - * Dev1, Reg $C820: + /* After loading the boot ROM and restarting Autoneg, poll + * Dev1, Reg $C820: */ for (cnt = 0; cnt < 1000; cnt++) { @@ -4321,18 +7075,16 @@ static u8 bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy) MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_SPEED_LINK_STATUS, &val); - /** - * If bit [14] = 0 or bit [13] = 0, continue on with - * system initialization (XAUI work-around not required, as - * these bits indicate 2.5G or 1G link up). - */ + /* If bit [14] = 0 or bit [13] = 0, continue on with + * system initialization (XAUI work-around not required, as + * these bits indicate 2.5G or 1G link up). + */ if (!(val & (1<<14)) || !(val & (1<<13))) { DP(NETIF_MSG_LINK, "XAUI work-around not required\n"); return 0; } else if (!(val & (1<<15))) { DP(NETIF_MSG_LINK, "bit 15 went off\n"); - /** - * If bit 15 is 0, then poll Dev1, Reg $C841 until it's + /* If bit 15 is 0, then poll Dev1, Reg $C841 until it's * MSB (bit15) goes to 1 (indicating that the XAUI * workaround has completed), then continue on with * system initialization. @@ -4397,16 +7149,16 @@ static void bnx2x_8073_set_pause_cl37(struct link_params *params, cl37_val |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH; } DP(NETIF_MSG_LINK, - "Ext phy AN advertize cl37 0x%x\n", cl37_val); + "Ext phy AN advertize cl37 0x%x\n", cl37_val); bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, cl37_val); msleep(500); } -static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static int bnx2x_8073_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; u16 val = 0, tmp1; @@ -4419,33 +7171,27 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, gpio_port = params->port; /* Restore normal power mode*/ bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, gpio_port); + MISC_REGISTERS_GPIO_OUTPUT_HIGH, gpio_port); bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, gpio_port); + MISC_REGISTERS_GPIO_OUTPUT_HIGH, gpio_port); - /* enable LASI */ + /* Enable LASI */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM_CTRL, (1<<2)); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXCTRL, (1<<2)); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x0004); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 0x0004); bnx2x_8073_set_pause_cl37(params, phy, vars); - bnx2x_8073_8727_set_xaui_low_power_mode(bp, phy); - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &tmp1); bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM, &tmp1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, &tmp1); DP(NETIF_MSG_LINK, "Before rom RX_ALARM(port1): 0x%x\n", tmp1); - /** - * If this is forced speed, set to KR or KX (all other are not - * supported) - */ /* Swap polarity if required - Must be done only in non-1G mode */ if (params->lane_config & PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) { /* Configure the 8073 to swap _P and _N of the KR lines */ @@ -4466,6 +7212,7 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, offsetof(struct shmem_region, dev_info. port_hw_config[params->port].default_cfg)) & PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED) { + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8073_BAM, &val); @@ -4474,7 +7221,6 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, MDIO_AN_REG_8073_BAM, val | 1); DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); } - if (params->loopback_mode == LOOPBACK_EXT) { bnx2x_807x_force_10G(bp, phy); DP(NETIF_MSG_LINK, "Forced speed 10G on 807X\n"); @@ -4488,9 +7234,8 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, val = (1<<7); } else if (phy->req_line_speed == SPEED_2500) { val = (1<<5); - /** - * Note that 2.5G works only when used with 1G - * advertisment + /* Note that 2.5G works only when used with 1G + * advertisement */ } else val = (1<<5); @@ -4500,7 +7245,7 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) val |= (1<<7); - /* Note that 2.5G works only when used with 1G advertisment */ + /* Note that 2.5G works only when used with 1G advertisement */ if (phy->speed_cap_mask & (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G | PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G)) @@ -4540,8 +7285,7 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, /* Add support for CL37 (passive mode) III */ bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); - /** - * The SNR will improve about 2db by changing BW and FEE main + /* The SNR will improve about 2db by changing BW and FEE main * tap. Rest commands are executed after link is up * Change FFE main cursor to 5 in EDC register */ @@ -4576,11 +7320,11 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy, u16 an1000_status = 0; bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_STATUS, &val1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_STAT, &val1); DP(NETIF_MSG_LINK, "8703 LASI status 0x%x\n", val1); - /* clear the interrupt LASI status register */ + /* Clear the interrupt LASI status register */ bnx2x_cl45_read(bp, phy, MDIO_PCS_DEVAD, MDIO_PCS_REG_STATUS, &val2); bnx2x_cl45_read(bp, phy, @@ -4592,7 +7336,7 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy, /* Check the LASI */ bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM, &val2); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, &val2); DP(NETIF_MSG_LINK, "KR 0x9003 0x%x\n", val2); @@ -4628,8 +7372,7 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy, link_up = (((val1 & 4) == 4) || (an1000_status & (1<<1))); if (link_up && bnx2x_8073_is_snr_needed(bp, phy)) { - /** - * The SNR will improve about 2dbby changing the BW and FEE main + /* The SNR will improve about 2dbby changing the BW and FEE main * tap. The 1st write to change FFE main tap is set before * restart AN. Change PLL Bandwidth in EDC register */ @@ -4676,10 +7419,9 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy, bnx2x_cl45_read(bp, phy, MDIO_XS_DEVAD, MDIO_XS_REG_8073_RX_CTRL_PCIE, &val1); - /** - * Set bit 3 to invert Rx in 1G mode and clear this bit - * when it`s in 10G mode. - */ + /* Set bit 3 to invert Rx in 1G mode and clear this bit + * when it`s in 10G mode. + */ if (vars->line_speed == SPEED_1000) { DP(NETIF_MSG_LINK, "Swapping 1G polarity for" "the 8073\n"); @@ -4696,10 +7438,22 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy, bnx2x_8073_resolve_fc(phy, params, vars); vars->duplex = DUPLEX_FULL; } + + if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) { + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_LP_AUTO_NEG2, &val1); + + if (val1 & (1<<5)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE; + if (val1 & (1<<7)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE; + } + return link_up; } - static void bnx2x_8073_link_reset(struct bnx2x_phy *phy, struct link_params *params) { @@ -4710,28 +7464,28 @@ static void bnx2x_8073_link_reset(struct bnx2x_phy *phy, else gpio_port = params->port; DP(NETIF_MSG_LINK, "Setting 8073 port %d into low power mode\n", - gpio_port); + gpio_port); bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_LOW, - gpio_port); + MISC_REGISTERS_GPIO_OUTPUT_LOW, + gpio_port); } /******************************************************************/ -/* BCM8705 PHY SECTION */ +/* BCM8705 PHY SECTION */ /******************************************************************/ -static u8 bnx2x_8705_config_init(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static int bnx2x_8705_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; DP(NETIF_MSG_LINK, "init 8705\n"); /* Restore normal power mode*/ bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); + MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); /* HW reset */ bnx2x_ext_phy_hw_reset(bp, params->port); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040); - bnx2x_wait_reset_complete(bp, phy); + bnx2x_wait_reset_complete(bp, phy, params); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_MISC_CTRL, 0x8288); @@ -4741,13 +7495,14 @@ static u8 bnx2x_8705_config_init(struct bnx2x_phy *phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CMU_PLL_BYPASS, 0x0100); bnx2x_cl45_write(bp, phy, MDIO_WIS_DEVAD, MDIO_WIS_REG_LASI_CNTL, 0x1); + /* BCM8705 doesn't have microcode, hence the 0 */ bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0); return 0; } -u8 bnx2x_8705_read_status(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static u8 bnx2x_8705_read_status(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { u8 link_up = 0; u16 val1, rx_sd; @@ -4779,45 +7534,124 @@ u8 bnx2x_8705_read_status(struct bnx2x_phy *phy, } /******************************************************************/ -/* SFP+ module Section */ +/* SFP+ module Section */ /******************************************************************/ -static void bnx2x_sfp_set_transmitter(struct bnx2x *bp, - struct bnx2x_phy *phy, - u8 port, - u8 tx_en) +static void bnx2x_set_disable_pmd_transmit(struct link_params *params, + struct bnx2x_phy *phy, + u8 pmd_dis) { - u16 val; - - DP(NETIF_MSG_LINK, "Setting transmitter tx_en=%x for port %d\n", - tx_en, port); - /* Disable/Enable transmitter ( TX laser of the SFP+ module.)*/ - - bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_PHY_IDENTIFIER, - &val); - - if (tx_en) - val &= ~(1<<15); - else - val |= (1<<15); - + struct bnx2x *bp = params->bp; + /* Disable transmitter only for bootcodes which can enable it afterwards + * (for D3 link) + */ + if (pmd_dis) { + if (params->feature_config_flags & + FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED) + DP(NETIF_MSG_LINK, "Disabling PMD transmitter\n"); + else { + DP(NETIF_MSG_LINK, "NOT disabling PMD transmitter\n"); + return; + } + } else + DP(NETIF_MSG_LINK, "Enabling PMD transmitter\n"); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_PHY_IDENTIFIER, - val); + MDIO_PMA_REG_TX_DISABLE, pmd_dis); } -static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy, - struct link_params *params, - u16 addr, u8 byte_cnt, u8 *o_buf) +static u8 bnx2x_get_gpio_port(struct link_params *params) +{ + u8 gpio_port; + u32 swap_val, swap_override; + struct bnx2x *bp = params->bp; + if (CHIP_IS_E2(bp)) + gpio_port = BP_PATH(bp); + else + gpio_port = params->port; + swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); + swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); + return gpio_port ^ (swap_val && swap_override); +} + +static void bnx2x_sfp_e1e2_set_transmitter(struct link_params *params, + struct bnx2x_phy *phy, + u8 tx_en) +{ + u16 val; + u8 port = params->port; + struct bnx2x *bp = params->bp; + u32 tx_en_mode; + + /* Disable/Enable transmitter ( TX laser of the SFP+ module.)*/ + tx_en_mode = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].sfp_ctrl)) & + PORT_HW_CFG_TX_LASER_MASK; + DP(NETIF_MSG_LINK, "Setting transmitter tx_en=%x for port %x " + "mode = %x\n", tx_en, port, tx_en_mode); + switch (tx_en_mode) { + case PORT_HW_CFG_TX_LASER_MDIO: + + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, + MDIO_PMA_REG_PHY_IDENTIFIER, + &val); + + if (tx_en) + val &= ~(1<<15); + else + val |= (1<<15); + + bnx2x_cl45_write(bp, phy, + MDIO_PMA_DEVAD, + MDIO_PMA_REG_PHY_IDENTIFIER, + val); + break; + case PORT_HW_CFG_TX_LASER_GPIO0: + case PORT_HW_CFG_TX_LASER_GPIO1: + case PORT_HW_CFG_TX_LASER_GPIO2: + case PORT_HW_CFG_TX_LASER_GPIO3: + { + u16 gpio_pin; + u8 gpio_port, gpio_mode; + if (tx_en) + gpio_mode = MISC_REGISTERS_GPIO_OUTPUT_HIGH; + else + gpio_mode = MISC_REGISTERS_GPIO_OUTPUT_LOW; + + gpio_pin = tx_en_mode - PORT_HW_CFG_TX_LASER_GPIO0; + gpio_port = bnx2x_get_gpio_port(params); + bnx2x_set_gpio(bp, gpio_pin, gpio_mode, gpio_port); + break; + } + default: + DP(NETIF_MSG_LINK, "Invalid TX_LASER_MDIO 0x%x\n", tx_en_mode); + break; + } +} + +static void bnx2x_sfp_set_transmitter(struct link_params *params, + struct bnx2x_phy *phy, + u8 tx_en) +{ + struct bnx2x *bp = params->bp; + DP(NETIF_MSG_LINK, "Setting SFP+ transmitter to %d\n", tx_en); + if (CHIP_IS_E3(bp)) + bnx2x_sfp_e3_set_transmitter(params, phy, tx_en); + else + bnx2x_sfp_e1e2_set_transmitter(params, phy, tx_en); +} + +static int bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy, + struct link_params *params, + u16 addr, u8 byte_cnt, u8 *o_buf) { struct bnx2x *bp = params->bp; u16 val = 0; u16 i; if (byte_cnt > 16) { - DP(NETIF_MSG_LINK, "Reading from eeprom is" - " is limited to 0xf\n"); + DP(NETIF_MSG_LINK, + "Reading from eeprom is limited to 0xf\n"); return -EINVAL; } /* Set the read command byte count */ @@ -4849,8 +7683,8 @@ static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy, if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) != MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE) { DP(NETIF_MSG_LINK, - "Got bad status 0x%x when reading from SFP+ EEPROM\n", - (val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK)); + "Got bad status 0x%x when reading from SFP+ EEPROM\n", + (val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK)); return -EINVAL; } @@ -4868,22 +7702,84 @@ static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val); if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) == MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE) - return 0;; + return 0; msleep(1); } return -EINVAL; } -static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, - struct link_params *params, - u16 addr, u8 byte_cnt, u8 *o_buf) +static void bnx2x_warpcore_power_module(struct link_params *params, + struct bnx2x_phy *phy, + u8 power) +{ + u32 pin_cfg; + struct bnx2x *bp = params->bp; + + pin_cfg = (REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[params->port].e3_sfp_ctrl)) & + PORT_HW_CFG_E3_PWR_DIS_MASK) >> + PORT_HW_CFG_E3_PWR_DIS_SHIFT; + + if (pin_cfg == PIN_CFG_NA) + return; + DP(NETIF_MSG_LINK, "Setting SFP+ module power to %d using pin cfg %d\n", + power, pin_cfg); + /* Low ==> corresponding SFP+ module is powered + * high ==> the SFP+ module is powered down + */ + bnx2x_set_cfg_pin(bp, pin_cfg, power ^ 1); +} +static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, + struct link_params *params, + u16 addr, u8 byte_cnt, + u8 *o_buf) +{ + int rc = 0; + u8 i, j = 0, cnt = 0; + u32 data_array[4]; + u16 addr32; + struct bnx2x *bp = params->bp; + + if (byte_cnt > 16) { + DP(NETIF_MSG_LINK, + "Reading from eeprom is limited to 16 bytes\n"); + return -EINVAL; + } + + /* 4 byte aligned address */ + addr32 = addr & (~0x3); + do { + if (cnt == I2C_WA_PWR_ITER) { + bnx2x_warpcore_power_module(params, phy, 0); + /* Note that 100ms are not enough here */ + msleep(1); + bnx2x_warpcore_power_module(params, phy, 1); + } + rc = bnx2x_bsc_read(params, phy, 0xa0, addr32, 0, byte_cnt, + data_array); + } while ((rc != 0) && (++cnt < I2C_WA_RETRY_CNT)); + + if (rc == 0) { + for (i = (addr - addr32); i < byte_cnt + (addr - addr32); i++) { + o_buf[j] = *((u8 *)data_array + i); + j++; + } + } + + return rc; +} + +static int bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, + struct link_params *params, + u16 addr, u8 byte_cnt, u8 *o_buf) { struct bnx2x *bp = params->bp; u16 val, i; if (byte_cnt > 16) { - DP(NETIF_MSG_LINK, "Reading from eeprom is" - " is limited to 0xf\n"); + DP(NETIF_MSG_LINK, + "Reading from eeprom is limited to 0xf\n"); return -EINVAL; } @@ -4915,8 +7811,7 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, 0x8002); - /** - * Wait appropriate time for two-wire command to finish before + /* Wait appropriate time for two-wire command to finish before * polling the status register */ msleep(1); @@ -4954,34 +7849,46 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val); if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) == MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE) - return 0;; + return 0; msleep(1); } return -EINVAL; } -u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, - struct link_params *params, u16 addr, - u8 byte_cnt, u8 *o_buf) +int bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, + struct link_params *params, u16 addr, + u8 byte_cnt, u8 *o_buf) { - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) - return bnx2x_8726_read_sfp_module_eeprom(phy, params, addr, - byte_cnt, o_buf); - else if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) - return bnx2x_8727_read_sfp_module_eeprom(phy, params, addr, - byte_cnt, o_buf); - return -EINVAL; + int rc = -EINVAL; + switch (phy->type) { + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726: + rc = bnx2x_8726_read_sfp_module_eeprom(phy, params, addr, + byte_cnt, o_buf); + break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727: + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722: + rc = bnx2x_8727_read_sfp_module_eeprom(phy, params, addr, + byte_cnt, o_buf); + break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT: + rc = bnx2x_warpcore_read_sfp_module_eeprom(phy, params, addr, + byte_cnt, o_buf); + break; + } + return rc; } -static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy, - struct link_params *params, - u16 *edc_mode) +static int bnx2x_get_edc_mode(struct bnx2x_phy *phy, + struct link_params *params, + u16 *edc_mode) { struct bnx2x *bp = params->bp; + u32 sync_offset = 0, phy_idx, media_types; u8 val, check_limiting_mode = 0; *edc_mode = EDC_MODE_LIMITING; + phy->media_type = ETH_PHY_UNSPECIFIED; /* First check for copper cable */ if (bnx2x_read_sfp_module_eeprom(phy, params, @@ -4996,19 +7903,18 @@ static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy, case SFP_EEPROM_CON_TYPE_VAL_COPPER: { u8 copper_module_type; - - /** - * Check if its active cable (includes SFP+ module) + phy->media_type = ETH_PHY_DA_TWINAX; + /* Check if its active cable (includes SFP+ module) * of passive cable */ if (bnx2x_read_sfp_module_eeprom(phy, - params, - SFP_EEPROM_FC_TX_TECH_ADDR, - 1, - &copper_module_type) != 0) { + params, + SFP_EEPROM_FC_TX_TECH_ADDR, + 1, + &copper_module_type) != 0) { DP(NETIF_MSG_LINK, - "Failed to read copper-cable-type" - " from SFP+ EEPROM\n"); + "Failed to read copper-cable-type" + " from SFP+ EEPROM\n"); return -EINVAL; } @@ -5018,18 +7924,20 @@ static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy, check_limiting_mode = 1; } else if (copper_module_type & SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE) { - DP(NETIF_MSG_LINK, "Passive Copper" - " cable detected\n"); + DP(NETIF_MSG_LINK, + "Passive Copper cable detected\n"); *edc_mode = EDC_MODE_PASSIVE_DAC; } else { - DP(NETIF_MSG_LINK, "Unknown copper-cable-" - "type 0x%x !!!\n", copper_module_type); + DP(NETIF_MSG_LINK, + "Unknown copper-cable-type 0x%x !!!\n", + copper_module_type); return -EINVAL; } break; } case SFP_EEPROM_CON_TYPE_VAL_LC: + phy->media_type = ETH_PHY_SFP_FIBER; DP(NETIF_MSG_LINK, "Optic module detected\n"); check_limiting_mode = 1; break; @@ -5038,7 +7946,22 @@ static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy, val); return -EINVAL; } - + sync_offset = params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[params->port].media_type); + media_types = REG_RD(bp, sync_offset); + /* Update media type for non-PMF sync */ + for (phy_idx = INT_PHY; phy_idx < MAX_PHYS; phy_idx++) { + if (&(params->phy[phy_idx]) == phy) { + media_types &= ~(PORT_HW_CFG_MEDIA_TYPE_PHY0_MASK << + (PORT_HW_CFG_MEDIA_TYPE_PHY1_SHIFT * phy_idx)); + media_types |= ((phy->media_type & + PORT_HW_CFG_MEDIA_TYPE_PHY0_MASK) << + (PORT_HW_CFG_MEDIA_TYPE_PHY1_SHIFT * phy_idx)); + break; + } + } + REG_WR(bp, sync_offset, media_types); if (check_limiting_mode) { u8 options[SFP_EEPROM_OPTIONS_SIZE]; if (bnx2x_read_sfp_module_eeprom(phy, @@ -5046,8 +7969,8 @@ static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy, SFP_EEPROM_OPTIONS_ADDR, SFP_EEPROM_OPTIONS_SIZE, options) != 0) { - DP(NETIF_MSG_LINK, "Failed to read Option" - " field from module EEPROM\n"); + DP(NETIF_MSG_LINK, + "Failed to read Option field from module EEPROM\n"); return -EINVAL; } if ((options[0] & SFP_EEPROM_OPTIONS_LINEAR_RX_OUT_MASK)) @@ -5058,12 +7981,11 @@ static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy, DP(NETIF_MSG_LINK, "EDC mode is set to 0x%x\n", *edc_mode); return 0; } -/** - * This function read the relevant field from the module (SFP+), and verify it +/* This function read the relevant field from the module (SFP+), and verify it * is compliant with this board */ -static u8 bnx2x_verify_sfp_module(struct bnx2x_phy *phy, - struct link_params *params) +static int bnx2x_verify_sfp_module(struct bnx2x_phy *phy, + struct link_params *params) { struct bnx2x *bp = params->bp; u32 val, cmd; @@ -5088,24 +8010,26 @@ static u8 bnx2x_verify_sfp_module(struct bnx2x_phy *phy, FEATURE_CONFIG_BC_SUPPORTS_OPT_MDL_VRFY) { /* Use first phy request only in case of non-dual media*/ if (DUAL_MEDIA(params)) { - DP(NETIF_MSG_LINK, "FW does not support OPT MDL " - "verification\n"); + DP(NETIF_MSG_LINK, + "FW does not support OPT MDL verification\n"); return -EINVAL; } cmd = DRV_MSG_CODE_VRFY_FIRST_PHY_OPT_MDL; } else { /* No support in OPT MDL detection */ - DP(NETIF_MSG_LINK, "FW does not support OPT MDL " - "verification\n"); + DP(NETIF_MSG_LINK, + "FW does not support OPT MDL verification\n"); return -EINVAL; } + fw_cmd_param = FW_PARAM_SET(phy->addr, phy->type, phy->mdio_ctrl); fw_resp = bnx2x_fw_command(bp, cmd, fw_cmd_param); if (fw_resp == FW_MSG_CODE_VRFY_OPT_MDL_SUCCESS) { DP(NETIF_MSG_LINK, "Approved module\n"); return 0; } - /* format the warning message */ + + /* Format the warning message */ if (bnx2x_read_sfp_module_eeprom(phy, params, SFP_EEPROM_VENDOR_NAME_ADDR, @@ -5123,32 +8047,32 @@ static u8 bnx2x_verify_sfp_module(struct bnx2x_phy *phy, else vendor_pn[SFP_EEPROM_PART_NO_SIZE] = '\0'; - netdev_err(bp->dev, "Warning: " - "Unqualified SFP+ module " - "detected, Port %d from %s part number %s\n" - , params->port, - vendor_name, vendor_pn); - /* set flag in phy */ - phy->flags |= FLAGS_SFP_NOT_APPROVED; + netdev_err(bp->dev, "Warning: Unqualified SFP+ module detected," + " Port %d from %s part number %s\n", + params->port, vendor_name, vendor_pn); + if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) != + PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_WARNING_MSG) + phy->flags |= FLAGS_SFP_NOT_APPROVED; return -EINVAL; } -static u8 bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, - struct link_params *params) +static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, + struct link_params *params) + { u8 val; struct bnx2x *bp = params->bp; u16 timeout; - /** - * Initialization time after hot-plug may take up to 300ms for + /* Initialization time after hot-plug may take up to 300ms for * some phys type ( e.g. JDSU ) */ for (timeout = 0; timeout < 60; timeout++) { if (bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, &val) == 0) { - DP(NETIF_MSG_LINK, "SFP+ module initialization " - "took %d ms\n", timeout * 5); + DP(NETIF_MSG_LINK, + "SFP+ module initialization took %d ms\n", + timeout * 5); return 0; } msleep(5); @@ -5156,14 +8080,12 @@ static u8 bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy, return -EINVAL; } - static void bnx2x_8727_power_module(struct bnx2x *bp, struct bnx2x_phy *phy, u8 is_power_up) { /* Make sure GPIOs are not using for LED mode */ u16 val; - /** - * In the GPIO register, bit 4 is use to determine if the GPIOs are + /* In the GPIO register, bit 4 is use to determine if the GPIOs are * operating as INPUT or as OUTPUT. Bit 1 is for input, and 0 for * output * Bits 0-1 determine the GPIOs value for OUTPUT in case bit 4 val is 0 @@ -5176,15 +8098,13 @@ static void bnx2x_8727_power_module(struct bnx2x *bp, */ if (phy->flags & FLAGS_NOC) return; - if (!(phy->flags & - FLAGS_NOC) && is_power_up) + if (is_power_up) val = (1<<4); else - /** - * Set GPIO control to OUTPUT, and set the power bit + /* Set GPIO control to OUTPUT, and set the power bit * to according to the is_power_up */ - val = ((!(is_power_up)) << 1); + val = (1<<1); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, @@ -5192,9 +8112,9 @@ static void bnx2x_8727_power_module(struct bnx2x *bp, val); } -static u8 bnx2x_8726_set_limiting_mode(struct bnx2x *bp, - struct bnx2x_phy *phy, - u16 edc_mode) +static int bnx2x_8726_set_limiting_mode(struct bnx2x *bp, + struct bnx2x_phy *phy, + u16 edc_mode) { u16 cur_limiting_mode; @@ -5215,10 +8135,9 @@ static u8 bnx2x_8726_set_limiting_mode(struct bnx2x *bp, DP(NETIF_MSG_LINK, "Setting LRM MODE\n"); - /** - * Changing to LRM mode takes quite few seconds. So do it only if - * current mode is limiting (default is LRM) - */ + /* Changing to LRM mode takes quite few seconds. So do it only + * if current mode is limiting (default is LRM) + */ if (cur_limiting_mode != EDC_MODE_LIMITING) return 0; @@ -5241,9 +8160,10 @@ static u8 bnx2x_8726_set_limiting_mode(struct bnx2x *bp, } return 0; } -static u8 bnx2x_8727_set_limiting_mode(struct bnx2x *bp, - struct bnx2x_phy *phy, - u16 edc_mode) + +static int bnx2x_8727_set_limiting_mode(struct bnx2x *bp, + struct bnx2x_phy *phy, + u16 edc_mode) { u16 phy_identifier; u16 rom_ver2_val; @@ -5283,81 +8203,223 @@ static void bnx2x_8727_specific_func(struct bnx2x_phy *phy, switch (action) { case DISABLE_TX: - bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); + bnx2x_sfp_set_transmitter(params, phy, 0); break; case ENABLE_TX: - if(!(phy->flags & FLAGS_SFP_NOT_APPROVED)) - bnx2x_sfp_set_transmitter(bp, phy, params->port, 1); + if (!(phy->flags & FLAGS_SFP_NOT_APPROVED)) + bnx2x_sfp_set_transmitter(params, phy, 1); break; default: - DP(NETIF_MSG_LINK, "Function 0x%x not supported by 8727\n", action); + DP(NETIF_MSG_LINK, "Function 0x%x not supported by 8727\n", + action); return; } } -static u8 bnx2x_sfp_module_detection(struct bnx2x_phy *phy, - struct link_params *params) +static void bnx2x_set_e1e2_module_fault_led(struct link_params *params, + u8 gpio_mode) +{ + struct bnx2x *bp = params->bp; + + u32 fault_led_gpio = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[params->port].sfp_ctrl)) & + PORT_HW_CFG_FAULT_MODULE_LED_MASK; + switch (fault_led_gpio) { + case PORT_HW_CFG_FAULT_MODULE_LED_DISABLED: + return; + case PORT_HW_CFG_FAULT_MODULE_LED_GPIO0: + case PORT_HW_CFG_FAULT_MODULE_LED_GPIO1: + case PORT_HW_CFG_FAULT_MODULE_LED_GPIO2: + case PORT_HW_CFG_FAULT_MODULE_LED_GPIO3: + { + u8 gpio_port = bnx2x_get_gpio_port(params); + u16 gpio_pin = fault_led_gpio - + PORT_HW_CFG_FAULT_MODULE_LED_GPIO0; + DP(NETIF_MSG_LINK, "Set fault module-detected led " + "pin %x port %x mode %x\n", + gpio_pin, gpio_port, gpio_mode); + bnx2x_set_gpio(bp, gpio_pin, gpio_mode, gpio_port); + } + break; + default: + DP(NETIF_MSG_LINK, "Error: Invalid fault led mode 0x%x\n", + fault_led_gpio); + } +} + +static void bnx2x_set_e3_module_fault_led(struct link_params *params, + u8 gpio_mode) +{ + u32 pin_cfg; + u8 port = params->port; + struct bnx2x *bp = params->bp; + pin_cfg = (REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].e3_sfp_ctrl)) & + PORT_HW_CFG_E3_FAULT_MDL_LED_MASK) >> + PORT_HW_CFG_E3_FAULT_MDL_LED_SHIFT; + DP(NETIF_MSG_LINK, "Setting Fault LED to %d using pin cfg %d\n", + gpio_mode, pin_cfg); + bnx2x_set_cfg_pin(bp, pin_cfg, gpio_mode); +} + +static void bnx2x_set_sfp_module_fault_led(struct link_params *params, + u8 gpio_mode) +{ + struct bnx2x *bp = params->bp; + DP(NETIF_MSG_LINK, "Setting SFP+ module fault LED to %d\n", gpio_mode); + if (CHIP_IS_E3(bp)) { + /* Low ==> if SFP+ module is supported otherwise + * High ==> if SFP+ module is not on the approved vendor list + */ + bnx2x_set_e3_module_fault_led(params, gpio_mode); + } else + bnx2x_set_e1e2_module_fault_led(params, gpio_mode); +} + +static void bnx2x_warpcore_hw_reset(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + bnx2x_warpcore_power_module(params, phy, 0); + /* Put Warpcore in low power mode */ + REG_WR(bp, MISC_REG_WC0_RESET, 0x0c0e); + + /* Put LCPLL in low power mode */ + REG_WR(bp, MISC_REG_LCPLL_E40_PWRDWN, 1); + REG_WR(bp, MISC_REG_LCPLL_E40_RESETB_ANA, 0); + REG_WR(bp, MISC_REG_LCPLL_E40_RESETB_DIG, 0); +} + +static void bnx2x_power_sfp_module(struct link_params *params, + struct bnx2x_phy *phy, + u8 power) +{ + struct bnx2x *bp = params->bp; + DP(NETIF_MSG_LINK, "Setting SFP+ power to %x\n", power); + + switch (phy->type) { + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727: + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722: + bnx2x_8727_power_module(params->bp, phy, power); + break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT: + bnx2x_warpcore_power_module(params, phy, power); + break; + default: + break; + } +} +static void bnx2x_warpcore_set_limiting_mode(struct link_params *params, + struct bnx2x_phy *phy, + u16 edc_mode) +{ + u16 val = 0; + u16 mode = MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT; + struct bnx2x *bp = params->bp; + + u8 lane = bnx2x_get_warpcore_lane(phy, params); + /* This is a global register which controls all lanes */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE, &val); + val &= ~(0xf << (lane << 2)); + + switch (edc_mode) { + case EDC_MODE_LINEAR: + case EDC_MODE_LIMITING: + mode = MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT; + break; + case EDC_MODE_PASSIVE_DAC: + mode = MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC; + break; + default: + break; + } + + val |= (mode << (lane << 2)); + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE, val); + /* A must read */ + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE, &val); + + /* Restart microcode to re-read the new mode */ + bnx2x_warpcore_reset_lane(bp, phy, 1); + bnx2x_warpcore_reset_lane(bp, phy, 0); + +} + +static void bnx2x_set_limiting_mode(struct link_params *params, + struct bnx2x_phy *phy, + u16 edc_mode) +{ + switch (phy->type) { + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726: + bnx2x_8726_set_limiting_mode(params->bp, phy, edc_mode); + break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727: + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722: + bnx2x_8727_set_limiting_mode(params->bp, phy, edc_mode); + break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT: + bnx2x_warpcore_set_limiting_mode(params, phy, edc_mode); + break; + } +} + +int bnx2x_sfp_module_detection(struct bnx2x_phy *phy, + struct link_params *params) { struct bnx2x *bp = params->bp; u16 edc_mode; - u8 rc = 0; + int rc = 0; u32 val = REG_RD(bp, params->shmem_base + offsetof(struct shmem_region, dev_info. port_feature_config[params->port].config)); DP(NETIF_MSG_LINK, "SFP+ module plugged in/out detected on port %d\n", - params->port); - + params->port); + /* Power up module */ + bnx2x_power_sfp_module(params, phy, 1); if (bnx2x_get_edc_mode(phy, params, &edc_mode) != 0) { DP(NETIF_MSG_LINK, "Failed to get valid module type\n"); return -EINVAL; } else if (bnx2x_verify_sfp_module(phy, params) != 0) { - /* check SFP+ module compatibility */ + /* Check SFP+ module compatibility */ DP(NETIF_MSG_LINK, "Module verification failed!!\n"); rc = -EINVAL; /* Turn on fault module-detected led */ - bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, - MISC_REGISTERS_GPIO_HIGH, - params->port); - if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) && - ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) == - PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_POWER_DOWN)) { - /* Shutdown SFP+ module */ + bnx2x_set_sfp_module_fault_led(params, + MISC_REGISTERS_GPIO_HIGH); + + /* Check if need to power down the SFP+ module */ + if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) == + PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_POWER_DOWN) { DP(NETIF_MSG_LINK, "Shutdown SFP+ module!!\n"); - bnx2x_8727_power_module(bp, phy, 0); + bnx2x_power_sfp_module(params, phy, 0); return rc; } } else { /* Turn off fault module-detected led */ - DP(NETIF_MSG_LINK, "Turn off fault module-detected led\n"); - bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, - MISC_REGISTERS_GPIO_LOW, - params->port); + bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW); } - /* power up the SFP module */ - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) - bnx2x_8727_power_module(bp, phy, 1); - - /** - * Check and set limiting mode / LRM mode on 8726. On 8727 it + /* Check and set limiting mode / LRM mode on 8726. On 8727 it * is done automatically */ - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) - bnx2x_8726_set_limiting_mode(bp, phy, edc_mode); - else - bnx2x_8727_set_limiting_mode(bp, phy, edc_mode); - /** - * Enable transmit for this module if the module is approved, or + bnx2x_set_limiting_mode(params, phy, edc_mode); + + /* Enable transmit for this module if the module is approved, or * if unapproved modules should also enable the Tx laser */ if (rc == 0 || (val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) != PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER) - bnx2x_sfp_set_transmitter(bp, phy, params->port, 1); + bnx2x_sfp_set_transmitter(params, phy, 1); else - bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); + bnx2x_sfp_set_transmitter(params, phy, 0); return rc; } @@ -5365,49 +8427,81 @@ static u8 bnx2x_sfp_module_detection(struct bnx2x_phy *phy, void bnx2x_handle_module_detect_int(struct link_params *params) { struct bnx2x *bp = params->bp; - struct bnx2x_phy *phy = ¶ms->phy[EXT_PHY1]; + struct bnx2x_phy *phy; u32 gpio_val; - u8 port = params->port; + u8 gpio_num, gpio_port; + if (CHIP_IS_E3(bp)) + phy = ¶ms->phy[INT_PHY]; + else + phy = ¶ms->phy[EXT_PHY1]; + + if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base, + params->port, &gpio_num, &gpio_port) == + -EINVAL) { + DP(NETIF_MSG_LINK, "Failed to get MOD_ABS interrupt config\n"); + return; + } /* Set valid module led off */ - bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, - MISC_REGISTERS_GPIO_HIGH, - params->port); + bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_HIGH); /* Get current gpio val reflecting module plugged in / out*/ - gpio_val = bnx2x_get_gpio(bp, MISC_REGISTERS_GPIO_3, port); + gpio_val = bnx2x_get_gpio(bp, gpio_num, gpio_port); /* Call the handling function in case module is detected */ if (gpio_val == 0) { - - bnx2x_set_gpio_int(bp, MISC_REGISTERS_GPIO_3, - MISC_REGISTERS_GPIO_INT_OUTPUT_CLR, - port); - + bnx2x_power_sfp_module(params, phy, 1); + bnx2x_set_gpio_int(bp, gpio_num, + MISC_REGISTERS_GPIO_INT_OUTPUT_CLR, + gpio_port); if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0) bnx2x_sfp_module_detection(phy, params); else DP(NETIF_MSG_LINK, "SFP+ module is not initialized\n"); } else { u32 val = REG_RD(bp, params->shmem_base + - offsetof(struct shmem_region, dev_info. - port_feature_config[params->port]. - config)); - - bnx2x_set_gpio_int(bp, MISC_REGISTERS_GPIO_3, - MISC_REGISTERS_GPIO_INT_OUTPUT_SET, - port); - /** - * Module was plugged out. + offsetof(struct shmem_region, dev_info. + port_feature_config[params->port]. + config)); + bnx2x_set_gpio_int(bp, gpio_num, + MISC_REGISTERS_GPIO_INT_OUTPUT_SET, + gpio_port); + /* Module was plugged out. * Disable transmit for this module */ - if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) == - PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER) - bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); + phy->media_type = ETH_PHY_NOT_PRESENT; + if (((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) == + PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER) || + CHIP_IS_E3(bp)) + bnx2x_sfp_set_transmitter(params, phy, 0); } } + /******************************************************************/ -/* common BCM8706/BCM8726 PHY SECTION */ +/* Used by 8706 and 8727 */ +/******************************************************************/ +static void bnx2x_sfp_mask_fault(struct bnx2x *bp, + struct bnx2x_phy *phy, + u16 alarm_status_offset, + u16 alarm_ctrl_offset) +{ + u16 alarm_status, val; + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, alarm_status_offset, + &alarm_status); + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, alarm_status_offset, + &alarm_status); + /* Mask or enable the fault event. */ + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, alarm_ctrl_offset, &val); + if (alarm_status & (1<<0)) + val &= ~(1<<0); + else + val |= (1<<0); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, alarm_ctrl_offset, val); +} +/******************************************************************/ +/* common BCM8706/BCM8726 PHY SECTION */ /******************************************************************/ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy, struct link_params *params, @@ -5419,12 +8513,16 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy, DP(NETIF_MSG_LINK, "XGXS 8706/8726\n"); /* Clear RX Alarm*/ bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM, &val2); - /* clear LASI indication*/ + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, &val2); + + bnx2x_sfp_mask_fault(bp, phy, MDIO_PMA_LASI_TXSTAT, + MDIO_PMA_LASI_TXCTRL); + + /* Clear LASI indication*/ bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_STATUS, &val1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_STAT, &val1); bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_STATUS, &val2); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_STAT, &val2); DP(NETIF_MSG_LINK, "8706/8726 LASI status 0x%x--> 0x%x\n", val1, val2); bnx2x_cl45_read(bp, phy, @@ -5438,8 +8536,7 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy, DP(NETIF_MSG_LINK, "8706/8726 rx_sd 0x%x pcs_status 0x%x 1Gbps" " link_status 0x%x\n", rx_sd, pcs_status, val2); - /** - * link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status + /* Link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status * are set, or if the autoneg bit 1 is set */ link_up = ((rx_sd & pcs_status & 0x1) || (val2 & (1<<1))); @@ -5451,24 +8548,37 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy, bnx2x_ext_phy_resolve_fc(phy, params, vars); vars->duplex = DUPLEX_FULL; } + + /* Capture 10G link fault. Read twice to clear stale value. */ + if (vars->line_speed == SPEED_10000) { + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, + MDIO_PMA_LASI_TXSTAT, &val1); + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, + MDIO_PMA_LASI_TXSTAT, &val1); + if (val1 & (1<<0)) + vars->fault_detected = 1; + } + return link_up; } /******************************************************************/ -/* BCM8706 PHY SECTION */ +/* BCM8706 PHY SECTION */ /******************************************************************/ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy, struct link_params *params, struct link_vars *vars) { - u16 cnt, val; + u32 tx_en_mode; + u16 cnt, val, tmp1; struct bnx2x *bp = params->bp; + bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); + MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); /* HW reset */ bnx2x_ext_phy_hw_reset(bp, params->port); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040); - bnx2x_wait_reset_complete(bp, phy); + bnx2x_wait_reset_complete(bp, phy, params); /* Wait until fw is loaded */ for (cnt = 0; cnt < 100; cnt++) { @@ -5505,16 +8615,20 @@ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_DIGITAL_CTRL, 0x400); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_TXCTRL, + 0); + /* Arm LASI for link and Tx fault. */ + bnx2x_cl45_write(bp, phy, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 3); } else { - /* Force 1Gbps using autoneg with 1G advertisment */ + /* Force 1Gbps using autoneg with 1G advertisement */ /* Allow CL37 through CL73 */ DP(NETIF_MSG_LINK, "XGXS 8706 AutoNeg\n"); bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_CL73, 0x040c); - /* Enable Full-Duplex advertisment on CL37 */ + /* Enable Full-Duplex advertisement on CL37 */ bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LP, 0x0020); /* Enable CL37 AN */ @@ -5528,25 +8642,44 @@ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy, bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM_CTRL, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXCTRL, 0x0400); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 0x0004); } bnx2x_save_bcm_spirom_ver(bp, phy, params->port); + + /* If TX Laser is controlled by GPIO_0, do not let PHY go into low + * power mode, if TX Laser is disabled + */ + + tx_en_mode = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[params->port].sfp_ctrl)) + & PORT_HW_CFG_TX_LASER_MASK; + + if (tx_en_mode == PORT_HW_CFG_TX_LASER_GPIO0) { + DP(NETIF_MSG_LINK, "Enabling TXONOFF_PWRDN_DIS\n"); + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, MDIO_PMA_REG_DIGITAL_CTRL, &tmp1); + tmp1 |= 0x1; + bnx2x_cl45_write(bp, phy, + MDIO_PMA_DEVAD, MDIO_PMA_REG_DIGITAL_CTRL, tmp1); + } + return 0; } -static u8 bnx2x_8706_read_status(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static int bnx2x_8706_read_status(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { return bnx2x_8706_8726_read_status(phy, params, vars); } /******************************************************************/ -/* BCM8726 PHY SECTION */ +/* BCM8726 PHY SECTION */ /******************************************************************/ static void bnx2x_8726_config_loopback(struct bnx2x_phy *phy, struct link_params *params) @@ -5556,7 +8689,6 @@ static void bnx2x_8726_config_loopback(struct bnx2x_phy *phy, bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0x0001); } - static void bnx2x_8726_external_rom_boot(struct bnx2x_phy *phy, struct link_params *params) { @@ -5583,7 +8715,7 @@ static void bnx2x_8726_external_rom_boot(struct bnx2x_phy *phy, MDIO_PMA_REG_GEN_CTRL, MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP); - /* wait for 150ms for microcode load */ + /* Wait for 150ms for microcode load */ msleep(150); /* Disable serial boot control, tristates pins SS_N, SCK, MOSI, MISO */ @@ -5615,22 +8747,20 @@ static u8 bnx2x_8726_read_status(struct bnx2x_phy *phy, return link_up; } -static u8 bnx2x_8726_config_init(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) + +static int bnx2x_8726_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; - u32 val; - u32 swap_val, swap_override, aeu_gpio_mask, offset; DP(NETIF_MSG_LINK, "Initializing BCM8726\n"); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); - bnx2x_wait_reset_complete(bp, phy); + bnx2x_wait_reset_complete(bp, phy, params); bnx2x_8726_external_rom_boot(phy, params); - /** - * Need to call module detected on initialization since the module + /* Need to call module detected on initialization since the module * detection triggered by actual module insertion might occur before * driver is loaded, and when driver is loaded, it reset all * registers, including the transmitter @@ -5644,9 +8774,9 @@ static u8 bnx2x_8726_config_init(struct bnx2x_phy *phy, bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, 0xD); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x5); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 0x5); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM_CTRL, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXCTRL, 0x400); } else if ((phy->req_line_speed == SPEED_AUTO_NEG) && (phy->speed_cap_mask & @@ -5667,26 +8797,25 @@ static u8 bnx2x_8726_config_init(struct bnx2x_phy *phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); - /** - * Enable RX-ALARM control to receive interrupt for 1G speed + /* Enable RX-ALARM control to receive interrupt for 1G speed * change */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x4); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 0x4); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM_CTRL, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXCTRL, 0x400); } else { /* Default 10G. Set only LASI control */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 1); } /* Set TX PreEmphasis if needed */ if ((params->feature_config_flags & FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED)) { - DP(NETIF_MSG_LINK, "Setting TX_CTRL1 0x%x," - "TX_CTRL2 0x%x\n", + DP(NETIF_MSG_LINK, + "Setting TX_CTRL1 0x%x, TX_CTRL2 0x%x\n", phy->tx_preemphasis[0], phy->tx_preemphasis[1]); bnx2x_cl45_write(bp, phy, @@ -5700,48 +8829,23 @@ static u8 bnx2x_8726_config_init(struct bnx2x_phy *phy, phy->tx_preemphasis[1]); } - /* Set GPIO3 to trigger SFP+ module insertion/removal */ - bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, - MISC_REGISTERS_GPIO_INPUT_HI_Z, params->port); - - /* The GPIO should be swapped if the swap register is set and active */ - swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); - swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); - - /* Select function upon port-swap configuration */ - if (params->port == 0) { - offset = MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0; - aeu_gpio_mask = (swap_val && swap_override) ? - AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_1 : - AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_0; - } else { - offset = MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0; - aeu_gpio_mask = (swap_val && swap_override) ? - AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_0 : - AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_1; - } - val = REG_RD(bp, offset); - /* add GPIO3 to group */ - val |= aeu_gpio_mask; - REG_WR(bp, offset, val); return 0; } - static void bnx2x_8726_link_reset(struct bnx2x_phy *phy, struct link_params *params) { struct bnx2x *bp = params->bp; - DP(NETIF_MSG_LINK, "bnx2x_8726_reset_phy port %d\n", params->port); - + DP(NETIF_MSG_LINK, "bnx2x_8726_link_reset port %d\n", params->port); /* Set serial boot control for external load */ bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, 0x0001); } + /******************************************************************/ -/* BCM8727 PHY SECTION */ +/* BCM8727 PHY SECTION */ /******************************************************************/ static void bnx2x_8727_set_link_led(struct bnx2x_phy *phy, @@ -5794,8 +8898,7 @@ static void bnx2x_8727_hw_reset(struct bnx2x_phy *phy, struct link_params *params) { u32 swap_val, swap_override; u8 port; - /** - * The PHY reset is controlled by GPIO 1. Fake the port number + /* The PHY reset is controlled by GPIO 1. Fake the port number * to cancel the swap done in set_gpio() */ struct bnx2x *bp = params->bp; @@ -5803,48 +8906,55 @@ static void bnx2x_8727_hw_reset(struct bnx2x_phy *phy, swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); port = (swap_val && swap_override) ^ 1; bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, - MISC_REGISTERS_GPIO_OUTPUT_LOW, port); + MISC_REGISTERS_GPIO_OUTPUT_LOW, port); } -static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static int bnx2x_8727_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { - u16 tmp1, val, mod_abs; - + u32 tx_en_mode; + u16 tmp1, val, mod_abs, tmp2; + u16 rx_alarm_ctrl_val; + u16 lasi_ctrl_val; struct bnx2x *bp = params->bp; /* Enable PMD link, MOD_ABS_FLT, and 1G link alarm */ + + bnx2x_wait_reset_complete(bp, phy, params); + rx_alarm_ctrl_val = (1<<2) | (1<<5) ; + /* Should be 0x6 to enable XS on Tx side. */ + lasi_ctrl_val = 0x0006; + DP(NETIF_MSG_LINK, "Initializing BCM8727\n"); - - bnx2x_wait_reset_complete(bp, phy); - - /* enable LASI */ + /* Enable LASI */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM_CTRL, - (1<<2) | (1<<5)); - + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXCTRL, + rx_alarm_ctrl_val); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x0004); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_TXCTRL, + 0); + bnx2x_cl45_write(bp, phy, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, lasi_ctrl_val); - /** - * Initially configure MOD_ABS to interrupt when module is + /* Initially configure MOD_ABS to interrupt when module is * presence( bit 8) */ bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, &mod_abs); - /** - * Set EDC off by setting OPTXLOS signal input to low (bit 9). - * When the EDC is off it locks onto a reference clock and avoids - * becoming 'lost' - */ + /* Set EDC off by setting OPTXLOS signal input to low (bit 9). + * When the EDC is off it locks onto a reference clock and avoids + * becoming 'lost' + */ mod_abs &= ~(1<<8); if (!(phy->flags & FLAGS_NOC)) mod_abs &= ~(1<<9); - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs); + /* Enable/Disable PHY transmitter output */ + bnx2x_set_disable_pmd_transmit(params, phy, 0); + /* Make MOD_ABS give interrupt on change */ bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_PCS_OPT_CTRL, &val); @@ -5852,13 +8962,11 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy, if (phy->flags & FLAGS_NOC) val |= (3<<5); - /** - * Set 8727 GPIOs to input to allow reading from the 8727 GPIO0 + /* Set 8727 GPIOs to input to allow reading from the 8727 GPIO0 * status which reflect SFP+ module over-current */ if (!(phy->flags & FLAGS_NOC)) val &= 0xff8f; /* Reset bits 4-6 */ - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_PCS_OPT_CTRL, val); @@ -5868,7 +8976,7 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &tmp1); bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM, &tmp1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, &tmp1); /* Set option 1G speed */ if (phy->req_line_speed == SPEED_1000) { @@ -5880,8 +8988,7 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy, bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1); DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1); - /** - * Power down the XAUI until link is up in case of dual-media + /* Power down the XAUI until link is up in case of dual-media * and 1G */ if (DUAL_MEDIA(params)) { @@ -5906,8 +9013,7 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy, bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300); } else { - /** - * Since the 8727 has only single reset pin, need to set the 10G + /* Since the 8727 has only single reset pin, need to set the 10G * registers although it is default */ bnx2x_cl45_write(bp, phy, @@ -5945,6 +9051,31 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy, phy->tx_preemphasis[1]); } + /* If TX Laser is controlled by GPIO_0, do not let PHY go into low + * power mode, if TX Laser is disabled + */ + tx_en_mode = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[params->port].sfp_ctrl)) + & PORT_HW_CFG_TX_LASER_MASK; + + if (tx_en_mode == PORT_HW_CFG_TX_LASER_GPIO0) { + + DP(NETIF_MSG_LINK, "Enabling TXONOFF_PWRDN_DIS\n"); + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_OPT_CFG_REG, &tmp2); + tmp2 |= 0x1000; + tmp2 &= 0xFFEF; + bnx2x_cl45_write(bp, phy, + MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_OPT_CFG_REG, tmp2); + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, + &tmp2); + bnx2x_cl45_write(bp, phy, + MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, + (tmp2 & 0x7fff)); + } + return 0; } @@ -5963,15 +9094,16 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy, if (mod_abs & (1<<8)) { /* Module is absent */ - DP(NETIF_MSG_LINK, "MOD_ABS indication " - "show module is absent\n"); - + DP(NETIF_MSG_LINK, + "MOD_ABS indication show module is absent\n"); + phy->media_type = ETH_PHY_NOT_PRESENT; /* 1. Set mod_abs to detect next module - presence event - 2. Set EDC off by setting OPTXLOS signal input to low - (bit 9). - When the EDC is off it locks onto a reference clock and - avoids becoming 'lost'.*/ + * presence event + * 2. Set EDC off by setting OPTXLOS signal input to low + * (bit 9). + * When the EDC is off it locks onto a reference clock and + * avoids becoming 'lost'. + */ mod_abs &= ~(1<<8); if (!(phy->flags & FLAGS_NOC)) mod_abs &= ~(1<<9); @@ -5980,23 +9112,23 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy, MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs); /* Clear RX alarm since it stays up as long as - the mod_abs wasn't changed */ + * the mod_abs wasn't changed + */ bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_RX_ALARM, &rx_alarm_status); + MDIO_PMA_LASI_RXSTAT, &rx_alarm_status); } else { /* Module is present */ - DP(NETIF_MSG_LINK, "MOD_ABS indication " - "show module is present\n"); - /** - * First disable transmitter, and if the module is ok, the - * module_detection will enable it - * 1. Set mod_abs to detect next module absent event ( bit 8) - * 2. Restore the default polarity of the OPRXLOS signal and - * this signal will then correctly indicate the presence or - * absence of the Rx signal. (bit 9) - */ + DP(NETIF_MSG_LINK, + "MOD_ABS indication show module is present\n"); + /* First disable transmitter, and if the module is ok, the + * module_detection will enable it + * 1. Set mod_abs to detect next module absent event ( bit 8) + * 2. Restore the default polarity of the OPRXLOS signal and + * this signal will then correctly indicate the presence or + * absence of the Rx signal. (bit 9) + */ mod_abs |= (1<<8); if (!(phy->flags & FLAGS_NOC)) mod_abs |= (1<<9); @@ -6004,20 +9136,19 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs); - /** - * Clear RX alarm since it stays up as long as the mod_abs + /* Clear RX alarm since it stays up as long as the mod_abs * wasn't changed. This is need to be done before calling the * module detection, otherwise it will clear* the link update * alarm */ bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_RX_ALARM, &rx_alarm_status); + MDIO_PMA_LASI_RXSTAT, &rx_alarm_status); if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) == PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER) - bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); + bnx2x_sfp_set_transmitter(params, phy, 0); if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0) bnx2x_sfp_module_detection(phy, params); @@ -6036,26 +9167,29 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, { struct bnx2x *bp = params->bp; - u8 link_up = 0; + u8 link_up = 0, oc_port = params->port; u16 link_status = 0; u16 rx_alarm_status, lasi_ctrl, val1; /* If PHY is not initialized, do not check link status */ bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, &lasi_ctrl); if (!lasi_ctrl) return 0; - /* Check the LASI */ + /* Check the LASI on Rx */ bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXSTAT, &rx_alarm_status); vars->line_speed = 0; DP(NETIF_MSG_LINK, "8727 RX_ALARM_STATUS 0x%x\n", rx_alarm_status); + bnx2x_sfp_mask_fault(bp, phy, MDIO_PMA_LASI_TXSTAT, + MDIO_PMA_LASI_TXCTRL); + bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_STATUS, &val1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_STAT, &val1); DP(NETIF_MSG_LINK, "8727 LASI status 0x%x\n", val1); @@ -6063,8 +9197,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &val1); - /** - * If a module is present and there is need to check + /* If a module is present and there is need to check * for over current */ if (!(phy->flags & FLAGS_NOC) && !(rx_alarm_status & (1<<5))) { @@ -6074,22 +9207,23 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, &val1); if ((val1 & (1<<8)) == 0) { - DP(NETIF_MSG_LINK, "8727 Power fault has been detected" - " on port %d\n", params->port); - netdev_err(bp->dev, "Error: Power" - " fault on Port %d has" - " been detected and the" - " power to that SFP+ module" - " has been removed to prevent" - " failure of the card. Please" - " remove the SFP+ module and" - " restart the system to clear" - " this error.\n" - , params->port); + if (!CHIP_IS_E1x(bp)) + oc_port = BP_PATH(bp) + (params->port << 1); + DP(NETIF_MSG_LINK, + "8727 Power fault has been detected on port %d\n", + oc_port); + netdev_err(bp->dev, "Error: Power fault on Port %d has " + "been detected and the power to " + "that SFP+ module has been removed " + "to prevent failure of the card. " + "Please remove the SFP+ module and " + "restart the system to clear this " + "error.\n", + oc_port); /* Disable all RX_ALARMs except for mod_abs */ bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_RX_ALARM_CTRL, (1<<5)); + MDIO_PMA_LASI_RXCTRL, (1<<5)); bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, @@ -6102,7 +9236,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, /* Clear RX alarm */ bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_RX_ALARM, &rx_alarm_status); + MDIO_PMA_LASI_RXSTAT, &rx_alarm_status); return 0; } } /* Over current check */ @@ -6112,15 +9246,14 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, bnx2x_8727_handle_mod_abs(phy, params); /* Enable all mod_abs and link detection bits */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_RX_ALARM_CTRL, + MDIO_PMA_DEVAD, MDIO_PMA_LASI_RXCTRL, ((1<<5) | (1<<2))); } - DP(NETIF_MSG_LINK, "Enabling 8727 TX laser if SFP is approved\n"); - bnx2x_8727_specific_func(phy, params, ENABLE_TX); - /* If transmitter is disabled, ignore false link up indication */ - bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, &val1); - if (val1 & (1<<15)) { + + if (!(phy->flags & FLAGS_SFP_NOT_APPROVED)) { + DP(NETIF_MSG_LINK, "Enabling 8727 TX laser\n"); + bnx2x_sfp_set_transmitter(params, phy, 1); + } else { DP(NETIF_MSG_LINK, "Tx is disabled\n"); return 0; } @@ -6129,8 +9262,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_SPEED_LINK_STATUS, &link_status); - /** - * Bits 0..2 --> speed detected, + /* Bits 0..2 --> speed detected, * Bits 13..15--> link is down */ if ((link_status & (1<<2)) && (!(link_status & (1<<15)))) { @@ -6148,9 +9280,24 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, DP(NETIF_MSG_LINK, "port %x: External link is down\n", params->port); } + + /* Capture 10G link fault. */ + if (vars->line_speed == SPEED_10000) { + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, + MDIO_PMA_LASI_TXSTAT, &val1); + + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, + MDIO_PMA_LASI_TXSTAT, &val1); + + if (val1 & (1<<0)) { + vars->fault_detected = 1; + } + } + if (link_up) { bnx2x_ext_phy_resolve_fc(phy, params, vars); vars->duplex = DUPLEX_FULL; + DP(NETIF_MSG_LINK, "duplex = 0x%x\n", vars->duplex); } if ((DUAL_MEDIA(params)) && @@ -6158,8 +9305,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_PCS_GP, &val1); - /** - * In case of dual-media board and 1G, power up the XAUI side, + /* In case of dual-media board and 1G, power up the XAUI side, * otherwise power it down. For 10G it is done automatically */ if (link_up) @@ -6173,15 +9319,18 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, return link_up; } - static void bnx2x_8727_link_reset(struct bnx2x_phy *phy, struct link_params *params) { struct bnx2x *bp = params->bp; + + /* Enable/Disable PHY transmitter output */ + bnx2x_set_disable_pmd_transmit(params, phy, 1); + /* Disable Transmitter */ - bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); + bnx2x_sfp_set_transmitter(params, phy, 0); /* Clear LASI */ - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 0); } @@ -6189,112 +9338,121 @@ static void bnx2x_8727_link_reset(struct bnx2x_phy *phy, /* BCM8481/BCM84823/BCM84833 PHY SECTION */ /******************************************************************/ static void bnx2x_save_848xx_spirom_version(struct bnx2x_phy *phy, - struct link_params *params) + struct bnx2x *bp, + u8 port) { - u16 val, fw_ver1, fw_ver2, cnt, adj; - struct bnx2x *bp = params->bp; + u16 val, fw_ver1, fw_ver2, cnt; - adj = 0; - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) - adj = -1; + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { + bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, 0x400f, &fw_ver1); + bnx2x_save_spirom_version(bp, port, fw_ver1 & 0xfff, + phy->ver_addr); + } else { + /* For 32-bit registers in 848xx, access via MDIO2ARM i/f. */ + /* (1) set reg 0xc200_0014(SPI_BRIDGE_CTRL_2) to 0x03000000 */ + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0014); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81B, 0x0000); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81C, 0x0300); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x0009); - /* For the 32 bits registers in 848xx, access via MDIO2ARM interface.*/ - /* (1) set register 0xc200_0014(SPI_BRIDGE_CTRL_2) to 0x03000000 */ - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819 + adj, 0x0014); - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A + adj, 0xc200); - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81B + adj, 0x0000); - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81C + adj, 0x0300); - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817 + adj, 0x0009); + for (cnt = 0; cnt < 100; cnt++) { + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818, &val); + if (val & 1) + break; + udelay(5); + } + if (cnt == 100) { + DP(NETIF_MSG_LINK, "Unable to read 848xx " + "phy fw version(1)\n"); + bnx2x_save_spirom_version(bp, port, 0, + phy->ver_addr); + return; + } - for (cnt = 0; cnt < 100; cnt++) { - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818 + adj, &val); - if (val & 1) - break; - udelay(5); - } - if (cnt == 100) { - DP(NETIF_MSG_LINK, "Unable to read 848xx phy fw version(1)\n"); - bnx2x_save_spirom_version(bp, params->port, 0, + + /* 2) read register 0xc200_0000 (SPI_FW_STATUS) */ + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0000); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x000A); + for (cnt = 0; cnt < 100; cnt++) { + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818, &val); + if (val & 1) + break; + udelay(5); + } + if (cnt == 100) { + DP(NETIF_MSG_LINK, "Unable to read 848xx phy fw " + "version(2)\n"); + bnx2x_save_spirom_version(bp, port, 0, + phy->ver_addr); + return; + } + + /* lower 16 bits of the register SPI_FW_STATUS */ + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81B, &fw_ver1); + /* upper 16 bits of register SPI_FW_STATUS */ + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81C, &fw_ver2); + + bnx2x_save_spirom_version(bp, port, (fw_ver2<<16) | fw_ver1, phy->ver_addr); - return; } - /* 2) read register 0xc200_0000 (SPI_FW_STATUS) */ - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819 + adj, 0x0000); - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A + adj, 0xc200); - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817 + adj, 0x000A); - for (cnt = 0; cnt < 100; cnt++) { - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818 + adj, &val); - if (val & 1) - break; - udelay(5); - } - if (cnt == 100) { - DP(NETIF_MSG_LINK, "Unable to read 848xx phy fw version(2)\n"); - bnx2x_save_spirom_version(bp, params->port, 0, - phy->ver_addr); - return; - } - - /* lower 16 bits of the register SPI_FW_STATUS */ - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81B + adj, &fw_ver1); - /* upper 16 bits of register SPI_FW_STATUS */ - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81C + adj, &fw_ver2); - - bnx2x_save_spirom_version(bp, params->port, (fw_ver2<<16) | fw_ver1, - phy->ver_addr); } static void bnx2x_848xx_set_led(struct bnx2x *bp, - struct bnx2x_phy *phy) + struct bnx2x_phy *phy) { - u16 val, adj; - - adj = 0; - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) - adj = -1; + u16 val, offset; /* PHYC_CTL_LED_CTL */ bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LINK_SIGNAL + adj, &val); + MDIO_PMA_REG_8481_LINK_SIGNAL, &val); val &= 0xFE00; val |= 0x0092; bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LINK_SIGNAL + adj, val); + MDIO_PMA_REG_8481_LINK_SIGNAL, val); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED1_MASK + adj, + MDIO_PMA_REG_8481_LED1_MASK, 0x80); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED2_MASK + adj, + MDIO_PMA_REG_8481_LED2_MASK, 0x18); + /* Select activity source by Tx and Rx, as suggested by PHY AE */ bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED3_MASK + adj, + MDIO_PMA_REG_8481_LED3_MASK, 0x0006); /* Select the closest activity blink rate to that in 10/100/1000 */ bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED3_BLINK + adj, + MDIO_PMA_REG_8481_LED3_BLINK, 0); - bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_84823_CTL_LED_CTL_1 + adj, &val); - val |= MDIO_PMA_REG_84823_LED3_STRETCH_EN; /* stretch_en for LED3*/ - + /* Configure the blink rate to ~15.9 Hz */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_84823_CTL_LED_CTL_1 + adj, val); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_84823_CTL_SLOW_CLK_CNT_HIGH, + MDIO_PMA_REG_84823_BLINK_RATE_VAL_15P9HZ); + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) + offset = MDIO_PMA_REG_84833_CTL_LED_CTL_1; + else + offset = MDIO_PMA_REG_84823_CTL_LED_CTL_1; + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, offset, &val); + val |= MDIO_PMA_REG_84823_LED3_STRETCH_EN; /* stretch_en for LED3*/ + bnx2x_cl45_write(bp, phy, + MDIO_PMA_DEVAD, offset, val); /* 'Interrupt Mask' */ bnx2x_cl45_write(bp, phy, @@ -6302,18 +9460,21 @@ static void bnx2x_848xx_set_led(struct bnx2x *bp, 0xFFFB, 0xFFFD); } -static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, +static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, struct link_params *params, struct link_vars *vars) { struct bnx2x *bp = params->bp; - u16 autoneg_val, an_1000_val, an_10_100_val; - /** - * This phy uses the NIG latch mechanism since link indication - * arrives through its LED4 and not via its LASI signal, so we - * get steady signal instead of clear on read - */ + u16 autoneg_val, an_1000_val, an_10_100_val, an_10g_val; + if (phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { + /* Save spirom version */ + bnx2x_save_848xx_spirom_version(phy, bp, params->port); + } + /* This phy uses the NIG latch mechanism since link indication + * arrives through its LED4 and not via its LASI signal, so we + * get steady signal instead of clear on read + */ bnx2x_bits_en(bp, NIG_REG_LATCH_BC_0 + params->port*4, 1 << NIG_LATCH_BC_ENABLE_MI_INT); @@ -6355,11 +9516,11 @@ static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, MDIO_AN_DEVAD, MDIO_AN_REG_8481_1000T_CTRL, an_1000_val); - /* set 10 speed advertisement */ - if (((phy->req_line_speed == SPEED_AUTO_NEG) && + /* set 100 speed advertisement */ + if ((phy->req_line_speed == SPEED_AUTO_NEG) && (phy->speed_cap_mask & - (PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL | - PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF)))) { + (PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL | + PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF))) { an_10_100_val |= (1<<7); /* Enable autoneg and restart autoneg for legacy speeds */ autoneg_val |= (1<<9 | 1<<12); @@ -6370,9 +9531,12 @@ static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, } /* set 10 speed advertisement */ if (((phy->req_line_speed == SPEED_AUTO_NEG) && - (phy->speed_cap_mask & - (PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL | - PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF)))) { + (phy->speed_cap_mask & + (PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL | + PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF)) && + (phy->supported & + (SUPPORTED_10baseT_Half | + SUPPORTED_10baseT_Full)))) { an_10_100_val |= (1<<5); autoneg_val |= (1<<9 | 1<<12); if (phy->req_duplex == DUPLEX_FULL) @@ -6381,15 +9545,23 @@ static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, } /* Only 10/100 are allowed to work in FORCE mode */ - if (phy->req_line_speed == SPEED_100) { + if ((phy->req_line_speed == SPEED_100) && + (phy->supported & + (SUPPORTED_100baseT_Half | + SUPPORTED_100baseT_Full))) { autoneg_val |= (1<<13); /* Enabled AUTO-MDIX when autoneg is disabled */ bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8481_AUX_CTRL, (1<<15 | 1<<9 | 7<<0)); + /* The PHY needs this set even for forced link. */ + an_10_100_val |= (1<<8) | (1<<7); DP(NETIF_MSG_LINK, "Setting 100M force\n"); } - if (phy->req_line_speed == SPEED_10) { + if ((phy->req_line_speed == SPEED_10) && + (phy->supported & + (SUPPORTED_10baseT_Half | + SUPPORTED_10baseT_Full))) { /* Enabled AUTO-MDIX when autoneg is disabled */ bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8481_AUX_CTRL, @@ -6404,7 +9576,12 @@ static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, if (phy->req_duplex == DUPLEX_FULL) autoneg_val |= (1<<8); - bnx2x_cl45_write(bp, phy, + /* Always write this if this is not 84833. + * For 84833, write it only when it's a forced speed. + */ + if ((phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) || + ((autoneg_val & (1<<12)) == 0)) + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8481_LEGACY_MII_CTRL, autoneg_val); @@ -6412,95 +9589,273 @@ static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) || (phy->req_line_speed == SPEED_10000)) { - DP(NETIF_MSG_LINK, "Advertising 10G\n"); - /* Restart autoneg for 10G*/ + DP(NETIF_MSG_LINK, "Advertising 10G\n"); + /* Restart autoneg for 10G*/ - bnx2x_cl45_write(bp, phy, - MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, - 0x3200); - } else if (phy->req_line_speed != SPEED_10 && - phy->req_line_speed != SPEED_100) { + bnx2x_cl45_read(bp, phy, + MDIO_AN_DEVAD, + MDIO_AN_REG_8481_10GBASE_T_AN_CTRL, + &an_10g_val); + bnx2x_cl45_write(bp, phy, + MDIO_AN_DEVAD, + MDIO_AN_REG_8481_10GBASE_T_AN_CTRL, + an_10g_val | 0x1000); + bnx2x_cl45_write(bp, phy, + MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, + 0x3200); + } else bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8481_10GBASE_T_AN_CTRL, 1); - } - /* Save spirom version */ - bnx2x_save_848xx_spirom_version(phy, params); return 0; } -static u8 bnx2x_8481_config_init(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static int bnx2x_8481_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; /* Restore normal power mode*/ bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); + MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); /* HW reset */ bnx2x_ext_phy_hw_reset(bp, params->port); - bnx2x_wait_reset_complete(bp, phy); + bnx2x_wait_reset_complete(bp, phy, params); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); return bnx2x_848xx_cmn_config_init(phy, params, vars); } -static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +#define PHY84833_CMDHDLR_WAIT 300 +#define PHY84833_CMDHDLR_MAX_ARGS 5 +static int bnx2x_84833_cmd_hdlr(struct bnx2x_phy *phy, + struct link_params *params, + u16 fw_cmd, + u16 cmd_args[]) +{ + u32 idx; + u16 val; + struct bnx2x *bp = params->bp; + /* Write CMD_OPEN_OVERRIDE to STATUS reg */ + bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, + MDIO_84833_CMD_HDLR_STATUS, + PHY84833_STATUS_CMD_OPEN_OVERRIDE); + for (idx = 0; idx < PHY84833_CMDHDLR_WAIT; idx++) { + bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, + MDIO_84833_CMD_HDLR_STATUS, &val); + if (val == PHY84833_STATUS_CMD_OPEN_FOR_CMDS) + break; + msleep(1); + } + if (idx >= PHY84833_CMDHDLR_WAIT) { + DP(NETIF_MSG_LINK, "FW cmd: FW not ready.\n"); + return -EINVAL; + } + + /* Prepare argument(s) and issue command */ + for (idx = 0; idx < PHY84833_CMDHDLR_MAX_ARGS; idx++) { + bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, + MDIO_84833_CMD_HDLR_DATA1 + idx, + cmd_args[idx]); + } + bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, + MDIO_84833_CMD_HDLR_COMMAND, fw_cmd); + for (idx = 0; idx < PHY84833_CMDHDLR_WAIT; idx++) { + bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, + MDIO_84833_CMD_HDLR_STATUS, &val); + if ((val == PHY84833_STATUS_CMD_COMPLETE_PASS) || + (val == PHY84833_STATUS_CMD_COMPLETE_ERROR)) + break; + msleep(1); + } + if ((idx >= PHY84833_CMDHDLR_WAIT) || + (val == PHY84833_STATUS_CMD_COMPLETE_ERROR)) { + DP(NETIF_MSG_LINK, "FW cmd failed.\n"); + return -EINVAL; + } + /* Gather returning data */ + for (idx = 0; idx < PHY84833_CMDHDLR_MAX_ARGS; idx++) { + bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, + MDIO_84833_CMD_HDLR_DATA1 + idx, + &cmd_args[idx]); + } + bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, + MDIO_84833_CMD_HDLR_STATUS, + PHY84833_STATUS_CMD_CLEAR_COMPLETE); + return 0; +} + + +static int bnx2x_84833_pair_swap_cfg(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + u32 pair_swap; + u16 data[PHY84833_CMDHDLR_MAX_ARGS]; + int status; + struct bnx2x *bp = params->bp; + + /* Check for configuration. */ + pair_swap = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[params->port].xgbt_phy_cfg)) & + PORT_HW_CFG_RJ45_PAIR_SWAP_MASK; + + if (pair_swap == 0) + return 0; + + /* Only the second argument is used for this command */ + data[1] = (u16)pair_swap; + + status = bnx2x_84833_cmd_hdlr(phy, params, + PHY84833_CMD_SET_PAIR_SWAP, data); + if (status == 0) + DP(NETIF_MSG_LINK, "Pairswap OK, val=0x%x\n", data[1]); + + return status; +} + +static u8 bnx2x_84833_get_reset_gpios(struct bnx2x *bp, + u32 shmem_base_path[], + u32 chip_id) +{ + u32 reset_pin[2]; + u32 idx; + u8 reset_gpios; + if (CHIP_IS_E3(bp)) { + /* Assume that these will be GPIOs, not EPIOs. */ + for (idx = 0; idx < 2; idx++) { + /* Map config param to register bit. */ + reset_pin[idx] = REG_RD(bp, shmem_base_path[idx] + + offsetof(struct shmem_region, + dev_info.port_hw_config[0].e3_cmn_pin_cfg)); + reset_pin[idx] = (reset_pin[idx] & + PORT_HW_CFG_E3_PHY_RESET_MASK) >> + PORT_HW_CFG_E3_PHY_RESET_SHIFT; + reset_pin[idx] -= PIN_CFG_GPIO0_P0; + reset_pin[idx] = (1 << reset_pin[idx]); + } + reset_gpios = (u8)(reset_pin[0] | reset_pin[1]); + } else { + /* E2, look from diff place of shmem. */ + for (idx = 0; idx < 2; idx++) { + reset_pin[idx] = REG_RD(bp, shmem_base_path[idx] + + offsetof(struct shmem_region, + dev_info.port_hw_config[0].default_cfg)); + reset_pin[idx] &= PORT_HW_CFG_EXT_PHY_GPIO_RST_MASK; + reset_pin[idx] -= PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO0_P0; + reset_pin[idx] >>= PORT_HW_CFG_EXT_PHY_GPIO_RST_SHIFT; + reset_pin[idx] = (1 << reset_pin[idx]); + } + reset_gpios = (u8)(reset_pin[0] | reset_pin[1]); + } + + return reset_gpios; +} + +static int bnx2x_84833_hw_reset_phy(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + u8 reset_gpios; + u32 other_shmem_base_addr = REG_RD(bp, params->shmem2_base + + offsetof(struct shmem2_region, + other_shmem_base_addr)); + + u32 shmem_base_path[2]; + + /* Work around for 84833 LED failure inside RESET status */ + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_8481_LEGACY_MII_CTRL, + MDIO_AN_REG_8481_MII_CTRL_FORCE_1G); + bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_8481_1G_100T_EXT_CTRL, + MIDO_AN_REG_8481_EXT_CTRL_FORCE_LEDS_OFF); + + shmem_base_path[0] = params->shmem_base; + shmem_base_path[1] = other_shmem_base_addr; + + reset_gpios = bnx2x_84833_get_reset_gpios(bp, shmem_base_path, + params->chip_id); + + bnx2x_set_mult_gpio(bp, reset_gpios, MISC_REGISTERS_GPIO_OUTPUT_LOW); + udelay(10); + DP(NETIF_MSG_LINK, "84833 hw reset on pin values 0x%x\n", + reset_gpios); + + return 0; +} + +#define PHY84833_CONSTANT_LATENCY 1193 +static int bnx2x_848x3_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; u8 port, initialize = 1; - u16 val, adj; - u16 temp; - u32 actual_phy_selection; - u8 rc = 0; - - /* This is just for MDIO_CTL_REG_84823_MEDIA register. */ - adj = 0; - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) - adj = 3; + u16 val; + u32 actual_phy_selection, cms_enable; + u16 cmd_args[PHY84833_CMDHDLR_MAX_ARGS]; + int rc = 0; msleep(1); - if (CHIP_IS_E2(bp)) + + if (!(CHIP_IS_E1x(bp))) port = BP_PATH(bp); else port = params->port; - bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, - port); - bnx2x_wait_reset_complete(bp, phy); + + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823) { + bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, + MISC_REGISTERS_GPIO_OUTPUT_HIGH, + port); + } else { + /* MDIO reset */ + bnx2x_cl45_write(bp, phy, + MDIO_PMA_DEVAD, + MDIO_PMA_REG_CTRL, 0x8000); + } + + bnx2x_wait_reset_complete(bp, phy, params); /* Wait for GPHY to come out of reset */ msleep(50); - /* BCM84823 requires that XGXS links up first @ 10G for normal - behavior */ - temp = vars->line_speed; - vars->line_speed = SPEED_10000; - bnx2x_set_autoneg(¶ms->phy[INT_PHY], params, vars, 0); - bnx2x_program_serdes(¶ms->phy[INT_PHY], params, vars); - vars->line_speed = temp; - - /* Set dual-media configuration according to configuration */ + if (phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { + /* BCM84823 requires that XGXS links up first @ 10G for normal + * behavior. + */ + u16 temp; + temp = vars->line_speed; + vars->line_speed = SPEED_10000; + bnx2x_set_autoneg(¶ms->phy[INT_PHY], params, vars, 0); + bnx2x_program_serdes(¶ms->phy[INT_PHY], params, vars); + vars->line_speed = temp; + } bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, - MDIO_CTL_REG_84823_MEDIA + adj, &val); + MDIO_CTL_REG_84823_MEDIA, &val); val &= ~(MDIO_CTL_REG_84823_MEDIA_MAC_MASK | MDIO_CTL_REG_84823_MEDIA_LINE_MASK | MDIO_CTL_REG_84823_MEDIA_COPPER_CORE_DOWN | MDIO_CTL_REG_84823_MEDIA_PRIORITY_MASK | MDIO_CTL_REG_84823_MEDIA_FIBER_1G); - val |= MDIO_CTL_REG_84823_CTRL_MAC_XFI | - MDIO_CTL_REG_84823_MEDIA_LINE_XAUI_L; + + if (CHIP_IS_E3(bp)) { + val &= ~(MDIO_CTL_REG_84823_MEDIA_MAC_MASK | + MDIO_CTL_REG_84823_MEDIA_LINE_MASK); + } else { + val |= (MDIO_CTL_REG_84823_CTRL_MAC_XFI | + MDIO_CTL_REG_84823_MEDIA_LINE_XAUI_L); + } actual_phy_selection = bnx2x_phy_selection(params); switch (actual_phy_selection) { case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT: - /* Do nothing. Essentialy this is like the priority copper */ + /* Do nothing. Essentially this is like the priority copper */ break; case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY: val |= MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER; @@ -6520,22 +9875,53 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy, val |= MDIO_CTL_REG_84823_MEDIA_FIBER_1G; bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, - MDIO_CTL_REG_84823_MEDIA + adj, val); + MDIO_CTL_REG_84823_MEDIA, val); DP(NETIF_MSG_LINK, "Multi_phy config = 0x%x, Media control = 0x%x\n", params->multi_phy_config, val); + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { + bnx2x_84833_pair_swap_cfg(phy, params, vars); + + /* Keep AutogrEEEn disabled. */ + cmd_args[0] = 0x0; + cmd_args[1] = 0x0; + cmd_args[2] = PHY84833_CONSTANT_LATENCY + 1; + cmd_args[3] = PHY84833_CONSTANT_LATENCY; + rc = bnx2x_84833_cmd_hdlr(phy, params, + PHY84833_CMD_SET_EEE_MODE, cmd_args); + if (rc != 0) + DP(NETIF_MSG_LINK, "Cfg AutogrEEEn failed.\n"); + } if (initialize) rc = bnx2x_848xx_cmn_config_init(phy, params, vars); else - bnx2x_save_848xx_spirom_version(phy, params); + bnx2x_save_848xx_spirom_version(phy, bp, params->port); + /* 84833 PHY has a better feature and doesn't need to support this. */ + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823) { + cms_enable = REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[params->port].default_cfg)) & + PORT_HW_CFG_ENABLE_CMS_MASK; - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823) - { - bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, - MDIO_CTL_REG_84823_USER_CTRL_REG, &val); - val &= ~MDIO_CTL_REG_84823_USER_CTRL_CMS; - bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, - MDIO_CTL_REG_84823_USER_CTRL_REG, val); + bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, + MDIO_CTL_REG_84823_USER_CTRL_REG, &val); + if (cms_enable) + val |= MDIO_CTL_REG_84823_USER_CTRL_CMS; + else + val &= ~MDIO_CTL_REG_84823_USER_CTRL_CMS; + bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, + MDIO_CTL_REG_84823_USER_CTRL_REG, val); + } + + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { + /* Bring PHY out of super isolate mode as the final step. */ + bnx2x_cl45_read(bp, phy, + MDIO_CTL_DEVAD, + MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val); + val &= ~MDIO_84833_SUPER_ISOLATE; + bnx2x_cl45_write(bp, phy, + MDIO_CTL_DEVAD, + MDIO_84833_TOP_CFG_XGPHY_STRAP1, val); } return rc; } @@ -6545,22 +9931,18 @@ static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy, struct link_vars *vars) { struct bnx2x *bp = params->bp; - u16 val, val1, val2, adj; + u16 val, val1, val2; u8 link_up = 0; - /* Reg offset adjustment for 84833 */ - adj = 0; - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) - adj = -1; /* Check 10G-BaseT link status */ /* Check PMD signal ok */ bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, 0xFFFA, &val1); bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_8481_PMD_SIGNAL + adj, + MDIO_PMA_DEVAD, MDIO_PMA_REG_8481_PMD_SIGNAL, &val2); - DP(NETIF_MSG_LINK, "BCM848xx: PMD_SIGNAL 1.a811(0) = 0x%x\n", val2); + DP(NETIF_MSG_LINK, "BCM848xx: PMD_SIGNAL 1.a811 = 0x%x\n", val2); /* Check link 10G */ if (val2 & (1<<11)) { @@ -6569,7 +9951,7 @@ static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy, link_up = 1; bnx2x_ext_phy_10G_an_resolve(bp, phy, vars); } else { /* Check Legacy speed link */ - u16 legacy_status, legacy_speed; + u16 legacy_status, legacy_speed, mii_ctrl; /* Enable expansion register 0x42 (Operation mode status) */ bnx2x_cl45_write(bp, phy, @@ -6581,10 +9963,22 @@ static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy, MDIO_AN_DEVAD, MDIO_AN_REG_8481_EXPANSION_REG_RD_RW, &legacy_status); + DP(NETIF_MSG_LINK, "Legacy speed status = 0x%x\n", + legacy_status); - DP(NETIF_MSG_LINK, "Legacy speed status" - " = 0x%x\n", legacy_status); link_up = ((legacy_status & (1<<11)) == (1<<11)); + + if (params->feature_config_flags & + FEATURE_CONFIG_IEEE_PHY_TEST) { + bnx2x_cl45_read(bp, phy, + MDIO_AN_DEVAD, + MDIO_AN_REG_8481_LEGACY_MII_CTRL, + &mii_ctrl); + /* For IEEE testing, check for a fake link. */ + link_up |= ((mii_ctrl & 0x3040) == 0x40); + } + + if (link_up) { legacy_speed = (legacy_status & (3<<9)); if (legacy_speed == (0<<9)) @@ -6601,9 +9995,10 @@ static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy, else vars->duplex = DUPLEX_HALF; - DP(NETIF_MSG_LINK, "Link is up in %dMbps," - " is_duplex_full= %d\n", vars->line_speed, - (vars->duplex == DUPLEX_FULL)); + DP(NETIF_MSG_LINK, + "Link is up in %dMbps, is_duplex_full= %d\n", + vars->line_speed, + (vars->duplex == DUPLEX_FULL)); /* Check legacy speed AN resolution */ bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, @@ -6622,18 +10017,54 @@ static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy, } } if (link_up) { - DP(NETIF_MSG_LINK, "BCM84823: link speed is %d\n", + DP(NETIF_MSG_LINK, "BCM848x3: link speed is %d\n", vars->line_speed); bnx2x_ext_phy_resolve_fc(phy, params, vars); + + /* Read LP advertised speeds */ + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_CL37_FC_LP, &val); + if (val & (1<<5)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10THD_CAPABLE; + if (val & (1<<6)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE; + if (val & (1<<7)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE; + if (val & (1<<8)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE; + if (val & (1<<9)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_100T4_CAPABLE; + + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_1000T_STATUS, &val); + + if (val & (1<<10)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE; + if (val & (1<<11)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE; + + bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, + MDIO_AN_REG_MASTER_STATUS, &val); + + if (val & (1<<11)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE; } return link_up; } -static u8 bnx2x_848xx_format_ver(u32 raw_ver, u8 *str, u16 *len) +static int bnx2x_848xx_format_ver(u32 raw_ver, u8 *str, u16 *len) { - u8 status = 0; + int status = 0; u32 spirom_ver; spirom_ver = ((raw_ver & 0xF80) >> 7) << 16 | (raw_ver & 0x7F); status = bnx2x_format_ver(spirom_ver, str, len); @@ -6644,9 +10075,9 @@ static void bnx2x_8481_hw_reset(struct bnx2x_phy *phy, struct link_params *params) { bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, - MISC_REGISTERS_GPIO_OUTPUT_LOW, 0); + MISC_REGISTERS_GPIO_OUTPUT_LOW, 0); bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, - MISC_REGISTERS_GPIO_OUTPUT_LOW, 1); + MISC_REGISTERS_GPIO_OUTPUT_LOW, 1); } static void bnx2x_8481_link_reset(struct bnx2x_phy *phy, @@ -6661,16 +10092,28 @@ static void bnx2x_8481_link_reset(struct bnx2x_phy *phy, static void bnx2x_848x3_link_reset(struct bnx2x_phy *phy, struct link_params *params) { - struct bnx2x *bp = params->bp; u8 port; - if (CHIP_IS_E2(bp)) + u16 val16; + + if (!(CHIP_IS_E1x(bp))) port = BP_PATH(bp); else port = params->port; - bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, - MISC_REGISTERS_GPIO_OUTPUT_LOW, - port); + + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823) { + bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, + MISC_REGISTERS_GPIO_OUTPUT_LOW, + port); + } else { + bnx2x_cl45_read(bp, phy, + MDIO_CTL_DEVAD, + MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val16); + val16 |= MDIO_84833_SUPER_ISOLATE; + bnx2x_cl45_write(bp, phy, + MDIO_CTL_DEVAD, + MDIO_84833_TOP_CFG_XGPHY_STRAP1, val16); + } } static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, @@ -6678,14 +10121,20 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, { struct bnx2x *bp = params->bp; u16 val; + u8 port; + + if (!(CHIP_IS_E1x(bp))) + port = BP_PATH(bp); + else + port = params->port; switch (mode) { case LED_MODE_OFF: - DP(NETIF_MSG_LINK, "Port 0x%x: LED MODE OFF\n", params->port); + DP(NETIF_MSG_LINK, "Port 0x%x: LED MODE OFF\n", port); - if((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT ) == - SHARED_HW_CFG_LED_EXTPHY1) { + if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == + SHARED_HW_CFG_LED_EXTPHY1) { /* Set LED masks */ bnx2x_cl45_write(bp, phy, @@ -6717,31 +10166,32 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, break; case LED_MODE_FRONT_PANEL_OFF: - DP(NETIF_MSG_LINK, "Port 0x%x: LED MODE FRONT PANEL OFF\n", params->port); + DP(NETIF_MSG_LINK, "Port 0x%x: LED MODE FRONT PANEL OFF\n", + port); - if((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT ) == - SHARED_HW_CFG_LED_EXTPHY1) { + if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == + SHARED_HW_CFG_LED_EXTPHY1) { /* Set LED masks */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED1_MASK, - 0x0); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED1_MASK, + 0x0); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED2_MASK, - 0x0); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED2_MASK, + 0x0); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED3_MASK, - 0x0); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED3_MASK, + 0x0); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED5_MASK, - 0x20); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED5_MASK, + 0x20); } else { bnx2x_cl45_write(bp, phy, @@ -6752,10 +10202,10 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, break; case LED_MODE_ON: - DP(NETIF_MSG_LINK, "Port 0x%x: LED MODE ON\n", params->port); + DP(NETIF_MSG_LINK, "Port 0x%x: LED MODE ON\n", port); - if((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT ) == - SHARED_HW_CFG_LED_EXTPHY1) { + if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == + SHARED_HW_CFG_LED_EXTPHY1) { /* Set control reg */ bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, @@ -6765,44 +10215,44 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, val |= 0x2492; bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LINK_SIGNAL, - val); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LINK_SIGNAL, + val); /* Set LED masks */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED1_MASK, - 0x0); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED1_MASK, + 0x0); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED2_MASK, - 0x20); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED2_MASK, + 0x20); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED3_MASK, - 0x20); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED3_MASK, + 0x20); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED5_MASK, - 0x0); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED5_MASK, + 0x0); } else { bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED1_MASK, - 0x20); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED1_MASK, + 0x20); } break; case LED_MODE_OPER: - DP(NETIF_MSG_LINK, "Port 0x%x: LED MODE OPER\n", params->port); + DP(NETIF_MSG_LINK, "Port 0x%x: LED MODE OPER\n", port); - if((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT ) == - SHARED_HW_CFG_LED_EXTPHY1) { + if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == + SHARED_HW_CFG_LED_EXTPHY1) { /* Set control reg */ bnx2x_cl45_read(bp, phy, @@ -6810,36 +10260,36 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, MDIO_PMA_REG_8481_LINK_SIGNAL, &val); - if(!((val & - MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_MASK) - >> MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_SHIFT)){ - DP(NETIF_MSG_LINK, "Seting MDIO_PMA_REG_8481_LINK_SIGNAL\n"); + if (!((val & + MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_MASK) + >> MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_SHIFT)) { + DP(NETIF_MSG_LINK, "Setting LINK_SIGNAL\n"); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LINK_SIGNAL, - 0xa492); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LINK_SIGNAL, + 0xa492); } /* Set LED masks */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED1_MASK, - 0x10); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED1_MASK, + 0x10); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED2_MASK, - 0x80); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED2_MASK, + 0x80); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED3_MASK, - 0x98); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED3_MASK, + 0x98); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LED5_MASK, - 0x40); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LED5_MASK, + 0x40); } else { bnx2x_cl45_write(bp, phy, @@ -6849,21 +10299,457 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, /* Tell LED3 to blink on source */ bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LINK_SIGNAL, - &val); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LINK_SIGNAL, + &val); val &= ~(7<<6); - val |= (1<<6); /* A83B[8:6]= 1b�001 */ + val |= (1<<6); /* A83B[8:6]= 1 */ bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_8481_LINK_SIGNAL, - val); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_8481_LINK_SIGNAL, + val); } break; } + + /* This is a workaround for E3+84833 until autoneg + * restart is fixed in f/w + */ + if (CHIP_IS_E3(bp)) { + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_GP2_STATUS_GP_2_1, &val); + } } + /******************************************************************/ -/* SFX7101 PHY SECTION */ +/* 54618SE PHY SECTION */ +/******************************************************************/ +static int bnx2x_54618se_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u8 port; + u16 autoneg_val, an_1000_val, an_10_100_val, fc_val, temp; + u32 cfg_pin; + + DP(NETIF_MSG_LINK, "54618SE cfg init\n"); + msleep(1); + + /* This works with E3 only, no need to check the chip + * before determining the port. + */ + port = params->port; + + cfg_pin = (REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].e3_cmn_pin_cfg)) & + PORT_HW_CFG_E3_PHY_RESET_MASK) >> + PORT_HW_CFG_E3_PHY_RESET_SHIFT; + + /* Drive pin high to bring the GPHY out of reset. */ + bnx2x_set_cfg_pin(bp, cfg_pin, 1); + + /* wait for GPHY to reset */ + msleep(50); + + /* reset phy */ + bnx2x_cl22_write(bp, phy, + MDIO_PMA_REG_CTRL, 0x8000); + bnx2x_wait_reset_complete(bp, phy, params); + + /* Wait for GPHY to reset */ + msleep(50); + + /* Configure LED4: set to INTR (0x6). */ + /* Accessing shadow register 0xe. */ + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_SHADOW, + MDIO_REG_GPHY_SHADOW_LED_SEL2); + bnx2x_cl22_read(bp, phy, + MDIO_REG_GPHY_SHADOW, + &temp); + temp &= ~(0xf << 4); + temp |= (0x6 << 4); + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_SHADOW, + MDIO_REG_GPHY_SHADOW_WR_ENA | temp); + /* Configure INTR based on link status change. */ + bnx2x_cl22_write(bp, phy, + MDIO_REG_INTR_MASK, + ~MDIO_REG_INTR_MASK_LINK_STATUS); + + /* Flip the signal detect polarity (set 0x1c.0x1e[8]). */ + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_SHADOW, + MDIO_REG_GPHY_SHADOW_AUTO_DET_MED); + bnx2x_cl22_read(bp, phy, + MDIO_REG_GPHY_SHADOW, + &temp); + temp |= MDIO_REG_GPHY_SHADOW_INVERT_FIB_SD; + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_SHADOW, + MDIO_REG_GPHY_SHADOW_WR_ENA | temp); + + /* Set up fc */ + /* Please refer to Table 28B-3 of 802.3ab-1999 spec. */ + bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); + fc_val = 0; + if ((vars->ieee_fc & MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) == + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) + fc_val |= MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC; + + if ((vars->ieee_fc & MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) == + MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) + fc_val |= MDIO_AN_REG_ADV_PAUSE_PAUSE; + + /* Read all advertisement */ + bnx2x_cl22_read(bp, phy, + 0x09, + &an_1000_val); + + bnx2x_cl22_read(bp, phy, + 0x04, + &an_10_100_val); + + bnx2x_cl22_read(bp, phy, + MDIO_PMA_REG_CTRL, + &autoneg_val); + + /* Disable forced speed */ + autoneg_val &= ~((1<<6) | (1<<8) | (1<<9) | (1<<12) | (1<<13)); + an_10_100_val &= ~((1<<5) | (1<<6) | (1<<7) | (1<<8) | (1<<10) | + (1<<11)); + + if (((phy->req_line_speed == SPEED_AUTO_NEG) && + (phy->speed_cap_mask & + PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)) || + (phy->req_line_speed == SPEED_1000)) { + an_1000_val |= (1<<8); + autoneg_val |= (1<<9 | 1<<12); + if (phy->req_duplex == DUPLEX_FULL) + an_1000_val |= (1<<9); + DP(NETIF_MSG_LINK, "Advertising 1G\n"); + } else + an_1000_val &= ~((1<<8) | (1<<9)); + + bnx2x_cl22_write(bp, phy, + 0x09, + an_1000_val); + bnx2x_cl22_read(bp, phy, + 0x09, + &an_1000_val); + + /* Set 100 speed advertisement */ + if (((phy->req_line_speed == SPEED_AUTO_NEG) && + (phy->speed_cap_mask & + (PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL | + PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF)))) { + an_10_100_val |= (1<<7); + /* Enable autoneg and restart autoneg for legacy speeds */ + autoneg_val |= (1<<9 | 1<<12); + + if (phy->req_duplex == DUPLEX_FULL) + an_10_100_val |= (1<<8); + DP(NETIF_MSG_LINK, "Advertising 100M\n"); + } + + /* Set 10 speed advertisement */ + if (((phy->req_line_speed == SPEED_AUTO_NEG) && + (phy->speed_cap_mask & + (PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL | + PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF)))) { + an_10_100_val |= (1<<5); + autoneg_val |= (1<<9 | 1<<12); + if (phy->req_duplex == DUPLEX_FULL) + an_10_100_val |= (1<<6); + DP(NETIF_MSG_LINK, "Advertising 10M\n"); + } + + /* Only 10/100 are allowed to work in FORCE mode */ + if (phy->req_line_speed == SPEED_100) { + autoneg_val |= (1<<13); + /* Enabled AUTO-MDIX when autoneg is disabled */ + bnx2x_cl22_write(bp, phy, + 0x18, + (1<<15 | 1<<9 | 7<<0)); + DP(NETIF_MSG_LINK, "Setting 100M force\n"); + } + if (phy->req_line_speed == SPEED_10) { + /* Enabled AUTO-MDIX when autoneg is disabled */ + bnx2x_cl22_write(bp, phy, + 0x18, + (1<<15 | 1<<9 | 7<<0)); + DP(NETIF_MSG_LINK, "Setting 10M force\n"); + } + + /* Check if we should turn on Auto-GrEEEn */ + bnx2x_cl22_read(bp, phy, MDIO_REG_GPHY_PHYID_LSB, &temp); + if (temp == MDIO_REG_GPHY_ID_54618SE) { + if (params->feature_config_flags & + FEATURE_CONFIG_AUTOGREEEN_ENABLED) { + temp = 6; + DP(NETIF_MSG_LINK, "Enabling Auto-GrEEEn\n"); + } else { + temp = 0; + DP(NETIF_MSG_LINK, "Disabling Auto-GrEEEn\n"); + } + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_CL45_ADDR_REG, MDIO_AN_DEVAD); + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_CL45_DATA_REG, + MDIO_REG_GPHY_EEE_ADV); + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_CL45_ADDR_REG, + (0x1 << 14) | MDIO_AN_DEVAD); + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_CL45_DATA_REG, + temp); + } + + bnx2x_cl22_write(bp, phy, + 0x04, + an_10_100_val | fc_val); + + if (phy->req_duplex == DUPLEX_FULL) + autoneg_val |= (1<<8); + + bnx2x_cl22_write(bp, phy, + MDIO_PMA_REG_CTRL, autoneg_val); + + return 0; +} + + +static void bnx2x_5461x_set_link_led(struct bnx2x_phy *phy, + struct link_params *params, u8 mode) +{ + struct bnx2x *bp = params->bp; + u16 temp; + + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_SHADOW, + MDIO_REG_GPHY_SHADOW_LED_SEL1); + bnx2x_cl22_read(bp, phy, + MDIO_REG_GPHY_SHADOW, + &temp); + temp &= 0xff00; + + DP(NETIF_MSG_LINK, "54618x set link led (mode=%x)\n", mode); + switch (mode) { + case LED_MODE_FRONT_PANEL_OFF: + case LED_MODE_OFF: + temp |= 0x00ee; + break; + case LED_MODE_OPER: + temp |= 0x0001; + break; + case LED_MODE_ON: + temp |= 0x00ff; + break; + default: + break; + } + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_SHADOW, + MDIO_REG_GPHY_SHADOW_WR_ENA | temp); + return; +} + + +static void bnx2x_54618se_link_reset(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + u32 cfg_pin; + u8 port; + + /* In case of no EPIO routed to reset the GPHY, put it + * in low power mode. + */ + bnx2x_cl22_write(bp, phy, MDIO_PMA_REG_CTRL, 0x800); + /* This works with E3 only, no need to check the chip + * before determining the port. + */ + port = params->port; + cfg_pin = (REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].e3_cmn_pin_cfg)) & + PORT_HW_CFG_E3_PHY_RESET_MASK) >> + PORT_HW_CFG_E3_PHY_RESET_SHIFT; + + /* Drive pin low to put GPHY in reset. */ + bnx2x_set_cfg_pin(bp, cfg_pin, 0); +} + +static u8 bnx2x_54618se_read_status(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u16 val; + u8 link_up = 0; + u16 legacy_status, legacy_speed; + + /* Get speed operation status */ + bnx2x_cl22_read(bp, phy, + MDIO_REG_GPHY_AUX_STATUS, + &legacy_status); + DP(NETIF_MSG_LINK, "54618SE read_status: 0x%x\n", legacy_status); + + /* Read status to clear the PHY interrupt. */ + bnx2x_cl22_read(bp, phy, + MDIO_REG_INTR_STATUS, + &val); + + link_up = ((legacy_status & (1<<2)) == (1<<2)); + + if (link_up) { + legacy_speed = (legacy_status & (7<<8)); + if (legacy_speed == (7<<8)) { + vars->line_speed = SPEED_1000; + vars->duplex = DUPLEX_FULL; + } else if (legacy_speed == (6<<8)) { + vars->line_speed = SPEED_1000; + vars->duplex = DUPLEX_HALF; + } else if (legacy_speed == (5<<8)) { + vars->line_speed = SPEED_100; + vars->duplex = DUPLEX_FULL; + } + /* Omitting 100Base-T4 for now */ + else if (legacy_speed == (3<<8)) { + vars->line_speed = SPEED_100; + vars->duplex = DUPLEX_HALF; + } else if (legacy_speed == (2<<8)) { + vars->line_speed = SPEED_10; + vars->duplex = DUPLEX_FULL; + } else if (legacy_speed == (1<<8)) { + vars->line_speed = SPEED_10; + vars->duplex = DUPLEX_HALF; + } else /* Should not happen */ + vars->line_speed = 0; + + DP(NETIF_MSG_LINK, + "Link is up in %dMbps, is_duplex_full= %d\n", + vars->line_speed, + (vars->duplex == DUPLEX_FULL)); + + /* Check legacy speed AN resolution */ + bnx2x_cl22_read(bp, phy, + 0x01, + &val); + if (val & (1<<5)) + vars->link_status |= + LINK_STATUS_AUTO_NEGOTIATE_COMPLETE; + bnx2x_cl22_read(bp, phy, + 0x06, + &val); + if ((val & (1<<0)) == 0) + vars->link_status |= + LINK_STATUS_PARALLEL_DETECTION_USED; + + DP(NETIF_MSG_LINK, "BCM54618SE: link speed is %d\n", + vars->line_speed); + + /* Report whether EEE is resolved. */ + bnx2x_cl22_read(bp, phy, MDIO_REG_GPHY_PHYID_LSB, &val); + if (val == MDIO_REG_GPHY_ID_54618SE) { + if (vars->link_status & + LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) + val = 0; + else { + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_CL45_ADDR_REG, + MDIO_AN_DEVAD); + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_CL45_DATA_REG, + MDIO_REG_GPHY_EEE_RESOLVED); + bnx2x_cl22_write(bp, phy, + MDIO_REG_GPHY_CL45_ADDR_REG, + (0x1 << 14) | MDIO_AN_DEVAD); + bnx2x_cl22_read(bp, phy, + MDIO_REG_GPHY_CL45_DATA_REG, + &val); + } + DP(NETIF_MSG_LINK, "EEE resolution: 0x%x\n", val); + } + + bnx2x_ext_phy_resolve_fc(phy, params, vars); + + if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) { + /* Report LP advertised speeds */ + bnx2x_cl22_read(bp, phy, 0x5, &val); + + if (val & (1<<5)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10THD_CAPABLE; + if (val & (1<<6)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE; + if (val & (1<<7)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE; + if (val & (1<<8)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE; + if (val & (1<<9)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_100T4_CAPABLE; + + bnx2x_cl22_read(bp, phy, 0xa, &val); + if (val & (1<<10)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE; + if (val & (1<<11)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE; + } + } + return link_up; +} + +static void bnx2x_54618se_config_loopback(struct bnx2x_phy *phy, + struct link_params *params) +{ + struct bnx2x *bp = params->bp; + u16 val; + u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; + + DP(NETIF_MSG_LINK, "2PMA/PMD ext_phy_loopback: 54618se\n"); + + /* Enable master/slave manual mmode and set to master */ + /* mii write 9 [bits set 11 12] */ + bnx2x_cl22_write(bp, phy, 0x09, 3<<11); + + /* forced 1G and disable autoneg */ + /* set val [mii read 0] */ + /* set val [expr $val & [bits clear 6 12 13]] */ + /* set val [expr $val | [bits set 6 8]] */ + /* mii write 0 $val */ + bnx2x_cl22_read(bp, phy, 0x00, &val); + val &= ~((1<<6) | (1<<12) | (1<<13)); + val |= (1<<6) | (1<<8); + bnx2x_cl22_write(bp, phy, 0x00, val); + + /* Set external loopback and Tx using 6dB coding */ + /* mii write 0x18 7 */ + /* set val [mii read 0x18] */ + /* mii write 0x18 [expr $val | [bits set 10 15]] */ + bnx2x_cl22_write(bp, phy, 0x18, 7); + bnx2x_cl22_read(bp, phy, 0x18, &val); + bnx2x_cl22_write(bp, phy, 0x18, val | (1<<10) | (1<<15)); + + /* This register opens the gate for the UMAC despite its name */ + REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1); + + /* Maximum Frame Length (RW). Defines a 14-Bit maximum frame + * length used by the MAC receive logic to check frames. + */ + REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710); +} + +/******************************************************************/ +/* SFX7101 PHY SECTION */ /******************************************************************/ static void bnx2x_7101_config_loopback(struct bnx2x_phy *phy, struct link_params *params) @@ -6874,9 +10760,9 @@ static void bnx2x_7101_config_loopback(struct bnx2x_phy *phy, MDIO_XS_DEVAD, MDIO_XS_SFX7101_XGXS_TEST1, 0x100); } -static u8 bnx2x_7101_config_init(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static int bnx2x_7101_config_init(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { u16 fw_ver1, fw_ver2, val; struct bnx2x *bp = params->bp; @@ -6884,13 +10770,13 @@ static u8 bnx2x_7101_config_init(struct bnx2x_phy *phy, /* Restore normal power mode*/ bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); + MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); /* HW reset */ bnx2x_ext_phy_hw_reset(bp, params->port); - bnx2x_wait_reset_complete(bp, phy); + bnx2x_wait_reset_complete(bp, phy, params); bnx2x_cl45_write(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 0x1); DP(NETIF_MSG_LINK, "Setting the SFX7101 LED to blink on traffic\n"); bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_7107_LED_CNTL, (1<<3)); @@ -6914,17 +10800,17 @@ static u8 bnx2x_7101_config_init(struct bnx2x_phy *phy, return 0; } -u8 bnx2x_7101_read_status(struct bnx2x_phy *phy, - struct link_params *params, - struct link_vars *vars) +static u8 bnx2x_7101_read_status(struct bnx2x_phy *phy, + struct link_params *params, + struct link_vars *vars) { struct bnx2x *bp = params->bp; u8 link_up; u16 val1, val2; bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_STATUS, &val2); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_STAT, &val2); bnx2x_cl45_read(bp, phy, - MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_STATUS, &val1); + MDIO_PMA_DEVAD, MDIO_PMA_LASI_STAT, &val1); DP(NETIF_MSG_LINK, "10G-base-T LASI status 0x%x->0x%x\n", val2, val1); bnx2x_cl45_read(bp, phy, @@ -6934,7 +10820,7 @@ u8 bnx2x_7101_read_status(struct bnx2x_phy *phy, DP(NETIF_MSG_LINK, "10G-base-T PMA status 0x%x->0x%x\n", val2, val1); link_up = ((val1 & 4) == 4); - /* if link is up print the AN outcome of the SFX7101 PHY */ + /* If link is up print the AN outcome of the SFX7101 PHY */ if (link_up) { bnx2x_cl45_read(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_MASTER_STATUS, @@ -6945,11 +10831,16 @@ u8 bnx2x_7101_read_status(struct bnx2x_phy *phy, val2, (val2 & (1<<14))); bnx2x_ext_phy_10G_an_resolve(bp, phy, vars); bnx2x_ext_phy_resolve_fc(phy, params, vars); + + /* Read LP advertised speeds */ + if (val2 & (1<<11)) + vars->link_status |= + LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE; } return link_up; } -static u8 bnx2x_7101_format_ver(u32 spirom_ver, u8 *str, u16 *len) +static int bnx2x_7101_format_ver(u32 spirom_ver, u8 *str, u16 *len) { if (*len < 5) return -EINVAL; @@ -6987,15 +10878,14 @@ void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy) } } - static void bnx2x_7101_hw_reset(struct bnx2x_phy *phy, struct link_params *params) { /* Low power mode is controlled by GPIO 2 */ bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); + MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); /* The PHY reset is controlled by GPIO 1 */ bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, - MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); + MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); } static void bnx2x_7101_set_link_led(struct bnx2x_phy *phy, @@ -7022,41 +10912,40 @@ static void bnx2x_7101_set_link_led(struct bnx2x_phy *phy, } /******************************************************************/ -/* STATIC PHY DECLARATION */ +/* STATIC PHY DECLARATION */ /******************************************************************/ static struct bnx2x_phy phy_null = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN, .addr = 0, + .def_md_devad = 0, .flags = FLAGS_INIT_XGXS_FIRST, - /*.def_md_devad = */0, - .reserved = 0, .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, .supported = 0, .media_type = ETH_PHY_NOT_PRESENT, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)NULL, - .read_status = (read_status_t)NULL, - .link_reset = (link_reset_t)NULL, + .read_status = (read_status_t)NULL, + .link_reset = (link_reset_t)NULL, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)NULL, .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)NULL, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)NULL, + .phy_specific_func = (phy_specific_func_t)NULL }; + static struct bnx2x_phy phy_serdes = { .type = PORT_HW_CFG_SERDES_EXT_PHY_TYPE_DIRECT, .addr = 0xff, + .def_md_devad = 0, .flags = 0, - /*.def_md_devad = */0, - .reserved = 0, .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7070,28 +10959,28 @@ static struct bnx2x_phy phy_serdes = { SUPPORTED_Autoneg | SUPPORTED_Pause | SUPPORTED_Asym_Pause), - .media_type = ETH_PHY_UNSPECIFIED, + .media_type = ETH_PHY_BASE_T, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, - .config_init = (config_init_t)bnx2x_init_serdes, - .read_status = (read_status_t)bnx2x_link_settings_status, - .link_reset = (link_reset_t)bnx2x_int_link_reset, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, + .config_init = (config_init_t)bnx2x_xgxs_config_init, + .read_status = (read_status_t)bnx2x_link_settings_status, + .link_reset = (link_reset_t)bnx2x_int_link_reset, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)NULL, .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)NULL, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)NULL, + .phy_specific_func = (phy_specific_func_t)NULL }; + static struct bnx2x_phy phy_xgxs = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, .addr = 0xff, + .def_md_devad = 0, .flags = 0, - /*.def_md_devad = */0, - .reserved = 0, .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7106,61 +10995,66 @@ static struct bnx2x_phy phy_xgxs = { SUPPORTED_Autoneg | SUPPORTED_Pause | SUPPORTED_Asym_Pause), - .media_type = ETH_PHY_UNSPECIFIED, + .media_type = ETH_PHY_CX4, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, - .config_init = (config_init_t)bnx2x_init_xgxs, - .read_status = (read_status_t)bnx2x_link_settings_status, - .link_reset = (link_reset_t)bnx2x_int_link_reset, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, + .config_init = (config_init_t)bnx2x_xgxs_config_init, + .read_status = (read_status_t)bnx2x_link_settings_status, + .link_reset = (link_reset_t)bnx2x_int_link_reset, .config_loopback = (config_loopback_t)bnx2x_set_xgxs_loopback, .format_fw_ver = (format_fw_ver_t)NULL, .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)NULL, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)NULL, + .phy_specific_func = (phy_specific_func_t)NULL }; -static struct bnx2x_phy phy_xgxs_quad = { +static struct bnx2x_phy phy_warpcore = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, .addr = 0xff, - .flags = (FLAGS_4_PORT_MODE | - FLAGS_HW_LOCK_REQUIRED), - /*.def_md_devad = */0, - .reserved = 0, + .def_md_devad = 0, + .flags = (FLAGS_HW_LOCK_REQUIRED | + FLAGS_TX_ERROR_CHECK), .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, - .supported = (SUPPORTED_10baseT_Full | + .supported = (SUPPORTED_10baseT_Half | + SUPPORTED_10baseT_Full | + SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full | + SUPPORTED_10000baseT_Full | + SUPPORTED_20000baseKR2_Full | + SUPPORTED_20000baseMLD2_Full | SUPPORTED_FIBRE | SUPPORTED_Autoneg | SUPPORTED_Pause | SUPPORTED_Asym_Pause), .media_type = ETH_PHY_UNSPECIFIED, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, /* req_duplex = */0, /* rsrv = */0, - .config_init = (config_init_t)bnx2x_init_xgxs_quad, - .read_status = (read_status_t)bnx2x_xgxs_quad_read_status, - .link_reset = (link_reset_t)NULL, - .config_loopback = (config_loopback_t)bnx2x_set_xgxs_quad_loopback, + .config_init = (config_init_t)bnx2x_warpcore_config_init, + .read_status = (read_status_t)bnx2x_warpcore_read_status, + .link_reset = (link_reset_t)bnx2x_warpcore_link_reset, + .config_loopback = (config_loopback_t)bnx2x_set_warpcore_loopback, .format_fw_ver = (format_fw_ver_t)NULL, - .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)NULL, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .hw_reset = (hw_reset_t)bnx2x_warpcore_hw_reset, + .set_link_led = (set_link_led_t)NULL, + .phy_specific_func = (phy_specific_func_t)NULL }; + + static struct bnx2x_phy phy_7101 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101, .addr = 0xff, + .def_md_devad = 0, .flags = FLAGS_FAN_FAILURE_DET_REQ, - /*.def_md_devad = */0, - .reserved = 0, .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7171,26 +11065,25 @@ static struct bnx2x_phy phy_7101 = { SUPPORTED_Asym_Pause), .media_type = ETH_PHY_BASE_T, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_7101_config_init, - .read_status = (read_status_t)bnx2x_7101_read_status, - .link_reset = (link_reset_t)bnx2x_common_ext_link_reset, + .read_status = (read_status_t)bnx2x_7101_read_status, + .link_reset = (link_reset_t)bnx2x_common_ext_link_reset, .config_loopback = (config_loopback_t)bnx2x_7101_config_loopback, .format_fw_ver = (format_fw_ver_t)bnx2x_7101_format_ver, .hw_reset = (hw_reset_t)bnx2x_7101_hw_reset, - /*.set_link_led = */(set_link_led_t)bnx2x_7101_set_link_led, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)bnx2x_7101_set_link_led, + .phy_specific_func = (phy_specific_func_t)NULL }; static struct bnx2x_phy phy_8073 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073, .addr = 0xff, + .def_md_devad = 0, .flags = FLAGS_HW_LOCK_REQUIRED, - /*.def_md_devad = */0, - .reserved = 0, .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7201,28 +11094,27 @@ static struct bnx2x_phy phy_8073 = { SUPPORTED_Autoneg | SUPPORTED_Pause | SUPPORTED_Asym_Pause), - .media_type = ETH_PHY_UNSPECIFIED, + .media_type = ETH_PHY_KR, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_8073_config_init, - .read_status = (read_status_t)bnx2x_8073_read_status, - .link_reset = (link_reset_t)bnx2x_8073_link_reset, + .read_status = (read_status_t)bnx2x_8073_read_status, + .link_reset = (link_reset_t)bnx2x_8073_link_reset, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)bnx2x_format_ver, .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)NULL, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)NULL, + .phy_specific_func = (phy_specific_func_t)NULL }; static struct bnx2x_phy phy_8705 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705, .addr = 0xff, + .def_md_devad = 0, .flags = FLAGS_INIT_XGXS_FIRST, - /*.def_md_devad = */0, - .reserved = 0, .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7232,26 +11124,25 @@ static struct bnx2x_phy phy_8705 = { SUPPORTED_Asym_Pause), .media_type = ETH_PHY_XFP_FIBER, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_8705_config_init, - .read_status = (read_status_t)bnx2x_8705_read_status, - .link_reset = (link_reset_t)bnx2x_common_ext_link_reset, + .read_status = (read_status_t)bnx2x_8705_read_status, + .link_reset = (link_reset_t)bnx2x_common_ext_link_reset, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)bnx2x_null_format_ver, .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)NULL, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)NULL, + .phy_specific_func = (phy_specific_func_t)NULL }; static struct bnx2x_phy phy_8706 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706, .addr = 0xff, + .def_md_devad = 0, .flags = FLAGS_INIT_XGXS_FIRST, - /*.def_md_devad = */0, - .reserved = 0, .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7262,28 +11153,28 @@ static struct bnx2x_phy phy_8706 = { SUPPORTED_Asym_Pause), .media_type = ETH_PHY_SFP_FIBER, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_8706_config_init, - .read_status = (read_status_t)bnx2x_8706_read_status, - .link_reset = (link_reset_t)bnx2x_common_ext_link_reset, + .read_status = (read_status_t)bnx2x_8706_read_status, + .link_reset = (link_reset_t)bnx2x_common_ext_link_reset, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)bnx2x_format_ver, .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)NULL, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)NULL, + .phy_specific_func = (phy_specific_func_t)NULL }; static struct bnx2x_phy phy_8726 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726, .addr = 0xff, + .def_md_devad = 0, .flags = (FLAGS_HW_LOCK_REQUIRED | - FLAGS_INIT_XGXS_FIRST), - /*.def_md_devad = */0, - .reserved = 0, + FLAGS_INIT_XGXS_FIRST | + FLAGS_TX_ERROR_CHECK), .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7293,28 +11184,29 @@ static struct bnx2x_phy phy_8726 = { SUPPORTED_FIBRE | SUPPORTED_Pause | SUPPORTED_Asym_Pause), - .media_type = ETH_PHY_SFP_FIBER, + .media_type = ETH_PHY_NOT_PRESENT, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_8726_config_init, - .read_status = (read_status_t)bnx2x_8726_read_status, - .link_reset = (link_reset_t)bnx2x_8726_link_reset, + .read_status = (read_status_t)bnx2x_8726_read_status, + .link_reset = (link_reset_t)bnx2x_8726_link_reset, .config_loopback = (config_loopback_t)bnx2x_8726_config_loopback, .format_fw_ver = (format_fw_ver_t)bnx2x_format_ver, .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)NULL, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)NULL, + .phy_specific_func = (phy_specific_func_t)NULL }; + static struct bnx2x_phy phy_8727 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, .addr = 0xff, - .flags = FLAGS_FAN_FAILURE_DET_REQ, - /*.def_md_devad = */0, - .reserved = 0, + .def_md_devad = 0, + .flags = (FLAGS_FAN_FAILURE_DET_REQ | + FLAGS_TX_ERROR_CHECK), .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7323,29 +11215,28 @@ static struct bnx2x_phy phy_8727 = { SUPPORTED_FIBRE | SUPPORTED_Pause | SUPPORTED_Asym_Pause), - .media_type = ETH_PHY_SFP_FIBER, + .media_type = ETH_PHY_NOT_PRESENT, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_8727_config_init, - .read_status = (read_status_t)bnx2x_8727_read_status, - .link_reset = (link_reset_t)bnx2x_8727_link_reset, + .read_status = (read_status_t)bnx2x_8727_read_status, + .link_reset = (link_reset_t)bnx2x_8727_link_reset, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)bnx2x_format_ver, .hw_reset = (hw_reset_t)bnx2x_8727_hw_reset, - /*.set_link_led = */(set_link_led_t)bnx2x_8727_set_link_led, - /*.phy_specific_func = */(phy_specific_func_t)bnx2x_8727_specific_func + .set_link_led = (set_link_led_t)bnx2x_8727_set_link_led, + .phy_specific_func = (phy_specific_func_t)bnx2x_8727_specific_func }; static struct bnx2x_phy phy_8481 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481, .addr = 0xff, + .def_md_devad = 0, .flags = FLAGS_FAN_FAILURE_DET_REQ | - FLAGS_REARM_LATCH_SIGNAL, - /*.def_md_devad = */0, - .reserved = 0, + FLAGS_REARM_LATCH_SIGNAL, .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7361,28 +11252,28 @@ static struct bnx2x_phy phy_8481 = { SUPPORTED_Asym_Pause), .media_type = ETH_PHY_BASE_T, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_8481_config_init, - .read_status = (read_status_t)bnx2x_848xx_read_status, - .link_reset = (link_reset_t)bnx2x_8481_link_reset, + .read_status = (read_status_t)bnx2x_848xx_read_status, + .link_reset = (link_reset_t)bnx2x_8481_link_reset, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)bnx2x_848xx_format_ver, .hw_reset = (hw_reset_t)bnx2x_8481_hw_reset, - /*.set_link_led = */(set_link_led_t)bnx2x_848xx_set_link_led, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)bnx2x_848xx_set_link_led, + .phy_specific_func = (phy_specific_func_t)NULL }; static struct bnx2x_phy phy_84823 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823, .addr = 0xff, - .flags = FLAGS_FAN_FAILURE_DET_REQ | - FLAGS_REARM_LATCH_SIGNAL, - /*.def_md_devad = */0, - .reserved = 0, + .def_md_devad = 0, + .flags = (FLAGS_FAN_FAILURE_DET_REQ | + FLAGS_REARM_LATCH_SIGNAL | + FLAGS_TX_ERROR_CHECK), .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, @@ -7398,35 +11289,32 @@ static struct bnx2x_phy phy_84823 = { SUPPORTED_Asym_Pause), .media_type = ETH_PHY_BASE_T, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_848x3_config_init, - .read_status = (read_status_t)bnx2x_848xx_read_status, - .link_reset = (link_reset_t)bnx2x_848x3_link_reset, + .read_status = (read_status_t)bnx2x_848xx_read_status, + .link_reset = (link_reset_t)bnx2x_848x3_link_reset, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)bnx2x_848xx_format_ver, .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)bnx2x_848xx_set_link_led, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .set_link_led = (set_link_led_t)bnx2x_848xx_set_link_led, + .phy_specific_func = (phy_specific_func_t)NULL }; - static struct bnx2x_phy phy_84833 = { .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833, .addr = 0xff, - .flags = FLAGS_FAN_FAILURE_DET_REQ | - FLAGS_REARM_LATCH_SIGNAL, - /*.def_md_devad = */0, - .reserved = 0, + .def_md_devad = 0, + .flags = (FLAGS_FAN_FAILURE_DET_REQ | + FLAGS_REARM_LATCH_SIGNAL | + FLAGS_TX_ERROR_CHECK), .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, .mdio_ctrl = 0, - .supported = (SUPPORTED_10baseT_Half | - SUPPORTED_10baseT_Full | - SUPPORTED_100baseT_Half | + .supported = (SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full | SUPPORTED_10000baseT_Full | @@ -7436,21 +11324,54 @@ static struct bnx2x_phy phy_84833 = { SUPPORTED_Asym_Pause), .media_type = ETH_PHY_BASE_T, .ver_addr = 0, - /*.req_flow_ctrl = */0, - /*.req_line_speed = */0, - /*.speed_cap_mask = */0, - /* req_duplex = */0, - /* rsrv = */0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + .req_duplex = 0, + .rsrv = 0, .config_init = (config_init_t)bnx2x_848x3_config_init, - .read_status = (read_status_t)bnx2x_848xx_read_status, - .link_reset = (link_reset_t)bnx2x_848x3_link_reset, + .read_status = (read_status_t)bnx2x_848xx_read_status, + .link_reset = (link_reset_t)bnx2x_848x3_link_reset, .config_loopback = (config_loopback_t)NULL, .format_fw_ver = (format_fw_ver_t)bnx2x_848xx_format_ver, - .hw_reset = (hw_reset_t)NULL, - /*.set_link_led = */(set_link_led_t)bnx2x_848xx_set_link_led, - /*.phy_specific_func = */(phy_specific_func_t)NULL + .hw_reset = (hw_reset_t)bnx2x_84833_hw_reset_phy, + .set_link_led = (set_link_led_t)bnx2x_848xx_set_link_led, + .phy_specific_func = (phy_specific_func_t)NULL }; +static struct bnx2x_phy phy_54618se = { + .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE, + .addr = 0xff, + .def_md_devad = 0, + .flags = FLAGS_INIT_XGXS_FIRST, + .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, + .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, + .mdio_ctrl = 0, + .supported = (SUPPORTED_10baseT_Half | + SUPPORTED_10baseT_Full | + SUPPORTED_100baseT_Half | + SUPPORTED_100baseT_Full | + SUPPORTED_1000baseT_Full | + SUPPORTED_TP | + SUPPORTED_Autoneg | + SUPPORTED_Pause | + SUPPORTED_Asym_Pause), + .media_type = ETH_PHY_BASE_T, + .ver_addr = 0, + .req_flow_ctrl = 0, + .req_line_speed = 0, + .speed_cap_mask = 0, + /* req_duplex = */0, + /* rsrv = */0, + .config_init = (config_init_t)bnx2x_54618se_config_init, + .read_status = (read_status_t)bnx2x_54618se_read_status, + .link_reset = (link_reset_t)bnx2x_54618se_link_reset, + .config_loopback = (config_loopback_t)bnx2x_54618se_config_loopback, + .format_fw_ver = (format_fw_ver_t)NULL, + .hw_reset = (hw_reset_t)NULL, + .set_link_led = (set_link_led_t)bnx2x_5461x_set_link_led, + .phy_specific_func = (phy_specific_func_t)NULL +}; /*****************************************************************/ /* */ /* Populate the phy according. Main function: bnx2x_populate_phy */ @@ -7464,26 +11385,25 @@ static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base, /* Get the 4 lanes xgxs config rx and tx */ u32 rx = 0, tx = 0, i; for (i = 0; i < 2; i++) { - /** - * INT_PHY and EXT_PHY1 share the same value location in the - * shmem. When num_phys is greater than 1, than this value + /* INT_PHY and EXT_PHY1 share the same value location in + * the shmem. When num_phys is greater than 1, than this value * applies only to EXT_PHY1 */ if (phy_index == INT_PHY || phy_index == EXT_PHY1) { rx = REG_RD(bp, shmem_base + - offsetof(struct shmem_region, + offsetof(struct shmem_region, dev_info.port_hw_config[port].xgxs_config_rx[i<<1])); tx = REG_RD(bp, shmem_base + - offsetof(struct shmem_region, + offsetof(struct shmem_region, dev_info.port_hw_config[port].xgxs_config_tx[i<<1])); } else { rx = REG_RD(bp, shmem_base + - offsetof(struct shmem_region, + offsetof(struct shmem_region, dev_info.port_hw_config[port].xgxs_config2_rx[i<<1])); tx = REG_RD(bp, shmem_base + - offsetof(struct shmem_region, + offsetof(struct shmem_region, dev_info.port_hw_config[port].xgxs_config2_rx[i<<1])); } @@ -7517,8 +11437,8 @@ static u32 bnx2x_get_ext_phy_config(struct bnx2x *bp, u32 shmem_base, return ext_phy_config; } -static u8 bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port, - struct bnx2x_phy *phy) +static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port, + struct bnx2x_phy *phy) { u32 phy_addr; u32 chip_id; @@ -7526,27 +11446,109 @@ static u8 bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port, offsetof(struct shmem_region, dev_info.port_feature_config[port].link_config)) & PORT_FEATURE_CONNECTED_SWITCH_MASK); - chip_id = REG_RD(bp, MISC_REG_CHIP_NUM) << 16; - switch (switch_cfg) { - case SWITCH_CFG_1G: + chip_id = (REG_RD(bp, MISC_REG_CHIP_NUM) << 16) | + ((REG_RD(bp, MISC_REG_CHIP_REV) & 0xf) << 12); + + DP(NETIF_MSG_LINK, ":chip_id = 0x%x\n", chip_id); + if (USES_WARPCORE(bp)) { + u32 serdes_net_if; phy_addr = REG_RD(bp, - NIG_REG_SERDES0_CTRL_PHY_ADDR + - port * 0x10); - *phy = phy_serdes; - break; - case SWITCH_CFG_10G: - phy_addr = REG_RD(bp, - NIG_REG_XGXS0_CTRL_PHY_ADDR + - port * 0x18); - if (CHIP_IS_E2(bp) && - REG_RD(bp, MISC_REG_PORT4MODE_EN)) - *phy = phy_xgxs_quad; + MISC_REG_WC0_CTRL_PHY_ADDR); + *phy = phy_warpcore; + if (REG_RD(bp, MISC_REG_PORT4MODE_EN_OVWR) == 0x3) + phy->flags |= FLAGS_4_PORT_MODE; else + phy->flags &= ~FLAGS_4_PORT_MODE; + /* Check Dual mode */ + serdes_net_if = (REG_RD(bp, shmem_base + + offsetof(struct shmem_region, dev_info. + port_hw_config[port].default_cfg)) & + PORT_HW_CFG_NET_SERDES_IF_MASK); + /* Set the appropriate supported and flags indications per + * interface type of the chip + */ + switch (serdes_net_if) { + case PORT_HW_CFG_NET_SERDES_IF_SGMII: + phy->supported &= (SUPPORTED_10baseT_Half | + SUPPORTED_10baseT_Full | + SUPPORTED_100baseT_Half | + SUPPORTED_100baseT_Full | + SUPPORTED_1000baseT_Full | + SUPPORTED_FIBRE | + SUPPORTED_Autoneg | + SUPPORTED_Pause | + SUPPORTED_Asym_Pause); + phy->media_type = ETH_PHY_BASE_T; + break; + case PORT_HW_CFG_NET_SERDES_IF_XFI: + phy->media_type = ETH_PHY_XFP_FIBER; + break; + case PORT_HW_CFG_NET_SERDES_IF_SFI: + phy->supported &= (SUPPORTED_1000baseT_Full | + SUPPORTED_10000baseT_Full | + SUPPORTED_FIBRE | + SUPPORTED_Pause | + SUPPORTED_Asym_Pause); + phy->media_type = ETH_PHY_SFP_FIBER; + break; + case PORT_HW_CFG_NET_SERDES_IF_KR: + phy->media_type = ETH_PHY_KR; + phy->supported &= (SUPPORTED_1000baseT_Full | + SUPPORTED_10000baseT_Full | + SUPPORTED_FIBRE | + SUPPORTED_Autoneg | + SUPPORTED_Pause | + SUPPORTED_Asym_Pause); + break; + case PORT_HW_CFG_NET_SERDES_IF_DXGXS: + phy->media_type = ETH_PHY_KR; + phy->flags |= FLAGS_WC_DUAL_MODE; + phy->supported &= (SUPPORTED_20000baseMLD2_Full | + SUPPORTED_FIBRE | + SUPPORTED_Pause | + SUPPORTED_Asym_Pause); + break; + case PORT_HW_CFG_NET_SERDES_IF_KR2: + phy->media_type = ETH_PHY_KR; + phy->flags |= FLAGS_WC_DUAL_MODE; + phy->supported &= (SUPPORTED_20000baseKR2_Full | + SUPPORTED_FIBRE | + SUPPORTED_Pause | + SUPPORTED_Asym_Pause); + break; + default: + DP(NETIF_MSG_LINK, "Unknown WC interface type 0x%x\n", + serdes_net_if); + break; + } + + /* Enable MDC/MDIO work-around for E3 A0 since free running MDC + * was not set as expected. For B0, ECO will be enabled so there + * won't be an issue there + */ + if (CHIP_REV(bp) == CHIP_REV_Ax) + phy->flags |= FLAGS_MDC_MDIO_WA; + else + phy->flags |= FLAGS_MDC_MDIO_WA_B0; + } else + { + switch (switch_cfg) { + case SWITCH_CFG_1G: + phy_addr = REG_RD(bp, + NIG_REG_SERDES0_CTRL_PHY_ADDR + + port * 0x10); + *phy = phy_serdes; + break; + case SWITCH_CFG_10G: + phy_addr = REG_RD(bp, + NIG_REG_XGXS0_CTRL_PHY_ADDR + + port * 0x18); *phy = phy_xgxs; - break; - default: - DP(NETIF_MSG_LINK, "Invalid switch_cfg\n"); - return -EINVAL; + break; + default: + DP(NETIF_MSG_LINK, "Invalid switch_cfg\n"); + return -EINVAL; + } } phy->addr = (u8)phy_addr; phy->mdio_ctrl = bnx2x_get_emac_base(bp, @@ -7564,12 +11566,12 @@ static u8 bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port, return 0; } -static u8 bnx2x_populate_ext_phy(struct bnx2x *bp, - u8 phy_index, - u32 shmem_base, - u32 shmem2_base, - u8 port, - struct bnx2x_phy *phy) +static int bnx2x_populate_ext_phy(struct bnx2x *bp, + u8 phy_index, + u32 shmem_base, + u32 shmem2_base, + u8 port, + struct bnx2x_phy *phy) { u32 ext_phy_config, phy_type, config2; u32 mdc_mdio_access = SHARED_HW_CFG_MDC_MDIO_ACCESS1_BOTH; @@ -7598,6 +11600,7 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp, *phy = phy_8727; phy->flags |= FLAGS_NOC; break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722: case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727: mdc_mdio_access = SHARED_HW_CFG_MDC_MDIO_ACCESS1_EMAC1; *phy = phy_8727; @@ -7611,6 +11614,10 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp, case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833: *phy = phy_84833; break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54616: + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM54618SE: + *phy = phy_54618se; + break; case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101: *phy = phy_7101; break; @@ -7619,17 +11626,20 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp, return -EINVAL; default: *phy = phy_null; + /* In case external PHY wasn't found */ + if ((phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) && + (phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) + return -EINVAL; return 0; } phy->addr = XGXS_EXT_PHY_ADDR(ext_phy_config); bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index); - /** - * The shmem address of the phy version is located on different - * structures. In case this structure is too old, do not set - * the address - */ + /* The shmem address of the phy version is located on different + * structures. In case this structure is too old, do not set + * the address + */ config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region, dev_info.shared_hw_config.config2)); if (phy_index == EXT_PHY1) { @@ -7658,8 +11668,19 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp, } phy->mdio_ctrl = bnx2x_get_emac_base(bp, mdc_mdio_access, port); - /** - * In case mdc/mdio_access of the external phy is different than the + if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) && + (phy->ver_addr)) { + /* Remove 100Mb link supported for BCM84833 when phy fw + * version lower than or equal to 1.39 + */ + u32 raw_ver = REG_RD(bp, phy->ver_addr); + if (((raw_ver & 0x7F) <= 39) && + (((raw_ver & 0xF80) >> 7) <= 1)) + phy->supported &= ~(SUPPORTED_100baseT_Half | + SUPPORTED_100baseT_Full); + } + + /* In case mdc/mdio_access of the external phy is different than the * mdc/mdio access of the XGXS, a HW lock must be taken in each access * to prevent one port interfere with another port's CL45 operations. */ @@ -7672,10 +11693,10 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp, return 0; } -static u8 bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base, - u32 shmem2_base, u8 port, struct bnx2x_phy *phy) +static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base, + u32 shmem2_base, u8 port, struct bnx2x_phy *phy) { - u8 status = 0; + int status = 0; phy->type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN; if (phy_index == INT_PHY) return bnx2x_populate_int_phy(bp, shmem_base, port, phy); @@ -7683,6 +11704,7 @@ static u8 bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base, port, phy); return status; } + static void bnx2x_phy_def_cfg(struct link_params *params, struct bnx2x_phy *phy, u8 phy_index) @@ -7692,21 +11714,24 @@ static void bnx2x_phy_def_cfg(struct link_params *params, /* Populate the default phy configuration for MF mode */ if (phy_index == EXT_PHY2) { link_config = REG_RD(bp, params->shmem_base + - offsetof(struct shmem_region, dev_info. + offsetof(struct shmem_region, dev_info. port_feature_config[params->port].link_config2)); phy->speed_cap_mask = REG_RD(bp, params->shmem_base + - offsetof(struct shmem_region, dev_info. + offsetof(struct shmem_region, + dev_info. port_hw_config[params->port].speed_capability_mask2)); } else { link_config = REG_RD(bp, params->shmem_base + - offsetof(struct shmem_region, dev_info. + offsetof(struct shmem_region, dev_info. port_feature_config[params->port].link_config)); phy->speed_cap_mask = REG_RD(bp, params->shmem_base + - offsetof(struct shmem_region, dev_info. + offsetof(struct shmem_region, + dev_info. port_hw_config[params->port].speed_capability_mask)); } - DP(NETIF_MSG_LINK, "Default config phy idx %x cfg 0x%x speed_cap_mask" - " 0x%x\n", phy_index, link_config, phy->speed_cap_mask); + DP(NETIF_MSG_LINK, + "Default config phy idx %x cfg 0x%x speed_cap_mask 0x%x\n", + phy_index, link_config, phy->speed_cap_mask); phy->req_duplex = DUPLEX_FULL; switch (link_config & PORT_FEATURE_LINK_SPEED_MASK) { @@ -7767,17 +11792,17 @@ u32 bnx2x_phy_selection(struct link_params *params) if (phy_config_swapped) { switch (prio_cfg) { case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY: - return_cfg = PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY; - break; + return_cfg = PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY; + break; case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY: - return_cfg = PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY; - break; + return_cfg = PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY; + break; case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY: - return_cfg = PORT_HW_CFG_PHY_SELECTION_FIRST_PHY; - break; + return_cfg = PORT_HW_CFG_PHY_SELECTION_FIRST_PHY; + break; case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY: - return_cfg = PORT_HW_CFG_PHY_SELECTION_SECOND_PHY; - break; + return_cfg = PORT_HW_CFG_PHY_SELECTION_SECOND_PHY; + break; } } else return_cfg = prio_cfg; @@ -7786,20 +11811,21 @@ u32 bnx2x_phy_selection(struct link_params *params) } -u8 bnx2x_phy_probe(struct link_params *params) +int bnx2x_phy_probe(struct link_params *params) { - u8 phy_index, actual_phy_idx, link_cfg_idx; - u32 phy_config_swapped; + u8 phy_index, actual_phy_idx; + u32 phy_config_swapped, sync_offset, media_types; struct bnx2x *bp = params->bp; struct bnx2x_phy *phy; params->num_phys = 0; DP(NETIF_MSG_LINK, "Begin phy probe\n"); + if (CHIP_REV_IS_EMUL(bp)) + return 0; phy_config_swapped = params->multi_phy_config & PORT_HW_CFG_PHY_SWAPPED_ENABLED; for (phy_index = INT_PHY; phy_index < MAX_PHYS; phy_index++) { - link_cfg_idx = LINK_CONFIG_IDX(phy_index); actual_phy_idx = phy_index; if (phy_config_swapped) { if (phy_index == EXT_PHY1) @@ -7826,6 +11852,29 @@ u8 bnx2x_phy_probe(struct link_params *params) if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN) break; + if (params->feature_config_flags & + FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET) + phy->flags &= ~FLAGS_TX_ERROR_CHECK; + + sync_offset = params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[params->port].media_type); + media_types = REG_RD(bp, sync_offset); + + /* Update media type for non-PMF sync only for the first time + * In case the media type changes afterwards, it will be updated + * using the update_status function + */ + if ((media_types & (PORT_HW_CFG_MEDIA_TYPE_PHY0_MASK << + (PORT_HW_CFG_MEDIA_TYPE_PHY1_SHIFT * + actual_phy_idx))) == 0) { + media_types |= ((phy->media_type & + PORT_HW_CFG_MEDIA_TYPE_PHY0_MASK) << + (PORT_HW_CFG_MEDIA_TYPE_PHY1_SHIFT * + actual_phy_idx)); + } + REG_WR(bp, sync_offset, media_types); + bnx2x_phy_def_cfg(params, phy, phy_index); params->num_phys++; } @@ -7834,50 +11883,321 @@ u8 bnx2x_phy_probe(struct link_params *params) return 0; } -u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx) +static int bnx2x_init_e3_emul_mac(struct link_params *params, + struct link_vars *vars) { - if (phy_idx < params->num_phys) - return params->phy[phy_idx].supported; + struct bnx2x *bp = params->bp; + vars->line_speed = params->req_line_speed[0]; + /* In case link speed is auto, set speed the highest as possible */ + if (params->req_line_speed[0] == SPEED_AUTO_NEG) { + if (params->feature_config_flags & + FEATURE_CONFIG_EMUL_DISABLE_XMAC) + vars->line_speed = SPEED_2500; + else if (bnx2x_is_4_port_mode(bp)) + vars->line_speed = SPEED_10000; + else + vars->line_speed = SPEED_20000; + } + if (vars->line_speed < SPEED_10000) { + if ((params->feature_config_flags & + FEATURE_CONFIG_EMUL_DISABLE_UMAC)) { + DP(NETIF_MSG_LINK, "Invalid line speed %d while UMAC is" + " disabled!\n", params->req_line_speed[0]); + return -EINVAL; + } + switch (vars->line_speed) { + case SPEED_10: + vars->link_status = LINK_10TFD; + break; + case SPEED_100: + vars->link_status = LINK_100TXFD; + break; + case SPEED_1000: + vars->link_status = LINK_1000TFD; + break; + case SPEED_2500: + vars->link_status = LINK_2500TFD; + break; + default: + DP(NETIF_MSG_LINK, "Invalid line speed %d for UMAC\n", + vars->line_speed); + return -EINVAL; + } + vars->link_status |= LINK_STATUS_LINK_UP; + + if (params->loopback_mode == LOOPBACK_UMAC) + bnx2x_umac_enable(params, vars, 1); + else + bnx2x_umac_enable(params, vars, 0); + } else { + /* Link speed >= 10000 requires XMAC enabled */ + if (params->feature_config_flags & + FEATURE_CONFIG_EMUL_DISABLE_XMAC) { + DP(NETIF_MSG_LINK, "Invalid line speed %d while XMAC is" + " disabled!\n", params->req_line_speed[0]); + return -EINVAL; + } + /* Check link speed */ + switch (vars->line_speed) { + case SPEED_10000: + vars->link_status = LINK_10GTFD; + break; + case SPEED_20000: + vars->link_status = LINK_20GTFD; + break; + default: + DP(NETIF_MSG_LINK, "Invalid line speed %d for XMAC\n", + vars->line_speed); + return -EINVAL; + } + vars->link_status |= LINK_STATUS_LINK_UP; + if (params->loopback_mode == LOOPBACK_XMAC) + bnx2x_xmac_enable(params, vars, 1); + else + bnx2x_xmac_enable(params, vars, 0); + } + return 0; +} + +static int bnx2x_init_emul(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + if (CHIP_IS_E3(bp)) { + if (bnx2x_init_e3_emul_mac(params, vars) != + 0) + return -EINVAL; + } else { + if (params->feature_config_flags & + FEATURE_CONFIG_EMUL_DISABLE_BMAC) { + vars->line_speed = SPEED_1000; + vars->link_status = (LINK_STATUS_LINK_UP | + LINK_1000XFD); + if (params->loopback_mode == + LOOPBACK_EMAC) + bnx2x_emac_enable(params, vars, 1); + else + bnx2x_emac_enable(params, vars, 0); + } else { + vars->line_speed = SPEED_10000; + vars->link_status = (LINK_STATUS_LINK_UP | + LINK_10GTFD); + if (params->loopback_mode == + LOOPBACK_BMAC) + bnx2x_bmac_enable(params, vars, 1); + else + bnx2x_bmac_enable(params, vars, 0); + } + } + vars->link_up = 1; + vars->duplex = DUPLEX_FULL; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + + if (CHIP_IS_E1x(bp)) + bnx2x_pbf_update(params, vars->flow_ctrl, + vars->line_speed); + /* Disable drain */ + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); + + /* update shared memory */ + bnx2x_update_mng(params, vars->link_status); return 0; } -static void set_phy_vars(struct link_params *params) +static int bnx2x_init_fpga(struct link_params *params, + struct link_vars *vars) { + /* Enable on E1.5 FPGA */ struct bnx2x *bp = params->bp; - u8 actual_phy_idx, phy_index, link_cfg_idx; - u8 phy_config_swapped = params->multi_phy_config & - PORT_HW_CFG_PHY_SWAPPED_ENABLED; - for (phy_index = INT_PHY; phy_index < params->num_phys; - phy_index++) { - link_cfg_idx = LINK_CONFIG_IDX(phy_index); - actual_phy_idx = phy_index; - if (phy_config_swapped) { - if (phy_index == EXT_PHY1) - actual_phy_idx = EXT_PHY2; - else if (phy_index == EXT_PHY2) - actual_phy_idx = EXT_PHY1; - } - params->phy[actual_phy_idx].req_flow_ctrl = - params->req_flow_ctrl[link_cfg_idx]; - - params->phy[actual_phy_idx].req_line_speed = - params->req_line_speed[link_cfg_idx]; - - params->phy[actual_phy_idx].speed_cap_mask = - params->speed_cap_mask[link_cfg_idx]; - - params->phy[actual_phy_idx].req_duplex = - params->req_duplex[link_cfg_idx]; - - DP(NETIF_MSG_LINK, "req_flow_ctrl %x, req_line_speed %x," - " speed_cap_mask %x\n", - params->phy[actual_phy_idx].req_flow_ctrl, - params->phy[actual_phy_idx].req_line_speed, - params->phy[actual_phy_idx].speed_cap_mask); + vars->duplex = DUPLEX_FULL; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + if (!(CHIP_IS_E1(bp))) { + vars->flow_ctrl = (BNX2X_FLOW_CTRL_TX | + BNX2X_FLOW_CTRL_RX); + vars->link_status |= (LINK_STATUS_TX_FLOW_CONTROL_ENABLED | + LINK_STATUS_RX_FLOW_CONTROL_ENABLED); } + if (CHIP_IS_E3(bp)) { + vars->line_speed = params->req_line_speed[0]; + switch (vars->line_speed) { + case SPEED_AUTO_NEG: + vars->line_speed = SPEED_2500; + case SPEED_2500: + vars->link_status = LINK_2500TFD; + break; + case SPEED_1000: + vars->link_status = LINK_1000XFD; + break; + case SPEED_100: + vars->link_status = LINK_100TXFD; + break; + case SPEED_10: + vars->link_status = LINK_10TFD; + break; + default: + DP(NETIF_MSG_LINK, "Invalid link speed %d\n", + params->req_line_speed[0]); + return -EINVAL; + } + vars->link_status |= LINK_STATUS_LINK_UP; + if (params->loopback_mode == LOOPBACK_UMAC) + bnx2x_umac_enable(params, vars, 1); + else + bnx2x_umac_enable(params, vars, 0); + } else { + vars->line_speed = SPEED_10000; + vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD); + if (params->loopback_mode == LOOPBACK_EMAC) + bnx2x_emac_enable(params, vars, 1); + else + bnx2x_emac_enable(params, vars, 0); + } + vars->link_up = 1; + + if (CHIP_IS_E1x(bp)) + bnx2x_pbf_update(params, vars->flow_ctrl, + vars->line_speed); + /* Disable drain */ + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); + + /* Update shared memory */ + bnx2x_update_mng(params, vars->link_status); + return 0; } -u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars) +static void bnx2x_init_bmac_loopback(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + vars->link_up = 1; + vars->line_speed = SPEED_10000; + vars->duplex = DUPLEX_FULL; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + vars->mac_type = MAC_TYPE_BMAC; + + vars->phy_flags = PHY_XGXS_FLAG; + + bnx2x_xgxs_deassert(params); + + /* Set bmac loopback */ + bnx2x_bmac_enable(params, vars, 1); + + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); +} + +static void bnx2x_init_emac_loopback(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + vars->link_up = 1; + vars->line_speed = SPEED_1000; + vars->duplex = DUPLEX_FULL; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + vars->mac_type = MAC_TYPE_EMAC; + + vars->phy_flags = PHY_XGXS_FLAG; + + bnx2x_xgxs_deassert(params); + /* Set bmac loopback */ + bnx2x_emac_enable(params, vars, 1); + bnx2x_emac_program(params, vars); + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); +} + +static void bnx2x_init_xmac_loopback(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + vars->link_up = 1; + if (!params->req_line_speed[0]) + vars->line_speed = SPEED_10000; + else + vars->line_speed = params->req_line_speed[0]; + vars->duplex = DUPLEX_FULL; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + vars->mac_type = MAC_TYPE_XMAC; + vars->phy_flags = PHY_XGXS_FLAG; + /* Set WC to loopback mode since link is required to provide clock + * to the XMAC in 20G mode + */ + bnx2x_set_aer_mmd(params, ¶ms->phy[0]); + bnx2x_warpcore_reset_lane(bp, ¶ms->phy[0], 0); + params->phy[INT_PHY].config_loopback( + ¶ms->phy[INT_PHY], + params); + + bnx2x_xmac_enable(params, vars, 1); + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); +} + +static void bnx2x_init_umac_loopback(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + vars->link_up = 1; + vars->line_speed = SPEED_1000; + vars->duplex = DUPLEX_FULL; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + vars->mac_type = MAC_TYPE_UMAC; + vars->phy_flags = PHY_XGXS_FLAG; + bnx2x_umac_enable(params, vars, 1); + + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); +} + +static void bnx2x_init_xgxs_loopback(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + vars->link_up = 1; + vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; + vars->duplex = DUPLEX_FULL; + if (params->req_line_speed[0] == SPEED_1000) + vars->line_speed = SPEED_1000; + else + vars->line_speed = SPEED_10000; + + if (!USES_WARPCORE(bp)) + bnx2x_xgxs_deassert(params); + bnx2x_link_initialize(params, vars); + + if (params->req_line_speed[0] == SPEED_1000) { + if (USES_WARPCORE(bp)) + bnx2x_umac_enable(params, vars, 0); + else { + bnx2x_emac_program(params, vars); + bnx2x_emac_enable(params, vars, 0); + } + } else { + if (USES_WARPCORE(bp)) + bnx2x_xmac_enable(params, vars, 0); + else + bnx2x_bmac_enable(params, vars, 0); + } + + if (params->loopback_mode == LOOPBACK_XGXS) { + /* Set 10G XGXS loopback */ + params->phy[INT_PHY].config_loopback( + ¶ms->phy[INT_PHY], + params); + + } else { + /* Set external phy loopback */ + u8 phy_index; + for (phy_index = EXT_PHY1; + phy_index < params->num_phys; phy_index++) { + if (params->phy[phy_index].config_loopback) + params->phy[phy_index].config_loopback( + ¶ms->phy[phy_index], + params); + } + } + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); + + bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed); +} + +int bnx2x_phy_init(struct link_params *params, struct link_vars *vars) { struct bnx2x *bp = params->bp; DP(NETIF_MSG_LINK, "Phy Initialization started\n"); @@ -7894,7 +12214,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars) vars->mac_type = MAC_TYPE_NONE; vars->phy_flags = 0; - /* disable attentions */ + /* Disable attentions */ bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4, (NIG_MASK_XGXS0_LINK_STATUS | NIG_MASK_XGXS0_LINK10G | @@ -7902,189 +12222,65 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars) NIG_MASK_MI_INT)); if (!(params->feature_config_flags & FEATURE_CONFIG_EMUL_DISABLE_EMAC)) - bnx2x_emac_init(params, vars); + bnx2x_emac_init(params, vars); - if (params->num_phys == 0) { + if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) + vars->link_status |= LINK_STATUS_PFC_ENABLED; + + if ((params->num_phys == 0) && + !CHIP_REV_IS_SLOW(bp)) { DP(NETIF_MSG_LINK, "No phy found for initialization !!\n"); return -EINVAL; } - set_phy_vars(params); + set_phy_vars(params, vars); DP(NETIF_MSG_LINK, "Num of phys on board: %d\n", params->num_phys); if (CHIP_REV_IS_FPGA(bp)) { - - vars->link_up = 1; - vars->line_speed = SPEED_10000; - vars->duplex = DUPLEX_FULL; - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD); - /* enable on E1.5 FPGA */ - if (!(CHIP_IS_E1(bp))) { - vars->flow_ctrl = - (BNX2X_FLOW_CTRL_TX | - BNX2X_FLOW_CTRL_RX); - vars->link_status |= - (LINK_STATUS_TX_FLOW_CONTROL_ENABLED | - LINK_STATUS_RX_FLOW_CONTROL_ENABLED); - } - if (params->loopback_mode == LOOPBACK_EMAC) - bnx2x_emac_enable(params, vars, 1); - else - bnx2x_emac_enable(params, vars, 0); - if (!(CHIP_IS_E2(bp))) - bnx2x_pbf_update(params, vars->flow_ctrl, - vars->line_speed); - /* disable drain */ - REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, - 0); - - /* update shared memory */ - bnx2x_update_mng(params, vars->link_status); - - return 0; - + return bnx2x_init_fpga(params, vars); } else if (CHIP_REV_IS_EMUL(bp)) { - u32 val; - vars->link_up = 1; - vars->duplex = DUPLEX_FULL; - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - /* On emulation check if emac or bmac available */ - val = REG_RD(bp, (BP_PATH(bp) ? - MISC_REG_GENERIC_CR_1 : - MISC_REG_GENERIC_CR_0)); - DP(NETIF_MSG_LINK, "MISC_REG_GENERIC_CR_0 is %x\n", val); - - if (params->feature_config_flags & - FEATURE_CONFIG_EMUL_DISABLE_BMAC) { - vars->line_speed = SPEED_1000; - vars->link_status = (LINK_STATUS_LINK_UP | - LINK_1000XFD); - if (params->loopback_mode == LOOPBACK_EMAC) - bnx2x_emac_enable(params, vars, 1); - else - bnx2x_emac_enable(params, vars, 0); - } else { - vars->line_speed = SPEED_10000; - vars->link_status = (LINK_STATUS_LINK_UP | - LINK_10GTFD); - if (params->loopback_mode == LOOPBACK_BMAC) - bnx2x_bmac_enable(params, vars, 1); - else - bnx2x_bmac_enable(params, vars, 0); - } - if (!(CHIP_IS_E2(bp))) - bnx2x_pbf_update(params, vars->flow_ctrl, - vars->line_speed); - /* Disable drain */ - REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE - + params->port*4, 0); - - /* update shared memory */ - bnx2x_update_mng(params, vars->link_status); - - return 0; - + return bnx2x_init_emul(params, vars); } else - if (params->loopback_mode == LOOPBACK_BMAC) { - - vars->link_up = 1; - vars->line_speed = SPEED_10000; - vars->duplex = DUPLEX_FULL; - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - vars->mac_type = MAC_TYPE_BMAC; - - vars->phy_flags = PHY_XGXS_FLAG; - - bnx2x_xgxs_deassert(params); - - /* set bmac loopback */ - bnx2x_bmac_enable(params, vars, 1); - - REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + - params->port*4, 0); - - } else if (params->loopback_mode == LOOPBACK_EMAC) { - - vars->link_up = 1; - vars->line_speed = SPEED_1000; - vars->duplex = DUPLEX_FULL; - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - vars->mac_type = MAC_TYPE_EMAC; - - vars->phy_flags = PHY_XGXS_FLAG; - - bnx2x_xgxs_deassert(params); - /* set bmac loopback */ - bnx2x_emac_enable(params, vars, 1); - bnx2x_emac_program(params, vars); - REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + - params->port*4, 0); - - } else if ((params->loopback_mode == LOOPBACK_XGXS) || - (params->loopback_mode == LOOPBACK_EXT_PHY)) { - vars->link_up = 1; - vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; - vars->duplex = DUPLEX_FULL; - if (params->req_line_speed[0] == SPEED_1000) { - vars->line_speed = SPEED_1000; - vars->mac_type = MAC_TYPE_EMAC; - } else { - vars->line_speed = SPEED_10000; - vars->mac_type = MAC_TYPE_BMAC; + switch (params->loopback_mode) { + case LOOPBACK_BMAC: + bnx2x_init_bmac_loopback(params, vars); + break; + case LOOPBACK_EMAC: + bnx2x_init_emac_loopback(params, vars); + break; + case LOOPBACK_XMAC: + bnx2x_init_xmac_loopback(params, vars); + break; + case LOOPBACK_UMAC: + bnx2x_init_umac_loopback(params, vars); + break; + case LOOPBACK_XGXS: + case LOOPBACK_EXT_PHY: + bnx2x_init_xgxs_loopback(params, vars); + break; + default: + if (!CHIP_IS_E3(bp)) { + if (params->switch_cfg == SWITCH_CFG_10G) + bnx2x_xgxs_deassert(params); + else + bnx2x_serdes_deassert(bp, params->port); } - - bnx2x_xgxs_deassert(params); - bnx2x_link_initialize(params, vars); - - if (params->req_line_speed[0] == SPEED_1000) { - bnx2x_emac_program(params, vars); - bnx2x_emac_enable(params, vars, 0); - } else - bnx2x_bmac_enable(params, vars, 0); - if (params->loopback_mode == LOOPBACK_XGXS) { - /* set 10G XGXS loopback */ - params->phy[INT_PHY].config_loopback( - ¶ms->phy[INT_PHY], - params); - - } else { - /* set external phy loopback */ - u8 phy_index; - for (phy_index = EXT_PHY1; - phy_index < params->num_phys; phy_index++) { - if (params->phy[phy_index].config_loopback) - params->phy[phy_index].config_loopback( - ¶ms->phy[phy_index], - params); - } - } - REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + - params->port*4, 0); - - bnx2x_set_led(params, vars, - LED_MODE_OPER, vars->line_speed); - } else - /* No loopback */ - { - if (params->switch_cfg == SWITCH_CFG_10G) - bnx2x_xgxs_deassert(params); - else - bnx2x_serdes_deassert(bp, params->port); bnx2x_link_initialize(params, vars); msleep(30); bnx2x_link_int_enable(params); + break; } + bnx2x_update_mng(params, vars->link_status); return 0; } -u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars, - u8 reset_ext_phy) +int bnx2x_link_reset(struct link_params *params, struct link_vars *vars, + u8 reset_ext_phy) { struct bnx2x *bp = params->bp; u8 phy_index, port = params->port, clear_latch_ind = 0; DP(NETIF_MSG_LINK, "Resetting the link of port %d\n", port); - /* disable attentions */ + /* Disable attentions */ vars->link_status = 0; bnx2x_update_mng(params, vars->link_status); bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, @@ -8093,36 +12289,50 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars, NIG_MASK_SERDES0_LINK_STATUS | NIG_MASK_MI_INT)); - /* activate nig drain */ + /* Activate nig drain */ REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 1); - /* disable nig egress interface */ - REG_WR(bp, NIG_REG_BMAC0_OUT_EN + port*4, 0); - REG_WR(bp, NIG_REG_EGRESS_EMAC0_OUT_EN + port*4, 0); + /* Disable nig egress interface */ + if (!CHIP_IS_E3(bp)) { + REG_WR(bp, NIG_REG_BMAC0_OUT_EN + port*4, 0); + REG_WR(bp, NIG_REG_EGRESS_EMAC0_OUT_EN + port*4, 0); + } /* Stop BigMac rx */ if (!(params->feature_config_flags & FEATURE_CONFIG_EMUL_DISABLE_BMAC)) - bnx2x_bmac_rx_disable(bp, params->chip_id, port); - - - /* disable emac */ - REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0); + if (!CHIP_IS_E3(bp)) + bnx2x_bmac_rx_disable(bp, params->chip_id, port); + /* Stop XMAC/UMAC rx */ + if (!(params->feature_config_flags & + FEATURE_CONFIG_EMUL_DISABLE_XMAC)) + if (CHIP_IS_E3(bp) && + !CHIP_REV_IS_FPGA(bp)) { + bnx2x_xmac_disable(params); + bnx2x_umac_disable(params); + } + /* Disable emac */ + if (!CHIP_IS_E3(bp)) + REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0); msleep(10); - /* The PHY reset is controled by GPIO 1 + /* The PHY reset is controlled by GPIO 1 * Hold it as vars low */ - /* clear link led */ + /* Clear link led */ + bnx2x_set_mdio_clk(bp, params->chip_id, port); bnx2x_set_led(params, vars, LED_MODE_OFF, 0); - if (reset_ext_phy) { + if (reset_ext_phy && (!CHIP_REV_IS_SLOW(bp))) { for (phy_index = EXT_PHY1; phy_index < params->num_phys; phy_index++) { - if (params->phy[phy_index].link_reset) + if (params->phy[phy_index].link_reset) { + bnx2x_set_aer_mmd(params, + ¶ms->phy[phy_index]); params->phy[phy_index].link_reset( ¶ms->phy[phy_index], params); + } if (params->phy[phy_index].flags & FLAGS_REARM_LATCH_SIGNAL) clear_latch_ind = 1; @@ -8135,48 +12345,61 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars, bnx2x_bits_dis(bp, NIG_REG_LATCH_BC_0 + port*4, 1 << NIG_LATCH_BC_ENABLE_MI_INT); } - if (params->phy[INT_PHY].link_reset) - params->phy[INT_PHY].link_reset( - ¶ms->phy[INT_PHY], params); - /* reset BigMac */ - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, - (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); + if (!CHIP_REV_IS_SLOW(bp)) + if (params->phy[INT_PHY].link_reset) + params->phy[INT_PHY].link_reset( + ¶ms->phy[INT_PHY], params); - /* disable nig ingress interface */ - REG_WR(bp, NIG_REG_BMAC0_IN_EN + port*4, 0); - REG_WR(bp, NIG_REG_EMAC0_IN_EN + port*4, 0); - REG_WR(bp, NIG_REG_BMAC0_OUT_EN + port*4, 0); - REG_WR(bp, NIG_REG_EGRESS_EMAC0_OUT_EN + port*4, 0); + /* Disable nig ingress interface */ + if (!CHIP_IS_E3(bp)) { + /* Reset BigMac */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, + (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); + REG_WR(bp, NIG_REG_BMAC0_IN_EN + port*4, 0); + REG_WR(bp, NIG_REG_EMAC0_IN_EN + port*4, 0); + } else { + u32 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; + bnx2x_set_xumac_nig(params, 0, 0); + if (REG_RD(bp, MISC_REG_RESET_REG_2) & + MISC_REGISTERS_RESET_REG_2_XMAC) + REG_WR(bp, xmac_base + XMAC_REG_CTRL, + XMAC_CTRL_REG_SOFT_RESET); + } vars->link_up = 0; + vars->phy_flags = 0; return 0; } + /****************************************************************************/ -/* Common function */ +/* Common function */ /****************************************************************************/ -static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, - u32 shmem_base_path[], - u32 shmem2_base_path[], u8 phy_index, - u32 chip_id) +static int bnx2x_8073_common_init_phy(struct bnx2x *bp, + u32 shmem_base_path[], + u32 shmem2_base_path[], u8 phy_index, + u32 chip_id) { struct bnx2x_phy phy[PORT_MAX]; struct bnx2x_phy *phy_blk[PORT_MAX]; u16 val; - s8 port; + s8 port = 0; s8 port_of_path = 0; - - bnx2x_ext_phy_hw_reset(bp, 0); + u32 swap_val, swap_override; + swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); + swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); + port ^= (swap_val && swap_override); + bnx2x_ext_phy_hw_reset(bp, port); /* PART1 - Reset both phys */ for (port = PORT_MAX - 1; port >= PORT_0; port--) { u32 shmem_base, shmem2_base; /* In E2, same phy is using for port0 of the two paths */ - if (CHIP_IS_E2(bp)) { - shmem_base = shmem_base_path[port]; - shmem2_base = shmem2_base_path[port]; - port_of_path = 0; - } else { + if (CHIP_IS_E1x(bp)) { shmem_base = shmem_base_path[0]; shmem2_base = shmem2_base_path[0]; port_of_path = port; + } else { + shmem_base = shmem_base_path[port]; + shmem2_base = shmem2_base_path[port]; + port_of_path = 0; } /* Extract the ext phy address for the port */ @@ -8186,7 +12409,7 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, DP(NETIF_MSG_LINK, "populate_phy failed\n"); return -EINVAL; } - /* disable attentions */ + /* Disable attentions */ bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port_of_path*4, (NIG_MASK_XGXS0_LINK_STATUS | @@ -8195,10 +12418,11 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, NIG_MASK_MI_INT)); /* Need to take the phy out of low power mode in order - to write to access its registers */ + * to write to access its registers + */ bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_HIGH, - port); + MISC_REGISTERS_GPIO_OUTPUT_HIGH, + port); /* Reset the phy */ bnx2x_cl45_write(bp, &phy[port], @@ -8209,7 +12433,8 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, /* Add delay of 150ms after reset */ msleep(150); - if (phy[PORT_0].addr & 0x1) { + + if (phy[PORT_0].addr & 0x1) { phy_blk[PORT_0] = &(phy[PORT_1]); phy_blk[PORT_1] = &(phy[PORT_0]); } else { @@ -8219,17 +12444,15 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, /* PART2 - Download firmware to both phys */ for (port = PORT_MAX - 1; port >= PORT_0; port--) { - - if (CHIP_IS_E2(bp)) - port_of_path = 0; - else + if (CHIP_IS_E1x(bp)) port_of_path = port; + else + port_of_path = 0; DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n", phy_blk[port]->addr); if (bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port], - port_of_path)) - + port_of_path)) return -EINVAL; /* Only set bit 10 = 1 (Tx power down) */ @@ -8244,8 +12467,7 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, (val | 1<<10)); } - /** - * Toggle Transmitter: Power down and then up with 600ms delay + /* Toggle Transmitter: Power down and then up with 600ms delay * between */ msleep(600); @@ -8259,9 +12481,8 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, MDIO_PMA_REG_TX_POWER_DOWN, &val); bnx2x_cl45_write(bp, phy_blk[port], - MDIO_PMA_DEVAD, - MDIO_PMA_REG_TX_POWER_DOWN, - (val & (~(1<<10)))); + MDIO_PMA_DEVAD, + MDIO_PMA_REG_TX_POWER_DOWN, (val & (~(1<<10)))); msleep(15); /* Read modify write the SPI-ROM version select register */ @@ -8274,15 +12495,14 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, /* set GPIO2 back to LOW */ bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, - MISC_REGISTERS_GPIO_OUTPUT_LOW, - port); + MISC_REGISTERS_GPIO_OUTPUT_LOW, port); } return 0; } -static u8 bnx2x_8726_common_init_phy(struct bnx2x *bp, - u32 shmem_base_path[], - u32 shmem2_base_path[], u8 phy_index, - u32 chip_id) +static int bnx2x_8726_common_init_phy(struct bnx2x *bp, + u32 shmem_base_path[], + u32 shmem2_base_path[], u8 phy_index, + u32 chip_id) { u32 val; s8 port; @@ -8300,12 +12520,12 @@ static u8 bnx2x_8726_common_init_phy(struct bnx2x *bp, u32 shmem_base, shmem2_base; /* In E2, same phy is using for port0 of the two paths */ - if (CHIP_IS_E2(bp)) { - shmem_base = shmem_base_path[port]; - shmem2_base = shmem2_base_path[port]; - } else { + if (CHIP_IS_E1x(bp)) { shmem_base = shmem_base_path[0]; shmem2_base = shmem2_base_path[0]; + } else { + shmem_base = shmem_base_path[port]; + shmem2_base = shmem2_base_path[port]; } /* Extract the ext phy address for the port */ if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base, @@ -8319,10 +12539,11 @@ static u8 bnx2x_8726_common_init_phy(struct bnx2x *bp, bnx2x_cl45_write(bp, &phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, 0x0001); + /* Set fault module detected LED on */ bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, - MISC_REGISTERS_GPIO_HIGH, - port); + MISC_REGISTERS_GPIO_HIGH, + port); } return 0; @@ -8372,24 +12593,24 @@ static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base, break; } } -static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp, - u32 shmem_base_path[], - u32 shmem2_base_path[], u8 phy_index, - u32 chip_id) + +static int bnx2x_8727_common_init_phy(struct bnx2x *bp, + u32 shmem_base_path[], + u32 shmem2_base_path[], u8 phy_index, + u32 chip_id) { s8 port, reset_gpio; u32 swap_val, swap_override; struct bnx2x_phy phy[PORT_MAX]; struct bnx2x_phy *phy_blk[PORT_MAX]; s8 port_of_path; - swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); - swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); + swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); + swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); reset_gpio = MISC_REGISTERS_GPIO_1; port = 1; - /** - * Retrieve the reset gpio/port which control the reset. + /* Retrieve the reset gpio/port which control the reset. * Default is GPIO1, PORT1 */ bnx2x_get_ext_phy_reset_gpio(bp, shmem_base_path[0], @@ -8400,10 +12621,10 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp, /* Initiate PHY reset*/ bnx2x_set_gpio(bp, reset_gpio, MISC_REGISTERS_GPIO_OUTPUT_LOW, - port); + port); msleep(1); bnx2x_set_gpio(bp, reset_gpio, MISC_REGISTERS_GPIO_OUTPUT_HIGH, - port); + port); msleep(5); @@ -8412,14 +12633,14 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp, u32 shmem_base, shmem2_base; /* In E2, same phy is using for port0 of the two paths */ - if (CHIP_IS_E2(bp)) { - shmem_base = shmem_base_path[port]; - shmem2_base = shmem2_base_path[port]; - port_of_path = 0; - } else { + if (CHIP_IS_E1x(bp)) { shmem_base = shmem_base_path[0]; shmem2_base = shmem2_base_path[0]; port_of_path = port; + } else { + shmem_base = shmem_base_path[port]; + shmem2_base = shmem2_base_path[port]; + port_of_path = 0; } /* Extract the ext phy address for the port */ @@ -8437,6 +12658,7 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp, NIG_MASK_SERDES0_LINK_STATUS | NIG_MASK_MI_INT)); + /* Reset the phy */ bnx2x_cl45_write(bp, &phy[port], MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); @@ -8453,25 +12675,101 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp, } /* PART2 - Download firmware to both phys */ for (port = PORT_MAX - 1; port >= PORT_0; port--) { - if (CHIP_IS_E2(bp)) - port_of_path = 0; - else + if (CHIP_IS_E1x(bp)) port_of_path = port; + else + port_of_path = 0; DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n", phy_blk[port]->addr); if (bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port], - port_of_path)) + port_of_path)) return -EINVAL; + /* Disable PHY transmitter output */ + bnx2x_cl45_write(bp, phy_blk[port], + MDIO_PMA_DEVAD, + MDIO_PMA_REG_TX_DISABLE, 1); } return 0; } -static u8 bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[], - u32 shmem2_base_path[], u8 phy_index, - u32 ext_phy_type, u32 chip_id) +static int bnx2x_84833_common_init_phy(struct bnx2x *bp, + u32 shmem_base_path[], + u32 shmem2_base_path[], + u8 phy_index, + u32 chip_id) { - u8 rc = 0; + u8 reset_gpios; + reset_gpios = bnx2x_84833_get_reset_gpios(bp, shmem_base_path, chip_id); + bnx2x_set_mult_gpio(bp, reset_gpios, MISC_REGISTERS_GPIO_OUTPUT_LOW); + udelay(10); + bnx2x_set_mult_gpio(bp, reset_gpios, MISC_REGISTERS_GPIO_OUTPUT_HIGH); + DP(NETIF_MSG_LINK, "84833 reset pulse on pin values 0x%x\n", + reset_gpios); + return 0; +} + +static int bnx2x_84833_pre_init_phy(struct bnx2x *bp, + struct bnx2x_phy *phy) +{ + u16 val, cnt; + /* Wait for FW completing its initialization. */ + for (cnt = 0; cnt < 1500; cnt++) { + bnx2x_cl45_read(bp, phy, + MDIO_PMA_DEVAD, + MDIO_PMA_REG_CTRL, &val); + if (!(val & (1<<15))) + break; + msleep(1); + } + if (cnt >= 1500) { + DP(NETIF_MSG_LINK, "84833 reset timeout\n"); + return -EINVAL; + } + + /* Put the port in super isolate mode. */ + bnx2x_cl45_read(bp, phy, + MDIO_CTL_DEVAD, + MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val); + val |= MDIO_84833_SUPER_ISOLATE; + bnx2x_cl45_write(bp, phy, + MDIO_CTL_DEVAD, + MDIO_84833_TOP_CFG_XGPHY_STRAP1, val); + + /* Save spirom version */ + bnx2x_save_848xx_spirom_version(phy, bp, PORT_0); + return 0; +} + +int bnx2x_pre_init_phy(struct bnx2x *bp, + u32 shmem_base, + u32 shmem2_base, + u32 chip_id) +{ + int rc = 0; + struct bnx2x_phy phy; + bnx2x_set_mdio_clk(bp, chip_id, PORT_0); + if (bnx2x_populate_phy(bp, EXT_PHY1, shmem_base, shmem2_base, + PORT_0, &phy) != + 0) { + DP(NETIF_MSG_LINK, "populate_phy failed\n"); + return -EINVAL; + } + switch (phy.type) { + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833: + rc = bnx2x_84833_pre_init_phy(bp, &phy); + break; + default: + break; + } + return rc; +} + +static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[], + u32 shmem2_base_path[], u8 phy_index, + u32 ext_phy_type, u32 chip_id) +{ + int rc = 0; switch (ext_phy_type) { case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073: @@ -8479,21 +12777,30 @@ static u8 bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[], shmem2_base_path, phy_index, chip_id); break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722: case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727: case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727_NOC: rc = bnx2x_8727_common_init_phy(bp, shmem_base_path, shmem2_base_path, phy_index, chip_id); break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726: - /** - * GPIO1 affects both ports, so there's need to pull + /* GPIO1 affects both ports, so there's need to pull * it for single port alone */ rc = bnx2x_8726_common_init_phy(bp, shmem_base_path, shmem2_base_path, phy_index, chip_id); break; + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833: + /* GPIO3's are linked, and so both need to be toggled + * to obtain required 2us pulse. + */ + rc = bnx2x_84833_common_init_phy(bp, shmem_base_path, + shmem2_base_path, + phy_index, chip_id); + break; case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE: rc = -EINVAL; break; @@ -8504,21 +12811,32 @@ static u8 bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[], break; } + if (rc != 0) + netdev_err(bp->dev, "Warning: PHY was not initialized," + " Port %d\n", + 0); return rc; } -u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[], - u32 shmem2_base_path[], u32 chip_id) +int bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[], + u32 shmem2_base_path[], u32 chip_id, + u8 one_port_enabled) { - u8 rc = 0; - u32 phy_ver; - u8 phy_index; + int rc = 0; + u32 phy_ver, val; + u8 phy_index = 0; u32 ext_phy_type, ext_phy_config; - DP(NETIF_MSG_LINK, "Begin common phy init\n"); - - if (CHIP_REV_IS_EMUL(bp)) + if (CHIP_REV_IS_EMUL(bp) || CHIP_REV_IS_FPGA(bp)) return 0; + bnx2x_set_mdio_clk(bp, chip_id, PORT_0); + bnx2x_set_mdio_clk(bp, chip_id, PORT_1); + DP(NETIF_MSG_LINK, "Begin common phy init\n"); + if (CHIP_IS_E3(bp)) { + /* Enable EPIO */ + val = REG_RD(bp, MISC_REG_GEN_PURP_HWG); + REG_WR(bp, MISC_REG_GEN_PURP_HWG, val | 1); + } /* Check if common init was already done */ phy_ver = REG_RD(bp, shmem_base_path[0] + offsetof(struct shmem_region, @@ -8544,6 +12862,180 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[], return rc; } +static void bnx2x_check_over_curr(struct link_params *params, + struct link_vars *vars) +{ + struct bnx2x *bp = params->bp; + u32 cfg_pin; + u8 port = params->port; + u32 pin_val; + + cfg_pin = (REG_RD(bp, params->shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].e3_cmn_pin_cfg1)) & + PORT_HW_CFG_E3_OVER_CURRENT_MASK) >> + PORT_HW_CFG_E3_OVER_CURRENT_SHIFT; + + /* Ignore check if no external input PIN available */ + if (bnx2x_get_cfg_pin(bp, cfg_pin, &pin_val) != 0) + return; + + if (!pin_val) { + if ((vars->phy_flags & PHY_OVER_CURRENT_FLAG) == 0) { + netdev_err(bp->dev, "Error: Power fault on Port %d has" + " been detected and the power to " + "that SFP+ module has been removed" + " to prevent failure of the card." + " Please remove the SFP+ module and" + " restart the system to clear this" + " error.\n", + params->port); + vars->phy_flags |= PHY_OVER_CURRENT_FLAG; + } + } else + vars->phy_flags &= ~PHY_OVER_CURRENT_FLAG; +} + +static void bnx2x_analyze_link_error(struct link_params *params, + struct link_vars *vars, u32 lss_status, + u8 notify) +{ + struct bnx2x *bp = params->bp; + /* Compare new value with previous value */ + u8 led_mode; + u32 half_open_conn = (vars->phy_flags & PHY_HALF_OPEN_CONN_FLAG) > 0; + + if ((lss_status ^ half_open_conn) == 0) + return; + + /* If values differ */ + DP(NETIF_MSG_LINK, "Link changed:%x %x->%x\n", vars->link_up, + half_open_conn, lss_status); + + /* a. Update shmem->link_status accordingly + * b. Update link_vars->link_up + */ + if (lss_status) { + DP(NETIF_MSG_LINK, "Remote Fault detected !!!\n"); + vars->link_status &= ~LINK_STATUS_LINK_UP; + vars->link_up = 0; + vars->phy_flags |= PHY_HALF_OPEN_CONN_FLAG; + + /* activate nig drain */ + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1); + /* Set LED mode to off since the PHY doesn't know about these + * errors + */ + led_mode = LED_MODE_OFF; + } else { + DP(NETIF_MSG_LINK, "Remote Fault cleared\n"); + vars->link_status |= LINK_STATUS_LINK_UP; + vars->link_up = 1; + vars->phy_flags &= ~PHY_HALF_OPEN_CONN_FLAG; + led_mode = LED_MODE_OPER; + + /* Clear nig drain */ + REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); + } + bnx2x_sync_link(params, vars); + /* Update the LED according to the link state */ + bnx2x_set_led(params, vars, led_mode, SPEED_10000); + + /* Update link status in the shared memory */ + bnx2x_update_mng(params, vars->link_status); + + /* C. Trigger General Attention */ + vars->periodic_flags |= PERIODIC_FLAGS_LINK_EVENT; + if (notify) + bnx2x_notify_link_changed(bp); +} + +/****************************************************************************** +* Description: +* This function checks for half opened connection change indication. +* When such change occurs, it calls the bnx2x_analyze_link_error +* to check if Remote Fault is set or cleared. Reception of remote fault +* status message in the MAC indicates that the peer's MAC has detected +* a fault, for example, due to break in the TX side of fiber. +* +******************************************************************************/ +int bnx2x_check_half_open_conn(struct link_params *params, + struct link_vars *vars, + u8 notify) +{ + struct bnx2x *bp = params->bp; + u32 lss_status = 0; + u32 mac_base; + /* In case link status is physically up @ 10G do */ + if (((vars->phy_flags & PHY_PHYSICAL_LINK_FLAG) == 0) || + (REG_RD(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4))) + return 0; + + if (CHIP_IS_E3(bp) && + (REG_RD(bp, MISC_REG_RESET_REG_2) & + (MISC_REGISTERS_RESET_REG_2_XMAC))) { + /* Check E3 XMAC */ + /* Note that link speed cannot be queried here, since it may be + * zero while link is down. In case UMAC is active, LSS will + * simply not be set + */ + mac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; + + /* Clear stick bits (Requires rising edge) */ + REG_WR(bp, mac_base + XMAC_REG_CLEAR_RX_LSS_STATUS, 0); + REG_WR(bp, mac_base + XMAC_REG_CLEAR_RX_LSS_STATUS, + XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_LOCAL_FAULT_STATUS | + XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_REMOTE_FAULT_STATUS); + if (REG_RD(bp, mac_base + XMAC_REG_RX_LSS_STATUS)) + lss_status = 1; + + bnx2x_analyze_link_error(params, vars, lss_status, notify); + } else if (REG_RD(bp, MISC_REG_RESET_REG_2) & + (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) { + /* Check E1X / E2 BMAC */ + u32 lss_status_reg; + u32 wb_data[2]; + mac_base = params->port ? NIG_REG_INGRESS_BMAC1_MEM : + NIG_REG_INGRESS_BMAC0_MEM; + /* Read BIGMAC_REGISTER_RX_LSS_STATUS */ + if (CHIP_IS_E2(bp)) + lss_status_reg = BIGMAC2_REGISTER_RX_LSS_STAT; + else + lss_status_reg = BIGMAC_REGISTER_RX_LSS_STATUS; + + REG_RD_DMAE(bp, mac_base + lss_status_reg, wb_data, 2); + lss_status = (wb_data[0] > 0); + + bnx2x_analyze_link_error(params, vars, lss_status, notify); + } + return 0; +} + +void bnx2x_period_func(struct link_params *params, struct link_vars *vars) +{ + u16 phy_idx; + struct bnx2x *bp = params->bp; + for (phy_idx = INT_PHY; phy_idx < MAX_PHYS; phy_idx++) { + if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) { + bnx2x_set_aer_mmd(params, ¶ms->phy[phy_idx]); + if (bnx2x_check_half_open_conn(params, vars, 1) != + 0) + DP(NETIF_MSG_LINK, "Fault detection failed\n"); + break; + } + } + + if (CHIP_IS_E3(bp)) { + struct bnx2x_phy *phy = ¶ms->phy[INT_PHY]; + bnx2x_set_aer_mmd(params, phy); + bnx2x_check_over_curr(params, vars); + if (vars->rx_tx_asic_rst) + bnx2x_warpcore_config_runtime(phy, params, vars); + + } + +} + u8 bnx2x_hw_lock_required(struct bnx2x *bp, u32 shmem_base, u32 shmem2_base) { u8 phy_index; @@ -8586,7 +13078,15 @@ u8 bnx2x_fan_failure_det_req(struct bnx2x *bp, void bnx2x_hw_reset_phy(struct link_params *params) { u8 phy_index; - for (phy_index = EXT_PHY1; phy_index < MAX_PHYS; + struct bnx2x *bp = params->bp; + bnx2x_update_mng(params, 0); + bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4, + (NIG_MASK_XGXS0_LINK_STATUS | + NIG_MASK_XGXS0_LINK10G | + NIG_MASK_SERDES0_LINK_STATUS | + NIG_MASK_MI_INT)); + + for (phy_index = INT_PHY; phy_index < MAX_PHYS; phy_index++) { if (params->phy[phy_index].hw_reset) { params->phy[phy_index].hw_reset( @@ -8597,3 +13097,71 @@ void bnx2x_hw_reset_phy(struct link_params *params) } } +void bnx2x_init_mod_abs_int(struct bnx2x *bp, struct link_vars *vars, + u32 chip_id, u32 shmem_base, u32 shmem2_base, + u8 port) +{ + u8 gpio_num = 0xff, gpio_port = 0xff, phy_index; + u32 val; + u32 offset, aeu_mask, swap_val, swap_override, sync_offset; + if (CHIP_IS_E3(bp)) { + if (bnx2x_get_mod_abs_int_cfg(bp, chip_id, + shmem_base, + port, + &gpio_num, + &gpio_port) != 0) + return; + } else { + struct bnx2x_phy phy; + for (phy_index = EXT_PHY1; phy_index < MAX_PHYS; + phy_index++) { + if (bnx2x_populate_phy(bp, phy_index, shmem_base, + shmem2_base, port, &phy) + != 0) { + DP(NETIF_MSG_LINK, "populate phy failed\n"); + return; + } + if (phy.type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) { + gpio_num = MISC_REGISTERS_GPIO_3; + gpio_port = port; + break; + } + } + } + + if (gpio_num == 0xff) + return; + + /* Set GPIO3 to trigger SFP+ module insertion/removal */ + bnx2x_set_gpio(bp, gpio_num, MISC_REGISTERS_GPIO_INPUT_HI_Z, gpio_port); + + swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); + swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); + gpio_port ^= (swap_val && swap_override); + + vars->aeu_int_mask = AEU_INPUTS_ATTN_BITS_GPIO0_FUNCTION_0 << + (gpio_num + (gpio_port << 2)); + + sync_offset = shmem_base + + offsetof(struct shmem_region, + dev_info.port_hw_config[port].aeu_int_mask); + REG_WR(bp, sync_offset, vars->aeu_int_mask); + + DP(NETIF_MSG_LINK, "Setting MOD_ABS (GPIO%d_P%d) AEU to 0x%x\n", + gpio_num, gpio_port, vars->aeu_int_mask); + + if (port == 0) + offset = MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0; + else + offset = MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0; + + /* Open appropriate AEU for interrupts */ + aeu_mask = REG_RD(bp, offset); + aeu_mask |= vars->aeu_int_mask; + REG_WR(bp, offset, aeu_mask); + + /* Enable the GPIO to trigger interrupt */ + val = REG_RD(bp, MISC_REG_GPIO_EVENT_EN); + val |= 1 << (gpio_num + (gpio_port << 2)); + REG_WR(bp, MISC_REG_GPIO_EVENT_EN, val); +} diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.h index a7adae4..4c7d652 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_link.h @@ -1,4 +1,4 @@ -/* Copyright 2008-2011 Broadcom Corporation +/* Copyright 2008-2013 Broadcom Corporation * * Unless you and Broadcom execute a separate written software license * agreement governing use of this software, this software is licensed to you @@ -33,24 +33,25 @@ #define BNX2X_FLOW_CTRL_BOTH PORT_FEATURE_FLOW_CONTROL_BOTH #define BNX2X_FLOW_CTRL_NONE PORT_FEATURE_FLOW_CONTROL_NONE -#define SPEED_AUTO_NEG 0 -#define SPEED_12000 12000 -#define SPEED_12500 12500 -#define SPEED_13000 13000 -#define SPEED_15000 15000 -#define SPEED_16000 16000 +#define NET_SERDES_IF_XFI 1 +#define NET_SERDES_IF_SFI 2 +#define NET_SERDES_IF_KR 3 +#define NET_SERDES_IF_DXGXS 4 -#define SFP_EEPROM_VENDOR_NAME_ADDR 0x14 +#define SPEED_AUTO_NEG 0 +#define SPEED_20000 20000 + +#define SFP_EEPROM_VENDOR_NAME_ADDR 0x14 #define SFP_EEPROM_VENDOR_NAME_SIZE 16 -#define SFP_EEPROM_VENDOR_OUI_ADDR 0x25 +#define SFP_EEPROM_VENDOR_OUI_ADDR 0x25 #define SFP_EEPROM_VENDOR_OUI_SIZE 3 -#define SFP_EEPROM_PART_NO_ADDR 0x28 +#define SFP_EEPROM_PART_NO_ADDR 0x28 #define SFP_EEPROM_PART_NO_SIZE 16 #define SFP_EEPROM_REVISION_ADDR 0x38 -#define SFP_EEPROM_REVISION_SIZE 4 -#define SFP_EEPROM_SERIAL_ADDR 0x44 +#define SFP_EEPROM_REVISION_SIZE 4 +#define SFP_EEPROM_SERIAL_ADDR 0x44 #define SFP_EEPROM_SERIAL_SIZE 16 -#define SFP_EEPROM_DATE_ADDR 0x54 /* ASCII YYMMDD */ +#define SFP_EEPROM_DATE_ADDR 0x54 /* ASCII YYMMDD */ #define SFP_EEPROM_DATE_SIZE 6 #define PWR_FLT_ERR_MSG_LEN 250 @@ -69,10 +70,10 @@ /* Dual Media board contains two external phy with different media */ #define DUAL_MEDIA(params) (params->num_phys == 3) -#define FW_PARAM_PHY_ADDR_MASK 0x000000FF -#define FW_PARAM_PHY_TYPE_MASK 0x0000FF00 -#define FW_PARAM_MDIO_CTRL_MASK 0xFFFF0000 -#define FW_PARAM_MDIO_CTRL_OFFSET 16 +#define FW_PARAM_PHY_ADDR_MASK 0x000000FF +#define FW_PARAM_PHY_TYPE_MASK 0x0000FF00 +#define FW_PARAM_MDIO_CTRL_MASK 0xFFFF0000 +#define FW_PARAM_MDIO_CTRL_OFFSET 16 #define FW_PARAM_PHY_ADDR(fw_param) (fw_param & \ FW_PARAM_PHY_ADDR_MASK) #define FW_PARAM_PHY_TYPE(fw_param) (fw_param & \ @@ -83,34 +84,25 @@ #define FW_PARAM_SET(phy_addr, phy_type, mdio_access) \ (phy_addr | phy_type | mdio_access << FW_PARAM_MDIO_CTRL_OFFSET) -#define PFC_BRB_MAC_PAUSE_XOFF_THRESHOLD_PAUSEABLE 170 -#define PFC_BRB_MAC_PAUSE_XOFF_THRESHOLD_NON_PAUSEABLE 0 - -#define PFC_BRB_MAC_PAUSE_XON_THRESHOLD_PAUSEABLE 250 -#define PFC_BRB_MAC_PAUSE_XON_THRESHOLD_NON_PAUSEABLE 0 - -#define PFC_BRB_MAC_FULL_XOFF_THRESHOLD_PAUSEABLE 10 -#define PFC_BRB_MAC_FULL_XOFF_THRESHOLD_NON_PAUSEABLE 170 - -#define PFC_BRB_MAC_FULL_XON_THRESHOLD_PAUSEABLE 50 -#define PFC_BRB_MAC_FULL_XON_THRESHOLD_NON_PAUSEABLE 250 #define PFC_BRB_FULL_LB_XOFF_THRESHOLD 170 #define PFC_BRB_FULL_LB_XON_THRESHOLD 250 +#define MAXVAL(a, b) (((a) > (b)) ? (a) : (b)) + +#define BMAC_CONTROL_RX_ENABLE 2 /***********************************************************/ /* Structs */ /***********************************************************/ -#define INT_PHY 0 -#define EXT_PHY1 1 -#define EXT_PHY2 2 +#define INT_PHY 0 +#define EXT_PHY1 1 +#define EXT_PHY2 2 #define MAX_PHYS 3 /* Same configuration is shared between the XGXS and the first external phy */ #define LINK_CONFIG_SIZE (MAX_PHYS - 1) #define LINK_CONFIG_IDX(_phy_idx) ((_phy_idx == INT_PHY) ? \ 0 : (_phy_idx - 1)) - /***********************************************************/ /* bnx2x_phy struct */ /* Defines the required arguments and function per phy */ @@ -139,27 +131,31 @@ struct bnx2x_phy { /* Loaded during init */ u8 addr; - - u8 flags; + u8 def_md_devad; + u16 flags; /* Require HW lock */ -#define FLAGS_HW_LOCK_REQUIRED (1<<0) +#define FLAGS_HW_LOCK_REQUIRED (1<<0) /* No Over-Current detection */ #define FLAGS_NOC (1<<1) /* Fan failure detection required */ #define FLAGS_FAN_FAILURE_DET_REQ (1<<2) /* Initialize first the XGXS and only then the phy itself */ -#define FLAGS_INIT_XGXS_FIRST (1<<3) +#define FLAGS_INIT_XGXS_FIRST (1<<3) +#define FLAGS_WC_DUAL_MODE (1<<4) #define FLAGS_4_PORT_MODE (1<<5) #define FLAGS_REARM_LATCH_SIGNAL (1<<6) -#define FLAGS_SFP_NOT_APPROVED (1<<7) +#define FLAGS_SFP_NOT_APPROVED (1<<7) +#define FLAGS_MDC_MDIO_WA (1<<8) +#define FLAGS_DUMMY_READ (1<<9) +#define FLAGS_MDC_MDIO_WA_B0 (1<<10) +#define FLAGS_SFP_MODULE_PLUGGED_IN_WC (1<<11) +#define FLAGS_TX_ERROR_CHECK (1<<12) - u8 def_md_devad; - u8 reserved; /* preemphasis values for the rx side */ u16 rx_preemphasis[4]; /* preemphasis values for the tx side */ - u16 tx_preemphasis [4]; + u16 tx_preemphasis[4]; /* EMAC address for access MDIO */ u32 mdio_ctrl; @@ -172,6 +168,8 @@ struct bnx2x_phy { #define ETH_PHY_XFP_FIBER 0x2 #define ETH_PHY_DA_TWINAX 0x3 #define ETH_PHY_BASE_T 0x4 +#define ETH_PHY_KR 0xf0 +#define ETH_PHY_CX4 0xf1 #define ETH_PHY_NOT_PRESENT 0xff /* The address in which version is located*/ @@ -210,10 +208,9 @@ struct bnx2x_phy { /* PHY Specific tasks */ phy_specific_func_t phy_specific_func; #define DISABLE_TX 1 -#define ENABLE_TX 2 +#define ENABLE_TX 2 }; - /* Inputs parameters to the CLC */ struct link_params { @@ -226,7 +223,7 @@ struct link_params { #define LOOPBACK_BMAC 2 #define LOOPBACK_XGXS 3 #define LOOPBACK_EXT_PHY 4 -#define LOOPBACK_EXT 5 +#define LOOPBACK_EXT 5 #define LOOPBACK_UMAC 6 #define LOOPBACK_XMAC 7 @@ -260,6 +257,14 @@ struct link_params { #define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY (1<<3) #define FEATURE_CONFIG_EMUL_DISABLE_EMAC (1<<4) #define FEATURE_CONFIG_EMUL_DISABLE_BMAC (1<<5) +#define FEATURE_CONFIG_EMUL_DISABLE_UMAC (1<<6) +#define FEATURE_CONFIG_EMUL_DISABLE_XMAC (1<<7) +#define FEATURE_CONFIG_BC_SUPPORTS_AFEX (1<<8) +#define FEATURE_CONFIG_AUTOGREEEN_ENABLED (1<<9) +#define FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED (1<<10) +#define FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET (1<<11) +#define FEATURE_CONFIG_IEEE_PHY_TEST (1<<11) + /* Will be populated during common init */ struct bnx2x_phy phy[MAX_PHYS]; @@ -279,73 +284,83 @@ struct link_params { /* Output parameters */ struct link_vars { u8 phy_flags; +#define PHY_XGXS_FLAG (1<<0) +#define PHY_SGMII_FLAG (1<<1) +#define PHY_PHYSICAL_LINK_FLAG (1<<2) +#define PHY_HALF_OPEN_CONN_FLAG (1<<3) +#define PHY_OVER_CURRENT_FLAG (1<<4) u8 mac_type; #define MAC_TYPE_NONE 0 #define MAC_TYPE_EMAC 1 #define MAC_TYPE_BMAC 2 +#define MAC_TYPE_UMAC 3 +#define MAC_TYPE_XMAC 4 u8 phy_link_up; /* internal phy link indication */ u8 link_up; + u16 line_speed; u16 duplex; + u16 flow_ctrl; u16 ieee_fc; /* The same definitions as the shmem parameter */ u32 link_status; + u8 fault_detected; + u8 rsrv1; + u16 periodic_flags; +#define PERIODIC_FLAGS_LINK_EVENT 0x0001 + + u32 aeu_int_mask; + u8 rx_tx_asic_rst; + u8 turn_to_run_wc_rt; + u16 rsrv2; }; /***********************************************************/ /* Functions */ /***********************************************************/ -u8 bnx2x_phy_init(struct link_params *input, struct link_vars *output); +int bnx2x_phy_init(struct link_params *params, struct link_vars *vars); /* Reset the link. Should be called when driver or interface goes down Before calling phy firmware upgrade, the reset_ext_phy should be set to 0 */ -u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars, - u8 reset_ext_phy); +int bnx2x_link_reset(struct link_params *params, struct link_vars *vars, + u8 reset_ext_phy); /* bnx2x_link_update should be called upon link interrupt */ -u8 bnx2x_link_update(struct link_params *input, struct link_vars *output); +int bnx2x_link_update(struct link_params *params, struct link_vars *vars); /* use the following phy functions to read/write from external_phy In order to use it to read/write internal phy registers, use DEFAULT_PHY_DEV_ADDR as devad, and (_bank + (_addr & 0xf)) as the register */ -u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr, - u8 devad, u16 reg, u16 *ret_val); - -u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr, - u8 devad, u16 reg, u16 val); - -u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, +int bnx2x_phy_read(struct link_params *params, u8 phy_addr, u8 devad, u16 reg, u16 *ret_val); -u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, +int bnx2x_phy_write(struct link_params *params, u8 phy_addr, u8 devad, u16 reg, u16 val); + /* Reads the link_status from the shmem, and update the link vars accordingly */ void bnx2x_link_status_update(struct link_params *input, struct link_vars *output); /* returns string representing the fw_version of the external phy */ -u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded, - u8 *version, u16 len); +int bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 *version, + u16 len); /* Set/Unset the led Basically, the CLC takes care of the led for the link, but in case one needs to set/unset the led unnaturally, set the "mode" to LED_MODE_OPER to blink the led, and LED_MODE_OFF to set the led off.*/ -u8 bnx2x_set_led(struct link_params *params, struct link_vars *vars, - u8 mode, u32 speed); -#define LED_MODE_OFF 0 -#define LED_MODE_ON 1 -#define LED_MODE_OPER 2 -#define LED_MODE_FRONT_PANEL_OFF 3 - -u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, - u32 led_idx, u32 value); +int bnx2x_set_led(struct link_params *params, + struct link_vars *vars, u8 mode, u32 speed); +#define LED_MODE_OFF 0 +#define LED_MODE_ON 1 +#define LED_MODE_OPER 2 +#define LED_MODE_FRONT_PANEL_OFF 3 /* bnx2x_handle_module_detect_int should be called upon module detection interrupt */ @@ -353,12 +368,12 @@ void bnx2x_handle_module_detect_int(struct link_params *params); /* Get the actual link status. In case it returns 0, link is up, otherwise link is down*/ -u8 bnx2x_test_link(struct link_params *input, struct link_vars *vars, - u8 is_serdes); +int bnx2x_test_link(struct link_params *params, struct link_vars *vars, + u8 is_serdes); /* One-time initialization for external phy after power up */ -u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[], - u32 shmem2_base_path[], u32 chip_id); +int bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[], + u32 shmem2_base_path[], u32 chip_id, u8 one_port_enabled); /* Reset the external PHY using GPIO */ void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port); @@ -367,9 +382,9 @@ void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port); void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy); /* Read "byte_cnt" bytes from address "addr" from the SFP+ EEPROM */ -u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, - struct link_params *params, u16 addr, - u8 byte_cnt, u8 *o_buf); +int bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, + struct link_params *params, u16 addr, + u8 byte_cnt, u8 *o_buf); void bnx2x_hw_reset_phy(struct link_params *params); @@ -377,19 +392,32 @@ void bnx2x_hw_reset_phy(struct link_params *params); u8 bnx2x_hw_lock_required(struct bnx2x *bp, u32 shmem_base, u32 shmem2_base); -/* Returns the aggregative supported attributes of the phys on board */ -u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx); - /* Check swap bit and adjust PHY order */ u32 bnx2x_phy_selection(struct link_params *params); /* Probe the phys on board, and populate them in "params" */ -u8 bnx2x_phy_probe(struct link_params *params); +int bnx2x_phy_probe(struct link_params *params); /* Checks if fan failure detection is required on one of the phys on board */ u8 bnx2x_fan_failure_det_req(struct bnx2x *bp, u32 shmem_base, u32 shmem2_base, u8 port); + + +/* DCBX structs */ + +/* Number of maximum COS per chip */ +#define DCBX_E2E3_MAX_NUM_COS (2) +#define DCBX_E3B0_MAX_NUM_COS_PORT0 (6) +#define DCBX_E3B0_MAX_NUM_COS_PORT1 (3) +#define DCBX_E3B0_MAX_NUM_COS ( \ + MAXVAL(DCBX_E3B0_MAX_NUM_COS_PORT0, \ + DCBX_E3B0_MAX_NUM_COS_PORT1)) + +#define DCBX_MAX_NUM_COS ( \ + MAXVAL(DCBX_E3B0_MAX_NUM_COS, \ + DCBX_E2E3_MAX_NUM_COS)) + /* PFC port configuration params */ struct bnx2x_nig_brb_pfc_port_params { /* NIG */ @@ -397,8 +425,8 @@ struct bnx2x_nig_brb_pfc_port_params { u32 llfc_out_en; u32 llfc_enable; u32 pkt_priority_to_cos; - u32 rx_cos0_priority_mask; - u32 rx_cos1_priority_mask; + u8 num_of_rx_cos_priority_mask; + u32 rx_cos_priority_mask[DCBX_MAX_NUM_COS]; u32 llfc_high_priority_classes; u32 llfc_low_priority_classes; /* BRB */ @@ -406,27 +434,86 @@ struct bnx2x_nig_brb_pfc_port_params { u32 cos1_pauseable; }; + +/* ETS port configuration params */ +struct bnx2x_ets_bw_params { + u8 bw; +}; + +struct bnx2x_ets_sp_params { + /** + * valid values are 0 - 5. 0 is highest strict priority. + * There can't be two COS's with the same pri. + */ + u8 pri; +}; + +enum bnx2x_cos_state { + bnx2x_cos_state_strict = 0, + bnx2x_cos_state_bw = 1, +}; + +struct bnx2x_ets_cos_params { + enum bnx2x_cos_state state ; + union { + struct bnx2x_ets_bw_params bw_params; + struct bnx2x_ets_sp_params sp_params; + } params; +}; + +struct bnx2x_ets_params { + u8 num_of_cos; /* Number of valid COS entries*/ + struct bnx2x_ets_cos_params cos[DCBX_MAX_NUM_COS]; +}; + /** * Used to update the PFC attributes in EMAC, BMAC, NIG and BRB * when link is already up */ -void bnx2x_update_pfc(struct link_params *params, +int bnx2x_update_pfc(struct link_params *params, struct link_vars *vars, struct bnx2x_nig_brb_pfc_port_params *pfc_params); /* Used to configure the ETS to disable */ -void bnx2x_ets_disabled(struct link_params *params); +int bnx2x_ets_disabled(struct link_params *params, + struct link_vars *vars); /* Used to configure the ETS to BW limited */ -void bnx2x_ets_bw_limit(const struct link_params *params,const u32 cos0_bw, - const u32 cos1_bw); +void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, + const u32 cos1_bw); /* Used to configure the ETS to strict */ -u8 bnx2x_ets_strict(const struct link_params *params,const u8 strict_cos); +int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos); + +/* Configure the COS to ETS according to BW and SP settings.*/ +int bnx2x_ets_e3b0_config(const struct link_params *params, + const struct link_vars *vars, + struct bnx2x_ets_params *ets_params); /* Read pfc statistic*/ void bnx2x_pfc_statistic(struct link_params *params, struct link_vars *vars, u32 pfc_frames_sent[2], u32 pfc_frames_received[2]); + +void bnx2x_init_mod_abs_int(struct bnx2x *bp, struct link_vars *vars, + u32 chip_id, u32 shmem_base, u32 shmem2_base, + u8 port); + +int bnx2x_sfp_module_detection(struct bnx2x_phy *phy, + struct link_params *params); + +void bnx2x_period_func(struct link_params *params, struct link_vars *vars); + +int bnx2x_check_half_open_conn(struct link_params *params, + struct link_vars *vars, u8 notify); + +void bnx2x_enable_pmd_tx(struct bnx2x *bp, u32 chip_id, + u32 shmem_base, u32 shmem2_base, u8 port); + +int bnx2x_pre_init_phy(struct bnx2x *bp, + u32 shmem_base, + u32 shmem2_base, + u32 chip_id); + #endif /* BNX2X_LINK_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.c index fe5d73a..c7c717d 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.c +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_main.c @@ -1,6 +1,6 @@ /* bnx2x_main.c: Broadcom Everest network driver. * - * Copyright (c) 2007-2012 Broadcom Corporation + * Copyright (c) 2007-2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -15,7 +15,13 @@ * */ +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ #include +#endif +#if (LINUX_VERSION_CODE > 0x02060f) /* BNX2X_UPSTREAM */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#endif + #include #if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ #include @@ -70,42 +76,39 @@ #else #include #endif +#if (LINUX_VERSION_CODE > 0x02061a) /* BNX2X_UPSTREAM */ +#include +#else +#include +#endif #if defined(BNX2X_UPSTREAM) && !defined(BNX2X_USE_INIT_VALUES) /* BNX2X_UPSTREAM */ #include #endif - +#include #if (LINUX_VERSION_CODE < 0x020600) /* ! BNX2X_UPSTREAM */ #define __NO_TPA__ 1 #endif #include "bnx2x.h" -#include "bnx2x_common.h" #include "bnx2x_init.h" #include "bnx2x_init_ops.h" -#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ - -#include "bnx2x_self_test.h" -#endif -#include "bnx2x_dump.h" - +#include "bnx2x_cmn.h" #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ -#include "bnx2x_vf.h" +#include "bnx2x_sriov.h" #endif - #if defined(__VMKLNX__) && (defined(__VMKNETDDI_QUEUEOPS__) || defined(BNX2X_PASSTHRU)) /* ! BNX2X_UPSTREAM */ #include "bnx2x_esx.h" #endif - -#include "bnx2x_dump.h" +#if !(defined(BNX2X_UPSTREAM) && !defined(BNX2X_USE_INIT_VALUES)) /* ! BNX2X_UPSTREAM */ #include "bnx2x_57710_int_offsets.h" #include "bnx2x_57711_int_offsets.h" #include "bnx2x_57712_int_offsets.h" +#endif #include "bnx2x_dcb.h" - -#define DRV_MODULE_VERSION "1.61.15.v50.3" - -#define DRV_MODULE_RELDATE "$DateTime: 2012/03/30 13:10:36 $" -#define BNX2X_BC_VER 0x040200 +#include "bnx2x_sp.h" +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ +#include "bnx2x_char_dev.h" +#endif #if defined(BNX2X_UPSTREAM) && !defined(BNX2X_USE_INIT_VALUES) /* BNX2X_UPSTREAM */ #include @@ -116,17 +119,19 @@ __stringify(BCM_5710_FW_MINOR_VERSION) "." \ __stringify(BCM_5710_FW_REVISION_VERSION) "." \ __stringify(BCM_5710_FW_ENGINEERING_VERSION) -#define FW_FILE_NAME_E1 "bnx2x-e1-" FW_FILE_VERSION ".fw" -#define FW_FILE_NAME_E1H "bnx2x-e1h-" FW_FILE_VERSION ".fw" -#define FW_FILE_NAME_E2 "bnx2x-e2-" FW_FILE_VERSION ".fw" +#define FW_FILE_NAME_E1 "bnx2x/bnx2x-e1-" FW_FILE_VERSION ".fw" +#define FW_FILE_NAME_E1H "bnx2x/bnx2x-e1h-" FW_FILE_VERSION ".fw" +#define FW_FILE_NAME_E2 "bnx2x/bnx2x-e2-" FW_FILE_VERSION ".fw" #else void bnx2x_init_e1_firmware(struct bnx2x *bp); void bnx2x_init_e1h_firmware(struct bnx2x *bp); void bnx2x_init_e2_firmware(struct bnx2x *bp); #endif +#define MAC_LEADING_ZERO_CNT (ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN) + /* Time in jiffies before concluding the transmitter is hung */ -#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ +#if defined(__VMKLNX__) /* non BNX2X_UPSTREAM */ /* On VMware ESX there is a possibility that that netdev watchdog thread * runs before the reset task if the machine is loaded. If this occurs * too many times, these premature watchdog triggers will cause a PSOD @@ -135,7 +140,6 @@ void bnx2x_init_e2_firmware(struct bnx2x *bp); #else /* BNX2X_UPSTREAM */ #define TX_TIMEOUT (5*HZ) #endif - #if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) /* ! BNX2X_UPSTREAM */ #include "cnic_register.h" @@ -143,12 +147,14 @@ static int registered_cnic_adapter; #endif /* defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) */ static char version[] __devinitdata = - "Broadcom NetXtreme II 5771x 10Gigabit Ethernet Driver " + "Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit Ethernet Driver " DRV_MODULE_NAME " " DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; MODULE_AUTHOR("Eliezer Tamir"); MODULE_DESCRIPTION("Broadcom NetXtreme II " - "BCM57710/57711/57711E/57712/57712E/57713/57713E Driver"); + "BCM57710/57711/57711E/" + "57712/57712_MF/57800/57800_MF/57810/57810_MF/" + "57840/57840_MF Driver"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_MODULE_VERSION); #if defined(BNX2X_UPSTREAM) && !defined(BNX2X_USE_INIT_VALUES) /* BNX2X_UPSTREAM */ @@ -156,170 +162,195 @@ MODULE_FIRMWARE(FW_FILE_NAME_E1); MODULE_FIRMWARE(FW_FILE_NAME_E1H); MODULE_FIRMWARE(FW_FILE_NAME_E2); #endif + #ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ -#if (LINUX_VERSION_CODE >= 0x020600) /* ! BNX2X_UPSTREAM */ -MODULE_INFO(cvs_version, "$Revision: #138 $"); -#endif -#endif - -static int multi_mode = 1; -module_param(multi_mode, int, 0); -#ifdef BNX2X_SAFC -MODULE_PARM_DESC(multi_mode, " Multi queue mode " - "(0 Disable; 1 Enable (default);" - " 2 VLAN PRI; 3 E1HOV PRI; 4 IP DSCP)"); - -static int pri_map; -module_param(pri_map, int, 0); +static uint pri_map; +module_param(pri_map, uint, 0); MODULE_PARM_DESC(pri_map, " Priority to HW queue mapping"); - -static int qs_per_cos; -module_param(qs_per_cos, int, 0); -MODULE_PARM_DESC(qs_per_cos, " Number of queues per HW queue"); - -static int cos_min_rate; -module_param(cos_min_rate, int, 0); -MODULE_PARM_DESC(cos_min_rate, " Weight for RR between HW queues"); -#else /* BNX2X_UPSTREAM */ -MODULE_PARM_DESC(multi_mode, " Multi queue mode " - "(0 Disable; 1 Enable (default))"); -#endif /* not BNX2X_SAFC */ - -int num_queues; -module_param(num_queues, int, 0); -MODULE_PARM_DESC(num_queues, " Number of queues for multi_mode=1" - " (default is as a number of CPUs)"); - -#ifdef BCM_CNIC -#ifdef __VMKLNX__ -int disable_iscsi_ooo = 1; -#else /* BNX2X_UPSTREAM */ -int disable_iscsi_ooo; #endif -module_param(disable_iscsi_ooo, int, 0); + +uint num_queues; +module_param(num_queues, uint, 0); +MODULE_PARM_DESC(num_queues, + " Set number of queues (default is as a number of CPUs)"); + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#ifdef BCM_CNIC +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 41000) +uint disable_iscsi_ooo = 1; +#else /* BNX2X_UPSTREAM */ +static uint disable_iscsi_ooo; +#endif +module_param(disable_iscsi_ooo, uint, 0); MODULE_PARM_DESC(disable_iscsi_ooo, " Disable iSCSI OOO support"); #endif - -#if defined(__VMKLNX__) -int max_agg_size_param = 0; -module_param(max_agg_size_param, int, 0); +#endif /* OOO */ +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ +uint max_agg_size_param = 0; +module_param(max_agg_size_param, uint, 0); MODULE_PARM_DESC(max_agg_size_param, "max aggregation size"); +#if (VMWARE_ESX_DDK_VERSION >= 55000) +static int disable_fw_dmp; +module_param(disable_fw_dmp, int, 0); +MODULE_PARM_DESC(disable_fw_dmp, "For debug purposes, disable firmware dump " + " feature when set to value of 1"); +#endif #endif /* defined(__VMKLNX__) */ - #if defined(__NO_TPA__) -int disable_tpa = 1; +static uint disable_tpa = 1; #else /* BNX2X_UPSTREAM */ -int disable_tpa; -module_param(disable_tpa, int, 0); +static uint disable_tpa; +module_param(disable_tpa, uint, 0); MODULE_PARM_DESC(disable_tpa, " Disable the TPA (LRO) feature"); #endif -int int_mode = 0; +uint int_mode; #if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -module_param(int_mode, int, 0); +module_param(int_mode, uint, 0); MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X " "(1 INT#x; 2 MSI)"); #endif -static int dropless_fc; +static uint dropless_fc; #if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -module_param(dropless_fc, int, 0); +module_param(dropless_fc, uint, 0); MODULE_PARM_DESC(dropless_fc, " Pause on exhausted host ring"); #endif -static int poll; +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +static uint poll; #if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -module_param(poll, int, 0); +module_param(poll, uint, 0); MODULE_PARM_DESC(poll, " Use polling (for debug)"); #endif +#endif static int mrrs = -1; #if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -module_param(mrrs, int, 0); +module_param(mrrs, uint, 0); MODULE_PARM_DESC(mrrs, " Force Max Read Req Size (0..3) (for debug)"); #endif -static int debug; +static uint debug; #if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -module_param(debug, int, 0); +module_param(debug, uint, 0); MODULE_PARM_DESC(debug, " Default debug msglevel"); #endif #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ -static int num_vfs; -module_param(num_vfs, int, 0); +static uint num_vfs; +module_param(num_vfs, uint, 0); MODULE_PARM_DESC(num_vfs, " Number of supported virtual functions " "(0 means sriov is disabled)"); #endif - - -static struct workqueue_struct *bnx2x_wq; - -#ifdef BCM_CNIC -static u8 ALL_ENODE_MACS[]= {0x01, 0x10, 0x18, 0x01, 0x00, 0x01}; +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#define AUTO_GREEN_FORCE_ON 1 +#define AUTO_GREEN_FORCE_OFF 2 +static uint autogreeen; +module_param(autogreeen, uint, 0); +MODULE_PARM_DESC(autogreeen, " Set autoGrEEEn (0:HW default; 1:force on;" + " 2:force off)"); #endif +struct workqueue_struct *bnx2x_wq; + enum bnx2x_board_type { BCM57710 = 0, - BCM57711 = 1, - BCM57711E = 2, - BCM57712 = 3, - BCM57712E = 4, - BCM57713 = 5, - BCM57713E = 6 + BCM57711, + BCM57711E, + BCM57712, + BCM57712_MF, + BCM57800, + BCM57800_MF, + BCM57810, + BCM57810_MF, + BCM57840, + BCM57840_MF, + BCM57811, + BCM57811_MF }; /* indexed by board_type, above */ static struct { char *name; } board_info[] __devinitdata = { - { "Broadcom NetXtreme II BCM57710 XGb" }, - { "Broadcom NetXtreme II BCM57711 XGb" }, - { "Broadcom NetXtreme II BCM57711E XGb" }, - { "Broadcom NetXtreme II BCM57712 XGb" }, - { "Broadcom NetXtreme II BCM57712E XGb" }, - { "Broadcom NetXtreme II BCM57713 XGb" }, - { "Broadcom NetXtreme II BCM57713E XGb" } + { "Broadcom NetXtreme II BCM57710 10 Gigabit PCIe [Everest]" }, + { "Broadcom NetXtreme II BCM57711 10 Gigabit PCIe" }, + { "Broadcom NetXtreme II BCM57711E 10 Gigabit PCIe" }, + { "Broadcom NetXtreme II BCM57712 10 Gigabit Ethernet" }, + { "Broadcom NetXtreme II BCM57712 10 Gigabit Ethernet Multi Function" }, + { "Broadcom NetXtreme II BCM57800 10 Gigabit Ethernet" }, + { "Broadcom NetXtreme II BCM57800 10 Gigabit Ethernet Multi Function" }, + { "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet" }, + { "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet Multi Function" }, + { "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet" }, + { "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet Multi Function"}, + { "Broadcom NetXtreme II BCM57811 10 Gigabit Ethernet"}, + { "Broadcom NetXtreme II BCM57811 10 Gigabit Ethernet Multi Function"}, }; -#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ #ifndef PCI_DEVICE_ID_NX2_57710 -#define PCI_DEVICE_ID_NX2_57710 0x164e +#define PCI_DEVICE_ID_NX2_57710 CHIP_NUM_57710 #endif #ifndef PCI_DEVICE_ID_NX2_57711 -#define PCI_DEVICE_ID_NX2_57711 0x164f +#define PCI_DEVICE_ID_NX2_57711 CHIP_NUM_57711 #endif #ifndef PCI_DEVICE_ID_NX2_57711E -#define PCI_DEVICE_ID_NX2_57711E 0x1650 +#define PCI_DEVICE_ID_NX2_57711E CHIP_NUM_57711E #endif #ifndef PCI_DEVICE_ID_NX2_57712 -#define PCI_DEVICE_ID_NX2_57712 0x1662 +#define PCI_DEVICE_ID_NX2_57712 CHIP_NUM_57712 #endif -#ifndef PCI_DEVICE_ID_NX2_57712E -#define PCI_DEVICE_ID_NX2_57712E 0x1663 +#ifndef PCI_DEVICE_ID_NX2_57712_MF +#define PCI_DEVICE_ID_NX2_57712_MF CHIP_NUM_57712_MF #endif -#ifndef PCI_DEVICE_ID_NX2_57713 -#define PCI_DEVICE_ID_NX2_57713 0x1651 +#ifndef PCI_DEVICE_ID_NX2_57800 +#define PCI_DEVICE_ID_NX2_57800 CHIP_NUM_57800 #endif -#ifndef PCI_DEVICE_ID_NX2_57713E -#define PCI_DEVICE_ID_NX2_57713E 0x1652 +#ifndef PCI_DEVICE_ID_NX2_57800_MF +#define PCI_DEVICE_ID_NX2_57800_MF CHIP_NUM_57800_MF #endif +#ifndef PCI_DEVICE_ID_NX2_57810 +#define PCI_DEVICE_ID_NX2_57810 CHIP_NUM_57810 +#endif +#ifndef PCI_DEVICE_ID_NX2_57810_MF +#define PCI_DEVICE_ID_NX2_57810_MF CHIP_NUM_57810_MF +#endif +#ifndef PCI_DEVICE_ID_NX2_57840 +#define PCI_DEVICE_ID_NX2_57840 CHIP_NUM_57840 +#endif +#ifndef PCI_DEVICE_ID_NX2_57840_MF +#define PCI_DEVICE_ID_NX2_57840_MF CHIP_NUM_57840_MF +#endif +#ifndef PCI_DEVICE_ID_NX2_57811 +#define PCI_DEVICE_ID_NX2_57811 CHIP_NUM_57811 +#endif +#ifndef PCI_DEVICE_ID_NX2_57811_MF +#define PCI_DEVICE_ID_NX2_57811_MF CHIP_NUM_57811_MF #endif - static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = { { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57710), BCM57710 }, { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57711), BCM57711 }, { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57711E), BCM57711E }, { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57712), BCM57712 }, - { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57712E), BCM57712E }, - { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57713), BCM57713 }, - { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57713E), BCM57713E }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57712_MF), BCM57712_MF }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57800), BCM57800 }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57800_MF), BCM57800_MF }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57810), BCM57810 }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57810_MF), BCM57810_MF }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840), BCM57840 }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840_MF), BCM57840_MF }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57811), BCM57811 }, + { PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57811_MF), BCM57811_MF }, { 0 } }; MODULE_DEVICE_TABLE(pci, bnx2x_pci_tbl); - +/* Global resources for unloading a previously loaded device */ +#define BNX2X_PREV_WAIT_NEEDED 1 +static DEFINE_SEMAPHORE(bnx2x_prev_sem); +static LIST_HEAD(bnx2x_prev_list); /**************************************************************************** * General service functions ****************************************************************************/ @@ -331,14 +362,6 @@ static inline void __storm_memset_dma_mapping(struct bnx2x *bp, REG_WR(bp, addr + 4, U64_HI(mapping)); } -static inline void __storm_memset_fill(struct bnx2x *bp, - u32 addr, size_t size, u32 val) -{ - int i; - for (i = 0; i < size/4; i++) - REG_WR(bp, addr + (i * 4), val); -} - static inline void storm_memset_spq_addr(struct bnx2x *bp, dma_addr_t mapping, u16 abs_fid) { @@ -348,12 +371,6 @@ static inline void storm_memset_spq_addr(struct bnx2x *bp, __storm_memset_dma_mapping(bp, addr, mapping); } -static inline void storm_memset_ov(struct bnx2x *bp, u16 ov, u16 abs_fid) -{ - REG_WR16(bp, BAR_XSTRORM_INTMEM + XSTORM_E1HOV_OFFSET(abs_fid), ov); -} - - static inline void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid, u16 pf_id) { @@ -388,62 +405,20 @@ static inline void storm_memset_eq_data(struct bnx2x *bp, u32 addr = BAR_CSTRORM_INTMEM + CSTORM_EVENT_RING_DATA_OFFSET(pfid); - __storm_memset_struct(bp, addr, size, (u32*)eq_data); + __storm_memset_struct(bp, addr, size, (u32 *)eq_data); } static inline void storm_memset_eq_prod(struct bnx2x *bp, u16 eq_prod, u16 pfid) { -/* TBD: Fix me!!! Replace with prod offset when defined by FW */ - u32 addr = BAR_CSTRORM_INTMEM + CSTORM_EVENT_RING_DATA_OFFSET(pfid) + 8; - //offsetof(struct event_ring_data, producer); + u32 addr = BAR_CSTRORM_INTMEM + CSTORM_EVENT_RING_PROD_OFFSET(pfid); REG_WR16(bp, addr, eq_prod); } -static inline void storm_memset_hc_timeout(struct bnx2x *bp, u8 port, - u16 fw_sb_id, u8 sb_index, - u8 ticks) -{ - - int index_offset = CHIP_IS_E2(bp) ? - offsetof(struct hc_status_block_data_e2, index_data) : - offsetof(struct hc_status_block_data_e1x, index_data); - u32 addr = BAR_CSTRORM_INTMEM + - CSTORM_STATUS_BLOCK_DATA_OFFSET(fw_sb_id) + - index_offset + - sizeof(struct hc_index_data)*sb_index + - offsetof(struct hc_index_data, timeout); - REG_WR8(bp, addr, ticks); - DP(NETIF_MSG_HW, "port %x fw_sb_id %d sb_index %d ticks %d\n", - port, fw_sb_id, sb_index, ticks); -} -static inline void storm_memset_hc_disable(struct bnx2x *bp, u8 port, - u16 fw_sb_id, u8 sb_index, - u8 disable) -{ - u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT); - int index_offset = CHIP_IS_E2(bp) ? - offsetof(struct hc_status_block_data_e2, index_data) : - offsetof(struct hc_status_block_data_e1x, index_data); - u32 addr = BAR_CSTRORM_INTMEM + - CSTORM_STATUS_BLOCK_DATA_OFFSET(fw_sb_id) + - index_offset + - sizeof(struct hc_index_data)*sb_index + - offsetof(struct hc_index_data, flags); - u16 flags = REG_RD16(bp, addr); - /* clear and set */ - flags &= ~HC_INDEX_DATA_HC_ENABLED; - flags |= enable_flag; - REG_WR16(bp, addr, flags); - DP(NETIF_MSG_HW, "port %x fw_sb_id %d sb_index %d disable %d\n", - port, fw_sb_id, sb_index, disable); -} - - /* used only at init * locking is done by mcp */ -void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val) +static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val) { pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, addr); pci_write_config_dword(bp->pdev, PCICFG_GRC_DATA, val); @@ -463,20 +438,13 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr) return val; } -static const u32 dmae_reg_go_c[] = { - DMAE_REG_GO_C0, DMAE_REG_GO_C1, DMAE_REG_GO_C2, DMAE_REG_GO_C3, - DMAE_REG_GO_C4, DMAE_REG_GO_C5, DMAE_REG_GO_C6, DMAE_REG_GO_C7, - DMAE_REG_GO_C8, DMAE_REG_GO_C9, DMAE_REG_GO_C10, DMAE_REG_GO_C11, - DMAE_REG_GO_C12, DMAE_REG_GO_C13, DMAE_REG_GO_C14, DMAE_REG_GO_C15 -}; - #define DMAE_DP_SRC_GRC "grc src_addr [%08x]" #define DMAE_DP_SRC_PCI "pci src_addr [%x:%08x]" #define DMAE_DP_DST_GRC "grc dst_addr [%08x]" #define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]" #define DMAE_DP_DST_NONE "dst_addr [none]" - +#ifdef BNX2X_IOV /* ! BNX2X_UPSTREAM */ void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl) { u32 src_type = dmae->opcode & DMAE_COMMAND_SRC; @@ -521,17 +489,15 @@ void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl) default: if (src_type == DMAE_CMD_SRC_PCI) DP(msglvl, "DMAE: opcode 0x%08x\n" - DP_LEVEL "src_addr [%x:%08x] len [%d * 4] " - "dst_addr [none]\n" - DP_LEVEL "comp_addr [%x:%08x] comp_val 0x%08x\n", + "src_addr [%x:%08x] len [%d * 4] dst_addr [none]\n" + "comp_addr [%x:%08x] comp_val 0x%08x\n", dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo, dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo, dmae->comp_val); else DP(msglvl, "DMAE: opcode 0x%08x\n" - DP_LEVEL "src_addr [%08x] len [%d * 4] " - "dst_addr [none]\n" - DP_LEVEL "comp_addr [%x:%08x] comp_val 0x%08x\n", + "src_addr [%08x] len [%d * 4] dst_addr [none]\n" + "comp_addr [%x:%08x] comp_val 0x%08x\n", dmae->opcode, dmae->src_addr_lo >> 2, dmae->len, dmae->comp_addr_hi, dmae->comp_addr_lo, dmae->comp_val); @@ -539,10 +505,10 @@ void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl) } } +#endif /* copy command into DMAE command memory and set DMAE command go */ -static void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, - int idx) +void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx) { u32 cmd_offset; int i; @@ -550,29 +516,22 @@ static void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, cmd_offset = (DMAE_REG_CMD_MEM + sizeof(struct dmae_command) * idx); for (i = 0; i < (sizeof(struct dmae_command)/4); i++) { REG_WR(bp, cmd_offset + i*4, *(((u32 *)dmae) + i)); - - DP(BNX2X_MSG_OFF, "DMAE cmd[%d].%d (0x%08x) : 0x%08x\n", - idx, i, cmd_offset + i*4, *(((u32 *)dmae) + i)); } REG_WR(bp, dmae_reg_go_c[idx], 1); } -#ifndef DMAE_COMMAND_DST_VN_SHIFT -#define DMAE_COMMAND_DST_VN_SHIFT 17 -#define DMAE_COMMAND_ERR_POLICY_SHIFT 20 -#endif -static u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type) +u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type) { - return (opcode | ((comp_type << DMAE_COMMAND_C_DST_SHIFT) | - DMAE_CMD_C_ENABLE)); + return opcode | ((comp_type << DMAE_COMMAND_C_DST_SHIFT) | + DMAE_CMD_C_ENABLE); } -static u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode) +u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode) { - return (opcode & ~DMAE_CMD_SRC_RESET); + return opcode & ~DMAE_CMD_SRC_RESET; } -static u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, +u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, bool with_comp, u8 comp_type) { u32 opcode = 0; @@ -583,8 +542,8 @@ static u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, opcode |= (DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET); opcode |= (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0); - opcode |= ((BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT) | - (BP_E1HVN(bp) << DMAE_COMMAND_DST_VN_SHIFT)); + opcode |= ((BP_VN(bp) << DMAE_CMD_E1HVN_SHIFT) | + (BP_VN(bp) << DMAE_COMMAND_DST_VN_SHIFT)); opcode |= (DMAE_COM_SET_ERR << DMAE_COMMAND_ERR_POLICY_SHIFT); #ifdef __BIG_ENDIAN @@ -596,6 +555,10 @@ static u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, opcode = bnx2x_dmae_opcode_add_comp(opcode, comp_type); return opcode; } + +#ifndef BNX2X_IOV /* BNX2X_UPSTREAM */ +static +#endif void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, u8 src_type, u8 dst_type) { @@ -612,18 +575,21 @@ void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, } /* issue a dmae command over the init-channel and wailt for completion */ +#ifndef BNX2X_IOV /* BNX2X_UPSTREAM */ +static +#endif int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) { u32 *wb_comp = bnx2x_sp(bp, wb_comp); - int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 40; + int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 4000; int rc = 0; - DP(BNX2X_MSG_OFF, "data before [0x%08x 0x%08x 0x%08x 0x%08x]\n", - bp->slowpath->wb_data[0], bp->slowpath->wb_data[1], - bp->slowpath->wb_data[2], bp->slowpath->wb_data[3]); - - /* lock the dmae channel */ - mutex_lock(&bp->dmae_mutex); + /* + * Lock the dmae channel. Disable BHs to prevent a dead-lock + * as long as this code is called both from syscall context and + * from ndo_set_rx_mode() flow that may be called from BH. + */ + spin_lock_bh(&bp->dmae_lock); /* reset completion */ *wb_comp = 0; @@ -634,9 +600,10 @@ int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) /* wait for completion */ udelay(5); while ((*wb_comp & ~DMAE_PCI_ERR_FLAG) != DMAE_COMP_VAL) { - DP(BNX2X_MSG_OFF, "wb_comp 0x%08x\n", *wb_comp); - if (!cnt) { + if (!cnt || + (bp->recovery_state != BNX2X_RECOVERY_DONE && + bp->recovery_state != BNX2X_RECOVERY_NIC_LOADING)) { BNX2X_ERR("DMAE timeout!\n"); rc = DMAE_TIMEOUT; goto unlock; @@ -649,14 +616,8 @@ int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) rc = DMAE_PCI_ERROR; } - DP(BNX2X_MSG_OFF, "data after [0x%08x 0x%08x 0x%08x 0x%08x]\n", - bp->slowpath->wb_data[0], bp->slowpath->wb_data[1], - bp->slowpath->wb_data[2], bp->slowpath->wb_data[3]); - - - unlock: - mutex_unlock(&bp->dmae_mutex); + spin_unlock_bh(&bp->dmae_lock); return rc; } @@ -668,9 +629,10 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, if (!bp->dmae_ready) { u32 *data = bnx2x_sp(bp, wb_data[0]); - DP(BNX2X_MSG_OFF, "DMAE is not ready (dst_addr %08x len32 %d)" - " using indirect\n", dst_addr, len32); - bnx2x_init_ind_wr(bp, dst_addr, data, len32); + if (CHIP_IS_E1(bp)) + bnx2x_init_ind_wr(bp, dst_addr, data, len32); + else + bnx2x_init_str_wr(bp, dst_addr, data, len32); return; } @@ -684,8 +646,6 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, dmae.dst_addr_hi = 0; dmae.len = len32; - bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF); - /* issue the command and wait for completion */ bnx2x_issue_dmae_with_comp(bp, &dmae); } @@ -698,10 +658,13 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) u32 *data = bnx2x_sp(bp, wb_data[0]); int i; - DP(BNX2X_MSG_OFF, "DMAE is not ready (src_addr %08x len32 %d)" - " using indirect\n", src_addr, len32); - for (i = 0; i < len32; i++) - data[i] = bnx2x_reg_rd_ind(bp, src_addr + i*4); + if (CHIP_IS_E1(bp)) + for (i = 0; i < len32; i++) + data[i] = bnx2x_reg_rd_ind(bp, src_addr + i*4); + else + for (i = 0; i < len32; i++) + data[i] = REG_RD(bp, src_addr + i*4); + return; } @@ -715,14 +678,12 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data)); dmae.len = len32; - bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_OFF); - /* issue the command and wait for completion */ bnx2x_issue_dmae_with_comp(bp, &dmae); } -void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, - u32 addr, u32 len) +static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, + u32 addr, u32 len) { int dmae_wr_max = DMAE_LEN32_WR_MAX(bp); int offset = 0; @@ -737,27 +698,6 @@ void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, bnx2x_write_dmae(bp, phys_addr + offset, addr + offset, len); } -/* used only for slowpath so not inlined */ -static void bnx2x_wb_wr(struct bnx2x *bp, int reg, u32 val_hi, u32 val_lo) -{ - u32 wb_write[2]; - - wb_write[0] = val_hi; - wb_write[1] = val_lo; - REG_WR_DMAE(bp, reg, wb_write, 2); -} - -#ifdef USE_WB_RD -static u64 bnx2x_wb_rd(struct bnx2x *bp, int reg) -{ - u32 wb_data[2]; - - REG_RD_DMAE(bp, reg, wb_data, 2); - - return HILO_U64(wb_data[0], wb_data[1]); -} -#endif - static int bnx2x_mc_assert(struct bnx2x *bp) { char last_idx; @@ -783,8 +723,7 @@ static int bnx2x_mc_assert(struct bnx2x *bp) XSTORM_ASSERT_LIST_OFFSET(i) + 12); if (row0 != COMMON_ASM_INVALID_ASSERT_OPCODE) { - BNX2X_ERR("XSTORM_ASSERT_INDEX 0x%x = 0x%08x" - " 0x%08x 0x%08x 0x%08x\n", + BNX2X_ERR("XSTORM_ASSERT_INDEX 0x%x = 0x%08x 0x%08x 0x%08x 0x%08x\n", i, row3, row2, row1, row0); rc++; } else { @@ -811,8 +750,7 @@ static int bnx2x_mc_assert(struct bnx2x *bp) TSTORM_ASSERT_LIST_OFFSET(i) + 12); if (row0 != COMMON_ASM_INVALID_ASSERT_OPCODE) { - BNX2X_ERR("TSTORM_ASSERT_INDEX 0x%x = 0x%08x" - " 0x%08x 0x%08x 0x%08x\n", + BNX2X_ERR("TSTORM_ASSERT_INDEX 0x%x = 0x%08x 0x%08x 0x%08x 0x%08x\n", i, row3, row2, row1, row0); rc++; } else { @@ -839,8 +777,7 @@ static int bnx2x_mc_assert(struct bnx2x *bp) CSTORM_ASSERT_LIST_OFFSET(i) + 12); if (row0 != COMMON_ASM_INVALID_ASSERT_OPCODE) { - BNX2X_ERR("CSTORM_ASSERT_INDEX 0x%x = 0x%08x" - " 0x%08x 0x%08x 0x%08x\n", + BNX2X_ERR("CSTORM_ASSERT_INDEX 0x%x = 0x%08x 0x%08x 0x%08x 0x%08x\n", i, row3, row2, row1, row0); rc++; } else { @@ -867,8 +804,7 @@ static int bnx2x_mc_assert(struct bnx2x *bp) USTORM_ASSERT_LIST_OFFSET(i) + 12); if (row0 != COMMON_ASM_INVALID_ASSERT_OPCODE) { - BNX2X_ERR("USTORM_ASSERT_INDEX 0x%x = 0x%08x" - " 0x%08x 0x%08x 0x%08x\n", + BNX2X_ERR("USTORM_ASSERT_INDEX 0x%x = 0x%08x 0x%08x 0x%08x 0x%08x\n", i, row3, row2, row1, row0); rc++; } else { @@ -879,9 +815,9 @@ static int bnx2x_mc_assert(struct bnx2x *bp) return rc; } -static void bnx2x_fw_dump(struct bnx2x *bp) +void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl) { - u32 addr; + u32 addr, val; u32 mark, offset; __be32 data[9]; int word; @@ -890,31 +826,58 @@ static void bnx2x_fw_dump(struct bnx2x *bp) BNX2X_ERR("NO MCP - can not dump\n"); return; } + netdev_printk(lvl, bp->dev, "bc %d.%d.%d\n", + (bp->common.bc_ver & 0xff0000) >> 16, + (bp->common.bc_ver & 0xff00) >> 8, + (bp->common.bc_ver & 0xff)); + + val = REG_RD(bp, MCP_REG_MCPR_CPU_PROGRAM_COUNTER); + if (val == REG_RD(bp, MCP_REG_MCPR_CPU_PROGRAM_COUNTER)) + BNX2X_ERR("%s" "MCP PC at 0x%x\n", lvl, val); if (BP_PATH(bp) == 0) trace_shmem_base = bp->common.shmem_base; else trace_shmem_base = SHMEM2_RD(bp, other_shmem_base_addr); - addr = trace_shmem_base - 0x0800 + 4; + addr = trace_shmem_base - 0x800; + + /* validate TRCB signature */ + mark = REG_RD(bp, addr); + if (mark != MFW_TRACE_SIGNATURE) { + BNX2X_ERR("Trace buffer signature is missing."); + return ; + } + + /* read cyclic buffer pointer */ + addr += 4; mark = REG_RD(bp, addr); mark = (CHIP_IS_E1x(bp) ? MCP_REG_MCPR_SCRATCH : MCP_A_REG_MCPR_SCRATCH) + ((mark + 0x3) & ~0x3) - 0x08000000; - pr_err("begin fw dump (mark 0x%x)\n", mark); + printk("%s" "begin fw dump (mark 0x%x)\n", lvl, mark); - pr_err(""); + printk("%s", lvl); + + /* dump buffer after the mark */ for (offset = mark; offset <= trace_shmem_base; offset += 0x8*4) { for (word = 0; word < 8; word++) data[word] = htonl(REG_RD(bp, offset + 4*word)); data[8] = 0x0; pr_cont("%s", (char *)data); } + + /* dump buffer before the mark */ for (offset = addr + 4; offset <= mark; offset += 0x8*4) { for (word = 0; word < 8; word++) data[word] = htonl(REG_RD(bp, offset + 4*word)); data[8] = 0x0; pr_cont("%s", (char *)data); } - pr_err("end of fw dump\n"); + printk("%s" "end of fw dump\n", lvl); +} + +static inline void bnx2x_fw_dump(struct bnx2x *bp) +{ + bnx2x_fw_dump_lvl(bp, KERN_ERR); } void bnx2x_panic_dump(struct bnx2x *bp) @@ -925,17 +888,18 @@ void bnx2x_panic_dump(struct bnx2x *bp) int func = BP_FUNC(bp); #ifdef BNX2X_STOP_ON_ERROR u16 start = 0, end = 0; + u8 cos; #endif bp->stats_state = STATS_STATE_DISABLED; + bp->eth_stats.unrecoverable_error++; DP(BNX2X_MSG_STATS, "stats_state - DISABLED\n"); BNX2X_ERR("begin crash dump -----------------\n"); /* Indices */ /* Common */ - BNX2X_ERR("def_idx(0x%x) def_att_idx(0x%x) attn_state(0x%x)" - " spq_prod_idx(0x%x) next_stats_cnt(0x%x)\n", + BNX2X_ERR("def_idx(0x%x) def_att_idx(0x%x) attn_state(0x%x) spq_prod_idx(0x%x) next_stats_cnt(0x%x)\n", bp->def_idx, bp->def_att_idx, bp->attn_state, bp->spq_prod_idx, bp->stats_counter); BNX2X_ERR("DSB: attn bits(0x%x) ack(0x%x) id(0x%x) idx(0x%x)\n", @@ -946,23 +910,22 @@ void bnx2x_panic_dump(struct bnx2x *bp) BNX2X_ERR(" def ("); for (i = 0; i < HC_SP_SB_MAX_INDICES; i++) pr_cont("0x%x%s", - bp->def_status_blk->sp_sb.index_values[i], - (i == HC_SP_SB_MAX_INDICES - 1) ? ") " : " "); + bp->def_status_blk->sp_sb.index_values[i], + (i == HC_SP_SB_MAX_INDICES - 1) ? ") " : " "); for (i = 0; i < sizeof(struct hc_sp_status_block_data)/sizeof(u32); i++) - *((u32*)&sp_sb_data + i) = REG_RD(bp, BAR_CSTRORM_INTMEM + + *((u32 *)&sp_sb_data + i) = REG_RD(bp, BAR_CSTRORM_INTMEM + CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(func) + i*sizeof(u32)); - pr_cont("igu_sb_id(0x%x) igu_seg_id (0x%x) " - "pf_id(0x%x) vnic_id(0x%x) " - "vf_id(0x%x) vf_valid (0x%x)\n", + pr_cont("igu_sb_id(0x%x) igu_seg_id(0x%x) pf_id(0x%x) vnic_id(0x%x) vf_id(0x%x) vf_valid (0x%x) state(0x%x)\n", sp_sb_data.igu_sb_id, sp_sb_data.igu_seg_id, sp_sb_data.p_func.pf_id, sp_sb_data.p_func.vnic_id, sp_sb_data.p_func.vf_id, - sp_sb_data.p_func.vf_valid); + sp_sb_data.p_func.vf_valid, + sp_sb_data.state); for_each_eth_queue(bp, i) { @@ -970,44 +933,46 @@ void bnx2x_panic_dump(struct bnx2x *bp) int loop; struct hc_status_block_data_e2 sb_data_e2; struct hc_status_block_data_e1x sb_data_e1x; - struct hc_status_block_sm * hc_sm_p = - CHIP_IS_E2(bp) ? - sb_data_e2.common.state_machine : - sb_data_e1x.common.state_machine; - struct hc_index_data * hc_index_p = - CHIP_IS_E2(bp) ? - sb_data_e2.index_data : - sb_data_e1x.index_data; - int data_size; + struct hc_status_block_sm *hc_sm_p = + CHIP_IS_E1x(bp) ? + sb_data_e1x.common.state_machine : + sb_data_e2.common.state_machine; + struct hc_index_data *hc_index_p = + CHIP_IS_E1x(bp) ? + sb_data_e1x.index_data : + sb_data_e2.index_data; + u8 data_size, cos; u32 *sb_data_p; + struct bnx2x_fp_txdata txdata; /* Rx */ - BNX2X_ERR("fp%d: rx_bd_prod(0x%x) rx_bd_cons(0x%x)" - " rx_comp_prod(0x%x)" - " rx_comp_cons(0x%x) *rx_cons_sb(0x%x)\n", + BNX2X_ERR("fp%d: rx_bd_prod(0x%x) rx_bd_cons(0x%x) rx_comp_prod(0x%x) rx_comp_cons(0x%x) *rx_cons_sb(0x%x)\n", i, fp->rx_bd_prod, fp->rx_bd_cons, fp->rx_comp_prod, fp->rx_comp_cons, le16_to_cpu(*fp->rx_cons_sb)); - BNX2X_ERR(" rx_sge_prod(0x%x) last_max_sge(0x%x)" - " fp_hc_idx(0x%x) \n", + BNX2X_ERR(" rx_sge_prod(0x%x) last_max_sge(0x%x) fp_hc_idx(0x%x)\n", fp->rx_sge_prod, fp->last_max_sge, le16_to_cpu(fp->fp_hc_idx)); /* Tx */ - BNX2X_ERR("fp%d: tx_pkt_prod(0x%x) tx_pkt_cons(0x%x)" - " tx_bd_prod(0x%x) tx_bd_cons(0x%x)" - " *tx_cons_sb(0x%x)\n", - i, fp->tx_pkt_prod, fp->tx_pkt_cons, fp->tx_bd_prod, - fp->tx_bd_cons, le16_to_cpu(*fp->tx_cons_sb)); + for_each_cos_in_tx_queue(fp, cos) + { + txdata = *fp->txdata_ptr[cos]; + BNX2X_ERR("fp%d: tx_pkt_prod(0x%x) tx_pkt_cons(0x%x) tx_bd_prod(0x%x) tx_bd_cons(0x%x) *tx_cons_sb(0x%x)\n", + i, txdata.tx_pkt_prod, + txdata.tx_pkt_cons, txdata.tx_bd_prod, + txdata.tx_bd_cons, + le16_to_cpu(*txdata.tx_cons_sb)); + } - loop = CHIP_IS_E2(bp) ? - HC_SB_MAX_INDICES_E2 : HC_SB_MAX_INDICES_E1X; + loop = CHIP_IS_E1x(bp) ? + HC_SB_MAX_INDICES_E1X : HC_SB_MAX_INDICES_E2; /* host sb data */ #ifdef BCM_CNIC if (IS_FCOE_FP(fp)) - continue; + continue; #endif BNX2X_ERR(" run indexes ("); for (j = 0; j < HC_SB_MAX_SM; j++) @@ -1021,54 +986,50 @@ void bnx2x_panic_dump(struct bnx2x *bp) fp->sb_index_values[j], (j == loop - 1) ? ")" : " "); /* fw sb data */ - data_size = CHIP_IS_E2(bp) ? - sizeof(struct hc_status_block_data_e2): - sizeof(struct hc_status_block_data_e1x); + data_size = CHIP_IS_E1x(bp) ? + sizeof(struct hc_status_block_data_e1x) : + sizeof(struct hc_status_block_data_e2); data_size /= sizeof(u32); - sb_data_p = CHIP_IS_E2(bp) ? - (u32*)&sb_data_e2: - (u32*)&sb_data_e1x; + sb_data_p = CHIP_IS_E1x(bp) ? + (u32 *)&sb_data_e1x : + (u32 *)&sb_data_e2; /* copy sb data in here */ - for (j = 0; j < data_size ; j++) - *(sb_data_p + j) = REG_RD(bp, BAR_CSTRORM_INTMEM + - CSTORM_STATUS_BLOCK_DATA_OFFSET(fp->fw_sb_id) + - j * sizeof(u32)); + for (j = 0; j < data_size; j++) + *(sb_data_p + j) = REG_RD(bp, BAR_CSTRORM_INTMEM + + CSTORM_STATUS_BLOCK_DATA_OFFSET(fp->fw_sb_id) + + j * sizeof(u32)); - if (CHIP_IS_E2(bp)) { - pr_cont("pf_id(0x%x) vf_id (0x%x) vf_valid(0x%x) " - "vnic_id(0x%x) same_igu_sb_1b(0x%x)\n", + if (!CHIP_IS_E1x(bp)) { + pr_cont("pf_id(0x%x) vf_id(0x%x) vf_valid(0x%x) vnic_id(0x%x) same_igu_sb_1b(0x%x) state(0x%x)\n", sb_data_e2.common.p_func.pf_id, sb_data_e2.common.p_func.vf_id, sb_data_e2.common.p_func.vf_valid, sb_data_e2.common.p_func.vnic_id, - sb_data_e2.common.same_igu_sb_1b); + sb_data_e2.common.same_igu_sb_1b, + sb_data_e2.common.state); } else { - pr_cont("pf_id(0x%x) vf_id (0x%x) vf_valid(0x%x) " - "vnic_id(0x%x) same_igu_sb_1b(0x%x)\n", + pr_cont("pf_id(0x%x) vf_id(0x%x) vf_valid(0x%x) vnic_id(0x%x) same_igu_sb_1b(0x%x) state(0x%x)\n", sb_data_e1x.common.p_func.pf_id, sb_data_e1x.common.p_func.vf_id, sb_data_e1x.common.p_func.vf_valid, sb_data_e1x.common.p_func.vnic_id, - sb_data_e1x.common.same_igu_sb_1b); + sb_data_e1x.common.same_igu_sb_1b, + sb_data_e1x.common.state); } /* SB_SMs data */ for (j = 0; j < HC_SB_MAX_SM; j++) { - pr_cont("SM[%d] __flags (0x%x) " - "igu_sb_id (0x%x) igu_seg_id(0x%x) " - "time_to_expire (0x%x) " - "timer_value(0x%x)\n", j, - hc_sm_p[j].__flags, - hc_sm_p[j].igu_sb_id, - hc_sm_p[j].igu_seg_id, - hc_sm_p[j].time_to_expire, - hc_sm_p[j].timer_value); + pr_cont("SM[%d] __flags (0x%x) igu_sb_id (0x%x) igu_seg_id(0x%x) time_to_expire (0x%x) timer_value(0x%x)\n", + j, hc_sm_p[j].__flags, + hc_sm_p[j].igu_sb_id, + hc_sm_p[j].igu_seg_id, + hc_sm_p[j].time_to_expire, + hc_sm_p[j].timer_value); } /* Indecies data */ for (j = 0; j < loop; j++) { - pr_cont("INDEX[%d] flags (0x%x) " - "timeout (0x%x)\n", j, + pr_cont("INDEX[%d] flags (0x%x) timeout (0x%x)\n", j, hc_index_p[j].flags, hc_index_p[j].timeout); } @@ -1087,7 +1048,7 @@ void bnx2x_panic_dump(struct bnx2x *bp) struct sw_rx_bd *sw_bd = &fp->rx_buf_ring[j]; BNX2X_ERR("fp%d: rx_bd[%x]=[%x:%x] sw_bd=[%p]\n", - i, j, rx_bd[1], rx_bd[0], sw_bd->skb); + i, j, rx_bd[1], rx_bd[0], sw_bd->data); } start = RX_SGE(fp->rx_sge_prod); @@ -1113,29 +1074,35 @@ void bnx2x_panic_dump(struct bnx2x *bp) /* Tx */ for_each_tx_queue(bp, i) { struct bnx2x_fastpath *fp = &bp->fp[i]; + for_each_cos_in_tx_queue(fp, cos) { + struct bnx2x_fp_txdata *txdata = fp->txdata_ptr[cos]; - start = TX_BD(le16_to_cpu(*fp->tx_cons_sb) - 10); - end = TX_BD(le16_to_cpu(*fp->tx_cons_sb) + 245); - for (j = start; j != end; j = TX_BD(j + 1)) { - struct sw_tx_bd *sw_bd = &fp->tx_buf_ring[j]; + start = TX_BD(le16_to_cpu(*txdata->tx_cons_sb) - 10); + end = TX_BD(le16_to_cpu(*txdata->tx_cons_sb) + 245); + for (j = start; j != end; j = TX_BD(j + 1)) { + struct sw_tx_bd *sw_bd = + &txdata->tx_buf_ring[j]; - BNX2X_ERR("fp%d: packet[%x]=[%p,%x]\n", - i, j, sw_bd->skb, sw_bd->first_bd); - } + BNX2X_ERR("fp%d: txdata %d, packet[%x]=[%p,%x]\n", + i, cos, j, sw_bd->skb, + sw_bd->first_bd); + } - start = TX_BD(fp->tx_bd_cons - 10); - end = TX_BD(fp->tx_bd_cons + 254); - for (j = start; j != end; j = TX_BD(j + 1)) { - u32 *tx_bd = (u32 *)&fp->tx_desc_ring[j]; + start = TX_BD(txdata->tx_bd_cons - 10); + end = TX_BD(txdata->tx_bd_cons + 254); + for (j = start; j != end; j = TX_BD(j + 1)) { + u32 *tx_bd = (u32 *)&txdata->tx_desc_ring[j]; - BNX2X_ERR("fp%d: tx_bd[%x]=[%x:%x:%x:%x]\n", - i, j, tx_bd[0], tx_bd[1], tx_bd[2], tx_bd[3]); + BNX2X_ERR("fp%d: txdata %d, tx_bd[%x]=[%x:%x:%x:%x]\n", + i, cos, j, tx_bd[0], tx_bd[1], + tx_bd[2], tx_bd[3]); + } } } #endif bnx2x_fw_dump(bp); #ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ - bp->msg_enable |= NETIF_MSG_PROBE; + bp->msg_enable |= NETIF_MSG_HW; BNX2X_ERR("Idle check (1st round) ----------\n"); bnx2x_idle_chk(bp); BNX2X_ERR("Idle check (2nd round) ----------\n"); @@ -1143,8 +1110,14 @@ void bnx2x_panic_dump(struct bnx2x *bp) #endif bnx2x_mc_assert(bp); BNX2X_ERR("end crash dump -----------------\n"); -} +#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ + if (psod_on_panic) { + msleep(100); + BUG_ON(1); + } +#endif +} /* * FLR Support for E2 @@ -1153,8 +1126,8 @@ void bnx2x_panic_dump(struct bnx2x *bp) * initialization. */ #define FLR_WAIT_USEC 10000 /* 10 miliseconds */ -#define FLR_WAIT_INTERAVAL 50 /* usec */ -#define FLR_POLL_CNT (FLR_WAIT_USEC/FLR_WAIT_INTERAVAL) /* 200 */ +#define FLR_WAIT_INTERVAL 50 /* usec */ +#define FLR_POLL_CNT (FLR_WAIT_USEC/FLR_WAIT_INTERVAL) /* 200 */ struct pbf_pN_buf_regs { int pN; @@ -1187,7 +1160,7 @@ static void bnx2x_pbf_pN_buf_flushed(struct bnx2x *bp, while ((crd != init_crd) && ((u32)SUB_S32(crd_freed, crd_freed_start) < (init_crd - crd_start))) { if (cur_cnt--) { - udelay(FLR_WAIT_INTERAVAL); + udelay(FLR_WAIT_INTERVAL); crd = REG_RD(bp, regs->crd); crd_freed = REG_RD(bp, regs->crd_freed); } else { @@ -1201,7 +1174,7 @@ static void bnx2x_pbf_pN_buf_flushed(struct bnx2x *bp, } } DP(BNX2X_MSG_SP, "Waited %d*%d usec for PBF tx buffer[%d]\n", - poll_count-cur_cnt, FLR_WAIT_INTERAVAL, regs->pN); + poll_count-cur_cnt, FLR_WAIT_INTERVAL, regs->pN); } static void bnx2x_pbf_pN_cmd_flushed(struct bnx2x *bp, @@ -1219,11 +1192,10 @@ static void bnx2x_pbf_pN_cmd_flushed(struct bnx2x *bp, while (occup && ((u32)SUB_S32(freed, freed_start) < to_free)) { if (cur_cnt--) { - udelay(FLR_WAIT_INTERAVAL); + udelay(FLR_WAIT_INTERVAL); occup = REG_RD(bp, regs->lines_occup); freed = REG_RD(bp, regs->lines_freed); - } - else { + } else { DP(BNX2X_MSG_SP, "PBF cmd queue[%d] timed out\n", regs->pN); DP(BNX2X_MSG_SP, "OCCUPANCY[%d] : s:%x\n", @@ -1234,23 +1206,23 @@ static void bnx2x_pbf_pN_cmd_flushed(struct bnx2x *bp, } } DP(BNX2X_MSG_SP, "Waited %d*%d usec for PBF cmd queue[%d]\n", - poll_count-cur_cnt, FLR_WAIT_INTERAVAL, regs->pN); + poll_count-cur_cnt, FLR_WAIT_INTERVAL, regs->pN); } -static inline u32 bnx2x_flr_clnup_reg_poll(struct bnx2x* bp, u32 reg, +static inline u32 bnx2x_flr_clnup_reg_poll(struct bnx2x *bp, u32 reg, u32 expected, u32 poll_count) { u32 cur_cnt = poll_count; u32 val; while ((val = REG_RD(bp, reg)) != expected && cur_cnt--) - udelay(FLR_WAIT_INTERAVAL); + udelay(FLR_WAIT_INTERVAL); return val; } -int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x* bp, u32 reg, - char* msg, u32 poll_cnt) +int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x *bp, u32 reg, + char *msg, u32 poll_cnt) { u32 val = bnx2x_flr_clnup_reg_poll(bp, reg, 0, poll_cnt); if (val != 0) { @@ -1260,9 +1232,8 @@ int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x* bp, u32 reg, return 0; } -/* Common routines with VF FLR cleanup -*/ -u32 bnx2x_flr_clnup_poll_count(struct bnx2x* bp) +/* Common routines with VF FLR cleanup */ +u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp) { /* adjust polling timeout */ if (CHIP_REV_IS_EMUL(bp)) @@ -1277,75 +1248,104 @@ u32 bnx2x_flr_clnup_poll_count(struct bnx2x* bp) void bnx2x_tx_hw_flushed(struct bnx2x *bp, u32 poll_count) { struct pbf_pN_cmd_regs cmd_regs[] = { - {0, PBF_REG_P0_TQ_OCCUPANCY, - PBF_REG_P0_TQ_LINES_FREED_CNT}, - {1, PBF_REG_P1_TQ_OCCUPANCY, - PBF_REG_P1_TQ_LINES_FREED_CNT}, - {4, PBF_REG_P4_TQ_OCCUPANCY, - PBF_REG_P4_TQ_LINES_FREED_CNT} + {0, (CHIP_IS_E3B0(bp)) ? + PBF_REG_TQ_OCCUPANCY_Q0 : + PBF_REG_P0_TQ_OCCUPANCY, + (CHIP_IS_E3B0(bp)) ? + PBF_REG_TQ_LINES_FREED_CNT_Q0 : + PBF_REG_P0_TQ_LINES_FREED_CNT}, + {1, (CHIP_IS_E3B0(bp)) ? + PBF_REG_TQ_OCCUPANCY_Q1 : + PBF_REG_P1_TQ_OCCUPANCY, + (CHIP_IS_E3B0(bp)) ? + PBF_REG_TQ_LINES_FREED_CNT_Q1 : + PBF_REG_P1_TQ_LINES_FREED_CNT}, + {4, (CHIP_IS_E3B0(bp)) ? + PBF_REG_TQ_OCCUPANCY_LB_Q : + PBF_REG_P4_TQ_OCCUPANCY, + (CHIP_IS_E3B0(bp)) ? + PBF_REG_TQ_LINES_FREED_CNT_LB_Q : + PBF_REG_P4_TQ_LINES_FREED_CNT} }; struct pbf_pN_buf_regs buf_regs[] = { - {0, PBF_REG_P0_INIT_CRD, - PBF_REG_P0_CREDIT, - PBF_REG_P0_INTERNAL_CRD_FREED_CNT}, - {1, PBF_REG_P1_INIT_CRD, - PBF_REG_P1_CREDIT, - PBF_REG_P1_INTERNAL_CRD_FREED_CNT}, - {4, PBF_REG_P4_INIT_CRD, - PBF_REG_P4_CREDIT, - PBF_REG_P4_INTERNAL_CRD_FREED_CNT} + {0, (CHIP_IS_E3B0(bp)) ? + PBF_REG_INIT_CRD_Q0 : + PBF_REG_P0_INIT_CRD , + (CHIP_IS_E3B0(bp)) ? + PBF_REG_CREDIT_Q0 : + PBF_REG_P0_CREDIT, + (CHIP_IS_E3B0(bp)) ? + PBF_REG_INTERNAL_CRD_FREED_CNT_Q0 : + PBF_REG_P0_INTERNAL_CRD_FREED_CNT}, + {1, (CHIP_IS_E3B0(bp)) ? + PBF_REG_INIT_CRD_Q1 : + PBF_REG_P1_INIT_CRD, + (CHIP_IS_E3B0(bp)) ? + PBF_REG_CREDIT_Q1 : + PBF_REG_P1_CREDIT, + (CHIP_IS_E3B0(bp)) ? + PBF_REG_INTERNAL_CRD_FREED_CNT_Q1 : + PBF_REG_P1_INTERNAL_CRD_FREED_CNT}, + {4, (CHIP_IS_E3B0(bp)) ? + PBF_REG_INIT_CRD_LB_Q : + PBF_REG_P4_INIT_CRD, + (CHIP_IS_E3B0(bp)) ? + PBF_REG_CREDIT_LB_Q : + PBF_REG_P4_CREDIT, + (CHIP_IS_E3B0(bp)) ? + PBF_REG_INTERNAL_CRD_FREED_CNT_LB_Q : + PBF_REG_P4_INTERNAL_CRD_FREED_CNT}, }; int i; /* Verify the command queues are flushed P0, P1, P4 */ - for (i = 0; i < sizeof(cmd_regs)/sizeof(struct pbf_pN_cmd_regs); i++) + for (i = 0; i < ARRAY_SIZE(cmd_regs); i++) bnx2x_pbf_pN_cmd_flushed(bp, &cmd_regs[i], poll_count); /* Verify the transmission buffers are flushed P0, P1, P4 */ - for (i = 0; i < sizeof(buf_regs)/sizeof(struct pbf_pN_buf_regs); i++) + for (i = 0; i < ARRAY_SIZE(buf_regs); i++) bnx2x_pbf_pN_buf_flushed(bp, &buf_regs[i], poll_count); } #define OP_GEN_PARAM(param) \ - (param << SDM_OP_GEN_COMP_PARAM_SHIFT) & \ - SDM_OP_GEN_COMP_PARAM + (((param) << SDM_OP_GEN_COMP_PARAM_SHIFT) & SDM_OP_GEN_COMP_PARAM) #define OP_GEN_TYPE(type) \ - (type << SDM_OP_GEN_COMP_TYPE_SHIFT) & \ - SDM_OP_GEN_COMP_TYPE + (((type) << SDM_OP_GEN_COMP_TYPE_SHIFT) & SDM_OP_GEN_COMP_TYPE) #define OP_GEN_AGG_VECT(index) \ - (index << SDM_OP_GEN_AGG_VECT_IDX_SHIFT) & \ - SDM_OP_GEN_AGG_VECT_IDX + (((index) << SDM_OP_GEN_AGG_VECT_IDX_SHIFT) & SDM_OP_GEN_AGG_VECT_IDX) -int bnx2x_send_final_clnup(struct bnx2x* bp, u8 clnup_func, u32 poll_cnt) +int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, u32 poll_cnt) { - struct sdm_op_gen op_gen = {0}; - + u32 op_gen_command = 0; u32 comp_addr = BAR_CSTRORM_INTMEM + CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(clnup_func); int ret = 0; if (REG_RD(bp, comp_addr)) { - BNX2X_ERR("Cleanup complete is not 0\n"); - return 1; + BNX2X_ERR("Cleanup complete was not 0 before sending\n"); + return 1; } - op_gen.command |= OP_GEN_PARAM(XSTORM_AGG_INT_FINAL_CLEANUP_INDEX); - op_gen.command |= OP_GEN_TYPE(XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE); - op_gen.command |= OP_GEN_AGG_VECT(clnup_func); - op_gen.command |= 1 << SDM_OP_GEN_AGG_VECT_IDX_VALID_SHIFT; + op_gen_command |= OP_GEN_PARAM(XSTORM_AGG_INT_FINAL_CLEANUP_INDEX); + op_gen_command |= OP_GEN_TYPE(XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE); + op_gen_command |= OP_GEN_AGG_VECT(clnup_func); + op_gen_command |= 1 << SDM_OP_GEN_AGG_VECT_IDX_VALID_SHIFT; - DP(BNX2X_MSG_SP, "FW Final cleanup\n"); - REG_WR(bp,XSDM_REG_OPERATION_GEN, op_gen.command); + DP(BNX2X_MSG_SP, "sending FW Final cleanup\n"); + REG_WR(bp, XSDM_REG_OPERATION_GEN, op_gen_command); if (bnx2x_flr_clnup_reg_poll(bp, comp_addr, 1, poll_cnt) != 1) { BNX2X_ERR("FW final cleanup did not succeed\n"); - ret = 1; + DP(BNX2X_MSG_SP, "At timeout completion address contained %x\n", + (REG_RD(bp, comp_addr))); + bnx2x_panic(); + return 1; } /* Zero completion for nxt FLR */ REG_WR(bp, comp_addr, 0); @@ -1358,17 +1358,17 @@ u8 bnx2x_is_pcie_pending(struct pci_dev *dev) int pos; u16 status; - pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + pos = pci_pcie_cap(dev); if (!pos) return false; pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status); - return (status & PCI_EXP_DEVSTA_TRPND); + return status & PCI_EXP_DEVSTA_TRPND; } /* PF FLR specific routines */ -static int bnx2x_poll_hw_usage_counters(struct bnx2x* bp, u32 poll_cnt) +static int bnx2x_poll_hw_usage_counters(struct bnx2x *bp, u32 poll_cnt) { /* wait for CFC PF usage-counter to zero (includes all the VFs) */ @@ -1415,37 +1415,37 @@ static int bnx2x_poll_hw_usage_counters(struct bnx2x* bp, u32 poll_cnt) return 0; } -static void bnx2x_hw_enable_status(struct bnx2x* bp) +static void bnx2x_hw_enable_status(struct bnx2x *bp) { u32 val; - val = REG_RD(bp,CFC_REG_WEAK_ENABLE_PF); - DP(BNX2X_MSG_SP, "CFC_REG_WEAK_ENABLE_PF is 0x%x\n",val); + val = REG_RD(bp, CFC_REG_WEAK_ENABLE_PF); + DP(BNX2X_MSG_SP, "CFC_REG_WEAK_ENABLE_PF is 0x%x\n", val); - val = REG_RD(bp,PBF_REG_DISABLE_PF); + val = REG_RD(bp, PBF_REG_DISABLE_PF); DP(BNX2X_MSG_SP, "PBF_REG_DISABLE_PF is 0x%x\n", val); - val = REG_RD(bp,IGU_REG_PCI_PF_MSI_EN); - DP(BNX2X_MSG_SP, "IGU_REG_PCI_PF_MSI_EN is 0x%x\n",val); + val = REG_RD(bp, IGU_REG_PCI_PF_MSI_EN); + DP(BNX2X_MSG_SP, "IGU_REG_PCI_PF_MSI_EN is 0x%x\n", val); - val = REG_RD(bp,IGU_REG_PCI_PF_MSIX_EN); - DP(BNX2X_MSG_SP, "IGU_REG_PCI_PF_MSIX_EN is 0x%x\n",val); + val = REG_RD(bp, IGU_REG_PCI_PF_MSIX_EN); + DP(BNX2X_MSG_SP, "IGU_REG_PCI_PF_MSIX_EN is 0x%x\n", val); - val = REG_RD(bp,IGU_REG_PCI_PF_MSIX_FUNC_MASK); - DP(BNX2X_MSG_SP, "IGU_REG_PCI_PF_MSIX_FUNC_MASK is 0x%x\n",val); + val = REG_RD(bp, IGU_REG_PCI_PF_MSIX_FUNC_MASK); + DP(BNX2X_MSG_SP, "IGU_REG_PCI_PF_MSIX_FUNC_MASK is 0x%x\n", val); - val = REG_RD(bp,PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR); - DP(BNX2X_MSG_SP, "PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR is 0x%x\n",val); + val = REG_RD(bp, PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR); + DP(BNX2X_MSG_SP, "PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR is 0x%x\n", val); - val = REG_RD(bp,PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR); - DP(BNX2X_MSG_SP, "PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR is 0x%x\n",val); + val = REG_RD(bp, PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR); + DP(BNX2X_MSG_SP, "PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR is 0x%x\n", val); val = REG_RD(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER); DP(BNX2X_MSG_SP, "PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER is 0x%x\n", val); } -int bnx2x_pf_flr_clnup(struct bnx2x* bp) +int bnx2x_pf_flr_clnup(struct bnx2x *bp) { u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp); @@ -1455,8 +1455,9 @@ int bnx2x_pf_flr_clnup(struct bnx2x* bp) REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 1); /* Poll HW usage counters */ + DP(BNX2X_MSG_SP, "Polling usage counters\n"); if (bnx2x_poll_hw_usage_counters(bp, poll_cnt)) - return -EBUSY; + return -EBUSY; /* Zero the igu 'trailing edge' and 'leading edge' */ @@ -1493,14 +1494,17 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp) int port = BP_PORT(bp); u32 addr = port ? HC_REG_CONFIG_1 : HC_REG_CONFIG_0; u32 val = REG_RD(bp, addr); - int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0; - int msi = (bp->flags & USING_MSI_FLAG) ? 1 : 0; + bool msix = (bp->flags & USING_MSIX_FLAG) ? true : false; + bool single_msix = (bp->flags & USING_SINGLE_MSIX_FLAG) ? true : false; + bool msi = (bp->flags & USING_MSI_FLAG) ? true : false; if (msix) { val &= ~(HC_CONFIG_0_REG_SINGLE_ISR_EN_0 | HC_CONFIG_0_REG_INT_LINE_EN_0); val |= (HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 | HC_CONFIG_0_REG_ATTN_BIT_EN_0); + if (single_msix) + val |= HC_CONFIG_0_REG_SINGLE_ISR_EN_0; } else if (msi) { val &= ~HC_CONFIG_0_REG_INT_LINE_EN_0; val |= (HC_CONFIG_0_REG_SINGLE_ISR_EN_0 | @@ -1513,9 +1517,11 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp) HC_CONFIG_0_REG_ATTN_BIT_EN_0); if (!CHIP_IS_E1(bp)) { - DP(NETIF_MSG_INTR, "write %x to HC %d (addr 0x%x)\n", - val, port, addr); + DP(NETIF_MSG_IFUP, + "write %x to HC %d (addr 0x%x)\n", val, port, addr); + REG_WR(bp, addr, val); + val &= ~HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0; } } @@ -1523,8 +1529,9 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp) if (CHIP_IS_E1(bp)) REG_WR(bp, HC_REG_INT_MASK + port*4, 0x1FFFF); - DP(NETIF_MSG_INTR, "write %x to HC %d (addr 0x%x) mode %s\n", - val, port, addr, (msix ? "MSI-X" : (msi ? "MSI" : "INTx"))); + DP(NETIF_MSG_IFUP, + "write %x to HC %d (addr 0x%x) mode %s\n", val, port, addr, + (msix ? "MSI-X" : (msi ? "MSI" : "INTx"))); REG_WR(bp, addr, val); /* @@ -1536,7 +1543,7 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp) if (!CHIP_IS_E1(bp)) { /* init leading/trailing edge */ if (IS_MF(bp)) { - val = (0xee0f | (1 << (BP_E1HVN(bp) + 4))); + val = (0xee0f | (1 << (BP_VN(bp) + 4))); if (bp->port.pmf) /* enable nig and gpio3 attention */ val |= 0x1100; @@ -1554,41 +1561,53 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp) static void bnx2x_igu_int_enable(struct bnx2x *bp) { u32 val; - int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0; - int msi = (bp->flags & USING_MSI_FLAG) ? 1 : 0; + bool msix = (bp->flags & USING_MSIX_FLAG) ? true : false; + bool single_msix = (bp->flags & USING_SINGLE_MSIX_FLAG) ? true : false; + bool msi = (bp->flags & USING_MSI_FLAG) ? true : false; val = REG_RD(bp, IGU_REG_PF_CONFIGURATION); if (msix) { val &= ~(IGU_PF_CONF_INT_LINE_EN | IGU_PF_CONF_SINGLE_ISR_EN); - val |= (IGU_PF_CONF_FUNC_EN | - IGU_PF_CONF_MSI_MSIX_EN | + val |= (IGU_PF_CONF_MSI_MSIX_EN | IGU_PF_CONF_ATTN_BIT_EN); + + if (single_msix) + val |= IGU_PF_CONF_SINGLE_ISR_EN; } else if (msi) { val &= ~IGU_PF_CONF_INT_LINE_EN; - val |= (IGU_PF_CONF_FUNC_EN | - IGU_PF_CONF_MSI_MSIX_EN | + val |= (IGU_PF_CONF_MSI_MSIX_EN | IGU_PF_CONF_ATTN_BIT_EN | IGU_PF_CONF_SINGLE_ISR_EN); } else { val &= ~IGU_PF_CONF_MSI_MSIX_EN; - val |= (IGU_PF_CONF_FUNC_EN | - IGU_PF_CONF_INT_LINE_EN | + val |= (IGU_PF_CONF_INT_LINE_EN | IGU_PF_CONF_ATTN_BIT_EN | IGU_PF_CONF_SINGLE_ISR_EN); } - DP(NETIF_MSG_INTR, "write 0x%x to IGU mode %s\n", + /* Clean previous status - need to configure igu prior to ack*/ + if ((!msix) || single_msix) { + REG_WR(bp, IGU_REG_PF_CONFIGURATION, val); + bnx2x_ack_int(bp); + } + + val |= IGU_PF_CONF_FUNC_EN; + + DP(NETIF_MSG_IFUP, "write 0x%x to IGU mode %s\n", val, (msix ? "MSI-X" : (msi ? "MSI" : "INTx"))); REG_WR(bp, IGU_REG_PF_CONFIGURATION, val); + if (val & IGU_PF_CONF_INT_LINE_EN) + pci_intx(bp->pdev, true); + barrier(); /* init leading/trailing edge */ if (IS_MF(bp)) { - val = (0xee0f | (1 << (BP_E1HVN(bp) + 4))); + val = (0xee0f | (1 << (BP_VN(bp) + 4))); if (bp->port.pmf) /* enable nig and gpio3 attention */ val |= 0x1100; @@ -1637,7 +1656,8 @@ static void bnx2x_hc_int_disable(struct bnx2x *bp) HC_CONFIG_0_REG_INT_LINE_EN_0 | HC_CONFIG_0_REG_ATTN_BIT_EN_0); - DP(NETIF_MSG_INTR, "write %x to HC %d (addr 0x%x)\n", + DP(NETIF_MSG_IFDOWN, + "write %x to HC %d (addr 0x%x)\n", val, port, addr); /* flush all outstanding writes */ @@ -1656,7 +1676,7 @@ static void bnx2x_igu_int_disable(struct bnx2x *bp) IGU_PF_CONF_INT_LINE_EN | IGU_PF_CONF_ATTN_BIT_EN); - DP(NETIF_MSG_INTR, "write %x to IGU\n", val); + DP(NETIF_MSG_IFDOWN, "write %x to IGU\n", val); /* flush all outstanding writes */ mmiowb(); @@ -1679,10 +1699,6 @@ void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw) int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0; int i, offset; - /* disable interrupt handling */ - atomic_inc(&bp->intr_sem); - smp_wmb(); /* Ensure that bp->intr_sem update is SMP-safe */ - if (disable_hw) /* prevent the HW from sending interrupts */ bnx2x_int_disable(bp); @@ -1692,7 +1708,11 @@ void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw) synchronize_irq(bp->msix_table[0].vector); offset = 1; #ifdef BCM_CNIC +#ifndef BCM_OOO /* BNX2X_UPSTREAM */ + offset++; +#else /* not BNX2X_UPSTREAM */ synchronize_irq(bp->msix_table[offset++].vector); +#endif #endif for_each_eth_queue(bp, i) synchronize_irq(bp->msix_table[offset++].vector); @@ -1701,6 +1721,7 @@ void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw) /* make sure sp_task is not running */ cancel_delayed_work(&bp->sp_task); + cancel_delayed_work(&bp->period_task); flush_workqueue(bnx2x_wq); } @@ -1718,11 +1739,12 @@ static bool bnx2x_trylock_hw_lock(struct bnx2x *bp, u32 resource) int func = BP_FUNC(bp); u32 hw_lock_control_reg; - DP(NETIF_MSG_HW, "Trying to take a lock on resource %d\n", resource); + DP(NETIF_MSG_HW | NETIF_MSG_IFUP, + "Trying to take a lock on resource %d\n", resource); /* Validating that the resource is within range */ if (resource > HW_LOCK_MAX_RESOURCE_VALUE) { - DP(NETIF_MSG_HW, + DP(NETIF_MSG_HW | NETIF_MSG_IFUP, "resource(0x%x) > HW_LOCK_MAX_RESOURCE_VALUE(0x%x)\n", resource, HW_LOCK_MAX_RESOURCE_VALUE); return false; @@ -1740,69 +1762,152 @@ static bool bnx2x_trylock_hw_lock(struct bnx2x *bp, u32 resource) if (lock_status & resource_bit) return true; - DP(NETIF_MSG_HW, "Failed to get a lock on resource %d\n", resource); + DP(NETIF_MSG_HW | NETIF_MSG_IFUP, + "Failed to get a lock on resource %d\n", resource); return false; } +/** + * bnx2x_get_leader_lock_resource - get the recovery leader resource id + * + * @bp: driver handle + * + * Returns the recovery leader resource id according to the engine this function + * belongs to. Currently only only 2 engines is supported. + */ +static inline int bnx2x_get_leader_lock_resource(struct bnx2x *bp) +{ + if (BP_PATH(bp)) + return HW_LOCK_RESOURCE_RECOVERY_LEADER_1; + else + return HW_LOCK_RESOURCE_RECOVERY_LEADER_0; +} + +/** + * bnx2x_trylock_leader_lock- try to acquire a leader lock. + * + * @bp: driver handle + * + * Tries to acquire a leader lock for current engine. + */ +static inline bool bnx2x_trylock_leader_lock(struct bnx2x *bp) +{ + return bnx2x_trylock_hw_lock(bp, bnx2x_get_leader_lock_resource(bp)); +} + #ifdef BCM_CNIC static void bnx2x_cnic_cfc_comp(struct bnx2x *bp, int cid, u8 err); #endif -void bnx2x_sp_event(struct bnx2x_fastpath *fp, - union eth_rx_cqe *rr_cqe) +void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe) { struct bnx2x *bp = fp->bp; int cid = SW_CID(rr_cqe->ramrod_cqe.conn_and_cmd_data); int command = CQE_CMD(rr_cqe->ramrod_cqe.conn_and_cmd_data); + enum bnx2x_queue_cmd drv_cmd = BNX2X_Q_CMD_MAX; + struct bnx2x_queue_sp_obj *q_obj = &fp->q_obj; DP(BNX2X_MSG_SP, "fp %d cid %d got ramrod #%d state is %x type is %d\n", fp->index, cid, command, bp->state, rr_cqe->ramrod_cqe.ramrod_type); -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - if (bnx2x_netq_sp_event(bp, fp, cid, command)) -#endif - #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - /* if the cid in the CQE differs then our CID it's IOV VF event */ - if ((fp->cid == cid) || bnx2x_iov_sp_event(bp, cid, command)) + /* if the cid in the CQE differs from our CID it's IOV VF event + * replace the queue-state-object and continue + */ + if (fp->cid != cid) + bnx2x_iov_set_queue_sp_obj(bp, cid, &q_obj); #endif - switch (command | fp->state) { - case (RAMROD_CMD_ID_ETH_RSS_UPDATE | BNX2X_FP_STATE_OPEN): - DP(NETIF_MSG_IFUP, "got RSS_UPDATE ramrod. CID %d\n", cid); - bp->rss_conf_obj.raw.clear_pending(&bp->rss_conf_obj.raw); - break; - case (RAMROD_CMD_ID_ETH_CLIENT_UPDATE | BNX2X_FP_STATE_OPEN): - DP(NETIF_MSG_IFUP, "got UPDATE ramrod. CID %d\n", cid); - clear_bit(BNX2X_FILTER_CL_UPDATE_PENDING, &bp->sp_state); - break; - case (RAMROD_CMD_ID_ETH_CLIENT_SETUP | BNX2X_FP_STATE_OPENING): - DP(NETIF_MSG_IFUP, "got MULTI[%d] setup ramrod\n", cid); - fp->state = BNX2X_FP_STATE_OPEN; + switch (command) { + case (RAMROD_CMD_ID_ETH_CLIENT_UPDATE): + DP(BNX2X_MSG_SP, "got UPDATE ramrod. CID %d\n", cid); + drv_cmd = BNX2X_Q_CMD_UPDATE; break; - case (RAMROD_CMD_ID_ETH_HALT | BNX2X_FP_STATE_HALTING): - DP(NETIF_MSG_IFDOWN, "got MULTI[%d] halt ramrod\n", cid); - fp->state = BNX2X_FP_STATE_HALTED; + case (RAMROD_CMD_ID_ETH_CLIENT_SETUP): + DP(BNX2X_MSG_SP, "got MULTI[%d] setup ramrod\n", cid); + drv_cmd = BNX2X_Q_CMD_SETUP; break; - case (RAMROD_CMD_ID_ETH_TERMINATE | BNX2X_FP_STATE_TERMINATING): - DP(NETIF_MSG_IFDOWN, "got MULTI[%d] teminate ramrod\n", cid); - fp->state = BNX2X_FP_STATE_TERMINATED; + case (RAMROD_CMD_ID_ETH_TX_QUEUE_SETUP): + DP(BNX2X_MSG_SP, "got MULTI[%d] tx-only setup ramrod\n", cid); + drv_cmd = BNX2X_Q_CMD_SETUP_TX_ONLY; + break; + + case (RAMROD_CMD_ID_ETH_HALT): + DP(BNX2X_MSG_SP, "got MULTI[%d] halt ramrod\n", cid); + drv_cmd = BNX2X_Q_CMD_HALT; + break; + + case (RAMROD_CMD_ID_ETH_TERMINATE): + DP(BNX2X_MSG_SP, "got MULTI[%d] teminate ramrod\n", cid); + drv_cmd = BNX2X_Q_CMD_TERMINATE; + break; + + case (RAMROD_CMD_ID_ETH_EMPTY): + DP(BNX2X_MSG_SP, "got MULTI[%d] empty ramrod\n", cid); + drv_cmd = BNX2X_Q_CMD_EMPTY; break; default: - BNX2X_ERR("unexpected MC reply (%d) " - "fp[%d] state is %x\n", - command, fp->index, fp->state); - break; + BNX2X_ERR("unexpected MC reply (%d) on fp[%d]\n", + command, fp->index); + return; } + if ((drv_cmd != BNX2X_Q_CMD_MAX) && + q_obj->complete_cmd(bp, q_obj, drv_cmd)) + /* q_obj->complete_cmd() failure means that this was + * an unexpected completion. + * + * In this case we don't want to increase the bp->spq_left + * because apparently we haven't sent this command the first + * place. + */ +#ifdef BNX2X_STOP_ON_ERROR + bnx2x_panic(); +#else + return; +#endif +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ + /** + * SRIOV: reschedule any 'in_progress' operations + */ + bnx2x_iov_sp_event(bp, cid, true); +#endif + smp_mb__before_atomic_inc(); - atomic_inc(&bp->spq_left); - /* push the change in fp->state and towards the memory */ - smp_wmb(); + atomic_inc(&bp->cq_spq_left); + /* push the change in bp->spq_left and towards the memory */ + smp_mb__after_atomic_inc(); + + DP(BNX2X_MSG_SP, "bp->cq_spq_left %x\n", atomic_read(&bp->cq_spq_left)); + + if ((drv_cmd == BNX2X_Q_CMD_UPDATE) && (IS_FCOE_FP(fp)) && + (!!test_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state))) { + /* if Q update ramrod is completed for last Q in AFEX vif set + * flow, then ACK MCP at the end + * + * mark pending ACK to MCP bit. + * prevent case that both bits are cleared. + * At the end of load/unload driver checks that + * sp_state is cleaerd, and this order prevents + * races + */ + smp_mb__before_clear_bit(); + set_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK, &bp->sp_state); + wmb(); + clear_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state); + smp_mb__after_clear_bit(); + + /* schedule workqueue to send ack to MCP */ +#if (LINUX_VERSION_CODE >= 0x020614) || (defined(__VMKLNX__)) /* BNX2X_UPSTREAM */ + queue_delayed_work(bnx2x_wq, &bp->sp_task, 0); +#else + queue_work(bnx2x_wq, &bp->sp_task); +#endif + } return; } @@ -1810,10 +1915,8 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, void bnx2x_update_rx_prod(struct bnx2x *bp, struct bnx2x_fastpath *fp, u16 bd_prod, u16 rx_comp_prod, u16 rx_sge_prod) { - u32 start = BAR_USTRORM_INTMEM + fp->ustorm_rx_prods_offset; - bnx2x_update_rx_prod_gen(bp, fp, bd_prod, rx_comp_prod, rx_sge_prod, - start); + fp->ustorm_rx_prods_offset); } #if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) @@ -1827,6 +1930,7 @@ irqreturn_t bnx2x_interrupt(int irq, void *dev_instance) u16 status = bnx2x_ack_int(bp); u16 mask; int i; + u8 cos; /* Return here if interrupt is shared and it's not for us */ if (unlikely(status == 0)) { @@ -1835,12 +1939,6 @@ irqreturn_t bnx2x_interrupt(int irq, void *dev_instance) } DP(NETIF_MSG_INTR, "got an interrupt status 0x%x\n", status); - /* Return here if interrupt is disabled */ - if (unlikely(atomic_read(&bp->intr_sem) != 0)) { - DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n"); - return IRQ_HANDLED; - } - #ifdef BNX2X_STOP_ON_ERROR if (unlikely(bp->panic)) return IRQ_HANDLED; @@ -1848,18 +1946,19 @@ irqreturn_t bnx2x_interrupt(int irq, void *dev_instance) for_each_eth_queue(bp, i) { struct bnx2x_fastpath *fp = &bp->fp[i]; - mask = 0x2 << (fp->index + CNIC_CONTEXT_USE); + + mask = 0x2 << (fp->index + CNIC_PRESENT); if (status & mask) { /* Handle Rx or Tx according to SB id */ prefetch(fp->rx_cons_sb); - prefetch(fp->tx_cons_sb); + for_each_cos_in_tx_queue(fp, cos) + prefetch(fp->txdata_ptr[cos]->tx_cons_sb); prefetch(&fp->sb_running_index[SM_RX_ID]); #ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ napi_schedule(&bnx2x_fp(bp, fp->index, napi)); #else napi_schedule(&bnx2x_fp(bp, fp->index, dummy_netdev)); #endif - status &= ~mask; } } @@ -1871,8 +1970,23 @@ irqreturn_t bnx2x_interrupt(int irq, void *dev_instance) rcu_read_lock(); c_ops = rcu_dereference(bp->cnic_ops); - if (c_ops) + if (c_ops && !(bp->flags & OWN_CNIC_INTA_FLAG)) +#if defined(__VMKLNX__) /* non BNX2X_UPSTREAM */ + VMKAPI_MODULE_CALL_VOID(c_ops->cnic_owner->moduleID, c_ops->cnic_handler, bp->cnic_data, NULL); +#else /* BNX2X_UPSTREAM */ c_ops->cnic_handler(bp->cnic_data, NULL); +#endif +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + /* Handle iSCSI OOO slow path */ + else if (!NO_ISCSI_OOO(bp)) +#ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ + napi_schedule(&bnx2x_fp(bp, OOO_IDX(bp), napi)); +#else + napi_schedule(&bnx2x_fp(bp, OOO_IDX(bp), + dummy_netdev)); +#endif +#endif + rcu_read_unlock(); status &= ~mask; @@ -1911,11 +2025,10 @@ int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource) int func = BP_FUNC(bp); u32 hw_lock_control_reg; int cnt; -// DP(NETIF_MSG_HW, "%d\n", resource); + /* Validating that the resource is within range */ if (resource > HW_LOCK_MAX_RESOURCE_VALUE) { - DP(NETIF_MSG_HW, - "resource(0x%x) > HW_LOCK_MAX_RESOURCE_VALUE(0x%x)\n", + BNX2X_ERR("resource(0x%x) > HW_LOCK_MAX_RESOURCE_VALUE(0x%x)\n", resource, HW_LOCK_MAX_RESOURCE_VALUE); return -EINVAL; } @@ -1930,7 +2043,7 @@ int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource) /* Validating that the resource is not already taken */ lock_status = REG_RD(bp, hw_lock_control_reg); if (lock_status & resource_bit) { - DP(NETIF_MSG_HW, "lock_status 0x%x resource_bit 0x%x\n", + BNX2X_ERR("lock_status 0x%x resource_bit 0x%x\n", lock_status, resource_bit); return -EEXIST; } @@ -1940,17 +2053,20 @@ int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource) /* Try to acquire the lock */ REG_WR(bp, hw_lock_control_reg + 4, resource_bit); lock_status = REG_RD(bp, hw_lock_control_reg); - if (lock_status & resource_bit) { -// DP(NETIF_MSG_HW, "Acquire\n"); + if (lock_status & resource_bit) return 0; - } msleep(5); } - DP(NETIF_MSG_HW, "Timeout\n"); + BNX2X_ERR("Timeout\n"); return -EAGAIN; } +int bnx2x_release_leader_lock(struct bnx2x *bp) +{ + return bnx2x_release_hw_lock(bp, bnx2x_get_leader_lock_resource(bp)); +} + int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource) { u32 lock_status; @@ -1958,12 +2074,9 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource) int func = BP_FUNC(bp); u32 hw_lock_control_reg; - DP(NETIF_MSG_HW, "Releasing a lock on resource %d\n", resource); - /* Validating that the resource is within range */ if (resource > HW_LOCK_MAX_RESOURCE_VALUE) { - DP(NETIF_MSG_HW, - "resource(0x%x) > HW_LOCK_MAX_RESOURCE_VALUE(0x%x)\n", + BNX2X_ERR("resource(0x%x) > HW_LOCK_MAX_RESOURCE_VALUE(0x%x)\n", resource, HW_LOCK_MAX_RESOURCE_VALUE); return -EINVAL; } @@ -1978,7 +2091,7 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource) /* Validating that the resource is currently taken */ lock_status = REG_RD(bp, hw_lock_control_reg); if (!(lock_status & resource_bit)) { - DP(NETIF_MSG_HW, "lock_status 0x%x resource_bit 0x%x\n", + BNX2X_ERR("lock_status 0x%x resource_bit 0x%x. unlock was called but lock wasn't taken!\n", lock_status, resource_bit); return -EFAULT; } @@ -2039,7 +2152,8 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) switch (mode) { case MISC_REGISTERS_GPIO_OUTPUT_LOW: - DP(NETIF_MSG_LINK, "Set GPIO %d (shift %d) -> output low\n", + DP(NETIF_MSG_LINK, + "Set GPIO %d (shift %d) -> output low\n", gpio_num, gpio_shift); /* clear FLOAT and set CLR */ gpio_reg &= ~(gpio_mask << MISC_REGISTERS_GPIO_FLOAT_POS); @@ -2047,7 +2161,8 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) break; case MISC_REGISTERS_GPIO_OUTPUT_HIGH: - DP(NETIF_MSG_LINK, "Set GPIO %d (shift %d) -> output high\n", + DP(NETIF_MSG_LINK, + "Set GPIO %d (shift %d) -> output high\n", gpio_num, gpio_shift); /* clear FLOAT and set SET */ gpio_reg &= ~(gpio_mask << MISC_REGISTERS_GPIO_FLOAT_POS); @@ -2055,7 +2170,8 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) break; case MISC_REGISTERS_GPIO_INPUT_HI_Z: - DP(NETIF_MSG_LINK, "Set GPIO %d (shift %d) -> input\n", + DP(NETIF_MSG_LINK, + "Set GPIO %d (shift %d) -> input\n", gpio_num, gpio_shift); /* set FLOAT */ gpio_reg |= (gpio_mask << MISC_REGISTERS_GPIO_FLOAT_POS); @@ -2071,6 +2187,53 @@ int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) return 0; } +int bnx2x_set_mult_gpio(struct bnx2x *bp, u8 pins, u32 mode) +{ + u32 gpio_reg = 0; + int rc = 0; + + /* Any port swapping should be handled by caller. */ + + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_GPIO); + /* read GPIO and mask except the float bits */ + gpio_reg = REG_RD(bp, MISC_REG_GPIO); + gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_FLOAT_POS); + gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_CLR_POS); + gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_SET_POS); + + switch (mode) { + case MISC_REGISTERS_GPIO_OUTPUT_LOW: + DP(NETIF_MSG_LINK, "Set GPIO 0x%x -> output low\n", pins); + /* set CLR */ + gpio_reg |= (pins << MISC_REGISTERS_GPIO_CLR_POS); + break; + + case MISC_REGISTERS_GPIO_OUTPUT_HIGH: + DP(NETIF_MSG_LINK, "Set GPIO 0x%x -> output high\n", pins); + /* set SET */ + gpio_reg |= (pins << MISC_REGISTERS_GPIO_SET_POS); + break; + + case MISC_REGISTERS_GPIO_INPUT_HI_Z: + DP(NETIF_MSG_LINK, "Set GPIO 0x%x -> input\n", pins); + /* set FLOAT */ + gpio_reg |= (pins << MISC_REGISTERS_GPIO_FLOAT_POS); + break; + + default: + BNX2X_ERR("Invalid GPIO mode assignment %d\n", mode); + rc = -EINVAL; + break; + } + + if (rc == 0) + REG_WR(bp, MISC_REG_GPIO, gpio_reg); + + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_GPIO); + + return rc; +} + int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) { /* The GPIO should be swapped if swap register is set and active */ @@ -2092,16 +2255,18 @@ int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) switch (mode) { case MISC_REGISTERS_GPIO_INT_OUTPUT_CLR: - DP(NETIF_MSG_LINK, "Clear GPIO INT %d (shift %d) -> " - "output low\n", gpio_num, gpio_shift); + DP(NETIF_MSG_LINK, + "Clear GPIO INT %d (shift %d) -> output low\n", + gpio_num, gpio_shift); /* clear SET and set CLR */ gpio_reg &= ~(gpio_mask << MISC_REGISTERS_GPIO_INT_SET_POS); gpio_reg |= (gpio_mask << MISC_REGISTERS_GPIO_INT_CLR_POS); break; case MISC_REGISTERS_GPIO_INT_OUTPUT_SET: - DP(NETIF_MSG_LINK, "Set GPIO INT %d (shift %d) -> " - "output high\n", gpio_num, gpio_shift); + DP(NETIF_MSG_LINK, + "Set GPIO INT %d (shift %d) -> output high\n", + gpio_num, gpio_shift); /* clear CLR and set SET */ gpio_reg &= ~(gpio_mask << MISC_REGISTERS_GPIO_INT_CLR_POS); gpio_reg |= (gpio_mask << MISC_REGISTERS_GPIO_INT_SET_POS); @@ -2117,40 +2282,39 @@ int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port) return 0; } -static int bnx2x_set_spio(struct bnx2x *bp, int spio_num, u32 mode) +static int bnx2x_set_spio(struct bnx2x *bp, int spio, u32 mode) { - u32 spio_mask = (1 << spio_num); u32 spio_reg; - if ((spio_num < MISC_REGISTERS_SPIO_4) || - (spio_num > MISC_REGISTERS_SPIO_7)) { - BNX2X_ERR("Invalid SPIO %d\n", spio_num); + /* Only 2 SPIOs are configurable */ + if ((spio != MISC_SPIO_SPIO4) && (spio != MISC_SPIO_SPIO5)) { + BNX2X_ERR("Invalid SPIO 0x%x\n", spio); return -EINVAL; } bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_SPIO); /* read SPIO and mask except the float bits */ - spio_reg = (REG_RD(bp, MISC_REG_SPIO) & MISC_REGISTERS_SPIO_FLOAT); + spio_reg = (REG_RD(bp, MISC_REG_SPIO) & MISC_SPIO_FLOAT); switch (mode) { - case MISC_REGISTERS_SPIO_OUTPUT_LOW: - DP(NETIF_MSG_LINK, "Set SPIO %d -> output low\n", spio_num); + case MISC_SPIO_OUTPUT_LOW: + DP(NETIF_MSG_HW, "Set SPIO 0x%x -> output low\n", spio); /* clear FLOAT and set CLR */ - spio_reg &= ~(spio_mask << MISC_REGISTERS_SPIO_FLOAT_POS); - spio_reg |= (spio_mask << MISC_REGISTERS_SPIO_CLR_POS); + spio_reg &= ~(spio << MISC_SPIO_FLOAT_POS); + spio_reg |= (spio << MISC_SPIO_CLR_POS); break; - case MISC_REGISTERS_SPIO_OUTPUT_HIGH: - DP(NETIF_MSG_LINK, "Set SPIO %d -> output high\n", spio_num); + case MISC_SPIO_OUTPUT_HIGH: + DP(NETIF_MSG_HW, "Set SPIO 0x%x -> output high\n", spio); /* clear FLOAT and set SET */ - spio_reg &= ~(spio_mask << MISC_REGISTERS_SPIO_FLOAT_POS); - spio_reg |= (spio_mask << MISC_REGISTERS_SPIO_SET_POS); + spio_reg &= ~(spio << MISC_SPIO_FLOAT_POS); + spio_reg |= (spio << MISC_SPIO_SET_POS); break; - case MISC_REGISTERS_SPIO_INPUT_HI_Z: - DP(NETIF_MSG_LINK, "Set SPIO %d -> input\n", spio_num); + case MISC_SPIO_INPUT_HI_Z: + DP(NETIF_MSG_HW, "Set SPIO 0x%x -> input\n", spio); /* set FLOAT */ - spio_reg |= (spio_mask << MISC_REGISTERS_SPIO_FLOAT_POS); + spio_reg |= (spio << MISC_SPIO_FLOAT_POS); break; default: @@ -2163,7 +2327,7 @@ static int bnx2x_set_spio(struct bnx2x *bp, int spio_num, u32 mode) return 0; } -static void bnx2x_calc_fc_adv(struct bnx2x *bp) +void bnx2x_calc_fc_adv(struct bnx2x *bp) { u8 cfg_idx = bnx2x_get_link_cfg_idx(bp); switch (bp->link_vars.ieee_fc & @@ -2189,121 +2353,95 @@ static void bnx2x_calc_fc_adv(struct bnx2x *bp) } } -u8 bnx2x_bmac_enable(struct link_params *params, struct link_vars *vars, u8 is_lb); -u8 bnx2x_emac_enable(struct link_params *params, struct link_vars *vars, u8 is_lb); -u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl, u32 line_speed); - -static void bnx2x_link_set_4_slow(struct bnx2x *bp) -{ - /* fake link up for emulation */ - bp->port.supported[0] |= (SUPPORTED_10baseT_Half | - SUPPORTED_10baseT_Full | - SUPPORTED_100baseT_Half | - SUPPORTED_100baseT_Full | - SUPPORTED_1000baseT_Full | - SUPPORTED_2500baseX_Full | - SUPPORTED_10000baseT_Full | - SUPPORTED_TP | - SUPPORTED_FIBRE | - SUPPORTED_Autoneg | - SUPPORTED_Pause | - SUPPORTED_Asym_Pause); - bp->port.advertising[0] = bp->port.supported[0]; - - bp->link_params.bp = bp; - bp->link_params.port = BP_PORT(bp); - bp->link_params.req_duplex[0] = DUPLEX_FULL; - bp->link_params.req_flow_ctrl[0] = BNX2X_FLOW_CTRL_NONE; - bp->link_params.req_line_speed[0] = SPEED_10000; - bp->link_params.speed_cap_mask[0] = 0x7f0000; - bp->link_params.switch_cfg = SWITCH_CFG_10G; - - if (CHIP_REV_IS_FPGA(bp) || (CHIP_REV_IS_EMUL(bp) && CHIP_MODE_IS_4_PORT(bp))) { - bp->link_vars.mac_type = MAC_TYPE_EMAC; - bp->link_vars.line_speed = SPEED_1000; - bp->link_vars.link_status = (LINK_STATUS_LINK_UP | - LINK_STATUS_SPEED_AND_DUPLEX_1000TFD); - - } else { - bp->link_vars.mac_type = MAC_TYPE_BMAC; - bp->link_vars.line_speed = SPEED_10000; - bp->link_vars.link_status = (LINK_STATUS_LINK_UP | - LINK_STATUS_SPEED_AND_DUPLEX_10GTFD); - - } - bp->link_vars.link_up = 1; - - bp->link_vars.duplex = DUPLEX_FULL; - bp->link_vars.flow_ctrl = BNX2X_FLOW_CTRL_NONE; - if(bp->link_vars.mac_type == MAC_TYPE_EMAC) - bnx2x_emac_enable(&bp->link_params, &bp->link_vars, 0); - else - bnx2x_bmac_enable(&bp->link_params, &bp->link_vars, 0); - - if (CHIP_IS_E1H(bp)) - bnx2x_pbf_update(&bp->link_params, bp->link_vars.flow_ctrl, - bp->link_vars.line_speed); - REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + bp->link_params.port*4, 0); - - bnx2x_stats_handle(bp, STATS_EVENT_LINK_UP); - bnx2x_link_report(bp); -} - u8 bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode) { - if (!BP_NOMCP(bp)) { - u8 rc; - int cfx_idx = bnx2x_get_link_cfg_idx(bp); - u16 req_line_speed = bp->link_params.req_line_speed[cfx_idx]; - /* Initialize link parameters structure variables */ - /* It is recommended to turn off RX FC for jumbo frames - for better performance */ - if (CHIP_IS_E1x(bp) && (bp->dev->mtu > 5000)) - bp->link_params.req_fc_auto_adv = BNX2X_FLOW_CTRL_TX; - else - bp->link_params.req_fc_auto_adv = BNX2X_FLOW_CTRL_BOTH; + u8 rc; + int cfx_idx = bnx2x_get_link_cfg_idx(bp); + u16 req_line_speed = bp->link_params.req_line_speed[cfx_idx]; + /* + * Initialize link parameters structure variables + * It is recommended to turn off RX FC for jumbo frames + * for better performance + */ + if (CHIP_IS_E1x(bp) && (bp->dev->mtu > 5000)) + bp->link_params.req_fc_auto_adv = BNX2X_FLOW_CTRL_TX; + else + bp->link_params.req_fc_auto_adv = BNX2X_FLOW_CTRL_BOTH; - bnx2x_acquire_phy_lock(bp); - - if (load_mode == LOAD_DIAG) { - bp->link_params.loopback_mode = LOOPBACK_XGXS; - bp->link_params.req_line_speed[cfx_idx] = SPEED_10000; +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + if (CHIP_REV_IS_SLOW(bp)) { + u32 bond = bp->common.chip_id & 0xf; + u32 feat = 0; + if (CHIP_IS_E2(bp) && CHIP_MODE_IS_4_PORT(bp)) + feat |= FEATURE_CONFIG_EMUL_DISABLE_BMAC; + else if (bond & 0x4) { + if (CHIP_IS_E3(bp)) + feat |= FEATURE_CONFIG_EMUL_DISABLE_XMAC; + else + feat |= FEATURE_CONFIG_EMUL_DISABLE_BMAC; + } else if (bond & 0x8) { + if (CHIP_IS_E3(bp)) + feat |= FEATURE_CONFIG_EMUL_DISABLE_UMAC; + else + feat |= FEATURE_CONFIG_EMUL_DISABLE_EMAC; } + /* disable EMAC for E3 and above */ + if (bond & 0x2) + feat |= FEATURE_CONFIG_EMUL_DISABLE_EMAC; - rc = bnx2x_phy_init(&bp->link_params, &bp->link_vars); + bp->link_params.feature_config_flags |= feat; + } +#endif - bnx2x_release_phy_lock(bp); + bnx2x_acquire_phy_lock(bp); - bnx2x_calc_fc_adv(bp); - - if (CHIP_REV_IS_SLOW(bp) && bp->link_vars.link_up) { - bnx2x_stats_handle(bp, STATS_EVENT_LINK_UP); - bnx2x_link_report(bp); + if (load_mode == LOAD_DIAG) { + struct link_params *lp = &bp->link_params; + lp->loopback_mode = LOOPBACK_XGXS; + /* Prefer doing PHY loopback at 10G speed, if possible */ + if (lp->req_line_speed[cfx_idx] < SPEED_10000) { + if (lp->speed_cap_mask[cfx_idx] & + PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) + lp->req_line_speed[cfx_idx] = + SPEED_10000; + else + lp->req_line_speed[cfx_idx] = + SPEED_1000; } - bp->link_params.req_line_speed[cfx_idx] = req_line_speed; - return rc; - } else if (CHIP_REV_IS_SLOW(bp)) { - bnx2x_link_set_4_slow(bp); - return 0; } - BNX2X_ERR("Bootcode is missing - can not initialize link\n"); - return -EINVAL; + if (load_mode == LOAD_LOOPBACK_EXT) { + struct link_params *lp = &bp->link_params; + lp->loopback_mode = LOOPBACK_EXT; + } + + rc = bnx2x_phy_init(&bp->link_params, &bp->link_vars); + + bnx2x_release_phy_lock(bp); + + bnx2x_calc_fc_adv(bp); + + if (CHIP_REV_IS_SLOW(bp) && bp->link_vars.link_up) { + bnx2x_stats_handle(bp, STATS_EVENT_LINK_UP); + bnx2x_link_report(bp); + } else +#if (LINUX_VERSION_CODE >= 0x020614) || (defined(__VMKLNX__)) /* BNX2X_UPSTREAM */ + queue_delayed_work(bnx2x_wq, &bp->period_task, 0); +#else + queue_work(bnx2x_wq, &bp->period_task); +#endif + bp->link_params.req_line_speed[cfx_idx] = req_line_speed; + return rc; } -static void bnx2x_link_set(struct bnx2x *bp) +void bnx2x_link_set(struct bnx2x *bp) { - if (!BP_NOMCP(bp)) { - bnx2x_acquire_phy_lock(bp); - bnx2x_link_reset(&bp->link_params, &bp->link_vars, 1); - bnx2x_phy_init(&bp->link_params, &bp->link_vars); - bnx2x_release_phy_lock(bp); + bnx2x_acquire_phy_lock(bp); + bnx2x_link_reset(&bp->link_params, &bp->link_vars, 1); + bnx2x_phy_init(&bp->link_params, &bp->link_vars); + bnx2x_release_phy_lock(bp); - bnx2x_calc_fc_adv(bp); - } else if (CHIP_REV_IS_SLOW(bp)) { - bnx2x_link_set_4_slow(bp); - } else - BNX2X_ERR("Bootcode is missing - can not set link\n"); + bnx2x_calc_fc_adv(bp); } static void bnx2x__link_reset(struct bnx2x *bp) @@ -2312,7 +2450,10 @@ static void bnx2x__link_reset(struct bnx2x *bp) bnx2x_acquire_phy_lock(bp); bnx2x_link_reset(&bp->link_params, &bp->link_vars, 1); bnx2x_release_phy_lock(bp); - } else if (!CHIP_REV_IS_SLOW(bp)) + } else +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + if (!CHIP_REV_IS_SLOW(bp)) +#endif BNX2X_ERR("Bootcode is missing - can not reset link\n"); } @@ -2325,46 +2466,15 @@ u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes) rc = bnx2x_test_link(&bp->link_params, &bp->link_vars, is_serdes); bnx2x_release_phy_lock(bp); - } else if (!CHIP_REV_IS_SLOW(bp)) + } else +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + if (!CHIP_REV_IS_SLOW(bp)) +#endif BNX2X_ERR("Bootcode is missing - can not test link\n"); return rc; } -static void bnx2x_init_port_minmax(struct bnx2x *bp) -{ - u32 r_param = bp->link_vars.line_speed / 8; - u32 fair_periodic_timeout_usec; - u32 t_fair; - BUG_ON(!bp->link_vars.line_speed); - memset(&(bp->cmng.rs_vars), 0, - sizeof(struct rate_shaping_vars_per_port)); - memset(&(bp->cmng.fair_vars), 0, sizeof(struct fairness_vars_per_port)); - - /* 100 usec in SDM ticks = 25 since each tick is 4 usec */ - bp->cmng.rs_vars.rs_periodic_timeout = RS_PERIODIC_TIMEOUT_USEC / 4; - - /* this is the threshold below which no timer arming will occur - 1.25 coefficient is for the threshold to be a little bigger - than the real time, to compensate for timer in-accuracy */ - bp->cmng.rs_vars.rs_threshold = - (RS_PERIODIC_TIMEOUT_USEC * r_param * 5) / 4; - - /* resolution of fairness timer */ - fair_periodic_timeout_usec = QM_ARB_BYTES / r_param; - /* for 10G it is 1000usec. for 1G it is 10000usec. */ - t_fair = T_FAIR_COEF / bp->link_vars.line_speed; - - /* this is the threshold below which we won't arm the timer anymore */ - bp->cmng.fair_vars.fair_threshold = QM_ARB_BYTES; - - /* we multiply by 1e3/8 to get bytes/msec. - We don't want the credits to pass a credit - of the t_fair*FAIR_MEM (algorithm resolution) */ - bp->cmng.fair_vars.upper_bound = r_param * t_fair * FAIR_MEM; - /* since each tick is 4 usec */ - bp->cmng.fair_vars.fairness_timeout = fair_periodic_timeout_usec / 4; -} /* Calculates the sum of vn_min_rates. It's needed for further normalizing of the min_rates. @@ -2375,160 +2485,68 @@ static void bnx2x_init_port_minmax(struct bnx2x *bp) In the later case fainess algorithm should be deactivated. If not all min_rates are zero then those that are zeroes will be set to 1. */ -static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp) +static void bnx2x_calc_vn_min(struct bnx2x *bp, + struct cmng_init_input *input) { int all_zero = 1; int vn; - bp->vn_weight_sum = 0; - for (vn = VN_0; vn < E1HVN_MAX; vn++) { + for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { u32 vn_cfg = bp->mf_config[vn]; u32 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> FUNC_MF_CFG_MIN_BW_SHIFT) * 100; /* Skip hidden vns */ if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE) - continue; - + vn_min_rate = 0; /* If min rate is zero - set it to 1 */ - if (!vn_min_rate) + else if (!vn_min_rate) vn_min_rate = DEF_MIN_RATE; else all_zero = 0; - bp->vn_weight_sum += vn_min_rate; + input->vnic_min_rate[vn] = vn_min_rate; } - /* ... only if all min rates are zeros - disable fairness */ - if (all_zero) { - bp->cmng.flags.cmng_enables &= + /* if ETS or all min rates are zeros - disable fairness */ + if (BNX2X_IS_ETS_ENABLED(bp)) { + input->flags.cmng_enables &= ~CMNG_FLAGS_PER_PORT_FAIRNESS_VN; - DP(NETIF_MSG_IFUP, "All MIN values are zeroes" - " fairness will be disabled\n"); + DP(NETIF_MSG_IFUP, "Fairness will be disabled due to ETS\n"); + } else if (all_zero) { + input->flags.cmng_enables &= + ~CMNG_FLAGS_PER_PORT_FAIRNESS_VN; + DP(NETIF_MSG_IFUP, + "All MIN values are zeroes fairness will be disabled\n"); } else - bp->cmng.flags.cmng_enables |= + input->flags.cmng_enables |= CMNG_FLAGS_PER_PORT_FAIRNESS_VN; } -static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn) +static void bnx2x_calc_vn_max(struct bnx2x *bp, int vn, + struct cmng_init_input *input) { - struct rate_shaping_vars_per_vn m_rs_vn; - struct fairness_vars_per_vn m_fair_vn; + u16 vn_max_rate; u32 vn_cfg = bp->mf_config[vn]; - int func = 2*vn + BP_PORT(bp); - u16 vn_min_rate, vn_max_rate; - int i; - /* If function is hidden - set min and max to zeroes */ - if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE) { - vn_min_rate = 0; + if (vn_cfg & FUNC_MF_CFG_FUNC_HIDE) vn_max_rate = 0; + else { + u32 maxCfg = bnx2x_extract_max_cfg(bp, vn_cfg); - } else { - vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> - FUNC_MF_CFG_MIN_BW_SHIFT) * 100; - /* If fairness is enabled (not all min rates are zeroes) and - if current min rate is zero - set it to 1. - This is a requirement of the algorithm. */ - if (bp->vn_weight_sum && (vn_min_rate == 0)) - vn_min_rate = DEF_MIN_RATE; - vn_max_rate = ((vn_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> - FUNC_MF_CFG_MAX_BW_SHIFT) * 100; + if (IS_MF_SI(bp)) + /* maxCfg in percents of linkspeed */ + vn_max_rate = (bp->link_vars.line_speed * maxCfg) / 100; + else /* SD modes */ + /* maxCfg is absolute in 100Mb units */ + vn_max_rate = maxCfg * 100; } - DP(NETIF_MSG_IFUP, - "func %d: vn_min_rate %d vn_max_rate %d vn_weight_sum %d\n", - func, vn_min_rate, vn_max_rate, bp->vn_weight_sum); + DP(NETIF_MSG_IFUP, "vn %d: vn_max_rate %d\n", vn, vn_max_rate); - memset(&m_rs_vn, 0, sizeof(struct rate_shaping_vars_per_vn)); - memset(&m_fair_vn, 0, sizeof(struct fairness_vars_per_vn)); - - /* global vn counter - maximal Mbps for this vn */ - m_rs_vn.vn_counter.rate = vn_max_rate; - - /* quota - number of bytes transmitted in this period */ - m_rs_vn.vn_counter.quota = - (vn_max_rate * RS_PERIODIC_TIMEOUT_USEC) / 8; - - if (bp->vn_weight_sum) { - /* credit for each period of the fairness algorithm: - number of bytes in T_FAIR (the vn share the port rate). - vn_weight_sum should not be larger than 10000, thus - T_FAIR_COEF / (8 * vn_weight_sum) will always be greater - than zero */ - m_fair_vn.vn_credit_delta = - max_t(u32, (vn_min_rate * (T_FAIR_COEF / - (8 * bp->vn_weight_sum))), - (bp->cmng.fair_vars.fair_threshold * 2)); - DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n", - m_fair_vn.vn_credit_delta); - } - - /* Store it to internal memory */ - for (i = 0; i < sizeof(struct rate_shaping_vars_per_vn)/4; i++) - REG_WR(bp, BAR_XSTRORM_INTMEM + - XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func) + i * 4, - ((u32 *)(&m_rs_vn))[i]); - - for (i = 0; i < sizeof(struct fairness_vars_per_vn)/4; i++) - REG_WR(bp, BAR_XSTRORM_INTMEM + - XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func) + i * 4, - ((u32 *)(&m_fair_vn))[i]); + input->vnic_max_rate[vn] = vn_max_rate; } -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ -static void bnx2x_init_cos_credit(struct bnx2x *bp) -{ - struct fairness_vars_per_vn m_fair_vn; - int func = BP_FUNC(bp); - int i, cos; - - memset(&m_fair_vn, 0, sizeof(struct fairness_vars_per_vn)); - - for (cos = 0; cos < BNX2X_MAX_COS; cos++) { - if (bp->cos_min_rate[cos]) { - m_fair_vn.cos_credit_delta[cos] = - max_t(u32, (bp->cos_min_rate[cos] * - (T_FAIR_COEF / (8 * bp->cos_weight_sum))), - (bp->cmng.fair_vars.fair_threshold * 2)); - } - DP(NETIF_MSG_IFUP, "cos_credit_delta[%d] = %d\n", - cos, m_fair_vn.cos_credit_delta[cos]); - } - - for (i = 0; i < sizeof(struct fairness_vars_per_vn)/4; i++) - REG_WR(bp, BAR_XSTRORM_INTMEM + - XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func) + i * 4, - ((u32 *)(&m_fair_vn))[i]); -} - -static u8 bnx2x_is_safc_multi_mode(struct bnx2x *bp) -{ - switch (bp->multi_mode) { - case ETH_RSS_MODE_DISABLED: - case ETH_RSS_MODE_REGULAR: - return false; - case ETH_RSS_MODE_VLAN_PRI: - case ETH_RSS_MODE_E1HOV_PRI: - case ETH_RSS_MODE_IP_DSCP: - return true; - default: - return false; - } -} -static u16 bnx2x_get_pause_pri_map(struct bnx2x *bp, u8 cos) -{ - u16 pri_map = 1; - - if (bnx2x_is_safc_multi_mode(bp) && (bp->flags & SAFC_TX_FLAG)) { - int j; - for (j = 0; j < BNX2X_MAX_PRIORITY; j++) - if (bp->pri_map[j] == cos) - pri_map |= (1 << j); - } - return pri_map; -} -#endif static int bnx2x_get_cmng_fns_mode(struct bnx2x *bp) { @@ -2537,10 +2555,6 @@ static int bnx2x_get_cmng_fns_mode(struct bnx2x *bp) if (IS_MF(bp)) return CMNG_FNS_MINMAX; -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - if (bnx2x_is_safc_multi_mode(bp)) - return CMNG_FNS_COSWRR; -#endif return CMNG_FNS_NONE; } @@ -2562,7 +2576,7 @@ void bnx2x_read_mf_cfg(struct bnx2x *bp) * * and there are 2 functions per port */ - for (vn = VN_0; vn < E1HVN_MAX; vn++) { + for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { int /*abs*/func = n * (2 * vn + BP_PORT(bp)) + BP_PATH(bp); if (func >= E1H_FUNC_MAX) @@ -2571,84 +2585,53 @@ void bnx2x_read_mf_cfg(struct bnx2x *bp) bp->mf_config[vn] = MF_CFG_RD(bp, func_mf_config[func].config); } + if (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED) { + DP(NETIF_MSG_IFUP, "mf_cfg function disabled\n"); + bp->flags |= MF_FUNC_DIS; + } else { + DP(NETIF_MSG_IFUP, "mf_cfg function enabled\n"); + bp->flags &= ~MF_FUNC_DIS; + } } static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type) { + struct cmng_init_input input; + memset(&input, 0, sizeof(struct cmng_init_input)); + + input.port_rate = bp->link_vars.line_speed; if (cmng_type == CMNG_FNS_MINMAX) { int vn; - /* clear cmng_enables */ - bp->cmng.flags.cmng_enables = 0; - /* read mf conf from shmem */ if (read_cfg) bnx2x_read_mf_cfg(bp); - /* Init rate shaping and fairness contexts */ - bnx2x_init_port_minmax(bp); - /* vn_weight_sum and enable fairness if not 0 */ - bnx2x_calc_vn_weight_sum(bp); + bnx2x_calc_vn_min(bp, &input); /* calculate and set min-max rate for each vn */ - for (vn = VN_0; vn < E1HVN_MAX; vn++) - bnx2x_init_vn_minmax(bp, vn); + if (bp->port.pmf) + for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) + bnx2x_calc_vn_max(bp, vn, &input); /* always enable rate shaping and fairness */ - bp->cmng.flags.cmng_enables |= + input.flags.cmng_enables |= CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN; - if (!bp->vn_weight_sum) - DP(NETIF_MSG_IFUP, "All MIN values are zeroes" - " fairness will be disabled\n"); + + bnx2x_init_cmng(&input, &bp->cmng); return; } -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - if (cmng_type == CMNG_FNS_COSWRR) { - if (bp->cos_weight_sum) { - bnx2x_init_port_minmax(bp); - bnx2x_init_cos_credit(bp); - /* Enable fairness */ - bp->cmng.flags.cmng_enables = - (CMNG_FLAGS_PER_PORT_FAIRNESS_COS | - (FAIRNESS_COS_WRR_MODE << - CMNG_FLAGS_PER_PORT_FAIRNESS_COS_MODE_SHIFT)); - - } else - DP(NETIF_MSG_IFUP, "All MIN values are zeroes" - " fairness will be disabled\n"); - return; - } -#endif /* rate shaping and fairness are disabled */ DP(NETIF_MSG_IFUP, "rate shaping and fairness are disabled\n"); } -static inline void bnx2x_link_sync_notify(struct bnx2x *bp) -{ - int port = BP_PORT(bp); - int func; - int vn; - - /* Set the attention towards other drivers on the same port */ - for (vn = VN_0; vn < E1HVN_MAX; vn++) { - if (vn == BP_E1HVN(bp)) - continue; - - func = ((vn << 1) | port); - REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + - (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); - } -} - - /* This function is called upon link interrupt */ static void bnx2x_link_attn(struct bnx2x *bp) { - u32 prev_link_status = bp->link_vars.link_status; /* Make sure that we are synced with the current statistics */ bnx2x_stats_handle(bp, STATS_EVENT_STOP); @@ -2661,12 +2644,7 @@ static void bnx2x_link_attn(struct bnx2x *bp) int port = BP_PORT(bp); u32 pause_enabled = 0; -#ifdef BNX2X_SAFC - if ((bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX) || - (bp->flags & SAFC_TX_FLAG)) -#else /* BNX2X_UPSTREAM */ if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX) -#endif pause_enabled = 1; REG_WR(bp, BAR_USTRORM_INTMEM + @@ -2674,11 +2652,11 @@ static void bnx2x_link_attn(struct bnx2x *bp) pause_enabled); } - if (bp->link_vars.mac_type == MAC_TYPE_BMAC) { + if (bp->link_vars.mac_type != MAC_TYPE_EMAC) { struct host_port_stats *pstats; pstats = bnx2x_sp(bp, port_stats); - /* reset old bmac stats */ + /* reset old mac stats */ memset(&(pstats->mac_stx[0]), 0, sizeof(struct mac_stx)); } @@ -2686,25 +2664,22 @@ static void bnx2x_link_attn(struct bnx2x *bp) bnx2x_stats_handle(bp, STATS_EVENT_LINK_UP); } - /* indicate link status only if link status actually changed */ - if (prev_link_status != bp->link_vars.link_status) - bnx2x_link_report(bp); - - if (IS_MF(bp)) - bnx2x_link_sync_notify(bp); - if (bp->link_vars.link_up && bp->link_vars.line_speed) { int cmng_fns = bnx2x_get_cmng_fns_mode(bp); if (cmng_fns != CMNG_FNS_NONE) { bnx2x_cmng_fns_init(bp, false, cmng_fns); storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp)); - } - else + } else /* rate shaping and fairness are disabled */ DP(NETIF_MSG_IFUP, "single function mode without fairness\n"); } + + __bnx2x_link_report(bp); + + if (IS_MF(bp)) + bnx2x_link_sync_notify(bp); } void bnx2x__link_status_update(struct bnx2x *bp) @@ -2712,7 +2687,12 @@ void bnx2x__link_status_update(struct bnx2x *bp) if (bp->state != BNX2X_STATE_OPEN) return; + /* read updated dcb configuration */ + bnx2x_dcbx_pmf_update(bp); +#if (defined(BNX2X_UPSTREAM)) /* BNX2X_UPSTREAM */ + bnx2x_link_status_update(&bp->link_params, &bp->link_vars); +#else if(!CHIP_REV_IS_SLOW(bp)) bnx2x_link_status_update(&bp->link_params, &bp->link_vars); else { @@ -2759,6 +2739,7 @@ void bnx2x__link_status_update(struct bnx2x *bp) bnx2x_stats_handle(bp, STATS_EVENT_LINK_UP); bnx2x_link_report(bp); } +#endif if (bp->link_vars.link_up) bnx2x_stats_handle(bp, STATS_EVENT_LINK_UP); @@ -2769,20 +2750,488 @@ void bnx2x__link_status_update(struct bnx2x *bp) bnx2x_link_report(bp); } +static int bnx2x_afex_func_update(struct bnx2x *bp, u16 vifid, + u16 vlan_val, u8 allowed_prio) +{ + struct bnx2x_func_state_params func_params = {0}; + struct bnx2x_func_afex_update_params *f_update_params = + &func_params.params.afex_update; + + func_params.f_obj = &bp->func_obj; + func_params.cmd = BNX2X_F_CMD_AFEX_UPDATE; + + /* no need to wait for RAMROD completion, so don't + * set RAMROD_COMP_WAIT flag + */ + + f_update_params->vif_id = vifid; + f_update_params->afex_default_vlan = vlan_val; + f_update_params->allowed_priorities = allowed_prio; + + /* if ramrod can not be sent, response to MCP immediately */ + if (bnx2x_func_state_change(bp, &func_params) < 0) + bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0); + + return 0; +} + +static int bnx2x_afex_handle_vif_list_cmd(struct bnx2x *bp, u8 cmd_type, + u16 vif_index, u8 func_bit_map) +{ + struct bnx2x_func_state_params func_params = {0}; + struct bnx2x_func_afex_viflists_params *update_params = + &func_params.params.afex_viflists; + int rc; + u32 drv_msg_code; + + /* validate only LIST_SET and LIST_GET are received from switch */ + if ((cmd_type != VIF_LIST_RULE_GET) && (cmd_type != VIF_LIST_RULE_SET)) + BNX2X_ERR("BUG! bnx2x_afex_handle_vif_list_cmd invalid type 0x%x\n", + cmd_type); + + func_params.f_obj = &bp->func_obj; + func_params.cmd = BNX2X_F_CMD_AFEX_VIFLISTS; + + /* set parameters according to cmd_type */ + update_params->afex_vif_list_command = cmd_type; + update_params->vif_list_index = cpu_to_le16(vif_index); + update_params->func_bit_map = + (cmd_type == VIF_LIST_RULE_GET) ? 0 : func_bit_map; + update_params->func_to_clear = 0; + drv_msg_code = + (cmd_type == VIF_LIST_RULE_GET) ? + DRV_MSG_CODE_AFEX_LISTGET_ACK : + DRV_MSG_CODE_AFEX_LISTSET_ACK; + + /* if ramrod can not be sent, respond to MCP immediately for + * SET and GET requests (other are not triggered from MCP) + */ + rc = bnx2x_func_state_change(bp, &func_params); + if (rc < 0) + bnx2x_fw_command(bp, drv_msg_code, 0); + + return 0; +} + +static void bnx2x_handle_afex_cmd(struct bnx2x *bp, u32 cmd) +{ + struct afex_stats afex_stats; + struct bnx2x_eth_stats *estats = &bp->eth_stats; + u32 func = BP_ABS_FUNC(bp); + u32 mf_config; + u16 vlan_val; + u32 vlan_prio; + u16 vif_id; + u8 allowed_prio; + u8 vlan_mode; + u32 addr_to_write, vifid, addrs, stats_type, i; + + if (cmd & DRV_STATUS_AFEX_LISTGET_REQ) { + vifid = SHMEM2_RD(bp, afex_param1_to_driver[BP_FW_MB_IDX(bp)]); + DP(BNX2X_MSG_MCP, + "afex: got MCP req LISTGET_REQ for vifid 0x%x\n", vifid); + bnx2x_afex_handle_vif_list_cmd(bp, VIF_LIST_RULE_GET, vifid, 0); + } + + if (cmd & DRV_STATUS_AFEX_LISTSET_REQ) { + vifid = SHMEM2_RD(bp, afex_param1_to_driver[BP_FW_MB_IDX(bp)]); + addrs = SHMEM2_RD(bp, afex_param2_to_driver[BP_FW_MB_IDX(bp)]); + DP(BNX2X_MSG_MCP, + "afex: got MCP req LISTSET_REQ for vifid 0x%x addrs 0x%x\n", + vifid, addrs); + bnx2x_afex_handle_vif_list_cmd(bp, VIF_LIST_RULE_SET, vifid, + addrs); + } + + if (cmd & DRV_STATUS_AFEX_STATSGET_REQ) { + struct per_queue_stats *fcoe_q_stats = + &bp->fw_stats_data->queue_stats[FCOE_IDX]; + + struct tstorm_per_queue_stats *fcoe_q_tstorm_stats = + &fcoe_q_stats->tstorm_queue_statistics; + + struct ustorm_per_queue_stats *fcoe_q_ustorm_stats = + &fcoe_q_stats->ustorm_queue_statistics; + + struct xstorm_per_queue_stats *fcoe_q_xstorm_stats = + &fcoe_q_stats->xstorm_queue_statistics; + + struct fcoe_statistics_params *fw_fcoe_stat = + &bp->fw_stats_data->fcoe; + + memset(&afex_stats, 0, sizeof(struct afex_stats)); + + addr_to_write = SHMEM2_RD(bp, + afex_scratchpad_addr_to_write[BP_FW_MB_IDX(bp)]); + stats_type = SHMEM2_RD(bp, + afex_param1_to_driver[BP_FW_MB_IDX(bp)]); + + DP(BNX2X_MSG_MCP, + "afex: got MCP req STATSGET_REQ, write to addr 0x%x\n", + addr_to_write); + + for_each_eth_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; + + ADD_64(afex_stats.rx_unicast_bytes_hi, + qstats->total_unicast_bytes_received_hi, + afex_stats.rx_unicast_bytes_lo, + qstats->total_unicast_bytes_received_lo); + + ADD_64(afex_stats.rx_broadcast_bytes_hi, + qstats->total_broadcast_bytes_received_hi, + afex_stats.rx_broadcast_bytes_lo, + qstats->total_broadcast_bytes_received_lo); + + ADD_64(afex_stats.rx_multicast_bytes_hi, + qstats->total_multicast_bytes_received_hi, + afex_stats.rx_multicast_bytes_lo, + qstats->total_multicast_bytes_received_lo); + + ADD_64(afex_stats.rx_unicast_frames_hi, + qstats->total_unicast_packets_received_hi, + afex_stats.rx_unicast_frames_lo, + qstats->total_unicast_packets_received_lo); + + ADD_64(afex_stats.rx_broadcast_frames_hi, + qstats->total_broadcast_packets_received_hi, + afex_stats.rx_broadcast_frames_lo, + qstats->total_broadcast_packets_received_lo); + + ADD_64(afex_stats.rx_multicast_frames_hi, + qstats->total_multicast_packets_received_hi, + afex_stats.rx_multicast_frames_lo, + qstats->total_multicast_packets_received_lo); + + /* sum to rx_frames_discarded all discraded + * packets due to size, ttl0 and checksum + */ + ADD_64(afex_stats.rx_frames_discarded_hi, + qstats-> + total_packets_received_checksum_discarded_hi, + afex_stats.rx_frames_discarded_lo, + qstats-> + total_packets_received_checksum_discarded_lo); + + ADD_64(afex_stats.rx_frames_discarded_hi, + qstats->total_packets_received_ttl0_discarded_hi, + afex_stats.rx_frames_discarded_lo, + qstats-> + total_packets_received_ttl0_discarded_lo); + + ADD_64(afex_stats.rx_frames_discarded_hi, + qstats->etherstatsoverrsizepkts_hi, + afex_stats.rx_frames_discarded_lo, + qstats->etherstatsoverrsizepkts_lo); + + ADD_64(afex_stats.rx_frames_dropped_hi, + qstats->no_buff_discard_hi, + afex_stats.rx_frames_dropped_lo, + qstats->no_buff_discard_lo); + + ADD_64(afex_stats.tx_unicast_bytes_hi, + qstats->total_unicast_bytes_transmitted_hi, + afex_stats.tx_unicast_bytes_lo, + qstats->total_unicast_bytes_transmitted_lo); + + ADD_64(afex_stats.tx_broadcast_bytes_hi, + qstats->total_broadcast_bytes_transmitted_hi, + afex_stats.tx_broadcast_bytes_lo, + qstats->total_broadcast_bytes_transmitted_lo); + + ADD_64(afex_stats.tx_multicast_bytes_hi, + qstats->total_multicast_bytes_transmitted_hi, + afex_stats.tx_multicast_bytes_lo, + qstats->total_multicast_bytes_transmitted_lo); + + ADD_64(afex_stats.tx_unicast_frames_hi, + qstats->total_unicast_packets_transmitted_hi, + afex_stats.tx_unicast_frames_lo, + qstats->total_unicast_packets_transmitted_lo); + + ADD_64(afex_stats.tx_broadcast_frames_hi, + qstats->total_broadcast_packets_transmitted_hi, + afex_stats.tx_broadcast_frames_lo, + qstats->total_broadcast_packets_transmitted_lo); + + ADD_64(afex_stats.tx_multicast_frames_hi, + qstats->total_multicast_packets_transmitted_hi, + afex_stats.tx_multicast_frames_lo, + qstats->total_multicast_packets_transmitted_lo); + + ADD_64(afex_stats.tx_frames_dropped_hi, + qstats-> + total_transmitted_dropped_packets_error_hi, + afex_stats.tx_frames_dropped_lo, + qstats-> + total_transmitted_dropped_packets_error_lo); + } + + /* now add FCoE statistics which are collected separately + * (both offloaded and non offloaded) + */ + if (!NO_FCOE(bp)) { + ADD_64_LE(afex_stats.rx_unicast_bytes_hi, + LE32_0, + afex_stats.rx_unicast_bytes_lo, + fw_fcoe_stat->rx_stat0. + fcoe_rx_byte_cnt); + + ADD_64_LE(afex_stats.rx_unicast_bytes_hi, + fcoe_q_tstorm_stats->rcv_ucast_bytes.hi, + afex_stats.rx_unicast_bytes_lo, + fcoe_q_tstorm_stats->rcv_ucast_bytes.lo); + + ADD_64_LE(afex_stats.rx_broadcast_bytes_hi, + fcoe_q_tstorm_stats->rcv_bcast_bytes.hi, + afex_stats.rx_broadcast_bytes_lo, + fcoe_q_tstorm_stats->rcv_bcast_bytes.lo); + + ADD_64_LE(afex_stats.rx_multicast_bytes_hi, + fcoe_q_tstorm_stats->rcv_mcast_bytes.hi, + afex_stats.rx_multicast_bytes_lo, + fcoe_q_tstorm_stats->rcv_mcast_bytes.lo); + + ADD_64_LE(afex_stats.rx_unicast_frames_hi, + LE32_0, + afex_stats.rx_unicast_frames_lo, + fw_fcoe_stat->rx_stat0. + fcoe_rx_pkt_cnt); + + ADD_64_LE(afex_stats.rx_unicast_frames_hi, + LE32_0, + afex_stats.rx_unicast_frames_lo, + fcoe_q_tstorm_stats->rcv_ucast_pkts); + + ADD_64_LE(afex_stats.rx_broadcast_frames_hi, + LE32_0, + afex_stats.rx_broadcast_frames_lo, + fcoe_q_tstorm_stats->rcv_bcast_pkts); + + ADD_64_LE(afex_stats.rx_multicast_frames_hi, + LE32_0, + afex_stats.rx_multicast_frames_lo, + fcoe_q_tstorm_stats->rcv_ucast_pkts); + + ADD_64_LE(afex_stats.rx_frames_discarded_hi, + LE32_0, + afex_stats.rx_frames_discarded_lo, + fcoe_q_tstorm_stats->checksum_discard); + + ADD_64_LE(afex_stats.rx_frames_discarded_hi, + LE32_0, + afex_stats.rx_frames_discarded_lo, + fcoe_q_tstorm_stats->pkts_too_big_discard); + + ADD_64_LE(afex_stats.rx_frames_discarded_hi, + LE32_0, + afex_stats.rx_frames_discarded_lo, + fcoe_q_tstorm_stats->ttl0_discard); + + ADD_64_LE16(afex_stats.rx_frames_dropped_hi, + LE16_0, + afex_stats.rx_frames_dropped_lo, + fcoe_q_tstorm_stats->no_buff_discard); + + ADD_64_LE(afex_stats.rx_frames_dropped_hi, + LE32_0, + afex_stats.rx_frames_dropped_lo, + fcoe_q_ustorm_stats->ucast_no_buff_pkts); + + ADD_64_LE(afex_stats.rx_frames_dropped_hi, + LE32_0, + afex_stats.rx_frames_dropped_lo, + fcoe_q_ustorm_stats->mcast_no_buff_pkts); + + ADD_64_LE(afex_stats.rx_frames_dropped_hi, + LE32_0, + afex_stats.rx_frames_dropped_lo, + fcoe_q_ustorm_stats->bcast_no_buff_pkts); + + ADD_64_LE(afex_stats.rx_frames_dropped_hi, + LE32_0, + afex_stats.rx_frames_dropped_lo, + fw_fcoe_stat->rx_stat1. + fcoe_rx_drop_pkt_cnt); + + ADD_64_LE(afex_stats.rx_frames_dropped_hi, + LE32_0, + afex_stats.rx_frames_dropped_lo, + fw_fcoe_stat->rx_stat2. + fcoe_rx_drop_pkt_cnt); + + ADD_64_LE(afex_stats.tx_unicast_bytes_hi, + LE32_0, + afex_stats.tx_unicast_bytes_lo, + fw_fcoe_stat->tx_stat. + fcoe_tx_byte_cnt); + + ADD_64_LE(afex_stats.tx_unicast_bytes_hi, + fcoe_q_xstorm_stats->ucast_bytes_sent.hi, + afex_stats.tx_unicast_bytes_lo, + fcoe_q_xstorm_stats->ucast_bytes_sent.lo); + + ADD_64_LE(afex_stats.tx_broadcast_bytes_hi, + fcoe_q_xstorm_stats->bcast_bytes_sent.hi, + afex_stats.tx_broadcast_bytes_lo, + fcoe_q_xstorm_stats->bcast_bytes_sent.lo); + + ADD_64_LE(afex_stats.tx_multicast_bytes_hi, + fcoe_q_xstorm_stats->mcast_bytes_sent.hi, + afex_stats.tx_multicast_bytes_lo, + fcoe_q_xstorm_stats->mcast_bytes_sent.lo); + + ADD_64_LE(afex_stats.tx_unicast_frames_hi, + LE32_0, + afex_stats.tx_unicast_frames_lo, + fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt); + + ADD_64_LE(afex_stats.tx_unicast_frames_hi, + LE32_0, + afex_stats.tx_unicast_frames_lo, + fcoe_q_xstorm_stats->ucast_pkts_sent); + + ADD_64_LE(afex_stats.tx_broadcast_frames_hi, + LE32_0, + afex_stats.tx_broadcast_frames_lo, + fcoe_q_xstorm_stats->bcast_pkts_sent); + + ADD_64_LE(afex_stats.tx_multicast_frames_hi, + LE32_0, + afex_stats.tx_multicast_frames_lo, + fcoe_q_xstorm_stats->mcast_pkts_sent); + + ADD_64_LE(afex_stats.tx_frames_dropped_hi, + LE32_0, + afex_stats.tx_frames_dropped_lo, + fcoe_q_xstorm_stats->error_drop_pkts); + } + + /* if port stats are requested, add them to the PMF + * stats, as anyway they will be accumulated by the + * MCP before sent to the switch + */ + if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) { + ADD_64(afex_stats.rx_frames_dropped_hi, + 0, + afex_stats.rx_frames_dropped_lo, + estats->mac_filter_discard); + ADD_64(afex_stats.rx_frames_dropped_hi, + 0, + afex_stats.rx_frames_dropped_lo, + estats->brb_truncate_discard); + ADD_64(afex_stats.rx_frames_discarded_hi, + 0, + afex_stats.rx_frames_discarded_lo, + estats->mac_discard); + } + + /* write response to scratchpad, for MCP */ + for (i = 0; i < (sizeof(struct afex_stats)/sizeof(u32)); i++) + REG_WR(bp, addr_to_write + i*sizeof(u32), + *(((u32 *)(&afex_stats))+i)); + + /* send ack message to MCP */ + bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_STATSGET_ACK, 0); + } + + if (cmd & DRV_STATUS_AFEX_VIFSET_REQ) { + mf_config = MF_CFG_RD(bp, func_mf_config[func].config); + bp->mf_config[BP_VN(bp)] = mf_config; + DP(BNX2X_MSG_MCP, + "afex: got MCP req VIFSET_REQ, mf_config 0x%x\n", + mf_config); + + /* if VIF_SET is "enabled" */ + if (!(mf_config & FUNC_MF_CFG_FUNC_DISABLED)) { + /* set rate limit directly to internal RAM */ + struct cmng_init_input cmng_input; + struct rate_shaping_vars_per_vn m_rs_vn; + size_t size = sizeof(struct rate_shaping_vars_per_vn); + u32 addr = BAR_XSTRORM_INTMEM + + XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(BP_FUNC(bp)); + + bp->mf_config[BP_VN(bp)] = mf_config; + + bnx2x_calc_vn_max(bp, BP_VN(bp), &cmng_input); + m_rs_vn.vn_counter.rate = + cmng_input.vnic_max_rate[BP_VN(bp)]; + m_rs_vn.vn_counter.quota = + (m_rs_vn.vn_counter.rate * + RS_PERIODIC_TIMEOUT_USEC) / 8; + + __storm_memset_struct(bp, addr, size, (u32 *)&m_rs_vn); + + /* read relevant values from mf_cfg struct in shmem */ + vif_id = + (MF_CFG_RD(bp, func_mf_config[func].e1hov_tag) & + FUNC_MF_CFG_E1HOV_TAG_MASK) >> + FUNC_MF_CFG_E1HOV_TAG_SHIFT; + vlan_val = + (MF_CFG_RD(bp, func_mf_config[func].e1hov_tag) & + FUNC_MF_CFG_AFEX_VLAN_MASK) >> + FUNC_MF_CFG_AFEX_VLAN_SHIFT; + vlan_prio = (mf_config & + FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK) >> + FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT; + vlan_val |= (vlan_prio << VLAN_PRIO_SHIFT); + vlan_mode = + (MF_CFG_RD(bp, + func_mf_config[func].afex_config) & + FUNC_MF_CFG_AFEX_VLAN_MODE_MASK) >> + FUNC_MF_CFG_AFEX_VLAN_MODE_SHIFT; + allowed_prio = + (MF_CFG_RD(bp, + func_mf_config[func].afex_config) & + FUNC_MF_CFG_AFEX_COS_FILTER_MASK) >> + FUNC_MF_CFG_AFEX_COS_FILTER_SHIFT; + + /* send ramrod to FW, return in case of failure */ + if (bnx2x_afex_func_update(bp, vif_id, vlan_val, + allowed_prio)) + return; + + bp->afex_def_vlan_tag = vlan_val; + bp->afex_vlan_mode = vlan_mode; + } else { + /* notify link down because BP->flags is disabled */ + bnx2x_link_report(bp); + + /* send INVALID VIF ramrod to FW */ + bnx2x_afex_func_update(bp, 0xFFFF, 0, 0); + + /* Reset the default afex VLAN */ + bp->afex_def_vlan_tag = -1; + } + } +} + static void bnx2x_pmf_update(struct bnx2x *bp) { int port = BP_PORT(bp); u32 val; bp->port.pmf = 1; - DP(NETIF_MSG_LINK, "pmf %d\n", bp->port.pmf); + DP(BNX2X_MSG_MCP, "pmf %d\n", bp->port.pmf); + + /* + * We need the mb() to ensure the ordering between the writing to + * bp->port.pmf here and reading it from the bnx2x_periodic_task(). + */ + smp_mb(); + + /* queue a periodic task */ + queue_delayed_work(bnx2x_wq, &bp->period_task, 0); + + bnx2x_dcbx_pmf_update(bp); /* enable nig attention */ - val = (0xff0f | (1 << (BP_E1HVN(bp) + 4))); + val = (0xff0f | (1 << (BP_VN(bp) + 4))); if (bp->common.int_block == INT_BLOCK_HC) { REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, val); REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, val); - } else if (CHIP_IS_E2(bp)){ + } else if (!CHIP_IS_E1x(bp)) { REG_WR(bp, IGU_REG_TRAILING_EDGE_LATCH, val); REG_WR(bp, IGU_REG_LEADING_EDGE_LATCH, val); } @@ -2802,16 +3251,18 @@ static void bnx2x_pmf_update(struct bnx2x *bp) u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param) { int mb_idx = BP_FW_MB_IDX(bp); - u32 seq = ++bp->fw_seq; + u32 seq; u32 rc = 0; u32 cnt = 1; u8 delay = CHIP_REV_IS_SLOW(bp) ? 100 : 10; mutex_lock(&bp->fw_mb_mutex); + seq = ++bp->fw_seq; SHMEM_WR(bp, func_mb[mb_idx].drv_mb_param, param); SHMEM_WR(bp, func_mb[mb_idx].drv_mb_header, (command | seq)); - DP(BNX2X_MSG_MCP, "wrote command (%x) to FW MB\n", (command | seq)); + DP(BNX2X_MSG_MCP, "wrote command (%x) to FW MB param 0x%08x\n", + (command | seq), param); do { /* let the FW do it's magic ... */ @@ -2820,7 +3271,7 @@ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param) rc = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_header); /* Give the FW up to 5 second (500*10ms) */ - } while ((seq != (rc & FW_MSG_SEQ_NUMBER_MASK)) && (cnt++ < 500)); + } while (seq != (rc & FW_MSG_SEQ_NUMBER_MASK) && cnt++ < 500); DP(BNX2X_MSG_MCP, "[after %d ms] read (%x) seq is (%x) from FW MB\n", cnt*delay, rc, seq); @@ -2839,32 +3290,12 @@ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param) return rc; } -static void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u16 fw_sb_id, - u8 sb_index, u8 disable, u16 tx_usec); - -/* tmp - until FW support the correct number of stat ids */ -static u8 stat_counter_valid(struct bnx2x *bp, struct bnx2x_fastpath *fp) -{ - /* Statistics are not supported for CNIC Clients at the moment */ - if (IS_FCOE_FP(fp) || IS_FWD_FP(fp) || IS_OOO_FP(fp)) - return false; - - return true; -} - void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) { - /* E1x only - Initialize function-config info: - * Enable TPA - * RSS is handled by a ramrod so there's nothing to do here - */ - if (CHIP_IS_E1x(bp) && (p->func_flgs & FUNC_FLG_TPA)) { + if (CHIP_IS_E1x(bp)) { struct tstorm_eth_function_common_config tcfg = {0}; - tcfg.config_flags = - TSTORM_ETH_FUNCTION_COMMON_CONFIG_ENABLE_TPA; - storm_memset_func_cfg(bp, &tcfg, p->func_id); } @@ -2880,69 +3311,163 @@ void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) } } -static inline unsigned long bnx2x_get_cl_flags(struct bnx2x *bp, - struct bnx2x_fastpath *fp) +/** + * bnx2x_get_tx_only_flags - Return common flags + * + * @bp device handle + * @fp queue handle + * @zero_stats TRUE if statistics zeroing is needed + * + * Return the flags that are common for the Tx-only and not normal connections. + */ +static inline unsigned long bnx2x_get_common_flags(struct bnx2x *bp, + struct bnx2x_fastpath *fp, + bool zero_stats) { unsigned long flags = 0; - /* calculate queue flags */ - set_bit(BNX2X_QUEUE_FLG_ZERO_STATS, &flags); - set_bit(BNX2X_QUEUE_FLG_HC, &flags); - if (IS_MF_SD(bp)) - set_bit(BNX2X_QUEUE_FLG_OV, &flags); + /* PF driver will always initialize the Queue to an ACTIVE state */ + __set_bit(BNX2X_Q_FLG_ACTIVE, &flags); - if (IS_OOO_FP(fp)) - set_bit(BNX2X_QUEUE_FLG_OOO, &flags); + /* tx only connections collect statistics (on the same index as the + * parent connection). The statistics are zeroed when the parent + * connection is initialized. + */ -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - if (bnx2x_is_safc_multi_mode(bp)) - set_bit(BNX2X_QUEUE_FLG_COS, &flags); +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#ifdef BCM_CNIC + if ((!IS_FWD_FP(fp)) && (!IS_OOO_FP(fp))) + { #endif +#endif + __set_bit(BNX2X_Q_FLG_STATS, &flags); + if (zero_stats) + __set_bit(BNX2X_Q_FLG_ZERO_STATS, &flags); - if (!fp->disable_tpa) - set_bit(BNX2X_QUEUE_FLG_TPA, &flags); - - if (stat_counter_valid(bp, fp)) - set_bit(BNX2X_QUEUE_FLG_STATS, &flags); + /* tx only connections can support tx-switching, though their + * COS-ness doesn't survive the loopback + */ + if (bp->flags & TX_SWITCHING) + __set_bit(BNX2X_Q_FLG_TX_SWITCH, &flags); +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#ifdef BCM_CNIC + } +#endif +#endif return flags; } -/* TODO: move it to the sp_verbs object!!! */ -/* Statistics ID are global per chip/path, while Client IDs for E1x are per - * port. - */ -static inline u16 __stats_id(struct bnx2x_fastpath *fp) +static inline unsigned long bnx2x_get_q_flags(struct bnx2x *bp, + struct bnx2x_fastpath *fp, + bool leading) { - if (CHIP_IS_E2(fp->bp)) - return fp->cl_id; - else - return fp->cl_id + BP_PORT(fp->bp) * FP_SB_MAX_E1x; + unsigned long flags = 0; + + /* calculate other queue flags */ + if (IS_MF_SD(bp)) + __set_bit(BNX2X_Q_FLG_OV, &flags); + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (IS_OOO_FP(fp)) + __set_bit(BNX2X_Q_FLG_OOO, &flags); +#endif + if (IS_FCOE_FP(fp)) { + __set_bit(BNX2X_Q_FLG_FCOE, &flags); + /* For FCoE - force usage of default priority (for afex) */ + __set_bit(BNX2X_Q_FLG_FORCE_DEFAULT_PRI, &flags); + } + +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + /* TPA is not supported for bypass queues yet */ + if (!IS_IN_BYPASS_MODE(bp) || !is_bypass_queue(bp, fp->index)) +#endif + if (!fp->disable_tpa) { + __set_bit(BNX2X_Q_FLG_TPA, &flags); +#if !defined(__VMKLNX__) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000)) /* BNX2X_UPSTREAM */ + __set_bit(BNX2X_Q_FLG_TPA_IPV6, &flags); +#endif + if (fp->mode == TPA_MODE_GRO) + __set_bit(BNX2X_Q_FLG_TPA_GRO, &flags); + } + + if (leading) { +#ifndef BNX2X_NETQ /* BNX2X_UPSTREAM */ + __set_bit(BNX2X_Q_FLG_LEADING_RSS, &flags); +#endif + __set_bit(BNX2X_Q_FLG_MCAST, &flags); + } + +#if defined(OLD_VLAN) +#if !defined(BNX2X_ESX_CNA) + if (bp->vlgrp) +#else + if ((!IS_FCOE_FP(fp) && bp->vlgrp) || (IS_FCOE_FP(fp) && bp->cna_vlgrp)) +#endif +#else /* BNX2X_UPSTREAM */ + /* Always set HW VLAN stripping */ +#endif + __set_bit(BNX2X_Q_FLG_VLAN, &flags); + + /* configure silent vlan removal */ + if (IS_MF_AFEX(bp)) + __set_bit(BNX2X_Q_FLG_SILENT_VLAN_REM, &flags); + +#if defined(OLD_VLAN) /* ! BNX2X_UPSTREAM */ + /* configure silent vlan removal */ + if (bp->dcb_state == BNX2X_DCB_STATE_ON) + __set_bit(BNX2X_Q_FLG_SILENT_VLAN_REM, &flags); +#endif + + return flags | bnx2x_get_common_flags(bp, fp, true); } -static void bnx2x_pf_rx_cl_prep(struct bnx2x *bp, - struct bnx2x_fastpath *fp, struct rxq_pause_params *pause, - struct bnx2x_rxq_init_params *rxq_init) +static void bnx2x_pf_q_prep_general(struct bnx2x *bp, + struct bnx2x_fastpath *fp, struct bnx2x_general_setup_params *gen_init, + u8 cos) { - u16 max_sge = 0; + gen_init->stat_id = bnx2x_stats_id(fp); + gen_init->spcl_id = fp->cl_id; + + /* Always use mini-jumbo MTU for FCoE L2 ring */ + if (IS_FCOE_FP(fp)) + gen_init->mtu = BNX2X_FCOE_MINI_JUMBO_MTU; + else + gen_init->mtu = bp->dev->mtu; + + gen_init->cos = cos; + + /* TODO: Add default_vlan configuration here + * when VIF supoort is added. + */ +} + +static void bnx2x_pf_rx_q_prep(struct bnx2x *bp, + struct bnx2x_fastpath *fp, struct rxq_pause_params *pause, + struct bnx2x_rxq_setup_params *rxq_init) +{ + u8 max_sge = 0; u16 sge_sz = 0; u16 tpa_agg_size = 0; - /* calculate queue flags */ - u16 flags = bnx2x_get_cl_flags(bp, fp); - if (!fp->disable_tpa) { - pause->sge_th_hi = 250; - pause->sge_th_lo = 150; + pause->sge_th_lo = SGE_TH_LO(bp); + pause->sge_th_hi = SGE_TH_HI(bp); + + /* validate SGE ring has enough to cross high threshold */ + WARN_ON(bp->dropless_fc && + pause->sge_th_hi + FW_PREFETCH_CNT > + MAX_RX_SGE_CNT * NUM_RX_SGE_PAGES); + tpa_agg_size = min_t(u32, - (min_t(u32, 8, MAX_SKB_FRAGS) * - SGE_PAGE_SIZE * PAGES_PER_SGE), 0xffff); + min_t(u32, 8, MAX_SKB_FRAGS) * SGE_PAGES, + 0xffff); #if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ /* * The minimum size for tpa aggregation size is * RX buffer size + MTU */ - if (max_agg_size_param >= (bp->rx_buf_size + bp->dev->mtu)) + if (max_agg_size_param >= (fp->rx_buf_size + bp->dev->mtu)) tpa_agg_size = min_t(u32, max_agg_size_param, tpa_agg_size); #endif @@ -2950,55 +3475,61 @@ static void bnx2x_pf_rx_cl_prep(struct bnx2x *bp, SGE_PAGE_SHIFT; max_sge = ((max_sge + PAGES_PER_SGE - 1) & (~(PAGES_PER_SGE-1))) >> PAGES_PER_SGE_SHIFT; - sge_sz = (u16)min_t(u32, SGE_PAGE_SIZE * PAGES_PER_SGE, - 0xffff); + sge_sz = (u16)min_t(u32, SGE_PAGES, 0xffff); } /* pause - not for e1 */ if (!CHIP_IS_E1(bp)) { - pause->bd_th_hi = 350; - pause->bd_th_lo = 250; - pause->rcq_th_hi = 350; - pause->rcq_th_lo = 250; + pause->bd_th_lo = BD_TH_LO(bp); + pause->bd_th_hi = BD_TH_HI(bp); + + pause->rcq_th_lo = RCQ_TH_LO(bp); + pause->rcq_th_hi = RCQ_TH_HI(bp); + /* + * validate that rings have enough entries to cross + * high thresholds + */ + WARN_ON(bp->dropless_fc && + pause->bd_th_hi + FW_PREFETCH_CNT > + bp->rx_ring_size); + WARN_ON(bp->dropless_fc && + pause->rcq_th_hi + FW_PREFETCH_CNT > + NUM_RCQ_RINGS * MAX_RCQ_DESC_CNT); -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - pause->pri_map = bnx2x_get_pause_pri_map(bp, fp->cos); -#else pause->pri_map = 1; -#endif } /* rxq setup */ - rxq_init->flags = flags; - rxq_init->cxt = &bp->context.vcxt[fp->cid].eth; rxq_init->dscr_map = fp->rx_desc_mapping; rxq_init->sge_map = fp->rx_sge_mapping; rxq_init->rcq_map = fp->rx_comp_mapping; rxq_init->rcq_np_map = fp->rx_comp_mapping + BCM_PAGE_SIZE; - rxq_init->mtu = bp->dev->mtu; /* This should be a maximum number of data bytes that may be * placed on the BD (not including paddings). */ - rxq_init->buf_sz = bp->rx_buf_size - BNX2X_RX_ALIGN - - BNX2X_FW_IP_HDR_ALIGN_PAD; + rxq_init->buf_sz = fp->rx_buf_size - BNX2X_FW_RX_ALIGN - + IP_HEADER_ALIGNMENT_PADDING; rxq_init->cl_qzone_id = fp->cl_qzone_id; - rxq_init->cl_id = fp->cl_id; - rxq_init->spcl_id = fp->cl_id; - rxq_init->stat_id = __stats_id(fp); rxq_init->tpa_agg_sz = tpa_agg_size; rxq_init->sge_buf_sz = sge_sz; rxq_init->max_sges_pkt = max_sge; + rxq_init->rss_engine_id = BP_FUNC(bp); + rxq_init->mcast_engine_id = BP_FUNC(bp); - /* Maximum number or simultaneous TPA aggregation for this Client. +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + if (is_bypass_queue(bp, fp->index)) { + rxq_init->rss_engine_id = E1H_FUNC_MAX + BP_FUNC(bp); + rxq_init->mcast_engine_id = E1H_FUNC_MAX + BP_FUNC(bp); + } +#endif + /* Maximum number or simultaneous TPA aggregation for this Queue. * - * For PF Clients it should be the maximum avaliable number. + * For PF Clients it should be the maximum available number. * VF driver(s) may want to define it to a smaller value. */ - rxq_init->max_tpa_queues = - (CHIP_IS_E1(bp) ? ETH_MAX_AGGREGATION_QUEUES_E1 : - ETH_MAX_AGGREGATION_QUEUES_E1H); + rxq_init->max_tpa_queues = MAX_AGG_QS(bp); rxq_init->cache_line_log = BNX2X_RX_ALIGN_SHIFT; rxq_init->fw_sb_id = fp->fw_sb_id; @@ -3006,69 +3537,56 @@ static void bnx2x_pf_rx_cl_prep(struct bnx2x *bp, if (IS_FCOE_FP(fp)) rxq_init->sb_cq_index = HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS; else - rxq_init->sb_cq_index = U_SB_ETH_RX_CQ_INDEX; - - rxq_init->cid = HW_CID(bp, fp->cid); - - rxq_init->hc_rate = bp->rx_ticks ? (1000000 / bp->rx_ticks) : 0; - -#ifndef BNX2X_NETQ /* BNX2X_UPSTREAM */ - rxq_init->rss_mode = bp->multi_mode; -#else - /* Disable RSS for Netqueue */ - rxq_init->rss_mode = ETH_RSS_MODE_DISABLED; + rxq_init->sb_cq_index = HC_INDEX_ETH_RX_CQ_CONS; + /* configure silent vlan removal + * if multi function mode is afex, then mask default vlan + */ + if (IS_MF_AFEX(bp)) { + rxq_init->silent_removal_value = bp->afex_def_vlan_tag; + rxq_init->silent_removal_mask = VLAN_VID_MASK; + } +#ifdef OLD_VLAN + else +#endif /* OLD_VLAN */ +#ifdef OLD_VLAN /* ! BNX2X_UPSTREAM */ + if (IS_FCOE_FP(fp)) { + rxq_init->silent_removal_value = 0; + rxq_init->silent_removal_mask = VLAN_VID_MASK; + } else { + rxq_init->silent_removal_value = 0; + rxq_init->silent_removal_mask = VLAN_PRIO_MASK | VLAN_VID_MASK; + } #endif } -static void bnx2x_pf_tx_cl_prep(struct bnx2x *bp, - struct bnx2x_fastpath *fp, struct bnx2x_txq_init_params *txq_init) +static void bnx2x_pf_tx_q_prep(struct bnx2x *bp, + struct bnx2x_fastpath *fp, struct bnx2x_txq_setup_params *txq_init, + u8 cos) { - u16 flags = bnx2x_get_cl_flags(bp, fp); - - txq_init->flags = flags; - txq_init->cxt = &bp->context.vcxt[fp->cid].eth; - txq_init->dscr_map = fp->tx_desc_mapping; - txq_init->cid = HW_CID(bp, fp->cid); - txq_init->sb_cq_index = C_SB_ETH_TX_CQ_INDEX; + txq_init->dscr_map = fp->txdata_ptr[cos]->tx_desc_mapping; + txq_init->sb_cq_index = HC_INDEX_ETH_FIRST_TX_CQ_CONS + cos; txq_init->traffic_type = LLFC_TRAFFIC_TYPE_NW; txq_init->fw_sb_id = fp->fw_sb_id; - /* set the tss leading client id for TX classfication == leading RSS client id */ + /* + * set the tss leading client id for TX classfication == + * leading RSS client id + */ txq_init->tss_leading_cl_id = bnx2x_fp(bp, 0, cl_id); if (IS_FCOE_FP(fp)) { txq_init->sb_cq_index = HC_SP_INDEX_ETH_FCOE_TX_CQ_CONS; txq_init->traffic_type = LLFC_TRAFFIC_TYPE_FCOE; } - -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - /* the cos is saved in the fp */ - txq_init->cos = fp->cos; -#endif - - txq_init->hc_rate = bp->tx_ticks ? (1000000 / bp->tx_ticks) : 0; - -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - /* enable TX (local) switching for all clients other then FCOE */ - if (!IS_FCOE_FP(fp)) - set_bit(BNX2X_QUEUE_FLG_TX_SWITCH, &txq_init->flags); -#endif } -void bnx2x_pf_init(struct bnx2x *bp) +static void bnx2x_pf_init(struct bnx2x *bp) { struct bnx2x_func_init_params func_init = {0}; - struct event_ring_data eq_data = {{0}}; + struct event_ring_data eq_data = { {0} }; u16 flags; -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - int i; -#endif - /* pf specific setups */ - if (!CHIP_IS_E1(bp)) - storm_memset_ov(bp, bp->mf_ov, BP_FUNC(bp)); - - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { /* reset IGU PF statistics: MSIX + ATTN */ /* PF */ REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + @@ -3084,7 +3602,7 @@ void bnx2x_pf_init(struct bnx2x *bp) } /* function setup flags */ - flags = (FUNC_FLG_STATS | FUNC_FLG_SPQ); + flags = (FUNC_FLG_STATS | FUNC_FLG_LEADING | FUNC_FLG_SPQ); /* This flag is relevant for E1x only. * E2 doesn't have a TPA configuration in a function level. @@ -3102,22 +3620,14 @@ void bnx2x_pf_init(struct bnx2x *bp) memset(&(bp->cmng), 0, sizeof(struct cmng_struct_per_port)); /* - Congestion management values depend on the link rate - There is no active link so initial link rate is set to 10 Gbps. - When the link comes up The congestion management values are - re-calculated according to the actual link rate. - */ + * Congestion management values depend on the link rate + * There is no active link so initial link rate is set to 10 Gbps. + * When the link comes up The congestion management values are + * re-calculated according to the actual link rate. + */ bp->link_vars.line_speed = SPEED_10000; bnx2x_cmng_fns_init(bp, true, bnx2x_get_cmng_fns_mode(bp)); -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - if (bnx2x_is_safc_multi_mode(bp)) { - bp->cmng.safc_vars.safc_timeout_usec = 200; - for (i = 0; i < BNX2X_MAX_PRIORITY; i++) - bp->cmng.safc_vars.cos_to_pause_mask[i] = - (1 << bp->pri_map[i]); - } -#endif /* Only the PMF sets the HW */ if (bp->port.pmf) storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp)); @@ -3160,6 +3670,223 @@ static void bnx2x_e1h_enable(struct bnx2x *bp) */ } +#define DRV_INFO_ETH_STAT_NUM_MACS_REQUIRED 3 + +static void bnx2x_drv_info_ether_stat(struct bnx2x *bp) +{ + struct eth_stats_info *ether_stat = + &bp->slowpath->drv_info_to_mcp.ether_stat; + + /* leave last char as NULL */ + memcpy(ether_stat->version, DRV_MODULE_VERSION, + ETH_STAT_INFO_VERSION_LEN - 1); + + bp->fp[0].mac_obj.get_n_elements(bp, &bp->fp[0].mac_obj, + DRV_INFO_ETH_STAT_NUM_MACS_REQUIRED, + ether_stat->mac_local); + + ether_stat->mtu_size = bp->dev->mtu; + +#if (LINUX_VERSION_CODE < 0x020627) /* non BNX2X_UPSTREAM */ + if (bp->rx_csum) +#else /* BNX2X_UPSTREAM */ + if (bp->dev->features & NETIF_F_RXCSUM) +#endif + ether_stat->feature_flags |= FEATURE_ETH_CHKSUM_OFFLOAD_MASK; + if (bp->dev->features & NETIF_F_TSO) + ether_stat->feature_flags |= FEATURE_ETH_LSO_MASK; + ether_stat->feature_flags |= bp->common.boot_mode; + + ether_stat->promiscuous_mode = (bp->dev->flags & IFF_PROMISC) ? 1 : 0; + + ether_stat->txq_size = bp->tx_ring_size; + ether_stat->rxq_size = bp->rx_ring_size; +} + +static void bnx2x_drv_info_fcoe_stat(struct bnx2x *bp) +{ +#ifdef BCM_CNIC + struct bnx2x_dcbx_app_params *app = &bp->dcbx_port_params.app; + struct fcoe_stats_info *fcoe_stat = + &bp->slowpath->drv_info_to_mcp.fcoe_stat; + + memcpy(fcoe_stat->mac_local + MAC_LEADING_ZERO_CNT, + bp->fip_mac, ETH_ALEN); + + fcoe_stat->qos_priority = + app->traffic_type_priority[LLFC_TRAFFIC_TYPE_FCOE]; + + /* insert FCoE stats from ramrod response */ + if (!NO_FCOE(bp)) { + struct tstorm_per_queue_stats *fcoe_q_tstorm_stats = + &bp->fw_stats_data->queue_stats[FCOE_IDX]. + tstorm_queue_statistics; + + struct xstorm_per_queue_stats *fcoe_q_xstorm_stats = + &bp->fw_stats_data->queue_stats[FCOE_IDX]. + xstorm_queue_statistics; + + struct fcoe_statistics_params *fw_fcoe_stat = + &bp->fw_stats_data->fcoe; + + ADD_64_LE(fcoe_stat->rx_bytes_hi, LE32_0, + fcoe_stat->rx_bytes_lo, + fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt); + + ADD_64_LE(fcoe_stat->rx_bytes_hi, + fcoe_q_tstorm_stats->rcv_ucast_bytes.hi, + fcoe_stat->rx_bytes_lo, + fcoe_q_tstorm_stats->rcv_ucast_bytes.lo); + + ADD_64_LE(fcoe_stat->rx_bytes_hi, + fcoe_q_tstorm_stats->rcv_bcast_bytes.hi, + fcoe_stat->rx_bytes_lo, + fcoe_q_tstorm_stats->rcv_bcast_bytes.lo); + + ADD_64_LE(fcoe_stat->rx_bytes_hi, + fcoe_q_tstorm_stats->rcv_mcast_bytes.hi, + fcoe_stat->rx_bytes_lo, + fcoe_q_tstorm_stats->rcv_mcast_bytes.lo); + + ADD_64_LE(fcoe_stat->rx_frames_hi, LE32_0, + fcoe_stat->rx_frames_lo, + fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt); + + ADD_64_LE(fcoe_stat->rx_frames_hi, LE32_0, + fcoe_stat->rx_frames_lo, + fcoe_q_tstorm_stats->rcv_ucast_pkts); + + ADD_64_LE(fcoe_stat->rx_frames_hi, LE32_0, + fcoe_stat->rx_frames_lo, + fcoe_q_tstorm_stats->rcv_bcast_pkts); + + ADD_64_LE(fcoe_stat->rx_frames_hi, LE32_0, + fcoe_stat->rx_frames_lo, + fcoe_q_tstorm_stats->rcv_mcast_pkts); + + ADD_64_LE(fcoe_stat->tx_bytes_hi, LE32_0, + fcoe_stat->tx_bytes_lo, + fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt); + + ADD_64_LE(fcoe_stat->tx_bytes_hi, + fcoe_q_xstorm_stats->ucast_bytes_sent.hi, + fcoe_stat->tx_bytes_lo, + fcoe_q_xstorm_stats->ucast_bytes_sent.lo); + + ADD_64_LE(fcoe_stat->tx_bytes_hi, + fcoe_q_xstorm_stats->bcast_bytes_sent.hi, + fcoe_stat->tx_bytes_lo, + fcoe_q_xstorm_stats->bcast_bytes_sent.lo); + + ADD_64_LE(fcoe_stat->tx_bytes_hi, + fcoe_q_xstorm_stats->mcast_bytes_sent.hi, + fcoe_stat->tx_bytes_lo, + fcoe_q_xstorm_stats->mcast_bytes_sent.lo); + + ADD_64_LE(fcoe_stat->tx_frames_hi, LE32_0, + fcoe_stat->tx_frames_lo, + fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt); + + ADD_64_LE(fcoe_stat->tx_frames_hi, LE32_0, + fcoe_stat->tx_frames_lo, + fcoe_q_xstorm_stats->ucast_pkts_sent); + + ADD_64_LE(fcoe_stat->tx_frames_hi, LE32_0, + fcoe_stat->tx_frames_lo, + fcoe_q_xstorm_stats->bcast_pkts_sent); + + ADD_64_LE(fcoe_stat->tx_frames_hi, LE32_0, + fcoe_stat->tx_frames_lo, + fcoe_q_xstorm_stats->mcast_pkts_sent); + } + + /* ask L5 driver to add data to the struct */ + bnx2x_cnic_notify(bp, CNIC_CTL_FCOE_STATS_GET_CMD); +#endif +} + +static void bnx2x_drv_info_iscsi_stat(struct bnx2x *bp) +{ +#ifdef BCM_CNIC + struct bnx2x_dcbx_app_params *app = &bp->dcbx_port_params.app; + struct iscsi_stats_info *iscsi_stat = + &bp->slowpath->drv_info_to_mcp.iscsi_stat; + + memcpy(iscsi_stat->mac_local + MAC_LEADING_ZERO_CNT, + bp->cnic_eth_dev.iscsi_mac, ETH_ALEN); + + iscsi_stat->qos_priority = + app->traffic_type_priority[LLFC_TRAFFIC_TYPE_ISCSI]; + + /* ask L5 driver to add data to the struct */ + bnx2x_cnic_notify(bp, CNIC_CTL_ISCSI_STATS_GET_CMD); +#endif +} + +/* called due to MCP event (on pmf): + * reread new bandwidth configuration + * configure FW + * notify others function about the change + */ +static inline void bnx2x_config_mf_bw(struct bnx2x *bp) +{ + if (bp->link_vars.link_up) { + bnx2x_cmng_fns_init(bp, true, CMNG_FNS_MINMAX); + bnx2x_link_sync_notify(bp); + } + storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp)); +} + +static inline void bnx2x_set_mf_bw(struct bnx2x *bp) +{ + bnx2x_config_mf_bw(bp); + bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW_ACK, 0); +} + +static void bnx2x_handle_drv_info_req(struct bnx2x *bp) +{ + enum drv_info_opcode op_code; + u32 drv_info_ctl = SHMEM2_RD(bp, drv_info_control); + + /* if drv_info version supported by MFW doesn't match - send NACK */ + if ((drv_info_ctl & DRV_INFO_CONTROL_VER_MASK) != DRV_INFO_CUR_VER) { + bnx2x_fw_command(bp, DRV_MSG_CODE_DRV_INFO_NACK, 0); + return; + } + + op_code = (drv_info_ctl & DRV_INFO_CONTROL_OP_CODE_MASK) >> + DRV_INFO_CONTROL_OP_CODE_SHIFT; + + memset(&bp->slowpath->drv_info_to_mcp, 0, + sizeof(union drv_info_to_mcp)); + + switch (op_code) { + case ETH_STATS_OPCODE: + bnx2x_drv_info_ether_stat(bp); + break; + case FCOE_STATS_OPCODE: + bnx2x_drv_info_fcoe_stat(bp); + break; + case ISCSI_STATS_OPCODE: + bnx2x_drv_info_iscsi_stat(bp); + break; + default: + /* if op code isn't supported - send NACK */ + bnx2x_fw_command(bp, DRV_MSG_CODE_DRV_INFO_NACK, 0); + return; + } + + /* if we got drv_info attn from MFW then these fields are defined in + * shmem2 for sure + */ + SHMEM2_WR(bp, drv_info_host_addr_lo, + U64_LO(bnx2x_sp_mapping(bp, drv_info_to_mcp))); + SHMEM2_WR(bp, drv_info_host_addr_hi, + U64_HI(bnx2x_sp_mapping(bp, drv_info_to_mcp))); + + bnx2x_fw_command(bp, DRV_MSG_CODE_DRV_INFO_ACK, 0); +} + static void bnx2x_dcc_event(struct bnx2x *bp, u32 dcc_event) { DP(BNX2X_MSG_MCP, "dcc_event 0x%x\n", dcc_event); @@ -3172,22 +3899,20 @@ static void bnx2x_dcc_event(struct bnx2x *bp, u32 dcc_event) * locks */ if (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED) { - DP(NETIF_MSG_IFDOWN, "mf_cfg function disabled\n"); + DP(BNX2X_MSG_MCP, "mf_cfg function disabled\n"); bp->flags |= MF_FUNC_DIS; + bnx2x_e1h_disable(bp); } else { - DP(NETIF_MSG_IFUP, "mf_cfg function enabled\n"); + DP(BNX2X_MSG_MCP, "mf_cfg function enabled\n"); bp->flags &= ~MF_FUNC_DIS; + bnx2x_e1h_enable(bp); } dcc_event &= ~DRV_STATUS_DCC_DISABLE_ENABLE_PF; } - if (dcc_event & DRV_STATUS_DCC_BANDWIDTH_ALLOCATION) { - - bnx2x_cmng_fns_init(bp, true, CMNG_FNS_MINMAX); - bnx2x_link_sync_notify(bp); - storm_memset_cmng(bp, &bp->cmng, BP_PORT(bp)); + bnx2x_config_mf_bw(bp); dcc_event &= ~DRV_STATUS_DCC_BANDWIDTH_ALLOCATION; } @@ -3206,7 +3931,7 @@ static inline struct eth_spe *bnx2x_sp_get_next(struct bnx2x *bp) if (bp->spq_prod_bd == bp->spq_last_bd) { bp->spq_prod_bd = bp->spq; bp->spq_prod_idx = 0; - DP(NETIF_MSG_TIMER, "end of spq\n"); + DP(BNX2X_MSG_SP, "end of spq\n"); } else { bp->spq_prod_bd++; bp->spq_prod_idx++; @@ -3219,38 +3944,82 @@ static inline void bnx2x_sp_prod_update(struct bnx2x *bp) { int func = BP_FUNC(bp); - /* Make sure that BD data is updated before writing the producer */ - wmb(); + /* + * Make sure that BD data is updated before writing the producer: + * BD data is written to the memory, the producer is read from the + * memory, thus we need a full memory barrier to ensure the ordering. + */ + mb(); REG_WR16(bp, BAR_XSTRORM_INTMEM + XSTORM_SPQ_PROD_OFFSET(func), - bp->spq_prod_idx); + bp->spq_prod_idx); mmiowb(); } +/** + * bnx2x_is_contextless_ramrod - check if the current command ends on EQ + * + * @cmd: command to check + * @cmd_type: command type + */ +static inline bool bnx2x_is_contextless_ramrod(int cmd, int cmd_type) +{ + if ((cmd_type == NONE_CONNECTION_TYPE) || + (cmd == RAMROD_CMD_ID_ETH_FORWARD_SETUP) || + (cmd == RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES) || + (cmd == RAMROD_CMD_ID_ETH_FILTER_RULES) || + (cmd == RAMROD_CMD_ID_ETH_MULTICAST_RULES) || + (cmd == RAMROD_CMD_ID_ETH_SET_MAC) || + (cmd == RAMROD_CMD_ID_ETH_RSS_UPDATE)) + return true; + else + return false; -/* SP data is handled as if it's always an address pair, thus - * data fields are not swapped to little endian in upper - * functions. Instead this function swaps data as if it's - * two u32 fields. +} + + +/** + * bnx2x_sp_post - place a single command on an SP ring + * + * @bp: driver handle + * @command: command to place (e.g. SETUP, FILTER_RULES, etc.) + * @cid: SW CID the command is related to + * @data_hi: command private data address (high 32 bits) + * @data_lo: command private data address (low 32 bits) + * @cmd_type: command type (e.g. NONE, ETH) + * + * SP data is handled as if it's always an address pair, thus data fields are + * not swapped to little endian in upper functions. Instead this function swaps + * data as if it's two u32 fields. */ int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, - u32 data_hi, u32 data_lo, int common) + u32 data_hi, u32 data_lo, int cmd_type) { struct eth_spe *spe; u16 type; + bool common = bnx2x_is_contextless_ramrod(command, cmd_type); #ifdef BNX2X_STOP_ON_ERROR - if (unlikely(bp->panic)) + if (unlikely(bp->panic)) { + BNX2X_ERR("Can't post SP when there is panic\n"); return -EIO; + } #endif spin_lock_bh(&bp->spq_lock); - if (!atomic_read(&bp->spq_left)) { - BNX2X_ERR("BUG! SPQ ring full!\n"); - spin_unlock_bh(&bp->spq_lock); - bnx2x_panic(); - return -EBUSY; + if (common) { + if (!atomic_read(&bp->eq_spq_left)) { + BNX2X_ERR("BUG! EQ ring full!\n"); + spin_unlock_bh(&bp->spq_lock); + bnx2x_panic(); + return -EBUSY; + } + } else if (!atomic_read(&bp->cq_spq_left)) { + BNX2X_ERR("BUG! SPQ ring full!\n"); + spin_unlock_bh(&bp->spq_lock); + bnx2x_panic(); + return -EBUSY; } spe = bnx2x_sp_get_next(bp); @@ -3259,17 +4028,8 @@ int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, spe->hdr.conn_and_cmd_data = cpu_to_le32((command << SPE_HDR_CMD_ID_SHIFT) | HW_CID(bp, cid)); - if (common) - /* Common ramrods: - * FUNC_START, FUNC_STOP, CFC_DEL, STATS, SET_MAC - * TRAFFIC_STOP, TRAFFIC_START - */ - type = (NONE_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT) - & SPE_HDR_CONN_TYPE; - else - /* ETH ramrods: SETUP, HALT */ - type = (ETH_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT) - & SPE_HDR_CONN_TYPE; + + type = (cmd_type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE; /* TBD: Check if it works for VFs */ type |= ((BP_FUNC(bp) << SPE_HDR_FUNCTION_ID_SHIFT) & @@ -3277,25 +4037,27 @@ int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, spe->hdr.type = cpu_to_le16(type); - spe->data.update_data_addr.hi = cpu_to_le32(data_hi); spe->data.update_data_addr.lo = cpu_to_le32(data_lo); - /* stats ramrod has it's own slot on the spq */ - if (command != RAMROD_CMD_ID_COMMON_STAT_QUERY) - /* It's ok if the actual decrement is issued towards the memory - * somewhere between the spin_lock and spin_unlock. Thus no - * more explict memory barrier is needed. - */ - atomic_dec(&bp->spq_left); + /* + * It's ok if the actual decrement is issued towards the memory + * somewhere between the spin_lock and spin_unlock. Thus no + * more explict memory barrier is needed. + */ + if (common) + atomic_dec(&bp->eq_spq_left); + else + atomic_dec(&bp->cq_spq_left); - DP(BNX2X_MSG_SP/*NETIF_MSG_TIMER*/, - "SPQE[%x] (%x:%x) command %d hw_cid %x data (%x:%x) " - "type(0x%x) left %x\n", + + DP(BNX2X_MSG_SP, + "SPQE[%x] (%x:%x) (cmd, common?) (%d,%d) hw_cid %x data (%x:%x) type(0x%x) left (CQ, EQ) (%x,%x)\n", bp->spq_prod_idx, (u32)U64_HI(bp->spq_mapping), (u32)(U64_LO(bp->spq_mapping) + - (void *)bp->spq_prod_bd - (void *)bp->spq), command, - HW_CID(bp, cid), data_hi, data_lo, type, atomic_read(&bp->spq_left)); + (void *)bp->spq_prod_bd - (void *)bp->spq), command, common, + HW_CID(bp, cid), data_hi, data_lo, type, + atomic_read(&bp->cq_spq_left), atomic_read(&bp->eq_spq_left)); bnx2x_sp_prod_update(bp); spin_unlock_bh(&bp->spq_lock); @@ -3350,9 +4112,9 @@ static inline u16 bnx2x_update_dsb_idx(struct bnx2x *bp) bp->def_idx = def_sb->sp_sb.running_index; rc |= BNX2X_DEF_SB_IDX; } + /* Do not reorder: indecies reading should complete before handling */ barrier(); - return rc; } @@ -3462,6 +4224,21 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted) /* now set back the mask */ if (asserted & ATTN_NIG_FOR_FUNC) { + /* Verify that IGU ack through BAR was written before restoring + * NIG mask. This loop should exit after 2-3 iterations max. + */ + if (bp->common.int_block != INT_BLOCK_HC) { + u32 cnt = 0, igu_acked; + do { + igu_acked = REG_RD(bp, + IGU_REG_ATTENTION_ACK_BITS); + } while (((igu_acked & ATTN_NIG_FOR_FUNC) == 0) && + (++cnt < MAX_IGU_ATTN_ACK_TO)); + if (!igu_acked) + DP(NETIF_MSG_HW, + "Failed to verify IGU ack on time\n"); + barrier(); + } REG_WR(bp, nig_int_mask_addr, nig_mask); bnx2x_release_phy_lock(bp); } @@ -3469,7 +4246,7 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted) static inline void bnx2x_fan_failure(struct bnx2x *bp) { - int /*abs*/port = BP_PORT(bp); + int port = BP_PORT(bp); u32 ext_phy_config; /* mark the failure */ ext_phy_config = @@ -3482,9 +4259,18 @@ static inline void bnx2x_fan_failure(struct bnx2x *bp) ext_phy_config); /* log the failure */ - netdev_err(bp->dev, "Fan Failure on Network Controller has caused" - " the driver to shutdown the card to prevent permanent" - " damage. Please contact OEM Support for assistance\n"); + netdev_err(bp->dev, "Fan Failure on Network Controller has caused the driver to shutdown the card to prevent permanent damage.\n" + "Please contact OEM Support for assistance\n"); + + /* Scheudle device reset (unload) + * This is due to some boards consuming sufficient power when driver is + * up to overheat if fan fails. + */ + smp_mb__before_clear_bit(); + set_bit(BNX2X_SP_RTNL_FAN_FAILURE, &bp->sp_rtnl_state); + smp_mb__after_clear_bit(); + schedule_delayed_work(&bp->sp_rtnl_task, 0); + } static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) @@ -3509,8 +4295,7 @@ static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) bnx2x_fan_failure(bp); } - if (attn & (AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_0 | - AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_1)) { + if ((attn & bp->link_vars.aeu_int_mask) && bp->port.pmf) { bnx2x_acquire_phy_lock(bp); bnx2x_handle_module_detect_int(&bp->link_params); bnx2x_release_phy_lock(bp); @@ -3579,12 +4364,13 @@ static inline void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn) if (val & 0x18000) BNX2X_ERR("FATAL error from PXP\n"); - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { val = REG_RD(bp, PXP_REG_PXP_INT_STS_CLR_1); BNX2X_ERR("PXP hw attention-1 0x%x\n", val); } } +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ #define PXP2_EOP_ERROR_BIT PXP2_PXP2_INT_STS_CLR_0_REG_WR_PGLUE_EOP_ERROR #define AEU_PXP2_HW_INT_BIT AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_HW_INTERRUPT @@ -3592,19 +4378,26 @@ static inline void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn) /* CQ47854 workaround do not panic on * PXP2_PXP2_INT_STS_0_REG_WR_PGLUE_EOP_ERROR */ - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { u32 val0, mask0, val1, mask1; - val0 = REG_RD(bp, PXP2_REG_PXP2_INT_STS_CLR_0); - /* probably we lose additional attentions between - * REG_RD and REG_WR, in this case user will not - * be notified about them - */ - REG_WR(bp, PXP2_REG_PXP2_INT_STS_WR_0, - val0 & ~PXP2_EOP_ERROR_BIT); mask0 = REG_RD(bp, PXP2_REG_PXP2_INT_MASK_0); val1 = REG_RD(bp, PXP2_REG_PXP2_INT_STS_1); mask1 = REG_RD(bp, PXP2_REG_PXP2_INT_MASK_1); + val0 = REG_RD(bp, PXP2_REG_PXP2_INT_STS_0); + /* + * If the olny PXP2_EOP_ERROR_BIT is set in + * STS0 and STS1 - clear it + * + * probably we lose additional attentions between + * STS0 and STS_CLR0, in this case user will not + * be notified about them + */ + if (val0 & mask0 & PXP2_EOP_ERROR_BIT && + !(val1 & mask1)) + val0 = REG_RD(bp, PXP2_REG_PXP2_INT_STS_CLR_0); + /* print the register, since no one can restore it */ + BNX2X_ERR("PXP2_REG_PXP2_INT_STS_CLR_0 0x%08x\n", val0); /* * if PXP2_PXP2_INT_STS_0_REG_WR_PGLUE_EOP_ERROR @@ -3623,7 +4416,7 @@ static inline void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn) } } } - +#endif if (attn & HW_INTERRUT_ASSERT_SET_2) { int port = BP_PORT(bp); @@ -3650,35 +4443,54 @@ static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn) if (attn & BNX2X_PMF_LINK_ASSERT) { int func = BP_FUNC(bp); + REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_12 + func*4, 0); + bnx2x_read_mf_cfg(bp); bp->mf_config[BP_VN(bp)] = MF_CFG_RD(bp, func_mf_config[BP_ABS_FUNC(bp)].config); - val = SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_status); if (val & DRV_STATUS_DCC_EVENT_MASK) bnx2x_dcc_event(bp, (val & DRV_STATUS_DCC_EVENT_MASK)); -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - if (val & DRV_STATUS_VF_DISABLED) { - bnx2x_vf_handle_flr_event(bp); - } -#endif - if ((bp->port.pmf == 0) && (val & DRV_STATUS_PMF)) { - bnx2x_pmf_update(bp); - } + if (val & DRV_STATUS_SET_MF_BW) + bnx2x_set_mf_bw(bp); + if (val & DRV_STATUS_DRV_INFO_REQ) + bnx2x_handle_drv_info_req(bp); + +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ + if (val & DRV_STATUS_VF_DISABLED) + bnx2x_vf_handle_flr_event(bp); +#endif + if ((bp->port.pmf == 0) && (val & DRV_STATUS_PMF)) + bnx2x_pmf_update(bp); + + if (bp->port.pmf && + (val & DRV_STATUS_DCBX_NEGOTIATION_RESULTS) && + bp->dcbx_enabled > 0) + /* start dcbx state machine */ + bnx2x_dcbx_set_params(bp, + BNX2X_DCBX_STATE_NEG_RECEIVED); + if (val & DRV_STATUS_AFEX_EVENT_MASK) + bnx2x_handle_afex_cmd(bp, + val & DRV_STATUS_AFEX_EVENT_MASK); + if (bp->link_vars.periodic_flags & + PERIODIC_FLAGS_LINK_EVENT) { + /* sync with link */ + bnx2x_acquire_phy_lock(bp); + bp->link_vars.periodic_flags &= + ~PERIODIC_FLAGS_LINK_EVENT; + bnx2x_release_phy_lock(bp); + if (IS_MF(bp)) + bnx2x_link_sync_notify(bp); + bnx2x_link_report(bp); + } /* Always call it here: bnx2x_link_report() will * prevent the link indication duplication. */ bnx2x__link_status_update(bp); - - if (bp->port.pmf && - (val & DRV_STATUS_DCBX_NEGOTIATION_RESULTS)) - /* start dcbx state machine */ - bnx2x_dcbx_set_params(bp, - BNX2X_DCBX_STATE_NEG_RECEIVED); } else if (attn & BNX2X_MC_ASSERT_BITS) { BNX2X_ERR("MC assert!\n"); @@ -3694,10 +4506,6 @@ static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn) BNX2X_ERR("MCP assert!\n"); REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_11, 0); bnx2x_fw_dump(bp); - } else if (attn & DRV_STATUS_DCBX_NEGOTIATION_RESULTS) { - BNX2X_ERR("MCP assert!\n"); - REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_11, 0); - bnx2x_fw_dump(bp); } else BNX2X_ERR("Unknown HW assert! (attn 0x%x)\n", attn); @@ -3719,129 +4527,240 @@ static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn) } } +/* + * Bits map: + * 0-7 - Engine0 load counter. + * 8-15 - Engine1 load counter. + * 16 - Engine0 RESET_IN_PROGRESS bit. + * 17 - Engine1 RESET_IN_PROGRESS bit. + * 18 - Engine0 ONE_IS_LOADED. Set when there is at least one active function + * on the engine + * 19 - Engine1 ONE_IS_LOADED. + * 20 - Chip reset flow bit. When set none-leader must wait for both engines + * leader to complete (check for both RESET_IN_PROGRESS bits and not for + * just the one belonging to its engine). + * + */ +#define BNX2X_RECOVERY_GLOB_REG MISC_REG_GENERIC_POR_1 -#define BNX2X_MISC_GEN_REG MISC_REG_GENERIC_POR_1 -#define LOAD_COUNTER_BITS 16 /* Number of bits for load counter */ -#define LOAD_COUNTER_MASK (((u32)0x1 << LOAD_COUNTER_BITS) - 1) -#define RESET_DONE_FLAG_MASK (~LOAD_COUNTER_MASK) -#define RESET_DONE_FLAG_SHIFT LOAD_COUNTER_BITS -#define CHIP_PARITY_SUPPORTED(bp) (CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) +#define BNX2X_PATH0_LOAD_CNT_MASK 0x000000ff +#define BNX2X_PATH0_LOAD_CNT_SHIFT 0 +#define BNX2X_PATH1_LOAD_CNT_MASK 0x0000ff00 +#define BNX2X_PATH1_LOAD_CNT_SHIFT 8 +#define BNX2X_PATH0_RST_IN_PROG_BIT 0x00010000 +#define BNX2X_PATH1_RST_IN_PROG_BIT 0x00020000 +#define BNX2X_GLOBAL_RESET_BIT 0x00040000 /* + * Set the GLOBAL_RESET bit. + * + * Should be run under rtnl lock + */ +void bnx2x_set_reset_global(struct bnx2x *bp) +{ + u32 val; + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); + val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); + REG_WR(bp, BNX2X_RECOVERY_GLOB_REG, val | BNX2X_GLOBAL_RESET_BIT); + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); +} + +/* + * Clear the GLOBAL_RESET bit. + * + * Should be run under rtnl lock + */ +static inline void bnx2x_clear_reset_global(struct bnx2x *bp) +{ + u32 val; + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); + val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); + REG_WR(bp, BNX2X_RECOVERY_GLOB_REG, val & (~BNX2X_GLOBAL_RESET_BIT)); + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); +} + +/* + * Checks the GLOBAL_RESET bit. + * * should be run under rtnl lock */ +static inline bool bnx2x_reset_is_global(struct bnx2x *bp) +{ + u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); + + DP(NETIF_MSG_HW, "GEN_REG_VAL=0x%08x\n", val); + return (val & BNX2X_GLOBAL_RESET_BIT) ? true : false; +} + +/* + * Clear RESET_IN_PROGRESS bit for the current engine. + * + * Should be run under rtnl lock + */ static inline void bnx2x_set_reset_done(struct bnx2x *bp) { - u32 val = REG_RD(bp, BNX2X_MISC_GEN_REG); - val &= ~(1 << RESET_DONE_FLAG_SHIFT); - REG_WR(bp, BNX2X_MISC_GEN_REG, val); - barrier(); - mmiowb(); + u32 val = 0; + u32 bit = BP_PATH(bp) ? + BNX2X_PATH1_RST_IN_PROG_BIT : BNX2X_PATH0_RST_IN_PROG_BIT; + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); + val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); + + /* Clear the bit */ + val &= ~bit; + REG_WR(bp, BNX2X_RECOVERY_GLOB_REG, val); + + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); } /* + * Set RESET_IN_PROGRESS for the current engine. + * * should be run under rtnl lock */ -static inline void bnx2x_set_reset_in_progress(struct bnx2x *bp) +void bnx2x_set_reset_in_progress(struct bnx2x *bp) { - u32 val = REG_RD(bp, BNX2X_MISC_GEN_REG); - val |= (1 << RESET_DONE_FLAG_SHIFT); - REG_WR(bp, BNX2X_MISC_GEN_REG, val); - barrier(); - mmiowb(); + u32 val; + u32 bit = BP_PATH(bp) ? + BNX2X_PATH1_RST_IN_PROG_BIT : BNX2X_PATH0_RST_IN_PROG_BIT; + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); + val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); + + /* Set the bit */ + val |= bit; + REG_WR(bp, BNX2X_RECOVERY_GLOB_REG, val); + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); } /* + * Checks the RESET_IN_PROGRESS bit for the given engine. * should be run under rtnl lock */ -bool bnx2x_reset_is_done(struct bnx2x *bp) +bool bnx2x_reset_is_done(struct bnx2x *bp, int engine) { - u32 val = REG_RD(bp, BNX2X_MISC_GEN_REG); - DP(NETIF_MSG_HW, "GEN_REG_VAL=0x%08x\n", val); - return (val & RESET_DONE_FLAG_MASK) ? false : true; + u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); + u32 bit = engine ? + BNX2X_PATH1_RST_IN_PROG_BIT : BNX2X_PATH0_RST_IN_PROG_BIT; + + /* return false if bit is set */ + return (val & bit) ? false : true; } /* + * set pf load for the current pf. + * * should be run under rtnl lock */ -void bnx2x_inc_load_cnt(struct bnx2x *bp) +void bnx2x_set_pf_load(struct bnx2x *bp) { - u32 val1, val = REG_RD(bp, BNX2X_MISC_GEN_REG); + u32 val1, val; + u32 mask = BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_MASK : + BNX2X_PATH0_LOAD_CNT_MASK; + u32 shift = BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_SHIFT : + BNX2X_PATH0_LOAD_CNT_SHIFT; - DP(NETIF_MSG_HW, "Old GEN_REG_VAL=0x%08x\n", val); + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); + val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); - val1 = ((val & LOAD_COUNTER_MASK) + 1) & LOAD_COUNTER_MASK; - REG_WR(bp, BNX2X_MISC_GEN_REG, (val & RESET_DONE_FLAG_MASK) | val1); - barrier(); - mmiowb(); + DP(NETIF_MSG_IFUP, "Old GEN_REG_VAL=0x%08x\n", val); + + /* get the current counter value */ + val1 = (val & mask) >> shift; + + /* set bit of that PF */ + val1 |= (1 << bp->pf_num); + + /* clear the old value */ + val &= ~mask; + + /* set the new one */ + val |= ((val1 << shift) & mask); + + REG_WR(bp, BNX2X_RECOVERY_GLOB_REG, val); + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); +} + +/** + * bnx2x_clear_pf_load - clear pf load mark + * + * @bp: driver handle + * + * Should be run under rtnl lock. + * Decrements the load counter for the current engine. Returns + * whether other functions are still loaded + */ +bool bnx2x_clear_pf_load(struct bnx2x *bp) +{ + u32 val1, val; + u32 mask = BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_MASK : + BNX2X_PATH0_LOAD_CNT_MASK; + u32 shift = BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_SHIFT : + BNX2X_PATH0_LOAD_CNT_SHIFT; + + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); + val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); + DP(NETIF_MSG_IFDOWN, "Old GEN_REG_VAL=0x%08x\n", val); + + /* get the current counter value */ + val1 = (val & mask) >> shift; + + /* clear bit of that PF */ + val1 &= ~(1 << bp->pf_num); + + /* clear the old value */ + val &= ~mask; + + /* set the new one */ + val |= ((val1 << shift) & mask); + + REG_WR(bp, BNX2X_RECOVERY_GLOB_REG, val); + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); + return val1 != 0; } /* + * Read the load status for the current engine. + * * should be run under rtnl lock */ -u32 bnx2x_dec_load_cnt(struct bnx2x *bp) +static inline bool bnx2x_get_load_status(struct bnx2x *bp, int engine) { - u32 val1, val = REG_RD(bp, BNX2X_MISC_GEN_REG); + u32 mask = (engine ? BNX2X_PATH1_LOAD_CNT_MASK : + BNX2X_PATH0_LOAD_CNT_MASK); + u32 shift = (engine ? BNX2X_PATH1_LOAD_CNT_SHIFT : + BNX2X_PATH0_LOAD_CNT_SHIFT); + u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); - DP(NETIF_MSG_HW, "Old GEN_REG_VAL=0x%08x\n", val); + DP(NETIF_MSG_HW | NETIF_MSG_IFUP, "GLOB_REG=0x%08x\n", val); - val1 = ((val & LOAD_COUNTER_MASK) - 1) & LOAD_COUNTER_MASK; - REG_WR(bp, BNX2X_MISC_GEN_REG, (val & RESET_DONE_FLAG_MASK) | val1); - barrier(); - mmiowb(); + val = (val & mask) >> shift; - return val1; + DP(NETIF_MSG_HW | NETIF_MSG_IFUP, "load mask for engine %d = 0x%x\n", + engine, val); + + return val != 0; } /* - * should be run under rtnl lock + * Reset the load status for the current engine. */ -static inline u32 bnx2x_get_load_cnt(struct bnx2x *bp) +static inline void bnx2x_clear_load_status(struct bnx2x *bp) { - return REG_RD(bp, BNX2X_MISC_GEN_REG) & LOAD_COUNTER_MASK; -} - -static inline void bnx2x_clear_load_cnt(struct bnx2x *bp) -{ - u32 val = REG_RD(bp, BNX2X_MISC_GEN_REG); - REG_WR(bp, BNX2X_MISC_GEN_REG, val & (~LOAD_COUNTER_MASK)); -} - -//DEBUG DEBUG -static s32 stat_counter; -static inline bool bnx2x_was_parity_err(struct bnx2x *bp) -{ - //return false; - #if 0 - if (bp->recovery_state == BNX2X_RECOVERY_DONE) { - stat_counter++; - return (stat_counter % 10 == 0) ? true : false; - - } - #else - if ((!CHIP_IS_E1(bp)) && (stat_counter >= 0)) { - //if (stat_counter >= 0) { - stat_counter++; - /* Generate MCP parity error */ - if (stat_counter % 20 == 0) { - BNX2X_ERR("Generating MCP parity error\n"); - //stat_counter = -1; - REG_RD(bp, 0xa6000); - } - } - #endif - - return false; + u32 val; + u32 mask = (BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_MASK : + BNX2X_PATH0_LOAD_CNT_MASK); + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); + val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); + REG_WR(bp, BNX2X_RECOVERY_GLOB_REG, val & (~mask)); + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG); } static inline void _print_next_block(int idx, const char *blk) { - if (idx) - pr_cont(", "); - pr_cont("%s", blk); + pr_cont("%s%s", idx ? ", " : "", blk); } -static inline int bnx2x_print_blocks_with_parity0(u32 sig, int par_num) +static inline int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, + bool print) { int i = 0; u32 cur_bit = 0; @@ -3850,19 +4769,33 @@ static inline int bnx2x_print_blocks_with_parity0(u32 sig, int par_num) if (sig & cur_bit) { switch (cur_bit) { case AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR: - _print_next_block(par_num++, "BRB"); + if (print) + _print_next_block(par_num++, "BRB"); break; case AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR: - _print_next_block(par_num++, "PARSER"); + if (print) + _print_next_block(par_num++, "PARSER"); break; case AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR: - _print_next_block(par_num++, "TSDM"); + if (print) + _print_next_block(par_num++, "TSDM"); break; case AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR: - _print_next_block(par_num++, "SEARCHER"); + if (print) + _print_next_block(par_num++, + "SEARCHER"); + break; + case AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "TCM"); break; case AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR: - _print_next_block(par_num++, "TSEMI"); + if (print) + _print_next_block(par_num++, "TSEMI"); + break; + case AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "XPB"); break; } @@ -3874,7 +4807,8 @@ static inline int bnx2x_print_blocks_with_parity0(u32 sig, int par_num) return par_num; } -static inline int bnx2x_print_blocks_with_parity1(u32 sig, int par_num) +static inline int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, + bool *global, bool print) { int i = 0; u32 cur_bit = 0; @@ -3882,38 +4816,72 @@ static inline int bnx2x_print_blocks_with_parity1(u32 sig, int par_num) cur_bit = ((u32)0x1 << i); if (sig & cur_bit) { switch (cur_bit) { - case AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR: - _print_next_block(par_num++, "PBCLIENT"); + case AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "PBF"); break; case AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR: - _print_next_block(par_num++, "QM"); + if (print) + _print_next_block(par_num++, "QM"); + break; + case AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "TM"); break; case AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR: - _print_next_block(par_num++, "XSDM"); + if (print) + _print_next_block(par_num++, "XSDM"); + break; + case AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "XCM"); break; case AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR: - _print_next_block(par_num++, "XSEMI"); + if (print) + _print_next_block(par_num++, "XSEMI"); break; case AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR: - _print_next_block(par_num++, "DOORBELLQ"); + if (print) + _print_next_block(par_num++, + "DOORBELLQ"); + break; + case AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "NIG"); break; case AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR: - _print_next_block(par_num++, "VAUX PCI CORE"); + if (print) + _print_next_block(par_num++, + "VAUX PCI CORE"); + *global = true; break; case AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR: - _print_next_block(par_num++, "DEBUG"); + if (print) + _print_next_block(par_num++, "DEBUG"); break; case AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR: - _print_next_block(par_num++, "USDM"); + if (print) + _print_next_block(par_num++, "USDM"); + break; + case AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "UCM"); break; case AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR: - _print_next_block(par_num++, "USEMI"); + if (print) + _print_next_block(par_num++, "USEMI"); break; case AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR: - _print_next_block(par_num++, "UPB"); + if (print) + _print_next_block(par_num++, "UPB"); break; case AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR: - _print_next_block(par_num++, "CSDM"); + if (print) + _print_next_block(par_num++, "CSDM"); + break; + case AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "CCM"); break; } @@ -3925,7 +4893,8 @@ static inline int bnx2x_print_blocks_with_parity1(u32 sig, int par_num) return par_num; } -static inline int bnx2x_print_blocks_with_parity2(u32 sig, int par_num) +static inline int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, + bool print) { int i = 0; u32 cur_bit = 0; @@ -3934,26 +4903,37 @@ static inline int bnx2x_print_blocks_with_parity2(u32 sig, int par_num) if (sig & cur_bit) { switch (cur_bit) { case AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR: - _print_next_block(par_num++, "CSEMI"); + if (print) + _print_next_block(par_num++, "CSEMI"); break; case AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR: - _print_next_block(par_num++, "PXP"); + if (print) + _print_next_block(par_num++, "PXP"); break; - case AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR: - _print_next_block(par_num++, + case AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "PXPPCICLOCKCLIENT"); break; case AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR: - _print_next_block(par_num++, "CFC"); + if (print) + _print_next_block(par_num++, "CFC"); break; case AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR: - _print_next_block(par_num++, "CDU"); + if (print) + _print_next_block(par_num++, "CDU"); + break; + case AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "DMAE"); break; case AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR: - _print_next_block(par_num++, "IGU"); + if (print) + _print_next_block(par_num++, "IGU"); break; case AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR: - _print_next_block(par_num++, "MISC"); + if (print) + _print_next_block(par_num++, "MISC"); break; } @@ -3965,7 +4945,8 @@ static inline int bnx2x_print_blocks_with_parity2(u32 sig, int par_num) return par_num; } -static inline int bnx2x_print_blocks_with_parity3(u32 sig, int par_num) +static inline int bnx2x_check_blocks_with_parity3(u32 sig, int par_num, + bool *global, bool print) { int i = 0; u32 cur_bit = 0; @@ -3974,16 +4955,27 @@ static inline int bnx2x_print_blocks_with_parity3(u32 sig, int par_num) if (sig & cur_bit) { switch (cur_bit) { case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY: - _print_next_block(par_num++, "MCP ROM"); + if (print) + _print_next_block(par_num++, "MCP ROM"); + *global = true; break; case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY: - _print_next_block(par_num++, "MCP UMP RX"); + if (print) + _print_next_block(par_num++, + "MCP UMP RX"); + *global = true; break; case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY: - _print_next_block(par_num++, "MCP UMP TX"); + if (print) + _print_next_block(par_num++, + "MCP UMP TX"); + *global = true; break; case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY: - _print_next_block(par_num++, "MCP SCPAD"); + if (print) + _print_next_block(par_num++, + "MCP SCPAD"); + *global = true; break; } @@ -3995,37 +4987,81 @@ static inline int bnx2x_print_blocks_with_parity3(u32 sig, int par_num) return par_num; } -static inline bool bnx2x_parity_attn(struct bnx2x *bp, u32 sig0, u32 sig1, - u32 sig2, u32 sig3) +static inline int bnx2x_check_blocks_with_parity4(u32 sig, int par_num, + bool print) { - if ((sig0 & HW_PRTY_ASSERT_SET_0) || (sig1 & HW_PRTY_ASSERT_SET_1) || - (sig2 & HW_PRTY_ASSERT_SET_2) || (sig3 & HW_PRTY_ASSERT_SET_3)) { + int i = 0; + u32 cur_bit = 0; + for (i = 0; sig; i++) { + cur_bit = ((u32)0x1 << i); + if (sig & cur_bit) { + switch (cur_bit) { + case AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "PGLUE_B"); + break; + case AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR: + if (print) + _print_next_block(par_num++, "ATC"); + break; + } + + /* Clear the bit */ + sig &= ~cur_bit; + } + } + + return par_num; +} + +static inline bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, + u32 *sig) +{ + if ((sig[0] & HW_PRTY_ASSERT_SET_0) || + (sig[1] & HW_PRTY_ASSERT_SET_1) || + (sig[2] & HW_PRTY_ASSERT_SET_2) || + (sig[3] & HW_PRTY_ASSERT_SET_3) || + (sig[4] & HW_PRTY_ASSERT_SET_4)) { int par_num = 0; - DP(NETIF_MSG_HW, "Was parity error: HW block parity attention: " - "[0]:0x%08x [1]:0x%08x " - "[2]:0x%08x [3]:0x%08x\n", - sig0 & HW_PRTY_ASSERT_SET_0, - sig1 & HW_PRTY_ASSERT_SET_1, - sig2 & HW_PRTY_ASSERT_SET_2, - sig3 & HW_PRTY_ASSERT_SET_3); - netdev_err(bp->dev, "Parity errors detected in blocks: "); - par_num = bnx2x_print_blocks_with_parity0( - sig0 & HW_PRTY_ASSERT_SET_0, par_num); - par_num = bnx2x_print_blocks_with_parity1( - sig1 & HW_PRTY_ASSERT_SET_1, par_num); - par_num = bnx2x_print_blocks_with_parity2( - sig2 & HW_PRTY_ASSERT_SET_2, par_num); - par_num = bnx2x_print_blocks_with_parity3( - sig3 & HW_PRTY_ASSERT_SET_3, par_num); - pr_cont("\n"); + DP(NETIF_MSG_HW, "Was parity error: HW block parity attention:\n" + "[0]:0x%08x [1]:0x%08x [2]:0x%08x [3]:0x%08x [4]:0x%08x\n", + sig[0] & HW_PRTY_ASSERT_SET_0, + sig[1] & HW_PRTY_ASSERT_SET_1, + sig[2] & HW_PRTY_ASSERT_SET_2, + sig[3] & HW_PRTY_ASSERT_SET_3, + sig[4] & HW_PRTY_ASSERT_SET_4); + if (print) + netdev_err(bp->dev, + "Parity errors detected in blocks: "); + par_num = bnx2x_check_blocks_with_parity0( + sig[0] & HW_PRTY_ASSERT_SET_0, par_num, print); + par_num = bnx2x_check_blocks_with_parity1( + sig[1] & HW_PRTY_ASSERT_SET_1, par_num, global, print); + par_num = bnx2x_check_blocks_with_parity2( + sig[2] & HW_PRTY_ASSERT_SET_2, par_num, print); + par_num = bnx2x_check_blocks_with_parity3( + sig[3] & HW_PRTY_ASSERT_SET_3, par_num, global, print); + par_num = bnx2x_check_blocks_with_parity4( + sig[4] & HW_PRTY_ASSERT_SET_4, par_num, print); + + if (print) + pr_cont("\n"); + return true; } else return false; } -bool bnx2x_chk_parity_attn(struct bnx2x *bp) +/** + * bnx2x_chk_parity_attn - checks for parity attentions. + * + * @bp: driver handle + * @global: true if there was a global attention + * @print: show parity attention in syslog + */ +bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print) { - struct attn_route attn; + struct attn_route attn = { {0} }; int port = BP_PORT(bp); attn.sig[0] = REG_RD(bp, @@ -4041,8 +5077,12 @@ bool bnx2x_chk_parity_attn(struct bnx2x *bp) MISC_REG_AEU_AFTER_INVERT_4_FUNC_0 + port*4); - return bnx2x_parity_attn(bp, attn.sig[0], attn.sig[1], attn.sig[2], - attn.sig[3]); + if (!CHIP_IS_E1x(bp)) + attn.sig[4] = REG_RD(bp, + MISC_REG_AEU_AFTER_INVERT_5_FUNC_0 + + port*4); + + return bnx2x_parity_attn(bp, global, print, attn.sig); } @@ -4061,9 +5101,11 @@ static inline void bnx2x_attn_int_deasserted4(struct bnx2x *bp, u32 attn) BNX2X_ERR("PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN\n"); if (val & PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN) BNX2X_ERR("PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN\n"); - if (val & PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN) + if (val & + PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN) BNX2X_ERR("PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN\n"); - if (val & PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN) + if (val & + PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN) BNX2X_ERR("PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN\n"); if (val & PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN) BNX2X_ERR("PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN\n"); @@ -4106,21 +5148,25 @@ static void bnx2x_attn_int_deasserted(struct bnx2x *bp, u32 deasserted) u32 reg_addr; u32 val; u32 aeu_mask; + bool global = false; /* need to take HW lock because MCP or other port might also try to handle this event */ bnx2x_acquire_alr(bp); - if (bnx2x_chk_parity_attn(bp)) { + if (bnx2x_chk_parity_attn(bp, &global, true)) { +#ifndef BNX2X_STOP_ON_ERROR bp->recovery_state = BNX2X_RECOVERY_INIT; - bnx2x_set_reset_in_progress(bp); - schedule_delayed_work(&bp->reset_task, 0); + schedule_delayed_work(&bp->sp_rtnl_task, 0); /* Disable HW interrupts */ bnx2x_int_disable(bp); - bnx2x_release_alr(bp); /* In case of parity errors don't handle attentions so that * other function would "see" parity errors. */ +#else + bnx2x_panic(); +#endif + bnx2x_release_alr(bp); return; } @@ -4128,8 +5174,9 @@ static void bnx2x_attn_int_deasserted(struct bnx2x *bp, u32 deasserted) attn.sig[1] = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_2_FUNC_0 + port*4); attn.sig[2] = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_3_FUNC_0 + port*4); attn.sig[3] = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_4_FUNC_0 + port*4); - if (CHIP_IS_E2(bp)) - attn.sig[4] = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_5_FUNC_0 + port*4); + if (!CHIP_IS_E1x(bp)) + attn.sig[4] = + REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_5_FUNC_0 + port*4); else attn.sig[4] = 0; @@ -4141,8 +5188,10 @@ static void bnx2x_attn_int_deasserted(struct bnx2x *bp, u32 deasserted) group_mask = &bp->attn_group[index]; DP(NETIF_MSG_HW, "group[%d]: %08x %08x %08x %08x %08x\n", - index, group_mask->sig[0], group_mask->sig[1], - group_mask->sig[2], group_mask->sig[3], group_mask->sig[4]); + index, + group_mask->sig[0], group_mask->sig[1], + group_mask->sig[2], group_mask->sig[3], + group_mask->sig[4]); bnx2x_attn_int_deasserted4(bp, attn.sig[4] & group_mask->sig[4]); @@ -4229,7 +5278,7 @@ void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, igu_addr); } -static inline void bnx2x_update_eq_prod(struct bnx2x* bp, u16 prod) +static inline void bnx2x_update_eq_prod(struct bnx2x *bp, u16 prod) { /* No memory barriers */ storm_memset_eq_prod(bp, prod, BP_FUNC(bp)); @@ -4237,18 +5286,20 @@ static inline void bnx2x_update_eq_prod(struct bnx2x* bp, u16 prod) } #ifdef BCM_CNIC -static int bnx2x_cnic_handle_cfc_del(struct bnx2x* bp, u32 cid, +static int bnx2x_cnic_handle_cfc_del(struct bnx2x *bp, u32 cid, union event_ring_elem *elem) { u8 err = elem->message.error; if (!bp->cnic_eth_dev.starting_cid || - cid < bp->cnic_eth_dev.starting_cid) + (cid < bp->cnic_eth_dev.starting_cid && + cid != bp->cnic_eth_dev.iscsi_l2_cid)) return 1; DP(BNX2X_MSG_SP, "got delete ramrod for CNIC CID %d\n", cid); - if (unlikely(elem->message.error)) { + if (unlikely(err)) { + BNX2X_ERR("got delete ramrod for CNIC CID %d with error!\n", cid); bnx2x_panic_dump(bp); @@ -4269,12 +5320,13 @@ static inline void bnx2x_handle_mcast_eqe(struct bnx2x *bp) netif_addr_lock_bh(bp->dev); + /* Clear pending state for the last command */ bp->mcast_obj.raw.clear_pending(&bp->mcast_obj.raw); /* If there are pending mcast commands - send them */ if (bp->mcast_obj.check_pending(&bp->mcast_obj)) { - rc = bnx2x_config_mcast(bp, &rparam, true); - if (rc) + rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT); + if (rc < 0) BNX2X_ERR("Failed to send pending mcast commands: %d\n", rc); } @@ -4285,44 +5337,83 @@ static inline void bnx2x_handle_mcast_eqe(struct bnx2x *bp) static inline void bnx2x_handle_classification_eqe(struct bnx2x *bp, union event_ring_elem *elem) { - switch (elem->message.data.set_mac_event.echo >> BNX2X_SWCID_SHIFT) { + unsigned long ramrod_flags = 0; + int rc = 0; + u32 cid = elem->message.data.eth_event.echo & BNX2X_SWCID_MASK; + struct bnx2x_vlan_mac_obj *vlan_mac_obj; + + /* Always push next commands out, don't wait here */ + __set_bit(RAMROD_CONT, &ramrod_flags); + + switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) { case BNX2X_FILTER_MAC_PENDING: - bp->fp->mac_obj.raw.clear_pending(&bp->fp->mac_obj.raw); + DP(BNX2X_MSG_SP, "Got SETUP_MAC completions\n"); +#ifdef BCM_CNIC + if (cid == BNX2X_ISCSI_ETH_CID(bp)) + vlan_mac_obj = &bp->iscsi_l2_mac_obj; + else +#endif + vlan_mac_obj = &bp->fp[cid].mac_obj; + break; - case BNX2X_FILTER_VLAN_PENDING: - bp->fp->vlan_obj.raw.clear_pending(&bp->fp->vlan_obj.raw); +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + case BNX2X_FILTER_BYPASS_MAC_PENDING: + DP(BNX2X_MSG_SP, "Got BYPASS_MAC completions\n"); + vlan_mac_obj = &LEADING_BYPASS_FP(bp)->mac_obj; + break; +#endif case BNX2X_FILTER_MCAST_PENDING: + DP(BNX2X_MSG_SP, "Got SETUP_MCAST completions\n"); /* This is only relevant for 57710 where multicast MACs are * configured as unicast MACs using the same ramrod. */ bnx2x_handle_mcast_eqe(bp); - break; -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - case BNX2X_FILTER_TX_SWITCH_MAC_PENDING: - BP_TX_MAC_OBJ(bp)->raw.clear_pending(&(BP_TX_MAC_OBJ(bp)->raw)); - break; -#endif + return; default: BNX2X_ERR("Unsupported classification command: %d\n", - elem->message.data.set_mac_event.echo); + elem->message.data.eth_event.echo); return; } + + rc = vlan_mac_obj->complete(bp, vlan_mac_obj, elem, &ramrod_flags); + + if (rc < 0) + BNX2X_ERR("Failed to schedule new commands: %d\n", rc); + else if (rc > 0) + DP(BNX2X_MSG_SP, "Scheduled next pending commands...\n"); + } #ifdef BCM_CNIC static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start); #endif -static inline void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp) +static inline void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp, + union event_ring_elem *elem) { +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + if (IS_IN_BYPASS_MODE(bp)) { + if (elem->message.data.eth_event.echo == + LEADING_BYPASS_FP(bp)->cid) { + if (test_and_clear_bit( + BNX2X_FILTER_BYPASS_RX_MODE_PENDING, + &bp->sp_state)) + return; + else { + BNX2X_ERR("Hmmm... Bypass leading CID in the EQE but no BYPASS_RX_MODE pending\n"); + return; + } + } + } +#endif netif_addr_lock_bh(bp->dev); clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state); /* Send rx_mode command again if was requested */ if (test_and_clear_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state)) - bnx2x_set_storm_rx_mode(bp, false); + bnx2x_set_storm_rx_mode(bp); #ifdef BCM_CNIC else if (test_and_clear_bit(BNX2X_FILTER_ISCSI_ETH_START_SCHED, &bp->sp_state)) @@ -4330,19 +5421,134 @@ static inline void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp) else if (test_and_clear_bit(BNX2X_FILTER_ISCSI_ETH_STOP_SCHED, &bp->sp_state)) bnx2x_set_iscsi_eth_rx_mode(bp, false); +#ifdef BNX2X_ESX_CNA /* ! BNX2X_UPSTREAM */ + else if (test_and_clear_bit(BNX2X_FILTER_FCOE_ETH_START_SCHED, + &bp->sp_state)) + bnx2x_set_fcoe_eth_rx_mode(bp, true); + else if (test_and_clear_bit(BNX2X_FILTER_FCOE_ETH_STOP_SCHED, + &bp->sp_state)) + bnx2x_set_fcoe_eth_rx_mode(bp, false); +#endif #endif netif_addr_unlock_bh(bp->dev); } +static inline void bnx2x_after_afex_vif_lists(struct bnx2x *bp, + union event_ring_elem *elem) +{ + if (elem->message.data.vif_list_event.echo == VIF_LIST_RULE_GET) { + DP(BNX2X_MSG_SP, + "afex: ramrod completed VIF LIST_GET, addrs 0x%x\n", + elem->message.data.vif_list_event.func_bit_map); + bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_LISTGET_ACK, + elem->message.data.vif_list_event.func_bit_map); + } else if (elem->message.data.vif_list_event.echo == + VIF_LIST_RULE_SET) { + DP(BNX2X_MSG_SP, "afex: ramrod completed VIF LIST_SET\n"); + bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_LISTSET_ACK, 0); + } +} -static void bnx2x_eq_int(struct bnx2x* bp) +/* called with rtnl_lock */ +static inline void bnx2x_after_function_update(struct bnx2x *bp) +{ + int q, rc; + struct bnx2x_fastpath *fp; + struct bnx2x_queue_state_params queue_params = {NULL}; + struct bnx2x_queue_update_params *q_update_params = + &queue_params.params.update; + + /* Send Q update command with afex vlan removal values for all Qs */ + queue_params.cmd = BNX2X_Q_CMD_UPDATE; + + /* set silent vlan removal values according to vlan mode */ + __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG, + &q_update_params->update_flags); + __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM, + &q_update_params->update_flags); + __set_bit(RAMROD_COMP_WAIT, &queue_params.ramrod_flags); + + /* in access mode mark mask and value are 0 to strip all vlans */ + if (bp->afex_vlan_mode == FUNC_MF_CFG_AFEX_VLAN_ACCESS_MODE) { + q_update_params->silent_removal_value = 0; + q_update_params->silent_removal_mask = 0; + } else { + q_update_params->silent_removal_value = + (bp->afex_def_vlan_tag & VLAN_VID_MASK); + q_update_params->silent_removal_mask = VLAN_VID_MASK; + } + + for_each_eth_queue(bp, q) { + /* Set the appropriate Queue object */ + fp = &bp->fp[q]; + queue_params.q_obj = &fp->q_obj; + + /* send the ramrod */ + rc = bnx2x_queue_state_change(bp, &queue_params); + if (rc < 0) + BNX2X_ERR("Failed to config silent vlan rem for Q %d\n", + q); + } + +#ifdef BCM_CNIC + if (!NO_FCOE(bp)) { + fp = &bp->fp[FCOE_IDX]; + queue_params.q_obj = &fp->q_obj; + + /* clear pending completion bit */ + __clear_bit(RAMROD_COMP_WAIT, &queue_params.ramrod_flags); + + /* mark latest Q bit */ + smp_mb__before_clear_bit(); + set_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state); + smp_mb__after_clear_bit(); + + /* send Q update ramrod for FCoE Q */ + rc = bnx2x_queue_state_change(bp, &queue_params); + if (rc < 0) + BNX2X_ERR("Failed to config silent vlan rem for Q %d\n", + q); + } else { + /* If no FCoE ring - ACK MCP now */ + bnx2x_link_report(bp); + bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0); + } +#else + /* If no FCoE ring - ACK MCP now */ + bnx2x_link_report(bp); + bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0); +#endif /* BCM_CNIC */ +} + +static inline struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj( + struct bnx2x *bp, u32 cid) +{ + DP(BNX2X_MSG_SP, "retrieving fp from cid %d\n", cid); +#ifdef BCM_CNIC + if (cid == BNX2X_FCOE_ETH_CID(bp)) + return &bnx2x_fcoe(bp, q_obj); +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + else if (cid == BNX2X_OOO_ETH_CID(bp)) + return &bnx2x_ooo(bp, q_obj); + else if (cid == BNX2X_FWD_ETH_CID(bp)) + return &bnx2x_fwd(bp, q_obj); +#endif + else +#endif + return &bnx2x_fp(bp, CID_TO_FP(cid, bp), q_obj); +} + +static void bnx2x_eq_int(struct bnx2x *bp) { u16 hw_cons, sw_cons, sw_prod; union event_ring_elem *elem; u32 cid; u8 opcode; int spqe_cnt = 0; + struct bnx2x_queue_sp_obj *q_obj; + struct bnx2x_func_sp_obj *f_obj = &bp->func_obj; + struct bnx2x_raw_obj *rss_raw = &bp->rss_conf_obj.raw; hw_cons = le16_to_cpu(*bp->eq_cons_sb); @@ -4354,17 +5560,17 @@ static void bnx2x_eq_int(struct bnx2x* bp) if ((hw_cons & EQ_DESC_MAX_PAGE) == EQ_DESC_MAX_PAGE) hw_cons++; - /* This function may never run in parralel with itself for a + /* This function may never run in parallel with itself for a * specific bp, thus there is no need in "paired" read memory * barrier here. */ sw_cons = bp->eq_cons; sw_prod = bp->eq_prod; - DP(BNX2X_MSG_SP, "EQ: hw_cons %u sw_cons %u bp->spq_left %u\n", - hw_cons, sw_cons, atomic_read(&bp->spq_left)); + DP(BNX2X_MSG_SP, "EQ: hw_cons %u sw_cons %u bp->eq_spq_left %x\n", + hw_cons, sw_cons, atomic_read(&bp->eq_spq_left)); - for (;sw_cons != hw_cons; + for (; sw_cons != hw_cons; sw_prod = NEXT_EQ_IDX(sw_prod), sw_cons = NEXT_EQ_IDX(sw_cons)) { @@ -4380,17 +5586,18 @@ static void bnx2x_eq_int(struct bnx2x* bp) /* handle eq element */ - switch(opcode) { + switch (opcode) { #if defined(BCM_IOV) && defined(VFPF_MBX) /* ! BNX2X_UPSTREAM */ case EVENT_RING_OPCODE_VF_PF_CHANNEL: bnx2x_vf_mbx(bp, &elem->message.data.vf_pf_event); continue; #endif case EVENT_RING_OPCODE_STAT_QUERY: - DP(NETIF_MSG_TIMER, "got statistics comp event %d\n", + DP(BNX2X_MSG_SP | BNX2X_MSG_STATS, + "got statistics comp event %d\n", bp->stats_comp++); /* nothing to do with stats comp */ - continue; + goto next_spqe; case EVENT_RING_OPCODE_CFC_DEL: /* handle according to cid range */ @@ -4398,45 +5605,104 @@ static void bnx2x_eq_int(struct bnx2x* bp) * we may want to verify here that the bp state is * HALTING */ - DP(NETIF_MSG_IFDOWN, + DP(BNX2X_MSG_SP, "got delete ramrod for MULTI[%d]\n", cid); #ifdef BCM_CNIC if (!bnx2x_cnic_handle_cfc_del(bp, cid, elem)) goto next_spqe; - - if (cid == BNX2X_FCOE_ETH_CID) - bnx2x_fcoe(bp, state) = BNX2X_FP_STATE_CLOSED; - else if (cid == BNX2X_OOO_ETH_CID) - bnx2x_ooo(bp, state) = BNX2X_FP_STATE_CLOSED; - else if (cid == BNX2X_FWD_ETH_CID) - bnx2x_fwd(bp, state) = BNX2X_FP_STATE_CLOSED; - else #endif - bnx2x_fp(bp, cid, state) = BNX2X_FP_STATE_CLOSED; + q_obj = bnx2x_cid_to_q_obj(bp, cid); + + if (q_obj->complete_cmd(bp, q_obj, BNX2X_Q_CMD_CFC_DEL)) + break; + + goto next_spqe; case EVENT_RING_OPCODE_STOP_TRAFFIC: - DP(NETIF_MSG_IFUP, "got STOP TRAFFIC\n"); + DP(BNX2X_MSG_SP | BNX2X_MSG_DCB, "got STOP TRAFFIC\n"); + if (f_obj->complete_cmd(bp, f_obj, + BNX2X_F_CMD_TX_STOP)) + break; bnx2x_dcbx_set_params(bp, BNX2X_DCBX_STATE_TX_PAUSED); goto next_spqe; + case EVENT_RING_OPCODE_START_TRAFFIC: - DP(NETIF_MSG_IFUP, "got START TRAFFIC\n"); + DP(BNX2X_MSG_SP | BNX2X_MSG_DCB, "got START TRAFFIC\n"); + if (f_obj->complete_cmd(bp, f_obj, + BNX2X_F_CMD_TX_START)) + break; bnx2x_dcbx_set_params(bp, BNX2X_DCBX_STATE_TX_RELEASED); goto next_spqe; + case EVENT_RING_OPCODE_FUNCTION_UPDATE: + DP(BNX2X_MSG_SP | BNX2X_MSG_MCP, + "ASEX: ramrod completed FUNCTION_UPDATE\n"); + f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_AFEX_UPDATE); + + /* We will perform the Queues update from sp_rtnl task + * as all Queue SP operations should run under + * rtnl_lock. + */ + smp_mb__before_clear_bit(); + set_bit(BNX2X_SP_RTNL_AFEX_F_UPDATE, + &bp->sp_rtnl_state); + smp_mb__after_clear_bit(); + + schedule_delayed_work(&bp->sp_rtnl_task, 0); + goto next_spqe; + + case EVENT_RING_OPCODE_AFEX_VIF_LISTS: + f_obj->complete_cmd(bp, f_obj, + BNX2X_F_CMD_AFEX_VIFLISTS); + bnx2x_after_afex_vif_lists(bp, elem); + goto next_spqe; +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +#ifdef BCM_CNIC + case EVENT_RING_OPCODE_FORWARD_SETUP: + q_obj = &bnx2x_fwd(bp, q_obj); + if (q_obj->complete_cmd(bp, q_obj, + BNX2X_Q_CMD_SETUP_TX_ONLY)) + break; + + goto next_spqe; +#endif +#endif /* BCM_OOO */ + case EVENT_RING_OPCODE_FUNCTION_START: + DP(BNX2X_MSG_SP | NETIF_MSG_IFUP, + "got FUNC_START ramrod\n"); + if (f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_START)) + break; + + goto next_spqe; + + case EVENT_RING_OPCODE_FUNCTION_STOP: + DP(BNX2X_MSG_SP | NETIF_MSG_IFUP, + "got FUNC_STOP ramrod\n"); + if (f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_STOP)) + break; + + goto next_spqe; } switch (opcode | bp->state) { - case (EVENT_RING_OPCODE_FUNCTION_START | + case (EVENT_RING_OPCODE_RSS_UPDATE_RULES | + BNX2X_STATE_OPEN): + case (EVENT_RING_OPCODE_RSS_UPDATE_RULES | BNX2X_STATE_OPENING_WAIT4_PORT): - DP(NETIF_MSG_IFUP, "got setup ramrod\n"); - bp->state = BNX2X_STATE_FUNC_STARTED; - break; - - case (EVENT_RING_OPCODE_FUNCTION_STOP | - BNX2X_STATE_CLOSING_WAIT4_HALT): - DP(NETIF_MSG_IFDOWN, "got halt ramrod\n"); - bp->state = BNX2X_STATE_CLOSING_WAIT4_UNLOAD; + cid = elem->message.data.eth_event.echo & + BNX2X_SWCID_MASK; + DP(BNX2X_MSG_SP, "got RSS_UPDATE ramrod. CID %d\n", + cid); +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + if (IS_IN_BYPASS_MODE(bp) && + (cid == LEADING_BYPASS_FP(bp)->cid)) { + struct bnx2x_raw_obj *bypass_rss_raw = + &bp->bypass_rss_obj.raw; + bypass_rss_raw->clear_pending(bypass_rss_raw); + } else +#endif + rss_raw->clear_pending(rss_raw); break; case (EVENT_RING_OPCODE_SET_MAC | BNX2X_STATE_OPEN): @@ -4449,8 +5715,8 @@ static void bnx2x_eq_int(struct bnx2x* bp) BNX2X_STATE_DIAG): case (EVENT_RING_OPCODE_CLASSIFICATION_RULES | BNX2X_STATE_CLOSING_WAIT4_HALT): + DP(BNX2X_MSG_SP, "got (un)set mac ramrod\n"); bnx2x_handle_classification_eqe(bp, elem); - DP(NETIF_MSG_IFUP, "got (un)set mac ramrod\n"); break; case (EVENT_RING_OPCODE_MULTICAST_RULES | @@ -4459,8 +5725,8 @@ static void bnx2x_eq_int(struct bnx2x* bp) BNX2X_STATE_DIAG): case (EVENT_RING_OPCODE_MULTICAST_RULES | BNX2X_STATE_CLOSING_WAIT4_HALT): + DP(BNX2X_MSG_SP, "got mcast ramrod\n"); bnx2x_handle_mcast_eqe(bp); - DP(NETIF_MSG_IFUP, "got mcast ramrod\n"); break; case (EVENT_RING_OPCODE_FILTERS_RULES | @@ -4469,20 +5735,20 @@ static void bnx2x_eq_int(struct bnx2x* bp) BNX2X_STATE_DIAG): case (EVENT_RING_OPCODE_FILTERS_RULES | BNX2X_STATE_CLOSING_WAIT4_HALT): - bnx2x_handle_rx_mode_eqe(bp); - DP(NETIF_MSG_IFUP, "got rx_mode ramrod\n"); + DP(BNX2X_MSG_SP, "got rx_mode ramrod\n"); + bnx2x_handle_rx_mode_eqe(bp, elem); break; default: /* unknown event log error and continue */ - BNX2X_ERR("Unknown EQ event %d\n", - elem->message.opcode); + BNX2X_ERR("Unknown EQ event %d, bp->state 0x%x\n", + elem->message.opcode, bp->state); } next_spqe: spqe_cnt++; } /* for */ smp_mb__before_atomic_inc(); - atomic_add(spqe_cnt, &bp->spq_left); + atomic_add(spqe_cnt, &bp->eq_spq_left); bp->eq_cons = sw_cons; bp->eq_prod = sw_prod; @@ -4508,26 +5774,11 @@ static void bnx2x_sp_task(void *data) #endif u16 status; - /* Return here if interrupt is disabled */ - if (unlikely(atomic_read(&bp->intr_sem) != 0)) { - DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n"); - return; - } - status = bnx2x_update_dsb_idx(bp); /* if (status == 0) */ /* BNX2X_ERR("spurious slowpath interrupt!\n"); */ -#if 0 - if (bnx2x_was_parity_err(bp)) { - bp->recovery_state = BNX2X_RECOVERY_INIT; - smp_wmb(); - BNX2X_ERR("There was a parity error\n"); - bnx2x_set_reset_in_progress(bp); - schedule_delayed_work(&bp->reset_task, 0); - } -#endif - DP(NETIF_MSG_INTR, "got a slowpath interrupt (status 0x%x)\n", status); + DP(BNX2X_MSG_SP, "got a slowpath interrupt (status 0x%x)\n", status); /* HW attentions */ if (status & BNX2X_DEF_SB_ATT_IDX) { @@ -4540,16 +5791,20 @@ static void bnx2x_sp_task(void *data) #ifdef BCM_CNIC struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); - /* FCoE L2 is not supported on E1x */ if ((!NO_FCOE(bp)) && - (bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) + (bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) { + /* + * Prevent local bottom-halves from running as + * we are going to change the local NAPI list. + */ + local_bh_disable(); #ifdef BNX2X_NEW_NAPI /* BNX2X_UPSTREAM */ napi_schedule(&bnx2x_fcoe(bp, napi)); #else napi_schedule(&bnx2x_fcoe(bp, dummy_netdev)); #endif - - + local_bh_enable(); + } #endif /* Handle EQ completions */ bnx2x_eq_int(bp); @@ -4560,12 +5815,23 @@ static void bnx2x_sp_task(void *data) status &= ~BNX2X_DEF_SB_IDX; } - if (status) - DP(NETIF_MSG_INTR, "got an unknown interrupt! (status 0x%x)\n", +#if defined(BCM_IOV) && defined(BNX2X_VFOP_WQ) /* ! BNX2X_UPSTREAM */ + /* muat be called after the EQ processing */ + bnx2x_iov_sp_task(bp); +#endif + if (unlikely(status)) + DP(BNX2X_MSG_SP, "got an unknown interrupt! (status 0x%x)\n", status); bnx2x_ack_sb(bp, bp->igu_dsb_id, ATTENTION_ID, le16_to_cpu(bp->def_att_idx), IGU_INT_ENABLE, 1); + + /* afex - poll to check if VIFSET_ACK should be sent to MFW */ + if (test_and_clear_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK, + &bp->sp_state)) { + bnx2x_link_report(bp); + bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0); + } } #if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) @@ -4578,12 +5844,6 @@ irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) struct net_device *dev = dev_instance; struct bnx2x *bp = netdev_priv(dev); - /* Return here if interrupt is disabled */ - if (unlikely(atomic_read(&bp->intr_sem) != 0)) { - DP(NETIF_MSG_INTR, "called but intr_sem not 0, returning\n"); - return IRQ_HANDLED; - } - bnx2x_ack_sb(bp, bp->igu_dsb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0); @@ -4599,11 +5859,14 @@ irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) rcu_read_lock(); c_ops = rcu_dereference(bp->cnic_ops); if (c_ops) +#if defined(__VMKLNX__) /* non BNX2X_UPSTREAM */ + VMKAPI_MODULE_CALL_VOID(c_ops->cnic_owner->moduleID, c_ops->cnic_handler, bp->cnic_data, NULL); +#else /* BNX2X_UPSTREAM */ c_ops->cnic_handler(bp->cnic_data, NULL); +#endif rcu_read_unlock(); } #endif - #if (LINUX_VERSION_CODE >= 0x020614) || (defined(__VMKLNX__)) /* BNX2X_UPSTREAM */ queue_delayed_work(bnx2x_wq, &bp->sp_task, 0); #else @@ -4615,1389 +5878,6 @@ irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) /* end of slow path */ -/* - * General service functions - */ - -static inline long bnx2x_hilo(u32 *hiref) -{ - u32 lo = *(hiref + 1); -#if (BITS_PER_LONG == 64) - u32 hi = *hiref; - - return HILO_U64(hi, lo); -#else - return lo; -#endif -} - -/* - * Init service functions. - */ - -/* Post the next statistics ramrod. Protect it with the spin in - * order to ensure the strict order between statistics ramrods - * (each ramrod has a sequence number passed in a - * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be - * sent in order). - */ -static void bnx2x_storm_stats_post(struct bnx2x *bp) -{ - if (!bp->stats_pending) { - int rc; - - spin_lock_bh(&bp->stats_lock); - - bp->fw_stats_req->hdr.drv_stats_counter = - cpu_to_le16(bp->stats_counter++); - - DP(NETIF_MSG_TIMER, "Sending statistics ramrod %d\n", - bp->fw_stats_req->hdr.drv_stats_counter); - -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - /* adjust the ramrod to include VF queues statistics */ - bnx2x_iov_adjust_stats_req(bp); -#endif - - - /* send FW stats ramrod */ - rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0, - U64_HI(bp->fw_stats_req_mapping), - U64_LO(bp->fw_stats_req_mapping), 1); - if (rc == 0) - bp->stats_pending = 1; - - spin_unlock_bh(&bp->stats_lock); - } -} - -static void bnx2x_hw_stats_post(struct bnx2x *bp) -{ - struct dmae_command *dmae = &bp->stats_dmae; - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - - *stats_comp = DMAE_COMP_VAL; - if (CHIP_REV_IS_SLOW(bp)) - return; - - /* loader */ - if (bp->executer_idx) { - int loader_idx = PMF_DMAE_C(bp); - u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, - true, DMAE_COMP_GRC); - opcode = bnx2x_dmae_opcode_clr_src_reset(opcode); - - memset(dmae, 0, sizeof(struct dmae_command)); - dmae->opcode = opcode; - dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0])); - dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0])); - dmae->dst_addr_lo = (DMAE_REG_CMD_MEM + - sizeof(struct dmae_command) * - (loader_idx + 1)) >> 2; - dmae->dst_addr_hi = 0; - dmae->len = sizeof(struct dmae_command) >> 2; - if (CHIP_IS_E1(bp)) - dmae->len--; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - - *stats_comp = 0; - bnx2x_post_dmae(bp, dmae, loader_idx); - - } else if (bp->func_stx) { - *stats_comp = 0; - bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp)); - } -} - -static int bnx2x_stats_comp(struct bnx2x *bp) -{ - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - int cnt = 10; - - might_sleep(); - while (*stats_comp != DMAE_COMP_VAL) { - if (!cnt) { - BNX2X_ERR("timeout waiting for stats finished\n"); - break; - } - cnt--; - msleep(1); - } - return 1; -} - -/* - * Statistics service functions - */ - -static void bnx2x_stats_pmf_update(struct bnx2x *bp) -{ - struct dmae_command *dmae; - u32 opcode; - int loader_idx = PMF_DMAE_C(bp); - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - - /* sanity */ - if (!IS_MF(bp) || !bp->port.pmf || !bp->port.port_stx) { - BNX2X_ERR("BUG!\n"); - return; - } - - bp->executer_idx = 0; - - opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0); - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); - dmae->src_addr_lo = bp->port.port_stx >> 2; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); - dmae->len = DMAE_LEN32_RD_MAX; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); - dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) + - DMAE_LEN32_RD_MAX * 4); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) + - DMAE_LEN32_RD_MAX * 4); - dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX; - dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_val = DMAE_COMP_VAL; - - *stats_comp = 0; - bnx2x_hw_stats_post(bp); - bnx2x_stats_comp(bp); -} - -static void bnx2x_port_stats_init(struct bnx2x *bp) -{ - struct dmae_command *dmae; - int port = BP_PORT(bp); - u32 opcode; - int loader_idx = PMF_DMAE_C(bp); - u32 mac_addr; - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - - /* sanity */ - if (!bp->link_vars.link_up || !bp->port.pmf) { - BNX2X_ERR("BUG!\n"); - return; - } - - bp->executer_idx = 0; - - /* MCP */ - opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, - true, DMAE_COMP_GRC); - - if (bp->port.port_stx) { - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); - dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); - dmae->dst_addr_lo = bp->port.port_stx >> 2; - dmae->dst_addr_hi = 0; - dmae->len = sizeof(struct host_port_stats) >> 2; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - } - - if (bp->func_stx) { - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); - dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); - dmae->dst_addr_lo = bp->func_stx >> 2; - dmae->dst_addr_hi = 0; - dmae->len = sizeof(struct host_func_stats) >> 2; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - } - - /* MAC */ - opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, - true, DMAE_COMP_GRC); - - if (bp->link_vars.mac_type == MAC_TYPE_BMAC) { - - mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM : - NIG_REG_INGRESS_BMAC0_MEM); - - /* BIGMAC_REGISTER_TX_STAT_GTPKT .. - BIGMAC_REGISTER_TX_STAT_GTBYT */ - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - if (CHIP_IS_E1x(bp)) { - dmae->src_addr_lo = (mac_addr + - BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; - dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT - - BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; - } else { - dmae->src_addr_lo = (mac_addr + - BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2; - dmae->len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT - - BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2; - } - - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats)); - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - - /* BIGMAC_REGISTER_RX_STAT_GR64 .. - BIGMAC_REGISTER_RX_STAT_GRIPJ */ - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - dmae->src_addr_hi = 0; - if (CHIP_IS_E1x(bp)) { - dmae->src_addr_lo = (mac_addr + - BIGMAC_REGISTER_RX_STAT_GR64) >> 2; - dmae->dst_addr_lo = - U64_LO(bnx2x_sp_mapping(bp, mac_stats) + - offsetof(struct bmac1_stats, rx_stat_gr64_lo)); - dmae->dst_addr_hi = - U64_HI(bnx2x_sp_mapping(bp, mac_stats) + - offsetof(struct bmac1_stats, rx_stat_gr64_lo)); - dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ - - BIGMAC_REGISTER_RX_STAT_GR64) >> 2; - } else { - dmae->src_addr_lo = - (mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2; - dmae->dst_addr_lo = - U64_LO(bnx2x_sp_mapping(bp, mac_stats) + - offsetof(struct bmac2_stats, rx_stat_gr64_lo)); - dmae->dst_addr_hi = - U64_HI(bnx2x_sp_mapping(bp, mac_stats) + - offsetof(struct bmac2_stats, rx_stat_gr64_lo)); - dmae->len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ - - BIGMAC2_REGISTER_RX_STAT_GR64) >> 2; - } - - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - - } else if (bp->link_vars.mac_type == MAC_TYPE_EMAC) { - - mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0); - - /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/ - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - dmae->src_addr_lo = (mac_addr + - EMAC_REG_EMAC_RX_STAT_AC) >> 2; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats)); - dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - - /* EMAC_REG_EMAC_RX_STAT_AC_28 */ - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - dmae->src_addr_lo = (mac_addr + - EMAC_REG_EMAC_RX_STAT_AC_28) >> 2; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) + - offsetof(struct emac_stats, rx_stat_falsecarriererrors)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) + - offsetof(struct emac_stats, rx_stat_falsecarriererrors)); - dmae->len = 1; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - - /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/ - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - dmae->src_addr_lo = (mac_addr + - EMAC_REG_EMAC_TX_STAT_AC) >> 2; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) + - offsetof(struct emac_stats, tx_stat_ifhcoutoctets)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) + - offsetof(struct emac_stats, tx_stat_ifhcoutoctets)); - dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - } - - /* NIG */ - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD : - NIG_REG_STAT0_BRB_DISCARD) >> 2; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats)); - dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = opcode; - dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 : - NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) + - offsetof(struct nig_stats, egress_mac_pkt0_lo)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) + - offsetof(struct nig_stats, egress_mac_pkt0_lo)); - dmae->len = (2*sizeof(u32)) >> 2; - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, - true, DMAE_COMP_PCI); - - dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : - NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) + - offsetof(struct nig_stats, egress_mac_pkt1_lo)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) + - offsetof(struct nig_stats, egress_mac_pkt1_lo)); - dmae->len = (2*sizeof(u32)) >> 2; - dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_val = DMAE_COMP_VAL; - - *stats_comp = 0; -} - -static void bnx2x_func_stats_init(struct bnx2x *bp) -{ - struct dmae_command *dmae = &bp->stats_dmae; - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - - /* sanity */ - if (!bp->func_stx) { - BNX2X_ERR("BUG!\n"); - return; - } - - bp->executer_idx = 0; - memset(dmae, 0, sizeof(struct dmae_command)); - - dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, - true, DMAE_COMP_PCI); - dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); - dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); - dmae->dst_addr_lo = bp->func_stx >> 2; - dmae->dst_addr_hi = 0; - dmae->len = sizeof(struct host_func_stats) >> 2; - dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_val = DMAE_COMP_VAL; - - *stats_comp = 0; -} - -static void bnx2x_stats_start(struct bnx2x *bp) -{ - if (bp->port.pmf) - bnx2x_port_stats_init(bp); - - else if (bp->func_stx) - bnx2x_func_stats_init(bp); - - bnx2x_hw_stats_post(bp); - bnx2x_storm_stats_post(bp); -} - -static void bnx2x_stats_pmf_start(struct bnx2x *bp) -{ - bnx2x_stats_comp(bp); - bnx2x_stats_pmf_update(bp); - bnx2x_stats_start(bp); -} - -static void bnx2x_stats_restart(struct bnx2x *bp) -{ - bnx2x_stats_comp(bp); - bnx2x_stats_start(bp); -} - -static void bnx2x_bmac_stats_update(struct bnx2x *bp) -{ - struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); - struct bnx2x_eth_stats *estats = &bp->eth_stats; - struct { - u32 lo; - u32 hi; - } diff; - - if (CHIP_IS_E1x(bp)) { - struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats); - - /* the macros below will use "bmac1_stats" type */ - UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); - UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); - UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); - UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); - UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); - UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); - UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); - UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); - UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf); - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); - UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); - UPDATE_STAT64(tx_stat_gt127, - tx_stat_etherstatspkts65octetsto127octets); - UPDATE_STAT64(tx_stat_gt255, - tx_stat_etherstatspkts128octetsto255octets); - UPDATE_STAT64(tx_stat_gt511, - tx_stat_etherstatspkts256octetsto511octets); - UPDATE_STAT64(tx_stat_gt1023, - tx_stat_etherstatspkts512octetsto1023octets); - UPDATE_STAT64(tx_stat_gt1518, - tx_stat_etherstatspkts1024octetsto1522octets); - UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047); - UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095); - UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216); - UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383); - UPDATE_STAT64(tx_stat_gterr, - tx_stat_dot3statsinternalmactransmiterrors); - UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl); - - } else { - struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats); - - /* the macros below will use "bmac2_stats" type */ - UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); - UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); - UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); - UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); - UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); - UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); - UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); - UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); - UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf); - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); - UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); - UPDATE_STAT64(tx_stat_gt127, - tx_stat_etherstatspkts65octetsto127octets); - UPDATE_STAT64(tx_stat_gt255, - tx_stat_etherstatspkts128octetsto255octets); - UPDATE_STAT64(tx_stat_gt511, - tx_stat_etherstatspkts256octetsto511octets); - UPDATE_STAT64(tx_stat_gt1023, - tx_stat_etherstatspkts512octetsto1023octets); - UPDATE_STAT64(tx_stat_gt1518, - tx_stat_etherstatspkts1024octetsto1522octets); - UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047); - UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095); - UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216); - UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383); - UPDATE_STAT64(tx_stat_gterr, - tx_stat_dot3statsinternalmactransmiterrors); - UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl); - } - - estats->pause_frames_received_hi = - pstats->mac_stx[1].rx_stat_bmac_xpf_hi; - estats->pause_frames_received_lo = - pstats->mac_stx[1].rx_stat_bmac_xpf_lo; - - estats->pause_frames_sent_hi = - pstats->mac_stx[1].tx_stat_outxoffsent_hi; - estats->pause_frames_sent_lo = - pstats->mac_stx[1].tx_stat_outxoffsent_lo; -} - -static void bnx2x_emac_stats_update(struct bnx2x *bp) -{ - struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats); - struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); - struct bnx2x_eth_stats *estats = &bp->eth_stats; - - UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets); - UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets); - UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors); - UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors); - UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors); - UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors); - UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts); - UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong); - UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments); - UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers); - UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived); - UPDATE_EXTEND_STAT(rx_stat_xoffstateentered); - UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived); - UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived); - UPDATE_EXTEND_STAT(tx_stat_outxonsent); - UPDATE_EXTEND_STAT(tx_stat_outxoffsent); - UPDATE_EXTEND_STAT(tx_stat_flowcontroldone); - UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions); - UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes); - UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes); - UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions); - UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions); - UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions); - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets); - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets); - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets); - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets); - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets); - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets); - UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets); - UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors); - - estats->pause_frames_received_hi = - pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi; - estats->pause_frames_received_lo = - pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo; - ADD_64(estats->pause_frames_received_hi, - pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, - estats->pause_frames_received_lo, - pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); - - estats->pause_frames_sent_hi = - pstats->mac_stx[1].tx_stat_outxonsent_hi; - estats->pause_frames_sent_lo = - pstats->mac_stx[1].tx_stat_outxonsent_lo; - ADD_64(estats->pause_frames_sent_hi, - pstats->mac_stx[1].tx_stat_outxoffsent_hi, - estats->pause_frames_sent_lo, - pstats->mac_stx[1].tx_stat_outxoffsent_lo); -} - -static int bnx2x_hw_stats_update(struct bnx2x *bp) -{ - struct nig_stats *new = bnx2x_sp(bp, nig_stats); - struct nig_stats *old = &(bp->port.old_nig_stats); - struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); - struct bnx2x_eth_stats *estats = &bp->eth_stats; - struct { - u32 lo; - u32 hi; - } diff; - - if (bp->link_vars.mac_type == MAC_TYPE_BMAC) - bnx2x_bmac_stats_update(bp); - - else if (bp->link_vars.mac_type == MAC_TYPE_EMAC) - bnx2x_emac_stats_update(bp); - - else { /* unreached */ - BNX2X_ERR("stats updated by DMAE but no MAC active\n"); - return -1; - } - - ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo, - new->brb_discard - old->brb_discard); - ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo, - new->brb_truncate - old->brb_truncate); - - UPDATE_STAT64_NIG(egress_mac_pkt0, - etherstatspkts1024octetsto1522octets); - UPDATE_STAT64_NIG(egress_mac_pkt1, etherstatspktsover1522octets); - - memcpy(old, new, sizeof(struct nig_stats)); - - memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]), - sizeof(struct mac_stx)); - estats->brb_drop_hi = pstats->brb_drop_hi; - estats->brb_drop_lo = pstats->brb_drop_lo; - - pstats->host_port_stats_start = ++pstats->host_port_stats_end; - - if (!BP_NOMCP(bp)) { - u32 nig_timer_max = - SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer); - if (nig_timer_max != estats->nig_timer_max) { - estats->nig_timer_max = nig_timer_max; - BNX2X_ERR("NIG timer max (%u)\n", - estats->nig_timer_max); - } - } - - return 0; -} - -static int bnx2x_storm_stats_update(struct bnx2x *bp) -{ - struct tstorm_per_port_stats *tport = - &bp->fw_stats_data->port.tstorm_port_statistics; - struct tstorm_per_pf_stats *tfunc = - &bp->fw_stats_data->pf.tstorm_pf_statistics; - struct host_func_stats *fstats = bnx2x_sp(bp, func_stats); - struct bnx2x_eth_stats *estats = &bp->eth_stats; - struct stats_counter *counters = &bp->fw_stats_data->storm_counters; - int i; - u16 cur_stats_counter; - - /* Make sure we use the value of the counter - * used for sending the last stats ramrod. - */ - spin_lock_bh(&bp->stats_lock); - cur_stats_counter = bp->stats_counter - 1; - spin_unlock_bh(&bp->stats_lock); - - /* are storm stats valid? */ - if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) { - DP(BNX2X_MSG_STATS, "stats not updated by xstorm" - " xstorm counter (0x%x) != stats_counter (0x%x)\n", - le16_to_cpu(counters->xstats_counter), bp->stats_counter); - return -EAGAIN; - } - - if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) { - DP(BNX2X_MSG_STATS, "stats not updated by ustorm" - " ustorm counter (0x%x) != stats_counter (0x%x)\n", - le16_to_cpu(counters->ustats_counter), bp->stats_counter); - return -EAGAIN; - } - - if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) { - DP(BNX2X_MSG_STATS, "stats not updated by cstorm" - " cstorm counter (0x%x) != stats_counter (0x%x)\n", - le16_to_cpu(counters->cstats_counter), bp->stats_counter); - return -EAGAIN; - } - - if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) { - DP(BNX2X_MSG_STATS, "stats not updated by tstorm" - " tstorm counter (0x%x) != stats_counter (0x%x)\n", - le16_to_cpu(counters->tstats_counter), bp->stats_counter); - return -EAGAIN; - } - - memcpy(&(fstats->total_bytes_received_hi), - &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi), - sizeof(struct host_func_stats) - 2*sizeof(u32)); - estats->error_bytes_received_hi = 0; - estats->error_bytes_received_lo = 0; - estats->etherstatsoverrsizepkts_hi = 0; - estats->etherstatsoverrsizepkts_lo = 0; - estats->no_buff_discard_hi = 0; - estats->no_buff_discard_lo = 0; - - for_each_eth_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - struct tstorm_per_queue_stats *tclient = - &bp->fw_stats_data->queue_stats[i]. - tstorm_queue_statistics; - struct tstorm_per_queue_stats *old_tclient = &fp->old_tclient; - struct ustorm_per_queue_stats *uclient = - &bp->fw_stats_data->queue_stats[i]. - ustorm_queue_statistics; - struct ustorm_per_queue_stats *old_uclient = &fp->old_uclient; - struct xstorm_per_queue_stats *xclient = - &bp->fw_stats_data->queue_stats[i]. - xstorm_queue_statistics; - struct xstorm_per_queue_stats *old_xclient = &fp->old_xclient; - struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; - u32 diff; - - DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x" - " mcast_sent 0x%x\n", i, xclient->ucast_pkts_sent, - xclient->bcast_pkts_sent, xclient->mcast_pkts_sent); - - DP(BNX2X_MSG_STATS, "---------------\n"); - - - - - qstats->total_bytes_received_hi = - le32_to_cpu(tclient->rcv_bcast_bytes.hi); - qstats->total_bytes_received_lo = - le32_to_cpu(tclient->rcv_bcast_bytes.lo); - - ADD_64(qstats->total_bytes_received_hi, - le32_to_cpu(tclient->rcv_mcast_bytes.hi), - qstats->total_bytes_received_lo, - le32_to_cpu(tclient->rcv_mcast_bytes.lo)); - - ADD_64(qstats->total_bytes_received_hi, - le32_to_cpu(tclient->rcv_ucast_bytes.hi), - qstats->total_bytes_received_lo, - le32_to_cpu(tclient->rcv_ucast_bytes.lo)); - - qstats->valid_bytes_received_hi = - qstats->total_bytes_received_hi; - qstats->valid_bytes_received_lo = - qstats->total_bytes_received_lo; - - - UPDATE_EXTEND_TSTAT(rcv_ucast_pkts, - total_unicast_packets_received); - UPDATE_EXTEND_TSTAT(rcv_mcast_pkts, - total_multicast_packets_received); - UPDATE_EXTEND_TSTAT(rcv_bcast_pkts, - total_broadcast_packets_received); - UPDATE_EXTEND_TSTAT(pkts_too_big_discard, - etherstatsoverrsizepkts); - UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard); - - SUB_EXTEND_USTAT(ucast_no_buff_pkts, - total_unicast_packets_received); - SUB_EXTEND_USTAT(mcast_no_buff_pkts, - total_multicast_packets_received); - SUB_EXTEND_USTAT(bcast_no_buff_pkts, - total_broadcast_packets_received); - UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard); - UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard); - UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard); - - qstats->total_bytes_transmitted_hi = - le32_to_cpu(xclient->ucast_bytes_sent.hi); - qstats->total_bytes_transmitted_lo = - le32_to_cpu(xclient->ucast_bytes_sent.lo); - - ADD_64(qstats->total_bytes_transmitted_hi, - le32_to_cpu(xclient->mcast_bytes_sent.hi), - qstats->total_bytes_transmitted_lo, - le32_to_cpu(xclient->mcast_bytes_sent.lo)); - - ADD_64(qstats->total_bytes_transmitted_hi, - le32_to_cpu(xclient->bcast_bytes_sent.hi), - qstats->total_bytes_transmitted_lo, - le32_to_cpu(xclient->bcast_bytes_sent.lo)); - - UPDATE_EXTEND_XSTAT(ucast_pkts_sent, - total_unicast_packets_transmitted); - UPDATE_EXTEND_XSTAT(mcast_pkts_sent, - total_multicast_packets_transmitted); - UPDATE_EXTEND_XSTAT(bcast_pkts_sent, - total_broadcast_packets_transmitted); - - old_tclient->checksum_discard = tclient->checksum_discard; - old_tclient->ttl0_discard = tclient->ttl0_discard; - - ADD_64(fstats->total_bytes_received_hi, - qstats->total_bytes_received_hi, - fstats->total_bytes_received_lo, - qstats->total_bytes_received_lo); - ADD_64(fstats->total_bytes_transmitted_hi, - qstats->total_bytes_transmitted_hi, - fstats->total_bytes_transmitted_lo, - qstats->total_bytes_transmitted_lo); - ADD_64(fstats->total_unicast_packets_received_hi, - qstats->total_unicast_packets_received_hi, - fstats->total_unicast_packets_received_lo, - qstats->total_unicast_packets_received_lo); - ADD_64(fstats->total_multicast_packets_received_hi, - qstats->total_multicast_packets_received_hi, - fstats->total_multicast_packets_received_lo, - qstats->total_multicast_packets_received_lo); - ADD_64(fstats->total_broadcast_packets_received_hi, - qstats->total_broadcast_packets_received_hi, - fstats->total_broadcast_packets_received_lo, - qstats->total_broadcast_packets_received_lo); - ADD_64(fstats->total_unicast_packets_transmitted_hi, - qstats->total_unicast_packets_transmitted_hi, - fstats->total_unicast_packets_transmitted_lo, - qstats->total_unicast_packets_transmitted_lo); - ADD_64(fstats->total_multicast_packets_transmitted_hi, - qstats->total_multicast_packets_transmitted_hi, - fstats->total_multicast_packets_transmitted_lo, - qstats->total_multicast_packets_transmitted_lo); - ADD_64(fstats->total_broadcast_packets_transmitted_hi, - qstats->total_broadcast_packets_transmitted_hi, - fstats->total_broadcast_packets_transmitted_lo, - qstats->total_broadcast_packets_transmitted_lo); - ADD_64(fstats->valid_bytes_received_hi, - qstats->valid_bytes_received_hi, - fstats->valid_bytes_received_lo, - qstats->valid_bytes_received_lo); - - ADD_64(estats->etherstatsoverrsizepkts_hi, - qstats->etherstatsoverrsizepkts_hi, - estats->etherstatsoverrsizepkts_lo, - qstats->etherstatsoverrsizepkts_lo); - ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi, - estats->no_buff_discard_lo, qstats->no_buff_discard_lo); - } - - ADD_64(fstats->total_bytes_received_hi, - estats->rx_stat_ifhcinbadoctets_hi, - fstats->total_bytes_received_lo, - estats->rx_stat_ifhcinbadoctets_lo); - - ADD_64(fstats->total_bytes_received_hi, - tfunc->rcv_error_bytes.hi, - fstats->total_bytes_received_lo, - tfunc->rcv_error_bytes.lo); - - memcpy(estats, &(fstats->total_bytes_received_hi), - sizeof(struct host_func_stats) - 2*sizeof(u32)); - - ADD_64(estats->error_bytes_received_hi, - tfunc->rcv_error_bytes.hi, - estats->error_bytes_received_lo, - tfunc->rcv_error_bytes.lo); - - ADD_64(estats->etherstatsoverrsizepkts_hi, - estats->rx_stat_dot3statsframestoolong_hi, - estats->etherstatsoverrsizepkts_lo, - estats->rx_stat_dot3statsframestoolong_lo); - ADD_64(estats->error_bytes_received_hi, - estats->rx_stat_ifhcinbadoctets_hi, - estats->error_bytes_received_lo, - estats->rx_stat_ifhcinbadoctets_lo); - - if (bp->port.pmf) { - estats->mac_filter_discard = - le32_to_cpu(tport->mac_filter_discard); - estats->outer_vlan_discard = - le32_to_cpu(tport->outer_vlan_discard); - estats->brb_truncate_discard = - le32_to_cpu(tport->brb_truncate_discard); - estats->mac_discard = le32_to_cpu(tport->mac_discard); - } - - fstats->host_func_stats_start = ++fstats->host_func_stats_end; - -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - bnx2x_iov_storm_stats_update(bp); -#endif - - bp->stats_pending = 0; - - return 0; -} - -static void bnx2x_net_stats_update(struct bnx2x *bp) -{ - struct bnx2x_eth_stats *estats = &bp->eth_stats; -#if (LINUX_VERSION_CODE >= 0x020618) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ - struct net_device_stats *nstats = &bp->dev->stats; -#else - struct net_device_stats *nstats = &bp->net_stats; -#endif - int i; - - nstats->rx_packets = - bnx2x_hilo(&estats->total_unicast_packets_received_hi) + - bnx2x_hilo(&estats->total_multicast_packets_received_hi) + - bnx2x_hilo(&estats->total_broadcast_packets_received_hi); - - nstats->tx_packets = - bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) + - bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) + - bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi); - - nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi); - - nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi); - - nstats->rx_dropped = estats->mac_discard; - for_each_rx_queue(bp, i) - nstats->rx_dropped += - le32_to_cpu(bp->fp[i].old_tclient.checksum_discard); - - nstats->tx_dropped = 0; - - nstats->multicast = - bnx2x_hilo(&estats->total_multicast_packets_received_hi); - - nstats->collisions = - bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi); - - nstats->rx_length_errors = - bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) + - bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi); - nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) + - bnx2x_hilo(&estats->brb_truncate_hi); - nstats->rx_crc_errors = - bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi); - nstats->rx_frame_errors = - bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi); - nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi); - nstats->rx_missed_errors = 0; - - nstats->rx_errors = nstats->rx_length_errors + - nstats->rx_over_errors + - nstats->rx_crc_errors + - nstats->rx_frame_errors + - nstats->rx_fifo_errors + - nstats->rx_missed_errors + - estats->outer_vlan_discard; - - nstats->tx_aborted_errors = - bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) + - bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi); - nstats->tx_carrier_errors = - bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi); - nstats->tx_fifo_errors = 0; - nstats->tx_heartbeat_errors = 0; - nstats->tx_window_errors = 0; - - nstats->tx_errors = nstats->tx_aborted_errors + - nstats->tx_carrier_errors + - bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi); -} - -static void bnx2x_drv_stats_update(struct bnx2x *bp) -{ - struct bnx2x_eth_stats *estats = &bp->eth_stats; - int i; - - estats->driver_xoff = 0; - estats->rx_err_discard_pkt = 0; - estats->rx_skb_alloc_failed = 0; - estats->hw_csum_err = 0; - for_each_queue(bp, i) { - struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats; - - estats->driver_xoff += qstats->driver_xoff; - estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt; - estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed; - estats->hw_csum_err += qstats->hw_csum_err; - } -} - -static void bnx2x_stats_update(struct bnx2x *bp) -{ - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - - if (*stats_comp != DMAE_COMP_VAL) - return; - - if (bp->port.pmf) - bnx2x_hw_stats_update(bp); - - if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) { - BNX2X_ERR("storm stats were not updated for 3 times\n"); - bnx2x_panic(); - return; - } - - bnx2x_net_stats_update(bp); - bnx2x_drv_stats_update(bp); - - if (netif_msg_timer(bp)) { - struct bnx2x_eth_stats *estats = &bp->eth_stats; - int i; - - netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n", - estats->brb_drop_lo, estats->brb_truncate_lo); - - for_each_eth_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; - - printk(KERN_DEBUG "%s: rx usage(%4u) *rx_cons_sb(%u)" - " rx pkt(%lu) rx calls(%lu %lu)\n", - fp->name, (le16_to_cpu(*fp->rx_cons_sb) - - fp->rx_comp_cons), - le16_to_cpu(*fp->rx_cons_sb), - bnx2x_hilo(&qstats-> - total_unicast_packets_received_hi), - fp->rx_calls, fp->rx_pkt); - } - - for_each_eth_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - struct netdev_queue *txq = - netdev_get_tx_queue(bp->dev, i); -#endif - - printk(KERN_DEBUG "%s: tx avail(%4u) *tx_cons_sb(%u)" - " tx pkt(%lu) tx calls (%lu)" - " %s (Xoff events %u)\n", - fp->name, bnx2x_tx_avail(fp), - le16_to_cpu(*fp->tx_cons_sb), - bnx2x_hilo(&qstats-> - total_unicast_packets_transmitted_hi), - fp->tx_pkt, -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - (netif_tx_queue_stopped(txq) ? "Xoff" : "Xon"), -#else - (netif_queue_stopped(bp->dev) ? "Xoff" : "Xon"), -#endif - qstats->driver_xoff); - } - } - - bnx2x_hw_stats_post(bp); - bnx2x_storm_stats_post(bp); -} - -static void bnx2x_port_stats_stop(struct bnx2x *bp) -{ - struct dmae_command *dmae; - u32 opcode; - int loader_idx = PMF_DMAE_C(bp); - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - - bp->executer_idx = 0; - - opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0); - - if (bp->port.port_stx) { - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - if (bp->func_stx) - dmae->opcode = bnx2x_dmae_opcode_add_comp( - opcode, DMAE_COMP_GRC); - else - dmae->opcode = bnx2x_dmae_opcode_add_comp( - opcode, DMAE_COMP_PCI); - - dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); - dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); - dmae->dst_addr_lo = bp->port.port_stx >> 2; - dmae->dst_addr_hi = 0; - dmae->len = sizeof(struct host_port_stats) >> 2; - if (bp->func_stx) { - dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; - dmae->comp_addr_hi = 0; - dmae->comp_val = 1; - } else { - dmae->comp_addr_lo = - U64_LO(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_addr_hi = - U64_HI(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_val = DMAE_COMP_VAL; - - *stats_comp = 0; - } - } - - if (bp->func_stx) { - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = - bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); - - dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); - dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); - dmae->dst_addr_lo = bp->func_stx >> 2; - dmae->dst_addr_hi = 0; - dmae->len = sizeof(struct host_func_stats) >> 2; - dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_val = DMAE_COMP_VAL; - - *stats_comp = 0; - } -} - -static void bnx2x_stats_stop(struct bnx2x *bp) -{ - int update = 0; - - bnx2x_stats_comp(bp); - - if (bp->port.pmf) - update = (bnx2x_hw_stats_update(bp) == 0); - - update |= (bnx2x_storm_stats_update(bp) == 0); - - if (update) { - bnx2x_net_stats_update(bp); - - if (bp->port.pmf) - bnx2x_port_stats_stop(bp); - - bnx2x_hw_stats_post(bp); - bnx2x_stats_comp(bp); - } -} - -static void bnx2x_stats_do_nothing(struct bnx2x *bp) -{ -} - -static const struct { - void (*action)(struct bnx2x *bp); - enum bnx2x_stats_state next_state; -} bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = { -/* state event */ -{ -/* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED}, -/* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED}, -/* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}, -/* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED} -}, -{ -/* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED}, -/* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED}, -/* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED}, -/* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED} -} -}; - -void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event) -{ - enum bnx2x_stats_state state; - if (unlikely(bp->panic)) - return; - bnx2x_stats_stm[bp->stats_state][event].action(bp); - spin_lock_bh(&bp->stats_lock); - state = bp->stats_state; - bp->stats_state = bnx2x_stats_stm[state][event].next_state; - spin_unlock_bh(&bp->stats_lock); - - if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) - DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", - state, event, bp->stats_state); -} - -static void bnx2x_port_stats_base_init(struct bnx2x *bp) -{ - struct dmae_command *dmae; - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - - /* sanity */ - if (!bp->port.pmf || !bp->port.port_stx) { - BNX2X_ERR("BUG!\n"); - return; - } - - bp->executer_idx = 0; - - dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); - dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, - true, DMAE_COMP_PCI); - dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); - dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); - dmae->dst_addr_lo = bp->port.port_stx >> 2; - dmae->dst_addr_hi = 0; - dmae->len = sizeof(struct host_port_stats) >> 2; - dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_val = DMAE_COMP_VAL; - - *stats_comp = 0; - bnx2x_hw_stats_post(bp); - bnx2x_stats_comp(bp); -} - -static void bnx2x_func_stats_base_init(struct bnx2x *bp) -{ - int vn, vn_max = IS_MF(bp) ? E1HVN_MAX : E1VN_MAX; - u32 func_stx; - - /* sanity */ - if (!bp->port.pmf || !bp->func_stx) { - BNX2X_ERR("BUG!\n"); - return; - } - - /* save our func_stx */ - func_stx = bp->func_stx; - - for (vn = VN_0; vn < vn_max; vn++) { - int mb_idx = !CHIP_IS_E2(bp) ? 2*vn + BP_PORT(bp) : vn; - - bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param); - bnx2x_func_stats_init(bp); - bnx2x_hw_stats_post(bp); - bnx2x_stats_comp(bp); - } - - /* restore our func_stx */ - bp->func_stx = func_stx; -} - -static void bnx2x_func_stats_base_update(struct bnx2x *bp) -{ - struct dmae_command *dmae = &bp->stats_dmae; - u32 *stats_comp = bnx2x_sp(bp, stats_comp); - - /* sanity */ - if (!bp->func_stx) { - BNX2X_ERR("BUG!\n"); - return; - } - - bp->executer_idx = 0; - memset(dmae, 0, sizeof(struct dmae_command)); - dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, - true, DMAE_COMP_PCI); - dmae->src_addr_lo = bp->func_stx >> 2; - dmae->src_addr_hi = 0; - dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base)); - dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base)); - dmae->len = sizeof(struct host_func_stats) >> 2; - dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); - dmae->comp_val = DMAE_COMP_VAL; - - *stats_comp = 0; - bnx2x_hw_stats_post(bp); - bnx2x_stats_comp(bp); -} - -/** - * This function will prepare the statistics ramrod data the way - * we will only have to increment the statistics counter and - * send the ramrod each time we have to. - * - * @param bp - */ -static inline void __prep_fw_stats_req(struct bnx2x *bp) -{ - int i; - struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr; - - dma_addr_t cur_data_offset; - struct stats_query_entry *cur_query_entry; - - stats_hdr->cmd_num = bp->fw_stats_num; - stats_hdr->drv_stats_counter = 0; - - /* storm_counters struct contains the counters of completed - * statistics requests per storm which are incremented by FW - * each time it completes hadning a statistics ramrod. We will - * check these counters in the timer handler and discard a - * (statistics) ramrod completion. - */ - cur_data_offset = bp->fw_stats_data_mapping + - offsetof(struct bnx2x_fw_stats_data, storm_counters); - - stats_hdr->stats_counters_addrs.hi = - cpu_to_le32(U64_HI(cur_data_offset)); - stats_hdr->stats_counters_addrs.lo = - cpu_to_le32(U64_LO(cur_data_offset)); - - /* prepare to the first stats ramrod (will be completed with - * the counters equal to zero) - init counters to somethig different. - */ - memset(&bp->fw_stats_data->storm_counters, 0xff, - sizeof(struct stats_counter)); - - /**** Port FW statistics data ****/ - cur_data_offset = bp->fw_stats_data_mapping + - offsetof(struct bnx2x_fw_stats_data, port); - - cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX]; - - cur_query_entry->kind = STATS_TYPE_PORT; - /* For port query index is a DONT CARE */ - cur_query_entry->index = BP_PORT(bp); - cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); - cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset)); - cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset)); - - /**** PF FW statistics data ****/ - cur_data_offset = bp->fw_stats_data_mapping + - offsetof(struct bnx2x_fw_stats_data, pf); - - cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX]; - - cur_query_entry->kind = STATS_TYPE_PF; - /* For PF query index is a DONT CARE */ - cur_query_entry->index = BP_PORT(bp); - cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); - cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset)); - cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset)); - - /**** Clients' queries ****/ - cur_data_offset = bp->fw_stats_data_mapping + - offsetof(struct bnx2x_fw_stats_data, queue_stats); - - for_each_eth_queue(bp, i) { - cur_query_entry = - &bp->fw_stats_req-> - query[BNX2X_FIRST_QUEUE_QUERY_IDX + i]; - - cur_query_entry->kind = STATS_TYPE_QUEUE; - cur_query_entry->index = __stats_id(&bp->fp[i]); - cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); - cur_query_entry->address.hi = - cpu_to_le32(U64_HI(cur_data_offset)); - cur_query_entry->address.lo = - cpu_to_le32(U64_LO(cur_data_offset)); - - cur_data_offset += sizeof(struct per_queue_stats); - } -} - -static void bnx2x_stats_init(struct bnx2x *bp) -{ - int /*abs*/port = BP_PORT(bp); - int mb_idx = BP_FW_MB_IDX(bp); - int i; - - bp->stats_pending = 0; - bp->executer_idx = 0; - bp->stats_counter = 0; - - /* port and func stats for management */ - if (!BP_NOMCP(bp)) { - bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx); - bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param); - - } else { - bp->port.port_stx = 0; - bp->func_stx = 0; - } - DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n", - bp->port.port_stx, bp->func_stx); - - port = BP_PORT(bp); - /* port stats */ - memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats)); - bp->port.old_nig_stats.brb_discard = - REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38); - bp->port.old_nig_stats.brb_truncate = - REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38); - REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50, - &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2); - REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50, - &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2); - - /* function stats */ - for_each_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - - memset(&fp->old_tclient, 0, sizeof(fp->old_tclient)); - memset(&fp->old_uclient, 0, sizeof(fp->old_uclient)); - memset(&fp->old_xclient, 0, sizeof(fp->old_xclient)); - memset(&fp->eth_q_stats, 0, sizeof(fp->eth_q_stats)); - } - - /* Prepare statistics ramrod data */ - __prep_fw_stats_req(bp); - -#if (LINUX_VERSION_CODE >= 0x020618) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ - memset(&bp->dev->stats, 0, sizeof(bp->dev->stats)); -#else - memset(&bp->net_stats, 0, sizeof(bp->net_stats)); -#endif - memset(&bp->eth_stats, 0, sizeof(bp->eth_stats)); - - bp->stats_state = STATS_STATE_DISABLED; - - if (bp->port.pmf) { - if (bp->port.port_stx) - bnx2x_port_stats_base_init(bp); - - if (bp->func_stx) - bnx2x_func_stats_base_init(bp); - - } else if (bp->func_stx) - bnx2x_func_stats_base_update(bp); -} void bnx2x_drv_pulse(struct bnx2x *bp) { @@ -6005,19 +5885,6 @@ void bnx2x_drv_pulse(struct bnx2x *bp) bp->fw_drv_pulse_wr_seq); } -static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp) -{ - u32 val; - - if (SHMEM2_HAS(bp, edebug_driver_if[1])) { - val = SHMEM2_RD(bp, edebug_driver_if[1]); - - if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) - return true; - } - - return false; -} static void bnx2x_timer(unsigned long data) { @@ -6026,16 +5893,16 @@ static void bnx2x_timer(unsigned long data) if (!netif_running(bp->dev)) return; - if (atomic_read(&bp->intr_sem) != 0) - goto timer_restart; - +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ if (poll) { + u8 cos; struct bnx2x_fastpath *fp = &bp->fp[0]; - int rc; - bnx2x_tx_int(fp); - rc = bnx2x_rx_int(fp, 1000); + for_each_cos_in_tx_queue(fp, cos) + bnx2x_tx_int(bp, fp->txdata_ptr[cos]); + bnx2x_rx_int(fp, 1000); } +#endif #ifndef __VMKLNX__ /* Remove FW pulse timer update */ /* BNX2X_UPSTREAM */ if (!BP_NOMCP(bp)) { @@ -6063,10 +5930,9 @@ static void bnx2x_timer(unsigned long data) } #endif /* !__VMKLNX__ */ - if ((bp->state == BNX2X_STATE_OPEN) && !bnx2x_edebug_stats_stopped(bp)) + if (bp->state == BNX2X_STATE_OPEN) bnx2x_stats_handle(bp, STATS_EVENT_UPDATE); -timer_restart: mod_timer(&bp->timer, jiffies + bp->current_interval); } @@ -6081,19 +5947,19 @@ timer_restart: static inline void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) { u32 i; - if (!len%4 && !addr%4) - for (i = 0; i < len; i+=4) - REG_WR(bp,addr + i, fill); + if (!(len%4) && !(addr%4)) + for (i = 0; i < len; i += 4) + REG_WR(bp, addr + i, fill); else for (i = 0; i < len; i++) - REG_WR8(bp,addr + i, fill); + REG_WR8(bp, addr + i, fill); } /* helper: writes FP SP data to FW - data_size in dwords */ static inline void bnx2x_wr_fp_sb_data(struct bnx2x *bp, int fw_sb_id, - u32* sb_data_p, + u32 *sb_data_p, u32 data_size) { int index; @@ -6106,25 +5972,24 @@ static inline void bnx2x_wr_fp_sb_data(struct bnx2x *bp, static inline void bnx2x_zero_fp_sb(struct bnx2x *bp, int fw_sb_id) { - u32* sb_data_p; + u32 *sb_data_p; u32 data_size = 0; struct hc_status_block_data_e2 sb_data_e2; struct hc_status_block_data_e1x sb_data_e1x; /* disable the function first */ - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { memset(&sb_data_e2, 0, sizeof(struct hc_status_block_data_e2)); - sb_data_e2.common.p_func.pf_id = HC_FUNCTION_DISABLED; - sb_data_e2.common.p_func.vf_id = HC_FUNCTION_DISABLED; + sb_data_e2.common.state = SB_DISABLED; sb_data_e2.common.p_func.vf_valid = false; - sb_data_p = (u32*)&sb_data_e2; + sb_data_p = (u32 *)&sb_data_e2; data_size = sizeof(struct hc_status_block_data_e2)/sizeof(u32); } else { - memset(&sb_data_e1x, 0, sizeof(struct hc_status_block_data_e1x)); - sb_data_e1x.common.p_func.pf_id = HC_FUNCTION_DISABLED; - sb_data_e1x.common.p_func.vf_id = HC_FUNCTION_DISABLED; + memset(&sb_data_e1x, 0, + sizeof(struct hc_status_block_data_e1x)); + sb_data_e1x.common.state = SB_DISABLED; sb_data_e1x.common.p_func.vf_valid = false; - sb_data_p = (u32*)&sb_data_e1x; + sb_data_p = (u32 *)&sb_data_e1x; data_size = sizeof(struct hc_status_block_data_e1x)/sizeof(u32); } bnx2x_wr_fp_sb_data(bp, fw_sb_id, sb_data_p, data_size); @@ -6147,7 +6012,7 @@ static inline void bnx2x_wr_sp_sb_data(struct bnx2x *bp, REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(func) + i*sizeof(u32), - *((u32*)sp_sb_data + i)); + *((u32 *)sp_sb_data + i)); } static inline void bnx2x_zero_sp_sb(struct bnx2x *bp) @@ -6156,8 +6021,7 @@ static inline void bnx2x_zero_sp_sb(struct bnx2x *bp) struct hc_sp_status_block_data sp_sb_data; memset(&sp_sb_data, 0, sizeof(struct hc_sp_status_block_data)); - sp_sb_data.p_func.pf_id = HC_FUNCTION_DISABLED; - sp_sb_data.p_func.vf_id = HC_FUNCTION_DISABLED; + sp_sb_data.state = SB_DISABLED; sp_sb_data.p_func.vf_valid = false; bnx2x_wr_sp_sb_data(bp, &sp_sb_data); @@ -6172,7 +6036,8 @@ static inline void bnx2x_zero_sp_sb(struct bnx2x *bp) } -static inline void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm * hc_sm, +static inline +void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, int igu_sb_id, int igu_seg_id) { hc_sm->igu_sb_id = igu_sb_id; @@ -6181,6 +6046,37 @@ static inline void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm * hc hc_sm->time_to_expire = 0xFFFFFFFF; } + +/* allocates state machine ids. */ +static inline +void bnx2x_map_sb_state_machines(struct hc_index_data *index_data) +{ + /* zero out state machine indices */ + /* rx indices */ + index_data[HC_INDEX_ETH_RX_CQ_CONS].flags &= ~HC_INDEX_DATA_SM_ID; + + /* tx indices */ + index_data[HC_INDEX_OOO_TX_CQ_CONS].flags &= ~HC_INDEX_DATA_SM_ID; + index_data[HC_INDEX_ETH_TX_CQ_CONS_COS0].flags &= ~HC_INDEX_DATA_SM_ID; + index_data[HC_INDEX_ETH_TX_CQ_CONS_COS1].flags &= ~HC_INDEX_DATA_SM_ID; + index_data[HC_INDEX_ETH_TX_CQ_CONS_COS2].flags &= ~HC_INDEX_DATA_SM_ID; + + /* map indices */ + /* rx indices */ + index_data[HC_INDEX_ETH_RX_CQ_CONS].flags |= + SM_RX_ID << HC_INDEX_DATA_SM_ID_SHIFT; + + /* tx indices */ + index_data[HC_INDEX_OOO_TX_CQ_CONS].flags |= + SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT; + index_data[HC_INDEX_ETH_TX_CQ_CONS_COS0].flags |= + SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT; + index_data[HC_INDEX_ETH_TX_CQ_CONS_COS1].flags |= + SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT; + index_data[HC_INDEX_ETH_TX_CQ_CONS_COS2].flags |= + SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT; +} + void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, u8 vf_valid, int fw_sb_id, int igu_sb_id) { @@ -6188,8 +6084,7 @@ void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, struct hc_status_block_data_e2 sb_data_e2; struct hc_status_block_data_e1x sb_data_e1x; - struct hc_status_block_sm * hc_sm_p; - struct hc_index_data * hc_index_p; + struct hc_status_block_sm *hc_sm_p; int data_size; u32 *sb_data_p; @@ -6200,8 +6095,9 @@ void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, bnx2x_zero_fp_sb(bp, fw_sb_id); - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { memset(&sb_data_e2, 0, sizeof(struct hc_status_block_data_e2)); + sb_data_e2.common.state = SB_ENABLED; sb_data_e2.common.p_func.pf_id = BP_FUNC(bp); sb_data_e2.common.p_func.vf_id = vfid; sb_data_e2.common.p_func.vf_valid = vf_valid; @@ -6210,11 +6106,13 @@ void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, sb_data_e2.common.host_sb_addr.hi = U64_HI(mapping); sb_data_e2.common.host_sb_addr.lo = U64_LO(mapping); hc_sm_p = sb_data_e2.common.state_machine; - hc_index_p = sb_data_e2.index_data; - sb_data_p = (u32*)&sb_data_e2; + sb_data_p = (u32 *)&sb_data_e2; data_size = sizeof(struct hc_status_block_data_e2)/sizeof(u32); + bnx2x_map_sb_state_machines(sb_data_e2.index_data); } else { - memset(&sb_data_e1x, 0, sizeof(struct hc_status_block_data_e1x)); + memset(&sb_data_e1x, 0, + sizeof(struct hc_status_block_data_e1x)); + sb_data_e1x.common.state = SB_ENABLED; sb_data_e1x.common.p_func.pf_id = BP_FUNC(bp); sb_data_e1x.common.p_func.vf_id = 0xff; sb_data_e1x.common.p_func.vf_valid = false; @@ -6223,39 +6121,36 @@ void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, sb_data_e1x.common.host_sb_addr.hi = U64_HI(mapping); sb_data_e1x.common.host_sb_addr.lo = U64_LO(mapping); hc_sm_p = sb_data_e1x.common.state_machine; - hc_index_p = sb_data_e1x.index_data; - sb_data_p = (u32*)&sb_data_e1x; + sb_data_p = (u32 *)&sb_data_e1x; data_size = sizeof(struct hc_status_block_data_e1x)/sizeof(u32); + bnx2x_map_sb_state_machines(sb_data_e1x.index_data); } - bnx2x_setup_ndsb_state_machine(&hc_sm_p[SM_RX_ID], igu_sb_id, igu_seg_id); - bnx2x_setup_ndsb_state_machine(&hc_sm_p[SM_TX_ID], igu_sb_id, igu_seg_id); + bnx2x_setup_ndsb_state_machine(&hc_sm_p[SM_RX_ID], + igu_sb_id, igu_seg_id); + bnx2x_setup_ndsb_state_machine(&hc_sm_p[SM_TX_ID], + igu_sb_id, igu_seg_id); - DP(NETIF_MSG_HW, "Init FW SB %d\n", fw_sb_id); + DP(NETIF_MSG_IFUP, "Init FW SB %d\n", fw_sb_id); /* write indecies to HW */ bnx2x_wr_fp_sb_data(bp, fw_sb_id, sb_data_p, data_size); } -static void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u16 fw_sb_id, - u8 sb_index, u8 disable, u16 usec) -{ - int port = BP_PORT(bp); - u8 ticks = usec / BNX2X_BTR; - - storm_memset_hc_timeout(bp, port, fw_sb_id, sb_index, ticks); - - disable = disable ? 1 : (usec ? 0 : 1); - storm_memset_hc_disable(bp, port, fw_sb_id, sb_index, disable); -} - -static void bnx2x_update_coalesce_sb(struct bnx2x *bp, u16 fw_sb_id, +static void bnx2x_update_coalesce_sb(struct bnx2x *bp, u8 fw_sb_id, u16 tx_usec, u16 rx_usec) { - bnx2x_update_coalesce_sb_index(bp, fw_sb_id, U_SB_ETH_RX_CQ_INDEX, + bnx2x_update_coalesce_sb_index(bp, fw_sb_id, HC_INDEX_ETH_RX_CQ_CONS, false, rx_usec); - bnx2x_update_coalesce_sb_index(bp, fw_sb_id, C_SB_ETH_TX_CQ_INDEX, - false, tx_usec); + bnx2x_update_coalesce_sb_index(bp, fw_sb_id, + HC_INDEX_ETH_TX_CQ_CONS_COS0, false, + tx_usec); + bnx2x_update_coalesce_sb_index(bp, fw_sb_id, + HC_INDEX_ETH_TX_CQ_CONS_COS1, false, + tx_usec); + bnx2x_update_coalesce_sb_index(bp, fw_sb_id, + HC_INDEX_ETH_TX_CQ_CONS_COS2, false, + tx_usec); } static void bnx2x_init_def_sb(struct bnx2x *bp) @@ -6266,7 +6161,7 @@ static void bnx2x_init_def_sb(struct bnx2x *bp) int igu_seg_id; int port = BP_PORT(bp); int func = BP_FUNC(bp); - int reg_offset; + int reg_offset, reg_offset_en5; u64 section; int index; struct hc_sp_status_block_data sp_sb_data; @@ -6289,6 +6184,8 @@ static void bnx2x_init_def_sb(struct bnx2x *bp) reg_offset = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0); + reg_offset_en5 = (port ? MISC_REG_AEU_ENABLE5_FUNC_1_OUT_0 : + MISC_REG_AEU_ENABLE5_FUNC_0_OUT_0); for (index = 0; index < MAX_DYNAMIC_ATTN_GRPS; index++) { int sindex; /* take care of sig[0]..sig[4] */ @@ -6296,14 +6193,14 @@ static void bnx2x_init_def_sb(struct bnx2x *bp) bp->attn_group[index].sig[sindex] = REG_RD(bp, reg_offset + sindex*0x4 + 0x10*index); - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) /* * enable5 is separate from the rest of the registers, * and therefore the address skip is 4 * and not 16 between the different groups */ bp->attn_group[index].sig[4] = REG_RD(bp, - reg_offset + 0x10 + 0x4*index); + reg_offset_en5 + 0x4*index); else bp->attn_group[index].sig[4] = 0; } @@ -6314,32 +6211,31 @@ static void bnx2x_init_def_sb(struct bnx2x *bp) REG_WR(bp, reg_offset, U64_LO(section)); REG_WR(bp, reg_offset + 4, U64_HI(section)); - } else if (CHIP_IS_E2(bp)){ + } else if (!CHIP_IS_E1x(bp)) { REG_WR(bp, IGU_REG_ATTN_MSG_ADDR_L, U64_LO(section)); REG_WR(bp, IGU_REG_ATTN_MSG_ADDR_H, U64_HI(section)); } - section = ((u64)mapping) + offsetof(struct host_sp_status_block, sp_sb); - bnx2x_zero_sp_sb(bp); + sp_sb_data.state = SB_ENABLED; sp_sb_data.host_sb_addr.lo = U64_LO(section); sp_sb_data.host_sb_addr.hi = U64_HI(section); - sp_sb_data.igu_sb_id = igu_sp_sb_index; + sp_sb_data.igu_sb_id = igu_sp_sb_index; sp_sb_data.igu_seg_id = igu_seg_id; sp_sb_data.p_func.pf_id = func; sp_sb_data.p_func.vnic_id = BP_VN(bp); - sp_sb_data.p_func.vf_id = 0xff; + sp_sb_data.p_func.vf_id = 0xff; bnx2x_wr_sp_sb_data(bp, &sp_sb_data); bnx2x_ack_sb(bp, bp->igu_dsb_id, USTORM_ID, 0, IGU_INT_ENABLE, 0); } -static void bnx2x_update_coalesce(struct bnx2x *bp) +void bnx2x_update_coalesce(struct bnx2x *bp) { int i; @@ -6351,7 +6247,7 @@ static void bnx2x_update_coalesce(struct bnx2x *bp) static void bnx2x_init_sp_ring(struct bnx2x *bp) { spin_lock_init(&bp->spq_lock); - atomic_set(&bp->spq_left, MAX_SPQ_PENDING); + atomic_set(&bp->cq_spq_left, MAX_SPQ_PENDING); bp->spq_prod_idx = 0; bp->dsb_sp_prod = BNX2X_SP_DSB_INDEX; @@ -6359,13 +6255,12 @@ static void bnx2x_init_sp_ring(struct bnx2x *bp) bp->spq_last_bd = bp->spq_prod_bd + MAX_SP_DESC_CNT; } - static void bnx2x_init_eq_ring(struct bnx2x *bp) { int i; for (i = 1; i <= NUM_EQ_PAGES; i++) { union event_ring_elem *elem = - &bp->eq_ring[EQ_DESC_CNT_PAGE * i -1]; + &bp->eq_ring[EQ_DESC_CNT_PAGE * i - 1]; elem->next_page.addr.hi = cpu_to_le32(U64_HI(bp->eq_mapping + @@ -6377,14 +6272,18 @@ static void bnx2x_init_eq_ring(struct bnx2x *bp) bp->eq_cons = 0; bp->eq_prod = NUM_EQ_DESC; bp->eq_cons_sb = BNX2X_EQ_INDEX; + /* we want a warning message before it gets rought... */ + atomic_set(&bp->eq_spq_left, + min_t(int, MAX_SP_DESC_CNT - MAX_SPQ_PENDING, NUM_EQ_DESC) - 1); } /* called with netif_addr_lock_bh() */ -void bnx2x_set_cl_rx_mode(struct bnx2x *bp, u8 cl_id, - unsigned long rx_mode_flags, - unsigned long accept_flags, - unsigned long ramrod_flags) +int bnx2x_set_q_rx_mode(struct bnx2x *bp, u8 cl_id, + unsigned long rx_mode_flags, + unsigned long rx_accept_flags, + unsigned long tx_accept_flags, + unsigned long ramrod_flags) { struct bnx2x_rx_mode_ramrod_params ramrod_param; int rc; @@ -6407,27 +6306,28 @@ void bnx2x_set_cl_rx_mode(struct bnx2x *bp, u8 cl_id, ramrod_param.ramrod_flags = ramrod_flags; ramrod_param.rx_mode_flags = rx_mode_flags; - ramrod_param.accept_flags = accept_flags; + + ramrod_param.rx_accept_flags = rx_accept_flags; + ramrod_param.tx_accept_flags = tx_accept_flags; rc = bnx2x_config_rx_mode(bp, &ramrod_param); - if (rc) { + if (rc < 0) { BNX2X_ERR("Set rx_mode %d failed\n", bp->rx_mode); - return; + return rc; } + + return 0; } -/* called with netif_addr_lock_bh() */ -void bnx2x_set_storm_rx_mode(struct bnx2x *bp, bool wait) +int bnx2x_fill_accept_flags(struct bnx2x *bp, u32 rx_mode, + unsigned long *rx_accept_flags, + unsigned long *tx_accept_flags) { - unsigned long rx_mode_flags = 0, accept_flags = 0, ramrod_flags = 0; + /* Clear the flags first */ + *rx_accept_flags = 0; + *tx_accept_flags = 0; -#ifdef BCM_CNIC - if (!NO_FCOE(bp)) - /* Configure rx_mode of FCoE Client as well */ - set_bit(BNX2X_RX_MODE_FCOE_ETH, &rx_mode_flags); -#endif - - switch (bp->rx_mode) { + switch (rx_mode) { case BNX2X_RX_MODE_NONE: /* * 'drop all' supersedes any accept flags that may have been @@ -6435,72 +6335,113 @@ void bnx2x_set_storm_rx_mode(struct bnx2x *bp, bool wait) */ break; case BNX2X_RX_MODE_NORMAL: - set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_MULTICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_BROADCAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_UNICAST, rx_accept_flags); + __set_bit(BNX2X_ACCEPT_MULTICAST, rx_accept_flags); + __set_bit(BNX2X_ACCEPT_BROADCAST, rx_accept_flags); + + /* internal switching mode */ + __set_bit(BNX2X_ACCEPT_UNICAST, tx_accept_flags); + __set_bit(BNX2X_ACCEPT_MULTICAST, tx_accept_flags); + __set_bit(BNX2X_ACCEPT_BROADCAST, tx_accept_flags); + break; case BNX2X_RX_MODE_ALLMULTI: -#if defined(__VMKLNX__) +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ /* VMware driver should never call this function for PROMISC, * it should change the PROMISC mode to ALLMULTI at a higher * level */ - set_bit(BNX2X_ACCEPT_UNMATCHED, &accept_flags); + __set_bit(BNX2X_ACCEPT_UNMATCHED, rx_accept_flags); #endif - set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_BROADCAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_UNICAST, rx_accept_flags); + __set_bit(BNX2X_ACCEPT_ALL_MULTICAST, rx_accept_flags); + __set_bit(BNX2X_ACCEPT_BROADCAST, rx_accept_flags); + + /* internal switching mode */ + __set_bit(BNX2X_ACCEPT_UNICAST, tx_accept_flags); + __set_bit(BNX2X_ACCEPT_ALL_MULTICAST, tx_accept_flags); + __set_bit(BNX2X_ACCEPT_BROADCAST, tx_accept_flags); + break; case BNX2X_RX_MODE_PROMISC: /* According to deffinition of SI mode, iface in promisc mode * should receive matched and unmatched (in resolution of port) * unicast packets. */ - if (IS_MF_SI(bp)) { - set_bit(BNX2X_ACCEPT_UNMATCHED, &accept_flags); - set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); - } else - set_bit(BNX2X_ACCEPT_ALL_UNICAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_UNMATCHED, rx_accept_flags); + __set_bit(BNX2X_ACCEPT_UNICAST, rx_accept_flags); + __set_bit(BNX2X_ACCEPT_ALL_MULTICAST, rx_accept_flags); + __set_bit(BNX2X_ACCEPT_BROADCAST, rx_accept_flags); + + /* internal switching mode */ + __set_bit(BNX2X_ACCEPT_ALL_MULTICAST, tx_accept_flags); + __set_bit(BNX2X_ACCEPT_BROADCAST, tx_accept_flags); + + if (IS_MF_SI(bp)) + __set_bit(BNX2X_ACCEPT_ALL_UNICAST, tx_accept_flags); + else + __set_bit(BNX2X_ACCEPT_UNICAST, tx_accept_flags); - set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_BROADCAST, &accept_flags); break; default: - BNX2X_ERR("Unknown rx_mode: %d\n", bp->rx_mode); - return; + BNX2X_ERR("Unknown rx_mode: %d\n", rx_mode); + return -EINVAL; } - if (bp->rx_mode != BNX2X_RX_MODE_NONE) - set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags); + /* Set ACCEPT_ANY_VLAN as we do not enable filtering by VLAN */ + if (rx_mode != BNX2X_RX_MODE_NONE) { + __set_bit(BNX2X_ACCEPT_ANY_VLAN, rx_accept_flags); + __set_bit(BNX2X_ACCEPT_ANY_VLAN, tx_accept_flags); + } - set_bit(RAMROD_RX, &ramrod_flags); - set_bit(RAMROD_TX, &ramrod_flags); + return 0; +} - if (wait) - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); +/* called with netif_addr_lock_bh() */ +void bnx2x_set_storm_rx_mode(struct bnx2x *bp) +{ + unsigned long rx_mode_flags = 0, ramrod_flags = 0; + unsigned long rx_accept_flags = 0, tx_accept_flags = 0; + int rc; +#ifdef BCM_CNIC + if (!NO_FCOE(bp)) +#ifdef BNX2X_ESX_CNA /* ! BNX2X_UPSTREAM */ + /* + * We want to configure the CNA (FCoE) ring to DROP_ALL + * together with all other rings. This is needed to allow safe + * unloading of the FCoE queue in every flow where + * bnx2x_nic_unload() is used. + * + * In cases when bp->rx_mode is different from DROP_ALL we want + * to configure rx_mode of an FCoE ring separately according to + * the value of BNX2X_IS_NETQ_RX_QUEUE_ALLOCATED(fp). + * + * We will add such code both in bnx2x_set_rx_mode() and + * bnx2x_cna_enable/disable() . + */ + if (bp->rx_mode == BNX2X_RX_MODE_NONE) +#endif /* BNX2X_ESX_CNA */ - bnx2x_set_cl_rx_mode(bp, bp->fp->cl_id, rx_mode_flags, accept_flags, - ramrod_flags); + /* Configure rx_mode of FCoE Queue */ + __set_bit(BNX2X_RX_MODE_FCOE_ETH, &rx_mode_flags); +#endif + + rc = bnx2x_fill_accept_flags(bp, bp->rx_mode, &rx_accept_flags, + &tx_accept_flags); + if (rc) + return; + + __set_bit(RAMROD_RX, &ramrod_flags); + __set_bit(RAMROD_TX, &ramrod_flags); + + bnx2x_set_q_rx_mode(bp, bp->fp->cl_id, rx_mode_flags, rx_accept_flags, + tx_accept_flags, ramrod_flags); } static void bnx2x_init_internal_common(struct bnx2x *bp) { int i; - if (!CHIP_IS_E1(bp)) { - - /* xstorm needs to know whether to add ovlan to packets or not, - * in switch-independent we'll write 0 to here... */ - REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNCTION_MODE_OFFSET, - bp->mf_mode); - REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNCTION_MODE_OFFSET, - bp->mf_mode); - REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNCTION_MODE_OFFSET, - bp->mf_mode); - REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNCTION_MODE_OFFSET, - bp->mf_mode); - } - if (IS_MF_SI(bp)) /* * In switch independent mode, the TSTORM needs to accept @@ -6518,26 +6459,11 @@ static void bnx2x_init_internal_common(struct bnx2x *bp) for (i = 0; i < (USTORM_AGG_DATA_SIZE >> 2); i++) REG_WR(bp, BAR_USTRORM_INTMEM + USTORM_AGG_DATA_OFFSET + i * 4, 0); - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_IGU_MODE_OFFSET, CHIP_INT_MODE_IS_BC(bp) ? HC_IGU_BC_MODE : HC_IGU_NBC_MODE); } - -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - if (bp->flags & SAFC_TX_FLAG) { - REG_WR(bp, BAR_TSTRORM_INTMEM + - TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET, 1); - REG_WR(bp, BAR_TSTRORM_INTMEM + - TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET, 10); - REG_WR(bp, MISC_REG_SW_TIMER_VAL + 0xc, 10); - REG_WR(bp, MISC_REG_SW_TIMER_RELOAD_VAL_4, 10); - } -#endif -} -static void bnx2x_init_internal_port(struct bnx2x *bp) -{ - bnx2x_dcb_init_intmem_pfc(bp); } static void bnx2x_init_internal(struct bnx2x *bp, u32 load_code) @@ -6549,13 +6475,14 @@ static void bnx2x_init_internal(struct bnx2x *bp, u32 load_code) /* no break */ case FW_MSG_CODE_DRV_LOAD_PORT: - bnx2x_init_internal_port(bp); + /* nothing to do */ /* no break */ case FW_MSG_CODE_DRV_LOAD_FUNCTION: /* internal memory per function is initialized inside bnx2x_pf_init */ break; + default: BNX2X_ERR("Unknown load_code (0x%x) from MCP\n", load_code); break; @@ -6564,17 +6491,12 @@ static void bnx2x_init_internal(struct bnx2x *bp, u32 load_code) static inline u8 bnx2x_fp_igu_sb_id(struct bnx2x_fastpath *fp) { - return fp->bp->igu_base_sb + fp->index + CNIC_CONTEXT_USE; + return fp->bp->igu_base_sb + fp->index + CNIC_PRESENT; } static inline u8 bnx2x_fp_fw_sb_id(struct bnx2x_fastpath *fp) { - /* For 57710, 57711 start from the first non-default sb and - increment by 1 for the CNIC */ - if (CHIP_IS_E1x(fp->bp)) - return fp->bp->base_fw_ndsb + fp->cl_id + CNIC_CONTEXT_USE; - else /* We want FW SB ID to be the same as IGU SB ID for 57712 */ - return bnx2x_fp_igu_sb_id(fp); + return fp->bp->base_fw_ndsb + fp->index + CNIC_PRESENT; } static inline u8 bnx2x_fp_cl_id(struct bnx2x_fastpath *fp) @@ -6585,93 +6507,70 @@ static inline u8 bnx2x_fp_cl_id(struct bnx2x_fastpath *fp) return bnx2x_fp_igu_sb_id(fp); } -static void bnx2x_init_fp_sb(struct bnx2x *bp, int fp_idx) +void bnx2x_init_eth_fp(struct bnx2x *bp, int fp_idx) { struct bnx2x_fastpath *fp = &bp->fp[fp_idx]; -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - int num_queues, cos; -#endif - fp->state = BNX2X_FP_STATE_CLOSED; + u8 cos; + unsigned long q_type = 0; + u32 cids[BNX2X_MULTI_TX_COS] = { 0 }; + fp->rx_queue = fp_idx; fp->cid = fp_idx; fp->cl_id = bnx2x_fp_cl_id(fp); fp->fw_sb_id = bnx2x_fp_fw_sb_id(fp); fp->igu_sb_id = bnx2x_fp_igu_sb_id(fp); /* qZone id equals to FW (per path) client id */ - fp->cl_qzone_id = bnx2x_fp_cl_qzone_id(fp); + fp->cl_qzone_id = bnx2x_fp_qzone_id(fp); /* init shortcut */ fp->ustorm_rx_prods_offset = bnx2x_rx_ustorm_prods_offset(fp); - /* Setup SB indicies */ + + /* Setup SB indices */ fp->rx_cons_sb = BNX2X_RX_SB_INDEX; - fp->tx_cons_sb = BNX2X_TX_SB_INDEX; - /* Configure classification DBs */ -#ifndef BNX2X_NETQ /* BNX2X_UPSTREAM */ - bnx2x_init_vlan_mac_fp_objs(fp, BNX2X_OBJ_TYPE_RX); -#else - if (fp_idx) - /* netqueue */ - bnx2x_init_vlan_mac_fp_objs(fp, BNX2X_OBJ_TYPE_RX_TX); - else - /* default queue */ - bnx2x_init_vlan_mac_fp_objs(fp, BNX2X_OBJ_TYPE_RX); -#endif + /* Configure Queue State object */ + __set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type); + __set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type); -#ifdef BNX2X_SAFC - num_queues = 0; - for (cos = 0; cos < BNX2X_MAX_COS; cos++) { - if (fp_idx < (num_queues + bp->qs_per_cos[cos])) { - fp->cos = cos; - break; - } else - num_queues += bp->qs_per_cos[cos]; + BUG_ON(fp->max_cos > BNX2X_MULTI_TX_COS); + + /* init tx data */ + for_each_cos_in_tx_queue(fp, cos) { + bnx2x_init_txdata(bp, fp->txdata_ptr[cos], + CID_COS_TO_TX_ONLY_CID(fp->cid, cos, bp), + FP_COS_TO_TXQ(fp, cos, bp), + BNX2X_TX_SB_INDEX_BASE + cos, fp); + cids[cos] = fp->txdata_ptr[cos]->cid; } - DP(NETIF_MSG_IFUP, "queue[%d]: bnx2x_init_sb(%p,%p) " - "cl_id %d fw_sb %d igu_sb %d cos %d\n", - fp_idx, bp, fp->status_blk.e2_sb, fp->cl_id, fp->fw_sb_id, - fp->igu_sb_id, fp->cos); -#else /* BNX2X_UPSTREAM */ - DP(NETIF_MSG_IFUP, "queue[%d]: bnx2x_init_sb(%p,%p) " - "cl_id %d fw_sb %d igu_sb %d\n", + + bnx2x_init_queue_obj(bp, &fp->q_obj, fp->cl_id, cids, fp->max_cos, + BP_FUNC(bp), bnx2x_sp(bp, q_rdata), + bnx2x_sp_mapping(bp, q_rdata), q_type); + + /** + * Configure classification DBs: Always enable Tx switching + */ + bnx2x_init_vlan_mac_fp_objs(fp, BNX2X_OBJ_TYPE_RX_TX); + + DP(NETIF_MSG_IFUP, "queue[%d]: bnx2x_init_sb(%p,%p) cl_id %d fw_sb %d igu_sb %d\n", fp_idx, bp, fp->status_blk.e2_sb, fp->cl_id, fp->fw_sb_id, fp->igu_sb_id); -#endif bnx2x_init_sb(bp, fp->status_blk_mapping, BNX2X_VF_ID_INVALID, false, fp->fw_sb_id, fp->igu_sb_id); bnx2x_update_fpsb_idx(fp); } -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ -static void bnx2x_init_cos_map(struct bnx2x *bp) -{ - int cos, i; - - for (cos = 0; cos < BNX2X_MAX_COS; cos++) { - bp->cos_map[cos] = 0; - for_each_queue(bp, i) { - /* take the 1st queue that belongs to this cos */ - if (bp->fp[i].cos == cos) { - bp->cos_map[cos] = i; - break; - } - } - } -} -#endif /* BNX2X_SAFC */ - void bnx2x_nic_init(struct bnx2x *bp, u32 load_code) { int i; - /* Setup status blocks */ for_each_eth_queue(bp, i) - bnx2x_init_fp_sb(bp, i); - + bnx2x_init_eth_fp(bp, i); #ifdef BCM_CNIC if (!NO_FCOE(bp)) bnx2x_init_fcoe_fp(bp); +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ if (!NO_ISCSI_OOO(bp)) { bnx2x_init_fwd_fp(bp); bnx2x_init_ooo_fp(bp); @@ -6680,18 +6579,20 @@ void bnx2x_nic_init(struct bnx2x *bp, u32 load_code) /* Init CNIC SB here, before we send INIT ramrods for OOO * and FWD clients. */ +#endif bnx2x_init_sb(bp, bp->cnic_sb_mapping, BNX2X_VF_ID_INVALID, false, bnx2x_cnic_fw_sb_id(bp), bnx2x_cnic_igu_sb_id(bp)); #endif + /* Initialize MOD_ABS interrupts */ + bnx2x_init_mod_abs_int(bp, &bp->link_vars, bp->common.chip_id, + bp->common.shmem_base, bp->common.shmem2_base, + BP_PORT(bp)); /* ensure status block indices were read */ rmb(); -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - bnx2x_init_cos_map(bp); -#endif bnx2x_init_def_sb(bp); bnx2x_update_dsb_idx(bp); bnx2x_init_rx_rings(bp); @@ -6702,9 +6603,6 @@ void bnx2x_nic_init(struct bnx2x *bp, u32 load_code) bnx2x_pf_init(bp); bnx2x_stats_init(bp); - /* At this point, we are ready for interrupts */ - atomic_set(&bp->intr_sem, 0); - /* flush all before enabling interrupts */ mb(); mmiowb(); @@ -6739,8 +6637,7 @@ static int bnx2x_gunzip_init(struct bnx2x *bp) if (bp->strm == NULL) goto gunzip_nomem2; - bp->strm->workspace = kmalloc(zlib_inflate_workspacesize(), - GFP_KERNEL); + bp->strm->workspace = vmalloc(zlib_inflate_workspacesize()); if (bp->strm->workspace == NULL) goto gunzip_nomem3; @@ -6756,19 +6653,18 @@ gunzip_nomem2: #else pci_free_consistent(bp->pdev, FW_BUF_SIZE, bp->gunzip_buf, #endif - bp->gunzip_mapping); + bp->gunzip_mapping); bp->gunzip_buf = NULL; gunzip_nomem1: - netdev_err(bp->dev, "Cannot allocate firmware buffer for" - " un-compression\n"); + BNX2X_ERR("Cannot allocate firmware buffer for un-compression\n"); return -ENOMEM; } static void bnx2x_gunzip_end(struct bnx2x *bp) { - if(bp->strm) { - kfree(bp->strm->workspace); + if (bp->strm) { + vfree(bp->strm->workspace); kfree(bp->strm); bp->strm = NULL; } @@ -6779,7 +6675,7 @@ static void bnx2x_gunzip_end(struct bnx2x *bp) #else pci_free_consistent(bp->pdev, FW_BUF_SIZE, bp->gunzip_buf, #endif - bp->gunzip_mapping); + bp->gunzip_mapping); bp->gunzip_buf = NULL; } } @@ -6817,8 +6713,8 @@ static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len) bp->gunzip_outlen = (FW_BUF_SIZE - bp->strm->avail_out); if (bp->gunzip_outlen & 0x3) - netdev_err(bp->dev, "Firmware decompression error:" - " gunzip_outlen (%d) not aligned\n", + netdev_err(bp->dev, + "Firmware decompression error: gunzip_outlen (%d) not aligned\n", bp->gunzip_outlen); bp->gunzip_outlen >>= 2; @@ -6871,8 +6767,6 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) else factor = 1; - DP(NETIF_MSG_HW, "start part1\n"); - /* Disable inputs of parser neighbor blocks */ REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x0); REG_WR(bp, TCM_REG_PRS_IFEN, 0x0); @@ -6923,8 +6817,8 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) msleep(50); REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0x03); msleep(50); - bnx2x_init_block(bp, BRB1_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, PRS_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_BRB1, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_PRS, PHASE_COMMON); DP(NETIF_MSG_HW, "part2\n"); @@ -6988,8 +6882,8 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) msleep(50); REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0x03); msleep(50); - bnx2x_init_block(bp, BRB1_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, PRS_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_BRB1, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_PRS, PHASE_COMMON); #ifndef BCM_CNIC /* set NIC mode */ REG_WR(bp, PRS_REG_NIC_MODE, 1); @@ -7006,10 +6900,12 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) return 0; /* OK */ } -static void enable_blocks_attention(struct bnx2x *bp) +static void bnx2x_enable_blocks_attention(struct bnx2x *bp) { + u32 val; + REG_WR(bp, PXP_REG_PXP_INT_MASK_0, 0); - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) REG_WR(bp, PXP_REG_PXP_INT_MASK_1, 0x40); else REG_WR(bp, PXP_REG_PXP_INT_MASK_1, 0); @@ -7041,17 +6937,14 @@ static void enable_blocks_attention(struct bnx2x *bp) /* REG_WR(bp, CSEM_REG_CSEM_INT_MASK_0, 0); */ /* REG_WR(bp, CSEM_REG_CSEM_INT_MASK_1, 0); */ - if (CHIP_REV_IS_FPGA(bp)) - REG_WR(bp, PXP2_REG_PXP2_INT_MASK_0, 0x580000); - else if (CHIP_IS_E2(bp)) - REG_WR(bp, PXP2_REG_PXP2_INT_MASK_0, - (PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_OF - | PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_AFT - | PXP2_PXP2_INT_MASK_0_REG_PGL_PCIE_ATTN - | PXP2_PXP2_INT_MASK_0_REG_PGL_READ_BLOCKED - | PXP2_PXP2_INT_MASK_0_REG_PGL_WRITE_BLOCKED)); - else - REG_WR(bp, PXP2_REG_PXP2_INT_MASK_0, 0x480000); + val = PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_AFT | + PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_OF | + PXP2_PXP2_INT_MASK_0_REG_PGL_PCIE_ATTN; + if (!CHIP_IS_E1x(bp)) + val |= PXP2_PXP2_INT_MASK_0_REG_PGL_READ_BLOCKED | + PXP2_PXP2_INT_MASK_0_REG_PGL_WRITE_BLOCKED; + REG_WR(bp, PXP2_REG_PXP2_INT_MASK_0, val); + REG_WR(bp, TSDM_REG_TSDM_INT_MASK_0, 0); REG_WR(bp, TSDM_REG_TSDM_INT_MASK_1, 0); REG_WR(bp, TCM_REG_TCM_INT_MASK, 0); @@ -7064,72 +6957,29 @@ static void enable_blocks_attention(struct bnx2x *bp) REG_WR(bp, CDU_REG_CDU_INT_MASK, 0); REG_WR(bp, DMAE_REG_DMAE_INT_MASK, 0); /* REG_WR(bp, MISC_REG_MISC_INT_MASK, 0); */ - REG_WR(bp, PBF_REG_PBF_INT_MASK, 0X18); /* bit 3,4 masked */ + REG_WR(bp, PBF_REG_PBF_INT_MASK, 0x18); /* bit 3,4 masked */ } -static const struct { - u32 addr; - u32 mask; -} bnx2x_parity_mask[] = { - /* bit 19 masked */ - /* REG_WR(bp, PXP_REG_PXP_PRTY_MASK, 0x80000); */ - /* bit 5,18,20-31 */ - /* REG_WR(bp, PXP2_REG_PXP2_PRTY_MASK_0, 0xfff40020); */ - /* bit 5 */ - /* REG_WR(bp, PXP2_REG_PXP2_PRTY_MASK_1, 0x20); */ - /* REG_WR(bp, HC_REG_HC_PRTY_MASK, 0x0); */ - /* REG_WR(bp, MISC_REG_MISC_PRTY_MASK, 0x0); */ - - /* Block IGU, MISC, PXP and PXP2 parity errors as long as we don't - * want to handle "system kill" flow at the moment. - */ - {PXP_REG_PXP_PRTY_MASK, 0x3ffffff}, - {PXP2_REG_PXP2_PRTY_MASK_0, 0xffffffff}, - {PXP2_REG_PXP2_PRTY_MASK_1, 0x7f}, - {HC_REG_HC_PRTY_MASK, 0x7}, - {MISC_REG_MISC_PRTY_MASK, 0x1}, - {QM_REG_QM_PRTY_MASK, 0x0}, - {DORQ_REG_DORQ_PRTY_MASK, 0x0}, - {GRCBASE_UPB + PB_REG_PB_PRTY_MASK, 0x0}, - {GRCBASE_XPB + PB_REG_PB_PRTY_MASK, 0x0}, - {SRC_REG_SRC_PRTY_MASK, 0x4}, /* bit 2 */ - {CDU_REG_CDU_PRTY_MASK, 0x0}, - {CFC_REG_CFC_PRTY_MASK, 0x0}, - {DBG_REG_DBG_PRTY_MASK, 0x0}, - {DMAE_REG_DMAE_PRTY_MASK, 0x0}, - {BRB1_REG_BRB1_PRTY_MASK, 0x0}, - {PRS_REG_PRS_PRTY_MASK, (1<<6)},/* bit 6 */ - {TSDM_REG_TSDM_PRTY_MASK, 0x18}, /* bit 3,4 */ - {CSDM_REG_CSDM_PRTY_MASK, 0x8}, /* bit 3 */ - {USDM_REG_USDM_PRTY_MASK, 0x38}, /* bit 3,4,5 */ - {XSDM_REG_XSDM_PRTY_MASK, 0x8}, /* bit 3 */ - {TSEM_REG_TSEM_PRTY_MASK_0, 0x0}, - {TSEM_REG_TSEM_PRTY_MASK_1, 0x0}, - {USEM_REG_USEM_PRTY_MASK_0, 0x0}, - {USEM_REG_USEM_PRTY_MASK_1, 0x0}, - {CSEM_REG_CSEM_PRTY_MASK_0, 0x0}, - {CSEM_REG_CSEM_PRTY_MASK_1, 0x0}, - {XSEM_REG_XSEM_PRTY_MASK_0, 0x0}, - {XSEM_REG_XSEM_PRTY_MASK_1, 0x0} -}; - -static void enable_blocks_parity(struct bnx2x *bp) -{ - int i, mask_arr_len = - sizeof(bnx2x_parity_mask)/(sizeof(bnx2x_parity_mask[0])); - - for (i = 0; i < mask_arr_len; i++) - REG_WR(bp, bnx2x_parity_mask[i].addr, - bnx2x_parity_mask[i].mask); -} - - static void bnx2x_reset_common(struct bnx2x *bp) { + u32 val = 0x1400; + /* reset_common */ REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR, 0xd3ffff7f); - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403); + + if (CHIP_IS_E3(bp)) { + val |= MISC_REGISTERS_RESET_REG_2_MSTAT0; + val |= MISC_REGISTERS_RESET_REG_2_MSTAT1; + } + + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, val); +} + +static void bnx2x_setup_dmae(struct bnx2x *bp) +{ + bp->dmae_ready = 0; + spin_lock_init(&bp->dmae_lock); } static void bnx2x_init_pxp(struct bnx2x *bp) @@ -7138,7 +6988,7 @@ static void bnx2x_init_pxp(struct bnx2x *bp) int r_order, w_order; pci_read_config_word(bp->pdev, - bp->pcie_cap + PCI_EXP_DEVCTL, &devctl); + pci_pcie_cap(bp->pdev) + PCI_EXP_DEVCTL, &devctl); DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl); w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5); if (bp->mrrs == -1) @@ -7188,22 +7038,21 @@ static void bnx2x_setup_fan_failure_detection(struct bnx2x *bp) return; /* Fan failure is indicated by SPIO 5 */ - bnx2x_set_spio(bp, MISC_REGISTERS_SPIO_5, - MISC_REGISTERS_SPIO_INPUT_HI_Z); + bnx2x_set_spio(bp, MISC_SPIO_SPIO5, MISC_SPIO_INPUT_HI_Z); /* set to active low mode */ val = REG_RD(bp, MISC_REG_SPIO_INT); - val |= ((1 << MISC_REGISTERS_SPIO_5) << - MISC_REGISTERS_SPIO_INT_OLD_SET_POS); + val |= (MISC_SPIO_SPIO5 << MISC_SPIO_INT_OLD_SET_POS); REG_WR(bp, MISC_REG_SPIO_INT, val); /* enable interrupt to signal the IGU */ val = REG_RD(bp, MISC_REG_SPIO_EVENT_EN); - val |= (1 << MISC_REGISTERS_SPIO_5); + val |= MISC_SPIO_SPIO5; REG_WR(bp, MISC_REG_SPIO_EVENT_EN, val); } -static void bnx2x_pretend_func(struct bnx2x *bp, u8 pretend_func_num) { +static void bnx2x_pretend_func(struct bnx2x *bp, u8 pretend_func_num) +{ u32 offset = 0; if (CHIP_IS_E1(bp)) @@ -7240,44 +7089,85 @@ static void bnx2x_pretend_func(struct bnx2x *bp, u8 pretend_func_num) { return; } - REG_WR(bp, offset, pretend_func_num ); + REG_WR(bp, offset, pretend_func_num); REG_RD(bp, offset); DP(NETIF_MSG_HW, "Pretending to func %d\n", pretend_func_num); } -static void bnx2x_pf_disable(struct bnx2x *bp) { +void bnx2x_pf_disable(struct bnx2x *bp) +{ u32 val = REG_RD(bp, IGU_REG_PF_CONFIGURATION); val &= ~IGU_PF_CONF_FUNC_EN; REG_WR(bp, IGU_REG_PF_CONFIGURATION, val); REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0); - REG_WR(bp, CFC_REG_WEAK_ENABLE_PF,0); + REG_WR(bp, CFC_REG_WEAK_ENABLE_PF, 0); } -static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) +static inline void bnx2x__common_init_phy(struct bnx2x *bp) +{ + u32 shmem_base[2], shmem2_base[2]; + shmem_base[0] = bp->common.shmem_base; + shmem2_base[0] = bp->common.shmem2_base; + if (!CHIP_IS_E1x(bp)) { + shmem_base[1] = + SHMEM2_RD(bp, other_shmem_base_addr); + shmem2_base[1] = + SHMEM2_RD(bp, other_shmem2_base_addr); + } + bnx2x_acquire_phy_lock(bp); + bnx2x_common_init_phy(bp, shmem_base, shmem2_base, + bp->common.chip_id, 0); + bnx2x_release_phy_lock(bp); +} + +/** + * bnx2x_init_hw_common - initialize the HW at the COMMON phase. + * + * @bp: driver handle + */ +static int bnx2x_init_hw_common(struct bnx2x *bp) { u32 val; - int i; - DP(BNX2X_MSG_MCP, "starting common init func %d\n", BP_ABS_FUNC(bp)); + DP(NETIF_MSG_HW, "starting common init func %d\n", BP_ABS_FUNC(bp)); + + /* + * take the RESET lock to protect undi_unload flow from accessing + * registers while we are resetting the chip + */ + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RESET); bnx2x_reset_common(bp); REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff); - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, 0xfffc); - bnx2x_init_block(bp, MISC_BLOCK, COMMON_STAGE); - if (!CHIP_IS_E1(bp)) - REG_WR(bp, MISC_REG_E1HMF_MODE, IS_MF(bp)); + val = 0xfffc; + if (CHIP_IS_E3(bp)) { + val |= MISC_REGISTERS_RESET_REG_2_MSTAT0; + val |= MISC_REGISTERS_RESET_REG_2_MSTAT1; + } + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, val); - if (CHIP_IS_E2(bp)) { + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESET); + + bnx2x_init_block(bp, BLOCK_MISC, PHASE_COMMON); + + if (!CHIP_IS_E1x(bp)) { u8 abs_func_id; - /* 4-port mode or 2-port mode we need to turn of master-enable for everyone, after that, turn it back on for self. - * so, we disregard multi-function or not, and always disable for all functions on the given path, this means 0,2,4,6 for - * path 0 and 1,3,5,7 for path 1 */ - for (abs_func_id = BP_PATH(bp); abs_func_id < E2_FUNC_MAX*2; abs_func_id+=2) { + /** + * 4-port mode or 2-port mode we need to turn of master-enable + * for everyone, after that, turn it back on for self. + * so, we disregard multi-function or not, and always disable + * for all functions on the given path, this means 0,2,4,6 for + * path 0 and 1,3,5,7 for path 1 + */ + for (abs_func_id = BP_PATH(bp); + abs_func_id < E2_FUNC_MAX*2; abs_func_id += 2) { if (abs_func_id == BP_ABS_FUNC(bp)) { - REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 1); + REG_WR(bp, + PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, + 1); continue; } @@ -7286,17 +7176,16 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) bnx2x_pf_disable(bp); bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); } - } - bnx2x_init_block(bp, PXP_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_PXP, PHASE_COMMON); if (CHIP_IS_E1(bp)) { /* enable HW interrupt from PXP on USDM overflow bit 16 on INT_MASK_0 */ REG_WR(bp, PXP_REG_PXP_INT_MASK_0, 0); } - bnx2x_init_block(bp, PXP2_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_PXP2, PHASE_COMMON); bnx2x_init_pxp(bp); #ifdef __BIG_ENDIAN @@ -7339,7 +7228,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) * This needs to be done by the first PF that is loaded in a path * (i.e. common phase) */ - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { /* In E2 there is a bug in the timers block that can cause function 6 / 7 * (i.e. vnic3) to start even if it is marked as "scan-off". * This occurs when a different function (func2,3) is being marked @@ -7374,7 +7263,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) * queues with "old" ILT addresses. * c. PF enable in the PGLC. * d. Clear the was_error of the PF in the PGLC. (could have - * occured while driver was down) + * occurred while driver was down) * e. PF enable in the CFC (WEAK + STRONG) * f. Timers scan enable * 3. PF driver unload flow: @@ -7407,7 +7296,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) memset(&ilt_cli, 0, sizeof(struct ilt_client_info)); memset(&ilt, 0, sizeof(struct bnx2x_ilt)); - /* initalize dummy TM client */ + /* initialize dummy TM client */ ilt_cli.start = 0; ilt_cli.end = ILT_NUM_PAGE_ENTRIES - 1; ilt_cli.client_num = ILT_CLIENT_TM; @@ -7415,7 +7304,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) /* Step 1: set zeroes to all ilt page entries with valid bit on * Step 2: set the timers first/last ilt entry to point * to the entire range to prevent ILT range error for 3rd/4th - * vnic (this code assumes existance of the vnic) + * vnic (this code assumes existence of the vnic) * * both steps performed by call to bnx2x_ilt_client_init_op() * with dummy TM client @@ -7427,26 +7316,27 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) bnx2x_ilt_client_init_op_ilt(bp, &ilt, &ilt_cli, INITOP_CLEAR); bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); - REG_WR(bp,PXP2_REG_RQ_DRAM_ALIGN, BNX2X_PXP_DRAM_ALIGN); - REG_WR(bp,PXP2_REG_RQ_DRAM_ALIGN_RD, BNX2X_PXP_DRAM_ALIGN); - REG_WR(bp,PXP2_REG_RQ_DRAM_ALIGN_SEL, 1); + REG_WR(bp, PXP2_REG_RQ_DRAM_ALIGN, BNX2X_PXP_DRAM_ALIGN); + REG_WR(bp, PXP2_REG_RQ_DRAM_ALIGN_RD, BNX2X_PXP_DRAM_ALIGN); + REG_WR(bp, PXP2_REG_RQ_DRAM_ALIGN_SEL, 1); } REG_WR(bp, PXP2_REG_RQ_DISABLE_INPUTS, 0); REG_WR(bp, PXP2_REG_RD_DISABLE_INPUTS, 0); - if (CHIP_IS_E2(bp)) { - int factor = CHIP_REV_IS_EMUL(bp) ? 1000 : (CHIP_REV_IS_FPGA(bp) ? 400:0); - bnx2x_init_block(bp, PGLUE_B_BLOCK, COMMON_STAGE); + if (!CHIP_IS_E1x(bp)) { + int factor = CHIP_REV_IS_EMUL(bp) ? 1000 : + (CHIP_REV_IS_FPGA(bp) ? 400 : 0); + bnx2x_init_block(bp, BLOCK_PGLUE_B, PHASE_COMMON); - bnx2x_init_block(bp, ATC_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_ATC, PHASE_COMMON); /* let the HW do it's magic ... */ - do{ + do { msleep(200); val = REG_RD(bp, ATC_REG_ATC_INIT_DONE); - }while (factor-- && val!=1); + } while (factor-- && (val != 1)); if (val != 1) { BNX2X_ERR("ATC_INIT failed\n"); @@ -7454,35 +7344,30 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) } } - bnx2x_init_block(bp, DMAE_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_DMAE, PHASE_COMMON); #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ bnx2x_iov_init_dmae(bp); #endif /* clean the DMAE memory */ bp->dmae_ready = 1; - bnx2x_init_fill(bp, TSEM_REG_PRAM, 0, 8); + bnx2x_init_fill(bp, TSEM_REG_PRAM, 0, 8, 1); - bnx2x_init_block(bp, TCM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, UCM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, CCM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, XCM_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_TCM, PHASE_COMMON); + + bnx2x_init_block(bp, BLOCK_UCM, PHASE_COMMON); + + bnx2x_init_block(bp, BLOCK_CCM, PHASE_COMMON); + + bnx2x_init_block(bp, BLOCK_XCM, PHASE_COMMON); bnx2x_read_dmae(bp, XSEM_REG_PASSIVE_BUFFER, 3); bnx2x_read_dmae(bp, CSEM_REG_PASSIVE_BUFFER, 3); bnx2x_read_dmae(bp, TSEM_REG_PASSIVE_BUFFER, 3); bnx2x_read_dmae(bp, USEM_REG_PASSIVE_BUFFER, 3); - bnx2x_init_block(bp, QM_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_QM, PHASE_COMMON); - if (CHIP_MODE_IS_4_PORT(bp)) - bnx2x_init_block(bp, QM_4PORT_BLOCK, COMMON_STAGE); - -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - if (bnx2x_is_safc_multi_mode(bp)) - REG_WR(bp, QM_REG_BYTECRDINITVAL, 0x5dc0); - -#endif /* QM queues pointers table */ bnx2x_qm_init_ptr_table(bp, bp->qm_cid_count, INITOP_SET); @@ -7492,55 +7377,47 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) REG_WR(bp, QM_REG_SOFT_RESET, 0); #ifdef BCM_CNIC - bnx2x_init_block(bp, TIMERS_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_TM, PHASE_COMMON); #endif - bnx2x_init_block(bp, DQ_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_DORQ, PHASE_COMMON); REG_WR(bp, DORQ_REG_DPM_CID_OFST, BNX2X_DB_SHIFT); - if (!CHIP_REV_IS_SLOW(bp)) { + if (!CHIP_REV_IS_SLOW(bp)) /* enable hw interrupt from doorbell Q */ REG_WR(bp, DORQ_REG_DORQ_INT_MASK, 0); - } - bnx2x_init_block(bp, BRB1_BLOCK, COMMON_STAGE); - if (CHIP_MODE_IS_4_PORT(bp)) { - REG_WR(bp, BRB1_REG_FULL_LB_XOFF_THRESHOLD, 248); - REG_WR(bp, BRB1_REG_FULL_LB_XON_THRESHOLD, 328); - } + bnx2x_init_block(bp, BLOCK_BRB1, PHASE_COMMON); - bnx2x_init_block(bp, PRS_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_PRS, PHASE_COMMON); REG_WR(bp, PRS_REG_A_PRSU_20, 0xf); -#ifdef BNX2X_SAFC - if (!CHIP_IS_E1(bp)) { - val = (IS_MF_SD(bp) || - (bp->multi_mode == ETH_RSS_MODE_E1HOV_PRI)) ? 1 : 0; - REG_WR(bp, PRS_REG_E1HOV_MODE, val); - } -#else /* BNX2X_UPSTREAM */ if (!CHIP_IS_E1(bp)) - REG_WR(bp, PRS_REG_E1HOV_MODE, IS_MF_SD(bp)); -#endif + REG_WR(bp, PRS_REG_E1HOV_MODE, bp->path_has_ovlan); - if (CHIP_IS_E2(bp)) { - /* Bit-map indicating which L2 hdrs may appear after the - basic Ethernet header */ - int has_ovlan = IS_MF_SD(bp); - REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC, (has_ovlan ? 7 : 6)); - REG_WR(bp, PRS_REG_MUST_HAVE_HDRS, (has_ovlan ? 1 : 0)); + if (!CHIP_IS_E1x(bp) && !CHIP_IS_E3B0(bp)) { + if (IS_MF_AFEX(bp)) { + /* configure that VNTag and VLAN headers must be + * received in afex mode + */ + REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC, 0xE); + REG_WR(bp, PRS_REG_MUST_HAVE_HDRS, 0xA); + REG_WR(bp, PRS_REG_HDRS_AFTER_TAG_0, 0x6); + REG_WR(bp, PRS_REG_TAG_ETHERTYPE_0, 0x8926); + REG_WR(bp, PRS_REG_TAG_LEN_0, 0x4); + } else + /* Bit-map indicating which L2 hdrs may appear + * after the basic Ethernet header + */ + REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC, + bp->path_has_ovlan ? 7 : 6); } - bnx2x_init_block(bp, TSDM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, CSDM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, USDM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, XSDM_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_TSDM, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_CSDM, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_USDM, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_XSDM, PHASE_COMMON); - bnx2x_init_fill(bp, TSEM_REG_FAST_MEMORY, 0, STORM_INTMEM_SIZE(bp)); - bnx2x_init_fill(bp, USEM_REG_FAST_MEMORY, 0, STORM_INTMEM_SIZE(bp)); - bnx2x_init_fill(bp, CSEM_REG_FAST_MEMORY, 0, STORM_INTMEM_SIZE(bp)); - bnx2x_init_fill(bp, XSEM_REG_FAST_MEMORY, 0, STORM_INTMEM_SIZE(bp)); - - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { /* reset VFC memories */ REG_WR(bp, TSEM_REG_FAST_MEMORY + VFC_REG_MEMORIES_RST, VFC_MEMORIES_RST_REG_CAM_RST | @@ -7549,16 +7426,13 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) VFC_MEMORIES_RST_REG_CAM_RST | VFC_MEMORIES_RST_REG_RAM_RST); - msleep(10); + msleep(20); } - bnx2x_init_block(bp, TSEM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, USEM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, CSEM_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, XSEM_BLOCK, COMMON_STAGE); - - if (CHIP_MODE_IS_4_PORT(bp)) - bnx2x_init_block(bp, XSEM_4PORT_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_TSEM, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_USEM, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_CSEM, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_XSEM, PHASE_COMMON); /* sync semi rtc */ REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR, @@ -7566,21 +7440,29 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0x80000000); - bnx2x_init_block(bp, UPB_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, XPB_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, PBF_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_UPB, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_XPB, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_PBF, PHASE_COMMON); - if (CHIP_IS_E2(bp)) { - int has_ovlan = IS_MF_SD(bp); - REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC, (has_ovlan ? 7 : 6)); - REG_WR(bp, PBF_REG_MUST_HAVE_HDRS, (has_ovlan ? 1 : 0)); + if (!CHIP_IS_E1x(bp)) { + if (IS_MF_AFEX(bp)) { + /* configure that VNTag and VLAN headers must be + * sent in afex mode + */ + REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC, 0xE); + REG_WR(bp, PBF_REG_MUST_HAVE_HDRS, 0xA); + REG_WR(bp, PBF_REG_HDRS_AFTER_TAG_0, 0x6); + REG_WR(bp, PBF_REG_TAG_ETHERTYPE_0, 0x8926); + REG_WR(bp, PBF_REG_TAG_LEN_0, 0x4); + } else + REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC, + bp->path_has_ovlan ? 7 : 6); } REG_WR(bp, SRC_REG_SOFT_RST, 1); - for (i = SRC_REG_KEYRSS0_0; i <= SRC_REG_KEYRSS1_9; i += 4) - REG_WR(bp, i, random32()); - bnx2x_init_block(bp, SRCH_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_SRC, PHASE_COMMON); + #ifdef BCM_CNIC REG_WR(bp, SRC_REG_KEYSEARCH_0, 0x63285672); REG_WR(bp, SRC_REG_KEYSEARCH_1, 0x24b8f2cc); @@ -7597,15 +7479,15 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) if (sizeof(union cdu_context) != 1024) /* we currently assume that a context is 1024 bytes */ - dev_alert(&bp->pdev->dev, "please adjust the size " - "of cdu_context(%ld)\n", - (long)sizeof(union cdu_context)); + dev_alert(&bp->pdev->dev, + "please adjust the size of cdu_context(%ld)\n", + (long)sizeof(union cdu_context)); - bnx2x_init_block(bp, CDU_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_CDU, PHASE_COMMON); val = (4 << 24) + (0 << 12) + 1024; REG_WR(bp, CDU_REG_CDU_GLOBAL_PARAMS, val); - bnx2x_init_block(bp, CFC_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_CFC, PHASE_COMMON); REG_WR(bp, CFC_REG_INIT_REG, 0x7FF); /* enable context validation interrupt from CFC */ REG_WR(bp, CFC_REG_CFC_INT_MASK, 0); @@ -7613,20 +7495,19 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) /* set the thresholds to prevent CFC/CDU race */ REG_WR(bp, CFC_REG_DEBUG0, 0x20020000); - bnx2x_init_block(bp, HC_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_HC, PHASE_COMMON); - if (CHIP_IS_E2(bp) && BP_NOMCP(bp)) + if (!CHIP_IS_E1x(bp) && BP_NOMCP(bp)) REG_WR(bp, IGU_REG_RESET_MEMORIES, 0x36); - bnx2x_init_block(bp, IGU_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, MISC_AEU_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_IGU, PHASE_COMMON); + bnx2x_init_block(bp, BLOCK_MISC_AEU, PHASE_COMMON); - bnx2x_init_block(bp, PXPCS_BLOCK, COMMON_STAGE); /* Reset PCIE errors for debug */ REG_WR(bp, 0x2814, 0xffffffff); REG_WR(bp, 0x3820, 0xffffffff); - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { REG_WR(bp, PCICFG_OFFSET + PXPCS_TL_CONTROL_5, (PXPCS_TL_CONTROL_5_ERR_UNSPPORT1 | PXPCS_TL_CONTROL_5_ERR_UNSPPORT)); @@ -7640,21 +7521,15 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) PXPCS_TL_FUNC678_STAT_ERR_UNSPPORT5)); } - bnx2x_init_block(bp, EMAC0_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, EMAC1_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, DBU_BLOCK, COMMON_STAGE); - bnx2x_init_block(bp, DBG_BLOCK, COMMON_STAGE); - - bnx2x_init_block(bp, NIG_BLOCK, COMMON_STAGE); + bnx2x_init_block(bp, BLOCK_NIG, PHASE_COMMON); if (!CHIP_IS_E1(bp)) { - REG_WR(bp, NIG_REG_LLH_MF_MODE, IS_MF(bp)); + /* in E3 this done in per-port section */ + if (!CHIP_IS_E3(bp)) + REG_WR(bp, NIG_REG_LLH_MF_MODE, IS_MF(bp)); + } + if (CHIP_IS_E1H(bp)) + /* not applicable for E2 (and above ...) */ REG_WR(bp, NIG_REG_LLH_E1HOV_MODE, IS_MF_SD(bp)); - } - if (CHIP_IS_E2(bp)) { - /* Bit-map indicating which L2 hdrs may appear after the - basic Ethernet header */ - REG_WR(bp, NIG_REG_P0_HDRS_AFTER_BASIC, (IS_MF_SD(bp) ? 7 : 6)); - } if (CHIP_REV_IS_SLOW(bp)) msleep(200); @@ -7677,8 +7552,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) } REG_WR(bp, CFC_REG_DEBUG0, 0); - if (CHIP_IS_E1(bp)) - { + if (CHIP_IS_E1(bp)) { /* read NIG statistic to see if this is our first up since powerup */ bnx2x_read_dmae(bp, NIG_REG_STAT2_BRB_OCTET, 2); @@ -7691,149 +7565,158 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) } } - bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, - bp->common.shmem_base, - bp->common.shmem2_base); - bnx2x_setup_fan_failure_detection(bp); /* clear PXP2 attentions */ REG_RD(bp, PXP2_REG_PXP2_INT_STS_CLR_0); - enable_blocks_attention(bp); - if (CHIP_PARITY_SUPPORTED(bp)) - enable_blocks_parity(bp); + bnx2x_enable_blocks_attention(bp); +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + if (!CHIP_REV_IS_SLOW(bp)) +#endif + bnx2x_enable_blocks_parity(bp); if (!BP_NOMCP(bp)) { - /* In E2 2-PORT mode, same ext phy is used for the two paths */ - if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) || - CHIP_IS_E1x(bp)) { - u32 shmem_base[2], shmem2_base[2]; - shmem_base[0] = bp->common.shmem_base; - shmem2_base[0] = bp->common.shmem2_base; - if (CHIP_IS_E2(bp)) { - shmem_base[1] = - SHMEM2_RD(bp, other_shmem_base_addr); - shmem2_base[1] = - SHMEM2_RD(bp, other_shmem2_base_addr); - } - bnx2x_acquire_phy_lock(bp); - bnx2x_common_init_phy(bp, shmem_base, shmem2_base, - bp->common.chip_id); - bnx2x_release_phy_lock(bp); - } + if (CHIP_IS_E1x(bp)) + bnx2x__common_init_phy(bp); } else BNX2X_ERR("Bootcode is missing - can not initialize link\n"); return 0; } +/** + * bnx2x_init_hw_common_chip - init HW at the COMMON_CHIP phase. + * + * @bp: driver handle + */ +static int bnx2x_init_hw_common_chip(struct bnx2x *bp) +{ + int rc = bnx2x_init_hw_common(bp); + + if (rc) + return rc; + + /* In E2 2-PORT mode, same ext phy is used for the two paths */ + if (!BP_NOMCP(bp)) + bnx2x__common_init_phy(bp); + + return 0; +} + static int bnx2x_init_hw_port(struct bnx2x *bp) { int port = BP_PORT(bp); - int init_stage = port ? PORT1_STAGE : PORT0_STAGE; + int init_phase = port ? PHASE_PORT1 : PHASE_PORT0; u32 low, high; u32 val; -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - int i; -#endif - DP(BNX2X_MSG_MCP, "starting port init port %d\n", port); + bnx2x__link_reset(bp); + + DP(NETIF_MSG_HW, "starting port init port %d\n", port); REG_WR(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 0); - bnx2x_init_block(bp, PXP_BLOCK, init_stage); - bnx2x_init_block(bp, PXP2_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_MISC, init_phase); + bnx2x_init_block(bp, BLOCK_PXP, init_phase); + bnx2x_init_block(bp, BLOCK_PXP2, init_phase); /* Timers bug workaround: disables the pf_master bit in pglue at * common phase, we need to enable it here before any dmae access are * attempted. Therefore we manually added the enable-master to the * port phase (it also happens in the function phase) */ - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 1); - bnx2x_init_block(bp, TCM_BLOCK, init_stage); - bnx2x_init_block(bp, UCM_BLOCK, init_stage); - bnx2x_init_block(bp, CCM_BLOCK, init_stage); - bnx2x_init_block(bp, XCM_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_ATC, init_phase); + bnx2x_init_block(bp, BLOCK_DMAE, init_phase); + bnx2x_init_block(bp, BLOCK_PGLUE_B, init_phase); + bnx2x_init_block(bp, BLOCK_QM, init_phase); + + bnx2x_init_block(bp, BLOCK_TCM, init_phase); + bnx2x_init_block(bp, BLOCK_UCM, init_phase); + bnx2x_init_block(bp, BLOCK_CCM, init_phase); + bnx2x_init_block(bp, BLOCK_XCM, init_phase); /* QM cid (connection) count */ bnx2x_qm_init_cid_count(bp, bp->qm_cid_count, INITOP_SET); #ifdef BCM_CNIC - bnx2x_init_block(bp, TIMERS_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_TM, init_phase); REG_WR(bp, TM_REG_LIN0_SCAN_TIME + port*4, 20); REG_WR(bp, TM_REG_LIN0_MAX_ACTIVE_CID + port*4, 31); #endif - bnx2x_init_block(bp, DQ_BLOCK, init_stage); - - if (CHIP_MODE_IS_4_PORT(bp)) - bnx2x_init_block(bp, QM_4PORT_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_DORQ, init_phase); if (CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) { - bnx2x_init_block(bp, BRB1_BLOCK, init_stage); - if (CHIP_REV_IS_SLOW(bp) && CHIP_IS_E1(bp)) { - /* no pause for emulation and FPGA */ - low = 0; - high = 513; - } else { - if (IS_MF(bp)) - low = ((bp->flags & ONE_PORT_FLAG) ? 160 : 246); - else if (bp->dev->mtu > 4096) { - if (bp->flags & ONE_PORT_FLAG) - low = 160; - else { - val = bp->dev->mtu; - /* (24*1024 + val*4)/256 */ - low = 96 + (val/64) + - ((val % 64) ? 1 : 0); - } - } else - low = ((bp->flags & ONE_PORT_FLAG) ? 80 : 160); - high = low + 56; /* 14*1024/256 */ - } + bnx2x_init_block(bp, BLOCK_BRB1, init_phase); + + if (IS_MF(bp)) + low = ((bp->flags & ONE_PORT_FLAG) ? 160 : 246); + else if (bp->dev->mtu > 4096) { + if (bp->flags & ONE_PORT_FLAG) + low = 160; + else { + val = bp->dev->mtu; + /* (24*1024 + val*4)/256 */ + low = 96 + (val/64) + + ((val % 64) ? 1 : 0); + } + } else + low = ((bp->flags & ONE_PORT_FLAG) ? 80 : 160); + high = low + 56; /* 14*1024/256 */ REG_WR(bp, BRB1_REG_PAUSE_LOW_THRESHOLD_0 + port*4, low); REG_WR(bp, BRB1_REG_PAUSE_HIGH_THRESHOLD_0 + port*4, high); } - if (CHIP_MODE_IS_4_PORT(bp)) { - REG_WR(bp, BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 + port*8, 248); - REG_WR(bp, BRB1_REG_PAUSE_0_XON_THRESHOLD_0 + port*8, 328); - REG_WR(bp, (BP_PORT(bp)? - BRB1_REG_MAC_GUARANTIED_1 : BRB1_REG_MAC_GUARANTIED_0), 40); - } - -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - if (bp->flags & SAFC_TX_FLAG) { - REG_WR(bp, BRB1_REG_HIGH_LLFC_LOW_THRESHOLD_0 + port*4, 0xa0); - REG_WR(bp, BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD_0 + port*4, 0xd8); - REG_WR(bp, BRB1_REG_LOW_LLFC_LOW_THRESHOLD_0 + port*4, 0xa0); - REG_WR(bp, BRB1_REG_LOW_LLFC_HIGH_THRESHOLD_0 + port*4, 0xd8); - } -#endif - - bnx2x_init_block(bp, PRS_BLOCK, init_stage); - - bnx2x_init_block(bp, TSDM_BLOCK, init_stage); - bnx2x_init_block(bp, CSDM_BLOCK, init_stage); - bnx2x_init_block(bp, USDM_BLOCK, init_stage); - bnx2x_init_block(bp, XSDM_BLOCK, init_stage); - - bnx2x_init_block(bp, TSEM_BLOCK, init_stage); - bnx2x_init_block(bp, USEM_BLOCK, init_stage); - bnx2x_init_block(bp, CSEM_BLOCK, init_stage); - bnx2x_init_block(bp, XSEM_BLOCK, init_stage); if (CHIP_MODE_IS_4_PORT(bp)) - bnx2x_init_block(bp, XSEM_4PORT_BLOCK, init_stage); + REG_WR(bp, (BP_PORT(bp) ? + BRB1_REG_MAC_GUARANTIED_1 : + BRB1_REG_MAC_GUARANTIED_0), 40); - bnx2x_init_block(bp, UPB_BLOCK, init_stage); - bnx2x_init_block(bp, XPB_BLOCK, init_stage); - bnx2x_init_block(bp, PBF_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_PRS, init_phase); + if (CHIP_IS_E3B0(bp)) { + if (IS_MF_AFEX(bp)) { + /* configure headers for AFEX mode */ + REG_WR(bp, BP_PORT(bp) ? + PRS_REG_HDRS_AFTER_BASIC_PORT_1 : + PRS_REG_HDRS_AFTER_BASIC_PORT_0, 0xE); + REG_WR(bp, BP_PORT(bp) ? + PRS_REG_HDRS_AFTER_TAG_0_PORT_1 : + PRS_REG_HDRS_AFTER_TAG_0_PORT_0, 0x6); + REG_WR(bp, BP_PORT(bp) ? + PRS_REG_MUST_HAVE_HDRS_PORT_1 : + PRS_REG_MUST_HAVE_HDRS_PORT_0, 0xA); + } else + /* Ovlan exists only if we are in multi-function + + * switch-dependent mode, in switch-independent there + * is no ovlan headers + */ + REG_WR(bp, BP_PORT(bp) ? + PRS_REG_HDRS_AFTER_BASIC_PORT_1 : + PRS_REG_HDRS_AFTER_BASIC_PORT_0, + (bp->path_has_ovlan ? 7 : 6)); + } - if (!CHIP_IS_E2(bp)) { + bnx2x_init_block(bp, BLOCK_TSDM, init_phase); + bnx2x_init_block(bp, BLOCK_CSDM, init_phase); + bnx2x_init_block(bp, BLOCK_USDM, init_phase); + bnx2x_init_block(bp, BLOCK_XSDM, init_phase); + + bnx2x_init_block(bp, BLOCK_TSEM, init_phase); + bnx2x_init_block(bp, BLOCK_USEM, init_phase); + bnx2x_init_block(bp, BLOCK_CSEM, init_phase); + bnx2x_init_block(bp, BLOCK_XSEM, init_phase); + + bnx2x_init_block(bp, BLOCK_UPB, init_phase); + bnx2x_init_block(bp, BLOCK_XPB, init_phase); + + bnx2x_init_block(bp, BLOCK_PBF, init_phase); + + if (CHIP_IS_E1x(bp)) { /* configure PBF to work without PAUSE mtu 9000 */ REG_WR(bp, PBF_REG_P0_PAUSE_ENABLE + port*4, 0); @@ -7844,108 +7727,92 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) /* probe changes */ REG_WR(bp, PBF_REG_INIT_P0 + port*4, 1); - msleep(5); + udelay(50); REG_WR(bp, PBF_REG_INIT_P0 + port*4, 0); } #ifdef BCM_CNIC - bnx2x_init_block(bp, SRCH_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_SRC, init_phase); #endif - bnx2x_init_block(bp, CDU_BLOCK, init_stage); - bnx2x_init_block(bp, CFC_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_CDU, init_phase); + bnx2x_init_block(bp, BLOCK_CFC, init_phase); if (CHIP_IS_E1(bp)) { REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, 0); REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, 0); } - bnx2x_init_block(bp, HC_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_HC, init_phase); - bnx2x_init_block(bp, IGU_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_IGU, init_phase); - bnx2x_init_block(bp, MISC_AEU_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_MISC_AEU, init_phase); /* init aeu_mask_attn_func_0/1: * - SF mode: bits 3-7 are masked. only bits 0-2 are in use * - MF mode: bit 3 is masked. bits 0-2 are in use as in SF * bits 4-7 are used for "per vn group attention" */ val = IS_MF(bp) ? 0xF7 : 0x7; /* Enable DCBX attention for all but E1 */ - val |= CHIP_IS_E1(bp)? 0 : 0x10; + val |= CHIP_IS_E1(bp) ? 0 : 0x10; REG_WR(bp, MISC_REG_AEU_MASK_ATTN_FUNC_0 + port*4, val); - bnx2x_init_block(bp, PXPCS_BLOCK, init_stage); - bnx2x_init_block(bp, EMAC0_BLOCK, init_stage); - bnx2x_init_block(bp, EMAC1_BLOCK, init_stage); - bnx2x_init_block(bp, DBU_BLOCK, init_stage); - bnx2x_init_block(bp, DBG_BLOCK, init_stage); + bnx2x_init_block(bp, BLOCK_NIG, init_phase); - bnx2x_init_block(bp, NIG_BLOCK, init_stage); + if (!CHIP_IS_E1x(bp)) { + /* Bit-map indicating which L2 hdrs may appear after the + * basic Ethernet header + */ + if (IS_MF_AFEX(bp)) + REG_WR(bp, BP_PORT(bp) ? + NIG_REG_P1_HDRS_AFTER_BASIC : + NIG_REG_P0_HDRS_AFTER_BASIC, 0xE); + else + REG_WR(bp, BP_PORT(bp) ? + NIG_REG_P1_HDRS_AFTER_BASIC : + NIG_REG_P0_HDRS_AFTER_BASIC, + IS_MF_SD(bp) ? 7 : 6); - REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1); + if (CHIP_IS_E3(bp)) + REG_WR(bp, BP_PORT(bp) ? + NIG_REG_LLH1_MF_MODE : + NIG_REG_LLH_MF_MODE, IS_MF(bp)); + } + if (!CHIP_IS_E3(bp)) + REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1); if (!CHIP_IS_E1(bp)) { /* 0x2 disable mf_ov, 0x1 enable */ REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK_MF + port*4, (IS_MF_SD(bp) ? 0x1 : 0x2)); - if (CHIP_IS_E2(bp)){ + if (!CHIP_IS_E1x(bp)) { val = 0; switch (bp->mf_mode) { case MULTI_FUNCTION_SD: val = 1; break; case MULTI_FUNCTION_SI: + case MULTI_FUNCTION_AFEX: val = 2; break; } - REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_CLS_TYPE: + REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_CLS_TYPE : NIG_REG_LLH0_CLS_TYPE), val); } - -#ifdef BNX2X_SAFC - if (bp->flags & SAFC_TX_FLAG) { - high = 0; - for (i = 0; i < BNX2X_MAX_PRIORITY; i++) - if (bp->pri_map[i] == 1) - high |= (1 << i); - REG_WR(bp, - NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0 + port*4, - high); - low = 0; - for (i = 0; i < BNX2X_MAX_PRIORITY; i++) - if (bp->pri_map[i] == 0) - low |= (1 << i); - REG_WR(bp, - NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0 + port*4, - low); - - REG_WR(bp, NIG_REG_PAUSE_ENABLE_0 + port*4, 0); - REG_WR(bp, NIG_REG_LLFC_ENABLE_0 + port*4, 1); - REG_WR(bp, NIG_REG_LLFC_OUT_EN_0 + port*4, 1); - } else { -#else /* BNX2X_UPSTREAM */ - { -#endif - REG_WR(bp, NIG_REG_LLFC_ENABLE_0 + port*4, 0); - REG_WR(bp, NIG_REG_LLFC_OUT_EN_0 + port*4, 0); - REG_WR(bp, NIG_REG_PAUSE_ENABLE_0 + port*4, 1); - } + REG_WR(bp, NIG_REG_LLFC_ENABLE_0 + port*4, 0); + REG_WR(bp, NIG_REG_LLFC_OUT_EN_0 + port*4, 0); + REG_WR(bp, NIG_REG_PAUSE_ENABLE_0 + port*4, 1); } - bnx2x_init_block(bp, MCP_BLOCK, init_stage); - bnx2x_init_block(bp, DMAE_BLOCK, init_stage); - bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, - bp->common.shmem_base, - bp->common.shmem2_base); - if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base, - bp->common.shmem2_base, port)) { + /* If SPIO5 is set to generate interrupts, enable it for this port */ + val = REG_RD(bp, MISC_REG_SPIO_EVENT_EN); + if (val & MISC_SPIO_SPIO5) { u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0); val = REG_RD(bp, reg_addr); val |= AEU_INPUTS_ATTN_BITS_SPIO5; REG_WR(bp, reg_addr, val); - } - bnx2x__link_reset(bp); + } return 0; } @@ -7953,13 +7820,16 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr) { int reg; + u32 wb_write[2]; if (CHIP_IS_E1(bp)) reg = PXP2_REG_RQ_ONCHIP_AT + index*8; else reg = PXP2_REG_RQ_ONCHIP_AT_B0 + index*8; - bnx2x_wb_wr(bp, reg, ONCHIP_ADDR1(addr), ONCHIP_ADDR2(addr)); + wb_write[0] = ONCHIP_ADDR1(addr); + wb_write[1] = ONCHIP_ADDR2(addr); + REG_WR_DMAE(bp, reg, wb_write, 2); } static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id) @@ -7967,7 +7837,8 @@ static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id) bnx2x_igu_clear_sb_gen(bp, BP_FUNC(bp), idu_sb_id, true /*PF*/); } -static inline void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func){ +static inline void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func) +{ u32 i, base = FUNC_ILT_BASE(func); for (i = base; i < base + ILT_PER_FUNC; i++) bnx2x_ilt_wr(bp, i, 0); @@ -7976,13 +7847,16 @@ static inline void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func){ #if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ /** - * Disable PCIE-core transaction timeout in the PCI configuration space of + * bnx2x_disable_pcie_tout - disable PCIE-core transaction timeout + * + * @bp: driver handle + * + * Disables PCIE-core transaction timeout in the PCI configuration space of * the given function. * * TODO: If this code is ever integrated into upstream Linux kernel, consider * adding a definition to the "Disable PCI-E timeout" bit in a pci_regs.h. * - * @param bp */ static inline void bnx2x_disable_pcie_tout(struct bnx2x *bp) { @@ -7992,8 +7866,8 @@ static inline void bnx2x_disable_pcie_tout(struct bnx2x *bp) pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); if (!pos) { - DP(NETIF_MSG_IFUP, "PCIE capability wasn't found - " - "there is nothing to disable.\n"); + DP(NETIF_MSG_HW, + "PCIE capability wasn't found - there is nothing to disable.\n"); return; } @@ -8002,23 +7876,28 @@ static inline void bnx2x_disable_pcie_tout(struct bnx2x *bp) pci_write_config_dword(pdev, pos + PCI_EXP_DEVCTL2, control2 | 0x10); } #endif - - static int bnx2x_init_hw_func(struct bnx2x *bp) { int port = BP_PORT(bp); int func = BP_FUNC(bp); + int init_phase = PHASE_PF0 + func; struct bnx2x_ilt *ilt = BP_ILT(bp); u16 cdu_ilt_start; u32 addr, val; u32 main_mem_base, main_mem_size, main_mem_prty_clr; - int i, main_mem_width; + int i, main_mem_width, rc; - DP(BNX2X_MSG_MCP, "starting func init func %d\n", func); + DP(NETIF_MSG_HW, "starting func init func %d\n", func); /* FLR cleanup - hmmm */ - if (CHIP_IS_E2(bp)) - bnx2x_pf_flr_clnup(bp); + if (!CHIP_IS_E1x(bp)) { + rc = bnx2x_pf_flr_clnup(bp); + if (rc) { + bnx2x_fw_dump(bp); + bnx2x_idle_chk(bp); + return rc; + } + } /* set MSI reconfigure capability */ if (bp->common.int_block == INT_BLOCK_HC) { @@ -8028,6 +7907,9 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) REG_WR(bp, addr, val); } + bnx2x_init_block(bp, BLOCK_PXP, init_phase); + bnx2x_init_block(bp, BLOCK_PXP2, init_phase); + ilt = BP_ILT(bp); cdu_ilt_start = ilt->clients[ILT_CLIENT_CDU].start; @@ -8035,21 +7917,20 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) cdu_ilt_start += BNX2X_FIRST_VF_CID/ILT_PAGE_CIDS; cdu_ilt_start = bnx2x_iov_init_ilt(bp, cdu_ilt_start); #if (BNX2X_FIRST_VF_CID > 0) - /* - * if BNX2X_FIRST_VF_CID > 0 then the PF L2 cids precedes those of the - * VFs, so start line should be reset - */ + /** + * if BNX2X_FIRST_VF_CID > 0 then the PF L2 cids precedes + * those of the VFs, so start line should be reset + */ cdu_ilt_start = ilt->clients[ILT_CLIENT_CDU].start; #endif #endif - for (i = 0; i < L2_ILT_LINES(bp); i++) { ilt->lines[cdu_ilt_start + i].page = - bp->context.vcxt + (ILT_PAGE_CIDS * i); + bp->context[i].vcxt; ilt->lines[cdu_ilt_start + i].page_mapping = - bp->context.cxt_mapping + (CDU_ILT_PAGE_SZ * i); - /* cdu ilt pages are allocated manually so there's no need to - set the size */ + bp->context[i].cxt_mapping; + ilt->lines[cdu_ilt_start + i].size = + bp->context[i].size; } bnx2x_ilt_init_op(bp, INITOP_SET); @@ -8065,7 +7946,7 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) REG_WR(bp, PRS_REG_NIC_MODE, 1); #endif /* BCM_CNIC */ - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { u32 pf_conf = IGU_PF_CONF_FUNC_EN; /* Turn on a single ISR mode in IGU if driver is going to use @@ -8092,67 +7973,58 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) bp->dmae_ready = 1; - bnx2x_init_block(bp, PGLUE_B_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_PGLUE_B, init_phase); - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) REG_WR(bp, PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR, func); - bnx2x_init_block(bp, MISC_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, TCM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, UCM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, CCM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, XCM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, TSEM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, USEM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, CSEM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, XSEM_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_ATC, init_phase); + bnx2x_init_block(bp, BLOCK_DMAE, init_phase); + bnx2x_init_block(bp, BLOCK_NIG, init_phase); + bnx2x_init_block(bp, BLOCK_SRC, init_phase); + bnx2x_init_block(bp, BLOCK_MISC, init_phase); + bnx2x_init_block(bp, BLOCK_TCM, init_phase); + bnx2x_init_block(bp, BLOCK_UCM, init_phase); + bnx2x_init_block(bp, BLOCK_CCM, init_phase); + bnx2x_init_block(bp, BLOCK_XCM, init_phase); + bnx2x_init_block(bp, BLOCK_TSEM, init_phase); + bnx2x_init_block(bp, BLOCK_USEM, init_phase); + bnx2x_init_block(bp, BLOCK_CSEM, init_phase); + bnx2x_init_block(bp, BLOCK_XSEM, init_phase); - if(CHIP_IS_E2(bp)) { - REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_PATH_ID_OFFSET, - BP_PATH(bp)); - REG_WR(bp, BAR_CSTRORM_INTMEM + CSTORM_PATH_ID_OFFSET, - BP_PATH(bp)); - } - - if (CHIP_MODE_IS_4_PORT(bp)) - bnx2x_init_block(bp, XSEM_4PORT_BLOCK, FUNC0_STAGE + func); - - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) REG_WR(bp, QM_REG_PF_EN, 1); - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, BNX2X_MAX_NUM_OF_VFS + func); REG_WR(bp, USEM_REG_VFPF_ERR_NUM, BNX2X_MAX_NUM_OF_VFS + func); REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, BNX2X_MAX_NUM_OF_VFS + func); REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, BNX2X_MAX_NUM_OF_VFS + func); } - bnx2x_init_block(bp, QM_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_QM, init_phase); - if (CHIP_MODE_IS_4_PORT(bp)) - bnx2x_init_block(bp, QM_4PORT_BLOCK, FUNC0_STAGE + func); - - bnx2x_init_block(bp, TIMERS_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, DQ_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_TM, init_phase); + bnx2x_init_block(bp, BLOCK_DORQ, init_phase); #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ bnx2x_iov_init_dq(bp); #endif - bnx2x_init_block(bp, BRB1_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, PRS_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, TSDM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, CSDM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, USDM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, XSDM_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, UPB_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, XPB_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, PBF_BLOCK, FUNC0_STAGE + func); - if (CHIP_IS_E2(bp)) + bnx2x_init_block(bp, BLOCK_BRB1, init_phase); + bnx2x_init_block(bp, BLOCK_PRS, init_phase); + bnx2x_init_block(bp, BLOCK_TSDM, init_phase); + bnx2x_init_block(bp, BLOCK_CSDM, init_phase); + bnx2x_init_block(bp, BLOCK_USDM, init_phase); + bnx2x_init_block(bp, BLOCK_XSDM, init_phase); + bnx2x_init_block(bp, BLOCK_UPB, init_phase); + bnx2x_init_block(bp, BLOCK_XPB, init_phase); + bnx2x_init_block(bp, BLOCK_PBF, init_phase); + if (!CHIP_IS_E1x(bp)) REG_WR(bp, PBF_REG_DISABLE_PF, 0); - bnx2x_init_block(bp, CDU_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_CDU, init_phase); - bnx2x_init_block(bp, CFC_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_CFC, init_phase); - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) REG_WR(bp, CFC_REG_WEAK_ENABLE_PF, 1); if (IS_MF(bp)) { @@ -8160,7 +8032,7 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) REG_WR(bp, NIG_REG_LLH0_FUNC_VLAN_ID + port*8, bp->mf_ov); } - bnx2x_init_block(bp, MISC_AEU_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_MISC_AEU, init_phase); /* HC init per function */ if (bp->common.int_block == INT_BLOCK_HC) { @@ -8170,40 +8042,41 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, 0); REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, 0); } - bnx2x_init_block(bp, HC_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_HC, init_phase); } else { int num_segs, sb_idx, prod_offset; REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_12 + func*4, 0); - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { REG_WR(bp, IGU_REG_LEADING_EDGE_LATCH, 0); REG_WR(bp, IGU_REG_TRAILING_EDGE_LATCH, 0); } - bnx2x_init_block(bp, IGU_BLOCK, FUNC0_STAGE + func); + bnx2x_init_block(bp, BLOCK_IGU, init_phase); - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { int dsb_idx = 0; - /* Producer memory: + /** + * Producer memory: * E2 mode: address 0-135 match to the mapping memory; * 136 - PF0 default prod; 137 - PF1 default prod; * 138 - PF2 default prod; 139 - PF3 default prod; * 140 - PF0 attn prod; 141 - PF1 attn prod; * 142 - PF2 attn prod; 143 - PF3 attn prod; * 144-147 reserved. - + * * E1.5 mode - In backward compatible mode; - * for non default SB; each even line in the memory holds - * the U producer and each odd line hold the C producer. - * The first 128 producers are for NDSB (PF0 - 0-31; - * PF1 - 32-63 and so on). - * The last 20 producers are for the DSB for each PF. - * Each PF has five segments: - * (the order inside each segment is PF0; PF1; PF2; PF3) - - * 128-131 U prods; 132-135 C prods; 136-139 X prods; - * 140-143 T prods; 144-147 attn prods; + * for non default SB; each even line in the memory + * holds the U producer and each odd line hold + * the C producer. The first 128 producers are for + * NDSB (PF0 - 0-31; PF1 - 32-63 and so on). The last 20 + * producers are for the DSB for each PF. + * Each PF has five segments: (the order inside each + * segment is PF0; PF1; PF2; PF3) - 128-131 U prods; + * 132-135 C prods; 136-139 X prods; 140-143 T prods; + * 144-147 attn prods; */ /* non-default-status-blocks */ num_segs = CHIP_INT_MODE_IS_BC(bp) ? @@ -8231,14 +8104,20 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) if (CHIP_MODE_IS_4_PORT(bp)) dsb_idx = BP_FUNC(bp); else - dsb_idx = BP_E1HVN(bp); + dsb_idx = BP_VN(bp); prod_offset = (CHIP_INT_MODE_IS_BC(bp) ? IGU_BC_BASE_DSB_PROD + dsb_idx : IGU_NORM_BASE_DSB_PROD + dsb_idx); - for (i = 0; i < (num_segs * E1HVN_MAX); i += E1HVN_MAX) { - addr = IGU_REG_PROD_CONS_MEMORY + (prod_offset + i)*4; + /* + * igu prods come in chunks of E1HVN_MAX (4) - + * does not matters what is the current chip mode + */ + for (i = 0; i < (num_segs * E1HVN_MAX); + i += E1HVN_MAX) { + addr = IGU_REG_PROD_CONS_MEMORY + + (prod_offset + i)*4; REG_WR(bp, addr, 0); } /* send consumer update with 0 */ @@ -8261,7 +8140,8 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) } bnx2x_igu_clear_sb(bp, bp->igu_dsb_id); - /* !!! these should become driver const once rf-tool supports split-68 const */ + /* !!! these should become driver const once + rf-tool supports split-68 const */ REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0); REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0); REG_WR(bp, IGU_REG_SB_MASK_LSB, 0); @@ -8275,13 +8155,6 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) REG_WR(bp, 0x2114, 0xffffffff); REG_WR(bp, 0x2120, 0xffffffff); - bnx2x_init_block(bp, EMAC0_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, EMAC1_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, DBU_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, DBG_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, MCP_BLOCK, FUNC0_STAGE + func); - bnx2x_init_block(bp, DMAE_BLOCK, FUNC0_STAGE + func); - if (CHIP_IS_E1x(bp)) { main_mem_size = HC_REG_MAIN_MEMORY_SIZE / 2; /*dwords*/ main_mem_base = HC_REG_MAIN_MEMORY + @@ -8291,9 +8164,9 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) val = REG_RD(bp, main_mem_prty_clr); if (val) - DP(BNX2X_MSG_MCP, "Hmmm... Parity errors in HC " - "block during " - "function init (0x%x)!\n", val); + DP(NETIF_MSG_HW, + "Hmmm... Parity errors in HC block during function init (0x%x)!\n", + val); /* Clear "false" parity errors in MSI-X table */ for (i = main_mem_base; @@ -8313,74 +8186,26 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) bnx2x_disable_pcie_tout(bp); #endif - return 0; -} - -int bnx2x_init_hw(struct bnx2x *bp, u32 load_code) -{ - int rc = 0; - - DP(BNX2X_MSG_MCP, "function %d load_code %x\n", - BP_ABS_FUNC(bp), load_code); - - bp->dmae_ready = 0; - mutex_init(&bp->dmae_mutex); - - switch (load_code) { - case FW_MSG_CODE_DRV_LOAD_COMMON: - case FW_MSG_CODE_DRV_LOAD_COMMON_CHIP: - rc = bnx2x_init_hw_common(bp, load_code); - /* zero (touch) Agregative contexces to avoid - * parity errors in CM memories - * remove this code when included in inittool - */ - bnx2x_fill(bp, TCM_REG_AG_CTX, 0, 3328*4); - bnx2x_fill(bp, XCM_REG_AG_CTX, 0, 8192*4); - bnx2x_fill(bp, CCM_REG_AG_CTX, 0, 2560*4); - bnx2x_fill(bp, UCM_REG_AG_CTX, 0, 2048*4); - - if (rc) - goto init_hw_err; - /* no break */ - - case FW_MSG_CODE_DRV_LOAD_PORT: - rc = bnx2x_init_hw_port(bp); - if (rc) - goto init_hw_err; - /* no break */ - - case FW_MSG_CODE_DRV_LOAD_FUNCTION: - rc = bnx2x_init_hw_func(bp); - if (rc) - goto init_hw_err; - break; - - default: - BNX2X_ERR("Unknown load_code (0x%x) from MCP\n", load_code); - break; - } - -#ifndef __VMKLNX__ /* Remove FW pulse timer update */ /* BNX2X_UPSTREAM */ - if (!BP_NOMCP(bp)) { - int mb_idx = BP_FW_MB_IDX(bp); - - bp->fw_drv_pulse_wr_seq = - (SHMEM_RD(bp, func_mb[mb_idx].drv_pulse_mb) & - DRV_PULSE_SEQ_MASK); - DP(BNX2X_MSG_MCP, "drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq); - } +#ifdef BNX2X_STOP_ON_ERROR + /* Enable STORMs SP logging */ + REG_WR8(bp, BAR_USTRORM_INTMEM + + USTORM_RECORD_SLOW_PATH_OFFSET(BP_FUNC(bp)), 1); + REG_WR8(bp, BAR_TSTRORM_INTMEM + + TSTORM_RECORD_SLOW_PATH_OFFSET(BP_FUNC(bp)), 1); + REG_WR8(bp, BAR_CSTRORM_INTMEM + + CSTORM_RECORD_SLOW_PATH_OFFSET(BP_FUNC(bp)), 1); + REG_WR8(bp, BAR_XSTRORM_INTMEM + + XSTORM_RECORD_SLOW_PATH_OFFSET(BP_FUNC(bp)), 1); #endif + bnx2x_phy_probe(&bp->link_params); -init_hw_err: - bnx2x_gunzip_end(bp); - - return rc; + return 0; } #ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ /* For ESX we need to possibly align the cdu ilt page pointers */ -void bnx2x_adjust_cdu_cxt_alignment(struct bnx2x *bp, bool is_alloc) +void bnx2x_adjust_cdu_cxt_alignment(struct bnx2x *bp, int i, bool is_alloc) { /* align only for 57710. Subsequent devices do not require this */ if (!CHIP_IS_E1(bp)) @@ -8389,25 +8214,26 @@ void bnx2x_adjust_cdu_cxt_alignment(struct bnx2x *bp, bool is_alloc) if (is_alloc) { /* align to CDU_ILT_PAGE_SZ */ - //BNX2X_ERR("CXT ALLOC: vcxt %p, map %x\n", bp->context.vcxt, (u32)bp->context.cxt_mapping); + //BNX2X_ERR("CXT ALLOC: vcxt %p, map %x\n", bp->context[i].vcxt, (u32)bp->context[i].cxt_mapping); + dma_addr_t cxt_mapping_old = bp->context[i].cxt_mapping; - bp->context.alignment_offset = (u32)((u64)bp->context.vcxt & (CDU_ILT_PAGE_SZ - 1 )); - bp->context.vcxt = (union cdu_context *)ALIGN((u64)bp->context.vcxt, CDU_ILT_PAGE_SZ); - bp->context.cxt_mapping = (dma_addr_t)ALIGN((u64)bp->context.cxt_mapping, CDU_ILT_PAGE_SZ); + bp->context[i].cxt_mapping = (dma_addr_t)ALIGN((u64)bp->context[i].cxt_mapping, CDU_ILT_PAGE_SZ); + bp->context[i].alignment_offset = bp->context[i].cxt_mapping - cxt_mapping_old; + bp->context[i].vcxt = (union cdu_context *)((u8 *) bp->context[i].vcxt + bp->context[i].alignment_offset); - //BNX2X_ERR("CXT ALLOC ALIGNED: vcxt %p, map %x alignment %x\n", bp->context.vcxt, (u32)bp->context.cxt_mapping, bp->context.alignment_offset); + //BNX2X_ERR("CXT ALLOC ALIGNED: vcxt %p, map %x alignment %x\n", bp->context[i].vcxt, (u32)bp->context[i].cxt_mapping, bp->context[i].alignment_offset); - } else if (bp->context.alignment_offset) { + } else if (bp->context[i].alignment_offset) { /* 'un-align' restore pointers befre freeing the memory */ - bp->context.vcxt = (union cdu_context *)((u64)bp->context.vcxt - (CDU_ILT_PAGE_SZ - bp->context.alignment_offset)); - bp->context.cxt_mapping = (dma_addr_t)((u64)bp->context.cxt_mapping - (CDU_ILT_PAGE_SZ - bp->context.alignment_offset)); + bp->context[i].vcxt = (union cdu_context *)((u64)bp->context[i].vcxt - bp->context[i].alignment_offset); + bp->context[i].cxt_mapping = (dma_addr_t)((u64)bp->context[i].cxt_mapping - bp->context[i].alignment_offset); } } #endif void bnx2x_free_mem(struct bnx2x *bp) { - bnx2x_gunzip_end(bp); + int i; /* fastpath */ bnx2x_free_fp_mem(bp); @@ -8422,11 +8248,13 @@ void bnx2x_free_mem(struct bnx2x *bp) BNX2X_PCI_FREE(bp->slowpath, bp->slowpath_mapping, sizeof(struct bnx2x_slowpath)); + for (i = 0; i < L2_ILT_LINES(bp); i++) { #ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - bnx2x_adjust_cdu_cxt_alignment(bp, false); + bnx2x_adjust_cdu_cxt_alignment(bp, i, false); #endif - BNX2X_PCI_FREE(bp->context.vcxt, bp->context.cxt_mapping, - bp->context.size); + BNX2X_PCI_FREE(bp->context[i].vcxt, bp->context[i].cxt_mapping, + bp->context[i].size); + } bnx2x_ilt_mem_op(bp, ILT_MEMOP_FREE); @@ -8435,14 +8263,13 @@ void bnx2x_free_mem(struct bnx2x *bp) #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ bnx2x_iov_free_mem(bp); #endif - #ifdef BCM_CNIC - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) BNX2X_PCI_FREE(bp->cnic_sb.e2_sb, bp->cnic_sb_mapping, - sizeof(struct host_hc_status_block_e2)); + sizeof(struct host_hc_status_block_e2)); else BNX2X_PCI_FREE(bp->cnic_sb.e1x_sb, bp->cnic_sb_mapping, - sizeof(struct host_hc_status_block_e1x)); + sizeof(struct host_hc_status_block_e1x)); BNX2X_PCI_FREE(bp->t2, bp->t2_mapping, SRC_T2_SZ); #endif @@ -8453,16 +8280,19 @@ void bnx2x_free_mem(struct bnx2x *bp) BCM_PAGE_SIZE * NUM_EQ_PAGES); } -static inline int __alloc_fw_stats_mem(struct bnx2x *bp) +static inline int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp) { int num_groups; + int is_fcoe_stats = NO_FCOE(bp) ? 0 : 1; - /* number of eth_queues */ - u8 num_queue_stats = BNX2X_NUM_ETH_QUEUES(bp); + /* number of queues for statistics is number of eth queues + FCoE */ + u8 num_queue_stats = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe_stats; /* Total number of FW statistics requests = - * 1 for port stats + 1 for PF stats + num_eth_queues */ - bp->fw_stats_num = 2 + num_queue_stats; + * 1 for port stats + 1 for PF stats + potential 1 for FCoE stats + + * num of queues + */ + bp->fw_stats_num = 2 + is_fcoe_stats + num_queue_stats; #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ /* add the max number of VF queues, memory for max VF queue statistics @@ -8476,8 +8306,8 @@ static inline int __alloc_fw_stats_mem(struct bnx2x *bp) * STATS_QUERY_CMD_COUNT rules. The real number or requests is * configured in the stats_query_header. */ - num_groups = (2 + num_queue_stats) / STATS_QUERY_CMD_COUNT + - (((2 + num_queue_stats) % STATS_QUERY_CMD_COUNT) ? 1 : 0); + num_groups = ((bp->fw_stats_num) / STATS_QUERY_CMD_COUNT) + + (((bp->fw_stats_num) % STATS_QUERY_CMD_COUNT) ? 1 : 0); bp->fw_stats_req_sz = sizeof(struct stats_query_header) + num_groups * sizeof(struct stats_query_cmd_group); @@ -8486,9 +8316,13 @@ static inline int __alloc_fw_stats_mem(struct bnx2x *bp) * * stats_counter holds per-STORM counters that are incremented * when STORM has finished with the current request. + * + * memory for FCoE offloaded statistics are counted anyway, + * even if they will not be sent. */ bp->fw_stats_data_sz = sizeof(struct per_port_stats) + sizeof(struct per_pf_stats) + + sizeof(struct fcoe_statistics_params) + sizeof(struct per_queue_stats) * num_queue_stats + sizeof(struct stats_counter); @@ -8496,11 +8330,11 @@ static inline int __alloc_fw_stats_mem(struct bnx2x *bp) bp->fw_stats_data_sz + bp->fw_stats_req_sz); /* Set shortcuts */ - bp->fw_stats_req = (struct bnx2x_fw_stats_req*)bp->fw_stats; + bp->fw_stats_req = (struct bnx2x_fw_stats_req *)bp->fw_stats; bp->fw_stats_req_mapping = bp->fw_stats_mapping; - bp->fw_stats_data = (struct bnx2x_fw_stats_data*) - ((u8*)bp->fw_stats + bp->fw_stats_req_sz); + bp->fw_stats_data = (struct bnx2x_fw_stats_data *) + ((u8 *)bp->fw_stats + bp->fw_stats_req_sz); bp->fw_stats_data_mapping = bp->fw_stats_mapping + bp->fw_stats_req_sz; @@ -8509,17 +8343,17 @@ static inline int __alloc_fw_stats_mem(struct bnx2x *bp) alloc_mem_err: BNX2X_PCI_FREE(bp->fw_stats, bp->fw_stats_mapping, bp->fw_stats_data_sz + bp->fw_stats_req_sz); + BNX2X_ERR("Can't allocate memory\n"); return -ENOMEM; } int bnx2x_alloc_mem(struct bnx2x *bp) { - if(bnx2x_gunzip_init(bp)) - return -ENOMEM; + int i, allocated, context_size; #ifdef BCM_CNIC - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) /* size = the status block + ramrod buffers */ BNX2X_PCI_ALLOC(bp->cnic_sb.e2_sb, &bp->cnic_sb_mapping, sizeof(struct host_hc_status_block_e2)); @@ -8538,28 +8372,54 @@ int bnx2x_alloc_mem(struct bnx2x *bp) BNX2X_PCI_ALLOC(bp->slowpath, &bp->slowpath_mapping, sizeof(struct bnx2x_slowpath)); +#ifdef BCM_CNIC + /* write address to which L5 should insert its values */ + bp->cnic_eth_dev.addr_drv_info_to_mcp = &bp->slowpath->drv_info_to_mcp; +#endif + /* Allocated memory for FW statistics */ - if (__alloc_fw_stats_mem(bp)) + if (bnx2x_alloc_fw_stats_mem(bp)) goto alloc_mem_err; - bp->context.size = sizeof(union cdu_context) * bp->l2_cid_count; -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - /* for ESX we need to allocate extra memory for 57710 so we can align - * the ilt page pointers + /* Allocate memory for CDU context: + * This memory is allocated separately and not in the generic ILT + * functions because CDU differs in few aspects: + * 1. There are multiple entities allocating memory for context - + * 'regular' driver, CNIC and SRIOV driver. Each separately controls + * its own ILT lines. + * 2. In ESX and E1 need to align the CDU context to page-size boundary + * (this is not required for the other ILT clients). + * 3. Since CDU page-size is not a single 4KB page (which is the case + * for the other ILT clients), to be efficient we want to support + * allocation of sub-page-size in the last entry. + * 4. Context pointers are used by the driver to pass to FW / update + * the context (for the other ILT clients the pointers are used just to + * free the memory during unload). */ - if (CHIP_IS_E1(bp)) { - bp->context.size += CDU_ILT_PAGE_SZ; - bp->context.alignment_offset = 0; - } + context_size = sizeof(union cdu_context) * BNX2X_L2_CID_COUNT(bp); -#endif - BNX2X_PCI_ALLOC(bp->context.vcxt, &bp->context.cxt_mapping, - bp->context.size); + for (i = 0, allocated = 0; allocated < context_size; i++) { + bp->context[i].size = min(CDU_ILT_PAGE_SZ, + (context_size - allocated)); #ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - bnx2x_adjust_cdu_cxt_alignment(bp, true); + /* for ESX we need to allocate extra memory for 57710 so we can align + * the ilt page pointers + */ + if (CHIP_IS_E1(bp)) { + bp->context[i].size += CDU_ILT_PAGE_SZ; + bp->context[i].alignment_offset = 0; + } #endif + BNX2X_PCI_ALLOC(bp->context[i].vcxt, + &bp->context[i].cxt_mapping, + bp->context[i].size); + allocated += bp->context[i].size; +#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ + bnx2x_adjust_cdu_cxt_alignment(bp, i, true); +#endif + } BNX2X_ALLOC(bp->ilt->lines, sizeof(struct ilt_line) * ILT_MAX_LINES); if (bnx2x_ilt_mem_op(bp, ILT_MEMOP_ALLOC)) @@ -8569,7 +8429,6 @@ int bnx2x_alloc_mem(struct bnx2x *bp) if (bnx2x_iov_alloc_mem(bp)) goto alloc_mem_err; #endif - /* Slow path ring */ BNX2X_PCI_ALLOC(bp->spq, &bp->spq_mapping, BCM_PAGE_SIZE); @@ -8588,449 +8447,149 @@ int bnx2x_alloc_mem(struct bnx2x *bp) alloc_mem_err: bnx2x_free_mem(bp); + BNX2X_ERR("Can't allocate memory\n"); return -ENOMEM; } - /* * Init service functions */ -int bnx2x_func_start(struct bnx2x *bp) -{ - bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_START, 0, 0, 0, 1); - - /* Wait for completion */ - return bnx2x_wait_ramrod(bp, BNX2X_STATE_FUNC_STARTED, - 0, &(bp->state), 0); -} - -int bnx2x_func_stop(struct bnx2x *bp) -{ - bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_STOP, 0, 0, 0, 1); - - /* Wait for completion */ - return bnx2x_wait_ramrod(bp, BNX2X_STATE_CLOSING_WAIT4_UNLOAD, - 0, &(bp->state), 0); -} - -int bnx2x_wait_ramrod(struct bnx2x *bp, u16 state, int idx, - u16 *state_p, int poll) -{ - /* can take a while if any port is running */ - int cnt = 5000; - - if (CHIP_REV_IS_EMUL(bp)) - cnt*=20; - - DP(NETIF_MSG_IFUP, "%s for state to become %x on IDX [%d]\n", - poll ? "polling" : "waiting", state, idx); - - might_sleep(); - while (cnt--) { - if (poll) { - bnx2x_rx_int(bp->fp, 10); - /* if index is different from 0 - * the reply for some commands will - * be on the non default queue - */ - if (idx) - bnx2x_rx_int(&bp->fp[idx], 10); - } - - mb(); /* state is changed by bnx2x_sp_event() */ - if (*state_p == state) { -#ifdef BNX2X_STOP_ON_ERROR - DP(NETIF_MSG_IFUP, "exit (cnt %d)\n", 5000 - cnt); -#endif - return 0; - } - - msleep(1); - - if (bp->panic) - return -EIO; - } - - /* timeout! */ - BNX2X_ERR("timeout %s for state %x on IDX [%d]\n", - poll ? "polling" : "waiting", state, idx); -#ifdef BNX2X_STOP_ON_ERROR - bnx2x_panic(); -#endif - - return -EBUSY; -} - -int bnx2x_set_vlan_one(struct bnx2x *bp, u16 vtag, - struct bnx2x_vlan_mac_obj *obj, bool set, - unsigned long ramrod_flags, bool consume_credit) -{ - int rc; - struct bnx2x_vlan_mac_ramrod_params ramrod_param; - - BNX2X_ERR("Adding/Deleting VLAN - set = %d, vtag = %d\n", set, vtag); - - memset(&ramrod_param, 0, sizeof(ramrod_param)); - - ramrod_param.data.vlan.vlan = vtag; - ramrod_param.vlan_mac_obj = obj; - ramrod_param.ramrod_flags = ramrod_flags; - if (!consume_credit) - set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, - &ramrod_param.vlan_mac_flags); - - rc = bnx2x_config_vlan_mac(bp, &ramrod_param, set); - if (rc) - BNX2X_ERR("%s VLAN %d failed\n", (set ? "Set" : "Del"), vtag); - return rc; -} - int bnx2x_set_mac_one(struct bnx2x *bp, u8 *mac, struct bnx2x_vlan_mac_obj *obj, bool set, - int mac_type, unsigned long ramrod_flags) + int mac_type, unsigned long *ramrod_flags) { int rc; struct bnx2x_vlan_mac_ramrod_params ramrod_param; memset(&ramrod_param, 0, sizeof(ramrod_param)); - memcpy(ramrod_param.data.mac.mac, mac, ETH_ALEN); + /* Fill general parameters */ ramrod_param.vlan_mac_obj = obj; + ramrod_param.ramrod_flags = *ramrod_flags; - ramrod_param.ramrod_flags = ramrod_flags; - set_bit(mac_type, &ramrod_param.vlan_mac_flags); + /* Fill a user request section if needed */ + if (!test_bit(RAMROD_CONT, ramrod_flags)) { + memcpy(ramrod_param.user_req.u.mac.mac, mac, ETH_ALEN); + + __set_bit(mac_type, &ramrod_param.user_req.vlan_mac_flags); + + /* Set the command: ADD or DEL */ + if (set) + ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_ADD; + else + ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_DEL; + } + + rc = bnx2x_config_vlan_mac(bp, &ramrod_param); + + if (rc == -EEXIST) { + DP(BNX2X_MSG_SP, "Failed to schedule ADD operations: %d\n", rc); + /* do not treat adding same MAC as error */ + rc = 0; + } else if (rc < 0) + BNX2X_ERR("%s MAC failed\n", (set ? "Set" : "Del")); - rc = bnx2x_config_vlan_mac(bp, &ramrod_param, set); - if (rc) - BNX2X_ERR("%s MAC failed\n", (set? "Set" : "Del")); return rc; } -/** - * Configure a MAC address using the specific MAC Object. - * - * @param mac MAC address - * @param bp driver object - * @param add if true adds a new address, otherwise - deletes - * @param mac_type Address type: BNX2X_ETH_MAC, BNX2X_BCAST_MAC, - * BNX2X_ISCSI_ETH_MAC. - */ -static inline -int bnx2x_set_eth_mac_one(u8 *mac, struct bnx2x *bp, - struct bnx2x_vlan_mac_obj *obj, bool add, - int mac_type) +int bnx2x_del_all_macs(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *mac_obj, + int mac_type, bool wait_for_comp) +{ + int rc; + unsigned long ramrod_flags = 0, vlan_mac_flags = 0; + + /* Wait for completion of requested */ + if (wait_for_comp) + __set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + + /* Set the mac type of addresses we want to clear */ + __set_bit(mac_type, &vlan_mac_flags); + + rc = mac_obj->delete_all(bp, mac_obj, &vlan_mac_flags, &ramrod_flags); + if (rc < 0) + BNX2X_ERR("Failed to delete MACs: %d\n", rc); + + return rc; +} + +int bnx2x_set_eth_mac(struct bnx2x *bp, bool set) { unsigned long ramrod_flags = 0; - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - return bnx2x_set_mac_one(bp, mac, obj, add, mac_type, ramrod_flags); -} - -void bnx2x_set_eth_mac(struct bnx2x *bp, bool set) -{ - BNX2X_ERR("Adding/Deleting Eth MAC - set = %d\n", set); - /* Eth MAC is set on RSS leading client (fp[0]) */ - bnx2x_set_eth_mac_one(bp->dev->dev_addr, bp, &bp->fp->mac_obj, set, - BNX2X_ETH_MAC); - - if (CHIP_IS_E1(bp)) { - /* broadcast MAC */ - u8 bcast[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; - - bnx2x_set_eth_mac_one(bcast, bp, &bp->fp->mac_obj, set, - BNX2X_BCAST_MAC); - } -} - - - #ifdef BCM_CNIC -/** - * Set iSCSI MAC(s) at the next enties in the CAM after the ETH - * MAC(s). This function will wait until the ramdord completion - * returns. - * - * @param bp driver handle - * @param set set or clear the CAM entry - * - * @return 0 if succeeded - */ -int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, bool set) -{ - return bnx2x_set_eth_mac_one(bp->iscsi_mac, bp, &bp->iscsi_l2_mac_obj, - set, BNX2X_ISCSI_ETH_MAC); -} - -/** - * Set FCoE L2 MAC(s) at the next enties in the CAM after the - * ETH MAC(s). This function will wait until the ramdord - * completion returns. - * - * @param bp driver handle - * @param set set or clear the CAM entry - * - * @return 0 if cussess, -ENODEV if ramrod doesn't return. - */ -int bnx2x_set_fip_eth_mac_addr(struct bnx2x *bp, bool set) -{ - return bnx2x_set_eth_mac_one(bp->fip_mac, bp, &bnx2x_fcoe(bp, mac_obj), - set, BNX2X_ETH_MAC); -} - -int bnx2x_set_all_enode_macs(struct bnx2x *bp, bool set) -{ - return bnx2x_set_eth_mac_one(ALL_ENODE_MACS, bp, - &bnx2x_fcoe(bp, mac_obj), set, - BNX2X_ETH_MAC); -} + if (is_zero_ether_addr(bp->dev->dev_addr) && + (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) { + DP(NETIF_MSG_IFUP | NETIF_MSG_IFDOWN, + "Ignoring Zero MAC for STORAGE SD mode\n"); + return 0; + } #endif + DP(NETIF_MSG_IFUP, "Adding Eth MAC\n"); + + __set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + /* Eth MAC is set on RSS leading client (fp[0]) */ + return bnx2x_set_mac_one(bp, bp->dev->dev_addr, &bp->fp->mac_obj, set, + BNX2X_ETH_MAC, &ramrod_flags); +} + int bnx2x_setup_leading(struct bnx2x *bp) { - return bnx2x_setup_client(bp, &bp->fp[0], 1); + return bnx2x_setup_queue(bp, &bp->fp[0], 1); } -static void bnx2x_fill_cl_init_data(struct bnx2x *bp, - struct bnx2x_client_init_params *params, - u8 activate, - struct client_init_ramrod_data *data) -{ - /* Clear the buffer */ - memset(data, 0, sizeof(*data)); - - /* general */ - data->general.client_id = params->rxq_params.cl_id; - data->general.statistics_counter_id = params->rxq_params.stat_id; - data->general.statistics_en_flg = - test_bit(BNX2X_QUEUE_FLG_STATS, ¶ms->rxq_params.flags); - data->general.statistics_zero_flg = - test_bit(BNX2X_QUEUE_FLG_ZERO_STATS, ¶ms->rxq_params.flags); - - data->general.is_fcoe_flg = test_bit(CLIENT_IS_FCOE, - ¶ms->ramrod_params.client_flags); - data->general.activate_flg = activate; - data->general.sp_client_id = params->rxq_params.spcl_id; - data->general.mtu = cpu_to_le16(params->rxq_params.mtu); - - - /* Rx data */ - data->rx.tpa_en_flg = - test_bit(BNX2X_QUEUE_FLG_TPA, ¶ms->rxq_params.flags); - data->rx.vmqueue_mode_en_flg = 0; - data->rx.extra_data_over_sgl_en_flg = - test_bit(BNX2X_QUEUE_FLG_OOO, ¶ms->rxq_params.flags); - data->rx.cache_line_alignment_log_size = - params->rxq_params.cache_line_log; - data->rx.enable_dynamic_hc = - test_bit(BNX2X_QUEUE_FLG_DHC, ¶ms->rxq_params.flags); - data->rx.max_sges_for_packet = params->rxq_params.max_sges_pkt; - data->rx.client_qzone_id = params->rxq_params.cl_qzone_id; - data->rx.max_agg_size = params->rxq_params.tpa_agg_sz; - - /* We don't set drop flags */ - data->rx.drop_ip_cs_err_flg = 0; - data->rx.drop_tcp_cs_err_flg = 0; - data->rx.drop_ttl0_flg = 0; - data->rx.drop_udp_cs_err_flg = 0; - - data->rx.inner_vlan_removal_enable_flg = - test_bit(BNX2X_QUEUE_FLG_VLAN, ¶ms->rxq_params.flags); - data->rx.outer_vlan_removal_enable_flg = - test_bit(BNX2X_QUEUE_FLG_OV, ¶ms->rxq_params.flags); - data->rx.status_block_id = params->rxq_params.fw_sb_id; - data->rx.rx_sb_index_number = params->rxq_params.sb_cq_index; - data->rx.rss_mode = params->rxq_params.rss_mode; - data->rx.max_tpa_queues = params->rxq_params.max_tpa_queues; - data->rx.max_bytes_on_bd = cpu_to_le16(params->rxq_params.buf_sz); - data->rx.sge_buff_size = cpu_to_le16(params->rxq_params.sge_buf_sz); - data->rx.bd_page_base.lo = - cpu_to_le32(U64_LO(params->rxq_params.dscr_map)); - data->rx.bd_page_base.hi = - cpu_to_le32(U64_HI(params->rxq_params.dscr_map)); - data->rx.sge_page_base.lo = - cpu_to_le32(U64_LO(params->rxq_params.sge_map)); - data->rx.sge_page_base.hi = - cpu_to_le32(U64_HI(params->rxq_params.sge_map)); - data->rx.cqe_page_base.lo = - cpu_to_le32(U64_LO(params->rxq_params.rcq_map)); - data->rx.cqe_page_base.hi = - cpu_to_le32(U64_HI(params->rxq_params.rcq_map)); - data->rx.is_leading_rss = test_bit(CLIENT_IS_LEADING_RSS, - ¶ms->ramrod_params.client_flags); - data->rx.is_approx_mcast = test_bit(CLIENT_IS_MULTICAST, - ¶ms->ramrod_params.client_flags); - - /* Tx data */ - data->tx.enforce_security_flg = - test_bit(BNX2X_QUEUE_FLG_TX_SEC, ¶ms->txq_params.flags); - data->tx.tx_switching_flg = - test_bit(BNX2X_QUEUE_FLG_TX_SWITCH, ¶ms->txq_params.flags); - data->tx.tx_status_block_id = params->txq_params.fw_sb_id; - data->tx.tx_sb_index_number = params->txq_params.sb_cq_index; - data->tx.tss_leading_client_id = params->txq_params.tss_leading_cl_id; - - data->tx.tx_bd_page_base.lo = - cpu_to_le32(U64_LO(params->txq_params.dscr_map)); - data->tx.tx_bd_page_base.hi = - cpu_to_le32(U64_HI(params->txq_params.dscr_map)); - - /* flow control data */ - data->fc.cqe_pause_thr_low = cpu_to_le16(params->pause.rcq_th_lo); - data->fc.cqe_pause_thr_high = cpu_to_le16(params->pause.rcq_th_hi); - data->fc.bd_pause_thr_low = cpu_to_le16(params->pause.bd_th_lo); - data->fc.bd_pause_thr_high = cpu_to_le16(params->pause.bd_th_hi); - data->fc.sge_pause_thr_low = cpu_to_le16(params->pause.sge_th_lo); - data->fc.sge_pause_thr_high = cpu_to_le16(params->pause.sge_th_hi); - data->fc.rx_cos_mask = cpu_to_le16(params->pause.pri_map); - - data->fc.safc_group_num = params->txq_params.cos; - data->fc.safc_group_en_flg = - test_bit(BNX2X_QUEUE_FLG_COS, ¶ms->txq_params.flags); - data->fc.traffic_type = - test_bit(CLIENT_IS_FCOE, ¶ms->ramrod_params.client_flags) ? - LLFC_TRAFFIC_TYPE_FCOE : LLFC_TRAFFIC_TYPE_NW; -} - -static inline void bnx2x_set_ctx_validation(struct eth_context *cxt, u32 cid) -{ - /* ustorm cxt validation */ - cxt->ustorm_ag_context.cdu_usage = - CDU_RSRVD_VALUE_TYPE_A(cid, CDU_REGION_NUMBER_UCM_AG, - ETH_CONNECTION_TYPE); - /* xcontext validation */ - cxt->xstorm_ag_context.cdu_reserved = - CDU_RSRVD_VALUE_TYPE_A(cid, CDU_REGION_NUMBER_XCM_AG, - ETH_CONNECTION_TYPE); -} - -int bnx2x_setup_fw_client(struct bnx2x *bp, - struct bnx2x_client_init_params *params, - u8 activate, - struct client_init_ramrod_data *data, - dma_addr_t data_mapping) -{ - u16 hc_usec; - int ramrod = test_bit(CLIENT_IS_FWD, - ¶ms->ramrod_params.client_flags) ? - RAMROD_CMD_ID_ETH_FORWARD_SETUP : - RAMROD_CMD_ID_ETH_CLIENT_SETUP; - int poll = 0, rc; - - /* HC and context validation values */ - if (!test_bit(CLIENT_IS_OOO, ¶ms->ramrod_params.client_flags)) { - hc_usec = params->txq_params.hc_rate ? - 1000000 / params->txq_params.hc_rate : 0; - bnx2x_update_coalesce_sb_index(bp, params->txq_params.fw_sb_id, - params->txq_params.sb_cq_index, - !test_bit(BNX2X_QUEUE_FLG_HC, - ¶ms->txq_params.flags), - hc_usec); - } else /* OOO, we don't have a NAPI for OOO client to handle the CQE */ - poll = 1; - - if (!test_bit(CLIENT_IS_FWD, ¶ms->ramrod_params.client_flags)) { - hc_usec = params->rxq_params.hc_rate ? - 1000000 / params->rxq_params.hc_rate : 0; - bnx2x_update_coalesce_sb_index(bp, params->rxq_params.fw_sb_id, - params->rxq_params.sb_cq_index, - !test_bit(BNX2X_QUEUE_FLG_HC, - ¶ms->rxq_params.flags), - hc_usec); - *(params->ramrod_params.pstate) = BNX2X_FP_STATE_OPENING; - - bnx2x_set_ctx_validation(params->rxq_params.cxt, - params->rxq_params.cid); - } else /* FWD */ - bnx2x_set_ctx_validation(params->txq_params.cxt, - params->txq_params.cid); - - /* Fill the ramrod data */ - bnx2x_fill_cl_init_data(bp, params, activate, data); - - /* SETUP ramrod. - * - * bnx2x_sp_post() takes a spin_lock thus no other explict memory - * barrier except from mmiowb() is needed to impose a - * proper ordering of memory operations. - */ - mmiowb(); - - - bnx2x_sp_post(bp, ramrod, params->ramrod_params.cid, - U64_HI(data_mapping), U64_LO(data_mapping), 0); - - /* Wait for completion */ - rc = bnx2x_wait_ramrod(bp, params->ramrod_params.state, - params->ramrod_params.index, - params->ramrod_params.pstate, - poll); - return rc; -} - - /** - * Configure interrupt mode according to current configuration. + * bnx2x_set_int_mode - configure interrupt mode + * + * @bp: driver handle + * * In case of MSI-X it will also try to enable MSI-X. - * - * @param bp - * - * @return int */ -static int __devinit bnx2x_set_int_mode(struct bnx2x *bp) +void bnx2x_set_int_mode(struct bnx2x *bp) { - int rc = 0; - switch (int_mode) { - case INT_MODE_INTx: case INT_MODE_MSI: - bp->num_queues = 1 + NONE_ETH_CONTEXT_USE; - DP(NETIF_MSG_IFUP, "set number of queues to 1\n"); + bnx2x_enable_msi(bp); + /* falling through... */ + case INT_MODE_INTx: + bp->num_queues = 1 + NON_ETH_CONTEXT_USE; + BNX2X_DEV_INFO("set number of queues to 1\n"); break; default: - /* Set number of queues according to bp->multi_mode value */ - bnx2x_set_num_queues(bp); - - DP(NETIF_MSG_IFUP, "set number of queues to %d\n", bp->num_queues); - /* if we can't use MSI-X we only need one fp, * so try to enable MSI-X with the requested number of fp's * and fallback to MSI or legacy INTx with one fp */ - rc = bnx2x_enable_msix(bp); - if (rc) { - /* failed to enable MSI-X */ - if (bp->multi_mode) - DP(NETIF_MSG_IFUP, - "Multi requested but failed to " - "enable MSI-X (%d), " - "set number of queues to %d\n", - bp->num_queues, 1 + NONE_ETH_CONTEXT_USE); - bp->num_queues = 1 + NONE_ETH_CONTEXT_USE; + if (bnx2x_enable_msix(bp) || + bp->flags & USING_SINGLE_MSIX_FLAG) { + /* failed to enable multiple MSI-X */ + BNX2X_DEV_INFO("Failed to enable multiple MSI-X (%d), set number of queues to %d\n", + bp->num_queues, 1 + NON_ETH_CONTEXT_USE); + + bp->num_queues = 1 + NON_ETH_CONTEXT_USE; + + /* Try to enable MSI */ + if (!(bp->flags & USING_SINGLE_MSIX_FLAG) && + !(bp->flags & DISABLE_MSI_FLAG)) + bnx2x_enable_msi(bp); } break; } -#ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - bp->dev->real_num_tx_queues = bp->num_queues - OOO_CONTEXT_USE; - -#ifdef BCM_CNIC - if (NO_FCOE(bp)) - bp->dev->real_num_tx_queues -= FCOE_CONTEXT_USE; -#endif -#endif - return rc; + bp->init_num_queues = bp->num_queues; } /* must be called prioir to any HW initializations */ static inline u16 bnx2x_cid_ilt_lines(struct bnx2x *bp) { -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ +#ifdef BCM_IOV /* non BNX2X_UPSTREAM */ #if (BNX2X_FIRST_VF_CID > 0) return (BNX2X_FIRST_VF_CID + BNX2X_VF_CIDS)/ILT_PAGE_CIDS; #else return (L2_ILT_LINES(bp) + BNX2X_VF_CIDS/ILT_PAGE_CIDS); #endif -#else +#else /* BNX2X_UPSTREAM */ return L2_ILT_LINES(bp); #endif } @@ -9038,11 +8597,11 @@ static inline u16 bnx2x_cid_ilt_lines(struct bnx2x *bp) void bnx2x_ilt_set_info(struct bnx2x *bp) { struct ilt_client_info *ilt_client; - struct bnx2x_ilt * ilt = BP_ILT(bp); + struct bnx2x_ilt *ilt = BP_ILT(bp); u16 line = 0; ilt->start_line = FUNC_ILT_BASE(BP_FUNC(bp)); - DP(BNX2X_MSG_SP, "ilt starts at line %d\n", ilt->start_line); + DP(NETIF_MSG_IFUP, "ilt starts at line %d\n", ilt->start_line); /* CDU */ ilt_client = &ilt->clients[ILT_CLIENT_CDU]; @@ -9054,10 +8613,9 @@ void bnx2x_ilt_set_info(struct bnx2x *bp) #ifdef BCM_CNIC line += CNIC_ILT_LINES; #endif - ilt_client->end = line -1; + ilt_client->end = line - 1; - DP(BNX2X_MSG_SP, "ilt client[CDU]: start %d, end %d, psz 0x%x, " - "flags 0x%x, hw psz %d\n", + DP(NETIF_MSG_IFUP, "ilt client[CDU]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n", ilt_client->start, ilt_client->end, ilt_client->page_size, @@ -9076,10 +8634,10 @@ void bnx2x_ilt_set_info(struct bnx2x *bp) line += DIV_ROUND_UP(bp->qm_cid_count * QM_QUEUES_PER_FUNC * 4, QM_ILT_PAGE_SZ); - ilt_client->end = line -1; + ilt_client->end = line - 1; - DP(BNX2X_MSG_SP, "ilt client[QM]: start %d, end %d, psz 0x%x, " - "flags 0x%x, hw psz %d\n", + DP(NETIF_MSG_IFUP, + "ilt client[QM]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n", ilt_client->start, ilt_client->end, ilt_client->page_size, @@ -9095,10 +8653,10 @@ void bnx2x_ilt_set_info(struct bnx2x *bp) ilt_client->flags = 0; ilt_client->start = line; line += SRC_ILT_LINES; - ilt_client->end = line -1; + ilt_client->end = line - 1; - DP(BNX2X_MSG_SP, "ilt client[SRC]: start %d, end %d, psz 0x%x, " - "flags 0x%x, hw psz %d\n", + DP(NETIF_MSG_IFUP, + "ilt client[SRC]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n", ilt_client->start, ilt_client->end, ilt_client->page_size, @@ -9117,10 +8675,10 @@ void bnx2x_ilt_set_info(struct bnx2x *bp) ilt_client->flags = 0; ilt_client->start = line; line += TM_ILT_LINES; - ilt_client->end = line -1; + ilt_client->end = line - 1; - DP(BNX2X_MSG_SP, "ilt client[TM]: start %d, end %d, psz 0x%x, " - "flags 0x%x, hw psz %d\n", + DP(NETIF_MSG_IFUP, + "ilt client[TM]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n", ilt_client->start, ilt_client->end, ilt_client->page_size, @@ -9130,123 +8688,278 @@ void bnx2x_ilt_set_info(struct bnx2x *bp) #else ilt_client->flags = (ILT_CLIENT_SKIP_INIT | ILT_CLIENT_SKIP_MEM); #endif + BUG_ON(line > ILT_MAX_LINES); } -int bnx2x_setup_client(struct bnx2x *bp, struct bnx2x_fastpath *fp, - int leading) +/** + * bnx2x_pf_q_prep_init - prepare INIT transition parameters + * + * @bp: driver handle + * @fp: pointer to fastpath + * @init_params: pointer to parameters structure + * + * parameters configured: + * - HC configuration + * - Queue's CDU context + */ +static inline void bnx2x_pf_q_prep_init(struct bnx2x *bp, + struct bnx2x_fastpath *fp, struct bnx2x_queue_init_params *init_params) { - struct bnx2x_client_init_params params = {{0}}; + + u8 cos; + int cxt_index, cxt_offset; + + /* FCoE Queue uses Default SB, thus has no HC capabilities */ + if (!IS_FCOE_FP(fp)) { + __set_bit(BNX2X_Q_FLG_HC, &init_params->rx.flags); + __set_bit(BNX2X_Q_FLG_HC, &init_params->tx.flags); + + /* If HC is supporterd, enable host coalescing in the transition + * to INIT state. + */ + __set_bit(BNX2X_Q_FLG_HC_EN, &init_params->rx.flags); + __set_bit(BNX2X_Q_FLG_HC_EN, &init_params->tx.flags); + + /* HC rate */ + init_params->rx.hc_rate = bp->rx_ticks ? + (1000000 / bp->rx_ticks) : 0; + init_params->tx.hc_rate = bp->tx_ticks ? + (1000000 / bp->tx_ticks) : 0; + + /* FW SB ID */ + init_params->rx.fw_sb_id = init_params->tx.fw_sb_id = + fp->fw_sb_id; + + /* + * CQ index among the SB indices: FCoE clients uses the default + * SB, therefore it's different. + */ + init_params->rx.sb_cq_index = HC_INDEX_ETH_RX_CQ_CONS; + init_params->tx.sb_cq_index = HC_INDEX_ETH_FIRST_TX_CQ_CONS; + } + + /* set maximum number of COSs supported by this queue */ + init_params->max_cos = fp->max_cos; + + DP(NETIF_MSG_IFUP, "fp: %d setting queue params max cos to: %d\n", + fp->index, init_params->max_cos); + + /* set the context pointers queue object */ + for (cos = FIRST_TX_COS_INDEX; cos < init_params->max_cos; cos++) { + cxt_index = fp->txdata_ptr[cos]->cid / ILT_PAGE_CIDS; + cxt_offset = fp->txdata_ptr[cos]->cid - (cxt_index * + ILT_PAGE_CIDS); + init_params->cxts[cos] = + &bp->context[cxt_index].vcxt[cxt_offset].eth; + } +} + +static int bnx2x_setup_tx_only(struct bnx2x *bp, struct bnx2x_fastpath *fp, + struct bnx2x_queue_state_params *q_params, + struct bnx2x_queue_setup_tx_only_params *tx_only_params, + int tx_index, bool leading) +{ + memset(tx_only_params, 0, sizeof(*tx_only_params)); + + /* Set the command */ + q_params->cmd = BNX2X_Q_CMD_SETUP_TX_ONLY; + + /* Set tx-only QUEUE flags: don't zero statistics */ + tx_only_params->flags = bnx2x_get_common_flags(bp, fp, false); + + /* choose the index of the cid to send the slow path on */ + tx_only_params->cid_index = tx_index; + + /* Set general TX_ONLY_SETUP parameters */ + bnx2x_pf_q_prep_general(bp, fp, &tx_only_params->gen_params, tx_index); + + /* Set Tx TX_ONLY_SETUP parameters */ + bnx2x_pf_tx_q_prep(bp, fp, &tx_only_params->txq_params, tx_index); + + DP(NETIF_MSG_IFUP, + "preparing to send tx-only ramrod for connection: cos %d, primary cid %d, cid %d, client id %d, sp-client id %d, flags %lx\n", + tx_index, q_params->q_obj->cids[FIRST_TX_COS_INDEX], + q_params->q_obj->cids[tx_index], q_params->q_obj->cl_id, + tx_only_params->gen_params.spcl_id, tx_only_params->flags); + + /* send the ramrod */ + return bnx2x_queue_state_change(bp, q_params); +} + + +/** + * bnx2x_setup_queue - setup queue + * + * @bp: driver handle + * @fp: pointer to fastpath + * @leading: is leading + * + * This function performs 2 steps in a Queue state machine + * actually: 1) RESET->INIT 2) INIT->SETUP + */ + +int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp, + bool leading) +{ + struct bnx2x_queue_state_params q_params = {NULL}; + struct bnx2x_queue_setup_params *setup_params = + &q_params.params.setup; + struct bnx2x_queue_setup_tx_only_params *tx_only_params = + &q_params.params.tx_only; int rc; + u8 tx_index; + + DP(NETIF_MSG_IFUP, "setting up queue %d\n", fp->index); /* reset IGU state skip FCoE L2 queue */ if (!IS_FCOE_FP(fp)) bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_ENABLE, 0); - params.ramrod_params.pstate = &fp->state; - params.ramrod_params.state = BNX2X_FP_STATE_OPEN; - params.ramrod_params.index = fp->index; - params.ramrod_params.cid = fp->cid; + q_params.q_obj = &fp->q_obj; + /* We want to wait for completion in this context */ + __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags); -#ifdef BCM_CNIC - if (IS_FCOE_FP(fp)) - set_bit(CLIENT_IS_FCOE, ¶ms.ramrod_params.client_flags); + /* Prepare the INIT parameters */ + bnx2x_pf_q_prep_init(bp, fp, &q_params.params.init); - if (IS_OOO_FP(fp)) - set_bit(CLIENT_IS_OOO, ¶ms.ramrod_params.client_flags); + /* Set the command */ + q_params.cmd = BNX2X_Q_CMD_INIT; - if (IS_FWD_FP(fp)) { - set_bit(CLIENT_IS_FWD, ¶ms.ramrod_params.client_flags); - - /* Wait for consumer to become 1 */ - params.ramrod_params.pstate = bnx2x_fwd(bp, tx_cons_sb); - params.ramrod_params.state = cpu_to_le16(1); - } -#endif - if (leading) { -#ifndef BNX2X_NETQ /* BNX2X_UPSTREAM */ - set_bit(CLIENT_IS_LEADING_RSS, - ¶ms.ramrod_params.client_flags); -#endif - set_bit(CLIENT_IS_MULTICAST, - ¶ms.ramrod_params.client_flags); + /* Change the state to INIT */ + rc = bnx2x_queue_state_change(bp, &q_params); + if (rc) { + BNX2X_ERR("Queue(%d) INIT failed\n", fp->index); + return rc; } - if (!IS_FWD_FP(fp)) - bnx2x_pf_rx_cl_prep(bp, fp, ¶ms.pause, ¶ms.rxq_params); + DP(NETIF_MSG_IFUP, "init complete\n"); +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if ((IS_FWD_FP(fp))) + return bnx2x_setup_tx_only(bp, fp, &q_params, tx_only_params, + FIRST_TX_COS_INDEX, leading); +#endif + + /* Now move the Queue to the SETUP state... */ + memset(setup_params, 0, sizeof(*setup_params)); + + /* Set QUEUE flags */ + setup_params->flags = bnx2x_get_q_flags(bp, fp, leading); + + /* Set general SETUP parameters */ + bnx2x_pf_q_prep_general(bp, fp, &setup_params->gen_params, + FIRST_TX_COS_INDEX); + + bnx2x_pf_rx_q_prep(bp, fp, &setup_params->pause_params, + &setup_params->rxq_params); + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + /* Set Tx SETUP parameters. OOO iSCSI L2 ring has no Tx. */ if (!IS_OOO_FP(fp)) - bnx2x_pf_tx_cl_prep(bp, fp, ¶ms.txq_params); - - rc = bnx2x_setup_fw_client(bp, ¶ms, 1, - bnx2x_sp(bp, client_data.init_data), - bnx2x_sp_mapping(bp, client_data.init_data)); - -#ifdef BCM_CNIC - if (!rc && IS_FWD_FP(fp)) - /* Set state of the Forwarding client to OPEN */ - bnx2x_fwd(bp, state) = BNX2X_FP_STATE_OPEN; #endif + bnx2x_pf_tx_q_prep(bp, fp, &setup_params->txq_params, + FIRST_TX_COS_INDEX); - return rc; -} + /* Set the command */ + q_params.cmd = BNX2X_Q_CMD_SETUP; -int bnx2x_stop_fw_client(struct bnx2x *bp, struct bnx2x_client_ramrod_params *p) -{ - int rc; - - if (!IS_FWD_IDX(p->index)) { - - /* halt the connection */ - *p->pstate = BNX2X_FP_STATE_HALTING; - bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_HALT, p->cid, 0, - p->cl_id, 0); - - /* Wait for completion, poll if it's an OOO Client - OOO - * Client doesn't have a NAPI to handle a CQE - */ - rc = bnx2x_wait_ramrod(bp, BNX2X_FP_STATE_HALTED, p->index, - p->pstate, - test_bit(CLIENT_IS_OOO, &p->client_flags)); - if (rc) /* timeout */ - return rc; - - *p->pstate = BNX2X_FP_STATE_TERMINATING; - bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_TERMINATE, p->cid, 0, - p->cl_id, 0); - /* Wait for completion */ - rc = bnx2x_wait_ramrod(bp, BNX2X_FP_STATE_TERMINATED, p->index, - p->pstate, - test_bit(CLIENT_IS_OOO, &p->client_flags)); - if (rc) /* timeout */ - return rc; + /* Change the state to SETUP */ + rc = bnx2x_queue_state_change(bp, &q_params); + if (rc) { + BNX2X_ERR("Queue(%d) SETUP failed\n", fp->index); + return rc; } - /* delete cfc entry */ - bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_CFC_DEL, p->cid, 0, 0, 1); + /* loop through the relevant tx-only indices */ + for (tx_index = FIRST_TX_ONLY_COS_INDEX; + tx_index < fp->max_cos; + tx_index++) { + + /* prepare and send tx-only ramrod*/ + rc = bnx2x_setup_tx_only(bp, fp, &q_params, + tx_only_params, tx_index, leading); + if (rc) { + BNX2X_ERR("Queue(%d.%d) TX_ONLY_SETUP failed\n", + fp->index, tx_index); + return rc; + } + } - /* Wait for completion */ - rc = bnx2x_wait_ramrod(bp, BNX2X_FP_STATE_CLOSED, p->index, - p->pstate, 0); return rc; } -static int bnx2x_stop_client(struct bnx2x *bp, int index) +int bnx2x_stop_queue(struct bnx2x *bp, int index) { - struct bnx2x_client_ramrod_params client_stop = {0}; struct bnx2x_fastpath *fp = &bp->fp[index]; + struct bnx2x_fp_txdata *txdata; + struct bnx2x_queue_state_params q_params = {NULL}; + int rc, tx_index; - client_stop.index = index; - client_stop.cid = fp->cid; - client_stop.cl_id = fp->cl_id; - client_stop.pstate = &(fp->state); - /* Poll for the completion on OOO ring only as long it's - * promissed that there are no fast path CQEs at this stage. - */ - if (IS_OOO_IDX(index)) - set_bit(CLIENT_IS_OOO, &client_stop.client_flags); + DP(NETIF_MSG_IFDOWN, "stopping queue %d cid %d\n", index, fp->cid); - return bnx2x_stop_fw_client(bp, &client_stop); + q_params.q_obj = &fp->q_obj; + /* We want to wait for completion in this context */ + __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags); + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (!IS_FWD_FP(fp)) { +#endif + + /* close tx-only connections */ + for (tx_index = FIRST_TX_ONLY_COS_INDEX; + tx_index < fp->max_cos; + tx_index++){ + + /* ascertain this is a normal queue*/ + txdata = fp->txdata_ptr[tx_index]; + + DP(NETIF_MSG_IFDOWN, "stopping tx-only queue %d\n", + txdata->txq_index); + + /* send halt terminate on tx-only connection */ + q_params.cmd = BNX2X_Q_CMD_TERMINATE; + memset(&q_params.params.terminate, 0, + sizeof(q_params.params.terminate)); + q_params.params.terminate.cid_index = tx_index; + + rc = bnx2x_queue_state_change(bp, &q_params); + if (rc) + return rc; + + /* send halt terminate on tx-only connection */ + q_params.cmd = BNX2X_Q_CMD_CFC_DEL; + memset(&q_params.params.cfc_del, 0, + sizeof(q_params.params.cfc_del)); + q_params.params.cfc_del.cid_index = tx_index; + rc = bnx2x_queue_state_change(bp, &q_params); + if (rc) + return rc; + } + /* Stop the primary connection: */ + /* ...halt the connection */ + q_params.cmd = BNX2X_Q_CMD_HALT; + rc = bnx2x_queue_state_change(bp, &q_params); + if (rc) + return rc; + + /* ...terminate the connection */ + q_params.cmd = BNX2X_Q_CMD_TERMINATE; + memset(&q_params.params.terminate, 0, + sizeof(q_params.params.terminate)); + q_params.params.terminate.cid_index = FIRST_TX_COS_INDEX; + rc = bnx2x_queue_state_change(bp, &q_params); + if (rc) + return rc; +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + } +#endif + /* ...delete cfc entry */ + q_params.cmd = BNX2X_Q_CMD_CFC_DEL; + memset(&q_params.params.cfc_del, 0, + sizeof(q_params.params.cfc_del)); + q_params.params.cfc_del.cid_index = FIRST_TX_COS_INDEX; + return bnx2x_queue_state_change(bp, &q_params); } @@ -9255,12 +8968,6 @@ static void bnx2x_reset_func(struct bnx2x *bp) int port = BP_PORT(bp); int func = BP_FUNC(bp); int i; - int pfunc_offset_fp = offsetof(struct hc_sb_data, p_func) + - (CHIP_IS_E2(bp) ? - offsetof(struct hc_status_block_data_e2, common) : - offsetof(struct hc_status_block_data_e1x, common)); - int pfunc_offset_sp = offsetof(struct hc_sp_status_block_data, p_func); - int pfid_offset = offsetof(struct pci_entity, pf_id); /* Disable the function in the FW */ REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(func), 0); @@ -9271,21 +8978,21 @@ static void bnx2x_reset_func(struct bnx2x *bp) /* FP SBs */ for_each_eth_queue(bp, i) { struct bnx2x_fastpath *fp = &bp->fp[i]; - REG_WR8(bp, - BAR_CSTRORM_INTMEM + - CSTORM_STATUS_BLOCK_DATA_OFFSET(fp->fw_sb_id) - + pfunc_offset_fp + pfid_offset, - HC_FUNCTION_DISABLED); - + REG_WR8(bp, BAR_CSTRORM_INTMEM + + CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(fp->fw_sb_id), + SB_DISABLED); } +#ifdef BCM_CNIC + /* CNIC SB */ + REG_WR8(bp, BAR_CSTRORM_INTMEM + + CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(bnx2x_cnic_fw_sb_id(bp)), + SB_DISABLED); +#endif /* SP SB */ - REG_WR8(bp, - BAR_CSTRORM_INTMEM + - CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(func) + - pfunc_offset_sp + pfid_offset, - HC_FUNCTION_DISABLED); - + REG_WR8(bp, BAR_CSTRORM_INTMEM + + CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(func), + SB_DISABLED); for (i = 0; i < XSTORM_SPQ_DATA_SIZE / 4; i++) REG_WR(bp, BAR_XSTRORM_INTMEM + XSTORM_SPQ_DATA_OFFSET(func), @@ -9319,7 +9026,7 @@ static void bnx2x_reset_func(struct bnx2x *bp) /* Timers workaround bug for E2: if this is vnic-3, * we need to set the entire ilt range for this timers. */ - if (CHIP_IS_E2(bp) && BP_VN(bp) == 3) { + if (!CHIP_IS_E1x(bp) && BP_VN(bp) == 3) { struct ilt_client_info ilt_cli; /* use dummy TM client */ memset(&ilt_cli, 0, sizeof(struct ilt_client_info)); @@ -9331,7 +9038,7 @@ static void bnx2x_reset_func(struct bnx2x *bp) } /* this assumes that reset_port() called before reset_func()*/ - if (CHIP_IS_E2(bp)) + if (!CHIP_IS_E1x(bp)) bnx2x_pf_disable(bp); bp->dmae_ready = 0; @@ -9342,6 +9049,9 @@ static void bnx2x_reset_port(struct bnx2x *bp) int port = BP_PORT(bp); u32 val; + /* Reset physical Link */ + bnx2x__link_reset(bp); + REG_WR(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 0); /* Do not rcv packets to BRB */ @@ -9363,111 +9073,65 @@ static void bnx2x_reset_port(struct bnx2x *bp) /* TODO: Close Doorbell port? */ } -static void bnx2x_reset_chip(struct bnx2x *bp, u32 reset_code) +static inline int bnx2x_reset_hw(struct bnx2x *bp, u32 load_code) { - DP(BNX2X_MSG_MCP, "function %d reset_code %x\n", - BP_ABS_FUNC(bp), reset_code); + struct bnx2x_func_state_params func_params = {NULL}; - switch (reset_code) { - case FW_MSG_CODE_DRV_UNLOAD_COMMON: - bnx2x_reset_port(bp); - bnx2x_reset_func(bp); - bnx2x_reset_common(bp); - break; + /* Prepare parameters for function state transitions */ + __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); - case FW_MSG_CODE_DRV_UNLOAD_PORT: - bnx2x_reset_port(bp); - bnx2x_reset_func(bp); - break; + func_params.f_obj = &bp->func_obj; + func_params.cmd = BNX2X_F_CMD_HW_RESET; - case FW_MSG_CODE_DRV_UNLOAD_FUNCTION: - bnx2x_reset_func(bp); - break; + func_params.params.hw_init.load_phase = load_code; - default: - BNX2X_ERR("Unknown reset_code (0x%x) from MCP\n", reset_code); - break; - } + return bnx2x_func_state_change(bp, &func_params); } -#ifdef BCM_CNIC -static inline void bnx2x_del_fcoe_eth_macs(struct bnx2x *bp) +static inline int bnx2x_func_stop(struct bnx2x *bp) { - if (bp->flags & FCOE_MACS_SET) { - if (!IS_MF(bp)) - bnx2x_set_fip_eth_mac_addr(bp, 0); + struct bnx2x_func_state_params func_params = {NULL}; + int rc; - bnx2x_set_all_enode_macs(bp, 0); + /* Prepare parameters for function state transitions */ + __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); + func_params.f_obj = &bp->func_obj; + func_params.cmd = BNX2X_F_CMD_STOP; - bp->flags &= ~FCOE_MACS_SET; - } -} -#endif - -void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode) -{ - int port = BP_PORT(bp); - u32 reset_code = 0; - int i, rc; - - /* Wait until tx fastpath tasks complete */ - for_each_tx_queue(bp, i) { - struct bnx2x_fastpath *fp = &bp->fp[i]; - - rc = bnx2x_clean_tx_queue(bp, fp); -#ifdef BNX2X_STOP_ON_ERROR - if (rc) - return; -#endif - } - - /* Give HW time to discard old tx messages */ - msleep(1); - - /* Disable LLH */ - if (!CHIP_IS_E1(bp)) - REG_WR(bp, NIG_REG_LLH0_FUNC_EN + port*8, 0); - - bnx2x_set_eth_mac(bp, 0); - - /* If SP settings didn't get completed so far - something - * very wrong has happen. + /* + * Try to stop the function the 'good way'. If fails (in case + * of a parity error during bnx2x_chip_cleanup()) and we are + * not in a debug mode, perform a state transaction in order to + * enable further HW_RESET transaction. */ - if (bnx2x_wait_sp_comp(bp)) { - struct bnx2x_mcast_ramrod_params rparam = {0}; - - /** Set "drop all" (stop Rx). - * - * No need to take a netif_addr_lock_bh() here as bp->state is - * not OPEN and therefore bnx2x_set_rx_mode() will break without - * sending an rx_mode command. - */ - bnx2x_set_storm_rx_mode(bp, true); - - /* Cleanup multicast configuration */ - rparam.mcast_obj = &bp->mcast_obj; - set_bit(RAMROD_COMP_WAIT, &rparam.ramrod_flags); - - rc = bnx2x_config_mcast(bp, &rparam, false); - if (rc) - BNX2X_ERR("Failed to send DEL multicast command: %d\n", - rc); - - WARN_ON(bp->mcast_obj.check_pending(&bp->mcast_obj)); + rc = bnx2x_func_state_change(bp, &func_params); + if (rc) { +#ifdef BNX2X_STOP_ON_ERROR + return rc; +#else + BNX2X_ERR("FUNC_STOP ramrod failed. Running a dry transaction\n"); + __set_bit(RAMROD_DRV_CLR_ONLY, &func_params.ramrod_flags); + return bnx2x_func_state_change(bp, &func_params); +#endif } - /* Enable WoL only for function 0 of each port */ - if (!CHIP_IS_E1(bp)) - REG_WR(bp, MISC_REG_E1HMF_MODE, 0); + return 0; +} -#ifdef BCM_CNIC - bnx2x_del_fcoe_eth_macs(bp); -#endif - -#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ - bnx2x_iov_chip_cleanup(bp); -#endif +/** + * bnx2x_send_unload_req - request unload mode from the MCP. + * + * @bp: driver handle + * @unload_mode: requested function's unload mode + * + * Return unload mode returned by the MCP: COMMON, PORT or FUNC. + */ +u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode) +{ + u32 reset_code = 0; + int port = BP_PORT(bp); + /* Select the UNLOAD request mode */ if (unload_mode == UNLOAD_NORMAL) reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; @@ -9478,9 +9142,12 @@ void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode) u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; u8 *mac_addr = bp->dev->dev_addr; u32 val; + u16 pmc; + /* The mac address is written to entries 1-4 to - preserve entry 0 which is used by the PMF */ - u8 entry = (BP_E1HVN(bp) + 1)*8; + * preserve entry 0 which is used by the PMF + */ + u8 entry = (BP_VN(bp) + 1)*8; val = (mac_addr[0] << 8) | mac_addr[1]; EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry, val); @@ -9489,39 +9156,17 @@ void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode) (mac_addr[4] << 8) | mac_addr[5]; EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry + 4, val); + /* Enable the PME and clear the status */ + pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmc); + pmc |= PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS; + pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, pmc); + reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_EN; } else reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; -#ifdef BNX2X_NETQ - /* clear the filters and reset state for active net-queues */ - bnx2x_netq_clear_rx_queues(bp); -#endif - /* Close multi and leading connections - * Completions for ramrods are collected in a synchronous way - */ - for_each_queue(bp, i) { - if (bnx2x_stop_client(bp, i)) -#ifdef BNX2X_STOP_ON_ERROR - return; -#else - goto unload_error; -#endif - } - - rc = bnx2x_func_stop(bp); - if (rc) { - BNX2X_ERR("Function stop failed!\n"); -#ifdef BNX2X_STOP_ON_ERROR - return; -#else - goto unload_error; -#endif - } -#ifndef BNX2X_STOP_ON_ERROR -unload_error: -#endif + /* Send the request to the MCP */ if (!BP_NOMCP(bp)) reset_code = bnx2x_fw_command(bp, reset_code, 0); else { @@ -9543,9 +9188,199 @@ unload_error: reset_code = FW_MSG_CODE_DRV_UNLOAD_FUNCTION; } - if ((reset_code == FW_MSG_CODE_DRV_UNLOAD_COMMON) || - (reset_code == FW_MSG_CODE_DRV_UNLOAD_PORT)) - bnx2x__link_reset(bp); + return reset_code; +} + +/** + * bnx2x_send_unload_done - send UNLOAD_DONE command to the MCP. + * + * @bp: driver handle + */ +void bnx2x_send_unload_done(struct bnx2x *bp) +{ + /* Report UNLOAD_DONE to MCP */ + if (!BP_NOMCP(bp)) + bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); +} + +static inline int bnx2x_func_wait_started(struct bnx2x *bp) +{ + int tout = 50; + int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0; + + if (!bp->port.pmf) + return 0; + + /* + * (assumption: No Attention from MCP at this stage) + * PMF probably in the middle of TXdisable/enable transaction + * 1. Sync IRS for default SB + * 2. Sync SP queue - this guarantes us that attention handling started + * 3. Wait, that TXdisable/enable transaction completes + * + * 1+2 guranty that if DCBx attention was scheduled it already changed + * pending bit of transaction from STARTED-->TX_STOPPED, if we alredy + * received complettion for the transaction the state is TX_STOPPED. + * State will return to STARTED after completion of TX_STOPPED-->STARTED + * transaction. + */ + + /* make sure default SB ISR is done */ + if (msix) + synchronize_irq(bp->msix_table[0].vector); + else + synchronize_irq(bp->pdev->irq); + + flush_workqueue(bnx2x_wq); + + while (bnx2x_func_get_state(bp, &bp->func_obj) != + BNX2X_F_STATE_STARTED && tout--) + msleep(20); + + if (bnx2x_func_get_state(bp, &bp->func_obj) != + BNX2X_F_STATE_STARTED) { +#ifdef BNX2X_STOP_ON_ERROR + BNX2X_ERR("Wrong function state\n"); + return -EBUSY; +#else + /* + * Failed to complete the transaction in a "good way" + * Force both transactions with CLR bit + */ + struct bnx2x_func_state_params func_params = {NULL}; + + DP(NETIF_MSG_IFDOWN, + "Hmmm... unexpected function state! Forcing STARTED-->TX_ST0PPED-->STARTED\n"); + + func_params.f_obj = &bp->func_obj; + __set_bit(RAMROD_DRV_CLR_ONLY, + &func_params.ramrod_flags); + + /* STARTED-->TX_ST0PPED */ + func_params.cmd = BNX2X_F_CMD_TX_STOP; + bnx2x_func_state_change(bp, &func_params); + + /* TX_ST0PPED-->STARTED */ + func_params.cmd = BNX2X_F_CMD_TX_START; + return bnx2x_func_state_change(bp, &func_params); +#endif + } + + return 0; +} + +void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode) +{ + int port = BP_PORT(bp); + int i, rc = 0; + u8 cos; + struct bnx2x_mcast_ramrod_params rparam = {NULL}; + u32 reset_code; + + /* Wait until tx fastpath tasks complete */ + for_each_tx_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + + for_each_cos_in_tx_queue(fp, cos) + rc = bnx2x_clean_tx_queue(bp, fp->txdata_ptr[cos]); +#ifdef BNX2X_STOP_ON_ERROR + if (rc) + return; +#endif + } + + /* Give HW time to discard old tx messages */ + usleep_range(1000, 1000); + + /* Clean all ETH MACs */ + rc = bnx2x_del_all_macs(bp, &bp->fp[0].mac_obj, BNX2X_ETH_MAC, false); + if (rc < 0) + BNX2X_ERR("Failed to delete all ETH macs: %d\n", rc); + + /* Clean up UC list */ + rc = bnx2x_del_all_macs(bp, &bp->fp[0].mac_obj, BNX2X_UC_LIST_MAC, + true); + if (rc < 0) + BNX2X_ERR("Failed to schedule DEL commands for UC MACs list: %d\n", + rc); + + /* Disable LLH */ + if (!CHIP_IS_E1(bp)) + REG_WR(bp, NIG_REG_LLH0_FUNC_EN + port*8, 0); + + /* Set "drop all" (stop Rx). + * We need to take a netif_addr_lock() here in order to prevent + * a race between the completion code and this code. + */ + netif_addr_lock_bh(bp->dev); + /* Schedule the rx_mode command */ + if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state)) + set_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state); + else + bnx2x_set_storm_rx_mode(bp); + + /* Cleanup multicast configuration */ + rparam.mcast_obj = &bp->mcast_obj; + rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_DEL); + if (rc < 0) + BNX2X_ERR("Failed to send DEL multicast command: %d\n", rc); + + netif_addr_unlock_bh(bp->dev); + +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ + bnx2x_iov_chip_cleanup(bp); +#endif + +#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ + /* clear the filters and reset state for active net-queues */ + bnx2x_netq_clear_rx_queues(bp); +#endif + + /* + * Send the UNLOAD_REQUEST to the MCP. This will return if + * this function should perform FUNC, PORT or COMMON HW + * reset. + */ + reset_code = bnx2x_send_unload_req(bp, unload_mode); + + /* + * (assumption: No Attention from MCP at this stage) + * PMF probably in the middle of TXdisable/enable transaction + */ + rc = bnx2x_func_wait_started(bp); + if (rc) { + BNX2X_ERR("bnx2x_func_wait_started failed\n"); +#ifdef BNX2X_STOP_ON_ERROR + return; +#endif + } + + /* Close multi and leading connections + * Completions for ramrods are collected in a synchronous way + */ + for_each_queue(bp, i) + if (bnx2x_stop_queue(bp, i)) +#ifdef BNX2X_STOP_ON_ERROR + return; +#else + goto unload_error; +#endif + /* If SP settings didn't get completed so far - something + * very wrong has happen. + */ + if (!bnx2x_wait_sp_comp(bp, ~0x0UL)) + BNX2X_ERR("Hmmm... Common slow path ramrods got stuck!\n"); + +#ifndef BNX2X_STOP_ON_ERROR +unload_error: +#endif + rc = bnx2x_func_stop(bp); + if (rc) { + BNX2X_ERR("Function stop failed!\n"); +#ifdef BNX2X_STOP_ON_ERROR + return; +#endif + } /* Disable HW interrupts, NAPI */ bnx2x_netif_stop(bp, 1); @@ -9554,19 +9389,20 @@ unload_error: bnx2x_free_irq(bp); /* Reset the chip */ - bnx2x_reset_chip(bp, reset_code); + rc = bnx2x_reset_hw(bp, reset_code); + if (rc) + BNX2X_ERR("HW_RESET failed\n"); + /* Report UNLOAD_DONE to MCP */ - if (!BP_NOMCP(bp)) - bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); - + bnx2x_send_unload_done(bp); } void bnx2x_disable_close_the_gate(struct bnx2x *bp) { u32 val; - DP(NETIF_MSG_HW, "Disabling \"close the gates\"\n"); + DP(NETIF_MSG_IFDOWN, "Disabling \"close the gates\"\n"); if (CHIP_IS_E1(bp)) { int port = BP_PORT(bp); @@ -9576,7 +9412,7 @@ void bnx2x_disable_close_the_gate(struct bnx2x *bp) val = REG_RD(bp, addr); val &= ~(0x300); REG_WR(bp, addr, val); - } else if (CHIP_IS_E1H(bp)) { + } else { val = REG_RD(bp, MISC_REG_AEU_GENERAL_MASK); val &= ~(MISC_AEU_GENERAL_MASK_REG_AEU_PXP_CLOSE_MASK | MISC_AEU_GENERAL_MASK_REG_AEU_NIG_CLOSE_MASK); @@ -9587,26 +9423,39 @@ void bnx2x_disable_close_the_gate(struct bnx2x *bp) /* Close gates #2, #3 and #4: */ static void bnx2x_set_234_gates(struct bnx2x *bp, bool close) { - u32 val, addr; + u32 val; /* Gates #2 and #4a are closed/opened for "not E1" only */ if (!CHIP_IS_E1(bp)) { /* #4 */ - val = REG_RD(bp, PXP_REG_HST_DISCARD_DOORBELLS); - REG_WR(bp, PXP_REG_HST_DISCARD_DOORBELLS, - close ? (val | 0x1) : (val & (~(u32)1))); + REG_WR(bp, PXP_REG_HST_DISCARD_DOORBELLS, !!close); /* #2 */ - val = REG_RD(bp, PXP_REG_HST_DISCARD_INTERNAL_WRITES); - REG_WR(bp, PXP_REG_HST_DISCARD_INTERNAL_WRITES, - close ? (val | 0x1) : (val & (~(u32)1))); + REG_WR(bp, PXP_REG_HST_DISCARD_INTERNAL_WRITES, !!close); } /* #3 */ - addr = BP_PORT(bp) ? HC_REG_CONFIG_1 : HC_REG_CONFIG_0; - val = REG_RD(bp, addr); - REG_WR(bp, addr, (!close) ? (val | 0x1) : (val & (~(u32)1))); + if (CHIP_IS_E1x(bp)) { + /* Prevent interrupts from HC on both ports */ + val = REG_RD(bp, HC_REG_CONFIG_1); + REG_WR(bp, HC_REG_CONFIG_1, + (!close) ? (val | HC_CONFIG_1_REG_BLOCK_DISABLE_1) : + (val & ~(u32)HC_CONFIG_1_REG_BLOCK_DISABLE_1)); - DP(NETIF_MSG_HW, "%s gates #2, #3 and #4\n", + val = REG_RD(bp, HC_REG_CONFIG_0); + REG_WR(bp, HC_REG_CONFIG_0, + (!close) ? (val | HC_CONFIG_0_REG_BLOCK_DISABLE_0) : + (val & ~(u32)HC_CONFIG_0_REG_BLOCK_DISABLE_0)); + } else { + /* Prevent incomming interrupts in IGU */ + val = REG_RD(bp, IGU_REG_BLOCK_CONFIGURATION); + + REG_WR(bp, IGU_REG_BLOCK_CONFIGURATION, + (!close) ? + (val | IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE) : + (val & ~(u32)IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE)); + } + + DP(NETIF_MSG_HW | NETIF_MSG_IFUP, "%s gates #2, #3 and #4\n", close ? "closing" : "opening"); mmiowb(); } @@ -9621,10 +9470,11 @@ static void bnx2x_clp_reset_prep(struct bnx2x *bp, u32 *magic_val) MF_CFG_WR(bp, shared_mf_config.clp_mb, val | SHARED_MF_CLP_MAGIC); } -/* Restore the value of the `magic' bit. +/** + * bnx2x_clp_reset_done - restore the value of the `magic' bit. * - * @param pdev Device handle. - * @param magic_val Old value of the `magic' bit. + * @bp: driver handle + * @magic_val: old value of the `magic' bit. */ static void bnx2x_clp_reset_done(struct bnx2x *bp, u32 magic_val) { @@ -9634,18 +9484,20 @@ static void bnx2x_clp_reset_done(struct bnx2x *bp, u32 magic_val) (val & (~SHARED_MF_CLP_MAGIC)) | magic_val); } -/* - * Prepares for MCP reset: takes care of CLP configurations. +/** + * bnx2x_reset_mcp_prep - prepare for MCP reset. * - * @param bp - * @param magic_val Old value of 'magic' bit. + * @bp: driver handle + * @magic_val: old value of 'magic' bit. + * + * Takes care of CLP configurations. */ static void bnx2x_reset_mcp_prep(struct bnx2x *bp, u32 *magic_val) { u32 shmem; u32 validity_offset; - DP(NETIF_MSG_HW, "Starting\n"); + DP(NETIF_MSG_HW | NETIF_MSG_IFUP, "Starting\n"); /* Set `magic' bit in order to save MF config */ if (!CHIP_IS_E1(bp)) @@ -9653,7 +9505,8 @@ static void bnx2x_reset_mcp_prep(struct bnx2x *bp, u32 *magic_val) /* Get shmem offset */ shmem = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR); - validity_offset = offsetof(struct shmem_region, validity_map[0]); + validity_offset = + offsetof(struct shmem_region, validity_map[BP_PORT(bp)]); /* Clear validity map flags */ if (shmem > 0) @@ -9663,10 +9516,10 @@ static void bnx2x_reset_mcp_prep(struct bnx2x *bp, u32 *magic_val) #define MCP_TIMEOUT 5000 /* 5 seconds (in ms) */ #define MCP_ONE_TIMEOUT 100 /* 100 ms */ -/* Waits for MCP_ONE_TIMEOUT or MCP_ONE_TIMEOUT*10, - * depending on the HW type. +/** + * bnx2x_mcp_wait_one - wait for MCP_ONE_TIMEOUT * - * @param bp + * @bp: driver handle */ static inline void bnx2x_mcp_wait_one(struct bnx2x *bp) { @@ -9678,51 +9531,35 @@ static inline void bnx2x_mcp_wait_one(struct bnx2x *bp) msleep(MCP_ONE_TIMEOUT); } -static int bnx2x_reset_mcp_comp(struct bnx2x *bp, u32 magic_val) +/* + * initializes bp->common.shmem_base and waits for validity signature to appear + */ +static int bnx2x_init_shmem(struct bnx2x *bp) { - u32 shmem, cnt, validity_offset, val; - int rc = 0; + int cnt = 0; + u32 val = 0; - msleep(100); - - /* Get shmem offset */ - shmem = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR); - if (shmem == 0) { - BNX2X_ERR("Shmem 0 return failure\n"); - rc = -ENOTTY; - goto exit_lbl; - } - - validity_offset = offsetof(struct shmem_region, validity_map[0]); - - /* Wait for MCP to come up */ - for (cnt = 0; cnt < (MCP_TIMEOUT / MCP_ONE_TIMEOUT); cnt++) { - /* TBD: its best to check validity map of last port. - * currently checks on port 0. - */ - val = REG_RD(bp, shmem + validity_offset); - DP(NETIF_MSG_HW, "shmem 0x%x validity map(0x%x)=0x%x\n", shmem, - shmem + validity_offset, val); - - /* check that shared memory is valid. */ - if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) - == (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) - break; + do { + bp->common.shmem_base = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR); + if (bp->common.shmem_base) { + val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]); + if (val & SHR_MEM_VALIDITY_MB) + return 0; + } bnx2x_mcp_wait_one(bp); - } - DP(NETIF_MSG_HW, "Cnt=%d Shmem validity map 0x%x\n", cnt, val); + } while (cnt++ < (MCP_TIMEOUT / MCP_ONE_TIMEOUT)); - /* Check that shared memory is valid. This indicates that MCP is up. */ - if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) != - (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) { - BNX2X_ERR("Shmem signature not present. MCP is not up !!\n"); - rc = -ENOTTY; - goto exit_lbl; - } + BNX2X_ERR("BAD MCP validity signature\n"); + + return -ENODEV; +} + +static int bnx2x_reset_mcp_comp(struct bnx2x *bp, u32 magic_val) +{ + int rc = bnx2x_init_shmem(bp); -exit_lbl: /* Restore the `magic' bit value */ if (!CHIP_IS_E1(bp)) bnx2x_clp_reset_done(bp, magic_val); @@ -9735,7 +9572,6 @@ static void bnx2x_pxp_prep(struct bnx2x *bp) if (!CHIP_IS_E1(bp)) { REG_WR(bp, PXP2_REG_RD_START_INIT, 0); REG_WR(bp, PXP2_REG_RQ_RBC_DONE, 0); - REG_WR(bp, PXP2_REG_RQ_CFG_DONE, 0); mmiowb(); } } @@ -9747,53 +9583,145 @@ static void bnx2x_pxp_prep(struct bnx2x *bp) * one reset bit) * - IGU * - MISC (including AEU) - * - GRC + * - GRC * - RBCN, RBCP */ -static void bnx2x_process_kill_chip_reset(struct bnx2x *bp) +static void bnx2x_process_kill_chip_reset(struct bnx2x *bp, bool global) { u32 not_reset_mask1, reset_mask1, not_reset_mask2, reset_mask2; + u32 global_bits2, stay_reset2; + /* + * Bits that have to be set in reset_mask2 if we want to reset 'global' + * (per chip) blocks. + */ + global_bits2 = + MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CPU | + MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CORE; + + /* Don't reset the following blocks. + * Important: per port blocks (such as EMAC, BMAC, UMAC) can't be + * reset, as in 4 port device they might still be owned + * by the MCP (there is only one leader per path). + */ not_reset_mask1 = MISC_REGISTERS_RESET_REG_1_RST_HC | MISC_REGISTERS_RESET_REG_1_RST_PXPV | MISC_REGISTERS_RESET_REG_1_RST_PXP; not_reset_mask2 = - MISC_REGISTERS_RESET_REG_2_RST_MDIO | + MISC_REGISTERS_RESET_REG_2_RST_PCI_MDIO | MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE | MISC_REGISTERS_RESET_REG_2_RST_EMAC1_HARD_CORE | MISC_REGISTERS_RESET_REG_2_RST_MISC_CORE | MISC_REGISTERS_RESET_REG_2_RST_RBCN | MISC_REGISTERS_RESET_REG_2_RST_GRC | MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_REG_HARD_CORE | - MISC_REGISTERS_RESET_REG_2_RST_MCP_N_HARD_CORE_RST_B; + MISC_REGISTERS_RESET_REG_2_RST_MCP_N_HARD_CORE_RST_B | + MISC_REGISTERS_RESET_REG_2_RST_ATC | + MISC_REGISTERS_RESET_REG_2_PGLC | + MISC_REGISTERS_RESET_REG_2_RST_BMAC0 | + MISC_REGISTERS_RESET_REG_2_RST_BMAC1 | + MISC_REGISTERS_RESET_REG_2_RST_EMAC0 | + MISC_REGISTERS_RESET_REG_2_RST_EMAC1 | + MISC_REGISTERS_RESET_REG_2_UMAC0 | + MISC_REGISTERS_RESET_REG_2_UMAC1; + /* + * Keep the following blocks in reset: + * - all xxMACs are handled by the bnx2x_link code. + */ + stay_reset2 = + MISC_REGISTERS_RESET_REG_2_XMAC | + MISC_REGISTERS_RESET_REG_2_XMAC_SOFT; + + /* Full reset masks according to the chip */ reset_mask1 = 0xffffffff; if (CHIP_IS_E1(bp)) reset_mask2 = 0xffff; - else + else if (CHIP_IS_E1H(bp)) reset_mask2 = 0x1ffff; + else if (CHIP_IS_E2(bp)) + reset_mask2 = 0xfffff; + else /* CHIP_IS_E3 */ + reset_mask2 = 0x3ffffff; + + /* Don't reset global blocks unless we need to */ + if (!global) + reset_mask2 &= ~global_bits2; + + /* + * In case of attention in the QM, we need to reset PXP + * (MISC_REGISTERS_RESET_REG_2_RST_PXP_RQ_RD_WR) before QM + * because otherwise QM reset would release 'close the gates' shortly + * before resetting the PXP, then the PSWRQ would send a write + * request to PGLUE. Then when PXP is reset, PGLUE would try to + * read the payload data from PSWWR, but PSWWR would not + * respond. The write queue in PGLUE would stuck, dmae commands + * would not return. Therefore it's important to reset the second + * reset register (containing the + * MISC_REGISTERS_RESET_REG_2_RST_PXP_RQ_RD_WR bit) before the + * first one (containing the MISC_REGISTERS_RESET_REG_1_RST_QM + * bit). + */ + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, + reset_mask2 & (~not_reset_mask2)); REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR, reset_mask1 & (~not_reset_mask1)); - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, - reset_mask2 & (~not_reset_mask2)); + + barrier(); + mmiowb(); + + REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, + reset_mask2 & (~stay_reset2)); barrier(); mmiowb(); REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, reset_mask1); - REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, reset_mask2); mmiowb(); } -static int bnx2x_process_kill(struct bnx2x *bp) +/** + * bnx2x_er_poll_igu_vq - poll for pending writes bit. + * It should get cleared in no more than 1s. + * + * @bp: driver handle + * + * It should get cleared in no more than 1s. Returns 0 if + * pending writes bit gets cleared. + */ +static int bnx2x_er_poll_igu_vq(struct bnx2x *bp) +{ + u32 cnt = 1000; + u32 pend_bits = 0; + + do { + pend_bits = REG_RD(bp, IGU_REG_PENDING_BITS_STATUS); + + if (pend_bits == 0) + break; + + usleep_range(1000, 1000); + } while (cnt-- > 0); + + if (cnt <= 0) { + BNX2X_ERR("Still pending IGU requests pend_bits=%x!\n", + pend_bits); + return -EBUSY; + } + + return 0; +} + +static int bnx2x_process_kill(struct bnx2x *bp, bool global) { int cnt = 1000; u32 val = 0; u32 sr_cnt, blk_cnt, port_is_idle_0, port_is_idle_1, pgl_exp_rom2; + u32 tags_63_32 = 0; /* Empty the Tetris buffer, wait for 1s */ @@ -9803,21 +9731,21 @@ static int bnx2x_process_kill(struct bnx2x *bp) port_is_idle_0 = REG_RD(bp, PXP2_REG_RD_PORT_IS_IDLE_0); port_is_idle_1 = REG_RD(bp, PXP2_REG_RD_PORT_IS_IDLE_1); pgl_exp_rom2 = REG_RD(bp, PXP2_REG_PGL_EXP_ROM2); + if (CHIP_IS_E3(bp)) + tags_63_32 = REG_RD(bp, PGLUE_B_REG_TAGS_63_32); + if ((sr_cnt == 0x7e) && (blk_cnt == 0xa0) && ((port_is_idle_0 & 0x1) == 0x1) && ((port_is_idle_1 & 0x1) == 0x1) && - (pgl_exp_rom2 == 0xffffffff)) + (pgl_exp_rom2 == 0xffffffff) && + (!CHIP_IS_E3(bp) || (tags_63_32 == 0xffffffff))) break; - msleep(1); + usleep_range(1000, 1000); } while (cnt-- > 0); if (cnt <= 0) { - DP(NETIF_MSG_HW, "Tetris buffer didn't get empty or there" - " are still" - " outstanding read requests after 1s!\n"); - DP(NETIF_MSG_HW, "sr_cnt=0x%08x, blk_cnt=0x%08x," - " port_is_idle_0=0x%08x," - " port_is_idle_1=0x%08x, pgl_exp_rom2=0x%08x\n", + BNX2X_ERR("Tetris buffer didn't get empty or there are still outstanding read requests after 1s!\n"); + BNX2X_ERR("sr_cnt=0x%08x, blk_cnt=0x%08x, port_is_idle_0=0x%08x, port_is_idle_1=0x%08x, pgl_exp_rom2=0x%08x\n", sr_cnt, blk_cnt, port_is_idle_0, port_is_idle_1, pgl_exp_rom2); return -EAGAIN; @@ -9828,6 +9756,11 @@ static int bnx2x_process_kill(struct bnx2x *bp) /* Close gates #2, #3 and #4 */ bnx2x_set_234_gates(bp, true); + /* Poll for IGU VQs for 57712 and newer chips */ + if (!CHIP_IS_E1x(bp) && bnx2x_er_poll_igu_vq(bp)) + return -EAGAIN; + + /* TBD: Indicate that "process kill" is in progress to MCP */ /* Clear "unprepared" bit */ @@ -9840,27 +9773,27 @@ static int bnx2x_process_kill(struct bnx2x *bp) /* Wait for 1ms to empty GLUE and PCI-E core queues, * PSWHST, GRC and PSWRD Tetris buffer. */ - msleep(1); + usleep_range(1000, 1000); /* Prepare to chip reset: */ /* MCP */ - bnx2x_reset_mcp_prep(bp, &val); + if (global) + bnx2x_reset_mcp_prep(bp, &val); /* PXP */ bnx2x_pxp_prep(bp); barrier(); /* reset the chip */ - bnx2x_process_kill_chip_reset(bp); + bnx2x_process_kill_chip_reset(bp, global); barrier(); /* Recover after reset: */ /* MCP */ - if (bnx2x_reset_mcp_comp(bp, val)) + if (global && bnx2x_reset_mcp_comp(bp, val)) return -EAGAIN; - /* PXP */ - bnx2x_pxp_prep(bp); + /* TBD: Add resetting the NO_MCP mode DB here */ /* Open the gates #2, #3 and #4 */ bnx2x_set_234_gates(bp, false); @@ -9874,40 +9807,116 @@ static int bnx2x_process_kill(struct bnx2x *bp) static int bnx2x_leader_reset(struct bnx2x *bp) { int rc = 0; - /* Try to recover after the failure */ - if (bnx2x_process_kill(bp)) { - netdev_err(bp->dev, "Something bad had happen! Aii!\n"); - rc = -EAGAIN; - goto exit_leader_reset; + bool global = bnx2x_reset_is_global(bp); + u32 load_code; + + /* if not going to reset MCP - load "fake" driver to reset HW while + * driver is owner of the HW + */ + if (!global && !BP_NOMCP(bp)) { + load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0); + if (!load_code) { + BNX2X_ERR("MCP response failure, aborting\n"); + rc = -EAGAIN; + goto exit_leader_reset; + } + if ((load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) && + (load_code != FW_MSG_CODE_DRV_LOAD_COMMON)) { + BNX2X_ERR("MCP unexpected resp, aborting\n"); + rc = -EAGAIN; + goto exit_leader_reset2; + } + load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0); + if (!load_code) { + BNX2X_ERR("MCP response failure, aborting\n"); + rc = -EAGAIN; + goto exit_leader_reset2; + } } - /* Clear "reset is in progress" bit and update the driver state */ - bnx2x_set_reset_done(bp); - bp->recovery_state = BNX2X_RECOVERY_DONE; + /* Try to recover after the failure */ + if (bnx2x_process_kill(bp, global)) { + BNX2X_ERR("Something bad had happen on engine %d! Aii!\n", + BP_PATH(bp)); + rc = -EAGAIN; + goto exit_leader_reset2; + } + /* + * Clear RESET_IN_PROGRES and RESET_GLOBAL bits and update the driver + * state. + */ + bnx2x_set_reset_done(bp); + if (global) + bnx2x_clear_reset_global(bp); + +exit_leader_reset2: + /* unload "fake driver" if it was loaded */ + if (!global && !BP_NOMCP(bp)) { + bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0); + bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); + } exit_leader_reset: bp->is_leader = 0; - bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESERVED_08); - smp_wmb(); + bnx2x_release_leader_lock(bp); + smp_mb(); return rc; } +static inline void bnx2x_recovery_failed(struct bnx2x *bp) +{ + netdev_err(bp->dev, "Recovery has failed. Power cycle is needed.\n"); + + /* Disconnect this device */ + netif_device_detach(bp->dev); + + /* + * Block ifup for all function on this engine until "process kill" + * or power cycle. + */ + bnx2x_set_reset_in_progress(bp); + + /* Shut down the power */ + bnx2x_set_power_state(bp, PCI_D3hot); + + bp->recovery_state = BNX2X_RECOVERY_FAILED; + + smp_mb(); +} + /* * Assumption: runs under rtnl lock. This together with the fact - * that it's called only from bnx2x_reset_task() ensure that it + * that it's called only from bnx2x_sp_rtnl() ensure that it * will never be called when netif_running(bp->dev) is false. */ static void bnx2x_parity_recover(struct bnx2x *bp) { + bool global = false; + u32 error_recovered, error_unrecovered; + bool is_parity; + DP(NETIF_MSG_HW, "Handling parity\n"); while (1) { switch (bp->recovery_state) { case BNX2X_RECOVERY_INIT: DP(NETIF_MSG_HW, "State is BNX2X_RECOVERY_INIT\n"); + is_parity = bnx2x_chk_parity_attn(bp, &global, false); + WARN_ON(!is_parity); + /* Try to get a LEADER_LOCK HW lock */ - if (bnx2x_trylock_hw_lock(bp, - HW_LOCK_RESOURCE_RESERVED_08)) + if (bnx2x_trylock_leader_lock(bp)) { + bnx2x_set_reset_in_progress(bp); + /* + * Check if there is a global attention and if + * there was a global attention, set the global + * reset bit. + */ + + if (global) + bnx2x_set_reset_global(bp); + bp->is_leader = 1; + } /* Stop the driver */ /* If interface has been removed - break */ @@ -9915,21 +9924,38 @@ static void bnx2x_parity_recover(struct bnx2x *bp) return; bp->recovery_state = BNX2X_RECOVERY_WAIT; - /* Ensure "is_leader" and "recovery_state" - * update values are seen on other CPUs + + /* Ensure "is_leader", MCP command sequence and + * "recovery_state" update values are seen on other + * CPUs. */ - smp_wmb(); + smp_mb(); break; case BNX2X_RECOVERY_WAIT: DP(NETIF_MSG_HW, "State is BNX2X_RECOVERY_WAIT\n"); if (bp->is_leader) { - u32 load_counter = bnx2x_get_load_cnt(bp); - if (load_counter) { + int other_engine = BP_PATH(bp) ? 0 : 1; + bool other_load_status = + bnx2x_get_load_status(bp, other_engine); + bool load_status = + bnx2x_get_load_status(bp, BP_PATH(bp)); + global = bnx2x_reset_is_global(bp); + + /* + * In case of a parity in a global block, let + * the first leader that performs a + * leader_reset() reset the global blocks in + * order to clear global attentions. Otherwise + * the the gates will remain closed for that + * engine. + */ + if (load_status || + (global && other_load_status)) { /* Wait until all other functions get * down. */ - schedule_delayed_work(&bp->reset_task, + schedule_delayed_work(&bp->sp_rtnl_task, HZ/10); return; } else { @@ -9938,37 +9964,27 @@ static void bnx2x_parity_recover(struct bnx2x *bp) * normal. In any case it's an exit * point for a leader. */ - if (bnx2x_leader_reset(bp) || - bnx2x_nic_load(bp, LOAD_NORMAL)) { - netdev_err(bp->dev, "Recovery " - "has failed. Power cycle is " - "needed.\n"); - /* Disconnect this device */ - netif_device_detach(bp->dev); - /* Block ifup for all function - * of this ASIC until - * "process kill" or power - * cycle. - */ - bnx2x_set_reset_in_progress(bp); - /* Shut down the power */ - bnx2x_set_power_state(bp, - PCI_D3hot); + if (bnx2x_leader_reset(bp)) { + bnx2x_recovery_failed(bp); return; } - return; + /* If we are here, means that the + * leader has succeeded and doesn't + * want to be a leader any more. Try + * to continue as a none-leader. + */ + break; } } else { /* non-leader */ - if (!bnx2x_reset_is_done(bp)) { + if (!bnx2x_reset_is_done(bp, BP_PATH(bp))) { /* Try to get a LEADER_LOCK HW lock as * long as a former leader may have * been unloaded by the user or * released a leadership by another * reason. */ - if (bnx2x_trylock_hw_lock(bp, - HW_LOCK_RESOURCE_RESERVED_08)) { + if (bnx2x_trylock_leader_lock(bp)) { /* I'm a leader now! Restart a * switch case. */ @@ -9976,18 +9992,49 @@ static void bnx2x_parity_recover(struct bnx2x *bp) break; } - schedule_delayed_work(&bp->reset_task, + schedule_delayed_work(&bp->sp_rtnl_task, HZ/10); return; - } else { /* A leader has completed - * the "process kill". It's an exit - * point for a non-leader. - */ - bnx2x_nic_load(bp, LOAD_NORMAL); + } else { + /* + * If there was a global attention, wait + * for it to be cleared. + */ + if (bnx2x_reset_is_global(bp)) { + schedule_delayed_work( + &bp->sp_rtnl_task, + HZ/10); + return; + } + + error_recovered = + bp->eth_stats.recoverable_error; + error_unrecovered = + bp->eth_stats.unrecoverable_error; bp->recovery_state = - BNX2X_RECOVERY_DONE; - smp_wmb(); + BNX2X_RECOVERY_NIC_LOADING; + if (bnx2x_nic_load(bp, LOAD_NORMAL)) { + error_unrecovered++; + netdev_err(bp->dev, + "Recovery failed. Power cycle needed\n"); + /* Disconnect this device */ + netif_device_detach(bp->dev); + /* Shut down the power */ + bnx2x_set_power_state( + bp, PCI_D3hot); + smp_mb(); + } else { + bp->recovery_state = + BNX2X_RECOVERY_DONE; + error_recovered++; + smp_mb(); + } + bp->eth_stats.recoverable_error = + error_recovered; + bp->eth_stats.unrecoverable_error = + error_unrecovered; + return; } } @@ -9997,61 +10044,142 @@ static void bnx2x_parity_recover(struct bnx2x *bp) } } +#if !defined(BNX2X_VMWARE_BMAPILNX) /* BNX2X_UPSTREAM */ +static int bnx2x_close(struct net_device *dev); + +#endif /* bnx2x_nic_unload() flushes the bnx2x_wq, thus reset task is * scheduled on a general queue in order to prevent a dead lock. */ #if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) /* BNX2X_UPSTREAM */ -static void bnx2x_reset_task(struct work_struct *work) +static void bnx2x_sp_rtnl_task(struct work_struct *work) { #if (LINUX_VERSION_CODE >= 0x020614) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ - struct bnx2x *bp = container_of(work, struct bnx2x, reset_task.work); + struct bnx2x *bp = container_of(work, struct bnx2x, sp_rtnl_task.work); #else - struct bnx2x *bp = container_of(work, struct bnx2x, reset_task); + struct bnx2x *bp = container_of(work, struct bnx2x, sp_rtnl_task); #endif #else -static void bnx2x_reset_task(void *data) +static void bnx2x_sp_rtnl_task(void *data) { struct bnx2x *bp = (struct bnx2x *)data; #endif -#ifdef BNX2X_STOP_ON_ERROR - BNX2X_ERR("reset task called but STOP_ON_ERROR defined" - " so reset not done to allow debug dump,\n" - KERN_ERR " you will need to reboot when done\n"); - return; -#endif - rtnl_lock(); if (!netif_running(bp->dev)) - goto reset_task_exit; + goto sp_rtnl_exit; + + /* if stop on error is defined no recovery flows should be executed */ +#ifdef BNX2X_STOP_ON_ERROR + BNX2X_ERR("recovery flow called but STOP_ON_ERROR defined so reset not done to allow debug dump,\n" + "you will need to reboot when done\n"); + goto sp_rtnl_not_reset; +#endif + + if (unlikely(bp->recovery_state != BNX2X_RECOVERY_DONE)) { + /* + * Clear all pending SP commands as we are going to reset the + * function anyway. + */ + bp->sp_rtnl_state = 0; + smp_mb(); - if (unlikely(bp->recovery_state != BNX2X_RECOVERY_DONE)) bnx2x_parity_recover(bp); - else { + + goto sp_rtnl_exit; + } + + if (test_and_clear_bit(BNX2X_SP_RTNL_TX_TIMEOUT, &bp->sp_rtnl_state)) { #ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ if (CHIP_REV_IS_SLOW(bp)) { BNX2X_ERR("reset task called on emulation, ignoring\n"); - goto reset_task_exit; + goto sp_rtnl_exit; } #endif + /* + * Clear all pending SP commands as we are going to reset the + * function anyway. + */ + bp->sp_rtnl_state = 0; + smp_mb(); + bnx2x_nic_unload(bp, UNLOAD_NORMAL); bnx2x_nic_load(bp, LOAD_NORMAL); + + goto sp_rtnl_exit; } -#ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - /* Invalidate netqueue state as filters have been lost after - reinit */ - vmknetddi_queueops_invalidate_state(bp->dev); +#ifdef BNX2X_STOP_ON_ERROR +sp_rtnl_not_reset: #endif +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + if (test_and_clear_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state)) + bnx2x_setup_tc(bp->dev, bp->dcbx_port_params.ets.num_of_cos); +#endif + if (test_and_clear_bit(BNX2X_SP_RTNL_AFEX_F_UPDATE, &bp->sp_rtnl_state)) + bnx2x_after_function_update(bp); + /* + * in case of fan failure we need to reset id if the "stop on error" + * debug flag is set, since we trying to prevent permanent overheating + * damage + */ + if (test_and_clear_bit(BNX2X_SP_RTNL_FAN_FAILURE, &bp->sp_rtnl_state)) { + DP(NETIF_MSG_HW, "fan failure detected. Unloading driver\n"); +#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ + netif_device_detach(bp->dev); + bnx2x_close(bp->dev); +#else + dev_close(bp->dev); + bp->dev->gflags &= ~IFF_DEV_IS_OPEN; +#endif + } -reset_task_exit: - +sp_rtnl_exit: rtnl_unlock(); } /* end of nic load/unload */ -/* ethtool_ops */ +#if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) /* BNX2X_UPSTREAM */ +static void bnx2x_period_task(struct work_struct *work) +{ +#if (LINUX_VERSION_CODE >= 0x020614) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ + struct bnx2x *bp = container_of(work, struct bnx2x, period_task.work); +#else + struct bnx2x *bp = container_of(work, struct bnx2x, period_task); +#endif +#else +static void bnx2x_period_task(void *data) +{ + struct bnx2x *bp = (struct bnx2x *)data; +#endif + + if (!netif_running(bp->dev)) + goto period_task_exit; + + if (CHIP_REV_IS_SLOW(bp)) { + BNX2X_ERR("period task called on emulation, ignoring\n"); + goto period_task_exit; + } + + bnx2x_acquire_phy_lock(bp); + /* + * The barrier is needed to ensure the ordering between the writing to + * the bp->port.pmf in the bnx2x_nic_load() or bnx2x_pmf_update() and + * the reading here. + */ + smp_mb(); + if (bp->port.pmf) { + bnx2x_period_func(&bp->link_params, &bp->link_vars); + + /* Re-queue task in 1 sec */ + queue_delayed_work(bnx2x_wq, &bp->period_task, 1*HZ); + } + + bnx2x_release_phy_lock(bp); +period_task_exit: + return; +} /* * Init service functions @@ -10094,107 +10222,405 @@ static inline void bnx2x_undi_int_disable(struct bnx2x *bp) bnx2x_undi_int_disable_e1h(bp); } -static void __devinit bnx2x_undi_unload(struct bnx2x *bp) +static void __devinit bnx2x_prev_unload_close_mac(struct bnx2x *bp) { - u32 val; + u32 val, base_addr, offset, mask, reset_reg; + bool mac_stopped = false; + u8 port = BP_PORT(bp); - /* Check if there is any driver already loaded */ - val = REG_RD(bp, MISC_REG_UNPREPARED); - if (val == 0x1) { - /* Check if it is the UNDI driver + reset_reg = REG_RD(bp, MISC_REG_RESET_REG_2); + + if (!CHIP_IS_E3(bp)) { + val = REG_RD(bp, NIG_REG_BMAC0_REGS_OUT_EN + port * 4); + mask = MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port; + if ((mask & reset_reg) && val) { + u32 wb_data[2]; + BNX2X_DEV_INFO("Disable bmac Rx\n"); + base_addr = BP_PORT(bp) ? NIG_REG_INGRESS_BMAC1_MEM + : NIG_REG_INGRESS_BMAC0_MEM; + offset = CHIP_IS_E2(bp) ? BIGMAC2_REGISTER_BMAC_CONTROL + : BIGMAC_REGISTER_BMAC_CONTROL; + + /* + * use rd/wr since we cannot use dmae. This is safe + * since MCP won't access the bus due to the request + * to unload, and no function on the path can be + * loaded at this time. + */ + wb_data[0] = REG_RD(bp, base_addr + offset); + wb_data[1] = REG_RD(bp, base_addr + offset + 0x4); + wb_data[0] &= ~BMAC_CONTROL_RX_ENABLE; + REG_WR(bp, base_addr + offset, wb_data[0]); + REG_WR(bp, base_addr + offset + 0x4, wb_data[1]); + + } + BNX2X_DEV_INFO("Disable emac Rx\n"); + REG_WR(bp, NIG_REG_NIG_EMAC0_EN + BP_PORT(bp)*4, 0); + + mac_stopped = true; + } else { + if (reset_reg & MISC_REGISTERS_RESET_REG_2_XMAC) { + BNX2X_DEV_INFO("Disable xmac Rx\n"); + base_addr = BP_PORT(bp) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; + val = REG_RD(bp, base_addr + XMAC_REG_PFC_CTRL_HI); + REG_WR(bp, base_addr + XMAC_REG_PFC_CTRL_HI, + val & ~(1 << 1)); + REG_WR(bp, base_addr + XMAC_REG_PFC_CTRL_HI, + val | (1 << 1)); + REG_WR(bp, base_addr + XMAC_REG_CTRL, 0); + mac_stopped = true; + } + mask = MISC_REGISTERS_RESET_REG_2_UMAC0 << port; + if (mask & reset_reg) { + BNX2X_DEV_INFO("Disable umac Rx\n"); + base_addr = BP_PORT(bp) ? GRCBASE_UMAC1 : GRCBASE_UMAC0; + REG_WR(bp, base_addr + UMAC_REG_COMMAND_CONFIG, 0); + mac_stopped = true; + } + } + + if (mac_stopped) + msleep(20); + +} + +#define BNX2X_PREV_UNDI_PROD_ADDR(p) (BAR_TSTRORM_INTMEM + 0x1508 + ((p) << 4)) +#define BNX2X_PREV_UNDI_RCQ(val) ((val) & 0xffff) +#define BNX2X_PREV_UNDI_BD(val) ((val) >> 16 & 0xffff) +#define BNX2X_PREV_UNDI_PROD(rcq, bd) ((bd) << 16 | (rcq)) + +static void __devinit bnx2x_prev_unload_undi_inc(struct bnx2x *bp, u8 port, + u8 inc) +{ + u16 rcq, bd; + u32 tmp_reg = REG_RD(bp, BNX2X_PREV_UNDI_PROD_ADDR(port)); + + rcq = BNX2X_PREV_UNDI_RCQ(tmp_reg) + inc; + bd = BNX2X_PREV_UNDI_BD(tmp_reg) + inc; + + tmp_reg = BNX2X_PREV_UNDI_PROD(rcq, bd); + REG_WR(bp, BNX2X_PREV_UNDI_PROD_ADDR(port), tmp_reg); + + BNX2X_DEV_INFO("UNDI producer [%d] rings bd -> 0x%04x, rcq -> 0x%04x\n", + port, bd, rcq); +} + +static int __devinit bnx2x_prev_mcp_done(struct bnx2x *bp) +{ + u32 rc = bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); + if (!rc) { + BNX2X_ERR("MCP response failure, aborting\n"); + return -EBUSY; + } + + return 0; +} + +static bool __devinit bnx2x_prev_is_path_marked(struct bnx2x *bp) +{ + struct bnx2x_prev_path_list *tmp_list; + int rc = false; + + if (down_trylock(&bnx2x_prev_sem)) + return false; + + list_for_each_entry(tmp_list, &bnx2x_prev_list, list) { + /*BNX2X_DEV_INFO("<%02x:%02x|%02x> is marked complete\n", + tmp_lst->bus, tmp_lst->slot, tmp_lst->path);*/ + if (PCI_SLOT(bp->pdev->devfn) == tmp_list->slot && + bp->pdev->bus->number == tmp_list->bus && + BP_PATH(bp) == tmp_list->path) { + rc = true; + BNX2X_DEV_INFO("Path %d was already cleaned from previous drivers\n", + BP_PATH(bp)); + break; + } + } + + up(&bnx2x_prev_sem); + + return rc; +} + +static int __devinit bnx2x_prev_mark_path(struct bnx2x *bp) +{ + struct bnx2x_prev_path_list *tmp_list; + int rc; + + tmp_list = (struct bnx2x_prev_path_list *) + kmalloc(sizeof(struct bnx2x_prev_path_list), GFP_KERNEL); + if (!tmp_list) { + BNX2X_ERR("Failed to allocate 'bnx2x_prev_path_list'\n"); + return -ENOMEM; + } + + tmp_list->bus = bp->pdev->bus->number; + tmp_list->slot = PCI_SLOT(bp->pdev->devfn); + tmp_list->path = BP_PATH(bp); + + rc = down_interruptible(&bnx2x_prev_sem); + if (rc) { + BNX2X_ERR("Received %d when tried to take lock\n", rc); + kfree(tmp_list); + } else { + BNX2X_DEV_INFO("Marked path [%d] - finished previous unload\n", + BP_PATH(bp)); + list_add(&tmp_list->list, &bnx2x_prev_list); + up(&bnx2x_prev_sem); + } + + return rc; +} + +static bool __devinit bnx2x_can_flr(struct bnx2x *bp) +{ + int pos; + u32 cap; + struct pci_dev *dev = bp->pdev; + + pos = pci_pcie_cap(dev); + if (!pos) + return false; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP, &cap); + if (!(cap & PCI_EXP_DEVCAP_FLR)) + return false; + + return true; +} + +static int __devinit bnx2x_do_flr(struct bnx2x *bp) +{ + int i, pos; + u16 status; + struct pci_dev *dev = bp->pdev; + + /* probe the capability first */ + if (bnx2x_can_flr(bp)) + return -ENOTTY; + + pos = pci_pcie_cap(dev); + if (!pos) + return -ENOTTY; + + /* Wait for Transaction Pending bit clean */ + for (i = 0; i < 4; i++) { + if (i) + msleep((1 << (i - 1)) * 100); + + pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status); + if (!(status & PCI_EXP_DEVSTA_TRPND)) + goto clear; + } + + dev_err(&dev->dev, + "transaction is not cleared; proceeding with reset anyway\n"); + +clear: + if (bp->common.bc_ver < REQ_BC_VER_4_INITIATE_FLR) { + BNX2X_ERR("FLR not supported by BC_VER: 0x%x\n", + bp->common.bc_ver); + return -EINVAL; + } + + bnx2x_fw_command(bp, DRV_MSG_CODE_INITIATE_FLR, 0); + + return 0; +} + +static int __devinit bnx2x_prev_unload_uncommon(struct bnx2x *bp) +{ + int rc; + + BNX2X_DEV_INFO("Uncommon unload Flow\n"); + + /* Test if previous unload process was already finished for this path */ + if (bnx2x_prev_is_path_marked(bp)) + return bnx2x_prev_mcp_done(bp); + + /* + * If function has FLR capabilities, and existing FW version matches + * the one required, then FLR will be sufficient to clean any residue + * left by previous driver + */ + if (bnx2x_test_firmware_version(bp, false) && bnx2x_can_flr(bp)) + return bnx2x_do_flr(bp); + + /* Close the MCP request, return failure*/ + rc = bnx2x_prev_mcp_done(bp); + if (!rc) + rc = BNX2X_PREV_WAIT_NEEDED; + + return rc; +} + +static int __devinit bnx2x_prev_unload_common(struct bnx2x *bp) +{ + u32 reset_reg, tmp_reg = 0, rc; + /* + * It is possible a previous function received 'common' answer, + * but hasn't loaded yet, therefore creating a scenario of + * multiple functions receiving 'common' on the same path. + */ + BNX2X_DEV_INFO("Common unload Flow\n"); + + if (bnx2x_prev_is_path_marked(bp)) + return bnx2x_prev_mcp_done(bp); + + reset_reg = REG_RD(bp, MISC_REG_RESET_REG_1); + + /* Reset should be performed after BRB is emptied */ + if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_BRB1) { + u32 timer_count = 1000; + bool prev_undi = false; + + /* Close the MAC Rx to prevent BRB from filling up */ + bnx2x_prev_unload_close_mac(bp); + + /* + * Check if the UNDI driver was previously loaded * UNDI driver initializes CID offset for normal bell to 0x7 */ - bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); - val = REG_RD(bp, DORQ_REG_NORM_CID_OFST); - if (val == 0x7) { - u32 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; - /* save our pf_num */ - int orig_pf_num = bp->pf_num; - int port; - u32 swap_en; - u32 swap_val; - - /* clear the UNDI indication */ - REG_WR(bp, DORQ_REG_NORM_CID_OFST, 0); - - BNX2X_DEV_INFO("UNDI is active! reset device\n"); - - /* try unload UNDI on port 0 */ - bp->pf_num = 0; - bp->fw_seq = - (SHMEM_RD(bp, func_mb[bp->pf_num].drv_mb_header) & - DRV_MSG_SEQ_NUMBER_MASK); - reset_code = bnx2x_fw_command(bp, reset_code, 0); - - /* if UNDI is loaded on the other port */ - if (reset_code != FW_MSG_CODE_DRV_UNLOAD_COMMON) { - - /* send "DONE" for previous unload */ - bnx2x_fw_command(bp, - DRV_MSG_CODE_UNLOAD_DONE, 0); - - /* unload UNDI on port 1 */ - bp->pf_num = 1; - bp->fw_seq = - (SHMEM_RD(bp, func_mb[bp->pf_num].drv_mb_header) & - DRV_MSG_SEQ_NUMBER_MASK); - reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; - - bnx2x_fw_command(bp, reset_code, 0); + if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_DORQ) { + tmp_reg = REG_RD(bp, DORQ_REG_NORM_CID_OFST); + if (tmp_reg == 0x7) { + BNX2X_DEV_INFO("UNDI previously loaded\n"); + prev_undi = true; + /* clear the UNDI indication */ + REG_WR(bp, DORQ_REG_NORM_CID_OFST, 0); } + } + /* wait until BRB is empty */ + tmp_reg = REG_RD(bp, BRB1_REG_NUM_OF_FULL_BLOCKS); + while (timer_count) { + u32 prev_brb = tmp_reg; - /* now it's safe to release the lock */ - bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); + tmp_reg = REG_RD(bp, BRB1_REG_NUM_OF_FULL_BLOCKS); + if (!tmp_reg) + break; - bnx2x_undi_int_disable(bp); - port = BP_PORT(bp); + BNX2X_DEV_INFO("BRB still has 0x%08x\n", tmp_reg); - /* close input traffic and wait for it */ - /* Do not rcv packets to BRB */ - REG_WR(bp, (port ? NIG_REG_LLH1_BRB1_DRV_MASK : - NIG_REG_LLH0_BRB1_DRV_MASK), 0x0); - /* Do not direct rcv packets that are not for MCP to - * the BRB */ - REG_WR(bp, (port ? NIG_REG_LLH1_BRB1_NOT_MCP : - NIG_REG_LLH0_BRB1_NOT_MCP), 0x0); - /* clear AEU */ - REG_WR(bp, (port ? MISC_REG_AEU_MASK_ATTN_FUNC_1 : - MISC_REG_AEU_MASK_ATTN_FUNC_0), 0); - msleep(10); + /* reset timer as long as BRB actually gets emptied */ + if (prev_brb > tmp_reg) + timer_count = 1000; + else + timer_count--; - /* save NIG port swap info */ - swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); - swap_en = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); - /* reset device */ - REG_WR(bp, - GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR, - 0xd3ffffff); - REG_WR(bp, - GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, - 0x1403); - /* take the NIG out of reset and restore swap values */ - REG_WR(bp, - GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, - MISC_REGISTERS_RESET_REG_1_RST_NIG); - REG_WR(bp, NIG_REG_PORT_SWAP, swap_val); - REG_WR(bp, NIG_REG_STRAP_OVERRIDE, swap_en); + /* If UNDI resides in memory, manually increment it */ + if (prev_undi) + bnx2x_prev_unload_undi_inc(bp, BP_PORT(bp), 1); - /* send unload done to the MCP */ - bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0); + udelay(10); + } - /* restore our func and fw_seq */ - bp->pf_num = orig_pf_num; - bp->fw_seq = - (SHMEM_RD(bp, func_mb[bp->pf_num].drv_mb_header) & - DRV_MSG_SEQ_NUMBER_MASK); - } else - bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); + if (!timer_count) + BNX2X_ERR("Failed to empty BRB, hope for the best\n"); + + } + + /* No packets are in the pipeline, path is ready for reset */ + bnx2x_reset_common(bp); + + rc = bnx2x_prev_mark_path(bp); + if (rc) { + bnx2x_prev_mcp_done(bp); + return rc; + } + + return bnx2x_prev_mcp_done(bp); +} + +/* previous driver DMAE transaction may have occurred when pre-boot stage ended + * and boot began, or when kdump kernel was loaded. Either case would invalidate + * the addresses of the transaction, resulting in was-error bit set in the pci + * causing all hw-to-host pcie transactions to timeout. If this happened we want + * to clear the interrupt which detected this from the pglueb and the was done + * bit + */ +static void __devinit bnx2x_prev_interrupted_dmae(struct bnx2x *bp) +{ + if (!CHIP_IS_E1x(bp)) { + u32 val = REG_RD(bp, PGLUE_B_REG_PGLUE_B_INT_STS); + if (val & PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN) { + BNX2X_ERR("was error bit was found to be set in pglueb upon startup. Clearing\n"); + REG_WR(bp, PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR, + 1 << BP_FUNC(bp)); + } } } +static int __devinit bnx2x_prev_unload(struct bnx2x *bp) +{ + int time_counter = 10; + u32 rc, fw, hw_lock_reg, hw_lock_val; + BNX2X_DEV_INFO("Entering Previous Unload Flow\n"); + + /* clear hw from errors which mnay have resulted from an interrupted + * dmae transaction. + */ + bnx2x_prev_interrupted_dmae(bp); + + /* Release previously held locks */ + hw_lock_reg = (BP_FUNC(bp) <= 5) ? + (MISC_REG_DRIVER_CONTROL_1 + BP_FUNC(bp) * 8) : + (MISC_REG_DRIVER_CONTROL_7 + (BP_FUNC(bp) - 6) * 8); + + hw_lock_val = (REG_RD(bp, hw_lock_reg)); + if (hw_lock_val) { + if (hw_lock_val & HW_LOCK_RESOURCE_NVRAM) { + BNX2X_DEV_INFO("Release Previously held NVRAM lock\n"); + REG_WR(bp, MCP_REG_MCPR_NVM_SW_ARB, + (MCPR_NVM_SW_ARB_ARB_REQ_CLR1 << BP_PORT(bp))); + } + + BNX2X_DEV_INFO("Release Previously held hw lock\n"); + REG_WR(bp, hw_lock_reg, 0xffffffff); + } else + BNX2X_DEV_INFO("No need to release hw/nvram locks\n"); + + if (MCPR_ACCESS_LOCK_LOCK & REG_RD(bp, MCP_REG_MCPR_ACCESS_LOCK)) { + BNX2X_DEV_INFO("Release previously held alr\n"); + REG_WR(bp, MCP_REG_MCPR_ACCESS_LOCK, 0); + } + + do { + /* Lock MCP using an unload request */ + fw = bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS, 0); + if (!fw) { + BNX2X_ERR("MCP response failure, aborting\n"); + rc = -EBUSY; + break; + } + + if (fw == FW_MSG_CODE_DRV_UNLOAD_COMMON) { + rc = bnx2x_prev_unload_common(bp); + break; + } + + /* non-common reply from MCP night require looping */ + rc = bnx2x_prev_unload_uncommon(bp); + if (rc != BNX2X_PREV_WAIT_NEEDED) + break; + + msleep(20); + } while (--time_counter); + + if (!time_counter || rc) { + BNX2X_ERR("Failed unloading previous driver, aborting\n"); + rc = -EBUSY; + } + + BNX2X_DEV_INFO("Finished Previous Unload Flow [%d]\n", rc); + + return rc; +} + + static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) { - u32 val, val2, val3, val4, id; + + u32 val, val2, val3, val4, id, boot_mode; u16 pmc; /* Get the chip revision id and number. */ @@ -10209,17 +10635,30 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) id |= (val & 0xf); bp->common.chip_id = id; + /* force 57811 according to MISC register */ + if (REG_RD(bp, MISC_REG_CHIP_TYPE) & MISC_REG_CHIP_TYPE_57811_MASK) { + if (CHIP_IS_57810(bp)) + bp->common.chip_id = (CHIP_NUM_57811 << 16) | + (bp->common.chip_id & 0x0000FFFF); + else if (CHIP_IS_57810_MF(bp)) + bp->common.chip_id = (CHIP_NUM_57811_MF << 16) | + (bp->common.chip_id & 0x0000FFFF); + bp->common.chip_id |= 0x1; + } + /* Set doorbell size */ bp->db_size = (1 << BNX2X_DB_SHIFT); - if (CHIP_IS_E2(bp)) { + if (!CHIP_IS_E1x(bp)) { val = REG_RD(bp, MISC_REG_PORT4MODE_EN_OVWR); if ((val & 1) == 0) val = REG_RD(bp, MISC_REG_PORT4MODE_EN); else val = (val >> 1) & 1; - BNX2X_DEV_INFO("chip is in %s\n", val? "4_PORT_MODE" : "2_PORT_MODE"); - bp->common.chip_port_mode = val? CHIP_4_PORT_MODE : CHIP_2_PORT_MODE; + BNX2X_DEV_INFO("chip is in %s\n", val ? "4_PORT_MODE" : + "2_PORT_MODE"); + bp->common.chip_port_mode = val ? CHIP_4_PORT_MODE : + CHIP_2_PORT_MODE; if (CHIP_MODE_IS_4_PORT(bp)) bp->pfid = (bp->pf_num >> 1); /* 0..3 */ @@ -10230,6 +10669,8 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) bp->pfid = bp->pf_num; /* 0..7 */ } + BNX2X_DEV_INFO("pf_id: %x", bp->pfid); + bp->link_params.chip_id = bp->common.chip_id; BNX2X_DEV_INFO("chip ID is 0x%x\n", id); @@ -10246,10 +10687,14 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) BNX2X_DEV_INFO("flash_size 0x%x (%d)\n", bp->common.flash_size, bp->common.flash_size); - bp->common.shmem_base = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR); - bp->common.shmem2_base = REG_RD(bp, ((BP_PATH(bp)) ? - MISC_REG_GENERIC_CR_1: + bnx2x_init_shmem(bp); + + + + bp->common.shmem2_base = REG_RD(bp, (BP_PATH(bp) ? + MISC_REG_GENERIC_CR_1 : MISC_REG_GENERIC_CR_0)); + bp->link_params.shmem_base = bp->common.shmem_base; bp->link_params.shmem2_base = bp->common.shmem2_base; BNX2X_DEV_INFO("shmem offset 0x%x shmem2 offset 0x%x\n", @@ -10261,11 +10706,6 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) return; } - val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]); - if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) - != (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) - BNX2X_ERR("BAD MCP validity signature\n"); - bp->common.hw_config = SHMEM_RD(bp, dev_info.shared_hw_config.config); BNX2X_DEV_INFO("hw_config 0x%08x\n", bp->common.hw_config); @@ -10288,8 +10728,8 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) if (val < BNX2X_BC_VER) { /* for now only warn * later we might need to enforce this */ - BNX2X_ERR("This driver needs bc_ver %X but found %X," - " please upgrade BC\n", BNX2X_BC_VER, val); + BNX2X_ERR("This driver needs bc_ver %X but found %X, please upgrade BC\n", + BNX2X_BC_VER, val); } bp->link_params.feature_config_flags |= (val >= REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL) ? @@ -10298,14 +10738,40 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) bp->link_params.feature_config_flags |= (val >= REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL) ? FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY : 0; + bp->link_params.feature_config_flags |= + (val >= REQ_BC_VER_4_VRFY_AFEX_SUPPORTED) ? + FEATURE_CONFIG_BC_SUPPORTS_AFEX : 0; + bp->link_params.feature_config_flags |= + (val >= REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED) ? + FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED : 0; - if (BP_E1HVN(bp) == 0) { - pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_PMC, &pmc); - bp->flags |= (pmc & PCI_PM_CAP_PME_D3cold) ? 0 : NO_WOL_FLAG; - } else { - /* no WOL capability for E1HVN != 0 */ - bp->flags |= NO_WOL_FLAG; + bp->flags |= (val >= REQ_BC_VER_4_PFC_STATS_SUPPORTED) ? + BC_SUPPORTS_PFC_STATS : 0; + + bp->flags |= (val >= REQ_BC_VER_4_FCOE_FEATURES) ? + BC_SUPPORTS_FCOE_FEATURES : 0; + + boot_mode = SHMEM_RD(bp, + dev_info.port_feature_config[BP_PORT(bp)].mba_config) + & PORT_FEATURE_MBA_BOOT_AGENT_TYPE_MASK; + switch (boot_mode) { + case PORT_FEATURE_MBA_BOOT_AGENT_TYPE_PXE: + bp->common.boot_mode = FEATURE_ETH_BOOTMODE_PXE; + break; + case PORT_FEATURE_MBA_BOOT_AGENT_TYPE_ISCSIB: + bp->common.boot_mode = FEATURE_ETH_BOOTMODE_ISCSI; + break; + case PORT_FEATURE_MBA_BOOT_AGENT_TYPE_FCOE_BOOT: + bp->common.boot_mode = FEATURE_ETH_BOOTMODE_FCOE; + break; + case PORT_FEATURE_MBA_BOOT_AGENT_TYPE_NONE: + bp->common.boot_mode = FEATURE_ETH_BOOTMODE_NONE; + break; } + + pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_PMC, &pmc); + bp->flags |= (pmc & PCI_PM_CAP_PME_D3cold) ? 0 : NO_WOL_FLAG; + BNX2X_DEV_INFO("%sWoL capable\n", (bp->flags & NO_WOL_FLAG) ? "not " : ""); @@ -10321,31 +10787,29 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) #define IGU_FID(val) GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID) #define IGU_VEC(val) GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR) -static int __devinit bnx2x_get_igu_cam_info_e2(struct bnx2x *bp) +static void __devinit bnx2x_get_igu_cam_info(struct bnx2x *bp) { int pfid = BP_FUNC(bp); - int vn = BP_E1HVN(bp); int igu_sb_id; u32 val; - u8 fid; + u8 fid, igu_sb_cnt = 0; bp->igu_base_sb = 0xff; - bp->igu_sb_cnt = 0; if (CHIP_INT_MODE_IS_BC(bp)) { - bp->igu_sb_cnt = NUM_IGU_SB_REQUIRED(bp->l2_cid_count); - + int vn = BP_VN(bp); + igu_sb_cnt = bp->igu_sb_cnt; bp->igu_base_sb = (CHIP_MODE_IS_4_PORT(bp) ? pfid : vn) * FP_SB_MAX_E1x; bp->igu_dsb_id = E1HVN_MAX * FP_SB_MAX_E1x + (CHIP_MODE_IS_4_PORT(bp) ? pfid : vn); - return 0; + return; } /* IGU in normal mode - read CAM */ for (igu_sb_id = 0; igu_sb_id < IGU_REG_MAPPING_MEMORY_SIZE; - igu_sb_id++) { + igu_sb_id++) { val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + igu_sb_id * 4); if (!(val & IGU_REG_MAPPING_MEMORY_VALID)) continue; @@ -10359,24 +10823,23 @@ static int __devinit bnx2x_get_igu_cam_info_e2(struct bnx2x *bp) else { if (bp->igu_base_sb == 0xff) bp->igu_base_sb = igu_sb_id; - bp->igu_sb_cnt++; + igu_sb_cnt++; } } } - /* It's expected that number of CAM entries for this - * functions is equal to the MSI-X table size (which was a - * used during bp->l2_cid_count value calculation. - * We want a harsh warning if these values are different! +#ifdef CONFIG_PCI_MSI + /* Due to new PF resource allocation by MFW T7.4 and above, it's + * optional that number of CAM entries will not be equal to the value + * advertised in PCI. + * Driver should use the minimal value of both as the actual status + * block count */ - WARN_ON(bp->igu_sb_cnt != NUM_IGU_SB_REQUIRED(bp->l2_cid_count)); + bp->igu_sb_cnt = min_t(int, bp->igu_sb_cnt, igu_sb_cnt); +#endif - if (bp->igu_sb_cnt == 0){ + if (igu_sb_cnt == 0) BNX2X_ERR("CAM configuration error\n"); - return -EINVAL; - } - - return 0; } static void __devinit bnx2x_link_settings_supported(struct bnx2x *bp, @@ -10414,8 +10877,7 @@ static void __devinit bnx2x_link_settings_supported(struct bnx2x *bp, } if (!(bp->port.supported[0] || bp->port.supported[1])) { - BNX2X_ERR("NVRAM config error. BAD phy config." - "PHY1 config 0x%x, PHY2 config 0x%x\n", + BNX2X_ERR("NVRAM config error. BAD phy config. PHY1 config 0x%x, PHY2 config 0x%x\n", SHMEM_RD(bp, dev_info.port_hw_config[port].external_phy_config), SHMEM_RD(bp, @@ -10423,22 +10885,25 @@ static void __devinit bnx2x_link_settings_supported(struct bnx2x *bp, return; } - switch (switch_cfg) { - case SWITCH_CFG_1G: - bp->port.phy_addr = REG_RD(bp, NIG_REG_SERDES0_CTRL_PHY_ADDR + - port*0x10); - BNX2X_DEV_INFO("phy_addr 0x%x\n", bp->port.phy_addr); - break; - case SWITCH_CFG_10G: - bp->port.phy_addr = REG_RD(bp, NIG_REG_XGXS0_CTRL_PHY_ADDR + - port*0x18); - BNX2X_DEV_INFO("phy_addr 0x%x\n", bp->port.phy_addr); - break; - default: - BNX2X_ERR("BAD switch_cfg link_config 0x%x\n", - bp->port.link_config[0]); - return; + if (CHIP_IS_E3(bp)) + bp->port.phy_addr = REG_RD(bp, MISC_REG_WC0_CTRL_PHY_ADDR); + else { + switch (switch_cfg) { + case SWITCH_CFG_1G: + bp->port.phy_addr = REG_RD( + bp, NIG_REG_SERDES0_CTRL_PHY_ADDR + port*0x10); + break; + case SWITCH_CFG_10G: + bp->port.phy_addr = REG_RD( + bp, NIG_REG_XGXS0_CTRL_PHY_ADDR + port*0x18); + break; + default: + BNX2X_ERR("BAD switch_cfg link_config 0x%x\n", + bp->port.link_config[0]); + return; + } } + BNX2X_DEV_INFO("phy_addr 0x%x\n", bp->port.phy_addr); /* mask what we support according to speed_cap_mask per configuration */ for (idx = 0; idx < cfg_size; idx++) { if (!(bp->link_params.speed_cap_mask[idx] & @@ -10446,7 +10911,7 @@ static void __devinit bnx2x_link_settings_supported(struct bnx2x *bp, bp->port.supported[idx] &= ~SUPPORTED_10baseT_Half; if (!(bp->link_params.speed_cap_mask[idx] & - PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL)) + PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL)) bp->port.supported[idx] &= ~SUPPORTED_10baseT_Full; if (!(bp->link_params.speed_cap_mask[idx] & @@ -10500,6 +10965,11 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) SPEED_AUTO_NEG; bp->port.advertising[idx] |= bp->port.supported[idx]; + if (bp->link_params.phy[EXT_PHY1].type == + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) + bp->port.advertising[idx] |= + (SUPPORTED_100baseT_Half | + SUPPORTED_100baseT_Full); } else { /* force 10G, no AN */ bp->link_params.req_line_speed[idx] = @@ -10519,11 +10989,9 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) (ADVERTISED_10baseT_Full | ADVERTISED_TP); } else { - BNX2X_ERR("NVRAM config error. " - "Invalid link_config 0x%x" - " speed_cap_mask 0x%x\n", + BNX2X_ERR("NVRAM config error. Invalid link_config 0x%x speed_cap_mask 0x%x\n", link_config, - bp->link_params.speed_cap_mask[idx]); + bp->link_params.speed_cap_mask[idx]); return; } break; @@ -10538,45 +11006,43 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) (ADVERTISED_10baseT_Half | ADVERTISED_TP); } else { - BNX2X_ERR("NVRAM config error. " - "Invalid link_config 0x%x" - " speed_cap_mask 0x%x\n", + BNX2X_ERR("NVRAM config error. Invalid link_config 0x%x speed_cap_mask 0x%x\n", link_config, - bp->link_params.speed_cap_mask[idx]); + bp->link_params.speed_cap_mask[idx]); return; } break; case PORT_FEATURE_LINK_SPEED_100M_FULL: - if (bp->port.supported[idx] & SUPPORTED_100baseT_Full) { + if (bp->port.supported[idx] & + SUPPORTED_100baseT_Full) { bp->link_params.req_line_speed[idx] = SPEED_100; bp->port.advertising[idx] |= (ADVERTISED_100baseT_Full | ADVERTISED_TP); } else { - BNX2X_ERR("NVRAM config error. " - "Invalid link_config 0x%x" - " speed_cap_mask 0x%x\n", + BNX2X_ERR("NVRAM config error. Invalid link_config 0x%x speed_cap_mask 0x%x\n", link_config, - bp->link_params.speed_cap_mask[idx]); + bp->link_params.speed_cap_mask[idx]); return; } break; case PORT_FEATURE_LINK_SPEED_100M_HALF: - if (bp->port.supported[idx] & SUPPORTED_100baseT_Half) { - bp->link_params.req_line_speed[idx] = SPEED_100; - bp->link_params.req_duplex[idx] = DUPLEX_HALF; + if (bp->port.supported[idx] & + SUPPORTED_100baseT_Half) { + bp->link_params.req_line_speed[idx] = + SPEED_100; + bp->link_params.req_duplex[idx] = + DUPLEX_HALF; bp->port.advertising[idx] |= (ADVERTISED_100baseT_Half | ADVERTISED_TP); } else { - BNX2X_ERR("NVRAM config error. " - "Invalid link_config 0x%x" - " speed_cap_mask 0x%x\n", - link_config, - bp->link_params.speed_cap_mask[idx]); + BNX2X_ERR("NVRAM config error. Invalid link_config 0x%x speed_cap_mask 0x%x\n", + link_config, + bp->link_params.speed_cap_mask[idx]); return; } break; @@ -10590,11 +11056,9 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) (ADVERTISED_1000baseT_Full | ADVERTISED_TP); } else { - BNX2X_ERR("NVRAM config error. " - "Invalid link_config 0x%x" - " speed_cap_mask 0x%x\n", - link_config, - bp->link_params.speed_cap_mask[idx]); + BNX2X_ERR("NVRAM config error. Invalid link_config 0x%x speed_cap_mask 0x%x\n", + link_config, + bp->link_params.speed_cap_mask[idx]); return; } break; @@ -10606,48 +11070,46 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) SPEED_2500; bp->port.advertising[idx] |= (ADVERTISED_2500baseX_Full | - ADVERTISED_TP); + ADVERTISED_TP); } else { - BNX2X_ERR("NVRAM config error. " - "Invalid link_config 0x%x" - " speed_cap_mask 0x%x\n", - link_config, - bp->link_params.speed_cap_mask[idx]); + BNX2X_ERR("NVRAM config error. Invalid link_config 0x%x speed_cap_mask 0x%x\n", + link_config, + bp->link_params.speed_cap_mask[idx]); return; } break; case PORT_FEATURE_LINK_SPEED_10G_CX4: - case PORT_FEATURE_LINK_SPEED_10G_KX4: - case PORT_FEATURE_LINK_SPEED_10G_KR: if (bp->port.supported[idx] & SUPPORTED_10000baseT_Full) { bp->link_params.req_line_speed[idx] = SPEED_10000; bp->port.advertising[idx] |= (ADVERTISED_10000baseT_Full | - ADVERTISED_FIBRE); + ADVERTISED_FIBRE); } else { - BNX2X_ERR("NVRAM config error. " - "Invalid link_config 0x%x" - " speed_cap_mask 0x%x\n", - link_config, - bp->link_params.speed_cap_mask[idx]); + BNX2X_ERR("NVRAM config error. Invalid link_config 0x%x speed_cap_mask 0x%x\n", + link_config, + bp->link_params.speed_cap_mask[idx]); return; } break; + case PORT_FEATURE_LINK_SPEED_20G: + bp->link_params.req_line_speed[idx] = SPEED_20000; + break; default: - BNX2X_ERR("NVRAM config error. " - "BAD link speed link_config 0x%x\n", + BNX2X_ERR("NVRAM config error. BAD link speed link_config 0x%x\n", link_config); - bp->link_params.req_line_speed[idx] = SPEED_AUTO_NEG; - bp->port.advertising[idx] = bp->port.supported[idx]; + bp->link_params.req_line_speed[idx] = + SPEED_AUTO_NEG; + bp->port.advertising[idx] = + bp->port.supported[idx]; break; } bp->link_params.req_flow_ctrl[idx] = (link_config & - PORT_FEATURE_FLOW_CONTROL_MASK); + PORT_FEATURE_FLOW_CONTROL_MASK); if ((bp->link_params.req_flow_ctrl[idx] == BNX2X_FLOW_CTRL_AUTO) && !(bp->port.supported[idx] & SUPPORTED_Autoneg)) { @@ -10655,8 +11117,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) BNX2X_FLOW_CTRL_NONE; } - BNX2X_DEV_INFO("req_line_speed %d req_duplex %d req_flow_ctrl" - " 0x%x advertising 0x%x\n", + BNX2X_DEV_INFO("req_line_speed %d req_duplex %d req_flow_ctrl 0x%x advertising 0x%x\n", bp->link_params.req_line_speed[idx], bp->link_params.req_duplex[idx], bp->link_params.req_flow_ctrl[idx], @@ -10666,21 +11127,20 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) static void __devinit bnx2x_set_mac_buf(u8 *mac_buf, u32 mac_lo, u16 mac_hi) { - mac_hi = cpu_to_be16(mac_hi); - mac_lo = cpu_to_be32(mac_lo); - memcpy(mac_buf, &mac_hi, sizeof(mac_hi)); - memcpy(mac_buf + sizeof(mac_hi), &mac_lo, sizeof(mac_lo)); + __be16 mac_hi_be = cpu_to_be16(mac_hi); + __be32 mac_lo_be = cpu_to_be32(mac_lo); + memcpy(mac_buf, &mac_hi_be, sizeof(mac_hi_be)); + memcpy(mac_buf + sizeof(mac_hi_be), &mac_lo_be, sizeof(mac_lo_be)); } static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp) { - int /*abs*/port = BP_PORT(bp); - u32 val, val2; + int port = BP_PORT(bp); u32 config; - u32 ext_phy_type, ext_phy_config;; + u32 ext_phy_type, ext_phy_config; bp->link_params.bp = bp; - bp->link_params.port = BP_PORT(bp); + bp->link_params.port = port; bp->link_params.lane_config = SHMEM_RD(bp, dev_info.port_hw_config[port].lane_config); @@ -10706,8 +11166,7 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp) bp->wol = (!(bp->flags & NO_WOL_FLAG) && (config & PORT_FEATURE_WOL_ENABLED)); - BNX2X_DEV_INFO("lane_config 0x%08x " - "speed_cap_mask0 0x%08x link_config0 0x%08x\n", + BNX2X_DEV_INFO("lane_config 0x%08x speed_cap_mask0 0x%08x link_config0 0x%08x\n", bp->link_params.lane_config, bp->link_params.speed_cap_mask[0], bp->port.link_config[0]); @@ -10735,41 +11194,303 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp) bp->mdio.prtad = XGXS_EXT_PHY_ADDR(ext_phy_config); - val2 = SHMEM_RD(bp, dev_info.port_hw_config[port].mac_upper); - val = SHMEM_RD(bp, dev_info.port_hw_config[port].mac_lower); - bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2); + /* + * Check if hw lock is required to access MDC/MDIO bus to the PHY(s) + * In MF mode, it is set to cover self test cases + */ + if (IS_MF(bp)) + bp->port.need_hw_lock = 1; + else + bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, + bp->common.shmem_base, + bp->common.shmem2_base); +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + if (autogreeen == AUTO_GREEN_FORCE_ON) + bp->link_params.feature_config_flags |= + FEATURE_CONFIG_AUTOGREEEN_ENABLED; + else if (autogreeen == AUTO_GREEN_FORCE_OFF) + bp->link_params.feature_config_flags &= + ~FEATURE_CONFIG_AUTOGREEEN_ENABLED; + else + config = + SHMEM_RD(bp, dev_info.port_feature_config[port].config); + if (config & PORT_FEAT_CFG_AUTOGREEEN_ENABLED) + bp->link_params.feature_config_flags |= + FEATURE_CONFIG_AUTOGREEEN_ENABLED; +#endif +} + +void bnx2x_get_iscsi_info(struct bnx2x *bp) +{ +#ifdef BNX2X_UPSTREAM /* BNX2X_UPSTREAM */ + u32 no_flags = NO_ISCSI_FLAG; +#else + u32 no_flags = NO_ISCSI_FLAG | NO_ISCSI_OOO_FLAG; +#endif +#ifdef BCM_CNIC + int port = BP_PORT(bp); + + u32 max_iscsi_conn = FW_ENCODE_32BIT_PATTERN ^ SHMEM_RD(bp, + drv_lic_key[port].max_iscsi_conn); + + /* Get the number of maximum allowed iSCSI connections */ + bp->cnic_eth_dev.max_iscsi_conn = + (max_iscsi_conn & BNX2X_MAX_ISCSI_INIT_CONN_MASK) >> + BNX2X_MAX_ISCSI_INIT_CONN_SHIFT; + + BNX2X_DEV_INFO("max_iscsi_conn 0x%x\n", + bp->cnic_eth_dev.max_iscsi_conn); + + /* + * If maximum allowed number of connections is zero - + * disable the feature. + */ + if (!bp->cnic_eth_dev.max_iscsi_conn) + bp->flags |= no_flags; +#else + bp->flags |= no_flags; +#endif +} + +#ifdef BCM_CNIC +static void __devinit bnx2x_get_ext_wwn_info(struct bnx2x *bp, int func) +{ + /* Port info */ + bp->cnic_eth_dev.fcoe_wwn_port_name_hi = + MF_CFG_RD(bp, func_ext_config[func].fcoe_wwn_port_name_upper); + bp->cnic_eth_dev.fcoe_wwn_port_name_lo = + MF_CFG_RD(bp, func_ext_config[func].fcoe_wwn_port_name_lower); + + /* Node info */ + bp->cnic_eth_dev.fcoe_wwn_node_name_hi = + MF_CFG_RD(bp, func_ext_config[func].fcoe_wwn_node_name_upper); + bp->cnic_eth_dev.fcoe_wwn_node_name_lo = + MF_CFG_RD(bp, func_ext_config[func].fcoe_wwn_node_name_lower); +} +#endif +static void __devinit bnx2x_get_fcoe_info(struct bnx2x *bp) +{ +#ifdef BCM_CNIC + int port = BP_PORT(bp); + int func = BP_ABS_FUNC(bp); + + u32 max_fcoe_conn = FW_ENCODE_32BIT_PATTERN ^ SHMEM_RD(bp, + drv_lic_key[port].max_fcoe_conn); + + /* Get the number of maximum allowed FCoE connections */ + bp->cnic_eth_dev.max_fcoe_conn = + (max_fcoe_conn & BNX2X_MAX_FCOE_INIT_CONN_MASK) >> + BNX2X_MAX_FCOE_INIT_CONN_SHIFT; + + /* Read the WWN: */ + if (!IS_MF(bp)) { + /* Port info */ + bp->cnic_eth_dev.fcoe_wwn_port_name_hi = + SHMEM_RD(bp, + dev_info.port_hw_config[port]. + fcoe_wwn_port_name_upper); + bp->cnic_eth_dev.fcoe_wwn_port_name_lo = + SHMEM_RD(bp, + dev_info.port_hw_config[port]. + fcoe_wwn_port_name_lower); + + /* Node info */ + bp->cnic_eth_dev.fcoe_wwn_node_name_hi = + SHMEM_RD(bp, + dev_info.port_hw_config[port]. + fcoe_wwn_node_name_upper); + bp->cnic_eth_dev.fcoe_wwn_node_name_lo = + SHMEM_RD(bp, + dev_info.port_hw_config[port]. + fcoe_wwn_node_name_lower); + } else if (!IS_MF_SD(bp)) { + /* + * Read the WWN info only if the FCoE feature is enabled for + * this function. + */ + if (BNX2X_MF_EXT_PROTOCOL_FCOE(bp)) + bnx2x_get_ext_wwn_info(bp, func); + + } else if (IS_MF_FCOE_SD(bp)) + bnx2x_get_ext_wwn_info(bp, func); + + BNX2X_DEV_INFO("max_fcoe_conn 0x%x\n", bp->cnic_eth_dev.max_fcoe_conn); + + /* + * If maximum allowed number of connections is zero - + * disable the feature. + */ + if (!bp->cnic_eth_dev.max_fcoe_conn) + bp->flags |= NO_FCOE_FLAG; +#else + bp->flags |= NO_FCOE_FLAG; +#endif +} + +static void __devinit bnx2x_get_cnic_info(struct bnx2x *bp) +{ + /* + * iSCSI may be dynamically disabled, but reading + * info here will allow us to save some memory + * if the feature is disabled for good + */ + bnx2x_get_iscsi_info(bp); + bnx2x_get_fcoe_info(bp); +} + +static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp) +{ + u32 val, val2; + int func = BP_ABS_FUNC(bp); + int port = BP_PORT(bp); +#ifdef BCM_CNIC + u8 *iscsi_mac = bp->cnic_eth_dev.iscsi_mac; + u8 *fip_mac = bp->fip_mac; +#endif + + /* Zero primary MAC configuration */ + memset(bp->dev->dev_addr, 0, ETH_ALEN); + + if (BP_NOMCP(bp)) { +#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ + BNX2X_ERROR("warning: random MAC workaround active\n"); + eth_hw_addr_random(bp->dev); +#else + BNX2X_ERROR("warning: constant MAC workaround active\n"); + bp->dev->dev_addr[0] = 0; + bp->dev->dev_addr[1] = 0x50; + bp->dev->dev_addr[2] = 0xc2; + bp->dev->dev_addr[3] = 0x2c; + bp->dev->dev_addr[4] = (func + 1) * 0x10; + bp->dev->dev_addr[5] = 0x00; +#endif + } else if (IS_MF(bp)) { + val2 = MF_CFG_RD(bp, func_mf_config[func].mac_upper); + val = MF_CFG_RD(bp, func_mf_config[func].mac_lower); + if ((val2 != FUNC_MF_CFG_UPPERMAC_DEFAULT) && + (val != FUNC_MF_CFG_LOWERMAC_DEFAULT)) + bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2); + +#ifdef BCM_CNIC + /* + * iSCSI and FCoE NPAR MACs: if there is no either iSCSI or + * FCoE MAC then the appropriate feature should be disabled. + * + * In non SD mode features configuration comes from + * struct func_ext_config. + */ + if (!IS_MF_SD(bp)) { + u32 cfg = MF_CFG_RD(bp, func_ext_config[func].func_cfg); + if (cfg & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD) { + val2 = MF_CFG_RD(bp, func_ext_config[func]. + iscsi_mac_addr_upper); + val = MF_CFG_RD(bp, func_ext_config[func]. + iscsi_mac_addr_lower); + bnx2x_set_mac_buf(iscsi_mac, val, val2); + BNX2X_DEV_INFO("Read iSCSI MAC: "BNX2X_MAC_FMT"\n", + BNX2X_MAC_PRN_LIST(iscsi_mac)); + } else + bp->flags |= NO_ISCSI_OOO_FLAG | NO_ISCSI_FLAG; + + if (cfg & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD) { + val2 = MF_CFG_RD(bp, func_ext_config[func]. + fcoe_mac_addr_upper); + val = MF_CFG_RD(bp, func_ext_config[func]. + fcoe_mac_addr_lower); + bnx2x_set_mac_buf(fip_mac, val, val2); + BNX2X_DEV_INFO("Read FCoE L2 MAC: "BNX2X_MAC_FMT"\n", + BNX2X_MAC_PRN_LIST(fip_mac)); + + } else + bp->flags |= NO_FCOE_FLAG; + + bp->mf_ext_config = cfg; + + } else { /* SD MODE */ + if (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) { + /* use primary mac as iscsi mac */ + memcpy(iscsi_mac, bp->dev->dev_addr, ETH_ALEN); + + BNX2X_DEV_INFO("SD ISCSI MODE\n"); + BNX2X_DEV_INFO("Read iSCSI MAC: "BNX2X_MAC_FMT"\n", + BNX2X_MAC_PRN_LIST(iscsi_mac)); + } else if (BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) { + /* use primary mac as fip mac */ + memcpy(fip_mac, bp->dev->dev_addr, ETH_ALEN); + BNX2X_DEV_INFO("SD FCoE MODE\n"); + BNX2X_DEV_INFO("Read FIP MAC: "BNX2X_MAC_FMT"\n", + BNX2X_MAC_PRN_LIST(fip_mac)); + } + } + + if (IS_MF_STORAGE_SD(bp)) + /* Zero primary MAC configuration */ + memset(bp->dev->dev_addr, 0, ETH_ALEN); + + if (IS_MF_FCOE_AFEX(bp)) + /* use FIP MAC as primary MAC */ + memcpy(bp->dev->dev_addr, fip_mac, ETH_ALEN); + +#endif + } else { + /* in SF read MACs from port configuration */ + val2 = SHMEM_RD(bp, dev_info.port_hw_config[port].mac_upper); + val = SHMEM_RD(bp, dev_info.port_hw_config[port].mac_lower); + bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2); + +#ifdef BCM_CNIC + val2 = SHMEM_RD(bp, dev_info.port_hw_config[port]. + iscsi_mac_upper); + val = SHMEM_RD(bp, dev_info.port_hw_config[port]. + iscsi_mac_lower); + bnx2x_set_mac_buf(iscsi_mac, val, val2); + + val2 = SHMEM_RD(bp, dev_info.port_hw_config[port]. + fcoe_fip_mac_upper); + val = SHMEM_RD(bp, dev_info.port_hw_config[port]. + fcoe_fip_mac_lower); + bnx2x_set_mac_buf(fip_mac, val, val2); +#endif + } + memcpy(bp->link_params.mac_addr, bp->dev->dev_addr, ETH_ALEN); #ifdef ETHTOOL_GPERMADDR /* BNX2X_UPSTREAM */ memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN); #endif #ifdef BCM_CNIC - val2 = SHMEM_RD(bp, dev_info.port_hw_config[port].iscsi_mac_upper); - val = SHMEM_RD(bp, dev_info.port_hw_config[port].iscsi_mac_lower); - bnx2x_set_mac_buf(bp->iscsi_mac, val, val2); -#endif + /* Disable iSCSI OOO if MAC configuration is + * invalid. + */ + if (!is_valid_ether_addr(iscsi_mac)) { + bp->flags |= NO_ISCSI_OOO_FLAG | + NO_ISCSI_FLAG; + memset(iscsi_mac, 0, ETH_ALEN); + } -#ifdef BCM_CNIC - /* Inform the upper layers about FCoE MAC */ - if (!CHIP_IS_E1x(bp)) { - if (!IS_MF(bp)) - memcpy(bp->fip_mac, bp->iscsi_mac, - sizeof(bp->fip_mac)); - else - memcpy(bp->fip_mac, bp->dev->dev_addr, - sizeof(bp->fip_mac)); + /* Disable FCoE if MAC configuration is + * invalid. + */ + if (!is_valid_ether_addr(fip_mac)) { + bp->flags |= NO_FCOE_FLAG; + memset(bp->fip_mac, 0, ETH_ALEN); } #endif + + if (!bnx2x_is_valid_ether_addr(bp, bp->dev->dev_addr)) + dev_err(&bp->pdev->dev, + "bad Ethernet MAC address configuration: "BNX2X_MAC_FMT"\n" + "change it manually before bringing up the appropriate network interface\n", + BNX2X_MAC_PRN_LIST(bp->dev->dev_addr)); } static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) { int /*abs*/func = BP_ABS_FUNC(bp); - int vn, port; - u32 val = 0, val2 = 0; + int vn; + u32 val = 0; int rc = 0; - bnx2x_get_common_hwinfo(bp); /* @@ -10780,22 +11501,44 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) bp->igu_dsb_id = DEF_SB_IGU_ID; bp->igu_base_sb = 0; - bp->igu_sb_cnt = NUM_IGU_SB_REQUIRED(bp->l2_cid_count); - } else { bp->common.int_block = INT_BLOCK_IGU; + + /* do not allow device reset during IGU info preocessing */ + bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RESET); + val = REG_RD(bp, IGU_REG_BLOCK_CONFIGURATION); + if (val & IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN) { - DP(NETIF_MSG_PROBE, "IGU Backward Compatible Mode\n"); + int tout = 5000; + + BNX2X_DEV_INFO("FORCING Normal Mode\n"); + + val &= ~(IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN); + REG_WR(bp, IGU_REG_BLOCK_CONFIGURATION, val); + REG_WR(bp, IGU_REG_RESET_MEMORIES, 0x7f); + + while (tout && REG_RD(bp, IGU_REG_RESET_MEMORIES)) { + tout--; + usleep_range(1000, 1000); + } + + if (REG_RD(bp, IGU_REG_RESET_MEMORIES)) { + dev_err(&bp->pdev->dev, + "FORCING Normal Mode failed!!!\n"); + return -EPERM; + } + } + + if (val & IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN) { + BNX2X_DEV_INFO("IGU Backward Compatible Mode\n"); bp->common.int_block |= INT_BLOCK_MODE_BW_COMP; } else - DP(NETIF_MSG_PROBE, "IGU Normal Mode\n"); + BNX2X_DEV_INFO("IGU Normal Mode\n"); - rc = bnx2x_get_igu_cam_info_e2(bp); - - if (rc) - return rc; + bnx2x_get_igu_cam_info(bp); + bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESET); } /* @@ -10804,7 +11547,7 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) * determine the id used by the FW. */ if (CHIP_IS_E1x(bp)) - bp->base_fw_ndsb = BP_PORT(bp) * FP_SB_MAX_E1x; + bp->base_fw_ndsb = BP_PORT(bp) * FP_SB_MAX_E1x + BP_L_ID(bp); else /* * 57712 - we currently use one FW SB per IGU SB (Rx and Tx of * the same queue are indicated on the same IGU SB). So we prefer @@ -10812,10 +11555,9 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) */ bp->base_fw_ndsb = bp->igu_base_sb; - - DP(NETIF_MSG_PROBE, "igu_dsb_id %d igu_base_sb %d igu_sb_cnt %d\n " - "base_fw_ndsb %d\n", - bp->igu_dsb_id, bp->igu_base_sb, bp->igu_sb_cnt, bp->base_fw_ndsb); + BNX2X_DEV_INFO("igu_dsb_id %d igu_base_sb %d igu_sb_cnt %d\n" + "base_fw_ndsb %d\n", bp->igu_dsb_id, bp->igu_base_sb, + bp->igu_sb_cnt, bp->base_fw_ndsb); /* * Initialize MF configuration @@ -10823,14 +11565,13 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) bp->mf_ov = 0; bp->mf_mode = 0; - vn = BP_E1HVN(bp); - port = BP_PORT(bp); + vn = BP_VN(bp); if (!CHIP_IS_E1(bp) && !BP_NOMCP(bp)) { - DP(NETIF_MSG_PROBE, - "shmem2base 0x%x, size %d, mfcfg offset %d\n", - bp->common.shmem2_base, SHMEM2_RD(bp, size), - (u32)offsetof(struct shmem2_region, mf_cfg_addr)); + BNX2X_DEV_INFO("shmem2base 0x%x, size %d, mfcfg offset %d\n", + bp->common.shmem2_base, SHMEM2_RD(bp, size), + (u32)offsetof(struct shmem2_region, mf_cfg_addr)); + if (SHMEM2_HAS(bp, mf_cfg_addr)) bp->common.mf_cfg_base = SHMEM2_RD(bp, mf_cfg_addr); else @@ -10839,7 +11580,7 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) E1H_FUNC_MAX * sizeof(struct drv_func_mb); /* * get mf configuration: - * 1. existance of MF configuration + * 1. existence of MF configuration * 2. MAC address must be legal (check only upper bytes) * for Switch-Independent mode; * OVLAN must be legal for Switch-Dependent mode @@ -10860,7 +11601,20 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) bp->mf_mode = MULTI_FUNCTION_SI; bp->mf_config[vn] = MF_CFG_RD(bp, func_mf_config[func].config); - } + } else + BNX2X_DEV_INFO("illegal MAC address for SI\n"); + break; + case SHARED_FEAT_CFG_FORCE_SF_MODE_AFEX_MODE: + if ((!CHIP_IS_E1x(bp)) && + (MF_CFG_RD(bp, func_mf_config[func]. + mac_upper) != 0xffff) && + (SHMEM2_HAS(bp, + afex_driver_support))) { + bp->mf_mode = MULTI_FUNCTION_AFEX; + bp->mf_config[vn] = MF_CFG_RD(bp, + func_mf_config[func].config); + } else + BNX2X_DEV_INFO("can not configure NPAR-SD mode\n"); break; case SHARED_FEAT_CFG_FORCE_SF_MODE_MF_ALLOWED: /* get OV configuration */ @@ -10872,45 +11626,69 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) bp->mf_mode = MULTI_FUNCTION_SD; bp->mf_config[vn] = MF_CFG_RD(bp, func_mf_config[func].config); - } + } else + BNX2X_DEV_INFO("illegal OV for SD\n"); break; default: /* Unknown configuration: reset mf_config */ bp->mf_config[vn] = 0; + BNX2X_DEV_INFO("unknown MF mode 0x%x\n", val); } } BNX2X_DEV_INFO("%s function mode\n", IS_MF(bp) ? "multi" : "single"); - switch(bp->mf_mode) { + switch (bp->mf_mode) { case MULTI_FUNCTION_SD: val = MF_CFG_RD(bp, func_mf_config[func].e1hov_tag) & FUNC_MF_CFG_E1HOV_TAG_MASK; if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) { bp->mf_ov = val; - BNX2X_DEV_INFO("MF OV for func %d is %d" - " (0x%04x)\n", func, - bp->mf_ov, bp->mf_ov); + bp->path_has_ovlan = true; + + BNX2X_DEV_INFO("MF OV for func %d is %d (0x%04x)\n", + func, bp->mf_ov, bp->mf_ov); } else { - BNX2X_ERR("No valid MF OV for func %d," - " aborting\n", func); - rc = -EPERM; + dev_err(&bp->pdev->dev, + "No valid MF OV for func %d, aborting\n", + func); + return -EPERM; } break; + case MULTI_FUNCTION_AFEX: + BNX2X_DEV_INFO("func %d is in MF afex mode\n", func); + break; case MULTI_FUNCTION_SI: - BNX2X_DEV_INFO("func %d is in MF " - "switch-independent mode\n", func); + BNX2X_DEV_INFO("func %d is in MF switch-independent mode\n", + func); break; default: if (vn) { - BNX2X_ERR("VN %d in single function mode," - " aborting\n", vn); - rc = -EPERM; + dev_err(&bp->pdev->dev, + "VN %d is in a single function mode, aborting\n", + vn); + return -EPERM; } break; } + /* check if other port on the path needs ovlan: + * Since MF configuration is shared between ports + * Possible mixed modes are only + * {SF, SI} {SF, SD} {SD, SF} {SI, SF} + */ + if (CHIP_MODE_IS_4_PORT(bp) && + !bp->path_has_ovlan && + !IS_MF(bp) && + bp->common.mf_cfg_base != SHMEM_MF_CFG_ADDR_NONE) { + u8 other_port = !BP_PORT(bp); + u8 other_func = BP_PATH(bp) + 2*other_port; + val = MF_CFG_RD(bp, + func_mf_config[other_func].e1hov_tag); + if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) + bp->path_has_ovlan = true; + } } #define NO_MCP_WA_CFG_SET_ADDR (0xA0000) @@ -10927,352 +11705,167 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) #define NO_MCP_WA_CLC_SHMEM (0xAF900) - if (BP_NOMCP(bp) && CHIP_IS_E2(bp)) { + if (BP_NOMCP(bp) && !CHIP_IS_E1x(bp)) { val = REG_RD(bp, /*bp->common.shmem_base*/ + NO_MCP_WA_CFG_SET_ADDR); /* should have a magic number written if configuration was set otherwise, use default above */ if (val == NO_MCP_WA_CFG_SET_MAGIC) { val = REG_RD(bp, /*bp->common.shmem_base*/ + NO_MCP_WA_FORCE_5710); if (!val) { - bp->mf_mode = REG_RD(bp, /*bp->common.shmem_base*/ + NO_MCP_WA_MULTI_VNIC_MODE); + u32 vnic_mode = REG_RD(bp, NO_MCP_WA_MULTI_VNIC_MODE); + vnic_mode &= SHARED_FEAT_CFG_FORCE_SF_MODE_MASK; + switch (vnic_mode) { + case SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT: + if (MF_CFG_RD(bp, func_mf_config[func].mac_upper) != 0xffff) + bp->mf_mode = MULTI_FUNCTION_SI; + else + dev_err(&bp->pdev->dev, + "No valid MAC for func %d\n", + func); + break; + case SHARED_FEAT_CFG_FORCE_SF_MODE_MF_ALLOWED: + val = REG_RD(bp, NO_MCP_WA_OVLAN(func)) + & FUNC_MF_CFG_E1HOV_TAG_MASK; - if (IS_MF(bp)) { - val = REG_RD(bp, /*bp->common.shmem_base*/ + NO_MCP_WA_OVLAN(func)) & FUNC_MF_CFG_E1HOV_TAG_MASK; if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) { bp->mf_ov = val; - BNX2X_DEV_INFO("MF OV for func %d is %d " - "(0x%04x)\n", + bp->path_has_ovlan = true; + + BNX2X_DEV_INFO("MF OV for func %d is %d (0x%04x)\n", func, bp->mf_ov, bp->mf_ov); - } else { - BNX2X_ERR("!!! No valid MF OV for func %d," - " aborting\n", func); - rc = -EPERM; - } + + bp->mf_mode = MULTI_FUNCTION_SD; + } else + dev_err(&bp->pdev->dev, + "No valid MF OV for func %d\n", + func); + break; + default: + /*SF*/ + break; + } + + if (CHIP_MODE_IS_4_PORT(bp) && + !bp->path_has_ovlan && + !IS_MF(bp)) { + u8 other_port = !BP_PORT(bp); + u8 other_func = BP_PATH(bp) + 2*other_port; + val = REG_RD(bp, NO_MCP_WA_OVLAN(other_func)) & FUNC_MF_CFG_E1HOV_TAG_MASK; + if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) + bp->path_has_ovlan = true; } } else - BNX2X_ERR("NO_MCP_WA_FORCE_5710\n"); + dev_err(&bp->pdev->dev, + "NO_MCP_WA_FORCE_5710\n"); } else - BNX2X_ERR("NO_MCP_WA_CFG_SET_MAGIC not found\n"); + dev_err(&bp->pdev->dev, + "NO_MCP_WA_CFG_SET_MAGIC not found\n"); BNX2X_DEV_INFO("%s function mode\n", - IS_MF(bp) ? "multi" : "single"); + IS_MF(bp) ? "multi" : "single"); + + if (!IS_MF(bp)) + if (vn) { + dev_err(&bp->pdev->dev, + "VN %d is in a single function mode, aborting\n", + vn); + return -EPERM; + } } + BNX2X_DEV_INFO("OVLAN is %s\n", bp->path_has_ovlan ? + "enabled" : "disabled"); + /* adjust igu_sb_cnt to MF for E1x */ if (CHIP_IS_E1x(bp) && IS_MF(bp)) bp->igu_sb_cnt /= E1HVN_MAX; - /* - * port info - */ - if (!BP_NOMCP(bp)) { + /* port info */ + bnx2x_get_port_hwinfo(bp); - bnx2x_get_port_hwinfo(bp); + /* Get MAC addresses */ + bnx2x_get_mac_hwinfo(bp); - bp->fw_seq = - (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) & - DRV_MSG_SEQ_NUMBER_MASK); - BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq); - } - - - /* - * Get MAC address - */ - if (IS_MF(bp)) { - if (!CHIP_REV_IS_SLOW(bp)) { - val2 = MF_CFG_RD(bp, func_mf_config[func].mac_upper); - val = MF_CFG_RD(bp, func_mf_config[func].mac_lower); - } else { - val2 = 0x0050; - val = 0xc22c7090; - val += (func << 8); - } - if ((val2 != FUNC_MF_CFG_UPPERMAC_DEFAULT) && - (val != FUNC_MF_CFG_LOWERMAC_DEFAULT)) { - bp->dev->dev_addr[0] = (u8)(val2 >> 8 & 0xff); - bp->dev->dev_addr[1] = (u8)(val2 & 0xff); - bp->dev->dev_addr[2] = (u8)(val >> 24 & 0xff); - bp->dev->dev_addr[3] = (u8)(val >> 16 & 0xff); - bp->dev->dev_addr[4] = (u8)(val >> 8 & 0xff); - bp->dev->dev_addr[5] = (u8)(val & 0xff); - memcpy(bp->link_params.mac_addr, bp->dev->dev_addr, - ETH_ALEN); -#ifdef ETHTOOL_GPERMADDR /* BNX2X_UPSTREAM */ - memcpy(bp->dev->perm_addr, bp->dev->dev_addr, - ETH_ALEN); -#endif - } - - return rc; - } - - if (BP_NOMCP(bp)) { - /* only supposed to happen on emulation/FPGA */ -#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ - BNX2X_ERROR("warning: random MAC workaround active\n"); - random_ether_addr(bp->dev->dev_addr); - bp->dev->dev_addr[0] = 0; -#else - BNX2X_ERROR("warning: constant MAC workaround active\n"); - bp->dev->dev_addr[0] = 0; - bp->dev->dev_addr[1] = 0x50; - bp->dev->dev_addr[2] = 0xc2; - bp->dev->dev_addr[3] = 0x2c; - bp->dev->dev_addr[4] = (func + 1) * 0x10; - bp->dev->dev_addr[5] = 0x00; - memcpy(bp->link_params.mac_addr, bp->dev->dev_addr, ETH_ALEN); -#endif -#ifdef ETHTOOL_GPERMADDR /* BNX2X_UPSTREAM */ - memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN); -#endif - } + bnx2x_get_cnic_info(bp); return rc; } -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ -static void __devinit bnx2x_init_safc(struct bnx2x *bp) +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +static void bnx2x_init_multi_cos(struct bnx2x *bp) { - int i, cos, max_cos, max_queues; - - bp->flags &= ~SAFC_TX_FLAG; - - for (i = 0; i < BNX2X_MAX_PRIORITY; i++) - bp->pri_map[i] = 0; - - max_cos = BNX2X_MAX_COS; - bp->cos_weight_sum = 0; - for (cos = 0; cos < BNX2X_MAX_COS; cos++) { - bp->qs_per_cos[cos] = 0; - bp->cos_min_rate[cos] = 0; - } - - switch (bp->multi_mode) { - case ETH_RSS_MODE_DISABLED: - bp->qs_per_cos[0] = 1; - break; - - case ETH_RSS_MODE_REGULAR: - bp->qs_per_cos[0] = bnx2x_calc_num_queues(bp); - break; - - case ETH_RSS_MODE_VLAN_PRI: - case ETH_RSS_MODE_E1HOV_PRI: - if (!CHIP_IS_E1(bp)) { - bp->flags |= SAFC_TX_FLAG; - max_cos = BNX2X_MAX_TX_COS; + int pri, cos; + for (pri = 0; pri < BNX2X_MAX_PRIORITY; pri++) { + cos = ((pri_map & (0xf << pri*4)) >> pri*4); + if (cos < bp->max_cos) + bp->prio_to_cos[pri] = cos; + else { + dev_err(&bp->pdev->dev, + "Illegal COS (%d) for priority %d Max COS allowed is %d defaulting to 0\n", + cos, pri, bp->max_cos - 1); + bp->prio_to_cos[pri] = 0; } - - /* fallthrough */ - - case ETH_RSS_MODE_IP_DSCP: - /* COS 0 must have at least 1 queue */ - if (BNX2X_COS_QUEUES(0) == 0) { - netdev_err(bp->dev, - "Illegal number of queues per COS 0 defaulting " - "to 1\n"); - qs_per_cos |= 0x1; - } - - for (i = 0; i < BNX2X_MAX_PRIORITY; i++) { - cos = ((pri_map & (0xf << i*4)) >> i*4); - if (cos < max_cos) { - bp->pri_map[i] = cos; - if (BNX2X_COS_QUEUES(cos) == 0) { - netdev_err(bp->dev, - "Illegal number of queues per " - "COS %d defaulting to 1\n", - cos); - qs_per_cos |= (0x1 << cos*8); - } - } else { - netdev_err(bp->dev, - "Illegal COS (%d) for priority %d " - "defaulting to 0\n", cos, i); - pri_map &= ~(0xf << i*4); - bp->pri_map[i] = 0; - } - } - - max_queues = BNX2X_MAX_QUEUES(bp); - for (cos = 0; cos < BNX2X_MAX_COS; cos++) { - i = BNX2X_COS_QUEUES(cos); - if (i <= max_queues) { - bp->qs_per_cos[cos] = i; - max_queues -= i; - } else { - bp->qs_per_cos[cos] = max_queues; - max_queues = 0; - } - if (bp->qs_per_cos[cos] == 0) - for (i = 0; i < BNX2X_MAX_PRIORITY; i++) - if (bp->pri_map[i] == cos) { - netdev_err(bp->dev, - "Illegal COS (%d) for " - "priority %d " - "defaulting to 0\n", - cos, i); - pri_map &= ~(0xf << i*4); - bp->pri_map[i] = 0; - } - } - -#if (LINUX_VERSION_CODE < 0x02061e) /* ! BNX2X_UPSTREAM */ - bp->dev->select_queue = bnx2x_select_queue; -#endif - - if (cos_min_rate == 0) - break; - - for (cos = 0; cos < BNX2X_MAX_COS; cos++) { - i = BNX2X_COS_RATE(cos); - if (i > 100) { - netdev_err(bp->dev, - "Illegal rate (%d) for COS %d " - "defaulting to 100\n", i, cos); - i = 100; - cos_min_rate |= (i << cos*8); - } - i *= 100; - if (bp->qs_per_cos[cos]) { - if (i == 0) { - netdev_err(bp->dev, - "Illegal rate for COS %d " - "defaulting to 1\n", cos); - i = DEF_MIN_RATE; - cos_min_rate |= (i << cos*8); - } - } else { - if (i) { - netdev_err(bp->dev, - "Illegal rate (%d) for COS %d " - "with no queues " - "defaulting to 0\n", i, cos); - i = 0; - cos_min_rate &= ~(0xff << cos*8); - } - } - bp->cos_min_rate[cos] = i; - bp->cos_weight_sum += i; - } - break; - - default: - bp->multi_mode = ETH_RSS_MODE_DISABLED; - bp->qs_per_cos[0] = 1; - break; } } #endif -static inline u16 bnx2x_vpd_lrdt_size(u8 *lrdt) -{ - return (u16)lrdt[1] + ((u16)lrdt[2] << 8); -} - -static inline u8 bnx2x_vpd_srdt_size(u8 *srdt) -{ - return (*srdt) & BNX2X_VPD_SRDT_LEN_MASK; -} - -static int __devinit bnx2x_vpd_find_tag(char *data, unsigned int start, - unsigned int len, u8 tagid) -{ - int i; - - for (i = start; i < len; ) { - u8 val = (u8)data[i]; - - if (val & BNX2X_VPD_LRDT) { - /* Don't return success of the tag isn't complete */ - if (i + BNX2X_VPD_LRDT_TAG_SIZE > len) - break; - - if (val == tagid) - return i; - - i += BNX2X_VPD_LRDT_TAG_SIZE + - bnx2x_vpd_lrdt_size(&data[i]); - } else { - u8 tag = val & ~BNX2X_VPD_SRDT_LEN_MASK; - - if (tag == tagid) - return i; - - if (tag == BNX2X_VPD_SRDT_SIN_END) - break; - - i += BNX2X_VPD_SRDT_TAG_SIZE + - bnx2x_vpd_srdt_size(&data[i]); - } - } - - return -1; -} - -static inline u8 bnx2x_vpd_info_field_size(u8 *info_field) -{ - return info_field[2]; -} - -static int __devinit bnx2x_vpd_rodata_find_if_keyword(u8 *rodata, - unsigned int start, - unsigned int rosize, - char *kw) -{ - int i; - - for (i = start; i + BNX2X_VPD_INFO_FLD_HDR_SIZE <= start + rosize;) { - if (rodata[i + 0] == kw[0] && - rodata[i + 1] == kw[1]) - return i; - - i += BNX2X_VPD_INFO_FLD_HDR_SIZE + - bnx2x_vpd_info_field_size(&rodata[i]); - } - - return -1; -} - static void __devinit bnx2x_read_fwinfo(struct bnx2x *bp) { int cnt, i, block_end, rodi; - char vpd_data[BNX2X_VPD_LEN+1]; + char vpd_start[BNX2X_VPD_LEN+1]; char str_id_reg[VENDOR_ID_LEN+1]; char str_id_cap[VENDOR_ID_LEN+1]; + char *vpd_data; + char *vpd_extended_data = NULL; u8 len; - cnt = pci_read_vpd(bp->pdev, 0, BNX2X_VPD_LEN, vpd_data); + cnt = pci_read_vpd(bp->pdev, 0, BNX2X_VPD_LEN, vpd_start); memset(bp->fw_ver, 0, sizeof(bp->fw_ver)); if (cnt < BNX2X_VPD_LEN) goto out_not_found; - i = bnx2x_vpd_find_tag(vpd_data, 0, BNX2X_VPD_LEN, - BNX2X_VPD_LRDT_RO_DATA); + /* VPD RO tag should be first tag after identifier string, hence + * we should be able to find it in first BNX2X_VPD_LEN chars + */ + i = pci_vpd_find_tag(vpd_start, 0, BNX2X_VPD_LEN, + PCI_VPD_LRDT_RO_DATA); if (i < 0) goto out_not_found; + block_end = i + PCI_VPD_LRDT_TAG_SIZE + + pci_vpd_lrdt_size(&vpd_start[i]); - block_end = i + BNX2X_VPD_LRDT_TAG_SIZE + - bnx2x_vpd_lrdt_size(&vpd_data[i]); + i += PCI_VPD_LRDT_TAG_SIZE; - i += BNX2X_VPD_LRDT_TAG_SIZE; + if (block_end > BNX2X_VPD_LEN) { + vpd_extended_data = kmalloc(block_end, GFP_KERNEL); + if (vpd_extended_data == NULL) + goto out_not_found; - if (block_end > BNX2X_VPD_LEN) - goto out_not_found; + /* read rest of vpd image into vpd_extended_data */ + memcpy(vpd_extended_data, vpd_start, BNX2X_VPD_LEN); + cnt = pci_read_vpd(bp->pdev, BNX2X_VPD_LEN, + block_end - BNX2X_VPD_LEN, + vpd_extended_data + BNX2X_VPD_LEN); + if (cnt < (block_end - BNX2X_VPD_LEN)) + goto out_not_found; + vpd_data = vpd_extended_data; + } else + vpd_data = vpd_start; - rodi = bnx2x_vpd_rodata_find_if_keyword(vpd_data, i, block_end, - BNX2X_VPD_RO_KEYWORD_MANUFACTURERNO); + /* now vpd_data holds full vpd content in both cases */ + + rodi = pci_vpd_find_info_keyword(vpd_data, i, block_end, + PCI_VPD_RO_KEYWORD_MFR_ID); if (rodi < 0) goto out_not_found; - len = bnx2x_vpd_info_field_size(&vpd_data[rodi]); + len = pci_vpd_info_field_size(&vpd_data[rodi]); if (len != VENDOR_ID_LEN) goto out_not_found; - rodi += BNX2X_VPD_INFO_FLD_HDR_SIZE; + rodi += PCI_VPD_INFO_FLD_HDR_SIZE; /* vendor specific info */ snprintf(str_id_reg, VENDOR_ID_LEN + 1, "%04x", PCI_VENDOR_ID_DELL); @@ -11280,33 +11873,83 @@ static void __devinit bnx2x_read_fwinfo(struct bnx2x *bp) if (!strncmp(str_id_reg, &vpd_data[rodi], VENDOR_ID_LEN) || !strncmp(str_id_cap, &vpd_data[rodi], VENDOR_ID_LEN)) { - rodi = bnx2x_vpd_rodata_find_if_keyword(vpd_data, i, block_end, - BNX2X_VPD_RO_KEYWORD_VENDOR0); + rodi = pci_vpd_find_info_keyword(vpd_data, i, block_end, + PCI_VPD_RO_KEYWORD_VENDOR0); if (rodi >= 0) { - len = bnx2x_vpd_info_field_size(&vpd_data[rodi]); + len = pci_vpd_info_field_size(&vpd_data[rodi]); - rodi += BNX2X_VPD_INFO_FLD_HDR_SIZE; + rodi += PCI_VPD_INFO_FLD_HDR_SIZE; if (len < 32 && (len + rodi) <= BNX2X_VPD_LEN) { memcpy(bp->fw_ver, &vpd_data[rodi], len); bp->fw_ver[len] = ' '; } } + kfree(vpd_extended_data); return; } out_not_found: + kfree(vpd_extended_data); return; } +static void __devinit bnx2x_set_modes_bitmap(struct bnx2x *bp) +{ + u32 flags = 0; + + if (CHIP_REV_IS_FPGA(bp)) + SET_FLAGS(flags, MODE_FPGA); + else if (CHIP_REV_IS_EMUL(bp)) + SET_FLAGS(flags, MODE_EMUL); + else + SET_FLAGS(flags, MODE_ASIC); + + if (CHIP_MODE_IS_4_PORT(bp)) + SET_FLAGS(flags, MODE_PORT4); + else + SET_FLAGS(flags, MODE_PORT2); + + if (CHIP_IS_E2(bp)) + SET_FLAGS(flags, MODE_E2); + else if (CHIP_IS_E3(bp)) { + SET_FLAGS(flags, MODE_E3); + if (CHIP_REV(bp) == CHIP_REV_Ax) + SET_FLAGS(flags, MODE_E3_A0); + else /*if (CHIP_REV(bp) == CHIP_REV_Bx)*/ + SET_FLAGS(flags, MODE_E3_B0 | MODE_COS3); + } + + if (IS_MF(bp)) { + SET_FLAGS(flags, MODE_MF); + switch (bp->mf_mode) { + case MULTI_FUNCTION_SD: + SET_FLAGS(flags, MODE_MF_SD); + break; + case MULTI_FUNCTION_SI: + SET_FLAGS(flags, MODE_MF_SI); + break; + case MULTI_FUNCTION_AFEX: + SET_FLAGS(flags, MODE_MF_AFEX); + break; + } + } else + SET_FLAGS(flags, MODE_SF); + +#if defined(__LITTLE_ENDIAN) + SET_FLAGS(flags, MODE_LITTLE_ENDIAN); +#else /*(__BIG_ENDIAN)*/ + SET_FLAGS(flags, MODE_BIG_ENDIAN); +#endif + INIT_MODE_FLAGS(bp) = flags; +} + static int __devinit bnx2x_init_bp(struct bnx2x *bp) { int func; - int timer_interval; int rc; - - /* Disable interrupt handling until HW is initialized */ - atomic_set(&bp->intr_sem, 1); - smp_wmb(); /* Ensure that bp->intr_sem update is SMP-safe */ +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + int timer_interval; +#endif mutex_init(&bp->port.phy_mutex); mutex_init(&bp->fw_mb_mutex); @@ -11314,7 +11957,6 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp) #ifdef BCM_CNIC mutex_init(&bp->cnic_mutex); #endif - #ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ spin_lock_init(&bp->netq_lock); #endif @@ -11322,121 +11964,144 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp) #if defined(INIT_DELAYED_WORK_DEFERRABLE) || defined(INIT_WORK_NAR) || (defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 40000)) /* BNX2X_UPSTREAM */ #if (LINUX_VERSION_CODE >= 0x020614) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ INIT_DELAYED_WORK(&bp->sp_task, bnx2x_sp_task); - INIT_DELAYED_WORK(&bp->reset_task, bnx2x_reset_task); + INIT_DELAYED_WORK(&bp->sp_rtnl_task, bnx2x_sp_rtnl_task); + INIT_DELAYED_WORK(&bp->period_task, bnx2x_period_task); #else INIT_WORK(&bp->sp_task, bnx2x_sp_task); - INIT_WORK(&bp->reset_task, bnx2x_reset_task); + INIT_WORK(&bp->sp_rtnl_task, bnx2x_sp_rtnl_task); + INIT_WORK(&bp->period_task, bnx2x_period_task); #endif #else INIT_WORK(&bp->sp_task, bnx2x_sp_task, bp); - INIT_WORK(&bp->reset_task, bnx2x_reset_task, bp); + INIT_WORK(&bp->sp_rtnl_task, bnx2x_sp_rtnl_task, bp); + INIT_WORK(&bp->period_task, bnx2x_period_task, bp); #endif rc = bnx2x_get_hwinfo(bp); + if (rc) + return rc; - if (!rc) - rc = bnx2x_alloc_mem_bp(bp); + bnx2x_set_modes_bitmap(bp); + + rc = bnx2x_alloc_mem_bp(bp); + if (rc) + return rc; bnx2x_read_fwinfo(bp); func = BP_FUNC(bp); /* need to reset chip if undi was active */ - if (!BP_NOMCP(bp)) - bnx2x_undi_unload(bp); + if (!BP_NOMCP(bp)) { + /* init fw_seq */ + bp->fw_seq = + SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) & + DRV_MSG_SEQ_NUMBER_MASK; + BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq); + + bnx2x_prev_unload(bp); + } + if (CHIP_REV_IS_FPGA(bp)) dev_err(&bp->pdev->dev, "FPGA detected\n"); if (BP_NOMCP(bp) && (func == 0)) - dev_err(&bp->pdev->dev, "MCP disabled, " - "must load devices in order!\n"); - - /* Set multi queue mode and priority mapping */ - if ((multi_mode != ETH_RSS_MODE_DISABLED) && - ((int_mode == INT_MODE_INTx) || (int_mode == INT_MODE_MSI))) { - dev_err(&bp->pdev->dev, "Multi disabled since int_mode " - "requested is not MSI-X\n"); - multi_mode = ETH_RSS_MODE_DISABLED; - } - bp->multi_mode = multi_mode; - -#ifdef BNX2X_SAFC /* ! BNX2X_UPSTREAM */ - bnx2x_init_safc(bp); -#endif + dev_err(&bp->pdev->dev, "MCP disabled, must load devices in order!\n"); #if (defined(BCM_CNIC) && defined(BNX2X_MULTI_QUEUE) && (LINUX_VERSION_CODE < 0x02061e) && !defined(__VMKLNX__)) /* ! BNX2X_UPSTREAM */ bp->dev->select_queue = bnx2x_select_queue; #endif -#ifdef NETIF_F_GRO /* BNX2X_UPSTREAM */ +#if defined(NETIF_F_GRO) && (LINUX_VERSION_CODE < 0x020627) /* ! BNX2X_UPSTREAM */ bp->dev->features |= NETIF_F_GRO; + +#endif + bp->disable_tpa = disable_tpa; + +#ifdef BCM_CNIC + bp->disable_tpa |= IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp); #endif /* Set TPA flags */ - if (disable_tpa) { - bp->flags &= ~TPA_ENABLE_FLAG; + if (bp->disable_tpa) { + bp->flags &= ~(TPA_ENABLE_FLAG | GRO_ENABLE_FLAG); +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + bp->dev->features &= CHIP_IS_E1x(bp) ? ~NETIF_F_IPV4_LRO : + ~(NETIF_F_IPV4_LRO | NETIF_F_IPV6_LRO); +#else #if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ bp->dev->features &= ~NETIF_F_LRO; +#endif #endif } else { - bp->flags |= TPA_ENABLE_FLAG; + bp->flags |= (TPA_ENABLE_FLAG | GRO_ENABLE_FLAG); +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + bp->dev->features |= CHIP_IS_E1x(bp) ? NETIF_F_IPV4_LRO : + (NETIF_F_IPV4_LRO | NETIF_F_IPV6_LRO); +#else #if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ bp->dev->features |= NETIF_F_LRO; +#endif #endif } +#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ + if (IS_MF_FCOE_AFEX(bp)) + bp->dev->features |= NETIF_F_HIDDEN_UPLINK; +#endif + if (CHIP_IS_E1(bp)) bp->dropless_fc = 0; else bp->dropless_fc = dropless_fc; bp->mrrs = mrrs; - #ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ /* MCP workaround */ if (BP_NOMCP(bp)) { /* [0x24c0]table size: PCI_REG_GRC_PTR(func)->pci_msix_control = 0x10; */ - if (!CHIP_IS_E2(bp)) { - REG_WR(bp, 0x24c0, 0x10); - /* [0x24c4]table pointer: - PCI_REG_GRC_PTR(func)->pci_msix_tbl_off_bir = - 0x440000 + 0x2000*func; */ + REG_WR(bp, 0x24c0, 0x10); + + if (CHIP_IS_E1x(bp)) { REG_WR(bp, 0x24c4, 0x440000 + 0x2000*func); /* [0x24c8]PBA pointer: PCI_REG_GRC_PTR(func)->pci_msix_pba_off_bir = 0x441800 + 0x2000*func; */ REG_WR(bp, 0x24c8, 0x441800 + 0x2000*func); - }else - REG_WR(bp, 0x24c0, 0x20); - + } } #endif - bp->tx_ring_size = MAX_TX_AVAIL; + bp->tx_ring_size = IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL; + #ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ if (bp->dev->mtu > ETH_MAX_PACKET_SIZE) bp->rx_ring_size = INIT_JUMBO_RX_RING_SIZE; else bp->rx_ring_size = INIT_RX_RING_SIZE; -#else - bp->rx_ring_size = MAX_RX_AVAIL; #endif - +#if (LINUX_VERSION_CODE < 0x020627) /* ! BNX2X_UPSTREAM */ bp->rx_csum = 1; +#endif /* make sure that the numbers are in the right granularity */ bp->tx_ticks = (50 / BNX2X_BTR) * BNX2X_BTR; bp->rx_ticks = (25 / BNX2X_BTR) * BNX2X_BTR; +#if (defined(BNX2X_UPSTREAM)) /* BNX2X_UPSTREAM */ + bp->current_interval = (CHIP_REV_IS_SLOW(bp) ? 5*HZ : HZ); +#else timer_interval = (CHIP_REV_IS_SLOW(bp) ? 5*HZ : HZ); bp->current_interval = (poll ? poll : timer_interval); +#endif init_timer(&bp->timer); bp->timer.expires = jiffies + bp->current_interval; bp->timer.data = (unsigned long) bp; bp->timer.function = bnx2x_timer; + bnx2x_dcbx_set_state(bp, true, BNX2X_DCBX_ENABLED_ON_NEG_ON); bnx2x_dcbx_init_params(bp); #ifdef BCM_CNIC @@ -11446,1916 +12111,21 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp) bp->cnic_base_cl_id = FP_SB_MAX_E2; #endif - return rc; -} - -/* - * ethtool service functions - */ - -/* All ethtool functions called with rtnl_lock */ - -/* Note: in the format strings below %s is replaced by the queue-name which is - * either its index or 'fcoe' for the fcoe queue. Make sure the format string - * lenght does not exceed ETH_GSTRING_LEN - MAX_QUEUE_NAME_LEN + 2 - */ -#define MAX_QUEUE_NAME_LEN 4 -static const struct { - long offset; - int size; - char string[ETH_GSTRING_LEN]; -} bnx2x_q_stats_arr[] = { -/* 1 */ { Q_STATS_OFFSET32(total_bytes_received_hi), 8, "[%s]: rx_bytes" }, - { Q_STATS_OFFSET32(total_unicast_packets_received_hi), - 8, "[%s]: rx_ucast_packets" }, - { Q_STATS_OFFSET32(total_multicast_packets_received_hi), - 8, "[%s]: rx_mcast_packets" }, - { Q_STATS_OFFSET32(total_broadcast_packets_received_hi), - 8, "[%s]: rx_bcast_packets" }, - { Q_STATS_OFFSET32(no_buff_discard_hi), 8, "[%s]: rx_discards" }, - { Q_STATS_OFFSET32(rx_err_discard_pkt), - 4, "[%s]: rx_phy_ip_err_discards"}, - { Q_STATS_OFFSET32(rx_skb_alloc_failed), - 4, "[%s]: rx_skb_alloc_discard" }, - { Q_STATS_OFFSET32(hw_csum_err), 4, "[%s]: rx_csum_offload_errors" }, - - { Q_STATS_OFFSET32(total_bytes_transmitted_hi), 8, "[%s]: tx_bytes" }, -/* 10 */{ Q_STATS_OFFSET32(total_unicast_packets_transmitted_hi), - 8, "[%s]: tx_ucast_packets" }, - { Q_STATS_OFFSET32(total_multicast_packets_transmitted_hi), - 8, "[%s]: tx_mcast_packets" }, - { Q_STATS_OFFSET32(total_broadcast_packets_transmitted_hi), - 8, "[%s]: tx_bcast_packets" } -}; -#define BNX2X_NUM_Q_STATS ARRAY_SIZE(bnx2x_q_stats_arr) - -static const struct { - long offset; - int size; - u32 flags; -#define STATS_FLAGS_PORT 1 -#define STATS_FLAGS_FUNC 2 -#define STATS_FLAGS_BOTH (STATS_FLAGS_FUNC | STATS_FLAGS_PORT) - char string[ETH_GSTRING_LEN]; -} bnx2x_stats_arr[] = { -/* 1 */ { STATS_OFFSET32(total_bytes_received_hi), - 8, STATS_FLAGS_BOTH, "rx_bytes" }, - { STATS_OFFSET32(error_bytes_received_hi), - 8, STATS_FLAGS_BOTH, "rx_error_bytes" }, - { STATS_OFFSET32(total_unicast_packets_received_hi), - 8, STATS_FLAGS_BOTH, "rx_ucast_packets" }, - { STATS_OFFSET32(total_multicast_packets_received_hi), - 8, STATS_FLAGS_BOTH, "rx_mcast_packets" }, - { STATS_OFFSET32(total_broadcast_packets_received_hi), - 8, STATS_FLAGS_BOTH, "rx_bcast_packets" }, - { STATS_OFFSET32(rx_stat_dot3statsfcserrors_hi), - 8, STATS_FLAGS_PORT, "rx_crc_errors" }, - { STATS_OFFSET32(rx_stat_dot3statsalignmenterrors_hi), - 8, STATS_FLAGS_PORT, "rx_align_errors" }, - { STATS_OFFSET32(rx_stat_etherstatsundersizepkts_hi), - 8, STATS_FLAGS_PORT, "rx_undersize_packets" }, - { STATS_OFFSET32(etherstatsoverrsizepkts_hi), - 8, STATS_FLAGS_PORT, "rx_oversize_packets" }, -/* 10 */{ STATS_OFFSET32(rx_stat_etherstatsfragments_hi), - 8, STATS_FLAGS_PORT, "rx_fragments" }, - { STATS_OFFSET32(rx_stat_etherstatsjabbers_hi), - 8, STATS_FLAGS_PORT, "rx_jabbers" }, - { STATS_OFFSET32(no_buff_discard_hi), - 8, STATS_FLAGS_BOTH, "rx_discards" }, - { STATS_OFFSET32(mac_filter_discard), - 4, STATS_FLAGS_PORT, "rx_filtered_packets" }, - { STATS_OFFSET32(outer_vlan_discard), - 4, STATS_FLAGS_PORT, "rx_outer_vlan_discard" }, - { STATS_OFFSET32(brb_drop_hi), - 8, STATS_FLAGS_PORT, "rx_brb_discard" }, - { STATS_OFFSET32(brb_truncate_hi), - 8, STATS_FLAGS_PORT, "rx_brb_truncate" }, - { STATS_OFFSET32(pause_frames_received_hi), - 8, STATS_FLAGS_PORT, "rx_pause_frames" }, - { STATS_OFFSET32(rx_stat_maccontrolframesreceived_hi), - 8, STATS_FLAGS_PORT, "rx_mac_ctrl_frames" }, - { STATS_OFFSET32(nig_timer_max), - 4, STATS_FLAGS_PORT, "rx_constant_pause_events" }, -/* 20 */{ STATS_OFFSET32(rx_err_discard_pkt), - 4, STATS_FLAGS_BOTH, "rx_phy_ip_err_discards"}, - { STATS_OFFSET32(rx_skb_alloc_failed), - 4, STATS_FLAGS_BOTH, "rx_skb_alloc_discard" }, - { STATS_OFFSET32(hw_csum_err), - 4, STATS_FLAGS_BOTH, "rx_csum_offload_errors" }, - - { STATS_OFFSET32(total_bytes_transmitted_hi), - 8, STATS_FLAGS_BOTH, "tx_bytes" }, - { STATS_OFFSET32(tx_stat_ifhcoutbadoctets_hi), - 8, STATS_FLAGS_PORT, "tx_error_bytes" }, - { STATS_OFFSET32(total_unicast_packets_transmitted_hi), - 8, STATS_FLAGS_BOTH, "tx_ucast_packets" }, - { STATS_OFFSET32(total_multicast_packets_transmitted_hi), - 8, STATS_FLAGS_BOTH, "tx_mcast_packets" }, - { STATS_OFFSET32(total_broadcast_packets_transmitted_hi), - 8, STATS_FLAGS_BOTH, "tx_bcast_packets" }, - { STATS_OFFSET32(tx_stat_dot3statsinternalmactransmiterrors_hi), - 8, STATS_FLAGS_PORT, "tx_mac_errors" }, - { STATS_OFFSET32(rx_stat_dot3statscarriersenseerrors_hi), - 8, STATS_FLAGS_PORT, "tx_carrier_errors" }, -/* 30 */{ STATS_OFFSET32(tx_stat_dot3statssinglecollisionframes_hi), - 8, STATS_FLAGS_PORT, "tx_single_collisions" }, - { STATS_OFFSET32(tx_stat_dot3statsmultiplecollisionframes_hi), - 8, STATS_FLAGS_PORT, "tx_multi_collisions" }, - { STATS_OFFSET32(tx_stat_dot3statsdeferredtransmissions_hi), - 8, STATS_FLAGS_PORT, "tx_deferred" }, - { STATS_OFFSET32(tx_stat_dot3statsexcessivecollisions_hi), - 8, STATS_FLAGS_PORT, "tx_excess_collisions" }, - { STATS_OFFSET32(tx_stat_dot3statslatecollisions_hi), - 8, STATS_FLAGS_PORT, "tx_late_collisions" }, - { STATS_OFFSET32(tx_stat_etherstatscollisions_hi), - 8, STATS_FLAGS_PORT, "tx_total_collisions" }, - { STATS_OFFSET32(tx_stat_etherstatspkts64octets_hi), - 8, STATS_FLAGS_PORT, "tx_64_byte_packets" }, - { STATS_OFFSET32(tx_stat_etherstatspkts65octetsto127octets_hi), - 8, STATS_FLAGS_PORT, "tx_65_to_127_byte_packets" }, - { STATS_OFFSET32(tx_stat_etherstatspkts128octetsto255octets_hi), - 8, STATS_FLAGS_PORT, "tx_128_to_255_byte_packets" }, - { STATS_OFFSET32(tx_stat_etherstatspkts256octetsto511octets_hi), - 8, STATS_FLAGS_PORT, "tx_256_to_511_byte_packets" }, -/* 40 */{ STATS_OFFSET32(tx_stat_etherstatspkts512octetsto1023octets_hi), - 8, STATS_FLAGS_PORT, "tx_512_to_1023_byte_packets" }, - { STATS_OFFSET32(etherstatspkts1024octetsto1522octets_hi), - 8, STATS_FLAGS_PORT, "tx_1024_to_1522_byte_packets" }, - { STATS_OFFSET32(etherstatspktsover1522octets_hi), - 8, STATS_FLAGS_PORT, "tx_1523_to_9022_byte_packets" }, - { STATS_OFFSET32(pause_frames_sent_hi), - 8, STATS_FLAGS_PORT, "tx_pause_frames" } -}; -#define BNX2X_NUM_STATS ARRAY_SIZE(bnx2x_stats_arr) - -static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct bnx2x *bp = netdev_priv(dev); - u32 advertising, cfg_idx, old_multi_phy_config, new_multi_phy_config; - - if (IS_MF(bp)) - return 0; - - DP(NETIF_MSG_LINK, "ethtool_cmd: cmd %d\n" - DP_LEVEL " supported 0x%x advertising 0x%x speed %d\n" - DP_LEVEL " duplex %d port %d phy_address %d transceiver %d\n" - DP_LEVEL " autoneg %d maxtxpkt %d maxrxpkt %d\n", - cmd->cmd, cmd->supported, cmd->advertising, cmd->speed, - cmd->duplex, cmd->port, cmd->phy_address, cmd->transceiver, - cmd->autoneg, cmd->maxtxpkt, cmd->maxrxpkt); - - cfg_idx = bnx2x_get_link_cfg_idx(bp); - old_multi_phy_config = bp->link_params.multi_phy_config; - switch (cmd->port) { - case PORT_TP: - if (bp->port.supported[cfg_idx] & SUPPORTED_TP) - break; /* no port change */ - - if (!(bp->port.supported[0] & SUPPORTED_TP || - bp->port.supported[1] & SUPPORTED_TP)) { - DP(NETIF_MSG_LINK, "Unsupported port type\n"); - return -EINVAL; - } - bp->link_params.multi_phy_config &= - ~PORT_HW_CFG_PHY_SELECTION_MASK; - if (bp->link_params.multi_phy_config & - PORT_HW_CFG_PHY_SWAPPED_ENABLED) - bp->link_params.multi_phy_config |= - PORT_HW_CFG_PHY_SELECTION_SECOND_PHY; - else - bp->link_params.multi_phy_config |= - PORT_HW_CFG_PHY_SELECTION_FIRST_PHY; - break; - case PORT_FIBRE: - if (bp->port.supported[cfg_idx] & SUPPORTED_FIBRE) - break; /* no port change */ - - if (!(bp->port.supported[0] & SUPPORTED_FIBRE || - bp->port.supported[1] & SUPPORTED_FIBRE)) { - DP(NETIF_MSG_LINK, "Unsupported port type\n"); - return -EINVAL; - } - bp->link_params.multi_phy_config &= - ~PORT_HW_CFG_PHY_SELECTION_MASK; - if (bp->link_params.multi_phy_config & - PORT_HW_CFG_PHY_SWAPPED_ENABLED) - bp->link_params.multi_phy_config |= - PORT_HW_CFG_PHY_SELECTION_FIRST_PHY; - else - bp->link_params.multi_phy_config |= - PORT_HW_CFG_PHY_SELECTION_SECOND_PHY; - break; - default: - DP(NETIF_MSG_LINK, "Unsupported port type\n"); - return -EINVAL; - } - /* Save new config in case command complete successuly */ - new_multi_phy_config = bp->link_params.multi_phy_config; - /* Get the new cfg_idx */ - cfg_idx = bnx2x_get_link_cfg_idx(bp); - /* Restore old config in case command failed */ - bp->link_params.multi_phy_config = old_multi_phy_config; - DP(NETIF_MSG_LINK, "cfg_idx = %x\n", cfg_idx); - - if (cmd->autoneg == AUTONEG_ENABLE) { - if (!(bp->port.supported[cfg_idx] & SUPPORTED_Autoneg)) { - DP(NETIF_MSG_LINK, "Autoneg not supported\n"); - return -EINVAL; - } - - /* advertise the requested speed and duplex if supported */ - cmd->advertising &= bp->port.supported[cfg_idx]; - - bp->link_params.req_line_speed[cfg_idx] = SPEED_AUTO_NEG; - bp->link_params.req_duplex[cfg_idx] = DUPLEX_FULL; - bp->port.advertising[cfg_idx] |= (ADVERTISED_Autoneg | - cmd->advertising); - - } else { /* forced speed */ - /* advertise the requested speed and duplex if supported */ - u32 speed = cmd->speed; -#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ - speed |= (cmd->speed_hi << 16); -#endif - switch (speed) { - case SPEED_10: - if (cmd->duplex == DUPLEX_FULL) { - if (!(bp->port.supported[cfg_idx] & - SUPPORTED_10baseT_Full)) { - DP(NETIF_MSG_LINK, - "10M full not supported\n"); - return -EINVAL; - } - - advertising = (ADVERTISED_10baseT_Full | - ADVERTISED_TP); - } else { - if (!(bp->port.supported[cfg_idx] & - SUPPORTED_10baseT_Half)) { - DP(NETIF_MSG_LINK, - "10M half not supported\n"); - return -EINVAL; - } - - advertising = (ADVERTISED_10baseT_Half | - ADVERTISED_TP); - } - break; - - case SPEED_100: - if (cmd->duplex == DUPLEX_FULL) { - if (!(bp->port.supported[cfg_idx] & - SUPPORTED_100baseT_Full)) { - DP(NETIF_MSG_LINK, - "100M full not supported\n"); - return -EINVAL; - } - - advertising = (ADVERTISED_100baseT_Full | - ADVERTISED_TP); - } else { - if (!(bp->port.supported[cfg_idx] & - SUPPORTED_100baseT_Half)) { - DP(NETIF_MSG_LINK, - "100M half not supported\n"); - return -EINVAL; - } - - advertising = (ADVERTISED_100baseT_Half | - ADVERTISED_TP); - } - break; - - case SPEED_1000: - if (cmd->duplex != DUPLEX_FULL) { - DP(NETIF_MSG_LINK, "1G half not supported\n"); - return -EINVAL; - } - - if (!(bp->port.supported[cfg_idx] & - SUPPORTED_1000baseT_Full)) { - DP(NETIF_MSG_LINK, "1G full not supported\n"); - return -EINVAL; - } - - advertising = (ADVERTISED_1000baseT_Full | - ADVERTISED_TP); - break; - - case SPEED_2500: - if (cmd->duplex != DUPLEX_FULL) { - DP(NETIF_MSG_LINK, - "2.5G half not supported\n"); - return -EINVAL; - } - - if (!(bp->port.supported[cfg_idx] - & SUPPORTED_2500baseX_Full)) { - DP(NETIF_MSG_LINK, - "2.5G full not supported\n"); - return -EINVAL; - } - - advertising = (ADVERTISED_2500baseX_Full | - ADVERTISED_TP); - break; - - case SPEED_10000: - if (cmd->duplex != DUPLEX_FULL) { - DP(NETIF_MSG_LINK, "10G half not supported\n"); - return -EINVAL; - } - - if (!(bp->port.supported[cfg_idx] - & SUPPORTED_10000baseT_Full)) { - DP(NETIF_MSG_LINK, "10G full not supported\n"); - return -EINVAL; - } - - advertising = (ADVERTISED_10000baseT_Full | - ADVERTISED_FIBRE); - break; - - default: - DP(NETIF_MSG_LINK, "Unsupported speed %d\n", speed); - return -EINVAL; - } - - bp->link_params.req_line_speed[cfg_idx] = speed; - bp->link_params.req_duplex[cfg_idx] = cmd->duplex; - bp->port.advertising[cfg_idx] = advertising; - } - - DP(NETIF_MSG_LINK, "req_line_speed %d\n" - DP_LEVEL " req_duplex %d advertising 0x%x\n", - bp->link_params.req_line_speed[cfg_idx], - bp->link_params.req_duplex[cfg_idx], - bp->port.advertising[cfg_idx]); - - /* Set new config */ - bp->link_params.multi_phy_config = new_multi_phy_config; - if (netif_running(dev)) { - bnx2x_stats_handle(bp, STATS_EVENT_STOP); - bnx2x_link_set(bp); - } - - return 0; -} - -#define IS_E1_ONLINE(info) (((info) & RI_E1_ONLINE) == RI_E1_ONLINE) -#define IS_E1H_ONLINE(info) (((info) & RI_E1H_ONLINE) == RI_E1H_ONLINE) -#define IS_E2_ONLINE(info) (((info) & RI_E2_ONLINE) == RI_E2_ONLINE) - -static int bnx2x_get_regs_len(struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - int regdump_len = 0; - int i; - - if (CHIP_IS_E1(bp)) { - for (i = 0; i < REGS_COUNT; i++) - if (IS_E1_ONLINE(reg_addrs[i].info)) - regdump_len += reg_addrs[i].size; - - for (i = 0; i < WREGS_COUNT_E1; i++) - if (IS_E1_ONLINE(wreg_addrs_e1[i].info)) - regdump_len += wreg_addrs_e1[i].size * - (1 + wreg_addrs_e1[i].read_regs_count); - - } else if (CHIP_IS_E1H(bp)) { - for (i = 0; i < REGS_COUNT; i++) - if (IS_E1H_ONLINE(reg_addrs[i].info)) - regdump_len += reg_addrs[i].size; - - for (i = 0; i < WREGS_COUNT_E1H; i++) - if (IS_E1H_ONLINE(wreg_addrs_e1h[i].info)) - regdump_len += wreg_addrs_e1h[i].size * - (1 + wreg_addrs_e1h[i].read_regs_count); - } else if (CHIP_IS_E2(bp)) { - for (i = 0; i < REGS_COUNT; i++) - if (IS_E2_ONLINE(reg_addrs[i].info)) - regdump_len += reg_addrs[i].size; - - for (i = 0; i < WREGS_COUNT_E2; i++) - if (IS_E2_ONLINE(wreg_addrs_e2[i].info)) - regdump_len += wreg_addrs_e2[i].size * - (1 + wreg_addrs_e2[i].read_regs_count); - } - regdump_len *= 4; - regdump_len += sizeof(struct dump_hdr); - - return regdump_len; -} - -static inline void bnx2x_read_pages_regs_e2(struct bnx2x *bp, u32 *p) -{ - u32 i, j, k, n; - - for (i = 0; i < PAGE_MODE_VALUES_E2; i++) { - for (j = 0; j < PAGE_WRITE_REGS_E2; j++) { - REG_WR(bp, page_write_regs_e2[j], page_vals_e2[i]); - for (k = 0; k < PAGE_READ_REGS_E2; k++) - if (IS_E2_ONLINE(page_read_regs_e2[k].info)) - for (n = 0; n < - page_read_regs_e2[k].size; n++) - *p++ = REG_RD(bp, - page_read_regs_e2[k].addr + n*4); - } - } -} - -static void bnx2x_get_regs(struct net_device *dev, - struct ethtool_regs *regs, void *_p) -{ - u32 *p = _p, i, j; - struct bnx2x *bp = netdev_priv(dev); - struct dump_hdr dump_hdr = {0}; - - regs->version = 0; - memset(p, 0, regs->len); - - if (!netif_running(bp->dev)) - return; - - dump_hdr.hdr_size = (sizeof(struct dump_hdr) / 4) - 1; - dump_hdr.dump_sign = dump_sign_all; - dump_hdr.xstorm_waitp = REG_RD(bp, XSTORM_WAITP_ADDR); - dump_hdr.tstorm_waitp = REG_RD(bp, TSTORM_WAITP_ADDR); - dump_hdr.ustorm_waitp = REG_RD(bp, USTORM_WAITP_ADDR); - dump_hdr.cstorm_waitp = REG_RD(bp, CSTORM_WAITP_ADDR); - - if (CHIP_IS_E1(bp)) - dump_hdr.info = RI_E1_ONLINE; - else if (CHIP_IS_E1H(bp)) - dump_hdr.info = RI_E1H_ONLINE; - else if (CHIP_IS_E2(bp)) - dump_hdr.info = RI_E2_ONLINE | - (BP_PATH(bp) ? RI_PATH1_DUMP : RI_PATH0_DUMP); - - memcpy(p, &dump_hdr, sizeof(struct dump_hdr)); - p += dump_hdr.hdr_size + 1; - - if (CHIP_IS_E1(bp)) { - for (i = 0; i < REGS_COUNT; i++) - if (IS_E1_ONLINE(reg_addrs[i].info)) - for (j = 0; j < reg_addrs[i].size; j++) - *p++ = REG_RD(bp, - reg_addrs[i].addr + j*4); - - } else if (CHIP_IS_E1H(bp)) { - for (i = 0; i < REGS_COUNT; i++) - if (IS_E1H_ONLINE(reg_addrs[i].info)) - for (j = 0; j < reg_addrs[i].size; j++) - *p++ = REG_RD(bp, - reg_addrs[i].addr + j*4); - - } else if (CHIP_IS_E2(bp)) { - for (i = 0; i < REGS_COUNT; i++) - if (IS_E2_ONLINE(reg_addrs[i].info)) - for (j = 0; j < reg_addrs[i].size; j++) - *p++ = REG_RD(bp, - reg_addrs[i].addr + j*4); - - bnx2x_read_pages_regs_e2(bp, p); - } -} - -static void bnx2x_get_drvinfo(struct net_device *dev, - struct ethtool_drvinfo *info) -{ - struct bnx2x *bp = netdev_priv(dev); - u8 phy_fw_ver[PHY_FW_VER_LEN]; - - strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); - strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); - - phy_fw_ver[0] = '\0'; - if (bp->port.pmf) { - bnx2x_acquire_phy_lock(bp); - bnx2x_get_ext_phy_fw_version(&bp->link_params, - (bp->state != BNX2X_STATE_CLOSED), - phy_fw_ver, PHY_FW_VER_LEN); - bnx2x_release_phy_lock(bp); - } - - strlcpy(info->fw_version, bp->fw_ver, sizeof(info->fw_version)); - snprintf(info->fw_version + strlen(bp->fw_ver), 32 - strlen(bp->fw_ver), - "bc %d.%d.%d%s%s", - (bp->common.bc_ver & 0xff0000) >> 16, - (bp->common.bc_ver & 0xff00) >> 8, - (bp->common.bc_ver & 0xff), - ((phy_fw_ver[0] != '\0') ? " phy " : ""), phy_fw_ver); - strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); - info->n_stats = BNX2X_NUM_STATS; - info->testinfo_len = BNX2X_NUM_TESTS; - info->eedump_len = bp->common.flash_size; - info->regdump_len = bnx2x_get_regs_len(dev); -} - -static void bnx2x_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) -{ - struct bnx2x *bp = netdev_priv(dev); - - if (bp->flags & NO_WOL_FLAG) { - wol->supported = 0; - wol->wolopts = 0; - } else { - wol->supported = WAKE_MAGIC; - if (bp->wol) - wol->wolopts = WAKE_MAGIC; - else - wol->wolopts = 0; - } - memset(&wol->sopass, 0, sizeof(wol->sopass)); -} - -static int bnx2x_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) -{ - struct bnx2x *bp = netdev_priv(dev); - - if (wol->wolopts & ~WAKE_MAGIC) - return -EINVAL; - - if (wol->wolopts & WAKE_MAGIC) { - if (bp->flags & NO_WOL_FLAG) - return -EINVAL; - - bp->wol = 1; - } else - bp->wol = 0; - - return 0; -} - -static int bnx2x_nway_reset(struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - - if (!bp->port.pmf) - return 0; - - if (netif_running(dev)) { - bnx2x_stats_handle(bp, STATS_EVENT_STOP); - bnx2x_link_set(bp); - } - - return 0; -} - -static u32 bnx2x_get_link(struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - - if (bp->flags & MF_FUNC_DIS || (bp->state != BNX2X_STATE_OPEN)) - return 0; - - return bp->link_vars.link_up; -} - -#if (LINUX_VERSION_CODE >= 0x020418) /* BNX2X_UPSTREAM */ -static int bnx2x_get_eeprom_len(struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - - return bp->common.flash_size; -} -#endif - -static int bnx2x_acquire_nvram_lock(struct bnx2x *bp) -{ - int /*abs*/port = BP_PORT(bp); - int count, i; - u32 val = 0; - - /* adjust timeout for emulation/FPGA */ - count = BNX2X_NVRAM_TIMEOUT_COUNT; - if (CHIP_REV_IS_SLOW(bp)) - count *= 100; - - /* request access to nvram interface */ - REG_WR(bp, MCP_REG_MCPR_NVM_SW_ARB, - (MCPR_NVM_SW_ARB_ARB_REQ_SET1 << port)); - - for (i = 0; i < count*10; i++) { - val = REG_RD(bp, MCP_REG_MCPR_NVM_SW_ARB); - if (val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port)) - break; - - udelay(5); - } - - if (!(val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port))) { - DP(BNX2X_MSG_NVM, "cannot get access to nvram interface\n"); - return -EBUSY; - } - - return 0; -} - -static int bnx2x_release_nvram_lock(struct bnx2x *bp) -{ - int /*abs*/port = BP_PORT(bp); - int count, i; - u32 val = 0; - - /* adjust timeout for emulation/FPGA */ - count = BNX2X_NVRAM_TIMEOUT_COUNT; - if (CHIP_REV_IS_SLOW(bp)) - count *= 100; - - /* relinquish nvram interface */ - REG_WR(bp, MCP_REG_MCPR_NVM_SW_ARB, - (MCPR_NVM_SW_ARB_ARB_REQ_CLR1 << port)); - - for (i = 0; i < count*10; i++) { - val = REG_RD(bp, MCP_REG_MCPR_NVM_SW_ARB); - if (!(val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port))) - break; - - udelay(5); - } - - if (val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port)) { - DP(BNX2X_MSG_NVM, "cannot free access to nvram interface\n"); - return -EBUSY; - } - - return 0; -} - -static void bnx2x_enable_nvram_access(struct bnx2x *bp) -{ - u32 val; - - val = REG_RD(bp, MCP_REG_MCPR_NVM_ACCESS_ENABLE); - - /* enable both bits, even on read */ - REG_WR(bp, MCP_REG_MCPR_NVM_ACCESS_ENABLE, - (val | MCPR_NVM_ACCESS_ENABLE_EN | - MCPR_NVM_ACCESS_ENABLE_WR_EN)); -} - -static void bnx2x_disable_nvram_access(struct bnx2x *bp) -{ - u32 val; - - val = REG_RD(bp, MCP_REG_MCPR_NVM_ACCESS_ENABLE); - - /* disable both bits, even after read */ - REG_WR(bp, MCP_REG_MCPR_NVM_ACCESS_ENABLE, - (val & ~(MCPR_NVM_ACCESS_ENABLE_EN | - MCPR_NVM_ACCESS_ENABLE_WR_EN))); -} - -static int bnx2x_nvram_read_dword(struct bnx2x *bp, u32 offset, __be32 *ret_val, - u32 cmd_flags) -{ - int count, i, rc; - u32 val; - - /* build the command word */ - cmd_flags |= MCPR_NVM_COMMAND_DOIT; - - /* need to clear DONE bit separately */ - REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, MCPR_NVM_COMMAND_DONE); - - /* address of the NVRAM to read from */ - REG_WR(bp, MCP_REG_MCPR_NVM_ADDR, - (offset & MCPR_NVM_ADDR_NVM_ADDR_VALUE)); - - /* issue a read command */ - REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); - - /* adjust timeout for emulation/FPGA */ - count = BNX2X_NVRAM_TIMEOUT_COUNT; - if (CHIP_REV_IS_SLOW(bp)) - count *= 100; - - /* wait for completion */ - *ret_val = 0; - rc = -EBUSY; - for (i = 0; i < count; i++) { - udelay(5); - val = REG_RD(bp, MCP_REG_MCPR_NVM_COMMAND); - - if (val & MCPR_NVM_COMMAND_DONE) { - val = REG_RD(bp, MCP_REG_MCPR_NVM_READ); - /* we read nvram data in cpu order - * but ethtool sees it as an array of bytes - * converting to big-endian will do the work */ - *ret_val = cpu_to_be32(val); - rc = 0; - break; - } - } - - return rc; -} - -static int bnx2x_nvram_read(struct bnx2x *bp, u32 offset, u8 *ret_buf, - int buf_size) -{ - int rc; - u32 cmd_flags; - __be32 val; - - if ((offset & 0x03) || (buf_size & 0x03) || (buf_size == 0)) { - DP(BNX2X_MSG_NVM, - "Invalid parameter: offset 0x%x buf_size 0x%x\n", - offset, buf_size); - return -EINVAL; - } - - if (offset + buf_size > bp->common.flash_size) { - DP(BNX2X_MSG_NVM, "Invalid parameter: offset (0x%x) +" - " buf_size (0x%x) > flash_size (0x%x)\n", - offset, buf_size, bp->common.flash_size); - return -EINVAL; - } - - /* request access to nvram interface */ - rc = bnx2x_acquire_nvram_lock(bp); - if (rc) - return rc; - - /* enable access to nvram interface */ - bnx2x_enable_nvram_access(bp); - - /* read the first word(s) */ - cmd_flags = MCPR_NVM_COMMAND_FIRST; - while ((buf_size > sizeof(u32)) && (rc == 0)) { - rc = bnx2x_nvram_read_dword(bp, offset, &val, cmd_flags); - memcpy(ret_buf, &val, 4); - - /* advance to the next dword */ - offset += sizeof(u32); - ret_buf += sizeof(u32); - buf_size -= sizeof(u32); - cmd_flags = 0; - } - - if (rc == 0) { - cmd_flags |= MCPR_NVM_COMMAND_LAST; - rc = bnx2x_nvram_read_dword(bp, offset, &val, cmd_flags); - memcpy(ret_buf, &val, 4); - } - - /* disable access to nvram interface */ - bnx2x_disable_nvram_access(bp); - bnx2x_release_nvram_lock(bp); - - return rc; -} - -static int bnx2x_get_eeprom(struct net_device *dev, - struct ethtool_eeprom *eeprom, u8 *eebuf) -{ - struct bnx2x *bp = netdev_priv(dev); - int rc; - - if (!netif_running(dev)) - return -EAGAIN; - - DP(BNX2X_MSG_NVM, "ethtool_eeprom: cmd %d\n" - DP_LEVEL " magic 0x%x offset 0x%x (%d) len 0x%x (%d)\n", - eeprom->cmd, eeprom->magic, eeprom->offset, eeprom->offset, - eeprom->len, eeprom->len); - - /* parameters already validated in ethtool_get_eeprom */ - - rc = bnx2x_nvram_read(bp, eeprom->offset, eebuf, eeprom->len); - - return rc; -} - -static int bnx2x_nvram_write_dword(struct bnx2x *bp, u32 offset, u32 val, - u32 cmd_flags) -{ - int count, i, rc; - - /* build the command word */ - cmd_flags |= MCPR_NVM_COMMAND_DOIT | MCPR_NVM_COMMAND_WR; - - /* need to clear DONE bit separately */ - REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, MCPR_NVM_COMMAND_DONE); - - /* write the data */ - REG_WR(bp, MCP_REG_MCPR_NVM_WRITE, val); - - /* address of the NVRAM to write to */ - REG_WR(bp, MCP_REG_MCPR_NVM_ADDR, - (offset & MCPR_NVM_ADDR_NVM_ADDR_VALUE)); - - /* issue the write command */ - REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); - - /* adjust timeout for emulation/FPGA */ - count = BNX2X_NVRAM_TIMEOUT_COUNT; - if (CHIP_REV_IS_SLOW(bp)) - count *= 100; - - /* wait for completion */ - rc = -EBUSY; - for (i = 0; i < count; i++) { - udelay(5); - val = REG_RD(bp, MCP_REG_MCPR_NVM_COMMAND); - if (val & MCPR_NVM_COMMAND_DONE) { - rc = 0; - break; - } - } - - return rc; -} - -#define BYTE_OFFSET(offset) (8 * (offset & 0x03)) - -static int bnx2x_nvram_write1(struct bnx2x *bp, u32 offset, u8 *data_buf, - int buf_size) -{ - int rc; - u32 cmd_flags; - u32 align_offset; - __be32 val; - - if (offset + buf_size > bp->common.flash_size) { - DP(BNX2X_MSG_NVM, "Invalid parameter: offset (0x%x) +" - " buf_size (0x%x) > flash_size (0x%x)\n", - offset, buf_size, bp->common.flash_size); - return -EINVAL; - } - - /* request access to nvram interface */ - rc = bnx2x_acquire_nvram_lock(bp); - if (rc) - return rc; - - /* enable access to nvram interface */ - bnx2x_enable_nvram_access(bp); - - cmd_flags = (MCPR_NVM_COMMAND_FIRST | MCPR_NVM_COMMAND_LAST); - align_offset = (offset & ~0x03); - rc = bnx2x_nvram_read_dword(bp, align_offset, &val, cmd_flags); - - if (rc == 0) { - val &= ~(0xff << BYTE_OFFSET(offset)); - val |= (*data_buf << BYTE_OFFSET(offset)); - - /* nvram data is returned as an array of bytes - * convert it back to cpu order */ - val = be32_to_cpu(val); - - rc = bnx2x_nvram_write_dword(bp, align_offset, val, - cmd_flags); - } - - /* disable access to nvram interface */ - bnx2x_disable_nvram_access(bp); - bnx2x_release_nvram_lock(bp); - - return rc; -} - -static int bnx2x_nvram_write(struct bnx2x *bp, u32 offset, u8 *data_buf, - int buf_size) -{ - int rc; - u32 cmd_flags; - u32 val; - u32 written_so_far; - - if (buf_size == 1) /* ethtool */ - return bnx2x_nvram_write1(bp, offset, data_buf, buf_size); - - if ((offset & 0x03) || (buf_size & 0x03) || (buf_size == 0)) { - DP(BNX2X_MSG_NVM, - "Invalid parameter: offset 0x%x buf_size 0x%x\n", - offset, buf_size); - return -EINVAL; - } - - if (offset + buf_size > bp->common.flash_size) { - DP(BNX2X_MSG_NVM, "Invalid parameter: offset (0x%x) +" - " buf_size (0x%x) > flash_size (0x%x)\n", - offset, buf_size, bp->common.flash_size); - return -EINVAL; - } - - /* request access to nvram interface */ - rc = bnx2x_acquire_nvram_lock(bp); - if (rc) - return rc; - - /* enable access to nvram interface */ - bnx2x_enable_nvram_access(bp); - - written_so_far = 0; - cmd_flags = MCPR_NVM_COMMAND_FIRST; - while ((written_so_far < buf_size) && (rc == 0)) { - if (written_so_far == (buf_size - sizeof(u32))) - cmd_flags |= MCPR_NVM_COMMAND_LAST; - else if (((offset + 4) % BNX2X_NVRAM_PAGE_SIZE) == 0) - cmd_flags |= MCPR_NVM_COMMAND_LAST; - else if ((offset % BNX2X_NVRAM_PAGE_SIZE) == 0) - cmd_flags |= MCPR_NVM_COMMAND_FIRST; - - memcpy(&val, data_buf, 4); - - rc = bnx2x_nvram_write_dword(bp, offset, val, cmd_flags); - - /* advance to the next dword */ - offset += sizeof(u32); - data_buf += sizeof(u32); - written_so_far += sizeof(u32); - cmd_flags = 0; - } - - /* disable access to nvram interface */ - bnx2x_disable_nvram_access(bp); - bnx2x_release_nvram_lock(bp); - - return rc; -} - -static int bnx2x_set_eeprom(struct net_device *dev, - struct ethtool_eeprom *eeprom, u8 *eebuf) -{ - struct bnx2x *bp = netdev_priv(dev); - int port = BP_PORT(bp); - int rc = 0; - u32 ext_phy_config; - if (!netif_running(dev)) - return -EAGAIN; - - DP(BNX2X_MSG_NVM, "ethtool_eeprom: cmd %d\n" - DP_LEVEL " magic 0x%x offset 0x%x (%d) len 0x%x (%d)\n", - eeprom->cmd, eeprom->magic, eeprom->offset, eeprom->offset, - eeprom->len, eeprom->len); - - /* parameters already validated in ethtool_set_eeprom */ - - /* PHY eeprom can be accessed only by the PMF */ - if ((eeprom->magic >= 0x50485900) && (eeprom->magic <= 0x504859FF) && - !bp->port.pmf) - return -EINVAL; - - ext_phy_config = - SHMEM_RD(bp, - dev_info.port_hw_config[port].external_phy_config); - - if (eeprom->magic == 0x50485950) { - /* 'PHYP' (0x50485950): prepare phy for FW upgrade */ - bnx2x_stats_handle(bp, STATS_EVENT_STOP); - bnx2x_acquire_phy_lock(bp); - rc |= bnx2x_link_reset(&bp->link_params, - &bp->link_vars, 0); - if (XGXS_EXT_PHY_TYPE(ext_phy_config) == - PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101) - bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, - MISC_REGISTERS_GPIO_HIGH, port); - bnx2x_release_phy_lock(bp); - bnx2x_link_report(bp); - - } else if (eeprom->magic == 0x50485952) { - /* 'PHYR' (0x50485952): re-init link after FW upgrade */ - if (bp->state == BNX2X_STATE_OPEN) { - bnx2x_acquire_phy_lock(bp); - rc |= bnx2x_link_reset(&bp->link_params, - &bp->link_vars, 1); - - rc |= bnx2x_phy_init(&bp->link_params, - &bp->link_vars); - bnx2x_release_phy_lock(bp); - bnx2x_calc_fc_adv(bp); - } - } else if (eeprom->magic == 0x53985943) { - /* 'PHYC' (0x53985943): PHY FW upgrade completed */ - if (XGXS_EXT_PHY_TYPE(ext_phy_config) == - PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101) { - - /* DSP Remove Download Mode */ - bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, - MISC_REGISTERS_GPIO_LOW, port); - - bnx2x_acquire_phy_lock(bp); - - bnx2x_sfx7101_sp_sw_reset(bp, - &bp->link_params.phy[EXT_PHY1]); - - /* wait 0.5 sec to allow it to run */ - msleep(500); - bnx2x_ext_phy_hw_reset(bp, port); - msleep(500); - bnx2x_release_phy_lock(bp); - } - } else - rc = bnx2x_nvram_write(bp, eeprom->offset, eebuf, eeprom->len); - - return rc; -} - -static int bnx2x_set_coalesce(struct net_device *dev, - struct ethtool_coalesce *coal) -{ - struct bnx2x *bp = netdev_priv(dev); - - bp->rx_ticks = (u16)coal->rx_coalesce_usecs; - if (bp->rx_ticks > BNX2X_MAX_COALESCE_TOUT) - bp->rx_ticks = BNX2X_MAX_COALESCE_TOUT; - - bp->tx_ticks = (u16)coal->tx_coalesce_usecs; - if (bp->tx_ticks > BNX2X_MAX_COALESCE_TOUT) - bp->tx_ticks = BNX2X_MAX_COALESCE_TOUT; - - if (netif_running(dev)) - bnx2x_update_coalesce(bp); - - return 0; -} - -static int bnx2x_set_pauseparam(struct net_device *dev, - struct ethtool_pauseparam *epause) -{ - struct bnx2x *bp = netdev_priv(dev); - u32 cfg_idx = bnx2x_get_link_cfg_idx(bp); - if (IS_MF(bp)) - return 0; - - DP(NETIF_MSG_LINK, "ethtool_pauseparam: cmd %d\n" - DP_LEVEL " autoneg %d rx_pause %d tx_pause %d\n", - epause->cmd, epause->autoneg, epause->rx_pause, epause->tx_pause); - - bp->link_params.req_flow_ctrl[cfg_idx] = BNX2X_FLOW_CTRL_AUTO; - - if (epause->rx_pause) - bp->link_params.req_flow_ctrl[cfg_idx] |= BNX2X_FLOW_CTRL_RX; - - if (epause->tx_pause) - bp->link_params.req_flow_ctrl[cfg_idx] |= BNX2X_FLOW_CTRL_TX; - - if (bp->link_params.req_flow_ctrl[cfg_idx] == BNX2X_FLOW_CTRL_AUTO) - bp->link_params.req_flow_ctrl[cfg_idx] = BNX2X_FLOW_CTRL_NONE; - - if (epause->autoneg) { - if (!(bp->port.supported[cfg_idx] & SUPPORTED_Autoneg)) { - DP(NETIF_MSG_LINK, "autoneg not supported\n"); - return -EINVAL; - } - - if (bp->link_params.req_line_speed[cfg_idx] == SPEED_AUTO_NEG) { - bp->link_params.req_flow_ctrl[cfg_idx] = - BNX2X_FLOW_CTRL_AUTO; - } - } - - DP(NETIF_MSG_LINK, - "req_flow_ctrl 0x%x\n", bp->link_params.req_flow_ctrl[cfg_idx]); - - if (netif_running(dev)) { - bnx2x_stats_handle(bp, STATS_EVENT_STOP); - bnx2x_link_set(bp); - } - - return 0; -} - -static const struct { - char string[ETH_GSTRING_LEN]; -} bnx2x_tests_str_arr[BNX2X_NUM_TESTS] = { - { "register_test (offline)" }, - { "memory_test (offline)" }, - { "loopback_test (offline)" }, - { "nvram_test (online)" }, - { "interrupt_test (online)" }, - { "link_test (online)" }, - { "idle check (online)" } -}; - -static int bnx2x_test_registers(struct bnx2x *bp) -{ - int idx, i, rc = -ENODEV; - u32 wr_val = 0; - int port = BP_PORT(bp); - static const struct { - u32 offset0; - u32 offset1; - u32 mask; - } reg_tbl[] = { -/* 0 */ { BRB1_REG_PAUSE_LOW_THRESHOLD_0, 4, 0x000003ff }, - { DORQ_REG_DB_ADDR0, 4, 0xffffffff }, - { HC_REG_AGG_INT_0, 4, 0x000003ff }, - { PBF_REG_MAC_IF0_ENABLE, 4, 0x00000001 }, - { PBF_REG_P0_INIT_CRD, 4, 0x000007ff }, - { PRS_REG_CID_PORT_0, 4, 0x00ffffff }, - { PXP2_REG_PSWRQ_CDU0_L2P, 4, 0x000fffff }, - { PXP2_REG_RQ_CDU0_EFIRST_MEM_ADDR, 8, 0x0003ffff }, - { PXP2_REG_PSWRQ_TM0_L2P, 4, 0x000fffff }, - { PXP2_REG_RQ_USDM0_EFIRST_MEM_ADDR, 8, 0x0003ffff }, -/* 10 */ { PXP2_REG_PSWRQ_TSDM0_L2P, 4, 0x000fffff }, - { QM_REG_CONNNUM_0, 4, 0x000fffff }, - { TM_REG_LIN0_MAX_ACTIVE_CID, 4, 0x0003ffff }, - { SRC_REG_KEYRSS0_0, 40, 0xffffffff }, - { SRC_REG_KEYRSS0_7, 40, 0xffffffff }, - { XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00, 4, 0x00000001 }, - { XCM_REG_WU_DA_CNT_CMD00, 4, 0x00000003 }, - { XCM_REG_GLB_DEL_ACK_MAX_CNT_0, 4, 0x000000ff }, - { NIG_REG_LLH0_T_BIT, 4, 0x00000001 }, - { NIG_REG_EMAC0_IN_EN, 4, 0x00000001 }, -/* 20 */ { NIG_REG_BMAC0_IN_EN, 4, 0x00000001 }, - { NIG_REG_XCM0_OUT_EN, 4, 0x00000001 }, - { NIG_REG_BRB0_OUT_EN, 4, 0x00000001 }, - { NIG_REG_LLH0_XCM_MASK, 4, 0x00000007 }, - { NIG_REG_LLH0_ACPI_PAT_6_LEN, 68, 0x000000ff }, - { NIG_REG_LLH0_ACPI_PAT_0_CRC, 68, 0xffffffff }, - { NIG_REG_LLH0_DEST_MAC_0_0, 160, 0xffffffff }, - { NIG_REG_LLH0_DEST_IP_0_1, 160, 0xffffffff }, - { NIG_REG_LLH0_IPV4_IPV6_0, 160, 0x00000001 }, - { NIG_REG_LLH0_DEST_UDP_0, 160, 0x0000ffff }, -/* 30 */ { NIG_REG_LLH0_DEST_TCP_0, 160, 0x0000ffff }, - { NIG_REG_LLH0_VLAN_ID_0, 160, 0x00000fff }, - { NIG_REG_XGXS_SERDES0_MODE_SEL, 4, 0x00000001 }, - { NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0, 4, 0x00000001 }, - { NIG_REG_STATUS_INTERRUPT_PORT0, 4, 0x07ffffff }, - { NIG_REG_XGXS0_CTRL_EXTREMOTEMDIOST, 24, 0x00000001 }, - { NIG_REG_SERDES0_CTRL_PHY_ADDR, 16, 0x0000001f }, - - { 0xffffffff, 0, 0x00000000 } - }; - - if (!netif_running(bp->dev)) - return rc; - - /* Repeat the test twice: - First by writing 0x00000000, second by writing 0xffffffff */ - for (idx = 0; idx < 2; idx++) { - - switch (idx) { - case 0: - wr_val = 0; - break; - case 1: - wr_val = 0xffffffff; - break; - } - - for (i = 0; reg_tbl[i].offset0 != 0xffffffff; i++) { - u32 offset, mask, save_val, val; - if (CHIP_IS_E2(bp) && reg_tbl[i].offset0 == HC_REG_AGG_INT_0) - continue; - - if (CHIP_REV_IS_FPGA(bp) && reg_tbl[i].offset0 == NIG_REG_BMAC0_IN_EN) - continue; - - offset = reg_tbl[i].offset0 + port*reg_tbl[i].offset1; - mask = reg_tbl[i].mask; - - save_val = REG_RD(bp, offset); - - REG_WR(bp, offset, wr_val & mask); - - val = REG_RD(bp, offset); - - /* Restore the original register's value */ - REG_WR(bp, offset, save_val); - - /* verify value is as expected */ - if ((val & mask) != (wr_val & mask)) { - DP(NETIF_MSG_HW, - "offset 0x%x: val 0x%x != 0x%x mask 0x%x\n", - offset, val, wr_val, mask); - goto test_reg_exit; - } - } - } - - rc = 0; - -test_reg_exit: - return rc; -} - -static int bnx2x_test_memory(struct bnx2x *bp) -{ - int i, j, rc = -ENODEV; - u32 val; - static const struct { - u32 offset; - int size; - } mem_tbl[] = { - { CCM_REG_XX_DESCR_TABLE, CCM_REG_XX_DESCR_TABLE_SIZE }, - { CFC_REG_ACTIVITY_COUNTER, CFC_REG_ACTIVITY_COUNTER_SIZE }, - { CFC_REG_LINK_LIST, CFC_REG_LINK_LIST_SIZE }, - { DMAE_REG_CMD_MEM, DMAE_REG_CMD_MEM_SIZE }, - { TCM_REG_XX_DESCR_TABLE, TCM_REG_XX_DESCR_TABLE_SIZE }, - { UCM_REG_XX_DESCR_TABLE, UCM_REG_XX_DESCR_TABLE_SIZE }, - { XCM_REG_XX_DESCR_TABLE, XCM_REG_XX_DESCR_TABLE_SIZE }, - - { 0xffffffff, 0 } - }; - static const struct { - char *name; - u32 offset; - u32 e1_mask; - u32 e1h_mask; - u32 e2_mask; - } prty_tbl[] = { - { "CCM_PRTY_STS", CCM_REG_CCM_PRTY_STS, 0x3ffc0, 0, 0 }, - { "CFC_PRTY_STS", CFC_REG_CFC_PRTY_STS, 0x2, 0x2, 0 }, - { "DMAE_PRTY_STS", DMAE_REG_DMAE_PRTY_STS, 0, 0, 0 }, - { "TCM_PRTY_STS", TCM_REG_TCM_PRTY_STS, 0x3ffc0, 0, 0 }, - { "UCM_PRTY_STS", UCM_REG_UCM_PRTY_STS, 0x3ffc0, 0, 0 }, - { "XCM_PRTY_STS", XCM_REG_XCM_PRTY_STS, 0x3ffc1, 0, 0 }, - - { NULL, 0xffffffff, 0, 0, 0 } - }; - - if (!netif_running(bp->dev)) - return rc; - - /* pre-Check the parity status */ - for (i = 0; prty_tbl[i].offset != 0xffffffff; i++) { - val = REG_RD(bp, prty_tbl[i].offset); - if ((CHIP_IS_E1(bp) && (val & ~(prty_tbl[i].e1_mask))) || - (CHIP_IS_E1H(bp) && (val & ~(prty_tbl[i].e1h_mask))) || - (CHIP_IS_E2(bp) && (val & ~(prty_tbl[i].e2_mask)))) { - DP(NETIF_MSG_HW, - "%s is 0x%x\n", prty_tbl[i].name, val); - goto test_mem_exit; - } - } - - /* Go through all the memories */ - for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) - for (j = 0; j < mem_tbl[i].size; j++) - REG_RD(bp, mem_tbl[i].offset + j*4); - - /* Check the parity status */ - for (i = 0; prty_tbl[i].offset != 0xffffffff; i++) { - val = REG_RD(bp, prty_tbl[i].offset); - if ((CHIP_IS_E1(bp) && (val & ~(prty_tbl[i].e1_mask))) || - (CHIP_IS_E1H(bp) && (val & ~(prty_tbl[i].e1h_mask))) || - (CHIP_IS_E2(bp) && (val & ~(prty_tbl[i].e2_mask)))) { - DP(NETIF_MSG_HW, - "%s is 0x%x\n", prty_tbl[i].name, val); - goto test_mem_exit; - } - } - - rc = 0; - -test_mem_exit: - return rc; -} - -static void bnx2x_wait_for_link(struct bnx2x *bp, u8 link_up, u8 is_serdes) -{ - int cnt = 1400; - - if (link_up) - while (bnx2x_link_test(bp, is_serdes) && cnt--) - msleep(10); -} - -static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode, u8 link_up) -{ - unsigned int pkt_size, num_pkts, i; - struct sk_buff *skb; - unsigned char *packet; - struct bnx2x_fastpath *fp_rx = &bp->fp[0]; - struct bnx2x_fastpath *fp_tx = &bp->fp[0]; - u16 tx_start_idx, tx_idx; - u16 rx_start_idx, rx_idx; - u16 pkt_prod, bd_prod; - struct sw_tx_bd *tx_buf; - struct eth_tx_start_bd *tx_start_bd; - struct eth_tx_parse_bd_e1x *pbd_e1x = NULL; - struct eth_tx_parse_bd_e2 *pbd_e2 = NULL; - dma_addr_t mapping; - union eth_rx_cqe *cqe; - u8 cqe_fp_flags; - struct sw_rx_bd *rx_buf; - u16 len; - int rc = -ENODEV; - - /* check the loopback mode */ - switch (loopback_mode) { - case BNX2X_PHY_LOOPBACK: - if (bp->link_params.loopback_mode != LOOPBACK_XGXS) - return -EINVAL; - break; - case BNX2X_MAC_LOOPBACK: - bp->link_params.loopback_mode = LOOPBACK_BMAC; - bnx2x_phy_init(&bp->link_params, &bp->link_vars); - break; - default: - return -EINVAL; - } - - /* prepare the loopback packet */ - pkt_size = (((bp->dev->mtu < ETH_MAX_PACKET_SIZE) ? - bp->dev->mtu : ETH_MAX_PACKET_SIZE) + ETH_HLEN); - skb = netdev_alloc_skb(bp->dev, bp->rx_buf_size); - if (!skb) { - rc = -ENOMEM; - goto test_loopback_exit; - } - packet = skb_put(skb, pkt_size); - memcpy(packet, bp->dev->dev_addr, ETH_ALEN); - memset(packet + ETH_ALEN, 0, ETH_ALEN); - memset(packet + 2*ETH_ALEN, 0x77, (ETH_HLEN - 2*ETH_ALEN)); - for (i = ETH_HLEN; i < pkt_size; i++) - packet[i] = (unsigned char) (i & 0xff); - - /* send the loopback packet */ - num_pkts = 0; - tx_start_idx = le16_to_cpu(*fp_tx->tx_cons_sb); - rx_start_idx = le16_to_cpu(*fp_rx->rx_cons_sb); - - pkt_prod = fp_tx->tx_pkt_prod++; - tx_buf = &fp_tx->tx_buf_ring[TX_BD(pkt_prod)]; - tx_buf->first_bd = fp_tx->tx_bd_prod; - tx_buf->skb = skb; - tx_buf->flags = 0; - - bd_prod = TX_BD(fp_tx->tx_bd_prod); - tx_start_bd = &fp_tx->tx_desc_ring[bd_prod].start_bd; -#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ - mapping = dma_map_single(&bp->pdev->dev, skb->data, - skb_headlen(skb), DMA_TO_DEVICE); +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + /* multiple tx priority */ + if (CHIP_IS_E1x(bp)) + bp->max_cos = BNX2X_MULTI_TX_COS_E1X; + if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) + bp->max_cos = BNX2X_MULTI_TX_COS_E2_E3A0; + if (CHIP_IS_E3B0(bp)) + bp->max_cos = BNX2X_MULTI_TX_COS_E3B0; #else - mapping = pci_map_single(bp->pdev, skb->data, - skb_headlen(skb), PCI_DMA_TODEVICE); + bp->max_cos = 1; #endif - tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - tx_start_bd->nbd = cpu_to_le16(2); /* start + pbd */ - tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb)); - tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod); - tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; - SET_FLAG(tx_start_bd->general_data, - ETH_TX_START_BD_ETH_ADDR_TYPE, - UNICAST_ADDRESS); - SET_FLAG(tx_start_bd->general_data, - ETH_TX_START_BD_HDR_NBDS, - 1); - - /* turn on parsing and get a BD */ - bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); - - pbd_e1x = &fp_tx->tx_desc_ring[bd_prod].parse_bd_e1x; - pbd_e2 = &fp_tx->tx_desc_ring[bd_prod].parse_bd_e2; - - memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2)); - memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x)); - - wmb(); - - fp_tx->tx_db.data.prod += 2; - barrier(); - DOORBELL(bp, fp_tx->index, fp_tx->tx_db.raw); - - mmiowb(); - - num_pkts++; - fp_tx->tx_bd_prod += 2; /* start + pbd */ -#if (LINUX_VERSION_CODE < 0x02061f) /* ! BNX2X_UPSTREAM */ - /* In kernels starting from 2.6.31 netdev layer does this */ - bp->dev->trans_start = jiffies; -#endif - - udelay(100); - - tx_idx = le16_to_cpu(*fp_tx->tx_cons_sb); - if (tx_idx != tx_start_idx + num_pkts) - goto test_loopback_exit; - - /* Unlike HC IGU won't generate an interrupt for status block - * updates that have been performed while interrupts were - * disabled. - */ - if (bp->common.int_block == INT_BLOCK_IGU) - bnx2x_tx_int(fp_tx); - - rx_idx = le16_to_cpu(*fp_rx->rx_cons_sb); - if (rx_idx != rx_start_idx + num_pkts) - goto test_loopback_exit; - - cqe = &fp_rx->rx_comp_ring[RCQ_BD(fp_rx->rx_comp_cons)]; - cqe_fp_flags = cqe->fast_path_cqe.type_error_flags; - if (CQE_TYPE(cqe_fp_flags) || (cqe_fp_flags & ETH_RX_ERROR_FALGS)) - goto test_loopback_rx_exit; - - len = le16_to_cpu(cqe->fast_path_cqe.pkt_len); - if (len != pkt_size) - goto test_loopback_rx_exit; - - rx_buf = &fp_rx->rx_buf_ring[RX_BD(fp_rx->rx_bd_cons)]; - skb = rx_buf->skb; - skb_reserve(skb, cqe->fast_path_cqe.placement_offset); - for (i = ETH_HLEN; i < pkt_size; i++) - if (*(skb->data + i) != (unsigned char) (i & 0xff)) - goto test_loopback_rx_exit; - - rc = 0; - -test_loopback_rx_exit: -#if (LINUX_VERSION_CODE < 0x02061b) /* ! BNX2X_UPSTREAM */ - bp->dev->last_rx = jiffies; -#endif - - fp_rx->rx_bd_cons = NEXT_RX_IDX(fp_rx->rx_bd_cons); - fp_rx->rx_bd_prod = NEXT_RX_IDX(fp_rx->rx_bd_prod); - fp_rx->rx_comp_cons = NEXT_RCQ_IDX(fp_rx->rx_comp_cons); - fp_rx->rx_comp_prod = NEXT_RCQ_IDX(fp_rx->rx_comp_prod); - - /* Update producers */ - bnx2x_update_rx_prod(bp, fp_rx, fp_rx->rx_bd_prod, fp_rx->rx_comp_prod, - fp_rx->rx_sge_prod); - -test_loopback_exit: - bp->link_params.loopback_mode = LOOPBACK_NONE; return rc; } -static int bnx2x_test_loopback(struct bnx2x *bp, u8 link_up) -{ - int rc = 0, res; - - if (BP_NOMCP(bp)) - return rc; - - if (!netif_running(bp->dev)) - return BNX2X_LOOPBACK_FAILED; - - bnx2x_netif_stop(bp, 1); - bnx2x_acquire_phy_lock(bp); - - res = bnx2x_run_loopback(bp, BNX2X_PHY_LOOPBACK, link_up); - if (res) { - DP(NETIF_MSG_PROBE, " PHY loopback failed (res %d)\n", res); - rc |= BNX2X_PHY_LOOPBACK_FAILED; - } - - res = bnx2x_run_loopback(bp, BNX2X_MAC_LOOPBACK, link_up); - if (res) { - DP(NETIF_MSG_PROBE, " MAC loopback failed (res %d)\n", res); - rc |= BNX2X_MAC_LOOPBACK_FAILED; - } - - bnx2x_release_phy_lock(bp); - bnx2x_netif_start(bp); - - return rc; -} - -#define CRC32_RESIDUAL 0xdebb20e3 - -static int bnx2x_test_nvram(struct bnx2x *bp) -{ - static const struct { - int offset; - int size; - } nvram_tbl[] = { - { 0, 0x14 }, /* bootstrap */ - { 0x14, 0xec }, /* dir */ - { 0x100, 0x350 }, /* manuf_info */ - { 0x450, 0xf0 }, /* feature_info */ - { 0x640, 0x64 }, /* upgrade_key_info */ - { 0x6a4, 0x64 }, - { 0x708, 0x70 }, /* manuf_key_info */ - { 0x778, 0x70 }, - { 0, 0 } - }; - __be32 buf[0x350 / 4]; - u8 *data = (u8 *)buf; - int i, rc; - u32 magic, crc; - - if (BP_NOMCP(bp)) - return 0; - - rc = bnx2x_nvram_read(bp, 0, data, 4); - if (rc) { - DP(NETIF_MSG_PROBE, "magic value read (rc %d)\n", rc); - goto test_nvram_exit; - } - - magic = be32_to_cpu(buf[0]); - if (magic != 0x669955aa) { - DP(NETIF_MSG_PROBE, "magic value (0x%08x)\n", magic); - rc = -ENODEV; - goto test_nvram_exit; - } - - for (i = 0; nvram_tbl[i].size; i++) { - - rc = bnx2x_nvram_read(bp, nvram_tbl[i].offset, data, - nvram_tbl[i].size); - if (rc) { - DP(NETIF_MSG_PROBE, - "nvram_tbl[%d] read data (rc %d)\n", i, rc); - goto test_nvram_exit; - } - - crc = ether_crc_le(nvram_tbl[i].size, data); - if (crc != CRC32_RESIDUAL) { - DP(NETIF_MSG_PROBE, - "nvram_tbl[%d] crc value (0x%08x)\n", i, crc); - rc = -ENODEV; - goto test_nvram_exit; - } - } - -test_nvram_exit: - return rc; -} - -static int bnx2x_test_intr(struct bnx2x *bp) -{ - int rc; - char empty_mac[ETH_ALEN] = {0}; - - if (!netif_running(bp->dev)) - return -ENODEV; - - /* Set an empty MAC */ - rc = bnx2x_set_eth_mac_one(empty_mac, bp, &bp->fp->mac_obj, 1, - BNX2X_ETH_MAC); - if (rc) - return -ENODEV; - - /* Clear an empty MAC */ - rc = bnx2x_set_eth_mac_one(empty_mac, bp, &bp->fp->mac_obj, 0, - BNX2X_ETH_MAC); - if (rc) - return -ENODEV; - - return 0; -} - -static void bnx2x_self_test(struct net_device *dev, - struct ethtool_test *etest, u64 *buf) -{ - struct bnx2x *bp = netdev_priv(dev); - u8 is_serdes; - if (bp->recovery_state != BNX2X_RECOVERY_DONE) { - netdev_err(bp->dev, "Handling parity error recovery. Try again later\n"); - etest->flags |= ETH_TEST_FL_FAILED; - return; - } - - memset(buf, 0, sizeof(u64) * BNX2X_NUM_TESTS); - - if (!netif_running(dev)) - return; - - /* offline tests are not supported in MF mode */ - if (IS_MF(bp)) - etest->flags &= ~ETH_TEST_FL_OFFLINE; - is_serdes = (bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) > 0; - if (etest->flags & ETH_TEST_FL_OFFLINE) { - int port = BP_PORT(bp); - u32 val; - u8 link_up; - - /* save current value of input enable for TX port IF */ - val = REG_RD(bp, NIG_REG_EGRESS_UMP0_IN_EN + port*4); - /* disable input for TX port IF */ - REG_WR(bp, NIG_REG_EGRESS_UMP0_IN_EN + port*4, 0); - - link_up = bp->link_vars.link_up; - bnx2x_nic_unload(bp, UNLOAD_NORMAL); - bnx2x_nic_load(bp, LOAD_DIAG); - /* wait until link state is restored */ - bnx2x_wait_for_link(bp, link_up, is_serdes); - - if (bnx2x_test_registers(bp) != 0) { - buf[0] = 1; - etest->flags |= ETH_TEST_FL_FAILED; - } - if (bnx2x_test_memory(bp) != 0) { - buf[1] = 1; - etest->flags |= ETH_TEST_FL_FAILED; - } - - buf[2] = bnx2x_test_loopback(bp, link_up); - if (buf[2] != 0) - etest->flags |= ETH_TEST_FL_FAILED; - - bnx2x_nic_unload(bp, UNLOAD_NORMAL); - - /* restore input for TX port IF */ - REG_WR(bp, NIG_REG_EGRESS_UMP0_IN_EN + port*4, val); - - bnx2x_nic_load(bp, LOAD_NORMAL); - /* wait until link state is restored */ - bnx2x_wait_for_link(bp, link_up, is_serdes); - } - if (bnx2x_test_nvram(bp) != 0) { - buf[3] = 1; - etest->flags |= ETH_TEST_FL_FAILED; - } - if (bnx2x_test_intr(bp) != 0) { - buf[4] = 1; - etest->flags |= ETH_TEST_FL_FAILED; - } - if (bp->port.pmf) - if (bnx2x_link_test(bp, is_serdes) != 0) { - buf[5] = 1; - etest->flags |= ETH_TEST_FL_FAILED; - } -#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ - /* run the idle check twice */ - bnx2x_idle_chk(bp); - buf[6] = bnx2x_idle_chk(bp); - if (buf[6] != 0) - etest->flags |= ETH_TEST_FL_FAILED; -#endif - -#ifdef BNX2X_EXTRA_DEBUG - bnx2x_panic_dump(bp); -#endif -} - -#define IS_PORT_STAT(i) \ - ((bnx2x_stats_arr[i].flags & STATS_FLAGS_BOTH) == STATS_FLAGS_PORT) -#define IS_FUNC_STAT(i) (bnx2x_stats_arr[i].flags & STATS_FLAGS_FUNC) -#define IS_MF_MODE_STAT(bp) (IS_MF(bp) && !(bp->msg_enable & BNX2X_MSG_STATS)) - -static void bnx2x_get_strings(struct net_device *dev, u32 stringset, u8 *buf) -{ - struct bnx2x *bp = netdev_priv(dev); - int i, j, k; - char queue_name[MAX_QUEUE_NAME_LEN+1]; - - switch (stringset) { - case ETH_SS_STATS: - if (is_multi(bp)) { - k = 0; - for_each_napi_queue(bp, i) { - memset(queue_name, 0, sizeof(queue_name)); - - if (IS_FCOE_IDX(i)) - sprintf(queue_name, "fcoe"); - else - sprintf(queue_name, "%d", i); - - for (j = 0; j < BNX2X_NUM_Q_STATS; j++) - sprintf(buf + (k + j)*ETH_GSTRING_LEN, - bnx2x_q_stats_arr[j].string, - queue_name); - k += BNX2X_NUM_Q_STATS; - } - if (IS_MF_MODE_STAT(bp)) - break; - for (j = 0; j < BNX2X_NUM_STATS; j++) - strcpy(buf + (k + j)*ETH_GSTRING_LEN, - bnx2x_stats_arr[j].string); - } else { - for (i = 0, j = 0; i < BNX2X_NUM_STATS; i++) { - if (IS_MF_MODE_STAT(bp) && IS_PORT_STAT(i)) - continue; - strcpy(buf + j*ETH_GSTRING_LEN, - bnx2x_stats_arr[i].string); - j++; - } - } - break; - - case ETH_SS_TEST: - memcpy(buf, bnx2x_tests_str_arr, sizeof(bnx2x_tests_str_arr)); - break; - } -} - -#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ -static int bnx2x_get_sset_count(struct net_device *dev, int stringset) -{ - struct bnx2x *bp = netdev_priv(dev); - int i, num_stats; - - switch (stringset) { - case ETH_SS_STATS: - if (is_multi(bp)) { - num_stats = BNX2X_NUM_STAT_QUEUES(bp) * - BNX2X_NUM_Q_STATS; - if (!IS_MF_MODE_STAT(bp)) - num_stats += BNX2X_NUM_STATS; - } else { - if (IS_MF_MODE_STAT(bp)) { - num_stats = 0; - for (i = 0; i < BNX2X_NUM_STATS; i++) - if (IS_FUNC_STAT(i)) - num_stats++; - } else - num_stats = BNX2X_NUM_STATS; - } - return num_stats; - - case ETH_SS_TEST: - return BNX2X_NUM_TESTS; - - default: - return -EINVAL; - } -} -#else -static int bnx2x_self_test_count(struct net_device *dev) -{ - return BNX2X_NUM_TESTS; -} - -static int bnx2x_get_stats_count(struct net_device *dev) -{ - struct bnx2x *bp = netdev_priv(dev); - int i, num_stats; - - if (is_multi(bp)) { - num_stats = BNX2X_NUM_STAT_QUEUES(bp) * BNX2X_NUM_Q_STATS; - if (!IS_MF_MODE_STAT(bp)) - num_stats += BNX2X_NUM_STATS; - } else { - if (IS_MF_MODE_STAT(bp)) { - num_stats = 0; - for (i = 0; i < BNX2X_NUM_STATS; i++) - if (IS_FUNC_STAT(i)) - num_stats++; - } else - num_stats = BNX2X_NUM_STATS; - } - - return num_stats; -} -#endif - -static void bnx2x_get_ethtool_stats(struct net_device *dev, - struct ethtool_stats *stats, u64 *buf) -{ - struct bnx2x *bp = netdev_priv(dev); - u32 *hw_stats, *offset; - int i, j, k; - - if (is_multi(bp)) { - k = 0; - for_each_napi_queue(bp, i) { - hw_stats = (u32 *)&bp->fp[i].eth_q_stats; - for (j = 0; j < BNX2X_NUM_Q_STATS; j++) { - if (bnx2x_q_stats_arr[j].size == 0) { - /* skip this counter */ - buf[k + j] = 0; - continue; - } - offset = (hw_stats + - bnx2x_q_stats_arr[j].offset); - if (bnx2x_q_stats_arr[j].size == 4) { - /* 4-byte counter */ - buf[k + j] = (u64) *offset; - continue; - } - /* 8-byte counter */ - buf[k + j] = HILO_U64(*offset, *(offset + 1)); - } - k += BNX2X_NUM_Q_STATS; - } - if (IS_MF_MODE_STAT(bp)) - return; - hw_stats = (u32 *)&bp->eth_stats; - for (j = 0; j < BNX2X_NUM_STATS; j++) { - if (bnx2x_stats_arr[j].size == 0) { - /* skip this counter */ - buf[k + j] = 0; - continue; - } - offset = (hw_stats + bnx2x_stats_arr[j].offset); - if (bnx2x_stats_arr[j].size == 4) { - /* 4-byte counter */ - buf[k + j] = (u64) *offset; - continue; - } - /* 8-byte counter */ - buf[k + j] = HILO_U64(*offset, *(offset + 1)); - } - } else { - hw_stats = (u32 *)&bp->eth_stats; - for (i = 0, j = 0; i < BNX2X_NUM_STATS; i++) { - if (IS_MF_MODE_STAT(bp) && IS_PORT_STAT(i)) - continue; - if (bnx2x_stats_arr[i].size == 0) { - /* skip this counter */ - buf[j] = 0; - j++; - continue; - } - offset = (hw_stats + bnx2x_stats_arr[i].offset); - if (bnx2x_stats_arr[i].size == 4) { - /* 4-byte counter */ - buf[j] = (u64) *offset; - j++; - continue; - } - /* 8-byte counter */ - buf[j] = HILO_U64(*offset, *(offset + 1)); - j++; - } - } -} - -static int bnx2x_phys_id(struct net_device *dev, u32 data) -{ - struct bnx2x *bp = netdev_priv(dev); - int i; - - if (!netif_running(dev)) - return 0; - - if (!bp->port.pmf) - return 0; - - if (data == 0) - data = 2; - - for (i = 0; i < (data * 2); i++) { - if ((i % 2) == 0) - bnx2x_set_led(&bp->link_params, &bp->link_vars, - LED_MODE_ON, SPEED_1000); - else - bnx2x_set_led(&bp->link_params, &bp->link_vars, - LED_MODE_OFF, 0); - - msleep_interruptible(500); - if (signal_pending(current)) - break; - } - - bnx2x_set_led(&bp->link_params, &bp->link_vars, - LED_MODE_OPER, bp->link_vars.line_speed); - - return 0; -} -#if (LINUX_VERSION_CODE >= 0x020613) /* BNX2X_UPSTREAM */ -static const struct ethtool_ops bnx2x_ethtool_ops = { -#else -static struct ethtool_ops bnx2x_ethtool_ops = { -#endif - .get_settings = bnx2x_get_settings, - .set_settings = bnx2x_set_settings, - .get_drvinfo = bnx2x_get_drvinfo, - .get_regs_len = bnx2x_get_regs_len, - .get_regs = bnx2x_get_regs, - .get_wol = bnx2x_get_wol, - .set_wol = bnx2x_set_wol, - .get_msglevel = bnx2x_get_msglevel, - .set_msglevel = bnx2x_set_msglevel, - .nway_reset = bnx2x_nway_reset, - .get_link = bnx2x_get_link, -#if (LINUX_VERSION_CODE >= 0x020418) /* BNX2X_UPSTREAM */ - .get_eeprom_len = bnx2x_get_eeprom_len, -#endif - .get_eeprom = bnx2x_get_eeprom, - .set_eeprom = bnx2x_set_eeprom, - .get_coalesce = bnx2x_get_coalesce, - .set_coalesce = bnx2x_set_coalesce, - .get_ringparam = bnx2x_get_ringparam, - .set_ringparam = bnx2x_set_ringparam, - .get_pauseparam = bnx2x_get_pauseparam, - .set_pauseparam = bnx2x_set_pauseparam, - .get_rx_csum = bnx2x_get_rx_csum, - .set_rx_csum = bnx2x_set_rx_csum, - .get_tx_csum = ethtool_op_get_tx_csum, -#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ - .set_tx_csum = ethtool_op_set_tx_hw_csum, -#else - .set_tx_csum = bnx2x_set_tx_hw_csum, -#endif -#if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ - .set_flags = bnx2x_set_flags, - .get_flags = ethtool_op_get_flags, -#endif - .get_sg = ethtool_op_get_sg, - .set_sg = ethtool_op_set_sg, -#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ - .get_tso = ethtool_op_get_tso, - .set_tso = bnx2x_set_tso, -#endif - .self_test = bnx2x_self_test, -#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ - .get_sset_count = bnx2x_get_sset_count, -#else - .get_stats_count = bnx2x_get_stats_count, - .self_test_count = bnx2x_self_test_count, -#endif - .get_strings = bnx2x_get_strings, - .phys_id = bnx2x_phys_id, - .get_ethtool_stats = bnx2x_get_ethtool_stats, -#ifdef ETHTOOL_GPERMADDR /* ! BNX2X_UPSTREAM */ -#if (LINUX_VERSION_CODE < 0x020617) - .get_perm_addr = ethtool_op_get_perm_addr -#endif -#endif -}; - -/* end of ethtool_ops */ /**************************************************************************** * General service functions @@ -13384,53 +12154,100 @@ static struct net_device_stats *bnx2x_get_stats(struct net_device *dev) int bnx2x_open(struct net_device *dev) { struct bnx2x *bp = netdev_priv(dev); + bool global = false; + int other_engine = BP_PATH(bp) ? 0 : 1; + bool other_load_status, load_status; + +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + int rc; + + bp->bypass_state = BNX2X_BYPASS_DISABLED; + rc = bnx2x_char_init(bp); + if (rc) + return rc; +#endif + bp->stats_init = true; netif_carrier_off(dev); bnx2x_set_power_state(bp, PCI_D0); - if (!bnx2x_reset_is_done(bp)) { - do { - /* Reset MCP mail box sequence if there is on going - * recovery - */ - bp->fw_seq = 0; + other_load_status = bnx2x_get_load_status(bp, other_engine); + load_status = bnx2x_get_load_status(bp, BP_PATH(bp)); - /* If it's the first function to load and reset done - * is still not cleared it may mean that. We don't - * check the attention state here because it may have - * already been cleared by a "common" reset but we - * shell proceed with "process kill" anyway. + /* + * If parity had happen during the unload, then attentions + * and/or RECOVERY_IN_PROGRES may still be set. In this case we + * want the first function loaded on the current engine to + * complete the recovery. + */ + if (!bnx2x_reset_is_done(bp, BP_PATH(bp)) || + bnx2x_chk_parity_attn(bp, &global, true)) + do { + /* + * If there are attentions and they are in a global + * blocks, set the GLOBAL_RESET bit regardless whether + * it will be this function that will complete the + * recovery or not. */ - if ((bnx2x_get_load_cnt(bp) == 0) && - bnx2x_trylock_hw_lock(bp, - HW_LOCK_RESOURCE_RESERVED_08) && - (!bnx2x_leader_reset(bp))) { - DP(NETIF_MSG_HW, "Recovered in open\n"); + if (global) + bnx2x_set_reset_global(bp); + + /* + * Only the first function on the current engine should + * try to recover in open. In case of attentions in + * global blocks only the first in the chip should try + * to recover. + */ + if ((!load_status && + (!global || !other_load_status)) && + bnx2x_trylock_leader_lock(bp) && + !bnx2x_leader_reset(bp)) { + netdev_info(bp->dev, "Recovered in open\n"); break; } + /* recovery has failed... */ bnx2x_set_power_state(bp, PCI_D3hot); + bp->recovery_state = BNX2X_RECOVERY_FAILED; - netdev_err(bp->dev, "Recovery flow hasn't been properly" - " completed yet. Try again later. If u still see this" - " message after a few retries then power cycle is" - " required.\n"); + BNX2X_ERR("Recovery flow hasn't been properly completed yet. Try again later.\n" + "If you still see this message after a few retries then power cycle is required.\n"); return -EAGAIN; } while (0); - } bp->recovery_state = BNX2X_RECOVERY_DONE; +#if defined(BNX2X_ESX_CNA) /* non BNX2X_UPSTREAM */ + if (bnx2x_nic_load(bp, LOAD_OPEN)) + return -EBUSY; + if (bp->flags & CNA_ENABLED) + return dev_open(bp->cnadev); + + + + return 0; +#else /* BNX2X_UPSTREAM */ return bnx2x_nic_load(bp, LOAD_OPEN); +#endif } /* called with rtnl_lock */ +#if !defined(BNX2X_VMWARE_BMAPILNX) /* BNX2X_UPSTREAM */ +static +#endif int bnx2x_close(struct net_device *dev) { struct bnx2x *bp = netdev_priv(dev); +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + bnx2x_char_delete(bp); +#endif +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + if (bp->flags & CNA_ENABLED) + dev_close(bp->cnadev); +#endif /* Unload the driver, release IRQs */ bnx2x_nic_unload(bp, UNLOAD_CLOSE); @@ -13440,13 +12257,13 @@ int bnx2x_close(struct net_device *dev) return 0; } -static inline int __init_mcast_macs_list(struct bnx2x *bp, +static inline int bnx2x_init_mcast_macs_list(struct bnx2x *bp, struct bnx2x_mcast_ramrod_params *p) { int mc_count = netdev_mc_count(bp->dev); struct bnx2x_mcast_list_elem *mc_mac = kzalloc(sizeof(*mc_mac) * mc_count, GFP_ATOMIC); -#if defined(netdev_hw_addr_list_for_each) && !defined(BNX2X_OLD_FCOE) /* BNX2X_UPSTREAM */ +#if defined(netdev_hw_addr_list_for_each) /* BNX2X_UPSTREAM */ struct netdev_hw_addr *ha; #else struct dev_mc_list *ha; @@ -13468,7 +12285,8 @@ static inline int __init_mcast_macs_list(struct bnx2x *bp, return 0; } -static inline void __free_mcast_macs_list(struct bnx2x_mcast_ramrod_params *p) +static inline void bnx2x_free_mcast_macs_list( + struct bnx2x_mcast_ramrod_params *p) { struct bnx2x_mcast_list_elem *mc_mac = list_first_entry(&p->mcast_list, struct bnx2x_mcast_list_elem, @@ -13478,6 +12296,94 @@ static inline void __free_mcast_macs_list(struct bnx2x_mcast_ramrod_params *p) kfree(mc_mac); } +#if (LINUX_VERSION_CODE > 0x020616) /* BNX2X_UPSTREAM */ +/** + * bnx2x_set_uc_list - configure a new unicast MACs list. + * + * @bp: driver handle + * + * We will use zero (0) as a MAC type for these MACs. + */ +static inline int bnx2x_set_uc_list(struct bnx2x *bp) +{ + int rc; + struct net_device *dev = bp->dev; +#if (LINUX_VERSION_CODE < 0x02061f) + struct dev_addr_list *ha; +#else /* BNX2X_UPSTREAM */ + struct netdev_hw_addr *ha; +#endif + struct bnx2x_vlan_mac_obj *mac_obj = &bp->fp->mac_obj; + unsigned long ramrod_flags = 0; + + /* First schedule a cleanup up of old configuration */ + rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, false); + if (rc < 0) { + BNX2X_ERR("Failed to schedule DELETE operations: %d\n", rc); + return rc; + } + + netdev_for_each_uc_addr(ha, dev) { + rc = bnx2x_set_mac_one(bp, bnx2x_uc_addr(ha), mac_obj, true, + BNX2X_UC_LIST_MAC, &ramrod_flags); + if (rc == -EEXIST) { + DP(BNX2X_MSG_SP, + "Failed to schedule ADD operations: %d\n", rc); + /* do not treat adding same MAC as error */ + rc = 0; + + } else if (rc < 0) { + + BNX2X_ERR("Failed to schedule ADD operations: %d\n", + rc); + return rc; + } + } + + /* Execute the pending commands */ + __set_bit(RAMROD_CONT, &ramrod_flags); + return bnx2x_set_mac_one(bp, NULL, mac_obj, false /* don't care */, + BNX2X_UC_LIST_MAC, &ramrod_flags); +} +#endif + +static inline int bnx2x_set_mc_list(struct bnx2x *bp) +{ + struct net_device *dev = bp->dev; + struct bnx2x_mcast_ramrod_params rparam = {NULL}; + int rc = 0; + + rparam.mcast_obj = &bp->mcast_obj; + + /* first, clear all configured multicast MACs */ + rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_DEL); + if (rc < 0) { + BNX2X_ERR("Failed to clear multicast configuration: %d\n", rc); + return rc; + } + + /* then, configure a new MACs list */ + if (netdev_mc_count(dev)) { + rc = bnx2x_init_mcast_macs_list(bp, &rparam); + if (rc) { + BNX2X_ERR("Failed to create multicast MACs list: %d\n", + rc); + return rc; + } + + /* Now add the new MACs */ + rc = bnx2x_config_mcast(bp, &rparam, + BNX2X_MCAST_CMD_ADD); + if (rc < 0) + BNX2X_ERR("Failed to set a new multicast configuration: %d\n", + rc); + + bnx2x_free_mcast_macs_list(&rparam); + } + + return rc; +} + /* If bp->state is OPEN, should be called with netif_addr_lock_bh() */ void bnx2x_set_rx_mode(struct net_device *dev) @@ -13493,57 +12399,55 @@ void bnx2x_set_rx_mode(struct net_device *dev) DP(NETIF_MSG_IFUP, "dev->flags = %x\n", bp->dev->flags); if (dev->flags & IFF_PROMISC) -#if defined(__VMKLNX__) +#if defined(__VMKLNX__) /* not BNX2X_UPSTREAM */ rx_mode = BNX2X_RX_MODE_ALLMULTI; -#else +#else /* BNX2X_UPSTREAM */ rx_mode = BNX2X_RX_MODE_PROMISC; #endif else if ((dev->flags & IFF_ALLMULTI) || ((netdev_mc_count(dev) > BNX2X_MAX_MULTICAST) && CHIP_IS_E1(bp))) rx_mode = BNX2X_RX_MODE_ALLMULTI; - else { /* some multicasts */ - struct bnx2x_mcast_ramrod_params rparam = {0}; - int rc; + else { + /* some multicasts */ + if (bnx2x_set_mc_list(bp) < 0) + rx_mode = BNX2X_RX_MODE_ALLMULTI; - rparam.mcast_obj = &bp->mcast_obj; - - /* first, clear all configured multicast MACs */ - rc = bnx2x_config_mcast(bp, &rparam, false); - if (rc) { - BNX2X_ERR("Failed to clear multicast " - "configuration: %d\n", rc); - return; - } - - /* then, configure a new MACs list */ - if (netdev_mc_count(dev)) { - rc = __init_mcast_macs_list(bp, &rparam); - if (rc) { - BNX2X_ERR("Failed to create multicast MACs " - "list: %d\n", rc); - return; - } - - /* Now add the new MACs */ - rc = bnx2x_config_mcast(bp, &rparam, true); - if (rc) - BNX2X_ERR("Failed to set a new multicast " - "configuration: %d\n", rc); - - __free_mcast_macs_list(&rparam); - } +#if (LINUX_VERSION_CODE > 0x020616) /* BNX2X_UPSTREAM */ + if (bnx2x_set_uc_list(bp) < 0) + rx_mode = BNX2X_RX_MODE_PROMISC; +#endif } bp->rx_mode = rx_mode; +#ifdef BCM_CNIC + /* handle ISCSI SD mode */ + if (IS_MF_ISCSI_SD(bp)) + bp->rx_mode = BNX2X_RX_MODE_NONE; +#endif +#ifdef BNX2X_ESX_CNA /* ! BNX2X_UPSTREAM */ + if (!NO_FCOE(bp) && (bp->rx_mode != BNX2X_RX_MODE_NONE)) { + bool start = BNX2X_IS_NETQ_RX_QUEUE_ACTIVE(bnx2x_fcoe_fp(bp)); + + int rc = bnx2x_set_fcoe_eth_rx_mode(bp, start); + /* + * Set a 'scheduled' bit for an ETH rx_mode if we have sent a + * ramrod for an FCoE. + */ + if (rc) { + set_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state); + return; + } + } +#endif /* Schedule the rx_mode command */ if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state)) { set_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state); return; } - bnx2x_set_storm_rx_mode(bp, false); + bnx2x_set_storm_rx_mode(bp); } /* called with rtnl_lock */ @@ -13577,8 +12481,9 @@ static int bnx2x_mdio_write(struct net_device *netdev, int prtad, int devad, struct bnx2x *bp = netdev_priv(netdev); int rc; - DP(NETIF_MSG_LINK, "mdio_write: prtad 0x%x, devad 0x%x, addr 0x%x," - " value 0x%x\n", prtad, devad, addr, value); + DP(NETIF_MSG_LINK, + "mdio_write: prtad 0x%x, devad 0x%x, addr 0x%x, value 0x%x\n", + prtad, devad, addr, value); /* The HW expects different devad if CL22 is used */ devad = (devad == MDIO_DEVAD_NONE) ? DEFAULT_PHY_DEV_ADDR : devad; @@ -13589,20 +12494,22 @@ static int bnx2x_mdio_write(struct net_device *netdev, int prtad, int devad, return rc; } - /* called with rtnl_lock */ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { struct bnx2x *bp = netdev_priv(dev); struct mii_ioctl_data *mdio = if_mii(ifr); - if (!netif_running(dev)) - return -EAGAIN; - DP(NETIF_MSG_LINK, "ioctl: phy id 0x%x, reg 0x%x, val_in 0x%x\n", mdio->phy_id, mdio->reg_num, mdio->val_in); - switch(cmd) { + if (!netif_running(dev)) + return -EAGAIN; + +#ifdef BNX2X_UPSTREAM /* BNX2X_UPSTREAM */ + return mdio_mii_ioctl(&bp->mdio, mdio, cmd); +#else + switch (cmd) { #if defined(__VMKLNX__) && defined(VMWARE_ESX_DDK_VERSION) && (VMWARE_ESX_DDK_VERSION >= 40000) /* ! BNX2X_UPSTREAM */ #define SIOBNX2CIM (SIOCDEVPRIVATE + 0) case SIOBNX2CIM: @@ -13624,6 +12531,7 @@ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) default: return mdio_mii_ioctl(&bp->mdio, mdio, cmd); } +#endif /* BNX2X_UPSTREAM */ } #ifdef BNX2X_UPSTREAM /* BNX2X_UPSTREAM */ @@ -13643,11 +12551,16 @@ static void poll_bnx2x(struct net_device *dev) #endif #else /* HAVE_POLL_CONTROLLER is used in 2.4 kernels */ -#if (defined(HAVE_POLL_CONTROLLER) || defined(CONFIG_NET_POLL_CONTROLLER)) && !defined(__VMKLNX__) +#if (defined(HAVE_POLL_CONTROLLER) || defined(CONFIG_NET_POLL_CONTROLLER)) static void poll_bnx2x(struct net_device *dev) { struct bnx2x *bp = netdev_priv(dev); +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + if (!bp->poll_disable_fwdmp) + bnx2x_disable_esx_fwdmp(bp); + return; +#endif disable_irq(bp->pdev->irq); #if (LINUX_VERSION_CODE < 0x020613) && (VMWARE_ESX_DDK_VERSION < 40000) bnx2x_interrupt(bp->pdev->irq, dev, NULL); @@ -13659,45 +12572,62 @@ static void poll_bnx2x(struct net_device *dev) #endif #endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) /* BNX2X_UPSTREAM */ +static int bnx2x_validate_addr(struct net_device *dev) +{ + struct bnx2x *bp = netdev_priv(dev); + + if (!bnx2x_is_valid_ether_addr(bp, dev->dev_addr)) { + BNX2X_ERR("Non-valid Ethernet address\n"); + return -EADDRNOTAVAIL; + } + return 0; +} +#endif + #if (LINUX_VERSION_CODE >= 0x02061d) /* BNX2X_UPSTREAM */ static const struct net_device_ops bnx2x_netdev_ops = { .ndo_open = bnx2x_open, .ndo_stop = bnx2x_close, .ndo_start_xmit = bnx2x_start_xmit, -#if defined(BNX2X_SAFC) || (defined(BCM_CNIC) && defined(BNX2X_MULTI_QUEUE)) /* ! BNX2X_UPSTREAM */ +#if (defined(BCM_CNIC) && defined(BNX2X_MULTI_QUEUE)) /* BNX2X_UPSTREAM */ .ndo_select_queue = bnx2x_select_queue, #endif - .ndo_set_mac_address = bnx2x_change_mac_addr, .ndo_set_rx_mode = bnx2x_set_rx_mode, - .ndo_validate_addr = eth_validate_addr, + .ndo_set_mac_address = bnx2x_change_mac_addr, + .ndo_validate_addr = bnx2x_validate_addr, .ndo_do_ioctl = bnx2x_ioctl, .ndo_change_mtu = bnx2x_change_mtu, +#if (LINUX_VERSION_CODE >= 0x020627) /* BNX2X_UPSTREAM */ + .ndo_fix_features = bnx2x_fix_features, + .ndo_set_features = bnx2x_set_features, +#endif .ndo_tx_timeout = bnx2x_tx_timeout, -#ifdef BCM_VLAN +#ifdef BCM_VLAN /* ! BNX2X_UPSTREAM */ .ndo_vlan_rx_register = bnx2x_vlan_rx_register, #endif #ifdef CONFIG_NET_POLL_CONTROLLER -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ .ndo_poll_controller = poll_bnx2x, #endif +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + .ndo_setup_tc = bnx2x_setup_tc, +#endif + +#if defined(NETDEV_FCOE_WWNN) && defined(BCM_CNIC) + .ndo_fcoe_get_wwn = bnx2x_fcoe_get_wwn, #endif }; #endif -#if (defined(__VMKLNX__) || ((LINUX_VERSION_CODE >= 0x020622) && !defined(BNX2X_OLD_FCOE))) /* BNX2X_UPSTREAM */ +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ static inline int bnx2x_set_coherency_mask(struct bnx2x *bp) { struct device *dev = &bp->pdev->dev; if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) { bp->flags |= USING_DAC_FLAG; -#if defined(__VMKLNX__) - if (pci_set_consistent_dma_mask(bp->pdev, DMA_BIT_MASK(64)) != 0) { -#else if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) { -#endif - dev_err(dev, "dma_set_coherent_mask failed, " - "aborting\n"); + dev_err(dev, "dma_set_coherent_mask failed, aborting\n"); return -EIO; } } else if (dma_set_mask(dev, DMA_BIT_MASK(32)) != 0) { @@ -13715,8 +12645,7 @@ static inline int bnx2x_set_coherency_mask(struct bnx2x *bp) if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { bp->flags |= USING_DAC_FLAG; if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { - dev_err(&bp->pdev->dev, "pci_set_consistent_dma_mask" - " failed, aborting\n"); + dev_err(&bp->pdev->dev, "pci_set_consistent_dma_mask failed, aborting\n"); return -EIO; } } else if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { @@ -13735,6 +12664,10 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, { struct bnx2x *bp; int rc; + u32 pci_cfg_dword; + bool chip_is_e1x = (board_type == BCM57710 || + board_type == BCM57711 || + board_type == BCM57711E); #if (LINUX_VERSION_CODE < 0x020618) /* ! BNX2X_UPSTREAM */ SET_MODULE_OWNER(dev); @@ -13747,7 +12680,6 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, bp->dev = dev; bp->pdev = pdev; bp->flags = 0; - bp->pf_num = PCI_FUNC(pdev->devfn); rc = pci_enable_device(pdev); if (rc) { @@ -13764,8 +12696,16 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, } if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { - dev_err(&bp->pdev->dev, "Cannot find second PCI device" - " base address, aborting\n"); + dev_err(&bp->pdev->dev, "Cannot find second PCI device base address, aborting\n"); + rc = -ENODEV; + goto err_out_disable; + } + + pci_read_config_dword(pdev, PCICFG_REVISION_ID_OFFSET, &pci_cfg_dword); + if ((pci_cfg_dword & PCICFG_REVESION_ID_MASK) == + PCICFG_REVESION_ID_ERROR_VAL) { + pr_err("PCI device error, probably due to fan failure," + " aborting\n"); rc = -ENODEV; goto err_out_disable; } @@ -13798,10 +12738,8 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, goto err_out_release; } - bp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); - if (bp->pcie_cap == 0) { - dev_err(&bp->pdev->dev, - "Cannot find PCI Express capability, aborting\n"); + if (!pci_is_pcie(pdev)) { + dev_err(&bp->pdev->dev, "Not PCI Express, aborting\n"); rc = -EIO; goto err_out_release; } @@ -13829,34 +12767,56 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, goto err_out_release; } - bp->doorbells = ioremap_nocache(pci_resource_start(pdev, 2), - min_t(u64, BNX2X_DB_SIZE(bp), - pci_resource_len(pdev, 2))); - if (!bp->doorbells) { - dev_err(&bp->pdev->dev, - "Cannot map doorbell space, aborting\n"); - rc = -ENOMEM; - goto err_out_unmap; + /* In E1/E1H use pci device function given by kernel. + * In E2/E3 read physical function from ME register since these chips + * support Physical Device Assignment where kernel BDF maybe arbitrary + * (depending on hypervisor). + */ + if (chip_is_e1x) + bp->pf_num = PCI_FUNC(pdev->devfn); + else {/* chip is E2/3*/ + pci_read_config_dword(bp->pdev, + PCICFG_ME_REGISTER, &pci_cfg_dword); + bp->pf_num = (u8)((pci_cfg_dword & ME_REG_ABS_PF_NUM) >> + ME_REG_ABS_PF_NUM_SHIFT); } + BNX2X_DEV_INFO("me reg PF num: %d\n", bp->pf_num); bnx2x_set_power_state(bp, PCI_D0); /* clean indirect addresses */ pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, PCICFG_VENDOR_ID_OFFSET); - REG_WR(bp, PXP2_REG_PGL_ADDR_88_F0 + BP_PORT(bp)*16, 0); - REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F0 + BP_PORT(bp)*16, 0); - REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0 + BP_PORT(bp)*16, 0); - REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0 + BP_PORT(bp)*16, 0); + /* + * Clean the following indirect addresses for all functions since it + * is not used by the driver. + */ + REG_WR(bp, PXP2_REG_PGL_ADDR_88_F0, 0); + REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F0, 0); + REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0, 0); + REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0, 0); + + if (chip_is_e1x) { + REG_WR(bp, PXP2_REG_PGL_ADDR_88_F1, 0); + REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F1, 0); + REG_WR(bp, PXP2_REG_PGL_ADDR_90_F1, 0); + REG_WR(bp, PXP2_REG_PGL_ADDR_94_F1, 0); + } + + /* + * Enable internal target-read (in case we are probed after PF FLR). + * Must be done prior to any BAR read access. Only for 57712 and up + */ + if (!chip_is_e1x) + REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 1); /* Reset the load counter */ - bnx2x_clear_load_cnt(bp); + bnx2x_clear_load_status(bp); #if (LINUX_VERSION_CODE < 0x020618) || defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ dev->get_stats = bnx2x_get_stats; #endif dev->watchdog_timeo = TX_TIMEOUT; - dev->ethtool_ops = &bnx2x_ethtool_ops; #if (LINUX_VERSION_CODE >= 0x02061d) /* BNX2X_UPSTREAM */ dev->netdev_ops = &bnx2x_netdev_ops; @@ -13864,30 +12824,29 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, dev->hard_start_xmit = bnx2x_start_xmit; dev->open = bnx2x_open; dev->stop = bnx2x_close; +#if (LINUX_VERSION_CODE > 0x020616) + dev->set_rx_mode = bnx2x_set_rx_mode; +#else dev->set_multicast_list = bnx2x_set_rx_mode; +#endif dev->set_mac_address = bnx2x_change_mac_addr; dev->do_ioctl = bnx2x_ioctl; dev->change_mtu = bnx2x_change_mtu; dev->tx_timeout = bnx2x_tx_timeout; -#ifdef BCM_VLAN +#ifdef BCM_VLAN /* ! BNX2X_UPSTREAM */ dev->vlan_rx_register = bnx2x_vlan_rx_register; -#if (LINUX_VERSION_CODE < 0x020616) /* ! BNX2X_UPSTREAM */ +#if (LINUX_VERSION_CODE < 0x020616) dev->vlan_rx_kill_vid = bnx2x_vlan_rx_kill_vid; #endif #endif #if defined(HAVE_POLL_CONTROLLER) || defined(CONFIG_NET_POLL_CONTROLLER) -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ dev->poll_controller = poll_bnx2x; #endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) + dev->validate_addr = bnx2x_validate_addr; #endif #endif - dev->features |= NETIF_F_SG; - dev->features |= NETIF_F_HW_CSUM; - if (bp->flags & USING_DAC_FLAG) - dev->features |= NETIF_F_HIGHDMA; -#ifdef NETIF_F_TSO /* BNX2X_UPSTREAM */ - dev->features |= (NETIF_F_TSO | NETIF_F_TSO_ECN); -#endif + bnx2x_set_ethtool_ops(dev); #ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ /* @@ -13899,31 +12858,53 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, /* dev->features |= NETIF_F_RDONLYINETHDRS; */ #endif /* NETIF_F_RDONLYINETHDRS */ #endif +#if (LINUX_VERSION_CODE < 0x020627) /* non BNX2X_UPSTREAM */ + dev->features |= NETIF_F_SG; +#if (LINUX_VERSION_CODE >= 0x020617) + dev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; +#else + dev->features |= NETIF_F_HW_CSUM; +#endif + if (bp->flags & USING_DAC_FLAG) + dev->features |= NETIF_F_HIGHDMA; +#ifdef NETIF_F_TSO + dev->features |= (NETIF_F_TSO | NETIF_F_TSO_ECN); +#endif -#ifdef NETIF_F_TSO6 /* BNX2X_UPSTREAM */ +#ifdef NETIF_F_TSO6 dev->features |= NETIF_F_TSO6; #endif -#ifdef BCM_VLAN +#if defined(BCM_VLAN) || !defined(OLD_VLAN) dev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX); -#if 0 - /* VLAN filtering is enabled for chips 57712 and newer */ - switch (board_type) { - case BCM57712: - case BCM57712E: - case BCM57713: - case BCM57713E: - dev->features |= NETIF_F_HW_VLAN_FILTER; - } -#endif -#if (LINUX_VERSION_CODE >= 0x02061a) /* BNX2X_UPSTREAM */ +#if (LINUX_VERSION_CODE >= 0x02061a) dev->vlan_features |= NETIF_F_SG; - dev->vlan_features |= NETIF_F_HW_CSUM; + dev->vlan_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; if (bp->flags & USING_DAC_FLAG) dev->vlan_features |= NETIF_F_HIGHDMA; dev->vlan_features |= (NETIF_F_TSO | NETIF_F_TSO_ECN); dev->vlan_features |= NETIF_F_TSO6; #endif +#endif +#else /* BNX2X_UPSTREAM */ + dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | + NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6 | + NETIF_F_RXCSUM | NETIF_F_LRO | NETIF_F_GRO | + NETIF_F_HW_VLAN_TX; + + dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | + NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6 | NETIF_F_HIGHDMA; + + dev->features |= dev->hw_features | NETIF_F_HW_VLAN_RX; + if (bp->flags & USING_DAC_FLAG) + dev->features |= NETIF_F_HIGHDMA; + + /* Add Loopback capability to the device */ + dev->hw_features |= NETIF_F_LOOPBACK; +#endif /* 0x020627 */ + +#ifdef BCM_DCBNL + dev->dcbnl_ops = &bnx2x_dcbnl_ops; #endif /* get_port_hwinfo() will set prtad and mmds properly */ @@ -13936,16 +12917,6 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, return 0; -err_out_unmap: - if (bp->regview) { - iounmap(bp->regview); - bp->regview = NULL; - } - if (bp->doorbells) { - iounmap(bp->doorbells); - bp->doorbells = NULL; - } - err_out_release: #if (LINUX_VERSION_CODE >= 0x020614) /* BNX2X_UPSTREAM */ if (atomic_read(&pdev->enable_cnt) == 1) @@ -13972,7 +12943,7 @@ static void __devinit bnx2x_get_pcie_width_speed(struct bnx2x *bp, } #if defined(BNX2X_UPSTREAM) && !defined(BNX2X_USE_INIT_VALUES) /* BNX2X_UPSTREAM */ -static int __devinit bnx2x_check_firmware(struct bnx2x *bp) +static int bnx2x_check_firmware(struct bnx2x *bp) { const struct firmware *firmware = bp->firmware; struct bnx2x_fw_file_hdr *fw_hdr; @@ -13982,8 +12953,10 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp) int i; const u8 *fw_ver; - if (firmware->size < sizeof(struct bnx2x_fw_file_hdr)) + if (firmware->size < sizeof(struct bnx2x_fw_file_hdr)) { + BNX2X_ERR("Wrong FW size\n"); return -EINVAL; + } fw_hdr = (struct bnx2x_fw_file_hdr *)firmware->data; sections = (struct bnx2x_fw_file_section *)fw_hdr; @@ -13994,8 +12967,7 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp) offset = be32_to_cpu(sections[i].offset); len = be32_to_cpu(sections[i].len); if (offset + len > firmware->size) { - dev_err(&bp->pdev->dev, - "Section %d length is out of bounds\n", i); + BNX2X_ERR("Section %d length is out of bounds\n", i); return -EINVAL; } } @@ -14007,8 +12979,7 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp) for (i = 0; i < be32_to_cpu(fw_hdr->init_ops_offsets.len) / 2; i++) { if (be16_to_cpu(ops_offsets[i]) > num_ops) { - dev_err(&bp->pdev->dev, - "Section offset %d is out of bounds\n", i); + BNX2X_ERR("Section offset %d is out of bounds\n", i); return -EINVAL; } } @@ -14020,8 +12991,7 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp) (fw_ver[1] != BCM_5710_FW_MINOR_VERSION) || (fw_ver[2] != BCM_5710_FW_REVISION_VERSION) || (fw_ver[3] != BCM_5710_FW_ENGINEERING_VERSION)) { - dev_err(&bp->pdev->dev, - "Bad FW version:%d.%d.%d.%d. Should be %d.%d.%d.%d\n", + BNX2X_ERR("Bad FW version:%d.%d.%d.%d. Should be %d.%d.%d.%d\n", fw_ver[0], fw_ver[1], fw_ver[2], fw_ver[3], BCM_5710_FW_MAJOR_VERSION, BCM_5710_FW_MINOR_VERSION, @@ -14061,6 +13031,30 @@ static inline void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n) } } +/** + * IRO array is stored in the following format: + * {base(24bit), m1(16bit), m2(16bit), m3(16bit), size(16bit) } + */ +static inline void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n) +{ + const __be32 *source = (const __be32 *)_source; + struct iro *target = (struct iro *)_target; + u32 i, j, tmp; + + for (i = 0, j = 0; i < n/sizeof(struct iro); i++) { + target[i].base = be32_to_cpu(source[j]); + j++; + tmp = be32_to_cpu(source[j]); + target[i].m1 = (tmp >> 16) & 0xffff; + target[i].m2 = tmp & 0xffff; + j++; + tmp = be32_to_cpu(source[j]); + target[i].m3 = (tmp >> 16) & 0xffff; + target[i].size = tmp & 0xffff; + j++; + } +} + static inline void be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n) { const __be16 *source = (const __be16 *)_source; @@ -14075,42 +13069,46 @@ static inline void be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n) do { \ u32 len = be32_to_cpu(fw_hdr->arr.len); \ bp->arr = kmalloc(len, GFP_KERNEL); \ - if (!bp->arr) { \ - pr_err("Failed to allocate %d bytes for "#arr"\n", len); \ + if (!bp->arr) \ goto lbl; \ - } \ func(bp->firmware->data + be32_to_cpu(fw_hdr->arr.offset), \ (u8 *)bp->arr, len); \ } while (0) -static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev) +static int bnx2x_init_firmware(struct bnx2x *bp) { - const char *fw_file_name; struct bnx2x_fw_file_hdr *fw_hdr; int rc; - if (CHIP_IS_E1(bp)) - fw_file_name = FW_FILE_NAME_E1; - else if (CHIP_IS_E1H(bp)) - fw_file_name = FW_FILE_NAME_E1H; - else if (CHIP_IS_E2(bp)) - fw_file_name = FW_FILE_NAME_E2; - else { - dev_err(dev, "Unsupported chip revision\n"); - return -EINVAL; - } - dev_info(dev, "Loading %s\n", fw_file_name); + if (!bp->firmware) { + const char *fw_file_name; - rc = request_firmware(&bp->firmware, fw_file_name, dev); - if (rc) { - dev_err(dev, "Can't load firmware file %s\n", fw_file_name); - goto request_firmware_exit; - } + if (CHIP_IS_E1(bp)) + fw_file_name = FW_FILE_NAME_E1; + else if (CHIP_IS_E1H(bp)) + fw_file_name = FW_FILE_NAME_E1H; + else if (!CHIP_IS_E1x(bp)) + fw_file_name = FW_FILE_NAME_E2; + else { + BNX2X_ERR("Unsupported chip revision\n"); + return -EINVAL; + } - rc = bnx2x_check_firmware(bp); - if (rc) { - dev_err(dev, "Corrupt firmware file %s\n", fw_file_name); - goto request_firmware_exit; + BNX2X_DEV_INFO("Loading %s\n", fw_file_name); + + rc = request_firmware(&bp->firmware, fw_file_name, + &bp->pdev->dev); + if (rc) { + BNX2X_ERR("Can't load firmware file %s\n", + fw_file_name); + goto request_firmware_exit; + } + + rc = bnx2x_check_firmware(bp); + if (rc) { + BNX2X_ERR("Corrupt firmware file %s\n", fw_file_name); + goto request_firmware_exit; + } } fw_hdr = (struct bnx2x_fw_file_hdr *)bp->firmware->data; @@ -14143,9 +13141,13 @@ static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev) be32_to_cpu(fw_hdr->csem_int_table_data.offset); INIT_CSEM_PRAM_DATA(bp) = bp->firmware->data + be32_to_cpu(fw_hdr->csem_pram_data.offset); + /* IRO */ + BNX2X_ALLOC_AND_SET(iro_arr, iro_alloc_err, bnx2x_prep_iro); return 0; +iro_alloc_err: + kfree(bp->init_ops_offsets); init_offsets_alloc_err: kfree(bp->init_ops); init_ops_alloc_err: @@ -14156,38 +13158,82 @@ request_firmware_exit: return rc; } +static void bnx2x_release_firmware(struct bnx2x *bp) +{ + kfree(bp->init_ops_offsets); + kfree(bp->init_ops); + kfree(bp->init_data); + release_firmware(bp->firmware); + bp->firmware = NULL; +} + #else -static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev) +static int bnx2x_init_firmware(struct bnx2x *bp) { if (CHIP_IS_E1(bp)) { - bnx2x_init_e1_firmware(bp); - bp->iro_arr = e1_iro_arr; + bnx2x_init_e1_firmware(bp); + bp->iro_arr = e1_iro_arr; } else if (CHIP_IS_E1H(bp)) { - bnx2x_init_e1h_firmware(bp); - bp->iro_arr = e1h_iro_arr; - } else if (CHIP_IS_E2(bp)) { - bnx2x_init_e2_firmware(bp); - bp->iro_arr = e2_iro_arr; + bnx2x_init_e1h_firmware(bp); + bp->iro_arr = e1h_iro_arr; + } else if (!CHIP_IS_E1x(bp)) { + bnx2x_init_e2_firmware(bp); + bp->iro_arr = e2_iro_arr; } else { - dev_err(dev, "Unsupported chip revision\n"); + BNX2X_ERR("Unsupported chip revision\n"); return -EINVAL; } return 0; } + +static void bnx2x_release_firmware(struct bnx2x *bp) +{ + /* Do nothing */ + return; +} #endif -/* must be called after sriov-enable */ -static inline int bnx2x_set_qm_cid_count(struct bnx2x* bp, int l2_cid_count) +static struct bnx2x_func_sp_drv_ops bnx2x_func_sp_drv = { + .init_hw_cmn_chip = bnx2x_init_hw_common_chip, + .init_hw_cmn = bnx2x_init_hw_common, + .init_hw_port = bnx2x_init_hw_port, + .init_hw_func = bnx2x_init_hw_func, + + .reset_hw_cmn = bnx2x_reset_common, + .reset_hw_port = bnx2x_reset_port, + .reset_hw_func = bnx2x_reset_func, + + .gunzip_init = bnx2x_gunzip_init, + .gunzip_end = bnx2x_gunzip_end, + + .init_fw = bnx2x_init_firmware, + .release_fw = bnx2x_release_firmware, +}; + +void bnx2x__init_func_obj(struct bnx2x *bp) { - int cid_count = L2_FP_COUNT(l2_cid_count); + /* Prepare DMAE related driver resources */ + bnx2x_setup_dmae(bp); + + bnx2x_init_func_obj(bp, &bp->func_obj, + bnx2x_sp(bp, func_rdata), + bnx2x_sp_mapping(bp, func_rdata), + bnx2x_sp(bp, func_afex_rdata), + bnx2x_sp_mapping(bp, func_afex_rdata), + &bnx2x_func_sp_drv); +} + +/* must be called after sriov-enable */ +static inline int bnx2x_set_qm_cid_count(struct bnx2x *bp) +{ + int cid_count = BNX2X_L2_MAX_CID(bp); #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ if (IS_SRIOV(bp)) cid_count += BNX2X_VF_CIDS; #endif - #ifdef BCM_CNIC cid_count += CNIC_CID_MAX; #endif @@ -14195,23 +13241,33 @@ static inline int bnx2x_set_qm_cid_count(struct bnx2x* bp, int l2_cid_count) } /** - * Returns the size of the MSI-X table. + * bnx2x_get_num_none_def_sbs - return the number of none default SBs * - * @param dev + * @dev: pci device * - * @return size of the MSI-X table of the given device */ -static inline int __pci_msix_table_size(struct pci_dev *pdev) +static inline int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev) { int pos; u16 control; pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); - if (!pos) - return 0; + /* + * If MSI-X is not supported - return number of SBs needed to support + * one fast path queue: one FP queue + SB for CNIC + */ + if (!pos) + return 1 + CNIC_PRESENT; + + /* + * The value in the PCI configuration space is the index of the last + * entry, namely one less than the actual size of the table, which is + * exactly what we want to return from this function: number of all SBs + * without the default SB. + */ pci_read_config_word(pdev, pos + PCI_MSI_FLAGS, &control); - return (control & PCI_MSIX_FLAGS_QSIZE) + 1; + return control & PCI_MSIX_FLAGS_QSIZE; } static int __devinit bnx2x_init_one(struct pci_dev *pdev, @@ -14220,68 +13276,151 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, struct net_device *dev = NULL; struct bnx2x *bp; int pcie_width, pcie_speed; - int rc, cid_count; + int rc, max_non_def_sbs; + int rx_count, tx_count, rss_count, doorbell_size; +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + static int index; +#endif + /* + * An estimated maximum supported CoS number according to the chip + * version. + * We will try to roughly estimate the maximum number of CoSes this chip + * may support in order to minimize the memory allocated for Tx + * netdev_queue's. This number will be accurately calculated during the + * initialization of bp->max_cos based on the chip versions AND chip + * revision in the bnx2x_init_bp(). + */ + u8 max_cos_est = 1; switch (ent->driver_data) { case BCM57710: case BCM57711: case BCM57711E: +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + max_cos_est = BNX2X_MULTI_TX_COS_E1X; + break; +#endif + case BCM57712: - case BCM57712E: - case BCM57713: - case BCM57713E: - /* The size requested for the MSI-X table corresponds to the - * actual amount of avaliable IGU/HC status blocks. It includes - * the default SB vector but we want cid_count to contain the - * amount of only non-default SBs, that's what '-1' stands for. - */ - cid_count = __pci_msix_table_size(pdev) - 1; - WARN_ON(!cid_count); + case BCM57712_MF: +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + max_cos_est = BNX2X_MULTI_TX_COS_E2_E3A0; + break; +#endif + + case BCM57800: + case BCM57800_MF: + case BCM57810: + case BCM57810_MF: + case BCM57840: + case BCM57840_MF: + case BCM57811: + case BCM57811_MF: +#ifdef BCM_MULTI_COS /* BNX2X_UPSTREAM */ + max_cos_est = BNX2X_MULTI_TX_COS_E3B0; +#endif break; default: pr_err("Unknown board_type (%ld), aborting\n", ent->driver_data); - return ENODEV; + return -ENODEV; } - dev_info(&pdev->dev, "cid_count=%d\n", cid_count); +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 23)) /* BNX2X_UPSTREAM */ + /* + * The workaround will allow to HW properly handle the cases + * when device was not closed but started initialization process. + * This delay will cause to reset only the functions that belong + * to this OS in virtualized environment and also properly suits + * MF-modes. + */ + if (reset_devices) + msleep(5000); +#endif - cid_count += FCOE_CONTEXT_USE + OOO_TX_CONTEXT_USE; + max_non_def_sbs = bnx2x_get_num_non_def_sbs(pdev); + + /* The workaround below is to avoid allocation of more than 128 KB of + * contigious physical memory, specifically for the FP structure which + * is more than 4KB size each. + * In future versions we will minimize FP parts which are allocated + * as contigious physical memory, and then this workaround will be + * removed. + */ + max_non_def_sbs = min_t(int, FP_SB_MAX_E1x, max_non_def_sbs); + + WARN_ON(!max_non_def_sbs); + + /* Maximum number of RSS queues: one IGU SB goes to CNIC */ + rss_count = max_non_def_sbs - CNIC_PRESENT; + + /* Maximum number of netdev Rx queues: RSS + FCoE L2 */ + rx_count = rss_count + FCOE_PRESENT; +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + /* ... + OOO queue */ + rx_count += OOO_RX_CONTEXT_USE; +#endif + + /* + * Maximum number of netdev Tx queues: + * TSS queues * Maximum supported number of CoS + FCoE L2 + */ + tx_count = rss_count * max_cos_est + FCOE_PRESENT; /* dev zeroed in init_etherdev */ #ifdef BNX2X_MULTI_QUEUE /* BNX2X_UPSTREAM */ - dev = alloc_etherdev_mq(sizeof(*bp), cid_count); + dev = alloc_etherdev_mqs(sizeof(*bp), tx_count, rx_count); #else dev = alloc_etherdev(sizeof(*bp)); #endif - if (!dev) { - dev_err(&pdev->dev, "Cannot allocate net device\n"); + if (!dev) return -ENOMEM; - } - - /* We don't need a Tx queue for a CNIC and an OOO Rx-only ring, - * so update a cid_count after a netdev allocation. - */ - cid_count += CNIC_CONTEXT_USE + OOO_RX_CONTEXT_USE; bp = netdev_priv(dev); + + bp->igu_sb_cnt = max_non_def_sbs; bp->msg_enable = debug; - pci_set_drvdata(pdev, dev); - bp->l2_cid_count = cid_count; - rc = bnx2x_init_dev(pdev, dev, ent->driver_data); if (rc < 0) { free_netdev(dev); return rc; } + BNX2X_DEV_INFO("max_non_def_sbs %d\n", max_non_def_sbs); + + BNX2X_DEV_INFO("Allocated netdev with %d tx and %d rx queues\n", + tx_count, rx_count); +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + if (index < BNX2X_MAX_NIC) { + bnx2x_fwdmp_bp[index].bp = bp; + bnx2x_fwdmp_bp[index].disable_fwdmp = 0; + index++; + } +#endif + rc = bnx2x_init_bp(bp); if (rc) goto init_one_exit; + /* + * Map doorbels here as we need the real value of bp->max_cos which + * is initialized in bnx2x_init_bp(). + */ + doorbell_size = (rss_count * max_cos_est + NON_ETH_CONTEXT_USE + + CNIC_PRESENT) * (1 << BNX2X_DB_SHIFT); + bp->doorbells = ioremap_nocache(pci_resource_start(pdev, 2), + min_t(u64, doorbell_size, + pci_resource_len(pdev, 2))); + if (!bp->doorbells) { + dev_err(&bp->pdev->dev, + "Cannot map doorbell space, aborting\n"); + rc = -ENOMEM; + goto init_one_exit; + } + #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ /* enable SRIOV */ rc = bnx2x_iov_init_one(bp, int_mode, num_vfs); @@ -14289,14 +13428,43 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, goto init_one_exit; #endif /* calc qm_cid_count */ - bp->qm_cid_count = bnx2x_set_qm_cid_count(bp, cid_count); + bp->qm_cid_count = bnx2x_set_qm_cid_count(bp); - /* Set init arrays */ - rc = bnx2x_init_firmware(bp, &pdev->dev); - if (rc) { - dev_err(&pdev->dev, "Error loading firmware\n"); - goto init_one_exit; - } +#ifdef BCM_CNIC + /* disable FCOE L2 queue for E1x*/ +#if !defined(__VMKLNX__) || defined(BNX2X_ESX_CNA) /* BNX2X_UPSTREAM */ + if (CHIP_IS_E1x(bp)) + bp->flags |= NO_FCOE_FLAG; +#else + /* disable FCoE queue for ESX when ESX-CNA is not supported */ + bp->flags |= NO_FCOE_FLAG; +#endif + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (disable_iscsi_ooo) + bp->flags |= NO_ISCSI_OOO_FLAG; +#endif +#endif +#ifndef BCM_DCB /* ! BNX2X_UPSTREAM */ + bp->flags |= NO_FCOE_FLAG; +#endif + + /* Set bp->num_queues for MSI-X mode*/ + bnx2x_set_num_queues(bp); + + /* Configure interrupt mode: try to enable MSI-X/MSI if + * needed. + */ + bnx2x_set_int_mode(bp); + +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + /* configure priority to cos map acccording to pri_map module parameter + */ + bnx2x_init_multi_cos(bp); +#endif + + /* Add all NAPI objects */ + bnx2x_add_all_napi(bp); rc = register_netdev(dev); if (rc) { @@ -14305,15 +13473,6 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, } #ifdef BCM_CNIC - /* disable FCOE L2 queue for E1x*/ -#ifndef __VMKLNX__ /* BNX2X_UPSTREAM */ - if (CHIP_IS_E1x(bp)) - bp->flags |= NO_FCOE_FLAG; -#else - /* Always disable FCoE queue for ESX */ - bp->flags |= NO_FCOE_FLAG; -#endif - #if (LINUX_VERSION_CODE >= 0x02061f) && !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ if (!NO_FCOE(bp)) { /* Add storage MAC address */ @@ -14322,32 +13481,31 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, rtnl_unlock(); } #endif - - if (disable_iscsi_ooo) - bp->flags |= NO_ISCSI_OOO_FLAG; +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + bnx2x_cna_enable(bp, tx_count, rx_count); +#endif #endif - - /* Configure interupt mode: try to enable MSI-X/MSI if - * needed, set bp->num_queues appropriately. - */ - bnx2x_set_int_mode(bp); - - /* Add all NAPI objects */ - bnx2x_add_all_napi(bp); bnx2x_get_pcie_width_speed(bp, &pcie_width, &pcie_speed); - netdev_info(dev, "%s (%c%d) PCI-E x%d %s found at mem %lx," - " IRQ %d, ", board_info[ent->driver_data].name, - (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4), - pcie_width, - ((!CHIP_IS_E2(bp) && pcie_speed == 2) || - ( CHIP_IS_E2(bp) && pcie_speed == 1)) ? - "5GHz (Gen2)" : "2.5GHz", - dev->base_addr, bp->pdev->irq); #if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ - pr_cont("node addr %pM\n", dev->dev_addr); + BNX2X_DEV_INFO( + "%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM\n", + board_info[ent->driver_data].name, + (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4), + pcie_width, + ((!CHIP_IS_E2(bp) && pcie_speed == 2) || + (CHIP_IS_E2(bp) && pcie_speed == 1)) ? + "5GHz (Gen2)" : "2.5GHz", + dev->base_addr, bp->pdev->irq, dev->dev_addr); #else + BNX2X_DEV_INFO("%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d\n", + board_info[ent->driver_data].name, + (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4), + pcie_width, ((!CHIP_IS_E2(bp) && pcie_speed == 2) || + (CHIP_IS_E2(bp) && pcie_speed == 1)) ? + "5GHz (Gen2)" : "2.5GHz", + dev->base_addr, bp->pdev->irq); pr_cont("node addr "); { int i; @@ -14358,13 +13516,10 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, pr_cont("\n"); #endif #ifdef BNX2X_NETQ /* ! BNX2X_UPSTREAM */ - if (multi_mode != 0) { - VMKNETDDI_REGISTER_QUEUEOPS(dev, bnx2x_netqueue_ops); - printk(KERN_INFO "%s: VMware NetQueue Ops is registered\n", - dev->name); - } + VMKNETDDI_REGISTER_QUEUEOPS(dev, bnx2x_netqueue_ops); + printk(KERN_INFO "%s: VMware NetQueue Ops is registered\n", + dev->name); #endif - #ifdef BNX2X_PASSTHRU /* ! BNX2X_UPSTREAM */ if(IS_SRIOV(bp)) { VMK_REGISTER_PT_OPS(dev, bnx2x_pt_passthru_ops); @@ -14415,30 +13570,45 @@ static void __devexit bnx2x_remove_one(struct pci_dev *pdev) rtnl_unlock(); } #endif +#if defined(BNX2X_ESX_CNA) /* ! BNX2X_UPSTREAM */ + bnx2x_cna_disable(bp); #endif +#endif + +#ifdef BCM_DCBNL + /* Delete app tlvs from dcbnl */ + bnx2x_dcbnl_update_applist(bp, true); +#endif + unregister_netdev(dev); +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + /* + * Reset the bypass queues number - + * all should be cleaned up at this point and we want to delete all + * NAPIs which includes ALL ETH queues. + */ + bp->num_bypass_queues = 0; +#endif /* Delete all NAPI objects */ bnx2x_del_all_napi(bp); + /* Power on: we can't let PCI layer write to us while we are in D3 */ + bnx2x_set_power_state(bp, PCI_D0); + /* Disable MSI/MSI-X */ bnx2x_disable_msi(bp); + /* Power off */ + bnx2x_set_power_state(bp, PCI_D3hot); + #if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ /* Make sure RESET task is not scheduled before continuing */ - cancel_delayed_work_sync(&bp->reset_task); + cancel_delayed_work_sync(&bp->sp_rtnl_task); #else - cancel_delayed_work(&bp->reset_task); + cancel_delayed_work(&bp->sp_rtnl_task); flush_scheduled_work(); #endif - -#if defined(BNX2X_UPSTREAM) && !defined(BNX2X_USE_INIT_VALUES) /* BNX2X_UPSTREAM */ - kfree(bp->init_ops_offsets); - kfree(bp->init_ops); - kfree(bp->init_data); - release_firmware(bp->firmware); -#endif - #ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ bnx2x_iov_remove_one(bp); #endif @@ -14449,6 +13619,8 @@ static void __devexit bnx2x_remove_one(struct pci_dev *pdev) if (bp->doorbells) iounmap(bp->doorbells); + bnx2x_release_firmware(bp); + bnx2x_free_mem_bp(bp); free_netdev(dev); @@ -14471,17 +13643,24 @@ static int bnx2x_eeh_nic_unload(struct bnx2x *bp) bp->rx_mode = BNX2X_RX_MODE_NONE; +#ifdef BCM_CNIC + bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD); +#endif + /* Stop Tx */ + bnx2x_tx_disable(bp); + bnx2x_netif_stop(bp, 0); del_timer_sync(&bp->timer); - bp->stats_state = STATS_STATE_DISABLED; - DP(BNX2X_MSG_STATS, "stats_state - DISABLED\n"); + + bnx2x_stats_handle(bp, STATS_EVENT_STOP); /* Release IRQs */ bnx2x_free_irq(bp); /* Free SKBs, SGEs, TPA pool and driver internals */ bnx2x_free_skbs(bp); + for_each_rx_queue(bp, i) bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE); @@ -14500,29 +13679,10 @@ static void bnx2x_eeh_recover(struct bnx2x *bp) mutex_init(&bp->port.phy_mutex); - bp->common.shmem_base = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR); - bp->link_params.shmem_base = bp->common.shmem_base; - BNX2X_DEV_INFO("shmem offset is 0x%x\n", bp->common.shmem_base); - - if (!bp->common.shmem_base || - (bp->common.shmem_base < 0xA0000) || - (bp->common.shmem_base >= 0xC0000)) { - BNX2X_DEV_INFO("MCP not active\n"); - bp->flags |= NO_MCP_FLAG; - return; - } - val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]); if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) != (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) BNX2X_ERR("BAD MCP validity signature\n"); - - if (!BP_NOMCP(bp)) { - bp->fw_seq = - (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) & - DRV_MSG_SEQ_NUMBER_MASK); - BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq); - } } /** @@ -14640,7 +13800,7 @@ static struct pci_driver bnx2x_pci_driver = { static int __init bnx2x_init(void) { - int rc; + int ret; pr_info("%s", version); @@ -14649,58 +13809,124 @@ static int __init bnx2x_init(void) pr_err("Cannot create workqueue\n"); return -ENOMEM; } +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) + if (!disable_fw_dmp) { + VMK_ReturnStatus status; -#if (LINUX_VERSION_CODE < 0x02061e) && defined(BNX2X_MULTI_QUEUE) + bnx2x_fwdmp_va = kzalloc(DRV_DUMP_CRASH_DMP_BUF_SIZE_E3B0, + GFP_KERNEL); + if (!bnx2x_fwdmp_va) + pr_info("bnx2x: can't alloc mem for dump handler!\n"); + else { + status = vmklnx_dump_add_callback(BNX2X_DUMPNAME, + bnx2x_fwdmp_callback, + NULL, + BNX2X_DUMPNAME, + &bnx2x_fwdmp_dh); + if (status != VMK_OK) + pr_info("bnx2x: can't add dump handler (rc = 0x%x!)\n", + status); + } + } +#endif +#if (LINUX_VERSION_CODE < 0x02061e) && defined(BNX2X_MULTI_QUEUE) /* ! BNX2X_UPSTREAM */ get_random_bytes(&bnx2x_skb_tx_hashrnd, sizeof(bnx2x_skb_tx_hashrnd)); #endif - #if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ - rc = pci_register_driver(&bnx2x_pci_driver); + ret = pci_register_driver(&bnx2x_pci_driver); #else - rc = pci_module_init(&bnx2x_pci_driver); + ret = pci_module_init(&bnx2x_pci_driver); #endif #if (LINUX_VERSION_CODE >= 0x02060a) /* BNX2X_UPSTREAM */ - if (rc) { + if (ret) { pr_err("Cannot register driver\n"); destroy_workqueue(bnx2x_wq); } #endif - -#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) /* ! BNX2X_UPSTREAM */ +#if defined(BCM_CNIC) && defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) /* ! BNX2X_UPSTREAM */ +#if defined(BNX2X_INBOX) if (cnic_register_adapter("bnx2x", bnx2x_cnic_probe) == 0) +#else + if (cnic_register_adapter("bnx2x", bnx2x_cnic_probe2) == 0) +#endif registered_cnic_adapter = 1; else pr_err("Unable to register with CNIC adapter\n"); #endif /* defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) */ - - - - return rc; + return ret; } static void __exit bnx2x_cleanup(void) { -#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) /* ! BNX2X_UPSTREAM */ + struct list_head *pos, *q; +#if defined(__VMKLNX__) +#if (VMWARE_ESX_DDK_VERSION >= 55000) + if (bnx2x_fwdmp_dh) { + VMK_ReturnStatus status = + vmklnx_dump_delete_callback(bnx2x_fwdmp_dh); + if (status != VMK_OK) { + VMK_ASSERT(0); + } else { + pr_info("bnx2x: dump handler (%p) unregistered!\n", + bnx2x_fwdmp_dh); + } + } + kfree(bnx2x_fwdmp_va); + bnx2x_fwdmp_va = NULL; +#endif +#if (VMWARE_ESX_DDK_VERSION >= 50000) /* ! BNX2X_UPSTREAM */ if (registered_cnic_adapter) { cnic_register_cancel("bnx2x"); registered_cnic_adapter = 0; } +#endif #endif /* defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000) */ - pci_unregister_driver(&bnx2x_pci_driver); destroy_workqueue(bnx2x_wq); + + /* Free globablly allocated resources */ + list_for_each_safe(pos, q, &bnx2x_prev_list) { + struct bnx2x_prev_path_list *tmp = + list_entry(pos, struct bnx2x_prev_path_list, list); + list_del(pos); + kfree(tmp); + } +} + +void bnx2x_notify_link_changed(struct bnx2x *bp) +{ + REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_12 + BP_FUNC(bp)*sizeof(u32), 1); } module_init(bnx2x_init); module_exit(bnx2x_cleanup); #ifdef BCM_CNIC +/** + * bnx2x_set_iscsi_eth_mac_addr - set iSCSI MAC(s). + * + * @bp: driver handle + * @set: set or clear the CAM entry + * + * This function will wait until the ramdord completion returns. + * Return 0 if success, -ENODEV if ramrod doesn't return. + */ +static inline int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp) +{ + unsigned long ramrod_flags = 0; + + __set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + return bnx2x_set_mac_one(bp, bp->cnic_eth_dev.iscsi_mac, + &bp->iscsi_l2_mac_obj, true, + BNX2X_ISCSI_ETH_MAC, &ramrod_flags); +} /* count denotes the number of new completions we have seen */ static void bnx2x_cnic_sp_post(struct bnx2x *bp, int count) { struct eth_spe *spe; + int cxt_index, cxt_offset; #ifdef BNX2X_STOP_ON_ERROR if (unlikely(bp->panic)) @@ -14712,36 +13938,47 @@ static void bnx2x_cnic_sp_post(struct bnx2x *bp, int count) bp->cnic_spq_pending -= count; - for (;bp->cnic_kwq_pending; bp->cnic_kwq_pending--) { + for (; bp->cnic_kwq_pending; bp->cnic_kwq_pending--) { u16 type = (le16_to_cpu(bp->cnic_kwq_cons->hdr.type) & SPE_HDR_CONN_TYPE) >> SPE_HDR_CONN_TYPE_SHIFT; + u8 cmd = (le32_to_cpu(bp->cnic_kwq_cons->hdr.conn_and_cmd_data) + >> SPE_HDR_CMD_ID_SHIFT) & 0xff; /* Set validation for iSCSI L2 client before sending SETUP * ramrod */ if (type == ETH_CONNECTION_TYPE) { - u8 cmd = (le32_to_cpu(bp->cnic_kwq_cons-> - hdr.conn_and_cmd_data) >> - SPE_HDR_CMD_ID_SHIFT) & 0xff; - - if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP) - bnx2x_set_ctx_validation(&bp->context. - vcxt[BNX2X_ISCSI_ETH_CID].eth, - HW_CID(bp, BNX2X_ISCSI_ETH_CID)); + if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP) { + cxt_index = BNX2X_ISCSI_ETH_CID(bp) / + ILT_PAGE_CIDS; + cxt_offset = BNX2X_ISCSI_ETH_CID(bp) - + (cxt_index * ILT_PAGE_CIDS); + bnx2x_set_ctx_validation(bp, + &bp->context[cxt_index]. + vcxt[cxt_offset].eth, + BNX2X_ISCSI_ETH_CID(bp)); + } } - /* There may be not more than 8 L2 and COMMON SPEs and not more - * than 8 L5 SPEs in the air. + /* + * There may be not more than 8 L2, not more than 8 L5 SPEs + * and in the air. We also check that number of outstanding + * COMMON ramrods is not more than the EQ and SPQ can + * accommodate. */ - if ((type == NONE_CONNECTION_TYPE) || - (type == ETH_CONNECTION_TYPE)) { - if (!atomic_read(&bp->spq_left)) + if (type == ETH_CONNECTION_TYPE) { + if (!atomic_read(&bp->cq_spq_left)) break; else - atomic_dec(&bp->spq_left); + atomic_dec(&bp->cq_spq_left); + } else if (type == NONE_CONNECTION_TYPE) { + if (!atomic_read(&bp->eq_spq_left)) + break; + else + atomic_dec(&bp->eq_spq_left); } else if ((type == ISCSI_CONNECTION_TYPE) || - (type == FCOE_CONNECTION_TYPE)) { + (type == FCOE_CONNECTION_TYPE)) { if (bp->cnic_spq_pending >= bp->cnic_eth_dev.max_kwqe_pending) break; @@ -14756,7 +13993,7 @@ static void bnx2x_cnic_sp_post(struct bnx2x *bp, int count) spe = bnx2x_sp_get_next(bp); *spe = *bp->cnic_kwq_cons; - DP(NETIF_MSG_TIMER, "pending on SPQ %d, on KWQ %d count %d\n", + DP(BNX2X_MSG_SP, "pending on SPQ %d, on KWQ %d count %d\n", bp->cnic_spq_pending, bp->cnic_kwq_pending, count); if (bp->cnic_kwq_cons == bp->cnic_kwq_last) @@ -14775,10 +14012,18 @@ static int bnx2x_cnic_sp_queue(struct net_device *dev, int i; #ifdef BNX2X_STOP_ON_ERROR - if (unlikely(bp->panic)) + if (unlikely(bp->panic)) { + BNX2X_ERR("Can't post to SP queue while panic\n"); return -EIO; + } #endif + if ((bp->recovery_state != BNX2X_RECOVERY_DONE) && + (bp->recovery_state != BNX2X_RECOVERY_NIC_LOADING)) { + BNX2X_ERR("Handling parity error recovery. Try again later\n"); + return -EAGAIN; + } + spin_lock_bh(&bp->spq_lock); for (i = 0; i < count; i++) { @@ -14791,7 +14036,7 @@ static int bnx2x_cnic_sp_queue(struct net_device *dev, bp->cnic_kwq_pending++; - DP(NETIF_MSG_TIMER, "L5 SPQE %x %x %x:%x pos %d\n", + DP(BNX2X_MSG_SP, "L5 SPQE %x %x %x:%x pos %d\n", spe->hdr.conn_and_cmd_data, spe->hdr.type, spe->data.update_data_addr.hi, spe->data.update_data_addr.lo, @@ -14817,9 +14062,14 @@ static int bnx2x_cnic_ctl_send(struct bnx2x *bp, struct cnic_ctl_info *ctl) int rc = 0; mutex_lock(&bp->cnic_mutex); - c_ops = bp->cnic_ops; + c_ops = rcu_dereference_protected(bp->cnic_ops, + lockdep_is_held(&bp->cnic_mutex)); if (c_ops) +#if defined(__VMKLNX__) /* non BNX2X_UPSTREAM */ + VMKAPI_MODULE_CALL(c_ops->cnic_owner->moduleID, rc, c_ops->cnic_ctl, bp->cnic_data, ctl); +#else /* BNX2X_UPSTREAM */ rc = c_ops->cnic_ctl(bp->cnic_data, ctl); +#endif mutex_unlock(&bp->cnic_mutex); return rc; @@ -14833,7 +14083,11 @@ static int bnx2x_cnic_ctl_send_bh(struct bnx2x *bp, struct cnic_ctl_info *ctl) rcu_read_lock(); c_ops = rcu_dereference(bp->cnic_ops); if (c_ops) +#if defined(__VMKLNX__) /* non BNX2X_UPSTREAM */ + VMKAPI_MODULE_CALL(c_ops->cnic_owner->moduleID, rc, c_ops->cnic_ctl, bp->cnic_data, ctl); +#else /* BNX2X_UPSTREAM */ rc = c_ops->cnic_ctl(bp->cnic_data, ctl); +#endif rcu_read_unlock(); return rc; @@ -14853,7 +14107,7 @@ int bnx2x_cnic_notify(struct bnx2x *bp, int cmd) static void bnx2x_cnic_cfc_comp(struct bnx2x *bp, int cid, u8 err) { - struct cnic_ctl_info ctl; + struct cnic_ctl_info ctl = {0}; /* first we tell CNIC and only then we count this as a completion */ ctl.cmd = CNIC_CTL_COMPLETION_CMD; @@ -14864,16 +14118,41 @@ static void bnx2x_cnic_cfc_comp(struct bnx2x *bp, int cid, u8 err) bnx2x_cnic_sp_post(bp, 0); } -static int bnx2x_cnic_get_ooo_cqe(struct net_device *dev, - struct cnic_ooo_cqe *ooo_cqe); -static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, - struct net_device *dev); -static int bnx2x_cnic_comp_ooo_tx_pkts(struct net_device *dev); -static int bnx2x_cnic_reuse_ooo_pkt(struct sk_buff *skb, - struct net_device *dev); +#ifdef BNX2X_ESX_CNA /* ! BNX2X_UPSTREAM */ +int bnx2x_set_fcoe_eth_rx_mode(struct bnx2x *bp, bool start) +{ + unsigned long accept_flags = 0, ramrod_flags = 0; + u8 cl_id = bnx2x_fcoe(bp, cl_id); + int sched_state = BNX2X_FILTER_FCOE_ETH_STOP_SCHED; + + if (start) { + /* Start accepting on FCoE L2 ring */ + __set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_MULTICAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags); + + /* Clear STOP_PENDING bit if START is requested */ + clear_bit(BNX2X_FILTER_FCOE_ETH_STOP_SCHED, &bp->sp_state); + + sched_state = BNX2X_FILTER_FCOE_ETH_START_SCHED; + } else + /* Clear START_PENDING bit if STOP is requested */ + clear_bit(BNX2X_FILTER_FCOE_ETH_START_SCHED, &bp->sp_state); + + if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state)) { + set_bit(sched_state, &bp->sp_state); + return 0; + } else { + __set_bit(RAMROD_RX, &ramrod_flags); + bnx2x_set_q_rx_mode(bp, cl_id, 0, accept_flags, 0, + ramrod_flags); + return 1; + } +} +#endif /* Called with netif_addr_lock_bh() taken. - * Sets and rx_mode config for and iSCSI ETH client. + * Sets an rx_mode config for an iSCSI ETH client. * Doesn't block. * Completion should be checked outside. */ @@ -14885,25 +14164,43 @@ static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start) if (start) { /* Start accepting on iSCSI L2 ring. Accept all multicasts - * because it's the only way for UIO Client to accept - * multicasts (in non-promiscuous mode only one Client per + * because it's the only way for UIO Queue to accept + * multicasts (in non-promiscuous mode only one Queue per * function will receive multicast packets (leading in our * case). */ - set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &accept_flags); - set_bit(BNX2X_ACCEPT_BROADCAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_BROADCAST, &accept_flags); + __set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags); + + /* Clear STOP_PENDING bit if START is requested */ + clear_bit(BNX2X_FILTER_ISCSI_ETH_STOP_SCHED, &bp->sp_state); + sched_state = BNX2X_FILTER_ISCSI_ETH_START_SCHED; - } + } else + /* Clear START_PENDING bit if STOP is requested */ + clear_bit(BNX2X_FILTER_ISCSI_ETH_START_SCHED, &bp->sp_state); if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state)) set_bit(sched_state, &bp->sp_state); else { - set_bit(RAMROD_RX, &ramrod_flags); - bnx2x_set_cl_rx_mode(bp, cl_id, 0, accept_flags, ramrod_flags); + __set_bit(RAMROD_RX, &ramrod_flags); + bnx2x_set_q_rx_mode(bp, cl_id, 0, accept_flags, 0, + ramrod_flags); } } +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ +static int bnx2x_cnic_get_ooo_cqe(struct net_device *dev, + struct cnic_ooo_cqe *ooo_cqe); +static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, + struct net_device *dev); +static int bnx2x_cnic_comp_ooo_tx_pkts(struct net_device *dev); +static int bnx2x_cnic_reuse_ooo_pkt(struct sk_buff *skb, + struct net_device *dev); +#endif + static int bnx2x_drv_ctl(struct net_device *dev, struct drv_ctl_info *ctl) { struct bnx2x *bp = netdev_priv(dev); @@ -14927,11 +14224,23 @@ static int bnx2x_drv_ctl(struct net_device *dev, struct drv_ctl_info *ctl) /* rtnl_lock is held. */ case DRV_CTL_START_L2_CMD: { - /* Clear FCoE FIP and ALL ENODE MACs addresses first */ - bnx2x_del_fcoe_eth_macs(bp); + struct cnic_eth_dev *cp = &bp->cnic_eth_dev; + unsigned long sp_bits = 0; + + /* Configure the iSCSI classification object */ + bnx2x_init_mac_obj(bp, &bp->iscsi_l2_mac_obj, + cp->iscsi_l2_client_id, + cp->iscsi_l2_cid, BP_FUNC(bp), + bnx2x_sp(bp, mac_rdata), + bnx2x_sp_mapping(bp, mac_rdata), + BNX2X_FILTER_MAC_PENDING, + &bp->sp_state, BNX2X_OBJ_TYPE_RX, + &bp->macs_pool); /* Set iSCSI MAC address */ - bnx2x_set_iscsi_eth_mac_addr(bp, 1); + rc = bnx2x_set_iscsi_eth_mac_addr(bp); + if (rc) + break; mmiowb(); barrier(); @@ -14942,7 +14251,11 @@ static int bnx2x_drv_ctl(struct net_device *dev, struct drv_ctl_info *ctl) bnx2x_set_iscsi_eth_rx_mode(bp, true); netif_addr_unlock_bh(dev); - if (!bnx2x_wait_sp_comp(bp)) + /* bits to wait on */ + __set_bit(BNX2X_FILTER_RX_MODE_PENDING, &sp_bits); + __set_bit(BNX2X_FILTER_ISCSI_ETH_START_SCHED, &sp_bits); + + if (!bnx2x_wait_sp_comp(bp, sp_bits)) BNX2X_ERR("rx_mode completion timed out!\n"); break; @@ -14950,22 +14263,29 @@ static int bnx2x_drv_ctl(struct net_device *dev, struct drv_ctl_info *ctl) /* rtnl_lock is held. */ case DRV_CTL_STOP_L2_CMD: { + unsigned long sp_bits = 0; + /* Stop accepting on iSCSI L2 ring */ netif_addr_lock_bh(dev); bnx2x_set_iscsi_eth_rx_mode(bp, false); netif_addr_unlock_bh(dev); - if (!bnx2x_wait_sp_comp(bp)) + /* bits to wait on */ + __set_bit(BNX2X_FILTER_RX_MODE_PENDING, &sp_bits); + __set_bit(BNX2X_FILTER_ISCSI_ETH_STOP_SCHED, &sp_bits); + + if (!bnx2x_wait_sp_comp(bp, sp_bits)) BNX2X_ERR("rx_mode completion timed out!\n"); mmiowb(); barrier(); /* Unset iSCSI L2 MAC */ - bnx2x_set_iscsi_eth_mac_addr(bp, 0); + rc = bnx2x_del_all_macs(bp, &bp->iscsi_l2_mac_obj, + BNX2X_ISCSI_ETH_MAC, true); break; } - +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ case DRV_CTL_GET_OOO_CQE: rc = bnx2x_cnic_get_ooo_cqe(dev, ctl->data.ooo_cqe.cqe); break; @@ -14981,15 +14301,96 @@ static int bnx2x_drv_ctl(struct net_device *dev, struct drv_ctl_info *ctl) case DRV_CTL_REUSE_OOO_PKT: rc = bnx2x_cnic_reuse_ooo_pkt(ctl->data.pkt_desc.skb, dev); break; - +#endif case DRV_CTL_RET_L2_SPQ_CREDIT_CMD: { int count = ctl->data.credit.credit_count; smp_mb__before_atomic_inc(); - atomic_add(count, &bp->spq_left); + atomic_add(count, &bp->cq_spq_left); smp_mb__after_atomic_inc(); break; } +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ + case DRV_CTL_START_NPAR_CMD: + if (IS_MF_SI(bp) || IS_MF_AFEX(bp)) + bnx2x_set_mac_in_nig(bp, true, + bp->cnic_eth_dev.iscsi_mac, + BNX2X_LLH_CAM_ISCSI_ETH_LINE); + else { + BNX2X_ERR("Received START_NPAR_CMD in SD mode\n"); + rc = -EINVAL; + } + break; + + case DRV_CTL_STOP_NPAR_CMD: + if (IS_MF_SI(bp) || IS_MF_AFEX(bp)) + bnx2x_set_mac_in_nig(bp, false, + bp->cnic_eth_dev.iscsi_mac, + BNX2X_LLH_CAM_ISCSI_ETH_LINE); + else { + BNX2X_ERR("Received STOP_NPAR_CMD in SD mode\n"); + rc = -EINVAL; + } + + break; +#endif + + case DRV_CTL_ULP_REGISTER_CMD: { + int ulp_type = ctl->data.register_data.ulp_type; + + if (CHIP_IS_E3(bp)) { + int idx = BP_FW_MB_IDX(bp); + u32 cap = SHMEM2_RD(bp, drv_capabilities_flag[idx]); + int path = BP_PATH(bp); + int port = BP_PORT(bp); + int i; + u32 scratch_offset; + u32 *host_addr; + + /* first write capability to shmem2 */ + if (ulp_type == CNIC_ULP_ISCSI) + cap |= DRV_FLAGS_CAPABILITIES_LOADED_ISCSI; + else if (ulp_type == CNIC_ULP_FCOE) + cap |= DRV_FLAGS_CAPABILITIES_LOADED_FCOE; + SHMEM2_WR(bp, drv_capabilities_flag[idx], cap); + + if ((ulp_type != CNIC_ULP_FCOE) || + (!SHMEM2_HAS(bp, ncsi_oem_data_addr)) || + (!(bp->flags & BC_SUPPORTS_FCOE_FEATURES))) + break; + + /* if reached here - should write fcoe capabilities */ + scratch_offset = SHMEM2_RD(bp, ncsi_oem_data_addr); + if (!scratch_offset) + break; + scratch_offset += offsetof(struct glob_ncsi_oem_data, + fcoe_features[path][port]); + host_addr = (u32 *) &(ctl->data.register_data. + fcoe_features); + for (i = 0; i < sizeof(struct fcoe_capabilities); + i += 4) + REG_WR(bp, scratch_offset + i, + *(host_addr + i/4)); + } + break; + } + + case DRV_CTL_ULP_UNREGISTER_CMD: { + int ulp_type = ctl->data.ulp_type; + + if (CHIP_IS_E3(bp)) { + int idx = BP_FW_MB_IDX(bp); + u32 cap; + + cap = SHMEM2_RD(bp, drv_capabilities_flag[idx]); + if (ulp_type == CNIC_ULP_ISCSI) + cap &= ~DRV_FLAGS_CAPABILITIES_LOADED_ISCSI; + else if (ulp_type == CNIC_ULP_FCOE) + cap &= ~DRV_FLAGS_CAPABILITIES_LOADED_FCOE; + SHMEM2_WR(bp, drv_capabilities_flag[idx], cap); + } + break; + } default: BNX2X_ERR("unknown command %x\n", ctl->cmd); @@ -15011,10 +14412,10 @@ void bnx2x_setup_cnic_irq_info(struct bnx2x *bp) cp->drv_state &= ~CNIC_DRV_STATE_USING_MSIX; cp->irq_arr[0].irq_flags &= ~CNIC_IRQ_FL_MSIX; } - if (CHIP_IS_E2(bp)) - cp->irq_arr[0].status_blk = (void*)bp->cnic_sb.e2_sb; + if (!CHIP_IS_E1x(bp)) + cp->irq_arr[0].status_blk = (void *)bp->cnic_sb.e2_sb; else - cp->irq_arr[0].status_blk = (void*)bp->cnic_sb.e1x_sb; + cp->irq_arr[0].status_blk = (void *)bp->cnic_sb.e1x_sb; cp->irq_arr[0].status_blk_num = bnx2x_cnic_fw_sb_id(bp); cp->irq_arr[0].status_blk_num2 = bnx2x_cnic_igu_sb_id(bp); @@ -15025,17 +14426,31 @@ void bnx2x_setup_cnic_irq_info(struct bnx2x *bp) cp->num_irq = 2; } +void bnx2x_setup_cnic_info(struct bnx2x *bp) +{ + struct cnic_eth_dev *cp = &bp->cnic_eth_dev; + + + cp->ctx_tbl_offset = FUNC_ILT_BASE(BP_FUNC(bp)) + + bnx2x_cid_ilt_lines(bp); + cp->starting_cid = bnx2x_cid_ilt_lines(bp) * ILT_PAGE_CIDS; + cp->fcoe_init_cid = BNX2X_FCOE_ETH_CID(bp); + cp->iscsi_l2_cid = BNX2X_ISCSI_ETH_CID(bp); + + if (NO_ISCSI_OOO(bp)) + cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI_OOO; +} + static int bnx2x_register_cnic(struct net_device *dev, struct cnic_ops *ops, void *data) { struct bnx2x *bp = netdev_priv(dev); struct cnic_eth_dev *cp = &bp->cnic_eth_dev; - if (ops == NULL) + if (ops == NULL) { + BNX2X_ERR("NULL ops received\n"); return -EINVAL; - - if (atomic_read(&bp->intr_sem) != 0) - return -EBUSY; + } bp->cnic_kwq = kzalloc(PAGE_SIZE, GFP_KERNEL); if (!bp->cnic_kwq) @@ -15051,11 +14466,14 @@ static int bnx2x_register_cnic(struct net_device *dev, struct cnic_ops *ops, bp->cnic_data = data; cp->num_irq = 0; - cp->drv_state = CNIC_DRV_STATE_REGD; + cp->drv_state |= CNIC_DRV_STATE_REGD; +#ifdef BNX2X_UPSTREAM /* BNX2X_UPSTREAM */ + cp->iro_arr = bp->iro_arr; +#endif bnx2x_setup_cnic_irq_info(bp); - rcu_assign_pointer(bp->cnic_ops, ops); + RCU_INIT_POINTER(bp->cnic_ops, ops); return 0; } @@ -15067,26 +14485,36 @@ static int bnx2x_unregister_cnic(struct net_device *dev) mutex_lock(&bp->cnic_mutex); cp->drv_state = 0; - rcu_assign_pointer(bp->cnic_ops, NULL); -#if !defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ + RCU_INIT_POINTER(bp->cnic_ops, NULL); + mutex_unlock(&bp->cnic_mutex); +#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ synchronize_rcu(); #endif - mutex_unlock(&bp->cnic_mutex); kfree(bp->cnic_kwq); bp->cnic_kwq = NULL; return 0; } +#if defined(BNX2X_UPSTREAM) || defined(BNX2X_INBOX) /* BNX2X_UPSTREAM */ struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev) +#else +struct cnic_eth_dev *bnx2x_cnic_probe2(struct net_device *dev) +#endif { struct bnx2x *bp = netdev_priv(dev); struct cnic_eth_dev *cp = &bp->cnic_eth_dev; -#if !defined(BNX2X_UPSTREAM) /* ! BNX2X_UPSTREAM */ + /* If both iSCSI and FCoE are disabled - return NULL in + * order to indicate CNIC that it should not try to work + * with this device. + */ + if (NO_ISCSI(bp) && NO_FCOE(bp)) + return NULL; + +#if !defined(BNX2X_UPSTREAM) /* ! BNX2X_UPSTREAM */ cp->version = CNIC_ETH_DEV_VER; #endif - cp->drv_owner = THIS_MODULE; cp->chip_id = CHIP_ID(bp); cp->pdev = bp->pdev; @@ -15095,55 +14523,62 @@ struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev) #if RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,5) /* BNX2X_UPSTREAM */ cp->io_base2 = bp->doorbells; #endif +#endif +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ + cp->mf_mode = bp->mf_mode; +#if defined(BNX2X_ESX_CNA) + cp->cna_vlgrp = &bp->cna_vlgrp; +#endif #endif cp->max_kwqe_pending = 8; cp->ctx_blk_size = CDU_ILT_PAGE_SZ; - cp->ctx_tbl_offset = FUNC_ILT_BASE(BP_FUNC(bp)) + bnx2x_cid_ilt_lines(bp); + cp->ctx_tbl_offset = FUNC_ILT_BASE(BP_FUNC(bp)) + + bnx2x_cid_ilt_lines(bp); cp->ctx_tbl_len = CNIC_ILT_LINES; cp->starting_cid = bnx2x_cid_ilt_lines(bp) * ILT_PAGE_CIDS; cp->drv_submit_kwqes_16 = bnx2x_cnic_sp_queue; cp->drv_ctl = bnx2x_drv_ctl; cp->drv_register_cnic = bnx2x_register_cnic; cp->drv_unregister_cnic = bnx2x_unregister_cnic; - cp->fcoe_init_cid = BNX2X_FCOE_ETH_CID; + cp->fcoe_init_cid = BNX2X_FCOE_ETH_CID(bp); cp->iscsi_l2_client_id = bnx2x_cnic_eth_cl_id(bp, BNX2X_ISCSI_ETH_CL_ID_IDX); - cp->iscsi_l2_cid = BNX2X_ISCSI_ETH_CID; + cp->iscsi_l2_cid = BNX2X_ISCSI_ETH_CID(bp); if (NO_ISCSI_OOO(bp)) cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI_OOO; - /* Configure classification DBs */ - bnx2x_init_mac_obj(bp, &bp->iscsi_l2_mac_obj, cp->iscsi_l2_client_id, - cp->iscsi_l2_cid, BP_FUNC(bp), - bnx2x_sp(bp, mac_rdata), - bnx2x_sp_mapping(bp, mac_rdata), - BNX2X_FILTER_MAC_PENDING, - &bp->sp_state, BNX2X_OBJ_TYPE_RX, - &bp->macs_pool); + if (NO_ISCSI(bp)) + cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI; - DP(BNX2X_MSG_SP, "page_size %d, tbl_offset %d, tbl_lines %d, " - "starting cid %d\n", + if (NO_FCOE(bp)) + cp->drv_state |= CNIC_DRV_STATE_NO_FCOE; + + BNX2X_DEV_INFO( + "page_size %d, tbl_offset %d, tbl_lines %d, starting cid %d\n", cp->ctx_blk_size, cp->ctx_tbl_offset, cp->ctx_tbl_len, cp->starting_cid); - return cp; } -#if !(defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 50000)) /* BNX2X_UPSTREAM */ +#if defined(BNX2X_UPSTREAM) || defined(BNX2X_INBOX) /* BNX2X_UPSTREAM */ EXPORT_SYMBOL(bnx2x_cnic_probe); +#else +EXPORT_SYMBOL(bnx2x_cnic_probe2); #endif +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ /** + * bnx2x_cnic_get_ooo_cqe - get OOO CQE info. * - * @param dev - * @param ooo_cqe - pointer to the cnic_ooo_cqe to return the - * CQE info. * - * @return positive value if there are more BDs availiable - * 0 if no more avaliable BDs - * negative value if there was an error + * @dev: net device + * @ooo_cqe: pointer to the cnic_ooo_cqe to return the CQE info. + * + * Returns positive value if there are more BDs available + * 0 if no more available BDs + * negative value if there was an error */ static int bnx2x_cnic_get_ooo_cqe(struct net_device *dev, struct cnic_ooo_cqe *ooo_cqe) @@ -15185,7 +14620,7 @@ static int bnx2x_cnic_get_ooo_cqe(struct net_device *dev, if (sw_comp_cons != hw_comp_cons) { union eth_rx_cqe *cqe; - u8 cqe_fp_flags; + u8 cqe_fp_flags, cqe_fp_type; comp_ring_cons = RCQ_BD(sw_comp_cons); bd_prod = RX_BD(bd_prod); @@ -15193,16 +14628,18 @@ static int bnx2x_cnic_get_ooo_cqe(struct net_device *dev, cqe = &fp->rx_comp_ring[comp_ring_cons]; cqe_fp_flags = cqe->fast_path_cqe.type_error_flags; + cqe_fp_type = CQE_TYPE(cqe_fp_flags); - DP(NETIF_MSG_RX_STATUS, "CQE type %x err %x status %x" - " queue %x vlan %x len %u\n", CQE_TYPE(cqe_fp_flags), - cqe_fp_flags, cqe->fast_path_cqe.status_flags, + DP(NETIF_MSG_RX_STATUS, "CQE type %x err %x status %x queue %x vlan %x len %u\n", + cqe_fp_type, cqe_fp_flags, + cqe->fast_path_cqe.status_flags, le32_to_cpu(cqe->fast_path_cqe.rss_hash_result), le16_to_cpu(cqe->fast_path_cqe.vlan_tag), - le16_to_cpu(cqe->fast_path_cqe.pkt_len)); + le16_to_cpu(cqe->fast_path_cqe. + pkt_len_or_gro_seg_len)); /* is this a slowpath msg? */ - if (unlikely(CQE_TYPE(cqe_fp_flags))) { + if (unlikely(CQE_TYPE_SLOW(cqe_fp_type))) { ooo_cqe->cqe_type = OOO_RAMROD_CQE; ooo_cqe->u.ramrod_data.data.lo = cqe->ramrod_cqe.protocol_data.data_lo; @@ -15212,42 +14649,48 @@ static int bnx2x_cnic_get_ooo_cqe(struct net_device *dev, done = 1; /* this is an rx packet */ } else { - struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[bd_cons]; - struct sk_buff *skb = rx_buf->skb; - u8 pad; - u16 len; - - len = le16_to_cpu(cqe->fast_path_cqe.pkt_len); - pad = cqe->fast_path_cqe.placement_offset; + struct sw_rx_bd *rx_buf = + &fp->rx_buf_ring[bd_cons]; + struct sk_buff *skb; + u8 pad = cqe->fast_path_cqe.placement_offset; + u16 len = + le16_to_cpu(cqe->fast_path_cqe. + pkt_len_or_gro_seg_len); /* is this an error packet? */ - if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) { - DP(NETIF_MSG_RX_ERR, + if (unlikely(cqe_fp_flags & + ETH_RX_ERROR_FALGS)) { + DP(NETIF_MSG_RX_ERR | + NETIF_MSG_RX_STATUS, "ERROR flags %x rx packet %u\n", cqe_fp_flags, sw_comp_cons); fp->eth_q_stats.rx_err_discard_pkt++; - bnx2x_reuse_rx_skb(fp, bd_cons, bd_prod); - BUG(); - - /** Increment producers. In all cases - * appart from this one the producer - * is going to be updated in the - * bnx2x_cnic_reuse_ooo_pkt(). - */ - bd_prod = NEXT_RX_IDX(bd_prod); - bd_prod_fw = NEXT_RX_IDX(bd_prod_fw); - sw_comp_prod = - NEXT_RCQ_IDX(sw_comp_prod); - - goto next_rx; + goto reuse_rx; } +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + skb = build_skb(rx_buf->data); + if (unlikely(!skb)) { + BNX2X_ERR("Unable to alloc skb\n"); + fp->eth_q_stats.rx_skb_alloc_failed++; + goto reuse_rx; + } + pad += NET_SKB_PAD; +#else + skb = rx_buf->data; +#endif +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_single(&bp->pdev->dev, + dma_unmap_addr(rx_buf, mapping), + fp->rx_buf_size, + DMA_FROM_DEVICE); +#else pci_unmap_single(bp->pdev, pci_unmap_addr(rx_buf, mapping), - bp->rx_buf_size, + fp->rx_buf_size, PCI_DMA_FROMDEVICE); - +#endif ooo_cqe->cqe_type = OOO_BD_CQE; memcpy(ooo_cqe->u.cqe.raw_data, cqe->fast_path_cqe. @@ -15255,10 +14698,11 @@ static int bnx2x_cnic_get_ooo_cqe(struct net_device *dev, sizeof(ooo_cqe->u.cqe.raw_data)); ooo_cqe->u.cqe.pkt_desc = skb; - skb->protocol = eth_type_trans(skb, bp->dev); - - skb->ip_summed = CHECKSUM_NONE; +#if (LINUX_VERSION_CODE < 0x020627) /* non BNX2X_UPSTREAM */ if (bp->rx_csum) +#else /* BNX2X_UPSTREAM */ + if (bp->dev->features & NETIF_F_RXCSUM) +#endif if (unlikely(!BNX2X_RX_CSUM_OK(cqe))) { fp->eth_q_stats.hw_csum_err++; BNX2X_ERR("Got data BD with CSUM error\n"); @@ -15266,18 +14710,32 @@ static int bnx2x_cnic_get_ooo_cqe(struct net_device *dev, return -EINVAL; } + skb->protocol = eth_type_trans(skb, bp->dev); + + skb->ip_summed = CHECKSUM_NONE; + skb_reserve(skb, pad); skb_put(skb, len); -#ifdef BCM_VLAN - if ((bp->vlgrp != NULL) && - (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) & - PARSING_FLAGS_VLAN)) - __vlan_hwaccel_put_tag(skb, - le16_to_cpu(cqe->fast_path_cqe.vlan_tag)); -#endif + done = 1; + goto next_rx; +reuse_rx: + bnx2x_reuse_rx_data(fp, bd_cons, bd_prod); + + BUG(); + + /* + * Increment producers. In all cases + * apart from this one the producer + * is going to be updated in the + * bnx2x_cnic_reuse_ooo_pkt(). + */ + bd_prod = NEXT_RX_IDX(bd_prod); + bd_prod_fw = NEXT_RX_IDX(bd_prod_fw); + sw_comp_prod = + NEXT_RCQ_IDX(sw_comp_prod); next_rx: - rx_buf->skb = NULL; + rx_buf->data = NULL; bd_cons = NEXT_RX_IDX(bd_cons); rx_pkt++; } @@ -15305,16 +14763,18 @@ next_rx: } /** + * bnx2x_cnic_send_ooo_pkt - send OOO packet * - * @param skb - * @param dev + * @skb: sk_buff with the packet + * @dev: net_device * - * @return NETDEV_TX_OK if driver was successfully posted. + * Returns NETDEV_TX_OK if driver was successfully posted. */ static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, struct net_device *dev) { struct bnx2x *bp = netdev_priv(dev); struct bnx2x_fastpath *fp = bnx2x_fwd_fp(bp); + struct bnx2x_fp_txdata *txdata = bnx2x_fwd_txdata(fp); struct sw_tx_bd *tx_buf; struct eth_tx_start_bd *tx_start_bd; struct eth_tx_bd *tx_data_bd; @@ -15331,6 +14791,23 @@ static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, struct net_device *dev) return NETDEV_TX_BUSY; #endif + /* Map skb linear data for DMA */ +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + mapping = dma_map_single(&bp->pdev->dev, skb->data, + pkt_len, DMA_TO_DEVICE); +#else + mapping = pci_map_single(bp->pdev, skb->data, + pkt_len, PCI_DMA_TODEVICE); +#endif + +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { +#else + if (unlikely(dma_mapping_error(mapping))) { +#endif + BNX2X_ERR("DMA mappping error\n"); + return -ENOMEM; + } /** * Please read carefully! * First we have a "start BD", then there is a parsing BD and @@ -15339,13 +14816,13 @@ static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, struct net_device *dev) * * And above all, all pdb sizes are in words - NOT DWORDS! */ - pkt_prod = fp->tx_pkt_prod++; + pkt_prod = fp->txdata_ptr[0]->tx_pkt_prod++; - bd_prod = TX_BD(fp->tx_bd_prod); + bd_prod = TX_BD(txdata->tx_bd_prod); /* get a tx_buf and first BD */ - tx_buf = &fp->tx_buf_ring[TX_BD(pkt_prod)]; - tx_start_bd = &fp->tx_desc_ring[bd_prod].start_bd; + tx_buf = &txdata->tx_buf_ring[TX_BD(pkt_prod)]; + tx_start_bd = &txdata->tx_desc_ring[bd_prod].start_bd; tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; SET_FLAG(tx_start_bd->general_data, @@ -15357,38 +14834,30 @@ static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, struct net_device *dev) 1); /* remember the first BD of the packet */ - tx_buf->first_bd = fp->tx_bd_prod; + tx_buf->first_bd = txdata->tx_bd_prod; tx_buf->skb = skb; tx_buf->flags = 0; DP(NETIF_MSG_TX_QUEUED, "sending pkt %u @%p next_idx %u bd %u @%p\n", - pkt_prod, tx_buf, fp->tx_pkt_prod, bd_prod, tx_start_bd); + pkt_prod, tx_buf, txdata->tx_pkt_prod, bd_prod, tx_start_bd); -#ifdef BCM_VLAN - if ((bp->vlgrp != NULL) && vlan_tx_tag_present(skb)) { - tx_start_bd->vlan_or_ethertype = cpu_to_le16(vlan_tx_tag_get(skb)); - tx_start_bd->bd_flags.as_bitfield |= - (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT); - } else -#endif - tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod); + /* iSCSI OOO L2 Queue is never configured to do HW VLAN + * acceleration. + */ + tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod); /* turn on parsing and get a BD */ bd_prod = TX_BD(NEXT_TX_IDX(bd_prod)); - if (CHIP_IS_E2(bp)){ - pbd_e2 = &fp->tx_desc_ring[bd_prod].parse_bd_e2; + if (!CHIP_IS_E1x(bp)){ + pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2; memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2)); } else { - pbd_e1x = &fp->tx_desc_ring[bd_prod].parse_bd_e1x; + pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x; memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x)); } - /* Map skb linear data for DMA */ - mapping = pci_map_single(bp->pdev, skb->data, - pkt_len, PCI_DMA_TODEVICE); - /* Setup the data pointer of the first BD of the packet */ tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); @@ -15396,8 +14865,7 @@ static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, struct net_device *dev) tx_start_bd->nbd = cpu_to_le16(nbd); tx_start_bd->nbytes = cpu_to_le16(pkt_len); - DP(NETIF_MSG_TX_QUEUED, "first bd @%p addr (%x:%x) nbd %d" - " nbytes %d flags %x vlan %x\n", + DP(NETIF_MSG_TX_QUEUED, "first bd @%p addr (%x:%x) nbd %d nbytes %d flags %x vlan %x\n", tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo, le16_to_cpu(tx_start_bd->nbd), le16_to_cpu(tx_start_bd->nbytes), tx_start_bd->bd_flags.as_bitfield, le16_to_cpu(tx_start_bd->vlan_or_ethertype)); @@ -15416,8 +14884,7 @@ static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, struct net_device *dev) if (pbd_e1x) DP(NETIF_MSG_TX_QUEUED, - "PBD (E1X) @%p ip_data %x ip_hlen %u ip_id %u lso_mss %u" - " tcp_flags %x xsum %x seq %u hlen %u\n", + "PBD (E1X) @%p ip_data %x ip_hlen %u ip_id %u lso_mss %u tcp_flags %x xsum %x seq %u hlen %u\n", pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w, pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags, pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq, @@ -15440,20 +14907,20 @@ static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, struct net_device *dev) */ wmb(); - fp->tx_db.data.prod += nbd; + txdata->tx_db.data.prod += nbd; barrier(); - DOORBELL(bp, fp->cid, fp->tx_db.raw); + DOORBELL(bp, txdata->cid, txdata->tx_db.raw); mmiowb(); - fp->tx_bd_prod += nbd; + txdata->tx_bd_prod += nbd; #if (LINUX_VERSION_CODE < 0x02061f) /* ! BNX2X_UPSTREAM */ /* In kernels starting from 2.6.31 netdev layer does this */ dev->trans_start = jiffies; #endif - fp->tx_pkt++; + txdata->tx_pkt++; return NETDEV_TX_OK; } @@ -15462,22 +14929,24 @@ static int bnx2x_cnic_send_ooo_pkt(struct sk_buff *skb, struct net_device *dev) * return idx of last bd freed */ static u16 bnx2x_free_ooo_tx_pkt(struct bnx2x *bp, struct bnx2x_fastpath *fp, - u16 idx) + struct bnx2x_fp_txdata *txdata, u16 idx) { - struct sw_tx_bd *tx_buf = &fp->tx_buf_ring[idx]; + struct sw_tx_bd *tx_buf = &txdata->tx_buf_ring[idx]; struct eth_tx_start_bd *tx_start_bd; struct sk_buff *skb = tx_buf->skb; u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons; int nbd; - DP(BNX2X_MSG_OFF, "pkt_idx %d buff @(%p)->skb %p\n", - idx, tx_buf, skb); - /* unmap bd */ - DP(BNX2X_MSG_OFF, "free bd_idx %d\n", bd_idx); - tx_start_bd = &fp->tx_desc_ring[bd_idx].start_bd; + tx_start_bd = &txdata->tx_desc_ring[bd_idx].start_bd; + +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ + dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd), + BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE); +#else pci_unmap_single(bp->pdev, BD_UNMAP_ADDR(tx_start_bd), BD_UNMAP_LEN(tx_start_bd), PCI_DMA_TODEVICE); +#endif nbd = le16_to_cpu(tx_start_bd->nbd) - 1; #ifdef BNX2X_STOP_ON_ERROR @@ -15491,24 +14960,25 @@ static u16 bnx2x_free_ooo_tx_pkt(struct bnx2x *bp, struct bnx2x_fastpath *fp, tx_buf->skb = NULL; if (bnx2x_cnic_reuse_ooo_pkt(skb, bp->dev)) - DP(BNX2X_MSG_FP, "Failed to reuse a completed skb " - "at index %d", idx); + DP(NETIF_MSG_TX_DONE, + "Failed to reuse a completed skb at index %d", idx); return new_cons; } /** + * bnx2x_cnic_comp_ooo_tx_pkts - get number of transmitted packets. * - * @param dev + * @dev: net_device * - * @return number of transmited packets or negative value if - * there was an error. + * Returns negative value if there was an error. */ static int bnx2x_cnic_comp_ooo_tx_pkts(struct net_device *dev) { struct bnx2x *bp = netdev_priv(dev); struct bnx2x_fastpath *fp = bnx2x_fwd_fp(bp); - u16 hw_cons, sw_cons, bd_cons = fp->tx_bd_cons; + struct bnx2x_fp_txdata *txdata = bnx2x_fwd_txdata(fp); + u16 hw_cons, sw_cons, bd_cons = txdata->tx_bd_cons; int comp_pkts = 0; #ifdef BNX2X_STOP_ON_ERROR @@ -15516,25 +14986,24 @@ static int bnx2x_cnic_comp_ooo_tx_pkts(struct net_device *dev) return -1; #endif /* Ignore the first increment as it was due to ramrod completion */ - hw_cons = le16_to_cpu(*fp->tx_cons_sb) - 1; - sw_cons = fp->tx_pkt_cons; + hw_cons = le16_to_cpu(*txdata->tx_cons_sb); + sw_cons = txdata->tx_pkt_cons; while (sw_cons != hw_cons) { u16 pkt_cons; pkt_cons = TX_BD(sw_cons); - DP(NETIF_MSG_TX_DONE, "queue[%d]: hw_cons %u sw_cons %u " - " pkt_cons %u\n", + DP(NETIF_MSG_TX_DONE, "queue[%d]: hw_cons %u sw_cons %u pkt_cons %u\n", fp->index, hw_cons, sw_cons, pkt_cons); - bd_cons = bnx2x_free_ooo_tx_pkt(bp, fp, pkt_cons); + bd_cons = bnx2x_free_ooo_tx_pkt(bp, fp, txdata, pkt_cons); sw_cons++; comp_pkts++; } - fp->tx_pkt_cons = sw_cons; - fp->tx_bd_cons = bd_cons; + txdata->tx_pkt_cons = sw_cons; + txdata->tx_bd_cons = bd_cons; smp_mb(); return comp_pkts; @@ -15542,11 +15011,12 @@ static int bnx2x_cnic_comp_ooo_tx_pkts(struct net_device *dev) } /** + * bnx2x_cnic_reuse_ooo_pkt - reuse given packet. * - * @param skb - * @param dev + * @skb: sk_buff with the packet + * @dev: net_device * - * @return zero if the operation was successfull. + * Returns zero if the operation was successful. */ static int bnx2x_cnic_reuse_ooo_pkt(struct sk_buff *skb, struct net_device *dev) { @@ -15556,6 +15026,7 @@ static int bnx2x_cnic_reuse_ooo_pkt(struct sk_buff *skb, struct net_device *dev) u16 bd_prod_fw, sw_comp_prod; struct sw_rx_bd *rx_buf; struct eth_rx_bd *rx_bd; + u8 *data; bd_prod_fw = fp->rx_bd_prod; sw_comp_prod = fp->rx_comp_prod; @@ -15563,22 +15034,48 @@ static int bnx2x_cnic_reuse_ooo_pkt(struct sk_buff *skb, struct net_device *dev) rx_buf = &fp->rx_buf_ring[RX_BD(bd_prod_fw)]; rx_bd = &fp->rx_desc_ring[RX_BD(bd_prod_fw)]; +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + dev_kfree_skb(skb); + + data = kmalloc(fp->rx_buf_size + NET_SKB_PAD, GFP_ATOMIC); + if (data) + return -ENOMEM; +#else /* Reset a buffer length */ skb_trim(skb, 0); /* Reset a pad */ skb_reserve(skb, -skb_headroom(skb)); - mapping = pci_map_single(bp->pdev, skb->data, bp->rx_buf_size, - PCI_DMA_FROMDEVICE); -#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ - if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) -#else - if (unlikely(dma_mapping_error(mapping))) + data = skb->data; +#endif +#if (LINUX_VERSION_CODE >= 0x020622) /* BNX2X_UPSTREAM */ +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + mapping = dma_map_single(&bp->pdev->dev, + data + NET_SKB_PAD, + fp->rx_buf_size, DMA_FROM_DEVICE); +#else + mapping = dma_map_single(&bp->pdev->dev, data, fp->rx_buf_size, + DMA_FROM_DEVICE); +#endif +#else + mapping = pci_map_single(bp->pdev, data, fp->rx_buf_size, + PCI_DMA_FROMDEVICE); +#endif +#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ + if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) { +#else + if (unlikely(dma_mapping_error(mapping))) { #endif - return -ENOMEM; - rx_buf->skb = skb; + BNX2X_ERR("DMA mappping error\n"); + return -ENOMEM; + } +#ifdef BCM_HAS_BUILD_SKB /* BNX2X_UPSTREAM */ + rx_buf->data = data; +#else + rx_buf->data = skb; +#endif pci_unmap_addr_set(rx_buf, mapping, mapping); rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); @@ -15597,7 +15094,80 @@ static int bnx2x_cnic_reuse_ooo_pkt(struct sk_buff *skb, struct net_device *dev) return 0; } - +#endif /* BCM_OOO */ #endif /* BCM_CNIC */ +#if defined(__VMKLNX__) /* ! BNX2X_UPSTREAM */ +/* The following debug buffers and exported routines are used by GDB to access + * the NIC hardware registers when doing live debug over serial port. */ +#define DBG_BUF_SZ 128 +u32 bnx2x_dbg_buf[DBG_BUF_SZ]; + +void bnx2x_dbg_disable_blocks_parity(struct bnx2x *bp) +{ + bnx2x_disable_blocks_parity(bp); +} +EXPORT_SYMBOL(bnx2x_dbg_disable_blocks_parity); + +void bnx2x_dbg_enable_blocks_parity(struct bnx2x *bp) +{ + bnx2x_clear_blocks_parity(bp); + bnx2x_enable_blocks_parity(bp); +} +EXPORT_SYMBOL(bnx2x_dbg_clear_blocks_parity); + +void bnx2x_dbg_read32_ind(struct bnx2x *bp, u32 off, u32 len) +{ + u32 *buf = bnx2x_dbg_buf; + + if (len & 0x3) + len = (len + 3) & ~3; + if (len > DBG_BUF_SZ) + len = DBG_BUF_SZ; + + while (len > 0) { + *buf = bnx2x_reg_rd_ind(bp, off); + buf++; + off += 4; + len -= 4; + } +} +EXPORT_SYMBOL(bnx2x_dbg_read32_ind); + +static u32 bnx2x_dbg_read32_single(void __iomem *reg_view, u32 off) +{ + return readl(reg_view + off); +} + +void bnx2x_dbg_read32(void __iomem *reg_view, u32 off, u32 len) +{ + u32 *buf = bnx2x_dbg_buf; + + if (len & 0x3) + len = (len + 3) & ~3; + if (len > DBG_BUF_SZ) + len = DBG_BUF_SZ; + + while (len > 0) { + *buf = bnx2x_dbg_read32_single(reg_view, off); + buf++; + off += 4; + len -= 4; + } +} +EXPORT_SYMBOL(bnx2x_dbg_read32); + +void bnx2x_dbg_write32(void __iomem *reg_view, u32 off, u32 val) +{ + writel(val, reg_view + off); +} +EXPORT_SYMBOL(bnx2x_write32); + +void bnx2x_dbg_write32_ind(struct bnx2x *bp, u32 off, u32 val) +{ + bnx2x_reg_wr_ind(bp, off, val); +} +EXPORT_SYMBOL(bnx2x_dbg_write32_ind); + +#endif diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_mfw_req.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_mfw_req.h new file mode 100644 index 0000000..68c1f76 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_mfw_req.h @@ -0,0 +1,180 @@ +/* bnx2x_mfw_req.h: Broadcom Everest network driver. + * + * Copyright (c) 2012 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + */ + +#ifndef BNX2X_MFW_REQ_H +#define BNX2X_MFW_REQ_H + + +#define PORT_0 0 +#define PORT_1 1 +#define PORT_MAX 2 +#define NVM_PATH_MAX 2 + +/* FCoE capabilities required from the driver */ +struct fcoe_capabilities { + u32 capability1; + /* Maximum number of I/Os per connection */ + #define FCOE_IOS_PER_CONNECTION_MASK 0x0000ffff + #define FCOE_IOS_PER_CONNECTION_SHIFT 0 + /* Maximum number of Logins per port */ + #define FCOE_LOGINS_PER_PORT_MASK 0xffff0000 + #define FCOE_LOGINS_PER_PORT_SHIFT 16 + + u32 capability2; + /* Maximum number of exchanges */ + #define FCOE_NUMBER_OF_EXCHANGES_MASK 0x0000ffff + #define FCOE_NUMBER_OF_EXCHANGES_SHIFT 0 + /* Maximum NPIV WWN per port */ + #define FCOE_NPIV_WWN_PER_PORT_MASK 0xffff0000 + #define FCOE_NPIV_WWN_PER_PORT_SHIFT 16 + + u32 capability3; + /* Maximum number of targets supported */ + #define FCOE_TARGETS_SUPPORTED_MASK 0x0000ffff + #define FCOE_TARGETS_SUPPORTED_SHIFT 0 + /* Maximum number of outstanding commands across all connections */ + #define FCOE_OUTSTANDING_COMMANDS_MASK 0xffff0000 + #define FCOE_OUTSTANDING_COMMANDS_SHIFT 16 + + u32 capability4; + #define FCOE_CAPABILITY4_STATEFUL 0x00000001 + #define FCOE_CAPABILITY4_STATELESS 0x00000002 + #define FCOE_CAPABILITY4_CAPABILITIES_REPORTED_VALID 0x00000004 +}; + +struct glob_ncsi_oem_data +{ + u32 driver_version; + u32 unused[3]; + struct fcoe_capabilities fcoe_features[NVM_PATH_MAX][PORT_MAX]; +}; + +/* current drv_info version */ +#define DRV_INFO_CUR_VER 2 + +/* drv_info op codes supported */ +enum drv_info_opcode { + ETH_STATS_OPCODE, + FCOE_STATS_OPCODE, + ISCSI_STATS_OPCODE +}; + +#define ETH_STAT_INFO_VERSION_LEN 12 +/* Per PCI Function Ethernet Statistics required from the driver */ +struct eth_stats_info { + /* Function's Driver Version. padded to 12 */ + u8 version[ETH_STAT_INFO_VERSION_LEN]; + /* Locally Admin Addr. BigEndian EIU48. Actual size is 6 bytes */ + u8 mac_local[8]; + u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */ + u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */ + u32 mtu_size; /* MTU Size. Note : Negotiated MTU */ + u32 feature_flags; /* Feature_Flags. */ +#define FEATURE_ETH_CHKSUM_OFFLOAD_MASK 0x01 +#define FEATURE_ETH_LSO_MASK 0x02 +#define FEATURE_ETH_BOOTMODE_MASK 0x1C +#define FEATURE_ETH_BOOTMODE_SHIFT 2 +#define FEATURE_ETH_BOOTMODE_NONE (0x0 << 2) +#define FEATURE_ETH_BOOTMODE_PXE (0x1 << 2) +#define FEATURE_ETH_BOOTMODE_ISCSI (0x2 << 2) +#define FEATURE_ETH_BOOTMODE_FCOE (0x3 << 2) +#define FEATURE_ETH_TOE_MASK 0x20 + u32 lso_max_size; /* LSO MaxOffloadSize. */ + u32 lso_min_seg_cnt; /* LSO MinSegmentCount. */ + /* Num Offloaded Connections TCP_IPv4. */ + u32 ipv4_ofld_cnt; + /* Num Offloaded Connections TCP_IPv6. */ + u32 ipv6_ofld_cnt; + u32 promiscuous_mode; /* Promiscuous Mode. non-zero true */ + u32 txq_size; /* TX Descriptors Queue Size */ + u32 rxq_size; /* RX Descriptors Queue Size */ + /* TX Descriptor Queue Avg Depth. % Avg Queue Depth since last poll */ + u32 txq_avg_depth; + /* RX Descriptors Queue Avg Depth. % Avg Queue Depth since last poll */ + u32 rxq_avg_depth; + /* IOV_Offload. 0=none; 1=MultiQueue, 2=VEB 3= VEPA*/ + u32 iov_offload; + /* Number of NetQueue/VMQ Config'd. */ + u32 netq_cnt; + u32 vf_cnt; /* Num VF assigned to this PF. */ +}; + +/* Per PCI Function FCOE Statistics required from the driver */ +struct fcoe_stats_info { + u8 version[12]; /* Function's Driver Version. */ + u8 mac_local[8]; /* Locally Admin Addr. */ + u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */ + u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */ + /* QoS Priority (per 802.1p). 0-7255 */ + u32 qos_priority; + u32 txq_size; /* FCoE TX Descriptors Queue Size. */ + u32 rxq_size; /* FCoE RX Descriptors Queue Size. */ + /* FCoE TX Descriptor Queue Avg Depth. */ + u32 txq_avg_depth; + /* FCoE RX Descriptors Queue Avg Depth. */ + u32 rxq_avg_depth; + u32 rx_frames_lo; /* FCoE RX Frames received. */ + u32 rx_frames_hi; /* FCoE RX Frames received. */ + u32 rx_bytes_lo; /* FCoE RX Bytes received. */ + u32 rx_bytes_hi; /* FCoE RX Bytes received. */ + u32 tx_frames_lo; /* FCoE TX Frames sent. */ + u32 tx_frames_hi; /* FCoE TX Frames sent. */ + u32 tx_bytes_lo; /* FCoE TX Bytes sent. */ + u32 tx_bytes_hi; /* FCoE TX Bytes sent. */ + u32 rx_fcs_errors; /* number of receive packets with FCS errors */ + u32 rx_fc_crc_errors; /* number of FC frames with CRC errors*/ + u32 fip_login_failures; /* number of FCoE/FIP Login failures */ +}; + +/* Per PCI Function iSCSI Statistics required from the driver*/ +struct iscsi_stats_info { + u8 version[12]; /* Function's Driver Version. */ + u8 mac_local[8]; /* Locally Admin iSCSI MAC Addr. */ + u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */ + /* QoS Priority (per 802.1p). 0-7255 */ + u32 qos_priority; + + u8 initiator_name[64]; /* iSCSI Boot Initiator Node name. */ + + u8 ww_port_name[64]; /* iSCSI World wide port name */ + + u8 boot_target_name[64];/* iSCSI Boot Target Name. */ + + u8 boot_target_ip[16]; /* iSCSI Boot Target IP. */ + u32 boot_target_portal; /* iSCSI Boot Target Portal. */ + u8 boot_init_ip[16]; /* iSCSI Boot Initiator IP Address. */ + u32 max_frame_size; /* Max Frame Size. bytes */ + u32 txq_size; /* PDU TX Descriptors Queue Size. */ + u32 rxq_size; /* PDU RX Descriptors Queue Size. */ + + u32 txq_avg_depth; /*PDU TX Descriptor Queue Avg Depth. */ + u32 rxq_avg_depth; /*PDU RX Descriptors Queue Avg Depth. */ + u32 rx_pdus_lo; /* iSCSI PDUs received. */ + u32 rx_pdus_hi; /* iSCSI PDUs received. */ + + u32 rx_bytes_lo; /* iSCSI RX Bytes received. */ + u32 rx_bytes_hi; /* iSCSI RX Bytes received. */ + u32 tx_pdus_lo; /* iSCSI PDUs sent. */ + u32 tx_pdus_hi; /* iSCSI PDUs sent. */ + + u32 tx_bytes_lo; /* iSCSI PDU TX Bytes sent. */ + u32 tx_bytes_hi; /* iSCSI PDU TX Bytes sent. */ + u32 pcp_prior_map_tbl; /*C-PCP to S-PCP Priority MapTable. + 9 nibbles, the position of each nibble + represents the C-PCP value, the value + of the nibble = S-PCP value.*/ +}; + +union drv_info_to_mcp { + struct eth_stats_info ether_stat; + struct fcoe_stats_info fcoe_stat; + struct iscsi_stats_info iscsi_stat; +}; + +#endif /* BNX2X_MFW_REQ_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_reg.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_reg.h index 22b5d5c..737d93b 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_reg.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_reg.h @@ -1,6 +1,6 @@ /* bnx2x_reg.h: Broadcom Everest network driver. * - * Copyright (c) 2007-2010 Broadcom Corporation + * Copyright (c) 2007-2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -29,325 +29,164 @@ #define ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT (0x1<<3) #define ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR (0x1<<4) #define ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND (0x1<<1) -/* [RW 1] Initiate the ATC array - reset all the valid bits */ -#define ATC_REG_ATC_INIT_ARRAY 0x1100b8 /* [R 1] ATC initalization done */ #define ATC_REG_ATC_INIT_DONE 0x1100bc /* [RC 6] Interrupt register #0 read clear */ -#define ATC_REG_ATC_INT_STS_CLR 0x1101c0 +#define ATC_REG_ATC_INT_STS_CLR 0x1101c0 +/* [RW 5] Parity mask register #0 read/write */ +#define ATC_REG_ATC_PRTY_MASK 0x1101d8 +/* [RC 5] Parity register #0 read clear */ +#define ATC_REG_ATC_PRTY_STS_CLR 0x1101d0 /* [RW 19] Interrupt mask register #0 read/write */ #define BRB1_REG_BRB1_INT_MASK 0x60128 /* [R 19] Interrupt register #0 read */ #define BRB1_REG_BRB1_INT_STS 0x6011c /* [RW 4] Parity mask register #0 read/write */ -#define BRB1_REG_BRB1_PRTY_MASK 0x60138 +#define BRB1_REG_BRB1_PRTY_MASK 0x60138 /* [R 4] Parity register #0 read */ #define BRB1_REG_BRB1_PRTY_STS 0x6012c -/* [RW 10] At address BRB1_IND_FREE_LIST_PRS_CRDT initialize free head. At - address BRB1_IND_FREE_LIST_PRS_CRDT+1 initialize free tail. At address - BRB1_IND_FREE_LIST_PRS_CRDT+2 initialize parser initial credit. Warning - - following reset the first rbc access to this reg must be write; there can - be no more rbc writes after the first one; there can be any number of rbc - read following the first write; rbc access not following these rules will - result in hang condition. */ -#define BRB1_REG_FREE_LIST_PRS_CRDT 0x60200 -/* [RW 10] The number of free blocks below which the full signal to class 0 - is asserted */ +/* [RC 4] Parity register #0 read clear */ +#define BRB1_REG_BRB1_PRTY_STS_CLR 0x60130 +/* [RW 11] The number of free blocks below which the full signal to class 0 + * is asserted */ #define BRB1_REG_FULL_0_XOFF_THRESHOLD_0 0x601d0 -/* [RW 10] The number of free blocks above which the full signal to class 0 - is de-asserted */ -#define BRB1_REG_FULL_0_XON_THRESHOLD_0 0x601d4 -/* [RW 10] The number of free blocks below which the full signal to class 1 - is asserted */ +#define BRB1_REG_FULL_0_XOFF_THRESHOLD_1 0x60230 +/* [RW 11] The number of free blocks above which the full signal to class 0 + * is de-asserted */ +#define BRB1_REG_FULL_0_XON_THRESHOLD_0 0x601d4 +#define BRB1_REG_FULL_0_XON_THRESHOLD_1 0x60234 +/* [RW 11] The number of free blocks below which the full signal to class 1 + * is asserted */ #define BRB1_REG_FULL_1_XOFF_THRESHOLD_0 0x601d8 -/* [RW 10] The number of free blocks above which the full signal to class 1 - is de-asserted */ -#define BRB1_REG_FULL_1_XON_THRESHOLD_0 0x601dc -/* [RW 10] The number of free blocks below which the full signal to the LB - port is asserted */ -#define BRB1_REG_FULL_LB_XOFF_THRESHOLD 0x601e0 -/* [RW 10] The number of free blocks above which the full signal to the LB - port is de-asserted */ +#define BRB1_REG_FULL_1_XOFF_THRESHOLD_1 0x60238 +/* [RW 11] The number of free blocks above which the full signal to class 1 + * is de-asserted */ +#define BRB1_REG_FULL_1_XON_THRESHOLD_0 0x601dc +#define BRB1_REG_FULL_1_XON_THRESHOLD_1 0x6023c +/* [RW 11] The number of free blocks below which the full signal to the LB + * port is asserted */ +#define BRB1_REG_FULL_LB_XOFF_THRESHOLD 0x601e0 +/* [RW 11] The number of free blocks above which the full signal to the LB + * port is de-asserted */ #define BRB1_REG_FULL_LB_XON_THRESHOLD 0x601e4 -/* [RW 10] The number of free blocks above which the High_llfc signal to - interface #n is de-asserted. Not Functional */ -#define BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD_0 0x6014c -/* [RW 10] The number of free blocks below which the High_llfc signal to - interface #n is asserted. Not Functional */ -#define BRB1_REG_HIGH_LLFC_LOW_THRESHOLD_0 0x6013c -/* [RW 23] LL RAM data. */ -#define BRB1_REG_LL_RAM 0x61000 -/* [RW 10] The number of free blocks above which the Low_llfc signal to - interface #n is de-asserted. Not Functional */ -#define BRB1_REG_LOW_LLFC_HIGH_THRESHOLD_0 0x6016c -#define BRB1_REG_LOW_LLFC_HIGH_THRESHOLD_1 0x60170 -/* [RW 10] The number of free blocks below which the Low_llfc signal to - interface #n is asserted. Not Functional */ -#define BRB1_REG_LOW_LLFC_LOW_THRESHOLD_0 0x6015c -/* [RW 10] The number of blocks guarantied for the MAC port */ +/* [RW 11] The number of blocks guarantied for the LB port */ +#define BRB1_REG_LB_GUARANTIED 0x601ec +/* [RW 11] The hysteresis on the guarantied buffer space for the Lb port + * before signaling XON. */ +#define BRB1_REG_LB_GUARANTIED_HYST 0x60264 +/* [RW 11] The number of blocks guarantied for class 0 in MAC 0. The + * register is applicable only when per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_0_CLASS_0_GUARANTIED 0x60244 +/* [RW 11] The hysteresis on the guarantied buffer space for class 0 in MAC + * 1 before signaling XON. The register is applicable only when + * per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_0_CLASS_0_GUARANTIED_HYST 0x60254 +/* [RW 11] The number of blocks guarantied for class 1 in MAC 0. The + * register is applicable only when per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_0_CLASS_1_GUARANTIED 0x60248 +/* [RW 11] The hysteresis on the guarantied buffer space for class 1in MAC 0 + * before signaling XON. The register is applicable only when + * per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_0_CLASS_1_GUARANTIED_HYST 0x60258 +/* [RW 11] The number of blocks guarantied for class 0in MAC1.The register + * is applicable only when per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_1_CLASS_0_GUARANTIED 0x6024c +/* [RW 11] The hysteresis on the guarantied buffer space for class 0 in MAC + * 1 before signaling XON. The register is applicable only when + * per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_1_CLASS_0_GUARANTIED_HYST 0x6025c +/* [RW 11] The number of blocks guarantied for class 1 in MAC 1. The + * register is applicable only when per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_1_CLASS_1_GUARANTIED 0x60250 +/* [RW 11] The hysteresis on the guarantied buffer space for class 1 in MAC + * 1 before signaling XON. The register is applicable only when + * per_class_guaranty_mode is set. */ +#define BRB1_REG_MAC_1_CLASS_1_GUARANTIED_HYST 0x60260 +/* [RW 11] The number of blocks guarantied for the MAC port. The register is + * applicable only when per_class_guaranty_mode is reset. */ #define BRB1_REG_MAC_GUARANTIED_0 0x601e8 #define BRB1_REG_MAC_GUARANTIED_1 0x60240 /* [R 24] The number of full blocks. */ #define BRB1_REG_NUM_OF_FULL_BLOCKS 0x60090 -/* [ST 32] The number of cycles that the write_full signal towards MAC #0 - was asserted. Not Functional */ -#define BRB1_REG_NUM_OF_FULL_CYCLES_0 0x600c8 -#define BRB1_REG_NUM_OF_FULL_CYCLES_1 0x600cc -#define BRB1_REG_NUM_OF_FULL_CYCLES_4 0x600d8 -/* [ST 32] The number of cycles that the pause signal towards MAC #0 was - asserted. Not Functional */ -#define BRB1_REG_NUM_OF_PAUSE_CYCLES_0 0x600b8 -#define BRB1_REG_NUM_OF_PAUSE_CYCLES_1 0x600bc -/* [RW 10] The number of free blocks below which the pause signal to class 0 - is asserted */ +/* [RW 11] The number of free blocks below which the pause signal to class 0 + * is asserted */ #define BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 0x601c0 -/* [RW 10] The number of free blocks above which the pause signal to class 0 - is de-asserted */ +#define BRB1_REG_PAUSE_0_XOFF_THRESHOLD_1 0x60220 +/* [RW 11] The number of free blocks above which the pause signal to class 0 + * is de-asserted */ #define BRB1_REG_PAUSE_0_XON_THRESHOLD_0 0x601c4 -/* [RW 10] The number of free blocks below which the pause signal to class 1 - is asserted */ +#define BRB1_REG_PAUSE_0_XON_THRESHOLD_1 0x60224 +/* [RW 11] The number of free blocks below which the pause signal to class 1 + * is asserted */ #define BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0 0x601c8 -/* [RW 10] The number of free blocks above which the pause signal to class 1 - is de-asserted */ +#define BRB1_REG_PAUSE_1_XOFF_THRESHOLD_1 0x60228 +/* [RW 11] The number of free blocks above which the pause signal to class 1 + * is de-asserted */ #define BRB1_REG_PAUSE_1_XON_THRESHOLD_0 0x601cc +#define BRB1_REG_PAUSE_1_XON_THRESHOLD_1 0x6022c /* [RW 10] Write client 0: De-assert pause threshold. Not Functional */ -#define BRB1_REG_PAUSE_HIGH_THRESHOLD_0 0x60078 -#define BRB1_REG_PAUSE_HIGH_THRESHOLD_1 0x6007c +#define BRB1_REG_PAUSE_HIGH_THRESHOLD_0 0x60078 /* [RW 10] Write client 0: Assert pause threshold. Not Functional */ #define BRB1_REG_PAUSE_LOW_THRESHOLD_0 0x60068 -#define BRB1_REG_PAUSE_LOW_THRESHOLD_1 0x6006c +/* [RW 1] Indicates if to use per-class guaranty mode (new mode) or per-MAC + * guaranty mode (backwards-compatible mode). 0=per-MAC guaranty mode (BC + * mode). 1=per-class guaranty mode (new mode). */ +#define BRB1_REG_PER_CLASS_GUARANTY_MODE 0x60268 /* [R 24] The number of full blocks occpied by port. */ #define BRB1_REG_PORT_NUM_OCC_BLOCKS_0 0x60094 -/* [RW 1] Reset the design by software. */ -#define BRB1_REG_SOFT_RESET 0x600dc -/* [RW 32] Indirect access to AG context with 32-bits granularity. The bits - [11:8] of the address should be the offset within the accessed LCID - context; the bits [7:0] are the accessed LCID.Example: to write to REG3 - LCID100. The RBC address should be 12'h364. */ -#define CCM_REG_AG_CTX 0xd4000 /* [R 5] Used to read the value of the XX protection CAM occupancy counter. */ #define CCM_REG_CAM_OCCUP 0xd0188 -/* [RW 1] CM - CFC Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CCM_CFC_IFEN 0xd003c -/* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CCM_CQM_IFEN 0xd000c -/* [RW 1] If set the Q index; received from the QM is inserted to event ID. - Otherwise 0 is inserted. */ -#define CCM_REG_CCM_CQM_USE_Q 0xd00c0 /* [RW 11] Interrupt mask register #0 read/write */ #define CCM_REG_CCM_INT_MASK 0xd01e4 /* [R 11] Interrupt register #0 read */ #define CCM_REG_CCM_INT_STS 0xd01d8 +/* [RW 27] Parity mask register #0 read/write */ +#define CCM_REG_CCM_PRTY_MASK 0xd01f4 /* [R 27] Parity register #0 read */ #define CCM_REG_CCM_PRTY_STS 0xd01e8 -/* [RW 3] The size of AG context region 0 in REG-pairs. Designates the MS - REG-pair number (e.g. if region 0 is 6 REG-pairs; the value should be 5). - Is used to determine the number of the AG context REG-pairs written back; - when the input message Reg1WbFlg isn't set. */ -#define CCM_REG_CCM_REG0_SZ 0xd00c4 -/* [RW 1] CM - STORM 0 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CCM_STORM0_IFEN 0xd0004 -/* [RW 1] CM - STORM 1 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CCM_STORM1_IFEN 0xd0008 -/* [RW 1] CDU AG read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define CCM_REG_CDU_AG_RD_IFEN 0xd0030 -/* [RW 1] CDU AG write Interface enable. If 0 - the request and valid input - are disregarded; all other signals are treated as usual; if 1 - normal - activity. */ -#define CCM_REG_CDU_AG_WR_IFEN 0xd002c -/* [RW 1] CDU STORM read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define CCM_REG_CDU_SM_RD_IFEN 0xd0038 -/* [RW 1] CDU STORM write Interface enable. If 0 - the request and valid - input is disregarded; all other signals are treated as usual; if 1 - - normal activity. */ -#define CCM_REG_CDU_SM_WR_IFEN 0xd0034 +/* [RC 27] Parity register #0 read clear */ +#define CCM_REG_CCM_PRTY_STS_CLR 0xd01ec /* [RW 4] CFC output initial credit. Max credit available - 15.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 1 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 1 at start-up. */ #define CCM_REG_CFC_INIT_CRD 0xd0204 -/* [RW 2] Auxillary counter flag Q number 1. */ -#define CCM_REG_CNT_AUX1_Q 0xd00c8 -/* [RW 2] Auxillary counter flag Q number 2. */ -#define CCM_REG_CNT_AUX2_Q 0xd00cc -/* [RW 28] The CM header value for QM request (primary). */ -#define CCM_REG_CQM_CCM_HDR_P 0xd008c -/* [RW 28] The CM header value for QM request (secondary). */ -#define CCM_REG_CQM_CCM_HDR_S 0xd0090 -/* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CQM_CCM_IFEN 0xd0014 /* [RW 6] QM output initial credit. Max credit available - 32. Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 32 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 32 at start-up. */ #define CCM_REG_CQM_INIT_CRD 0xd020c -/* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_CQM_P_WEIGHT 0xd00b8 -/* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_CQM_S_WEIGHT 0xd00bc -/* [RW 1] Input SDM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_CSDM_IFEN 0xd0018 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the SDM interface is detected. */ -#define CCM_REG_CSDM_LENGTH_MIS 0xd0170 -/* [RW 3] The weight of the SDM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_CSDM_WEIGHT 0xd00b4 -/* [RW 28] The CM header for QM formatting in case of an error in the QM - inputs. */ -#define CCM_REG_ERR_CCM_HDR 0xd0094 -/* [RW 8] The Event ID in case the input message ErrorFlg is set. */ -#define CCM_REG_ERR_EVNT_ID 0xd0098 + * at the SDM interface is detected. */ +#define CCM_REG_CSDM_LENGTH_MIS 0xd0170 /* [RW 8] FIC0 output initial credit. Max credit available - 255. Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define CCM_REG_FIC0_INIT_CRD 0xd0210 /* [RW 8] FIC1 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define CCM_REG_FIC1_INIT_CRD 0xd0214 -/* [RW 1] Arbitration between Input Arbiter groups: 0 - fair Round-Robin; 1 - - strict priority defined by ~ccm_registers_gr_ag_pr.gr_ag_pr; - ~ccm_registers_gr_ld0_pr.gr_ld0_pr and - ~ccm_registers_gr_ld1_pr.gr_ld1_pr. Groups are according to channels and - outputs to STORM: aggregation; load FIC0; load FIC1 and store. */ -#define CCM_REG_GR_ARB_TYPE 0xd015c -/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed; that the Store channel priority is - the compliment to 4 of the rest priorities - Aggregation channel; Load - (FIC0) channel and Load (FIC1). */ -#define CCM_REG_GR_LD0_PR 0xd0164 -/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed; that the Store channel priority is - the compliment to 4 of the rest priorities - Aggregation channel; Load - (FIC0) channel and Load (FIC1). */ -#define CCM_REG_GR_LD1_PR 0xd0168 -/* [RW 4] The number of double REG-pairs(128 bits); loaded from the STORM - context and sent to STORM; for a specific connection type. The double - REG-pairs are used in order to align to STORM context row size of 128 - bits. The offset of these data in the STORM context is always 0. Index - _(0..15) stands for the connection type (one of 16). */ -#define CCM_REG_N_SM_CTX_LD_0 0xd004c -#define CCM_REG_N_SM_CTX_LD_1 0xd0050 -#define CCM_REG_N_SM_CTX_LD_2 0xd0054 -#define CCM_REG_N_SM_CTX_LD_3 0xd0058 -#define CCM_REG_N_SM_CTX_LD_4 0xd005c -/* [RW 1] Input pbf Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define CCM_REG_PBF_IFEN 0xd0028 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the pbf interface is detected. */ + * at the pbf interface is detected. */ #define CCM_REG_PBF_LENGTH_MIS 0xd0180 -/* [RW 3] The weight of the input pbf in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_PBF_WEIGHT 0xd00ac -#define CCM_REG_PHYS_QNUM1_0 0xd0134 -#define CCM_REG_PHYS_QNUM1_1 0xd0138 -#define CCM_REG_PHYS_QNUM2_0 0xd013c -#define CCM_REG_PHYS_QNUM2_1 0xd0140 -#define CCM_REG_PHYS_QNUM3_0 0xd0144 -#define CCM_REG_PHYS_QNUM3_1 0xd0148 -#define CCM_REG_QOS_PHYS_QNUM0_0 0xd0114 -#define CCM_REG_QOS_PHYS_QNUM0_1 0xd0118 -#define CCM_REG_QOS_PHYS_QNUM1_0 0xd011c -#define CCM_REG_QOS_PHYS_QNUM1_1 0xd0120 -#define CCM_REG_QOS_PHYS_QNUM2_0 0xd0124 -#define CCM_REG_QOS_PHYS_QNUM2_1 0xd0128 -#define CCM_REG_QOS_PHYS_QNUM3_0 0xd012c -#define CCM_REG_QOS_PHYS_QNUM3_1 0xd0130 -/* [RW 1] STORM - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define CCM_REG_STORM_CCM_IFEN 0xd0010 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the STORM interface is detected. */ + * at the STORM interface is detected. */ #define CCM_REG_STORM_LENGTH_MIS 0xd016c -/* [RW 3] The weight of the STORM input in the WRR (Weighted Round robin) - mechanism. 0 stands for weight 8 (the most prioritised); 1 stands for - weight 1(least prioritised); 2 stands for weight 2 (more prioritised); - tc. */ -#define CCM_REG_STORM_WEIGHT 0xd009c -/* [RW 1] Input tsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define CCM_REG_TSEM_IFEN 0xd001c /* [RC 1] Set when the message length mismatch (relative to last indication) - at the tsem interface is detected. */ -#define CCM_REG_TSEM_LENGTH_MIS 0xd0174 -/* [RW 3] The weight of the input tsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_TSEM_WEIGHT 0xd00a0 -/* [RW 1] Input usem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define CCM_REG_USEM_IFEN 0xd0024 + * at the tsem interface is detected. */ +#define CCM_REG_TSEM_LENGTH_MIS 0xd0174 /* [RC 1] Set when message length mismatch (relative to last indication) at - the usem interface is detected. */ -#define CCM_REG_USEM_LENGTH_MIS 0xd017c -/* [RW 3] The weight of the input usem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_USEM_WEIGHT 0xd00a8 -/* [RW 1] Input xsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define CCM_REG_XSEM_IFEN 0xd0020 + * the usem interface is detected. */ +#define CCM_REG_USEM_LENGTH_MIS 0xd017c /* [RC 1] Set when the message length mismatch (relative to last indication) - at the xsem interface is detected. */ -#define CCM_REG_XSEM_LENGTH_MIS 0xd0178 -/* [RW 3] The weight of the input xsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define CCM_REG_XSEM_WEIGHT 0xd00a4 + * at the xsem interface is detected. */ +#define CCM_REG_XSEM_LENGTH_MIS 0xd0178 /* [RW 19] Indirect access to the descriptor table of the XX protection - mechanism. The fields are: [5:0] - message length; [12:6] - message - pointer; 18:13] - next pointer. */ + * mechanism. The fields are: [5:0] - message length; [12:6] - message + * pointer; 18:13] - next pointer. */ #define CCM_REG_XX_DESCR_TABLE 0xd0300 -#define CCM_REG_XX_DESCR_TABLE_SIZE 36 +#define CCM_REG_XX_DESCR_TABLE_SIZE 24 /* [R 7] Used to read the value of XX protection Free counter. */ -#define CCM_REG_XX_FREE 0xd0184 -/* [RW 6] Initial value for the credit counter; responsible for fulfilling - of the Input Stage XX protection buffer by the XX protection pending - messages. Max credit available - 127. Write writes the initial credit - value; read returns the current value of the credit counter. Must be - initialized to maximum XX protected message size - 2 at start-up. */ -#define CCM_REG_XX_INIT_CRD 0xd0220 -/* [RW 7] The maximum number of pending messages; which may be stored in XX - protection. At write the ~ccm_registers_xx_free.xx_free counter is also - written. */ -#define CCM_REG_XX_MSG_NUM 0xd0224 -/* [RW 8] The Event ID; sent to the STORM in case of XX overflow. */ -#define CCM_REG_XX_OVFL_EVNT_ID 0xd0044 -/* [RW 18] Indirect access to the XX table of the XX protection mechanism. - The fields are: [5:0] - tail pointer; 11:6] - Link List size; 17:12] - - header pointer. */ -#define CCM_REG_XX_TABLE 0xd0280 -#define CDU_REG_CDU_CHK_MASK0 0x101000 -#define CDU_REG_CDU_CHK_MASK1 0x101004 -#define CDU_REG_CDU_CONTROL0 0x101008 -#define CDU_REG_CDU_DEBUG 0x101010 +#define CCM_REG_XX_FREE 0xd0184 #define CDU_REG_CDU_GLOBAL_PARAMS 0x101020 /* [RW 7] Interrupt mask register #0 read/write */ #define CDU_REG_CDU_INT_MASK 0x10103c @@ -357,25 +196,18 @@ #define CDU_REG_CDU_PRTY_MASK 0x10104c /* [R 5] Parity register #0 read */ #define CDU_REG_CDU_PRTY_STS 0x101040 +/* [RC 5] Parity register #0 read clear */ +#define CDU_REG_CDU_PRTY_STS_CLR 0x101044 /* [RW 32] logging of error data in case of a CDU load error: - {expected_cid[15:0]; xpected_type[2:0]; xpected_region[2:0]; ctive_error; - ype_error; ctual_active; ctual_compressed_context}; */ + * {expected_cid[15:0]; xpected_type[2:0]; xpected_region[2:0]; ctive_error; + * ype_error; ctual_active; ctual_compressed_context}; */ #define CDU_REG_ERROR_DATA 0x101014 -/* [WB 216] L1TT ram access. each entry has the following format : - {mrege_regions[7:0]; ffset12[5:0]...offset0[5:0]; - ength12[5:0]...length0[5:0]; d12[3:0]...id0[3:0]} */ -#define CDU_REG_L1TT 0x101800 -/* [WB 24] MATT ram access. each entry has the following - format:{RegionLength[11:0]; egionOffset[11:0]} */ -#define CDU_REG_MATT 0x101100 -/* [RW 1] when this bit is set the CDU operates in multifunction mode */ -#define CDU_REG_MF_MODE 0x101050 -/* [R 1] indication the initializing the activity counter by the hardware - was done. */ -#define CFC_REG_AC_INIT_DONE 0x104078 /* [RW 13] activity counter ram access */ #define CFC_REG_ACTIVITY_COUNTER 0x104400 #define CFC_REG_ACTIVITY_COUNTER_SIZE 256 +/* [R 1] indication the initializing the activity counter by the hardware + * was done. */ +#define CFC_REG_AC_INIT_DONE 0x104078 /* [R 1] indication the initializing the cams by the hardware was done. */ #define CFC_REG_CAM_INIT_DONE 0x10407c /* [RW 2] Interrupt mask register #0 read/write */ @@ -383,41 +215,33 @@ /* [R 2] Interrupt register #0 read */ #define CFC_REG_CFC_INT_STS 0x1040fc /* [RC 2] Interrupt register #0 read clear */ -#define CFC_REG_CFC_INT_STS_CLR 0x104100 -/* [RW 4] Parity mask register #0 read/write */ +#define CFC_REG_CFC_INT_STS_CLR 0x104100 +/* [RW 6] Parity mask register #0 read/write */ #define CFC_REG_CFC_PRTY_MASK 0x104118 -/* [R 4] Parity register #0 read */ +/* [R 6] Parity register #0 read */ #define CFC_REG_CFC_PRTY_STS 0x10410c +/* [RC 6] Parity register #0 read clear */ +#define CFC_REG_CFC_PRTY_STS_CLR 0x104110 /* [RW 21] CID cam access (21:1 - Data; alid - 0) */ -#define CFC_REG_CID_CAM 0x104800 -#define CFC_REG_CONTROL0 0x104028 +#define CFC_REG_CID_CAM 0x104800 #define CFC_REG_DEBUG0 0x104050 -/* [RW 16] indicates per error (in #cfc_registers_cfc_error_vector.cfc_error - vector) whether the cfc should be disabled upon it */ -#define CFC_REG_DISABLE_ON_ERROR 0x104044 -#define CFC_REG_DISABLE_ROBUSTWB_PF 0x104138 /* [R 16] CFC error vector. when the CFC detects an internal error it will - set one of these bits. the bit description can be found in CFC - specifications */ + * set one of these bits. the bit description can be found in CFC + * specifications */ #define CFC_REG_ERROR_VECTOR 0x10403c /* [WB 97] LCID info ram access = {96-vpf; 5:93-pfid; 2:89-type; - 8:85-action; 4-paddrv; 3:20-paddr; 9:4-rstates; -lsf; :0-lstate} */ + * 8:85-action; 4-paddrv; 3:20-paddr; 9:4-rstates; -lsf; :0-lstate} */ #define CFC_REG_INFO_RAM 0x105000 #define CFC_REG_INFO_RAM_SIZE 1024 #define CFC_REG_INIT_REG 0x10404c -#define CFC_REG_INTERFACES 0x104058 -/* [RW 24] {weight_load_client7[2:0] to weight_load_client0[2:0]}. this - field allows changing the priorities of the weighted-round-robin arbiter - which selects which CFC load client should be served next */ -#define CFC_REG_LCREQ_WEIGHTS 0x104084 /* [RW 22] Link List ram access; data = {prev_pfid; rev_lcid; ext_pfid; - ext_lcid} */ + * ext_lcid} */ #define CFC_REG_LINK_LIST 0x104c00 #define CFC_REG_LINK_LIST_SIZE 256 /* [R 1] indication the initializing the link list by the hardware was done. */ #define CFC_REG_LL_INIT_DONE 0x104074 /* [R 9] Number of allocated LCIDs which are at empty state */ -#define CFC_REG_NUM_LCIDS_ALLOC 0x104020 +#define CFC_REG_NUM_LCIDS_ALLOC 0x104020 /* [R 9] Number of Arriving LCIDs in Link List Block */ #define CFC_REG_NUM_LCIDS_ARRIVING 0x104004 #define CFC_REG_NUM_LCIDS_INSIDE_PF 0x104120 @@ -425,311 +249,97 @@ #define CFC_REG_NUM_LCIDS_LEAVING 0x104018 #define CFC_REG_STRONG_ENABLE_PF 0x104128 #define CFC_REG_WEAK_ENABLE_PF 0x104124 -/* [RW 8] The event id for aggregated interrupt 0 */ -#define CSDM_REG_AGG_INT_EVENT_0 0xc2038 -#define CSDM_REG_AGG_INT_EVENT_1 0xc203c -#define CSDM_REG_AGG_INT_EVENT_10 0xc2060 -#define CSDM_REG_AGG_INT_EVENT_11 0xc2064 -#define CSDM_REG_AGG_INT_EVENT_12 0xc2068 -#define CSDM_REG_AGG_INT_EVENT_13 0xc206c -#define CSDM_REG_AGG_INT_EVENT_14 0xc2070 -#define CSDM_REG_AGG_INT_EVENT_15 0xc2074 -#define CSDM_REG_AGG_INT_EVENT_16 0xc2078 -#define CSDM_REG_AGG_INT_EVENT_17 0xc207c -#define CSDM_REG_AGG_INT_EVENT_2 0xc2040 -#define CSDM_REG_AGG_INT_EVENT_24 0xc2098 -#define CSDM_REG_AGG_INT_EVENT_25 0xc209c -#define CSDM_REG_AGG_INT_EVENT_26 0xc20a0 -#define CSDM_REG_AGG_INT_EVENT_27 0xc20a4 -#define CSDM_REG_AGG_INT_EVENT_3 0xc2044 -#define CSDM_REG_AGG_INT_EVENT_4 0xc2048 -#define CSDM_REG_AGG_INT_EVENT_5 0xc204c -#define CSDM_REG_AGG_INT_EVENT_6 0xc2050 -#define CSDM_REG_AGG_INT_EVENT_7 0xc2054 -#define CSDM_REG_AGG_INT_EVENT_8 0xc2058 -#define CSDM_REG_AGG_INT_EVENT_9 0xc205c -/* [RW 1] The destination FIC for aggregated interrupt 24 */ -#define CSDM_REG_AGG_INT_FIC_24 0xc2198 -#define CSDM_REG_AGG_INT_FIC_25 0xc219c -/* [RW 1] For each aggregated interrupt index whether the mode is normal (0) - or auto-mask-mode (1) */ -#define CSDM_REG_AGG_INT_MODE_0 0xc21b8 -#define CSDM_REG_AGG_INT_MODE_1 0xc21bc -#define CSDM_REG_AGG_INT_MODE_10 0xc21e0 -#define CSDM_REG_AGG_INT_MODE_11 0xc21e4 -#define CSDM_REG_AGG_INT_MODE_12 0xc21e8 -#define CSDM_REG_AGG_INT_MODE_13 0xc21ec -#define CSDM_REG_AGG_INT_MODE_14 0xc21f0 -#define CSDM_REG_AGG_INT_MODE_15 0xc21f4 -#define CSDM_REG_AGG_INT_MODE_16 0xc21f8 -#define CSDM_REG_AGG_INT_MODE_17 0xc21fc -#define CSDM_REG_AGG_INT_MODE_2 0xc21c0 -#define CSDM_REG_AGG_INT_MODE_24 0xc2218 -#define CSDM_REG_AGG_INT_MODE_25 0xc221c -#define CSDM_REG_AGG_INT_MODE_3 0xc21c4 -#define CSDM_REG_AGG_INT_MODE_4 0xc21c8 -#define CSDM_REG_AGG_INT_MODE_5 0xc21cc -#define CSDM_REG_AGG_INT_MODE_6 0xc21d0 -#define CSDM_REG_AGG_INT_MODE_7 0xc21d4 -#define CSDM_REG_AGG_INT_MODE_8 0xc21d8 -#define CSDM_REG_AGG_INT_MODE_9 0xc21dc -/* [RW 1] The T bit for aggregated interrupt 1 */ -#define CSDM_REG_AGG_INT_T_1 0xc20bc -#define CSDM_REG_AGG_INT_T_2 0xc20c0 -#define CSDM_REG_AGG_INT_T_24 0xc2118 -#define CSDM_REG_AGG_INT_T_25 0xc211c -#define CSDM_REG_AGG_INT_T_26 0xc2120 -#define CSDM_REG_AGG_INT_T_27 0xc2124 -/* [RW 14] The start address in the internal RAM for the cfc_rsp lcid */ -#define CSDM_REG_CFC_RSP_START_ADDR 0xc2008 -/* [RW 16] The maximum value of the competion counter #0 */ -#define CSDM_REG_CMP_COUNTER_MAX0 0xc201c -/* [RW 16] The maximum value of the competion counter #1 */ -#define CSDM_REG_CMP_COUNTER_MAX1 0xc2020 -/* [RW 16] The maximum value of the competion counter #2 */ -#define CSDM_REG_CMP_COUNTER_MAX2 0xc2024 -/* [RW 16] The maximum value of the competion counter #3 */ -#define CSDM_REG_CMP_COUNTER_MAX3 0xc2028 -/* [RW 16] The maximum value of the competion counter #4 */ -#define CSDM_REG_CMP_COUNTER_MAX4 0xc22d8 -/* [RW 16] The maximum value of the competion counter #5 */ -#define CSDM_REG_CMP_COUNTER_MAX5 0xc22dc -/* [RW 16] The maximum value of the competion counter #6 */ -#define CSDM_REG_CMP_COUNTER_MAX6 0xc22e0 -/* [RW 16] The maximum value of the competion counter #7 */ -#define CSDM_REG_CMP_COUNTER_MAX7 0xc22e4 -/* [RW 14] The start address in the internal RAM for the completion - counters. */ -#define CSDM_REG_CMP_COUNTER_START_ADDR 0xc200c /* [RW 32] Interrupt mask register #0 read/write */ #define CSDM_REG_CSDM_INT_MASK_0 0xc229c #define CSDM_REG_CSDM_INT_MASK_1 0xc22ac /* [R 32] Interrupt register #0 read */ -#define CSDM_REG_CSDM_INT_STS_0 0xc2290 -#define CSDM_REG_CSDM_INT_STS_1 0xc22a0 +#define CSDM_REG_CSDM_INT_STS_0 0xc2290 +#define CSDM_REG_CSDM_INT_STS_1 0xc22a0 /* [RW 11] Parity mask register #0 read/write */ -#define CSDM_REG_CSDM_PRTY_MASK 0xc22bc +#define CSDM_REG_CSDM_PRTY_MASK 0xc22bc /* [R 11] Parity register #0 read */ #define CSDM_REG_CSDM_PRTY_STS 0xc22b0 -#define CSDM_REG_ENABLE_IN1 0xc2238 -#define CSDM_REG_ENABLE_IN2 0xc223c -#define CSDM_REG_ENABLE_OUT1 0xc2240 -#define CSDM_REG_ENABLE_OUT2 0xc2244 -/* [RW 4] The initial number of messages that can be sent to the pxp control - interface without receiving any ACK. */ -#define CSDM_REG_INIT_CREDIT_PXP_CTRL 0xc24bc -/* [ST 32] The number of ACK after placement messages received */ -#define CSDM_REG_NUM_OF_ACK_AFTER_PLACE 0xc227c -/* [ST 32] The number of packet end messages received from the parser */ -#define CSDM_REG_NUM_OF_PKT_END_MSG 0xc2274 -/* [ST 32] The number of requests received from the pxp async if */ -#define CSDM_REG_NUM_OF_PXP_ASYNC_REQ 0xc2278 -/* [ST 32] The number of commands received in queue 0 */ -#define CSDM_REG_NUM_OF_Q0_CMD 0xc2248 -/* [ST 32] The number of commands received in queue 10 */ -#define CSDM_REG_NUM_OF_Q10_CMD 0xc226c -/* [ST 32] The number of commands received in queue 11 */ -#define CSDM_REG_NUM_OF_Q11_CMD 0xc2270 -/* [ST 32] The number of commands received in queue 1 */ -#define CSDM_REG_NUM_OF_Q1_CMD 0xc224c -/* [ST 32] The number of commands received in queue 3 */ -#define CSDM_REG_NUM_OF_Q3_CMD 0xc2250 -/* [ST 32] The number of commands received in queue 4 */ -#define CSDM_REG_NUM_OF_Q4_CMD 0xc2254 -/* [ST 32] The number of commands received in queue 5 */ -#define CSDM_REG_NUM_OF_Q5_CMD 0xc2258 -/* [ST 32] The number of commands received in queue 6 */ -#define CSDM_REG_NUM_OF_Q6_CMD 0xc225c -/* [ST 32] The number of commands received in queue 7 */ -#define CSDM_REG_NUM_OF_Q7_CMD 0xc2260 -/* [ST 32] The number of commands received in queue 8 */ -#define CSDM_REG_NUM_OF_Q8_CMD 0xc2264 -/* [ST 32] The number of commands received in queue 9 */ -#define CSDM_REG_NUM_OF_Q9_CMD 0xc2268 -/* [RW 14] The start address in the internal RAM for queue counters */ -#define CSDM_REG_Q_COUNTER_START_ADDR 0xc2010 +/* [RC 11] Parity register #0 read clear */ +#define CSDM_REG_CSDM_PRTY_STS_CLR 0xc22b4 /* [R 1] pxp_ctrl rd_data fifo empty in sdm_dma_rsp block */ #define CSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY 0xc2548 /* [R 1] parser fifo empty in sdm_sync block */ #define CSDM_REG_SYNC_PARSER_EMPTY 0xc2550 /* [R 1] parser serial fifo empty in sdm_sync block */ #define CSDM_REG_SYNC_SYNC_EMPTY 0xc2558 -/* [RW 32] Tick for timer counter. Applicable only when - ~csdm_registers_timer_tick_enable.timer_tick_enable =1 */ -#define CSDM_REG_TIMER_TICK 0xc2000 -/* [RW 5] The number of time_slots in the arbitration cycle */ -#define CSEM_REG_ARB_CYCLE_SIZE 0x200034 -/* [RW 3] The source that is associated with arbitration element 0. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2 */ -#define CSEM_REG_ARB_ELEMENT0 0x200020 -/* [RW 3] The source that is associated with arbitration element 1. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~csem_registers_arb_element0.arb_element0 */ -#define CSEM_REG_ARB_ELEMENT1 0x200024 -/* [RW 3] The source that is associated with arbitration element 2. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~csem_registers_arb_element0.arb_element0 - and ~csem_registers_arb_element1.arb_element1 */ -#define CSEM_REG_ARB_ELEMENT2 0x200028 -/* [RW 3] The source that is associated with arbitration element 3. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2.Could - not be equal to register ~csem_registers_arb_element0.arb_element0 and - ~csem_registers_arb_element1.arb_element1 and - ~csem_registers_arb_element2.arb_element2 */ -#define CSEM_REG_ARB_ELEMENT3 0x20002c -/* [RW 3] The source that is associated with arbitration element 4. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~csem_registers_arb_element0.arb_element0 - and ~csem_registers_arb_element1.arb_element1 and - ~csem_registers_arb_element2.arb_element2 and - ~csem_registers_arb_element3.arb_element3 */ -#define CSEM_REG_ARB_ELEMENT4 0x200030 /* [RW 32] Interrupt mask register #0 read/write */ #define CSEM_REG_CSEM_INT_MASK_0 0x200110 #define CSEM_REG_CSEM_INT_MASK_1 0x200120 /* [R 32] Interrupt register #0 read */ -#define CSEM_REG_CSEM_INT_STS_0 0x200104 -#define CSEM_REG_CSEM_INT_STS_1 0x200114 +#define CSEM_REG_CSEM_INT_STS_0 0x200104 +#define CSEM_REG_CSEM_INT_STS_1 0x200114 /* [RW 32] Parity mask register #0 read/write */ #define CSEM_REG_CSEM_PRTY_MASK_0 0x200130 #define CSEM_REG_CSEM_PRTY_MASK_1 0x200140 /* [R 32] Parity register #0 read */ #define CSEM_REG_CSEM_PRTY_STS_0 0x200124 #define CSEM_REG_CSEM_PRTY_STS_1 0x200134 -#define CSEM_REG_ENABLE_IN 0x2000a4 -#define CSEM_REG_ENABLE_OUT 0x2000a8 +/* [RC 32] Parity register #0 read clear */ +#define CSEM_REG_CSEM_PRTY_STS_CLR_0 0x200128 +#define CSEM_REG_CSEM_PRTY_STS_CLR_1 0x200138 /* [RW 32] This address space contains all registers and memories that are - placed in SEM_FAST block. The SEM_FAST registers are described in - appendix B. In order to access the SEM_FAST registers the base address - CSEM_REGISTERS_FAST_MEMORY (Offset: 0x220000) should be added to each - SEM_FAST register offset. */ + * placed in SEM_FAST block. The SEM_FAST registers are described in + * appendix B. In order to access the SEM_FAST registers the base address + * CSEM_REGISTERS_FAST_MEMORY (Offset: 0x220000) should be added to each + * SEM_FAST register offset. */ #define CSEM_REG_FAST_MEMORY 0x220000 -/* [RW 1] Disables input messages from FIC0 May be updated during run_time - by the microcode */ -#define CSEM_REG_FIC0_DISABLE 0x200224 -/* [RW 1] Disables input messages from FIC1 May be updated during run_time - by the microcode */ -#define CSEM_REG_FIC1_DISABLE 0x200234 /* [RW 15] Interrupt table Read and write access to it is not possible in - the middle of the work */ + * the middle of the work */ #define CSEM_REG_INT_TABLE 0x200400 -/* [ST 24] Statistics register. The number of messages that entered through - FIC0 */ -#define CSEM_REG_MSG_NUM_FIC0 0x200000 -/* [ST 24] Statistics register. The number of messages that entered through - FIC1 */ -#define CSEM_REG_MSG_NUM_FIC1 0x200004 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC0 */ -#define CSEM_REG_MSG_NUM_FOC0 0x200008 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC1 */ -#define CSEM_REG_MSG_NUM_FOC1 0x20000c -/* [ST 24] Statistics register. The number of messages that were sent to - FOC2 */ -#define CSEM_REG_MSG_NUM_FOC2 0x200010 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC3 */ -#define CSEM_REG_MSG_NUM_FOC3 0x200014 -/* [RW 1] Disables input messages from the passive buffer May be updated - during run_time by the microcode */ -#define CSEM_REG_PAS_DISABLE 0x20024c /* [WB 128] Debug only. Passive buffer memory */ -#define CSEM_REG_PASSIVE_BUFFER 0x202000 +#define CSEM_REG_PASSIVE_BUFFER 0x202000 /* [WB 46] pram memory. B45 is parity; b[44:0] - data. */ #define CSEM_REG_PRAM 0x240000 -/* [R 16] Valid sleeping threads indication have bit per thread */ +/* [R 20] Valid sleeping threads indication have bit per thread */ #define CSEM_REG_SLEEP_THREADS_VALID 0x20026c /* [R 1] EXT_STORE FIFO is empty in sem_slow_ls_ext */ #define CSEM_REG_SLOW_EXT_STORE_EMPTY 0x2002a0 -/* [RW 16] List of free threads . There is a bit per thread. */ -#define CSEM_REG_THREADS_LIST 0x2002e4 -/* [RW 3] The arbitration scheme of time_slot 0 */ -#define CSEM_REG_TS_0_AS 0x200038 -/* [RW 3] The arbitration scheme of time_slot 10 */ -#define CSEM_REG_TS_10_AS 0x200060 -/* [RW 3] The arbitration scheme of time_slot 11 */ -#define CSEM_REG_TS_11_AS 0x200064 -/* [RW 3] The arbitration scheme of time_slot 12 */ -#define CSEM_REG_TS_12_AS 0x200068 -/* [RW 3] The arbitration scheme of time_slot 13 */ -#define CSEM_REG_TS_13_AS 0x20006c -/* [RW 3] The arbitration scheme of time_slot 14 */ -#define CSEM_REG_TS_14_AS 0x200070 -/* [RW 3] The arbitration scheme of time_slot 15 */ -#define CSEM_REG_TS_15_AS 0x200074 -/* [RW 3] The arbitration scheme of time_slot 16 */ -#define CSEM_REG_TS_16_AS 0x200078 -/* [RW 3] The arbitration scheme of time_slot 17 */ -#define CSEM_REG_TS_17_AS 0x20007c -/* [RW 3] The arbitration scheme of time_slot 18 */ -#define CSEM_REG_TS_18_AS 0x200080 -/* [RW 3] The arbitration scheme of time_slot 1 */ -#define CSEM_REG_TS_1_AS 0x20003c -/* [RW 3] The arbitration scheme of time_slot 2 */ -#define CSEM_REG_TS_2_AS 0x200040 -/* [RW 3] The arbitration scheme of time_slot 3 */ -#define CSEM_REG_TS_3_AS 0x200044 -/* [RW 3] The arbitration scheme of time_slot 4 */ -#define CSEM_REG_TS_4_AS 0x200048 -/* [RW 3] The arbitration scheme of time_slot 5 */ -#define CSEM_REG_TS_5_AS 0x20004c -/* [RW 3] The arbitration scheme of time_slot 6 */ -#define CSEM_REG_TS_6_AS 0x200050 -/* [RW 3] The arbitration scheme of time_slot 7 */ -#define CSEM_REG_TS_7_AS 0x200054 -/* [RW 3] The arbitration scheme of time_slot 8 */ -#define CSEM_REG_TS_8_AS 0x200058 -/* [RW 3] The arbitration scheme of time_slot 9 */ -#define CSEM_REG_TS_9_AS 0x20005c /* [W 7] VF or PF ID for reset error bit. Values 0-63 reset error bit for 64 - VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ + * VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ #define CSEM_REG_VFPF_ERR_NUM 0x200380 /* [RW 1] Parity mask register #0 read/write */ #define DBG_REG_DBG_PRTY_MASK 0xc0a8 /* [R 1] Parity register #0 read */ #define DBG_REG_DBG_PRTY_STS 0xc09c +/* [RC 1] Parity register #0 read clear */ +#define DBG_REG_DBG_PRTY_STS_CLR 0xc0a0 /* [RW 1] When set the DMAE will process the commands as in E1.5. 1.The - function that is used is always SRC-PCI; 2.VF_Valid = 0; 3.VFID=0; - 4.Completion function=0; 5.Error handling=0 */ + * function that is used is always SRC-PCI; 2.VF_Valid = 0; 3.VFID=0; + * 4.Completion function=0; 5.Error handling=0 */ #define DMAE_REG_BACKWARD_COMP_EN 0x10207c /* [RW 32] Commands memory. The address to command X; row Y is to calculated - as 14*X+Y. */ + * as 14*X+Y. */ #define DMAE_REG_CMD_MEM 0x102400 #define DMAE_REG_CMD_MEM_SIZE 224 -/* [RW 1] If 0 - the CRC-16c initial value is all zeroes; if 1 - the CRC-16c - initial value is all ones. */ -#define DMAE_REG_CRC16C_INIT 0x10201c -/* [RW 1] If 0 - the CRC-16 T10 initial value is all zeroes; if 1 - the - CRC-16 T10 initial value is all ones. */ -#define DMAE_REG_CRC16T10_INIT 0x102020 /* [RW 2] Interrupt mask register #0 read/write */ #define DMAE_REG_DMAE_INT_MASK 0x102054 /* [RW 4] Parity mask register #0 read/write */ -#define DMAE_REG_DMAE_PRTY_MASK 0x102064 +#define DMAE_REG_DMAE_PRTY_MASK 0x102064 /* [R 4] Parity register #0 read */ #define DMAE_REG_DMAE_PRTY_STS 0x102058 +/* [RC 4] Parity register #0 read clear */ +#define DMAE_REG_DMAE_PRTY_STS_CLR 0x10205c /* [RW 1] Command 0 go. */ #define DMAE_REG_GO_C0 0x102080 /* [RW 1] Command 1 go. */ #define DMAE_REG_GO_C1 0x102084 /* [RW 1] Command 10 go. */ -#define DMAE_REG_GO_C10 0x102088 +#define DMAE_REG_GO_C10 0x102088 /* [RW 1] Command 11 go. */ -#define DMAE_REG_GO_C11 0x10208c +#define DMAE_REG_GO_C11 0x10208c /* [RW 1] Command 12 go. */ -#define DMAE_REG_GO_C12 0x102090 +#define DMAE_REG_GO_C12 0x102090 /* [RW 1] Command 13 go. */ -#define DMAE_REG_GO_C13 0x102094 +#define DMAE_REG_GO_C13 0x102094 /* [RW 1] Command 14 go. */ -#define DMAE_REG_GO_C14 0x102098 +#define DMAE_REG_GO_C14 0x102098 /* [RW 1] Command 15 go. */ -#define DMAE_REG_GO_C15 0x10209c +#define DMAE_REG_GO_C15 0x10209c /* [RW 1] Command 2 go. */ #define DMAE_REG_GO_C2 0x1020a0 /* [RW 1] Command 3 go. */ @@ -746,56 +356,6 @@ #define DMAE_REG_GO_C8 0x1020b8 /* [RW 1] Command 9 go. */ #define DMAE_REG_GO_C9 0x1020bc -/* [RW 1] DMAE GRC Interface (Target; aster) enable. If 0 - the acknowledge - input is disregarded; valid is deasserted; all other signals are treated - as usual; if 1 - normal activity. */ -#define DMAE_REG_GRC_IFEN 0x102008 -/* [RW 1] DMAE PCI Interface (Request; ead; rite) enable. If 0 - the - acknowledge input is disregarded; valid is deasserted; full is asserted; - all other signals are treated as usual; if 1 - normal activity. */ -#define DMAE_REG_PCI_IFEN 0x102004 -/* [RW 4] DMAE- PCI Request Interface initial credit. Write writes the - initial value to the credit counter; related to the address. Read returns - the current value of the counter. */ -#define DMAE_REG_PXP_REQ_INIT_CRD 0x1020c0 -/* [R 8] Aggregation command. */ -#define DORQ_REG_AGG_CMD0 0x170060 -/* [RW 8] Aggregation cmd per {vf_valid; conn type; A; R} */ -#define DORQ_REG_AGG_CMD_0 0x170400 -/* [R 8] Aggregation command. */ -#define DORQ_REG_AGG_CMD1 0x170064 -/* [RW 8] Aggregation cmd per {vf_valid; conn type; A; R} */ -#define DORQ_REG_AGG_CMD_1 0x170404 -#define DORQ_REG_AGG_CMD_12 0x170430 -#define DORQ_REG_AGG_CMD_13 0x170434 -#define DORQ_REG_AGG_CMD_14 0x170438 -#define DORQ_REG_AGG_CMD_15 0x17043c -#define DORQ_REG_AGG_CMD_16 0x170440 -#define DORQ_REG_AGG_CMD_17 0x170444 -#define DORQ_REG_AGG_CMD_18 0x170448 -#define DORQ_REG_AGG_CMD_19 0x17044c -/* [R 8] Aggregation command. */ -#define DORQ_REG_AGG_CMD2 0x170068 -/* [RW 8] Aggregation cmd per {vf_valid; conn type; A; R} */ -#define DORQ_REG_AGG_CMD_2 0x170408 -/* [R 8] Aggregation command. */ -#define DORQ_REG_AGG_CMD3 0x17006c -/* [RW 8] Aggregation cmd per {vf_valid; conn type; A; R} */ -#define DORQ_REG_AGG_CMD_3 0x17040c -#define DORQ_REG_AGG_CMD_32 0x170480 -#define DORQ_REG_AGG_CMD_33 0x170484 -#define DORQ_REG_AGG_CMD_34 0x170488 -#define DORQ_REG_AGG_CMD_35 0x17048c -#define DORQ_REG_AGG_CMD_4 0x170410 -#define DORQ_REG_AGG_CMD_5 0x170414 -#define DORQ_REG_AGG_CMD_6 0x170418 -#define DORQ_REG_AGG_CMD_7 0x17041c -/* [RW 28] The value sent to CM header in the case of CFC load cancellation. */ -#define DORQ_REG_CANCEL_CMHEAD 0x1701c4 -/* [RW 28] UCM Header. */ -#define DORQ_REG_CMHEAD_RX 0x170050 -/* [RW 1] Thread Required bit for error indicating CM messages */ -#define DORQ_REG_CM_T_FLAG 0x170344 /* [RW 32] Doorbell address for RBC doorbells (function 0). */ #define DORQ_REG_DB_ADDR0 0x17008c /* [RW 6] Interrupt mask register #0 read/write */ @@ -805,62 +365,39 @@ /* [RC 6] Interrupt register #0 read clear */ #define DORQ_REG_DORQ_INT_STS_CLR 0x170178 /* [RW 2] Parity mask register #0 read/write */ -#define DORQ_REG_DORQ_PRTY_MASK 0x170190 +#define DORQ_REG_DORQ_PRTY_MASK 0x170190 /* [R 2] Parity register #0 read */ #define DORQ_REG_DORQ_PRTY_STS 0x170184 -/* [RW 8] The address to write the DPM CID to STORM. */ -#define DORQ_REG_DPM_CID_ADDR 0x170044 +/* [RC 2] Parity register #0 read clear */ +#define DORQ_REG_DORQ_PRTY_STS_CLR 0x170188 /* [RW 5] The DPM mode CID extraction offset. */ #define DORQ_REG_DPM_CID_OFST 0x170030 -/* [RW 12] The threshold of the DQ FIFO to send the almost full interrupt. */ -#define DORQ_REG_DQ_FIFO_AFULL_TH 0x17007c -/* [RW 12] The threshold of the DQ FIFO to send the full interrupt. */ -#define DORQ_REG_DQ_FIFO_FULL_TH 0x170078 /* [R 13] Current value of the DQ FIFO fill level according to following - pointer. The range is 0 - 256 FIFO rows; where each row stands for the - doorbell. */ + * pointer. The range is 0 - 256 FIFO rows; where each row stands for the + * doorbell. */ #define DORQ_REG_DQ_FILL_LVLF 0x1700a4 /* [R 1] DQ FIFO full status. Is set; when FIFO filling level is more or - equal to full threshold; reset on full clear. */ + * equal to full threshold; reset on full clear. */ #define DORQ_REG_DQ_FULL_ST 0x1700c0 -/* [RW 28] The value sent to CM header in the case of CFC load error. */ -#define DORQ_REG_ERR_CMHEAD 0x170058 -#define DORQ_REG_IF_EN 0x170004 -#define DORQ_REG_MAX_RVFID_SIZE 0x1701ec -#define DORQ_REG_MODE_ACT 0x170008 +#define DORQ_REG_MAX_RVFID_SIZE 0x1701ec /* [RW 5] The normal mode CID extraction offset. */ #define DORQ_REG_NORM_CID_OFST 0x17002c -/* [RW 28] TCM Header when only TCP context is loaded. */ -#define DORQ_REG_NORM_CMHEAD_TX 0x17004c -/* [RW 3] The number of simultaneous outstanding requests to Context Fetch - Interface. */ -#define DORQ_REG_OUTST_REQ 0x17003c #define DORQ_REG_PF_USAGE_CNT 0x1701d0 -#define DORQ_REG_REGN 0x170038 /* [R 4] Current value of response A counter credit. Initial credit is - configured through write to ~dorq_registers_rsp_init_crd.rsp_init_crd - register. */ + * configured through write to ~dorq_registers_rsp_init_crd.rsp_init_crd + * register. */ #define DORQ_REG_RSPA_CRD_CNT 0x1700ac /* [R 4] Current value of response B counter credit. Initial credit is - configured through write to ~dorq_registers_rsp_init_crd.rsp_init_crd - register. */ + * configured through write to ~dorq_registers_rsp_init_crd.rsp_init_crd + * register. */ #define DORQ_REG_RSPB_CRD_CNT 0x1700b0 -/* [RW 4] The initial credit at the Doorbell Response Interface. The write - writes the same initial credit to the rspa_crd_cnt and rspb_crd_cnt. The - read reads this written value. */ -#define DORQ_REG_RSP_INIT_CRD 0x170048 -/* [RW 4] Initial activity counter value on the load request; when the - shortcut is done. */ -#define DORQ_REG_SHRT_ACT_CNT 0x170070 -/* [RW 28] TCM Header when both ULP and TCP context is loaded. */ -#define DORQ_REG_SHRT_CMHEAD 0x170054 #define DORQ_REG_VF_NORM_CID_BASE 0x1701a0 #define DORQ_REG_VF_NORM_CID_OFST 0x1701f4 #define DORQ_REG_VF_NORM_CID_WND_SIZE 0x1701a4 #define DORQ_REG_VF_NORM_MAX_CID_COUNT 0x1701e4 #define DORQ_REG_VF_NORM_VF_BASE 0x1701a8 /* [RW 10] VF type validation mask value */ -#define DORQ_REG_VF_TYPE_MASK_0 0x170218 +#define DORQ_REG_VF_TYPE_MASK_0 0x170218 /* [RW 17] VF type validation Min MCID value */ #define DORQ_REG_VF_TYPE_MAX_MCID_0 0x1702d8 /* [RW 17] VF type validation Max MCID value */ @@ -870,125 +407,94 @@ #define DORQ_REG_VF_USAGE_CNT 0x170320 #define DORQ_REG_VF_USAGE_CT_LIMIT 0x170340 #define HC_CONFIG_0_REG_ATTN_BIT_EN_0 (0x1<<4) +#define HC_CONFIG_0_REG_BLOCK_DISABLE_0 (0x1<<0) #define HC_CONFIG_0_REG_INT_LINE_EN_0 (0x1<<3) #define HC_CONFIG_0_REG_MSI_ATTN_EN_0 (0x1<<7) #define HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 (0x1<<2) -#define HC_CONFIG_0_REG_SINGLE_ISR_EN_0 (0x1<<1) +#define HC_CONFIG_0_REG_SINGLE_ISR_EN_0 (0x1<<1) +#define HC_CONFIG_1_REG_BLOCK_DISABLE_1 (0x1<<0) #define HC_REG_AGG_INT_0 0x108050 -#define HC_REG_AGG_INT_1 0x108054 -#define HC_REG_ATTN_BIT 0x108120 -#define HC_REG_ATTN_IDX 0x108100 -#define HC_REG_ATTN_MSG0_ADDR_L 0x108018 -#define HC_REG_ATTN_MSG1_ADDR_L 0x108020 -#define HC_REG_ATTN_NUM_P0 0x108038 -#define HC_REG_ATTN_NUM_P1 0x10803c +#define HC_REG_ATTN_MSG0_ADDR_L 0x108018 +#define HC_REG_ATTN_MSG1_ADDR_L 0x108020 #define HC_REG_COMMAND_REG 0x108180 -#define HC_REG_CONFIG_0 0x108000 -#define HC_REG_CONFIG_1 0x108004 -#define HC_REG_FUNC_NUM_P0 0x1080ac -#define HC_REG_FUNC_NUM_P1 0x1080b0 +#define HC_REG_CONFIG_0 0x108000 +#define HC_REG_CONFIG_1 0x108004 /* [RW 3] Parity mask register #0 read/write */ #define HC_REG_HC_PRTY_MASK 0x1080a0 /* [R 3] Parity register #0 read */ #define HC_REG_HC_PRTY_STS 0x108094 /* [RC 3] Parity register #0 read clear */ #define HC_REG_HC_PRTY_STS_CLR 0x108098 -#define HC_REG_INT_MASK 0x108108 +#define HC_REG_INT_MASK 0x108108 #define HC_REG_LEADING_EDGE_0 0x108040 -#define HC_REG_LEADING_EDGE_1 0x108048 #define HC_REG_MAIN_MEMORY 0x108800 -#define HC_REG_MAIN_MEMORY_SIZE 152 -#define HC_REG_P0_PROD_CONS 0x108200 -#define HC_REG_P1_PROD_CONS 0x108400 -#define HC_REG_PBA_COMMAND 0x108140 -#define HC_REG_PCI_CONFIG_0 0x108010 -#define HC_REG_PCI_CONFIG_1 0x108014 -#define HC_REG_STATISTIC_COUNTERS 0x109000 +#define HC_REG_MAIN_MEMORY_SIZE 152 #define HC_REG_TRAILING_EDGE_0 0x108044 -#define HC_REG_TRAILING_EDGE_1 0x10804c -#define HC_REG_UC_RAM_ADDR_0 0x108028 -#define HC_REG_UC_RAM_ADDR_1 0x108030 -#define HC_REG_USTORM_ADDR_FOR_COALESCE 0x108068 -#define HC_REG_VQID_0 0x108008 -#define HC_REG_VQID_1 0x10800c #define IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN (0x1<<1) +#define IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE (0x1<<0) #define IGU_REG_ATTENTION_ACK_BITS 0x130108 /* [R 4] Debug: attn_fsm */ #define IGU_REG_ATTN_FSM 0x130054 -#define IGU_REG_ATTN_MSG_ADDR_H 0x13011c -#define IGU_REG_ATTN_MSG_ADDR_L 0x130120 +#define IGU_REG_ATTN_MSG_ADDR_H 0x13011c +#define IGU_REG_ATTN_MSG_ADDR_L 0x130120 /* [R 4] Debug: [3] - attention write done message is pending (0-no pending; - 1-pending). [2:0] = PFID. Pending means attention message was sent; but - write done didnt receive. */ -#define IGU_REG_ATTN_WRITE_DONE_PENDING 0x130030 + * 1-pending). [2:0] = PFID. Pending means attention message was sent; but + * write done didnt receive. */ +#define IGU_REG_ATTN_WRITE_DONE_PENDING 0x130030 #define IGU_REG_BLOCK_CONFIGURATION 0x130000 #define IGU_REG_COMMAND_REG_32LSB_DATA 0x130124 #define IGU_REG_COMMAND_REG_CTRL 0x13012c /* [WB_R 32] Cleanup bit status per SB. 1 = cleanup is set. 0 = cleanup bit - is clear. The bits in this registers are set and clear via the producer - command. Data valid only in addresses 0-4. all the rest are zero. */ + * is clear. The bits in this registers are set and clear via the producer + * command. Data valid only in addresses 0-4. all the rest are zero. */ #define IGU_REG_CSTORM_TYPE_0_SB_CLEANUP 0x130200 /* [R 5] Debug: ctrl_fsm */ #define IGU_REG_CTRL_FSM 0x130064 /* [R 1] data availble for error memory. If this bit is clear do not red - from error_handling_memory. */ + * from error_handling_memory. */ #define IGU_REG_ERROR_HANDLING_DATA_VALID 0x130130 -/* [WB_R 64] Do not read from this memory if error_handling_data_valid - register is zero. The data is collected in according to the command_debug - value. if command_debug is clear it holds the first 8 error commands as - follows: {wr_data[31:0]; cmd_addr[12:0]; error_type_d[3:0]; cmd_fid[6:0]; - cmd_source; error_source[1:0]; cmd_func_err; cmd_length[2:0]; - cmd_wr_n_rd} . if command_debug is set it holds the last 8 commands to - the IGU (with and without error) as follows: {wr_data[31:0]; - cmd_addr[15:0]; 1b0; cmd_fid[6:0]; cmd_source; error_source[1:0]; - cmd_func_err; cmd_length[2:0]; cmd_wr_n_rd}. cmd_source - the source - field in PXP command. VFID is encoded: PF? {4b1000; PFID} : {1b0; VFID}. - error_source[1:0] - pxp - 0; grc - 1; attn - 2. cmd_func_err - func_err - field in PXP command. cmd_length[2:0] - length in PXP command. - cmd_wr_n_rd: 0 - read; 1 - write. error_type_d[3:0] :1 - length > ; 2 - - command to disable function; 3 - VF command to attn bits. 4 - host - tries to update prod. 5 - during read from MIMD function; 6 -segment not - match; 7 - attn prod upd; 9 - SB index not valid; 10 - FID + vector num - not found; 11 - FID not match; 12 - VF tries to access attn command. */ -#define IGU_REG_ERROR_HANDLING_MEMORY 0x130178 +/* [RW 11] Parity mask register #0 read/write */ +#define IGU_REG_IGU_PRTY_MASK 0x1300a8 /* [R 11] Parity register #0 read */ #define IGU_REG_IGU_PRTY_STS 0x13009c +/* [RC 11] Parity register #0 read clear */ +#define IGU_REG_IGU_PRTY_STS_CLR 0x1300a0 /* [R 4] Debug: int_handle_fsm */ #define IGU_REG_INT_HANDLE_FSM 0x130050 #define IGU_REG_LEADING_EDGE_LATCH 0x130134 /* [RW 14] mapping CAM; relevant for E2 operating mode only. [0] - valid. - [6:1] - vector number; [13:7] - FID (if VF - [13] = 0; [12:7] = VF - number; if PF - [13] = 1; [12:10] = 0; [9:7] = PF number); */ + * [6:1] - vector number; [13:7] - FID (if VF - [13] = 0; [12:7] = VF + * number; if PF - [13] = 1; [12:10] = 0; [9:7] = PF number); */ #define IGU_REG_MAPPING_MEMORY 0x131000 #define IGU_REG_MAPPING_MEMORY_SIZE 136 #define IGU_REG_PBA_STATUS_LSB 0x130138 #define IGU_REG_PBA_STATUS_MSB 0x13013c -#define IGU_REG_PCI_PF_MSI_EN 0x130140 #define IGU_REG_PCI_PF_MSIX_EN 0x130144 #define IGU_REG_PCI_PF_MSIX_FUNC_MASK 0x130148 +#define IGU_REG_PCI_PF_MSI_EN 0x130140 /* [WB_R 32] Each bit represent the pending bits status for that SB. 0 = no - pending; 1 = pending. Pendings means interrupt was asserted; and write - done was not received. Data valid only in addresses 0-4. all the rest are - zero. */ + * pending; 1 = pending. Pendings means interrupt was asserted; and write + * done was not received. Data valid only in addresses 0-4. all the rest are + * zero. */ #define IGU_REG_PENDING_BITS_STATUS 0x130300 #define IGU_REG_PF_CONFIGURATION 0x130154 /* [RW 20] producers only. E2 mode: address 0-135 match to the mapping - memory; 136 - PF0 default prod; 137 PF1 default prod; 138 - PF2 default - prod; 139 PF3 default prod; 140 - PF0 - ATTN prod; 141 - PF1 - ATTN prod; - 142 - PF2 - ATTN prod; 143 - PF3 - ATTN prod; 144-147 reserved. E1.5 mode - - In backward compatible mode; for non default SB; each even line in the - memory holds the U producer and each odd line hold the C producer. The - first 128 producer are for NDSB (PF0 - 0-31; PF1 - 32-63 and so on). The - last 20 producers are for the DSB for each PF. each PF has five segments - (the order inside each segment is PF0; PF1; PF2; PF3) - 128-131 U prods; - 132-135 C prods; 136-139 X prods; 140-143 T prods; 144-147 ATTN prods; */ + * memory; 136 - PF0 default prod; 137 PF1 default prod; 138 - PF2 default + * prod; 139 PF3 default prod; 140 - PF0 - ATTN prod; 141 - PF1 - ATTN prod; + * 142 - PF2 - ATTN prod; 143 - PF3 - ATTN prod; 144-147 reserved. E1.5 mode + * - In backward compatible mode; for non default SB; each even line in the + * memory holds the U producer and each odd line hold the C producer. The + * first 128 producer are for NDSB (PF0 - 0-31; PF1 - 32-63 and so on). The + * last 20 producers are for the DSB for each PF. each PF has five segments + * (the order inside each segment is PF0; PF1; PF2; PF3) - 128-131 U prods; + * 132-135 C prods; 136-139 X prods; 140-143 T prods; 144-147 ATTN prods; */ #define IGU_REG_PROD_CONS_MEMORY 0x132000 /* [R 3] Debug: pxp_arb_fsm */ #define IGU_REG_PXP_ARB_FSM 0x130068 /* [RW 6] Write one for each bit will reset the appropriate memory. When the - memory reset finished the appropriate bit will be clear. Bit 0 - mapping - memory; Bit 1 - SB memory; Bit 2 - SB interrupt and mask register; Bit 3 - - MSIX memory; Bit 4 - PBA memory; Bit 5 - statistics; */ + * memory reset finished the appropriate bit will be clear. Bit 0 - mapping + * memory; Bit 1 - SB memory; Bit 2 - SB interrupt and mask register; Bit 3 + * - MSIX memory; Bit 4 - PBA memory; Bit 5 - statistics; */ #define IGU_REG_RESET_MEMORIES 0x130158 /* [R 4] Debug: sb_ctrl_fsm */ #define IGU_REG_SB_CTRL_FSM 0x13004c @@ -997,456 +503,275 @@ #define IGU_REG_SB_MASK_LSB 0x130164 #define IGU_REG_SB_MASK_MSB 0x130168 /* [RW 16] Number of command that were dropped without causing an interrupt - due to: read access for WO BAR address; or write access for RO BAR - address or any access for reserved address or PCI function error is set - and address is not MSIX; PBA or cleanup */ + * due to: read access for WO BAR address; or write access for RO BAR + * address or any access for reserved address or PCI function error is set + * and address is not MSIX; PBA or cleanup */ #define IGU_REG_SILENT_DROP 0x13016c /* [RW 10] Number of MSI/MSIX/ATTN messages sent for the function: 0-63 - - number of MSIX messages per VF; 64-67 - number of MSI/MSIX messages per - PF; 68-71 number of ATTN messages per PF */ + * number of MSIX messages per VF; 64-67 - number of MSI/MSIX messages per + * PF; 68-71 number of ATTN messages per PF */ #define IGU_REG_STATISTIC_NUM_MESSAGE_SENT 0x130800 -/* [RW 32] Number of cycles the timer mask masking the IGU interrupt when a - timer mask command arrives. Value must be bigger than 100. */ -#define IGU_REG_TIMER_MASKING_VALUE 0x13003c #define IGU_REG_TRAILING_EDGE_LATCH 0x130104 #define IGU_REG_VF_CONFIGURATION 0x130170 /* [WB_R 32] Each bit represent write done pending bits status for that SB - (MSI/MSIX message was sent and write done was not received yet). 0 = - clear; 1 = set. Data valid only in addresses 0-4. all the rest are zero. */ + * (MSI/MSIX message was sent and write done was not received yet). 0 = + * clear; 1 = set. Data valid only in addresses 0-4. all the rest are zero. */ #define IGU_REG_WRITE_DONE_PENDING 0x130480 #define MCP_A_REG_MCPR_SCRATCH 0x3a0000 +#define MCP_REG_MCPR_ACCESS_LOCK 0x8009c +#define MCP_REG_MCPR_CPU_PROGRAM_COUNTER 0x8501c +#define MCP_REG_MCPR_GP_INPUTS 0x800c0 +#define MCP_REG_MCPR_GP_OENABLE 0x800c8 +#define MCP_REG_MCPR_GP_OUTPUTS 0x800c4 +#define MCP_REG_MCPR_IMC_COMMAND 0x85900 +#define MCP_REG_MCPR_IMC_DATAREG0 0x85920 +#define MCP_REG_MCPR_IMC_SLAVE_CONTROL 0x85904 #define MCP_REG_MCPR_NVM_ACCESS_ENABLE 0x86424 #define MCP_REG_MCPR_NVM_ADDR 0x8640c #define MCP_REG_MCPR_NVM_CFG4 0x8642c #define MCP_REG_MCPR_NVM_COMMAND 0x86400 #define MCP_REG_MCPR_NVM_READ 0x86410 -#define MCP_REG_MCPR_NVM_SW_ARB 0x86420 +#define MCP_REG_MCPR_NVM_SW_ARB 0x86420 #define MCP_REG_MCPR_NVM_WRITE 0x86408 #define MCP_REG_MCPR_SCRATCH 0xa0000 #define MISC_AEU_GENERAL_MASK_REG_AEU_NIG_CLOSE_MASK (0x1<<1) #define MISC_AEU_GENERAL_MASK_REG_AEU_PXP_CLOSE_MASK (0x1<<0) /* [R 32] read first 32 bit after inversion of function 0. mapped as - follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; - [6] GPIO1 function 1; [7] GPIO2 function 1; [8] GPIO3 function 1; [9] - GPIO4 function 1; [10] PCIE glue/PXP VPD event function0; [11] PCIE - glue/PXP VPD event function1; [12] PCIE glue/PXP Expansion ROM event0; - [13] PCIE glue/PXP Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] - MSI/X indication for mcp; [17] MSI/X indication for function 1; [18] BRB - Parity error; [19] BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw - interrupt; [22] SRC Parity error; [23] SRC Hw interrupt; [24] TSDM Parity - error; [25] TSDM Hw interrupt; [26] TCM Parity error; [27] TCM Hw - interrupt; [28] TSEMI Parity error; [29] TSEMI Hw interrupt; [30] PBF - Parity error; [31] PBF Hw interrupt; */ + * follows: [0] NIG attention for function0; [1] NIG attention for + * function1; [2] GPIO1 mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; + * [6] GPIO1 function 1; [7] GPIO2 function 1; [8] GPIO3 function 1; [9] + * GPIO4 function 1; [10] PCIE glue/PXP VPD event function0; [11] PCIE + * glue/PXP VPD event function1; [12] PCIE glue/PXP Expansion ROM event0; + * [13] PCIE glue/PXP Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] + * MSI/X indication for mcp; [17] MSI/X indication for function 1; [18] BRB + * Parity error; [19] BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw + * interrupt; [22] SRC Parity error; [23] SRC Hw interrupt; [24] TSDM Parity + * error; [25] TSDM Hw interrupt; [26] TCM Parity error; [27] TCM Hw + * interrupt; [28] TSEMI Parity error; [29] TSEMI Hw interrupt; [30] + * PBClient Parity error; [31] PBClient Hw interrupt; */ #define MISC_REG_AEU_AFTER_INVERT_1_FUNC_0 0xa42c #define MISC_REG_AEU_AFTER_INVERT_1_FUNC_1 0xa430 /* [R 32] read first 32 bit after inversion of mcp. mapped as follows: [0] - NIG attention for function0; [1] NIG attention for function1; [2] GPIO1 - mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; - [7] GPIO2 function 1; [8] GPIO3 function 1; [9] GPIO4 function 1; [10] - PCIE glue/PXP VPD event function0; [11] PCIE glue/PXP VPD event - function1; [12] PCIE glue/PXP Expansion ROM event0; [13] PCIE glue/PXP - Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] MSI/X indication for - mcp; [17] MSI/X indication for function 1; [18] BRB Parity error; [19] - BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC - Parity error; [23] SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw - interrupt; [26] TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI - Parity error; [29] TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw - interrupt; */ -#define MISC_REG_AEU_AFTER_INVERT_1_MCP 0xa434 + * NIG attention for function0; [1] NIG attention for function1; [2] GPIO1 + * mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; + * [7] GPIO2 function 1; [8] GPIO3 function 1; [9] GPIO4 function 1; [10] + * PCIE glue/PXP VPD event function0; [11] PCIE glue/PXP VPD event + * function1; [12] PCIE glue/PXP Expansion ROM event0; [13] PCIE glue/PXP + * Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] MSI/X indication for + * mcp; [17] MSI/X indication for function 1; [18] BRB Parity error; [19] + * BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC + * Parity error; [23] SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw + * interrupt; [26] TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI + * Parity error; [29] TSEMI Hw interrupt; [30] PBClient Parity error; [31] + * PBClient Hw interrupt; */ +#define MISC_REG_AEU_AFTER_INVERT_1_MCP 0xa434 /* [R 32] read second 32 bit after inversion of function 0. mapped as - follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ + * follows: [0] PBF Parity error; [1] PBF Hw interrupt; [2] QM Parity error; + * [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw interrupt; + * [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity error; [9] + * XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw interrupt; [12] + * DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] NIG Parity + * error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; [17] Vaux + * PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw interrupt; + * [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM Parity error; + * [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI Hw interrupt; + * [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM Parity error; + * [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw interrupt; */ #define MISC_REG_AEU_AFTER_INVERT_2_FUNC_0 0xa438 #define MISC_REG_AEU_AFTER_INVERT_2_FUNC_1 0xa43c /* [R 32] read second 32 bit after inversion of mcp. mapped as follows: [0] - PBClient Parity error; [1] PBClient Hw interrupt; [2] QM Parity error; - [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw interrupt; - [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity error; [9] - XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw interrupt; [12] - DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] NIG Parity - error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; [17] Vaux - PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw interrupt; - [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM Parity error; - [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI Hw interrupt; - [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM Parity error; - [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw interrupt; */ -#define MISC_REG_AEU_AFTER_INVERT_2_MCP 0xa440 + * PBF Parity error; [1] PBF Hw interrupt; [2] QM Parity error; [3] QM Hw + * interrupt; [4] Timers Parity error; [5] Timers Hw interrupt; [6] XSDM + * Parity error; [7] XSDM Hw interrupt; [8] XCM Parity error; [9] XCM Hw + * interrupt; [10] XSEMI Parity error; [11] XSEMI Hw interrupt; [12] + * DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] NIG Parity + * error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; [17] Vaux + * PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw interrupt; + * [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM Parity error; + * [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI Hw interrupt; + * [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM Parity error; + * [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw interrupt; */ +#define MISC_REG_AEU_AFTER_INVERT_2_MCP 0xa440 /* [R 32] read third 32 bit after inversion of function 0. mapped as - follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP Parity - error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; [5] - PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ + * follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP Parity + * error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; [5] + * PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw + * interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity + * error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) + * Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] + * pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] + * MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] + * SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW + * timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 + * func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General + * attn1; */ #define MISC_REG_AEU_AFTER_INVERT_3_FUNC_0 0xa444 #define MISC_REG_AEU_AFTER_INVERT_3_FUNC_1 0xa448 /* [R 32] read third 32 bit after inversion of mcp. mapped as follows: [0] - CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP Parity error; [3] PXP - Hw interrupt; [4] PXPpciClockClient Parity error; [5] PXPpciClockClient - Hw interrupt; [6] CFC Parity error; [7] CFC Hw interrupt; [8] CDU Parity - error; [9] CDU Hw interrupt; [10] DMAE Parity error; [11] DMAE Hw - interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) Hw interrupt; [14] - MISC Parity error; [15] MISC Hw interrupt; [16] pxp_misc_mps_attn; [17] - Flash event; [18] SMB event; [19] MCP attn0; [20] MCP attn1; [21] SW - timers attn_1 func0; [22] SW timers attn_2 func0; [23] SW timers attn_3 - func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW timers attn_1 - func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 func1; [29] SW - timers attn_4 func1; [30] General attn0; [31] General attn1; */ -#define MISC_REG_AEU_AFTER_INVERT_3_MCP 0xa44c + * CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP Parity error; [3] PXP + * Hw interrupt; [4] PXPpciClockClient Parity error; [5] PXPpciClockClient + * Hw interrupt; [6] CFC Parity error; [7] CFC Hw interrupt; [8] CDU Parity + * error; [9] CDU Hw interrupt; [10] DMAE Parity error; [11] DMAE Hw + * interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) Hw interrupt; [14] + * MISC Parity error; [15] MISC Hw interrupt; [16] pxp_misc_mps_attn; [17] + * Flash event; [18] SMB event; [19] MCP attn0; [20] MCP attn1; [21] SW + * timers attn_1 func0; [22] SW timers attn_2 func0; [23] SW timers attn_3 + * func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW timers attn_1 + * func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 func1; [29] SW + * timers attn_4 func1; [30] General attn0; [31] General attn1; */ +#define MISC_REG_AEU_AFTER_INVERT_3_MCP 0xa44c /* [R 32] read fourth 32 bit after inversion of function 0. mapped as - follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_AFTER_INVERT_4_FUNC_0 0xa450 #define MISC_REG_AEU_AFTER_INVERT_4_FUNC_1 0xa454 /* [R 32] read fourth 32 bit after inversion of mcp. mapped as follows: [0] - General attn2; [1] General attn3; [2] General attn4; [3] General attn5; - [4] General attn6; [5] General attn7; [6] General attn8; [7] General - attn9; [8] General attn10; [9] General attn11; [10] General attn12; [11] - General attn13; [12] General attn14; [13] General attn15; [14] General - attn16; [15] General attn17; [16] General attn18; [17] General attn19; - [18] General attn20; [19] General attn21; [20] Main power interrupt; [21] - RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN Latched attn; [24] - RBCU Latched attn; [25] RBCP Latched attn; [26] GRC Latched timeout - attention; [27] GRC Latched reserved access attention; [28] MCP Latched - rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP Latched - ump_tx_parity; [31] MCP Latched scpad_parity; */ -#define MISC_REG_AEU_AFTER_INVERT_4_MCP 0xa458 + * General attn2; [1] General attn3; [2] General attn4; [3] General attn5; + * [4] General attn6; [5] General attn7; [6] General attn8; [7] General + * attn9; [8] General attn10; [9] General attn11; [10] General attn12; [11] + * General attn13; [12] General attn14; [13] General attn15; [14] General + * attn16; [15] General attn17; [16] General attn18; [17] General attn19; + * [18] General attn20; [19] General attn21; [20] Main power interrupt; [21] + * RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN Latched attn; [24] + * RBCU Latched attn; [25] RBCP Latched attn; [26] GRC Latched timeout + * attention; [27] GRC Latched reserved access attention; [28] MCP Latched + * rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP Latched + * ump_tx_parity; [31] MCP Latched scpad_parity; */ +#define MISC_REG_AEU_AFTER_INVERT_4_MCP 0xa458 /* [R 32] Read fifth 32 bit after inversion of function 0. Mapped as - follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ + * follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC + * attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] + * mstat0 attention; [7] mstat0 parity; [8] mstat1 attention; [9] mstat1 + * parity; [31-10] Reserved; */ #define MISC_REG_AEU_AFTER_INVERT_5_FUNC_0 0xa700 /* [W 14] write to this register results with the clear of the latched - signals; one in d0 clears RBCR latch; one in d1 clears RBCT latch; one in - d2 clears RBCN latch; one in d3 clears RBCU latch; one in d4 clears RBCP - latch; one in d5 clears GRC Latched timeout attention; one in d6 clears - GRC Latched reserved access attention; one in d7 clears Latched - rom_parity; one in d8 clears Latched ump_rx_parity; one in d9 clears - Latched ump_tx_parity; one in d10 clears Latched scpad_parity (both - ports); one in d11 clears pxpv_misc_mps_attn; one in d12 clears - pxp_misc_exp_rom_attn0; one in d13 clears pxp_misc_exp_rom_attn1; read - from this register return zero */ + * signals; one in d0 clears RBCR latch; one in d1 clears RBCT latch; one in + * d2 clears RBCN latch; one in d3 clears RBCU latch; one in d4 clears RBCP + * latch; one in d5 clears GRC Latched timeout attention; one in d6 clears + * GRC Latched reserved access attention; one in d7 clears Latched + * rom_parity; one in d8 clears Latched ump_rx_parity; one in d9 clears + * Latched ump_tx_parity; one in d10 clears Latched scpad_parity (both + * ports); one in d11 clears pxpv_misc_mps_attn; one in d12 clears + * pxp_misc_exp_rom_attn0; one in d13 clears pxp_misc_exp_rom_attn1; read + * from this register return zero */ #define MISC_REG_AEU_CLR_LATCH_SIGNAL 0xa45c /* [RW 32] first 32b for enabling the output for function 0 output0. mapped - as follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 function 0; [3] GPIO2 function 0; [4] GPIO3 function - 0; [5] GPIO4 function 0; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] - GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for function 0; [17] MSI/X - indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; - [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] - SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] - TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] - TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ + * as follows: [0] NIG attention for function0; [1] NIG attention for + * function1; [2] GPIO1 function 0; [3] GPIO2 function 0; [4] GPIO3 function + * 0; [5] GPIO4 function 0; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] + * GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event + * function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP + * Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] + * SPIO4; [15] SPIO5; [16] MSI/X indication for function 0; [17] MSI/X + * indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; + * [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] + * SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] + * TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] + * TSEMI Hw interrupt; [30] PBClient Parity error; [31] PBClient Hw + * interrupt; */ #define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0 0xa06c #define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_1 0xa07c #define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_2 0xa08c -#define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_3 0xa09c -#define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_5 0xa0bc -#define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_6 0xa0cc -#define MISC_REG_AEU_ENABLE1_FUNC_0_OUT_7 0xa0dc /* [RW 32] first 32b for enabling the output for function 1 output0. mapped - as follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 function 1; [3] GPIO2 function 1; [4] GPIO3 function - 1; [5] GPIO4 function 1; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] - GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for function 1; [17] MSI/X - indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; - [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] - SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] - TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] - TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ + * as follows: [0] NIG attention for function0; [1] NIG attention for + * function1; [2] GPIO1 function 1; [3] GPIO2 function 1; [4] GPIO3 function + * 1; [5] GPIO4 function 1; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] + * GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event + * function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP + * Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] + * SPIO4; [15] SPIO5; [16] MSI/X indication for function 1; [17] MSI/X + * indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; + * [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] + * SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] + * TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] + * TSEMI Hw interrupt; [30] PBClient Parity error; [31] PBClient Hw + * interrupt; */ #define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 0xa10c #define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_1 0xa11c #define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_2 0xa12c -#define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_3 0xa13c -#define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_5 0xa15c -#define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_6 0xa16c -#define MISC_REG_AEU_ENABLE1_FUNC_1_OUT_7 0xa17c -/* [RW 32] first 32b for enabling the output for close the gate nig. Mapped - as follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 function 0; [3] GPIO2 function 0; [4] GPIO3 function - 0; [5] GPIO4 function 0; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] - GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for function 0; [17] MSI/X - indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; - [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] - SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] - TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] - TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ -#define MISC_REG_AEU_ENABLE1_NIG_0 0xa0ec -#define MISC_REG_AEU_ENABLE1_NIG_1 0xa18c -/* [RW 32] first 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] NIG attention for function0; [1] NIG attention for - function1; [2] GPIO1 function 0; [3] GPIO2 function 0; [4] GPIO3 function - 0; [5] GPIO4 function 0; [6] GPIO1 function 1; [7] GPIO2 function 1; [8] - GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for function 0; [17] MSI/X - indication for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; - [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] - SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] - TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] - TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ -#define MISC_REG_AEU_ENABLE1_PXP_0 0xa0fc -#define MISC_REG_AEU_ENABLE1_PXP_1 0xa19c -/* [RW 32] second 32b for enabling the output for function 0 output0. mapped - as follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ -#define MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0 0xa070 -#define MISC_REG_AEU_ENABLE2_FUNC_0_OUT_1 0xa080 -/* [RW 32] second 32b for enabling the output for function 1 output0. mapped - as follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ -#define MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0 0xa110 -#define MISC_REG_AEU_ENABLE2_FUNC_1_OUT_1 0xa120 -/* [RW 32] second 32b for enabling the output for close the gate nig. Mapped - as follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ -#define MISC_REG_AEU_ENABLE2_NIG_0 0xa0f0 -#define MISC_REG_AEU_ENABLE2_NIG_1 0xa190 -/* [RW 32] second 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM - Parity error; [3] QM Hw interrupt; [4] Timers Parity error; [5] Timers Hw - interrupt; [6] XSDM Parity error; [7] XSDM Hw interrupt; [8] XCM Parity - error; [9] XCM Hw interrupt; [10] XSEMI Parity error; [11] XSEMI Hw - interrupt; [12] DoorbellQ Parity error; [13] DoorbellQ Hw interrupt; [14] - NIG Parity error; [15] NIG Hw interrupt; [16] Vaux PCI core Parity error; - [17] Vaux PCI core Hw interrupt; [18] Debug Parity error; [19] Debug Hw - interrupt; [20] USDM Parity error; [21] USDM Hw interrupt; [22] UCM - Parity error; [23] UCM Hw interrupt; [24] USEMI Parity error; [25] USEMI - Hw interrupt; [26] UPB Parity error; [27] UPB Hw interrupt; [28] CSDM - Parity error; [29] CSDM Hw interrupt; [30] CCM Parity error; [31] CCM Hw - interrupt; */ -#define MISC_REG_AEU_ENABLE2_PXP_0 0xa100 -#define MISC_REG_AEU_ENABLE2_PXP_1 0xa1a0 -/* [RW 32] third 32b for enabling the output for function 0 output0. mapped - as follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP - Parity error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; - [5] PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ -#define MISC_REG_AEU_ENABLE3_FUNC_0_OUT_0 0xa074 -#define MISC_REG_AEU_ENABLE3_FUNC_0_OUT_1 0xa084 -/* [RW 32] third 32b for enabling the output for function 1 output0. mapped - as follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP - Parity error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; - [5] PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ -#define MISC_REG_AEU_ENABLE3_FUNC_1_OUT_0 0xa114 -#define MISC_REG_AEU_ENABLE3_FUNC_1_OUT_1 0xa124 -/* [RW 32] third 32b for enabling the output for close the gate nig. Mapped - as follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP - Parity error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; - [5] PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ -#define MISC_REG_AEU_ENABLE3_NIG_0 0xa0f4 -#define MISC_REG_AEU_ENABLE3_NIG_1 0xa194 -/* [RW 32] third 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] CSEMI Parity error; [1] CSEMI Hw interrupt; [2] PXP - Parity error; [3] PXP Hw interrupt; [4] PXPpciClockClient Parity error; - [5] PXPpciClockClient Hw interrupt; [6] CFC Parity error; [7] CFC Hw - interrupt; [8] CDU Parity error; [9] CDU Hw interrupt; [10] DMAE Parity - error; [11] DMAE Hw interrupt; [12] IGU (HC) Parity error; [13] IGU (HC) - Hw interrupt; [14] MISC Parity error; [15] MISC Hw interrupt; [16] - pxp_misc_mps_attn; [17] Flash event; [18] SMB event; [19] MCP attn0; [20] - MCP attn1; [21] SW timers attn_1 func0; [22] SW timers attn_2 func0; [23] - SW timers attn_3 func0; [24] SW timers attn_4 func0; [25] PERST; [26] SW - timers attn_1 func1; [27] SW timers attn_2 func1; [28] SW timers attn_3 - func1; [29] SW timers attn_4 func1; [30] General attn0; [31] General - attn1; */ -#define MISC_REG_AEU_ENABLE3_PXP_0 0xa104 -#define MISC_REG_AEU_ENABLE3_PXP_1 0xa1a4 /* [RW 32] fourth 32b for enabling the output for function 0 output0.mapped - as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0 0xa078 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_2 0xa098 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_4 0xa0b8 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_5 0xa0c8 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_6 0xa0d8 -#define MISC_REG_AEU_ENABLE4_FUNC_0_OUT_7 0xa0e8 /* [RW 32] fourth 32b for enabling the output for function 1 output0.mapped - as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0 0xa118 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_2 0xa138 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_4 0xa158 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_5 0xa168 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_6 0xa178 -#define MISC_REG_AEU_ENABLE4_FUNC_1_OUT_7 0xa188 /* [RW 32] fourth 32b for enabling the output for close the gate nig. Mapped - as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_NIG_0 0xa0f8 #define MISC_REG_AEU_ENABLE4_NIG_1 0xa198 /* [RW 32] fourth 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] - General attn5; [4] General attn6; [5] General attn7; [6] General attn8; - [7] General attn9; [8] General attn10; [9] General attn11; [10] General - attn12; [11] General attn13; [12] General attn14; [13] General attn15; - [14] General attn16; [15] General attn17; [16] General attn18; [17] - General attn19; [18] General attn20; [19] General attn21; [20] Main power - interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN - Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC - Latched timeout attention; [27] GRC Latched reserved access attention; - [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP - Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ + * as follows: [0] General attn2; [1] General attn3; [2] General attn4; [3] + * General attn5; [4] General attn6; [5] General attn7; [6] General attn8; + * [7] General attn9; [8] General attn10; [9] General attn11; [10] General + * attn12; [11] General attn13; [12] General attn14; [13] General attn15; + * [14] General attn16; [15] General attn17; [16] General attn18; [17] + * General attn19; [18] General attn20; [19] General attn21; [20] Main power + * interrupt; [21] RBCR Latched attn; [22] RBCT Latched attn; [23] RBCN + * Latched attn; [24] RBCU Latched attn; [25] RBCP Latched attn; [26] GRC + * Latched timeout attention; [27] GRC Latched reserved access attention; + * [28] MCP Latched rom_parity; [29] MCP Latched ump_rx_parity; [30] MCP + * Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_PXP_0 0xa108 #define MISC_REG_AEU_ENABLE4_PXP_1 0xa1a8 /* [RW 32] fifth 32b for enabling the output for function 0 output0. Mapped - as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ + * as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC + * attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] + * mstat0 attention; [7] mstat0 parity; [8] mstat1 attention; [9] mstat1 + * parity; [31-10] Reserved; */ #define MISC_REG_AEU_ENABLE5_FUNC_0_OUT_0 0xa688 -#define MISC_REG_AEU_ENABLE5_FUNC_0_OUT_1 0xa68c /* [RW 32] Fifth 32b for enabling the output for function 1 output0. Mapped - as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ + * as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC + * attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] + * mstat0 attention; [7] mstat0 parity; [8] mstat1 attention; [9] mstat1 + * parity; [31-10] Reserved; */ #define MISC_REG_AEU_ENABLE5_FUNC_1_OUT_0 0xa6b0 -#define MISC_REG_AEU_ENABLE5_FUNC_1_OUT_1 0xa6b4 -/* [RW 32] Fifth 32b for enabling the output for close the gate nig. Mapped - as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ -#define MISC_REG_AEU_ENABLE5_NIG_0 0xa6a8 -/* [RW 32] Fifth 32b for enabling the output for close the gate pxp. Mapped - as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; 6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ -#define MISC_REG_AEU_ENABLE5_PXP_0 0xa6ac -#define MISC_REG_AEU_ENABLE5_PXP_1 0xa6d0 /* [RW 1] set/clr general attention 0; this will set/clr bit 94 in the aeu - 128 bit vector */ + * 128 bit vector */ #define MISC_REG_AEU_GENERAL_ATTN_0 0xa000 #define MISC_REG_AEU_GENERAL_ATTN_1 0xa004 #define MISC_REG_AEU_GENERAL_ATTN_10 0xa028 #define MISC_REG_AEU_GENERAL_ATTN_11 0xa02c #define MISC_REG_AEU_GENERAL_ATTN_12 0xa030 -#define MISC_REG_AEU_GENERAL_ATTN_13 0xa034 -#define MISC_REG_AEU_GENERAL_ATTN_14 0xa038 -#define MISC_REG_AEU_GENERAL_ATTN_15 0xa03c -#define MISC_REG_AEU_GENERAL_ATTN_16 0xa040 -#define MISC_REG_AEU_GENERAL_ATTN_17 0xa044 -#define MISC_REG_AEU_GENERAL_ATTN_18 0xa048 -#define MISC_REG_AEU_GENERAL_ATTN_19 0xa04c #define MISC_REG_AEU_GENERAL_ATTN_2 0xa008 -#define MISC_REG_AEU_GENERAL_ATTN_20 0xa050 -#define MISC_REG_AEU_GENERAL_ATTN_21 0xa054 #define MISC_REG_AEU_GENERAL_ATTN_3 0xa00c #define MISC_REG_AEU_GENERAL_ATTN_4 0xa010 #define MISC_REG_AEU_GENERAL_ATTN_5 0xa014 @@ -1455,428 +780,456 @@ #define MISC_REG_AEU_GENERAL_ATTN_8 0xa020 #define MISC_REG_AEU_GENERAL_ATTN_9 0xa024 #define MISC_REG_AEU_GENERAL_MASK 0xa61c -/* [RW 32] first 32b for inverting the input for function 0; for each bit: - 0= do not invert; 1= invert; mapped as follows: [0] NIG attention for - function0; [1] NIG attention for function1; [2] GPIO1 mcp; [3] GPIO2 mcp; - [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; [7] GPIO2 function 1; - [8] GPIO3 function 1; [9] GPIO4 function 1; [10] PCIE glue/PXP VPD event - function0; [11] PCIE glue/PXP VPD event function1; [12] PCIE glue/PXP - Expansion ROM event0; [13] PCIE glue/PXP Expansion ROM event1; [14] - SPIO4; [15] SPIO5; [16] MSI/X indication for mcp; [17] MSI/X indication - for function 1; [18] BRB Parity error; [19] BRB Hw interrupt; [20] PRS - Parity error; [21] PRS Hw interrupt; [22] SRC Parity error; [23] SRC Hw - interrupt; [24] TSDM Parity error; [25] TSDM Hw interrupt; [26] TCM - Parity error; [27] TCM Hw interrupt; [28] TSEMI Parity error; [29] TSEMI - Hw interrupt; [30] PBF Parity error; [31] PBF Hw interrupt; */ -#define MISC_REG_AEU_INVERTER_1_FUNC_0 0xa22c -#define MISC_REG_AEU_INVERTER_1_FUNC_1 0xa23c -/* [RW 32] Fifth 32b for inverting the input for function 0; Mapped as - follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC - attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] - CNIG attention (reserved); [7] CNIG parity (reserved); [31-8] Reserved; */ -#define MISC_REG_AEU_INVERTER_5_FUNC_0 0xa6f4 -#define MISC_REG_AEU_INVERTER_5_FUNC_1 0xa6f8 /* [RW 10] [7:0] = mask 8 attention output signals toward IGU function0; - [9:8] = reserved. 0 = mask; 1 = unmask */ + * [9:8] = reserved. 0 = mask; 1 = unmask */ #define MISC_REG_AEU_MASK_ATTN_FUNC_0 0xa060 #define MISC_REG_AEU_MASK_ATTN_FUNC_1 0xa064 /* [RW 1] If set a system kill occurred. Reset on POR reset. */ #define MISC_REG_AEU_SYS_KILL_OCCURRED 0xa610 /* [RW 32] Represent the status of the input vector to the AEU when a system - kill occurred. The register is reset in por reset. Mapped as follows: [0] - NIG attention for function0; [1] NIG attention for function1; [2] GPIO1 - mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; - [7] GPIO2 function 1; [8] GPIO3 function 1; [9] GPIO4 function 1; [10] - PCIE glue/PXP VPD event function0; [11] PCIE glue/PXP VPD event - function1; [12] PCIE glue/PXP Expansion ROM event0; [13] PCIE glue/PXP - Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] MSI/X indication for - mcp; [17] MSI/X indication for function 1; [18] BRB Parity error; [19] - BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC - Parity error; [23] SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw - interrupt; [26] TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI - Parity error; [29] TSEMI Hw interrupt; [30] PBF Parity error; [31] PBF Hw - interrupt. Reset on POR reset. */ + * kill occurred. The register is reset in por reset. Mapped as follows: [0] + * NIG attention for function0; [1] NIG attention for function1; [2] GPIO1 + * mcp; [3] GPIO2 mcp; [4] GPIO3 mcp; [5] GPIO4 mcp; [6] GPIO1 function 1; + * [7] GPIO2 function 1; [8] GPIO3 function 1; [9] GPIO4 function 1; [10] + * PCIE glue/PXP VPD event function0; [11] PCIE glue/PXP VPD event + * function1; [12] PCIE glue/PXP Expansion ROM event0; [13] PCIE glue/PXP + * Expansion ROM event1; [14] SPIO4; [15] SPIO5; [16] MSI/X indication for + * mcp; [17] MSI/X indication for function 1; [18] BRB Parity error; [19] + * BRB Hw interrupt; [20] PRS Parity error; [21] PRS Hw interrupt; [22] SRC + * Parity error; [23] SRC Hw interrupt; [24] TSDM Parity error; [25] TSDM Hw + * interrupt; [26] TCM Parity error; [27] TCM Hw interrupt; [28] TSEMI + * Parity error; [29] TSEMI Hw interrupt; [30] PBClient Parity error; [31] + * PBClient Hw interrupt. Reset on POR reset. */ #define MISC_REG_AEU_SYS_KILL_STATUS_0 0xa600 #define MISC_REG_AEU_SYS_KILL_STATUS_1 0xa604 #define MISC_REG_AEU_SYS_KILL_STATUS_2 0xa608 #define MISC_REG_AEU_SYS_KILL_STATUS_3 0xa60c -/* [R 4] This field indicates the type of the device. '0' - 2 Ports; '1' - 1 - Port. Global register. */ +/* [R 32] This field indicates the type of the device. '0' - 2 Ports; '1' - + * 1 Port. Global register. */ #define MISC_REG_BOND_ID 0xa400 /* [R 8] These bits indicate the metal revision of the chip. This value - starts at 0x00 for each all-layer tape-out and increments by one for each - tape-out. Global register. */ + * starts at 0x00 for each all-layer tape-out and increments by one for each + * tape-out. Global register. */ #define MISC_REG_CHIP_METAL 0xa404 /* [R 16] These bits indicate the part number for the chip. Global register. */ #define MISC_REG_CHIP_NUM 0xa408 /* [R 4] These bits indicate the base revision of the chip. This value - starts at 0x0 for the A0 tape-out and increments by one for each - all-layer tape-out. Global register. */ + * starts at 0x0 for the A0 tape-out and increments by one for each + * all-layer tape-out. Global register. */ #define MISC_REG_CHIP_REV 0xa40c +/* [R 14] otp_misc_do[100:0] spare bits collection: 13:11- + * otp_misc_do[100:98]; 10:7 - otp_misc_do[87:84]; 6:3 - otp_misc_do[75:72]; + * 2:1 - otp_misc_do[51:50]; 0 - otp_misc_do[1]. */ +#define MISC_REG_CHIP_TYPE 0xac60 +#define MISC_REG_CHIP_TYPE_57811_MASK (1<<1) /* [RW 32] The following driver registers(1...16) represent 16 drivers and - 32 clients. Each client can be controlled by one driver only. One in each - bit represent that this driver control the appropriate client (Ex: bit 5 - is set means this driver control client number 5). addr1 = set; addr0 = - clear; read from both addresses will give the same result = status. write - to address 1 will set a request to control all the clients that their - appropriate bit (in the write command) is set. if the client is free (the - appropriate bit in all the other drivers is clear) one will be written to - that driver register; if the client isn't free the bit will remain zero. - if the appropriate bit is set (the driver request to gain control on a - client it already controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW - interrupt will be asserted). write to address 0 will set a request to - free all the clients that their appropriate bit (in the write command) is - set. if the appropriate bit is clear (the driver request to free a client - it doesn't controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW interrupt will - be asserted). */ + * 32 clients. Each client can be controlled by one driver only. One in each + * bit represent that this driver control the appropriate client (Ex: bit 5 + * is set means this driver control client number 5). addr1 = set; addr0 = + * clear; read from both addresses will give the same result = status. write + * to address 1 will set a request to control all the clients that their + * appropriate bit (in the write command) is set. if the client is free (the + * appropriate bit in all the other drivers is clear) one will be written to + * that driver register; if the client isn't free the bit will remain zero. + * if the appropriate bit is set (the driver request to gain control on a + * client it already controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW + * interrupt will be asserted). write to address 0 will set a request to + * free all the clients that their appropriate bit (in the write command) is + * set. if the appropriate bit is clear (the driver request to free a client + * it doesn't controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW interrupt will + * be asserted). */ #define MISC_REG_DRIVER_CONTROL_1 0xa510 #define MISC_REG_DRIVER_CONTROL_7 0xa3c8 -/* [RW 1] multifunction for WOL. If clr WOL signal of the PXP will be send - on bit 0 only. Global register. Reset on hard reset. */ -#define MISC_REG_E1HMF_MODE 0xa5f8 +/* [R 1] Status of four port mode path swap input pin. */ +#define MISC_REG_FOUR_PORT_PATH_SWAP 0xa75c +/* [RW 2] 4 port path swap overwrite.[0] - Overwrite control; if it is 0 - + * the path_swap output is equal to 4 port mode path swap input pin; if it + * is 1 - the path_swap output is equal to bit[1] of this register; [1] - + * Overwrite value. If bit[0] of this register is 1 this is the value that + * receives the path_swap output. Reset on Hard reset. */ +#define MISC_REG_FOUR_PORT_PATH_SWAP_OVWR 0xa738 +/* [R 1] Status of 4 port mode port swap input pin. */ +#define MISC_REG_FOUR_PORT_PORT_SWAP 0xa754 +/* [RW 2] 4 port port swap overwrite.[0] - Overwrite control; if it is 0 - + * the port_swap output is equal to 4 port mode port swap input pin; if it + * is 1 - the port_swap output is equal to bit[1] of this register; [1] - + * Overwrite value. If bit[0] of this register is 1 this is the value that + * receives the port_swap output. Reset on Hard reset. */ +#define MISC_REG_FOUR_PORT_PORT_SWAP_OVWR 0xa734 /* [RW 32] Debug only: spare RW register reset by core reset. Global - register. Reset on core reset. */ + * register. Reset on core reset. */ #define MISC_REG_GENERIC_CR_0 0xa460 #define MISC_REG_GENERIC_CR_1 0xa464 -/* [RW 32] Debug only: spare RW register reset by hard reset. Global - register. */ -#define MISC_REG_GENERIC_HW_0 0xa468 /* [RW 32] Debug only: spare RW register reset by por reset. Global - register. Reset on POR reset. */ + * register. Reset on POR reset. */ #define MISC_REG_GENERIC_POR_1 0xa474 +/* [RW 32] Bit[0]: EPIO MODE SEL: Setting this bit to 1 will allow SW/FW to + * use all of the 32 Extended GPIO pins. Without setting this bit; an EPIO + * can not be configured as an output. Each output has its output enable in + * the MCP register space; but this bit needs to be set to make use of that. + * Bit[3:1] spare. Bit[4]: WCVTMON_PWRDN: Powerdown for Warpcore VTMON. When + * set to 1 - Powerdown. Bit[5]: WCVTMON_RESETB: Reset for Warpcore VTMON. + * When set to 0 - vTMON is in reset. Bit[6]: setting this bit will change + * the i/o to an output and will drive the TimeSync output. Bit[31:7]: + * spare. Global register. Reset by hard reset. */ +#define MISC_REG_GEN_PURP_HWG 0xa9a0 /* [RW 32] GPIO. [31-28] FLOAT port 0; [27-24] FLOAT port 0; When any of - these bits is written as a '1'; the corresponding GPIO bit will turn off - it's drivers and become an input. This is the reset state of all GPIO - pins. The read value of these bits will be a '1' if that last command - (#SET; #CLR; or #FLOAT) for this bit was a #FLOAT. (reset value 0xff). - [23-20] CLR port 1; 19-16] CLR port 0; When any of these bits is written - as a '1'; the corresponding GPIO bit will drive low. The read value of - these bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for - this bit was a #CLR. (reset value 0). [15-12] SET port 1; 11-8] port 0; - SET When any of these bits is written as a '1'; the corresponding GPIO - bit will drive high (if it has that capability). The read value of these - bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for this - bit was a #SET. (reset value 0). [7-4] VALUE port 1; [3-0] VALUE port 0; - RO; These bits indicate the read value of each of the eight GPIO pins. - This is the result value of the pin; not the drive value. Writing these - bits will have not effect. Global register. */ + * these bits is written as a '1'; the corresponding GPIO bit will turn off + * it's drivers and become an input. This is the reset state of all GPIO + * pins. The read value of these bits will be a '1' if that last command + * (#SET; #CLR; or #FLOAT) for this bit was a #FLOAT. (reset value 0xff). + * [23-20] CLR port 1; 19-16] CLR port 0; When any of these bits is written + * as a '1'; the corresponding GPIO bit will drive low. The read value of + * these bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for + * this bit was a #CLR. (reset value 0). [15-12] SET port 1; 11-8] port 0; + * SET When any of these bits is written as a '1'; the corresponding GPIO + * bit will drive high (if it has that capability). The read value of these + * bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for this + * bit was a #SET. (reset value 0). [7-4] VALUE port 1; [3-0] VALUE port 0; + * RO; These bits indicate the read value of each of the eight GPIO pins. + * This is the result value of the pin; not the drive value. Writing these + * bits will have not effect. Global register. */ #define MISC_REG_GPIO 0xa490 /* [RW 8] These bits enable the GPIO_INTs to signals event to the - IGU/MCP.according to the following map: [0] p0_gpio_0; [1] p0_gpio_1; [2] - p0_gpio_2; [3] p0_gpio_3; [4] p1_gpio_0; [5] p1_gpio_1; [6] p1_gpio_2; - [7] p1_gpio_3; Global register. */ + * IGU/MCP.according to the following map: [0] p0_gpio_0; [1] p0_gpio_1; [2] + * p0_gpio_2; [3] p0_gpio_3; [4] p1_gpio_0; [5] p1_gpio_1; [6] p1_gpio_2; + * [7] p1_gpio_3; Global register. */ #define MISC_REG_GPIO_EVENT_EN 0xa2bc /* [RW 32] GPIO INT. [31-28] OLD_CLR port1; [27-24] OLD_CLR port0; Writing a - '1' to these bit clears the corresponding bit in the #OLD_VALUE register. - This will acknowledge an interrupt on the falling edge of corresponding - GPIO input (reset value 0). [23-16] OLD_SET [23-16] port1; OLD_SET port0; - Writing a '1' to these bit sets the corresponding bit in the #OLD_VALUE - register. This will acknowledge an interrupt on the rising edge of - corresponding GPIO input (reset value 0). [15-12] OLD_VALUE [11-8] port1; - OLD_VALUE port0; RO; These bits indicate the old value of the GPIO input - value. When the ~INT_STATE bit is set; this bit indicates the OLD value - of the pin such that if ~INT_STATE is set and this bit is '0'; then the - interrupt is due to a low to high edge. If ~INT_STATE is set and this bit - is '1'; then the interrupt is due to a high to low edge (reset value 0). - [7-4] INT_STATE port1; [3-0] INT_STATE RO port0; These bits indicate the - current GPIO interrupt state for each GPIO pin. This bit is cleared when - the appropriate #OLD_SET or #OLD_CLR command bit is written. This bit is - set when the GPIO input does not match the current value in #OLD_VALUE - (reset value 0). Global register. */ + * '1' to these bit clears the corresponding bit in the #OLD_VALUE register. + * This will acknowledge an interrupt on the falling edge of corresponding + * GPIO input (reset value 0). [23-16] OLD_SET [23-16] port1; OLD_SET port0; + * Writing a '1' to these bit sets the corresponding bit in the #OLD_VALUE + * register. This will acknowledge an interrupt on the rising edge of + * corresponding GPIO input (reset value 0). [15-12] OLD_VALUE [11-8] port1; + * OLD_VALUE port0; RO; These bits indicate the old value of the GPIO input + * value. When the ~INT_STATE bit is set; this bit indicates the OLD value + * of the pin such that if ~INT_STATE is set and this bit is '0'; then the + * interrupt is due to a low to high edge. If ~INT_STATE is set and this bit + * is '1'; then the interrupt is due to a high to low edge (reset value 0). + * [7-4] INT_STATE port1; [3-0] INT_STATE RO port0; These bits indicate the + * current GPIO interrupt state for each GPIO pin. This bit is cleared when + * the appropriate #OLD_SET or #OLD_CLR command bit is written. This bit is + * set when the GPIO input does not match the current value in #OLD_VALUE + * (reset value 0). Global register. */ #define MISC_REG_GPIO_INT 0xa494 /* [R 28] this field hold the last information that caused reserved - attention. bits [19:0] - address; [22:20] function; [23] reserved; - [27:24] the master that caused the attention - according to the following - encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = - dbu; 8 = dmae */ + * attention. bits [19:0] - address; [22:20] function; [23] reserved; + * [27:24] the master that caused the attention - according to the following + * encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = + * dbu; 8 = dmae */ #define MISC_REG_GRC_RSV_ATTN 0xa3c0 /* [R 28] this field hold the last information that caused timeout - attention. bits [19:0] - address; [22:20] function; [23] reserved; - [27:24] the master that caused the attention - according to the following - encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = - dbu; 8 = dmae */ + * attention. bits [19:0] - address; [22:20] function; [23] reserved; + * [27:24] the master that caused the attention - according to the following + * encodeing:1 = pxp; 2 = mcp; 3 = usdm; 4 = tsdm; 5 = xsdm; 6 = csdm; 7 = + * dbu; 8 = dmae */ #define MISC_REG_GRC_TIMEOUT_ATTN 0xa3c4 /* [R 10] Holds the last FID that caused timeout attention. Need to be used - in conjunction with ~misc_registers_timeout_attn; where 3 bits of - function (3 lsb) are also represented. Bit[2:0] - PFID; bit[3] - VFID - valid; bit[9:4] - VFID. Global register. */ + * in conjunction with ~misc_registers_timeout_attn; where 3 bits of + * function (3 lsb) are also represented. Bit[2:0] - PFID; bit[3] - VFID + * valid; bit[9:4] - VFID. Global register. */ #define MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID 0xa714 -/* [RW 1] Setting this bit enables a timer in the GRC block to timeout any - access that does not finish within - ~misc_registers_grc_timout_val.grc_timeout_val cycles. When this bit is - cleared; this timeout is disabled. If this timeout occurs; the GRC shall - assert it attention output. */ -#define MISC_REG_GRC_TIMEOUT_EN 0xa280 -/* [RW 28] 28 LSB of LCPLL first register; reset val = 521. inside order of - the bits is: [2:0] OAC reset value 001) CML output buffer bias control; - 111 for +40%; 011 for +20%; 001 for 0%; 000 for -20%. [5:3] Icp_ctrl - (reset value 001) Charge pump current control; 111 for 720u; 011 for - 600u; 001 for 480u and 000 for 360u. [7:6] Bias_ctrl (reset value 00) - Global bias control; When bit 7 is high bias current will be 10 0gh; When - bit 6 is high bias will be 100w; Valid values are 00; 10; 01. [10:8] - Pll_observe (reset value 010) Bits to control observability. bit 10 is - for test bias; bit 9 is for test CK; bit 8 is test Vc. [12:11] Vth_ctrl - (reset value 00) Comparator threshold control. 00 for 0.6V; 01 for 0.54V - and 10 for 0.66V. [13] pllSeqStart (reset value 0) Enables VCO tuning - sequencer: 1= sequencer disabled; 0= sequencer enabled (inverted - internally). [14] reserved (reset value 0) Reset for VCO sequencer is - connected to RESET input directly. [15] capRetry_en (reset value 0) - enable retry on cap search failure (inverted). [16] freqMonitor_e (reset - value 0) bit to continuously monitor vco freq (inverted). [17] - freqDetRestart_en (reset value 0) bit to enable restart when not freq - locked (inverted). [18] freqDetRetry_en (reset value 0) bit to enable - retry on freq det failure(inverted). [19] pllForceFdone_en (reset value - 0) bit to enable pllForceFdone & pllForceFpass into pllSeq. [20] - pllForceFdone (reset value 0) bit to force freqDone. [21] pllForceFpass - (reset value 0) bit to force freqPass. [22] pllForceDone_en (reset value - 0) bit to enable pllForceCapDone. [23] pllForceCapDone (reset value 0) - bit to force capDone. [24] pllForceCapPass_en (reset value 0) bit to - enable pllForceCapPass. [25] pllForceCapPass (reset value 0) bit to force - capPass. [26] capRestart (reset value 0) bit to force cap sequencer to - restart. [27] capSelectM_en (reset value 0) bit to enable cap select - register bits. Global register. */ -#define MISC_REG_LCPLL_CTRL_1 0xa2a4 +/* [RW 1] LCPLL power down. Global register. Active High. Reset on POR + * reset. */ +#define MISC_REG_LCPLL_E40_PWRDWN 0xaa74 +/* [RW 1] LCPLL VCO reset. Global register. Active Low Reset on POR reset. */ +#define MISC_REG_LCPLL_E40_RESETB_ANA 0xaa78 +/* [RW 1] LCPLL post-divider reset. Global register. Active Low Reset on POR + * reset. */ +#define MISC_REG_LCPLL_E40_RESETB_DIG 0xaa7c /* [RW 8] Interrupt mask register #0 read/write */ #define MISC_REG_MISC_INT_MASK 0xa388 /* [RW 1] Parity mask register #0 read/write */ -#define MISC_REG_MISC_PRTY_MASK 0xa398 +#define MISC_REG_MISC_PRTY_MASK 0xa398 /* [R 1] Parity register #0 read */ #define MISC_REG_MISC_PRTY_STS 0xa38c -#define MISC_REG_NIG_WOL_P0 0xa270 -#define MISC_REG_NIG_WOL_P1 0xa274 +/* [RC 1] Parity register #0 read clear */ +#define MISC_REG_MISC_PRTY_STS_CLR 0xa390 /* [R 1] If set indicate that the pcie_rst_b was asserted without perst - assertion. Global register. */ -#define MISC_REG_PCIE_HOT_RESET 0xa618 -/* [RW 32] UNUSED for E65 */ -#define MISC_REG_PLL_STORM_CTRL_1 0xa294 -#define MISC_REG_PLL_STORM_CTRL_2 0xa298 -#define MISC_REG_PLL_STORM_CTRL_3 0xa29c -#define MISC_REG_PLL_STORM_CTRL_4 0xa2a0 + * assertion. Global register. */ +#define MISC_REG_PCIE_HOT_RESET 0xa618 /* [R 1] Status of 4 port mode enable input pin. */ #define MISC_REG_PORT4MODE_EN 0xa750 /* [RW 2] 4 port mode enable overwrite.[0] - Overwrite control; if it is 0 - - the port4mode_en output is equal to 4 port mode input pin; if it is 1 - - the port4mode_en output is equal to bit[1] of this register; [1] - - Overwrite value. If bit[0] of this register is 1 this is the value that - receives the port4mode_en output . */ + * the port4mode_en output is equal to 4 port mode input pin; if it is 1 - + * the port4mode_en output is equal to bit[1] of this register; [1] - + * Overwrite value. If bit[0] of this register is 1 this is the value that + * receives the port4mode_en output. Reset on Hard reset. */ #define MISC_REG_PORT4MODE_EN_OVWR 0xa720 -/* [RW 32] reset reg#2; rite/read one = the specific block is out of reset; - write/read zero = the specific block is in reset; addr 0-wr- the write - value will be written to the register; addr 1-set - one will be written - to all the bits that have the value of one in the data written (bits that - have the value of zero will not be change) ; addr 2-clear - zero will be - written to all the bits that have the value of one in the data written - (bits that have the value of zero will not be change); addr 3-ignore; - read ignore from all addr except addr 00; inside order of the bits is: - [0] rst_bmac0; [1] rst_bmac1; [2] rst_emac0; [3] rst_emac1; [4] - rst_grc(global register); [5] rst_mcp_n_reset_reg_hard_core (global - register); [6] rst_mcp_n_hard_core_rst_b(global register); [7] - rst_mcp_n_reset_cmn_cpu(global register); [8] - rst_mcp_n_reset_cmn_core(global register); [9] rst_rbcn; [10] rst_dbg; - [11] rst_misc_core(global register); [12] rst_dbue (UART)(global - register); [13] Pci_resetmdio_n(global register); [14] - rst_emac0_hard_core; [15] rst_emac1_hard_core; 16] rst_pxp_rq_rd_wr; 17] - rst_atc; 18] rst_cnig; 19] rst_pglc (global register); 31:20] reserved */ +/* [RW 32] reset reg#1; rite/read one = the specific block is out of reset; + * write/read zero = the specific block is in reset; addr 0-wr- the write + * value will be written to the register; addr 1-set - one will be written + * to all the bits that have the value of one in the data written (bits that + * have the value of zero will not be change) ; addr 2-clear - zero will be + * written to all the bits that have the value of one in the data written + * (bits that have the value of zero will not be change); addr 3-ignore; + * read ignore from all addr except addr 00; inside order of the bits is: + * [0] rst_brb1; [1] rst_prs; [2] rst_src; [3] rst_tsdm; [4] rst_tsem; [5] + * rst_tcm; [6] rst_rbcr; [7] rst_nig; [8] rst_usdm; [9] rst_ucm; [10] + * rst_usem; [11] rst_upb; [12] rst_ccm; [13] rst_csem; [14] rst_csdm; [15] + * rst_rbcu; [16] rst_pbf; [17] rst_qm; [18] rst_tm; [19] rst_dorq; [20] + * rst_xcm; [21] rst_xsdm; [22] rst_xsem; [23] rst_rbct; [24] rst_cdu; [25] + * rst_cfc; [26] rst_pxp_hst; [27] rst_pxpv (global register); [28] + * rst_rbcp; [29] rst_hc; [30] rst_dmae; [31] rst_semi_rtc; */ +#define MISC_REG_RESET_REG_1 0xa580 #define MISC_REG_RESET_REG_2 0xa590 -#define MISC_REG_RESET_REG_3 0xa5a0 /* [RW 22] 22 bit GRC address where the scratch-pad of the MCP that is - shared with the driver resides */ + * shared with the driver resides */ #define MISC_REG_SHARED_MEM_ADDR 0xa2b4 /* [RW 32] SPIO. [31-24] FLOAT When any of these bits is written as a '1'; - the corresponding SPIO bit will turn off it's drivers and become an - input. This is the reset state of all SPIO pins. The read value of these - bits will be a '1' if that last command (#SET; #CL; or #FLOAT) for this - bit was a #FLOAT. (reset value 0xff). [23-16] CLR When any of these bits - is written as a '1'; the corresponding SPIO bit will drive low. The read - value of these bits will be a '1' if that last command (#SET; #CLR; or -#FLOAT) for this bit was a #CLR. (reset value 0). [15-8] SET When any of - these bits is written as a '1'; the corresponding SPIO bit will drive - high (if it has that capability). The read value of these bits will be a - '1' if that last command (#SET; #CLR; or #FLOAT) for this bit was a #SET. - (reset value 0). [7-0] VALUE RO; These bits indicate the read value of - each of the eight SPIO pins. This is the result value of the pin; not the - drive value. Writing these bits will have not effect. Each 8 bits field - is divided as follows: [0] VAUX Enable; when pulsed low; enables supply - from VAUX. (This is an output pin only; the FLOAT field is not applicable - for this pin); [1] VAUX Disable; when pulsed low; disables supply form - VAUX. (This is an output pin only; FLOAT field is not applicable for this - pin); [2] SEL_VAUX_B - Control to power switching logic. Drive low to - select VAUX supply. (This is an output pin only; it is not controlled by - the SET and CLR fields; it is controlled by the Main Power SM; the FLOAT - field is not applicable for this pin; only the VALUE fields is relevant - - it reflects the output value); [3] port swap [4] spio_4; [5] spio_5; [6] - Bit 0 of UMP device ID select; read by UMP firmware; [7] Bit 1 of UMP - device ID select; read by UMP firmware. Global register. */ + * the corresponding SPIO bit will turn off it's drivers and become an + * input. This is the reset state of all SPIO pins. The read value of these + * bits will be a '1' if that last command (#SET; #CL; or #FLOAT) for this + * bit was a #FLOAT. (reset value 0xff). [23-16] CLR When any of these bits + * is written as a '1'; the corresponding SPIO bit will drive low. The read + * value of these bits will be a '1' if that last command (#SET; #CLR; or + * #FLOAT) for this bit was a #CLR. (reset value 0). [15-8] SET When any of + * these bits is written as a '1'; the corresponding SPIO bit will drive + * high (if it has that capability). The read value of these bits will be a + * '1' if that last command (#SET; #CLR; or #FLOAT) for this bit was a #SET. + * (reset value 0). [7-0] VALUE RO; These bits indicate the read value of + * each of the eight SPIO pins. This is the result value of the pin; not the + * drive value. Writing these bits will have not effect. Each 8 bits field + * is divided as follows: [0] VAUX Enable; when pulsed low; enables supply + * from VAUX. (This is an output pin only; the FLOAT field is not applicable + * for this pin); [1] VAUX Disable; when pulsed low; disables supply form + * VAUX. (This is an output pin only; FLOAT field is not applicable for this + * pin); [2] SEL_VAUX_B - Control to power switching logic. Drive low to + * select VAUX supply. (This is an output pin only; it is not controlled by + * the SET and CLR fields; it is controlled by the Main Power SM; the FLOAT + * field is not applicable for this pin; only the VALUE fields is relevant - + * it reflects the output value); [3] port swap [4] spio_4; [5] spio_5; [6] + * Bit 0 of UMP device ID select; read by UMP firmware; [7] Bit 1 of UMP + * device ID select; read by UMP firmware. Global register. */ #define MISC_REG_SPIO 0xa4fc /* [RW 8] These bits enable the SPIO_INTs to signals event to the IGU/MC. - according to the following map: [3:0] reserved; [4] spio_4 [5] spio_5; - [7:6] reserved. Global register. */ + * according to the following map: [3:0] reserved; [4] spio_4 [5] spio_5; + * [7:6] reserved. Global register. */ #define MISC_REG_SPIO_EVENT_EN 0xa2b8 /* [RW 32] SPIO INT. [31-24] OLD_CLR Writing a '1' to these bit clears the - corresponding bit in the #OLD_VALUE register. This will acknowledge an - interrupt on the falling edge of corresponding SPIO input (reset value - 0). [23-16] OLD_SET Writing a '1' to these bit sets the corresponding bit - in the #OLD_VALUE register. This will acknowledge an interrupt on the - rising edge of corresponding SPIO input (reset value 0). [15-8] OLD_VALUE - RO; These bits indicate the old value of the SPIO input value. When the - ~INT_STATE bit is set; this bit indicates the OLD value of the pin such - that if ~INT_STATE is set and this bit is '0'; then the interrupt is due - to a low to high edge. If ~INT_STATE is set and this bit is '1'; then the - interrupt is due to a high to low edge (reset value 0). [7-0] INT_STATE - RO; These bits indicate the current SPIO interrupt state for each SPIO - pin. This bit is cleared when the appropriate #OLD_SET or #OLD_CLR - command bit is written. This bit is set when the SPIO input does not - match the current value in #OLD_VALUE (reset value 0). Global register. */ + * corresponding bit in the #OLD_VALUE register. This will acknowledge an + * interrupt on the falling edge of corresponding SPIO input (reset value + * 0). [23-16] OLD_SET Writing a '1' to these bit sets the corresponding bit + * in the #OLD_VALUE register. This will acknowledge an interrupt on the + * rising edge of corresponding SPIO input (reset value 0). [15-8] OLD_VALUE + * RO; These bits indicate the old value of the SPIO input value. When the + * ~INT_STATE bit is set; this bit indicates the OLD value of the pin such + * that if ~INT_STATE is set and this bit is '0'; then the interrupt is due + * to a low to high edge. If ~INT_STATE is set and this bit is '1'; then the + * interrupt is due to a high to low edge (reset value 0). [7-0] INT_STATE + * RO; These bits indicate the current SPIO interrupt state for each SPIO + * pin. This bit is cleared when the appropriate #OLD_SET or #OLD_CLR + * command bit is written. This bit is set when the SPIO input does not + * match the current value in #OLD_VALUE (reset value 0). Global register. */ #define MISC_REG_SPIO_INT 0xa500 -/* [RW 32] reload value for counter 4 if reload; the value will be reload if - the counter reached zero and the reload bit - (~misc_registers_sw_timer_cfg_4.sw_timer_cfg_4[1] ) is set */ -#define MISC_REG_SW_TIMER_RELOAD_VAL_4 0xa2fc -/* [RW 32] the value of the counter for sw timers1-8. there are 8 addresses - in this register. addres 0 - timer 1; address 1 - timer 2; etc ; address - 7 - timer 8 */ -#define MISC_REG_SW_TIMER_VAL 0xa5c0 +/* [R 1] Status of two port mode path swap input pin. */ +#define MISC_REG_TWO_PORT_PATH_SWAP 0xa758 +/* [RW 2] 2 port swap overwrite.[0] - Overwrite control; if it is 0 - the + * path_swap output is equal to 2 port mode path swap input pin; if it is 1 + * - the path_swap output is equal to bit[1] of this register; [1] - + * Overwrite value. If bit[0] of this register is 1 this is the value that + * receives the path_swap output. Reset on Hard reset. */ +#define MISC_REG_TWO_PORT_PATH_SWAP_OVWR 0xa72c /* [RW 1] Set by the MCP to remember if one or more of the drivers is/are - loaded; 0-prepare; -unprepare. Global register. Reset on hard reset. */ + * loaded; 0-prepare; -unprepare. Global register. Reset on hard reset. */ #define MISC_REG_UNPREPARED 0xa424 -/* [RW 1] 4-port mode control to XGXS; Hardwired ST bits LSB: 0 - clause 45; - 1 - clause 22. Drives output misc_xgxs0_mux_md_st. Global register. */ -#define MISC_REG_XGXS0_CTRL_MD_ST 0xa730 -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_BRCST (0x1<<0) -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_MLCST (0x1<<1) -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_NO_VLAN (0x1<<4) -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST (0x1<<2) -#define NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_VLAN (0x1<<3) -#define NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN (0x1<<0) -#define NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN (0x1<<0) +/* [RW 5] MDIO PHY Address. The WC uses this address to determine whether or + * not it is the recipient of the message on the MDIO interface. The value + * is compared to the value on ctrl_md_devad. Drives output + * misc_xgxs0_phy_addr. Global register. */ +#define MISC_REG_WC0_CTRL_PHY_ADDR 0xa9cc +/* [RW 10] reset reg#3; rite/read one = the specific block is out of reset; + * write/read zero = the specific block is in reset; addr 0-wr- the write + * value will be written to the register; addr 1-set - one will be written + * to all the bits that have the value of one in the data written (bits that + * have the value of zero will not be change) ; addr 2-clear - zero will be + * written to all the bits that have the value of one in the data written + * (bits that have the value of zero will not be change); addr 3-ignore; + * read ignore from all addr except addr 00. [0]: rstb_hw: Active low reset + * which when asserted drives entire WC into the reset state. All flops + * which within WC are driven into an initial state; as well as the analog + * core. Output clocks txck_out; rxck0_10g; and clk_25 will be driven to 0 + * upon its assertion. [1]: iddq. Enables iddq testing where the supply + * current (Idd) is measured in the quiescent state. [2]: pwrdwn: Active + * high control which forces the analog core of the WC into power-down mode; + * and forces digital logic of the WC into reset. Output clock (refclk) + * remains active. [3]: pwrdwn_sd: Power down signal detect. [4]: + * txd10g_fifo_rstb: Transmit 10Gbps FIFO reset; active low. Used to reset + * the transmit FIFO used in xlgmii operation. [8:5]: txd1g_fifo_rstb: + * Transmit 1Gbps FIFO reset; active low. Used to reset the per-lane + * transmit FIFOs used in the mii/gmii operation. [9]: + * txd10g_fifo_rstb_dxgxs1: Transmit 10Gbps DXGXS FIFO reset; active low. + * Used to reset the transmit FIFO used in the DXGXS logic in xlgmii + * operation. Global register. */ +#define MISC_REG_WC0_RESET 0xac30 +/* [RW 2] XMAC Core port mode. Indicates the number of ports on the system + * side. This should be less than or equal to phy_port_mode; if some of the + * ports are not used. This enables reduction of frequency on the core side. + * This is a strap input for the XMAC_MP core. 00 - Single Port Mode; 01 - + * Dual Port Mode; 10 - Tri Port Mode; 11 - Quad Port Mode. This is a strap + * input for the XMAC_MP core; and should be changed only while reset is + * held low. Reset on Hard reset. */ +#define MISC_REG_XMAC_CORE_PORT_MODE 0xa964 +/* [RW 2] XMAC PHY port mode. Indicates the number of ports on the Warp + * Core. This is a strap input for the XMAC_MP core. 00 - Single Port Mode; + * 01 - Dual Port Mode; 1x - Quad Port Mode; This is a strap input for the + * XMAC_MP core; and should be changed only while reset is held low. Reset + * on Hard reset. */ +#define MISC_REG_XMAC_PHY_PORT_MODE 0xa960 +/* [RW 32] 1 [47] Packet Size = 64 Write to this register write bits 31:0. + * Reads from this register will clear bits 31:0. */ +#define MSTAT_REG_RX_STAT_GR64_LO 0x200 +/* [RW 32] 1 [00] Tx Good Packet Count Write to this register write bits + * 31:0. Reads from this register will clear bits 31:0. */ +#define MSTAT_REG_TX_STAT_GTXPOK_LO 0 +#define NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN (0x1<<0) +#define NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN (0x1<<0) #define NIG_MASK_INTERRUPT_PORT0_REG_MASK_EMAC0_MISC_MI_INT (0x1<<0) #define NIG_MASK_INTERRUPT_PORT0_REG_MASK_SERDES0_LINK_STATUS (0x1<<9) -#define NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK10G (0x1<<15) +#define NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK10G (0x1<<15) #define NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK_STATUS (0xf<<18) -/* [RW 1] Input enable for RX_BMAC0 IF */ +/* [R 1] Input enable for RX_BMAC0 IF */ #define NIG_REG_BMAC0_IN_EN 0x100ac -/* [RW 1] output enable for TX_BMAC0 IF */ +/* [R 1] output enable for TX_BMAC0 IF */ #define NIG_REG_BMAC0_OUT_EN 0x100e0 -/* [RW 1] output enable for TX BMAC pause port 0 IF */ +/* [R 1] output enable for TX BMAC pause port 0 IF */ #define NIG_REG_BMAC0_PAUSE_OUT_EN 0x10110 -/* [RW 1] output enable for RX_BMAC0_REGS IF */ +/* [R 1] output enable for RX_BMAC0_REGS IF */ #define NIG_REG_BMAC0_REGS_OUT_EN 0x100e8 /* [RW 1] output enable for RX BRB1 port0 IF */ #define NIG_REG_BRB0_OUT_EN 0x100f8 /* [RW 1] Input enable for TX BRB1 pause port 0 IF */ #define NIG_REG_BRB0_PAUSE_IN_EN 0x100c4 -/* [RW 1] output enable for RX BRB1 port1 IF */ -#define NIG_REG_BRB1_OUT_EN 0x100fc /* [RW 1] Input enable for TX BRB1 pause port 1 IF */ #define NIG_REG_BRB1_PAUSE_IN_EN 0x100c8 -/* [RW 1] output enable for RX BRB1 LP IF */ -#define NIG_REG_BRB_LB_OUT_EN 0x10100 /* [WB_W 90] Debug packet to LP from RBC; Data spelling:[63:0] data; 64] - error; [67:65]eop_bvalid; [68]eop; [69]sop; [70]port_id; 71]flush; - 72:73]-vnic_num; 89:74]-sideband_info */ -#define NIG_REG_DEBUG_PACKET_LB 0x10800 -/* [RW 1] Input enable for TX Debug packet */ -#define NIG_REG_EGRESS_DEBUG_IN_EN 0x100dc + * error; [67:65]eop_bvalid; [68]eop; [69]sop; [70]port_id; 71]flush; + * 72:73]-vnic_num; 89:74]-sideband_info */ +#define NIG_REG_DEBUG_PACKET_LB 0x10800 +/* [R 1] FIFO empty in DEBUG_FIFO in NIG_TX_DBG */ +#define NIG_REG_EGRESS_DEBUG_FIFO_EMPTY 0x10418 +/* [R 1] FIFO empty in DELAY_PBF_FIFO in NIG_RX_PORT0 */ +#define NIG_REG_EGRESS_DELAY0_EMPTY 0x10420 +/* [R 1] FIFO empty in DELAY_PBF_FIFO in NIG_RX_PORT1 */ +#define NIG_REG_EGRESS_DELAY1_EMPTY 0x10428 +/* [R 1] PBF FIFO empty flag. */ +#define NIG_REG_EGRESS_DELAY2_EMPTY 0x1862c +/* [R 1] PBF FIFO empty flag. */ +#define NIG_REG_EGRESS_DELAY3_EMPTY 0x18630 +/* [R 1] PBF FIFO empty flag. */ +#define NIG_REG_EGRESS_DELAY4_EMPTY 0x18634 +/* [R 1] PBF FIFO empty flag. */ +#define NIG_REG_EGRESS_DELAY5_EMPTY 0x18638 /* [RW 1] If 1 - egress drain mode for port0 is active. In this mode all - packets from PBFare not forwarded to the MAC and just deleted from FIFO. - First packet may be deleted from the middle. And last packet will be - always deleted till the end. */ + * packets from PBFare not forwarded to the MAC and just deleted from FIFO. + * First packet may be deleted from the middle. And last packet will be + * always deleted till the end. */ #define NIG_REG_EGRESS_DRAIN0_MODE 0x10060 -/* [RW 1] Output enable to EMAC0 */ +/* [R 1] Output enable to EMAC0 */ #define NIG_REG_EGRESS_EMAC0_OUT_EN 0x10120 /* [RW 1] MAC configuration for packets of port0. If 1 - all packet outputs - to emac for port0; other way to bmac for port0 */ + * to emac for port0; other way to bmac for port0 */ #define NIG_REG_EGRESS_EMAC0_PORT 0x10058 -/* [RW 1] Input enable for TX PBF user packet from IF0 */ -#define NIG_REG_EGRESS_PBF0_IN_EN 0x100cc -/* [RW 1] Input enable for TX PBF user packet from IF1 */ -#define NIG_REG_EGRESS_PBF1_IN_EN 0x100d0 +/* [R 1] FIFO empty in MNG_FIFO in NIG_TX_PORT0 */ +#define NIG_REG_EGRESS_MNG0_FIFO_EMPTY 0x10460 +/* [R 1] FIFO empty in MNG_FIFO in NIG_TX_PORT1 */ +#define NIG_REG_EGRESS_MNG1_FIFO_EMPTY 0x10474 /* [RW 1] Input enable for TX UMP management packet port0 IF */ #define NIG_REG_EGRESS_UMP0_IN_EN 0x100d4 -/* [RW 1] Input enable for RX_EMAC0 IF */ +/* [R 1] Input enable for RX_EMAC0 IF */ #define NIG_REG_EMAC0_IN_EN 0x100a4 -/* [RW 1] output enable for TX EMAC pause port 0 IF */ +/* [R 1] output enable for TX EMAC pause port 0 IF */ #define NIG_REG_EMAC0_PAUSE_OUT_EN 0x10118 /* [R 1] status from emac0. This bit is set when MDINT from either the - EXT_MDINT pin or from the Copper PHY is driven low. This condition must - be cleared in the attached PHY device that is driving the MINT pin. */ + * EXT_MDINT pin or from the Copper PHY is driven low. This condition must + * be cleared in the attached PHY device that is driving the MINT pin. */ #define NIG_REG_EMAC0_STATUS_MISC_MI_INT 0x10494 -/* [WB 48] This address space contains BMAC0 registers. The BMAC registers - are described in appendix A. In order to access the BMAC0 registers; the - base address; NIG_REGISTERS_INGRESS_BMAC0_MEM; Offset: 0x10c00; should be - added to each BMAC register offset */ +/* [R 48] This address space contains BMAC0 registers. The BMAC registers + * are described in appendix A. In order to access the BMAC0 registers; the + * base address; NIG_REGISTERS_INGRESS_BMAC0_MEM; Offset: 0x10c00; should be + * added to each BMAC register offset */ #define NIG_REG_INGRESS_BMAC0_MEM 0x10c00 -/* [WB 48] This address space contains BMAC1 registers. The BMAC registers - are described in appendix A. In order to access the BMAC0 registers; the - base address; NIG_REGISTERS_INGRESS_BMAC1_MEM; Offset: 0x11000; should be - added to each BMAC register offset */ +/* [R 48] This address space contains BMAC1 registers. The BMAC registers + * are described in appendix A. In order to access the BMAC0 registers; the + * base address; NIG_REGISTERS_INGRESS_BMAC1_MEM; Offset: 0x11000; should be + * added to each BMAC register offset */ #define NIG_REG_INGRESS_BMAC1_MEM 0x11000 /* [R 1] FIFO empty in EOP descriptor FIFO of LP in NIG_RX_EOP */ #define NIG_REG_INGRESS_EOP_LB_EMPTY 0x104e0 /* [RW 17] Debug only. RX_EOP_DSCR_lb_FIFO in NIG_RX_EOP. Data - packet_length[13:0]; mac_error[14]; trunc_error[15]; parity[16] */ + * packet_length[13:0]; mac_error[14]; trunc_error[15]; parity[16] */ #define NIG_REG_INGRESS_EOP_LB_FIFO 0x104e4 +/* [R 1] FIFO empty in EOP descriptor FIFO of port 0 in NIG_RX_EOP */ +#define NIG_REG_INGRESS_EOP_PORT0_EMPTY 0x104ec +/* [R 1] FIFO empty in EOP descriptor FIFO of port 1 in NIG_RX_EOP */ +#define NIG_REG_INGRESS_EOP_PORT1_EMPTY 0x104f8 +/* [R 1] FIFO empty in PBF_DELAY_lb_FIFO in NIG_RX_lb */ +#define NIG_REG_INGRESS_LB_PBF_DELAY_EMPTY 0x10508 +/* [R 1] FIFO empty in dscr_fifo in NIG_RX_RMP block */ +#define NIG_REG_INGRESS_RMP0_DSCR_EMPTY 0x10530 +/* [R 1] FIFO empty in dscr_fifo in NIG_RX_RMP block */ +#define NIG_REG_INGRESS_RMP1_DSCR_EMPTY 0x10538 /* [RW 27] 0 - must be active for Everest A0; 1- for Everest B0 when latch - logic for interrupts must be used. Enable per bit of interrupt of - ~latch_status.latch_status */ + * logic for interrupts must be used. Enable per bit of interrupt of + * ~latch_status.latch_status */ #define NIG_REG_LATCH_BC_0 0x16210 /* [RW 27] Latch for each interrupt from Unicore.b[0] - status_emac0_misc_mi_int; b[1] status_emac0_misc_mi_complete; - b[2]status_emac0_misc_cfg_change; b[3]status_emac0_misc_link_status; - b[4]status_emac0_misc_link_change; b[5]status_emac0_misc_attn; - b[6]status_serdes0_mac_crs; b[7]status_serdes0_autoneg_complete; - b[8]status_serdes0_fiber_rxact; b[9]status_serdes0_link_status; - b[10]status_serdes0_mr_page_rx; b[11]status_serdes0_cl73_an_complete; - b[12]status_serdes0_cl73_mr_page_rx; b[13]status_serdes0_rx_sigdet; - b[14]status_xgxs0_remotemdioreq; b[15]status_xgxs0_link10g; - b[16]status_xgxs0_autoneg_complete; b[17]status_xgxs0_fiber_rxact; - b[21:18]status_xgxs0_link_status; b[22]status_xgxs0_mr_page_rx; - b[23]status_xgxs0_cl73_an_complete; b[24]status_xgxs0_cl73_mr_page_rx; - b[25]status_xgxs0_rx_sigdet; b[26]status_xgxs0_mac_crs */ + * status_emac0_misc_mi_int; b[1] status_emac0_misc_mi_complete; + * b[2]status_emac0_misc_cfg_change; b[3]status_emac0_misc_link_status; + * b[4]status_emac0_misc_link_change; b[5]status_emac0_misc_attn; + * b[6]status_serdes0_mac_crs; b[7]status_serdes0_autoneg_complete; + * b[8]status_serdes0_fiber_rxact; b[9]status_serdes0_link_status; + * b[10]status_serdes0_mr_page_rx; b[11]status_serdes0_cl73_an_complete; + * b[12]status_serdes0_cl73_mr_page_rx; b[13]status_serdes0_rx_sigdet; + * b[14]status_xgxs0_remotemdioreq; b[15]status_xgxs0_link10g; + * b[16]status_xgxs0_autoneg_complete; b[17]status_xgxs0_fiber_rxact; + * b[21:18]status_xgxs0_link_status; b[22]status_xgxs0_mr_page_rx; + * b[23]status_xgxs0_cl73_an_complete; b[24]status_xgxs0_cl73_mr_page_rx; + * b[25]status_xgxs0_rx_sigdet; b[26]status_xgxs0_mac_crs */ #define NIG_REG_LATCH_STATUS_0 0x18000 /* [RW 1] led 10g for port 0 */ #define NIG_REG_LED_10G_P0 0x10320 -/* [RW 1] led 10g for port 1 */ -#define NIG_REG_LED_10G_P1 0x10324 /* [RW 1] Port0: This bit is set to enable the use of the - ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 field - defined below. If this bit is cleared; then the blink rate will be about - 8Hz. */ + * ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 field + * defined below. If this bit is cleared; then the blink rate will be about + * 8Hz. */ #define NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 0x10318 /* [RW 12] Port0: Specifies the period of each blink cycle (on + off) for - Traffic LED in milliseconds. Must be a non-zero value. This 12-bit field - is reset to 0x080; giving a default blink period of approximately 8Hz. */ + * Traffic LED in milliseconds. Must be a non-zero value. This 12-bit field + * is reset to 0x080; giving a default blink period of approximately 8Hz. */ #define NIG_REG_LED_CONTROL_BLINK_RATE_P0 0x10310 /* [RW 1] Port0: If set along with the - ~nig_registers_led_control_override_traffic_p0.led_control_override_traffic_p0 - bit and ~nig_registers_led_control_traffic_p0.led_control_traffic_p0 LED - bit; the Traffic LED will blink with the blink rate specified in - ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 and - ~nig_registers_led_control_blink_rate_ena_p0.led_control_blink_rate_ena_p0 - fields. */ + * \ + s_led_control_override_traffic_p0.led_control_override_traffic_p0 + * bit and ~nig_registers_led_control_traffic_p0.led_control_traffic_p0 LED + * bit; the Traffic LED will blink with the blink rate specified in + * ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 and + * ~nig_registers_led_control_blink_rate_ena_p0.led_control_blink_rate_ena_p0 + * fields. */ #define NIG_REG_LED_CONTROL_BLINK_TRAFFIC_P0 0x10308 /* [RW 1] Port0: If set overrides hardware control of the Traffic LED. The - Traffic LED will then be controlled via bit ~nig_registers_ - led_control_traffic_p0.led_control_traffic_p0 and bit - ~nig_registers_led_control_blink_traffic_p0.led_control_blink_traffic_p0 */ -#define NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 0x102f8 + * Traffic LED will then be controlled via bit ~nig_registers_ + * led_control_traffic_p0.led_control_traffic_p0 and bit + * ~nig_registers_led_control_blink_traffic_p0.led_control_blink_traffic_p0 */ +#define NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 0x102f8 /* [RW 1] Port0: If set along with the led_control_override_trafic_p0 bit; - turns on the Traffic LED. If the led_control_blink_traffic_p0 bit is also - set; the LED will blink with blink rate specified in - ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 and - ~nig_regsters_led_control_blink_rate_ena_p0.led_control_blink_rate_ena_p0 - fields. */ + * turns on the Traffic LED. If the led_control_blink_traffic_p0 bit is also + * set; the LED will blink with blink rate specified in + * ~nig_registers_led_control_blink_rate_p0.led_control_blink_rate_p0 and + * ~nig_regsters_led_control_blink_rate_ena_p0.led_control_blink_rate_ena_p0 + * fields. */ #define NIG_REG_LED_CONTROL_TRAFFIC_P0 0x10300 /* [RW 4] led mode for port0: 0 MAC; 1-3 PHY1; 4 MAC2; 5-7 PHY4; 8-MAC3; - 9-11PHY7; 12 MAC4; 13-15 PHY10; */ + * 9-11PHY7; 12 MAC4; 13-15 PHY10; */ #define NIG_REG_LED_MODE_P0 0x102f0 /* [RW 3] for port0 enable for llfc ppp and pause. b0 - brb1 enable; b1- - tsdm enable; b2- usdm enable */ + * tsdm enable; b2- usdm enable */ #define NIG_REG_LLFC_EGRESS_SRC_ENABLE_0 0x16070 #define NIG_REG_LLFC_EGRESS_SRC_ENABLE_1 0x16074 /* [RW 1] SAFC enable for port0. This register may get 1 only when - ~ppp_enable.ppp_enable = 0 and pause_enable.pause_enable =0 for the same - port */ + * ~ppp_enable.ppp_enable = 0 and pause_enable.pause_enable =0 for the same + * port */ #define NIG_REG_LLFC_ENABLE_0 0x16208 #define NIG_REG_LLFC_ENABLE_1 0x1620c /* [RW 16] classes are high-priority for port0 */ @@ -1895,371 +1248,720 @@ /* [RW 1] send to BRB1 if no match on any of RMP rules. */ #define NIG_REG_LLH0_BRB1_NOT_MCP 0x1025c /* [RW 2] Determine the classification participants. 0: no classification.1: - classification upon VLAN id. 2: classification upon MAC address. 3: - classification upon both VLAN id & MAC addr. */ + * classification upon VLAN id. 2: classification upon MAC address. 3: + * classification upon both VLAN id & MAC addr. */ #define NIG_REG_LLH0_CLS_TYPE 0x16080 -/* [RW 32] cm header for llh0 */ -#define NIG_REG_LLH0_CM_HEADER 0x1007c #define NIG_REG_LLH0_DEST_IP_0_1 0x101dc #define NIG_REG_LLH0_DEST_MAC_0_0 0x101c0 /* [RW 16] destination TCP address 1. The LLH will look for this address in - all incoming packets. */ -#define NIG_REG_LLH0_DEST_TCP_0 0x10220 + * all incoming packets. */ +#define NIG_REG_LLH0_DEST_TCP_0 0x10220 /* [RW 16] destination UDP address 1 The LLH will look for this address in - all incoming packets. */ -#define NIG_REG_LLH0_DEST_UDP_0 0x10214 -#define NIG_REG_LLH0_ERROR_MASK 0x1008c -/* [RW 8] event id for llh0 */ -#define NIG_REG_LLH0_EVENT_ID 0x10084 + * all incoming packets. */ +#define NIG_REG_LLH0_DEST_UDP_0 0x10214 +/* [R 1] FIFO empty in LLH port0 */ +#define NIG_REG_LLH0_FIFO_EMPTY 0x10548 #define NIG_REG_LLH0_FUNC_EN 0x160fc #define NIG_REG_LLH0_FUNC_MEM 0x16180 #define NIG_REG_LLH0_FUNC_MEM_ENABLE 0x16140 #define NIG_REG_LLH0_FUNC_VLAN_ID 0x16100 /* [RW 1] Determine the IP version to look for in - ~nig_registers_llh0_dest_ip_0.llh0_dest_ip_0. 0 - IPv6; 1-IPv4 */ + * ~nig_registers_llh0_dest_ip_0.llh0_dest_ip_0. 0 - IPv6; 1-IPv4 */ #define NIG_REG_LLH0_IPV4_IPV6_0 0x10208 /* [RW 1] t bit for llh0 */ #define NIG_REG_LLH0_T_BIT 0x10074 /* [RW 12] VLAN ID 1. In case of VLAN packet the LLH will look for this ID. */ #define NIG_REG_LLH0_VLAN_ID_0 0x1022c -/* [RW 8] init credit counter for port0 in LLH */ -#define NIG_REG_LLH0_XCM_INIT_CREDIT 0x10554 #define NIG_REG_LLH0_XCM_MASK 0x10130 -#define NIG_REG_LLH1_BRB1_DRV_MASK 0x10248 /* [RW 1] send to BRB1 if no match on any of RMP rules. */ #define NIG_REG_LLH1_BRB1_NOT_MCP 0x102dc /* [RW 2] Determine the classification participants. 0: no classification.1: - classification upon VLAN id. 2: classification upon MAC address. 3: - classification upon both VLAN id & MAC addr. */ + * classification upon VLAN id. 2: classification upon MAC address. 3: + * classification upon both VLAN id & MAC addr. */ #define NIG_REG_LLH1_CLS_TYPE 0x16084 -/* [RW 32] cm header for llh1 */ -#define NIG_REG_LLH1_CM_HEADER 0x10080 -#define NIG_REG_LLH1_ERROR_MASK 0x10090 -/* [RW 8] event id for llh1 */ -#define NIG_REG_LLH1_EVENT_ID 0x10088 +/* [R 1] FIFO empty in LLH port1 */ +#define NIG_REG_LLH1_FIFO_EMPTY 0x10558 #define NIG_REG_LLH1_FUNC_MEM 0x161c0 #define NIG_REG_LLH1_FUNC_MEM_ENABLE 0x16160 #define NIG_REG_LLH1_FUNC_MEM_SIZE 16 -/* [RW 8] init credit counter for port1 in LLH */ -#define NIG_REG_LLH1_XCM_INIT_CREDIT 0x10564 +/* [RW 1] When this bit is set; the LLH will classify the packet before + * sending it to the BRB or calculating WoL on it. This bit controls port 1 + * only. The legacy llh_multi_function_mode bit controls port 0. */ +#define NIG_REG_LLH1_MF_MODE 0x18614 #define NIG_REG_LLH1_XCM_MASK 0x10134 /* [RW 1] When this bit is set; the LLH will expect all packets to be with - outer VLAN. This is not applicable to E2. */ + * outer VLAN. This is not applicable to E2. */ #define NIG_REG_LLH_E1HOV_MODE 0x160d8 /* [RW 1] When this bit is set; the LLH will classify the packet before - sending it to the BRB or calculating WoL on it. */ + * sending it to the BRB or calculating WoL on it. This bit is applicable to + * both ports 0 and 1 for E2. This bit only controls port 0 in E3. */ #define NIG_REG_LLH_MF_MODE 0x16024 #define NIG_REG_MASK_INTERRUPT_PORT0 0x10330 #define NIG_REG_MASK_INTERRUPT_PORT1 0x10334 -/* [RW 1] Output signal from NIG to EMAC0. When set enables the EMAC0 block. */ +/* [R 1] Output signal from NIG to EMAC0. When set enables the EMAC0 block. */ #define NIG_REG_NIG_EMAC0_EN 0x1003c -/* [RW 1] Output signal from NIG to EMAC1. When set enables the EMAC1 block. */ -#define NIG_REG_NIG_EMAC1_EN 0x10040 -/* [RW 1] Output signal from NIG to TX_EMAC0. When set indicates to the - EMAC0 to strip the CRC from the ingress packets. */ +/* [R 1] Output signal from NIG to TX_EMAC0. When set indicates to the EMAC0 + * to strip the CRC from the ingress packets. */ #define NIG_REG_NIG_INGRESS_EMAC0_NO_CRC 0x10044 /* [R 32] Interrupt register #0 read */ #define NIG_REG_NIG_INT_STS_0 0x103b0 #define NIG_REG_NIG_INT_STS_1 0x103c0 +/* [R 32] Legacy E1 and E1H location for parity error mask register. */ +#define NIG_REG_NIG_PRTY_MASK 0x103dc +/* [RW 32] Parity mask register #0 read/write */ +#define NIG_REG_NIG_PRTY_MASK_0 0x183c8 +#define NIG_REG_NIG_PRTY_MASK_1 0x183d8 /* [R 32] Legacy E1 and E1H location for parity error status register. */ #define NIG_REG_NIG_PRTY_STS 0x103d0 /* [R 32] Parity register #0 read */ #define NIG_REG_NIG_PRTY_STS_0 0x183bc #define NIG_REG_NIG_PRTY_STS_1 0x183cc -#define NIG_REG_P0_LLH_FUNC_MEM2 0x18480 -#define NIG_REG_P1_LLH_FUNC_MEM2 0x184c0 +/* [R 32] Legacy E1 and E1H location for parity error status clear register. */ +#define NIG_REG_NIG_PRTY_STS_CLR 0x103d4 +/* [RC 32] Parity register #0 read clear */ +#define NIG_REG_NIG_PRTY_STS_CLR_0 0x183c0 +#define NIG_REG_NIG_PRTY_STS_CLR_1 0x183d0 +/* [R 1] Indication that HBUF descriptor FIFO is empty. */ +#define NIG_REG_P0_HBUF_DSCR_EMPTY 0x18318 /* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic - Ethernet header. */ + * Ethernet header. */ #define NIG_REG_P0_HDRS_AFTER_BASIC 0x18038 /* [RW 1] HW PFC enable bit. Set this bit to enable the PFC functionality in - the NIG. Other flow control modes such as PAUSE and SAFC/LLFC should be - disabled when this bit is set. */ -#define NIG_REG_P0_HWPFC_ENABLE 0x18078 + * the NIG. Other flow control modes such as PAUSE and SAFC/LLFC should be + * disabled when this bit is set. */ +#define NIG_REG_P0_HWPFC_ENABLE 0x18078 +#define NIG_REG_P0_LLH_FUNC_MEM2 0x18480 +/* [RW 1] Input enable for RX MAC interface. */ +#define NIG_REG_P0_MAC_IN_EN 0x185ac +/* [RW 1] Output enable for TX MAC interface */ +#define NIG_REG_P0_MAC_OUT_EN 0x185b0 +/* [RW 1] Output enable for TX PAUSE signal to the MAC. */ +#define NIG_REG_P0_MAC_PAUSE_OUT_EN 0x185b4 /* [RW 32] Eight 4-bit configurations for specifying which COS (0-15 for - future expansion) each priorty is to be mapped to. Bits 3:0 specify the - COS for priority 0. Bits 31:28 specify the COS for priority 7. The 3-bit - priority field is extracted from the outer-most VLAN in receive packet. - Only COS 0 and COS 1 are supported in E2. */ + * future expansion) each priorty is to be mapped to. Bits 3:0 specify the + * COS for priority 0. Bits 31:28 specify the COS for priority 7. The 3-bit + * priority field is extracted from the outer-most VLAN in receive packet. + * Only COS 0 and COS 1 are supported in E2. */ #define NIG_REG_P0_PKT_PRIORITY_TO_COS 0x18054 /* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 0. A - priority is mapped to COS 0 when the corresponding mask bit is 1. More - than one bit may be set; allowing multiple priorities to be mapped to one - COS. */ + * priority is mapped to COS 0 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ #define NIG_REG_P0_RX_COS0_PRIORITY_MASK 0x18058 /* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 1. A - priority is mapped to COS 1 when the corresponding mask bit is 1. More - than one bit may be set; allowing multiple priorities to be mapped to one - COS. */ + * priority is mapped to COS 1 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ #define NIG_REG_P0_RX_COS1_PRIORITY_MASK 0x1805c -/* [RW 15] Specify which of the credit registers the client is to be mapped - to. Bits[2:0] are for client 0; bits [14:12] are for client 4. For - clients that are not subject to WFQ credit blocking - their - specifications here are not used. */ +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 2. A + * priority is mapped to COS 2 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P0_RX_COS2_PRIORITY_MASK 0x186b0 +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 3. A + * priority is mapped to COS 3 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P0_RX_COS3_PRIORITY_MASK 0x186b4 +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 4. A + * priority is mapped to COS 4 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P0_RX_COS4_PRIORITY_MASK 0x186b8 +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 5. A + * priority is mapped to COS 5 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P0_RX_COS5_PRIORITY_MASK 0x186bc +/* [R 1] RX FIFO for receiving data from MAC is empty. */ +#define NIG_REG_P0_RX_MACFIFO_EMPTY 0x18570 +/* [R 1] TLLH FIFO is empty. */ +#define NIG_REG_P0_TLLH_FIFO_EMPTY 0x18308 +/* [R 15] Specify which of the credit registers the client is to be mapped + * to. Bits[2:0] are for client 0; bits [14:12] are for client 4. For + * clients that are not subject to WFQ credit blocking - their + * specifications here are not used. */ #define NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP 0x180f0 -/* [RW 5] Specify whether the client competes directly in the strict - priority arbiter. The bits are mapped according to client ID (client IDs - are defined in tx_arb_priority_client). Default value is set to enable - strict priorities for clients 0-2 -- management and debug traffic. */ +/* [RW 32] Specify which of the credit registers the client is to be mapped + * to. This register specifies bits 31:0 of the 36-bit value. Bits[3:0] are + * for client 0; bits [35:32] are for client 8. For clients that are not + * subject to WFQ credit blocking - their specifications here are not used. + * This is a new register (with 2_) added in E3 B0 to accommodate the 9 + * input clients to ETS arbiter. The reset default is set for management and + * debug to use credit registers 6, 7, and 8, respectively, and COSes 0-5 to + * use credit registers 0-5 respectively (0x543210876). Note that credit + * registers can not be shared between clients. */ +#define NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_LSB 0x18688 +/* [RW 4] Specify which of the credit registers the client is to be mapped + * to. This register specifies bits 35:32 of the 36-bit value. Bits[3:0] are + * for client 0; bits [35:32] are for client 8. For clients that are not + * subject to WFQ credit blocking - their specifications here are not used. + * This is a new register (with 2_) added in E3 B0 to accommodate the 9 + * input clients to ETS arbiter. The reset default is set for management and + * debug to use credit registers 6, 7, and 8, respectively, and COSes 0-5 to + * use credit registers 0-5 respectively (0x543210876). Note that credit + * registers can not be shared between clients. */ +#define NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_MSB 0x1868c +/* [RW 9] Specify whether the client competes directly in the strict + * priority arbiter. The bits are mapped according to client ID (client IDs + * are defined in tx_arb_priority_client2): 0-management; 1-debug traffic + * from this port; 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 + * traffic; 5-COS2 traffic; 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. + * Default value is set to enable strict priorities for all clients. */ #define NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT 0x180e8 -/* [RW 5] Specify whether the client is subject to WFQ credit blocking. The - bits are mapped according to client ID (client IDs are defined in - tx_arb_priority_client). Default value is 0 for not using WFQ credit - blocking. */ -#define NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ 0x180ec +/* [RW 9] Specify whether the client is subject to WFQ credit blocking. The + * bits are mapped according to client ID (client IDs are defined in + * tx_arb_priority_client2): 0-management; 1-debug traffic from this port; + * 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 + * traffic; 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. Default value is + * 0 for not using WFQ credit blocking. */ +#define NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ 0x180ec /* [RW 32] Specify the upper bound that credit register 0 is allowed to - reach. */ + * reach. */ #define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_0 0x1810c #define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_1 0x18110 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_2 0x18114 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_3 0x18118 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_4 0x1811c +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_5 0x186a0 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_6 0x186a4 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_7 0x186a8 +#define NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_8 0x186ac /* [RW 32] Specify the weight (in bytes) to be added to credit register 0 - when it is time to increment. */ + * when it is time to increment. */ #define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0 0x180f8 #define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_1 0x180fc +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_2 0x18100 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_3 0x18104 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_4 0x18108 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_5 0x18690 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_6 0x18694 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_7 0x18698 +#define NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_8 0x1869c /* [RW 12] Specify the number of strict priority arbitration slots between - two round-robin arbitration slots to avoid starvation. A value of 0 means - no strict priority cycles - the strict priority with anti-starvation - arbiter becomes a round-robin arbiter. */ + * two round-robin arbitration slots to avoid starvation. A value of 0 means + * no strict priority cycles - the strict priority with anti-starvation + * arbiter becomes a round-robin arbiter. */ #define NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS 0x180f4 -/* [RW 15] Specify the client number to be assigned to each priority of the - strict priority arbiter. Priority 0 is the highest priority. Bits [2:0] - are for priority 0 client; bits [14:12] are for priority 4 client. The - clients are assigned the following IDs: 0-management; 1-debug traffic - from this port; 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 - traffic. The reset value[14:0] is set to 0x4688 (15'b100_011_010_001_000) - for management at priority 0; debug traffic at priorities 1 and 2; COS0 - traffic at priority 3; and COS1 traffic at priority 4. */ +/* [R 15] Specify the client number to be assigned to each priority of the + * strict priority arbiter. Priority 0 is the highest priority. Bits [2:0] + * are for priority 0 client; bits [14:12] are for priority 4 client. The + * clients are assigned the following IDs: 0-management; 1-debug traffic + * from this port; 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 + * traffic. The reset value[14:0] is set to 0x4688 (15'b100_011_010_001_000) + * for management at priority 0; debug traffic at priorities 1 and 2; COS0 + * traffic at priority 3; and COS1 traffic at priority 4. */ #define NIG_REG_P0_TX_ARB_PRIORITY_CLIENT 0x180e4 +/* [RW 32] Specify the client number to be assigned to each priority of the + * strict priority arbiter. This register specifies bits 31:0 of the 36-bit + * value. Priority 0 is the highest priority. Bits [3:0] are for priority 0 + * client; bits [35-32] are for priority 8 client. The clients are assigned + * the following IDs: 0-management; 1-debug traffic from this port; 2-debug + * traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 traffic; + * 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. The reset value[35:0] is + * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to + * accommodate the 9 input clients to ETS arbiter. */ +#define NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB 0x18680 +/* [RW 4] Specify the client number to be assigned to each priority of the + * strict priority arbiter. This register specifies bits 35:32 of the 36-bit + * value. Priority 0 is the highest priority. Bits [3:0] are for priority 0 + * client; bits [35-32] are for priority 8 client. The clients are assigned + * the following IDs: 0-management; 1-debug traffic from this port; 2-debug + * traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 traffic; + * 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. The reset value[35:0] is + * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to + * accommodate the 9 input clients to ETS arbiter. */ +#define NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB 0x18684 +/* [R 1] TX FIFO for transmitting data to MAC is empty. */ +#define NIG_REG_P0_TX_MACFIFO_EMPTY 0x18578 +/* [R 1] FIFO empty status of the MCP TX FIFO used for storing MCP packets + * forwarded to the host. */ +#define NIG_REG_P0_TX_MNG_HOST_FIFO_EMPTY 0x182a8 +/* [R 1] Indication that HBUF descriptor FIFO is empty. */ +#define NIG_REG_P1_HBUF_DSCR_EMPTY 0x18348 +/* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic + * Ethernet header. */ +#define NIG_REG_P1_HDRS_AFTER_BASIC 0x1818c +/* [RW 1] HW PFC enable bit. Set this bit to enable the PFC functionality in + * the NIG. Other flow control modes such as PAUSE and SAFC/LLFC should be + * disabled when this bit is set. */ +#define NIG_REG_P1_HWPFC_ENABLE 0x181d0 +#define NIG_REG_P1_LLH_FUNC_MEM2 0x184c0 +/* [RW 1] Input enable for RX MAC interface. */ +#define NIG_REG_P1_MAC_IN_EN 0x185c0 +/* [RW 1] Output enable for TX MAC interface */ +#define NIG_REG_P1_MAC_OUT_EN 0x185c4 +/* [RW 1] Output enable for TX PAUSE signal to the MAC. */ +#define NIG_REG_P1_MAC_PAUSE_OUT_EN 0x185c8 /* [RW 32] Eight 4-bit configurations for specifying which COS (0-15 for - future expansion) each priorty is to be mapped to. Bits 3:0 specify the - COS for priority 0. Bits 31:28 specify the COS for priority 7. The 3-bit - priority field is extracted from the outer-most VLAN in receive packet. - Only COS 0 and COS 1 are supported in E2. */ + * future expansion) each priorty is to be mapped to. Bits 3:0 specify the + * COS for priority 0. Bits 31:28 specify the COS for priority 7. The 3-bit + * priority field is extracted from the outer-most VLAN in receive packet. + * Only COS 0 and COS 1 are supported in E2. */ #define NIG_REG_P1_PKT_PRIORITY_TO_COS 0x181a8 /* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 0. A - priority is mapped to COS 0 when the corresponding mask bit is 1. More - than one bit may be set; allowing multiple priorities to be mapped to one - COS. */ + * priority is mapped to COS 0 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ #define NIG_REG_P1_RX_COS0_PRIORITY_MASK 0x181ac /* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 1. A - priority is mapped to COS 1 when the corresponding mask bit is 1. More - than one bit may be set; allowing multiple priorities to be mapped to one - COS. */ + * priority is mapped to COS 1 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ #define NIG_REG_P1_RX_COS1_PRIORITY_MASK 0x181b0 +/* [RW 16] Bit-map indicating which SAFC/PFC priorities to map to COS 2. A + * priority is mapped to COS 2 when the corresponding mask bit is 1. More + * than one bit may be set; allowing multiple priorities to be mapped to one + * COS. */ +#define NIG_REG_P1_RX_COS2_PRIORITY_MASK 0x186f8 +/* [R 1] RX FIFO for receiving data from MAC is empty. */ +#define NIG_REG_P1_RX_MACFIFO_EMPTY 0x1858c +/* [R 1] TLLH FIFO is empty. */ +#define NIG_REG_P1_TLLH_FIFO_EMPTY 0x18338 +/* [RW 32] Specify which of the credit registers the client is to be mapped + * to. This register specifies bits 31:0 of the 36-bit value. Bits[3:0] are + * for client 0; bits [35:32] are for client 8. For clients that are not + * subject to WFQ credit blocking - their specifications here are not used. + * This is a new register (with 2_) added in E3 B0 to accommodate the 9 + * input clients to ETS arbiter. The reset default is set for management and + * debug to use credit registers 6, 7, and 8, respectively, and COSes 0-5 to + * use credit registers 0-5 respectively (0x543210876). Note that credit + * registers can not be shared between clients. Note also that there are + * only COS0-2 in port 1- there is a total of 6 clients in port 1. Only + * credit registers 0-5 are valid. This register should be configured + * appropriately before enabling WFQ. */ +#define NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_LSB 0x186e8 +/* [RW 4] Specify which of the credit registers the client is to be mapped + * to. This register specifies bits 35:32 of the 36-bit value. Bits[3:0] are + * for client 0; bits [35:32] are for client 8. For clients that are not + * subject to WFQ credit blocking - their specifications here are not used. + * This is a new register (with 2_) added in E3 B0 to accommodate the 9 + * input clients to ETS arbiter. The reset default is set for management and + * debug to use credit registers 6, 7, and 8, respectively, and COSes 0-5 to + * use credit registers 0-5 respectively (0x543210876). Note that credit + * registers can not be shared between clients. Note also that there are + * only COS0-2 in port 1- there is a total of 6 clients in port 1. Only + * credit registers 0-5 are valid. This register should be configured + * appropriately before enabling WFQ. */ +#define NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_MSB 0x186ec +/* [RW 9] Specify whether the client competes directly in the strict + * priority arbiter. The bits are mapped according to client ID (client IDs + * are defined in tx_arb_priority_client2): 0-management; 1-debug traffic + * from this port; 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 + * traffic; 5-COS2 traffic; 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. + * Default value is set to enable strict priorities for all clients. */ +#define NIG_REG_P1_TX_ARB_CLIENT_IS_STRICT 0x18234 +/* [RW 9] Specify whether the client is subject to WFQ credit blocking. The + * bits are mapped according to client ID (client IDs are defined in + * tx_arb_priority_client2): 0-management; 1-debug traffic from this port; + * 2-debug traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 + * traffic; 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. Default value is + * 0 for not using WFQ credit blocking. */ +#define NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ 0x18238 +/* [RW 32] Specify the upper bound that credit register 0 is allowed to + * reach. */ +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_0 0x18258 +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_1 0x1825c +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_2 0x18260 +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_3 0x18264 +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_4 0x18268 +#define NIG_REG_P1_TX_ARB_CREDIT_UPPER_BOUND_5 0x186f4 +/* [RW 32] Specify the weight (in bytes) to be added to credit register 0 + * when it is time to increment. */ +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_0 0x18244 +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_1 0x18248 +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_2 0x1824c +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_3 0x18250 +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_4 0x18254 +#define NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_5 0x186f0 +/* [RW 12] Specify the number of strict priority arbitration slots between + * two round-robin arbitration slots to avoid starvation. A value of 0 means + * no strict priority cycles - the strict priority with anti-starvation + * arbiter becomes a round-robin arbiter. */ +#define NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS 0x18240 +/* [RW 32] Specify the client number to be assigned to each priority of the + * strict priority arbiter. This register specifies bits 31:0 of the 36-bit + * value. Priority 0 is the highest priority. Bits [3:0] are for priority 0 + * client; bits [35-32] are for priority 8 client. The clients are assigned + * the following IDs: 0-management; 1-debug traffic from this port; 2-debug + * traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 traffic; + * 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. The reset value[35:0] is + * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to + * accommodate the 9 input clients to ETS arbiter. Note that this register + * is the same as the one for port 0, except that port 1 only has COS 0-2 + * traffic. There is no traffic for COS 3-5 of port 1. */ +#define NIG_REG_P1_TX_ARB_PRIORITY_CLIENT2_LSB 0x186e0 +/* [RW 4] Specify the client number to be assigned to each priority of the + * strict priority arbiter. This register specifies bits 35:32 of the 36-bit + * value. Priority 0 is the highest priority. Bits [3:0] are for priority 0 + * client; bits [35-32] are for priority 8 client. The clients are assigned + * the following IDs: 0-management; 1-debug traffic from this port; 2-debug + * traffic from other port; 3-COS0 traffic; 4-COS1 traffic; 5-COS2 traffic; + * 6-COS3 traffic; 7-COS4 traffic; 8-COS5 traffic. The reset value[35:0] is + * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to + * accommodate the 9 input clients to ETS arbiter. Note that this register + * is the same as the one for port 0, except that port 1 only has COS 0-2 + * traffic. There is no traffic for COS 3-5 of port 1. */ +#define NIG_REG_P1_TX_ARB_PRIORITY_CLIENT2_MSB 0x186e4 +/* [R 1] TX FIFO for transmitting data to MAC is empty. */ +#define NIG_REG_P1_TX_MACFIFO_EMPTY 0x18594 +/* [R 1] FIFO empty status of the MCP TX FIFO used for storing MCP packets + * forwarded to the host. */ +#define NIG_REG_P1_TX_MNG_HOST_FIFO_EMPTY 0x182b8 /* [RW 1] Pause enable for port0. This register may get 1 only when - ~safc_enable.safc_enable = 0 and ppp_enable.ppp_enable =0 for the same - port */ + * ~safc_enable.safc_enable = 0 and ppp_enable.ppp_enable =0 for the same + * port */ #define NIG_REG_PAUSE_ENABLE_0 0x160c0 #define NIG_REG_PAUSE_ENABLE_1 0x160c4 -/* [RW 1] Input enable for RX PBF LP IF */ -#define NIG_REG_PBF_LB_IN_EN 0x100b4 /* [RW 1] Value of this register will be transmitted to port swap when - ~nig_registers_strap_override.strap_override =1 */ + * ~nig_registers_strap_override.strap_override =1 */ #define NIG_REG_PORT_SWAP 0x10394 -/* [RW 16] ADDRESS for header in PP message to PXP internal write IF */ -#define NIG_REG_PPP_ADDRESS 0x160a4 /* [RW 1] PPP enable for port0. This register may get 1 only when - ~safc_enable.safc_enable = 0 and pause_enable.pause_enable =0 for the - same port */ + * ~safc_enable.safc_enable = 0 and pause_enable.pause_enable =0 for the + * same port */ #define NIG_REG_PPP_ENABLE_0 0x160b0 #define NIG_REG_PPP_ENABLE_1 0x160b4 -/* [RW 1] Output enable of message to PXP IF */ -#define NIG_REG_PPP_OUT_EN 0x16204 -/* [RW 4] STORM ID for header in PP message to PXP internal write IF */ -#define NIG_REG_PPP_STORM_ID 0x160a0 -/* [RW 8] T124param for header in PP message to PXP internal write IF */ -#define NIG_REG_PPP_T124PARAM 0x160ac -/* [RW 4] Trigger for header in PP message to PXP internal write IF */ -#define NIG_REG_PPP_TRIG 0x160a8 -/* [RW 1] output enable for RX parser descriptor IF */ -#define NIG_REG_PRS_EOP_OUT_EN 0x10104 /* [RW 1] Input enable for RX parser request IF */ #define NIG_REG_PRS_REQ_IN_EN 0x100b8 -/* [RW 5] control to serdes - CL45 DEVAD */ +/* [R 5] control to serdes - CL45 DEVAD */ #define NIG_REG_SERDES0_CTRL_MD_DEVAD 0x10370 -/* [RW 1] control to serdes; 0 - clause 45; 1 - clause 22 */ +/* [R 1] control to serdes; 0 - clause 45; 1 - clause 22 */ #define NIG_REG_SERDES0_CTRL_MD_ST 0x1036c -/* [RW 5] control to serdes - CL22 PHY_ADD and CL45 PRTAD */ +/* [R 5] control to serdes - CL22 PHY_ADD and CL45 PRTAD */ #define NIG_REG_SERDES0_CTRL_PHY_ADDR 0x10374 /* [R 1] status from serdes0 that inputs to interrupt logic of link status */ #define NIG_REG_SERDES0_STATUS_LINK_STATUS 0x10578 /* [R 32] Rx statistics : In user packets discarded due to BRB backpressure - for port 0 COS0 */ + * for port 0 COS0 */ #define NIG_REG_STAT0_BRB_DISCARD 0x105f0 /* [R 32] Rx statistics : In user packets truncated due to BRB backpressure - for port 0 COS0 */ + * for port 0 COS0 */ #define NIG_REG_STAT0_BRB_TRUNCATE 0x105f8 /* [WB_R 36] Tx statistics : Number of packets from emac0 or bmac0 that - between 1024 and 1522 bytes for port0 */ + * between 1024 and 1522 bytes for port0 */ #define NIG_REG_STAT0_EGRESS_MAC_PKT0 0x10750 /* [WB_R 36] Tx statistics : Number of packets from emac0 or bmac0 that - between 1523 bytes and above for port0 */ + * between 1523 bytes and above for port0 */ #define NIG_REG_STAT0_EGRESS_MAC_PKT1 0x10760 /* [R 32] Rx statistics : In user packets discarded due to BRB backpressure - for port 1 COS0 */ + * for port 1 COS0 */ #define NIG_REG_STAT1_BRB_DISCARD 0x10628 /* [WB_R 36] Tx statistics : Number of packets from emac1 or bmac1 that - between 1024 and 1522 bytes for port1 */ + * between 1024 and 1522 bytes for port1 */ #define NIG_REG_STAT1_EGRESS_MAC_PKT0 0x107a0 /* [WB_R 36] Tx statistics : Number of packets from emac1 or bmac1 that - between 1523 bytes and above for port1 */ + * between 1523 bytes and above for port1 */ #define NIG_REG_STAT1_EGRESS_MAC_PKT1 0x107b0 /* [WB_R 64] Rx statistics : User octets received for LP */ -#define NIG_REG_STAT2_BRB_OCTET 0x107e0 +#define NIG_REG_STAT2_BRB_OCTET 0x107e0 #define NIG_REG_STATUS_INTERRUPT_PORT0 0x10328 -#define NIG_REG_STATUS_INTERRUPT_PORT1 0x1032c /* [RW 1] port swap mux selection. If this register equal to 0 then port - swap is equal to SPIO pin that inputs from ifmux_serdes_swap. If 1 then - ort swap is equal to ~nig_registers_port_swap.port_swap */ + * swap is equal to SPIO pin that inputs from ifmux_serdes_swap. If 1 then + * ort swap is equal to ~nig_registers_port_swap.port_swap */ #define NIG_REG_STRAP_OVERRIDE 0x10398 /* [RW 1] output enable for RX_XCM0 IF */ #define NIG_REG_XCM0_OUT_EN 0x100f0 /* [RW 1] output enable for RX_XCM1 IF */ #define NIG_REG_XCM1_OUT_EN 0x100f4 -/* [RW 1] control to xgxs - remote PHY in-band MDIO */ +/* [R 1] control to xgxs - remote PHY in-band MDIO */ #define NIG_REG_XGXS0_CTRL_EXTREMOTEMDIOST 0x10348 -/* [RW 5] control to xgxs - CL45 DEVAD */ +/* [R 5] control to xgxs - CL45 DEVAD */ #define NIG_REG_XGXS0_CTRL_MD_DEVAD 0x1033c -/* [RW 1] control to xgxs; 0 - clause 45; 1 - clause 22 */ +/* [R 1] control to xgxs; 0 - clause 45; 1 - clause 22 */ #define NIG_REG_XGXS0_CTRL_MD_ST 0x10338 -/* [RW 5] control to xgxs - CL22 PHY_ADD and CL45 PRTAD */ +/* [R 5] control to xgxs - CL22 PHY_ADD and CL45 PRTAD */ #define NIG_REG_XGXS0_CTRL_PHY_ADDR 0x10340 /* [R 1] status from xgxs0 that inputs to interrupt logic of link10g. */ #define NIG_REG_XGXS0_STATUS_LINK10G 0x10680 /* [R 4] status from xgxs0 that inputs to interrupt logic of link status */ #define NIG_REG_XGXS0_STATUS_LINK_STATUS 0x10684 -/* [RW 2] selection for XGXS lane of port 0 in NIG_MUX block */ +/* [R 2] selection for XGXS lane of port 0 in NIG_MUX block */ #define NIG_REG_XGXS_LANE_SEL_P0 0x102e8 -/* [RW 1] selection for port0 for NIG_MUX block : 0 = SerDes; 1 = XGXS */ +/* [R 1] selection for port0 for NIG_MUX block : 0 = SerDes; 1 = XGXS */ #define NIG_REG_XGXS_SERDES0_MODE_SEL 0x102e0 -#define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_EMAC0_MISC_MI_INT (0x1<<0) +#define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_EMAC0_MISC_MI_INT (0x1<<0) #define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_SERDES0_LINK_STATUS (0x1<<9) #define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK10G (0x1<<15) -#define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS (0xf<<18) +#define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS (0xf<<18) #define NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS_SIZE 18 -/* [RW 31] The upper bound of the weight of COS0 in the ETS command arbiter. */ +/* [R 31] Removed for E3 B0 -The upper bound of the weight of COS0 in the + * ETS command arbiter. */ #define PBF_REG_COS0_UPPER_BOUND 0x15c05c -/* [RW 31] The weight of COS0 in the ETS command arbiter. */ +/* [RW 31] The upper bound of the weight of COS0 in the ETS command arbiter + * of port 0. */ +#define PBF_REG_COS0_UPPER_BOUND_P0 0x15c2cc +/* [RW 31] The upper bound of the weight of COS0 in the ETS command arbiter + * of port 1. */ +#define PBF_REG_COS0_UPPER_BOUND_P1 0x15c2e4 +/* [R 31] Removed for E3 B0 - The weight of COS0 in the ETS command arbiter. */ #define PBF_REG_COS0_WEIGHT 0x15c054 -/* [RW 31] The upper bound of the weight of COS1 in the ETS command arbiter. */ +/* [RW 31] The weight of COS0 in port 0 ETS command arbiter. */ +#define PBF_REG_COS0_WEIGHT_P0 0x15c2a8 +/* [RW 31] The weight of COS0 in port 1 ETS command arbiter. */ +#define PBF_REG_COS0_WEIGHT_P1 0x15c2c0 +/* [R 31] Removed for E3 B0 -The upper bound of the weight of COS1 in the + * ETS command arbiter. */ #define PBF_REG_COS1_UPPER_BOUND 0x15c060 -/* [RW 31] The weight of COS1 in the ETS command arbiter. */ +/* [R 31] Removed for E3 B0 - The weight of COS1 in the ETS command arbiter. */ #define PBF_REG_COS1_WEIGHT 0x15c058 -/* [RW 1] Disable processing further tasks from port 0 (after ending the - current task in process). */ +/* [RW 31] The weight of COS1 in port 0 ETS command arbiter. */ +#define PBF_REG_COS1_WEIGHT_P0 0x15c2ac +/* [RW 31] The weight of COS1 in port 1 ETS command arbiter. */ +#define PBF_REG_COS1_WEIGHT_P1 0x15c2c4 +/* [RW 31] The weight of COS2 in port 0 ETS command arbiter. */ +#define PBF_REG_COS2_WEIGHT_P0 0x15c2b0 +/* [RW 31] The weight of COS2 in port 1 ETS command arbiter. */ +#define PBF_REG_COS2_WEIGHT_P1 0x15c2c8 +/* [RW 31] The weight of COS3 in port 0 ETS command arbiter. */ +#define PBF_REG_COS3_WEIGHT_P0 0x15c2b4 +/* [RW 31] The weight of COS4 in port 0 ETS command arbiter. */ +#define PBF_REG_COS4_WEIGHT_P0 0x15c2b8 +/* [RW 31] The weight of COS5 in port 0 ETS command arbiter. */ +#define PBF_REG_COS5_WEIGHT_P0 0x15c2bc +/* [R 11] Current credit for the LB queue in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_LB_Q 0x140338 +/* [R 11] Current credit for queue 0 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q0 0x14033c +/* [R 11] Current credit for queue 1 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q1 0x140340 +/* [R 11] Current credit for queue 2 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q2 0x140344 +/* [R 11] Current credit for queue 3 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q3 0x140348 +/* [R 11] Current credit for queue 4 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q4 0x14034c +/* [R 11] Current credit for queue 5 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_CREDIT_Q5 0x140350 +/* [R 1] Removed for E3 B0 - Disable processing further tasks from port 0 + * (after ending the current task in process). */ #define PBF_REG_DISABLE_NEW_TASK_PROC_P0 0x14005c -/* [RW 1] Disable processing further tasks from port 1 (after ending the - current task in process). */ +/* [R 1] Removed for E3 B0 - Disable processing further tasks from port 1 + * (after ending the current task in process). */ #define PBF_REG_DISABLE_NEW_TASK_PROC_P1 0x140060 -/* [RW 1] Disable processing further tasks from port 4 (after ending the - current task in process). */ -#define PBF_REG_DISABLE_NEW_TASK_PROC_P4 0x14006c +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q0 0x15c1bc +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q1 0x15c1c0 +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q2 0x15c1c4 +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q3 0x15c1c8 +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q4 0x15c1cc +/* [RW 1] Disable processing further tasks from port 0 (after ending the + * current task in process). */ +#define PBF_REG_DISABLE_NEW_TASK_PROC_Q5 0x15c1d0 #define PBF_REG_DISABLE_PF 0x1402e8 #define PBF_REG_DISABLE_VF 0x1402ec -/* [RW 1] if set; packets with error will be dropped; otherwise transmitted - with error to the NIG (FCS). */ -#define PBF_REG_DROP_PKT_UPON_ERR 0x15c100 -/* [RW 1] E1.5 FW backward compatibility mode. If set then backward - compatible to E1.5. */ -#define PBF_REG_E15_FW_COMPAT_MODE 0x15c024 -/* [RW 1] Indicates that ETS is performed between the COSes in the command - arbiter. If reset strict priority w/ anti-starvation will be performed - w/o WFQ. */ +/* [RW 18] For port 0: For each client that is subject to WFQ (the + * corresponding bit is 1); indicates to which of the credit registers this + * client is mapped. For clients which are not credit blocked; their mapping + * is dont care. */ +#define PBF_REG_ETS_ARB_CLIENT_CREDIT_MAP_P0 0x15c288 +/* [RW 9] For port 1: For each client that is subject to WFQ (the + * corresponding bit is 1); indicates to which of the credit registers this + * client is mapped. For clients which are not credit blocked; their mapping + * is dont care. */ +#define PBF_REG_ETS_ARB_CLIENT_CREDIT_MAP_P1 0x15c28c +/* [RW 6] For port 0: Bit per client to indicate if the client competes in + * the strict priority arbiter directly (corresponding bit = 1); or first + * goes to the RR arbiter (corresponding bit = 0); and then competes in the + * lowest priority in the strict-priority arbiter. */ +#define PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P0 0x15c278 +/* [RW 3] For port 1: Bit per client to indicate if the client competes in + * the strict priority arbiter directly (corresponding bit = 1); or first + * goes to the RR arbiter (corresponding bit = 0); and then competes in the + * lowest priority in the strict-priority arbiter. */ +#define PBF_REG_ETS_ARB_CLIENT_IS_STRICT_P1 0x15c27c +/* [RW 6] For port 0: Bit per client to indicate if the client is subject to + * WFQ credit blocking (corresponding bit = 1). */ +#define PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0 0x15c280 +/* [RW 3] For port 0: Bit per client to indicate if the client is subject to + * WFQ credit blocking (corresponding bit = 1). */ +#define PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1 0x15c284 +/* [RW 16] For port 0: The number of strict priority arbitration slots + * between 2 RR arbitration slots. A value of 0 means no strict priority + * cycles; i.e. the strict-priority w/ anti-starvation arbiter is a RR + * arbiter. */ +#define PBF_REG_ETS_ARB_NUM_STRICT_ARB_SLOTS_P0 0x15c2a0 +/* [RW 16] For port 1: The number of strict priority arbitration slots + * between 2 RR arbitration slots. A value of 0 means no strict priority + * cycles; i.e. the strict-priority w/ anti-starvation arbiter is a RR + * arbiter. */ +#define PBF_REG_ETS_ARB_NUM_STRICT_ARB_SLOTS_P1 0x15c2a4 +/* [RW 18] For port 0: Indicates which client is connected to each priority + * in the strict-priority arbiter. Priority 0 is the highest priority, and + * priority 5 is the lowest; to which the RR output is connected to (this is + * not configurable). */ +#define PBF_REG_ETS_ARB_PRIORITY_CLIENT_P0 0x15c270 +/* [RW 9] For port 1: Indicates which client is connected to each priority + * in the strict-priority arbiter. Priority 0 is the highest priority, and + * priority 5 is the lowest; to which the RR output is connected to (this is + * not configurable). */ +#define PBF_REG_ETS_ARB_PRIORITY_CLIENT_P1 0x15c274 +/* [R 1] Removed for E3 B0 - Indicates that ETS is performed between the + * COSes in the command arbiter. If reset strict priority w/ anti-starvation + * will be performed w/o WFQ. */ #define PBF_REG_ETS_ENABLED 0x15c050 /* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic - Ethernet header. */ + * Ethernet header. */ #define PBF_REG_HDRS_AFTER_BASIC 0x15c0a8 -/* [RW 1] Indicates which COS is conncted to the highest priority in the - command arbiter. */ +/* [RW 6] Bit-map indicating which L2 hdrs may appear after L2 tag 0 */ +#define PBF_REG_HDRS_AFTER_TAG_0 0x15c0b8 +/* [R 1] Removed for E3 B0 - Indicates which COS is conncted to the highest + * priority in the command arbiter. */ #define PBF_REG_HIGH_PRIORITY_COS_NUM 0x15c04c -#define PBF_REG_IF_ENABLE_REG 0x140044 -/* [RW 1] Init bit. When set the initial credits are copied to the credit - registers (except the port credits). Should be set and then reset after - the configuration of the block has ended. */ -#define PBF_REG_INIT 0x140000 -/* [RW 1] Init bit for port 0. When set the initial credit of port 0 is - copied to the credit register. Should be set and then reset after the - configuration of the port has ended. */ -#define PBF_REG_INIT_P0 0x140004 -/* [RW 1] Init bit for port 1. When set the initial credit of port 1 is - copied to the credit register. Should be set and then reset after the - configuration of the port has ended. */ -#define PBF_REG_INIT_P1 0x140008 -/* [RW 1] Init bit for port 4. When set the initial credit of port 4 is - copied to the credit register. Should be set and then reset after the - configuration of the port has ended. */ -#define PBF_REG_INIT_P4 0x14000c +/* [RW 11] Initial credit for the LB queue in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_LB_Q 0x15c248 +/* [RW 11] Initial credit for queue 0 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q0 0x15c230 +/* [RW 11] Initial credit for queue 1 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q1 0x15c234 +/* [RW 11] Initial credit for queue 2 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q2 0x15c238 +/* [RW 11] Initial credit for queue 3 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q3 0x15c23c +/* [RW 11] Initial credit for queue 4 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q4 0x15c240 +/* [RW 11] Initial credit for queue 5 in the tx port buffers in 16 byte + * lines. */ +#define PBF_REG_INIT_CRD_Q5 0x15c244 +/* [R 1] Removed for E3 B0 - Init bit for port 0. When set the initial + * credit of port 0 is copied to the credit register. Should be set and then + * reset after the configuration of the port has ended. */ +#define PBF_REG_INIT_P0 0x140004 +/* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for + * the LB queue. Reset upon init. */ +#define PBF_REG_INTERNAL_CRD_FREED_CNT_LB_Q 0x140354 +/* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for + * queue 0. Reset upon init. */ +#define PBF_REG_INTERNAL_CRD_FREED_CNT_Q0 0x140358 +/* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for + * queue 1. Reset upon init. */ +#define PBF_REG_INTERNAL_CRD_FREED_CNT_Q1 0x14035c /* [RW 1] Enable for mac interface 0. */ #define PBF_REG_MAC_IF0_ENABLE 0x140030 -/* [RW 1] Enable for mac interface 1. */ -#define PBF_REG_MAC_IF1_ENABLE 0x140034 -/* [RW 1] Enable for the loopback interface. */ -#define PBF_REG_MAC_LB_ENABLE 0x140040 /* [RW 6] Bit-map indicating which headers must appear in the packet */ #define PBF_REG_MUST_HAVE_HDRS 0x15c0c4 -/* [RW 1] if set; there is no expected L2 padding in the packet. */ -#define PBF_REG_NO_PAD_IN_PKT 0x15c104 -/* [RW 16] The number of strict priority arbitration slots between 2 RR - arbitration slots. A value of 0 means no strict priority cycles; i.e. the - strict-priority w/ anti-starvation arbiter is a RR arbiter. */ +/* [R 16] Removed for E3 B0 - The number of strict priority arbitration + * slots between 2 RR arbitration slots. A value of 0 means no strict + * priority cycles; i.e. the strict-priority w/ anti-starvation arbiter is a + * RR arbiter. */ #define PBF_REG_NUM_STRICT_ARB_SLOTS 0x15c064 -/* [RW 10] Port 0 threshold used by arbiter in 16 byte lines used when pause - not suppoterd. */ +/* [R 11] Removed for E3 B0 - Port 0 threshold used by arbiter in 16 byte + * lines used when pause not suppoterd. */ #define PBF_REG_P0_ARB_THRSH 0x1400e4 -/* [R 11] Current credit for port 0 in the tx port buffers in 16 byte lines. */ +/* [R 11] Removed for E3 B0 - Current credit for port 0 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P0_CREDIT 0x140200 -/* [RW 11] Initial credit for port 0 in the tx port buffers in 16 byte - lines. */ +/* [R 11] Removed for E3 B0 - Initial credit for port 0 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P0_INIT_CRD 0x1400d0 /* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for - port 0. Reset upon init. */ + * port 0. Reset upon init. */ #define PBF_REG_P0_INTERNAL_CRD_FREED_CNT 0x140308 -/* [RW 1] Indication that pause is enabled for port 0. */ -#define PBF_REG_P0_PAUSE_ENABLE 0x140014 -/* [R 8] Number of tasks in port 0 task queue. */ +/* [R 1] Removed for E3 B0 - Indication that pause is enabled for port 0. */ +#define PBF_REG_P0_PAUSE_ENABLE 0x140014 +/* [R 8] Removed for E3 B0 - Number of tasks in port 0 task queue. */ #define PBF_REG_P0_TASK_CNT 0x140204 -/* [R 32] Cyclic counter for number of 8 byte lines freed from the task - queue of port 0. Reset upon init. */ +/* [R 32] Removed for E3 B0 - Cyclic counter for number of 8 byte lines + * freed from the task queue of port 0. Reset upon init. */ #define PBF_REG_P0_TQ_LINES_FREED_CNT 0x1402f0 -/* [R 11] Number of 8 bytes lines occupied in the task queue of port 0. */ -#define PBF_REG_P0_TQ_OCCUPANCY 0x1402fc -/* [R 11] Current credit for port 1 in the tx port buffers in 16 byte lines. */ +/* [R 12] Number of 8 bytes lines occupied in the task queue of port 0. */ +#define PBF_REG_P0_TQ_OCCUPANCY 0x1402fc +/* [R 11] Removed for E3 B0 - Current credit for port 1 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P1_CREDIT 0x140208 -/* [RW 11] Initial credit for port 1 in the tx port buffers in 16 byte - lines. */ +/* [R 11] Removed for E3 B0 - Initial credit for port 0 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P1_INIT_CRD 0x1400d4 /* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for - port 1. Reset upon init. */ + * port 1. Reset upon init. */ #define PBF_REG_P1_INTERNAL_CRD_FREED_CNT 0x14030c -/* [R 8] Number of tasks in port 1 task queue. */ +/* [R 8] Removed for E3 B0 - Number of tasks in port 1 task queue. */ #define PBF_REG_P1_TASK_CNT 0x14020c -/* [R 32] Cyclic counter for number of 8 byte lines freed from the task - queue of port 1. Reset upon init. */ +/* [R 32] Removed for E3 B0 - Cyclic counter for number of 8 byte lines + * freed from the task queue of port 1. Reset upon init. */ #define PBF_REG_P1_TQ_LINES_FREED_CNT 0x1402f4 -/* [R 11] Number of 8 bytes lines occupied in the task queue of port 1. */ -#define PBF_REG_P1_TQ_OCCUPANCY 0x140300 -/* [R 11] Current credit for port 4 in the tx port buffers in 16 byte lines. */ +/* [R 12] Number of 8 bytes lines occupied in the task queue of port 1. */ +#define PBF_REG_P1_TQ_OCCUPANCY 0x140300 +/* [R 11] Removed for E3 B0 - Current credit for port 4 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P4_CREDIT 0x140210 -/* [RW 11] Initial credit for port 4 in the tx port buffers in 16 byte - lines. */ +/* [R 11] Removed for E3 B0 - Initial credit for port 0 in the tx port + * buffers in 16 byte lines. */ #define PBF_REG_P4_INIT_CRD 0x1400e0 /* [R 32] Cyclic counter for the amount credits in 16 bytes lines added for - port 4. Reset upon init. */ + * port 4. Reset upon init. */ #define PBF_REG_P4_INTERNAL_CRD_FREED_CNT 0x140310 -/* [R 8] Number of tasks in port 4 task queue. */ +/* [R 8] Removed for E3 B0 - Number of tasks in port 4 task queue. */ #define PBF_REG_P4_TASK_CNT 0x140214 -/* [R 32] Cyclic counter for number of 8 byte lines freed from the task - queue of port 4. Reset upon init. */ +/* [R 32] Removed for E3 B0 - Cyclic counter for number of 8 byte lines + * freed from the task queue of port 4. Reset upon init. */ #define PBF_REG_P4_TQ_LINES_FREED_CNT 0x1402f8 -/* [R 11] Number of 8 bytes lines occupied in the task queue of port 4. */ -#define PBF_REG_P4_TQ_OCCUPANCY 0x140304 +/* [R 12] Number of 8 bytes lines occupied in the task queue of port 4. */ +#define PBF_REG_P4_TQ_OCCUPANCY 0x140304 /* [RW 7] Interrupt mask register #0 read/write */ #define PBF_REG_PBF_INT_MASK 0x1401d4 /* [R 7] Interrupt register #0 read */ #define PBF_REG_PBF_INT_STS 0x1401c8 -/* [RW 2] Update mode for the RST flag */ -#define PBF_REG_RST_FLG_MODE 0x15c0ec -/* [RW 2] Update mode for the SYN flag */ -#define PBF_REG_SYN_FLG_MODE 0x15c0f0 -#define PB_REG_CONTROL 0 +/* [RW 28] Parity mask register #0 read/write */ +#define PBF_REG_PBF_PRTY_MASK 0x1401e4 +/* [RC 28] Parity register #0 read clear */ +#define PBF_REG_PBF_PRTY_STS_CLR 0x1401dc +/* [RW 16] The Ethernet type value for L2 tag 0 */ +#define PBF_REG_TAG_ETHERTYPE_0 0x15c090 +/* [RW 4] The length of the info field for L2 tag 0. The length is between + * 2B and 14B; in 2B granularity */ +#define PBF_REG_TAG_LEN_0 0x15c09c +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_LB_Q 0x140370 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q0 0x140374 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q1 0x140378 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q2 0x14037c +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q3 0x140380 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q4 0x140384 +/* [R 8] Number of tasks in queue 0 task queue. */ +#define PBF_REG_TASK_CNT_Q5 0x140388 +/* [R 32] Cyclic counter for number of 8 byte lines freed from the LB task + * queue. Reset upon init. */ +#define PBF_REG_TQ_LINES_FREED_CNT_LB_Q 0x14038c +/* [R 32] Cyclic counter for number of 8 byte lines freed from the task + * queue 0. Reset upon init. */ +#define PBF_REG_TQ_LINES_FREED_CNT_Q0 0x140390 +/* [R 32] Cyclic counter for number of 8 byte lines freed from task queue 1. + * Reset upon init. */ +#define PBF_REG_TQ_LINES_FREED_CNT_Q1 0x140394 +/* [R 13] Number of 8 bytes lines occupied in the task queue of the LB + * queue. */ +#define PBF_REG_TQ_OCCUPANCY_LB_Q 0x1403a8 +/* [R 13] Number of 8 bytes lines occupied in the task queue of queue 0. */ +#define PBF_REG_TQ_OCCUPANCY_Q0 0x1403ac +/* [R 13] Number of 8 bytes lines occupied in the task queue of queue 1. */ +#define PBF_REG_TQ_OCCUPANCY_Q1 0x1403b0 /* [RW 2] Interrupt mask register #0 read/write */ #define PB_REG_PB_INT_MASK 0x28 /* [R 2] Interrupt register #0 read */ @@ -2268,346 +1970,233 @@ #define PB_REG_PB_PRTY_MASK 0x38 /* [R 4] Parity register #0 read */ #define PB_REG_PB_PRTY_STS 0x2c +/* [RC 4] Parity register #0 read clear */ +#define PB_REG_PB_PRTY_STS_CLR 0x30 #define PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR (0x1<<0) #define PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW (0x1<<8) #define PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR (0x1<<1) #define PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN (0x1<<6) #define PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN (0x1<<7) -#define PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN (0x1<<4) +#define PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN (0x1<<4) #define PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN (0x1<<3) #define PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN (0x1<<5) #define PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN (0x1<<2) /* [R 8] Config space A attention dirty bits. Each bit indicates that the - corresponding PF generates config space A attention. Set by PXP. Reset by - MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits - from both paths. */ -#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x9010 + * corresponding PF generates config space A attention. Set by PXP. Reset by + * MCP writing 1 to icfg_space_a_request_clr. Note: register contains bits + * from both paths. */ +#define PGLUE_B_REG_CFG_SPACE_A_REQUEST 0x9010 /* [R 8] Config space B attention dirty bits. Each bit indicates that the - corresponding PF generates config space B attention. Set by PXP. Reset by - MCP writing 1 to icfg_space_b_request_clr. Note: register contains bits - from both paths. */ -#define PGLUE_B_REG_CFG_SPACE_B_REQUEST 0x9014 -/* [RW 1] Type A PF enable inbound interrupt table for CSDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_CSDM_INB_INT_A_PF_ENABLE 0x9194 -/* [RW 18] Type B VF inbound interrupt table for CSDM: bits[17:9]-mask; - its[8:0]-address. Bits [1:0] must be zero (DW resolution address). */ -#define PGLUE_B_REG_CSDM_INB_INT_B_VF 0x916c -/* [RW 1] Type B VF enable inbound interrupt table for CSDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_CSDM_INB_INT_B_VF_ENABLE 0x919c -/* [RW 16] Start offset of CSDM zone A (queue zone) in the internal RAM */ -#define PGLUE_B_REG_CSDM_START_OFFSET_A 0x9100 -/* [RW 16] Start offset of CSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_CSDM_START_OFFSET_B 0x9108 -/* [RW 5] VF Shift of CSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_CSDM_VF_SHIFT_B 0x9110 -/* [RW 1] 0 - Zone A size is 136x32B; 1 - Zone A size is 152x32B. */ -#define PGLUE_B_REG_CSDM_ZONE_A_SIZE_PF 0x91ac + * corresponding PF generates config space B attention. Set by PXP. Reset by + * MCP writing 1 to icfg_space_b_request_clr. Note: register contains bits + * from both paths. */ +#define PGLUE_B_REG_CFG_SPACE_B_REQUEST 0x9014 /* [R 8] FLR request attention dirty bits for PFs 0 to 7. Each bit indicates - that the FLR register of the corresponding PF was set. Set by PXP. Reset - by MCP writing 1 to flr_request_pf_7_0_clr. Note: register contains bits - from both paths. */ + * that the FLR register of the corresponding PF was set. Set by PXP. Reset + * by MCP writing 1 to flr_request_pf_7_0_clr. Note: register contains bits + * from both paths. */ #define PGLUE_B_REG_FLR_REQUEST_PF_7_0 0x9028 /* [W 8] FLR request attention dirty bits clear for PFs 0 to 7. MCP writes 1 - to a bit in this register in order to clear the corresponding bit in - flr_request_pf_7_0 register. Note: register contains bits from both - paths. */ + * to a bit in this register in order to clear the corresponding bit in + * flr_request_pf_7_0 register. Note: register contains bits from both + * paths. */ #define PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR 0x9418 /* [R 32] FLR request attention dirty bits for VFs 96 to 127. Each bit - indicates that the FLR register of the corresponding VF was set. Set by - PXP. Reset by MCP writing 1 to flr_request_vf_127_96_clr. */ + * indicates that the FLR register of the corresponding VF was set. Set by + * PXP. Reset by MCP writing 1 to flr_request_vf_127_96_clr. */ #define PGLUE_B_REG_FLR_REQUEST_VF_127_96 0x9024 /* [R 32] FLR request attention dirty bits for VFs 0 to 31. Each bit - indicates that the FLR register of the corresponding VF was set. Set by - PXP. Reset by MCP writing 1 to flr_request_vf_31_0_clr. */ -#define PGLUE_B_REG_FLR_REQUEST_VF_31_0 0x9018 + * indicates that the FLR register of the corresponding VF was set. Set by + * PXP. Reset by MCP writing 1 to flr_request_vf_31_0_clr. */ +#define PGLUE_B_REG_FLR_REQUEST_VF_31_0 0x9018 /* [R 32] FLR request attention dirty bits for VFs 32 to 63. Each bit - indicates that the FLR register of the corresponding VF was set. Set by - PXP. Reset by MCP writing 1 to flr_request_vf_63_32_clr. */ + * indicates that the FLR register of the corresponding VF was set. Set by + * PXP. Reset by MCP writing 1 to flr_request_vf_63_32_clr. */ #define PGLUE_B_REG_FLR_REQUEST_VF_63_32 0x901c /* [R 32] FLR request attention dirty bits for VFs 64 to 95. Each bit - indicates that the FLR register of the corresponding VF was set. Set by - PXP. Reset by MCP writing 1 to flr_request_vf_95_64_clr. */ + * indicates that the FLR register of the corresponding VF was set. Set by + * PXP. Reset by MCP writing 1 to flr_request_vf_95_64_clr. */ #define PGLUE_B_REG_FLR_REQUEST_VF_95_64 0x9020 /* [R 8] Each bit indicates an incorrect behavior in user RX interface. Bit - 0 - Target memory read arrived with a correctable error. Bit 1 - Target - memory read arrived with an uncorrectable error. Bit 2 - Configuration RW - arrived with a correctable error. Bit 3 - Configuration RW arrived with - an uncorrectable error. Bit 4 - Completion with Configuration Request - Retry Status. Bit 5 - Expansion ROM access received with a write request. - Bit 6 - Completion with pcie_rx_err of 0000; CMPL_STATUS of non-zero; and - pcie_rx_last not asserted. Bit 7 - Completion with pcie_rx_err of 1010; - and pcie_rx_last not asserted. */ + * 0 - Target memory read arrived with a correctable error. Bit 1 - Target + * memory read arrived with an uncorrectable error. Bit 2 - Configuration RW + * arrived with a correctable error. Bit 3 - Configuration RW arrived with + * an uncorrectable error. Bit 4 - Completion with Configuration Request + * Retry Status. Bit 5 - Expansion ROM access received with a write request. + * Bit 6 - Completion with pcie_rx_err of 0000; CMPL_STATUS of non-zero; and + * pcie_rx_last not asserted. Bit 7 - Completion with pcie_rx_err of 1010; + * and pcie_rx_last not asserted. */ #define PGLUE_B_REG_INCORRECT_RCV_DETAILS 0x9068 -#define PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER 0x942c +#define PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER 0x942c #define PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ 0x9430 -#define PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE 0x9434 #define PGLUE_B_REG_INTERNAL_VFID_ENABLE 0x9438 -/* [R 9] Interrupt register #0 read */ +/* [R 11] Interrupt register #0 read */ #define PGLUE_B_REG_PGLUE_B_INT_STS 0x9298 -/* [RC 9] Interrupt register #0 read clear */ -#define PGLUE_B_REG_PGLUE_B_INT_STS_CLR 0x929c +/* [RC 11] Interrupt register #0 read clear */ +#define PGLUE_B_REG_PGLUE_B_INT_STS_CLR 0x929c +/* [RW 2] Parity mask register #0 read/write */ +#define PGLUE_B_REG_PGLUE_B_PRTY_MASK 0x92b4 /* [R 2] Parity register #0 read */ #define PGLUE_B_REG_PGLUE_B_PRTY_STS 0x92a8 +/* [RC 2] Parity register #0 read clear */ +#define PGLUE_B_REG_PGLUE_B_PRTY_STS_CLR 0x92ac +/* [R 13] Details of first request received with error. [2:0] - PFID. [3] - + * VF_VALID. [9:4] - VFID. [11:10] - Error Code - 0 - Indicates Completion + * Timeout of a User Tx non-posted request. 1 - unsupported request. 2 - + * completer abort. 3 - Illegal value for this field. [12] valid - indicates + * if there was a completion error since the last time this register was + * cleared. */ +#define PGLUE_B_REG_RX_ERR_DETAILS 0x9080 +/* [R 18] Details of first ATS Translation Completion request received with + * error. [2:0] - PFID. [3] - VF_VALID. [9:4] - VFID. [11:10] - Error Code - + * 0 - Indicates Completion Timeout of a User Tx non-posted request. 1 - + * unsupported request. 2 - completer abort. 3 - Illegal value for this + * field. [16:12] - ATC OTB EntryID. [17] valid - indicates if there was a + * completion error since the last time this register was cleared. */ +#define PGLUE_B_REG_RX_TCPL_ERR_DETAILS 0x9084 /* [W 8] Debug only - Shadow BME bits clear for PFs 0 to 7. MCP writes 1 to - a bit in this register in order to clear the corresponding bit in - shadow_bme_pf_7_0 register. MCP should never use this unless a - work-around is needed. Note: register contains bits from both paths. */ + * a bit in this register in order to clear the corresponding bit in + * shadow_bme_pf_7_0 register. MCP should never use this unless a + * work-around is needed. Note: register contains bits from both paths. */ #define PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR 0x9458 /* [R 8] SR IOV disabled attention dirty bits. Each bit indicates that the - VF enable register of the corresponding PF is written to 0 and was - previously 1. Set by PXP. Reset by MCP writing 1 to - sr_iov_disabled_request_clr. Note: register contains bits from both - paths. */ + * VF enable register of the corresponding PF is written to 0 and was + * previously 1. Set by PXP. Reset by MCP writing 1 to + * sr_iov_disabled_request_clr. Note: register contains bits from both + * paths. */ #define PGLUE_B_REG_SR_IOV_DISABLED_REQUEST 0x9030 /* [R 32] Indicates the status of tags 32-63. 0 - tags is used - read - completion did not return yet. 1 - tag is unused. Same functionality as - pxp2_registers_pgl_exp_rom_data2 for tags 0-31. */ + * completion did not return yet. 1 - tag is unused. Same functionality as + * pxp2_registers_pgl_exp_rom_data2 for tags 0-31. */ #define PGLUE_B_REG_TAGS_63_32 0x9244 -/* [RW 1] Type A PF enable inbound interrupt table for TSDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_TSDM_INB_INT_A_PF_ENABLE 0x9170 -/* [RW 16] Start offset of TSDM zone A (queue zone) in the internal RAM */ -#define PGLUE_B_REG_TSDM_START_OFFSET_A 0x90c4 -/* [RW 16] Start offset of TSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_TSDM_START_OFFSET_B 0x90cc -/* [RW 5] VF Shift of TSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_TSDM_VF_SHIFT_B 0x90d4 -/* [RW 1] 0 - Zone A size is 136x32B; 1 - Zone A size is 152x32B. */ -#define PGLUE_B_REG_TSDM_ZONE_A_SIZE_PF 0x91a0 /* [R 32] Address [31:0] of first read request not submitted due to error */ #define PGLUE_B_REG_TX_ERR_RD_ADD_31_0 0x9098 /* [R 32] Address [63:32] of first read request not submitted due to error */ -#define PGLUE_B_REG_TX_ERR_RD_ADD_63_32 0x909c +#define PGLUE_B_REG_TX_ERR_RD_ADD_63_32 0x909c /* [R 31] Details of first read request not submitted due to error. [4:0] - VQID. [5] TREQ. 1 - Indicates the request is a Translation Request. - [20:8] - Length in bytes. [23:21] - PFID. [24] - VF_VALID. [30:25] - - VFID. */ + * VQID. [5] TREQ. 1 - Indicates the request is a Translation Request. + * [20:8] - Length in bytes. [23:21] - PFID. [24] - VF_VALID. [30:25] - + * VFID. */ #define PGLUE_B_REG_TX_ERR_RD_DETAILS 0x90a0 /* [R 26] Details of first read request not submitted due to error. [15:0] - Request ID. [19:16] client ID. [20] - last SR. [24:21] - Error type - - [21] - Indicates was_error was set; [22] - Indicates BME was cleared; - [23] - Indicates FID_enable was cleared; [24] - Indicates VF with parent - PF FLR_request or IOV_disable_request dirty bit is set. [25] valid - - indicates if there was a request not submitted due to error since the - last time this register was cleared. */ + * Request ID. [19:16] client ID. [20] - last SR. [24:21] - Error type - + * [21] - Indicates was_error was set; [22] - Indicates BME was cleared; + * [23] - Indicates FID_enable was cleared; [24] - Indicates VF with parent + * PF FLR_request or IOV_disable_request dirty bit is set. [25] valid - + * indicates if there was a request not submitted due to error since the + * last time this register was cleared. */ #define PGLUE_B_REG_TX_ERR_RD_DETAILS2 0x90a4 /* [R 32] Address [31:0] of first write request not submitted due to error */ #define PGLUE_B_REG_TX_ERR_WR_ADD_31_0 0x9088 /* [R 32] Address [63:32] of first write request not submitted due to error */ -#define PGLUE_B_REG_TX_ERR_WR_ADD_63_32 0x908c +#define PGLUE_B_REG_TX_ERR_WR_ADD_63_32 0x908c /* [R 31] Details of first write request not submitted due to error. [4:0] - VQID. [20:8] - Length in bytes. [23:21] - PFID. [24] - VF_VALID. [30:25] - - VFID. */ + * VQID. [20:8] - Length in bytes. [23:21] - PFID. [24] - VF_VALID. [30:25] + * - VFID. */ #define PGLUE_B_REG_TX_ERR_WR_DETAILS 0x9090 /* [R 26] Details of first write request not submitted due to error. [15:0] - Request ID. [19:16] client ID. [20] - last SR. [24:21] - Error type - - [21] - Indicates was_error was set; [22] - Indicates BME was cleared; - [23] - Indicates FID_enable was cleared; [24] - Indicates VF with parent - PF FLR_request or IOV_disable_request dirty bit is set. [25] valid - - indicates if there was a request not submitted due to error since the - last time this register was cleared. */ + * Request ID. [19:16] client ID. [20] - last SR. [24:21] - Error type - + * [21] - Indicates was_error was set; [22] - Indicates BME was cleared; + * [23] - Indicates FID_enable was cleared; [24] - Indicates VF with parent + * PF FLR_request or IOV_disable_request dirty bit is set. [25] valid - + * indicates if there was a request not submitted due to error since the + * last time this register was cleared. */ #define PGLUE_B_REG_TX_ERR_WR_DETAILS2 0x9094 -/* [RW 10] Type A PF/VF inbound interrupt table for USDM: bits[9:5]-mask; - its[4:0]-address relative to start_offset_a. Bits [1:0] can have any - value (Byte resolution address). */ -#define PGLUE_B_REG_USDM_INB_INT_A_0 0x9128 -#define PGLUE_B_REG_USDM_INB_INT_A_1 0x912c -#define PGLUE_B_REG_USDM_INB_INT_A_2 0x9130 -#define PGLUE_B_REG_USDM_INB_INT_A_3 0x9134 -#define PGLUE_B_REG_USDM_INB_INT_A_4 0x9138 -#define PGLUE_B_REG_USDM_INB_INT_A_5 0x913c -#define PGLUE_B_REG_USDM_INB_INT_A_6 0x9140 -/* [RW 1] Type A PF enable inbound interrupt table for USDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_USDM_INB_INT_A_PF_ENABLE 0x917c -/* [RW 1] Type A VF enable inbound interrupt table for USDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_USDM_INB_INT_A_VF_ENABLE 0x9180 -/* [RW 1] Type B VF enable inbound interrupt table for USDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_USDM_INB_INT_B_VF_ENABLE 0x9184 -/* [RW 16] Start offset of USDM zone A (queue zone) in the internal RAM */ -#define PGLUE_B_REG_USDM_START_OFFSET_A 0x90d8 -/* [RW 16] Start offset of USDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_USDM_START_OFFSET_B 0x90e0 -/* [RW 5] VF Shift of USDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_USDM_VF_SHIFT_B 0x90e8 -/* [RW 1] 0 - Zone A size is 136x32B; 1 - Zone A size is 152x32B. */ -#define PGLUE_B_REG_USDM_ZONE_A_SIZE_PF 0x91a4 /* [R 26] Details of first target VF request accessing VF GRC space that - failed permission check. [14:0] Address. [15] w_nr: 0 - Read; 1 - Write. - [21:16] VFID. [24:22] - PFID. [25] valid - indicates if there was a - request accessing VF GRC space that failed permission check since the - last time this register was cleared. Permission checks are: function - permission; R/W permission; address range permission. */ + * failed permission check. [14:0] Address. [15] w_nr: 0 - Read; 1 - Write. + * [21:16] VFID. [24:22] - PFID. [25] valid - indicates if there was a + * request accessing VF GRC space that failed permission check since the + * last time this register was cleared. Permission checks are: function + * permission; R/W permission; address range permission. */ #define PGLUE_B_REG_VF_GRC_SPACE_VIOLATION_DETAILS 0x9234 /* [R 31] Details of first target VF request with length violation (too many - DWs) accessing BAR0. [12:0] Address in DWs (bits [14:2] of byte address). - [14:13] BAR. [20:15] VFID. [23:21] - PFID. [29:24] - Length in DWs. [30] - valid - indicates if there was a request with length violation since the - last time this register was cleared. Length violations: length of more - than 2DWs; length of 2DWs and address not QW aligned; window is GRC and - length is more than 1 DW. */ -#define PGLUE_B_REG_VF_LENGTH_VIOLATION_DETAILS 0x9230 + * DWs) accessing BAR0. [12:0] Address in DWs (bits [14:2] of byte address). + * [14:13] BAR. [20:15] VFID. [23:21] - PFID. [29:24] - Length in DWs. [30] + * valid - indicates if there was a request with length violation since the + * last time this register was cleared. Length violations: length of more + * than 2DWs; length of 2DWs and address not QW aligned; window is GRC and + * length is more than 1 DW. */ +#define PGLUE_B_REG_VF_LENGTH_VIOLATION_DETAILS 0x9230 /* [R 8] Was_error indication dirty bits for PFs 0 to 7. Each bit indicates - that there was a completion with uncorrectable error for the - corresponding PF. Set by PXP. Reset by MCP writing 1 to - was_error_pf_7_0_clr. */ + * that there was a completion with uncorrectable error for the + * corresponding PF. Set by PXP. Reset by MCP writing 1 to + * was_error_pf_7_0_clr. */ #define PGLUE_B_REG_WAS_ERROR_PF_7_0 0x907c /* [W 8] Was_error indication dirty bits clear for PFs 0 to 7. MCP writes 1 - to a bit in this register in order to clear the corresponding bit in - flr_request_pf_7_0 register. */ + * to a bit in this register in order to clear the corresponding bit in + * flr_request_pf_7_0 register. */ #define PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR 0x9470 /* [R 32] Was_error indication dirty bits for VFs 96 to 127. Each bit - indicates that there was a completion with uncorrectable error for the - corresponding VF. Set by PXP. Reset by MCP writing 1 to - was_error_vf_127_96_clr. */ -#define PGLUE_B_REG_WAS_ERROR_VF_127_96 0x9078 + * indicates that there was a completion with uncorrectable error for the + * corresponding VF. Set by PXP. Reset by MCP writing 1 to + * was_error_vf_127_96_clr. */ +#define PGLUE_B_REG_WAS_ERROR_VF_127_96 0x9078 /* [W 32] Was_error indication dirty bits clear for VFs 96 to 127. MCP - writes 1 to a bit in this register in order to clear the corresponding - bit in was_error_vf_127_96 register. */ + * writes 1 to a bit in this register in order to clear the corresponding + * bit in was_error_vf_127_96 register. */ #define PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR 0x9474 /* [R 32] Was_error indication dirty bits for VFs 0 to 31. Each bit - indicates that there was a completion with uncorrectable error for the - corresponding VF. Set by PXP. Reset by MCP writing 1 to - was_error_vf_31_0_clr. */ + * indicates that there was a completion with uncorrectable error for the + * corresponding VF. Set by PXP. Reset by MCP writing 1 to + * was_error_vf_31_0_clr. */ #define PGLUE_B_REG_WAS_ERROR_VF_31_0 0x906c /* [W 32] Was_error indication dirty bits clear for VFs 0 to 31. MCP writes - 1 to a bit in this register in order to clear the corresponding bit in - was_error_vf_31_0 register. */ + * 1 to a bit in this register in order to clear the corresponding bit in + * was_error_vf_31_0 register. */ #define PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR 0x9478 /* [R 32] Was_error indication dirty bits for VFs 32 to 63. Each bit - indicates that there was a completion with uncorrectable error for the - corresponding VF. Set by PXP. Reset by MCP writing 1 to - was_error_vf_63_32_clr. */ + * indicates that there was a completion with uncorrectable error for the + * corresponding VF. Set by PXP. Reset by MCP writing 1 to + * was_error_vf_63_32_clr. */ #define PGLUE_B_REG_WAS_ERROR_VF_63_32 0x9070 /* [W 32] Was_error indication dirty bits clear for VFs 32 to 63. MCP writes - 1 to a bit in this register in order to clear the corresponding bit in - was_error_vf_63_32 register. */ + * 1 to a bit in this register in order to clear the corresponding bit in + * was_error_vf_63_32 register. */ #define PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR 0x947c /* [R 32] Was_error indication dirty bits for VFs 64 to 95. Each bit - indicates that there was a completion with uncorrectable error for the - corresponding VF. Set by PXP. Reset by MCP writing 1 to - was_error_vf_95_64_clr. */ + * indicates that there was a completion with uncorrectable error for the + * corresponding VF. Set by PXP. Reset by MCP writing 1 to + * was_error_vf_95_64_clr. */ #define PGLUE_B_REG_WAS_ERROR_VF_95_64 0x9074 /* [W 32] Was_error indication dirty bits clear for VFs 64 to 95. MCP writes - 1 to a bit in this register in order to clear the corresponding bit in - was_error_vf_95_64 register. */ + * 1 to a bit in this register in order to clear the corresponding bit in + * was_error_vf_95_64 register. */ #define PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR 0x9480 -/* [RW 1] Type A PF enable inbound interrupt table for XSDM. 0 - disable; 1 - - enable. */ -#define PGLUE_B_REG_XSDM_INB_INT_A_PF_ENABLE 0x9188 -/* [RW 16] Start offset of XSDM zone A (queue zone) in the internal RAM */ -#define PGLUE_B_REG_XSDM_START_OFFSET_A 0x90ec -/* [RW 16] Start offset of XSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_XSDM_START_OFFSET_B 0x90f4 -/* [RW 5] VF Shift of XSDM zone B (legacy zone) in the internal RAM */ -#define PGLUE_B_REG_XSDM_VF_SHIFT_B 0x90fc -/* [RW 1] 0 - Zone A size is 136x32B; 1 - Zone A size is 152x32B. */ -#define PGLUE_B_REG_XSDM_ZONE_A_SIZE_PF 0x91a8 #define PRS_REG_A_PRSU_20 0x40134 /* [R 8] debug only: CFC load request current credit. Transaction based. */ #define PRS_REG_CFC_LD_CURRENT_CREDIT 0x40164 /* [R 8] debug only: CFC search request current credit. Transaction based. */ #define PRS_REG_CFC_SEARCH_CURRENT_CREDIT 0x40168 /* [RW 6] The initial credit for the search message to the CFC interface. - Credit is transaction based. */ + * Credit is transaction based. */ #define PRS_REG_CFC_SEARCH_INITIAL_CREDIT 0x4011c /* [RW 24] CID for port 0 if no match */ #define PRS_REG_CID_PORT_0 0x400fc -/* [RW 32] CM header for the context error case */ -#define PRS_REG_CM_CONTEXT_ERROR_HDR 0x40264 -/* [RW 32] The CM header for flush message where 'load existed' bit in CFC - load response is reset and packet type is 0. Used in packet start message - to TCM. */ -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_0 0x400dc -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_1 0x400e0 -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_2 0x400e4 -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_3 0x400e8 -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_4 0x400ec -#define PRS_REG_CM_HDR_FLUSH_LOAD_TYPE_5 0x400f0 -/* [RW 32] The CM header for flush message where 'load existed' bit in CFC - load response is set and packet type is 0. Used in packet start message - to TCM. */ -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_0 0x400bc -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_1 0x400c0 -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_2 0x400c4 -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_3 0x400c8 -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_4 0x400cc -#define PRS_REG_CM_HDR_FLUSH_NO_LOAD_TYPE_5 0x400d0 -/* [RW 32] The CM header for a match and packet type 1 for loopback port. - Used in packet start message to TCM. */ -#define PRS_REG_CM_HDR_LOOPBACK_TYPE_1 0x4009c -#define PRS_REG_CM_HDR_LOOPBACK_TYPE_2 0x400a0 -#define PRS_REG_CM_HDR_LOOPBACK_TYPE_3 0x400a4 -#define PRS_REG_CM_HDR_LOOPBACK_TYPE_4 0x400a8 -/* [RW 32] The CM header for a match and packet type 0. Used in packet start - message to TCM. */ -#define PRS_REG_CM_HDR_TYPE_0 0x40078 -#define PRS_REG_CM_HDR_TYPE_1 0x4007c -#define PRS_REG_CM_HDR_TYPE_2 0x40080 -#define PRS_REG_CM_HDR_TYPE_3 0x40084 -#define PRS_REG_CM_HDR_TYPE_4 0x40088 -/* [RW 32] CM header for the load cancelled case */ -#define PRS_REG_CM_LOAD_CANCELLED_HDR 0x40260 -/* [RW 32] The CM header in case there was not a match on the connection */ -#define PRS_REG_CM_NO_MATCH_HDR 0x400b8 -/* [RW 8] Event ID for the context error case */ -#define PRS_REG_CONTEXT_ERROR_EVENT_ID 0x4025c /* [RW 1] Indicates if in outer vlan mode. 0=non-outer-vlan mode; 1=outer - vlan mode. */ + * vlan mode. */ #define PRS_REG_E1HOV_MODE 0x401c8 -/* [RW 8] The 8-bit event ID for a match and packet type 1. Used in packet - start message to TCM. */ -#define PRS_REG_EVENT_ID_1 0x40054 -#define PRS_REG_EVENT_ID_2 0x40058 -#define PRS_REG_EVENT_ID_3 0x4005c -/* [RW 16] The Ethernet type value for first FCoE type */ -#define PRS_REG_FCOE_TYPE 0x401d0 -/* [RW 8] Context region for flush packet with packet type 0. Used in CFC - load request message. */ -#define PRS_REG_FLUSH_REGIONS_TYPE_0 0x40004 -#define PRS_REG_FLUSH_REGIONS_TYPE_1 0x40008 -#define PRS_REG_FLUSH_REGIONS_TYPE_2 0x4000c -#define PRS_REG_FLUSH_REGIONS_TYPE_3 0x40010 -#define PRS_REG_FLUSH_REGIONS_TYPE_4 0x40014 -#define PRS_REG_FLUSH_REGIONS_TYPE_5 0x40018 -#define PRS_REG_FLUSH_REGIONS_TYPE_6 0x4001c -#define PRS_REG_FLUSH_REGIONS_TYPE_7 0x40020 -/* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic - Ethernet header. */ +/* [R 6] Bit-map indicating which L2 hdrs may appear after the basic + * Ethernet header. */ #define PRS_REG_HDRS_AFTER_BASIC 0x40238 -/* [RW 4] The increment value to send in the CFC load request message */ -#define PRS_REG_INC_VALUE 0x40048 -/* [RW 8] Event ID for the load cancelled case */ -#define PRS_REG_LOAD_CANCELLED_EVENT_ID 0x40258 -/* [RW 6] Bit-map indicating which headers must appear in the packet */ +/* [RW 6] Bit-map indicating which L2 hdrs may appear after the basic + * Ethernet header for port 0 packets. */ +#define PRS_REG_HDRS_AFTER_BASIC_PORT_0 0x40270 +#define PRS_REG_HDRS_AFTER_BASIC_PORT_1 0x40290 +/* [R 6] Bit-map indicating which L2 hdrs may appear after L2 tag 0 */ +#define PRS_REG_HDRS_AFTER_TAG_0 0x40248 +/* [RW 6] Bit-map indicating which L2 hdrs may appear after L2 tag 0 for + * port 0 packets */ +#define PRS_REG_HDRS_AFTER_TAG_0_PORT_0 0x40280 +#define PRS_REG_HDRS_AFTER_TAG_0_PORT_1 0x402a0 +/* [R 6] Bit-map indicating which headers must appear in the packet */ #define PRS_REG_MUST_HAVE_HDRS 0x40254 +/* [RW 6] Bit-map indicating which headers must appear in the packet for + * port 0 packets */ +#define PRS_REG_MUST_HAVE_HDRS_PORT_0 0x4028c +#define PRS_REG_MUST_HAVE_HDRS_PORT_1 0x402ac #define PRS_REG_NIC_MODE 0x40138 -/* [RW 8] The 8-bit event ID for cases where there is no match on the - connection. Used in packet start message to TCM. */ -#define PRS_REG_NO_MATCH_EVENT_ID 0x40070 -/* [ST 24] The number of input CFC flush packets */ -#define PRS_REG_NUM_OF_CFC_FLUSH_MESSAGES 0x40128 -/* [ST 32] The number of cycles the Parser halted its operation since it - could not allocate the next serial number */ -#define PRS_REG_NUM_OF_DEAD_CYCLES 0x40130 /* [ST 24] The number of input packets */ #define PRS_REG_NUM_OF_PACKETS 0x40124 -/* [ST 24] The number of input transparent flush packets */ -#define PRS_REG_NUM_OF_TRANSPARENT_FLUSH_MESSAGES 0x4012c -/* [RW 8] Context region for received Ethernet packet with a match and - packet type 0. Used in CFC load request message */ -#define PRS_REG_PACKET_REGIONS_TYPE_0 0x40028 -#define PRS_REG_PACKET_REGIONS_TYPE_1 0x4002c -#define PRS_REG_PACKET_REGIONS_TYPE_2 0x40030 -#define PRS_REG_PACKET_REGIONS_TYPE_3 0x40034 -#define PRS_REG_PACKET_REGIONS_TYPE_4 0x40038 -#define PRS_REG_PACKET_REGIONS_TYPE_5 0x4003c -#define PRS_REG_PACKET_REGIONS_TYPE_6 0x40040 -#define PRS_REG_PACKET_REGIONS_TYPE_7 0x40044 /* [R 2] debug only: Number of pending requests for CAC on port 0. */ #define PRS_REG_PENDING_BRB_CAC0_RQ 0x40174 /* [R 2] debug only: Number of pending requests for header parsing. */ @@ -2618,19 +2207,23 @@ #define PRS_REG_PRS_PRTY_MASK 0x401a4 /* [R 8] Parity register #0 read */ #define PRS_REG_PRS_PRTY_STS 0x40198 -/* [RW 8] Context region for pure acknowledge packets. Used in CFC load - request message */ -#define PRS_REG_PURE_REGIONS 0x40024 +/* [RC 8] Parity register #0 read clear */ +#define PRS_REG_PRS_PRTY_STS_CLR 0x4019c /* [R 32] debug only: Serial number status lsb 32 bits. '1' indicates this - serail number was released by SDM but cannot be used because a previous - serial number was not released. */ + * serail number was released by SDM but cannot be used because a previous + * serial number was not released. */ #define PRS_REG_SERIAL_NUM_STATUS_LSB 0x40154 /* [R 32] debug only: Serial number status msb 32 bits. '1' indicates this - serail number was released by SDM but cannot be used because a previous - serial number was not released. */ + * serail number was released by SDM but cannot be used because a previous + * serial number was not released. */ #define PRS_REG_SERIAL_NUM_STATUS_MSB 0x40158 /* [R 4] debug only: SRC current credit. Transaction based. */ #define PRS_REG_SRC_CURRENT_CREDIT 0x4016c +/* [RW 16] The Ethernet type value for L2 tag 0 */ +#define PRS_REG_TAG_ETHERTYPE_0 0x401d4 +/* [RW 4] The length of the info field for L2 tag 0. The length is between + * 2B and 14B; in 2B granularity */ +#define PRS_REG_TAG_LEN_0 0x4022c /* [R 8] debug only: TCM current credit. Cycle based. */ #define PRS_REG_TCM_CURRENT_CREDIT 0x40160 /* [R 8] debug only: TSDM current credit. Transaction based. */ @@ -2642,144 +2235,113 @@ #define PXP2_PXP2_INT_MASK_0_REG_PGL_WRITE_BLOCKED (0x1<<24) #define PXP2_PXP2_INT_STS_0_REG_WR_PGLUE_EOP_ERROR (0x1<<7) #define PXP2_PXP2_INT_STS_CLR_0_REG_WR_PGLUE_EOP_ERROR (0x1<<7) -/* [R 6] Debug only: Number of used entries in the data FIFO */ +/* [R 7] Debug only: Number of used entries in the data FIFO */ #define PXP2_REG_HST_DATA_FIFO_STATUS 0x12047c /* [R 7] Debug only: Number of used entries in the header FIFO */ -#define PXP2_REG_HST_HEADER_FIFO_STATUS 0x120478 -#define PXP2_REG_PGL_ADDR_88_F0 0x120534 -#define PXP2_REG_PGL_ADDR_8C_F0 0x120538 -#define PXP2_REG_PGL_ADDR_90_F0 0x12053c -#define PXP2_REG_PGL_ADDR_94_F0 0x120540 -#define PXP2_REG_PGL_CONTROL0 0x120490 -#define PXP2_REG_PGL_CONTROL1 0x120514 -#define PXP2_REG_PGL_DEBUG 0x120520 +#define PXP2_REG_HST_HEADER_FIFO_STATUS 0x120478 +#define PXP2_REG_PGL_ADDR_88_F0 0x120534 +/* [R 32] GRC address for configuration access to PCIE config address 0x88. + * any write to this PCIE address will cause a GRC write access to the + * address that's in t this register */ +#define PXP2_REG_PGL_ADDR_88_F1 0x120544 +#define PXP2_REG_PGL_ADDR_8C_F0 0x120538 +/* [R 32] GRC address for configuration access to PCIE config address 0x8c. + * any write to this PCIE address will cause a GRC write access to the + * address that's in t this register */ +#define PXP2_REG_PGL_ADDR_8C_F1 0x120548 +#define PXP2_REG_PGL_ADDR_90_F0 0x12053c +/* [R 32] GRC address for configuration access to PCIE config address 0x90. + * any write to this PCIE address will cause a GRC write access to the + * address that's in t this register */ +#define PXP2_REG_PGL_ADDR_90_F1 0x12054c +#define PXP2_REG_PGL_ADDR_94_F0 0x120540 +/* [R 32] GRC address for configuration access to PCIE config address 0x94. + * any write to this PCIE address will cause a GRC write access to the + * address that's in t this register */ +#define PXP2_REG_PGL_ADDR_94_F1 0x120550 /* [RW 32] third dword data of expansion rom request. this register is - special. reading from it provides a vector outstanding read requests. if - a bit is zero it means that a read request on the corresponding tag did - not finish yet (not all completions have arrived for it) */ + * special. reading from it provides a vector outstanding read requests. if + * a bit is zero it means that a read request on the corresponding tag did + * not finish yet (not all completions have arrived for it) */ #define PXP2_REG_PGL_EXP_ROM2 0x120808 -/* [RW 32] Legacy (type B) PF inbound interrupt table for CSDM: - bits[31:16]-mask; its[15:0]-address. Bits [1:0] must be zero (DW - resolution address). */ -#define PXP2_REG_PGL_INT_CSDM_0 0x1204f4 -#define PXP2_REG_PGL_INT_CSDM_1 0x1204f8 -#define PXP2_REG_PGL_INT_CSDM_2 0x1204fc -#define PXP2_REG_PGL_INT_CSDM_3 0x120500 -#define PXP2_REG_PGL_INT_CSDM_4 0x120504 -#define PXP2_REG_PGL_INT_CSDM_5 0x120508 -#define PXP2_REG_PGL_INT_CSDM_6 0x12050c -#define PXP2_REG_PGL_INT_CSDM_7 0x120510 -/* [RW 32] Legacy (type B) PF inbound interrupt table for TSDM: - bits[31:16]-mask; its[15:0]-address. Bits [1:0] must be zero (DW - resolution address). */ -#define PXP2_REG_PGL_INT_TSDM_0 0x120494 -#define PXP2_REG_PGL_INT_TSDM_1 0x120498 -#define PXP2_REG_PGL_INT_TSDM_2 0x12049c -#define PXP2_REG_PGL_INT_TSDM_3 0x1204a0 -#define PXP2_REG_PGL_INT_TSDM_4 0x1204a4 -#define PXP2_REG_PGL_INT_TSDM_5 0x1204a8 -#define PXP2_REG_PGL_INT_TSDM_6 0x1204ac -#define PXP2_REG_PGL_INT_TSDM_7 0x1204b0 -/* [RW 32] Legacy (type B) PF inbound interrupt table for USDM: - bits[31:16]-mask; its[15:0]-address. Bits [1:0] must be zero (DW - resolution address). */ -#define PXP2_REG_PGL_INT_USDM_0 0x1204b4 -#define PXP2_REG_PGL_INT_USDM_1 0x1204b8 -#define PXP2_REG_PGL_INT_USDM_2 0x1204bc -#define PXP2_REG_PGL_INT_USDM_3 0x1204c0 -#define PXP2_REG_PGL_INT_USDM_4 0x1204c4 -#define PXP2_REG_PGL_INT_USDM_5 0x1204c8 -#define PXP2_REG_PGL_INT_USDM_6 0x1204cc -#define PXP2_REG_PGL_INT_USDM_7 0x1204d0 -/* [RW 32] Legacy (type B) PF inbound interrupt table for XSDM: - bits[31:16]-mask; its[15:0]-address. Bits [1:0] must be zero (DW - resolution address). */ -#define PXP2_REG_PGL_INT_XSDM_0 0x1204d4 -#define PXP2_REG_PGL_INT_XSDM_1 0x1204d8 -#define PXP2_REG_PGL_INT_XSDM_2 0x1204dc -#define PXP2_REG_PGL_INT_XSDM_3 0x1204e0 -#define PXP2_REG_PGL_INT_XSDM_4 0x1204e4 -#define PXP2_REG_PGL_INT_XSDM_5 0x1204e8 -#define PXP2_REG_PGL_INT_XSDM_6 0x1204ec -#define PXP2_REG_PGL_INT_XSDM_7 0x1204f0 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F0 0x120674 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F1 0x120678 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F2 0x12067c /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F3 0x120680 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F4 0x120684 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F5 0x120688 /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F6 0x12068c /* [RW 16] this field allows one function to pretend being another function - when accessing any BAR mapped resource within the device. the value of - the field is the number of the function that will be accessed - effectively. after software write to this bit it must read it in order to - know that the new value is updated. Bits [15] - force. Bits [14] - path - ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits - [2:0] - PFID. */ + * when accessing any BAR mapped resource within the device. the value of + * the field is the number of the function that will be accessed + * effectively. after software write to this bit it must read it in order to + * know that the new value is updated. Bits [15] - force. Bits [14] - path + * ID. Bits [13:10] - Reserved. Bits [9:4] - VFID. Bits [3] - VF valid. Bits + * [2:0] - PFID. */ #define PXP2_REG_PGL_PRETEND_FUNC_F7 0x120690 /* [R 1] this bit indicates that a read request was blocked because of - bus_master_en was deasserted */ + * bus_master_en was deasserted */ #define PXP2_REG_PGL_READ_BLOCKED 0x120568 -#define PXP2_REG_PGL_TAGS_LIMIT 0x1205a8 +#define PXP2_REG_PGL_TAGS_LIMIT 0x1205a8 /* [R 21] debug only */ #define PXP2_REG_PGL_TXW_CDTS 0x12052c /* [R 1] this bit indicates that a write request was blocked because of - bus_master_en was deasserted */ + * bus_master_en was deasserted */ #define PXP2_REG_PGL_WRITE_BLOCKED 0x120564 #define PXP2_REG_PSWRQ_BW_ADD1 0x1201c0 -#define PXP2_REG_PSWRQ_BW_ADD10 0x1201e4 -#define PXP2_REG_PSWRQ_BW_ADD11 0x1201e8 +#define PXP2_REG_PSWRQ_BW_ADD10 0x1201e4 +#define PXP2_REG_PSWRQ_BW_ADD11 0x1201e8 #define PXP2_REG_PSWRQ_BW_ADD2 0x1201c4 -#define PXP2_REG_PSWRQ_BW_ADD28 0x120228 +#define PXP2_REG_PSWRQ_BW_ADD28 0x120228 #define PXP2_REG_PSWRQ_BW_ADD3 0x1201c8 #define PXP2_REG_PSWRQ_BW_ADD6 0x1201d4 #define PXP2_REG_PSWRQ_BW_ADD7 0x1201d8 @@ -2808,68 +2370,49 @@ #define PXP2_REG_PSWRQ_BW_UB8 0x120254 #define PXP2_REG_PSWRQ_BW_UB9 0x120258 #define PXP2_REG_PSWRQ_BW_WR 0x120328 -#define PXP2_REG_PSWRQ_CDU0_L2P 0x120000 +#define PXP2_REG_PSWRQ_CDU0_L2P 0x120000 #define PXP2_REG_PSWRQ_QM0_L2P 0x120038 -#define PXP2_REG_PSWRQ_SRC0_L2P 0x120054 +#define PXP2_REG_PSWRQ_SRC0_L2P 0x120054 #define PXP2_REG_PSWRQ_TM0_L2P 0x12001c #define PXP2_REG_PSWRQ_TSDM0_L2P 0x1200e0 /* [RW 32] Interrupt mask register #0 read/write */ #define PXP2_REG_PXP2_INT_MASK_0 0x120578 #define PXP2_REG_PXP2_INT_MASK_1 0x120614 /* [R 32] Interrupt register #0 read */ -#define PXP2_REG_PXP2_INT_STS_0 0x12056c -#define PXP2_REG_PXP2_INT_STS_1 0x120608 +#define PXP2_REG_PXP2_INT_STS_0 0x12056c +#define PXP2_REG_PXP2_INT_STS_1 0x120608 /* [RC 32] Interrupt register #0 read clear */ #define PXP2_REG_PXP2_INT_STS_CLR_0 0x120570 -/* [WR 32] Interrupt register #0 bit set or clear */ -#define PXP2_REG_PXP2_INT_STS_WR_0 0x120574 /* [RW 32] Parity mask register #0 read/write */ #define PXP2_REG_PXP2_PRTY_MASK_0 0x120588 #define PXP2_REG_PXP2_PRTY_MASK_1 0x120598 /* [R 32] Parity register #0 read */ #define PXP2_REG_PXP2_PRTY_STS_0 0x12057c #define PXP2_REG_PXP2_PRTY_STS_1 0x12058c +/* [RC 32] Parity register #0 read clear */ +#define PXP2_REG_PXP2_PRTY_STS_CLR_0 0x120580 +#define PXP2_REG_PXP2_PRTY_STS_CLR_1 0x120590 /* [R 1] Debug only: The 'almost full' indication from each fifo (gives - indication about backpressure) */ + * indication about backpressure) */ #define PXP2_REG_RD_ALMOST_FULL_0 0x120424 /* [R 8] Debug only: The blocks counter - number of unused block ids */ #define PXP2_REG_RD_BLK_CNT 0x120418 /* [RW 8] Debug only: Total number of available blocks in Tetris Buffer. - Must be bigger than 6. Normally should not be changed. */ -#define PXP2_REG_RD_BLK_NUM_CFG 0x12040c + * Must be bigger than 6. Normally should not be changed. */ +#define PXP2_REG_RD_BLK_NUM_CFG 0x12040c /* [RW 2] CDU byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_CDURD_SWAP_MODE 0x120404 +/* [R 29] Details of first request with error on receive side: [15:0] - Echo + * ID. [28:16] - sub-request length plus start_offset_2_0 minus 1. */ +#define PXP2_REG_RD_CPL_ERR_DETAILS 0x120778 +/* [R 10] Details of first request with error on receive side: [4:0] - VQ + * ID. [8:5] - client ID. [9] - valid - indicates if there was a completion + * error since the last time this register was read. */ +#define PXP2_REG_RD_CPL_ERR_DETAILS2 0x12077c /* [RW 1] When '1'; inputs to the PSWRD block are ignored */ #define PXP2_REG_RD_DISABLE_INPUTS 0x120374 /* [R 1] PSWRD internal memories initialization is done */ #define PXP2_REG_RD_INIT_DONE 0x120370 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq10 */ -#define PXP2_REG_RD_MAX_BLKS_VQ10 0x1203a0 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq11 */ -#define PXP2_REG_RD_MAX_BLKS_VQ11 0x1203a4 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq17 */ -#define PXP2_REG_RD_MAX_BLKS_VQ17 0x1203bc -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq18 */ -#define PXP2_REG_RD_MAX_BLKS_VQ18 0x1203c0 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq19 */ -#define PXP2_REG_RD_MAX_BLKS_VQ19 0x1203c4 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq22 */ -#define PXP2_REG_RD_MAX_BLKS_VQ22 0x1203d0 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq25 */ -#define PXP2_REG_RD_MAX_BLKS_VQ25 0x1203dc -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq6 */ -#define PXP2_REG_RD_MAX_BLKS_VQ6 0x120390 -/* [RW 8] The maximum number of blocks in Tetris Buffer that can be - allocated for vq9 */ -#define PXP2_REG_RD_MAX_BLKS_VQ9 0x12039c /* [RW 2] PBF byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_PBF_SWAP_MODE 0x1203f4 /* [R 1] Debug only: Indication if delivery ports are idle */ @@ -2877,56 +2420,53 @@ #define PXP2_REG_RD_PORT_IS_IDLE_1 0x120420 /* [RW 2] QM byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_QM_SWAP_MODE 0x1203f8 -/* [R 7] Debug only: The SR counter - number of unused sub request ids */ -#define PXP2_REG_RD_SR_CNT 0x120414 /* [RW 2] SRC byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_SRC_SWAP_MODE 0x120400 +/* [R 7] Debug only: The SR counter - number of unused sub request ids */ +#define PXP2_REG_RD_SR_CNT 0x120414 /* [RW 7] Debug only: Total number of available PCI read sub-requests. Must - be bigger than 1. Normally should not be changed. */ + * be bigger than 1. Normally should not be changed. */ #define PXP2_REG_RD_SR_NUM_CFG 0x120408 /* [RW 1] Signals the PSWRD block to start initializing internal memories */ #define PXP2_REG_RD_START_INIT 0x12036c /* [RW 2] TM byte swapping mode configuration for master read requests */ #define PXP2_REG_RD_TM_SWAP_MODE 0x1203fc -#define PXP2_REG_RQ_ATC_INTERNAL_ATS_ENABLE 0x1207d8 /* [RW 10] Bandwidth addition to VQ0 write requests */ #define PXP2_REG_RQ_BW_RD_ADD0 0x1201bc /* [RW 10] Bandwidth addition to VQ12 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD12 0x1201ec +#define PXP2_REG_RQ_BW_RD_ADD12 0x1201ec /* [RW 10] Bandwidth addition to VQ13 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD13 0x1201f0 +#define PXP2_REG_RQ_BW_RD_ADD13 0x1201f0 /* [RW 10] Bandwidth addition to VQ14 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD14 0x1201f4 +#define PXP2_REG_RQ_BW_RD_ADD14 0x1201f4 /* [RW 10] Bandwidth addition to VQ15 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD15 0x1201f8 +#define PXP2_REG_RQ_BW_RD_ADD15 0x1201f8 /* [RW 10] Bandwidth addition to VQ16 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD16 0x1201fc +#define PXP2_REG_RQ_BW_RD_ADD16 0x1201fc /* [RW 10] Bandwidth addition to VQ17 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD17 0x120200 +#define PXP2_REG_RQ_BW_RD_ADD17 0x120200 /* [RW 10] Bandwidth addition to VQ18 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD18 0x120204 +#define PXP2_REG_RQ_BW_RD_ADD18 0x120204 /* [RW 10] Bandwidth addition to VQ19 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD19 0x120208 +#define PXP2_REG_RQ_BW_RD_ADD19 0x120208 /* [RW 10] Bandwidth addition to VQ20 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD20 0x12020c +#define PXP2_REG_RQ_BW_RD_ADD20 0x12020c /* [RW 10] Bandwidth addition to VQ22 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD22 0x120210 +#define PXP2_REG_RQ_BW_RD_ADD22 0x120210 /* [RW 10] Bandwidth addition to VQ23 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD23 0x120214 +#define PXP2_REG_RQ_BW_RD_ADD23 0x120214 /* [RW 10] Bandwidth addition to VQ24 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD24 0x120218 +#define PXP2_REG_RQ_BW_RD_ADD24 0x120218 /* [RW 10] Bandwidth addition to VQ25 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD25 0x12021c +#define PXP2_REG_RQ_BW_RD_ADD25 0x12021c /* [RW 10] Bandwidth addition to VQ26 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD26 0x120220 +#define PXP2_REG_RQ_BW_RD_ADD26 0x120220 /* [RW 10] Bandwidth addition to VQ27 read requests */ -#define PXP2_REG_RQ_BW_RD_ADD27 0x120224 +#define PXP2_REG_RQ_BW_RD_ADD27 0x120224 /* [RW 10] Bandwidth addition to VQ4 read requests */ #define PXP2_REG_RQ_BW_RD_ADD4 0x1201cc /* [RW 10] Bandwidth addition to VQ5 read requests */ #define PXP2_REG_RQ_BW_RD_ADD5 0x1201d0 -/* [RW 10] Bandwidth addition to VQ TREQ read requests */ -#define PXP2_REG_RQ_BW_RD_ADD_TREQ 0x1205f8 /* [RW 10] Bandwidth Typical L for VQ0 Read requests */ #define PXP2_REG_RQ_BW_RD_L0 0x1202ac /* [RW 10] Bandwidth Typical L for VQ12 Read requests */ @@ -2963,8 +2503,6 @@ #define PXP2_REG_RQ_BW_RD_L4 0x1202bc /* [RW 10] Bandwidth Typical L for VQ5 Read- currently not used */ #define PXP2_REG_RQ_BW_RD_L5 0x1202c0 -/* [RW 10] Bandwidth Typical L to VQ TREQ read requests */ -#define PXP2_REG_RQ_BW_RD_L_TREQ 0x120600 /* [RW 7] Bandwidth upper bound for VQ0 read requests */ #define PXP2_REG_RQ_BW_RD_UBOUND0 0x120234 /* [RW 7] Bandwidth upper bound for VQ12 read requests */ @@ -3001,12 +2539,10 @@ #define PXP2_REG_RQ_BW_RD_UBOUND4 0x120244 /* [RW 7] Bandwidth upper bound for VQ5 read requests */ #define PXP2_REG_RQ_BW_RD_UBOUND5 0x120248 -/* [RW 7] Bandwidth upper bound to VQ TREQ read requests */ -#define PXP2_REG_RQ_BW_RD_UBOUND_TREQ 0x1205fc /* [RW 10] Bandwidth addition to VQ29 write requests */ -#define PXP2_REG_RQ_BW_WR_ADD29 0x12022c +#define PXP2_REG_RQ_BW_WR_ADD29 0x12022c /* [RW 10] Bandwidth addition to VQ30 write requests */ -#define PXP2_REG_RQ_BW_WR_ADD30 0x120230 +#define PXP2_REG_RQ_BW_WR_ADD30 0x120230 /* [RW 10] Bandwidth Typical L for VQ29 Write requests */ #define PXP2_REG_RQ_BW_WR_L29 0x12031c /* [RW 10] Bandwidth Typical L for VQ30 Write requests */ @@ -3022,35 +2558,31 @@ #define PXP2_REG_RQ_CDU_FIRST_ILT 0x12061c #define PXP2_REG_RQ_CDU_LAST_ILT 0x120620 /* [RW 4] page size in L2P table for CDU module; -4k; -8k; -16k; -32k; -64k; - -128k; -256k; -512k; -1M; -2M; 0-4M */ + * -128k; -256k; -512k; -1M; -2M; 0-4M */ #define PXP2_REG_RQ_CDU_P_SIZE 0x120018 /* [R 1] 1' indicates that the requester has finished its internal - configuration */ + * configuration */ #define PXP2_REG_RQ_CFG_DONE 0x1201b4 /* [RW 2] Endian mode for debug */ #define PXP2_REG_RQ_DBG_ENDIAN_M 0x1201a4 /* [RW 1] When '1'; requests will enter input buffers but wont get out - towards the glue */ + * towards the glue */ #define PXP2_REG_RQ_DISABLE_INPUTS 0x120330 /* [RW 4] Determines alignment of write SRs when a request is split into - several SRs. 0 - 8B aligned. 1 - 64B aligned. 2 - 128B aligned. 3 - 256B - aligned. 4 - 512B aligned. */ + * several SRs. 0 - 8B aligned. 1 - 64B aligned. 2 - 128B aligned. 3 - 256B + * aligned. 4 - 512B aligned. */ #define PXP2_REG_RQ_DRAM_ALIGN 0x1205b0 /* [RW 4] Determines alignment of read SRs when a request is split into - several SRs. 0 - 8B aligned. 1 - 64B aligned. 2 - 128B aligned. 3 - 256B - aligned. 4 - 512B aligned. */ + * several SRs. 0 - 8B aligned. 1 - 64B aligned. 2 - 128B aligned. 3 - 256B + * aligned. 4 - 512B aligned. */ #define PXP2_REG_RQ_DRAM_ALIGN_RD 0x12092c /* [RW 1] when set the new alignment method (E2) will be applied; when reset - the original alignment method (E1 E1H) will be applied */ + * the original alignment method (E1 E1H) will be applied */ #define PXP2_REG_RQ_DRAM_ALIGN_SEL 0x120930 -/* [RW 1] If 1 ILT failiue will not result in ELT access; An interrupt will - be asserted */ -#define PXP2_REG_RQ_ELT_DISABLE 0x12066c +/* [R 32] Status signals in pswrq_garb module */ +#define PXP2_REG_RQ_GARB 0x120748 /* [RW 2] Endian mode for hc */ -#define PXP2_REG_RQ_HC_ENDIAN_M 0x1201a8 -/* [RW 1] when '0' ILT logic will work as in A0; otherwise B0; for back - compatibility needs; Note that different registers are used per mode */ -#define PXP2_REG_RQ_ILT_MODE 0x1205b4 +#define PXP2_REG_RQ_HC_ENDIAN_M 0x1201a8 /* [WB 53] Onchip address table */ #define PXP2_REG_RQ_ONCHIP_AT 0x122000 /* [WB 53] Onchip address table - B0 */ @@ -3058,33 +2590,33 @@ /* [RW 13] Pending read limiter threshold; in Dwords */ #define PXP2_REG_RQ_PDR_LIMIT 0x12033c /* [RW 2] Endian mode for qm */ -#define PXP2_REG_RQ_QM_ENDIAN_M 0x120194 +#define PXP2_REG_RQ_QM_ENDIAN_M 0x120194 #define PXP2_REG_RQ_QM_FIRST_ILT 0x120634 -#define PXP2_REG_RQ_QM_LAST_ILT 0x120638 +#define PXP2_REG_RQ_QM_LAST_ILT 0x120638 /* [RW 4] page size in L2P table for QM module; -4k; -8k; -16k; -32k; -64k; - -128k; -256k; -512k; -1M; -2M; 0-4M */ + * -128k; -256k; -512k; -1M; -2M; 0-4M */ #define PXP2_REG_RQ_QM_P_SIZE 0x120050 /* [RW 1] 1' indicates that the RBC has finished configuring the PSWRQ */ #define PXP2_REG_RQ_RBC_DONE 0x1201b0 /* [RW 3] Max burst size filed for read requests port 0; 000 - 128B; - 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ + * 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ #define PXP2_REG_RQ_RD_MBS0 0x120160 /* [RW 3] Max burst size filed for read requests port 1; 000 - 128B; - 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ + * 001:256B; 010: 512B; 11:1K:100:2K; 01:4K */ #define PXP2_REG_RQ_RD_MBS1 0x120168 /* [RW 2] Endian mode for src */ #define PXP2_REG_RQ_SRC_ENDIAN_M 0x12019c #define PXP2_REG_RQ_SRC_FIRST_ILT 0x12063c #define PXP2_REG_RQ_SRC_LAST_ILT 0x120640 /* [RW 4] page size in L2P table for SRC module; -4k; -8k; -16k; -32k; -64k; - -128k; -256k; -512k; -1M; -2M; 0-4M */ + * -128k; -256k; -512k; -1M; -2M; 0-4M */ #define PXP2_REG_RQ_SRC_P_SIZE 0x12006c /* [RW 2] Endian mode for tm */ -#define PXP2_REG_RQ_TM_ENDIAN_M 0x120198 +#define PXP2_REG_RQ_TM_ENDIAN_M 0x120198 #define PXP2_REG_RQ_TM_FIRST_ILT 0x120644 -#define PXP2_REG_RQ_TM_LAST_ILT 0x120648 +#define PXP2_REG_RQ_TM_LAST_ILT 0x120648 /* [RW 4] page size in L2P table for TM module; -4k; -8k; -16k; -32k; -64k; - -128k; -256k; -512k; -1M; -2M; 0-4M */ + * -128k; -256k; -512k; -1M; -2M; 0-4M */ #define PXP2_REG_RQ_TM_P_SIZE 0x120034 /* [R 5] Number of entries in the ufifo; his fifo has l2p completions */ #define PXP2_REG_RQ_UFIFO_NUM_OF_ENTRY 0x12080c @@ -3155,134 +2687,124 @@ /* [R 8] Number of entries occupied by vq 9 in pswrq memory */ #define PXP2_REG_RQ_VQ9_ENTRY_CNT 0x120908 /* [RW 3] Max burst size filed for write requests port 0; 000 - 128B; - 001:256B; 010: 512B; */ + * 001:256B; 010: 512B; */ #define PXP2_REG_RQ_WR_MBS0 0x12015c /* [RW 3] Max burst size filed for write requests port 1; 000 - 128B; - 001:256B; 010: 512B; */ + * 001:256B; 010: 512B; */ #define PXP2_REG_RQ_WR_MBS1 0x120164 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_CDU_MPS 0x1205f0 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_CSDM_MPS 0x1205d0 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_DBG_MPS 0x1205e8 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_DMAE_MPS 0x1205ec -/* [RW 10] This register is not used when pxp2.wr_rev_mode is 1. This - register should have value of 63 when pxp2.wr_rev_mode is 0 to disable - the threshold mechanism for DMAE. Therefore; 63 is the init value for all - modes. */ -#define PXP2_REG_WR_DMAE_TH 0x120368 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_HC_MPS 0x1205c8 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_QM_MPS 0x1205dc -/* [RW 1] For non-USDMDP clients. 0 - working in A0 mode - assert - has_payload only when EOP arrived; - working in B0 mode - assert - has_payload according to pxp2.wr_th_usdmdp or to EOP arrived. */ -#define PXP2_REG_WR_REV_MODE 0x120670 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_SRC_MPS 0x1205e4 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_TM_MPS 0x1205e0 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_TSDM_MPS 0x1205d4 -/* [RW 10] If Number of entries (each represents 16B) in usdmdp fifo is - higher than this threshold then has_payload indication will be asserted; - the default value should be > (MPS size * ~pxp2.wr_usdmdp_outst_req). */ +/* [RW 9] a. When pxp2.wr_th_mode_usdmdp=0 (E1.5-65 mode) should be + * initialized to (MPS/32); b. When pxp2.wr_th_mode_usdmdp=1 (E1.5-90; + * enhanced mode) and pxp2.wr_usdmdp_outst_req is different than default (3) + * should be initialized to (pxp2.wr_usdmdp_outst_req x MPS/32); when + * pxp2.wr_usdmdp_outst_req is 3 the reset value is the correct + * configuration */ #define PXP2_REG_WR_USDMDP_TH 0x120348 /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_USDM_MPS 0x1205cc /* [RW 2] 0 - 128B; - 256B; - 512B; - 1024B; when the payload in the - buffer reaches this number has_payload will be asserted. 1024B is not a - real MPS; it is a way of indicating that the client needs to wait for EOP - before asserting has_payload. Register should be initialized according to - has_payload value. */ + * buffer reaches this number has_payload will be asserted. 1024B is not a + * real MPS; it is a way of indicating that the client needs to wait for EOP + * before asserting has_payload. Register should be initialized according to + * has_payload value. */ #define PXP2_REG_WR_XSDM_MPS 0x1205d8 /* [R 1] debug only: Indication if PSWHST arbiter is idle */ -#define PXP_REG_HST_ARB_IS_IDLE 0x103004 +#define PXP_REG_HST_ARB_IS_IDLE 0x103004 /* [R 8] debug only: A bit mask for all PSWHST arbiter clients. '1' means - this client is waiting for the arbiter. */ + * this client is waiting for the arbiter. */ #define PXP_REG_HST_CLIENTS_WAITING_TO_ARB 0x103008 /* [RW 1] When 1; doorbells are discarded and not passed to doorbell queue - block. Should be used for close the gates. */ + * block. Should be used for close the gates. */ #define PXP_REG_HST_DISCARD_DOORBELLS 0x1030a4 /* [R 1] debug only: '1' means this PSWHST is discarding doorbells. This bit - should update accoring to 'hst_discard_doorbells' register when the state - machine is idle */ + * should update accoring to 'hst_discard_doorbells' register when the state + * machine is idle */ #define PXP_REG_HST_DISCARD_DOORBELLS_STATUS 0x1030a0 /* [RW 1] When 1; new internal writes arriving to the block are discarded. - Should be used for close the gates. */ + * Should be used for close the gates. */ #define PXP_REG_HST_DISCARD_INTERNAL_WRITES 0x1030a8 /* [R 6] debug only: A bit mask for all PSWHST internal write clients. '1' - means this PSWHST is discarding inputs from this client. Each bit should - update accoring to 'hst_discard_internal_writes' register when the state - machine is idle. */ + * means this PSWHST is discarding inputs from this client. Each bit should + * update accoring to 'hst_discard_internal_writes' register when the state + * machine is idle. */ #define PXP_REG_HST_DISCARD_INTERNAL_WRITES_STATUS 0x10309c -/* [WB 160] Used for initialization of the inbound interrupts memory */ -#define PXP_REG_HST_INBOUND_INT 0x103800 /* [R 1] 1 - An incorrect access is logged. The valid bit is reset when the - relevant interrupt register is read (PXP_REG_INT_STS_CLR_1) */ + * relevant interrupt register is read (PXP_REG_INT_STS_CLR_1) */ #define PXP_REG_HST_INCORRECT_ACCESS_VALID 0x1030cc /* [R 1] 1- permission violation data is logged. The valid bit is reset when - the relevant interrupt register is read (PXP_REG_INT_STS_CLR_1) */ -#define PXP_REG_HST_PER_VIOLATION_VALID 0x1030e0 + * the relevant interrupt register is read (PXP_REG_INT_STS_CLR_1) */ +#define PXP_REG_HST_PER_VIOLATION_VALID 0x1030e0 /* [R 15] The FID of the first access to a disabled VF; the format is - [14:12] - pfid; [11:6] - vfid; [5] - vf_valid; [4:1] - client (0 USDM; 1 - CSDM; 2 XSDM; 3 TSDM; 4 HC; 5 GRC; 6 DQ; 7 RESERVED SPACE; 8 ATC); [0] - - w_nr(0-read req; 1- write req). The data is written only when the valid - bit is reset. and it is stays stable until it is reset by the read from - interrupt_clr register */ + * [14:12] - pfid; [11:6] - vfid; [5] - vf_valid; [4:1] - client (0 USDM; 1 + * CSDM; 2 XSDM; 3 TSDM; 4 HC; 5 GRC; 6 DQ; 7 RESERVED SPACE; 8 ATC); [0] - + * w_nr(0-read req; 1- write req). The data is written only when the valid + * bit is reset. and it is stays stable until it is reset by the read from + * interrupt_clr register */ #define PXP_REG_HST_VF_DISABLED_ERROR_DATA 0x1030b8 /* [R 1] 1 - An error request is logged and wasn't handled yet. The valid - bit is reset when the relevant interrupt register is read - (PXP_REG_INT_STS_CLR_1) */ + * bit is reset when the relevant interrupt register is read + * (PXP_REG_INT_STS_CLR_1) */ #define PXP_REG_HST_VF_DISABLED_ERROR_VALID 0x1030bc /* [RW 7] Indirect access to the permission table. The fields are : {Valid; - VFID[5:0]} */ + * VFID[5:0]} */ #define PXP_REG_HST_ZONE_PERMISSION_TABLE 0x103400 -/* [RW 1] Start the Init sequence for the zone permission table */ -#define PXP_REG_HST_ZONE_PERM_TABLE_INIT 0x1030d8 /* [RW 32] Interrupt mask register #0 read/write */ #define PXP_REG_PXP_INT_MASK_0 0x103074 #define PXP_REG_PXP_INT_MASK_1 0x103084 @@ -3296,126 +2818,81 @@ #define PXP_REG_PXP_PRTY_MASK 0x103094 /* [R 27] Parity register #0 read */ #define PXP_REG_PXP_PRTY_STS 0x103088 -/* [RW 4] The activity counter initial increment value sent in the load - request */ -#define QM_REG_ACTCTRINITVAL_0 0x168040 -#define QM_REG_ACTCTRINITVAL_1 0x168044 -#define QM_REG_ACTCTRINITVAL_2 0x168048 -#define QM_REG_ACTCTRINITVAL_3 0x16804c +/* [RC 27] Parity register #0 read clear */ +#define PXP_REG_PXP_PRTY_STS_CLR 0x10308c /* [RW 32] The base logical address (in bytes) of each physical queue. The - index I represents the physical queue number. The 12 lsbs are ignore and - considered zero so practically there are only 20 bits in this register; - queues 63-0 */ -#define QM_REG_BASEADDR 0x168900 + * index I represents the physical queue number. The 12 lsbs are ignore and + * considered zero so practically there are only 20 bits in this register; + * queues 63-0 */ +#define QM_REG_BASEADDR 0x168900 /* [R 32] NOT USED */ #define QM_REG_BASEADDR_EXT_A 0x16e100 -/* [R 17] The credit value for byte credit 0 (COS 0). The value is 2s - complement value (i.e. msb is used for the sign). */ -#define QM_REG_BYTECRD0 0x16e6fc -/* [R 17] The credit value for byte credit 1 (COS 1). The value is 2s - complement value (i.e. msb is used for the sign). */ -#define QM_REG_BYTECRD1 0x16e700 -/* [R 17] The credit value for byte credit 2 (Loopback). The value is 2s - complement value (i.e. msb is used for the sign). */ -#define QM_REG_BYTECRD2 0x16e704 -/* [RW 32] the PBF command queue that each physical queue belongs to. 2 bits - per physical queue (queues 0-15) as follows: 0 for COS0; 1 for COS 1; 2 - for Loopback */ +/* [R 18] The credit value for byte credit 0. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD0 0x16e6fc +/* [R 18] The credit value for byte credit 1. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD1 0x16e700 +/* [R 18] The credit value for byte credit 2. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD2 0x16e704 +/* [R 18] The credit value for byte credit 3. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD3 0x16e7ac +/* [R 18] The credit value for byte credit 4. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD4 0x16e7b0 +/* [R 18] The credit value for byte credit 5. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD5 0x16e7b4 +/* [R 18] The credit value for byte credit 6. The value is 2s complement + * value (i.e. msb is used for the sign). */ +#define QM_REG_BYTECRD6 0x16e7b8 +/* [R 32] NOT USED - removed for E3 B0 */ #define QM_REG_BYTECRDCMDQ_0 0x16e6e8 -#define QM_REG_BYTECRDCMDQ_1 0x16e6ec -#define QM_REG_BYTECRDCMDQ_2 0x16e6f0 -#define QM_REG_BYTECRDCMDQ_3 0x16e6f4 -/* [RW 16] The byte credit cost for each task. This value is for all byte - credit counters */ -#define QM_REG_BYTECRDCOST 0x168234 -/* [RC 32] Byte credit update error register; b1-b0: byte credit counter id - (pbf error); b3-b2: byte credit counter id (storm increment error); - b5-b4: byte credit counter id (storm decrement error); b7-b6: reserved; - b8: pbf error valid; b9: storm increment error valid; b10: storm - decrement error valid; b11: reserved; b14-b12: byte credit warning - (warning=decremented below zero). mask bit per byte credit counter; - b31-b15: reserved; */ +/* [RC 32] byte credit update error register; b2-b0: byte credit id (pbf + * error); b3 - reserved (zero filled); b6-b4: byte credit id (storm + * increment error); b7 - reserved (zero filled); b10-b8: byte credit id + * (storm decrement error); b11 - reserved (zero filled); b12: pbf error + * valid; b13: storm increment error valid; b14: storm decrement error + * valid; b15: reserved; b22-b16: byte credit warning (warning=decremented + * below zero). mask bit per voq counter; b31-b23: reserved; NOTE: VOQ id-s + * represent HW */ #define QM_REG_BYTECRDERRREG 0x16e708 -/* [RW 16] The initial byte credit value for all counters */ +/* [RW 17] The initial byte credit value for all counters */ #define QM_REG_BYTECRDINITVAL 0x168238 -/* [R 32] NOT USED */ -#define QM_REG_BYTECRDPORT_LSB 0x168228 -/* [R 32] NOT USED */ -#define QM_REG_BYTECRDPORT_LSB_EXT_A 0x16e520 -/* [R 32] NOT USED */ -#define QM_REG_BYTECRDPORT_MSB 0x168224 -/* [R 32] NOT USED */ -#define QM_REG_BYTECRDPORT_MSB_EXT_A 0x16e51c -/* [RW 16] The byte credit value that if above the QM is considered almost - full */ -#define QM_REG_BYTECREDITAFULLTHR 0x168094 -/* [RW 4] The initial credit for interface */ -#define QM_REG_CMINITCRD_0 0x1680cc -#define QM_REG_CMINITCRD_1 0x1680d0 -#define QM_REG_CMINITCRD_2 0x1680d4 -#define QM_REG_CMINITCRD_3 0x1680d8 -#define QM_REG_CMINITCRD_4 0x1680dc -#define QM_REG_CMINITCRD_5 0x1680e0 -#define QM_REG_CMINITCRD_6 0x1680e4 -#define QM_REG_CMINITCRD_7 0x1680e8 -/* [RW 8] A mask bit per CM interface. If this bit is 0 then this interface - is masked */ -#define QM_REG_CMINTEN 0x1680ec -/* [RW 12] A bit vector which indicates which one of the queues are tied to - interface 0 */ -#define QM_REG_CMINTVOQMASK_0 0x1681f4 -#define QM_REG_CMINTVOQMASK_1 0x1681f8 -#define QM_REG_CMINTVOQMASK_2 0x1681fc -#define QM_REG_CMINTVOQMASK_3 0x168200 -#define QM_REG_CMINTVOQMASK_4 0x168204 -#define QM_REG_CMINTVOQMASK_5 0x168208 -#define QM_REG_CMINTVOQMASK_6 0x16820c -#define QM_REG_CMINTVOQMASK_7 0x168210 /* [RW 20] The number of connections divided by 16 which dictates the size - of each queue which belongs to even function number. */ + * of each queue which belongs to even function number. */ #define QM_REG_CONNNUM_0 0x168020 /* [R 6] Keep the fill level of the fifo from write client 4 */ #define QM_REG_CQM_WRC_FIFOLVL 0x168018 -/* [RW 8] The context regions sent in the CFC load request */ -#define QM_REG_CTXREG_0 0x168030 -#define QM_REG_CTXREG_1 0x168034 -#define QM_REG_CTXREG_2 0x168038 -#define QM_REG_CTXREG_3 0x16803c -/* [RW 12] The VOQ mask used to select the VOQs which needs to be full for - bypass enable */ -#define QM_REG_ENBYPVOQMASK 0x16823c -/* [RW 32] A bit mask per each physical queue. If a bit is set then the - physical queue uses the byte credit; queues 31-0 */ -#define QM_REG_ENBYTECRD_LSB 0x168220 -/* [R 32] NOT USED */ -#define QM_REG_ENBYTECRD_LSB_EXT_A 0x16e518 -/* [RW 32] A bit mask per each physical queue. If a bit is set then the - physical queue uses the byte credit; queues 63-32 */ -#define QM_REG_ENBYTECRD_MSB 0x16821c -/* [R 32] NOT USED */ -#define QM_REG_ENBYTECRD_MSB_EXT_A 0x16e514 -/* [RW 4] If cleared then the secondary interface will not be served by the - RR arbiter */ -#define QM_REG_ENSEC 0x1680f0 -/* [RW 32] NA */ -#define QM_REG_FUNCNUMSEL_LSB 0x168230 -/* [RW 32] NA */ -#define QM_REG_FUNCNUMSEL_MSB 0x16822c -/* [RW 32] A mask register to mask the Almost empty signals which will not - be use for the almost empty indication to the HW block; queues 31:0 */ -#define QM_REG_HWAEMPTYMASK_LSB 0x168218 -/* [R 32] NOT USED */ -#define QM_REG_HWAEMPTYMASK_LSB_EXT_A 0x16e510 -/* [RW 32] A mask register to mask the Almost empty signals which will not - be use for the almost empty indication to the HW block; queues 63:32 */ -#define QM_REG_HWAEMPTYMASK_MSB 0x168214 -/* [R 32] NOT USED */ -#define QM_REG_HWAEMPTYMASK_MSB_EXT_A 0x16e50c -/* [RW 4] The number of outstanding request to CFC */ -#define QM_REG_OUTLDREQ 0x168804 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ0 */ +#define QM_REG_FWVOQ0TOHWVOQ 0x16e7bc +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ1 */ +#define QM_REG_FWVOQ1TOHWVOQ 0x16e7c0 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ2 */ +#define QM_REG_FWVOQ2TOHWVOQ 0x16e7c4 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ3 */ +#define QM_REG_FWVOQ3TOHWVOQ 0x16e7c8 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ4 */ +#define QM_REG_FWVOQ4TOHWVOQ 0x16e7cc +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ5 */ +#define QM_REG_FWVOQ5TOHWVOQ 0x16e7d0 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ6 */ +#define QM_REG_FWVOQ6TOHWVOQ 0x16e7d4 +/* [RW 3] Describes the HW (real) VOQ id (id-s 0-6 used for HW TX VOQ-s) of + * FW (virtual) VOQ7 */ +#define QM_REG_FWVOQ7TOHWVOQ 0x16e7d8 /* [RC 1] A flag to indicate that overflow error occurred in one of the - queues. */ -#define QM_REG_OVFERROR 0x16805c + * queues. */ +#define QM_REG_OVFERROR 0x16805c /* [RC 6] the Q were the qverflow occurs */ #define QM_REG_OVFQNUM 0x168058 /* [R 16] Pause state for physical queues 15-0 */ @@ -3434,34 +2911,17 @@ #define QM_REG_PAUSESTATE6 0x16e694 /* [R 16] NOT USED */ #define QM_REG_PAUSESTATE7 0x16e698 -/* [RW 2] The PCI attributes field used in the PCI request. */ -#define QM_REG_PCIREQAT 0x168054 #define QM_REG_PF_EN 0x16e70c /* [R 24] The number of tasks stored in the QM for the PF. only even - functions are valid in E2 (odd I registers will be hard wired to 0) */ + * functions are valid in E2 (odd I registers will be hard wired to 0) */ #define QM_REG_PF_USG_CNT_0 0x16e040 /* [R 16] NOT USED */ #define QM_REG_PORT0BYTECRD 0x168300 /* [R 16] NOT USED */ #define QM_REG_PORT1BYTECRD 0x168304 -/* [RW 3] pci function number of queues 15-0 */ -#define QM_REG_PQ2PCIFUNC_0 0x16e6bc -#define QM_REG_PQ2PCIFUNC_1 0x16e6c0 -#define QM_REG_PQ2PCIFUNC_2 0x16e6c4 -#define QM_REG_PQ2PCIFUNC_3 0x16e6c8 -#define QM_REG_PQ2PCIFUNC_4 0x16e6cc -#define QM_REG_PQ2PCIFUNC_5 0x16e6d0 -#define QM_REG_PQ2PCIFUNC_6 0x16e6d4 -#define QM_REG_PQ2PCIFUNC_7 0x16e6d8 -/* [RW 1] This register affects the way the QM looks on the interfaces that - involve physical queue logic (push; pop; xsdm command; xcm bypass) and - takes care of the required physical queue mapping logic. the QM will map - IPQN[4:0] = EPQN[4:0]. In addition when set the QM will map - IPQN[5]=EPQN[6]. when reset IPQN[5]=EPQN[5]. */ -#define QM_REG_PQ_MODE 0x16e794 /* [WB 54] Pointer Table Memory for queues 63-0; The mapping is as follow: - ptrtbl[53:30] read pointer; ptrtbl[29:6] write pointer; ptrtbl[5:4] read - bank0; ptrtbl[3:2] read bank 1; ptrtbl[1:0] write bank; */ + * ptrtbl[53:30] read pointer; ptrtbl[29:6] write pointer; ptrtbl[5:4] read + * bank0; ptrtbl[3:2] read bank 1; ptrtbl[1:0] write bank; */ #define QM_REG_PTRTBL 0x168a00 /* [R 54] NOT USED */ #define QM_REG_PTRTBL_EXT_A 0x16e200 @@ -3473,6 +2933,8 @@ #define QM_REG_QM_PRTY_MASK 0x168454 /* [R 12] Parity register #0 read */ #define QM_REG_QM_PRTY_STS 0x168448 +/* [RC 12] Parity register #0 read clear */ +#define QM_REG_QM_PRTY_STS_CLR 0x16844c /* [R 32] Current queues in pipeline: Queues from 32 to 63 */ #define QM_REG_QSTATUS_HIGH 0x16802c /* [R 32] NOT USED */ @@ -3484,308 +2946,49 @@ /* [R 24] The number of tasks queued for each queue; queues 63-0 */ #define QM_REG_QTASKCTR_0 0x168308 /* [R 24] NOT USED */ -#define QM_REG_QTASKCTR_EXT_A_0 0x16e584 +#define QM_REG_QTASKCTR_EXT_A_0 0x16e584 /* [RW 4] Queue tied to VOQ */ #define QM_REG_QVOQIDX_0 0x1680f4 -#define QM_REG_QVOQIDX_10 0x16811c -#define QM_REG_QVOQIDX_100 0x16e49c -#define QM_REG_QVOQIDX_101 0x16e4a0 -#define QM_REG_QVOQIDX_102 0x16e4a4 -#define QM_REG_QVOQIDX_103 0x16e4a8 -#define QM_REG_QVOQIDX_104 0x16e4ac -#define QM_REG_QVOQIDX_105 0x16e4b0 -#define QM_REG_QVOQIDX_106 0x16e4b4 -#define QM_REG_QVOQIDX_107 0x16e4b8 -#define QM_REG_QVOQIDX_108 0x16e4bc -#define QM_REG_QVOQIDX_109 0x16e4c0 -#define QM_REG_QVOQIDX_11 0x168120 -#define QM_REG_QVOQIDX_110 0x16e4c4 -#define QM_REG_QVOQIDX_111 0x16e4c8 -#define QM_REG_QVOQIDX_112 0x16e4cc -#define QM_REG_QVOQIDX_113 0x16e4d0 -#define QM_REG_QVOQIDX_114 0x16e4d4 -#define QM_REG_QVOQIDX_115 0x16e4d8 -#define QM_REG_QVOQIDX_116 0x16e4dc -#define QM_REG_QVOQIDX_117 0x16e4e0 -#define QM_REG_QVOQIDX_118 0x16e4e4 -#define QM_REG_QVOQIDX_119 0x16e4e8 -#define QM_REG_QVOQIDX_12 0x168124 -#define QM_REG_QVOQIDX_120 0x16e4ec -#define QM_REG_QVOQIDX_121 0x16e4f0 -#define QM_REG_QVOQIDX_122 0x16e4f4 -#define QM_REG_QVOQIDX_123 0x16e4f8 -#define QM_REG_QVOQIDX_124 0x16e4fc -#define QM_REG_QVOQIDX_125 0x16e500 -#define QM_REG_QVOQIDX_126 0x16e504 -#define QM_REG_QVOQIDX_127 0x16e508 -#define QM_REG_QVOQIDX_13 0x168128 -#define QM_REG_QVOQIDX_14 0x16812c -#define QM_REG_QVOQIDX_15 0x168130 -#define QM_REG_QVOQIDX_16 0x168134 -#define QM_REG_QVOQIDX_17 0x168138 -#define QM_REG_QVOQIDX_2 0x1680fc -#define QM_REG_QVOQIDX_20 0x168144 -#define QM_REG_QVOQIDX_21 0x168148 -#define QM_REG_QVOQIDX_22 0x16814c -#define QM_REG_QVOQIDX_23 0x168150 -#define QM_REG_QVOQIDX_24 0x168154 -#define QM_REG_QVOQIDX_25 0x168158 -#define QM_REG_QVOQIDX_26 0x16815c -#define QM_REG_QVOQIDX_27 0x168160 -#define QM_REG_QVOQIDX_28 0x168164 -#define QM_REG_QVOQIDX_29 0x168168 -#define QM_REG_QVOQIDX_3 0x168100 -#define QM_REG_QVOQIDX_30 0x16816c -#define QM_REG_QVOQIDX_31 0x168170 -#define QM_REG_QVOQIDX_32 0x168174 -#define QM_REG_QVOQIDX_33 0x168178 -#define QM_REG_QVOQIDX_34 0x16817c -#define QM_REG_QVOQIDX_35 0x168180 -#define QM_REG_QVOQIDX_36 0x168184 -#define QM_REG_QVOQIDX_37 0x168188 -#define QM_REG_QVOQIDX_38 0x16818c -#define QM_REG_QVOQIDX_39 0x168190 -#define QM_REG_QVOQIDX_4 0x168104 -#define QM_REG_QVOQIDX_40 0x168194 -#define QM_REG_QVOQIDX_41 0x168198 -#define QM_REG_QVOQIDX_42 0x16819c -#define QM_REG_QVOQIDX_43 0x1681a0 -#define QM_REG_QVOQIDX_44 0x1681a4 -#define QM_REG_QVOQIDX_45 0x1681a8 -#define QM_REG_QVOQIDX_46 0x1681ac -#define QM_REG_QVOQIDX_47 0x1681b0 -#define QM_REG_QVOQIDX_48 0x1681b4 -#define QM_REG_QVOQIDX_49 0x1681b8 -#define QM_REG_QVOQIDX_5 0x168108 -#define QM_REG_QVOQIDX_50 0x1681bc -#define QM_REG_QVOQIDX_51 0x1681c0 -#define QM_REG_QVOQIDX_52 0x1681c4 -#define QM_REG_QVOQIDX_53 0x1681c8 -#define QM_REG_QVOQIDX_54 0x1681cc -#define QM_REG_QVOQIDX_55 0x1681d0 -#define QM_REG_QVOQIDX_56 0x1681d4 -#define QM_REG_QVOQIDX_57 0x1681d8 -#define QM_REG_QVOQIDX_58 0x1681dc -#define QM_REG_QVOQIDX_59 0x1681e0 -#define QM_REG_QVOQIDX_6 0x16810c -#define QM_REG_QVOQIDX_60 0x1681e4 -#define QM_REG_QVOQIDX_61 0x1681e8 -#define QM_REG_QVOQIDX_62 0x1681ec -#define QM_REG_QVOQIDX_63 0x1681f0 -#define QM_REG_QVOQIDX_64 0x16e40c -#define QM_REG_QVOQIDX_65 0x16e410 -#define QM_REG_QVOQIDX_69 0x16e420 -#define QM_REG_QVOQIDX_7 0x168110 -#define QM_REG_QVOQIDX_70 0x16e424 -#define QM_REG_QVOQIDX_71 0x16e428 -#define QM_REG_QVOQIDX_72 0x16e42c -#define QM_REG_QVOQIDX_73 0x16e430 -#define QM_REG_QVOQIDX_74 0x16e434 -#define QM_REG_QVOQIDX_75 0x16e438 -#define QM_REG_QVOQIDX_76 0x16e43c -#define QM_REG_QVOQIDX_77 0x16e440 -#define QM_REG_QVOQIDX_78 0x16e444 -#define QM_REG_QVOQIDX_79 0x16e448 -#define QM_REG_QVOQIDX_8 0x168114 -#define QM_REG_QVOQIDX_80 0x16e44c -#define QM_REG_QVOQIDX_81 0x16e450 -#define QM_REG_QVOQIDX_85 0x16e460 -#define QM_REG_QVOQIDX_86 0x16e464 -#define QM_REG_QVOQIDX_87 0x16e468 -#define QM_REG_QVOQIDX_88 0x16e46c -#define QM_REG_QVOQIDX_89 0x16e470 -#define QM_REG_QVOQIDX_9 0x168118 -#define QM_REG_QVOQIDX_90 0x16e474 -#define QM_REG_QVOQIDX_91 0x16e478 -#define QM_REG_QVOQIDX_92 0x16e47c -#define QM_REG_QVOQIDX_93 0x16e480 -#define QM_REG_QVOQIDX_94 0x16e484 -#define QM_REG_QVOQIDX_95 0x16e488 -#define QM_REG_QVOQIDX_96 0x16e48c -#define QM_REG_QVOQIDX_97 0x16e490 -#define QM_REG_QVOQIDX_98 0x16e494 -#define QM_REG_QVOQIDX_99 0x16e498 /* [RW 1] Initialization bit command */ #define QM_REG_SOFT_RESET 0x168428 -/* [RW 8] The credit cost per every task in the QM. A value per each VOQ */ -#define QM_REG_TASKCRDCOST_0 0x16809c -#define QM_REG_TASKCRDCOST_1 0x1680a0 -#define QM_REG_TASKCRDCOST_10 0x1680c4 -#define QM_REG_TASKCRDCOST_2 0x1680a4 -#define QM_REG_TASKCRDCOST_3 0x1680a8 -#define QM_REG_TASKCRDCOST_4 0x1680ac -#define QM_REG_TASKCRDCOST_5 0x1680b0 /* [R 6] Keep the fill level of the fifo from write client 3 */ #define QM_REG_TQM_WRC_FIFOLVL 0x168010 /* [R 6] Keep the fill level of the fifo from write client 2 */ #define QM_REG_UQM_WRC_FIFOLVL 0x168008 -/* [RW 24] The PBF command queue which is associated with each VOQ (2 bits - per VOQ) as follows: 0 for COS0; 1 for COS1; 2 for loopback */ -#define QM_REG_VOQCMDQ 0x16e6f8 /* [RC 32] VOQ credit update error register; b3-b0: voq id (pbf error); - b7-b4: voq id (storm increment error); b11-b8: voq id (storm decrement - error); b12: pbf error valid; b13: storm increment error valid; b14: - storm decrement error valid; b15: reserved; b27-b16: voq warning - (warning=decremented below zero). mask bit per voq counter; b31-b28: - reserved; */ + * b7-b4: voq id (storm increment error); b11-b8: voq id (storm decrement + * error); b12: pbf error valid; b13: storm increment error valid; b14: + * storm decrement error valid; b15: reserved; b27-b16: voq warning + * (warning=decremented below zero). mask bit per voq counter; b31-b28: + * reserved; NOTE: VOQ id-s represent HW VOQ id */ #define QM_REG_VOQCRDERRREG 0x168408 /* [R 17] The credit value for each VOQ. The value is 2s complement value - (i.e. msb is used for the sign). */ + * (i.e. msb is used for the sign). */ #define QM_REG_VOQCREDIT_0 0x1682d0 #define QM_REG_VOQCREDIT_1 0x1682d4 +#define QM_REG_VOQCREDIT_2 0x1682d8 +#define QM_REG_VOQCREDIT_3 0x1682dc #define QM_REG_VOQCREDIT_4 0x1682e0 -/* [RW 16] The credit value that if above the QM is considered almost full */ -#define QM_REG_VOQCREDITAFULLTHR 0x168090 +#define QM_REG_VOQCREDIT_5 0x1682e4 +#define QM_REG_VOQCREDIT_6 0x1682e8 /* [RW 16] The init and maximum credit for each VoQ */ #define QM_REG_VOQINITCREDIT_0 0x168060 #define QM_REG_VOQINITCREDIT_1 0x168064 -#define QM_REG_VOQINITCREDIT_10 0x168088 #define QM_REG_VOQINITCREDIT_2 0x168068 #define QM_REG_VOQINITCREDIT_3 0x16806c #define QM_REG_VOQINITCREDIT_4 0x168070 #define QM_REG_VOQINITCREDIT_5 0x168074 -/* [R 1] NOT USED */ -#define QM_REG_VOQPORT_0 0x1682a0 -#define QM_REG_VOQPORT_1 0x1682a4 -#define QM_REG_VOQPORT_2 0x1682a8 +#define QM_REG_VOQINITCREDIT_6 0x168078 /* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ #define QM_REG_VOQQMASK_0_LSB 0x168240 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_0_LSB_EXT_A 0x16e524 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_0_MSB 0x168244 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_0_MSB_EXT_A 0x16e528 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_10_LSB 0x168290 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_10_LSB_EXT_A 0x16e574 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_10_MSB 0x168294 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_10_MSB_EXT_A 0x16e578 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_11_LSB 0x168298 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_11_LSB_EXT_A 0x16e57c -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_11_MSB 0x16829c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_11_MSB_EXT_A 0x16e580 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_1_LSB 0x168248 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_1_LSB_EXT_A 0x16e52c -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_1_MSB 0x16824c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_1_MSB_EXT_A 0x16e530 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_2_LSB 0x168250 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_2_LSB_EXT_A 0x16e534 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_2_MSB 0x168254 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_2_MSB_EXT_A 0x16e538 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_3_LSB 0x168258 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_3_LSB_EXT_A 0x16e53c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_3_MSB_EXT_A 0x16e540 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_4_LSB 0x168260 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_4_LSB_EXT_A 0x16e544 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_4_MSB 0x168264 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_4_MSB_EXT_A 0x16e548 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_5_LSB 0x168268 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_5_LSB_EXT_A 0x16e54c -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_5_MSB 0x16826c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_5_MSB_EXT_A 0x16e550 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_6_LSB 0x168270 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_6_LSB_EXT_A 0x16e554 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_6_MSB 0x168274 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_6_MSB_EXT_A 0x16e558 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_7_LSB 0x168278 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_7_LSB_EXT_A 0x16e55c -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_7_MSB 0x16827c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_7_MSB_EXT_A 0x16e560 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_8_LSB 0x168280 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_8_LSB_EXT_A 0x16e564 -/* [RW 32] The physical queue number associated with each VOQ; queues 63-32 */ -#define QM_REG_VOQQMASK_8_MSB 0x168284 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_8_MSB_EXT_A 0x16e568 -/* [RW 32] The physical queue number associated with each VOQ; queues 31-0 */ -#define QM_REG_VOQQMASK_9_LSB 0x168288 -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_9_LSB_EXT_A 0x16e56c -/* [R 32] NOT USED */ -#define QM_REG_VOQQMASK_9_MSB_EXT_A 0x16e570 -/* [RW 32] Wrr weights. NOTE: weight update is allowed only to queues which - are either empty or paused */ -#define QM_REG_WRRWEIGHTS_0 0x16880c -#define QM_REG_WRRWEIGHTS_1 0x168810 -#define QM_REG_WRRWEIGHTS_10 0x168814 -#define QM_REG_WRRWEIGHTS_11 0x168818 -#define QM_REG_WRRWEIGHTS_12 0x16881c -#define QM_REG_WRRWEIGHTS_13 0x168820 -#define QM_REG_WRRWEIGHTS_14 0x168824 -#define QM_REG_WRRWEIGHTS_15 0x168828 -#define QM_REG_WRRWEIGHTS_16 0x16e000 -#define QM_REG_WRRWEIGHTS_17 0x16e004 -#define QM_REG_WRRWEIGHTS_18 0x16e008 -#define QM_REG_WRRWEIGHTS_19 0x16e00c -#define QM_REG_WRRWEIGHTS_2 0x16882c -#define QM_REG_WRRWEIGHTS_20 0x16e010 -#define QM_REG_WRRWEIGHTS_21 0x16e014 -#define QM_REG_WRRWEIGHTS_22 0x16e018 -#define QM_REG_WRRWEIGHTS_23 0x16e01c -#define QM_REG_WRRWEIGHTS_24 0x16e020 -#define QM_REG_WRRWEIGHTS_25 0x16e024 -#define QM_REG_WRRWEIGHTS_26 0x16e028 -#define QM_REG_WRRWEIGHTS_27 0x16e02c -#define QM_REG_WRRWEIGHTS_28 0x16e030 -#define QM_REG_WRRWEIGHTS_29 0x16e034 -#define QM_REG_WRRWEIGHTS_3 0x168830 -#define QM_REG_WRRWEIGHTS_30 0x16e038 -#define QM_REG_WRRWEIGHTS_31 0x16e03c -#define QM_REG_WRRWEIGHTS_4 0x168834 -#define QM_REG_WRRWEIGHTS_5 0x168838 -#define QM_REG_WRRWEIGHTS_6 0x16883c -#define QM_REG_WRRWEIGHTS_7 0x168840 -#define QM_REG_WRRWEIGHTS_8 0x168844 -#define QM_REG_WRRWEIGHTS_9 0x168848 /* [R 6] Keep the fill level of the fifo from write client 1 */ #define QM_REG_XQM_WRC_FIFOLVL 0x168000 +/* [W 1] reset to parity interrupt */ +#define SEM_FAST_REG_PARITY_RST 0x18840 #define SRC_REG_COUNTFREE0 0x40500 -/* [RW 1] If clr the searcher is compatible to E1 A0 - support only two - ports. If set the searcher support 8 functions. */ -#define SRC_REG_E1HMF_ENABLE 0x404cc #define SRC_REG_FIRSTFREE0 0x40510 #define SRC_REG_KEYRSS0_0 0x40408 #define SRC_REG_KEYRSS0_7 0x40424 -#define SRC_REG_KEYRSS0_9 0x4042c -#define SRC_REG_KEYRSS1_0 0x40430 -#define SRC_REG_KEYRSS1_9 0x40454 #define SRC_REG_KEYSEARCH_0 0x40458 #define SRC_REG_KEYSEARCH_1 0x4045c #define SRC_REG_KEYSEARCH_2 0x40460 @@ -3806,1518 +3009,429 @@ #define SRC_REG_SRC_PRTY_MASK 0x404c8 /* [R 3] Parity register #0 read */ #define SRC_REG_SRC_PRTY_STS 0x404bc -/* [RW 32] Indirect access to AG context with 32-bits granularity. The bits - [11:8] of the address should be the offset within the accessed LCID - context; the bits [7:0] are the accessed LCID.Example: to write to REG10 - LCID100. The RBC address should be 12'ha64. */ -#define TCM_REG_AG_CTX 0x54000 +/* [RC 3] Parity register #0 read clear */ +#define SRC_REG_SRC_PRTY_STS_CLR 0x404c0 /* [R 4] Used to read the value of the XX protection CAM occupancy counter. */ #define TCM_REG_CAM_OCCUP 0x5017c -/* [RW 1] CDU AG read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define TCM_REG_CDU_AG_RD_IFEN 0x50034 -/* [RW 1] CDU AG write Interface enable. If 0 - the request and valid input - are disregarded; all other signals are treated as usual; if 1 - normal - activity. */ -#define TCM_REG_CDU_AG_WR_IFEN 0x50030 -/* [RW 1] CDU STORM read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define TCM_REG_CDU_SM_RD_IFEN 0x5003c -/* [RW 1] CDU STORM write Interface enable. If 0 - the request and valid - input is disregarded; all other signals are treated as usual; if 1 - - normal activity. */ -#define TCM_REG_CDU_SM_WR_IFEN 0x50038 /* [RW 4] CFC output initial credit. Max credit available - 15.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 1 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 1 at start-up. */ #define TCM_REG_CFC_INIT_CRD 0x50204 -/* [RW 3] The weight of the CP input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_CP_WEIGHT 0x500c0 -/* [RW 1] Input csem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define TCM_REG_CSEM_IFEN 0x5002c /* [RC 1] Message length mismatch (relative to last indication) at the In#9 - interface. */ -#define TCM_REG_CSEM_LENGTH_MIS 0x50174 -/* [RW 3] The weight of the input csem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_CSEM_WEIGHT 0x500bc -/* [RW 8] The Event ID in case of ErrorFlg is set in the input message. */ -#define TCM_REG_ERR_EVNT_ID 0x500a0 -/* [RW 28] The CM erroneous header for QM and Timers formatting. */ -#define TCM_REG_ERR_TCM_HDR 0x5009c -/* [RW 8] The Event ID for Timers expiration. */ -#define TCM_REG_EXPR_EVNT_ID 0x500a4 + * interface. */ +#define TCM_REG_CSEM_LENGTH_MIS 0x50174 /* [RW 8] FIC0 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define TCM_REG_FIC0_INIT_CRD 0x5020c /* [RW 8] FIC1 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define TCM_REG_FIC1_INIT_CRD 0x50210 -/* [RW 1] Arbitration between Input Arbiter groups: 0 - fair Round-Robin; 1 - - strict priority defined by ~tcm_registers_gr_ag_pr.gr_ag_pr; - ~tcm_registers_gr_ld0_pr.gr_ld0_pr and - ~tcm_registers_gr_ld1_pr.gr_ld1_pr. */ -#define TCM_REG_GR_ARB_TYPE 0x50114 -/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Store channel is the - compliment of the other 3 groups. */ -#define TCM_REG_GR_LD0_PR 0x5011c -/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Store channel is the - compliment of the other 3 groups. */ -#define TCM_REG_GR_LD1_PR 0x50120 -/* [RW 4] The number of double REG-pairs; loaded from the STORM context and - sent to STORM; for a specific connection type. The double REG-pairs are - used to align to STORM context row size of 128 bits. The offset of these - data in the STORM context is always 0. Index _i stands for the connection - type (one of 16). */ -#define TCM_REG_N_SM_CTX_LD_0 0x50050 -#define TCM_REG_N_SM_CTX_LD_1 0x50054 -#define TCM_REG_N_SM_CTX_LD_2 0x50058 -#define TCM_REG_N_SM_CTX_LD_3 0x5005c -#define TCM_REG_N_SM_CTX_LD_4 0x50060 -#define TCM_REG_N_SM_CTX_LD_5 0x50064 -/* [RW 1] Input pbf Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_PBF_IFEN 0x50024 /* [RC 1] Message length mismatch (relative to last indication) at the In#7 - interface. */ + * interface. */ #define TCM_REG_PBF_LENGTH_MIS 0x5016c -/* [RW 3] The weight of the input pbf in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_PBF_WEIGHT 0x500b4 -#define TCM_REG_PHYS_QNUM0_0 0x500e0 -#define TCM_REG_PHYS_QNUM0_1 0x500e4 -#define TCM_REG_PHYS_QNUM1_0 0x500e8 -#define TCM_REG_PHYS_QNUM1_1 0x500ec -#define TCM_REG_PHYS_QNUM2_0 0x500f0 -#define TCM_REG_PHYS_QNUM2_1 0x500f4 -#define TCM_REG_PHYS_QNUM3_0 0x500f8 -#define TCM_REG_PHYS_QNUM3_1 0x500fc /* [RW 1] Input prs Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ + * acknowledge output is deasserted; all other signals are treated as usual; + * if 1 - normal activity. */ #define TCM_REG_PRS_IFEN 0x50020 /* [RC 1] Message length mismatch (relative to last indication) at the In#6 - interface. */ + * interface. */ #define TCM_REG_PRS_LENGTH_MIS 0x50168 -/* [RW 3] The weight of the input prs in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_PRS_WEIGHT 0x500b0 -/* [RW 8] The Event ID for Timers formatting in case of stop done. */ -#define TCM_REG_STOP_EVNT_ID 0x500a8 /* [RC 1] Message length mismatch (relative to last indication) at the STORM - interface. */ + * interface. */ #define TCM_REG_STORM_LENGTH_MIS 0x50160 -/* [RW 1] STORM - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define TCM_REG_STORM_TCM_IFEN 0x50010 -/* [RW 3] The weight of the STORM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_STORM_WEIGHT 0x500ac -/* [RW 1] CM - CFC Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TCM_CFC_IFEN 0x50040 /* [RW 11] Interrupt mask register #0 read/write */ #define TCM_REG_TCM_INT_MASK 0x501dc /* [R 11] Interrupt register #0 read */ #define TCM_REG_TCM_INT_STS 0x501d0 +/* [RW 27] Parity mask register #0 read/write */ +#define TCM_REG_TCM_PRTY_MASK 0x501ec /* [R 27] Parity register #0 read */ #define TCM_REG_TCM_PRTY_STS 0x501e0 -/* [RW 3] The size of AG context region 0 in REG-pairs. Designates the MS - REG-pair number (e.g. if region 0 is 6 REG-pairs; the value should be 5). - Is used to determine the number of the AG context REG-pairs written back; - when the input message Reg1WbFlg isn't set. */ -#define TCM_REG_TCM_REG0_SZ 0x500d8 -/* [RW 1] CM - STORM 0 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TCM_STORM0_IFEN 0x50004 -/* [RW 1] CM - STORM 1 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TCM_STORM1_IFEN 0x50008 -/* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TCM_TQM_IFEN 0x5000c -/* [RW 1] If set the Q index; received from the QM is inserted to event ID. */ -#define TCM_REG_TCM_TQM_USE_Q 0x500d4 -/* [RW 28] The CM header for Timers expiration command. */ -#define TCM_REG_TM_TCM_HDR 0x50098 -/* [RW 1] Timers - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define TCM_REG_TM_TCM_IFEN 0x5001c -/* [RW 3] The weight of the Timers input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_TM_WEIGHT 0x500d0 +/* [RC 27] Parity register #0 read clear */ +#define TCM_REG_TCM_PRTY_STS_CLR 0x501e4 /* [RW 6] QM output initial credit. Max credit available - 32.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 32 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 32 at start-up. */ #define TCM_REG_TQM_INIT_CRD 0x5021c -/* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_TQM_P_WEIGHT 0x500c8 -/* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_TQM_S_WEIGHT 0x500cc -/* [RW 28] The CM header value for QM request (primary). */ -#define TCM_REG_TQM_TCM_HDR_P 0x50090 -/* [RW 28] The CM header value for QM request (secondary). */ -#define TCM_REG_TQM_TCM_HDR_S 0x50094 -/* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TQM_TCM_IFEN 0x50014 -/* [RW 1] Input SDM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define TCM_REG_TSDM_IFEN 0x50018 /* [RC 1] Message length mismatch (relative to last indication) at the SDM - interface. */ -#define TCM_REG_TSDM_LENGTH_MIS 0x50164 -/* [RW 3] The weight of the SDM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_TSDM_WEIGHT 0x500c4 -/* [RW 1] Input usem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define TCM_REG_USEM_IFEN 0x50028 + * interface. */ +#define TCM_REG_TSDM_LENGTH_MIS 0x50164 /* [RC 1] Message length mismatch (relative to last indication) at the In#8 - interface. */ -#define TCM_REG_USEM_LENGTH_MIS 0x50170 -/* [RW 3] The weight of the input usem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define TCM_REG_USEM_WEIGHT 0x500b8 + * interface. */ +#define TCM_REG_USEM_LENGTH_MIS 0x50170 /* [RW 21] Indirect access to the descriptor table of the XX protection - mechanism. The fields are: [5:0] - length of the message; 15:6] - message - pointer; 20:16] - next pointer. */ + * mechanism. The fields are: [5:0] - length of the message; 15:6] - message + * pointer; 20:16] - next pointer. */ #define TCM_REG_XX_DESCR_TABLE 0x50280 -#define TCM_REG_XX_DESCR_TABLE_SIZE 32 +#define TCM_REG_XX_DESCR_TABLE_SIZE 29 /* [R 6] Use to read the value of XX protection Free counter. */ -#define TCM_REG_XX_FREE 0x50178 -/* [RW 6] Initial value for the credit counter; responsible for fulfilling - of the Input Stage XX protection buffer by the XX protection pending - messages. Max credit available - 127.Write writes the initial credit - value; read returns the current value of the credit counter. Must be - initialized to 19 at start-up. */ -#define TCM_REG_XX_INIT_CRD 0x50220 -/* [RW 6] Maximum link list size (messages locked) per connection in the XX - protection. */ -#define TCM_REG_XX_MAX_LL_SZ 0x50044 -/* [RW 6] The maximum number of pending messages; which may be stored in XX - protection. ~tcm_registers_xx_free.xx_free is also written on write. */ -#define TCM_REG_XX_MSG_NUM 0x50224 -/* [RW 8] The Event ID; sent to the STORM in case of XX overflow. */ -#define TCM_REG_XX_OVFL_EVNT_ID 0x50048 -/* [RW 16] Indirect access to the XX table of the XX protection mechanism. - The fields are:[4:0] - tail pointer; [10:5] - Link List size; 15:11] - - header pointer. */ -#define TCM_REG_XX_TABLE 0x50240 -/* [RW 4] Load value for for cfc ac credit cnt. */ -#define TM_REG_CFC_AC_CRDCNT_VAL 0x164208 -/* [RW 4] Load value for cfc cld credit cnt. */ -#define TM_REG_CFC_CLD_CRDCNT_VAL 0x164210 -/* [RW 8] Client0 context region. */ -#define TM_REG_CL0_CONT_REGION 0x164030 -/* [RW 8] Client1 context region. */ -#define TM_REG_CL1_CONT_REGION 0x164034 -/* [RW 8] Client2 context region. */ -#define TM_REG_CL2_CONT_REGION 0x164038 -/* [RW 2] Client in High priority client number. */ -#define TM_REG_CLIN_PRIOR0_CLIENT 0x164024 -/* [RW 4] Load value for clout0 cred cnt. */ -#define TM_REG_CLOUT_CRDCNT0_VAL 0x164220 -/* [RW 4] Load value for clout1 cred cnt. */ -#define TM_REG_CLOUT_CRDCNT1_VAL 0x164228 -/* [RW 4] Load value for clout2 cred cnt. */ -#define TM_REG_CLOUT_CRDCNT2_VAL 0x164230 -/* [RW 1] Enable client0 input. */ -#define TM_REG_EN_CL0_INPUT 0x164008 -/* [RW 1] Enable client1 input. */ -#define TM_REG_EN_CL1_INPUT 0x16400c -/* [RW 1] Enable client2 input. */ -#define TM_REG_EN_CL2_INPUT 0x164010 -#define TM_REG_EN_LINEAR0_TIMER 0x164014 -/* [RW 1] Enable real time counter. */ -#define TM_REG_EN_REAL_TIME_CNT 0x1640d8 -/* [RW 1] Enable for Timers state machines. */ -#define TM_REG_EN_TIMERS 0x164000 -/* [RW 4] Load value for expiration credit cnt. CFC max number of - outstanding load requests for timers (expiration) context loading. */ -#define TM_REG_EXP_CRDCNT_VAL 0x164238 -/* [RW 32] Linear0 logic address. */ -#define TM_REG_LIN0_LOGIC_ADDR 0x164240 +#define TCM_REG_XX_FREE 0x50178 +#define TM_REG_EN_LINEAR0_TIMER 0x164014 /* [RW 18] Linear0 Max active cid (in banks of 32 entries). */ #define TM_REG_LIN0_MAX_ACTIVE_CID 0x164048 /* [ST 16] Linear0 Number of scans counter. */ #define TM_REG_LIN0_NUM_SCANS 0x1640a0 -/* [WB 64] Linear0 phy address. */ -#define TM_REG_LIN0_PHY_ADDR 0x164270 -/* [RW 1] Linear0 physical address valid. */ -#define TM_REG_LIN0_PHY_ADDR_VALID 0x164248 #define TM_REG_LIN0_SCAN_ON 0x1640d0 /* [RW 24] Linear0 array scan timeout. */ #define TM_REG_LIN0_SCAN_TIME 0x16403c #define TM_REG_LIN0_VNIC_UC 0x164128 -/* [RW 32] Linear1 logic address. */ -#define TM_REG_LIN1_LOGIC_ADDR 0x164250 -/* [WB 64] Linear1 phy address. */ -#define TM_REG_LIN1_PHY_ADDR 0x164280 -/* [RW 1] Linear1 physical address valid. */ -#define TM_REG_LIN1_PHY_ADDR_VALID 0x164258 -/* [RW 6] Linear timer set_clear fifo threshold. */ -#define TM_REG_LIN_SETCLR_FIFO_ALFULL_THR 0x164070 -/* [RW 2] Load value for pci arbiter credit cnt. */ -#define TM_REG_PCIARB_CRDCNT_VAL 0x164260 -/* [RW 20] The amount of hardware cycles for each timer tick. */ -#define TM_REG_TIMER_TICK_SIZE 0x16401c -/* [RW 8] Timers Context region. */ -#define TM_REG_TM_CONTEXT_REGION 0x164044 /* [RW 1] Interrupt mask register #0 read/write */ #define TM_REG_TM_INT_MASK 0x1640fc /* [R 1] Interrupt register #0 read */ #define TM_REG_TM_INT_STS 0x1640f0 -/* [RW 8] The event id for aggregated interrupt 0 */ -#define TSDM_REG_AGG_INT_EVENT_0 0x42038 -#define TSDM_REG_AGG_INT_EVENT_1 0x4203c -/* [RW 1] The T bit for aggregated interrupt 0 */ -#define TSDM_REG_AGG_INT_T_0 0x420b8 -#define TSDM_REG_AGG_INT_T_1 0x420bc -/* [RW 14] The start address in the internal RAM for the cfc_rsp lcid */ -#define TSDM_REG_CFC_RSP_START_ADDR 0x42008 -/* [RW 16] The maximum value of the competion counter #0 */ -#define TSDM_REG_CMP_COUNTER_MAX0 0x4201c -/* [RW 16] The maximum value of the competion counter #1 */ -#define TSDM_REG_CMP_COUNTER_MAX1 0x42020 -/* [RW 16] The maximum value of the competion counter #2 */ -#define TSDM_REG_CMP_COUNTER_MAX2 0x42024 -/* [RW 16] The maximum value of the competion counter #3 */ -#define TSDM_REG_CMP_COUNTER_MAX3 0x42028 -/* [RW 16] The maximum value of the competion counter #4 */ -#define TSDM_REG_CMP_COUNTER_MAX4 0x422c0 -/* [RW 16] The maximum value of the competion counter #5 */ -#define TSDM_REG_CMP_COUNTER_MAX5 0x422c4 -/* [RW 16] The maximum value of the competion counter #6 */ -#define TSDM_REG_CMP_COUNTER_MAX6 0x422c8 -/* [RW 16] The maximum value of the competion counter #7 */ -#define TSDM_REG_CMP_COUNTER_MAX7 0x422cc -/* [RW 14] The start address in the internal RAM for the completion - counters. */ -#define TSDM_REG_CMP_COUNTER_START_ADDR 0x4200c +/* [RW 7] Parity mask register #0 read/write */ +#define TM_REG_TM_PRTY_MASK 0x16410c +/* [RC 7] Parity register #0 read clear */ +#define TM_REG_TM_PRTY_STS_CLR 0x164104 #define TSDM_REG_ENABLE_IN1 0x42238 -#define TSDM_REG_ENABLE_IN2 0x4223c -#define TSDM_REG_ENABLE_OUT1 0x42240 -#define TSDM_REG_ENABLE_OUT2 0x42244 -/* [RW 4] The initial number of messages that can be sent to the pxp control - interface without receiving any ACK. */ -#define TSDM_REG_INIT_CREDIT_PXP_CTRL 0x424bc -/* [ST 32] The number of ACK after placement messages received */ -#define TSDM_REG_NUM_OF_ACK_AFTER_PLACE 0x4227c -/* [ST 32] The number of packet end messages received from the parser */ -#define TSDM_REG_NUM_OF_PKT_END_MSG 0x42274 -/* [ST 32] The number of requests received from the pxp async if */ -#define TSDM_REG_NUM_OF_PXP_ASYNC_REQ 0x42278 -/* [ST 32] The number of commands received in queue 0 */ -#define TSDM_REG_NUM_OF_Q0_CMD 0x42248 -/* [ST 32] The number of commands received in queue 10 */ -#define TSDM_REG_NUM_OF_Q10_CMD 0x4226c -/* [ST 32] The number of commands received in queue 11 */ -#define TSDM_REG_NUM_OF_Q11_CMD 0x42270 -/* [ST 32] The number of commands received in queue 1 */ -#define TSDM_REG_NUM_OF_Q1_CMD 0x4224c -/* [ST 32] The number of commands received in queue 3 */ -#define TSDM_REG_NUM_OF_Q3_CMD 0x42250 -/* [ST 32] The number of commands received in queue 4 */ -#define TSDM_REG_NUM_OF_Q4_CMD 0x42254 -/* [ST 32] The number of commands received in queue 5 */ -#define TSDM_REG_NUM_OF_Q5_CMD 0x42258 -/* [ST 32] The number of commands received in queue 6 */ -#define TSDM_REG_NUM_OF_Q6_CMD 0x4225c -/* [ST 32] The number of commands received in queue 7 */ -#define TSDM_REG_NUM_OF_Q7_CMD 0x42260 -/* [ST 32] The number of commands received in queue 8 */ -#define TSDM_REG_NUM_OF_Q8_CMD 0x42264 -/* [ST 32] The number of commands received in queue 9 */ -#define TSDM_REG_NUM_OF_Q9_CMD 0x42268 -/* [RW 14] The start address in the internal RAM for the packet end message */ -#define TSDM_REG_PCK_END_MSG_START_ADDR 0x42014 -/* [RW 14] The start address in the internal RAM for queue counters */ -#define TSDM_REG_Q_COUNTER_START_ADDR 0x42010 /* [R 1] pxp_ctrl rd_data fifo empty in sdm_dma_rsp block */ #define TSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY 0x42548 /* [R 1] parser fifo empty in sdm_sync block */ #define TSDM_REG_SYNC_PARSER_EMPTY 0x42550 /* [R 1] parser serial fifo empty in sdm_sync block */ #define TSDM_REG_SYNC_SYNC_EMPTY 0x42558 -/* [RW 32] Tick for timer counter. Applicable only when - ~tsdm_registers_timer_tick_enable.timer_tick_enable =1 */ -#define TSDM_REG_TIMER_TICK 0x42000 /* [RW 32] Interrupt mask register #0 read/write */ #define TSDM_REG_TSDM_INT_MASK_0 0x4229c #define TSDM_REG_TSDM_INT_MASK_1 0x422ac /* [R 32] Interrupt register #0 read */ -#define TSDM_REG_TSDM_INT_STS_0 0x42290 -#define TSDM_REG_TSDM_INT_STS_1 0x422a0 +#define TSDM_REG_TSDM_INT_STS_0 0x42290 +#define TSDM_REG_TSDM_INT_STS_1 0x422a0 /* [RW 11] Parity mask register #0 read/write */ -#define TSDM_REG_TSDM_PRTY_MASK 0x422bc +#define TSDM_REG_TSDM_PRTY_MASK 0x422bc /* [R 11] Parity register #0 read */ #define TSDM_REG_TSDM_PRTY_STS 0x422b0 -/* [RW 5] The number of time_slots in the arbitration cycle */ -#define TSEM_REG_ARB_CYCLE_SIZE 0x180034 -/* [RW 3] The source that is associated with arbitration element 0. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2 */ -#define TSEM_REG_ARB_ELEMENT0 0x180020 -/* [RW 3] The source that is associated with arbitration element 1. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~tsem_registers_arb_element0.arb_element0 */ -#define TSEM_REG_ARB_ELEMENT1 0x180024 -/* [RW 3] The source that is associated with arbitration element 2. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~tsem_registers_arb_element0.arb_element0 - and ~tsem_registers_arb_element1.arb_element1 */ -#define TSEM_REG_ARB_ELEMENT2 0x180028 -/* [RW 3] The source that is associated with arbitration element 3. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2.Could - not be equal to register ~tsem_registers_arb_element0.arb_element0 and - ~tsem_registers_arb_element1.arb_element1 and - ~tsem_registers_arb_element2.arb_element2 */ -#define TSEM_REG_ARB_ELEMENT3 0x18002c -/* [RW 3] The source that is associated with arbitration element 4. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~tsem_registers_arb_element0.arb_element0 - and ~tsem_registers_arb_element1.arb_element1 and - ~tsem_registers_arb_element2.arb_element2 and - ~tsem_registers_arb_element3.arb_element3 */ -#define TSEM_REG_ARB_ELEMENT4 0x180030 -#define TSEM_REG_ENABLE_IN 0x1800a4 -#define TSEM_REG_ENABLE_OUT 0x1800a8 +/* [RC 11] Parity register #0 read clear */ +#define TSDM_REG_TSDM_PRTY_STS_CLR 0x422b4 /* [RW 32] This address space contains all registers and memories that are - placed in SEM_FAST block. The SEM_FAST registers are described in - appendix B. In order to access the SEM_FAST registers the base address - TSEM_REGISTERS_FAST_MEMORY (Offset: 0x1a0000) should be added to each - SEM_FAST register offset. */ + * placed in SEM_FAST block. The SEM_FAST registers are described in + * appendix B. In order to access the SEM_FAST registers the base address + * TSEM_REGISTERS_FAST_MEMORY (Offset: 0x1a0000) should be added to each + * SEM_FAST register offset. */ #define TSEM_REG_FAST_MEMORY 0x1a0000 -/* [RW 1] Disables input messages from FIC0 May be updated during run_time - by the microcode */ -#define TSEM_REG_FIC0_DISABLE 0x180224 -/* [RW 1] Disables input messages from FIC1 May be updated during run_time - by the microcode */ -#define TSEM_REG_FIC1_DISABLE 0x180234 /* [RW 15] Interrupt table Read and write access to it is not possible in - the middle of the work */ + * the middle of the work */ #define TSEM_REG_INT_TABLE 0x180400 -/* [ST 24] Statistics register. The number of messages that entered through - FIC0 */ -#define TSEM_REG_MSG_NUM_FIC0 0x180000 -/* [ST 24] Statistics register. The number of messages that entered through - FIC1 */ -#define TSEM_REG_MSG_NUM_FIC1 0x180004 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC0 */ -#define TSEM_REG_MSG_NUM_FOC0 0x180008 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC1 */ -#define TSEM_REG_MSG_NUM_FOC1 0x18000c -/* [ST 24] Statistics register. The number of messages that were sent to - FOC2 */ -#define TSEM_REG_MSG_NUM_FOC2 0x180010 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC3 */ -#define TSEM_REG_MSG_NUM_FOC3 0x180014 -/* [RW 1] Disables input messages from the passive buffer May be updated - during run_time by the microcode */ -#define TSEM_REG_PAS_DISABLE 0x18024c /* [WB 128] Debug only. Passive buffer memory */ -#define TSEM_REG_PASSIVE_BUFFER 0x181000 +#define TSEM_REG_PASSIVE_BUFFER 0x181000 /* [WB 46] pram memory. B45 is parity; b[44:0] - data. */ #define TSEM_REG_PRAM 0x1c0000 -/* [R 8] Valid sleeping threads indication have bit per thread */ +/* [R 20] Valid sleeping threads indication have bit per thread */ #define TSEM_REG_SLEEP_THREADS_VALID 0x18026c /* [R 1] EXT_STORE FIFO is empty in sem_slow_ls_ext */ #define TSEM_REG_SLOW_EXT_STORE_EMPTY 0x1802a0 -/* [RW 8] List of free threads . There is a bit per thread. */ -#define TSEM_REG_THREADS_LIST 0x1802e4 -/* [RW 3] The arbitration scheme of time_slot 0 */ -#define TSEM_REG_TS_0_AS 0x180038 -/* [RW 3] The arbitration scheme of time_slot 10 */ -#define TSEM_REG_TS_10_AS 0x180060 -/* [RW 3] The arbitration scheme of time_slot 11 */ -#define TSEM_REG_TS_11_AS 0x180064 -/* [RW 3] The arbitration scheme of time_slot 12 */ -#define TSEM_REG_TS_12_AS 0x180068 -/* [RW 3] The arbitration scheme of time_slot 13 */ -#define TSEM_REG_TS_13_AS 0x18006c -/* [RW 3] The arbitration scheme of time_slot 14 */ -#define TSEM_REG_TS_14_AS 0x180070 -/* [RW 3] The arbitration scheme of time_slot 15 */ -#define TSEM_REG_TS_15_AS 0x180074 -/* [RW 3] The arbitration scheme of time_slot 16 */ -#define TSEM_REG_TS_16_AS 0x180078 -/* [RW 3] The arbitration scheme of time_slot 17 */ -#define TSEM_REG_TS_17_AS 0x18007c -/* [RW 3] The arbitration scheme of time_slot 18 */ -#define TSEM_REG_TS_18_AS 0x180080 -/* [RW 3] The arbitration scheme of time_slot 1 */ -#define TSEM_REG_TS_1_AS 0x18003c -/* [RW 3] The arbitration scheme of time_slot 2 */ -#define TSEM_REG_TS_2_AS 0x180040 -/* [RW 3] The arbitration scheme of time_slot 3 */ -#define TSEM_REG_TS_3_AS 0x180044 -/* [RW 3] The arbitration scheme of time_slot 4 */ -#define TSEM_REG_TS_4_AS 0x180048 -/* [RW 3] The arbitration scheme of time_slot 5 */ -#define TSEM_REG_TS_5_AS 0x18004c -/* [RW 3] The arbitration scheme of time_slot 6 */ -#define TSEM_REG_TS_6_AS 0x180050 -/* [RW 3] The arbitration scheme of time_slot 7 */ -#define TSEM_REG_TS_7_AS 0x180054 -/* [RW 3] The arbitration scheme of time_slot 8 */ -#define TSEM_REG_TS_8_AS 0x180058 -/* [RW 3] The arbitration scheme of time_slot 9 */ -#define TSEM_REG_TS_9_AS 0x18005c /* [RW 32] Interrupt mask register #0 read/write */ #define TSEM_REG_TSEM_INT_MASK_0 0x180100 #define TSEM_REG_TSEM_INT_MASK_1 0x180110 /* [R 32] Interrupt register #0 read */ -#define TSEM_REG_TSEM_INT_STS_0 0x1800f4 -#define TSEM_REG_TSEM_INT_STS_1 0x180104 +#define TSEM_REG_TSEM_INT_STS_0 0x1800f4 +#define TSEM_REG_TSEM_INT_STS_1 0x180104 /* [RW 32] Parity mask register #0 read/write */ #define TSEM_REG_TSEM_PRTY_MASK_0 0x180120 #define TSEM_REG_TSEM_PRTY_MASK_1 0x180130 /* [R 32] Parity register #0 read */ #define TSEM_REG_TSEM_PRTY_STS_0 0x180114 #define TSEM_REG_TSEM_PRTY_STS_1 0x180124 +/* [RC 32] Parity register #0 read clear */ +#define TSEM_REG_TSEM_PRTY_STS_CLR_0 0x180118 +#define TSEM_REG_TSEM_PRTY_STS_CLR_1 0x180128 /* [W 7] VF or PF ID for reset error bit. Values 0-63 reset error bit for 64 - VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ + * VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ #define TSEM_REG_VFPF_ERR_NUM 0x180380 -/* [RW 32] Indirect access to AG context with 32-bits granularity. The bits - [10:8] of the address should be the offset within the accessed LCID - context; the bits [7:0] are the accessed LCID.Example: to write to REG10 - LCID100. The RBC address should be 12'ha64. */ -#define UCM_REG_AG_CTX 0xe2000 /* [R 5] Used to read the XX protection CAM occupancy counter. */ #define UCM_REG_CAM_OCCUP 0xe0170 -/* [RW 1] CDU AG read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define UCM_REG_CDU_AG_RD_IFEN 0xe0038 -/* [RW 1] CDU AG write Interface enable. If 0 - the request and valid input - are disregarded; all other signals are treated as usual; if 1 - normal - activity. */ -#define UCM_REG_CDU_AG_WR_IFEN 0xe0034 -/* [RW 1] CDU STORM read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define UCM_REG_CDU_SM_RD_IFEN 0xe0040 -/* [RW 1] CDU STORM write Interface enable. If 0 - the request and valid - input is disregarded; all other signals are treated as usual; if 1 - - normal activity. */ -#define UCM_REG_CDU_SM_WR_IFEN 0xe003c /* [RW 4] CFC output initial credit. Max credit available - 15.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 1 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 1 at start-up. */ #define UCM_REG_CFC_INIT_CRD 0xe0204 -/* [RW 3] The weight of the CP input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_CP_WEIGHT 0xe00c4 -/* [RW 1] Input csem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_CSEM_IFEN 0xe0028 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the csem interface is detected. */ -#define UCM_REG_CSEM_LENGTH_MIS 0xe0160 -/* [RW 3] The weight of the input csem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_CSEM_WEIGHT 0xe00b8 -/* [RW 1] Input dorq Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_DORQ_IFEN 0xe0030 + * at the csem interface is detected. */ +#define UCM_REG_CSEM_LENGTH_MIS 0xe0160 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the dorq interface is detected. */ -#define UCM_REG_DORQ_LENGTH_MIS 0xe0168 -/* [RW 3] The weight of the input dorq in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_DORQ_WEIGHT 0xe00c0 -/* [RW 8] The Event ID in case ErrorFlg input message bit is set. */ -#define UCM_REG_ERR_EVNT_ID 0xe00a4 -/* [RW 28] The CM erroneous header for QM and Timers formatting. */ -#define UCM_REG_ERR_UCM_HDR 0xe00a0 -/* [RW 8] The Event ID for Timers expiration. */ -#define UCM_REG_EXPR_EVNT_ID 0xe00a8 + * at the dorq interface is detected. */ +#define UCM_REG_DORQ_LENGTH_MIS 0xe0168 /* [RW 8] FIC0 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define UCM_REG_FIC0_INIT_CRD 0xe020c /* [RW 8] FIC1 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define UCM_REG_FIC1_INIT_CRD 0xe0210 -/* [RW 1] Arbitration between Input Arbiter groups: 0 - fair Round-Robin; 1 - - strict priority defined by ~ucm_registers_gr_ag_pr.gr_ag_pr; - ~ucm_registers_gr_ld0_pr.gr_ld0_pr and - ~ucm_registers_gr_ld1_pr.gr_ld1_pr. */ -#define UCM_REG_GR_ARB_TYPE 0xe0144 -/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Store channel group is - compliment to the others. */ -#define UCM_REG_GR_LD0_PR 0xe014c -/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Store channel group is - compliment to the others. */ -#define UCM_REG_GR_LD1_PR 0xe0150 -/* [RW 5] The number of double REG-pairs; loaded from the STORM context and - sent to STORM; for a specific connection type. the double REG-pairs are - used in order to align to STORM context row size of 128 bits. The offset - of these data in the STORM context is always 0. Index _i stands for the - connection type (one of 16). */ -#define UCM_REG_N_SM_CTX_LD_0 0xe0054 -#define UCM_REG_N_SM_CTX_LD_1 0xe0058 -#define UCM_REG_N_SM_CTX_LD_2 0xe005c -#define UCM_REG_N_SM_CTX_LD_3 0xe0060 -#define UCM_REG_N_SM_CTX_LD_4 0xe0064 -#define UCM_REG_N_SM_CTX_LD_5 0xe0068 -#define UCM_REG_PHYS_QNUM0_0 0xe0110 -#define UCM_REG_PHYS_QNUM0_1 0xe0114 -#define UCM_REG_PHYS_QNUM1_0 0xe0118 -#define UCM_REG_PHYS_QNUM1_1 0xe011c -#define UCM_REG_PHYS_QNUM2_0 0xe0120 -#define UCM_REG_PHYS_QNUM2_1 0xe0124 -#define UCM_REG_PHYS_QNUM3_0 0xe0128 -#define UCM_REG_PHYS_QNUM3_1 0xe012c -/* [RW 8] The Event ID for Timers formatting in case of stop done. */ -#define UCM_REG_STOP_EVNT_ID 0xe00ac /* [RC 1] Set when the message length mismatch (relative to last indication) - at the STORM interface is detected. */ + * at the STORM interface is detected. */ #define UCM_REG_STORM_LENGTH_MIS 0xe0154 -/* [RW 1] STORM - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_STORM_UCM_IFEN 0xe0010 -/* [RW 3] The weight of the STORM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_STORM_WEIGHT 0xe00b0 /* [RW 4] Timers output initial credit. Max credit available - 15.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 4 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 4 at start-up. */ #define UCM_REG_TM_INIT_CRD 0xe021c -/* [RW 28] The CM header for Timers expiration command. */ -#define UCM_REG_TM_UCM_HDR 0xe009c -/* [RW 1] Timers - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_TM_UCM_IFEN 0xe001c -/* [RW 3] The weight of the Timers input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_TM_WEIGHT 0xe00d4 -/* [RW 1] Input tsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_TSEM_IFEN 0xe0024 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the tsem interface is detected. */ -#define UCM_REG_TSEM_LENGTH_MIS 0xe015c -/* [RW 3] The weight of the input tsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_TSEM_WEIGHT 0xe00b4 -/* [RW 1] CM - CFC Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UCM_CFC_IFEN 0xe0044 + * at the tsem interface is detected. */ +#define UCM_REG_TSEM_LENGTH_MIS 0xe015c /* [RW 11] Interrupt mask register #0 read/write */ #define UCM_REG_UCM_INT_MASK 0xe01d4 /* [R 11] Interrupt register #0 read */ #define UCM_REG_UCM_INT_STS 0xe01c8 +/* [RW 27] Parity mask register #0 read/write */ +#define UCM_REG_UCM_PRTY_MASK 0xe01e4 /* [R 27] Parity register #0 read */ #define UCM_REG_UCM_PRTY_STS 0xe01d8 -/* [RW 2] The size of AG context region 0 in REG-pairs. Designates the MS - REG-pair number (e.g. if region 0 is 6 REG-pairs; the value should be 5). - Is used to determine the number of the AG context REG-pairs written back; - when the Reg1WbFlg isn't set. */ -#define UCM_REG_UCM_REG0_SZ 0xe00dc -/* [RW 1] CM - STORM 0 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UCM_STORM0_IFEN 0xe0004 -/* [RW 1] CM - STORM 1 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UCM_STORM1_IFEN 0xe0008 -/* [RW 1] CM - Timers Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_UCM_TM_IFEN 0xe0020 -/* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UCM_UQM_IFEN 0xe000c -/* [RW 1] If set the Q index; received from the QM is inserted to event ID. */ -#define UCM_REG_UCM_UQM_USE_Q 0xe00d8 +/* [RC 27] Parity register #0 read clear */ +#define UCM_REG_UCM_PRTY_STS_CLR 0xe01dc /* [RW 6] QM output initial credit. Max credit available - 32.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 32 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 32 at start-up. */ #define UCM_REG_UQM_INIT_CRD 0xe0220 -/* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_UQM_P_WEIGHT 0xe00cc -/* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_UQM_S_WEIGHT 0xe00d0 -/* [RW 28] The CM header value for QM request (primary). */ -#define UCM_REG_UQM_UCM_HDR_P 0xe0094 -/* [RW 28] The CM header value for QM request (secondary). */ -#define UCM_REG_UQM_UCM_HDR_S 0xe0098 -/* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_UQM_UCM_IFEN 0xe0014 -/* [RW 1] Input SDM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define UCM_REG_USDM_IFEN 0xe0018 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the SDM interface is detected. */ -#define UCM_REG_USDM_LENGTH_MIS 0xe0158 -/* [RW 3] The weight of the SDM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_USDM_WEIGHT 0xe00c8 -/* [RW 1] Input xsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define UCM_REG_XSEM_IFEN 0xe002c + * at the SDM interface is detected. */ +#define UCM_REG_USDM_LENGTH_MIS 0xe0158 /* [RC 1] Set when the message length mismatch (relative to last indication) - at the xsem interface isdetected. */ -#define UCM_REG_XSEM_LENGTH_MIS 0xe0164 -/* [RW 3] The weight of the input xsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define UCM_REG_XSEM_WEIGHT 0xe00bc + * at the xsem interface isdetected. */ +#define UCM_REG_XSEM_LENGTH_MIS 0xe0164 /* [RW 20] Indirect access to the descriptor table of the XX protection - mechanism. The fields are:[5:0] - message length; 14:6] - message - pointer; 19:15] - next pointer. */ + * mechanism. The fields are:[5:0] - message length; 14:6] - message + * pointer; 19:15] - next pointer. */ #define UCM_REG_XX_DESCR_TABLE 0xe0280 -#define UCM_REG_XX_DESCR_TABLE_SIZE 32 +#define UCM_REG_XX_DESCR_TABLE_SIZE 27 /* [R 6] Use to read the XX protection Free counter. */ -#define UCM_REG_XX_FREE 0xe016c -/* [RW 6] Initial value for the credit counter; responsible for fulfilling - of the Input Stage XX protection buffer by the XX protection pending - messages. Write writes the initial credit value; read returns the current - value of the credit counter. Must be initialized to 12 at start-up. */ -#define UCM_REG_XX_INIT_CRD 0xe0224 -/* [RW 6] The maximum number of pending messages; which may be stored in XX - protection. ~ucm_registers_xx_free.xx_free is also written on write. */ -#define UCM_REG_XX_MSG_NUM 0xe0228 -/* [RW 8] The Event ID; sent to the STORM in case of XX overflow. */ -#define UCM_REG_XX_OVFL_EVNT_ID 0xe004c -/* [RW 16] Indirect access to the XX table of the XX protection mechanism. - The fields are: [4:0] - tail pointer; 10:5] - Link List size; 15:11] - - header pointer. */ -#define UCM_REG_XX_TABLE 0xe0300 -/* [RW 8] The event id for aggregated interrupt 0 */ -#define USDM_REG_AGG_INT_EVENT_0 0xc4038 -#define USDM_REG_AGG_INT_EVENT_1 0xc403c -#define USDM_REG_AGG_INT_EVENT_2 0xc4040 -#define USDM_REG_AGG_INT_EVENT_4 0xc4048 -#define USDM_REG_AGG_INT_EVENT_5 0xc404c -#define USDM_REG_AGG_INT_EVENT_6 0xc4050 -/* [RW 1] For each aggregated interrupt index whether the mode is normal (0) - or auto-mask-mode (1) */ -#define USDM_REG_AGG_INT_MODE_0 0xc41b8 -#define USDM_REG_AGG_INT_MODE_1 0xc41bc -#define USDM_REG_AGG_INT_MODE_4 0xc41c8 -#define USDM_REG_AGG_INT_MODE_5 0xc41cc -#define USDM_REG_AGG_INT_MODE_6 0xc41d0 -/* [RW 1] The T bit for aggregated interrupt 5 */ -#define USDM_REG_AGG_INT_T_5 0xc40cc -#define USDM_REG_AGG_INT_T_6 0xc40d0 -/* [RW 14] The start address in the internal RAM for the cfc_rsp lcid */ -#define USDM_REG_CFC_RSP_START_ADDR 0xc4008 -/* [RW 16] The maximum value of the competion counter #0 */ -#define USDM_REG_CMP_COUNTER_MAX0 0xc401c -/* [RW 16] The maximum value of the competion counter #1 */ -#define USDM_REG_CMP_COUNTER_MAX1 0xc4020 -/* [RW 16] The maximum value of the competion counter #2 */ -#define USDM_REG_CMP_COUNTER_MAX2 0xc4024 -/* [RW 16] The maximum value of the competion counter #3 */ -#define USDM_REG_CMP_COUNTER_MAX3 0xc4028 -/* [RW 16] The maximum value of the competion counter #4 */ -#define USDM_REG_CMP_COUNTER_MAX4 0xc42d8 -/* [RW 16] The maximum value of the competion counter #5 */ -#define USDM_REG_CMP_COUNTER_MAX5 0xc42dc -/* [RW 16] The maximum value of the competion counter #6 */ -#define USDM_REG_CMP_COUNTER_MAX6 0xc42e0 -/* [RW 16] The maximum value of the competion counter #7 */ -#define USDM_REG_CMP_COUNTER_MAX7 0xc42e4 -/* [RW 14] The start address in the internal RAM for the completion - counters. */ -#define USDM_REG_CMP_COUNTER_START_ADDR 0xc400c -#define USDM_REG_ENABLE_IN1 0xc4238 -#define USDM_REG_ENABLE_IN2 0xc423c -#define USDM_REG_ENABLE_OUT1 0xc4240 -#define USDM_REG_ENABLE_OUT2 0xc4244 -/* [RW 4] The initial number of messages that can be sent to the pxp control - interface without receiving any ACK. */ -#define USDM_REG_INIT_CREDIT_PXP_CTRL 0xc44c0 -/* [ST 32] The number of ACK after placement messages received */ -#define USDM_REG_NUM_OF_ACK_AFTER_PLACE 0xc4280 -/* [ST 32] The number of packet end messages received from the parser */ -#define USDM_REG_NUM_OF_PKT_END_MSG 0xc4278 -/* [ST 32] The number of requests received from the pxp async if */ -#define USDM_REG_NUM_OF_PXP_ASYNC_REQ 0xc427c -/* [ST 32] The number of commands received in queue 0 */ -#define USDM_REG_NUM_OF_Q0_CMD 0xc4248 -/* [ST 32] The number of commands received in queue 10 */ -#define USDM_REG_NUM_OF_Q10_CMD 0xc4270 -/* [ST 32] The number of commands received in queue 11 */ -#define USDM_REG_NUM_OF_Q11_CMD 0xc4274 -/* [ST 32] The number of commands received in queue 1 */ -#define USDM_REG_NUM_OF_Q1_CMD 0xc424c -/* [ST 32] The number of commands received in queue 2 */ -#define USDM_REG_NUM_OF_Q2_CMD 0xc4250 -/* [ST 32] The number of commands received in queue 3 */ -#define USDM_REG_NUM_OF_Q3_CMD 0xc4254 -/* [ST 32] The number of commands received in queue 4 */ -#define USDM_REG_NUM_OF_Q4_CMD 0xc4258 -/* [ST 32] The number of commands received in queue 5 */ -#define USDM_REG_NUM_OF_Q5_CMD 0xc425c -/* [ST 32] The number of commands received in queue 6 */ -#define USDM_REG_NUM_OF_Q6_CMD 0xc4260 -/* [ST 32] The number of commands received in queue 7 */ -#define USDM_REG_NUM_OF_Q7_CMD 0xc4264 -/* [ST 32] The number of commands received in queue 8 */ -#define USDM_REG_NUM_OF_Q8_CMD 0xc4268 -/* [ST 32] The number of commands received in queue 9 */ -#define USDM_REG_NUM_OF_Q9_CMD 0xc426c -/* [RW 14] The start address in the internal RAM for the packet end message */ -#define USDM_REG_PCK_END_MSG_START_ADDR 0xc4014 -/* [RW 14] The start address in the internal RAM for queue counters */ -#define USDM_REG_Q_COUNTER_START_ADDR 0xc4010 +#define UCM_REG_XX_FREE 0xe016c +#define UMAC_COMMAND_CONFIG_REG_HD_ENA (0x1<<10) +#define UMAC_COMMAND_CONFIG_REG_IGNORE_TX_PAUSE (0x1<<28) +#define UMAC_COMMAND_CONFIG_REG_LOOP_ENA (0x1<<15) +#define UMAC_COMMAND_CONFIG_REG_NO_LGTH_CHECK (0x1<<24) +#define UMAC_COMMAND_CONFIG_REG_PAD_EN (0x1<<5) +#define UMAC_COMMAND_CONFIG_REG_PAUSE_IGNORE (0x1<<8) +#define UMAC_COMMAND_CONFIG_REG_PROMIS_EN (0x1<<4) +#define UMAC_COMMAND_CONFIG_REG_RX_ENA (0x1<<1) +#define UMAC_COMMAND_CONFIG_REG_SW_RESET (0x1<<13) +#define UMAC_COMMAND_CONFIG_REG_TX_ENA (0x1<<0) +#define UMAC_REG_COMMAND_CONFIG 0x8 +/* [RW 32] Register Bit 0 refers to Bit 16 of the MAC address; Bit 1 refers + * to bit 17 of the MAC address etc. */ +#define UMAC_REG_MAC_ADDR0 0xc +/* [RW 16] Register Bit 0 refers to Bit 0 of the MAC address; Register Bit 1 + * refers to Bit 1 of the MAC address etc. Bits 16 to 31 are reserved. */ +#define UMAC_REG_MAC_ADDR1 0x10 +/* [RW 14] Defines a 14-Bit maximum frame length used by the MAC receive + * logic to check frames. */ +#define UMAC_REG_MAXFR 0x14 /* [R 1] pxp_ctrl rd_data fifo empty in sdm_dma_rsp block */ #define USDM_REG_RSP_PXP_CTRL_RDATA_EMPTY 0xc4550 /* [R 1] parser fifo empty in sdm_sync block */ #define USDM_REG_SYNC_PARSER_EMPTY 0xc4558 /* [R 1] parser serial fifo empty in sdm_sync block */ #define USDM_REG_SYNC_SYNC_EMPTY 0xc4560 -/* [RW 32] Tick for timer counter. Applicable only when - ~usdm_registers_timer_tick_enable.timer_tick_enable =1 */ -#define USDM_REG_TIMER_TICK 0xc4000 /* [RW 32] Interrupt mask register #0 read/write */ #define USDM_REG_USDM_INT_MASK_0 0xc42a0 #define USDM_REG_USDM_INT_MASK_1 0xc42b0 /* [R 32] Interrupt register #0 read */ -#define USDM_REG_USDM_INT_STS_0 0xc4294 -#define USDM_REG_USDM_INT_STS_1 0xc42a4 +#define USDM_REG_USDM_INT_STS_0 0xc4294 +#define USDM_REG_USDM_INT_STS_1 0xc42a4 /* [RW 11] Parity mask register #0 read/write */ -#define USDM_REG_USDM_PRTY_MASK 0xc42c0 +#define USDM_REG_USDM_PRTY_MASK 0xc42c0 /* [R 11] Parity register #0 read */ #define USDM_REG_USDM_PRTY_STS 0xc42b4 -/* [RW 5] The number of time_slots in the arbitration cycle */ -#define USEM_REG_ARB_CYCLE_SIZE 0x300034 -/* [RW 3] The source that is associated with arbitration element 0. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2 */ -#define USEM_REG_ARB_ELEMENT0 0x300020 -/* [RW 3] The source that is associated with arbitration element 1. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~usem_registers_arb_element0.arb_element0 */ -#define USEM_REG_ARB_ELEMENT1 0x300024 -/* [RW 3] The source that is associated with arbitration element 2. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~usem_registers_arb_element0.arb_element0 - and ~usem_registers_arb_element1.arb_element1 */ -#define USEM_REG_ARB_ELEMENT2 0x300028 -/* [RW 3] The source that is associated with arbitration element 3. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2.Could - not be equal to register ~usem_registers_arb_element0.arb_element0 and - ~usem_registers_arb_element1.arb_element1 and - ~usem_registers_arb_element2.arb_element2 */ -#define USEM_REG_ARB_ELEMENT3 0x30002c -/* [RW 3] The source that is associated with arbitration element 4. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~usem_registers_arb_element0.arb_element0 - and ~usem_registers_arb_element1.arb_element1 and - ~usem_registers_arb_element2.arb_element2 and - ~usem_registers_arb_element3.arb_element3 */ -#define USEM_REG_ARB_ELEMENT4 0x300030 -#define USEM_REG_ENABLE_IN 0x3000a4 -#define USEM_REG_ENABLE_OUT 0x3000a8 +/* [RC 11] Parity register #0 read clear */ +#define USDM_REG_USDM_PRTY_STS_CLR 0xc42b8 /* [RW 32] This address space contains all registers and memories that are - placed in SEM_FAST block. The SEM_FAST registers are described in - appendix B. In order to access the SEM_FAST registers the base address - USEM_REGISTERS_FAST_MEMORY (Offset: 0x320000) should be added to each - SEM_FAST register offset. */ + * placed in SEM_FAST block. The SEM_FAST registers are described in + * appendix B. In order to access the SEM_FAST registers the base address + * USEM_REGISTERS_FAST_MEMORY (Offset: 0x320000) should be added to each + * SEM_FAST register offset. */ #define USEM_REG_FAST_MEMORY 0x320000 -/* [RW 1] Disables input messages from FIC0 May be updated during run_time - by the microcode */ -#define USEM_REG_FIC0_DISABLE 0x300224 -/* [RW 1] Disables input messages from FIC1 May be updated during run_time - by the microcode */ -#define USEM_REG_FIC1_DISABLE 0x300234 /* [RW 15] Interrupt table Read and write access to it is not possible in - the middle of the work */ + * the middle of the work */ #define USEM_REG_INT_TABLE 0x300400 -/* [ST 24] Statistics register. The number of messages that entered through - FIC0 */ -#define USEM_REG_MSG_NUM_FIC0 0x300000 -/* [ST 24] Statistics register. The number of messages that entered through - FIC1 */ -#define USEM_REG_MSG_NUM_FIC1 0x300004 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC0 */ -#define USEM_REG_MSG_NUM_FOC0 0x300008 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC1 */ -#define USEM_REG_MSG_NUM_FOC1 0x30000c -/* [ST 24] Statistics register. The number of messages that were sent to - FOC2 */ -#define USEM_REG_MSG_NUM_FOC2 0x300010 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC3 */ -#define USEM_REG_MSG_NUM_FOC3 0x300014 -/* [RW 1] Disables input messages from the passive buffer May be updated - during run_time by the microcode */ -#define USEM_REG_PAS_DISABLE 0x30024c /* [WB 128] Debug only. Passive buffer memory */ -#define USEM_REG_PASSIVE_BUFFER 0x302000 +#define USEM_REG_PASSIVE_BUFFER 0x302000 /* [WB 46] pram memory. B45 is parity; b[44:0] - data. */ #define USEM_REG_PRAM 0x340000 -/* [R 16] Valid sleeping threads indication have bit per thread */ +/* [R 20] Valid sleeping threads indication have bit per thread */ #define USEM_REG_SLEEP_THREADS_VALID 0x30026c /* [R 1] EXT_STORE FIFO is empty in sem_slow_ls_ext */ #define USEM_REG_SLOW_EXT_STORE_EMPTY 0x3002a0 -/* [RW 16] List of free threads . There is a bit per thread. */ -#define USEM_REG_THREADS_LIST 0x3002e4 -/* [RW 3] The arbitration scheme of time_slot 0 */ -#define USEM_REG_TS_0_AS 0x300038 -/* [RW 3] The arbitration scheme of time_slot 10 */ -#define USEM_REG_TS_10_AS 0x300060 -/* [RW 3] The arbitration scheme of time_slot 11 */ -#define USEM_REG_TS_11_AS 0x300064 -/* [RW 3] The arbitration scheme of time_slot 12 */ -#define USEM_REG_TS_12_AS 0x300068 -/* [RW 3] The arbitration scheme of time_slot 13 */ -#define USEM_REG_TS_13_AS 0x30006c -/* [RW 3] The arbitration scheme of time_slot 14 */ -#define USEM_REG_TS_14_AS 0x300070 -/* [RW 3] The arbitration scheme of time_slot 15 */ -#define USEM_REG_TS_15_AS 0x300074 -/* [RW 3] The arbitration scheme of time_slot 16 */ -#define USEM_REG_TS_16_AS 0x300078 -/* [RW 3] The arbitration scheme of time_slot 17 */ -#define USEM_REG_TS_17_AS 0x30007c -/* [RW 3] The arbitration scheme of time_slot 18 */ -#define USEM_REG_TS_18_AS 0x300080 -/* [RW 3] The arbitration scheme of time_slot 1 */ -#define USEM_REG_TS_1_AS 0x30003c -/* [RW 3] The arbitration scheme of time_slot 2 */ -#define USEM_REG_TS_2_AS 0x300040 -/* [RW 3] The arbitration scheme of time_slot 3 */ -#define USEM_REG_TS_3_AS 0x300044 -/* [RW 3] The arbitration scheme of time_slot 4 */ -#define USEM_REG_TS_4_AS 0x300048 -/* [RW 3] The arbitration scheme of time_slot 5 */ -#define USEM_REG_TS_5_AS 0x30004c -/* [RW 3] The arbitration scheme of time_slot 6 */ -#define USEM_REG_TS_6_AS 0x300050 -/* [RW 3] The arbitration scheme of time_slot 7 */ -#define USEM_REG_TS_7_AS 0x300054 -/* [RW 3] The arbitration scheme of time_slot 8 */ -#define USEM_REG_TS_8_AS 0x300058 -/* [RW 3] The arbitration scheme of time_slot 9 */ -#define USEM_REG_TS_9_AS 0x30005c /* [RW 32] Interrupt mask register #0 read/write */ #define USEM_REG_USEM_INT_MASK_0 0x300110 #define USEM_REG_USEM_INT_MASK_1 0x300120 /* [R 32] Interrupt register #0 read */ -#define USEM_REG_USEM_INT_STS_0 0x300104 -#define USEM_REG_USEM_INT_STS_1 0x300114 +#define USEM_REG_USEM_INT_STS_0 0x300104 +#define USEM_REG_USEM_INT_STS_1 0x300114 /* [RW 32] Parity mask register #0 read/write */ #define USEM_REG_USEM_PRTY_MASK_0 0x300130 #define USEM_REG_USEM_PRTY_MASK_1 0x300140 /* [R 32] Parity register #0 read */ #define USEM_REG_USEM_PRTY_STS_0 0x300124 #define USEM_REG_USEM_PRTY_STS_1 0x300134 +/* [RC 32] Parity register #0 read clear */ +#define USEM_REG_USEM_PRTY_STS_CLR_0 0x300128 +#define USEM_REG_USEM_PRTY_STS_CLR_1 0x300138 /* [W 7] VF or PF ID for reset error bit. Values 0-63 reset error bit for 64 - VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ + * VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ #define USEM_REG_VFPF_ERR_NUM 0x300380 #define VFC_MEMORIES_RST_REG_CAM_RST (0x1<<0) #define VFC_MEMORIES_RST_REG_RAM_RST (0x1<<1) #define VFC_REG_MEMORIES_RST 0x1943c -/* [RW 32] Indirect access to AG context with 32-bits granularity. The bits - [12:8] of the address should be the offset within the accessed LCID - context; the bits [7:0] are the accessed LCID.Example: to write to REG10 - LCID100. The RBC address should be 13'ha64. */ -#define XCM_REG_AG_CTX 0x28000 -/* [RW 2] The queue index for registration on Aux1 counter flag. */ -#define XCM_REG_AUX1_Q 0x20134 -/* [RW 2] Per each decision rule the queue index to register to. */ -#define XCM_REG_AUX_CNT_FLG_Q_19 0x201b0 /* [R 5] Used to read the XX protection CAM occupancy counter. */ #define XCM_REG_CAM_OCCUP 0x20244 -/* [RW 1] CDU AG read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define XCM_REG_CDU_AG_RD_IFEN 0x20044 -/* [RW 1] CDU AG write Interface enable. If 0 - the request and valid input - are disregarded; all other signals are treated as usual; if 1 - normal - activity. */ -#define XCM_REG_CDU_AG_WR_IFEN 0x20040 -/* [RW 1] CDU STORM read Interface enable. If 0 - the request input is - disregarded; valid output is deasserted; all other signals are treated as - usual; if 1 - normal activity. */ -#define XCM_REG_CDU_SM_RD_IFEN 0x2004c -/* [RW 1] CDU STORM write Interface enable. If 0 - the request and valid - input is disregarded; all other signals are treated as usual; if 1 - - normal activity. */ -#define XCM_REG_CDU_SM_WR_IFEN 0x20048 /* [RW 4] CFC output initial credit. Max credit available - 15.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 1 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 1 at start-up. */ #define XCM_REG_CFC_INIT_CRD 0x20404 -/* [RW 3] The weight of the CP input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_CP_WEIGHT 0x200dc -/* [RW 1] Input csem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_CSEM_IFEN 0x20028 /* [RC 1] Set at message length mismatch (relative to last indication) at - the csem interface. */ -#define XCM_REG_CSEM_LENGTH_MIS 0x20228 -/* [RW 3] The weight of the input csem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_CSEM_WEIGHT 0x200c4 -/* [RW 1] Input dorq Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_DORQ_IFEN 0x20030 + * the csem interface. */ +#define XCM_REG_CSEM_LENGTH_MIS 0x20228 /* [RC 1] Set at message length mismatch (relative to last indication) at - the dorq interface. */ -#define XCM_REG_DORQ_LENGTH_MIS 0x20230 -/* [RW 3] The weight of the input dorq in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_DORQ_WEIGHT 0x200cc -/* [RW 8] The Event ID in case the ErrorFlg input message bit is set. */ -#define XCM_REG_ERR_EVNT_ID 0x200b0 -/* [RW 28] The CM erroneous header for QM and Timers formatting. */ -#define XCM_REG_ERR_XCM_HDR 0x200ac -/* [RW 8] The Event ID for Timers expiration. */ -#define XCM_REG_EXPR_EVNT_ID 0x200b4 + * the dorq interface. */ +#define XCM_REG_DORQ_LENGTH_MIS 0x20230 /* [RW 8] FIC0 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define XCM_REG_FIC0_INIT_CRD 0x2040c /* [RW 8] FIC1 output initial credit. Max credit available - 255.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 64 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 64 at start-up. */ #define XCM_REG_FIC1_INIT_CRD 0x20410 #define XCM_REG_GLB_DEL_ACK_MAX_CNT_0 0x20118 -#define XCM_REG_GLB_DEL_ACK_MAX_CNT_1 0x2011c -#define XCM_REG_GLB_DEL_ACK_TMR_VAL_0 0x20108 -#define XCM_REG_GLB_DEL_ACK_TMR_VAL_1 0x2010c -/* [RW 1] Arbitratiojn between Input Arbiter groups: 0 - fair Round-Robin; 1 - - strict priority defined by ~xcm_registers_gr_ag_pr.gr_ag_pr; - ~xcm_registers_gr_ld0_pr.gr_ld0_pr and - ~xcm_registers_gr_ld1_pr.gr_ld1_pr. */ -#define XCM_REG_GR_ARB_TYPE 0x2020c -/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Channel group is the - compliment of the other 3 groups. */ -#define XCM_REG_GR_LD0_PR 0x20214 -/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the - highest priority is 3. It is supposed that the Channel group is the - compliment of the other 3 groups. */ -#define XCM_REG_GR_LD1_PR 0x20218 -/* [RW 1] Input nig0 Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_NIG0_IFEN 0x20038 /* [RC 1] Set at message length mismatch (relative to last indication) at - the nig0 interface. */ -#define XCM_REG_NIG0_LENGTH_MIS 0x20238 -/* [RW 3] The weight of the input nig0 in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_NIG0_WEIGHT 0x200d4 -/* [RW 1] Input nig1 Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_NIG1_IFEN 0x2003c + * the nig0 interface. */ +#define XCM_REG_NIG0_LENGTH_MIS 0x20238 /* [RC 1] Set at message length mismatch (relative to last indication) at - the nig1 interface. */ -#define XCM_REG_NIG1_LENGTH_MIS 0x2023c -/* [RW 5] The number of double REG-pairs; loaded from the STORM context and - sent to STORM; for a specific connection type. The double REG-pairs are - used in order to align to STORM context row size of 128 bits. The offset - of these data in the STORM context is always 0. Index _i stands for the - connection type (one of 16). */ -#define XCM_REG_N_SM_CTX_LD_0 0x20060 -#define XCM_REG_N_SM_CTX_LD_1 0x20064 -#define XCM_REG_N_SM_CTX_LD_2 0x20068 -#define XCM_REG_N_SM_CTX_LD_3 0x2006c -#define XCM_REG_N_SM_CTX_LD_4 0x20070 -#define XCM_REG_N_SM_CTX_LD_5 0x20074 -/* [RW 1] Input pbf Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_PBF_IFEN 0x20034 + * the nig1 interface. */ +#define XCM_REG_NIG1_LENGTH_MIS 0x2023c /* [RC 1] Set at message length mismatch (relative to last indication) at - the pbf interface. */ + * the pbf interface. */ #define XCM_REG_PBF_LENGTH_MIS 0x20234 -/* [RW 3] The weight of the input pbf in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_PBF_WEIGHT 0x200d0 -#define XCM_REG_PHYS_QNUM3_0 0x20100 -#define XCM_REG_PHYS_QNUM3_1 0x20104 -/* [RW 8] The Event ID for Timers formatting in case of stop done. */ -#define XCM_REG_STOP_EVNT_ID 0x200b8 /* [RC 1] Set at message length mismatch (relative to last indication) at - the STORM interface. */ + * the STORM interface. */ #define XCM_REG_STORM_LENGTH_MIS 0x2021c -/* [RW 3] The weight of the STORM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_STORM_WEIGHT 0x200bc -/* [RW 1] STORM - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_STORM_XCM_IFEN 0x20010 /* [RW 4] Timers output initial credit. Max credit available - 15.Write - writes the initial credit value; read returns the current value of the - credit counter. Must be initialized to 4 at start-up. */ + * writes the initial credit value; read returns the current value of the + * credit counter. Must be initialized to 4 at start-up. */ #define XCM_REG_TM_INIT_CRD 0x2041c -/* [RW 3] The weight of the Timers input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_TM_WEIGHT 0x200ec -/* [RW 28] The CM header for Timers expiration command. */ -#define XCM_REG_TM_XCM_HDR 0x200a8 -/* [RW 1] Timers - CM Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_TM_XCM_IFEN 0x2001c -/* [RW 1] Input tsem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_TSEM_IFEN 0x20024 /* [RC 1] Set at message length mismatch (relative to last indication) at - the tsem interface. */ -#define XCM_REG_TSEM_LENGTH_MIS 0x20224 -/* [RW 3] The weight of the input tsem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_TSEM_WEIGHT 0x200c0 -/* [RW 2] The queue index for registration on UNA greater NXT decision rule. */ -#define XCM_REG_UNA_GT_NXT_Q 0x20120 -/* [RW 1] Input usem Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_USEM_IFEN 0x2002c + * the tsem interface. */ +#define XCM_REG_TSEM_LENGTH_MIS 0x20224 /* [RC 1] Message length mismatch (relative to last indication) at the usem - interface. */ -#define XCM_REG_USEM_LENGTH_MIS 0x2022c -/* [RW 3] The weight of the input usem in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_USEM_WEIGHT 0x200c8 -#define XCM_REG_WU_DA_CNT_CMD00 0x201d4 -#define XCM_REG_WU_DA_CNT_CMD01 0x201d8 -#define XCM_REG_WU_DA_CNT_CMD10 0x201dc -#define XCM_REG_WU_DA_CNT_CMD11 0x201e0 -#define XCM_REG_WU_DA_CNT_UPD_VAL00 0x201e4 -#define XCM_REG_WU_DA_CNT_UPD_VAL01 0x201e8 -#define XCM_REG_WU_DA_CNT_UPD_VAL10 0x201ec -#define XCM_REG_WU_DA_CNT_UPD_VAL11 0x201f0 + * interface. */ +#define XCM_REG_USEM_LENGTH_MIS 0x2022c +#define XCM_REG_WU_DA_CNT_CMD00 0x201d4 #define XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD00 0x201c4 -#define XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD01 0x201c8 -#define XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD10 0x201cc -#define XCM_REG_WU_DA_SET_TMR_CNT_FLG_CMD11 0x201d0 -/* [RW 1] CM - CFC Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XCM_CFC_IFEN 0x20050 /* [RW 14] Interrupt mask register #0 read/write */ #define XCM_REG_XCM_INT_MASK 0x202b4 /* [R 14] Interrupt register #0 read */ #define XCM_REG_XCM_INT_STS 0x202a8 +/* [RW 30] Parity mask register #0 read/write */ +#define XCM_REG_XCM_PRTY_MASK 0x202c4 /* [R 30] Parity register #0 read */ #define XCM_REG_XCM_PRTY_STS 0x202b8 -/* [RW 4] The size of AG context region 0 in REG-pairs. Designates the MS - REG-pair number (e.g. if region 0 is 6 REG-pairs; the value should be 5). - Is used to determine the number of the AG context REG-pairs written back; - when the Reg1WbFlg isn't set. */ -#define XCM_REG_XCM_REG0_SZ 0x200f4 -/* [RW 1] CM - STORM 0 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XCM_STORM0_IFEN 0x20004 -/* [RW 1] CM - STORM 1 Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XCM_STORM1_IFEN 0x20008 -/* [RW 1] CM - Timers Interface enable. If 0 - the valid input is - disregarded; acknowledge output is deasserted; all other signals are - treated as usual; if 1 - normal activity. */ -#define XCM_REG_XCM_TM_IFEN 0x20020 -/* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is - disregarded; valid is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XCM_XQM_IFEN 0x2000c -/* [RW 1] If set the Q index; received from the QM is inserted to event ID. */ -#define XCM_REG_XCM_XQM_USE_Q 0x200f0 -/* [RW 4] The value by which CFC updates the activity counter at QM bypass. */ -#define XCM_REG_XQM_BYP_ACT_UPD 0x200fc +/* [RC 30] Parity register #0 read clear */ +#define XCM_REG_XCM_PRTY_STS_CLR 0x202bc /* [RW 6] QM output initial credit. Max credit available - 32.Write writes - the initial credit value; read returns the current value of the credit - counter. Must be initialized to 32 at start-up. */ + * the initial credit value; read returns the current value of the credit + * counter. Must be initialized to 32 at start-up. */ #define XCM_REG_XQM_INIT_CRD 0x20420 -/* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_XQM_P_WEIGHT 0x200e4 -/* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0 - stands for weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_XQM_S_WEIGHT 0x200e8 -/* [RW 28] The CM header value for QM request (primary). */ -#define XCM_REG_XQM_XCM_HDR_P 0x200a0 -/* [RW 28] The CM header value for QM request (secondary). */ -#define XCM_REG_XQM_XCM_HDR_S 0x200a4 -/* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XQM_XCM_IFEN 0x20014 -/* [RW 1] Input SDM Interface enable. If 0 - the valid input is disregarded; - acknowledge output is deasserted; all other signals are treated as usual; - if 1 - normal activity. */ -#define XCM_REG_XSDM_IFEN 0x20018 /* [RC 1] Set at message length mismatch (relative to last indication) at - the SDM interface. */ -#define XCM_REG_XSDM_LENGTH_MIS 0x20220 -/* [RW 3] The weight of the SDM input in the WRR mechanism. 0 stands for - weight 8 (the most prioritised); 1 stands for weight 1(least - prioritised); 2 stands for weight 2; tc. */ -#define XCM_REG_XSDM_WEIGHT 0x200e0 + * the SDM interface. */ +#define XCM_REG_XSDM_LENGTH_MIS 0x20220 /* [RW 17] Indirect access to the descriptor table of the XX protection - mechanism. The fields are: [5:0] - message length; 11:6] - message - pointer; 16:12] - next pointer. */ + * mechanism. The fields are: [5:0] - message length; 11:6] - message + * pointer; 16:12] - next pointer. */ #define XCM_REG_XX_DESCR_TABLE 0x20480 #define XCM_REG_XX_DESCR_TABLE_SIZE 32 /* [R 6] Used to read the XX protection Free counter. */ -#define XCM_REG_XX_FREE 0x20240 -/* [RW 6] Initial value for the credit counter; responsible for fulfilling - of the Input Stage XX protection buffer by the XX protection pending - messages. Max credit available - 3.Write writes the initial credit value; - read returns the current value of the credit counter. Must be initialized - to 2 at start-up. */ -#define XCM_REG_XX_INIT_CRD 0x20424 -/* [RW 6] The maximum number of pending messages; which may be stored in XX - protection. ~xcm_registers_xx_free.xx_free is also written on write. */ -#define XCM_REG_XX_MSG_NUM 0x20428 -/* [RW 8] The Event ID; sent to the STORM in case of XX overflow. */ -#define XCM_REG_XX_OVFL_EVNT_ID 0x20058 -/* [RW 16] Indirect access to the XX table of the XX protection mechanism. - The fields are:[4:0] - tail pointer; 10:5] - Link List size; 15:11] - - header pointer. */ -#define XCM_REG_XX_TABLE 0x20500 -/* [RW 8] The event id for aggregated interrupt 0 */ -#define XSDM_REG_AGG_INT_EVENT_0 0x166038 -#define XSDM_REG_AGG_INT_EVENT_1 0x16603c -#define XSDM_REG_AGG_INT_EVENT_10 0x166060 -#define XSDM_REG_AGG_INT_EVENT_11 0x166064 -#define XSDM_REG_AGG_INT_EVENT_12 0x166068 -#define XSDM_REG_AGG_INT_EVENT_13 0x16606c -#define XSDM_REG_AGG_INT_EVENT_14 0x166070 -#define XSDM_REG_AGG_INT_EVENT_15 0x166074 -#define XSDM_REG_AGG_INT_EVENT_16 0x166078 -#define XSDM_REG_AGG_INT_EVENT_17 0x16607c -#define XSDM_REG_AGG_INT_EVENT_18 0x166080 -#define XSDM_REG_AGG_INT_EVENT_2 0x166040 -#define XSDM_REG_AGG_INT_EVENT_4 0x166048 -#define XSDM_REG_AGG_INT_EVENT_5 0x16604c -#define XSDM_REG_AGG_INT_EVENT_6 0x166050 -#define XSDM_REG_AGG_INT_EVENT_7 0x166054 -#define XSDM_REG_AGG_INT_EVENT_8 0x166058 -#define XSDM_REG_AGG_INT_EVENT_9 0x16605c -/* [RW 1] For each aggregated interrupt index whether the mode is normal (0) - or auto-mask-mode (1) */ -#define XSDM_REG_AGG_INT_MODE_0 0x1661b8 -#define XSDM_REG_AGG_INT_MODE_1 0x1661bc -#define XSDM_REG_AGG_INT_MODE_10 0x1661e0 -#define XSDM_REG_AGG_INT_MODE_11 0x1661e4 -#define XSDM_REG_AGG_INT_MODE_14 0x1661f0 -#define XSDM_REG_AGG_INT_MODE_15 0x1661f4 -#define XSDM_REG_AGG_INT_MODE_2 0x1661c0 -#define XSDM_REG_AGG_INT_MODE_9 0x1661dc -/* [RW 1] The T bit for aggregated interrupt 0 */ -#define XSDM_REG_AGG_INT_T_0 0x1660b8 -#define XSDM_REG_AGG_INT_T_1 0x1660bc -#define XSDM_REG_AGG_INT_T_10 0x1660e0 -#define XSDM_REG_AGG_INT_T_14 0x1660f0 -#define XSDM_REG_AGG_INT_T_15 0x1660f4 -#define XSDM_REG_AGG_INT_T_2 0x1660c0 -#define XSDM_REG_AGG_INT_T_9 0x1660dc -/* [RW 14] The start address in the internal RAM for the cfc_rsp lcid */ -#define XSDM_REG_CFC_RSP_START_ADDR 0x166008 -/* [RW 16] The maximum value of the competion counter #0 */ -#define XSDM_REG_CMP_COUNTER_MAX0 0x16601c -/* [RW 16] The maximum value of the competion counter #1 */ -#define XSDM_REG_CMP_COUNTER_MAX1 0x166020 -/* [RW 16] The maximum value of the competion counter #2 */ -#define XSDM_REG_CMP_COUNTER_MAX2 0x166024 -/* [RW 16] The maximum value of the competion counter #3 */ -#define XSDM_REG_CMP_COUNTER_MAX3 0x166028 -/* [RW 16] The maximum value of the competion counter #4 */ -#define XSDM_REG_CMP_COUNTER_MAX4 0x1662d8 -/* [RW 16] The maximum value of the competion counter #5 */ -#define XSDM_REG_CMP_COUNTER_MAX5 0x1662dc -/* [RW 16] The maximum value of the competion counter #6 */ -#define XSDM_REG_CMP_COUNTER_MAX6 0x1662e0 -/* [RW 16] The maximum value of the competion counter #7 */ -#define XSDM_REG_CMP_COUNTER_MAX7 0x1662e4 -/* [RW 14] The start address in the internal RAM for the completion - counters. */ -#define XSDM_REG_CMP_COUNTER_START_ADDR 0x16600c -#define XSDM_REG_ENABLE_IN1 0x166238 -#define XSDM_REG_ENABLE_IN2 0x16623c -#define XSDM_REG_ENABLE_OUT1 0x166240 -#define XSDM_REG_ENABLE_OUT2 0x166244 -/* [RW 4] The initial number of messages that can be sent to the pxp control - interface without receiving any ACK. */ -#define XSDM_REG_INIT_CREDIT_PXP_CTRL 0x1664bc -/* [ST 32] The number of ACK after placement messages received */ -#define XSDM_REG_NUM_OF_ACK_AFTER_PLACE 0x16627c -/* [ST 32] The number of DORQ DPM messages received */ -#define XSDM_REG_NUM_OF_DPM_REQ 0x1662d4 -/* [ST 32] The number of packet end messages received from the parser */ -#define XSDM_REG_NUM_OF_PKT_END_MSG 0x166274 -/* [ST 32] The number of requests received from the pxp async if */ -#define XSDM_REG_NUM_OF_PXP_ASYNC_REQ 0x166278 -/* [ST 32] The number of commands received in queue 0 */ -#define XSDM_REG_NUM_OF_Q0_CMD 0x166248 -/* [ST 32] The number of commands received in queue 10 */ -#define XSDM_REG_NUM_OF_Q10_CMD 0x16626c -/* [ST 32] The number of commands received in queue 11 */ -#define XSDM_REG_NUM_OF_Q11_CMD 0x166270 -/* [ST 32] The number of commands received in queue 1 */ -#define XSDM_REG_NUM_OF_Q1_CMD 0x16624c -/* [ST 32] The number of commands received in queue 3 */ -#define XSDM_REG_NUM_OF_Q3_CMD 0x166250 -/* [ST 32] The number of commands received in queue 4 */ -#define XSDM_REG_NUM_OF_Q4_CMD 0x166254 -/* [ST 32] The number of commands received in queue 5 */ -#define XSDM_REG_NUM_OF_Q5_CMD 0x166258 -/* [ST 32] The number of commands received in queue 6 */ -#define XSDM_REG_NUM_OF_Q6_CMD 0x16625c -/* [ST 32] The number of commands received in queue 7 */ -#define XSDM_REG_NUM_OF_Q7_CMD 0x166260 -/* [ST 32] The number of commands received in queue 8 */ -#define XSDM_REG_NUM_OF_Q8_CMD 0x166264 -/* [ST 32] The number of commands received in queue 9 */ -#define XSDM_REG_NUM_OF_Q9_CMD 0x166268 +#define XCM_REG_XX_FREE 0x20240 +#define XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_LOCAL_FAULT_STATUS (0x1<<0) +#define XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_REMOTE_FAULT_STATUS (0x1<<1) +#define XMAC_CTRL_REG_LINE_LOCAL_LPBK (0x1<<2) +#define XMAC_CTRL_REG_RX_EN (0x1<<1) +#define XMAC_CTRL_REG_SOFT_RESET (0x1<<6) +#define XMAC_CTRL_REG_TX_EN (0x1<<0) +#define XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN (0x1<<18) +#define XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN (0x1<<17) +#define XMAC_PFC_CTRL_HI_REG_FORCE_PFC_XON (0x1<<1) +#define XMAC_PFC_CTRL_HI_REG_PFC_REFRESH_EN (0x1<<0) +#define XMAC_PFC_CTRL_HI_REG_PFC_STATS_EN (0x1<<3) +#define XMAC_PFC_CTRL_HI_REG_RX_PFC_EN (0x1<<4) +#define XMAC_PFC_CTRL_HI_REG_TX_PFC_EN (0x1<<5) +#define XMAC_REG_CLEAR_RX_LSS_STATUS 0x60 +#define XMAC_REG_CTRL 0 +/* [RW 16] Upper 48 bits of ctrl_sa register. Used as the SA in PAUSE/PFC + * packets transmitted by the MAC */ +#define XMAC_REG_CTRL_SA_HI 0x2c +/* [RW 32] Lower 48 bits of ctrl_sa register. Used as the SA in PAUSE/PFC + * packets transmitted by the MAC */ +#define XMAC_REG_CTRL_SA_LO 0x28 +#define XMAC_REG_PAUSE_CTRL 0x68 +#define XMAC_REG_PFC_CTRL 0x70 +#define XMAC_REG_PFC_CTRL_HI 0x74 +#define XMAC_REG_RX_LSS_STATUS 0x58 +/* [RW 14] Maximum packet size in receive direction; exclusive of preamble & + * CRC in strip mode */ +#define XMAC_REG_RX_MAX_SIZE 0x40 +#define XMAC_REG_TX_CTRL 0x20 /* [W 17] Generate an operation after completion; bit-16 is - AggVectIdx_valid; bits 15:8 are AggVectIdx; bits 7:5 are the TRIG and - bits 4:0 are the T124Param[4:0] */ + * AggVectIdx_valid; bits 15:8 are AggVectIdx; bits 7:5 are the TRIG and + * bits 4:0 are the T124Param[4:0] */ #define XSDM_REG_OPERATION_GEN 0x1664c4 -/* [RW 14] The start address in the internal RAM for queue counters */ -#define XSDM_REG_Q_COUNTER_START_ADDR 0x166010 /* [R 1] pxp_ctrl rd_data fifo empty in sdm_dma_rsp block */ #define XSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY 0x166548 /* [R 1] parser fifo empty in sdm_sync block */ #define XSDM_REG_SYNC_PARSER_EMPTY 0x166550 /* [R 1] parser serial fifo empty in sdm_sync block */ #define XSDM_REG_SYNC_SYNC_EMPTY 0x166558 -/* [RW 32] Tick for timer counter. Applicable only when - ~xsdm_registers_timer_tick_enable.timer_tick_enable =1 */ -#define XSDM_REG_TIMER_TICK 0x166000 /* [RW 32] Interrupt mask register #0 read/write */ #define XSDM_REG_XSDM_INT_MASK_0 0x16629c #define XSDM_REG_XSDM_INT_MASK_1 0x1662ac /* [R 32] Interrupt register #0 read */ -#define XSDM_REG_XSDM_INT_STS_0 0x166290 -#define XSDM_REG_XSDM_INT_STS_1 0x1662a0 +#define XSDM_REG_XSDM_INT_STS_0 0x166290 +#define XSDM_REG_XSDM_INT_STS_1 0x1662a0 /* [RW 11] Parity mask register #0 read/write */ -#define XSDM_REG_XSDM_PRTY_MASK 0x1662bc +#define XSDM_REG_XSDM_PRTY_MASK 0x1662bc /* [R 11] Parity register #0 read */ #define XSDM_REG_XSDM_PRTY_STS 0x1662b0 -/* [RW 5] The number of time_slots in the arbitration cycle */ -#define XSEM_REG_ARB_CYCLE_SIZE 0x280034 -/* [RW 3] The source that is associated with arbitration element 0. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2 */ -#define XSEM_REG_ARB_ELEMENT0 0x280020 -/* [RW 3] The source that is associated with arbitration element 1. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~xsem_registers_arb_element0.arb_element0 */ -#define XSEM_REG_ARB_ELEMENT1 0x280024 -/* [RW 3] The source that is associated with arbitration element 2. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~xsem_registers_arb_element0.arb_element0 - and ~xsem_registers_arb_element1.arb_element1 */ -#define XSEM_REG_ARB_ELEMENT2 0x280028 -/* [RW 3] The source that is associated with arbitration element 3. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2.Could - not be equal to register ~xsem_registers_arb_element0.arb_element0 and - ~xsem_registers_arb_element1.arb_element1 and - ~xsem_registers_arb_element2.arb_element2 */ -#define XSEM_REG_ARB_ELEMENT3 0x28002c -/* [RW 3] The source that is associated with arbitration element 4. Source - decoding is: 0- foc0; 1-fic1; 2-sleeping thread with priority 0; 3- - sleeping thread with priority 1; 4- sleeping thread with priority 2. - Could not be equal to register ~xsem_registers_arb_element0.arb_element0 - and ~xsem_registers_arb_element1.arb_element1 and - ~xsem_registers_arb_element2.arb_element2 and - ~xsem_registers_arb_element3.arb_element3 */ -#define XSEM_REG_ARB_ELEMENT4 0x280030 -#define XSEM_REG_ENABLE_IN 0x2800a4 -#define XSEM_REG_ENABLE_OUT 0x2800a8 +/* [RC 11] Parity register #0 read clear */ +#define XSDM_REG_XSDM_PRTY_STS_CLR 0x1662b4 /* [RW 32] This address space contains all registers and memories that are - placed in SEM_FAST block. The SEM_FAST registers are described in - appendix B. In order to access the SEM_FAST registers the base address - XSEM_REGISTERS_FAST_MEMORY (Offset: 0x2a0000) should be added to each - SEM_FAST register offset. */ + * placed in SEM_FAST block. The SEM_FAST registers are described in + * appendix B. In order to access the SEM_FAST registers the base address + * XSEM_REGISTERS_FAST_MEMORY (Offset: 0x2a0000) should be added to each + * SEM_FAST register offset. */ #define XSEM_REG_FAST_MEMORY 0x2a0000 -/* [RW 1] Disables input messages from FIC0 May be updated during run_time - by the microcode */ -#define XSEM_REG_FIC0_DISABLE 0x280224 -/* [RW 1] Disables input messages from FIC1 May be updated during run_time - by the microcode */ -#define XSEM_REG_FIC1_DISABLE 0x280234 /* [RW 15] Interrupt table Read and write access to it is not possible in - the middle of the work */ + * the middle of the work */ #define XSEM_REG_INT_TABLE 0x280400 -/* [ST 24] Statistics register. The number of messages that entered through - FIC0 */ -#define XSEM_REG_MSG_NUM_FIC0 0x280000 -/* [ST 24] Statistics register. The number of messages that entered through - FIC1 */ -#define XSEM_REG_MSG_NUM_FIC1 0x280004 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC0 */ -#define XSEM_REG_MSG_NUM_FOC0 0x280008 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC1 */ -#define XSEM_REG_MSG_NUM_FOC1 0x28000c -/* [ST 24] Statistics register. The number of messages that were sent to - FOC2 */ -#define XSEM_REG_MSG_NUM_FOC2 0x280010 -/* [ST 24] Statistics register. The number of messages that were sent to - FOC3 */ -#define XSEM_REG_MSG_NUM_FOC3 0x280014 -/* [RW 1] Disables input messages from the passive buffer May be updated - during run_time by the microcode */ -#define XSEM_REG_PAS_DISABLE 0x28024c /* [WB 128] Debug only. Passive buffer memory */ -#define XSEM_REG_PASSIVE_BUFFER 0x282000 +#define XSEM_REG_PASSIVE_BUFFER 0x282000 /* [WB 46] pram memory. B45 is parity; b[44:0] - data. */ #define XSEM_REG_PRAM 0x2c0000 -/* [R 16] Valid sleeping threads indication have bit per thread */ +/* [R 20] Valid sleeping threads indication have bit per thread */ #define XSEM_REG_SLEEP_THREADS_VALID 0x28026c /* [R 1] EXT_STORE FIFO is empty in sem_slow_ls_ext */ #define XSEM_REG_SLOW_EXT_STORE_EMPTY 0x2802a0 -/* [RW 16] List of free threads . There is a bit per thread. */ -#define XSEM_REG_THREADS_LIST 0x2802e4 -/* [RW 3] The arbitration scheme of time_slot 0 */ -#define XSEM_REG_TS_0_AS 0x280038 -/* [RW 3] The arbitration scheme of time_slot 10 */ -#define XSEM_REG_TS_10_AS 0x280060 -/* [RW 3] The arbitration scheme of time_slot 11 */ -#define XSEM_REG_TS_11_AS 0x280064 -/* [RW 3] The arbitration scheme of time_slot 12 */ -#define XSEM_REG_TS_12_AS 0x280068 -/* [RW 3] The arbitration scheme of time_slot 13 */ -#define XSEM_REG_TS_13_AS 0x28006c -/* [RW 3] The arbitration scheme of time_slot 14 */ -#define XSEM_REG_TS_14_AS 0x280070 -/* [RW 3] The arbitration scheme of time_slot 15 */ -#define XSEM_REG_TS_15_AS 0x280074 -/* [RW 3] The arbitration scheme of time_slot 16 */ -#define XSEM_REG_TS_16_AS 0x280078 -/* [RW 3] The arbitration scheme of time_slot 17 */ -#define XSEM_REG_TS_17_AS 0x28007c -/* [RW 3] The arbitration scheme of time_slot 18 */ -#define XSEM_REG_TS_18_AS 0x280080 -/* [RW 3] The arbitration scheme of time_slot 1 */ -#define XSEM_REG_TS_1_AS 0x28003c -/* [RW 3] The arbitration scheme of time_slot 2 */ -#define XSEM_REG_TS_2_AS 0x280040 -/* [RW 3] The arbitration scheme of time_slot 3 */ -#define XSEM_REG_TS_3_AS 0x280044 -/* [RW 3] The arbitration scheme of time_slot 4 */ -#define XSEM_REG_TS_4_AS 0x280048 -/* [RW 3] The arbitration scheme of time_slot 5 */ -#define XSEM_REG_TS_5_AS 0x28004c -/* [RW 3] The arbitration scheme of time_slot 6 */ -#define XSEM_REG_TS_6_AS 0x280050 -/* [RW 3] The arbitration scheme of time_slot 7 */ -#define XSEM_REG_TS_7_AS 0x280054 -/* [RW 3] The arbitration scheme of time_slot 8 */ -#define XSEM_REG_TS_8_AS 0x280058 -/* [RW 3] The arbitration scheme of time_slot 9 */ -#define XSEM_REG_TS_9_AS 0x28005c /* [W 7] VF or PF ID for reset error bit. Values 0-63 reset error bit for 64 - VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ + * VF; values 64-67 reset error for 4 PF; values 68-127 are not valid. */ #define XSEM_REG_VFPF_ERR_NUM 0x280380 /* [RW 32] Interrupt mask register #0 read/write */ #define XSEM_REG_XSEM_INT_MASK_0 0x280110 #define XSEM_REG_XSEM_INT_MASK_1 0x280120 /* [R 32] Interrupt register #0 read */ -#define XSEM_REG_XSEM_INT_STS_0 0x280104 -#define XSEM_REG_XSEM_INT_STS_1 0x280114 +#define XSEM_REG_XSEM_INT_STS_0 0x280104 +#define XSEM_REG_XSEM_INT_STS_1 0x280114 /* [RW 32] Parity mask register #0 read/write */ #define XSEM_REG_XSEM_PRTY_MASK_0 0x280130 #define XSEM_REG_XSEM_PRTY_MASK_1 0x280140 /* [R 32] Parity register #0 read */ #define XSEM_REG_XSEM_PRTY_STS_0 0x280124 #define XSEM_REG_XSEM_PRTY_STS_1 0x280134 +/* [RC 32] Parity register #0 read clear */ +#define XSEM_REG_XSEM_PRTY_STS_CLR_0 0x280128 +#define XSEM_REG_XSEM_PRTY_STS_CLR_1 0x280138 +#define MCPR_ACCESS_LOCK_LOCK (1L<<31) +#define MCPR_IMC_COMMAND_ENABLE (1L<<31) +#define MCPR_IMC_COMMAND_IMC_STATUS_BITSHIFT 16 +#define MCPR_IMC_COMMAND_OPERATION_BITSHIFT 28 +#define MCPR_IMC_COMMAND_TRANSFER_ADDRESS_BITSHIFT 8 #define MCPR_NVM_ACCESS_ENABLE_EN (1L<<0) #define MCPR_NVM_ACCESS_ENABLE_WR_EN (1L<<1) #define MCPR_NVM_ADDR_NVM_ADDR_VALUE (0xffffffL<<0) @@ -5335,6 +3449,7 @@ #define BIGMAC_REGISTER_CNT_MAX_SIZE (0x05<<3) #define BIGMAC_REGISTER_RX_CONTROL (0x21<<3) #define BIGMAC_REGISTER_RX_LLFC_MSG_FLDS (0x46<<3) +#define BIGMAC_REGISTER_RX_LSS_STATUS (0x43<<3) #define BIGMAC_REGISTER_RX_MAX_SIZE (0x23<<3) #define BIGMAC_REGISTER_RX_STAT_GR64 (0x26<<3) #define BIGMAC_REGISTER_RX_STAT_GRIPJ (0x42<<3) @@ -5350,42 +3465,43 @@ #define BIGMAC2_REGISTER_PFC_CONTROL (0x06<<3) #define BIGMAC2_REGISTER_RX_CONTROL (0x3A<<3) #define BIGMAC2_REGISTER_RX_LLFC_MSG_FLDS (0x62<<3) +#define BIGMAC2_REGISTER_RX_LSS_STAT (0x3E<<3) #define BIGMAC2_REGISTER_RX_MAX_SIZE (0x3C<<3) #define BIGMAC2_REGISTER_RX_STAT_GR64 (0x40<<3) #define BIGMAC2_REGISTER_RX_STAT_GRIPJ (0x5f<<3) -#define BIGMAC2_REGISTER_RX_STAT_GRPP (0x51<<3) #define BIGMAC2_REGISTER_TX_CONTROL (0x1C<<3) #define BIGMAC2_REGISTER_TX_MAX_SIZE (0x1E<<3) #define BIGMAC2_REGISTER_TX_PAUSE_CONTROL (0x20<<3) -#define BIGMAC2_REGISTER_TX_SOURCE_ADDR (0x1D<<3) +#define BIGMAC2_REGISTER_TX_SOURCE_ADDR (0x1D<<3) #define BIGMAC2_REGISTER_TX_STAT_GTBYT (0x39<<3) #define BIGMAC2_REGISTER_TX_STAT_GTPOK (0x22<<3) -#define BIGMAC2_REGISTER_TX_STAT_GTPP (0x24<<3) #define EMAC_LED_1000MB_OVERRIDE (1L<<1) -#define EMAC_LED_100MB_OVERRIDE (1L<<2) +#define EMAC_LED_100MB_OVERRIDE (1L<<2) #define EMAC_LED_10MB_OVERRIDE (1L<<3) -#define EMAC_LED_2500MB_OVERRIDE (1L<<12) #define EMAC_LED_OVERRIDE (1L<<0) -#define EMAC_LED_TRAFFIC (1L<<6) #define EMAC_MDIO_COMM_COMMAND_ADDRESS (0L<<26) +#define EMAC_MDIO_COMM_COMMAND_READ_22 (2L<<26) #define EMAC_MDIO_COMM_COMMAND_READ_45 (3L<<26) -#define EMAC_MDIO_COMM_COMMAND_WRITE_45 (1L<<26) +#define EMAC_MDIO_COMM_COMMAND_WRITE_22 (1L<<26) +#define EMAC_MDIO_COMM_COMMAND_WRITE_45 (1L<<26) #define EMAC_MDIO_COMM_DATA (0xffffL<<0) #define EMAC_MDIO_COMM_START_BUSY (1L<<29) #define EMAC_MDIO_MODE_AUTO_POLL (1L<<4) #define EMAC_MDIO_MODE_CLAUSE_45 (1L<<31) -#define EMAC_MDIO_MODE_CLOCK_CNT (0x3fL<<16) +#define EMAC_MDIO_MODE_CLOCK_CNT (0x3ffL<<16) #define EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT 16 +#define EMAC_MDIO_STATUS_10MB (1L<<1) #define EMAC_MODE_25G_MODE (1L<<5) #define EMAC_MODE_HALF_DUPLEX (1L<<1) #define EMAC_MODE_PORT_GMII (2L<<2) #define EMAC_MODE_PORT_MII (1L<<2) #define EMAC_MODE_PORT_MII_10M (3L<<2) -#define EMAC_MODE_RESET (1L<<0) +#define EMAC_MODE_RESET (1L<<0) #define EMAC_REG_EMAC_LED 0xc -#define EMAC_REG_EMAC_MAC_MATCH 0x10 -#define EMAC_REG_EMAC_MDIO_COMM 0xac -#define EMAC_REG_EMAC_MDIO_MODE 0xb4 +#define EMAC_REG_EMAC_MAC_MATCH 0x10 +#define EMAC_REG_EMAC_MDIO_COMM 0xac +#define EMAC_REG_EMAC_MDIO_MODE 0xb4 +#define EMAC_REG_EMAC_MDIO_STATUS 0xb0 #define EMAC_REG_EMAC_MODE 0x0 #define EMAC_REG_EMAC_RX_MODE 0xc8 #define EMAC_REG_EMAC_RX_MTU_SIZE 0x9c @@ -5396,15 +3512,15 @@ #define EMAC_REG_EMAC_TX_STAT_AC 0x280 #define EMAC_REG_EMAC_TX_STAT_AC_COUNT 22 #define EMAC_REG_RX_PFC_MODE 0x320 -#define EMAC_REG_RX_PFC_MODE_PRIORITIES (1L<<2) +#define EMAC_REG_RX_PFC_MODE_PRIORITIES (1L<<2) #define EMAC_REG_RX_PFC_MODE_RX_EN (1L<<1) #define EMAC_REG_RX_PFC_MODE_TX_EN (1L<<0) #define EMAC_REG_RX_PFC_PARAM 0x324 #define EMAC_REG_RX_PFC_PARAM_OPCODE_BITSHIFT 0 #define EMAC_REG_RX_PFC_PARAM_PRIORITY_EN_BITSHIFT 16 -#define EMAC_REG_RX_PFC_STATS_XOFF_RCVD 0x328 +#define EMAC_REG_RX_PFC_STATS_XOFF_RCVD 0x328 #define EMAC_REG_RX_PFC_STATS_XOFF_RCVD_COUNT (0xffff<<0) -#define EMAC_REG_RX_PFC_STATS_XOFF_SENT 0x330 +#define EMAC_REG_RX_PFC_STATS_XOFF_SENT 0x330 #define EMAC_REG_RX_PFC_STATS_XOFF_SENT_COUNT (0xffff<<0) #define EMAC_REG_RX_PFC_STATS_XON_RCVD 0x32c #define EMAC_REG_RX_PFC_STATS_XON_RCVD_COUNT (0xffff<<0) @@ -5428,122 +3544,147 @@ #define MISC_REGISTERS_GPIO_FLOAT_POS 24 #define MISC_REGISTERS_GPIO_HIGH 1 #define MISC_REGISTERS_GPIO_INPUT_HI_Z 2 -#define MISC_REGISTERS_GPIO_INT_CLR_POS 24 +#define MISC_REGISTERS_GPIO_INT_CLR_POS 24 #define MISC_REGISTERS_GPIO_INT_OUTPUT_CLR 0 #define MISC_REGISTERS_GPIO_INT_OUTPUT_SET 1 -#define MISC_REGISTERS_GPIO_INT_SET_POS 16 -#define MISC_REGISTERS_GPIO_LOW 0 -#define MISC_REGISTERS_GPIO_OUTPUT_HIGH 1 +#define MISC_REGISTERS_GPIO_INT_SET_POS 16 +#define MISC_REGISTERS_GPIO_LOW 0 +#define MISC_REGISTERS_GPIO_OUTPUT_HIGH 1 #define MISC_REGISTERS_GPIO_OUTPUT_LOW 0 #define MISC_REGISTERS_GPIO_PORT_SHIFT 4 #define MISC_REGISTERS_GPIO_SET_POS 8 #define MISC_REGISTERS_RESET_REG_1_CLEAR 0x588 +#define MISC_REGISTERS_RESET_REG_1_RST_BRB1 (0x1<<0) +#define MISC_REGISTERS_RESET_REG_1_RST_DORQ (0x1<<19) #define MISC_REGISTERS_RESET_REG_1_RST_HC (0x1<<29) -#define MISC_REGISTERS_RESET_REG_1_RST_NIG (0x1<<7) #define MISC_REGISTERS_RESET_REG_1_RST_PXP (0x1<<26) #define MISC_REGISTERS_RESET_REG_1_RST_PXPV (0x1<<27) +#define MISC_REGISTERS_RESET_REG_1_RST_QM (0x1<<17) #define MISC_REGISTERS_RESET_REG_1_SET 0x584 #define MISC_REGISTERS_RESET_REG_2_CLEAR 0x598 +#define MISC_REGISTERS_RESET_REG_2_MSTAT0 (0x1<<24) +#define MISC_REGISTERS_RESET_REG_2_MSTAT1 (0x1<<25) +#define MISC_REGISTERS_RESET_REG_2_PGLC (0x1<<19) +#define MISC_REGISTERS_RESET_REG_2_RST_ATC (0x1<<17) #define MISC_REGISTERS_RESET_REG_2_RST_BMAC0 (0x1<<0) +#define MISC_REGISTERS_RESET_REG_2_RST_BMAC1 (0x1<<1) +#define MISC_REGISTERS_RESET_REG_2_RST_EMAC0 (0x1<<2) #define MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE (0x1<<14) +#define MISC_REGISTERS_RESET_REG_2_RST_EMAC1 (0x1<<3) #define MISC_REGISTERS_RESET_REG_2_RST_EMAC1_HARD_CORE (0x1<<15) #define MISC_REGISTERS_RESET_REG_2_RST_GRC (0x1<<4) #define MISC_REGISTERS_RESET_REG_2_RST_MCP_N_HARD_CORE_RST_B (0x1<<6) +#define MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CORE (0x1<<8) +#define MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_CMN_CPU (0x1<<7) #define MISC_REGISTERS_RESET_REG_2_RST_MCP_N_RESET_REG_HARD_CORE (0x1<<5) -#define MISC_REGISTERS_RESET_REG_2_RST_MDIO (0x1<<13) #define MISC_REGISTERS_RESET_REG_2_RST_MISC_CORE (0x1<<11) +#define MISC_REGISTERS_RESET_REG_2_RST_PCI_MDIO (0x1<<13) +#define MISC_REGISTERS_RESET_REG_2_RST_PXP_RQ_RD_WR (0x1<<16) #define MISC_REGISTERS_RESET_REG_2_RST_RBCN (0x1<<9) #define MISC_REGISTERS_RESET_REG_2_SET 0x594 +#define MISC_REGISTERS_RESET_REG_2_UMAC0 (0x1<<20) +#define MISC_REGISTERS_RESET_REG_2_UMAC1 (0x1<<21) +#define MISC_REGISTERS_RESET_REG_2_XMAC (0x1<<22) +#define MISC_REGISTERS_RESET_REG_2_XMAC_SOFT (0x1<<23) #define MISC_REGISTERS_RESET_REG_3_CLEAR 0x5a8 #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_IDDQ (0x1<<1) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_PWRDWN (0x1<<2) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_PWRDWN_SD (0x1<<3) -#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_RSTB_HW (0x1<<0) +#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_SERDES0_RSTB_HW (0x1<<0) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_IDDQ (0x1<<5) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_PWRDWN (0x1<<6) -#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_PWRDWN_SD (0x1<<7) +#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_PWRDWN_SD (0x1<<7) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_RSTB_HW (0x1<<4) #define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_TXD_FIFO_RSTB (0x1<<8) #define MISC_REGISTERS_RESET_REG_3_SET 0x5a4 -#define MISC_REGISTERS_SPIO_4 4 -#define MISC_REGISTERS_SPIO_5 5 -#define MISC_REGISTERS_SPIO_7 7 -#define MISC_REGISTERS_SPIO_CLR_POS 16 -#define MISC_REGISTERS_SPIO_FLOAT (0xffL<<24) -#define MISC_REGISTERS_SPIO_FLOAT_POS 24 -#define MISC_REGISTERS_SPIO_INPUT_HI_Z 2 -#define MISC_REGISTERS_SPIO_INT_OLD_SET_POS 16 -#define MISC_REGISTERS_SPIO_OUTPUT_HIGH 1 -#define MISC_REGISTERS_SPIO_OUTPUT_LOW 0 -#define MISC_REGISTERS_SPIO_SET_POS 8 +#define MISC_SPIO_CLR_POS 16 +#define MISC_SPIO_FLOAT (0xffL<<24) +#define MISC_SPIO_FLOAT_POS 24 +#define MISC_SPIO_INPUT_HI_Z 2 +#define MISC_SPIO_INT_OLD_SET_POS 16 +#define MISC_SPIO_OUTPUT_HIGH 1 +#define MISC_SPIO_OUTPUT_LOW 0 +#define MISC_SPIO_SET_POS 8 +#define MISC_SPIO_SPIO4 0x10 +#define MISC_SPIO_SPIO5 0x20 #define HW_LOCK_MAX_RESOURCE_VALUE 31 +#define HW_LOCK_RESOURCE_DRV_FLAGS 10 #define HW_LOCK_RESOURCE_GPIO 1 #define HW_LOCK_RESOURCE_MDIO 0 -#define HW_LOCK_RESOURCE_PORT0_ATT_MASK 3 -#define HW_LOCK_RESOURCE_RESERVED_08 8 +#define HW_LOCK_RESOURCE_NVRAM 12 +#define HW_LOCK_RESOURCE_PORT0_ATT_MASK 3 +#define HW_LOCK_RESOURCE_RECOVERY_LEADER_0 8 +#define HW_LOCK_RESOURCE_RECOVERY_LEADER_1 9 +#define HW_LOCK_RESOURCE_RECOVERY_REG 11 +#define HW_LOCK_RESOURCE_RESET 5 #define HW_LOCK_RESOURCE_SPIO 2 -#define HW_LOCK_RESOURCE_UNDI 5 -#define PRS_FLAG_OVERETH_IPV4 1 -#define AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT (0x1<<4) -#define AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR (0x1<<5) -#define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (0x1<<18) -#define AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT (0x1<<31) -#define AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT (0x1<<9) -#define AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR (0x1<<8) -#define AEU_INPUTS_ATTN_BITS_CFC_HW_INTERRUPT (0x1<<7) -#define AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR (0x1<<6) -#define AEU_INPUTS_ATTN_BITS_CSDM_HW_INTERRUPT (0x1<<29) -#define AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR (0x1<<28) -#define AEU_INPUTS_ATTN_BITS_CSEMI_HW_INTERRUPT (0x1<<1) -#define AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR (0x1<<0) -#define AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR (0x1<<18) -#define AEU_INPUTS_ATTN_BITS_DMAE_HW_INTERRUPT (0x1<<11) -#define AEU_INPUTS_ATTN_BITS_DOORBELLQ_HW_INTERRUPT (0x1<<13) -#define AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR (0x1<<12) -#define AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_0 (0x1<<5) -#define AEU_INPUTS_ATTN_BITS_GPIO3_FUNCTION_1 (0x1<<9) -#define AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR (0x1<<12) -#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY (0x1<<28) -#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY (0x1<<31) -#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY (0x1<<29) -#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY (0x1<<30) -#define AEU_INPUTS_ATTN_BITS_MISC_HW_INTERRUPT (0x1<<15) -#define AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR (0x1<<14) -#define AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR (0x1<<20) -#define AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR (0x1<<0) -#define AEU_INPUTS_ATTN_BITS_PBF_HW_INTERRUPT (0x1<<31) -#define AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT (0x1<<2) -#define AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR (0x1<<3) -#define AEU_INPUTS_ATTN_BITS_PXP_HW_INTERRUPT (0x1<<3) -#define AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR (0x1<<2) -#define AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_HW_INTERRUPT (0x1<<5) -#define AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR (0x1<<4) -#define AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT (0x1<<3) -#define AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR (0x1<<2) -#define AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR (0x1<<22) -#define AEU_INPUTS_ATTN_BITS_SPIO5 (0x1<<15) -#define AEU_INPUTS_ATTN_BITS_TCM_HW_INTERRUPT (0x1<<27) -#define AEU_INPUTS_ATTN_BITS_TIMERS_HW_INTERRUPT (0x1<<5) -#define AEU_INPUTS_ATTN_BITS_TSDM_HW_INTERRUPT (0x1<<25) -#define AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR (0x1<<24) -#define AEU_INPUTS_ATTN_BITS_TSEMI_HW_INTERRUPT (0x1<<29) -#define AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR (0x1<<28) -#define AEU_INPUTS_ATTN_BITS_UCM_HW_INTERRUPT (0x1<<23) -#define AEU_INPUTS_ATTN_BITS_UPB_HW_INTERRUPT (0x1<<27) -#define AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR (0x1<<26) -#define AEU_INPUTS_ATTN_BITS_USDM_HW_INTERRUPT (0x1<<21) -#define AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR (0x1<<20) -#define AEU_INPUTS_ATTN_BITS_USEMI_HW_INTERRUPT (0x1<<25) -#define AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR (0x1<<24) -#define AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR (0x1<<16) -#define AEU_INPUTS_ATTN_BITS_XCM_HW_INTERRUPT (0x1<<9) -#define AEU_INPUTS_ATTN_BITS_XSDM_HW_INTERRUPT (0x1<<7) -#define AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR (0x1<<6) -#define AEU_INPUTS_ATTN_BITS_XSEMI_HW_INTERRUPT (0x1<<11) -#define AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR (0x1<<10) +#define AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT (0x1<<4) +#define AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR (0x1<<5) +#define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (0x1<<18) +#define AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT (0x1<<31) +#define AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR (0x1<<30) +#define AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT (0x1<<9) +#define AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR (0x1<<8) +#define AEU_INPUTS_ATTN_BITS_CFC_HW_INTERRUPT (0x1<<7) +#define AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR (0x1<<6) +#define AEU_INPUTS_ATTN_BITS_CSDM_HW_INTERRUPT (0x1<<29) +#define AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR (0x1<<28) +#define AEU_INPUTS_ATTN_BITS_CSEMI_HW_INTERRUPT (0x1<<1) +#define AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR (0x1<<0) +#define AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR (0x1<<18) +#define AEU_INPUTS_ATTN_BITS_DMAE_HW_INTERRUPT (0x1<<11) +#define AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR (0x1<<10) +#define AEU_INPUTS_ATTN_BITS_DOORBELLQ_HW_INTERRUPT (0x1<<13) +#define AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR (0x1<<12) +#define AEU_INPUTS_ATTN_BITS_GPIO0_FUNCTION_0 (0x1<<2) +#define AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR (0x1<<12) +#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY (0x1<<28) +#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY (0x1<<31) +#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY (0x1<<29) +#define AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY (0x1<<30) +#define AEU_INPUTS_ATTN_BITS_MISC_HW_INTERRUPT (0x1<<15) +#define AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR (0x1<<14) +#define AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR (0x1<<14) +#define AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR (0x1<<20) +#define AEU_INPUTS_ATTN_BITS_PBCLIENT_HW_INTERRUPT (0x1<<31) +#define AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR (0x1<<30) +#define AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR (0x1<<0) +#define AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT (0x1<<2) +#define AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR (0x1<<3) +#define AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_HW_INTERRUPT (0x1<<5) +#define AEU_INPUTS_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR (0x1<<4) +#define AEU_INPUTS_ATTN_BITS_PXP_HW_INTERRUPT (0x1<<3) +#define AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR (0x1<<2) +#define AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT (0x1<<3) +#define AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR (0x1<<2) +#define AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR (0x1<<22) +#define AEU_INPUTS_ATTN_BITS_SPIO5 (0x1<<15) +#define AEU_INPUTS_ATTN_BITS_TCM_HW_INTERRUPT (0x1<<27) +#define AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR (0x1<<26) +#define AEU_INPUTS_ATTN_BITS_TIMERS_HW_INTERRUPT (0x1<<5) +#define AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR (0x1<<4) +#define AEU_INPUTS_ATTN_BITS_TSDM_HW_INTERRUPT (0x1<<25) +#define AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR (0x1<<24) +#define AEU_INPUTS_ATTN_BITS_TSEMI_HW_INTERRUPT (0x1<<29) +#define AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR (0x1<<28) +#define AEU_INPUTS_ATTN_BITS_UCM_HW_INTERRUPT (0x1<<23) +#define AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR (0x1<<22) +#define AEU_INPUTS_ATTN_BITS_UPB_HW_INTERRUPT (0x1<<27) +#define AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR (0x1<<26) +#define AEU_INPUTS_ATTN_BITS_USDM_HW_INTERRUPT (0x1<<21) +#define AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR (0x1<<20) +#define AEU_INPUTS_ATTN_BITS_USEMI_HW_INTERRUPT (0x1<<25) +#define AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR (0x1<<24) +#define AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR (0x1<<16) +#define AEU_INPUTS_ATTN_BITS_XCM_HW_INTERRUPT (0x1<<9) +#define AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR (0x1<<8) +#define AEU_INPUTS_ATTN_BITS_XSDM_HW_INTERRUPT (0x1<<7) +#define AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR (0x1<<6) +#define AEU_INPUTS_ATTN_BITS_XSEMI_HW_INTERRUPT (0x1<<11) +#define AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR (0x1<<10) #define RESERVED_GENERAL_ATTENTION_BIT_0 0 -#define EVEREST_GEN_ATTN_IN_USE_MASK 0x3ffe0 +#define EVEREST_GEN_ATTN_IN_USE_MASK 0x7ffe0 #define EVEREST_LATCHED_ATTN_IN_USE_MASK 0xffe00000 #define RESERVED_GENERAL_ATTENTION_BIT_6 6 @@ -5582,9 +3723,12 @@ #define LINK_SYNC_ATTENTION_BIT_FUNC_6 RESERVED_GENERAL_ATTENTION_BIT_18 #define LINK_SYNC_ATTENTION_BIT_FUNC_7 RESERVED_GENERAL_ATTENTION_BIT_19 -#define MCP_PFC_ATTENTION_BIT_PORT_0\ + /* Used For Error Recovery: changing this will require more \ + changes in code that assume + * error recovery uses general attn bit20 ! */ +#define ERROR_RECOVERY_ATTENTION_BIT\ RESERVED_GENERAL_ATTENTION_BIT_20 -#define MCP_PFC_ATTENTION_BIT_PORT_1\ +#define RESERVED_ATTENTION_BIT\ RESERVED_GENERAL_ATTENTION_BIT_21 #define LATCHED_ATTN_RBCR 23 @@ -5600,8 +3744,7 @@ #define LATCHED_ATTN_SCPAD_PARITY_MCP 33 #define GENERAL_ATTEN_WORD(atten_name) ((94 + atten_name) / 32) -#define GENERAL_ATTEN_OFFSET(atten_name)\ - (1UL << ((94 + atten_name) % 32)) +#define GENERAL_ATTEN_OFFSET(atten_name) (1UL << ((94 + atten_name) % 32)) /* * This file defines GRC base address for every block. * This file is included by chipsim, asm microcode and cpp microcode. @@ -5609,80 +3752,89 @@ * Use the base with the generated offsets of specific registers. */ -#define GRCBASE_PXPCS 0x000000 -#define GRCBASE_PCICONFIG 0x002000 -#define GRCBASE_PCIREG 0x002400 -#define GRCBASE_EMAC0 0x008000 -#define GRCBASE_EMAC1 0x008400 +#define GRCBASE_PXPCS 0x000000 +#define GRCBASE_PCICONFIG 0x002000 +#define GRCBASE_PCIREG 0x002400 +#define GRCBASE_EMAC0 0x008000 +#define GRCBASE_EMAC1 0x008400 #define GRCBASE_DBU 0x008800 -#define GRCBASE_PGLUE_B 0x009000 -#define GRCBASE_MISC 0x00A000 +#define GRCBASE_PGLUE_B 0x009000 +#define GRCBASE_MISC 0x00A000 #define GRCBASE_DBG 0x00C000 #define GRCBASE_NIG 0x010000 #define GRCBASE_XCM 0x020000 -#define GRCBASE_PRS 0x040000 -#define GRCBASE_SRCH 0x040400 -#define GRCBASE_TSDM 0x042000 +#define GRCBASE_PRS 0x040000 +#define GRCBASE_SRCH 0x040400 +#define GRCBASE_TSDM 0x042000 #define GRCBASE_TCM 0x050000 -#define GRCBASE_BRB1 0x060000 +#define GRCBASE_BRB1 0x060000 #define GRCBASE_MCP 0x080000 #define GRCBASE_UPB 0x0C1000 -#define GRCBASE_CSDM 0x0C2000 -#define GRCBASE_USDM 0x0C4000 +#define GRCBASE_CSDM 0x0C2000 +#define GRCBASE_USDM 0x0C4000 #define GRCBASE_CCM 0x0D0000 #define GRCBASE_UCM 0x0E0000 #define GRCBASE_CDU 0x101000 -#define GRCBASE_DMAE 0x102000 +#define GRCBASE_DMAE 0x102000 #define GRCBASE_PXP 0x103000 #define GRCBASE_CFC 0x104000 #define GRCBASE_HC 0x108000 #define GRCBASE_ATC 0x110000 -#define GRCBASE_PXP2 0x120000 +#define GRCBASE_PXP2 0x120000 #define GRCBASE_IGU 0x130000 -#define GRCBASE_PBF 0x140000 +#define GRCBASE_PBF 0x140000 #define GRCBASE_UMAC0 0x160000 #define GRCBASE_UMAC1 0x160400 -#define GRCBASE_XMAC 0x160800 -#define GRCBASE_XPB 0x161000 -#define GRCBASE_TIMERS 0x164000 -#define GRCBASE_XSDM 0x166000 +#define GRCBASE_XPB 0x161000 +#define GRCBASE_MSTAT0 0x162000 +#define GRCBASE_MSTAT1 0x162800 +#define GRCBASE_XMAC0 0x163000 +#define GRCBASE_XMAC1 0x163800 +#define GRCBASE_TIMERS 0x164000 +#define GRCBASE_XSDM 0x166000 #define GRCBASE_QM 0x168000 -#define GRCBASE_QM_4PORT 0x168000 +#define GRCBASE_QM_4PORT 0x168000 #define GRCBASE_DQ 0x170000 -#define GRCBASE_TSEM 0x180000 -#define GRCBASE_CSEM 0x200000 -#define GRCBASE_XSEM 0x280000 -#define GRCBASE_XSEM_4PORT 0x280000 -#define GRCBASE_USEM 0x300000 -#define GRCBASE_MCP_A 0x380000 -#define GRCBASE_MISC_AEU GRCBASE_MISC -#define GRCBASE_Tstorm GRCBASE_TSEM -#define GRCBASE_Cstorm GRCBASE_CSEM -#define GRCBASE_Xstorm GRCBASE_XSEM -#define GRCBASE_Ustorm GRCBASE_USEM +#define GRCBASE_TSEM 0x180000 +#define GRCBASE_CSEM 0x200000 +#define GRCBASE_XSEM 0x280000 +#define GRCBASE_XSEM_4PORT 0x280000 +#define GRCBASE_USEM 0x300000 +#define GRCBASE_MCP_A 0x380000 +#define GRCBASE_MISC_AEU GRCBASE_MISC +#define GRCBASE_Tstorm GRCBASE_TSEM +#define GRCBASE_Cstorm GRCBASE_CSEM +#define GRCBASE_Xstorm GRCBASE_XSEM +#define GRCBASE_Ustorm GRCBASE_USEM /* offset of configuration space in the pci core register */ #define PCICFG_OFFSET 0x2000 -#define PCICFG_VENDOR_ID_OFFSET 0x00 -#define PCICFG_DEVICE_ID_OFFSET 0x02 +#define PCICFG_VENDOR_ID_OFFSET 0x00 +#define PCICFG_DEVICE_ID_OFFSET 0x02 #define PCICFG_COMMAND_OFFSET 0x04 -#define PCICFG_COMMAND_IO_SPACE (1<<0) +#define PCICFG_COMMAND_IO_SPACE (1<<0) #define PCICFG_COMMAND_MEM_SPACE (1<<1) #define PCICFG_COMMAND_BUS_MASTER (1<<2) #define PCICFG_COMMAND_SPECIAL_CYCLES (1<<3) #define PCICFG_COMMAND_MWI_CYCLES (1<<4) #define PCICFG_COMMAND_VGA_SNOOP (1<<5) -#define PCICFG_COMMAND_PERR_ENA (1<<6) -#define PCICFG_COMMAND_STEPPING (1<<7) -#define PCICFG_COMMAND_SERR_ENA (1<<8) -#define PCICFG_COMMAND_FAST_B2B (1<<9) +#define PCICFG_COMMAND_PERR_ENA (1<<6) +#define PCICFG_COMMAND_STEPPING (1<<7) +#define PCICFG_COMMAND_SERR_ENA (1<<8) +#define PCICFG_COMMAND_FAST_B2B (1<<9) #define PCICFG_COMMAND_INT_DISABLE (1<<10) -#define PCICFG_COMMAND_RESERVED (0x1f<<11) +#define PCICFG_COMMAND_RESERVED (0x1f<<11) #define PCICFG_STATUS_OFFSET 0x06 -#define PCICFG_REVESION_ID_OFFSET 0x08 +#define PCICFG_REVISION_ID_OFFSET 0x08 +#define PCICFG_REVESION_ID_MASK 0xff +#define PCICFG_REVESION_ID_ERROR_VAL 0xff #define PCICFG_CACHE_LINE_SIZE 0x0c #define PCICFG_LATENCY_TIMER 0x0d +#define PCICFG_HEADER_TYPE 0x0e +#define PCICFG_HEADER_TYPE_NORMAL 0 +#define PCICFG_HEADER_TYPE_BRIDGE 1 +#define PCICFG_HEADER_TYPE_CARDBUS 2 #define PCICFG_BAR_1_LOW 0x10 #define PCICFG_BAR_1_HIGH 0x14 #define PCICFG_BAR_2_LOW 0x18 @@ -5691,7 +3843,7 @@ #define PCICFG_BAR_3_HIGH 0x24 #define PCICFG_SUBSYSTEM_VENDOR_ID_OFFSET 0x2c #define PCICFG_SUBSYSTEM_ID_OFFSET 0x2e -#define PCICFG_INT_LINE 0x3c +#define PCICFG_INT_LINE 0x3c #define PCICFG_INT_PIN 0x3d #define PCICFG_PM_CAPABILITY 0x48 #define PCICFG_PM_CAPABILITY_VERSION (0x3<<16) @@ -5699,8 +3851,8 @@ #define PCICFG_PM_CAPABILITY_RESERVED (1<<20) #define PCICFG_PM_CAPABILITY_DSI (1<<21) #define PCICFG_PM_CAPABILITY_AUX_CURRENT (0x7<<22) -#define PCICFG_PM_CAPABILITY_D1_SUPPORT (1<<25) -#define PCICFG_PM_CAPABILITY_D2_SUPPORT (1<<26) +#define PCICFG_PM_CAPABILITY_D1_SUPPORT (1<<25) +#define PCICFG_PM_CAPABILITY_D2_SUPPORT (1<<26) #define PCICFG_PM_CAPABILITY_PME_IN_D0 (1<<27) #define PCICFG_PM_CAPABILITY_PME_IN_D1 (1<<28) #define PCICFG_PM_CAPABILITY_PME_IN_D2 (1<<29) @@ -5712,18 +3864,18 @@ #define PCICFG_PM_CSR_PME_STATUS (1<<15) #define PCICFG_MSI_CAP_ID_OFFSET 0x58 #define PCICFG_MSI_CONTROL_ENABLE (0x1<<16) -#define PCICFG_MSI_CONTROL_MCAP (0x7<<17) -#define PCICFG_MSI_CONTROL_MENA (0x7<<20) +#define PCICFG_MSI_CONTROL_MCAP (0x7<<17) +#define PCICFG_MSI_CONTROL_MENA (0x7<<20) #define PCICFG_MSI_CONTROL_64_BIT_ADDR_CAP (0x1<<23) #define PCICFG_MSI_CONTROL_MSI_PVMASK_CAPABLE (0x1<<24) #define PCICFG_GRC_ADDRESS 0x78 -#define PCICFG_GRC_DATA 0x80 +#define PCICFG_GRC_DATA 0x80 #define PCICFG_ME_REGISTER 0x98 #define PCICFG_MSIX_CAP_ID_OFFSET 0xa0 #define PCICFG_MSIX_CONTROL_TABLE_SIZE (0x7ff<<16) #define PCICFG_MSIX_CONTROL_RESERVED (0x7<<27) #define PCICFG_MSIX_CONTROL_FUNC_MASK (0x1<<30) -#define PCICFG_MSIX_CONTROL_MSIX_ENABLE (0x1<<31) +#define PCICFG_MSIX_CONTROL_MSIX_ENABLE (0x1<<31) #define PCICFG_DEVICE_CONTROL 0xb4 #define PCICFG_DEVICE_CONTROL_NP_TRANSACTION_PEND (1<<21) @@ -5740,7 +3892,7 @@ /* config_2 offset */ #define GRC_CONFIG_2_SIZE_REG 0x408 #define PCI_CONFIG_2_BAR1_SIZE (0xfL<<0) -#define PCI_CONFIG_2_BAR1_SIZE_DISABLED (0L<<0) +#define PCI_CONFIG_2_BAR1_SIZE_DISABLED (0L<<0) #define PCI_CONFIG_2_BAR1_SIZE_64K (1L<<0) #define PCI_CONFIG_2_BAR1_SIZE_128K (2L<<0) #define PCI_CONFIG_2_BAR1_SIZE_256K (3L<<0) @@ -5756,7 +3908,7 @@ #define PCI_CONFIG_2_BAR1_SIZE_256M (13L<<0) #define PCI_CONFIG_2_BAR1_SIZE_512M (14L<<0) #define PCI_CONFIG_2_BAR1_SIZE_1G (15L<<0) -#define PCI_CONFIG_2_BAR1_64ENA (1L<<4) +#define PCI_CONFIG_2_BAR1_64ENA (1L<<4) #define PCI_CONFIG_2_EXP_ROM_RETRY (1L<<5) #define PCI_CONFIG_2_CFG_CYCLE_RETRY (1L<<6) #define PCI_CONFIG_2_FIRST_CFG_DONE (1L<<7) @@ -5784,8 +3936,8 @@ #define GRC_CONFIG_3_SIZE_REG 0x40c #define PCI_CONFIG_3_STICKY_BYTE (0xffL<<0) #define PCI_CONFIG_3_FORCE_PME (1L<<24) -#define PCI_CONFIG_3_PME_STATUS (1L<<25) -#define PCI_CONFIG_3_PME_ENABLE (1L<<26) +#define PCI_CONFIG_3_PME_STATUS (1L<<25) +#define PCI_CONFIG_3_PME_ENABLE (1L<<26) #define PCI_CONFIG_3_PM_STATE (0x3L<<27) #define PCI_CONFIG_3_VAUX_PRESET (1L<<30) #define PCI_CONFIG_3_PCI_POWER (1L<<31) @@ -5807,9 +3959,9 @@ in private reg space is set. This bit also exists in VF register space WC */ -#define GRC_BAR2_CONFIG 0x4e0 +#define GRC_BAR2_CONFIG 0x4e0 #define PCI_CONFIG_2_BAR2_SIZE (0xfL<<0) -#define PCI_CONFIG_2_BAR2_SIZE_DISABLED (0L<<0) +#define PCI_CONFIG_2_BAR2_SIZE_DISABLED (0L<<0) #define PCI_CONFIG_2_BAR2_SIZE_64K (1L<<0) #define PCI_CONFIG_2_BAR2_SIZE_128K (2L<<0) #define PCI_CONFIG_2_BAR2_SIZE_256K (3L<<0) @@ -5825,11 +3977,11 @@ #define PCI_CONFIG_2_BAR2_SIZE_256M (13L<<0) #define PCI_CONFIG_2_BAR2_SIZE_512M (14L<<0) #define PCI_CONFIG_2_BAR2_SIZE_1G (15L<<0) -#define PCI_CONFIG_2_BAR2_64ENA (1L<<4) +#define PCI_CONFIG_2_BAR2_64ENA (1L<<4) -#define GRC_BAR3_CONFIG 0x4f4 +#define GRC_BAR3_CONFIG 0x4f4 #define PCI_CONFIG_2_BAR3_SIZE (0xfL<<0) -#define PCI_CONFIG_2_BAR3_SIZE_DISABLED (0L<<0) +#define PCI_CONFIG_2_BAR3_SIZE_DISABLED (0L<<0) #define PCI_CONFIG_2_BAR3_SIZE_64K (1L<<0) #define PCI_CONFIG_2_BAR3_SIZE_128K (2L<<0) #define PCI_CONFIG_2_BAR3_SIZE_256K (3L<<0) @@ -5845,12 +3997,14 @@ #define PCI_CONFIG_2_BAR3_SIZE_256M (13L<<0) #define PCI_CONFIG_2_BAR3_SIZE_512M (14L<<0) #define PCI_CONFIG_2_BAR3_SIZE_1G (15L<<0) -#define PCI_CONFIG_2_BAR3_64ENA (1L<<4) +#define PCI_CONFIG_2_BAR3_64ENA (1L<<4) #define PCI_PM_DATA_A 0x410 #define PCI_PM_DATA_B 0x414 #define PCI_ID_VAL1 0x434 #define PCI_ID_VAL2 0x438 +#define PCI_ID_VAL3 0x43c +#define PCI_ID_VAL3_REVISION_ID_ERROR (0xffL<<24) #define GRC_CONFIG_REG_VF_BAR_REG_1 0x608 @@ -5866,13 +4020,13 @@ the same location for the same 4 bits*/ #define PXPCS_TL_CONTROL_5 0x814 -#define PXPCS_TL_CONTROL_5_UNKNOWNTYPE_ERR_ATTN (1 << 29) /*WC*/ +#define PXPCS_TL_CONTROL_5_UNKNOWNTYPE_ERR_ATTN (1 << 29) /*WC*/ #define PXPCS_TL_CONTROL_5_BOUNDARY4K_ERR_ATTN (1 << 28) /*WC*/ #define PXPCS_TL_CONTROL_5_MRRS_ERR_ATTN (1 << 27) /*WC*/ -#define PXPCS_TL_CONTROL_5_MPS_ERR_ATTN (1 << 26) /*WC*/ +#define PXPCS_TL_CONTROL_5_MPS_ERR_ATTN (1 << 26) /*WC*/ #define PXPCS_TL_CONTROL_5_TTX_BRIDGE_FORWARD_ERR (1 << 25) /*WC*/ #define PXPCS_TL_CONTROL_5_TTX_TXINTF_OVERFLOW (1 << 24) /*WC*/ -#define PXPCS_TL_CONTROL_5_PHY_ERR_ATTN (1 << 23) /*RO*/ +#define PXPCS_TL_CONTROL_5_PHY_ERR_ATTN (1 << 23) /*RO*/ #define PXPCS_TL_CONTROL_5_DL_ERR_ATTN (1 << 22) /*RO*/ #define PXPCS_TL_CONTROL_5_TTX_ERR_NP_TAG_IN_USE (1 << 21) /*WC*/ #define PXPCS_TL_CONTROL_5_TRX_ERR_UNEXP_RTAG (1 << 20) /*WC*/ @@ -5884,18 +4038,18 @@ #define PXPCS_TL_CONTROL_5_ERR_UNEXP_CPL1 (1 << 14) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_MASTER_ABRT1 (1 << 13) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_CPL_TIMEOUT1 (1 << 12) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_FC_PRTL1 (1 << 11) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_FC_PRTL1 (1 << 11) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_PSND_TLP1 (1 << 10) /*WC*/ -#define PXPCS_TL_CONTROL_5_PRI_SIG_TARGET_ABORT (1 << 9) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_UNSPPORT (1 << 8) /*WC*/ +#define PXPCS_TL_CONTROL_5_PRI_SIG_TARGET_ABORT (1 << 9) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_UNSPPORT (1 << 8) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_ECRC (1 << 7) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_MALF_TLP (1 << 6) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_RX_OFLOW (1 << 5) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_MALF_TLP (1 << 6) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_RX_OFLOW (1 << 5) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_UNEXP_CPL (1 << 4) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_MASTER_ABRT (1 << 3) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_CPL_TIMEOUT (1 << 2) /*WC*/ #define PXPCS_TL_CONTROL_5_ERR_FC_PRTL (1 << 1) /*WC*/ -#define PXPCS_TL_CONTROL_5_ERR_PSND_TLP (1 << 0) /*WC*/ +#define PXPCS_TL_CONTROL_5_ERR_PSND_TLP (1 << 0) /*WC*/ #define PXPCS_TL_FUNC345_STAT 0x854 @@ -6100,15 +4254,15 @@ #define BAR_DOORBELL_OFFSET 0x800000 -#define BAR_ME_REGISTER 0x450000 +#define BAR_ME_REGISTER 0x450000 #define ME_REG_PF_NUM_SHIFT 0 #define ME_REG_PF_NUM\ (7L<> 1; } diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_self_test.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_self_test.c new file mode 100644 index 0000000..9bdd2cc --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_self_test.c @@ -0,0 +1,3237 @@ +/* + * Copyright 1999-2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, + * as published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GPL is available at http://www.broadcom.com/licenses/GPLv2.php, + * or by writing to the Free Software Foundation, Inc., 59 Temple Place - + * Suite 330, Boston, MA 02111-1307, USA. + * + * Maintained by: Eilon Greenstein + * Written by: Ariel Elior + */ + +/* self test */ +#include +#include +#include "bnx2x.h" + +/*statistics and error reporting*/ +static int idle_chk_errors; +static int idle_chk_warnings; + +/* masks for all chip types */ +static int is_e1; +static int is_e1h; +static int is_e2; +static int is_e3a0; +static int is_e3b0; + +#define NA 0xCD + +#define IDLE_CHK_E1 0x01 +#define IDLE_CHK_E1H 0x02 +#define IDLE_CHK_E2 0x04 +#define IDLE_CHK_E3A0 0x08 +#define IDLE_CHK_E3B0 0x10 + +#define IDLE_CHK_ERROR 1 +#define IDLE_CHK_ERROR_NO_TRAFFIC 2 +#define IDLE_CHK_WARNING 3 + +#define MAX_FAIL_MSG 200 + +/*struct for the argument list for a predicate in the self test database*/ +struct st_pred_args { + u32 val1; /* value read from first register*/ + u32 val2; /* value read from second register, if applicable */ + u32 imm1; /* 1st value in predicate condition, left-to-right */ + u32 imm2; /* 2nd value in predicate condition, left-to-right */ + u32 imm3; /* 3rd value in predicate condition, left-to-right */ + u32 imm4; /* 4th value in predicate condition, left-to-right */ +}; + +/*struct representing self test record - a single test*/ +struct st_record { + u8 chip_mask; + u8 macro; + u32 reg1; + u32 reg2; + u16 loop; + u16 incr; + int(*predicate)(struct st_pred_args *); + u32 reg3; + u8 severity; + char *failMsg; + struct st_pred_args pred_args; +}; + +/* predicates for self test */ +static int peq(struct st_pred_args *args) +{ + return (args->val1 == args->imm1); +} + +static int pneq(struct st_pred_args *args) +{ + return (args->val1 != args->imm1); +} + +static int pand_neq(struct st_pred_args *args) +{ + return ((args->val1 & args->imm1) != args->imm2); +} + +static int pand_neq_x2(struct st_pred_args *args) +{ + return (((args->val1 & args->imm1) != args->imm2) && + ((args->val1 & args->imm3) != args->imm4)); +} + +static int pneq_err(struct st_pred_args *args) +{ + return ((args->val1 != args->imm1) && (idle_chk_errors > args->imm2)); +} + +static int pgt(struct st_pred_args *args) +{ + return (args->val1 > args->imm1); +} + +static int pneq_r2(struct st_pred_args *args) +{ + return (args->val1 != args->val2); +} + +static int plt_sub_r2(struct st_pred_args *args) +{ + return (args->val1 < (args->val2 - args->imm1)); +} + +static int pne_sub_r2(struct st_pred_args *args) +{ + return (args->val1 != (args->val2 - args->imm1)); +} + +static int prsh_and_neq(struct st_pred_args *args) +{ + return (((args->val1 >> args->imm1) & args->imm2) != args->imm3); +} + +static int peq_neq_r2(struct st_pred_args *args) +{ + return ((args->val1 == args->imm1) && (args->val2 != args->imm2)); +} + +static int peq_neq_neq_r2(struct st_pred_args *args) +{ + return ((args->val1 == args->imm1) && (args->val2 != args->imm2) && + (args->val2 != args->imm3)); +} + +/*handle self test fails according to severity and type*/ +static void bnx2x_self_test_log(struct bnx2x *bp, u8 severity, char *message) +{ + switch (severity) { + case IDLE_CHK_ERROR: + DP(NETIF_MSG_HW, "ERROR %s", message); + idle_chk_errors++; + break; + case IDLE_CHK_ERROR_NO_TRAFFIC: + DP(NETIF_MSG_HW, "INFO %s", message); + break; + case IDLE_CHK_WARNING: + DP(NETIF_MSG_HW, "WARNING %s", message); + idle_chk_warnings++; + break; + } +} + +/*specific test for QM rd/wr pointers and rd/wr banks*/ +static void bnx2x_idle_chk6(struct bnx2x *bp, + struct st_record *rec, char *message) +{ + int i; + u32 rd_ptr, wr_ptr, rd_bank, wr_bank; + for (i = 0; i < rec->loop; i++) { + + /* read regs */ + rec->pred_args.val1 = + REG_RD(bp, rec->reg1 + i * rec->incr); + rec->pred_args.val2 = + REG_RD(bp, rec->reg1 + i * rec->incr + 4); + + /* calc read and write pointers */ + rd_ptr = ((rec->pred_args.val1 & 0x3FFFFFC0) >> 6); + wr_ptr = ((((rec->pred_args.val1 & 0xC0000000) >> 30) & 0x3) | + ((rec->pred_args.val2 & 0x3FFFFF) << 2)); + + /* perfrom pointer test */ + if (rd_ptr != wr_ptr) { + snprintf(message, MAX_FAIL_MSG, "QM: PTRTBL entry %d" + "- rd_ptr is not equal to wr_ptr. Values are 0x%x and" + " 0x%x\n", i, rd_ptr, wr_ptr); + bnx2x_self_test_log(bp, rec->severity, message); + } + + /* calculate read and write banks */ + rd_bank = ((rec->pred_args.val1 & 0x30) >> 4); + wr_bank = (rec->pred_args.val1 & 0x03); + + /* perform bank test */ + if (rd_bank != wr_bank) { + snprintf(message, MAX_FAIL_MSG, "QM: PTRTBL entry" + "%d - rd_bank is not equal to wr_bank. Values are 0x%x" + "0x%x\n", i, rd_bank, wr_bank); + bnx2x_self_test_log(bp, rec->severity, message); + } + } +} + +/* specific test for cfc info ram and cid cam*/ +static void bnx2x_idle_chk7(struct bnx2x *bp, + struct st_record *rec, char *message) +{ + /* declartaions */ + int i; + + /* iterate through lcids */ + for (i = 0; i < rec->loop; i++) { + + /* make sure cam entry is valid (bit 0) */ + if ((REG_RD(bp, (rec->reg2 + i*4)) & 0x1) != 0x1) + continue; + + /* get connection type (multiple reads due to widebus) */ + REG_RD(bp, (rec->reg1 + i * rec->incr)); + REG_RD(bp, (rec->reg1 + i * rec->incr + 4)); + rec->pred_args.val1 = + REG_RD(bp, (rec->reg1 + i * rec->incr + 8)); + REG_RD(bp, (rec->reg1 + i * rec->incr + 12)); + + /* obtain connection type */ + if (is_e1 || is_e1h) { + /* E1 E1H (bits 4..7) */ + rec->pred_args.val1 &= 0x78; + rec->pred_args.val1 >>= 3; + } else { + /* E2 E3A0 E3B0 (bits 26..29) */ + rec->pred_args.val1 &= 0x1E000000; + rec->pred_args.val1 >>= 25; + } + + /* get activity counter value */ + rec->pred_args.val2 = REG_RD(bp, rec->reg3 + i * 4); + + /* validate ac value is legal for con_type at idle state */ + if (rec->predicate(&rec->pred_args)) { + snprintf(message, MAX_FAIL_MSG, "%s. Values are " + "0x%x 0x%x\n", rec->failMsg, + rec->pred_args.val1, rec->pred_args.val2); + bnx2x_self_test_log(bp, rec->severity, message); + } + } +} + +/* struct holding the database of self test checks (registers and predicates) */ +/* lines start from 2 since line 1 is heading in csv*/ +#define ST_DB_LINES 467 +static struct st_record st_database[ST_DB_LINES] = { +/*line 2*/{(0x3), 1, 0x2114, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: ucorr_err_status is not 0", + {NA, NA, 0x0FF010, 0, NA, NA} }, + +/*line 3*/{(0x3), 1, 0x2114, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "PCIE: ucorr_err_status - Unsupported request error", + {NA, NA, 0x100000, 0, NA, NA} }, + +/*line 4*/{(0x3), 1, 0x2120, + NA, 1, 0, pand_neq_x2, + NA, IDLE_CHK_WARNING, + "PCIE: corr_err_status is not 0x2000", + {NA, NA, 0x31C1, 0x2000, 0x31C1, 0} }, + +/*line 5*/{(0x3), 1, 0x2814, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: attentions register is not 0x40100", + {NA, NA, ~0x40100, 0, NA, NA} }, + +/*line 6*/{(0x2), 1, 0x281c, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: attentions register is not 0x40040100", + {NA, NA, ~0x40040100, 0, NA, NA} }, + +/*line 7*/{(0x2), 1, 0x2820, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: attentions register is not 0x40040100", + {NA, NA, ~0x40040100, 0, NA, NA} }, + +/*line 8*/{(0x3), 1, PXP2_REG_PGL_EXP_ROM2, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: There are outstanding read requests. Not all completios have " + "arrived for read requests on tags that are marked with 0", + {NA, NA, 0xffffffff, NA, NA, NA} }, + +/*line 9*/{(0x3), 2, 0x212c, + NA, 4, 4, pneq_err, + NA, IDLE_CHK_WARNING, + "PCIE: error packet header is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 10*/{(0x1C), 1, 0x2104, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: ucorr_err_status is not 0", + {NA, NA, 0x0FD010, 0, NA, NA} }, + +/*line 11*/{(0x1C), 1, 0x2104, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "PCIE: ucorr_err_status - Unsupported request error", + {NA, NA, 0x100000, 0, NA, NA} }, + +/*line 12*/{(0x1C), 1, 0x2104, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "PCIE: ucorr_err_status - Flow Control Protocol Error", + {NA, NA, 0x2000, 0, NA, NA} }, + +/*line 13*/{(0x1C), 1, 0x2110, + NA, 1, 0, pand_neq_x2, + NA, IDLE_CHK_WARNING, + "PCIE: corr_err_status is not 0x2000", + {NA, NA, 0x31C1, 0x2000, 0x31C1, 0} }, + +/*line 14*/{(0x1C), 1, 0x2814, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "PCIE: TTX_BRIDGE_FORWARD_ERR - Received master request while BME was " + "0", + {NA, NA, 0x2000000, 0, NA, NA} }, + +/*line 15*/{(0x1C), 1, 0x2814, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: Func 0 1: attentions register is not 0x2040902", + {NA, NA, ~0x2040902, 0, NA, NA} }, + +/*line 16*/{(0x1C), 1, 0x2854, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: Func 2 3 4: attentions register is not 0x10240902", + {NA, NA, ~0x10240902, 0, NA, NA} }, + +/*line 17*/{(0x1C), 1, 0x285c, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: Func 5 6 7: attentions register is not 0x10240902", + {NA, NA, ~0x10240902, 0, NA, NA} }, + +/*line 18*/{(0x18), 1, 0x3040, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "PCIE: Overflow in DLP2TLP buffer", + {NA, NA, 0x2, 0, NA, NA} }, + +/*line 19*/{(0x1C), 1, PXP2_REG_PGL_EXP_ROM2, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: There are outstanding read requests for tags 0-31. Not all " + "completios have arrived for read requests on tags that are marked " + "with 0", + {NA, NA, 0xffffffff, NA, NA, NA} }, + +/*line 20*/{(0x1C), 2, 0x211c, + NA, 4, 4, pneq_err, + NA, IDLE_CHK_WARNING, + "PCIE: error packet header is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 21*/{(0x1C), 1, PGLUE_B_REG_INCORRECT_RCV_DETAILS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PGLUE_B: Packet received from PCIe not according to the rules", + {NA, NA, 0, NA, NA, NA} }, + +/*line 22*/{(0x1C), 1, PGLUE_B_REG_WAS_ERROR_VF_31_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: was_error for VFs 0-31 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 23*/{(0x1C), 1, PGLUE_B_REG_WAS_ERROR_VF_63_32, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: was_error for VFs 32-63 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 24*/{(0x1C), 1, PGLUE_B_REG_WAS_ERROR_VF_95_64, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: was_error for VFs 64-95 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 25*/{(0x1C), 1, PGLUE_B_REG_WAS_ERROR_VF_127_96, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: was_error for VFs 96-127 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 26*/{(0x1C), 1, PGLUE_B_REG_WAS_ERROR_PF_7_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: was_error for PFs 0-7 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 27*/{(0x1C), 1, PGLUE_B_REG_RX_ERR_DETAILS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Completion received with error. (2:0) - PFID. (3) - " + "VF_VALID. (9:4) - VFID. (11:10) - Error code : 0 - Completion Timeout " + "; 1 - Unsupported Request; 2 - Completer Abort. (12) - valid bit", + {NA, NA, 0, NA, NA, NA} }, + +/*line 28*/{(0x1C), 1, PGLUE_B_REG_RX_TCPL_ERR_DETAILS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: ATS TCPL received with error. (2:0) - PFID. (3) - VF_VALID. " + "(9:4) - VFID. (11:10) - Error code : 0 - Completion Timeout ; 1 - " + "Unsupported Request; 2 - Completer Abort. (16:12) - OTB Entry ID. " + "(17) - valid bit", + {NA, NA, 0, NA, NA, NA} }, + +/*line 29*/{(0x1C), 1, PGLUE_B_REG_TX_ERR_WR_ADD_31_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Error in master write. Address(31:0) is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 30*/{(0x1C), 1, PGLUE_B_REG_TX_ERR_WR_ADD_63_32, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Error in master write. Address(63:32) is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 31*/{(0x1C), 1, PGLUE_B_REG_TX_ERR_WR_DETAILS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Error in master write. Error details register is not 0. " + "(4:0) VQID. (23:21) - PFID. (24) - VF_VALID. (30:25) - VFID", + {NA, NA, 0, NA, NA, NA} }, + +/*line 32*/{(0x1C), 1, PGLUE_B_REG_TX_ERR_WR_DETAILS2, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Error in master write. Error details 2nd register is not 0. " + "(21) - was_error set; (22) - BME cleared; (23) - FID_enable cleared; " + "(24) - VF with parent PF FLR_request or IOV_disable_request", + {NA, NA, 0, NA, NA, NA} }, + +/*line 33*/{(0x1C), 1, PGLUE_B_REG_TX_ERR_RD_ADD_31_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE: Error in master read address(31:0) is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 34*/{(0x1C), 1, PGLUE_B_REG_TX_ERR_RD_ADD_63_32, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Error in master read address(63:32) is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 35*/{(0x1C), 1, PGLUE_B_REG_TX_ERR_RD_DETAILS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Error in master read Error details register is not 0. (4:0) " + "VQID. (23:21) - PFID. (24) - VF_VALID. (30:25) - VFID", + {NA, NA, 0, NA, NA, NA} }, + +/*line 36*/{(0x1C), 1, PGLUE_B_REG_TX_ERR_RD_DETAILS2, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Error in master read Error details 2nd register is not 0. " + "(21) - was_error set; (22) - BME cleared; (23) - FID_enable cleared; " + "(24) - VF with parent PF FLR_request or IOV_disable_request", + {NA, NA, 0, NA, NA, NA} }, + +/*line 37*/{(0x1C), 1, PGLUE_B_REG_VF_LENGTH_VIOLATION_DETAILS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Target VF length violation access", + {NA, NA, 0, NA, NA, NA} }, + +/*line 38*/{(0x1C), 1, PGLUE_B_REG_VF_GRC_SPACE_VIOLATION_DETAILS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Target VF GRC space access failed permission check", + {NA, NA, 0, NA, NA, NA} }, + +/*line 39*/{(0x1C), 1, PGLUE_B_REG_TAGS_63_32, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: There are outstanding read requests for tags 32-63. Not all " + "completios have arrived for read requests on tags that are marked " + "with 0", + {NA, NA, 0xffffffff, NA, NA, NA} }, + +/*line 40*/{(0x1C), 3, PXP_REG_HST_VF_DISABLED_ERROR_VALID, + PXP_REG_HST_VF_DISABLED_ERROR_DATA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: Access to disabled VF took place", + {NA, NA, 0, NA, NA, NA} }, + +/*line 41*/{(0x1C), 1, PXP_REG_HST_PER_VIOLATION_VALID, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: Zone A permission violation occurred", + {NA, NA, 0, NA, NA, NA} }, + +/*line 42*/{(0x1C), 1, PXP_REG_HST_INCORRECT_ACCESS_VALID, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: Incorrect transaction took place", + {NA, NA, 0, NA, NA, NA} }, + +/*line 43*/{(0x1C), 1, PXP2_REG_RD_CPL_ERR_DETAILS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: Completion received with error. Error details register is not " + "0. (15:0) - ECHO. (28:16) - Sub Request length plus start_offset_2_0 " + "minus 1", + {NA, NA, 0, NA, NA, NA} }, + +/*line 44*/{(0x1C), 1, PXP2_REG_RD_CPL_ERR_DETAILS2, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: Completion received with error. Error details 2nd register is " + "not 0. (4:0) - VQ ID. (8:5) - client ID. (9) - valid bit", + {NA, NA, 0, NA, NA, NA} }, + +/*line 45*/{(0x1F), 1, PXP2_REG_RQ_VQ0_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ0 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 46*/{(0x1F), 1, PXP2_REG_RQ_VQ1_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ1 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 47*/{(0x1F), 1, PXP2_REG_RQ_VQ2_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ2 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 48*/{(0x1F), 1, PXP2_REG_RQ_VQ3_ENTRY_CNT, + NA, 1, 0, pgt, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ3 is not empty", + {NA, NA, 2, NA, NA, NA} }, + +/*line 49*/{(0x1F), 1, PXP2_REG_RQ_VQ4_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ4 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 50*/{(0x1F), 1, PXP2_REG_RQ_VQ5_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ5 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 51*/{(0x1F), 1, PXP2_REG_RQ_VQ6_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ6 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 52*/{(0x1F), 1, PXP2_REG_RQ_VQ7_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ7 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 53*/{(0x1F), 1, PXP2_REG_RQ_VQ8_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ8 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 54*/{(0x1F), 1, PXP2_REG_RQ_VQ9_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ9 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 55*/{(0x1F), 1, PXP2_REG_RQ_VQ10_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ10 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 56*/{(0x1F), 1, PXP2_REG_RQ_VQ11_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ11 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 57*/{(0x1F), 1, PXP2_REG_RQ_VQ12_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ12 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 58*/{(0x1F), 1, PXP2_REG_RQ_VQ13_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ13 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 59*/{(0x1F), 1, PXP2_REG_RQ_VQ14_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ14 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 60*/{(0x1F), 1, PXP2_REG_RQ_VQ15_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ15 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 61*/{(0x1F), 1, PXP2_REG_RQ_VQ16_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ16 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 62*/{(0x1F), 1, PXP2_REG_RQ_VQ17_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ17 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 63*/{(0x1F), 1, PXP2_REG_RQ_VQ18_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ18 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 64*/{(0x1F), 1, PXP2_REG_RQ_VQ19_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ19 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 65*/{(0x1F), 1, PXP2_REG_RQ_VQ20_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ20 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 66*/{(0x1F), 1, PXP2_REG_RQ_VQ21_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ21 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 67*/{(0x1F), 1, PXP2_REG_RQ_VQ22_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ22 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 68*/{(0x1F), 1, PXP2_REG_RQ_VQ23_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ23 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 69*/{(0x1F), 1, PXP2_REG_RQ_VQ24_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ24 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 70*/{(0x1F), 1, PXP2_REG_RQ_VQ25_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ25 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 71*/{(0x1F), 1, PXP2_REG_RQ_VQ26_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ26 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 72*/{(0x1F), 1, PXP2_REG_RQ_VQ27_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ27 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 73*/{(0x1F), 1, PXP2_REG_RQ_VQ28_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ28 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 74*/{(0x1F), 1, PXP2_REG_RQ_VQ29_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ29 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 75*/{(0x1F), 1, PXP2_REG_RQ_VQ30_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ30 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 76*/{(0x1F), 1, PXP2_REG_RQ_VQ31_ENTRY_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: VQ31 is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 77*/{(0x1F), 1, PXP2_REG_RQ_UFIFO_NUM_OF_ENTRY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: rq_ufifo_num_of_entry is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 78*/{(0x1F), 1, PXP2_REG_RQ_RBC_DONE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: rq_rbc_done is not 1", + {NA, NA, 1, NA, NA, NA} }, + +/*line 79*/{(0x1F), 1, PXP2_REG_RQ_CFG_DONE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: rq_cfg_done is not 1", + {NA, NA, 1, NA, NA, NA} }, + +/*line 80*/{(0x3), 1, PXP2_REG_PSWRQ_BW_CREDIT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: rq_read_credit and rq_write_credit are not 3", + {NA, NA, 0x1B, NA, NA, NA} }, + +/*line 81*/{(0x1F), 1, PXP2_REG_RD_START_INIT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: rd_start_init is not 1", + {NA, NA, 1, NA, NA, NA} }, + +/*line 82*/{(0x1F), 1, PXP2_REG_RD_INIT_DONE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: rd_init_done is not 1", + {NA, NA, 1, NA, NA, NA} }, + +/*line 83*/{(0x1F), 3, PXP2_REG_RD_SR_CNT, + PXP2_REG_RD_SR_NUM_CFG, 1, 0, pne_sub_r2, + NA, IDLE_CHK_WARNING, + "PXP2: rd_sr_cnt is not equal to rd_sr_num_cfg", + {NA, NA, 1, NA, NA, NA} }, + +/*line 84*/{(0x1F), 3, PXP2_REG_RD_BLK_CNT, + PXP2_REG_RD_BLK_NUM_CFG, 1, 0, pneq_r2, + NA, IDLE_CHK_WARNING, + "PXP2: rd_blk_cnt is not equal to rd_blk_num_cfg", + {NA, NA, NA, NA, NA, NA} }, + +/*line 85*/{(0x1F), 3, PXP2_REG_RD_SR_CNT, + PXP2_REG_RD_SR_NUM_CFG, 1, 0, plt_sub_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: There are more than two unused SRs", + {NA, NA, 3, NA, NA, NA} }, + +/*line 86*/{(0x1F), 3, PXP2_REG_RD_BLK_CNT, + PXP2_REG_RD_BLK_NUM_CFG, 1, 0, plt_sub_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: There are more than two unused blocks", + {NA, NA, 2, NA, NA, NA} }, + +/*line 87*/{(0x1F), 1, PXP2_REG_RD_PORT_IS_IDLE_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: P0 All delivery ports are not idle", + {NA, NA, 1, NA, NA, NA} }, + +/*line 88*/{(0x1F), 1, PXP2_REG_RD_PORT_IS_IDLE_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: P1 All delivery ports are not idle", + {NA, NA, 1, NA, NA, NA} }, + +/*line 89*/{(0x1F), 2, PXP2_REG_RD_ALMOST_FULL_0, + NA, 11, 4, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: rd_almost_full is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 90*/{(0x1F), 1, PXP2_REG_RD_DISABLE_INPUTS , + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: PSWRD inputs are disabled", + {NA, NA, 0, NA, NA, NA} }, + +/*line 91*/{(0x1F), 1, PXP2_REG_HST_HEADER_FIFO_STATUS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: HST header FIFO status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 92*/{(0x1F), 1, PXP2_REG_HST_DATA_FIFO_STATUS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: HST data FIFO status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 93*/{(0x3), 1, PXP2_REG_PGL_WRITE_BLOCKED, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: pgl_write_blocked is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 94*/{(0x3), 1, PXP2_REG_PGL_READ_BLOCKED, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: pgl_read_blocked is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 95*/{(0x1C), 1, PXP2_REG_PGL_WRITE_BLOCKED, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: pgl_write_blocked is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 96*/{(0x1C), 1, PXP2_REG_PGL_READ_BLOCKED, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: pgl_read_blocked is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 97*/{(0x1F), 1, PXP2_REG_PGL_TXW_CDTS, + NA, 1, 0, prsh_and_neq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PXP2: There is data which is ready", + {NA, NA, 17, 1, 0, NA} }, + +/*line 98*/{(0x1F), 1, PXP_REG_HST_ARB_IS_IDLE, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: HST arbiter is not idle", + {NA, NA, 1, NA, NA, NA} }, + +/*line 99*/{(0x1F), 1, PXP_REG_HST_CLIENTS_WAITING_TO_ARB, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: HST one of the clients is waiting for delivery", + {NA, NA, 0, NA, NA, NA} }, + +/*line 100*/{(0x1E), 1, PXP_REG_HST_DISCARD_INTERNAL_WRITES_STATUS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: HST Close the gates: Discarding internal writes", + {NA, NA, 0, NA, NA, NA} }, + +/*line 101*/{(0x1E), 1, PXP_REG_HST_DISCARD_DOORBELLS_STATUS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: HST Close the gates: Discarding doorbells", + {NA, NA, 0, NA, NA, NA} }, + +/*line 102*/{(0x1C), 1, PXP2_REG_RQ_GARB, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "PXP2: PSWRQ Close the gates is asserted. Check AEU AFTER_INVERT " + "registers for parity errors", + {NA, NA, 0x1000, 0, NA, NA} }, + +/*line 103*/{(0x1F), 1, DMAE_REG_GO_C0, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 0 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 104*/{(0x1F), 1, DMAE_REG_GO_C1, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 1 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 105*/{(0x1F), 1, DMAE_REG_GO_C2, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 2 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 106*/{(0x1F), 1, DMAE_REG_GO_C3, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 3 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 107*/{(0x1F), 1, DMAE_REG_GO_C4, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 4 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 108*/{(0x1F), 1, DMAE_REG_GO_C5, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 5 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 109*/{(0x1F), 1, DMAE_REG_GO_C6, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 6 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 110*/{(0x1F), 1, DMAE_REG_GO_C7, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 7 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 111*/{(0x1F), 1, DMAE_REG_GO_C8, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 8 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 112*/{(0x1F), 1, DMAE_REG_GO_C9, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 9 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 113*/{(0x1F), 1, DMAE_REG_GO_C10, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 10 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 114*/{(0x1F), 1, DMAE_REG_GO_C11, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 11 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 115*/{(0x1F), 1, DMAE_REG_GO_C12, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 12 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 116*/{(0x1F), 1, DMAE_REG_GO_C13, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 13 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 117*/{(0x1F), 1, DMAE_REG_GO_C14, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 14 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 118*/{(0x1F), 1, DMAE_REG_GO_C15, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DMAE: command 15 go is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 119*/{(0x1F), 1, CFC_REG_ERROR_VECTOR, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CFC: error vector is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 120*/{(0x1F), 1, CFC_REG_NUM_LCIDS_ARRIVING, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CFC: number of arriving LCIDs is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 121*/{(0x1F), 1, CFC_REG_NUM_LCIDS_ALLOC, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CFC: number of alloc LCIDs is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 122*/{(0x1F), 1, CFC_REG_NUM_LCIDS_LEAVING, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CFC: number of leaving LCIDs is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 123*/{(0x1F), 7, CFC_REG_INFO_RAM, + CFC_REG_CID_CAM, (CFC_REG_INFO_RAM_SIZE >> 4), 16, peq_neq_neq_r2, + CFC_REG_ACTIVITY_COUNTER, IDLE_CHK_ERROR_NO_TRAFFIC, + "CFC: AC is neither 0 nor 2 on connType 0 (ETH)", + {NA, NA, 0, 0, 2, NA} }, + +/*line 124*/{(0x1F), 7, CFC_REG_INFO_RAM, + CFC_REG_CID_CAM, (CFC_REG_INFO_RAM_SIZE >> 4), 16, peq_neq_r2, + CFC_REG_ACTIVITY_COUNTER, IDLE_CHK_ERROR_NO_TRAFFIC, + "CFC: AC is not 0 on connType 1 (TOE)", + {NA, NA, 1, 0, NA, NA} }, + +/*line 125*/{(0x1F), 7, CFC_REG_INFO_RAM, + CFC_REG_CID_CAM, (CFC_REG_INFO_RAM_SIZE >> 4), 16, peq_neq_r2, + CFC_REG_ACTIVITY_COUNTER, IDLE_CHK_ERROR_NO_TRAFFIC, + "CFC: AC is not 0 on connType 3 (iSCSI)", + {NA, NA, 3, 0, NA, NA} }, + +/*line 126*/{(0x1F), 7, CFC_REG_INFO_RAM, + CFC_REG_CID_CAM, (CFC_REG_INFO_RAM_SIZE >> 4), 16, peq_neq_r2, + CFC_REG_ACTIVITY_COUNTER, IDLE_CHK_ERROR_NO_TRAFFIC, + "CFC: AC is not 0 on connType 4 (FCoE)", + {NA, NA, 4, 0, NA, NA} }, + +/*line 127*/{(0x1F), 2, QM_REG_QTASKCTR_0, + NA, 64, 4, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Queue is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 128*/{(0xF), 3, QM_REG_VOQCREDIT_0, + QM_REG_VOQINITCREDIT_0, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_0, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 129*/{(0xF), 3, QM_REG_VOQCREDIT_1, + QM_REG_VOQINITCREDIT_1, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_1, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 130*/{(0xF), 3, QM_REG_VOQCREDIT_4, + QM_REG_VOQINITCREDIT_4, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR, + "QM: VOQ_4, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 131*/{(0x3), 3, QM_REG_PORT0BYTECRD, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: P0 Byte credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 132*/{(0x3), 3, QM_REG_PORT1BYTECRD, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: P1 Byte credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 133*/{(0x1F), 1, CCM_REG_CAM_OCCUP, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CCM: XX protection CAM is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 134*/{(0x1F), 1, TCM_REG_CAM_OCCUP, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: XX protection CAM is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 135*/{(0x1F), 1, UCM_REG_CAM_OCCUP, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "UCM: XX protection CAM is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 136*/{(0x1F), 1, XCM_REG_CAM_OCCUP, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XCM: XX protection CAM is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 137*/{(0x1F), 1, BRB1_REG_NUM_OF_FULL_BLOCKS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "BRB1: BRB is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 138*/{(0x1F), 1, CSEM_REG_SLEEP_THREADS_VALID, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSEM: There are sleeping threads", + {NA, NA, 0, NA, NA, NA} }, + +/*line 139*/{(0x1F), 1, TSEM_REG_SLEEP_THREADS_VALID, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSEM: There are sleeping threads", + {NA, NA, 0, NA, NA, NA} }, + +/*line 140*/{(0x1F), 1, USEM_REG_SLEEP_THREADS_VALID, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USEM: There are sleeping threads", + {NA, NA, 0, NA, NA, NA} }, + +/*line 141*/{(0x1F), 1, XSEM_REG_SLEEP_THREADS_VALID, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XSEM: There are sleeping threads", + {NA, NA, 0, NA, NA, NA} }, + +/*line 142*/{(0x1F), 1, CSEM_REG_SLOW_EXT_STORE_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSEM: External store FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 143*/{(0x1F), 1, TSEM_REG_SLOW_EXT_STORE_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSEM: External store FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 144*/{(0x1F), 1, USEM_REG_SLOW_EXT_STORE_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USEM: External store FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 145*/{(0x1F), 1, XSEM_REG_SLOW_EXT_STORE_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XSEM: External store FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 146*/{(0x1F), 1, CSDM_REG_SYNC_PARSER_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSDM: Parser serial FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 147*/{(0x1F), 1, TSDM_REG_SYNC_PARSER_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSDM: Parser serial FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 148*/{(0x1F), 1, USDM_REG_SYNC_PARSER_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USDM: Parser serial FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 149*/{(0x1F), 1, XSDM_REG_SYNC_PARSER_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XSDM: Parser serial FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 150*/{(0x1F), 1, CSDM_REG_SYNC_SYNC_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSDM: Parser SYNC serial FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 151*/{(0x1F), 1, TSDM_REG_SYNC_SYNC_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSDM: Parser SYNC serial FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 152*/{(0x1F), 1, USDM_REG_SYNC_SYNC_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USDM: Parser SYNC serial FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 153*/{(0x1F), 1, XSDM_REG_SYNC_SYNC_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XSDM: Parser SYNC serial FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 154*/{(0x1F), 1, CSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSDM: pxp_ctrl rd_data fifo is not empty in sdm_dma_rsp block", + {NA, NA, 1, NA, NA, NA} }, + +/*line 155*/{(0x1F), 1, TSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSDM: pxp_ctrl rd_data fifo is not empty in sdm_dma_rsp block", + {NA, NA, 1, NA, NA, NA} }, + +/*line 156*/{(0x1F), 1, USDM_REG_RSP_PXP_CTRL_RDATA_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USDM: pxp_ctrl rd_data fifo is not empty in sdm_dma_rsp block", + {NA, NA, 1, NA, NA, NA} }, + +/*line 157*/{(0x1F), 1, XSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XSDM: pxp_ctrl rd_data fifo is not empty in sdm_dma_rsp block", + {NA, NA, 1, NA, NA, NA} }, + +/*line 158*/{(0x1F), 1, DORQ_REG_DQ_FILL_LVLF, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DORQ: DORQ queue is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 159*/{(0x1F), 1, CFC_REG_CFC_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CFC: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 160*/{(0x1F), 1, CDU_REG_CDU_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CDU: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 161*/{(0x1F), 1, CCM_REG_CCM_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 162*/{(0x1F), 1, TCM_REG_TCM_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 163*/{(0x1F), 1, UCM_REG_UCM_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 164*/{(0x1F), 1, XCM_REG_XCM_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 165*/{(0xF), 1, PBF_REG_PBF_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PBF: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 166*/{(0x1F), 1, TM_REG_TM_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TIMERS: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 167*/{(0x1F), 1, DORQ_REG_DORQ_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "DORQ: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 168*/{(0x1F), 1, SRC_REG_SRC_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "SRCH: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 169*/{(0x1F), 1, PRS_REG_PRS_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PRS: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 170*/{(0x1F), 1, BRB1_REG_BRB1_INT_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "BRB1: Interrupt status is not 0", + {NA, NA, ~0xFC00, 0, NA, NA} }, + +/*line 171*/{(0x1F), 1, GRCBASE_XPB + PB_REG_PB_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XPB: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 172*/{(0x1F), 1, GRCBASE_UPB + PB_REG_PB_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UPB: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 173*/{(0x1), 1, PXP2_REG_PXP2_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: Interrupt status 0 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 174*/{(0x1E), 1, PXP2_REG_PXP2_INT_STS_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: Interrupt status 0 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 175*/{(0x1E), 1, PXP2_REG_PXP2_INT_STS_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: Interrupt status 1 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 176*/{(0x1F), 1, QM_REG_QM_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 177*/{(0x1F), 1, PXP_REG_PXP_INT_STS_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: P0 Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 178*/{(0x1F), 1, PXP_REG_PXP_INT_STS_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: P1 Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 179*/{(0x1C), 1, PGLUE_B_REG_PGLUE_B_INT_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: Interrupt status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 180*/{(0x1F), 1, DORQ_REG_RSPA_CRD_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "DORQ: Credit to XCM is not full", + {NA, NA, 2, NA, NA, NA} }, + +/*line 181*/{(0x1F), 1, DORQ_REG_RSPB_CRD_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "DORQ: Credit to UCM is not full", + {NA, NA, 2, NA, NA, NA} }, + +/*line 182*/{(0x3), 1, QM_REG_VOQCRDERRREG, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: Credit error register is not 0 (byte or credit " + "overflow/underflow)", + {NA, NA, 0, NA, NA, NA} }, + +/*line 183*/{(0x1F), 1, DORQ_REG_DQ_FULL_ST, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "DORQ: DORQ queue is full", + {NA, NA, 0, NA, NA, NA} }, + +/*line 184*/{(0x1F), 1, MISC_REG_AEU_AFTER_INVERT_1_FUNC_0, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "AEU: P0 AFTER_INVERT_1 is not 0", + {NA, NA, ~0xCFFC, 0, NA, NA} }, + +/*line 185*/{(0x1F), 1, MISC_REG_AEU_AFTER_INVERT_2_FUNC_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "AEU: P0 AFTER_INVERT_2 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 186*/{(0x1F), 1, MISC_REG_AEU_AFTER_INVERT_3_FUNC_0, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "AEU: P0 AFTER_INVERT_3 is not 0", + {NA, NA, ~0xC3FF0000, 0, NA, NA} }, + +/*line 187*/{(0x1F), 1, MISC_REG_AEU_AFTER_INVERT_4_FUNC_0, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "AEU: P0 AFTER_INVERT_4 is not 0", + {NA, NA, ~0x801FFFFF, 0, NA, NA} }, + +/*line 188*/{(0x3), 1, MISC_REG_AEU_AFTER_INVERT_1_FUNC_1, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "AEU: P1 AFTER_INVERT_1 is not 0", + {NA, NA, ~0xCFFC, 0, NA, NA} }, + +/*line 189*/{(0x3), 1, MISC_REG_AEU_AFTER_INVERT_2_FUNC_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "AEU: P1 AFTER_INVERT_2 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 190*/{(0x3), 1, MISC_REG_AEU_AFTER_INVERT_3_FUNC_1, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "AEU: P1 AFTER_INVERT_3 is not 0", + {NA, NA, ~0xC3FF0000, 0, NA, NA} }, + +/*line 191*/{(0x3), 1, MISC_REG_AEU_AFTER_INVERT_4_FUNC_1, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "AEU: P1 AFTER_INVERT_4 is not 0", + {NA, NA, ~0x801FFFFF, 0, NA, NA} }, + +/*line 192*/{(0x1F), 1, MISC_REG_AEU_AFTER_INVERT_1_MCP, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "AEU: MCP AFTER_INVERT_1 is not 0", + {NA, NA, ~0xCFFC, 0, NA, NA} }, + +/*line 193*/{(0x1F), 1, MISC_REG_AEU_AFTER_INVERT_2_MCP, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "AEU: MCP AFTER_INVERT_2 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 194*/{(0x1F), 1, MISC_REG_AEU_AFTER_INVERT_3_MCP, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "AEU: MCP AFTER_INVERT_3 is not 0", + {NA, NA, ~0xC3FF0000, 0, NA, NA} }, + +/*line 195*/{(0x1F), 1, MISC_REG_AEU_AFTER_INVERT_4_MCP, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "AEU: MCP AFTER_INVERT_4 is not 0", + {NA, NA, ~0x801FFFFF, 0, NA, NA} }, + +/*line 196*/{(0xF), 5, PBF_REG_P0_CREDIT, + PBF_REG_P0_INIT_CRD, 1, 0, pneq_r2, + PBF_REG_DISABLE_NEW_TASK_PROC_P0, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: P0 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 197*/{(0xF), 5, PBF_REG_P1_CREDIT, + PBF_REG_P1_INIT_CRD, 1, 0, pneq_r2, + PBF_REG_DISABLE_NEW_TASK_PROC_P1, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: P1 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 198*/{(0xF), 3, PBF_REG_P4_CREDIT, + PBF_REG_P4_INIT_CRD, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR, + "PBF: P4 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 199*/{(0x10), 5, PBF_REG_CREDIT_Q0, + PBF_REG_INIT_CRD_Q0, 1, 0, pneq_r2, + PBF_REG_DISABLE_NEW_TASK_PROC_Q0, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q0 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 200*/{(0x10), 5, PBF_REG_CREDIT_Q1, + PBF_REG_INIT_CRD_Q1, 1, 0, pneq_r2, + PBF_REG_DISABLE_NEW_TASK_PROC_Q1, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q1 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 201*/{(0x10), 5, PBF_REG_CREDIT_Q2, + PBF_REG_INIT_CRD_Q2, 1, 0, pneq_r2, + PBF_REG_DISABLE_NEW_TASK_PROC_Q2, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q2 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 202*/{(0x10), 5, PBF_REG_CREDIT_Q3, + PBF_REG_INIT_CRD_Q3, 1, 0, pneq_r2, + PBF_REG_DISABLE_NEW_TASK_PROC_Q3, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q3 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 203*/{(0x10), 5, PBF_REG_CREDIT_Q4, + PBF_REG_INIT_CRD_Q4, 1, 0, pneq_r2, + PBF_REG_DISABLE_NEW_TASK_PROC_Q4, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q4 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 204*/{(0x10), 5, PBF_REG_CREDIT_Q5, + PBF_REG_INIT_CRD_Q5, 1, 0, pneq_r2, + PBF_REG_DISABLE_NEW_TASK_PROC_Q5, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q5 credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 205*/{(0x10), 3, PBF_REG_CREDIT_LB_Q, + PBF_REG_INIT_CRD_LB_Q, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR, + "PBF: LB Q credit is not equal to init_crd", + {NA, NA, NA, NA, NA, NA} }, + +/*line 206*/{(0xF), 1, PBF_REG_P0_TASK_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: P0 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 207*/{(0xF), 1, PBF_REG_P1_TASK_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: P1 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 208*/{(0xF), 1, PBF_REG_P4_TASK_CNT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PBF: P4 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 209*/{(0x10), 1, PBF_REG_TASK_CNT_Q0, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q0 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 210*/{(0x10), 1, PBF_REG_TASK_CNT_Q1, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q1 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 211*/{(0x10), 1, PBF_REG_TASK_CNT_Q2, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q2 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 212*/{(0x10), 1, PBF_REG_TASK_CNT_Q3, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q3 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 213*/{(0x10), 1, PBF_REG_TASK_CNT_Q4, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q4 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 214*/{(0x10), 1, PBF_REG_TASK_CNT_Q5, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: Q5 task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 215*/{(0x10), 1, PBF_REG_TASK_CNT_LB_Q, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PBF: LB Q task_cnt is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 216*/{(0x1F), 1, XCM_REG_CFC_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: CFC_INIT_CRD is not 1", + {NA, NA, 1, NA, NA, NA} }, + +/*line 217*/{(0x1F), 1, UCM_REG_CFC_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: CFC_INIT_CRD is not 1", + {NA, NA, 1, NA, NA, NA} }, + +/*line 218*/{(0x1F), 1, TCM_REG_CFC_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: CFC_INIT_CRD is not 1", + {NA, NA, 1, NA, NA, NA} }, + +/*line 219*/{(0x1F), 1, CCM_REG_CFC_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CCM: CFC_INIT_CRD is not 1", + {NA, NA, 1, NA, NA, NA} }, + +/*line 220*/{(0x1F), 1, XCM_REG_XQM_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: XQM_INIT_CRD is not 32", + {NA, NA, 32, NA, NA, NA} }, + +/*line 221*/{(0x1F), 1, UCM_REG_UQM_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: UQM_INIT_CRD is not 32", + {NA, NA, 32, NA, NA, NA} }, + +/*line 222*/{(0x1F), 1, TCM_REG_TQM_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: TQM_INIT_CRD is not 32", + {NA, NA, 32, NA, NA, NA} }, + +/*line 223*/{(0x1F), 1, CCM_REG_CQM_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CCM: CQM_INIT_CRD is not 32", + {NA, NA, 32, NA, NA, NA} }, + +/*line 224*/{(0x1F), 1, XCM_REG_TM_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: TM_INIT_CRD is not 4", + {NA, NA, 4, NA, NA, NA} }, + +/*line 225*/{(0x1F), 1, UCM_REG_TM_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: TM_INIT_CRD is not 4", + {NA, NA, 4, NA, NA, NA} }, + +/*line 226*/{(0x1F), 1, XCM_REG_FIC0_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "XCM: FIC0_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 227*/{(0x1F), 1, UCM_REG_FIC0_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "UCM: FIC0_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 228*/{(0x1F), 1, TCM_REG_FIC0_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TCM: FIC0_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 229*/{(0x1F), 1, CCM_REG_FIC0_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CCM: FIC0_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 230*/{(0x1F), 1, XCM_REG_FIC1_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: FIC1_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 231*/{(0xF), 1, UCM_REG_FIC1_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: FIC1_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 232*/{(0x10), 1, UCM_REG_FIC1_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "UCM: FIC1_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 233*/{(0x1F), 1, TCM_REG_FIC1_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: FIC1_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 234*/{(0x1F), 1, CCM_REG_FIC1_INIT_CRD, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: FIC1_INIT_CRD is not 64", + {NA, NA, 64, NA, NA, NA} }, + +/*line 235*/{(0x1), 1, XCM_REG_XX_FREE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: XX_FREE differs from expected 31", + {NA, NA, 31, NA, NA, NA} }, + +/*line 236*/{(0x1E), 1, XCM_REG_XX_FREE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: XX_FREE differs from expected 32", + {NA, NA, 32, NA, NA, NA} }, + +/*line 237*/{(0x1F), 1, UCM_REG_XX_FREE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "UCM: XX_FREE differs from expected 27", + {NA, NA, 27, NA, NA, NA} }, + +/*line 238*/{(0x7), 1, TCM_REG_XX_FREE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: XX_FREE differs from expected 32", + {NA, NA, 32, NA, NA, NA} }, + +/*line 239*/{(0x18), 1, TCM_REG_XX_FREE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: XX_FREE differs from expected 29", + {NA, NA, 29, NA, NA, NA} }, + +/*line 240*/{(0x1F), 1, CCM_REG_XX_FREE, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: XX_FREE differs from expected 24", + {NA, NA, 24, NA, NA, NA} }, + +/*line 241*/{(0x1F), 1, XSEM_REG_FAST_MEMORY + 0x18000, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XSEM: FOC0 credit less than initial credit", + {NA, NA, 0, NA, NA, NA} }, + +/*line 242*/{(0x1F), 1, XSEM_REG_FAST_MEMORY + 0x18040, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XSEM: FOC1 credit less than initial credit", + {NA, NA, 24, NA, NA, NA} }, + +/*line 243*/{(0x1F), 1, XSEM_REG_FAST_MEMORY + 0x18080, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "XSEM: FOC2 credit less than initial credit", + {NA, NA, 12, NA, NA, NA} }, + +/*line 244*/{(0x1F), 1, USEM_REG_FAST_MEMORY + 0x18000, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USEM: FOC0 credit less than initial credit", + {NA, NA, 26, NA, NA, NA} }, + +/*line 245*/{(0x1F), 1, USEM_REG_FAST_MEMORY + 0x18040, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USEM: FOC1 credit less than initial credit", + {NA, NA, 78, NA, NA, NA} }, + +/*line 246*/{(0x1F), 1, USEM_REG_FAST_MEMORY + 0x18080, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USEM: FOC2 credit less than initial credit", + {NA, NA, 16, NA, NA, NA} }, + +/*line 247*/{(0x1F), 1, USEM_REG_FAST_MEMORY + 0x180C0, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "USEM: FOC3 credit less than initial credit", + {NA, NA, 32, NA, NA, NA} }, + +/*line 248*/{(0x1F), 1, TSEM_REG_FAST_MEMORY + 0x18000, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSEM: FOC0 credit less than initial credit", + {NA, NA, 52, NA, NA, NA} }, + +/*line 249*/{(0x1F), 1, TSEM_REG_FAST_MEMORY + 0x18040, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSEM: FOC1 credit less than initial credit", + {NA, NA, 24, NA, NA, NA} }, + +/*line 250*/{(0x1F), 1, TSEM_REG_FAST_MEMORY + 0x18080, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSEM: FOC2 credit less than initial credit", + {NA, NA, 12, NA, NA, NA} }, + +/*line 251*/{(0x1F), 1, TSEM_REG_FAST_MEMORY + 0x180C0, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "TSEM: FOC3 credit less than initial credit", + {NA, NA, 32, NA, NA, NA} }, + +/*line 252*/{(0x1F), 1, CSEM_REG_FAST_MEMORY + 0x18000, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSEM: FOC0 credit less than initial credit", + {NA, NA, 16, NA, NA, NA} }, + +/*line 253*/{(0x1F), 1, CSEM_REG_FAST_MEMORY + 0x18040, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSEM: FOC1 credit less than initial credit", + {NA, NA, 18, NA, NA, NA} }, + +/*line 254*/{(0x1F), 1, CSEM_REG_FAST_MEMORY + 0x18080, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSEM: FOC2 credit less than initial credit", + {NA, NA, 48, NA, NA, NA} }, + +/*line 255*/{(0x1F), 1, CSEM_REG_FAST_MEMORY + 0x180C0, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "CSEM: FOC3 credit less than initial credit", + {NA, NA, 14, NA, NA, NA} }, + +/*line 256*/{(0x1F), 1, PRS_REG_TSDM_CURRENT_CREDIT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PRS: TSDM current credit is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 257*/{(0x1F), 1, PRS_REG_TCM_CURRENT_CREDIT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PRS: TCM current credit is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 258*/{(0x1F), 1, PRS_REG_CFC_LD_CURRENT_CREDIT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PRS: CFC_LD current credit is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 259*/{(0x1F), 1, PRS_REG_CFC_SEARCH_CURRENT_CREDIT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PRS: CFC_SEARCH current credit is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 260*/{(0x1F), 1, PRS_REG_SRC_CURRENT_CREDIT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PRS: SRCH current credit is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 261*/{(0x1F), 1, PRS_REG_PENDING_BRB_PRS_RQ, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PRS: PENDING_BRB_PRS_RQ is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 262*/{(0x1F), 2, PRS_REG_PENDING_BRB_CAC0_RQ, + NA, 5, 4, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PRS: PENDING_BRB_CAC_RQ is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 263*/{(0x1F), 1, PRS_REG_SERIAL_NUM_STATUS_LSB, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PRS: SERIAL_NUM_STATUS_LSB is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 264*/{(0x1F), 1, PRS_REG_SERIAL_NUM_STATUS_MSB, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "PRS: SERIAL_NUM_STATUS_MSB is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 265*/{(0x1F), 1, CDU_REG_ERROR_DATA, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CDU: ERROR_DATA is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 266*/{(0x1F), 1, CCM_REG_STORM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: STORM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 267*/{(0x1F), 1, CCM_REG_CSDM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: CSDM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 268*/{(0x1F), 1, CCM_REG_TSEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: TSEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 269*/{(0x1F), 1, CCM_REG_XSEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: XSEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 270*/{(0x1F), 1, CCM_REG_USEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: USEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 271*/{(0x1F), 1, CCM_REG_PBF_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "CCM: PBF declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 272*/{(0x1F), 1, TCM_REG_STORM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: STORM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 273*/{(0x1F), 1, TCM_REG_TSDM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: TSDM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 274*/{(0x1F), 1, TCM_REG_PRS_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: PRS declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 275*/{(0x1F), 1, TCM_REG_PBF_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: PBF declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 276*/{(0x1F), 1, TCM_REG_USEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: USEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 277*/{(0x1F), 1, TCM_REG_CSEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "TCM: CSEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 278*/{(0x1F), 1, UCM_REG_STORM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: STORM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 279*/{(0x1F), 1, UCM_REG_USDM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: USDM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 280*/{(0x1F), 1, UCM_REG_TSEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: TSEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 281*/{(0x1F), 1, UCM_REG_CSEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: CSEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 282*/{(0x1F), 1, UCM_REG_XSEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: XSEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 283*/{(0x1F), 1, UCM_REG_DORQ_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "UCM: DORQ declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 284*/{(0x1F), 1, XCM_REG_STORM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: STORM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 285*/{(0x1F), 1, XCM_REG_XSDM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: XSDM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 286*/{(0x1F), 1, XCM_REG_TSEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: TSEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 287*/{(0x1F), 1, XCM_REG_CSEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: CSEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 288*/{(0x1F), 1, XCM_REG_USEM_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: USEM declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 289*/{(0x1F), 1, XCM_REG_DORQ_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: DORQ declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 290*/{(0x1F), 1, XCM_REG_PBF_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: PBF declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 291*/{(0x1F), 1, XCM_REG_NIG0_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: NIG0 declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 292*/{(0x1F), 1, XCM_REG_NIG1_LENGTH_MIS, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "XCM: NIG1 declared message length unequal to actual", + {NA, NA, 0, NA, NA, NA} }, + +/*line 293*/{(0x1F), 1, QM_REG_XQM_WRC_FIFOLVL, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: XQM wrc_fifolvl is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 294*/{(0x1F), 1, QM_REG_UQM_WRC_FIFOLVL, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: UQM wrc_fifolvl is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 295*/{(0x1F), 1, QM_REG_TQM_WRC_FIFOLVL, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: TQM wrc_fifolvl is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 296*/{(0x1F), 1, QM_REG_CQM_WRC_FIFOLVL, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: CQM wrc_fifolvl is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 297*/{(0x1F), 1, QM_REG_QSTATUS_LOW, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: QSTATUS_LOW is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 298*/{(0x1F), 1, QM_REG_QSTATUS_HIGH, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: QSTATUS_HIGH is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 299*/{(0x1F), 1, QM_REG_PAUSESTATE0, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: PAUSESTATE0 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 300*/{(0x1F), 1, QM_REG_PAUSESTATE1, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: PAUSESTATE1 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 301*/{(0x1F), 1, QM_REG_OVFQNUM, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: OVFQNUM is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 302*/{(0x1F), 1, QM_REG_OVFERROR, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: OVFERROR is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 303*/{(0x1F), 6, QM_REG_PTRTBL, + NA, 64, 8, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: read and write variables not equal", + {NA, NA, NA, NA, NA, NA} }, + +/*line 304*/{(0x1F), 1, BRB1_REG_BRB1_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "BRB1: parity status is not 0", + {NA, NA, ~0x8, 0, NA, NA} }, + +/*line 305*/{(0x1F), 1, CDU_REG_CDU_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "CDU: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 306*/{(0x1F), 1, CFC_REG_CFC_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "CFC: parity status is not 0", + {NA, NA, ~0x2, 0, NA, NA} }, + +/*line 307*/{(0x1F), 1, CSDM_REG_CSDM_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "CSDM: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 308*/{(0x3), 1, DBG_REG_DBG_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "DBG: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 309*/{(0x1F), 1, DMAE_REG_DMAE_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "DMAE: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 310*/{(0x1F), 1, DORQ_REG_DORQ_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "DORQ: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 311*/{(0x1), 1, TCM_REG_TCM_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "TCM: parity status is not 0", + {NA, NA, ~0x3ffc0, 0, NA, NA} }, + +/*line 312*/{(0x1E), 1, TCM_REG_TCM_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "TCM: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 313*/{(0x1), 1, CCM_REG_CCM_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "CCM: parity status is not 0", + {NA, NA, ~0x3ffc0, 0, NA, NA} }, + +/*line 314*/{(0x1E), 1, CCM_REG_CCM_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "CCM: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 315*/{(0x1), 1, UCM_REG_UCM_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "UCM: parity status is not 0", + {NA, NA, ~0x3ffc0, 0, NA, NA} }, + +/*line 316*/{(0x1E), 1, UCM_REG_UCM_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "UCM: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 317*/{(0x1), 1, XCM_REG_XCM_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "XCM: parity status is not 0", + {NA, NA, ~0x3ffc0, 0, NA, NA} }, + +/*line 318*/{(0x1E), 1, XCM_REG_XCM_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "XCM: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 319*/{(0x1), 1, HC_REG_HC_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "HC: parity status is not 0", + {NA, NA, ~0x1, 0, NA, NA} }, + +/*line 320*/{(0x1), 1, MISC_REG_MISC_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "MISC: parity status is not 0", + {NA, NA, ~0x1, 0, NA, NA} }, + +/*line 321*/{(0x1F), 1, PRS_REG_PRS_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PRS: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 322*/{(0x1F), 1, PXP_REG_PXP_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 323*/{(0x1F), 1, QM_REG_QM_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "QM: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 324*/{(0x1), 1, SRC_REG_SRC_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "SRCH: parity status is not 0", + {NA, NA, ~0x4, 0, NA, NA} }, + +/*line 325*/{(0x1F), 1, TSDM_REG_TSDM_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "TSDM: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 326*/{(0x1F), 1, USDM_REG_USDM_PRTY_STS, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "USDM: parity status is not 0", + {NA, NA, ~0x20, 0, NA, NA} }, + +/*line 327*/{(0x1F), 1, XSDM_REG_XSDM_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "XSDM: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 328*/{(0x1F), 1, GRCBASE_XPB + PB_REG_PB_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "XPB: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 329*/{(0x1F), 1, GRCBASE_UPB + PB_REG_PB_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "UPB: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 330*/{(0x1F), 1, CSEM_REG_CSEM_PRTY_STS_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "CSEM: parity status 0 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 331*/{(0x1), 1, PXP2_REG_PXP2_PRTY_STS_0, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "PXP2: parity status 0 is not 0", + {NA, NA, ~0xfff40020, 0, NA, NA} }, + +/*line 332*/{(0x1E), 1, PXP2_REG_PXP2_PRTY_STS_0, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "PXP2: parity status 0 is not 0", + {NA, NA, ~0x20, 0, NA, NA} }, + +/*line 333*/{(0x1F), 1, TSEM_REG_TSEM_PRTY_STS_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "TSEM: parity status 0 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 334*/{(0x1F), 1, USEM_REG_USEM_PRTY_STS_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "USEM: parity status 0 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 335*/{(0x1F), 1, XSEM_REG_XSEM_PRTY_STS_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "XSEM: parity status 0 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 336*/{(0x1F), 1, CSEM_REG_CSEM_PRTY_STS_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "CSEM: parity status 1 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 337*/{(0x1), 1, PXP2_REG_PXP2_PRTY_STS_1, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "PXP2: parity status 1 is not 0", + {NA, NA, ~0x20, 0, NA, NA} }, + +/*line 338*/{(0x1E), 1, PXP2_REG_PXP2_PRTY_STS_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PXP2: parity status 1 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 339*/{(0x1F), 1, TSEM_REG_TSEM_PRTY_STS_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "TSEM: parity status 1 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 340*/{(0x1F), 1, USEM_REG_USEM_PRTY_STS_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "USEM: parity status 1 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 341*/{(0x1F), 1, XSEM_REG_XSEM_PRTY_STS_1, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "XSEM: parity status 1 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 342*/{(0x1C), 1, PGLUE_B_REG_PGLUE_B_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGLUE_B: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 343*/{(0x2), 2, QM_REG_QTASKCTR_EXT_A_0, + NA, 64, 4, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Q_EXT_A (upper 64 queues), Queue is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 344*/{(0x2), 1, QM_REG_QSTATUS_LOW_EXT_A, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: QSTATUS_LOW_EXT_A is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 345*/{(0x2), 1, QM_REG_QSTATUS_HIGH_EXT_A, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: QSTATUS_HIGH_EXT_A is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 346*/{(0x1E), 1, QM_REG_PAUSESTATE2, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: PAUSESTATE2 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 347*/{(0x1E), 1, QM_REG_PAUSESTATE3, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: PAUSESTATE3 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 348*/{(0x2), 1, QM_REG_PAUSESTATE4, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: PAUSESTATE4 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 349*/{(0x2), 1, QM_REG_PAUSESTATE5, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: PAUSESTATE5 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 350*/{(0x2), 1, QM_REG_PAUSESTATE6, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: PAUSESTATE6 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 351*/{(0x2), 1, QM_REG_PAUSESTATE7, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "QM: PAUSESTATE7 is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 352*/{(0x2), 6, QM_REG_PTRTBL_EXT_A, + NA, 64, 8, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: read and write variables not equal in ext table", + {NA, NA, NA, NA, NA, NA} }, + +/*line 353*/{(0x1E), 1, MISC_REG_AEU_SYS_KILL_OCCURRED, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "MISC: system kill occurd;", + {NA, NA, 0, NA, NA, NA} }, + +/*line 354*/{(0x1E), 1, MISC_REG_AEU_SYS_KILL_STATUS_0, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "MISC: system kill occurd; status_0 register", + {NA, NA, 0, NA, NA, NA} }, + +/*line 355*/{(0x1E), 1, MISC_REG_AEU_SYS_KILL_STATUS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "MISC: system kill occurd; status_1 register", + {NA, NA, 0, NA, NA, NA} }, + +/*line 356*/{(0x1E), 1, MISC_REG_AEU_SYS_KILL_STATUS_2, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "MISC: system kill occurd; status_2 register", + {NA, NA, 0, NA, NA, NA} }, + +/*line 357*/{(0x1E), 1, MISC_REG_AEU_SYS_KILL_STATUS_3, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "MISC: system kill occurd; status_3 register", + {NA, NA, 0, NA, NA, NA} }, + +/*line 358*/{(0x1E), 1, MISC_REG_PCIE_HOT_RESET, + NA, NA, NA, pneq, + NA, IDLE_CHK_WARNING, + "MISC: pcie_rst_b was asserted without perst assertion", + {NA, NA, 0, NA, NA, NA} }, + +/*line 359*/{(0x1F), 1, NIG_REG_NIG_INT_STS_0, + NA, NA, NA, pand_neq, + NA, IDLE_CHK_ERROR, + "NIG: interrupt 0 is active", + {NA, NA, ~0x300, 0, NA, NA} }, + +/*line 360*/{(0x1F), 1, NIG_REG_NIG_INT_STS_0, + NA, NA, NA, peq, + NA, IDLE_CHK_WARNING, + "NIG: Access to BMAC while not active. If tested on FPGA, ignore this " + "warning", + {NA, NA, 0x300, NA, NA, NA} }, + +/*line 361*/{(0x1F), 1, NIG_REG_NIG_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "NIG: interrupt 1 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 362*/{(0x2), 1, NIG_REG_NIG_PRTY_STS, + NA, NA, NA, pand_neq, + NA, IDLE_CHK_ERROR, + "NIG: parity interrupt is active", + {NA, NA, ~0xFFC00000, 0, NA, NA} }, + +/*line 363*/{(0x1C), 1, NIG_REG_NIG_PRTY_STS_0, + NA, NA, NA, pand_neq, + NA, IDLE_CHK_ERROR, + "NIG: parity 0 interrupt is active", + {NA, NA, ~0xFFC00000, 0, NA, NA} }, + +/*line 364*/{(0x4), 1, NIG_REG_NIG_PRTY_STS_1, + NA, NA, NA, pand_neq, + NA, IDLE_CHK_ERROR, + "NIG: parity 1 interrupt is active", + {NA, NA, 0xff, 0, NA, NA} }, + +/*line 365*/{(0x18), 1, NIG_REG_NIG_PRTY_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "NIG: parity 1 interrupt is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 366*/{(0x1F), 1, TSEM_REG_TSEM_INT_STS_0, + NA, NA, NA, pand_neq, + NA, IDLE_CHK_WARNING, + "TSEM: interrupt 0 is active", + {NA, NA, ~0x10000000, 0, NA, NA} }, + +/*line 367*/{(0x1F), 1, TSEM_REG_TSEM_INT_STS_0, + NA, NA, NA, peq, + NA, IDLE_CHK_WARNING, + "TSEM: interrupt 0 is active", + {NA, NA, 0x10000000, NA, NA, NA} }, + +/*line 368*/{(0x1F), 1, TSEM_REG_TSEM_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "TSEM: interrupt 1 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 369*/{(0x1F), 1, CSEM_REG_CSEM_INT_STS_0, + NA, NA, NA, pand_neq, + NA, IDLE_CHK_WARNING, + "CSEM: interrupt 0 is active", + {NA, NA, ~0x10000000, 0, NA, NA} }, + +/*line 370*/{(0x1F), 1, CSEM_REG_CSEM_INT_STS_0, + NA, NA, NA, peq, + NA, IDLE_CHK_WARNING, + "CSEM: interrupt 0 is active", + {NA, NA, 0x10000000, NA, NA, NA} }, + +/*line 371*/{(0x1F), 1, CSEM_REG_CSEM_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "CSEM: interrupt 1 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 372*/{(0x1F), 1, USEM_REG_USEM_INT_STS_0, + NA, NA, NA, pand_neq, + NA, IDLE_CHK_WARNING, + "USEM: interrupt 0 is active", + {NA, NA, ~0x10000000, 0, NA, NA} }, + +/*line 373*/{(0x1F), 1, USEM_REG_USEM_INT_STS_0, + NA, NA, NA, peq, + NA, IDLE_CHK_WARNING, + "USEM: interrupt 0 is active", + {NA, NA, 0x10000000, NA, NA, NA} }, + +/*line 374*/{(0x1F), 1, USEM_REG_USEM_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "USEM: interrupt 1 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 375*/{(0x1F), 1, XSEM_REG_XSEM_INT_STS_0, + NA, NA, NA, pand_neq, + NA, IDLE_CHK_WARNING, + "XSEM: interrupt 0 is active", + {NA, NA, ~0x10000000, 0, NA, NA} }, + +/*line 376*/{(0x1F), 1, XSEM_REG_XSEM_INT_STS_0, + NA, NA, NA, peq, + NA, IDLE_CHK_WARNING, + "XSEM: interrupt 0 is active", + {NA, NA, 0x10000000, NA, NA, NA} }, + +/*line 377*/{(0x1F), 1, XSEM_REG_XSEM_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "XSEM: interrupt 1 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 378*/{(0x1F), 1, TSDM_REG_TSDM_INT_STS_0, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "TSDM: interrupt 0 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 379*/{(0x1F), 1, TSDM_REG_TSDM_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "TSDM: interrupt 0 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 380*/{(0x1F), 1, CSDM_REG_CSDM_INT_STS_0, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "CSDM: interrupt 0 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 381*/{(0x1F), 1, CSDM_REG_CSDM_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "CSDM: interrupt 0 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 382*/{(0x1F), 1, USDM_REG_USDM_INT_STS_0, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "USDM: interrupt 0 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 383*/{(0x1F), 1, USDM_REG_USDM_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "USDM: interrupt 0 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 384*/{(0x1F), 1, XSDM_REG_XSDM_INT_STS_0, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "XSDM: interrupt 0 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 385*/{(0x1F), 1, XSDM_REG_XSDM_INT_STS_1, + NA, NA, NA, pneq, + NA, IDLE_CHK_ERROR, + "XSDM: interrupt 0 is active", + {NA, NA, 0, NA, NA, NA} }, + +/*line 386*/{(0x2), 1, HC_REG_HC_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "HC: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 387*/{(0x1E), 1, MISC_REG_MISC_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "MISC: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 388*/{(0x1E), 1, SRC_REG_SRC_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "SRCH: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 389*/{(0xC), 3, QM_REG_BYTECRD0, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 0 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 390*/{(0xC), 3, QM_REG_BYTECRD1, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 1 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 391*/{(0xC), 3, QM_REG_BYTECRD2, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 2 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 392*/{(0x1C), 1, QM_REG_VOQCRDERRREG, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "QM: VOQ credit error register is not 0 (VOQ credit " + "overflow/underflow)", + {NA, NA, 0xFFFF, 0, NA, NA} }, + +/*line 393*/{(0x1C), 1, QM_REG_BYTECRDERRREG, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "QM: Byte credit error register is not 0 (Byte credit " + "overflow/underflow)", + {NA, NA, 0xFFF, 0, NA, NA} }, + +/*line 394*/{(0x1C), 1, PGLUE_B_REG_FLR_REQUEST_VF_31_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGL: FLR request is set for VF addresses 31-0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 395*/{(0x1C), 1, PGLUE_B_REG_FLR_REQUEST_VF_63_32, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGL: FLR request is set for VF addresses 63-32", + {NA, NA, 0, NA, NA, NA} }, + +/*line 396*/{(0x1C), 1, PGLUE_B_REG_FLR_REQUEST_VF_95_64, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGL: FLR request is set for VF addresses 95-64", + {NA, NA, 0, NA, NA, NA} }, + +/*line 397*/{(0x1C), 1, PGLUE_B_REG_FLR_REQUEST_VF_127_96, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGL: FLR request is set for VF addresses 127-96", + {NA, NA, 0, NA, NA, NA} }, + +/*line 398*/{(0x1C), 1, PGLUE_B_REG_FLR_REQUEST_PF_7_0, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGL: FLR request is set for PF addresses 7-0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 399*/{(0x1C), 1, PGLUE_B_REG_SR_IOV_DISABLED_REQUEST, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGL: SR-IOV disable request is set", + {NA, NA, 0, NA, NA, NA} }, + +/*line 400*/{(0x1C), 1, PGLUE_B_REG_CFG_SPACE_A_REQUEST, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGL: Cfg-Space A request is set", + {NA, NA, 0, NA, NA, NA} }, + +/*line 401*/{(0x1C), 1, PGLUE_B_REG_CFG_SPACE_B_REQUEST, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "PGL: Cfg-Space B request is set", + {NA, NA, 0, NA, NA, NA} }, + +/*line 402*/{(0x1C), 1, IGU_REG_ERROR_HANDLING_DATA_VALID, + NA, NA, 0, pneq, + NA, IDLE_CHK_ERROR, + "IGU: some unauthorized commands arrived to the IGU. Use igu_dump_fifo " + "utility for more details", + {NA, NA, 0, NA, NA, NA} }, + +/*line 403*/{(0x1C), 1, IGU_REG_ATTN_WRITE_DONE_PENDING, + NA, NA, NA, pneq, + NA, IDLE_CHK_WARNING, + "IGU attention message write done pending is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 404*/{(0x1C), 1, IGU_REG_WRITE_DONE_PENDING, + NA, 5, 4, pneq, + NA, IDLE_CHK_WARNING, + "IGU MSI/MSIX message write done pending is not empty", + {NA, NA, 0, NA, NA, NA} }, + +/*line 405*/{(0x1C), 1, IGU_REG_IGU_PRTY_STS, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "IGU: parity status is not 0", + {NA, NA, 0, NA, NA, NA} }, + +/*line 406*/{(0x1E), 3, MISC_REG_GRC_TIMEOUT_ATTN, + MISC_REG_AEU_AFTER_INVERT_4_FUNC_0, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "MISC_REG_GRC_TIMEOUT_ATTN: GRC timeout attention parameters (FUNC_0)", + {NA, NA, 0x4000000, 0, NA, NA} }, + +/*line 407*/{(0x1C), 3, MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID, + MISC_REG_AEU_AFTER_INVERT_4_FUNC_0, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID: GRC timeout attention FID " + "(FUNC_0)", + {NA, NA, 0x4000000, 0, NA, NA} }, + +/*line 408*/{(0x1E), 3, MISC_REG_GRC_TIMEOUT_ATTN, + MISC_REG_AEU_AFTER_INVERT_4_FUNC_1, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "MISC_REG_GRC_TIMEOUT_ATTN: GRC timeout attention parameters (FUNC_1)", + {NA, NA, 0x4000000, 0, NA, NA} }, + +/*line 409*/{(0x1C), 3, MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID, + MISC_REG_AEU_AFTER_INVERT_4_FUNC_1, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID: GRC timeout attention FID " + "(FUNC_1)", + {NA, NA, 0x4000000, 0, NA, NA} }, + +/*line 410*/{(0x1E), 3, MISC_REG_GRC_TIMEOUT_ATTN, + MISC_REG_AEU_AFTER_INVERT_4_MCP, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "MISC_REG_GRC_TIMEOUT_ATTN: GRC timeout attention parameters (MCP)", + {NA, NA, 0x4000000, 0, NA, NA} }, + +/*line 411*/{(0x1C), 3, MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID, + MISC_REG_AEU_AFTER_INVERT_4_MCP, 1, 0, pand_neq, + NA, IDLE_CHK_ERROR, + "MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID: GRC timeout attention FID (MCP)", + {NA, NA, 0x4000000, 0, NA, NA} }, + +/*line 412*/{(0x1C), 1, IGU_REG_SILENT_DROP, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "Some messages were not executed in the IGU", + {NA, NA, 0, NA, NA, NA} }, + +/*line 413*/{(0x1C), 1, PXP2_REG_PSWRQ_BW_CREDIT, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR, + "PXP2: rq_read_credit and rq_write_credit are not 5", + {NA, NA, 0x2D, NA, NA, NA} }, + +/*line 414*/{(0x1C), 1, IGU_REG_SB_CTRL_FSM, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "IGU: block is not in idle. SB_CTRL_FSM should be zero in idle state", + {NA, NA, 0, NA, NA, NA} }, + +/*line 415*/{(0x1C), 1, IGU_REG_INT_HANDLE_FSM, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "IGU: block is not in idle. INT_HANDLE_FSM should be zero in idle " + "state", + {NA, NA, 0, NA, NA, NA} }, + +/*line 416*/{(0x1C), 1, IGU_REG_ATTN_FSM, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "IGU: block is not in idle. SB_ATTN_FSMshould be zeroor two in idle " + "state", + {NA, NA, ~0x2, 0, NA, NA} }, + +/*line 417*/{(0x1C), 1, IGU_REG_CTRL_FSM, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "IGU: block is not in idle. SB_CTRL_FSM should be zero in idle state", + {NA, NA, ~0x1, 0, NA, NA} }, + +/*line 418*/{(0x1C), 1, IGU_REG_PXP_ARB_FSM, + NA, 1, 0, pand_neq, + NA, IDLE_CHK_WARNING, + "IGU: block is not in idle. SB_ARB_FSM should be zero in idle state", + {NA, NA, ~0x1, 0, NA, NA} }, + +/*line 419*/{(0x1C), 1, IGU_REG_PENDING_BITS_STATUS, + NA, 5, 4, pneq, + NA, IDLE_CHK_WARNING, + "IGU: block is not in idle. There are pending write done", + {NA, NA, 0, NA, NA, NA} }, + +/*line 420*/{(0x10), 3, QM_REG_VOQCREDIT_0, + QM_REG_VOQINITCREDIT_0, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_0, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 421*/{(0x10), 3, QM_REG_VOQCREDIT_1, + QM_REG_VOQINITCREDIT_1, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_1, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 422*/{(0x10), 3, QM_REG_VOQCREDIT_2, + QM_REG_VOQINITCREDIT_2, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_2, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 423*/{(0x10), 3, QM_REG_VOQCREDIT_3, + QM_REG_VOQINITCREDIT_3, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_3, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 424*/{(0x10), 3, QM_REG_VOQCREDIT_4, + QM_REG_VOQINITCREDIT_4, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_4, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 425*/{(0x10), 3, QM_REG_VOQCREDIT_5, + QM_REG_VOQINITCREDIT_5, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_5, VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 426*/{(0x10), 3, QM_REG_VOQCREDIT_6, + QM_REG_VOQINITCREDIT_6, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: VOQ_6 (LB VOQ), VOQ credit is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 427*/{(0x10), 3, QM_REG_BYTECRD0, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 0 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 428*/{(0x10), 3, QM_REG_BYTECRD1, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 1 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 429*/{(0x10), 3, QM_REG_BYTECRD2, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 2 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 430*/{(0x10), 3, QM_REG_BYTECRD3, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 3 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 431*/{(0x10), 3, QM_REG_BYTECRD4, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 4 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 432*/{(0x10), 3, QM_REG_BYTECRD5, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 5 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 433*/{(0x10), 3, QM_REG_BYTECRD6, + QM_REG_BYTECRDINITVAL, 1, 0, pneq_r2, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "QM: Byte credit 6 is not equal to initial credit", + {NA, NA, NA, NA, NA, NA} }, + +/*line 434*/{(0x10), 1, QM_REG_FWVOQ0TOHWVOQ, + NA, 1, 0, peq, + NA, IDLE_CHK_ERROR, + "QM: FwVoq0 is mapped to HwVoq7 (non-TX HwVoq)", + {NA, NA, 0x7, NA, NA, NA} }, + +/*line 435*/{(0x10), 1, QM_REG_FWVOQ1TOHWVOQ, + NA, 1, 0, peq, + NA, IDLE_CHK_ERROR, + "QM: FwVoq1 is mapped to HwVoq7 (non-TX HwVoq)", + {NA, NA, 0x7, NA, NA, NA} }, + +/*line 436*/{(0x10), 1, QM_REG_FWVOQ2TOHWVOQ, + NA, 1, 0, peq, + NA, IDLE_CHK_ERROR, + "QM: FwVoq2 is mapped to HwVoq7 (non-TX HwVoq)", + {NA, NA, 0x7, NA, NA, NA} }, + +/*line 437*/{(0x10), 1, QM_REG_FWVOQ3TOHWVOQ, + NA, 1, 0, peq, + NA, IDLE_CHK_ERROR, + "QM: FwVoq3 is mapped to HwVoq7 (non-TX HwVoq)", + {NA, NA, 0x7, NA, NA, NA} }, + +/*line 438*/{(0x10), 1, QM_REG_FWVOQ4TOHWVOQ, + NA, 1, 0, peq, + NA, IDLE_CHK_ERROR, + "QM: FwVoq4 is mapped to HwVoq7 (non-TX HwVoq)", + {NA, NA, 0x7, NA, NA, NA} }, + +/*line 439*/{(0x10), 1, QM_REG_FWVOQ5TOHWVOQ, + NA, 1, 0, peq, + NA, IDLE_CHK_ERROR, + "QM: FwVoq5 is mapped to HwVoq7 (non-TX HwVoq)", + {NA, NA, 0x7, NA, NA, NA} }, + +/*line 440*/{(0x10), 1, QM_REG_FWVOQ6TOHWVOQ, + NA, 1, 0, peq, + NA, IDLE_CHK_ERROR, + "QM: FwVoq6 is mapped to HwVoq7 (non-TX HwVoq)", + {NA, NA, 0x7, NA, NA, NA} }, + +/*line 441*/{(0x10), 1, QM_REG_FWVOQ7TOHWVOQ, + NA, 1, 0, peq, + NA, IDLE_CHK_ERROR, + "QM: FwVoq7 is mapped to HwVoq7 (non-TX HwVoq)", + {NA, NA, 0x7, NA, NA, NA} }, + +/*line 442*/{(0x1F), 1, NIG_REG_INGRESS_EOP_PORT0_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 0 EOP FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 443*/{(0x1F), 1, NIG_REG_INGRESS_EOP_PORT1_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 1 EOP FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 444*/{(0x1F), 1, NIG_REG_INGRESS_EOP_LB_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: LB EOP FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 445*/{(0x1F), 1, NIG_REG_INGRESS_RMP0_DSCR_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "NIG: Port 0 RX MCP descriptor FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 446*/{(0x1F), 1, NIG_REG_INGRESS_RMP1_DSCR_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "NIG: Port 1 RX MCP descriptor FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 447*/{(0x1F), 1, NIG_REG_INGRESS_LB_PBF_DELAY_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: PBF LB FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 448*/{(0x1F), 1, NIG_REG_EGRESS_MNG0_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "NIG: Port 0 TX MCP FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 449*/{(0x1F), 1, NIG_REG_EGRESS_MNG1_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "NIG: Port 1 TX MCP FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 450*/{(0x1F), 1, NIG_REG_EGRESS_DEBUG_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Debug FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 451*/{(0x1F), 1, NIG_REG_EGRESS_DELAY0_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: PBF IF0 FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 452*/{(0x1F), 1, NIG_REG_EGRESS_DELAY1_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: PBF IF1 FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 453*/{(0x1F), 1, NIG_REG_LLH0_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 0 RX LLH FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 454*/{(0x1F), 1, NIG_REG_LLH1_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 1 RX LLH FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 455*/{(0x1C), 1, NIG_REG_P0_TX_MNG_HOST_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "NIG: Port 0 TX MCP FIFO for traffic going to the host is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 456*/{(0x1C), 1, NIG_REG_P1_TX_MNG_HOST_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "NIG: Port 1 TX MCP FIFO for traffic going to the host is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 457*/{(0x1C), 1, NIG_REG_P0_TLLH_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 0 TX LLH FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 458*/{(0x1C), 1, NIG_REG_P1_TLLH_FIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 1 TX LLH FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 459*/{(0x1C), 1, NIG_REG_P0_HBUF_DSCR_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "NIG: Port 0 RX MCP descriptor FIFO for traffic from the host is not " + "empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 460*/{(0x1C), 1, NIG_REG_P1_HBUF_DSCR_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_WARNING, + "NIG: Port 1 RX MCP descriptor FIFO for traffic from the host is not " + "empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 461*/{(0x18), 1, NIG_REG_P0_RX_MACFIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 0 RX MAC interface FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 462*/{(0x18), 1, NIG_REG_P1_RX_MACFIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 1 RX MAC interface FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 463*/{(0x18), 1, NIG_REG_P0_TX_MACFIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 0 TX MAC interface FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 464*/{(0x18), 1, NIG_REG_P1_TX_MACFIFO_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: Port 1 TX MAC interface FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 465*/{(0x10), 1, NIG_REG_EGRESS_DELAY2_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: PBF IF2 FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 466*/{(0x10), 1, NIG_REG_EGRESS_DELAY3_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: PBF IF3 FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 467*/{(0x10), 1, NIG_REG_EGRESS_DELAY4_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: PBF IF4 FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + +/*line 468*/{(0x10), 1, NIG_REG_EGRESS_DELAY5_EMPTY, + NA, 1, 0, pneq, + NA, IDLE_CHK_ERROR_NO_TRAFFIC, + "NIG: PBF IF5 FIFO is not empty", + {NA, NA, 1, NA, NA, NA} }, + + +}; + +/* self test procedure + * scan auto-generated database + * for each line: + * 1. compare chip mask + * 2. determine type (according to maro number) + * 3. read registers + * 4. call predicate + * 5. collate results and statistics + */ +int bnx2x_idle_chk(struct bnx2x *bp) +{ + u16 i; /* loop counter */ + u16 st_ind; /* self test database access index */ + struct st_record rec; /* current record variable */ + char message[MAX_FAIL_MSG]; /* message to log */ + + /*init stats*/ + idle_chk_errors = 0; + idle_chk_warnings = 0; + + /*create masks for all chip types*/ + is_e1 = CHIP_IS_E1(bp); + is_e1h = CHIP_IS_E1H(bp); + is_e2 = CHIP_IS_E2(bp); + is_e3a0 = CHIP_IS_E3A0(bp); + is_e3b0 = CHIP_IS_E3B0(bp); + + /*database main loop*/ + for (st_ind = 0; st_ind < ST_DB_LINES; st_ind++) { + rec = st_database[st_ind]; + + /*check if test applies to chip*/ + if (!((rec.chip_mask & IDLE_CHK_E1) && is_e1) && + !((rec.chip_mask & IDLE_CHK_E1H) && is_e1h) && + !((rec.chip_mask & IDLE_CHK_E2) && is_e2) && + !((rec.chip_mask & IDLE_CHK_E3A0) && is_e3a0) && + !((rec.chip_mask & IDLE_CHK_E3B0) && is_e3b0)) + continue; + + /* identify macro */ + switch (rec.macro) { + case 1: + /* read single reg and call predicate */ + rec.pred_args.val1 = REG_RD(bp, rec.reg1); + DP(BNX2X_MSG_IDLE, "mac1 add %x\n", rec.reg1); + if (rec.predicate(&rec.pred_args)) { + snprintf(message, sizeof(message), + "%s.Value is 0x%x\n", rec.failMsg, + rec.pred_args.val1); + bnx2x_self_test_log(bp, rec.severity, message); + } + break; + case 2: + /* read repeatedly starting from reg1 and call + * predicate after each read + */ + for (i = 0; i < rec.loop; i++) { + rec.pred_args.val1 = + REG_RD(bp, rec.reg1 + i * rec.incr); + DP(BNX2X_MSG_IDLE, "mac2 add %x\n", rec.reg1); + if (rec.predicate(&rec.pred_args)) { + snprintf(message, sizeof(message), + "%s. Value is 0x%x in " + "loop %d\n", + rec.failMsg, + rec.pred_args.val1, i); + bnx2x_self_test_log(bp, rec.severity, + message); + } + } + break; + case 3: + /* read two regs and call predicate */ + rec.pred_args.val1 = REG_RD(bp, rec.reg1); + rec.pred_args.val2 = REG_RD(bp, rec.reg2); + DP(BNX2X_MSG_IDLE, "mac3 add1 %x add2 %x\n", + rec.reg1, rec.reg2); + if (rec.predicate(&rec.pred_args)) { + snprintf(message, sizeof(message), + "%s. Values are 0x%x 0x%x\n", + rec.failMsg, rec.pred_args.val1, + rec.pred_args.val2); + bnx2x_self_test_log(bp, rec.severity, message); + } + break; + case 4: + /*unused to-date*/ + for (i = 0; i < rec.loop; i++) { + rec.pred_args.val1 = + REG_RD(bp, rec.reg1 + i * rec.incr); + rec.pred_args.val2 = + (REG_RD(bp, + rec.reg2 + i * rec.incr))>>1; + if (rec.predicate(&rec.pred_args)) { + snprintf(message, sizeof(message), + "%s. Values are 0x%x 0x%x in " + "loop %d\n", rec.failMsg, + rec.pred_args.val1, + rec.pred_args.val2, i); + bnx2x_self_test_log(bp, rec.severity, + message); + } + } + break; + case 5: + /* compare two regs, pending + * the value of a condition reg + */ + rec.pred_args.val1 = REG_RD(bp, rec.reg1); + rec.pred_args.val2 = REG_RD(bp, rec.reg2); + DP(BNX2X_MSG_IDLE, "mac3 add1 %x add2 %x add3 %x\n", + rec.reg1, rec.reg2, rec.reg3); + if (REG_RD(bp, rec.reg3) != 0) { + if (rec.predicate(&rec.pred_args)) { + snprintf(message, sizeof(message), + "%s. Values are 0x%x 0x%x\n", + rec.failMsg, rec.pred_args.val1, + rec.pred_args.val2); + bnx2x_self_test_log(bp, rec.severity, + message); + } + } + break; + case 6: + /* compare read and write pointers + * and read and write banks in QM + */ + bnx2x_idle_chk6(bp, &rec, message); + break; + case 7: + /*compare cfc info cam with cid cam*/ + bnx2x_idle_chk7(bp, &rec, message); + break; + default: + DP(BNX2X_MSG_IDLE, "unknown macro in self " + "test data base. macro %d line %d", rec.macro, st_ind); + } + } + + /* abort if interface is not running */ + if (!netif_running(bp->dev)) + return idle_chk_errors; + + /* return value accorindg to statistics */ + if (idle_chk_errors == 0) { + DP(BNX2X_MSG_IDLE, "completed successfully " + "(logged %d warnings)\n", idle_chk_warnings); + } else { + BNX2X_ERR("failed (with %d errors, %d warnings)\n", + idle_chk_errors, idle_chk_warnings); + } + return idle_chk_errors; +} + diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_self_test.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_self_test.h deleted file mode 100644 index 84eb139..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_self_test.h +++ /dev/null @@ -1,994 +0,0 @@ -/* bnx2x_self_test.h: Broadcom Everest network driver. - * - * Copyright (c) 2007-2011 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation. - * - * Maintained by: Eilon Greenstein - * Written by: Yitchak Gertner - */ - -/* self test */ - -static int errors; -static int idle_chk_warnings; - - -#define IDLE_CHK_E1 0x1 -#define IDLE_CHK_E1H 0x2 -#define IDLE_CHK_E2 0x4 - -#define IDLE_CHK_ERROR 1 -#define IDLE_CHK_ERROR_NO_TRAFFIC 2 -#define IDLE_CHK_WARNING 3 - - -#define CHIP_MASK_CHK(chip_mask) \ - (((((chip_mask) & IDLE_CHK_E1) && is_e1) || \ - (((chip_mask) & IDLE_CHK_E1H) && is_e1h) || \ - (((chip_mask) & IDLE_CHK_E2) && is_e2)) ? 1 : 0) - -#define CONDITION_CHK(condition, severity, fail_msg, arg_list...) \ - do { \ - if (condition) { \ - switch (severity) { \ - case IDLE_CHK_ERROR: \ - BNX2X_DBG_ERR("ERROR " fail_msg, ##arg_list); \ - errors++; \ - break; \ - case IDLE_CHK_ERROR_NO_TRAFFIC: \ - BNX2X_DBG_ERR("INFO " fail_msg, ##arg_list); \ - break; \ - case IDLE_CHK_WARNING: \ - BNX2X_DBG_ERR("WARNING " fail_msg, \ - ##arg_list); \ - idle_chk_warnings++; \ - break; \ - } \ - } \ - } while (0); - - -static void bnx2x_idle_chk6(struct bnx2x *bp, u32 chip_mask, u32 offset, - int loop, int inc, int severity) -{ - int is_e1 = CHIP_IS_E1(bp); - int is_e1h = CHIP_IS_E1H(bp); - int is_e2 = CHIP_IS_E2(bp); - int i; - u32 val1, val2; - u32 rd_ptr, wr_ptr, rd_bank, wr_bank; - - if (!CHIP_MASK_CHK(chip_mask)) - return; - - for (i = 0; i < loop; i++) { - val1 = REG_RD(bp, offset + i*inc); - val2 = REG_RD(bp, offset + i*inc + 4); - rd_ptr = ((val1 & 0x3FFFFFC0) >> 6); - wr_ptr = ((((val1 & 0xC0000000) >> 30) & 0x3) | - ((val2 & 0x3FFFFF) << 2)); - CONDITION_CHK((rd_ptr != wr_ptr), severity, - "QM: PTRTBL entry %d - rd_ptr is not" - " equal to wr_ptr. Values are 0x%x 0x%x\n", - i, rd_ptr, wr_ptr); - rd_bank = ((val1 & 0x30) >> 4); - wr_bank = (val1 & 0x03); - CONDITION_CHK((rd_bank != wr_bank), severity, - "QM: PTRTBL entry %d - rd_bank is not" - " equal to wr_bank. Values are 0x%x 0x%x\n", - i, rd_bank, wr_bank); - } -} - -static int bnx2x_idle_chk(struct bnx2x *bp) -{ - -/* read one reg and check the condition */ -#define IDLE_CHK_1(chip_mask, offset, condition, severity, fail_msg) \ - do { \ - if (CHIP_MASK_CHK(chip_mask)) { \ - val = REG_RD(bp, offset); \ - CONDITION_CHK(condition, severity, \ - fail_msg ". Value is 0x%x\n", val); \ - } \ - } while (0); - -/* loop to read one reg and check the condition */ -#define IDLE_CHK_2(chip_mask, offset, loop, inc, condition, severity, \ - fail_msg) \ - do { \ - if (CHIP_MASK_CHK(chip_mask)) \ - for (i = 0; i < (loop); i++) { \ - val = REG_RD(bp, offset + i*(inc)); \ - CONDITION_CHK(condition, severity, \ - fail_msg ". Value is 0x%x in loop %d\n", \ - val, i); \ - } \ - } while (0); - -/* read two regs and check the condition */ -#define IDLE_CHK_3(chip_mask, offset1, offset2, condition, severity, \ - fail_msg) \ - do { \ - if (CHIP_MASK_CHK(chip_mask)) { \ - val1 = REG_RD(bp, offset1); \ - val2 = REG_RD(bp, offset2); \ - CONDITION_CHK(condition, severity, \ - fail_msg ". Values are 0x%x 0x%x\n", \ - val1, val2); \ - } \ - } while (0); - -/* loop to read two regs and check the condition */ -#define IDLE_CHK_4(chip_mask, offset1, offset2, loop, inc, condition, \ - severity, fail_msg) \ - do { \ - if (CHIP_MASK_CHK(chip_mask)) \ - for (i = 0; i < (loop); i++) { \ - val1 = REG_RD(bp, offset1 + i*(inc)); \ - val2 = (REG_RD(bp, offset2 + i*(inc)) >> 1); \ - CONDITION_CHK(condition, severity, fail_msg \ - " - LCID %d CID_CAM 0x%x" \ - " Value is 0x%x\n", \ - i, val2, val1); \ - } \ - } while (0); - -/* read one reg and check according to another reg */ -#define IDLE_CHK_5(chip_mask, offset, offset1, offset2, condition, severity, \ - fail_msg) \ - do { \ - if (CHIP_MASK_CHK(chip_mask)) \ - if (!REG_RD(bp, offset)) \ - IDLE_CHK_3(chip_mask, offset1, offset2, \ - condition, severity, fail_msg); \ - } while (0); - -/* read wide-bus reg and check sub-fields */ -#define IDLE_CHK_6(chip_mask, offset, loop, inc, severity) \ - bnx2x_idle_chk6(bp, chip_mask, offset, loop, inc, severity) - -/* loop to read wide-bus reg and check according to another reg */ -#define IDLE_CHK_7(chip_mask, offset, offset1, offset2, loop, inc, condition, \ - severity, fail_msg) \ - do { \ - if (CHIP_MASK_CHK(chip_mask)) \ - for (i = 0; i < (loop); i++) { \ - if (REG_RD(bp, offset + i*4) == 1) { \ - val1 = REG_RD(bp, offset1 + i*(inc)); \ - val1 = REG_RD(bp, offset1 + i*(inc) + \ - 4); \ - val1 = ((REG_RD(bp, offset1 + i*(inc) \ - + 8) & 0x00000078) >> 3); \ - val2 = (REG_RD(bp, offset2 + i*4)>>1); \ - CONDITION_CHK(condition, severity, \ - fail_msg " - LCID %d " \ - "CID_CAM 0x%x" \ - " Value is 0x%x\n", \ - i, val2, val1); \ - } \ - } \ - } while (0); - -#define IDLE_CHK_8 IDLE_CHK_1 - - - int is_e1 = CHIP_IS_E1(bp); - int is_e1h = CHIP_IS_E1H(bp); - int is_e2 = CHIP_IS_E2(bp); - int i; - u32 val, val1, val2; - - errors = 0; - idle_chk_warnings = 0; - - if (!netif_running(bp->dev)) - return errors; - - - // Read register 0x2114 val and check if condition on val exist - IDLE_CHK_1(0x3, 0x2114, ((val & 0x0FF010) != 0), IDLE_CHK_ERROR, "PCIE: ucorr_err_status is not 0"); - // Read register 0x2114 val and check if condition on val exist - IDLE_CHK_1(0x3, 0x2114, ((val & 0x100000) != 0), IDLE_CHK_WARNING, "PCIE: ucorr_err_status - Unsupported request error"); - // Read register 0x2120 val and check if condition on val exist - IDLE_CHK_1(0x3, 0x2120, (((val & 0x31C1) != 0x2000) && ((val & 0x31C1) != 0)), IDLE_CHK_WARNING, "PCIE: corr_err_status is not 0x2000"); - // Read register 0x2814 val and check if condition on val exist - IDLE_CHK_1(0x3, 0x2814, ((val & ~0x40100) != 0), IDLE_CHK_ERROR, "PCIE: attentions register is not 0x40100"); - // Read register 0x281c val and check if condition on val exist - IDLE_CHK_1(0x2, 0x281c, ((val & ~0x40040100) != 0), IDLE_CHK_ERROR, "PCIE: attentions register is not 0x40040100"); - // Read register 0x2820 val and check if condition on val exist - IDLE_CHK_1(0x2, 0x2820, ((val & ~0x40040100) != 0), IDLE_CHK_ERROR, "PCIE: attentions register is not 0x40040100"); - // Read register PXP2_REG_PGL_EXP_ROM2 val and check if condition on val exist - IDLE_CHK_1(0x3, PXP2_REG_PGL_EXP_ROM2, ((val != 0xffffffff)), IDLE_CHK_WARNING, "PXP2: There are outstanding read requests. Not all completios have arrived for read requests on tags that are marked with 0"); - // Read register 0x212c val in loop (incr by 4) and check if condition on val exist - IDLE_CHK_2(0x3, 0x212c, 4, 4, ((val != 0) && (errors > 0)), IDLE_CHK_WARNING, "PCIE: error packet header is not 0"); - // Read register 0x2104 val and check if condition on val exist - IDLE_CHK_1(0xC, 0x2104, ((val & 0x0FD010) != 0), IDLE_CHK_ERROR, "PCIE: ucorr_err_status is not 0"); - // Read register 0x2104 val and check if condition on val exist - IDLE_CHK_1(0xC, 0x2104, ((val & 0x100000) != 0), IDLE_CHK_WARNING, "PCIE: ucorr_err_status - Unsupported request error"); - // Read register 0x2104 val and check if condition on val exist - IDLE_CHK_1(0xC, 0x2104, ((val & 0x2000) != 0), IDLE_CHK_WARNING, "PCIE: ucorr_err_status - Flow Control Protocol Error"); - // Read register 0x2110 val and check if condition on val exist - IDLE_CHK_1(0xC, 0x2110, (((val & 0x31C1) != 0x2000) && ((val & 0x31C1) != 0)), IDLE_CHK_WARNING, "PCIE: corr_err_status is not 0x2000"); - // Read register 0x2814 val and check if condition on val exist - IDLE_CHK_1(0xC, 0x2814, ((val & 0x2000000) != 0), IDLE_CHK_WARNING, "PCIE: TTX_BRIDGE_FORWARD_ERR - Received master request while BME was 0."); - // Read register 0x2814 val and check if condition on val exist - IDLE_CHK_1(0xC, 0x2814, ((val & ~0x2040902) != 0), IDLE_CHK_ERROR, "PCIE: Func 0 1: attentions register is not 0x2040902"); - // Read register 0x2854 val and check if condition on val exist - IDLE_CHK_1(0xC, 0x2854, ((val & ~0x10240902) != 0), IDLE_CHK_ERROR, "PCIE: Func 2 3 4: attentions register is not 0x10240902"); - // Read register 0x285c val and check if condition on val exist - IDLE_CHK_1(0xC, 0x285c, ((val & ~0x10240902) != 0), IDLE_CHK_ERROR, "PCIE: Func 5 6 7: attentions register is not 0x10240902"); - // Read register PXP2_REG_PGL_EXP_ROM2 val and check if condition on val exist - IDLE_CHK_1(0xC, PXP2_REG_PGL_EXP_ROM2, ((val != 0xffffffff)), IDLE_CHK_WARNING, "PXP2: There are outstanding read requests for tags 0-31. Not all completios have arrived for read requests on tags that are marked with 0"); - // Read register 0x211c val in loop (incr by 4) and check if condition on val exist - IDLE_CHK_2(0xC, 0x211c, 4, 4, ((val != 0) && (errors > 0)), IDLE_CHK_WARNING, "PCIE: error packet header is not 0"); - // Read register PGLUE_B_REG_INCORRECT_RCV_DETAILS val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_INCORRECT_RCV_DETAILS, (val != 0), IDLE_CHK_ERROR, "PGLUE_B: Packet received from PCIe not according to the rules."); - // Read register PGLUE_B_REG_WAS_ERROR_VF_31_0 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_WAS_ERROR_VF_31_0, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: was_error for VFs 0-31 is not 0"); - // Read register PGLUE_B_REG_WAS_ERROR_VF_63_32 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_WAS_ERROR_VF_63_32, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: was_error for VFs 32-63 is not 0"); - // Read register PGLUE_B_REG_WAS_ERROR_VF_95_64 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_WAS_ERROR_VF_95_64, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: was_error for VFs 64-95 is not 0"); - // Read register PGLUE_B_REG_WAS_ERROR_VF_127_96 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_WAS_ERROR_VF_127_96, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: was_error for VFs 96-127 is not 0"); - // Read register PGLUE_B_REG_WAS_ERROR_PF_7_0 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_WAS_ERROR_PF_7_0, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: was_error for PFs 0-7 is not 0"); - // Read register PGLUE_B_REG_TX_ERR_WR_ADD_31_0 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TX_ERR_WR_ADD_31_0, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Error in master write. Address(31:0) is not 0"); - // Read register PGLUE_B_REG_TX_ERR_WR_ADD_63_32 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TX_ERR_WR_ADD_63_32, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Error in master write. Address(63:32) is not 0"); - // Read register PGLUE_B_REG_TX_ERR_WR_DETAILS val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TX_ERR_WR_DETAILS, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Error in master write. Error details register is not 0. (4:0) VQID. (23:21) - PFID. (24) - VF_VALID. (30:25) - VFID."); - // Read register PGLUE_B_REG_TX_ERR_WR_DETAILS2 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TX_ERR_WR_DETAILS2, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Error in master write. Error details 2nd register is not 0. (21) - was_error set; (22) - BME cleared; (23) - FID_enable cleared; (24) - VF with parent PF FLR_request or IOV_disable_request."); - // Read register PGLUE_B_REG_TX_ERR_RD_ADD_31_0 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TX_ERR_RD_ADD_31_0, (val != 0), IDLE_CHK_WARNING, "PGLUE: Error in master read address(31:0) is not 0"); - // Read register PGLUE_B_REG_TX_ERR_RD_ADD_63_32 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TX_ERR_RD_ADD_63_32, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Error in master read address(63:32) is not 0"); - // Read register PGLUE_B_REG_TX_ERR_RD_DETAILS val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TX_ERR_RD_DETAILS, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Error in master read Error details register is not 0. (4:0) VQID. (23:21) - PFID. (24) - VF_VALID. (30:25) - VFID."); - // Read register PGLUE_B_REG_TX_ERR_RD_DETAILS2 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TX_ERR_RD_DETAILS2, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Error in master read Error details 2nd register is not 0. (21) - was_error set; (22) - BME cleared; (23) - FID_enable cleared; (24) - VF with parent PF FLR_request or IOV_disable_request."); - // Read register PGLUE_B_REG_VF_LENGTH_VIOLATION_DETAILS val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_VF_LENGTH_VIOLATION_DETAILS, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Target VF length violation access."); - // Read register PGLUE_B_REG_VF_GRC_SPACE_VIOLATION_DETAILS val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_VF_GRC_SPACE_VIOLATION_DETAILS, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Target VF GRC space access failed permission check."); - // Read register PGLUE_B_REG_TAGS_63_32 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_TAGS_63_32, ((val != 0xffffffff)), IDLE_CHK_WARNING, "PGLUE_B: There are outstanding read requests for tags 32-63. Not all completios have arrived for read requests on tags that are marked with 0"); - // Read register PXP_REG_HST_VF_DISABLED_ERROR_VALID val1 and register PXP_REG_HST_VF_DISABLED_ERROR_DATA val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xC, PXP_REG_HST_VF_DISABLED_ERROR_VALID, PXP_REG_HST_VF_DISABLED_ERROR_DATA, (val1 != 0), IDLE_CHK_WARNING, "PXP: Access to disabled VF took place"); - // Read register PXP_REG_HST_PER_VIOLATION_VALID val and check if condition on val exist - IDLE_CHK_1(0xC, PXP_REG_HST_PER_VIOLATION_VALID, (val != 0), IDLE_CHK_WARNING, "PXP: Zone A permission violation occurred"); - // Read register PXP_REG_HST_INCORRECT_ACCESS_VALID val and check if condition on val exist - IDLE_CHK_1(0xC, PXP_REG_HST_INCORRECT_ACCESS_VALID, (val != 0), IDLE_CHK_WARNING, "PXP: Incorrect transaction took place"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ0_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ0_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ0 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ1_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ1_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ1 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ2_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ2_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ2 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ3_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ3_ENTRY_CNT, (val > 2), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ3 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ4_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ4_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ4 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ5_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ5_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ5 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ6_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ6_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ6 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ7_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ7_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ7 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ8_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ8_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ8 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ9_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ9_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ9 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ10_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ10_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ10 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ11_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ11_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ11 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ12_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ12_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ12 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ13_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ13_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ13 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ14_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ14_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ14 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ15_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ15_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ15 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ16_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ16_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ16 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ17_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ17_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ17 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ18_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ18_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ18 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ19_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ19_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ19 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ20_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ20_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ20 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ21_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ21_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ21 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ22_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ22_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ22 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ23_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ23_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ23 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ24_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ24_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ24 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ25_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ25_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ25 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ26_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ26_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ26 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ27_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ27_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ27 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ28_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ28_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ28 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ29_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ29_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ29 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ30_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ30_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ30 is not empty"); - // Check PXP VQ occupancy PXP2_REG_RQ_VQ31_ENTRY_CNT and check if condition on val exist - IDLE_CHK_8(0xF, PXP2_REG_RQ_VQ31_ENTRY_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: VQ31 is not empty"); - // Read register PXP2_REG_RQ_UFIFO_NUM_OF_ENTRY val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_RQ_UFIFO_NUM_OF_ENTRY, (val != 0), IDLE_CHK_ERROR, "PXP2: rq_ufifo_num_of_entry is not 0"); - // Read register PXP2_REG_RQ_RBC_DONE val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_RQ_RBC_DONE, (val != 1), IDLE_CHK_ERROR, "PXP2: rq_rbc_done is not 1"); - // Read register PXP2_REG_RQ_CFG_DONE val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_RQ_CFG_DONE, (val != 1), IDLE_CHK_ERROR, "PXP2: rq_cfg_done is not 1"); - // Read register PXP2_REG_PSWRQ_BW_CREDIT val and check if condition on val exist - IDLE_CHK_1(0x3, PXP2_REG_PSWRQ_BW_CREDIT, (val != 0x1B), IDLE_CHK_ERROR, "PXP2: rq_read_credit and rq_write_credit are not 3"); - // Read register PXP2_REG_RD_START_INIT val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_RD_START_INIT, (val != 1), IDLE_CHK_ERROR, "PXP2: rd_start_init is not 1"); - // Read register PXP2_REG_RD_INIT_DONE val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_RD_INIT_DONE, (val != 1), IDLE_CHK_ERROR, "PXP2: rd_init_done is not 1"); - // Read register PXP2_REG_RD_SR_CNT val1 and register PXP2_REG_RD_SR_NUM_CFG val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xF, PXP2_REG_RD_SR_CNT, PXP2_REG_RD_SR_NUM_CFG, (val1 != (val2-1)), IDLE_CHK_WARNING, "PXP2: rd_sr_cnt is not equal to rd_sr_num_cfg"); - // Read register PXP2_REG_RD_BLK_CNT val1 and register PXP2_REG_RD_BLK_NUM_CFG val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xF, PXP2_REG_RD_BLK_CNT, PXP2_REG_RD_BLK_NUM_CFG, (val1 != val2), IDLE_CHK_WARNING, "PXP2: rd_blk_cnt is not equal to rd_blk_num_cfg"); - // Read register PXP2_REG_RD_SR_CNT val1 and register PXP2_REG_RD_SR_NUM_CFG val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xF, PXP2_REG_RD_SR_CNT, PXP2_REG_RD_SR_NUM_CFG, (val1 < (val2-3)), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: There are more than two unused SRs"); - // Read register PXP2_REG_RD_BLK_CNT val1 and register PXP2_REG_RD_BLK_NUM_CFG val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xF, PXP2_REG_RD_BLK_CNT, PXP2_REG_RD_BLK_NUM_CFG, (val1 < (val2-2)), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: There are more than two unused blocks"); - // Read register PXP2_REG_RD_PORT_IS_IDLE_0 val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_RD_PORT_IS_IDLE_0, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: P0 All delivery ports are not idle"); - // Read register PXP2_REG_RD_PORT_IS_IDLE_1 val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_RD_PORT_IS_IDLE_1, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: P1 All delivery ports are not idle"); - // Read register PXP2_REG_RD_ALMOST_FULL_0 val in loop (incr by 4) and check if condition on val exist - IDLE_CHK_2(0xF, PXP2_REG_RD_ALMOST_FULL_0, 11, 4, (val != 0), IDLE_CHK_ERROR, "PXP2: rd_almost_full is not 0"); - // Read register PXP2_REG_RD_DISABLE_INPUTS val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_RD_DISABLE_INPUTS , (val != 0), IDLE_CHK_ERROR, "PXP2: PSWRD inputs are disabled"); - // Read register PXP2_REG_HST_HEADER_FIFO_STATUS val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_HST_HEADER_FIFO_STATUS, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: HST header FIFO status is not 0"); - // Read register PXP2_REG_HST_DATA_FIFO_STATUS val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_HST_DATA_FIFO_STATUS, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: HST data FIFO status is not 0"); - // Read register PXP2_REG_PGL_WRITE_BLOCKED val and check if condition on val exist - IDLE_CHK_1(0x3, PXP2_REG_PGL_WRITE_BLOCKED, (val != 0), IDLE_CHK_ERROR, "PXP2: pgl_write_blocked is not 0"); - // Read register PXP2_REG_PGL_READ_BLOCKED val and check if condition on val exist - IDLE_CHK_1(0x3, PXP2_REG_PGL_READ_BLOCKED, (val != 0), IDLE_CHK_ERROR, "PXP2: pgl_read_blocked is not 0"); - // Read register PXP2_REG_PGL_WRITE_BLOCKED val and check if condition on val exist - IDLE_CHK_1(0xC, PXP2_REG_PGL_WRITE_BLOCKED, (val != 0), IDLE_CHK_WARNING, "PXP2: pgl_write_blocked is not 0"); - // Read register PXP2_REG_PGL_READ_BLOCKED val and check if condition on val exist - IDLE_CHK_1(0xC, PXP2_REG_PGL_READ_BLOCKED, (val != 0), IDLE_CHK_WARNING, "PXP2: pgl_read_blocked is not 0"); - // Read register PXP2_REG_PGL_TXW_CDTS val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_PGL_TXW_CDTS, (((val >> 17) & 1) != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PXP2: There is data which is ready"); - // Read register PXP_REG_HST_ARB_IS_IDLE val and check if condition on val exist - IDLE_CHK_1(0xF, PXP_REG_HST_ARB_IS_IDLE, (val != 1), IDLE_CHK_WARNING, "PXP: HST arbiter is not idle"); - // Read register PXP_REG_HST_CLIENTS_WAITING_TO_ARB val and check if condition on val exist - IDLE_CHK_1(0xF, PXP_REG_HST_CLIENTS_WAITING_TO_ARB, (val != 0), IDLE_CHK_WARNING, "PXP: HST one of the clients is waiting for delivery"); - // Read register PXP_REG_HST_DISCARD_INTERNAL_WRITES_STATUS val and check if condition on val exist - IDLE_CHK_1(0xE, PXP_REG_HST_DISCARD_INTERNAL_WRITES_STATUS, (val != 0), IDLE_CHK_WARNING, "PXP: HST Close the gates: Discarding internal writes"); - // Read register PXP_REG_HST_DISCARD_DOORBELLS_STATUS val and check if condition on val exist - IDLE_CHK_1(0xE, PXP_REG_HST_DISCARD_DOORBELLS_STATUS, (val != 0), IDLE_CHK_WARNING, "PXP: HST Close the gates: Discarding doorbells"); - // Read register DMAE_REG_GO_C0 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C0, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 0 go is not 0"); - // Read register DMAE_REG_GO_C1 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C1, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 1 go is not 0"); - // Read register DMAE_REG_GO_C2 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C2, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 2 go is not 0"); - // Read register DMAE_REG_GO_C3 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C3, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 3 go is not 0"); - // Read register DMAE_REG_GO_C4 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C4, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 4 go is not 0"); - // Read register DMAE_REG_GO_C5 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C5, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 5 go is not 0"); - // Read register DMAE_REG_GO_C6 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C6, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 6 go is not 0"); - // Read register DMAE_REG_GO_C7 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C7, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 7 go is not 0"); - // Read register DMAE_REG_GO_C8 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C8, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 8 go is not 0"); - // Read register DMAE_REG_GO_C9 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C9, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 9 go is not 0"); - // Read register DMAE_REG_GO_C10 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C10, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 10 go is not 0"); - // Read register DMAE_REG_GO_C11 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C11, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 11 go is not 0"); - // Read register DMAE_REG_GO_C12 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C12, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 12 go is not 0"); - // Read register DMAE_REG_GO_C13 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C13, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 13 go is not 0"); - // Read register DMAE_REG_GO_C14 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C14, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 14 go is not 0"); - // Read register DMAE_REG_GO_C15 val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_GO_C15, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DMAE: command 15 go is not 0"); - // Read register CFC_REG_ERROR_VECTOR val and check if condition on val exist - IDLE_CHK_1(0xF, CFC_REG_ERROR_VECTOR, (val != 0), IDLE_CHK_ERROR, "CFC: error vector is not 0"); - // Read register CFC_REG_NUM_LCIDS_ARRIVING val and check if condition on val exist - IDLE_CHK_1(0xF, CFC_REG_NUM_LCIDS_ARRIVING, (val != 0), IDLE_CHK_ERROR, "CFC: number of arriving LCIDs is not 0"); - // Read register CFC_REG_NUM_LCIDS_ALLOC val and check if condition on val exist - IDLE_CHK_1(0xF, CFC_REG_NUM_LCIDS_ALLOC, (val != 0), IDLE_CHK_ERROR, "CFC: number of alloc LCIDs is not 0"); - // Read register CFC_REG_NUM_LCIDS_LEAVING val and check if condition on val exist - IDLE_CHK_1(0xF, CFC_REG_NUM_LCIDS_LEAVING, (val != 0), IDLE_CHK_ERROR, "CFC: number of leaving LCIDs is not 0"); - // Error if any AC (ACTIVITY COUNTERS) > 2 (regardless of connType) - IDLE_CHK_4(0xF, CFC_REG_ACTIVITY_COUNTER, CFC_REG_CID_CAM, CFC_REG_ACTIVITY_COUNTER_SIZE >> 2, 4, (val1 > 2), IDLE_CHK_ERROR, "CFC: AC > 2"); - // Incase of AC (ACTIVITY COUNTERS) = 1, check if allowed on this connectionType (in Val1) - IDLE_CHK_7(0xF, CFC_REG_ACTIVITY_COUNTER, CFC_REG_INFO_RAM, CFC_REG_CID_CAM, CFC_REG_INFO_RAM_SIZE >> 4, 16, (val1 == 0), IDLE_CHK_ERROR, "CFC: AC is 1 on connType 0 (ETH)"); - // Incase of AC (ACTIVITY COUNTERS) = 1, check if allowed on this connectionType (in Val1) - IDLE_CHK_7(0xF, CFC_REG_ACTIVITY_COUNTER, CFC_REG_INFO_RAM, CFC_REG_CID_CAM, CFC_REG_INFO_RAM_SIZE >> 4, 16, (val1 == 3), IDLE_CHK_WARNING, "CFC: AC is 1 on connType 3 (iSCSI)"); - // Incase of AC (ACTIVITY COUNTERS) = 1, check if allowed on this connectionType (in Val1) - IDLE_CHK_7(0xF, CFC_REG_ACTIVITY_COUNTER, CFC_REG_INFO_RAM, CFC_REG_CID_CAM, CFC_REG_INFO_RAM_SIZE >> 4, 16, ((val1 != 0) && (val1 != 3)), IDLE_CHK_ERROR, "CFC: AC is 1 on connType different than 0 (ETH) or 3 (ISCSI)"); - // Read register QM_REG_QTASKCTR_0 val in loop (incr by 4) and check if condition on val exist - IDLE_CHK_2(0xF, QM_REG_QTASKCTR_0, 64, 4, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: Queue is not empty"); - // Read register QM_REG_VOQCREDIT_0 val1 and register QM_REG_VOQINITCREDIT_0 val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xF, QM_REG_VOQCREDIT_0, QM_REG_VOQINITCREDIT_0, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: VOQ_0, VOQ credit is not equal to initial credit"); - // Read register QM_REG_VOQCREDIT_1 val1 and register QM_REG_VOQINITCREDIT_1 val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xF, QM_REG_VOQCREDIT_1, QM_REG_VOQINITCREDIT_1, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: VOQ_1, VOQ credit is not equal to initial credit"); - // Read register QM_REG_VOQCREDIT_4 val1 and register QM_REG_VOQINITCREDIT_4 val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xF, QM_REG_VOQCREDIT_4, QM_REG_VOQINITCREDIT_4, (val1 != val2), IDLE_CHK_ERROR, "QM: VOQ_4, VOQ credit is not equal to initial credit"); - // Read register QM_REG_PORT0BYTECRD val1 and register QM_REG_BYTECRDINITVAL val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0x3, QM_REG_PORT0BYTECRD, QM_REG_BYTECRDINITVAL, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: P0 Byte credit is not equal to initial credit"); - // Read register QM_REG_PORT1BYTECRD val1 and register QM_REG_BYTECRDINITVAL val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0x3, QM_REG_PORT1BYTECRD, QM_REG_BYTECRDINITVAL, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: P1 Byte credit is not equal to initial credit"); - // Read register CCM_REG_CAM_OCCUP val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_CAM_OCCUP, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "CCM: XX protection CAM is not empty"); - // Read register TCM_REG_CAM_OCCUP val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_CAM_OCCUP, (val != 0), IDLE_CHK_ERROR, "TCM: XX protection CAM is not empty"); - // Read register UCM_REG_CAM_OCCUP val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_CAM_OCCUP, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "UCM: XX protection CAM is not empty"); - // Read register XCM_REG_CAM_OCCUP val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_CAM_OCCUP, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "XCM: XX protection CAM is not empty"); - // Read register BRB1_REG_NUM_OF_FULL_BLOCKS val and check if condition on val exist - IDLE_CHK_1(0xF, BRB1_REG_NUM_OF_FULL_BLOCKS, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "BRB1: BRB is not empty"); - // Read register CSEM_REG_SLEEP_THREADS_VALID val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_SLEEP_THREADS_VALID, (val != 0), IDLE_CHK_ERROR, "CSEM: There are sleeping threads"); - // Read register TSEM_REG_SLEEP_THREADS_VALID val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_SLEEP_THREADS_VALID, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "TSEM: There are sleeping threads"); - // Read register USEM_REG_SLEEP_THREADS_VALID val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_SLEEP_THREADS_VALID, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "USEM: There are sleeping threads"); - // Read register XSEM_REG_SLEEP_THREADS_VALID val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_SLEEP_THREADS_VALID, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "XSEM: There are sleeping threads"); - // Read register CSEM_REG_SLOW_EXT_STORE_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_SLOW_EXT_STORE_EMPTY, (val != 1), IDLE_CHK_ERROR, "CSEM: External store FIFO is not empty"); - // Read register TSEM_REG_SLOW_EXT_STORE_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_SLOW_EXT_STORE_EMPTY, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "TSEM: External store FIFO is not empty"); - // Read register USEM_REG_SLOW_EXT_STORE_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_SLOW_EXT_STORE_EMPTY, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "USEM: External store FIFO is not empty"); - // Read register XSEM_REG_SLOW_EXT_STORE_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_SLOW_EXT_STORE_EMPTY, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "XSEM: External store FIFO is not empty"); - // Read register CSDM_REG_SYNC_PARSER_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, CSDM_REG_SYNC_PARSER_EMPTY, (val != 1), IDLE_CHK_ERROR, "CSDM: Parser serial FIFO is not empty"); - // Read register TSDM_REG_SYNC_PARSER_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, TSDM_REG_SYNC_PARSER_EMPTY, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "TSDM: Parser serial FIFO is not empty"); - // Read register USDM_REG_SYNC_PARSER_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, USDM_REG_SYNC_PARSER_EMPTY, (val != 1), IDLE_CHK_ERROR, "USDM: Parser serial FIFO is not empty"); - // Read register XSDM_REG_SYNC_PARSER_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, XSDM_REG_SYNC_PARSER_EMPTY, (val != 1), IDLE_CHK_ERROR, "XSDM: Parser serial FIFO is not empty"); - // Read register CSDM_REG_SYNC_SYNC_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, CSDM_REG_SYNC_SYNC_EMPTY, (val != 1), IDLE_CHK_ERROR, "CSDM: Parser SYNC serial FIFO is not empty"); - // Read register TSDM_REG_SYNC_SYNC_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, TSDM_REG_SYNC_SYNC_EMPTY, (val != 1), IDLE_CHK_ERROR, "TSDM: Parser SYNC serial FIFO is not empty"); - // Read register USDM_REG_SYNC_SYNC_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, USDM_REG_SYNC_SYNC_EMPTY, (val != 1), IDLE_CHK_ERROR, "USDM: Parser SYNC serial FIFO is not empty"); - // Read register XSDM_REG_SYNC_SYNC_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, XSDM_REG_SYNC_SYNC_EMPTY, (val != 1), IDLE_CHK_ERROR, "XSDM: Parser SYNC serial FIFO is not empty"); - // Read register CSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, CSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY, (val != 1), IDLE_CHK_ERROR, "CSDM: pxp_ctrl rd_data fifo is not empty in sdm_dma_rsp block"); - // Read register TSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, TSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY, (val != 1), IDLE_CHK_ERROR, "TSDM: pxp_ctrl rd_data fifo is not empty in sdm_dma_rsp block"); - // Read register USDM_REG_RSP_PXP_CTRL_RDATA_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, USDM_REG_RSP_PXP_CTRL_RDATA_EMPTY, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "USDM: pxp_ctrl rd_data fifo is not empty in sdm_dma_rsp block"); - // Read register XSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY val and check if condition on val exist - IDLE_CHK_1(0xF, XSDM_REG_RSP_PXP_CTRL_RDATA_EMPTY, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "XSDM: pxp_ctrl rd_data fifo is not empty in sdm_dma_rsp block"); - // Read register DORQ_REG_DQ_FILL_LVLF val and check if condition on val exist - IDLE_CHK_1(0xF, DORQ_REG_DQ_FILL_LVLF, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "DORQ: DORQ queue is not empty"); - // Read register CFC_REG_CFC_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, CFC_REG_CFC_INT_STS, (val != 0), IDLE_CHK_ERROR, "CFC: Interrupt status is not 0"); - // Read register CDU_REG_CDU_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, CDU_REG_CDU_INT_STS, (val != 0), IDLE_CHK_ERROR, "CDU: Interrupt status is not 0"); - // Read register CCM_REG_CCM_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_CCM_INT_STS, (val != 0), IDLE_CHK_ERROR, "CCM: Interrupt status is not 0"); - // Read register TCM_REG_TCM_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_TCM_INT_STS, (val != 0), IDLE_CHK_ERROR, "TCM: Interrupt status is not 0"); - // Read register UCM_REG_UCM_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_UCM_INT_STS, (val != 0), IDLE_CHK_ERROR, "UCM: Interrupt status is not 0"); - // Read register XCM_REG_XCM_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_XCM_INT_STS, (val != 0), IDLE_CHK_ERROR, "XCM: Interrupt status is not 0"); - // Read register PBF_REG_PBF_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, PBF_REG_PBF_INT_STS, (val != 0), IDLE_CHK_ERROR, "PBF: Interrupt status is not 0"); - // Read register TM_REG_TM_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, TM_REG_TM_INT_STS, (val != 0), IDLE_CHK_ERROR, "TIMERS: Interrupt status is not 0"); - // Read register DORQ_REG_DORQ_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, DORQ_REG_DORQ_INT_STS, (val != 0), IDLE_CHK_ERROR, "DORQ: Interrupt status is not 0"); - // Read register SRC_REG_SRC_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, SRC_REG_SRC_INT_STS, (val != 0), IDLE_CHK_ERROR, "SRCH: Interrupt status is not 0"); - // Read register PRS_REG_PRS_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_PRS_INT_STS, (val != 0), IDLE_CHK_ERROR, "PRS: Interrupt status is not 0"); - // Read register BRB1_REG_BRB1_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, BRB1_REG_BRB1_INT_STS, ((val & ~0xFC00) != 0), IDLE_CHK_ERROR, "BRB1: Interrupt status is not 0"); - // Read register GRCBASE_XPB + PB_REG_PB_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, GRCBASE_XPB + PB_REG_PB_INT_STS, (val != 0), IDLE_CHK_ERROR, "XPB: Interrupt status is not 0"); - // Read register GRCBASE_UPB + PB_REG_PB_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, GRCBASE_UPB + PB_REG_PB_INT_STS, (val != 0), IDLE_CHK_ERROR, "UPB: Interrupt status is not 0"); - // Read register PXP2_REG_PXP2_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, PXP2_REG_PXP2_INT_STS_0, (val != 0), IDLE_CHK_WARNING, "PXP2: Interrupt status 0 is not 0"); - // Read register PXP2_REG_PXP2_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xE, PXP2_REG_PXP2_INT_STS_1, (val != 0), IDLE_CHK_WARNING, "PXP2: Interrupt status 1 is not 0"); - // Read register QM_REG_QM_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_QM_INT_STS, (val != 0), IDLE_CHK_ERROR, "QM: Interrupt status is not 0"); - // Read register PXP_REG_PXP_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, PXP_REG_PXP_INT_STS_0, (val != 0), IDLE_CHK_WARNING, "PXP: P0 Interrupt status is not 0"); - // Read register PXP_REG_PXP_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, PXP_REG_PXP_INT_STS_1, (val != 0), IDLE_CHK_WARNING, "PXP: P1 Interrupt status is not 0"); - // Read register PGLUE_B_REG_PGLUE_B_INT_STS val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_PGLUE_B_INT_STS, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: Interrupt status is not 0"); - // Read register DORQ_REG_RSPA_CRD_CNT val and check if condition on val exist - IDLE_CHK_1(0xF, DORQ_REG_RSPA_CRD_CNT, (val != 2), IDLE_CHK_ERROR_NO_TRAFFIC, "DORQ: Credit to XCM is not full"); - // Read register DORQ_REG_RSPB_CRD_CNT val and check if condition on val exist - IDLE_CHK_1(0xF, DORQ_REG_RSPB_CRD_CNT, (val != 2), IDLE_CHK_ERROR, "DORQ: Credit to UCM is not full"); - // Read register QM_REG_VOQCRDERRREG val and check if condition on val exist - IDLE_CHK_1(0x3, QM_REG_VOQCRDERRREG, (val != 0), IDLE_CHK_ERROR, "QM: Credit error register is not 0 (byte or credit overflow/underflow)"); - // Read register DORQ_REG_DQ_FULL_ST val and check if condition on val exist - IDLE_CHK_1(0xF, DORQ_REG_DQ_FULL_ST, (val != 0), IDLE_CHK_ERROR, "DORQ: DORQ queue is full"); - // Read register MISC_REG_AEU_AFTER_INVERT_1_FUNC_0 val and check if condition on val exist - IDLE_CHK_1(0xF, MISC_REG_AEU_AFTER_INVERT_1_FUNC_0, ((val & ~0xCFFC) != 0), IDLE_CHK_WARNING, "AEU: P0 AFTER_INVERT_1 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_2_FUNC_0 val and check if condition on val exist - IDLE_CHK_1(0xF, MISC_REG_AEU_AFTER_INVERT_2_FUNC_0, (val != 0), IDLE_CHK_ERROR, "AEU: P0 AFTER_INVERT_2 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_3_FUNC_0 val and check if condition on val exist - IDLE_CHK_1(0xF, MISC_REG_AEU_AFTER_INVERT_3_FUNC_0, ((val & ~0xC21B0000) != 0), IDLE_CHK_ERROR, "AEU: P0 AFTER_INVERT_3 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_4_FUNC_0 val and check if condition on val exist - IDLE_CHK_1(0xF, MISC_REG_AEU_AFTER_INVERT_4_FUNC_0, ((val & ~0x801FFFFF) != 0), IDLE_CHK_ERROR, "AEU: P0 AFTER_INVERT_4 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_1_FUNC_1 val and check if condition on val exist - IDLE_CHK_1(0x3, MISC_REG_AEU_AFTER_INVERT_1_FUNC_1, ((val & ~0xCFFC) != 0), IDLE_CHK_WARNING, "AEU: P1 AFTER_INVERT_1 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_2_FUNC_1 val and check if condition on val exist - IDLE_CHK_1(0x3, MISC_REG_AEU_AFTER_INVERT_2_FUNC_1, (val != 0), IDLE_CHK_ERROR, "AEU: P1 AFTER_INVERT_2 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_3_FUNC_1 val and check if condition on val exist - IDLE_CHK_1(0x3, MISC_REG_AEU_AFTER_INVERT_3_FUNC_1, ((val & ~0xC21B0000) != 0), IDLE_CHK_ERROR, "AEU: P1 AFTER_INVERT_3 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_4_FUNC_1 val and check if condition on val exist - IDLE_CHK_1(0x3, MISC_REG_AEU_AFTER_INVERT_4_FUNC_1, ((val & ~0x801FFFFF) != 0), IDLE_CHK_ERROR, "AEU: P1 AFTER_INVERT_4 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_1_MCP val and check if condition on val exist - IDLE_CHK_1(0xF, MISC_REG_AEU_AFTER_INVERT_1_MCP, ((val & ~0xCFFC) != 0), IDLE_CHK_WARNING, "AEU: MCP AFTER_INVERT_1 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_2_MCP val and check if condition on val exist - IDLE_CHK_1(0xF, MISC_REG_AEU_AFTER_INVERT_2_MCP, (val != 0), IDLE_CHK_ERROR, "AEU: MCP AFTER_INVERT_2 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_3_MCP val and check if condition on val exist - IDLE_CHK_1(0xF, MISC_REG_AEU_AFTER_INVERT_3_MCP, ((val & ~0xC21B0000) != 0), IDLE_CHK_ERROR, "AEU: MCP AFTER_INVERT_3 is not 0"); - // Read register MISC_REG_AEU_AFTER_INVERT_4_MCP val and check if condition on val exist - IDLE_CHK_1(0xF, MISC_REG_AEU_AFTER_INVERT_4_MCP, ((val & ~0x801FFFFF) != 0), IDLE_CHK_ERROR, "AEU: MCP AFTER_INVERT_4 is not 0"); - // If register PBF_REG_DISABLE_NEW_TASK_PROC_P0 is valid, read PBF_REG_P0_CREDIT val1 and register PBF_REG_P0_INIT_CRD val2 and check if codition on val1,val2 exist - IDLE_CHK_5(0xF, PBF_REG_DISABLE_NEW_TASK_PROC_P0, PBF_REG_P0_CREDIT, PBF_REG_P0_INIT_CRD, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "PBF: P0 credit is not equal to init_crd"); - // If register PBF_REG_DISABLE_NEW_TASK_PROC_P1 is valid, read PBF_REG_P1_CREDIT val1 and register PBF_REG_P1_INIT_CRD val2 and check if codition on val1,val2 exist - IDLE_CHK_5(0xF, PBF_REG_DISABLE_NEW_TASK_PROC_P1, PBF_REG_P1_CREDIT, PBF_REG_P1_INIT_CRD, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "PBF: P1 credit is not equal to init_crd"); - // Read register PBF_REG_P4_CREDIT val1 and register PBF_REG_P4_INIT_CRD val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xF, PBF_REG_P4_CREDIT, PBF_REG_P4_INIT_CRD, (val1 != val2), IDLE_CHK_ERROR, "PBF: P4 credit is not equal to init_crd"); - // Read register PBF_REG_P0_TASK_CNT val and check if condition on val exist - IDLE_CHK_1(0xF, PBF_REG_P0_TASK_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PBF: P0 task_cnt is not 0"); - // Read register PBF_REG_P1_TASK_CNT val and check if condition on val exist - IDLE_CHK_1(0xF, PBF_REG_P1_TASK_CNT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PBF: P1 task_cnt is not 0"); - // Read register PBF_REG_P4_TASK_CNT val and check if condition on val exist - IDLE_CHK_1(0xF, PBF_REG_P4_TASK_CNT, (val != 0), IDLE_CHK_ERROR, "PBF: P4 task_cnt is not 0"); - // Read register XCM_REG_CFC_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_CFC_INIT_CRD, (val != 1), IDLE_CHK_ERROR, "XCM: CFC_INIT_CRD is not 1"); - // Read register UCM_REG_CFC_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_CFC_INIT_CRD, (val != 1), IDLE_CHK_ERROR, "UCM: CFC_INIT_CRD is not 1"); - // Read register TCM_REG_CFC_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_CFC_INIT_CRD, (val != 1), IDLE_CHK_ERROR, "TCM: CFC_INIT_CRD is not 1"); - // Read register CCM_REG_CFC_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_CFC_INIT_CRD, (val != 1), IDLE_CHK_ERROR_NO_TRAFFIC, "CCM: CFC_INIT_CRD is not 1"); - // Read register XCM_REG_XQM_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_XQM_INIT_CRD, (val != 32), IDLE_CHK_ERROR, "XCM: XQM_INIT_CRD is not 32"); - // Read register UCM_REG_UQM_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_UQM_INIT_CRD, (val != 32), IDLE_CHK_ERROR, "UCM: UQM_INIT_CRD is not 32"); - // Read register TCM_REG_TQM_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_TQM_INIT_CRD, (val != 32), IDLE_CHK_ERROR, "TCM: TQM_INIT_CRD is not 32"); - // Read register CCM_REG_CQM_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_CQM_INIT_CRD, (val != 32), IDLE_CHK_ERROR_NO_TRAFFIC, "CCM: CQM_INIT_CRD is not 32"); - // Read register XCM_REG_TM_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_TM_INIT_CRD, (val != 4), IDLE_CHK_ERROR, "XCM: TM_INIT_CRD is not 4"); - // Read register UCM_REG_TM_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_TM_INIT_CRD, (val != 4), IDLE_CHK_ERROR, "UCM: TM_INIT_CRD is not 4"); - // Read register XCM_REG_FIC0_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_FIC0_INIT_CRD, (val != 64), IDLE_CHK_WARNING, "XCM: FIC0_INIT_CRD is not 64"); - // Read register UCM_REG_FIC0_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_FIC0_INIT_CRD, (val != 64), IDLE_CHK_ERROR_NO_TRAFFIC, "UCM: FIC0_INIT_CRD is not 64"); - // Read register TCM_REG_FIC0_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_FIC0_INIT_CRD, (val != 64), IDLE_CHK_ERROR_NO_TRAFFIC, "TCM: FIC0_INIT_CRD is not 64"); - // Read register CCM_REG_FIC0_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_FIC0_INIT_CRD, (val != 64), IDLE_CHK_ERROR_NO_TRAFFIC, "CCM: FIC0_INIT_CRD is not 64"); - // Read register XCM_REG_FIC1_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_FIC1_INIT_CRD, (val != 64), IDLE_CHK_ERROR, "XCM: FIC1_INIT_CRD is not 64"); - // Read register UCM_REG_FIC1_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_FIC1_INIT_CRD, (val != 64), IDLE_CHK_ERROR, "UCM: FIC1_INIT_CRD is not 64"); - // Read register TCM_REG_FIC1_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_FIC1_INIT_CRD, (val != 64), IDLE_CHK_ERROR, "TCM: FIC1_INIT_CRD is not 64"); - // Read register CCM_REG_FIC1_INIT_CRD val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_FIC1_INIT_CRD, (val != 64), IDLE_CHK_ERROR, "CCM: FIC1_INIT_CRD is not 64"); - // Read register XCM_REG_XX_FREE val and check if condition on val exist - IDLE_CHK_1(0x1, XCM_REG_XX_FREE, (val != 31), IDLE_CHK_ERROR, "XCM: XX_FREE differs from expected 31"); - // Read register XCM_REG_XX_FREE val and check if condition on val exist - IDLE_CHK_1(0xE, XCM_REG_XX_FREE, (val != 32), IDLE_CHK_ERROR, "XCM: XX_FREE differs from expected 32"); - // Read register UCM_REG_XX_FREE val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_XX_FREE, (val != 27), IDLE_CHK_ERROR_NO_TRAFFIC, "UCM: XX_FREE differs from expected 27"); - // Read register TCM_REG_XX_FREE val and check if condition on val exist - IDLE_CHK_1(0x7, TCM_REG_XX_FREE, (val != 32), IDLE_CHK_ERROR, "TCM: XX_FREE differs from expected 32"); - // Read register TCM_REG_XX_FREE val and check if condition on val exist - IDLE_CHK_1(0x8, TCM_REG_XX_FREE, (val != 29), IDLE_CHK_ERROR, "TCM: XX_FREE differs from expected 29"); - // Read register CCM_REG_XX_FREE val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_XX_FREE, (val != 24), IDLE_CHK_ERROR, "CCM: XX_FREE differs from expected 24"); - // Read register XSEM_REG_FAST_MEMORY + 0x18000 val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_FAST_MEMORY + 0x18000, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "XSEM: FOC0 credit less than initial credit"); - // Read register XSEM_REG_FAST_MEMORY + 0x18040 val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_FAST_MEMORY + 0x18040, (val != 24), IDLE_CHK_ERROR_NO_TRAFFIC, "XSEM: FOC1 credit less than initial credit"); - // Read register XSEM_REG_FAST_MEMORY + 0x18080 val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_FAST_MEMORY + 0x18080, (val != 12), IDLE_CHK_ERROR_NO_TRAFFIC, "XSEM: FOC2 credit less than initial credit"); - // Read register USEM_REG_FAST_MEMORY + 0x18000 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_FAST_MEMORY + 0x18000, (val != 26), IDLE_CHK_ERROR_NO_TRAFFIC, "USEM: FOC0 credit less than initial credit"); - // Read register USEM_REG_FAST_MEMORY + 0x18040 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_FAST_MEMORY + 0x18040, (val != 78), IDLE_CHK_ERROR_NO_TRAFFIC, "USEM: FOC1 credit less than initial credit"); - // Read register USEM_REG_FAST_MEMORY + 0x18080 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_FAST_MEMORY + 0x18080, (val != 16), IDLE_CHK_ERROR_NO_TRAFFIC, "USEM: FOC2 credit less than initial credit"); - // Read register USEM_REG_FAST_MEMORY + 0x180C0 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_FAST_MEMORY + 0x180C0, (val != 32), IDLE_CHK_ERROR_NO_TRAFFIC, "USEM: FOC3 credit less than initial credit"); - // Read register TSEM_REG_FAST_MEMORY + 0x18000 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_FAST_MEMORY + 0x18000, (val != 52), IDLE_CHK_ERROR_NO_TRAFFIC, "TSEM: FOC0 credit less than initial credit"); - // Read register TSEM_REG_FAST_MEMORY + 0x18040 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_FAST_MEMORY + 0x18040, (val != 24), IDLE_CHK_ERROR_NO_TRAFFIC, "TSEM: FOC1 credit less than initial credit"); - // Read register TSEM_REG_FAST_MEMORY + 0x18080 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_FAST_MEMORY + 0x18080, (val != 12), IDLE_CHK_ERROR_NO_TRAFFIC, "TSEM: FOC2 credit less than initial credit"); - // Read register TSEM_REG_FAST_MEMORY + 0x180C0 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_FAST_MEMORY + 0x180C0, (val != 32), IDLE_CHK_ERROR_NO_TRAFFIC, "TSEM: FOC3 credit less than initial credit"); - // Read register CSEM_REG_FAST_MEMORY + 0x18000 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_FAST_MEMORY + 0x18000, (val != 16), IDLE_CHK_ERROR_NO_TRAFFIC, "CSEM: FOC0 credit less than initial credit"); - // Read register CSEM_REG_FAST_MEMORY + 0x18040 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_FAST_MEMORY + 0x18040, (val != 18), IDLE_CHK_ERROR_NO_TRAFFIC, "CSEM: FOC1 credit less than initial credit"); - // Read register CSEM_REG_FAST_MEMORY + 0x18080 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_FAST_MEMORY + 0x18080, (val != 48), IDLE_CHK_ERROR_NO_TRAFFIC, "CSEM: FOC2 credit less than initial credit"); - // Read register CSEM_REG_FAST_MEMORY + 0x180C0 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_FAST_MEMORY + 0x180C0, (val != 14), IDLE_CHK_ERROR_NO_TRAFFIC, "CSEM: FOC3 credit less than initial credit"); - // Read register PRS_REG_TSDM_CURRENT_CREDIT val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_TSDM_CURRENT_CREDIT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PRS: TSDM current credit is not 0"); - // Read register PRS_REG_TCM_CURRENT_CREDIT val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_TCM_CURRENT_CREDIT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PRS: TCM current credit is not 0"); - // Read register PRS_REG_CFC_LD_CURRENT_CREDIT val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_CFC_LD_CURRENT_CREDIT, (val != 0), IDLE_CHK_ERROR, "PRS: CFC_LD current credit is not 0"); - // Read register PRS_REG_CFC_SEARCH_CURRENT_CREDIT val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_CFC_SEARCH_CURRENT_CREDIT, (val != 0), IDLE_CHK_ERROR, "PRS: CFC_SEARCH current credit is not 0"); - // Read register PRS_REG_SRC_CURRENT_CREDIT val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_SRC_CURRENT_CREDIT, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PRS: SRCH current credit is not 0"); - // Read register PRS_REG_PENDING_BRB_PRS_RQ val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_PENDING_BRB_PRS_RQ, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PRS: PENDING_BRB_PRS_RQ is not 0"); - // Read register PRS_REG_PENDING_BRB_CAC0_RQ val in loop (incr by 4) and check if condition on val exist - IDLE_CHK_2(0xF, PRS_REG_PENDING_BRB_CAC0_RQ, 5, 4, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PRS: PENDING_BRB_CAC_RQ is not 0"); - // Read register PRS_REG_SERIAL_NUM_STATUS_LSB val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_SERIAL_NUM_STATUS_LSB, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PRS: SERIAL_NUM_STATUS_LSB is not 0"); - // Read register PRS_REG_SERIAL_NUM_STATUS_MSB val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_SERIAL_NUM_STATUS_MSB, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "PRS: SERIAL_NUM_STATUS_MSB is not 0"); - // Read register CDU_REG_ERROR_DATA val and check if condition on val exist - IDLE_CHK_1(0xF, CDU_REG_ERROR_DATA, (val != 0), IDLE_CHK_ERROR, "CDU: ERROR_DATA is not 0"); - // Read register CCM_REG_STORM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_STORM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "CCM: STORM declared message length unequal to actual"); - // Read register CCM_REG_CSDM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_CSDM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "CCM: CSDM declared message length unequal to actual"); - // Read register CCM_REG_TSEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_TSEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "CCM: TSEM declared message length unequal to actual"); - // Read register CCM_REG_XSEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_XSEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "CCM: XSEM declared message length unequal to actual"); - // Read register CCM_REG_USEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_USEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "CCM: USEM declared message length unequal to actual"); - // Read register CCM_REG_PBF_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, CCM_REG_PBF_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "CCM: PBF declared message length unequal to actual"); - // Read register TCM_REG_STORM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_STORM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "TCM: STORM declared message length unequal to actual"); - // Read register TCM_REG_TSDM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_TSDM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "TCM: TSDM declared message length unequal to actual"); - // Read register TCM_REG_PRS_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_PRS_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "TCM: PRS declared message length unequal to actual"); - // Read register TCM_REG_PBF_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_PBF_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "TCM: PBF declared message length unequal to actual"); - // Read register TCM_REG_USEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_USEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "TCM: USEM declared message length unequal to actual"); - // Read register TCM_REG_CSEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, TCM_REG_CSEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "TCM: CSEM declared message length unequal to actual"); - // Read register UCM_REG_STORM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_STORM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "UCM: STORM declared message length unequal to actual"); - // Read register UCM_REG_USDM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_USDM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "UCM: USDM declared message length unequal to actual"); - // Read register UCM_REG_TSEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_TSEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "UCM: TSEM declared message length unequal to actual"); - // Read register UCM_REG_CSEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_CSEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "UCM: CSEM declared message length unequal to actual"); - // Read register UCM_REG_XSEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_XSEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "UCM: XSEM declared message length unequal to actual"); - // Read register UCM_REG_DORQ_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, UCM_REG_DORQ_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "UCM: DORQ declared message length unequal to actual"); - // Read register XCM_REG_STORM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_STORM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: STORM declared message length unequal to actual"); - // Read register XCM_REG_XSDM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_XSDM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: XSDM declared message length unequal to actual"); - // Read register XCM_REG_TSEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_TSEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: TSEM declared message length unequal to actual"); - // Read register XCM_REG_CSEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_CSEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: CSEM declared message length unequal to actual"); - // Read register XCM_REG_USEM_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_USEM_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: USEM declared message length unequal to actual"); - // Read register XCM_REG_DORQ_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_DORQ_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: DORQ declared message length unequal to actual"); - // Read register XCM_REG_PBF_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_PBF_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: PBF declared message length unequal to actual"); - // Read register XCM_REG_NIG0_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_NIG0_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: NIG0 declared message length unequal to actual"); - // Read register XCM_REG_NIG1_LENGTH_MIS val and check if condition on val exist - IDLE_CHK_1(0xF, XCM_REG_NIG1_LENGTH_MIS, (val != 0), IDLE_CHK_ERROR, "XCM: NIG1 declared message length unequal to actual"); - // Read register QM_REG_XQM_WRC_FIFOLVL val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_XQM_WRC_FIFOLVL, (val != 0), IDLE_CHK_ERROR, "QM: XQM wrc_fifolvl is not 0"); - // Read register QM_REG_UQM_WRC_FIFOLVL val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_UQM_WRC_FIFOLVL, (val != 0), IDLE_CHK_ERROR, "QM: UQM wrc_fifolvl is not 0"); - // Read register QM_REG_TQM_WRC_FIFOLVL val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_TQM_WRC_FIFOLVL, (val != 0), IDLE_CHK_ERROR, "QM: TQM wrc_fifolvl is not 0"); - // Read register QM_REG_CQM_WRC_FIFOLVL val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_CQM_WRC_FIFOLVL, (val != 0), IDLE_CHK_ERROR, "QM: CQM wrc_fifolvl is not 0"); - // Read register QM_REG_QSTATUS_LOW val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_QSTATUS_LOW, (val != 0), IDLE_CHK_ERROR, "QM: QSTATUS_LOW is not 0"); - // Read register QM_REG_QSTATUS_HIGH val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_QSTATUS_HIGH, (val != 0), IDLE_CHK_ERROR, "QM: QSTATUS_HIGH is not 0"); - // Read register QM_REG_PAUSESTATE0 val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_PAUSESTATE0, (val != 0), IDLE_CHK_ERROR, "QM: PAUSESTATE0 is not 0"); - // Read register QM_REG_PAUSESTATE1 val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_PAUSESTATE1, (val != 0), IDLE_CHK_ERROR, "QM: PAUSESTATE1 is not 0"); - // Read register QM_REG_OVFQNUM val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_OVFQNUM, (val != 0), IDLE_CHK_ERROR, "QM: OVFQNUM is not 0"); - // Read register QM_REG_OVFERROR val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_OVFERROR, (val != 0), IDLE_CHK_ERROR, "QM: OVFERROR is not 0"); - // Special check for QM PTRTBL - IDLE_CHK_6(0xF, QM_REG_PTRTBL, 64, 8, IDLE_CHK_ERROR_NO_TRAFFIC); - // Read register BRB1_REG_BRB1_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, BRB1_REG_BRB1_PRTY_STS, ((val & ~ 0x8) != 0), IDLE_CHK_WARNING, "BRB1: parity status is not 0"); - // Read register CDU_REG_CDU_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, CDU_REG_CDU_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "CDU: parity status is not 0"); - // Read register CFC_REG_CFC_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, CFC_REG_CFC_PRTY_STS, ((val & ~0x2)!= 0), IDLE_CHK_WARNING, "CFC: parity status is not 0"); - // Read register CSDM_REG_CSDM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, CSDM_REG_CSDM_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "CSDM: parity status is not 0"); - // Read register DBG_REG_DBG_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x3, DBG_REG_DBG_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "DBG: parity status is not 0"); - // Read register DMAE_REG_DMAE_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, DMAE_REG_DMAE_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "DMAE: parity status is not 0"); - // Read register DORQ_REG_DORQ_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, DORQ_REG_DORQ_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "DORQ: parity status is not 0"); - // Read register TCM_REG_TCM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x1, TCM_REG_TCM_PRTY_STS, ((val & ~0x3ffc0) != 0), IDLE_CHK_WARNING, "TCM: parity status is not 0"); - // Read register TCM_REG_TCM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xE, TCM_REG_TCM_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "TCM: parity status is not 0"); - // Read register CCM_REG_CCM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x1, CCM_REG_CCM_PRTY_STS, ((val & ~0x3ffc0) != 0), IDLE_CHK_WARNING, "CCM: parity status is not 0"); - // Read register CCM_REG_CCM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xE, CCM_REG_CCM_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "CCM: parity status is not 0"); - // Read register UCM_REG_UCM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x1, UCM_REG_UCM_PRTY_STS, ((val & ~0x3ffc0) != 0), IDLE_CHK_WARNING, "UCM: parity status is not 0"); - // Read register UCM_REG_UCM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xE, UCM_REG_UCM_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "UCM: parity status is not 0"); - // Read register XCM_REG_XCM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x1, XCM_REG_XCM_PRTY_STS, ((val & ~0x3ffc0) != 0), IDLE_CHK_WARNING, "XCM: parity status is not 0"); - // Read register XCM_REG_XCM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xE, XCM_REG_XCM_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "XCM: parity status is not 0"); - // Read register HC_REG_HC_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x1, HC_REG_HC_PRTY_STS, ((val& ~0x1) != 0), IDLE_CHK_WARNING, "HC: parity status is not 0"); - // Read register MISC_REG_MISC_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x1, MISC_REG_MISC_PRTY_STS, ((val& ~0x1) != 0), IDLE_CHK_WARNING, "MISC: parity status is not 0"); - // Read register PRS_REG_PRS_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, PRS_REG_PRS_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "PRS: parity status is not 0"); - // Read register PXP_REG_PXP_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, PXP_REG_PXP_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "PXP: parity status is not 0"); - // Read register QM_REG_QM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, QM_REG_QM_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "QM: parity status is not 0"); - // Read register SRC_REG_SRC_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x1, SRC_REG_SRC_PRTY_STS, ((val & ~0x4) != 0), IDLE_CHK_WARNING, "SRCH: parity status is not 0"); - // Read register TSDM_REG_TSDM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, TSDM_REG_TSDM_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "TSDM: parity status is not 0"); - // Read register USDM_REG_USDM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, USDM_REG_USDM_PRTY_STS, ((val & ~0x20) != 0), IDLE_CHK_WARNING, "USDM: parity status is not 0"); - // Read register XSDM_REG_XSDM_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, XSDM_REG_XSDM_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "XSDM: parity status is not 0"); - // Read register GRCBASE_XPB + PB_REG_PB_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, GRCBASE_XPB + PB_REG_PB_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "XPB: parity status is not 0"); - // Read register GRCBASE_UPB + PB_REG_PB_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xF, GRCBASE_UPB + PB_REG_PB_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "UPB: parity status is not 0"); - // Read register CSEM_REG_CSEM_PRTY_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_CSEM_PRTY_STS_0, (val != 0), IDLE_CHK_WARNING, "CSEM: parity status 0 is not 0"); - // Read register PXP2_REG_PXP2_PRTY_STS_0 val and check if condition on val exist - IDLE_CHK_1(0x1, PXP2_REG_PXP2_PRTY_STS_0, ((val & ~0xfff40020) != 0) , IDLE_CHK_WARNING, "PXP2: parity status 0 is not 0"); - // Read register PXP2_REG_PXP2_PRTY_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xE, PXP2_REG_PXP2_PRTY_STS_0, ((val & ~0x20) != 0), IDLE_CHK_WARNING, "PXP2: parity status 0 is not 0"); - // Read register TSEM_REG_TSEM_PRTY_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_TSEM_PRTY_STS_0, (val != 0), IDLE_CHK_WARNING, "TSEM: parity status 0 is not 0"); - // Read register USEM_REG_USEM_PRTY_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_USEM_PRTY_STS_0, (val != 0), IDLE_CHK_WARNING, "USEM: parity status 0 is not 0"); - // Read register XSEM_REG_XSEM_PRTY_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_XSEM_PRTY_STS_0, (val != 0), IDLE_CHK_WARNING, "XSEM: parity status 0 is not 0"); - // Read register CSEM_REG_CSEM_PRTY_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_CSEM_PRTY_STS_1, (val != 0), IDLE_CHK_WARNING, "CSEM: parity status 1 is not 0"); - // Read register PXP2_REG_PXP2_PRTY_STS_1 val and check if condition on val exist - IDLE_CHK_1(0x1, PXP2_REG_PXP2_PRTY_STS_1, ((val & ~0x20) != 0), IDLE_CHK_WARNING, "PXP2: parity status 1 is not 0"); - // Read register PXP2_REG_PXP2_PRTY_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xE, PXP2_REG_PXP2_PRTY_STS_1, (val != 0), IDLE_CHK_WARNING, "PXP2: parity status 1 is not 0"); - // Read register TSEM_REG_TSEM_PRTY_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_TSEM_PRTY_STS_1, (val != 0), IDLE_CHK_WARNING, "TSEM: parity status 1 is not 0"); - // Read register USEM_REG_USEM_PRTY_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_USEM_PRTY_STS_1, (val != 0), IDLE_CHK_WARNING, "USEM: parity status 1 is not 0"); - // Read register XSEM_REG_XSEM_PRTY_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_XSEM_PRTY_STS_1, (val != 0), IDLE_CHK_WARNING, "XSEM: parity status 1 is not 0"); - // Read register PGLUE_B_REG_PGLUE_B_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_PGLUE_B_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "PGLUE_B: parity status is not 0"); - // Read register QM_REG_QTASKCTR_EXT_A_0 val in loop (incr by 4) and check if condition on val exist - IDLE_CHK_2(0x2, QM_REG_QTASKCTR_EXT_A_0, 64, 4, (val != 0), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: Q_EXT_A (upper 64 queues), Queue is not empty"); - // Read register QM_REG_QSTATUS_LOW_EXT_A val and check if condition on val exist - IDLE_CHK_1(0x2, QM_REG_QSTATUS_LOW_EXT_A, (val != 0), IDLE_CHK_ERROR, "QM: QSTATUS_LOW_EXT_A is not 0"); - // Read register QM_REG_QSTATUS_HIGH_EXT_A val and check if condition on val exist - IDLE_CHK_1(0x2, QM_REG_QSTATUS_HIGH_EXT_A, (val != 0), IDLE_CHK_ERROR, "QM: QSTATUS_HIGH_EXT_A is not 0"); - // Read register QM_REG_PAUSESTATE2 val and check if condition on val exist - IDLE_CHK_1(0xE, QM_REG_PAUSESTATE2, (val != 0), IDLE_CHK_ERROR, "QM: PAUSESTATE2 is not 0"); - // Read register QM_REG_PAUSESTATE3 val and check if condition on val exist - IDLE_CHK_1(0xE, QM_REG_PAUSESTATE3, (val != 0), IDLE_CHK_ERROR, "QM: PAUSESTATE3 is not 0"); - // Read register QM_REG_PAUSESTATE4 val and check if condition on val exist - IDLE_CHK_1(0x2, QM_REG_PAUSESTATE4, (val != 0), IDLE_CHK_ERROR, "QM: PAUSESTATE4 is not 0"); - // Read register QM_REG_PAUSESTATE5 val and check if condition on val exist - IDLE_CHK_1(0x2, QM_REG_PAUSESTATE5, (val != 0), IDLE_CHK_ERROR, "QM: PAUSESTATE5 is not 0"); - // Read register QM_REG_PAUSESTATE6 val and check if condition on val exist - IDLE_CHK_1(0x2, QM_REG_PAUSESTATE6, (val != 0), IDLE_CHK_ERROR, "QM: PAUSESTATE6 is not 0"); - // Read register QM_REG_PAUSESTATE7 val and check if condition on val exist - IDLE_CHK_1(0x2, QM_REG_PAUSESTATE7, (val != 0), IDLE_CHK_ERROR, "QM: PAUSESTATE7 is not 0"); - // Special check for QM PTRTBL - IDLE_CHK_6(0x2, QM_REG_PTRTBL_EXT_A, 64, 8, IDLE_CHK_ERROR_NO_TRAFFIC); - // Read register MISC_REG_AEU_SYS_KILL_OCCURRED val and check if condition on val exist - IDLE_CHK_1(0xE, MISC_REG_AEU_SYS_KILL_OCCURRED, (val != 0), IDLE_CHK_ERROR, "MISC: system kill occurd;"); - // Read register MISC_REG_AEU_SYS_KILL_STATUS_0 val and check if condition on val exist - IDLE_CHK_1(0xE, MISC_REG_AEU_SYS_KILL_STATUS_0, (val != 0), IDLE_CHK_ERROR, "MISC: system kill occurd; status_0 register"); - // Read register MISC_REG_AEU_SYS_KILL_STATUS_1 val and check if condition on val exist - IDLE_CHK_1(0xE, MISC_REG_AEU_SYS_KILL_STATUS_1, (val != 0), IDLE_CHK_ERROR, "MISC: system kill occurd; status_1 register"); - // Read register MISC_REG_AEU_SYS_KILL_STATUS_2 val and check if condition on val exist - IDLE_CHK_1(0xE, MISC_REG_AEU_SYS_KILL_STATUS_2, (val != 0), IDLE_CHK_ERROR, "MISC: system kill occurd; status_2 register"); - // Read register MISC_REG_AEU_SYS_KILL_STATUS_3 val and check if condition on val exist - IDLE_CHK_1(0xE, MISC_REG_AEU_SYS_KILL_STATUS_3, (val != 0), IDLE_CHK_ERROR, "MISC: system kill occurd; status_3 register"); - // Read register MISC_REG_PCIE_HOT_RESET val and check if condition on val exist - IDLE_CHK_1(0xE, MISC_REG_PCIE_HOT_RESET, (val != 0), IDLE_CHK_WARNING, "MISC: pcie_rst_b was asserted without perst assertion"); - // Read register NIG_REG_NIG_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, NIG_REG_NIG_INT_STS_0, ((val & ~0x300) != 0), IDLE_CHK_ERROR, "NIG: interrupt 0 is active"); - // Read register NIG_REG_NIG_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, NIG_REG_NIG_INT_STS_0, (val == 0x300), IDLE_CHK_WARNING, "NIG: Access to BMAC while not active. If tested on FPGA, ignore this warning."); - // Read register NIG_REG_NIG_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, NIG_REG_NIG_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "NIG: interrupt 1 is active"); - // Read register NIG_REG_NIG_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x2, NIG_REG_NIG_PRTY_STS, ((val & ~0xFFC00000) != 0), IDLE_CHK_ERROR, "NIG: parity interrupt is active"); - // Read register NIG_REG_NIG_PRTY_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xC, NIG_REG_NIG_PRTY_STS_0, ((val & ~0xFFC00000) != 0), IDLE_CHK_ERROR, "NIG: parity 0 interrupt is active"); - // Read register NIG_REG_NIG_PRTY_STS_1 val and check if condition on val exist - IDLE_CHK_1(0x4, NIG_REG_NIG_PRTY_STS_1, ((val & 0xff) != 0), IDLE_CHK_ERROR, "NIG: parity 1 interrupt is active"); - // Read register NIG_REG_NIG_PRTY_STS_1 val and check if condition on val exist - IDLE_CHK_1(0x8, NIG_REG_NIG_PRTY_STS_1, (val != 0), IDLE_CHK_ERROR, "NIG: parity 1 interrupt is active"); - // Read register TSEM_REG_TSEM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_TSEM_INT_STS_0, ((val & ~0x10000000) != 0), IDLE_CHK_WARNING, "TSEM: interrupt 0 is active"); - // Read register TSEM_REG_TSEM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_TSEM_INT_STS_0, (val == 0x10000000), IDLE_CHK_WARNING, "TSEM: interrupt 0 is active"); - // Read register TSEM_REG_TSEM_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, TSEM_REG_TSEM_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "TSEM: interrupt 1 is active"); - // Read register CSEM_REG_CSEM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_CSEM_INT_STS_0, ((val & ~0x10000000) != 0), IDLE_CHK_WARNING, "CSEM: interrupt 0 is active"); - // Read register CSEM_REG_CSEM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_CSEM_INT_STS_0, (val == 0x10000000), IDLE_CHK_WARNING, "CSEM: interrupt 0 is active"); - // Read register CSEM_REG_CSEM_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, CSEM_REG_CSEM_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "CSEM: interrupt 1 is active"); - // Read register USEM_REG_USEM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_USEM_INT_STS_0, ((val & ~0x10000000) != 0), IDLE_CHK_WARNING, "USEM: interrupt 0 is active"); - // Read register USEM_REG_USEM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_USEM_INT_STS_0, (val == 0x10000000), IDLE_CHK_WARNING, "USEM: interrupt 0 is active"); - // Read register USEM_REG_USEM_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, USEM_REG_USEM_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "USEM: interrupt 1 is active"); - // Read register XSEM_REG_XSEM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_XSEM_INT_STS_0, ((val & ~0x10000000) != 0), IDLE_CHK_WARNING, "XSEM: interrupt 0 is active"); - // Read register XSEM_REG_XSEM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_XSEM_INT_STS_0, (val == 0x10000000), IDLE_CHK_WARNING, "XSEM: interrupt 0 is active"); - // Read register XSEM_REG_XSEM_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, XSEM_REG_XSEM_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "XSEM: interrupt 1 is active"); - // Read register TSDM_REG_TSDM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, TSDM_REG_TSDM_INT_STS_0, (val != 0), IDLE_CHK_ERROR, "TSDM: interrupt 0 is active"); - // Read register TSDM_REG_TSDM_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, TSDM_REG_TSDM_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "TSDM: interrupt 0 is active"); - // Read register CSDM_REG_CSDM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, CSDM_REG_CSDM_INT_STS_0, (val != 0), IDLE_CHK_ERROR, "CSDM: interrupt 0 is active"); - // Read register CSDM_REG_CSDM_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, CSDM_REG_CSDM_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "CSDM: interrupt 0 is active"); - // Read register USDM_REG_USDM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, USDM_REG_USDM_INT_STS_0, (val != 0), IDLE_CHK_ERROR, "USDM: interrupt 0 is active"); - // Read register USDM_REG_USDM_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, USDM_REG_USDM_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "USDM: interrupt 0 is active"); - // Read register XSDM_REG_XSDM_INT_STS_0 val and check if condition on val exist - IDLE_CHK_1(0xF, XSDM_REG_XSDM_INT_STS_0, (val != 0), IDLE_CHK_ERROR, "XSDM: interrupt 0 is active"); - // Read register XSDM_REG_XSDM_INT_STS_1 val and check if condition on val exist - IDLE_CHK_1(0xF, XSDM_REG_XSDM_INT_STS_1, (val != 0), IDLE_CHK_ERROR, "XSDM: interrupt 0 is active"); - // Read register HC_REG_HC_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0x2, HC_REG_HC_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "HC: parity status is not 0"); - // Read register MISC_REG_MISC_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xE, MISC_REG_MISC_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "MISC: parity status is not 0"); - // Read register SRC_REG_SRC_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xE, SRC_REG_SRC_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "SRCH: parity status is not 0"); - // Read register QM_REG_BYTECRD0 val1 and register QM_REG_BYTECRDINITVAL val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xC, QM_REG_BYTECRD0, QM_REG_BYTECRDINITVAL, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: Byte credit 0 is not equal to initial credit"); - // Read register QM_REG_BYTECRD1 val1 and register QM_REG_BYTECRDINITVAL val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xC, QM_REG_BYTECRD1, QM_REG_BYTECRDINITVAL, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: Byte credit 1 is not equal to initial credit"); - // Read register QM_REG_BYTECRD2 val1 and register QM_REG_BYTECRDINITVAL val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xC, QM_REG_BYTECRD2, QM_REG_BYTECRDINITVAL, (val1 != val2), IDLE_CHK_ERROR_NO_TRAFFIC, "QM: Byte credit 2 is not equal to initial credit"); - // Read register QM_REG_VOQCRDERRREG val and check if condition on val exist - IDLE_CHK_1(0xC, QM_REG_VOQCRDERRREG, ((val & 0xFFFF) != 0), IDLE_CHK_ERROR, "QM: VOQ credit error register is not 0 (VOQ credit overflow/underflow)"); - // Read register QM_REG_BYTECRDERRREG val and check if condition on val exist - IDLE_CHK_1(0xC, QM_REG_BYTECRDERRREG, ((val & 0xFFF) != 0), IDLE_CHK_ERROR, "QM: Byte credit error register is not 0 (Byte credit overflow/underflow)"); - // Read register PGLUE_B_REG_FLR_REQUEST_VF_31_0 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_FLR_REQUEST_VF_31_0, (val != 0), IDLE_CHK_WARNING, "PGL: FLR request is set for VF addresses 31-0"); - // Read register PGLUE_B_REG_FLR_REQUEST_VF_63_32 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_FLR_REQUEST_VF_63_32, (val != 0), IDLE_CHK_WARNING, "PGL: FLR request is set for VF addresses 63-32"); - // Read register PGLUE_B_REG_FLR_REQUEST_VF_95_64 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_FLR_REQUEST_VF_95_64, (val != 0), IDLE_CHK_WARNING, "PGL: FLR request is set for VF addresses 95-64"); - // Read register PGLUE_B_REG_FLR_REQUEST_VF_127_96 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_FLR_REQUEST_VF_127_96, (val != 0), IDLE_CHK_WARNING, "PGL: FLR request is set for VF addresses 127-96"); - // Read register PGLUE_B_REG_FLR_REQUEST_PF_7_0 val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_FLR_REQUEST_PF_7_0, (val != 0), IDLE_CHK_WARNING, "PGL: FLR request is set for PF addresses 7-0"); - // Read register PGLUE_B_REG_SR_IOV_DISABLED_REQUEST val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_SR_IOV_DISABLED_REQUEST, (val != 0), IDLE_CHK_WARNING, "PGL: SR-IOV disable request is set "); - // Read register PGLUE_B_REG_CFG_SPACE_A_REQUEST val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_CFG_SPACE_A_REQUEST, (val != 0), IDLE_CHK_WARNING, "PGL: Cfg-Space A request is set"); - // Read register PGLUE_B_REG_CFG_SPACE_B_REQUEST val and check if condition on val exist - IDLE_CHK_1(0xC, PGLUE_B_REG_CFG_SPACE_B_REQUEST, (val != 0), IDLE_CHK_WARNING, "PGL: Cfg-Space B request is set"); - // Read register IGU_REG_ERROR_HANDLING_DATA_VALID val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_ERROR_HANDLING_DATA_VALID, (val != 0), IDLE_CHK_ERROR, "IGU: some unauthorized commands arrived to the IGU. Read IGU_REG_ERROR_HANDLING_MEMORY for more details."); - // Read register IGU_REG_ATTN_WRITE_DONE_PENDING val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_ATTN_WRITE_DONE_PENDING, (val != 0), IDLE_CHK_WARNING, "IGU attention message write done pending is not empty"); - // Read register IGU_REG_WRITE_DONE_PENDING val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_WRITE_DONE_PENDING, (val != 0), IDLE_CHK_WARNING, "IGU MSI/MSIX message write done pending is not empty"); - // Read register IGU_REG_IGU_PRTY_STS val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_IGU_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "IGU: parity status is not 0"); - // Read register MISC_REG_GRC_TIMEOUT_ATTN val1 and register MISC_REG_AEU_AFTER_INVERT_4_FUNC_0 val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xE, MISC_REG_GRC_TIMEOUT_ATTN, MISC_REG_AEU_AFTER_INVERT_4_FUNC_0, ((val2 & 0x4000000) != 0), IDLE_CHK_ERROR, "MISC_REG_GRC_TIMEOUT_ATTN: GRC timeout attention parameters (FUNC_0)."); - // Read register MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID val1 and register MISC_REG_AEU_AFTER_INVERT_4_FUNC_0 val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xC, MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID, MISC_REG_AEU_AFTER_INVERT_4_FUNC_0, ((val2 & 0x4000000) != 0), IDLE_CHK_ERROR, "MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID: GRC timeout attention FID (FUNC_0)."); - // Read register MISC_REG_GRC_TIMEOUT_ATTN val1 and register MISC_REG_AEU_AFTER_INVERT_4_FUNC_1 val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xE, MISC_REG_GRC_TIMEOUT_ATTN, MISC_REG_AEU_AFTER_INVERT_4_FUNC_1, ((val2 & 0x4000000) != 0), IDLE_CHK_ERROR, "MISC_REG_GRC_TIMEOUT_ATTN: GRC timeout attention parameters (FUNC_1)."); - // Read register MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID val1 and register MISC_REG_AEU_AFTER_INVERT_4_FUNC_1 val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xC, MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID, MISC_REG_AEU_AFTER_INVERT_4_FUNC_1, ((val2 & 0x4000000) != 0), IDLE_CHK_ERROR, "MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID: GRC timeout attention FID (FUNC_1)."); - // Read register MISC_REG_GRC_TIMEOUT_ATTN val1 and register MISC_REG_AEU_AFTER_INVERT_4_MCP val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xE, MISC_REG_GRC_TIMEOUT_ATTN, MISC_REG_AEU_AFTER_INVERT_4_MCP, ((val2 & 0x4000000) != 0), IDLE_CHK_ERROR, "MISC_REG_GRC_TIMEOUT_ATTN: GRC timeout attention parameters (MCP)."); - // Read register MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID val1 and register MISC_REG_AEU_AFTER_INVERT_4_MCP val2 and check if condition on val1,val2 exist - IDLE_CHK_3(0xC, MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID, MISC_REG_AEU_AFTER_INVERT_4_MCP, ((val2 & 0x4000000) != 0), IDLE_CHK_ERROR, "MISC_REG_GRC_TIMEOUT_ATTN_FULL_FID: GRC timeout attention FID (MCP)."); - // Read register IGU_REG_SILENT_DROP val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_SILENT_DROP, (val != 0), IDLE_CHK_ERROR, "Some messages were not executed in the IGU."); - // Read register PXP2_REG_PSWRQ_BW_CREDIT val and check if condition on val exist - IDLE_CHK_1(0xC, PXP2_REG_PSWRQ_BW_CREDIT, (val != 0x2D), IDLE_CHK_ERROR, "PXP2: rq_read_credit and rq_write_credit are not 5"); - // Read register IGU_REG_SB_CTRL_FSM val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_SB_CTRL_FSM, (val != 0), IDLE_CHK_WARNING, "IGU: block is not in idle. SB_CTRL_FSM should be zero in idle state"); - // Read register IGU_REG_INT_HANDLE_FSM val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_INT_HANDLE_FSM, (val != 0), IDLE_CHK_WARNING, "IGU: block is not in idle. INT_HANDLE_FSM should be zero in idle state"); - // Read register IGU_REG_ATTN_FSM val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_ATTN_FSM, ((val & ~0x2) != 0), IDLE_CHK_WARNING, "IGU: block is not in idle. SB_ATTN_FSMshould be zeroor two in idle state"); - // Read register IGU_REG_CTRL_FSM val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_CTRL_FSM, ((val & ~0x1) != 0), IDLE_CHK_WARNING, "IGU: block is not in idle. SB_CTRL_FSM should be zero in idle state"); - // Read register IGU_REG_PXP_ARB_FSM val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_PXP_ARB_FSM, ((val & ~0x1) != 0), IDLE_CHK_WARNING, "IGU: block is not in idle. SB_ARB_FSM should be zero in idle state"); - // Read register IGU_REG_PENDING_BITS_STATUS val and check if condition on val exist - IDLE_CHK_1(0xC, IGU_REG_PENDING_BITS_STATUS, (val != 0), IDLE_CHK_WARNING, "IGU: block is not in idle. There are pending write done"); - - if (errors == 0) { - BNX2X_DBG_ERR("completed successfully (with %d warnings)\n", - idle_chk_warnings); - } else { - BNX2X_DBG_ERR("failed (with %d errors, %d warnings)\n", - errors, idle_chk_warnings); - } - return errors; -} - diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp.c new file mode 100644 index 0000000..b7e4577 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp.c @@ -0,0 +1,5938 @@ +/* bnx2x_sp.c: Broadcom Everest network driver. + * + * Copyright 2011-2012 Broadcom Corporation + * + * Unless you and Broadcom execute a separate written software license + * agreement governing use of this software, this software is licensed to you + * under the terms of the GNU General Public License version 2, available + * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). + * + * Notwithstanding the above, under no circumstances may you combine this + * software in any way with any other Broadcom software provided under a + * license other than the GPL, without Broadcom's express prior written + * consent. + * + * Maintained by: Eilon Greenstein + * Written by: Vladislav Zolotarov + * + */ +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE >= 0x02061b) && !defined(BNX2X_DRIVER_DISK) && !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ +#include +#endif +#include "bnx2x.h" +#include "bnx2x_cmn.h" +#include "bnx2x_sp.h" + +#define BNX2X_MAX_EMUL_MULTI 16 + +#define MAC_LEADING_ZERO_CNT (ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN) + +/**** Exe Queue interfaces ****/ + +/** + * bnx2x_exe_queue_init - init the Exe Queue object + * + * @o: poiter to the object + * @exe_len: length + * @owner: poiter to the owner + * @validate: validate function pointer + * @optimize: optimize function pointer + * @exec: execute function pointer + * @get: get function pointer + */ +static inline void bnx2x_exe_queue_init(struct bnx2x *bp, + struct bnx2x_exe_queue_obj *o, + int exe_len, + union bnx2x_qable_obj *owner, + exe_q_validate validate, + exe_q_remove remove, + exe_q_optimize optimize, + exe_q_execute exec, + exe_q_get get) +{ + memset(o, 0, sizeof(*o)); + + INIT_LIST_HEAD(&o->exe_queue); + INIT_LIST_HEAD(&o->pending_comp); + + spin_lock_init(&o->lock); + + o->exe_chunk_len = exe_len; + o->owner = owner; + + /* Owner specific callbacks */ + o->validate = validate; + o->remove = remove; + o->optimize = optimize; + o->execute = exec; + o->get = get; + + DP(BNX2X_MSG_SP, "Setup the execution queue with the chunk length of %d\n", + exe_len); +} + +static inline void bnx2x_exe_queue_free_elem(struct bnx2x *bp, + struct bnx2x_exeq_elem *elem) +{ + DP(BNX2X_MSG_SP, "Deleting an exe_queue element\n"); + kfree(elem); +} + +static inline int bnx2x_exe_queue_length(struct bnx2x_exe_queue_obj *o) +{ + struct bnx2x_exeq_elem *elem; + int cnt = 0; + + spin_lock_bh(&o->lock); + + list_for_each_entry(elem, &o->exe_queue, link) + cnt++; + + spin_unlock_bh(&o->lock); + + return cnt; +} + +/** + * bnx2x_exe_queue_add - add a new element to the execution queue + * + * @bp: driver handle + * @o: queue + * @cmd: new command to add + * @restore: true - do not optimize the command + * + * If the element is optimized or is illegal, frees it. + */ +static inline int bnx2x_exe_queue_add(struct bnx2x *bp, + struct bnx2x_exe_queue_obj *o, + struct bnx2x_exeq_elem *elem, + bool restore) +{ + int rc; + + spin_lock_bh(&o->lock); + + if (!restore) { + /* Try to cancel this element queue */ + rc = o->optimize(bp, o->owner, elem); + if (rc) + goto free_and_exit; + + /* Check if this request is ok */ + rc = o->validate(bp, o->owner, elem); + if (rc) { + DP(BNX2X_MSG_SP, "Preamble failed: %d\n", rc); + goto free_and_exit; + } + } + + /* If so, add it to the execution queue */ + list_add_tail(&elem->link, &o->exe_queue); + + spin_unlock_bh(&o->lock); + + return 0; + +free_and_exit: + bnx2x_exe_queue_free_elem(bp, elem); + + spin_unlock_bh(&o->lock); + + return rc; + +} + +static inline void __bnx2x_exe_queue_reset_pending( + struct bnx2x *bp, + struct bnx2x_exe_queue_obj *o) +{ + struct bnx2x_exeq_elem *elem; + + while (!list_empty(&o->pending_comp)) { + elem = list_first_entry(&o->pending_comp, + struct bnx2x_exeq_elem, link); + + list_del(&elem->link); + bnx2x_exe_queue_free_elem(bp, elem); + } +} + +static inline void bnx2x_exe_queue_reset_pending(struct bnx2x *bp, + struct bnx2x_exe_queue_obj *o) +{ + + spin_lock_bh(&o->lock); + + __bnx2x_exe_queue_reset_pending(bp, o); + + spin_unlock_bh(&o->lock); + +} + +/** + * bnx2x_exe_queue_step - execute one execution chunk atomically + * + * @bp: driver handle + * @o: queue + * @ramrod_flags: flags + * + * (Atomicy is ensured using the exe_queue->lock). + */ +static inline int bnx2x_exe_queue_step(struct bnx2x *bp, + struct bnx2x_exe_queue_obj *o, + unsigned long *ramrod_flags) +{ + struct bnx2x_exeq_elem *elem, spacer; + int cur_len = 0, rc; + + memset(&spacer, 0, sizeof(spacer)); + + spin_lock_bh(&o->lock); + + /* + * Next step should not be performed until the current is finished, + * unless a DRV_CLEAR_ONLY bit is set. In this case we just want to + * properly clear object internals without sending any command to the FW + * which also implies there won't be any completion to clear the + * 'pending' list. + */ + if (!list_empty(&o->pending_comp)) { + if (test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags)) { + DP(BNX2X_MSG_SP, "RAMROD_DRV_CLR_ONLY requested: resetting a pending_comp list\n"); + __bnx2x_exe_queue_reset_pending(bp, o); + } else { + spin_unlock_bh(&o->lock); + return 1; + } + } + + /* + * Run through the pending commands list and create a next + * execution chunk. + */ + while (!list_empty(&o->exe_queue)) { + elem = list_first_entry(&o->exe_queue, struct bnx2x_exeq_elem, + link); + WARN_ON(!elem->cmd_len); + + if (cur_len + elem->cmd_len <= o->exe_chunk_len) { + cur_len += elem->cmd_len; + /* + * Prevent from both lists being empty when moving an + * element. This will allow the call of + * bnx2x_exe_queue_empty() without locking. + */ + list_add_tail(&spacer.link, &o->pending_comp); + mb(); + list_del(&elem->link); + list_add_tail(&elem->link, &o->pending_comp); + list_del(&spacer.link); + } else + break; + } + + /* Sanity check */ + if (!cur_len) { + spin_unlock_bh(&o->lock); + return 0; + } + + rc = o->execute(bp, o->owner, &o->pending_comp, ramrod_flags); + if (rc < 0) + /* + * In case of an error return the commands back to the queue + * and reset the pending_comp. + */ + list_splice_init(&o->pending_comp, &o->exe_queue); + else if (!rc) + /* + * If zero is returned, means there are no outstanding pending + * completions and we may dismiss the pending list. + */ + __bnx2x_exe_queue_reset_pending(bp, o); + + spin_unlock_bh(&o->lock); + return rc; +} + +static inline bool bnx2x_exe_queue_empty(struct bnx2x_exe_queue_obj *o) +{ + bool empty = list_empty(&o->exe_queue); + + /* Don't reorder!!! */ + mb(); + + return empty && list_empty(&o->pending_comp); +} + +static inline struct bnx2x_exeq_elem *bnx2x_exe_queue_alloc_elem( + struct bnx2x *bp) +{ + DP(BNX2X_MSG_SP, "Allocating a new exe_queue element\n"); + return kzalloc(sizeof(struct bnx2x_exeq_elem), GFP_ATOMIC); +} + +/************************ raw_obj functions ***********************************/ +static bool bnx2x_raw_check_pending(struct bnx2x_raw_obj *o) +{ + return !!test_bit(o->state, o->pstate); +} + +static void bnx2x_raw_clear_pending(struct bnx2x_raw_obj *o) +{ + smp_mb__before_clear_bit(); + clear_bit(o->state, o->pstate); + smp_mb__after_clear_bit(); +} + +static void bnx2x_raw_set_pending(struct bnx2x_raw_obj *o) +{ + smp_mb__before_clear_bit(); + set_bit(o->state, o->pstate); + smp_mb__after_clear_bit(); +} + +/** + * bnx2x_state_wait - wait until the given bit(state) is cleared + * + * @bp: device handle + * @state: state which is to be cleared + * @state_p: state buffer + * + */ +static inline int bnx2x_state_wait(struct bnx2x *bp, int state, + unsigned long *pstate) +{ + /* can take a while if any port is running */ + int cnt = 5000; + + + if (CHIP_REV_IS_EMUL(bp)) + cnt *= 20; + + DP(BNX2X_MSG_SP, "waiting for state to become %d\n", state); + + might_sleep(); + while (cnt--) { + if (!test_bit(state, pstate)) { +#ifdef BNX2X_STOP_ON_ERROR + DP(BNX2X_MSG_SP, "exit (cnt %d)\n", 5000 - cnt); +#endif + return 0; + } + + usleep_range(1000, 1000); + + if (bp->panic) + return -EIO; + } + + /* timeout! */ + BNX2X_ERR("timeout waiting for state %d\n", state); +#ifdef BNX2X_STOP_ON_ERROR + bnx2x_panic(); +#endif + + return -EBUSY; +} + +static int bnx2x_raw_wait(struct bnx2x *bp, struct bnx2x_raw_obj *raw) +{ + return bnx2x_state_wait(bp, raw->state, raw->pstate); +} + +/***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/ +/* credit handling callbacks */ +static bool bnx2x_get_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int *offset) +{ + struct bnx2x_credit_pool_obj *mp = o->macs_pool; + + WARN_ON(!mp); + + return mp->get_entry(mp, offset); +} + +static bool bnx2x_get_credit_mac(struct bnx2x_vlan_mac_obj *o) +{ + struct bnx2x_credit_pool_obj *mp = o->macs_pool; + + WARN_ON(!mp); + + return mp->get(mp, 1); +} + +static bool bnx2x_get_cam_offset_vlan(struct bnx2x_vlan_mac_obj *o, int *offset) +{ + struct bnx2x_credit_pool_obj *vp = o->vlans_pool; + + WARN_ON(!vp); + + return vp->get_entry(vp, offset); +} + +static bool bnx2x_get_credit_vlan(struct bnx2x_vlan_mac_obj *o) +{ + struct bnx2x_credit_pool_obj *vp = o->vlans_pool; + + WARN_ON(!vp); + + return vp->get(vp, 1); +} + +static bool bnx2x_get_credit_vlan_mac(struct bnx2x_vlan_mac_obj *o) +{ + struct bnx2x_credit_pool_obj *mp = o->macs_pool; + struct bnx2x_credit_pool_obj *vp = o->vlans_pool; + + if (!mp->get(mp, 1)) + return false; + + if (!vp->get(vp, 1)) { + mp->put(mp, 1); + return false; + } + + return true; +} + +static bool bnx2x_put_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int offset) +{ + struct bnx2x_credit_pool_obj *mp = o->macs_pool; + + return mp->put_entry(mp, offset); +} + +static bool bnx2x_put_credit_mac(struct bnx2x_vlan_mac_obj *o) +{ + struct bnx2x_credit_pool_obj *mp = o->macs_pool; + + return mp->put(mp, 1); +} + +static bool bnx2x_put_cam_offset_vlan(struct bnx2x_vlan_mac_obj *o, int offset) +{ + struct bnx2x_credit_pool_obj *vp = o->vlans_pool; + + return vp->put_entry(vp, offset); +} + +static bool bnx2x_put_credit_vlan(struct bnx2x_vlan_mac_obj *o) +{ + struct bnx2x_credit_pool_obj *vp = o->vlans_pool; + + return vp->put(vp, 1); +} + +static bool bnx2x_put_credit_vlan_mac(struct bnx2x_vlan_mac_obj *o) +{ + struct bnx2x_credit_pool_obj *mp = o->macs_pool; + struct bnx2x_credit_pool_obj *vp = o->vlans_pool; + + if (!mp->put(mp, 1)) + return false; + + if (!vp->put(vp, 1)) { + mp->get(mp, 1); + return false; + } + + return true; +} + +static int bnx2x_get_n_elements(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o, + int n, u8 *buf) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + u8 *next = buf; + int counter = 0; + + /* traverse list */ + list_for_each_entry(pos, &o->head, link) { + if (counter < n) { + + /* place leading zeroes in buffer */ + memset(next, 0, MAC_LEADING_ZERO_CNT); + + /* place mac after leading zeroes*/ + memcpy(next + MAC_LEADING_ZERO_CNT, pos->u.mac.mac, + ETH_ALEN); + + /* calculate address of next element and + * advance counter + */ + counter++; + next = buf + counter * ALIGN(ETH_ALEN, sizeof(u32)); + + DP(BNX2X_MSG_SP, "copied element number %d to address %p element was " BNX2X_MAC_FMT"\n", + counter, next, BNX2X_MAC_PRN_LIST(pos->u.mac.mac)); + } + } + return counter * ETH_ALEN; +} + +/* check_add() callbacks */ +static int bnx2x_check_mac_add(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union bnx2x_classification_ramrod_data *data) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + + DP(BNX2X_MSG_SP, "Checking MAC "BNX2X_MAC_FMT" for ADD command\n", BNX2X_MAC_PRN_LIST(data->mac.mac)); + + if (!is_valid_ether_addr(data->mac.mac)) + return -EINVAL; + + /* Check if a requested MAC already exists */ + list_for_each_entry(pos, &o->head, link) + if (!memcmp(data->mac.mac, pos->u.mac.mac, ETH_ALEN)) + return -EEXIST; + + return 0; +} + +static int bnx2x_check_vlan_add(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union bnx2x_classification_ramrod_data *data) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + + DP(BNX2X_MSG_SP, "Checking VLAN %d for ADD command\n", data->vlan.vlan); + + list_for_each_entry(pos, &o->head, link) + if (data->vlan.vlan == pos->u.vlan.vlan) + return -EEXIST; + + return 0; +} + +static int bnx2x_check_vlan_mac_add(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union bnx2x_classification_ramrod_data *data) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + + DP(BNX2X_MSG_SP, "Checking VLAN_MAC ("BNX2X_MAC_FMT", %d) for ADD command\n", + BNX2X_MAC_PRN_LIST(data->vlan_mac.mac), data->vlan_mac.vlan); + + list_for_each_entry(pos, &o->head, link) + if ((data->vlan_mac.vlan == pos->u.vlan_mac.vlan) && + (!memcmp(data->vlan_mac.mac, pos->u.vlan_mac.mac, + ETH_ALEN))) + return -EEXIST; + + return 0; +} + + +/* check_del() callbacks */ +static struct bnx2x_vlan_mac_registry_elem * + bnx2x_check_mac_del(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union bnx2x_classification_ramrod_data *data) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + + DP(BNX2X_MSG_SP, "Checking MAC "BNX2X_MAC_FMT" for DEL command\n", BNX2X_MAC_PRN_LIST(data->mac.mac)); + + list_for_each_entry(pos, &o->head, link) + if (!memcmp(data->mac.mac, pos->u.mac.mac, ETH_ALEN)) + return pos; + + return NULL; +} + +static struct bnx2x_vlan_mac_registry_elem * + bnx2x_check_vlan_del(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union bnx2x_classification_ramrod_data *data) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + + DP(BNX2X_MSG_SP, "Checking VLAN %d for DEL command\n", data->vlan.vlan); + + list_for_each_entry(pos, &o->head, link) + if (data->vlan.vlan == pos->u.vlan.vlan) + return pos; + + return NULL; +} + +static struct bnx2x_vlan_mac_registry_elem * + bnx2x_check_vlan_mac_del(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union bnx2x_classification_ramrod_data *data) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + + DP(BNX2X_MSG_SP, "Checking VLAN_MAC ("BNX2X_MAC_FMT", %d) for DEL command\n", + BNX2X_MAC_PRN_LIST(data->vlan_mac.mac), data->vlan_mac.vlan); + + list_for_each_entry(pos, &o->head, link) + if ((data->vlan_mac.vlan == pos->u.vlan_mac.vlan) && + (!memcmp(data->vlan_mac.mac, pos->u.vlan_mac.mac, + ETH_ALEN))) + return pos; + + return NULL; +} + +/* check_move() callback */ +static bool bnx2x_check_move(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *src_o, + struct bnx2x_vlan_mac_obj *dst_o, + union bnx2x_classification_ramrod_data *data) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + int rc; + + /* Check if we can delete the requested configuration from the first + * object. + */ + pos = src_o->check_del(bp, src_o, data); + + /* check if configuration can be added */ + rc = dst_o->check_add(bp, dst_o, data); + + /* If this classification can not be added (is already set) + * or can't be deleted - return an error. + */ + if (rc || !pos) + return false; + + return true; +} + +static bool bnx2x_check_move_always_err( + struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *src_o, + struct bnx2x_vlan_mac_obj *dst_o, + union bnx2x_classification_ramrod_data *data) +{ + return false; +} + + +static inline u8 bnx2x_vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o) +{ + struct bnx2x_raw_obj *raw = &o->raw; + u8 rx_tx_flag = 0; + + if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) || + (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) + rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_TX_CMD; + + if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) || + (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) + rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_RX_CMD; + + return rx_tx_flag; +} + + +void bnx2x_set_mac_in_nig(struct bnx2x *bp, + bool add, unsigned char *dev_addr, int index) +{ + u32 wb_data[2]; + u32 reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM : + NIG_REG_LLH0_FUNC_MEM; + + if (!IS_MF_SI(bp) && !IS_MF_AFEX(bp)) + return; + + if (index > BNX2X_LLH_CAM_MAX_PF_LINE) + return; + + DP(BNX2X_MSG_SP, "Going to %s LLH configuration at entry %d\n", + (add ? "ADD" : "DELETE"), index); + + if (add) { + /* LLH_FUNC_MEM is a u64 WB register */ + reg_offset += 8*index; + + wb_data[0] = ((dev_addr[2] << 24) | (dev_addr[3] << 16) | + (dev_addr[4] << 8) | dev_addr[5]); + wb_data[1] = ((dev_addr[0] << 8) | dev_addr[1]); + + REG_WR_DMAE(bp, reg_offset, wb_data, 2); + } + + REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM_ENABLE : + NIG_REG_LLH0_FUNC_MEM_ENABLE) + 4*index, add); +} + +/** + * bnx2x_vlan_mac_set_cmd_hdr_e2 - set a header in a single classify ramrod + * + * @bp: device handle + * @o: queue for which we want to configure this rule + * @add: if true the command is an ADD command, DEL otherwise + * @opcode: CLASSIFY_RULE_OPCODE_XXX + * @hdr: pointer to a header to setup + * + */ +static inline void bnx2x_vlan_mac_set_cmd_hdr_e2(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, bool add, int opcode, + struct eth_classify_cmd_header *hdr) +{ + struct bnx2x_raw_obj *raw = &o->raw; + + hdr->client_id = raw->cl_id; + hdr->func_id = raw->func_id; + + /* Rx or/and Tx (internal switching) configuration ? */ + hdr->cmd_general_data |= + bnx2x_vlan_mac_get_rx_tx_flag(o); + + if (add) + hdr->cmd_general_data |= ETH_CLASSIFY_CMD_HEADER_IS_ADD; + + hdr->cmd_general_data |= + (opcode << ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT); +} + +/** + * bnx2x_vlan_mac_set_rdata_hdr_e2 - set the classify ramrod data header + * + * @cid: connection id + * @type: BNX2X_FILTER_XXX_PENDING + * @hdr: poiter to header to setup + * @rule_cnt: + * + * currently we always configure one rule and echo field to contain a CID and an + * opcode type. + */ +static inline void bnx2x_vlan_mac_set_rdata_hdr_e2(u32 cid, int type, + struct eth_classify_header *hdr, int rule_cnt) +{ + hdr->echo = (cid & BNX2X_SWCID_MASK) | (type << BNX2X_SWCID_SHIFT); + hdr->rule_cnt = (u8)rule_cnt; +} + + +/* hw_config() callbacks */ +static void bnx2x_set_one_mac_e2(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + struct bnx2x_exeq_elem *elem, int rule_idx, + int cam_offset) +{ + struct bnx2x_raw_obj *raw = &o->raw; + struct eth_classify_rules_ramrod_data *data = + (struct eth_classify_rules_ramrod_data *)(raw->rdata); + int rule_cnt = rule_idx + 1, cmd = elem->cmd_data.vlan_mac.cmd; + union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; + bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false; + unsigned long *vlan_mac_flags = &elem->cmd_data.vlan_mac.vlan_mac_flags; + u8 *mac = elem->cmd_data.vlan_mac.u.mac.mac; + + /* + * Set LLH CAM entry: currently only iSCSI and ETH macs are + * relevant. In addition, current implementation is tuned for a + * single ETH MAC. + * + * When multiple unicast ETH MACs PF configuration in switch + * independent mode is required (NetQ, multiple netdev MACs, + * etc.), consider better utilisation of 8 per function MAC + * entries in the LLH register. There is also + * NIG_REG_P[01]_LLH_FUNC_MEM2 registers that complete the + * total number of CAM entries to 16. + * + * Currently we won't configure NIG for MACs other than a primary ETH + * MAC and iSCSI L2 MAC. + * + * If this MAC is moving from one Queue to another, no need to change + * NIG configuration. + */ + if (cmd != BNX2X_VLAN_MAC_MOVE) { + if (test_bit(BNX2X_ISCSI_ETH_MAC, vlan_mac_flags)) + bnx2x_set_mac_in_nig(bp, add, mac, + BNX2X_LLH_CAM_ISCSI_ETH_LINE); + else if (test_bit(BNX2X_ETH_MAC, vlan_mac_flags)) + bnx2x_set_mac_in_nig(bp, add, mac, + BNX2X_LLH_CAM_ETH_LINE); + } + + /* Reset the ramrod data buffer for the first rule */ + if (rule_idx == 0) + memset(data, 0, sizeof(*data)); + + /* Setup a command header */ + bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_MAC, + &rule_entry->mac.header); + + DP(BNX2X_MSG_SP, "About to %s MAC "BNX2X_MAC_FMT" for Queue %d\n", + (add ? "add" : "delete"), BNX2X_MAC_PRN_LIST(mac), raw->cl_id); + + /* Set a MAC itself */ + bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb, + &rule_entry->mac.mac_mid, + &rule_entry->mac.mac_lsb, mac); + + /* MOVE: Add a rule that will add this MAC to the target Queue */ + if (cmd == BNX2X_VLAN_MAC_MOVE) { + rule_entry++; + rule_cnt++; + + /* Setup ramrod data */ + bnx2x_vlan_mac_set_cmd_hdr_e2(bp, + elem->cmd_data.vlan_mac.target_obj, + true, CLASSIFY_RULE_OPCODE_MAC, + &rule_entry->mac.header); + + /* Set a MAC itself */ + bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb, + &rule_entry->mac.mac_mid, + &rule_entry->mac.mac_lsb, mac); + } + + /* Set the ramrod data header */ + /* TODO: take this to the higher level in order to prevent multiple + writing */ + bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header, + rule_cnt); +} + +/** + * bnx2x_vlan_mac_set_rdata_hdr_e1x - set a header in a single classify ramrod + * + * @bp: device handle + * @o: queue + * @type: + * @cam_offset: offset in cam memory + * @hdr: pointer to a header to setup + * + * E1/E1H + */ +static inline void bnx2x_vlan_mac_set_rdata_hdr_e1x(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, int type, int cam_offset, + struct mac_configuration_hdr *hdr) +{ + struct bnx2x_raw_obj *r = &o->raw; + + hdr->length = 1; + hdr->offset = (u8)cam_offset; + hdr->client_id = 0xff; + hdr->echo = ((r->cid & BNX2X_SWCID_MASK) | (type << BNX2X_SWCID_SHIFT)); +} + +static inline void bnx2x_vlan_mac_set_cfg_entry_e1x(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, bool add, int opcode, u8 *mac, + u16 vlan_id, struct mac_configuration_entry *cfg_entry) +{ + struct bnx2x_raw_obj *r = &o->raw; + u32 cl_bit_vec = (1 << r->cl_id); + + cfg_entry->clients_bit_vector = cpu_to_le32(cl_bit_vec); + cfg_entry->pf_id = r->func_id; + cfg_entry->vlan_id = cpu_to_le16(vlan_id); + + if (add) { + SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE, + T_ETH_MAC_COMMAND_SET); + SET_FLAG(cfg_entry->flags, + MAC_CONFIGURATION_ENTRY_VLAN_FILTERING_MODE, opcode); + + /* Set a MAC in a ramrod data */ + bnx2x_set_fw_mac_addr(&cfg_entry->msb_mac_addr, + &cfg_entry->middle_mac_addr, + &cfg_entry->lsb_mac_addr, mac); + } else + SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE, + T_ETH_MAC_COMMAND_INVALIDATE); +} + +static inline void bnx2x_vlan_mac_set_rdata_e1x(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, int type, int cam_offset, bool add, + u8 *mac, u16 vlan_id, int opcode, struct mac_configuration_cmd *config) +{ + struct mac_configuration_entry *cfg_entry = &config->config_table[0]; + struct bnx2x_raw_obj *raw = &o->raw; + + bnx2x_vlan_mac_set_rdata_hdr_e1x(bp, o, type, cam_offset, + &config->hdr); + bnx2x_vlan_mac_set_cfg_entry_e1x(bp, o, add, opcode, mac, vlan_id, + cfg_entry); + + DP(BNX2X_MSG_SP, "%s MAC "BNX2X_MAC_FMT" CLID %d CAM offset %d\n", + (add ? "setting" : "clearing"), + BNX2X_MAC_PRN_LIST(mac), raw->cl_id, cam_offset); +} + +/** + * bnx2x_set_one_mac_e1x - fill a single MAC rule ramrod data + * + * @bp: device handle + * @o: bnx2x_vlan_mac_obj + * @elem: bnx2x_exeq_elem + * @rule_idx: rule_idx + * @cam_offset: cam_offset + */ +static void bnx2x_set_one_mac_e1x(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + struct bnx2x_exeq_elem *elem, int rule_idx, + int cam_offset) +{ + struct bnx2x_raw_obj *raw = &o->raw; + struct mac_configuration_cmd *config = + (struct mac_configuration_cmd *)(raw->rdata); + /* + * 57710 and 57711 do not support MOVE command, + * so it's either ADD or DEL + */ + bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ? + true : false; + + /* Reset the ramrod data buffer */ + memset(config, 0, sizeof(*config)); + + bnx2x_vlan_mac_set_rdata_e1x(bp, o, raw->state, + cam_offset, add, + elem->cmd_data.vlan_mac.u.mac.mac, 0, + ETH_VLAN_FILTER_ANY_VLAN, config); +} + +static void bnx2x_set_one_vlan_e2(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + struct bnx2x_exeq_elem *elem, int rule_idx, + int cam_offset) +{ + struct bnx2x_raw_obj *raw = &o->raw; + struct eth_classify_rules_ramrod_data *data = + (struct eth_classify_rules_ramrod_data *)(raw->rdata); + int rule_cnt = rule_idx + 1; + union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; + int cmd = elem->cmd_data.vlan_mac.cmd; + bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false; + u16 vlan = elem->cmd_data.vlan_mac.u.vlan.vlan; + + /* Reset the ramrod data buffer for the first rule */ + if (rule_idx == 0) + memset(data, 0, sizeof(*data)); + + /* Set a rule header */ + bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_VLAN, + &rule_entry->vlan.header); + + DP(BNX2X_MSG_SP, "About to %s VLAN %d\n", (add ? "add" : "delete"), + vlan); + + /* Set a VLAN itself */ + rule_entry->vlan.vlan = cpu_to_le16(vlan); + + /* MOVE: Add a rule that will add this MAC to the target Queue */ + if (cmd == BNX2X_VLAN_MAC_MOVE) { + rule_entry++; + rule_cnt++; + + /* Setup ramrod data */ + bnx2x_vlan_mac_set_cmd_hdr_e2(bp, + elem->cmd_data.vlan_mac.target_obj, + true, CLASSIFY_RULE_OPCODE_VLAN, + &rule_entry->vlan.header); + + /* Set a VLAN itself */ + rule_entry->vlan.vlan = cpu_to_le16(vlan); + } + + /* Set the ramrod data header */ + /* TODO: take this to the higher level in order to prevent multiple + writing */ + bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header, + rule_cnt); +} + +static void bnx2x_set_one_vlan_mac_e2(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + struct bnx2x_exeq_elem *elem, + int rule_idx, int cam_offset) +{ + struct bnx2x_raw_obj *raw = &o->raw; + struct eth_classify_rules_ramrod_data *data = + (struct eth_classify_rules_ramrod_data *)(raw->rdata); + int rule_cnt = rule_idx + 1; + union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; + int cmd = elem->cmd_data.vlan_mac.cmd; + bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false; + u16 vlan = elem->cmd_data.vlan_mac.u.vlan_mac.vlan; + u8 *mac = elem->cmd_data.vlan_mac.u.vlan_mac.mac; + + + /* Reset the ramrod data buffer for the first rule */ + if (rule_idx == 0) + memset(data, 0, sizeof(*data)); + + /* Set a rule header */ + bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_PAIR, + &rule_entry->pair.header); + + /* Set VLAN and MAC themselvs */ + rule_entry->pair.vlan = cpu_to_le16(vlan); + bnx2x_set_fw_mac_addr(&rule_entry->pair.mac_msb, + &rule_entry->pair.mac_mid, + &rule_entry->pair.mac_lsb, mac); + + /* MOVE: Add a rule that will add this MAC to the target Queue */ + if (cmd == BNX2X_VLAN_MAC_MOVE) { + rule_entry++; + rule_cnt++; + + /* Setup ramrod data */ + bnx2x_vlan_mac_set_cmd_hdr_e2(bp, + elem->cmd_data.vlan_mac.target_obj, + true, CLASSIFY_RULE_OPCODE_PAIR, + &rule_entry->pair.header); + + /* Set a VLAN itself */ + rule_entry->pair.vlan = cpu_to_le16(vlan); + bnx2x_set_fw_mac_addr(&rule_entry->pair.mac_msb, + &rule_entry->pair.mac_mid, + &rule_entry->pair.mac_lsb, mac); + } + + /* Set the ramrod data header */ + /* TODO: take this to the higher level in order to prevent multiple + writing */ + bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header, + rule_cnt); +} + +/** + * bnx2x_set_one_vlan_mac_e1h - + * + * @bp: device handle + * @o: bnx2x_vlan_mac_obj + * @elem: bnx2x_exeq_elem + * @rule_idx: rule_idx + * @cam_offset: cam_offset + */ +static void bnx2x_set_one_vlan_mac_e1h(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + struct bnx2x_exeq_elem *elem, + int rule_idx, int cam_offset) +{ + struct bnx2x_raw_obj *raw = &o->raw; + struct mac_configuration_cmd *config = + (struct mac_configuration_cmd *)(raw->rdata); + /* + * 57710 and 57711 do not support MOVE command, + * so it's either ADD or DEL + */ + bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ? + true : false; + + /* Reset the ramrod data buffer */ + memset(config, 0, sizeof(*config)); + + bnx2x_vlan_mac_set_rdata_e1x(bp, o, BNX2X_FILTER_VLAN_MAC_PENDING, + cam_offset, add, + elem->cmd_data.vlan_mac.u.vlan_mac.mac, + elem->cmd_data.vlan_mac.u.vlan_mac.vlan, + ETH_VLAN_FILTER_CLASSIFY, config); +} + +#define list_next_entry(pos, member) \ + list_entry((pos)->member.next, typeof(*(pos)), member) + +/** + * bnx2x_vlan_mac_restore - reconfigure next MAC/VLAN/VLAN-MAC element + * + * @bp: device handle + * @p: command parameters + * @ppos: pointer to the cooky + * + * reconfigure next MAC/VLAN/VLAN-MAC element from the + * previously configured elements list. + * + * from command parameters only RAMROD_COMP_WAIT bit in ramrod_flags is taken + * into an account + * + * pointer to the cooky - that should be given back in the next call to make + * function handle the next element. If *ppos is set to NULL it will restart the + * iterator. If returned *ppos == NULL this means that the last element has been + * handled. + * + */ +static int bnx2x_vlan_mac_restore(struct bnx2x *bp, + struct bnx2x_vlan_mac_ramrod_params *p, + struct bnx2x_vlan_mac_registry_elem **ppos) +{ + struct bnx2x_vlan_mac_registry_elem *pos; + struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; + + /* If list is empty - there is nothing to do here */ + if (list_empty(&o->head)) { + *ppos = NULL; + return 0; + } + + /* make a step... */ + if (*ppos == NULL) + *ppos = list_first_entry(&o->head, + struct bnx2x_vlan_mac_registry_elem, + link); + else + *ppos = list_next_entry(*ppos, link); + + pos = *ppos; + + /* If it's the last step - return NULL */ + if (list_is_last(&pos->link, &o->head)) + *ppos = NULL; + + /* Prepare a 'user_req' */ + memcpy(&p->user_req.u, &pos->u, sizeof(pos->u)); + + /* Set the command */ + p->user_req.cmd = BNX2X_VLAN_MAC_ADD; + + /* Set vlan_mac_flags */ + p->user_req.vlan_mac_flags = pos->vlan_mac_flags; + + /* Set a restore bit */ + __set_bit(RAMROD_RESTORE, &p->ramrod_flags); + + return bnx2x_config_vlan_mac(bp, p); +} + +/* + * bnx2x_exeq_get_mac/bnx2x_exeq_get_vlan/bnx2x_exeq_get_vlan_mac return a + * pointer to an element with a specific criteria and NULL if such an element + * hasn't been found. + */ +static struct bnx2x_exeq_elem *bnx2x_exeq_get_mac( + struct bnx2x_exe_queue_obj *o, + struct bnx2x_exeq_elem *elem) +{ + struct bnx2x_exeq_elem *pos; + struct bnx2x_mac_ramrod_data *data = &elem->cmd_data.vlan_mac.u.mac; + + /* Check pending for execution commands */ + list_for_each_entry(pos, &o->exe_queue, link) + if (!memcmp(&pos->cmd_data.vlan_mac.u.mac, data, + sizeof(*data)) && + (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd)) + return pos; + + return NULL; +} + +static struct bnx2x_exeq_elem *bnx2x_exeq_get_vlan( + struct bnx2x_exe_queue_obj *o, + struct bnx2x_exeq_elem *elem) +{ + struct bnx2x_exeq_elem *pos; + struct bnx2x_vlan_ramrod_data *data = &elem->cmd_data.vlan_mac.u.vlan; + + /* Check pending for execution commands */ + list_for_each_entry(pos, &o->exe_queue, link) + if (!memcmp(&pos->cmd_data.vlan_mac.u.vlan, data, + sizeof(*data)) && + (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd)) + return pos; + + return NULL; +} + +static struct bnx2x_exeq_elem *bnx2x_exeq_get_vlan_mac( + struct bnx2x_exe_queue_obj *o, + struct bnx2x_exeq_elem *elem) +{ + struct bnx2x_exeq_elem *pos; + struct bnx2x_vlan_mac_ramrod_data *data = + &elem->cmd_data.vlan_mac.u.vlan_mac; + + /* Check pending for execution commands */ + list_for_each_entry(pos, &o->exe_queue, link) + if (!memcmp(&pos->cmd_data.vlan_mac.u.vlan_mac, data, + sizeof(*data)) && + (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd)) + return pos; + + return NULL; +} + +/** + * bnx2x_validate_vlan_mac_add - check if an ADD command can be executed + * + * @bp: device handle + * @qo: bnx2x_qable_obj + * @elem: bnx2x_exeq_elem + * + * Checks that the requested configuration can be added. If yes and if + * requested, consume CAM credit. + * + * The 'validate' is run after the 'optimize'. + * + */ +static inline int bnx2x_validate_vlan_mac_add(struct bnx2x *bp, + union bnx2x_qable_obj *qo, + struct bnx2x_exeq_elem *elem) +{ + struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac; + struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; + int rc; + + /* Check the registry */ + rc = o->check_add(bp, o, &elem->cmd_data.vlan_mac.u); + if (rc) { + DP(BNX2X_MSG_SP, "ADD command is not allowed considering current registry state.\n"); + return rc; + } + + /* + * Check if there is a pending ADD command for this + * MAC/VLAN/VLAN-MAC. Return an error if there is. + */ + if (exeq->get(exeq, elem)) { + DP(BNX2X_MSG_SP, "There is a pending ADD command already\n"); + return -EEXIST; + } + + /* + * TODO: Check the pending MOVE from other objects where this + * object is a destination object. + */ + + /* Consume the credit if not requested not to */ + if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, + &elem->cmd_data.vlan_mac.vlan_mac_flags) || + o->get_credit(o))) + return -EINVAL; + + return 0; +} + +/** + * bnx2x_validate_vlan_mac_del - check if the DEL command can be executed + * + * @bp: device handle + * @qo: quable object to check + * @elem: element that needs to be deleted + * + * Checks that the requested configuration can be deleted. If yes and if + * requested, returns a CAM credit. + * + * The 'validate' is run after the 'optimize'. + */ +static inline int bnx2x_validate_vlan_mac_del(struct bnx2x *bp, + union bnx2x_qable_obj *qo, + struct bnx2x_exeq_elem *elem) +{ + struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac; + struct bnx2x_vlan_mac_registry_elem *pos; + struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; + struct bnx2x_exeq_elem query_elem; + + /* If this classification can not be deleted (doesn't exist) + * - return a BNX2X_EXIST. + */ + pos = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u); + if (!pos) { + DP(BNX2X_MSG_SP, "DEL command is not allowed considering current registry state\n"); + return -EEXIST; + } + + /* + * Check if there are pending DEL or MOVE commands for this + * MAC/VLAN/VLAN-MAC. Return an error if so. + */ + memcpy(&query_elem, elem, sizeof(query_elem)); + + /* Check for MOVE commands */ + query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_MOVE; + if (exeq->get(exeq, &query_elem)) { + BNX2X_ERR("There is a pending MOVE command already\n"); + return -EINVAL; + } + + /* Check for DEL commands */ + if (exeq->get(exeq, elem)) { + DP(BNX2X_MSG_SP, "There is a pending DEL command already\n"); + return -EEXIST; + } + + /* Return the credit to the credit pool if not requested not to */ + if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, + &elem->cmd_data.vlan_mac.vlan_mac_flags) || + o->put_credit(o))) { + BNX2X_ERR("Failed to return a credit\n"); + return -EINVAL; + } + + return 0; +} + +/** + * bnx2x_validate_vlan_mac_move - check if the MOVE command can be executed + * + * @bp: device handle + * @qo: quable object to check (source) + * @elem: element that needs to be moved + * + * Checks that the requested configuration can be moved. If yes and if + * requested, returns a CAM credit. + * + * The 'validate' is run after the 'optimize'. + */ +static inline int bnx2x_validate_vlan_mac_move(struct bnx2x *bp, + union bnx2x_qable_obj *qo, + struct bnx2x_exeq_elem *elem) +{ + struct bnx2x_vlan_mac_obj *src_o = &qo->vlan_mac; + struct bnx2x_vlan_mac_obj *dest_o = elem->cmd_data.vlan_mac.target_obj; + struct bnx2x_exeq_elem query_elem; + struct bnx2x_exe_queue_obj *src_exeq = &src_o->exe_queue; + struct bnx2x_exe_queue_obj *dest_exeq = &dest_o->exe_queue; + + /* + * Check if we can perform this operation based on the current registry + * state. + */ + if (!src_o->check_move(bp, src_o, dest_o, + &elem->cmd_data.vlan_mac.u)) { + DP(BNX2X_MSG_SP, "MOVE command is not allowed considering current registry state\n"); + return -EINVAL; + } + + /* + * Check if there is an already pending DEL or MOVE command for the + * source object or ADD command for a destination object. Return an + * error if so. + */ + memcpy(&query_elem, elem, sizeof(query_elem)); + + /* Check DEL on source */ + query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_DEL; + if (src_exeq->get(src_exeq, &query_elem)) { + BNX2X_ERR("There is a pending DEL command on the source queue already\n"); + return -EINVAL; + } + + /* Check MOVE on source */ + if (src_exeq->get(src_exeq, elem)) { + DP(BNX2X_MSG_SP, "There is a pending MOVE command already\n"); + return -EEXIST; + } + + /* Check ADD on destination */ + query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_ADD; + if (dest_exeq->get(dest_exeq, &query_elem)) { + BNX2X_ERR("There is a pending ADD command on the destination queue already\n"); + return -EINVAL; + } + + /* Consume the credit if not requested not to */ + if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT_DEST, + &elem->cmd_data.vlan_mac.vlan_mac_flags) || + dest_o->get_credit(dest_o))) + return -EINVAL; + + if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, + &elem->cmd_data.vlan_mac.vlan_mac_flags) || + src_o->put_credit(src_o))) { + /* return the credit taken from dest... */ + dest_o->put_credit(dest_o); + return -EINVAL; + } + + return 0; +} + +static int bnx2x_validate_vlan_mac(struct bnx2x *bp, + union bnx2x_qable_obj *qo, + struct bnx2x_exeq_elem *elem) +{ + switch (elem->cmd_data.vlan_mac.cmd) { + case BNX2X_VLAN_MAC_ADD: + return bnx2x_validate_vlan_mac_add(bp, qo, elem); + case BNX2X_VLAN_MAC_DEL: + return bnx2x_validate_vlan_mac_del(bp, qo, elem); + case BNX2X_VLAN_MAC_MOVE: + return bnx2x_validate_vlan_mac_move(bp, qo, elem); + default: + return -EINVAL; + } +} + +static int bnx2x_remove_vlan_mac(struct bnx2x *bp, + union bnx2x_qable_obj *qo, + struct bnx2x_exeq_elem *elem) +{ + int rc = 0; + + /* If consumption wasn't required, nothing to do */ + if (test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, + &elem->cmd_data.vlan_mac.vlan_mac_flags)) + return 0; + + switch (elem->cmd_data.vlan_mac.cmd) { + case BNX2X_VLAN_MAC_ADD: + case BNX2X_VLAN_MAC_MOVE: + rc = qo->vlan_mac.put_credit(&qo->vlan_mac); + break; + case BNX2X_VLAN_MAC_DEL: + rc = qo->vlan_mac.get_credit(&qo->vlan_mac); + break; + default: + return -EINVAL; + } + + if (rc != true) + return -EINVAL; + + return 0; +} + +/** + * bnx2x_wait_vlan_mac - passivly wait for 5 seconds until all work completes. + * + * @bp: device handle + * @o: bnx2x_vlan_mac_obj + * + */ +static int bnx2x_wait_vlan_mac(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o) +{ + int cnt = 5000, rc; + struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; + struct bnx2x_raw_obj *raw = &o->raw; + + while (cnt--) { + /* Wait for the current command to complete */ + rc = raw->wait_comp(bp, raw); + if (rc) + return rc; + + /* Wait until there are no pending commands */ + if (!bnx2x_exe_queue_empty(exeq)) + usleep_range(1000, 1000); + else + return 0; + } + + return -EBUSY; +} + +/** + * bnx2x_complete_vlan_mac - complete one VLAN-MAC ramrod + * + * @bp: device handle + * @o: bnx2x_vlan_mac_obj + * @cqe: + * @cont: if true schedule next execution chunk + * + */ +static int bnx2x_complete_vlan_mac(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union event_ring_elem *cqe, + unsigned long *ramrod_flags) +{ + struct bnx2x_raw_obj *r = &o->raw; + int rc; + + /* Reset pending list */ + bnx2x_exe_queue_reset_pending(bp, &o->exe_queue); + + /* Clear pending */ + r->clear_pending(r); + + /* If ramrod failed this is most likely a SW bug */ + if (cqe->message.error) + return -EINVAL; + + /* Run the next bulk of pending commands if requeted */ + if (test_bit(RAMROD_CONT, ramrod_flags)) { + rc = bnx2x_exe_queue_step(bp, &o->exe_queue, ramrod_flags); + if (rc < 0) + return rc; + } + + /* If there is more work to do return PENDING */ + if (!bnx2x_exe_queue_empty(&o->exe_queue)) + return 1; + + return 0; +} + +/** + * bnx2x_optimize_vlan_mac - optimize ADD and DEL commands. + * + * @bp: device handle + * @o: bnx2x_qable_obj + * @elem: bnx2x_exeq_elem + */ +static int bnx2x_optimize_vlan_mac(struct bnx2x *bp, + union bnx2x_qable_obj *qo, + struct bnx2x_exeq_elem *elem) +{ + struct bnx2x_exeq_elem query, *pos; + struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac; + struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; + + memcpy(&query, elem, sizeof(query)); + + switch (elem->cmd_data.vlan_mac.cmd) { + case BNX2X_VLAN_MAC_ADD: + query.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_DEL; + break; + case BNX2X_VLAN_MAC_DEL: + query.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_ADD; + break; + default: + /* Don't handle anything other than ADD or DEL */ + return 0; + } + + /* If we found the appropriate element - delete it */ + pos = exeq->get(exeq, &query); + if (pos) { + + /* Return the credit of the optimized command */ + if (!test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, + &pos->cmd_data.vlan_mac.vlan_mac_flags)) { + if ((query.cmd_data.vlan_mac.cmd == + BNX2X_VLAN_MAC_ADD) && !o->put_credit(o)) { + BNX2X_ERR("Failed to return the credit for the optimized ADD command\n"); + return -EINVAL; + } else if (!o->get_credit(o)) { /* VLAN_MAC_DEL */ + BNX2X_ERR("Failed to recover the credit from the optimized DEL command\n"); + return -EINVAL; + } + } + + DP(BNX2X_MSG_SP, "Optimizing %s command\n", + (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ? + "ADD" : "DEL"); + + list_del(&pos->link); + bnx2x_exe_queue_free_elem(bp, pos); + return 1; + } + + return 0; +} + +/** + * bnx2x_vlan_mac_get_registry_elem - prepare a registry element + * + * @bp: device handle + * @o: + * @elem: + * @restore: + * @re: + * + * prepare a registry element according to the current command request. + */ +static inline int bnx2x_vlan_mac_get_registry_elem( + struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + struct bnx2x_exeq_elem *elem, + bool restore, + struct bnx2x_vlan_mac_registry_elem **re) +{ + int cmd = elem->cmd_data.vlan_mac.cmd; + struct bnx2x_vlan_mac_registry_elem *reg_elem; + + /* Allocate a new registry element if needed. */ + if (!restore && + ((cmd == BNX2X_VLAN_MAC_ADD) || (cmd == BNX2X_VLAN_MAC_MOVE))) { + reg_elem = kzalloc(sizeof(*reg_elem), GFP_ATOMIC); + if (!reg_elem) + return -ENOMEM; + + /* Get a new CAM offset */ + if (!o->get_cam_offset(o, ®_elem->cam_offset)) { + /* + * This shell never happen, because we have checked the + * CAM availiability in the 'validate'. + */ + WARN_ON(1); + kfree(reg_elem); + return -EINVAL; + } + + DP(BNX2X_MSG_SP, "Got cam offset %d\n", reg_elem->cam_offset); + + /* Set a VLAN-MAC data */ + memcpy(®_elem->u, &elem->cmd_data.vlan_mac.u, + sizeof(reg_elem->u)); + + /* Copy the flags (needed for DEL and RESTORE flows) */ + reg_elem->vlan_mac_flags = + elem->cmd_data.vlan_mac.vlan_mac_flags; + } else /* DEL, RESTORE */ + reg_elem = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u); + + *re = reg_elem; + return 0; +} + +/** + * bnx2x_execute_vlan_mac - execute vlan mac command + * + * @bp: device handle + * @qo: + * @exe_chunk: + * @ramrod_flags: + * + * go and send a ramrod! + */ +static int bnx2x_execute_vlan_mac(struct bnx2x *bp, + union bnx2x_qable_obj *qo, + struct list_head *exe_chunk, + unsigned long *ramrod_flags) +{ + struct bnx2x_exeq_elem *elem; + struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac, *cam_obj; + struct bnx2x_raw_obj *r = &o->raw; + int rc, idx = 0; + bool restore = test_bit(RAMROD_RESTORE, ramrod_flags); + bool drv_only = test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags); + struct bnx2x_vlan_mac_registry_elem *reg_elem; + int cmd; + + /* + * If DRIVER_ONLY execution is requested, cleanup a registry + * and exit. Otherwise send a ramrod to FW. + */ + if (!drv_only) { + + /* Set pending */ + r->set_pending(r); + + /* Fill tha ramrod data */ + list_for_each_entry(elem, exe_chunk, link) { + cmd = elem->cmd_data.vlan_mac.cmd; + /* + * We will add to the target object in MOVE command, so + * change the object for a CAM search. + */ + if (cmd == BNX2X_VLAN_MAC_MOVE) + cam_obj = elem->cmd_data.vlan_mac.target_obj; + else + cam_obj = o; + + rc = bnx2x_vlan_mac_get_registry_elem(bp, cam_obj, + elem, restore, + ®_elem); + if (rc) + goto error_exit; + + WARN_ON(!reg_elem); + + /* Push a new entry into the registry */ + if (!restore && + ((cmd == BNX2X_VLAN_MAC_ADD) || + (cmd == BNX2X_VLAN_MAC_MOVE))) + list_add(®_elem->link, &cam_obj->head); + + /* Configure a single command in a ramrod data buffer */ + o->set_one_rule(bp, o, elem, idx, + reg_elem->cam_offset); + + /* MOVE command consumes 2 entries in the ramrod data */ + if (cmd == BNX2X_VLAN_MAC_MOVE) + idx += 2; + else + idx++; + } + + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + rc = bnx2x_sp_post(bp, o->ramrod_cmd, r->cid, + U64_HI(r->rdata_mapping), + U64_LO(r->rdata_mapping), + ETH_CONNECTION_TYPE); + if (rc) + goto error_exit; + } + + /* Now, when we are done with the ramrod - clean up the registry */ + list_for_each_entry(elem, exe_chunk, link) { + cmd = elem->cmd_data.vlan_mac.cmd; + if ((cmd == BNX2X_VLAN_MAC_DEL) || + (cmd == BNX2X_VLAN_MAC_MOVE)) { + reg_elem = o->check_del(bp, o, + &elem->cmd_data.vlan_mac.u); + + WARN_ON(!reg_elem); + + o->put_cam_offset(o, reg_elem->cam_offset); + list_del(®_elem->link); + kfree(reg_elem); + } + } + + if (!drv_only) + return 1; + else + return 0; + +error_exit: + r->clear_pending(r); + + /* Cleanup a registry in case of a failure */ + list_for_each_entry(elem, exe_chunk, link) { + cmd = elem->cmd_data.vlan_mac.cmd; + + if (cmd == BNX2X_VLAN_MAC_MOVE) + cam_obj = elem->cmd_data.vlan_mac.target_obj; + else + cam_obj = o; + + /* Delete all newly added above entries */ + if (!restore && + ((cmd == BNX2X_VLAN_MAC_ADD) || + (cmd == BNX2X_VLAN_MAC_MOVE))) { + reg_elem = o->check_del(bp, cam_obj, + &elem->cmd_data.vlan_mac.u); + if (reg_elem) { + list_del(®_elem->link); + kfree(reg_elem); + } + } + } + + return rc; +} + +static inline int bnx2x_vlan_mac_push_new_cmd( + struct bnx2x *bp, + struct bnx2x_vlan_mac_ramrod_params *p) +{ + struct bnx2x_exeq_elem *elem; + struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; + bool restore = test_bit(RAMROD_RESTORE, &p->ramrod_flags); + + /* Allocate the execution queue element */ + elem = bnx2x_exe_queue_alloc_elem(bp); + if (!elem) + return -ENOMEM; + + /* Set the command 'length' */ + switch (p->user_req.cmd) { + case BNX2X_VLAN_MAC_MOVE: + elem->cmd_len = 2; + break; + default: + elem->cmd_len = 1; + } + + /* Fill the object specific info */ + memcpy(&elem->cmd_data.vlan_mac, &p->user_req, sizeof(p->user_req)); + + /* Try to add a new command to the pending list */ + return bnx2x_exe_queue_add(bp, &o->exe_queue, elem, restore); +} + +/** + * bnx2x_config_vlan_mac - configure VLAN/MAC/VLAN_MAC filtering rules. + * + * @bp: device handle + * @p: + * + */ +int bnx2x_config_vlan_mac( + struct bnx2x *bp, + struct bnx2x_vlan_mac_ramrod_params *p) +{ + int rc = 0; + struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; + unsigned long *ramrod_flags = &p->ramrod_flags; + bool cont = test_bit(RAMROD_CONT, ramrod_flags); + struct bnx2x_raw_obj *raw = &o->raw; + + /* + * Add new elements to the execution list for commands that require it. + */ + if (!cont) { + rc = bnx2x_vlan_mac_push_new_cmd(bp, p); + if (rc) + return rc; + } + + /* + * If nothing will be executed further in this iteration we want to + * return PENDING if there are pending commands + */ + if (!bnx2x_exe_queue_empty(&o->exe_queue)) + rc = 1; + + if (test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags)) { + DP(BNX2X_MSG_SP, "RAMROD_DRV_CLR_ONLY requested: clearing a pending bit.\n"); + raw->clear_pending(raw); + } + + /* Execute commands if required */ + if (cont || test_bit(RAMROD_EXEC, ramrod_flags) || + test_bit(RAMROD_COMP_WAIT, ramrod_flags)) { + rc = bnx2x_exe_queue_step(bp, &o->exe_queue, ramrod_flags); + if (rc < 0) + return rc; + } + + /* + * RAMROD_COMP_WAIT is a superset of RAMROD_EXEC. If it was set + * then user want to wait until the last command is done. + */ + if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { + /* + * Wait maximum for the current exe_queue length iterations plus + * one (for the current pending command). + */ + int max_iterations = bnx2x_exe_queue_length(&o->exe_queue) + 1; + + while (!bnx2x_exe_queue_empty(&o->exe_queue) && + max_iterations--) { + + /* Wait for the current command to complete */ + rc = raw->wait_comp(bp, raw); + if (rc) + return rc; + + /* Make a next step */ + rc = bnx2x_exe_queue_step(bp, &o->exe_queue, + ramrod_flags); + if (rc < 0) + return rc; + } + + return 0; + } + + return rc; +} + + + +/** + * bnx2x_vlan_mac_del_all - delete elements with given vlan_mac_flags spec + * + * @bp: device handle + * @o: + * @vlan_mac_flags: + * @ramrod_flags: execution flags to be used for this deletion + * + * if the last operation has completed successfully and there are no + * moreelements left, positive value if the last operation has completed + * successfully and there are more previously configured elements, negative + * value is current operation has failed. + */ +static int bnx2x_vlan_mac_del_all(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + unsigned long *vlan_mac_flags, + unsigned long *ramrod_flags) +{ + struct bnx2x_vlan_mac_registry_elem *pos = NULL; + int rc = 0; + struct bnx2x_vlan_mac_ramrod_params p; + struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; + struct bnx2x_exeq_elem *exeq_pos, *exeq_pos_n; + + /* Clear pending commands first */ + + spin_lock_bh(&exeq->lock); + + list_for_each_entry_safe(exeq_pos, exeq_pos_n, &exeq->exe_queue, link) { + if (exeq_pos->cmd_data.vlan_mac.vlan_mac_flags == + *vlan_mac_flags) { + rc = exeq->remove(bp, exeq->owner, exeq_pos); + if (rc) { + BNX2X_ERR("Failed to remove command\n"); + spin_unlock_bh(&exeq->lock); + return rc; + } + list_del(&exeq_pos->link); + bnx2x_exe_queue_free_elem(bp, exeq_pos); + } + } + + spin_unlock_bh(&exeq->lock); + + /* Prepare a command request */ + memset(&p, 0, sizeof(p)); + p.vlan_mac_obj = o; + p.ramrod_flags = *ramrod_flags; + p.user_req.cmd = BNX2X_VLAN_MAC_DEL; + + /* + * Add all but the last VLAN-MAC to the execution queue without actually + * execution anything. + */ + __clear_bit(RAMROD_COMP_WAIT, &p.ramrod_flags); + __clear_bit(RAMROD_EXEC, &p.ramrod_flags); + __clear_bit(RAMROD_CONT, &p.ramrod_flags); + + list_for_each_entry(pos, &o->head, link) { + if (pos->vlan_mac_flags == *vlan_mac_flags) { + p.user_req.vlan_mac_flags = pos->vlan_mac_flags; + memcpy(&p.user_req.u, &pos->u, sizeof(pos->u)); + rc = bnx2x_config_vlan_mac(bp, &p); + if (rc < 0) { + BNX2X_ERR("Failed to add a new DEL command\n"); + return rc; + } + } + } + + p.ramrod_flags = *ramrod_flags; + __set_bit(RAMROD_CONT, &p.ramrod_flags); + + return bnx2x_config_vlan_mac(bp, &p); +} + +static inline void bnx2x_init_raw_obj(struct bnx2x_raw_obj *raw, u8 cl_id, + u32 cid, u8 func_id, void *rdata, dma_addr_t rdata_mapping, int state, + unsigned long *pstate, bnx2x_obj_type type) +{ + raw->func_id = func_id; + raw->cid = cid; + raw->cl_id = cl_id; + raw->rdata = rdata; + raw->rdata_mapping = rdata_mapping; + raw->state = state; + raw->pstate = pstate; + raw->obj_type = type; + raw->check_pending = bnx2x_raw_check_pending; + raw->clear_pending = bnx2x_raw_clear_pending; + raw->set_pending = bnx2x_raw_set_pending; + raw->wait_comp = bnx2x_raw_wait; +} + +static inline void bnx2x_init_vlan_mac_common(struct bnx2x_vlan_mac_obj *o, + u8 cl_id, u32 cid, u8 func_id, void *rdata, dma_addr_t rdata_mapping, + int state, unsigned long *pstate, bnx2x_obj_type type, + struct bnx2x_credit_pool_obj *macs_pool, + struct bnx2x_credit_pool_obj *vlans_pool) +{ + INIT_LIST_HEAD(&o->head); + + o->macs_pool = macs_pool; + o->vlans_pool = vlans_pool; + + o->delete_all = bnx2x_vlan_mac_del_all; + o->restore = bnx2x_vlan_mac_restore; + o->complete = bnx2x_complete_vlan_mac; + o->wait = bnx2x_wait_vlan_mac; + + bnx2x_init_raw_obj(&o->raw, cl_id, cid, func_id, rdata, rdata_mapping, + state, pstate, type); +} + + +void bnx2x_init_mac_obj(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *mac_obj, + u8 cl_id, u32 cid, u8 func_id, void *rdata, + dma_addr_t rdata_mapping, int state, + unsigned long *pstate, bnx2x_obj_type type, + struct bnx2x_credit_pool_obj *macs_pool) +{ + union bnx2x_qable_obj *qable_obj = (union bnx2x_qable_obj *)mac_obj; + + bnx2x_init_vlan_mac_common(mac_obj, cl_id, cid, func_id, rdata, + rdata_mapping, state, pstate, type, + macs_pool, NULL); + + /* CAM credit pool handling */ + mac_obj->get_credit = bnx2x_get_credit_mac; + mac_obj->put_credit = bnx2x_put_credit_mac; + mac_obj->get_cam_offset = bnx2x_get_cam_offset_mac; + mac_obj->put_cam_offset = bnx2x_put_cam_offset_mac; + + if (CHIP_IS_E1x(bp)) { + mac_obj->set_one_rule = bnx2x_set_one_mac_e1x; + mac_obj->check_del = bnx2x_check_mac_del; + mac_obj->check_add = bnx2x_check_mac_add; + mac_obj->check_move = bnx2x_check_move_always_err; + mac_obj->ramrod_cmd = RAMROD_CMD_ID_ETH_SET_MAC; + + /* Exe Queue */ + bnx2x_exe_queue_init(bp, + &mac_obj->exe_queue, 1, qable_obj, + bnx2x_validate_vlan_mac, + bnx2x_remove_vlan_mac, + bnx2x_optimize_vlan_mac, + bnx2x_execute_vlan_mac, + bnx2x_exeq_get_mac); + } else { + mac_obj->set_one_rule = bnx2x_set_one_mac_e2; + mac_obj->check_del = bnx2x_check_mac_del; + mac_obj->check_add = bnx2x_check_mac_add; + mac_obj->check_move = bnx2x_check_move; + mac_obj->ramrod_cmd = + RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES; + mac_obj->get_n_elements = bnx2x_get_n_elements; + + /* Exe Queue */ + bnx2x_exe_queue_init(bp, + &mac_obj->exe_queue, CLASSIFY_RULES_COUNT, + qable_obj, bnx2x_validate_vlan_mac, + bnx2x_remove_vlan_mac, + bnx2x_optimize_vlan_mac, + bnx2x_execute_vlan_mac, + bnx2x_exeq_get_mac); + } +} + +void bnx2x_init_vlan_obj(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *vlan_obj, + u8 cl_id, u32 cid, u8 func_id, void *rdata, + dma_addr_t rdata_mapping, int state, + unsigned long *pstate, bnx2x_obj_type type, + struct bnx2x_credit_pool_obj *vlans_pool) +{ + union bnx2x_qable_obj *qable_obj = (union bnx2x_qable_obj *)vlan_obj; + + bnx2x_init_vlan_mac_common(vlan_obj, cl_id, cid, func_id, rdata, + rdata_mapping, state, pstate, type, NULL, + vlans_pool); + + vlan_obj->get_credit = bnx2x_get_credit_vlan; + vlan_obj->put_credit = bnx2x_put_credit_vlan; + vlan_obj->get_cam_offset = bnx2x_get_cam_offset_vlan; + vlan_obj->put_cam_offset = bnx2x_put_cam_offset_vlan; + + if (CHIP_IS_E1x(bp)) { + BNX2X_ERR("Do not support chips others than E2 and newer\n"); + BUG(); + } else { + vlan_obj->set_one_rule = bnx2x_set_one_vlan_e2; + vlan_obj->check_del = bnx2x_check_vlan_del; + vlan_obj->check_add = bnx2x_check_vlan_add; + vlan_obj->check_move = bnx2x_check_move; + vlan_obj->ramrod_cmd = + RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES; + + /* Exe Queue */ + bnx2x_exe_queue_init(bp, + &vlan_obj->exe_queue, CLASSIFY_RULES_COUNT, + qable_obj, bnx2x_validate_vlan_mac, + bnx2x_remove_vlan_mac, + bnx2x_optimize_vlan_mac, + bnx2x_execute_vlan_mac, + bnx2x_exeq_get_vlan); + } +} + +void bnx2x_init_vlan_mac_obj(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *vlan_mac_obj, + u8 cl_id, u32 cid, u8 func_id, void *rdata, + dma_addr_t rdata_mapping, int state, + unsigned long *pstate, bnx2x_obj_type type, + struct bnx2x_credit_pool_obj *macs_pool, + struct bnx2x_credit_pool_obj *vlans_pool) +{ + union bnx2x_qable_obj *qable_obj = + (union bnx2x_qable_obj *)vlan_mac_obj; + + bnx2x_init_vlan_mac_common(vlan_mac_obj, cl_id, cid, func_id, rdata, + rdata_mapping, state, pstate, type, + macs_pool, vlans_pool); + + /* CAM pool handling */ + vlan_mac_obj->get_credit = bnx2x_get_credit_vlan_mac; + vlan_mac_obj->put_credit = bnx2x_put_credit_vlan_mac; + /* + * CAM offset is relevant for 57710 and 57711 chips only which have a + * single CAM for both MACs and VLAN-MAC pairs. So the offset + * will be taken from MACs' pool object only. + */ + vlan_mac_obj->get_cam_offset = bnx2x_get_cam_offset_mac; + vlan_mac_obj->put_cam_offset = bnx2x_put_cam_offset_mac; + + if (CHIP_IS_E1(bp)) { + BNX2X_ERR("Do not support chips others than E2\n"); + BUG(); + } else if (CHIP_IS_E1H(bp)) { + vlan_mac_obj->set_one_rule = bnx2x_set_one_vlan_mac_e1h; + vlan_mac_obj->check_del = bnx2x_check_vlan_mac_del; + vlan_mac_obj->check_add = bnx2x_check_vlan_mac_add; + vlan_mac_obj->check_move = bnx2x_check_move_always_err; + vlan_mac_obj->ramrod_cmd = RAMROD_CMD_ID_ETH_SET_MAC; + + /* Exe Queue */ + bnx2x_exe_queue_init(bp, + &vlan_mac_obj->exe_queue, 1, qable_obj, + bnx2x_validate_vlan_mac, + bnx2x_remove_vlan_mac, + bnx2x_optimize_vlan_mac, + bnx2x_execute_vlan_mac, + bnx2x_exeq_get_vlan_mac); + } else { + vlan_mac_obj->set_one_rule = bnx2x_set_one_vlan_mac_e2; + vlan_mac_obj->check_del = bnx2x_check_vlan_mac_del; + vlan_mac_obj->check_add = bnx2x_check_vlan_mac_add; + vlan_mac_obj->check_move = bnx2x_check_move; + vlan_mac_obj->ramrod_cmd = + RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES; + + /* Exe Queue */ + bnx2x_exe_queue_init(bp, + &vlan_mac_obj->exe_queue, + CLASSIFY_RULES_COUNT, + qable_obj, bnx2x_validate_vlan_mac, + bnx2x_remove_vlan_mac, + bnx2x_optimize_vlan_mac, + bnx2x_execute_vlan_mac, + bnx2x_exeq_get_vlan_mac); + } + +} + +/* RX_MODE verbs: DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */ +static inline void __storm_memset_mac_filters(struct bnx2x *bp, + struct tstorm_eth_mac_filter_config *mac_filters, + u16 pf_id) +{ + size_t size = sizeof(struct tstorm_eth_mac_filter_config); + + u32 addr = BAR_TSTRORM_INTMEM + + TSTORM_MAC_FILTER_CONFIG_OFFSET(pf_id); + + __storm_memset_struct(bp, addr, size, (u32 *)mac_filters); +} + +static int bnx2x_set_rx_mode_e1x(struct bnx2x *bp, + struct bnx2x_rx_mode_ramrod_params *p) +{ + /* update the bp MAC filter structure */ + u32 mask = (1 << p->cl_id); + + struct tstorm_eth_mac_filter_config *mac_filters = + (struct tstorm_eth_mac_filter_config *)p->rdata; + + /* initial seeting is drop-all */ + u8 drop_all_ucast = 1, drop_all_mcast = 1; + u8 accp_all_ucast = 0, accp_all_bcast = 0, accp_all_mcast = 0; + u8 unmatched_unicast = 0; + + /* In e1x there we only take into account rx acceot flag since tx switching + * isn't enabled. */ + if (test_bit(BNX2X_ACCEPT_UNICAST, &p->rx_accept_flags)) + /* accept matched ucast */ + drop_all_ucast = 0; + + if (test_bit(BNX2X_ACCEPT_MULTICAST, &p->rx_accept_flags)) + /* accept matched mcast */ + drop_all_mcast = 0; + + if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, &p->rx_accept_flags)) { + /* accept all mcast */ + drop_all_ucast = 0; + accp_all_ucast = 1; + } + if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, &p->rx_accept_flags)) { + /* accept all mcast */ + drop_all_mcast = 0; + accp_all_mcast = 1; + } + if (test_bit(BNX2X_ACCEPT_BROADCAST, &p->rx_accept_flags)) + /* accept (all) bcast */ + accp_all_bcast = 1; + if (test_bit(BNX2X_ACCEPT_UNMATCHED, &p->rx_accept_flags)) + /* accept unmatched unicasts */ + unmatched_unicast = 1; + + mac_filters->ucast_drop_all = drop_all_ucast ? + mac_filters->ucast_drop_all | mask : + mac_filters->ucast_drop_all & ~mask; + + mac_filters->mcast_drop_all = drop_all_mcast ? + mac_filters->mcast_drop_all | mask : + mac_filters->mcast_drop_all & ~mask; + + mac_filters->ucast_accept_all = accp_all_ucast ? + mac_filters->ucast_accept_all | mask : + mac_filters->ucast_accept_all & ~mask; + + mac_filters->mcast_accept_all = accp_all_mcast ? + mac_filters->mcast_accept_all | mask : + mac_filters->mcast_accept_all & ~mask; + + mac_filters->bcast_accept_all = accp_all_bcast ? + mac_filters->bcast_accept_all | mask : + mac_filters->bcast_accept_all & ~mask; + + mac_filters->unmatched_unicast = unmatched_unicast ? + mac_filters->unmatched_unicast | mask : + mac_filters->unmatched_unicast & ~mask; + + DP(BNX2X_MSG_SP, "drop_ucast 0x%x\ndrop_mcast 0x%x\n accp_ucast 0x%x\n" + "accp_mcast 0x%x\naccp_bcast 0x%x\n", + mac_filters->ucast_drop_all, mac_filters->mcast_drop_all, + mac_filters->ucast_accept_all, mac_filters->mcast_accept_all, + mac_filters->bcast_accept_all); + + /* write the MAC filter structure*/ + __storm_memset_mac_filters(bp, mac_filters, p->func_id); + + /* The operation is completed */ + clear_bit(p->state, p->pstate); + smp_mb__after_clear_bit(); + + return 0; +} + +/* Setup ramrod data */ +static inline void bnx2x_rx_mode_set_rdata_hdr_e2(u32 cid, + struct eth_classify_header *hdr, + u8 rule_cnt) +{ + hdr->echo = cid; + hdr->rule_cnt = rule_cnt; +} + +static inline void bnx2x_rx_mode_set_cmd_state_e2(struct bnx2x *bp, + unsigned long *accept_flags, + struct eth_filter_rules_cmd *cmd, + bool clear_accept_all) +{ + u16 state; + + /* start with 'drop-all' */ + state = ETH_FILTER_RULES_CMD_UCAST_DROP_ALL | + ETH_FILTER_RULES_CMD_MCAST_DROP_ALL; + + if (test_bit(BNX2X_ACCEPT_UNICAST, accept_flags)) + state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL; + + if (test_bit(BNX2X_ACCEPT_MULTICAST, accept_flags)) + state &= ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL; + + if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, accept_flags)) { + state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL; + state |= ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL; + } + + if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, accept_flags)) { + state |= ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL; + state &= ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL; + } + if (test_bit(BNX2X_ACCEPT_BROADCAST, accept_flags)) + state |= ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL; + + if (test_bit(BNX2X_ACCEPT_UNMATCHED, accept_flags)) { + state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL; + state |= ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED; + } + if (test_bit(BNX2X_ACCEPT_ANY_VLAN, accept_flags)) + state |= ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN; + + /* Clear ACCEPT_ALL_XXX flags for FCoE L2 Queue */ + if (clear_accept_all) { + state &= ~ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL; + state &= ~ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL; + state &= ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL; + state &= ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED; + } + + cmd->state = cpu_to_le16(state); + +} + +static int bnx2x_set_rx_mode_e2(struct bnx2x *bp, + struct bnx2x_rx_mode_ramrod_params *p) +{ + struct eth_filter_rules_ramrod_data *data = p->rdata; + int rc; + u8 rule_idx = 0; + + /* Reset the ramrod data buffer */ + memset(data, 0, sizeof(*data)); + + /* Setup ramrod data */ + + /* Tx (internal switching) */ + if (test_bit(RAMROD_TX, &p->ramrod_flags)) { + data->rules[rule_idx].client_id = p->cl_id; + data->rules[rule_idx].func_id = p->func_id; + + data->rules[rule_idx].cmd_general_data = + ETH_FILTER_RULES_CMD_TX_CMD; + + bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags, + &(data->rules[rule_idx++]), false); + } + + /* Rx */ + if (test_bit(RAMROD_RX, &p->ramrod_flags)) { + data->rules[rule_idx].client_id = p->cl_id; + data->rules[rule_idx].func_id = p->func_id; + + data->rules[rule_idx].cmd_general_data = + ETH_FILTER_RULES_CMD_RX_CMD; + + bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags, + &(data->rules[rule_idx++]), false); + } + + + /* + * If FCoE Queue configuration has been requested configure the Rx and + * internal switching modes for this queue in separate rules. + * + * FCoE queue shell never be set to ACCEPT_ALL packets of any sort: + * MCAST_ALL, UCAST_ALL, BCAST_ALL and UNMATCHED. + */ + if (test_bit(BNX2X_RX_MODE_FCOE_ETH, &p->rx_mode_flags)) { + /* Tx (internal switching) */ + if (test_bit(RAMROD_TX, &p->ramrod_flags)) { + data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id); + data->rules[rule_idx].func_id = p->func_id; + + data->rules[rule_idx].cmd_general_data = + ETH_FILTER_RULES_CMD_TX_CMD; + + bnx2x_rx_mode_set_cmd_state_e2(bp, + &p->tx_accept_flags, + &(data->rules[rule_idx++]), + true); + } + + /* Rx */ + if (test_bit(RAMROD_RX, &p->ramrod_flags)) { + data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id); + data->rules[rule_idx].func_id = p->func_id; + + data->rules[rule_idx].cmd_general_data = + ETH_FILTER_RULES_CMD_RX_CMD; + + bnx2x_rx_mode_set_cmd_state_e2(bp, + &p->rx_accept_flags, + &(data->rules[rule_idx++]), + true); + } + } + + /* + * Set the ramrod header (most importantly - number of rules to + * configure). + */ + bnx2x_rx_mode_set_rdata_hdr_e2(p->cid, &data->header, rule_idx); + + DP(BNX2X_MSG_SP, "About to configure %d rules, rx_accept_flags 0x%lx, tx_accept_flags 0x%lx\n", + data->header.rule_cnt, p->rx_accept_flags, + p->tx_accept_flags); + + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + /* Send a ramrod */ + rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_FILTER_RULES, p->cid, + U64_HI(p->rdata_mapping), + U64_LO(p->rdata_mapping), + ETH_CONNECTION_TYPE); + if (rc) + return rc; + + /* Ramrod completion is pending */ + return 1; +} + +static int bnx2x_wait_rx_mode_comp_e2(struct bnx2x *bp, + struct bnx2x_rx_mode_ramrod_params *p) +{ + return bnx2x_state_wait(bp, p->state, p->pstate); +} + +static int bnx2x_empty_rx_mode_wait(struct bnx2x *bp, + struct bnx2x_rx_mode_ramrod_params *p) +{ + /* Do nothing */ + return 0; +} + +int bnx2x_config_rx_mode(struct bnx2x *bp, + struct bnx2x_rx_mode_ramrod_params *p) +{ + int rc; + + /* Configure the new classification in the chip */ + rc = p->rx_mode_obj->config_rx_mode(bp, p); + if (rc < 0) + return rc; + + /* Wait for a ramrod completion if was requested */ + if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { + rc = p->rx_mode_obj->wait_comp(bp, p); + if (rc) + return rc; + } + + return rc; +} + +void bnx2x_init_rx_mode_obj(struct bnx2x *bp, + struct bnx2x_rx_mode_obj *o) +{ + if (CHIP_IS_E1x(bp)) { + o->wait_comp = bnx2x_empty_rx_mode_wait; + o->config_rx_mode = bnx2x_set_rx_mode_e1x; + } else { + o->wait_comp = bnx2x_wait_rx_mode_comp_e2; + o->config_rx_mode = bnx2x_set_rx_mode_e2; + } +} + +/********************* Multicast verbs: SET, CLEAR ****************************/ +static inline u8 bnx2x_mcast_bin_from_mac(u8 *mac) +{ + return (crc32c_le(0, mac, ETH_ALEN) >> 24) & 0xff; +} + +struct bnx2x_mcast_mac_elem { + struct list_head link; + u8 mac[ETH_ALEN]; + u8 pad[2]; /* For a natural alignment of the following buffer */ +}; + +struct bnx2x_pending_mcast_cmd { + struct list_head link; + int type; /* BNX2X_MCAST_CMD_X */ + union { + struct list_head macs_head; + u32 macs_num; /* Needed for DEL command */ + int next_bin; /* Needed for RESTORE flow with aprox match */ + } data; + + bool done; /* set to true, when the command has been handled, + * practically used in 57712 handling only, where one pending + * command may be handled in a few operations. As long as for + * other chips every operation handling is completed in a + * single ramrod, there is no need to utilize this field. + */ +}; + +static int bnx2x_mcast_wait(struct bnx2x *bp, + struct bnx2x_mcast_obj *o) +{ + if (bnx2x_state_wait(bp, o->sched_state, o->raw.pstate) || + o->raw.wait_comp(bp, &o->raw)) + return -EBUSY; + + return 0; +} + +static int bnx2x_mcast_enqueue_cmd(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, + struct bnx2x_mcast_ramrod_params *p, + int cmd) +{ + int total_sz; + struct bnx2x_pending_mcast_cmd *new_cmd; + struct bnx2x_mcast_mac_elem *cur_mac = NULL; + struct bnx2x_mcast_list_elem *pos; + int macs_list_len = ((cmd == BNX2X_MCAST_CMD_ADD) ? + p->mcast_list_len : 0); + + /* If the command is empty ("handle pending commands only"), break */ + if (!p->mcast_list_len) + return 0; + + total_sz = sizeof(*new_cmd) + + macs_list_len * sizeof(struct bnx2x_mcast_mac_elem); + + /* Add mcast is called under spin_lock, thus calling with GFP_ATOMIC */ + new_cmd = kzalloc(total_sz, GFP_ATOMIC); + + if (!new_cmd) + return -ENOMEM; + + DP(BNX2X_MSG_SP, "About to enqueue a new %d command. macs_list_len=%d\n", + cmd, macs_list_len); + + INIT_LIST_HEAD(&new_cmd->data.macs_head); + + new_cmd->type = cmd; + new_cmd->done = false; + + switch (cmd) { + case BNX2X_MCAST_CMD_ADD: + cur_mac = (struct bnx2x_mcast_mac_elem *) + ((u8 *)new_cmd + sizeof(*new_cmd)); + + /* Push the MACs of the current command into the pendig command + * MACs list: FIFO + */ + list_for_each_entry(pos, &p->mcast_list, link) { + memcpy(cur_mac->mac, pos->mac, ETH_ALEN); + list_add_tail(&cur_mac->link, &new_cmd->data.macs_head); + cur_mac++; + } + + break; + + case BNX2X_MCAST_CMD_DEL: + new_cmd->data.macs_num = p->mcast_list_len; + break; + + case BNX2X_MCAST_CMD_RESTORE: + new_cmd->data.next_bin = 0; + break; + + default: + kfree(new_cmd); + BNX2X_ERR("Unknown command: %d\n", cmd); + return -EINVAL; + } + + /* Push the new pending command to the tail of the pending list: FIFO */ + list_add_tail(&new_cmd->link, &o->pending_cmds_head); + + o->set_sched(o); + + return 1; +} + +/** + * bnx2x_mcast_get_next_bin - get the next set bin (index) + * + * @o: + * @last: index to start looking from (including) + * + * returns the next found (set) bin or a negative value if none is found. + */ +static inline int bnx2x_mcast_get_next_bin(struct bnx2x_mcast_obj *o, int last) +{ + int i, j, inner_start = last % BIT_VEC64_ELEM_SZ; + + for (i = last / BIT_VEC64_ELEM_SZ; i < BNX2X_MCAST_VEC_SZ; i++) { + if (o->registry.aprox_match.vec[i]) + for (j = inner_start; j < BIT_VEC64_ELEM_SZ; j++) { + int cur_bit = j + BIT_VEC64_ELEM_SZ * i; + if (BIT_VEC64_TEST_BIT(o->registry.aprox_match. + vec, cur_bit)) { + return cur_bit; + } + } + inner_start = 0; + } + + /* None found */ + return -1; +} + +/** + * bnx2x_mcast_clear_first_bin - find the first set bin and clear it + * + * @o: + * + * returns the index of the found bin or -1 if none is found + */ +static inline int bnx2x_mcast_clear_first_bin(struct bnx2x_mcast_obj *o) +{ + int cur_bit = bnx2x_mcast_get_next_bin(o, 0); + + if (cur_bit >= 0) + BIT_VEC64_CLEAR_BIT(o->registry.aprox_match.vec, cur_bit); + + return cur_bit; +} + +static inline u8 bnx2x_mcast_get_rx_tx_flag(struct bnx2x_mcast_obj *o) +{ + struct bnx2x_raw_obj *raw = &o->raw; + u8 rx_tx_flag = 0; + + if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) || + (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) + rx_tx_flag |= ETH_MULTICAST_RULES_CMD_TX_CMD; + + if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) || + (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) + rx_tx_flag |= ETH_MULTICAST_RULES_CMD_RX_CMD; + + return rx_tx_flag; +} + +static void bnx2x_mcast_set_one_rule_e2(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, int idx, + union bnx2x_mcast_config_data *cfg_data, + int cmd) +{ + struct bnx2x_raw_obj *r = &o->raw; + struct eth_multicast_rules_ramrod_data *data = + (struct eth_multicast_rules_ramrod_data *)(r->rdata); + u8 func_id = r->func_id; + u8 rx_tx_add_flag = bnx2x_mcast_get_rx_tx_flag(o); + int bin; + + if ((cmd == BNX2X_MCAST_CMD_ADD) || (cmd == BNX2X_MCAST_CMD_RESTORE)) + rx_tx_add_flag |= ETH_MULTICAST_RULES_CMD_IS_ADD; + + data->rules[idx].cmd_general_data |= rx_tx_add_flag; + + /* Get a bin and update a bins' vector */ + switch (cmd) { + case BNX2X_MCAST_CMD_ADD: + bin = bnx2x_mcast_bin_from_mac(cfg_data->mac); + BIT_VEC64_SET_BIT(o->registry.aprox_match.vec, bin); + break; + + case BNX2X_MCAST_CMD_DEL: + /* If there were no more bins to clear + * (bnx2x_mcast_clear_first_bin() returns -1) then we would + * clear any (0xff) bin. + * See bnx2x_mcast_validate_e2() for explanation when it may + * happen. + */ + bin = bnx2x_mcast_clear_first_bin(o); + break; + + case BNX2X_MCAST_CMD_RESTORE: + bin = cfg_data->bin; + break; + + default: + BNX2X_ERR("Unknown command: %d\n", cmd); + return; + } + + DP(BNX2X_MSG_SP, "%s bin %d\n", + ((rx_tx_add_flag & ETH_MULTICAST_RULES_CMD_IS_ADD) ? + "Setting" : "Clearing"), bin); + + data->rules[idx].bin_id = (u8)bin; + data->rules[idx].func_id = func_id; + data->rules[idx].engine_id = o->engine_id; +} + +/** + * bnx2x_mcast_handle_restore_cmd_e2 - restore configuration from the registry + * + * @bp: device handle + * @o: + * @start_bin: index in the registry to start from (including) + * @rdata_idx: index in the ramrod data to start from + * + * returns last handled bin index or -1 if all bins have been handled + */ +static inline int bnx2x_mcast_handle_restore_cmd_e2( + struct bnx2x *bp, struct bnx2x_mcast_obj *o , int start_bin, + int *rdata_idx) +{ + int cur_bin, cnt = *rdata_idx; + union bnx2x_mcast_config_data cfg_data = {NULL}; + + /* go through the registry and configure the bins from it */ + for (cur_bin = bnx2x_mcast_get_next_bin(o, start_bin); cur_bin >= 0; + cur_bin = bnx2x_mcast_get_next_bin(o, cur_bin + 1)) { + + cfg_data.bin = (u8)cur_bin; + o->set_one_rule(bp, o, cnt, &cfg_data, + BNX2X_MCAST_CMD_RESTORE); + + cnt++; + + DP(BNX2X_MSG_SP, "About to configure a bin %d\n", cur_bin); + + /* Break if we reached the maximum number + * of rules. + */ + if (cnt >= o->max_cmd_len) + break; + } + + *rdata_idx = cnt; + + return cur_bin; +} + +static inline void bnx2x_mcast_hdl_pending_add_e2(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos, + int *line_idx) +{ + struct bnx2x_mcast_mac_elem *pmac_pos, *pmac_pos_n; + int cnt = *line_idx; + union bnx2x_mcast_config_data cfg_data = {NULL}; + + list_for_each_entry_safe(pmac_pos, pmac_pos_n, &cmd_pos->data.macs_head, + link) { + + cfg_data.mac = &pmac_pos->mac[0]; + o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type); + + cnt++; + + DP(BNX2X_MSG_SP, "About to configure "BNX2X_MAC_FMT" mcast MAC\n", + BNX2X_MAC_PRN_LIST(pmac_pos->mac)); + + list_del(&pmac_pos->link); + + /* Break if we reached the maximum number + * of rules. + */ + if (cnt >= o->max_cmd_len) + break; + } + + *line_idx = cnt; + + /* if no more MACs to configure - we are done */ + if (list_empty(&cmd_pos->data.macs_head)) + cmd_pos->done = true; +} + +static inline void bnx2x_mcast_hdl_pending_del_e2(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos, + int *line_idx) +{ + int cnt = *line_idx; + + while (cmd_pos->data.macs_num) { + o->set_one_rule(bp, o, cnt, NULL, cmd_pos->type); + + cnt++; + + cmd_pos->data.macs_num--; + + DP(BNX2X_MSG_SP, "Deleting MAC. %d left,cnt is %d\n", + cmd_pos->data.macs_num, cnt); + + /* Break if we reached the maximum + * number of rules. + */ + if (cnt >= o->max_cmd_len) + break; + } + + *line_idx = cnt; + + /* If we cleared all bins - we are done */ + if (!cmd_pos->data.macs_num) + cmd_pos->done = true; +} + +static inline void bnx2x_mcast_hdl_pending_restore_e2(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos, + int *line_idx) +{ + cmd_pos->data.next_bin = o->hdl_restore(bp, o, cmd_pos->data.next_bin, + line_idx); + + if (cmd_pos->data.next_bin < 0) + /* If o->set_restore returned -1 we are done */ + cmd_pos->done = true; + else + /* Start from the next bin next time */ + cmd_pos->data.next_bin++; +} + +static inline int bnx2x_mcast_handle_pending_cmds_e2(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p) +{ + struct bnx2x_pending_mcast_cmd *cmd_pos, *cmd_pos_n; + int cnt = 0; + struct bnx2x_mcast_obj *o = p->mcast_obj; + + list_for_each_entry_safe(cmd_pos, cmd_pos_n, &o->pending_cmds_head, + link) { + switch (cmd_pos->type) { + case BNX2X_MCAST_CMD_ADD: + bnx2x_mcast_hdl_pending_add_e2(bp, o, cmd_pos, &cnt); + break; + + case BNX2X_MCAST_CMD_DEL: + bnx2x_mcast_hdl_pending_del_e2(bp, o, cmd_pos, &cnt); + break; + + case BNX2X_MCAST_CMD_RESTORE: + bnx2x_mcast_hdl_pending_restore_e2(bp, o, cmd_pos, + &cnt); + break; + + default: + BNX2X_ERR("Unknown command: %d\n", cmd_pos->type); + return -EINVAL; + } + + /* If the command has been completed - remove it from the list + * and free the memory + */ + if (cmd_pos->done) { + list_del(&cmd_pos->link); + kfree(cmd_pos); + } + + /* Break if we reached the maximum number of rules */ + if (cnt >= o->max_cmd_len) + break; + } + + return cnt; +} + +static inline void bnx2x_mcast_hdl_add(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p, + int *line_idx) +{ + struct bnx2x_mcast_list_elem *mlist_pos; + union bnx2x_mcast_config_data cfg_data = {NULL}; + int cnt = *line_idx; + + list_for_each_entry(mlist_pos, &p->mcast_list, link) { + cfg_data.mac = mlist_pos->mac; + o->set_one_rule(bp, o, cnt, &cfg_data, BNX2X_MCAST_CMD_ADD); + + cnt++; + + DP(BNX2X_MSG_SP, "About to configure "BNX2X_MAC_FMT" mcast MAC\n", + BNX2X_MAC_PRN_LIST(mlist_pos->mac)); + } + + *line_idx = cnt; +} + +static inline void bnx2x_mcast_hdl_del(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p, + int *line_idx) +{ + int cnt = *line_idx, i; + + for (i = 0; i < p->mcast_list_len; i++) { + o->set_one_rule(bp, o, cnt, NULL, BNX2X_MCAST_CMD_DEL); + + cnt++; + + DP(BNX2X_MSG_SP, "Deleting MAC. %d left\n", + p->mcast_list_len - i - 1); + } + + *line_idx = cnt; +} + +/** + * bnx2x_mcast_handle_current_cmd - + * + * @bp: device handle + * @p: + * @cmd: + * @start_cnt: first line in the ramrod data that may be used + * + * This function is called iff there is enough place for the current command in + * the ramrod data. + * Returns number of lines filled in the ramrod data in total. + */ +static inline int bnx2x_mcast_handle_current_cmd(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, int cmd, + int start_cnt) +{ + struct bnx2x_mcast_obj *o = p->mcast_obj; + int cnt = start_cnt; + + DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len); + + switch (cmd) { + case BNX2X_MCAST_CMD_ADD: + bnx2x_mcast_hdl_add(bp, o, p, &cnt); + break; + + case BNX2X_MCAST_CMD_DEL: + bnx2x_mcast_hdl_del(bp, o, p, &cnt); + break; + + case BNX2X_MCAST_CMD_RESTORE: + o->hdl_restore(bp, o, 0, &cnt); + break; + + default: + BNX2X_ERR("Unknown command: %d\n", cmd); + return -EINVAL; + } + + /* The current command has been handled */ + p->mcast_list_len = 0; + + return cnt; +} + +static int bnx2x_mcast_validate_e2(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int cmd) +{ + struct bnx2x_mcast_obj *o = p->mcast_obj; + int reg_sz = o->get_registry_size(o); + + switch (cmd) { + /* DEL command deletes all currently configured MACs */ + case BNX2X_MCAST_CMD_DEL: + o->set_registry_size(o, 0); + /* Don't break */ + + /* RESTORE command will restore the entire multicast configuration */ + case BNX2X_MCAST_CMD_RESTORE: + /* Here we set the approximate amount of work to do, which in + * fact may be only less as some MACs in postponed ADD + * command(s) scheduled before this command may fall into + * the same bin and the actual number of bins set in the + * registry would be less than we estimated here. See + * bnx2x_mcast_set_one_rule_e2() for further details. + */ + p->mcast_list_len = reg_sz; + break; + + case BNX2X_MCAST_CMD_ADD: + case BNX2X_MCAST_CMD_CONT: + /* Here we assume that all new MACs will fall into new bins. + * However we will correct the real registry size after we + * handle all pending commands. + */ + o->set_registry_size(o, reg_sz + p->mcast_list_len); + break; + + default: + BNX2X_ERR("Unknown command: %d\n", cmd); + return -EINVAL; + + } + + /* Increase the total number of MACs pending to be configured */ + o->total_pending_num += p->mcast_list_len; + + return 0; +} + +static void bnx2x_mcast_revert_e2(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int old_num_bins) +{ + struct bnx2x_mcast_obj *o = p->mcast_obj; + + o->set_registry_size(o, old_num_bins); + o->total_pending_num -= p->mcast_list_len; +} + +/** + * bnx2x_mcast_set_rdata_hdr_e2 - sets a header values + * + * @bp: device handle + * @p: + * @len: number of rules to handle + */ +static inline void bnx2x_mcast_set_rdata_hdr_e2(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + u8 len) +{ + struct bnx2x_raw_obj *r = &p->mcast_obj->raw; + struct eth_multicast_rules_ramrod_data *data = + (struct eth_multicast_rules_ramrod_data *)(r->rdata); + + data->header.echo = ((r->cid & BNX2X_SWCID_MASK) | + (BNX2X_FILTER_MCAST_PENDING << BNX2X_SWCID_SHIFT)); + data->header.rule_cnt = len; +} + +/** + * bnx2x_mcast_refresh_registry_e2 - recalculate the actual number of set bins + * + * @bp: device handle + * @o: + * + * Recalculate the actual number of set bins in the registry using Brian + * Kernighan's algorithm: it's execution complexity is as a number of set bins. + * + * returns 0 for the compliance with bnx2x_mcast_refresh_registry_e1(). + */ +static inline int bnx2x_mcast_refresh_registry_e2(struct bnx2x *bp, + struct bnx2x_mcast_obj *o) +{ + int i, cnt = 0; + u64 elem; + + for (i = 0; i < BNX2X_MCAST_VEC_SZ; i++) { + elem = o->registry.aprox_match.vec[i]; + for (; elem; cnt++) + elem &= elem - 1; + } + + o->set_registry_size(o, cnt); + + return 0; +} + +static int bnx2x_mcast_setup_e2(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int cmd) +{ + struct bnx2x_raw_obj *raw = &p->mcast_obj->raw; + struct bnx2x_mcast_obj *o = p->mcast_obj; + struct eth_multicast_rules_ramrod_data *data = + (struct eth_multicast_rules_ramrod_data *)(raw->rdata); + int cnt = 0, rc; + + /* Reset the ramrod data buffer */ + memset(data, 0, sizeof(*data)); + + cnt = bnx2x_mcast_handle_pending_cmds_e2(bp, p); + + /* If there are no more pending commands - clear SCHEDULED state */ + if (list_empty(&o->pending_cmds_head)) + o->clear_sched(o); + + /* The below may be true iff there was enough room in ramrod + * data for all pending commands and for the current + * command. Otherwise the current command would have been added + * to the pending commands and p->mcast_list_len would have been + * zeroed. + */ + if (p->mcast_list_len > 0) + cnt = bnx2x_mcast_handle_current_cmd(bp, p, cmd, cnt); + + /* We've pulled out some MACs - update the total number of + * outstanding. + */ + o->total_pending_num -= cnt; + + /* send a ramrod */ + WARN_ON(o->total_pending_num < 0); + WARN_ON(cnt > o->max_cmd_len); + + bnx2x_mcast_set_rdata_hdr_e2(bp, p, (u8)cnt); + + /* Update a registry size if there are no more pending operations. + * + * We don't want to change the value of the registry size if there are + * pending operations because we want it to always be equal to the + * exact or the approximate number (see bnx2x_mcast_validate_e2()) of + * set bins after the last requested operation in order to properly + * evaluate the size of the next DEL/RESTORE operation. + * + * Note that we update the registry itself during command(s) handling + * - see bnx2x_mcast_set_one_rule_e2(). That's because for 57712 we + * aggregate multiple commands (ADD/DEL/RESTORE) into one ramrod but + * with a limited amount of update commands (per MAC/bin) and we don't + * know in this scope what the actual state of bins configuration is + * going to be after this ramrod. + */ + if (!o->total_pending_num) + bnx2x_mcast_refresh_registry_e2(bp, o); + + /* + * If CLEAR_ONLY was requested - don't send a ramrod and clear + * RAMROD_PENDING status immediately. + */ + if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { + raw->clear_pending(raw); + return 0; + } else { + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + /* Send a ramrod */ + rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_MULTICAST_RULES, + raw->cid, U64_HI(raw->rdata_mapping), + U64_LO(raw->rdata_mapping), + ETH_CONNECTION_TYPE); + if (rc) + return rc; + + /* Ramrod completion is pending */ + return 1; + } +} + +static int bnx2x_mcast_validate_e1h(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int cmd) +{ + /* Mark, that there is a work to do */ + if ((cmd == BNX2X_MCAST_CMD_DEL) || (cmd == BNX2X_MCAST_CMD_RESTORE)) + p->mcast_list_len = 1; + + return 0; +} + +static void bnx2x_mcast_revert_e1h(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int old_num_bins) +{ + /* Do nothing */ +} + +#define BNX2X_57711_SET_MC_FILTER(filter, bit) \ +do { \ + (filter)[(bit) >> 5] |= (1 << ((bit) & 0x1f)); \ +} while (0) + +static inline void bnx2x_mcast_hdl_add_e1h(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, + struct bnx2x_mcast_ramrod_params *p, + u32 *mc_filter) +{ + struct bnx2x_mcast_list_elem *mlist_pos; + int bit; + + list_for_each_entry(mlist_pos, &p->mcast_list, link) { + bit = bnx2x_mcast_bin_from_mac(mlist_pos->mac); + BNX2X_57711_SET_MC_FILTER(mc_filter, bit); + + DP(BNX2X_MSG_SP, "About to configure "BNX2X_MAC_FMT" mcast MAC, bin %d\n", + BNX2X_MAC_PRN_LIST(mlist_pos->mac), bit); + + /* bookkeeping... */ + BIT_VEC64_SET_BIT(o->registry.aprox_match.vec, + bit); + } +} + +static inline void bnx2x_mcast_hdl_restore_e1h(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p, + u32 *mc_filter) +{ + int bit; + + for (bit = bnx2x_mcast_get_next_bin(o, 0); + bit >= 0; + bit = bnx2x_mcast_get_next_bin(o, bit + 1)) { + BNX2X_57711_SET_MC_FILTER(mc_filter, bit); + DP(BNX2X_MSG_SP, "About to set bin %d\n", bit); + } +} + +/* On 57711 we write the multicast MACs' aproximate match + * table by directly into the TSTORM's internal RAM. So we don't + * really need to handle any tricks to make it work. + */ +static int bnx2x_mcast_setup_e1h(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int cmd) +{ + int i; + struct bnx2x_mcast_obj *o = p->mcast_obj; + struct bnx2x_raw_obj *r = &o->raw; + + /* If CLEAR_ONLY has been requested - clear the registry + * and clear a pending bit. + */ + if (!test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { + u32 mc_filter[MC_HASH_SIZE] = {0}; + + /* Set the multicast filter bits before writing it into + * the internal memory. + */ + switch (cmd) { + case BNX2X_MCAST_CMD_ADD: + bnx2x_mcast_hdl_add_e1h(bp, o, p, mc_filter); + break; + + case BNX2X_MCAST_CMD_DEL: + DP(BNX2X_MSG_SP, + "Invalidating multicast MACs configuration\n"); + + /* clear the registry */ + memset(o->registry.aprox_match.vec, 0, + sizeof(o->registry.aprox_match.vec)); + break; + + case BNX2X_MCAST_CMD_RESTORE: + bnx2x_mcast_hdl_restore_e1h(bp, o, p, mc_filter); + break; + + default: + BNX2X_ERR("Unknown command: %d\n", cmd); + return -EINVAL; + } + + /* Set the mcast filter in the internal memory */ + for (i = 0; i < MC_HASH_SIZE; i++) + REG_WR(bp, MC_HASH_OFFSET(bp, i), mc_filter[i]); + } else + /* clear the registry */ + memset(o->registry.aprox_match.vec, 0, + sizeof(o->registry.aprox_match.vec)); + + /* We are done */ + r->clear_pending(r); + + return 0; +} + +static int bnx2x_mcast_validate_e1(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int cmd) +{ + struct bnx2x_mcast_obj *o = p->mcast_obj; + int reg_sz = o->get_registry_size(o); + + switch (cmd) { + /* DEL command deletes all currently configured MACs */ + case BNX2X_MCAST_CMD_DEL: + o->set_registry_size(o, 0); + /* Don't break */ + + /* RESTORE command will restore the entire multicast configuration */ + case BNX2X_MCAST_CMD_RESTORE: + p->mcast_list_len = reg_sz; + DP(BNX2X_MSG_SP, "Command %d, p->mcast_list_len=%d\n", + cmd, p->mcast_list_len); + break; + + case BNX2X_MCAST_CMD_ADD: + case BNX2X_MCAST_CMD_CONT: + /* Multicast MACs on 57710 are configured as unicast MACs and + * there is only a limited number of CAM entries for that + * matter. + */ + if (p->mcast_list_len > o->max_cmd_len) { + BNX2X_ERR("Can't configure more than %d multicast MACs on 57710\n", + o->max_cmd_len); + return -EINVAL; + } + /* Every configured MAC should be cleared if DEL command is + * called. Only the last ADD command is relevant as long as + * every ADD commands overrides the previous configuration. + */ + DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len); + if (p->mcast_list_len > 0) + o->set_registry_size(o, p->mcast_list_len); + + break; + + default: + BNX2X_ERR("Unknown command: %d\n", cmd); + return -EINVAL; + + } + + /* We want to ensure that commands are executed one by one for 57710. + * Therefore each none-empty command will consume o->max_cmd_len. + */ + if (p->mcast_list_len) + o->total_pending_num += o->max_cmd_len; + + return 0; +} + +static void bnx2x_mcast_revert_e1(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int old_num_macs) +{ + struct bnx2x_mcast_obj *o = p->mcast_obj; + + o->set_registry_size(o, old_num_macs); + + /* If current command hasn't been handled yet and we are + * here means that it's meant to be dropped and we have to + * update the number of outstandling MACs accordingly. + */ + if (p->mcast_list_len) + o->total_pending_num -= o->max_cmd_len; +} + +static void bnx2x_mcast_set_one_rule_e1(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, int idx, + union bnx2x_mcast_config_data *cfg_data, + int cmd) +{ + struct bnx2x_raw_obj *r = &o->raw; + struct mac_configuration_cmd *data = + (struct mac_configuration_cmd *)(r->rdata); + + /* copy mac */ + if ((cmd == BNX2X_MCAST_CMD_ADD) || (cmd == BNX2X_MCAST_CMD_RESTORE)) { + bnx2x_set_fw_mac_addr(&data->config_table[idx].msb_mac_addr, + &data->config_table[idx].middle_mac_addr, + &data->config_table[idx].lsb_mac_addr, + cfg_data->mac); + + data->config_table[idx].vlan_id = 0; + data->config_table[idx].pf_id = r->func_id; + data->config_table[idx].clients_bit_vector = + cpu_to_le32(1 << r->cl_id); + + SET_FLAG(data->config_table[idx].flags, + MAC_CONFIGURATION_ENTRY_ACTION_TYPE, + T_ETH_MAC_COMMAND_SET); + } +} + +/** + * bnx2x_mcast_set_rdata_hdr_e1 - set header values in mac_configuration_cmd + * + * @bp: device handle + * @p: + * @len: number of rules to handle + */ +static inline void bnx2x_mcast_set_rdata_hdr_e1(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + u8 len) +{ + struct bnx2x_raw_obj *r = &p->mcast_obj->raw; + struct mac_configuration_cmd *data = + (struct mac_configuration_cmd *)(r->rdata); + + u8 offset = (CHIP_REV_IS_SLOW(bp) ? + BNX2X_MAX_EMUL_MULTI*(1 + r->func_id) : + BNX2X_MAX_MULTICAST*(1 + r->func_id)); + + data->hdr.offset = offset; + data->hdr.client_id = 0xff; + data->hdr.echo = ((r->cid & BNX2X_SWCID_MASK) | + (BNX2X_FILTER_MCAST_PENDING << BNX2X_SWCID_SHIFT)); + data->hdr.length = len; +} + +/** + * bnx2x_mcast_handle_restore_cmd_e1 - restore command for 57710 + * + * @bp: device handle + * @o: + * @start_idx: index in the registry to start from + * @rdata_idx: index in the ramrod data to start from + * + * restore command for 57710 is like all other commands - always a stand alone + * command - start_idx and rdata_idx will always be 0. This function will always + * succeed. + * returns -1 to comply with 57712 variant. + */ +static inline int bnx2x_mcast_handle_restore_cmd_e1( + struct bnx2x *bp, struct bnx2x_mcast_obj *o , int start_idx, + int *rdata_idx) +{ + struct bnx2x_mcast_mac_elem *elem; + int i = 0; + union bnx2x_mcast_config_data cfg_data = {NULL}; + + /* go through the registry and configure the MACs from it. */ + list_for_each_entry(elem, &o->registry.exact_match.macs, link) { + cfg_data.mac = &elem->mac[0]; + o->set_one_rule(bp, o, i, &cfg_data, BNX2X_MCAST_CMD_RESTORE); + + i++; + + DP(BNX2X_MSG_SP, "About to configure "BNX2X_MAC_FMT" mcast MAC\n", + BNX2X_MAC_PRN_LIST(cfg_data.mac)); + } + + *rdata_idx = i; + + return -1; +} + + +static inline int bnx2x_mcast_handle_pending_cmds_e1( + struct bnx2x *bp, struct bnx2x_mcast_ramrod_params *p) +{ + struct bnx2x_pending_mcast_cmd *cmd_pos; + struct bnx2x_mcast_mac_elem *pmac_pos; + struct bnx2x_mcast_obj *o = p->mcast_obj; + union bnx2x_mcast_config_data cfg_data = {NULL}; + int cnt = 0; + + + /* If nothing to be done - return */ + if (list_empty(&o->pending_cmds_head)) + return 0; + + /* Handle the first command */ + cmd_pos = list_first_entry(&o->pending_cmds_head, + struct bnx2x_pending_mcast_cmd, link); + + switch (cmd_pos->type) { + case BNX2X_MCAST_CMD_ADD: + list_for_each_entry(pmac_pos, &cmd_pos->data.macs_head, link) { + cfg_data.mac = &pmac_pos->mac[0]; + o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type); + + cnt++; + + DP(BNX2X_MSG_SP, "About to configure "BNX2X_MAC_FMT" mcast MAC\n", + BNX2X_MAC_PRN_LIST(pmac_pos->mac)); + } + break; + + case BNX2X_MCAST_CMD_DEL: + cnt = cmd_pos->data.macs_num; + DP(BNX2X_MSG_SP, "About to delete %d multicast MACs\n", cnt); + break; + + case BNX2X_MCAST_CMD_RESTORE: + o->hdl_restore(bp, o, 0, &cnt); + break; + + default: + BNX2X_ERR("Unknown command: %d\n", cmd_pos->type); + return -EINVAL; + } + + list_del(&cmd_pos->link); + kfree(cmd_pos); + + return cnt; +} + +/** + * bnx2x_get_fw_mac_addr - revert the bnx2x_set_fw_mac_addr(). + * + * @fw_hi: + * @fw_mid: + * @fw_lo: + * @mac: + */ +static inline void bnx2x_get_fw_mac_addr(__le16 *fw_hi, __le16 *fw_mid, + __le16 *fw_lo, u8 *mac) +{ + mac[1] = ((u8 *)fw_hi)[0]; + mac[0] = ((u8 *)fw_hi)[1]; + mac[3] = ((u8 *)fw_mid)[0]; + mac[2] = ((u8 *)fw_mid)[1]; + mac[5] = ((u8 *)fw_lo)[0]; + mac[4] = ((u8 *)fw_lo)[1]; +} + +/** + * bnx2x_mcast_refresh_registry_e1 - + * + * @bp: device handle + * @cnt: + * + * Check the ramrod data first entry flag to see if it's a DELETE or ADD command + * and update the registry correspondingly: if ADD - allocate a memory and add + * the entries to the registry (list), if DELETE - clear the registry and free + * the memory. + */ +static inline int bnx2x_mcast_refresh_registry_e1(struct bnx2x *bp, + struct bnx2x_mcast_obj *o) +{ + struct bnx2x_raw_obj *raw = &o->raw; + struct bnx2x_mcast_mac_elem *elem; + struct mac_configuration_cmd *data = + (struct mac_configuration_cmd *)(raw->rdata); + + /* If first entry contains a SET bit - the command was ADD, + * otherwise - DEL_ALL + */ + if (GET_FLAG(data->config_table[0].flags, + MAC_CONFIGURATION_ENTRY_ACTION_TYPE)) { + int i, len = data->hdr.length; + + /* Break if it was a RESTORE command */ + if (!list_empty(&o->registry.exact_match.macs)) + return 0; + + elem = kcalloc(len, sizeof(*elem), GFP_ATOMIC); + if (!elem) { + BNX2X_ERR("Failed to allocate registry memory\n"); + return -ENOMEM; + } + + for (i = 0; i < len; i++, elem++) { + bnx2x_get_fw_mac_addr( + &data->config_table[i].msb_mac_addr, + &data->config_table[i].middle_mac_addr, + &data->config_table[i].lsb_mac_addr, + elem->mac); + DP(BNX2X_MSG_SP, "Adding registry entry for ["BNX2X_MAC_FMT"]\n", + BNX2X_MAC_PRN_LIST(elem->mac)); + list_add_tail(&elem->link, + &o->registry.exact_match.macs); + } + } else { + elem = list_first_entry(&o->registry.exact_match.macs, + struct bnx2x_mcast_mac_elem, link); + DP(BNX2X_MSG_SP, "Deleting a registry\n"); + kfree(elem); + INIT_LIST_HEAD(&o->registry.exact_match.macs); + } + + return 0; +} + +static int bnx2x_mcast_setup_e1(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int cmd) +{ + struct bnx2x_mcast_obj *o = p->mcast_obj; + struct bnx2x_raw_obj *raw = &o->raw; + struct mac_configuration_cmd *data = + (struct mac_configuration_cmd *)(raw->rdata); + int cnt = 0, i, rc; + + /* Reset the ramrod data buffer */ + memset(data, 0, sizeof(*data)); + + /* First set all entries as invalid */ + for (i = 0; i < o->max_cmd_len ; i++) + SET_FLAG(data->config_table[i].flags, + MAC_CONFIGURATION_ENTRY_ACTION_TYPE, + T_ETH_MAC_COMMAND_INVALIDATE); + + /* Handle pending commands first */ + cnt = bnx2x_mcast_handle_pending_cmds_e1(bp, p); + + /* If there are no more pending commands - clear SCHEDULED state */ + if (list_empty(&o->pending_cmds_head)) + o->clear_sched(o); + + /* The below may be true iff there were no pending commands */ + if (!cnt) + cnt = bnx2x_mcast_handle_current_cmd(bp, p, cmd, 0); + + /* For 57710 every command has o->max_cmd_len length to ensure that + * commands are done one at a time. + */ + o->total_pending_num -= o->max_cmd_len; + + /* send a ramrod */ + + WARN_ON(cnt > o->max_cmd_len); + + /* Set ramrod header (in particular, a number of entries to update) */ + bnx2x_mcast_set_rdata_hdr_e1(bp, p, (u8)cnt); + + /* update a registry: we need the registry contents to be always up + * to date in order to be able to execute a RESTORE opcode. Here + * we use the fact that for 57710 we sent one command at a time + * hence we may take the registry update out of the command handling + * and do it in a simpler way here. + */ + rc = bnx2x_mcast_refresh_registry_e1(bp, o); + if (rc) + return rc; + + /* + * If CLEAR_ONLY was requested - don't send a ramrod and clear + * RAMROD_PENDING status immediately. + */ + if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { + raw->clear_pending(raw); + return 0; + } else { + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + /* Send a ramrod */ + rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, raw->cid, + U64_HI(raw->rdata_mapping), + U64_LO(raw->rdata_mapping), + ETH_CONNECTION_TYPE); + if (rc) + return rc; + + /* Ramrod completion is pending */ + return 1; + } + +} + +static int bnx2x_mcast_get_registry_size_exact(struct bnx2x_mcast_obj *o) +{ + return o->registry.exact_match.num_macs_set; +} + +static int bnx2x_mcast_get_registry_size_aprox(struct bnx2x_mcast_obj *o) +{ + return o->registry.aprox_match.num_bins_set; +} + +static void bnx2x_mcast_set_registry_size_exact(struct bnx2x_mcast_obj *o, + int n) +{ + o->registry.exact_match.num_macs_set = n; +} + +static void bnx2x_mcast_set_registry_size_aprox(struct bnx2x_mcast_obj *o, + int n) +{ + o->registry.aprox_match.num_bins_set = n; +} + +int bnx2x_config_mcast(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int cmd) +{ + struct bnx2x_mcast_obj *o = p->mcast_obj; + struct bnx2x_raw_obj *r = &o->raw; + int rc = 0, old_reg_size; + + /* This is needed to recover number of currently configured mcast macs + * in case of failure. + */ + old_reg_size = o->get_registry_size(o); + + /* Do some calculations and checks */ + rc = o->validate(bp, p, cmd); + if (rc) + return rc; + + /* Return if there is no work to do */ + if ((!p->mcast_list_len) && (!o->check_sched(o))) + return 0; + + DP(BNX2X_MSG_SP, "o->total_pending_num=%d p->mcast_list_len=%d o->max_cmd_len=%d\n", + o->total_pending_num, p->mcast_list_len, o->max_cmd_len); + + /* Enqueue the current command to the pending list if we can't complete + * it in the current iteration + */ + if (r->check_pending(r) || + ((o->max_cmd_len > 0) && (o->total_pending_num > o->max_cmd_len))) { + rc = o->enqueue_cmd(bp, p->mcast_obj, p, cmd); + if (rc < 0) + goto error_exit1; + + /* As long as the current command is in a command list we + * don't need to handle it separately. + */ + p->mcast_list_len = 0; + } + + if (!r->check_pending(r)) { + + /* Set 'pending' state */ + r->set_pending(r); + + /* Configure the new classification in the chip */ + rc = o->config_mcast(bp, p, cmd); + if (rc < 0) + goto error_exit2; + + /* Wait for a ramrod completion if was requested */ + if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) + rc = o->wait_comp(bp, o); + } + + return rc; + +error_exit2: + r->clear_pending(r); + +error_exit1: + o->revert(bp, p, old_reg_size); + + return rc; +} + +static void bnx2x_mcast_clear_sched(struct bnx2x_mcast_obj *o) +{ + smp_mb__before_clear_bit(); + clear_bit(o->sched_state, o->raw.pstate); + smp_mb__after_clear_bit(); +} + +static void bnx2x_mcast_set_sched(struct bnx2x_mcast_obj *o) +{ + smp_mb__before_clear_bit(); + set_bit(o->sched_state, o->raw.pstate); + smp_mb__after_clear_bit(); +} + +static bool bnx2x_mcast_check_sched(struct bnx2x_mcast_obj *o) +{ + return !!test_bit(o->sched_state, o->raw.pstate); +} + +static bool bnx2x_mcast_check_pending(struct bnx2x_mcast_obj *o) +{ + return o->raw.check_pending(&o->raw) || o->check_sched(o); +} + +void bnx2x_init_mcast_obj(struct bnx2x *bp, + struct bnx2x_mcast_obj *mcast_obj, + u8 mcast_cl_id, u32 mcast_cid, u8 func_id, + u8 engine_id, void *rdata, dma_addr_t rdata_mapping, + int state, unsigned long *pstate, bnx2x_obj_type type) +{ + memset(mcast_obj, 0, sizeof(*mcast_obj)); + + bnx2x_init_raw_obj(&mcast_obj->raw, mcast_cl_id, mcast_cid, func_id, + rdata, rdata_mapping, state, pstate, type); + + mcast_obj->engine_id = engine_id; + + INIT_LIST_HEAD(&mcast_obj->pending_cmds_head); + + mcast_obj->sched_state = BNX2X_FILTER_MCAST_SCHED; + mcast_obj->check_sched = bnx2x_mcast_check_sched; + mcast_obj->set_sched = bnx2x_mcast_set_sched; + mcast_obj->clear_sched = bnx2x_mcast_clear_sched; + + if (CHIP_IS_E1(bp)) { + mcast_obj->config_mcast = bnx2x_mcast_setup_e1; + mcast_obj->enqueue_cmd = bnx2x_mcast_enqueue_cmd; + mcast_obj->hdl_restore = + bnx2x_mcast_handle_restore_cmd_e1; + mcast_obj->check_pending = bnx2x_mcast_check_pending; + + if (CHIP_REV_IS_SLOW(bp)) + mcast_obj->max_cmd_len = BNX2X_MAX_EMUL_MULTI; + else + mcast_obj->max_cmd_len = BNX2X_MAX_MULTICAST; + + mcast_obj->wait_comp = bnx2x_mcast_wait; + mcast_obj->set_one_rule = bnx2x_mcast_set_one_rule_e1; + mcast_obj->validate = bnx2x_mcast_validate_e1; + mcast_obj->revert = bnx2x_mcast_revert_e1; + mcast_obj->get_registry_size = + bnx2x_mcast_get_registry_size_exact; + mcast_obj->set_registry_size = + bnx2x_mcast_set_registry_size_exact; + + /* 57710 is the only chip that uses the exact match for mcast + * at the moment. + */ + INIT_LIST_HEAD(&mcast_obj->registry.exact_match.macs); + + } else if (CHIP_IS_E1H(bp)) { + mcast_obj->config_mcast = bnx2x_mcast_setup_e1h; + mcast_obj->enqueue_cmd = NULL; + mcast_obj->hdl_restore = NULL; + mcast_obj->check_pending = bnx2x_mcast_check_pending; + + /* 57711 doesn't send a ramrod, so it has unlimited credit + * for one command. + */ + mcast_obj->max_cmd_len = -1; + mcast_obj->wait_comp = bnx2x_mcast_wait; + mcast_obj->set_one_rule = NULL; + mcast_obj->validate = bnx2x_mcast_validate_e1h; + mcast_obj->revert = bnx2x_mcast_revert_e1h; + mcast_obj->get_registry_size = + bnx2x_mcast_get_registry_size_aprox; + mcast_obj->set_registry_size = + bnx2x_mcast_set_registry_size_aprox; + } else { + mcast_obj->config_mcast = bnx2x_mcast_setup_e2; + mcast_obj->enqueue_cmd = bnx2x_mcast_enqueue_cmd; + mcast_obj->hdl_restore = + bnx2x_mcast_handle_restore_cmd_e2; + mcast_obj->check_pending = bnx2x_mcast_check_pending; + /* TODO: There should be a proper HSI define for this number!!! + */ + mcast_obj->max_cmd_len = 16; + mcast_obj->wait_comp = bnx2x_mcast_wait; + mcast_obj->set_one_rule = bnx2x_mcast_set_one_rule_e2; + mcast_obj->validate = bnx2x_mcast_validate_e2; + mcast_obj->revert = bnx2x_mcast_revert_e2; + mcast_obj->get_registry_size = + bnx2x_mcast_get_registry_size_aprox; + mcast_obj->set_registry_size = + bnx2x_mcast_set_registry_size_aprox; + } +} + +/*************************** Credit handling **********************************/ + +/** + * atomic_add_ifless - add if the result is less than a given value. + * + * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...if (v + a) is less than u. + * + * returns true if (v + a) was less than u, and false otherwise. + * + */ +static inline bool __atomic_add_ifless(atomic_t *v, int a, int u) +{ + int c, old; + + c = atomic_read(v); + for (;;) { + if (unlikely(c + a >= u)) + return false; + + old = atomic_cmpxchg((v), c, c + a); + if (likely(old == c)) + break; + c = old; + } + + return true; +} + +/** + * atomic_dec_ifmoe - dec if the result is more or equal than a given value. + * + * @v: pointer of type atomic_t + * @a: the amount to dec from v... + * @u: ...if (v - a) is more or equal than u. + * + * returns true if (v - a) was more or equal than u, and false + * otherwise. + */ +static inline bool __atomic_dec_ifmoe(atomic_t *v, int a, int u) +{ + int c, old; + + c = atomic_read(v); + for (;;) { + if (unlikely(c - a < u)) + return false; + + old = atomic_cmpxchg((v), c, c - a); + if (likely(old == c)) + break; + c = old; + } + + return true; +} + +static bool bnx2x_credit_pool_get(struct bnx2x_credit_pool_obj *o, int cnt) +{ + bool rc; + + smp_mb(); + rc = __atomic_dec_ifmoe(&o->credit, cnt, 0); + smp_mb(); + + return rc; +} + +static bool bnx2x_credit_pool_put(struct bnx2x_credit_pool_obj *o, int cnt) +{ + bool rc; + + smp_mb(); + + /* Don't let to refill if credit + cnt > pool_sz */ + rc = __atomic_add_ifless(&o->credit, cnt, o->pool_sz + 1); + + smp_mb(); + + return rc; +} + +static int bnx2x_credit_pool_check(struct bnx2x_credit_pool_obj *o) +{ + int cur_credit; + + smp_mb(); + cur_credit = atomic_read(&o->credit); + + return cur_credit; +} + +static bool bnx2x_credit_pool_always_true(struct bnx2x_credit_pool_obj *o, + int cnt) +{ + return true; +} + + +static bool bnx2x_credit_pool_get_entry( + struct bnx2x_credit_pool_obj *o, + int *offset) +{ + int idx, vec, i; + + *offset = -1; + + /* Find "internal cam-offset" then add to base for this object... */ + for (vec = 0; vec < BNX2X_POOL_VEC_SIZE; vec++) { + + /* Skip the current vector if there are no free entries in it */ + if (!o->pool_mirror[vec]) + continue; + + /* If we've got here we are going to find a free entry */ + for (idx = vec * BIT_VEC64_ELEM_SZ, i = 0; + i < BIT_VEC64_ELEM_SZ; idx++, i++) + + if (BIT_VEC64_TEST_BIT(o->pool_mirror, idx)) { + /* Got one!! */ + BIT_VEC64_CLEAR_BIT(o->pool_mirror, idx); + *offset = o->base_pool_offset + idx; + return true; + } + } + + return false; +} + +static bool bnx2x_credit_pool_put_entry( + struct bnx2x_credit_pool_obj *o, + int offset) +{ + if (offset < o->base_pool_offset) + return false; + + offset -= o->base_pool_offset; + + if (offset >= o->pool_sz) + return false; + + /* Return the entry to the pool */ + BIT_VEC64_SET_BIT(o->pool_mirror, offset); + + return true; +} + +static bool bnx2x_credit_pool_put_entry_always_true( + struct bnx2x_credit_pool_obj *o, + int offset) +{ + return true; +} + +static bool bnx2x_credit_pool_get_entry_always_true( + struct bnx2x_credit_pool_obj *o, + int *offset) +{ + *offset = -1; + return true; +} +/** + * bnx2x_init_credit_pool - initialize credit pool internals. + * + * @p: + * @base: Base entry in the CAM to use. + * @credit: pool size. + * + * If base is negative no CAM entries handling will be performed. + * If credit is negative pool operations will always succeed (unlimited pool). + * + */ +static inline void bnx2x_init_credit_pool(struct bnx2x_credit_pool_obj *p, + int base, int credit) +{ + /* Zero the object first */ + memset(p, 0, sizeof(*p)); + + /* Set the table to all 1s */ + memset(&p->pool_mirror, 0xff, sizeof(p->pool_mirror)); + + /* Init a pool as full */ + atomic_set(&p->credit, credit); + + /* The total poll size */ + p->pool_sz = credit; + + p->base_pool_offset = base; + + /* Commit the change */ + smp_mb(); + + p->check = bnx2x_credit_pool_check; + + /* if pool credit is negative - disable the checks */ + if (credit >= 0) { + p->put = bnx2x_credit_pool_put; + p->get = bnx2x_credit_pool_get; + p->put_entry = bnx2x_credit_pool_put_entry; + p->get_entry = bnx2x_credit_pool_get_entry; + } else { + p->put = bnx2x_credit_pool_always_true; + p->get = bnx2x_credit_pool_always_true; + p->put_entry = bnx2x_credit_pool_put_entry_always_true; + p->get_entry = bnx2x_credit_pool_get_entry_always_true; + } + + /* If base is negative - disable entries handling */ + if (base < 0) { + p->put_entry = bnx2x_credit_pool_put_entry_always_true; + p->get_entry = bnx2x_credit_pool_get_entry_always_true; + } +} + +void bnx2x_init_mac_credit_pool(struct bnx2x *bp, + struct bnx2x_credit_pool_obj *p, u8 func_id, + u8 func_num) +{ +/* TODO: this will be defined in consts as well... */ +#define BNX2X_CAM_SIZE_EMUL 5 + + int cam_sz; + + if (CHIP_IS_E1(bp)) { + /* In E1, Multicast is saved in cam... */ + if (!CHIP_REV_IS_SLOW(bp)) + cam_sz = (MAX_MAC_CREDIT_E1 / 2) - BNX2X_MAX_MULTICAST; + else + cam_sz = BNX2X_CAM_SIZE_EMUL - BNX2X_MAX_EMUL_MULTI; + + bnx2x_init_credit_pool(p, func_id * cam_sz, cam_sz); + + } else if (CHIP_IS_E1H(bp)) { + /* CAM credit is equaly divided between all active functions + * on the PORT!. + */ + if ((func_num > 0)) { + if (!CHIP_REV_IS_SLOW(bp)) + cam_sz = (MAX_MAC_CREDIT_E1H / (2*func_num)); + else + cam_sz = BNX2X_CAM_SIZE_EMUL; + bnx2x_init_credit_pool(p, func_id * cam_sz, cam_sz); + } else { + /* this should never happen! Block MAC operations. */ + bnx2x_init_credit_pool(p, 0, 0); + } + + } else { + + /* + * CAM credit is equaly divided between all active functions + * on the PATH. + */ + if ((func_num > 0)) { + if (!CHIP_REV_IS_SLOW(bp)) + cam_sz = (MAX_MAC_CREDIT_E2 / func_num); + else + cam_sz = BNX2X_CAM_SIZE_EMUL; + + /* + * No need for CAM entries handling for 57712 and + * newer. + */ + bnx2x_init_credit_pool(p, -1, cam_sz); + } else { + /* this should never happen! Block MAC operations. */ + bnx2x_init_credit_pool(p, 0, 0); + } + + } +} + +void bnx2x_init_vlan_credit_pool(struct bnx2x *bp, + struct bnx2x_credit_pool_obj *p, + u8 func_id, + u8 func_num) +{ + if (CHIP_IS_E1x(bp)) { + /* + * There is no VLAN credit in HW on 57710 and 57711 only + * MAC / MAC-VLAN can be set + */ + bnx2x_init_credit_pool(p, 0, -1); + } else { + /* + * CAM credit is equaly divided between all active functions + * on the PATH. + */ + if (func_num > 0) { + int credit = MAX_VLAN_CREDIT_E2 / func_num; + bnx2x_init_credit_pool(p, func_id * credit, credit); + } else + /* this should never happen! Block VLAN operations. */ + bnx2x_init_credit_pool(p, 0, 0); + } +} + +/****************** RSS Configuration ******************/ +/** + * bnx2x_debug_print_ind_table - prints the indirection table configuration. + * + * @bp: driver hanlde + * @p: pointer to rss configuration + * + * Prints it when NETIF_MSG_IFUP debug level is configured. + */ +static inline void bnx2x_debug_print_ind_table(struct bnx2x *bp, + struct bnx2x_config_rss_params *p) +{ + int i; + + DP(BNX2X_MSG_SP, "Setting indirection table to:\n"); + DP(BNX2X_MSG_SP, "0x0000: "); + for (i = 0; i < T_ETH_INDIRECTION_TABLE_SIZE; i++) { + DP_CONT(BNX2X_MSG_SP, "0x%02x ", p->ind_table[i]); + + /* Print 4 bytes in a line */ + if ((i + 1 < T_ETH_INDIRECTION_TABLE_SIZE) && + (((i + 1) & 0x3) == 0)) { + DP_CONT(BNX2X_MSG_SP, "\n"); + DP(BNX2X_MSG_SP, "0x%04x: ", i + 1); + } + } + + DP_CONT(BNX2X_MSG_SP, "\n"); +} + +/** + * bnx2x_setup_rss - configure RSS + * + * @bp: device handle + * @p: rss configuration + * + * sends on UPDATE ramrod for that matter. + */ +static int bnx2x_setup_rss(struct bnx2x *bp, + struct bnx2x_config_rss_params *p) +{ + struct bnx2x_rss_config_obj *o = p->rss_obj; + struct bnx2x_raw_obj *r = &o->raw; + struct eth_rss_update_ramrod_data *data = + (struct eth_rss_update_ramrod_data *)(r->rdata); + u8 rss_mode = 0; + int rc; + + memset(data, 0, sizeof(*data)); + + DP(BNX2X_MSG_SP, "Configuring RSS\n"); + + /* Set an echo field */ + data->echo = (r->cid & BNX2X_SWCID_MASK) | + (r->state << BNX2X_SWCID_SHIFT); + + /* RSS mode */ + if (test_bit(BNX2X_RSS_MODE_DISABLED, &p->rss_flags)) + rss_mode = ETH_RSS_MODE_DISABLED; + else if (test_bit(BNX2X_RSS_MODE_REGULAR, &p->rss_flags)) + rss_mode = ETH_RSS_MODE_REGULAR; + + data->rss_mode = rss_mode; + + DP(BNX2X_MSG_SP, "rss_mode=%d\n", rss_mode); + + /* RSS capabilities */ + if (test_bit(BNX2X_RSS_IPV4, &p->rss_flags)) + data->capabilities |= + ETH_RSS_UPDATE_RAMROD_DATA_IPV4_CAPABILITY; + + if (test_bit(BNX2X_RSS_IPV4_TCP, &p->rss_flags)) + data->capabilities |= + ETH_RSS_UPDATE_RAMROD_DATA_IPV4_TCP_CAPABILITY; + + if (test_bit(BNX2X_RSS_IPV6, &p->rss_flags)) + data->capabilities |= + ETH_RSS_UPDATE_RAMROD_DATA_IPV6_CAPABILITY; + + if (test_bit(BNX2X_RSS_IPV6_TCP, &p->rss_flags)) + data->capabilities |= + ETH_RSS_UPDATE_RAMROD_DATA_IPV6_TCP_CAPABILITY; + + /* Hashing mask */ + data->rss_result_mask = p->rss_result_mask; + + /* RSS engine ID */ + data->rss_engine_id = o->engine_id; + + DP(BNX2X_MSG_SP, "rss_engine_id=%d\n", data->rss_engine_id); + + /* Indirection table */ + memcpy(data->indirection_table, p->ind_table, + T_ETH_INDIRECTION_TABLE_SIZE); + + /* Remember the last configuration */ + memcpy(o->ind_table, p->ind_table, T_ETH_INDIRECTION_TABLE_SIZE); + + /* Print the indirection table */ + if (netif_msg_ifup(bp)) + bnx2x_debug_print_ind_table(bp, p); + + /* RSS keys */ + if (test_bit(BNX2X_RSS_SET_SRCH, &p->rss_flags)) { + memcpy(&data->rss_key[0], &p->rss_key[0], + sizeof(data->rss_key)); + data->capabilities |= ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY; + } + + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + /* Send a ramrod */ + rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_RSS_UPDATE, r->cid, + U64_HI(r->rdata_mapping), + U64_LO(r->rdata_mapping), + ETH_CONNECTION_TYPE); + + if (rc < 0) + return rc; + + return 1; +} + +void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj, + u8 *ind_table) +{ + memcpy(ind_table, rss_obj->ind_table, sizeof(rss_obj->ind_table)); +} + +int bnx2x_config_rss(struct bnx2x *bp, + struct bnx2x_config_rss_params *p) +{ + int rc; + struct bnx2x_rss_config_obj *o = p->rss_obj; + struct bnx2x_raw_obj *r = &o->raw; + + /* Do nothing if only driver cleanup was requested */ + if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) + return 0; + + r->set_pending(r); + + rc = o->config_rss(bp, p); + if (rc < 0) { + r->clear_pending(r); + return rc; + } + + if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) + rc = r->wait_comp(bp, r); + + return rc; +} + + +void bnx2x_init_rss_config_obj(struct bnx2x *bp, + struct bnx2x_rss_config_obj *rss_obj, + u8 cl_id, u32 cid, u8 func_id, u8 engine_id, + void *rdata, dma_addr_t rdata_mapping, + int state, unsigned long *pstate, + bnx2x_obj_type type) +{ + bnx2x_init_raw_obj(&rss_obj->raw, cl_id, cid, func_id, rdata, + rdata_mapping, state, pstate, type); + + rss_obj->engine_id = engine_id; + rss_obj->config_rss = bnx2x_setup_rss; +} + +/********************** Queue state object ***********************************/ + +/** + * bnx2x_queue_state_change - perform Queue state change transition + * + * @bp: device handle + * @params: parameters to perform the transition + * + * returns 0 in case of successfully completed transition, negative error + * code in case of failure, positive (EBUSY) value if there is a completion + * to that is still pending (possible only if RAMROD_COMP_WAIT is + * not set in params->ramrod_flags for asynchronous commands). + * + */ +int bnx2x_queue_state_change(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + int rc, pending_bit; + unsigned long *pending = &o->pending; + + /* Check that the requested transition is legal */ + if (o->check_transition(bp, o, params)) + return -EINVAL; + + /* Set "pending" bit */ + pending_bit = o->set_pending(o, params); + + /* Don't send a command if only driver cleanup was requested */ + if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) + o->complete_cmd(bp, o, pending_bit); + else { + /* Send a ramrod */ + rc = o->send_cmd(bp, params); + if (rc) { + o->next_state = BNX2X_Q_STATE_MAX; + clear_bit(pending_bit, pending); + smp_mb__after_clear_bit(); + return rc; + } + + if (test_bit(RAMROD_COMP_WAIT, ¶ms->ramrod_flags)) { + rc = o->wait_comp(bp, o, pending_bit); + if (rc) + return rc; + + return 0; + } + } + + return !!test_bit(pending_bit, pending); +} + + +static int bnx2x_queue_set_pending(struct bnx2x_queue_sp_obj *obj, + struct bnx2x_queue_state_params *params) +{ + enum bnx2x_queue_cmd cmd = params->cmd, bit; + + /* ACTIVATE and DEACTIVATE commands are implemented on top of + * UPDATE command. + */ + if ((cmd == BNX2X_Q_CMD_ACTIVATE) || + (cmd == BNX2X_Q_CMD_DEACTIVATE)) + bit = BNX2X_Q_CMD_UPDATE; + else + bit = cmd; + + set_bit(bit, &obj->pending); + return bit; +} + +static int bnx2x_queue_wait_comp(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *o, + enum bnx2x_queue_cmd cmd) +{ + return bnx2x_state_wait(bp, cmd, &o->pending); +} + +/** + * bnx2x_queue_comp_cmd - complete the state change command. + * + * @bp: device handle + * @o: + * @cmd: + * + * Checks that the arrived completion is expected. + */ +static int bnx2x_queue_comp_cmd(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *o, + enum bnx2x_queue_cmd cmd) +{ + unsigned long cur_pending = o->pending; + + if (!test_and_clear_bit(cmd, &cur_pending)) { + BNX2X_ERR("Bad MC reply %d for queue %d in state %d pending 0x%lx, next_state %d\n", + cmd, o->cids[BNX2X_PRIMARY_CID_INDEX], + o->state, cur_pending, o->next_state); + return -EINVAL; + } + + if (o->next_tx_only >= o->max_cos) + /* >= becuase tx only must always be smaller than cos since the + * primary connection suports COS 0 + */ + BNX2X_ERR("illegal value for next tx_only: %d. max cos was %d", + o->next_tx_only, o->max_cos); + + DP(BNX2X_MSG_SP, + "Completing command %d for queue %d, setting state to %d\n", + cmd, o->cids[BNX2X_PRIMARY_CID_INDEX], o->next_state); + + if (o->next_tx_only) /* print num tx-only if any exist */ + DP(BNX2X_MSG_SP, "primary cid %d: num tx-only cons %d\n", + o->cids[BNX2X_PRIMARY_CID_INDEX], o->next_tx_only); + + o->state = o->next_state; + o->num_tx_only = o->next_tx_only; + o->next_state = BNX2X_Q_STATE_MAX; + + /* It's important that o->state and o->next_state are + * updated before o->pending. + */ + wmb(); + + clear_bit(cmd, &o->pending); + smp_mb__after_clear_bit(); + + return 0; +} + +static void bnx2x_q_fill_setup_data_e2(struct bnx2x *bp, + struct bnx2x_queue_state_params *cmd_params, + struct client_init_ramrod_data *data) +{ + struct bnx2x_queue_setup_params *params = &cmd_params->params.setup; + + /* Rx data */ + + /* IPv6 TPA supported for E2 and above only */ + data->rx.tpa_en |= test_bit(BNX2X_Q_FLG_TPA_IPV6, ¶ms->flags) * + CLIENT_INIT_RX_DATA_TPA_EN_IPV6; +} + +static void bnx2x_q_fill_init_general_data(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *o, + struct bnx2x_general_setup_params *params, + struct client_init_general_data *gen_data, + unsigned long *flags) +{ + gen_data->client_id = o->cl_id; + + if (test_bit(BNX2X_Q_FLG_STATS, flags)) { + gen_data->statistics_counter_id = + params->stat_id; + gen_data->statistics_en_flg = 1; + gen_data->statistics_zero_flg = + test_bit(BNX2X_Q_FLG_ZERO_STATS, flags); + } else + gen_data->statistics_counter_id = + DISABLE_STATISTIC_COUNTER_ID_VALUE; + + gen_data->is_fcoe_flg = test_bit(BNX2X_Q_FLG_FCOE, flags); + gen_data->activate_flg = test_bit(BNX2X_Q_FLG_ACTIVE, flags); + gen_data->sp_client_id = params->spcl_id; + gen_data->mtu = cpu_to_le16(params->mtu); + gen_data->func_id = o->func_id; + + + gen_data->cos = params->cos; + + gen_data->traffic_type = + test_bit(BNX2X_Q_FLG_FCOE, flags) ? + LLFC_TRAFFIC_TYPE_FCOE : LLFC_TRAFFIC_TYPE_NW; + + DP(BNX2X_MSG_SP, "flags: active %d, cos %d, stats en %d\n", + gen_data->activate_flg, gen_data->cos, gen_data->statistics_en_flg); +} + +static void bnx2x_q_fill_init_tx_data(struct bnx2x_queue_sp_obj *o, + struct bnx2x_txq_setup_params *params, + struct client_init_tx_data *tx_data, + unsigned long *flags) +{ + tx_data->enforce_security_flg = + test_bit(BNX2X_Q_FLG_TX_SEC, flags); + tx_data->default_vlan = + cpu_to_le16(params->default_vlan); + tx_data->default_vlan_flg = + test_bit(BNX2X_Q_FLG_DEF_VLAN, flags); + tx_data->tx_switching_flg = + test_bit(BNX2X_Q_FLG_TX_SWITCH, flags); + tx_data->anti_spoofing_flg = + test_bit(BNX2X_Q_FLG_ANTI_SPOOF, flags); + tx_data->force_default_pri_flg = + test_bit(BNX2X_Q_FLG_FORCE_DEFAULT_PRI, flags); + + tx_data->tx_status_block_id = params->fw_sb_id; + tx_data->tx_sb_index_number = params->sb_cq_index; + tx_data->tss_leading_client_id = params->tss_leading_cl_id; + + tx_data->tx_bd_page_base.lo = + cpu_to_le32(U64_LO(params->dscr_map)); + tx_data->tx_bd_page_base.hi = + cpu_to_le32(U64_HI(params->dscr_map)); + + /* Don't configure any Tx switching mode during queue SETUP */ + tx_data->state = 0; +} + +static void bnx2x_q_fill_init_pause_data(struct bnx2x_queue_sp_obj *o, + struct rxq_pause_params *params, + struct client_init_rx_data *rx_data) +{ + /* flow control data */ + rx_data->cqe_pause_thr_low = cpu_to_le16(params->rcq_th_lo); + rx_data->cqe_pause_thr_high = cpu_to_le16(params->rcq_th_hi); + rx_data->bd_pause_thr_low = cpu_to_le16(params->bd_th_lo); + rx_data->bd_pause_thr_high = cpu_to_le16(params->bd_th_hi); + rx_data->sge_pause_thr_low = cpu_to_le16(params->sge_th_lo); + rx_data->sge_pause_thr_high = cpu_to_le16(params->sge_th_hi); + rx_data->rx_cos_mask = cpu_to_le16(params->pri_map); +} + +static void bnx2x_q_fill_init_rx_data(struct bnx2x_queue_sp_obj *o, + struct bnx2x_rxq_setup_params *params, + struct client_init_rx_data *rx_data, + unsigned long *flags) +{ + rx_data->tpa_en = test_bit(BNX2X_Q_FLG_TPA, flags) * + CLIENT_INIT_RX_DATA_TPA_EN_IPV4; + rx_data->tpa_en |= test_bit(BNX2X_Q_FLG_TPA_GRO, flags) * + CLIENT_INIT_RX_DATA_TPA_MODE; +#ifdef BNX2X_UPSTREAM /* BNX2X_UPSTREAM */ + rx_data->vmqueue_mode_en_flg = 0; +#else + rx_data->vmqueue_mode_en_flg = + test_bit(BNX2X_Q_FLG_VMQUEUE_MODE, flags); +#endif + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + rx_data->extra_data_over_sgl_en_flg = + test_bit(BNX2X_Q_FLG_OOO, flags); +#endif + rx_data->cache_line_alignment_log_size = + params->cache_line_log; + rx_data->enable_dynamic_hc = + test_bit(BNX2X_Q_FLG_DHC, flags); + rx_data->max_sges_for_packet = params->max_sges_pkt; + rx_data->client_qzone_id = params->cl_qzone_id; + rx_data->max_agg_size = cpu_to_le16(params->tpa_agg_sz); + + /* Always start in DROP_ALL mode */ + rx_data->state = cpu_to_le16(CLIENT_INIT_RX_DATA_UCAST_DROP_ALL | + CLIENT_INIT_RX_DATA_MCAST_DROP_ALL); + + /* We don't set drop flags */ + rx_data->drop_ip_cs_err_flg = 0; + rx_data->drop_tcp_cs_err_flg = 0; + rx_data->drop_ttl0_flg = 0; + rx_data->drop_udp_cs_err_flg = 0; + rx_data->inner_vlan_removal_enable_flg = + test_bit(BNX2X_Q_FLG_VLAN, flags); + rx_data->outer_vlan_removal_enable_flg = + test_bit(BNX2X_Q_FLG_OV, flags); + rx_data->status_block_id = params->fw_sb_id; + rx_data->rx_sb_index_number = params->sb_cq_index; + rx_data->max_tpa_queues = params->max_tpa_queues; + rx_data->max_bytes_on_bd = cpu_to_le16(params->buf_sz); + rx_data->sge_buff_size = cpu_to_le16(params->sge_buf_sz); + rx_data->bd_page_base.lo = + cpu_to_le32(U64_LO(params->dscr_map)); + rx_data->bd_page_base.hi = + cpu_to_le32(U64_HI(params->dscr_map)); + rx_data->sge_page_base.lo = + cpu_to_le32(U64_LO(params->sge_map)); + rx_data->sge_page_base.hi = + cpu_to_le32(U64_HI(params->sge_map)); + rx_data->cqe_page_base.lo = + cpu_to_le32(U64_LO(params->rcq_map)); + rx_data->cqe_page_base.hi = + cpu_to_le32(U64_HI(params->rcq_map)); + rx_data->is_leading_rss = test_bit(BNX2X_Q_FLG_LEADING_RSS, flags); + + if (test_bit(BNX2X_Q_FLG_MCAST, flags)) { + rx_data->approx_mcast_engine_id = params->mcast_engine_id; + rx_data->is_approx_mcast = 1; + } + + rx_data->rss_engine_id = params->rss_engine_id; + + /* silent vlan removal */ + rx_data->silent_vlan_removal_flg = + test_bit(BNX2X_Q_FLG_SILENT_VLAN_REM, flags); + rx_data->silent_vlan_value = + cpu_to_le16(params->silent_removal_value); + rx_data->silent_vlan_mask = + cpu_to_le16(params->silent_removal_mask); + +} + +/* initialize the general, tx and rx parts of a queue object */ +static void bnx2x_q_fill_setup_data_cmn(struct bnx2x *bp, + struct bnx2x_queue_state_params *cmd_params, + struct client_init_ramrod_data *data) +{ + bnx2x_q_fill_init_general_data(bp, cmd_params->q_obj, + &cmd_params->params.setup.gen_params, + &data->general, + &cmd_params->params.setup.flags); + + bnx2x_q_fill_init_tx_data(cmd_params->q_obj, + &cmd_params->params.setup.txq_params, + &data->tx, + &cmd_params->params.setup.flags); + + bnx2x_q_fill_init_rx_data(cmd_params->q_obj, + &cmd_params->params.setup.rxq_params, + &data->rx, + &cmd_params->params.setup.flags); + + bnx2x_q_fill_init_pause_data(cmd_params->q_obj, + &cmd_params->params.setup.pause_params, + &data->rx); +} + +/* initialize the general and tx parts of a tx-only queue object */ +static void bnx2x_q_fill_setup_tx_only(struct bnx2x *bp, + struct bnx2x_queue_state_params *cmd_params, + struct tx_queue_init_ramrod_data *data) +{ + bnx2x_q_fill_init_general_data(bp, cmd_params->q_obj, + &cmd_params->params.tx_only.gen_params, + &data->general, + &cmd_params->params.tx_only.flags); + + bnx2x_q_fill_init_tx_data(cmd_params->q_obj, + &cmd_params->params.tx_only.txq_params, + &data->tx, + &cmd_params->params.tx_only.flags); + + DP(BNX2X_MSG_SP, "cid %d, tx bd page lo %x hi %x", + cmd_params->q_obj->cids[0], + data->tx.tx_bd_page_base.lo, + data->tx.tx_bd_page_base.hi); +} + +/** + * bnx2x_q_init - init HW/FW queue + * + * @bp: device handle + * @params: + * + * HW/FW initial Queue configuration: + * - HC: Rx and Tx + * - CDU context validation + * + */ +static inline int bnx2x_q_init(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + struct bnx2x_queue_init_params *init = ¶ms->params.init; + u16 hc_usec; + u8 cos; + + /* Tx HC configuration */ + if (test_bit(BNX2X_Q_TYPE_HAS_TX, &o->type) && + test_bit(BNX2X_Q_FLG_HC, &init->tx.flags)) { + hc_usec = init->tx.hc_rate ? 1000000 / init->tx.hc_rate : 0; + + bnx2x_update_coalesce_sb_index(bp, init->tx.fw_sb_id, + init->tx.sb_cq_index, + !test_bit(BNX2X_Q_FLG_HC_EN, &init->tx.flags), + hc_usec); + } + + /* Rx HC configuration */ + if (test_bit(BNX2X_Q_TYPE_HAS_RX, &o->type) && + test_bit(BNX2X_Q_FLG_HC, &init->rx.flags)) { + hc_usec = init->rx.hc_rate ? 1000000 / init->rx.hc_rate : 0; + + bnx2x_update_coalesce_sb_index(bp, init->rx.fw_sb_id, + init->rx.sb_cq_index, + !test_bit(BNX2X_Q_FLG_HC_EN, &init->rx.flags), + hc_usec); + } + + /* Set CDU context validation values */ + for (cos = 0; cos < o->max_cos; cos++) { + DP(BNX2X_MSG_SP, "setting context validation. cid %d, cos %d\n", + o->cids[cos], cos); + DP(BNX2X_MSG_SP, "context pointer %p\n", init->cxts[cos]); + bnx2x_set_ctx_validation(bp, init->cxts[cos], o->cids[cos]); + } + + /* As no ramrod is sent, complete the command immediately */ + o->complete_cmd(bp, o, BNX2X_Q_CMD_INIT); + + mmiowb(); + smp_mb(); + + return 0; +} + +static inline int bnx2x_q_send_setup_e1x(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + struct client_init_ramrod_data *rdata = + (struct client_init_ramrod_data *)o->rdata; + dma_addr_t data_mapping = o->rdata_mapping; + int ramrod = RAMROD_CMD_ID_ETH_CLIENT_SETUP; + + /* Clear the ramrod data */ + memset(rdata, 0, sizeof(*rdata)); + + /* Fill the ramrod data */ + bnx2x_q_fill_setup_data_cmn(bp, params, rdata); + + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + return bnx2x_sp_post(bp, ramrod, o->cids[BNX2X_PRIMARY_CID_INDEX], + U64_HI(data_mapping), + U64_LO(data_mapping), ETH_CONNECTION_TYPE); +} + +static inline int bnx2x_q_send_setup_e2(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + struct client_init_ramrod_data *rdata = + (struct client_init_ramrod_data *)o->rdata; + dma_addr_t data_mapping = o->rdata_mapping; + int ramrod = RAMROD_CMD_ID_ETH_CLIENT_SETUP; + + /* Clear the ramrod data */ + memset(rdata, 0, sizeof(*rdata)); + + /* Fill the ramrod data */ + bnx2x_q_fill_setup_data_cmn(bp, params, rdata); + bnx2x_q_fill_setup_data_e2(bp, params, rdata); + + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + return bnx2x_sp_post(bp, ramrod, o->cids[BNX2X_PRIMARY_CID_INDEX], + U64_HI(data_mapping), + U64_LO(data_mapping), ETH_CONNECTION_TYPE); +} + +static inline int bnx2x_q_send_setup_tx_only(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + struct tx_queue_init_ramrod_data *rdata = + (struct tx_queue_init_ramrod_data *)o->rdata; + dma_addr_t data_mapping = o->rdata_mapping; + int ramrod = RAMROD_CMD_ID_ETH_TX_QUEUE_SETUP; + struct bnx2x_queue_setup_tx_only_params *tx_only_params = + ¶ms->params.tx_only; + u8 cid_index = tx_only_params->cid_index; + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (test_bit(BNX2X_Q_TYPE_FWD, &o->type)) + ramrod = RAMROD_CMD_ID_ETH_FORWARD_SETUP; + DP(BNX2X_MSG_SP, "sending forward tx-only ramrod"); +#endif + + if (cid_index >= o->max_cos) { + BNX2X_ERR("queue[%d]: cid_index (%d) is out of range\n", + o->cl_id, cid_index); + return -EINVAL; + } + + DP(BNX2X_MSG_SP, "parameters received: cos: %d sp-id: %d\n", + tx_only_params->gen_params.cos, + tx_only_params->gen_params.spcl_id); + + /* Clear the ramrod data */ + memset(rdata, 0, sizeof(*rdata)); + + /* Fill the ramrod data */ + bnx2x_q_fill_setup_tx_only(bp, params, rdata); + + DP(BNX2X_MSG_SP, "sending tx-only ramrod: cid %d, client-id %d, sp-client id %d, cos %d\n", + o->cids[cid_index], rdata->general.client_id, + rdata->general.sp_client_id, rdata->general.cos); + + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + return bnx2x_sp_post(bp, ramrod, o->cids[cid_index], + U64_HI(data_mapping), + U64_LO(data_mapping), ETH_CONNECTION_TYPE); +} + +static void bnx2x_q_fill_update_data(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *obj, + struct bnx2x_queue_update_params *params, + struct client_update_ramrod_data *data) +{ + /* Client ID of the client to update */ + data->client_id = obj->cl_id; + + /* Function ID of the client to update */ + data->func_id = obj->func_id; + + /* Default VLAN value */ + data->default_vlan = cpu_to_le16(params->def_vlan); + + /* Inner VLAN stripping */ + data->inner_vlan_removal_enable_flg = + test_bit(BNX2X_Q_UPDATE_IN_VLAN_REM, ¶ms->update_flags); + data->inner_vlan_removal_change_flg = + test_bit(BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG, + ¶ms->update_flags); + + /* Outer VLAN sripping */ + data->outer_vlan_removal_enable_flg = + test_bit(BNX2X_Q_UPDATE_OUT_VLAN_REM, ¶ms->update_flags); + data->outer_vlan_removal_change_flg = + test_bit(BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG, + ¶ms->update_flags); + + /* Drop packets that have source MAC that doesn't belong to this + * Queue. + */ + data->anti_spoofing_enable_flg = + test_bit(BNX2X_Q_UPDATE_ANTI_SPOOF, ¶ms->update_flags); + data->anti_spoofing_change_flg = + test_bit(BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG, ¶ms->update_flags); + + /* Activate/Deactivate */ + data->activate_flg = + test_bit(BNX2X_Q_UPDATE_ACTIVATE, ¶ms->update_flags); + data->activate_change_flg = + test_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, ¶ms->update_flags); + + /* Enable default VLAN */ + data->default_vlan_enable_flg = + test_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN, ¶ms->update_flags); + data->default_vlan_change_flg = + test_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG, + ¶ms->update_flags); + + /* silent vlan removal */ + data->silent_vlan_change_flg = + test_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG, + ¶ms->update_flags); + data->silent_vlan_removal_flg = + test_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM, ¶ms->update_flags); + data->silent_vlan_value = cpu_to_le16(params->silent_removal_value); + data->silent_vlan_mask = cpu_to_le16(params->silent_removal_mask); +} + +static inline int bnx2x_q_send_update(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + struct client_update_ramrod_data *rdata = + (struct client_update_ramrod_data *)o->rdata; + dma_addr_t data_mapping = o->rdata_mapping; + struct bnx2x_queue_update_params *update_params = + ¶ms->params.update; + u8 cid_index = update_params->cid_index; + + if (cid_index >= o->max_cos) { + BNX2X_ERR("queue[%d]: cid_index (%d) is out of range\n", + o->cl_id, cid_index); + return -EINVAL; + } + + + /* Clear the ramrod data */ + memset(rdata, 0, sizeof(*rdata)); + + /* Fill the ramrod data */ + bnx2x_q_fill_update_data(bp, o, update_params, rdata); + + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_CLIENT_UPDATE, + o->cids[cid_index], U64_HI(data_mapping), + U64_LO(data_mapping), ETH_CONNECTION_TYPE); +} + +/** + * bnx2x_q_send_deactivate - send DEACTIVATE command + * + * @bp: device handle + * @params: + * + * implemented using the UPDATE command. + */ +static inline int bnx2x_q_send_deactivate(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_update_params *update = ¶ms->params.update; + + memset(update, 0, sizeof(*update)); + + __set_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, &update->update_flags); + + return bnx2x_q_send_update(bp, params); +} + +/** + * bnx2x_q_send_activate - send ACTIVATE command + * + * @bp: device handle + * @params: + * + * implemented using the UPDATE command. + */ +static inline int bnx2x_q_send_activate(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_update_params *update = ¶ms->params.update; + + memset(update, 0, sizeof(*update)); + + __set_bit(BNX2X_Q_UPDATE_ACTIVATE, &update->update_flags); + __set_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, &update->update_flags); + + return bnx2x_q_send_update(bp, params); +} + +static inline int bnx2x_q_send_update_tpa(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + /* TODO: Not implemented yet. */ + return -1; +} + +static inline int bnx2x_q_send_halt(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + + return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_HALT, + o->cids[BNX2X_PRIMARY_CID_INDEX], 0, o->cl_id, + ETH_CONNECTION_TYPE); +} + +static inline int bnx2x_q_send_cfc_del(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + u8 cid_idx = params->params.cfc_del.cid_index; + + if (cid_idx >= o->max_cos) { + BNX2X_ERR("queue[%d]: cid_index (%d) is out of range\n", + o->cl_id, cid_idx); + return -EINVAL; + } + + return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_CFC_DEL, + o->cids[cid_idx], 0, 0, NONE_CONNECTION_TYPE); +} + +static inline int bnx2x_q_send_terminate(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + u8 cid_index = params->params.terminate.cid_index; + + if (cid_index >= o->max_cos) { + BNX2X_ERR("queue[%d]: cid_index (%d) is out of range\n", + o->cl_id, cid_index); + return -EINVAL; + } + + return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_TERMINATE, + o->cids[cid_index], 0, 0, ETH_CONNECTION_TYPE); +} + +static inline int bnx2x_q_send_empty(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + struct bnx2x_queue_sp_obj *o = params->q_obj; + + return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_EMPTY, + o->cids[BNX2X_PRIMARY_CID_INDEX], 0, 0, + ETH_CONNECTION_TYPE); +} + +static inline int bnx2x_queue_send_cmd_cmn(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + switch (params->cmd) { + case BNX2X_Q_CMD_INIT: + return bnx2x_q_init(bp, params); + case BNX2X_Q_CMD_SETUP_TX_ONLY: + return bnx2x_q_send_setup_tx_only(bp, params); + case BNX2X_Q_CMD_DEACTIVATE: + return bnx2x_q_send_deactivate(bp, params); + case BNX2X_Q_CMD_ACTIVATE: + return bnx2x_q_send_activate(bp, params); + case BNX2X_Q_CMD_UPDATE: + return bnx2x_q_send_update(bp, params); + case BNX2X_Q_CMD_UPDATE_TPA: + return bnx2x_q_send_update_tpa(bp, params); + case BNX2X_Q_CMD_HALT: + return bnx2x_q_send_halt(bp, params); + case BNX2X_Q_CMD_CFC_DEL: + return bnx2x_q_send_cfc_del(bp, params); + case BNX2X_Q_CMD_TERMINATE: + return bnx2x_q_send_terminate(bp, params); + case BNX2X_Q_CMD_EMPTY: + return bnx2x_q_send_empty(bp, params); + default: + BNX2X_ERR("Unknown command: %d\n", params->cmd); + return -EINVAL; + } +} + +static int bnx2x_queue_send_cmd_e1x(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + switch (params->cmd) { + case BNX2X_Q_CMD_SETUP: + return bnx2x_q_send_setup_e1x(bp, params); + case BNX2X_Q_CMD_INIT: + case BNX2X_Q_CMD_SETUP_TX_ONLY: + case BNX2X_Q_CMD_DEACTIVATE: + case BNX2X_Q_CMD_ACTIVATE: + case BNX2X_Q_CMD_UPDATE: + case BNX2X_Q_CMD_UPDATE_TPA: + case BNX2X_Q_CMD_HALT: + case BNX2X_Q_CMD_CFC_DEL: + case BNX2X_Q_CMD_TERMINATE: + case BNX2X_Q_CMD_EMPTY: + return bnx2x_queue_send_cmd_cmn(bp, params); + default: + BNX2X_ERR("Unknown command: %d\n", params->cmd); + return -EINVAL; + } +} + +static int bnx2x_queue_send_cmd_e2(struct bnx2x *bp, + struct bnx2x_queue_state_params *params) +{ + switch (params->cmd) { + case BNX2X_Q_CMD_SETUP: + return bnx2x_q_send_setup_e2(bp, params); + case BNX2X_Q_CMD_INIT: + case BNX2X_Q_CMD_SETUP_TX_ONLY: + case BNX2X_Q_CMD_DEACTIVATE: + case BNX2X_Q_CMD_ACTIVATE: + case BNX2X_Q_CMD_UPDATE: + case BNX2X_Q_CMD_UPDATE_TPA: + case BNX2X_Q_CMD_HALT: + case BNX2X_Q_CMD_CFC_DEL: + case BNX2X_Q_CMD_TERMINATE: + case BNX2X_Q_CMD_EMPTY: + return bnx2x_queue_send_cmd_cmn(bp, params); + default: + BNX2X_ERR("Unknown command: %d\n", params->cmd); + return -EINVAL; + } +} + +/** + * bnx2x_queue_chk_transition - check state machine of a regular Queue + * + * @bp: device handle + * @o: + * @params: + * + * (not Forwarding) + * It both checks if the requested command is legal in a current + * state and, if it's legal, sets a `next_state' in the object + * that will be used in the completion flow to set the `state' + * of the object. + * + * returns 0 if a requested command is a legal transition, + * -EINVAL otherwise. + */ +static int bnx2x_queue_chk_transition(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *o, + struct bnx2x_queue_state_params *params) +{ + enum bnx2x_q_state state = o->state, next_state = BNX2X_Q_STATE_MAX; + enum bnx2x_queue_cmd cmd = params->cmd; + struct bnx2x_queue_update_params *update_params = + ¶ms->params.update; + u8 next_tx_only = o->num_tx_only; + + /* + * Forget all pending for completion commands if a driver only state + * transition has been requested. + */ + if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) { + o->pending = 0; + o->next_state = BNX2X_Q_STATE_MAX; + } + + /* + * Don't allow a next state transition if we are in the middle of + * the previous one. + */ + if (o->pending) + return -EBUSY; + + switch (state) { + case BNX2X_Q_STATE_RESET: + if (cmd == BNX2X_Q_CMD_INIT) + next_state = BNX2X_Q_STATE_INITIALIZED; + + break; + case BNX2X_Q_STATE_INITIALIZED: + if (cmd == BNX2X_Q_CMD_SETUP) { + if (test_bit(BNX2X_Q_FLG_ACTIVE, + ¶ms->params.setup.flags)) + next_state = BNX2X_Q_STATE_ACTIVE; + else + next_state = BNX2X_Q_STATE_INACTIVE; + } + + break; + case BNX2X_Q_STATE_ACTIVE: + if (cmd == BNX2X_Q_CMD_DEACTIVATE) + next_state = BNX2X_Q_STATE_INACTIVE; + + else if ((cmd == BNX2X_Q_CMD_EMPTY) || + (cmd == BNX2X_Q_CMD_UPDATE_TPA)) + next_state = BNX2X_Q_STATE_ACTIVE; + + else if (cmd == BNX2X_Q_CMD_SETUP_TX_ONLY) { + next_state = BNX2X_Q_STATE_MULTI_COS; + next_tx_only = 1; + } + + else if (cmd == BNX2X_Q_CMD_HALT) + next_state = BNX2X_Q_STATE_STOPPED; + + else if (cmd == BNX2X_Q_CMD_UPDATE) { + /* If "active" state change is requested, update the + * state accordingly. + */ + if (test_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, + &update_params->update_flags) && + !test_bit(BNX2X_Q_UPDATE_ACTIVATE, + &update_params->update_flags)) + next_state = BNX2X_Q_STATE_INACTIVE; + else + next_state = BNX2X_Q_STATE_ACTIVE; + } + + break; + case BNX2X_Q_STATE_MULTI_COS: + if (cmd == BNX2X_Q_CMD_TERMINATE) + next_state = BNX2X_Q_STATE_MCOS_TERMINATED; + + else if (cmd == BNX2X_Q_CMD_SETUP_TX_ONLY) { + next_state = BNX2X_Q_STATE_MULTI_COS; + next_tx_only = o->num_tx_only + 1; + } + + else if ((cmd == BNX2X_Q_CMD_EMPTY) || + (cmd == BNX2X_Q_CMD_UPDATE_TPA)) + next_state = BNX2X_Q_STATE_MULTI_COS; + + else if (cmd == BNX2X_Q_CMD_UPDATE) { + /* If "active" state change is requested, update the + * state accordingly. + */ + if (test_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, + &update_params->update_flags) && + !test_bit(BNX2X_Q_UPDATE_ACTIVATE, + &update_params->update_flags)) + next_state = BNX2X_Q_STATE_INACTIVE; + else + next_state = BNX2X_Q_STATE_MULTI_COS; + } + + break; + case BNX2X_Q_STATE_MCOS_TERMINATED: + if (cmd == BNX2X_Q_CMD_CFC_DEL) { + next_tx_only = o->num_tx_only - 1; + if (next_tx_only == 0) + next_state = BNX2X_Q_STATE_ACTIVE; + else + next_state = BNX2X_Q_STATE_MULTI_COS; + } + + break; + case BNX2X_Q_STATE_INACTIVE: + if (cmd == BNX2X_Q_CMD_ACTIVATE) + next_state = BNX2X_Q_STATE_ACTIVE; + + else if ((cmd == BNX2X_Q_CMD_EMPTY) || + (cmd == BNX2X_Q_CMD_UPDATE_TPA)) + next_state = BNX2X_Q_STATE_INACTIVE; + + else if (cmd == BNX2X_Q_CMD_HALT) + next_state = BNX2X_Q_STATE_STOPPED; + + else if (cmd == BNX2X_Q_CMD_UPDATE) { + /* If "active" state change is requested, update the + * state accordingly. + */ + if (test_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, + &update_params->update_flags) && + test_bit(BNX2X_Q_UPDATE_ACTIVATE, + &update_params->update_flags)){ + if (o->num_tx_only == 0) + next_state = BNX2X_Q_STATE_ACTIVE; + else /* tx only queues exist for this queue */ + next_state = BNX2X_Q_STATE_MULTI_COS; + } else + next_state = BNX2X_Q_STATE_INACTIVE; + } + + break; + case BNX2X_Q_STATE_STOPPED: + if (cmd == BNX2X_Q_CMD_TERMINATE) + next_state = BNX2X_Q_STATE_TERMINATED; + + break; + case BNX2X_Q_STATE_TERMINATED: + if (cmd == BNX2X_Q_CMD_CFC_DEL) + next_state = BNX2X_Q_STATE_RESET; + + break; + default: + BNX2X_ERR("Illegal state: %d\n", state); + } + + /* Transition is assured */ + if (next_state != BNX2X_Q_STATE_MAX) { + DP(BNX2X_MSG_SP, "Good state transition: %d(%d)->%d\n", + state, cmd, next_state); + o->next_state = next_state; + o->next_tx_only = next_tx_only; + return 0; + } + + DP(BNX2X_MSG_SP, "Bad state transition request: %d %d\n", state, cmd); + + return -EINVAL; +} +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + +/** + * bnx2x_queue_chk_fwd_transition - check state machine of a Forwarding Queue. + * + * @bp: device handle + * @o: + * @params: + * + * It both checks if the requested command is legal in a current + * state and, if it's legal, sets a `next_state' in the object + * that will be used in the completion flow to set the `state' + * of the object. + * + * returns 0 if a requested command is a legal transition, + * -EINVAL otherwise. + */ +static int bnx2x_queue_chk_fwd_transition(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *o, + struct bnx2x_queue_state_params *params) +{ + enum bnx2x_q_state state = o->state, next_state = BNX2X_Q_STATE_MAX; + enum bnx2x_queue_cmd cmd = params->cmd; + + + switch (state) { + case BNX2X_Q_STATE_RESET: + if (cmd == BNX2X_Q_CMD_INIT) + next_state = BNX2X_Q_STATE_INITIALIZED; + + break; + case BNX2X_Q_STATE_INITIALIZED: + if (cmd == BNX2X_Q_CMD_SETUP_TX_ONLY) { + if (test_bit(BNX2X_Q_FLG_ACTIVE, + ¶ms->params.tx_only.flags)) + next_state = BNX2X_Q_STATE_ACTIVE; + else + next_state = BNX2X_Q_STATE_INACTIVE; + } + + break; + case BNX2X_Q_STATE_ACTIVE: + case BNX2X_Q_STATE_INACTIVE: + if (cmd == BNX2X_Q_CMD_CFC_DEL) + next_state = BNX2X_Q_STATE_RESET; + + break; + default: + BNX2X_ERR("Illegal state: %d\n", state); + } + + /* Transition is assured */ + if (next_state != BNX2X_Q_STATE_MAX) { + DP(BNX2X_MSG_SP, "Good state transition: %d(%d)->%d\n", + state, cmd, next_state); + o->next_state = next_state; + return 0; + } + + DP(BNX2X_MSG_SP, "Bad state transition request: %d %d\n", state, cmd); + return -EINVAL; +} +#endif + +void bnx2x_init_queue_obj(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *obj, + u8 cl_id, u32 *cids, u8 cid_cnt, u8 func_id, + void *rdata, + dma_addr_t rdata_mapping, unsigned long type) +{ + memset(obj, 0, sizeof(*obj)); + + /* We support only BNX2X_MULTI_TX_COS Tx CoS at the moment */ + BUG_ON(BNX2X_MULTI_TX_COS < cid_cnt); + + memcpy(obj->cids, cids, sizeof(obj->cids[0]) * cid_cnt); + obj->max_cos = cid_cnt; + obj->cl_id = cl_id; + obj->func_id = func_id; + obj->rdata = rdata; + obj->rdata_mapping = rdata_mapping; + obj->type = type; + obj->next_state = BNX2X_Q_STATE_MAX; + + if (CHIP_IS_E1x(bp)) + obj->send_cmd = bnx2x_queue_send_cmd_e1x; + else + obj->send_cmd = bnx2x_queue_send_cmd_e2; + +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + if (test_bit(BNX2X_Q_TYPE_FWD, &type)) + obj->check_transition = bnx2x_queue_chk_fwd_transition; + else +#endif + obj->check_transition = bnx2x_queue_chk_transition; + + obj->complete_cmd = bnx2x_queue_comp_cmd; + obj->wait_comp = bnx2x_queue_wait_comp; + obj->set_pending = bnx2x_queue_set_pending; +} + +/********************** Function state object *********************************/ +enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp, + struct bnx2x_func_sp_obj *o) +{ + /* in the middle of transaction - return INVALID state */ + if (o->pending) + return BNX2X_F_STATE_MAX; + + /* + * unsure the order of reading of o->pending and o->state + * o->pending should be read first + */ + rmb(); + + return o->state; +} + +static int bnx2x_func_wait_comp(struct bnx2x *bp, + struct bnx2x_func_sp_obj *o, + enum bnx2x_func_cmd cmd) +{ + return bnx2x_state_wait(bp, cmd, &o->pending); +} + +/** + * bnx2x_func_state_change_comp - complete the state machine transition + * + * @bp: device handle + * @o: + * @cmd: + * + * Called on state change transition. Completes the state + * machine transition only - no HW interaction. + */ +static inline int bnx2x_func_state_change_comp(struct bnx2x *bp, + struct bnx2x_func_sp_obj *o, + enum bnx2x_func_cmd cmd) +{ + unsigned long cur_pending = o->pending; + + if (!test_and_clear_bit(cmd, &cur_pending)) { + BNX2X_ERR("Bad MC reply %d for func %d in state %d pending 0x%lx, next_state %d\n", + cmd, BP_FUNC(bp), + o->state, cur_pending, o->next_state); + return -EINVAL; + } + + DP(BNX2X_MSG_SP, + "Completing command %d for func %d, setting state to %d\n", + cmd, BP_FUNC(bp), o->next_state); + + o->state = o->next_state; + o->next_state = BNX2X_F_STATE_MAX; + + /* It's important that o->state and o->next_state are + * updated before o->pending. + */ + wmb(); + + clear_bit(cmd, &o->pending); + smp_mb__after_clear_bit(); + + return 0; +} + +/** + * bnx2x_func_comp_cmd - complete the state change command + * + * @bp: device handle + * @o: + * @cmd: + * @params: + * + * Checks that the arrived completion is expected. + */ +static int bnx2x_func_comp_cmd(struct bnx2x *bp, + struct bnx2x_func_sp_obj *o, + enum bnx2x_func_cmd cmd) +{ + /* Complete the state machine part first, check if it's a + * legal completion. + */ + int rc = bnx2x_func_state_change_comp(bp, o, cmd); + return rc; +} + +/** + * bnx2x_func_chk_transition - perform function state machine transition + * + * @bp: device handle + * @o: + * @params: + * + * It both checks if the requested command is legal in a current + * state and, if it's legal, sets a `next_state' in the object + * that will be used in the completion flow to set the `state' + * of the object. + * + * returns 0 if a requested command is a legal transition, + * -EINVAL otherwise. + */ +static int bnx2x_func_chk_transition(struct bnx2x *bp, + struct bnx2x_func_sp_obj *o, + struct bnx2x_func_state_params *params) +{ + enum bnx2x_func_state state = o->state, next_state = BNX2X_F_STATE_MAX; + enum bnx2x_func_cmd cmd = params->cmd; + + /* + * Forget all pending for completion commands if a driver only state + * transition has been requested. + */ + if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) { + o->pending = 0; + o->next_state = BNX2X_F_STATE_MAX; + } + + /* + * Don't allow a next state transition if we are in the middle of + * the previous one. + */ + if (o->pending) + return -EBUSY; + + switch (state) { + case BNX2X_F_STATE_RESET: + if (cmd == BNX2X_F_CMD_HW_INIT) + next_state = BNX2X_F_STATE_INITIALIZED; + + break; + case BNX2X_F_STATE_INITIALIZED: + if (cmd == BNX2X_F_CMD_START) + next_state = BNX2X_F_STATE_STARTED; + + else if (cmd == BNX2X_F_CMD_HW_RESET) + next_state = BNX2X_F_STATE_RESET; + + break; + case BNX2X_F_STATE_STARTED: + if (cmd == BNX2X_F_CMD_STOP) + next_state = BNX2X_F_STATE_INITIALIZED; + /* afex ramrods can be sent only in started mode, and only + * if not pending for function_stop ramrod completion + * for these events - next state remained STARTED. + */ + else if ((cmd == BNX2X_F_CMD_AFEX_UPDATE) && + (!test_bit(BNX2X_F_CMD_STOP, &o->pending))) + next_state = BNX2X_F_STATE_STARTED; + + else if ((cmd == BNX2X_F_CMD_AFEX_VIFLISTS) && + (!test_bit(BNX2X_F_CMD_STOP, &o->pending))) + next_state = BNX2X_F_STATE_STARTED; + else if (cmd == BNX2X_F_CMD_TX_STOP) + next_state = BNX2X_F_STATE_TX_STOPPED; + + break; + case BNX2X_F_STATE_TX_STOPPED: + if (cmd == BNX2X_F_CMD_TX_START) + next_state = BNX2X_F_STATE_STARTED; + + break; + default: + BNX2X_ERR("Unknown state: %d\n", state); + } + + /* Transition is assured */ + if (next_state != BNX2X_F_STATE_MAX) { + DP(BNX2X_MSG_SP, "Good function state transition: %d(%d)->%d\n", + state, cmd, next_state); + o->next_state = next_state; + return 0; + } + + DP(BNX2X_MSG_SP, "Bad function state transition request: %d %d\n", + state, cmd); + + return -EINVAL; +} + +/** + * bnx2x_func_init_func - performs HW init at function stage + * + * @bp: device handle + * @drv: + * + * Init HW when the current phase is + * FW_MSG_CODE_DRV_LOAD_FUNCTION: initialize only FUNCTION-only + * HW blocks. + */ +static inline int bnx2x_func_init_func(struct bnx2x *bp, + const struct bnx2x_func_sp_drv_ops *drv) +{ + return drv->init_hw_func(bp); +} + +/** + * bnx2x_func_init_port - performs HW init at port stage + * + * @bp: device handle + * @drv: + * + * Init HW when the current phase is + * FW_MSG_CODE_DRV_LOAD_PORT: initialize PORT-only and + * FUNCTION-only HW blocks. + * + */ +static inline int bnx2x_func_init_port(struct bnx2x *bp, + const struct bnx2x_func_sp_drv_ops *drv) +{ + int rc = drv->init_hw_port(bp); + if (rc) + return rc; + + return bnx2x_func_init_func(bp, drv); +} + +/** + * bnx2x_func_init_cmn_chip - performs HW init at chip-common stage + * + * @bp: device handle + * @drv: + * + * Init HW when the current phase is + * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP: initialize COMMON_CHIP, + * PORT-only and FUNCTION-only HW blocks. + */ +static inline int bnx2x_func_init_cmn_chip(struct bnx2x *bp, + const struct bnx2x_func_sp_drv_ops *drv) +{ + int rc = drv->init_hw_cmn_chip(bp); + if (rc) + return rc; + + return bnx2x_func_init_port(bp, drv); +} + +/** + * bnx2x_func_init_cmn - performs HW init at common stage + * + * @bp: device handle + * @drv: + * + * Init HW when the current phase is + * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP: initialize COMMON, + * PORT-only and FUNCTION-only HW blocks. + */ +static inline int bnx2x_func_init_cmn(struct bnx2x *bp, + const struct bnx2x_func_sp_drv_ops *drv) +{ + int rc = drv->init_hw_cmn(bp); + if (rc) + return rc; + + return bnx2x_func_init_port(bp, drv); +} + +static int bnx2x_func_hw_init(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + u32 load_code = params->params.hw_init.load_phase; + struct bnx2x_func_sp_obj *o = params->f_obj; + const struct bnx2x_func_sp_drv_ops *drv = o->drv; + int rc = 0; + + DP(BNX2X_MSG_SP, "function %d load_code %x\n", + BP_ABS_FUNC(bp), load_code); + + /* Prepare buffers for unzipping the FW */ + rc = drv->gunzip_init(bp); + if (rc) + return rc; + + /* Prepare FW */ + rc = drv->init_fw(bp); + if (rc) { + BNX2X_ERR("Error loading firmware\n"); + goto init_err; + } + + /* Handle the beginning of COMMON_XXX pases separatelly... */ + switch (load_code) { + case FW_MSG_CODE_DRV_LOAD_COMMON_CHIP: + rc = bnx2x_func_init_cmn_chip(bp, drv); + if (rc) + goto init_err; + + break; + case FW_MSG_CODE_DRV_LOAD_COMMON: + rc = bnx2x_func_init_cmn(bp, drv); + if (rc) + goto init_err; + + break; + case FW_MSG_CODE_DRV_LOAD_PORT: + rc = bnx2x_func_init_port(bp, drv); + if (rc) + goto init_err; + + break; + case FW_MSG_CODE_DRV_LOAD_FUNCTION: + rc = bnx2x_func_init_func(bp, drv); + if (rc) + goto init_err; + + break; + default: + BNX2X_ERR("Unknown load_code (0x%x) from MCP\n", load_code); + rc = -EINVAL; + } + +init_err: + drv->gunzip_end(bp); + + /* In case of success, complete the comand immediatelly: no ramrods + * have been sent. + */ + if (!rc) + o->complete_cmd(bp, o, BNX2X_F_CMD_HW_INIT); + + return rc; +} + +/** + * bnx2x_func_reset_func - reset HW at function stage + * + * @bp: device handle + * @drv: + * + * Reset HW at FW_MSG_CODE_DRV_UNLOAD_FUNCTION stage: reset only + * FUNCTION-only HW blocks. + */ +static inline void bnx2x_func_reset_func(struct bnx2x *bp, + const struct bnx2x_func_sp_drv_ops *drv) +{ + drv->reset_hw_func(bp); +} + +/** + * bnx2x_func_reset_port - reser HW at port stage + * + * @bp: device handle + * @drv: + * + * Reset HW at FW_MSG_CODE_DRV_UNLOAD_PORT stage: reset + * FUNCTION-only and PORT-only HW blocks. + * + * !!!IMPORTANT!!! + * + * It's important to call reset_port before reset_func() as the last thing + * reset_func does is pf_disable() thus disabling PGLUE_B, which + * makes impossible any DMAE transactions. + */ +static inline void bnx2x_func_reset_port(struct bnx2x *bp, + const struct bnx2x_func_sp_drv_ops *drv) +{ + drv->reset_hw_port(bp); + bnx2x_func_reset_func(bp, drv); +} + +/** + * bnx2x_func_reset_cmn - reser HW at common stage + * + * @bp: device handle + * @drv: + * + * Reset HW at FW_MSG_CODE_DRV_UNLOAD_COMMON and + * FW_MSG_CODE_DRV_UNLOAD_COMMON_CHIP stages: reset COMMON, + * COMMON_CHIP, FUNCTION-only and PORT-only HW blocks. + */ +static inline void bnx2x_func_reset_cmn(struct bnx2x *bp, + const struct bnx2x_func_sp_drv_ops *drv) +{ + bnx2x_func_reset_port(bp, drv); + drv->reset_hw_cmn(bp); +} + + +static inline int bnx2x_func_hw_reset(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + u32 reset_phase = params->params.hw_reset.reset_phase; + struct bnx2x_func_sp_obj *o = params->f_obj; + const struct bnx2x_func_sp_drv_ops *drv = o->drv; + + DP(BNX2X_MSG_SP, "function %d reset_phase %x\n", BP_ABS_FUNC(bp), + reset_phase); + + switch (reset_phase) { + case FW_MSG_CODE_DRV_UNLOAD_COMMON: + bnx2x_func_reset_cmn(bp, drv); + break; + case FW_MSG_CODE_DRV_UNLOAD_PORT: + bnx2x_func_reset_port(bp, drv); + break; + case FW_MSG_CODE_DRV_UNLOAD_FUNCTION: + bnx2x_func_reset_func(bp, drv); + break; + default: + BNX2X_ERR("Unknown reset_phase (0x%x) from MCP\n", + reset_phase); + break; + } + + /* Complete the comand immediatelly: no ramrods have been sent. */ + o->complete_cmd(bp, o, BNX2X_F_CMD_HW_RESET); + + return 0; +} + +static inline int bnx2x_func_send_start(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + struct bnx2x_func_sp_obj *o = params->f_obj; + struct function_start_data *rdata = + (struct function_start_data *)o->rdata; + dma_addr_t data_mapping = o->rdata_mapping; + struct bnx2x_func_start_params *start_params = ¶ms->params.start; + + memset(rdata, 0, sizeof(*rdata)); + + /* Fill the ramrod data with provided parameters */ + rdata->function_mode = cpu_to_le16(start_params->mf_mode); + rdata->sd_vlan_tag = cpu_to_le16(start_params->sd_vlan_tag); + rdata->path_id = BP_PATH(bp); + rdata->network_cos_mode = start_params->network_cos_mode; + + /* + * No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_START, 0, + U64_HI(data_mapping), + U64_LO(data_mapping), NONE_CONNECTION_TYPE); +} + +static inline int bnx2x_func_send_afex_update(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + struct bnx2x_func_sp_obj *o = params->f_obj; + struct function_update_data *rdata = + (struct function_update_data *)o->afex_rdata; + dma_addr_t data_mapping = o->afex_rdata_mapping; + struct bnx2x_func_afex_update_params *afex_update_params = + ¶ms->params.afex_update; + + memset(rdata, 0, sizeof(*rdata)); + + /* Fill the ramrod data with provided parameters */ + rdata->vif_id_change_flg = 1; + rdata->vif_id = cpu_to_le16(afex_update_params->vif_id); + rdata->afex_default_vlan_change_flg = 1; + rdata->afex_default_vlan = + cpu_to_le16(afex_update_params->afex_default_vlan); + rdata->allowed_priorities_change_flg = 1; + rdata->allowed_priorities = afex_update_params->allowed_priorities; + + /* No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + DP(BNX2X_MSG_SP, + "afex: sending func_update vif_id 0x%x dvlan 0x%x prio 0x%x\n", + rdata->vif_id, + rdata->afex_default_vlan, rdata->allowed_priorities); + + return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_UPDATE, 0, + U64_HI(data_mapping), + U64_LO(data_mapping), NONE_CONNECTION_TYPE); +} + +static +inline int bnx2x_func_send_afex_viflists(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + struct bnx2x_func_sp_obj *o = params->f_obj; + struct afex_vif_list_ramrod_data *rdata = + (struct afex_vif_list_ramrod_data *)o->afex_rdata; + struct bnx2x_func_afex_viflists_params *afex_viflist_params = + ¶ms->params.afex_viflists; + u64 *p_rdata = (u64 *)rdata; + + memset(rdata, 0, sizeof(*rdata)); + + /* Fill the ramrod data with provided parameters */ + rdata->vif_list_index = afex_viflist_params->vif_list_index; + rdata->func_bit_map = afex_viflist_params->func_bit_map; + rdata->afex_vif_list_command = afex_viflist_params->afex_vif_list_command; + rdata->func_to_clear = afex_viflist_params->func_to_clear; + + /* send in echo type of sub command */ + rdata->echo = afex_viflist_params->afex_vif_list_command; + + /* No need for an explicit memory barrier here as long we would + * need to ensure the ordering of writing to the SPQ element + * and updating of the SPQ producer which involves a memory + * read and we will have to put a full memory barrier there + * (inside bnx2x_sp_post()). + */ + + DP(BNX2X_MSG_SP, "afex: ramrod lists, cmd 0x%x index 0x%x func_bit_map 0x%x func_to_clr 0x%x\n", + rdata->afex_vif_list_command, rdata->vif_list_index, + rdata->func_bit_map, rdata->func_to_clear); + + /* this ramrod sends data directly and not through DMA mapping */ + return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_AFEX_VIF_LISTS, 0, + U64_HI(*p_rdata), U64_LO(*p_rdata), + NONE_CONNECTION_TYPE); +} + +static inline int bnx2x_func_send_stop(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_STOP, 0, 0, 0, + NONE_CONNECTION_TYPE); +} + +static inline int bnx2x_func_send_tx_stop(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STOP_TRAFFIC, 0, 0, 0, + NONE_CONNECTION_TYPE); +} +static inline int bnx2x_func_send_tx_start(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + struct bnx2x_func_sp_obj *o = params->f_obj; + struct flow_control_configuration *rdata = + (struct flow_control_configuration *)o->rdata; + dma_addr_t data_mapping = o->rdata_mapping; + struct bnx2x_func_tx_start_params *tx_start_params = + ¶ms->params.tx_start; + int i; + + memset(rdata, 0, sizeof(*rdata)); + + rdata->dcb_enabled = tx_start_params->dcb_enabled; + rdata->dcb_version = tx_start_params->dcb_version; + rdata->dont_add_pri_0_en = tx_start_params->dont_add_pri_0_en; + + for (i = 0; i < ARRAY_SIZE(rdata->traffic_type_to_priority_cos); i++) + rdata->traffic_type_to_priority_cos[i] = + tx_start_params->traffic_type_to_priority_cos[i]; + + return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_START_TRAFFIC, 0, + U64_HI(data_mapping), + U64_LO(data_mapping), NONE_CONNECTION_TYPE); +} + +static int bnx2x_func_send_cmd(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + switch (params->cmd) { + case BNX2X_F_CMD_HW_INIT: + return bnx2x_func_hw_init(bp, params); + case BNX2X_F_CMD_START: + return bnx2x_func_send_start(bp, params); + case BNX2X_F_CMD_STOP: + return bnx2x_func_send_stop(bp, params); + case BNX2X_F_CMD_HW_RESET: + return bnx2x_func_hw_reset(bp, params); + case BNX2X_F_CMD_AFEX_UPDATE: + return bnx2x_func_send_afex_update(bp, params); + case BNX2X_F_CMD_AFEX_VIFLISTS: + return bnx2x_func_send_afex_viflists(bp, params); + case BNX2X_F_CMD_TX_STOP: + return bnx2x_func_send_tx_stop(bp, params); + case BNX2X_F_CMD_TX_START: + return bnx2x_func_send_tx_start(bp, params); + default: + BNX2X_ERR("Unknown command: %d\n", params->cmd); + return -EINVAL; + } +} + +void bnx2x_init_func_obj(struct bnx2x *bp, + struct bnx2x_func_sp_obj *obj, + void *rdata, dma_addr_t rdata_mapping, + void *afex_rdata, dma_addr_t afex_rdata_mapping, + struct bnx2x_func_sp_drv_ops *drv_iface) +{ + memset(obj, 0, sizeof(*obj)); + + mutex_init(&obj->one_pending_mutex); + + obj->rdata = rdata; + obj->rdata_mapping = rdata_mapping; + obj->afex_rdata = afex_rdata; + obj->afex_rdata_mapping = afex_rdata_mapping; + obj->send_cmd = bnx2x_func_send_cmd; + obj->check_transition = bnx2x_func_chk_transition; + obj->complete_cmd = bnx2x_func_comp_cmd; + obj->wait_comp = bnx2x_func_wait_comp; + obj->drv = drv_iface; +} + +/** + * bnx2x_func_state_change - perform Function state change transition + * + * @bp: device handle + * @params: parameters to perform the transaction + * + * returns 0 in case of successfully completed transition, + * negative error code in case of failure, positive + * (EBUSY) value if there is a completion to that is + * still pending (possible only if RAMROD_COMP_WAIT is + * not set in params->ramrod_flags for asynchronous + * commands). + */ +int bnx2x_func_state_change(struct bnx2x *bp, + struct bnx2x_func_state_params *params) +{ + struct bnx2x_func_sp_obj *o = params->f_obj; + int rc; + enum bnx2x_func_cmd cmd = params->cmd; + unsigned long *pending = &o->pending; + + mutex_lock(&o->one_pending_mutex); + + /* Check that the requested transition is legal */ + if (o->check_transition(bp, o, params)) { + mutex_unlock(&o->one_pending_mutex); + return -EINVAL; + } + + /* Set "pending" bit */ + set_bit(cmd, pending); + + /* Don't send a command if only driver cleanup was requested */ + if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) { + bnx2x_func_state_change_comp(bp, o, cmd); + mutex_unlock(&o->one_pending_mutex); + } else { + /* Send a ramrod */ + rc = o->send_cmd(bp, params); + + mutex_unlock(&o->one_pending_mutex); + + if (rc) { + o->next_state = BNX2X_F_STATE_MAX; + clear_bit(cmd, pending); + smp_mb__after_clear_bit(); + return rc; + } + + if (test_bit(RAMROD_COMP_WAIT, ¶ms->ramrod_flags)) { + rc = o->wait_comp(bp, o, cmd); + if (rc) + return rc; + + return 0; + } + } + + return !!test_bit(cmd, pending); +} diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp.h new file mode 100644 index 0000000..91fd6cc --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp.h @@ -0,0 +1,1383 @@ +/* bnx2x_sp.h: Broadcom Everest network driver. + * + * Copyright 2011-2012 Broadcom Corporation + * + * Unless you and Broadcom execute a separate written software license + * agreement governing use of this software, this software is licensed to you + * under the terms of the GNU General Public License version 2, available + * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). + * + * Notwithstanding the above, under no circumstances may you combine this + * software in any way with any other Broadcom software provided under a + * license other than the GPL, without Broadcom's express prior written + * consent. + * + * Maintained by: Eilon Greenstein + * Written by: Vladislav Zolotarov + * + */ +#ifndef BNX2X_SP_VERBS +#define BNX2X_SP_VERBS + + +struct bnx2x; +struct eth_context; + +/* Bits representing general command's configuration */ +enum { + RAMROD_TX, + RAMROD_RX, + /* Wait until all pending commands complete */ + RAMROD_COMP_WAIT, + /* Don't send a ramrod, only update a registry */ + RAMROD_DRV_CLR_ONLY, + /* Configure HW according to the current object state */ + RAMROD_RESTORE, + /* Execute the next command now */ + RAMROD_EXEC, + /* + * Don't add a new command and continue execution of posponed + * commands. If not set a new command will be added to the + * pending commands list. + */ + RAMROD_CONT, +}; + +typedef enum { + BNX2X_OBJ_TYPE_RX, + BNX2X_OBJ_TYPE_TX, + BNX2X_OBJ_TYPE_RX_TX, +} bnx2x_obj_type; + +/* Public slow path states */ +enum { + BNX2X_FILTER_MAC_PENDING, + BNX2X_FILTER_VLAN_PENDING, + BNX2X_FILTER_VLAN_MAC_PENDING, + BNX2X_FILTER_RX_MODE_PENDING, + BNX2X_FILTER_RX_MODE_SCHED, + BNX2X_FILTER_ISCSI_ETH_START_SCHED, + BNX2X_FILTER_ISCSI_ETH_STOP_SCHED, + BNX2X_FILTER_FCOE_ETH_START_SCHED, + BNX2X_FILTER_FCOE_ETH_STOP_SCHED, +#ifdef BNX2X_CHAR_DEV /* ! BNX2X_UPSTREAM */ + BNX2X_FILTER_BYPASS_RX_MODE_PENDING, + BNX2X_FILTER_BYPASS_MAC_PENDING, + BNX2X_FILTER_BYPASS_RSS_CONF_PENDING, +#endif + BNX2X_FILTER_MCAST_PENDING, + BNX2X_FILTER_MCAST_SCHED, + BNX2X_FILTER_RSS_CONF_PENDING, + BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, + BNX2X_AFEX_PENDING_VIFSET_MCP_ACK +}; + +struct bnx2x_raw_obj { + u8 func_id; + + /* Queue params */ + u8 cl_id; + u32 cid; + + /* Ramrod data buffer params */ + void *rdata; + dma_addr_t rdata_mapping; + + /* Ramrod state params */ + int state; /* "ramrod is pending" state bit */ + unsigned long *pstate; /* pointer to state buffer */ + + bnx2x_obj_type obj_type; + + int (*wait_comp)(struct bnx2x *bp, + struct bnx2x_raw_obj *o); + + bool (*check_pending)(struct bnx2x_raw_obj *o); + void (*clear_pending)(struct bnx2x_raw_obj *o); + void (*set_pending)(struct bnx2x_raw_obj *o); +}; + +/************************* VLAN-MAC commands related parameters ***************/ +struct bnx2x_mac_ramrod_data { + u8 mac[ETH_ALEN]; +}; + +struct bnx2x_vlan_ramrod_data { + u16 vlan; +}; + +struct bnx2x_vlan_mac_ramrod_data { + u8 mac[ETH_ALEN]; + u16 vlan; +}; + +union bnx2x_classification_ramrod_data { + struct bnx2x_mac_ramrod_data mac; + struct bnx2x_vlan_ramrod_data vlan; + struct bnx2x_vlan_mac_ramrod_data vlan_mac; +}; + +/* VLAN_MAC commands */ +enum bnx2x_vlan_mac_cmd { + BNX2X_VLAN_MAC_ADD, + BNX2X_VLAN_MAC_DEL, + BNX2X_VLAN_MAC_MOVE, +}; + +struct bnx2x_vlan_mac_data { + /* Requested command: BNX2X_VLAN_MAC_XX */ + enum bnx2x_vlan_mac_cmd cmd; + /* + * used to contain the data related vlan_mac_flags bits from + * ramrod parameters. + */ + unsigned long vlan_mac_flags; + + /* Needed for MOVE command */ + struct bnx2x_vlan_mac_obj *target_obj; + + union bnx2x_classification_ramrod_data u; +}; + +/*************************** Exe Queue obj ************************************/ +union bnx2x_exe_queue_cmd_data { + struct bnx2x_vlan_mac_data vlan_mac; + + struct { + /* TODO */ + } mcast; +}; + +struct bnx2x_exeq_elem { + struct list_head link; + + /* Length of this element in the exe_chunk. */ + int cmd_len; + + union bnx2x_exe_queue_cmd_data cmd_data; +}; + +union bnx2x_qable_obj; + +union bnx2x_exeq_comp_elem { + union event_ring_elem *elem; +}; + +struct bnx2x_exe_queue_obj; + +typedef int (*exe_q_validate)(struct bnx2x *bp, + union bnx2x_qable_obj *o, + struct bnx2x_exeq_elem *elem); + +typedef int (*exe_q_remove)(struct bnx2x *bp, + union bnx2x_qable_obj *o, + struct bnx2x_exeq_elem *elem); + +/** + * @return positive is entry was optimized, 0 - if not, negative + * in case of an error. + */ +typedef int (*exe_q_optimize)(struct bnx2x *bp, + union bnx2x_qable_obj *o, + struct bnx2x_exeq_elem *elem); +typedef int (*exe_q_execute)(struct bnx2x *bp, + union bnx2x_qable_obj *o, + struct list_head *exe_chunk, + unsigned long *ramrod_flags); +typedef struct bnx2x_exeq_elem * + (*exe_q_get)(struct bnx2x_exe_queue_obj *o, + struct bnx2x_exeq_elem *elem); + +struct bnx2x_exe_queue_obj { + /* + * Commands pending for an execution. + */ + struct list_head exe_queue; + + /* + * Commands pending for an completion. + */ + struct list_head pending_comp; + + spinlock_t lock; + + /* Maximum length of commands' list for one execution */ + int exe_chunk_len; + + union bnx2x_qable_obj *owner; + + /****** Virtual functions ******/ + /** + * Called before commands execution for commands that are really + * going to be executed (after 'optimize'). + * + * Must run under exe_queue->lock + */ + exe_q_validate validate; + + /** + * Called before removing pending commands, cleaning allocated + * resources (e.g., credits from validate) + */ + exe_q_remove remove; + + /** + * This will try to cancel the current pending commands list + * considering the new command. + * + * Returns the number of optimized commands or a negative error code + * + * Must run under exe_queue->lock + */ + exe_q_optimize optimize; + + /** + * Run the next commands chunk (owner specific). + */ + exe_q_execute execute; + + /** + * Return the exe_queue element containing the specific command + * if any. Otherwise return NULL. + */ + exe_q_get get; +}; +/***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/ +/* + * Element in the VLAN_MAC registry list having all currenty configured + * rules. + */ +struct bnx2x_vlan_mac_registry_elem { + struct list_head link; + + /* + * Used to store the cam offset used for the mac/vlan/vlan-mac. + * Relevant for 57710 and 57711 only. VLANs and MACs share the + * same CAM for these chips. + */ + int cam_offset; + + /* Needed for DEL and RESTORE flows */ + unsigned long vlan_mac_flags; + + union bnx2x_classification_ramrod_data u; +}; + +/* Bits representing VLAN_MAC commands specific flags */ +enum { + BNX2X_UC_LIST_MAC, + BNX2X_ETH_MAC, + BNX2X_ISCSI_ETH_MAC, + BNX2X_NETQ_ETH_MAC, + BNX2X_DONT_CONSUME_CAM_CREDIT, + BNX2X_DONT_CONSUME_CAM_CREDIT_DEST, +}; + +struct bnx2x_vlan_mac_ramrod_params { + /* Object to run the command from */ + struct bnx2x_vlan_mac_obj *vlan_mac_obj; + + /* General command flags: COMP_WAIT, etc. */ + unsigned long ramrod_flags; + + /* Command specific configuration request */ + struct bnx2x_vlan_mac_data user_req; +}; + +struct bnx2x_vlan_mac_obj { + struct bnx2x_raw_obj raw; + + /* Bookkeeping list: will prevent the addition of already existing + * entries. + */ + struct list_head head; + + /* Execution queue interface instance */ + struct bnx2x_exe_queue_obj exe_queue; + + /* MACs credit pool */ + struct bnx2x_credit_pool_obj *macs_pool; + + /* VLANs credit pool */ + struct bnx2x_credit_pool_obj *vlans_pool; + + /* RAMROD command to be used */ + int ramrod_cmd; + + /** + * copy first n elements onto preallocated buffer + * + * @param n number of elements to get + * @param buf buffer preallocated by caller into which elements + * will be copied. Note elements are 4-byte aligned + * so buffer size must be able to accomodate the + * aligned elements. + * + * @return number of copied bytes + */ + + int (*get_n_elements)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o, + int n, u8 *buf); + + /** + * Checks if ADD-ramrod with the given params may be performed. + * + * @return zero if the element may be added + */ + + int (*check_add)(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union bnx2x_classification_ramrod_data *data); + + /** + * Checks if DEL-ramrod with the given params may be performed. + * + * @return true if the element may be deleted + */ + struct bnx2x_vlan_mac_registry_elem * + (*check_del)(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + union bnx2x_classification_ramrod_data *data); + + /** + * Checks if DEL-ramrod with the given params may be performed. + * + * @return true if the element may be deleted + */ + bool (*check_move)(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *src_o, + struct bnx2x_vlan_mac_obj *dst_o, + union bnx2x_classification_ramrod_data *data); + + /** + * Update the relevant credit object(s) (consume/return + * correspondingly). + */ + bool (*get_credit)(struct bnx2x_vlan_mac_obj *o); + bool (*put_credit)(struct bnx2x_vlan_mac_obj *o); + bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset); + bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset); + + /** + * Configures one rule in the ramrod data buffer. + */ + void (*set_one_rule)(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + struct bnx2x_exeq_elem *elem, int rule_idx, + int cam_offset); + + /** + * Delete all configured elements having the given + * vlan_mac_flags specification. Assumes no pending for + * execution commands. Will schedule all all currently + * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags + * specification for deletion and will use the given + * ramrod_flags for the last DEL operation. + * + * @param bp + * @param o + * @param ramrod_flags RAMROD_XX flags + * + * @return 0 if the last operation has completed successfully + * and there are no more elements left, positive value + * if there are pending for completion commands, + * negative value in case of failure. + */ + int (*delete_all)(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *o, + unsigned long *vlan_mac_flags, + unsigned long *ramrod_flags); + + /** + * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously + * configured elements list. + * + * @param bp + * @param p Command parameters (RAMROD_COMP_WAIT bit in + * ramrod_flags is only taken into an account) + * @param ppos a pointer to the cooky that should be given back in the + * next call to make function handle the next element. If + * *ppos is set to NULL it will restart the iterator. + * If returned *ppos == NULL this means that the last + * element has been handled. + * + * @return int + */ + int (*restore)(struct bnx2x *bp, + struct bnx2x_vlan_mac_ramrod_params *p, + struct bnx2x_vlan_mac_registry_elem **ppos); + + /** + * Should be called on a completion arival. + * + * @param bp + * @param o + * @param cqe Completion element we are handling + * @param ramrod_flags if RAMROD_CONT is set the next bulk of + * pending commands will be executed. + * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE + * may also be set if needed. + * + * @return 0 if there are neither pending nor waiting for + * completion commands. Positive value if there are + * pending for execution or for completion commands. + * Negative value in case of an error (including an + * error in the cqe). + */ + int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o, + union event_ring_elem *cqe, + unsigned long *ramrod_flags); + + /** + * Wait for completion of all commands. Don't schedule new ones, + * just wait. It assumes that the completion code will schedule + * for new commands. + */ + int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o); +}; + +enum { + BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0, + BNX2X_LLH_CAM_ETH_LINE, + BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2 +}; + +void bnx2x_set_mac_in_nig(struct bnx2x *bp, + bool add, unsigned char *dev_addr, int index); + +/** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */ + +/* RX_MODE ramrod spesial flags: set in rx_mode_flags field in + * a bnx2x_rx_mode_ramrod_params. + */ +enum { + BNX2X_RX_MODE_FCOE_ETH, + BNX2X_RX_MODE_ISCSI_ETH, +}; + +enum { + BNX2X_ACCEPT_UNICAST, + BNX2X_ACCEPT_MULTICAST, + BNX2X_ACCEPT_ALL_UNICAST, + BNX2X_ACCEPT_ALL_MULTICAST, + BNX2X_ACCEPT_BROADCAST, + BNX2X_ACCEPT_UNMATCHED, + BNX2X_ACCEPT_ANY_VLAN +}; + +struct bnx2x_rx_mode_ramrod_params { + struct bnx2x_rx_mode_obj *rx_mode_obj; + unsigned long *pstate; + int state; + u8 cl_id; + u32 cid; + u8 func_id; + unsigned long ramrod_flags; + unsigned long rx_mode_flags; + + /* + * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to + * a tstorm_eth_mac_filter_config (e1x). + */ + void *rdata; + dma_addr_t rdata_mapping; + + /* Rx mode settings */ + unsigned long rx_accept_flags; + + /* internal switching settings */ + unsigned long tx_accept_flags; +}; + +struct bnx2x_rx_mode_obj { + int (*config_rx_mode)(struct bnx2x *bp, + struct bnx2x_rx_mode_ramrod_params *p); + + int (*wait_comp)(struct bnx2x *bp, + struct bnx2x_rx_mode_ramrod_params *p); +}; + +/********************** Set multicast group ***********************************/ + +struct bnx2x_mcast_list_elem { + struct list_head link; + u8 *mac; +}; + +union bnx2x_mcast_config_data { + u8 *mac; + u8 bin; /* used in a RESTORE flow */ +}; + +struct bnx2x_mcast_ramrod_params { + struct bnx2x_mcast_obj *mcast_obj; + + /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */ + unsigned long ramrod_flags; + + struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */ + /** TODO: + * - rename it to macs_num. + * - Add a new command type for handling pending commands + * (remove "zero semantics"). + * + * Length of mcast_list. If zero and ADD_CONT command - post + * pending commands. + */ + int mcast_list_len; +}; + +enum { + BNX2X_MCAST_CMD_ADD, + BNX2X_MCAST_CMD_CONT, + BNX2X_MCAST_CMD_DEL, + BNX2X_MCAST_CMD_RESTORE, +}; + +struct bnx2x_mcast_obj { + struct bnx2x_raw_obj raw; + + union { + struct { + #define BNX2X_MCAST_BINS_NUM 256 + #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64) + u64 vec[BNX2X_MCAST_VEC_SZ]; + + /** Number of BINs to clear. Should be updated + * immediately when a command arrives in order to + * properly create DEL commands. + */ + int num_bins_set; + } aprox_match; + + struct { + struct list_head macs; + int num_macs_set; + } exact_match; + } registry; + + /* Pending commands */ + struct list_head pending_cmds_head; + + /* A state that is set in raw.pstate, when there are pending commands */ + int sched_state; + + /* Maximal number of mcast MACs configured in one command */ + int max_cmd_len; + + /* Total number of currently pending MACs to configure: both + * in the pending commands list and in the current command. + */ + int total_pending_num; + + u8 engine_id; + + /** + * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above) + */ + int (*config_mcast)(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, int cmd); + + /** + * Fills the ramrod data during the RESTORE flow. + * + * @param bp + * @param o + * @param start_idx Registry index to start from + * @param rdata_idx Index in the ramrod data to start from + * + * @return -1 if we handled the whole registry or index of the last + * handled registry element. + */ + int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o, + int start_bin, int *rdata_idx); + + int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o, + struct bnx2x_mcast_ramrod_params *p, int cmd); + + void (*set_one_rule)(struct bnx2x *bp, + struct bnx2x_mcast_obj *o, int idx, + union bnx2x_mcast_config_data *cfg_data, int cmd); + + /** Checks if there are more mcast MACs to be set or a previous + * command is still pending. + */ + bool (*check_pending)(struct bnx2x_mcast_obj *o); + + /** + * Set/Clear/Check SCHEDULED state of the object + */ + void (*set_sched)(struct bnx2x_mcast_obj *o); + void (*clear_sched)(struct bnx2x_mcast_obj *o); + bool (*check_sched)(struct bnx2x_mcast_obj *o); + + /* Wait until all pending commands complete */ + int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o); + + /** + * Handle the internal object counters needed for proper + * commands handling. Checks that the provided parameters are + * feasible. + */ + int (*validate)(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, int cmd); + + /** + * Restore the values of internal counters in case of a failure. + */ + void (*revert)(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, + int old_num_bins); + + int (*get_registry_size)(struct bnx2x_mcast_obj *o); + void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n); +}; + +/*************************** Credit handling **********************************/ +struct bnx2x_credit_pool_obj { + + /* Current amount of credit in the pool */ + atomic_t credit; + + /* Maximum allowed credit. put() will check against it. */ + int pool_sz; + + /* + * Allocate a pool table statically. + * + * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272) + * + * The set bit in the table will mean that the entry is available. + */ +#define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64) + u64 pool_mirror[BNX2X_POOL_VEC_SIZE]; + + /* Base pool offset (initialized differently */ + int base_pool_offset; + + /** + * Get the next free pool entry. + * + * @return true if there was a free entry in the pool + */ + bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry); + + /** + * Return the entry back to the pool. + * + * @return true if entry is legal and has been successfully + * returned to the pool. + */ + bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry); + + /** + * Get the requested amount of credit from the pool. + * + * @param cnt Amount of requested credit + * @return true if the operation is successful + */ + bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt); + + /** + * Returns the credit to the pool. + * + * @param cnt Amount of credit to return + * @return true if the operation is successful + */ + bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt); + + /** + * Reads the current amount of credit. + */ + int (*check)(struct bnx2x_credit_pool_obj *o); +}; + +/*************************** RSS configuration ********************************/ +enum { + /* RSS_MODE bits are mutually exclusive */ + BNX2X_RSS_MODE_DISABLED, + BNX2X_RSS_MODE_REGULAR, + + BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */ + + BNX2X_RSS_IPV4, + BNX2X_RSS_IPV4_TCP, + BNX2X_RSS_IPV6, + BNX2X_RSS_IPV6_TCP, +}; + +struct bnx2x_config_rss_params { + struct bnx2x_rss_config_obj *rss_obj; + + /* may have RAMROD_COMP_WAIT set only */ + unsigned long ramrod_flags; + + /* BNX2X_RSS_X bits */ + unsigned long rss_flags; + + /* Number hash bits to take into an account */ + u8 rss_result_mask; + + /* Indirection table */ + u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE]; + + /* RSS hash values */ + u32 rss_key[10]; + + /* valid only iff BNX2X_RSS_UPDATE_TOE is set */ + u16 toe_rss_bitmap; +}; + +struct bnx2x_rss_config_obj { + struct bnx2x_raw_obj raw; + + /* RSS engine to use */ + u8 engine_id; + + /* Last configured indirection table */ + u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE]; + + int (*config_rss)(struct bnx2x *bp, + struct bnx2x_config_rss_params *p); +}; + +/*********************** Queue state update ***********************************/ + +/* UPDATE command options */ +enum { + BNX2X_Q_UPDATE_IN_VLAN_REM, + BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG, + BNX2X_Q_UPDATE_OUT_VLAN_REM, + BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG, + BNX2X_Q_UPDATE_ANTI_SPOOF, + BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG, + BNX2X_Q_UPDATE_ACTIVATE, + BNX2X_Q_UPDATE_ACTIVATE_CHNG, + BNX2X_Q_UPDATE_DEF_VLAN_EN, + BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG, + BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG, + BNX2X_Q_UPDATE_SILENT_VLAN_REM +}; + +/* Allowed Queue states */ +enum bnx2x_q_state { + BNX2X_Q_STATE_RESET, + BNX2X_Q_STATE_INITIALIZED, + BNX2X_Q_STATE_ACTIVE, + BNX2X_Q_STATE_MULTI_COS, + BNX2X_Q_STATE_MCOS_TERMINATED, + BNX2X_Q_STATE_INACTIVE, + BNX2X_Q_STATE_STOPPED, + BNX2X_Q_STATE_TERMINATED, + BNX2X_Q_STATE_FLRED, + BNX2X_Q_STATE_MAX, +}; + +/* Allowed commands */ +enum bnx2x_queue_cmd { + BNX2X_Q_CMD_INIT, + BNX2X_Q_CMD_SETUP, + BNX2X_Q_CMD_SETUP_TX_ONLY, + BNX2X_Q_CMD_DEACTIVATE, + BNX2X_Q_CMD_ACTIVATE, + BNX2X_Q_CMD_UPDATE, + BNX2X_Q_CMD_UPDATE_TPA, + BNX2X_Q_CMD_HALT, + BNX2X_Q_CMD_CFC_DEL, + BNX2X_Q_CMD_TERMINATE, + BNX2X_Q_CMD_EMPTY, + BNX2X_Q_CMD_MAX, +}; + +/* queue SETUP + INIT flags */ +enum { + BNX2X_Q_FLG_TPA, + BNX2X_Q_FLG_TPA_IPV6, + BNX2X_Q_FLG_TPA_GRO, + BNX2X_Q_FLG_STATS, +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ + BNX2X_Q_FLG_VMQUEUE_MODE, +#endif + BNX2X_Q_FLG_ZERO_STATS, + BNX2X_Q_FLG_ACTIVE, + BNX2X_Q_FLG_OV, + BNX2X_Q_FLG_VLAN, + BNX2X_Q_FLG_COS, + BNX2X_Q_FLG_HC, + BNX2X_Q_FLG_HC_EN, + BNX2X_Q_FLG_DHC, +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + BNX2X_Q_FLG_OOO, +#endif + BNX2X_Q_FLG_FCOE, + BNX2X_Q_FLG_LEADING_RSS, + BNX2X_Q_FLG_MCAST, + BNX2X_Q_FLG_DEF_VLAN, + BNX2X_Q_FLG_TX_SWITCH, + BNX2X_Q_FLG_TX_SEC, + BNX2X_Q_FLG_ANTI_SPOOF, + BNX2X_Q_FLG_SILENT_VLAN_REM, + BNX2X_Q_FLG_FORCE_DEFAULT_PRI +}; + +/* Queue type options: queue type may be a compination of below. */ +enum bnx2x_q_type { +#ifdef BCM_OOO /* ! BNX2X_UPSTREAM */ + BNX2X_Q_TYPE_FWD, +#endif + /** TODO: Consider moving both these flags into the init() + * ramrod params. + */ + BNX2X_Q_TYPE_HAS_RX, + BNX2X_Q_TYPE_HAS_TX, +}; + +#define BNX2X_PRIMARY_CID_INDEX 0 +#define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */ +#define BNX2X_MULTI_TX_COS_E2_E3A0 2 +#define BNX2X_MULTI_TX_COS_E3B0 3 +#define BNX2X_MULTI_TX_COS 3 /* Maximum possible */ + + +struct bnx2x_queue_init_params { + struct { + unsigned long flags; + u16 hc_rate; + u8 fw_sb_id; + u8 sb_cq_index; + } tx; + + struct { + unsigned long flags; + u16 hc_rate; + u8 fw_sb_id; + u8 sb_cq_index; + } rx; + + /* CID context in the host memory */ + struct eth_context *cxts[BNX2X_MULTI_TX_COS]; + + /* maximum number of cos supported by hardware */ + u8 max_cos; +}; + +struct bnx2x_queue_terminate_params { + /* index within the tx_only cids of this queue object */ + u8 cid_index; +}; + +struct bnx2x_queue_cfc_del_params { + /* index within the tx_only cids of this queue object */ + u8 cid_index; +}; + +struct bnx2x_queue_update_params { + unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */ + u16 def_vlan; + u16 silent_removal_value; + u16 silent_removal_mask; +/* index within the tx_only cids of this queue object */ + u8 cid_index; +}; + +struct rxq_pause_params { + u16 bd_th_lo; + u16 bd_th_hi; + u16 rcq_th_lo; + u16 rcq_th_hi; + u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */ + u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */ + u16 pri_map; +}; + +/* general */ +struct bnx2x_general_setup_params { + /* valid iff BNX2X_Q_FLG_STATS */ + u8 stat_id; + + u8 spcl_id; + u16 mtu; + u8 cos; +}; + +struct bnx2x_rxq_setup_params { + /* dma */ + dma_addr_t dscr_map; + dma_addr_t sge_map; + dma_addr_t rcq_map; + dma_addr_t rcq_np_map; + + u16 drop_flags; + u16 buf_sz; + u8 fw_sb_id; + u8 cl_qzone_id; + + /* valid iff BNX2X_Q_FLG_TPA */ + u16 tpa_agg_sz; + u16 sge_buf_sz; + u8 max_sges_pkt; + u8 max_tpa_queues; + u8 rss_engine_id; + + /* valid iff BNX2X_Q_FLG_MCAST */ + u8 mcast_engine_id; + + u8 cache_line_log; + + u8 sb_cq_index; + + /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */ + u16 silent_removal_value; + u16 silent_removal_mask; +}; + +struct bnx2x_txq_setup_params { + /* dma */ + dma_addr_t dscr_map; + + u8 fw_sb_id; + u8 sb_cq_index; + u8 cos; /* valid iff BNX2X_Q_FLG_COS */ + u16 traffic_type; + /* equals to the leading rss client id, used for TX classification*/ + u8 tss_leading_cl_id; + + /* valid iff BNX2X_Q_FLG_DEF_VLAN */ + u16 default_vlan; +}; + +struct bnx2x_queue_setup_params { + struct bnx2x_general_setup_params gen_params; + struct bnx2x_txq_setup_params txq_params; + struct bnx2x_rxq_setup_params rxq_params; + struct rxq_pause_params pause_params; + unsigned long flags; +}; + +struct bnx2x_queue_setup_tx_only_params { + struct bnx2x_general_setup_params gen_params; + struct bnx2x_txq_setup_params txq_params; + unsigned long flags; + /* index within the tx_only cids of this queue object */ + u8 cid_index; +}; + +struct bnx2x_queue_state_params { + struct bnx2x_queue_sp_obj *q_obj; + + /* Current command */ + enum bnx2x_queue_cmd cmd; + + /* may have RAMROD_COMP_WAIT set only */ + unsigned long ramrod_flags; + + /* Params according to the current command */ + union { + struct bnx2x_queue_update_params update; + struct bnx2x_queue_setup_params setup; + struct bnx2x_queue_init_params init; + struct bnx2x_queue_setup_tx_only_params tx_only; + struct bnx2x_queue_terminate_params terminate; + struct bnx2x_queue_cfc_del_params cfc_del; + } params; +}; + +struct bnx2x_viflist_params { + u8 echo_res; + u8 func_bit_map_res; +}; + +struct bnx2x_queue_sp_obj { + u32 cids[BNX2X_MULTI_TX_COS]; + u8 cl_id; + u8 func_id; + + /* + * number of traffic classes supported by queue. + * The primary connection of the queue suppotrs the first traffic + * class. Any further traffic class is suppoted by a tx-only + * connection. + * + * Therefore max_cos is also a number of valid entries in the cids + * array. + */ + u8 max_cos; + u8 num_tx_only, next_tx_only; + + enum bnx2x_q_state state, next_state; + + /* bits from enum bnx2x_q_type */ + unsigned long type; + + /* BNX2X_Q_CMD_XX bits. This object implements "one + * pending" paradigm but for debug and tracing purposes it's + * more convinient to have different bits for different + * commands. + */ + unsigned long pending; + + /* Buffer to use as a ramrod data and its mapping */ + void *rdata; + dma_addr_t rdata_mapping; + + /** + * Performs one state change according to the given parameters. + * + * @return 0 in case of success and negative value otherwise. + */ + int (*send_cmd)(struct bnx2x *bp, + struct bnx2x_queue_state_params *params); + + /** + * Sets the pending bit according to the requested transition. + */ + int (*set_pending)(struct bnx2x_queue_sp_obj *o, + struct bnx2x_queue_state_params *params); + + /** + * Checks that the requested state transition is legal. + */ + int (*check_transition)(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *o, + struct bnx2x_queue_state_params *params); + + /** + * Completes the pending command. + */ + int (*complete_cmd)(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *o, + enum bnx2x_queue_cmd); + + int (*wait_comp)(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *o, + enum bnx2x_queue_cmd cmd); +}; + +/********************** Function state update *********************************/ +/* Allowed Function states */ +enum bnx2x_func_state { + BNX2X_F_STATE_RESET, + BNX2X_F_STATE_INITIALIZED, + BNX2X_F_STATE_STARTED, + BNX2X_F_STATE_TX_STOPPED, + BNX2X_F_STATE_MAX, +}; + +/* Allowed Function commands */ +enum bnx2x_func_cmd { + BNX2X_F_CMD_HW_INIT, + BNX2X_F_CMD_START, + BNX2X_F_CMD_STOP, + BNX2X_F_CMD_HW_RESET, + BNX2X_F_CMD_AFEX_UPDATE, + BNX2X_F_CMD_AFEX_VIFLISTS, + BNX2X_F_CMD_TX_STOP, + BNX2X_F_CMD_TX_START, + BNX2X_F_CMD_MAX, +}; + +struct bnx2x_func_hw_init_params { + /* A load phase returned by MCP. + * + * May be: + * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP + * FW_MSG_CODE_DRV_LOAD_COMMON + * FW_MSG_CODE_DRV_LOAD_PORT + * FW_MSG_CODE_DRV_LOAD_FUNCTION + */ + u32 load_phase; +}; + +struct bnx2x_func_hw_reset_params { + /* A load phase returned by MCP. + * + * May be: + * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP + * FW_MSG_CODE_DRV_LOAD_COMMON + * FW_MSG_CODE_DRV_LOAD_PORT + * FW_MSG_CODE_DRV_LOAD_FUNCTION + */ + u32 reset_phase; +}; + +struct bnx2x_func_start_params { + /* Multi Function mode: + * - Single Function + * - Switch Dependent + * - Switch Independent + */ + u16 mf_mode; + + /* Switch Dependent mode outer VLAN tag */ + u16 sd_vlan_tag; + + /* Function cos mode */ + u8 network_cos_mode; +}; + +struct bnx2x_func_afex_update_params { + u16 vif_id; + u16 afex_default_vlan; + u8 allowed_priorities; +}; + +struct bnx2x_func_afex_viflists_params { + u16 vif_list_index; + u8 func_bit_map; + u8 afex_vif_list_command; + u8 func_to_clear; +}; +struct bnx2x_func_tx_start_params { + struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES]; + u8 dcb_enabled; + u8 dcb_version; + u8 dont_add_pri_0_en; +}; + +struct bnx2x_func_state_params { + struct bnx2x_func_sp_obj *f_obj; + + /* Current command */ + enum bnx2x_func_cmd cmd; + + /* may have RAMROD_COMP_WAIT set only */ + unsigned long ramrod_flags; + + /* Params according to the current command */ + union { + struct bnx2x_func_hw_init_params hw_init; + struct bnx2x_func_hw_reset_params hw_reset; + struct bnx2x_func_start_params start; + struct bnx2x_func_afex_update_params afex_update; + struct bnx2x_func_afex_viflists_params afex_viflists; + struct bnx2x_func_tx_start_params tx_start; + } params; +}; + +struct bnx2x_func_sp_drv_ops { + /* Init tool + runtime initialization: + * - Common Chip + * - Common (per Path) + * - Port + * - Function phases + */ + int (*init_hw_cmn_chip)(struct bnx2x *bp); + int (*init_hw_cmn)(struct bnx2x *bp); + int (*init_hw_port)(struct bnx2x *bp); + int (*init_hw_func)(struct bnx2x *bp); + + /* Reset Function HW: Common, Port, Function phases. */ + void (*reset_hw_cmn)(struct bnx2x *bp); + void (*reset_hw_port)(struct bnx2x *bp); + void (*reset_hw_func)(struct bnx2x *bp); + + /* Init/Free GUNZIP resources */ + int (*gunzip_init)(struct bnx2x *bp); + void (*gunzip_end)(struct bnx2x *bp); + + /* Prepare/Release FW resources */ + int (*init_fw)(struct bnx2x *bp); + void (*release_fw)(struct bnx2x *bp); +}; + +struct bnx2x_func_sp_obj { + enum bnx2x_func_state state, next_state; + + /* BNX2X_FUNC_CMD_XX bits. This object implements "one + * pending" paradigm but for debug and tracing purposes it's + * more convinient to have different bits for different + * commands. + */ + unsigned long pending; + + /* Buffer to use as a ramrod data and its mapping */ + void *rdata; + dma_addr_t rdata_mapping; + + /* Buffer to use as a afex ramrod data and its mapping. + * This can't be same rdata as above because afex ramrod requests + * can arrive to the object in parallel to other ramrod requests. + */ + void *afex_rdata; + dma_addr_t afex_rdata_mapping; + + /* this mutex validates that when pending flag is taken, the next + * ramrod to be sent will be the one set the pending bit + */ + struct mutex one_pending_mutex; + + /* Driver interface */ + struct bnx2x_func_sp_drv_ops *drv; + + /** + * Performs one state change according to the given parameters. + * + * @return 0 in case of success and negative value otherwise. + */ + int (*send_cmd)(struct bnx2x *bp, + struct bnx2x_func_state_params *params); + + /** + * Checks that the requested state transition is legal. + */ + int (*check_transition)(struct bnx2x *bp, + struct bnx2x_func_sp_obj *o, + struct bnx2x_func_state_params *params); + + /** + * Completes the pending command. + */ + int (*complete_cmd)(struct bnx2x *bp, + struct bnx2x_func_sp_obj *o, + enum bnx2x_func_cmd cmd); + + int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o, + enum bnx2x_func_cmd cmd); +}; + +/********************** Interfaces ********************************************/ +/* Queueable objects set */ +union bnx2x_qable_obj { + struct bnx2x_vlan_mac_obj vlan_mac; +}; +/************** Function state update *********/ +void bnx2x_init_func_obj(struct bnx2x *bp, + struct bnx2x_func_sp_obj *obj, + void *rdata, dma_addr_t rdata_mapping, + void *afex_rdata, dma_addr_t afex_rdata_mapping, + struct bnx2x_func_sp_drv_ops *drv_iface); + +int bnx2x_func_state_change(struct bnx2x *bp, + struct bnx2x_func_state_params *params); + +enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp, + struct bnx2x_func_sp_obj *o); +/******************* Queue State **************/ +void bnx2x_init_queue_obj(struct bnx2x *bp, + struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids, + u8 cid_cnt, u8 func_id, void *rdata, + dma_addr_t rdata_mapping, unsigned long type); + +int bnx2x_queue_state_change(struct bnx2x *bp, + struct bnx2x_queue_state_params *params); + +/********************* VLAN-MAC ****************/ +void bnx2x_init_mac_obj(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *mac_obj, + u8 cl_id, u32 cid, u8 func_id, void *rdata, + dma_addr_t rdata_mapping, int state, + unsigned long *pstate, bnx2x_obj_type type, + struct bnx2x_credit_pool_obj *macs_pool); + +void bnx2x_init_vlan_obj(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *vlan_obj, + u8 cl_id, u32 cid, u8 func_id, void *rdata, + dma_addr_t rdata_mapping, int state, + unsigned long *pstate, bnx2x_obj_type type, + struct bnx2x_credit_pool_obj *vlans_pool); + +void bnx2x_init_vlan_mac_obj(struct bnx2x *bp, + struct bnx2x_vlan_mac_obj *vlan_mac_obj, + u8 cl_id, u32 cid, u8 func_id, void *rdata, + dma_addr_t rdata_mapping, int state, + unsigned long *pstate, bnx2x_obj_type type, + struct bnx2x_credit_pool_obj *macs_pool, + struct bnx2x_credit_pool_obj *vlans_pool); + +int bnx2x_config_vlan_mac(struct bnx2x *bp, + struct bnx2x_vlan_mac_ramrod_params *p); + +int bnx2x_vlan_mac_move(struct bnx2x *bp, + struct bnx2x_vlan_mac_ramrod_params *p, + struct bnx2x_vlan_mac_obj *dest_o); + +/********************* RX MODE ****************/ + +void bnx2x_init_rx_mode_obj(struct bnx2x *bp, + struct bnx2x_rx_mode_obj *o); + +/** + * Send and RX_MODE ramrod according to the provided parameters. + * + * @param bp + * @param p Command parameters + * + * @return 0 - if operation was successfull and there is no pending completions, + * positive number - if there are pending completions, + * negative - if there were errors + */ +int bnx2x_config_rx_mode(struct bnx2x *bp, + struct bnx2x_rx_mode_ramrod_params *p); + +/****************** MULTICASTS ****************/ + +void bnx2x_init_mcast_obj(struct bnx2x *bp, + struct bnx2x_mcast_obj *mcast_obj, + u8 mcast_cl_id, u32 mcast_cid, u8 func_id, + u8 engine_id, void *rdata, dma_addr_t rdata_mapping, + int state, unsigned long *pstate, + bnx2x_obj_type type); + +/** + * Configure multicast MACs list. May configure a new list + * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up + * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current + * configuration, continue to execute the pending commands + * (BNX2X_MCAST_CMD_CONT). + * + * If previous command is still pending or if number of MACs to + * configure is more that maximum number of MACs in one command, + * the current command will be enqueued to the tail of the + * pending commands list. + * + * @param bp + * @param p + * @param command to execute: BNX2X_MCAST_CMD_X + * + * @return 0 is operation was sucessfull and there are no pending completions, + * negative if there were errors, positive if there are pending + * completions. + */ +int bnx2x_config_mcast(struct bnx2x *bp, + struct bnx2x_mcast_ramrod_params *p, int cmd); + +/****************** CREDIT POOL ****************/ +void bnx2x_init_mac_credit_pool(struct bnx2x *bp, + struct bnx2x_credit_pool_obj *p, u8 func_id, + u8 func_num); +void bnx2x_init_vlan_credit_pool(struct bnx2x *bp, + struct bnx2x_credit_pool_obj *p, u8 func_id, + u8 func_num); + + +/****************** RSS CONFIGURATION ****************/ +void bnx2x_init_rss_config_obj(struct bnx2x *bp, + struct bnx2x_rss_config_obj *rss_obj, + u8 cl_id, u32 cid, u8 func_id, u8 engine_id, + void *rdata, dma_addr_t rdata_mapping, + int state, unsigned long *pstate, + bnx2x_obj_type type); + +/** + * Updates RSS configuration according to provided parameters. + * + * @param bp + * @param p + * + * @return 0 in case of success + */ +int bnx2x_config_rss(struct bnx2x *bp, + struct bnx2x_config_rss_params *p); + +/** + * Return the current ind_table configuration. + * + * @param bp + * @param ind_table buffer to fill with the current indirection + * table content. Should be at least + * T_ETH_INDIRECTION_TABLE_SIZE bytes long. + */ +void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj, + u8 *ind_table); + +#endif /* BNX2X_SP_VERBS */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.c deleted file mode 100644 index 4d87831..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.c +++ /dev/null @@ -1,2473 +0,0 @@ -/* bnx2x_sp_verbs.c: Broadcom Everest network driver. - * - * Copyright 2010-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Maintained by: Eilon Greenstein - * - * Written by: Vladislav Zolotarov - */ -#include -#include -#include -#if (LINUX_VERSION_CODE >= 0x02061b) && !defined(BNX2X_DRIVER_DISK) && !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ -#include -#endif -#include "bnx2x.h" -#include "bnx2x_common.h" - -#if (LINUX_VERSION_CODE >= 0x02061b) /* BNX2X_UPSTREAM */ -#define BNX2X_MAC_FMT "%pM" -#define BNX2X_MAC_PRN_LIST(mac) (mac) -#else -#define BNX2X_MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" -#define BNX2X_MAC_PRN_LIST(mac) (mac)[0], (mac)[1], (mac)[2], (mac)[3], (mac)[4], (mac)[5] -#endif - -/************************** raw_obj functions *************************/ -static bool bnx2x_raw_check_pending(struct bnx2x_raw_obj *o) -{ - return test_bit(o->state, o->pstate); -} - -static void bnx2x_raw_clear_pending(struct bnx2x_raw_obj *o) -{ - smp_mb__before_clear_bit(); - clear_bit(o->state, o->pstate); - smp_mb__after_clear_bit(); -} - -static void bnx2x_raw_set_pending(struct bnx2x_raw_obj *o) -{ - smp_mb__before_clear_bit(); - set_bit(o->state, o->pstate); - smp_mb__after_clear_bit(); -} - -/** - * Waits until the given bit(state) is cleared in a state memory - * buffer - * - * @param bp - * @param state state which is to be cleared - * @param state_p state buffer - * - * @return int - */ -static inline int __state_wait(struct bnx2x *bp, int state, - unsigned long *pstate) -{ - /* can take a while if any port is running */ - int cnt = 5000; - - if (CHIP_REV_IS_EMUL(bp)) - cnt*=20; - - DP(NETIF_MSG_IFUP, "waiting for state to become %d\n", state); - - might_sleep(); - while (cnt--) { - if (!test_bit(state, pstate)) { -#ifdef BNX2X_STOP_ON_ERROR - DP(NETIF_MSG_IFUP, "exit (cnt %d)\n", 5000 - cnt); -#endif - return 0; - } - - msleep(1); - - if (bp->panic) - return -EIO; - } - - /* timeout! */ - BNX2X_ERR("timeout waiting for state %d\n", state); -#ifdef BNX2X_STOP_ON_ERROR - bnx2x_panic(); -#endif - - return -EBUSY; -} - -static int bnx2x_raw_wait(struct bnx2x *bp, struct bnx2x_raw_obj *raw) -{ - return __state_wait(bp, raw->state, raw->pstate); -} - -/***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/ -/* credit handling callbacks */ -static bool bnx2x_get_credit_mac(struct bnx2x_vlan_mac_obj *o) -{ - struct bnx2x_credit_pool_obj *mp = o->macs_pool; - - WARN_ON(!mp); - - return mp->get(mp, 1); -} - -static bool bnx2x_get_credit_vlan(struct bnx2x_vlan_mac_obj *o) -{ - struct bnx2x_credit_pool_obj *vp = o->vlans_pool; - - WARN_ON(!vp); - - return vp->get(vp, 1); -} - -static bool bnx2x_get_credit_vlan_mac(struct bnx2x_vlan_mac_obj *o) -{ - struct bnx2x_credit_pool_obj *mp = o->macs_pool; - struct bnx2x_credit_pool_obj *vp = o->vlans_pool; - - if (!mp->get(mp, 1)) - return false; - - if (!vp->get(vp, 1)) { - mp->put(mp, 1); - return false; - } - - return true; -} - -static bool bnx2x_put_credit_mac(struct bnx2x_vlan_mac_obj *o) -{ - struct bnx2x_credit_pool_obj *mp = o->macs_pool; - - return mp->put(mp, 1); -} - -static bool bnx2x_put_credit_vlan(struct bnx2x_vlan_mac_obj *o) -{ - struct bnx2x_credit_pool_obj *vp = o->vlans_pool; - - return vp->put(vp, 1); -} - -static bool bnx2x_put_credit_vlan_mac(struct bnx2x_vlan_mac_obj *o) -{ - struct bnx2x_credit_pool_obj *mp = o->macs_pool; - struct bnx2x_credit_pool_obj *vp = o->vlans_pool; - - if (!mp->put(mp, 1)) - return false; - - if (!vp->put(vp, 1)) { - mp->get(mp, 1); - return false; - } - - return true; -} - - -/* check_add() callbacks */ -static bool bnx2x_check_mac_add(struct bnx2x_vlan_mac_ramrod_params *p) -{ - struct bnx2x_list_elem *pos; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - - /* Check if a requested MAC already exists */ - list_for_each_entry(pos, &o->head, link) - if (!memcmp(p->data.mac.mac, pos->data.mac.mac, ETH_ALEN)) - return false; - - return true; -} - -static bool bnx2x_check_vlan_add(struct bnx2x_vlan_mac_ramrod_params *p) -{ - struct bnx2x_list_elem *pos; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - - list_for_each_entry(pos, &o->head, link) - if (p->data.vlan.vlan == pos->data.vlan.vlan) - return false; - - return true; -} - -static bool - bnx2x_check_vlan_mac_add(struct bnx2x_vlan_mac_ramrod_params *p) -{ - struct bnx2x_list_elem *pos; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - - list_for_each_entry(pos, &o->head, link) - if ((p->data.vlan_mac.vlan == pos->data.vlan_mac.vlan) && - (!memcmp(p->data.vlan_mac.mac, pos->data.vlan_mac.mac, - ETH_ALEN))) - return false; - - return true; -} - - -/* check_del() callbacks */ -static struct bnx2x_list_elem * - bnx2x_check_mac_del(struct bnx2x_vlan_mac_ramrod_params *p) -{ - struct bnx2x_list_elem *pos; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - - list_for_each_entry(pos, &o->head, link) - if (!memcmp(p->data.mac.mac, pos->data.mac.mac, ETH_ALEN)) - return pos; - - return NULL; -} - -static struct bnx2x_list_elem * - bnx2x_check_vlan_del(struct bnx2x_vlan_mac_ramrod_params *p) -{ - struct bnx2x_list_elem *pos; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - - list_for_each_entry(pos, &o->head, link) - if (p->data.vlan.vlan == pos->data.vlan.vlan) - return pos; - - return NULL; -} - -static struct bnx2x_list_elem * - bnx2x_check_vlan_mac_del(struct bnx2x_vlan_mac_ramrod_params *p) -{ - struct bnx2x_list_elem *pos; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - - list_for_each_entry(pos, &o->head, link) - if ((p->data.vlan_mac.vlan == pos->data.vlan_mac.vlan) && - (!memcmp(p->data.vlan_mac.mac, pos->data.vlan_mac.mac, - ETH_ALEN))) - return pos; - - return NULL; -} - -static inline u8 __vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o) -{ - struct bnx2x_raw_obj *raw = &o->raw; - u8 rx_tx_flag = 0; - - if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) || - (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) - rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_TX_CMD; - - if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) || - (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) - rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_RX_CMD; - - return rx_tx_flag; -} - -/* LLH CAM line allocations */ -enum { - LLH_CAM_ISCSI_ETH_LINE = 0, - LLH_CAM_ETH_LINE, - LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2 -}; - -static void bnx2x_set_mac_in_nig(struct bnx2x *bp, - int add, - unsigned char* dev_addr, - int index) -{ - u32 wb_data[2]; - u32 reg_offset = BP_PORT(bp)? NIG_REG_LLH1_FUNC_MEM : - NIG_REG_LLH0_FUNC_MEM; - - if (!IS_MF_SI(bp) || index > LLH_CAM_MAX_PF_LINE) - return; - - if (add) { - /* LLH_FUNC_MEM is a u64 WB register */ - reg_offset += 8*index; - - wb_data[0] = ((dev_addr[2] << 24) | (dev_addr[3] << 16) | - (dev_addr[4] << 8) | dev_addr[5]); - wb_data[1] = ((dev_addr[0] << 8) | dev_addr[1]); - - REG_WR_DMAE(bp, reg_offset, wb_data, 2); - } - - REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM_ENABLE : - NIG_REG_LLH0_FUNC_MEM_ENABLE ) + - 4*index, add); -} - -/* hw_config() callbacks */ -static int bnx2x_setup_mac_e2(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, - struct bnx2x_list_elem *pos, - bool add) -{ - struct bnx2x_raw_obj *raw = &p->vlan_mac_obj->raw; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - struct eth_classify_rules_ramrod_data *data = - (struct eth_classify_rules_ramrod_data *)(raw->rdata); - - /* Set LLH CAM entry: currently only iSCSI and ETH macs are - * relevant. In addition, current implementation is tuned for a - * single ETH MAC. - * - * When multiple unicast ETH MACs PF configuration in switch - * independent mode is required (NetQ, multiple netdev MACs, - * etc.), consider better utilisation of 8 per function MAC - * entries in the LLH register. There is also - * NIG_REG_P[01]_LLH_FUNC_MEM2 registers that complete the - * total number of CAM entries to 16. - */ - if (test_bit(BNX2X_ISCSI_ETH_MAC, &p->vlan_mac_flags)) - bnx2x_set_mac_in_nig(bp, add, p->data.mac.mac, - LLH_CAM_ISCSI_ETH_LINE); - else - bnx2x_set_mac_in_nig(bp, add, p->data.mac.mac, - LLH_CAM_ETH_LINE); - - /* Update a list element */ - memcpy(pos->data.mac.mac, p->data.mac.mac, ETH_ALEN); - - /* Reset the ramrod data buffer */ - memset(data, 0, sizeof(*data)); - - /* Setup ramrod data */ - data->header.echo = ((raw->cid & BNX2X_SWCID_MASK) | - (o->raw.state << BNX2X_SWCID_SHIFT)); - data->header.rule_cnt = 1; - - data->rules[0].mac.header.client_id = raw->cl_id; - data->rules[0].mac.header.func_id = raw->func_id; - - /* Rx or/and Tx (internal switching) MAC ? */ - data->rules[0].mac.header.cmd_general_data |= - __vlan_mac_get_rx_tx_flag(o); - - if (add) - data->rules[0].mac.header.cmd_general_data |= - ETH_CLASSIFY_CMD_HEADER_IS_ADD; - - DP(NETIF_MSG_IFUP, "About to %s MAC "BNX2X_MAC_FMT" for Client %d\n", - (add ? "add" : "delete"), BNX2X_MAC_PRN_LIST(p->data.mac.mac), - raw->cl_id); - - data->rules[0].mac.header.cmd_general_data |= - CLASSIFY_RULE_OPCODE_MAC; - - /* Set a MAC itself */ - data->rules[0].mac.mac_msb = swab16(*(u16 *)(&p->data.mac.mac[0])); - data->rules[0].mac.mac_mid = swab16(*(u16 *)(&p->data.mac.mac[2])); - data->rules[0].mac.mac_lsb = swab16(*(u16 *)(&p->data.mac.mac[4])); - - /* Commit writes towards the memory before sending a ramrod */ - mb(); - - /* Send a ramrod */ - return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_CLASSIFICATION_RULES, 0, - U64_HI(raw->rdata_mapping), - U64_LO(raw->rdata_mapping), 1); -} - -/* e1h Classification CAM line allocations */ -enum { - CAM_ETH_LINE = 0, - CAM_ISCSI_ETH_LINE, - CAM_FIP_ETH_LINE, - CAM_FIP_MCAST_LINE, - CAM_MAX_PF_LINE = CAM_FIP_MCAST_LINE -}; - -static inline u8 __e1h_cam_offset(int func_id, u8 rel_offset) -{ - return E1H_FUNC_MAX * rel_offset + func_id; -} - -static int bnx2x_setup_mac_e1h(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, - struct bnx2x_list_elem *pos, - bool add) -{ - struct bnx2x_raw_obj *raw = &p->vlan_mac_obj->raw; - struct mac_configuration_cmd *config = - (struct mac_configuration_cmd *)(raw->rdata); - u32 cl_bit_vec = (1 << raw->cl_id); - - /* Update a list element */ - memcpy(pos->data.mac.mac, p->data.mac.mac, ETH_ALEN); - - /* Reset the ramrod data buffer */ - memset(config, 0, sizeof(*config)); - - config->hdr.length = 1; - - if (test_bit(BNX2X_ISCSI_ETH_MAC, &p->vlan_mac_flags)) - config->hdr.offset = - __e1h_cam_offset(raw->func_id, CAM_ISCSI_ETH_LINE); - else if (test_bit(BNX2X_ETH_MAC, &p->vlan_mac_flags)) - config->hdr.offset = __e1h_cam_offset(raw->func_id, - CAM_ETH_LINE); - else if (test_bit(BNX2X_NETQ_ETH_MAC, &p->vlan_mac_flags)) - config->hdr.offset = __e1h_cam_offset(raw->func_id, - raw->cl_id + CAM_MAX_PF_LINE); - else { - BNX2X_ERR("Invalid MAC type for 57711\n"); - return -EINVAL; - } - - config->hdr.client_id = 0xff; - config->hdr.echo = ((raw->cid & BNX2X_SWCID_MASK) | - (BNX2X_FILTER_MAC_PENDING << BNX2X_SWCID_SHIFT)); - - /* primary MAC */ - config->config_table[0].msb_mac_addr = - swab16(*(u16 *)(&p->data.mac.mac[0])); - config->config_table[0].middle_mac_addr = - swab16(*(u16 *)(&p->data.mac.mac[2])); - config->config_table[0].lsb_mac_addr = - swab16(*(u16 *)(&p->data.mac.mac[4])); - config->config_table[0].clients_bit_vector = - cpu_to_le32(cl_bit_vec); - config->config_table[0].vlan_id = 0; - config->config_table[0].pf_id = raw->func_id; - if (add) - SET_FLAG(config->config_table[0].flags, - MAC_CONFIGURATION_ENTRY_ACTION_TYPE, - T_ETH_MAC_COMMAND_SET); - else - SET_FLAG(config->config_table[0].flags, - MAC_CONFIGURATION_ENTRY_ACTION_TYPE, - T_ETH_MAC_COMMAND_INVALIDATE); - - DP(NETIF_MSG_IFUP, "%s MAC (%04x:%04x:%04x) PF_ID %d CLID mask %d\n", - (add ? "setting" : "clearing"), - config->config_table[0].msb_mac_addr, - config->config_table[0].middle_mac_addr, - config->config_table[0].lsb_mac_addr, raw->func_id, cl_bit_vec); - - return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_SET_MAC, 0, - U64_HI(raw->rdata_mapping), - U64_LO(raw->rdata_mapping), 1); -} - -static int bnx2x_setup_mac_e1(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, - struct bnx2x_list_elem *pos, - bool add) -{ - struct bnx2x_raw_obj *raw = &p->vlan_mac_obj->raw; - struct mac_configuration_cmd *config = - (struct mac_configuration_cmd *)(raw->rdata); - u32 cl_bit_vec = (1 << raw->cl_id); - - /* Update a list element */ - memcpy(pos->data.mac.mac, p->data.mac.mac, ETH_ALEN); - - /* Reset the ramrod data buffer */ - memset(config, 0, sizeof(*config)); - - config->hdr.length = 1; - config->hdr.offset = raw->func_id ? 32 : 0; - config->hdr.client_id = 0xff; - config->hdr.echo = ((raw->cid & BNX2X_SWCID_MASK) | - (BNX2X_FILTER_MAC_PENDING << BNX2X_SWCID_SHIFT)); - - /* primary MAC */ - config->config_table[0].msb_mac_addr = - swab16(*(u16 *)(&p->data.mac.mac[0])); - config->config_table[0].middle_mac_addr = - swab16(*(u16 *)(&p->data.mac.mac[2])); - config->config_table[0].lsb_mac_addr = - swab16(*(u16 *)(&p->data.mac.mac[4])); - config->config_table[0].clients_bit_vector = - cpu_to_le32(cl_bit_vec); - config->config_table[0].vlan_id = 0; - config->config_table[0].pf_id = raw->func_id; - if (add) - SET_FLAG(config->config_table[0].flags, - MAC_CONFIGURATION_ENTRY_ACTION_TYPE, - T_ETH_MAC_COMMAND_SET); - else - SET_FLAG(config->config_table[0].flags, - MAC_CONFIGURATION_ENTRY_ACTION_TYPE, - T_ETH_MAC_COMMAND_INVALIDATE); - - /* if broadcast */ - if (test_bit(BNX2X_BCAST_MAC, &p->vlan_mac_flags)) { - SET_FLAG(config->config_table[0].flags, - MAC_CONFIGURATION_ENTRY_BROADCAST, 1); - config->hdr.offset++; - } - - /* if iSCSI ETH MAC */ - if (test_bit(BNX2X_ISCSI_ETH_MAC, &p->vlan_mac_flags)) - config->hdr.offset += 2; - - /* if NETQ MAC */ - if (test_bit(BNX2X_NETQ_ETH_MAC, &p->vlan_mac_flags)) - config->hdr.offset += (2 + raw->cl_id); - - - DP(NETIF_MSG_IFUP, "%s MAC (%04x:%04x:%04x) PF_ID %d CLID mask %d\n", - (add ? "setting" : "clearing"), - config->config_table[0].msb_mac_addr, - config->config_table[0].middle_mac_addr, - config->config_table[0].lsb_mac_addr, raw->func_id, cl_bit_vec); - - return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_SET_MAC, 0, - U64_HI(raw->rdata_mapping), - U64_LO(raw->rdata_mapping), 1); -} - -static int bnx2x_setup_vlan_e2(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, - struct bnx2x_list_elem *pos, - bool add) -{ - struct bnx2x_raw_obj *raw = &p->vlan_mac_obj->raw; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - struct eth_classify_rules_ramrod_data *data = - (struct eth_classify_rules_ramrod_data *)(raw->rdata); - - /* Update a list element */ - pos->data.vlan.vlan = p->data.vlan.vlan; - - /* Reset the ramrod data buffer */ - memset(data, 0, sizeof(*data)); - - /* Setup ramrod data */ - data->header.echo = ((raw->cid & BNX2X_SWCID_MASK) | - (BNX2X_FILTER_VLAN_PENDING << BNX2X_SWCID_SHIFT)); - data->header.rule_cnt = 1; - - data->rules[0].vlan.header.client_id = raw->cl_id; - data->rules[0].vlan.header.func_id = raw->func_id; - - /* Rx or/and Tx (internal switching) MAC ? */ - data->rules[0].vlan.header.cmd_general_data |= - __vlan_mac_get_rx_tx_flag(o); - - if (add) - data->rules[0].vlan.header.cmd_general_data |= - ETH_CLASSIFY_CMD_HEADER_IS_ADD; - DP(NETIF_MSG_IFUP, "About to %s VLAN %d\n", (add ? "add" : "delete"), - p->data.vlan.vlan); - - data->rules[0].vlan.header.cmd_general_data |= - CLASSIFY_RULE_OPCODE_VLAN; - - /* Set a VLAN itself */ - data->rules[0].vlan.vlan = p->data.vlan.vlan; - - /* Commit writes towards the memory before sending a ramrod */ - mb(); - - /* Send a ramrod */ - return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_CLASSIFICATION_RULES, 0, - U64_HI(raw->rdata_mapping), - U64_LO(raw->rdata_mapping), 1); -} - -static int bnx2x_setup_vlan_e1x(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, - struct bnx2x_list_elem *pos, - bool add) -{ - /* Do nothing for 57710 and 57711 */ - p->vlan_mac_obj->raw.clear_pending(&p->vlan_mac_obj->raw); - return 0; -} - -static int bnx2x_setup_vlan_mac_e2(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, - struct bnx2x_list_elem *pos, - bool add) -{ - struct bnx2x_raw_obj *raw = &p->vlan_mac_obj->raw; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - struct eth_classify_rules_ramrod_data *data = - (struct eth_classify_rules_ramrod_data *)(raw->rdata); - - /* Update a list element */ - pos->data.vlan.vlan = p->data.vlan.vlan; - memcpy(pos->data.vlan_mac.mac, p->data.vlan_mac.mac, ETH_ALEN); - - /* Reset the ramrod data buffer */ - memset(data, 0, sizeof(*data)); - - /* Setup ramrod data */ - data->header.echo = ((raw->cid & BNX2X_SWCID_MASK) | - (CLASSIFY_RULE_OPCODE_PAIR << BNX2X_SWCID_SHIFT)); - data->header.rule_cnt = 1; - - data->rules[0].pair.header.client_id = raw->cl_id; - data->rules[0].pair.header.func_id = raw->func_id; - - /* Rx or/and Tx (internal switching) MAC ? */ - data->rules[0].pair.header.cmd_general_data |= - __vlan_mac_get_rx_tx_flag(o); - - if (add) - data->rules[0].pair.header.cmd_general_data |= - ETH_CLASSIFY_CMD_HEADER_IS_ADD; - - data->rules[0].pair.header.cmd_general_data |= - CLASSIFY_RULE_OPCODE_PAIR; - - /* Set VLAN and MAC themselvs */ - data->rules[0].pair.vlan = p->data.vlan_mac.vlan; - data->rules[0].pair.mac_msb = swab16(*(u16 *)&p->data.vlan_mac.mac[0]); - data->rules[0].pair.mac_mid = swab16(*(u16 *)&p->data.vlan_mac.mac[2]); - data->rules[0].pair.mac_lsb = swab16(*(u16 *)&p->data.vlan_mac.mac[4]); - - /* Commit writes towards the memory before sending a ramrod */ - mb(); - - /* Send a ramrod */ - return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_CLASSIFICATION_RULES, 0, - U64_HI(raw->rdata_mapping), - U64_LO(raw->rdata_mapping), 1); -} - -static inline int __vlan_mac_add(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p) -{ - struct bnx2x_list_elem *pos; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - struct bnx2x_raw_obj *raw = &p->vlan_mac_obj->raw; - int rc; - - /* If this classification can not be added (is already set) - * - return a SUCCESS. - */ - if (!o->check_add(p)) - return 0; - - /* Consume the credit if not requested not to */ - if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, - &p->vlan_mac_flags) || o->get_credit(o))) - return -EINVAL; - - /* Add a new list entry */ - pos = kzalloc(sizeof(*pos), GFP_KERNEL); - if (!pos) { - BNX2X_ERR("Failed to allocate memory for a new list entry\n"); - rc = -ENOMEM; - goto error_exit3; - } - - /* Set 'pending' state */ - raw->set_pending(raw); - - /* Configure the new classification in the chip */ - rc = o->config_rule(bp, p, pos, true); - if (rc) - goto error_exit1; - - /* Wait for a ramrod completion if was requested */ - if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { - rc = raw->wait_comp(bp, raw); - if (rc) - /** If there was a timeout we don't want to clear a pending - * state but we also don't want to record this operation as - * completed. Timeout should never happen. If it - * does it means that there is something wrong with either - * the FW/HW or the system. Both cases are fatal. - */ - goto error_exit2; - } - - /* Now when we are done record the operation as completed */ - list_add(&pos->link, &o->head); - - return 0; - -error_exit1: - raw->clear_pending(raw); -error_exit2: - kfree(pos); -error_exit3: - /* Roll back a credit change */ - if (!test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &p->vlan_mac_flags)) - o->put_credit(o); - return rc; -} - - -static inline int __vlan_mac_del(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p) -{ - struct bnx2x_list_elem *pos = NULL; - struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; - struct bnx2x_raw_obj *raw = &p->vlan_mac_obj->raw; - int rc; - - /* If this classification can not be delete (doesn't exist) - * - return a SUCCESS. - */ - pos = o->check_del(p); - if (!pos) - return 0; - - /* Return the credit to the credit pool if not requested not to */ - if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, - &p->vlan_mac_flags) || o->put_credit(o))) - return -EINVAL; - - if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) - goto clr_only; - - /* Set 'pending' state */ - raw->set_pending(raw); - - /* Configure the new classification in the chip */ - rc = o->config_rule(bp, p, pos, false); - if (rc) - goto error_exit1; - - /* Wait for a ramrod completion if was requested */ - if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { - rc = raw->wait_comp(bp, raw); - if (rc) - /* See the same case comment in __vlan_mac_add() */ - goto error_exit2; - } - -clr_only: - /* Now when we are done we may delete the entry from our records */ - list_del(&pos->link); - kfree(pos); - return 0; - -error_exit1: - raw->clear_pending(raw); -error_exit2: - /* Roll back a credit change */ - if (!test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &p->vlan_mac_flags)) - o->get_credit(o); - - return rc; -} - -int bnx2x_config_vlan_mac(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, bool add) -{ - if (add) - return __vlan_mac_add(bp, p); - else - return __vlan_mac_del(bp, p); -} - -static inline void __init_raw_obj(struct bnx2x_raw_obj *raw, u16 cl_id, - u32 cid, int func_id, void *rdata, dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type) -{ - raw->func_id = func_id; - raw->cid = cid; - raw->cl_id = cl_id; - raw->rdata = rdata; - raw->rdata_mapping = rdata_mapping; - raw->state = state; - raw->pstate = pstate; - raw->obj_type = type; - raw->check_pending = bnx2x_raw_check_pending; - raw->clear_pending = bnx2x_raw_clear_pending; - raw->set_pending = bnx2x_raw_set_pending; - raw->wait_comp = bnx2x_raw_wait; -} - -static inline void __init_vlan_mac_common(struct bnx2x_vlan_mac_obj *o, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type, - struct bnx2x_credit_pool_obj *macs_pool, - struct bnx2x_credit_pool_obj *vlans_pool) -{ - INIT_LIST_HEAD(&o->head); - - o->macs_pool = macs_pool; - o->vlans_pool = vlans_pool; - - __init_raw_obj(&o->raw, cl_id, cid, func_id, rdata, rdata_mapping, - state, pstate, type); -} - - -void bnx2x_init_mac_obj(struct bnx2x *bp, - struct bnx2x_vlan_mac_obj *mac_obj, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type, - struct bnx2x_credit_pool_obj *macs_pool) -{ - __init_vlan_mac_common(mac_obj, cl_id, cid, func_id, rdata, - rdata_mapping, state, pstate, type, macs_pool, - NULL); - - mac_obj->get_credit = bnx2x_get_credit_mac; - mac_obj->put_credit = bnx2x_put_credit_mac; - - if (CHIP_IS_E2(bp)) { - mac_obj->config_rule = bnx2x_setup_mac_e2; - mac_obj->check_del = bnx2x_check_mac_del; - mac_obj->check_add = bnx2x_check_mac_add; - } else if (CHIP_IS_E1(bp)) { - mac_obj->config_rule = bnx2x_setup_mac_e1; - mac_obj->check_del = bnx2x_check_mac_del; - mac_obj->check_add = bnx2x_check_mac_add; - } else if (CHIP_IS_E1H(bp)) { - mac_obj->config_rule = bnx2x_setup_mac_e1h; - mac_obj->check_del = bnx2x_check_mac_del; - mac_obj->check_add = bnx2x_check_mac_add; - } else { - BNX2X_ERR("Do not support chips others than E2\n"); - BUG(); - } -} - -void bnx2x_init_vlan_obj(struct bnx2x *bp, - struct bnx2x_vlan_mac_obj *vlan_obj, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type, - struct bnx2x_credit_pool_obj *vlans_pool) -{ - __init_vlan_mac_common(vlan_obj, cl_id, cid, func_id, rdata, - rdata_mapping, state, pstate, type, NULL, - vlans_pool); - - vlan_obj->get_credit = bnx2x_get_credit_vlan; - vlan_obj->put_credit = bnx2x_put_credit_vlan; - - if (CHIP_IS_E2(bp)) { - vlan_obj->config_rule = bnx2x_setup_vlan_e2; - vlan_obj->check_del = bnx2x_check_vlan_del; - vlan_obj->check_add = bnx2x_check_vlan_add; - } else if (CHIP_IS_E1(bp)) { - vlan_obj->config_rule = bnx2x_setup_vlan_e1x; - vlan_obj->check_del = bnx2x_check_vlan_del; - vlan_obj->check_add = bnx2x_check_vlan_add; - } else if (CHIP_IS_E1H(bp)) { - vlan_obj->config_rule = bnx2x_setup_vlan_e1x; - vlan_obj->check_del = bnx2x_check_vlan_del; - vlan_obj->check_add = bnx2x_check_vlan_add; - } else { - BNX2X_ERR("Do not support chips others than E1X and E2\n"); - BUG(); - } -} - -void bnx2x_init_vlan_mac_obj(struct bnx2x *bp, - struct bnx2x_vlan_mac_obj *vlan_mac_obj, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type, - struct bnx2x_credit_pool_obj *macs_pool, - struct bnx2x_credit_pool_obj *vlans_pool) -{ - __init_vlan_mac_common(vlan_mac_obj, cl_id, cid, func_id, rdata, - rdata_mapping, state, pstate, type, macs_pool, - vlans_pool); - - vlan_mac_obj->get_credit = bnx2x_get_credit_vlan_mac; - vlan_mac_obj->put_credit = bnx2x_put_credit_vlan_mac; - - if (CHIP_IS_E2(bp)) { - vlan_mac_obj->config_rule = bnx2x_setup_vlan_mac_e2; - vlan_mac_obj->check_del = bnx2x_check_vlan_mac_del; - vlan_mac_obj->check_add = bnx2x_check_vlan_mac_add; - } else { - BNX2X_ERR("Do not support chips others than E2\n"); - BUG(); - } -} - -/* RX_MODE verbs: DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */ -static inline void __storm_memset_mac_filters(struct bnx2x *bp, - struct tstorm_eth_mac_filter_config *mac_filters, - u16 abs_fid) -{ - size_t size = sizeof(struct tstorm_eth_mac_filter_config); - - u32 addr = BAR_TSTRORM_INTMEM + - TSTORM_MAC_FILTER_CONFIG_OFFSET(abs_fid); - - __storm_memset_struct(bp, addr, size, (u32*)mac_filters); -} - -static int bnx2x_set_rx_mode_e1x(struct bnx2x *bp, - struct bnx2x_rx_mode_ramrod_params *p) -{ - u32 llh_mask; - int port = (p->func_id & 0x1); - - /* update the bp MAC filter structure */ - u32 mask = (1 << p->cl_id); - - struct tstorm_eth_mac_filter_config *mac_filters = - (struct tstorm_eth_mac_filter_config *)p->rdata; - - /* initial seeting is drop-all */ - u8 drop_all_ucast = 1, drop_all_bcast = 1, drop_all_mcast = 1; - u8 accp_all_ucast = 0, accp_all_bcast = 0, accp_all_mcast = 0; - u8 unmatched_unicast = 0; - - if (test_bit(BNX2X_ACCEPT_UNICAST, &p->accept_flags)) - /* accept matched ucast */ - drop_all_ucast = 0; - - if (test_bit(BNX2X_ACCEPT_MULTICAST, &p->accept_flags)) { - /* accept matched mcast */ - drop_all_mcast = 0; - if (IS_MF_SI(bp)) /* What about E2 TODO */ - /* since mcast addresses won't arrive with ovlan, - * fw needs to accept all of them in - * switch-independent mode */ - accp_all_mcast = 1; - } - if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, &p->accept_flags)) { - /* accept all mcast */ - drop_all_ucast = 0; - accp_all_ucast = 1; - } - if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, &p->accept_flags)) { - /* accept all mcast */ - drop_all_mcast = 0; - accp_all_mcast = 1; - } - if (test_bit(BNX2X_ACCEPT_BROADCAST, &p->accept_flags)) { - /* accept (all) bcast */ - drop_all_bcast = 0; - accp_all_bcast = 1; - } - if (test_bit(BNX2X_ACCEPT_UNMATCHED, &p->accept_flags)) - /* accept unmatched unicasts */ - unmatched_unicast = 1; - - mac_filters->ucast_drop_all = drop_all_ucast ? - mac_filters->ucast_drop_all | mask : - mac_filters->ucast_drop_all & ~mask; - - mac_filters->mcast_drop_all = drop_all_mcast ? - mac_filters->mcast_drop_all | mask : - mac_filters->mcast_drop_all & ~mask; - - mac_filters->bcast_drop_all = drop_all_bcast ? - mac_filters->bcast_drop_all | mask : - mac_filters->bcast_drop_all & ~mask; - - mac_filters->ucast_accept_all = accp_all_ucast ? - mac_filters->ucast_accept_all | mask : - mac_filters->ucast_accept_all & ~mask; - - mac_filters->mcast_accept_all = accp_all_mcast ? - mac_filters->mcast_accept_all | mask : - mac_filters->mcast_accept_all & ~mask; - - mac_filters->bcast_accept_all = accp_all_bcast ? - mac_filters->bcast_accept_all | mask : - mac_filters->bcast_accept_all & ~mask; - - mac_filters->unmatched_unicast = unmatched_unicast ? - mac_filters->unmatched_unicast | mask : - mac_filters->unmatched_unicast & ~mask; - - DP(NETIF_MSG_IFUP, "drop_ucast 0x%x\ndrop_mcast 0x%x\ndrop_bcast 0x%x\n" - "accp_ucast 0x%x\naccp_mcast 0x%x\naccp_bcast 0x%x\n", - mac_filters->ucast_drop_all, - mac_filters->mcast_drop_all, - mac_filters->bcast_drop_all, - mac_filters->ucast_accept_all, - mac_filters->mcast_accept_all, - mac_filters->bcast_accept_all - ); - - /* - * All non-unicast management frames should be sent to the on-chip - * recieve buffer and may pass to the host as well. If - * the 'Accept-All-Unicast' flags is set then also unicast management - * frames go to the host. - * - * !!! For New boards the code below has no effect what so ever, - * ALL management frames go to the BRB and are later filtered by the storm ALWAYS, - * So instead of this ugliness we should let the init-tool configure - * this register so that for older boards behave the same and we - * can get rid of this ugliness TALK WITH YARON TODO - */ - llh_mask = - NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_BRCST | - NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_MLCST | - NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_VLAN | - NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_NO_VLAN; - if (test_bit(BNX2X_ACCEPT_ALL_UNICAST,&p->accept_flags)) - llh_mask |= NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST; - - REG_WR(bp, - (port ? NIG_REG_LLH1_BRB1_DRV_MASK : NIG_REG_LLH0_BRB1_DRV_MASK), - llh_mask); - - /* write the MAC filter structure*/ - __storm_memset_mac_filters(bp, mac_filters, p->func_id); - - /* The operation is completed */ - clear_bit(p->state, p->pstate); - smp_mb__after_clear_bit(); - - return 0; -} - - -static int bnx2x_set_rx_mode_e2(struct bnx2x *bp, - struct bnx2x_rx_mode_ramrod_params *p) -{ - struct eth_filter_rules_ramrod_data *data = p->rdata; - - /* Reset the ramrod data buffer */ - memset(data, 0, sizeof(*data)); - - /* Setup ramrod data */ - data->header.echo = p->cid; - data->header.rule_cnt = 1; - - data->rules[0].client_id = p->cl_id; - data->rules[0].func_id = p->func_id; - - /* Rx or/and Tx (internal switching) ? */ - if (test_bit(RAMROD_TX, &p->ramrod_flags)) - data->rules[0].cmd_general_data = - ETH_FILTER_RULES_CMD_TX_CMD; - - if (test_bit(RAMROD_RX, &p->ramrod_flags)) - data->rules[0].cmd_general_data |= - ETH_FILTER_RULES_CMD_RX_CMD; - - /* start with 'drop-all' */ - data->rules[0].state = - ETH_FILTER_RULES_CMD_UCAST_DROP_ALL | - ETH_FILTER_RULES_CMD_MCAST_DROP_ALL; - - if (p->accept_flags) { - if (test_bit(BNX2X_ACCEPT_UNICAST, &p->accept_flags)) - data->rules[0].state &= - ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL; - if (test_bit(BNX2X_ACCEPT_MULTICAST, &p->accept_flags)) - data->rules[0].state &= - ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL; - if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, &p->accept_flags)) { - data->rules[0].state &= - ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL; - data->rules[0].state |= - ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL; - } - if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, &p->accept_flags)){ - data->rules[0].state |= - ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL; - data->rules[0].state &= - ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL; - } - if (test_bit(BNX2X_ACCEPT_BROADCAST, &p->accept_flags)) - data->rules[0].state |= - ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL; - if (test_bit(BNX2X_ACCEPT_UNMATCHED, &p->accept_flags)) { - data->rules[0].state &= - ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL; - data->rules[0].state |= - ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED; - } - if (test_bit(BNX2X_ACCEPT_ANY_VLAN, &p->accept_flags)) - data->rules[0].state |= - ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN; - } - - /* If FCoE Client configuration has been requested */ - if (test_bit(BNX2X_RX_MODE_FCOE_ETH, &p->rx_mode_flags)) { - data->header.rule_cnt = 2; - - data->rules[1].client_id = bnx2x_fcoe(bp, cl_id); - data->rules[1].func_id = p->func_id; - - /* Rx or Tx (internal switching) ? */ - if (test_bit(RAMROD_TX, &p->ramrod_flags)) - data->rules[1].cmd_general_data = - ETH_FILTER_RULES_CMD_TX_CMD; - - if (test_bit(RAMROD_RX, &p->ramrod_flags)) - data->rules[1].cmd_general_data |= - ETH_FILTER_RULES_CMD_RX_CMD; - - data->rules[1].state = data->rules[0].state; - data->rules[1].state &= - ~ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL; - data->rules[1].state &= - ~ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL; - data->rules[1].state &= - ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL; - data->rules[1].state &= - ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED; - } - - DP(NETIF_MSG_IFUP, "About to configure %d rules, " - "accept_flags 0x%lx, state[0] 0x%x " - "cmd_general_data[0] 0x%x\n", - data->header.rule_cnt, p->accept_flags, - data->rules[0].state, data->rules[0].cmd_general_data); - - /* Commit writes towards the memory before sending a ramrod */ - mb(); - - /* Send a ramrod */ - return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FILTER_RULES, 0, - U64_HI(p->rdata_mapping), U64_LO(p->rdata_mapping), 1); -} - -static int bnx2x_wait_rx_mode_comp_e2(struct bnx2x *bp, - struct bnx2x_rx_mode_ramrod_params *p) -{ - return __state_wait(bp, p->state, p->pstate); -} - -static int bnx2x_empty_rx_mode_wait(struct bnx2x *bp, - struct bnx2x_rx_mode_ramrod_params *p) -{ - /* Do nothing */ - return 0; -} - -int bnx2x_config_rx_mode(struct bnx2x *bp, struct bnx2x_rx_mode_ramrod_params *p) -{ - int rc; - - /* Configure the new classification in the chip */ - rc = p->rx_mode_obj->config_rx_mode(bp, p); - if (rc) - return rc; - - /* Wait for a ramrod completion if was requested */ - if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { - rc = p->rx_mode_obj->wait_comp(bp, p); - if (rc) - return rc; - } - - return 0; -} - -void bnx2x_init_rx_mode_obj(struct bnx2x *bp, struct bnx2x_rx_mode_obj *o) -{ - if (CHIP_IS_E2(bp)) { - o->wait_comp = bnx2x_wait_rx_mode_comp_e2; - o->config_rx_mode = bnx2x_set_rx_mode_e2; - } else if (CHIP_IS_E1x(bp)) { - o->wait_comp = bnx2x_empty_rx_mode_wait; - o->config_rx_mode = bnx2x_set_rx_mode_e1x; - } else { - BNX2X_ERR("Do not support chips others than E1x and E2\n"); - BUG(); - } -} - -/********************* Multicast verbs: SET, CLEAR ****************************/ -static inline u8 __bin_from_mac(char *mac) -{ - return (crc32c_le(0, mac, ETH_ALEN) >> 24) & 0xff; -} - -enum { - BNX2X_MCAST_CMD_ADD, - BNX2X_MCAST_CMD_DEL, -}; - -struct bnx2x_pending_mcast_mac { - struct list_head link; - u8 mac[ETH_ALEN]; - u8 pad[2]; /* For a natural alignment of the following buffer */ -}; - -struct bnx2x_pending_mcast_cmd { - struct list_head link; - int type; - struct list_head macs_head; - u32 macs_num; /* Needed for REM (ALL) command */ -}; - -static int bnx2x_mcast_wait(struct bnx2x *bp, struct bnx2x_mcast_obj *o) -{ - return (__state_wait(bp, o->sched_state, o->raw.pstate) || - o->raw.wait_comp(bp,&o->raw)); -} - -static int bnx2x_enqueue_mcast_cmd(struct bnx2x *bp, - struct bnx2x_mcast_obj *o, - struct bnx2x_mcast_ramrod_params *p, - bool add) -{ - int total_sz; - struct bnx2x_pending_mcast_cmd *new_cmd; - struct bnx2x_pending_mcast_mac *cur_mac = NULL; - struct bnx2x_mcast_list_elem *pos; - int macs_list_len = (add ? p->mcast_list_len : 0); - - /* If the command is empty ("handle pending commands only"), break */ - if (!p->mcast_list_len) - return 0; - - total_sz = sizeof(*new_cmd) + - macs_list_len * sizeof(struct bnx2x_pending_mcast_mac); - - /* Add mcast is called under spin_lock, thus calling with GFP_ATOMIC */ - new_cmd = kzalloc(total_sz, GFP_ATOMIC); - - if (!new_cmd) - return -ENOMEM; - - DP(NETIF_MSG_IFUP, "About to enqueue a new \"%s\" command. " - "macs_list_len=%d\n", - add ? "add" : "del", macs_list_len); - - INIT_LIST_HEAD(&new_cmd->macs_head); - - if (add) { - new_cmd->type = BNX2X_MCAST_CMD_ADD; - - cur_mac = (struct bnx2x_pending_mcast_mac *) - ((u8*)new_cmd + sizeof(*new_cmd)); - - /* Push the MACs of the current command into the pendig command MACs - * list: FIFO - */ - list_for_each_entry(pos, &p->mcast_list, link) { - memcpy(cur_mac->mac, pos->mac, ETH_ALEN); - list_add_tail(&cur_mac->link, &new_cmd->macs_head); - cur_mac++; - } - } else { - new_cmd->type = BNX2X_MCAST_CMD_DEL; - new_cmd->macs_num = p->mcast_list_len; - } - - /* Push the new pending command to the tail of the pending list: FIFO */ - list_add_tail(&new_cmd->link, &o->pending_cmds_head); - - o->set_sched(o); - - return 0; -} - -/** - * Finds the first set bin and clears it. - * - * @param o - * - * @return The index of the found bin or -1 if none is found - */ -static inline int __clear_first_bin(struct bnx2x_mcast_obj *o) -{ - int i, j; - - for (i = 0; i < BNX2X_MCAST_VEC_SZ; i++) - if (o->vec[i]) - for (j = 0; j < BIT_VEC64_ELEM_SZ; j++) { - int cur_bit = j + BIT_VEC64_ELEM_SZ * i; - if (BIT_VEC64_TEST_BIT(o->vec, cur_bit)) { - BIT_VEC64_CLEAR_BIT(o->vec, cur_bit); - return cur_bit; - } - } - return -1; -} - -static inline u8 __mcast_get_rx_tx_flag(struct bnx2x_mcast_obj *o) -{ - struct bnx2x_raw_obj *raw = &o->raw; - u8 rx_tx_flag = 0; - - if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) || - (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) - rx_tx_flag |= ETH_MULTICAST_RULES_CMD_TX_CMD; - - if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) || - (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) - rx_tx_flag |= ETH_MULTICAST_RULES_CMD_RX_CMD; - - return rx_tx_flag; -} - -static void bnx2x_set_one_mcast_rule_e2(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - int idx, u8 *mac, bool add) -{ - struct bnx2x_mcast_obj *o = p->mcast_obj; - struct bnx2x_raw_obj *r = &o->raw; - struct eth_multicast_rules_ramrod_data *data = - (struct eth_multicast_rules_ramrod_data *)(r->rdata); - u8 func_id = r->func_id; - u8 rx_tx_add_flag = __mcast_get_rx_tx_flag(o); - int bin; - - if (add) - rx_tx_add_flag |= ETH_MULTICAST_RULES_CMD_IS_ADD; - - data->rules[idx].cmd_general_data |= rx_tx_add_flag; - - /* Get a bin and update a bins vector */ - if (add) { - bin = __bin_from_mac(mac); - if (BIT_VEC64_TEST_BIT(o->vec, bin)) - /* If a bin has already been set, decrement the number - * of set bins. - */ - o->num_bins_set--; - else - BIT_VEC64_SET_BIT(o->vec, bin); - } else - bin = __clear_first_bin(o); - - WARN_ON(bin < 0); - DP(NETIF_MSG_IFUP, "Updating bin %d\n", bin); - - data->rules[idx].bin_id = bin; - data->rules[idx].func_id = func_id; -} - -static inline int __handle_pending_mcast_cmds_e2(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p) -{ - struct bnx2x_pending_mcast_cmd *cmd_pos, *cmd_pos_n; - struct bnx2x_pending_mcast_mac *pmac_pos, *pmac_pos_n; - int cnt = 0; - struct bnx2x_mcast_obj *o = p->mcast_obj; - - list_for_each_entry_safe(cmd_pos, cmd_pos_n, &o->pending_cmds_head, - link) { - if (cmd_pos->type == BNX2X_MCAST_CMD_ADD) { - list_for_each_entry_safe(pmac_pos, pmac_pos_n, - &cmd_pos->macs_head, link) { - - o->set_one_rule(bp, p, cnt, &pmac_pos->mac[0], - true); - - cnt++; - - DP(NETIF_MSG_IFUP, "About to configure " - BNX2X_MAC_FMT" mcast MAC\n", - BNX2X_MAC_PRN_LIST(pmac_pos->mac)); - - list_del(&pmac_pos->link); - - /* Break if we reached the maximum number - * of rules. - */ - if (cnt >= o->max_cmd_len) - break; - } - } else { - while(cmd_pos->macs_num) { - o->set_one_rule(bp, p, cnt, NULL, false); - - cnt++; - - cmd_pos->macs_num--; - - DP(NETIF_MSG_IFUP, "Deleting MAC. %d left," - "cnt is %d\n", cmd_pos->macs_num, cnt); - - /* Break if we reached the maximum - * number of rules. - */ - if (cnt >= o->max_cmd_len) - break; - } - } - - /* If the command has been completed - remove it from the list - * and free the memory - */ - if ((!cmd_pos->macs_num) && list_empty(&cmd_pos->macs_head)) { - list_del(&cmd_pos->link); - kfree(cmd_pos); - } - - /* Break if we reached the maximum number of rules */ - if (cnt >= o->max_cmd_len) - break; - } - - return cnt; -} - -static inline int __handle_current_mcast_cmd(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, bool add, - int start_cnt) -{ - struct bnx2x_mcast_list_elem *mlist_pos; - struct bnx2x_mcast_obj *o = p->mcast_obj; - int cnt = start_cnt; - - DP(NETIF_MSG_IFUP, "p->mcast_list_len=%d\n", p->mcast_list_len); - - if (add) - list_for_each_entry(mlist_pos, &p->mcast_list, link) { - - o->set_one_rule(bp, p, cnt, mlist_pos->mac, true); - - cnt++; - - DP(NETIF_MSG_IFUP, "About to configure "BNX2X_MAC_FMT - " mcast MAC\n", BNX2X_MAC_PRN_LIST(mlist_pos->mac)); - } - else { - int i; - - for (i = 0; i < p->mcast_list_len; i++) { - o->set_one_rule(bp, p, cnt, NULL, false); - - cnt++; - - DP(NETIF_MSG_IFUP, "Deleting MAC. %d left\n", - p->mcast_list_len - i - 1); - } - } - - /* The current command has been handled */ - p->mcast_list_len = 0; - - return cnt; -} - -static int bnx2x_mcast_preamble_e2(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add_cont) -{ - struct bnx2x_mcast_obj *o = p->mcast_obj; - - /* DEL command deletes all currently configured MACs */ - if (!add_cont) { - p->mcast_list_len = o->num_bins_set; - o->num_bins_set = 0; - } else - /* Here we assume that all new MACs will fall into new bins. - * We will correct it during the calculation of the bin index. - */ - o->num_bins_set += p->mcast_list_len; - - /* Increase the total number of MACs pending to be configured */ - o->total_pending_num += p->mcast_list_len; - - return 0; -} - -static void bnx2x_mcast_postmortem_e2(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - int old_num_bins) -{ - struct bnx2x_mcast_obj *o = p->mcast_obj; - - o->num_bins_set = old_num_bins; - o->total_pending_num -= p->mcast_list_len; -} - -/** - * Sets a header values in struct eth_multicast_rules_ramrod_data - * - * @param bp - * @param p - * @param len number of rules to handle - */ -static inline void __mcast_set_rdata_hdr_e2(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - u8 len) -{ - struct bnx2x_raw_obj *r = &p->mcast_obj->raw; - struct eth_multicast_rules_ramrod_data *data = - (struct eth_multicast_rules_ramrod_data *)(r->rdata); - - data->header.echo = ((r->cid & BNX2X_SWCID_MASK) | - (BNX2X_FILTER_MCAST_PENDING << BNX2X_SWCID_SHIFT)); - data->header.rule_cnt = len; -} - -static int bnx2x_setup_mcast_e2(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add) -{ - struct bnx2x_raw_obj *raw = &p->mcast_obj->raw; - struct bnx2x_mcast_obj *o = p->mcast_obj; - struct eth_multicast_rules_ramrod_data *data = - (struct eth_multicast_rules_ramrod_data *)(raw->rdata); - int cnt = 0; - - /* Reset the ramrod data buffer */ - memset(data, 0, sizeof(*data)); - - cnt = __handle_pending_mcast_cmds_e2(bp, p); - - /* If there are no more pending commands - clear SCHEDULED state */ - if (list_empty(&o->pending_cmds_head)) - o->clear_sched(o); - - /* The below may be true iff there was enough room in ramrod - * data for all pending commands and for the current - * command. Otherwise the current command would have been added - * to the pending commands and p->mcast_list_len would have been - * zeroed. - */ - if (p->mcast_list_len > 0) - cnt = __handle_current_mcast_cmd(bp, p, add, cnt); - - /* We've pulled out some MACs - update the total number of - * outstanding. - */ - o->total_pending_num -= cnt; - - /* send a ramrod */ - - WARN_ON(cnt > o->max_cmd_len); - - __mcast_set_rdata_hdr_e2(bp, p, cnt); - - /* Commit writes towards the memory before sending a ramrod */ - mb(); - - /* If CLEAR_ONLY was requested - don't send a ramrod and clear - * RAMROD_PENDING status immediately. - */ - if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { - raw->clear_pending(raw); - return 0; - } else - /* Send a ramrod */ - return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_MULTICAST_RULES, 0, - U64_HI(raw->rdata_mapping), - U64_LO(raw->rdata_mapping), 1); -} - -static int bnx2x_mcast_preamble_e1h(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add_cont) -{ - /* Do nothing */ - return 0; -} - -static void bnx2x_mcast_postmortem_e1h(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - int old_num_bins) -{ - /* Do nothing */ -} - -/* On 57711 we write the multicast MACs' aproximate match - * table by directly into the TSTORM's internal RAM. So we don't - * really need to handle any tricks to make it work. - */ -static int bnx2x_setup_mcast_e1h(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add) -{ - int i; - struct bnx2x_mcast_obj *o = p->mcast_obj; - struct bnx2x_raw_obj *r = &o->raw; - - if (add) { - u32 mc_filter[MC_HASH_SIZE] = {0}; - u32 bit; - struct bnx2x_mcast_list_elem *mlist_pos; - - list_for_each_entry(mlist_pos, &p->mcast_list, link) { - DP(NETIF_MSG_IFUP, "About to configure "BNX2X_MAC_FMT - " mcast MAC\n", BNX2X_MAC_PRN_LIST(mlist_pos->mac)); - - - bit = __bin_from_mac(mlist_pos->mac); - mc_filter[bit >> 5] |= (1 << (bit & 0x1f)); - } - - for (i = 0; i < MC_HASH_SIZE; i++) - REG_WR(bp, MC_HASH_OFFSET(bp, i), mc_filter[i]); - - } else {/* DEL */ - DP(NETIF_MSG_IFUP, "Invalidating multicast MACs " - "configuration\n"); - for (i = 0; i < MC_HASH_SIZE; i++) - REG_WR(bp, MC_HASH_OFFSET(bp, i), 0); - } - - /* We are done */ - r->clear_pending(r); - - return 0; -} - -static int bnx2x_mcast_preamble_e1(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add_cont) -{ - struct bnx2x_mcast_obj *o = p->mcast_obj; - - /* DEL command deletes all currently configured MACs */ - if (!add_cont) { - p->mcast_list_len = o->num_bins_set; - o->num_bins_set = 0; - } else { - /* Multicast MACs on 57710 are configured as unicast MACs and - * there is only a limited number of CAM entries for that - * matter. - */ - if (p->mcast_list_len > o->max_cmd_len) { - BNX2X_ERR("Can't configure more than %d multicast MACs" - "on 57710\n", o->max_cmd_len); - return -EINVAL; - } - /* Every configured MAC should be cleared if DEL command is - * called. Only the last ADD command is relevant as long as - * every ADD commands overrides the previous configuration. - */ - if (p->mcast_list_len > 0) - o->num_bins_set = p->mcast_list_len; - } - - /* We want to ensure that commands are executed one by one for 57710. - * Therefore each none-empty command will consume o->max_cmd_len. - */ - if (p->mcast_list_len) - o->total_pending_num += o->max_cmd_len; - - return 0; -} - -static void bnx2x_mcast_postmortem_e1(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - int old_num_bins) -{ - struct bnx2x_mcast_obj *o = p->mcast_obj; - - o->num_bins_set = old_num_bins; - - /* If current command hasn't been handled yet and we are - * here means that it's meant to be dropped and we have to - * update the number of outstandling MACs accordingly. - */ - if (p->mcast_list_len) - o->total_pending_num -= o->max_cmd_len; -} - -static void bnx2x_set_one_mcast_rule_e1(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - int idx, u8 *mac, bool add) -{ - struct bnx2x_raw_obj *r = &p->mcast_obj->raw; - struct mac_configuration_cmd *data = - (struct mac_configuration_cmd *)(r->rdata); - - /* copy mac */ - if (add) { - data->config_table[idx].msb_mac_addr = - swab16(*(u16 *)&mac[0]); - data->config_table[idx].middle_mac_addr = - swab16(*(u16 *)&mac[2]); - data->config_table[idx].lsb_mac_addr = - swab16(*(u16 *)&mac[4]); - - data->config_table[idx].vlan_id = 0; - data->config_table[idx].pf_id = r->func_id; - data->config_table[idx].clients_bit_vector = - cpu_to_le32(1 << r->cl_id); - - SET_FLAG(data->config_table[idx].flags, - MAC_CONFIGURATION_ENTRY_ACTION_TYPE, - T_ETH_MAC_COMMAND_SET); - } -} - -/** - * Sets a header values in struct mac_configuration_cmd. - * - * @param bp - * @param p - * @param len number of rules to handle - */ -static inline void __mcast_set_rdata_hdr_e1(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - u8 len) -{ - struct bnx2x_raw_obj *r = &p->mcast_obj->raw; - struct mac_configuration_cmd *data = - (struct mac_configuration_cmd *)(r->rdata); - - u8 offset = (CHIP_REV_IS_SLOW(bp) ? - BNX2X_MAX_EMUL_MULTI*(1 + r->func_id) : - BNX2X_MAX_MULTICAST*(1 + r->func_id)); - - data->hdr.offset = offset; - data->hdr.client_id = 0xff; - data->hdr.echo = ((r->cid & BNX2X_SWCID_MASK) | - (BNX2X_FILTER_MCAST_PENDING << BNX2X_SWCID_SHIFT)); - data->hdr.length = len; -} - - -static inline int __handle_pending_mcast_cmds_e1(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p) -{ - struct bnx2x_pending_mcast_cmd *cmd_pos; - struct bnx2x_pending_mcast_mac *pmac_pos; - int cnt = 0; - struct bnx2x_mcast_obj *o = p->mcast_obj; - u8 len; - - - /* If nothing to be done - return */ - if (list_empty(&o->pending_cmds_head)) - return 0; - - /* Handle the first command */ - cmd_pos = list_first_entry(&o->pending_cmds_head, - struct bnx2x_pending_mcast_cmd, link); - - if (cmd_pos->type == BNX2X_MCAST_CMD_ADD) { - list_for_each_entry(pmac_pos, &cmd_pos->macs_head, link) { - - o->set_one_rule(bp, p, cnt, &pmac_pos->mac[0], true); - - cnt++; - - DP(NETIF_MSG_IFUP, "About to configure "BNX2X_MAC_FMT - " mcast MAC\n", BNX2X_MAC_PRN_LIST(pmac_pos->mac)); - } - - len = cnt; - } else { - len = cmd_pos->macs_num; - DP(NETIF_MSG_IFUP, "About to delete %d multicast MACs\n", len); - } - - list_del(&cmd_pos->link); - kfree(cmd_pos); - - return len; -} - -static int bnx2x_setup_mcast_e1(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add) -{ - struct bnx2x_raw_obj *raw = &p->mcast_obj->raw; - struct bnx2x_mcast_obj *o = p->mcast_obj; - struct mac_configuration_cmd *data = - (struct mac_configuration_cmd *)(raw->rdata); - int cnt = 0, i; - - /* Reset the ramrod data buffer */ - memset(data, 0, sizeof(*data)); - - - /* First set all entries as invalid */ - for (i = 0; i < o->max_cmd_len ; i++) - SET_FLAG(data->config_table[i].flags, - MAC_CONFIGURATION_ENTRY_ACTION_TYPE, - T_ETH_MAC_COMMAND_INVALIDATE); - - /* Handle pending commands first */ - cnt = __handle_pending_mcast_cmds_e1(bp, p); - - /* If there are no more pending commands - clear SCHEDULED state */ - if (list_empty(&o->pending_cmds_head)) - o->clear_sched(o); - - /* The below may be true iff there were no pending commands */ - if (!cnt) - cnt = __handle_current_mcast_cmd(bp, p, add, 0); - - /* For 57710 every command has o->max_cmd_len length to ensure that - * commands are done one at a time. - */ - o->total_pending_num -= o->max_cmd_len; - - /* send a ramrod */ - - WARN_ON(cnt > o->max_cmd_len); - - __mcast_set_rdata_hdr_e1(bp, p, cnt); - - /* Commit writes towards the memory before sending a ramrod */ - mb(); - - /* If CLEAR_ONLY was requested - don't send a ramrod and clear - * RAMROD_PENDING status immediately. - */ - if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { - raw->clear_pending(raw); - return 0; - } else - /* Send a ramrod */ - return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_SET_MAC, 0, - U64_HI(raw->rdata_mapping), - U64_LO(raw->rdata_mapping), 1); -} - -int bnx2x_config_mcast(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add_cont) -{ - struct bnx2x_mcast_obj *o = p->mcast_obj; - struct bnx2x_raw_obj *r = &o->raw; - int rc, old_num_bins; - - /* This is needed to recover o->num_bins_set in case of failure */ - old_num_bins = o->num_bins_set; - - /* Do some calculations and checks */ - rc = o->preamble(bp, p, add_cont); - if (rc) - return rc; - - /* Return if there is no work to do */ - if ((!p->mcast_list_len) && (!o->check_sched(o))) - return 0; - - DP(NETIF_MSG_IFUP, "o->total_pending_num=%d p->mcast_list_len=%d " - "o->max_cmd_len=%d\n", o->total_pending_num, - p->mcast_list_len, o->max_cmd_len); - - /* Enqueue the current command to the pending list if we can't complete - * it in the current iteration - */ - if (r->check_pending(r) || - ((o->max_cmd_len > 0) && (o->total_pending_num > o->max_cmd_len))) { - rc = o->enqueue_cmd(bp, p->mcast_obj, p, add_cont); - if (rc) - goto error_exit1; - - /* As long as the current command is in a command list we - * don't need to handle it separately. - */ - p->mcast_list_len = 0; - } - - if (!r->check_pending(r)) { - - /* Set 'pending' state */ - r->set_pending(r); - - /* Configure the new classification in the chip */ - rc = o->config_mcast(bp, p, add_cont); - if (rc) - goto error_exit2; - - /* Wait for a ramrod completion if was requested */ - if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { - rc = o->wait_comp(bp, o); - if (rc) - return rc; - } - } - - return 0; - -error_exit2: - r->clear_pending(r); - -error_exit1: - o->postmortem(bp, p, old_num_bins); - - return rc; -} - -static void bnx2x_mcast_clear_sched(struct bnx2x_mcast_obj *o) -{ - smp_mb__before_clear_bit(); - clear_bit(o->sched_state, o->raw.pstate); - smp_mb__after_clear_bit(); -} - -static void bnx2x_mcast_set_sched(struct bnx2x_mcast_obj *o) -{ - smp_mb__before_clear_bit(); - set_bit(o->sched_state, o->raw.pstate); - smp_mb__after_clear_bit(); -} - -static bool bnx2x_mcast_check_sched(struct bnx2x_mcast_obj *o) -{ - return test_bit(o->sched_state, o->raw.pstate); -} - -static bool bnx2x_check_mcast_pending(struct bnx2x_mcast_obj *o) -{ - return (o->raw.check_pending(&o->raw) || o->check_sched(o)); -} - -void bnx2x_init_mcast_obj(struct bnx2x *bp, - struct bnx2x_mcast_obj *mcast_obj, - u16 mcast_cl_id, u32 mcast_cid, int func_id, - void *rdata, dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type) -{ - memset(mcast_obj, 0, sizeof(*mcast_obj)); - - __init_raw_obj(&mcast_obj->raw, mcast_cl_id, mcast_cid, func_id, rdata, - rdata_mapping, state, pstate, type); - - INIT_LIST_HEAD(&mcast_obj->pending_cmds_head); - - mcast_obj->sched_state = BNX2X_FILTER_MCAST_SCHED; - mcast_obj->check_sched = bnx2x_mcast_check_sched; - mcast_obj->set_sched = bnx2x_mcast_set_sched; - mcast_obj->clear_sched = bnx2x_mcast_clear_sched; - - if (CHIP_IS_E2(bp)) { - mcast_obj->config_mcast = bnx2x_setup_mcast_e2; - mcast_obj->enqueue_cmd = bnx2x_enqueue_mcast_cmd; - mcast_obj->check_pending = bnx2x_check_mcast_pending; - /* TODO: There should be a proper HSI define for this number!!! */ - mcast_obj->max_cmd_len = 16; - mcast_obj->wait_comp = bnx2x_mcast_wait; - mcast_obj->set_one_rule = bnx2x_set_one_mcast_rule_e2; - mcast_obj->preamble = bnx2x_mcast_preamble_e2; - mcast_obj->postmortem = bnx2x_mcast_postmortem_e2; - } else if (CHIP_IS_E1(bp)) { - mcast_obj->config_mcast = bnx2x_setup_mcast_e1; - mcast_obj->enqueue_cmd = bnx2x_enqueue_mcast_cmd; - mcast_obj->check_pending = bnx2x_check_mcast_pending; - - if (CHIP_REV_IS_SLOW(bp)) - mcast_obj->max_cmd_len = BNX2X_MAX_EMUL_MULTI; - else - mcast_obj->max_cmd_len = BNX2X_MAX_MULTICAST; - - mcast_obj->wait_comp = bnx2x_mcast_wait; - mcast_obj->set_one_rule = bnx2x_set_one_mcast_rule_e1; - mcast_obj->preamble = bnx2x_mcast_preamble_e1; - mcast_obj->postmortem = bnx2x_mcast_postmortem_e1; - } else if (CHIP_IS_E1H(bp)) { - mcast_obj->config_mcast = bnx2x_setup_mcast_e1h; - mcast_obj->enqueue_cmd = NULL; - mcast_obj->check_pending = bnx2x_check_mcast_pending; - - /* 57711 doesn't send a ramrod, so it has unlimited credit - * for one command. - */ - mcast_obj->max_cmd_len = -1; - mcast_obj->wait_comp = bnx2x_mcast_wait; - mcast_obj->set_one_rule = NULL; - mcast_obj->preamble = bnx2x_mcast_preamble_e1h; - mcast_obj->postmortem = bnx2x_mcast_postmortem_e1h; - } else { - BNX2X_ERR("Do not support chips others than E1X and E2\n"); - BUG(); - } -} - -/*************************** Credit handling **********************************/ - -/** - * atomic_add_ifless - adds if the result is less than a given - * value. - * @param v pointer of type atomic_t - * @param a the amount to add to v... - * @param u ...if (v + a) is less than u. - * - * @return TRUE if (v + a) was less than u, and FALSE - * otherwise. - */ -static inline bool __atomic_add_ifless(atomic_t *v, int a, int u) -{ - int c, old; - - c = atomic_read(v); - for (;;) { - if (unlikely(c + a >= u)) - return false; - - old = atomic_cmpxchg((v), c, c + a); - if (likely(old == c)) - break; - c = old; - } - - return true; -} - -/** - * atomic_dec_ifmoe - dec if the result is more or equal than a - * given value. - * @param v pointer of type atomic_t - * @param a the amount to dec from v... - * @param u ...if (v - a) is more or equal than u. - * - * @return TRUE if (v - a) was more or equal than u, and FALSE - * otherwise. - */ -static inline bool __atomic_dec_ifmoe(atomic_t *v, int a, int u) -{ - int c, old; - - c = atomic_read(v); - for (;;) { - if (unlikely(c - a < u)) - return false; - - old = atomic_cmpxchg((v), c, c - a); - if (likely(old == c)) - break; - c = old; - } - - return true; -} - -static bool bnx2x_credit_pool_get(struct bnx2x_credit_pool_obj *o, int cnt) -{ - int rc; - - smp_mb(); - rc = __atomic_dec_ifmoe(&o->credit, cnt, 0); - smp_mb(); - - return rc; -} - -static bool bnx2x_credit_pool_put(struct bnx2x_credit_pool_obj *o, int cnt) -{ - bool rc; - - smp_mb(); - - /* Don't let to refill if credit + cnt > pool_sz */ - rc = __atomic_add_ifless(&o->credit, cnt, o->pool_sz + 1); - - smp_mb(); - - return rc; -} - -static int bnx2x_credit_pool_check(struct bnx2x_credit_pool_obj *o) -{ - int cur_credit; - - smp_mb(); - cur_credit = atomic_read(&o->credit); - - return cur_credit; -} - -static bool bnx2x_credit_pool_always_true(struct bnx2x_credit_pool_obj *o, - int cnt) -{ - return true; -} - -/** - * Initialize credit pool internals. - * - * @param p - * @param credit Pool size - if negative pool operations will - * always succeed (unlimited pool) - */ -static inline void __init_credit_pool(struct bnx2x_credit_pool_obj *p, - int credit) -{ - /* Zero the object first */ - memset(p, 0, sizeof(*p)); - - atomic_set(&p->credit, credit); - p->pool_sz = credit; - - /* Commit the change */ - smp_mb(); - - p->check = bnx2x_credit_pool_check; - - /* if pool credit is negative - disable the checks */ - if (credit >= 0) { - p->put = bnx2x_credit_pool_put; - p->get = bnx2x_credit_pool_get; - } else { - p->put = bnx2x_credit_pool_always_true; - p->get = bnx2x_credit_pool_always_true; - } -} - -/** - * Calculates the number of active (not hidden) functions on the - * current path. - * - * @param bp Function driver handle. It will be used to define - * the current path. - * - * @return Number of active (not hidden) functions on the - * current path - */ -static inline int __get_path_func_num_e2(struct bnx2x *bp) -{ - int func_num = 0, i; - - /* Calculate a number of functions enabled on the current - * PATH. - */ - for (i = 0; i < E1H_FUNC_MAX / 2; i++) { - u32 func_config = - MF_CFG_RD(bp, - func_mf_config[BP_PORT(bp) + 2 * i]. - config); - func_num += - ((func_config & FUNC_MF_CFG_FUNC_HIDE) ? 0 : 1); - } - - WARN_ON(!func_num); - - return func_num; -} - - -void bnx2x_init_mac_credit_pool(struct bnx2x *bp, - struct bnx2x_credit_pool_obj *p) -{ - if (CHIP_IS_E1x(bp)) { - /* We actually bind the MACs location CAM according to the - * MAC type for 57710 and 57711 and there is enough space in - * CAM for any possible configuration. Therefore there is no - * need for crediting on these chips. - */ - __init_credit_pool(p, -1); - } else { - int func_num = __get_path_func_num_e2(bp); - - /** CAM credit is equaly divided between all active functions - * on the PATH. - */ - if (func_num > 0) - __init_credit_pool(p, MAX_MAC_CREDIT_E2 / func_num); - else - /* this should never happen! Block MAC operations. */ - __init_credit_pool(p, 0); - - } -} - -void bnx2x_init_vlan_credit_pool(struct bnx2x *bp, - struct bnx2x_credit_pool_obj *p) -{ - if (CHIP_IS_E1x(bp)) { - /* There is no VLAN configuration in HW on 57710 and 57711 */ - __init_credit_pool(p, -1); - } else { - int func_num = __get_path_func_num_e2(bp); - - /** CAM credit is equaly divided between all active functions - * on the PATH. - */ - if (func_num > 0) - __init_credit_pool(p, MAX_VLAN_CREDIT_E2 / func_num); - else - /* this should never happen! Block VLAN operations. */ - __init_credit_pool(p, 0); - } -} - - -/****************** RSS Configuration ******************/ -static inline void __storm_read_struct(struct bnx2x *bp, u32 addr, size_t size, - u32 *data) -{ - int i; - for (i = 0; i < size/4; i++) - data[i] = REG_RD(bp, addr + (i * 4)); -} - -/** - * Configure RSS for 57710 and 57711. - * We are not going to send a ramrod but will write directly - * into the TSTORM internal memory. We will also configure RSS - * hash keys configuration in SRC block if this is a PMF. - * - * @param bp - * @param p - * - * @return 0 - */ -static int bnx2x_setup_rss_e1x(struct bnx2x *bp, - struct bnx2x_config_rss_params *p) -{ - struct bnx2x_raw_obj *r = &p->rss_obj->raw; - struct eth_rss_update_ramrod_data_e1x *data = - (struct eth_rss_update_ramrod_data_e1x *)(r->rdata); - u8 rss_mode = 0; - int i; - - memset(data, 0, sizeof(*data)); - - DP(NETIF_MSG_IFUP, "Configuring RSS\n"); - - /* RSS mode */ - if (test_bit(BNX2X_RSS_MODE_DISABLED, &p->rss_flags)) - rss_mode = ETH_RSS_MODE_DISABLED; - else if (test_bit(BNX2X_RSS_MODE_REGULAR, &p->rss_flags)) - rss_mode = ETH_RSS_MODE_REGULAR; - else if (test_bit(BNX2X_RSS_MODE_VLAN_PRI, &p->rss_flags)) - rss_mode = ETH_RSS_MODE_VLAN_PRI; - else if (test_bit(BNX2X_RSS_MODE_E1HOV_PRI, &p->rss_flags)) - rss_mode = ETH_RSS_MODE_E1HOV_PRI; - else if (test_bit(BNX2X_RSS_MODE_IP_DSCP, &p->rss_flags)) - rss_mode = ETH_RSS_MODE_IP_DSCP; - else if (test_bit(BNX2X_RSS_MODE_E2_INTEG, &p->rss_flags)) - rss_mode = ETH_RSS_MODE_E2_INTEG; - - data->func_config.config_flags |= (rss_mode << - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_MODE_SHIFT); - - DP(NETIF_MSG_IFUP, "rss_mode=%d\n", rss_mode); - - /* RSS capabilities */ - if (test_bit(BNX2X_RSS_IPV4, &p->rss_flags)) - data->func_config.config_flags |= - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_CAPABILITY; - - if (test_bit(BNX2X_RSS_IPV4_TCP, &p->rss_flags)) - data->func_config.config_flags |= - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV4_TCP_CAPABILITY; - - if (test_bit(BNX2X_RSS_IPV6, &p->rss_flags)) - data->func_config.config_flags |= - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_CAPABILITY; - - if (test_bit(BNX2X_RSS_IPV6_TCP, &p->rss_flags)) - data->func_config.config_flags |= - TSTORM_ETH_FUNCTION_COMMON_CONFIG_RSS_IPV6_TCP_CAPABILITY; - - /* TODO: Remove me!!! */ - /* Set TPA_ENABLE flag */ - if (bp->flags & TPA_ENABLE_FLAG) - data->func_config.config_flags |= - TSTORM_ETH_FUNCTION_COMMON_CONFIG_ENABLE_TPA; - - /* Hashing mask */ - data->func_config.rss_result_mask = p->rss_result_mask; - - /* Indirection table */ - memcpy(&data->indirection_table[0], &p->ind_table[0], - T_ETH_INDIRECTION_TABLE_SIZE); - - /* RSS keys */ - if (bp->port.pmf) { - int j; - u32 start, end; - - if (BP_PORT(bp)) { - start = SRC_REG_KEYRSS1_0; - end = SRC_REG_KEYRSS1_9; - } else { - start = SRC_REG_KEYRSS0_0; - end = SRC_REG_KEYRSS0_9; - } - - WARN_ON(end - start + 4 != sizeof(p->rss_key)); - - for (i = start, j = 0; i <= end; i += 4, j++) - REG_WR(bp, i, p->rss_key[j]); - } - - /* RSS update flags */ - if (test_bit(BNX2X_RSS_UPDATE_ETH, &p->rss_flags)) - data->rss_config.flags |= RSS_UPDATE_CONFIG_ETH_UPDATE_ENABLE; - - if (test_bit(BNX2X_RSS_UPDATE_TOE, &p->rss_flags)) { - data->rss_config.flags |= RSS_UPDATE_CONFIG_TOE_UPDATE_ENABLE; - data->rss_config.toe_rss_bitmap = p->toe_rss_bitmap; - } - - /* Commit writes towards the memory */ - mb(); - mmiowb(); - - - /* Send a ramrod */ - return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_RSS_UPDATE, r->cid, - U64_HI(r->rdata_mapping), - U64_LO(r->rdata_mapping), 0); -} - -/** - * Configure RSS for 57712: we will send on UPDATE ramrod for - * that matter. - * - * @param bp - * @param p - * - * @return int - */ -static int bnx2x_setup_rss_e2(struct bnx2x *bp, - struct bnx2x_config_rss_params *p) -{ - struct bnx2x_raw_obj *r = &p->rss_obj->raw; - struct eth_rss_update_ramrod_data_e2 *data = - (struct eth_rss_update_ramrod_data_e2 *)(r->rdata); - - memset(data, 0, sizeof(*data)); - - DP(NETIF_MSG_IFUP, "Configuring RSS\n"); - - /* RSS capabilities */ - if (test_bit(BNX2X_RSS_IPV4, &p->rss_flags)) - data->capabilities |= ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_CAPABILITY; - - if (test_bit(BNX2X_RSS_IPV4_TCP, &p->rss_flags)) - data->capabilities |= - ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV4_TCP_CAPABILITY; - - if (test_bit(BNX2X_RSS_IPV6, &p->rss_flags)) - data->capabilities |= ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_CAPABILITY; - - if (test_bit(BNX2X_RSS_IPV6_TCP, &p->rss_flags)) - data->capabilities |= - ETH_RSS_UPDATE_RAMROD_DATA_E2_IPV6_TCP_CAPABILITY; - - /* Hashing mask */ - data->rss_result_mask = p->rss_result_mask; - - /* Indirection table */ - memcpy(&data->indirection_table[0], &p->ind_table[0], - T_ETH_INDIRECTION_TABLE_SIZE); - - /* RSS keys */ - memcpy(&data->rss_key[0], &p->rss_key[0], sizeof(data->rss_key)); - - /* RSS update flags */ - if (test_bit(BNX2X_RSS_UPDATE_ETH, &p->rss_flags)) - data->rss_config.flags |= RSS_UPDATE_CONFIG_ETH_UPDATE_ENABLE; - - if (test_bit(BNX2X_RSS_UPDATE_TOE, &p->rss_flags)) { - data->rss_config.flags |= RSS_UPDATE_CONFIG_TOE_UPDATE_ENABLE; - data->rss_config.toe_rss_bitmap = p->toe_rss_bitmap; - } - - /* Commit writes towards the memory before sending a ramrod */ - mb(); - - /* Send a ramrod */ - return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_RSS_UPDATE, r->cid, - U64_HI(r->rdata_mapping), - U64_LO(r->rdata_mapping), 0); -} - -int bnx2x_config_rss(struct bnx2x *bp, struct bnx2x_config_rss_params *p) -{ - int rc; - struct bnx2x_rss_config_obj *o = p->rss_obj; - struct bnx2x_raw_obj *r = &o->raw; - - r->set_pending(r); - - rc = o->config_rss(bp, p); - if (rc) { - r->clear_pending(r); - return rc; - } - - if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { - rc = r->wait_comp(bp, r); - if (rc) - return rc; - } - - return 0; -} - - -void bnx2x_init_rss_config_obj(struct bnx2x *bp, - struct bnx2x_rss_config_obj *rss_obj, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type) -{ - __init_raw_obj(&rss_obj->raw, cl_id, cid, func_id, rdata, rdata_mapping, - state, pstate, type); - - if (CHIP_IS_E2(bp)) { - rss_obj->config_rss = bnx2x_setup_rss_e2; - } else if (CHIP_IS_E1x(bp)) { - rss_obj->config_rss = bnx2x_setup_rss_e1x; - } else { - BNX2X_ERR("Do not support chips others than E1X and E2\n"); - BUG(); - } -} - -/********************** Client state update ***********************************/ - -int bnx2x_fw_cl_update(struct bnx2x *bp, - struct bnx2x_client_update_params *params) -{ - struct client_update_ramrod_data *data = - (struct client_update_ramrod_data *)params->rdata; - dma_addr_t data_mapping = params->rdata_mapping; - int rc; - - memset(data, 0, sizeof(*data)); - - /* Client ID of the client to update */ - data->client_id = params->cl_id; - - /* Default VLAN value */ - data->default_vlan = cpu_to_le16(params->def_vlan); - - /* Inner VLAN stripping */ - data->inner_vlan_removal_enable_flg = - test_bit(BNX2X_CL_UPDATE_IN_VLAN_REM, ¶ms->update_flags); - data->inner_vlan_removal_change_flg = - test_bit(BNX2X_CL_UPDATE_IN_VLAN_REM_CHNG, - ¶ms->update_flags); - - /* Outer VLAN sripping */ - data->outer_vlan_removal_enable_flg = - test_bit(BNX2X_CL_UPDATE_OUT_VLAN_REM, ¶ms->update_flags); - data->outer_vlan_removal_change_flg = - test_bit(BNX2X_CL_UPDATE_OUT_VLAN_REM_CHNG, - ¶ms->update_flags); - - /* Drop packets that have source MAC that doesn't belong to this - * Client. - */ - data->anti_spoofing_enable_flg = - test_bit(BNX2X_CL_UPDATE_ANTI_SPOOF, ¶ms->update_flags); - data->anti_spoofing_change_flg = - test_bit(BNX2X_CL_UPDATE_ANTI_SPOOF_CHNG, - ¶ms->update_flags); - - /* Activate/Deactivate */ - data->activate_flg = - test_bit(BNX2X_CL_UPDATE_ACTIVATE, ¶ms->update_flags); - data->activate_change_flg = - test_bit(BNX2X_CL_UPDATE_ACTIVATE_CHNG, ¶ms->update_flags); - - /* Enable default VLAN */ - data->default_vlan_enable_flg = - test_bit(BNX2X_CL_UPDATE_DEF_VLAN_EN, ¶ms->update_flags); - data->default_vlan_change_flg = - test_bit(BNX2X_CL_UPDATE_DEF_VLAN_EN_CHNG, - ¶ms->update_flags); - - /* Set "pending" bit */ - set_bit(BNX2X_FILTER_CL_UPDATE_PENDING, &bp->sp_state); - - /* Send a ramrod */ - rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_CLIENT_UPDATE, params->cid, - U64_HI(data_mapping), U64_LO(data_mapping), 0); - if (rc) - return rc; - - /* Wait for completion */ - if (!bnx2x_wait_sp_comp(bp)) - return -EAGAIN; - - return 0; -} - diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.h deleted file mode 100644 index 0c16a92..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_sp_verbs.h +++ /dev/null @@ -1,544 +0,0 @@ -/* bnx2x_sp_verbs.h: Broadcom Everest network driver. - * - * Copyright 2010-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Maintained by: Eilon Greenstein - * Written by: Vladislav Zolotarov - * - */ -#ifndef BNX2X_SP_VERBS -#define BNX2X_SP_VERBS - -struct bnx2x; -struct bnx2x_fastpath; - -enum { - RAMROD_TX, - RAMROD_RX, - RAMROD_COMP_WAIT, - RAMROD_DRV_CLR_ONLY, -}; - -typedef enum { - BNX2X_OBJ_TYPE_RX, - BNX2X_OBJ_TYPE_TX, - BNX2X_OBJ_TYPE_RX_TX, -} bnx2x_obj_type; - -/* Filtering states */ -enum { - BNX2X_FILTER_MAC_PENDING, - BNX2X_FILTER_VLAN_PENDING, - BNX2X_FILTER_VLAN_MAC_PENDING, - BNX2X_FILTER_RX_MODE_PENDING, - BNX2X_FILTER_RX_MODE_SCHED, - BNX2X_FILTER_ISCSI_ETH_START_SCHED, - BNX2X_FILTER_ISCSI_ETH_STOP_SCHED, - BNX2X_FILTER_MCAST_PENDING, - BNX2X_FILTER_MCAST_SCHED, - BNX2X_FILTER_RSS_CONF_PENDING, - BNX2X_FILTER_CL_UPDATE_PENDING, - BNX2X_FILTER_TX_SWITCH_MAC_PENDING, -}; - -struct bnx2x_raw_obj { - int func_id; - - /* Client params */ - u16 cl_id; - u32 cid; - - /* Ramrod data buffer params */ - void *rdata; - dma_addr_t rdata_mapping; - - /* Ramrod state params */ - int state; /* "ramrod is pending" state bit */ - unsigned long *pstate; /* pointer to state buffer */ - - bnx2x_obj_type obj_type; - - int (*wait_comp)(struct bnx2x *bp, - struct bnx2x_raw_obj *o); - - bool (*check_pending)(struct bnx2x_raw_obj *o); - void (*clear_pending)(struct bnx2x_raw_obj *o); - void (*set_pending)(struct bnx2x_raw_obj *o); -}; - -/***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/ - -/** - * If entry is not NULL, it's valid - query on it. - */ -struct bnx2x_mac_list_query { - u8 *mac; - u8 *cl_id; -}; - -struct bnx2x_vlan_list_query { - u16 *vlan; - u8 *cl_id; -}; - -struct bnx2x_vlan_mac_list_query { - u16 *vlan; - u8 *mac; - u8 *cl_id; -}; - -union bnx2x_list_query { - struct bnx2x_mac_list_query mac; - struct bnx2x_vlan_list_query vlan; - struct bnx2x_vlan_mac_list_query vlan_mac; -}; - -struct bnx2x_mac_ramrod_data { - u8 mac[ETH_ALEN]; -}; - -struct bnx2x_vlan_ramrod_data { - u16 vlan; -}; - -struct bnx2x_vlan_mac_ramrod_data { - u8 mac[ETH_ALEN]; - u16 vlan; -}; - -/* TODO: Come up with a better name */ -struct bnx2x_list_elem { - struct list_head link; - union { - struct bnx2x_mac_ramrod_data mac; - struct bnx2x_vlan_ramrod_data vlan; - struct bnx2x_vlan_mac_ramrod_data vlan_mac; - } data; -}; - - -/* VLAN_MAC specific flags */ -enum { - BNX2X_ETH_MAC, - BNX2X_BCAST_MAC, - BNX2X_ISCSI_ETH_MAC, - BNX2X_NETQ_ETH_MAC, - BNX2X_DONT_CONSUME_CAM_CREDIT, -}; - -struct bnx2x_vlan_mac_ramrod_params { - struct bnx2x_vlan_mac_obj *vlan_mac_obj; - unsigned long ramrod_flags; - unsigned long vlan_mac_flags; - - union { - struct bnx2x_mac_ramrod_data mac; - struct bnx2x_vlan_ramrod_data vlan; - struct bnx2x_vlan_mac_ramrod_data vlan_mac; - } data; -}; - -struct bnx2x_vlan_mac_obj { - struct bnx2x_raw_obj raw; - - /* Bookkeeping list: will prevent the addition of already existing - * entries. - */ - struct list_head head; - - /* MACs credit pool */ - struct bnx2x_credit_pool_obj *macs_pool; - - /* VLANs credit pool */ - struct bnx2x_credit_pool_obj *vlans_pool; - - /** - * Checks if ADD-ramrod with the given params may be performed. - * - * @return true if the element may be added - */ - - bool (*check_add)(struct bnx2x_vlan_mac_ramrod_params *p); - - /** - * Checks if DEL-ramrod with the given params may be performed. - * - * @return true if the element may be deleted - */ - struct bnx2x_list_elem * - (*check_del)(struct bnx2x_vlan_mac_ramrod_params *p); - - /** - * Update the relevant credit object(s) (consume/return - * correspondingly). - */ - bool (*get_credit)(struct bnx2x_vlan_mac_obj *o); - bool (*put_credit)(struct bnx2x_vlan_mac_obj *o); - - /** - * @param add Set to 0 if DELETE rule is requested - */ - int (*config_rule)(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, - struct bnx2x_list_elem *pos, - bool add); -}; - -/* RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMA */ - -/* RX_MODE ramrod spesial flags: set in rx_mode_flags field in - * a bnx2x_rx_mode_ramrod_params. - */ -enum { - BNX2X_RX_MODE_FCOE_ETH, -}; - -enum { - BNX2X_ACCEPT_UNICAST, - BNX2X_ACCEPT_MULTICAST, - BNX2X_ACCEPT_ALL_UNICAST, - BNX2X_ACCEPT_ALL_MULTICAST, - BNX2X_ACCEPT_BROADCAST, - BNX2X_ACCEPT_UNMATCHED, - BNX2X_ACCEPT_ANY_VLAN -}; -struct bnx2x_rx_mode_ramrod_params { - struct bnx2x_rx_mode_obj *rx_mode_obj; - unsigned long *pstate; - int state; - u16 cl_id; - u32 cid; - int func_id; - unsigned long ramrod_flags; - unsigned long rx_mode_flags; - /* rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to - * a tstorm_eth_mac_filter_config (e1x). - * */ - void *rdata; - dma_addr_t rdata_mapping; - unsigned long accept_flags; -}; - -struct bnx2x_rx_mode_obj { - int (*config_rx_mode)(struct bnx2x *bp, - struct bnx2x_rx_mode_ramrod_params *p); - - int (*wait_comp)(struct bnx2x *bp, - struct bnx2x_rx_mode_ramrod_params *p); -}; - -/********************** Set multicast group ***********************************/ - -struct bnx2x_mcast_list_elem { - struct list_head link; - u8 *mac; -}; - -struct bnx2x_mcast_ramrod_params { - struct bnx2x_mcast_obj *mcast_obj; - - /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */ - unsigned long ramrod_flags; - - struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */ - /** TODO: - * - rename it to macs_num. - * - Add a new command type for handling pending commands - * (remove "zero semantics"). - * - * Length of mcast_list. If zero and ADD_CONT command - post - * pending commands. - */ - int mcast_list_len; -}; - -struct bnx2x_mcast_obj { - struct bnx2x_raw_obj raw; - -#define BNX2X_MCAST_BINS_NUM 256 -#define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64) - u64 vec[BNX2X_MCAST_VEC_SZ]; - - /** Number of BINs to clear. Should be updated immediately - * when a command arrives in order to properly create DEL - * commands. - */ - int num_bins_set; - - /* Pending commands */ - struct list_head pending_cmds_head; - - /* A state that is set in raw.pstate, when there are pending commands */ - int sched_state; - - /* Maximal number of mcast MACs configured in one command */ - int max_cmd_len; - - /* Total number of currently pending MACs to configure: both - * in the pending commands list and in the current command. - */ - int total_pending_num; - - /** - * @param add if true - add a new multicast group, otherwise - * clears up the previous mcast configuration. - */ - int (*config_mcast)(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add); - - int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o, - struct bnx2x_mcast_ramrod_params *p, - bool add); - - void (*set_one_rule)(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, int idx, - u8 *mac, bool add); - - /** Checks if there are more mcast MACs to be set or a previous - * command is still pending. - */ - bool (*check_pending)(struct bnx2x_mcast_obj *o); - - /** - * Set/Clear/Check SCHEDULED state of the object - */ - void (*set_sched)(struct bnx2x_mcast_obj *o); - void (*clear_sched)(struct bnx2x_mcast_obj *o); - bool (*check_sched)(struct bnx2x_mcast_obj *o); - - /* Wait until all pending commands complete */ - int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o); - - /** - * Handle the internal object counters needed for proper - * commands handling. Checks that the provided parameters are - * feasible. - */ - int (*preamble)(struct bnx2x *bp, struct bnx2x_mcast_ramrod_params *p, - bool add_cont); - - /** - * Restore the values of internal counters in case of a failure. - */ - void (*postmortem)(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - int old_num_bins); -}; - -/*************************** Credit handling **********************************/ -struct bnx2x_credit_pool_obj { - - /* Current amount of credit in the pool */ - atomic_t credit; - - /* Maximum allowed credit. put() will check against it. */ - int pool_sz; - - /** - * Get the requested amount of credit from the pool. - * - * @param cnt Amount of requested credit - * @return TRUE if the operation is successful - */ - bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt); - - /** - * Returns the credit to the pool. - * - * @param cnt Amount of credit to return - * @return TRUE if the operation is successful - */ - bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt); - - /** - * Reads the current amount of credit. - */ - int (*check)(struct bnx2x_credit_pool_obj *o); -}; - -/*************************** RSS configuration ********************************/ -enum { - /* RSS_MODE bits are mutually exclusive */ - BNX2X_RSS_MODE_DISABLED, - BNX2X_RSS_MODE_REGULAR, - BNX2X_RSS_MODE_VLAN_PRI, - BNX2X_RSS_MODE_E1HOV_PRI, - BNX2X_RSS_MODE_IP_DSCP, - BNX2X_RSS_MODE_E2_INTEG, - - BNX2X_RSS_IPV4, - BNX2X_RSS_IPV4_TCP, - BNX2X_RSS_IPV6, - BNX2X_RSS_IPV6_TCP, - - BNX2X_RSS_UPDATE_ETH, - BNX2X_RSS_UPDATE_TOE, -}; - -struct bnx2x_config_rss_params { - struct bnx2x_rss_config_obj *rss_obj; - - /* may have RAMROD_COMP_WAIT set only */ - unsigned long ramrod_flags; - - /* BNX2X_RSS_X bits */ - unsigned long rss_flags; - - /* Number hash bits to take into an account */ - u8 rss_result_mask; - - /* Indirection table */ - u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE]; - - /* RSS hash values */ - u32 rss_key[10]; - - /* valid only iff BNX2X_RSS_UPDATE_TOE is set */ - u16 toe_rss_bitmap; -}; - -struct bnx2x_rss_config_obj { - struct bnx2x_raw_obj raw; - - int (*config_rss)(struct bnx2x *bp, - struct bnx2x_config_rss_params *p); -}; - -/********************** Client state update ***********************************/ -enum { - BNX2X_CL_UPDATE_IN_VLAN_REM, - BNX2X_CL_UPDATE_IN_VLAN_REM_CHNG, - BNX2X_CL_UPDATE_OUT_VLAN_REM, - BNX2X_CL_UPDATE_OUT_VLAN_REM_CHNG, - BNX2X_CL_UPDATE_ANTI_SPOOF, - BNX2X_CL_UPDATE_ANTI_SPOOF_CHNG, - BNX2X_CL_UPDATE_ACTIVATE, - BNX2X_CL_UPDATE_ACTIVATE_CHNG, - BNX2X_CL_UPDATE_DEF_VLAN_EN, - BNX2X_CL_UPDATE_DEF_VLAN_EN_CHNG, -}; - -struct bnx2x_client_update_params { - unsigned long update_flags; - u32 cid; - u16 def_vlan; - u8 cl_id; - - void *rdata; - dma_addr_t rdata_mapping; -}; - - -/********************** Interfaces ********************************************/ -/********************* VLAN-MAC ****************/ -void bnx2x_init_mac_obj(struct bnx2x *bp, - struct bnx2x_vlan_mac_obj *mac_obj, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type, - struct bnx2x_credit_pool_obj *macs_pool); - -void bnx2x_init_vlan_obj(struct bnx2x *bp, - struct bnx2x_vlan_mac_obj *vlan_obj, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type, - struct bnx2x_credit_pool_obj *vlans_pool); - -void bnx2x_init_vlan_mac_obj(struct bnx2x *bp, - struct bnx2x_vlan_mac_obj *vlan_mac_obj, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type, - struct bnx2x_credit_pool_obj *macs_pool, - struct bnx2x_credit_pool_obj *vlans_pool); - -int bnx2x_config_vlan_mac(struct bnx2x *bp, - struct bnx2x_vlan_mac_ramrod_params *p, bool add); - -/********************* RX MODE ****************/ - -void bnx2x_init_rx_mode_obj(struct bnx2x *bp, struct bnx2x_rx_mode_obj *o); - -int bnx2x_config_rx_mode(struct bnx2x *bp, struct bnx2x_rx_mode_ramrod_params *p); - -/****************** MULTICASTS ****************/ - -void bnx2x_init_mcast_obj(struct bnx2x *bp, - struct bnx2x_mcast_obj *mcast_obj, - u16 mcast_cl_id, u32 mcast_cid, int func_id, - void *rdata, dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type); - -/** - * Configure multicast MACs list. May configure a new list - * provided in p->mcast_list or clean up a current - * configuration. Also if add_cont is TRUE and p->mcast_list_len - * is 0 will run commands from the pending list. - * - * If previous command is still pending or if number of MACs to - * configure is more that maximum number of MACs in one command, - * the current command will be enqueued to the tail of the - * pending commands list. - * - * @param bp - * @param p - * @param add_cont if TRUE, configure a new MACs list or - * continue to run pending commands (see above). - * - * @return 0 in case of success - */ -int bnx2x_config_mcast(struct bnx2x *bp, - struct bnx2x_mcast_ramrod_params *p, - bool add_cont); - -/****************** CREDIT POOL ****************/ -void bnx2x_init_mac_credit_pool(struct bnx2x *bp, - struct bnx2x_credit_pool_obj *p); -void bnx2x_init_vlan_credit_pool(struct bnx2x *bp, - struct bnx2x_credit_pool_obj *p); - -/****************** RSS CONFIGURATION ****************/ -void bnx2x_init_rss_config_obj(struct bnx2x *bp, - struct bnx2x_rss_config_obj *rss_obj, - u16 cl_id, u32 cid, int func_id, void *rdata, - dma_addr_t rdata_mapping, int state, - unsigned long *pstate, bnx2x_obj_type type); - -/** - * Updates RSS configuration according to provided parameters. - * - * @param bp - * @param p - * - * @return 0 in case of success - */ -int bnx2x_config_rss(struct bnx2x *bp, struct bnx2x_config_rss_params *p); - -/****************** CLIENT STATE UPDATE ****************/ - -/** - * Update a state of the existing Client according to the - * provided parameters. - * - * @param bp - * @param params Set of Client parameters to update. - * - * @return int - */ -int bnx2x_fw_cl_update(struct bnx2x *bp, - struct bnx2x_client_update_params *params); - - -#endif /* BNX2X_SP_VERBS */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_stats.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_stats.c new file mode 100644 index 0000000..fe04328 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_stats.c @@ -0,0 +1,1605 @@ +/* bnx2x_stats.c: Broadcom Everest network driver. + * + * Copyright (c) 2007-2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + * + * Maintained by: Eilon Greenstein + * Written by: Eliezer Tamir + * Based on code from Michael Chan's bnx2 driver + * UDP CSUM errata workaround by Arik Gendelman + * Slowpath and fastpath rework by Vladislav Zolotarov + * Statistics and Link management by Yitchak Gertner + * + */ + +#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */ +#include +#endif + +#if (LINUX_VERSION_CODE > 0x02060f) /* BNX2X_UPSTREAM */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#endif + +#include "bnx2x_stats.h" +#include "bnx2x_cmn.h" + +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ +#include "bnx2x_sriov.h" +#endif + +/* Statistics */ + +/* + * General service functions + */ + +static inline long bnx2x_hilo(u32 *hiref) +{ + u32 lo = *(hiref + 1); +#if (BITS_PER_LONG == 64) + u32 hi = *hiref; + + return HILO_U64(hi, lo); +#else + return lo; +#endif +} + +static inline u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp) +{ + u16 res = sizeof(struct host_port_stats) >> 2; + + /* if PFC stats are not supported by the MFW, don't DMA them */ + if (!(bp->flags & BC_SUPPORTS_PFC_STATS)) + res -= (sizeof(u32)*4) >> 2; + + return res; +} + +/* + * Init service functions + */ + +/* Post the next statistics ramrod. Protect it with the spin in + * order to ensure the strict order between statistics ramrods + * (each ramrod has a sequence number passed in a + * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be + * sent in order). + */ +static void bnx2x_storm_stats_post(struct bnx2x *bp) +{ + if (!bp->stats_pending) { + int rc; + + spin_lock_bh(&bp->stats_lock); + + if (bp->stats_pending) { + spin_unlock_bh(&bp->stats_lock); + return; + } + + bp->fw_stats_req->hdr.drv_stats_counter = + cpu_to_le16(bp->stats_counter++); + + DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n", + bp->fw_stats_req->hdr.drv_stats_counter); + +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ + /* adjust the ramrod to include VF queues statistics */ + bnx2x_iov_adjust_stats_req(bp); +#endif + + + /* send FW stats ramrod */ + rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0, + U64_HI(bp->fw_stats_req_mapping), + U64_LO(bp->fw_stats_req_mapping), + NONE_CONNECTION_TYPE); + if (rc == 0) + bp->stats_pending = 1; + + spin_unlock_bh(&bp->stats_lock); + } +} + +static void bnx2x_hw_stats_post(struct bnx2x *bp) +{ + struct dmae_command *dmae = &bp->stats_dmae; + u32 *stats_comp = bnx2x_sp(bp, stats_comp); + + *stats_comp = DMAE_COMP_VAL; + if (CHIP_REV_IS_SLOW(bp)) + return; + + /* Update MCP's statistics if possible */ + if (bp->func_stx) + memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats, + sizeof(bp->func_stats)); + + /* loader */ + if (bp->executer_idx) { + int loader_idx = PMF_DMAE_C(bp); + u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, + true, DMAE_COMP_GRC); + opcode = bnx2x_dmae_opcode_clr_src_reset(opcode); + + memset(dmae, 0, sizeof(struct dmae_command)); + dmae->opcode = opcode; + dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0])); + dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0])); + dmae->dst_addr_lo = (DMAE_REG_CMD_MEM + + sizeof(struct dmae_command) * + (loader_idx + 1)) >> 2; + dmae->dst_addr_hi = 0; + dmae->len = sizeof(struct dmae_command) >> 2; + if (CHIP_IS_E1(bp)) + dmae->len--; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + + *stats_comp = 0; + bnx2x_post_dmae(bp, dmae, loader_idx); + + } else if (bp->func_stx) { + *stats_comp = 0; + bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp)); + } +} + +static int bnx2x_stats_comp(struct bnx2x *bp) +{ + u32 *stats_comp = bnx2x_sp(bp, stats_comp); + int cnt = 10; + + might_sleep(); + while (*stats_comp != DMAE_COMP_VAL) { + if (!cnt) { + BNX2X_ERR("timeout waiting for stats finished\n"); + break; + } + cnt--; + usleep_range(1000, 1000); + } + return 1; +} + +/* + * Statistics service functions + */ + +static void bnx2x_stats_pmf_update(struct bnx2x *bp) +{ + struct dmae_command *dmae; + u32 opcode; + int loader_idx = PMF_DMAE_C(bp); + u32 *stats_comp = bnx2x_sp(bp, stats_comp); + + /* sanity */ + if (!bp->port.pmf || !bp->port.port_stx) { + BNX2X_ERR("BUG!\n"); + return; + } + + bp->executer_idx = 0; + + opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0); + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); + dmae->src_addr_lo = bp->port.port_stx >> 2; + dmae->src_addr_hi = 0; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); + dmae->len = DMAE_LEN32_RD_MAX; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); + dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX; + dmae->src_addr_hi = 0; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) + + DMAE_LEN32_RD_MAX * 4); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) + + DMAE_LEN32_RD_MAX * 4); + dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX; + + dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_val = DMAE_COMP_VAL; + + *stats_comp = 0; + bnx2x_hw_stats_post(bp); + bnx2x_stats_comp(bp); +} + +static void bnx2x_port_stats_init(struct bnx2x *bp) +{ + struct dmae_command *dmae; + int port = BP_PORT(bp); + u32 opcode; + int loader_idx = PMF_DMAE_C(bp); + u32 mac_addr; + u32 *stats_comp = bnx2x_sp(bp, stats_comp); + + /* sanity */ + if (!bp->link_vars.link_up || !bp->port.pmf) { + BNX2X_ERR("BUG!\n"); + return; + } + + bp->executer_idx = 0; + + /* MCP */ + opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, + true, DMAE_COMP_GRC); + + if (bp->port.port_stx) { + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); + dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); + dmae->dst_addr_lo = bp->port.port_stx >> 2; + dmae->dst_addr_hi = 0; + dmae->len = bnx2x_get_port_stats_dma_len(bp); + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + } + + if (bp->func_stx) { + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); + dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); + dmae->dst_addr_lo = bp->func_stx >> 2; + dmae->dst_addr_hi = 0; + dmae->len = sizeof(struct host_func_stats) >> 2; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + } + + /* MAC */ + opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, + true, DMAE_COMP_GRC); + + /* EMAC is special */ + if (bp->link_vars.mac_type == MAC_TYPE_EMAC) { + mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0); + + /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/ + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_lo = (mac_addr + + EMAC_REG_EMAC_RX_STAT_AC) >> 2; + dmae->src_addr_hi = 0; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats)); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats)); + dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + + /* EMAC_REG_EMAC_RX_STAT_AC_28 */ + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_lo = (mac_addr + + EMAC_REG_EMAC_RX_STAT_AC_28) >> 2; + dmae->src_addr_hi = 0; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) + + offsetof(struct emac_stats, rx_stat_falsecarriererrors)); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) + + offsetof(struct emac_stats, rx_stat_falsecarriererrors)); + dmae->len = 1; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + + /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/ + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_lo = (mac_addr + + EMAC_REG_EMAC_TX_STAT_AC) >> 2; + dmae->src_addr_hi = 0; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) + + offsetof(struct emac_stats, tx_stat_ifhcoutoctets)); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) + + offsetof(struct emac_stats, tx_stat_ifhcoutoctets)); + dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + } else { + u32 tx_src_addr_lo, rx_src_addr_lo; + u16 rx_len, tx_len; + + /* configure the params according to MAC type */ + switch (bp->link_vars.mac_type) { + case MAC_TYPE_BMAC: + mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM : + NIG_REG_INGRESS_BMAC0_MEM); + + /* BIGMAC_REGISTER_TX_STAT_GTPKT .. + BIGMAC_REGISTER_TX_STAT_GTBYT */ + if (CHIP_IS_E1x(bp)) { + tx_src_addr_lo = (mac_addr + + BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; + tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT - + BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; + rx_src_addr_lo = (mac_addr + + BIGMAC_REGISTER_RX_STAT_GR64) >> 2; + rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ - + BIGMAC_REGISTER_RX_STAT_GR64) >> 2; + } else { + tx_src_addr_lo = (mac_addr + + BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2; + tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT - + BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2; + rx_src_addr_lo = (mac_addr + + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2; + rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ - + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2; + } + break; + + case MAC_TYPE_UMAC: /* handled by MSTAT */ + case MAC_TYPE_XMAC: /* handled by MSTAT */ + default: + mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0; + tx_src_addr_lo = (mac_addr + + MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2; + rx_src_addr_lo = (mac_addr + + MSTAT_REG_RX_STAT_GR64_LO) >> 2; + tx_len = sizeof(bp->slowpath-> + mac_stats.mstat_stats.stats_tx) >> 2; + rx_len = sizeof(bp->slowpath-> + mac_stats.mstat_stats.stats_rx) >> 2; + break; + } + + /* TX stats */ + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_lo = tx_src_addr_lo; + dmae->src_addr_hi = 0; + dmae->len = tx_len; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats)); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats)); + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + + /* RX stats */ + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_hi = 0; + dmae->src_addr_lo = rx_src_addr_lo; + dmae->dst_addr_lo = + U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2)); + dmae->dst_addr_hi = + U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2)); + dmae->len = rx_len; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + } + + /* NIG */ + if (!CHIP_IS_E3(bp)) { + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 : + NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2; + dmae->src_addr_hi = 0; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) + + offsetof(struct nig_stats, egress_mac_pkt0_lo)); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) + + offsetof(struct nig_stats, egress_mac_pkt0_lo)); + dmae->len = (2*sizeof(u32)) >> 2; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = opcode; + dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : + NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; + dmae->src_addr_hi = 0; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) + + offsetof(struct nig_stats, egress_mac_pkt1_lo)); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) + + offsetof(struct nig_stats, egress_mac_pkt1_lo)); + dmae->len = (2*sizeof(u32)) >> 2; + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + } + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, + true, DMAE_COMP_PCI); + dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD : + NIG_REG_STAT0_BRB_DISCARD) >> 2; + dmae->src_addr_hi = 0; + dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats)); + dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats)); + dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2; + + dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_val = DMAE_COMP_VAL; + + *stats_comp = 0; +} + +static void bnx2x_func_stats_init(struct bnx2x *bp) +{ + struct dmae_command *dmae = &bp->stats_dmae; + u32 *stats_comp = bnx2x_sp(bp, stats_comp); + + /* sanity */ + if (!bp->func_stx) { + BNX2X_ERR("BUG!\n"); + return; + } + + bp->executer_idx = 0; + memset(dmae, 0, sizeof(struct dmae_command)); + + dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, + true, DMAE_COMP_PCI); + dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); + dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); + dmae->dst_addr_lo = bp->func_stx >> 2; + dmae->dst_addr_hi = 0; + dmae->len = sizeof(struct host_func_stats) >> 2; + dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_val = DMAE_COMP_VAL; + + *stats_comp = 0; +} + +static void bnx2x_stats_start(struct bnx2x *bp) +{ + if (bp->port.pmf) + bnx2x_port_stats_init(bp); + + else if (bp->func_stx) + bnx2x_func_stats_init(bp); + + bnx2x_hw_stats_post(bp); + bnx2x_storm_stats_post(bp); +} + +static void bnx2x_stats_pmf_start(struct bnx2x *bp) +{ + bnx2x_stats_comp(bp); + bnx2x_stats_pmf_update(bp); + bnx2x_stats_start(bp); +} + +static void bnx2x_stats_restart(struct bnx2x *bp) +{ + bnx2x_stats_comp(bp); + bnx2x_stats_start(bp); +} + +static void bnx2x_bmac_stats_update(struct bnx2x *bp) +{ + struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); + struct bnx2x_eth_stats *estats = &bp->eth_stats; + struct { + u32 lo; + u32 hi; + } diff; + + if (CHIP_IS_E1x(bp)) { + struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats); + + /* the macros below will use "bmac1_stats" type */ + UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); + UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); + UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); + UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); + UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); + UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); + UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); + UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); + UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); + + UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); + UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); + UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); + UPDATE_STAT64(tx_stat_gt127, + tx_stat_etherstatspkts65octetsto127octets); + UPDATE_STAT64(tx_stat_gt255, + tx_stat_etherstatspkts128octetsto255octets); + UPDATE_STAT64(tx_stat_gt511, + tx_stat_etherstatspkts256octetsto511octets); + UPDATE_STAT64(tx_stat_gt1023, + tx_stat_etherstatspkts512octetsto1023octets); + UPDATE_STAT64(tx_stat_gt1518, + tx_stat_etherstatspkts1024octetsto1522octets); + UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); + UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); + UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); + UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); + UPDATE_STAT64(tx_stat_gterr, + tx_stat_dot3statsinternalmactransmiterrors); + UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); + + } else { + struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats); + struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old; + + /* the macros below will use "bmac2_stats" type */ + UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); + UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); + UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); + UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); + UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); + UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); + UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); + UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); + UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); + UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); + UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); + UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); + UPDATE_STAT64(tx_stat_gt127, + tx_stat_etherstatspkts65octetsto127octets); + UPDATE_STAT64(tx_stat_gt255, + tx_stat_etherstatspkts128octetsto255octets); + UPDATE_STAT64(tx_stat_gt511, + tx_stat_etherstatspkts256octetsto511octets); + UPDATE_STAT64(tx_stat_gt1023, + tx_stat_etherstatspkts512octetsto1023octets); + UPDATE_STAT64(tx_stat_gt1518, + tx_stat_etherstatspkts1024octetsto1522octets); + UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); + UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); + UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); + UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); + UPDATE_STAT64(tx_stat_gterr, + tx_stat_dot3statsinternalmactransmiterrors); + UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); + + /* collect PFC stats */ + pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi; + pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo; + ADD_64(pstats->pfc_frames_tx_hi, fwstats->pfc_frames_tx_hi, + pstats->pfc_frames_tx_lo, fwstats->pfc_frames_tx_lo); + + pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi; + pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo; + ADD_64(pstats->pfc_frames_rx_hi, fwstats->pfc_frames_rx_hi, + pstats->pfc_frames_rx_lo, fwstats->pfc_frames_rx_lo); + } + + estats->pause_frames_received_hi = + pstats->mac_stx[1].rx_stat_mac_xpf_hi; + estats->pause_frames_received_lo = + pstats->mac_stx[1].rx_stat_mac_xpf_lo; + + estats->pause_frames_sent_hi = + pstats->mac_stx[1].tx_stat_outxoffsent_hi; + estats->pause_frames_sent_lo = + pstats->mac_stx[1].tx_stat_outxoffsent_lo; + + estats->pfc_frames_received_hi = pstats->pfc_frames_rx_hi; + estats->pfc_frames_received_lo = pstats->pfc_frames_rx_lo; + estats->pfc_frames_sent_hi = pstats->pfc_frames_tx_hi; + estats->pfc_frames_sent_lo = pstats->pfc_frames_tx_lo; +} + +static void bnx2x_mstat_stats_update(struct bnx2x *bp) +{ + struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); + struct bnx2x_eth_stats *estats = &bp->eth_stats; + + struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats); + + ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets); + ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors); + ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts); + ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong); + ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments); + ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived); + ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered); + ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf); + ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent); + ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone); + + /* collect pfc stats */ + ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi, + pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo); + ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi, + pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo); + + ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets); + ADD_STAT64(stats_tx.tx_gt127, + tx_stat_etherstatspkts65octetsto127octets); + ADD_STAT64(stats_tx.tx_gt255, + tx_stat_etherstatspkts128octetsto255octets); + ADD_STAT64(stats_tx.tx_gt511, + tx_stat_etherstatspkts256octetsto511octets); + ADD_STAT64(stats_tx.tx_gt1023, + tx_stat_etherstatspkts512octetsto1023octets); + ADD_STAT64(stats_tx.tx_gt1518, + tx_stat_etherstatspkts1024octetsto1522octets); + ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047); + + ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095); + ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216); + ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383); + + ADD_STAT64(stats_tx.tx_gterr, + tx_stat_dot3statsinternalmactransmiterrors); + ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl); + + estats->etherstatspkts1024octetsto1522octets_hi = + pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi; + estats->etherstatspkts1024octetsto1522octets_lo = + pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo; + + estats->etherstatspktsover1522octets_hi = + pstats->mac_stx[1].tx_stat_mac_2047_hi; + estats->etherstatspktsover1522octets_lo = + pstats->mac_stx[1].tx_stat_mac_2047_lo; + + ADD_64(estats->etherstatspktsover1522octets_hi, + pstats->mac_stx[1].tx_stat_mac_4095_hi, + estats->etherstatspktsover1522octets_lo, + pstats->mac_stx[1].tx_stat_mac_4095_lo); + + ADD_64(estats->etherstatspktsover1522octets_hi, + pstats->mac_stx[1].tx_stat_mac_9216_hi, + estats->etherstatspktsover1522octets_lo, + pstats->mac_stx[1].tx_stat_mac_9216_lo); + + ADD_64(estats->etherstatspktsover1522octets_hi, + pstats->mac_stx[1].tx_stat_mac_16383_hi, + estats->etherstatspktsover1522octets_lo, + pstats->mac_stx[1].tx_stat_mac_16383_lo); + + estats->pause_frames_received_hi = + pstats->mac_stx[1].rx_stat_mac_xpf_hi; + estats->pause_frames_received_lo = + pstats->mac_stx[1].rx_stat_mac_xpf_lo; + + estats->pause_frames_sent_hi = + pstats->mac_stx[1].tx_stat_outxoffsent_hi; + estats->pause_frames_sent_lo = + pstats->mac_stx[1].tx_stat_outxoffsent_lo; + + estats->pfc_frames_received_hi = + pstats->pfc_frames_rx_hi; + estats->pfc_frames_received_lo = + pstats->pfc_frames_rx_lo; + estats->pfc_frames_sent_hi = + pstats->pfc_frames_tx_hi; + estats->pfc_frames_sent_lo = + pstats->pfc_frames_tx_lo; +} + +static void bnx2x_emac_stats_update(struct bnx2x *bp) +{ + struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats); + struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); + struct bnx2x_eth_stats *estats = &bp->eth_stats; + + UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets); + UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets); + UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors); + UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors); + UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors); + UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors); + UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts); + UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong); + UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments); + UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers); + UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived); + UPDATE_EXTEND_STAT(rx_stat_xoffstateentered); + UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived); + UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived); + UPDATE_EXTEND_STAT(tx_stat_outxonsent); + UPDATE_EXTEND_STAT(tx_stat_outxoffsent); + UPDATE_EXTEND_STAT(tx_stat_flowcontroldone); + UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions); + UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes); + UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes); + UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions); + UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions); + UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions); + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets); + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets); + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets); + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets); + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets); + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets); + UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets); + UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors); + + estats->pause_frames_received_hi = + pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi; + estats->pause_frames_received_lo = + pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo; + ADD_64(estats->pause_frames_received_hi, + pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, + estats->pause_frames_received_lo, + pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); + + estats->pause_frames_sent_hi = + pstats->mac_stx[1].tx_stat_outxonsent_hi; + estats->pause_frames_sent_lo = + pstats->mac_stx[1].tx_stat_outxonsent_lo; + ADD_64(estats->pause_frames_sent_hi, + pstats->mac_stx[1].tx_stat_outxoffsent_hi, + estats->pause_frames_sent_lo, + pstats->mac_stx[1].tx_stat_outxoffsent_lo); +} + +static int bnx2x_hw_stats_update(struct bnx2x *bp) +{ + struct nig_stats *new = bnx2x_sp(bp, nig_stats); + struct nig_stats *old = &(bp->port.old_nig_stats); + struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); + struct bnx2x_eth_stats *estats = &bp->eth_stats; + struct { + u32 lo; + u32 hi; + } diff; + + switch (bp->link_vars.mac_type) { + case MAC_TYPE_BMAC: + bnx2x_bmac_stats_update(bp); + break; + + case MAC_TYPE_EMAC: + bnx2x_emac_stats_update(bp); + break; + + case MAC_TYPE_UMAC: + case MAC_TYPE_XMAC: + bnx2x_mstat_stats_update(bp); + break; + + case MAC_TYPE_NONE: /* unreached */ + DP(BNX2X_MSG_STATS, + "stats updated by DMAE but no MAC active\n"); + return -1; + + default: /* unreached */ + BNX2X_ERR("Unknown MAC type\n"); + } + + ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo, + new->brb_discard - old->brb_discard); + ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo, + new->brb_truncate - old->brb_truncate); + + if (!CHIP_IS_E3(bp)) { + UPDATE_STAT64_NIG(egress_mac_pkt0, + etherstatspkts1024octetsto1522octets); + UPDATE_STAT64_NIG(egress_mac_pkt1, + etherstatspktsover1522octets); + } + + memcpy(old, new, sizeof(struct nig_stats)); + + memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]), + sizeof(struct mac_stx)); + estats->brb_drop_hi = pstats->brb_drop_hi; + estats->brb_drop_lo = pstats->brb_drop_lo; + + pstats->host_port_stats_counter++; + + if (!BP_NOMCP(bp)) { + u32 nig_timer_max = + SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer); + if (nig_timer_max != estats->nig_timer_max) { + estats->nig_timer_max = nig_timer_max; + BNX2X_ERR("NIG timer max (%u)\n", + estats->nig_timer_max); + } + } + + return 0; +} + +static int bnx2x_storm_stats_update(struct bnx2x *bp) +{ + struct tstorm_per_port_stats *tport = + &bp->fw_stats_data->port.tstorm_port_statistics; + struct tstorm_per_pf_stats *tfunc = + &bp->fw_stats_data->pf.tstorm_pf_statistics; + struct host_func_stats *fstats = &bp->func_stats; + struct bnx2x_eth_stats *estats = &bp->eth_stats; + struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old; + struct stats_counter *counters = &bp->fw_stats_data->storm_counters; + int i; + u16 cur_stats_counter; + + /* Make sure we use the value of the counter + * used for sending the last stats ramrod. + */ + spin_lock_bh(&bp->stats_lock); + cur_stats_counter = bp->stats_counter - 1; + spin_unlock_bh(&bp->stats_lock); + + /* are storm stats valid? */ + if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) { + DP(BNX2X_MSG_STATS, + "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n", + le16_to_cpu(counters->xstats_counter), bp->stats_counter); + return -EAGAIN; + } + + if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) { + DP(BNX2X_MSG_STATS, + "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n", + le16_to_cpu(counters->ustats_counter), bp->stats_counter); + return -EAGAIN; + } + + if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) { + DP(BNX2X_MSG_STATS, + "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n", + le16_to_cpu(counters->cstats_counter), bp->stats_counter); + return -EAGAIN; + } + + if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) { + DP(BNX2X_MSG_STATS, + "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n", + le16_to_cpu(counters->tstats_counter), bp->stats_counter); + return -EAGAIN; + } + + estats->error_bytes_received_hi = 0; + estats->error_bytes_received_lo = 0; + + for_each_eth_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + struct tstorm_per_queue_stats *tclient = + &bp->fw_stats_data->queue_stats[i]. + tstorm_queue_statistics; + struct tstorm_per_queue_stats *old_tclient = &fp->old_tclient; + struct ustorm_per_queue_stats *uclient = + &bp->fw_stats_data->queue_stats[i]. + ustorm_queue_statistics; + struct ustorm_per_queue_stats *old_uclient = &fp->old_uclient; + struct xstorm_per_queue_stats *xclient = + &bp->fw_stats_data->queue_stats[i]. + xstorm_queue_statistics; + struct xstorm_per_queue_stats *old_xclient = &fp->old_xclient; + struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; + struct bnx2x_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old; + + u32 diff; + + DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n", + i, xclient->ucast_pkts_sent, + xclient->bcast_pkts_sent, xclient->mcast_pkts_sent); + + DP(BNX2X_MSG_STATS, "---------------\n"); + + UPDATE_QSTAT(tclient->rcv_bcast_bytes, + total_broadcast_bytes_received); + UPDATE_QSTAT(tclient->rcv_mcast_bytes, + total_multicast_bytes_received); + UPDATE_QSTAT(tclient->rcv_ucast_bytes, + total_unicast_bytes_received); + + /* + * sum to total_bytes_received all + * unicast/multicast/broadcast + */ + qstats->total_bytes_received_hi = + qstats->total_broadcast_bytes_received_hi; + qstats->total_bytes_received_lo = + qstats->total_broadcast_bytes_received_lo; + + ADD_64(qstats->total_bytes_received_hi, + qstats->total_multicast_bytes_received_hi, + qstats->total_bytes_received_lo, + qstats->total_multicast_bytes_received_lo); + + ADD_64(qstats->total_bytes_received_hi, + qstats->total_unicast_bytes_received_hi, + qstats->total_bytes_received_lo, + qstats->total_unicast_bytes_received_lo); + + qstats->valid_bytes_received_hi = + qstats->total_bytes_received_hi; + qstats->valid_bytes_received_lo = + qstats->total_bytes_received_lo; + + + UPDATE_EXTEND_TSTAT(rcv_ucast_pkts, + total_unicast_packets_received); + UPDATE_EXTEND_TSTAT(rcv_mcast_pkts, + total_multicast_packets_received); + UPDATE_EXTEND_TSTAT(rcv_bcast_pkts, + total_broadcast_packets_received); + UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard, + etherstatsoverrsizepkts, 32); + UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16); + + SUB_EXTEND_USTAT(ucast_no_buff_pkts, + total_unicast_packets_received); + SUB_EXTEND_USTAT(mcast_no_buff_pkts, + total_multicast_packets_received); + SUB_EXTEND_USTAT(bcast_no_buff_pkts, + total_broadcast_packets_received); + UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard); + UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard); + UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard); + + UPDATE_QSTAT(xclient->bcast_bytes_sent, + total_broadcast_bytes_transmitted); + UPDATE_QSTAT(xclient->mcast_bytes_sent, + total_multicast_bytes_transmitted); + UPDATE_QSTAT(xclient->ucast_bytes_sent, + total_unicast_bytes_transmitted); + + /* + * sum to total_bytes_transmitted all + * unicast/multicast/broadcast + */ + qstats->total_bytes_transmitted_hi = + qstats->total_unicast_bytes_transmitted_hi; + qstats->total_bytes_transmitted_lo = + qstats->total_unicast_bytes_transmitted_lo; + + ADD_64(qstats->total_bytes_transmitted_hi, + qstats->total_broadcast_bytes_transmitted_hi, + qstats->total_bytes_transmitted_lo, + qstats->total_broadcast_bytes_transmitted_lo); + + ADD_64(qstats->total_bytes_transmitted_hi, + qstats->total_multicast_bytes_transmitted_hi, + qstats->total_bytes_transmitted_lo, + qstats->total_multicast_bytes_transmitted_lo); + + UPDATE_EXTEND_XSTAT(ucast_pkts_sent, + total_unicast_packets_transmitted); + UPDATE_EXTEND_XSTAT(mcast_pkts_sent, + total_multicast_packets_transmitted); + UPDATE_EXTEND_XSTAT(bcast_pkts_sent, + total_broadcast_packets_transmitted); + + UPDATE_EXTEND_TSTAT(checksum_discard, + total_packets_received_checksum_discarded); + UPDATE_EXTEND_TSTAT(ttl0_discard, + total_packets_received_ttl0_discarded); + + UPDATE_EXTEND_XSTAT(error_drop_pkts, + total_transmitted_dropped_packets_error); + + /* TPA aggregations completed */ + UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations); + /* Number of network frames aggregated by TPA */ + UPDATE_EXTEND_E_USTAT(coalesced_pkts, + total_tpa_aggregated_frames); + /* Total number of bytes in completed TPA aggregations */ + UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes); + + UPDATE_ESTAT_QSTAT_64(total_tpa_bytes); + + UPDATE_FSTAT_QSTAT(total_bytes_received); + UPDATE_FSTAT_QSTAT(total_bytes_transmitted); + UPDATE_FSTAT_QSTAT(total_unicast_packets_received); + UPDATE_FSTAT_QSTAT(total_multicast_packets_received); + UPDATE_FSTAT_QSTAT(total_broadcast_packets_received); + UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted); + UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted); + UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted); + UPDATE_FSTAT_QSTAT(valid_bytes_received); + } + + ADD_64(estats->total_bytes_received_hi, + estats->rx_stat_ifhcinbadoctets_hi, + estats->total_bytes_received_lo, + estats->rx_stat_ifhcinbadoctets_lo); + + ADD_64_LE(estats->total_bytes_received_hi, + tfunc->rcv_error_bytes.hi, + estats->total_bytes_received_lo, + tfunc->rcv_error_bytes.lo); + + ADD_64_LE(estats->error_bytes_received_hi, + tfunc->rcv_error_bytes.hi, + estats->error_bytes_received_lo, + tfunc->rcv_error_bytes.lo); + + UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong); + + ADD_64(estats->error_bytes_received_hi, + estats->rx_stat_ifhcinbadoctets_hi, + estats->error_bytes_received_lo, + estats->rx_stat_ifhcinbadoctets_lo); + + if (bp->port.pmf) { + struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old; + UPDATE_FW_STAT(mac_filter_discard); + UPDATE_FW_STAT(mf_tag_discard); + UPDATE_FW_STAT(brb_truncate_discard); + UPDATE_FW_STAT(mac_discard); + } + + fstats->host_func_stats_start = ++fstats->host_func_stats_end; + +#ifdef BCM_IOV /* ! BNX2X_UPSTREAM */ + bnx2x_iov_storm_stats_update(bp); +#endif + bp->stats_pending = 0; + + return 0; +} + +static void bnx2x_net_stats_update(struct bnx2x *bp) +{ + struct bnx2x_eth_stats *estats = &bp->eth_stats; +#if (LINUX_VERSION_CODE >= 0x020618) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ + struct net_device_stats *nstats = &bp->dev->stats; +#else + struct net_device_stats *nstats = &bp->net_stats; +#endif + unsigned long tmp; + int i; + + nstats->rx_packets = + bnx2x_hilo(&estats->total_unicast_packets_received_hi) + + bnx2x_hilo(&estats->total_multicast_packets_received_hi) + + bnx2x_hilo(&estats->total_broadcast_packets_received_hi); + + nstats->tx_packets = + bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) + + bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) + + bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi); + + nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi); + + nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi); + + tmp = estats->mac_discard; + for_each_rx_queue(bp, i) + tmp += le32_to_cpu(bp->fp[i].old_tclient.checksum_discard); + nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped; + + nstats->tx_dropped = 0; + + nstats->multicast = + bnx2x_hilo(&estats->total_multicast_packets_received_hi); + + nstats->collisions = + bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi); + + nstats->rx_length_errors = + bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) + + bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi); + nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) + + bnx2x_hilo(&estats->brb_truncate_hi); + nstats->rx_crc_errors = + bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi); + nstats->rx_frame_errors = + bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi); + nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi); + nstats->rx_missed_errors = 0; + + nstats->rx_errors = nstats->rx_length_errors + + nstats->rx_over_errors + + nstats->rx_crc_errors + + nstats->rx_frame_errors + + nstats->rx_fifo_errors + + nstats->rx_missed_errors; + + nstats->tx_aborted_errors = + bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) + + bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi); + nstats->tx_carrier_errors = + bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi); + nstats->tx_fifo_errors = 0; + nstats->tx_heartbeat_errors = 0; + nstats->tx_window_errors = 0; + + nstats->tx_errors = nstats->tx_aborted_errors + + nstats->tx_carrier_errors + + bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi); +} + +static void bnx2x_drv_stats_update(struct bnx2x *bp) +{ + struct bnx2x_eth_stats *estats = &bp->eth_stats; + int i; + + for_each_queue(bp, i) { + struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats; + struct bnx2x_eth_q_stats_old *qstats_old = + &bp->fp[i].eth_q_stats_old; + + UPDATE_ESTAT_QSTAT(driver_xoff); + UPDATE_ESTAT_QSTAT(rx_err_discard_pkt); + UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed); + UPDATE_ESTAT_QSTAT(hw_csum_err); + UPDATE_ESTAT_QSTAT(driver_filtered_tx_pkt); + } +} + +static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp) +{ + u32 val; + + if (SHMEM2_HAS(bp, edebug_driver_if[1])) { + val = SHMEM2_RD(bp, edebug_driver_if[1]); + + if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) + return true; + } + + return false; +} + +static void bnx2x_stats_update(struct bnx2x *bp) +{ + u32 *stats_comp = bnx2x_sp(bp, stats_comp); + + if (bnx2x_edebug_stats_stopped(bp)) + return; + + if (*stats_comp != DMAE_COMP_VAL) + return; + + if (bp->port.pmf) + bnx2x_hw_stats_update(bp); + + if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) { + BNX2X_ERR("storm stats were not updated for 3 times\n"); + bnx2x_panic(); + return; + } + + bnx2x_net_stats_update(bp); + bnx2x_drv_stats_update(bp); + + if (netif_msg_timer(bp)) { + struct bnx2x_eth_stats *estats = &bp->eth_stats; + + netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n", + estats->brb_drop_lo, estats->brb_truncate_lo); + } + + bnx2x_hw_stats_post(bp); + bnx2x_storm_stats_post(bp); +} + +static void bnx2x_port_stats_stop(struct bnx2x *bp) +{ + struct dmae_command *dmae; + u32 opcode; + int loader_idx = PMF_DMAE_C(bp); + u32 *stats_comp = bnx2x_sp(bp, stats_comp); + + bp->executer_idx = 0; + + opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0); + + if (bp->port.port_stx) { + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + if (bp->func_stx) + dmae->opcode = bnx2x_dmae_opcode_add_comp( + opcode, DMAE_COMP_GRC); + else + dmae->opcode = bnx2x_dmae_opcode_add_comp( + opcode, DMAE_COMP_PCI); + + dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); + dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); + dmae->dst_addr_lo = bp->port.port_stx >> 2; + dmae->dst_addr_hi = 0; + dmae->len = bnx2x_get_port_stats_dma_len(bp); + if (bp->func_stx) { + dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; + dmae->comp_addr_hi = 0; + dmae->comp_val = 1; + } else { + dmae->comp_addr_lo = + U64_LO(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_addr_hi = + U64_HI(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_val = DMAE_COMP_VAL; + + *stats_comp = 0; + } + } + + if (bp->func_stx) { + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = + bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); + dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); + dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); + dmae->dst_addr_lo = bp->func_stx >> 2; + dmae->dst_addr_hi = 0; + dmae->len = sizeof(struct host_func_stats) >> 2; + dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_val = DMAE_COMP_VAL; + + *stats_comp = 0; + } +} + +static void bnx2x_stats_stop(struct bnx2x *bp) +{ + int update = 0; + + bnx2x_stats_comp(bp); + + if (bp->port.pmf) + update = (bnx2x_hw_stats_update(bp) == 0); + + update |= (bnx2x_storm_stats_update(bp) == 0); + + if (update) { + bnx2x_net_stats_update(bp); + + if (bp->port.pmf) + bnx2x_port_stats_stop(bp); + + bnx2x_hw_stats_post(bp); + bnx2x_stats_comp(bp); + } +} + +static void bnx2x_stats_do_nothing(struct bnx2x *bp) +{ +} + +static const struct { + void (*action)(struct bnx2x *bp); + enum bnx2x_stats_state next_state; +} bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = { +/* state event */ +{ +/* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED}, +/* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED}, +/* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}, +/* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED} +}, +{ +/* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED}, +/* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED}, +/* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED}, +/* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED} +} +}; + +void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event) +{ + enum bnx2x_stats_state state; + if (unlikely(bp->panic)) + return; + + spin_lock_bh(&bp->stats_lock); + state = bp->stats_state; + bp->stats_state = bnx2x_stats_stm[state][event].next_state; + spin_unlock_bh(&bp->stats_lock); + + bnx2x_stats_stm[state][event].action(bp); + + if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) + DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", + state, event, bp->stats_state); +} + +static void bnx2x_port_stats_base_init(struct bnx2x *bp) +{ + struct dmae_command *dmae; + u32 *stats_comp = bnx2x_sp(bp, stats_comp); + + /* sanity */ + if (!bp->port.pmf || !bp->port.port_stx) { + BNX2X_ERR("BUG!\n"); + return; + } + + bp->executer_idx = 0; + + dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); + dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, + true, DMAE_COMP_PCI); + dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); + dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); + dmae->dst_addr_lo = bp->port.port_stx >> 2; + dmae->dst_addr_hi = 0; + dmae->len = bnx2x_get_port_stats_dma_len(bp); + dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); + dmae->comp_val = DMAE_COMP_VAL; + + *stats_comp = 0; + bnx2x_hw_stats_post(bp); + bnx2x_stats_comp(bp); +} + +/** + * This function will prepare the statistics ramrod data the way + * we will only have to increment the statistics counter and + * send the ramrod each time we have to. + * + * @param bp + */ +static inline void bnx2x_prep_fw_stats_req(struct bnx2x *bp) +{ + int i; + int first_queue_query_index; + struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr; + + dma_addr_t cur_data_offset; + struct stats_query_entry *cur_query_entry; + + stats_hdr->cmd_num = bp->fw_stats_num; + stats_hdr->drv_stats_counter = 0; + + /* storm_counters struct contains the counters of completed + * statistics requests per storm which are incremented by FW + * each time it completes hadning a statistics ramrod. We will + * check these counters in the timer handler and discard a + * (statistics) ramrod completion. + */ + cur_data_offset = bp->fw_stats_data_mapping + + offsetof(struct bnx2x_fw_stats_data, storm_counters); + + stats_hdr->stats_counters_addrs.hi = + cpu_to_le32(U64_HI(cur_data_offset)); + stats_hdr->stats_counters_addrs.lo = + cpu_to_le32(U64_LO(cur_data_offset)); + + /* prepare to the first stats ramrod (will be completed with + * the counters equal to zero) - init counters to somethig different. + */ + memset(&bp->fw_stats_data->storm_counters, 0xff, + sizeof(struct stats_counter)); + + /**** Port FW statistics data ****/ + cur_data_offset = bp->fw_stats_data_mapping + + offsetof(struct bnx2x_fw_stats_data, port); + + cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX]; + + cur_query_entry->kind = STATS_TYPE_PORT; + /* For port query index is a DONT CARE */ + cur_query_entry->index = BP_PORT(bp); + /* For port query funcID is a DONT CARE */ + cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); + cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset)); + cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset)); + + /**** PF FW statistics data ****/ + cur_data_offset = bp->fw_stats_data_mapping + + offsetof(struct bnx2x_fw_stats_data, pf); + + cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX]; + + cur_query_entry->kind = STATS_TYPE_PF; + /* For PF query index is a DONT CARE */ + cur_query_entry->index = BP_PORT(bp); + cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); + cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset)); + cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset)); + + /**** FCoE FW statistics data ****/ + if (!NO_FCOE(bp)) { + cur_data_offset = bp->fw_stats_data_mapping + + offsetof(struct bnx2x_fw_stats_data, fcoe); + + cur_query_entry = + &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX]; + + cur_query_entry->kind = STATS_TYPE_FCOE; + /* For FCoE query index is a DONT CARE */ + cur_query_entry->index = BP_PORT(bp); + cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); + cur_query_entry->address.hi = + cpu_to_le32(U64_HI(cur_data_offset)); + cur_query_entry->address.lo = + cpu_to_le32(U64_LO(cur_data_offset)); + } + + /**** Clients' queries ****/ + cur_data_offset = bp->fw_stats_data_mapping + + offsetof(struct bnx2x_fw_stats_data, queue_stats); + + /* first queue query index depends whether FCoE offloaded request will + * be included in the ramrod + */ + if (!NO_FCOE(bp)) + first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX; + else + first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1; + + for_each_eth_queue(bp, i) { + cur_query_entry = + &bp->fw_stats_req-> + query[first_queue_query_index + i]; + + cur_query_entry->kind = STATS_TYPE_QUEUE; + cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]); + cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); + cur_query_entry->address.hi = + cpu_to_le32(U64_HI(cur_data_offset)); + cur_query_entry->address.lo = + cpu_to_le32(U64_LO(cur_data_offset)); + + cur_data_offset += sizeof(struct per_queue_stats); + } + + /* add FCoE queue query if needed */ + if (!NO_FCOE(bp)) { + cur_query_entry = + &bp->fw_stats_req-> + query[first_queue_query_index + i]; + + cur_query_entry->kind = STATS_TYPE_QUEUE; + cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX]); + cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); + cur_query_entry->address.hi = + cpu_to_le32(U64_HI(cur_data_offset)); + cur_query_entry->address.lo = + cpu_to_le32(U64_LO(cur_data_offset)); + } +} + +void bnx2x_stats_init(struct bnx2x *bp) +{ + int /*abs*/port = BP_PORT(bp); + int mb_idx = BP_FW_MB_IDX(bp); + int i; + + bp->stats_pending = 0; + bp->executer_idx = 0; + bp->stats_counter = 0; + + /* port and func stats for management */ + if (!BP_NOMCP(bp)) { + bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx); + bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param); + + } else { + bp->port.port_stx = 0; + bp->func_stx = 0; + } + DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n", + bp->port.port_stx, bp->func_stx); + + /* pmf should retrieve port statistics from SP on a non-init*/ + if (!bp->stats_init && bp->port.pmf && bp->port.port_stx) + bnx2x_stats_handle(bp, STATS_EVENT_PMF); + + port = BP_PORT(bp); + /* port stats */ + memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats)); + bp->port.old_nig_stats.brb_discard = + REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38); + bp->port.old_nig_stats.brb_truncate = + REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38); + if (!CHIP_IS_E3(bp)) { + REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50, + &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2); + REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50, + &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2); + } + + /* function stats */ + for_each_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + + memset(&fp->old_tclient, 0, sizeof(fp->old_tclient)); + memset(&fp->old_uclient, 0, sizeof(fp->old_uclient)); + memset(&fp->old_xclient, 0, sizeof(fp->old_xclient)); + if (bp->stats_init) { + memset(&fp->eth_q_stats, 0, sizeof(fp->eth_q_stats)); + memset(&fp->eth_q_stats_old, 0, + sizeof(fp->eth_q_stats_old)); + } + } + + /* Prepare statistics ramrod data */ + bnx2x_prep_fw_stats_req(bp); + +#if (LINUX_VERSION_CODE >= 0x020618) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ + memset(&bp->dev->stats, 0, sizeof(bp->dev->stats)); +#else + memset(&bp->net_stats, 0, sizeof(bp->net_stats)); +#endif + if (bp->stats_init) { + memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old)); + memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old)); + memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old)); + memset(&bp->eth_stats, 0, sizeof(bp->eth_stats)); + memset(&bp->func_stats, 0, sizeof(bp->func_stats)); + + /* Clean SP from previous statistics */ + if (bp->func_stx) { + memset(bnx2x_sp(bp, func_stats), 0, + sizeof(struct host_func_stats)); + bnx2x_func_stats_init(bp); + bnx2x_hw_stats_post(bp); + bnx2x_stats_comp(bp); + } + } + + bp->stats_state = STATS_STATE_DISABLED; + + if (bp->port.pmf && bp->port.port_stx) + bnx2x_port_stats_base_init(bp); + + /* mark the end of statistics initializiation */ + bp->stats_init = false; +} + +void bnx2x_save_statistics(struct bnx2x *bp) +{ + int i; +#if (LINUX_VERSION_CODE >= 0x020618) || defined(__VMKLNX__) /* BNX2X_UPSTREAM */ + struct net_device_stats *nstats = &bp->dev->stats; +#else + struct net_device_stats *nstats = &bp->net_stats; +#endif + + /* save queue statistics */ + for_each_eth_queue(bp, i) { + struct bnx2x_fastpath *fp = &bp->fp[i]; + struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats; + struct bnx2x_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old; + + UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi); + UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo); + UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi); + UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo); + UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi); + UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo); + UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi); + UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo); + UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi); + UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo); + UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi); + UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo); + UPDATE_QSTAT_OLD(total_tpa_bytes_hi); + UPDATE_QSTAT_OLD(total_tpa_bytes_lo); + } + + /* save net_device_stats statistics */ + bp->net_stats_old.rx_dropped = nstats->rx_dropped; + + /* store port firmware statistics */ + if (bp->port.pmf) { + struct bnx2x_eth_stats *estats = &bp->eth_stats; + struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old; + struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); + + fwstats->pfc_frames_rx_hi = pstats->pfc_frames_rx_hi; + fwstats->pfc_frames_rx_lo = pstats->pfc_frames_rx_lo; + fwstats->pfc_frames_tx_hi = pstats->pfc_frames_tx_hi; + fwstats->pfc_frames_tx_lo = pstats->pfc_frames_tx_lo; + + if (IS_MF(bp)) { + UPDATE_FW_STAT_OLD(mac_filter_discard); + UPDATE_FW_STAT_OLD(mf_tag_discard); + UPDATE_FW_STAT_OLD(brb_truncate_discard); + UPDATE_FW_STAT_OLD(mac_discard); + } + } +} diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_stats.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_stats.h new file mode 100644 index 0000000..628959c --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_stats.h @@ -0,0 +1,564 @@ +/* bnx2x_stats.h: Broadcom Everest network driver. + * + * Copyright (c) 2007-2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation. + * + * Maintained by: Eilon Greenstein + * Written by: Eliezer Tamir + * Based on code from Michael Chan's bnx2 driver + * UDP CSUM errata workaround by Arik Gendelman + * Slowpath and fastpath rework by Vladislav Zolotarov + * Statistics and Link management by Yitchak Gertner + * + */ +#ifndef BNX2X_STATS_H +#define BNX2X_STATS_H + +#include + +struct nig_stats { + u32 brb_discard; + u32 brb_packet; + u32 brb_truncate; + u32 flow_ctrl_discard; + u32 flow_ctrl_octets; + u32 flow_ctrl_packet; + u32 mng_discard; + u32 mng_octet_inp; + u32 mng_octet_out; + u32 mng_packet_inp; + u32 mng_packet_out; + u32 pbf_octets; + u32 pbf_packet; + u32 safc_inp; + u32 egress_mac_pkt0_lo; + u32 egress_mac_pkt0_hi; + u32 egress_mac_pkt1_lo; + u32 egress_mac_pkt1_hi; +}; + + +enum bnx2x_stats_event { + STATS_EVENT_PMF = 0, + STATS_EVENT_LINK_UP, + STATS_EVENT_UPDATE, + STATS_EVENT_STOP, + STATS_EVENT_MAX +}; + +enum bnx2x_stats_state { + STATS_STATE_DISABLED = 0, + STATS_STATE_ENABLED, + STATS_STATE_MAX +}; + +struct bnx2x_eth_stats { + u32 total_bytes_received_hi; + u32 total_bytes_received_lo; + u32 total_bytes_transmitted_hi; + u32 total_bytes_transmitted_lo; + u32 total_unicast_packets_received_hi; + u32 total_unicast_packets_received_lo; + u32 total_multicast_packets_received_hi; + u32 total_multicast_packets_received_lo; + u32 total_broadcast_packets_received_hi; + u32 total_broadcast_packets_received_lo; + u32 total_unicast_packets_transmitted_hi; + u32 total_unicast_packets_transmitted_lo; + u32 total_multicast_packets_transmitted_hi; + u32 total_multicast_packets_transmitted_lo; + u32 total_broadcast_packets_transmitted_hi; + u32 total_broadcast_packets_transmitted_lo; + u32 valid_bytes_received_hi; + u32 valid_bytes_received_lo; + + u32 error_bytes_received_hi; + u32 error_bytes_received_lo; + u32 etherstatsoverrsizepkts_hi; + u32 etherstatsoverrsizepkts_lo; + u32 no_buff_discard_hi; + u32 no_buff_discard_lo; + + u32 rx_stat_ifhcinbadoctets_hi; + u32 rx_stat_ifhcinbadoctets_lo; + u32 tx_stat_ifhcoutbadoctets_hi; + u32 tx_stat_ifhcoutbadoctets_lo; + u32 rx_stat_dot3statsfcserrors_hi; + u32 rx_stat_dot3statsfcserrors_lo; + u32 rx_stat_dot3statsalignmenterrors_hi; + u32 rx_stat_dot3statsalignmenterrors_lo; + u32 rx_stat_dot3statscarriersenseerrors_hi; + u32 rx_stat_dot3statscarriersenseerrors_lo; + u32 rx_stat_falsecarriererrors_hi; + u32 rx_stat_falsecarriererrors_lo; + u32 rx_stat_etherstatsundersizepkts_hi; + u32 rx_stat_etherstatsundersizepkts_lo; + u32 rx_stat_dot3statsframestoolong_hi; + u32 rx_stat_dot3statsframestoolong_lo; + u32 rx_stat_etherstatsfragments_hi; + u32 rx_stat_etherstatsfragments_lo; + u32 rx_stat_etherstatsjabbers_hi; + u32 rx_stat_etherstatsjabbers_lo; + u32 rx_stat_maccontrolframesreceived_hi; + u32 rx_stat_maccontrolframesreceived_lo; + u32 rx_stat_bmac_xpf_hi; + u32 rx_stat_bmac_xpf_lo; + u32 rx_stat_bmac_xcf_hi; + u32 rx_stat_bmac_xcf_lo; + u32 rx_stat_xoffstateentered_hi; + u32 rx_stat_xoffstateentered_lo; + u32 rx_stat_xonpauseframesreceived_hi; + u32 rx_stat_xonpauseframesreceived_lo; + u32 rx_stat_xoffpauseframesreceived_hi; + u32 rx_stat_xoffpauseframesreceived_lo; + u32 tx_stat_outxonsent_hi; + u32 tx_stat_outxonsent_lo; + u32 tx_stat_outxoffsent_hi; + u32 tx_stat_outxoffsent_lo; + u32 tx_stat_flowcontroldone_hi; + u32 tx_stat_flowcontroldone_lo; + u32 tx_stat_etherstatscollisions_hi; + u32 tx_stat_etherstatscollisions_lo; + u32 tx_stat_dot3statssinglecollisionframes_hi; + u32 tx_stat_dot3statssinglecollisionframes_lo; + u32 tx_stat_dot3statsmultiplecollisionframes_hi; + u32 tx_stat_dot3statsmultiplecollisionframes_lo; + u32 tx_stat_dot3statsdeferredtransmissions_hi; + u32 tx_stat_dot3statsdeferredtransmissions_lo; + u32 tx_stat_dot3statsexcessivecollisions_hi; + u32 tx_stat_dot3statsexcessivecollisions_lo; + u32 tx_stat_dot3statslatecollisions_hi; + u32 tx_stat_dot3statslatecollisions_lo; + u32 tx_stat_etherstatspkts64octets_hi; + u32 tx_stat_etherstatspkts64octets_lo; + u32 tx_stat_etherstatspkts65octetsto127octets_hi; + u32 tx_stat_etherstatspkts65octetsto127octets_lo; + u32 tx_stat_etherstatspkts128octetsto255octets_hi; + u32 tx_stat_etherstatspkts128octetsto255octets_lo; + u32 tx_stat_etherstatspkts256octetsto511octets_hi; + u32 tx_stat_etherstatspkts256octetsto511octets_lo; + u32 tx_stat_etherstatspkts512octetsto1023octets_hi; + u32 tx_stat_etherstatspkts512octetsto1023octets_lo; + u32 tx_stat_etherstatspkts1024octetsto1522octets_hi; + u32 tx_stat_etherstatspkts1024octetsto1522octets_lo; + u32 tx_stat_etherstatspktsover1522octets_hi; + u32 tx_stat_etherstatspktsover1522octets_lo; + u32 tx_stat_bmac_2047_hi; + u32 tx_stat_bmac_2047_lo; + u32 tx_stat_bmac_4095_hi; + u32 tx_stat_bmac_4095_lo; + u32 tx_stat_bmac_9216_hi; + u32 tx_stat_bmac_9216_lo; + u32 tx_stat_bmac_16383_hi; + u32 tx_stat_bmac_16383_lo; + u32 tx_stat_dot3statsinternalmactransmiterrors_hi; + u32 tx_stat_dot3statsinternalmactransmiterrors_lo; + u32 tx_stat_bmac_ufl_hi; + u32 tx_stat_bmac_ufl_lo; + + u32 pause_frames_received_hi; + u32 pause_frames_received_lo; + u32 pause_frames_sent_hi; + u32 pause_frames_sent_lo; + + u32 etherstatspkts1024octetsto1522octets_hi; + u32 etherstatspkts1024octetsto1522octets_lo; + u32 etherstatspktsover1522octets_hi; + u32 etherstatspktsover1522octets_lo; + + u32 brb_drop_hi; + u32 brb_drop_lo; + u32 brb_truncate_hi; + u32 brb_truncate_lo; + + u32 mac_filter_discard; + u32 mf_tag_discard; + u32 brb_truncate_discard; + u32 mac_discard; + + u32 driver_xoff; + u32 rx_err_discard_pkt; + u32 rx_skb_alloc_failed; + u32 hw_csum_err; + + u32 nig_timer_max; + + /* TPA */ + u32 total_tpa_aggregations_hi; + u32 total_tpa_aggregations_lo; + u32 total_tpa_aggregated_frames_hi; + u32 total_tpa_aggregated_frames_lo; + u32 total_tpa_bytes_hi; + u32 total_tpa_bytes_lo; + + /* PFC */ + u32 pfc_frames_received_hi; + u32 pfc_frames_received_lo; + u32 pfc_frames_sent_hi; + u32 pfc_frames_sent_lo; + + /* Recovery */ + u32 recoverable_error; + u32 unrecoverable_error; + + u32 driver_filtered_tx_pkt; +}; + + +struct bnx2x_eth_q_stats { + u32 total_unicast_bytes_received_hi; + u32 total_unicast_bytes_received_lo; + u32 total_broadcast_bytes_received_hi; + u32 total_broadcast_bytes_received_lo; + u32 total_multicast_bytes_received_hi; + u32 total_multicast_bytes_received_lo; + u32 total_bytes_received_hi; + u32 total_bytes_received_lo; + u32 total_unicast_bytes_transmitted_hi; + u32 total_unicast_bytes_transmitted_lo; + u32 total_broadcast_bytes_transmitted_hi; + u32 total_broadcast_bytes_transmitted_lo; + u32 total_multicast_bytes_transmitted_hi; + u32 total_multicast_bytes_transmitted_lo; + u32 total_bytes_transmitted_hi; + u32 total_bytes_transmitted_lo; + u32 total_unicast_packets_received_hi; + u32 total_unicast_packets_received_lo; + u32 total_multicast_packets_received_hi; + u32 total_multicast_packets_received_lo; + u32 total_broadcast_packets_received_hi; + u32 total_broadcast_packets_received_lo; + u32 total_unicast_packets_transmitted_hi; + u32 total_unicast_packets_transmitted_lo; + u32 total_multicast_packets_transmitted_hi; + u32 total_multicast_packets_transmitted_lo; + u32 total_broadcast_packets_transmitted_hi; + u32 total_broadcast_packets_transmitted_lo; + u32 valid_bytes_received_hi; + u32 valid_bytes_received_lo; + + u32 etherstatsoverrsizepkts_hi; + u32 etherstatsoverrsizepkts_lo; + u32 no_buff_discard_hi; + u32 no_buff_discard_lo; + + u32 driver_xoff; + u32 rx_err_discard_pkt; + u32 rx_skb_alloc_failed; + u32 hw_csum_err; + + u32 total_packets_received_checksum_discarded_hi; + u32 total_packets_received_checksum_discarded_lo; + u32 total_packets_received_ttl0_discarded_hi; + u32 total_packets_received_ttl0_discarded_lo; + u32 total_transmitted_dropped_packets_error_hi; + u32 total_transmitted_dropped_packets_error_lo; + + /* TPA */ + u32 total_tpa_aggregations_hi; + u32 total_tpa_aggregations_lo; + u32 total_tpa_aggregated_frames_hi; + u32 total_tpa_aggregated_frames_lo; + u32 total_tpa_bytes_hi; + u32 total_tpa_bytes_lo; + + u32 driver_filtered_tx_pkt; +}; + +struct bnx2x_eth_stats_old { + u32 rx_stat_dot3statsframestoolong_hi; + u32 rx_stat_dot3statsframestoolong_lo; +}; + +struct bnx2x_eth_q_stats_old { + /* Fields to perserve over fw reset*/ + u32 total_unicast_bytes_received_hi; + u32 total_unicast_bytes_received_lo; + u32 total_broadcast_bytes_received_hi; + u32 total_broadcast_bytes_received_lo; + u32 total_multicast_bytes_received_hi; + u32 total_multicast_bytes_received_lo; + u32 total_unicast_bytes_transmitted_hi; + u32 total_unicast_bytes_transmitted_lo; + u32 total_broadcast_bytes_transmitted_hi; + u32 total_broadcast_bytes_transmitted_lo; + u32 total_multicast_bytes_transmitted_hi; + u32 total_multicast_bytes_transmitted_lo; + u32 total_tpa_bytes_hi; + u32 total_tpa_bytes_lo; + + /* Fields to perserve last of */ + u32 total_bytes_received_hi; + u32 total_bytes_received_lo; + u32 total_bytes_transmitted_hi; + u32 total_bytes_transmitted_lo; + u32 total_unicast_packets_received_hi; + u32 total_unicast_packets_received_lo; + u32 total_multicast_packets_received_hi; + u32 total_multicast_packets_received_lo; + u32 total_broadcast_packets_received_hi; + u32 total_broadcast_packets_received_lo; + u32 total_unicast_packets_transmitted_hi; + u32 total_unicast_packets_transmitted_lo; + u32 total_multicast_packets_transmitted_hi; + u32 total_multicast_packets_transmitted_lo; + u32 total_broadcast_packets_transmitted_hi; + u32 total_broadcast_packets_transmitted_lo; + u32 valid_bytes_received_hi; + u32 valid_bytes_received_lo; + + u32 total_tpa_bytes_hi_old; + u32 total_tpa_bytes_lo_old; + + u32 driver_xoff_old; + u32 rx_err_discard_pkt_old; + u32 rx_skb_alloc_failed_old; + u32 hw_csum_err_old; + + u32 driver_filtered_tx_pkt_old; +}; + +struct bnx2x_net_stats_old { + u32 rx_dropped; +}; + +struct bnx2x_fw_port_stats_old { + u32 pfc_frames_tx_hi; + u32 pfc_frames_tx_lo; + u32 pfc_frames_rx_hi; + u32 pfc_frames_rx_lo; + + u32 mac_filter_discard; + u32 mf_tag_discard; + u32 brb_truncate_discard; + u32 mac_discard; +}; + + +/**************************************************************************** +* Macros +****************************************************************************/ + +/* sum[hi:lo] += add[hi:lo] */ +#define ADD_64(s_hi, a_hi, s_lo, a_lo) \ + do { \ + s_lo += a_lo; \ + s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \ + } while (0) + +#define LE32_0 ((__force __le32) 0) +#define LE16_0 ((__force __le16) 0) + +/* The _force is for cases where high value is 0 */ +#define ADD_64_LE(s_hi, a_hi_le, s_lo, a_lo_le) \ + ADD_64(s_hi, le32_to_cpu(a_hi_le), \ + s_lo, le32_to_cpu(a_lo_le)) + +#define ADD_64_LE16(s_hi, a_hi_le, s_lo, a_lo_le) \ + ADD_64(s_hi, le16_to_cpu(a_hi_le), \ + s_lo, le16_to_cpu(a_lo_le)) + +/* difference = minuend - subtrahend */ +#define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \ + do { \ + if (m_lo < s_lo) { \ + /* underflow */ \ + d_hi = m_hi - s_hi; \ + if (d_hi > 0) { \ + /* we can 'loan' 1 */ \ + d_hi--; \ + d_lo = m_lo + (UINT_MAX - s_lo) + 1; \ + } else { \ + /* m_hi <= s_hi */ \ + d_hi = 0; \ + d_lo = 0; \ + } \ + } else { \ + /* m_lo >= s_lo */ \ + if (m_hi < s_hi) { \ + d_hi = 0; \ + d_lo = 0; \ + } else { \ + /* m_hi >= s_hi */ \ + d_hi = m_hi - s_hi; \ + d_lo = m_lo - s_lo; \ + } \ + } \ + } while (0) + +#define UPDATE_STAT64(s, t) \ + do { \ + DIFF_64(diff.hi, new->s##_hi, pstats->mac_stx[0].t##_hi, \ + diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \ + pstats->mac_stx[0].t##_hi = new->s##_hi; \ + pstats->mac_stx[0].t##_lo = new->s##_lo; \ + ADD_64(pstats->mac_stx[1].t##_hi, diff.hi, \ + pstats->mac_stx[1].t##_lo, diff.lo); \ + } while (0) + +#define UPDATE_STAT64_NIG(s, t) \ + do { \ + DIFF_64(diff.hi, new->s##_hi, old->s##_hi, \ + diff.lo, new->s##_lo, old->s##_lo); \ + ADD_64(estats->t##_hi, diff.hi, \ + estats->t##_lo, diff.lo); \ + } while (0) + +/* sum[hi:lo] += add */ +#define ADD_EXTEND_64(s_hi, s_lo, a) \ + do { \ + s_lo += a; \ + s_hi += (s_lo < a) ? 1 : 0; \ + } while (0) + +#define ADD_STAT64(diff, t) \ + do { \ + ADD_64(pstats->mac_stx[1].t##_hi, new->diff##_hi, \ + pstats->mac_stx[1].t##_lo, new->diff##_lo); \ + } while (0) + +#define UPDATE_EXTEND_STAT(s) \ + do { \ + ADD_EXTEND_64(pstats->mac_stx[1].s##_hi, \ + pstats->mac_stx[1].s##_lo, \ + new->s); \ + } while (0) + +#define UPDATE_EXTEND_TSTAT_X(s, t, size) \ + do { \ + diff = le##size##_to_cpu(tclient->s) - \ + le##size##_to_cpu(old_tclient->s); \ + old_tclient->s = tclient->s; \ + ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ + } while (0) + +#define UPDATE_EXTEND_TSTAT(s, t) UPDATE_EXTEND_TSTAT_X(s, t, 32) + +#define UPDATE_EXTEND_E_TSTAT(s, t, size) \ + do { \ + UPDATE_EXTEND_TSTAT_X(s, t, size); \ + ADD_EXTEND_64(estats->t##_hi, estats->t##_lo, diff); \ + } while (0) + +#define UPDATE_EXTEND_USTAT(s, t) \ + do { \ + diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \ + old_uclient->s = uclient->s; \ + ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ + } while (0) + +#define UPDATE_EXTEND_E_USTAT(s, t) \ + do { \ + UPDATE_EXTEND_USTAT(s, t); \ + ADD_EXTEND_64(estats->t##_hi, estats->t##_lo, diff); \ + } while (0) + +#define UPDATE_EXTEND_XSTAT(s, t) \ + do { \ + diff = le32_to_cpu(xclient->s) - le32_to_cpu(old_xclient->s); \ + old_xclient->s = xclient->s; \ + ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ + } while (0) + +#define UPDATE_QSTAT(s, t) \ + do { \ + qstats->t##_hi = qstats_old->t##_hi + le32_to_cpu(s.hi); \ + qstats->t##_lo = qstats_old->t##_lo + le32_to_cpu(s.lo); \ + } while (0) + +#define UPDATE_QSTAT_OLD(f) \ + do { \ + qstats_old->f = qstats->f; \ + } while (0) + +#define UPDATE_ESTAT_QSTAT_64(s) \ + do { \ + ADD_64(estats->s##_hi, qstats->s##_hi, \ + estats->s##_lo, qstats->s##_lo); \ + SUB_64(estats->s##_hi, qstats_old->s##_hi_old, \ + estats->s##_lo, qstats_old->s##_lo_old); \ + qstats_old->s##_hi_old = qstats->s##_hi; \ + qstats_old->s##_lo_old = qstats->s##_lo; \ + } while (0) + +#define UPDATE_ESTAT_QSTAT(s) \ + do { \ + estats->s += qstats->s; \ + estats->s -= qstats_old->s##_old; \ + qstats_old->s##_old = qstats->s; \ + } while (0) + +#define UPDATE_FSTAT_QSTAT(s) \ + do { \ + ADD_64(fstats->s##_hi, qstats->s##_hi, \ + fstats->s##_lo, qstats->s##_lo); \ + SUB_64(fstats->s##_hi, qstats_old->s##_hi, \ + fstats->s##_lo, qstats_old->s##_lo); \ + estats->s##_hi = fstats->s##_hi; \ + estats->s##_lo = fstats->s##_lo; \ + qstats_old->s##_hi = qstats->s##_hi; \ + qstats_old->s##_lo = qstats->s##_lo; \ + } while (0) + +#define UPDATE_FW_STAT(s) \ + do { \ + estats->s = le32_to_cpu(tport->s) + fwstats->s; \ + } while (0) + +#define UPDATE_FW_STAT_OLD(f) \ + do { \ + fwstats->f = estats->f; \ + } while (0) + +#define UPDATE_ESTAT(s, t) \ + do { \ + SUB_64(estats->s##_hi, estats_old->t##_hi, \ + estats->s##_lo, estats_old->t##_lo); \ + ADD_64(estats->s##_hi, estats->t##_hi, \ + estats->s##_lo, estats->t##_lo); \ + estats_old->t##_hi = estats->t##_hi; \ + estats_old->t##_lo = estats->t##_lo; \ + } while (0) + +/* minuend -= subtrahend */ +#define SUB_64(m_hi, s_hi, m_lo, s_lo) \ + do { \ + DIFF_64(m_hi, m_hi, s_hi, m_lo, m_lo, s_lo); \ + } while (0) + +/* minuend[hi:lo] -= subtrahend */ +#define SUB_EXTEND_64(m_hi, m_lo, s) \ + do { \ + SUB_64(m_hi, 0, m_lo, s); \ + } while (0) + +#define SUB_EXTEND_USTAT(s, t) \ + do { \ + diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \ + SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ + } while (0) + + +/* forward */ +struct bnx2x; +/** + * + */ +void bnx2x_stats_init(struct bnx2x *bp); + +/** + * + */ +void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event); + +/** + * bnx2x_save_statistics - save statistics when unloading. + * + * @bp: driver handle + */ +void bnx2x_save_statistics(struct bnx2x *bp); +#endif /* BNX2X_STATS_H */ + diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vf.c b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vf.c deleted file mode 100644 index 536d376..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vf.c +++ /dev/null @@ -1,3203 +0,0 @@ -/* bnx2x_vf.c: Broadcom Everest network driver. - * - * Copyright 2009-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Maintained by: Eilon Greenstein - * Written by: Shmulik Ravid - * - */ -#include -#include -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include -#endif -#include -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include /* for dev_info() */ -#endif -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include -#endif -#include -#include -#include -#include -#include -#include -#include -#if (LINUX_VERSION_CODE >= 0x020600) /* BNX2X_UPSTREAM */ -#include -#endif -#include -#if (LINUX_VERSION_CODE >= 0x020618) /* BNX2X_UPSTREAM */ -#include -#else -#include -#endif - -#include "bnx2x.h" -#include "bnx2x_init.h" -#include "bnx2x_common.h" - -#ifdef BCM_IOV -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ -#include "bnx2x_esx.h" -#endif - -#include "bnx2x_vf.h" - -#define BNX2X_VF_LOCAL_SWITCH - -#ifdef VFPF_MBX /* BNX2X_UPSTREAM */ - -/** To get size of message of the type X(request or response) - * for the op_code Y of the version Z one should use - * - * op_code_req_sz[Y][Z].req_sz/resp_sz - ***************************************************************************/ -static const msg_sz_t *op_codes_req_sz[] = { - (const msg_sz_t*)acquire_req_sz, - (const msg_sz_t*)init_vf_req_sz, - (const msg_sz_t*)setup_q_req_sz, - (const msg_sz_t*)set_q_filters_req_sz, - (const msg_sz_t*)activate_q_req_sz, - (const msg_sz_t*)deactivate_q_req_sz, - (const msg_sz_t*)teardown_q_req_sz, - (const msg_sz_t*)close_vf_req_sz, - (const msg_sz_t*)release_vf_req_sz -}; - - -static const int vfapi_to_pfvf_status_codes[] = { - PFVF_STATUS_SUCCESS, /* VF_API_SUCCESS */ - PFVF_STATUS_FAILURE, /* VF_API_FAILURE */ - PFVF_STATUS_NO_RESOURCE /* VF_API_NO_RESOURCE */ -}; - -#endif /* VFPF_MBX */ - - -#define VF_MAX_QUEUE_CNT(vf) (min_t(u8, BNX2X_VF_MAX_QUEUES, \ - min_t(u8, (vf)->max_sb_count, \ - BNX2X_CIDS_PER_VF))) - -/**************************************************************************** -* General service functions -****************************************************************************/ -static inline void storm_memset_vf_mbx_ack(struct bnx2x *bp, u16 abs_fid) -{ - u32 addr = BAR_CSTRORM_INTMEM + - CSTORM_VF_PF_CHANNEL_STATE_OFFSET(abs_fid); - - REG_WR8(bp, addr, VF_PF_CHANNEL_STATE_READY); -} - -static inline void storm_memset_vf_mbx_valid(struct bnx2x *bp, u16 abs_fid) -{ - u32 addr = BAR_CSTRORM_INTMEM + - CSTORM_VF_PF_CHANNEL_VALID_OFFSET(abs_fid); - - REG_WR8(bp, addr, 1); -} - -static inline void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid, - u16 pf_id) -{ - REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid), - pf_id); - REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid), - pf_id); - REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid), - pf_id); - REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid), - pf_id); -} - - -inline void -storm_memset_rcq_np(struct bnx2x *bp, dma_addr_t np_map, u8 cl_id) -{ - u32 addr = BAR_USTRORM_INTMEM + - USTORM_CQE_PAGE_NEXT_VMWARE_TEMP_OFFSET(BP_PORT(bp), cl_id); - - REG_WR(bp, addr, U64_LO(np_map)); - REG_WR(bp, addr + 4, U64_HI(np_map)); -} - -static inline int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid) -{ - int idx; - for_each_vf(bp, idx) - if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid) - break; - return idx; -} - -static inline -struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid) -{ - u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid); - return ( (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL); -} - - -inline void -bnx2x_set_vf_mbxs_valid(struct bnx2x *bp) -{ - int i; - for_each_vf(bp, i) - storm_memset_vf_mbx_valid(bp, bnx2x_vf(bp, i, abs_vfid)); - -} - -/* - * VF enable primitives - * - * when pretend is required the caller is reponsible - * for calling pretend prioir to calling these routines - */ - -/* - * called only on E1H or E2. - * When pretending to be PF, the pretend value is the function number 0...7 - * When pretending t obe VF, the pretend val is the PF-num:VF-valid:ABS-VFID - * combination - */ -int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val) -{ - u32 pretend_reg; - - if (CHIP_IS_E1H(bp) && pretend_func_val > E1H_FUNC_MAX) - return -1; - - /* get my own pretend register */ - pretend_reg = bnx2x_get_pretend_reg(bp); - REG_WR(bp, pretend_reg, pretend_func_val); - REG_RD(bp, pretend_reg); - return 0; -} - -/* - * internal vf enable - until vf is enabled internally all transactions - * are blocked. this routine should always be called last with pretend. - */ -static inline void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable) -{ - REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1: 0); -} - -/* called with pretend */ -static inline void bnx2x_vf_enable_pbf(struct bnx2x *bp, u8 enable) -{ - REG_WR(bp, PBF_REG_DISABLE_VF, enable ? 0 : 1); -} - - -/* clears vf error in all semi blocks */ -static inline void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid) -{ - REG_WR(bp,TSEM_REG_VFPF_ERR_NUM, abs_vfid); - REG_WR(bp,USEM_REG_VFPF_ERR_NUM, abs_vfid); - REG_WR(bp,CSEM_REG_VFPF_ERR_NUM, abs_vfid); - REG_WR(bp,XSEM_REG_VFPF_ERR_NUM, abs_vfid); -} - -static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid) -{ - u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5; - u32 was_err_reg = 0; - - switch (was_err_group) { - case 0: - was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR; - break; - case 1: - was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR; - break; - case 2: - was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR; - break; - case 3: - was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR; - break; - } - REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f)); -} - -static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf, - u8 igu_sb_id, u8 segment, u16 index, u8 op, - u8 update) -{ - /* acking a VF sb through the PF - use the GRC */ - u32 ctl; - u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA; - u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL; - u32 func_encode = vf->abs_vfid; - u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id; - struct igu_regular cmd_data = {0}; - - cmd_data.sb_id_and_flags = - ((index << IGU_REGULAR_SB_INDEX_SHIFT) | - (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | - (update << IGU_REGULAR_BUPDATE_SHIFT) | - (op << IGU_REGULAR_ENABLE_INT_SHIFT)); - - - ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT | - func_encode << IGU_CTRL_REG_FID_SHIFT | - IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT; - - DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", - cmd_data.sb_id_and_flags, igu_addr_data); - REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags); - mmiowb(); - barrier(); - - DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n", - ctl, igu_addr_ctl); - REG_WR(bp, igu_addr_ctl, ctl); - mmiowb(); - barrier(); - -} -static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf) -{ - int i; - u32 val; - - /* Set VF masks and configuration - pretend */ - bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid)); - - REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0); - REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0); - REG_WR(bp, IGU_REG_SB_MASK_LSB, 0); - REG_WR(bp, IGU_REG_SB_MASK_MSB, 0); - REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0); - REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0); - - val = REG_RD(bp, IGU_REG_VF_CONFIGURATION); - val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN); - if (vf->cfg_flags & VF_CFG_INT_SIMD) - val |= IGU_VF_CONF_SINGLE_ISR_EN; - val &= ~IGU_VF_CONF_PARENT_MASK; - val |= BP_FUNC(bp) << IGU_VF_CONF_PARENT_SHIFT; /* parent PF */ - REG_WR(bp, IGU_REG_VF_CONFIGURATION, val); - - bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); - - /* iterate ove all queues, clear sb consumer */ - for (i = 0; i < vf->max_sb_count; i++) { - u8 igu_sb_id = __vf_igu_sb(vf,i); - - /* zero prod memory */ - REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0); - - /* clear sb state machine */ - bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id, - false /* VF */); - - /* disable + update */ - bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0, - IGU_INT_DISABLE, 1); - } -} - - -static void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid) -{ - /* set the VF-PF association in the FW */ - storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp)); - - /* clear vf errors*/ - bnx2x_vf_semi_clear_err(bp, abs_vfid); - bnx2x_vf_pglue_clear_err(bp, abs_vfid); - - /* internal vf-enable - pretend */ - bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid)); - bnx2x_vf_enable_internal(bp, true); - bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); -} - -static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf) -{ - /* Reset vf in IGU interrupts are still disabled */ - bnx2x_vf_igu_reset(bp, vf); - - /* pretend to enable the vf with the PBF */ - bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid)); - bnx2x_vf_enable_pbf(bp, true); - bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); -} - - -static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid) -{ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - - vmk_PCIDevice vfDev; - struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); - if (!vf) - goto unknown_dev; - - bnx2x_vmk_vf_pci_dev(bp, vf->index, &vfDev); - - if (vfDev) { - u16 status; - vmk_uint16 pos; - - bnx2x_vmk_get_sriov_cap_pos(bp, &pos); - bnx2x_vmk_pci_read_config_word(vfDev, pos + PCI_EXP_DEVSTA, &status); - - return (status & PCI_EXP_DEVSTA_TRPND); - } -#else - struct pci_dev *dev; - struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); - if (!vf) - goto unknown_dev; - - dev = pci_get_bus_and_slot(vf->bus, vf->devfn); - if (dev) - return (bnx2x_is_pcie_pending(dev)); - -#endif -unknown_dev: - BNX2X_ERR("Unknown device\n"); - return false; -} - -static int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid) -{ - /* Wait 100ms */ - msleep(100); - - /* Verify no pending pci transactions */ - if (bnx2x_vf_is_pcie_pending(bp, abs_vfid)) - BNX2X_ERR("PCIE Transactions still pending\n"); - - return 0; -} - - -#ifdef VFPF_MBX -/* enable vf_pf mailbox (aka vf-pf-chanell) */ -static void bnx2x_vf_enable_mbx(struct bnx2x *bp, u8 abs_vfid) -{ - bnx2x_vf_flr_clnup_epilog(bp, abs_vfid); - - /* enable the mailbox in the FW */ - storm_memset_vf_mbx_ack(bp, abs_vfid); - storm_memset_vf_mbx_valid(bp, abs_vfid); - - /* eanble the VF access to the mailbox */ - bnx2x_vf_enable_access(bp, abs_vfid); -} -#endif - -static int bnx2x_vf_disable(struct bnx2x *bp, u8 abs_vfid) -{ - bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid)); - bnx2x_vf_enable_pbf(bp, false); - bnx2x_vf_enable_internal(bp, false); - bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); - return 0; -} - -static vf_api_t -bnx2x_vfq_sw_cleanup(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq, bool drv_only) -{ - struct list_head *head; - struct bnx2x_list_elem *first; - unsigned long ramrod_flags = 0; - - /* remove classification rules */ - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - if (drv_only) - set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags); - - /* macs */ - head = &rxq->mac_obj.head; - while (!list_empty(head)) { - first = list_first_entry(head, struct bnx2x_list_elem, link); - bnx2x_vf_set_mac(bp, rxq, first->data.mac.mac, 0, ramrod_flags); - } - - /* vlans TODO*/ - bnx2x_vf_clear_vlans(bp, rxq, false, 0, ramrod_flags); - - /* multicasts */ - if (VF_IS_LEADING_RXQ(rxq)) - /* 0-length list will cause the removal of all mcasts */ - bnx2x_vf_set_mcasts(bp, vf, NULL, 0, drv_only); - - /* Invalidate HW context */ - rxq->cxt->ustorm_ag_context.cdu_usage = 0; - rxq->cxt->xstorm_ag_context.cdu_reserved = 0; - - return VF_API_SUCCESS; -} - -int bnx2x_vf_queue_update_ramrod(struct bnx2x *bp, struct bnx2x_vfq *rxq, - dma_addr_t data_mapping, u8 block) -{ - int rc = VF_API_PENDING; - - rxq->update_pending = BNX2X_VF_UPDATE_PENDING; - - /* SETUP ramrod. - * - * bnx2x_sp_post() takes a spin_lock thus no other explict memory - * barrier except from mmiowb() is needed to impose a - * proper ordering of memory operations. - */ - mmiowb(); - - - bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_CLIENT_UPDATE, rxq->cid, - U64_HI(data_mapping), U64_LO(data_mapping), 0); - - /* Wait for completion if requested */ - if(block) - rc = bnx2x_wait_ramrod(bp, BNX2X_VF_UPDATE_DONE, rxq->index, - &rxq->update_pending, 0); - return rc; -} - -static int bnx2x_vf_queue_ramrod(struct bnx2x *bp, - struct bnx2x_client_ramrod_params *p, int cmd, - u16 initial_state, u16 final_state, u8 block) -{ - union eth_specific_data ramrod_data = {{0}}; - int rc = VF_API_PENDING; - - ramrod_data.common_ramrod_data.client_id = p->cl_id; - - *(p->pstate) = initial_state; - - /* SETUP ramrod. - * - * bnx2x_sp_post() takes a spin_lock thus no other explict memory - * barrier except from mmiowb() is needed to impose a - * proper ordering of memory operations. - */ - mmiowb(); - bnx2x_sp_post(bp, cmd, p->cid, - ramrod_data.update_data_addr.hi, - ramrod_data.update_data_addr.lo, 0); - - /* Wait for completion if requested */ - if(block) - rc = bnx2x_wait_ramrod(bp, final_state, p->index, p->pstate, 0); - - return rc; - -} - - -/* - * FLR routines: - */ - -static void bnx2x_vf_free_resc(struct bnx2x *bp ,struct bnx2x_virtf *vf) -{ -#ifndef DYNAMIC_RSC - /* static allocation: nothing to do */ -#else - int i; - - for_each_vf_sb(vf, i) - SET_BIT(vf->sbi[i].hc_qid, BP_QID_MAP(bp)); - - for (; i < vf->rxq_count; i++) - SET_BIT(vf->rxq[i].hw_qid, BP_QID_MAP(bp)); -#endif -} - -int bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *vf) -{ - u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp); - int i; - - /* - * FLR cleanup is mostly asynchronous - Whenever a command is - * dispatched to the FW the function returns and restarted when the - * completion arrives. - */ - - /* terminate all the queues */ - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - struct bnx2x_client_ramrod_params ramrod_params = {0}; - - if (rxq->state == BNX2X_FP_STATE_CLOSED) - continue; - - /* Send terminate ramrod */ - ramrod_params.cid = rxq->cid; - ramrod_params.cl_id = vfq_cl_id(vf, rxq); - ramrod_params.index = 0; - ramrod_params.pstate = &rxq->state; - - bnx2x_vf_queue_ramrod(bp, &ramrod_params, - RAMROD_CMD_ID_ETH_TERMINATE, - BNX2X_FP_STATE_OPEN | BNX2X_FP_SUB_STATE_TERMINATING, - BNX2X_FP_STATE_CLOSED, true); /* block */ - } - - /* clear allocated resources ~~ clear classification rules */ - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - bnx2x_vfq_sw_cleanup(bp, vf, rxq, true); /* drv-only*/ - } - - /* poll DQ usage counter */ - bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid)); - bnx2x_flr_clnup_poll_hw_counter(bp, - DORQ_REG_VF_USAGE_CNT, - "DQ VF usage counter timed out", - poll_cnt); - bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); - - /* send the FW cleanup command - poll for the results */ - if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid), - poll_cnt)) - return -EBUSY; - - /* ATC cleanup */ - - /* verify TX hw is flushed */ - bnx2x_tx_hw_flushed(bp, poll_cnt); - - /* mark resources as released */ - bnx2x_vf_free_resc(bp, vf); - - return 0; -} - -#if 0 -void bnx2x_vf_handle_flr_self_notification(struct bnx2x* bp, u8 abs_vfid) -{ - int i; - - for_each_vf(bp, i) { - struct bnx2x_virtf *vf = BP_VF(bp, i); - - if (vf->abs_vfid != abs_vfid) - continue; - - - vf->state = VF_RESET; - DP(BNX2X_MSG_MCP,"Initiating Final cleanup for VF %d\n", - vf->abs_vfid); - bnx2x_vf_flr_clnup(bp, vf); - - /* re-open the mailbox */ - bnx2x_vf_enable_mbx(bp, vf->abs_vfid); - - break; - } -} -#endif - - -void bnx2x_vf_handle_flr_event(struct bnx2x* bp) -{ - #define FLRD_VFS_DWORDS (BNX2X_MAX_NUM_OF_VFS / 32) - - u32 flrd_vfs[FLRD_VFS_DWORDS]; /* bit vector */ - int i; - - /* Read FLR'd VFs */ - for (i = 0; i < FLRD_VFS_DWORDS; i++) - flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]); - - DP(BNX2X_MSG_MCP,"DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n", - flrd_vfs[0], flrd_vfs[1]); - - for_each_vf(bp, i) { - struct bnx2x_virtf *vf = BP_VF(bp, i); - u8 reset = 0; - - if (vf->abs_vfid < 32) - reset = flrd_vfs[0] & (1 << vf->abs_vfid); - else - reset = flrd_vfs[1] & (1 << (vf->abs_vfid -32)); - - if (reset) { -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - /* - * A work-around for the FLR issued between vf_acquire/vf_get_info - * and vf_init - */ - if (vf->state == VF_ACQUIRED) - continue; -#endif - - vf->state = VF_RESET; - DP(BNX2X_MSG_MCP,"Initiating Final cleanup for VF %d\n", - vf->abs_vfid); - - bnx2x_vf_flr_clnup(bp, vf); - -#ifdef VFPF_MBX /* BNX2X_UPSTREAM */ - - /* re-open the mailbox */ - bnx2x_vf_enable_mbx(bp, vf->abs_vfid); -#endif - } - } - - /* Acknoledge the VFs you handled (per PF)*/ - for (i = 0; i < FLRD_VFS_DWORDS; i++) - SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], - flrd_vfs[i]); - - bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0); - - /* - * clear the acked bits - better yet if the MCP implemented - * write to clear semantics - */ - for (i = 0; i < FLRD_VFS_DWORDS; i++) - SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],0); - - -} - - -/* - * IOV global initialization routines - */ -void bnx2x_iov_init_dq(struct bnx2x *bp) -{ - if (!IS_SRIOV(bp)) - return; - - /* Set the DQ such that the CID reflect the abs_vfid */ - REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0); - REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS)); - - /* - * Set VFs starting CID. If its > 0 the preceding CIDs are belong to - * the PF L2 queues - */ - REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID); - - /* The VF window size is the log2 of the max number of CIDs per VF */ - REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND); - - /* - * The VF doorbell size 0 - *B, 4 - 128B. We set it here to match - * the Pf doorbell size although the 2 are independent. - */ - REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, - BNX2X_DB_SHIFT - BNX2X_DB_MIN_SHIFT); - - /* - * No security checks for now - - * configure single rule (out of 16) mask = 0x1, value = 0x0, - * CID range 0 - 0x1ffff - */ - REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1); - REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0); - REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0); - REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff); - - /* set the number of VF alllowed doorbells to the full DQ range */ - REG_WR(bp, DORQ_REG_VF_NORM_MAX_CID_COUNT, 0x20000); - - /* set the VF doorbell threshold */ - REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4); -} - -void bnx2x_iov_init_dmae(struct bnx2x *bp) -{ - if (!IS_SRIOV(bp)) - return; - - REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0); -} - - -static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov) -{ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - - vmk_uint16 pos; - vmk_PCIDevice dev; - - if (bnx2x_vmk_pci_dev(bp, &dev)) - return -ENODEV; - - bnx2x_vmk_get_sriov_cap_pos(bp, &pos); - - iov->pos = pos; - bnx2x_vmk_pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl); - bnx2x_vmk_pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total); - bnx2x_vmk_pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial); - bnx2x_vmk_pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset); - bnx2x_vmk_pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride); - bnx2x_vmk_pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz); - bnx2x_vmk_pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); - bnx2x_vmk_pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); -#else - - int pos; - struct pci_dev *dev = bp->pdev; - - pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); - if (!pos) - return -ENODEV; - - iov->pos = pos; - DP(BNX2X_MSG_IOV,"sriov ext pos %d\n",pos); - pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl); - pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total); - pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial); - pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset); - pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride); - pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz); - pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); - pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); - -#endif - return 0; - -} - -static void bnx2x_sriov_nres(struct bnx2x *bp, int *nres) -{ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - - /* - * The code below dpend on the SRIOV capability being initilaized on - * native Linux pci_dev structure. Since iov->nres is used only for - * debug, we skip thie code to To avoid compatibility issues. - */ -#else - int i; - unsigned long flags; - struct pci_dev *dev = bp->pdev; - - for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { - flags = pci_resource_flags(dev, PCI_IOV_RESOURCES + i); - if (!flags) - continue; - (*nres)++; - if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) - i++; - } -#endif -} - -static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov) -{ - u32 val; - - /* - * read the SRIOV capability structure - * The fields can be read via configuration read or - * directly from the device (starting at offset PCICFG_OFFSET) - */ - if (bnx2x_sriov_pci_cfg_info(bp, iov)) - return -ENODEV; - - /* get the number of SRIOV bars */ - iov->nres = 0; - bnx2x_sriov_nres(bp, &iov->nres); - - /* read the first_vfid */ - val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF); - iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK) - * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp)); - - DP(BNX2X_MSG_IOV, "IOV info[%d]: " - "first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, " - "num vfs %d, offset %d, stride %d, page size 0x%x\n", - BP_FUNC(bp), - iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total, - iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz); - - return 0; -} - -static inline int bnx2x_vf_bus(struct bnx2x *bp, int vfid) -{ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - return bnx2x_vmk_vf_bus(bp, vfid); -#else - struct pci_dev *dev = bp->pdev; - struct bnx2x_sriov *iov = &bp->vfdb->sriov; - - return dev->bus->number + ((dev->devfn + iov->offset + - iov->stride * vfid) >> 8); -#endif -} - -static inline int bnx2x_vf_devfn(struct bnx2x *bp, int vfid) -{ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - return bnx2x_vmk_vf_devfn(bp, vfid); -#else - struct pci_dev *dev = bp->pdev; - struct bnx2x_sriov *iov = &bp->vfdb->sriov; - - return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff; -#endif -} - -static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf) -{ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - bnx2x_vmk_vf_set_bars(bp, vf); -#else - int i, n; - struct pci_dev *dev = bp->pdev; - struct bnx2x_sriov *iov = &bp->vfdb->sriov; - - for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i+=2, n++) { - u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i); - u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i); - do_div(size, iov->total); - vf->bars[n].bar = start + size * vf->abs_vfid; - vf->bars[n].size = size; - } -#endif -} - -static inline int bnx2x_ari_enabled(struct pci_dev *dev) -{ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - return 1; -#else - return (dev->bus->self && dev->bus->self->ari_enabled); -#endif -} - -static inline void __devinit -bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid) -{ - struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); - if (vf) { - if (!vf->max_sb_count) - vf->igu_base_id = igu_sb_id; - vf->max_sb_count++; - } -} - -static void __devinit -bnx2x_get_vf_igu_cam_info(struct bnx2x *bp) -{ - int sb_id; - u32 val; - u8 fid; - - /* IGU in normal mode - read CAM */ - for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) { - val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4); - if (!(val & IGU_REG_MAPPING_MEMORY_VALID)) - continue; - fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID); - if (!(fid & IGU_FID_ENCODE_IS_PF)) - bnx2x_vf_set_igu_info(bp, sb_id, - (fid & IGU_FID_VF_NUM_MASK)); - - DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n", - ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"), - ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) : - (fid & IGU_FID_VF_NUM_MASK)), sb_id, - GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR)); - } -} - -static void __bnx2x_iov_free_vfdb(struct bnx2x *bp) -{ - if (bp->vfdb) { - if (bp->vfdb->vfq_stats) - kfree(bp->vfdb->vfq_stats); - if (bp->vfdb->rxqs) - kfree(bp->vfdb->rxqs); - if (bp->vfdb->txqs) - kfree(bp->vfdb->txqs); - if (bp->vfdb->vfs) - kfree(bp->vfdb->vfs); - kfree(bp->vfdb); - } - bp->vfdb = NULL; -} - -/* must be called after PF bars are mapped */ -int __devinit bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param, - int num_vfs_param) -{ - int err, i, queue_count; - struct bnx2x_sriov *iov; - - -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - vmk_PCIDevice vmkDev; -#endif - - bp->vfdb = NULL; - - /* verify chip revision */ - if (CHIP_IS_E1x(bp)) - return 0; - - /* check if SRIOV support is turned off */ - if (!num_vfs_param) - return 0; - - /* SRIOV can be enabled only with MSIX */ - if (int_mode_param == INT_MODE_MSI || int_mode_param == INT_MODE_INTx) - BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n"); - - err = -EIO; - /* verify ari is enabled */ - if (!bnx2x_ari_enabled(bp->pdev)) { - BNX2X_ERR("ARI not supported, SRIOV can not be enabled\n"); - return err; - } - - /* verify igu is in normal mode */ - if (CHIP_INT_MODE_IS_BC(bp)) { - BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n"); - return err; - } - - /* allocate the vfs database */ - bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL); - if (!bp->vfdb) { - err = -ENOMEM; - goto failed; - } - - /* - * get the sriov info - Linux already collected all the pertinent - * information, however the sriov structure is for the private use - * of the pci module. Also we want this information regardless - * of the hyper-visor. - */ - - iov = &(bp->vfdb->sriov); - err = bnx2x_sriov_info(bp, iov); - if (err) - goto failed; - - /* calcuate the actual number of VFs */ - iov->nr_virtfn = min_t(u16, iov->total, (u16)num_vfs_param); - - /* allcate the vf array */ - bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) * - BNX2X_NR_VIRTFN(bp), GFP_KERNEL); - if (!bp->vfdb->vfs) { - err = -ENOMEM; - goto failed; - } - - /* Initial VF init - index and abs_vfid - nr_virtfn must be set */ - for_each_vf(bp, i) { - bnx2x_vf(bp, i, index) = i; - bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i; - bnx2x_vf(bp, i, state) = VF_FREE; - } - - /* re-read the IGU CAM for VFs - index and abs_vfid must be set */ - bnx2x_get_vf_igu_cam_info(bp); - - /* get the total queue count and allocate the global queue arrays */ - queue_count = bnx2x_iov_get_max_queue_count(bp); - - /* allocate the queue arrays for all VFs */ - bp->vfdb->rxqs = kzalloc(sizeof(struct bnx2x_vfq) * queue_count, - GFP_KERNEL); - if (!bp->vfdb->rxqs) { - err = -ENOMEM; - goto failed; - } - bp->vfdb->txqs = kzalloc(sizeof(struct bnx2x_vfq) * queue_count, - GFP_KERNEL); - if (!bp->vfdb->txqs) { - err = -ENOMEM; - goto failed; - } - bp->vfdb->vfq_stats = kzalloc(sizeof(struct bnx2x_vfq_stats) * - queue_count , GFP_KERNEL); - if (!bp->vfdb->vfq_stats) { - err = -ENOMEM; - goto failed; - } - -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - - /* get the PCI device object */ - if (bnx2x_vmk_pci_dev(bp, &vmkDev)) { - printk(KERN_ERR "Failed to get PCI device object"); - goto failed; - } - - /* enable the VFs */ - if (vmk_PCIEnableVFs(vmkDev, &iov->nr_virtfn) != VMK_OK) { - printk(KERN_ERR "Failed to enable VFs.\n"); - goto failed; - } - printk(KERN_ERR "VF num is %d\n", iov->nr_virtfn); -#else - BNX2X_DEV_INFO("VF num is %d\n", iov->nr_virtfn); - - /* enable sriov */ - DP(BNX2X_MSG_IOV, "pci_enable_sriov(%d)\n", iov->nr_virtfn); - err = pci_enable_sriov(bp->pdev, iov->nr_virtfn); - if (err) - goto failed; -#endif - - /* Final VF init */ - queue_count = 0; - for_each_vf(bp, i) { - struct bnx2x_virtf* vf = BP_VF(bp, i); - - /* fill in the BDF and bars */ - vf->bus = bnx2x_vf_bus(bp, i); - vf->devfn = bnx2x_vf_devfn(bp, i); - bnx2x_vf_set_bars(bp, vf); - - DP(BNX2X_MSG_IOV, "VF info[%d]: bus 0x%x, devfn 0x%x, " - "bar0 [0x%08x, %d], bar1 [0x%08x, %d], bar2 [0x%08x, %d]\n", - vf->abs_vfid, vf->bus, vf->devfn, - (unsigned)vf->bars[0].bar, vf->bars[0].size, - (unsigned)vf->bars[1].bar, vf->bars[1].size, - (unsigned)vf->bars[2].bar, vf->bars[2].size); - - /* set local queue arrays */ - vf->rxq = &bp->vfdb->rxqs[queue_count]; - vf->txq = &bp->vfdb->txqs[queue_count]; - vf->vfq_stats = &bp->vfdb->vfq_stats[queue_count]; - queue_count += vf->max_sb_count; - } - return 0; -failed: - DP(BNX2X_MSG_IOV, "Failed err=%d\n", err); - __bnx2x_iov_free_vfdb(bp); - return err; -} - -void __devexit bnx2x_iov_remove_one(struct bnx2x *bp) -{ -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - vmk_PCIDevice vmkDev; - VMK_ReturnStatus vmkRet; -#endif - - /* if SRIOV is not eanbled there's nothing to do */ - if (!IS_SRIOV(bp)) - return; - -#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ - /* get the PCI device object */ - vmkRet = vmk_PCIGetPCIDevice(pci_domain_nr(bp->pdev->bus), - bp->pdev->bus->number, - PCI_SLOT(bp->pdev->devfn), - PCI_FUNC(bp->pdev->devfn), - &vmkDev); - if (vmkRet != VMK_OK) - printk(KERN_ERR "Failed to get PCI device object"); - else - vmk_PCIDisableVFs(vmkDev); -#else - /* disable SRIOV */ - pci_disable_sriov(bp->pdev); -#endif - /* free vf database */ - __bnx2x_iov_free_vfdb(bp); -} - -u8 bnx2x_iov_get_max_queue_count(struct bnx2x * bp) -{ - int i; - u8 queue_count = 0; - - if (IS_SRIOV(bp)) - for_each_vf(bp, i) - queue_count += bnx2x_vf(bp, i, max_sb_count); - - return queue_count; -} - -void bnx2x_iov_free_mem(struct bnx2x* bp) -{ - int i; - - if (!IS_SRIOV(bp)) - return; - - /* free vfs hw contexts */ - for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS ; i++) { - struct hw_dma *cxt = &bp->vfdb->context[i]; - BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size); - } - - BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr, - BP_VFDB(bp)->sp_dma.mapping, - BP_VFDB(bp)->sp_dma.size); - -#ifdef VFPF_MBX /* BNX2X_UPSTREAM */ - BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr, - BP_VF_MBX_DMA(bp)->mapping, - BP_VF_MBX_DMA(bp)->size); -#endif - -} - - -int bnx2x_iov_alloc_mem(struct bnx2x* bp) -{ - size_t tot_size; - int i, rc = 0; - - if (!IS_SRIOV(bp)) - return rc; - - /* allocate vfs hw contexts */ - tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) * - BNX2X_CIDS_PER_VF * sizeof(union cdu_context); - - for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS ; i++) { - struct hw_dma *cxt = BP_VF_CXT_PAGE(bp,i); - cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ); - - if (cxt->size) { - BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size); - } - else { - cxt->addr = NULL; - cxt->mapping = 0; - } - tot_size -= cxt->size; - } - - /* allocate vfs ramrods dma memory - client_init and set_mac*/ - tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp); - BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping, - tot_size); - BP_VFDB(bp)->sp_dma.size = tot_size; - -#ifdef VFPF_MBX /* BNX2X_UPSTREAM */ - tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE; - BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping, - tot_size); - BP_VF_MBX_DMA(bp)->size = tot_size; - -#endif - return 0; - -alloc_mem_err: - return -ENOMEM; -} - -/* - * must be called after the number of PF queues and the number of VFs are - * both known - */ -static void -bnx2x_iov_init_resc(struct bnx2x *bp, struct vf_pf_resc_request *resc) -{ - u16 vlan_count = 0; - u8 max_queues = min_t(u8, BNX2X_VF_MAX_QUEUES , BNX2X_CIDS_PER_VF); - - resc->num_rxqs = resc->num_txqs = max_queues; - - /* no credit calculcis for macs (just yest) */ - resc->num_mac_filters = 1; - - /* divvy up vlan rules */ - vlan_count = bp->vlans_pool.check(&bp->vlans_pool); - vlan_count = 1 << ilog2(vlan_count); - resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp); - - /* no real limitation */ - resc->num_mc_filters = 0; - - /* will be set per VF just before allocation */ - resc->num_sbs = 0; -} - -/* called by bnx2x_nic_load */ -int bnx2x_iov_nic_init(struct bnx2x *bp) -{ - int vfid; - struct bnx2x_vfq *rxq; - struct vf_pf_resc_request *resc; - - if (!IS_SRIOV(bp)) - return 0; - - /* initialize vf database */ - resc = &BP_VFDB(bp)->avail_resc; - bnx2x_iov_init_resc(bp, resc); - - for_each_vf(bp, vfid) { - int i; - struct bnx2x_virtf* vf = BP_VF(bp, vfid); - int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) * - BNX2X_CIDS_PER_VF; - union cdu_context *base_cxt = (union cdu_context *) - BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr + - (base_vf_cid & (ILT_PAGE_CIDS-1)); - - DP(BNX2X_MSG_IOV, "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, " - "base cid 0x%x, base cxt %p\n", - vf->abs_vfid, - vf->max_sb_count, - base_vf_cid, - BNX2X_FIRST_VF_CID + base_vf_cid, - base_cxt); - - /* Initialize the queue contexts */ - vf->rxq_count = VF_MAX_QUEUE_CNT(vf); - for_each_vf_rxq(vf, i) { - rxq = VF_RXQ(vf, i); - - rxq->cxt = &((base_cxt + i)->eth); - rxq->index = i; - rxq->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i; - rxq->state = BNX2X_FP_STATE_CLOSED; - - DP(BNX2X_MSG_IOV, "VF[%d] rxq[%d]: index %d, " - "cid 0x%x, cxt %p\n", - vf->abs_vfid, i, - rxq->index, - rxq->cid, - rxq->cxt); - } - - vf->txq_count = VF_MAX_QUEUE_CNT(vf); - for_each_vf_txq(vf, i) { - struct bnx2x_vfq *txq = VF_TXQ(vf, i); - txq->cxt = &((base_cxt + i)->eth); - txq->index = i; - txq->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i; - } - - /* - * init the classification objectsthe cl_id is bogus. - * It is allocated late when the VF is acquired - */ - - /* mac, vlan - per queue, - * but only the leading object is initialized - */ - rxq = VF_LEADING_RXQ(vf); - - bnx2x_init_mac_obj(bp, &rxq->mac_obj, 0xFF, rxq->cid, - FW_VF_HANDLE(vf->abs_vfid), - BP_VF_SP(bp, vf, mac_rdata), - BP_VF_SP_MAP(bp, vf, mac_rdata), - BNX2X_FILTER_MAC_PENDING, - &vf->filter_state, - BNX2X_OBJ_TYPE_RX_TX, - &bp->macs_pool); - - bnx2x_init_vlan_obj(bp, &rxq->vlan_obj, 0xFF, rxq->cid, - FW_VF_HANDLE(vf->abs_vfid), - BP_VF_SP(bp, vf, vlan_rdata), - BP_VF_SP_MAP(bp, vf, vlan_rdata), - BNX2X_FILTER_VLAN_PENDING, - &vf->filter_state, - BNX2X_OBJ_TYPE_RX_TX, - &bp->vlans_pool); - - /* mcast */ - bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF, rxq->cid, - FW_VF_HANDLE(vf->abs_vfid), - BP_VF_SP(bp, vf, mcast_rdata), - BP_VF_SP_MAP(bp, vf, mcast_rdata), - BNX2X_FILTER_MCAST_PENDING, - &vf->filter_state, - BNX2X_OBJ_TYPE_RX_TX); - - /* PF TX switching mac object */ - bnx2x_init_mac_obj(bp, BP_TX_MAC_OBJ(bp), bnx2x_fp(bp, 0, cl_id), - bnx2x_fp(bp, 0, cid), BP_FUNC(bp), - bnx2x_sp(bp, tx_switch_mac_rdata), - bnx2x_sp_mapping(bp, tx_switch_mac_rdata), - BNX2X_FILTER_TX_SWITCH_MAC_PENDING, - &bp->sp_state, BNX2X_OBJ_TYPE_TX, - &bp->macs_pool); - - /* reserve the vf vlan credit */ - bp->vlans_pool.get(&bp->vlans_pool, resc->num_vlan_filters); - vf->vlan_rules_count = resc->num_vlan_filters; - - vf->filter_state = 0; - vf->leading_rss = -1; - vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id); - -#ifdef VFPF_MBX /* BNX2X_UPSTREAM */ - /* set the mailbox message addresses */ - BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg*) - ((u8*)BP_VF_MBX_DMA(bp)->addr + vfid * - MBX_MSG_ALIGNED_SIZE); - - BP_VF_MBX(bp, vfid)->msg_mapping = (dma_addr_t) - ((u8*)BP_VF_MBX_DMA(bp)->mapping + vfid * - MBX_MSG_ALIGNED_SIZE); - - /* Enable vf mailbox */ - bnx2x_vf_enable_mbx(bp, vf->abs_vfid); -#endif - } - return 0; -} - -/* called by bnx2x_chip_cleanup */ -int bnx2x_iov_chip_cleanup(struct bnx2x *bp) -{ - struct list_head *head; - struct bnx2x_list_elem *first; - int i; - - if (!IS_SRIOV(bp)) - return 0; - - /* release all the VFs */ - for_each_vf(bp, i) { - struct bnx2x_virtf *vf = BP_VF(bp, i); - bnx2x_vf_release(bp, vf); - } - - /* release iov TX mac rules */ - head = &BP_TX_MAC_OBJ(bp)->head; - while (!list_empty(head)) { - first = list_first_entry(head, struct bnx2x_list_elem, link); - bnx2x_iov_set_tx_mac(bp, first->data.mac.mac, false); - } - return 0; -} - - -/* called by bnx2x_init_hw_func, returns the next ilt line */ -int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line) -{ - int i; - struct bnx2x_ilt* ilt = BP_ILT(bp); - - if (!IS_SRIOV(bp)) - return line; - - /* set vfs ilt lines */ - for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS ; i++) { - struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp,i); - ilt->lines[line+i].page = hw_cxt->addr; - ilt->lines[line+i].page_mapping = hw_cxt->mapping; - ilt->lines[line+i].size = hw_cxt->size; /* doesn't really matter */ - } - return (line+i); -} - - - -static inline u8 bnx2x_iov_is_vf_cid(struct bnx2x* bp, u16 cid) -{ - return ( (cid >= BNX2X_FIRST_VF_CID) && - ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS) ); -} - -static inline -void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp, - struct bnx2x_vfq *rxq, - union event_ring_elem *elem) -{ - switch (elem->message.data.set_mac_event.echo >> BNX2X_SWCID_SHIFT) { - case CLASSIFY_RULE_OPCODE_MAC: - rxq->mac_obj.raw.clear_pending(&rxq->mac_obj.raw); - break; - case CLASSIFY_RULE_OPCODE_VLAN: - rxq->vlan_obj.raw.clear_pending(&rxq->vlan_obj.raw); - break; - default: - BNX2X_ERR("Unsupported classification command: %d\n", - elem->message.data.set_mac_event.echo); - return; - } -} - -static inline -void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp, - struct bnx2x_virtf *vf) -{ - struct bnx2x_mcast_ramrod_params rparam = {0}; - int rc; - - rparam.mcast_obj = &vf->mcast_obj; - - vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw); - - /* If there are pending mcast commands - send them */ - if (vf->mcast_obj.check_pending(&vf->mcast_obj)) { - rc = bnx2x_config_mcast(bp, &rparam, true); - if (rc) - BNX2X_ERR("Failed to send pending mcast commands: %d\n", - rc); - } -} - -static inline -void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp, - struct bnx2x_virtf *vf) -{ - smp_mb__before_clear_bit(); - clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state); - smp_mb__after_clear_bit(); -} - - -int bnx2x_iov_eq_sp_event(struct bnx2x* bp, union event_ring_elem *elem) -{ - struct bnx2x_virtf *vf; - int qidx, abs_vfid; - u8 opcode; - u16 cid = 0xffff; - - if (!IS_SRIOV(bp)) - return 1; - - /* first get the cid - the only events we handle here are cfc-delete - and set-mac completion */ - opcode = elem->message.opcode; - - switch (opcode) { - case EVENT_RING_OPCODE_CFC_DEL: - cid = SW_CID(elem->message.data.cfc_del_event.cid); - break; - case EVENT_RING_OPCODE_CLASSIFICATION_RULES: - case EVENT_RING_OPCODE_MULTICAST_RULES: - case EVENT_RING_OPCODE_FILTERS_RULES: - cid = (elem->message.data.set_mac_event.echo & - BNX2X_SWCID_MASK); - DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid); - break; - case EVENT_RING_OPCODE_VF_FLR: - abs_vfid = elem->message.data.vf_flr_event.vf_id; - goto get_vf; - case EVENT_RING_OPCODE_MALICIOUS_VF: - abs_vfid = elem->message.data.malicious_vf_event.vf_id; - goto get_vf; - default: - return 1; - } - - /* check if the cid is the VF range */ - if (!bnx2x_iov_is_vf_cid(bp, cid)) - return 1; - /* - * extact vf and rxq index from vf_cid - relies on the following: - * 1. vfid on cid reflects the true abs_vfid - * 2. the max number of VFs (per path) is 64 - */ - qidx = cid & ((1 << BNX2X_VF_CID_WND)-1); - abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1); -get_vf: - vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); - - if (!vf) { - BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n", - cid, abs_vfid); - return 0; - } - - switch (opcode) { - case EVENT_RING_OPCODE_CFC_DEL: - DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc del ramrod\n", - vf->abs_vfid, bnx2x_vf_rxq(vf, qidx, index)); - bnx2x_vf_rxq(vf, qidx, state) = BNX2X_FP_STATE_CLOSED; - break; - case EVENT_RING_OPCODE_CLASSIFICATION_RULES: - DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n", - vf->abs_vfid, bnx2x_vf_rxq(vf, qidx, index)); - bnx2x_vf_handle_classification_eqe(bp, VF_RXQ(vf, qidx), elem); - break; - case EVENT_RING_OPCODE_MULTICAST_RULES: - DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n", - vf->abs_vfid, bnx2x_vf_rxq(vf, qidx, index)); - bnx2x_vf_handle_mcast_eqe(bp, vf); - break; - case EVENT_RING_OPCODE_FILTERS_RULES: - DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n", - vf->abs_vfid, bnx2x_vf_rxq(vf, qidx, index)); - bnx2x_vf_handle_filters_eqe(bp, vf); - break; - case EVENT_RING_OPCODE_VF_FLR: - DP(BNX2X_MSG_IOV, "got VF [%d] FLR notification\n", - vf->abs_vfid); - /* Do nothing */ - break; - case EVENT_RING_OPCODE_MALICIOUS_VF: - DP(BNX2X_MSG_IOV, "got VF [%d] MALICIOUS notification\n", - vf->abs_vfid); - /* Do nothing */ - break; - } - return 0; -} - -int bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, int command) -{ - struct bnx2x_virtf *vf; - struct bnx2x_vfq *rxq; - int qidx, abs_vfid, rc; - - if (!IS_SRIOV(bp)) - return 1; - - /* - * extact vf and rxq index from vf_cid - relies on the following: - * 1. vfid on cid reflects the true abs_vfid - * 2. the max number of VFs (per path) is 64 - */ - qidx = vf_cid & ((1 << BNX2X_VF_CID_WND)-1); - abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1); - vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); - - if (!vf) { - BNX2X_ERR("Ramrod completion for unknown VF, cid %d\n", - vf_cid); - return 0; - } - - rc = 0; - rxq = VF_RXQ(vf, qidx); - - /* switch on the command | state */ - switch (command | rxq->state) { - case (RAMROD_CMD_ID_ETH_CLIENT_SETUP | BNX2X_FP_STATE_OPENING): - DP(BNX2X_MSG_IOV, "got VF [%d:%d] setup ramrod\n", - vf->abs_vfid, rxq->index); - rxq->state = BNX2X_FP_STATE_OPEN; - goto get_out; - - case (RAMROD_CMD_ID_ETH_HALT | BNX2X_FP_STATE_HALTING): - DP(BNX2X_MSG_IOV, "got VF [%d:%d] halt ramrod\n", - vf->abs_vfid, rxq->index); - rxq->state = BNX2X_FP_STATE_HALTED; - goto get_out; - - case (RAMROD_CMD_ID_ETH_TERMINATE | BNX2X_FP_STATE_TERMINATING): - DP(BNX2X_MSG_IOV, "got VF [%d:%d] terminate ramrod (STOP)\n", - vf->abs_vfid, rxq->index); - rxq->state = BNX2X_FP_STATE_TERMINATED; - goto get_out; - - case (RAMROD_CMD_ID_ETH_TERMINATE | - (BNX2X_FP_STATE_OPEN | BNX2X_FP_SUB_STATE_TERMINATING)): - DP(BNX2X_MSG_IOV, "got VF [%d:%d] terminate ramrod (FLR)\n", - vf->abs_vfid, rxq->index); - rxq->state = BNX2X_FP_STATE_CLOSED; - goto get_out; - - case (RAMROD_CMD_ID_ETH_CLIENT_UPDATE | - (BNX2X_FP_STATE_OPEN | BNX2X_FP_SUB_STATE_ACTIVATING)): - DP(BNX2X_MSG_IOV, "got VF [%d:%d] activate ramrod\n", - vf->abs_vfid, rxq->index); - rxq->state = (BNX2X_FP_STATE_OPEN | - BNX2X_FP_SUB_STATE_ACTIVATED); - break; - - case (RAMROD_CMD_ID_ETH_CLIENT_UPDATE | - (BNX2X_FP_STATE_OPEN | BNX2X_FP_SUB_STATE_DEACTIVATING)): - DP(BNX2X_MSG_IOV, "got VF [%d:%d] deactivate ramrod\n", - vf->abs_vfid, rxq->index); - rxq->state = (BNX2X_FP_STATE_OPEN | - BNX2X_FP_SUB_STATE_DEACTIVATED); - break; - default: - break; - } - - /* switch on the command only */ - switch (command) { - case (RAMROD_CMD_ID_ETH_CLIENT_UPDATE): - rxq->update_pending = BNX2X_VF_UPDATE_DONE; - break; - default: - rc = 1; - break; - } -get_out: - return rc; -} - - -void bnx2x_iov_adjust_stats_req(struct bnx2x * bp) -{ - int i; - dma_addr_t cur_data_offset; - struct stats_query_entry *cur_query_entry; - u8 stats_count = 0; - - if (!IS_SRIOV(bp)) - return; - - cur_data_offset = bp->fw_stats_data_mapping + - offsetof(struct bnx2x_fw_stats_data, queue_stats) + - BNX2X_NUM_ETH_QUEUES(bp) * sizeof(struct per_queue_stats); - - cur_query_entry = &bp->fw_stats_req-> - query[BNX2X_FIRST_QUEUE_QUERY_IDX + BNX2X_NUM_ETH_QUEUES(bp)]; - - for_each_vf(bp, i) { - int j; - struct bnx2x_virtf *vf = BP_VF(bp, i); - - if (vf->state != VF_ENABLED) - continue; - - for_each_vf_rxq(vf, j) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, j); - - if (rxq->state != (BNX2X_FP_STATE_OPEN | - BNX2X_FP_SUB_STATE_ACTIVATED)) - continue; - - cur_query_entry->kind = STATS_TYPE_QUEUE; - cur_query_entry->index = vfq_cl_id(vf, rxq); - cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); - cur_query_entry->address.hi = - cpu_to_le32(U64_HI(cur_data_offset)); - cur_query_entry->address.lo = - cpu_to_le32(U64_LO(cur_data_offset)); - - cur_query_entry++; - cur_data_offset += sizeof(struct per_queue_stats); - stats_count++; - } - } - bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count; -} - -/* statistics collection */ -static void bnx2x_iov_qstats_update(struct bnx2x *bp, - struct bnx2x_vfq_stats *vfq_stats, - struct per_queue_stats *fw_qstats) -{ - struct tstorm_per_queue_stats *tclient = - &fw_qstats->tstorm_queue_statistics; - struct tstorm_per_queue_stats *old_tclient = &vfq_stats->old_tclient; - - struct ustorm_per_queue_stats *uclient = - &fw_qstats->ustorm_queue_statistics; - struct ustorm_per_queue_stats *old_uclient = &vfq_stats->old_uclient; - - struct xstorm_per_queue_stats *xclient = - &fw_qstats->xstorm_queue_statistics; - struct xstorm_per_queue_stats *old_xclient = &vfq_stats->old_xclient; - - struct bnx2x_vfq_fw_stats *qstats = &vfq_stats->qstats; - u32 diff; - - /* - DP(BNX2X_MSG_IOV, "ucast_sent 0x%x, bcast_sent 0x%x" - " mcast_sent 0x%x\n", - xclient->ucast_pkts_sent, xclient->bcast_pkts_sent, - xclient->mcast_pkts_sent); - - DP(BNX2X_MSG_IOV, "ucast_rcvd 0x%x ucast_dropped 0x%x\n", - tclient->rcv_ucast_pkts, uclient->ucast_no_buff_pkts); - - DP(BNX2X_MSG_IOV, "---------------\n"); - */ - - /* RX T-packets */ - UPDATE_EXTEND_TSTAT(rcv_ucast_pkts, - total_unicast_packets_received); - UPDATE_EXTEND_TSTAT(rcv_mcast_pkts, - total_multicast_packets_received); - UPDATE_EXTEND_TSTAT(rcv_bcast_pkts, - total_broadcast_packets_received); - UPDATE_EXTEND_TSTAT(pkts_too_big_discard, - etherstatsoverrsizepkts); - UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard); - UPDATE_EXTEND_TSTAT(checksum_discard, error_discard); - UPDATE_EXTEND_TSTAT(ttl0_discard, error_discard); - - /* RX T-bytes */ - qstats->total_broadcast_bytes_received_hi = - le32_to_cpu(tclient->rcv_bcast_bytes.hi); - qstats->total_broadcast_bytes_received_lo = - le32_to_cpu(tclient->rcv_bcast_bytes.lo); - - qstats->total_multicast_bytes_received_hi = - le32_to_cpu(tclient->rcv_mcast_bytes.hi); - qstats->total_multicast_bytes_received_lo = - le32_to_cpu(tclient->rcv_mcast_bytes.lo); - - qstats->total_unicast_bytes_received_hi = - le32_to_cpu(tclient->rcv_ucast_bytes.hi); - qstats->total_unicast_bytes_received_lo = - le32_to_cpu(tclient->rcv_ucast_bytes.lo); - - /* - DP(BNX2X_MSG_IOV, "0-ucast_rcvd_hi 0x%x ucast_rcvd_lo 0x%x\n", - qstats->total_unicast_packets_received_hi, - qstats->total_unicast_packets_received_lo); - */ - - /* RX U-packets */ - SUB_EXTEND_USTAT(ucast_no_buff_pkts, - total_unicast_packets_received); - - /* - DP(BNX2X_MSG_IOV, "1-ucast_rcvd_hi 0x%x ucast_rcvd_lo 0x%x\n", - qstats->total_unicast_packets_received_hi, - qstats->total_unicast_packets_received_lo); - - DP(BNX2X_MSG_IOV, "+++++++++++++++++++\n"); - */ - - SUB_EXTEND_USTAT(mcast_no_buff_pkts, - total_multicast_packets_received); - SUB_EXTEND_USTAT(bcast_no_buff_pkts, - total_broadcast_packets_received); - UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard); - UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard); - UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard); - - /* RX U-bytes */ - SUB_64(qstats->total_broadcast_bytes_received_hi, - le32_to_cpu(uclient->bcast_no_buff_bytes.hi), - qstats->total_broadcast_bytes_received_lo, - le32_to_cpu(uclient->bcast_no_buff_bytes.lo)); - - SUB_64(qstats->total_multicast_bytes_received_hi, - le32_to_cpu(uclient->mcast_no_buff_bytes.hi), - qstats->total_multicast_bytes_received_lo, - le32_to_cpu(uclient->mcast_no_buff_bytes.lo)); - - SUB_64(qstats->total_unicast_bytes_received_hi, - le32_to_cpu(uclient->ucast_no_buff_bytes.hi), - qstats->total_unicast_bytes_received_lo, - le32_to_cpu(uclient->ucast_no_buff_bytes.lo)); - - /* TX packets */ - UPDATE_EXTEND_XSTAT(ucast_pkts_sent, - total_unicast_packets_sent); - UPDATE_EXTEND_XSTAT(mcast_pkts_sent, - total_multicast_packets_sent); - UPDATE_EXTEND_XSTAT(bcast_pkts_sent, - total_broadcast_packets_sent); - UPDATE_EXTEND_XSTAT(error_drop_pkts, tx_error_packets); - - /* TX bytes */ - qstats->total_broadcast_bytes_sent_hi = - le32_to_cpu(xclient->bcast_bytes_sent.hi); - qstats->total_broadcast_bytes_sent_lo = - le32_to_cpu(xclient->bcast_bytes_sent.lo); - - qstats->total_multicast_bytes_sent_hi = - le32_to_cpu(xclient->mcast_bytes_sent.hi); - qstats->total_multicast_bytes_sent_lo = - le32_to_cpu(xclient->mcast_bytes_sent.lo); - - qstats->total_unicast_bytes_sent_hi = - le32_to_cpu(xclient->ucast_bytes_sent.hi); - qstats->total_unicast_bytes_sent_lo = - le32_to_cpu(xclient->ucast_bytes_sent.lo); - -} - -static inline -struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id) -{ - int i; - struct bnx2x_virtf *vf = NULL; - - for_each_vf(bp, i) { - vf = BP_VF(bp, i); - if (stat_id >= vf->igu_base_id && - stat_id < vf->igu_base_id + vf->max_sb_count) - break; - } - return vf; - -} - -void bnx2x_iov_storm_stats_update(struct bnx2x *bp) -{ - int i; - u8 stats_count; - struct stats_query_entry *cur_query_entry; - struct per_queue_stats *cur_qstats; - - if (!IS_SRIOV(bp)) - return; - - stats_count = bp->fw_stats_req->hdr.cmd_num - bp->fw_stats_num; - cur_query_entry = &bp->fw_stats_req->query[bp->fw_stats_num]; - cur_qstats = &bp->fw_stats_data->queue_stats[BNX2X_NUM_ETH_QUEUES(bp)]; - - /*DP(BNX2X_MSG_IOV, "iov stats count %d\n", stats_count);*/ - - /* iterate on all vf queues in the current request and collect */ - for (i = 0; i < stats_count; i++, cur_query_entry++, cur_qstats++) { - u8 idx; - u8 stat_id = cur_query_entry->index; - struct bnx2x_virtf *vf = __vf_from_stat_id(bp, stat_id); - - if (!vf) { - BNX2X_ERR("Invalid statistics index %d on request\n", - stat_id); - continue; - } - - idx = cur_query_entry->index - vf->igu_base_id; - - /*DP(BNX2X_MSG_IOV, "VF[%d:%d] updating stats, local index %d\n", - vf->abs_vfid, stat_id, idx);*/ - - bnx2x_iov_qstats_update(bp, &vf->vfq_stats[idx], cur_qstats); - } -} - - -/* - * VF API helpers - */ -static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid, - u8 enable) -{ - u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4; - u32 val = enable ? (abs_vfid | (1 << 6)) : 0; - REG_WR(bp, reg, val); -} - -static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf) -{ - int i; - - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid, vfq_qzone_id(vf,rxq), - false); - } -} - -static inline void bnx2x_vf_igu_txq_enable(struct bnx2x *bp, - struct bnx2x_vfq *txq) -{ -} - -void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf) -{ - u32 val; - - /* clear the VF configuarion - pretend */ - bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid)); - val = REG_RD(bp, IGU_REG_VF_CONFIGURATION); - val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN | - IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK); - REG_WR(bp, IGU_REG_VF_CONFIGURATION, val); - bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); -} - - -static inline -int bnx2x_vf_chk_avail_resc(struct vf_pf_resc_request *req_resc, - struct vf_pf_resc_request *avail_resc) -{ - return ((req_resc->num_rxqs <= avail_resc->num_rxqs) && - (req_resc->num_txqs <= avail_resc->num_txqs) && - (req_resc->num_sbs <= avail_resc->num_sbs) && - (req_resc->num_mac_filters <= avail_resc->num_mac_filters) && - (req_resc->num_vlan_filters <= avail_resc->num_vlan_filters)); -} - -/* - * CORE VF API - */ -vf_api_t bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct vf_pf_resc_request *resc) -{ - /* - * if state is 'acquired' the VF was not released or FLR'd, in - * this case the returned resources match the aquired already - * acquired resources. Verify that the requested numbers do - * not exceed the already acquired numbers. - */ - if (vf->state == VF_ACQUIRED) { - DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources " - "(VF was not released or FLR'd)\n", vf->abs_vfid); - - if (!bnx2x_vf_chk_avail_resc(resc, &vf->alloc_resc)) { - BNX2X_ERR("VF[%d] When re-acquiring resources, " - "requested numbers must be <= then " - "previously acquired numbers\n", - vf->abs_vfid); - return VF_API_FAILURE; - } - return VF_API_SUCCESS; - } - - /* Otherwise vf state must be 'free' or 'reset' */ - if (vf->state != VF_FREE && vf->state != VF_RESET) { - BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n", - vf->abs_vfid, vf->state); - return VF_API_FAILURE; - } - - /* - * static allocation: - * the global maximum number are fixed per VF. - * fail the request if requested number exceed these globals - */ - - /* mac SBs is according to the igu CAM */ - BP_VFDB(bp)->avail_resc.num_sbs = vf->max_sb_count; - - if (!bnx2x_vf_chk_avail_resc(resc, &BP_VFDB(bp)->avail_resc)) { - /* set the max resource in the vf */ - return VF_API_NO_RESOURCE; - } - - vf->rxq_count = resc->num_rxqs; - vf->txq_count = resc->num_txqs; - vf->sb_count = resc->num_sbs; - - /* a request for 0 macs/vlans means you get the max available */ - if (resc->num_mac_filters) - vf->mac_rules_count = resc->num_mac_filters; - if (resc->num_vlan_filters) - vf->vlan_rules_count = resc->num_vlan_filters; - - vf->state = VF_ACQUIRED; - return VF_API_SUCCESS; - -} - -vf_api_t bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, u64 *sb_map) -{ - struct bnx2x_func_init_params func_init = {0}; - struct bnx2x_rss_params rss = {0}; - u16 flags = 0; - int i; - - /* - * the sb resources are initializied at this point, do the - * FW/HW initializations - */ - for_each_vf_sb(vf, i) - bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true, - __vf_fw_sb(vf,i), __vf_igu_sb(vf,i)); - - /* Sanity checks */ - if (vf->state != VF_ACQUIRED) { - DP(BNX2X_MSG_IOV, "VF[%d] is not in the acquired state\n", - vf->abs_vfid); - return VF_API_FAILURE; - } -#ifndef VFPF_MBX /* BNX2X_UPSTREAM */ - /* FLR cleanup epilogue */ - if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid)) - return VF_API_FAILURE;; -#endif - - /* reset IGU VF statistics: MSIX */ - REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0); - - /* vf init */ - if (vf->cfg_flags & VF_CFG_STATS) - flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ); - - if (vf->cfg_flags & VF_CFG_TPA) - flags |= FUNC_FLG_TPA; - - if (is_vf_multi(vf)) - flags |= FUNC_FLG_RSS; - - /* function setup */ - if (flags & FUNC_FLG_RSS) { - rss.cap = (RSS_IPV4_CAP | RSS_IPV4_TCP_CAP | - RSS_IPV6_CAP | RSS_IPV6_TCP_CAP); - rss.mode = ETH_RSS_MODE_REGULAR; - rss.result_mask = MULTI_MASK; - func_init.rss = &rss; - } - func_init.func_flgs = flags; - func_init.pf_id = BP_FUNC(bp); - func_init.func_id = FW_VF_HANDLE(vf->abs_vfid); - func_init.fw_stat_map = vf->fw_stat_map; - func_init.spq_map = vf->spq_map; - func_init.spq_prod = 0; - bnx2x_func_init(bp, &func_init); - - /* Configure RSS TBD */ - - /* Enable the vf */ -#ifndef VFPF_MBX /* BNX2X_UPSTREAM */ - bnx2x_vf_enable_access(bp, vf->abs_vfid); -#endif - bnx2x_vf_enable_traffic(bp, vf); - - /* queue protection table */ - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid, - vfq_qzone_id(vf, rxq), true); - } - - /* zero stats */ - for_each_vf_rxq(vf, i) - memset(&vf->vfq_stats[i], 0 ,sizeof(struct bnx2x_vfq_stats)); - - vf->state = VF_ENABLED; - - return VF_API_SUCCESS; -} - -vf_api_t bnx2x_vf_txq_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vfq *txq, - struct bnx2x_client_init_params *p) -{ - /* - * init queue hw and fw - * all the VF originated parameters are already set on the txq_init - * variable. - */ - p->txq_params.cxt = txq->cxt; - p->txq_params.fw_sb_id = vfq_fw_sb_id(vf,txq); - p->txq_params.cid = HW_CID(bp, txq->cid); - -#ifdef BNX2X_VF_LOCAL_SWITCH - /* always enable Tx-switching and security for VFs */ - set_bit(BNX2X_QUEUE_FLG_TX_SWITCH, &p->txq_params.flags); - set_bit(BNX2X_QUEUE_FLG_TX_SEC, &p->txq_params.flags); -#endif - - /* enable interrupts */ - bnx2x_vf_igu_ack_sb(bp, vf, vfq_igu_sb_id(vf,txq), USTORM_ID, 0, - IGU_INT_ENABLE, 0); - - return VF_API_SUCCESS; -} - -vf_api_t bnx2x_vf_rxq_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq, - struct bnx2x_client_init_params *p, - u8 activate) -{ - vf_api_t rc = VF_API_SUCCESS; - u8 cl_id = vfq_cl_id(vf, rxq); - - if (vf->cfg_flags & VF_CFG_FW_FC) { - /* set pause params - no spport for now */ - BNX2X_ERR("No support for pause to VFs (abs_vfid - %d)\n", - vf->abs_vfid); - } - - /* - * init queue (client) hw and fw - * all the VF originated parameters are already set on the rxq_init - * variable. - */ - - /* - * note: the pause thresholds are set by default to 0 which - * effectively turns off the feature for this client. This is very - * important - we can not allow one client (VF) to influence another - * client (another VF) - */ - - p->rxq_params.cid = HW_CID(bp, rxq->cid); - p->rxq_params.cxt = rxq->cxt; - p->rxq_params.fw_sb_id = vfq_fw_sb_id(vf, rxq); - p->rxq_params.cl_qzone_id = vfq_qzone_id(vf, rxq); - p->rxq_params.cl_id = cl_id; - p->rxq_params.spcl_id = vf->sp_cl_id; - - /* Tell the FW to collect stats */ - set_bit(BNX2X_QUEUE_FLG_STATS, &p->rxq_params.flags); - set_bit(BNX2X_QUEUE_FLG_ZERO_STATS, &p->rxq_params.flags); - p->rxq_params.stat_id = vfq_stat_id(vf, rxq); - - /* Tell the FW to handle OV */ - if (IS_MF_SD(bp)) - set_bit(BNX2X_QUEUE_FLG_OV, &p->rxq_params.flags); - - - if (test_bit(BNX2X_QUEUE_FLG_TPA, &p->rxq_params.flags)) - p->rxq_params.max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES; - - /* set values pertinent only for the 'leading' rxq: - * 1. tss leading client id and the - * 2. vf mcast object client id - * 3. rxq mac object client id - * 4. rxq vlan object client id - */ - if (VF_IS_LEADING_RXQ(rxq)) { - set_bit(CLIENT_IS_LEADING_RSS, &p->ramrod_params.client_flags); - set_bit(CLIENT_IS_MULTICAST, &p->ramrod_params.client_flags); - vf->leading_rss = cl_id; - vf->mcast_obj.raw.cl_id = cl_id; - rxq->mac_obj.raw.cl_id = cl_id; - rxq->vlan_obj.raw.cl_id = cl_id; - } - - p->txq_params.tss_leading_cl_id = vf->leading_rss; - - /* dispatch the setup ramrod */ - p->ramrod_params.state = BNX2X_FP_STATE_OPEN; - p->ramrod_params.pstate = &rxq->state; - p->ramrod_params.cl_id = cl_id; - p->ramrod_params.cid = rxq->cid; - p->ramrod_params.index = rxq->index; - - if (bnx2x_setup_fw_client(bp, p, activate, - BP_VF_SP(bp, vf, client_init), - BP_VF_SP_MAP(bp, vf, client_init))) - rc = VF_API_FAILURE; - - /* enable interrupts */ - bnx2x_vf_igu_ack_sb(bp, vf, vfq_igu_sb_id(vf, rxq), USTORM_ID, 0, - IGU_INT_ENABLE, 0); - - return rc; -} - -vf_api_t bnx2x_vfq_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq) -{ - struct bnx2x_client_ramrod_params client_stop = {0}; - - /* skip if unused */ - if ((rxq->state & ~BNX2X_FP_SUB_STATE_MASK) != BNX2X_FP_STATE_OPEN) - return VF_API_FAILURE; - - /* rx mac filtering - set to drop all */ - bnx2x_vf_set_rxq_mode(bp, vf, rxq, 0); - - bnx2x_vfq_sw_cleanup(bp, vf, rxq, false); - - /* deactivate the queue TODO */ - - /* stop the queue - halt + delete cfc */ - client_stop.pstate = &rxq->state; - client_stop.index = rxq->index; - client_stop.cl_id = vfq_cl_id(vf, rxq); - client_stop.cid = rxq->cid; - bnx2x_stop_fw_client(bp, &client_stop); - - return VF_API_SUCCESS; -} - -vf_api_t bnx2x_vf_close(struct bnx2x *bp ,struct bnx2x_virtf *vf) -{ - int i; - - /* tear down all queues (that are already setup) */ - for_each_vf_rxq(vf, i) - bnx2x_vfq_teardown(bp, vf, VF_RXQ(vf, i)); - - /* disable the interrupts */ - bnx2x_vf_igu_disable(bp, vf); - - /* disable the vf */ - bnx2x_vf_clr_qtbl(bp, vf); - bnx2x_vf_disable(bp, vf->abs_vfid); - - vf->state = VF_ACQUIRED; - - return VF_API_SUCCESS; -} - -/* - * VF relaese can be called either: - * 1. the VF was acquired but not loaded - * 2. the vf was loaded or in the process of loading - */ -void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf) -{ - switch(vf->state) { - case VF_ENABLED: - bnx2x_vf_close(bp, vf); - case VF_ACQUIRED: - bnx2x_vf_free_resc(bp, vf); - vf->state = VF_FREE; - break; - case VF_FREE: - case VF_RESET: - /* do nothing */ - break; - default: - BNX2X_ERR("Illegal state for VF[%d:%d]\n", - vf->index, vf->abs_vfid); - break; - } -} - - -vf_api_t bnx2x_vf_trigger_q(struct bnx2x *bp ,struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq, u8 activate) -{ - - vf_api_t rc = VF_API_FAILURE; - struct client_update_ramrod_data *client_update; - - /* activate/ deactivate only open queues */ - if ((rxq->state & ~BNX2X_FP_SUB_STATE_MASK) != BNX2X_FP_STATE_OPEN) - return rc; - - rxq->state |= activate ? BNX2X_FP_SUB_STATE_ACTIVATING : - BNX2X_FP_SUB_STATE_DEACTIVATING; - - client_update = BP_VF_SP(bp, vf, client_update); - memset(client_update, 0, sizeof(*client_update)); - - client_update->client_id = vfq_cl_id(vf, rxq); - client_update->activate_flg = activate; - client_update->activate_change_flg = 1; - - if (!bnx2x_vf_queue_update_ramrod(bp, rxq, - BP_VF_SP_MAP(bp, vf, client_update), - true)) /* block */ - rc = VF_API_SUCCESS; - - return rc; -} - -vf_api_t bnx2x_vf_trigger(struct bnx2x *bp ,struct bnx2x_virtf *vf, u8 activate) -{ - int i; - vf_api_t rc = VF_API_SUCCESS; - - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq * rxq = VF_RXQ(vf, i); - rc = bnx2x_vf_trigger_q(bp, vf, rxq, activate); - if (rc) { - BNX2X_ERR("VF[%d] Error - Failed to %s queue %d\n", - vf->abs_vfid, - (activate ? "activate" : "quiesce"), - rxq->index); - break; - } - } - return rc; -} - -int bnx2x_iov_set_tx_mac(struct bnx2x *bp, u8 *mac, bool add) -{ - unsigned long ramrod_flags = 0; - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - - return bnx2x_set_mac_one(bp, mac, BP_TX_MAC_OBJ(bp), add, - BNX2X_ETH_MAC, ramrod_flags); -} - -bool bnx2x_vf_check_vlan_op(struct bnx2x *bp, struct bnx2x_vfq *rxq, - u16 vtag, bool chk_add) -{ - struct bnx2x_vlan_mac_ramrod_params ramrod_param; - - memset(&ramrod_param, 0, sizeof(ramrod_param)); - - ramrod_param.data.vlan.vlan = vtag; - ramrod_param.vlan_mac_obj = &rxq->vlan_obj; - - if (chk_add) - return rxq->vlan_obj.check_add(&ramrod_param); - else - return (rxq->vlan_obj.check_del(&ramrod_param) ? true : false); -} - -vf_api_t bnx2x_vf_clear_vlans(struct bnx2x *bp, struct bnx2x_vfq *rxq, - bool skip, u16 vlan_to_skip, - unsigned long ramrod_flags) -{ - struct list_head *head; - struct bnx2x_list_elem *first; - u16 first_vlan; - vf_api_t rc = VF_API_SUCCESS; - - /* release iov TX mac rules */ - head = &rxq->vlan_obj.head; - while ( !list_empty(head) && !rc) { - first = list_first_entry(head, struct bnx2x_list_elem, link); - first_vlan = first->data.vlan.vlan; - - /* skip */ - if (skip && vlan_to_skip == first_vlan) { - if (list_is_singular(head)) - break; - list_rotate_left(head); - continue; - } - - /* remove */ - rc = bnx2x_vf_set_vlan(bp, rxq, first_vlan, false, - ramrod_flags); - if (first_vlan) - atomic_dec(&rxq->vlan_count); - } - return rc; -} - -vf_api_t bnx2x_vf_set_vlan(struct bnx2x *bp, struct bnx2x_vfq *rxq, - u16 vtag, bool add, unsigned long ramrod_flags) -{ - /* - * set the vlan do not consume credit - - * the VF reservs vlan credit in advance. - */ - int rc = bnx2x_set_vlan_one(bp, vtag, &rxq->vlan_obj, add, - ramrod_flags, false); - if (rc) - return VF_API_FAILURE; - - return VF_API_SUCCESS; -} - -vf_api_t bnx2x_vf_set_mac(struct bnx2x *bp, struct bnx2x_vfq *rxq, - u8 *mac, bool add, unsigned long ramrod_flags) -{ - int rc = bnx2x_set_mac_one(bp, mac, &rxq->mac_obj, add, BNX2X_ETH_MAC, - ramrod_flags); - if (rc) - return VF_API_FAILURE; - - return VF_API_SUCCESS; -} - -vf_api_t bnx2x_vf_set_mcasts(struct bnx2x *bp, struct bnx2x_virtf *vf, - bnx2x_mac_addr_t *mcasts, int mcast_num, - bool drv_only) -{ - int i, rc; - struct bnx2x_mcast_list_elem *mc_mac = NULL; - struct bnx2x_mcast_ramrod_params rparam = {0}; - - /* allocate memory for mcast list */ - if (mcast_num) { - mc_mac = kzalloc(sizeof(*mc_mac) * mcast_num, GFP_ATOMIC); - if (!mc_mac) { - BNX2X_ERR("Failed to create multicast MACs " - "list\n"); - return VF_API_NO_RESOURCE; - } - } - - rparam.mcast_obj = &vf->mcast_obj; - if (drv_only) - set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags); - - /* clear existing mcasts */ - rc = bnx2x_config_mcast(bp, &rparam, false); - if (rc) { - BNX2X_ERR("Failed to clear multicast " - "configuration: %d\n", rc); - return VF_API_FAILURE; - } - - /* set mcasts */ - if (mcast_num) { - /* fill in list */ - INIT_LIST_HEAD(&rparam.mcast_list); - for (i = 0; i < mcast_num; i++) { - mc_mac->mac = mcasts[i]; - list_add_tail(&mc_mac->link, &rparam.mcast_list); - mc_mac++; - } - rparam.mcast_list_len = mcast_num; - - rc = bnx2x_config_mcast(bp, &rparam, true); - if (rc) { - BNX2X_ERR("Failed to set a new multicast " - "configuration: %d\n", rc); - return VF_API_FAILURE; - } - - /* free allocated list */ - mc_mac = list_first_entry(&rparam.mcast_list, - struct bnx2x_mcast_list_elem, link); - kfree(mc_mac); - } - return VF_API_SUCCESS; -} - -vf_api_t bnx2x_vf_set_rxq_mode(struct bnx2x* bp,struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq, - unsigned long accept_flags) -{ - struct bnx2x_rx_mode_ramrod_params ramrod_param; - - memset(&ramrod_param, 0, sizeof(ramrod_param)); - - /* Prepare ramrod parameters */ - ramrod_param.cid = rxq->cid; - ramrod_param.cl_id = vfq_cl_id(vf, rxq); - ramrod_param.rx_mode_obj = &bp->rx_mode_obj; - ramrod_param.func_id = FW_VF_HANDLE(vf->abs_vfid); - - ramrod_param.accept_flags = accept_flags; - ramrod_param.pstate = &vf->filter_state; - ramrod_param.state = BNX2X_FILTER_RX_MODE_PENDING; - - set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state); - set_bit(RAMROD_RX, &ramrod_param.ramrod_flags); - set_bit(RAMROD_TX, &ramrod_param.ramrod_flags); - set_bit(RAMROD_COMP_WAIT, &ramrod_param.ramrod_flags); - - ramrod_param.rdata = BP_VF_SP(bp, vf, rx_mode_rdata.e2); - ramrod_param.rdata_mapping = BP_VF_SP_MAP(bp, vf, rx_mode_rdata.e2); - - if(bnx2x_config_rx_mode(bp, &ramrod_param)) { - BNX2X_ERR("Set rx_mode %d failed\n", bp->rx_mode); - return VF_API_FAILURE; - } - return VF_API_SUCCESS; -} - -u8 inline bnx2x_vfid_valid(struct bnx2x* bp, int vfid) -{ - return (bp->vfdb && vfid <= BNX2X_NR_VIRTFN(bp)); -} - -void inline bnx2x_vf_get_sbdf(struct bnx2x *bp, struct bnx2x_virtf *vf, u32* sbdf) -{ - *sbdf = vf->devfn | (vf->bus << 8); -} - -void inline bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_bar_info *bar_info) -{ - - int n; - bar_info->nr_bars = bp->vfdb->sriov.nres; - for (n = 0; n < bar_info->nr_bars; n++) { - bar_info->bars[n] = vf->bars[n]; - } -} - -#ifdef VFPF_MBX /* BNX2X_UPSTREAM */ - -/* - * VF MBX (aka vf-pf channel) - */ - -/* this works only on E2 */ -int bnx2x_copy32_vf_dmae(struct bnx2x *bp, u8 from_vf, dma_addr_t pf_addr, - u8 vfid, u32 vf_addr_hi, u32 vf_addr_lo, u32 len32) -{ - struct dmae_command dmae; - int rc = 0; - - if (CHIP_IS_E1x(bp)) { - BNX2X_ERR("Chip revision does not support VFs\n"); - return DMAE_NOT_RDY; - } - - if (!bp->dmae_ready) { - BNX2X_ERR("DMAE is not ready, can not copy\n"); - return DMAE_NOT_RDY; - } - - /* set opcode and fixed command fields */ - bnx2x_prep_dmae_with_comp(bp, &dmae, DMAE_SRC_PCI, DMAE_DST_PCI); - - if (from_vf) { - dmae.opcode_iov = (vfid << DMAE_COMMAND_SRC_VFID_SHIFT) | - (DMAE_SRC_VF << DMAE_COMMAND_SRC_VFPF_SHIFT) | - (DMAE_DST_PF << DMAE_COMMAND_DST_VFPF_SHIFT); - - dmae.opcode |= (DMAE_C_DST << DMAE_COMMAND_C_FUNC_SHIFT); - - dmae.src_addr_lo = vf_addr_lo; - dmae.src_addr_hi = vf_addr_hi; - dmae.dst_addr_lo = U64_LO(pf_addr); - dmae.dst_addr_hi = U64_HI(pf_addr); - } - else { - dmae.opcode_iov = (vfid << DMAE_COMMAND_DST_VFID_SHIFT) | - (DMAE_DST_VF << DMAE_COMMAND_DST_VFPF_SHIFT) | - (DMAE_SRC_PF << DMAE_COMMAND_SRC_VFPF_SHIFT); - - dmae.opcode |= (DMAE_C_SRC << DMAE_COMMAND_C_FUNC_SHIFT); - - - dmae.src_addr_lo = U64_LO(pf_addr); - dmae.src_addr_hi = U64_HI(pf_addr); - dmae.dst_addr_lo = vf_addr_lo; - dmae.dst_addr_hi = vf_addr_hi; - } - dmae.len = len32; - - bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_DMAE); - - /* issue the command and wait for completion */ - rc = bnx2x_issue_dmae_with_comp(bp, &dmae); - return rc; -} - -static void bnx2x_vf_dp_mbx_raw(struct bnx2x *bp, int msglvl, char* name, - u8* msg, int len) -{ - int i; - - DP(msglvl, "%s: [ ", name); - for (i = 0; i < len; i++) - DP_CONT(msglvl, "0x%02x ", msg[i]); - DP_CONT(msglvl, "]\n"); -} - -static void bnx2x_vf_dp_resp_status(struct bnx2x *bp, - struct pf_vf_msg_hdr *hdr) -{ - DP(BNX2X_MSG_IOV, "Response header: status=%d, op=%d, op_ver=%d\n", - hdr->status, - hdr->opcode, - hdr->opcode_ver); -} -static void bnx2x_vf_mbx_resp(struct bnx2x *bp, struct bnx2x_vf_mbx *mbx, - u8 status) -{ - mbx->msg->resp.resp.hdr.opcode = mbx->hdr.opcode; - mbx->msg->resp.resp.hdr.opcode_ver = mbx->hdr.opcode_ver; - mbx->msg->resp.resp.hdr.status = status; - bnx2x_vf_dp_resp_status(bp, &mbx->msg->resp.resp.hdr); -} - -static void bnx2x_vf_mbx_acquire_resp(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx, u8 status) -{ - int i; - struct pf_vf_msg_acquire_resp *resp = (struct pf_vf_msg_acquire_resp*) - &mbx->msg->resp.acquire_resp; - struct pf_vf_resc *resc = &resp->resc; - - memset(resp, 0, sizeof(*resp)); - resp->hdr.opcode = mbx->hdr.opcode; - resp->hdr.opcode_ver = mbx->hdr.opcode_ver; - resp->hdr.status = status; - - bnx2x_vf_dp_resp_status(bp, &resp->hdr); - - /* fill in pfdev info */ - resp->pfdev_info.chip_num = bp->common.chip_id; - resp->pfdev_info.db_size = (1 << BNX2X_DB_SHIFT); - resp->pfdev_info.indices_per_sb = HC_SB_MAX_INDICES_E2; - resp->pfdev_info.pf_cap = (PFVF_CAP_RSS | /*PFVF_CAP_DHC |*/ PFVF_CAP_TPA); - - if (status == PFVF_STATUS_NO_RESOURCE || - status == PFVF_STATUS_SUCCESS) { - /* - * set resources numbers, if status equals NO_RESOURCE these - * are max possible numbers - */ - resc->num_rxqs = vf->rxq_count; - resc->num_txqs = vf->txq_count; - resc->num_sbs = vf->max_sb_count; - resc->num_mac_filters = vf->mac_rules_count; - resc->num_vlan_filters = vf->vlan_rules_count; - resc->num_mc_filters = 0; - - if (status == PFVF_STATUS_SUCCESS) { - /* fill in the allocated resources */ - for_each_vf_rxq(vf, i) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, i); - resc->hw_qid[i] = vfq_qzone_id(vf, rxq); - } - for_each_vf_sb(vf, i) { - resc->hw_sbs[i].hw_sb_id = __vf_igu_sb(vf,i); - resc->hw_sbs[i].sb_qid = __vf_hc_qzone(vf,i); - } - } - } - - DP(BNX2X_MSG_IOV, "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, " - "db_size=%d, idx_per_sb=%d, pf_cap=0x%x\n" - "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, " - "n_macs-%d, n_vlans-%d, n_mcs-%d\n", - vf->abs_vfid, - resp->pfdev_info.chip_num, - resp->pfdev_info.db_size, - resp->pfdev_info.indices_per_sb, - resp->pfdev_info.pf_cap, - resc->num_rxqs, - resc->num_txqs, - resc->num_sbs, - resc->num_mac_filters, - resc->num_vlan_filters, - resc->num_mc_filters); - - DP_CONT(BNX2X_MSG_IOV, "hw_qids- [ "); - for (i = 0; i < vf->rxq_count; i++) - DP_CONT(BNX2X_MSG_IOV, "%d ", resc->hw_qid[i]); - DP_CONT(BNX2X_MSG_IOV, "], sb_info- [ "); - for (i = 0; i < vf->sb_count; i++) - DP_CONT(BNX2X_MSG_IOV, "%d:%d ", - resc->hw_sbs[i].hw_sb_id, - resc->hw_sbs[i].sb_qid); - DP_CONT(BNX2X_MSG_IOV, "]\n"); -} - -static void bnx2x_vf_mbx_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - vf_api_t status; - struct vf_pf_msg_acquire *acquire = &mbx->msg->req.acquire; - - /* log vfdef info */ - DP(BNX2X_MSG_IOV, "VF[%d] ACQUIRE: " - "vfdev_info- vf_id %d, vf_os %d, vf driver ver %d\n" - "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, " - "n_macs-%d, n_vlans-%d, n_mcs-%d\n", - vf->abs_vfid, - acquire->vfdev_info.vf_id, - acquire->vfdev_info.vf_os, - acquire->vfdev_info.vf_driver_version, - acquire->resc_request.num_rxqs, - acquire->resc_request.num_txqs, - acquire->resc_request.num_sbs, - acquire->resc_request.num_mac_filters, - acquire->resc_request.num_vlan_filters, - acquire->resc_request.num_mc_filters); - - /* acquire the resources */ - status = bnx2x_vf_acquire(bp, vf ,&acquire->resc_request); - - /* prepare the response */ - bnx2x_vf_mbx_acquire_resp(bp, vf ,mbx, - vfapi_to_pfvf_status_codes[status]); -} - -static void bnx2x_vf_mbx_init_vf(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - int i; - vf_api_t status; - struct vf_pf_msg_init_vf *init_vf = &mbx->msg->req.init_vf; - - vf->spq_map = init_vf->spq_addr; - vf->fw_stat_map = init_vf->stats_addr; - - /* debug */ - DP(BNX2X_MSG_IOV, "VF[%d] VF_INIT: sb_addr[ ", vf->abs_vfid); - for_each_vf_sb(vf, i) - DP_CONT(BNX2X_MSG_IOV, "0x%llx ", init_vf->sb_addr[i]); - - DP_CONT(BNX2X_MSG_IOV, "], spq_addr=0x%llx, fw_stat_addr=0x%llx\n", - vf->spq_map, vf->fw_stat_map); - - status = bnx2x_vf_init(bp, vf, init_vf->sb_addr); - bnx2x_vf_mbx_resp(bp, mbx, vfapi_to_pfvf_status_codes[status]); -} - -static void bnx2x_vf_mbx_setup_q(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - vf_api_t status = VF_API_FAILURE; - struct vf_pf_msg_setup_q *setup_q = &mbx->msg->req.setup_q; - - /* verify vf_qid */ - if (setup_q->vf_qid >= vf->rxq_count) { - BNX2X_ERR("vf_qid %d invalid, max queue count is %d\n", - setup_q->vf_qid, vf->rxq_count); - goto response; - } - - /* - * tx queues must be setup along side rx queues thus if the rx queue - * is not marked as valid there's nothing to do. - */ - - if (setup_q->param_valid & VFPF_RXQ_VALID) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, setup_q->vf_qid); - struct bnx2x_client_init_params p = {{0}}; - - /* verify the queue state */ - if (rxq->state != BNX2X_FP_STATE_CLOSED) { - BNX2X_ERR("vf queue %d is already open\n", - setup_q->vf_qid); - goto response; - } - - /* tx queue first */ - if (setup_q->param_valid & VFPF_TXQ_VALID) { - struct bnx2x_vfq *txq = VF_TXQ(vf, setup_q->vf_qid); - - - /* save sb resource index */ - txq->sb_idx = setup_q->txq.vf_sb; - - /* prepare txq init parameters */ - p.txq_params.flags = setup_q->txq.flags; - p.txq_params.dscr_map = setup_q->txq.txq_addr; - p.txq_params.sb_cq_index = setup_q->txq.sb_index; - p.txq_params.hc_rate = setup_q->txq.hc_rate; - p.txq_params.traffic_type = setup_q->txq.traffic_type; - - DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, " - "sb-index=%d, hc-rate=%d, " - "flags=0x%lx, traffic-type=%d, " - "txq_addr=0x%llx\n", - vf->abs_vfid, - setup_q->vf_qid, - txq->sb_idx, - p.txq_params.sb_cq_index, - p.txq_params.hc_rate, - p.txq_params.flags, - p.txq_params.traffic_type, - p.txq_params.dscr_map); - - bnx2x_vf_txq_setup(bp, vf, txq, &p); - } - - /* save sb resource index */ - rxq->sb_idx = setup_q->rxq.vf_sb; - - /* prepare rxq init parameters */ - p.rxq_params.flags = setup_q->rxq.flags; - p.rxq_params.drop_flags = setup_q->rxq.drop_flags; - p.rxq_params.dscr_map = setup_q->rxq.rxq_addr; - p.rxq_params.sge_map = setup_q->rxq.sge_addr; - p.rxq_params.rcq_map = setup_q->rxq.rcq_addr; - p.rxq_params.rcq_np_map = setup_q->rxq.rcq_np_addr; - p.rxq_params.mtu = setup_q->rxq.mtu; - p.rxq_params.buf_sz = setup_q->rxq.buf_sz; /* must be laready adjusted */ - p.rxq_params.tpa_agg_sz = setup_q->rxq.tpa_agg_sz; - p.rxq_params.max_sges_pkt = setup_q->rxq.max_sge_pkt; - p.rxq_params.sge_buf_sz = setup_q->rxq.sge_buf_sz; - p.rxq_params.cache_line_log = setup_q->rxq.cache_line_log; - p.rxq_params.sb_cq_index = setup_q->rxq.sb_index; - p.rxq_params.stat_id = setup_q->rxq.stat_id; - p.rxq_params.hc_rate = setup_q->rxq.hc_rate; - - DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, " - "sb-index=%d, hc-rate=%d, mtu=%d, " - "buf-size=%d\n" - "sge-size=%d, max_sge_pkt=%d, " - "tpa-agg-size=%d, flags=0x%lx, " - "drop-flags=0x%x, cache-log=%d, stat-id=%d\n" - "rcq_addr=0x%llx, rcq_np_addr=0x%llx, " - "rxq_addr=0x%llx, sge_addr=0x%llx\n", - vf->abs_vfid, - setup_q->vf_qid, - rxq->sb_idx, - p.rxq_params.sb_cq_index, - p.rxq_params.hc_rate, - p.rxq_params.mtu, - p.rxq_params.buf_sz, - p.rxq_params.sge_buf_sz, - p.rxq_params.max_sges_pkt, - p.rxq_params.tpa_agg_sz, - p.rxq_params.flags, - p.rxq_params.drop_flags, - p.rxq_params.cache_line_log, - p.rxq_params.stat_id, - p.rxq_params.rcq_map, - p.rxq_params.rcq_np_map, - p.rxq_params.dscr_map, - p.rxq_params.sge_map); - - status = bnx2x_vf_rxq_setup(bp, vf, rxq, &p, 1); - } - -response: - bnx2x_vf_mbx_resp(bp, mbx, vfapi_to_pfvf_status_codes[status]); -} - -static vf_api_t -bnx2x_vf_mbx_add_mac_vlan(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq, - struct vf_pf_q_mac_vlan_filter *filter) -{ - int rc; - unsigned long ramrod_flags = 0; - - if (filter->flags & VFPF_Q_FILTER_DEST_MAC_PRESENT) { - set_bit(RAMROD_COMP_WAIT, &ramrod_flags); - rc = bnx2x_vf_set_mac(bp, rxq, filter->dest_mac, 1, ramrod_flags); - } - - if (filter->flags & VFPF_Q_FILTER_VLAN_TAG_PRESENT) - rc = -1; /* no support to do */ - - if (rc) { - BNX2X_ERR("Failed to add mac-vlan rule rc=%d\n", rc); - return VF_API_FAILURE; - } - - return VF_API_SUCCESS; -} - -static void bnx2x_vf_mbx_set_q_filters(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - vf_api_t status = VF_API_SUCCESS; - struct vf_pf_msg_set_q_filters *filters = &mbx->msg->req.set_q_filters; - - /* verify vf_qid */ - if (filters->vf_qid > vf->rxq_count) - goto response; - - DP(BNX2X_MSG_IOV, "VF[%d] Q_FILTERS: queue[%d]\n", - vf->abs_vfid, - filters->vf_qid); - - /* MAC-VLAN */ - if (filters->flags & VFPF_SET_Q_FILTERS_MAC_VLAN_CHANGED) { - int i; - struct bnx2x_vfq *rxq = VF_RXQ(vf, filters->vf_qid); - - for (i = 0; i < filters->n_mac_vlan_filters; i++) { - struct vf_pf_q_mac_vlan_filter *filter = - &filters->filters[i]; - - DP(BNX2X_MSG_IOV, "MAC-VLAN[%d] -- flags=0x%x", - i, filter->flags); - if (filter->flags & VFPF_Q_FILTER_VLAN_TAG_PRESENT) - DP_CONT(BNX2X_MSG_IOV, ", vlan=%d", - filter->vlan_tag); - if (filter->flags & VFPF_Q_FILTER_DEST_MAC_PRESENT) - DP_CONT(BNX2X_MSG_IOV, - ", MAC=%02x:%02x:%02x:%02x:%02x:%02x", - filter->dest_mac[0], - filter->dest_mac[1], - filter->dest_mac[2], - filter->dest_mac[3], - filter->dest_mac[4], - filter->dest_mac[5]); - DP_CONT(BNX2X_MSG_IOV, "\n"); - - status = bnx2x_vf_mbx_add_mac_vlan(bp, vf, rxq, - &filters->filters[i]); - if (status != VF_API_SUCCESS) - break; - } - } - - /* RX mask */ - if (status == VF_API_SUCCESS && - filters->flags & VFPF_SET_Q_FILTERS_RX_MASK_CHANGED) { - struct bnx2x_vfq *rxq = VF_RXQ(vf, filters->vf_qid); - unsigned long accept_flags = 0; - - DP(BNX2X_MSG_IOV, "RX-MASK=0x%x\n", filters->rx_mask); - - /* covert VF-PF if mask to bnx2x accept flags */ - if (filters->rx_mask & VFPF_RX_MASK_ACCEPT_MATCHED_UNICAST) - set_bit(BNX2X_ACCEPT_UNICAST, &accept_flags); - if (filters->rx_mask & VFPF_RX_MASK_ACCEPT_MATCHED_MULTICAST) - set_bit(BNX2X_ACCEPT_MULTICAST, &accept_flags); - if (filters->rx_mask & VFPF_RX_MASK_ACCEPT_ALL_UNICAST) - set_bit(BNX2X_ACCEPT_ALL_UNICAST, &accept_flags); - if (filters->rx_mask & VFPF_RX_MASK_ACCEPT_ALL_MULTICAST) - set_bit(BNX2X_ACCEPT_ALL_MULTICAST, &accept_flags); - if (filters->rx_mask & VFPF_RX_MASK_ACCEPT_BROADCAST) - set_bit(BNX2X_ACCEPT_BROADCAST, &accept_flags); - - status = bnx2x_vf_set_rxq_mode(bp, vf, rxq, filters->rx_mask); - } - - /* multicasts */ - if(status == VF_API_SUCCESS && - filters->flags & VFPF_SET_Q_FILTERS_MULTICAST_CHANGED) { - BNX2X_ERR("VF[%d] No suppoert for VF MC just yet q[%d]\n", - vf->abs_vfid, filters->vf_qid); - status = VF_API_FAILURE; - } -response: - bnx2x_vf_mbx_resp(bp, mbx, vfapi_to_pfvf_status_codes[status]); -} - -static void bnx2x_vf_mbx_activate_q(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - struct bnx2x_vfq *rxq = VF_RXQ(vf, mbx->msg->req.q_op.vf_qid); - vf_api_t status = bnx2x_vf_trigger_q(bp, vf, rxq, true); - - DP(BNX2X_MSG_IOV, "VF[%d] Q_ACTIVATE: vf_qid=%d\n", vf->abs_vfid, - mbx->msg->req.q_op.vf_qid); - - bnx2x_vf_mbx_resp(bp, mbx, vfapi_to_pfvf_status_codes[status]); -} - -static void bnx2x_vf_mbx_deactivate_q(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - struct bnx2x_vfq *rxq = VF_RXQ(vf, mbx->msg->req.q_op.vf_qid); - vf_api_t status = bnx2x_vf_trigger_q(bp, vf, rxq, false); - - DP(BNX2X_MSG_IOV, "VF[%d] Q_DEACTIVATE: vf_qid=%d\n", vf->abs_vfid, - mbx->msg->req.q_op.vf_qid); - - bnx2x_vf_mbx_resp(bp, mbx, vfapi_to_pfvf_status_codes[status]); -} - -static void bnx2x_vf_mbx_teardown_q(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - struct bnx2x_vfq *rxq = VF_RXQ(vf, mbx->msg->req.q_op.vf_qid); - vf_api_t status = bnx2x_vfq_teardown(bp, vf, rxq); - - DP(BNX2X_MSG_IOV, "VF[%d] Q_TEARDOWN: vf_qid=%d\n", vf->abs_vfid, - mbx->msg->req.q_op.vf_qid); - - bnx2x_vf_mbx_resp(bp, mbx, vfapi_to_pfvf_status_codes[status]); -} - -static void bnx2x_vf_mbx_close_vf(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - vf_api_t status; - - /* TODO verfiy abs_vfid */ - - DP(BNX2X_MSG_IOV, "VF[%d] VF_CLOSE\n", vf->abs_vfid); - - status = bnx2x_vf_close(bp, vf); - bnx2x_vf_mbx_resp(bp, mbx, vfapi_to_pfvf_status_codes[status]); - - /* re-open the mailbox */ - bnx2x_vf_enable_mbx(bp, vf->abs_vfid); -} - -static void bnx2x_vf_mbx_release_vf(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - /* TODO verfiy abs_vfid */ - - DP(BNX2X_MSG_IOV, "VF[%d] VF_RELEASE\n", vf->abs_vfid); - - bnx2x_vf_release(bp, vf); - bnx2x_vf_mbx_resp(bp, mbx, vfapi_to_pfvf_status_codes[VF_API_SUCCESS]); -} - -/* dispatch request */ -void bnx2x_vf_mbx_request(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_mbx *mbx) -{ - /* switch on the opcode */ - switch(mbx->hdr.opcode) { - case PFVF_OP_ACQUIRE: - bnx2x_vf_mbx_acquire(bp, vf, mbx); - break; - case PFVF_OP_INIT_VF: - bnx2x_vf_mbx_init_vf(bp, vf, mbx); - break; - case PFVF_OP_SETUP_Q: - bnx2x_vf_mbx_setup_q(bp, vf, mbx); - break; - case PFVF_OP_SET_Q_FILTERS: - bnx2x_vf_mbx_set_q_filters(bp, vf, mbx); - break; - case PFVF_OP_ACTIVATE_Q: - bnx2x_vf_mbx_activate_q(bp, vf, mbx); - break; - case PFVF_OP_DEACTIVATE_Q: - bnx2x_vf_mbx_deactivate_q(bp, vf, mbx); - break; - case PFVF_OP_TEARDOWN_Q: - bnx2x_vf_mbx_teardown_q(bp, vf, mbx); - break; - case PFVF_OP_CLOSE_VF: - bnx2x_vf_mbx_close_vf(bp, vf, mbx); - break; - case PFVF_OP_RELEASE_VF: - bnx2x_vf_mbx_release_vf(bp, vf, mbx); - break; - default: - break; - } -} - -static inline int bnx2x_vf_mbx_req_len(struct vf_pf_msg_hdr *hdr) -{ - return op_codes_req_sz[hdr->opcode][hdr->opcode_ver].req_sz; -} -static inline int bnx2x_vf_mbx_resp_len(struct vf_pf_msg_hdr *hdr) -{ - return op_codes_req_sz[hdr->opcode][hdr->opcode_ver].resp_sz; -} - -static int bnx2x_vf_mbx_hdr(struct bnx2x *bp, struct bnx2x_vf_mbx *mbx) -{ - /* save the message header */ - mbx->hdr = mbx->msg->req.hdr; - - if (mbx->hdr.if_ver != PFVF_IF_VERSION) { - BNX2X_ERR("Version mismatch - VF ver %d\n", mbx->hdr.if_ver); - bnx2x_vf_mbx_resp(bp, mbx, PFVF_STATUS_VERSION_MISMATCH); - return 1; - } - if (mbx->hdr.opcode >= PFVF_OP_MAX) { - BNX2X_ERR("opcdoe not supported %d\n", mbx->hdr.opcode); - bnx2x_vf_mbx_resp(bp, mbx, PFVF_STATUS_NOT_SUPPORTED); - return 1; - } - if (mbx->hdr.opcode_ver > - PFVF_OP_VER_MAX(op_codes_req_sz[mbx->hdr.opcode])) { - BNX2X_ERR("opcdoe ver not supported %d\n", mbx->hdr.opcode_ver); - bnx2x_vf_mbx_resp(bp, mbx, PFVF_STATUS_NOT_SUPPORTED); - return 1; - } - return 0; -} - -/* handle new vf-pf message */ -void bnx2x_vf_mbx(struct bnx2x *bp, struct vf_pf_event_data *vfpf_event) -{ - struct bnx2x_virtf *vf; - struct bnx2x_vf_mbx *mbx; - u64 vf_addr; - dma_addr_t pf_addr; - u32 len; - u8 vf_idx; - int rc; - - /* Sanity checks consider removing later */ - - /* check if the vf_id is valid */ - if (vfpf_event->vf_id > BNX2X_NR_VIRTFN(bp)) { - BNX2X_ERR("Illegal vf_id %d\n", vfpf_event->vf_id); - return; - } - vf_idx = bnx2x_vf_idx_by_abs_fid(bp, vfpf_event->vf_id); - - mbx = BP_VF_MBX(bp, vf_idx); - - /* verify an event is not currently being processed - - debug failsafe only */ - if (mbx->flags & VF_MSG_INPROCESS) { - BNX2X_ERR("Previous message is still being processed, " - "vf_id %d\n", vfpf_event->vf_id); - return; - } - - vf = BP_VF(bp, vf_idx); - - /* save the VF message address */ - mbx->vf_addr_hi = le32_to_cpu(vfpf_event->msg_addr_hi); - mbx->vf_addr_lo = le32_to_cpu(vfpf_event->msg_addr_lo); - - /* dmae to get the VF message (request) header */ - rc = bnx2x_copy32_vf_dmae(bp, true, mbx->msg_mapping, vf->abs_vfid, - mbx->vf_addr_hi, mbx->vf_addr_lo, - sizeof(struct vf_pf_msg_hdr)/4); - if (rc) { - BNX2X_ERR("Failed to copy msg header from VF %d\n", vf->abs_vfid); - goto release_vf; - } - - /* process the VF message header */ - rc = bnx2x_vf_mbx_hdr(bp, mbx); - if (rc) { - BNX2X_ERR("illegal msg header from VF %d\n", vf->abs_vfid); - goto send_resp; - } - - /* dmae to get the VF message (request) hdr + body */ - len = bnx2x_vf_mbx_req_len(&mbx->hdr); - rc = bnx2x_copy32_vf_dmae(bp, true, mbx->msg_mapping, vf->abs_vfid, - mbx->vf_addr_hi, mbx->vf_addr_lo, - len/4); - if (rc) { - BNX2X_ERR("Failed to copy msg body from VF %d\n", vf->abs_vfid); - goto release_vf; - } - - bnx2x_vf_dp_mbx_raw(bp, BNX2X_MSG_DMAE, "Raw Request", (char *)mbx->msg, - len); - - /* dispatch the request (will prepare the response) */ - bnx2x_vf_mbx_request(bp, vf, mbx); - -send_resp: - vf_addr = HILO_U64(mbx->vf_addr_hi, mbx->vf_addr_lo) + - mbx->hdr.resp_msg_offset; - - pf_addr = mbx->msg_mapping + - offsetof(struct bnx2x_vf_mbx_msg, resp); - - if (mbx->msg->resp.resp.hdr.status == PFVF_STATUS_NOT_SUPPORTED || - mbx->msg->resp.resp.hdr.status == PFVF_STATUS_VERSION_MISMATCH) - len = sizeof(struct pf_vf_msg_hdr); - else - len = bnx2x_vf_mbx_resp_len(&mbx->hdr); - - - bnx2x_vf_dp_mbx_raw(bp, BNX2X_MSG_DMAE, "Raw Response", - (char *)mbx->msg + - offsetof(struct bnx2x_vf_mbx_msg, resp), len); - - len -= sizeof(struct pf_vf_msg_hdr); - - /* copy the response body */ - if (len) { - vf_addr += sizeof(struct pf_vf_msg_hdr); - pf_addr += sizeof(struct pf_vf_msg_hdr); - rc = bnx2x_copy32_vf_dmae(bp, false, pf_addr, vf->abs_vfid, - U64_HI(vf_addr), - U64_LO(vf_addr), - len/4); - - if (rc) { - BNX2X_ERR("Failed to copy response body to VF %d\n", - vf->abs_vfid); - goto release_vf; - } - vf_addr -= sizeof(struct pf_vf_msg_hdr); - pf_addr -= sizeof(struct pf_vf_msg_hdr); - } - - /* ack the FW */ - storm_memset_vf_mbx_ack(bp, vf->abs_vfid); - mmiowb(); - - /* initate dmae to send the reponse */ - mbx->flags &= ~VF_MSG_INPROCESS; - - /* - * copy the repsonse header including status-done field, - * must be last dmae, must be after FW is acked - */ - rc = bnx2x_copy32_vf_dmae(bp, false, pf_addr, vf->abs_vfid, - U64_HI(vf_addr), - U64_LO(vf_addr), - sizeof(struct pf_vf_msg_hdr)/4); - if (rc) { - BNX2X_ERR("Failed to copy response statis to VF %d\n", - vf->abs_vfid); - goto release_vf; - } - - return; - -release_vf: - bnx2x_vf_release(bp, vf); - return; -} -#endif /* VFPF_MBX */ - -#else /* BCM_IOV */ -#error "IOV source file compiles yet BCM_IOV is undefined" -#endif - diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vf.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vf.h deleted file mode 100644 index 5586204..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vf.h +++ /dev/null @@ -1,623 +0,0 @@ -/* bnx2x_vf.h: Broadcom Everest network driver. - * - * Copyright 2009-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Maintained by: Eilon Greenstein - * Written by: Shmulik Ravid - * - */ -#ifndef BNX2X_VF_H -#define BNX2X_VF_H - -#ifndef __VMKLNX__ /* BNX2X_UPSTREAM */ -#define VFPF_MBX -#endif - -#include "bnx2x_vfpf_if.h" - -/* - * The bnx2x device structure holds vfdb structure described below. - * The VF array is indexed by the relative vfid. - */ - -#define BNX2X_VF_MAX_QUEUES 16 -#define BNX2X_VF_MAX_TPA_AGG_QUEUES 8 - -/* VF FP sub-states - apply only to L2 FP serving SRIOV VFs */ -#define BNX2X_FP_SUB_STATE_ACTIVATED 0 -#define BNX2X_FP_SUB_STATE_DEACTIVATED 0x0100 -#define BNX2X_FP_SUB_STATE_ACTIVATING 0x0200 -#define BNX2X_FP_SUB_STATE_DEACTIVATING 0x0300 -#define BNX2X_FP_SUB_STATE_TERMINATING 0x0400 -#define BNX2X_FP_SUB_STATE_MASK 0x0f00 -/* TERMINATED == CLOSED */ - -struct bnx2x_sriov { - u32 first_vf_in_pf; - - /* - * standard SRIOV capability fields, mostly for debugging - */ - int pos; /* capability position */ - int nres; /* number of resources */ - u32 cap; /* SR-IOV Capabilities */ - u16 ctrl; /* SR-IOV Control */ - u16 total; /* total VFs associated with the PF */ - u16 initial; /* initial VFs associated with the PF */ - u16 nr_virtfn; /* number of VFs available */ - u16 offset; /* first VF Routing ID offset */ - u16 stride; /* following VF stride */ - u32 pgsz; /* page size for BAR alignment */ - u8 link; /* Function Dependency Link */ -}; - -/* bars */ -struct bnx2x_vf_bar { - u64 bar; - u32 size; -}; -struct bnx2x_vf_bar_info { - struct bnx2x_vf_bar bars[PCI_SRIOV_NUM_BARS]; - u8 nr_bars; -}; - - -/* vf queue (used both for rx or tx) */ -struct bnx2x_vfq { - struct eth_context *cxt; - - /* MACs object */ - struct bnx2x_vlan_mac_obj mac_obj; - - /* VLANs object */ - struct bnx2x_vlan_mac_obj vlan_obj; - atomic_t vlan_count; /* 0 means vlan-0 is set ~ untagged */ - - - u32 error; /* 0 means all's-well */ - u32 cid; - u16 state; - u8 index; - u8 sb_idx; - u16 update_pending; -#define BNX2X_VF_UPDATE_DONE 0 -#define BNX2X_VF_UPDATE_PENDING 1 - -}; - -/* statistics */ - -struct bnx2x_vfq_fw_stats { - /* RX */ - u32 total_unicast_packets_received_hi; - u32 total_unicast_packets_received_lo; - u32 total_unicast_bytes_received_hi; - u32 total_unicast_bytes_received_lo; - u32 total_multicast_packets_received_hi; - u32 total_multicast_packets_received_lo; - u32 total_multicast_bytes_received_hi; - u32 total_multicast_bytes_received_lo; - u32 total_broadcast_packets_received_hi; - u32 total_broadcast_packets_received_lo; - u32 total_broadcast_bytes_received_hi; - u32 total_broadcast_bytes_received_lo; - u32 no_buff_discard_hi; - u32 no_buff_discard_lo; - u32 etherstatsoverrsizepkts_hi; - u32 etherstatsoverrsizepkts_lo; - u32 error_discard_hi; - u32 error_discard_lo; - - - /* TX */ - u32 total_unicast_packets_sent_hi; - u32 total_unicast_packets_sent_lo; - u32 total_unicast_bytes_sent_hi; - u32 total_unicast_bytes_sent_lo; - u32 total_multicast_packets_sent_hi; - u32 total_multicast_packets_sent_lo; - u32 total_multicast_bytes_sent_hi; - u32 total_multicast_bytes_sent_lo; - u32 total_broadcast_packets_sent_hi; - u32 total_broadcast_packets_sent_lo; - u32 total_broadcast_bytes_sent_hi; - u32 total_broadcast_bytes_sent_lo; - u32 tx_error_packets_hi; - u32 tx_error_packets_lo; -}; - -struct bnx2x_vfq_stats { - struct tstorm_per_queue_stats old_tclient; - struct ustorm_per_queue_stats old_uclient; - struct xstorm_per_queue_stats old_xclient; - struct bnx2x_vfq_fw_stats qstats; -#ifdef BNX2X_PASSTHRU - vmk_NetVFTXQueueStats old_vmk_txq; - vmk_NetVFRXQueueStats old_vmk_rxq; -#endif -}; - - -/* vf state */ -struct bnx2x_virtf { - u16 cfg_flags; -#define VF_CFG_STATS 0x0001 -#define VF_CFG_FW_FC 0x0002 -#define VF_CFG_TPA 0x0004 -#define VF_CFG_INT_SIMD 0x0008 -#define VF_CACHE_LINE 0x0010 - - /* rss params TODO */ - - u8 state; -#define VF_FREE 0 /* VF ready to be acquired holds no resc */ -#define VF_ACQUIRED 1 /* VF aquired, but not initalized */ -#define VF_ENABLED 2 /* VF Enabled */ -#define VF_RESET 3 /* VF FLR'd, pending cleanup */ - - u8 during_clnup; /* non 0 during final cleanup*/ -#define VF_CLNUP_RESC 1 /* reclaiming the resources stage ~ 'final - cleanup' w/o te end wait */ -#define VF_CLNUP_EPILOG 2 /* wait for vf remnants to dissipate in - the HW ~ the end wait of 'final cleanup' */ - - /* dma */ - dma_addr_t fw_stat_map; /* valid iff VF_CFG_STATS */ - dma_addr_t spq_map; /* valid iff VF_CFG_STATS */ - - struct vf_pf_resc_request alloc_resc; - #define max_sb_count alloc_resc.num_sbs - #define rxq_count alloc_resc.num_rxqs - #define txq_count alloc_resc.num_txqs - #define mac_rules_count alloc_resc.num_mac_filters - #define vlan_rules_count alloc_resc.num_vlan_filters - - /* - u8 max_sb_count; - u8 rxq_count; - u8 txq_count; - u16 mac_rules_count; - u16 vlan_rules_count; - */ - - u8 sb_count; /* actual number of SBs */ - u8 igu_base_id; /* base igu status block id */ - - struct bnx2x_vfq *rxq; -#define VF_RXQ(vf, idx) (&(vf)->rxq[(idx)]) -#define bnx2x_vf_rxq(vf, nr, var) (vf)->rxq[(nr)].var - -#define VF_LEADING_RXQ(vf) VF_RXQ(vf, 0) -#define VF_IS_LEADING_RXQ(rxq) ((rxq)->index == 0) - - struct bnx2x_vfq *txq; -#define VF_TXQ(vf, idx) (&(vf)->txq[(idx)]) -#define bnx2x_vf_txq(vf, nr, var) (vf)->txq[(nr)].var - - /* statistics */ - struct bnx2x_vfq_stats *vfq_stats; - - u8 index; /* index in the vf array */ - u8 abs_vfid; - u8 sp_cl_id; - u32 error; /* 0 means all's-well */ - - /* BDF */ - unsigned int bus; - unsigned int devfn; - - /* bars */ - struct bnx2x_vf_bar bars[PCI_SRIOV_NUM_BARS]; - - /* set-mac ramrod state 1-pending, 0-done */ - unsigned long filter_state; - - /* - * leading rss client id ~~ the client id of the first rxq, must be - * set for each txq. - */ - int leading_rss; - - /* MCAST object */ - struct bnx2x_mcast_obj mcast_obj; - - /* RSS configuration object */ - struct bnx2x_rss_config_obj rss_conf_obj; - - -#ifdef BNX2X_PASSTHRU /* ! BNX2X_UPSTREAM */ - u16 mtu; - unsigned long queue_flags; - bool def_vlan_enabled; - struct bnx2x_vf_plugin_stats *plugin_stats; -#endif -}; - -#define BNX2X_NR_VIRTFN(bp) (bp)->vfdb->sriov.nr_virtfn - -#define for_each_vf(bp, var) \ - for ((var) = 0; (var) < BNX2X_NR_VIRTFN(bp); (var)++) - -#define for_each_vf_rxq(vf, var) \ - for ((var) = 0; (var) < ((vf)->rxq_count); (var)++) - -#define for_each_vf_txq(vf, var) \ - for ((var) = 0; (var) < ((vf)->txq_count); (var)++) - -#define for_each_vf_sb(vf, var) \ - for ((var) = 0; (var) < ((vf)->sb_count); (var)++) - -#define is_vf_multi(vf) ((vf)->rxq_count > 1) - -#define HW_VF_HANDLE(bp, abs_vfid) \ - (u16)(BP_ABS_FUNC((bp)) | (1<<3) | ((u16)(abs_vfid) << 4)) - -#define FW_PF_MAX_HANDLE 8 - -#define FW_VF_HANDLE(abs_vfid) \ - (abs_vfid + FW_PF_MAX_HANDLE) - -#define ABS_VFID_FORM_FW_VF_HANDLE(funcid) \ - (funcid - FW_PF_MAX_HANDLE) - -#define IS_PF_FORM_FW_VF_HANDLE(funcid) \ - (funcid < FW_PF_MAX_HANDLE) - -#ifdef VFPF_MBX /* BNX2X_UPSTREAM */ - -/* - * VF mail box (aka vf-pf channel) - */ - -/* a container for the bi-directional vf<-->pf messages. - The actual response will be placed according to the offset parameter - provided in the request -*/ - -#define MBX_MSG_ALIGN 8 -#define MBX_MSG_ALIGNED_SIZE (roundup(sizeof(struct bnx2x_vf_mbx_msg), \ - MBX_MSG_ALIGN)) - -struct bnx2x_vf_mbx_msg { - union vf_pf_msg req; - union pf_vf_msg resp; -}; - -struct bnx2x_vf_mbx { - struct bnx2x_vf_mbx_msg *msg; - dma_addr_t msg_mapping; - - /* VF GPA address */ - __le32 vf_addr_lo; - __le32 vf_addr_hi; - - struct vf_pf_msg_hdr hdr; /* saved VF request header */ - - u8 flags; -#define VF_MSG_INPROCESS 0x1 /* failsafe - the FW should prevent - * more then one pending msg - */ -}; -#endif /* VFPF_MBX */ - -struct client_init_info { - struct client_init_ramrod_data *ramrod_data; - dma_addr_t ramrod_mapping; - size_t size; -}; - -struct bnx2x_vf_sp { - union { - struct eth_classify_rules_ramrod_data e2; - } mac_rdata; - - union { - struct eth_classify_rules_ramrod_data e2; - } vlan_rdata; - - union { - struct eth_filter_rules_ramrod_data e2; - } rx_mode_rdata; - - union { - struct eth_multicast_rules_ramrod_data e2; - } mcast_rdata; - - struct client_init_ramrod_data client_init; - struct client_update_ramrod_data client_update; -}; - -struct hw_dma { - void *addr; - dma_addr_t mapping; - size_t size; -}; - -struct bnx2x_vfdb { - -#define BP_VFDB(bp) ((bp)->vfdb) - /* vf array */ - struct bnx2x_virtf *vfs; -#define BP_VF(bp, idx) (&((bp)->vfdb->vfs[(idx)])) -#define bnx2x_vf(bp, idx, var) ((bp)->vfdb->vfs[(idx)].var) - - /* rxq array - for all vfs */ - struct bnx2x_vfq *rxqs; - - /* txq array - for all vfs */ - struct bnx2x_vfq *txqs; - - /* stats array - for all vfs */ - struct bnx2x_vfq_stats *vfq_stats; - - /* vf HW contexts */ - struct hw_dma context[BNX2X_VF_CIDS/ILT_PAGE_CIDS]; -#define BP_VF_CXT_PAGE(bp,i) (&(bp)->vfdb->context[(i)]) - - /* SR-IOV information */ - struct bnx2x_sriov sriov; - - - /* Tx switching MAC object*/ - struct bnx2x_vlan_mac_obj tx_mac_obj; -#define BP_TX_MAC_OBJ(bp) (&((bp)->vfdb->tx_mac_obj)) - -#ifdef VFPF_MBX /* BNX2X_UPSTREAM */ - struct hw_dma mbx_dma; -#define BP_VF_MBX_DMA(bp) (&((bp)->vfdb->mbx_dma)) - - struct bnx2x_vf_mbx mbxs[BNX2X_MAX_NUM_OF_VFS]; -#define BP_VF_MBX(bp, vfid) (&((bp)->vfdb->mbxs[(vfid)])) -#endif - struct hw_dma sp_dma; -#define BP_VF_SP(bp, vf, field) ((bp)->vfdb->sp_dma.addr + \ - (vf)->index * sizeof(struct bnx2x_vf_sp) + \ - offsetof(struct bnx2x_vf_sp, field)) - -#define BP_VF_SP_MAP(bp, vf, field) ((bp)->vfdb->sp_dma.mapping + \ - (vf)->index * sizeof(struct bnx2x_vf_sp) + \ - offsetof(struct bnx2x_vf_sp, field)) - - struct vf_pf_resc_request avail_resc; - -}; - -/* FW ids */ -static inline u8 __vf_igu_sb(struct bnx2x_virtf *vf, u16 sb_idx) -{ - return (vf->igu_base_id + sb_idx); -} -static inline u8 __vf_fw_sb(struct bnx2x_virtf *vf, u16 sb_idx) -{ - return __vf_igu_sb(vf, sb_idx); -} -static inline u8 __vf_hc_qzone(struct bnx2x_virtf *vf, u16 sb_idx) -{ - return __vf_igu_sb(vf, sb_idx); -} -static inline u8 vfq_igu_sb_id(struct bnx2x_virtf *vf, struct bnx2x_vfq *q) -{ - return (vf->igu_base_id + q->sb_idx); -} -static inline u8 vfq_fw_sb_id(struct bnx2x_virtf *vf, struct bnx2x_vfq *q) -{ - return vfq_igu_sb_id(vf, q); -} -static inline u8 vfq_cl_id(struct bnx2x_virtf *vf, struct bnx2x_vfq *q) -{ - return vfq_igu_sb_id(vf, q); -} -static inline u8 vfq_stat_id(struct bnx2x_virtf *vf, struct bnx2x_vfq *q) -{ - return vfq_cl_id(vf, q); -} - -static inline u8 vfq_qzone_id(struct bnx2x_virtf *vf, struct bnx2x_vfq *q) -{ - return vfq_igu_sb_id(vf, q); -} - - -/* forward */ -struct bnx2x; - -/* global iov routines */ -int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line); -int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param, int num_vfs_param); -void bnx2x_iov_remove_one(struct bnx2x *bp); -void bnx2x_iov_free_mem(struct bnx2x* bp); -int bnx2x_iov_alloc_mem(struct bnx2x* bp); -int bnx2x_iov_nic_init(struct bnx2x *bp); -int bnx2x_iov_chip_cleanup(struct bnx2x *bp); -void bnx2x_iov_init_dq(struct bnx2x *bp); -void bnx2x_iov_init_dmae(struct bnx2x *bp); -int bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, int command); -int bnx2x_iov_eq_sp_event(struct bnx2x* bp, union event_ring_elem *elem); -int bnx2x_iov_set_tx_mac(struct bnx2x *bp, u8 *mac, bool add); -u8 bnx2x_iov_get_max_queue_count(struct bnx2x * bp); -void bnx2x_iov_adjust_stats_req(struct bnx2x * bp); -void bnx2x_iov_storm_stats_update(struct bnx2x *bp); - -#ifdef VFPF_MBX -/* global vf mailbox routines */ -void bnx2x_vf_mbx(struct bnx2x *bp, struct vf_pf_event_data *vfpf_event); -void bnx2x_set_vf_mbxs_valid(struct bnx2x *bp); -#endif - - -/* - * CORE VF API - */ - -enum vf_api_rc { - VF_API_SUCCESS = 0, - VF_API_FAILURE, - VF_API_NO_RESOURCE, - VF_API_PENDING -}; - -typedef enum vf_api_rc vf_api_t; - -typedef u8 bnx2x_mac_addr_t[ETH_ALEN]; - -/* acquire */ -vf_api_t bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct vf_pf_resc_request* resc); - - -/* init */ -vf_api_t bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, - dma_addr_t *sb_map); - - -/* queue setup */ -vf_api_t bnx2x_vf_rxq_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq, - struct bnx2x_client_init_params *p, - u8 activate); - -vf_api_t bnx2x_vf_txq_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vfq *txq, - struct bnx2x_client_init_params *p); - -/* queue teardown */ -vf_api_t bnx2x_vfq_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq); - -/* trigger ~ activate/deactivate */ -vf_api_t bnx2x_vf_trigger_q(struct bnx2x *bp ,struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq, u8 activate); -vf_api_t bnx2x_vf_trigger(struct bnx2x *bp ,struct bnx2x_virtf *vf, u8 activate); - -/* close (shutdown) */ -vf_api_t bnx2x_vf_close(struct bnx2x *bp ,struct bnx2x_virtf *vf); - -/* - * release ~ close + release-resources - * - * release is the ultimate SW shutdown and is called whenever an irrecoverable - * is encountered. - */ -void bnx2x_vf_release(struct bnx2x *bp ,struct bnx2x_virtf *vf); - - -/* set MAC + VLAN */ -bool bnx2x_vf_check_vlan_op(struct bnx2x *bp, struct bnx2x_vfq *rxq, - u16 vtag, bool chk_add); - -vf_api_t bnx2x_vf_set_mac(struct bnx2x *bp, struct bnx2x_vfq *rxq, - u8 *mac, bool add, unsigned long ramrod_flags); - -vf_api_t bnx2x_vf_set_vlan(struct bnx2x *bp, struct bnx2x_vfq *rxq, - u16 vtag, bool add, unsigned long ramrod_flags); - -vf_api_t bnx2x_vf_set_mcasts(struct bnx2x *bp, struct bnx2x_virtf *vf, - bnx2x_mac_addr_t *mcasts, int mcast_num, - bool drv_only); - -vf_api_t bnx2x_vf_set_rxq_mode(struct bnx2x* bp,struct bnx2x_virtf *vf, - struct bnx2x_vfq *rxq, - unsigned long accept_flags); - -vf_api_t bnx2x_vf_clear_vlans(struct bnx2x *bp, struct bnx2x_vfq *rxq, - bool skip, u16 vlan_to_skip, - unsigned long ramrod_flags); - - -/* statistics */ - -/* - * helper routines - */ -u8 bnx2x_vfid_valid(struct bnx2x* bp, int vfid); - -void bnx2x_vf_get_sbdf(struct bnx2x *bp, struct bnx2x_virtf *vf, u32* sbdf); - -void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf, - struct bnx2x_vf_bar_info *bar_info); - - -void storm_memset_rcq_np(struct bnx2x *bp, dma_addr_t np_map, u8 cl_id); -int bnx2x_vf_queue_update_ramrod(struct bnx2x *bp, struct bnx2x_vfq *rxq, - dma_addr_t data_mapping, u8 block); - - -/* - * FLR routines: - */ - -/* - * bnx2x_pf_flr_clnup - * a. re-enable target read on the PF - * b. poll cfc per function usgae counter - * c. poll the qm perfunction usage counter - * d. poll the tm per function usage counter - * e. poll the tm per function scan-done indication - * f. clear the dmae channel associated wit hthe PF - * g. zero the igu 'trailing edge' and 'leading edge' regs (attentions) - * h. call the common flr cleanup code with -1 (pf indication) - * - */ -int bnx2x_pf_flr_clnup(struct bnx2x *bp); - -/* - * bnx2x_vf_flr_clnup - * a. erase the vf queue ids (client ids) form the pxp protection table - * b. wait for outstanding vf ramrods to complete - * c. send terminate ramrod for each vf queue - * d. call the common flr cleanup code with the vfid - */ -int bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *vf); - -/* - * bnx2x_flr_clnup - clenaup code share by vf and pf flr - * fn >= 0 -> called during vf flr cleanup and fn is vfid - * - * a. poll DQ function usage counter - * b. Invoke FW cleanup - * c. ATC function cleanup - * d. PBF function cleanup - */ -int bnx2x_flr_clnup(struct bnx2x *bp, int fn); - - -/* - * bnx2x_flr_clnup_epilog (temporary name) - - * - * bnx2x_flr_clnup_epilog (temporary name) - For vfs it must be called - * after bnx2x_flr_clnup and before any vf initializations take place. - * in the case VMware NPA the pf does all the initialization on behalf - * of the vf, so the routine is called during vf_init. - * - * a. For vfs only - wait for all PF ramrods that access any vf DBs to - * complete. A prominent example is the statistics ramrod. - * (simplification - lock-out PF ramrods and wait for all outstanding - * PF ramrod to complete). - * b. wait 100 ms for VF remnants in the HW to dissipate. - * c. Verify that the pending-transaction bit in device-status register - * (capability structure) is cleared - */ -int bnx2x_flr_clnup_epilog(struct bnx2x *bp, struct bnx2x_virtf *vf); - - - -/* - * Handles an FLR (or VF_DISABLE) notification form the MCP - */ -void bnx2x_vf_handle_flr_event(struct bnx2x* bp); - -/* debug */ -void bnx2x_vf_handle_flr_self_notification(struct bnx2x* bp, u8 abs_vfid); - - -#endif /* bnx2x_vf.h*/ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vfpf_if.h b/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vfpf_if.h deleted file mode 100644 index 92009b1..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/bnx2x_vfpf_if.h +++ /dev/null @@ -1,562 +0,0 @@ -/* bnx2x_vfpf_if.h: Broadcom Everest network driver. - * - * Copyright (c) 2010-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Maintained by: Eilon Greenstein - * - */ -#ifndef VF_PF_IF_H -#define VF_PF_IF_H - -/*********************************************** - * - * Common definitions for all HVs - * - **/ -struct vf_pf_resc_request { - u8 num_rxqs; - u8 num_txqs; - u8 num_sbs; - u8 num_mac_filters; - u8 num_vlan_filters; - u8 num_mc_filters; /* No limit so superfluous */ -}; - -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_begin.h" -#endif -struct hw_sb_info { - u8 hw_sb_id; /* aka absolute igu id, used to ack the sb */ - u8 sb_qid; /* used to update DHC for sb */ -}; -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_end.h" -#endif - - - -#if defined(BNX2X_PASSTHRU) -/*********************************************** - * - * ESX 5.0 (MN) PassThrough (NPA) - * - * Common definitions shared betweem the HV and - * the plugin - * - **/ - -#define BNX2X_PLUGIN_MAX_RX_QUEUES 8 -#define BNX2X_PLUGIN_MAX_TX_QUEUES 8 - -#define PLUGIN_MAX_SB BNX2X_PLUGIN_MAX_RX_QUEUES -#define PLUGIN_MAX_QUEUES BNX2X_PLUGIN_MAX_RX_QUEUES - -#define PLUGIN_MAX_SGES 8 -#define SHELL_SMALL_RECV_BUFFER_SIZE 2048 -#define SHELL_LARGE_RECV_BUFFER_SIZE 4096 - -/* FW Pages (always 4K) */ -#define PLUGIN_RING_UNIT_SHIFT 12 -#define PLUGIN_RING_UNIT_SIZE (1 << PLUGIN_RING_UNIT_SHIFT) - -/* TX queues */ -#define TX_DESC_PAGE (PLUGIN_RING_UNIT_SIZE / sizeof(union eth_tx_bd_types)) -#define TX_DESC_NUM_PAGES(x) DIV_ROUND_UP((x), TX_DESC_PAGE) -#define TX_DESC_SIZE(x) (TX_DESC_NUM_PAGES((x)) * PLUGIN_RING_UNIT_SIZE) - - -/* RX queues */ -/* - * SGE - * Note: RX_SGE_NUM_PAGES should be rounded up to next power of 2. - * In acuality it does not exceed 2 pages so a round up to the next multiple is good enough. - */ -#define RX_SGE_PAGE (PLUGIN_RING_UNIT_SIZE / sizeof(struct eth_rx_sge)) -#define RX_SGE_COUNT 128 -#define RX_SGE_NUM_PAGES DIV_ROUND_UP(RX_SGE_COUNT, RX_DESC_PAGE) -#define RX_SGE_SIZE (RX_SGE_NUM_PAGES * PLUGIN_RING_UNIT_SIZE) - -/* BDs */ -#define RX_DESC_PAGE (PLUGIN_RING_UNIT_SIZE / sizeof(struct eth_rx_bd)) -#define RX_DESC_COUNT(x) ((x) - RX_SGE_COUNT) -#define RX_DESC_NUM_PAGES(x) DIV_ROUND_UP(RX_DESC_COUNT((x)), RX_DESC_PAGE) -#define RX_DESC_SIZE(x) (RX_DESC_NUM_PAGES((x)) * PLUGIN_RING_UNIT_SIZE) - -/* RCQ */ -#define RX_RCQ_PAGE (PLUGIN_RING_UNIT_SIZE / sizeof(union eth_rx_cqe)) -#define RX_RCQ_COUNT(x) (x) -#define RX_RCQ_NUM_PAGES(x) DIV_ROUND_UP(RX_RCQ_COUNT((x)), RX_RCQ_PAGE) -#define RX_RCQ_SIZE(x) (RX_RCQ_NUM_PAGES((x)) * PLUGIN_RING_UNIT_SIZE) - - -/* offsets */ -#define TX_DESC_OFFSET(addr,x) (addr) -#define SB_OFFSET(addr,x) (TX_DESC_OFFSET((addr),(x))+TX_DESC_SIZE((x))) -#define RX_UID_OFFSET(addr,x) (SB_OFFSET((addr),(x))+ sizeof(struct host_hc_status_block_e2)) -#define RX_DESC_OFFSET(addr,x) (addr) -#define RX_RCQ_OFFSET(addr,x) (RX_DESC_OFFSET((addr),(x))+ RX_DESC_SIZE((x))) -#define RX_SGE_OFFSET(addr,x) (RX_RCQ_OFFSET((addr),(x))+ RX_RCQ_SIZE((x))) - - -/* SB protocol indices - share with bnx2x.h TODO */ -#define PLUGIN_SB_ETH_TX_CQ_INDEX 5 -#define PLUGIN_SB_ETH_RX_CQ_INDEX 1 -#define PLUGIN_RX_ALIGN_SHIFT ((L1_CACHE_SHIFT < 8) ? L1_CACHE_SHIFT : 8) -#define PLUGIN_RX_ALIGN (1 << PLUGIN_RX_ALIGN_SHIFT) - - - -struct bnx2xpi_ring_params { - u64 base; - u32 nr_desc; - u32 byte_len; -}; - -struct bnx2xpi_txrx_params { - struct bnx2xpi_ring_params rx; - struct bnx2xpi_ring_params tx; -}; - -static inline u64 bnx2xpi_tx_decr_offset(struct bnx2xpi_txrx_params *p) -{ - return (TX_DESC_OFFSET(p->tx.base, p->tx.nr_desc)); -} - -static inline u64 bnx2xpi_rx_decr_offset(struct bnx2xpi_txrx_params *p) -{ - return (RX_DESC_OFFSET(p->rx.base, p->rx.nr_desc)); -} - -static inline u64 bnx2xpi_rcq_offset(struct bnx2xpi_txrx_params *p) -{ - return (RX_RCQ_OFFSET(p->rx.base, p->rx.nr_desc)); -} - -static inline u64 bnx2xpi_rcq_np_offset(struct bnx2xpi_txrx_params *p) -{ - u8 np = RX_RCQ_NUM_PAGES(p->rx.nr_desc) == 1 ? 0 : 1; - return (bnx2xpi_rcq_offset(p) + np * PLUGIN_RING_UNIT_SIZE); -} - -static inline u64 bnx2xpi_sge_offset(struct bnx2xpi_txrx_params *p) -{ - return (RX_SGE_OFFSET(p->rx.base, p->rx.nr_desc)); -} - -/* plugin statistics on shared memory */ - -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_begin.h" -#endif -struct bnx2x_plugin_rxq_stats { - u64 lro_bytes; - u64 lro_pkts; - u32 rx_err_discard_pkt; - u32 hw_csum_err; -}; -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_end.h" -#endif - -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_begin.h" -#endif -struct bnx2x_plugin_txq_stats { - u64 tso_bytes; - u64 tso_pkts; -}; -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_end.h" -#endif - -/* VF statistics on shared memory */ -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_begin.h" -#endif -struct bnx2x_vf_plugin_stats { - struct bnx2x_plugin_rxq_stats rxq_stats[BNX2X_PLUGIN_MAX_RX_QUEUES]; - struct bnx2x_plugin_txq_stats txq_stats[BNX2X_PLUGIN_MAX_TX_QUEUES]; -}; -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_end.h" -#endif - -/* device information that is passed form the PF driver */ -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_begin.h" -#endif -struct bnx2x_plugin_device_info { - struct hw_sb_info sb_info[PLUGIN_MAX_SB]; - u8 hw_qid[PLUGIN_MAX_QUEUES]; - u32 chip_id; - u8 pci_func; - u8 fp_flags; -#define BNX2X_PLUGIN_DISABLE_TPA 0x1 -#define BNX2X_PLUGIN_SHARED_SB_IDX 0x2 - u16 pad; /* pad to qword*/ -}; -#ifdef BNX2X_PT_PLUGIN -#include "vmware_pack_end.h" -#endif - -#endif /* BNX2X_PASSTHRU */ - - -#if !defined(__VMKLNX__) /* BNX2X_UPSTREAM */ -/*********************************************** - * - * HW VF-PF channel definitions - * - * A.K.A VF-PF mailbox - * - **/ -#define VFPF_QUEUE_FLG_TPA 0x0001 -#define VFPF_QUEUE_FLG_CACHE_ALIGN 0x0002 -#define VFPF_QUEUE_FLG_STATS 0x0004 -#define VFPF_QUEUE_FLG_OV 0x0008 -#define VFPF_QUEUE_FLG_VLAN 0x0010 -#define VFPF_QUEUE_FLG_COS 0x0020 -#define VFPF_QUEUE_FLG_HC 0x0040 -#define VFPF_QUEUE_FLG_DHC 0x0080 - -#define VFPF_QUEUE_DROP_IP_CS_ERR (1 << 0) -#define VFPF_QUEUE_DROP_TCP_CS_ERR (1 << 1) -#define VFPF_QUEUE_DROP_TTL0 (1 << 2) -#define VFPF_QUEUE_DROP_UDP_CS_ERR (1 << 3) - -#define VFPF_RX_MASK_ACCEPT_NONE 0x00000000 -#define VFPF_RX_MASK_ACCEPT_MATCHED_UNICAST 0x00000001 -#define VFPF_RX_MASK_ACCEPT_MATCHED_MULTICAST 0x00000002 -#define VFPF_RX_MASK_ACCEPT_ALL_UNICAST 0x00000004 -#define VFPF_RX_MASK_ACCEPT_ALL_MULTICAST 0x00000008 -#define VFPF_RX_MASK_ACCEPT_BROADCAST 0x00000010 -/* TODO: #define VFPF_RX_MASK_ACCEPT_ANY_VLAN 0x00000020 */ - -enum { - PFVF_STATUS_WAITING = 0, - PFVF_STATUS_SUCCESS, - PFVF_STATUS_FAILURE, - PFVF_STATUS_NOT_SUPPORTED, - PFVF_STATUS_VERSION_MISMATCH, - PFVF_STATUS_NO_RESOURCE -}; - - -/* Headers */ -struct vf_pf_msg_hdr { - u16 opcode; - -#define PFVF_IF_VERSION 1 - u8 if_ver; - u8 opcode_ver; - u32 resp_msg_offset; -}; - -struct pf_vf_msg_hdr { - u8 status; - u8 opcode_ver; - u16 opcode; -}; - -/* simple response */ -struct pf_vf_msg_resp { - struct pf_vf_msg_hdr hdr; -}; - - -/* Acquire */ -struct vf_pf_msg_acquire { - struct vf_pf_msg_hdr hdr; - - struct vf_pf_vfdev_info { - /* the following fields are for debug purposes */ - u8 vf_id; /* ME register value */ - u8 vf_os; /* e.g. Linux, W2K8 */ - u32 vf_driver_version; /* e.g. 6.0.12 */ - } vfdev_info; - - struct vf_pf_resc_request resc_request; -}; - - -/* simple operation request on queue */ -struct vf_pf_msg_q_op { - struct vf_pf_msg_hdr hdr; - u8 vf_qid; - u8 padding[3]; -}; - -struct pf_vf_msg_acquire_resp { - struct pf_vf_msg_hdr hdr; - - struct pf_vf_pfdev_info - { - u32 chip_num; - - u32 pf_cap; - #define PFVF_CAP_RSS 0x00000001 - #define PFVF_CAP_DHC 0x00000002 - #define PFVF_CAP_TPA 0x00000004 - - u16 db_size; - u8 indices_per_sb; - u8 padding; - } pfdev_info; - - struct pf_vf_resc - { - /* - * in case of status NO_RESOURCE in message hdr, pf will fill - * this struct with suggested amount of resources for next - * acquire request - */ - - #define PFVF_MAX_QUEUES_PER_VF 4 - #define PFVF_MAX_SBS_PER_VF 4 - struct hw_sb_info hw_sbs[PFVF_MAX_SBS_PER_VF]; - u8 hw_qid[PFVF_MAX_QUEUES_PER_VF]; - u8 num_rxqs; - u8 num_txqs; - u8 num_sbs; - u8 num_mac_filters; - u8 num_vlan_filters; - u8 num_mc_filters; - u8 padding[2]; - /* TODO: stats resc? cid for the ramrod? stats_id? spq prod id? */ - } resc; -}; - -/* Init VF */ -struct vf_pf_msg_init_vf { - struct vf_pf_msg_hdr hdr; - - u64 sb_addr[PFVF_MAX_SBS_PER_VF]; /* vf_sb based */ - u64 spq_addr; - u64 stats_addr; -}; - -/* Setup Queue */ -struct vf_pf_msg_setup_q { - struct vf_pf_msg_hdr hdr; - u8 vf_qid; /* index in hw_qid[] */ - - u8 param_valid; - #define VFPF_RXQ_VALID 0x01 - #define VFPF_TXQ_VALID 0x02 - - u16 padding; - - struct vf_pf_rxq_params { - /* physical addresses */ - u64 rcq_addr; - u64 rcq_np_addr; - u64 rxq_addr; - u64 sge_addr; - - /* sb + hc info */ - u8 vf_sb; /* index in hw_sbs[] */ - u8 sb_index; /* Index in the SB */ - u16 hc_rate; /* desired interrupts per sec. */ - /* valid iff VFPF_QUEUE_FLG_HC */ - /* rx buffer info */ - u16 mtu; - u16 buf_sz; - u16 flags; /* VFPF_QUEUE_FLG_X flags */ - u16 stat_id; /* valid iff VFPF_QUEUE_FLG_STATS */ - - /* valid iff VFPF_QUEUE_FLG_TPA */ - u16 sge_buf_sz; - u16 tpa_agg_sz; - u8 max_sge_pkt; - - u8 drop_flags; /* VFPF_QUEUE_DROP_X, for Linux all should - * be turned off, see setup_rx_queue() - * for reference - */ - - u8 cache_line_log; /* VFPF_QUEUE_FLG_CACHE_ALIGN - * see init_rx_queue() - */ - u8 padding; - } rxq; - - struct vf_pf_txq_params { - /* physical addresses */ - u64 txq_addr; - - /* sb + hc info */ - u8 vf_sb; /* index in hw_sbs[] */ - u8 sb_index; /* Index in the SB */ - u16 hc_rate; /* desired interrupts per sec. */ - /* valid iff VFPF_QUEUE_FLG_HC */ - u32 flags; /* VFPF_QUEUE_FLG_X flags */ - u16 stat_id; /* valid iff VFPF_QUEUE_FLG_STATS */ - u8 traffic_type; /* see in setup_context() */ - u8 padding; - } txq; -}; - - -/* Set Queue Filters */ -struct vf_pf_q_mac_vlan_filter { - u32 flags; - #define VFPF_Q_FILTER_DEST_MAC_PRESENT 0x01 - #define VFPF_Q_FILTER_VLAN_TAG_PRESENT 0x02 - - u8 dest_mac[6]; - u16 vlan_tag; -}; - -struct vf_pf_msg_set_q_filters { - struct vf_pf_msg_hdr hdr; - - u32 flags; - #define VFPF_SET_Q_FILTERS_MAC_VLAN_CHANGED 0x01 - #define VFPF_SET_Q_FILTERS_MULTICAST_CHANGED 0x02 - #define VFPF_SET_Q_FILTERS_RX_MASK_CHANGED 0x04 - - u8 vf_qid; /* index in hw_qid[] */ - u8 n_mac_vlan_filters; - u8 n_multicast; - u8 padding; - - #define PFVF_MAX_MAC_FILTERS 16 - #define PFVF_MAX_VLAN_FILTERS 16 - #define PFVF_MAX_FILTERS PFVF_MAX_MAC_FILTERS +\ - PFVF_MAX_VLAN_FILTERS - struct vf_pf_q_mac_vlan_filter filters[PFVF_MAX_FILTERS]; - - #define PFVF_MAX_MULTICAST_PER_VF 32 - u8 multicast[PFVF_MAX_MULTICAST_PER_VF][6]; - - u32 rx_mask; /* see mask constants at the top of the file */ -}; - - -/* close VF (disable VF) */ -struct vf_pf_msg_close_vf { - struct vf_pf_msg_hdr hdr; - u16 vf_id; /* for debug */ - u16 padding; -}; - -/* rlease the VF's acquired resources */ -struct vf_pf_msg_release_vf { - struct vf_pf_msg_hdr hdr; - u16 vf_id; /* for debug */ - u16 padding; -}; - - -union vf_pf_msg { - struct vf_pf_msg_hdr hdr; - struct vf_pf_msg_acquire acquire; - struct vf_pf_msg_init_vf init_vf; - struct vf_pf_msg_close_vf close_vf; - struct vf_pf_msg_q_op q_op; - struct vf_pf_msg_setup_q setup_q; - struct vf_pf_msg_set_q_filters set_q_filters; - struct vf_pf_msg_release_vf release_vf; -}; - -union pf_vf_msg { - struct pf_vf_msg_resp resp; - struct pf_vf_msg_acquire_resp acquire_resp; -}; - -typedef struct { - u32 req_sz; - u32 resp_sz; -} msg_sz_t; - -#define PFVF_OP_VER_MAX(op_arry) (sizeof(op_arry)/sizeof(*op_arry) - 1) - -static const msg_sz_t acquire_req_sz[] = { - /* sizeof(vf_pf_msg_acquire) - offsetof(struct vf_pf_msg_acquire, fieldX), */ - {sizeof(struct vf_pf_msg_acquire), - sizeof(struct pf_vf_msg_acquire_resp)} -}; -#define PFVF_ACQUIRE_VER PFVF_OP_VER_MAX(acquire_req_sz) - -static const msg_sz_t init_vf_req_sz[] = { - {sizeof(struct vf_pf_msg_init_vf), sizeof(struct pf_vf_msg_resp)} -}; -#define PFVF_INIT_VF_VER PFVF_OP_VER_MAX(init_vf_req_sz) - -static const msg_sz_t setup_q_req_sz[] = { - {sizeof(struct vf_pf_msg_setup_q), sizeof(struct pf_vf_msg_resp)} -}; -#define PFVF_SETUP_Q_VER PFVF_OP_VER_MAX(setup_q_req_sz) - -static const msg_sz_t set_q_filters_req_sz[] = { - {sizeof(struct vf_pf_msg_set_q_filters), sizeof(struct pf_vf_msg_resp)} -}; -#define PFVF_SET_Q_FILTERS_VER PFVF_OP_VER_MAX(set_q_filters_req_sz) - -static const msg_sz_t activate_q_req_sz[] = { - {sizeof(struct vf_pf_msg_q_op), sizeof(struct pf_vf_msg_resp)} -}; -#define PFVF_ACTIVATE_Q_VER PFVF_OP_VER_MAX(activate_q_req_sz) - -static const msg_sz_t deactivate_q_req_sz[] = { - {sizeof(struct vf_pf_msg_q_op), sizeof(struct pf_vf_msg_resp)} -}; -#define PFVF_DEACTIVATE_Q_VER PFVF_OP_VER_MAX(deactivate_q_req_sz) - -static const msg_sz_t teardown_q_req_sz[] = { - {sizeof(struct vf_pf_msg_q_op), sizeof(struct pf_vf_msg_resp)} -}; -#define PFVF_TEARDOWN_Q_VER PFVF_OP_VER_MAX(teardown_q_req_sz) - -static const msg_sz_t close_vf_req_sz[] = { - {sizeof(struct vf_pf_msg_close_vf), sizeof(struct pf_vf_msg_resp)} -}; -#define PFVF_CLOSE_VF_VER PFVF_OP_VER_MAX(close_vf_req_sz) - -static const msg_sz_t release_vf_req_sz[] = { - {sizeof(struct vf_pf_msg_release_vf), sizeof(struct pf_vf_msg_resp)} -}; -#define PFVF_RELEASE_VF_VER PFVF_OP_VER_MAX(release_vf_req_sz) - -enum { - PFVF_OP_ACQUIRE = 0, - PFVF_OP_INIT_VF, - PFVF_OP_SETUP_Q, - PFVF_OP_SET_Q_FILTERS, - PFVF_OP_ACTIVATE_Q, - PFVF_OP_DEACTIVATE_Q, - PFVF_OP_TEARDOWN_Q, - PFVF_OP_CLOSE_VF, - PFVF_OP_RELEASE_VF, - PFVF_OP_MAX -}; - - -/** To get size of message of the type X(request or response) - * for the op_code Y of the version Z one should use - * - * op_code_req_sz[Y][Z].req_sz/resp_sz - ******************************************************************/ -/* const msg_sz_t* op_codes_req_sz[] = { - (const msg_sz_t*)acquire_req_sz, - (const msg_sz_t*)init_vf_req_sz, - (const msg_sz_t*)setup_q_req_sz, - (const msg_sz_t*)set_q_filters_req_sz, - (const msg_sz_t*)activate_q_req_sz, - (const msg_sz_t*)deactivate_q_req_sz, - (const msg_sz_t*)teardown_q_req_sz, - (const msg_sz_t*)close_vf_req_sz, - (const msg_sz_t*)release_vf_req_sz -}; */ -#endif /* ! __VMKLNX__ */ -#endif /* VF_PF_IF_H */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/cnic_if.h b/vmkdrivers/src_9/drivers/net/bnx2x/cnic_if.h index 736557e..12ec5e6 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/cnic_if.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/cnic_if.h @@ -1,6 +1,6 @@ /* cnic_if.h: Broadcom CNIC core network driver. * - * Copyright (c) 2006 - 2010 Broadcom Corporation + * Copyright (c) 2006 - 2013 Broadcom Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -12,22 +12,35 @@ #ifndef CNIC_IF_H #define CNIC_IF_H -#define CNIC_MODULE_VERSION "1.10.2j.v50.7-3vmw" -#define CNIC_MODULE_RELDATE "Dec 14, 2011" +#include "bnx2x_mfw_req.h" #define CNIC_ULP_RDMA 0 #define CNIC_ULP_ISCSI 1 -#define CNIC_ULP_L4 2 -#define MAX_CNIC_ULP_TYPE_EXT 2 -#define MAX_CNIC_ULP_TYPE 3 +#define CNIC_ULP_FCOE 2 +#define CNIC_ULP_L4 3 +#define MAX_CNIC_ULP_TYPE_EXT 3 +#define MAX_CNIC_ULP_TYPE 4 + +#ifndef VLAN_TAG_PRESENT +#define VLAN_TAG_PRESENT 0x1000 +#endif struct kwqe { u32 kwqe_op_flag; +#define KWQE_QID_SHIFT 8 #define KWQE_OPCODE_MASK 0x00ff0000 #define KWQE_OPCODE_SHIFT 16 #define KWQE_FLAGS_LAYER_SHIFT 28 #define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT) +#define KWQE_LAYER_MASK 0x70000000 +#define KWQE_LAYER_SHIFT 28 +#define KWQE_FLAGS_LAYER_MASK_L2 (2<<28) +#define KWQE_FLAGS_LAYER_MASK_L3 (3<<28) +#define KWQE_FLAGS_LAYER_MASK_L4 (4<<28) +#define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28) +#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28) +#define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28) u32 kwqe_info0; u32 kwqe_info1; @@ -62,6 +75,7 @@ struct kcqe { #define KCQE_FLAGS_LAYER_MASK_L4 (4<<28) #define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28) #define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28) + #define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28) #define KCQE_FLAGS_NEXT (1<<31) #define KCQE_FLAGS_OPCODE_MASK (0xff<<16) #define KCQE_FLAGS_OPCODE_SHIFT (16) @@ -72,9 +86,12 @@ struct kcqe { #define MAX_CNIC_CTL_DATA 64 #define MAX_DRV_CTL_DATA 64 -#define CNIC_CTL_STOP_CMD 1 -#define CNIC_CTL_START_CMD 2 -#define CNIC_CTL_COMPLETION_CMD 3 +#define CNIC_CTL_STOP_CMD 1 +#define CNIC_CTL_START_CMD 2 +#define CNIC_CTL_COMPLETION_CMD 3 +#define CNIC_CTL_STOP_ISCSI_CMD 4 +#define CNIC_CTL_FCOE_STATS_GET_CMD 5 +#define CNIC_CTL_ISCSI_STATS_GET_CMD 6 #define DRV_CTL_IO_WR_CMD 0x101 #define DRV_CTL_IO_RD_CMD 0x102 @@ -88,7 +105,13 @@ struct kcqe { #define DRV_CTL_COMP_OOO_TX_PKTS 0x10a #define DRV_CTL_REUSE_OOO_PKT 0x10b #define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c - +#define DRV_CTL_ISCSI_STOPPED_CMD 0x10d +#define DRV_CTL_ULP_REGISTER_CMD 0x10e +#define DRV_CTL_ULP_UNREGISTER_CMD 0x10f +#if defined(__VMKLNX__) +#define DRV_CTL_START_NPAR_CMD 0x110 +#define DRV_CTL_STOP_NPAR_CMD 0x111 +#endif struct cnic_ctl_completion { u32 cid; @@ -126,11 +149,12 @@ enum { }; enum { - OOO_OPCODE_ADD_RIGHT, - OOO_OPCODE_ADD_LEFT, - OOO_OPCODE_JOIN, + OOO_OPCODE_ADD_PEN, OOO_OPCODE_ADD_NEW, - OOO_OPCODE_ADD_PENN + OOO_OPCODE_ADD_RIGHT, + OOO_OPCODE_ADD_LEFT, + OOO_OPCODE_JOIN, + OOO_OPCODE_NOP }; struct cnic_ooo_cqe { @@ -163,15 +187,22 @@ struct drv_ctl_ooo_pkt { struct sk_buff *skb; }; +struct drv_ctl_register_data { + int ulp_type; + struct fcoe_capabilities fcoe_features; +}; + struct drv_ctl_info { int cmd; union { struct drv_ctl_spq_credit credit; struct drv_ctl_io io; struct drv_ctl_l2_ring ring; + int ulp_type; + char bytes[MAX_DRV_CTL_DATA]; struct drv_ctl_ooo_cqe ooo_cqe; struct drv_ctl_ooo_pkt pkt_desc; - char bytes[MAX_DRV_CTL_DATA]; + struct drv_ctl_register_data register_data; } data; }; @@ -198,13 +229,15 @@ struct cnic_irq { struct cnic_eth_dev { u32 version; - #define CNIC_ETH_DEV_VER 0x12340001 /* Change this when the structure changes */ + #define CNIC_ETH_DEV_VER 0x07200101 /* Change this when the structure changes */ struct module *drv_owner; u32 drv_state; #define CNIC_DRV_STATE_REGD 0x00000001 #define CNIC_DRV_STATE_USING_MSIX 0x00000002 #define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004 +#define CNIC_DRV_STATE_NO_ISCSI 0x00000008 +#define CNIC_DRV_STATE_NO_FCOE 0x00000010 u32 chip_id; u32 max_kwqe_pending; struct pci_dev *pdev; @@ -214,7 +247,6 @@ struct cnic_eth_dev { void __iomem *io_base2; #endif #endif - u32 ctx_tbl_offset; u32 ctx_tbl_len; int ctx_blk_size; @@ -222,9 +254,16 @@ struct cnic_eth_dev { u32 max_iscsi_conn; u32 max_fcoe_conn; u32 max_rdma_conn; + u32 fcoe_init_cid; + u32 fcoe_wwn_port_name_hi; + u32 fcoe_wwn_port_name_lo; + u32 fcoe_wwn_node_name_hi; + u32 fcoe_wwn_node_name_lo; + u16 iscsi_l2_client_id; u16 iscsi_l2_cid; + u8 iscsi_mac[ETH_ALEN]; int num_irq; struct cnic_irq irq_arr[MAX_CNIC_VEC]; @@ -237,6 +276,14 @@ struct cnic_eth_dev { struct kwqe_16 *[], u32); int (*drv_ctl)(struct net_device *, struct drv_ctl_info *); unsigned long reserved1[2]; + +#if defined(__VMKLNX__) + u32 mf_mode; +#if (VMWARE_ESX_DDK_VERSION >= 50000) + struct vlan_group **cna_vlgrp; +#endif +#endif + union drv_info_to_mcp *addr_drv_info_to_mcp; }; struct cnic_sockaddr { @@ -296,6 +343,7 @@ struct cnic_sock { #define SK_F_IPV6 5 #define SK_F_NDISC_WAITING 6 #define SK_F_CLOSING 7 +#define SK_F_HW_ERR 8 atomic_t ref_count; u32 state; @@ -305,10 +353,13 @@ struct cnic_sock { }; struct cnic_dev { + struct list_head list; + u32 version; +#define CNIC_DEV_VER 0x07200002 /* Change this when the structure changes */ + struct net_device *netdev; struct pci_dev *pcidev; void __iomem *regview; - struct list_head list; int (*register_device)(struct cnic_dev *dev, int ulp_type, void *ulp_ctx); @@ -336,6 +387,7 @@ struct cnic_dev { #define CNIC_F_IF_GOING_DOWN 2 #define CNIC_F_BNX2_CLASS 3 #define CNIC_F_BNX2X_CLASS 4 +#define CNIC_F_ISCSI_OOO_ENABLE 8 atomic_t ref_count; int use_count; u8 mac_addr[6]; @@ -344,7 +396,18 @@ struct cnic_dev { int max_fcoe_conn; int max_rdma_conn; + union drv_info_to_mcp *stats_addr; + struct fcoe_capabilities *fcoe_cap; + void *cnic_priv; + unsigned int ooo_tx_count; + + struct vlan_group **cna_vlgrp; + u64 fcoe_wwnn; + u64 fcoe_wwpn; +#if defined (__VMKLNX__) + u32 pmtu_fails; +#endif /* defined (__VMKLNX__) */ }; #define CNIC_WR(dev, off, val) writel(val, dev->regview + off) @@ -354,6 +417,9 @@ struct cnic_dev { #define CNIC_RD16(dev, off) readw(dev->regview + off) struct cnic_ulp_ops { + u32 version; + #define CNIC_ULP_OPS_VER 0x07000101 /* Change this when the structure changes */ + /* Calls to these functions are protected by RCU. When * unregistering, we wait for any calls to complete before * continuing. @@ -372,6 +438,7 @@ struct cnic_ulp_ops { void (*cm_abort_complete)(struct cnic_sock *); void (*cm_remote_close)(struct cnic_sock *); void (*cm_remote_abort)(struct cnic_sock *); + int (*cnic_get_stats)(void *ulp_ctx); struct module *owner; atomic_t ref_count; }; @@ -380,7 +447,15 @@ extern int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops); extern int cnic_unregister_driver(int ulp_type); +#if defined(BNX2_INBOX) extern struct cnic_eth_dev *bnx2_cnic_probe(struct net_device *dev); -extern struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev); - +#else +extern struct cnic_eth_dev *bnx2_cnic_probe2(struct net_device *dev); +#endif + +#if defined(BNX2X_INBOX) +extern struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev); +#else +extern struct cnic_eth_dev *bnx2x_cnic_probe2(struct net_device *dev); +#endif #endif diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/cnic_register.h b/vmkdrivers/src_9/drivers/net/bnx2x/cnic_register.h index de72250..28bedc0 100644 --- a/vmkdrivers/src_9/drivers/net/bnx2x/cnic_register.h +++ b/vmkdrivers/src_9/drivers/net/bnx2x/cnic_register.h @@ -1,8 +1,8 @@ /* cnic_register.h: Broadcom CNIC Registration Agent * - * Copyright (c) 2010 Broadcom Corporation + * Copyright (c) 2010-2013 Broadcom Corporation * - * Portions Copyright (c) VMware, Inc. 2010, All Rights Reserved. + * Portions Copyright (c) VMware, Inc. 2010-2013, All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -15,9 +15,8 @@ #ifndef CNIC_REGISTER_H #define CNIC_REGISTER_H -#define CNIC_REGISTER_MODULE_VERSION "1.1" -#define CNIC_REGISTER_MODULE_RELDATE "Aug 31, 2010" - +#define CNIC_REGISTER_MODULE_VERSION "1.72.2.v55.1" +#define CNIC_REGISTER_MODULE_RELDATE "February 06, 2013" extern int cnic_register_adapter(const char * name, void *callback); extern void *cnic_register_get_callback(const char * name); extern void cnic_register_cancel(const char * name); diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/hw_dump.h b/vmkdrivers/src_9/drivers/net/bnx2x/hw_dump.h new file mode 100644 index 0000000..52be8b7 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/bnx2x/hw_dump.h @@ -0,0 +1,8200 @@ +#ifndef __HW_DUMP_H +#define __HW_DUMP_H + + +/* e_dump.h: Broadcom Everest network driver. +* +*Copyright (c) 2011-2012 Broadcom Corporation +*/ + + + +#ifndef ARRSIZE /* ! ECORE_UPSTREAM */ +/* + * ARRSIZE: + * used to calcualte item count of an array + * this macro is used to prevent compile warning for unreferenced parametes +*/ +#define ARRSIZE(a) (sizeof(a)/sizeof((a)[0])) +#endif /* ARRSIZE */ + + + +/*definitions */ +#define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80 +#define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80 +#define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80 +#define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80 +#define DRV_DUMP_TSTORM_CAM_MODE 0x1B1440 + +#define DRV_DUMP_MAX_TIMER_PENDING 200 +#define DRV_DUMP_MAX_HEADER 1000 +#define DRV_DUMP_TIMER_SCAN_DONT_CARE 0xFF +#define RI_E1 0x1 +#define RI_E1H 0x2 +#define RI_E2 0x4 +#define RI_E3 0x8 +#define RI_E3B0 0x10 +#define RI_ONLINE 0x100 +#define RI_OFFLINE 0x0 +#define RI_PATH0_DUMP 0x200 +#define RI_PATH1_DUMP 0x400 + +#define MAX_VFC_WRITE_SIZE 2 + + +/* Data Source - For Extension Headers */ +#define RI_SRC_XSTORM 0 +#define RI_SRC_TSTORM 1 +#define RI_SRC_USTORM 2 +#define RI_SRC_CSTORM 3 +#define RI_OTHER_BLOCK 4 + + +/* Data Types */ +#define RI_TYPE_IGU 0 +#define RI_TYPE_VFC 1 +#define RI_TYPE_SPLIT 2 + + +/* VFC Status flag */ +#define RI_VFC_IS_READY 1 +#define RI_VFC_IS_BUSY 2 +#define RI_VFC_IS_ONGOING_SEND 4 +#define RI_E1_ONLINE (RI_E1 | RI_ONLINE) +#define RI_E1H_ONLINE (RI_E1H | RI_ONLINE) +#define RI_E1E1H_ONLINE (RI_E1 | RI_E1H | RI_ONLINE) +#define RI_E2_ONLINE (RI_E2 | RI_ONLINE) +#define RI_E1E2_ONLINE (RI_E1 | RI_E2 | RI_ONLINE) +#define RI_E1HE2_ONLINE (RI_E1H | RI_E2 | RI_ONLINE) +#define RI_E1E1HE2_ONLINE (RI_E1 | RI_E1H | RI_E2 | RI_ONLINE) +#define RI_E3_ONLINE (RI_E3 | RI_ONLINE) +#define RI_E1E3_ONLINE (RI_E1 | RI_E3 | RI_ONLINE) +#define RI_E1HE3_ONLINE (RI_E1H | RI_E3 | RI_ONLINE) +#define RI_E1E1HE3_ONLINE (RI_E1 | RI_E1H | RI_E3 | RI_ONLINE) +#define RI_E2E3_ONLINE (RI_E2 | RI_E3 | RI_ONLINE) +#define RI_E1E2E3_ONLINE (RI_E1 | RI_E2 | RI_E3 | RI_ONLINE) +#define RI_E1HE2E3_ONLINE (RI_E1H | RI_E2 | RI_E3 | RI_ONLINE) +#define RI_E1E1HE2E3_ONLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3 | RI_ONLINE) +#define RI_E3B0_ONLINE (RI_E3B0 | RI_ONLINE) +#define RI_E1E3B0_ONLINE (RI_E1 | RI_E3B0 | RI_ONLINE) +#define RI_E1HE3B0_ONLINE (RI_E1H | RI_E3B0 | RI_ONLINE) +#define RI_E1E1HE3B0_ONLINE (RI_E1 | RI_E1H | RI_E3B0 | RI_ONLINE) +#define RI_E2E3B0_ONLINE (RI_E2 | RI_E3B0 | RI_ONLINE) +#define RI_E1E2E3B0_ONLINE (RI_E1 | RI_E2 | RI_E3B0 | RI_ONLINE) +#define RI_E1HE2E3B0_ONLINE (RI_E1H | RI_E2 | RI_E3B0 | RI_ONLINE) +#define RI_E1E1HE2E3B0_ONLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3B0 | RI_ONLINE) +#define RI_E3E3B0_ONLINE (RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1E3E3B0_ONLINE (RI_E1 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1HE3E3B0_ONLINE (RI_E1H | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1E1HE3E3B0_ONLINE \ + (RI_E1 | RI_E1H | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E2E3E3B0_ONLINE (RI_E2 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1E2E3E3B0_ONLINE \ + (RI_E1 | RI_E2 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1HE2E3E3B0_ONLINE \ + (RI_E1H | RI_E2 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1E1HE2E3E3B0_ONLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3 | RI_E3B0 | RI_ONLINE) +#define RI_E1_OFFLINE (RI_E1 | RI_OFFLINE) +#define RI_E1H_OFFLINE (RI_E1H | RI_OFFLINE) +#define RI_E1E1H_OFFLINE (RI_E1 | RI_E1H | RI_OFFLINE) +#define RI_E2_OFFLINE (RI_E2 | RI_OFFLINE) +#define RI_E1E2_OFFLINE (RI_E1 | RI_E2 | RI_OFFLINE) +#define RI_E1HE2_OFFLINE (RI_E1H | RI_E2 | RI_OFFLINE) +#define RI_E1E1HE2_OFFLINE (RI_E1 | RI_E1H | RI_E2 | RI_OFFLINE) +#define RI_E3_OFFLINE (RI_E3 | RI_OFFLINE) +#define RI_E1E3_OFFLINE (RI_E1 | RI_E3 | RI_OFFLINE) +#define RI_E1HE3_OFFLINE (RI_E1H | RI_E3 | RI_OFFLINE) +#define RI_E1E1HE3_OFFLINE (RI_E1 | RI_E1H | RI_E3 | RI_OFFLINE) +#define RI_E2E3_OFFLINE (RI_E2 | RI_E3 | RI_OFFLINE) +#define RI_E1E2E3_OFFLINE (RI_E1 | RI_E2 | RI_E3 | RI_OFFLINE) +#define RI_E1HE2E3_OFFLINE (RI_E1H | RI_E2 | RI_E3 | RI_OFFLINE) +#define RI_E1E1HE2E3_OFFLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3 | RI_OFFLINE) +#define RI_E3B0_OFFLINE (RI_E3B0 | RI_OFFLINE) +#define RI_E1E3B0_OFFLINE (RI_E1 | RI_E3B0 | RI_OFFLINE) +#define RI_E1HE3B0_OFFLINE (RI_E1H | RI_E3B0 | RI_OFFLINE) +#define RI_E1E1HE3B0_OFFLINE (RI_E1 | RI_E1H | RI_E3B0 | RI_OFFLINE) +#define RI_E2E3B0_OFFLINE (RI_E2 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E2E3B0_OFFLINE (RI_E1 | RI_E2 | RI_E3B0 | RI_OFFLINE) +#define RI_E1HE2E3B0_OFFLINE (RI_E1H | RI_E2 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E1HE2E3B0_OFFLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3B0 | RI_OFFLINE) +#define RI_E3E3B0_OFFLINE (RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E3E3B0_OFFLINE (RI_E1 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1HE3E3B0_OFFLINE (RI_E1H | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E1HE3E3B0_OFFLINE \ + (RI_E1 | RI_E1H | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E2E3E3B0_OFFLINE (RI_E2 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E2E3E3B0_OFFLINE \ + (RI_E1 | RI_E2 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1HE2E3E3B0_OFFLINE \ + (RI_E1H | RI_E2 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_E1E1HE2E3E3B0_OFFLINE \ + (RI_E1 | RI_E1H | RI_E2 | RI_E3 | RI_E3B0 | RI_OFFLINE) +#define RI_ALL_ONLINE RI_E1E1HE2E3E3B0_ONLINE +#define RI_ALL_OFFLINE RI_E1E1HE2E3E3B0_OFFLINE + +/* Macros for handling the MCP Tracebuffer */ +#define DBG_DMP_TRACE_BUFFER_SIZE 0x800 +#define DBG_DMP_TRACE_BUFFER_OFFSET(shmem0_offset) \ + ((shmem0_offset) - DBG_DMP_TRACE_BUFFER_SIZE) + + +/* This struct holds a signature to ensure the dump returned from the driver + match the meta data file inserted to grc_dump.tcl + The signature is time stamp, diag version and grc_dump version */ + + + + +struct hd_param { + u32 time_stamp; + u32 diag_ver; + u32 grc_dump_ver; +}; + +struct dump_hdr { + u32 hdr_size; /* in dwords, excluding this field */ + struct hd_param hd_param_all; + u32 x_storm_wait_p_status; + u32 t_storm_wait_p_status; + u32 u_storm_wait_p_status; + u32 c_storm_wait_p_status; + u16 info; + u8 idle_chk; + u8 reserved; +}; + +#define HDR_SIGNATURE 0x11ff22ee + +struct extension_hdr { + u32 hdr_signature; + u32 hdr_size; /* in dwords, excluding this field */ + u32 data_size; /* in dwords */ + u32 additional_data; + u32 data_source; /* storm number or none if from a block. */ + u32 data_type; + u32 reserved; + u32 error; +}; + +struct igu_data { + u32 valid; /* is valid for the current chip */ + u32 max_size; /* max read iterations */ + u32 is_last_commands; /* put value in the additional_data field */ + u32 is_data_valid; /* non-zero for valid */ + u32 data[2]; +}; + +struct vfc_general { + u32 valid; /* is valid for the current chip */ + u32 vfc_status; + u32 vfc_address; + u32 vfc_data_write; + u32 vfc_data_read; +}; + +struct vfc_read_write_vector { +u32 read_size; +u32 address_value; +u32 write_value_num_valid; +u32 write_value[MAX_VFC_WRITE_SIZE]; +}; + +struct vfc_read_task { + const struct vfc_read_write_vector *read_write_vectors; +u32 array_size; +}; + +struct reg_addr { + u32 addr; + u32 size; + u16 info; +}; + +struct wreg_addr { + u32 addr; + u32 size; + u32 read_regs_count; + const u32 *read_regs; + u16 info; +}; + + + +/* generated file from GRC_dump.tcl + The grcDump args were -withiornos -mcpfull -splitfull + The chip was all*/ + + + +static const struct reg_addr reg_addrs[] = { + { 0x2000, 341, RI_ALL_ONLINE}, + { 0x2800, 103, RI_ALL_ONLINE}, + { 0x3000, 287, RI_ALL_ONLINE}, + { 0x3800, 331, RI_ALL_ONLINE}, + { 0x8800, 6, RI_ALL_ONLINE}, + { 0x8818, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x9000, 147, RI_E2E3E3B0_ONLINE}, + { 0x924c, 1, RI_E2_ONLINE}, + { 0x9250, 16, RI_E2E3E3B0_ONLINE}, + { 0x9400, 33, RI_E2E3E3B0_ONLINE}, + { 0x9484, 5, RI_E3E3B0_ONLINE}, + { 0xa000, 27, RI_ALL_ONLINE}, + { 0xa06c, 1, RI_E1E1H_ONLINE}, + { 0xa070, 71, RI_ALL_ONLINE}, + { 0xa18c, 4, RI_E1E1H_ONLINE}, + { 0xa19c, 62, RI_ALL_ONLINE}, + { 0xa294, 2, RI_E1E1H_ONLINE}, + { 0xa29c, 2, RI_ALL_ONLINE}, + { 0xa2a4, 2, RI_E1E1HE2_ONLINE}, + { 0xa2ac, 52, RI_ALL_ONLINE}, + { 0xa39c, 7, RI_E1HE2E3E3B0_ONLINE}, + { 0xa3b8, 2, RI_E3E3B0_ONLINE}, + { 0xa3c0, 3, RI_E1HE2E3E3B0_ONLINE}, + { 0xa3d0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa3d8, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa3e0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa3e8, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa3f0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa3f8, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa400, 40, RI_ALL_ONLINE}, + { 0xa4a0, 1, RI_E1E1HE2_ONLINE}, + { 0xa4a4, 2, RI_ALL_ONLINE}, + { 0xa4ac, 2, RI_E1E1H_ONLINE}, + { 0xa4b4, 1, RI_E1E1HE2_ONLINE}, + { 0xa4b8, 2, RI_E1E1H_ONLINE}, + { 0xa4c0, 3, RI_ALL_ONLINE}, + { 0xa4cc, 5, RI_E1E1H_ONLINE}, + { 0xa4e0, 3, RI_ALL_ONLINE}, + { 0xa4fc, 2, RI_ALL_ONLINE}, + { 0xa504, 1, RI_E1E1H_ONLINE}, + { 0xa508, 3, RI_ALL_ONLINE}, + { 0xa518, 1, RI_ALL_ONLINE}, + { 0xa520, 1, RI_ALL_ONLINE}, + { 0xa528, 1, RI_ALL_ONLINE}, + { 0xa530, 1, RI_ALL_ONLINE}, + { 0xa538, 1, RI_ALL_ONLINE}, + { 0xa540, 1, RI_ALL_ONLINE}, + { 0xa548, 1, RI_E1E1H_ONLINE}, + { 0xa550, 1, RI_E1E1H_ONLINE}, + { 0xa558, 1, RI_E1E1H_ONLINE}, + { 0xa560, 1, RI_E1E1H_ONLINE}, + { 0xa568, 1, RI_E1E1H_ONLINE}, + { 0xa570, 1, RI_ALL_ONLINE}, + { 0xa580, 1, RI_ALL_ONLINE}, + { 0xa590, 1, RI_ALL_ONLINE}, + { 0xa5a0, 1, RI_E1E1HE2_ONLINE}, + { 0xa5c0, 1, RI_ALL_ONLINE}, + { 0xa5e0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa5e8, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa5f0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa5f8, 1, RI_E1HE2_ONLINE}, + { 0xa5fc, 9, RI_E1HE2E3E3B0_ONLINE}, + { 0xa620, 6, RI_E2E3E3B0_ONLINE}, + { 0xa638, 20, RI_E2_ONLINE}, + { 0xa688, 42, RI_E2E3E3B0_ONLINE}, + { 0xa730, 1, RI_E2_ONLINE}, + { 0xa734, 2, RI_E2E3E3B0_ONLINE}, + { 0xa73c, 4, RI_E2_ONLINE}, + { 0xa74c, 5, RI_E2E3E3B0_ONLINE}, + { 0xa760, 5, RI_E2_ONLINE}, + { 0xa774, 7, RI_E2E3E3B0_ONLINE}, + { 0xa790, 15, RI_E2_ONLINE}, + { 0xa7cc, 4, RI_E2E3E3B0_ONLINE}, + { 0xa7e0, 6, RI_E3E3B0_ONLINE}, + { 0xa800, 18, RI_E2_ONLINE}, + { 0xa848, 33, RI_E2E3E3B0_ONLINE}, + { 0xa8cc, 2, RI_E3E3B0_ONLINE}, + { 0xa8d4, 4, RI_E2E3E3B0_ONLINE}, + { 0xa8e4, 1, RI_E3E3B0_ONLINE}, + { 0xa8e8, 1, RI_E2E3E3B0_ONLINE}, + { 0xa8f0, 1, RI_E2E3E3B0_ONLINE}, + { 0xa8f8, 30, RI_E3E3B0_ONLINE}, + { 0xa974, 73, RI_E3E3B0_ONLINE}, + { 0xac30, 1, RI_E3E3B0_ONLINE}, + { 0xac40, 1, RI_E3E3B0_ONLINE}, + { 0xac50, 1, RI_E3E3B0_ONLINE}, + { 0xac60, 1, RI_E3B0_ONLINE}, + { 0x10000, 9, RI_ALL_ONLINE}, + { 0x10024, 1, RI_E1E1HE2_ONLINE}, + { 0x10028, 5, RI_ALL_ONLINE}, + { 0x1003c, 6, RI_E1E1HE2_ONLINE}, + { 0x10054, 20, RI_ALL_ONLINE}, + { 0x100a4, 4, RI_E1E1HE2_ONLINE}, + { 0x100b4, 11, RI_ALL_ONLINE}, + { 0x100e0, 4, RI_E1E1HE2_ONLINE}, + { 0x100f0, 8, RI_ALL_ONLINE}, + { 0x10110, 6, RI_E1E1HE2_ONLINE}, + { 0x10128, 110, RI_ALL_ONLINE}, + { 0x102e0, 4, RI_E1E1HE2_ONLINE}, + { 0x102f0, 18, RI_ALL_ONLINE}, + { 0x10338, 20, RI_E1E1HE2_ONLINE}, + { 0x10388, 10, RI_ALL_ONLINE}, + { 0x10400, 6, RI_E1E1HE2_ONLINE}, + { 0x10418, 6, RI_ALL_ONLINE}, + { 0x10430, 10, RI_E1E1HE2_ONLINE}, + { 0x10458, 22, RI_ALL_ONLINE}, + { 0x104b0, 12, RI_E1E1HE2_ONLINE}, + { 0x104e0, 1, RI_ALL_ONLINE}, + { 0x104e8, 2, RI_ALL_ONLINE}, + { 0x104f4, 2, RI_ALL_ONLINE}, + { 0x10500, 146, RI_ALL_ONLINE}, + { 0x10750, 2, RI_E1E1HE2_ONLINE}, + { 0x10760, 2, RI_E1E1HE2_ONLINE}, + { 0x10770, 2, RI_E1E1HE2_ONLINE}, + { 0x10780, 2, RI_E1E1HE2_ONLINE}, + { 0x10790, 2, RI_ALL_ONLINE}, + { 0x107a0, 2, RI_E1E1HE2_ONLINE}, + { 0x107b0, 2, RI_E1E1HE2_ONLINE}, + { 0x107c0, 2, RI_E1E1HE2_ONLINE}, + { 0x107d0, 2, RI_E1E1HE2_ONLINE}, + { 0x107e0, 2, RI_ALL_ONLINE}, + { 0x10880, 2, RI_ALL_ONLINE}, + { 0x10900, 2, RI_ALL_ONLINE}, + { 0x16000, 1, RI_E1HE2_ONLINE}, + { 0x16004, 25, RI_E1HE2E3E3B0_ONLINE}, + { 0x16070, 8, RI_E1HE2E3E3B0_ONLINE}, + { 0x16090, 4, RI_E1HE2E3_ONLINE}, + { 0x160a0, 6, RI_E1HE2E3E3B0_ONLINE}, + { 0x160c0, 7, RI_E1HE2E3E3B0_ONLINE}, + { 0x160dc, 2, RI_E1HE2_ONLINE}, + { 0x160e4, 10, RI_E1HE2E3E3B0_ONLINE}, + { 0x1610c, 2, RI_E1HE2_ONLINE}, + { 0x16114, 6, RI_E1HE2E3E3B0_ONLINE}, + { 0x16140, 48, RI_E1HE2E3E3B0_ONLINE}, + { 0x16204, 5, RI_E1HE2E3E3B0_ONLINE}, + { 0x18000, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x18008, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x18010, 35, RI_E2E3E3B0_ONLINE}, + { 0x180a4, 2, RI_E2E3E3B0_ONLINE}, + { 0x180c0, 9, RI_E2E3E3B0_ONLINE}, + { 0x180e4, 1, RI_E2E3_ONLINE}, + { 0x180e8, 2, RI_E2E3E3B0_ONLINE}, + { 0x180f0, 1, RI_E2E3_ONLINE}, + { 0x180f4, 79, RI_E2E3E3B0_ONLINE}, + { 0x18230, 1, RI_E2E3_ONLINE}, + { 0x18234, 2, RI_E2E3E3B0_ONLINE}, + { 0x1823c, 1, RI_E2E3_ONLINE}, + { 0x18240, 13, RI_E2E3E3B0_ONLINE}, + { 0x18274, 1, RI_E2_ONLINE}, + { 0x18278, 81, RI_E2E3E3B0_ONLINE}, + { 0x18440, 63, RI_E2E3E3B0_ONLINE}, + { 0x18570, 42, RI_E3E3B0_ONLINE}, + { 0x18618, 25, RI_E3B0_ONLINE}, + { 0x18680, 44, RI_E3B0_ONLINE}, + { 0x18748, 12, RI_E3B0_ONLINE}, + { 0x18788, 1, RI_E3B0_ONLINE}, + { 0x1879c, 6, RI_E3B0_ONLINE}, + { 0x187c4, 51, RI_E3B0_ONLINE}, + { 0x18a00, 48, RI_E3B0_ONLINE}, + { 0x20000, 24, RI_ALL_ONLINE}, + { 0x20060, 8, RI_ALL_ONLINE}, + { 0x20080, 94, RI_ALL_ONLINE}, + { 0x201f8, 1, RI_E1E1H_ONLINE}, + { 0x201fc, 1, RI_ALL_ONLINE}, + { 0x20200, 1, RI_E1E1H_ONLINE}, + { 0x20204, 1, RI_ALL_ONLINE}, + { 0x20208, 1, RI_E1E1H_ONLINE}, + { 0x2020c, 39, RI_ALL_ONLINE}, + { 0x202c8, 1, RI_E2E3E3B0_ONLINE}, + { 0x202d8, 4, RI_E2E3E3B0_ONLINE}, + { 0x202f0, 1, RI_E3B0_ONLINE}, + { 0x20400, 2, RI_ALL_ONLINE}, + { 0x2040c, 8, RI_ALL_ONLINE}, + { 0x2042c, 18, RI_E1HE2E3E3B0_ONLINE}, + { 0x20480, 1, RI_ALL_ONLINE}, + { 0x20500, 1, RI_ALL_ONLINE}, + { 0x20600, 1, RI_ALL_ONLINE}, + { 0x28000, 1, RI_ALL_ONLINE}, + { 0x28004, 8191, RI_ALL_OFFLINE}, + { 0x30000, 1, RI_ALL_ONLINE}, + { 0x30004, 16383, RI_ALL_OFFLINE}, + { 0x40000, 98, RI_ALL_ONLINE}, + { 0x401a8, 8, RI_E1HE2E3E3B0_ONLINE}, + { 0x401c8, 1, RI_E1H_ONLINE}, + { 0x401cc, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x401d4, 2, RI_E2E3E3B0_ONLINE}, + { 0x40200, 4, RI_ALL_ONLINE}, + { 0x40220, 6, RI_E2E3E3B0_ONLINE}, + { 0x40238, 8, RI_E2E3_ONLINE}, + { 0x40258, 4, RI_E2E3E3B0_ONLINE}, + { 0x40268, 2, RI_E3E3B0_ONLINE}, + { 0x40270, 17, RI_E3B0_ONLINE}, + { 0x40400, 43, RI_ALL_ONLINE}, + { 0x404cc, 3, RI_E1HE2E3E3B0_ONLINE}, + { 0x404e0, 1, RI_E2E3E3B0_ONLINE}, + { 0x40500, 2, RI_ALL_ONLINE}, + { 0x40510, 2, RI_ALL_ONLINE}, + { 0x40520, 2, RI_ALL_ONLINE}, + { 0x40530, 2, RI_ALL_ONLINE}, + { 0x40540, 2, RI_ALL_ONLINE}, + { 0x40550, 10, RI_E2E3E3B0_ONLINE}, + { 0x40610, 2, RI_E2E3E3B0_ONLINE}, + { 0x42000, 164, RI_ALL_ONLINE}, + { 0x422c0, 4, RI_E2E3E3B0_ONLINE}, + { 0x422d4, 5, RI_E1HE2E3E3B0_ONLINE}, + { 0x422e8, 1, RI_E2E3E3B0_ONLINE}, + { 0x42400, 49, RI_ALL_ONLINE}, + { 0x424c8, 38, RI_ALL_ONLINE}, + { 0x42568, 2, RI_ALL_ONLINE}, + { 0x42640, 5, RI_E2E3E3B0_ONLINE}, + { 0x42800, 1, RI_ALL_ONLINE}, + { 0x50000, 1, RI_ALL_ONLINE}, + { 0x50004, 19, RI_ALL_ONLINE}, + { 0x50050, 8, RI_ALL_ONLINE}, + { 0x50070, 88, RI_ALL_ONLINE}, + { 0x501f0, 4, RI_E1HE2E3E3B0_ONLINE}, + { 0x50200, 2, RI_ALL_ONLINE}, + { 0x5020c, 7, RI_ALL_ONLINE}, + { 0x50228, 6, RI_E1HE2E3E3B0_ONLINE}, + { 0x50240, 1, RI_ALL_ONLINE}, + { 0x50280, 1, RI_ALL_ONLINE}, + { 0x50300, 1, RI_E2E3E3B0_ONLINE}, + { 0x5030c, 1, RI_E2E3E3B0_ONLINE}, + { 0x50318, 1, RI_E2E3E3B0_ONLINE}, + { 0x5031c, 1, RI_E2E3E3B0_ONLINE}, + { 0x50320, 2, RI_E2E3E3B0_ONLINE}, + { 0x50330, 1, RI_E3B0_ONLINE}, + { 0x52000, 1, RI_ALL_ONLINE}, + { 0x54000, 1, RI_ALL_ONLINE}, + { 0x54004, 3327, RI_ALL_OFFLINE}, + { 0x58000, 1, RI_ALL_ONLINE}, + { 0x58004, 8191, RI_E1E1H_OFFLINE}, + { 0x60000, 26, RI_ALL_ONLINE}, + { 0x60068, 8, RI_E1E1H_ONLINE}, + { 0x60088, 12, RI_ALL_ONLINE}, + { 0x600b8, 9, RI_E1E1H_ONLINE}, + { 0x600dc, 1, RI_ALL_ONLINE}, + { 0x600e0, 5, RI_E1E1H_ONLINE}, + { 0x600f4, 1, RI_E1E1HE2_ONLINE}, + { 0x600f8, 1, RI_E1E1H_ONLINE}, + { 0x600fc, 8, RI_ALL_ONLINE}, + { 0x6013c, 24, RI_E1H_ONLINE}, + { 0x6019c, 2, RI_E2E3E3B0_ONLINE}, + { 0x601ac, 18, RI_E2E3E3B0_ONLINE}, + { 0x60200, 1, RI_ALL_ONLINE}, + { 0x60204, 2, RI_ALL_OFFLINE}, + { 0x60210, 13, RI_E2E3E3B0_ONLINE}, + { 0x60244, 16, RI_E3B0_ONLINE}, + { 0x61000, 1, RI_ALL_ONLINE}, + { 0x61004, 511, RI_ALL_OFFLINE}, + { 0x61800, 512, RI_E3E3B0_OFFLINE}, + { 0x70000, 8, RI_ALL_ONLINE}, + { 0x70020, 8184, RI_ALL_OFFLINE}, + { 0x78000, 8192, RI_E3E3B0_OFFLINE}, + { 0x85000, 3, RI_ALL_OFFLINE}, + { 0x8501c, 7, RI_ALL_OFFLINE}, + { 0x85048, 1, RI_ALL_OFFLINE}, + { 0x85200, 32, RI_ALL_OFFLINE}, + { 0xa0000, 16384, RI_E1E1H_OFFLINE}, + { 0xb0000, 16384, RI_E1H_OFFLINE}, + { 0xc1000, 7, RI_ALL_ONLINE}, + { 0xc103c, 2, RI_E2E3E3B0_ONLINE}, + { 0xc1800, 2, RI_ALL_ONLINE}, + { 0xc2000, 164, RI_ALL_ONLINE}, + { 0xc22c0, 5, RI_E2E3E3B0_ONLINE}, + { 0xc22d8, 4, RI_E2E3E3B0_ONLINE}, + { 0xc2400, 49, RI_ALL_ONLINE}, + { 0xc24c8, 38, RI_ALL_ONLINE}, + { 0xc2568, 2, RI_ALL_ONLINE}, + { 0xc2600, 1, RI_ALL_ONLINE}, + { 0xc4000, 165, RI_ALL_ONLINE}, + { 0xc42d8, 2, RI_E2E3E3B0_ONLINE}, + { 0xc42e0, 7, RI_E1HE2E3E3B0_ONLINE}, + { 0xc42fc, 1, RI_E2E3E3B0_ONLINE}, + { 0xc4400, 51, RI_ALL_ONLINE}, + { 0xc44d0, 38, RI_ALL_ONLINE}, + { 0xc4570, 2, RI_ALL_ONLINE}, + { 0xc4578, 5, RI_E2E3E3B0_ONLINE}, + { 0xc4600, 1, RI_ALL_ONLINE}, + { 0xd0000, 19, RI_ALL_ONLINE}, + { 0xd004c, 8, RI_ALL_ONLINE}, + { 0xd006c, 91, RI_ALL_ONLINE}, + { 0xd01fc, 1, RI_E2E3E3B0_ONLINE}, + { 0xd0200, 2, RI_ALL_ONLINE}, + { 0xd020c, 7, RI_ALL_ONLINE}, + { 0xd0228, 18, RI_E1HE2E3E3B0_ONLINE}, + { 0xd0280, 1, RI_ALL_ONLINE}, + { 0xd0300, 1, RI_ALL_ONLINE}, + { 0xd0400, 1, RI_ALL_ONLINE}, + { 0xd0818, 1, RI_E3B0_ONLINE}, + { 0xd4000, 1, RI_ALL_ONLINE}, + { 0xd4004, 2559, RI_ALL_OFFLINE}, + { 0xd8000, 1, RI_ALL_ONLINE}, + { 0xd8004, 8191, RI_ALL_OFFLINE}, + { 0xe0000, 21, RI_ALL_ONLINE}, + { 0xe0054, 8, RI_ALL_ONLINE}, + { 0xe0074, 49, RI_ALL_ONLINE}, + { 0xe0138, 1, RI_E1E1H_ONLINE}, + { 0xe013c, 35, RI_ALL_ONLINE}, + { 0xe01f4, 1, RI_E2_ONLINE}, + { 0xe01f8, 1, RI_E2E3E3B0_ONLINE}, + { 0xe0200, 2, RI_ALL_ONLINE}, + { 0xe020c, 8, RI_ALL_ONLINE}, + { 0xe022c, 18, RI_E1HE2E3E3B0_ONLINE}, + { 0xe0280, 1, RI_ALL_ONLINE}, + { 0xe0300, 1, RI_ALL_ONLINE}, + { 0xe0400, 1, RI_E3B0_ONLINE}, + { 0xe1000, 1, RI_ALL_ONLINE}, + { 0xe2000, 1, RI_ALL_ONLINE}, + { 0xe2004, 2047, RI_ALL_OFFLINE}, + { 0xf0000, 1, RI_ALL_ONLINE}, + { 0xf0004, 16383, RI_ALL_OFFLINE}, + { 0x101000, 12, RI_ALL_ONLINE}, + { 0x101050, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x101054, 3, RI_E2E3E3B0_ONLINE}, + { 0x101100, 1, RI_ALL_ONLINE}, + { 0x101800, 8, RI_ALL_ONLINE}, + { 0x102000, 18, RI_ALL_ONLINE}, + { 0x102068, 6, RI_E2E3E3B0_ONLINE}, + { 0x102080, 17, RI_ALL_ONLINE}, + { 0x1020c8, 8, RI_E1H_ONLINE}, + { 0x1020e8, 9, RI_E2E3E3B0_ONLINE}, + { 0x102400, 1, RI_ALL_ONLINE}, + { 0x103000, 26, RI_ALL_ONLINE}, + { 0x103098, 5, RI_E1HE2E3E3B0_ONLINE}, + { 0x1030ac, 2, RI_E2E3E3B0_ONLINE}, + { 0x1030b4, 1, RI_E2_ONLINE}, + { 0x1030b8, 7, RI_E2E3E3B0_ONLINE}, + { 0x1030d8, 8, RI_E2E3E3B0_ONLINE}, + { 0x103400, 1, RI_E2E3E3B0_ONLINE}, + { 0x103404, 135, RI_E2E3E3B0_OFFLINE}, + { 0x103800, 8, RI_ALL_ONLINE}, + { 0x104000, 63, RI_ALL_ONLINE}, + { 0x10411c, 16, RI_E2E3E3B0_ONLINE}, + { 0x104200, 17, RI_ALL_ONLINE}, + { 0x104400, 64, RI_ALL_ONLINE}, + { 0x104500, 192, RI_ALL_OFFLINE}, + { 0x104800, 64, RI_ALL_ONLINE}, + { 0x104900, 192, RI_ALL_OFFLINE}, + { 0x105000, 256, RI_ALL_ONLINE}, + { 0x105400, 768, RI_ALL_OFFLINE}, + { 0x107000, 7, RI_E2E3E3B0_ONLINE}, + { 0x10701c, 1, RI_E3E3B0_ONLINE}, + { 0x108000, 33, RI_E1E1H_ONLINE}, + { 0x1080ac, 5, RI_E1H_ONLINE}, + { 0x108100, 5, RI_E1E1H_ONLINE}, + { 0x108120, 5, RI_E1E1H_ONLINE}, + { 0x108200, 74, RI_E1E1H_ONLINE}, + { 0x108400, 74, RI_E1E1H_ONLINE}, + { 0x108800, 152, RI_E1E1H_ONLINE}, + { 0x110000, 111, RI_E2E3E3B0_ONLINE}, + { 0x1101dc, 1, RI_E3E3B0_ONLINE}, + { 0x110200, 4, RI_E2E3E3B0_ONLINE}, + { 0x120000, 2, RI_ALL_ONLINE}, + { 0x120008, 4, RI_ALL_ONLINE}, + { 0x120018, 3, RI_ALL_ONLINE}, + { 0x120024, 4, RI_ALL_ONLINE}, + { 0x120034, 3, RI_ALL_ONLINE}, + { 0x120040, 4, RI_ALL_ONLINE}, + { 0x120050, 3, RI_ALL_ONLINE}, + { 0x12005c, 4, RI_ALL_ONLINE}, + { 0x12006c, 3, RI_ALL_ONLINE}, + { 0x120078, 4, RI_ALL_ONLINE}, + { 0x120088, 3, RI_ALL_ONLINE}, + { 0x120094, 4, RI_ALL_ONLINE}, + { 0x1200a4, 3, RI_ALL_ONLINE}, + { 0x1200b0, 4, RI_ALL_ONLINE}, + { 0x1200c0, 3, RI_ALL_ONLINE}, + { 0x1200cc, 4, RI_ALL_ONLINE}, + { 0x1200dc, 3, RI_ALL_ONLINE}, + { 0x1200e8, 4, RI_ALL_ONLINE}, + { 0x1200f8, 3, RI_ALL_ONLINE}, + { 0x120104, 4, RI_ALL_ONLINE}, + { 0x120114, 1, RI_ALL_ONLINE}, + { 0x120118, 22, RI_ALL_ONLINE}, + { 0x120170, 2, RI_E1E1H_ONLINE}, + { 0x120178, 243, RI_ALL_ONLINE}, + { 0x120544, 4, RI_E1E1H_ONLINE}, + { 0x120554, 6, RI_ALL_ONLINE}, + { 0x12059c, 6, RI_E1HE2E3E3B0_ONLINE}, + { 0x1205b4, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1205b8, 15, RI_E1HE2E3E3B0_ONLINE}, + { 0x1205f4, 1, RI_E1HE2_ONLINE}, + { 0x1205f8, 4, RI_E2E3E3B0_ONLINE}, + { 0x120618, 1, RI_E2E3E3B0_ONLINE}, + { 0x12061c, 20, RI_E1HE2E3E3B0_ONLINE}, + { 0x12066c, 11, RI_E1HE2E3E3B0_ONLINE}, + { 0x120698, 3, RI_E2E3E3B0_ONLINE}, + { 0x1206a4, 1, RI_E2_ONLINE}, + { 0x1206a8, 1, RI_E2E3E3B0_ONLINE}, + { 0x1206b0, 75, RI_E2E3E3B0_ONLINE}, + { 0x1207dc, 1, RI_E2_ONLINE}, + { 0x1207fc, 1, RI_E2E3E3B0_ONLINE}, + { 0x12080c, 65, RI_ALL_ONLINE}, + { 0x120910, 7, RI_E2E3E3B0_ONLINE}, + { 0x120930, 9, RI_E2E3E3B0_ONLINE}, + { 0x12095c, 37, RI_E3E3B0_ONLINE}, + { 0x120a00, 2, RI_E1E1HE2_ONLINE}, + { 0x120b00, 1, RI_E3E3B0_ONLINE}, + { 0x122000, 2, RI_ALL_ONLINE}, + { 0x122008, 2046, RI_E1_OFFLINE}, + { 0x128000, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x128008, 6142, RI_E1HE2E3E3B0_OFFLINE}, + { 0x130000, 35, RI_E2E3E3B0_ONLINE}, + { 0x130100, 29, RI_E2E3E3B0_ONLINE}, + { 0x130180, 1, RI_E2E3E3B0_ONLINE}, + { 0x130200, 1, RI_E2E3E3B0_ONLINE}, + { 0x130280, 1, RI_E2E3E3B0_ONLINE}, + { 0x130300, 5, RI_E2E3E3B0_ONLINE}, + { 0x130380, 1, RI_E2E3E3B0_ONLINE}, + { 0x130400, 1, RI_E2E3E3B0_ONLINE}, + { 0x130480, 5, RI_E2E3E3B0_ONLINE}, + { 0x130800, 72, RI_E2E3E3B0_ONLINE}, + { 0x131000, 136, RI_E2E3E3B0_ONLINE}, + { 0x132000, 148, RI_E2E3E3B0_ONLINE}, + { 0x134000, 544, RI_E2E3E3B0_ONLINE}, + { 0x140000, 1, RI_ALL_ONLINE}, + { 0x140004, 9, RI_E1E1HE2E3_ONLINE}, + { 0x140028, 8, RI_ALL_ONLINE}, + { 0x140048, 10, RI_E1E1HE2E3_ONLINE}, + { 0x140070, 1, RI_ALL_ONLINE}, + { 0x140074, 10, RI_E1E1HE2E3_ONLINE}, + { 0x14009c, 1, RI_ALL_ONLINE}, + { 0x1400a0, 5, RI_E1E1HE2E3_ONLINE}, + { 0x1400b4, 7, RI_ALL_ONLINE}, + { 0x1400d0, 10, RI_E1E1HE2E3_ONLINE}, + { 0x1400f8, 2, RI_ALL_ONLINE}, + { 0x140100, 5, RI_E1E1H_ONLINE}, + { 0x140114, 5, RI_E1E1HE2E3_ONLINE}, + { 0x140128, 7, RI_ALL_ONLINE}, + { 0x140144, 9, RI_E1E1HE2E3_ONLINE}, + { 0x140168, 8, RI_ALL_ONLINE}, + { 0x140188, 3, RI_E1E1HE2E3_ONLINE}, + { 0x140194, 13, RI_ALL_ONLINE}, + { 0x140200, 6, RI_E1E1HE2E3_ONLINE}, +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + { 0x140220, 4, RI_E2E3_ONLINE}, + { 0x140240, 4, RI_E2E3_ONLINE}, +#endif + { 0x140260, 4, RI_E2E3_ONLINE}, + { 0x140280, 4, RI_E2E3_ONLINE}, +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + { 0x1402a0, 4, RI_E2E3_ONLINE}, + { 0x1402c0, 4, RI_E2E3_ONLINE}, +#endif + { 0x1402e0, 2, RI_E2E3_ONLINE}, + { 0x1402e8, 2, RI_E2E3E3B0_ONLINE}, + { 0x1402f0, 9, RI_E2E3_ONLINE}, + { 0x140314, 44, RI_E3B0_ONLINE}, +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + { 0x1403d0, 70, RI_E3B0_ONLINE}, +#endif + { 0x144000, 4, RI_E1E1H_ONLINE}, + { 0x148000, 4, RI_E1E1H_ONLINE}, + { 0x14c000, 4, RI_E1E1H_ONLINE}, + { 0x150000, 4, RI_E1E1H_ONLINE}, + { 0x154000, 4, RI_E1E1H_ONLINE}, + { 0x158000, 4, RI_E1E1H_ONLINE}, + { 0x15c000, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x15c008, 5, RI_E1H_ONLINE}, + { 0x15c020, 8, RI_E2E3E3B0_ONLINE}, + { 0x15c040, 1, RI_E2E3_ONLINE}, + { 0x15c044, 2, RI_E2E3E3B0_ONLINE}, + { 0x15c04c, 8, RI_E2E3_ONLINE}, + { 0x15c06c, 8, RI_E2E3E3B0_ONLINE}, + { 0x15c090, 13, RI_E2E3E3B0_ONLINE}, + { 0x15c0c8, 24, RI_E2E3E3B0_ONLINE}, + { 0x15c128, 2, RI_E2E3_ONLINE}, + { 0x15c130, 8, RI_E2E3E3B0_ONLINE}, + { 0x15c150, 2, RI_E3E3B0_ONLINE}, + { 0x15c158, 2, RI_E3_ONLINE}, + { 0x15c160, 149, RI_E3B0_ONLINE}, + { 0x160004, 6, RI_E3E3B0_ONLINE}, + { 0x16003c, 1, RI_E3B0_ONLINE}, + { 0x160040, 6, RI_E3E3B0_ONLINE}, + { 0x16005c, 6, RI_E3E3B0_ONLINE}, + { 0x160074, 1, RI_E3B0_ONLINE}, + { 0x160078, 2, RI_E3E3B0_ONLINE}, + { 0x160300, 8, RI_E3E3B0_ONLINE}, + { 0x160330, 6, RI_E3E3B0_ONLINE}, + { 0x160404, 6, RI_E3E3B0_ONLINE}, + { 0x16043c, 1, RI_E3B0_ONLINE}, + { 0x160440, 6, RI_E3E3B0_ONLINE}, + { 0x16045c, 6, RI_E3E3B0_ONLINE}, + { 0x160474, 1, RI_E3B0_ONLINE}, + { 0x160478, 2, RI_E3E3B0_ONLINE}, + { 0x160700, 8, RI_E3E3B0_ONLINE}, + { 0x160730, 6, RI_E3E3B0_ONLINE}, + { 0x161000, 7, RI_ALL_ONLINE}, + { 0x16103c, 2, RI_E2E3E3B0_ONLINE}, + { 0x161800, 2, RI_ALL_ONLINE}, + { 0x162000, 54, RI_E3E3B0_ONLINE}, + { 0x162200, 60, RI_E3E3B0_ONLINE}, + { 0x162400, 54, RI_E3E3B0_ONLINE}, + { 0x162600, 60, RI_E3E3B0_ONLINE}, + { 0x162800, 54, RI_E3E3B0_ONLINE}, + { 0x162a00, 60, RI_E3E3B0_ONLINE}, + { 0x162c00, 54, RI_E3E3B0_ONLINE}, + { 0x162e00, 60, RI_E3E3B0_ONLINE}, + { 0x163000, 1, RI_E3E3B0_ONLINE}, + { 0x163008, 1, RI_E3E3B0_ONLINE}, + { 0x163010, 1, RI_E3E3B0_ONLINE}, + { 0x163018, 1, RI_E3E3B0_ONLINE}, + { 0x163020, 5, RI_E3E3B0_ONLINE}, + { 0x163038, 3, RI_E3E3B0_ONLINE}, + { 0x163048, 3, RI_E3E3B0_ONLINE}, + { 0x163058, 1, RI_E3E3B0_ONLINE}, + { 0x163060, 1, RI_E3E3B0_ONLINE}, + { 0x163068, 1, RI_E3E3B0_ONLINE}, + { 0x163070, 3, RI_E3E3B0_ONLINE}, + { 0x163080, 1, RI_E3E3B0_ONLINE}, + { 0x163088, 3, RI_E3E3B0_ONLINE}, + { 0x163098, 1, RI_E3E3B0_ONLINE}, + { 0x1630a0, 1, RI_E3E3B0_ONLINE}, + { 0x1630a8, 1, RI_E3E3B0_ONLINE}, + { 0x1630b0, 2, RI_E3B0_ONLINE}, + { 0x1630c0, 1, RI_E3E3B0_ONLINE}, + { 0x1630c8, 1, RI_E3E3B0_ONLINE}, + { 0x1630d0, 1, RI_E3E3B0_ONLINE}, + { 0x1630d8, 1, RI_E3E3B0_ONLINE}, + { 0x1630e0, 2, RI_E3E3B0_ONLINE}, + { 0x163110, 1, RI_E3E3B0_ONLINE}, + { 0x163120, 2, RI_E3E3B0_ONLINE}, + { 0x163420, 4, RI_E3E3B0_ONLINE}, + { 0x163438, 2, RI_E3E3B0_ONLINE}, + { 0x163488, 2, RI_E3E3B0_ONLINE}, + { 0x163520, 2, RI_E3E3B0_ONLINE}, + { 0x163800, 1, RI_E3E3B0_ONLINE}, + { 0x163808, 1, RI_E3E3B0_ONLINE}, + { 0x163810, 1, RI_E3E3B0_ONLINE}, + { 0x163818, 1, RI_E3E3B0_ONLINE}, + { 0x163820, 5, RI_E3E3B0_ONLINE}, + { 0x163838, 3, RI_E3E3B0_ONLINE}, + { 0x163848, 3, RI_E3E3B0_ONLINE}, + { 0x163858, 1, RI_E3E3B0_ONLINE}, + { 0x163860, 1, RI_E3E3B0_ONLINE}, + { 0x163868, 1, RI_E3E3B0_ONLINE}, + { 0x163870, 3, RI_E3E3B0_ONLINE}, + { 0x163880, 1, RI_E3E3B0_ONLINE}, + { 0x163888, 3, RI_E3E3B0_ONLINE}, + { 0x163898, 1, RI_E3E3B0_ONLINE}, + { 0x1638a0, 1, RI_E3E3B0_ONLINE}, + { 0x1638a8, 1, RI_E3E3B0_ONLINE}, + { 0x1638b0, 2, RI_E3B0_ONLINE}, + { 0x1638c0, 1, RI_E3E3B0_ONLINE}, + { 0x1638c8, 1, RI_E3E3B0_ONLINE}, + { 0x1638d0, 1, RI_E3E3B0_ONLINE}, + { 0x1638d8, 1, RI_E3E3B0_ONLINE}, + { 0x1638e0, 2, RI_E3E3B0_ONLINE}, + { 0x163910, 1, RI_E3E3B0_ONLINE}, + { 0x163920, 2, RI_E3E3B0_ONLINE}, + { 0x163c20, 4, RI_E3E3B0_ONLINE}, + { 0x163c38, 2, RI_E3E3B0_ONLINE}, + { 0x163c88, 2, RI_E3E3B0_ONLINE}, + { 0x163d20, 2, RI_E3E3B0_ONLINE}, + { 0x164000, 60, RI_ALL_ONLINE}, + { 0x164110, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x164118, 15, RI_E2E3E3B0_ONLINE}, + { 0x164200, 1, RI_ALL_ONLINE}, + { 0x164208, 1, RI_ALL_ONLINE}, + { 0x164210, 1, RI_ALL_ONLINE}, + { 0x164218, 1, RI_ALL_ONLINE}, + { 0x164220, 1, RI_ALL_ONLINE}, + { 0x164228, 1, RI_ALL_ONLINE}, + { 0x164230, 1, RI_ALL_ONLINE}, + { 0x164238, 1, RI_ALL_ONLINE}, + { 0x164240, 1, RI_ALL_ONLINE}, + { 0x164248, 1, RI_ALL_ONLINE}, + { 0x164250, 1, RI_ALL_ONLINE}, + { 0x164258, 1, RI_ALL_ONLINE}, + { 0x164260, 1, RI_ALL_ONLINE}, + { 0x164270, 2, RI_ALL_ONLINE}, + { 0x164280, 2, RI_ALL_ONLINE}, + { 0x164800, 2, RI_ALL_ONLINE}, + { 0x165000, 2, RI_ALL_ONLINE}, + { 0x166000, 164, RI_ALL_ONLINE}, + { 0x1662cc, 7, RI_E2E3E3B0_ONLINE}, + { 0x166400, 49, RI_ALL_ONLINE}, + { 0x1664c8, 38, RI_ALL_ONLINE}, + { 0x166568, 2, RI_ALL_ONLINE}, + { 0x166570, 5, RI_E2E3E3B0_ONLINE}, + { 0x166800, 1, RI_ALL_ONLINE}, + { 0x168000, 137, RI_ALL_ONLINE}, + { 0x168224, 2, RI_E1E1H_ONLINE}, + { 0x16822c, 29, RI_ALL_ONLINE}, + { 0x1682a0, 12, RI_E1E1H_ONLINE}, + { 0x1682d0, 12, RI_ALL_ONLINE}, + { 0x168300, 2, RI_E1E1H_ONLINE}, + { 0x168308, 68, RI_ALL_ONLINE}, + { 0x168418, 2, RI_E1E1H_ONLINE}, + { 0x168420, 6, RI_ALL_ONLINE}, + { 0x168800, 19, RI_ALL_ONLINE}, + { 0x168900, 1, RI_ALL_ONLINE}, + { 0x168a00, 128, RI_ALL_ONLINE}, + { 0x16a000, 1, RI_ALL_ONLINE}, + { 0x16a004, 1535, RI_ALL_OFFLINE}, + { 0x16c000, 1, RI_ALL_ONLINE}, + { 0x16c004, 1535, RI_ALL_OFFLINE}, + { 0x16e000, 16, RI_E1H_ONLINE}, + { 0x16e040, 8, RI_E2E3E3B0_ONLINE}, + { 0x16e100, 1, RI_E1H_ONLINE}, + { 0x16e200, 2, RI_E1H_ONLINE}, + { 0x16e400, 161, RI_E1H_ONLINE}, + { 0x16e684, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x16e68c, 12, RI_E1H_ONLINE}, + { 0x16e6bc, 4, RI_E1HE2E3E3B0_ONLINE}, + { 0x16e6cc, 4, RI_E1H_ONLINE}, + { 0x16e6e0, 2, RI_E2E3E3B0_ONLINE}, + { 0x16e6e8, 5, RI_E2E3_ONLINE}, + { 0x16e6fc, 5, RI_E2E3E3B0_ONLINE}, + { 0x16e768, 17, RI_E2E3E3B0_ONLINE}, + { 0x16e7ac, 12, RI_E3B0_ONLINE}, + { 0x170000, 24, RI_ALL_ONLINE}, + { 0x170060, 4, RI_E1E1H_ONLINE}, + { 0x170070, 65, RI_ALL_ONLINE}, + { 0x170194, 11, RI_E2E3E3B0_ONLINE}, + { 0x1701c4, 1, RI_E2E3E3B0_ONLINE}, + { 0x1701cc, 7, RI_E2E3E3B0_ONLINE}, + { 0x1701e8, 1, RI_E3E3B0_ONLINE}, + { 0x1701ec, 1, RI_E2E3E3B0_ONLINE}, + { 0x1701f4, 1, RI_E2E3E3B0_ONLINE}, + { 0x170200, 4, RI_ALL_ONLINE}, + { 0x170214, 1, RI_ALL_ONLINE}, + { 0x170218, 77, RI_E2E3E3B0_ONLINE}, + { 0x170400, 64, RI_E2E3E3B0_ONLINE}, + { 0x178000, 1, RI_ALL_ONLINE}, + { 0x180000, 61, RI_ALL_ONLINE}, + { 0x18013c, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x180200, 58, RI_ALL_ONLINE}, + { 0x180340, 4, RI_ALL_ONLINE}, + { 0x180380, 1, RI_E2E3E3B0_ONLINE}, + { 0x180388, 1, RI_E2E3E3B0_ONLINE}, + { 0x180390, 1, RI_E2E3E3B0_ONLINE}, + { 0x180398, 1, RI_E2E3E3B0_ONLINE}, + { 0x1803a0, 5, RI_E2E3E3B0_ONLINE}, + { 0x1803b4, 2, RI_E3E3B0_ONLINE}, +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + { 0x180400, 1, RI_ALL_ONLINE}, +#endif + { 0x180404, 255, RI_E1E1H_OFFLINE}, + { 0x181000, 4, RI_ALL_ONLINE}, + { 0x181010, 1020, RI_ALL_OFFLINE}, + { 0x182000, 4, RI_E3E3B0_ONLINE}, + { 0x1a0000, 1, RI_ALL_ONLINE}, + { 0x1a0004, 5631, RI_ALL_OFFLINE}, + { 0x1a5800, 2560, RI_E1HE2E3E3B0_OFFLINE}, + { 0x1a8000, 1, RI_ALL_ONLINE}, + { 0x1a8004, 8191, RI_E1HE2E3E3B0_OFFLINE}, + { 0x1b0000, 1, RI_ALL_ONLINE}, + { 0x1b0004, 15, RI_E1H_OFFLINE}, + { 0x1b0040, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b0044, 239, RI_E1H_OFFLINE}, + { 0x1b0400, 1, RI_ALL_ONLINE}, + { 0x1b0404, 255, RI_E1H_OFFLINE}, + { 0x1b0800, 1, RI_ALL_ONLINE}, + { 0x1b0840, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b0c00, 1, RI_ALL_ONLINE}, + { 0x1b1000, 1, RI_ALL_ONLINE}, + { 0x1b1040, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b1400, 1, RI_ALL_ONLINE}, + { 0x1b1440, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b1480, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b14c0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b1800, 128, RI_ALL_OFFLINE}, + { 0x1b1c00, 128, RI_ALL_OFFLINE}, + { 0x1b2000, 1, RI_ALL_ONLINE}, + { 0x1b2400, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b2404, 5631, RI_E2E3E3B0_OFFLINE}, + { 0x1b8000, 1, RI_ALL_ONLINE}, + { 0x1b8040, 1, RI_ALL_ONLINE}, + { 0x1b8080, 1, RI_ALL_ONLINE}, + { 0x1b80c0, 1, RI_ALL_ONLINE}, + { 0x1b8100, 1, RI_ALL_ONLINE}, + { 0x1b8140, 1, RI_ALL_ONLINE}, + { 0x1b8180, 1, RI_ALL_ONLINE}, + { 0x1b81c0, 1, RI_ALL_ONLINE}, + { 0x1b8200, 1, RI_ALL_ONLINE}, + { 0x1b8240, 1, RI_ALL_ONLINE}, + { 0x1b8280, 1, RI_ALL_ONLINE}, + { 0x1b82c0, 1, RI_ALL_ONLINE}, + { 0x1b8300, 1, RI_ALL_ONLINE}, + { 0x1b8340, 1, RI_ALL_ONLINE}, + { 0x1b8380, 1, RI_ALL_ONLINE}, + { 0x1b83c0, 1, RI_ALL_ONLINE}, + { 0x1b8400, 1, RI_ALL_ONLINE}, + { 0x1b8440, 1, RI_ALL_ONLINE}, + { 0x1b8480, 1, RI_ALL_ONLINE}, + { 0x1b84c0, 1, RI_ALL_ONLINE}, + { 0x1b8500, 1, RI_ALL_ONLINE}, + { 0x1b8540, 1, RI_ALL_ONLINE}, + { 0x1b8580, 1, RI_ALL_ONLINE}, + { 0x1b85c0, 19, RI_E2E3E3B0_ONLINE}, + { 0x1b8800, 1, RI_ALL_ONLINE}, + { 0x1b8840, 1, RI_ALL_ONLINE}, + { 0x1b8880, 1, RI_ALL_ONLINE}, + { 0x1b88c0, 1, RI_ALL_ONLINE}, + { 0x1b8900, 1, RI_ALL_ONLINE}, + { 0x1b8940, 1, RI_ALL_ONLINE}, + { 0x1b8980, 1, RI_ALL_ONLINE}, + { 0x1b89c0, 1, RI_ALL_ONLINE}, + { 0x1b8a00, 1, RI_ALL_ONLINE}, + { 0x1b8a40, 1, RI_ALL_ONLINE}, + { 0x1b8a80, 1, RI_ALL_ONLINE}, + { 0x1b8ac0, 1, RI_ALL_ONLINE}, + { 0x1b8b00, 1, RI_ALL_ONLINE}, + { 0x1b8b40, 1, RI_ALL_ONLINE}, + { 0x1b8b80, 1, RI_ALL_ONLINE}, + { 0x1b8bc0, 1, RI_ALL_ONLINE}, + { 0x1b8c00, 1, RI_ALL_ONLINE}, + { 0x1b8c40, 1, RI_ALL_ONLINE}, + { 0x1b8c80, 1, RI_ALL_ONLINE}, + { 0x1b8cc0, 1, RI_ALL_ONLINE}, + { 0x1b8cc4, 1, RI_E2E3E3B0_ONLINE}, + { 0x1b8d00, 1, RI_ALL_ONLINE}, + { 0x1b8d40, 1, RI_ALL_ONLINE}, + { 0x1b8d80, 1, RI_ALL_ONLINE}, + { 0x1b8dc0, 1, RI_ALL_ONLINE}, + { 0x1b8e00, 1, RI_ALL_ONLINE}, + { 0x1b8e40, 1, RI_ALL_ONLINE}, + { 0x1b8e80, 1, RI_ALL_ONLINE}, + { 0x1b8e84, 1, RI_E2E3E3B0_ONLINE}, + { 0x1b8ec0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b8f00, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b8f40, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b8f80, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b8fc0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x1b8fc4, 2, RI_E2E3E3B0_ONLINE}, + { 0x1b8fd0, 6, RI_E2E3E3B0_ONLINE}, + { 0x1b8fe8, 2, RI_E3E3B0_ONLINE}, + { 0x1b9000, 1, RI_E2E3E3B0_ONLINE}, + { 0x1b9040, 3, RI_E2E3E3B0_ONLINE}, + { 0x1b905c, 1, RI_E3E3B0_ONLINE}, + { 0x1b9064, 1, RI_E3B0_ONLINE}, + { 0x1b9080, 10, RI_E3B0_ONLINE}, + { 0x1b9400, 14, RI_E2E3E3B0_OFFLINE}, + { 0x1b943c, 19, RI_E2E3E3B0_OFFLINE}, + { 0x1b9490, 10, RI_E2E3E3B0_OFFLINE}, + { 0x1c0000, 2, RI_ALL_ONLINE}, + { 0x200000, 65, RI_ALL_ONLINE}, + { 0x20014c, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x200200, 58, RI_ALL_ONLINE}, + { 0x200340, 4, RI_ALL_ONLINE}, + { 0x200380, 1, RI_E2E3E3B0_ONLINE}, + { 0x200388, 1, RI_E2E3E3B0_ONLINE}, + { 0x200390, 1, RI_E2E3E3B0_ONLINE}, + { 0x200398, 1, RI_E2E3E3B0_ONLINE}, + { 0x2003a0, 1, RI_E2E3E3B0_ONLINE}, + { 0x2003a8, 2, RI_E2E3E3B0_ONLINE}, +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + { 0x200400, 1, RI_ALL_ONLINE}, +#endif + { 0x200404, 255, RI_E1E1H_OFFLINE}, + { 0x202000, 4, RI_ALL_ONLINE}, + { 0x202010, 2044, RI_ALL_OFFLINE}, + { 0x204000, 4, RI_E3E3B0_ONLINE}, + { 0x220000, 1, RI_ALL_ONLINE}, + { 0x220004, 5631, RI_ALL_OFFLINE}, + { 0x225800, 2560, RI_E1HE2E3E3B0_OFFLINE}, + { 0x228000, 1, RI_ALL_ONLINE}, + { 0x228004, 8191, RI_E1HE2E3E3B0_OFFLINE}, + { 0x230000, 1, RI_ALL_ONLINE}, + { 0x230004, 15, RI_E1H_OFFLINE}, + { 0x230040, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x230044, 239, RI_E1H_OFFLINE}, + { 0x230400, 1, RI_ALL_ONLINE}, + { 0x230404, 255, RI_E1H_OFFLINE}, + { 0x230800, 1, RI_ALL_ONLINE}, + { 0x230840, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x230c00, 1, RI_ALL_ONLINE}, + { 0x231000, 1, RI_ALL_ONLINE}, + { 0x231040, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x231400, 1, RI_ALL_ONLINE}, + { 0x231440, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x231480, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2314c0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x231800, 128, RI_ALL_OFFLINE}, + { 0x231c00, 128, RI_ALL_OFFLINE}, + { 0x232000, 1, RI_ALL_ONLINE}, + { 0x232400, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x232404, 5631, RI_E2E3E3B0_OFFLINE}, + { 0x238000, 1, RI_ALL_ONLINE}, + { 0x238040, 1, RI_ALL_ONLINE}, + { 0x238080, 1, RI_ALL_ONLINE}, + { 0x2380c0, 1, RI_ALL_ONLINE}, + { 0x238100, 1, RI_ALL_ONLINE}, + { 0x238140, 1, RI_ALL_ONLINE}, + { 0x238180, 1, RI_ALL_ONLINE}, + { 0x2381c0, 1, RI_ALL_ONLINE}, + { 0x238200, 1, RI_ALL_ONLINE}, + { 0x238240, 1, RI_ALL_ONLINE}, + { 0x238280, 1, RI_ALL_ONLINE}, + { 0x2382c0, 1, RI_ALL_ONLINE}, + { 0x238300, 1, RI_ALL_ONLINE}, + { 0x238340, 1, RI_ALL_ONLINE}, + { 0x238380, 1, RI_ALL_ONLINE}, + { 0x2383c0, 1, RI_ALL_ONLINE}, + { 0x238400, 1, RI_ALL_ONLINE}, + { 0x238440, 1, RI_ALL_ONLINE}, + { 0x238480, 1, RI_ALL_ONLINE}, + { 0x2384c0, 1, RI_ALL_ONLINE}, + { 0x238500, 1, RI_ALL_ONLINE}, + { 0x238540, 1, RI_ALL_ONLINE}, + { 0x238580, 1, RI_ALL_ONLINE}, + { 0x2385c0, 19, RI_E2E3E3B0_ONLINE}, + { 0x238800, 1, RI_ALL_ONLINE}, + { 0x238840, 1, RI_ALL_ONLINE}, + { 0x238880, 1, RI_ALL_ONLINE}, + { 0x2388c0, 1, RI_ALL_ONLINE}, + { 0x238900, 1, RI_ALL_ONLINE}, + { 0x238940, 1, RI_ALL_ONLINE}, + { 0x238980, 1, RI_ALL_ONLINE}, + { 0x2389c0, 1, RI_ALL_ONLINE}, + { 0x238a00, 1, RI_ALL_ONLINE}, + { 0x238a40, 1, RI_ALL_ONLINE}, + { 0x238a80, 1, RI_ALL_ONLINE}, + { 0x238ac0, 1, RI_ALL_ONLINE}, + { 0x238b00, 1, RI_ALL_ONLINE}, + { 0x238b40, 1, RI_ALL_ONLINE}, + { 0x238b80, 1, RI_ALL_ONLINE}, + { 0x238bc0, 1, RI_ALL_ONLINE}, + { 0x238c00, 1, RI_ALL_ONLINE}, + { 0x238c40, 1, RI_ALL_ONLINE}, + { 0x238c80, 1, RI_ALL_ONLINE}, + { 0x238cc0, 1, RI_ALL_ONLINE}, + { 0x238cc4, 1, RI_E2E3E3B0_ONLINE}, + { 0x238d00, 1, RI_ALL_ONLINE}, + { 0x238d40, 1, RI_ALL_ONLINE}, + { 0x238d80, 1, RI_ALL_ONLINE}, + { 0x238dc0, 1, RI_ALL_ONLINE}, + { 0x238e00, 1, RI_ALL_ONLINE}, + { 0x238e40, 1, RI_ALL_ONLINE}, + { 0x238e80, 1, RI_ALL_ONLINE}, + { 0x238e84, 1, RI_E2E3E3B0_ONLINE}, + { 0x238ec0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x238f00, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x238f40, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x238f80, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x238fc0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x238fc4, 2, RI_E2E3E3B0_ONLINE}, + { 0x238fd0, 6, RI_E2E3E3B0_ONLINE}, + { 0x238fe8, 2, RI_E3E3B0_ONLINE}, + { 0x239000, 1, RI_E2E3E3B0_ONLINE}, + { 0x239040, 3, RI_E2E3E3B0_ONLINE}, + { 0x23905c, 1, RI_E3E3B0_ONLINE}, + { 0x239064, 1, RI_E3B0_ONLINE}, + { 0x239080, 10, RI_E3B0_ONLINE}, + { 0x240000, 2, RI_ALL_ONLINE}, + { 0x280000, 65, RI_ALL_ONLINE}, + { 0x28014c, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x280200, 58, RI_ALL_ONLINE}, + { 0x280340, 4, RI_ALL_ONLINE}, + { 0x280380, 1, RI_E2E3E3B0_ONLINE}, + { 0x280388, 1, RI_E2E3E3B0_ONLINE}, + { 0x280390, 1, RI_E2E3E3B0_ONLINE}, + { 0x280398, 1, RI_E2E3E3B0_ONLINE}, + { 0x2803a0, 1, RI_E2E3E3B0_ONLINE}, + { 0x2803a8, 2, RI_E2E3E3B0_ONLINE}, +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + { 0x280400, 1, RI_ALL_ONLINE}, +#endif + { 0x280404, 255, RI_E1E1H_OFFLINE}, + { 0x282000, 4, RI_ALL_ONLINE}, + { 0x282010, 2044, RI_ALL_OFFLINE}, + { 0x284000, 4, RI_E3E3B0_ONLINE}, + { 0x2a0000, 1, RI_ALL_ONLINE}, + { 0x2a0004, 5631, RI_ALL_OFFLINE}, + { 0x2a5800, 2560, RI_E1HE2E3E3B0_OFFLINE}, + { 0x2a8000, 1, RI_ALL_ONLINE}, + { 0x2a8004, 8191, RI_E1HE2E3E3B0_OFFLINE}, + { 0x2b0000, 1, RI_ALL_ONLINE}, + { 0x2b0004, 15, RI_E1H_OFFLINE}, + { 0x2b0040, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b0044, 239, RI_E1H_OFFLINE}, + { 0x2b0400, 1, RI_ALL_ONLINE}, + { 0x2b0404, 255, RI_E1H_OFFLINE}, + { 0x2b0800, 1, RI_ALL_ONLINE}, + { 0x2b0840, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b0c00, 1, RI_ALL_ONLINE}, + { 0x2b1000, 1, RI_ALL_ONLINE}, + { 0x2b1040, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b1400, 1, RI_ALL_ONLINE}, + { 0x2b1440, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b1480, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b14c0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b1800, 128, RI_ALL_OFFLINE}, + { 0x2b1c00, 128, RI_ALL_OFFLINE}, + { 0x2b2000, 1, RI_ALL_ONLINE}, + { 0x2b2400, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b2404, 5631, RI_E2E3E3B0_OFFLINE}, + { 0x2b8000, 1, RI_ALL_ONLINE}, + { 0x2b8040, 1, RI_ALL_ONLINE}, + { 0x2b8080, 1, RI_ALL_ONLINE}, + { 0x2b80c0, 1, RI_ALL_ONLINE}, + { 0x2b8100, 1, RI_ALL_ONLINE}, + { 0x2b8140, 1, RI_ALL_ONLINE}, + { 0x2b8180, 1, RI_ALL_ONLINE}, + { 0x2b81c0, 1, RI_ALL_ONLINE}, + { 0x2b8200, 1, RI_ALL_ONLINE}, + { 0x2b8240, 1, RI_ALL_ONLINE}, + { 0x2b8280, 1, RI_ALL_ONLINE}, + { 0x2b82c0, 1, RI_ALL_ONLINE}, + { 0x2b8300, 1, RI_ALL_ONLINE}, + { 0x2b8340, 1, RI_ALL_ONLINE}, + { 0x2b8380, 1, RI_ALL_ONLINE}, + { 0x2b83c0, 1, RI_ALL_ONLINE}, + { 0x2b8400, 1, RI_ALL_ONLINE}, + { 0x2b8440, 1, RI_ALL_ONLINE}, + { 0x2b8480, 1, RI_ALL_ONLINE}, + { 0x2b84c0, 1, RI_ALL_ONLINE}, + { 0x2b8500, 1, RI_ALL_ONLINE}, + { 0x2b8540, 1, RI_ALL_ONLINE}, + { 0x2b8580, 1, RI_ALL_ONLINE}, + { 0x2b85c0, 19, RI_E2E3E3B0_ONLINE}, + { 0x2b8800, 1, RI_ALL_ONLINE}, + { 0x2b8840, 1, RI_ALL_ONLINE}, + { 0x2b8880, 1, RI_ALL_ONLINE}, + { 0x2b88c0, 1, RI_ALL_ONLINE}, + { 0x2b8900, 1, RI_ALL_ONLINE}, + { 0x2b8940, 1, RI_ALL_ONLINE}, + { 0x2b8980, 1, RI_ALL_ONLINE}, + { 0x2b89c0, 1, RI_ALL_ONLINE}, + { 0x2b8a00, 1, RI_ALL_ONLINE}, + { 0x2b8a40, 1, RI_ALL_ONLINE}, + { 0x2b8a80, 1, RI_ALL_ONLINE}, + { 0x2b8ac0, 1, RI_ALL_ONLINE}, + { 0x2b8b00, 1, RI_ALL_ONLINE}, + { 0x2b8b40, 1, RI_ALL_ONLINE}, + { 0x2b8b80, 1, RI_ALL_ONLINE}, + { 0x2b8bc0, 1, RI_ALL_ONLINE}, + { 0x2b8c00, 1, RI_ALL_ONLINE}, + { 0x2b8c40, 1, RI_ALL_ONLINE}, + { 0x2b8c80, 1, RI_ALL_ONLINE}, + { 0x2b8cc0, 1, RI_ALL_ONLINE}, + { 0x2b8cc4, 1, RI_E2E3E3B0_ONLINE}, + { 0x2b8d00, 1, RI_ALL_ONLINE}, + { 0x2b8d40, 1, RI_ALL_ONLINE}, + { 0x2b8d80, 1, RI_ALL_ONLINE}, + { 0x2b8dc0, 1, RI_ALL_ONLINE}, + { 0x2b8e00, 1, RI_ALL_ONLINE}, + { 0x2b8e40, 1, RI_ALL_ONLINE}, + { 0x2b8e80, 1, RI_ALL_ONLINE}, + { 0x2b8e84, 1, RI_E2E3E3B0_ONLINE}, + { 0x2b8ec0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b8f00, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b8f40, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b8f80, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b8fc0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x2b8fc4, 2, RI_E2E3E3B0_ONLINE}, + { 0x2b8fd0, 6, RI_E2E3E3B0_ONLINE}, + { 0x2b8fe8, 2, RI_E3E3B0_ONLINE}, + { 0x2b9000, 1, RI_E2E3E3B0_ONLINE}, + { 0x2b9040, 3, RI_E2E3E3B0_ONLINE}, + { 0x2b905c, 1, RI_E3E3B0_ONLINE}, + { 0x2b9064, 1, RI_E3B0_ONLINE}, + { 0x2b9080, 10, RI_E3B0_ONLINE}, + { 0x2b9400, 14, RI_E2E3E3B0_ONLINE}, + { 0x2b943c, 19, RI_E2E3E3B0_ONLINE}, + { 0x2b9490, 10, RI_E2E3E3B0_ONLINE}, + { 0x2c0000, 2, RI_ALL_ONLINE}, + { 0x300000, 65, RI_ALL_ONLINE}, + { 0x30014c, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x300200, 58, RI_ALL_ONLINE}, + { 0x300340, 4, RI_ALL_ONLINE}, + { 0x300380, 1, RI_E2E3E3B0_ONLINE}, + { 0x300388, 1, RI_E2E3E3B0_ONLINE}, + { 0x300390, 1, RI_E2E3E3B0_ONLINE}, + { 0x300398, 1, RI_E2E3E3B0_ONLINE}, + { 0x3003a0, 1, RI_E2E3E3B0_ONLINE}, + { 0x3003a8, 2, RI_E2E3E3B0_ONLINE}, +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + { 0x300400, 1, RI_ALL_ONLINE}, +#endif + { 0x300404, 255, RI_E1E1H_OFFLINE}, + { 0x302000, 4, RI_ALL_ONLINE}, + { 0x302010, 2044, RI_ALL_OFFLINE}, + { 0x304000, 4, RI_E3E3B0_ONLINE}, + { 0x320000, 1, RI_ALL_ONLINE}, + { 0x320004, 5631, RI_ALL_OFFLINE}, + { 0x325800, 2560, RI_E1HE2E3E3B0_OFFLINE}, + { 0x328000, 1, RI_ALL_ONLINE}, + { 0x328004, 8191, RI_E1HE2E3E3B0_OFFLINE}, + { 0x330000, 1, RI_ALL_ONLINE}, + { 0x330004, 15, RI_E1H_OFFLINE}, + { 0x330040, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x330044, 239, RI_E1H_OFFLINE}, + { 0x330400, 1, RI_ALL_ONLINE}, + { 0x330404, 255, RI_E1H_OFFLINE}, + { 0x330800, 1, RI_ALL_ONLINE}, + { 0x330840, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x330c00, 1, RI_ALL_ONLINE}, + { 0x331000, 1, RI_ALL_ONLINE}, + { 0x331040, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x331400, 1, RI_ALL_ONLINE}, + { 0x331440, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x331480, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x3314c0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x331800, 128, RI_ALL_OFFLINE}, + { 0x331c00, 128, RI_ALL_OFFLINE}, + { 0x332000, 1, RI_ALL_ONLINE}, + { 0x332400, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x332404, 5631, RI_E2E3E3B0_OFFLINE}, + { 0x338000, 1, RI_ALL_ONLINE}, + { 0x338040, 1, RI_ALL_ONLINE}, + { 0x338080, 1, RI_ALL_ONLINE}, + { 0x3380c0, 1, RI_ALL_ONLINE}, + { 0x338100, 1, RI_ALL_ONLINE}, + { 0x338140, 1, RI_ALL_ONLINE}, + { 0x338180, 1, RI_ALL_ONLINE}, + { 0x3381c0, 1, RI_ALL_ONLINE}, + { 0x338200, 1, RI_ALL_ONLINE}, + { 0x338240, 1, RI_ALL_ONLINE}, + { 0x338280, 1, RI_ALL_ONLINE}, + { 0x3382c0, 1, RI_ALL_ONLINE}, + { 0x338300, 1, RI_ALL_ONLINE}, + { 0x338340, 1, RI_ALL_ONLINE}, + { 0x338380, 1, RI_ALL_ONLINE}, + { 0x3383c0, 1, RI_ALL_ONLINE}, + { 0x338400, 1, RI_ALL_ONLINE}, + { 0x338440, 1, RI_ALL_ONLINE}, + { 0x338480, 1, RI_ALL_ONLINE}, + { 0x3384c0, 1, RI_ALL_ONLINE}, + { 0x338500, 1, RI_ALL_ONLINE}, + { 0x338540, 1, RI_ALL_ONLINE}, + { 0x338580, 1, RI_ALL_ONLINE}, + { 0x3385c0, 19, RI_E2E3E3B0_ONLINE}, + { 0x338800, 1, RI_ALL_ONLINE}, + { 0x338840, 1, RI_ALL_ONLINE}, + { 0x338880, 1, RI_ALL_ONLINE}, + { 0x3388c0, 1, RI_ALL_ONLINE}, + { 0x338900, 1, RI_ALL_ONLINE}, + { 0x338940, 1, RI_ALL_ONLINE}, + { 0x338980, 1, RI_ALL_ONLINE}, + { 0x3389c0, 1, RI_ALL_ONLINE}, + { 0x338a00, 1, RI_ALL_ONLINE}, + { 0x338a40, 1, RI_ALL_ONLINE}, + { 0x338a80, 1, RI_ALL_ONLINE}, + { 0x338ac0, 1, RI_ALL_ONLINE}, + { 0x338b00, 1, RI_ALL_ONLINE}, + { 0x338b40, 1, RI_ALL_ONLINE}, + { 0x338b80, 1, RI_ALL_ONLINE}, + { 0x338bc0, 1, RI_ALL_ONLINE}, + { 0x338c00, 1, RI_ALL_ONLINE}, + { 0x338c40, 1, RI_ALL_ONLINE}, + { 0x338c80, 1, RI_ALL_ONLINE}, + { 0x338cc0, 1, RI_ALL_ONLINE}, + { 0x338cc4, 1, RI_E2E3E3B0_ONLINE}, + { 0x338d00, 1, RI_ALL_ONLINE}, + { 0x338d40, 1, RI_ALL_ONLINE}, + { 0x338d80, 1, RI_ALL_ONLINE}, + { 0x338dc0, 1, RI_ALL_ONLINE}, + { 0x338e00, 1, RI_ALL_ONLINE}, + { 0x338e40, 1, RI_ALL_ONLINE}, + { 0x338e80, 1, RI_ALL_ONLINE}, + { 0x338e84, 1, RI_E2E3E3B0_ONLINE}, + { 0x338ec0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x338f00, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x338f40, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x338f80, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x338fc0, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x338fc4, 2, RI_E2E3E3B0_ONLINE}, + { 0x338fd0, 6, RI_E2E3E3B0_ONLINE}, + { 0x338fe8, 2, RI_E3E3B0_ONLINE}, + { 0x339000, 1, RI_E2E3E3B0_ONLINE}, + { 0x339040, 3, RI_E2E3E3B0_ONLINE}, + { 0x33905c, 1, RI_E3E3B0_ONLINE}, + { 0x339064, 1, RI_E3B0_ONLINE}, + { 0x339080, 10, RI_E3B0_ONLINE}, + { 0x340000, 2, RI_ALL_ONLINE}, + { 0x3a0000, 32768, RI_E2E3E3B0_OFFLINE}, + { 0x3c0000, 8192, RI_E2E3E3B0_OFFLINE} +}; +#define REGS_COUNT ARRSIZE(reg_addrs) + +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + +static const struct reg_addr idle_addrs[] = { + { 0x2104, 1, RI_ALL_ONLINE}, + { 0x2110, 2, RI_ALL_ONLINE}, + { 0x211c, 8, RI_ALL_ONLINE}, + { 0x2814, 1, RI_ALL_ONLINE}, + { 0x281c, 2, RI_ALL_ONLINE}, + { 0x2854, 1, RI_ALL_ONLINE}, + { 0x285c, 1, RI_ALL_ONLINE}, + { 0x3040, 1, RI_ALL_ONLINE}, + { 0x9010, 7, RI_E2E3E3B0_ONLINE}, + { 0x9030, 1, RI_E2E3E3B0_ONLINE}, + { 0x9068, 16, RI_E2E3E3B0_ONLINE}, + { 0x9230, 2, RI_E2E3E3B0_ONLINE}, + { 0x9244, 1, RI_E2E3E3B0_ONLINE}, + { 0x9298, 1, RI_E2E3E3B0_ONLINE}, + { 0x92a8, 1, RI_E2E3E3B0_ONLINE}, + { 0xa38c, 1, RI_ALL_ONLINE}, + { 0xa3c4, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa404, 3, RI_ALL_ONLINE}, + { 0xa42c, 12, RI_ALL_ONLINE}, + { 0xa580, 1, RI_ALL_ONLINE}, + { 0xa590, 1, RI_ALL_ONLINE}, + { 0xa600, 5, RI_E1HE2E3E3B0_ONLINE}, + { 0xa618, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0xa714, 1, RI_E2E3E3B0_ONLINE}, + { 0xa720, 1, RI_E2E3E3B0_ONLINE}, + { 0xa750, 1, RI_E2E3E3B0_ONLINE}, + { 0xc09c, 1, RI_E1E1H_ONLINE}, + { 0x103b0, 1, RI_ALL_ONLINE}, + { 0x103c0, 1, RI_ALL_ONLINE}, + { 0x103d0, 1, RI_E1H_ONLINE}, + { 0x10418, 1, RI_ALL_ONLINE}, + { 0x10420, 1, RI_ALL_ONLINE}, + { 0x10428, 1, RI_ALL_ONLINE}, + { 0x10460, 1, RI_ALL_ONLINE}, + { 0x10474, 1, RI_ALL_ONLINE}, + { 0x104e0, 1, RI_ALL_ONLINE}, + { 0x104ec, 1, RI_ALL_ONLINE}, + { 0x104f8, 1, RI_ALL_ONLINE}, + { 0x10508, 1, RI_ALL_ONLINE}, + { 0x10530, 1, RI_ALL_ONLINE}, + { 0x10538, 1, RI_ALL_ONLINE}, + { 0x10548, 1, RI_ALL_ONLINE}, + { 0x10558, 1, RI_ALL_ONLINE}, + { 0x182a8, 1, RI_E2E3E3B0_ONLINE}, + { 0x182b8, 1, RI_E2E3E3B0_ONLINE}, + { 0x18308, 1, RI_E2E3E3B0_ONLINE}, + { 0x18318, 1, RI_E2E3E3B0_ONLINE}, + { 0x18338, 1, RI_E2E3E3B0_ONLINE}, + { 0x18348, 1, RI_E2E3E3B0_ONLINE}, + { 0x183bc, 1, RI_E2E3E3B0_ONLINE}, + { 0x183cc, 1, RI_E2E3E3B0_ONLINE}, + { 0x18570, 1, RI_E3E3B0_ONLINE}, + { 0x18578, 1, RI_E3E3B0_ONLINE}, + { 0x1858c, 1, RI_E3E3B0_ONLINE}, + { 0x18594, 1, RI_E3E3B0_ONLINE}, + { 0x1862c, 4, RI_E3B0_ONLINE}, + { 0x2021c, 11, RI_ALL_ONLINE}, + { 0x202a8, 1, RI_ALL_ONLINE}, + { 0x202b8, 1, RI_ALL_ONLINE}, + { 0x20404, 1, RI_ALL_ONLINE}, + { 0x2040c, 2, RI_ALL_ONLINE}, + { 0x2041c, 2, RI_ALL_ONLINE}, + { 0x40154, 14, RI_ALL_ONLINE}, + { 0x40198, 1, RI_ALL_ONLINE}, + { 0x404ac, 1, RI_ALL_ONLINE}, + { 0x404bc, 1, RI_ALL_ONLINE}, + { 0x42290, 1, RI_ALL_ONLINE}, + { 0x422a0, 1, RI_ALL_ONLINE}, + { 0x422b0, 1, RI_ALL_ONLINE}, + { 0x42548, 1, RI_ALL_ONLINE}, + { 0x42550, 1, RI_ALL_ONLINE}, + { 0x42558, 1, RI_ALL_ONLINE}, + { 0x50160, 8, RI_ALL_ONLINE}, + { 0x501d0, 1, RI_ALL_ONLINE}, + { 0x501e0, 1, RI_ALL_ONLINE}, + { 0x50204, 1, RI_ALL_ONLINE}, + { 0x5020c, 2, RI_ALL_ONLINE}, + { 0x5021c, 1, RI_ALL_ONLINE}, + { 0x60090, 1, RI_ALL_ONLINE}, + { 0x6011c, 1, RI_ALL_ONLINE}, + { 0x6012c, 1, RI_ALL_ONLINE}, + { 0xc101c, 1, RI_ALL_ONLINE}, + { 0xc102c, 1, RI_ALL_ONLINE}, + { 0xc2290, 1, RI_ALL_ONLINE}, + { 0xc22a0, 1, RI_ALL_ONLINE}, + { 0xc22b0, 1, RI_ALL_ONLINE}, + { 0xc2548, 1, RI_ALL_ONLINE}, + { 0xc2550, 1, RI_ALL_ONLINE}, + { 0xc2558, 1, RI_ALL_ONLINE}, + { 0xc4294, 1, RI_ALL_ONLINE}, + { 0xc42a4, 1, RI_ALL_ONLINE}, + { 0xc42b4, 1, RI_ALL_ONLINE}, + { 0xc4550, 1, RI_ALL_ONLINE}, + { 0xc4558, 1, RI_ALL_ONLINE}, + { 0xc4560, 1, RI_ALL_ONLINE}, + { 0xd016c, 8, RI_ALL_ONLINE}, + { 0xd01d8, 1, RI_ALL_ONLINE}, + { 0xd01e8, 1, RI_ALL_ONLINE}, + { 0xd0204, 1, RI_ALL_ONLINE}, + { 0xd020c, 3, RI_ALL_ONLINE}, + { 0xe0154, 8, RI_ALL_ONLINE}, + { 0xe01c8, 1, RI_ALL_ONLINE}, + { 0xe01d8, 1, RI_ALL_ONLINE}, + { 0xe0204, 1, RI_ALL_ONLINE}, + { 0xe020c, 2, RI_ALL_ONLINE}, + { 0xe021c, 2, RI_ALL_ONLINE}, + { 0x101014, 1, RI_ALL_ONLINE}, + { 0x101030, 1, RI_ALL_ONLINE}, + { 0x101040, 1, RI_ALL_ONLINE}, + { 0x102058, 1, RI_ALL_ONLINE}, + { 0x102080, 16, RI_ALL_ONLINE}, + { 0x103004, 2, RI_ALL_ONLINE}, + { 0x103068, 1, RI_ALL_ONLINE}, + { 0x103078, 1, RI_ALL_ONLINE}, + { 0x103088, 1, RI_ALL_ONLINE}, + { 0x10309c, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x1030b8, 2, RI_E2E3E3B0_ONLINE}, + { 0x1030cc, 1, RI_E2E3E3B0_ONLINE}, + { 0x1030e0, 1, RI_E2E3E3B0_ONLINE}, + { 0x104004, 1, RI_ALL_ONLINE}, + { 0x104018, 1, RI_ALL_ONLINE}, + { 0x104020, 1, RI_ALL_ONLINE}, + { 0x10403c, 1, RI_ALL_ONLINE}, + { 0x1040fc, 1, RI_ALL_ONLINE}, + { 0x10410c, 1, RI_ALL_ONLINE}, + { 0x104400, 64, RI_ALL_ONLINE}, + { 0x104800, 64, RI_ALL_ONLINE}, + { 0x105000, 256, RI_ALL_ONLINE}, + { 0x108094, 1, RI_E1E1H_ONLINE}, + { 0x1201b0, 2, RI_ALL_ONLINE}, + { 0x12032c, 1, RI_ALL_ONLINE}, + { 0x12036c, 3, RI_ALL_ONLINE}, + { 0x120408, 2, RI_ALL_ONLINE}, + { 0x120414, 15, RI_ALL_ONLINE}, + { 0x120478, 2, RI_ALL_ONLINE}, + { 0x12052c, 1, RI_ALL_ONLINE}, + { 0x120564, 3, RI_ALL_ONLINE}, + { 0x12057c, 1, RI_ALL_ONLINE}, + { 0x12058c, 1, RI_ALL_ONLINE}, + { 0x120608, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x120778, 2, RI_E2E3E3B0_ONLINE}, + { 0x120808, 3, RI_ALL_ONLINE}, + { 0x120818, 1, RI_ALL_ONLINE}, + { 0x120820, 1, RI_ALL_ONLINE}, + { 0x120828, 1, RI_ALL_ONLINE}, + { 0x120830, 1, RI_ALL_ONLINE}, + { 0x120838, 1, RI_ALL_ONLINE}, + { 0x120840, 1, RI_ALL_ONLINE}, + { 0x120848, 1, RI_ALL_ONLINE}, + { 0x120850, 1, RI_ALL_ONLINE}, + { 0x120858, 1, RI_ALL_ONLINE}, + { 0x120860, 1, RI_ALL_ONLINE}, + { 0x120868, 1, RI_ALL_ONLINE}, + { 0x120870, 1, RI_ALL_ONLINE}, + { 0x120878, 1, RI_ALL_ONLINE}, + { 0x120880, 1, RI_ALL_ONLINE}, + { 0x120888, 1, RI_ALL_ONLINE}, + { 0x120890, 1, RI_ALL_ONLINE}, + { 0x120898, 1, RI_ALL_ONLINE}, + { 0x1208a0, 1, RI_ALL_ONLINE}, + { 0x1208a8, 1, RI_ALL_ONLINE}, + { 0x1208b0, 1, RI_ALL_ONLINE}, + { 0x1208b8, 1, RI_ALL_ONLINE}, + { 0x1208c0, 1, RI_ALL_ONLINE}, + { 0x1208c8, 1, RI_ALL_ONLINE}, + { 0x1208d0, 1, RI_ALL_ONLINE}, + { 0x1208d8, 1, RI_ALL_ONLINE}, + { 0x1208e0, 1, RI_ALL_ONLINE}, + { 0x1208e8, 1, RI_ALL_ONLINE}, + { 0x1208f0, 1, RI_ALL_ONLINE}, + { 0x1208f8, 1, RI_ALL_ONLINE}, + { 0x120900, 1, RI_ALL_ONLINE}, + { 0x120908, 1, RI_ALL_ONLINE}, + { 0x130030, 1, RI_E2E3E3B0_ONLINE}, + { 0x13004c, 3, RI_E2E3E3B0_ONLINE}, + { 0x130064, 2, RI_E2E3E3B0_ONLINE}, + { 0x13009c, 1, RI_E2E3E3B0_ONLINE}, + { 0x130130, 1, RI_E2E3E3B0_ONLINE}, + { 0x13016c, 1, RI_E2E3E3B0_ONLINE}, + { 0x130300, 1, RI_E2E3E3B0_ONLINE}, + { 0x130480, 1, RI_E2E3E3B0_ONLINE}, + { 0x14005c, 2, RI_E1E1HE2E3_ONLINE}, + { 0x1400d0, 2, RI_E1E1HE2E3_ONLINE}, + { 0x1400e0, 1, RI_E1E1HE2E3_ONLINE}, + { 0x1401c8, 1, RI_E1E1HE2E3_ONLINE}, + { 0x140200, 6, RI_E1E1HE2E3_ONLINE}, + { 0x140338, 7, RI_E3B0_ONLINE}, + { 0x140370, 7, RI_E3B0_ONLINE}, + { 0x15c1bc, 6, RI_E3B0_ONLINE}, + { 0x15c230, 7, RI_E3B0_ONLINE}, + { 0x16101c, 1, RI_ALL_ONLINE}, + { 0x16102c, 1, RI_ALL_ONLINE}, + { 0x164014, 2, RI_ALL_ONLINE}, + { 0x1640f0, 1, RI_ALL_ONLINE}, + { 0x166290, 1, RI_ALL_ONLINE}, + { 0x1662a0, 1, RI_ALL_ONLINE}, + { 0x1662b0, 1, RI_ALL_ONLINE}, + { 0x166548, 1, RI_ALL_ONLINE}, + { 0x166550, 1, RI_ALL_ONLINE}, + { 0x166558, 1, RI_ALL_ONLINE}, + { 0x168000, 1, RI_ALL_ONLINE}, + { 0x168008, 1, RI_ALL_ONLINE}, + { 0x168010, 1, RI_ALL_ONLINE}, + { 0x168018, 1, RI_ALL_ONLINE}, + { 0x168028, 2, RI_ALL_ONLINE}, + { 0x168058, 9, RI_ALL_ONLINE}, + { 0x168238, 1, RI_ALL_ONLINE}, + { 0x1682d0, 7, RI_ALL_ONLINE}, + { 0x168300, 2, RI_E1E1H_ONLINE}, + { 0x168308, 65, RI_ALL_ONLINE}, + { 0x168410, 2, RI_ALL_ONLINE}, + { 0x168438, 1, RI_ALL_ONLINE}, + { 0x168448, 1, RI_ALL_ONLINE}, + { 0x168a00, 128, RI_ALL_ONLINE}, + { 0x16e200, 128, RI_E1H_ONLINE}, + { 0x16e404, 2, RI_E1H_ONLINE}, + { 0x16e584, 64, RI_E1H_ONLINE}, + { 0x16e684, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x16e68c, 4, RI_E1H_ONLINE}, + { 0x16e6fc, 4, RI_E2E3E3B0_ONLINE}, + { 0x16e7ac, 12, RI_E3B0_ONLINE}, + { 0x1700a4, 1, RI_ALL_ONLINE}, + { 0x1700ac, 2, RI_ALL_ONLINE}, + { 0x1700c0, 1, RI_ALL_ONLINE}, + { 0x170174, 1, RI_ALL_ONLINE}, + { 0x170184, 1, RI_ALL_ONLINE}, + { 0x1800f4, 1, RI_ALL_ONLINE}, + { 0x180104, 1, RI_ALL_ONLINE}, + { 0x180114, 1, RI_ALL_ONLINE}, + { 0x180124, 1, RI_ALL_ONLINE}, + { 0x18026c, 1, RI_ALL_ONLINE}, + { 0x1802a0, 1, RI_ALL_ONLINE}, + { 0x1b8000, 1, RI_ALL_ONLINE}, + { 0x1b8040, 1, RI_ALL_ONLINE}, + { 0x1b8080, 1, RI_ALL_ONLINE}, + { 0x1b80c0, 1, RI_ALL_ONLINE}, + { 0x200104, 1, RI_ALL_ONLINE}, + { 0x200114, 1, RI_ALL_ONLINE}, + { 0x200124, 1, RI_ALL_ONLINE}, + { 0x200134, 1, RI_ALL_ONLINE}, + { 0x20026c, 1, RI_ALL_ONLINE}, + { 0x2002a0, 1, RI_ALL_ONLINE}, + { 0x238000, 1, RI_ALL_ONLINE}, + { 0x238040, 1, RI_ALL_ONLINE}, + { 0x238080, 1, RI_ALL_ONLINE}, + { 0x2380c0, 1, RI_ALL_ONLINE}, + { 0x280104, 1, RI_ALL_ONLINE}, + { 0x280114, 1, RI_ALL_ONLINE}, + { 0x280124, 1, RI_ALL_ONLINE}, + { 0x280134, 1, RI_ALL_ONLINE}, + { 0x28026c, 1, RI_ALL_ONLINE}, + { 0x2802a0, 1, RI_ALL_ONLINE}, + { 0x2b8000, 1, RI_ALL_ONLINE}, + { 0x2b8040, 1, RI_ALL_ONLINE}, + { 0x2b8080, 1, RI_ALL_ONLINE}, + { 0x300104, 1, RI_ALL_ONLINE}, + { 0x300114, 1, RI_ALL_ONLINE}, + { 0x300124, 1, RI_ALL_ONLINE}, + { 0x300134, 1, RI_ALL_ONLINE}, + { 0x30026c, 1, RI_ALL_ONLINE}, + { 0x3002a0, 1, RI_ALL_ONLINE}, + { 0x338000, 1, RI_ALL_ONLINE}, + { 0x338040, 1, RI_ALL_ONLINE}, + { 0x338080, 1, RI_ALL_ONLINE}, + { 0x3380c0, 1, RI_ALL_ONLINE} +}; + +#define IDLE_REGS_COUNT ARRSIZE(idle_addrs) + + + +static const struct reg_addr split_reg_addrs[] = { + { 0x2000, 341, RI_ALL_ONLINE}, + { 0x2800, 103, RI_ALL_ONLINE}, + { 0x3000, 287, RI_ALL_ONLINE}, + { 0x3800, 331, RI_ALL_ONLINE}, + { 0x942c, 4, RI_E2E3E3B0_ONLINE}, + { 0x9454, 1, RI_E2E3E3B0_ONLINE}, + { 0xa270, 2, RI_ALL_ONLINE}, + { 0xa408, 2, RI_ALL_ONLINE}, + { 0xa580, 1, RI_ALL_ONLINE}, + { 0xa590, 1, RI_ALL_ONLINE}, + { 0xa78c, 1, RI_E2E3E3B0_ONLINE}, + { 0xa858, 4, RI_E2E3E3B0_ONLINE}, + { 0x10138, 34, RI_ALL_ONLINE}, + { 0x10880, 2, RI_ALL_ONLINE}, + { 0x10900, 2, RI_ALL_ONLINE}, + { 0x160fc, 4, RI_E1HE2E3E3B0_ONLINE}, + { 0x16140, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x16160, 1, RI_E1HE2E3E3B0_ONLINE}, + { 0x16180, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x161c0, 2, RI_E1HE2E3E3B0_ONLINE}, + { 0x180c8, 1, RI_E2E3E3B0_ONLINE}, + { 0x18154, 1, RI_E2E3E3B0_ONLINE}, + { 0x18440, 1, RI_E2E3E3B0_ONLINE}, + { 0x18460, 1, RI_E2E3E3B0_ONLINE}, + { 0x18480, 2, RI_E2E3E3B0_ONLINE}, + { 0x184c0, 2, RI_E2E3E3B0_ONLINE}, + { 0x1866c, 4, RI_E3B0_ONLINE}, + { 0x18a08, 4, RI_E3B0_ONLINE}, + { 0x18a70, 20, RI_E3B0_ONLINE}, + { 0x20100, 4, RI_ALL_ONLINE}, + { 0x20118, 2, RI_ALL_ONLINE}, + { 0x201c4, 12, RI_ALL_ONLINE}, + { 0x40138, 1, RI_ALL_ONLINE}, + { 0x40400, 2, RI_ALL_ONLINE}, + { 0x40484, 4, RI_ALL_ONLINE}, + { 0x404e0, 1, RI_E2E3E3B0_ONLINE}, + { 0x40500, 2, RI_ALL_ONLINE}, + { 0x40510, 2, RI_ALL_ONLINE}, + { 0x40520, 2, RI_ALL_ONLINE}, + { 0x40530, 2, RI_ALL_ONLINE}, + { 0x40540, 2, RI_ALL_ONLINE}, + { 0x50000, 1, RI_ALL_ONLINE}, + { 0x500e0, 8, RI_ALL_ONLINE}, + { 0xd0114, 14, RI_ALL_ONLINE}, + { 0xe0110, 8, RI_ALL_ONLINE}, + { 0x10411c, 4, RI_E2E3E3B0_ONLINE}, + { 0x104138, 1, RI_E2E3E3B0_ONLINE}, + { 0x108018, 4, RI_E1E1H_ONLINE}, + { 0x108038, 6, RI_E1E1H_ONLINE}, + { 0x108058, 11, RI_E1E1H_ONLINE}, + { 0x1080ac, 2, RI_E1H_ONLINE}, + { 0x108100, 5, RI_E1E1H_ONLINE}, + { 0x108120, 5, RI_E1E1H_ONLINE}, + { 0x108200, 74, RI_E1E1H_ONLINE}, + { 0x108400, 74, RI_E1E1H_ONLINE}, + { 0x108800, 152, RI_E1E1H_ONLINE}, + { 0x120534, 4, RI_ALL_ONLINE}, + { 0x120544, 4, RI_E1E1H_ONLINE}, + { 0x12061c, 20, RI_E1HE2E3E3B0_ONLINE}, + { 0x1207d8, 1, RI_E2E3E3B0_ONLINE}, + { 0x130104, 4, RI_E2E3E3B0_ONLINE}, + { 0x13011c, 5, RI_E2E3E3B0_ONLINE}, + { 0x130134, 9, RI_E2E3E3B0_ONLINE}, + { 0x13015c, 4, RI_E2E3E3B0_ONLINE}, + { 0x130170, 1, RI_E2E3E3B0_ONLINE}, + { 0x130180, 1, RI_E2E3E3B0_ONLINE}, + { 0x1402e8, 2, RI_E2E3E3B0_ONLINE}, + { 0x164014, 2, RI_ALL_ONLINE}, + { 0x1640d0, 2, RI_ALL_ONLINE}, + { 0x164128, 2, RI_E2E3E3B0_ONLINE}, + { 0x16e70c, 1, RI_E2E3E3B0_ONLINE}, + { 0x170198, 5, RI_E2E3E3B0_ONLINE}, + { 0x1701b8, 2, RI_E2E3E3B0_ONLINE}, + { 0x1701d0, 1, RI_E2E3E3B0_ONLINE}, + { 0x1701e4, 1, RI_E2E3E3B0_ONLINE}, + { 0x1701ec, 1, RI_E2E3E3B0_ONLINE}, + { 0x1701f4, 1, RI_E2E3E3B0_ONLINE}, + { 0x170320, 3, RI_E2E3E3B0_ONLINE}, + { 0x170330, 2, RI_E2E3E3B0_ONLINE}, + { 0x170340, 1, RI_E2E3E3B0_ONLINE} +}; + + +#define SPLIT_REGS_COUNT ARRSIZE(split_reg_addrs) + + + +static const u32 read_reg_e1_0[] = { 0x1b1000}; + + +static const struct wreg_addr wreg_addrs_e1[] = { + { 0x1b0c00, 192, 1, read_reg_e1_0, RI_E1_OFFLINE} +}; +#define WREGS_COUNT_E1 ARRSIZE(wreg_addrs_e1) + + +static const u32 read_reg_e1h_0[] = { 0x1b1040, 0x1b1000}; + + +static const struct wreg_addr wreg_addrs_e1h[] = { + { 0x1b0c00, 256, 2, read_reg_e1h_0, RI_E1H_OFFLINE} +}; + +#define WREGS_COUNT_E1H ARRSIZE(wreg_addrs_e1h) + + +static const u32 read_reg_e2_0[] = { 0x1b1040, 0x1b1000}; + + +static const struct wreg_addr wreg_addrs_e2[] = { + { 0x1b0c00, 128, 2, read_reg_e2_0, RI_E2_OFFLINE} +}; + +#define WREGS_COUNT_E2 ARRSIZE(wreg_addrs_e2) + + + +static const u32 read_reg_e3_0[] = { 0x1b1040, 0x1b1000}; + + +static const struct wreg_addr wreg_addrs_e3[] = { + { 0x1b0c00, 128, 2, read_reg_e3_0, RI_E3_OFFLINE} +}; + +#define WREGS_COUNT_E3 ARRSIZE(wreg_addrs_e3) + +static const u32 read_reg_e3b0_0[] = { 0x1b1040, 0x1b1000}; + + +static const struct wreg_addr wreg_addrs_e3b0[] = { + { 0x1b0c00, 128, 2, read_reg_e3b0_0, RI_E3B0_OFFLINE} +}; + +#define WREGS_COUNT_E3B0 ARRSIZE(wreg_addrs_e3b0) + +#endif +/* The struct hold a signature to ensure the dump returned from the driver + match the meta data file inserted to grc_dump.tcl + The signature is time stamp,diag version and grc_dump version*/ + +static const struct hd_param hd_param_all = {0x4f0ae30c, 0x70038, 0x3a}; + +#ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */ + + + + +static const u32 timer_status_regs_e1[] = { 0x164014, 0x164018}; +static const u32 timer_scan_regs_e1[] = { 0x1640d0, 0x1640d4}; + +#define TIMER_REGS_COUNT_E1 ARRSIZE(timer_status_regs_e1) + +static const struct vfc_general vfc_general_x_e1 = { 0, 0, 0, 0, 0}; +static const struct vfc_general vfc_general_t_e1 = { 0, 0, 0, 0, 0}; + + + +static const struct igu_data igu_address_e1 = { 0, 0, 0, 0, { 0, 0} }; + + + +static const u32 timer_status_regs_e1h[] = { 0x164014, 0x164018}; +static const u32 timer_scan_regs_e1h[] = { 0x1640d0, 0x1640d4}; + +#define TIMER_REGS_COUNT_E1H ARRSIZE(timer_status_regs_e1h) + +static const struct vfc_general vfc_general_x_e1h = { 0, 0, 0, 0, 0}; +static const struct vfc_general vfc_general_t_e1h = { 0, 0, 0, 0, 0}; + + + +static const struct igu_data igu_address_e1h = { 0, 0, 0, 0, { 0, 0} }; + + + + + + +static const u32 timer_status_regs_e2[] = { 0x164014, 0x164018}; +static const u32 timer_scan_regs_e2[] = { 0x1640d0, 0x1640d4}; + +#define TIMER_REGS_COUNT_E2 ARRSIZE(timer_status_regs_e2) + +static const struct vfc_general vfc_general_x_e2 = { + 1, 0x2b8fd0, 0x2b8fc8, 0x2b8fc4, 0x2b8fcc +}; +static const struct vfc_general vfc_general_t_e2 = { + 1, 0x1b8fd0, 0x1b8fc8, 0x1b8fc4, 0x1b8fcc +}; +static const struct vfc_read_write_vector vfc_vectors_t_e2[1049] = { + { 4, 0, 0, {0,0}} + , { 4, 4, 0, {0,0}} + , { 4, 8, 0, {0,0}} + , { 4, 12, 0, {0,0}} + , { 4, 16, 0, {0,0}} + , { 4, 20, 0, {0,0}} + , { 4, 24, 0, {0,0}} + , { 4, 28, 0, {0,0}} + , { 4, 32, 0, {0,0}} + , { 4, 36, 0, {0,0}} + , { 4, 40, 0, {0,0}} + , { 4, 44, 0, {0,0}} + , { 4, 48, 0, {0,0}} + , { 4, 52, 0, {0,0}} + , { 4, 56, 0, {0,0}} + , { 4, 60, 0, {0,0}} + , { 4, 64, 0, {0,0}} + , { 4, 68, 0, {0,0}} + , { 4, 72, 0, {0,0}} + , { 4, 76, 0, {0,0}} + , { 4, 80, 0, {0,0}} + , { 4, 84, 0, {0,0}} + , { 4, 88, 0, {0,0}} + , { 4, 92, 0, {0,0}} + , { 4, 96, 0, {0,0}} + , { 4, 100, 0, {0,0}} + , { 4, 104, 0, {0,0}} + , { 4, 108, 0, {0,0}} + , { 4, 112, 0, {0,0}} + , { 4, 116, 0, {0,0}} + , { 4, 120, 0, {0,0}} + , { 4, 124, 0, {0,0}} + , { 4, 128, 0, {0,0}} + , { 4, 132, 0, {0,0}} + , { 4, 136, 0, {0,0}} + , { 4, 140, 0, {0,0}} + , { 4, 144, 0, {0,0}} + , { 4, 148, 0, {0,0}} + , { 4, 152, 0, {0,0}} + , { 4, 156, 0, {0,0}} + , { 4, 160, 0, {0,0}} + , { 4, 164, 0, {0,0}} + , { 4, 168, 0, {0,0}} + , { 4, 172, 0, {0,0}} + , { 4, 176, 0, {0,0}} + , { 4, 180, 0, {0,0}} + , { 4, 184, 0, {0,0}} + , { 4, 188, 0, {0,0}} + , { 4, 192, 0, {0,0}} + , { 4, 196, 0, {0,0}} + , { 4, 200, 0, {0,0}} + , { 4, 204, 0, {0,0}} + , { 4, 208, 0, {0,0}} + , { 4, 212, 0, {0,0}} + , { 4, 216, 0, {0,0}} + , { 4, 220, 0, {0,0}} + , { 4, 224, 0, {0,0}} + , { 4, 228, 0, {0,0}} + , { 4, 232, 0, {0,0}} + , { 4, 236, 0, {0,0}} + , { 4, 240, 0, {0,0}} + , { 4, 244, 0, {0,0}} + , { 4, 248, 0, {0,0}} + , { 4, 252, 0, {0,0}} + , { 4, 256, 0, {0,0}} + , { 4, 260, 0, {0,0}} + , { 4, 264, 0, {0,0}} + , { 4, 268, 0, {0,0}} + , { 4, 272, 0, {0,0}} + , { 4, 276, 0, {0,0}} + , { 4, 280, 0, {0,0}} + , { 4, 284, 0, {0,0}} + , { 4, 288, 0, {0,0}} + , { 4, 292, 0, {0,0}} + , { 4, 296, 0, {0,0}} + , { 4, 300, 0, {0,0}} + , { 4, 304, 0, {0,0}} + , { 4, 308, 0, {0,0}} + , { 4, 312, 0, {0,0}} + , { 4, 316, 0, {0,0}} + , { 4, 320, 0, {0,0}} + , { 4, 324, 0, {0,0}} + , { 4, 328, 0, {0,0}} + , { 4, 332, 0, {0,0}} + , { 4, 336, 0, {0,0}} + , { 4, 340, 0, {0,0}} + , { 4, 344, 0, {0,0}} + , { 4, 348, 0, {0,0}} + , { 4, 352, 0, {0,0}} + , { 4, 356, 0, {0,0}} + , { 4, 360, 0, {0,0}} + , { 4, 364, 0, {0,0}} + , { 4, 368, 0, {0,0}} + , { 4, 372, 0, {0,0}} + , { 4, 376, 0, {0,0}} + , { 4, 380, 0, {0,0}} + , { 4, 384, 0, {0,0}} + , { 4, 388, 0, {0,0}} + , { 4, 392, 0, {0,0}} + , { 4, 396, 0, {0,0}} + , { 4, 400, 0, {0,0}} + , { 4, 404, 0, {0,0}} + , { 4, 408, 0, {0,0}} + , { 4, 412, 0, {0,0}} + , { 4, 416, 0, {0,0}} + , { 4, 420, 0, {0,0}} + , { 4, 424, 0, {0,0}} + , { 4, 428, 0, {0,0}} + , { 4, 432, 0, {0,0}} + , { 4, 436, 0, {0,0}} + , { 4, 440, 0, {0,0}} + , { 4, 444, 0, {0,0}} + , { 4, 448, 0, {0,0}} + , { 4, 452, 0, {0,0}} + , { 4, 456, 0, {0,0}} + , { 4, 460, 0, {0,0}} + , { 4, 464, 0, {0,0}} + , { 4, 468, 0, {0,0}} + , { 4, 472, 0, {0,0}} + , { 4, 476, 0, {0,0}} + , { 4, 480, 0, {0,0}} + , { 4, 484, 0, {0,0}} + , { 4, 488, 0, {0,0}} + , { 4, 492, 0, {0,0}} + , { 4, 496, 0, {0,0}} + , { 4, 500, 0, {0,0}} + , { 4, 504, 0, {0,0}} + , { 4, 508, 0, {0,0}} + , { 4, 512, 0, {0,0}} + , { 4, 516, 0, {0,0}} + , { 4, 520, 0, {0,0}} + , { 4, 524, 0, {0,0}} + , { 4, 528, 0, {0,0}} + , { 4, 532, 0, {0,0}} + , { 4, 536, 0, {0,0}} + , { 4, 540, 0, {0,0}} + , { 4, 544, 0, {0,0}} + , { 4, 548, 0, {0,0}} + , { 4, 552, 0, {0,0}} + , { 4, 556, 0, {0,0}} + , { 4, 560, 0, {0,0}} + , { 4, 564, 0, {0,0}} + , { 4, 568, 0, {0,0}} + , { 4, 572, 0, {0,0}} + , { 4, 576, 0, {0,0}} + , { 4, 580, 0, {0,0}} + , { 4, 584, 0, {0,0}} + , { 4, 588, 0, {0,0}} + , { 4, 592, 0, {0,0}} + , { 4, 596, 0, {0,0}} + , { 4, 600, 0, {0,0}} + , { 4, 604, 0, {0,0}} + , { 4, 608, 0, {0,0}} + , { 4, 612, 0, {0,0}} + , { 4, 616, 0, {0,0}} + , { 4, 620, 0, {0,0}} + , { 4, 624, 0, {0,0}} + , { 4, 628, 0, {0,0}} + , { 4, 632, 0, {0,0}} + , { 4, 636, 0, {0,0}} + , { 4, 640, 0, {0,0}} + , { 4, 644, 0, {0,0}} + , { 4, 648, 0, {0,0}} + , { 4, 652, 0, {0,0}} + , { 4, 656, 0, {0,0}} + , { 4, 660, 0, {0,0}} + , { 4, 664, 0, {0,0}} + , { 4, 668, 0, {0,0}} + , { 4, 672, 0, {0,0}} + , { 4, 676, 0, {0,0}} + , { 4, 680, 0, {0,0}} + , { 4, 684, 0, {0,0}} + , { 4, 688, 0, {0,0}} + , { 4, 692, 0, {0,0}} + , { 4, 696, 0, {0,0}} + , { 4, 700, 0, {0,0}} + , { 4, 704, 0, {0,0}} + , { 4, 708, 0, {0,0}} + , { 4, 712, 0, {0,0}} + , { 4, 716, 0, {0,0}} + , { 4, 720, 0, {0,0}} + , { 4, 724, 0, {0,0}} + , { 4, 728, 0, {0,0}} + , { 4, 732, 0, {0,0}} + , { 4, 736, 0, {0,0}} + , { 4, 740, 0, {0,0}} + , { 4, 744, 0, {0,0}} + , { 4, 748, 0, {0,0}} + , { 4, 752, 0, {0,0}} + , { 4, 756, 0, {0,0}} + , { 4, 760, 0, {0,0}} + , { 4, 764, 0, {0,0}} + , { 4, 768, 0, {0,0}} + , { 4, 772, 0, {0,0}} + , { 4, 776, 0, {0,0}} + , { 4, 780, 0, {0,0}} + , { 4, 784, 0, {0,0}} + , { 4, 788, 0, {0,0}} + , { 4, 792, 0, {0,0}} + , { 4, 796, 0, {0,0}} + , { 4, 800, 0, {0,0}} + , { 4, 804, 0, {0,0}} + , { 4, 808, 0, {0,0}} + , { 4, 812, 0, {0,0}} + , { 4, 816, 0, {0,0}} + , { 4, 820, 0, {0,0}} + , { 4, 824, 0, {0,0}} + , { 4, 828, 0, {0,0}} + , { 4, 832, 0, {0,0}} + , { 4, 836, 0, {0,0}} + , { 4, 840, 0, {0,0}} + , { 4, 844, 0, {0,0}} + , { 4, 848, 0, {0,0}} + , { 4, 852, 0, {0,0}} + , { 4, 856, 0, {0,0}} + , { 4, 860, 0, {0,0}} + , { 4, 864, 0, {0,0}} + , { 4, 868, 0, {0,0}} + , { 4, 872, 0, {0,0}} + , { 4, 876, 0, {0,0}} + , { 4, 880, 0, {0,0}} + , { 4, 884, 0, {0,0}} + , { 4, 888, 0, {0,0}} + , { 4, 892, 0, {0,0}} + , { 4, 896, 0, {0,0}} + , { 4, 900, 0, {0,0}} + , { 4, 904, 0, {0,0}} + , { 4, 908, 0, {0,0}} + , { 4, 912, 0, {0,0}} + , { 4, 916, 0, {0,0}} + , { 4, 920, 0, {0,0}} + , { 4, 924, 0, {0,0}} + , { 4, 928, 0, {0,0}} + , { 4, 932, 0, {0,0}} + , { 4, 936, 0, {0,0}} + , { 4, 940, 0, {0,0}} + , { 4, 944, 0, {0,0}} + , { 4, 948, 0, {0,0}} + , { 4, 952, 0, {0,0}} + , { 4, 956, 0, {0,0}} + , { 4, 960, 0, {0,0}} + , { 4, 964, 0, {0,0}} + , { 4, 968, 0, {0,0}} + , { 4, 972, 0, {0,0}} + , { 4, 976, 0, {0,0}} + , { 4, 980, 0, {0,0}} + , { 4, 984, 0, {0,0}} + , { 4, 988, 0, {0,0}} + , { 4, 992, 0, {0,0}} + , { 4, 996, 0, {0,0}} + , { 4, 1000, 0, {0,0}} + , { 4, 1004, 0, {0,0}} + , { 4, 1008, 0, {0,0}} + , { 4, 1012, 0, {0,0}} + , { 4, 1016, 0, {0,0}} + , { 4, 1020, 0, {0,0}} + , { 4, 1024, 0, {0,0}} + , { 4, 1028, 0, {0,0}} + , { 4, 1032, 0, {0,0}} + , { 4, 1036, 0, {0,0}} + , { 4, 1040, 0, {0,0}} + , { 4, 1044, 0, {0,0}} + , { 4, 1048, 0, {0,0}} + , { 4, 1052, 0, {0,0}} + , { 4, 1056, 0, {0,0}} + , { 4, 1060, 0, {0,0}} + , { 4, 1064, 0, {0,0}} + , { 4, 1068, 0, {0,0}} + , { 4, 1072, 0, {0,0}} + , { 4, 1076, 0, {0,0}} + , { 4, 1080, 0, {0,0}} + , { 4, 1084, 0, {0,0}} + , { 4, 1088, 0, {0,0}} + , { 4, 1092, 0, {0,0}} + , { 4, 1096, 0, {0,0}} + , { 4, 1100, 0, {0,0}} + , { 4, 1104, 0, {0,0}} + , { 4, 1108, 0, {0,0}} + , { 4, 1112, 0, {0,0}} + , { 4, 1116, 0, {0,0}} + , { 4, 1120, 0, {0,0}} + , { 4, 1124, 0, {0,0}} + , { 4, 1128, 0, {0,0}} + , { 4, 1132, 0, {0,0}} + , { 4, 1136, 0, {0,0}} + , { 4, 1140, 0, {0,0}} + , { 4, 1144, 0, {0,0}} + , { 4, 1148, 0, {0,0}} + , { 4, 1152, 0, {0,0}} + , { 4, 1156, 0, {0,0}} + , { 4, 1160, 0, {0,0}} + , { 4, 1164, 0, {0,0}} + , { 4, 1168, 0, {0,0}} + , { 4, 1172, 0, {0,0}} + , { 4, 1176, 0, {0,0}} + , { 4, 1180, 0, {0,0}} + , { 4, 1184, 0, {0,0}} + , { 4, 1188, 0, {0,0}} + , { 4, 1192, 0, {0,0}} + , { 4, 1196, 0, {0,0}} + , { 4, 1200, 0, {0,0}} + , { 4, 1204, 0, {0,0}} + , { 4, 1208, 0, {0,0}} + , { 4, 1212, 0, {0,0}} + , { 4, 1216, 0, {0,0}} + , { 4, 1220, 0, {0,0}} + , { 4, 1224, 0, {0,0}} + , { 4, 1228, 0, {0,0}} + , { 4, 1232, 0, {0,0}} + , { 4, 1236, 0, {0,0}} + , { 4, 1240, 0, {0,0}} + , { 4, 1244, 0, {0,0}} + , { 4, 1248, 0, {0,0}} + , { 4, 1252, 0, {0,0}} + , { 4, 1256, 0, {0,0}} + , { 4, 1260, 0, {0,0}} + , { 4, 1264, 0, {0,0}} + , { 4, 1268, 0, {0,0}} + , { 4, 1272, 0, {0,0}} + , { 4, 1276, 0, {0,0}} + , { 4, 1280, 0, {0,0}} + , { 4, 1284, 0, {0,0}} + , { 4, 1288, 0, {0,0}} + , { 4, 1292, 0, {0,0}} + , { 4, 1296, 0, {0,0}} + , { 4, 1300, 0, {0,0}} + , { 4, 1304, 0, {0,0}} + , { 4, 1308, 0, {0,0}} + , { 4, 1312, 0, {0,0}} + , { 4, 1316, 0, {0,0}} + , { 4, 1320, 0, {0,0}} + , { 4, 1324, 0, {0,0}} + , { 4, 1328, 0, {0,0}} + , { 4, 1332, 0, {0,0}} + , { 4, 1336, 0, {0,0}} + , { 4, 1340, 0, {0,0}} + , { 4, 1344, 0, {0,0}} + , { 4, 1348, 0, {0,0}} + , { 4, 1352, 0, {0,0}} + , { 4, 1356, 0, {0,0}} + , { 4, 1360, 0, {0,0}} + , { 4, 1364, 0, {0,0}} + , { 4, 1368, 0, {0,0}} + , { 4, 1372, 0, {0,0}} + , { 4, 1376, 0, {0,0}} + , { 4, 1380, 0, {0,0}} + , { 4, 1384, 0, {0,0}} + , { 4, 1388, 0, {0,0}} + , { 4, 1392, 0, {0,0}} + , { 4, 1396, 0, {0,0}} + , { 4, 1400, 0, {0,0}} + , { 4, 1404, 0, {0,0}} + , { 4, 1408, 0, {0,0}} + , { 4, 1412, 0, {0,0}} + , { 4, 1416, 0, {0,0}} + , { 4, 1420, 0, {0,0}} + , { 4, 1424, 0, {0,0}} + , { 4, 1428, 0, {0,0}} + , { 4, 1432, 0, {0,0}} + , { 4, 1436, 0, {0,0}} + , { 4, 1440, 0, {0,0}} + , { 4, 1444, 0, {0,0}} + , { 4, 1448, 0, {0,0}} + , { 4, 1452, 0, {0,0}} + , { 4, 1456, 0, {0,0}} + , { 4, 1460, 0, {0,0}} + , { 4, 1464, 0, {0,0}} + , { 4, 1468, 0, {0,0}} + , { 4, 1472, 0, {0,0}} + , { 4, 1476, 0, {0,0}} + , { 4, 1480, 0, {0,0}} + , { 4, 1484, 0, {0,0}} + , { 4, 1488, 0, {0,0}} + , { 4, 1492, 0, {0,0}} + , { 4, 1496, 0, {0,0}} + , { 4, 1500, 0, {0,0}} + , { 4, 1504, 0, {0,0}} + , { 4, 1508, 0, {0,0}} + , { 4, 1512, 0, {0,0}} + , { 4, 1516, 0, {0,0}} + , { 4, 1520, 0, {0,0}} + , { 4, 1524, 0, {0,0}} + , { 4, 1528, 0, {0,0}} + , { 4, 1532, 0, {0,0}} + , { 4, 1536, 0, {0,0}} + , { 4, 1540, 0, {0,0}} + , { 4, 1544, 0, {0,0}} + , { 4, 1548, 0, {0,0}} + , { 4, 1552, 0, {0,0}} + , { 4, 1556, 0, {0,0}} + , { 4, 1560, 0, {0,0}} + , { 4, 1564, 0, {0,0}} + , { 4, 1568, 0, {0,0}} + , { 4, 1572, 0, {0,0}} + , { 4, 1576, 0, {0,0}} + , { 4, 1580, 0, {0,0}} + , { 4, 1584, 0, {0,0}} + , { 4, 1588, 0, {0,0}} + , { 4, 1592, 0, {0,0}} + , { 4, 1596, 0, {0,0}} + , { 4, 1600, 0, {0,0}} + , { 4, 1604, 0, {0,0}} + , { 4, 1608, 0, {0,0}} + , { 4, 1612, 0, {0,0}} + , { 4, 1616, 0, {0,0}} + , { 4, 1620, 0, {0,0}} + , { 4, 1624, 0, {0,0}} + , { 4, 1628, 0, {0,0}} + , { 4, 1632, 0, {0,0}} + , { 4, 1636, 0, {0,0}} + , { 4, 1640, 0, {0,0}} + , { 4, 1644, 0, {0,0}} + , { 4, 1648, 0, {0,0}} + , { 4, 1652, 0, {0,0}} + , { 4, 1656, 0, {0,0}} + , { 4, 1660, 0, {0,0}} + , { 4, 1664, 0, {0,0}} + , { 4, 1668, 0, {0,0}} + , { 4, 1672, 0, {0,0}} + , { 4, 1676, 0, {0,0}} + , { 4, 1680, 0, {0,0}} + , { 4, 1684, 0, {0,0}} + , { 4, 1688, 0, {0,0}} + , { 4, 1692, 0, {0,0}} + , { 4, 1696, 0, {0,0}} + , { 4, 1700, 0, {0,0}} + , { 4, 1704, 0, {0,0}} + , { 4, 1708, 0, {0,0}} + , { 4, 1712, 0, {0,0}} + , { 4, 1716, 0, {0,0}} + , { 4, 1720, 0, {0,0}} + , { 4, 1724, 0, {0,0}} + , { 4, 1728, 0, {0,0}} + , { 4, 1732, 0, {0,0}} + , { 4, 1736, 0, {0,0}} + , { 4, 1740, 0, {0,0}} + , { 4, 1744, 0, {0,0}} + , { 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{0,156}} + , { 6, 14, 2, {0,157}} + , { 6, 14, 2, {0,158}} + , { 6, 14, 2, {0,159}} + , { 6, 14, 2, {0,160}} + , { 6, 14, 2, {0,161}} + , { 6, 14, 2, {0,162}} + , { 6, 14, 2, {0,163}} + , { 6, 14, 2, {0,164}} + , { 6, 14, 2, {0,165}} + , { 6, 14, 2, {0,166}} + , { 6, 14, 2, {0,167}} + , { 6, 14, 2, {0,168}} + , { 6, 14, 2, {0,169}} + , { 6, 14, 2, {0,170}} + , { 6, 14, 2, {0,171}} + , { 6, 14, 2, {0,172}} + , { 6, 14, 2, {0,173}} + , { 6, 14, 2, {0,174}} + , { 6, 14, 2, {0,175}} + , { 6, 14, 2, {0,176}} + , { 6, 14, 2, {0,177}} + , { 6, 14, 2, {0,178}} + , { 6, 14, 2, {0,179}} + , { 6, 14, 2, {0,180}} + , { 6, 14, 2, {0,181}} + , { 6, 14, 2, {0,182}} + , { 6, 14, 2, {0,183}} + , { 6, 14, 2, {0,184}} + , { 6, 14, 2, {0,185}} + , { 6, 14, 2, {0,186}} + , { 6, 14, 2, {0,187}} + , { 6, 14, 2, {0,188}} + , { 6, 14, 2, {0,189}} + , { 6, 14, 2, {0,190}} + , { 6, 14, 2, {0,191}} + , { 6, 14, 2, {0,192}} + , { 6, 14, 2, {0,193}} + , { 6, 14, 2, {0,194}} + , { 6, 14, 2, {0,195}} + , { 6, 14, 2, {0,196}} + , { 6, 14, 2, {0,197}} + , { 6, 14, 2, {0,198}} + , { 6, 14, 2, {0,199}} + , { 6, 14, 2, {0,200}} + , { 6, 14, 2, {0,201}} + , { 6, 14, 2, {0,202}} + , { 6, 14, 2, {0,203}} + , { 6, 14, 2, {0,204}} + , { 6, 14, 2, {0,205}} + , { 6, 14, 2, {0,206}} + , { 6, 14, 2, {0,207}} + , { 6, 14, 2, {0,208}} + , { 6, 14, 2, {0,209}} + , { 6, 14, 2, {0,210}} + , { 6, 14, 2, {0,211}} + , { 6, 14, 2, {0,212}} + , { 6, 14, 2, {0,213}} + , { 6, 14, 2, {0,214}} + , { 6, 14, 2, {0,215}} + , { 6, 14, 2, {0,216}} + , { 6, 14, 2, {0,217}} + , { 6, 14, 2, {0,218}} + , { 6, 14, 2, {0,219}} + , { 6, 14, 2, {0,220}} + , { 6, 14, 2, {0,221}} + , { 6, 14, 2, {0,222}} + , { 6, 14, 2, {0,223}} + , { 6, 14, 2, {0,224}} + , { 6, 14, 2, {0,225}} + , { 6, 14, 2, {0,226}} + , { 6, 14, 2, {0,227}} + , { 6, 14, 2, {0,228}} + , { 6, 14, 2, {0,229}} + , { 6, 14, 2, {0,230}} + , { 6, 14, 2, {0,231}} + , { 6, 14, 2, {0,232}} + , { 6, 14, 2, {0,233}} + , { 6, 14, 2, {0,234}} + , { 6, 14, 2, {0,235}} + , { 6, 14, 2, {0,236}} + , { 6, 14, 2, {0,237}} + , { 6, 14, 2, {0,238}} + , { 6, 14, 2, {0,239}} + , { 6, 14, 2, {0,240}} + , { 6, 14, 2, {0,241}} + , { 6, 14, 2, {0,242}} + , { 6, 14, 2, {0,243}} + , { 6, 14, 2, {0,244}} + , { 6, 14, 2, {0,245}} + , { 6, 14, 2, {0,246}} + , { 6, 14, 2, {0,247}} + , { 6, 14, 2, {0,248}} + , { 6, 14, 2, {0,249}} + , { 6, 14, 2, {0,250}} + , { 6, 14, 2, {0,251}} + , { 6, 14, 2, {0,252}} + , { 6, 14, 2, {0,253}} + , { 6, 14, 2, {0,254}} + , { 6, 14, 2, {0,255}} + , { 6, 14, 2, {0,256}} + , { 6, 14, 2, {0,257}} + , { 6, 14, 2, {0,258}} + , { 6, 14, 2, {0,259}} + , { 6, 14, 2, {0,260}} + , { 6, 14, 2, {0,261}} + , { 6, 14, 2, {0,262}} + , { 6, 14, 2, {0,263}} + , { 6, 14, 2, {0,264}} + , { 6, 14, 2, {0,265}} + , { 6, 14, 2, {0,266}} + , { 6, 14, 2, {0,267}} + , { 6, 14, 2, {0,268}} + , { 6, 14, 2, {0,269}} + , { 6, 14, 2, {0,270}} + , { 6, 14, 2, {0,271}} + , { 10, 6, 1, {327681,0}} + , { 10, 6, 1, {327937,0}} + , { 10, 6, 1, {328193,0}} + , { 10, 6, 1, {328449,0}} + , { 10, 6, 1, {328705,0}} + , { 10, 6, 1, {328961,0}} + , { 10, 6, 1, {329217,0}} + , { 10, 6, 1, {329473,0}} + , { 10, 6, 1, {329729,0}} + , { 10, 6, 1, {329985,0}} + , { 10, 6, 1, {330241,0}} + , { 10, 6, 1, {330497,0}}}; + +static const struct vfc_read_task vfc_task_t_e2 = {vfc_vectors_t_e2, 1049}; +static const struct vfc_read_write_vector vfc_vectors_x_e2[1049] = { + { 4, 0, 0, {0,0}} + , { 4, 4, 0, {0,0}} + , { 4, 8, 0, {0,0}} + , { 4, 12, 0, {0,0}} + , { 4, 16, 0, {0,0}} + , { 4, 20, 0, {0,0}} + , { 4, 24, 0, {0,0}} + , { 4, 28, 0, {0,0}} + , { 4, 32, 0, {0,0}} + , { 4, 36, 0, {0,0}} + , { 4, 40, 0, {0,0}} + , { 4, 44, 0, {0,0}} + , { 4, 48, 0, {0,0}} + , { 4, 52, 0, {0,0}} + , { 4, 56, 0, {0,0}} + , { 4, 60, 0, {0,0}} + , { 4, 64, 0, {0,0}} + , { 4, 68, 0, {0,0}} + , { 4, 72, 0, {0,0}} + , { 4, 76, 0, {0,0}} + , { 4, 80, 0, {0,0}} + , { 4, 84, 0, {0,0}} + , { 4, 88, 0, {0,0}} + , { 4, 92, 0, {0,0}} + , { 4, 96, 0, {0,0}} + , { 4, 100, 0, {0,0}} + , { 4, 104, 0, {0,0}} + , { 4, 108, 0, {0,0}} + , { 4, 112, 0, {0,0}} + , { 4, 116, 0, {0,0}} + , { 4, 120, 0, {0,0}} + , { 4, 124, 0, {0,0}} + , { 4, 128, 0, {0,0}} + , { 4, 132, 0, {0,0}} + , { 4, 136, 0, {0,0}} + , { 4, 140, 0, {0,0}} + , { 4, 144, 0, {0,0}} + , { 4, 148, 0, {0,0}} + , { 4, 152, 0, {0,0}} + , { 4, 156, 0, {0,0}} + , { 4, 160, 0, {0,0}} + , { 4, 164, 0, {0,0}} + , { 4, 168, 0, {0,0}} + , { 4, 172, 0, {0,0}} + , { 4, 176, 0, {0,0}} + , { 4, 180, 0, {0,0}} + , { 4, 184, 0, {0,0}} + , { 4, 188, 0, {0,0}} + , { 4, 192, 0, {0,0}} + , { 4, 196, 0, {0,0}} + , { 4, 200, 0, {0,0}} + , { 4, 204, 0, {0,0}} + , { 4, 208, 0, {0,0}} + , { 4, 212, 0, {0,0}} + , { 4, 216, 0, {0,0}} + , { 4, 220, 0, {0,0}} + , { 4, 224, 0, {0,0}} + , { 4, 228, 0, {0,0}} + , { 4, 232, 0, {0,0}} + , { 4, 236, 0, {0,0}} + , { 4, 240, 0, {0,0}} + , { 4, 244, 0, {0,0}} + , { 4, 248, 0, {0,0}} + , { 4, 252, 0, {0,0}} + , { 4, 256, 0, {0,0}} + , { 4, 260, 0, {0,0}} + , { 4, 264, 0, {0,0}} + , { 4, 268, 0, {0,0}} + , { 4, 272, 0, {0,0}} + , { 4, 276, 0, {0,0}} + , { 4, 280, 0, {0,0}} + , { 4, 284, 0, {0,0}} + , { 4, 288, 0, {0,0}} + , { 4, 292, 0, {0,0}} + , { 4, 296, 0, {0,0}} + , { 4, 300, 0, {0,0}} + , { 4, 304, 0, {0,0}} + , { 4, 308, 0, {0,0}} + , { 4, 312, 0, {0,0}} + , { 4, 316, 0, {0,0}} + , { 4, 320, 0, {0,0}} + , { 4, 324, 0, {0,0}} + , { 4, 328, 0, {0,0}} + , { 4, 332, 0, {0,0}} + , { 4, 336, 0, {0,0}} + , { 4, 340, 0, {0,0}} + , { 4, 344, 0, {0,0}} + , { 4, 348, 0, {0,0}} + , { 4, 352, 0, {0,0}} + , { 4, 356, 0, {0,0}} + , { 4, 360, 0, {0,0}} + , { 4, 364, 0, {0,0}} + , { 4, 368, 0, {0,0}} + , { 4, 372, 0, {0,0}} + , { 4, 376, 0, {0,0}} + , { 4, 380, 0, {0,0}} + , { 4, 384, 0, {0,0}} + , { 4, 388, 0, {0,0}} + , { 4, 392, 0, {0,0}} + , { 4, 396, 0, {0,0}} + , { 4, 400, 0, {0,0}} + , { 4, 404, 0, {0,0}} + , { 4, 408, 0, {0,0}} + , { 4, 412, 0, {0,0}} + , { 4, 416, 0, {0,0}} + , { 4, 420, 0, {0,0}} + , { 4, 424, 0, {0,0}} + , { 4, 428, 0, {0,0}} + , { 4, 432, 0, {0,0}} + , { 4, 436, 0, {0,0}} + , { 4, 440, 0, {0,0}} + , { 4, 444, 0, {0,0}} + , { 4, 448, 0, {0,0}} + , { 4, 452, 0, {0,0}} + , { 4, 456, 0, {0,0}} + , { 4, 460, 0, {0,0}} + , { 4, 464, 0, {0,0}} + , { 4, 468, 0, {0,0}} + , { 4, 472, 0, {0,0}} + , { 4, 476, 0, {0,0}} + , { 4, 480, 0, {0,0}} + , { 4, 484, 0, {0,0}} + , { 4, 488, 0, {0,0}} + , { 4, 492, 0, {0,0}} + , { 4, 496, 0, {0,0}} + , { 4, 500, 0, {0,0}} + , { 4, 504, 0, {0,0}} + , { 4, 508, 0, {0,0}} + , { 4, 512, 0, {0,0}} + , { 4, 516, 0, {0,0}} + , { 4, 520, 0, {0,0}} + , { 4, 524, 0, {0,0}} + , { 4, 528, 0, {0,0}} + , { 4, 532, 0, {0,0}} + , { 4, 536, 0, {0,0}} + , { 4, 540, 0, {0,0}} + , { 4, 544, 0, {0,0}} + , { 4, 548, 0, {0,0}} + , { 4, 552, 0, {0,0}} + , { 4, 556, 0, {0,0}} + , { 4, 560, 0, {0,0}} + , { 4, 564, 0, {0,0}} + , { 4, 568, 0, {0,0}} + , { 4, 572, 0, {0,0}} + , { 4, 576, 0, {0,0}} + , { 4, 580, 0, {0,0}} + , { 4, 584, 0, {0,0}} + , { 4, 588, 0, {0,0}} + , { 4, 592, 0, {0,0}} + , { 4, 596, 0, {0,0}} + , { 4, 600, 0, {0,0}} + , { 4, 604, 0, {0,0}} + , { 4, 608, 0, {0,0}} + , { 4, 612, 0, {0,0}} + , { 4, 616, 0, {0,0}} + , { 4, 620, 0, {0,0}} + , { 4, 624, 0, {0,0}} + , { 4, 628, 0, {0,0}} + , { 4, 632, 0, {0,0}} + , { 4, 636, 0, {0,0}} + , { 4, 640, 0, {0,0}} + , { 4, 644, 0, {0,0}} + , { 4, 648, 0, {0,0}} + , { 4, 652, 0, {0,0}} + , { 4, 656, 0, {0,0}} + , { 4, 660, 0, {0,0}} + , { 4, 664, 0, {0,0}} + , { 4, 668, 0, {0,0}} + , { 4, 672, 0, {0,0}} + , { 4, 676, 0, {0,0}} + , { 4, 680, 0, {0,0}} + , { 4, 684, 0, {0,0}} + , { 4, 688, 0, {0,0}} + , { 4, 692, 0, {0,0}} + , { 4, 696, 0, {0,0}} + , { 4, 700, 0, {0,0}} + , { 4, 704, 0, {0,0}} + , { 4, 708, 0, {0,0}} + , { 4, 712, 0, {0,0}} + , { 4, 716, 0, {0,0}} + , { 4, 720, 0, {0,0}} + , { 4, 724, 0, {0,0}} + , { 4, 728, 0, {0,0}} + , { 4, 732, 0, {0,0}} + , { 4, 736, 0, {0,0}} + , { 4, 740, 0, {0,0}} + , { 4, 744, 0, {0,0}} + , { 4, 748, 0, {0,0}} + , { 4, 752, 0, {0,0}} + , { 4, 756, 0, {0,0}} + , { 4, 760, 0, {0,0}} + , { 4, 764, 0, {0,0}} + , { 4, 768, 0, {0,0}} + , { 4, 772, 0, {0,0}} + , { 4, 776, 0, {0,0}} + , { 4, 780, 0, {0,0}} + , { 4, 784, 0, {0,0}} + , { 4, 788, 0, {0,0}} + , { 4, 792, 0, {0,0}} + , { 4, 796, 0, {0,0}} + , { 4, 800, 0, {0,0}} + , { 4, 804, 0, {0,0}} + , { 4, 808, 0, {0,0}} + , { 4, 812, 0, {0,0}} + , { 4, 816, 0, {0,0}} + , { 4, 820, 0, {0,0}} + , { 4, 824, 0, {0,0}} + , { 4, 828, 0, {0,0}} + , { 4, 832, 0, {0,0}} + , { 4, 836, 0, {0,0}} + , { 4, 840, 0, {0,0}} + , { 4, 844, 0, {0,0}} + , { 4, 848, 0, {0,0}} + , { 4, 852, 0, {0,0}} + , { 4, 856, 0, {0,0}} + , { 4, 860, 0, {0,0}} + , { 4, 864, 0, {0,0}} + , { 4, 868, 0, {0,0}} + , { 4, 872, 0, {0,0}} + , { 4, 876, 0, {0,0}} + , { 4, 880, 0, {0,0}} + , { 4, 884, 0, {0,0}} + , { 4, 888, 0, {0,0}} + , { 4, 892, 0, {0,0}} + , { 4, 896, 0, {0,0}} + , { 4, 900, 0, {0,0}} + , { 4, 904, 0, {0,0}} + , { 4, 908, 0, {0,0}} + , { 4, 912, 0, {0,0}} + , { 4, 916, 0, {0,0}} + , { 4, 920, 0, {0,0}} + , { 4, 924, 0, {0,0}} + , { 4, 928, 0, {0,0}} + , { 4, 932, 0, {0,0}} + , { 4, 936, 0, {0,0}} + , { 4, 940, 0, {0,0}} + , { 4, 944, 0, {0,0}} + , { 4, 948, 0, {0,0}} + , { 4, 952, 0, {0,0}} + , { 4, 956, 0, {0,0}} + , { 4, 960, 0, {0,0}} + , { 4, 964, 0, {0,0}} + , { 4, 968, 0, {0,0}} + , { 4, 972, 0, {0,0}} + , { 4, 976, 0, {0,0}} + , { 4, 980, 0, {0,0}} + , { 4, 984, 0, {0,0}} + , { 4, 988, 0, {0,0}} + , { 4, 992, 0, {0,0}} + , { 4, 996, 0, {0,0}} + , { 4, 1000, 0, {0,0}} + , { 4, 1004, 0, {0,0}} + , { 4, 1008, 0, {0,0}} + , { 4, 1012, 0, {0,0}} + , { 4, 1016, 0, {0,0}} + , { 4, 1020, 0, {0,0}} + , { 4, 1024, 0, {0,0}} + , { 4, 1028, 0, {0,0}} + , { 4, 1032, 0, {0,0}} + , { 4, 1036, 0, {0,0}} + , { 4, 1040, 0, {0,0}} + , { 4, 1044, 0, {0,0}} + , { 4, 1048, 0, {0,0}} + , { 4, 1052, 0, {0,0}} + , { 4, 1056, 0, {0,0}} + , { 4, 1060, 0, {0,0}} + , { 4, 1064, 0, {0,0}} + , { 4, 1068, 0, {0,0}} + , { 4, 1072, 0, {0,0}} + , { 4, 1076, 0, {0,0}} + , { 4, 1080, 0, {0,0}} + , { 4, 1084, 0, {0,0}} + , { 4, 1088, 0, {0,0}} + , { 4, 1092, 0, {0,0}} + , { 4, 1096, 0, {0,0}} + , { 4, 1100, 0, {0,0}} + , { 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+ , { 6, 14, 2, {0,33}} + , { 6, 14, 2, {0,34}} + , { 6, 14, 2, {0,35}} + , { 6, 14, 2, {0,36}} + , { 6, 14, 2, {0,37}} + , { 6, 14, 2, {0,38}} + , { 6, 14, 2, {0,39}} + , { 6, 14, 2, {0,40}} + , { 6, 14, 2, {0,41}} + , { 6, 14, 2, {0,42}} + , { 6, 14, 2, {0,43}} + , { 6, 14, 2, {0,44}} + , { 6, 14, 2, {0,45}} + , { 6, 14, 2, {0,46}} + , { 6, 14, 2, {0,47}} + , { 6, 14, 2, {0,48}} + , { 6, 14, 2, {0,49}} + , { 6, 14, 2, {0,50}} + , { 6, 14, 2, {0,51}} + , { 6, 14, 2, {0,52}} + , { 6, 14, 2, {0,53}} + , { 6, 14, 2, {0,54}} + , { 6, 14, 2, {0,55}} + , { 6, 14, 2, {0,56}} + , { 6, 14, 2, {0,57}} + , { 6, 14, 2, {0,58}} + , { 6, 14, 2, {0,59}} + , { 6, 14, 2, {0,60}} + , { 6, 14, 2, {0,61}} + , { 6, 14, 2, {0,62}} + , { 6, 14, 2, {0,63}} + , { 6, 14, 2, {0,64}} + , { 6, 14, 2, {0,65}} + , { 6, 14, 2, {0,66}} + , { 6, 14, 2, {0,67}} + , { 6, 14, 2, {0,68}} + , { 6, 14, 2, {0,69}} + , { 6, 14, 2, {0,70}} + , { 6, 14, 2, {0,71}} + , { 6, 14, 2, {0,72}} + , { 6, 14, 2, {0,73}} + , { 6, 14, 2, {0,74}} + , { 6, 14, 2, {0,75}} + , { 6, 14, 2, {0,76}} + , { 6, 14, 2, {0,77}} + , { 6, 14, 2, {0,78}} + , { 6, 14, 2, {0,79}} + , { 6, 14, 2, {0,80}} + , { 6, 14, 2, {0,81}} + , { 6, 14, 2, {0,82}} + , { 6, 14, 2, {0,83}} + , { 6, 14, 2, {0,84}} + , { 6, 14, 2, {0,85}} + , { 6, 14, 2, {0,86}} + , { 6, 14, 2, {0,87}} + , { 6, 14, 2, {0,88}} + , { 6, 14, 2, {0,89}} + , { 6, 14, 2, {0,90}} + , { 6, 14, 2, {0,91}} + , { 6, 14, 2, {0,92}} + , { 6, 14, 2, {0,93}} + , { 6, 14, 2, {0,94}} + , { 6, 14, 2, {0,95}} + , { 6, 14, 2, {0,96}} + , { 6, 14, 2, {0,97}} + , { 6, 14, 2, {0,98}} + , { 6, 14, 2, {0,99}} + , { 6, 14, 2, {0,100}} + , { 6, 14, 2, {0,101}} + , { 6, 14, 2, {0,102}} + , { 6, 14, 2, {0,103}} + , { 6, 14, 2, {0,104}} + , { 6, 14, 2, {0,105}} + , { 6, 14, 2, {0,106}} + , { 6, 14, 2, {0,107}} + , { 6, 14, 2, {0,108}} + , { 6, 14, 2, {0,109}} + , { 6, 14, 2, {0,110}} + , { 6, 14, 2, {0,111}} + , { 6, 14, 2, {0,112}} + , { 6, 14, 2, {0,113}} + , { 6, 14, 2, {0,114}} + , { 6, 14, 2, {0,115}} + , { 6, 14, 2, {0,116}} + , { 6, 14, 2, {0,117}} + , { 6, 14, 2, {0,118}} + , { 6, 14, 2, {0,119}} + , { 6, 14, 2, {0,120}} + , { 6, 14, 2, {0,121}} + , { 6, 14, 2, {0,122}} + , { 6, 14, 2, {0,123}} + , { 6, 14, 2, {0,124}} + , { 6, 14, 2, {0,125}} + , { 6, 14, 2, {0,126}} + , { 6, 14, 2, {0,127}} + , { 6, 14, 2, {0,128}} + , { 6, 14, 2, {0,129}} + , { 6, 14, 2, {0,130}} + , { 6, 14, 2, {0,131}} + , { 6, 14, 2, {0,132}} + , { 6, 14, 2, {0,133}} + , { 6, 14, 2, {0,134}} + , { 6, 14, 2, {0,135}} + , { 6, 14, 2, {0,136}} + , { 6, 14, 2, {0,137}} + , { 6, 14, 2, {0,138}} + , { 6, 14, 2, {0,139}} + , { 6, 14, 2, {0,140}} + , { 6, 14, 2, {0,141}} + , { 6, 14, 2, {0,142}} + , { 6, 14, 2, {0,143}} + , { 6, 14, 2, {0,144}} + , { 6, 14, 2, {0,145}} + , { 6, 14, 2, {0,146}} + , { 6, 14, 2, {0,147}} + , { 6, 14, 2, {0,148}} + , { 6, 14, 2, {0,149}} + , { 6, 14, 2, {0,150}} + , { 6, 14, 2, {0,151}} + , { 6, 14, 2, {0,152}} + , { 6, 14, 2, {0,153}} + , { 6, 14, 2, {0,154}} + , { 6, 14, 2, {0,155}} + , { 6, 14, 2, {0,156}} + , { 6, 14, 2, {0,157}} + , { 6, 14, 2, {0,158}} + , { 6, 14, 2, {0,159}} + , { 6, 14, 2, {0,160}} + , { 6, 14, 2, {0,161}} + , { 6, 14, 2, {0,162}} + , { 6, 14, 2, {0,163}} + , { 6, 14, 2, {0,164}} + , { 6, 14, 2, {0,165}} + , { 6, 14, 2, {0,166}} + , { 6, 14, 2, {0,167}} + , { 6, 14, 2, {0,168}} + , { 6, 14, 2, {0,169}} + , { 6, 14, 2, {0,170}} + , { 6, 14, 2, {0,171}} + , { 6, 14, 2, {0,172}} + , { 6, 14, 2, {0,173}} + , { 6, 14, 2, {0,174}} + , { 6, 14, 2, {0,175}} + , { 6, 14, 2, {0,176}} + , { 6, 14, 2, {0,177}} + , { 6, 14, 2, {0,178}} + , { 6, 14, 2, {0,179}} + , { 6, 14, 2, {0,180}} + , { 6, 14, 2, {0,181}} + , { 6, 14, 2, {0,182}} + , { 6, 14, 2, {0,183}} + , { 6, 14, 2, {0,184}} + , { 6, 14, 2, {0,185}} + , { 6, 14, 2, {0,186}} + , { 6, 14, 2, {0,187}} + , { 6, 14, 2, {0,188}} + , { 6, 14, 2, {0,189}} + , { 6, 14, 2, {0,190}} + , { 6, 14, 2, {0,191}} + , { 6, 14, 2, {0,192}} + , { 6, 14, 2, {0,193}} + , { 6, 14, 2, {0,194}} + , { 6, 14, 2, {0,195}} + , { 6, 14, 2, {0,196}} + , { 6, 14, 2, {0,197}} + , { 6, 14, 2, {0,198}} + , { 6, 14, 2, {0,199}} + , { 6, 14, 2, {0,200}} + , { 6, 14, 2, {0,201}} + , { 6, 14, 2, {0,202}} + , { 6, 14, 2, {0,203}} + , { 6, 14, 2, {0,204}} + , { 6, 14, 2, {0,205}} + , { 6, 14, 2, {0,206}} + , { 6, 14, 2, {0,207}} + , { 6, 14, 2, {0,208}} + , { 6, 14, 2, {0,209}} + , { 6, 14, 2, {0,210}} + , { 6, 14, 2, {0,211}} + , { 6, 14, 2, {0,212}} + , { 6, 14, 2, {0,213}} + , { 6, 14, 2, {0,214}} + , { 6, 14, 2, {0,215}} + , { 6, 14, 2, {0,216}} + , { 6, 14, 2, {0,217}} + , { 6, 14, 2, {0,218}} + , { 6, 14, 2, {0,219}} + , { 6, 14, 2, {0,220}} + , { 6, 14, 2, {0,221}} + , { 6, 14, 2, {0,222}} + , { 6, 14, 2, {0,223}} + , { 6, 14, 2, {0,224}} + , { 6, 14, 2, {0,225}} + , { 6, 14, 2, {0,226}} + , { 6, 14, 2, {0,227}} + , { 6, 14, 2, {0,228}} + , { 6, 14, 2, {0,229}} + , { 6, 14, 2, {0,230}} + , { 6, 14, 2, {0,231}} + , { 6, 14, 2, {0,232}} + , { 6, 14, 2, {0,233}} + , { 6, 14, 2, {0,234}} + , { 6, 14, 2, {0,235}} + , { 6, 14, 2, {0,236}} + , { 6, 14, 2, {0,237}} + , { 6, 14, 2, {0,238}} + , { 6, 14, 2, {0,239}} + , { 6, 14, 2, {0,240}} + , { 6, 14, 2, {0,241}} + , { 6, 14, 2, {0,242}} + , { 6, 14, 2, {0,243}} + , { 6, 14, 2, {0,244}} + , { 6, 14, 2, {0,245}} + , { 6, 14, 2, {0,246}} + , { 6, 14, 2, {0,247}} + , { 6, 14, 2, {0,248}} + , { 6, 14, 2, {0,249}} + , { 6, 14, 2, {0,250}} + , { 6, 14, 2, {0,251}} + , { 6, 14, 2, {0,252}} + , { 6, 14, 2, {0,253}} + , { 6, 14, 2, {0,254}} + , { 6, 14, 2, {0,255}} + , { 6, 14, 2, {0,256}} + , { 6, 14, 2, {0,257}} + , { 6, 14, 2, {0,258}} + , { 6, 14, 2, {0,259}} + , { 6, 14, 2, {0,260}} + , { 6, 14, 2, {0,261}} + , { 6, 14, 2, {0,262}} + , { 6, 14, 2, {0,263}} + , { 6, 14, 2, {0,264}} + , { 6, 14, 2, {0,265}} + , { 6, 14, 2, {0,266}} + , { 6, 14, 2, {0,267}} + , { 6, 14, 2, {0,268}} + , { 6, 14, 2, {0,269}} + , { 6, 14, 2, {0,270}} + , { 6, 14, 2, {0,271}} + , { 10, 6, 1, {327681,0}} + , { 10, 6, 1, {327937,0}} + , { 10, 6, 1, {328193,0}} + , { 10, 6, 1, {328449,0}} + , { 10, 6, 1, {328705,0}} + , { 10, 6, 1, {328961,0}} + , { 10, 6, 1, {329217,0}} + , { 10, 6, 1, {329473,0}} + , { 10, 6, 1, {329729,0}} + , { 10, 6, 1, {329985,0}} + , { 10, 6, 1, {330241,0}} + , { 10, 6, 1, {330497,0}}}; + +static const struct vfc_read_task vfc_task_x_e2 = {vfc_vectors_x_e2, 1049}; + + + +static const struct igu_data igu_address_e2 = { + 1, 10, 0x130034, 0x130130, { 0x00130178, 0x0013017c} +}; + + + + + +static const u32 timer_status_regs_e3[] = { 0x164014, 0x164018}; +static const u32 timer_scan_regs_e3[] = { 0x1640d0, 0x1640d4}; + +#define TIMER_REGS_COUNT_E3 ARRSIZE(timer_status_regs_e3) + +static const struct vfc_general vfc_general_x_e3 = { + 1, 0x2b8fd0, 0x2b8fc8, 0x2b8fc4, 0x2b8fcc +}; +static const struct vfc_general vfc_general_t_e3 = { + 1, 0x1b8fd0, 0x1b8fc8, 0x1b8fc4, 0x1b8fcc +}; +static const struct vfc_read_write_vector vfc_vectors_t_e3[1049] = { + { 4, 0, 0, {0,0}} + , { 4, 4, 0, {0,0}} + , { 4, 8, 0, {0,0}} + , { 4, 12, 0, {0,0}} + , { 4, 16, 0, {0,0}} + , { 4, 20, 0, {0,0}} + , { 4, 24, 0, {0,0}} + , { 4, 28, 0, {0,0}} + , { 4, 32, 0, {0,0}} + , { 4, 36, 0, {0,0}} + , { 4, 40, 0, {0,0}} + , { 4, 44, 0, {0,0}} + , { 4, 48, 0, {0,0}} + , { 4, 52, 0, {0,0}} + , { 4, 56, 0, {0,0}} + , { 4, 60, 0, {0,0}} + , { 4, 64, 0, {0,0}} + , { 4, 68, 0, {0,0}} + , { 4, 72, 0, {0,0}} + , { 4, 76, 0, {0,0}} + , { 4, 80, 0, {0,0}} + , { 4, 84, 0, {0,0}} + , { 4, 88, 0, {0,0}} + , { 4, 92, 0, {0,0}} + , { 4, 96, 0, {0,0}} + , { 4, 100, 0, {0,0}} + , { 4, 104, 0, {0,0}} + , { 4, 108, 0, {0,0}} + , { 4, 112, 0, {0,0}} + , { 4, 116, 0, {0,0}} + , { 4, 120, 0, {0,0}} + , { 4, 124, 0, {0,0}} + , { 4, 128, 0, {0,0}} + , { 4, 132, 0, {0,0}} + , { 4, 136, 0, {0,0}} + , { 4, 140, 0, {0,0}} + , { 4, 144, 0, {0,0}} + , { 4, 148, 0, {0,0}} + , { 4, 152, 0, {0,0}} + , { 4, 156, 0, {0,0}} + , { 4, 160, 0, {0,0}} + , { 4, 164, 0, {0,0}} + , { 4, 168, 0, {0,0}} + , { 4, 172, 0, {0,0}} + , { 4, 176, 0, {0,0}} + , { 4, 180, 0, {0,0}} + , { 4, 184, 0, {0,0}} + , { 4, 188, 0, {0,0}} + , { 4, 192, 0, {0,0}} + , { 4, 196, 0, {0,0}} + , { 4, 200, 0, {0,0}} + , { 4, 204, 0, {0,0}} + , { 4, 208, 0, {0,0}} + , { 4, 212, 0, {0,0}} + , { 4, 216, 0, {0,0}} + , { 4, 220, 0, {0,0}} + , { 4, 224, 0, {0,0}} + , { 4, 228, 0, {0,0}} + , { 4, 232, 0, {0,0}} + , { 4, 236, 0, {0,0}} + , { 4, 240, 0, {0,0}} + , { 4, 244, 0, {0,0}} + , { 4, 248, 0, {0,0}} + , { 4, 252, 0, {0,0}} + , { 4, 256, 0, {0,0}} + , { 4, 260, 0, {0,0}} + , { 4, 264, 0, {0,0}} + , { 4, 268, 0, {0,0}} + , { 4, 272, 0, {0,0}} + , { 4, 276, 0, {0,0}} + , { 4, 280, 0, {0,0}} + , { 4, 284, 0, {0,0}} + , { 4, 288, 0, {0,0}} + , { 4, 292, 0, {0,0}} + , { 4, 296, 0, {0,0}} + , { 4, 300, 0, {0,0}} + , { 4, 304, 0, {0,0}} + , { 4, 308, 0, {0,0}} + , { 4, 312, 0, {0,0}} + , { 4, 316, 0, {0,0}} + , { 4, 320, 0, {0,0}} + , { 4, 324, 0, {0,0}} + , { 4, 328, 0, {0,0}} + , { 4, 332, 0, {0,0}} + , { 4, 336, 0, {0,0}} + , { 4, 340, 0, {0,0}} + , { 4, 344, 0, {0,0}} + , { 4, 348, 0, {0,0}} + , { 4, 352, 0, {0,0}} + , { 4, 356, 0, {0,0}} + , { 4, 360, 0, {0,0}} + , { 4, 364, 0, {0,0}} + , { 4, 368, 0, {0,0}} + , { 4, 372, 0, {0,0}} + , { 4, 376, 0, {0,0}} + , { 4, 380, 0, {0,0}} + , { 4, 384, 0, {0,0}} + , { 4, 388, 0, {0,0}} + , { 4, 392, 0, {0,0}} + , { 4, 396, 0, {0,0}} + , { 4, 400, 0, {0,0}} + , { 4, 404, 0, {0,0}} + , { 4, 408, 0, {0,0}} + , { 4, 412, 0, {0,0}} + , { 4, 416, 0, {0,0}} + , { 4, 420, 0, {0,0}} + , { 4, 424, 0, {0,0}} + , { 4, 428, 0, {0,0}} + , { 4, 432, 0, {0,0}} + , { 4, 436, 0, {0,0}} + , { 4, 440, 0, {0,0}} + , { 4, 444, 0, {0,0}} + , { 4, 448, 0, {0,0}} + , { 4, 452, 0, {0,0}} + , { 4, 456, 0, {0,0}} + , { 4, 460, 0, {0,0}} + , { 4, 464, 0, {0,0}} + , { 4, 468, 0, {0,0}} + , { 4, 472, 0, {0,0}} + , { 4, 476, 0, {0,0}} + , { 4, 480, 0, {0,0}} + , { 4, 484, 0, {0,0}} + , { 4, 488, 0, {0,0}} + , { 4, 492, 0, {0,0}} + , { 4, 496, 0, {0,0}} + , { 4, 500, 0, {0,0}} + , { 4, 504, 0, {0,0}} + , { 4, 508, 0, {0,0}} + , { 4, 512, 0, {0,0}} + , { 4, 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4, 2616, 0, {0,0}} + , { 4, 2620, 0, {0,0}} + , { 4, 2624, 0, {0,0}} + , { 4, 2628, 0, {0,0}} + , { 4, 2632, 0, {0,0}} + , { 4, 2636, 0, {0,0}} + , { 4, 2640, 0, {0,0}} + , { 4, 2644, 0, {0,0}} + , { 4, 2648, 0, {0,0}} + , { 4, 2652, 0, {0,0}} + , { 4, 2656, 0, {0,0}} + , { 4, 2660, 0, {0,0}} + , { 4, 2664, 0, {0,0}} + , { 4, 2668, 0, {0,0}} + , { 4, 2672, 0, {0,0}} + , { 4, 2676, 0, {0,0}} + , { 4, 2680, 0, {0,0}} + , { 4, 2684, 0, {0,0}} + , { 4, 2688, 0, {0,0}} + , { 4, 2692, 0, {0,0}} + , { 4, 2696, 0, {0,0}} + , { 4, 2700, 0, {0,0}} + , { 4, 2704, 0, {0,0}} + , { 4, 2708, 0, {0,0}} + , { 4, 2712, 0, {0,0}} + , { 4, 2716, 0, {0,0}} + , { 4, 2720, 0, {0,0}} + , { 4, 2724, 0, {0,0}} + , { 4, 2728, 0, {0,0}} + , { 4, 2732, 0, {0,0}} + , { 4, 2736, 0, {0,0}} + , { 4, 2740, 0, {0,0}} + , { 4, 2744, 0, {0,0}} + , { 4, 2748, 0, {0,0}} + , { 4, 2752, 0, {0,0}} + , { 4, 2756, 0, {0,0}} + , { 4, 2760, 0, {0,0}} + , { 4, 2764, 0, {0,0}} + , { 4, 2768, 0, {0,0}} + , { 4, 2772, 0, {0,0}} + , { 4, 2776, 0, {0,0}} + , { 4, 2780, 0, {0,0}} + , { 4, 2784, 0, {0,0}} + , { 4, 2788, 0, {0,0}} + , { 4, 2792, 0, {0,0}} + , { 4, 2796, 0, {0,0}} + , { 4, 2800, 0, {0,0}} + , { 4, 2804, 0, {0,0}} + , { 4, 2808, 0, {0,0}} + , { 4, 2812, 0, {0,0}} + , { 4, 2816, 0, {0,0}} + , { 4, 2820, 0, {0,0}} + , { 4, 2824, 0, {0,0}} + , { 4, 2828, 0, {0,0}} + , { 4, 2832, 0, {0,0}} + , { 4, 2836, 0, {0,0}} + , { 4, 2840, 0, {0,0}} + , { 4, 2844, 0, {0,0}} + , { 4, 2848, 0, {0,0}} + , { 4, 2852, 0, {0,0}} + , { 4, 2856, 0, {0,0}} + , { 4, 2860, 0, {0,0}} + , { 4, 2864, 0, {0,0}} + , { 4, 2868, 0, {0,0}} + , { 4, 2872, 0, {0,0}} + , { 4, 2876, 0, {0,0}} + , { 4, 2880, 0, {0,0}} + , { 4, 2884, 0, {0,0}} + , { 4, 2888, 0, {0,0}} + , { 4, 2892, 0, {0,0}} + , { 4, 2896, 0, {0,0}} + , { 4, 2900, 0, {0,0}} + , { 4, 2904, 0, {0,0}} + , { 4, 2908, 0, {0,0}} + , { 4, 2912, 0, {0,0}} + , { 4, 2916, 0, {0,0}} + , { 4, 2920, 0, {0,0}} + , { 4, 2924, 0, {0,0}} + , { 4, 2928, 0, {0,0}} + , { 4, 2932, 0, {0,0}} + , { 4, 2936, 0, {0,0}} + , { 4, 2940, 0, {0,0}} + , { 4, 2944, 0, {0,0}} + , { 4, 2948, 0, {0,0}} + , { 4, 2952, 0, {0,0}} + , { 4, 2956, 0, {0,0}} + , { 4, 2960, 0, {0,0}} + , { 4, 2964, 0, {0,0}} + , { 4, 2968, 0, {0,0}} + , { 4, 2972, 0, {0,0}} + , { 4, 2976, 0, {0,0}} + , { 4, 2980, 0, {0,0}} + , { 4, 2984, 0, {0,0}} + , { 4, 2988, 0, {0,0}} + , { 4, 2992, 0, {0,0}} + , { 4, 2996, 0, {0,0}} + , { 4, 3000, 0, {0,0}} + , { 4, 3004, 0, {0,0}} + , { 4, 3008, 0, {0,0}} + , { 4, 3012, 0, {0,0}} + , { 4, 3016, 0, {0,0}} + , { 4, 3020, 0, {0,0}} + , { 4, 3024, 0, {0,0}} + , { 4, 3028, 0, {0,0}} + , { 4, 3032, 0, {0,0}} + , { 4, 3036, 0, {0,0}} + , { 4, 3040, 0, {0,0}} + , { 4, 3044, 0, {0,0}} + , { 4, 3048, 0, {0,0}} + , { 4, 3052, 0, {0,0}} + , { 4, 3056, 0, {0,0}} + , { 6, 14, 2, {0,0}} + , { 6, 14, 2, {0,1}} + , { 6, 14, 2, {0,2}} + , { 6, 14, 2, {0,3}} + , { 6, 14, 2, {0,4}} + , { 6, 14, 2, {0,5}} + , { 6, 14, 2, {0,6}} + , { 6, 14, 2, {0,7}} + , { 6, 14, 2, {0,8}} + , { 6, 14, 2, {0,9}} + , { 6, 14, 2, {0,10}} + , { 6, 14, 2, {0,11}} + , { 6, 14, 2, {0,12}} + , { 6, 14, 2, {0,13}} + , { 6, 14, 2, {0,14}} + , { 6, 14, 2, {0,15}} + , { 6, 14, 2, {0,16}} + , { 6, 14, 2, {0,17}} + , { 6, 14, 2, {0,18}} + , { 6, 14, 2, {0,19}} + , { 6, 14, 2, {0,20}} + , { 6, 14, 2, {0,21}} + , { 6, 14, 2, {0,22}} + , { 6, 14, 2, {0,23}} + , { 6, 14, 2, {0,24}} + , { 6, 14, 2, {0,25}} + , { 6, 14, 2, {0,26}} + , { 6, 14, 2, {0,27}} + , { 6, 14, 2, {0,28}} + , { 6, 14, 2, {0,29}} + , { 6, 14, 2, {0,30}} + , { 6, 14, 2, {0,31}} + , { 6, 14, 2, {0,32}} + , { 6, 14, 2, {0,33}} + , { 6, 14, 2, {0,34}} + , { 6, 14, 2, {0,35}} + , { 6, 14, 2, {0,36}} + , { 6, 14, 2, {0,37}} + , { 6, 14, 2, {0,38}} + , { 6, 14, 2, {0,39}} + , { 6, 14, 2, {0,40}} + , { 6, 14, 2, {0,41}} + , { 6, 14, 2, {0,42}} + , { 6, 14, 2, {0,43}} + , { 6, 14, 2, {0,44}} + , { 6, 14, 2, {0,45}} + , { 6, 14, 2, {0,46}} + , { 6, 14, 2, {0,47}} + , { 6, 14, 2, {0,48}} + , { 6, 14, 2, {0,49}} + , { 6, 14, 2, {0,50}} + , { 6, 14, 2, {0,51}} + , { 6, 14, 2, {0,52}} + , { 6, 14, 2, {0,53}} + , { 6, 14, 2, {0,54}} + , { 6, 14, 2, {0,55}} + , { 6, 14, 2, {0,56}} + , { 6, 14, 2, {0,57}} + , { 6, 14, 2, {0,58}} + , { 6, 14, 2, {0,59}} + , { 6, 14, 2, {0,60}} + , { 6, 14, 2, {0,61}} + , { 6, 14, 2, {0,62}} + , { 6, 14, 2, {0,63}} + , { 6, 14, 2, {0,64}} + , { 6, 14, 2, {0,65}} + , { 6, 14, 2, {0,66}} + , { 6, 14, 2, {0,67}} + , { 6, 14, 2, {0,68}} + , { 6, 14, 2, {0,69}} + , { 6, 14, 2, {0,70}} + , { 6, 14, 2, {0,71}} + , { 6, 14, 2, {0,72}} + , { 6, 14, 2, {0,73}} + , { 6, 14, 2, {0,74}} + , { 6, 14, 2, {0,75}} + , { 6, 14, 2, {0,76}} + , { 6, 14, 2, {0,77}} + , { 6, 14, 2, {0,78}} + , { 6, 14, 2, {0,79}} + , { 6, 14, 2, {0,80}} + , { 6, 14, 2, {0,81}} + , { 6, 14, 2, {0,82}} + , { 6, 14, 2, {0,83}} + , { 6, 14, 2, {0,84}} + , { 6, 14, 2, {0,85}} + , { 6, 14, 2, {0,86}} + , { 6, 14, 2, {0,87}} + , { 6, 14, 2, {0,88}} + , { 6, 14, 2, {0,89}} + , { 6, 14, 2, {0,90}} + , { 6, 14, 2, {0,91}} + , { 6, 14, 2, {0,92}} + , { 6, 14, 2, {0,93}} + , { 6, 14, 2, {0,94}} + , { 6, 14, 2, {0,95}} + , { 6, 14, 2, {0,96}} + , { 6, 14, 2, {0,97}} + , { 6, 14, 2, {0,98}} + , { 6, 14, 2, {0,99}} + , { 6, 14, 2, {0,100}} + , { 6, 14, 2, {0,101}} + , { 6, 14, 2, {0,102}} + , { 6, 14, 2, {0,103}} + , { 6, 14, 2, {0,104}} + , { 6, 14, 2, {0,105}} + , { 6, 14, 2, {0,106}} + , { 6, 14, 2, {0,107}} + , { 6, 14, 2, {0,108}} + , { 6, 14, 2, {0,109}} + , { 6, 14, 2, {0,110}} + , { 6, 14, 2, {0,111}} + , { 6, 14, 2, {0,112}} + , { 6, 14, 2, {0,113}} + , { 6, 14, 2, {0,114}} + , { 6, 14, 2, {0,115}} + , { 6, 14, 2, {0,116}} + , { 6, 14, 2, {0,117}} + , { 6, 14, 2, {0,118}} + , { 6, 14, 2, {0,119}} + , { 6, 14, 2, {0,120}} + , { 6, 14, 2, {0,121}} + , { 6, 14, 2, {0,122}} + , { 6, 14, 2, {0,123}} + , { 6, 14, 2, {0,124}} + , { 6, 14, 2, {0,125}} + , { 6, 14, 2, {0,126}} + , { 6, 14, 2, {0,127}} + , { 6, 14, 2, {0,128}} + , { 6, 14, 2, {0,129}} + , { 6, 14, 2, {0,130}} + , { 6, 14, 2, {0,131}} + , { 6, 14, 2, {0,132}} + , { 6, 14, 2, {0,133}} + , { 6, 14, 2, {0,134}} + , { 6, 14, 2, {0,135}} + , { 6, 14, 2, {0,136}} + , { 6, 14, 2, {0,137}} + , { 6, 14, 2, {0,138}} + , { 6, 14, 2, {0,139}} + , { 6, 14, 2, {0,140}} + , { 6, 14, 2, {0,141}} + , { 6, 14, 2, {0,142}} + , { 6, 14, 2, {0,143}} + , { 6, 14, 2, {0,144}} + , { 6, 14, 2, {0,145}} + , { 6, 14, 2, {0,146}} + , { 6, 14, 2, {0,147}} + , { 6, 14, 2, {0,148}} + , { 6, 14, 2, {0,149}} + , { 6, 14, 2, {0,150}} + , { 6, 14, 2, {0,151}} + , { 6, 14, 2, {0,152}} + , { 6, 14, 2, {0,153}} + , { 6, 14, 2, {0,154}} + , { 6, 14, 2, {0,155}} + , { 6, 14, 2, {0,156}} + , { 6, 14, 2, {0,157}} + , { 6, 14, 2, {0,158}} + , { 6, 14, 2, {0,159}} + , { 6, 14, 2, {0,160}} + , { 6, 14, 2, {0,161}} + , { 6, 14, 2, {0,162}} + , { 6, 14, 2, {0,163}} + , { 6, 14, 2, {0,164}} + , { 6, 14, 2, {0,165}} + , { 6, 14, 2, {0,166}} + , { 6, 14, 2, {0,167}} + , { 6, 14, 2, {0,168}} + , { 6, 14, 2, {0,169}} + , { 6, 14, 2, {0,170}} + , { 6, 14, 2, {0,171}} + , { 6, 14, 2, {0,172}} + , { 6, 14, 2, {0,173}} + , { 6, 14, 2, {0,174}} + , { 6, 14, 2, {0,175}} + , { 6, 14, 2, {0,176}} + , { 6, 14, 2, {0,177}} + , { 6, 14, 2, {0,178}} + , { 6, 14, 2, {0,179}} + , { 6, 14, 2, {0,180}} + , { 6, 14, 2, {0,181}} + , { 6, 14, 2, {0,182}} + , { 6, 14, 2, {0,183}} + , { 6, 14, 2, {0,184}} + , { 6, 14, 2, {0,185}} + , { 6, 14, 2, {0,186}} + , { 6, 14, 2, {0,187}} + , { 6, 14, 2, {0,188}} + , { 6, 14, 2, {0,189}} + , { 6, 14, 2, {0,190}} + , { 6, 14, 2, {0,191}} + , { 6, 14, 2, {0,192}} + , { 6, 14, 2, {0,193}} + , { 6, 14, 2, {0,194}} + , { 6, 14, 2, {0,195}} + , { 6, 14, 2, {0,196}} + , { 6, 14, 2, {0,197}} + , { 6, 14, 2, {0,198}} + , { 6, 14, 2, {0,199}} + , { 6, 14, 2, {0,200}} + , { 6, 14, 2, {0,201}} + , { 6, 14, 2, {0,202}} + , { 6, 14, 2, {0,203}} + , { 6, 14, 2, {0,204}} + , { 6, 14, 2, {0,205}} + , { 6, 14, 2, {0,206}} + , { 6, 14, 2, {0,207}} + , { 6, 14, 2, {0,208}} + , { 6, 14, 2, {0,209}} + , { 6, 14, 2, {0,210}} + , { 6, 14, 2, {0,211}} + , { 6, 14, 2, {0,212}} + , { 6, 14, 2, {0,213}} + , { 6, 14, 2, {0,214}} + , { 6, 14, 2, {0,215}} + , { 6, 14, 2, {0,216}} + , { 6, 14, 2, {0,217}} + , { 6, 14, 2, {0,218}} + , { 6, 14, 2, {0,219}} + , { 6, 14, 2, {0,220}} + , { 6, 14, 2, {0,221}} + , { 6, 14, 2, {0,222}} + , { 6, 14, 2, {0,223}} + , { 6, 14, 2, {0,224}} + , { 6, 14, 2, {0,225}} + , { 6, 14, 2, {0,226}} + , { 6, 14, 2, {0,227}} + , { 6, 14, 2, {0,228}} + , { 6, 14, 2, {0,229}} + , { 6, 14, 2, {0,230}} + , { 6, 14, 2, {0,231}} + , { 6, 14, 2, {0,232}} + , { 6, 14, 2, {0,233}} + , { 6, 14, 2, {0,234}} + , { 6, 14, 2, {0,235}} + , { 6, 14, 2, {0,236}} + , { 6, 14, 2, {0,237}} + , { 6, 14, 2, {0,238}} + , { 6, 14, 2, {0,239}} + , { 6, 14, 2, {0,240}} + , { 6, 14, 2, {0,241}} + , { 6, 14, 2, {0,242}} + , { 6, 14, 2, {0,243}} + , { 6, 14, 2, {0,244}} + , { 6, 14, 2, {0,245}} + , { 6, 14, 2, {0,246}} + , { 6, 14, 2, {0,247}} + , { 6, 14, 2, {0,248}} + , { 6, 14, 2, {0,249}} + , { 6, 14, 2, {0,250}} + , { 6, 14, 2, {0,251}} + , { 6, 14, 2, {0,252}} + , { 6, 14, 2, {0,253}} + , { 6, 14, 2, {0,254}} + , { 6, 14, 2, {0,255}} + , { 6, 14, 2, {0,256}} + , { 6, 14, 2, {0,257}} + , { 6, 14, 2, {0,258}} + , { 6, 14, 2, {0,259}} + , { 6, 14, 2, {0,260}} + , { 6, 14, 2, {0,261}} + , { 6, 14, 2, {0,262}} + , { 6, 14, 2, {0,263}} + , { 6, 14, 2, {0,264}} + , { 6, 14, 2, {0,265}} + , { 6, 14, 2, {0,266}} + , { 6, 14, 2, {0,267}} + , { 6, 14, 2, {0,268}} + , { 6, 14, 2, {0,269}} + , { 6, 14, 2, {0,270}} + , { 6, 14, 2, {0,271}} + , { 10, 6, 1, {327681,0}} + , { 10, 6, 1, {327937,0}} + , { 10, 6, 1, {328193,0}} + , { 10, 6, 1, {328449,0}} + , { 10, 6, 1, {328705,0}} + , { 10, 6, 1, {328961,0}} + , { 10, 6, 1, {329217,0}} + , { 10, 6, 1, {329473,0}} + , { 10, 6, 1, {329729,0}} + , { 10, 6, 1, {329985,0}} + , { 10, 6, 1, {330241,0}} + , { 10, 6, 1, {330497,0}}}; + +static const struct vfc_read_task vfc_task_t_e3 = {vfc_vectors_t_e3, 1049}; +static const struct vfc_read_write_vector vfc_vectors_x_e3[1049] = { + { 4, 0, 0, {0,0}} + , { 4, 4, 0, {0,0}} + , { 4, 8, 0, {0,0}} + , { 4, 12, 0, {0,0}} + , { 4, 16, 0, {0,0}} + , { 4, 20, 0, {0,0}} + , { 4, 24, 0, {0,0}} + , { 4, 28, 0, {0,0}} + , { 4, 32, 0, {0,0}} + , { 4, 36, 0, {0,0}} + , { 4, 40, 0, {0,0}} + , { 4, 44, 0, {0,0}} + , { 4, 48, 0, {0,0}} + , { 4, 52, 0, {0,0}} + , { 4, 56, 0, {0,0}} + , { 4, 60, 0, {0,0}} + , { 4, 64, 0, {0,0}} + , { 4, 68, 0, {0,0}} + , { 4, 72, 0, {0,0}} + , { 4, 76, 0, {0,0}} + , { 4, 80, 0, {0,0}} + , { 4, 84, 0, {0,0}} + , { 4, 88, 0, {0,0}} + , { 4, 92, 0, {0,0}} + , { 4, 96, 0, {0,0}} + , { 4, 100, 0, {0,0}} + , { 4, 104, 0, {0,0}} + , { 4, 108, 0, {0,0}} + , { 4, 112, 0, {0,0}} + , { 4, 116, 0, {0,0}} + , { 4, 120, 0, {0,0}} + , { 4, 124, 0, {0,0}} + , { 4, 128, 0, {0,0}} + , { 4, 132, 0, {0,0}} + , { 4, 136, 0, {0,0}} + , { 4, 140, 0, {0,0}} + , { 4, 144, 0, {0,0}} + , { 4, 148, 0, {0,0}} + , { 4, 152, 0, {0,0}} + , { 4, 156, 0, {0,0}} + , { 4, 160, 0, {0,0}} + , { 4, 164, 0, {0,0}} + , { 4, 168, 0, {0,0}} + , { 4, 172, 0, {0,0}} + , { 4, 176, 0, {0,0}} + , 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{0,172}} + , { 6, 14, 2, {0,173}} + , { 6, 14, 2, {0,174}} + , { 6, 14, 2, {0,175}} + , { 6, 14, 2, {0,176}} + , { 6, 14, 2, {0,177}} + , { 6, 14, 2, {0,178}} + , { 6, 14, 2, {0,179}} + , { 6, 14, 2, {0,180}} + , { 6, 14, 2, {0,181}} + , { 6, 14, 2, {0,182}} + , { 6, 14, 2, {0,183}} + , { 6, 14, 2, {0,184}} + , { 6, 14, 2, {0,185}} + , { 6, 14, 2, {0,186}} + , { 6, 14, 2, {0,187}} + , { 6, 14, 2, {0,188}} + , { 6, 14, 2, {0,189}} + , { 6, 14, 2, {0,190}} + , { 6, 14, 2, {0,191}} + , { 6, 14, 2, {0,192}} + , { 6, 14, 2, {0,193}} + , { 6, 14, 2, {0,194}} + , { 6, 14, 2, {0,195}} + , { 6, 14, 2, {0,196}} + , { 6, 14, 2, {0,197}} + , { 6, 14, 2, {0,198}} + , { 6, 14, 2, {0,199}} + , { 6, 14, 2, {0,200}} + , { 6, 14, 2, {0,201}} + , { 6, 14, 2, {0,202}} + , { 6, 14, 2, {0,203}} + , { 6, 14, 2, {0,204}} + , { 6, 14, 2, {0,205}} + , { 6, 14, 2, {0,206}} + , { 6, 14, 2, {0,207}} + , { 6, 14, 2, {0,208}} + , { 6, 14, 2, {0,209}} + , { 6, 14, 2, {0,210}} + , { 6, 14, 2, {0,211}} + , { 6, 14, 2, {0,212}} + , { 6, 14, 2, {0,213}} + , { 6, 14, 2, {0,214}} + , { 6, 14, 2, {0,215}} + , { 6, 14, 2, {0,216}} + , { 6, 14, 2, {0,217}} + , { 6, 14, 2, {0,218}} + , { 6, 14, 2, {0,219}} + , { 6, 14, 2, {0,220}} + , { 6, 14, 2, {0,221}} + , { 6, 14, 2, {0,222}} + , { 6, 14, 2, {0,223}} + , { 6, 14, 2, {0,224}} + , { 6, 14, 2, {0,225}} + , { 6, 14, 2, {0,226}} + , { 6, 14, 2, {0,227}} + , { 6, 14, 2, {0,228}} + , { 6, 14, 2, {0,229}} + , { 6, 14, 2, {0,230}} + , { 6, 14, 2, {0,231}} + , { 6, 14, 2, {0,232}} + , { 6, 14, 2, {0,233}} + , { 6, 14, 2, {0,234}} + , { 6, 14, 2, {0,235}} + , { 6, 14, 2, {0,236}} + , { 6, 14, 2, {0,237}} + , { 6, 14, 2, {0,238}} + , { 6, 14, 2, {0,239}} + , { 6, 14, 2, {0,240}} + , { 6, 14, 2, {0,241}} + , { 6, 14, 2, {0,242}} + , { 6, 14, 2, {0,243}} + , { 6, 14, 2, {0,244}} + , { 6, 14, 2, {0,245}} + , { 6, 14, 2, {0,246}} + , { 6, 14, 2, {0,247}} + , { 6, 14, 2, {0,248}} + , { 6, 14, 2, {0,249}} + , { 6, 14, 2, {0,250}} + , { 6, 14, 2, {0,251}} + , { 6, 14, 2, {0,252}} + , { 6, 14, 2, {0,253}} + , { 6, 14, 2, {0,254}} + , { 6, 14, 2, {0,255}} + , { 6, 14, 2, {0,256}} + , { 6, 14, 2, {0,257}} + , { 6, 14, 2, {0,258}} + , { 6, 14, 2, {0,259}} + , { 6, 14, 2, {0,260}} + , { 6, 14, 2, {0,261}} + , { 6, 14, 2, {0,262}} + , { 6, 14, 2, {0,263}} + , { 6, 14, 2, {0,264}} + , { 6, 14, 2, {0,265}} + , { 6, 14, 2, {0,266}} + , { 6, 14, 2, {0,267}} + , { 6, 14, 2, {0,268}} + , { 6, 14, 2, {0,269}} + , { 6, 14, 2, {0,270}} + , { 6, 14, 2, {0,271}} + , { 10, 6, 1, {327681,0}} + , { 10, 6, 1, {327937,0}} + , { 10, 6, 1, {328193,0}} + , { 10, 6, 1, {328449,0}} + , { 10, 6, 1, {328705,0}} + , { 10, 6, 1, {328961,0}} + , { 10, 6, 1, {329217,0}} + , { 10, 6, 1, {329473,0}} + , { 10, 6, 1, {329729,0}} + , { 10, 6, 1, {329985,0}} + , { 10, 6, 1, {330241,0}} + , { 10, 6, 1, {330497,0}}}; + +static const struct vfc_read_task vfc_task_x_e3 = {vfc_vectors_x_e3, 1049}; + + + +static const struct igu_data igu_address_e3 = { + 1, 10, 0x130034, 0x130130, { 0x00130178, 0x0013017c} +}; + + + + + +static const u32 timer_status_regs_e3b0[] = { 0x164014, 0x164018}; +static const u32 timer_scan_regs_e3b0[] = { 0x1640d0, 0x1640d4}; + +#define TIMER_REGS_COUNT_E3B0 ARRSIZE(timer_status_regs_e3b0) + + +static const struct vfc_general vfc_general_x_e3b0 = { + 1, 0x2b8fd0, 0x2b8fc8, 0x2b8fc4, 0x2b8fcc +}; + +static const struct vfc_general vfc_general_t_e3b0 = { + 1, 0x1b8fd0, 0x1b8fc8, 0x1b8fc4, 0x1b8fcc +}; + +static const struct vfc_read_write_vector vfc_vectors_t_e3b0[1049] = { + { 4, 0, 0, {0,0}} + , { 4, 4, 0, {0,0}} + , { 4, 8, 0, {0,0}} + , { 4, 12, 0, {0,0}} + , { 4, 16, 0, {0,0}} + , { 4, 20, 0, {0,0}} + , { 4, 24, 0, {0,0}} + , { 4, 28, 0, {0,0}} + , { 4, 32, 0, {0,0}} + , { 4, 36, 0, {0,0}} + , { 4, 40, 0, {0,0}} + , { 4, 44, 0, {0,0}} + , { 4, 48, 0, {0,0}} + , { 4, 52, 0, {0,0}} + , { 4, 56, 0, {0,0}} + , { 4, 60, 0, {0,0}} + , { 4, 64, 0, {0,0}} + , { 4, 68, 0, {0,0}} + , { 4, 72, 0, {0,0}} + , { 4, 76, 0, {0,0}} + , { 4, 80, 0, {0,0}} + , { 4, 84, 0, {0,0}} + , { 4, 88, 0, {0,0}} + , { 4, 92, 0, {0,0}} + , { 4, 96, 0, {0,0}} + , { 4, 100, 0, {0,0}} + , { 4, 104, 0, {0,0}} + , { 4, 108, 0, {0,0}} + , { 4, 112, 0, {0,0}} + , { 4, 116, 0, {0,0}} + , { 4, 120, 0, {0,0}} + , { 4, 124, 0, {0,0}} + , { 4, 128, 0, {0,0}} + , { 4, 132, 0, {0,0}} + , { 4, 136, 0, {0,0}} + , { 4, 140, 0, {0,0}} + , { 4, 144, 0, {0,0}} + , { 4, 148, 0, {0,0}} + , { 4, 152, 0, {0,0}} + , { 4, 156, 0, {0,0}} + , { 4, 160, 0, {0,0}} + , { 4, 164, 0, {0,0}} + , { 4, 168, 0, {0,0}} + , { 4, 172, 0, {0,0}} + , { 4, 176, 0, {0,0}} + , { 4, 180, 0, {0,0}} + , { 4, 184, 0, {0,0}} + , { 4, 188, 0, {0,0}} + , { 4, 192, 0, {0,0}} + , { 4, 196, 0, {0,0}} + , { 4, 200, 0, {0,0}} + , { 4, 204, 0, {0,0}} + , { 4, 208, 0, {0,0}} + , { 4, 212, 0, {0,0}} + , { 4, 216, 0, {0,0}} + , { 4, 220, 0, {0,0}} + , { 4, 224, 0, {0,0}} + , { 4, 228, 0, {0,0}} + , { 4, 232, 0, {0,0}} + , { 4, 236, 0, {0,0}} + , { 4, 240, 0, {0,0}} + , { 4, 244, 0, {0,0}} + , { 4, 248, 0, {0,0}} + , { 4, 252, 0, {0,0}} + , { 4, 256, 0, {0,0}} + , { 4, 260, 0, {0,0}} + , { 4, 264, 0, {0,0}} + , { 4, 268, 0, {0,0}} + , { 4, 272, 0, {0,0}} + , { 4, 276, 0, {0,0}} + , { 4, 280, 0, {0,0}} + , { 4, 284, 0, {0,0}} + , { 4, 288, 0, {0,0}} + , { 4, 292, 0, {0,0}} + , { 4, 296, 0, {0,0}} + , { 4, 300, 0, {0,0}} + , { 4, 304, 0, {0,0}} + , { 4, 308, 0, {0,0}} + , { 4, 312, 0, {0,0}} + , { 4, 316, 0, {0,0}} + , { 4, 320, 0, {0,0}} + , { 4, 324, 0, {0,0}} + , { 4, 328, 0, {0,0}} + , { 4, 332, 0, {0,0}} + , { 4, 336, 0, {0,0}} + , { 4, 340, 0, {0,0}} + , { 4, 344, 0, {0,0}} + , { 4, 348, 0, {0,0}} + , { 4, 352, 0, {0,0}} + , { 4, 356, 0, {0,0}} + , { 4, 360, 0, {0,0}} + , { 4, 364, 0, {0,0}} + , { 4, 368, 0, {0,0}} + , { 4, 372, 0, {0,0}} + , { 4, 376, 0, {0,0}} + , { 4, 380, 0, {0,0}} + , { 4, 384, 0, {0,0}} + , { 4, 388, 0, {0,0}} + , { 4, 392, 0, {0,0}} + , { 4, 396, 0, {0,0}} + , { 4, 400, 0, {0,0}} + , { 4, 404, 0, {0,0}} + , { 4, 408, 0, {0,0}} + , { 4, 412, 0, {0,0}} + , { 4, 416, 0, {0,0}} + , { 4, 420, 0, {0,0}} + , { 4, 424, 0, {0,0}} + , { 4, 428, 0, {0,0}} + , { 4, 432, 0, {0,0}} + , { 4, 436, 0, {0,0}} + , { 4, 440, 0, {0,0}} + , { 4, 444, 0, {0,0}} + , { 4, 448, 0, {0,0}} + , { 4, 452, 0, {0,0}} + , { 4, 456, 0, {0,0}} + , { 4, 460, 0, {0,0}} + , { 4, 464, 0, {0,0}} + , { 4, 468, 0, {0,0}} + , { 4, 472, 0, {0,0}} + , { 4, 476, 0, {0,0}} + , { 4, 480, 0, {0,0}} + , { 4, 484, 0, {0,0}} + , { 4, 488, 0, {0,0}} + , { 4, 492, 0, {0,0}} + , { 4, 496, 0, {0,0}} + , { 4, 500, 0, {0,0}} + , { 4, 504, 0, {0,0}} + , { 4, 508, 0, {0,0}} + , { 4, 512, 0, {0,0}} + , { 4, 516, 0, {0,0}} + , { 4, 520, 0, {0,0}} + , { 4, 524, 0, {0,0}} + , { 4, 528, 0, {0,0}} + , { 4, 532, 0, {0,0}} + , { 4, 536, 0, {0,0}} + , { 4, 540, 0, {0,0}} + , { 4, 544, 0, {0,0}} + , { 4, 548, 0, {0,0}} + , { 4, 552, 0, {0,0}} + , { 4, 556, 0, {0,0}} + , { 4, 560, 0, {0,0}} + , { 4, 564, 0, {0,0}} + , { 4, 568, 0, {0,0}} + , { 4, 572, 0, {0,0}} + , { 4, 576, 0, {0,0}} + , { 4, 580, 0, {0,0}} + , { 4, 584, 0, {0,0}} + , { 4, 588, 0, {0,0}} + , { 4, 592, 0, {0,0}} + , { 4, 596, 0, {0,0}} + , { 4, 600, 0, {0,0}} + , { 4, 604, 0, {0,0}} + , { 4, 608, 0, {0,0}} + , { 4, 612, 0, {0,0}} + , { 4, 616, 0, {0,0}} + , { 4, 620, 0, {0,0}} + , { 4, 624, 0, {0,0}} + , { 4, 628, 0, {0,0}} + , { 4, 632, 0, {0,0}} + , { 4, 636, 0, {0,0}} + , { 4, 640, 0, {0,0}} + , { 4, 644, 0, {0,0}} + , { 4, 648, 0, {0,0}} + , { 4, 652, 0, {0,0}} + , { 4, 656, 0, {0,0}} + , { 4, 660, 0, {0,0}} + , { 4, 664, 0, {0,0}} + , { 4, 668, 0, {0,0}} + , { 4, 672, 0, {0,0}} + , { 4, 676, 0, {0,0}} + , { 4, 680, 0, {0,0}} + , { 4, 684, 0, {0,0}} + , { 4, 688, 0, {0,0}} + , { 4, 692, 0, {0,0}} + , { 4, 696, 0, {0,0}} + , { 4, 700, 0, {0,0}} + , { 4, 704, 0, {0,0}} + , { 4, 708, 0, {0,0}} + , { 4, 712, 0, {0,0}} + , { 4, 716, 0, {0,0}} + , { 4, 720, 0, {0,0}} + , { 4, 724, 0, {0,0}} + , { 4, 728, 0, {0,0}} + , { 4, 732, 0, {0,0}} + , { 4, 736, 0, {0,0}} + , { 4, 740, 0, {0,0}} + , { 4, 744, 0, {0,0}} + , { 4, 748, 0, {0,0}} + , { 4, 752, 0, {0,0}} + , { 4, 756, 0, {0,0}} + , { 4, 760, 0, {0,0}} + , { 4, 764, 0, {0,0}} + , { 4, 768, 0, {0,0}} + , { 4, 772, 0, {0,0}} + , { 4, 776, 0, {0,0}} + , { 4, 780, 0, {0,0}} + , { 4, 784, 0, {0,0}} + , { 4, 788, 0, {0,0}} + , { 4, 792, 0, {0,0}} + , { 4, 796, 0, {0,0}} + , { 4, 800, 0, {0,0}} + , { 4, 804, 0, {0,0}} + , { 4, 808, 0, {0,0}} + , { 4, 812, 0, {0,0}} + , { 4, 816, 0, {0,0}} + , { 4, 820, 0, {0,0}} + , { 4, 824, 0, {0,0}} + , { 4, 828, 0, {0,0}} + , { 4, 832, 0, {0,0}} + , { 4, 836, 0, {0,0}} + , { 4, 840, 0, {0,0}} + , { 4, 844, 0, {0,0}} + , { 4, 848, 0, {0,0}} + , { 4, 852, 0, {0,0}} + , { 4, 856, 0, {0,0}} + , { 4, 860, 0, {0,0}} + , { 4, 864, 0, {0,0}} + , { 4, 868, 0, {0,0}} + , { 4, 872, 0, {0,0}} + , { 4, 876, 0, {0,0}} + , { 4, 880, 0, {0,0}} + , { 4, 884, 0, {0,0}} + , { 4, 888, 0, {0,0}} + , { 4, 892, 0, {0,0}} + , { 4, 896, 0, {0,0}} + , { 4, 900, 0, {0,0}} + , { 4, 904, 0, {0,0}} + , { 4, 908, 0, {0,0}} + , { 4, 912, 0, {0,0}} + , { 4, 916, 0, {0,0}} + , { 4, 920, 0, {0,0}} + , { 4, 924, 0, {0,0}} + , { 4, 928, 0, {0,0}} + , { 4, 932, 0, {0,0}} + , { 4, 936, 0, {0,0}} + , { 4, 940, 0, {0,0}} + , { 4, 944, 0, {0,0}} + , { 4, 948, 0, {0,0}} + , { 4, 952, 0, {0,0}} + , { 4, 956, 0, {0,0}} + , { 4, 960, 0, {0,0}} + , { 4, 964, 0, {0,0}} + , { 4, 968, 0, {0,0}} + , { 4, 972, 0, {0,0}} + , { 4, 976, 0, {0,0}} + , { 4, 980, 0, {0,0}} + , { 4, 984, 0, {0,0}} + , { 4, 988, 0, {0,0}} + , { 4, 992, 0, {0,0}} + , { 4, 996, 0, {0,0}} + , { 4, 1000, 0, {0,0}} + , { 4, 1004, 0, {0,0}} + , { 4, 1008, 0, {0,0}} + , { 4, 1012, 0, {0,0}} + , { 4, 1016, 0, {0,0}} + , { 4, 1020, 0, {0,0}} + , { 4, 1024, 0, {0,0}} + , { 4, 1028, 0, {0,0}} + , { 4, 1032, 0, {0,0}} + , { 4, 1036, 0, {0,0}} + , { 4, 1040, 0, {0,0}} + , { 4, 1044, 0, {0,0}} + , { 4, 1048, 0, {0,0}} + , { 4, 1052, 0, {0,0}} + , { 4, 1056, 0, {0,0}} + , { 4, 1060, 0, {0,0}} + , { 4, 1064, 0, {0,0}} + , { 4, 1068, 0, {0,0}} + , { 4, 1072, 0, {0,0}} + , { 4, 1076, 0, {0,0}} + , { 4, 1080, 0, {0,0}} + , { 4, 1084, 0, {0,0}} + , { 4, 1088, 0, {0,0}} + , { 4, 1092, 0, {0,0}} + , { 4, 1096, 0, {0,0}} + , { 4, 1100, 0, {0,0}} + , { 4, 1104, 0, {0,0}} + , { 4, 1108, 0, {0,0}} + , { 4, 1112, 0, {0,0}} + , { 4, 1116, 0, {0,0}} + , { 4, 1120, 0, {0,0}} + , { 4, 1124, 0, {0,0}} + , { 4, 1128, 0, {0,0}} + , { 4, 1132, 0, {0,0}} + , { 4, 1136, 0, {0,0}} + , { 4, 1140, 0, {0,0}} + , { 4, 1144, 0, {0,0}} + , { 4, 1148, 0, {0,0}} + , { 4, 1152, 0, {0,0}} + , { 4, 1156, 0, {0,0}} + , { 4, 1160, 0, {0,0}} + , { 4, 1164, 0, {0,0}} + , { 4, 1168, 0, {0,0}} + , { 4, 1172, 0, {0,0}} + , { 4, 1176, 0, {0,0}} + , { 4, 1180, 0, {0,0}} + , { 4, 1184, 0, {0,0}} + , { 4, 1188, 0, {0,0}} + , { 4, 1192, 0, {0,0}} + , { 4, 1196, 0, {0,0}} + , { 4, 1200, 0, {0,0}} + , { 4, 1204, 0, {0,0}} + , { 4, 1208, 0, {0,0}} + , { 4, 1212, 0, {0,0}} + , { 4, 1216, 0, {0,0}} + , { 4, 1220, 0, {0,0}} + , { 4, 1224, 0, {0,0}} + , { 4, 1228, 0, {0,0}} + , { 4, 1232, 0, {0,0}} + , { 4, 1236, 0, {0,0}} + , { 4, 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3000, 0, {0,0}} + , { 4, 3004, 0, {0,0}} + , { 4, 3008, 0, {0,0}} + , { 4, 3012, 0, {0,0}} + , { 4, 3016, 0, {0,0}} + , { 4, 3020, 0, {0,0}} + , { 4, 3024, 0, {0,0}} + , { 4, 3028, 0, {0,0}} + , { 4, 3032, 0, {0,0}} + , { 4, 3036, 0, {0,0}} + , { 4, 3040, 0, {0,0}} + , { 4, 3044, 0, {0,0}} + , { 4, 3048, 0, {0,0}} + , { 4, 3052, 0, {0,0}} + , { 4, 3056, 0, {0,0}} + , { 6, 14, 2, {0,0}} + , { 6, 14, 2, {0,1}} + , { 6, 14, 2, {0,2}} + , { 6, 14, 2, {0,3}} + , { 6, 14, 2, {0,4}} + , { 6, 14, 2, {0,5}} + , { 6, 14, 2, {0,6}} + , { 6, 14, 2, {0,7}} + , { 6, 14, 2, {0,8}} + , { 6, 14, 2, {0,9}} + , { 6, 14, 2, {0,10}} + , { 6, 14, 2, {0,11}} + , { 6, 14, 2, {0,12}} + , { 6, 14, 2, {0,13}} + , { 6, 14, 2, {0,14}} + , { 6, 14, 2, {0,15}} + , { 6, 14, 2, {0,16}} + , { 6, 14, 2, {0,17}} + , { 6, 14, 2, {0,18}} + , { 6, 14, 2, {0,19}} + , { 6, 14, 2, {0,20}} + , { 6, 14, 2, {0,21}} + , { 6, 14, 2, {0,22}} + , { 6, 14, 2, {0,23}} + , { 6, 14, 2, {0,24}} + , { 6, 14, 2, {0,25}} + , { 6, 14, 2, {0,26}} + , { 6, 14, 2, {0,27}} + , { 6, 14, 2, {0,28}} + , { 6, 14, 2, {0,29}} + , { 6, 14, 2, {0,30}} + , { 6, 14, 2, {0,31}} + , { 6, 14, 2, {0,32}} + , { 6, 14, 2, {0,33}} + , { 6, 14, 2, {0,34}} + , { 6, 14, 2, {0,35}} + , { 6, 14, 2, {0,36}} + , { 6, 14, 2, {0,37}} + , { 6, 14, 2, {0,38}} + , { 6, 14, 2, {0,39}} + , { 6, 14, 2, {0,40}} + , { 6, 14, 2, {0,41}} + , { 6, 14, 2, {0,42}} + , { 6, 14, 2, {0,43}} + , { 6, 14, 2, {0,44}} + , { 6, 14, 2, {0,45}} + , { 6, 14, 2, {0,46}} + , { 6, 14, 2, {0,47}} + , { 6, 14, 2, {0,48}} + , { 6, 14, 2, {0,49}} + , { 6, 14, 2, {0,50}} + , { 6, 14, 2, {0,51}} + , { 6, 14, 2, {0,52}} + , { 6, 14, 2, {0,53}} + , { 6, 14, 2, {0,54}} + , { 6, 14, 2, {0,55}} + , { 6, 14, 2, {0,56}} + , { 6, 14, 2, {0,57}} + , { 6, 14, 2, {0,58}} + , { 6, 14, 2, {0,59}} + , { 6, 14, 2, {0,60}} + , { 6, 14, 2, {0,61}} + , { 6, 14, 2, {0,62}} + , { 6, 14, 2, {0,63}} + , { 6, 14, 2, {0,64}} + , { 6, 14, 2, {0,65}} + , { 6, 14, 2, {0,66}} + , { 6, 14, 2, {0,67}} + , { 6, 14, 2, {0,68}} + , { 6, 14, 2, {0,69}} + , { 6, 14, 2, {0,70}} + , { 6, 14, 2, {0,71}} + , { 6, 14, 2, {0,72}} + , { 6, 14, 2, {0,73}} + , { 6, 14, 2, {0,74}} + , { 6, 14, 2, {0,75}} + , { 6, 14, 2, {0,76}} + , { 6, 14, 2, {0,77}} + , { 6, 14, 2, {0,78}} + , { 6, 14, 2, {0,79}} + , { 6, 14, 2, {0,80}} + , { 6, 14, 2, {0,81}} + , { 6, 14, 2, {0,82}} + , { 6, 14, 2, {0,83}} + , { 6, 14, 2, {0,84}} + , { 6, 14, 2, {0,85}} + , { 6, 14, 2, {0,86}} + , { 6, 14, 2, {0,87}} + , { 6, 14, 2, {0,88}} + , { 6, 14, 2, {0,89}} + , { 6, 14, 2, {0,90}} + , { 6, 14, 2, {0,91}} + , { 6, 14, 2, {0,92}} + , { 6, 14, 2, {0,93}} + , { 6, 14, 2, {0,94}} + , { 6, 14, 2, {0,95}} + , { 6, 14, 2, {0,96}} + , { 6, 14, 2, {0,97}} + , { 6, 14, 2, {0,98}} + , { 6, 14, 2, {0,99}} + , { 6, 14, 2, {0,100}} + , { 6, 14, 2, {0,101}} + , { 6, 14, 2, {0,102}} + , { 6, 14, 2, {0,103}} + , { 6, 14, 2, {0,104}} + , { 6, 14, 2, {0,105}} + , { 6, 14, 2, {0,106}} + , { 6, 14, 2, {0,107}} + , { 6, 14, 2, {0,108}} + , { 6, 14, 2, {0,109}} + , { 6, 14, 2, {0,110}} + , { 6, 14, 2, {0,111}} + , { 6, 14, 2, {0,112}} + , { 6, 14, 2, {0,113}} + , { 6, 14, 2, {0,114}} + , { 6, 14, 2, {0,115}} + , { 6, 14, 2, {0,116}} + , { 6, 14, 2, {0,117}} + , { 6, 14, 2, {0,118}} + , { 6, 14, 2, {0,119}} + , { 6, 14, 2, {0,120}} + , { 6, 14, 2, {0,121}} + , { 6, 14, 2, {0,122}} + , { 6, 14, 2, {0,123}} + , { 6, 14, 2, {0,124}} + , { 6, 14, 2, {0,125}} + , { 6, 14, 2, {0,126}} + , { 6, 14, 2, {0,127}} + , { 6, 14, 2, {0,128}} + , { 6, 14, 2, {0,129}} + , { 6, 14, 2, {0,130}} + , { 6, 14, 2, {0,131}} + , { 6, 14, 2, {0,132}} + , { 6, 14, 2, {0,133}} + , { 6, 14, 2, {0,134}} + , { 6, 14, 2, {0,135}} + , { 6, 14, 2, {0,136}} + , { 6, 14, 2, {0,137}} + , { 6, 14, 2, {0,138}} + , { 6, 14, 2, {0,139}} + , { 6, 14, 2, {0,140}} + , { 6, 14, 2, {0,141}} + , { 6, 14, 2, {0,142}} + , { 6, 14, 2, {0,143}} + , { 6, 14, 2, {0,144}} + , { 6, 14, 2, {0,145}} + , { 6, 14, 2, {0,146}} + , { 6, 14, 2, {0,147}} + , { 6, 14, 2, {0,148}} + , { 6, 14, 2, {0,149}} + , { 6, 14, 2, {0,150}} + , { 6, 14, 2, {0,151}} + , { 6, 14, 2, {0,152}} + , { 6, 14, 2, {0,153}} + , { 6, 14, 2, {0,154}} + , { 6, 14, 2, {0,155}} + , { 6, 14, 2, {0,156}} + , { 6, 14, 2, {0,157}} + , { 6, 14, 2, {0,158}} + , { 6, 14, 2, {0,159}} + , { 6, 14, 2, {0,160}} + , { 6, 14, 2, {0,161}} + , { 6, 14, 2, {0,162}} + , { 6, 14, 2, {0,163}} + , { 6, 14, 2, {0,164}} + , { 6, 14, 2, {0,165}} + , { 6, 14, 2, {0,166}} + , { 6, 14, 2, {0,167}} + , { 6, 14, 2, {0,168}} + , { 6, 14, 2, {0,169}} + , { 6, 14, 2, {0,170}} + , { 6, 14, 2, {0,171}} + , { 6, 14, 2, {0,172}} + , { 6, 14, 2, {0,173}} + , { 6, 14, 2, {0,174}} + , { 6, 14, 2, {0,175}} + , { 6, 14, 2, {0,176}} + , { 6, 14, 2, {0,177}} + , { 6, 14, 2, {0,178}} + , { 6, 14, 2, {0,179}} + , { 6, 14, 2, {0,180}} + , { 6, 14, 2, {0,181}} + , { 6, 14, 2, {0,182}} + , { 6, 14, 2, {0,183}} + , { 6, 14, 2, {0,184}} + , { 6, 14, 2, {0,185}} + , { 6, 14, 2, {0,186}} + , { 6, 14, 2, {0,187}} + , { 6, 14, 2, {0,188}} + , { 6, 14, 2, {0,189}} + , { 6, 14, 2, {0,190}} + , { 6, 14, 2, {0,191}} + , { 6, 14, 2, {0,192}} + , { 6, 14, 2, {0,193}} + , { 6, 14, 2, {0,194}} + , { 6, 14, 2, {0,195}} + , { 6, 14, 2, {0,196}} + , { 6, 14, 2, {0,197}} + , { 6, 14, 2, {0,198}} + , { 6, 14, 2, {0,199}} + , { 6, 14, 2, {0,200}} + , { 6, 14, 2, {0,201}} + , { 6, 14, 2, {0,202}} + , { 6, 14, 2, {0,203}} + , { 6, 14, 2, {0,204}} + , { 6, 14, 2, {0,205}} + , { 6, 14, 2, {0,206}} + , { 6, 14, 2, {0,207}} + , { 6, 14, 2, {0,208}} + , { 6, 14, 2, {0,209}} + , { 6, 14, 2, {0,210}} + , { 6, 14, 2, {0,211}} + , { 6, 14, 2, {0,212}} + , { 6, 14, 2, {0,213}} + , { 6, 14, 2, {0,214}} + , { 6, 14, 2, {0,215}} + , { 6, 14, 2, {0,216}} + , { 6, 14, 2, {0,217}} + , { 6, 14, 2, {0,218}} + , { 6, 14, 2, {0,219}} + , { 6, 14, 2, {0,220}} + , { 6, 14, 2, {0,221}} + , { 6, 14, 2, {0,222}} + , { 6, 14, 2, {0,223}} + , { 6, 14, 2, {0,224}} + , { 6, 14, 2, {0,225}} + , { 6, 14, 2, {0,226}} + , { 6, 14, 2, {0,227}} + , { 6, 14, 2, {0,228}} + , { 6, 14, 2, {0,229}} + , { 6, 14, 2, {0,230}} + , { 6, 14, 2, {0,231}} + , { 6, 14, 2, {0,232}} + , { 6, 14, 2, {0,233}} + , { 6, 14, 2, {0,234}} + , { 6, 14, 2, {0,235}} + , { 6, 14, 2, {0,236}} + , { 6, 14, 2, {0,237}} + , { 6, 14, 2, {0,238}} + , { 6, 14, 2, {0,239}} + , { 6, 14, 2, {0,240}} + , { 6, 14, 2, {0,241}} + , { 6, 14, 2, {0,242}} + , { 6, 14, 2, {0,243}} + , { 6, 14, 2, {0,244}} + , { 6, 14, 2, {0,245}} + , { 6, 14, 2, {0,246}} + , { 6, 14, 2, {0,247}} + , { 6, 14, 2, {0,248}} + , { 6, 14, 2, {0,249}} + , { 6, 14, 2, {0,250}} + , { 6, 14, 2, {0,251}} + , { 6, 14, 2, {0,252}} + , { 6, 14, 2, {0,253}} + , { 6, 14, 2, {0,254}} + , { 6, 14, 2, {0,255}} + , { 6, 14, 2, {0,256}} + , { 6, 14, 2, {0,257}} + , { 6, 14, 2, {0,258}} + , { 6, 14, 2, {0,259}} + , { 6, 14, 2, {0,260}} + , { 6, 14, 2, {0,261}} + , { 6, 14, 2, {0,262}} + , { 6, 14, 2, {0,263}} + , { 6, 14, 2, {0,264}} + , { 6, 14, 2, {0,265}} + , { 6, 14, 2, {0,266}} + , { 6, 14, 2, {0,267}} + , { 6, 14, 2, {0,268}} + , { 6, 14, 2, {0,269}} + , { 6, 14, 2, {0,270}} + , { 6, 14, 2, {0,271}} + , { 10, 6, 1, {327681,0}} + , { 10, 6, 1, {327937,0}} + , { 10, 6, 1, {328193,0}} + , { 10, 6, 1, {328449,0}} + , { 10, 6, 1, {328705,0}} + , { 10, 6, 1, {328961,0}} + , { 10, 6, 1, {329217,0}} + , { 10, 6, 1, {329473,0}} + , { 10, 6, 1, {329729,0}} + , { 10, 6, 1, {329985,0}} + , { 10, 6, 1, {330241,0}} + , { 10, 6, 1, {330497,0}}}; + +static const struct vfc_read_task vfc_task_t_e3b0 = {vfc_vectors_t_e3b0, 1049}; +static const struct vfc_read_write_vector vfc_vectors_x_e3b0[1049] = { + { 4, 0, 0, {0,0}} + , { 4, 4, 0, {0,0}} + , { 4, 8, 0, {0,0}} + , { 4, 12, 0, {0,0}} + , { 4, 16, 0, {0,0}} + , { 4, 20, 0, {0,0}} + , { 4, 24, 0, {0,0}} + , { 4, 28, 0, {0,0}} + , { 4, 32, 0, {0,0}} + , { 4, 36, 0, {0,0}} + , { 4, 40, 0, {0,0}} + , { 4, 44, 0, {0,0}} + , { 4, 48, 0, {0,0}} + , { 4, 52, 0, {0,0}} + , { 4, 56, 0, {0,0}} + , { 4, 60, 0, {0,0}} + , { 4, 64, 0, {0,0}} + , { 4, 68, 0, {0,0}} + , { 4, 72, 0, {0,0}} + , { 4, 76, 0, {0,0}} + , { 4, 80, 0, {0,0}} + , { 4, 84, 0, {0,0}} + , { 4, 88, 0, {0,0}} + , { 4, 92, 0, {0,0}} + , { 4, 96, 0, {0,0}} + , { 4, 100, 0, {0,0}} + , { 4, 104, 0, {0,0}} + , { 4, 108, 0, {0,0}} + , { 4, 112, 0, {0,0}} + , { 4, 116, 0, {0,0}} + , { 4, 120, 0, {0,0}} + , { 4, 124, 0, {0,0}} + , { 4, 128, 0, {0,0}} + , { 4, 132, 0, {0,0}} + , { 4, 136, 0, {0,0}} + , { 4, 140, 0, {0,0}} + , { 4, 144, 0, {0,0}} + , { 4, 148, 0, {0,0}} + , { 4, 152, 0, {0,0}} + , { 4, 156, 0, {0,0}} + , { 4, 160, 0, {0,0}} + , { 4, 164, 0, {0,0}} + , { 4, 168, 0, {0,0}} + , { 4, 172, 0, {0,0}} + , { 4, 176, 0, {0,0}} + , { 4, 180, 0, {0,0}} + , { 4, 184, 0, {0,0}} + , { 4, 188, 0, {0,0}} + , { 4, 192, 0, {0,0}} + , { 4, 196, 0, {0,0}} + , { 4, 200, 0, {0,0}} + , { 4, 204, 0, {0,0}} + , { 4, 208, 0, {0,0}} + , { 4, 212, 0, {0,0}} + , { 4, 216, 0, {0,0}} + , { 4, 220, 0, {0,0}} + , { 4, 224, 0, {0,0}} + , { 4, 228, 0, {0,0}} + , { 4, 232, 0, {0,0}} + , { 4, 236, 0, {0,0}} + , { 4, 240, 0, {0,0}} + , { 4, 244, 0, {0,0}} + , { 4, 248, 0, {0,0}} + , { 4, 252, 0, {0,0}} + , { 4, 256, 0, {0,0}} + , { 4, 260, 0, {0,0}} + , { 4, 264, 0, {0,0}} + , { 4, 268, 0, {0,0}} + , { 4, 272, 0, {0,0}} + , { 4, 276, 0, {0,0}} + , { 4, 280, 0, {0,0}} + , { 4, 284, 0, {0,0}} + , { 4, 288, 0, {0,0}} + , { 4, 292, 0, {0,0}} + , { 4, 296, 0, {0,0}} + , { 4, 300, 0, {0,0}} + , { 4, 304, 0, {0,0}} + , { 4, 308, 0, {0,0}} + , { 4, 312, 0, {0,0}} + , { 4, 316, 0, {0,0}} + , { 4, 320, 0, {0,0}} + , { 4, 324, 0, {0,0}} + , { 4, 328, 0, {0,0}} + , { 4, 332, 0, {0,0}} + , { 4, 336, 0, {0,0}} + , { 4, 340, 0, {0,0}} + , { 4, 344, 0, {0,0}} + , { 4, 348, 0, {0,0}} + , { 4, 352, 0, {0,0}} + , { 4, 356, 0, {0,0}} + , { 4, 360, 0, {0,0}} + , { 4, 364, 0, {0,0}} + , { 4, 368, 0, {0,0}} + , { 4, 372, 0, {0,0}} + , { 4, 376, 0, {0,0}} + , { 4, 380, 0, {0,0}} + , { 4, 384, 0, {0,0}} + , { 4, 388, 0, {0,0}} + , { 4, 392, 0, {0,0}} + , { 4, 396, 0, {0,0}} + , { 4, 400, 0, {0,0}} + , { 4, 404, 0, {0,0}} + , { 4, 408, 0, {0,0}} + , { 4, 412, 0, {0,0}} + , { 4, 416, 0, {0,0}} + , { 4, 420, 0, {0,0}} + , { 4, 424, 0, {0,0}} + , { 4, 428, 0, {0,0}} + , { 4, 432, 0, {0,0}} + , { 4, 436, 0, {0,0}} + , { 4, 440, 0, {0,0}} + , { 4, 444, 0, {0,0}} + , { 4, 448, 0, {0,0}} + , { 4, 452, 0, {0,0}} + , { 4, 456, 0, {0,0}} + , { 4, 460, 0, {0,0}} + , { 4, 464, 0, {0,0}} + , { 4, 468, 0, {0,0}} + , { 4, 472, 0, {0,0}} + , { 4, 476, 0, {0,0}} + , { 4, 480, 0, {0,0}} + , { 4, 484, 0, {0,0}} + , { 4, 488, 0, {0,0}} + , { 4, 492, 0, {0,0}} + , { 4, 496, 0, {0,0}} + , { 4, 500, 0, {0,0}} + , { 4, 504, 0, {0,0}} + , { 4, 508, 0, {0,0}} + , { 4, 512, 0, {0,0}} + , { 4, 516, 0, {0,0}} + , { 4, 520, 0, {0,0}} + , { 4, 524, 0, {0,0}} + , { 4, 528, 0, {0,0}} + , { 4, 532, 0, {0,0}} + , { 4, 536, 0, {0,0}} + , { 4, 540, 0, {0,0}} + , { 4, 544, 0, {0,0}} + , { 4, 548, 0, {0,0}} + , { 4, 552, 0, {0,0}} + , { 4, 556, 0, {0,0}} + , { 4, 560, 0, {0,0}} + , { 4, 564, 0, {0,0}} + , { 4, 568, 0, {0,0}} + , { 4, 572, 0, {0,0}} + , { 4, 576, 0, {0,0}} + , { 4, 580, 0, {0,0}} + , { 4, 584, 0, {0,0}} + , { 4, 588, 0, {0,0}} + , { 4, 592, 0, {0,0}} + , { 4, 596, 0, {0,0}} + , { 4, 600, 0, {0,0}} + , { 4, 604, 0, {0,0}} + , { 4, 608, 0, {0,0}} + , { 4, 612, 0, {0,0}} + , { 4, 616, 0, {0,0}} + , { 4, 620, 0, {0,0}} + , { 4, 624, 0, {0,0}} + , { 4, 628, 0, {0,0}} + , { 4, 632, 0, {0,0}} + , { 4, 636, 0, {0,0}} + , { 4, 640, 0, {0,0}} + , { 4, 644, 0, {0,0}} + , { 4, 648, 0, {0,0}} + , { 4, 652, 0, {0,0}} + , { 4, 656, 0, {0,0}} + , { 4, 660, 0, {0,0}} + , { 4, 664, 0, {0,0}} + , { 4, 668, 0, {0,0}} + , { 4, 672, 0, {0,0}} + , { 4, 676, 0, {0,0}} + , { 4, 680, 0, {0,0}} + , { 4, 684, 0, {0,0}} + , { 4, 688, 0, {0,0}} + , { 4, 692, 0, {0,0}} + , { 4, 696, 0, {0,0}} + , { 4, 700, 0, {0,0}} + , { 4, 704, 0, {0,0}} + , { 4, 708, 0, {0,0}} + , { 4, 712, 0, {0,0}} + , { 4, 716, 0, {0,0}} + , { 4, 720, 0, {0,0}} + , { 4, 724, 0, {0,0}} + , { 4, 728, 0, {0,0}} + , { 4, 732, 0, {0,0}} + , { 4, 736, 0, {0,0}} + , { 4, 740, 0, {0,0}} + , { 4, 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+ , { 4, 2836, 0, {0,0}} + , { 4, 2840, 0, {0,0}} + , { 4, 2844, 0, {0,0}} + , { 4, 2848, 0, {0,0}} + , { 4, 2852, 0, {0,0}} + , { 4, 2856, 0, {0,0}} + , { 4, 2860, 0, {0,0}} + , { 4, 2864, 0, {0,0}} + , { 4, 2868, 0, {0,0}} + , { 4, 2872, 0, {0,0}} + , { 4, 2876, 0, {0,0}} + , { 4, 2880, 0, {0,0}} + , { 4, 2884, 0, {0,0}} + , { 4, 2888, 0, {0,0}} + , { 4, 2892, 0, {0,0}} + , { 4, 2896, 0, {0,0}} + , { 4, 2900, 0, {0,0}} + , { 4, 2904, 0, {0,0}} + , { 4, 2908, 0, {0,0}} + , { 4, 2912, 0, {0,0}} + , { 4, 2916, 0, {0,0}} + , { 4, 2920, 0, {0,0}} + , { 4, 2924, 0, {0,0}} + , { 4, 2928, 0, {0,0}} + , { 4, 2932, 0, {0,0}} + , { 4, 2936, 0, {0,0}} + , { 4, 2940, 0, {0,0}} + , { 4, 2944, 0, {0,0}} + , { 4, 2948, 0, {0,0}} + , { 4, 2952, 0, {0,0}} + , { 4, 2956, 0, {0,0}} + , { 4, 2960, 0, {0,0}} + , { 4, 2964, 0, {0,0}} + , { 4, 2968, 0, {0,0}} + , { 4, 2972, 0, {0,0}} + , { 4, 2976, 0, {0,0}} + , { 4, 2980, 0, {0,0}} + , { 4, 2984, 0, {0,0}} + , { 4, 2988, 0, {0,0}} + , { 4, 2992, 0, {0,0}} + , { 4, 2996, 0, {0,0}} + , { 4, 3000, 0, {0,0}} + , { 4, 3004, 0, {0,0}} + , { 4, 3008, 0, {0,0}} + , { 4, 3012, 0, {0,0}} + , { 4, 3016, 0, {0,0}} + , { 4, 3020, 0, {0,0}} + , { 4, 3024, 0, {0,0}} + , { 4, 3028, 0, {0,0}} + , { 4, 3032, 0, {0,0}} + , { 4, 3036, 0, {0,0}} + , { 4, 3040, 0, {0,0}} + , { 4, 3044, 0, {0,0}} + , { 4, 3048, 0, {0,0}} + , { 4, 3052, 0, {0,0}} + , { 4, 3056, 0, {0,0}} + , { 6, 14, 2, {0,0}} + , { 6, 14, 2, {0,1}} + , { 6, 14, 2, {0,2}} + , { 6, 14, 2, {0,3}} + , { 6, 14, 2, {0,4}} + , { 6, 14, 2, {0,5}} + , { 6, 14, 2, {0,6}} + , { 6, 14, 2, {0,7}} + , { 6, 14, 2, {0,8}} + , { 6, 14, 2, {0,9}} + , { 6, 14, 2, {0,10}} + , { 6, 14, 2, {0,11}} + , { 6, 14, 2, {0,12}} + , { 6, 14, 2, {0,13}} + , { 6, 14, 2, {0,14}} + , { 6, 14, 2, {0,15}} + , { 6, 14, 2, {0,16}} + , { 6, 14, 2, {0,17}} + , { 6, 14, 2, {0,18}} + , { 6, 14, 2, {0,19}} + , { 6, 14, 2, {0,20}} + , { 6, 14, 2, {0,21}} + , { 6, 14, 2, {0,22}} + , { 6, 14, 2, {0,23}} + , { 6, 14, 2, {0,24}} + , { 6, 14, 2, {0,25}} + , { 6, 14, 2, {0,26}} + , { 6, 14, 2, {0,27}} + , { 6, 14, 2, {0,28}} + , { 6, 14, 2, {0,29}} + , { 6, 14, 2, {0,30}} + , { 6, 14, 2, {0,31}} + , { 6, 14, 2, {0,32}} + , { 6, 14, 2, {0,33}} + , { 6, 14, 2, {0,34}} + , { 6, 14, 2, {0,35}} + , { 6, 14, 2, {0,36}} + , { 6, 14, 2, {0,37}} + , { 6, 14, 2, {0,38}} + , { 6, 14, 2, {0,39}} + , { 6, 14, 2, {0,40}} + , { 6, 14, 2, {0,41}} + , { 6, 14, 2, {0,42}} + , { 6, 14, 2, {0,43}} + , { 6, 14, 2, {0,44}} + , { 6, 14, 2, {0,45}} + , { 6, 14, 2, {0,46}} + , { 6, 14, 2, {0,47}} + , { 6, 14, 2, {0,48}} + , { 6, 14, 2, {0,49}} + , { 6, 14, 2, {0,50}} + , { 6, 14, 2, {0,51}} + , { 6, 14, 2, {0,52}} + , { 6, 14, 2, {0,53}} + , { 6, 14, 2, {0,54}} + , { 6, 14, 2, {0,55}} + , { 6, 14, 2, {0,56}} + , { 6, 14, 2, {0,57}} + , { 6, 14, 2, {0,58}} + , { 6, 14, 2, {0,59}} + , { 6, 14, 2, {0,60}} + , { 6, 14, 2, {0,61}} + , { 6, 14, 2, {0,62}} + , { 6, 14, 2, {0,63}} + , { 6, 14, 2, {0,64}} + , { 6, 14, 2, {0,65}} + , { 6, 14, 2, {0,66}} + , { 6, 14, 2, {0,67}} + , { 6, 14, 2, {0,68}} + , { 6, 14, 2, {0,69}} + , { 6, 14, 2, {0,70}} + , { 6, 14, 2, {0,71}} + , { 6, 14, 2, {0,72}} + , { 6, 14, 2, {0,73}} + , { 6, 14, 2, {0,74}} + , { 6, 14, 2, {0,75}} + , { 6, 14, 2, {0,76}} + , { 6, 14, 2, {0,77}} + , { 6, 14, 2, {0,78}} + , { 6, 14, 2, {0,79}} + , { 6, 14, 2, {0,80}} + , { 6, 14, 2, {0,81}} + , { 6, 14, 2, {0,82}} + , { 6, 14, 2, {0,83}} + , { 6, 14, 2, {0,84}} + , { 6, 14, 2, {0,85}} + , { 6, 14, 2, {0,86}} + , { 6, 14, 2, {0,87}} + , { 6, 14, 2, {0,88}} + , { 6, 14, 2, {0,89}} + , { 6, 14, 2, {0,90}} + , { 6, 14, 2, {0,91}} + , { 6, 14, 2, {0,92}} + , { 6, 14, 2, {0,93}} + , { 6, 14, 2, {0,94}} + , { 6, 14, 2, {0,95}} + , { 6, 14, 2, {0,96}} + , { 6, 14, 2, {0,97}} + , { 6, 14, 2, {0,98}} + , { 6, 14, 2, {0,99}} + , { 6, 14, 2, {0,100}} + , { 6, 14, 2, {0,101}} + , { 6, 14, 2, {0,102}} + , { 6, 14, 2, {0,103}} + , { 6, 14, 2, {0,104}} + , { 6, 14, 2, {0,105}} + , { 6, 14, 2, {0,106}} + , { 6, 14, 2, {0,107}} + , { 6, 14, 2, {0,108}} + , { 6, 14, 2, {0,109}} + , { 6, 14, 2, {0,110}} + , { 6, 14, 2, {0,111}} + , { 6, 14, 2, {0,112}} + , { 6, 14, 2, {0,113}} + , { 6, 14, 2, {0,114}} + , { 6, 14, 2, {0,115}} + , { 6, 14, 2, {0,116}} + , { 6, 14, 2, {0,117}} + , { 6, 14, 2, {0,118}} + , { 6, 14, 2, {0,119}} + , { 6, 14, 2, {0,120}} + , { 6, 14, 2, {0,121}} + , { 6, 14, 2, {0,122}} + , { 6, 14, 2, {0,123}} + , { 6, 14, 2, {0,124}} + , { 6, 14, 2, {0,125}} + , { 6, 14, 2, {0,126}} + , { 6, 14, 2, {0,127}} + , { 6, 14, 2, {0,128}} + , { 6, 14, 2, {0,129}} + , { 6, 14, 2, {0,130}} + , { 6, 14, 2, {0,131}} + , { 6, 14, 2, {0,132}} + , { 6, 14, 2, {0,133}} + , { 6, 14, 2, {0,134}} + , { 6, 14, 2, {0,135}} + , { 6, 14, 2, {0,136}} + , { 6, 14, 2, {0,137}} + , { 6, 14, 2, {0,138}} + , { 6, 14, 2, {0,139}} + , { 6, 14, 2, {0,140}} + , { 6, 14, 2, {0,141}} + , { 6, 14, 2, {0,142}} + , { 6, 14, 2, {0,143}} + , { 6, 14, 2, {0,144}} + , { 6, 14, 2, {0,145}} + , { 6, 14, 2, {0,146}} + , { 6, 14, 2, {0,147}} + , { 6, 14, 2, {0,148}} + , { 6, 14, 2, {0,149}} + , { 6, 14, 2, {0,150}} + , { 6, 14, 2, {0,151}} + , { 6, 14, 2, {0,152}} + , { 6, 14, 2, {0,153}} + , { 6, 14, 2, {0,154}} + , { 6, 14, 2, {0,155}} + , { 6, 14, 2, {0,156}} + , { 6, 14, 2, {0,157}} + , { 6, 14, 2, {0,158}} + , { 6, 14, 2, {0,159}} + , { 6, 14, 2, {0,160}} + , { 6, 14, 2, {0,161}} + , { 6, 14, 2, {0,162}} + , { 6, 14, 2, {0,163}} + , { 6, 14, 2, {0,164}} + , { 6, 14, 2, {0,165}} + , { 6, 14, 2, {0,166}} + , { 6, 14, 2, {0,167}} + , { 6, 14, 2, {0,168}} + , { 6, 14, 2, {0,169}} + , { 6, 14, 2, {0,170}} + , { 6, 14, 2, {0,171}} + , { 6, 14, 2, {0,172}} + , { 6, 14, 2, {0,173}} + , { 6, 14, 2, {0,174}} + , { 6, 14, 2, {0,175}} + , { 6, 14, 2, {0,176}} + , { 6, 14, 2, {0,177}} + , { 6, 14, 2, {0,178}} + , { 6, 14, 2, {0,179}} + , { 6, 14, 2, {0,180}} + , { 6, 14, 2, {0,181}} + , { 6, 14, 2, {0,182}} + , { 6, 14, 2, {0,183}} + , { 6, 14, 2, {0,184}} + , { 6, 14, 2, {0,185}} + , { 6, 14, 2, {0,186}} + , { 6, 14, 2, {0,187}} + , { 6, 14, 2, {0,188}} + , { 6, 14, 2, {0,189}} + , { 6, 14, 2, {0,190}} + , { 6, 14, 2, {0,191}} + , { 6, 14, 2, {0,192}} + , { 6, 14, 2, {0,193}} + , { 6, 14, 2, {0,194}} + , { 6, 14, 2, {0,195}} + , { 6, 14, 2, {0,196}} + , { 6, 14, 2, {0,197}} + , { 6, 14, 2, {0,198}} + , { 6, 14, 2, {0,199}} + , { 6, 14, 2, {0,200}} + , { 6, 14, 2, {0,201}} + , { 6, 14, 2, {0,202}} + , { 6, 14, 2, {0,203}} + , { 6, 14, 2, {0,204}} + , { 6, 14, 2, {0,205}} + , { 6, 14, 2, {0,206}} + , { 6, 14, 2, {0,207}} + , { 6, 14, 2, {0,208}} + , { 6, 14, 2, {0,209}} + , { 6, 14, 2, {0,210}} + , { 6, 14, 2, {0,211}} + , { 6, 14, 2, {0,212}} + , { 6, 14, 2, {0,213}} + , { 6, 14, 2, {0,214}} + , { 6, 14, 2, {0,215}} + , { 6, 14, 2, {0,216}} + , { 6, 14, 2, {0,217}} + , { 6, 14, 2, {0,218}} + , { 6, 14, 2, {0,219}} + , { 6, 14, 2, {0,220}} + , { 6, 14, 2, {0,221}} + , { 6, 14, 2, {0,222}} + , { 6, 14, 2, {0,223}} + , { 6, 14, 2, {0,224}} + , { 6, 14, 2, {0,225}} + , { 6, 14, 2, {0,226}} + , { 6, 14, 2, {0,227}} + , { 6, 14, 2, {0,228}} + , { 6, 14, 2, {0,229}} + , { 6, 14, 2, {0,230}} + , { 6, 14, 2, {0,231}} + , { 6, 14, 2, {0,232}} + , { 6, 14, 2, {0,233}} + , { 6, 14, 2, {0,234}} + , { 6, 14, 2, {0,235}} + , { 6, 14, 2, {0,236}} + , { 6, 14, 2, {0,237}} + , { 6, 14, 2, {0,238}} + , { 6, 14, 2, {0,239}} + , { 6, 14, 2, {0,240}} + , { 6, 14, 2, {0,241}} + , { 6, 14, 2, {0,242}} + , { 6, 14, 2, {0,243}} + , { 6, 14, 2, {0,244}} + , { 6, 14, 2, {0,245}} + , { 6, 14, 2, {0,246}} + , { 6, 14, 2, {0,247}} + , { 6, 14, 2, {0,248}} + , { 6, 14, 2, {0,249}} + , { 6, 14, 2, {0,250}} + , { 6, 14, 2, {0,251}} + , { 6, 14, 2, {0,252}} + , { 6, 14, 2, {0,253}} + , { 6, 14, 2, {0,254}} + , { 6, 14, 2, {0,255}} + , { 6, 14, 2, {0,256}} + , { 6, 14, 2, {0,257}} + , { 6, 14, 2, {0,258}} + , { 6, 14, 2, {0,259}} + , { 6, 14, 2, {0,260}} + , { 6, 14, 2, {0,261}} + , { 6, 14, 2, {0,262}} + , { 6, 14, 2, {0,263}} + , { 6, 14, 2, {0,264}} + , { 6, 14, 2, {0,265}} + , { 6, 14, 2, {0,266}} + , { 6, 14, 2, {0,267}} + , { 6, 14, 2, {0,268}} + , { 6, 14, 2, {0,269}} + , { 6, 14, 2, {0,270}} + , { 6, 14, 2, {0,271}} + , { 10, 6, 1, {327681,0}} + , { 10, 6, 1, {327937,0}} + , { 10, 6, 1, {328193,0}} + , { 10, 6, 1, {328449,0}} + , { 10, 6, 1, {328705,0}} + , { 10, 6, 1, {328961,0}} + , { 10, 6, 1, {329217,0}} + , { 10, 6, 1, {329473,0}} + , { 10, 6, 1, {329729,0}} + , { 10, 6, 1, {329985,0}} + , { 10, 6, 1, {330241,0}} + , { 10, 6, 1, {330497,0}}}; + +static const struct vfc_read_task vfc_task_x_e3b0 = {vfc_vectors_x_e3b0, 1049}; + + + +static const struct igu_data igu_address_e3b0 = { + 1, 10, 0x130034, 0x130130, { 0x00130178, 0x0013017c} +}; + + +#define PAGE_MODE_VALUES_E1 0 + +#define PAGE_READ_REGS_E1 0 + +#define PAGE_WRITE_REGS_E1 0 + +static const u32 page_vals_e1[] = {0}; + +static const u32 page_write_regs_e1[] = {0}; + +static const struct reg_addr page_read_regs_e1[] = { + {0x0, 0, RI_E1_ONLINE} +}; + +#define PAGE_MODE_VALUES_E1H 0 + + +#define PAGE_READ_REGS_E1H 0 + +#define PAGE_WRITE_REGS_E1H 0 + +static const u32 page_vals_e1h[] = {0}; + +static const u32 page_write_regs_e1h[] = {0}; + +static const struct reg_addr page_read_regs_e1h[] = { + {0x0, 0, RI_E1H_ONLINE} +}; + +#endif +#define PAGE_MODE_VALUES_E2 2 + + +#define PAGE_READ_REGS_E2 1 + +#define PAGE_WRITE_REGS_E2 1 + +static const u32 page_vals_e2[] = { 0, 128}; + +static const u32 page_write_regs_e2[] = {328476}; + +static const struct reg_addr page_read_regs_e2[] = { + {0x58000, 4608, RI_E2_ONLINE} +}; + +#define PAGE_MODE_VALUES_E3 2 + + +#define PAGE_READ_REGS_E3 1 + +#define PAGE_WRITE_REGS_E3 1 + +static const u32 page_vals_e3[] = { 0, 128}; + +static const u32 page_write_regs_e3[] = {328476}; + +static const struct reg_addr page_read_regs_e3[] = { + {0x58000, 4608, RI_E3E3B0_ONLINE} +}; + +#endif diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin.c b/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin.c deleted file mode 100644 index 582ca8c..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin.c +++ /dev/null @@ -1,1978 +0,0 @@ -/* bnx2x_plugin.c: Broadcom bnx2x NPA plugin - * - * Copyright 2009-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Written by: Shmulik Ravid - * - */ -#include "vm_basic_types.h" -#include "npa_plugin_api.h" - -/*#define PLUGIN_DP*/ -#define PLUGIN_ENFORCE_SECURITY - - -#include "bnx2x_plugin_defs.h" -#include "bnx2x_plugin_hw.h" -#include "bnx2x_plugin_hsi.h" - -/* include definitions common to the plugin and the ESX host */ -#define BNX2X_PASSTHRU -#define BNX2X_PT_PLUGIN -#include "../bnx2x_vfpf_if.h" - -#include "bnx2x_plugin.h" - -#ifdef __CHIPSIM_NPA__ - #include "chipsim_npa_compat.h" -#else - #include "bnx2x_plugin_compat.h" -#endif - -#define DP_RING_RAW(base, byte_len, iter) \ - do { \ - for((iter) = 0; (iter) < ((byte_len) >> 3); (iter)++) { \ - DP(3, "%04d: %08x %08x\n", (iter), \ - *((u32*)((char*)(base) + ((iter) << 3))), \ - *((u32*)((char*)(base) + ((iter) << 3) + 4))); \ - } \ - } while (0) \ - - - -static inline void -bnx2x_plugin_dump_rings_raw(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_rx_queue *fp) -{ - int i; - DP(0, "BD RING:\n"); - DP_RING_RAW(fp->rx_desc_ring, - fp->rx_bd_prod.num_pages * PLUGIN_RING_UNIT_SIZE, i); - - DP(0, "RCQ RING:\n"); - DP_RING_RAW(fp->rx_comp_ring, - fp->rx_comp_cons.num_pages * PLUGIN_RING_UNIT_SIZE, i); - - if (!BP_TPA_DISABLED(bp)) { - DP(0, "SGE RING:\n"); - DP_RING_RAW(fp->rx_sge_ring, RX_SGE_SIZE, i); - } -} - -static inline void -bnx2x_plugin_dump_rpos(Plugin_State *ps, char* name, struct plugin_rpos* rpos) -{ - DP(5,"%s: pos %d, poff %d, pcnt %d, num_p %d\n", - name,rpos->pos,rpos->page_off, rpos->page_cnt,rpos->num_pages); -} - -static inline void -bnx2x_plugin_dump_rx_bd(Plugin_State *ps, - struct bnx2x_plugin_rx_queue *fp, - struct eth_rx_bd *rx_bd, - u16 bd_idx, u32 bufid, dma_addr_t mapping) -{ - DP(9, "rx-bd[%d] - bufid %d, uid %d, buf_addr(%x:%x @%p), " - "bd_addr %p, prod %d, prod-page-offset %d\n", - bd_idx, bufid, fp->rx_uid_ring[bd_idx], - rx_bd->addr_hi, rx_bd->addr_lo, mapping, rx_bd, - fp->rx_bd_prod.pos, fp->rx_bd_prod.page_off); -} - -static inline void -bnx2x_plugin_dump_cqe(Plugin_State *ps, union eth_rx_cqe *cqe, u32 bufid) -{ - - DP(8, "CQE type %x err %x status %x hash %x vlan %x " - "len %u pad %d bufid %d\n", - CQE_TYPE(cqe->fast_path_cqe.type_error_flags), - cqe->fast_path_cqe.type_error_flags, - cqe->fast_path_cqe.status_flags, - le32_to_cpu(cqe->fast_path_cqe.rss_hash_result), - le16_to_cpu(cqe->fast_path_cqe.vlan_tag), - le16_to_cpu(cqe->fast_path_cqe.pkt_len), - le16_to_cpu(cqe->fast_path_cqe.placement_offset), - bufid); -} - - -static inline void -bnx2x_plugin_dump_rxq_init(Plugin_State *ps, - struct bnx2x_plugin_rx_queue *fp, - struct bnx2x_plugin_queue_dma_info *rx_dma) -{ - DP(3, "RXQ[%d] - sb %p, uid %p\n", - fp->idx, fp->status_blk, fp->rx_uid_ring); - DP(4, "RXQ[%d] - rx-{%p, %d, %x}\n", - fp->idx, fp->rx_desc_ring, - RX_DESC_NUM_PAGES(rx_dma->num_desc), - RX_DESC_OFFSET(rx_dma->pa, rx_dma->num_desc)); - DP(4, "RXQ[%d] - rcq-{%p, %d, %x}\n", - fp->idx, fp->rx_comp_ring, - RX_RCQ_NUM_PAGES(rx_dma->num_desc), - RX_RCQ_OFFSET(rx_dma->pa, rx_dma->num_desc)); - DP(4, "RXQ[%d] - sge-{%p, %d, %x)\n", - fp->idx, fp->rx_sge_ring, - RX_SGE_NUM_PAGES, - RX_SGE_OFFSET(rx_dma->pa, rx_dma->num_desc)); - -} - -static inline void -bnx2x_plugin_dump_recv_frame(Plugin_State *ps, - Shell_RecvFrame *frame) -{ - u32 i; - - DP(6, "RxFrame[1]: ptr %p, sg_len %d, byte_len %d, bufid %d, " - "sge_len %d, offset %d\n", - frame, - frame->sgLength, - frame->byteLength, - frame->sg[0].ringOffset, - frame->sg[0].length, - frame->firstSgOffset); - - for (i = 1; i < frame->sgLength; i++) - DP(3, "RxFrame[1-%d]: frag_len %d, bufid %d\n", i, - frame->sg[i].length, - frame->sg[i].ringOffset); - - - DP(6, "RxFrame[2]: matched %d, vlan %d, vlan-tag %d, rss-func %d, " - "rss-type %d, rss-val %d\n", - frame->perfectFiltered, - frame->vlan, - frame->vlanTag, - frame->rssHashFunction, - frame->rssHashType, - frame->rssHashValue); - - DP(8, "RxFrame[3]: ipv4 %d, ipv6 %d, non-ip %d, tcp %d, udp %d, " - "ip-xsum %d, tcp-xsum %d, udp-xsum %d\n", - frame->ipv4, - frame->ipv6, - frame->nonIp, - frame->tcp, - frame->udp, - frame->ipXsum, - frame->tcpXsum, - frame->udpXsum); -} -static inline void -bnx2x_plugin_dump_entry_point(Plugin_State *ps, char* name, u64 addr) -{ - DP(3, "%s - (%x:%x)\n", name, U64_HI(addr), U64_LO(addr)); -} -static inline void -bnx2x_plugin_dump_entry_pointes(Plugin_State *ps) -{ - bnx2x_plugin_dump_entry_point(ps, "swInit", - (u64)bnx2x_plugin_sw_init); - bnx2x_plugin_dump_entry_point(ps, "reinitRxRing", - (u64)bnx2x_plugin_reinit_rx_ring); - bnx2x_plugin_dump_entry_point(ps, "reinitTxRing", - (u64)bnx2x_plugin_reinit_tx_ring); - bnx2x_plugin_dump_entry_point(ps, "enableInterrupt", - (u64)bnx2x_plugin_enable_interrupt); - bnx2x_plugin_dump_entry_point(ps, "disableInterrupt", - (u64)bnx2x_plugin_disable_interrupt); - bnx2x_plugin_dump_entry_point(ps, "addFrameToTxRing", - (u64)bnx2x_plugin_add_frame_tx_ring); - bnx2x_plugin_dump_entry_point(ps, "checkTxRing", - (u64)bnx2x_plugin_check_tx_ring); - bnx2x_plugin_dump_entry_point(ps, "checkRxRing", - (u64)bnx2x_plugin_check_rx_ring); - bnx2x_plugin_dump_entry_point(ps, "addBuffersToRxRing", - (u64)bnx2x_plugin_add_bufs_rx_ring); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_update_rx_sb_idx -* -* Samples the rx status block index -* -* Result: -* None -* -*---------------------------------------------------------------------------- -*/ -static inline void bnx2x_plugin_update_rx_sb_idx(struct bnx2x_plugin_rx_queue *fp) -{ - fp->sw_sb_idx = le16_to_cpu(fp->status_blk->sb.running_index[SB_SEG_U]); -} -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_update_tx_sb_idx -* -* Samples the tx status block index -* -* Result: -* None -* -*---------------------------------------------------------------------------- -*/ -static inline -void bnx2x_plugin_update_tx_sb_idx(struct bnx2x_plugin_tx_queue *fp) -{ - fp->sw_sb_idx = le16_to_cpu(fp->status_blk->sb.running_index[SB_SEG_C]); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_clear_sge_mask_next_elems -* -* Clears the next pointer bits on the sge_mask -* -* Result: -* None -* -*---------------------------------------------------------------------------- -*/ -static inline -void bnx2x_plugin_clear_sge_mask_next_elems(struct bnx2x_plugin_rx_queue *fp) -{ - int i,j; - for (i = 1; i <= RX_SGE_NUM_PAGES; i++) { - int bit_idx = RX_SGE_PAGE * i; - - /* clear last 2 bits */ - for( j = 0; j < 2; j++) { - bit_idx--; - SGE_MASK_CLEAR_BIT(fp, bit_idx); - } - } -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_init_tx_fp -* -* Initialize a TX fast path queue -* -* Result: -* None -* -* Side-effects: -* None -* -*---------------------------------------------------------------------------- -*/ -static void -bnx2x_plugin_init_tx_fp(Plugin_State *ps, - struct bnx2x_plugin_tx_queue *fp, - struct bnx2x_plugin_queue_dma_info *tx_dma, - struct hw_sb_info *sb_info, u32 idx) -{ - u16 i, num_pages; - dma_addr_t mapping; - struct bnx2x_vf_plugin_stats *vf_stats; - - fp->status_blk = (struct host_hc_status_block_e2*) - SB_OFFSET(tx_dma->va, tx_dma->num_desc); - - fp->tx_desc_ring = (union eth_tx_bd_types*) - TX_DESC_OFFSET(tx_dma->va, tx_dma->num_desc); - - fp->sb_id = sb_info->hw_sb_id; - fp->idx = (u8)idx; - - /* doorbell */ - fp->tx_db.data.header.header = DOORBELL_HDR_DB_TYPE; - fp->tx_db.data.zero_fill1 = 0; - fp->tx_db.data.prod = 0; - - fp->num_desc = tx_dma->num_desc; - fp->tx_cons_sb = BNX2X_PLUGIN_TX_SB_INDEX; - - /* set the next-pointers */ - num_pages = TX_DESC_NUM_PAGES(tx_dma->num_desc); - mapping = TX_DESC_OFFSET(tx_dma->pa, tx_dma->num_desc); - for (i = 1; i <= num_pages; i++) { - struct eth_tx_next_bd *tx_next_bd = - &fp->tx_desc_ring[TX_DESC_PAGE * i - 1].next_bd; - - tx_next_bd->addr_hi = cpu_to_le32(U64_HI(mapping + - PLUGIN_RING_UNIT_SIZE*(i % num_pages))); - tx_next_bd->addr_lo = cpu_to_le32(U64_LO(mapping + - PLUGIN_RING_UNIT_SIZE*(i % num_pages))); - } - fp->tx_bd_cons.num_pages = num_pages; - fp->tx_bd_prod.num_pages = num_pages; - - /* set pointer to shared statistics */ - vf_stats = (struct bnx2x_vf_plugin_stats *)ps->shared; - fp->tx_stats = &vf_stats->txq_stats[idx]; - -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_init_rx_fp -* -* Initialize a RX fast path queue -* -* Result: -* None -* -* Side-effects: -* None -* -*---------------------------------------------------------------------------- -*/ -static void -bnx2x_plugin_init_rx_fp(Plugin_State *ps, - struct bnx2x_priv* bp, - struct bnx2x_plugin_rx_queue *fp, - struct bnx2x_plugin_queue_dma_info *rx_dma, - struct bnx2x_plugin_queue_dma_info *tx_dma, - struct hw_sb_info *sb_info, u8 hw_qid, u32 idx) -{ - u16 i, num_pages; - dma_addr_t mapping; - struct bnx2x_vf_plugin_stats *vf_stats; - - fp->status_blk = (struct host_hc_status_block_e2*) - SB_OFFSET(tx_dma->va, tx_dma->num_desc); - - /* just in case - consider removing */ - bnx2x_plugin_bzero((char*)fp->status_blk, - sizeof(struct host_hc_status_block_e2)); - - fp->rx_desc_ring = (struct eth_rx_bd*) - RX_DESC_OFFSET(rx_dma->va, rx_dma->num_desc); - - fp->rx_comp_ring = (union eth_rx_cqe*) - RX_RCQ_OFFSET(rx_dma->va, rx_dma->num_desc); - - fp->rx_sge_ring = - (struct eth_rx_sge*)RX_SGE_OFFSET(rx_dma->va, rx_dma->num_desc); - - fp->rx_uid_ring = (u16*)RX_UID_OFFSET(tx_dma->va, tx_dma->num_desc); - - fp->q_id = hw_qid; - fp->sb_id = sb_info->hw_sb_id; - fp->idx = (u8)idx; - fp->rx_cons_sb = BNX2X_PLUGIN_RCQ_SB_INDEX; - - /* set the next-pointers */ - - /* rx_desc */ - num_pages = RX_DESC_NUM_PAGES(rx_dma->num_desc); - mapping = RX_DESC_OFFSET(rx_dma->pa, rx_dma->num_desc); - - bnx2x_plugin_bzero((char*)fp->rx_desc_ring, - num_pages * PLUGIN_RING_UNIT_SIZE); - - fp->num_desc = min(rx_dma->num_desc - RX_SGE_COUNT, - (u16)(num_pages * RX_DESC_PAGE_MAX)); - - for (i = 1; i <= num_pages; i++) { - struct eth_rx_bd *rx_bd; - rx_bd = &fp->rx_desc_ring[RX_DESC_PAGE * i - 2]; - - rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping + - PLUGIN_RING_UNIT_SIZE*(i % num_pages))); - rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping + - PLUGIN_RING_UNIT_SIZE*(i % num_pages))); - DP(2,"rx-bd-np %x:%x\n", rx_bd->addr_hi, rx_bd->addr_lo); - } - fp->rx_bd_cons.num_pages = num_pages; - fp->rx_bd_prod.num_pages = num_pages; - fp->rx_uid_cons.num_pages = num_pages; - - /* rcq */ - num_pages = RX_RCQ_NUM_PAGES(rx_dma->num_desc); - mapping = RX_RCQ_OFFSET(rx_dma->pa, rx_dma->num_desc); - - bnx2x_plugin_bzero((char*)fp->rx_comp_ring, - num_pages * PLUGIN_RING_UNIT_SIZE); - - for (i = 1; i <= num_pages; i++) { - struct eth_rx_cqe_next_page *nextpg; - nextpg = (struct eth_rx_cqe_next_page *) - &fp->rx_comp_ring[RX_RCQ_PAGE * i - 1]; - - nextpg->addr_hi = cpu_to_le32(U64_HI(mapping + - PLUGIN_RING_UNIT_SIZE*(i % num_pages))); - nextpg->addr_lo = cpu_to_le32(U64_LO(mapping + - PLUGIN_RING_UNIT_SIZE*(i % num_pages))); - DP(2,"rcq-bd-np %x:%x\n", nextpg->addr_hi, nextpg->addr_lo); - } - fp->rx_comp_cons.num_pages = num_pages; - - /* sge */ - num_pages = RX_SGE_NUM_PAGES; - mapping = RX_SGE_OFFSET(rx_dma->pa, rx_dma->num_desc); - - bnx2x_plugin_bzero((char*)fp->rx_sge_ring, - num_pages * PLUGIN_RING_UNIT_SIZE); - - for (i = 1; i <= num_pages; i++) { - struct eth_rx_sge *sge; - sge = &fp->rx_sge_ring[RX_SGE_PAGE * i - 2]; - - sge->addr_hi =cpu_to_le32(U64_HI(mapping + - PLUGIN_RING_UNIT_SIZE*(i % num_pages))); - sge->addr_lo =cpu_to_le32(U64_LO(mapping + - PLUGIN_RING_UNIT_SIZE*(i % num_pages))); - DP(2,"sge-np %x:%x\n", sge->addr_hi, sge->addr_lo); - } - bnx2x_plugin_dump_rxq_init(ps, fp, rx_dma); - - for (i = 0; i < ETH_MAX_AGG_QUEUES; i++) - fp->tpa_pool[i].state = BNX2X_PLUGIN_TPA_STOP; - - /* set pointer to shared statistics */ - vf_stats = (struct bnx2x_vf_plugin_stats *)ps->shared; - fp->rx_stats = &vf_stats->rxq_stats[idx]; -} - - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_ack_sb -* -* Status block acknowledgment write back the updated index and enable -* (or disable) interrupts for that Status block -* id and the queue index -* -* Result: -* None -* -* Side-effects: -* Interrupts enabled/disabled for the specific status block -* -*---------------------------------------------------------------------------- -*/ -static void -bnx2x_plugin_ack_sb(Plugin_State *ps, struct bnx2x_priv *bp, - u16 sb_id, u8 storm_id, u32 sb_index, u8 op, u8 update) -{ - struct igu_regular cmd_data; - - cmd_data.sb_id_and_flags = - ((sb_index << IGU_REGULAR_SB_INDEX_SHIFT) | - (IGU_SEG_ACCESS_NORM << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | - (update << IGU_REGULAR_BUPDATE_SHIFT) | - (op << IGU_REGULAR_ENABLE_INT_SHIFT)); - - IGU_ACK(ps, (IGU_CMD_INT_ACK_BASE + sb_id)*8, cmd_data.sb_id_and_flags); -} - - -static inline s16 __bnx2x_plugin_tx_used(struct bnx2x_plugin_tx_queue *fp) -{ - u16 prod, cons; - - prod = fp->tx_bd_prod.pos; - cons = fp->tx_bd_cons.pos; - return SUB_S16(prod, cons); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_tx_avail -* -* checks how many TX descriptors are available -* -* Result: -* number of available descriptors -* -* Side-effects: -* None -* -*---------------------------------------------------------------------------- -*/ -static inline u16 bnx2x_plugin_tx_avail(struct bnx2x_plugin_tx_queue *fp) -{ - return (s16)(fp->num_desc) - __bnx2x_plugin_tx_used(fp); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_cqe_info -* -* calculate the receive flags according to the completion WQE -* -* Result: -* None -* -* Side-effects: -* None -* -*---------------------------------------------------------------------------- -*/ -#define BNX2X_PLUGIN_CQE_MATCH(cqe) \ - (((cqe)->status_flags & ETH_FAST_PATH_RX_CQE_MAC_MATCH_FLG) ? 1 : 0) - -#define BNX2X_PLUGIN_CQE_VLAN(cqe) \ - (((cqe)->pars_flags.flags & PARSING_FLAGS_INNER_VLAN_EXIST) ? 1 : 0) - -#define BNX2X_PLUGIN_CQE_OVERETH(cqe) \ - (((cqe)->pars_flags.flags & PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) >> \ - PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT) - -#define BNX2X_PLUGIN_CQE_OVERIP(cqe) \ - (((cqe)->pars_flags.flags & PARSING_FLAGS_OVER_IP_PROTOCOL) >> \ - PARSING_FLAGS_OVER_IP_PROTOCOL_SHIFT) - -#define BNX2X_PLUGIN_CQE_IP_XSUM(cqe) \ - (((cqe)->status_flags & ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG) \ - ? SHELL_XSUM_UNKNOWN : \ - ((cqe)->type_error_flags & ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG \ - ? SHELL_XSUM_INCORRECT : SHELL_XSUM_CORRECT)) - -#define BNX2X_PLUGIN_CQE_L4_XSUM(cqe) \ - (((cqe)->status_flags & ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG) \ - ? SHELL_XSUM_UNKNOWN : \ - (((cqe)->type_error_flags & ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG) \ - ? SHELL_XSUM_INCORRECT : SHELL_XSUM_CORRECT)) - -#define BNX2X_PLUGIN_CQE_HASH_TYPE(cqe) \ - (((cqe)->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE) >> \ - ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE_SHIFT) - -#define BNX2X_PLUGIN_CQE_HASH_FUNCTION(cqe) \ - (((cqe)->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG) ? \ - SHELL_RECV_HASH_FUNCTION_TOEPLITZ : SHELL_RECV_HASH_FUNCTION_NONE) - - - - -static inline void bnx2x_plugin_cqe_info(struct eth_fast_path_rx_cqe* cqe, - Shell_RecvFrame *frame) -{ - u16 over_eth_ip; - - frame->perfectFiltered = BNX2X_PLUGIN_CQE_MATCH(cqe); - frame->vlan = BNX2X_PLUGIN_CQE_VLAN(cqe); - frame->vlanTag = le16_to_cpu(cqe->vlan_tag); - - frame->rssHashFunction = BNX2X_PLUGIN_CQE_HASH_FUNCTION(cqe); - if (frame->rssHashFunction != SHELL_RECV_HASH_FUNCTION_NONE) { - frame->rssHashType = BNX2X_PLUGIN_CQE_HASH_TYPE(cqe);; - frame->rssHashValue = le32_to_cpu(cqe->rss_hash_result); - } - else { - frame->rssHashType = 0; - frame->rssHashValue = 0; - } - - /* ether type */ - over_eth_ip = BNX2X_PLUGIN_CQE_OVERETH(cqe); - frame->ipv4 = (over_eth_ip == PRS_FLAG_OVERETH_IPV4) ? 1 : 0; - frame->ipv6 = (over_eth_ip == PRS_FLAG_OVERETH_IPV6) ? 1 : 0; - frame->nonIp = (frame->ipv4 | frame->ipv6) ? 0 : 1; - - /* transport protocol */ - if (!frame->nonIp) { - over_eth_ip = BNX2X_PLUGIN_CQE_OVERIP(cqe); - frame->tcp = (over_eth_ip == PRS_FLAG_OVERIP_TCP) ? 1 : 0; - frame->udp = (over_eth_ip == PRS_FLAG_OVERIP_UDP) ? 1 : 0; - } - else { - frame->tcp = frame->udp = 0; - } - - /* checksum */ - frame->ipXsum = BNX2X_PLUGIN_CQE_IP_XSUM(cqe); - frame->tcpXsum = frame->udpXsum = BNX2X_PLUGIN_CQE_L4_XSUM(cqe); -} -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_tx_split - * - * Split the first BD into headers and data BDs - * to ease the pain of our fellow microcode engineers - * This is was observed to happen in Windows, but so far not in Linux - * - * Result: - * The updated bd_prod - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static void bnx2x_plugin_tx_split(Plugin_State *ps, - struct bnx2x_plugin_tx_queue *fp, - struct eth_tx_start_bd **tx_bd, - struct plugin_rpos* bd_prod, - u16 hlen, int nbd) -{ - struct eth_tx_start_bd *start_bd = *tx_bd; - int old_len = le16_to_cpu(start_bd->nbytes); - struct eth_tx_bd *data_bd; - dma_addr_t mapping; - - /* first fix first (start) BD */ - start_bd->nbd = cpu_to_le16(nbd); - start_bd->nbytes = cpu_to_le16(hlen); - - DP(4, "TSO split header size is %d (%x:%x) nbd %d\n", - start_bd->nbytes, start_bd->addr_hi, start_bd->addr_lo, - start_bd->nbd); - - /* now get a new data BD (after the pbd) and fill it */ - NEXT_TX_POS((*bd_prod)); - data_bd = &fp->tx_desc_ring[TX_BD((*bd_prod))].reg_bd; - - mapping = HILO_U64(le32_to_cpu(start_bd->addr_hi), - le32_to_cpu(start_bd->addr_lo)) + hlen; - - data_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - data_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - data_bd->nbytes = cpu_to_le16(old_len - hlen); - - - DP(3, "TSO split data size is %d (%x:%x)\n", - data_bd->nbytes, data_bd->addr_hi, data_bd->addr_lo); - - - /* update tx_bd - This is done only to keep track of the last - * non-parsing BD (for debug) - */ - *tx_bd = (struct eth_tx_start_bd *)data_bd; -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_set_sbd_csum -* -* Fills in the Tx start BD -* -* Result: -* None -* -* Side-effects: -* None. -* -*---------------------------------------------------------------------------- -*/ -static inline void bnx2x_plugin_set_sbd_csum(struct bnx2x_priv *bp, - struct eth_tx_start_bd *sbd, - const Plugin_SendInfo *info) -{ - if (info->xsumTcpOrUdp) - sbd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM; - - if (info->ipv4) - sbd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IP_CSUM; - else - sbd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IPV6; - - if (info->udp) - sbd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IS_UDP; -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_set_pbd_csum -* -* Fills in the Tx parsing BD checksum info -* -* Result: -* None -* -* Side-effects: -* None. -* -*---------------------------------------------------------------------------- -*/ -static inline void -bnx2x_plugin_set_pbd_csum(struct bnx2x_priv *bp, - struct eth_tx_parse_bd_e2 *pbd, - const Plugin_SendInfo *info) -{ - u16 val = 0; - - /* transport header offset in words */ - val = (u16)(info->l4HeaderOffset >> 1); - pbd->parsing_data |= (cpu_to_le16(val) << ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT); - - /* transport header length in d-words */ - val = (u16)((info->l4DataOffset - info->l4HeaderOffset) >> 2); - pbd->parsing_data |= (cpu_to_le16(val) << ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT); -} - - -static inline void -bnx2x_plugin_set_fw_mac_addr(u16 *fw_hi, u16 *fw_mid, u16 *fw_lo, u8 *mac) -{ - ((u8 *)fw_hi)[0] = mac[1]; - ((u8 *)fw_hi)[1] = mac[0]; - ((u8 *)fw_mid)[0] = mac[3]; - ((u8 *)fw_mid)[1] = mac[2]; - ((u8 *)fw_lo)[0] = mac[5]; - ((u8 *)fw_lo)[1] = mac[4]; -} -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_update_producers -* -* updates the current Rx producer valuesto the FW -* -* Result: -* None -* -* Side-effects: -* The FW wakes up and if it was waiting for descriptors will start delivering -* packets. -* -*---------------------------------------------------------------------------- -*/ -static inline void -bnx2x_plugin_update_producers(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_rx_queue *fp) -{ - struct ustorm_eth_rx_producers rx_prods = {0}; - - rx_prods.bd_prod = fp->rx_bd_prod.pos; - rx_prods.cqe_prod = fp->rx_comp_prod; - rx_prods.sge_prod = fp->rx_sge_prod; - - /* memory barriers */ - PROD_UPDATE(ps, fp->q_id, rx_prods); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_rx_comp_used -* -* checks how many RX completions are used -* -* Result: -* number of available descriptors -* -* Side-effects: -* None -* -*---------------------------------------------------------------------------- -*/ -u16 bnx2x_plugin_rx_comp_used(struct bnx2x_plugin_rx_queue *fp) -{ - u16 prod, cons; - - prod = fp->rx_comp_prod; - cons = fp->rx_comp_cons.pos; - return (SUB_S16(prod, cons)); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_rx_used -* -* checks how many RX descriptors are used -* -* Result: -* number of available descriptors -* -* Side-effects: -* None -* -*---------------------------------------------------------------------------- -*/ -static inline u16 bnx2x_plugin_rx_used(struct bnx2x_plugin_rx_queue *fp) -{ - u16 prod, cons; - - prod = fp->rx_bd_prod.pos; - cons = fp->rx_bd_cons.pos; - return (SUB_S16(prod, cons)); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_tx_used -* -* checks how many TX descriptors are used -* -* Result: -* number of available descriptors -* -* Side-effects: -* None -* -*---------------------------------------------------------------------------- -*/ -static inline s16 bnx2x_plugin_tx_used(struct bnx2x_plugin_tx_queue *fp) -{ - return __bnx2x_plugin_tx_used(fp); -} - - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_alloc_small_buf - wrapper for shell API -* -*---------------------------------------------------------------------------- -*/ -static inline -dma_addr_t bnx2x_plugin_alloc_small_buf(Plugin_State *ps, - struct bnx2x_plugin_rx_queue *fp, - u32 bufid) -{ - struct Shell_RxQueueHandle* q_handle = ps->rxQueues[fp->idx].handle; - return (dma_addr_t)ps->shellApi.allocSmallBuffer(q_handle, bufid); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_alloc_large_buf - wrapper for shell API -* -*---------------------------------------------------------------------------- -*/ -static inline -dma_addr_t bnx2x_plugin_alloc_large_buf(Plugin_State *ps, - struct bnx2x_plugin_rx_queue *fp, - u32 bufid) -{ - struct Shell_RxQueueHandle* q_handle = ps->rxQueues[fp->idx].handle; - return (dma_addr_t)ps->shellApi.allocLargeBuffer(q_handle, bufid); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_indicate_recv -* -* Indicate a receive frame to the upper layer. The ownership of the frame's -* buffers is transferred to the upper layer -* -* This call can only be made from bnx2x_plugin_check_rx_ring -* -* Result: -* None. -* -* Side-effects: -* The buffers are passed up to the OS stack. -* -*---------------------------------------------------------------------------- -*/ -static inline void -bnx2x_plugin_indicate_recv(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_rx_queue *fp, - Shell_RecvFrame *frame) -{ - struct Shell_RxQueueHandle* q_handle = ps->rxQueues[fp->idx].handle; - /*bnx2x_plugin_dump_recv_frame(ps, frame);*/ - ps->shellApi.indicateRecv(q_handle, frame); -} - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_sw_init() -- { Plugin_SwInit } - * - * Initialize the s/w state of the plugin. The h/w should not be - * initialized through this function. This function is called before any - * other plugin API is called by the shell (except for api exchange - * function). - * - * Result: - * 0 for success; non-zero for failure - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static uint32 bnx2x_plugin_sw_init(Plugin_State *ps) -{ - uint32 i; - struct bnx2x_plugin_queue_dma_info rx_dma, tx_dma; - - struct bnx2x_plugin_device_info *dev_info = - (struct bnx2x_plugin_device_info*)ps->deviceInfo; - - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - - DP(6, "bnx2x_priv size %d rxq size %d, chip-id %x, pci-func %x, fp-flags %x rxqs %d txqs %d\n", - sizeof(struct bnx2x_priv), - sizeof(struct bnx2x_plugin_rx_queue), - bp->chip_id, - bp->pci_func, - bp->fp_flags, - ps->numRxQueues, - ps->numTxQueues); - - bnx2x_plugin_bzero((char*)bp, sizeof(struct bnx2x_priv)); - - bp->chip_id = dev_info->chip_id; - bp->pci_func = dev_info->pci_func; - bp->fp_flags = dev_info->fp_flags; - - DP(3, "chip-id %x, pci-func %x, fp-flags %x\n", - bp->chip_id, - bp->pci_func, - bp->fp_flags); - - /* initialize RX queues */ - - /* Note: We assume here the number of RX and TX rings are equal */ - for (i = 0; i < ps->numRxQueues; i++) { - rx_dma.va = ps->rxQueues[i].ringBaseVA; - rx_dma.pa = (dma_addr_t)ps->rxQueues[i].ringBasePA; - rx_dma.num_desc = (u16)ps->rxQueues[i].ringSize; - tx_dma.va = ps->txQueues[i].ringBaseVA; - tx_dma.pa = (dma_addr_t)ps->txQueues[i].ringBasePA; - tx_dma.num_desc = (u16)ps->txQueues[i].ringSize; - bnx2x_plugin_init_rx_fp(ps, bp, &bp->rxfp[i], &rx_dma, &tx_dma, - &dev_info->sb_info[i], - dev_info->hw_qid[i], i); - } - - /* initialize TX queues */ - for (i = 0; i < ps->numTxQueues; i++) { - tx_dma.va = ps->txQueues[i].ringBaseVA; - tx_dma.pa = (dma_addr_t)ps->txQueues[i].ringBasePA; - tx_dma.num_desc = (u16)ps->txQueues[i].ringSize; - bnx2x_plugin_init_tx_fp(ps, &bp->txfp[i], &tx_dma, - &dev_info->sb_info[i], i); - } - /*bnx2x_plugin_dump_entry_pointes(ps);*/ - ShellLog(1, "bnx2x_plugin %s initialized successfully\n", PLUGIN_VERSION); - return 0; -} - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_reinit_rx_ring() -- { Plugin_ReinitRxRing } - * - * bzero rings and reinit head/tail pointers/registers - * should not return any buffers that are found, and assume have - * already been garbage collected. - * - * Result: - * zero (essentially void) - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static uint32 bnx2x_plugin_reinit_rx_ring(Plugin_State *ps, uint32 queue) -{ - u16 i, prod, num_rcq; - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - struct bnx2x_plugin_rx_queue *fp = &bp->rxfp[queue]; - - /* bd */ - fp->rx_bd_prod.pos = 0; - fp->rx_bd_prod.page_off = 0; - fp->rx_bd_prod.page_cnt = 0; - fp->rx_bd_cons.pos = 0; - fp->rx_bd_cons.page_off = 0; - fp->rx_bd_cons.page_cnt = 0; - fp->rx_uid_cons.pos = 0; - fp->rx_uid_cons.page_off = 0; - fp->rx_uid_cons.page_cnt = 0; - bnx2x_plugin_dump_rpos(ps, "rx-bd-prod", &fp->rx_bd_prod); - bnx2x_plugin_dump_rpos(ps, "rx-bd-cons", &fp->rx_bd_cons); - bnx2x_plugin_dump_rpos(ps, "rx-uid-cons", &fp->rx_uid_cons); - - /* rcq */ - fp->rx_comp_prod = 0; - fp->rx_comp_cons.pos = 0; - fp->rx_comp_cons.page_off = 0; - fp->rx_comp_cons.page_cnt = 0; - bnx2x_plugin_dump_rpos(ps, "rx-comp-cons", &fp->rx_comp_cons); - - - /* sge */ - fp->rx_sge_prod = 0; - fp->rx_sge_cons = 0; - fp->last_max_sge = 0; - - - /* erase all the RX completions - leaving the next pointer intact */ - num_rcq = min(fp->num_desc + RX_SGE_COUNT, - (u16)(fp->rx_comp_cons.num_pages * RX_RCQ_PAGE_MAX)); - - for (i = 0, prod = 0; i < num_rcq; i++, prod = NEXT_RCQ_IDX(prod)) { - bnx2x_plugin_bzero ((char*)&fp->rx_comp_ring[prod], - sizeof(union eth_rx_cqe) ); - } - fp->rx_comp_prod = prod; - - /* re-populate the BD ring */ - for (i = 0, prod = 0; i < fp->num_desc; i++, prod = NEXT_RX_IDX(prod)) { - struct eth_rx_bd *rx_bd; - dma_addr_t mapping; - u32 bufid; - - bufid = bnx2x_plugin_bd_global_id(i, fp->num_desc, fp->idx); - mapping = bnx2x_plugin_alloc_small_buf(ps, fp, bufid); - rx_bd = &fp->rx_desc_ring[prod]; - rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - fp->rx_uid_ring[prod] = i; - NEXT_RX_POS(fp->rx_bd_prod); - - bnx2x_plugin_dump_rx_bd(ps, fp, rx_bd, i, bufid, mapping); - } - - /* re-populate the SGE ring */ - if (!BP_TPA_DISABLED(bp)) { - for (i = 0, prod = 0; i < RX_SGE_COUNT; - i++, prod = NEXT_SGE_IDX(prod)) { - struct eth_rx_sge *rx_sge; - dma_addr_t mapping; - u32 bufid; - - bufid = bnx2x_plugin_sge_global_id(i, fp->num_desc, - fp->idx); - mapping = bnx2x_plugin_alloc_large_buf(ps, fp, bufid); - rx_sge = &fp->rx_sge_ring[prod]; - rx_sge->addr_hi = cpu_to_le32(U64_HI(mapping)); - rx_sge->addr_lo = cpu_to_le32(U64_LO(mapping)); - } - fp->rx_sge_prod = prod; - - /* set the sge mask */ - for (i = 0; i < RX_SGE_COUNT >> RX_SGE_MASK_ELEM_SHIFT; i++) - fp->sge_mask[i] = RX_SGE_MASK_ELEM_ONE_MASK; - - bnx2x_plugin_clear_sge_mask_next_elems(fp); - fp->tpa_max_ind = 0; - } - /*bnx2x_plugin_dump_rings_raw(ps, bp, fp);*/ - return 0; -} - - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_reinit_tx_ring() -- { Plugin_ReinitTxRing } - * - * bzero rings and reinit head/tail pointers/registers - * should not return any buffers that are found, and assume have - * already been garbage collected. - * - * Result: - * zero (essentially void) - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static uint32 bnx2x_plugin_reinit_tx_ring(Plugin_State *ps, uint32 queue) -{ - u16 i; - - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - struct bnx2x_plugin_tx_queue *fp = &bp->txfp[queue]; - - /* initialize TX prod/cons */ - fp->tx_bd_prod.pos = fp->tx_bd_prod.page_off = fp->tx_bd_prod.page_cnt = 0; - fp->tx_bd_cons.pos = fp->tx_bd_cons.page_off = fp->tx_bd_cons.page_cnt = 0; - - /* erase all the TX BDs */ - for (i = 0; i < fp->num_desc; i = NEXT_TX_IDX(i)) { - bnx2x_plugin_bzero ((char*)&fp->tx_desc_ring[i], sizeof(union eth_tx_bd_types) ); - } - return 0; -} - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_enable_interrupt() -- { Plugin_EnableInterrupt } - * - * Enable the interrupt indicated by 'intrIdx' (note is not queue #) - * - * For now we assume one vector for both TX and RX, and non shared index - * (57711 style status blocks) - * - * Result: - * None - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static inline void -bnx2x_plugin_rx_enable_interrupt(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_rx_queue *fp) -{ - bnx2x_plugin_ack_sb(ps, bp, fp->sb_id, 0, 0, IGU_INT_DISABLE, 0); - bnx2x_plugin_ack_sb(ps, bp, fp->sb_id, USTORM_ID, - cpu_to_le32(fp->sw_sb_idx), IGU_INT_ENABLE, 1); -} - -static inline void -bnx2x_plugin_tx_enable_interrupt(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_tx_queue *fp) -{ - bnx2x_plugin_ack_sb(ps, bp, fp->sb_id, 0, 0, IGU_INT_DISABLE, 0); - bnx2x_plugin_ack_sb(ps, bp, fp->sb_id, CSTORM_ID, - cpu_to_le32(fp->sw_sb_idx), IGU_INT_ENABLE, 1); -} - -static uint32 bnx2x_plugin_enable_interrupt(Plugin_State *ps, uint32 intrIdx) -{ - uint32 queue = intrIdx; - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - - struct bnx2x_plugin_rx_queue *rxfp = - queue < ps->numRxQueues ? &bp->rxfp[queue] : NULL; - struct bnx2x_plugin_tx_queue *txfp = - queue < ps->numTxQueues ? &bp->txfp[queue] : NULL; - u16 rx_hw_cons, tx_hw_cons; - - if (!rxfp && !txfp) - /* a bogus intrIdx */ - return 0; - - if (rxfp && !txfp) - bnx2x_plugin_rx_enable_interrupt(ps, bp, rxfp); - - else if (txfp && !rxfp) - bnx2x_plugin_tx_enable_interrupt(ps, bp, txfp); - - else if (!BP_SHARED_SB(bp)) { - /* the sb_id is shared, but the sb_index is not */ - bnx2x_plugin_ack_sb(ps, bp, rxfp->sb_id, 0, 0, - IGU_INT_DISABLE, 0); - - bnx2x_plugin_ack_sb(ps, bp, txfp->sb_id, CSTORM_ID, - cpu_to_le32(txfp->sw_sb_idx), IGU_INT_NOP, 1); - - bnx2x_plugin_ack_sb(ps, bp, rxfp->sb_id, USTORM_ID, - cpu_to_le32(rxfp->sw_sb_idx), IGU_INT_ENABLE, 1); - } else { - - /* both sb_id and sb_index are shared - this is the default */ - u8 update = 1; - - bnx2x_plugin_ack_sb(ps, bp, rxfp->sb_id, 0, 0, - IGU_INT_DISABLE, 0); - - /* sample the sb index */ - bnx2x_plugin_update_rx_sb_idx(rxfp); - - /* rx pending work */ - rx_hw_cons = le16_to_cpu(*(rxfp->rx_cons_sb)); - if ((rx_hw_cons & RX_RCQ_PAGE_MASK) == RX_RCQ_PAGE_MAX) - rx_hw_cons++; - - /* tx pending work */ - tx_hw_cons = le16_to_cpu(*(txfp->tx_cons_sb)); - - /* - * If there is more pending work we should not update the sb - * index - */ - if ((rx_hw_cons != rxfp->rx_comp_cons.pos) || - (tx_hw_cons != txfp->tx_pkt_cons)) - /*rxfp->sw_sb_idx--;*/ - update = 0; - - bnx2x_plugin_ack_sb(ps, bp, rxfp->sb_id, USTORM_ID, - cpu_to_le32(rxfp->sw_sb_idx), IGU_INT_ENABLE, update); - } - return 0; -} - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_disable_interrupt() -- { Plugin_DisableInterrupt } - * - * Disable the interrupt indicated by 'intrIdx' (note is not queue #) - * - * For now we assume one vector for both TX and RX, and non shared index - * (57711 style status blocks) - * - * Result: - * None - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static uint32 bnx2x_plugin_disable_interrupt(Plugin_State *ps, uint32 intrIdx) -{ - uint32 queue = intrIdx; - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - struct bnx2x_plugin_rx_queue *rxfp = &bp->rxfp[queue]; - bnx2x_plugin_ack_sb(ps, bp, rxfp->sb_id, 0, 0, IGU_INT_DISABLE, 0); - return 0; -} - - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_add_frame_tx_ring -- { Plugin_AddFrameToTxRing } - * - * Add the frame made up of buffers in the sg list 'frame' to the hardware tx - * ring of the given queue. The offload information is passed in 'info'. - * 'lastPktHint' is used to indicate that no more tx packets would be passed - * down in this context and the plugin should use this as a hint to write to - * the h/w doorbell. - * - * Result: - * 0 if successful, 1 to indicate no space in h/w tx ring - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static uint32 -bnx2x_plugin_add_frame_tx_ring(Plugin_State *ps, uint32 queue, - const Plugin_SendInfo *info, - const Plugin_SgList *sgl, - Bool lastPktHint) -{ - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - struct bnx2x_plugin_tx_queue *fp = &bp->txfp[queue]; - - struct eth_tx_start_bd *tx_start_bd; - struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL; - struct eth_tx_parse_bd_e2 *pbd = NULL; - struct plugin_rpos bd_prod; - u64 mapping; - - unsigned char *src_mac = bnx2x_plugin_eth_src(info, sgl); - unsigned char *dst_mac = bnx2x_plugin_eth_dst(info, sgl); - u32 i; - u16 pkt_prod, nbd, hlen = 0; - u8 mac_type = UNICAST_ADDRESS; - - /* take into account: start BD, parsing BD, next BD */ - if (bnx2x_plugin_tx_avail(fp) < (sgl->numElements + 3)) { - fp->driver_xoff++; - return BNX2X_PLUGIN_TX_BUSY; - } - - /* set mac address type - default is unicast */ - if(is_multicast_ether_addr(dst_mac)) { - if (is_broadcast_ether_addr(dst_mac)) - mac_type = BROADCAST_ADDRESS; - else - mac_type = MULTICAST_ADDRESS; - } - /* - * Please read carefully. First we use one BD which we mark as start, - * then we have a parsing info BD (used for TSO or xsum), - * and only then we have the rest of the TSO BDs. - * (don't forget to mark the last one as last, - * and to unmaps only AFTER you write to the BD ...) - * And above all, all pbd sizes are in words - NOT DWORDS! - */ - pkt_prod = fp->tx_pkt_prod++; - bd_prod = fp->tx_bd_prod; - - /* start BD */ - tx_start_bd = &fp->tx_desc_ring[TX_BD(bd_prod)].start_bd; - tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD; - tx_start_bd->general_data = (mac_type << - ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT); - - /* - * Header nbd - Note that we always assume that the header is - * contained in the first sge. In case of TSO the header and - * data must appear in distinct BDs so we may need to split - * an sge into 2 BDs. The assumption above means that we only - * handle the case of splitting the FIRST sge into 2 BDs. - */ - tx_start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT); - - /* vlan */ - if (info->vlan) { - tx_start_bd->vlan_or_ethertype = cpu_to_le16(info->vlanTag); - tx_start_bd->bd_flags.as_bitfield |= (ETH_TX_BD_FLAGS_VLAN_MODE & - (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT)); - } else { -#ifdef PLUGIN_ENFORCE_SECURITY - tx_start_bd->vlan_or_ethertype = - cpu_to_le16(bnx2x_plugin_eth_type(info, sgl)); -#else - /* for debug only - to discover driver/fw lack of sync */ - tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod); -#endif - } - - mapping = sgl->elements[0].pa; - tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - - nbd = (u16)(sgl->numElements + 1); /* nr_elem + pbd */ - tx_start_bd->nbd = cpu_to_le16(nbd); - tx_start_bd->nbytes = cpu_to_le16(sgl->elements[0].length); - - /* - DP(4, "sending pkt %u next_idx %u bd %u @%p\n", - pkt_prod, fp->tx_pkt_prod, bd_prod.pos, tx_start_bd); - - DP(7, "first bd @%p addr (%x:%x) nbd %d nbytes %d flags %x vlan %x\n", - tx_start_bd, tx_start_bd->addr_hi, - tx_start_bd->addr_lo, - le16_to_cpu(tx_start_bd->nbd), - le16_to_cpu(tx_start_bd->nbytes), - tx_start_bd->bd_flags.as_bitfield, - le16_to_cpu(tx_start_bd->vlan_or_ethertype)); - */ - - /* Parsing BD */ - NEXT_TX_POS(bd_prod); - pbd = &fp->tx_desc_ring[TX_BD(bd_prod)].parse_bd_e2; - - bnx2x_plugin_bzero((char*)pbd, sizeof(struct eth_tx_parse_bd_e2)); - - if (info->xsumTcpOrUdp) { - - /* set the start bd */ - bnx2x_plugin_set_sbd_csum(bp, tx_start_bd, info); - - /* and now the parsing bd */ - bnx2x_plugin_set_pbd_csum(bp, pbd, info); - } - - if (info->tso) { - - /* DP(3, "TSO total len %d hlen %d tso mss %d\n", - sgl->totalLength, info->l4DataOffset, info->tsoMss); */ - - tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO; - - /* - * Check if the first sge holds more then the header. In such - * a case it must be split onto 2 BDs. - */ - hlen = (u16)info->l4DataOffset; - if (sgl->elements[0].length > hlen) - bnx2x_plugin_tx_split(ps, fp, &tx_start_bd, &bd_prod, - hlen, ++nbd); - - pbd->parsing_data |= (cpu_to_le16(info->tsoMss) << - ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT); - if (info->ipv6 && - (bnx2x_plugin_ipv6_hdr(info, sgl))->nexthdr == NEXTHDR_IPV6) - pbd->parsing_data |= - ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR; - - fp->tx_stats->tso_pkts++; - fp->tx_stats->tso_bytes += sgl->totalLength; - } - - /* set MACs */ - bnx2x_plugin_set_fw_mac_addr(&pbd->src_mac_addr_hi, - &pbd->src_mac_addr_mid, - &pbd->src_mac_addr_lo, src_mac); - - bnx2x_plugin_set_fw_mac_addr(&pbd->dst_mac_addr_hi, - &pbd->dst_mac_addr_mid, - &pbd->dst_mac_addr_lo, dst_mac); - - DP(6, "src_mac_addr_lo %x src_mac_addr_mid %x src_mac_addr_hi %x\n" - "dst_mac_addr_lo %x dst_mac_addr_mid %x dst_mac_addr_hi %x\n", - pbd->src_mac_addr_lo, - pbd->src_mac_addr_mid, - pbd->src_mac_addr_hi, - pbd->dst_mac_addr_lo, - pbd->dst_mac_addr_mid, - pbd->dst_mac_addr_hi); - - /* - * This is done only to keep track of the last - * non-parsing BD (for debug) - */ - tx_data_bd = (struct eth_tx_bd *)tx_start_bd; - - for (i = 1; i < sgl->numElements; i++) { - u16 _prod; - - NEXT_TX_POS(bd_prod); - _prod = TX_BD(bd_prod); - tx_data_bd = &fp->tx_desc_ring[_prod].reg_bd; - if (total_pkt_bd == NULL) - total_pkt_bd = &fp->tx_desc_ring[_prod].reg_bd; - - mapping = sgl->elements[i].pa; - tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - tx_data_bd->nbytes = cpu_to_le16(sgl->elements[i].length); - - /* - DP(5, "elem %d bd @%p addr (%x:%x) nbytes %d\n", - i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo, - le16_to_cpu(tx_data_bd->nbytes)); - */ - } - NEXT_TX_POS(bd_prod); - - /* - * Update nbd counting the next BD if the packet contains or ends - * with it. - */ - if (bd_prod.page_off < nbd) - nbd++; - - /* - * Set the total bytes - this may have to be removed for VF - * separation considerations - */ - if (total_pkt_bd != NULL) - total_pkt_bd->total_pkt_bytes = - (__le16)cpu_to_le32(sgl->totalLength); - - /* now send a tx doorbell */ - if (lastPktHint) { - fp->tx_db.data.prod += nbd; - DOORBELL(ps, fp->idx, fp->tx_db.raw); - } - fp->tx_bd_prod = bd_prod; - return BNX2X_PLUGIN_TX_OK; -} - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_check_tx_ring -- { Plugin_CheckTxRing } - * - * Check the tx ring for the given queue for any tx completions. - * This call is made by the shell either during the interrupt or DPC/BH - * context. - * - * Result: - * Number of pre-TSO packets tx completed. - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static uint32 bnx2x_plugin_check_tx_ring(Plugin_State *ps, uint32 queue) -{ - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - struct bnx2x_plugin_tx_queue *fp = &bp->txfp[queue]; - struct plugin_rpos bd_cons = fp->tx_bd_cons; - u16 hw_cons, sw_cons; - u32 done = 0; - - /* - * if sb index is not shared sample the current HW index for later - * (different sb_id or separate indices for RX and TX) - */ - if (!BP_SHARED_SB(bp)) - bnx2x_plugin_update_tx_sb_idx(fp); - - hw_cons = le16_to_cpu(*(fp->tx_cons_sb)); - sw_cons = fp->tx_pkt_cons; - - while (sw_cons != hw_cons) { - struct eth_tx_start_bd *tx_start_bd = - &fp->tx_desc_ring[TX_BD(bd_cons)].start_bd; - - u16 nbd = le16_to_cpu(tx_start_bd->nbd); - - /* - DP(4, "TXQ[%d] - hw_cons %u sw_cons %u bd_cons %u\n", - fp->idx, hw_cons, sw_cons, bd_cons.pos); - */ - - while (nbd-- > 0) - NEXT_TX_POS(bd_cons); - - sw_cons++; - done++; - } - fp->tx_pkt_cons = sw_cons; - fp->tx_bd_cons = bd_cons; - if (done) - ps->shellApi.completeSend(ps->txQueues[queue].handle, done); - - return done; -} - - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_fill_frag - * - * Fills in a multi-sge frame (LRO/Jumbo) - *---------------------------------------------------------------------------- - */ -static inline -void bnx2x_plugin_fill_frags(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_rx_queue *fp, u16 len_on_bd, - struct eth_fast_path_rx_cqe *cqe, - Shell_RecvFrame *frame) -{ - u32 frag_size, frag_len, pages, i, j; - u16 sge_idx; - - if (frame->byteLength <= len_on_bd) /* nothing to do - no sges */ - return; - - frag_size = frame->byteLength - len_on_bd; - pages = SGE_PAGE_ALIGN(frag_size) >> SGE_PAGE_SHIFT; - - for (i = 0, j = 0; i < pages; i+= PAGES_PER_SGE, j++) { - sge_idx = RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[j])); - - /* - * FW gives the indices of the SGE as if the ring - * is an array (meaning that "next" element will - * consume 2 indices) - */ - frag_len = min((u32)(SGE_PAGE_SIZE * PAGES_PER_SGE), frag_size); - - frame->sg[j+1].ringOffset = - bnx2x_plugin_sge_global_id(RX_SGE_BUF(sge_idx), - fp->num_desc, - fp->idx); - frame->sg[j+1].length = frag_len; - SGE_MASK_CLEAR_BIT(fp, sge_idx); - frame->sgLength++; - frag_size -= frag_len; - } - DP(2, "fp_cqe->sgl[%d] = %d\n", j-1, - le16_to_cpu(cqe->sgl_or_raw_data.sgl[j-1])); - - /* here we assume that the last SGE index is the biggest */ - if (SUB_S16(sge_idx, fp->last_max_sge) > 0) - fp->last_max_sge = sge_idx; -} - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_tpa_start - * - * Handle tpa start cookie (start, but mnot end) - *---------------------------------------------------------------------------- - */ -static inline -void bnx2x_plugin_tpa_start(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_rx_queue *fp, u16 qid, - u16 bufid, struct plugin_rpos *bd_cons) -{ - DP(1, "tpa_start on queue %d\n", qid); - - if (fp->tpa_pool[qid].state != BNX2X_PLUGIN_TPA_STOP) - DP(1, "start of bin not in stop [%d]\n", qid); - - - fp->tpa_pool[qid].state = BNX2X_PLUGIN_TPA_START; - fp->tpa_pool[qid].bufid = bufid; - - /* - * replace the buffid saved in the tpa queue pool with the next shadow - * ring id - */ - if (fp->rx_uid_cons.pos != bd_cons->pos) { - DP(4,"bd_cons %d uid_cons %d replacing bufid %d with " - "bufid %d\n", bd_cons->pos, fp->rx_uid_cons.pos, - fp->rx_uid_ring[RX_BD(*bd_cons)], - fp->rx_uid_ring[RX_BD(fp->rx_uid_cons)]); - - fp->rx_uid_ring[RX_BD(*bd_cons)] = - fp->rx_uid_ring[RX_BD(fp->rx_uid_cons)]; - } - NEXT_RX_POS(fp->rx_uid_cons); -} - - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_tpa_end - * - * Handle tpa end cookie (end, but not start) - *---------------------------------------------------------------------------- - */ -static inline -void bnx2x_plugin_tpa_stop(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_rx_queue *fp, u16 qid, - struct eth_fast_path_rx_cqe *cqe, - Shell_RecvFrame *frame) -{ - u16 bufid, len; - - DP(1, "tpa_stop on queue %d\n", qid); - - if (!BNX2X_PLUGIN_TPA_STOP_VALID(cqe)) - DP(0, "STOP on non TCP data\n"); - - bnx2x_plugin_bzero((char*)frame, sizeof(Shell_RecvFrame)); - - frame->byteLength = le16_to_cpu(cqe->pkt_len); - - /* crunch the cqe flags and other information */ - bnx2x_plugin_cqe_info(cqe, frame); - - /* assume the IP csum is correct (will be corrected by the FW TODO )*/ - frame->ipXsum = SHELL_XSUM_CORRECT; - - /* This is a size of the linear data on the first sge */ - len = le16_to_cpu(cqe->len_on_bd); - bufid = fp->tpa_pool[qid].bufid; - - /* fill in first sge */ - frame->sg[0].ringOffset = - bnx2x_plugin_bd_global_id(bufid, fp->num_desc, fp->idx); - - frame->sg[0].length = len; - frame->firstSgOffset = le16_to_cpu(cqe->placement_offset);; - frame->sgLength = 1; - - /* mark first buffer id as indicated so it can be reclaimed next - * time we ask for buffers - */ - fp->tpa_ind[fp->tpa_max_ind] = bufid; - fp->tpa_max_ind++; - fp->tpa_pool[qid].state = BNX2X_PLUGIN_TPA_STOP; - - bnx2x_plugin_fill_frags(ps, bp, fp, len, cqe, frame); - - fp->rx_stats->lro_pkts++; - fp->rx_stats->lro_bytes += frame->byteLength; - bnx2x_plugin_indicate_recv(ps, bp, fp, frame); -} - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_check_rx_ring -- { Plugin_Chec`kRxRing } - * - * Check the rx ring for any incoming packets on the given queue. - * 'maxPkts' indicate the maximum number of packets the plugin can indicate - * up to the shell in this context. The shell calls this function during the - * interrupt or DPC/NAPI context. - * - * Result: - * 1 to indicate need for buffers, 0 for no need for buffers. - * - * Side-effects: - * Packets are indicated up and delivered to the OS stack during this call. - * - *---------------------------------------------------------------------------- - */ -static uint32 -bnx2x_plugin_check_rx_ring(Plugin_State *ps, uint32 queue, uint32 maxPkts) -{ - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - struct bnx2x_plugin_rx_queue *fp = &bp->rxfp[queue]; - Shell_RecvFrame frame; - struct plugin_rpos sw_comp_cons; - u16 hw_comp_cons; - u32 pkts_done = 0; - - /* - * if sb index is not shared sample the current HW index for later - * (different sb_id or separate indexes for RX and TX) - */ - if (!BP_SHARED_SB(bp)) - bnx2x_plugin_update_rx_sb_idx(fp); - - /* get the new RCQ consumer and compare it to the saved one */ - hw_comp_cons = le16_to_cpu(*(fp->rx_cons_sb)); - if ((hw_comp_cons & RX_RCQ_PAGE_MASK) == RX_RCQ_PAGE_MAX) - hw_comp_cons++; - - /* if the consumers differ there's work to be done */ - sw_comp_cons = fp->rx_comp_cons; - if (sw_comp_cons.pos != hw_comp_cons){ - struct plugin_rpos bd_cons; - u16 sw_comp_prod; - - bd_cons = fp->rx_bd_cons; - sw_comp_prod = fp->rx_comp_prod; - - DP(3, "RXQ[%d]: hw_comp_cons %u sw_comp_cons %u\n", - fp->idx, hw_comp_cons, sw_comp_cons.pos); - - while (sw_comp_cons.pos != hw_comp_cons) { - union eth_rx_cqe *cqe; - u16 bufid, len, pad; - u8 cqe_flags; - - cqe = &fp->rx_comp_ring[RCQ_BD(sw_comp_cons)]; - cqe_flags = cqe->fast_path_cqe.type_error_flags; - -#ifdef __CHIPSIM_NPA__ - /* handle sp CQE CHIPSIM only */ - if (CQE_TYPE(cqe_flags)) { - bnx2x_plugin_ramrod_complete(ps, bp, fp, - &cqe->ramrod_cqe); - goto next_cqe; - } -#endif - bufid = fp->rx_uid_ring[RX_BD(bd_cons)]; - - /* bnx2x_plugin_dump_cqe(ps, cqe, bufid);*/ - - /* - * If CQE is marked both TPA_START and TPA_END it is a - * non-TPA CQE - */ - if ((!BP_TPA_DISABLED(bp)) && (TPA_TYPE(cqe_flags) != - (TPA_TYPE_START | TPA_TYPE_END))) { - - u16 qid = cqe->fast_path_cqe.queue_index; - - if (TPA_TYPE(cqe_flags) == TPA_TYPE_START) { - bnx2x_plugin_tpa_start(ps, bp, fp, qid, - bufid, &bd_cons); - goto next_rx; - } - - if (TPA_TYPE(cqe_flags) == TPA_TYPE_END) { - bnx2x_plugin_tpa_stop(ps, bp, fp, qid, - &cqe->fast_path_cqe, &frame); - pkts_done++; - goto next_cqe; - } - } - - /* non TPA (LRO) packet could be Jumbo */ - bnx2x_plugin_bzero((char*)&frame, - sizeof(Shell_RecvFrame)); - - len = le16_to_cpu(cqe->fast_path_cqe.pkt_len); - frame.byteLength = len; - - len = le16_to_cpu(cqe->fast_path_cqe.len_on_bd); - pad = le16_to_cpu(cqe->fast_path_cqe.placement_offset); - - /* crunch the cqe flags and other information */ - bnx2x_plugin_cqe_info(&cqe->fast_path_cqe, &frame); - - /* fill in first sg */ - frame.sg[0].ringOffset = - bnx2x_plugin_bd_global_id(bufid, fp->num_desc, - fp->idx); - frame.sg[0].length = len; - frame.firstSgOffset = pad; - frame.sgLength = 1; - - /* fill frags (multi-sg) for Jumbo */ - bnx2x_plugin_fill_frags(ps, bp, fp, len, cqe, &frame); - bnx2x_plugin_indicate_recv(ps, bp, fp, &frame); - pkts_done++; -next_rx: - NEXT_RX_POS(bd_cons); -next_cqe: - sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod); - NEXT_RCQ_POS(sw_comp_cons); - - if (pkts_done == maxPkts || - fp->tpa_max_ind == MAX_TPA_IND_PKTS) - break; - } /* while */ - - fp->rx_bd_cons = bd_cons; - fp->rx_comp_cons = sw_comp_cons; - fp->rx_comp_prod = sw_comp_prod; - } - return pkts_done; -} - - -/* - *---------------------------------------------------------------------------- - * - * bnx2x_plugin_add_bufs_rx_ring -- { Plugin_AddBuffersToRxRing } - * - * The plugin can make calls to the shell to allocate more buffers. This call - * is made during the plugin initialization or after Plugin_CheckRxRing or - * when the OS stack returns buffers back to the shell. The plugin should try - * to allocate as many buffers as needed to fill the h/w rings. - * - * Result: - * None - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -static uint32 bnx2x_plugin_add_bufs_rx_ring(Plugin_State *ps, uint32 queue) -{ - struct bnx2x_priv *bp = (struct bnx2x_priv*)PLUGIN_PRIVATE(ps); - struct bnx2x_plugin_rx_queue *fp = &bp->rxfp[queue]; - - dma_addr_t mapping; - struct eth_rx_bd *rx_bd; - struct eth_rx_sge *sge_bd; - struct plugin_rpos bd_prod, bd_uid_cons; - u16 bd_cons, local_bufid, first_elem, last_elem, next_elem, sge_delta, i; - u32 bufid; - - /* reclaim BD buffers (small) */ - bd_prod = fp->rx_bd_prod; - bd_uid_cons = fp->rx_uid_cons; - bd_cons = fp->rx_bd_cons.pos; - - while (bd_uid_cons.pos != bd_cons) { - local_bufid = fp->rx_uid_ring[RX_BD(bd_uid_cons)]; - bufid = bnx2x_plugin_bd_global_id(local_bufid, fp->num_desc, - fp->idx); - - /* reclaim buffer and put it on the BD ring */ - mapping = bnx2x_plugin_alloc_small_buf(ps, fp, bufid); - rx_bd = &fp->rx_desc_ring[RX_BD(bd_prod)]; - rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - - /* update the id shadow ring */ - fp->rx_uid_ring[RX_BD(bd_prod)] = local_bufid; - - /* - bnx2x_plugin_dump_rx_bd(ps, fp, rx_bd, RX_BD(bd_prod), bufid, - mapping); - */ - - NEXT_RX_POS(bd_prod); - NEXT_RX_POS(bd_uid_cons); - } - - if (!BP_TPA_DISABLED(bp)) { - - /* reclaim the 'first sge' of indicated tpa frames */ - while (fp->tpa_max_ind > 0) { - local_bufid = fp->tpa_ind[--fp->tpa_max_ind]; - bufid = bnx2x_plugin_bd_global_id(local_bufid, - fp->num_desc, - fp->idx); - - /* reclaim buffer and put it on the BD ring */ - mapping = bnx2x_plugin_alloc_small_buf(ps, fp, bufid); - rx_bd = &fp->rx_desc_ring[RX_BD(bd_prod)]; - rx_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - rx_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - - /* update the id shadow ring */ - fp->rx_uid_ring[RX_BD(bd_prod)] = local_bufid; - NEXT_RX_POS(bd_prod); - } - - /* reclaim SGE buffers (large) */ - sge_delta = 0; - last_elem = RX_SGE(fp->last_max_sge) >> RX_SGE_MASK_ELEM_SHIFT; - first_elem = RX_SGE(fp->rx_sge_cons) >> RX_SGE_MASK_ELEM_SHIFT; - next_elem = RX_SGE(fp->rx_sge_prod) >> RX_SGE_MASK_ELEM_SHIFT; - - - /* If ring is not full */ - if (last_elem + 1 != first_elem) - last_elem++; - - for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i), - next_elem = NEXT_SGE_MASK_ELEM(next_elem)) { - if (fp->sge_mask[i]) - break; - fp->sge_mask[next_elem] = RX_SGE_MASK_ELEM_ONE_MASK; - sge_delta += RX_SGE_MASK_ELEM_SZ; - } - - if (sge_delta > 0) { - i = fp->rx_sge_prod; - fp->rx_sge_prod += sge_delta; - fp->rx_sge_cons += sge_delta; - - /* reclaim the buffers */ - while (i!= fp->rx_sge_prod) { - bufid = bnx2x_plugin_sge_global_id(RX_SGE_BUF(i), - fp->num_desc, - fp->idx); - - mapping = bnx2x_plugin_alloc_large_buf(ps, fp, - bufid); - sge_bd = &fp->rx_sge_ring[RX_SGE(i)]; - sge_bd->addr_hi = cpu_to_le32(U64_HI(mapping)); - sge_bd->addr_lo = cpu_to_le32(U64_LO(mapping)); - i = NEXT_SGE_IDX(i); - } - /* clear page-end entries */ - bnx2x_plugin_clear_sge_mask_next_elems(fp); - } - /* - DP(2, "fp->last_max_sge %d fp->rx_sge_prod %d\n", - fp->last_max_sge, fp->rx_sge_prod); - */ - } - fp->rx_bd_prod = bd_prod; - fp->rx_uid_cons = bd_uid_cons; - - /* Update FW producers */ - bnx2x_plugin_update_producers(ps, bp, fp); - return 0; -} - - -/* - *---------------------------------------------------------------------------- - * - * NPA_PluginMain -- - * - * This is the first function that the shell calls into the plugin and is - * used to exchange the shell and plugin API function pointers for further - * communication. - * The shell passes its API through 'shellApi' populated with its api - * functions. - * - * Result: - * Plugin_Api function table filled with the plugin api functions. - * - * Side-effects: - * None - * - *---------------------------------------------------------------------------- - */ -uint32 NPA_PluginMain(struct Plugin_Api *pluginApi) -{ - /* Plug-in */ - pluginApi->swInit = bnx2x_plugin_sw_init; - pluginApi->reinitRxRing = bnx2x_plugin_reinit_rx_ring; - pluginApi->reinitTxRing = bnx2x_plugin_reinit_tx_ring; - pluginApi->enableInterrupt = bnx2x_plugin_enable_interrupt; - pluginApi->disableInterrupt = bnx2x_plugin_disable_interrupt; - pluginApi->addFrameToTxRing = bnx2x_plugin_add_frame_tx_ring; - pluginApi->checkTxRing = bnx2x_plugin_check_tx_ring; - pluginApi->checkRxRing = bnx2x_plugin_check_rx_ring; - pluginApi->addBuffersToRxRing = bnx2x_plugin_add_bufs_rx_ring; - return 0; -} - - - diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin.h b/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin.h deleted file mode 100644 index 6508bee..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin.h +++ /dev/null @@ -1,491 +0,0 @@ -/* bnx2x_plugin.h: Broadcom bnx2x NPA plugin - * - * Copyright 2009-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Written by: Shmulik Ravid - * - */ -#ifndef _BNX2X_PLUGIN_H -#define _BNX2X_PLUGIN_H - -#define PLUGIN_VERSION "6.1.3" - -#ifndef DIV_ROUND_UP -#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) -#endif - -#define PAGES_PER_SGE_SHIFT 0 -#define PAGES_PER_SGE (1 << PAGES_PER_SGE_SHIFT) -#define SGE_PAGE_SIZE PAGE_SIZE -#define SGE_PAGE_SHIFT PAGE_SHIFT -#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN((typeof(PAGE_SIZE))(addr)) - -#define BNX2X_PLUGIN_PRS_FLAG_OVERETH_IPV4(flags) \ - (((le16_to_cpu(flags) & \ - PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) >> \ - PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT) \ - == PRS_FLAG_OVERETH_IPV4) - -#define BNX2X_PLUGIN_PRS_FLAG_OVERIP_TCP(flags) \ - (((le16_to_cpu(flags) & \ - PARSING_FLAGS_OVER_IP_PROTOCOL) >> \ - PARSING_FLAGS_OVER_IP_PROTOCOL_SHIFT) \ - == PRS_FLAG_OVERIP_TCP) - -#define BNX2X_PLUGIN_TPA_STOP_VALID(cqe) \ - BNX2X_PLUGIN_PRS_FLAG_OVERETH_IPV4(cqe->pars_flags.flags) && \ - BNX2X_PLUGIN_PRS_FLAG_OVERIP_TCP(cqe->pars_flags.flags) - - -#define NEXT_RING_POS(x, page_max, skip) \ - if ((x).page_off < ((page_max)-1)) { \ - (x).page_off++; \ - (x).pos++; \ - } else { \ - (x).page_off = 0; \ - (x).pos += (skip); \ - (x).page_cnt++; \ - if ((x).page_cnt == (x).num_pages) \ - (x).page_cnt = 0; \ - } \ - -/* - * RX SGE ring related macros - * -------------------------- - */ -#define RX_SGE_PAGE_MAX (RX_SGE_PAGE - 2) -#define RX_SGE_PAGE_MASK (RX_SGE_PAGE - 1) -#define RX_SGE_RSRV (RX_SGE_PAGE-RX_SGE_PAGE_MAX) - -#define RX_SGE_RING_CNT (RX_SGE_NUM_PAGES * RX_SGE_PAGE) -#define RX_SGE(x) ((x) & (RX_SGE_RING_CNT - 1)) -#define RX_SGE_CNT_MASK (RX_SGE_COUNT -1) -#define RX_SGE_BUF(x) ((x) & RX_SGE_CNT_MASK) - -#define NEXT_SGE_IDX(x) ((((x) & RX_SGE_PAGE_MASK) == \ - (RX_SGE_PAGE_MAX - 1)) ? (x) + 3 : (x) + 1) - - -/* SGE producer mask related macros */ -/* Number of bits in one sge_mask array element */ -#define RX_SGE_MASK_ELEM_SZ 32 -#define RX_SGE_MASK_ELEM_SHIFT 5 -#define RX_SGE_MASK_ELEM_MASK ((u64)RX_SGE_MASK_ELEM_SZ - 1) -#define RX_SGE_MASK_ELEM_ONE_MASK ((u32)(~0)) - -/* Number of u32 elements in SGE mask array */ -#define RX_SGE_MASK_LEN (RX_SGE_RING_CNT / RX_SGE_MASK_ELEM_SZ) -#define RX_SGE_MASK_LEN_MASK (RX_SGE_MASK_LEN - 1) -#define NEXT_SGE_MASK_ELEM(el) (((el) + 1) & RX_SGE_MASK_LEN_MASK) - -#define __SGE_MASK_SET_BIT(el, bit) \ - do { \ - el = ((el) | ((u32)0x1 << (bit))); \ - } while (0) - -#define __SGE_MASK_CLEAR_BIT(el, bit) \ - do { \ - el = ((el) & (~((u32)0x1 << (bit)))); \ - } while (0) - -#define SGE_MASK_SET_BIT(fp, idx) \ - __SGE_MASK_SET_BIT(fp->sge_mask[(idx) >> RX_SGE_MASK_ELEM_SHIFT], \ - ((idx) & RX_SGE_MASK_ELEM_MASK)) - -#define SGE_MASK_CLEAR_BIT(fp, idx) \ - __SGE_MASK_CLEAR_BIT(fp->sge_mask[(idx) >> RX_SGE_MASK_ELEM_SHIFT], \ - ((idx) & RX_SGE_MASK_ELEM_MASK)) - -/* - * RX ring related macros - * ---------------------- - */ - -/* The RX BD ring is special, each bd is 8 bytes but the last one is 16 */ -#define RX_DESC_PAGE_MAX (RX_DESC_PAGE - 2) -#define RX_DESC_PAGE_MASK (RX_DESC_PAGE - 1) -#define RX_DESC_RSRV (RX_DESC_PAGE-RX_DESC_PAGE_MAX) -#define RX_MAX_AVAIL(x) (RX_DESC_PAGE_MAX * RX_DESC_NUM_PAGES((x))-2) /* -2 ? */ -#define NEXT_RX_IDX(x) ((((x) & RX_DESC_PAGE_MASK) == \ - (RX_DESC_PAGE_MAX - 1)) ? (x) + 3 : (x) + 1) -#define NEXT_RX_POS(x) NEXT_RING_POS((x),RX_DESC_PAGE_MAX,3) -#define RX_BD(x) ((x).page_cnt*RX_DESC_PAGE+(x).page_off) - -/* - * RCQ ring related macros - * ----------------------- - */ - -/* - * As long as CQE is 4 times bigger than BD entry we have to allocate - * 4 times more pages for CQ ring in order to keep it balanced with - * BD ring - */ -#define RX_RCQ_PAGE_MAX (RX_RCQ_PAGE - 1) -#define RX_RCQ_PAGE_MASK (RX_RCQ_PAGE - 1) -#define RX_RCQ_MAX_AVAIL(x) (RX_RCQ_PAGE_MAX * RX_RCQ_NUM_PAGES((x))-2) /* check -2 TODO */ - -#define NEXT_RCQ_IDX(x) ((((x) & RX_RCQ_PAGE_MASK) == \ - (RX_RCQ_PAGE_MAX - 1)) ? (x) + 2 : (x) + 1) -#define NEXT_RCQ_POS(x) NEXT_RING_POS((x),RX_RCQ_PAGE_MAX,2) -#define RCQ_BD(x) ((x).page_cnt*RX_RCQ_PAGE+(x).page_off) - -#define CQE_TYPE(cqe_fp_flags) ((cqe_fp_flags) & ETH_FAST_PATH_RX_CQE_TYPE) - -#define TPA_TYPE_START ETH_FAST_PATH_RX_CQE_START_FLG -#define TPA_TYPE_END ETH_FAST_PATH_RX_CQE_END_FLG -#define TPA_TYPE(cqe_fp_flags) ((cqe_fp_flags) & \ - (TPA_TYPE_START|TPA_TYPE_END)) - - -/* - * TX ring related macros - * ---------------------- - */ -#define TX_DESC_PAGE_MAX (TX_DESC_PAGE - 1) -#define TX_DESC_PAGE_MASK (TX_DESC_PAGE - 1) -#define TX_DESC_RSRV (TX_DESC_PAGE-TX_DESC_PAGE_MAX) -#define TX_MAX_AVAIL(x) (TX_DESC_PAGE_MAX*TX_DESC_NUM_PAGES((x))-2) /* check -2 TODO */ -#define TX_BD_POFF(x) ((x) & TX_DESC_PAGE_MASK) -#define NEXT_TX_IDX(x) ((((x) & TX_DESC_PAGE_MASK) == \ - (TX_DESC_PAGE_MAX - 1)) ? (x) + 2 : (x) + 1) -#define NEXT_TX_POS(x) NEXT_RING_POS((x),TX_DESC_PAGE_MAX,2) -#define TX_BD(x) ((x).page_cnt*TX_DESC_PAGE+(x).page_off) - -#define MAX_FETCH_BD 13 /* HW max BDs per packet */ -#define MAX_TPA_IND_PKTS 64 /* max indicated TPA bds */ - -#define BNX2X_PLUGIN_TX_OK 0 -#define BNX2X_PLUGIN_TX_BUSY 1 - -/* This is needed for determining of last_max */ -#define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) - -#define U64_LO(x) (u32)(((u64)(x)) & 0xffffffff) -#define U64_HI(x) (u32)(((u64)(x)) >> 32) -#define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) - -#define BNX2X_PLUGIN_MAPPED_LEN 128 /* not big enough for ipv6 with ext headers TODO */ - -#define BNX2X_PLUGIN_MAX_RECV_SG_ARRAY 9 /* 1 + 8 */ - -#define BNX2X_PLUGIN_TX_SB_INDEX \ - (&fp->status_blk->sb.index_values[HC_INDEX_C_ETH_TX_CQ_CONS]) - -#define BNX2X_PLUGIN_RCQ_SB_INDEX \ - (&fp->status_blk->sb.index_values[HC_INDEX_U_ETH_RX_CQ_CONS]) - -/* ring pointers */ -struct plugin_rpos { - u16 pos; - u16 page_off; - u16 page_cnt; - u16 num_pages; -}; - -static inline void bnx2x_plugin_bzero(void *memory, size_t length) -{ - size_t i; - for (i = 0; i < length; ++i) { - ((uint8 *)memory)[i] = 0; - } -} - -static inline int is_multicast_ether_addr(const u8 *addr) -{ - return (0x01 & addr[0]); -} - -static inline int is_broadcast_ether_addr(const u8 *addr) -{ - return ((addr[0] & addr[1] & addr[2] & addr[3] & addr[4] & addr[5]) - == 0xff); -} - -static inline -u8 *bnx2x_plugin_network_header(const Plugin_SendInfo *send_info, - const Plugin_SgList *sgl) -{ - if (BNX2X_PLUGIN_MAPPED_LEN < send_info->ipHeaderOffset) - return NULL; - return (sgl->firstSgVA + send_info->ipHeaderOffset); -} - -static inline -u8 *bnx2x_plugin_transport_header(const Plugin_SendInfo *send_info, - const Plugin_SgList *sgl) -{ - if (BNX2X_PLUGIN_MAPPED_LEN < send_info->l4HeaderOffset) - return NULL; - return (sgl->firstSgVA + send_info->l4HeaderOffset); -} - -static inline -struct ethhdr *bnx2x_plugin_eth_hdr(const Plugin_SendInfo *send_info, - const Plugin_SgList *sgl) -{ - return (struct ethhdr *) sgl->firstSgVA; -} - -static inline u16 bnx2x_plugin_eth_type(const Plugin_SendInfo *send_info, - const Plugin_SgList *sgl) -{ - return ntohs(bnx2x_plugin_eth_hdr(send_info, sgl)->h_proto); -} - -static inline -unsigned char *bnx2x_plugin_eth_src(const Plugin_SendInfo *send_info, - const Plugin_SgList *sgl) -{ - return bnx2x_plugin_eth_hdr(send_info, sgl)->h_source; -} - -static inline -unsigned char *bnx2x_plugin_eth_dst(const Plugin_SendInfo *send_info, - const Plugin_SgList *sgl) -{ - return bnx2x_plugin_eth_hdr(send_info, sgl)->h_dest; -} - -static inline -struct iphdr *bnx2x_plugin_ip_hdr(const Plugin_SendInfo *send_info, - const Plugin_SgList *sgl) -{ - return (struct iphdr *) bnx2x_plugin_network_header(send_info, sgl); -} - -static inline -struct ipv6hdr *bnx2x_plugin_ipv6_hdr(const Plugin_SendInfo *send_info, - const Plugin_SgList *sgl) -{ - return (struct ipv6hdr *) bnx2x_plugin_network_header(send_info, sgl); -} - - -/* - * RX frame structures - * ------------------- - */ - -/* TPA aggregation queue context */ -struct bnx2x_plugin_tpa_aqc { - u16 bufid; /* local bufid */ - u16 state; -#define BNX2X_PLUGIN_TPA_START 1 -#define BNX2X_PLUGIN_TPA_STOP 2 -}; - -/* doorbell */ -union db_prod { - struct doorbell_set_prod data; - u32 raw; -}; - -struct bnx2x_plugin_queue_dma_info { - u8 *va; - dma_addr_t pa; - u16 num_desc; -}; - -struct bnx2x_plugin_rx_queue { - struct host_hc_status_block_e2 *status_blk; - struct eth_rx_bd *rx_desc_ring; -#ifdef __CHIPSIM_NATIVE_HSI__ - struct eth_rx_cqe *rx_comp_ring; -#else - union eth_rx_cqe *rx_comp_ring; -#endif - struct eth_rx_sge *rx_sge_ring; /* SGE ring */ - u16 *rx_uid_ring; /* buffer ids ring */ - u32 sge_mask[RX_SGE_MASK_LEN]; /* SGE bit mask */ - - u8 idx; /* number in fp array */ - u16 q_id; /* queue zone id */ - u16 sb_id; /* status block number in HW */ - u16 num_desc; - u32 sw_sb_idx; /* reflected SB index */ - struct plugin_rpos rx_bd_prod; - struct plugin_rpos rx_bd_cons; - struct plugin_rpos rx_uid_cons; - struct plugin_rpos rx_comp_cons; - u16 rx_comp_prod; - u16 rx_sge_prod; - u16 rx_sge_cons; - u16 last_max_sge; /* last maximal completed SGE */ - __le16 *rx_cons_sb; - - /* indicated bds that can be reallocated */ - u16 tpa_ind[MAX_TPA_IND_PKTS]; - u16 tpa_max_ind; - - /* LRO pulled bds one for each LRO aggregation queue */ - struct bnx2x_plugin_tpa_aqc tpa_pool[ETH_MAX_AGG_QUEUES]; - - /* queue stats on shared memory */ - struct bnx2x_plugin_rxq_stats *rx_stats; -}; - - -struct bnx2x_plugin_tx_queue { - struct host_hc_status_block_e2 *status_blk; -#ifdef __CHIPSIM_NATIVE_HSI__ - struct eth_tx_bd_types *tx_desc_ring; -#else - union eth_tx_bd_types *tx_desc_ring; -#endif - u8 idx; /* number in fp array */ - u16 sb_id; /* status block number in HW */ - u16 num_desc; - union db_prod tx_db; - u16 tx_pkt_prod; - u16 tx_pkt_cons; - struct plugin_rpos tx_bd_prod; - struct plugin_rpos tx_bd_cons; - __le16 *tx_cons_sb; - u32 sw_sb_idx; /* reflected SB index */ - u32 driver_xoff; /* statistics */ - - /* queue stats on shared memory */ - struct bnx2x_plugin_txq_stats *tx_stats; -}; - -/* private state structure */ -struct bnx2x_priv { - u32 chip_id; - u8 pci_func; - u8 fp_flags; -#define BP_TPA_DISABLED(bp) ((bp)->fp_flags & BNX2X_PLUGIN_DISABLE_TPA) -#define BP_SHARED_SB(bp) ((bp)->fp_flags & BNX2X_PLUGIN_SHARED_SB_IDX) -#define BP_PF_QUEUE(bp) ((bp)->fp_flags & BNX2X_PLUGIN_DBG_PF_QUEUE) - - /* Fast-path queues*/ - struct bnx2x_plugin_rx_queue rxfp[BNX2X_PLUGIN_MAX_RX_QUEUES]; - struct bnx2x_plugin_tx_queue txfp[BNX2X_PLUGIN_MAX_TX_QUEUES]; -}; - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_bd_global_bufid -* -* calculates the global buffer unique id from the local buffer id -* in the BD ring and the queue index -* -* Result: -* the global buffer id -* -*---------------------------------------------------------------------------- -*/ -static inline -u32 bnx2x_plugin_bd_global_id(u16 local_bufid, u16 num_desc, u16 idx) -{ - return (num_desc + RX_SGE_COUNT) * idx + local_bufid; -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_sge_global_bufid -* -* calculates the global buffer unique id from the local buffer id -* in the SGE ring and the queue index -* -* Result: -* the global buffer id -* -*---------------------------------------------------------------------------- -*/ -static inline -u32 bnx2x_plugin_sge_global_id(u16 local_bufid, u16 num_desc, u16 idx) -{ - return (num_desc + RX_SGE_COUNT) * idx + num_desc + local_bufid; -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_bd_local_bufid -* -* Calculates the local buffer id for the BD ring buffers from the global -* id and the queue index -* -* Result: -* the local buffer id -* -*---------------------------------------------------------------------------- -*/ -static inline -u16 bnx2x_plugin_bd_local_id(u32 global_bufid, u16 num_desc, u16 idx) -{ - return (u16)(global_bufid - (num_desc + RX_SGE_COUNT) * idx); -} - -/* -*---------------------------------------------------------------------------- -* -* bnx2x_plugin_sge_local_bufid -* -* Calculates the local buffer id for the SGE ring buffers from the global -* id and the queue index -* -* Result: -* the local buffer id -* -*---------------------------------------------------------------------------- -*/ -static inline -u16 bnx2x_plugin_sge_local_id(u32 global_bufid, u16 num_desc, u16 idx) -{ - return (u16)(global_bufid - (num_desc + RX_SGE_COUNT) * idx - num_desc); -} - -/* Plugin API forward */ -static uint32 -bnx2x_plugin_sw_init(Plugin_State *ps); - -static uint32 -bnx2x_plugin_reinit_rx_ring(Plugin_State *ps, uint32 queue); - -static uint32 -bnx2x_plugin_reinit_tx_ring(Plugin_State *ps, uint32 queue); - -static uint32 -bnx2x_plugin_enable_interrupt(Plugin_State *ps, uint32 intrIdx); - -static uint32 -bnx2x_plugin_disable_interrupt(Plugin_State *ps, uint32 intrIdx); - -static uint32 -bnx2x_plugin_add_frame_tx_ring(Plugin_State *ps, uint32 queue, - const Plugin_SendInfo *info, - const Plugin_SgList *frame, - Bool lastPktHint); - -static uint32 -bnx2x_plugin_check_tx_ring(Plugin_State *ps, uint32 queue); - -static uint32 -bnx2x_plugin_check_rx_ring(Plugin_State *ps, uint32 queue, uint32 maxPkts); - -static uint32 -bnx2x_plugin_add_bufs_rx_ring(Plugin_State *ps, uint32 queue); - -#ifdef __CHIPSIM_NPA__ -void -bnx2x_plugin_ramrod_complete(Plugin_State *ps, struct bnx2x_priv *bp, - struct bnx2x_plugin_rx_queue *fp, - common_ramrod_eth_rx_cqe *cqe); -#endif - - -#endif /* bnx2x_plugin.h */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_compat.h b/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_compat.h deleted file mode 100644 index a348cef..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_compat.h +++ /dev/null @@ -1,62 +0,0 @@ -/* bnx2x_plugin_compat.h: Broadcom bnx2x NPA plugin - * - * Copyright 2009-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Written by: Shmulik Ravid - * - */ -#ifndef _BNX2X_PLUGIN_COMPAT_H -#define _BNX2X_PLUGIN_COMPAT_H - -/* logging */ -#define ShellLog(_n, _fmt, ...) \ - ps->shellApi.log((_n) + 1, "%s: " _fmt, __FUNCTION__, ##__VA_ARGS__) - -#ifdef PLUGIN_DP -#define DP(_n, _fmt, ...) \ - ps->shellApi.log((_n) + 1, "%s: " _fmt, __FUNCTION__, ##__VA_ARGS__) -#else -#define DP(_n, _fmt, ...) -#endif - -/* HW write */ -static inline void -hw_writel(Plugin_State *ps, uint32 val, uint32 offset) -{ - *(volatile uint32*)((uint8*)ps->memioAddr + (offset)) = (val); -} - -/* DOORBELL */ -#define DOORBELL(ps, id, val) \ - do { \ - hw_writel((ps), (u32)(val), VF_BAR_DOORBELL_OFFSET + \ - (BAR_DOORBELL_STRIDE * (id)) + BAR_DOORBELL_TYPE_OFF); \ - } while (0) - -/* RX PRODUCERS */ -#define PROD_UPDATE(ps, qid, rx_prods) \ - do { \ - int i; \ - uint32 start = PXP_VF_ADDR_USDM_QUEUES_START + \ - (qid) * sizeof(struct ustorm_queue_zone_data); \ - for (i = 0; i < sizeof((rx_prods))/4; i++) \ - hw_writel((ps), ((u32 *)&(rx_prods))[i], start + i*4); \ - } while (0) - -/* INTERRUPT ACK */ -#define IGU_ACK(ps, addr, ack_data) \ - do { \ - hw_writel((ps), (u32)(ack_data), BAR_IGU + (addr)); \ - } while (0) - -#endif /* bnx2x_plugin_compat.h */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_defs.h b/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_defs.h deleted file mode 100644 index 88bc110..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_defs.h +++ /dev/null @@ -1,262 +0,0 @@ -/* bnx2x_plugin_defs.h: Broadcom bnx2x NPA plugin - * - * Copyright 2009-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Written by: Shmulik Ravid - * - */ -#ifndef _BNX2X_PLUGIN_DEFS_H -#define _BNX2X_PLUGIN_DEFS_H - -/* - * hsi types - */ -typedef int8 __s8; -typedef int16 __s16; -typedef int32 __s32; -typedef int64 __s64; -typedef uint8 __u8; -typedef uint16 __u16; -typedef uint32 __u32; -typedef uint64 __u64; -typedef __s8 s8; -typedef __s16 s16; -typedef __s32 s32; -typedef __s64 s64; -typedef __u8 u8; -typedef __u16 u16; -typedef __u32 u32; -typedef __u64 u64; -typedef __u16 __le16; -typedef __u16 __be16; -typedef __u32 __le32; -typedef __u32 __be32; -typedef __u64 __le64; -typedef __u64 __be64; -typedef __u16 __sum16; -typedef __u64 dma_addr_t; - -/* endianity */ -#ifndef __LITTLE_ENDIAN -#define __LITTLE_ENDIAN 1234 -#endif -#ifndef __LITTLE_ENDIAN_BITFIELD -#define __LITTLE_ENDIAN_BITFIELD -#endif - -/* NULL */ -#ifndef NULL -#define NULL 0 -#endif - - -/* - * Byte swapping macros not using architecture shortcuts - */ -#define ___constant_swab16(x) ((__u16)( \ - (((__u16)(x) & (__u16)0x00ffU) << 8) | \ - (((__u16)(x) & (__u16)0xff00U) >> 8))) - -#define ___constant_swab32(x) ((__u32)( \ - (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \ - (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \ - (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \ - (((__u32)(x) & (__u32)0xff000000UL) >> 24))) - -#define ___constant_swab64(x) ((__u64)( \ - (((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \ - (((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \ - (((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) | \ - (((__u64)(x) & (__u64)0x00000000ff000000ULL) << 8) | \ - (((__u64)(x) & (__u64)0x000000ff00000000ULL) >> 8) | \ - (((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ - (((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) | \ - (((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56))) - -#define ___constant_swahw32(x) ((__u32)( \ - (((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ - (((__u32)(x) & (__u32)0xffff0000UL) >> 16))) - -#define ___constant_swahb32(x) ((__u32)( \ - (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ - (((__u32)(x) & (__u32)0xff00ff00UL) >> 8))) - -# define __swab16 ___constant_swab16 -# define __swab32 ___constant_swab32 -# define __swab64 ___constant_swab64 -# define __swahw32 ___constant_swahw32 -# define __swahb32 ___constant_swahb32 -# define swab16 __swab16 -# define swab32 __swab32 -# define swab64 __swab64 -# define swahw32 __swahw32 -# define swahb32 __swahb32 - -#define __constant_htonl(x) ((__be32)___constant_swab32((x))) -#define __constant_ntohl(x) ___constant_swab32((__be32)(x)) -#define __constant_htons(x) ((__be16)___constant_swab16((x))) -#define __constant_ntohs(x) ___constant_swab16((__be16)(x)) -#define __constant_cpu_to_le64(x) ((__le64)(__u64)(x)) -#define __constant_le64_to_cpu(x) ((__u64)(__le64)(x)) -#define __constant_cpu_to_le32(x) ((__le32)(__u32)(x)) -#define __constant_le32_to_cpu(x) ((__u32)(__le32)(x)) -#define __constant_cpu_to_le16(x) ((__le16)(__u16)(x)) -#define __constant_le16_to_cpu(x) ((__u16)(__le16)(x)) -#define __constant_cpu_to_be64(x) ((__be64)___constant_swab64((x))) -#define __constant_be64_to_cpu(x) ___constant_swab64((__u64)(__be64)(x)) -#define __constant_cpu_to_be32(x) ((__be32)___constant_swab32((x))) -#define __constant_be32_to_cpu(x) ___constant_swab32((__u32)(__be32)(x)) -#define __constant_cpu_to_be16(x) ((__be16)___constant_swab16((x))) -#define __constant_be16_to_cpu(x) ___constant_swab16((__u16)(__be16)(x)) -#define __cpu_to_le64(x) ((__le64)(__u64)(x)) -#define __le64_to_cpu(x) ((__u64)(__le64)(x)) -#define __cpu_to_le32(x) ((__le32)(__u32)(x)) -#define __le32_to_cpu(x) ((__u32)(__le32)(x)) -#define __cpu_to_le16(x) ((__le16)(__u16)(x)) -#define __le16_to_cpu(x) ((__u16)(__le16)(x)) -#define __cpu_to_be64(x) ((__be64)__swab64((x))) -#define __be64_to_cpu(x) __swab64((__u64)(__be64)(x)) -#define __cpu_to_be32(x) ((__be32)__swab32((x))) -#define __be32_to_cpu(x) __swab32((__u32)(__be32)(x)) -#define __cpu_to_be16(x) ((__be16)__swab16((x))) -#define __be16_to_cpu(x) __swab16((__u16)(__be16)(x)) - -/* from byte-order generic */ -#define cpu_to_le64 __cpu_to_le64 -#define le64_to_cpu __le64_to_cpu -#define cpu_to_le32 __cpu_to_le32 -#define le32_to_cpu __le32_to_cpu -#define cpu_to_le16 __cpu_to_le16 -#define le16_to_cpu __le16_to_cpu -#define cpu_to_be64 __cpu_to_be64 -#define be64_to_cpu __be64_to_cpu -#define cpu_to_be32 __cpu_to_be32 -#define be32_to_cpu __be32_to_cpu -#define cpu_to_be16 __cpu_to_be16 -#define be16_to_cpu __be16_to_cpu - -/* networking macros */ -#undef ntohl -#undef ntohs -#undef htonl -#undef htons - -#define ___htonl(x) __cpu_to_be32(x) -#define ___htons(x) __cpu_to_be16(x) -#define ___ntohl(x) __be32_to_cpu(x) -#define ___ntohs(x) __be16_to_cpu(x) - -#define htonl(x) ___htonl(x) -#define ntohl(x) ___ntohl(x) -#define htons(x) ___htons(x) -#define ntohs(x) ___ntohs(x) - -/* - * inet definitions - */ - -/* ethernet */ -#define BCMVF_ETH_ALEN 6 /* Octets in one ethernet addr */ -#define BCMVF_ETH_HLEN 14 /* Total octets in header. */ -#define BCMVF_ETH_DATA_LEN 1500 /* Max. octets in payload */ -#define BCMVF_ETH_JUMBO_TYPE 0x8870 /* Max. octets in payload */ - -#include "vmware_pack_begin.h" -struct ethhdr { - unsigned char h_dest[BCMVF_ETH_ALEN]; /* destination eth addr */ - unsigned char h_source[BCMVF_ETH_ALEN]; /* source ether addr */ - __be16 h_proto; /* packet type ID field */ -}; -#include "vmware_pack_end.h" - -/* ipv4 */ -#include "vmware_pack_begin.h" -struct iphdr { -#if defined(__LITTLE_ENDIAN_BITFIELD) - u8 ihl:4, - version:4; -#elif defined (__BIG_ENDIAN_BITFIELD) - u8 version:4, - ihl:4; -#else -#error "Please fix " -#endif - u8 tos; - __be16 tot_len; - __be16 id; - __be16 frag_off; - u8 ttl; - u8 protocol; - __sum16 check; - __be32 saddr; - __be32 daddr; - /*The options start here. */ -}; -#include "vmware_pack_end.h" - -/* ipv6 */ -#include "vmware_pack_begin.h" -struct ipv6hdr { -#if defined(__LITTLE_ENDIAN_BITFIELD) - u8 priority:4, - version:4; -#elif defined(__BIG_ENDIAN_BITFIELD) - u8 version:4, - priority:4; -#else -#error "Please fix " -#endif - u8 flow_lbl[3]; - __be16 payload_len; - u8 nexthdr; - u8 hop_limit; - u8 saddr[16]; - u8 daddr[16]; -}; -#include "vmware_pack_end.h" - -#define NEXTHDR_HOP 0 /* Hop-by-hop option header. */ -#define NEXTHDR_TCP 6 /* TCP segment. */ -#define NEXTHDR_UDP 17 /* UDP message. */ -#define NEXTHDR_IPV6 41 /* IPv6 in IPv6 */ -#define NEXTHDR_ROUTING 43 /* Routing header. */ -#define NEXTHDR_FRAGMENT 44 /* Fragmentation/reassembly header. */ -#define NEXTHDR_ESP 50 /* Encapsulating security payload. */ -#define NEXTHDR_AUTH 51 /* Authentication header. */ -#define NEXTHDR_ICMP 58 /* ICMP for IPv6. */ -#define NEXTHDR_NONE 59 /* No next header */ -#define NEXTHDR_DEST 60 /* Destination options header. */ -#define NEXTHDR_MOBILITY 135 /* Mobility header. */ -#define NEXTHDR_MAX 255 - -/* PAGE_SHIFT determines the page size */ -#undef PAGE_SIZE -#define PAGE_SHIFT (12) -#define PAGE_SIZE (1 << PAGE_SHIFT) -#define PAGE_MASK (PAGE_SIZE-1) - -/* Alignment */ -#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) -#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1) -#define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE) - -#ifndef min - #define min(x,y) ((x) < (y) ? x : y) -#endif - -#ifndef max - #define max(x,y) ((x) > (y) ? x : y) -#endif - - -#endif /* bnx2x_plugin_defs.h */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_hsi.h b/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_hsi.h deleted file mode 100644 index 8d25948..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_hsi.h +++ /dev/null @@ -1,533 +0,0 @@ -/* bnx2x_plugin_hsi.h: Broadcom bnx2x NPA plugin - * - * Copyright 2009-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Written by: Shmulik Ravid - * - */ -#ifndef __BNX2X_PLUGIN_HSI__ -#define __BNX2X_PLUGIN_HSI__ - -/* - * common data for all protocols - */ -struct doorbell_hdr { - u8 header; -#define DOORBELL_HDR_RX (0x1<<0) -#define DOORBELL_HDR_RX_SHIFT 0 -#define DOORBELL_HDR_DB_TYPE (0x1<<1) -#define DOORBELL_HDR_DB_TYPE_SHIFT 1 -#define DOORBELL_HDR_DPM_SIZE (0x3<<2) -#define DOORBELL_HDR_DPM_SIZE_SHIFT 2 -#define DOORBELL_HDR_CONN_TYPE (0xF<<4) -#define DOORBELL_HDR_CONN_TYPE_SHIFT 4 -}; - - -/* - * doorbell message sent to the chip - */ -struct doorbell_set_prod { -#if defined(__BIG_ENDIAN) - u16 prod; - u8 zero_fill1; - struct doorbell_hdr header; -#elif defined(__LITTLE_ENDIAN) - struct doorbell_hdr header; - u8 zero_fill1; - u16 prod; -#endif -}; - - -struct regpair { - __le32 lo; - __le32 hi; -}; - - -/* - * 3 lines. status block $$KEEP_ENDIANNESS$$ - */ -struct hc_status_block_e1x { - __le16 index_values[HC_SB_MAX_INDICES_E1X]; - __le16 running_index[HC_SB_MAX_SM]; - u32 rsrv; -}; - -/* - * host status block - */ -struct host_hc_status_block_e1x { - struct hc_status_block_e1x sb; -}; - - -/* - * 3 lines. status block $$KEEP_ENDIANNESS$$ - */ -struct hc_status_block_e2 { - __le16 index_values[HC_SB_MAX_INDICES_E2]; - __le16 running_index[HC_SB_MAX_SM]; - u32 reserved; -}; - -/* - * host status block - */ -struct host_hc_status_block_e2 { - struct hc_status_block_e2 sb; -}; - - -/* - * IGU driver acknowledgment register - */ -struct igu_ack_register { -#if defined(__BIG_ENDIAN) - u16 sb_id_and_flags; -#define IGU_ACK_REGISTER_STATUS_BLOCK_ID (0x1F<<0) -#define IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT 0 -#define IGU_ACK_REGISTER_STORM_ID (0x7<<5) -#define IGU_ACK_REGISTER_STORM_ID_SHIFT 5 -#define IGU_ACK_REGISTER_UPDATE_INDEX (0x1<<8) -#define IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT 8 -#define IGU_ACK_REGISTER_INTERRUPT_MODE (0x3<<9) -#define IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT 9 -#define IGU_ACK_REGISTER_RESERVED (0x1F<<11) -#define IGU_ACK_REGISTER_RESERVED_SHIFT 11 - u16 status_block_index; -#elif defined(__LITTLE_ENDIAN) - u16 status_block_index; - u16 sb_id_and_flags; -#define IGU_ACK_REGISTER_STATUS_BLOCK_ID (0x1F<<0) -#define IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT 0 -#define IGU_ACK_REGISTER_STORM_ID (0x7<<5) -#define IGU_ACK_REGISTER_STORM_ID_SHIFT 5 -#define IGU_ACK_REGISTER_UPDATE_INDEX (0x1<<8) -#define IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT 8 -#define IGU_ACK_REGISTER_INTERRUPT_MODE (0x3<<9) -#define IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT 9 -#define IGU_ACK_REGISTER_RESERVED (0x1F<<11) -#define IGU_ACK_REGISTER_RESERVED_SHIFT 11 -#endif -}; - - -/* - * Control register for the IGU command register - */ -struct igu_ctrl_reg { - u32 ctrl_data; -#define IGU_CTRL_REG_ADDRESS (0xFFF<<0) -#define IGU_CTRL_REG_ADDRESS_SHIFT 0 -#define IGU_CTRL_REG_FID (0x7F<<12) -#define IGU_CTRL_REG_FID_SHIFT 12 -#define IGU_CTRL_REG_RESERVED (0x1<<19) -#define IGU_CTRL_REG_RESERVED_SHIFT 19 -#define IGU_CTRL_REG_TYPE (0x1<<20) -#define IGU_CTRL_REG_TYPE_SHIFT 20 -#define IGU_CTRL_REG_UNUSED (0x7FF<<21) -#define IGU_CTRL_REG_UNUSED_SHIFT 21 -}; - - -/* - * IGU driver acknowledgement register - */ -struct igu_regular { - u32 sb_id_and_flags; -#define IGU_REGULAR_SB_INDEX (0xFFFFF<<0) -#define IGU_REGULAR_SB_INDEX_SHIFT 0 -#define IGU_REGULAR_RESERVED0 (0x1<<20) -#define IGU_REGULAR_RESERVED0_SHIFT 20 -#define IGU_REGULAR_SEGMENT_ACCESS (0x7<<21) -#define IGU_REGULAR_SEGMENT_ACCESS_SHIFT 21 -#define IGU_REGULAR_BUPDATE (0x1<<24) -#define IGU_REGULAR_BUPDATE_SHIFT 24 -#define IGU_REGULAR_ENABLE_INT (0x3<<25) -#define IGU_REGULAR_ENABLE_INT_SHIFT 25 -#define IGU_REGULAR_RESERVED_1 (0x1<<27) -#define IGU_REGULAR_RESERVED_1_SHIFT 27 -#define IGU_REGULAR_CLEANUP_TYPE (0x3<<28) -#define IGU_REGULAR_CLEANUP_TYPE_SHIFT 28 -#define IGU_REGULAR_CLEANUP_SET (0x1<<30) -#define IGU_REGULAR_CLEANUP_SET_SHIFT 30 -#define IGU_REGULAR_BCLEANUP (0x1<<31) -#define IGU_REGULAR_BCLEANUP_SHIFT 31 - u32 reserved_2; -}; - - -/* - * Parser parsing flags field - */ -struct parsing_flags { - __le16 flags; -#define PARSING_FLAGS_ETHERNET_ADDRESS_TYPE (0x1<<0) -#define PARSING_FLAGS_ETHERNET_ADDRESS_TYPE_SHIFT 0 -#define PARSING_FLAGS_INNER_VLAN_EXIST (0x1<<1) -#define PARSING_FLAGS_INNER_VLAN_EXIST_SHIFT 1 -#define PARSING_FLAGS_OUTER_VLAN_EXIST (0x1<<2) -#define PARSING_FLAGS_OUTER_VLAN_EXIST_SHIFT 2 -#define PARSING_FLAGS_OVER_ETHERNET_PROTOCOL (0x3<<3) -#define PARSING_FLAGS_OVER_ETHERNET_PROTOCOL_SHIFT 3 -#define PARSING_FLAGS_IP_OPTIONS (0x1<<5) -#define PARSING_FLAGS_IP_OPTIONS_SHIFT 5 -#define PARSING_FLAGS_FRAGMENTATION_STATUS (0x1<<6) -#define PARSING_FLAGS_FRAGMENTATION_STATUS_SHIFT 6 -#define PARSING_FLAGS_OVER_IP_PROTOCOL (0x3<<7) -#define PARSING_FLAGS_OVER_IP_PROTOCOL_SHIFT 7 -#define PARSING_FLAGS_PURE_ACK_INDICATION (0x1<<9) -#define PARSING_FLAGS_PURE_ACK_INDICATION_SHIFT 9 -#define PARSING_FLAGS_TCP_OPTIONS_EXIST (0x1<<10) -#define PARSING_FLAGS_TCP_OPTIONS_EXIST_SHIFT 10 -#define PARSING_FLAGS_TIME_STAMP_EXIST_FLAG (0x1<<11) -#define PARSING_FLAGS_TIME_STAMP_EXIST_FLAG_SHIFT 11 -#define PARSING_FLAGS_CONNECTION_MATCH (0x1<<12) -#define PARSING_FLAGS_CONNECTION_MATCH_SHIFT 12 -#define PARSING_FLAGS_LLC_SNAP (0x1<<13) -#define PARSING_FLAGS_LLC_SNAP_SHIFT 13 -#define PARSING_FLAGS_RESERVED0 (0x3<<14) -#define PARSING_FLAGS_RESERVED0_SHIFT 14 -}; - - -/* - * SDM operation gen command (generate aggregative interrupt) - */ -struct sdm_op_gen { - __le32 command; -#define SDM_OP_GEN_COMP_PARAM (0x1F<<0) -#define SDM_OP_GEN_COMP_PARAM_SHIFT 0 -#define SDM_OP_GEN_COMP_TYPE (0x7<<5) -#define SDM_OP_GEN_COMP_TYPE_SHIFT 5 -#define SDM_OP_GEN_AGG_VECT_IDX (0xFF<<8) -#define SDM_OP_GEN_AGG_VECT_IDX_SHIFT 8 -#define SDM_OP_GEN_AGG_VECT_IDX_VALID (0x1<<16) -#define SDM_OP_GEN_AGG_VECT_IDX_VALID_SHIFT 16 -#define SDM_OP_GEN_RESERVED (0x7FFF<<17) -#define SDM_OP_GEN_RESERVED_SHIFT 17 -}; - - -/* - * union for sgl and raw data. - */ -union eth_sgl_or_raw_data { - __le16 sgl[8]; - __le32 raw_data[4]; -}; - -/* - * regular eth FP CQE parameters struct $$KEEP_ENDIANNESS$$ - */ -struct eth_fast_path_rx_cqe { - u8 type_error_flags; -#define ETH_FAST_PATH_RX_CQE_TYPE (0x1<<0) -#define ETH_FAST_PATH_RX_CQE_TYPE_SHIFT 0 -#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG (0x1<<1) -#define ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG_SHIFT 1 -#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG (0x1<<2) -#define ETH_FAST_PATH_RX_CQE_IP_BAD_XSUM_FLG_SHIFT 2 -#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG (0x1<<3) -#define ETH_FAST_PATH_RX_CQE_L4_BAD_XSUM_FLG_SHIFT 3 -#define ETH_FAST_PATH_RX_CQE_START_FLG (0x1<<4) -#define ETH_FAST_PATH_RX_CQE_START_FLG_SHIFT 4 -#define ETH_FAST_PATH_RX_CQE_END_FLG (0x1<<5) -#define ETH_FAST_PATH_RX_CQE_END_FLG_SHIFT 5 -#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL (0x3<<6) -#define ETH_FAST_PATH_RX_CQE_SGL_RAW_SEL_SHIFT 6 - u8 status_flags; -#define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE (0x7<<0) -#define ETH_FAST_PATH_RX_CQE_RSS_HASH_TYPE_SHIFT 0 -#define ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG (0x1<<3) -#define ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG_SHIFT 3 -#define ETH_FAST_PATH_RX_CQE_BROADCAST_FLG (0x1<<4) -#define ETH_FAST_PATH_RX_CQE_BROADCAST_FLG_SHIFT 4 -#define ETH_FAST_PATH_RX_CQE_MAC_MATCH_FLG (0x1<<5) -#define ETH_FAST_PATH_RX_CQE_MAC_MATCH_FLG_SHIFT 5 -#define ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG (0x1<<6) -#define ETH_FAST_PATH_RX_CQE_IP_XSUM_NO_VALIDATION_FLG_SHIFT 6 -#define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG (0x1<<7) -#define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG_SHIFT 7 - u8 placement_offset; - u8 queue_index; - __le32 rss_hash_result; - __le16 vlan_tag; - __le16 pkt_len; - __le16 len_on_bd; - struct parsing_flags pars_flags; - union eth_sgl_or_raw_data sgl_or_raw_data; -}; - - -/* - * The eth Rx Buffer Descriptor - */ -struct eth_rx_bd { - __le32 addr_lo; - __le32 addr_hi; -}; - - -/* - * Place holder for ramrods protocol specific data - */ -struct ramrod_data { - __le32 data_lo; - __le32 data_hi; -}; - -/* - * Eth Rx Cqe structure- general structure for ramrods $$KEEP_ENDIANNESS$$ - */ -struct common_ramrod_eth_rx_cqe { - u8 ramrod_type; -#define COMMON_RAMROD_ETH_RX_CQE_TYPE (0x1<<0) -#define COMMON_RAMROD_ETH_RX_CQE_TYPE_SHIFT 0 -#define COMMON_RAMROD_ETH_RX_CQE_ERROR (0x1<<1) -#define COMMON_RAMROD_ETH_RX_CQE_ERROR_SHIFT 1 -#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0 (0x3F<<2) -#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT 2 - u8 conn_type; - __le16 reserved1; - __le32 conn_and_cmd_data; -#define COMMON_RAMROD_ETH_RX_CQE_CID (0xFFFFFF<<0) -#define COMMON_RAMROD_ETH_RX_CQE_CID_SHIFT 0 -#define COMMON_RAMROD_ETH_RX_CQE_CMD_ID (0xFF<<24) -#define COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT 24 - struct ramrod_data protocol_data; - __le32 reserved2[4]; -}; - -/* - * Rx Last CQE in page (in ETH) - */ -struct eth_rx_cqe_next_page { - __le32 addr_lo; - __le32 addr_hi; - __le32 reserved[6]; -}; - -/* - * union for all eth rx cqe types (fix their sizes) - */ -union eth_rx_cqe { - struct eth_fast_path_rx_cqe fast_path_cqe; - struct common_ramrod_eth_rx_cqe ramrod_cqe; - struct eth_rx_cqe_next_page next_page_cqe; -}; - - - -/* - * The eth Rx SGE Descriptor - */ -struct eth_rx_sge { - __le32 addr_lo; - __le32 addr_hi; -}; - - - -/* - * Tx regular BD structure $$KEEP_ENDIANNESS$$ - */ -struct eth_tx_bd { - __le32 addr_lo; - __le32 addr_hi; - __le16 total_pkt_bytes; - __le16 nbytes; - u8 reserved[4]; -}; - - -/* - * structure for easy accessibility to assembler - */ -struct eth_tx_bd_flags { - u8 as_bitfield; -#define ETH_TX_BD_FLAGS_IP_CSUM (0x1<<0) -#define ETH_TX_BD_FLAGS_IP_CSUM_SHIFT 0 -#define ETH_TX_BD_FLAGS_L4_CSUM (0x1<<1) -#define ETH_TX_BD_FLAGS_L4_CSUM_SHIFT 1 -#define ETH_TX_BD_FLAGS_VLAN_MODE (0x3<<2) -#define ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT 2 -#define ETH_TX_BD_FLAGS_START_BD (0x1<<4) -#define ETH_TX_BD_FLAGS_START_BD_SHIFT 4 -#define ETH_TX_BD_FLAGS_IS_UDP (0x1<<5) -#define ETH_TX_BD_FLAGS_IS_UDP_SHIFT 5 -#define ETH_TX_BD_FLAGS_SW_LSO (0x1<<6) -#define ETH_TX_BD_FLAGS_SW_LSO_SHIFT 6 -#define ETH_TX_BD_FLAGS_IPV6 (0x1<<7) -#define ETH_TX_BD_FLAGS_IPV6_SHIFT 7 -}; - - -/* - * The eth Tx Buffer Descriptor $$KEEP_ENDIANNESS$$ - */ -struct eth_tx_start_bd { - __le32 addr_lo; - __le32 addr_hi; - __le16 nbd; - __le16 nbytes; - __le16 vlan_or_ethertype; - struct eth_tx_bd_flags bd_flags; - u8 general_data; -#define ETH_TX_START_BD_HDR_NBDS (0x3F<<0) -#define ETH_TX_START_BD_HDR_NBDS_SHIFT 0 -#define ETH_TX_START_BD_ETH_ADDR_TYPE (0x3<<6) -#define ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT 6 -}; - -/* - * Tx parsing BD structure for ETH E1/E1h $$KEEP_ENDIANNESS$$ - */ -struct eth_tx_parse_bd_e1x { - u8 global_data; -#define ETH_TX_PARSE_BD_E1X_IP_HDR_START_OFFSET_W (0xF<<0) -#define ETH_TX_PARSE_BD_E1X_IP_HDR_START_OFFSET_W_SHIFT 0 -#define ETH_TX_PARSE_BD_E1X_RESERVED0 (0x1<<4) -#define ETH_TX_PARSE_BD_E1X_RESERVED0_SHIFT 4 -#define ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN (0x1<<5) -#define ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN_SHIFT 5 -#define ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN (0x1<<6) -#define ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT 6 -#define ETH_TX_PARSE_BD_E1X_NS_FLG (0x1<<7) -#define ETH_TX_PARSE_BD_E1X_NS_FLG_SHIFT 7 - u8 tcp_flags; -#define ETH_TX_PARSE_BD_E1X_FIN_FLG (0x1<<0) -#define ETH_TX_PARSE_BD_E1X_FIN_FLG_SHIFT 0 -#define ETH_TX_PARSE_BD_E1X_SYN_FLG (0x1<<1) -#define ETH_TX_PARSE_BD_E1X_SYN_FLG_SHIFT 1 -#define ETH_TX_PARSE_BD_E1X_RST_FLG (0x1<<2) -#define ETH_TX_PARSE_BD_E1X_RST_FLG_SHIFT 2 -#define ETH_TX_PARSE_BD_E1X_PSH_FLG (0x1<<3) -#define ETH_TX_PARSE_BD_E1X_PSH_FLG_SHIFT 3 -#define ETH_TX_PARSE_BD_E1X_ACK_FLG (0x1<<4) -#define ETH_TX_PARSE_BD_E1X_ACK_FLG_SHIFT 4 -#define ETH_TX_PARSE_BD_E1X_URG_FLG (0x1<<5) -#define ETH_TX_PARSE_BD_E1X_URG_FLG_SHIFT 5 -#define ETH_TX_PARSE_BD_E1X_ECE_FLG (0x1<<6) -#define ETH_TX_PARSE_BD_E1X_ECE_FLG_SHIFT 6 -#define ETH_TX_PARSE_BD_E1X_CWR_FLG (0x1<<7) -#define ETH_TX_PARSE_BD_E1X_CWR_FLG_SHIFT 7 - u8 ip_hlen_w; - s8 reserved; - __le16 total_hlen_w; - __le16 tcp_pseudo_csum; - __le16 lso_mss; - __le16 ip_id; - __le32 tcp_send_seq; -}; - -/* - * Tx parsing BD structure for ETH E2 $$KEEP_ENDIANNESS$$ - */ -struct eth_tx_parse_bd_e2 { - __le16 dst_mac_addr_lo; - __le16 dst_mac_addr_mid; - __le16 dst_mac_addr_hi; - __le16 src_mac_addr_lo; - __le16 src_mac_addr_mid; - __le16 src_mac_addr_hi; - __le32 parsing_data; -#define ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W (0x1FFF<<0) -#define ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT 0 -#define ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW (0xF<<13) -#define ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT 13 -#define ETH_TX_PARSE_BD_E2_LSO_MSS (0x3FFF<<17) -#define ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT 17 -#define ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR (0x1<<31) -#define ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR_SHIFT 31 -}; - -/* - * The last BD in the BD memory will hold a pointer to the next BD memory - */ -struct eth_tx_next_bd { - __le32 addr_lo; - __le32 addr_hi; - u8 reserved[8]; -}; - -/* - * union for 4 Bd types - */ -union eth_tx_bd_types { - struct eth_tx_start_bd start_bd; - struct eth_tx_bd reg_bd; - struct eth_tx_parse_bd_e1x parse_bd_e1x; - struct eth_tx_parse_bd_e2 parse_bd_e2; - struct eth_tx_next_bd next_bd; -}; - - - - - - -/* - * Three RX producers for ETH - */ -struct ustorm_eth_rx_producers { -#if defined(__BIG_ENDIAN) - u16 bd_prod; - u16 cqe_prod; -#elif defined(__LITTLE_ENDIAN) - u16 cqe_prod; - u16 bd_prod; -#endif -#if defined(__BIG_ENDIAN) - u16 reserved; - u16 sge_prod; -#elif defined(__LITTLE_ENDIAN) - u16 sge_prod; - u16 reserved; -#endif -}; - - - - - -/* - * hold PCI identification variables- used in various places in firmware - */ -struct pci_entity { -#if defined(__BIG_ENDIAN) - u8 vf_valid; - u8 vf_id; - u8 vnic_id; - u8 pf_id; -#elif defined(__LITTLE_ENDIAN) - u8 pf_id; - u8 vnic_id; - u8 vf_id; - u8 vf_valid; -#endif -}; - - - -/* - * zone A per-queue data - */ -struct ustorm_queue_zone_data { - struct ustorm_eth_rx_producers eth_rx_producers; - struct regpair reserved[3]; -}; - -#endif /* __BNX2X_PLUGIN_HSI__ */ diff --git a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_hw.h b/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_hw.h deleted file mode 100644 index 8808902..0000000 --- a/vmkdrivers/src_9/drivers/net/bnx2x/plugin/bnx2x_plugin_hw.h +++ /dev/null @@ -1,186 +0,0 @@ -/* bnx2x_plugin_hw.h: Broadcom bnx2x NPA plugin - * - * Copyright 2009-2011 Broadcom Corporation - * - * Unless you and Broadcom execute a separate written software license - * agreement governing use of this software, this software is licensed to you - * under the terms of the GNU General Public License version 2, available - * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL"). - * - * Notwithstanding the above, under no circumstances may you combine this - * software in any way with any other Broadcom software provided under a - * license other than the GPL, without Broadcom's express prior written - * consent. - * - * Written by: Shmulik Ravid - * - */ -#ifndef __BNX2X_PLUGIN_HW__ -#define __BNX2X_PLUGIN_HW__ - -#define PXP_VF_ADDR_USDM_QUEUES_START 0x3000 - -#define PXP_VF_ADDR_USDM_QUEUES_SIZE\ - (PXP_VF_ADRR_NUM_QUEUES * PXP_ADDR_QUEUE_SIZE) - -#define PXP_VF_ADDR_USDM_QUEUES_END\ - ((PXP_VF_ADDR_USDM_QUEUES_START) + (PXP_VF_ADDR_USDM_QUEUES_SIZE) - 1) - -#define PXP_VF_ADDR_CSDM_QUEUES_START 0x4100 - -#define PXP_VF_ADDR_CSDM_QUEUES_SIZE\ - (PXP_VF_ADRR_NUM_QUEUES * PXP_ADDR_QUEUE_SIZE) - -#define PXP_VF_ADDR_CSDM_QUEUES_END\ - ((PXP_VF_ADDR_CSDM_QUEUES_START) + (PXP_VF_ADDR_CSDM_QUEUES_SIZE) - 1) - -#define PXP_VF_ADDR_XSDM_QUEUES_START 0x5200 - -#define PXP_VF_ADDR_XSDM_QUEUES_SIZE\ - (PXP_VF_ADRR_NUM_QUEUES * PXP_ADDR_QUEUE_SIZE) - -#define PXP_VF_ADDR_XSDM_QUEUES_END\ - ((PXP_VF_ADDR_XSDM_QUEUES_START) + (PXP_VF_ADDR_XSDM_QUEUES_SIZE) - 1) - -#define PXP_VF_ADDR_TSDM_QUEUES_START 0x6300 -#define PXP_VF_ADDR_TSDM_QUEUES_SIZE\ - (PXP_VF_ADRR_NUM_QUEUES * PXP_ADDR_QUEUE_SIZE) -#define PXP_VF_ADDR_TSDM_QUEUES_END\ - ((PXP_VF_ADDR_TSDM_QUEUES_START) + (PXP_VF_ADDR_TSDM_QUEUES_SIZE) - 1) - -#define PRS_FLAG_OVERETH_UNKNOWN 0 -#define PRS_FLAG_OVERETH_IPV4 1 -#define PRS_FLAG_OVERETH_IPV6 2 - -#define PRS_FLAG_OVERIP_UNKNOWN 0 -#define PRS_FLAG_OVERIP_TCP 1 -#define PRS_FLAG_OVERIP_UDP 2 - -/* IGU - status block ACK */ -#define BAR_IGU 0x0000 -#define VF_BAR_DOORBELL_OFFSET 0x7C00 -#define BAR_DOORBELL_STRIDE 0x80 -#define BAR_DOORBELL_TYPE_OFF 0x40 - -#define IGU_SEG_ACCESS_NORM 0 -#define IGU_SEG_ACCESS_DEF 1 -#define IGU_SEG_ACCESS_ATTN 2 - -/* FID (if VF - [6] = 0; [5:0] = VF number; if PF - [6] = 1; [5:2] = 0; [1:0] = PF number) */ -#define IGU_FID_ENCODE_IS_PF (0x1<<6) -#define IGU_FID_ENCODE_IS_PF_SHIFT 6 -#define IGU_FID_VF_NUM_MASK (0x3f) -#define IGU_FID_PF_NUM_MASK (0x3) - -#define IGU_CTRL_CMD_TYPE_WR 1 -#define IGU_CTRL_CMD_TYPE_RD 0 -#define IGU_CMD_INT_ACK_BASE 0x0400 -#define IGU_INT_ENABLE 0 -#define IGU_INT_DISABLE 1 -#define IGU_INT_NOP 2 - - -/* Ethernet Ring parameters */ -#define X_ETH_LOCAL_RING_SIZE 13 - -/*Tx params*/ -#define X_ETH_NO_VLAN 0 -#define X_ETH_OUTBAND_VLAN 1 -#define X_ETH_INBAND_VLAN 2 - -/* The FW will pad the buffer with this value, -so the IP header will be align to 4 Byte */ -#define IP_HEADER_ALIGNMENT_PADDING 2 - -/* Maximal aggregation queues supported for Vf queues */ -#define ETH_MAX_AGG_QUEUES 8 - -#define UNKNOWN_ADDRESS 0 -#define UNICAST_ADDRESS 1 -#define MULTICAST_ADDRESS 2 -#define BROADCAST_ADDRESS 3 - - -/* - * RSS - */ - -/* ETH RSS modes */ -#define ETH_RSS_MODE_DISABLED 0 -#define ETH_RSS_MODE_REGULAR 1 -#define ETH_RSS_MODE_VLAN_PRI 2 -#define ETH_RSS_MODE_E1HOV_PRI 3 -#define ETH_RSS_MODE_IP_DSCP 4 - -/* RSS hash types */ -#define DEFAULT_HASH_TYPE 0 -#define IPV4_HASH_TYPE 1 -#define TCP_IPV4_HASH_TYPE 2 -#define IPV6_HASH_TYPE 3 -#define TCP_IPV6_HASH_TYPE 4 -#define VLAN_PRI_HASH_TYPE 5 -#define E1HOV_PRI_HASH_TYPE 6 -#define DSCP_HASH_TYPE 7 - -#define T_ETH_INDIRECTION_TABLE_SIZE 128 - -/* - * Host coalescing constants - */ - -/* used by the driver to get the SB offset */ -#define USTORM_ID 0 -#define CSTORM_ID 1 -#define XSTORM_ID 2 -#define TSTORM_ID 3 -#define ATTENTION_ID 4 - -/* index values - which counter to update */ -#define HC_INDEX_U_ETH_RX_CQ_CONS 1 -#define HC_INDEX_C_ETH_TX_CQ_CONS 5 - -/* values for RX ETH CQE type field */ -#define RX_ETH_CQE_TYPE_ETH_FASTPATH 0 -#define RX_ETH_CQE_TYPE_ETH_RAMROD 1 - -/* Number of indices per SB */ -#define HC_SB_MAX_INDICES_E1X 8 /* Multiple of 4 */ -#define HC_SB_MAX_INDICES_E2 8 /* Multiple of 4 */ -#define HC_SB_MAX_INDICES 8 /* The Maximum of all */ - -/* Number of SB */ -#define HC_SB_MAX_SB_E1X 32 -#define HC_SB_MAX_SB_E2 136 /* include PF */ -#define HC_REGULAR_SEGMENT 0 -#define HC_DEFAULT_SEGMENT 1 -#define HC_SB_MAX_SM 2 /* Fixed */ -#define SB_SEG_U 0 -#define SB_SEG_C 1 - -#define CHIP_NUM(bp) (bp->chip_id >> 16) -#define CHIP_NUM_57710 0x164e -#define CHIP_NUM_57711 0x164f -#define CHIP_NUM_57711E 0x1650 -#define CHIP_NUM_57712 0x1662 -#define CHIP_NUM_57712E 0x1663 -#define CHIP_NUM_57713 0x1651 -#define CHIP_NUM_57713E 0x1652 -#define CHIP_IS_E1(bp) (CHIP_NUM(bp) == CHIP_NUM_57710) -#define CHIP_IS_57711(bp) (CHIP_NUM(bp) == CHIP_NUM_57711) -#define CHIP_IS_57711E(bp) (CHIP_NUM(bp) == CHIP_NUM_57711E) -#define CHIP_IS_57712(bp) (CHIP_NUM(bp) == CHIP_NUM_57712) -#define CHIP_IS_57712E(bp) (CHIP_NUM(bp) == CHIP_NUM_57712E) -#define CHIP_IS_57713(bp) (CHIP_NUM(bp) == CHIP_NUM_57713) -#define CHIP_IS_57713E(bp) (CHIP_NUM(bp) == CHIP_NUM_57713E) -#define CHIP_IS_E1H(bp) (CHIP_IS_57711(bp) || \ - CHIP_IS_57711E(bp)) -#define IS_E1H_OFFSET CHIP_IS_E1H(bp) -#define CHIP_IS_E2(bp) (CHIP_IS_57712(bp) || \ - CHIP_IS_57712E(bp) || \ - CHIP_IS_57713(bp) || \ - CHIP_IS_57713E(bp)) - -#define CHIP_REV(bp) (bp->common.chip_id & 0x0000f000) -#define CHIP_REV_Ax 0x00000000 - -#endif /* __BNX2X_PLUGIN_HW__ */ diff --git a/vmkdrivers/src_9/drivers/net/e1000/e1000_main.c b/vmkdrivers/src_9/drivers/net/e1000/e1000_main.c index efb16cd..f97d6e9 100644 --- a/vmkdrivers/src_9/drivers/net/e1000/e1000_main.c +++ b/vmkdrivers/src_9/drivers/net/e1000/e1000_main.c @@ -521,6 +521,14 @@ void e1000_down(struct e1000_adapter *adapter) E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN); /* flush and sleep below */ +#ifdef __VMKLNX__ + /* Avoid watchdog bark by updating jiffies. + * Also set carrier off before stopping all queues to avoid + * potential race in netdev_watchdog. */ + netdev->trans_start = jiffies; + netif_carrier_off(netdev); +#endif + #ifdef NETIF_F_LLTX #ifdef CONFIG_NETDEVICES_MULTIQUEUE netif_stop_subqueue(netdev, 0); @@ -548,7 +556,9 @@ void e1000_down(struct e1000_adapter *adapter) del_timer_sync(&adapter->phy_info_timer); netdev->tx_queue_len = adapter->tx_queue_len; +#ifndef __VMKLNX__ netif_carrier_off(netdev); +#endif adapter->link_speed = 0; adapter->link_duplex = 0; @@ -559,6 +569,7 @@ void e1000_down(struct e1000_adapter *adapter) void e1000_reinit_locked(struct e1000_adapter *adapter) { + ASSERT_RTNL(); WARN_ON(in_interrupt()); while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) msleep(1); @@ -3407,9 +3418,13 @@ static void e1000_reset_task(struct work_struct *work) { struct e1000_adapter *adapter; adapter = container_of(work, struct e1000_adapter, reset_task); - +#if defined(__VMKLNX__) + rtnl_lock(); +#endif e1000_reinit_locked(adapter); - +#if defined(__VMKLNX__) + rtnl_unlock(); +#endif } /** @@ -3755,9 +3770,14 @@ static irqreturn_t e1000_intr(int irq, void *data) __netif_rx_schedule(netdev, &adapter->rx_ring[0].napi); #else /* defined(__VMKLNX__) */ __netif_rx_schedule(netdev, &adapter->napi); + } else { + /* this really should not happen! if it does it is basically a + * bug, but not a hard error, so enable ints and continue */ + if (!test_bit(__E1000_DOWN, &adapter->flags)) + e1000_irq_enable(adapter); #endif /* !defined(__VMKLNX__) */ } -#else +#else /* CONFIG_E1000_NAPI */ /* Writing IMC and IMS is needed for 82547. * Due to Hub Link bus being occupied, an interrupt * de-assertion message is not able to be sent. @@ -3893,7 +3913,11 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, buffer_info = &tx_ring->buffer_info[i]; cleaned = (i == eop); +#ifdef __VMKLNX__ + if (cleaned && buffer_info->skb) { +#else if (cleaned) { +#endif struct sk_buff *skb = buffer_info->skb; #ifdef NETIF_F_TSO unsigned int segs, bytecount; diff --git a/vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.c b/vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.c index 1aceb32..a13ee17 100644 --- a/vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.c +++ b/vmkdrivers/src_9/drivers/net/e1000e/e1000_80003es2lan.c @@ -997,14 +997,6 @@ static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw) reg |= (1 << 28); ew32(TARC(1), reg); - /* - * Disable IPv6 extension header parsing because some malformed - * IPv6 headers can hang the Rx. - */ - reg = er32(RFCTL); - reg |= (E1000_RFCTL_IPV6_EX_DIS | E1000_RFCTL_NEW_IPV6_EXT_DIS); - ew32(RFCTL, reg); - return; } diff --git a/vmkdrivers/src_9/drivers/net/e1000e/e1000_82571.c b/vmkdrivers/src_9/drivers/net/e1000e/e1000_82571.c index 7b7b13a..e84d04d 100644 --- a/vmkdrivers/src_9/drivers/net/e1000e/e1000_82571.c +++ b/vmkdrivers/src_9/drivers/net/e1000e/e1000_82571.c @@ -1184,16 +1184,6 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) ew32(CTRL_EXT, reg); } - /* - * Disable IPv6 extension header parsing because some malformed - * IPv6 headers can hang the Rx. - */ - if (hw->mac.type <= e1000_82573) { - reg = er32(RFCTL); - reg |= (E1000_RFCTL_IPV6_EX_DIS | E1000_RFCTL_NEW_IPV6_EXT_DIS); - ew32(RFCTL, reg); - } - /* PCI-Ex Control Registers */ switch (hw->mac.type) { diff --git a/vmkdrivers/src_9/drivers/net/e1000e/e1000_ich8lan.c b/vmkdrivers/src_9/drivers/net/e1000e/e1000_ich8lan.c index a4ba093..ce88f77 100644 --- a/vmkdrivers/src_9/drivers/net/e1000e/e1000_ich8lan.c +++ b/vmkdrivers/src_9/drivers/net/e1000e/e1000_ich8lan.c @@ -2785,21 +2785,6 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw) ew32(STATUS, reg); } - /* - * work-around descriptor data corruption issue during nfs v2 udp - * traffic, just disable the nfs filtering capability - */ - reg = er32(RFCTL); - reg |= (E1000_RFCTL_NFSW_DIS | E1000_RFCTL_NFSR_DIS); - - /* - * Disable IPv6 extension header parsing because some - * malformed IPv6 headers can hang the Rx. - */ - if (hw->mac.type == e1000_ich8lan) - reg |= (E1000_RFCTL_IPV6_EX_DIS | E1000_RFCTL_NEW_IPV6_EXT_DIS); - ew32(RFCTL,reg); - return; } diff --git a/vmkdrivers/src_9/drivers/net/e1000e/netdev.c b/vmkdrivers/src_9/drivers/net/e1000e/netdev.c index e1c4b4a..6c9d056 100644 --- a/vmkdrivers/src_9/drivers/net/e1000e/netdev.c +++ b/vmkdrivers/src_9/drivers/net/e1000e/netdev.c @@ -960,10 +960,10 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter) buffer_info = &tx_ring->buffer_info[i]; cleaned = (i == eop); #ifdef __VMKLNX__ - if (cleaned && (buffer_info->skb != NULL)) { -#else //!__VMKLNX__ + if (cleaned && buffer_info->skb) { +#else if (cleaned) { -#endif //__VMKLNX__ +#endif struct sk_buff *skb = buffer_info->skb; #ifdef NETIF_F_TSO unsigned int segs, bytecount; @@ -3500,6 +3500,11 @@ void e1000e_down(struct e1000_adapter *adapter) ew32(RCTL, rctl & ~E1000_RCTL_EN); /* flush and sleep below */ +#ifdef __VMKLNX__ + /* set trans_start so we don't get spurious watchdogs during reset */ + netdev->trans_start = jiffies; + netif_carrier_off(netdev); +#endif netif_tx_stop_all_queues(netdev); /* disable transmits in the hardware */ @@ -3519,7 +3524,11 @@ void e1000e_down(struct e1000_adapter *adapter) del_timer_sync(&adapter->phy_info_timer); netdev->tx_queue_len = adapter->tx_queue_len; +#ifndef __VMKLNX__ + /* in VMKLinux this should be put before stop all tx queues to + avoid race with netdev_watchdog. See PR 1015128 */ netif_carrier_off(netdev); +#endif adapter->link_speed = 0; adapter->link_duplex = 0; diff --git a/vmkdrivers/src_9/drivers/net/enic/enic.h b/vmkdrivers/src_9/drivers/net/enic/enic.h index 04bfab6..8048da4 100644 --- a/vmkdrivers/src_9/drivers/net/enic/enic.h +++ b/vmkdrivers/src_9/drivers/net/enic/enic.h @@ -34,7 +34,7 @@ #define DRV_NAME "enic" #define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver" -#define DRV_VERSION "1.4.2.15a" +#define DRV_VERSION "1.4.2.15c" #define DRV_COPYRIGHT "Copyright 2008-2009 Cisco Systems, Inc" #define ENIC_BARS_MAX 6 @@ -51,6 +51,8 @@ struct enic_msix_entry { void *devid; }; +/* priv_flags */ +#define ENIC_RESET_INPROGRESS (1 << 1) #define ENIC_SET_APPLIED (1 << 0) #define ENIC_SET_REQUEST (1 << 1) #define ENIC_SET_NAME (1 << 2) @@ -83,6 +85,7 @@ struct enic { u8 mac_addr[ETH_ALEN]; u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN]; unsigned int flags; + unsigned int priv_flags; unsigned int mc_count; int csum_rx_enabled; u32 port_mtu; diff --git a/vmkdrivers/src_9/drivers/net/enic/enic_ioctl.h b/vmkdrivers/src_9/drivers/net/enic/enic_ioctl.h index 203e41d..9835f68 100644 --- a/vmkdrivers/src_9/drivers/net/enic/enic_ioctl.h +++ b/vmkdrivers/src_9/drivers/net/enic/enic_ioctl.h @@ -55,6 +55,11 @@ enum enic_drvcmd_cmd { * out: (u64)a0= Num of INTRs this enic owns. * */ DRVCMD_GET_NUM_INTRS = 4, + + /* + * out: (u64)a0= BDF of this enic. + * */ + DRVCMD_GET_SBDF = 5, }; union enic_ioctl { diff --git a/vmkdrivers/src_9/drivers/net/enic/enic_main.c b/vmkdrivers/src_9/drivers/net/enic/enic_main.c index 57d9451..943ecda 100644 --- a/vmkdrivers/src_9/drivers/net/enic/enic_main.c +++ b/vmkdrivers/src_9/drivers/net/enic/enic_main.c @@ -1179,6 +1179,10 @@ static int enic_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) int bounce = 0; void *bounce_buf = NULL; int ret = 0; + struct pci_dev *pdev; + struct pci_bus *bus; + int segment; + unsigned int devfn; switch(cmd) { @@ -1190,7 +1194,7 @@ static int enic_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) */ switch (io->devcmd.cmd) { - + case CMD_MCPU_FW_INFO: case CMD_STATS_DUMP_ALL: @@ -1200,7 +1204,8 @@ static int enic_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) case CMD_INIT_PROV_INFO: case CMD_STATS_DUMP: case CMD_CONFIG_INFO_GET: - + case CMD_PROV_INFO_UPDATE: + /* These require a DMA'able bounce buffer * allocated from enic's heap. Well copy * out of this bounce buffer into supplied @@ -1228,7 +1233,7 @@ static int enic_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) default: return -EOPNOTSUPP; } - + a0 = &io->devcmd.a0; a1 = &io->devcmd.a1; @@ -1268,11 +1273,11 @@ static int enic_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) case ENIC_DRVCMD: a0 = &io->drvcmd.a0; a1 = &io->drvcmd.a1; - + switch (io->drvcmd.cmd) { case DRVCMD_GET_NUM_WQ: - *a0 = vnic_dev_get_res_count(enic->vdev, + *a0 = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ); break; @@ -1291,13 +1296,23 @@ static int enic_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) RES_TYPE_INTR_CTRL); break; + case DRVCMD_GET_SBDF: + pdev = enic->pdev; + bus = pdev->bus; + segment = pci_domain_nr(bus); + devfn = pdev->devfn; + *a0 = (segment << 16) + | ((bus->number & 0xff) << 8) + | (((PCI_SLOT(devfn)) & 0x1f) << 3) + | ((PCI_FUNC(devfn)) & 0x07); + break; default: return -EOPNOTSUPP; } return 0; - + default: ret = -EOPNOTSUPP; break; @@ -1976,7 +1991,7 @@ static void enic_change_mtu_work(struct work_struct *work) /* Stop RQ */ del_timer_sync(&enic->notify_timer); - + for (i = 0; i < enic->rq_count; i++) napi_disable(&enic->napi[i]); @@ -2245,6 +2260,7 @@ static void enic_reset(struct work_struct *work) rtnl_lock(); + enic->priv_flags |= ENIC_RESET_INPROGRESS; enic_dev_hang_notify(enic); enic_stop(enic->netdev); enic_dev_hang_reset(enic); @@ -2254,6 +2270,7 @@ static void enic_reset(struct work_struct *work) enic_dev_set_ig_vlan_rewrite_mode(enic); enic_open(enic->netdev); + enic->priv_flags &= ~ENIC_RESET_INPROGRESS; rtnl_unlock(); } @@ -2760,7 +2777,7 @@ static int __devinit enic_probe(struct pci_dev *pdev, if (enic_is_dynamic(enic)) netdev->features |= NETIF_F_HIDDEN_UPLINK; - /* + /* * Set it for non-PT device as well since ESX queries * the non-PT device for UPT support. */ @@ -2770,7 +2787,7 @@ static int __devinit enic_probe(struct pci_dev *pdev, /* For ESX dynamic vnics, override the normal netdev - * naming and hardcode the netdev name as vf_vmnic%d. + * naming and hardcode the netdev name as vf_vmnic%d. * This is necessary to avoid etherswitch from binding to vmnic0 * when visor comes up, when the vmnic0 is a dynamic vnic. * We want etherswitch binding to the first non-dynamic vmnic. diff --git a/vmkdrivers/src_9/drivers/net/enic/enic_upt.c b/vmkdrivers/src_9/drivers/net/enic/enic_upt.c index 2289dca..bf9726a 100644 --- a/vmkdrivers/src_9/drivers/net/enic/enic_upt.c +++ b/vmkdrivers/src_9/drivers/net/enic/enic_upt.c @@ -112,7 +112,7 @@ static int enic_upt_dev_stats_dump(struct enic *enic) } static void enic_upt_translate_queue_stats(struct vnic_stats *hw_stats, - vmk_NetVFTXQueueStats *vmw_stats_tx, + vmk_NetVFTXQueueStats *vmw_stats_tx, vmk_NetVFRXQueueStats *vmw_stats_rx) { vmw_stats_tx->TSOPkts = hw_stats->tx.tx_tso; @@ -214,7 +214,7 @@ static int enic_upt_set_nic_cfg(struct enic *enic, vmk_NetVFParameters *vs) */ netdev_err(enic->netdev, "Features: 0x%x, Optional Features: 0x%x\n", - vs->features, vs->optFeatures); + vs->features, vs->optFeatures); rss_default_cpu = 0; rss_base_cpu = 0; // XXX need to get this from OS rss_enable = vs->features & VMK_NETVF_F_RSS ? 1 : 0; @@ -236,9 +236,9 @@ static int enic_upt_set_nic_cfg(struct enic *enic, vmk_NetVFParameters *vs) tso_ipid_split_en = 0; // XXX need to get this from OS - /* - * Hard coding to always on bc turning it off - * causes zeroed out 8021q tag to be leaked + /* + * Hard coding to always on bc turning it off + * causes zeroed out 8021q tag to be leaked * to the guest OS. */ ig_vlan_strip_en = 1; @@ -361,7 +361,7 @@ static int enic_upt_init_vnic_resources(struct enic *enic, cq_index = i; rs = &vs->u.upt.rxQueues[i]; rq = &enic->rq[i]; - rq->index = i; + rq->index = i; rq->vdev = enic->vdev; rq->ctrl = vnic_dev_get_res(enic->vdev, RES_TYPE_RQ, i); if (!rq->ctrl) { @@ -373,7 +373,7 @@ static int enic_upt_init_vnic_resources(struct enic *enic, vnic_rq_init_start(rq, cq_index, - rs->rxRing.consIdx, + rs->rxRing.consIdx, rs->rxRing.prodIdx, error_interrupt_enable, error_interrupt_offset); @@ -400,7 +400,7 @@ static int enic_upt_init_vnic_resources(struct enic *enic, cq_index = enic->rq_count + i; ts = &vs->u.upt.txQueues[i]; wq = &enic->wq[i]; - wq->index = i; + wq->index = i; wq->vdev = enic->vdev; wq->ctrl = vnic_dev_get_res(enic->vdev, RES_TYPE_WQ, i); if (!wq->ctrl) { @@ -438,7 +438,7 @@ static int enic_upt_init_vnic_resources(struct enic *enic, for (i = 0; i < enic->cq_count; i++) { cq = &enic->cq[i]; - cq->index = i; + cq->index = i; cq->vdev = enic->vdev; cq->ctrl = vnic_dev_get_res(enic->vdev, RES_TYPE_CQ, i); if (!cq->ctrl) { @@ -491,7 +491,7 @@ static int enic_upt_init_vnic_resources(struct enic *enic, /* Init INTR resources */ - netdev_err(enic->netdev, "intr type %d, count %d, autoMask %d\n", + netdev_err(enic->netdev, "intr type %d, count %d, autoMask %d\n", vs->u.upt.intr.intrType, vs->numIntrs, vs->u.upt.intr.autoMask); @@ -499,7 +499,7 @@ static int enic_upt_init_vnic_resources(struct enic *enic, for (i = 0; i < enic->intr_count; i++) { intr = &enic->intr[i]; - intr->index = i; + intr->index = i; intr->vdev = enic->vdev; intr->ctrl = vnic_dev_get_res(enic->vdev, RES_TYPE_INTR_CTRL, i); if (!intr->ctrl) { @@ -536,7 +536,7 @@ static int enic_upt_restore_state(struct net_device *netdev, enic->wq_count = vs->numTxQueues; enic->cq_count = enic->rq_count + enic->wq_count; enic->intr_count = vs->numIntrs; - + netdev_err(netdev, "WQ %d, RQ %d, CQ %d, INTR %d\n", enic->wq_count, enic->rq_count, enic->cq_count, enic->intr_count); @@ -636,13 +636,13 @@ static int enic_upt_notify_set(struct enic *enic) { int r; - /* - * Assume that when we are called, the notify block has not been - * allocated yet, or any previous notify block has already been + /* + * Assume that when we are called, the notify block has not been + * allocated yet, or any previous notify block has already been * deallocated * - * Disregard the interrupt setting in UPT mode, - * as we always poll since we don't have an interrupt + * Disregard the interrupt setting in UPT mode, + * as we always poll since we don't have an interrupt * vector we can use in UPT mode. */ spin_lock(&enic->devcmd_lock); @@ -778,11 +778,11 @@ static int enic_upt_save_state(struct net_device *netdev, } for (i = 0; i < enic->wq_count; i++) { - + ts = &vs->tqState[i]; wq = &enic->wq[i]; cq = &enic->cq[i + enic->rq_count]; - + ts->txProd = ioread32(&wq->ctrl->posted_index); ts->txCons = ioread32(&wq->ctrl->fetch_index); @@ -826,12 +826,39 @@ void enic_upt_link_down(struct enic *enic) void enic_upt_prepare_for(struct enic *enic) { + + if (enic->priv_flags & ENIC_RESET_INPROGRESS) { + if (enic->upt_active || enic->upt_resources_alloced) { + netdev_err(enic->netdev, + "Unexpected reset while " + "upt_resource_allocated: [%d]" + "and upt_active is [%d].\n", + enic->upt_resources_alloced, + enic->upt_active); + } + return; + } + if (enic->upt_mode) enic_dev_deinit(enic); } int enic_upt_recover_from(struct enic *enic) { + int err; + + if (enic->priv_flags & ENIC_RESET_INPROGRESS) { + if (enic->upt_active || enic->upt_resources_alloced) { + netdev_err(enic->netdev, + "Unexpected reset while " + "upt_resource_allocated: [%d]" + "and upt_active is [%d].\n", + enic->upt_resources_alloced, + enic->upt_active); + } + return 0; + } + /* Switch off UPT notify timer if needed */ if (enic->upt_active) { del_timer_sync(&enic->upt_notify_timer); diff --git a/vmkdrivers/src_9/drivers/net/enic/vnic_devcmd.h b/vmkdrivers/src_9/drivers/net/enic/vnic_devcmd.h index 28c557a..317afdf 100644 --- a/vmkdrivers/src_9/drivers/net/enic/vnic_devcmd.h +++ b/vmkdrivers/src_9/drivers/net/enic/vnic_devcmd.h @@ -255,6 +255,11 @@ enum vnic_devcmd_cmd { * (u16)a1=actual bytes from VIF-CONFIG-INFO TLV, or * 0 if no VIF-CONFIG-INFO TLV was ever received. */ CMD_CONFIG_INFO_GET = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 44), + + /* Update the provisioning info of the given VIF + * (u64)a0=paddr of vnic_devcmd_provinfo + * (u32)a1=sizeof provision info */ + CMD_PROV_INFO_UPDATE = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 56), }; /* flags for CMD_OPEN */ diff --git a/vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.c b/vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.c index b0dd4c8..1145693 100644 --- a/vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.c +++ b/vmkdrivers/src_9/drivers/net/forcedeth/forcedeth.c @@ -4840,9 +4840,15 @@ static void nv_do_stats_poll(unsigned long data) static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) { struct fe_priv *np = netdev_priv(dev); - strcpy(info->driver, DRV_NAME); +#if !defined(__VMKLNX__) + strcpy(info->driver, DRV_NAME) strcpy(info->version, FORCEDETH_VERSION); strcpy(info->bus_info, pci_name(np->pci_dev)); +#else /* defined(__VMKLNX__) */ + strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); + strlcpy(info->version, FORCEDETH_VERSION, sizeof(info->version)); + strlcpy(info->bus_info, pci_name(np->pci_dev), sizeof(info->bus_info)); +#endif /* !defined(__VMKLNX__) */ } static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo) diff --git a/vmkdrivers/src_9/drivers/net/igb/e1000_mac.c b/vmkdrivers/src_9/drivers/net/igb/e1000_mac.c index 38d5679..103f0cf 100644 --- a/vmkdrivers/src_9/drivers/net/igb/e1000_mac.c +++ b/vmkdrivers/src_9/drivers/net/igb/e1000_mac.c @@ -213,10 +213,10 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) DEBUGFUNC("e1000_check_alt_mac_addr_generic"); - /* Alternate MAC address is handled by the option ROM for 82580 */ - /* and newer. SW support not required. */ - if (hw->mac.type >= e1000_82580) - goto out; + /* Alternate MAC address is handled by the option ROM for 82580 */ + /* and newer. SW support not required. */ + if (hw->mac.type >= e1000_82580) + goto out; ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1, &nvm_alt_mac_addr_offset); diff --git a/vmkdrivers/src_9/drivers/net/igb/igb_main.c b/vmkdrivers/src_9/drivers/net/igb/igb_main.c index 8f09efa..3082997 100644 --- a/vmkdrivers/src_9/drivers/net/igb/igb_main.c +++ b/vmkdrivers/src_9/drivers/net/igb/igb_main.c @@ -1354,6 +1354,7 @@ void igb_down(struct igb_adapter *adapter) #ifdef __VMKLNX__ /* set trans_start so we don't get spurious watchdogs during reset */ netdev->trans_start = jiffies; + netif_carrier_off(netdev); #endif netif_tx_stop_all_queues(netdev); @@ -1374,7 +1375,11 @@ void igb_down(struct igb_adapter *adapter) del_timer_sync(&adapter->phy_info_timer); netdev->tx_queue_len = adapter->tx_queue_len; +#ifndef __VMKLNX__ + /* in VMKLinux this should be put before stop all tx queues to + avoid race with netdev_watchdog. See PR 976054 */ netif_carrier_off(netdev); +#endif /* record the stats before reset*/ igb_update_stats(adapter); diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe.h b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe.h index b972eb2..b4a777e 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe.h +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe.h @@ -68,6 +68,10 @@ #include "ixgbe_api.h" +#ifdef __VMKLNX__ +#include +#endif + #define PFX "ixgbe: " #define DPRINTK(nlevel, klevel, fmt, args...) \ ((void)((NETIF_MSG_##nlevel & adapter->msg_enable) && \ @@ -80,12 +84,6 @@ /* TX/RX descriptor defines */ #ifdef __VMKLNX__ -/* - * PR 683953: Performance study shows that having 1024 tx ring entries - * will avoid frequent queue stop on ESX under heavy tx workloads. - * Besides, esx40 and earlier releases use 1024 tx descriptors by - * default already. - */ #define IXGBE_DEFAULT_TXD 1024 #define IXGBE_DEFAULT_TX_WORK 1024 #else @@ -198,7 +196,12 @@ struct vf_stats { u64 gotc; u64 mprc; }; - +#ifdef __VMKLNX__ +struct vf_vlan { + bool add; + int vid; +}; +#endif /* __VMKLNX__ */ struct vf_data_storage { unsigned char vf_mac_addresses[ETH_ALEN]; u16 vf_mc_hashes[IXGBE_MAX_VF_MC_ENTRIES]; @@ -219,7 +222,9 @@ struct vf_data_storage { struct vf_stats vfstats; struct vf_stats last_vfstats; struct vf_stats saved_rst_vfstats; +#ifndef __VMKLNX__ bool pf_set_mac; +#endif /* __VMKLNX__ */ u16 pf_vlan; /* When set, guest VLAN config not allowed. */ u16 pf_qos; }; @@ -301,6 +306,8 @@ enum ixgbe_ring_state_t { #ifdef __VMKLNX__ __IXGBE_RING_ALLOCATED, __IXGBE_RING_CLEAN_BUSY, + __IXGBE_RING_LATENCY, + __IXGBE_RING_RSS, #endif __IXGBE_RING_NETDEV_CNA, }; @@ -334,6 +341,18 @@ enum ixgbe_ring_state_t { set_bit(__IXGBE_RING_ALLOCATED, &(ring)->state) #define clear_ring_allocated(ring) \ clear_bit(__IXGBE_RING_ALLOCATED, &(ring)->state) +#define ring_is_latency_enabled(ring) \ + test_bit(__IXGBE_RING_LATENCY, &(ring)->state) +#define set_ring_latency_enabled(ring) \ + set_bit(__IXGBE_RING_LATENCY, &(ring)->state) +#define clear_ring_latency_enabled(ring) \ + clear_bit(__IXGBE_RING_LATENCY, &(ring)->state) +#define ring_is_rss_enabled(ring) \ + test_bit(__IXGBE_RING_RSS, &(ring)->state) +#define set_ring_rss_enabled(ring) \ + set_bit(__IXGBE_RING_RSS, &(ring)->state) +#define clear_ring_rss_enabled(ring) \ + clear_bit(__IXGBE_RING_RSS, &(ring)->state) #endif /* * queues are splitted up into 2 distinct pools. This internal @@ -618,6 +637,9 @@ struct ixgbe_adapter { #define IXGBE_FLAG2_FDIR_REQUIRES_REINIT (u32)(1 << 9) #define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP (u32)(1 << 10) #define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP (u32)(1 << 11) +#ifdef __VMKLNX__ +#define IXGBE_FLAG2_LATENCY_ENABLED (u32)(1 << 12) +#endif /* Tx fast path data */ int num_tx_queues; @@ -878,6 +900,9 @@ extern int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, extern void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter); extern void ixgbe_del_mac_filter_by_index(struct ixgbe_adapter *adapter, int index); +extern VMK_ReturnStatus ixgbe_passthru_config(struct ixgbe_adapter *adapter, + u32 vfIdx, int change, + void *data); #endif extern int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8* addr, u16 queue); diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82599.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82599.c index 0e9cfb3..af6b597 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82599.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_82599.c @@ -261,6 +261,7 @@ s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw) /* Manageability interface */ mac->ops.set_fw_drv_ver = &ixgbe_set_fw_drv_ver_generic; + return ret_val; } diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.c index b403ca7..84cd611 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_cna.c @@ -194,16 +194,15 @@ err_alloc_etherdev: void ixgbe_cna_disable(struct ixgbe_adapter *adapter) { - struct net_device *cnadev = adapter->cnadev; - int i; - - if (adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) { - adapter->flags2 &= ~IXGBE_FLAG2_CNA_ENABLED; - unregister_netdev(cnadev); + adapter->flags2 &= ~IXGBE_FLAG2_CNA_ENABLED; + adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; + adapter->ring_feature[RING_F_FCOE].indices = 0; + + if (adapter->cnadev) { + unregister_netdev(adapter->cnadev); DPRINTK(PROBE, INFO, "CNA pseudo device unregistered %s\n", - cnadev->name); - - free_netdev(cnadev); + adapter->cnadev->name); + free_netdev(adapter->cnadev); adapter->cnadev = NULL; } } diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_common.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_common.c index 5e58032..8ad7039 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_common.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_common.c @@ -3533,7 +3533,6 @@ void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf) /* If not enabling anti-spoofing then done */ if (!enable) return; - /* * The PF should be allowed to spoof so that it can support * emulation mode NICs. Reset the bit assigned to the PF @@ -3541,6 +3540,7 @@ void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf) pfvfspoof = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(pf_target_reg)); pfvfspoof ^= (1 << pf_target_shift); IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(pf_target_reg), pfvfspoof); + } /** diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82599.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82599.c index 6bf2082..9d1ddce 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82599.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_dcb_82599.c @@ -337,9 +337,7 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *map) #ifdef CONFIG_DCB /* Block LFC now that we're configuring PFC */ - if (pfc_en) { - hw->fc.requested_mode = ixgbe_fc_pfc; - } + hw->fc.requested_mode = ixgbe_fc_pfc; #endif /* CONFIG_DCB */ /* Configure PFC Tx thresholds per TC */ diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_ethtool.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_ethtool.c index 54380c3..67f05bc 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_ethtool.c @@ -486,6 +486,9 @@ static int ixgbe_get_regs_len(struct net_device *netdev) #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ +#ifdef __VMKLNX__ +extern void ixgbe_print_regs(struct ixgbe_adapter *adapter); +#endif static void ixgbe_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) @@ -795,6 +798,12 @@ static void ixgbe_get_regs(struct net_device *netdev, struct ethtool_regs *regs, /* 82599 X540 specific registers */ regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN); + + +#ifdef __VMKLNX__ + ixgbe_print_regs(adapter); +#endif + } static int ixgbe_get_eeprom_len(struct net_device *netdev) @@ -975,8 +984,9 @@ static int ixgbe_set_ringparam(struct net_device *netdev, new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); #ifdef __VMKLNX__ - /* Adjust the rx ring size to avoid heap issues in Jumbo case */ - if (adapter->rx_ring && adapter->num_rx_queues > 1) { + /* Adjust the rx ring size to avoid heap issues in Jumbo mode only */ + if ((adapter->netdev->mtu > ETH_DATA_LEN) && + (adapter->rx_ring && adapter->num_rx_queues > 1)) { int count = ixgbe_calculate_rx_ring_size(adapter); if (new_rx_count > count) new_rx_count = count; @@ -1082,6 +1092,10 @@ static int ixgbe_set_ringparam(struct net_device *netdev, adapter->rx_ring_count = new_rx_count; } ixgbe_up(adapter); +#ifdef __VMKLNX__ + adapter->n_tx_queues_allocated = 0; + adapter->n_rx_queues_allocated = 0; +#endif } vfree(temp_rx_ring); @@ -2251,10 +2265,13 @@ static int ixgbe_set_coalesce(struct net_device *netdev, u16 tx_itr_param, rx_itr_param; bool need_reset = false; +#ifndef __VMKLNX__ + /* ESX vmkernel needs tx coalesce params for NETIOC feature */ /* don't accept tx specific changes if we've got mixed RxTx vectors */ if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count && ec->tx_coalesce_usecs) return -EINVAL; +#endif if (ec->tx_max_coalesced_frames_irq) adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq; diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.c index c8cfdc7..6c62e2e 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_main.c @@ -82,7 +82,7 @@ static const char ixgbe_driver_string[] = #define MAJ 3 #define MIN 7 -#define BUILD 13.6 +#define BUILD 13.7.14 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \ __stringify(BUILD) DRIVERIOV DRIVERNAPI \ DRV_HW_PERF FPGA VMDQ_TAG @@ -130,6 +130,10 @@ static struct pci_device_id ixgbe_pci_tbl[] = { {0, } }; MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl); +#ifdef __VMKLNX__ +extern int vmklnx_configure_net_vf(struct pci_dev *pf_dev, void *cfg_data, + int vf_idx); +#endif /* __VMKLNX__ */ #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) static int ixgbe_notify_dca(struct notifier_block *, unsigned long event, @@ -146,9 +150,14 @@ MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); +static VMK_ReturnStatus +ixgbe_passthru_ops(struct net_device *netdev, vmk_NetPTOP op, void *pargs); + + #ifdef __VMKLNX__ #define pci_enable_sriov(dev,vfs) \ - (vmklnx_enable_vfs((dev), (vfs), NULL, NULL) != (vfs) ? -ENOTSUPP : 0) + (vmklnx_enable_vfs((dev), (vfs), vmklnx_store_pt_ops, \ + ixgbe_passthru_ops) != (vfs) ? -ENOTSUPP : 0) #define pci_disable_sriov(dev) \ vmklnx_disable_vfs((dev), adapter->num_vfs, NULL, NULL) @@ -163,6 +172,19 @@ static inline void ixgbe_disable_sriov(struct ixgbe_adapter *adapter) u32 gpie; u32 vmdctl; + /* set num VFs to 0 to prevent access to vfinfo */ + adapter->num_vfs = 0; + + if (adapter->vfinfo) { + kfree(adapter->vfinfo); + adapter->vfinfo = NULL; + } + + if (adapter->mv_list) { + kfree(adapter->mv_list); + adapter->mv_list = NULL; + } + /* disable iov and allow time for transactions to clear */ pci_disable_sriov(adapter->pdev); @@ -183,17 +205,6 @@ static inline void ixgbe_disable_sriov(struct ixgbe_adapter *adapter) /* take a breather then clean up driver data */ msleep(100); - if (adapter->vfinfo) { - kfree(adapter->vfinfo); - adapter->vfinfo = NULL; - } - - if (adapter->mv_list) { - kfree(adapter->mv_list); - adapter->mv_list = NULL; - } - - adapter->num_vfs = 0; adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED; } @@ -821,6 +832,14 @@ static bool ixgbe_alloc_mapped_skb(struct ixgbe_ring *rx_ring, return false; } + /* + * Temporary Workaround for ESX60 issue where cb is corrupted + * with FCoE. Causing PSOD HSD 4707647. Need to remove after + * issue is fully root-caused and fixed. + */ + if (IXGBE_CB(skb)->delay_unmap) + IXGBE_CB(skb)->delay_unmap = 0; + /* initialize skb for ring */ skb_record_rx_queue(skb, ring_queue_index(rx_ring)); } @@ -1172,6 +1191,7 @@ static inline bool ixgbe_rx_is_fcoe(struct ixgbe_adapter *adapter, } #endif /* IXGBE_FCOE */ + #ifdef HAVE_VLAN_RX_REGISTER /** * ixgbe_receive_skb - Send a completed packet up the stack @@ -1653,8 +1673,10 @@ static bool ixgbe_clean_rx_irq_ps(struct ixgbe_q_vector *q_vector, struct ixgbe_adapter *adapter = q_vector->adapter; int ddp_bytes = 0; #endif /* IXGBE_FCOE */ + u32 len = 0; u16 i = rx_ring->next_to_clean; u16 cleaned_count = ixgbe_desc_unused(rx_ring); + u16 hdr_info; rx_desc = IXGBE_RX_DESC(rx_ring, i); @@ -1679,9 +1701,19 @@ static bool ixgbe_clean_rx_irq_ps(struct ixgbe_q_vector *q_vector, prefetch(skb->data); + len = ixgbe_get_hlen(rx_ring, rx_desc); +#ifdef __VMKLNX__ + /* small packet padding for queue-to-queue loopback */ + if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_LB) + && len < ETH_ZLEN) { + memset(skb->data+len, 0, (ETH_ZLEN-len)); + len = ETH_ZLEN; + } +#endif + /* pull the header of the skb in if no data is already present */ if (!skb_is_nonlinear(skb)) { - __skb_put(skb, ixgbe_get_hlen(rx_ring, rx_desc)); + __skb_put(skb, len); /* * When HWRSC is enabled, delay unmapping of the first * packet. It carries the header information, HW may @@ -1836,6 +1868,31 @@ static bool ixgbe_clean_rx_irq_ps(struct ixgbe_q_vector *q_vector, } #endif /* IXGBE_FCOE */ + +#ifdef __VMKLNX__ + if ((rx_desc->wb.lower.lo_dword.hs_rss.pkt_info & + IXGBE_RXDADV_RSSTYPE_MASK) != 0) { + u8 q_id = ring_queue_index(rx_ring); + if (q_id >= (adapter->num_rx_pools - 1)) { + /* + * Although hardware gives us the rss hash for all pkts + * let us just set it in the skb for pkts that + * came through the RSS queues for now. + * + * This way the higher layers can easily figure out the + * pkt was from an RSS queue. We can set the rss hash + * for all packets once we identify an extensible way + * to let the higher layers know which of the queues + * are rss queues and which ones are not. + */ + rss_skb_put_info(skb, + rx_desc->wb.lower.hi_dword.rss, + (vmklnx_rss_type)(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info & + IXGBE_RXDADV_RSSTYPE_MASK)); + } + } +#endif + #ifdef HAVE_VLAN_RX_REGISTER ixgbe_receive_skb(q_vector, skb); #else @@ -2499,44 +2556,6 @@ static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data) return IRQ_HANDLED; } #else /* CONFIG_IXGBE_NAPI */ -#ifdef IXGBE_NO_TX_NAPI -static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data) -{ - struct ixgbe_q_vector *q_vector = data; - struct ixgbe_adapter *adapter = q_vector->adapter; - struct ixgbe_ring *ring; - bool clean_complete = true; - - if (!q_vector->tx.ring && !q_vector->rx.ring) - return IRQ_HANDLED; - -#ifdef __VMKLNX__ - /* EIAM not used in ESX */ - ixgbe_irq_disable_queues(q_vector->adapter, - ((u64)1 << q_vector->v_idx)); -#endif - if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) - ixgbe_update_dca(q_vector); - - for (ring = q_vector->tx.ring; ring != NULL; ring = ring->next) - clean_complete &= ixgbe_clean_tx_irq(q_vector, ring); - - if (test_bit(__IXGBE_DOWN, &adapter->state)) - return IRQ_HANDLED; - - if (q_vector->rx.ring) { - /* EIAM disabled interrupts (on this vector) for us */ - napi_schedule(&q_vector->napi); - } else { - u64 eics = ((u64)1 << q_vector->v_idx); - ixgbe_irq_enable_queues(adapter, eics); - if (!clean_complete) - ixgbe_irq_rearm_queues(adapter, eics); - } - - return IRQ_HANDLED; -} -#else static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data) { struct ixgbe_q_vector *q_vector = data; @@ -2554,7 +2573,6 @@ static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data) return IRQ_HANDLED; } -#endif /* IXGBE_NO_TX_NAPI */ /** * ixgbe_poll - NAPI polling RX/TX cleanup routine @@ -2575,11 +2593,9 @@ static int ixgbe_poll(struct napi_struct *napi, int budget) if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) ixgbe_update_dca(q_vector); -#ifndef IXGBE_NO_TX_NAPI for (ring = q_vector->tx.ring; ring != NULL; ring = ring->next) clean_complete &= ixgbe_clean_tx_irq(q_vector, ring); -#endif /* attempt to distribute budget to each queue fairly, but don't allow * the budget to go below 1 because we'll exit polling */ if (q_vector->rx.count > 1) @@ -2623,11 +2639,13 @@ static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx, q_vector->rx.count++; q_vector->rx.work_limit = a->rx_work_limit; #ifdef __VMKLNX__ +#ifdef CONFIG_IXGBE_NAPI /* update the net device associated with the vector */ if (ring_type_is_cna(rx_ring)) { q_vector->napi.dev = a->cnadev; netif_set_poll_cna(&q_vector->napi); } +#endif /* CONFIG_IXGBE_NAPI */ #endif } @@ -2707,38 +2725,17 @@ static void ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter) * * Re-adjusting *qpv takes care of the remainder. */ -#ifdef __VMKLNX__ - int q_split = max(q_vectors / 2, 1); - /* In case of RSS, there are more rx queues then usual, therefore - * q_split should be modified - */ - if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) && - (q_vectors >= adapter->num_rx_queues + adapter->num_tx_queues)) - q_split = adapter->num_rx_queues; -#endif for (; v_start < q_vectors && rxr_remaining; v_start++) { -#ifdef __VMKLNX__ - int rqpv = DIV_ROUND_UP(rxr_remaining, q_split - v_start); -#else int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_start); -#endif for (; rqpv; rqpv--, rxr_idx++, rxr_remaining--) map_vector_to_rxq(adapter, v_start, rxr_idx); } -#ifdef __VMKLNX__ - /* - * If Rx consumed all of the vectors then we must group Rx/Tx. - * This should only happen if the number of q_vectors is 1. - */ - if (v_start >= q_vectors) -#else /* * If there are not enough q_vectors for each ring to have it's own * vector then we must pair up Rx/Tx on a each vector */ if ((v_start + txr_remaining) > q_vectors) -#endif v_start = 0; for (; v_start < q_vectors && txr_remaining; v_start++) { @@ -2891,10 +2888,6 @@ static irqreturn_t ixgbe_intr(int irq, void *data) ixgbe_check_fan_failure(adapter, eicr); #ifdef CONFIG_IXGBE_NAPI -#ifdef IXGBE_NO_TX_NAPI - /* We must clean the TX in the interrupt */ - ixgbe_clean_tx_irq(q_vector, adapter->tx_ring[0]); -#endif /* would disable interrupts here but EIAM disabled it */ napi_schedule(&q_vector->napi); @@ -3337,7 +3330,6 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, srrctl |= IXGBE_SRRCTL_DROP_EN; if (ring_is_ps_enabled(rx_ring)) { - srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) & IXGBE_SRRCTL_BSIZEHDR_MASK; #ifndef __VMKLNX__ @@ -3426,6 +3418,9 @@ static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter) mrqc = IXGBE_MRQC_VMDQEN; break; case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED): + case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_SRIOV_ENABLED): + case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED + | IXGBE_FLAG_SRIOV_ENABLED): if (adapter->ring_feature[RING_F_RSS].indices == 4) mrqc = IXGBE_MRQC_VMDQRSS32EN; else if (adapter->ring_feature[RING_F_RSS].indices == 2) @@ -3532,7 +3527,10 @@ void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, #ifndef __VMKLNX__ rscctrl |= IXGBE_RSCCTL_MAXDESC_16; #else - //In ESX, restricting max aggregated to 24K gives better perf compared 48K + /* + * In ESX, restricting max aggregated + * to 24K gives better perf compared 48K + */ rscctrl |= IXGBE_RSCCTL_MAXDESC_8; #endif else if (rx_buf_len < IXGBE_RXBUFFER_8K) @@ -3647,7 +3645,7 @@ void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter, ixgbe_configure_srrctl(adapter, ring); #ifndef __VMKLNX__ - // In ESX RSCCTL configuration is done by on demand.. + /* In ESX RSCCTL configuration is done by on demand. */ ixgbe_configure_rscctl(adapter, ring); #endif @@ -3729,6 +3727,7 @@ static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter) vt_reg_bits |= IXGBE_VT_CTL_REPLEN; } vmdctl = IXGBE_READ_REG(hw, vt_reg); + vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; IXGBE_WRITE_REG(hw, vt_reg, vmdctl | vt_reg_bits); for (pool = 1; pool < adapter->num_rx_pools; pool++) { u32 vmolr; @@ -3740,7 +3739,6 @@ static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter) */ vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vmdq_pool)); vmolr |= IXGBE_VMOLR_AUPE; - vmolr |= IXGBE_VMOLR_BAM; IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vmdq_pool), vmolr); } IXGBE_WRITE_REG(hw, IXGBE_VFRE(0), 0xFFFFFFFF); @@ -3764,6 +3762,9 @@ static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter) gcr_ext |= IXGBE_GCR_EXT_MSIX_EN; if (adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) gcr_ext |= IXGBE_GCR_EXT_VT_MODE_32; + else if (adapter->flags & IXGBE_FLAG_RSS_ENABLED && + adapter->ring_feature[RING_F_RSS].indices == 4) + gcr_ext |= IXGBE_GCR_EXT_VT_MODE_32; else gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64; IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); @@ -3774,10 +3775,27 @@ static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter) else IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, 0); - hw->mac.ops.set_mac_anti_spoofing(hw, - (adapter->antispoofing_enabled = - (adapter->num_vfs != 0)), - adapter->num_vfs); + +#ifdef __VMKLNX__ + /* Only enable anti-spoofing on the VF pools. The shared code has + * turned on anti-spoofing on all the pools except default, but we + * only want it enabled for VF pools */ + if (adapter->num_vfs != 0) + { + int i = 0; + u32 pfvfspoof = 0; + adapter->antispoofing_enabled = true; + + /* Only enable anti-spoofing on VF pools */ + for (i=0; i < adapter->num_vfs ; i++) + { + pfvfspoof = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(i >> 3)); + pfvfspoof |= (1 << (i % 8)); + IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(i >> 3), pfvfspoof); + } + } +#endif /* __VMKLNX__ */ + } static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter) @@ -3820,9 +3838,9 @@ static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter) IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); } - if (!adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) - /* MHADD will allow an extra 4 bytes past for vlan tagged frames */ - max_frame += VLAN_HLEN; + if (!adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) + /* MHADD will allow an extra 4 bytes past for vlan tagged frames */ + max_frame += VLAN_HLEN; /* Set the RX buffer length according to the mode */ if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { @@ -3875,7 +3893,7 @@ static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter) clear_ring_ps_enabled(rx_ring); #ifndef __VMKLNX__ - //RSC enablement is done on demand in ESX. + /* RSC enablement is done on demand in ESX. */ if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { set_ring_rsc_enabled(rx_ring); } else { @@ -4331,12 +4349,10 @@ int ixgbe_write_mc_addr_list(struct net_device *netdev) } - void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter) { struct ixgbe_hw *hw = &adapter->hw; int i; - for (i = 0; i < hw->mac.num_rar_entries; i++) { if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE) { hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr, @@ -4539,6 +4555,10 @@ void ixgbe_set_rx_mode(struct net_device *netdev) fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN); + /* IFF_PROMISC mode is not set in SR-IOV mode, so set here */ + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) + netdev->flags |= IFF_PROMISC; + if (netdev->flags & IFF_PROMISC) { hw->addr_ctrl.user_set_promisc = true; fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); @@ -4605,12 +4625,7 @@ static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter) for (q_idx = 0; q_idx < q_vectors; q_idx++) { q_vector = adapter->q_vector[q_idx]; -#ifdef IXGBE_NO_TX_NAPI - if (q_vector->rx.ring) - napi_enable(&q_vector->napi); -#else napi_enable(&q_vector->napi); -#endif /* IXGBE_NO_TX_NAPI */ } #endif /* CONFIG_IXGBE_NAPI */ } @@ -4628,12 +4643,7 @@ static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter) for (q_idx = 0; q_idx < q_vectors; q_idx++) { q_vector = adapter->q_vector[q_idx]; -#ifdef IXGBE_NO_TX_NAPI - if (q_vector->rx.ring) - napi_disable(&q_vector->napi); -#else napi_disable(&q_vector->napi); -#endif /* IXGBE_NO_TX_NAPI */ } #endif } @@ -5141,6 +5151,9 @@ static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter) gpie &= ~IXGBE_GPIE_VTMODE_MASK; if (adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) gpie |= IXGBE_GPIE_VTMODE_32; + else if (adapter->flags & IXGBE_FLAG_RSS_ENABLED && + adapter->ring_feature[RING_F_RSS].indices == 4) + gpie |= IXGBE_GPIE_VTMODE_32; else gpie |= IXGBE_GPIE_VTMODE_64; } @@ -5690,23 +5703,6 @@ static inline bool ixgbe_set_vmdq_queues(struct ixgbe_adapter *adapter) int rss_shift; bool ret = false; -#ifdef __VMKLNX__ - /* VMware ESX perf. tests show that optimal perf is achieved - * if num_queues = MIN(8, num_online_cpus/4). - */ - if ((adapter->hw.mac.type == ixgbe_mac_82599EB || adapter->hw.mac.type == ixgbe_mac_X540) && - !(adapter->flags2 & IXGBE_FLAG2_VMDQ_DEFAULT_OVERRIDE)) { - vmdq_i = 1 << (fls(min(vmdq_i, ((int)num_online_cpus()/4))) - 1); - vmdq_i = max(4, vmdq_i); - } - - if ((adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) && !(adapter->flags & IXGBE_FLAG_RSS_ENABLED) && - !(adapter->flags2 & IXGBE_FLAG2_VMDQ_DEFAULT_OVERRIDE)) { - //Allocate 8 queues to have enough resreved HW LRO and legacy queues. - vmdq_i = 8; - } -#endif //__VMKLNX__ - switch (adapter->flags & (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) { @@ -5768,6 +5764,14 @@ static inline bool ixgbe_set_vmdq_queues(struct ixgbe_adapter *adapter) ret = true; break; + case (IXGBE_FLAG_RSS_ENABLED): + /* RSS enabled, no VMDQ. possibly SRIOV enabled */ + adapter->num_rx_queues = min(MAX_RX_QUEUES, 1 + rss_i); /* default queue + RSS */ + adapter->num_tx_queues = min(MAX_TX_QUEUES, 2); /* default + 1 for the RSS pool */ + adapter->num_rx_pools = 2; /* default + RSS */ + adapter->num_rx_queues_per_pool = 1; + ret = true; + goto vmdq_queues_out; default: ret = false; goto vmdq_queues_out; @@ -5791,7 +5795,7 @@ static inline bool ixgbe_set_vmdq_queues(struct ixgbe_adapter *adapter) } if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { adapter->num_rx_queues = min(MAX_RX_QUEUES, vmdq_i + rss_i); - adapter->num_tx_queues = min(MAX_TX_QUEUES, vmdq_i); + adapter->num_tx_queues = min(MAX_TX_QUEUES, vmdq_i + 1); /* +1 for the RSS pool */ vmdq_i++; /* Extra pool for RSS queues */ } if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) { @@ -5800,7 +5804,8 @@ static inline bool ixgbe_set_vmdq_queues(struct ixgbe_adapter *adapter) vmdq_i; if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { /* we use 1 queue per pool. This cannot be calculated - by regular division */ + * by regular division + */ adapter->num_rx_queues_per_pool = 1; } } else { @@ -6004,12 +6009,16 @@ static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter, * 2) Other (Link Status Change, etc.) */ #ifdef __VMKLNX__ - if(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { - /* MIN_MSIX_COUNT includes 2 vectors for FCoE, but we won't need them */ - vector_threshold = 2 /* RX+TX */ + NON_Q_VECTORS; + if(!(adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED)) { + /* + * MIN_MSIX_COUNT includes 2 vectors + * for FCoE, but we won't need them + * if CNA is disabled + */ + vector_threshold = MIN_MSIX_COUNT - MIN_MSIX_Q_FCOE_VECTORS; } else #endif /* __VMKLNX__ */ - vector_threshold = MIN_MSIX_COUNT; + vector_threshold = MIN_MSIX_COUNT; /* * The more we get, the more we will assign to Tx/Rx Cleanup * for the separate queues...where Rx Cleanup >= Tx Cleanup. @@ -6023,11 +6032,8 @@ static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter, break; else if (err < 0) vectors = 0; /* Nasty failure, quit now */ - /* err == number of vectors we should try again with */ - else if (err < vector_threshold) - vectors = 0; else - vectors = vector_threshold; + vectors = 0; } if (vectors < vector_threshold) { @@ -6171,7 +6177,7 @@ static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter) * @adapter: board private structure to initialize * * Cache the descriptor ring offsets for VMDq to the assigned rings. It - * will also try to cache the proper offsets if RSS/DCB/CNA/NPA are all + * will also try to cache the proper offsets if RSS/DCB/CNA/SRIOV are all * enabled along with VMDq. * **/ @@ -6187,23 +6193,23 @@ static inline bool ixgbe_cache_ring_vmdq(struct ixgbe_adapter *adapter) switch (adapter->flags & (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) { - + case IXGBE_FLAG_RSS_ENABLED: case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED): switch (adapter->hw.mac.type) { case ixgbe_mac_82599EB: case ixgbe_mac_X540: /* Configure non RSS queues */ for (i = 0; i < adapter->num_rx_pools - 1; i++) - adapter->rx_ring[i]->reg_idx = i * + adapter->rx_ring[i]->reg_idx = VMDQ_P(i) * IXGBE_ESX_HW_QUEUES_PER_POOL; /* Configure RSS queues - all queues in the same pool */ for (i = 0; i < IXGBE_ESX_RSS_QUEUES ; i++) adapter->rx_ring[adapter->num_rx_pools-1 + i]-> - reg_idx = ((adapter->num_rx_pools - 1) * + reg_idx = (VMDQ_P(adapter->num_rx_pools - 1) * IXGBE_ESX_HW_QUEUES_PER_POOL) + i; /* Configure TX queues */ for (i = 0; i < adapter->num_tx_queues; i++) - adapter->tx_ring[i]->reg_idx = i * + adapter->tx_ring[i]->reg_idx = VMDQ_P(i) * IXGBE_ESX_HW_QUEUES_PER_POOL; ret = true; break; @@ -6223,7 +6229,7 @@ static inline bool ixgbe_cache_ring_vmdq(struct ixgbe_adapter *adapter) adapter->rx_ring[i]->reg_idx = VMDQ_P(i) * tc; #ifdef IXGBE_FCOE if (i >= adapter->num_rx_queues - f->indices) - adapter->rx_ring[i]->reg_idx += tc; + adapter->rx_ring[i]->reg_idx += (adapter->fcoe.tc); #endif /* IXGBE_FCOE */ } for (i = 0; i < adapter->num_tx_queues; i++) { @@ -6553,7 +6559,6 @@ static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter) if (!(adapter->flags & IXGBE_FLAG_MSIX_CAPABLE)) goto try_msi; -#ifndef __VMKLNX__ /* * It's easy to be greedy for MSI-X vectors, but it really * doesn't do us much good if we have a lot more vectors @@ -6562,14 +6567,17 @@ static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter) * the default is to use pairs of vectors */ v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues); - v_budget = min(v_budget, (int)num_online_cpus()); - v_budget += NON_Q_VECTORS; -#else +#ifndef __VMKLNX__ /* - * VMware tells us that ESX works better with a vector for each - * rx and tx queue, even if that's more than num_online_cpu - */ - v_budget = adapter->num_rx_queues + adapter->num_tx_queues + NON_Q_VECTORS; + * To avoid netq QueuePair confusions + */ + v_budget = min(v_budget, (int)num_online_cpus()); +#endif + v_budget += NON_Q_VECTORS; + +#ifdef __VMKLNX__ + if (adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) + v_budget += adapter->ring_feature[RING_F_FCOE].indices; #endif /* @@ -6607,6 +6615,9 @@ static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter) #ifdef IXGBE_VMDQ adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED; #endif + if (adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) + ixgbe_cna_disable(adapter); + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { e_err(probe, "MSI-X interrupt not available - disabling " "SR-IOV\n"); @@ -6681,14 +6692,8 @@ static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter) cpumask_set_cpu(v_idx, q_vector->affinity_mask); #endif #ifdef CONFIG_IXGBE_NAPI -#ifdef IXGBE_NO_TX_NAPI - if (v_idx < rx_vectors) - netif_napi_add(adapter->netdev, &q_vector->napi, - ixgbe_poll, 64); -#else netif_napi_add(adapter->netdev, &q_vector->napi, ixgbe_poll, 64); -#endif /* IXGBE_NO_TX_NAPI */ #endif /* CONFIG_IXGBE_NAPI */ adapter->q_vector[v_idx] = q_vector; } @@ -6700,9 +6705,6 @@ err_out: v_idx--; q_vector = adapter->q_vector[v_idx]; #ifdef CONFIG_IXGBE_NAPI -#ifdef IXGBE_NO_TX_NAPI - if (v_idx < rx_vectors) -#endif /* IXGBE_NO_TX_NAPI */ netif_napi_del(&q_vector->napi); #endif #ifdef HAVE_IRQ_AFFINITY_HINT @@ -6736,12 +6738,7 @@ static void ixgbe_free_q_vectors(struct ixgbe_adapter *adapter) adapter->q_vector[v_idx] = NULL; #ifdef CONFIG_IXGBE_NAPI -#ifdef IXGBE_NO_TX_NAPI - if (v_idx < adapter->num_rx_queues) - netif_napi_del(&q_vector->napi); -#else netif_napi_del(&q_vector->napi); -#endif /* IXGBE_NO_TX_NAPI */ #endif #ifdef HAVE_IRQ_AFFINITY_HINT free_cpumask_var(q_vector->affinity_mask); @@ -6829,18 +6826,11 @@ void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter) kfree(adapter->rx_ring[i]); adapter->rx_ring[i] = NULL; } -#ifndef __VMKLNX__ + adapter->num_tx_queues = 0; adapter->num_rx_queues = 0; -#endif ixgbe_free_q_vectors(adapter); - -#ifdef __VMKLNX__ - adapter->num_tx_queues = 0; - adapter->num_rx_queues = 0; -#endif - ixgbe_reset_interrupt_capability(adapter); /* reinit the dev->napi_list */ @@ -7186,8 +7176,20 @@ static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter) i, adapter->bd_number, adapter->rx_ring[i]->numa_node); #endif /* HAVE_DEVICE_NUMA_NODE */ err = ixgbe_setup_rx_resources(adapter->rx_ring[i]); - if (!err) + if (!err) { +#ifdef __VMKLNX__ + /* + * ixgbe_setup_rx_resources sets the ring to not + * allocated for VMware. Set default queue to + * allocated so filter calls will not fail. + * Other queues will be allocated when used for VMQ + */ + if (i==0) + set_ring_allocated(adapter->rx_ring[0]); + +#endif continue; + } e_err(probe, "Allocation for Rx Queue %u failed\n", i); break; } @@ -7312,6 +7314,7 @@ static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu) #endif /* __VMKLNX__ */ e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu); + DPRINTK(PROBE, ERR, "changing MTU from %d to %d\n", netdev->mtu, new_mtu); /* must set new MTU before calling down or up */ netdev->mtu = new_mtu; @@ -8754,6 +8757,7 @@ static void ixgbe_tx_map(struct ixgbe_ring *tx_ring, } #endif /* MAX_SKB_FRAGS */ + /* write last descriptor with RS and EOP bits */ cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD); tx_desc->read.cmd_type_len = cmd_type; @@ -9543,22 +9547,26 @@ void ixgbe_assign_netdev_ops(struct net_device *dev) static VMK_ReturnStatus ixgbe_passthru_ops(struct net_device *netdev, vmk_NetPTOP op, void *pargs) { + struct ixgbe_adapter *adapter = netdev_priv(netdev); VMK_ReturnStatus ret; switch (op) { case VMK_NETPTOP_VF_SET_MAC: { vmk_NetPTOPVFSetMacArgs *args = pargs; - struct ixgbe_adapter *adapter = netdev_priv(netdev); if (is_zero_ether_addr(args->mac)) { /* Remove the VF mac address */ ixgbe_del_mac_filter(adapter, adapter->vfinfo[args->vf].vf_mac_addresses, args->vf); memset(adapter->vfinfo[args->vf].vf_mac_addresses, 0, ETH_ALEN); - adapter->vfinfo[args->vf].pf_set_mac = false; ret = VMK_OK; } else { + DPRINTK(PROBE, ERR, "Setting ndo MAC addr" + " %02x:%02x:%02x:%02x:%02x:%02x" + " for vf %u\n", + args->mac[0], args->mac[1], args->mac[2], + args->mac[3], args->mac[4], args->mac[5], args->vf); if (ixgbe_ndo_set_vf_mac(netdev, args->vf, args->mac) < 0) ret = VMK_FAILURE; else @@ -9570,12 +9578,49 @@ ixgbe_passthru_ops(struct net_device *netdev, vmk_NetPTOP op, void *pargs) { vmk_NetPTOPVFSetDefaultVlanArgs *args = pargs; - if (args->enable) - ret = ixgbe_ndo_set_vf_vlan(netdev, args->vf, args->vid, + if (args->enable) { + DPRINTK(PROBE, ERR, "Setting ndo port VLAN %d on VF %d\n", + (int)args->vid, (u32)args->vf); + ret = ixgbe_ndo_set_vf_vlan(netdev, args->vf, args->vid, args->prio) ? VMK_FAILURE : VMK_OK; - else - ret = ixgbe_ndo_set_vf_vlan(netdev, args->vf, 0, 0) ? + } else { + DPRINTK(PROBE, ERR, "Removing ndo port VLAN from VF %d\n", + (u32)args->vf); + ret = ixgbe_ndo_set_vf_vlan(netdev, args->vf, 0, 0) ? VMK_FAILURE : VMK_OK; + } + break; + } + case VMK_NETPTOP_VF_ADD_VLAN_RANGE: + { + vmk_NetPTOPVFVlanRangeArgs *args = pargs; + DPRINTK(PROBE, ERR, "Passthru OP to set guest VLAN %d" + " received for VF %d\n", (int)args->first, (u32)args->vf); + ret = ixgbe_set_vf_vlan(adapter, 1, args->first, args->vf); + break; + } + case VMK_NETPTOP_VF_DEL_VLAN_RANGE: + { + vmk_NetPTOPVFVlanRangeArgs *args = pargs; + DPRINTK(PROBE, ERR, "Passthru OP to remove guest VLAN %d" + " received for VF %d\n", (int)args->first, (u32)args->vf); + ret = ixgbe_set_vf_vlan(adapter, 0, args->first, args->vf); + break; + } + case VMK_NETPTOP_VF_GET_QUEUE_STATS: + { + vmk_NetPTOPVFGetQueueStatsArgs *args = pargs; + ret = ixgbe_vf_get_stats(netdev, args->vf, + args->numTxQueues, + args->numRxQueues, + args->tqStats, + args->rqStats); + break; + } + case VMK_NETPTOP_VF_SET_MTU: + { + vmk_NetPTOPVFSetMtuArgs *args = pargs; + ret = ixgbe_set_vf_lpe(adapter, args->vf, args->mtu); break; } default: @@ -9585,6 +9630,70 @@ ixgbe_passthru_ops(struct net_device *netdev, vmk_NetPTOP op, void *pargs) } return ret; } + +VMK_ReturnStatus +ixgbe_passthru_config(struct ixgbe_adapter *adapter, u32 vfIdx, int change, + void *data) +{ + vmk_NetVFCfgInfo cfginfo; + VMK_ReturnStatus ret; + struct vf_vlan *guest_vlan = 0; + u32 *new_mtu = 0; + u8 guest_vid[512]; + s16 array_index; + u8 bit_index; + u8 bit; + int i; + + switch(change) { + case VMK_CFG_MAC_CHANGED: + printk("ixgbe_passthru_config: MAC Address changed"); + if (ETH_ALEN != sizeof(cfginfo.macAddr)) { + printk("Invalid MAC address.\n"); + return VMK_FAILURE; + } + cfginfo.cfgChanged = VMK_CFG_MAC_CHANGED; + memcpy(cfginfo.macAddr, ((u8*)data), ETH_ALEN); + DPRINTK(PROBE, ERR, "Guest OS requesting MAC addr %02x:%02x:%02x:%02x:%02x:%02x" + " for VF %d\n", cfginfo.macAddr[0], + cfginfo.macAddr[1], cfginfo.macAddr[2],cfginfo.macAddr[3], + cfginfo.macAddr[4], cfginfo.macAddr[5], vfIdx); + break; + case VMK_CFG_GUEST_VLAN_ADD: + case VMK_CFG_GUEST_VLAN_REMOVE: + guest_vlan = (struct vf_vlan*)data; + DPRINTK(PROBE, ERR, "Guest OS requesting %s of vlan %d\n", + guest_vlan->add ? "addition" : "deletion", guest_vlan->vid); + memset(guest_vid, 0, 512 * sizeof(u8)); + + array_index = (guest_vlan->vid >> 3) & 0x1FF; + bit_index = guest_vlan->vid & 0x7; + bit = (1 << bit_index); + guest_vid[array_index] |= bit; + DPRINTK(PROBE, ERR, "vid: %d, Bit index: %d, array index: %d, bit: %x\n", guest_vlan->vid, bit_index, array_index, bit); + if (guest_vlan->add == TRUE) + cfginfo.cfgChanged = VMK_CFG_GUEST_VLAN_ADD; + else + cfginfo.cfgChanged = VMK_CFG_GUEST_VLAN_REMOVE; + + memcpy(cfginfo.vlan.guestVlans, guest_vid, + sizeof(cfginfo.vlan.guestVlans)); + DPRINTK(PROBE, ERR, "Passing bit array to kernel\n"); + break; + case VMK_CFG_MTU_CHANGED: + new_mtu = (u32*)data; + cfginfo.cfgChanged = VMK_CFG_MTU_CHANGED; + DPRINTK(PROBE, ERR, "Guest OS requesting MTU change to %d\n", + *new_mtu); + memcpy(&cfginfo.mtu, new_mtu, sizeof(cfginfo.mtu)); + break; + default: + printk("Invalid VF configuration change request.\n"); + return VMK_FAILURE; + } + + return vmklnx_configure_net_vf(adapter->pdev, (void *)&cfginfo, vfIdx); +} #endif static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter) @@ -9632,20 +9741,13 @@ static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter) if (adapter->vfinfo) { adapter->flags |= IXGBE_FLAG_SRIOV_L2SWITCH_ENABLE | IXGBE_FLAG_SRIOV_REPLICATION_ENABLE; - - /* RSS not compatible with SR-IOV operation */ - adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; - - /* Disable RSC when in SR-IOV mode */ - adapter->flags2 &= ~(IXGBE_FLAG2_RSC_CAPABLE | - IXGBE_FLAG2_RSC_ENABLED); - #if defined(CONFIG_PCI_IOV) && defined(HAVE_IPLINK_VF_CONFIG) && defined(__VMKLNX__) - /* Register control callback */ + /* Register control callback */ VMK_REGISTER_PT_OPS(adapter->netdev, ixgbe_passthru_ops); printk("Registered Passthru Ops\n"); #endif + return; } @@ -9889,6 +9991,11 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) ixgbe_probe_vf(adapter); + if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { + hw->fc.requested_mode = ixgbe_fc_pfc; + hw->fc.current_mode = ixgbe_fc_pfc; /* init for ethtool output */ + } + #ifdef MAX_SKB_FRAGS netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM; @@ -9914,6 +10021,12 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, #ifdef NETIF_F_OFFLOAD_8OFFSET netdev->features |= NETIF_F_OFFLOAD_8OFFSET; #endif // NETIF_F_OFFLOAD_8OFFSET + /* + * We want load balancer to call apply_filter for mac addresses applied + * to default queue to have successful VF to emulated communication + */ + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) + netdev->features |= NETIF_F_DEFQ_L2_FLTR; #endif // __VMKLNX__ #ifdef HAVE_NDO_SET_FEATURES @@ -9932,6 +10045,10 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, /* this is only needed on kernels prior to 2.6.39 */ netdev->features |= NETIF_F_GRO; #endif /* NETIF_F_GRO */ +#endif +#ifndef __VMKLNX__ + /* set this bit last since it cannot be part of hw_features */ + netdev->features |= NETIF_F_HW_VLAN_FILTER; #endif switch(adapter->hw.mac.type) { @@ -9963,7 +10080,6 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, netdev->features |= NETIF_F_NTUPLE; #ifdef IXGBE_VMDQ #endif /* IXGBE_VMDQ */ - if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) { @@ -9995,8 +10111,9 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, #ifdef NETIF_F_FSO if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) { ixgbe_get_device_caps(hw, &device_caps); - if (!(adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) || - (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)) { + if ((ixgbe_validate_mac_addr(adapter->hw.mac.san_addr) == IXGBE_ERR_INVALID_MAC_ADDR) || + !(adapter->flags2 & IXGBE_FLAG2_CNA_ENABLED) || + (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)) { adapter->flags2 &= ~IXGBE_FLAG2_CNA_ENABLED; adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; @@ -10026,16 +10143,13 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, netdev->vlan_features |= NETIF_F_HIGHDMA; #endif /* HAVE_NETDEV_VLAN_FEATURES */ } - + #endif /* MAX_SKB_FRAGS */ #ifdef __VMKLNX__ - if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { - /* - * For now, we don't want to share a physical port between - * SR-IOV and vDS/vSS. - */ - netdev->features |= NETIF_F_HIDDEN_UPLINK; - } + + //Enable LATENCY NETQ + adapter->flags2 |= IXGBE_FLAG2_LATENCY_ENABLED; + #endif /* __VMKLNX__ */ /* make sure the EEPROM is good */ @@ -10066,10 +10180,10 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, netdev->addr_len); adapter->mac_table[0].queue = adapter->num_vfs; adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT | - IXGBE_MAC_STATE_IN_USE); + IXGBE_MAC_STATE_IN_USE); hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr, - adapter->mac_table[0].queue, - IXGBE_RAH_AV); + adapter->mac_table[0].queue, + IXGBE_RAH_AV); setup_timer(&adapter->service_timer, &ixgbe_service_timer, (unsigned long) adapter); @@ -10515,7 +10629,7 @@ static int __init ixgbe_init_module(void) #ifdef __VMKLNX__ if (!vmk_set_module_version("%s", ixgbe_driver_version)) { - printk(KERN_ERR "Incompatible Module Version"); + printk(KERN_ERR "Incompatible Module Version\n"); return -ENODEV; } @@ -10558,7 +10672,6 @@ static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event, return ret_val ? NOTIFY_BAD : NOTIFY_DONE; } #endif - module_exit(ixgbe_exit_module); /* ixgbe_main.c */ diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.c index b0db5ba..94abc02 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_param.c @@ -445,6 +445,8 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) int bd = adapter->bd_number; u32 *aflags = &adapter->flags; struct ixgbe_ring_feature *feature = adapter->ring_feature; + bool cna_enabled_manually = false; + bool vmdq_enabled_manually = false; if (bd >= IXGBE_MAX_NIC) { printk(KERN_NOTICE @@ -667,7 +669,7 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) } #ifdef __VMKLNX__ /* Add extra ESX specific interoperability check */ - if (*aflags & IXGBE_FLAG_RSS_ENABLED) { + if (*aflags & IXGBE_FLAG_RSS_ENABLED) { /* RSS is not supported on 82588 */ if (adapter->hw.mac.type == ixgbe_mac_82598EB) { *aflags &= ~IXGBE_FLAG_RSS_ENABLED; @@ -693,6 +695,10 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) if (*aflags & IXGBE_FLAG_RSS_ENABLED) { adapter->flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; adapter->flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; + + /* do not use Flow Director when RSS is enabled*/ + *aflags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; + *aflags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; } #endif /* __VMKLNX__ */ } @@ -710,8 +716,10 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) unsigned int cna_qs = opt.def; #ifdef module_param_array - if (num_CNA > bd) + if (num_CNA > bd) { cna_qs = CNA[bd]; + cna_enabled_manually = cna_qs; + } #endif ixgbe_validate_option(&cna_qs, &opt); /* enable CNA only when MSIX is enabled */ @@ -723,6 +731,10 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) DPRINTK(PROBE, ERR, "CNA turned off when RSS " " is enabled thru mod_param\n"); } + /* Update flag after parameter validation */ + if (cna_enabled_manually) + cna_enabled_manually = cna_qs; + if (cna_qs) { adapter->flags2 |= IXGBE_FLAG2_CNA_ENABLED; adapter->flags |= IXGBE_FLAG_FCOE_ENABLED; @@ -780,8 +792,10 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) adapter->flags2 |= IXGBE_FLAG2_VMDQ_DEFAULT_OVERRIDE; /* zero or one both mean disabled from our driver's * perspective */ - if (vmdq > 1) + if (vmdq > 1) { *aflags |= IXGBE_FLAG_VMDQ_ENABLED; + vmdq_enabled_manually = true; + } else *aflags &= ~IXGBE_FLAG_VMDQ_ENABLED; #ifdef module_param_array @@ -817,6 +831,11 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) #ifndef __VMKLNX__ #endif } + /* Update flag if VMDQ disabled in interoperability check */ + if (vmdq_enabled_manually && + !(*aflags & IXGBE_FLAG_VMDQ_ENABLED)) + vmdq_enabled_manually = false; + } #endif /* IXGBE_VMDQ */ { /* Single Root I/O Virtualization (SR-IOV) */ @@ -836,17 +855,13 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) #ifdef module_param_array if (num_max_vfs > bd) { #endif -#ifndef __VMKLNX__ unsigned int vfs = max_vfs[bd]; -#else - int vfs = max_vfs[bd]; - - if (vfs < 0) + if (ixgbe_validate_option(&vfs, &opt)) { vfs = 0; - else - vfs = min(vfs, MAX_SRIOV_VFS); -#endif - ixgbe_validate_option(&vfs, &opt); + DPRINTK(PROBE, INFO, + "max_vfs out of range " + "Disabling SR-IOV.\n"); + } adapter->num_vfs = vfs; if (vfs) @@ -867,23 +882,26 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) /* Check Interoperability */ if (*aflags & IXGBE_FLAG_SRIOV_ENABLED) { -#ifdef __VMKLNX__ - /* Uplink is not usable by the hypervisor, so - disable VMDQ, RSS and DCB... */ - adapter->flags2 &= ~IXGBE_FLAG2_VMDQ_DEFAULT_OVERRIDE; - *aflags &= ~IXGBE_FLAG_VMDQ_CAPABLE; - *aflags &= ~IXGBE_FLAG_VMDQ_ENABLED; - feature[RING_F_VMDQ].indices = 0; - *aflags &= ~IXGBE_FLAG_DCB_CAPABLE; - *aflags &= ~IXGBE_FLAG_DCB_ENABLED; - adapter->flags2 &= ~IXGBE_FLAG2_CNA_ENABLED; - adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; - feature[RING_F_FCOE].indices = 0; - *aflags &= ~IXGBE_FLAG_RSS_CAPABLE; - *aflags &= ~IXGBE_FLAG_RSS_ENABLED; - feature[RING_F_RSS].indices = 0; - /* RSC disabled below */ -#endif /* __VMKLNX__ */ + /* Only allow CNA + SRIOV if CNA enabled manually */ + if (!cna_enabled_manually) { + *aflags &= ~IXGBE_FLAG_DCB_CAPABLE; + *aflags &= ~IXGBE_FLAG_DCB_ENABLED; + adapter->flags2 &= ~IXGBE_FLAG2_CNA_ENABLED; + adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; + feature[RING_F_FCOE].indices = 0; + DPRINTK(PROBE, INFO, + "CNA turned off when SR-IOV is " + "enabled.\n"); + } + /* If VMDq not enabled manually, only allow VMDQ=2 */ + if (!vmdq_enabled_manually && + (*aflags & IXGBE_FLAG_VMDQ_ENABLED)) { + feature[RING_F_VMDQ].indices = 2; + adapter->flags2 |= IXGBE_FLAG2_VMDQ_DEFAULT_OVERRIDE; + DPRINTK(PROBE, INFO, + "VMDQ reduced to 2 when SR-IOV is " + "enabled.\n"); + } if (!(*aflags & IXGBE_FLAG_SRIOV_CAPABLE)) { DPRINTK(PROBE, INFO, "IOV is not supported on this " @@ -903,20 +921,33 @@ void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) /* * if num_vfs wants the max vfs possible, scale - * it down to save room for VMDQ and CNA queues, - * or at least one default queue. If CNA is - * enabled, max queues is 32 rather than 64 + * it down to save room for VMDQ, RSS, CNA + * queues or at least one default queue. If + * CNA or RSS are enabled, max queues is 32 + * (one for default queue), rather than 64. + * CNA and RSS are not supported simultaneously. */ - if (feature[RING_F_FCOE].indices) + if (feature[RING_F_FCOE].indices && + feature[RING_F_VMDQ].indices) max_vfs = 32 - feature[RING_F_FCOE].indices; + else if (feature[RING_F_FCOE].indices) + max_vfs = 31 - + feature[RING_F_FCOE].indices; + /* RSS uses one pool in 32 pool mode */ + if (feature[RING_F_RSS].indices == + IXGBE_ESX_RSS_QUEUES && + feature[RING_F_VMDQ].indices) + max_vfs = 32 - 1; + else if (feature[RING_F_RSS].indices == + IXGBE_ESX_RSS_QUEUES) + max_vfs = 31 - 1; max_vfs -= feature[RING_F_VMDQ].indices; adapter->num_vfs = min(adapter->num_vfs, max_vfs); #endif - *aflags &= ~IXGBE_FLAG_RSS_CAPABLE; - adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE; + } } } diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.c index 0efbea7..7703a84 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.c @@ -80,7 +80,6 @@ int ixgbe_set_vf_multicasts(struct ixgbe_adapter *adapter, } vmolr |= IXGBE_VMOLR_ROMPE; IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); - ixgbe_enable_mc(hw); return 0; @@ -122,6 +121,7 @@ int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid, u32 vf) return ixgbe_set_vfta(&adapter->hw, vid, vf, (bool)add); } +#ifndef __VMKLNX__ void ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 *msgbuf) { struct ixgbe_hw *hw = &adapter->hw; @@ -148,6 +148,34 @@ void ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 *msgbuf) e_info(drv, "VF requests change max MTU to %d\n", new_mtu); } +#else /* __VMKLNX__ */ +int ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 vf, u32 new_mtu) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 max_frs; + int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; + + /* Only X540 supports jumbo frames in IOV mode */ + if (adapter->hw.mac.type != ixgbe_mac_X540) + return -1; + + /* MTU < 68 is an error and causes problems on some kernels */ + if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE)) { + DPRINTK(PROBE, ERR, "VF mtu %d out of range\n", new_mtu); + return -1; + } + + max_frs = (IXGBE_READ_REG(hw, IXGBE_MAXFRS) & + IXGBE_MHADD_MFS_MASK) >> IXGBE_MHADD_MFS_SHIFT; + if (max_frs < new_mtu) { + max_frs = new_mtu << IXGBE_MHADD_MFS_SHIFT; + IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, max_frs); + } + + DPRINTK(PROBE, ERR, "VF %d requested change of MTU to %d\n", vf, new_mtu); + return 0; +} +#endif /* __VMKLNX__ */ void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe) { @@ -315,9 +343,9 @@ inline void ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf) struct ixgbe_hw *hw = &adapter->hw; u32 reg; u32 reg_offset, vf_shift; - /* q_per_pool assumes that DCB is not enabled, hence in 64 pool mode */ - u32 q_per_pool = 2; - int i; + /* q_per_pool assumes that DCB is not enabled, hence in 64 pool mode */ + u32 q_per_pool = 2; + int i; vf_shift = vf % 32; reg_offset = vf / 32; @@ -335,13 +363,13 @@ inline void ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf) reg |= (1 << vf_shift); IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg); - /* Reset the VFs TDWBAL and TDWBAH registers - * which are not cleared by an FLR - */ - for (i = 0; i < q_per_pool; i++) { - IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBAHn(q_per_pool, vf, i), 0); - IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBALn(q_per_pool, vf, i), 0); - } + /* Reset the VFs TDWBAL and TDWBAH registers + * which are not cleared by an FLR + */ + for (i = 0; i < q_per_pool; i++) { + IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBAHn(q_per_pool, vf, i), 0); + IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBALn(q_per_pool, vf, i), 0); + } ixgbe_vf_reset_event(adapter, vf); } @@ -356,7 +384,11 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) u16 *hash_list; int add, vid, index; u8 *new_mac; - +#ifdef __VMKLNX__ + struct vf_vlan guest_vlan; + int new_mtu; + int max_frame; +#endif retval = ixgbe_read_mbx(hw, msgbuf, mbx_size, vf); if (retval) @@ -378,18 +410,14 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) ixgbe_vf_reset_msg(adapter, vf); adapter->vfinfo[vf].clear_to_send = true; - if (is_valid_ether_addr(new_mac) && - !adapter->vfinfo[vf].pf_set_mac) { - ixgbe_set_vf_mac(adapter, vf, new_mac); - } else { - ixgbe_set_vf_mac(adapter, vf, vf_mac); - memcpy(new_mac, vf_mac, IXGBE_ETH_LENGTH_OF_ADDRESS); - } + DPRINTK(PROBE, ERR, "IXGBE_VF_RESET mailbox message received\n"); + ixgbe_set_vf_mac(adapter, vf, vf_mac); /* reply to reset with ack and vf mac address */ msgbuf[0] = IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK; - /* Piggyback the multicast filter type so VF can compute the - * correct vectors */ + memcpy(new_mac, vf_mac, IXGBE_ETH_LENGTH_OF_ADDRESS); + /* Piggyback the multicast filter type so VF can compute the + * correct vectors */ msgbuf[3] = hw->mac.mc_filter_type; retval = ixgbe_write_mbx(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN, vf); @@ -405,6 +433,22 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) switch ((msgbuf[0] & 0xFFFF)) { case IXGBE_VF_SET_MAC_ADDR: new_mac = ((u8 *)(&msgbuf[1])); +#ifdef __VMKLNX__ + if (is_valid_ether_addr(new_mac)) { + if (memcmp(adapter->vfinfo[vf].vf_mac_addresses, + new_mac, ETH_ALEN)) { + DPRINTK(PROBE, ERR, "VF %d attempted to override " + "administratively set MAC address\nReload " + "the VF driver to resume operations\n", vf); + retval = -1; + } + ixgbe_passthru_config(adapter, vf, VMK_CFG_MAC_CHANGED, + (void*)new_mac); + retval = 0; + } + else + retval = -1; +#else /* __VMKLNX__ */ if (is_valid_ether_addr(new_mac) && !adapter->vfinfo[vf].pf_set_mac) { e_info(probe, "Set MAC msg received from VF %d\n", vf); @@ -421,6 +465,7 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) retval = -1; } break; +#endif /* __VMKLNX__ */ case IXGBE_VF_SET_MULTICAST: entries = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; @@ -430,12 +475,49 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) break; case IXGBE_VF_SET_LPE: e_info(probe, "Set LPE msg received from vf %d\n", vf); +#ifdef __VMKLNX__ + new_mtu = msgbuf[1]; + max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; + + DPRINTK(PROBE, ERR, "Set LPE msg received from vf %d\n", vf); + + /* Only X540 supports jumbo frames in IOV mode */ + if (adapter->hw.mac.type != ixgbe_mac_X540) { + DPRINTK(PROBE, ERR, "Not Twinville. Rejecting MTU change request from guest\n"); + retval = -1; + break; + } + + /* MTU < 68 is an error and causes problems on some kernels */ + if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE)) { + DPRINTK(PROBE, ERR, "VF mtu %d out of range\n", new_mtu); + retval = -1; + break; + } + ixgbe_passthru_config(adapter, vf, VMK_CFG_MTU_CHANGED, + (void*)&new_mtu); +#else ixgbe_set_vf_lpe(adapter, msgbuf); +#endif /* __VMKLNX__ */ break; case IXGBE_VF_SET_VLAN: add = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; vid = (msgbuf[1] & IXGBE_VLVF_VLANID_MASK); + DPRINTK(PROBE, ERR, "Mailbox msg received to %s vlan id %d to vf %d\n", + (add > 0 ? "add" : "delete"), vid, vf); +#ifdef __VMKLNX__ + guest_vlan.add = (bool)add; + guest_vlan.vid = vid; + if ((guest_vlan.add == true) && + (guest_vlan.vid > 4095)) { + e_warn(drv, "Invalid Guest VLAN ID configuration\n"); + retval = -1; + break; + } + ixgbe_passthru_config(adapter, vf, add > 0 ? VMK_CFG_GUEST_VLAN_ADD + : VMK_CFG_GUEST_VLAN_REMOVE, (void*)&guest_vlan); +#else /* __VMKLNX__ */ if (adapter->vfinfo[vf].pf_vlan) { e_warn(drv, "VF %d attempted to override " "administratively set VLAN configuration\n" @@ -445,8 +527,13 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) } else { retval = ixgbe_set_vf_vlan(adapter, add, vid, vf); } +#endif /* __VMKLNX__ */ break; case IXGBE_VF_SET_MACVLAN: +#ifdef __VMKLNX__ + e_warn(drv, "MACVLANs not supported\n"); + retval = -1; +#else /* __VMKLNX__ */ index = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; /* @@ -463,6 +550,7 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) } retval = ixgbe_set_vf_macvlan(adapter, vf, index, (unsigned char *)(&msgbuf[1])); +#endif /* __VMKLNX__ */ break; default: e_err(drv, "Unhandled Msg %8.8x\n", msgbuf[0]); @@ -550,10 +638,12 @@ int ixgbe_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) "setting MAC %pM on VF %d\n", mac, vf); dev_info(&adapter->pdev->dev, "Reload the VF driver to make this" - " change effective."); + " change effective.\n"); retval = ixgbe_set_vf_mac(adapter, vf, mac); if (retval >= 0) { +#ifndef __VMKLNX__ adapter->vfinfo[vf].pf_set_mac = true; +#endif if (test_bit(__IXGBE_DOWN, &adapter->state)) { dev_warn(&adapter->pdev->dev, "The VF MAC address has been set," @@ -613,6 +703,36 @@ out: return err; } +#ifdef __VMKLNX__ +int ixgbe_vf_get_stats(struct net_device *netdev, vmk_VFID vf, + uint8_t numTxQueues, uint8_t numRxQueues, + vmk_NetVFTXQueueStats *tqStats, + vmk_NetVFRXQueueStats *rqStats) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int i; + + memset(tqStats, 0, numTxQueues * sizeof (vmk_NetVFTXQueueStats)); + memset(rqStats, 0, numRxQueues * sizeof (vmk_NetVFRXQueueStats)); + + /* for now, no more than one rx/tx queue pair supported */ + numTxQueues = min((int)numTxQueues, 1); + numRxQueues = min((int)numRxQueues, 1); + + for (i = 0; i < numTxQueues; i++) { + tqStats[i].unicastPkts = adapter->vfinfo[vf].vfstats.gptc; + tqStats[i].unicastBytes = adapter->vfinfo[vf].vfstats.gotc; + } + + for (i = 0; i < numRxQueues; i++) { + rqStats[i].unicastPkts = adapter->vfinfo[vf].vfstats.gprc; + rqStats[i].unicastBytes = adapter->vfinfo[vf].vfstats.gorc; + rqStats[i].multicastPkts = adapter->vfinfo[vf].vfstats.mprc; + } + return 0; +} +#endif /* __VMKLNX__ */ + int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate) { diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.h b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.h index a2d1974..e7cec2a 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.h +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_sriov.h @@ -53,6 +53,11 @@ int ixgbe_ndo_get_vf_config(struct net_device *netdev, #endif /* __VMKLNX__ */ #endif void ixgbe_dump_registers(struct ixgbe_adapter *adapter); - +#ifdef __VMKLNX__ +int ixgbe_vf_get_stats(struct net_device *netdev, vmk_VFID vf, + uint8_t numTxQueues, uint8_t numRxQueues, + vmk_NetVFTXQueueStats *tqStats, + vmk_NetVFRXQueueStats *rqStats); +#endif /* __VMKLNX__ */ #endif /* _IXGBE_SRIOV_H_ */ diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_type.h b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_type.h index eec63b5..168814f 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_type.h +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_type.h @@ -2185,57 +2185,57 @@ enum { #define IXGBE_VFLRE(_i) (((_i & 1) ? 0x001C0 : 0x00600)) #define IXGBE_VFLREC(_i) (0x00700 + (_i * 4)) /* Translated register #defines */ -#define IXGBE_PVFCTRL(P) (0x00300 + (4 * P)) -#define IXGBE_PVFSTATUS(P) (0x00008 + (0 * P)) -#define IXGBE_PVFLINKS(P) (0x042A4 + (0 * P)) -#define IXGBE_PVFRTIMER(P) (0x00048 + (0 * P)) -#define IXGBE_PVFMAILBOX(P) (0x04C00 + (4 * P)) -#define IXGBE_PVFRXMEMWRAP(P) (0x03190 + (0 * P)) -#define IXGBE_PVTEICR(P) (0x00B00 + (4 * P)) -#define IXGBE_PVTEICS(P) (0x00C00 + (4 * P)) -#define IXGBE_PVTEIMS(P) (0x00D00 + (4 * P)) -#define IXGBE_PVTEIMC(P) (0x00E00 + (4 * P)) -#define IXGBE_PVTEIAC(P) (0x00F00 + (4 * P)) -#define IXGBE_PVTEIAM(P) (0x04D00 + (4 * P)) -#define IXGBE_PVTEITR(P) (((P) < 24) ? (0x00820 + ((P) * 4)) : \ - (0x012300 + (((P) - 24) * 4))) -#define IXGBE_PVTIVAR(P) (0x12500 + (4 * P)) -#define IXGBE_PVTIVAR_MISC(P) (0x04E00 + (4 * P)) -#define IXGBE_PVTRSCINT(P) (0x12000 + (4 * P)) -#define IXGBE_VFPBACL(P) (0x110C8 + (4 * P)) -#define IXGBE_PVFRDBAL(P) ((P < 64) ? (0x01000 + (0x40 * P)) \ - : (0x0D000 + (0x40 * (P - 64)))) -#define IXGBE_PVFRDBAH(P) ((P < 64) ? (0x01004 + (0x40 * P)) \ - : (0x0D004 + (0x40 * (P - 64)))) -#define IXGBE_PVFRDLEN(P) ((P < 64) ? (0x01008 + (0x40 * P)) \ - : (0x0D008 + (0x40 * (P - 64)))) -#define IXGBE_PVFRDH(P) ((P < 64) ? (0x01010 + (0x40 * P)) \ - : (0x0D010 + (0x40 * (P - 64)))) -#define IXGBE_PVFRDT(P) ((P < 64) ? (0x01018 + (0x40 * P)) \ - : (0x0D018 + (0x40 * (P - 64)))) -#define IXGBE_PVFRXDCTL(P) ((P < 64) ? (0x01028 + (0x40 * P)) \ - : (0x0D028 + (0x40 * (P - 64)))) -#define IXGBE_PVFSRRCTL(P) ((P < 64) ? (0x01014 + (0x40 * P)) \ - : (0x0D014 + (0x40 * (P - 64)))) -#define IXGBE_PVFPSRTYPE(P) (0x0EA00 + (4 * P)) -#define IXGBE_PVFTDBAL(P) (0x06000 + (0x40 * P)) -#define IXGBE_PVFTDBAH(P) (0x06004 + (0x40 * P)) -#define IXGBE_PVFTTDLEN(P) (0x06008 + (0x40 * P)) -#define IXGBE_PVFTDH(P) (0x06010 + (0x40 * P)) -#define IXGBE_PVFTDT(P) (0x06018 + (0x40 * P)) -#define IXGBE_PVFTXDCTL(P) (0x06028 + (0x40 * P)) -#define IXGBE_PVFTDWBAL(P) (0x06038 + (0x40 * P)) -#define IXGBE_PVFTDWBAH(P) (0x0603C + (0x40 * P)) -#define IXGBE_PVFDCA_RXCTRL(P) ((P < 64) ? (0x0100C + (0x40 * P)) \ - : (0x0D00C + (0x40 * (P - 64)))) -#define IXGBE_PVFDCA_TXCTRL(P) (0x0600C + (0x40 * P)) -#define IXGBE_PVFGPRC(x) (0x0101C + (0x40 * x)) -#define IXGBE_PVFGPTC(x) (0x08300 + (0x04 * x)) -#define IXGBE_PVFGORC_LSB(x) (0x01020 + (0x40 * x)) -#define IXGBE_PVFGORC_MSB(x) (0x0D020 + (0x40 * x)) -#define IXGBE_PVFGOTC_LSB(x) (0x08400 + (0x08 * x)) -#define IXGBE_PVFGOTC_MSB(x) (0x08404 + (0x08 * x)) -#define IXGBE_PVFMPRC(x) (0x0D01C + (0x40 * x)) +#define IXGBE_PVFCTRL(P) (0x00300 + (4 * P)) +#define IXGBE_PVFSTATUS(P) (0x00008 + (0 * P)) +#define IXGBE_PVFLINKS(P) (0x042A4 + (0 * P)) +#define IXGBE_PVFRTIMER(P) (0x00048 + (0 * P)) +#define IXGBE_PVFMAILBOX(P) (0x04C00 + (4 * P)) +#define IXGBE_PVFRXMEMWRAP(P) (0x03190 + (0 * P)) +#define IXGBE_PVTEICR(P) (0x00B00 + (4 * P)) +#define IXGBE_PVTEICS(P) (0x00C00 + (4 * P)) +#define IXGBE_PVTEIMS(P) (0x00D00 + (4 * P)) +#define IXGBE_PVTEIMC(P) (0x00E00 + (4 * P)) +#define IXGBE_PVTEIAC(P) (0x00F00 + (4 * P)) +#define IXGBE_PVTEIAM(P) (0x04D00 + (4 * P)) +#define IXGBE_PVTEITR(P) (((P) < 24) ? (0x00820 + ((P) * 4)) : \ + (0x012300 + (((P) - 24) * 4))) +#define IXGBE_PVTIVAR(P) (0x12500 + (4 * P)) +#define IXGBE_PVTIVAR_MISC(P) (0x04E00 + (4 * P)) +#define IXGBE_PVTRSCINT(P) (0x12000 + (4 * P)) +#define IXGBE_VFPBACL(P) (0x110C8 + (4 * P)) +#define IXGBE_PVFRDBAL(P) ((P < 64) ? (0x01000 + (0x40 * P)) \ + : (0x0D000 + (0x40 * (P - 64)))) +#define IXGBE_PVFRDBAH(P) ((P < 64) ? (0x01004 + (0x40 * P)) \ + : (0x0D004 + (0x40 * (P - 64)))) +#define IXGBE_PVFRDLEN(P) ((P < 64) ? (0x01008 + (0x40 * P)) \ + : (0x0D008 + (0x40 * (P - 64)))) +#define IXGBE_PVFRDH(P) ((P < 64) ? (0x01010 + (0x40 * P)) \ + : (0x0D010 + (0x40 * (P - 64)))) +#define IXGBE_PVFRDT(P) ((P < 64) ? (0x01018 + (0x40 * P)) \ + : (0x0D018 + (0x40 * (P - 64)))) +#define IXGBE_PVFRXDCTL(P) ((P < 64) ? (0x01028 + (0x40 * P)) \ + : (0x0D028 + (0x40 * (P - 64)))) +#define IXGBE_PVFSRRCTL(P) ((P < 64) ? (0x01014 + (0x40 * P)) \ + : (0x0D014 + (0x40 * (P - 64)))) +#define IXGBE_PVFPSRTYPE(P) (0x0EA00 + (4 * P)) +#define IXGBE_PVFTDBAL(P) (0x06000 + (0x40 * P)) +#define IXGBE_PVFTDBAH(P) (0x06004 + (0x40 * P)) +#define IXGBE_PVFTTDLEN(P) (0x06008 + (0x40 * P)) +#define IXGBE_PVFTDH(P) (0x06010 + (0x40 * P)) +#define IXGBE_PVFTDT(P) (0x06018 + (0x40 * P)) +#define IXGBE_PVFTXDCTL(P) (0x06028 + (0x40 * P)) +#define IXGBE_PVFTDWBAL(P) (0x06038 + (0x40 * P)) +#define IXGBE_PVFTDWBAH(P) (0x0603C + (0x40 * P)) +#define IXGBE_PVFDCA_RXCTRL(P) ((P < 64) ? (0x0100C + (0x40 * P)) \ + : (0x0D00C + (0x40 * (P - 64)))) +#define IXGBE_PVFDCA_TXCTRL(P) (0x0600C + (0x40 * P)) +#define IXGBE_PVFGPRC(x) (0x0101C + (0x40 * x)) +#define IXGBE_PVFGPTC(x) (0x08300 + (0x04 * x)) +#define IXGBE_PVFGORC_LSB(x) (0x01020 + (0x40 * x)) +#define IXGBE_PVFGORC_MSB(x) (0x0D020 + (0x40 * x)) +#define IXGBE_PVFGOTC_LSB(x) (0x08400 + (0x08 * x)) +#define IXGBE_PVFGOTC_MSB(x) (0x08404 + (0x08 * x)) +#define IXGBE_PVFMPRC(x) (0x0D01C + (0x40 * x)) #define IXGBE_PVFTDWBALn(q_per_pool, vf_number, vf_q_index) \ (IXGBE_PVFTDWBAL((q_per_pool)*(vf_number) + (vf_q_index))) @@ -3073,20 +3073,20 @@ struct ixgbe_mac_info { }; struct ixgbe_phy_info { - struct ixgbe_phy_operations ops; - enum ixgbe_phy_type type; - u32 addr; - u32 id; - enum ixgbe_sfp_type sfp_type; - bool sfp_setup_needed; - u32 revision; - enum ixgbe_media_type media_type; - bool reset_disable; - ixgbe_autoneg_advertised autoneg_advertised; - enum ixgbe_smart_speed smart_speed; - bool smart_speed_active; - bool multispeed_fiber; - bool reset_if_overtemp; + struct ixgbe_phy_operations ops; + enum ixgbe_phy_type type; + u32 addr; + u32 id; + enum ixgbe_sfp_type sfp_type; + bool sfp_setup_needed; + u32 revision; + enum ixgbe_media_type media_type; + bool reset_disable; + ixgbe_autoneg_advertised autoneg_advertised; + enum ixgbe_smart_speed smart_speed; + bool smart_speed_active; + bool multispeed_fiber; + bool reset_if_overtemp; }; #include "ixgbe_mbx.h" @@ -3129,7 +3129,7 @@ struct ixgbe_hw { struct ixgbe_phy_info phy; struct ixgbe_eeprom_info eeprom; struct ixgbe_bus_info bus; - struct ixgbe_mbx_info mbx; + struct ixgbe_mbx_info mbx; u16 device_id; u16 vendor_id; u16 subsystem_device_id; diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_vmdq.c b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_vmdq.c index 4bef8ba..97cd200 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_vmdq.c +++ b/vmkdrivers/src_9/drivers/net/ixgbe/ixgbe_vmdq.c @@ -33,6 +33,14 @@ #ifdef __VMKLNX__ + +#define IXGBE_ESX_RSS_SEED_LEN 10 /* Length in number of words + * 1 Word = 4 bytes + */ +#define IXGBE_ESX_RSS_IND_TABLE_SIZE 128 /* Number of indirection table + * entries + */ + static int ixgbe_max_filters_per_pool(struct ixgbe_adapter *adapter) { /* share the rars among the pools */ @@ -40,13 +48,20 @@ static int ixgbe_max_filters_per_pool(struct ixgbe_adapter *adapter) return 1; else if (adapter->num_rx_pools > 1) /* substract 1 from the rar entries to reserve rar[0] for a board MAC */ + return (((adapter->hw.mac.num_rar_entries - 1) - adapter->num_vfs) / (adapter->num_rx_pools - 1)); - else return ((adapter->hw.mac.num_rar_entries - 1) - adapter->num_vfs); } +static int ixgbe_max_filters_per_device(struct ixgbe_adapter *adapter) +{ + /* share the rars among the pools */ + /* substract 1 from the rar entries to reserve rar[0] for a board MAC */ + return ((adapter->hw.mac.num_rar_entries - 1) - adapter->num_vfs); +} + static s32 ixgbe_clear_vlvf_vlan(struct ixgbe_hw *hw, u32 vlan, u32 vind) { u32 vt; @@ -99,12 +114,31 @@ static int ixgbe_get_netqueue_features(vmknetddi_queueop_get_features_args_t *ar return VMKNETDDI_QUEUEOPS_OK; } +static int ixgbe_get_netq_count(struct ixgbe_adapter *adapter) +{ + int calc_queues, count; + struct net_device *netdev = adapter->netdev; + struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE]; + + /* subtract one to factor out the default queue */ + if (netdev->features & NETIF_F_CNA) { + count = f->indices; + } else { + calc_queues = ((adapter->num_rx_queues - f->indices) + - 1) - + (adapter->flags & IXGBE_FLAG_RSS_ENABLED ? + (IXGBE_ESX_RSS_QUEUES - 1) : 0); + + count = max(calc_queues, 0); + } + + return count; +} static int ixgbe_get_queue_count(vmknetddi_queueop_get_queue_count_args_t *args) { struct net_device *netdev = args->netdev; struct ixgbe_adapter *adapter = netdev_priv(netdev); struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE]; - int calc_queues; if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { if (netdev->features & NETIF_F_CNA) @@ -112,22 +146,8 @@ static int ixgbe_get_queue_count(vmknetddi_queueop_get_queue_count_args_t *args) else args->count = max((adapter->num_tx_queues - f->indices) - 1, 0); - // Restrict tx netq count to max of 4 (including default q) to get better CPU perf. - if (args->count > 3) - args->count = 3; } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { - /* subtract one to factor out the default queue */ - if (netdev->features & NETIF_F_CNA) { - args->count = f->indices; - } else { - calc_queues = ((adapter->num_rx_queues - f->indices) - - 1) - - (adapter->flags & IXGBE_FLAG_RSS_ENABLED ? - (IXGBE_ESX_RSS_QUEUES - 1) : 0); - - args->count = max(calc_queues, 0); - } - + args->count = ixgbe_get_netq_count(adapter); } else { DPRINTK(PROBE, ERR, "invalid queue type\n"); return VMKNETDDI_QUEUEOPS_ERR; @@ -145,6 +165,24 @@ static int ixgbe_get_filter_count(vmknetddi_queueop_get_filter_count_args_t *arg return VMKNETDDI_QUEUEOPS_OK; } + +/* + * Number of filters per q. + * VMWare perf team suggests 32 filters for + * optimal performance with dynamic netq feaure + */ +#define IXGBE_ESX_FILTERS_PER_Q 32 + +static int ixgbe_get_filter_count_of_device(vmknetddi_queueop_get_filter_count_of_device_args_t *args) +{ + struct net_device *netdev = args->netdev; + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + args->filters_of_device_count = ixgbe_max_filters_per_device(adapter); + args->filters_per_queue_count = IXGBE_ESX_FILTERS_PER_Q; + return VMKNETDDI_QUEUEOPS_OK; +} + static int ixgbe_alloc_rx_queue(struct net_device *netdev, vmknetddi_queueops_queueid_t *p_qid, struct napi_struct **napi_p, @@ -152,11 +190,14 @@ static int ixgbe_alloc_rx_queue(struct net_device *netdev, { struct ixgbe_adapter *adapter = netdev_priv(netdev); int pool; - bool give_rsc = false; + bool give_rsc = false, latency_q = false; bool netdev_type_cna = !!(netdev->features & NETIF_F_CNA); + int netq_count = ixgbe_get_netq_count(adapter); - if (adapter->n_rx_queues_allocated >= adapter->num_rx_queues) { - DPRINTK(PROBE, ERR, "no free rx queues\n"); + if (adapter->n_rx_queues_allocated >= netq_count) { + DPRINTK(PROBE, ERR, "no free rx queues. Already allocated %d netqueues " \ + "while advertized netq_count is %d \n", + adapter->n_rx_queues_allocated, netq_count); return VMKNETDDI_QUEUEOPS_ERR; } @@ -167,8 +208,15 @@ static int ixgbe_alloc_rx_queue(struct net_device *netdev, DPRINTK(PROBE, ERR, "Warning: RSC requested when not enabled\n"); } + if (feat & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LATENCY) { + if (adapter->flags2 & IXGBE_FLAG2_LATENCY_ENABLED) + latency_q = true; + else + DPRINTK(PROBE, ERR, + "Warning: LATENCY requested when not enabled\n"); + } - if (feat & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS) { + if (feat & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS_DYN) { /* Give out RSS queue * num_rx_per_pools is assumed to be 1 always and FCOE pool * should not be allocated @@ -176,29 +224,24 @@ static int ixgbe_alloc_rx_queue(struct net_device *netdev, #ifdef VMX86_DEBUG DPRINTK(PROBE, ERR, "RSS queue allocation requested\n"); #endif - pool = (adapter->num_rx_pools - 1); /* RSS pool */ + pool = (adapter->num_rx_pools - 1); int base_queue = pool * adapter->num_rx_queues_per_pool; - if (ring_is_allocated(adapter->rx_ring[base_queue])) { - DPRINTK(PROBE, ERR, "RSS queue is already allocated. " - "Trying non-RSS q allocation \n"); - feat = 0; - give_rsc = 0; - } else { + if (!ring_is_allocated(adapter->rx_ring[base_queue])) { set_ring_allocated(adapter->rx_ring[base_queue]); + set_ring_rss_enabled(adapter->rx_ring[base_queue]); adapter->n_rx_queues_allocated++; *p_qid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(pool); - #ifdef VMX86_DEBUG - DPRINTK(PROBE, ERR, "allocated RSS rx queue %d \n", pool); + DPRINTK(PROBE, ERR, "allocated RSS rx Q HWQID %d and lb_qid 0x%x\n", + pool, *p_qid); #endif return VMKNETDDI_QUEUEOPS_OK; - } + } + } - /* we don't give out rx[0], the default queue */ - for (pool = 1; pool < adapter->num_rx_pools - - (adapter->flags & IXGBE_FLAG_RSS_ENABLED ? 1 : 0); - pool++) { + /* we don't give out rx[0], the default queue*/ + for (pool = 1; pool < adapter->num_rx_pools; pool++) { int base_queue = pool * adapter->num_rx_queues_per_pool; if (!ring_is_allocated(adapter->rx_ring[base_queue]) @@ -215,22 +258,31 @@ static int ixgbe_alloc_rx_queue(struct net_device *netdev, ixgbe_configure_rscctl(adapter, adapter->rx_ring[q]); } + if (latency_q) { + //set itr to 100k + set_ring_latency_enabled(adapter->rx_ring[q]); + adapter->rx_ring[q]->q_vector->itr = IXGBE_100K_ITR; + ixgbe_write_eitr(adapter->rx_ring[q]->q_vector); + } } *p_qid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(pool); +#ifdef CONFIG_IXGBE_NAPI *napi_p = &adapter->rx_ring[pool]->q_vector->napi; +#endif #ifdef VMX86_DEBUG -/* - * PR 549649 - */ - DPRINTK(PROBE, ERR, "allocated rx queue %d %s\n", - pool, (give_rsc ? "with RSC" : "")); + DPRINTK(PROBE, ERR, "allocated rx Q HWQID %d and lb_qid 0x%x %s\n", + pool, *p_qid, + (give_rsc ? "with RSC" : (latency_q ? "type Latency Q" : ""))); #endif return VMKNETDDI_QUEUEOPS_OK; } } - DPRINTK(PROBE, ERR, "no free rx queues found!\n"); + DPRINTK(PROBE, ERR, + "no free rx queues found! - Already allocated %d netqueues "\ + "while advertized netq_count is %d \n", + adapter->n_rx_queues_allocated, netq_count); return VMKNETDDI_QUEUEOPS_ERR; } @@ -274,8 +326,7 @@ static int ixgbe_alloc_netqueue(vmknetddi_queueop_alloc_queue_args_t *args) if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { return ixgbe_alloc_tx_queue(args->netdev, &args->queueid, &args->queue_mapping); - } - else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { return ixgbe_alloc_rx_queue(args->netdev, &args->queueid, &args->napi, 0); } @@ -314,22 +365,46 @@ static int ixgbe_free_rx_queue(struct net_device *netdev, return VMKNETDDI_QUEUEOPS_ERR; } + if (adapter->rx_ring[base_queue]->active) { + DPRINTK(PROBE, ERR, + "%d Filters are still present on HWQID %d with lb_qid 0x%x."\ + " Q con not be removed \n", + adapter->rx_ring[base_queue]->active, pool, qid); + return VMKNETDDI_QUEUEOPS_ERR; + } + for (q = base_queue; q < base_queue + adapter->num_rx_queues_per_pool; q++) { - if (ring_is_rsc_enabled(adapter->rx_ring[q])) + if (ring_is_rsc_enabled(adapter->rx_ring[q])) { + msleep(1); ixgbe_clear_rscctl(adapter, adapter->rx_ring[q]); + clear_ring_rsc_enabled(adapter->rx_ring[q]); +#ifdef VMX86_DEBUG + DPRINTK(PROBE, ERR, "freed HWLRO rx queue %d\n",pool); +#endif /* VMX86_DEBUG */ + } + if (ring_is_latency_enabled(adapter->rx_ring[q])) { + //set_ring_latency_enabled(adapter->rx_ring[q]); + //reset itr back to original value + adapter->rx_ring[q]->q_vector->itr = adapter->rx_ring[0]->q_vector->itr; + ixgbe_write_eitr(adapter->rx_ring[q]->q_vector); + clear_ring_latency_enabled(adapter->rx_ring[q]); +#ifdef VMX86_DEBUG + DPRINTK(PROBE, ERR, "freed LATENCY rx queue %d\n",pool); +#endif /* VMX86_DEBUG */ + } + if (ring_is_rss_enabled(adapter->rx_ring[q])) { + clear_ring_rss_enabled(adapter->rx_ring[q]); +#ifdef VMX86_DEBUG + DPRINTK(PROBE, ERR, "freed RSS rx queue %d\n",pool); +#endif /* VMX86_DEBUG */ + } clear_ring_allocated(adapter->rx_ring[q]); if (adapter->n_rx_queues_allocated) adapter->n_rx_queues_allocated--; } - -#ifdef VMX86_DEBUG - DPRINTK(PROBE, ERR, "freed %s rx queue %d\n", - (((adapter->flags & IXGBE_FLAG_RSS_ENABLED) && - (pool == (adapter->num_rx_pools - 1))) ? "RSS" : ""), pool); -#endif return VMKNETDDI_QUEUEOPS_OK; } @@ -376,7 +451,6 @@ static int ixgbe_free_queue(vmknetddi_queueop_free_queue_args_t *args) static int ixgbe_get_queue_vector(vmknetddi_queueop_get_queue_vector_args_t *args) { - u16 qid; struct net_device *netdev = args->netdev; struct ixgbe_adapter *adapter = netdev_priv(netdev); int pool = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); @@ -391,11 +465,15 @@ static int ixgbe_get_queue_vector(vmknetddi_queueop_get_queue_vector_args_t *arg static int ixgbe_get_default_queue(vmknetddi_queueop_get_default_queue_args_t *args) { +#ifdef CONFIG_IXGBE_NAPI struct net_device *netdev = args->netdev; struct ixgbe_adapter *adapter = netdev_priv(netdev); +#endif if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { +#ifdef CONFIG_IXGBE_NAPI args->napi = &adapter->rx_ring[0]->q_vector->napi; +#endif args->queueid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(0); return VMKNETDDI_QUEUEOPS_OK; } @@ -454,18 +532,14 @@ static int ixgbe_apply_rx_filter(vmknetddi_queueop_apply_rx_filter_args_t *args) return VMKNETDDI_QUEUEOPS_ERR; } - if (adapter->rx_ring[base_queue]->active >= ixgbe_max_filters_per_pool(adapter)) { - DPRINTK(PROBE, ERR, "filter count exceeded\n"); + if (adapter->rx_ring[base_queue]->active >= IXGBE_ESX_FILTERS_PER_Q ) { + DPRINTK(PROBE, ERR, + "filter count exceeded on queue %d. already applied %d filters\n", + pool, adapter->rx_ring[base_queue]->active); return VMKNETDDI_QUEUEOPS_ERR; } macaddr = vmknetddi_queueops_get_filter_macaddr(&args->filter); -#ifdef VMX86_DEBUG - DPRINTK(PROBE, ERR, - "Setting rx queue %u to %02x:%02x:%02x:%02x:%02x:%02x\n", - pool, macaddr[0], macaddr[1], macaddr[2], - macaddr[3], macaddr[4], macaddr[5]); -#endif switch (hw->mac.type) { case ixgbe_mac_82599EB: @@ -475,10 +549,14 @@ static int ixgbe_apply_rx_filter(vmknetddi_queueop_apply_rx_filter_args_t *args) /* This is an RSS filter - configure RSS and continue * to add a mac filter */ - ixgbe_configure_rss_filter(args->netdev, macaddr); + /* + * XXX: Now we have a separate op VMKNETDDI_QUEUEOPS_OP_INIT_RSS_STATE + * to initialize the rss state. + * ixgbe_configure_rss_filter(args->netdev, macaddr); + */ } /* find a free rar or the mac_addr already there */ - index = ixgbe_add_mac_filter(adapter, macaddr, pool); + index = ixgbe_add_mac_filter(adapter, macaddr, VMDQ_P(pool)); if (index < 0) { DPRINTK(PROBE, ERR, "set mac address failed, %d\n", index); @@ -503,10 +581,8 @@ static int ixgbe_apply_rx_filter(vmknetddi_queueop_apply_rx_filter_args_t *args) vlvf_ind = ixgbe_find_vlvf_slot(hw, vid); if (vlvf_ind < 0) { DPRINTK(PROBE, ERR, - "Failed to get VLVF slot. " - "Table full\n"); - ixgbe_del_mac_filter_by_index(adapter, - index); + "Failed to get VLVF slot. Table full\n"); + ixgbe_del_mac_filter_by_index(adapter, index); return VMKNETDDI_QUEUEOPS_ERR; } } @@ -541,6 +617,31 @@ static int ixgbe_apply_rx_filter(vmknetddi_queueop_apply_rx_filter_args_t *args) else fid = (pool << 8) | index; args->filterid = VMKNETDDI_QUEUEOPS_MK_FILTERID(fid); + args->pairtxqid = pool; +#ifdef VMX86_DEBUG + if (ring_is_rss_enabled(adapter->rx_ring[base_queue])) { + DPRINTK(PROBE, ERR, + "Applied FID[0x%X]-%02x:%02x:%02x:%02x:%02x:%02x to RSS Q %u with pairtxqid %d\n", + args->filterid, macaddr[0], macaddr[1], macaddr[2], + macaddr[3], macaddr[4], macaddr[5], pool, args->pairtxqid); + } else if (ring_is_latency_enabled(adapter->rx_ring[base_queue])) { + DPRINTK(PROBE, ERR, + "Applied FID[0x%X]-%02x:%02x:%02x:%02x:%02x:%02x to LATENCY Q %u with pairtxqid %d\n", + args->filterid, macaddr[0], macaddr[1], macaddr[2], + macaddr[3], macaddr[4], macaddr[5], pool, args->pairtxqid); + } else if (ring_is_rsc_enabled(adapter->rx_ring[base_queue])) { + DPRINTK(PROBE, ERR, + "Applied FID[0x%X]-%02x:%02x:%02x:%02x:%02x:%02x to HWLRO Q %u with pairtxqid %d\n", + args->filterid, macaddr[0], macaddr[1], macaddr[2], + macaddr[3], macaddr[4], macaddr[5], pool, args->pairtxqid); + } else { + DPRINTK(PROBE, ERR, + "Applied FID[0x%X]-%02x:%02x:%02x:%02x:%02x:%02x to NO_FEAT Q %u with pairtxqid %d\n", + args->filterid, macaddr[0], macaddr[1], macaddr[2], + macaddr[3], macaddr[4], macaddr[5], pool, args->pairtxqid); + } + +#endif return VMKNETDDI_QUEUEOPS_OK; } @@ -613,13 +714,15 @@ static int ixgbe_remove_rx_filter(vmknetddi_queueop_remove_rx_filter_args_t *arg } adapter->rx_ring[base_queue]->active--; - #ifdef VMX86_DEBUG - if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) && - (pool == (adapter->num_rx_pools - 1))) + if (ring_is_rss_enabled(adapter->rx_ring[base_queue])) { DPRINTK(PROBE, ERR, "freed RSS filter from pool %d\n", pool); + } else if (ring_is_latency_enabled(adapter->rx_ring[base_queue])) { + DPRINTK(PROBE, ERR, "freed LATENCY filter from pool %d\n", pool); + } else if (ring_is_rsc_enabled(adapter->rx_ring[base_queue])) { + DPRINTK(PROBE, ERR, "freed HWLRO filter from pool %d\n", pool); + } #endif - return VMKNETDDI_QUEUEOPS_OK; } @@ -671,21 +774,26 @@ static int ixgbe_alloc_queue_with_attr( /* Unsupported features */ if (feat & ~(VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO | - VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS)) { + VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS_DYN | + VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PAIR| + VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LATENCY)) { DPRINTK(PROBE, ERR, "Failed... " "unsupported feature 0x%x\n", feat & ~(VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO | - VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS)); + VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS_DYN | + VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LATENCY)); return VMKNETDDI_QUEUEOPS_ERR; } if (feat & (VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO | - VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS)) { + VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS_DYN | + VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PAIR| + VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LATENCY)) { if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { DPRINTK(PROBE, ERR, "Invalid queue type, " - "LRO feature is only " + "LRO and RSS features are only " "for RX queue\n"); break; } @@ -712,6 +820,35 @@ static int ixgbe_alloc_queue_with_attr( return VMKNETDDI_QUEUEOPS_ERR; } +static int ixgbe_realloc_queue_with_attr( + vmknetddi_queueop_realloc_queue_with_attr_args_t *args) +{ + int i, ret; + vmknetddi_queueop_alloc_queue_with_attr_args_t *alloc_args = args->alloc_args; + struct ixgbe_adapter *adapter = netdev_priv(alloc_args->netdev); + + for (i = 0; i < args->rm_filter_count; i++) { + ixgbe_remove_rx_filter((args->rm_filters_args + i)); + } + + ixgbe_free_rx_queue(alloc_args->netdev, alloc_args->queueid); + + if (alloc_args->nattr) { + ret = ixgbe_alloc_queue_with_attr(alloc_args); + } else { + ret = ixgbe_alloc_rx_queue(alloc_args->netdev, &alloc_args->queueid, + &alloc_args->napi, 0); + } + + ixgbe_apply_rx_filter(args->apply_rx_filter_args); + +#ifdef VMX86_DEBUG + DPRINTK(PROBE, ERR, "REALLOC of queue 0x%lx \n", args->rm_filters_args[0].queueid); +#endif + + return ret; +} + static int ixgbe_get_supported_feature( vmknetddi_queueop_get_sup_feat_args_t *args) { @@ -722,19 +859,55 @@ static int ixgbe_get_supported_feature( switch (adapter->hw.mac.type) { case ixgbe_mac_82599EB: case ixgbe_mac_X540: - if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) + args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PAIR; + + if ((adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO; + if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) - args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS; + args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS_DYN; + + args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_DYNAMIC; + args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PREEMPTIBLE; + + /* fall through */ + case ixgbe_mac_82598EB: + args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PAIR; + + if (adapter->flags2 & IXGBE_FLAG2_LATENCY_ENABLED) + args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LATENCY; + + /* fall through */ + default: + /* + * Check the compatibilities between differnt features.. + */ + + /* 82599's HWLRO is not compatible with FEAT_DYNAMIC */ + /* + if ((adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { + args->features &= ~VMKNETDDI_QUEUEOPS_QUEUE_FEAT_DYNAMIC; + } + */ + + /* Don't advertise advanced netq features if only 1 netq */ + if ((adapter->num_vfs) && + (adapter->ring_feature[RING_F_VMDQ].indices <= 2)) { + args->features = 0; + } break; } - - DPRINTK(PROBE, ERR, "netq features supported: %s %s %s\n", +#ifdef VMX86_DEBUG + DPRINTK(PROBE, ERR, "netq features supported: %s %s %s %s %s %s %s\n", (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LRO) ? "LRO" : "", - (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS) ? "RSS" : "", + (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS_DYN) ? "RSS_DYN" : "", + (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PAIR) ? "QueuePair" : "", + (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_LATENCY) ? "Latency" : "", + (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_DYNAMIC) ? "Dynamic" : "", + (args->features & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_PREEMPTIBLE) ? "Pre-Emptible" : "", (args->features) ? "" : "NONE"); - +#endif /*VMX86_DEBUG */ return VMKNETDDI_QUEUEOPS_OK; } @@ -743,7 +916,7 @@ static int ixgbe_get_supported_filter_class( vmknetddi_queueop_get_sup_filter_class_args_t *args) { struct ixgbe_adapter *adapter = netdev_priv(args->netdev); - struct ixgbe_hw *hw = &adapter->hw; + if (adapter->num_vfs) { args->class = VMKNETDDI_QUEUEOPS_FILTER_VLANMACADDR | VMKNETDDI_QUEUEOPS_FILTER_MACADDR; @@ -754,6 +927,147 @@ static int ixgbe_get_supported_filter_class( return VMKNETDDI_QUEUEOPS_OK; } +static int +ixgbe_rss_get_params(vmknetddi_queue_rssop_get_params_args_t *args) +{ + struct ixgbe_adapter *adapter = netdev_priv(args->netdev); + + if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED)) { + return VMKNETDDI_QUEUEOPS_ERR; + } + + args->num_rss_pools = 1; // XXX: define a macro + args->num_rss_queues_per_pool = adapter->ring_feature[RING_F_RSS].indices; // Verify this. + args->rss_hash_key_size = IXGBE_ESX_RSS_SEED_LEN * sizeof (u32); + args->rss_ind_table_size = IXGBE_ESX_RSS_IND_TABLE_SIZE; + + return VMKNETDDI_QUEUEOPS_OK; +} + +static int +ixgbe_rss_ind_table_get(struct net_device *netdev, + vmknetddi_queue_rssop_ind_table_t *ind_table) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + int i; + union ixgbe_reta { + u32 dword; + u8 bytes[4]; + } reta; + + // Check table size. + if (ind_table->table_size > VMKNETDDI_NETQUEUE_MAX_RSS_IND_TABLE_SIZE) { + return VMKNETDDI_QUEUEOPS_ERR; + } + + // Get RETA in the hardware. + for (i = 0; i < 128; i++) { + /* reta = 4-byte sliding window of + * 0x00..(indices-1)(indices-1)00..etc. */ + if ((i & 3) == 0) + reta.dword = IXGBE_READ_REG(hw, IXGBE_RETA(i >> 2)); + ind_table->table[i % ind_table->table_size] = reta.bytes[i & 3]; + } + + return VMKNETDDI_QUEUEOPS_OK; +} + +static int +ixgbe_rss_ind_table_set(struct net_device *netdev, + vmknetddi_queue_rssop_ind_table_t *ind_table) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + int i; + union ixgbe_reta { + u32 dword; + u8 bytes[4]; + } reta; + + // Check table size. + if (ind_table->table_size > VMKNETDDI_NETQUEUE_MAX_RSS_IND_TABLE_SIZE) { + return VMKNETDDI_QUEUEOPS_ERR; + } + + // Setup RETA in the hardware. + for (i = 0; i < 128; i++) { + /* reta = 4-byte sliding window of + * 0x00..(indices-1)(indices-1)00..etc. */ + reta.bytes[i & 3] = (ind_table->table[i % ind_table->table_size]); + if ((i & 3) == 3) + IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta.dword); + } + + return VMKNETDDI_QUEUEOPS_OK; +} + +static int +ixgbe_rss_init_state(vmknetddi_queue_rssop_init_state_args_t *args) +{ + struct ixgbe_adapter *adapter = netdev_priv(args->netdev); + struct ixgbe_hw *hw = &adapter->hw; + vmknetddi_queue_rssop_hash_key_t *rss_key = args->rss_key; + vmknetddi_queue_rssop_ind_table_t *ind_table = args->rss_ind_table; + int i, ret; + u32 *key; + + // Check key & table size. + if (rss_key->key_size > VMKNETDDI_NETQUEUE_MAX_RSS_KEY_SIZE || + ind_table->table_size > VMKNETDDI_NETQUEUE_MAX_RSS_IND_TABLE_SIZE) { + return VMKNETDDI_QUEUEOPS_ERR; + } + + // Hash key + key = (u32 *)&rss_key->key; + for (i = 0; i < rss_key->key_size / 4; i++) { + IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), key[i]); + } + + ret = ixgbe_rss_ind_table_set(args->netdev, ind_table); + + // RQPL + if (ret == VMKNETDDI_QUEUEOPS_OK) { + u32 psrtype = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(VMDQ_P(adapter->num_rx_pools - 1))); + psrtype |= (4 << 29); + IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(adapter->num_rx_pools - 1)), psrtype); + } + + return ret; +} + +static int +ixgbe_netqueue_rss_ops(vmknetddi_queueop_config_rss_args_t *args) +{ + switch(args->op_type) { + + case VMKNETDDI_QUEUEOPS_RSS_OP_GET_PARAMS: + return ixgbe_rss_get_params( + (vmknetddi_queue_rssop_get_params_args_t *)args->op_args); + + case VMKNETDDI_QUEUEOPS_RSS_OP_INIT_STATE: + return ixgbe_rss_init_state( + (vmknetddi_queue_rssop_init_state_args_t *)args->op_args); + + case VMKNETDDI_QUEUEOPS_RSS_OP_UPDATE_IND_TABLE: { + vmknetddi_queue_rssop_ind_table_args_t *targs = + (vmknetddi_queue_rssop_ind_table_args_t *)args->op_args; + return ixgbe_rss_ind_table_set(targs->netdev, targs->rss_ind_table); + } + + case VMKNETDDI_QUEUEOPS_RSS_OP_GET_IND_TABLE: { + vmknetddi_queue_rssop_ind_table_args_t *targs = + (vmknetddi_queue_rssop_ind_table_args_t *)args->op_args; + return ixgbe_rss_ind_table_get(targs->netdev, targs->rss_ind_table); + } + + default: + printk(KERN_ERR "ixgbe: ixgbe_netqueue_rss_ops: " + "Unhandled RSS OP %d\n", args->op_type); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + int ixgbe_netqueue_ops(vmknetddi_queueops_op_t op, void *args) { switch (op) { @@ -777,6 +1091,11 @@ int ixgbe_netqueue_ops(vmknetddi_queueops_op_t op, void *args) (vmknetddi_queueop_get_filter_count_args_t *)args); break; + case VMKNETDDI_QUEUEOPS_OP_GET_FILTER_COUNT_OF_DEVICE: + return ixgbe_get_filter_count_of_device( + (vmknetddi_queueop_get_filter_count_of_device_args_t *)args); + break; + case VMKNETDDI_QUEUEOPS_OP_ALLOC_QUEUE: return ixgbe_alloc_netqueue( (vmknetddi_queueop_alloc_queue_args_t *)args); @@ -833,6 +1152,15 @@ int ixgbe_netqueue_ops(vmknetddi_queueops_op_t op, void *args) (vmknetddi_queueop_get_sup_filter_class_args_t *)args); break; + case VMKNETDDI_QUEUEOPS_OP_CONFIG_RSS: + return ixgbe_netqueue_rss_ops( + (vmknetddi_queueop_config_rss_args_t *)args); + + case VMKNETDDI_QUEUEOPS_OP_REALLOC_QUEUE_WITH_ATTR: + return ixgbe_realloc_queue_with_attr( + (vmknetddi_queueop_realloc_queue_with_attr_args_t *)args); + break; + default: printk(KERN_ERR "ixgbe: ixgbe_netqueue_ops: " "Unhandled NETQUEUE OP %d\n", op); @@ -842,9 +1170,6 @@ int ixgbe_netqueue_ops(vmknetddi_queueops_op_t op, void *args) return VMKNETDDI_QUEUEOPS_ERR; } - -#define ESX_RSS_SEED_LEN 10 - int ixgbe_configure_rss_filter(struct net_device *netdev, u8* mac) { struct ixgbe_adapter *adapter = netdev_priv(netdev); @@ -852,16 +1177,18 @@ int ixgbe_configure_rss_filter(struct net_device *netdev, u8* mac) int i, j; u32 reta = 0; - static const u32 seed[ESX_RSS_SEED_LEN] = { 0xE291D73D, 0x1805EC6C, - 0x2A94B30D, 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, - 0xB855AABE, 0x6A3E67EA, 0x14364D17, 0x3BED200D}; + static const u32 seed[IXGBE_ESX_RSS_SEED_LEN] = { + 0xE291D73D, 0x1805EC6C, 0x2A94B30D, + 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, + 0xB855AABE, 0x6A3E67EA, 0x14364D17, + 0x3BED200D}; /* Fill out hash function seeds */ - for (i = 0; i < ESX_RSS_SEED_LEN; i++) + for (i = 0; i < IXGBE_ESX_RSS_SEED_LEN; i++) IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]); /* Configure reta */ - for (i = 0, j = 0; i < 128; i++, j++) { + for (i = 0, j = 0; i < IXGBE_ESX_RSS_IND_TABLE_SIZE; i++, j++) { if (j == adapter->ring_feature[RING_F_RSS].indices) j = 0; /* reta = 4-byte sliding window of @@ -882,6 +1209,124 @@ int ixgbe_configure_rss_filter(struct net_device *netdev, u8* mac) return 0; } +void ixgbe_print_regs(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int i; + u32 regl, regh; + u32 reg; + + DPRINTK(PROBE, ERR, "******** Virtualization Registers start ********\n"); + + DPRINTK(PROBE, ERR, "*****Global Registers*****\n"); + DPRINTK(PROBE, ERR, "CTRL %08X\n", + IXGBE_READ_REG(hw, IXGBE_CTRL)); + DPRINTK(PROBE, ERR, "STATUS %08X\n", + IXGBE_READ_REG(hw, IXGBE_STATUS)); + DPRINTK(PROBE, ERR, "CTRL_EXT %08X\n", + IXGBE_READ_REG(hw, IXGBE_CTRL_EXT)); + DPRINTK(PROBE, ERR, "GCR_EXT %08X\n", + IXGBE_READ_REG(hw, IXGBE_GCR_EXT)); + DPRINTK(PROBE, ERR, "GPIE %08X\n", + IXGBE_READ_REG(hw, IXGBE_GPIE)); + DPRINTK(PROBE, ERR, "EITRSEL %08X\n", + IXGBE_READ_REG(hw, IXGBE_EITRSEL)); + + DPRINTK(PROBE, ERR, "FCTRL %08X\n", + IXGBE_READ_REG(hw, IXGBE_FCTRL)); + DPRINTK(PROBE, ERR, "VLNCTRL %08X\n", + IXGBE_READ_REG(hw, IXGBE_VLNCTRL)); + DPRINTK(PROBE, ERR, "MCSTCTRL %08X\n", + IXGBE_READ_REG(hw, IXGBE_MCSTCTRL)); + DPRINTK(PROBE, ERR, "MRQC %08X\n", + IXGBE_READ_REG(hw, IXGBE_MRQC)); + DPRINTK(PROBE, ERR, "MTQC %08X\n", + IXGBE_READ_REG(hw, IXGBE_MTQC)); + + /* print global virtualization regs */ + DPRINTK(PROBE, ERR, "*****Global Virtualization Registers*****\n"); + DPRINTK(PROBE, ERR, "VTCTL %08X\n", + IXGBE_READ_REG(hw, IXGBE_VT_CTL)); + DPRINTK(PROBE, ERR, "DTXGSWC %08X\n", + IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC)); + + /* print active VFs */ + DPRINTK(PROBE, ERR, "*****Active VFs*****\n"); + DPRINTK(PROBE, ERR, "VFREC %08X:%08X\n", + IXGBE_READ_REG(hw, IXGBE_VFLREC(1)), + IXGBE_READ_REG(hw, IXGBE_VFLREC(0))); + DPRINTK(PROBE, ERR, "VFRE %08X:%08X VFTE %08X:%08X\n", + IXGBE_READ_REG(hw, IXGBE_VFRE(1)), + IXGBE_READ_REG(hw, IXGBE_VFRE(0)), + IXGBE_READ_REG(hw, IXGBE_VFTE(1)), + IXGBE_READ_REG(hw, IXGBE_VFTE(0))); + DPRINTK(PROBE, ERR, "VMTXSW %08X:%08X\n", + IXGBE_READ_REG(hw, IXGBE_VMTXSW(1)), + IXGBE_READ_REG(hw, IXGBE_VMTXSW(0))); + DPRINTK(PROBE, ERR, "VMECME %08X:%08X\n", + IXGBE_READ_REG(hw, IXGBE_VMECM(1)), + IXGBE_READ_REG(hw, IXGBE_VMECM(0))); + DPRINTK(PROBE, ERR, "SSVPC %08X\n", + IXGBE_READ_REG(hw, IXGBE_SSVPC)); + + /* print per pool offload settings */ + DPRINTK(PROBE, ERR, "*****Per Pool Offloads*****\n"); + for (i = 0; i < (adapter->num_vfs + adapter->num_rx_queues); i++) { + DPRINTK(PROBE, ERR, "VMF2FLT %d %08X\n", i, + IXGBE_READ_REG(hw, IXGBE_VMOLR(i))); + } + + /* print MAC/VLAN anti-spoofing settings */ + DPRINTK(PROBE, ERR, "*****Anti-spoofing*****\n"); + for (i = 0; i < 8; i++) { + reg = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(i)); + DPRINTK(PROBE, ERR, "%d, VLAN Pool %08X MAC Pool %08X\n", i, + (reg & IXGBE_SPOOF_VLANAS_MASK), + (reg & IXGBE_SPOOF_MACAS_MASK)); + } + + /* print perfact filters */ + + DPRINTK(PROBE, ERR, "*****MAC Filters*****\n"); + for (i = 0; i < 128; i++) { + regl = IXGBE_READ_REG(hw, IXGBE_RAL(i)); + regh = IXGBE_READ_REG(hw, IXGBE_RAH(i)); + if (regh & IXGBE_RAH_AV) + DPRINTK(PROBE, ERR, "%d, Valid %d Pool %08X:%08X Addr %08X:%08X\n", i, + ((regh & IXGBE_RAH_AV) ? 1 : 0), + IXGBE_READ_REG(hw, IXGBE_MPSAR_HI(i)), + IXGBE_READ_REG(hw, IXGBE_MPSAR_LO(i)), + (regh & ~(IXGBE_RAH_AV)), + regl); + } + + /* print VLVFs */ + DPRINTK(PROBE, ERR, "*****VLAN Filters*****\n"); + for (i = 0; i < IXGBE_VLVF_ENTRIES; i++) { + reg = IXGBE_READ_REG(hw, IXGBE_VLVF(i)); + if (reg & IXGBE_VLVF_VIEN) + DPRINTK(PROBE, ERR, "%d, Valid %d Pool %08X:%08X Vlan ID %08X\n", i, + ((reg & IXGBE_VLVF_VIEN) ? 1 : 0), + IXGBE_READ_REG(hw, IXGBE_VLVFB((2*i) + 1)), + IXGBE_READ_REG(hw, IXGBE_VLVFB(2*i)), + (reg & IXGBE_VLVF_VLANID_MASK)); + } + + /* print default VLANs setings */ + DPRINTK(PROBE, ERR, "*****Default VLANs*****\n"); + for (i = 0; i < 64; i++) { + reg = IXGBE_VMVIR(i); + if (reg & IXGBE_VMVIR_VLANA_DEFAULT) + DPRINTK(PROBE, ERR, "%d, %08X\n", i, + IXGBE_READ_REG(hw, reg)); + } + + /* print Mirroring settings */ + + DPRINTK(PROBE, ERR, "******** Virtualization Registers end ********\n"); + return; +} + #endif /* __VMKLNX__ */ diff --git a/vmkdrivers/src_9/drivers/net/ixgbe/kcompat.h b/vmkdrivers/src_9/drivers/net/ixgbe/kcompat.h index 5b9806f..f0ea846 100644 --- a/vmkdrivers/src_9/drivers/net/ixgbe/kcompat.h +++ b/vmkdrivers/src_9/drivers/net/ixgbe/kcompat.h @@ -1984,10 +1984,6 @@ extern void _kc_print_hex_dump(const char *level, const char *prefix_str, #define ETH_FLAG_LRO NETIF_F_LRO #endif -#ifndef __VMKLNX__ -#define netif_napi_del(_a) do {} while (0) -#endif - #ifndef DMA_BIT_MASK #define DMA_BIT_MASK(n) (((n) == 64) ? DMA_64BIT_MASK : ((1ULL<<(n))-1)) #endif @@ -2148,8 +2144,7 @@ static inline __u32 _kc_ethtool_cmd_speed(struct ethtool_cmd *ep) #endif #endif #endif /* netif_napi_del */ -#endif /* __VMKLNX__ */ - +#endif /* __VMKLNX__*/ #ifdef dma_mapping_error #undef dma_mapping_error #endif diff --git a/vmkdrivers/src_9/drivers/net/mlnx/compat/hash.c b/vmkdrivers/src_9/drivers/net/mlnx/compat/hash.c new file mode 100755 index 0000000..ed38800 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/compat/hash.c @@ -0,0 +1,256 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include "hash.h" + + +/************************************************************************/ +struct hash_node { + unsigned long key; // key for lookup + void *p_data; // pointer to stored data + struct hash_node *p_next; // pointer to next node +}; + + +/************************************************************************/ +#define MINIMUM_HASH_TABLE_SIZE 512 +/* TODO: Need to fix expand latter */ +#ifdef __VMKERNEL_HASH_EXPAND_ENABLE__ +#define EXPAND_HASH_TABLE_LIMIT_ORDER 1 +#endif /* __VMKERNEL_HASH_EXPAND_ENABLE__ */ + + +/************************************************************************/ +static unsigned long hash(hdl_hash_t p_table, unsigned long key) +{ + return (key & p_table->mask); +} + +/************/ +void hash_print(hdl_hash_t p_table) +{ + hash_node_t *p_node; + unsigned long i; + + printk("HASH ID=%p\n", p_table); + // if empty + if (p_table->size == 0) { + printk("HASH is EMPTY!\n"); + return; + } + + printk("HASH size=%lu\n", p_table->size); + printk("HASH mask=%lu\n", p_table->mask); + printk("HASH entries=%lu\n", p_table->entries); + printk("HASH bucket:\n"); + for (i = 0; i < p_table->size; ++i) { + p_node = p_table->bucket[i]; + printk("[%lu] ", i); + while (p_node) { + printk("Key=0x%lx --> ", p_node->key); + p_node = p_node->p_next; + } + printk("\n"); + } +} + +/************/ +int hash_init(hdl_hash_t p_table, unsigned long table_size) +{ + p_table->entries = 0; + p_table->size = 2; + p_table->mask = p_table->size - 1; + + // round to power of 2 + while (p_table->size < table_size) + p_table->size <<= 1; + p_table->mask = p_table->size - 1; + + // allocate + p_table->bucket = (hash_node_t **)kcalloc(p_table->size, + sizeof(hash_node_t *), GFP_KERNEL); + if (!p_table->bucket) + return -ENOMEM; + return 0; +} + +/************/ +void hash_destroy(hdl_hash_t p_table) +{ + hash_node_t *p_node, *p_prev_node; + unsigned long i; + + for (i = 0; i < p_table->size; ++i) { + p_node = p_table->bucket[i]; + while (p_node) { + p_prev_node = p_node; + p_node = p_node->p_next; + kfree(p_prev_node); + } + } + kfree(p_table->bucket); + memset(p_table, 0, sizeof(struct hash_table)); +} + +/************/ +#ifdef __VMKERNEL_HASH_EXPAND_ENABLE__ +static int hash_expand(hdl_hash_t p_table) +{ + hash_node_t **prev_bucket; + hash_node_t *p_prev_node, *p_tmp_node; + unsigned long prev_size, hash_entry, i; + int rc = 0; + + + prev_bucket = p_table->bucket; + prev_size = p_table->size; + + if ((rc = hash_init(p_table, (prev_size << 1))) != 0); + return rc; + for (i = 0; i < prev_size; ++i) { + p_prev_node = prev_bucket[i]; + // we have several nodes in this hash entry + while (p_prev_node) { + p_tmp_node = p_prev_node; + p_prev_node = p_prev_node->p_next; + hash_entry = hash(p_table, p_tmp_node->key); + p_tmp_node->p_next = p_table->bucket[hash_entry]; + p_table->bucket[hash_entry] = p_tmp_node; + ++p_table->entries; + } + } + + // free only the previous bucket array, not the nodes + // because we will use the nodes pointers in new large hash + kfree(prev_bucket); + return 0; +} +#endif /* __VMKERNEL_HASH_EXPAND_ENABLE__ */ + +/************/ +void * hash_lookup(hdl_hash_t p_table, unsigned long key) +{ + hash_node_t *p_node; + unsigned long hash_entry; + + // if empty + if (p_table->size == 0) + return NULL; + + hash_entry = hash(p_table, key); + for (p_node = p_table->bucket[hash_entry]; p_node; + p_node = p_node->p_next) { + if (key == p_node->key) + break; + } + return (p_node ? p_node->p_data : NULL); +} + +/************/ +int hash_insert(hdl_hash_t p_table, unsigned long key, void *p_data) +{ + void *p_tmp_data; + hash_node_t *p_node; + unsigned long hash_entry; + int rc = 0; + + // if empty + if (!p_table->size) { + rc = hash_init(p_table, MINIMUM_HASH_TABLE_SIZE); + if (rc) + return rc; + + } + + // if data not valid + if (!p_data) + return -EINVAL; + + // maybe already exists + p_tmp_data = hash_lookup(p_table, key); + if (p_tmp_data) + return -EEXIST; + +#ifdef __VMKERNEL_HASH_EXPAND_ENABLE__ + // maybe we need to expand + while (p_table->entries >= (p_table->size >> EXPAND_HASH_TABLE_LIMIT_ORDER)) { + if ((rc = hash_expand(p_table)) != 0) + return rc; + } +#endif /* __VMKERNEL_HASH_EXPAND_ENABLE__ */ + + // allocate memory for new entry + p_node = (hash_node_t *)kmalloc(sizeof(hash_node_t), GFP_KERNEL); + if (!p_node) + return -ENOMEM; + + // insert the new entry + p_node->p_data = p_data; + p_node->key = key; + hash_entry = hash(p_table, key); + p_node->p_next = p_table->bucket[hash_entry]; + p_table->bucket[hash_entry] = p_node; + ++p_table->entries; + return 0; +} + +/************/ +void * hash_delete(hdl_hash_t p_table, unsigned long key) +{ + hash_node_t *p_node, *p_prev_node; + void *p_data; + unsigned long hash_entry; + + // if empty + if (!p_table->size) { + return NULL; + } + + // find what to remove + hash_entry = hash(p_table, key); + for (p_node = p_table->bucket[hash_entry]; p_node; + p_node = p_node->p_next) { + if (key == p_node->key) + break; + } + if (!p_node) + return NULL; // nothing to remove + + // remove the selected node + if (p_node == p_table->bucket[hash_entry]) { + p_table->bucket[hash_entry] = p_node->p_next; + goto free_node; + } + for (p_prev_node = p_table->bucket[hash_entry]; + p_prev_node && p_prev_node->p_next; + p_prev_node = p_prev_node->p_next) { + if (p_prev_node->p_next == p_node) + break; + } + p_prev_node->p_next = p_node->p_next; + +free_node: + p_data = p_node->p_data; + kfree(p_node); + + /* + * TODO: maybe we will want to implement shrink of the hash + */ + // if empty + if (--p_table->entries == 0) + hash_destroy(p_table); + + return p_data; +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/compat/hash.h b/vmkdrivers/src_9/drivers/net/mlnx/compat/hash.h new file mode 100755 index 0000000..300bc33 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/compat/hash.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _MLNX_HASH_H +#define _MLNX_HASH_H + + +/************************************************************************/ +typedef struct hash_node hash_node_t; + +struct hash_table { + hash_node_t **bucket; // the hash array + unsigned long size; // size of the array + unsigned long entries; // number of used entries in hash + unsigned long mask; // used to select bits for hashing +}; + +typedef struct hash_table * hdl_hash_t; + + +/************************************************************************/ +void hash_print(hdl_hash_t p_table); +int hash_init(hdl_hash_t p_table, unsigned long table_size); +void hash_destroy(hdl_hash_t p_table); +void * hash_lookup(hdl_hash_t p_table, unsigned long key); +int hash_insert(hdl_hash_t p_table, unsigned long key, void *p_data); +void * hash_delete(hdl_hash_t p_table, unsigned long key); + + +#endif /* _MLNX_HASH_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/compat/linux/lib/bitmap.c b/vmkdrivers/src_9/drivers/net/mlnx/compat/linux/lib/bitmap.c new file mode 100755 index 0000000..8c3390f --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/compat/linux/lib/bitmap.c @@ -0,0 +1,1238 @@ +/* + * lib/bitmap.c + * Helper functions for bitmap.h. + * + * This source code is licensed under the GNU General Public License, + * Version 2. See the file COPYING for more details. + */ +#include +#include +#include +#include +#include +#include + +/* + * bitmaps provide an array of bits, implemented using an an + * array of unsigned longs. The number of valid bits in a + * given bitmap does _not_ need to be an exact multiple of + * BITS_PER_LONG. + * + * The possible unused bits in the last, partially used word + * of a bitmap are 'don't care'. The implementation makes + * no particular effort to keep them zero. It ensures that + * their value will not affect the results of any operation. + * The bitmap operations that return Boolean (bitmap_empty, + * for example) or scalar (bitmap_weight, for example) results + * carefully filter out these unused bits from impacting their + * results. + * + * These operations actually hold to a slightly stronger rule: + * if you don't input any bitmaps to these ops that have some + * unused bits set, then they won't output any set unused bits + * in output bitmaps. + * + * The byte ordering of bitmaps is more natural on little + * endian architectures. See the big-endian headers + * include/asm-ppc64/bitops.h and include/asm-s390/bitops.h + * for the best explanations of this ordering. + */ + +int __bitmap_empty(const unsigned long *bitmap, int bits) +{ + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + if (bitmap[k]) + return 0; + + if (bits % BITS_PER_LONG) + if (bitmap[k] & BITMAP_LAST_WORD_MASK(bits)) + return 0; + + return 1; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_empty); +#endif /* NOT __VMKERNEL_MODULE__ */ + +int __bitmap_full(const unsigned long *bitmap, int bits) +{ + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + if (~bitmap[k]) + return 0; + + if (bits % BITS_PER_LONG) + if (~bitmap[k] & BITMAP_LAST_WORD_MASK(bits)) + return 0; + + return 1; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_full); +#endif /* NOT __VMKERNEL_MODULE__ */ + +int __bitmap_equal(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + if (bitmap1[k] != bitmap2[k]) + return 0; + + if (bits % BITS_PER_LONG) + if ((bitmap1[k] ^ bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits)) + return 0; + + return 1; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_equal); +#endif /* NOT __VMKERNEL_MODULE__ */ + +void __bitmap_complement(unsigned long *dst, const unsigned long *src, int bits) +{ + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + dst[k] = ~src[k]; + + if (bits % BITS_PER_LONG) + dst[k] = ~src[k] & BITMAP_LAST_WORD_MASK(bits); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_complement); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * __bitmap_shift_right - logical right shift of the bits in a bitmap + * @dst : destination bitmap + * @src : source bitmap + * @shift : shift by this many bits + * @bits : bitmap size, in bits + * + * Shifting right (dividing) means moving bits in the MS -> LS bit + * direction. Zeros are fed into the vacated MS positions and the + * LS bits shifted off the bottom are lost. + */ +void __bitmap_shift_right(unsigned long *dst, + const unsigned long *src, int shift, int bits) +{ + int k, lim = BITS_TO_LONGS(bits), left = bits % BITS_PER_LONG; + int off = shift/BITS_PER_LONG, rem = shift % BITS_PER_LONG; + unsigned long mask = (1UL << left) - 1; + for (k = 0; off + k < lim; ++k) { + unsigned long upper, lower; + + /* + * If shift is not word aligned, take lower rem bits of + * word above and make them the top rem bits of result. + */ + if (!rem || off + k + 1 >= lim) + upper = 0; + else { + upper = src[off + k + 1]; + if (off + k + 1 == lim - 1 && left) + upper &= mask; + } + lower = src[off + k]; + if (left && off + k == lim - 1) + lower &= mask; + dst[k] = upper << (BITS_PER_LONG - rem) | lower >> rem; + if (left && k == lim - 1) + dst[k] &= mask; + } + if (off) + memset(&dst[lim - off], 0, off*sizeof(unsigned long)); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_shift_right); +#endif /* NOT __VMKERNEL_MODULE__ */ + + +/** + * __bitmap_shift_left - logical left shift of the bits in a bitmap + * @dst : destination bitmap + * @src : source bitmap + * @shift : shift by this many bits + * @bits : bitmap size, in bits + * + * Shifting left (multiplying) means moving bits in the LS -> MS + * direction. Zeros are fed into the vacated LS bit positions + * and those MS bits shifted off the top are lost. + */ + +void __bitmap_shift_left(unsigned long *dst, + const unsigned long *src, int shift, int bits) +{ + int k, lim = BITS_TO_LONGS(bits), left = bits % BITS_PER_LONG; + int off = shift/BITS_PER_LONG, rem = shift % BITS_PER_LONG; + for (k = lim - off - 1; k >= 0; --k) { + unsigned long upper, lower; + + /* + * If shift is not word aligned, take upper rem bits of + * word below and make them the bottom rem bits of result. + */ + if (rem && k > 0) + lower = src[k - 1]; + else + lower = 0; + upper = src[k]; + if (left && k == lim - 1) + upper &= (1UL << left) - 1; + dst[k + off] = lower >> (BITS_PER_LONG - rem) | upper << rem; + if (left && k + off == lim - 1) + dst[k + off] &= (1UL << left) - 1; + } + if (off) + memset(dst, 0, off*sizeof(unsigned long)); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_shift_left); +#endif /* NOT __VMKERNEL_MODULE__ */ + +void __bitmap_and(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k; + int nr = BITS_TO_LONGS(bits); + + for (k = 0; k < nr; k++) + dst[k] = bitmap1[k] & bitmap2[k]; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_and); +#endif /* NOT __VMKERNEL_MODULE__ */ + +void __bitmap_or(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k; + int nr = BITS_TO_LONGS(bits); + + for (k = 0; k < nr; k++) + dst[k] = bitmap1[k] | bitmap2[k]; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_or); +#endif /* NOT __VMKERNEL_MODULE__ */ + +void __bitmap_xor(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k; + int nr = BITS_TO_LONGS(bits); + + for (k = 0; k < nr; k++) + dst[k] = bitmap1[k] ^ bitmap2[k]; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_xor); +#endif /* NOT __VMKERNEL_MODULE__ */ + +void __bitmap_andnot(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k; + int nr = BITS_TO_LONGS(bits); + + for (k = 0; k < nr; k++) + dst[k] = bitmap1[k] & ~bitmap2[k]; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_andnot); +#endif /* NOT __VMKERNEL_MODULE__ */ + +int __bitmap_intersects(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + if (bitmap1[k] & bitmap2[k]) + return 1; + + if (bits % BITS_PER_LONG) + if ((bitmap1[k] & bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits)) + return 1; + return 0; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_intersects); +#endif /* NOT __VMKERNEL_MODULE__ */ + +int __bitmap_subset(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + if (bitmap1[k] & ~bitmap2[k]) + return 0; + + if (bits % BITS_PER_LONG) + if ((bitmap1[k] & ~bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits)) + return 0; + return 1; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_subset); +#endif /* NOT __VMKERNEL_MODULE__ */ + +int __bitmap_weight(const unsigned long *bitmap, int bits) +{ + int k, w = 0, lim = bits/BITS_PER_LONG; + + for (k = 0; k < lim; k++) + w += hweight_long(bitmap[k]); + + if (bits % BITS_PER_LONG) + w += hweight_long(bitmap[k] & BITMAP_LAST_WORD_MASK(bits)); + + return w; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_weight); +#endif /* NOT __VMKERNEL_MODULE__ */ + +void bitmap_set(unsigned long *map, int start, int nr) +{ + unsigned long *p = map + BIT_WORD(start); + const int size = start + nr; + int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG); + unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start); + + while (nr - bits_to_set >= 0) { + *p |= mask_to_set; + nr -= bits_to_set; + bits_to_set = BITS_PER_LONG; + mask_to_set = ~0UL; + p++; + } + if (nr) { + mask_to_set &= BITMAP_LAST_WORD_MASK(size); + *p |= mask_to_set; + } +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_set); +#endif /* NOT __VMKERNEL_MODULE__ */ + +void bitmap_clear(unsigned long *map, int start, int nr) +{ + unsigned long *p = map + BIT_WORD(start); + const int size = start + nr; + int bits_to_clear = BITS_PER_LONG - (start % BITS_PER_LONG); + unsigned long mask_to_clear = BITMAP_FIRST_WORD_MASK(start); + + while (nr - bits_to_clear >= 0) { + *p &= ~mask_to_clear; + nr -= bits_to_clear; + bits_to_clear = BITS_PER_LONG; + mask_to_clear = ~0UL; + p++; + } + if (nr) { + mask_to_clear &= BITMAP_LAST_WORD_MASK(size); + *p &= ~mask_to_clear; + } +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_clear); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/* + * bitmap_find_next_zero_area - find a contiguous aligned zero area + * @map: The address to base the search on + * @size: The bitmap size in bits + * @start: The bitnumber to start searching at + * @nr: The number of zeroed bits we're looking for + * @align_mask: Alignment mask for zero area + * + * The @align_mask should be one less than a power of 2; the effect is that + * the bit offset of all zero areas this function finds is multiples of that + * power of 2. A @align_mask of 0 means no alignment is required. + */ +unsigned long bitmap_find_next_zero_area(unsigned long *map, + unsigned long size, + unsigned long start, + unsigned int nr, + unsigned long align_mask) +{ + unsigned long index, end, i; +again: + index = find_next_zero_bit(map, size, start); + + /* Align allocation */ + index = __ALIGN_MASK(index, align_mask); + + end = index + nr; + if (end > size) + return end; + i = find_next_bit(map, end, index); + if (i < end) { + start = i + 1; + goto again; + } + return index; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_find_next_zero_area); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/* + * Bitmap printing & parsing functions: first version by Bill Irwin, + * second version by Paul Jackson, third by Joe Korty. + */ + +#define CHUNKSZ 32 +#define nbits_to_hold_value(val) fls(val) +#define BASEDEC 10 /* fancier cpuset lists input in decimal */ + +/** + * bitmap_scnprintf - convert bitmap to an ASCII hex string. + * @buf: byte buffer into which string is placed + * @buflen: reserved size of @buf, in bytes + * @maskp: pointer to bitmap to convert + * @nmaskbits: size of bitmap, in bits + * + * Exactly @nmaskbits bits are displayed. Hex digits are grouped into + * comma-separated sets of eight digits per set. + */ +int bitmap_scnprintf(char *buf, unsigned int buflen, + const unsigned long *maskp, int nmaskbits) +{ + int i, word, bit, len = 0; + unsigned long val; + const char *sep = ""; + int chunksz; + u32 chunkmask; + + chunksz = nmaskbits & (CHUNKSZ - 1); + if (chunksz == 0) + chunksz = CHUNKSZ; + + i = ALIGN(nmaskbits, CHUNKSZ) - CHUNKSZ; + for (; i >= 0; i -= CHUNKSZ) { + chunkmask = ((1ULL << chunksz) - 1); + word = i / BITS_PER_LONG; + bit = i % BITS_PER_LONG; + val = (maskp[word] >> bit) & chunkmask; + len += scnprintf(buf+len, buflen-len, "%s%0*lx", sep, + (chunksz+3)/4, val); + chunksz = CHUNKSZ; + sep = ","; + } + return len; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_scnprintf); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * __bitmap_parse - convert an ASCII hex string into a bitmap. + * @buf: pointer to buffer containing string. + * @buflen: buffer size in bytes. If string is smaller than this + * then it must be terminated with a \0. + * @is_user: location of buffer, 0 indicates kernel space + * @maskp: pointer to bitmap array that will contain result. + * @nmaskbits: size of bitmap, in bits. + * + * Commas group hex digits into chunks. Each chunk defines exactly 32 + * bits of the resultant bitmask. No chunk may specify a value larger + * than 32 bits (%-EOVERFLOW), and if a chunk specifies a smaller value + * then leading 0-bits are prepended. %-EINVAL is returned for illegal + * characters and for grouping errors such as "1,,5", ",44", "," and "". + * Leading and trailing whitespace accepted, but not embedded whitespace. + */ +int __bitmap_parse(const char *buf, unsigned int buflen, + int is_user, unsigned long *maskp, + int nmaskbits) +{ + int c, old_c, totaldigits, ndigits, nchunks, nbits; + u32 chunk; + const char __user *ubuf = buf; + + bitmap_zero(maskp, nmaskbits); + + nchunks = nbits = totaldigits = c = 0; + do { + chunk = ndigits = 0; + + /* Get the next chunk of the bitmap */ + while (buflen) { + old_c = c; + if (is_user) { + if (__get_user(c, ubuf++)) + return -EFAULT; + } + else + c = *buf++; + buflen--; + if (isspace(c)) + continue; + + /* + * If the last character was a space and the current + * character isn't '\0', we've got embedded whitespace. + * This is a no-no, so throw an error. + */ + if (totaldigits && c && isspace(old_c)) + return -EINVAL; + + /* A '\0' or a ',' signal the end of the chunk */ + if (c == '\0' || c == ',') + break; + + if (!isxdigit(c)) + return -EINVAL; + + /* + * Make sure there are at least 4 free bits in 'chunk'. + * If not, this hexdigit will overflow 'chunk', so + * throw an error. + */ + if (chunk & ~((1UL << (CHUNKSZ - 4)) - 1)) + return -EOVERFLOW; + + chunk = (chunk << 4) | hex_to_bin(c); + ndigits++; totaldigits++; + } + if (ndigits == 0) + return -EINVAL; + if (nchunks == 0 && chunk == 0) + continue; + + __bitmap_shift_left(maskp, maskp, CHUNKSZ, nmaskbits); + *maskp |= chunk; + nchunks++; + nbits += (nchunks == 1) ? nbits_to_hold_value(chunk) : CHUNKSZ; + if (nbits > nmaskbits) + return -EOVERFLOW; + } while (buflen && c == ','); + + return 0; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(__bitmap_parse); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * bitmap_parse_user - convert an ASCII hex string in a user buffer into a bitmap + * + * @ubuf: pointer to user buffer containing string. + * @ulen: buffer size in bytes. If string is smaller than this + * then it must be terminated with a \0. + * @maskp: pointer to bitmap array that will contain result. + * @nmaskbits: size of bitmap, in bits. + * + * Wrapper for __bitmap_parse(), providing it with user buffer. + * + * We cannot have this as an inline function in bitmap.h because it needs + * linux/uaccess.h to get the access_ok() declaration and this causes + * cyclic dependencies. + */ +int bitmap_parse_user(const char __user *ubuf, + unsigned int ulen, unsigned long *maskp, + int nmaskbits) +{ + if (!access_ok(VERIFY_READ, ubuf, ulen)) + return -EFAULT; + return __bitmap_parse((const char *)ubuf, ulen, 1, maskp, nmaskbits); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_parse_user); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/* + * bscnl_emit(buf, buflen, rbot, rtop, bp) + * + * Helper routine for bitmap_scnlistprintf(). Write decimal number + * or range to buf, suppressing output past buf+buflen, with optional + * comma-prefix. Return len of what would be written to buf, if it + * all fit. + */ +static inline int bscnl_emit(char *buf, int buflen, int rbot, int rtop, int len) +{ + if (len > 0) + len += scnprintf(buf + len, buflen - len, ","); + if (rbot == rtop) + len += scnprintf(buf + len, buflen - len, "%d", rbot); + else + len += scnprintf(buf + len, buflen - len, "%d-%d", rbot, rtop); + return len; +} + +/** + * bitmap_scnlistprintf - convert bitmap to list format ASCII string + * @buf: byte buffer into which string is placed + * @buflen: reserved size of @buf, in bytes + * @maskp: pointer to bitmap to convert + * @nmaskbits: size of bitmap, in bits + * + * Output format is a comma-separated list of decimal numbers and + * ranges. Consecutively set bits are shown as two hyphen-separated + * decimal numbers, the smallest and largest bit numbers set in + * the range. Output format is compatible with the format + * accepted as input by bitmap_parselist(). + * + * The return value is the number of characters which would be + * generated for the given input, excluding the trailing '\0', as + * per ISO C99. + */ +int bitmap_scnlistprintf(char *buf, unsigned int buflen, + const unsigned long *maskp, int nmaskbits) +{ + int len = 0; + /* current bit is 'cur', most recently seen range is [rbot, rtop] */ + int cur, rbot, rtop; + + if (buflen == 0) + return 0; + buf[0] = 0; + + rbot = cur = find_first_bit(maskp, nmaskbits); + while (cur < nmaskbits) { + rtop = cur; + cur = find_next_bit(maskp, nmaskbits, cur+1); + if (cur >= nmaskbits || cur > rtop + 1) { + len = bscnl_emit(buf, buflen, rbot, rtop, len); + rbot = cur; + } + } + return len; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_scnlistprintf); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * __bitmap_parselist - convert list format ASCII string to bitmap + * @buf: read nul-terminated user string from this buffer + * @buflen: buffer size in bytes. If string is smaller than this + * then it must be terminated with a \0. + * @is_user: location of buffer, 0 indicates kernel space + * @maskp: write resulting mask here + * @nmaskbits: number of bits in mask to be written + * + * Input format is a comma-separated list of decimal numbers and + * ranges. Consecutively set bits are shown as two hyphen-separated + * decimal numbers, the smallest and largest bit numbers set in + * the range. + * + * Returns 0 on success, -errno on invalid input strings. + * Error values: + * %-EINVAL: second number in range smaller than first + * %-EINVAL: invalid character in string + * %-ERANGE: bit number specified too large for mask + */ +static int __bitmap_parselist(const char *buf, unsigned int buflen, + int is_user, unsigned long *maskp, + int nmaskbits) +{ + unsigned a, b; + int c, old_c, totaldigits; + const char __user *ubuf = buf; + int exp_digit, in_range; + + totaldigits = c = 0; + bitmap_zero(maskp, nmaskbits); + do { + exp_digit = 1; + in_range = 0; + a = b = 0; + + /* Get the next cpu# or a range of cpu#'s */ + while (buflen) { + old_c = c; + if (is_user) { + if (__get_user(c, ubuf++)) + return -EFAULT; + } else + c = *buf++; + buflen--; + if (isspace(c)) + continue; + + /* + * If the last character was a space and the current + * character isn't '\0', we've got embedded whitespace. + * This is a no-no, so throw an error. + */ + if (totaldigits && c && isspace(old_c)) + return -EINVAL; + + /* A '\0' or a ',' signal the end of a cpu# or range */ + if (c == '\0' || c == ',') + break; + + if (c == '-') { + if (exp_digit || in_range) + return -EINVAL; + b = 0; + in_range = 1; + exp_digit = 1; + continue; + } + + if (!isdigit(c)) + return -EINVAL; + + b = b * 10 + (c - '0'); + if (!in_range) + a = b; + exp_digit = 0; + totaldigits++; + } + if (!(a <= b)) + return -EINVAL; + if (b >= nmaskbits) + return -ERANGE; + while (a <= b) { + set_bit(a, maskp); + a++; + } + } while (buflen && c == ','); + return 0; +} + +int bitmap_parselist(const char *bp, unsigned long *maskp, int nmaskbits) +{ + char *nl = strchr(bp, '\n'); + int len; + + if (nl) + len = nl - bp; + else + len = strlen(bp); + + return __bitmap_parselist(bp, len, 0, maskp, nmaskbits); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_parselist); +#endif /* NOT __VMKERNEL_MODULE__ */ + + +/** + * bitmap_parselist_user() + * + * @ubuf: pointer to user buffer containing string. + * @ulen: buffer size in bytes. If string is smaller than this + * then it must be terminated with a \0. + * @maskp: pointer to bitmap array that will contain result. + * @nmaskbits: size of bitmap, in bits. + * + * Wrapper for bitmap_parselist(), providing it with user buffer. + * + * We cannot have this as an inline function in bitmap.h because it needs + * linux/uaccess.h to get the access_ok() declaration and this causes + * cyclic dependencies. + */ +int bitmap_parselist_user(const char __user *ubuf, + unsigned int ulen, unsigned long *maskp, + int nmaskbits) +{ + if (!access_ok(VERIFY_READ, ubuf, ulen)) + return -EFAULT; + return __bitmap_parselist((const char *)ubuf, + ulen, 1, maskp, nmaskbits); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_parselist_user); +#endif /* NOT __VMKERNEL_MODULE__ */ + + +/** + * bitmap_pos_to_ord - find ordinal of set bit at given position in bitmap + * @buf: pointer to a bitmap + * @pos: a bit position in @buf (0 <= @pos < @bits) + * @bits: number of valid bit positions in @buf + * + * Map the bit at position @pos in @buf (of length @bits) to the + * ordinal of which set bit it is. If it is not set or if @pos + * is not a valid bit position, map to -1. + * + * If for example, just bits 4 through 7 are set in @buf, then @pos + * values 4 through 7 will get mapped to 0 through 3, respectively, + * and other @pos values will get mapped to 0. When @pos value 7 + * gets mapped to (returns) @ord value 3 in this example, that means + * that bit 7 is the 3rd (starting with 0th) set bit in @buf. + * + * The bit positions 0 through @bits are valid positions in @buf. + */ +static int bitmap_pos_to_ord(const unsigned long *buf, int pos, int bits) +{ + int i, ord; + + if (pos < 0 || pos >= bits || !test_bit(pos, buf)) + return -1; + + i = find_first_bit(buf, bits); + ord = 0; + while (i < pos) { + i = find_next_bit(buf, bits, i + 1); + ord++; + } + BUG_ON(i != pos); + + return ord; +} + +/** + * bitmap_ord_to_pos - find position of n-th set bit in bitmap + * @buf: pointer to bitmap + * @ord: ordinal bit position (n-th set bit, n >= 0) + * @bits: number of valid bit positions in @buf + * + * Map the ordinal offset of bit @ord in @buf to its position in @buf. + * Value of @ord should be in range 0 <= @ord < weight(buf), else + * results are undefined. + * + * If for example, just bits 4 through 7 are set in @buf, then @ord + * values 0 through 3 will get mapped to 4 through 7, respectively, + * and all other @ord values return undefined values. When @ord value 3 + * gets mapped to (returns) @pos value 7 in this example, that means + * that the 3rd set bit (starting with 0th) is at position 7 in @buf. + * + * The bit positions 0 through @bits are valid positions in @buf. + */ +int bitmap_ord_to_pos(const unsigned long *buf, int ord, int bits) +{ + int pos = 0; + + if (ord >= 0 && ord < bits) { + int i; + + for (i = find_first_bit(buf, bits); + i < bits && ord > 0; + i = find_next_bit(buf, bits, i + 1)) + ord--; + if (i < bits && ord == 0) + pos = i; + } + + return pos; +} + +/** + * bitmap_remap - Apply map defined by a pair of bitmaps to another bitmap + * @dst: remapped result + * @src: subset to be remapped + * @old: defines domain of map + * @new: defines range of map + * @bits: number of bits in each of these bitmaps + * + * Let @old and @new define a mapping of bit positions, such that + * whatever position is held by the n-th set bit in @old is mapped + * to the n-th set bit in @new. In the more general case, allowing + * for the possibility that the weight 'w' of @new is less than the + * weight of @old, map the position of the n-th set bit in @old to + * the position of the m-th set bit in @new, where m == n % w. + * + * If either of the @old and @new bitmaps are empty, or if @src and + * @dst point to the same location, then this routine copies @src + * to @dst. + * + * The positions of unset bits in @old are mapped to themselves + * (the identify map). + * + * Apply the above specified mapping to @src, placing the result in + * @dst, clearing any bits previously set in @dst. + * + * For example, lets say that @old has bits 4 through 7 set, and + * @new has bits 12 through 15 set. This defines the mapping of bit + * position 4 to 12, 5 to 13, 6 to 14 and 7 to 15, and of all other + * bit positions unchanged. So if say @src comes into this routine + * with bits 1, 5 and 7 set, then @dst should leave with bits 1, + * 13 and 15 set. + */ +void bitmap_remap(unsigned long *dst, const unsigned long *src, + const unsigned long *old, const unsigned long *new, + int bits) +{ + int oldbit, w; + + if (dst == src) /* following doesn't handle inplace remaps */ + return; + bitmap_zero(dst, bits); + + w = bitmap_weight(new, bits); + for_each_set_bit(oldbit, src, bits) { + int n = bitmap_pos_to_ord(old, oldbit, bits); + + if (n < 0 || w == 0) + set_bit(oldbit, dst); /* identity map */ + else + set_bit(bitmap_ord_to_pos(new, n % w, bits), dst); + } +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_remap); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * bitmap_bitremap - Apply map defined by a pair of bitmaps to a single bit + * @oldbit: bit position to be mapped + * @old: defines domain of map + * @new: defines range of map + * @bits: number of bits in each of these bitmaps + * + * Let @old and @new define a mapping of bit positions, such that + * whatever position is held by the n-th set bit in @old is mapped + * to the n-th set bit in @new. In the more general case, allowing + * for the possibility that the weight 'w' of @new is less than the + * weight of @old, map the position of the n-th set bit in @old to + * the position of the m-th set bit in @new, where m == n % w. + * + * The positions of unset bits in @old are mapped to themselves + * (the identify map). + * + * Apply the above specified mapping to bit position @oldbit, returning + * the new bit position. + * + * For example, lets say that @old has bits 4 through 7 set, and + * @new has bits 12 through 15 set. This defines the mapping of bit + * position 4 to 12, 5 to 13, 6 to 14 and 7 to 15, and of all other + * bit positions unchanged. So if say @oldbit is 5, then this routine + * returns 13. + */ +int bitmap_bitremap(int oldbit, const unsigned long *old, + const unsigned long *new, int bits) +{ + int w = bitmap_weight(new, bits); + int n = bitmap_pos_to_ord(old, oldbit, bits); + if (n < 0 || w == 0) + return oldbit; + else + return bitmap_ord_to_pos(new, n % w, bits); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_bitremap); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * bitmap_onto - translate one bitmap relative to another + * @dst: resulting translated bitmap + * @orig: original untranslated bitmap + * @relmap: bitmap relative to which translated + * @bits: number of bits in each of these bitmaps + * + * Set the n-th bit of @dst iff there exists some m such that the + * n-th bit of @relmap is set, the m-th bit of @orig is set, and + * the n-th bit of @relmap is also the m-th _set_ bit of @relmap. + * (If you understood the previous sentence the first time your + * read it, you're overqualified for your current job.) + * + * In other words, @orig is mapped onto (surjectively) @dst, + * using the the map { | the n-th bit of @relmap is the + * m-th set bit of @relmap }. + * + * Any set bits in @orig above bit number W, where W is the + * weight of (number of set bits in) @relmap are mapped nowhere. + * In particular, if for all bits m set in @orig, m >= W, then + * @dst will end up empty. In situations where the possibility + * of such an empty result is not desired, one way to avoid it is + * to use the bitmap_fold() operator, below, to first fold the + * @orig bitmap over itself so that all its set bits x are in the + * range 0 <= x < W. The bitmap_fold() operator does this by + * setting the bit (m % W) in @dst, for each bit (m) set in @orig. + * + * Example [1] for bitmap_onto(): + * Let's say @relmap has bits 30-39 set, and @orig has bits + * 1, 3, 5, 7, 9 and 11 set. Then on return from this routine, + * @dst will have bits 31, 33, 35, 37 and 39 set. + * + * When bit 0 is set in @orig, it means turn on the bit in + * @dst corresponding to whatever is the first bit (if any) + * that is turned on in @relmap. Since bit 0 was off in the + * above example, we leave off that bit (bit 30) in @dst. + * + * When bit 1 is set in @orig (as in the above example), it + * means turn on the bit in @dst corresponding to whatever + * is the second bit that is turned on in @relmap. The second + * bit in @relmap that was turned on in the above example was + * bit 31, so we turned on bit 31 in @dst. + * + * Similarly, we turned on bits 33, 35, 37 and 39 in @dst, + * because they were the 4th, 6th, 8th and 10th set bits + * set in @relmap, and the 4th, 6th, 8th and 10th bits of + * @orig (i.e. bits 3, 5, 7 and 9) were also set. + * + * When bit 11 is set in @orig, it means turn on the bit in + * @dst corresponding to whatever is the twelfth bit that is + * turned on in @relmap. In the above example, there were + * only ten bits turned on in @relmap (30..39), so that bit + * 11 was set in @orig had no affect on @dst. + * + * Example [2] for bitmap_fold() + bitmap_onto(): + * Let's say @relmap has these ten bits set: + * 40 41 42 43 45 48 53 61 74 95 + * (for the curious, that's 40 plus the first ten terms of the + * Fibonacci sequence.) + * + * Further lets say we use the following code, invoking + * bitmap_fold() then bitmap_onto, as suggested above to + * avoid the possitility of an empty @dst result: + * + * unsigned long *tmp; // a temporary bitmap's bits + * + * bitmap_fold(tmp, orig, bitmap_weight(relmap, bits), bits); + * bitmap_onto(dst, tmp, relmap, bits); + * + * Then this table shows what various values of @dst would be, for + * various @orig's. I list the zero-based positions of each set bit. + * The tmp column shows the intermediate result, as computed by + * using bitmap_fold() to fold the @orig bitmap modulo ten + * (the weight of @relmap). + * + * @orig tmp @dst + * 0 0 40 + * 1 1 41 + * 9 9 95 + * 10 0 40 (*) + * 1 3 5 7 1 3 5 7 41 43 48 61 + * 0 1 2 3 4 0 1 2 3 4 40 41 42 43 45 + * 0 9 18 27 0 9 8 7 40 61 74 95 + * 0 10 20 30 0 40 + * 0 11 22 33 0 1 2 3 40 41 42 43 + * 0 12 24 36 0 2 4 6 40 42 45 53 + * 78 102 211 1 2 8 41 42 74 (*) + * + * (*) For these marked lines, if we hadn't first done bitmap_fold() + * into tmp, then the @dst result would have been empty. + * + * If either of @orig or @relmap is empty (no set bits), then @dst + * will be returned empty. + * + * If (as explained above) the only set bits in @orig are in positions + * m where m >= W, (where W is the weight of @relmap) then @dst will + * once again be returned empty. + * + * All bits in @dst not set by the above rule are cleared. + */ +void bitmap_onto(unsigned long *dst, const unsigned long *orig, + const unsigned long *relmap, int bits) +{ + int n, m; /* same meaning as in above comment */ + + if (dst == orig) /* following doesn't handle inplace mappings */ + return; + bitmap_zero(dst, bits); + + /* + * The following code is a more efficient, but less + * obvious, equivalent to the loop: + * for (m = 0; m < bitmap_weight(relmap, bits); m++) { + * n = bitmap_ord_to_pos(orig, m, bits); + * if (test_bit(m, orig)) + * set_bit(n, dst); + * } + */ + + m = 0; + for_each_set_bit(n, relmap, bits) { + /* m == bitmap_pos_to_ord(relmap, n, bits) */ + if (test_bit(m, orig)) + set_bit(n, dst); + m++; + } +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_onto); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * bitmap_fold - fold larger bitmap into smaller, modulo specified size + * @dst: resulting smaller bitmap + * @orig: original larger bitmap + * @sz: specified size + * @bits: number of bits in each of these bitmaps + * + * For each bit oldbit in @orig, set bit oldbit mod @sz in @dst. + * Clear all other bits in @dst. See further the comment and + * Example [2] for bitmap_onto() for why and how to use this. + */ +void bitmap_fold(unsigned long *dst, const unsigned long *orig, + int sz, int bits) +{ + int oldbit; + + if (dst == orig) /* following doesn't handle inplace mappings */ + return; + bitmap_zero(dst, bits); + + for_each_set_bit(oldbit, orig, bits) + set_bit(oldbit % sz, dst); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_fold); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/* + * Common code for bitmap_*_region() routines. + * bitmap: array of unsigned longs corresponding to the bitmap + * pos: the beginning of the region + * order: region size (log base 2 of number of bits) + * reg_op: operation(s) to perform on that region of bitmap + * + * Can set, verify and/or release a region of bits in a bitmap, + * depending on which combination of REG_OP_* flag bits is set. + * + * A region of a bitmap is a sequence of bits in the bitmap, of + * some size '1 << order' (a power of two), aligned to that same + * '1 << order' power of two. + * + * Returns 1 if REG_OP_ISFREE succeeds (region is all zero bits). + * Returns 0 in all other cases and reg_ops. + */ + +enum { + REG_OP_ISFREE, /* true if region is all zero bits */ + REG_OP_ALLOC, /* set all bits in region */ + REG_OP_RELEASE, /* clear all bits in region */ +}; + +static int __reg_op(unsigned long *bitmap, int pos, int order, int reg_op) +{ + int nbits_reg; /* number of bits in region */ + int index; /* index first long of region in bitmap */ + int offset; /* bit offset region in bitmap[index] */ + int nlongs_reg; /* num longs spanned by region in bitmap */ + int nbitsinlong; /* num bits of region in each spanned long */ + unsigned long mask; /* bitmask for one long of region */ + int i; /* scans bitmap by longs */ + int ret = 0; /* return value */ + + /* + * Either nlongs_reg == 1 (for small orders that fit in one long) + * or (offset == 0 && mask == ~0UL) (for larger multiword orders.) + */ + nbits_reg = 1 << order; + index = pos / BITS_PER_LONG; + offset = pos - (index * BITS_PER_LONG); + nlongs_reg = BITS_TO_LONGS(nbits_reg); + nbitsinlong = min(nbits_reg, BITS_PER_LONG); + + /* + * Can't do "mask = (1UL << nbitsinlong) - 1", as that + * overflows if nbitsinlong == BITS_PER_LONG. + */ + mask = (1UL << (nbitsinlong - 1)); + mask += mask - 1; + mask <<= offset; + + switch (reg_op) { + case REG_OP_ISFREE: + for (i = 0; i < nlongs_reg; i++) { + if (bitmap[index + i] & mask) + goto done; + } + ret = 1; /* all bits in region free (zero) */ + break; + + case REG_OP_ALLOC: + for (i = 0; i < nlongs_reg; i++) + bitmap[index + i] |= mask; + break; + + case REG_OP_RELEASE: + for (i = 0; i < nlongs_reg; i++) + bitmap[index + i] &= ~mask; + break; + } +done: + return ret; +} + +/** + * bitmap_find_free_region - find a contiguous aligned mem region + * @bitmap: array of unsigned longs corresponding to the bitmap + * @bits: number of bits in the bitmap + * @order: region size (log base 2 of number of bits) to find + * + * Find a region of free (zero) bits in a @bitmap of @bits bits and + * allocate them (set them to one). Only consider regions of length + * a power (@order) of two, aligned to that power of two, which + * makes the search algorithm much faster. + * + * Return the bit offset in bitmap of the allocated region, + * or -errno on failure. + */ +int bitmap_find_free_region(unsigned long *bitmap, int bits, int order) +{ + int pos, end; /* scans bitmap by regions of size order */ + + for (pos = 0 ; (end = pos + (1 << order)) <= bits; pos = end) { + if (!__reg_op(bitmap, pos, order, REG_OP_ISFREE)) + continue; + __reg_op(bitmap, pos, order, REG_OP_ALLOC); + return pos; + } + return -ENOMEM; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_find_free_region); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * bitmap_release_region - release allocated bitmap region + * @bitmap: array of unsigned longs corresponding to the bitmap + * @pos: beginning of bit region to release + * @order: region size (log base 2 of number of bits) to release + * + * This is the complement to __bitmap_find_free_region() and releases + * the found region (by clearing it in the bitmap). + * + * No return value. + */ +void bitmap_release_region(unsigned long *bitmap, int pos, int order) +{ + __reg_op(bitmap, pos, order, REG_OP_RELEASE); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_release_region); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * bitmap_allocate_region - allocate bitmap region + * @bitmap: array of unsigned longs corresponding to the bitmap + * @pos: beginning of bit region to allocate + * @order: region size (log base 2 of number of bits) to allocate + * + * Allocate (set bits in) a specified region of a bitmap. + * + * Return 0 on success, or %-EBUSY if specified region wasn't + * free (not all bits were zero). + */ +int bitmap_allocate_region(unsigned long *bitmap, int pos, int order) +{ + if (!__reg_op(bitmap, pos, order, REG_OP_ISFREE)) + return -EBUSY; + __reg_op(bitmap, pos, order, REG_OP_ALLOC); + return 0; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_allocate_region); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/** + * bitmap_copy_le - copy a bitmap, putting the bits into little-endian order. + * @dst: destination buffer + * @src: bitmap to copy + * @nbits: number of bits in the bitmap + * + * Require nbits % BITS_PER_LONG == 0. + */ +void bitmap_copy_le(void *dst, const unsigned long *src, int nbits) +{ + unsigned long *d = dst; + int i; + + for (i = 0; i < nbits/BITS_PER_LONG; i++) { + if (BITS_PER_LONG == 64) + d[i] = cpu_to_le64(src[i]); + else + d[i] = cpu_to_le32(src[i]); + } +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(bitmap_copy_le); +#endif /* NOT __VMKERNEL_MODULE__ */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/compat/linux/lib/rbtree.c b/vmkdrivers/src_9/drivers/net/mlnx/compat/linux/lib/rbtree.c new file mode 100755 index 0000000..e2b035e --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/compat/linux/lib/rbtree.c @@ -0,0 +1,494 @@ +/* + Red Black Trees + (C) 1999 Andrea Arcangeli + (C) 2002 David Woodhouse + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + linux/lib/rbtree.c +*/ + +#include +#include + +static void __rb_rotate_left(struct rb_node *node, struct rb_root *root) +{ + struct rb_node *right = node->rb_right; + struct rb_node *parent = rb_parent(node); + + if ((node->rb_right = right->rb_left)) + rb_set_parent(right->rb_left, node); + right->rb_left = node; + + rb_set_parent(right, parent); + + if (parent) + { + if (node == parent->rb_left) + parent->rb_left = right; + else + parent->rb_right = right; + } + else + root->rb_node = right; + rb_set_parent(node, right); +} + +static void __rb_rotate_right(struct rb_node *node, struct rb_root *root) +{ + struct rb_node *left = node->rb_left; + struct rb_node *parent = rb_parent(node); + + if ((node->rb_left = left->rb_right)) + rb_set_parent(left->rb_right, node); + left->rb_right = node; + + rb_set_parent(left, parent); + + if (parent) + { + if (node == parent->rb_right) + parent->rb_right = left; + else + parent->rb_left = left; + } + else + root->rb_node = left; + rb_set_parent(node, left); +} + +void rb_insert_color(struct rb_node *node, struct rb_root *root) +{ + struct rb_node *parent, *gparent; + + while ((parent = rb_parent(node)) && rb_is_red(parent)) + { + gparent = rb_parent(parent); + + if (parent == gparent->rb_left) + { + { + register struct rb_node *uncle = gparent->rb_right; + if (uncle && rb_is_red(uncle)) + { + rb_set_black(uncle); + rb_set_black(parent); + rb_set_red(gparent); + node = gparent; + continue; + } + } + + if (parent->rb_right == node) + { + register struct rb_node *tmp; + __rb_rotate_left(parent, root); + tmp = parent; + parent = node; + node = tmp; + } + + rb_set_black(parent); + rb_set_red(gparent); + __rb_rotate_right(gparent, root); + } else { + { + register struct rb_node *uncle = gparent->rb_left; + if (uncle && rb_is_red(uncle)) + { + rb_set_black(uncle); + rb_set_black(parent); + rb_set_red(gparent); + node = gparent; + continue; + } + } + + if (parent->rb_left == node) + { + register struct rb_node *tmp; + __rb_rotate_right(parent, root); + tmp = parent; + parent = node; + node = tmp; + } + + rb_set_black(parent); + rb_set_red(gparent); + __rb_rotate_left(gparent, root); + } + } + + rb_set_black(root->rb_node); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(rb_insert_color); +#endif /* NOT __VMKERNEL_MODULE__ */ + +static void __rb_erase_color(struct rb_node *node, struct rb_node *parent, + struct rb_root *root) +{ + struct rb_node *other; + + while ((!node || rb_is_black(node)) && node != root->rb_node) + { + if (parent->rb_left == node) + { + other = parent->rb_right; + if (rb_is_red(other)) + { + rb_set_black(other); + rb_set_red(parent); + __rb_rotate_left(parent, root); + other = parent->rb_right; + } + if ((!other->rb_left || rb_is_black(other->rb_left)) && + (!other->rb_right || rb_is_black(other->rb_right))) + { + rb_set_red(other); + node = parent; + parent = rb_parent(node); + } + else + { + if (!other->rb_right || rb_is_black(other->rb_right)) + { + rb_set_black(other->rb_left); + rb_set_red(other); + __rb_rotate_right(other, root); + other = parent->rb_right; + } + rb_set_color(other, rb_color(parent)); + rb_set_black(parent); + rb_set_black(other->rb_right); + __rb_rotate_left(parent, root); + node = root->rb_node; + break; + } + } + else + { + other = parent->rb_left; + if (rb_is_red(other)) + { + rb_set_black(other); + rb_set_red(parent); + __rb_rotate_right(parent, root); + other = parent->rb_left; + } + if ((!other->rb_left || rb_is_black(other->rb_left)) && + (!other->rb_right || rb_is_black(other->rb_right))) + { + rb_set_red(other); + node = parent; + parent = rb_parent(node); + } + else + { + if (!other->rb_left || rb_is_black(other->rb_left)) + { + rb_set_black(other->rb_right); + rb_set_red(other); + __rb_rotate_left(other, root); + other = parent->rb_left; + } + rb_set_color(other, rb_color(parent)); + rb_set_black(parent); + rb_set_black(other->rb_left); + __rb_rotate_right(parent, root); + node = root->rb_node; + break; + } + } + } + if (node) + rb_set_black(node); +} + +void rb_erase(struct rb_node *node, struct rb_root *root) +{ + struct rb_node *child, *parent; + int color; + + if (!node->rb_left) + child = node->rb_right; + else if (!node->rb_right) + child = node->rb_left; + else + { + struct rb_node *old = node, *left; + + node = node->rb_right; + while ((left = node->rb_left) != NULL) + node = left; + + if (rb_parent(old)) { + if (rb_parent(old)->rb_left == old) + rb_parent(old)->rb_left = node; + else + rb_parent(old)->rb_right = node; + } else + root->rb_node = node; + + child = node->rb_right; + parent = rb_parent(node); + color = rb_color(node); + + if (parent == old) { + parent = node; + } else { + if (child) + rb_set_parent(child, parent); + parent->rb_left = child; + + node->rb_right = old->rb_right; + rb_set_parent(old->rb_right, node); + } + + node->rb_parent_color = old->rb_parent_color; + node->rb_left = old->rb_left; + rb_set_parent(old->rb_left, node); + + goto color; + } + + parent = rb_parent(node); + color = rb_color(node); + + if (child) + rb_set_parent(child, parent); + if (parent) + { + if (parent->rb_left == node) + parent->rb_left = child; + else + parent->rb_right = child; + } + else + root->rb_node = child; + + color: + if (color == RB_BLACK) + __rb_erase_color(child, parent, root); +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(rb_erase); +#endif /* NOT __VMKERNEL_MODULE__ */ + +#ifndef __VMKERNEL_MODULE__ +static void rb_augment_path(struct rb_node *node, rb_augment_f func, void *data) +{ + struct rb_node *parent; + +up: + func(node, data); + parent = rb_parent(node); + if (!parent) + return; + + if (node == parent->rb_left && parent->rb_right) + func(parent->rb_right, data); + else if (parent->rb_left) + func(parent->rb_left, data); + + node = parent; + goto up; +} + +/* + * after inserting @node into the tree, update the tree to account for + * both the new entry and any damage done by rebalance + */ +void rb_augment_insert(struct rb_node *node, rb_augment_f func, void *data) +{ + if (node->rb_left) + node = node->rb_left; + else if (node->rb_right) + node = node->rb_right; + + rb_augment_path(node, func, data); +} +EXPORT_SYMBOL(rb_augment_insert); + +/* + * before removing the node, find the deepest node on the rebalance path + * that will still be there after @node gets removed + */ +struct rb_node *rb_augment_erase_begin(struct rb_node *node) +{ + struct rb_node *deepest; + + if (!node->rb_right && !node->rb_left) + deepest = rb_parent(node); + else if (!node->rb_right) + deepest = node->rb_left; + else if (!node->rb_left) + deepest = node->rb_right; + else { + deepest = rb_next(node); + if (deepest->rb_right) + deepest = deepest->rb_right; + else if (rb_parent(deepest) != node) + deepest = rb_parent(deepest); + } + + return deepest; +} +EXPORT_SYMBOL(rb_augment_erase_begin); + +/* + * after removal, update the tree to account for the removed entry + * and any rebalance damage. + */ +void rb_augment_erase_end(struct rb_node *node, rb_augment_f func, void *data) +{ + if (node) + rb_augment_path(node, func, data); +} +EXPORT_SYMBOL(rb_augment_erase_end); +#endif /* NOT __VMKERNEL_MODULE__ */ + +/* + * This function returns the first node (in sort order) of the tree. + */ +#ifndef __VMKERNEL_MODULE__ +struct rb_node *rb_first(const struct rb_root *root) +#else +struct rb_node *rb_first(struct rb_root *root) +#endif /* NOT __VMKERNEL_MODULE__ */ +{ + struct rb_node *n; + + n = root->rb_node; + if (!n) + return NULL; + while (n->rb_left) + n = n->rb_left; + return n; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(rb_first); +#endif /* NOT __VMKERNEL_MODULE__ */ + +#ifndef __VMKERNEL_MODULE__ +struct rb_node *rb_last(const struct rb_root *root) +#else +struct rb_node *rb_last(struct rb_root *root) +#endif /* NOT __VMKERNEL_MODULE__ */ +{ + struct rb_node *n; + + n = root->rb_node; + if (!n) + return NULL; + while (n->rb_right) + n = n->rb_right; + return n; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(rb_last); +#endif /* NOT __VMKERNEL_MODULE__ */ + +#ifndef __VMKERNEL_MODULE__ +struct rb_node *rb_next(const struct rb_node *node) +#else +struct rb_node *rb_next(struct rb_node *node) +#endif /* NOT __VMKERNEL_MODULE__ */ +{ + struct rb_node *parent; + + if (rb_parent(node) == node) + return NULL; + + /* If we have a right-hand child, go down and then left as far + as we can. */ + if (node->rb_right) { + node = node->rb_right; + while (node->rb_left) + node=node->rb_left; + return (struct rb_node *)node; + } + + /* No right-hand children. Everything down and left is + smaller than us, so any 'next' node must be in the general + direction of our parent. Go up the tree; any time the + ancestor is a right-hand child of its parent, keep going + up. First time it's a left-hand child of its parent, said + parent is our 'next' node. */ + while ((parent = rb_parent(node)) && node == parent->rb_right) + node = parent; + + return parent; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(rb_next); +#endif /* NOT __VMKERNEL_MODULE__ */ + +#ifndef __VMKERNEL_MODULE__ +struct rb_node *rb_prev(const struct rb_node *node) +#else +struct rb_node *rb_prev(struct rb_node *node) +#endif /* NOT __VMKERNEL_MODULE__ */ +{ + struct rb_node *parent; + + if (rb_parent(node) == node) + return NULL; + + /* If we have a left-hand child, go down and then right as far + as we can. */ + if (node->rb_left) { + node = node->rb_left; + while (node->rb_right) + node=node->rb_right; + return (struct rb_node *)node; + } + + /* No left-hand children. Go up till we find an ancestor which + is a right-hand child of its parent */ + while ((parent = rb_parent(node)) && node == parent->rb_left) + node = parent; + + return parent; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(rb_prev); +#endif /* NOT __VMKERNEL_MODULE__ */ + +void rb_replace_node(struct rb_node *victim, struct rb_node *new, + struct rb_root *root) +{ + struct rb_node *parent = rb_parent(victim); + + /* Set the surrounding nodes to point to the replacement */ + if (parent) { + if (victim == parent->rb_left) + parent->rb_left = new; + else + parent->rb_right = new; + } else { + root->rb_node = new; + } + if (victim->rb_left) + rb_set_parent(victim->rb_left, new); + if (victim->rb_right) + rb_set_parent(victim->rb_right, new); + + /* Copy the pointers/colour from the victim to the replacement */ + *new = *victim; +} +#ifndef __VMKERNEL_MODULE__ +EXPORT_SYMBOL(rb_replace_node); +#endif /* NOT __VMKERNEL_MODULE__ */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.c b/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.c new file mode 100755 index 0000000..ffd1cc7 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.c @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "mlnx_compat.h" + + +/************************************************************************/ +#include "hash.c" +#include "linux/lib/bitmap.c" +#include "linux/lib/rbtree.c" + + +/************************************************************************/ +/* Ethtool */ +int __ethtool_get_settings(struct net_device *dev, struct ethtool_cmd *p_cmd) +{ + int err; + + if (!dev->ethtool_ops) + return -EOPNOTSUPP; + if (!dev->ethtool_ops->get_settings) + return -EOPNOTSUPP; + + err = dev->ethtool_ops->get_settings(dev, p_cmd); + return err; +} + +void ethtool_cmd_speed_set(struct ethtool_cmd *ep, + __u32 speed) +{ + ep->speed = (__u16)speed; +#ifndef __VMKERNEL_MODULE__ + ep->speed_hi = (__u16)(speed >> 16); +#endif /* NOT __VMKERNEL_MODULE__ */ +} + +__u32 ethtool_cmd_speed(const struct ethtool_cmd *ep) +{ +#ifdef __VMKERNEL_MODULE__ + return ep->speed; +#else + return (ep->speed_hi << 16) | ep->speed; +#endif /* __VMKERNEL_MODULE__ */ +} + + +/************************************************************************/ +/* Hex dump */ +int hex_to_bin(char ch) +{ + if ((ch >= '0') && (ch <= '9')) + return ch - '0'; + ch = tolower(ch); + if ((ch >= 'a') && (ch <= 'f')) + return ch - 'a' + 10; + return -1; +} + + +/************************************************************************/ +/* Pages */ +unsigned long get_zeroed_page(gfp_t gfp_mask) +{ + return __get_free_pages(gfp_mask | __GFP_ZERO, 0); +} + + +/************************************************************************/ +/* Work Queues */ +int __cancel_delayed_work(struct delayed_work *dwork) +{ + int ret; + + if(NULL == dwork) { + return 0; + } + + ret = del_timer(&dwork->timer); + if (ret) { + /* + * Timer was still pending + */ + clear_bit(__WORK_PENDING, &dwork->work.pending); + } + return ret; +} + + +/************************************************************************/ +/* Mem */ +void *kmemdup(const void *src, size_t len, gfp_t gfp) +{ + void *p; + + p = kmalloc(len, gfp); + if (p) + memcpy(p, src, len); + return p; +} + + +/************************************************************************/ +/* File */ +/* + * This is used by subsystems that don't want seekable + * file descriptors. The function is not supposed to ever fail, the only + * reason it returns an 'int' and not 'void' is so that it can be plugged + * directly into file_operations structure. + */ +int nonseekable_open(struct inode *inode, struct file *filp) +{ + filp->f_mode &= ~(FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE); + return 0; +} + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h b/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h new file mode 100755 index 0000000..5da0bed --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/compat/mlnx_compat.h @@ -0,0 +1,369 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _MLNX_COMPAT_H +#define _MLNX_COMPAT_H + + +#include +#include +#include +#include +#include +#include +#include +#include + + +/************************************************************************/ +#include "hash.h" + + +/************************************************************************/ +/* +#define __VMKERNEL_BF_ENABLE__ +#define __VMKERNEL_SYSFS_SUPPORT__ +#define __VMKERNEL_LARGE_DMA_SEG_ENABLE__ +#define __VMKERNEL_MLNX_SENSNE_ENABLE__ +#define __VMKERNEL_HASH_EXPAND_ENABLE__ +#define __VMKERNEL_NETLINK_SUPPORT__ +#define __VMKERNEL_IPOIB_PACKET_DEBUG__ +#define __VMKERNEL_MLX4_EN_SUPPORT__ +#define __VMKERNEL_ETHTOOL_RSS_NUM_RINGS_SUPPORT__ +#define __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ +#define __VMKERNEL_TX_INLINE_WQE_ENABLE__ +#define __VMKERNEL_NETDEV_SELECT_QUEUE_SUPPORT__ +#define __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ +#define __VMKERNEL_NETDEV_GRO_FEATURE_SUPPORT__ +#define __VMKERNEL_NETDEV_OPS_SET_FEATURES_SUPPORT__ +#define __VMKERNEL_NETDEV_OPS_VALIDATE_ADDR_SUPPORT__ +#define __MLNX_VMKERNEL_40G_SPEED_SUPPORT__ +*/ + +#ifndef CONFIG_MLX4_DEBUG + #define CONFIG_MLX4_DEBUG +#endif + +#define __VMKERNEL_MLX4_EN_TX_HASH__ +#define __VMKERNEL_KOBJECT_FIX_BUG__ + +/* + * Pseudo device defines - + * In old DDKs NETIF_F_PSEUDO_REG not exists and + * we try to workaround this. + * In this case we also define __VMKERNEL_PSEUDO_OLD_API__ + * so we will know we are using old DDK + */ +#ifndef NETIF_F_PSEUDO_REG + #define NETIF_F_PSEUDO_REG 0x10000000000 + #define __VMKERNEL_PSEUDO_OLD_API__ +#endif /* NETIF_F_PSEUDO_REG */ + +/* + * Netqueue RSS for VXLAN defines + * If vmkapi support RSS for VXLAN than we enable + * this feature in netqueue code + */ +#if (VMKAPI_REVISION >= VMK_REVISION_FROM_NUMBERS(2, 1, 0, 0)) + #define __VMKERNEL_RSS_NETQ_SUPPORT__ +#endif + +#if (VMKAPI_REVISION >= VMK_REVISION_FROM_NUMBERS(2, 2, 0, 0)) + #define __MLNX_VMKERNEL_40G_SPEED_SUPPORT__ +#endif + + +/************************************************************************/ +/* Prints */ +#ifndef KERN_ERR +#define KERN_ERR "" +#endif +#ifndef KERN_WARNING +#define KERN_WARNING "" +#endif +#ifndef KERN_CONT +#define KERN_CONT "" +#endif +#define pr_err(fmt, ...) \ + printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__) +#define pr_warning(fmt, ...) \ + printk(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__) +#define pr_cont(fmt, ...) \ + printk(KERN_CONT fmt, ##__VA_ARGS__) +#define printk_once(fmt, ...) \ +({ \ + static bool __print_once; \ + \ + if (!__print_once) { \ + __print_once = true; \ + printk(fmt, ##__VA_ARGS__); \ + } \ +}) +#define pr_fmt(fmt) fmt + + +/************************************************************************/ +/* Networking */ + +/* Netdev */ +#define for_each_netdev_rcu(net, d) \ + for ((d) = dev_base; (d); \ + (d) = rcu_dereference(d)->next) + +typedef int netdev_tx_t; + +/* if_vlan.h */ +#ifndef VLAN_N_VID +#define VLAN_N_VID 4096 +#endif /* VLAN_N_VID */ + +/* if_ether.h */ +#ifndef ETH_FCS_LEN +#define ETH_FCS_LEN 4 +#endif /* NOT ETH_FCS_LEN */ + +/* skbuff.h */ +static inline unsigned int skb_frag_size(const skb_frag_t *frag) +{ + return frag->size; +} + +static inline void skb_frag_size_set(skb_frag_t *frag, unsigned int size) +{ + frag->size = size; +} + +static inline void skb_frag_size_sub(skb_frag_t *frag, int delta) +{ + frag->size -= delta; +} + +static inline struct page *skb_frag_page(const skb_frag_t *frag) +{ +#ifdef __VMKERNEL_MODULE__ + return frag->page; +#else + return frag->page.p; +#endif /* __VMKERNEL_MODULE__ */ +} + +static inline void __skb_frag_set_page(skb_frag_t *frag, struct page *page) +{ +#ifdef __VMKERNEL_MODULE__ + frag->page = page; +#else + frag->page.p = page; +#endif /* __VMKERNEL_MODULE__ */ +} + +static inline void skb_frag_set_page(struct sk_buff *skb, int f, + struct page *page) +{ + __skb_frag_set_page(&skb_shinfo(skb)->frags[f], page); +} + +static inline dma_addr_t skb_frag_dma_map(struct device *dev, + const skb_frag_t *frag, + size_t offset, size_t size, + enum dma_data_direction dir) +{ + return dma_map_page(dev, skb_frag_page(frag), + frag->page_offset + offset, size, dir); +} + +static inline void __skb_frag_unref(skb_frag_t *frag) +{ + put_page(skb_frag_page(frag)); +} + +static inline void skb_frag_unref(struct sk_buff *skb, int f) +{ + __skb_frag_unref(&skb_shinfo(skb)->frags[f]); +} + +static inline void skb_record_rx_queue(struct sk_buff *skb, u16 rx_queue) +{ + vmknetddi_queueops_set_skb_queueid(skb, + VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(rx_queue)); +} + + +/************************************************************************/ +/* Some defines and types */ +typedef unsigned long phys_addr_t; + +#define num_possible_cpus() smp_num_cpus +#define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) +#define __ALIGN_MASK(x, mask) __ALIGN_KERNEL_MASK((x), (mask)) +#define for_each_set_bit(bit, addr, size) \ + for ((bit) = find_first_bit((addr), (size)); \ + (bit) < (size); \ + (bit) = find_next_bit((addr), (size), (bit) + 1)) + +#define __packed __attribute__((packed)) +#define uninitialized_var(x) x = x + +#define iowrite32(v, addr) writel((v), (addr)) +#define iowrite32be(v, addr) iowrite32(be32_to_cpu(v), (addr)) + + +/************************************************************************/ +/* VLANs */ +#define vlan_dev_vlan_id(netdev) (VLAN_DEV_INFO(netdev)->vlan_id) +#define vlan_dev_real_dev(netdev) (VLAN_DEV_INFO(netdev)->real_dev) + + +/************************************************************************/ +/* DMA */ +/* In vmkernel we don't support dma attributes */ +struct dma_attrs; + +#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \ + dma_map_single(dev, cpu_addr, size, dir) + +#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \ + dma_unmap_single(dev, dma_addr, size, dir) + +#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \ + dma_map_sg(dev, sgl, nents, dir) + +#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \ + dma_unmap_sg(dev, sgl, nents, dir) + + +/************************************************************************/ +/* PCI */ +static inline int pci_pcie_cap(struct pci_dev *pdev) +{ + return pci_find_capability(pdev, PCI_CAP_ID_EXP); +} + +/* + * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table + * @_table: device table name + * + * This macro is used to create a struct pci_device_id array (a device table) + * in a generic manner. + */ +#define DEFINE_PCI_DEVICE_TABLE(_table) \ + const struct pci_device_id _table[] + +/* + * PCI_VDEVICE - macro used to describe a specific pci device in short form + * @vendor: the vendor name + * @device: the 16 bit PCI Device ID + * + * This macro is used to create a struct pci_device_id that matches a + * specific PCI device. The subvendor, and subdevice fields will be set + * to PCI_ANY_ID. The macro allows the next field to follow as the device + * private data. + */ +#define PCI_VDEVICE(vendor, device) \ + PCI_VENDOR_ID_##vendor, (device), \ + PCI_ANY_ID, PCI_ANY_ID, 0, 0 + + +/************************************************************************/ +/* Bitmap */ +#define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) % BITS_PER_LONG)) + +unsigned long bitmap_find_next_zero_area(unsigned long *map, + unsigned long size, + unsigned long start, + unsigned int nr, + unsigned long align_mask); +void bitmap_set(unsigned long *map, int start, int nr); +void bitmap_clear(unsigned long *map, int start, int nr); + + +/************************************************************************/ +/* Radix tree */ +#define radix_tree_root hash_table +#define radix_tree_lookup mlnx_radix_tree_lookup +#define radix_tree_insert mlnx_radix_tree_insert +#define radix_tree_delete mlnx_radix_tree_delete + +#ifdef INIT_RADIX_TREE +#undef INIT_RADIX_TREE +#endif + +#define INIT_RADIX_TREE(p_tree, flags) do { \ + memset((p_tree), 0, sizeof(struct hash_table)); \ +} while (0); + + +static inline void * mlnx_radix_tree_lookup(struct radix_tree_root *p_tree, + unsigned long index) { + return hash_lookup(p_tree, index); +} + +static inline int mlnx_radix_tree_insert(struct radix_tree_root *p_tree, + unsigned long index, + void *p_data) { + return hash_insert(p_tree, index, p_data); +} + +static inline void * mlnx_radix_tree_delete(struct radix_tree_root *p_tree, + unsigned long index) { + return hash_delete(p_tree, index); +} + + +/************************************************************************/ +/* Ethtool */ +int __ethtool_get_settings(struct net_device *dev, struct ethtool_cmd *p_cmd); +void ethtool_cmd_speed_set(struct ethtool_cmd *ep, __u32 speed); +__u32 ethtool_cmd_speed(const struct ethtool_cmd *ep); + + +/************************************************************************/ +/* Hex dump */ +int hex_to_bin(char ch); + + +/************************************************************************/ +/* Pages */ +unsigned long get_zeroed_page(gfp_t gfp_mask); + + +/************************************************************************/ +/* Work Queues */ +#define alloc_workqueue(name, flags, max_active) \ + __create_workqueue((name), (max_active)) + +int __cancel_delayed_work(struct delayed_work *dwork); + +static inline struct delayed_work *to_delayed_work(struct work_struct *work) +{ + return container_of(work, struct delayed_work, work); +} + + +/************************************************************************/ +/* Mem */ +/* + * kmemdup - duplicate region of memory + * + * @src: memory region to duplicate + * @len: memory region length + * @gfp: GFP mask to use + */ +void *kmemdup(const void *src, size_t len, gfp_t gfp); + + +/************************************************************************/ +/* File */ +int nonseekable_open(struct inode *inode, struct file *filp); + + +#endif /* _MLNX_COMPAT_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/cmd.h b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/cmd.h new file mode 100755 index 0000000..bdda754 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/cmd.h @@ -0,0 +1,212 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2006 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_CMD_H +#define MLX4_CMD_H + +#include + +enum { + /* initialization and general commands */ + MLX4_CMD_SYS_EN = 0x1, + MLX4_CMD_SYS_DIS = 0x2, + MLX4_CMD_MAP_FA = 0xfff, + MLX4_CMD_UNMAP_FA = 0xffe, + MLX4_CMD_RUN_FW = 0xff6, + MLX4_CMD_MOD_STAT_CFG = 0x34, + MLX4_CMD_QUERY_DEV_CAP = 0x3, + MLX4_CMD_QUERY_FW = 0x4, + MLX4_CMD_ENABLE_LAM = 0xff8, + MLX4_CMD_DISABLE_LAM = 0xff7, + MLX4_CMD_QUERY_DDR = 0x5, + MLX4_CMD_QUERY_ADAPTER = 0x6, + MLX4_CMD_INIT_HCA = 0x7, + MLX4_CMD_CLOSE_HCA = 0x8, + MLX4_CMD_INIT_PORT = 0x9, + MLX4_CMD_CLOSE_PORT = 0xa, + MLX4_CMD_QUERY_HCA = 0xb, + MLX4_CMD_QUERY_PORT = 0x43, + MLX4_CMD_SENSE_PORT = 0x4d, + MLX4_CMD_HW_HEALTH_CHECK = 0x50, + MLX4_CMD_SET_PORT = 0xc, + MLX4_CMD_SET_NODE = 0x5a, + MLX4_CMD_QUERY_FUNC = 0x56, + MLX4_CMD_ACCESS_DDR = 0x2e, + MLX4_CMD_MAP_ICM = 0xffa, + MLX4_CMD_UNMAP_ICM = 0xff9, + MLX4_CMD_MAP_ICM_AUX = 0xffc, + MLX4_CMD_UNMAP_ICM_AUX = 0xffb, + MLX4_CMD_SET_ICM_SIZE = 0xffd, + /*master notify fw on finish for slave's flr*/ + MLX4_CMD_INFORM_FLR_DONE = 0x5b, + + /* TPT commands */ + MLX4_CMD_SW2HW_MPT = 0xd, + MLX4_CMD_QUERY_MPT = 0xe, + MLX4_CMD_HW2SW_MPT = 0xf, + MLX4_CMD_READ_MTT = 0x10, + MLX4_CMD_WRITE_MTT = 0x11, + MLX4_CMD_SYNC_TPT = 0x2f, + + /* EQ commands */ + MLX4_CMD_MAP_EQ = 0x12, + MLX4_CMD_SW2HW_EQ = 0x13, + MLX4_CMD_HW2SW_EQ = 0x14, + MLX4_CMD_QUERY_EQ = 0x15, + + /* CQ commands */ + MLX4_CMD_SW2HW_CQ = 0x16, + MLX4_CMD_HW2SW_CQ = 0x17, + MLX4_CMD_QUERY_CQ = 0x18, + MLX4_CMD_MODIFY_CQ = 0x2c, + + /* SRQ commands */ + MLX4_CMD_SW2HW_SRQ = 0x35, + MLX4_CMD_HW2SW_SRQ = 0x36, + MLX4_CMD_QUERY_SRQ = 0x37, + MLX4_CMD_ARM_SRQ = 0x40, + + /* QP/EE commands */ + MLX4_CMD_RST2INIT_QP = 0x19, + MLX4_CMD_INIT2RTR_QP = 0x1a, + MLX4_CMD_RTR2RTS_QP = 0x1b, + MLX4_CMD_RTS2RTS_QP = 0x1c, + MLX4_CMD_SQERR2RTS_QP = 0x1d, + MLX4_CMD_2ERR_QP = 0x1e, + MLX4_CMD_RTS2SQD_QP = 0x1f, + MLX4_CMD_SQD2SQD_QP = 0x38, + MLX4_CMD_SQD2RTS_QP = 0x20, + MLX4_CMD_2RST_QP = 0x21, + MLX4_CMD_QUERY_QP = 0x22, + MLX4_CMD_INIT2INIT_QP = 0x2d, + MLX4_CMD_SUSPEND_QP = 0x32, + MLX4_CMD_UNSUSPEND_QP = 0x33, + /* special QP and management commands */ + MLX4_CMD_CONF_SPECIAL_QP = 0x23, + MLX4_CMD_MAD_IFC = 0x24, + + /* multicast commands */ + MLX4_CMD_READ_MCG = 0x25, + MLX4_CMD_WRITE_MCG = 0x26, + MLX4_CMD_MGID_HASH = 0x27, + + /* miscellaneous commands */ + MLX4_CMD_DIAG_RPRT = 0x30, + MLX4_CMD_NOP = 0x31, + MLX4_CMD_ACCESS_MEM = 0x2e, + MLX4_CMD_SET_VEP = 0x52, + + /* Ethernet specific commands */ + MLX4_CMD_SET_VLAN_FLTR = 0x47, + MLX4_CMD_SET_MCAST_FLTR = 0x48, + MLX4_CMD_DUMP_ETH_STATS = 0x49, + + /* Communication channel commands */ + MLX4_CMD_ARM_COMM_CHANNEL = 0x57, + MLX4_CMD_GEN_EQE = 0x58, + + /* virtual commands */ + MLX4_CMD_ALLOC_RES = 0xf00, + MLX4_CMD_FREE_RES = 0xf01, + MLX4_CMD_MCAST_ATTACH = 0xf05, + MLX4_CMD_UCAST_ATTACH = 0xf06, + MLX4_CMD_PROMISC = 0xf08, + MLX4_CMD_QUERY_FUNC_CAP = 0xf0a, + MLX4_CMD_QP_ATTACH = 0xf0b, + + /* debug commands */ + MLX4_CMD_QUERY_DEBUG_MSG = 0x2a, + MLX4_CMD_SET_DEBUG_MSG = 0x2b, + + /* statistics commands */ + MLX4_CMD_QUERY_IF_STAT = 0X54, + MLX4_CMD_SET_IF_STAT = 0X55, +}; + +enum { + MLX4_CMD_TIME_CLASS_A = 10000, + MLX4_CMD_TIME_CLASS_B = 10000, + MLX4_CMD_TIME_CLASS_C = 10000, +}; + +enum { + MLX4_MAILBOX_SIZE = 4096, + MLX4_ACCESS_MEM_ALIGN = 256, +}; + +enum { + /* set port opcode modifiers */ + MLX4_SET_PORT_GENERAL = 0x0, + MLX4_SET_PORT_RQP_CALC = 0x1, + MLX4_SET_PORT_MAC_TABLE = 0x2, + MLX4_SET_PORT_VLAN_TABLE = 0x3, + MLX4_SET_PORT_PRIO_MAP = 0x4, + MLX4_SET_PORT_GID_TABLE = 0x5, +}; + +enum { + MLX4_CMD_WRAPPED, + MLX4_CMD_NATIVE +}; + +struct mlx4_dev; + +struct mlx4_cmd_mailbox { + void *buf; + dma_addr_t dma; +}; + +int __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param, + int out_is_imm, u32 in_modifier, u8 op_modifier, + u16 op, unsigned long timeout, int native); + +/* Invoke a command with no output parameter */ +static inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier, + u8 op_modifier, u16 op, unsigned long timeout, + int native) +{ + return __mlx4_cmd(dev, in_param, NULL, 0, in_modifier, + op_modifier, op, timeout, native); +} + +/* Invoke a command with an output mailbox */ +static inline int mlx4_cmd_box(struct mlx4_dev *dev, u64 in_param, u64 out_param, + u32 in_modifier, u8 op_modifier, u16 op, + unsigned long timeout, int native) +{ + return __mlx4_cmd(dev, in_param, &out_param, 0, in_modifier, + op_modifier, op, timeout, native); +} + +/* + * Invoke a command with an immediate output parameter (and copy the + * output into the caller's out_param pointer after the command + * executes). + */ +static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_param, + u32 in_modifier, u8 op_modifier, u16 op, + unsigned long timeout, int native) +{ + return __mlx4_cmd(dev, in_param, out_param, 1, in_modifier, + op_modifier, op, timeout, native); +} + +struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev); +void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox); + +u32 mlx4_comm_get_version(void); + +#define MLX4_COMM_GET_IF_REV(cmd_chan_ver) (u8)((cmd_chan_ver) >> 8) + +#endif /* MLX4_CMD_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/cq.h b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/cq.h new file mode 100755 index 0000000..d724c2d --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/cq.h @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_CQ_H +#define MLX4_CQ_H + +#include + +#include +#include + +struct mlx4_cqe { + __be32 vlan_my_qpn; + __be32 immed_rss_invalid; + __be32 g_mlpath_rqpn; + __be16 sl_vid; + __be16 rlid; + __be16 status; + u8 ipv6_ext_mask; + u8 badfcs_enc; + __be32 byte_cnt; + __be16 wqe_index; + __be16 checksum; + u8 reserved[3]; + u8 owner_sr_opcode; +}; + +struct mlx4_err_cqe { + __be32 my_qpn; + u32 reserved1[5]; + __be16 wqe_index; + u8 vendor_err_syndrome; + u8 syndrome; + u8 reserved2[3]; + u8 owner_sr_opcode; +}; + +enum { + MLX4_CQE_VLAN_PRESENT_MASK = 1 << 29, + MLX4_CQE_QPN_MASK = 0xffffff, +}; + +enum { + MLX4_CQE_OWNER_MASK = 0x80, + MLX4_CQE_IS_SEND_MASK = 0x40, + MLX4_CQE_OPCODE_MASK = 0x1f +}; + +enum { + MLX4_CQE_SYNDROME_LOCAL_LENGTH_ERR = 0x01, + MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR = 0x02, + MLX4_CQE_SYNDROME_LOCAL_PROT_ERR = 0x04, + MLX4_CQE_SYNDROME_WR_FLUSH_ERR = 0x05, + MLX4_CQE_SYNDROME_MW_BIND_ERR = 0x06, + MLX4_CQE_SYNDROME_BAD_RESP_ERR = 0x10, + MLX4_CQE_SYNDROME_LOCAL_ACCESS_ERR = 0x11, + MLX4_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR = 0x12, + MLX4_CQE_SYNDROME_REMOTE_ACCESS_ERR = 0x13, + MLX4_CQE_SYNDROME_REMOTE_OP_ERR = 0x14, + MLX4_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR = 0x15, + MLX4_CQE_SYNDROME_RNR_RETRY_EXC_ERR = 0x16, + MLX4_CQE_SYNDROME_REMOTE_ABORTED_ERR = 0x22, +}; + +enum { + MLX4_CQE_STATUS_IPV4 = 1 << 6, + MLX4_CQE_STATUS_IPV4F = 1 << 7, + MLX4_CQE_STATUS_IPV6 = 1 << 8, + MLX4_CQE_STATUS_IPV4OPT = 1 << 9, + MLX4_CQE_STATUS_TCP = 1 << 10, + MLX4_CQE_STATUS_UDP = 1 << 11, + MLX4_CQE_STATUS_IPOK = 1 << 12, +}; + +enum { + MLX4_CQE_LLC = 1, + MLX4_CQE_SNAP = 1 << 1, + MLX4_CQE_BAD_FCS = 1 << 4, +}; + +static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd, + void __iomem *uar_page, + spinlock_t *doorbell_lock) +{ + __be32 doorbell[2]; + u32 sn; + u32 ci; + + sn = cq->arm_sn & 3; + ci = cq->cons_index & 0xffffff; + + *cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci); + + /* + * Make sure that the doorbell record in host memory is + * written before ringing the doorbell via PCI MMIO. + */ + wmb(); + + doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn); + doorbell[1] = cpu_to_be32(ci); + + mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock); +} + +static inline void mlx4_cq_set_ci(struct mlx4_cq *cq) +{ + *cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff); +} + +enum { + MLX4_CQ_DB_REQ_NOT_SOL = 1 << 24, + MLX4_CQ_DB_REQ_NOT = 2 << 24 +}; + +int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq, + u16 count, u16 period); +int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq, + int entries, struct mlx4_mtt *mtt); + +#endif /* MLX4_CQ_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/device.h b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/device.h new file mode 100755 index 0000000..6d34324 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/device.h @@ -0,0 +1,826 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_DEVICE_H +#define MLX4_DEVICE_H + +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#include +#endif /* NOT _VMKERNEL_MODULE__ */ + +#define MAX_MSIX_P_PORT 17 +#define MAX_MSIX 64 +#define MSIX_LEGACY_SZ 4 +#define MIN_MSIX_P_PORT 5 + +enum { + MLX4_FLAG_MSI_X = 1 << 0, + MLX4_FLAG_OLD_PORT_CMDS = 1 << 1, + MLX4_FLAG_MASTER = 1 << 2, + MLX4_FLAG_SLAVE = 1 << 3, + MLX4_FLAG_SRIOV = 1 << 4, +}; + +enum { + MLX4_PORT_CAP_DEV_MGMT_SUP = 1 << 19, +}; + +enum { + MLX4_MAX_PORTS = 2, + MLX4_MAX_PORT_PKEYS = 128 +}; + +/* base qkey for use in sriov tunnel-qp/proxy-cp communication. + * * These qkeys must not be allowed for general use. This is a 64k range, + * * and to test for violation, we use the mask (protect against future chg). + * */ +#define MLX4_RESERVED_QKEY_BASE (0xFFFF0000) +#define MLX4_RESERVED_QKEY_MASK (0xFFFF0000) + +enum { + MLX4_BOARD_ID_LEN = 64 +}; + +enum { + MLX4_MAX_NUM_PF = 16, + MLX4_MAX_NUM_VF = 64, + MLX4_MFUNC_MAX = 80, + MLX4_MAX_EQ_NUM = 1024, + MLX4_MFUNC_EQ_NUM = 4, + MLX4_MFUNC_MAX_EQES = 8, + MLX4_MFUNC_EQE_MASK = (MLX4_MFUNC_MAX_EQES - 1) +}; + +enum { + MLX4_DEV_CAP_FLAG_RC = 1LL << 0, + MLX4_DEV_CAP_FLAG_UC = 1LL << 1, + MLX4_DEV_CAP_FLAG_UD = 1LL << 2, + MLX4_DEV_CAP_FLAG_XRC = 1LL << 3, + MLX4_DEV_CAP_FLAG_SRQ = 1LL << 6, + MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1LL << 7, + MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8, + MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9, + MLX4_DEV_CAP_FLAG_DPDP = 1LL << 12, + MLX4_DEV_CAP_FLAG_BLH = 1LL << 15, + MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1LL << 16, + MLX4_DEV_CAP_FLAG_APM = 1LL << 17, + MLX4_DEV_CAP_FLAG_ATOMIC = 1LL << 18, + MLX4_DEV_CAP_FLAG_RAW_MCAST = 1LL << 19, + MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1LL << 20, + MLX4_DEV_CAP_FLAG_UD_MCAST = 1LL << 21, + MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV = 1LL << 27, + MLX4_DEV_CAP_FLAG_IBOE = 1LL << 30, + MLX4_DEV_CAP_FLAG_UC_LOOPBACK = 1LL << 32, + MLX4_DEV_CAP_FLAG_FCS_KEEP = 1LL << 34, + MLX4_DEV_CAP_FLAG_WOL_PORT1 = 1LL << 37, + MLX4_DEV_CAP_FLAG_WOL_PORT2 = 1LL << 38, + MLX4_DEV_CAP_FLAG_UDP_RSS = 1LL << 40, + MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41, + MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42, +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48, + MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55 +#else + MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48 +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ +}; + +#define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) + +enum { + MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO = 1 << 0 +}; + +enum { + MLX4_BMME_FLAG_LOCAL_INV = 1 << 6, + MLX4_BMME_FLAG_REMOTE_INV = 1 << 7, + MLX4_BMME_FLAG_TYPE_2_WIN = 1 << 9, + MLX4_BMME_FLAG_RESERVED_LKEY = 1 << 10, + MLX4_BMME_FLAG_FAST_REG_WR = 1 << 11, +}; + +enum mlx4_event { + MLX4_EVENT_TYPE_COMP = 0x00, + MLX4_EVENT_TYPE_PATH_MIG = 0x01, + MLX4_EVENT_TYPE_COMM_EST = 0x02, + MLX4_EVENT_TYPE_SQ_DRAINED = 0x03, + MLX4_EVENT_TYPE_SRQ_QP_LAST_WQE = 0x13, + MLX4_EVENT_TYPE_SRQ_LIMIT = 0x14, + MLX4_EVENT_TYPE_CQ_ERROR = 0x04, + MLX4_EVENT_TYPE_WQ_CATAS_ERROR = 0x05, + MLX4_EVENT_TYPE_EEC_CATAS_ERROR = 0x06, + MLX4_EVENT_TYPE_PATH_MIG_FAILED = 0x07, + MLX4_EVENT_TYPE_WQ_INVAL_REQ_ERROR = 0x10, + MLX4_EVENT_TYPE_WQ_ACCESS_ERROR = 0x11, + MLX4_EVENT_TYPE_SRQ_CATAS_ERROR = 0x12, + MLX4_EVENT_TYPE_LOCAL_CATAS_ERROR = 0x08, + MLX4_EVENT_TYPE_PORT_CHANGE = 0x09, + MLX4_EVENT_TYPE_EQ_OVERFLOW = 0x0f, + MLX4_EVENT_TYPE_ECC_DETECT = 0x0e, + MLX4_EVENT_TYPE_CMD = 0x0a, + MLX4_EVENT_TYPE_VEP_UPDATE = 0x19, + MLX4_EVENT_TYPE_COMM_CHANNEL = 0x18, + MLX4_EVENT_TYPE_FATAL_WARNING = 0x1b, + MLX4_EVENT_TYPE_FLR_EVENT = 0x1c, + MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT = 0x1d, + MLX4_EVENT_TYPE_SW_EVENT = 0x3f, + MLX4_EVENT_TYPE_NONE = 0xff, +}; + +enum sw_event_sub_type{ + PKEY_UPDATE_AVIAL = 0, + GUID_CHANGE_AVIAL = 1, + LID_CHANGE_AVIAL = 2, + CLIENT_REREGISTER_AVIAL = 3, + FUNCTION_BOOT = 4, + FUNCTION_SHUTDOWN = 5, +}; + +enum { + MLX4_PORT_CHANGE_SUBTYPE_DOWN = 1, + MLX4_PORT_CHANGE_SUBTYPE_ACTIVE = 4 +}; + +enum slave_port_state { + SLAVE_PORT_DOWN = 0, + SLAVE_PENDING_UP, + SLAVE_PORT_UP, +}; + +enum slave_port_gen_event { + SLAVE_PORT_GEN_EVENT_DOWN = 0, + SLAVE_PORT_GEN_EVENT_UP, + SLAVE_PORT_GEN_EVENT_NONE, +}; +enum slave_port_state_event { + MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN, + MLX4_PORT_STATE_DEV_EVENT_PORT_UP, + MLX4_PORT_STATE_IB_PORT_STATE_EVENT_GID_VALID, + MLX4_PORT_STATE_IB_EVENT_GID_INVALID, +}; + +enum { + MLX4_FATAL_WARNING_SUBTYPE_WARMING = 0, +}; + +enum { + MLX4_PERM_LOCAL_READ = 1 << 10, + MLX4_PERM_LOCAL_WRITE = 1 << 11, + MLX4_PERM_REMOTE_READ = 1 << 12, + MLX4_PERM_REMOTE_WRITE = 1 << 13, + MLX4_PERM_ATOMIC = 1 << 14 +}; + +enum { + MLX4_OPCODE_NOP = 0x00, + MLX4_OPCODE_SEND_INVAL = 0x01, + MLX4_OPCODE_RDMA_WRITE = 0x08, + MLX4_OPCODE_RDMA_WRITE_IMM = 0x09, + MLX4_OPCODE_SEND = 0x0a, + MLX4_OPCODE_SEND_IMM = 0x0b, + MLX4_OPCODE_LSO = 0x0e, + MLX4_OPCODE_RDMA_READ = 0x10, + MLX4_OPCODE_ATOMIC_CS = 0x11, + MLX4_OPCODE_ATOMIC_FA = 0x12, + MLX4_OPCODE_MASKED_ATOMIC_CS = 0x14, + MLX4_OPCODE_MASKED_ATOMIC_FA = 0x15, + MLX4_OPCODE_BIND_MW = 0x18, + MLX4_OPCODE_FMR = 0x19, + MLX4_OPCODE_LOCAL_INVAL = 0x1b, + MLX4_OPCODE_CONFIG_CMD = 0x1f, + + MLX4_RECV_OPCODE_RDMA_WRITE_IMM = 0x00, + MLX4_RECV_OPCODE_SEND = 0x01, + MLX4_RECV_OPCODE_SEND_IMM = 0x02, + MLX4_RECV_OPCODE_SEND_INVAL = 0x03, + + MLX4_CQE_OPCODE_ERROR = 0x1e, + MLX4_CQE_OPCODE_RESIZE = 0x16, +}; + +enum { + MLX4_STAT_RATE_OFFSET = 5 +}; + +enum mlx4_protocol { + MLX4_PROT_IB_IPV6 = 0, + MLX4_PROT_ETH, + MLX4_PROT_IB_IPV4, + MLX4_PROT_FCOE +}; + +enum { + MLX4_MTT_FLAG_PRESENT = 1 +}; + +enum mlx4_qp_region { + MLX4_QP_REGION_FW = 0, + MLX4_QP_REGION_ETH_ADDR, + MLX4_QP_REGION_FC_ADDR, + MLX4_QP_REGION_FC_EXCH, + MLX4_NUM_QP_REGION +}; + +enum mlx4_port_type { + MLX4_PORT_TYPE_NONE = 0, + MLX4_PORT_TYPE_IB = 1, + MLX4_PORT_TYPE_ETH = 2, +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + MLX4_PORT_TYPE_AUTO = 3 +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ +}; + +enum mlx4_special_vlan_idx { + MLX4_NO_VLAN_IDX = 0, + MLX4_VLAN_MISS_IDX, + MLX4_VLAN_REGULAR +}; + +enum mlx4_steer_type { + MLX4_MC_STEER = 0, + MLX4_UC_STEER, + MLX4_NUM_STEERS +}; + +enum { + MLX4_NUM_FEXCH = 64 * 1024, +}; + +enum { + MLX4_MAX_FAST_REG_PAGES = 511, +}; + +enum { + MLX4_DEV_PMC_SUBTYPE_GUID_INFO = 0x14, + MLX4_DEV_PMC_SUBTYPE_PORT_INFO = 0x15, + MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE = 0x16, +}; + +static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) +{ + return (major << 32) | (minor << 16) | subminor; +} + +struct mlx4_phys_caps { + u32 gid_phys_table_len[MLX4_MAX_PORTS + 1]; + u32 pkey_phys_table_len[MLX4_MAX_PORTS + 1]; + u32 num_phys_eqs; +}; + +struct mlx4_caps { + u64 fw_ver; + u32 function; + int num_ports; + int vl_cap[MLX4_MAX_PORTS + 1]; + int ib_mtu_cap[MLX4_MAX_PORTS + 1]; + __be32 ib_port_def_cap[MLX4_MAX_PORTS + 1]; + u64 def_mac[MLX4_MAX_PORTS + 1]; + int eth_mtu_cap[MLX4_MAX_PORTS + 1]; + int gid_table_len[MLX4_MAX_PORTS + 1]; + int pkey_table_len[MLX4_MAX_PORTS + 1]; + int trans_type[MLX4_MAX_PORTS + 1]; + int vendor_oui[MLX4_MAX_PORTS + 1]; + int wavelength[MLX4_MAX_PORTS + 1]; + u64 trans_code[MLX4_MAX_PORTS + 1]; + int local_ca_ack_delay; + int num_uars; + u32 uar_page_size; + int bf_reg_size; + int bf_regs_per_page; + int max_sq_sg; + int max_rq_sg; + int num_qps; + int max_wqes; + int max_sq_desc_sz; + int max_rq_desc_sz; + int max_qp_init_rdma; + int max_qp_dest_rdma; + int sqp_start; + u32 base_sqpn; + u32 base_tunnel_sqpn; + int num_srqs; + int max_srq_wqes; + int max_srq_sge; + int reserved_srqs; + int num_cqs; + int max_cqes; + int reserved_cqs; + int num_eqs; + int reserved_eqs; + int num_comp_vectors; + int comp_pool; + int num_mpts; + int max_fmr_maps; + int num_mtts; + int fmr_reserved_mtts; + int reserved_mtts; + int reserved_mrws; + int reserved_uars; + int num_mgms; + int num_amgms; + int reserved_mcgs; + int num_qp_per_mgm; + int num_pds; + int reserved_pds; + int max_xrcds; + int reserved_xrcds; + int mtt_entry_sz; + u32 max_msg_sz; + u32 page_size_cap; + u64 flags; + u32 bmme_flags; + u32 reserved_lkey; + u16 stat_rate_support; + u8 port_width_cap[MLX4_MAX_PORTS + 1]; + int max_gso_sz; + int reserved_qps_cnt[MLX4_NUM_QP_REGION]; + int reserved_qps; + int reserved_qps_base[MLX4_NUM_QP_REGION]; + int log_num_macs; + int log_num_vlans; + int log_num_prios; + enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1]; + u8 supported_type[MLX4_MAX_PORTS + 1]; +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + u8 suggested_type[MLX4_MAX_PORTS + 1]; + u8 default_sense[MLX4_MAX_PORTS + 1]; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + u32 port_mask[MLX4_MAX_PORTS + 1]; + enum mlx4_port_type possible_type[MLX4_MAX_PORTS + 1]; + u32 max_counters; + u8 ext_port_cap[MLX4_MAX_PORTS + 1]; + u8 port_ib_mtu[MLX4_MAX_PORTS + 1]; + u16 sqp_demux; + u32 eqe_size; + u32 cqe_size; +}; + +struct mlx4_buf_list { + void *buf; + dma_addr_t map; +}; + +struct mlx4_buf { + struct mlx4_buf_list direct; + struct mlx4_buf_list *page_list; + int nbufs; + int npages; + int page_shift; +}; + +struct mlx4_mtt { + u32 offset; + int order; + int page_shift; +}; + +enum { + MLX4_DB_PER_PAGE = PAGE_SIZE / 4 +}; + +struct mlx4_db_pgdir { + struct list_head list; + DECLARE_BITMAP(order0, MLX4_DB_PER_PAGE); + DECLARE_BITMAP(order1, MLX4_DB_PER_PAGE / 2); + unsigned long *bits[2]; + __be32 *db_page; + dma_addr_t db_dma; +}; + +struct mlx4_ib_user_db_page; + +struct mlx4_db { + __be32 *db; + union { + struct mlx4_db_pgdir *pgdir; + struct mlx4_ib_user_db_page *user_page; + } u; + dma_addr_t dma; + int index; + int order; +}; + +struct mlx4_hwq_resources { + struct mlx4_db db; + struct mlx4_mtt mtt; + struct mlx4_buf buf; +}; + +struct mlx4_mr { + struct mlx4_mtt mtt; + u64 iova; + u64 size; + u32 key; + u32 pd; + u32 access; + int enabled; +}; + +struct mlx4_fmr { + struct mlx4_mr mr; + struct mlx4_mpt_entry *mpt; + __be64 *mtts; + dma_addr_t dma_handle; + int max_pages; + int max_maps; + int maps; + u8 page_shift; +}; + +struct mlx4_uar { + unsigned long pfn; + int index; + struct list_head bf_list; + unsigned free_bf_bmap; + void __iomem *map; + void __iomem *bf_map; +}; + +struct mlx4_bf { + unsigned long offset; + int buf_size; + struct mlx4_uar *uar; + void __iomem *reg; +}; + +struct mlx4_cq { + void (*comp) (struct mlx4_cq *); + void (*event) (struct mlx4_cq *, enum mlx4_event); + + struct mlx4_uar *uar; + + u32 cons_index; + + __be32 *set_ci_db; + __be32 *arm_db; + int arm_sn; + + int cqn; + unsigned vector; + + atomic_t refcount; + struct completion free; +}; + +struct mlx4_qp { + void (*event) (struct mlx4_qp *, enum mlx4_event); + + int qpn; + + atomic_t refcount; + struct completion free; +}; + +struct mlx4_srq { + void (*event) (struct mlx4_srq *, enum mlx4_event); + + int srqn; + int max; + int max_gs; + int wqe_shift; + + atomic_t refcount; + struct completion free; +}; + +struct mlx4_av { + __be32 port_pd; + u8 reserved1; + u8 g_slid; + __be16 dlid; + u8 reserved2; + u8 gid_index; + u8 stat_rate; + u8 hop_limit; + __be32 sl_tclass_flowlabel; + u8 dgid[16]; +}; + +struct mlx4_eth_av { + __be32 port_pd; + u8 reserved1; + u8 smac_idx; + u16 reserved2; + u8 reserved3; + u8 gid_index; + u8 stat_rate; + u8 hop_limit; + __be32 sl_tclass_flowlabel; + u8 dgid[16]; + u32 reserved4[2]; + __be16 vlan; + u8 mac[6]; +}; + +union mlx4_ext_av { + struct mlx4_av ib; + struct mlx4_eth_av eth; +}; + +struct mlx4_counter { + u8 reserved1[3]; + u8 counter_mode; + __be32 num_ifc; + u32 reserved2[2]; + __be64 rx_frames; + __be64 rx_bytes; + __be64 tx_frames; + __be64 tx_bytes; +}; + +struct mlx4_dev { + struct pci_dev *pdev; + unsigned long flags; + unsigned long num_slaves; + struct mlx4_caps caps; + struct mlx4_phys_caps phys_caps; + struct radix_tree_root qp_table_tree; + u8 rev_id; + char board_id[MLX4_BOARD_ID_LEN]; + int num_vfs; +}; + +struct mlx4_eqe { + u8 reserved1; + u8 type; + u8 reserved2; + u8 subtype; + union { + u32 raw[6]; + struct { + __be32 cqn; + } __packed comp; + struct { + u16 reserved1; + __be16 token; + u32 reserved2; + u8 reserved3[3]; + u8 status; + __be64 out_param; + } __packed cmd; + struct { + __be32 qpn; + } __packed qp; + struct { + __be32 srqn; + } __packed srq; + struct { + __be32 cqn; + u32 reserved1; + u8 reserved2[3]; + u8 syndrome; + } __packed cq_err; + struct { + u32 reserved1[2]; + __be32 port; + } __packed port_change; + struct { + #define COMM_CHANNEL_BIT_ARRAY_SIZE 4 + u32 reserved; + u32 bit_vec[COMM_CHANNEL_BIT_ARRAY_SIZE]; + } __packed comm_channel_arm; + struct { + u8 port; + u8 reserved[3]; + __be64 mac; + } __packed mac_update; + struct { + __be32 slave_id; + } __packed flr_event; + struct { + __be16 current_temperature; + __be16 warning_threshold; + } __packed warming; + struct { + u8 reserved[3]; + u8 port; + union { + struct { + __be16 mstr_sm_lid; + __be16 port_lid; + __be32 changed_attr; + u8 reserved[3]; + u8 mstr_sm_sl; + __be64 gid_prefix; + } __attribute__((packed)) port_info; + struct { + __be32 block_ptr; + __be32 tbl_entries_mask; + } __attribute__((packed)) tbl_change_info; + } params; + } __attribute__((packed)) port_mgmt_change; + } event; + u8 slave_id; + u8 reserved3[2]; + u8 owner; +} __packed; + +struct mlx4_init_port_param { + int set_guid0; + int set_node_guid; + int set_si_guid; + u16 mtu; + int port_width_cap; + u16 vl_cap; + u16 max_gid; + u16 max_pkey; + u64 guid0; + u64 node_guid; + u64 si_guid; +}; + +#define mlx4_foreach_port(port, dev, type) \ + for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ + if ((type) == (dev)->caps.port_mask[(port)]) + +#define mlx4_foreach_ib_transport_port(port, dev) \ + for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ + if (((dev)->caps.port_mask[port] == MLX4_PORT_TYPE_IB) || \ + ((dev)->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) + +void handle_port_mgmt_change_event(struct work_struct *work); + +static inline int mlx4_master_func_num(struct mlx4_dev *dev) +{ + return dev->caps.function; +} + +static inline int mlx4_is_master(struct mlx4_dev *dev) +{ + return dev->flags & MLX4_FLAG_MASTER; +} + +static inline int mlx4_is_mfunc(struct mlx4_dev *dev) +{ + return dev->flags & (MLX4_FLAG_SLAVE | MLX4_FLAG_MASTER); +} + +static inline int mlx4_is_slave(struct mlx4_dev *dev) +{ + return dev->flags & MLX4_FLAG_SLAVE; +} + +static inline int mlx4_is_qp_reserved(struct mlx4_dev *dev, u32 qpn) +{ + return (qpn < dev->caps.base_sqpn + 8 + 16 * MLX4_MFUNC_MAX); +} + +static inline int mlx4_is_guest_proxy(struct mlx4_dev *dev, int slave, u32 qpn) +{ + int base = dev->caps.base_sqpn + 8 + slave * 8; + + if (qpn >= base && qpn < base + 8) + return 1; + + return 0; +} + +static inline int mlx4_port_mng_chg_event(struct mlx4_dev *dev) +{ + if (dev->caps.flags & (((u64)MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV) << 32)) + return 1; + return 0; +} + +int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, + struct mlx4_buf *buf); +void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); +static inline void *mlx4_buf_offset(struct mlx4_buf *buf, int offset) +{ + if (BITS_PER_LONG == 64 || buf->nbufs == 1) + return buf->direct.buf + offset; + else + return buf->page_list[offset >> PAGE_SHIFT].buf + + (offset & (PAGE_SIZE - 1)); +} + +int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn); +void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn); +int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); +void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); + +int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar); +void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar); +int mlx4_bf_alloc(struct mlx4_dev *dev, struct mlx4_bf *bf); +void mlx4_bf_free(struct mlx4_dev *dev, struct mlx4_bf *bf); + +int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, + struct mlx4_mtt *mtt); +void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt); +u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt); + +int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, + int npages, int page_shift, struct mlx4_mr *mr); +void mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr); +int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr); +int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + int start_index, int npages, u64 *page_list); +int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + struct mlx4_buf *buf); + +int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, int order); +void mlx4_db_free(struct mlx4_dev *dev, struct mlx4_db *db); + +int mlx4_alloc_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources *wqres, + int size, int max_direct); +void mlx4_free_hwq_res(struct mlx4_dev *mdev, struct mlx4_hwq_resources *wqres, + int size); + +int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, + struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq, + unsigned vector, int collapsed); +void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq); + +int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base); +void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt); + +int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp); +void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp); + +int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn, + struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq); +void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq); +int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark); +int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark); + +int mlx4_INIT_PORT(struct mlx4_dev *dev, int port); +int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port); + +int mlx4_unicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + int block_mcast_loopback, enum mlx4_protocol prot); +int mlx4_unicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + enum mlx4_protocol prot); +int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + int block_mcast_loopback, enum mlx4_protocol protocol); +int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + enum mlx4_protocol protocol); +int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); +int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); +int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); +int mlx4_unicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); +int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +int mlx4_uc_steer_add(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn); +void mlx4_uc_steer_release(struct mlx4_dev *dev, u8 port, + u64 mac, int qpn); +#endif /* NET QUEUE */ +int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); +void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); +int mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac); +int mlx4_get_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn); +void mlx4_put_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int qpn); +void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap); +int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, + u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); +int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, + u8 promisc); +int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx); +int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); +void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index); + +int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list, + int npages, u64 iova, u32 *lkey, u32 *rkey); +int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages, + int max_maps, u8 page_shift, struct mlx4_fmr *fmr); +int mlx4_fmr_enable(struct mlx4_dev *dev, struct mlx4_fmr *fmr); +void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr, + u32 *lkey, u32 *rkey); +int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr); +int mlx4_SYNC_TPT(struct mlx4_dev *dev); +int mlx4_test_interrupts(struct mlx4_dev *dev); +int mlx4_assign_eq(struct mlx4_dev *dev, char* name , int* vector); +void mlx4_release_eq(struct mlx4_dev *dev, int vec); + +int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx); +void mlx4_counter_free(struct mlx4_dev *dev, u32 idx); + +int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port); +int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port); +int mlx4_gen_pkey_eqe(struct mlx4_dev *dev, int slave, u8 port); + +int mlx4_is_slave_active(struct mlx4_dev *dev, int slave); +void mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val); + +int mlx4_gen_guid_change_eqe(struct mlx4_dev *dev, int slave, u8 port); +int mlx4_gen_all_sw_eqe(struct mlx4_dev *dev, u8 port, int avial); +int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey); +int mlx4_gen_port_state_change_eqe(struct mlx4_dev *dev, int slave, u8 port, u8 port_subtype_change); +enum slave_port_state mlx4_get_slave_port_state(struct mlx4_dev *dev, int slave, u8 port); +int set_and_calc_slave_port_state(struct mlx4_dev *dev, int slave, u8 port, int event, enum slave_port_gen_event* gen_event); + +#endif /* MLX4_DEVICE_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/doorbell.h b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/doorbell.h new file mode 100755 index 0000000..b428e43 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/doorbell.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2004 Topspin Communications. All rights reserved. + * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. + * Copyright (c) 2005, 2011-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_DOORBELL_H +#define MLX4_DOORBELL_H + +#include +#include + +#define MLX4_SEND_DOORBELL 0x14 +#define MLX4_CQ_DOORBELL 0x20 + +#if BITS_PER_LONG == 64 +/* + * Assume that we can just write a 64-bit doorbell atomically. s390 + * actually doesn't have writeq() but S/390 systems don't even have + * PCI so we won't worry about it. + */ + +#define MLX4_DECLARE_DOORBELL_LOCK(name) +#define MLX4_INIT_DOORBELL_LOCK(ptr) do { } while (0) +#define MLX4_GET_DOORBELL_LOCK(ptr) (NULL) + +static inline void mlx4_write64(__be32 val[2], void __iomem *dest, + spinlock_t *doorbell_lock) +{ + __raw_writeq(*(u64 *) val, dest); +} + +#else + +/* + * Just fall back to a spinlock to protect the doorbell if + * BITS_PER_LONG is 32 -- there's no portable way to do atomic 64-bit + * MMIO writes. + */ + +#define MLX4_DECLARE_DOORBELL_LOCK(name) spinlock_t name; +#define MLX4_INIT_DOORBELL_LOCK(ptr) spin_lock_init(ptr) +#define MLX4_GET_DOORBELL_LOCK(ptr) (ptr) + +static inline void mlx4_write64(__be32 val[2], void __iomem *dest, + spinlock_t *doorbell_lock) +{ + unsigned long flags; + + spin_lock_irqsave(doorbell_lock, flags); + __raw_writel((__force u32) val[0], dest); + __raw_writel((__force u32) val[1], dest + 4); + spin_unlock_irqrestore(doorbell_lock, flags); +} + +#endif + +#endif /* MLX4_DOORBELL_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/driver.h b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/driver.h new file mode 100755 index 0000000..78ed1c0 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/driver.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2006 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_DRIVER_H +#define MLX4_DRIVER_H + +#include + +struct mlx4_dev; + +enum mlx4_dev_event { + MLX4_DEV_EVENT_CATASTROPHIC_ERROR, + MLX4_DEV_EVENT_PORT_UP, + MLX4_DEV_EVENT_PORT_DOWN, + MLX4_DEV_EVENT_PORT_REINIT, + MLX4_DEV_EVENT_PKEY_UPDATE, + MLX4_DEV_EVENT_GUID_CHANGE, + MLX4_DEV_EVENT_SLAVE_INIT, + MLX4_DEV_EVENT_SLAVE_SHUTDOWN, + MLX4_DEV_EVENT_LID_CHANGE, + MLX4_DEV_EVENT_CLIENT_REREGISTER, + MLX4_DEV_EVENT_PORT_MGMT_CHANGE, +}; + +struct mlx4_interface { + void * (*add) (struct mlx4_dev *dev); + void (*remove)(struct mlx4_dev *dev, void *context); + void (*event) (struct mlx4_dev *dev, void *context, + enum mlx4_dev_event event, unsigned long param); + void * (*get_dev)(struct mlx4_dev *dev, void *context, u8 port); + struct list_head list; + enum mlx4_protocol protocol; +}; + +int mlx4_register_interface(struct mlx4_interface *intf); +void mlx4_unregister_interface(struct mlx4_interface *intf); + +void *mlx4_get_protocol_dev(struct mlx4_dev *dev, enum mlx4_protocol proto, int port); + +#endif /* MLX4_DRIVER_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/qp.h b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/qp.h new file mode 100755 index 0000000..380cd05 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/qp.h @@ -0,0 +1,347 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_QP_H +#define MLX4_QP_H + +#include + +#include + +#define MLX4_INVALID_LKEY 0x100 + +enum mlx4_qp_optpar { + MLX4_QP_OPTPAR_ALT_ADDR_PATH = 1 << 0, + MLX4_QP_OPTPAR_RRE = 1 << 1, + MLX4_QP_OPTPAR_RAE = 1 << 2, + MLX4_QP_OPTPAR_RWE = 1 << 3, + MLX4_QP_OPTPAR_PKEY_INDEX = 1 << 4, + MLX4_QP_OPTPAR_Q_KEY = 1 << 5, + MLX4_QP_OPTPAR_RNR_TIMEOUT = 1 << 6, + MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH = 1 << 7, + MLX4_QP_OPTPAR_SRA_MAX = 1 << 8, + MLX4_QP_OPTPAR_RRA_MAX = 1 << 9, + MLX4_QP_OPTPAR_PM_STATE = 1 << 10, + MLX4_QP_OPTPAR_RETRY_COUNT = 1 << 12, + MLX4_QP_OPTPAR_RNR_RETRY = 1 << 13, + MLX4_QP_OPTPAR_ACK_TIMEOUT = 1 << 14, + MLX4_QP_OPTPAR_SCHED_QUEUE = 1 << 16, + MLX4_QP_OPTPAR_COUNTER_INDEX = 1 << 20 +}; + +enum mlx4_qp_state { + MLX4_QP_STATE_RST = 0, + MLX4_QP_STATE_INIT = 1, + MLX4_QP_STATE_RTR = 2, + MLX4_QP_STATE_RTS = 3, + MLX4_QP_STATE_SQER = 4, + MLX4_QP_STATE_SQD = 5, + MLX4_QP_STATE_ERR = 6, + MLX4_QP_STATE_SQ_DRAINING = 7, + MLX4_QP_NUM_STATE +}; + +enum { + MLX4_QP_ST_RC = 0x0, + MLX4_QP_ST_UC = 0x1, + MLX4_QP_ST_RD = 0x2, + MLX4_QP_ST_UD = 0x3, + MLX4_QP_ST_XRC = 0x6, + MLX4_QP_ST_MLX = 0x7 +}; + +enum { + MLX4_QP_PM_MIGRATED = 0x3, + MLX4_QP_PM_ARMED = 0x0, + MLX4_QP_PM_REARM = 0x1 +}; + +enum { + /* params1 */ + MLX4_QP_BIT_SRE = 1 << 15, + MLX4_QP_BIT_SWE = 1 << 14, + MLX4_QP_BIT_SAE = 1 << 13, + /* params2 */ + MLX4_QP_BIT_RRE = 1 << 15, + MLX4_QP_BIT_RWE = 1 << 14, + MLX4_QP_BIT_RAE = 1 << 13, + MLX4_QP_BIT_RIC = 1 << 4, +}; + +enum { + MLX4_RSS_HASH_XOR = 0, + MLX4_RSS_HASH_TOP = 1, + + MLX4_RSS_UDP_IPV6 = 1 << 0, + MLX4_RSS_UDP_IPV4 = 1 << 1, + MLX4_RSS_TCP_IPV6 = 1 << 2, + MLX4_RSS_IPV6 = 1 << 3, + MLX4_RSS_TCP_IPV4 = 1 << 4, + MLX4_RSS_IPV4 = 1 << 5, + + /* offset of mlx4_rss_context within mlx4_qp_context.pri_path */ + MLX4_RSS_OFFSET_IN_QPC_PRI_PATH = 0x24, + /* offset of being RSS indirection QP within mlx4_qp_context.flags */ + MLX4_RSS_QPC_FLAG_OFFSET = 13, +}; + +struct mlx4_rss_context { + __be32 base_qpn; + __be32 default_qpn; + u16 reserved; + u8 hash_fn; + u8 flags; + __be32 rss_key[10]; + __be32 base_qpn_udp; +}; + +struct mlx4_qp_path { + u8 fl; + u8 reserved1[1]; + u8 disable_pkey_check; + u8 pkey_index; + u8 counter_index; + u8 grh_mylmc; + __be16 rlid; + u8 ackto; + u8 mgid_index; + u8 static_rate; + u8 hop_limit; + __be32 tclass_flowlabel; + u8 rgid[16]; + u8 sched_queue; + u8 vlan_index; + u8 reserved3[2]; + u8 reserved4[2]; + u8 dmac[6]; +}; + +struct mlx4_qp_context { + __be32 flags; + __be32 pd; + u8 mtu_msgmax; + u8 rq_size_stride; + u8 sq_size_stride; + u8 rlkey; + __be32 usr_page; + __be32 local_qpn; + __be32 remote_qpn; + struct mlx4_qp_path pri_path; + struct mlx4_qp_path alt_path; + __be32 params1; + u32 reserved1; + __be32 next_send_psn; + __be32 cqn_send; + u32 reserved2[2]; + __be32 last_acked_psn; + __be32 ssn; + __be32 params2; + __be32 rnr_nextrecvpsn; + __be32 xrcd; + __be32 cqn_recv; + __be64 db_rec_addr; + __be32 qkey; + __be32 srqn; + __be32 msn; + __be16 rq_wqe_counter; + __be16 sq_wqe_counter; + u32 reserved3[2]; + __be32 param3; + __be32 nummmcpeers_basemkey; + u8 log_page_size; + u8 reserved4[2]; + u8 mtt_base_addr_h; + __be32 mtt_base_addr_l; + u32 reserved5[10]; +}; + +/* Which firmware version adds support for NEC (NoErrorCompletion) bit */ +#define MLX4_FW_VER_WQE_CTRL_NEC mlx4_fw_ver(2, 2, 232) + +enum { + MLX4_WQE_CTRL_NEC = 1 << 29, + MLX4_WQE_CTRL_FENCE = 1 << 6, + MLX4_WQE_CTRL_CQ_UPDATE = 3 << 2, + MLX4_WQE_CTRL_SOLICITED = 1 << 1, + MLX4_WQE_CTRL_IP_CSUM = 1 << 4, + MLX4_WQE_CTRL_TCP_UDP_CSUM = 1 << 5, + MLX4_WQE_CTRL_INS_VLAN = 1 << 6, + MLX4_WQE_CTRL_STRONG_ORDER = 1 << 7, + MLX4_WQE_CTRL_FORCE_LOOPBACK = 1 << 0, +}; + +struct mlx4_wqe_ctrl_seg { + __be32 owner_opcode; + __be16 vlan_tag; + u8 ins_vlan; + u8 fence_size; + /* + * High 24 bits are SRC remote buffer; low 8 bits are flags: + * [7] SO (strong ordering) + * [5] TCP/UDP checksum + * [4] IP checksum + * [3:2] C (generate completion queue entry) + * [1] SE (solicited event) + * [0] FL (force loopback) + */ + union { + __be32 srcrb_flags; + __be16 srcrb_flags16[2]; + }; + /* + * imm is immediate data for send/RDMA write w/ immediate; + * also invalidation key for send with invalidate; input + * modifier for WQEs on CCQs. + */ + __be32 imm; +}; + +enum { + MLX4_WQE_MLX_VL15 = 1 << 17, + MLX4_WQE_MLX_SLR = 1 << 16 +}; + +struct mlx4_wqe_mlx_seg { + u8 owner; + u8 reserved1[2]; + u8 opcode; + u8 reserved2[3]; + u8 size; + /* + * [17] VL15 + * [16] SLR + * [15:12] static rate + * [11:8] SL + * [4] ICRC + * [3:2] C + * [0] FL (force loopback) + */ + __be32 flags; + __be16 rlid; + u16 reserved3; +}; + +struct mlx4_wqe_datagram_seg { + __be32 av[8]; + __be32 dqpn; + __be32 qkey; + __be16 vlan; + u8 mac[6]; +}; + +struct mlx4_wqe_lso_seg { + __be32 mss_hdr_size; + __be32 header[0]; +}; + +struct mlx4_wqe_bind_seg { + __be32 flags1; + __be32 flags2; + __be32 new_rkey; + __be32 lkey; + __be64 addr; + __be64 length; +}; + +enum { + MLX4_WQE_FMR_PERM_LOCAL_READ = 1 << 27, + MLX4_WQE_FMR_PERM_LOCAL_WRITE = 1 << 28, + MLX4_WQE_FMR_PERM_REMOTE_READ = 1 << 29, + MLX4_WQE_FMR_PERM_REMOTE_WRITE = 1 << 30, + MLX4_WQE_FMR_PERM_ATOMIC = 1 << 31 +}; + +struct mlx4_wqe_fmr_seg { + __be32 flags; + __be32 mem_key; + __be64 buf_list; + __be64 start_addr; + __be64 reg_len; + __be32 offset; + __be32 page_size; + u32 reserved[2]; +}; + +struct mlx4_wqe_fmr_ext_seg { + u8 flags; + u8 reserved; + __be16 app_mask; + __be16 wire_app_tag; + __be16 mem_app_tag; + __be32 wire_ref_tag_base; + __be32 mem_ref_tag_base; +}; + +struct mlx4_wqe_local_inval_seg { + __be32 flags; + u32 reserved1; + __be32 mem_key; + u32 reserved2[2]; + __be32 guest_id; + __be64 pa; +}; + +struct mlx4_wqe_raddr_seg { + __be64 raddr; + __be32 rkey; + u32 reserved; +}; + +struct mlx4_wqe_atomic_seg { + __be64 swap_add; + __be64 compare; +}; + +struct mlx4_wqe_masked_atomic_seg { + __be64 swap_add; + __be64 compare; + __be64 swap_add_mask; + __be64 compare_mask; +}; + +struct mlx4_wqe_data_seg { + __be32 byte_count; + __be32 lkey; + __be64 addr; +}; + +enum { + MLX4_INLINE_ALIGN = 64, + MLX4_INLINE_SEG = 1 << 31, +}; + +struct mlx4_wqe_inline_seg { + __be32 byte_count; +}; + +int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, + struct mlx4_qp_context *context, enum mlx4_qp_optpar optpar, + int sqd_event, struct mlx4_qp *qp); + +int mlx4_qp_query(struct mlx4_dev *dev, struct mlx4_qp *qp, + struct mlx4_qp_context *context); + +int mlx4_qp_to_ready(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + struct mlx4_qp_context *context, + struct mlx4_qp *qp, enum mlx4_qp_state *qp_state); + +static inline struct mlx4_qp *__mlx4_qp_lookup(struct mlx4_dev *dev, u32 qpn) +{ + return radix_tree_lookup(&dev->qp_table_tree, qpn & (dev->caps.num_qps - 1)); +} + +void mlx4_qp_remove(struct mlx4_dev *dev, struct mlx4_qp *qp); + +#endif /* MLX4_QP_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/srq.h b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/srq.h new file mode 100755 index 0000000..c78d9fd --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/linux/mlx4/srq.h @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_SRQ_H +#define MLX4_SRQ_H + +struct mlx4_wqe_srq_next_seg { + u16 reserved1; + __be16 next_wqe_index; + u32 reserved2[3]; +}; + +#endif /* MLX4_SRQ_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_mad.h b/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_mad.h new file mode 100755 index 0000000..a03f4b0 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_mad.h @@ -0,0 +1,645 @@ +/* + * Copyright (c) 2004, 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2004 Infinicon Corporation. All rights reserved. + * Copyright (c) 2004 Intel Corporation. All rights reserved. + * Copyright (c) 2004 Topspin Corporation. All rights reserved. + * Copyright (c) 2004-2006 Voltaire Corporation. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#if !defined(IB_MAD_H) +#define IB_MAD_H + +#include + +#include + +/* Management base version */ +#define IB_MGMT_BASE_VERSION 1 + +/* Management classes */ +#define IB_MGMT_CLASS_SUBN_LID_ROUTED 0x01 +#define IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE 0x81 +#define IB_MGMT_CLASS_SUBN_ADM 0x03 +#define IB_MGMT_CLASS_PERF_MGMT 0x04 +#define IB_MGMT_CLASS_BM 0x05 +#define IB_MGMT_CLASS_DEVICE_MGMT 0x06 +#define IB_MGMT_CLASS_CM 0x07 +#define IB_MGMT_CLASS_SNMP 0x08 +#define IB_MGMT_CLASS_DEVICE_ADM 0x10 +#define IB_MGMT_CLASS_BOOT_MGMT 0x11 +#define IB_MGMT_CLASS_BIS 0x12 +#define IB_MGMT_CLASS_CONG_MGMT 0x21 +#define IB_MGMT_CLASS_VENDOR_RANGE2_START 0x30 +#define IB_MGMT_CLASS_VENDOR_RANGE2_END 0x4F + +#define IB_OPENIB_OUI (0x001405) + +/* Management methods */ +#define IB_MGMT_METHOD_GET 0x01 +#define IB_MGMT_METHOD_SET 0x02 +#define IB_MGMT_METHOD_GET_RESP 0x81 +#define IB_MGMT_METHOD_SEND 0x03 +#define IB_MGMT_METHOD_TRAP 0x05 +#define IB_MGMT_METHOD_REPORT 0x06 +#define IB_MGMT_METHOD_REPORT_RESP 0x86 +#define IB_MGMT_METHOD_TRAP_REPRESS 0x07 + +#define IB_MGMT_METHOD_RESP 0x80 +#define IB_BM_ATTR_MOD_RESP cpu_to_be32(1) + +#define IB_MGMT_MAX_METHODS 128 + +/* MAD Status field bit masks */ +#define IB_MGMT_MAD_STATUS_SUCCESS 0x0000 +#define IB_MGMT_MAD_STATUS_BUSY 0x0001 +#define IB_MGMT_MAD_STATUS_REDIRECT_REQD 0x0002 +#define IB_MGMT_MAD_STATUS_BAD_VERSION 0x0004 +#define IB_MGMT_MAD_STATUS_UNSUPPORTED_METHOD 0x0008 +#define IB_MGMT_MAD_STATUS_UNSUPPORTED_METHOD_ATTRIB 0x000c +#define IB_MGMT_MAD_STATUS_INVALID_ATTRIB_VALUE 0x001c + +/* RMPP information */ +#define IB_MGMT_RMPP_VERSION 1 + +#define IB_MGMT_RMPP_TYPE_DATA 1 +#define IB_MGMT_RMPP_TYPE_ACK 2 +#define IB_MGMT_RMPP_TYPE_STOP 3 +#define IB_MGMT_RMPP_TYPE_ABORT 4 + +#define IB_MGMT_RMPP_FLAG_ACTIVE 1 +#define IB_MGMT_RMPP_FLAG_FIRST (1<<1) +#define IB_MGMT_RMPP_FLAG_LAST (1<<2) + +#define IB_MGMT_RMPP_NO_RESPTIME 0x1F + +#define IB_MGMT_RMPP_STATUS_SUCCESS 0 +#define IB_MGMT_RMPP_STATUS_RESX 1 +#define IB_MGMT_RMPP_STATUS_ABORT_MIN 118 +#define IB_MGMT_RMPP_STATUS_T2L 118 +#define IB_MGMT_RMPP_STATUS_BAD_LEN 119 +#define IB_MGMT_RMPP_STATUS_BAD_SEG 120 +#define IB_MGMT_RMPP_STATUS_BADT 121 +#define IB_MGMT_RMPP_STATUS_W2S 122 +#define IB_MGMT_RMPP_STATUS_S2B 123 +#define IB_MGMT_RMPP_STATUS_BAD_STATUS 124 +#define IB_MGMT_RMPP_STATUS_UNV 125 +#define IB_MGMT_RMPP_STATUS_TMR 126 +#define IB_MGMT_RMPP_STATUS_UNSPEC 127 +#define IB_MGMT_RMPP_STATUS_ABORT_MAX 127 + +#define IB_QP0 0 +#define IB_QP1 cpu_to_be32(1) +#define IB_QP1_QKEY 0x80010000 +#define IB_QP_SET_QKEY 0x80000000 + +#define IB_DEFAULT_PKEY_PARTIAL 0x7FFF +#define IB_DEFAULT_PKEY_FULL 0xFFFF + +enum { + IB_MGMT_MAD_HDR = 24, + IB_MGMT_MAD_DATA = 232, + IB_MGMT_RMPP_HDR = 36, + IB_MGMT_RMPP_DATA = 220, + IB_MGMT_VENDOR_HDR = 40, + IB_MGMT_VENDOR_DATA = 216, + IB_MGMT_SA_HDR = 56, + IB_MGMT_SA_DATA = 200, + IB_MGMT_DEVICE_HDR = 64, + IB_MGMT_DEVICE_DATA = 192, +}; + +struct ib_mad_hdr { + u8 base_version; + u8 mgmt_class; + u8 class_version; + u8 method; + __be16 status; + __be16 class_specific; + __be64 tid; + __be16 attr_id; + __be16 resv; + __be32 attr_mod; +}; + +struct ib_rmpp_hdr { + u8 rmpp_version; + u8 rmpp_type; + u8 rmpp_rtime_flags; + u8 rmpp_status; + __be32 seg_num; + __be32 paylen_newwin; +}; + +typedef u64 __bitwise ib_sa_comp_mask; + +#define IB_SA_COMP_MASK(n) ((__force ib_sa_comp_mask) cpu_to_be64(1ull << (n))) + +/* + * ib_sa_hdr and ib_sa_mad structures must be packed because they have + * 64-bit fields that are only 32-bit aligned. 64-bit architectures will + * lay them out wrong otherwise. (And unfortunately they are sent on + * the wire so we can't change the layout) + */ +struct ib_sa_hdr { + __be64 sm_key; + __be16 attr_offset; + __be16 reserved; + ib_sa_comp_mask comp_mask; +} __attribute__ ((packed)); + +struct ib_mad { + struct ib_mad_hdr mad_hdr; + u8 data[IB_MGMT_MAD_DATA]; +}; + +struct ib_rmpp_mad { + struct ib_mad_hdr mad_hdr; + struct ib_rmpp_hdr rmpp_hdr; + u8 data[IB_MGMT_RMPP_DATA]; +}; + +struct ib_sa_mad { + struct ib_mad_hdr mad_hdr; + struct ib_rmpp_hdr rmpp_hdr; + struct ib_sa_hdr sa_hdr; + u8 data[IB_MGMT_SA_DATA]; +} __attribute__ ((packed)); + +struct ib_vendor_mad { + struct ib_mad_hdr mad_hdr; + struct ib_rmpp_hdr rmpp_hdr; + u8 reserved; + u8 oui[3]; + u8 data[IB_MGMT_VENDOR_DATA]; +}; + +struct ib_class_port_info { + u8 base_version; + u8 class_version; + __be16 capability_mask; + u8 reserved[3]; + u8 resp_time_value; + u8 redirect_gid[16]; + __be32 redirect_tcslfl; + __be16 redirect_lid; + __be16 redirect_pkey; + __be32 redirect_qp; + __be32 redirect_qkey; + u8 trap_gid[16]; + __be32 trap_tcslfl; + __be16 trap_lid; + __be16 trap_pkey; + __be32 trap_hlqp; + __be32 trap_qkey; +}; + +/** + * ib_mad_send_buf - MAD data buffer and work request for sends. + * @next: A pointer used to chain together MADs for posting. + * @mad: References an allocated MAD data buffer for MADs that do not have + * RMPP active. For MADs using RMPP, references the common and management + * class specific headers. + * @mad_agent: MAD agent that allocated the buffer. + * @ah: The address handle to use when sending the MAD. + * @context: User-controlled context fields. + * @hdr_len: Indicates the size of the data header of the MAD. This length + * includes the common MAD, RMPP, and class specific headers. + * @data_len: Indicates the total size of user-transferred data. + * @seg_count: The number of RMPP segments allocated for this send. + * @seg_size: Size of each RMPP segment. + * @timeout_ms: Time to wait for a response. + * @retries: Number of times to retry a request for a response. For MADs + * using RMPP, this applies per window. On completion, returns the number + * of retries needed to complete the transfer. + * + * Users are responsible for initializing the MAD buffer itself, with the + * exception of any RMPP header. Additional segment buffer space allocated + * beyond data_len is padding. + */ +struct ib_mad_send_buf { + struct ib_mad_send_buf *next; + void *mad; + struct ib_mad_agent *mad_agent; + struct ib_ah *ah; + void *context[2]; + int hdr_len; + int data_len; + int seg_count; + int seg_size; + int timeout_ms; + int retries; +}; + +/** + * ib_response_mad - Returns if the specified MAD has been generated in + * response to a sent request or trap. + */ +int ib_response_mad(struct ib_mad *mad); + +/** + * ib_get_rmpp_resptime - Returns the RMPP response time. + * @rmpp_hdr: An RMPP header. + */ +static inline u8 ib_get_rmpp_resptime(struct ib_rmpp_hdr *rmpp_hdr) +{ + return rmpp_hdr->rmpp_rtime_flags >> 3; +} + +/** + * ib_get_rmpp_flags - Returns the RMPP flags. + * @rmpp_hdr: An RMPP header. + */ +static inline u8 ib_get_rmpp_flags(struct ib_rmpp_hdr *rmpp_hdr) +{ + return rmpp_hdr->rmpp_rtime_flags & 0x7; +} + +/** + * ib_set_rmpp_resptime - Sets the response time in an RMPP header. + * @rmpp_hdr: An RMPP header. + * @rtime: The response time to set. + */ +static inline void ib_set_rmpp_resptime(struct ib_rmpp_hdr *rmpp_hdr, u8 rtime) +{ + rmpp_hdr->rmpp_rtime_flags = ib_get_rmpp_flags(rmpp_hdr) | (rtime << 3); +} + +/** + * ib_set_rmpp_flags - Sets the flags in an RMPP header. + * @rmpp_hdr: An RMPP header. + * @flags: The flags to set. + */ +static inline void ib_set_rmpp_flags(struct ib_rmpp_hdr *rmpp_hdr, u8 flags) +{ + rmpp_hdr->rmpp_rtime_flags = (rmpp_hdr->rmpp_rtime_flags & 0xF8) | + (flags & 0x7); +} + +struct ib_mad_agent; +struct ib_mad_send_wc; +struct ib_mad_recv_wc; + +/** + * ib_mad_send_handler - callback handler for a sent MAD. + * @mad_agent: MAD agent that sent the MAD. + * @mad_send_wc: Send work completion information on the sent MAD. + */ +typedef void (*ib_mad_send_handler)(struct ib_mad_agent *mad_agent, + struct ib_mad_send_wc *mad_send_wc); + +/** + * ib_mad_snoop_handler - Callback handler for snooping sent MADs. + * @mad_agent: MAD agent that snooped the MAD. + * @send_wr: Work request information on the sent MAD. + * @mad_send_wc: Work completion information on the sent MAD. Valid + * only for snooping that occurs on a send completion. + * + * Clients snooping MADs should not modify data referenced by the @send_wr + * or @mad_send_wc. + */ +typedef void (*ib_mad_snoop_handler)(struct ib_mad_agent *mad_agent, + struct ib_mad_send_buf *send_buf, + struct ib_mad_send_wc *mad_send_wc); + +/** + * ib_mad_recv_handler - callback handler for a received MAD. + * @mad_agent: MAD agent requesting the received MAD. + * @mad_recv_wc: Received work completion information on the received MAD. + * + * MADs received in response to a send request operation will be handed to + * the user before the send operation completes. All data buffers given + * to registered agents through this routine are owned by the receiving + * client, except for snooping agents. Clients snooping MADs should not + * modify the data referenced by @mad_recv_wc. + */ +typedef void (*ib_mad_recv_handler)(struct ib_mad_agent *mad_agent, + struct ib_mad_recv_wc *mad_recv_wc); + +/** + * ib_mad_agent - Used to track MAD registration with the access layer. + * @device: Reference to device registration is on. + * @qp: Reference to QP used for sending and receiving MADs. + * @mr: Memory region for system memory usable for DMA. + * @recv_handler: Callback handler for a received MAD. + * @send_handler: Callback handler for a sent MAD. + * @snoop_handler: Callback handler for snooped sent MADs. + * @context: User-specified context associated with this registration. + * @hi_tid: Access layer assigned transaction ID for this client. + * Unsolicited MADs sent by this client will have the upper 32-bits + * of their TID set to this value. + * @port_num: Port number on which QP is registered + * @rmpp_version: If set, indicates the RMPP version used by this agent. + */ +struct ib_mad_agent { + struct ib_device *device; + struct ib_qp *qp; + struct ib_mr *mr; + ib_mad_recv_handler recv_handler; + ib_mad_send_handler send_handler; + ib_mad_snoop_handler snoop_handler; + void *context; + u32 hi_tid; + u8 port_num; + u8 rmpp_version; +}; + +/** + * ib_mad_send_wc - MAD send completion information. + * @send_buf: Send MAD data buffer associated with the send MAD request. + * @status: Completion status. + * @vendor_err: Optional vendor error information returned with a failed + * request. + */ +struct ib_mad_send_wc { + struct ib_mad_send_buf *send_buf; + enum ib_wc_status status; + u32 vendor_err; +}; + +/** + * ib_mad_recv_buf - received MAD buffer information. + * @list: Reference to next data buffer for a received RMPP MAD. + * @grh: References a data buffer containing the global route header. + * The data refereced by this buffer is only valid if the GRH is + * valid. + * @mad: References the start of the received MAD. + */ +struct ib_mad_recv_buf { + struct list_head list; + struct ib_grh *grh; + struct ib_mad *mad; +}; + +/** + * ib_mad_recv_wc - received MAD information. + * @wc: Completion information for the received data. + * @recv_buf: Specifies the location of the received data buffer(s). + * @rmpp_list: Specifies a list of RMPP reassembled received MAD buffers. + * @mad_len: The length of the received MAD, without duplicated headers. + * + * For received response, the wr_id contains a pointer to the ib_mad_send_buf + * for the corresponding send request. + */ +struct ib_mad_recv_wc { + struct ib_wc *wc; + struct ib_mad_recv_buf recv_buf; + struct list_head rmpp_list; + int mad_len; +}; + +/** + * ib_mad_reg_req - MAD registration request + * @mgmt_class: Indicates which management class of MADs should be receive + * by the caller. This field is only required if the user wishes to + * receive unsolicited MADs, otherwise it should be 0. + * @mgmt_class_version: Indicates which version of MADs for the given + * management class to receive. + * @oui: Indicates IEEE OUI when mgmt_class is a vendor class + * in the range from 0x30 to 0x4f. Otherwise not used. + * @method_mask: The caller will receive unsolicited MADs for any method + * where @method_mask = 1. + */ +struct ib_mad_reg_req { + u8 mgmt_class; + u8 mgmt_class_version; + u8 oui[3]; + DECLARE_BITMAP(method_mask, IB_MGMT_MAX_METHODS); +}; + +/** + * ib_register_mad_agent - Register to send/receive MADs. + * @device: The device to register with. + * @port_num: The port on the specified device to use. + * @qp_type: Specifies which QP to access. Must be either + * IB_QPT_SMI or IB_QPT_GSI. + * @mad_reg_req: Specifies which unsolicited MADs should be received + * by the caller. This parameter may be NULL if the caller only + * wishes to receive solicited responses. + * @rmpp_version: If set, indicates that the client will send + * and receive MADs that contain the RMPP header for the given version. + * If set to 0, indicates that RMPP is not used by this client. + * @send_handler: The completion callback routine invoked after a send + * request has completed. + * @recv_handler: The completion callback routine invoked for a received + * MAD. + * @context: User specified context associated with the registration. + */ +struct ib_mad_agent *ib_register_mad_agent(struct ib_device *device, + u8 port_num, + enum ib_qp_type qp_type, + struct ib_mad_reg_req *mad_reg_req, + u8 rmpp_version, + ib_mad_send_handler send_handler, + ib_mad_recv_handler recv_handler, + void *context); + +enum ib_mad_snoop_flags { + /*IB_MAD_SNOOP_POSTED_SENDS = 1,*/ + /*IB_MAD_SNOOP_RMPP_SENDS = (1<<1),*/ + IB_MAD_SNOOP_SEND_COMPLETIONS = (1<<2), + /*IB_MAD_SNOOP_RMPP_SEND_COMPLETIONS = (1<<3),*/ + IB_MAD_SNOOP_RECVS = (1<<4) + /*IB_MAD_SNOOP_RMPP_RECVS = (1<<5),*/ + /*IB_MAD_SNOOP_REDIRECTED_QPS = (1<<6)*/ +}; + +/** + * ib_register_mad_snoop - Register to snoop sent and received MADs. + * @device: The device to register with. + * @port_num: The port on the specified device to use. + * @qp_type: Specifies which QP traffic to snoop. Must be either + * IB_QPT_SMI or IB_QPT_GSI. + * @mad_snoop_flags: Specifies information where snooping occurs. + * @send_handler: The callback routine invoked for a snooped send. + * @recv_handler: The callback routine invoked for a snooped receive. + * @context: User specified context associated with the registration. + */ +struct ib_mad_agent *ib_register_mad_snoop(struct ib_device *device, + u8 port_num, + enum ib_qp_type qp_type, + int mad_snoop_flags, + ib_mad_snoop_handler snoop_handler, + ib_mad_recv_handler recv_handler, + void *context); + +/** + * ib_unregister_mad_agent - Unregisters a client from using MAD services. + * @mad_agent: Corresponding MAD registration request to deregister. + * + * After invoking this routine, MAD services are no longer usable by the + * client on the associated QP. + */ +int ib_unregister_mad_agent(struct ib_mad_agent *mad_agent); + +/** + * ib_post_send_mad - Posts MAD(s) to the send queue of the QP associated + * with the registered client. + * @send_buf: Specifies the information needed to send the MAD(s). + * @bad_send_buf: Specifies the MAD on which an error was encountered. This + * parameter is optional if only a single MAD is posted. + * + * Sent MADs are not guaranteed to complete in the order that they were posted. + * + * If the MAD requires RMPP, the data buffer should contain a single copy + * of the common MAD, RMPP, and class specific headers, followed by the class + * defined data. If the class defined data would not divide evenly into + * RMPP segments, then space must be allocated at the end of the referenced + * buffer for any required padding. To indicate the amount of class defined + * data being transferred, the paylen_newwin field in the RMPP header should + * be set to the size of the class specific header plus the amount of class + * defined data being transferred. The paylen_newwin field should be + * specified in network-byte order. + */ +int ib_post_send_mad(struct ib_mad_send_buf *send_buf, + struct ib_mad_send_buf **bad_send_buf); + + +/** + * ib_free_recv_mad - Returns data buffers used to receive a MAD. + * @mad_recv_wc: Work completion information for a received MAD. + * + * Clients receiving MADs through their ib_mad_recv_handler must call this + * routine to return the work completion buffers to the access layer. + */ +void ib_free_recv_mad(struct ib_mad_recv_wc *mad_recv_wc); + +/** + * ib_cancel_mad - Cancels an outstanding send MAD operation. + * @mad_agent: Specifies the registration associated with sent MAD. + * @send_buf: Indicates the MAD to cancel. + * + * MADs will be returned to the user through the corresponding + * ib_mad_send_handler. + */ +void ib_cancel_mad(struct ib_mad_agent *mad_agent, + struct ib_mad_send_buf *send_buf); + +/** + * ib_modify_mad - Modifies an outstanding send MAD operation. + * @mad_agent: Specifies the registration associated with sent MAD. + * @send_buf: Indicates the MAD to modify. + * @timeout_ms: New timeout value for sent MAD. + * + * This call will reset the timeout value for a sent MAD to the specified + * value. + */ +int ib_modify_mad(struct ib_mad_agent *mad_agent, + struct ib_mad_send_buf *send_buf, u32 timeout_ms); + +/** + * ib_redirect_mad_qp - Registers a QP for MAD services. + * @qp: Reference to a QP that requires MAD services. + * @rmpp_version: If set, indicates that the client will send + * and receive MADs that contain the RMPP header for the given version. + * If set to 0, indicates that RMPP is not used by this client. + * @send_handler: The completion callback routine invoked after a send + * request has completed. + * @recv_handler: The completion callback routine invoked for a received + * MAD. + * @context: User specified context associated with the registration. + * + * Use of this call allows clients to use MAD services, such as RMPP, + * on user-owned QPs. After calling this routine, users may send + * MADs on the specified QP by calling ib_mad_post_send. + */ +struct ib_mad_agent *ib_redirect_mad_qp(struct ib_qp *qp, + u8 rmpp_version, + ib_mad_send_handler send_handler, + ib_mad_recv_handler recv_handler, + void *context); + +/** + * ib_process_mad_wc - Processes a work completion associated with a + * MAD sent or received on a redirected QP. + * @mad_agent: Specifies the registered MAD service using the redirected QP. + * @wc: References a work completion associated with a sent or received + * MAD segment. + * + * This routine is used to complete or continue processing on a MAD request. + * If the work completion is associated with a send operation, calling + * this routine is required to continue an RMPP transfer or to wait for a + * corresponding response, if it is a request. If the work completion is + * associated with a receive operation, calling this routine is required to + * process an inbound or outbound RMPP transfer, or to match a response MAD + * with its corresponding request. + */ +int ib_process_mad_wc(struct ib_mad_agent *mad_agent, + struct ib_wc *wc); + +/** + * ib_create_send_mad - Allocate and initialize a data buffer and work request + * for sending a MAD. + * @mad_agent: Specifies the registered MAD service to associate with the MAD. + * @remote_qpn: Specifies the QPN of the receiving node. + * @pkey_index: Specifies which PKey the MAD will be sent using. This field + * is valid only if the remote_qpn is QP 1. + * @rmpp_active: Indicates if the send will enable RMPP. + * @hdr_len: Indicates the size of the data header of the MAD. This length + * should include the common MAD header, RMPP header, plus any class + * specific header. + * @data_len: Indicates the size of any user-transferred data. The call will + * automatically adjust the allocated buffer size to account for any + * additional padding that may be necessary. + * @gfp_mask: GFP mask used for the memory allocation. + * + * This routine allocates a MAD for sending. The returned MAD send buffer + * will reference a data buffer usable for sending a MAD, along + * with an initialized work request structure. Users may modify the returned + * MAD data buffer before posting the send. + * + * The returned MAD header, class specific headers, and any padding will be + * cleared. Users are responsible for initializing the common MAD header, + * any class specific header, and MAD data area. + * If @rmpp_active is set, the RMPP header will be initialized for sending. + */ +struct ib_mad_send_buf *ib_create_send_mad(struct ib_mad_agent *mad_agent, + u32 remote_qpn, u16 pkey_index, + int rmpp_active, + int hdr_len, int data_len, + gfp_t gfp_mask); + +/** + * ib_is_mad_class_rmpp - returns whether given management class + * supports RMPP. + * @mgmt_class: management class + * + * This routine returns whether the management class supports RMPP. + */ +int ib_is_mad_class_rmpp(u8 mgmt_class); + +/** + * ib_get_mad_data_offset - returns the data offset for a given + * management class. + * @mgmt_class: management class + * + * This routine returns the data offset in the MAD for the management + * class requested. + */ +int ib_get_mad_data_offset(u8 mgmt_class); + +/** + * ib_get_rmpp_segment - returns the data buffer for a given RMPP segment. + * @send_buf: Previously allocated send data buffer. + * @seg_num: number of segment to return + * + * This routine returns a pointer to the data buffer of an RMPP MAD. + * Users must provide synchronization to @send_buf around this call. + */ +void *ib_get_rmpp_segment(struct ib_mad_send_buf *send_buf, int seg_num); + +/** + * ib_free_send_mad - Returns data buffers used to send a MAD. + * @send_buf: Previously allocated send data buffer. + */ +void ib_free_send_mad(struct ib_mad_send_buf *send_buf); + +#endif /* IB_MAD_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_smi.h b/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_smi.h new file mode 100755 index 0000000..c51dc4f --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_smi.h @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2004, 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2004 Infinicon Corporation. All rights reserved. + * Copyright (c) 2004 Intel Corporation. All rights reserved. + * Copyright (c) 2004 Topspin Corporation. All rights reserved. + * Copyright (c) 2004 Voltaire Corporation. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#if !defined(IB_SMI_H) +#define IB_SMI_H + +#include + +#define IB_SMP_DATA_SIZE 64 +#define IB_SMP_MAX_PATH_HOPS 64 + +struct ib_smp { + u8 base_version; + u8 mgmt_class; + u8 class_version; + u8 method; + __be16 status; + u8 hop_ptr; + u8 hop_cnt; + __be64 tid; + __be16 attr_id; + __be16 resv; + __be32 attr_mod; + __be64 mkey; + __be16 dr_slid; + __be16 dr_dlid; + u8 reserved[28]; + u8 data[IB_SMP_DATA_SIZE]; + u8 initial_path[IB_SMP_MAX_PATH_HOPS]; + u8 return_path[IB_SMP_MAX_PATH_HOPS]; +} __attribute__ ((packed)); + +#ifdef __VMKERNEL_MODULE__ +#define IB_SMP_DIRECTION __constant_cpu_to_be16(0x8000) + +/* Subnet management attributes */ +#define IB_SMP_ATTR_NOTICE __constant_cpu_to_be16(0x0002) +#define IB_SMP_ATTR_NODE_DESC __constant_cpu_to_be16(0x0010) +#define IB_SMP_ATTR_NODE_INFO __constant_cpu_to_be16(0x0011) +#define IB_SMP_ATTR_SWITCH_INFO __constant_cpu_to_be16(0x0012) +#define IB_SMP_ATTR_GUID_INFO __constant_cpu_to_be16(0x0014) +#define IB_SMP_ATTR_PORT_INFO __constant_cpu_to_be16(0x0015) +#define IB_SMP_ATTR_PKEY_TABLE __constant_cpu_to_be16(0x0016) +#define IB_SMP_ATTR_SL_TO_VL_TABLE __constant_cpu_to_be16(0x0017) +#define IB_SMP_ATTR_VL_ARB_TABLE __constant_cpu_to_be16(0x0018) +#define IB_SMP_ATTR_LINEAR_FORWARD_TABLE __constant_cpu_to_be16(0x0019) +#define IB_SMP_ATTR_RANDOM_FORWARD_TABLE __constant_cpu_to_be16(0x001A) +#define IB_SMP_ATTR_MCAST_FORWARD_TABLE __constant_cpu_to_be16(0x001B) +#define IB_SMP_ATTR_SM_INFO __constant_cpu_to_be16(0x0020) +#define IB_SMP_ATTR_VENDOR_DIAG __constant_cpu_to_be16(0x0030) +#define IB_SMP_ATTR_LED_INFO __constant_cpu_to_be16(0x0031) +#define IB_SMP_ATTR_VENDOR_MASK __constant_cpu_to_be16(0xFF00) +#else +#define IB_SMP_DIRECTION cpu_to_be16(0x8000) + +/* Subnet management attributes */ +#define IB_SMP_ATTR_NOTICE cpu_to_be16(0x0002) +#define IB_SMP_ATTR_NODE_DESC cpu_to_be16(0x0010) +#define IB_SMP_ATTR_NODE_INFO cpu_to_be16(0x0011) +#define IB_SMP_ATTR_SWITCH_INFO cpu_to_be16(0x0012) +#define IB_SMP_ATTR_GUID_INFO cpu_to_be16(0x0014) +#define IB_SMP_ATTR_PORT_INFO cpu_to_be16(0x0015) +#define IB_SMP_ATTR_PKEY_TABLE cpu_to_be16(0x0016) +#define IB_SMP_ATTR_SL_TO_VL_TABLE cpu_to_be16(0x0017) +#define IB_SMP_ATTR_VL_ARB_TABLE cpu_to_be16(0x0018) +#define IB_SMP_ATTR_LINEAR_FORWARD_TABLE cpu_to_be16(0x0019) +#define IB_SMP_ATTR_RANDOM_FORWARD_TABLE cpu_to_be16(0x001A) +#define IB_SMP_ATTR_MCAST_FORWARD_TABLE cpu_to_be16(0x001B) +#define IB_SMP_ATTR_SM_INFO cpu_to_be16(0x0020) +#define IB_SMP_ATTR_VENDOR_DIAG cpu_to_be16(0x0030) +#define IB_SMP_ATTR_LED_INFO cpu_to_be16(0x0031) +#define IB_SMP_ATTR_VENDOR_MASK cpu_to_be16(0xFF00) +#endif /* __VMKERNEL_MODULE__ */ + +struct ib_port_info { + __be64 mkey; + __be64 gid_prefix; + __be16 lid; + __be16 sm_lid; + __be32 cap_mask; + __be16 diag_code; + __be16 mkey_lease_period; + u8 local_port_num; + u8 link_width_enabled; + u8 link_width_supported; + u8 link_width_active; + u8 linkspeed_portstate; /* 4 bits, 4 bits */ + u8 portphysstate_linkdown; /* 4 bits, 4 bits */ + u8 mkeyprot_resv_lmc; /* 2 bits, 3, 3 */ + u8 linkspeedactive_enabled; /* 4 bits, 4 bits */ + u8 neighbormtu_mastersmsl; /* 4 bits, 4 bits */ + u8 vlcap_inittype; /* 4 bits, 4 bits */ + u8 vl_high_limit; + u8 vl_arb_high_cap; + u8 vl_arb_low_cap; + u8 inittypereply_mtucap; /* 4 bits, 4 bits */ + u8 vlstallcnt_hoqlife; /* 3 bits, 5 bits */ + u8 operationalvl_pei_peo_fpi_fpo; /* 4 bits, 1, 1, 1, 1 */ + __be16 mkey_violations; + __be16 pkey_violations; + __be16 qkey_violations; + u8 guid_cap; + u8 clientrereg_resv_subnetto; /* 1 bit, 2 bits, 5 */ + u8 resv_resptimevalue; /* 3 bits, 5 bits */ + u8 localphyerrors_overrunerrors; /* 4 bits, 4 bits */ + __be16 max_credit_hint; + u8 resv; + u8 link_roundtrip_latency[3]; +}; + +static inline u8 +ib_get_smp_direction(struct ib_smp *smp) +{ + return ((smp->status & IB_SMP_DIRECTION) == IB_SMP_DIRECTION); +} + +#endif /* IB_SMI_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_verbs.h b/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_verbs.h new file mode 100755 index 0000000..49aa34b --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/include/rdma/ib_verbs.h @@ -0,0 +1,2161 @@ +/* + * Copyright (c) 2004, 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2004 Infinicon Corporation. All rights reserved. + * Copyright (c) 2004 Intel Corporation. All rights reserved. + * Copyright (c) 2004 Topspin Corporation. All rights reserved. + * Copyright (c) 2004 Voltaire Corporation. All rights reserved. + * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. + * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#if !defined(IB_VERBS_H) +#define IB_VERBS_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* NOT _VMKERNEL_MODULE__ */ +#include + +extern struct workqueue_struct *ib_wq; + +union ib_gid { + u8 raw[16]; + struct { + __be64 subnet_prefix; + __be64 interface_id; + } global; +}; + +enum rdma_node_type { + /* IB values map to NodeInfo:NodeType. */ + RDMA_NODE_IB_CA = 1, + RDMA_NODE_IB_SWITCH, + RDMA_NODE_IB_ROUTER, + RDMA_NODE_RNIC +}; + +enum rdma_transport_type { + RDMA_TRANSPORT_IB, + RDMA_TRANSPORT_IWARP +}; + +enum rdma_transport_type +rdma_node_get_transport(enum rdma_node_type node_type) __attribute_const__; + +enum rdma_link_layer { + IB_LINK_LAYER_UNSPECIFIED, + IB_LINK_LAYER_INFINIBAND, + IB_LINK_LAYER_ETHERNET, +}; + +enum ib_device_cap_flags { + IB_DEVICE_RESIZE_MAX_WR = 1, + IB_DEVICE_BAD_PKEY_CNTR = (1<<1), + IB_DEVICE_BAD_QKEY_CNTR = (1<<2), + IB_DEVICE_RAW_MULTI = (1<<3), + IB_DEVICE_AUTO_PATH_MIG = (1<<4), + IB_DEVICE_CHANGE_PHY_PORT = (1<<5), + IB_DEVICE_UD_AV_PORT_ENFORCE = (1<<6), + IB_DEVICE_CURR_QP_STATE_MOD = (1<<7), + IB_DEVICE_SHUTDOWN_PORT = (1<<8), + IB_DEVICE_INIT_TYPE = (1<<9), + IB_DEVICE_PORT_ACTIVE_EVENT = (1<<10), + IB_DEVICE_SYS_IMAGE_GUID = (1<<11), + IB_DEVICE_RC_RNR_NAK_GEN = (1<<12), + IB_DEVICE_SRQ_RESIZE = (1<<13), + IB_DEVICE_N_NOTIFY_CQ = (1<<14), + IB_DEVICE_LOCAL_DMA_LKEY = (1<<15), + IB_DEVICE_RESERVED = (1<<16), /* old SEND_W_INV */ + IB_DEVICE_MEM_WINDOW = (1<<17), + /* + * Devices should set IB_DEVICE_UD_IP_SUM if they support + * insertion of UDP and TCP checksum on outgoing UD IPoIB + * messages and can verify the validity of checksum for + * incoming messages. Setting this flag implies that the + * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode. + */ + IB_DEVICE_UD_IP_CSUM = (1<<18), + IB_DEVICE_UD_TSO = (1<<19), + IB_DEVICE_XRC = (1<<20), + IB_DEVICE_MEM_MGT_EXTENSIONS = (1<<21), + IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1<<22), +}; + +enum ib_atomic_cap { + IB_ATOMIC_NONE, + IB_ATOMIC_HCA, + IB_ATOMIC_GLOB +}; + +struct ib_device_attr { + u64 fw_ver; + __be64 sys_image_guid; + u64 max_mr_size; + u64 page_size_cap; + u32 vendor_id; + u32 vendor_part_id; + u32 hw_ver; + int max_qp; + int max_qp_wr; + int device_cap_flags; + int max_sge; + int max_sge_rd; + int max_cq; + int max_cqe; + int max_mr; + int max_pd; + int max_qp_rd_atom; + int max_ee_rd_atom; + int max_res_rd_atom; + int max_qp_init_rd_atom; + int max_ee_init_rd_atom; + enum ib_atomic_cap atomic_cap; + enum ib_atomic_cap masked_atomic_cap; + int max_ee; + int max_rdd; + int max_mw; + int max_raw_ipv6_qp; + int max_raw_ethy_qp; + int max_mcast_grp; + int max_mcast_qp_attach; + int max_total_mcast_qp_attach; + int max_ah; + int max_fmr; + int max_map_per_fmr; + int max_srq; + int max_srq_wr; + int max_srq_sge; + unsigned int max_fast_reg_page_list_len; + u16 max_pkeys; + u8 local_ca_ack_delay; +}; + +enum ib_mtu { + IB_MTU_256 = 1, + IB_MTU_512 = 2, + IB_MTU_1024 = 3, + IB_MTU_2048 = 4, + IB_MTU_4096 = 5 +}; + +static inline int ib_mtu_enum_to_int(enum ib_mtu mtu) +{ + switch (mtu) { + case IB_MTU_256: return 256; + case IB_MTU_512: return 512; + case IB_MTU_1024: return 1024; + case IB_MTU_2048: return 2048; + case IB_MTU_4096: return 4096; + default: return -1; + } +} + +enum ib_port_state { + IB_PORT_NOP = 0, + IB_PORT_DOWN = 1, + IB_PORT_INIT = 2, + IB_PORT_ARMED = 3, + IB_PORT_ACTIVE = 4, + IB_PORT_ACTIVE_DEFER = 5 +}; + +enum ib_port_cap_flags { + IB_PORT_SM = 1 << 1, + IB_PORT_NOTICE_SUP = 1 << 2, + IB_PORT_TRAP_SUP = 1 << 3, + IB_PORT_OPT_IPD_SUP = 1 << 4, + IB_PORT_AUTO_MIGR_SUP = 1 << 5, + IB_PORT_SL_MAP_SUP = 1 << 6, + IB_PORT_MKEY_NVRAM = 1 << 7, + IB_PORT_PKEY_NVRAM = 1 << 8, + IB_PORT_LED_INFO_SUP = 1 << 9, + IB_PORT_SM_DISABLED = 1 << 10, + IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11, + IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12, + IB_PORT_EXTENDED_SPEEDS_SUP = 1 << 14, + IB_PORT_CM_SUP = 1 << 16, + IB_PORT_SNMP_TUNNEL_SUP = 1 << 17, + IB_PORT_REINIT_SUP = 1 << 18, + IB_PORT_DEVICE_MGMT_SUP = 1 << 19, + IB_PORT_VENDOR_CLASS_SUP = 1 << 20, + IB_PORT_DR_NOTICE_SUP = 1 << 21, + IB_PORT_CAP_MASK_NOTICE_SUP = 1 << 22, + IB_PORT_BOOT_MGMT_SUP = 1 << 23, + IB_PORT_LINK_LATENCY_SUP = 1 << 24, + IB_PORT_CLIENT_REG_SUP = 1 << 25 +}; + +enum ib_port_width { + IB_WIDTH_1X = 1, + IB_WIDTH_4X = 2, + IB_WIDTH_8X = 4, + IB_WIDTH_12X = 8 +}; + +static inline int ib_width_enum_to_int(enum ib_port_width width) +{ + switch (width) { + case IB_WIDTH_1X: return 1; + case IB_WIDTH_4X: return 4; + case IB_WIDTH_8X: return 8; + case IB_WIDTH_12X: return 12; + default: return -1; + } +} + +struct ib_protocol_stats { + /* TBD... */ +}; + +struct iw_protocol_stats { + u64 ipInReceives; + u64 ipInHdrErrors; + u64 ipInTooBigErrors; + u64 ipInNoRoutes; + u64 ipInAddrErrors; + u64 ipInUnknownProtos; + u64 ipInTruncatedPkts; + u64 ipInDiscards; + u64 ipInDelivers; + u64 ipOutForwDatagrams; + u64 ipOutRequests; + u64 ipOutDiscards; + u64 ipOutNoRoutes; + u64 ipReasmTimeout; + u64 ipReasmReqds; + u64 ipReasmOKs; + u64 ipReasmFails; + u64 ipFragOKs; + u64 ipFragFails; + u64 ipFragCreates; + u64 ipInMcastPkts; + u64 ipOutMcastPkts; + u64 ipInBcastPkts; + u64 ipOutBcastPkts; + + u64 tcpRtoAlgorithm; + u64 tcpRtoMin; + u64 tcpRtoMax; + u64 tcpMaxConn; + u64 tcpActiveOpens; + u64 tcpPassiveOpens; + u64 tcpAttemptFails; + u64 tcpEstabResets; + u64 tcpCurrEstab; + u64 tcpInSegs; + u64 tcpOutSegs; + u64 tcpRetransSegs; + u64 tcpInErrs; + u64 tcpOutRsts; +}; + +union rdma_protocol_stats { + struct ib_protocol_stats ib; + struct iw_protocol_stats iw; +}; + +struct ib_port_attr { + enum ib_port_state state; + enum ib_mtu max_mtu; + enum ib_mtu active_mtu; + int gid_tbl_len; + u32 port_cap_flags; + u32 max_msg_sz; + u32 bad_pkey_cntr; + u32 qkey_viol_cntr; + u16 pkey_tbl_len; + u16 lid; + u16 sm_lid; + u8 lmc; + u8 max_vl_num; + u8 sm_sl; + u8 subnet_timeout; + u8 init_type_reply; + u8 active_width; + u8 active_speed; + u8 phys_state; +}; + +enum ib_device_modify_flags { + IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0, + IB_DEVICE_MODIFY_NODE_DESC = 1 << 1 +}; + +struct ib_device_modify { + u64 sys_image_guid; + char node_desc[64]; +}; + +enum ib_port_modify_flags { + IB_PORT_SHUTDOWN = 1, + IB_PORT_INIT_TYPE = (1<<2), + IB_PORT_RESET_QKEY_CNTR = (1<<3) +}; + +struct ib_port_modify { + u32 set_port_cap_mask; + u32 clr_port_cap_mask; + u8 init_type; +}; + +enum ib_event_type { + IB_EVENT_CQ_ERR, + IB_EVENT_QP_FATAL, + IB_EVENT_QP_REQ_ERR, + IB_EVENT_QP_ACCESS_ERR, + IB_EVENT_COMM_EST, + IB_EVENT_SQ_DRAINED, + IB_EVENT_PATH_MIG, + IB_EVENT_PATH_MIG_ERR, + IB_EVENT_DEVICE_FATAL, + IB_EVENT_PORT_ACTIVE, + IB_EVENT_PORT_ERR, + IB_EVENT_LID_CHANGE, + IB_EVENT_PKEY_CHANGE, + IB_EVENT_SM_CHANGE, + IB_EVENT_SRQ_ERR, + IB_EVENT_SRQ_LIMIT_REACHED, + IB_EVENT_QP_LAST_WQE_REACHED, + IB_EVENT_CLIENT_REREGISTER, + IB_EVENT_GID_CHANGE, +}; + +struct ib_event { + struct ib_device *device; + union { + struct ib_cq *cq; + struct ib_qp *qp; + struct ib_srq *srq; + u8 port_num; + } element; + enum ib_event_type event; +}; + +struct ib_event_handler { + struct ib_device *device; + void (*handler)(struct ib_event_handler *, struct ib_event *); + struct list_head list; +}; + +#define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \ + do { \ + (_ptr)->device = _device; \ + (_ptr)->handler = _handler; \ + INIT_LIST_HEAD(&(_ptr)->list); \ + } while (0) + +struct ib_global_route { + union ib_gid dgid; + u32 flow_label; + u8 sgid_index; + u8 hop_limit; + u8 traffic_class; +}; + +struct ib_grh { + __be32 version_tclass_flow; + __be16 paylen; + u8 next_hdr; + u8 hop_limit; + union ib_gid sgid; + union ib_gid dgid; +}; + +enum { + IB_MULTICAST_QPN = 0x00ffffff +}; +#define BE32_IB_MULTICAST_QPN (__constant_cpu_to_be32(IB_MULTICAST_QPN)) + +#ifdef __VMKENREL_MODULE__ +#define IB_LID_PERMISSIVE (__constant_cpu_to_be16(0xFFFF)) +#else +#define IB_LID_PERMISSIVE cpu_to_be16(0xFFFF) +#endif /* __VMKENREL_MODULE__ */ + +enum ib_ah_flags { + IB_AH_GRH = 1 +}; + +enum ib_rate { + IB_RATE_PORT_CURRENT = 0, + IB_RATE_2_5_GBPS = 2, + IB_RATE_5_GBPS = 5, + IB_RATE_10_GBPS = 3, + IB_RATE_20_GBPS = 6, + IB_RATE_30_GBPS = 4, + IB_RATE_40_GBPS = 7, + IB_RATE_60_GBPS = 8, + IB_RATE_80_GBPS = 9, + IB_RATE_120_GBPS = 10, + IB_RATE_14_GBPS = 11, + IB_RATE_56_GBPS = 12, + IB_RATE_112_GBPS = 13, + IB_RATE_168_GBPS = 14, + IB_RATE_25_GBPS = 15, + IB_RATE_100_GBPS = 16, + IB_RATE_200_GBPS = 17, + IB_RATE_300_GBPS = 18 +}; + +/** + * ib_rate_to_mult - Convert the IB rate enum to a multiple of the + * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be + * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec. + * @rate: rate to convert. + */ +int ib_rate_to_mult(enum ib_rate rate) __attribute_const__; + +/** + * ib_rate_to_mbps - Convert the IB rate enum to Mbps. + * For example, IB_RATE_2_5_GBPS will be converted to 2500. + * @rate: rate to convert. + */ +int ib_rate_to_mbps(enum ib_rate rate) __attribute_const__; + +/** + * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate + * enum. + * @mult: multiple to convert. + */ +enum ib_rate mult_to_ib_rate(int mult) __attribute_const__; + +struct ib_ah_attr { + struct ib_global_route grh; + u16 dlid; + u8 sl; + u8 src_path_bits; + u8 static_rate; + u8 ah_flags; + u8 port_num; +}; + +enum ib_wc_status { + IB_WC_SUCCESS, + IB_WC_LOC_LEN_ERR, + IB_WC_LOC_QP_OP_ERR, + IB_WC_LOC_EEC_OP_ERR, + IB_WC_LOC_PROT_ERR, + IB_WC_WR_FLUSH_ERR, + IB_WC_MW_BIND_ERR, + IB_WC_BAD_RESP_ERR, + IB_WC_LOC_ACCESS_ERR, + IB_WC_REM_INV_REQ_ERR, + IB_WC_REM_ACCESS_ERR, + IB_WC_REM_OP_ERR, + IB_WC_RETRY_EXC_ERR, + IB_WC_RNR_RETRY_EXC_ERR, + IB_WC_LOC_RDD_VIOL_ERR, + IB_WC_REM_INV_RD_REQ_ERR, + IB_WC_REM_ABORT_ERR, + IB_WC_INV_EECN_ERR, + IB_WC_INV_EEC_STATE_ERR, + IB_WC_FATAL_ERR, + IB_WC_RESP_TIMEOUT_ERR, + IB_WC_GENERAL_ERR +}; + +enum ib_wc_opcode { + IB_WC_SEND, + IB_WC_RDMA_WRITE, + IB_WC_RDMA_READ, + IB_WC_COMP_SWAP, + IB_WC_FETCH_ADD, + IB_WC_BIND_MW, + IB_WC_LSO, + IB_WC_LOCAL_INV, + IB_WC_FAST_REG_MR, + IB_WC_MASKED_COMP_SWAP, + IB_WC_MASKED_FETCH_ADD, +/* + * Set value of IB_WC_RECV so consumers can test if a completion is a + * receive by testing (opcode & IB_WC_RECV). + */ + IB_WC_RECV = 1 << 7, + IB_WC_RECV_RDMA_WITH_IMM +}; + +enum ib_wc_flags { + IB_WC_GRH = 1, + IB_WC_WITH_IMM = (1<<1), + IB_WC_WITH_INVALIDATE = (1<<2), + IB_WC_IP_CSUM_OK = (1<<3), +}; + +struct ib_wc { + u64 wr_id; + enum ib_wc_status status; + enum ib_wc_opcode opcode; + u32 vendor_err; + u32 byte_len; + struct ib_qp *qp; + union { + __be32 imm_data; + u32 invalidate_rkey; + } ex; + u32 src_qp; + int wc_flags; + u16 pkey_index; + u16 slid; + u8 sl; + u8 dlid_path_bits; + u8 port_num; /* valid only for DR SMPs on switches */ +}; + +enum ib_cq_notify_flags { + IB_CQ_SOLICITED = 1 << 0, + IB_CQ_NEXT_COMP = 1 << 1, + IB_CQ_SOLICITED_MASK = IB_CQ_SOLICITED | IB_CQ_NEXT_COMP, + IB_CQ_REPORT_MISSED_EVENTS = 1 << 2, +}; + +enum ib_srq_type { + IB_SRQT_BASIC, + IB_SRQT_XRC +}; + +enum ib_srq_attr_mask { + IB_SRQ_MAX_WR = 1 << 0, + IB_SRQ_LIMIT = 1 << 1, +}; + +struct ib_srq_attr { + u32 max_wr; + u32 max_sge; + u32 srq_limit; +}; + +struct ib_srq_init_attr { + void (*event_handler)(struct ib_event *, void *); + void *srq_context; + struct ib_srq_attr attr; + enum ib_srq_type srq_type; + + union { + struct { + struct ib_xrcd *xrcd; + struct ib_cq *cq; + } xrc; + } ext; +}; + +struct ib_qp_cap { + u32 max_send_wr; + u32 max_recv_wr; + u32 max_send_sge; + u32 max_recv_sge; + u32 max_inline_data; +}; + +enum ib_sig_type { + IB_SIGNAL_ALL_WR, + IB_SIGNAL_REQ_WR +}; + +enum ib_qp_type { + /* + * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries + * here (and in that order) since the MAD layer uses them as + * indices into a 2-entry table. + */ + IB_QPT_SMI, + IB_QPT_GSI, + + IB_QPT_RC, + IB_QPT_UC, + IB_QPT_UD, + IB_QPT_RAW_IPV6, + IB_QPT_RAW_ETHERTYPE, + /* Save 8 for RAW_PACKET */ + IB_QPT_XRC_INI = 9, + IB_QPT_XRC_TGT, + IB_QPT_MAX +}; + +enum ib_qp_create_flags { + IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0, + IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1, +}; + +struct ib_qp_init_attr { + void (*event_handler)(struct ib_event *, void *); + void *qp_context; + struct ib_cq *send_cq; + struct ib_cq *recv_cq; + struct ib_srq *srq; + struct ib_xrcd *xrcd; /* XRC TGT QPs only */ + struct ib_qp_cap cap; + enum ib_sig_type sq_sig_type; + enum ib_qp_type qp_type; + enum ib_qp_create_flags create_flags; + u8 port_num; /* special QP types only */ +}; + +struct ib_qp_open_attr { + void (*event_handler)(struct ib_event *, void *); + void *qp_context; + u32 qp_num; + enum ib_qp_type qp_type; +}; + +enum ib_rnr_timeout { + IB_RNR_TIMER_655_36 = 0, + IB_RNR_TIMER_000_01 = 1, + IB_RNR_TIMER_000_02 = 2, + IB_RNR_TIMER_000_03 = 3, + IB_RNR_TIMER_000_04 = 4, + IB_RNR_TIMER_000_06 = 5, + IB_RNR_TIMER_000_08 = 6, + IB_RNR_TIMER_000_12 = 7, + IB_RNR_TIMER_000_16 = 8, + IB_RNR_TIMER_000_24 = 9, + IB_RNR_TIMER_000_32 = 10, + IB_RNR_TIMER_000_48 = 11, + IB_RNR_TIMER_000_64 = 12, + IB_RNR_TIMER_000_96 = 13, + IB_RNR_TIMER_001_28 = 14, + IB_RNR_TIMER_001_92 = 15, + IB_RNR_TIMER_002_56 = 16, + IB_RNR_TIMER_003_84 = 17, + IB_RNR_TIMER_005_12 = 18, + IB_RNR_TIMER_007_68 = 19, + IB_RNR_TIMER_010_24 = 20, + IB_RNR_TIMER_015_36 = 21, + IB_RNR_TIMER_020_48 = 22, + IB_RNR_TIMER_030_72 = 23, + IB_RNR_TIMER_040_96 = 24, + IB_RNR_TIMER_061_44 = 25, + IB_RNR_TIMER_081_92 = 26, + IB_RNR_TIMER_122_88 = 27, + IB_RNR_TIMER_163_84 = 28, + IB_RNR_TIMER_245_76 = 29, + IB_RNR_TIMER_327_68 = 30, + IB_RNR_TIMER_491_52 = 31 +}; + +enum ib_qp_attr_mask { + IB_QP_STATE = 1, + IB_QP_CUR_STATE = (1<<1), + IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2), + IB_QP_ACCESS_FLAGS = (1<<3), + IB_QP_PKEY_INDEX = (1<<4), + IB_QP_PORT = (1<<5), + IB_QP_QKEY = (1<<6), + IB_QP_AV = (1<<7), + IB_QP_PATH_MTU = (1<<8), + IB_QP_TIMEOUT = (1<<9), + IB_QP_RETRY_CNT = (1<<10), + IB_QP_RNR_RETRY = (1<<11), + IB_QP_RQ_PSN = (1<<12), + IB_QP_MAX_QP_RD_ATOMIC = (1<<13), + IB_QP_ALT_PATH = (1<<14), + IB_QP_MIN_RNR_TIMER = (1<<15), + IB_QP_SQ_PSN = (1<<16), + IB_QP_MAX_DEST_RD_ATOMIC = (1<<17), + IB_QP_PATH_MIG_STATE = (1<<18), + IB_QP_CAP = (1<<19), + IB_QP_DEST_QPN = (1<<20) +}; + +enum ib_qp_state { + IB_QPS_RESET, + IB_QPS_INIT, + IB_QPS_RTR, + IB_QPS_RTS, + IB_QPS_SQD, + IB_QPS_SQE, + IB_QPS_ERR +}; + +enum ib_mig_state { + IB_MIG_MIGRATED, + IB_MIG_REARM, + IB_MIG_ARMED +}; + +struct ib_qp_attr { + enum ib_qp_state qp_state; + enum ib_qp_state cur_qp_state; + enum ib_mtu path_mtu; + enum ib_mig_state path_mig_state; + u32 qkey; + u32 rq_psn; + u32 sq_psn; + u32 dest_qp_num; + int qp_access_flags; + struct ib_qp_cap cap; + struct ib_ah_attr ah_attr; + struct ib_ah_attr alt_ah_attr; + u16 pkey_index; + u16 alt_pkey_index; + u8 en_sqd_async_notify; + u8 sq_draining; + u8 max_rd_atomic; + u8 max_dest_rd_atomic; + u8 min_rnr_timer; + u8 port_num; + u8 timeout; + u8 retry_cnt; + u8 rnr_retry; + u8 alt_port_num; + u8 alt_timeout; +}; + +enum ib_wr_opcode { + IB_WR_RDMA_WRITE, + IB_WR_RDMA_WRITE_WITH_IMM, + IB_WR_SEND, + IB_WR_SEND_WITH_IMM, + IB_WR_RDMA_READ, + IB_WR_ATOMIC_CMP_AND_SWP, + IB_WR_ATOMIC_FETCH_AND_ADD, + IB_WR_LSO, + IB_WR_SEND_WITH_INV, + IB_WR_RDMA_READ_WITH_INV, + IB_WR_LOCAL_INV, + IB_WR_FAST_REG_MR, + IB_WR_MASKED_ATOMIC_CMP_AND_SWP, + IB_WR_MASKED_ATOMIC_FETCH_AND_ADD, +}; + +enum ib_send_flags { + IB_SEND_FENCE = 1, + IB_SEND_SIGNALED = (1<<1), + IB_SEND_SOLICITED = (1<<2), + IB_SEND_INLINE = (1<<3), + IB_SEND_IP_CSUM = (1<<4) +}; + +struct ib_sge { + u64 addr; + u32 length; + u32 lkey; +}; + +struct ib_fast_reg_page_list { + struct ib_device *device; + u64 *page_list; + unsigned int max_page_list_len; +}; + +struct ib_send_wr { + struct ib_send_wr *next; + u64 wr_id; + struct ib_sge *sg_list; + int num_sge; + enum ib_wr_opcode opcode; + int send_flags; + union { + __be32 imm_data; + u32 invalidate_rkey; + } ex; + union { + struct { + u64 remote_addr; + u32 rkey; + } rdma; + struct { + u64 remote_addr; + u64 compare_add; + u64 swap; + u64 compare_add_mask; + u64 swap_mask; + u32 rkey; + } atomic; + struct { + struct ib_ah *ah; + void *header; + int hlen; + int mss; + u32 remote_qpn; + u32 remote_qkey; + u16 pkey_index; /* valid for GSI only */ + u8 port_num; /* valid for DR SMPs on switch only */ + } ud; + struct { + u64 iova_start; + struct ib_fast_reg_page_list *page_list; + unsigned int page_shift; + unsigned int page_list_len; + u32 length; + int access_flags; + u32 rkey; + } fast_reg; + } wr; + u32 xrc_remote_srq_num; /* XRC TGT QPs only */ +}; + +struct ib_recv_wr { + struct ib_recv_wr *next; + u64 wr_id; + struct ib_sge *sg_list; + int num_sge; +}; + +enum ib_access_flags { + IB_ACCESS_LOCAL_WRITE = 1, + IB_ACCESS_REMOTE_WRITE = (1<<1), + IB_ACCESS_REMOTE_READ = (1<<2), + IB_ACCESS_REMOTE_ATOMIC = (1<<3), + IB_ACCESS_MW_BIND = (1<<4) +}; + +struct ib_phys_buf { + u64 addr; + u64 size; +}; + +struct ib_mr_attr { + struct ib_pd *pd; + u64 device_virt_addr; + u64 size; + int mr_access_flags; + u32 lkey; + u32 rkey; +}; + +enum ib_mr_rereg_flags { + IB_MR_REREG_TRANS = 1, + IB_MR_REREG_PD = (1<<1), + IB_MR_REREG_ACCESS = (1<<2) +}; + +struct ib_mw_bind { + struct ib_mr *mr; + u64 wr_id; + u64 addr; + u32 length; + int send_flags; + int mw_access_flags; +}; + +struct ib_fmr_attr { + int max_pages; + int max_maps; + u8 page_shift; +}; + +struct ib_ucontext { + struct ib_device *device; + struct list_head pd_list; + struct list_head mr_list; + struct list_head mw_list; + struct list_head cq_list; + struct list_head qp_list; + struct list_head srq_list; + struct list_head ah_list; + struct list_head xrcd_list; + int closing; +}; + +struct ib_uobject { + u64 user_handle; /* handle given to us by userspace */ + struct ib_ucontext *context; /* associated user context */ + void *object; /* containing object */ + struct list_head list; /* link to context's list */ + int id; /* index into kernel idr */ + struct kref ref; + struct rw_semaphore mutex; /* protects .live */ + int live; +}; + +struct ib_udata { + void __user *inbuf; + void __user *outbuf; + size_t inlen; + size_t outlen; +}; + +struct ib_pd { + struct ib_device *device; + struct ib_uobject *uobject; + atomic_t usecnt; /* count all resources */ +}; + +struct ib_xrcd { + struct ib_device *device; + atomic_t usecnt; /* count all exposed resources */ + struct inode *inode; + + struct mutex tgt_qp_mutex; + struct list_head tgt_qp_list; +}; + +struct ib_ah { + struct ib_device *device; + struct ib_pd *pd; + struct ib_uobject *uobject; +}; + +typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context); + +struct ib_cq { + struct ib_device *device; + struct ib_uobject *uobject; + ib_comp_handler comp_handler; + void (*event_handler)(struct ib_event *, void *); + void *cq_context; + int cqe; + atomic_t usecnt; /* count number of work queues */ +}; + +struct ib_srq { + struct ib_device *device; + struct ib_pd *pd; + struct ib_uobject *uobject; + void (*event_handler)(struct ib_event *, void *); + void *srq_context; + enum ib_srq_type srq_type; + atomic_t usecnt; + + union { + struct { + struct ib_xrcd *xrcd; + struct ib_cq *cq; + u32 srq_num; + } xrc; + } ext; +}; + +struct ib_qp { + struct ib_device *device; + struct ib_pd *pd; + struct ib_cq *send_cq; + struct ib_cq *recv_cq; + struct ib_srq *srq; + struct ib_xrcd *xrcd; /* XRC TGT QPs only */ + struct list_head xrcd_list; + atomic_t usecnt; /* count times opened */ + struct list_head open_list; + struct ib_qp *real_qp; + struct ib_uobject *uobject; + void (*event_handler)(struct ib_event *, void *); + void *qp_context; + u32 qp_num; + enum ib_qp_type qp_type; +#ifdef __VMKERNEL_MODULE__ + /* private data, used by VMware ESX IPoIB */ + void *priv; +#endif +}; + +struct ib_mr { + struct ib_device *device; + struct ib_pd *pd; + struct ib_uobject *uobject; + u32 lkey; + u32 rkey; + atomic_t usecnt; /* count number of MWs */ +}; + +struct ib_mw { + struct ib_device *device; + struct ib_pd *pd; + struct ib_uobject *uobject; + u32 rkey; +}; + +struct ib_fmr { + struct ib_device *device; + struct ib_pd *pd; + struct list_head list; + u32 lkey; + u32 rkey; +}; + +struct ib_mad; +struct ib_grh; + +enum ib_process_mad_flags { + IB_MAD_IGNORE_MKEY = 1, + IB_MAD_IGNORE_BKEY = 2, + IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY +}; + +enum ib_mad_result { + IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */ + IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */ + IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */ + IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */ +}; + +#define IB_DEVICE_NAME_MAX 64 + +struct ib_cache { + rwlock_t lock; + struct ib_event_handler event_handler; + struct ib_pkey_cache **pkey_cache; + struct ib_gid_cache **gid_cache; + u8 *lmc_cache; +}; + +struct ib_dma_mapping_ops { + int (*mapping_error)(struct ib_device *dev, + u64 dma_addr); + u64 (*map_single)(struct ib_device *dev, + void *ptr, size_t size, + enum dma_data_direction direction); + void (*unmap_single)(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction); + u64 (*map_page)(struct ib_device *dev, + struct page *page, unsigned long offset, + size_t size, + enum dma_data_direction direction); + void (*unmap_page)(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction); + int (*map_sg)(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction); + void (*unmap_sg)(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction); + u64 (*dma_address)(struct ib_device *dev, + struct scatterlist *sg); + unsigned int (*dma_len)(struct ib_device *dev, + struct scatterlist *sg); + void (*sync_single_for_cpu)(struct ib_device *dev, + u64 dma_handle, + size_t size, + enum dma_data_direction dir); + void (*sync_single_for_device)(struct ib_device *dev, + u64 dma_handle, + size_t size, + enum dma_data_direction dir); + void *(*alloc_coherent)(struct ib_device *dev, + size_t size, + u64 *dma_handle, + gfp_t flag); + void (*free_coherent)(struct ib_device *dev, + size_t size, void *cpu_addr, + u64 dma_handle); +}; + +struct iw_cm_verbs; + +struct ib_device { + struct device *dma_device; + + char name[IB_DEVICE_NAME_MAX]; + + struct list_head event_handler_list; + spinlock_t event_handler_lock; + + spinlock_t client_data_lock; + struct list_head core_list; + struct list_head client_data_list; + + struct ib_cache cache; + int *pkey_tbl_len; + int *gid_tbl_len; + + int num_comp_vectors; + + struct iw_cm_verbs *iwcm; + + int (*get_protocol_stats)(struct ib_device *device, + union rdma_protocol_stats *stats); + int (*query_device)(struct ib_device *device, + struct ib_device_attr *device_attr); + int (*query_port)(struct ib_device *device, + u8 port_num, + struct ib_port_attr *port_attr); + enum rdma_link_layer (*get_link_layer)(struct ib_device *device, + u8 port_num); + int (*query_gid)(struct ib_device *device, + u8 port_num, int index, + union ib_gid *gid); + int (*query_pkey)(struct ib_device *device, + u8 port_num, u16 index, u16 *pkey); + int (*modify_device)(struct ib_device *device, + int device_modify_mask, + struct ib_device_modify *device_modify); + int (*modify_port)(struct ib_device *device, + u8 port_num, int port_modify_mask, + struct ib_port_modify *port_modify); + struct ib_ucontext * (*alloc_ucontext)(struct ib_device *device, + struct ib_udata *udata); + int (*dealloc_ucontext)(struct ib_ucontext *context); + int (*mmap)(struct ib_ucontext *context, + struct vm_area_struct *vma); + struct ib_pd * (*alloc_pd)(struct ib_device *device, + struct ib_ucontext *context, + struct ib_udata *udata); + int (*dealloc_pd)(struct ib_pd *pd); + struct ib_ah * (*create_ah)(struct ib_pd *pd, + struct ib_ah_attr *ah_attr); + int (*modify_ah)(struct ib_ah *ah, + struct ib_ah_attr *ah_attr); + int (*query_ah)(struct ib_ah *ah, + struct ib_ah_attr *ah_attr); + int (*destroy_ah)(struct ib_ah *ah); + struct ib_srq * (*create_srq)(struct ib_pd *pd, + struct ib_srq_init_attr *srq_init_attr, + struct ib_udata *udata); + int (*modify_srq)(struct ib_srq *srq, + struct ib_srq_attr *srq_attr, + enum ib_srq_attr_mask srq_attr_mask, + struct ib_udata *udata); + int (*query_srq)(struct ib_srq *srq, + struct ib_srq_attr *srq_attr); + int (*destroy_srq)(struct ib_srq *srq); + int (*post_srq_recv)(struct ib_srq *srq, + struct ib_recv_wr *recv_wr, + struct ib_recv_wr **bad_recv_wr); + struct ib_qp * (*create_qp)(struct ib_pd *pd, + struct ib_qp_init_attr *qp_init_attr, + struct ib_udata *udata); + int (*modify_qp)(struct ib_qp *qp, + struct ib_qp_attr *qp_attr, + int qp_attr_mask, + struct ib_udata *udata); + int (*query_qp)(struct ib_qp *qp, + struct ib_qp_attr *qp_attr, + int qp_attr_mask, + struct ib_qp_init_attr *qp_init_attr); + int (*destroy_qp)(struct ib_qp *qp); + int (*post_send)(struct ib_qp *qp, + struct ib_send_wr *send_wr, + struct ib_send_wr **bad_send_wr); + int (*post_recv)(struct ib_qp *qp, + struct ib_recv_wr *recv_wr, + struct ib_recv_wr **bad_recv_wr); + struct ib_cq * (*create_cq)(struct ib_device *device, int cqe, + int comp_vector, + struct ib_ucontext *context, + struct ib_udata *udata); + int (*modify_cq)(struct ib_cq *cq, u16 cq_count, + u16 cq_period); + int (*destroy_cq)(struct ib_cq *cq); + int (*resize_cq)(struct ib_cq *cq, int cqe, + struct ib_udata *udata); + int (*poll_cq)(struct ib_cq *cq, int num_entries, + struct ib_wc *wc); + int (*peek_cq)(struct ib_cq *cq, int wc_cnt); + int (*req_notify_cq)(struct ib_cq *cq, + enum ib_cq_notify_flags flags); + int (*req_ncomp_notif)(struct ib_cq *cq, + int wc_cnt); + struct ib_mr * (*get_dma_mr)(struct ib_pd *pd, + int mr_access_flags); + struct ib_mr * (*reg_phys_mr)(struct ib_pd *pd, + struct ib_phys_buf *phys_buf_array, + int num_phys_buf, + int mr_access_flags, + u64 *iova_start); + struct ib_mr * (*reg_user_mr)(struct ib_pd *pd, + u64 start, u64 length, + u64 virt_addr, + int mr_access_flags, + struct ib_udata *udata); + int (*query_mr)(struct ib_mr *mr, + struct ib_mr_attr *mr_attr); + int (*dereg_mr)(struct ib_mr *mr); + struct ib_mr * (*alloc_fast_reg_mr)(struct ib_pd *pd, + int max_page_list_len); + struct ib_fast_reg_page_list * (*alloc_fast_reg_page_list)(struct ib_device *device, + int page_list_len); + void (*free_fast_reg_page_list)(struct ib_fast_reg_page_list *page_list); + int (*rereg_phys_mr)(struct ib_mr *mr, + int mr_rereg_mask, + struct ib_pd *pd, + struct ib_phys_buf *phys_buf_array, + int num_phys_buf, + int mr_access_flags, + u64 *iova_start); + struct ib_mw * (*alloc_mw)(struct ib_pd *pd); + int (*bind_mw)(struct ib_qp *qp, + struct ib_mw *mw, + struct ib_mw_bind *mw_bind); + int (*dealloc_mw)(struct ib_mw *mw); + struct ib_fmr * (*alloc_fmr)(struct ib_pd *pd, + int mr_access_flags, + struct ib_fmr_attr *fmr_attr); + int (*map_phys_fmr)(struct ib_fmr *fmr, + u64 *page_list, int list_len, + u64 iova); + int (*unmap_fmr)(struct list_head *fmr_list); + int (*dealloc_fmr)(struct ib_fmr *fmr); + int (*attach_mcast)(struct ib_qp *qp, + union ib_gid *gid, + u16 lid); + int (*detach_mcast)(struct ib_qp *qp, + union ib_gid *gid, + u16 lid); + int (*process_mad)(struct ib_device *device, + int process_mad_flags, + u8 port_num, + struct ib_wc *in_wc, + struct ib_grh *in_grh, + struct ib_mad *in_mad, + struct ib_mad *out_mad); + struct ib_xrcd * (*alloc_xrcd)(struct ib_device *device, + struct ib_ucontext *ucontext, + struct ib_udata *udata); + int (*dealloc_xrcd)(struct ib_xrcd *xrcd); + + struct ib_dma_mapping_ops *dma_ops; + + struct module *owner; + struct device dev; + struct kobject *ports_parent; + struct list_head port_list; + + enum { + IB_DEV_UNINITIALIZED, + IB_DEV_REGISTERED, + IB_DEV_UNREGISTERED + } reg_state; + + int uverbs_abi_ver; + u64 uverbs_cmd_mask; + + char node_desc[64]; + __be64 node_guid; + u32 local_dma_lkey; + u8 node_type; + u8 phys_port_cnt; +}; + +struct ib_client { + char *name; + void (*add) (struct ib_device *); + void (*remove)(struct ib_device *); + + struct list_head list; +}; + +struct ib_device *ib_alloc_device(size_t size); +void ib_dealloc_device(struct ib_device *device); + +int ib_register_device(struct ib_device *device, + int (*port_callback)(struct ib_device *, + u8, struct kobject *)); +void ib_unregister_device(struct ib_device *device); + +int ib_register_client (struct ib_client *client); +void ib_unregister_client(struct ib_client *client); + +void *ib_get_client_data(struct ib_device *device, struct ib_client *client); +void ib_set_client_data(struct ib_device *device, struct ib_client *client, + void *data); + +static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len) +{ + return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0; +} + +static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len) +{ + return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0; +} + +/** + * ib_modify_qp_is_ok - Check that the supplied attribute mask + * contains all required attributes and no attributes not allowed for + * the given QP state transition. + * @cur_state: Current QP state + * @next_state: Next QP state + * @type: QP type + * @mask: Mask of supplied QP attributes + * + * This function is a helper function that a low-level driver's + * modify_qp method can use to validate the consumer's input. It + * checks that cur_state and next_state are valid QP states, that a + * transition from cur_state to next_state is allowed by the IB spec, + * and that the attribute mask supplied is allowed for the transition. + */ +int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state, + enum ib_qp_type type, enum ib_qp_attr_mask mask); + +int ib_register_event_handler (struct ib_event_handler *event_handler); +int ib_unregister_event_handler(struct ib_event_handler *event_handler); +void ib_dispatch_event(struct ib_event *event); + +int ib_query_device(struct ib_device *device, + struct ib_device_attr *device_attr); + +int ib_query_port(struct ib_device *device, + u8 port_num, struct ib_port_attr *port_attr); + +enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, + u8 port_num); + +int ib_query_gid(struct ib_device *device, + u8 port_num, int index, union ib_gid *gid); + +int ib_query_pkey(struct ib_device *device, + u8 port_num, u16 index, u16 *pkey); + +int ib_modify_device(struct ib_device *device, + int device_modify_mask, + struct ib_device_modify *device_modify); + +int ib_modify_port(struct ib_device *device, + u8 port_num, int port_modify_mask, + struct ib_port_modify *port_modify); + +int ib_find_gid(struct ib_device *device, union ib_gid *gid, + u8 *port_num, u16 *index); + +int ib_find_pkey(struct ib_device *device, + u8 port_num, u16 pkey, u16 *index); + +/** + * ib_alloc_pd - Allocates an unused protection domain. + * @device: The device on which to allocate the protection domain. + * + * A protection domain object provides an association between QPs, shared + * receive queues, address handles, memory regions, and memory windows. + */ +struct ib_pd *ib_alloc_pd(struct ib_device *device); + +/** + * ib_dealloc_pd - Deallocates a protection domain. + * @pd: The protection domain to deallocate. + */ +int ib_dealloc_pd(struct ib_pd *pd); + +/** + * ib_create_ah - Creates an address handle for the given address vector. + * @pd: The protection domain associated with the address handle. + * @ah_attr: The attributes of the address vector. + * + * The address handle is used to reference a local or global destination + * in all UD QP post sends. + */ +struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr); + +/** + * ib_init_ah_from_wc - Initializes address handle attributes from a + * work completion. + * @device: Device on which the received message arrived. + * @port_num: Port on which the received message arrived. + * @wc: Work completion associated with the received message. + * @grh: References the received global route header. This parameter is + * ignored unless the work completion indicates that the GRH is valid. + * @ah_attr: Returned attributes that can be used when creating an address + * handle for replying to the message. + */ +int ib_init_ah_from_wc(struct ib_device *device, u8 port_num, struct ib_wc *wc, + struct ib_grh *grh, struct ib_ah_attr *ah_attr); + +/** + * ib_create_ah_from_wc - Creates an address handle associated with the + * sender of the specified work completion. + * @pd: The protection domain associated with the address handle. + * @wc: Work completion information associated with a received message. + * @grh: References the received global route header. This parameter is + * ignored unless the work completion indicates that the GRH is valid. + * @port_num: The outbound port number to associate with the address. + * + * The address handle is used to reference a local or global destination + * in all UD QP post sends. + */ +struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, struct ib_wc *wc, + struct ib_grh *grh, u8 port_num); + +/** + * ib_modify_ah - Modifies the address vector associated with an address + * handle. + * @ah: The address handle to modify. + * @ah_attr: The new address vector attributes to associate with the + * address handle. + */ +int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr); + +/** + * ib_query_ah - Queries the address vector associated with an address + * handle. + * @ah: The address handle to query. + * @ah_attr: The address vector attributes associated with the address + * handle. + */ +int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr); + +/** + * ib_destroy_ah - Destroys an address handle. + * @ah: The address handle to destroy. + */ +int ib_destroy_ah(struct ib_ah *ah); + +/** + * ib_create_srq - Creates a SRQ associated with the specified protection + * domain. + * @pd: The protection domain associated with the SRQ. + * @srq_init_attr: A list of initial attributes required to create the + * SRQ. If SRQ creation succeeds, then the attributes are updated to + * the actual capabilities of the created SRQ. + * + * srq_attr->max_wr and srq_attr->max_sge are read the determine the + * requested size of the SRQ, and set to the actual values allocated + * on return. If ib_create_srq() succeeds, then max_wr and max_sge + * will always be at least as large as the requested values. + */ +struct ib_srq *ib_create_srq(struct ib_pd *pd, + struct ib_srq_init_attr *srq_init_attr); + +/** + * ib_modify_srq - Modifies the attributes for the specified SRQ. + * @srq: The SRQ to modify. + * @srq_attr: On input, specifies the SRQ attributes to modify. On output, + * the current values of selected SRQ attributes are returned. + * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ + * are being modified. + * + * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or + * IB_SRQ_LIMIT to set the SRQ's limit and request notification when + * the number of receives queued drops below the limit. + */ +int ib_modify_srq(struct ib_srq *srq, + struct ib_srq_attr *srq_attr, + enum ib_srq_attr_mask srq_attr_mask); + +/** + * ib_query_srq - Returns the attribute list and current values for the + * specified SRQ. + * @srq: The SRQ to query. + * @srq_attr: The attributes of the specified SRQ. + */ +int ib_query_srq(struct ib_srq *srq, + struct ib_srq_attr *srq_attr); + +/** + * ib_destroy_srq - Destroys the specified SRQ. + * @srq: The SRQ to destroy. + */ +int ib_destroy_srq(struct ib_srq *srq); + +/** + * ib_post_srq_recv - Posts a list of work requests to the specified SRQ. + * @srq: The SRQ to post the work request on. + * @recv_wr: A list of work requests to post on the receive queue. + * @bad_recv_wr: On an immediate failure, this parameter will reference + * the work request that failed to be posted on the QP. + */ +static inline int ib_post_srq_recv(struct ib_srq *srq, + struct ib_recv_wr *recv_wr, + struct ib_recv_wr **bad_recv_wr) +{ + return srq->device->post_srq_recv(srq, recv_wr, bad_recv_wr); +} + +/** + * ib_create_qp - Creates a QP associated with the specified protection + * domain. + * @pd: The protection domain associated with the QP. + * @qp_init_attr: A list of initial attributes required to create the + * QP. If QP creation succeeds, then the attributes are updated to + * the actual capabilities of the created QP. + */ +struct ib_qp *ib_create_qp(struct ib_pd *pd, + struct ib_qp_init_attr *qp_init_attr); + +/** + * ib_modify_qp - Modifies the attributes for the specified QP and then + * transitions the QP to the given state. + * @qp: The QP to modify. + * @qp_attr: On input, specifies the QP attributes to modify. On output, + * the current values of selected QP attributes are returned. + * @qp_attr_mask: A bit-mask used to specify which attributes of the QP + * are being modified. + */ +int ib_modify_qp(struct ib_qp *qp, + struct ib_qp_attr *qp_attr, + int qp_attr_mask); + +/** + * ib_query_qp - Returns the attribute list and current values for the + * specified QP. + * @qp: The QP to query. + * @qp_attr: The attributes of the specified QP. + * @qp_attr_mask: A bit-mask used to select specific attributes to query. + * @qp_init_attr: Additional attributes of the selected QP. + * + * The qp_attr_mask may be used to limit the query to gathering only the + * selected attributes. + */ +int ib_query_qp(struct ib_qp *qp, + struct ib_qp_attr *qp_attr, + int qp_attr_mask, + struct ib_qp_init_attr *qp_init_attr); + +/** + * ib_destroy_qp - Destroys the specified QP. + * @qp: The QP to destroy. + */ +int ib_destroy_qp(struct ib_qp *qp); + +/** + * ib_open_qp - Obtain a reference to an existing sharable QP. + * @xrcd - XRC domain + * @qp_open_attr: Attributes identifying the QP to open. + * + * Returns a reference to a sharable QP. + */ +struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd, + struct ib_qp_open_attr *qp_open_attr); + +/** + * ib_close_qp - Release an external reference to a QP. + * @qp: The QP handle to release + * + * The opened QP handle is released by the caller. The underlying + * shared QP is not destroyed until all internal references are released. + */ +int ib_close_qp(struct ib_qp *qp); + +/** + * ib_post_send - Posts a list of work requests to the send queue of + * the specified QP. + * @qp: The QP to post the work request on. + * @send_wr: A list of work requests to post on the send queue. + * @bad_send_wr: On an immediate failure, this parameter will reference + * the work request that failed to be posted on the QP. + * + * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate + * error is returned, the QP state shall not be affected, + * ib_post_send() will return an immediate error after queueing any + * earlier work requests in the list. + */ +static inline int ib_post_send(struct ib_qp *qp, + struct ib_send_wr *send_wr, + struct ib_send_wr **bad_send_wr) +{ + return qp->device->post_send(qp, send_wr, bad_send_wr); +} + +/** + * ib_post_recv - Posts a list of work requests to the receive queue of + * the specified QP. + * @qp: The QP to post the work request on. + * @recv_wr: A list of work requests to post on the receive queue. + * @bad_recv_wr: On an immediate failure, this parameter will reference + * the work request that failed to be posted on the QP. + */ +static inline int ib_post_recv(struct ib_qp *qp, + struct ib_recv_wr *recv_wr, + struct ib_recv_wr **bad_recv_wr) +{ + return qp->device->post_recv(qp, recv_wr, bad_recv_wr); +} + +/** + * ib_create_cq - Creates a CQ on the specified device. + * @device: The device on which to create the CQ. + * @comp_handler: A user-specified callback that is invoked when a + * completion event occurs on the CQ. + * @event_handler: A user-specified callback that is invoked when an + * asynchronous event not associated with a completion occurs on the CQ. + * @cq_context: Context associated with the CQ returned to the user via + * the associated completion and event handlers. + * @cqe: The minimum size of the CQ. + * @comp_vector - Completion vector used to signal completion events. + * Must be >= 0 and < context->num_comp_vectors. + * + * Users can examine the cq structure to determine the actual CQ size. + */ +struct ib_cq *ib_create_cq(struct ib_device *device, + ib_comp_handler comp_handler, + void (*event_handler)(struct ib_event *, void *), + void *cq_context, int cqe, int comp_vector); + +/** + * ib_resize_cq - Modifies the capacity of the CQ. + * @cq: The CQ to resize. + * @cqe: The minimum size of the CQ. + * + * Users can examine the cq structure to determine the actual CQ size. + */ +int ib_resize_cq(struct ib_cq *cq, int cqe); + +/** + * ib_modify_cq - Modifies moderation params of the CQ + * @cq: The CQ to modify. + * @cq_count: number of CQEs that will trigger an event + * @cq_period: max period of time in usec before triggering an event + * + */ +int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period); + +/** + * ib_destroy_cq - Destroys the specified CQ. + * @cq: The CQ to destroy. + */ +int ib_destroy_cq(struct ib_cq *cq); + +/** + * ib_poll_cq - poll a CQ for completion(s) + * @cq:the CQ being polled + * @num_entries:maximum number of completions to return + * @wc:array of at least @num_entries &struct ib_wc where completions + * will be returned + * + * Poll a CQ for (possibly multiple) completions. If the return value + * is < 0, an error occurred. If the return value is >= 0, it is the + * number of completions returned. If the return value is + * non-negative and < num_entries, then the CQ was emptied. + */ +static inline int ib_poll_cq(struct ib_cq *cq, int num_entries, + struct ib_wc *wc) +{ + return cq->device->poll_cq(cq, num_entries, wc); +} + +/** + * ib_peek_cq - Returns the number of unreaped completions currently + * on the specified CQ. + * @cq: The CQ to peek. + * @wc_cnt: A minimum number of unreaped completions to check for. + * + * If the number of unreaped completions is greater than or equal to wc_cnt, + * this function returns wc_cnt, otherwise, it returns the actual number of + * unreaped completions. + */ +int ib_peek_cq(struct ib_cq *cq, int wc_cnt); + +/** + * ib_req_notify_cq - Request completion notification on a CQ. + * @cq: The CQ to generate an event for. + * @flags: + * Must contain exactly one of %IB_CQ_SOLICITED or %IB_CQ_NEXT_COMP + * to request an event on the next solicited event or next work + * completion at any type, respectively. %IB_CQ_REPORT_MISSED_EVENTS + * may also be |ed in to request a hint about missed events, as + * described below. + * + * Return Value: + * < 0 means an error occurred while requesting notification + * == 0 means notification was requested successfully, and if + * IB_CQ_REPORT_MISSED_EVENTS was passed in, then no events + * were missed and it is safe to wait for another event. In + * this case is it guaranteed that any work completions added + * to the CQ since the last CQ poll will trigger a completion + * notification event. + * > 0 is only returned if IB_CQ_REPORT_MISSED_EVENTS was passed + * in. It means that the consumer must poll the CQ again to + * make sure it is empty to avoid missing an event because of a + * race between requesting notification and an entry being + * added to the CQ. This return value means it is possible + * (but not guaranteed) that a work completion has been added + * to the CQ since the last poll without triggering a + * completion notification event. + */ +static inline int ib_req_notify_cq(struct ib_cq *cq, + enum ib_cq_notify_flags flags) +{ + return cq->device->req_notify_cq(cq, flags); +} + +/** + * ib_req_ncomp_notif - Request completion notification when there are + * at least the specified number of unreaped completions on the CQ. + * @cq: The CQ to generate an event for. + * @wc_cnt: The number of unreaped completions that should be on the + * CQ before an event is generated. + */ +static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt) +{ + return cq->device->req_ncomp_notif ? + cq->device->req_ncomp_notif(cq, wc_cnt) : + -ENOSYS; +} + +/** + * ib_get_dma_mr - Returns a memory region for system memory that is + * usable for DMA. + * @pd: The protection domain associated with the memory region. + * @mr_access_flags: Specifies the memory access rights. + * + * Note that the ib_dma_*() functions defined below must be used + * to create/destroy addresses used with the Lkey or Rkey returned + * by ib_get_dma_mr(). + */ +struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags); + +/** + * ib_dma_mapping_error - check a DMA addr for error + * @dev: The device for which the dma_addr was created + * @dma_addr: The DMA address to check + */ +static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr) +{ + if (dev->dma_ops) + return dev->dma_ops->mapping_error(dev, dma_addr); +#ifdef __VMKERNEL_MODULE__ + return dma_mapping_error(dma_addr); +#else + return dma_mapping_error(dev->dma_device, dma_addr); +#endif /* __VMKERNEL_MODULE__ */ +} + +/** + * ib_dma_map_single - Map a kernel virtual address to DMA address + * @dev: The device for which the dma_addr is to be created + * @cpu_addr: The kernel virtual address + * @size: The size of the region in bytes + * @direction: The direction of the DMA + */ +static inline u64 ib_dma_map_single(struct ib_device *dev, + void *cpu_addr, size_t size, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + return dev->dma_ops->map_single(dev, cpu_addr, size, direction); + return dma_map_single(dev->dma_device, cpu_addr, size, direction); +} + +/** + * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single() + * @dev: The device for which the DMA address was created + * @addr: The DMA address + * @size: The size of the region in bytes + * @direction: The direction of the DMA + */ +static inline void ib_dma_unmap_single(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + dev->dma_ops->unmap_single(dev, addr, size, direction); + else + dma_unmap_single(dev->dma_device, addr, size, direction); +} + +static inline u64 ib_dma_map_single_attrs(struct ib_device *dev, + void *cpu_addr, size_t size, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + return dma_map_single_attrs(dev->dma_device, cpu_addr, size, + direction, attrs); +} + +static inline void ib_dma_unmap_single_attrs(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + return dma_unmap_single_attrs(dev->dma_device, addr, size, + direction, attrs); +} + +/** + * ib_dma_map_page - Map a physical page to DMA address + * @dev: The device for which the dma_addr is to be created + * @page: The page to be mapped + * @offset: The offset within the page + * @size: The size of the region in bytes + * @direction: The direction of the DMA + */ +static inline u64 ib_dma_map_page(struct ib_device *dev, + struct page *page, + unsigned long offset, + size_t size, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + return dev->dma_ops->map_page(dev, page, offset, size, direction); + return dma_map_page(dev->dma_device, page, offset, size, direction); +} + +/** + * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page() + * @dev: The device for which the DMA address was created + * @addr: The DMA address + * @size: The size of the region in bytes + * @direction: The direction of the DMA + */ +static inline void ib_dma_unmap_page(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + dev->dma_ops->unmap_page(dev, addr, size, direction); + else + dma_unmap_page(dev->dma_device, addr, size, direction); +} + +/** + * ib_dma_map_sg - Map a scatter/gather list to DMA addresses + * @dev: The device for which the DMA addresses are to be created + * @sg: The array of scatter/gather entries + * @nents: The number of scatter/gather entries + * @direction: The direction of the DMA + */ +static inline int ib_dma_map_sg(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + return dev->dma_ops->map_sg(dev, sg, nents, direction); + return dma_map_sg(dev->dma_device, sg, nents, direction); +} + +/** + * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses + * @dev: The device for which the DMA addresses were created + * @sg: The array of scatter/gather entries + * @nents: The number of scatter/gather entries + * @direction: The direction of the DMA + */ +static inline void ib_dma_unmap_sg(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + dev->dma_ops->unmap_sg(dev, sg, nents, direction); + else + dma_unmap_sg(dev->dma_device, sg, nents, direction); +} + +static inline int ib_dma_map_sg_attrs(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + return dma_map_sg_attrs(dev->dma_device, sg, nents, direction, attrs); +} + +static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction, attrs); +} +/** + * ib_sg_dma_address - Return the DMA address from a scatter/gather entry + * @dev: The device for which the DMA addresses were created + * @sg: The scatter/gather entry + */ +static inline u64 ib_sg_dma_address(struct ib_device *dev, + struct scatterlist *sg) +{ + if (dev->dma_ops) + return dev->dma_ops->dma_address(dev, sg); + return sg_dma_address(sg); +} + +/** + * ib_sg_dma_len - Return the DMA length from a scatter/gather entry + * @dev: The device for which the DMA addresses were created + * @sg: The scatter/gather entry + */ +static inline unsigned int ib_sg_dma_len(struct ib_device *dev, + struct scatterlist *sg) +{ + if (dev->dma_ops) + return dev->dma_ops->dma_len(dev, sg); + return sg_dma_len(sg); +} + +/** + * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU + * @dev: The device for which the DMA address was created + * @addr: The DMA address + * @size: The size of the region in bytes + * @dir: The direction of the DMA + */ +static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev, + u64 addr, + size_t size, + enum dma_data_direction dir) +{ + if (dev->dma_ops) + dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir); + else + dma_sync_single_for_cpu(dev->dma_device, addr, size, dir); +} + +/** + * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device + * @dev: The device for which the DMA address was created + * @addr: The DMA address + * @size: The size of the region in bytes + * @dir: The direction of the DMA + */ +static inline void ib_dma_sync_single_for_device(struct ib_device *dev, + u64 addr, + size_t size, + enum dma_data_direction dir) +{ + if (dev->dma_ops) + dev->dma_ops->sync_single_for_device(dev, addr, size, dir); + else + dma_sync_single_for_device(dev->dma_device, addr, size, dir); +} + +/** + * ib_dma_alloc_coherent - Allocate memory and map it for DMA + * @dev: The device for which the DMA address is requested + * @size: The size of the region to allocate in bytes + * @dma_handle: A pointer for returning the DMA address of the region + * @flag: memory allocator flags + */ +static inline void *ib_dma_alloc_coherent(struct ib_device *dev, + size_t size, + u64 *dma_handle, + gfp_t flag) +{ + if (dev->dma_ops) + return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag); + else { + dma_addr_t handle; + void *ret; + + ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag); + *dma_handle = handle; + return ret; + } +} + +/** + * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent() + * @dev: The device for which the DMA addresses were allocated + * @size: The size of the region + * @cpu_addr: the address returned by ib_dma_alloc_coherent() + * @dma_handle: the DMA address returned by ib_dma_alloc_coherent() + */ +static inline void ib_dma_free_coherent(struct ib_device *dev, + size_t size, void *cpu_addr, + u64 dma_handle) +{ + if (dev->dma_ops) + dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); + else + dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle); +} + +/** + * ib_reg_phys_mr - Prepares a virtually addressed memory region for use + * by an HCA. + * @pd: The protection domain associated assigned to the registered region. + * @phys_buf_array: Specifies a list of physical buffers to use in the + * memory region. + * @num_phys_buf: Specifies the size of the phys_buf_array. + * @mr_access_flags: Specifies the memory access rights. + * @iova_start: The offset of the region's starting I/O virtual address. + */ +struct ib_mr *ib_reg_phys_mr(struct ib_pd *pd, + struct ib_phys_buf *phys_buf_array, + int num_phys_buf, + int mr_access_flags, + u64 *iova_start); + +/** + * ib_rereg_phys_mr - Modifies the attributes of an existing memory region. + * Conceptually, this call performs the functions deregister memory region + * followed by register physical memory region. Where possible, + * resources are reused instead of deallocated and reallocated. + * @mr: The memory region to modify. + * @mr_rereg_mask: A bit-mask used to indicate which of the following + * properties of the memory region are being modified. + * @pd: If %IB_MR_REREG_PD is set in mr_rereg_mask, this field specifies + * the new protection domain to associated with the memory region, + * otherwise, this parameter is ignored. + * @phys_buf_array: If %IB_MR_REREG_TRANS is set in mr_rereg_mask, this + * field specifies a list of physical buffers to use in the new + * translation, otherwise, this parameter is ignored. + * @num_phys_buf: If %IB_MR_REREG_TRANS is set in mr_rereg_mask, this + * field specifies the size of the phys_buf_array, otherwise, this + * parameter is ignored. + * @mr_access_flags: If %IB_MR_REREG_ACCESS is set in mr_rereg_mask, this + * field specifies the new memory access rights, otherwise, this + * parameter is ignored. + * @iova_start: The offset of the region's starting I/O virtual address. + */ +int ib_rereg_phys_mr(struct ib_mr *mr, + int mr_rereg_mask, + struct ib_pd *pd, + struct ib_phys_buf *phys_buf_array, + int num_phys_buf, + int mr_access_flags, + u64 *iova_start); + +/** + * ib_query_mr - Retrieves information about a specific memory region. + * @mr: The memory region to retrieve information about. + * @mr_attr: The attributes of the specified memory region. + */ +int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr); + +/** + * ib_dereg_mr - Deregisters a memory region and removes it from the + * HCA translation table. + * @mr: The memory region to deregister. + */ +int ib_dereg_mr(struct ib_mr *mr); + +/** + * ib_alloc_fast_reg_mr - Allocates memory region usable with the + * IB_WR_FAST_REG_MR send work request. + * @pd: The protection domain associated with the region. + * @max_page_list_len: requested max physical buffer list length to be + * used with fast register work requests for this MR. + */ +struct ib_mr *ib_alloc_fast_reg_mr(struct ib_pd *pd, int max_page_list_len); + +/** + * ib_alloc_fast_reg_page_list - Allocates a page list array + * @device - ib device pointer. + * @page_list_len - size of the page list array to be allocated. + * + * This allocates and returns a struct ib_fast_reg_page_list * and a + * page_list array that is at least page_list_len in size. The actual + * size is returned in max_page_list_len. The caller is responsible + * for initializing the contents of the page_list array before posting + * a send work request with the IB_WC_FAST_REG_MR opcode. + * + * The page_list array entries must be translated using one of the + * ib_dma_*() functions just like the addresses passed to + * ib_map_phys_fmr(). Once the ib_post_send() is issued, the struct + * ib_fast_reg_page_list must not be modified by the caller until the + * IB_WC_FAST_REG_MR work request completes. + */ +struct ib_fast_reg_page_list *ib_alloc_fast_reg_page_list( + struct ib_device *device, int page_list_len); + +/** + * ib_free_fast_reg_page_list - Deallocates a previously allocated + * page list array. + * @page_list - struct ib_fast_reg_page_list pointer to be deallocated. + */ +void ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list); + +/** + * ib_update_fast_reg_key - updates the key portion of the fast_reg MR + * R_Key and L_Key. + * @mr - struct ib_mr pointer to be updated. + * @newkey - new key to be used. + */ +static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey) +{ + mr->lkey = (mr->lkey & 0xffffff00) | newkey; + mr->rkey = (mr->rkey & 0xffffff00) | newkey; +} + +/** + * ib_alloc_mw - Allocates a memory window. + * @pd: The protection domain associated with the memory window. + */ +struct ib_mw *ib_alloc_mw(struct ib_pd *pd); + +/** + * ib_bind_mw - Posts a work request to the send queue of the specified + * QP, which binds the memory window to the given address range and + * remote access attributes. + * @qp: QP to post the bind work request on. + * @mw: The memory window to bind. + * @mw_bind: Specifies information about the memory window, including + * its address range, remote access rights, and associated memory region. + */ +static inline int ib_bind_mw(struct ib_qp *qp, + struct ib_mw *mw, + struct ib_mw_bind *mw_bind) +{ + /* XXX reference counting in corresponding MR? */ + return mw->device->bind_mw ? + mw->device->bind_mw(qp, mw, mw_bind) : + -ENOSYS; +} + +/** + * ib_dealloc_mw - Deallocates a memory window. + * @mw: The memory window to deallocate. + */ +int ib_dealloc_mw(struct ib_mw *mw); + +/** + * ib_alloc_fmr - Allocates a unmapped fast memory region. + * @pd: The protection domain associated with the unmapped region. + * @mr_access_flags: Specifies the memory access rights. + * @fmr_attr: Attributes of the unmapped region. + * + * A fast memory region must be mapped before it can be used as part of + * a work request. + */ +struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd, + int mr_access_flags, + struct ib_fmr_attr *fmr_attr); + +/** + * ib_map_phys_fmr - Maps a list of physical pages to a fast memory region. + * @fmr: The fast memory region to associate with the pages. + * @page_list: An array of physical pages to map to the fast memory region. + * @list_len: The number of pages in page_list. + * @iova: The I/O virtual address to use with the mapped region. + */ +static inline int ib_map_phys_fmr(struct ib_fmr *fmr, + u64 *page_list, int list_len, + u64 iova) +{ + return fmr->device->map_phys_fmr(fmr, page_list, list_len, iova); +} + +/** + * ib_unmap_fmr - Removes the mapping from a list of fast memory regions. + * @fmr_list: A linked list of fast memory regions to unmap. + */ +int ib_unmap_fmr(struct list_head *fmr_list); + +/** + * ib_dealloc_fmr - Deallocates a fast memory region. + * @fmr: The fast memory region to deallocate. + */ +int ib_dealloc_fmr(struct ib_fmr *fmr); + +/** + * ib_attach_mcast - Attaches the specified QP to a multicast group. + * @qp: QP to attach to the multicast group. The QP must be type + * IB_QPT_UD. + * @gid: Multicast group GID. + * @lid: Multicast group LID in host byte order. + * + * In order to send and receive multicast packets, subnet + * administration must have created the multicast group and configured + * the fabric appropriately. The port associated with the specified + * QP must also be a member of the multicast group. + */ +int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid); + +/** + * ib_detach_mcast - Detaches the specified QP from a multicast group. + * @qp: QP to detach from the multicast group. + * @gid: Multicast group GID. + * @lid: Multicast group LID in host byte order. + */ +int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid); + +/** + * ib_alloc_xrcd - Allocates an XRC domain. + * @device: The device on which to allocate the XRC domain. + */ +struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device); + +/** + * ib_dealloc_xrcd - Deallocates an XRC domain. + * @xrcd: The XRC domain to deallocate. + */ +int ib_dealloc_xrcd(struct ib_xrcd *xrcd); + +#endif /* IB_VERBS_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/alloc.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/alloc.c new file mode 100755 index 0000000..723c361 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/alloc.c @@ -0,0 +1,399 @@ +/* + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2007-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* NOT _VMKERNEL_MODULE__ */ +#include +#include +#include + +#include "mlx4.h" + +u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap) +{ + u32 obj; + + spin_lock(&bitmap->lock); + + obj = find_next_zero_bit(bitmap->table, bitmap->max, bitmap->last); + if (obj >= bitmap->max) { + bitmap->top = (bitmap->top + bitmap->max + bitmap->reserved_top) + & bitmap->mask; + obj = find_first_zero_bit(bitmap->table, bitmap->max); + } + + if (obj < bitmap->max) { + set_bit(obj, bitmap->table); + bitmap->last = (obj + 1); + if (bitmap->last == bitmap->max) + bitmap->last = 0; + obj |= bitmap->top; + } else + obj = -1; + + if (obj != -1) + --bitmap->avail; + + spin_unlock(&bitmap->lock); + + return obj; +} + +void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj) +{ + mlx4_bitmap_free_range(bitmap, obj, 1); +} + +u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align) +{ + u32 obj; + + if (likely(cnt == 1 && align == 1)) + return mlx4_bitmap_alloc(bitmap); + + spin_lock(&bitmap->lock); + + obj = bitmap_find_next_zero_area(bitmap->table, bitmap->max, + bitmap->last, cnt, align - 1); + if (obj >= bitmap->max) { + bitmap->top = (bitmap->top + bitmap->max + bitmap->reserved_top) + & bitmap->mask; + obj = bitmap_find_next_zero_area(bitmap->table, bitmap->max, + 0, cnt, align - 1); + } + + if (obj < bitmap->max) { + bitmap_set(bitmap->table, obj, cnt); + if (obj == bitmap->last) { + bitmap->last = (obj + cnt); + if (bitmap->last >= bitmap->max) + bitmap->last = 0; + } + obj |= bitmap->top; + } else + obj = -1; + + if (obj != -1) + bitmap->avail -= cnt; + + spin_unlock(&bitmap->lock); + + return obj; +} + +u32 mlx4_bitmap_avail(struct mlx4_bitmap *bitmap) +{ + return bitmap->avail; +} + +void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt) +{ + obj &= bitmap->max + bitmap->reserved_top - 1; + + spin_lock(&bitmap->lock); + bitmap_clear(bitmap->table, obj, cnt); + bitmap->last = min(bitmap->last, obj); + bitmap->top = (bitmap->top + bitmap->max + bitmap->reserved_top) + & bitmap->mask; + bitmap->avail += cnt; + spin_unlock(&bitmap->lock); +} + +int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask, + u32 reserved_bot, u32 reserved_top) +{ + /* num must be a power of 2 */ + if (num != roundup_pow_of_two(num)) + return -EINVAL; + + bitmap->last = 0; + bitmap->top = 0; + bitmap->max = num - reserved_top; + bitmap->mask = mask; + bitmap->reserved_top = reserved_top; + bitmap->avail = num - reserved_top - reserved_bot; + spin_lock_init(&bitmap->lock); + bitmap->table = kzalloc(BITS_TO_LONGS(bitmap->max) * + sizeof (long), GFP_KERNEL); + if (!bitmap->table) + return -ENOMEM; + + bitmap_set(bitmap->table, 0, reserved_bot); + + return 0; +} + +void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap) +{ + kfree(bitmap->table); +} + +/* + * Handling for queue buffers -- we allocate a bunch of memory and + * register it in a memory region at HCA virtual address 0. If the + * requested size is > max_direct, we split the allocation into + * multiple pages, so we don't require too much contiguous memory. + */ + +int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, + struct mlx4_buf *buf) +{ + dma_addr_t t; + + if (size <= max_direct) { + buf->nbufs = 1; + buf->npages = 1; + buf->page_shift = get_order(size) + PAGE_SHIFT; + buf->direct.buf = dma_alloc_coherent(&dev->pdev->dev, + size, &t, GFP_KERNEL); + if (!buf->direct.buf) + return -ENOMEM; + + buf->direct.map = t; + + while (t & ((1 << buf->page_shift) - 1)) { + --buf->page_shift; + buf->npages *= 2; + } + + memset(buf->direct.buf, 0, size); + } else { + int i; + + buf->direct.buf = NULL; + buf->nbufs = (size + PAGE_SIZE - 1) / PAGE_SIZE; + buf->npages = buf->nbufs; + buf->page_shift = PAGE_SHIFT; + buf->page_list = kcalloc(buf->nbufs, sizeof(*buf->page_list), + GFP_KERNEL); + if (!buf->page_list) + return -ENOMEM; + + for (i = 0; i < buf->nbufs; ++i) { + buf->page_list[i].buf = + dma_alloc_coherent(&dev->pdev->dev, PAGE_SIZE, + &t, GFP_KERNEL); + if (!buf->page_list[i].buf) + goto err_free; + + buf->page_list[i].map = t; + + memset(buf->page_list[i].buf, 0, PAGE_SIZE); + } + + if (BITS_PER_LONG == 64) { + struct page **pages; + pages = kmalloc(sizeof *pages * buf->nbufs, GFP_KERNEL); + if (!pages) + goto err_free; + for (i = 0; i < buf->nbufs; ++i) + pages[i] = virt_to_page(buf->page_list[i].buf); + buf->direct.buf = vmap(pages, buf->nbufs, VM_MAP, PAGE_KERNEL); + kfree(pages); + if (!buf->direct.buf) + goto err_free; + } + } + + return 0; + +err_free: + mlx4_buf_free(dev, size, buf); + + return -ENOMEM; +} +EXPORT_SYMBOL_GPL(mlx4_buf_alloc); + +void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf) +{ + int i; + + if (buf->nbufs == 1) + dma_free_coherent(&dev->pdev->dev, size, buf->direct.buf, + buf->direct.map); + else { + if (BITS_PER_LONG == 64 && buf->direct.buf) + vunmap(buf->direct.buf); + + for (i = 0; i < buf->nbufs; ++i) + if (buf->page_list[i].buf) + dma_free_coherent(&dev->pdev->dev, PAGE_SIZE, + buf->page_list[i].buf, + buf->page_list[i].map); + kfree(buf->page_list); + } +} +EXPORT_SYMBOL_GPL(mlx4_buf_free); + +static struct mlx4_db_pgdir *mlx4_alloc_db_pgdir(struct device *dma_device) +{ + struct mlx4_db_pgdir *pgdir; + + pgdir = kzalloc(sizeof *pgdir, GFP_KERNEL); + if (!pgdir) + return NULL; + + bitmap_fill(pgdir->order1, MLX4_DB_PER_PAGE / 2); + pgdir->bits[0] = pgdir->order0; + pgdir->bits[1] = pgdir->order1; + pgdir->db_page = dma_alloc_coherent(dma_device, PAGE_SIZE, + &pgdir->db_dma, GFP_KERNEL); + if (!pgdir->db_page) { + kfree(pgdir); + return NULL; + } + + return pgdir; +} + +static int mlx4_alloc_db_from_pgdir(struct mlx4_db_pgdir *pgdir, + struct mlx4_db *db, int order) +{ + int o; + int i; + + for (o = order; o <= 1; ++o) { + i = find_first_bit(pgdir->bits[o], MLX4_DB_PER_PAGE >> o); + if (i < MLX4_DB_PER_PAGE >> o) + goto found; + } + + return -ENOMEM; + +found: + clear_bit(i, pgdir->bits[o]); + + i <<= o; + + if (o > order) + set_bit(i ^ 1, pgdir->bits[order]); + + db->u.pgdir = pgdir; + db->index = i; + db->db = pgdir->db_page + db->index; + db->dma = pgdir->db_dma + db->index * 4; + db->order = order; + + return 0; +} + +int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, int order) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_db_pgdir *pgdir; + int ret = 0; + + mutex_lock(&priv->pgdir_mutex); + + list_for_each_entry(pgdir, &priv->pgdir_list, list) + if (!mlx4_alloc_db_from_pgdir(pgdir, db, order)) + goto out; + + pgdir = mlx4_alloc_db_pgdir(&(dev->pdev->dev)); + if (!pgdir) { + ret = -ENOMEM; + goto out; + } + + list_add(&pgdir->list, &priv->pgdir_list); + + /* This should never fail -- we just allocated an empty page: */ + WARN_ON(mlx4_alloc_db_from_pgdir(pgdir, db, order)); + +out: + mutex_unlock(&priv->pgdir_mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(mlx4_db_alloc); + +void mlx4_db_free(struct mlx4_dev *dev, struct mlx4_db *db) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int o; + int i; + + mutex_lock(&priv->pgdir_mutex); + + o = db->order; + i = db->index; + + if (db->order == 0 && test_bit(i ^ 1, db->u.pgdir->order0)) { + clear_bit(i ^ 1, db->u.pgdir->order0); + ++o; + } + i >>= o; + set_bit(i, db->u.pgdir->bits[o]); + + if (bitmap_full(db->u.pgdir->order1, MLX4_DB_PER_PAGE / 2)) { + dma_free_coherent(&(dev->pdev->dev), PAGE_SIZE, + db->u.pgdir->db_page, db->u.pgdir->db_dma); + list_del(&db->u.pgdir->list); + kfree(db->u.pgdir); + } + + mutex_unlock(&priv->pgdir_mutex); +} +EXPORT_SYMBOL_GPL(mlx4_db_free); + +int mlx4_alloc_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources *wqres, + int size, int max_direct) +{ + int err; + + err = mlx4_db_alloc(dev, &wqres->db, 1); + if (err) + return err; + + *wqres->db.db = 0; + + err = mlx4_buf_alloc(dev, size, max_direct, &wqres->buf); + if (err) + goto err_db; + + err = mlx4_mtt_init(dev, wqres->buf.npages, wqres->buf.page_shift, + &wqres->mtt); + if (err) + goto err_buf; + + err = mlx4_buf_write_mtt(dev, &wqres->mtt, &wqres->buf); + if (err) + goto err_mtt; + + return 0; + +err_mtt: + mlx4_mtt_cleanup(dev, &wqres->mtt); +err_buf: + mlx4_buf_free(dev, size, &wqres->buf); +err_db: + mlx4_db_free(dev, &wqres->db); + + return err; +} +EXPORT_SYMBOL_GPL(mlx4_alloc_hwq_res); + +void mlx4_free_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources *wqres, + int size) +{ + mlx4_mtt_cleanup(dev, &wqres->mtt); + mlx4_buf_free(dev, size, &wqres->buf); + mlx4_db_free(dev, &wqres->db); +} +EXPORT_SYMBOL_GPL(mlx4_free_hwq_res); diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/catas.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/catas.c new file mode 100755 index 0000000..41e3f1c --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/catas.c @@ -0,0 +1,148 @@ +/* + * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2007-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include + +#include "mlx4.h" + +enum { + MLX4_CATAS_POLL_INTERVAL = 5 * HZ, +}; + +static DEFINE_SPINLOCK(catas_lock); + +static LIST_HEAD(catas_list); +static struct work_struct catas_work; + +#ifndef __VMKERNEL_MODULE__ +static int internal_err_reset = 1; +module_param(internal_err_reset, int, 0644); +MODULE_PARM_DESC(internal_err_reset, + "Reset device on internal errors if non-zero" + " (default 1, in SRIOV mode default is 0)"); +#else /* __VMKERNEL_MODULE__ */ +static int internal_err_reset; +#endif /* __VMKERNEL_MODULE__ */ + +static void dump_err_buf(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + int i; + + mlx4_err(dev, "Internal error detected:\n"); + for (i = 0; i < priv->fw.catas_size; ++i) + mlx4_err(dev, " buf[%02x]: %08x\n", + i, swab32(readl(priv->catas_err.map + i))); +} + +static void poll_catas(unsigned long dev_ptr) +{ + struct mlx4_dev *dev = (struct mlx4_dev *) dev_ptr; + struct mlx4_priv *priv = mlx4_priv(dev); + + if (readl(priv->catas_err.map)) { + dump_err_buf(dev); + + mlx4_dispatch_event(dev, MLX4_DEV_EVENT_CATASTROPHIC_ERROR, 0); + + if (internal_err_reset) { + spin_lock(&catas_lock); + list_add(&priv->catas_err.list, &catas_list); + spin_unlock(&catas_lock); + + queue_work(mlx4_wq, &catas_work); + } + } else + mod_timer(&priv->catas_err.timer, + round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL)); +} + +static void catas_reset(struct work_struct *work) +{ + struct mlx4_priv *priv, *tmppriv; + struct mlx4_dev *dev; + + LIST_HEAD(tlist); + int ret; + + spin_lock_irq(&catas_lock); + list_splice_init(&catas_list, &tlist); + spin_unlock_irq(&catas_lock); + + list_for_each_entry_safe(priv, tmppriv, &tlist, catas_err.list) { + struct pci_dev *pdev = priv->dev.pdev; + + ret = mlx4_restart_one(priv->dev.pdev); + /* 'priv' now is not valid */ + if (ret) + pr_err("mlx4 %s: Reset failed (%d)\n", + pci_name(pdev), ret); + else { + dev = pci_get_drvdata(pdev); + mlx4_dbg(dev, "Reset succeeded\n"); + } + } +} + +void mlx4_start_catas_poll(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + phys_addr_t addr; + + /*If we are in SRIOV the default of the module param must be 0*/ + if (mlx4_is_mfunc(dev)) + internal_err_reset = 0; + + INIT_LIST_HEAD(&priv->catas_err.list); + init_timer(&priv->catas_err.timer); + priv->catas_err.map = NULL; + + addr = pci_resource_start(dev->pdev, priv->fw.catas_bar) + + priv->fw.catas_offset; + + priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4); + if (!priv->catas_err.map) { + mlx4_warn(dev, "Failed to map internal error buffer at 0x%llx\n", + (unsigned long long) addr); + return; + } + + priv->catas_err.timer.data = (unsigned long) dev; + priv->catas_err.timer.function = poll_catas; + priv->catas_err.timer.expires = + round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL); + add_timer(&priv->catas_err.timer); +} + +void mlx4_stop_catas_poll(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + del_timer_sync(&priv->catas_err.timer); + + if (priv->catas_err.map) + iounmap(priv->catas_err.map); + + spin_lock_irq(&catas_lock); + list_del(&priv->catas_err.list); + spin_unlock_irq(&catas_lock); +} + +void __init mlx4_catas_init(void) +{ + INIT_WORK(&catas_work, catas_reset); +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cmd.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cmd.c new file mode 100755 index 0000000..1f0f51c --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cmd.c @@ -0,0 +1,1954 @@ +/* + * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* NOT _VMKERNEL_MODULE__ */ +#include +#include + +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* NOT _VMKERNEL_MODULE__ */ +#include + +#include + +#include "mlx4.h" +#include "fw.h" + +#define CMD_POLL_TOKEN 0xffff +#define INBOX_MASK 0xffffffffffffff00ULL + +#define CMD_CHAN_VER 1 +#define CMD_CHAN_IF_REV 1 + +enum { + /* command completed successfully: */ + CMD_STAT_OK = 0x00, + /* Internal error (such as a bus error) occurred while processing command: */ + CMD_STAT_INTERNAL_ERR = 0x01, + /* Operation/command not supported or opcode modifier not supported: */ + CMD_STAT_BAD_OP = 0x02, + /* Parameter not supported or parameter out of range: */ + CMD_STAT_BAD_PARAM = 0x03, + /* System not enabled or bad system state: */ + CMD_STAT_BAD_SYS_STATE = 0x04, + /* Attempt to access reserved or unallocaterd resource: */ + CMD_STAT_BAD_RESOURCE = 0x05, + /* Requested resource is currently executing a command, or is otherwise busy: */ + CMD_STAT_RESOURCE_BUSY = 0x06, + /* Required capability exceeds device limits: */ + CMD_STAT_EXCEED_LIM = 0x08, + /* Resource is not in the appropriate state or ownership: */ + CMD_STAT_BAD_RES_STATE = 0x09, + /* Index out of range: */ + CMD_STAT_BAD_INDEX = 0x0a, + /* FW image corrupted: */ + CMD_STAT_BAD_NVMEM = 0x0b, + /* Error in ICM mapping (e.g. not enough auxiliary ICM pages to execute command): */ + CMD_STAT_ICM_ERROR = 0x0c, + /* Attempt to modify a QP/EE which is not in the presumed state: */ + CMD_STAT_BAD_QP_STATE = 0x10, + /* Bad segment parameters (Address/Size): */ + CMD_STAT_BAD_SEG_PARAM = 0x20, + /* Memory Region has Memory Windows bound to: */ + CMD_STAT_REG_BOUND = 0x21, + /* HCA local attached memory not present: */ + CMD_STAT_LAM_NOT_PRE = 0x22, + /* Bad management packet (silently discarded): */ + CMD_STAT_BAD_PKT = 0x30, + /* More outstanding CQEs in CQ than new CQ size: */ + CMD_STAT_BAD_SIZE = 0x40, + /* Multi Function device support required: */ + CMD_STAT_MULTI_FUNC_REQ = 0x50, +}; + +enum { + HCR_IN_PARAM_OFFSET = 0x00, + HCR_IN_MODIFIER_OFFSET = 0x08, + HCR_OUT_PARAM_OFFSET = 0x0c, + HCR_TOKEN_OFFSET = 0x14, + HCR_STATUS_OFFSET = 0x18, + + HCR_OPMOD_SHIFT = 12, + HCR_T_BIT = 21, + HCR_E_BIT = 22, + HCR_GO_BIT = 23 +}; + +enum { + GO_BIT_TIMEOUT_MSECS = 10000 +}; + +struct mlx4_cmd_context { + struct completion done; + int result; + int next; + u64 out_param; + u16 token; + u8 fw_status; +}; + +static int mlx4_master_process_vhcr(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr_cmd *in_vhcr); + +static int mlx4_status_to_errno(u8 status) +{ + static const int trans_table[] = { + [CMD_STAT_INTERNAL_ERR] = -EIO, + [CMD_STAT_BAD_OP] = -EPERM, + [CMD_STAT_BAD_PARAM] = -EINVAL, + [CMD_STAT_BAD_SYS_STATE] = -ENXIO, + [CMD_STAT_BAD_RESOURCE] = -EBADF, + [CMD_STAT_RESOURCE_BUSY] = -EBUSY, + [CMD_STAT_EXCEED_LIM] = -ENOMEM, + [CMD_STAT_BAD_RES_STATE] = -EBADF, + [CMD_STAT_BAD_INDEX] = -EBADF, + [CMD_STAT_BAD_NVMEM] = -EFAULT, + [CMD_STAT_ICM_ERROR] = -ENFILE, + [CMD_STAT_BAD_QP_STATE] = -EINVAL, + [CMD_STAT_BAD_SEG_PARAM] = -EFAULT, + [CMD_STAT_REG_BOUND] = -EBUSY, + [CMD_STAT_LAM_NOT_PRE] = -EAGAIN, + [CMD_STAT_BAD_PKT] = -EINVAL, + [CMD_STAT_BAD_SIZE] = -ENOMEM, + [CMD_STAT_MULTI_FUNC_REQ] = -EACCES, + }; + + if (status >= ARRAY_SIZE(trans_table) || + (status != CMD_STAT_OK && trans_table[status] == 0)) + return -EIO; + + return trans_table[status]; +} + +static u8 mlx4_errno_to_status(int errno) +{ + switch (errno) { + case -EPERM: + return CMD_STAT_BAD_OP; + case -EINVAL: + return CMD_STAT_BAD_PARAM; + case -ENXIO: + return CMD_STAT_BAD_SYS_STATE; + case -EBUSY: + return CMD_STAT_RESOURCE_BUSY; + case -ENOMEM: + return CMD_STAT_EXCEED_LIM; + case -ENFILE: + return CMD_STAT_ICM_ERROR; + default: + return CMD_STAT_INTERNAL_ERR; + } +} + +static int comm_pending(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + u32 status = readl(&priv->mfunc.comm->slave_read); + + return (swab32(status) >> 31) != priv->cmd.comm_toggle; +} + +static void mlx4_comm_cmd_post(struct mlx4_dev *dev, u8 cmd, u16 param) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + u32 val; + + priv->cmd.comm_toggle ^= 1; + val = param | (cmd << 16) | (priv->cmd.comm_toggle << 31); + __raw_writel((__force u32) cpu_to_be32(val), + &priv->mfunc.comm->slave_write); + mmiowb(); +} + +static int mlx4_comm_cmd_poll(struct mlx4_dev *dev, u8 cmd, u16 param, + unsigned long timeout) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + unsigned long end; + int err = 0; + int ret_from_pending = 0; + + /* First, verify that the master reports correct status */ + if (comm_pending(dev)) { + mlx4_warn(dev, "Communication channel is not idle." + "my toggle is %d (cmd:0x%x)\n", + priv->cmd.comm_toggle, cmd); + return -EAGAIN; + } + + /* Write command */ + down(&priv->cmd.poll_sem); + mlx4_comm_cmd_post(dev, cmd, param); + + end = msecs_to_jiffies(timeout) + jiffies; + while (comm_pending(dev) && time_before(jiffies, end)) + cond_resched(); + ret_from_pending = comm_pending(dev); + if (ret_from_pending) { + /* check if the slave is trying to boot in the middle of + * FLR process. The only non-zero result in the RESET command + * is MLX4_DELAY_RESET_SLAVE*/ + if ((MLX4_COMM_CMD_RESET == cmd)) { + mlx4_warn(dev, "Got slave FLRed from Communication" + " channel (ret:0x%x)\n", ret_from_pending); + err = MLX4_DELAY_RESET_SLAVE; + } else { + mlx4_warn(dev, "Communication channel timed out\n"); + err = -ETIMEDOUT; + } + } + + up(&priv->cmd.poll_sem); + return err; +} + +static int mlx4_comm_cmd_wait(struct mlx4_dev *dev, u8 op, + u16 param, unsigned long timeout) +{ + struct mlx4_cmd *cmd = &mlx4_priv(dev)->cmd; + struct mlx4_cmd_context *context; + unsigned long end; + int err = 0; + + down(&cmd->event_sem); + + spin_lock(&cmd->context_lock); + BUG_ON(cmd->free_head < 0); + context = &cmd->context[cmd->free_head]; + context->token += cmd->token_mask + 1; + cmd->free_head = context->next; + spin_unlock(&cmd->context_lock); + + init_completion(&context->done); + + mlx4_comm_cmd_post(dev, op, param); + + if (!wait_for_completion_timeout(&context->done, + msecs_to_jiffies(timeout))) { + err = -EBUSY; + goto out; + } + + err = context->result; + if (err && context->fw_status != CMD_STAT_MULTI_FUNC_REQ) { + mlx4_err(dev, "command 0x%x failed: fw status = 0x%x\n", + op, context->fw_status); + goto out; + } + +out: + /* wait for comm channel ready + * this is necessary for prevention the race + * when switching between event to polling mode + */ + end = msecs_to_jiffies(timeout) + jiffies; + while (comm_pending(dev) && time_before(jiffies, end)) + cond_resched(); + + spin_lock(&cmd->context_lock); + context->next = cmd->free_head; + cmd->free_head = context - cmd->context; + spin_unlock(&cmd->context_lock); + + up(&cmd->event_sem); + return err; +} + +int mlx4_comm_cmd(struct mlx4_dev *dev, u8 cmd, u16 param, + unsigned long timeout) +{ + if (mlx4_priv(dev)->cmd.use_events) + return mlx4_comm_cmd_wait(dev, cmd, param, timeout); + return mlx4_comm_cmd_poll(dev, cmd, param, timeout); +} + +static int cmd_pending(struct mlx4_dev *dev) +{ + u32 status = readl(mlx4_priv(dev)->cmd.hcr + HCR_STATUS_OFFSET); + + return (status & swab32(1 << HCR_GO_BIT)) || + (mlx4_priv(dev)->cmd.toggle == + !!(status & swab32(1 << HCR_T_BIT))); +} + +static int mlx4_cmd_post(struct mlx4_dev *dev, u64 in_param, u64 out_param, + u32 in_modifier, u8 op_modifier, u16 op, u16 token, + int event) +{ + struct mlx4_cmd *cmd = &mlx4_priv(dev)->cmd; + u32 __iomem *hcr = cmd->hcr; + int ret = -EAGAIN; + unsigned long end; + + mutex_lock(&cmd->hcr_mutex); + + end = jiffies; + if (event) + end += msecs_to_jiffies(GO_BIT_TIMEOUT_MSECS); + + while (cmd_pending(dev)) { + if (time_after_eq(jiffies, end)) { + mlx4_err(dev, "%s:cmd_pending failed\n", __func__); + goto out; + } + cond_resched(); + } + + /* + * We use writel (instead of something like memcpy_toio) + * because writes of less than 32 bits to the HCR don't work + * (and some architectures such as ia64 implement memcpy_toio + * in terms of writeb). + */ + __raw_writel((__force u32) cpu_to_be32(in_param >> 32), hcr + 0); + __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), hcr + 1); + __raw_writel((__force u32) cpu_to_be32(in_modifier), hcr + 2); + __raw_writel((__force u32) cpu_to_be32(out_param >> 32), hcr + 3); + __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), hcr + 4); + __raw_writel((__force u32) cpu_to_be32(token << 16), hcr + 5); + + /* __raw_writel may not order writes. */ + wmb(); + + __raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) | + (cmd->toggle << HCR_T_BIT) | + (event ? (1 << HCR_E_BIT) : 0) | + (op_modifier << HCR_OPMOD_SHIFT) | + op), hcr + 6); + + /* + * Make sure that our HCR writes don't get mixed in with + * writes from another CPU starting a FW command. + */ + mmiowb(); + + cmd->toggle = cmd->toggle ^ 1; + + ret = 0; + +out: + mutex_unlock(&cmd->hcr_mutex); + return ret; +} + +static int mlx4_slave_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param, + int out_is_imm, u32 in_modifier, u8 op_modifier, + u16 op, unsigned long timeout) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_vhcr_cmd *vhcr = priv->mfunc.vhcr; + int ret; + + down(&priv->cmd.slave_sem); + vhcr->in_param = cpu_to_be64(in_param); + vhcr->out_param = out_param ? cpu_to_be64(*out_param) : 0; + vhcr->in_modifier = cpu_to_be32(in_modifier); + vhcr->opcode = cpu_to_be16((((u16) op_modifier) << 12) | (op & 0xfff)); + vhcr->token = cpu_to_be16(CMD_POLL_TOKEN); + vhcr->status = 0; + vhcr->flags = !!(priv->cmd.use_events) << 6; + if (mlx4_is_master(dev)) { + ret = mlx4_master_process_vhcr(dev, dev->caps.function, vhcr); + if (!ret) { + if (out_is_imm) { + if (out_param) + *out_param = + be64_to_cpu(vhcr->out_param); + else { + mlx4_err(dev, "response expected while" + "output mailbox is NULL for " + "command 0x%x\n", op); + vhcr->status = CMD_STAT_BAD_PARAM; + } + } + ret = mlx4_status_to_errno(vhcr->status); + } + } else { + ret = mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_POST, 0, + MLX4_COMM_TIME + timeout); + if (!ret) { + if (out_is_imm) { + if (out_param) + *out_param = + be64_to_cpu(vhcr->out_param); + else { + mlx4_err(dev, "response expected while" + "output mailbox is NULL for " + "command 0x%x\n", op); + vhcr->status = CMD_STAT_BAD_PARAM; + } + } + ret = mlx4_status_to_errno(vhcr->status); + } else + mlx4_err(dev, "failed execution of VHCR_POST command" + "opcode 0x%x\n", op); + } + up(&priv->cmd.slave_sem); + return ret; +} + +static int mlx4_cmd_poll(struct mlx4_dev *dev, u64 in_param, u64 *out_param, + int out_is_imm, u32 in_modifier, u8 op_modifier, + u16 op, unsigned long timeout) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + void __iomem *hcr = priv->cmd.hcr; + int err = 0; + unsigned long end; + u32 stat; + + down(&priv->cmd.poll_sem); + + err = mlx4_cmd_post(dev, in_param, out_param ? *out_param : 0, + in_modifier, op_modifier, op, CMD_POLL_TOKEN, 0); + if (err) + goto out; + + end = msecs_to_jiffies(timeout) + jiffies; + while (cmd_pending(dev) && time_before(jiffies, end)) + cond_resched(); + + if (cmd_pending(dev)) { + err = -ETIMEDOUT; + goto out; + } + + if (out_is_imm) + *out_param = + (u64) be32_to_cpu((__force __be32) + __raw_readl(hcr + HCR_OUT_PARAM_OFFSET)) << 32 | + (u64) be32_to_cpu((__force __be32) + __raw_readl(hcr + HCR_OUT_PARAM_OFFSET + 4)); + stat = be32_to_cpu((__force __be32) + __raw_readl(hcr + HCR_STATUS_OFFSET)) >> 24; + err = mlx4_status_to_errno(stat); + if (err) + mlx4_err(dev, "command 0x%x failed: fw status = 0x%x\n", + op, stat); + +out: + up(&priv->cmd.poll_sem); + return err; +} + +void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cmd_context *context = + &priv->cmd.context[token & priv->cmd.token_mask]; + + /* previously timed out command completing at long last */ + if (token != context->token) + return; + + context->fw_status = status; + context->result = mlx4_status_to_errno(status); + context->out_param = out_param; + + complete(&context->done); +} + +static int mlx4_cmd_wait(struct mlx4_dev *dev, u64 in_param, u64 *out_param, + int out_is_imm, u32 in_modifier, u8 op_modifier, + u16 op, unsigned long timeout) +{ + struct mlx4_cmd *cmd = &mlx4_priv(dev)->cmd; + struct mlx4_cmd_context *context; + int err = 0; + + down(&cmd->event_sem); + + spin_lock(&cmd->context_lock); + BUG_ON(cmd->free_head < 0); + context = &cmd->context[cmd->free_head]; + context->token += cmd->token_mask + 1; + cmd->free_head = context->next; + spin_unlock(&cmd->context_lock); + + init_completion(&context->done); + + mlx4_cmd_post(dev, in_param, out_param ? *out_param : 0, + in_modifier, op_modifier, op, context->token, 1); + + if (!wait_for_completion_timeout(&context->done, + msecs_to_jiffies(timeout))) { + err = -EBUSY; + goto out; + } + + err = context->result; + if (err) { + mlx4_err(dev, "command 0x%x failed: fw status = 0x%x\n", + op, context->fw_status); + goto out; + } + + if (out_is_imm) + *out_param = context->out_param; + +out: + spin_lock(&cmd->context_lock); + context->next = cmd->free_head; + cmd->free_head = context - cmd->context; + spin_unlock(&cmd->context_lock); + + up(&cmd->event_sem); + return err; +} + +int __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param, + int out_is_imm, u32 in_modifier, u8 op_modifier, + u16 op, unsigned long timeout, int native) +{ + if (!mlx4_is_mfunc(dev) || (native && mlx4_is_master(dev))) { + if (mlx4_priv(dev)->cmd.use_events) + return mlx4_cmd_wait(dev, in_param, out_param, + out_is_imm, in_modifier, + op_modifier, op, timeout); + else + return mlx4_cmd_poll(dev, in_param, out_param, + out_is_imm, in_modifier, + op_modifier, op, timeout); + } + return mlx4_slave_cmd(dev, in_param, out_param, out_is_imm, + in_modifier, op_modifier, op, timeout); +} +EXPORT_SYMBOL_GPL(__mlx4_cmd); + + +static int mlx4_ARM_COMM_CHANNEL(struct mlx4_dev *dev) +{ + return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_ARM_COMM_CHANNEL, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); +} + +static int mlx4_ACCESS_MEM(struct mlx4_dev *dev, u64 master_addr, + int slave, u64 slave_addr, + int size, int is_read) +{ + u64 in_param; + u64 out_param; + + if ((slave_addr & 0xfff) | (master_addr & 0xfff) | + (slave & ~0x7f) | (size & 0xff)) { + mlx4_err(dev, "Bad access mem params - slave_addr:0x%llx " + "master_addr:0x%llx slave_id:%d size:%d\n", + slave_addr, master_addr, slave, size); + return -EINVAL; + } + + if (is_read) { + in_param = (u64) slave | slave_addr; + out_param = (u64) dev->caps.function | master_addr; + } else { + in_param = (u64) dev->caps.function | master_addr; + out_param = (u64) slave | slave_addr; + } + + return mlx4_cmd_imm(dev, in_param, &out_param, size, 0, + MLX4_CMD_ACCESS_MEM, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); +} + +static int MAD_IFC(struct mlx4_dev *dev, int ignore_mkey, int ignore_bkey, + int port, struct ib_wc *in_wc, struct ib_grh *in_grh, + void *in_mad, void *response_mad) +{ + struct mlx4_cmd_mailbox *inmailbox, *outmailbox; + void *inbox; + int err; + u32 in_modifier = port; + u8 op_modifier = 0; + + inmailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(inmailbox)) + return PTR_ERR(inmailbox); + inbox = inmailbox->buf; + + outmailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(outmailbox)) { + mlx4_free_cmd_mailbox(dev, inmailbox); + return PTR_ERR(outmailbox); + } + + memcpy(inbox, in_mad, 256); + + /* + * Key check traps can't be generated unless we have in_wc to + * tell us where to send the trap. + */ + if (ignore_mkey || !in_wc) + op_modifier |= 0x1; + if (ignore_bkey || !in_wc) + op_modifier |= 0x2; + + if (in_wc) { + struct { + __be32 my_qpn; + u32 reserved1; + __be32 rqpn; + u8 sl; + u8 g_path; + u16 reserved2[2]; + __be16 pkey; + u32 reserved3[11]; + u8 grh[40]; + } *ext_info; + + memset(inbox + 256, 0, 256); + ext_info = inbox + 256; + + ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num); + ext_info->rqpn = cpu_to_be32(in_wc->src_qp); + ext_info->sl = in_wc->sl << 4; + ext_info->g_path = in_wc->dlid_path_bits | + (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0); + ext_info->pkey = cpu_to_be16(in_wc->pkey_index); + + if (in_grh) + memcpy(ext_info->grh, in_grh, 40); + + op_modifier |= 0x4; + + in_modifier |= in_wc->slid << 16; + } + + err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, + in_modifier, op_modifier, + MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, MLX4_CMD_NATIVE); + + if (!err) + memcpy(response_mad, outmailbox->buf, 256); + + mlx4_free_cmd_mailbox(dev, inmailbox); + mlx4_free_cmd_mailbox(dev, outmailbox); + + return err; +} + +static int query_pkey_block(struct mlx4_dev *dev, u8 port, u16 index, u16 *pkey, struct ib_smp *in_mad, struct ib_smp *out_mad) +{ + int err = -ENOMEM; + int i; + + if (index & 0x1f) + return -EINVAL; + + in_mad->attr_mod = cpu_to_be32(index / 32); + + err = MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad); + if (err) + return err; + + for (i = 0; i < 32; ++i) + pkey[i] = be16_to_cpu(((__be16 *) out_mad->data)[i]); + + return err; +} + +static int get_full_pkey_table(struct mlx4_dev *dev, u8 port, u16 *table, struct ib_smp * in_mad, struct ib_smp *outsmp) +{ + int i; + int err; + + for (i = 0; i < dev->caps.pkey_table_len[port]; i += 32) { + err = query_pkey_block(dev, port, i, table + i, in_mad, outsmp); + if (err) + return err; + } + + return 0; +} +#define PORT_CAPABILITY_LOCATION_IN_SMP 20 +#define PORT_STATE_OFFSET 32 + +static enum ib_port_state vf_port_state(struct mlx4_dev *dev, int port, int vf) +{ + if (mlx4_get_slave_port_state(dev, vf, port) == SLAVE_PORT_UP) + return IB_PORT_ACTIVE; + else + return IB_PORT_DOWN; +} + +static int mlx4_MAD_IFC_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + struct ib_smp *smp = inbox->buf; + u32 index; + u8 port; + u16 *table; + int err; + int vidx, pidx; + struct mlx4_priv *priv = mlx4_priv(dev); + struct ib_smp *outsmp = outbox->buf; + __be16 *outtab = (__be16 *)(outsmp->data); + __be32 slave_cap_mask; + port = vhcr->in_modifier; + + /*mlx4_dbg(dev, "%s, slave %d, bv %d, mc %d, cv %d, mtd %d atrr %d\n", + __func__, slave, smp->base_version, smp->mgmt_class, smp->class_version, smp->method, be16_to_cpu(smp->attr_id)); + */ + if (smp->base_version == 1 && + smp->mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED && + smp->class_version == 1) { + if (smp->method == IB_MGMT_METHOD_GET) { + if (smp->attr_id == IB_SMP_ATTR_PKEY_TABLE) { + index = be32_to_cpu(smp->attr_mod); + /*mlx4_dbg(dev, "query pkey for slave %d, port %d, index %d\n", slave, port, index);*/ + if (port < 1 || port > dev->caps.num_ports) + return -EINVAL; + table = kzalloc(dev->caps.pkey_table_len[port] * sizeof *table, GFP_KERNEL); + if (!table) + return -ENOMEM; + err = get_full_pkey_table(dev, port, table, smp, outsmp); + if (!err) { + for (vidx = index * 32; vidx < (index + 1) * 32; ++vidx) { + pidx = priv->virt2phys_pkey[slave][port - 1][vidx]; + outtab[vidx % 32] = cpu_to_be16(table[pidx]); + /*mlx4_dbg(dev, "vidx = %d, pidx = %d, pkey = 0x%04x\n", vidx, pidx, table[pidx]);*/ + } + } + kfree(table); + return err; + } + if (smp->attr_id == IB_SMP_ATTR_PORT_INFO) { + /*get the slave specific caps:*/ + /*do the command */ + err = mlx4_cmd_box(dev, inbox->dma, outbox->dma, + vhcr->in_modifier, vhcr->op_modifier, + vhcr->op, MLX4_CMD_TIME_CLASS_C, MLX4_CMD_NATIVE); + /*mlx4_dbg(dev, "query port_info for slave %d, port %d, slave_cap: 0x%x\n", slave, port, slave_cap_mask);*/ + /* modify the response for slaves */ + if (!err && slave != dev->caps.function) { + u8 *state = outsmp->data + PORT_STATE_OFFSET; + + *state = (*state & 0xf0) | vf_port_state(dev, port, slave); + slave_cap_mask = priv->mfunc.master.slave_state[slave].ib_cap_mask[port]; + memcpy(outsmp->data + PORT_CAPABILITY_LOCATION_IN_SMP, &slave_cap_mask, 4); + } + return err; + } + if (smp->attr_id == IB_SMP_ATTR_GUID_INFO) { + /* compute slave's gid block */ + smp->attr_mod = cpu_to_be32(slave / 8); + /* execute cmd */ + err = mlx4_cmd_box(dev, inbox->dma, outbox->dma, + vhcr->in_modifier, vhcr->op_modifier, + vhcr->op, MLX4_CMD_TIME_CLASS_C, MLX4_CMD_NATIVE); + if (!err) { + /* if needed, move slave gid to index 0 */ + if (slave % 8) + memcpy(outsmp->data, + outsmp->data + (slave % 8) * 8, 8); + /* delete all other gids */ + memset(outsmp->data + 8, 0, 56); + } + return err; + } + } + if (smp->method == IB_MGMT_METHOD_SET && slave != dev->caps.function) { + mlx4_err(dev, "slave %d is trying to execute a IB_MGMT_METHOD_SET operation (%d). aborting\n", slave,smp->attr_id); + return -EPERM; + } + } + /*default:*/ + return mlx4_cmd_box(dev, inbox->dma, outbox->dma, + vhcr->in_modifier, vhcr->op_modifier, + vhcr->op, MLX4_CMD_TIME_CLASS_C, MLX4_CMD_NATIVE); +} + +int mlx4_DMA_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + u64 in_param; + u64 out_param; + int err; + + in_param = cmd->has_inbox ? (u64) inbox->dma : vhcr->in_param; + out_param = cmd->has_outbox ? (u64) outbox->dma : vhcr->out_param; + if (cmd->encode_slave_id) { + in_param &= 0xffffffffffffff00ll; + in_param |= slave; + } + + err = __mlx4_cmd(dev, in_param, &out_param, cmd->out_is_imm, + vhcr->in_modifier, vhcr->op_modifier, vhcr->op, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + + if (cmd->out_is_imm) + vhcr->out_param = out_param; + + return err; +} + +static struct mlx4_cmd_info cmd_info[] = { + { + .opcode = MLX4_CMD_QUERY_FW, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QUERY_FW_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_HCA, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = NULL + }, + { + .opcode = MLX4_CMD_QUERY_DEV_CAP, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QUERY_DEV_CAP_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_FUNC_CAP, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QUERY_FUNC_CAP_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_ADAPTER, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = NULL + }, + { + .opcode = MLX4_CMD_INIT_PORT, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_INIT_PORT_wrapper + }, + { + .opcode = MLX4_CMD_CLOSE_PORT, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_CLOSE_PORT_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_PORT, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QUERY_PORT_wrapper + }, + { + .opcode = MLX4_CMD_SET_PORT, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_SET_PORT_wrapper + }, + { + .opcode = MLX4_CMD_MAP_EQ, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_MAP_EQ_wrapper + }, + { + .opcode = MLX4_CMD_SW2HW_EQ, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = true, + .verify = NULL, + .wrapper = mlx4_SW2HW_EQ_wrapper + }, + { + .opcode = MLX4_CMD_HW_HEALTH_CHECK, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = NULL + }, + { + .opcode = MLX4_CMD_NOP, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = NULL + }, + { + .opcode = MLX4_CMD_ALLOC_RES, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = true, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_ALLOC_RES_wrapper + }, + { + .opcode = MLX4_CMD_FREE_RES, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_FREE_RES_wrapper + }, + { + .opcode = MLX4_CMD_SW2HW_MPT, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = true, + .verify = NULL, + .wrapper = mlx4_SW2HW_MPT_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_MPT, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QUERY_MPT_wrapper + }, + { + .opcode = MLX4_CMD_HW2SW_MPT, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_HW2SW_MPT_wrapper + }, + { + .opcode = MLX4_CMD_READ_MTT, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = NULL + }, + { + .opcode = MLX4_CMD_WRITE_MTT, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_WRITE_MTT_wrapper + }, + { + .opcode = MLX4_CMD_SYNC_TPT, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = NULL + }, + { + .opcode = MLX4_CMD_HW2SW_EQ, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = true, + .verify = NULL, + .wrapper = mlx4_HW2SW_EQ_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_EQ, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = true, + .verify = NULL, + .wrapper = mlx4_QUERY_EQ_wrapper + }, + { + .opcode = MLX4_CMD_SW2HW_CQ, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = true, + .verify = NULL, + .wrapper = mlx4_SW2HW_CQ_wrapper + }, + { + .opcode = MLX4_CMD_HW2SW_CQ, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_HW2SW_CQ_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_CQ, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QUERY_CQ_wrapper + }, + { + .opcode = MLX4_CMD_MODIFY_CQ, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = true, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_MODIFY_CQ_wrapper + }, + { + .opcode = MLX4_CMD_SW2HW_SRQ, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = true, + .verify = NULL, + .wrapper = mlx4_SW2HW_SRQ_wrapper + }, + { + .opcode = MLX4_CMD_HW2SW_SRQ, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_HW2SW_SRQ_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_SRQ, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QUERY_SRQ_wrapper + }, + { + .opcode = MLX4_CMD_ARM_SRQ, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_ARM_SRQ_wrapper + }, + { + .opcode = MLX4_CMD_RST2INIT_QP, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = true, + .verify = NULL, + .wrapper = mlx4_RST2INIT_QP_wrapper + }, + { + .opcode = MLX4_CMD_INIT2INIT_QP, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_INIT2INIT_QP_wrapper + }, + { + .opcode = MLX4_CMD_INIT2RTR_QP, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_INIT2RTR_QP_wrapper + }, + { + .opcode = MLX4_CMD_RTR2RTS_QP, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_RTR2RTS_QP_wrapper + }, + { + .opcode = MLX4_CMD_RTS2RTS_QP, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_RTS2RTS_QP_wrapper + }, + { + .opcode = MLX4_CMD_SQERR2RTS_QP, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_SQERR2RTS_QP_wrapper + }, + { + .opcode = MLX4_CMD_2ERR_QP, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_GEN_QP_wrapper + }, + { + .opcode = MLX4_CMD_RTS2SQD_QP, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_GEN_QP_wrapper + }, + { + .opcode = MLX4_CMD_SQD2SQD_QP, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_SQD2SQD_QP_wrapper + }, + { + .opcode = MLX4_CMD_SQD2RTS_QP, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_SQD2RTS_QP_wrapper + }, + { + .opcode = MLX4_CMD_2RST_QP, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_2RST_QP_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_QP, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_GEN_QP_wrapper + }, + { + .opcode = MLX4_CMD_SUSPEND_QP, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_GEN_QP_wrapper + }, + { + .opcode = MLX4_CMD_UNSUSPEND_QP, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_GEN_QP_wrapper + }, + { + .opcode = MLX4_CMD_CONF_SPECIAL_QP, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, /* XXX verify: only demux can do this */ + .wrapper = NULL + }, + { + .opcode = MLX4_CMD_MAD_IFC, + .has_inbox = true, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_MAD_IFC_wrapper + }, + { + .opcode = MLX4_CMD_QUERY_IF_STAT, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QUERY_IF_STAT_wrapper + }, + /* Native multicast commands are not available for guests */ + { + .opcode = MLX4_CMD_QP_ATTACH, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_QP_ATTACH_wrapper + }, + { + .opcode = MLX4_CMD_PROMISC, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_PROMISC_wrapper + }, + /* Ethernet specific commands */ + { + .opcode = MLX4_CMD_SET_VLAN_FLTR, + .has_inbox = true, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_SET_VLAN_FLTR_wrapper + }, + { + .opcode = MLX4_CMD_SET_MCAST_FLTR, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_SET_MCAST_FLTR_wrapper + }, + { + .opcode = MLX4_CMD_DUMP_ETH_STATS, + .has_inbox = false, + .has_outbox = true, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = mlx4_DUMP_ETH_STATS_wrapper + }, + { + .opcode = MLX4_CMD_INFORM_FLR_DONE, + .has_inbox = false, + .has_outbox = false, + .out_is_imm = false, + .encode_slave_id = false, + .verify = NULL, + .wrapper = NULL + }, +}; + +static int mlx4_master_process_vhcr(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr_cmd *in_vhcr) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cmd_info *cmd = NULL; + struct mlx4_vhcr_cmd *vhcr_cmd = in_vhcr ? in_vhcr : priv->mfunc.vhcr; + struct mlx4_vhcr *vhcr; + struct mlx4_cmd_mailbox *inbox = NULL; + struct mlx4_cmd_mailbox *outbox = NULL; + u64 in_param; + u64 out_param; + int ret = 0; + int i; + int err = 0; + + /* Create sw representation of Virtual HCR */ + vhcr = kzalloc(sizeof(struct mlx4_vhcr), GFP_KERNEL); + if (!vhcr) + return -ENOMEM; + + /* DMA in the vHCR */ + if (!in_vhcr) { + ret = mlx4_ACCESS_MEM(dev, priv->mfunc.vhcr_dma, slave, + priv->mfunc.master.slave_state[slave].vhcr_dma, + ALIGN(sizeof(struct mlx4_vhcr_cmd), + MLX4_ACCESS_MEM_ALIGN), 1); + if (ret) { + mlx4_err(dev, "%s:Failed reading vhcr" + "ret: 0x%x\n", __func__, ret); + kfree(vhcr); + return ret; + } + } + + /* Fill SW VHCR fields */ + vhcr->in_param = be64_to_cpu(vhcr_cmd->in_param); + vhcr->out_param = be64_to_cpu(vhcr_cmd->out_param); + vhcr->in_modifier = be32_to_cpu(vhcr_cmd->in_modifier); + vhcr->token = be16_to_cpu(vhcr_cmd->token); + vhcr->op = be16_to_cpu(vhcr_cmd->opcode) & 0xfff; + vhcr->op_modifier = (u8) (be16_to_cpu(vhcr_cmd->opcode) >> 12); + vhcr->e_bit = vhcr_cmd->flags & (1 << 6); + + /* Lookup command */ + for (i = 0; i < ARRAY_SIZE(cmd_info); ++i) { + if (vhcr->op == cmd_info[i].opcode) { + cmd = &cmd_info[i]; + break; + } + } + if (!cmd) { + mlx4_err(dev, "Unknown command:0x%x accepted from slave:%d\n", + vhcr->op, slave); + vhcr_cmd->status = CMD_STAT_BAD_PARAM; + goto out_status; + } + + /* Read inbox */ + if (cmd->has_inbox) { + vhcr->in_param &= INBOX_MASK; + inbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(inbox)) { + vhcr_cmd->status = CMD_STAT_BAD_SIZE; + inbox = NULL; + goto out_status; + } + + if (mlx4_ACCESS_MEM(dev, inbox->dma, slave, + vhcr->in_param, + MLX4_MAILBOX_SIZE, 1)) { + mlx4_err(dev, "%s: Failed reading inbox (cmd:0x%x)\n", + __func__, cmd->opcode); + vhcr_cmd->status = CMD_STAT_INTERNAL_ERR; + goto out_status; + } + } + + /* Apply permission and bound checks if applicable */ + if (cmd->verify && cmd->verify(dev, slave, vhcr, inbox)) { + mlx4_warn(dev, "Command:0x%x from slave: %d failed protection " + "checks for resource_id:%d\n", vhcr->op, slave, + vhcr->in_modifier); + vhcr_cmd->status = CMD_STAT_BAD_OP; + goto out_status; + } + + /* Allocate outbox */ + if (cmd->has_outbox) { + outbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(outbox)) { + vhcr_cmd->status = CMD_STAT_BAD_SIZE; + outbox = NULL; + goto out_status; + } + } + + /* Execute the command! */ + if (cmd->wrapper) { + err = cmd->wrapper(dev, slave, vhcr, inbox, outbox, + cmd); + if (cmd->out_is_imm) + vhcr_cmd->out_param = cpu_to_be64(vhcr->out_param); + } else { + in_param = cmd->has_inbox ? (u64) inbox->dma : + vhcr->in_param; + out_param = cmd->has_outbox ? (u64) outbox->dma : + vhcr->out_param; + err = __mlx4_cmd(dev, in_param, &out_param, + cmd->out_is_imm, vhcr->in_modifier, + vhcr->op_modifier, vhcr->op, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); + + if (cmd->out_is_imm) { + vhcr->out_param = out_param; + vhcr_cmd->out_param = cpu_to_be64(vhcr->out_param); + } + } + + if (err) { + mlx4_warn(dev, "vhcr command:0x%x slave:%d failed with" + " error:%d, status %d\n", + vhcr->op, slave, vhcr->errno, err); + vhcr_cmd->status = mlx4_errno_to_status(err); + goto out_status; + } + + + /* Write outbox if command completed successfully */ + if (cmd->has_outbox && !vhcr_cmd->status) { + ret = mlx4_ACCESS_MEM(dev, outbox->dma, slave, + vhcr->out_param, + MLX4_MAILBOX_SIZE, MLX4_CMD_WRAPPED); + if (ret) { + /* If we failed to write back the outbox after the + *command was successfully executed, we must fail this + * slave, as it is now in undefined state */ + mlx4_err(dev, "%s:Failed writing outbox\n", __func__); + goto out; + } + } + +out_status: + /* DMA back vhcr result */ + if (!in_vhcr) { + ret = mlx4_ACCESS_MEM(dev, priv->mfunc.vhcr_dma, slave, + priv->mfunc.master.slave_state[slave].vhcr_dma, + ALIGN(sizeof(struct mlx4_vhcr), + MLX4_ACCESS_MEM_ALIGN), + MLX4_CMD_WRAPPED); + if (ret) + mlx4_err(dev, "%s:Failed writing vhcr result\n", + __func__); + else if (vhcr->e_bit && + mlx4_GEN_EQE(dev, slave, &priv->mfunc.master.cmd_eqe)) + mlx4_warn(dev, "Failed to generate command completion " + "eqe for slave %d\n", slave); + } + +out: + kfree(vhcr); + mlx4_free_cmd_mailbox(dev, inbox); + mlx4_free_cmd_mailbox(dev, outbox); + return ret; +} + +static void mlx4_master_do_cmd(struct mlx4_dev *dev, int slave, u8 cmd, + u16 param, u8 toggle) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *slave_state = priv->mfunc.master.slave_state; + u32 reply; + u32 slave_status = 0; + u8 is_going_down = 0; + int i; + + slave_state[slave].comm_toggle ^= 1; + reply = (u32) slave_state[slave].comm_toggle << 31; + if (toggle != slave_state[slave].comm_toggle) { + mlx4_warn(dev, "Incorrect toggle %d from slave %d. *** MASTER" + "STATE COMPROMISIED ***\n", toggle, slave); + goto reset_slave; + } + if (cmd == MLX4_COMM_CMD_RESET) { + mlx4_warn(dev, "Received reset from slave:%d\n", slave); + slave_state[slave].active = false; + for (i = 0; i < MLX4_EVENT_TYPES_NUM; ++i) { + slave_state[slave].event_eq[i].eqn = -1; + slave_state[slave].event_eq[i].token = 0; + } + /*check if we are in the middle of FLR process, + if so return "retry" status to the slave*/ + if (MLX4_COMM_CMD_FLR == slave_state[slave].last_cmd) { + slave_status = MLX4_DELAY_RESET_SLAVE; + goto inform_slave_state; + } + + mlx4_dispatch_event(dev, MLX4_DEV_EVENT_SLAVE_SHUTDOWN, slave); + + /* write the version in the event field */ + reply |= mlx4_comm_get_version(); + + goto reset_slave; + } + /*command from slave in the middle of FLR*/ + if (cmd != MLX4_COMM_CMD_RESET && + MLX4_COMM_CMD_FLR == slave_state[slave].last_cmd) { + mlx4_warn(dev, "slave:%d is Trying to run cmd(0x%x) " + "in the middle of FLR\n", slave, cmd); + return; + } + + switch (cmd) { + case MLX4_COMM_CMD_VHCR0: + if (slave_state[slave].last_cmd != MLX4_COMM_CMD_RESET) + goto reset_slave; + slave_state[slave].vhcr_dma = ((u64) param) << 48; + priv->mfunc.master.slave_state[slave].cookie = 0; + mutex_init(&priv->mfunc.master.gen_eqe_mutex[slave]); + break; + case MLX4_COMM_CMD_VHCR1: + if (slave_state[slave].last_cmd != MLX4_COMM_CMD_VHCR0) + goto reset_slave; + slave_state[slave].vhcr_dma |= ((u64) param) << 32; + break; + case MLX4_COMM_CMD_VHCR2: + if (slave_state[slave].last_cmd != MLX4_COMM_CMD_VHCR1) + goto reset_slave; + slave_state[slave].vhcr_dma |= ((u64) param) << 16; + break; + case MLX4_COMM_CMD_VHCR_EN: + if (slave_state[slave].last_cmd != MLX4_COMM_CMD_VHCR2) + goto reset_slave; + slave_state[slave].vhcr_dma |= param; + slave_state[slave].active = true; + mlx4_dispatch_event(dev, MLX4_DEV_EVENT_SLAVE_INIT, slave); + break; + case MLX4_COMM_CMD_VHCR_POST: + if ((slave_state[slave].last_cmd != MLX4_COMM_CMD_VHCR_EN) && + (slave_state[slave].last_cmd != MLX4_COMM_CMD_VHCR_POST)) + goto reset_slave; + down(&priv->cmd.slave_sem); + if (mlx4_master_process_vhcr(dev, slave, NULL)) { + mlx4_err(dev, "Failed processing vhcr for slave:%d," + " resetting slave.\n", slave); + up(&priv->cmd.slave_sem); + goto reset_slave; + } + up(&priv->cmd.slave_sem); + break; + default: + mlx4_warn(dev, "Bad comm cmd:%d from slave:%d\n", cmd, slave); + goto reset_slave; + } + spin_lock(&priv->mfunc.master.slave_state_lock); + if (!slave_state[slave].is_slave_going_down) + slave_state[slave].last_cmd = cmd; + else + is_going_down = 1; + spin_unlock(&priv->mfunc.master.slave_state_lock); + if (is_going_down) { + mlx4_warn(dev, "Slave is going down aborting command(%d)" + " executing from slave:%d\n", + cmd, slave); + return; + } + __raw_writel((__force u32) cpu_to_be32(reply), + &priv->mfunc.comm[slave].slave_read); + mmiowb(); + + return; + +reset_slave: + /* cleanup any slave resources */ + mlx4_delete_all_resources_for_slave(dev, slave); + spin_lock(&priv->mfunc.master.slave_state_lock); + if (!slave_state[slave].is_slave_going_down) + slave_state[slave].last_cmd = MLX4_COMM_CMD_RESET; + spin_unlock(&priv->mfunc.master.slave_state_lock); + /*with slave in the middle of flr, no need to clean resources again.*/ +inform_slave_state: + memset(&slave_state[slave].event_eq, 0, + sizeof(struct mlx4_slave_event_eq_info)); + __raw_writel((__force u32) cpu_to_be32(reply), + &priv->mfunc.comm[slave].slave_read); + wmb(); +} + +/* master command processing */ +void mlx4_master_comm_channel(struct work_struct *work) +{ + struct mlx4_mfunc_master_ctx *master = + container_of(work, + struct mlx4_mfunc_master_ctx, + comm_work); + struct mlx4_mfunc *mfunc = + container_of(master, struct mlx4_mfunc, master); + struct mlx4_priv *priv = + container_of(mfunc, struct mlx4_priv, mfunc); + struct mlx4_dev *dev = &priv->dev; + __be32 *bit_vec; + u32 comm_cmd; + u32 vec; + int i, j, slave; + int toggle; + int served = 0; + int reported = 0; + u32 slt; + + bit_vec = master->comm_arm_bit_vector; + for (i = 0; i < COMM_CHANNEL_BIT_ARRAY_SIZE; i++) { + vec = be32_to_cpu(bit_vec[i]); + for (j = 0; j < 32; j++) { + if (!(vec & (1 << j))) + continue; + ++reported; + slave = (i * 32) + j; + comm_cmd = swab32(readl( + &mfunc->comm[slave].slave_write)); + slt = swab32(readl(&mfunc->comm[slave].slave_read)) + >> 31; + toggle = comm_cmd >> 31; + if (toggle != slt) { + if (master->slave_state[slave].comm_toggle + != slt) { + printk(KERN_INFO "slave %d out of sync." + " read toggle %d, state toggle %d. " + "Resynching.\n", slave, slt, + master->slave_state[slave].comm_toggle); + master->slave_state[slave].comm_toggle = + slt; + } + mlx4_master_do_cmd(dev, slave, + comm_cmd >> 16 & 0xff, + comm_cmd & 0xffff, toggle); + ++served; + } + } + } + + if (reported && reported != served) + mlx4_warn(dev, "Got command event with bitmask from %d slaves" + " but %d were served\n", + reported, served); + + if (mlx4_ARM_COMM_CHANNEL(dev)) + mlx4_warn(dev, "Failed to arm comm channel events\n"); +} + +static int sync_toggles(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int wr_toggle; + int rd_toggle; + unsigned long end; + + wr_toggle = swab32(readl(&priv->mfunc.comm->slave_write)) >> 31; + end = jiffies + msecs_to_jiffies(5000); + + while (time_before(jiffies, end)) { + rd_toggle = swab32(readl(&priv->mfunc.comm->slave_read)) >> 31; + if (rd_toggle == wr_toggle) { + priv->cmd.comm_toggle = rd_toggle; + return 0; + } + + cond_resched(); + } + + /* + * we could reach here if for example the previous VM using this + * function misbehaved and left the channel with unsynced state. We + * should fix this here and give this VM a chance to use a properly + * synced channel + */ + mlx4_warn(dev, "recovering from previously mis-behaved VM\n"); + __raw_writel((__force u32) 0, &priv->mfunc.comm->slave_read); + __raw_writel((__force u32) 0, &priv->mfunc.comm->slave_write); + priv->cmd.comm_toggle = 0; + + return 0; +} + +int mlx4_multi_func_init(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *s_state; + int i, j, err, port; + + priv->mfunc.vhcr = dma_alloc_coherent(&(dev->pdev->dev), PAGE_SIZE, + &priv->mfunc.vhcr_dma, + GFP_KERNEL); + if (!priv->mfunc.vhcr) { + mlx4_err(dev, "Couldn't allocate vhcr.\n"); + return -ENOMEM; + } + + if (mlx4_is_master(dev)) + priv->mfunc.comm = + ioremap(pci_resource_start(dev->pdev, priv->fw.comm_bar) + + priv->fw.comm_base, MLX4_COMM_PAGESIZE); + else + priv->mfunc.comm = + ioremap(pci_resource_start(dev->pdev, 2) + + MLX4_SLAVE_COMM_BASE, MLX4_COMM_PAGESIZE); + if (!priv->mfunc.comm) { + mlx4_err(dev, "Couldn't map communication vector.\n"); + goto err_vhcr; + } + + if (mlx4_is_master(dev)) { + priv->mfunc.master.slave_state = + kzalloc(dev->num_slaves * + sizeof(struct mlx4_slave_state), GFP_KERNEL); + if (!priv->mfunc.master.slave_state) + goto err_comm; + + for (i = 0; i < dev->num_slaves; ++i) { + s_state = &priv->mfunc.master.slave_state[i]; + s_state->last_cmd = MLX4_COMM_CMD_RESET; + for (j = 0; j < MLX4_EVENT_TYPES_NUM; ++j) + s_state->event_eq[j].eqn = -1; + __raw_writel((__force u32) 0, + &priv->mfunc.comm[i].slave_write); + __raw_writel((__force u32) 0, + &priv->mfunc.comm[i].slave_read); + mmiowb(); + for (port = 1; port <= MLX4_MAX_PORTS; port++) { + s_state->vlan_filter[port] = + kzalloc(sizeof(struct mlx4_vlan_fltr), + GFP_KERNEL); + if (!s_state->vlan_filter[port]) { + if (--port) + kfree(s_state->vlan_filter[port]); + goto err_slaves; + } + INIT_LIST_HEAD(&s_state->mcast_filters[port]); + } + spin_lock_init(&s_state->lock); + } + + memset(&priv->mfunc.master.cmd_eqe, 0, sizeof(struct mlx4_eqe)); + priv->mfunc.master.cmd_eqe.type = MLX4_EVENT_TYPE_CMD; + INIT_WORK(&priv->mfunc.master.comm_work, + mlx4_master_comm_channel); + INIT_WORK(&priv->mfunc.master.slave_event_work, + mlx4_gen_slave_eqe); + INIT_WORK(&priv->mfunc.master.slave_flr_event_work, + mlx4_master_handle_slave_flr); + spin_lock_init(&priv->mfunc.master.slave_state_lock); + priv->mfunc.master.comm_wq = + create_singlethread_workqueue("mlx4_comm"); + if (!priv->mfunc.master.comm_wq) + goto err_slaves; + + if (mlx4_init_resource_tracker(dev)) + goto err_thread; + + sema_init(&priv->cmd.slave_sem, 1); + err = mlx4_ARM_COMM_CHANNEL(dev); + if (err) { + mlx4_err(dev, " Failed to arm comm channel eq: %x\n", + err); + goto err_resource; + } + + } else { + err = sync_toggles(dev); + if (err) { + mlx4_err(dev, "Couldn't sync toggles\n"); + goto err_comm; + } + + sema_init(&priv->cmd.slave_sem, 1); + } + return 0; + +err_resource: + mlx4_free_resource_tracker(dev, 0); +err_thread: + flush_workqueue(priv->mfunc.master.comm_wq); + destroy_workqueue(priv->mfunc.master.comm_wq); +err_slaves: + while (--i) { + for (port = 1; port <= MLX4_MAX_PORTS; port++) + kfree(priv->mfunc.master.slave_state[i].vlan_filter[port]); + } + kfree(priv->mfunc.master.slave_state); +err_comm: + iounmap(priv->mfunc.comm); +err_vhcr: + dma_free_coherent(&(dev->pdev->dev), PAGE_SIZE, + priv->mfunc.vhcr, + priv->mfunc.vhcr_dma); + priv->mfunc.vhcr = NULL; + return -ENOMEM; +} + +int mlx4_cmd_init(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + mutex_init(&priv->cmd.hcr_mutex); + sema_init(&priv->cmd.poll_sem, 1); + priv->cmd.use_events = 0; + priv->cmd.toggle = 1; + + priv->cmd.hcr = NULL; + priv->mfunc.vhcr = NULL; + + if (!mlx4_is_slave(dev)) { + priv->cmd.hcr = ioremap(pci_resource_start(dev->pdev, 0) + + MLX4_HCR_BASE, MLX4_HCR_SIZE); + if (!priv->cmd.hcr) { + mlx4_err(dev, "Couldn't map command register.\n"); + return -ENOMEM; + } + } + + priv->cmd.pool = pci_pool_create("mlx4_cmd", dev->pdev, + MLX4_MAILBOX_SIZE, + MLX4_MAILBOX_SIZE, 0); + if (!priv->cmd.pool) + goto err_hcr; + + return 0; + +err_hcr: + if (!mlx4_is_slave(dev)) + iounmap(priv->cmd.hcr); + return -ENOMEM; +} + +void mlx4_multi_func_cleanup(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int i, port; + + if (mlx4_is_master(dev)) { + flush_workqueue(priv->mfunc.master.comm_wq); + destroy_workqueue(priv->mfunc.master.comm_wq); + for (i = 0; i < dev->num_slaves; i++) { + for (port = 1; port <= MLX4_MAX_PORTS; port++) + kfree(priv->mfunc.master.slave_state[i].vlan_filter[port]); + } + kfree(priv->mfunc.master.slave_state); + } + + iounmap(priv->mfunc.comm); + dma_free_coherent(&(dev->pdev->dev), PAGE_SIZE, + priv->mfunc.vhcr, priv->mfunc.vhcr_dma); + priv->mfunc.vhcr = NULL; +} + +void mlx4_cmd_cleanup(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + pci_pool_destroy(priv->cmd.pool); + + if (!mlx4_is_slave(dev)) + iounmap(priv->cmd.hcr); +} + +/* + * Switch to using events to issue FW commands (can only be called + * after event queue for command events has been initialized). + */ +int mlx4_cmd_use_events(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int i; + int err = 0; + + priv->cmd.context = kmalloc(priv->cmd.max_cmds * + sizeof (struct mlx4_cmd_context), + GFP_KERNEL); + if (!priv->cmd.context) + return -ENOMEM; + + for (i = 0; i < priv->cmd.max_cmds; ++i) { + priv->cmd.context[i].token = i; + priv->cmd.context[i].next = i + 1; + } + + priv->cmd.context[priv->cmd.max_cmds - 1].next = -1; + priv->cmd.free_head = 0; + + sema_init(&priv->cmd.event_sem, priv->cmd.max_cmds); + spin_lock_init(&priv->cmd.context_lock); + + for (priv->cmd.token_mask = 1; + priv->cmd.token_mask < priv->cmd.max_cmds; + priv->cmd.token_mask <<= 1) + ; /* nothing */ + --priv->cmd.token_mask; + + down(&priv->cmd.poll_sem); + priv->cmd.use_events = 1; + + return err; +} + +/* + * Switch back to polling (used when shutting down the device) + */ +void mlx4_cmd_use_polling(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int i; + + priv->cmd.use_events = 0; + + for (i = 0; i < priv->cmd.max_cmds; ++i) + down(&priv->cmd.event_sem); + + kfree(priv->cmd.context); + + up(&priv->cmd.poll_sem); +} + +struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev) +{ + struct mlx4_cmd_mailbox *mailbox; + + mailbox = kmalloc(sizeof *mailbox, GFP_KERNEL); + if (!mailbox) + return ERR_PTR(-ENOMEM); + + mailbox->buf = pci_pool_alloc(mlx4_priv(dev)->cmd.pool, GFP_KERNEL, + &mailbox->dma); + if (!mailbox->buf) { + kfree(mailbox); + return ERR_PTR(-ENOMEM); + } + + return mailbox; +} +EXPORT_SYMBOL_GPL(mlx4_alloc_cmd_mailbox); + +void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, + struct mlx4_cmd_mailbox *mailbox) +{ + if (!mailbox) + return; + + pci_pool_free(mlx4_priv(dev)->cmd.pool, mailbox->buf, mailbox->dma); + kfree(mailbox); +} +EXPORT_SYMBOL_GPL(mlx4_free_cmd_mailbox); + +u32 mlx4_comm_get_version(void) +{ + return ((u32) CMD_CHAN_IF_REV << 8) | (u32) CMD_CHAN_VER; +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cq.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cq.c new file mode 100755 index 0000000..e66feac --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/cq.c @@ -0,0 +1,347 @@ +/* + * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. + * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. + * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2004 Voltaire, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#else +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include +#include + +#include "mlx4.h" +#include "icm.h" + +#define MLX4_CQ_STATUS_OK ( 0 << 28) +#define MLX4_CQ_STATUS_OVERFLOW ( 9 << 28) +#define MLX4_CQ_STATUS_WRITE_FAIL (10 << 28) +#define MLX4_CQ_FLAG_CC ( 1 << 18) +#define MLX4_CQ_FLAG_OI ( 1 << 17) +#define MLX4_CQ_STATE_ARMED ( 9 << 8) +#define MLX4_CQ_STATE_ARMED_SOL ( 6 << 8) +#define MLX4_EQ_STATE_FIRED (10 << 8) + +void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn) +{ + struct mlx4_cq *cq; + + cq = radix_tree_lookup(&mlx4_priv(dev)->cq_table.tree, + cqn & (dev->caps.num_cqs - 1)); + if (!cq) { + mlx4_dbg(dev, "Completion event for bogus CQ %08x\n", cqn); + return; + } + + ++cq->arm_sn; + + cq->comp(cq); +} + +void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type) +{ + struct mlx4_cq_table *cq_table = &mlx4_priv(dev)->cq_table; + struct mlx4_cq *cq; + + spin_lock(&cq_table->lock); + + cq = radix_tree_lookup(&cq_table->tree, cqn & (dev->caps.num_cqs - 1)); + if (cq) + atomic_inc(&cq->refcount); + + spin_unlock(&cq_table->lock); + + if (!cq) { + mlx4_warn(dev, "Async event for bogus CQ %08x\n", cqn); + return; + } + + cq->event(cq, event_type); + + if (atomic_dec_and_test(&cq->refcount)) + complete(&cq->free); +} + +static int mlx4_SW2HW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int cq_num) +{ + return mlx4_cmd(dev, mailbox->dma, cq_num, 0, + MLX4_CMD_SW2HW_CQ, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); +} + +static int mlx4_MODIFY_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int cq_num, u32 opmod) +{ + return mlx4_cmd(dev, mailbox->dma, cq_num, opmod, MLX4_CMD_MODIFY_CQ, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); +} + +static int mlx4_HW2SW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int cq_num) +{ + return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, + cq_num, mailbox ? 0 : 1, MLX4_CMD_HW2SW_CQ, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); +} + +int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq, + u16 count, u16 period) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_cq_context *cq_context; + int err; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + cq_context = mailbox->buf; + memset(cq_context, 0, sizeof *cq_context); + + cq_context->cq_max_count = cpu_to_be16(count); + cq_context->cq_period = cpu_to_be16(period); + + err = mlx4_MODIFY_CQ(dev, mailbox, cq->cqn, 1); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_cq_modify); + +int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq, + int entries, struct mlx4_mtt *mtt) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_cq_context *cq_context; + u64 mtt_addr; + int err; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + cq_context = mailbox->buf; + memset(cq_context, 0, sizeof *cq_context); + + cq_context->logsize_usrpage = cpu_to_be32(ilog2(entries) << 24); + cq_context->log_page_size = mtt->page_shift - 12; + mtt_addr = mlx4_mtt_addr(dev, mtt); + cq_context->mtt_base_addr_h = mtt_addr >> 32; + cq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); + + err = mlx4_MODIFY_CQ(dev, mailbox, cq->cqn, 0); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_cq_resize); + +int __mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cq_table *cq_table = &priv->cq_table; + int err; + + *cqn = mlx4_bitmap_alloc(&cq_table->bitmap); + if (*cqn == -1) + return -ENOMEM; + + err = mlx4_table_get(dev, &cq_table->table, *cqn); + if (err) + goto err_out; + + err = mlx4_table_get(dev, &cq_table->cmpt_table, *cqn); + if (err) + goto err_put; + return 0; + +err_put: + mlx4_table_put(dev, &cq_table->table, *cqn); + +err_out: + mlx4_bitmap_free(&cq_table->bitmap, *cqn); + return err; +} + +static int mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn) +{ + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + err = mlx4_cmd_imm(dev, 0, &out_param, RES_CQ, + RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (err) + return err; + else { + *cqn = get_param_l(&out_param); + return 0; + } + } + return __mlx4_cq_alloc_icm(dev, cqn); +} + +void __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cq_table *cq_table = &priv->cq_table; + + mlx4_table_put(dev, &cq_table->cmpt_table, cqn); + mlx4_table_put(dev, &cq_table->table, cqn); + mlx4_bitmap_free(&cq_table->bitmap, cqn); +} + +static void mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn) +{ + u64 in_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, cqn); + err = mlx4_cmd(dev, in_param, RES_CQ, RES_OP_RESERVE_AND_MAP, + MLX4_CMD_FREE_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (err) + mlx4_warn(dev, "Failed freeing cq:%d\n", cqn); + } else + __mlx4_cq_free_icm(dev, cqn); +} + +int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, + struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq, + unsigned vector, int collapsed) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cq_table *cq_table = &priv->cq_table; + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_cq_context *cq_context; + u64 mtt_addr; + int err; + + if (vector > dev->caps.num_comp_vectors + dev->caps.comp_pool) + return -EINVAL; + + cq->vector = vector; + + err = mlx4_cq_alloc_icm(dev, &cq->cqn); + if (err) + return err; + + spin_lock_irq(&cq_table->lock); + err = radix_tree_insert(&cq_table->tree, cq->cqn, cq); + spin_unlock_irq(&cq_table->lock); + if (err) + goto err_icm; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + err = PTR_ERR(mailbox); + goto err_radix; + } + + cq_context = mailbox->buf; + memset(cq_context, 0, sizeof *cq_context); + + cq_context->flags = cpu_to_be32(!!collapsed << 18); + cq_context->logsize_usrpage = cpu_to_be32((ilog2(nent) << 24) | uar->index); + cq_context->comp_eqn = priv->eq_table.eq[vector].eqn; + cq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; + + mtt_addr = mlx4_mtt_addr(dev, mtt); + cq_context->mtt_base_addr_h = mtt_addr >> 32; + cq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); + cq_context->db_rec_addr = cpu_to_be64(db_rec); + + err = mlx4_SW2HW_CQ(dev, mailbox, cq->cqn); + mlx4_free_cmd_mailbox(dev, mailbox); + if (err) + goto err_radix; + + cq->cons_index = 0; + cq->arm_sn = 1; + cq->uar = uar; + atomic_set(&cq->refcount, 1); + init_completion(&cq->free); + + return 0; + +err_radix: + spin_lock_irq(&cq_table->lock); + radix_tree_delete(&cq_table->tree, cq->cqn); + spin_unlock_irq(&cq_table->lock); + +err_icm: + mlx4_cq_free_icm(dev, cq->cqn); + + return err; +} +EXPORT_SYMBOL_GPL(mlx4_cq_alloc); + +void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cq_table *cq_table = &priv->cq_table; + int err; + + err = mlx4_HW2SW_CQ(dev, NULL, cq->cqn); + if (err) + mlx4_warn(dev, "HW2SW_CQ failed (%d) for CQN %06x\n", err, cq->cqn); + + synchronize_irq(priv->eq_table.eq[cq->vector].irq); + + spin_lock_irq(&cq_table->lock); + radix_tree_delete(&cq_table->tree, cq->cqn); + spin_unlock_irq(&cq_table->lock); + + if (atomic_dec_and_test(&cq->refcount)) + complete(&cq->free); + wait_for_completion(&cq->free); + + mlx4_cq_free_icm(dev, cq->cqn); +} +EXPORT_SYMBOL_GPL(mlx4_cq_free); + +int mlx4_init_cq_table(struct mlx4_dev *dev) +{ + struct mlx4_cq_table *cq_table = &mlx4_priv(dev)->cq_table; + int err; + + spin_lock_init(&cq_table->lock); + INIT_RADIX_TREE(&cq_table->tree, GFP_ATOMIC); + if (mlx4_is_slave(dev)) + return 0; + + err = mlx4_bitmap_init(&cq_table->bitmap, dev->caps.num_cqs, + dev->caps.num_cqs - 1, dev->caps.reserved_cqs, 0); + if (err) + return err; + + return 0; +} + +void mlx4_cleanup_cq_table(struct mlx4_dev *dev) +{ + if (mlx4_is_slave(dev)) + return; + /* Nothing to do to clean up radix_tree */ + mlx4_bitmap_cleanup(&mlx4_priv(dev)->cq_table.bitmap); +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/eq.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/eq.c new file mode 100755 index 0000000..cc4f6ec --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/eq.c @@ -0,0 +1,1318 @@ +/* + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#else +#include +#endif /* __VMKERNEL_MODULE__ */ +#include +#include + +#include + +#include "mlx4.h" +#include "fw.h" + +enum { + MLX4_IRQNAME_SIZE = 32 +}; + +enum { + MLX4_NUM_ASYNC_EQE = 0x100, + MLX4_NUM_SPARE_EQE = 0x80, + MLX4_EQ_ENTRY_SIZE = 0x20 +}; + +#define MLX4_EQ_STATUS_OK ( 0 << 28) +#define MLX4_EQ_STATUS_WRITE_FAIL (10 << 28) +#define MLX4_EQ_OWNER_SW ( 0 << 24) +#define MLX4_EQ_OWNER_HW ( 1 << 24) +#define MLX4_EQ_FLAG_EC ( 1 << 18) +#define MLX4_EQ_FLAG_OI ( 1 << 17) +#define MLX4_EQ_STATE_ARMED ( 9 << 8) +#define MLX4_EQ_STATE_FIRED (10 << 8) +#define MLX4_EQ_STATE_ALWAYS_ARMED (11 << 8) + +#define MLX4_ASYNC_EVENT_MASK ((1ull << MLX4_EVENT_TYPE_PATH_MIG) | \ + (1ull << MLX4_EVENT_TYPE_COMM_EST) | \ + (1ull << MLX4_EVENT_TYPE_SQ_DRAINED) | \ + (1ull << MLX4_EVENT_TYPE_CQ_ERROR) | \ + (1ull << MLX4_EVENT_TYPE_WQ_CATAS_ERROR) | \ + (1ull << MLX4_EVENT_TYPE_EEC_CATAS_ERROR) | \ + (1ull << MLX4_EVENT_TYPE_PATH_MIG_FAILED) | \ + (1ull << MLX4_EVENT_TYPE_WQ_INVAL_REQ_ERROR) | \ + (1ull << MLX4_EVENT_TYPE_WQ_ACCESS_ERROR) | \ + (1ull << MLX4_EVENT_TYPE_PORT_CHANGE) | \ + (1ull << MLX4_EVENT_TYPE_ECC_DETECT) | \ + (1ull << MLX4_EVENT_TYPE_SRQ_CATAS_ERROR) | \ + (1ull << MLX4_EVENT_TYPE_SRQ_QP_LAST_WQE) | \ + (1ull << MLX4_EVENT_TYPE_SRQ_LIMIT) | \ + (1ull << MLX4_EVENT_TYPE_CMD) | \ + (1ull << MLX4_EVENT_TYPE_COMM_CHANNEL) | \ + (1ull << MLX4_EVENT_TYPE_FLR_EVENT) | \ + (1ull << MLX4_EVENT_TYPE_FATAL_WARNING)) + +static u64 get_async_ev_mask(struct mlx4_dev *dev) +{ + u64 async_ev_mask = MLX4_ASYNC_EVENT_MASK; + if (mlx4_port_mng_chg_event(dev)) + async_ev_mask |= (1ull << MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT); + + return async_ev_mask; +} + +static void eq_set_ci(struct mlx4_eq *eq, int req_not) +{ + __raw_writel((__force u32) cpu_to_be32((eq->cons_index & 0xffffff) | + req_not << 31), + eq->doorbell); + /* We still want ordering, just not swabbing, so add a barrier */ + mb(); +} + +static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry) +{ + unsigned long off = (entry & (eq->nent - 1)) * MLX4_EQ_ENTRY_SIZE; + return eq->page_list[off / PAGE_SIZE].buf + off % PAGE_SIZE; +} + +static struct mlx4_eqe *next_eqe_sw(struct mlx4_eq *eq) +{ + struct mlx4_eqe *eqe = get_eqe(eq, eq->cons_index); + return !!(eqe->owner & 0x80) ^ !!(eq->cons_index & eq->nent) ? NULL : eqe; +} + +static struct mlx4_eqe *next_slave_event_eqe(struct mlx4_slave_event_eq *slave_eq) +{ + struct mlx4_eqe *eqe = + &slave_eq->event_eqe[slave_eq->cons & (SLAVE_EVENT_EQ_SIZE - 1)]; + return (!!(eqe->owner & 0x80) ^ + !!(slave_eq->cons & SLAVE_EVENT_EQ_SIZE)) ? + eqe : NULL; +} + +void mlx4_gen_slave_eqe(struct work_struct *work) +{ + struct mlx4_mfunc_master_ctx *master = + container_of(work, struct mlx4_mfunc_master_ctx, + slave_event_work); + struct mlx4_mfunc *mfunc = + container_of(master, struct mlx4_mfunc, master); + struct mlx4_priv *priv = container_of(mfunc, struct mlx4_priv, mfunc); + struct mlx4_dev *dev = &priv->dev; + struct mlx4_slave_event_eq *slave_eq = &mfunc->master.slave_eq; + struct mlx4_eqe *eqe; + u8 slave; + int i; + + for (eqe = next_slave_event_eqe(slave_eq); eqe; + eqe = next_slave_event_eqe(slave_eq)) { + slave = eqe->slave_id; + + /* All active slaves need to receive the event */ + if (slave == ALL_SLAVES) { + for (i = 0; i < dev->num_slaves; i++) { + if (i != dev->caps.function && + master->slave_state[i].active) + if (mlx4_GEN_EQE(dev, i, eqe)) + mlx4_warn(dev, "Failed to " + " generate event " + "for slave %d\n", i); + } + } else { + if (mlx4_GEN_EQE(dev, slave, eqe)) + mlx4_warn(dev, "Failed to generate event " + "for slave %d\n", slave); + } + ++slave_eq->cons; + } +} + + +static void slave_event(struct mlx4_dev *dev, u8 slave, struct mlx4_eqe *eqe) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_event_eq *slave_eq = &priv->mfunc.master.slave_eq; + struct mlx4_eqe *s_eqe = + &slave_eq->event_eqe[slave_eq->prod & (SLAVE_EVENT_EQ_SIZE - 1)]; + + if ((!!(s_eqe->owner & 0x80)) ^ + (!!(slave_eq->prod & SLAVE_EVENT_EQ_SIZE))) { + mlx4_warn(dev, "Master failed to generate an EQE for slave: %d. " + "No free EQE on slave events queue\n", slave); + return; + } + + memcpy(s_eqe, eqe, sizeof(struct mlx4_eqe) - 1); + s_eqe->slave_id = slave; + /* ensure all information is written before setting the ownersip bit */ + wmb(); + s_eqe->owner = !!(slave_eq->prod & SLAVE_EVENT_EQ_SIZE) ? 0x0 : 0x80; + ++slave_eq->prod; + + queue_work(priv->mfunc.master.comm_wq, + &priv->mfunc.master.slave_event_work); +} + +int mlx4_gen_pkey_eqe(struct mlx4_dev *dev, int slave, u8 port) +{ + struct mlx4_eqe eqe; + + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *s_slave = &priv->mfunc.master.slave_state[slave]; + + if (!s_slave->active) + return 0; + + memset(&eqe, 0, sizeof eqe); + + eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT; + eqe.subtype = MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE; + eqe.event.port_mgmt_change.port = port; + + return mlx4_GEN_EQE(dev, slave, &eqe); +} +EXPORT_SYMBOL(mlx4_gen_pkey_eqe); + +int mlx4_gen_guid_change_eqe(struct mlx4_dev *dev, int slave, u8 port) +{ + struct mlx4_eqe eqe; + + /*don't send if we don't have the that slave */ + if (dev->num_vfs < slave) + return 0; + memset(&eqe, 0, sizeof eqe); + + eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT; + eqe.subtype = MLX4_DEV_PMC_SUBTYPE_GUID_INFO; + eqe.event.port_mgmt_change.port = port; + + return mlx4_GEN_EQE(dev, slave, &eqe); +} +EXPORT_SYMBOL(mlx4_gen_guid_change_eqe); + +int mlx4_gen_port_state_change_eqe(struct mlx4_dev *dev, int slave, u8 port, u8 port_subtype_change) +{ + struct mlx4_eqe eqe; + + /*don't send if we don't have the that slave */ + if (dev->num_vfs < slave) + return 0; + memset(&eqe, 0, sizeof eqe); + + eqe.type = MLX4_EVENT_TYPE_PORT_CHANGE; + eqe.subtype = port_subtype_change; + eqe.event.port_change.port = cpu_to_be32(port << 28); + + mlx4_dbg(dev, "%s: sending: %d to slave: %d on port: %d\n", __func__, port_subtype_change, slave, port); + return mlx4_GEN_EQE(dev, slave, &eqe); +} +EXPORT_SYMBOL(mlx4_gen_port_state_change_eqe); + +enum slave_port_state mlx4_get_slave_port_state(struct mlx4_dev *dev, int slave, u8 port) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *s_state = priv->mfunc.master.slave_state; + if (slave >= dev->num_slaves || port > MLX4_MAX_PORTS) { + printk(KERN_ERR "%s: BUG!!! asking for slave:%d, port:%d\n", + __func__, slave, port); + return SLAVE_PORT_DOWN; + } + return s_state[slave].port_state[port]; +} +EXPORT_SYMBOL(mlx4_get_slave_port_state); + +static int mlx4_set_slave_port_state(struct mlx4_dev *dev, int slave, u8 port, enum slave_port_state state) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *s_state = priv->mfunc.master.slave_state; + + if (slave >= dev->num_slaves || port > MLX4_MAX_PORTS || port == 0) { + printk(KERN_ERR "%s: BUG!!! asking for slave:%d, port:%d\n", + __func__, slave, port); + return -1; + } + s_state[slave].port_state[port] = state; + + return 0; +} + +void set_all_slave_state(struct mlx4_dev *dev, u8 port, int event) +{ + int i; + enum slave_port_gen_event gen_event; + + for (i = 0; i < dev->num_slaves; i++) + set_and_calc_slave_port_state(dev, i, port, event, &gen_event); +} +/************************************************************************** + The function get as input the new event to that port, + and according to the prev state change the slave's port state. + The events are: + MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN, + MLX4_PORT_STATE_DEV_EVENT_PORT_UP + MLX4_PORT_STATE_IB_EVENT_GID_VALID + MLX4_PORT_STATE_IB_EVENT_GID_INVALID +***************************************************************************/ +int set_and_calc_slave_port_state(struct mlx4_dev *dev, int slave, + u8 port, int event, + enum slave_port_gen_event *gen_event) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *ctx = NULL; + unsigned long flags; + int ret = -1; + enum slave_port_state cur_state = + mlx4_get_slave_port_state(dev, slave, port); + + *gen_event = SLAVE_PORT_GEN_EVENT_NONE; + + if (slave >= dev->num_slaves || port > MLX4_MAX_PORTS || port == 0) { + printk(KERN_ERR "%s: BUG!!! asking for slave:%d, port:%d\n", + __func__, slave, port); + return ret; + } + + ctx = &priv->mfunc.master.slave_state[slave]; + spin_lock_irqsave(&ctx->lock, flags); + + mlx4_dbg(dev, "%s: slave: %d, current state: %d new event :%d\n", + __func__, slave, cur_state, event); + + switch (cur_state) { + case SLAVE_PORT_DOWN: + if (MLX4_PORT_STATE_DEV_EVENT_PORT_UP == event) + mlx4_set_slave_port_state(dev, slave, port, + SLAVE_PENDING_UP); + break; + case SLAVE_PENDING_UP: + if (MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN == event) + mlx4_set_slave_port_state(dev, slave, port, + SLAVE_PORT_DOWN); + else if (MLX4_PORT_STATE_IB_PORT_STATE_EVENT_GID_VALID == event) { + mlx4_set_slave_port_state(dev, slave, port, + SLAVE_PORT_UP); + *gen_event = SLAVE_PORT_GEN_EVENT_UP; + } + break; + case SLAVE_PORT_UP: + if (MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN == event) { + mlx4_set_slave_port_state(dev, slave, port, + SLAVE_PORT_DOWN); + *gen_event = SLAVE_PORT_GEN_EVENT_DOWN; + } else if (MLX4_PORT_STATE_IB_EVENT_GID_INVALID == + event) { + mlx4_set_slave_port_state(dev, slave, port, + SLAVE_PENDING_UP); + *gen_event = SLAVE_PORT_GEN_EVENT_DOWN; + } + break; + default: + printk(KERN_ERR "%s: BUG!!! UNKNOWN state: " + "slave:%d, port:%d\n", __func__, slave, port); + goto out; + } + ret = mlx4_get_slave_port_state(dev, slave, port); + mlx4_dbg(dev, "%s: slave: %d, current state: %d new event" + " :%d gen_event: %d\n", + __func__, slave, cur_state, event, *gen_event); + +out: + spin_unlock_irqrestore(&ctx->lock, flags); + return ret; +} + +EXPORT_SYMBOL(set_and_calc_slave_port_state); + +int mlx4_gen_all_sw_eqe(struct mlx4_dev *dev, u8 port, int avial) +{ + struct mlx4_eqe eqe; + + memset(&eqe, 0, sizeof eqe); + + eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT; + eqe.subtype = MLX4_DEV_PMC_SUBTYPE_PORT_INFO; + eqe.event.port_mgmt_change.port = port; + eqe.event.port_mgmt_change.params.port_info.changed_attr = + cpu_to_be32((u32) avial); + + slave_event(dev, ALL_SLAVES, &eqe); + return 0; +} +EXPORT_SYMBOL(mlx4_gen_all_sw_eqe); + +static void mlx4_slave_event(struct mlx4_dev *dev, int slave, + struct mlx4_eqe *eqe) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *s_slave = + &priv->mfunc.master.slave_state[slave]; + + if (!s_slave->active) { + /*mlx4_warn(dev, "Trying to pass event to inactive slave\n");*/ + return; + } + + slave_event(dev, slave, eqe); +} + +void mlx4_master_handle_slave_flr(struct work_struct *work) +{ + struct mlx4_mfunc_master_ctx *master = + container_of(work, struct mlx4_mfunc_master_ctx, + slave_flr_event_work); + struct mlx4_mfunc *mfunc = + container_of(master, struct mlx4_mfunc, master); + struct mlx4_priv *priv = + container_of(mfunc, struct mlx4_priv, mfunc); + struct mlx4_dev *dev = &priv->dev; + struct mlx4_slave_state *slave_state = priv->mfunc.master.slave_state; + int i; + int err; + + mlx4_dbg(dev, "mlx4_handle_slave_flr\n"); + + for (i = 0 ; i < dev->num_slaves; i++) { + + if (MLX4_COMM_CMD_FLR == slave_state[i].last_cmd) { + mlx4_dbg(dev, "mlx4_handle_slave_flr: " + "clean slave: %d\n", i); + + mlx4_delete_all_resources_for_slave(dev, i); + /*return the slave to running mode*/ + spin_lock(&priv->mfunc.master.slave_state_lock); + slave_state[i].last_cmd = MLX4_COMM_CMD_RESET; + slave_state[i].is_slave_going_down = 0; + spin_unlock(&priv->mfunc.master.slave_state_lock); + /*notify the FW:*/ + err = mlx4_cmd(dev, 0, i, 0, MLX4_CMD_INFORM_FLR_DONE, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (err) + mlx4_warn(dev, "Failed to notify FW on " + "FLR done (slave:%d)\n", i); + } + } +} + +static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_eqe *eqe; + int cqn; + int eqes_found = 0; + int set_ci = 0; + int port; + int slave = 0; + int ret; + u32 flr_slave; + u8 update_slave_state; + int i; + enum slave_port_state slave_port_state; + enum slave_port_gen_event gen_event; + + while ((eqe = next_eqe_sw(eq))) { + /* + * Make sure we read EQ entry contents after we've + * checked the ownership bit. + */ + rmb(); + + switch (eqe->type) { + case MLX4_EVENT_TYPE_COMP: + cqn = be32_to_cpu(eqe->event.comp.cqn) & 0xffffff; + mlx4_cq_completion(dev, cqn); + break; + + case MLX4_EVENT_TYPE_PATH_MIG: + case MLX4_EVENT_TYPE_COMM_EST: + case MLX4_EVENT_TYPE_SQ_DRAINED: + case MLX4_EVENT_TYPE_SRQ_QP_LAST_WQE: + case MLX4_EVENT_TYPE_WQ_CATAS_ERROR: + case MLX4_EVENT_TYPE_PATH_MIG_FAILED: + case MLX4_EVENT_TYPE_WQ_INVAL_REQ_ERROR: + case MLX4_EVENT_TYPE_WQ_ACCESS_ERROR: + mlx4_dbg(dev, "event %d arrived\n", eqe->type); + if (mlx4_is_master(dev)) { + /* forward only to slave owning the QP */ + ret = mlx4_get_slave_from_resource_id(dev, + RES_QP, + be32_to_cpu(eqe->event.qp.qpn) + & 0xffffff, &slave); + if (ret && ret != -ENOENT) { + mlx4_dbg(dev, "QP event %02x(%02x) on " + "EQ %d at index %u: could " + "not get slave id (%d)\n", + eqe->type, eqe->subtype, + eq->eqn, eq->cons_index, ret); + break; + } + + if (!ret && slave != dev->caps.function) { + mlx4_slave_event(dev, slave, eqe); + break; + } + + } + mlx4_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & + 0xffffff, eqe->type); + break; + + case MLX4_EVENT_TYPE_SRQ_LIMIT: + mlx4_warn(dev, "%s: MLX4_EVENT_TYPE_SRQ_LIMIT\n", + __func__); + case MLX4_EVENT_TYPE_SRQ_CATAS_ERROR: + if (mlx4_is_master(dev)) { + /* forward only to slave owning the SRQ */ + ret = mlx4_get_slave_from_resource_id(dev, + RES_SRQ, + be32_to_cpu(eqe->event.srq.srqn) + & 0xffffff, + &slave); + if (ret && ret != -ENOENT) { + mlx4_warn(dev, "SRQ event %02x(%02x) " + "on EQ %d at index %u: could" + " not get slave id (%d)\n", + eqe->type, eqe->subtype, + eq->eqn, eq->cons_index, ret); + break; + } + mlx4_warn(dev, "%s: slave:%d, srq_no:0x%x," + " event: %02x(%02x)\n", __func__, + slave, + be32_to_cpu(eqe->event.srq.srqn), + eqe->type, eqe->subtype); + + if (!ret && slave != dev->caps.function) { + mlx4_warn(dev, "%s: sending event " + "%02x(%02x) to slave:%d\n", + __func__, eqe->type, + eqe->subtype, slave); + mlx4_slave_event(dev, slave, eqe); + break; + } + } + mlx4_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) & + 0xffffff, eqe->type); + break; + + case MLX4_EVENT_TYPE_CMD: + mlx4_cmd_event(dev, + be16_to_cpu(eqe->event.cmd.token), + eqe->event.cmd.status, + be64_to_cpu(eqe->event.cmd.out_param)); + break; + + case MLX4_EVENT_TYPE_PORT_CHANGE: + port = be32_to_cpu(eqe->event.port_change.port) >> 28; + if (eqe->subtype == MLX4_PORT_CHANGE_SUBTYPE_DOWN) { + mlx4_dispatch_event(dev, + MLX4_DEV_EVENT_PORT_DOWN, + port); +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + mlx4_priv(dev)->sense.do_sense_port[port] = 1; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + if (mlx4_is_master(dev)) + /*change the state of all slave's port + * to down:*/ + for (i = 0; i < dev->num_slaves; i++) { + slave_port_state = mlx4_get_slave_port_state(dev, i, port); + set_and_calc_slave_port_state(dev, i, port, + MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN, + &gen_event); + /*we can be in pending state, then do not send port_down event*/ + if (SLAVE_PORT_GEN_EVENT_DOWN == gen_event) { + mlx4_dbg(dev, "%s: Sending " + "MLX4_PORT_CHANGE_SUBTYPE_DOWN" + " to slave: %d, port:%d\n", + __func__, i, port); + if (i == dev->caps.function) + continue; + mlx4_slave_event(dev, i, eqe); + } + } + } else { + mlx4_dispatch_event(dev, + MLX4_DEV_EVENT_PORT_UP, + port); +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + mlx4_priv(dev)->sense.do_sense_port[port] = 0; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + + if (mlx4_is_master(dev)) + set_all_slave_state(dev, port, MLX4_DEV_EVENT_PORT_UP); + } + break; + + case MLX4_EVENT_TYPE_CQ_ERROR: + mlx4_warn(dev, "CQ %s on CQN %06x\n", + eqe->event.cq_err.syndrome == 1 ? + "overrun" : "access violation", + be32_to_cpu(eqe->event.cq_err.cqn) & 0xffffff); + if (mlx4_is_master(dev)) { + ret = mlx4_get_slave_from_resource_id(dev, + RES_CQ, + be32_to_cpu(eqe->event.cq_err.cqn) + & 0xffffff, &slave); + if (ret && ret != -ENOENT) { + mlx4_dbg(dev, "CQ event %02x(%02x) on " + "EQ %d at index %u: could " + "not get slave id (%d)\n", + eqe->type, eqe->subtype, + eq->eqn, eq->cons_index, ret); + break; + } + + if (!ret && slave != dev->caps.function) { + mlx4_slave_event(dev, slave, eqe); + break; + } + } + mlx4_cq_event(dev, + be32_to_cpu(eqe->event.cq_err.cqn) + & 0xffffff, + eqe->type); + break; + + case MLX4_EVENT_TYPE_EQ_OVERFLOW: + mlx4_warn(dev, "EQ overrun on EQN %d\n", eq->eqn); + break; + + case MLX4_EVENT_TYPE_COMM_CHANNEL: + if (!mlx4_is_master(dev)) { + mlx4_warn(dev, "Received comm channel event " + "for non master device\n"); + break; + } + memcpy(&priv->mfunc.master.comm_arm_bit_vector, + eqe->event.comm_channel_arm.bit_vec, + sizeof eqe->event.comm_channel_arm.bit_vec); + queue_work(priv->mfunc.master.comm_wq, + &priv->mfunc.master.comm_work); + break; + + case MLX4_EVENT_TYPE_FLR_EVENT: + flr_slave = be32_to_cpu(eqe->event.flr_event.slave_id); + if (!mlx4_is_master(dev)) { + mlx4_warn(dev, "Non-master function received" + "FLR event\n"); + break; + } + + mlx4_dbg(dev, "FLR event for slave: %d\n", flr_slave); + + if (flr_slave >= dev->num_slaves) { + mlx4_warn(dev, + "Got FLR for unknown function: %d\n", + flr_slave); + update_slave_state = 0; + } else + update_slave_state = 1; + + spin_lock(&priv->mfunc.master.slave_state_lock); + if (update_slave_state) { + priv->mfunc.master.slave_state[flr_slave].active = false; + priv->mfunc.master.slave_state[flr_slave].last_cmd = MLX4_COMM_CMD_FLR; + priv->mfunc.master.slave_state[flr_slave].is_slave_going_down = 1; + } + spin_unlock(&priv->mfunc.master.slave_state_lock); + queue_work(priv->mfunc.master.comm_wq, + &priv->mfunc.master.slave_flr_event_work); + break; + + case MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT: + mlx4_dispatch_event(dev, MLX4_DEV_EVENT_PORT_MGMT_CHANGE, (unsigned long) eqe); + break; + + case MLX4_EVENT_TYPE_FATAL_WARNING: + if (eqe->subtype == MLX4_FATAL_WARNING_SUBTYPE_WARMING) { + if (mlx4_is_master(dev)) + for (i = 0; i < dev->num_slaves; i++) { + mlx4_dbg(dev, "%s: Sending " + "MLX4_FATAL_WARNING_SUBTYPE_WARMING" + " to slave: %d\n", __func__, i); + if (i == dev->caps.function) + continue; + mlx4_slave_event(dev, i, eqe); + } + mlx4_err(dev, "Temperature Threshold was reached! " + "Threshold: %d celsius degrees; " + "Current Temperature: %d\n", + be16_to_cpu(eqe->event.warming.warning_threshold), + be16_to_cpu(eqe->event.warming.current_temperature)); + } else + mlx4_warn(dev, "Unhandled event FATAL WARNING (%02x), " + "subtype %02x on EQ %d at index %u. owner=%x, " + "nent=0x%x, slave=%x, ownership=%s\n", + eqe->type, eqe->subtype, eq->eqn, + eq->cons_index, eqe->owner, eq->nent, + eqe->slave_id, + !!(eqe->owner & 0x80) ^ + !!(eq->cons_index & eq->nent) ? "HW" : "SW"); + + break; + + case MLX4_EVENT_TYPE_EEC_CATAS_ERROR: + case MLX4_EVENT_TYPE_ECC_DETECT: + default: + mlx4_warn(dev, "Unhandled event %02x(%02x) on EQ %d at " + "index %u. owner=%x, nent=0x%x, slave=%x, " + "ownership=%s\n", + eqe->type, eqe->subtype, eq->eqn, + eq->cons_index, eqe->owner, eq->nent, + eqe->slave_id, + !!(eqe->owner & 0x80) ^ + !!(eq->cons_index & eq->nent) ? "HW" : "SW"); + break; + }; + + ++eq->cons_index; + eqes_found = 1; + ++set_ci; + + /* + * The HCA will think the queue has overflowed if we + * don't tell it we've been processing events. We + * create our EQs with MLX4_NUM_SPARE_EQE extra + * entries, so we must update our consumer index at + * least that often. + */ + if (unlikely(set_ci >= MLX4_NUM_SPARE_EQE)) { + eq_set_ci(eq, 0); + set_ci = 0; + } + } + + eq_set_ci(eq, 1); + + return eqes_found; +} + +static irqreturn_t mlx4_interrupt(int irq, void *dev_ptr) +{ + struct mlx4_dev *dev = dev_ptr; + struct mlx4_priv *priv = mlx4_priv(dev); + int work = 0; + int i; + + writel(priv->eq_table.clr_mask, priv->eq_table.clr_int); + + for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) + work |= mlx4_eq_int(dev, &priv->eq_table.eq[i]); + + return IRQ_RETVAL(work); +} + +static irqreturn_t mlx4_msi_x_interrupt(int irq, void *eq_ptr) +{ + struct mlx4_eq *eq = eq_ptr; + struct mlx4_dev *dev = eq->dev; + + mlx4_eq_int(dev, eq); + + /* MSI-X vectors always belong to us */ + return IRQ_HANDLED; +} + +int mlx4_MAP_EQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_event_eq_info *event_eq = + priv->mfunc.master.slave_state[slave].event_eq; + u32 in_modifier = vhcr->in_modifier; + u32 eqn = in_modifier & 0x1FF; + u64 in_param = vhcr->in_param; + int err = 0; + int i; + + if (slave == dev->caps.function) + err = mlx4_cmd(dev, in_param, (in_modifier & 0x80000000) | eqn, + 0, MLX4_CMD_MAP_EQ, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_NATIVE); + if (!err) + for (i = 0; i < MLX4_EVENT_TYPES_NUM; ++i) + if (in_param & (1LL << i)) + event_eq[i].eqn = in_modifier >> 31 ? -1 : eqn; + + return err; +} + +static int mlx4_MAP_EQ(struct mlx4_dev *dev, u64 event_mask, int unmap, + int eq_num) +{ + return mlx4_cmd(dev, event_mask, (unmap << 31) | eq_num, + 0, MLX4_CMD_MAP_EQ, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_WRAPPED); +} + +static int mlx4_SW2HW_EQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int eq_num) +{ + return mlx4_cmd(dev, mailbox->dma, eq_num, 0, + MLX4_CMD_SW2HW_EQ, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); +} + +static int mlx4_HW2SW_EQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int eq_num) +{ + return mlx4_cmd_box(dev, 0, mailbox->dma, eq_num, + 0, MLX4_CMD_HW2SW_EQ, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); +} + +static int mlx4_num_eq_uar(struct mlx4_dev *dev) +{ + /* + * Each UAR holds 4 EQ doorbells. To figure out how many UARs + * we need to map, take the difference of highest index and + * the lowest index we'll use and add 1. + */ + return (dev->caps.num_comp_vectors + 1 + dev->caps.reserved_eqs + + dev->caps.comp_pool)/4 - dev->caps.reserved_eqs/4 + 1; +} + +static void __iomem *mlx4_get_eq_uar(struct mlx4_dev *dev, struct mlx4_eq *eq) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int index; + + index = eq->eqn / 4 - dev->caps.reserved_eqs / 4; + + if (!priv->eq_table.uar_map[index]) { + priv->eq_table.uar_map[index] = + ioremap(pci_resource_start(dev->pdev, 2) + + ((eq->eqn / 4) << PAGE_SHIFT), + PAGE_SIZE); + if (!priv->eq_table.uar_map[index]) { + mlx4_err(dev, "Couldn't map EQ doorbell for EQN 0x%06x\n", + eq->eqn); + return NULL; + } + } + + return priv->eq_table.uar_map[index] + 0x800 + 8 * (eq->eqn % 4); +} + +static int mlx4_create_eq(struct mlx4_dev *dev, int nent, + u8 intr, struct mlx4_eq *eq) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_eq_context *eq_context; + int npages; + u64 *dma_list = NULL; + dma_addr_t t; + u64 mtt_addr; + int err = -ENOMEM; + int i; + + eq->dev = dev; + eq->nent = roundup_pow_of_two(max(nent, 2)); + npages = PAGE_ALIGN(eq->nent * MLX4_EQ_ENTRY_SIZE) / PAGE_SIZE; + + eq->page_list = kmalloc(npages * sizeof *eq->page_list, + GFP_KERNEL); + if (!eq->page_list) + goto err_out; + + for (i = 0; i < npages; ++i) + eq->page_list[i].buf = NULL; + + dma_list = kmalloc(npages * sizeof *dma_list, GFP_KERNEL); + if (!dma_list) + goto err_out_free; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + goto err_out_free; + eq_context = mailbox->buf; + + for (i = 0; i < npages; ++i) { + eq->page_list[i].buf = dma_alloc_coherent(&dev->pdev->dev, + PAGE_SIZE, &t, GFP_KERNEL); + if (!eq->page_list[i].buf) + goto err_out_free_pages; + + dma_list[i] = t; + eq->page_list[i].map = t; + + memset(eq->page_list[i].buf, 0, PAGE_SIZE); + } + + eq->eqn = mlx4_bitmap_alloc(&priv->eq_table.bitmap); + if (eq->eqn == -1) + goto err_out_free_pages; + + eq->doorbell = mlx4_get_eq_uar(dev, eq); + if (!eq->doorbell) { + err = -ENOMEM; + goto err_out_free_eq; + } + + err = mlx4_mtt_init(dev, npages, PAGE_SHIFT, &eq->mtt); + if (err) + goto err_out_free_eq; + + err = mlx4_write_mtt(dev, &eq->mtt, 0, npages, dma_list); + if (err) + goto err_out_free_mtt; + + memset(eq_context, 0, sizeof *eq_context); + eq_context->flags = cpu_to_be32(MLX4_EQ_STATUS_OK | + MLX4_EQ_STATE_ARMED); + eq_context->log_eq_size = ilog2(eq->nent); + eq_context->intr = intr; + eq_context->log_page_size = PAGE_SHIFT - MLX4_ICM_PAGE_SHIFT; + + mtt_addr = mlx4_mtt_addr(dev, &eq->mtt); + eq_context->mtt_base_addr_h = mtt_addr >> 32; + eq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); + + err = mlx4_SW2HW_EQ(dev, mailbox, eq->eqn); + if (err) { + mlx4_warn(dev, "SW2HW_EQ failed (%d)\n", err); + goto err_out_free_mtt; + } + + kfree(dma_list); + mlx4_free_cmd_mailbox(dev, mailbox); + + eq->cons_index = 0; + + return err; + +err_out_free_mtt: + mlx4_mtt_cleanup(dev, &eq->mtt); + +err_out_free_eq: + mlx4_bitmap_free(&priv->eq_table.bitmap, eq->eqn); + +err_out_free_pages: + for (i = 0; i < npages; ++i) + if (eq->page_list[i].buf) + dma_free_coherent(&dev->pdev->dev, PAGE_SIZE, + eq->page_list[i].buf, + eq->page_list[i].map); + + mlx4_free_cmd_mailbox(dev, mailbox); + +err_out_free: + kfree(eq->page_list); + kfree(dma_list); + +err_out: + return err; +} + +static void mlx4_free_eq(struct mlx4_dev *dev, + struct mlx4_eq *eq) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cmd_mailbox *mailbox; + int err; + int npages = PAGE_ALIGN(MLX4_EQ_ENTRY_SIZE * eq->nent) / PAGE_SIZE; + int i; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return; + + err = mlx4_HW2SW_EQ(dev, mailbox, eq->eqn); + if (err) + mlx4_warn(dev, "HW2SW_EQ failed (%d)\n", err); + + if (0) { + mlx4_dbg(dev, "Dumping EQ context %02x:\n", eq->eqn); + for (i = 0; i < sizeof (struct mlx4_eq_context) / 4; ++i) { + if (i % 4 == 0) + pr_cont("[%02x] ", i * 4); + pr_cont(" %08x", be32_to_cpup(mailbox->buf + i * 4)); + if ((i + 1) % 4 == 0) + pr_cont("\n"); + } + } + + mlx4_mtt_cleanup(dev, &eq->mtt); + for (i = 0; i < npages; ++i) + dma_free_coherent(&dev->pdev->dev, PAGE_SIZE, + eq->page_list[i].buf, + eq->page_list[i].map); + + kfree(eq->page_list); + mlx4_bitmap_free(&priv->eq_table.bitmap, eq->eqn); + mlx4_free_cmd_mailbox(dev, mailbox); +} + +static void mlx4_free_irqs(struct mlx4_dev *dev) +{ + struct mlx4_eq_table *eq_table = &mlx4_priv(dev)->eq_table; + struct mlx4_priv *priv = mlx4_priv(dev); + int i, vec; + + if (eq_table->have_irq) + free_irq(dev->pdev->irq, dev); + + for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) + if (eq_table->eq[i].have_irq) { + free_irq(eq_table->eq[i].irq, eq_table->eq + i); + eq_table->eq[i].have_irq = 0; + } + + for (i = 0; i < dev->caps.comp_pool; i++) { + /* + * Freeing the assigned irq's + * all bits should be 0, but we need to validate + */ + if (priv->msix_ctl.pool_bm & 1ULL << i) { + /* NO need protecting*/ + vec = dev->caps.num_comp_vectors + 1 + i; + free_irq(priv->eq_table.eq[vec].irq, + &priv->eq_table.eq[vec]); + } + } + + + kfree(eq_table->irq_names); +} + +static int mlx4_map_clr_int(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + priv->clr_base = ioremap(pci_resource_start(dev->pdev, priv->fw.clr_int_bar) + + priv->fw.clr_int_base, MLX4_CLR_INT_SIZE); + if (!priv->clr_base) { + mlx4_err(dev, "Couldn't map interrupt clear register, aborting.\n"); + return -ENOMEM; + } + + return 0; +} + +static void mlx4_unmap_clr_int(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + iounmap(priv->clr_base); +} + +int mlx4_alloc_eq_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + priv->eq_table.eq = kcalloc(dev->caps.num_eqs - dev->caps.reserved_eqs, + sizeof *priv->eq_table.eq, GFP_KERNEL); + if (!priv->eq_table.eq) + return -ENOMEM; + + return 0; +} + +void mlx4_free_eq_table(struct mlx4_dev *dev) +{ + kfree(mlx4_priv(dev)->eq_table.eq); +} + +int mlx4_init_eq_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int err; + int i; + + priv->eq_table.uar_map = kcalloc(mlx4_num_eq_uar(dev), + sizeof *priv->eq_table.uar_map, + GFP_KERNEL); + if (!priv->eq_table.uar_map) { + err = -ENOMEM; + goto err_out_free; + } + + err = mlx4_bitmap_init(&priv->eq_table.bitmap, dev->caps.num_eqs, + dev->caps.num_eqs - 1, dev->caps.reserved_eqs, 0); + if (err) + goto err_out_free; + + for (i = 0; i < mlx4_num_eq_uar(dev); ++i) + priv->eq_table.uar_map[i] = NULL; + + if (!mlx4_is_slave(dev)) { + err = mlx4_map_clr_int(dev); + if (err) + goto err_out_bitmap; + + priv->eq_table.clr_mask = + swab32(1 << (priv->eq_table.inta_pin & 31)); + priv->eq_table.clr_int = priv->clr_base + + (priv->eq_table.inta_pin < 32 ? 4 : 0); + } + + priv->eq_table.irq_names = + kmalloc(MLX4_IRQNAME_SIZE * (dev->caps.num_comp_vectors + 1 + + dev->caps.comp_pool), + GFP_KERNEL); + if (!priv->eq_table.irq_names) { + err = -ENOMEM; + goto err_out_bitmap; + } + + for (i = 0; i < dev->caps.num_comp_vectors; ++i) { + err = mlx4_create_eq(dev, dev->caps.num_cqs - + dev->caps.reserved_cqs + + MLX4_NUM_SPARE_EQE, + (dev->flags & MLX4_FLAG_MSI_X) ? i : 0, + &priv->eq_table.eq[i]); + if (err) { + --i; + goto err_out_unmap; + } + } + + err = mlx4_create_eq(dev, MLX4_NUM_ASYNC_EQE + MLX4_NUM_SPARE_EQE, + (dev->flags & MLX4_FLAG_MSI_X) ? dev->caps.num_comp_vectors : 0, + &priv->eq_table.eq[dev->caps.num_comp_vectors]); + if (err) + goto err_out_comp; + + /*if additional completion vectors poolsize is 0 this loop will not run*/ + for (i = dev->caps.num_comp_vectors + 1; + i < dev->caps.num_comp_vectors + dev->caps.comp_pool + 1; ++i) { + + err = mlx4_create_eq(dev, dev->caps.num_cqs - + dev->caps.reserved_cqs + + MLX4_NUM_SPARE_EQE, + (dev->flags & MLX4_FLAG_MSI_X) ? i : 0, + &priv->eq_table.eq[i]); + if (err) { + --i; + goto err_out_unmap; + } + } + + + if (dev->flags & MLX4_FLAG_MSI_X) { + const char *eq_name; + + for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) { + if (i < dev->caps.num_comp_vectors) { + snprintf(priv->eq_table.irq_names + + i * MLX4_IRQNAME_SIZE, + MLX4_IRQNAME_SIZE, + "mlx4-comp-%d@pci:%s", i, + pci_name(dev->pdev)); + } else { + snprintf(priv->eq_table.irq_names + + i * MLX4_IRQNAME_SIZE, + MLX4_IRQNAME_SIZE, + "mlx4-async@pci:%s", + pci_name(dev->pdev)); + } + + eq_name = priv->eq_table.irq_names + + i * MLX4_IRQNAME_SIZE; + err = request_irq(priv->eq_table.eq[i].irq, + mlx4_msi_x_interrupt, 0, eq_name, + priv->eq_table.eq + i); + if (err) + goto err_out_async; + + priv->eq_table.eq[i].have_irq = 1; + } + } else { + snprintf(priv->eq_table.irq_names, + MLX4_IRQNAME_SIZE, + DRV_NAME "@pci:%s", + pci_name(dev->pdev)); + err = request_irq(dev->pdev->irq, mlx4_interrupt, + IRQF_SHARED, priv->eq_table.irq_names, dev); + if (err) + goto err_out_async; + + priv->eq_table.have_irq = 1; + } + + + err = mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0, + priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); + if (err) + mlx4_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n", + priv->eq_table.eq[dev->caps.num_comp_vectors].eqn, err); + + for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) + eq_set_ci(&priv->eq_table.eq[i], 1); + + return 0; + +err_out_async: + mlx4_free_eq(dev, &priv->eq_table.eq[dev->caps.num_comp_vectors]); + +err_out_comp: + i = dev->caps.num_comp_vectors - 1; + +err_out_unmap: + while (i >= 0) { + mlx4_free_eq(dev, &priv->eq_table.eq[i]); + --i; + } + if (!mlx4_is_slave(dev)) + mlx4_unmap_clr_int(dev); + mlx4_free_irqs(dev); + +err_out_bitmap: + mlx4_bitmap_cleanup(&priv->eq_table.bitmap); + +err_out_free: + kfree(priv->eq_table.uar_map); + + return err; +} + +void mlx4_cleanup_eq_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int i; + + mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 1, + priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); + + mlx4_free_irqs(dev); + + for (i = 0; i < dev->caps.num_comp_vectors + dev->caps.comp_pool + 1; ++i) + mlx4_free_eq(dev, &priv->eq_table.eq[i]); + + if (!mlx4_is_slave(dev)) + mlx4_unmap_clr_int(dev); + + for (i = 0; i < mlx4_num_eq_uar(dev); ++i) + if (priv->eq_table.uar_map[i]) + iounmap(priv->eq_table.uar_map[i]); + + mlx4_bitmap_cleanup(&priv->eq_table.bitmap); + + kfree(priv->eq_table.uar_map); +} + +/* A test that verifies that we can accept interrupts on all + * the irq vectors of the device. + * Interrupts are checked using the NOP command. + */ +int mlx4_test_interrupts(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int i; + int err; + + err = mlx4_NOP(dev); + /* When not in MSI_X, there is only one irq to check */ + if (!(dev->flags & MLX4_FLAG_MSI_X) || mlx4_is_slave(dev)) + return err; + + /* A loop over all completion vectors, for each vector we will check + * whether it works by mapping command completions to that vector + * and performing a NOP command + */ + for(i = 0; !err && (i < dev->caps.num_comp_vectors); ++i) { + /* Temporary use polling for command completions */ + mlx4_cmd_use_polling(dev); + + /* Map the new eq to handle all asyncronous events */ + err = mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0, + priv->eq_table.eq[i].eqn); + if (err) { + mlx4_warn(dev, "Failed mapping eq for interrupt test\n"); + mlx4_cmd_use_events(dev); + break; + } + + /* Go back to using events */ + mlx4_cmd_use_events(dev); + err = mlx4_NOP(dev); + } + + /* Return to default */ + mlx4_MAP_EQ(dev, get_async_ev_mask(dev), 0, + priv->eq_table.eq[dev->caps.num_comp_vectors].eqn); + return err; +} +EXPORT_SYMBOL(mlx4_test_interrupts); + +int mlx4_assign_eq(struct mlx4_dev *dev, char* name, int * vector) +{ + + struct mlx4_priv *priv = mlx4_priv(dev); + int vec = 0, err = 0, i; + + mutex_lock(&priv->msix_ctl.pool_lock); + for (i = 0; !vec && i < dev->caps.comp_pool; i++) { + if (~priv->msix_ctl.pool_bm & 1ULL << i) { + priv->msix_ctl.pool_bm |= 1ULL << i; + vec = dev->caps.num_comp_vectors + 1 + i; + snprintf(priv->eq_table.irq_names + + vec * MLX4_IRQNAME_SIZE, + MLX4_IRQNAME_SIZE, "%s", name); + err = request_irq(priv->eq_table.eq[vec].irq, + mlx4_msi_x_interrupt, 0, + &priv->eq_table.irq_names[vec<<5], + priv->eq_table.eq + vec); + if (err) { + /*zero out bit by fliping it*/ + priv->msix_ctl.pool_bm ^= 1 << i; + vec = 0; + continue; + /*we dont want to break here*/ + } + eq_set_ci(&priv->eq_table.eq[vec], 1); + } + } + mutex_unlock(&priv->msix_ctl.pool_lock); + + if (vec) { + *vector = vec; + } else { + *vector = 0; + err = (i == dev->caps.comp_pool) ? -ENOSPC : err; + } + return err; +} +EXPORT_SYMBOL(mlx4_assign_eq); + +void mlx4_release_eq(struct mlx4_dev *dev, int vec) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + /*bm index*/ + int i = vec - dev->caps.num_comp_vectors - 1; + + if (likely(i >= 0)) { + /*sanity check , making sure were not trying to free irq's + Belonging to a legacy EQ*/ + mutex_lock(&priv->msix_ctl.pool_lock); + if (priv->msix_ctl.pool_bm & 1ULL << i) { + free_irq(priv->eq_table.eq[vec].irq, + &priv->eq_table.eq[vec]); + priv->msix_ctl.pool_bm &= ~(1ULL << i); + } + mutex_unlock(&priv->msix_ctl.pool_lock); + } + +} +EXPORT_SYMBOL(mlx4_release_eq); + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/fw.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/fw.c new file mode 100755 index 0000000..3893959 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/fw.c @@ -0,0 +1,1436 @@ +/* + * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#ifdef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ +#include +#include +#include + +#include "fw.h" +#include "icm.h" + +enum { + MLX4_COMMAND_INTERFACE_MIN_REV = 2, + MLX4_COMMAND_INTERFACE_MAX_REV = 3, + MLX4_COMMAND_INTERFACE_NEW_PORT_CMDS = 3, +}; + +extern void __buggy_use_of_MLX4_GET(void); +extern void __buggy_use_of_MLX4_PUT(void); + +static bool enable_qos; +#ifndef __VMKERNEL_MLX4_EN_SUPPORT__ +module_param(enable_qos, bool, 0444); +MODULE_PARM_DESC(enable_qos, "Enable Quality of Service support in the HCA (default: off)"); +#endif /* NOT __VMKERNEL_MLX4_EN_SUPPORT__ */ + +#define MLX4_GET(dest, source, offset) \ + do { \ + void *__p = (char *) (source) + (offset); \ + switch (sizeof (dest)) { \ + case 1: (dest) = *(u8 *) __p; break; \ + case 2: (dest) = be16_to_cpup(__p); break; \ + case 4: (dest) = be32_to_cpup(__p); break; \ + case 8: (dest) = be64_to_cpup(__p); break; \ + default: __buggy_use_of_MLX4_GET(); \ + } \ + } while (0) + +#define MLX4_PUT(dest, source, offset) \ + do { \ + void *__d = ((char *) (dest) + (offset)); \ + switch (sizeof(source)) { \ + case 1: *(u8 *) __d = (source); break; \ + case 2: *(__be16 *) __d = cpu_to_be16(source); break; \ + case 4: *(__be32 *) __d = cpu_to_be32(source); break; \ + case 8: *(__be64 *) __d = cpu_to_be64(source); break; \ + default: __buggy_use_of_MLX4_PUT(); \ + } \ + } while (0) + +static void dump_dev_cap_flags(struct mlx4_dev *dev, u64 flags) +{ + static const char *fname[] = { + [ 0] = "RC transport", + [ 1] = "UC transport", + [ 2] = "UD transport", + [ 3] = "XRC transport", + [ 4] = "reliable multicast", + [ 5] = "FCoIB support", + [ 6] = "SRQ support", + [ 7] = "IPoIB checksum offload", + [ 8] = "P_Key violation counter", + [ 9] = "Q_Key violation counter", + [10] = "VMM", + [12] = "DPDP", + [15] = "Big LSO headers", + [16] = "MW support", + [17] = "APM support", + [18] = "Atomic ops support", + [19] = "Raw multicast support", + [20] = "Address vector port checking support", + [21] = "UD multicast support", + [24] = "Demand paging support", + [25] = "Router support", + [30] = "IBoE support", + [32] = "Unicast loopback support", + [34] = "FCS header control", + [38] = "Wake On LAN support", + [40] = "UDP RSS support", + [41] = "Unicast VEP steering support", + [42] = "Multicast VEP steering support", + [48] = "Counters support", + [62] = "64 byte CQE support", + }; + int i; + + mlx4_dbg(dev, "DEV_CAP flags:\n"); + for (i = 0; i < ARRAY_SIZE(fname); ++i) + if (fname[i] && (flags & (1LL << i))) + mlx4_dbg(dev, " %s\n", fname[i]); +} + +int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg) +{ + struct mlx4_cmd_mailbox *mailbox; + u32 *inbox; + int err = 0; + +#define MOD_STAT_CFG_IN_SIZE 0x100 + +#define MOD_STAT_CFG_PG_SZ_M_OFFSET 0x002 +#define MOD_STAT_CFG_PG_SZ_OFFSET 0x003 + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + inbox = mailbox->buf; + + memset(inbox, 0, MOD_STAT_CFG_IN_SIZE); + + MLX4_PUT(inbox, cfg->log_pg_sz, MOD_STAT_CFG_PG_SZ_OFFSET); + MLX4_PUT(inbox, cfg->log_pg_sz_m, MOD_STAT_CFG_PG_SZ_M_OFFSET); + + err = mlx4_cmd(dev, mailbox->dma, 0, 0, MLX4_CMD_MOD_STAT_CFG, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + u8 field; + u32 size; + int err = 0; + +#define QUERY_FUNC_CAP_FLAGS_OFFSET 0x0 +#define QUERY_FUNC_CAP_NUM_PORTS_OFFSET 0x1 +#define QUERY_FUNC_CAP_PF_BHVR_OFFSET 0x4 +#define QUERY_FUNC_CAP_QP_QUOTA_OFFSET 0x10 +#define QUERY_FUNC_CAP_CQ_QUOTA_OFFSET 0x14 +#define QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET 0x18 +#define QUERY_FUNC_CAP_MPT_QUOTA_OFFSET 0x20 +#define QUERY_FUNC_CAP_MTT_QUOTA_OFFSET 0x24 +#define QUERY_FUNC_CAP_MCG_QUOTA_OFFSET 0x28 +#define QUERY_FUNC_CAP_MAX_EQ_OFFSET 0x2c +#define QUERY_FUNC_CAP_RESERVED_EQ_OFFSET 0X30 +#define QUERY_FUNC_CAP_BASE_QPN_OFFSET 0X40 +#define QUERY_FUNC_CAP_BASE_TUNNEL_QPN_OFFSET 0X44 +#define QUERY_FUNC_CAP_BASE_PROXY_QPN_OFFSET 0X48 + +#define QUERY_FUNC_CAP_PHYS_PORT_OFFSET 0x3 +#define QUERY_FUNC_CAP_ETH_PROPS_OFFSET 0xc +#define QUERY_FUNC_CAP_PHY_WQE_GID_OFFSET 0x8 + + if (vhcr->op_modifier == 1) { + field = vhcr->in_modifier; + MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_PHYS_PORT_OFFSET); + + field = 0; /* ensure fvl bit is not set */ + MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_ETH_PROPS_OFFSET); + /* ensure that phy_wqe_gid bit is not set */ + MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_PHY_WQE_GID_OFFSET); + } else if (vhcr->op_modifier == 0) { + field = 3 << 6; /* enable only ethernet and rdma */ + MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS_OFFSET); + + field = dev->caps.num_ports; + MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_NUM_PORTS_OFFSET); + + size = 0; /* no PF behavious is set for now */ + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_PF_BHVR_OFFSET); + + size = dev->caps.num_qps; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET); + + size = dev->caps.num_srqs; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET); + + size = dev->caps.num_cqs; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET); + + size = dev->caps.num_eqs; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MAX_EQ_OFFSET); + + size = dev->caps.reserved_eqs; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET); + + size = dev->caps.num_mpts; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET); + + size = dev->caps.num_mtts; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET); + + size = dev->caps.num_mgms + dev->caps.num_amgms; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET); + + size = dev->caps.base_sqpn; + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_BASE_QPN_OFFSET); + + size = dev->caps.base_sqpn + 8 * (1 + MLX4_MFUNC_MAX + slave); + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_BASE_TUNNEL_QPN_OFFSET); + + size = dev->caps.base_sqpn + 8 * (slave + 1); + MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_BASE_PROXY_QPN_OFFSET); + + } else + err = -EINVAL; + + return err; +} + +int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, struct mlx4_func_cap *func_cap) +{ + struct mlx4_cmd_mailbox *mailbox; + u32 *outbox; + u8 field; + u32 size; + int i; + int err = 0; + + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + err = mlx4_cmd_box(dev, 0, mailbox->dma, 0, 0, MLX4_CMD_QUERY_FUNC_CAP, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (err) + goto out; + + outbox = mailbox->buf; + + MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS_OFFSET); + func_cap->flags = field; + + MLX4_GET(field, outbox, QUERY_FUNC_CAP_NUM_PORTS_OFFSET); + func_cap->num_ports = field; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_PF_BHVR_OFFSET); + func_cap->pf_context_behaviour = size; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP_QUOTA_OFFSET); + func_cap->qp_quota = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET); + func_cap->srq_quota = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET); + func_cap->cq_quota = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_MAX_EQ_OFFSET); + func_cap->max_eq = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET); + func_cap->reserved_eq = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET); + func_cap->mpt_quota = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET); + func_cap->mtt_quota = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET); + func_cap->mcg_quota = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_BASE_QPN_OFFSET); + func_cap->base_qpn = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_BASE_TUNNEL_QPN_OFFSET); + func_cap->base_tunnel_qpn = size & 0xFFFFFF; + + MLX4_GET(size, outbox, QUERY_FUNC_CAP_BASE_PROXY_QPN_OFFSET); + func_cap->base_proxy_qpn = size & 0xFFFFFF; + + for (i = 1; i <= func_cap->num_ports; ++i) { + err = mlx4_cmd_box(dev, 0, mailbox->dma, i, 1, + MLX4_CMD_QUERY_FUNC_CAP, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (err) + goto out; + + MLX4_GET(field, outbox, QUERY_FUNC_CAP_ETH_PROPS_OFFSET); + if (field & (1 << 7)) { + mlx4_err(dev, "VLAN is enforced on this port\n"); + err = -EPROTONOSUPPORT; + goto out; + } + + if (field & (1 << 6)) { + mlx4_err(dev, "Force mac is enabled on this port\n"); + err = -EPROTONOSUPPORT; + goto out; + } + + if (dev->caps.port_type[i] == MLX4_PORT_TYPE_IB) { + MLX4_GET(field, outbox, + QUERY_FUNC_CAP_PHY_WQE_GID_OFFSET); + if (field & (1 << 7)) { + mlx4_err(dev, "phy_wqe_gid is " + "enforced on this ib port\n"); + err = -EPROTONOSUPPORT; + goto out; + } + } + + MLX4_GET(field, outbox, QUERY_FUNC_CAP_PHYS_PORT_OFFSET); + func_cap->physical_port[i] = field; + } + + /* All other resources are allocated by the master, but we still report + * 'num' and 'reserved' capabilities as follows: + * - num remains the maximum resource index + * - 'num - reserved' is the total available objects of a resource, but + * resource indices may be less than 'reserved' + * TODO: set per-resource quotas */ + +out: + mlx4_free_cmd_mailbox(dev, mailbox); + + return err; +} + +int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) +{ + struct mlx4_cmd_mailbox *mailbox; + u32 *outbox; + u8 field; + u32 field32, flags, ext_flags; + u16 size; + u16 stat_rate; + int err; + int i; + +#define QUERY_DEV_CAP_OUT_SIZE 0x100 +#define QUERY_DEV_CAP_MAX_SRQ_SZ_OFFSET 0x10 +#define QUERY_DEV_CAP_MAX_QP_SZ_OFFSET 0x11 +#define QUERY_DEV_CAP_RSVD_QP_OFFSET 0x12 +#define QUERY_DEV_CAP_MAX_QP_OFFSET 0x13 +#define QUERY_DEV_CAP_RSVD_SRQ_OFFSET 0x14 +#define QUERY_DEV_CAP_MAX_SRQ_OFFSET 0x15 +#define QUERY_DEV_CAP_RSVD_EEC_OFFSET 0x16 +#define QUERY_DEV_CAP_MAX_EEC_OFFSET 0x17 +#define QUERY_DEV_CAP_MAX_CQ_SZ_OFFSET 0x19 +#define QUERY_DEV_CAP_RSVD_CQ_OFFSET 0x1a +#define QUERY_DEV_CAP_MAX_CQ_OFFSET 0x1b +#define QUERY_DEV_CAP_MAX_MPT_OFFSET 0x1d +#define QUERY_DEV_CAP_RSVD_EQ_OFFSET 0x1e +#define QUERY_DEV_CAP_MAX_EQ_OFFSET 0x1f +#define QUERY_DEV_CAP_RSVD_MTT_OFFSET 0x20 +#define QUERY_DEV_CAP_MAX_MRW_SZ_OFFSET 0x21 +#define QUERY_DEV_CAP_RSVD_MRW_OFFSET 0x22 +#define QUERY_DEV_CAP_MAX_MTT_SEG_OFFSET 0x23 +#define QUERY_DEV_CAP_MAX_AV_OFFSET 0x27 +#define QUERY_DEV_CAP_MAX_REQ_QP_OFFSET 0x29 +#define QUERY_DEV_CAP_MAX_RES_QP_OFFSET 0x2b +#define QUERY_DEV_CAP_MAX_GSO_OFFSET 0x2d +#define QUERY_DEV_CAP_MAX_RDMA_OFFSET 0x2f +#define QUERY_DEV_CAP_RSZ_SRQ_OFFSET 0x33 +#define QUERY_DEV_CAP_ACK_DELAY_OFFSET 0x35 +#define QUERY_DEV_CAP_MTU_WIDTH_OFFSET 0x36 +#define QUERY_DEV_CAP_VL_PORT_OFFSET 0x37 +#define QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET 0x38 +#define QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b +#define QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c +#define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f +#define QUERY_DEV_CAP_EXT_FLAGS_OFFSET 0x40 +#define QUERY_DEV_CAP_FLAGS_OFFSET 0x44 +#define QUERY_DEV_CAP_RSVD_UAR_OFFSET 0x48 +#define QUERY_DEV_CAP_UAR_SZ_OFFSET 0x49 +#define QUERY_DEV_CAP_PAGE_SZ_OFFSET 0x4b +#define QUERY_DEV_CAP_BF_OFFSET 0x4c +#define QUERY_DEV_CAP_LOG_BF_REG_SZ_OFFSET 0x4d +#define QUERY_DEV_CAP_LOG_MAX_BF_REGS_PER_PAGE_OFFSET 0x4e +#define QUERY_DEV_CAP_LOG_MAX_BF_PAGES_OFFSET 0x4f +#define QUERY_DEV_CAP_MAX_SG_SQ_OFFSET 0x51 +#define QUERY_DEV_CAP_MAX_DESC_SZ_SQ_OFFSET 0x52 +#define QUERY_DEV_CAP_MAX_SG_RQ_OFFSET 0x55 +#define QUERY_DEV_CAP_MAX_DESC_SZ_RQ_OFFSET 0x56 +#define QUERY_DEV_CAP_MAX_QP_MCG_OFFSET 0x61 +#define QUERY_DEV_CAP_RSVD_MCG_OFFSET 0x62 +#define QUERY_DEV_CAP_MAX_MCG_OFFSET 0x63 +#define QUERY_DEV_CAP_RSVD_PD_OFFSET 0x64 +#define QUERY_DEV_CAP_MAX_PD_OFFSET 0x65 +#define QUERY_DEV_CAP_RSVD_XRC_OFFSET 0x66 +#define QUERY_DEV_CAP_MAX_XRC_OFFSET 0x67 +#define QUERY_DEV_CAP_MAX_COUNTERS_OFFSET 0x68 +#define QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET 0x80 +#define QUERY_DEV_CAP_QPC_ENTRY_SZ_OFFSET 0x82 +#define QUERY_DEV_CAP_AUX_ENTRY_SZ_OFFSET 0x84 +#define QUERY_DEV_CAP_ALTC_ENTRY_SZ_OFFSET 0x86 +#define QUERY_DEV_CAP_EQC_ENTRY_SZ_OFFSET 0x88 +#define QUERY_DEV_CAP_CQC_ENTRY_SZ_OFFSET 0x8a +#define QUERY_DEV_CAP_SRQ_ENTRY_SZ_OFFSET 0x8c +#define QUERY_DEV_CAP_C_MPT_ENTRY_SZ_OFFSET 0x8e +#define QUERY_DEV_CAP_MTT_ENTRY_SZ_OFFSET 0x90 +#define QUERY_DEV_CAP_D_MPT_ENTRY_SZ_OFFSET 0x92 +#define QUERY_DEV_CAP_BMME_FLAGS_OFFSET 0x94 +#define QUERY_DEV_CAP_RSVD_LKEY_OFFSET 0x98 +#define QUERY_DEV_CAP_MAX_ICM_SZ_OFFSET 0xa0 + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + outbox = mailbox->buf; + + err = mlx4_cmd_box(dev, 0, mailbox->dma, 0, 0, MLX4_CMD_QUERY_DEV_CAP, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + if (err) + goto out; + + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_QP_OFFSET); + dev_cap->reserved_qps = 1 << (field & 0xf); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_OFFSET); + dev_cap->max_qps = 1 << (field & 0x1f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_SRQ_OFFSET); + dev_cap->reserved_srqs = 1 << (field >> 4); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SRQ_OFFSET); + dev_cap->max_srqs = 1 << (field & 0x1f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_CQ_SZ_OFFSET); + dev_cap->max_cq_sz = 1 << field; + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_CQ_OFFSET); + dev_cap->reserved_cqs = 1 << (field & 0xf); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_CQ_OFFSET); + dev_cap->max_cqs = 1 << (field & 0x1f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MPT_OFFSET); + dev_cap->max_mpts = 1 << (field & 0x3f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_EQ_OFFSET); + dev_cap->reserved_eqs = field & 0xf; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_EQ_OFFSET); + dev_cap->max_eqs = 1 << (field & 0xf); + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MTT_OFFSET); + dev_cap->reserved_mtts = 1 << (field >> 4); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MRW_SZ_OFFSET); + dev_cap->max_mrw_sz = 1 << field; + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MRW_OFFSET); + dev_cap->reserved_mrws = 1 << (field & 0xf); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MTT_SEG_OFFSET); + dev_cap->max_mtt_seg = 1 << (field & 0x3f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_REQ_QP_OFFSET); + dev_cap->max_requester_per_qp = 1 << (field & 0x3f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RES_QP_OFFSET); + dev_cap->max_responder_per_qp = 1 << (field & 0x3f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_GSO_OFFSET); + field &= 0x1f; + if (!field) + dev_cap->max_gso_sz = 0; + else + dev_cap->max_gso_sz = 1 << field; + + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RDMA_OFFSET); + dev_cap->max_rdma_global = 1 << (field & 0x3f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_ACK_DELAY_OFFSET); + dev_cap->local_ca_ack_delay = field & 0x1f; + MLX4_GET(field, outbox, QUERY_DEV_CAP_VL_PORT_OFFSET); + dev_cap->num_ports = field & 0xf; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET); + dev_cap->max_msg_sz = 1 << (field & 0x1f); + MLX4_GET(stat_rate, outbox, QUERY_DEV_CAP_RATE_SUPPORT_OFFSET); + dev_cap->stat_rate_support = stat_rate; + MLX4_GET(ext_flags, outbox, QUERY_DEV_CAP_EXT_FLAGS_OFFSET); + MLX4_GET(flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET); + dev_cap->flags = flags | (u64)ext_flags << 32; + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_UAR_OFFSET); + dev_cap->reserved_uars = field >> 4; + MLX4_GET(field, outbox, QUERY_DEV_CAP_UAR_SZ_OFFSET); + dev_cap->uar_size = 1 << ((field & 0x3f) + 20); + MLX4_GET(field, outbox, QUERY_DEV_CAP_PAGE_SZ_OFFSET); + dev_cap->min_page_sz = 1 << field; + +#ifdef __VMKERNEL_BF_ENABLE__ + MLX4_GET(field, outbox, QUERY_DEV_CAP_BF_OFFSET); + if (field & 0x80) { + MLX4_GET(field, outbox, QUERY_DEV_CAP_LOG_BF_REG_SZ_OFFSET); + dev_cap->bf_reg_size = 1 << (field & 0x1f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_LOG_MAX_BF_REGS_PER_PAGE_OFFSET); + if ((1 << (field & 0x3f)) > (PAGE_SIZE / dev_cap->bf_reg_size)) + field = 3; + dev_cap->bf_regs_per_page = 1 << (field & 0x3f); + mlx4_dbg(dev, "BlueFlame available (reg size %d, regs/page %d)\n", + dev_cap->bf_reg_size, dev_cap->bf_regs_per_page); + } else { + dev_cap->bf_reg_size = 0; + mlx4_dbg(dev, "BlueFlame not available\n"); + } +#else + dev_cap->bf_reg_size = 0; + mlx4_dbg(dev, "BlueFlame not available\n"); +#endif /* __VMKERNEL_BF_ENABLE__ */ + + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SG_SQ_OFFSET); + dev_cap->max_sq_sg = field; + MLX4_GET(size, outbox, QUERY_DEV_CAP_MAX_DESC_SZ_SQ_OFFSET); + dev_cap->max_sq_desc_sz = size; + + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_MCG_OFFSET); + dev_cap->max_qp_per_mcg = 1 << field; + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MCG_OFFSET); + dev_cap->reserved_mgms = field & 0xf; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MCG_OFFSET); + dev_cap->max_mcgs = 1 << field; + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_PD_OFFSET); + dev_cap->reserved_pds = field >> 4; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET); + dev_cap->max_pds = 1 << (field & 0x3f); + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_XRC_OFFSET); + dev_cap->reserved_xrcds = field >> 4; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET); + dev_cap->max_xrcds = 1 << (field & 0x1f); + + MLX4_GET(size, outbox, QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET); + dev_cap->rdmarc_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_QPC_ENTRY_SZ_OFFSET); + dev_cap->qpc_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_AUX_ENTRY_SZ_OFFSET); + dev_cap->aux_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_ALTC_ENTRY_SZ_OFFSET); + dev_cap->altc_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_EQC_ENTRY_SZ_OFFSET); + dev_cap->eqc_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_CQC_ENTRY_SZ_OFFSET); + dev_cap->cqc_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_SRQ_ENTRY_SZ_OFFSET); + dev_cap->srq_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_C_MPT_ENTRY_SZ_OFFSET); + dev_cap->cmpt_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_MTT_ENTRY_SZ_OFFSET); + dev_cap->mtt_entry_sz = size; + MLX4_GET(size, outbox, QUERY_DEV_CAP_D_MPT_ENTRY_SZ_OFFSET); + dev_cap->dmpt_entry_sz = size; + + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SRQ_SZ_OFFSET); + dev_cap->max_srq_sz = 1 << field; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_SZ_OFFSET); + dev_cap->max_qp_sz = 1 << field; + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSZ_SRQ_OFFSET); + dev_cap->resize_srq = field & 1; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SG_RQ_OFFSET); + dev_cap->max_rq_sg = field; + MLX4_GET(size, outbox, QUERY_DEV_CAP_MAX_DESC_SZ_RQ_OFFSET); + dev_cap->max_rq_desc_sz = size; + + MLX4_GET(dev_cap->bmme_flags, outbox, + QUERY_DEV_CAP_BMME_FLAGS_OFFSET); + MLX4_GET(dev_cap->reserved_lkey, outbox, + QUERY_DEV_CAP_RSVD_LKEY_OFFSET); + MLX4_GET(dev_cap->max_icm_sz, outbox, + QUERY_DEV_CAP_MAX_ICM_SZ_OFFSET); + if (dev_cap->flags & MLX4_DEV_CAP_FLAG_COUNTERS) + MLX4_GET(dev_cap->max_counters, outbox, + QUERY_DEV_CAP_MAX_COUNTERS_OFFSET); + + if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { + for (i = 1; i <= dev_cap->num_ports; ++i) { + MLX4_GET(field, outbox, QUERY_DEV_CAP_VL_PORT_OFFSET); + dev_cap->max_vl[i] = field >> 4; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MTU_WIDTH_OFFSET); + dev_cap->ib_mtu[i] = field >> 4; + dev_cap->max_port_width[i] = field & 0xf; + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_GID_OFFSET); + dev_cap->max_gids[i] = 1 << (field & 0xf); + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PKEY_OFFSET); + dev_cap->max_pkeys[i] = 1 << (field & 0xf); + } + } else { +#define QUERY_PORT_SUPPORTED_TYPE_OFFSET 0x00 +#define QUERY_PORT_MTU_OFFSET 0x01 +#define QUERY_PORT_ETH_MTU_OFFSET 0x02 +#define QUERY_PORT_WIDTH_OFFSET 0x06 +#define QUERY_PORT_MAX_GID_PKEY_OFFSET 0x07 +#define QUERY_PORT_MAX_MACVLAN_OFFSET 0x0a +#define QUERY_PORT_MAX_VL_OFFSET 0x0b +#define QUERY_PORT_MAC_OFFSET 0x10 +#define QUERY_PORT_TRANS_VENDOR_OFFSET 0x18 +#define QUERY_PORT_WAVELENGTH_OFFSET 0x1c +#define QUERY_PORT_TRANS_CODE_OFFSET 0x20 + + for (i = 1; i <= dev_cap->num_ports; ++i) { + err = mlx4_cmd_box(dev, 0, mailbox->dma, i, 0, MLX4_CMD_QUERY_PORT, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); + if (err) + goto out; + + MLX4_GET(field, outbox, QUERY_PORT_SUPPORTED_TYPE_OFFSET); + dev_cap->supported_port_types[i] = field & 3; +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + dev_cap->suggested_type[i] = (field >> 3) & 1; + dev_cap->default_sense[i] = (field >> 4) & 1; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + MLX4_GET(field, outbox, QUERY_PORT_MTU_OFFSET); + dev_cap->ib_mtu[i] = field & 0xf; + MLX4_GET(field, outbox, QUERY_PORT_WIDTH_OFFSET); + dev_cap->max_port_width[i] = field & 0xf; + MLX4_GET(field, outbox, QUERY_PORT_MAX_GID_PKEY_OFFSET); + dev_cap->max_gids[i] = 1 << (field >> 4); + dev_cap->max_pkeys[i] = 1 << (field & 0xf); + MLX4_GET(field, outbox, QUERY_PORT_MAX_VL_OFFSET); + dev_cap->max_vl[i] = field & 0xf; + MLX4_GET(field, outbox, QUERY_PORT_MAX_MACVLAN_OFFSET); + dev_cap->log_max_macs[i] = field & 0xf; + dev_cap->log_max_vlans[i] = field >> 4; + MLX4_GET(dev_cap->eth_mtu[i], outbox, QUERY_PORT_ETH_MTU_OFFSET); + MLX4_GET(dev_cap->def_mac[i], outbox, QUERY_PORT_MAC_OFFSET); + MLX4_GET(field32, outbox, QUERY_PORT_TRANS_VENDOR_OFFSET); + dev_cap->trans_type[i] = field32 >> 24; + dev_cap->vendor_oui[i] = field32 & 0xffffff; + MLX4_GET(dev_cap->wavelength[i], outbox, QUERY_PORT_WAVELENGTH_OFFSET); + MLX4_GET(dev_cap->trans_code[i], outbox, QUERY_PORT_TRANS_CODE_OFFSET); + } + } + + mlx4_dbg(dev, "Base MM extensions: flags %08x, rsvd L_Key %08x\n", + dev_cap->bmme_flags, dev_cap->reserved_lkey); + + /* + * Each UAR has 4 EQ doorbells; so if a UAR is reserved, then + * we can't use any EQs whose doorbell falls on that page, + * even if the EQ itself isn't reserved. + */ + dev_cap->reserved_eqs = max(dev_cap->reserved_uars * 4, + dev_cap->reserved_eqs); + + mlx4_dbg(dev, "Max ICM size %lld MB\n", + (unsigned long long) dev_cap->max_icm_sz >> 20); + mlx4_dbg(dev, "Max QPs: %d, reserved QPs: %d, entry size: %d\n", + dev_cap->max_qps, dev_cap->reserved_qps, dev_cap->qpc_entry_sz); + mlx4_dbg(dev, "Max SRQs: %d, reserved SRQs: %d, entry size: %d\n", + dev_cap->max_srqs, dev_cap->reserved_srqs, dev_cap->srq_entry_sz); + mlx4_dbg(dev, "Max CQs: %d, reserved CQs: %d, entry size: %d\n", + dev_cap->max_cqs, dev_cap->reserved_cqs, dev_cap->cqc_entry_sz); + mlx4_dbg(dev, "Max EQs: %d, reserved EQs: %d, entry size: %d\n", + dev_cap->max_eqs, dev_cap->reserved_eqs, dev_cap->eqc_entry_sz); + mlx4_dbg(dev, "reserved MPTs: %d, reserved MTTs: %d\n", + dev_cap->reserved_mrws, dev_cap->reserved_mtts); + mlx4_dbg(dev, "Max PDs: %d, reserved PDs: %d, reserved UARs: %d\n", + dev_cap->max_pds, dev_cap->reserved_pds, dev_cap->reserved_uars); + mlx4_dbg(dev, "Max QP/MCG: %d, reserved MGMs: %d\n", + dev_cap->max_pds, dev_cap->reserved_mgms); + mlx4_dbg(dev, "Max CQEs: %d, max WQEs: %d, max SRQ WQEs: %d\n", + dev_cap->max_cq_sz, dev_cap->max_qp_sz, dev_cap->max_srq_sz); + mlx4_dbg(dev, "Local CA ACK delay: %d, max MTU: %d, port width cap: %d\n", + dev_cap->local_ca_ack_delay, 128 << dev_cap->ib_mtu[1], + dev_cap->max_port_width[1]); + mlx4_dbg(dev, "Max SQ desc size: %d, max SQ S/G: %d\n", + dev_cap->max_sq_desc_sz, dev_cap->max_sq_sg); + mlx4_dbg(dev, "Max RQ desc size: %d, max RQ S/G: %d\n", + dev_cap->max_rq_desc_sz, dev_cap->max_rq_sg); + mlx4_dbg(dev, "Max GSO size: %d\n", dev_cap->max_gso_sz); + mlx4_dbg(dev, "Max counters: %d\n", dev_cap->max_counters); + + dump_dev_cap_flags(dev, dev_cap->flags); + +out: + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + u32 flags; + int err = 0; +#ifndef __VMKERNEL_BF_ENABLE__ + u8 field; +#endif /* __VMKERNEL_BF_ENABLE__ */ + + err = mlx4_cmd_box(dev, 0, outbox->dma, 0, 0, MLX4_CMD_QUERY_DEV_CAP, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + if (err) + return err; + + /* add port mng change event capability unconditionally to slaves */ + MLX4_GET(flags, outbox->buf, QUERY_DEV_CAP_EXT_FLAGS_OFFSET); + flags |= MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV; + MLX4_PUT(outbox->buf, flags, QUERY_DEV_CAP_EXT_FLAGS_OFFSET); + +#ifndef __VMKERNEL_BF_ENABLE__ + /* For guests, report Blueflame disabled */ + MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_BF_OFFSET); + field &= 0x7f; + MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_BF_OFFSET); +#endif /* __VMKERNEL_BF_ENABLE__ */ + + return 0; +} + + +int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + u64 def_mac; + u8 port_type; + u16 short_field; + int err; + +#define MLX4_VF_PORT_NO_LINK_SENSE_MASK 0xE4 +#define QUERY_PORT_CUR_MAX_GID_OFFSET 0x0c +#define QUERY_PORT_CUR_MAX_PKEY_OFFSET 0x0e + + err = mlx4_cmd_box(dev, 0, outbox->dma, vhcr->in_modifier, 0, + MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_NATIVE); + + if (!err && dev->caps.function != slave) { + if (dev->caps.port_type[vhcr->in_modifier] + == MLX4_PORT_TYPE_ETH) { + /* set slave default_mac address */ + MLX4_GET(def_mac, outbox->buf, QUERY_PORT_MAC_OFFSET); + def_mac += slave << 8; + MLX4_PUT(outbox->buf, def_mac, QUERY_PORT_MAC_OFFSET); + } + MLX4_GET(port_type, outbox->buf, + QUERY_PORT_SUPPORTED_TYPE_OFFSET); + + /* No link sensing allowed */ + port_type &= MLX4_VF_PORT_NO_LINK_SENSE_MASK; + /* set port type to currently operating port type */ + port_type |= (dev->caps.port_type[vhcr->in_modifier] & 0x3); + + MLX4_PUT(outbox->buf, port_type, + QUERY_PORT_SUPPORTED_TYPE_OFFSET); + short_field = 1; /* slave max gids */ + MLX4_PUT(outbox->buf, short_field, + QUERY_PORT_CUR_MAX_GID_OFFSET); + + short_field = dev->caps.pkey_table_len[vhcr->in_modifier]; + MLX4_PUT(outbox->buf, short_field, + QUERY_PORT_CUR_MAX_PKEY_OFFSET); + } + + return err; +} + +int mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port, + int *gid_tbl_len, int *pkey_tbl_len) +{ + struct mlx4_cmd_mailbox *mailbox; + u32 *outbox; + u16 field; + int err; + + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + err = mlx4_cmd_box(dev, 0, mailbox->dma, port, 0, + MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_WRAPPED); + if (err) + goto out; + + outbox = mailbox->buf; + + MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_GID_OFFSET); + *gid_tbl_len = field; + + MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_PKEY_OFFSET); + *pkey_tbl_len = field; + +out: + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} +EXPORT_SYMBOL(mlx4_get_slave_pkey_gid_tbl_len); + + +int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_icm_iter iter; + __be64 *pages; + int lg; + int nent = 0; + int i; + int err = 0; + int ts = 0, tc = 0; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + memset(mailbox->buf, 0, MLX4_MAILBOX_SIZE); + pages = mailbox->buf; + + for (mlx4_icm_first(icm, &iter); + !mlx4_icm_last(&iter); + mlx4_icm_next(&iter)) { + /* + * We have to pass pages that are aligned to their + * size, so find the least significant 1 in the + * address or size and use that as our log2 size. + */ + lg = ffs(mlx4_icm_addr(&iter) | mlx4_icm_size(&iter)) - 1; + if (lg < MLX4_ICM_PAGE_SHIFT) { + mlx4_warn(dev, "Got FW area not aligned to %d (%llx/%lx).\n", + MLX4_ICM_PAGE_SIZE, + (unsigned long long) mlx4_icm_addr(&iter), + mlx4_icm_size(&iter)); + err = -EINVAL; + goto out; + } + + for (i = 0; i < mlx4_icm_size(&iter) >> lg; ++i) { + if (virt != -1) { + pages[nent * 2] = cpu_to_be64(virt); + virt += 1 << lg; + } + + pages[nent * 2 + 1] = + cpu_to_be64((mlx4_icm_addr(&iter) + (i << lg)) | + (lg - MLX4_ICM_PAGE_SHIFT)); + ts += 1 << (lg - 10); + ++tc; + + if (++nent == MLX4_MAILBOX_SIZE / 16) { + err = mlx4_cmd(dev, mailbox->dma, nent, 0, op, + MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_NATIVE); + if (err) + goto out; + nent = 0; + } + } + } + + if (nent) + err = mlx4_cmd(dev, mailbox->dma, nent, 0, op, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); + if (err) + goto out; + + switch (op) { + case MLX4_CMD_MAP_FA: + mlx4_dbg(dev, "Mapped %d chunks/%d KB for FW.\n", tc, ts); + break; + case MLX4_CMD_MAP_ICM_AUX: + mlx4_dbg(dev, "Mapped %d chunks/%d KB for ICM aux.\n", tc, ts); + break; + case MLX4_CMD_MAP_ICM: + mlx4_dbg(dev, "Mapped %d chunks/%d KB at %llx for ICM.\n", + tc, ts, (unsigned long long) virt - (ts << 10)); + break; + } + +out: + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_MAP_FA(struct mlx4_dev *dev, struct mlx4_icm *icm) +{ + return mlx4_map_cmd(dev, MLX4_CMD_MAP_FA, icm, -1); +} + +int mlx4_UNMAP_FA(struct mlx4_dev *dev) +{ + return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_FA, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); +} + + +int mlx4_RUN_FW(struct mlx4_dev *dev) +{ + return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_RUN_FW, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); +} + +int mlx4_QUERY_FW(struct mlx4_dev *dev) +{ + struct mlx4_fw *fw = &mlx4_priv(dev)->fw; + struct mlx4_cmd *cmd = &mlx4_priv(dev)->cmd; + struct mlx4_cmd_mailbox *mailbox; + u32 *outbox; + int err = 0; + u64 fw_ver; + u16 cmd_if_rev; + u8 lg; + +#define QUERY_FW_OUT_SIZE 0x100 +#define QUERY_FW_VER_OFFSET 0x00 +#define QUERY_FW_PPF_ID 0x09 +#define QUERY_FW_CMD_IF_REV_OFFSET 0x0a +#define QUERY_FW_MAX_CMD_OFFSET 0x0f +#define QUERY_FW_ERR_START_OFFSET 0x30 +#define QUERY_FW_ERR_SIZE_OFFSET 0x38 +#define QUERY_FW_ERR_BAR_OFFSET 0x3c + +#define QUERY_FW_SIZE_OFFSET 0x00 +#define QUERY_FW_CLR_INT_BASE_OFFSET 0x20 +#define QUERY_FW_CLR_INT_BAR_OFFSET 0x28 + +#define QUERY_FW_COMM_BASE_OFFSET 0x40 +#define QUERY_FW_COMM_BAR_OFFSET 0x48 + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + outbox = mailbox->buf; + + err = mlx4_cmd_box(dev, 0, mailbox->dma, 0, 0, MLX4_CMD_QUERY_FW, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + if (err) + goto out; + + MLX4_GET(fw_ver, outbox, QUERY_FW_VER_OFFSET); + /* + * FW subminor version is at more significant bits than minor + * version, so swap here. + */ + dev->caps.fw_ver = (fw_ver & 0xffff00000000ull) | + ((fw_ver & 0xffff0000ull) >> 16) | + ((fw_ver & 0x0000ffffull) << 16); + + if (mlx4_is_slave(dev)) + return 0; + + MLX4_GET(lg, outbox, QUERY_FW_PPF_ID); + dev->caps.function = lg; + + MLX4_GET(cmd_if_rev, outbox, QUERY_FW_CMD_IF_REV_OFFSET); + if (cmd_if_rev < MLX4_COMMAND_INTERFACE_MIN_REV || + cmd_if_rev > MLX4_COMMAND_INTERFACE_MAX_REV) { + mlx4_err(dev, "Installed FW has unsupported " + "command interface revision %d.\n", + cmd_if_rev); + mlx4_err(dev, "(Installed FW version is %d.%d.%03d)\n", + (int) (dev->caps.fw_ver >> 32), + (int) (dev->caps.fw_ver >> 16) & 0xffff, + (int) dev->caps.fw_ver & 0xffff); + mlx4_err(dev, "This driver version supports only revisions %d to %d.\n", + MLX4_COMMAND_INTERFACE_MIN_REV, MLX4_COMMAND_INTERFACE_MAX_REV); + err = -ENODEV; + goto out; + } + + if (cmd_if_rev < MLX4_COMMAND_INTERFACE_NEW_PORT_CMDS) + dev->flags |= MLX4_FLAG_OLD_PORT_CMDS; + + MLX4_GET(lg, outbox, QUERY_FW_MAX_CMD_OFFSET); + cmd->max_cmds = 1 << lg; + + mlx4_dbg(dev, "FW version %d.%d.%03d (cmd intf rev %d), max commands %d\n", + (int) (dev->caps.fw_ver >> 32), + (int) (dev->caps.fw_ver >> 16) & 0xffff, + (int) dev->caps.fw_ver & 0xffff, + cmd_if_rev, cmd->max_cmds); + + MLX4_GET(fw->catas_offset, outbox, QUERY_FW_ERR_START_OFFSET); + MLX4_GET(fw->catas_size, outbox, QUERY_FW_ERR_SIZE_OFFSET); + MLX4_GET(fw->catas_bar, outbox, QUERY_FW_ERR_BAR_OFFSET); + fw->catas_bar = (fw->catas_bar >> 6) * 2; + + mlx4_dbg(dev, "Catastrophic error buffer at 0x%llx, size 0x%x, BAR %d\n", + (unsigned long long) fw->catas_offset, fw->catas_size, fw->catas_bar); + + MLX4_GET(fw->fw_pages, outbox, QUERY_FW_SIZE_OFFSET); + MLX4_GET(fw->clr_int_base, outbox, QUERY_FW_CLR_INT_BASE_OFFSET); + MLX4_GET(fw->clr_int_bar, outbox, QUERY_FW_CLR_INT_BAR_OFFSET); + fw->clr_int_bar = (fw->clr_int_bar >> 6) * 2; + + MLX4_GET(fw->comm_base, outbox, QUERY_FW_COMM_BASE_OFFSET); + MLX4_GET(fw->comm_bar, outbox, QUERY_FW_COMM_BAR_OFFSET); + fw->comm_bar = (fw->comm_bar >> 6) * 2; + mlx4_dbg(dev, "Communication vector bar:%d offset:0x%llx\n", + fw->comm_bar, fw->comm_base); + mlx4_dbg(dev, "FW size %d KB\n", fw->fw_pages >> 2); + + /* + * Round up number of system pages needed in case + * MLX4_ICM_PAGE_SIZE < PAGE_SIZE. + */ + fw->fw_pages = + ALIGN(fw->fw_pages, PAGE_SIZE / MLX4_ICM_PAGE_SIZE) >> + (PAGE_SHIFT - MLX4_ICM_PAGE_SHIFT); + + mlx4_dbg(dev, "Clear int @ %llx, BAR %d\n", + (unsigned long long) fw->clr_int_base, fw->clr_int_bar); + +out: + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_QUERY_FW_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + u8 *outbuf; + int err; + + outbuf = outbox->buf; + err = mlx4_cmd_box(dev, 0, outbox->dma, 0, 0, MLX4_CMD_QUERY_FW, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + if (err) + return err; + + /* for slaves, zero out everything except FW version */ + outbuf[0] = outbuf[1] = 0; + memset(&outbuf[8], 0, QUERY_FW_OUT_SIZE - 8); + return 0; +} + +static void get_board_id(void *vsd, char *board_id) +{ + int i; + +#define VSD_OFFSET_SIG1 0x00 +#define VSD_OFFSET_SIG2 0xde +#define VSD_OFFSET_MLX_BOARD_ID 0xd0 +#define VSD_OFFSET_TS_BOARD_ID 0x20 + +#define VSD_SIGNATURE_TOPSPIN 0x5ad + + memset(board_id, 0, MLX4_BOARD_ID_LEN); + + if (be16_to_cpup(vsd + VSD_OFFSET_SIG1) == VSD_SIGNATURE_TOPSPIN && + be16_to_cpup(vsd + VSD_OFFSET_SIG2) == VSD_SIGNATURE_TOPSPIN) { + strlcpy(board_id, vsd + VSD_OFFSET_TS_BOARD_ID, MLX4_BOARD_ID_LEN); + } else { + /* + * The board ID is a string but the firmware byte + * swaps each 4-byte word before passing it back to + * us. Therefore we need to swab it before printing. + */ + for (i = 0; i < 4; ++i) + ((u32 *) board_id)[i] = + swab32(*(u32 *) (vsd + VSD_OFFSET_MLX_BOARD_ID + i * 4)); + } +} + +int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter) +{ + struct mlx4_cmd_mailbox *mailbox; + u32 *outbox; + int err; + +#define QUERY_ADAPTER_OUT_SIZE 0x100 +#define QUERY_ADAPTER_INTA_PIN_OFFSET 0x10 +#define QUERY_ADAPTER_VSD_OFFSET 0x20 + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + outbox = mailbox->buf; + + err = mlx4_cmd_box(dev, 0, mailbox->dma, 0, 0, MLX4_CMD_QUERY_ADAPTER, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + if (err) + goto out; + + MLX4_GET(adapter->inta_pin, outbox, QUERY_ADAPTER_INTA_PIN_OFFSET); + + get_board_id(outbox + QUERY_ADAPTER_VSD_OFFSET / 4, + adapter->board_id); + +out: + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param) +{ + struct mlx4_cmd_mailbox *mailbox; + __be32 *inbox; + int err; + +#define INIT_HCA_IN_SIZE 0x200 +#define INIT_HCA_VERSION_OFFSET 0x000 +#define INIT_HCA_VERSION 2 +#define INIT_HCA_CACHELINE_SZ_OFFSET 0x0e +#define INIT_HCA_FLAGS_OFFSET 0x014 +#define INIT_HCA_QPC_OFFSET 0x020 +#define INIT_HCA_EQE_CQE_OFFSETS (INIT_HCA_QPC_OFFSET + 0x38) +#define INIT_HCA_QPC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x10) +#define INIT_HCA_LOG_QP_OFFSET (INIT_HCA_QPC_OFFSET + 0x17) +#define INIT_HCA_SRQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x28) +#define INIT_HCA_LOG_SRQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x2f) +#define INIT_HCA_CQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x30) +#define INIT_HCA_LOG_CQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x37) +#define INIT_HCA_EQE_CQE_OFFSETS (INIT_HCA_QPC_OFFSET + 0x38) +#define INIT_HCA_ALTC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x40) +#define INIT_HCA_AUXC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x50) +#define INIT_HCA_EQC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x60) +#define INIT_HCA_LOG_EQ_OFFSET (INIT_HCA_QPC_OFFSET + 0x67) +#define INIT_HCA_RDMARC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x70) +#define INIT_HCA_LOG_RD_OFFSET (INIT_HCA_QPC_OFFSET + 0x77) +#define INIT_HCA_MCAST_OFFSET 0x0c0 +#define INIT_HCA_MC_BASE_OFFSET (INIT_HCA_MCAST_OFFSET + 0x00) +#define INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x12) +#define INIT_HCA_LOG_MC_HASH_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x16) +#define INIT_HCA_UC_STEERING_OFFSET (INIT_HCA_MCAST_OFFSET + 0x18) +#define INIT_HCA_LOG_MC_TABLE_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x1b) +#define INIT_HCA_TPT_OFFSET 0x0f0 +#define INIT_HCA_DMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x00) +#define INIT_HCA_LOG_MPT_SZ_OFFSET (INIT_HCA_TPT_OFFSET + 0x0b) +#define INIT_HCA_MTT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x10) +#define INIT_HCA_CMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x18) +#define INIT_HCA_UAR_OFFSET 0x120 +#define INIT_HCA_LOG_UAR_SZ_OFFSET (INIT_HCA_UAR_OFFSET + 0x0a) +#define INIT_HCA_UAR_PAGE_SZ_OFFSET (INIT_HCA_UAR_OFFSET + 0x0b) + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + inbox = mailbox->buf; + + memset(inbox, 0, INIT_HCA_IN_SIZE); + + *((u8 *) mailbox->buf + INIT_HCA_VERSION_OFFSET) = INIT_HCA_VERSION; + +// TODO: Review the following code +#ifdef __VMKERNEL_MODULE__ +#if defined(__x86_64__) || defined(__PPC64__) + #define INIT_HCA_X86_64_BYTE_CACHELINE_SZ 0x40 + *((u8 *) mailbox->buf + INIT_HCA_CACHELINE_SZ_OFFSET) = INIT_HCA_X86_64_BYTE_CACHELINE_SZ; +#endif +#else + *((u8 *) mailbox->buf + INIT_HCA_CACHELINE_SZ_OFFSET) = + (ilog2(cache_line_size()) - 4) << 5; +#endif /* __VMKENEL_MODULE__ */ + +#if defined(__LITTLE_ENDIAN) + *(inbox + INIT_HCA_FLAGS_OFFSET / 4) &= ~cpu_to_be32(1 << 1); +#elif defined(__BIG_ENDIAN) + *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 1); +#else +#error Host endianness not defined +#endif + /* Check port for UD address vector: */ + *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1); + + /* Enable IPoIB checksumming if we can: */ + if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) + *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 3); + + /* Enable QoS support if module parameter set */ + if (enable_qos) + *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 2); + + /* enable counters */ + if (dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS) + *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 << 4); + + /* QPC/EEC/CQC/EQC/RDMARC attributes */ + if (dev->caps.cqe_size == 64) + *(inbox + INIT_HCA_EQE_CQE_OFFSETS / 4) |= cpu_to_be32(1 << 30); + + MLX4_PUT(inbox, param->qpc_base, INIT_HCA_QPC_BASE_OFFSET); + MLX4_PUT(inbox, param->log_num_qps, INIT_HCA_LOG_QP_OFFSET); + MLX4_PUT(inbox, param->srqc_base, INIT_HCA_SRQC_BASE_OFFSET); + MLX4_PUT(inbox, param->log_num_srqs, INIT_HCA_LOG_SRQ_OFFSET); + MLX4_PUT(inbox, param->cqc_base, INIT_HCA_CQC_BASE_OFFSET); + MLX4_PUT(inbox, param->log_num_cqs, INIT_HCA_LOG_CQ_OFFSET); + MLX4_PUT(inbox, param->altc_base, INIT_HCA_ALTC_BASE_OFFSET); + MLX4_PUT(inbox, param->auxc_base, INIT_HCA_AUXC_BASE_OFFSET); + MLX4_PUT(inbox, param->eqc_base, INIT_HCA_EQC_BASE_OFFSET); + MLX4_PUT(inbox, param->log_num_eqs, INIT_HCA_LOG_EQ_OFFSET); + MLX4_PUT(inbox, param->rdmarc_base, INIT_HCA_RDMARC_BASE_OFFSET); + MLX4_PUT(inbox, param->log_rd_per_qp, INIT_HCA_LOG_RD_OFFSET); + + /* multicast attributes */ + + MLX4_PUT(inbox, param->mc_base, INIT_HCA_MC_BASE_OFFSET); + MLX4_PUT(inbox, param->log_mc_entry_sz, INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET); + MLX4_PUT(inbox, param->log_mc_hash_sz, INIT_HCA_LOG_MC_HASH_SZ_OFFSET); + if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) + MLX4_PUT(inbox, (u8) (1 << 3), INIT_HCA_UC_STEERING_OFFSET); + MLX4_PUT(inbox, param->log_mc_table_sz, INIT_HCA_LOG_MC_TABLE_SZ_OFFSET); + + /* TPT attributes */ + + MLX4_PUT(inbox, param->dmpt_base, INIT_HCA_DMPT_BASE_OFFSET); + MLX4_PUT(inbox, param->log_mpt_sz, INIT_HCA_LOG_MPT_SZ_OFFSET); + MLX4_PUT(inbox, param->mtt_base, INIT_HCA_MTT_BASE_OFFSET); + MLX4_PUT(inbox, param->cmpt_base, INIT_HCA_CMPT_BASE_OFFSET); + + /* UAR attributes */ + + MLX4_PUT(inbox, param->uar_page_sz, INIT_HCA_UAR_PAGE_SZ_OFFSET); + MLX4_PUT(inbox, param->log_uar_sz, INIT_HCA_LOG_UAR_SZ_OFFSET); + + err = mlx4_cmd(dev, mailbox->dma, 0, 0, MLX4_CMD_INIT_HCA, 10000, + MLX4_CMD_NATIVE); + + if (err) + mlx4_err(dev, "INIT_HCA returns %d\n", err); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_QUERY_HCA(struct mlx4_dev *dev, + struct mlx4_init_hca_param *param) +{ + struct mlx4_cmd_mailbox *mailbox; + __be32 *outbox; + int err; + +#define QUERY_HCA_GLOBAL_CAPS_OFFSET 0x04 + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + outbox = mailbox->buf; + + err = mlx4_cmd_box(dev, 0, mailbox->dma, 0, 0, + MLX4_CMD_QUERY_HCA, + MLX4_CMD_TIME_CLASS_B, + !mlx4_is_slave(dev)); + if (err) + goto out; + + MLX4_GET(param->global_caps, outbox, QUERY_HCA_GLOBAL_CAPS_OFFSET); + + /* QPC/EEC/CQC/EQC/RDMARC attributes */ + + MLX4_GET(param->qpc_base, outbox, INIT_HCA_QPC_BASE_OFFSET); + MLX4_GET(param->log_num_qps, outbox, INIT_HCA_LOG_QP_OFFSET); + MLX4_GET(param->srqc_base, outbox, INIT_HCA_SRQC_BASE_OFFSET); + MLX4_GET(param->log_num_srqs, outbox, INIT_HCA_LOG_SRQ_OFFSET); + MLX4_GET(param->cqc_base, outbox, INIT_HCA_CQC_BASE_OFFSET); + MLX4_GET(param->log_num_cqs, outbox, INIT_HCA_LOG_CQ_OFFSET); + MLX4_GET(param->altc_base, outbox, INIT_HCA_ALTC_BASE_OFFSET); + MLX4_GET(param->auxc_base, outbox, INIT_HCA_AUXC_BASE_OFFSET); + MLX4_GET(param->eqc_base, outbox, INIT_HCA_EQC_BASE_OFFSET); + MLX4_GET(param->log_num_eqs, outbox, INIT_HCA_LOG_EQ_OFFSET); + MLX4_GET(param->rdmarc_base, outbox, INIT_HCA_RDMARC_BASE_OFFSET); + MLX4_GET(param->log_rd_per_qp, outbox, INIT_HCA_LOG_RD_OFFSET); + + /* multicast attributes */ + + MLX4_GET(param->mc_base, outbox, INIT_HCA_MC_BASE_OFFSET); + MLX4_GET(param->log_mc_entry_sz, outbox, + INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET); + MLX4_GET(param->log_mc_hash_sz, outbox, + INIT_HCA_LOG_MC_HASH_SZ_OFFSET); + MLX4_GET(param->log_mc_table_sz, outbox, + INIT_HCA_LOG_MC_TABLE_SZ_OFFSET); + + /* TPT attributes */ + + MLX4_GET(param->dmpt_base, outbox, INIT_HCA_DMPT_BASE_OFFSET); + MLX4_GET(param->log_mpt_sz, outbox, INIT_HCA_LOG_MPT_SZ_OFFSET); + MLX4_GET(param->mtt_base, outbox, INIT_HCA_MTT_BASE_OFFSET); + MLX4_GET(param->cmpt_base, outbox, INIT_HCA_CMPT_BASE_OFFSET); + + /* UAR attributes */ + + MLX4_GET(param->uar_page_sz, outbox, INIT_HCA_UAR_PAGE_SZ_OFFSET); + MLX4_GET(param->log_uar_sz, outbox, INIT_HCA_LOG_UAR_SZ_OFFSET); + +out: + mlx4_free_cmd_mailbox(dev, mailbox); + + return err; +} + +int mlx4_INIT_PORT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int port = vhcr->in_modifier; + int err; + + if (priv->mfunc.master.slave_state[slave].init_port_mask & (1 << port)) + return 0; + + /* Enable port only if it was previously disabled */ + if (!priv->mfunc.master.init_port_ref[port]) { + err = mlx4_cmd(dev, 0, port, 0, MLX4_CMD_INIT_PORT, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + if (err) + return err; + } + priv->mfunc.master.slave_state[slave].init_port_mask |= + (1 << port); + ++priv->mfunc.master.init_port_ref[port]; + return 0; +} + +int mlx4_INIT_PORT(struct mlx4_dev *dev, int port) +{ + struct mlx4_cmd_mailbox *mailbox; + u32 *inbox; + int err; + u32 flags; + u16 field; + + if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { +#define INIT_PORT_IN_SIZE 256 +#define INIT_PORT_FLAGS_OFFSET 0x00 +#define INIT_PORT_FLAG_SIG (1 << 18) +#define INIT_PORT_FLAG_NG (1 << 17) +#define INIT_PORT_FLAG_G0 (1 << 16) +#define INIT_PORT_VL_SHIFT 4 +#define INIT_PORT_PORT_WIDTH_SHIFT 8 +#define INIT_PORT_MTU_OFFSET 0x04 +#define INIT_PORT_MAX_GID_OFFSET 0x06 +#define INIT_PORT_MAX_PKEY_OFFSET 0x0a +#define INIT_PORT_GUID0_OFFSET 0x10 +#define INIT_PORT_NODE_GUID_OFFSET 0x18 +#define INIT_PORT_SI_GUID_OFFSET 0x20 + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + inbox = mailbox->buf; + + memset(inbox, 0, INIT_PORT_IN_SIZE); + + flags = 0; + flags |= (dev->caps.vl_cap[port] & 0xf) << INIT_PORT_VL_SHIFT; + flags |= (dev->caps.port_width_cap[port] & 0xf) << INIT_PORT_PORT_WIDTH_SHIFT; + MLX4_PUT(inbox, flags, INIT_PORT_FLAGS_OFFSET); + + field = 128 << dev->caps.ib_mtu_cap[port]; + MLX4_PUT(inbox, field, INIT_PORT_MTU_OFFSET); + field = dev->caps.gid_table_len[port]; + MLX4_PUT(inbox, field, INIT_PORT_MAX_GID_OFFSET); + field = dev->caps.pkey_table_len[port]; + MLX4_PUT(inbox, field, INIT_PORT_MAX_PKEY_OFFSET); + + err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_INIT_PORT, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + + mlx4_free_cmd_mailbox(dev, mailbox); + } else + err = mlx4_cmd(dev, 0, port, 0, MLX4_CMD_INIT_PORT, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + + return err; +} +EXPORT_SYMBOL_GPL(mlx4_INIT_PORT); + +int mlx4_CLOSE_PORT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int port = vhcr->in_modifier; + int err; + + if (!(priv->mfunc.master.slave_state[slave].init_port_mask & + (1 << port))) + return 0; + + if (priv->mfunc.master.init_port_ref[port] == 1) { + err = mlx4_cmd(dev, 0, port, 0, MLX4_CMD_CLOSE_PORT, 1000, + MLX4_CMD_NATIVE); + if (err) + return err; + } + priv->mfunc.master.slave_state[slave].init_port_mask &= ~(1 << port); + --priv->mfunc.master.init_port_ref[port]; + return 0; +} + +int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port) +{ + return mlx4_cmd(dev, 0, port, 0, MLX4_CMD_CLOSE_PORT, 1000, + MLX4_CMD_WRAPPED); +} +EXPORT_SYMBOL_GPL(mlx4_CLOSE_PORT); + +int mlx4_CLOSE_HCA(struct mlx4_dev *dev, int panic) +{ + return mlx4_cmd(dev, 0, 0, panic, MLX4_CMD_CLOSE_HCA, 1000, + MLX4_CMD_NATIVE); +} + +int mlx4_SET_ICM_SIZE(struct mlx4_dev *dev, u64 icm_size, u64 *aux_pages) +{ + int ret = mlx4_cmd_imm(dev, icm_size, aux_pages, 0, 0, + MLX4_CMD_SET_ICM_SIZE, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + if (ret) + return ret; + + /* + * Round up number of system pages needed in case + * MLX4_ICM_PAGE_SIZE < PAGE_SIZE. + */ + *aux_pages = ALIGN(*aux_pages, PAGE_SIZE / MLX4_ICM_PAGE_SIZE) >> + (PAGE_SHIFT - MLX4_ICM_PAGE_SHIFT); + + return 0; +} + +int mlx4_NOP(struct mlx4_dev *dev) +{ + /* Input modifier of 0x1f means "finish as soon as possible." */ + return mlx4_cmd(dev, 0, 0x1f, 0, MLX4_CMD_NOP, 100, MLX4_CMD_NATIVE); +} + +#define MLX4_WOL_SETUP_MODE (5 << 28) +int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port) +{ + u32 in_mod = MLX4_WOL_SETUP_MODE | port << 8; + + return mlx4_cmd_imm(dev, 0, config, in_mod, 0x3, + MLX4_CMD_MOD_STAT_CFG, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); +} +EXPORT_SYMBOL_GPL(mlx4_wol_read); + +int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port) +{ + u32 in_mod = MLX4_WOL_SETUP_MODE | port << 8; + + return mlx4_cmd(dev, config, in_mod, 0x1, MLX4_CMD_MOD_STAT_CFG, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); +} +EXPORT_SYMBOL_GPL(mlx4_wol_write); diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/fw.h b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/fw.h new file mode 100755 index 0000000..46ad13a --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/fw.h @@ -0,0 +1,198 @@ +/* + * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_FW_H +#define MLX4_FW_H + +#include "mlx4.h" +#include "icm.h" + +struct mlx4_mod_stat_cfg { + u8 log_pg_sz; + u8 log_pg_sz_m; +}; + +struct mlx4_dev_cap { + int max_srq_sz; + int max_qp_sz; + int reserved_qps; + int max_qps; + int reserved_srqs; + int max_srqs; + int max_cq_sz; + int reserved_cqs; + int max_cqs; + int max_mpts; + int reserved_eqs; + int max_eqs; + int reserved_mtts; + int max_mrw_sz; + int reserved_mrws; + int max_mtt_seg; + int max_requester_per_qp; + int max_responder_per_qp; + int max_rdma_global; + int local_ca_ack_delay; + int num_ports; + u32 max_msg_sz; + int ib_mtu[MLX4_MAX_PORTS + 1]; + int max_port_width[MLX4_MAX_PORTS + 1]; + int max_vl[MLX4_MAX_PORTS + 1]; + int max_gids[MLX4_MAX_PORTS + 1]; + int max_pkeys[MLX4_MAX_PORTS + 1]; + u64 def_mac[MLX4_MAX_PORTS + 1]; + u16 eth_mtu[MLX4_MAX_PORTS + 1]; + int trans_type[MLX4_MAX_PORTS + 1]; + int vendor_oui[MLX4_MAX_PORTS + 1]; + u16 wavelength[MLX4_MAX_PORTS + 1]; + u64 trans_code[MLX4_MAX_PORTS + 1]; + u16 stat_rate_support; + u64 flags; + int reserved_uars; + int uar_size; + int min_page_sz; + int bf_reg_size; + int bf_regs_per_page; + int max_sq_sg; + int max_sq_desc_sz; + int max_rq_sg; + int max_rq_desc_sz; + int max_qp_per_mcg; + int reserved_mgms; + int max_mcgs; + int reserved_pds; + int max_pds; + int reserved_xrcds; + int max_xrcds; + int qpc_entry_sz; + int rdmarc_entry_sz; + int altc_entry_sz; + int aux_entry_sz; + int srq_entry_sz; + int cqc_entry_sz; + int eqc_entry_sz; + int dmpt_entry_sz; + int cmpt_entry_sz; + int mtt_entry_sz; + int resize_srq; + u32 bmme_flags; + u32 reserved_lkey; + u64 max_icm_sz; + int max_gso_sz; + u8 supported_port_types[MLX4_MAX_PORTS + 1]; +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + u8 suggested_type[MLX4_MAX_PORTS + 1]; + u8 default_sense[MLX4_MAX_PORTS + 1]; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + u8 log_max_macs[MLX4_MAX_PORTS + 1]; + u8 log_max_vlans[MLX4_MAX_PORTS + 1]; + u32 max_counters; +}; + +struct mlx4_func_cap { + u8 num_ports; + u8 flags; + u32 pf_context_behaviour; + int qp_quota; + int cq_quota; + int srq_quota; + int mpt_quota; + int mtt_quota; + int max_eq; + int reserved_eq; + int mcg_quota; + u32 base_qpn; + u32 base_tunnel_qpn; + u32 base_proxy_qpn; + u8 physical_port[MLX4_MAX_PORTS + 1]; + u8 port_flags[MLX4_MAX_PORTS + 1]; +}; + +struct mlx4_adapter { + char board_id[MLX4_BOARD_ID_LEN]; + u8 inta_pin; +}; + +struct mlx4_init_hca_param { + u64 qpc_base; + u64 rdmarc_base; + u64 auxc_base; + u64 altc_base; + u64 srqc_base; + u64 cqc_base; + u64 eqc_base; + u64 mc_base; + u64 dmpt_base; + u64 cmpt_base; + u64 mtt_base; + u64 global_caps; + u16 log_mc_entry_sz; + u16 log_mc_hash_sz; + u8 log_num_qps; + u8 log_num_srqs; + u8 log_num_cqs; + u8 log_num_eqs; + u8 log_rd_per_qp; + u8 log_mc_table_sz; + u8 log_mpt_sz; + u8 log_uar_sz; + u8 uar_page_sz; /* log pg sz in 4k chunks */ +}; + +struct mlx4_init_ib_param { + int port_width; + int vl_cap; + int mtu_cap; + u16 gid_cap; + u16 pkey_cap; + int set_guid0; + u64 guid0; + int set_node_guid; + u64 node_guid; + int set_si_guid; + u64 si_guid; +}; + +struct mlx4_set_ib_param { + int set_si_guid; + int reset_qkey_viol; + u64 si_guid; + u32 cap_mask; +}; + +int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap); +int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, struct mlx4_func_cap *func_cap); +int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_MAP_FA(struct mlx4_dev *dev, struct mlx4_icm *icm); +int mlx4_UNMAP_FA(struct mlx4_dev *dev); +int mlx4_RUN_FW(struct mlx4_dev *dev); +int mlx4_QUERY_FW(struct mlx4_dev *dev); +int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter); +int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param); +int mlx4_QUERY_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param); +int mlx4_CLOSE_HCA(struct mlx4_dev *dev, int panic); +int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt); +int mlx4_SET_ICM_SIZE(struct mlx4_dev *dev, u64 icm_size, u64 *aux_pages); +int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm); +int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev); +int mlx4_NOP(struct mlx4_dev *dev); +int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg); + +#endif /* MLX4_FW_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/icm.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/icm.c new file mode 100755 index 0000000..067a228 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/icm.c @@ -0,0 +1,635 @@ +/* + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include + +#include + +#include "mlx4.h" +#include "icm.h" +#include "fw.h" + +/* + * We allocate in as big chunks as we can, up to a maximum of 256 KB + * per chunk. + */ +enum { + MLX4_ICM_ALLOC_SIZE = 1 << 18, + MLX4_TABLE_CHUNK_SIZE = 1 << 18 +}; + +static void mlx4_free_icm_pages(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk) +{ + int i; +#ifdef __VMKERNEL_MODULE__ + struct scatterlist * sg; + struct scatterlist * mem = &(chunk->mem); +#endif /* __VMKERNEL_MODULE__ */ + + if (chunk->nsg > 0) +#ifdef __VMKERNEL_MODULE__ + pci_unmap_sg(dev->pdev, mem, chunk->npages, + PCI_DMA_BIDIRECTIONAL); +#else + pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages, + PCI_DMA_BIDIRECTIONAL); +#endif /* __VMKERNEL_MODULE__ */ + +#ifdef __VMKERNEL_MODULE__ + sg_reset(mem); + for_each_sg(mem , sg , chunk->npages, i) { + __free_pages(sg_page(mem), + get_order(MLNX_CURSGEL_LENGTH(mem))); + } + kfree(MLNX_VMKSGEL(mem)); + VMKLNX_INIT_VMK_SG(mem, NULL); +#else + for (i = 0; i < chunk->npages; ++i) + __free_pages(sg_page(&chunk->mem[i]), + get_order(chunk->mem[i].length)); +#endif /* __VMKERNEL_MODULE__ */ +} + +static void mlx4_free_icm_coherent(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk) +{ + int i; +#ifdef __VMKERNEL_MODULE__ + struct scatterlist * sg; + struct scatterlist * mem = &(chunk->mem); + + sg_reset(mem); + for_each_sg(mem ,sg ,MLNX_VMKSGA_NUMELEM(mem), i) { + dma_free_coherent(&dev->pdev->dev, MLNX_CURSGEL_LENGTH(mem), + chunk->sg_virt_addr[i], + sg_dma_address(mem)); + } + + kfree(MLNX_VMKSGA(mem)); + kfree(MLNX_VMKIOSGA(mem)); + VMKLNX_INIT_VMK_SG(mem, NULL); +#else + for (i = 0; i < chunk->npages; ++i) + dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length, + lowmem_page_address(sg_page(&chunk->mem[i])), + sg_dma_address(&chunk->mem[i])); +#endif /* __VMKERNEL_MODULE__ */ +} + +void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent) +{ + struct mlx4_icm_chunk *chunk, *tmp; + + if (!icm) + return; + + list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) { + if (coherent) + mlx4_free_icm_coherent(dev, chunk); + else + mlx4_free_icm_pages(dev, chunk); + + kfree(chunk); + } + + kfree(icm); +} + +static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask) +{ + struct page *page; +#ifdef __VMKERNEL_MODULE__ + vmk_sgelem *sgel; +#endif /* __VMKERNEL_MODULE__ */ + + page = alloc_pages(gfp_mask, order); + if (!page) + return -ENOMEM; + +#ifdef __VMKERNEL_MODULE__ + if (MLNX_CURSGEL(mem)) { + sg_next(mem); + } else { + if (mlx4_alloc_sgel(&sgel, gfp_mask)) { + __free_pages(page, order); + return -ENOMEM; + } + VMKLNX_INIT_VMK_SG(mem, sgel); + } +#endif /* __VMKERNEL_MODULE__ */ + + sg_set_page(mem, page, PAGE_SIZE << order, 0); + return 0; +} + +#ifdef __VMKERNEL_MODULE__ +static int mlx4_alloc_icm_coherent(struct device *dev, void **sg_virt_addr, struct scatterlist *mem, + int order, gfp_t gfp_mask) +#else +static int mlx4_alloc_icm_coherent(struct device *dev, struct scatterlist *mem, + int order, gfp_t gfp_mask) +#endif /* __VMKERNEL_MODULE__ */ +{ +#ifdef __VMKERNEL_MODULE__ + vmk_SgArray *sga = NULL, *IOsga = NULL; + dma_addr_t ioAddr; + int rc = 0; + + if (MLNX_CURSGEL(mem)) { + sg_next(mem); + } else { + rc = mlx4_alloc_sga(&sga, gfp_mask); + rc += mlx4_alloc_sga(&IOsga, gfp_mask); + if (rc) { + /* kfree accepts NULL ptrs, its O.K.for now */ + kfree(sga); + kfree(IOsga); + return -ENOMEM; + } + VMKLNX_INIT_VMK_SG_WITH_ARRAYS(mem, sga ,IOsga); + } +#endif /* __VMKERNEL_MODULE__ */ + +#ifdef __VMKERNEL_MODULE__ + void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order, + &ioAddr, gfp_mask); +#else + void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order, + &sg_dma_address(mem), gfp_mask); +#endif /* __VMKERNEL_MODULE__ */ + if (!buf) + return -ENOMEM; + + sg_set_buf(mem, buf, PAGE_SIZE << order); +#ifdef __VMKERNEL_MODULE__ + MLNX_CURIOSGEL_IOADDR(mem) = ioAddr; + MLNX_CURIOSGEL_LENGTH(mem) = PAGE_SIZE << order; + MLNX_VMKSGA_NUMELEM(mem)++; + MLNX_VMKIOSGA_NUMELEM(mem)++; + /* Save the original virtual address */ + *sg_virt_addr = buf; +#else + BUG_ON(mem->offset); + sg_dma_len(mem) = PAGE_SIZE << order; +#endif /* __VMKERNEL_MODULE__ */ + return 0; +} + +#ifdef __VMKERNEL_MODULE__ +struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages, + gfp_t gfp_mask, int coherent) +{ + struct mlx4_icm *icm; + struct mlx4_icm_chunk *chunk = NULL; + int cur_order; + int ret; + struct scatterlist *mem = NULL; + + /* We use sg_set_buf for coherent allocs, which assumes low memory */ + BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM)); + + icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); + if (!icm) + return NULL; + + icm->refcount = 0; + INIT_LIST_HEAD(&icm->chunk_list); + + cur_order = get_order(MLX4_ICM_ALLOC_SIZE); + + while (npages > 0) { + if (!chunk) { + chunk = kmalloc(sizeof *chunk, + gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); + if (!chunk) + goto fail; + + chunk->npages = 0; + chunk->nsg = 0; + mem = &(chunk->mem); + VMKLNX_INIT_VMK_SG(mem , NULL); + list_add_tail(&chunk->list, &icm->chunk_list); + } + + while (1 << cur_order > npages) + --cur_order; + + if (coherent) + ret = mlx4_alloc_icm_coherent(&dev->pdev->dev, + &(chunk->sg_virt_addr[chunk->npages]), + mem, cur_order, gfp_mask); + else + ret = mlx4_alloc_icm_pages(mem, cur_order, gfp_mask); + if (!ret) { + ++chunk->npages; + + if (chunk->npages == MLX4_ICM_CHUNK_LEN) { + /*This is also correct if coherent*/ + chunk->nsg = pci_map_sg(dev->pdev, mem, + chunk->npages, + PCI_DMA_BIDIRECTIONAL); + + if (chunk->nsg <= 0) + goto fail; + + chunk = NULL; + } + + npages -= 1 << cur_order; + } else { + --cur_order; + if (cur_order < 0) + goto fail; + } + } + + if (!coherent && chunk) { + chunk->nsg = pci_map_sg(dev->pdev, mem, + chunk->npages, + PCI_DMA_BIDIRECTIONAL); + if (chunk->nsg <= 0) + goto fail; + } + + return icm; + +fail: + mlx4_free_icm(dev, icm, coherent); + return NULL; +} +#else +struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages, + gfp_t gfp_mask, int coherent) +{ + struct mlx4_icm *icm; + struct mlx4_icm_chunk *chunk = NULL; + int cur_order; + int ret; + + /* We use sg_set_buf for coherent allocs, which assumes low memory */ + BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM)); + + icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); + if (!icm) + return NULL; + + icm->refcount = 0; + INIT_LIST_HEAD(&icm->chunk_list); + + cur_order = get_order(MLX4_ICM_ALLOC_SIZE); + + while (npages > 0) { + if (!chunk) { + chunk = kmalloc(sizeof *chunk, + gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); + if (!chunk) + goto fail; + + sg_init_table(chunk->mem, MLX4_ICM_CHUNK_LEN); + chunk->npages = 0; + chunk->nsg = 0; + list_add_tail(&chunk->list, &icm->chunk_list); + } + + while (1 << cur_order > npages) + --cur_order; + + if (coherent) + ret = mlx4_alloc_icm_coherent(&dev->pdev->dev, + &chunk->mem[chunk->npages], + cur_order, gfp_mask); + else + ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages], + cur_order, gfp_mask); + + if (ret) { + if (--cur_order < 0) + goto fail; + else + continue; + } + + ++chunk->npages; + + if (coherent) + ++chunk->nsg; + else if (chunk->npages == MLX4_ICM_CHUNK_LEN) { + chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, + chunk->npages, + PCI_DMA_BIDIRECTIONAL); + + if (chunk->nsg <= 0) + goto fail; + } + + if (chunk->npages == MLX4_ICM_CHUNK_LEN) + chunk = NULL; + + npages -= 1 << cur_order; + } + + if (!coherent && chunk) { + chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, + chunk->npages, + PCI_DMA_BIDIRECTIONAL); + + if (chunk->nsg <= 0) + goto fail; + } + + return icm; + +fail: + mlx4_free_icm(dev, icm, coherent); + return NULL; +} +#endif /* __VMKERNEL_MODULE__ */ + +static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt) +{ + return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt); +} + +static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count) +{ + return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); +} + +int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm) +{ + return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1); +} + +int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev) +{ + return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); +} + +int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj) +{ + int i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size); + int ret = 0; + + mutex_lock(&table->mutex); + + if (table->icm[i]) { + ++table->icm[i]->refcount; + goto out; + } + + table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT, + (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) | + __GFP_NOWARN, table->coherent); + if (!table->icm[i]) { + ret = -ENOMEM; + goto out; + } + + if (mlx4_MAP_ICM(dev, table->icm[i], table->virt + + (u64) i * MLX4_TABLE_CHUNK_SIZE)) { + mlx4_free_icm(dev, table->icm[i], table->coherent); + table->icm[i] = NULL; + ret = -ENOMEM; + goto out; + } + + ++table->icm[i]->refcount; + +out: + mutex_unlock(&table->mutex); + return ret; +} + +void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj) +{ + int i; + + i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size); + + mutex_lock(&table->mutex); + + if (--table->icm[i]->refcount == 0) { + mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE, + MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE); + mlx4_free_icm(dev, table->icm[i], table->coherent); + table->icm[i] = NULL; + } + + mutex_unlock(&table->mutex); +} + +#ifdef __VMKERNEL_MODULE__ +void *mlx4_table_find(struct mlx4_icm_table *table, int obj, dma_addr_t *dma_handle) +{ + int idx, offset, dma_offset, i; + struct mlx4_icm_chunk *chunk; + struct mlx4_icm *icm; + void *address = NULL; + struct scatterlist *sg, *mem; + + if (!table->lowmem) + return NULL; + + mutex_lock(&table->mutex); + idx = (obj & (table->num_obj - 1)) * table->obj_size; + icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE]; + dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE; + + if (!icm) + goto out; + + list_for_each_entry(chunk, &icm->chunk_list, list) { + mem = &(chunk->mem); + sg_reset(mem); + for_each_sg(mem , sg , MLX4_ICM_CHUNK_LEN, i){ + if (dma_handle && dma_offset >= 0) { + if (sg_dma_len(mem) > dma_offset) + *dma_handle = sg_dma_address(mem) + + dma_offset; + dma_offset -= sg_dma_len(mem); + } + /* + * DMA mapping can merge pages but not split them, + * so if we found the page, dma_handle has already + * been assigned to. + */ + if (MLNX_CURSGEL_LENGTH(mem) > offset) { + address = __va(MLNX_CURSGEL_ADDR(mem)); + mutex_unlock(&table->mutex); + return address + offset; + } + offset -= MLNX_CURSGEL_LENGTH(mem); + } + } + +out: + mutex_unlock(&table->mutex); + return NULL; +} +#else +void *mlx4_table_find(struct mlx4_icm_table *table, int obj, dma_addr_t *dma_handle) +{ + int idx, offset, dma_offset, i; + struct mlx4_icm_chunk *chunk; + struct mlx4_icm *icm; + struct page *page = NULL; + + if (!table->lowmem) + return NULL; + + mutex_lock(&table->mutex); + + idx = (obj & (table->num_obj - 1)) * table->obj_size; + icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE]; + dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE; + + if (!icm) + goto out; + + list_for_each_entry(chunk, &icm->chunk_list, list) { + for (i = 0; i < chunk->npages; ++i) { + if (dma_handle && dma_offset >= 0) { + if (sg_dma_len(&chunk->mem[i]) > dma_offset) + *dma_handle = sg_dma_address(&chunk->mem[i]) + + dma_offset; + dma_offset -= sg_dma_len(&chunk->mem[i]); + } + /* + * DMA mapping can merge pages but not split them, + * so if we found the page, dma_handle has already + * been assigned to. + */ + if (chunk->mem[i].length > offset) { + page = sg_page(&chunk->mem[i]); + goto out; + } + offset -= chunk->mem[i].length; + } + } + +out: + mutex_unlock(&table->mutex); + return page ? lowmem_page_address(page) + offset : NULL; +} +#endif /* __VMKERNEL_MODULE__ */ + +int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table, + int start, int end) +{ + int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size; + int i, err; + + for (i = start; i <= end; i += inc) { + err = mlx4_table_get(dev, table, i); + if (err) + goto fail; + } + + return 0; + +fail: + while (i > start) { + i -= inc; + mlx4_table_put(dev, table, i); + } + + return err; +} + +void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table, + int start, int end) +{ + int i; + + for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size) + mlx4_table_put(dev, table, i); +} + +int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table, + u64 virt, int obj_size, int nobj, int reserved, + int use_lowmem, int use_coherent) +{ + int obj_per_chunk; + int num_icm; + unsigned chunk_size; + int i; + + obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size; + num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk; + + table->icm = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL); + if (!table->icm) + return -ENOMEM; + table->virt = virt; + table->num_icm = num_icm; + table->num_obj = nobj; + table->obj_size = obj_size; + table->lowmem = use_lowmem; + table->coherent = use_coherent; + mutex_init(&table->mutex); + + for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) { + chunk_size = MLX4_TABLE_CHUNK_SIZE; + if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > nobj * obj_size) + chunk_size = PAGE_ALIGN(nobj * obj_size - i * MLX4_TABLE_CHUNK_SIZE); + + table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT, + (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) | + __GFP_NOWARN, use_coherent); + if (!table->icm[i]) + goto err; + if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) { + mlx4_free_icm(dev, table->icm[i], use_coherent); + table->icm[i] = NULL; + goto err; + } + + /* + * Add a reference to this ICM chunk so that it never + * gets freed (since it contains reserved firmware objects). + */ + ++table->icm[i]->refcount; + } + + return 0; + +err: + for (i = 0; i < num_icm; ++i) + if (table->icm[i]) { + mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE, + MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE); + mlx4_free_icm(dev, table->icm[i], use_coherent); + } + + return -ENOMEM; +} + +void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table) +{ + int i; + + for (i = 0; i < table->num_icm; ++i) + if (table->icm[i]) { + mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE, + MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE); + mlx4_free_icm(dev, table->icm[i], table->coherent); + } + + kfree(table->icm); +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/icm.h b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/icm.h new file mode 100755 index 0000000..1d0b9f7 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/icm.h @@ -0,0 +1,203 @@ +/* + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_ICM_H +#define MLX4_ICM_H + +#include +#include +#include + +#define MLX4_ICM_CHUNK_LEN \ + ((256 - sizeof (struct list_head) - 2 * sizeof (int)) / \ + (sizeof (struct scatterlist))) + +enum { + MLX4_ICM_PAGE_SHIFT = 12, + MLX4_ICM_PAGE_SIZE = 1 << MLX4_ICM_PAGE_SHIFT, +}; + +struct mlx4_icm_chunk { + struct list_head list; + int npages; + int nsg; +#ifdef __VMKERNEL_MODULE__ + struct scatterlist mem; + /* + * We need to save the virtual address for every page + * we are allocating because in vmkernel going back from + * physical address to virtual one can give different + * virtual address. Both virtual addresses point to same + * location but you can dma_free_coherent the memory only + * with the original virtual address you received from + * dma_alloc_coherent + */ + void *sg_virt_addr[MLX4_ICM_CHUNK_LEN]; +#else + struct scatterlist mem[MLX4_ICM_CHUNK_LEN]; +#endif /* __VMKERNEL_MODULE__ */ + +}; + +struct mlx4_icm { + struct list_head chunk_list; + int refcount; +}; + +struct mlx4_icm_iter { + struct mlx4_icm *icm; + struct mlx4_icm_chunk *chunk; + int page_idx; +}; + +struct mlx4_dev; + +struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages, + gfp_t gfp_mask, int coherent); +void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent); + +int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj); +void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj); +int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table, + int start, int end); +void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table, + int start, int end); +int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table, + u64 virt, int obj_size, int nobj, int reserved, + int use_lowmem, int use_coherent); +void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table); +int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj); +void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, int obj); +void *mlx4_table_find(struct mlx4_icm_table *table, int obj, dma_addr_t *dma_handle); +int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table, + int start, int end); +void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table, + int start, int end); + +static inline void mlx4_icm_first(struct mlx4_icm *icm, + struct mlx4_icm_iter *iter) +{ + iter->icm = icm; + iter->chunk = list_empty(&icm->chunk_list) ? + NULL : list_entry(icm->chunk_list.next, + struct mlx4_icm_chunk, list); + iter->page_idx = 0; +#ifdef __VMKERNEL_MODULE__ + /* + * We need to reset the current location inside the + * scatterlist (the pages list) in vmkernel. + * The scatterlist in vmkernel isn't an array but rather + * a data structure. We are going on all pages one by one + * with sg_next and we return to first one by sg_reset + */ + if (iter->chunk) + sg_reset(&(iter->chunk->mem)); +#endif /* __VMKERNEL_MODULE__ */ +} + +static inline int mlx4_icm_last(struct mlx4_icm_iter *iter) +{ + return !iter->chunk; +} + +static inline void mlx4_icm_next(struct mlx4_icm_iter *iter) +{ + if (++iter->page_idx >= iter->chunk->nsg) { + if (iter->chunk->list.next == &iter->icm->chunk_list) { + iter->chunk = NULL; + return; + } + + iter->chunk = list_entry(iter->chunk->list.next, + struct mlx4_icm_chunk, list); + iter->page_idx = 0; +#ifdef __VMKERNEL_MODULE__ + sg_reset(&(iter->chunk->mem)); + } else { + sg_next(&(iter->chunk->mem)); + } +#endif /* __VMKERNEL_MODULE__ */ +} + +static inline dma_addr_t mlx4_icm_addr(struct mlx4_icm_iter *iter) +{ +#ifdef __VMKERNEL_MODULE__ + return sg_dma_address(&iter->chunk->mem); +#else + return sg_dma_address(&iter->chunk->mem[iter->page_idx]); +#endif /* __VMKERNEL_MODULE__ */ +} + +static inline unsigned long mlx4_icm_size(struct mlx4_icm_iter *iter) +{ +#ifdef __VMKERNEL_MODULE__ + return sg_dma_len(&iter->chunk->mem); +#else + return sg_dma_len(&iter->chunk->mem[iter->page_idx]); +#endif /* __VMKERNEL_MODULE__ */ +} + + +#ifdef __VMKERNEL_MODULE__ +#define MLNX_VMKSGEL(mem) (mem)->vmksgel +#define MLNX_VMKIOSGEL(mem) (mem)->vmkIOsgel +#define MLNX_CURSGEL(mem) (mem)->cursgel +#define MLNX_CURIOSGEL(mem) (mem)->curIOsgel +#define MLNX_PREMAPED(mem) (mem)->premapped +#define MLNX_VMKSGA(mem) (mem)->vmksga +#define MLNX_VMKIOSGA(mem) (mem)->vmkIOsga + +#define MLNX_NUMELEM(sga) (sga)->numElems +#define MLNX_MAXELEM(sga) (sga)->maxElems +#define MLNX_VMKSGA_NUMELEM(mem) MLNX_NUMELEM(MLNX_VMKSGA(mem)) +#define MLNX_VMKSGA_MAXELEM(mem) MLNX_MAXELEM(MLNX_VMKSGA(mem)) +#define MLNX_VMKIOSGA_NUMELEM(mem) MLNX_NUMELEM(MLNX_VMKIOSGA(mem)) +#define MLNX_VMKIOSGA_MAXELEM(mem) MLNX_MAXELEM(MLNX_VMKIOSGA(mem)) + +#define MLNX_LENGTH(sgel) (sgel)->length +#define MLNX_CURSGEL_LENGTH(mem) MLNX_LENGTH(MLNX_CURSGEL(mem)) +#define MLNX_CURIOSGEL_LENGTH(mem) MLNX_LENGTH(MLNX_CURIOSGEL(mem)) + +#define MLNX_ADDR(sgel) (sgel)->addr +#define MLNX_CURSGEL_ADDR(mem) MLNX_ADDR(MLNX_CURSGEL(mem)) +#define MLNX_IOADDR(sgel) (sgel)->ioAddr +#define MLNX_CURIOSGEL_IOADDR(mem) MLNX_IOADDR(MLNX_CURIOSGEL(mem)) + +static inline int mlx4_alloc_sga(vmk_SgArray** ptr, gfp_t gfp_mask) +{ + *ptr = kmalloc(sizeof(struct vmk_SgElem) * MLX4_ICM_CHUNK_LEN + + sizeof(struct vmk_SgArray), gfp_mask); + if(!*ptr) + return -ENOMEM; + + MLNX_MAXELEM(*ptr) = MLX4_ICM_CHUNK_LEN; + MLNX_NUMELEM(*ptr) = 0; + return 0; +} + +static inline int mlx4_alloc_sgel(vmk_sgelem **ptr, gfp_t gfp_mask) +{ + *ptr = kmalloc(sizeof(vmk_sgelem) * MLX4_ICM_CHUNK_LEN , gfp_mask); + if(!*ptr) + return -ENOMEM; + + return 0; +} +#endif /* __VMKERNEL_MODULE__ */ + +int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm); +int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev); + +#endif /* MLX4_ICM_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/intf.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/intf.c new file mode 100755 index 0000000..c27c435 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/intf.c @@ -0,0 +1,172 @@ +/* + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2007-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "mlx4.h" + +struct mlx4_device_context { + struct list_head list; + struct mlx4_interface *intf; + void *context; +}; + +static LIST_HEAD(intf_list); +static LIST_HEAD(dev_list); +static DEFINE_MUTEX(intf_mutex); + +static void mlx4_add_device(struct mlx4_interface *intf, struct mlx4_priv *priv) +{ + struct mlx4_device_context *dev_ctx; + + dev_ctx = kmalloc(sizeof *dev_ctx, GFP_KERNEL); + if (!dev_ctx) + return; + + dev_ctx->intf = intf; + dev_ctx->context = intf->add(&priv->dev); + + if (dev_ctx->context) { + spin_lock_irq(&priv->ctx_lock); + list_add_tail(&dev_ctx->list, &priv->ctx_list); + spin_unlock_irq(&priv->ctx_lock); + } else + kfree(dev_ctx); +} + +static void mlx4_remove_device(struct mlx4_interface *intf, struct mlx4_priv *priv) +{ + struct mlx4_device_context *dev_ctx; + + list_for_each_entry(dev_ctx, &priv->ctx_list, list) + if (dev_ctx->intf == intf) { + spin_lock_irq(&priv->ctx_lock); + list_del(&dev_ctx->list); + spin_unlock_irq(&priv->ctx_lock); + + intf->remove(&priv->dev, dev_ctx->context); + kfree(dev_ctx); + return; + } +} + +int mlx4_register_interface(struct mlx4_interface *intf) +{ + struct mlx4_priv *priv; + + if (!intf->add || !intf->remove) + return -EINVAL; + + mutex_lock(&intf_mutex); + + list_add_tail(&intf->list, &intf_list); + list_for_each_entry(priv, &dev_list, dev_list) + mlx4_add_device(intf, priv); + + mutex_unlock(&intf_mutex); + + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_register_interface); + +void mlx4_unregister_interface(struct mlx4_interface *intf) +{ + struct mlx4_priv *priv; + + mutex_lock(&intf_mutex); + + list_for_each_entry(priv, &dev_list, dev_list) + mlx4_remove_device(intf, priv); + + list_del(&intf->list); + + mutex_unlock(&intf_mutex); +} +EXPORT_SYMBOL_GPL(mlx4_unregister_interface); + +void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, + unsigned long param) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_device_context *dev_ctx; + unsigned long flags; + + spin_lock_irqsave(&priv->ctx_lock, flags); + + list_for_each_entry(dev_ctx, &priv->ctx_list, list) + if (dev_ctx->intf->event) + dev_ctx->intf->event(dev, dev_ctx->context, type, param); + + spin_unlock_irqrestore(&priv->ctx_lock, flags); +} + +int mlx4_register_device(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_interface *intf; + + mutex_lock(&intf_mutex); + + list_add_tail(&priv->dev_list, &dev_list); + list_for_each_entry(intf, &intf_list, list) + mlx4_add_device(intf, priv); + + mutex_unlock(&intf_mutex); + if (!mlx4_is_slave(dev)) + mlx4_start_catas_poll(dev); + + return 0; +} + +void mlx4_unregister_device(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_interface *intf; + + if (!mlx4_is_slave(dev)) + mlx4_stop_catas_poll(dev); + mutex_lock(&intf_mutex); + + list_for_each_entry(intf, &intf_list, list) + mlx4_remove_device(intf, priv); + + list_del(&priv->dev_list); + + mutex_unlock(&intf_mutex); +} + +void *mlx4_get_protocol_dev(struct mlx4_dev *dev, enum mlx4_protocol proto, int port) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_device_context *dev_ctx; + unsigned long flags; + void *result = NULL; + + spin_lock_irqsave(&priv->ctx_lock, flags); + + list_for_each_entry(dev_ctx, &priv->ctx_list, list) + if (dev_ctx->intf->protocol == proto && dev_ctx->intf->get_dev) { + result = dev_ctx->intf->get_dev(dev, dev_ctx->context, port); + break; + } + + spin_unlock_irqrestore(&priv->ctx_lock, flags); + + return result; +} +EXPORT_SYMBOL_GPL(mlx4_get_protocol_dev); diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/main.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/main.c new file mode 100755 index 0000000..a170231 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/main.c @@ -0,0 +1,2452 @@ +/* + * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. + * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ +#include +#ifdef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include +#include + +#include "mlx4.h" +#include "fw.h" +#include "icm.h" + + +MODULE_AUTHOR("Roland Dreier"); +MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver"); +MODULE_LICENSE("GPL"); +MODULE_VERSION(DRV_VERSION); + +struct workqueue_struct *mlx4_wq; + +#ifdef CONFIG_MLX4_DEBUG + +int mlx4_debug_level = 0; +module_param_named(debug_level, mlx4_debug_level, int, 0644); +MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); + +#endif /* CONFIG_MLX4_DEBUG */ + +#ifdef CONFIG_PCI_MSI + +static int msi_x = 1; +module_param(msi_x, int, 0444); +MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); + +#else /* CONFIG_PCI_MSI */ + +#define msi_x (0) + +#endif /* CONFIG_PCI_MSI */ + +static int num_vfs; +#ifndef __VMKERNEL_MODULE__ +module_param(num_vfs, int, 0444); +MODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0"); +#else +module_param_named(max_vfs, num_vfs, int, 0444); +MODULE_PARM_DESC(max_vfs, "enable #max_vfs functions if max_vfs > 0"); +#endif /* __VMKERNEL_MODULE__ */ + +static int probe_vf; +#ifndef __VMKERNEL_MODULE__ +module_param(probe_vf, int, 0644); +MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)"); +#endif /* __VMKERNEL_MODULE__ */ + +int mlx4_log_num_mgm_entry_size = 10; +module_param_named(log_num_mgm_entry_size, + mlx4_log_num_mgm_entry_size, int, 0444); +MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num" + " of qp per mcg, for example:" + " 10 gives 248.range: 9<=" + " log_num_mgm_entry_size <= 12"); + +static int mtu_4k; +#ifndef __VMKERNEL_MLX4_EN_SUPPORT__ +module_param(mtu_4k, int, 0644); +MODULE_PARM_DESC(mtu_4k, " configure 4k mtu (mtu_4k > 0)"); +#endif /* NOT __VMKERNEL_MLX4_EN_SUPPORT__ */ + +#define MLX4_VF (1 << 0) + +#define HCA_GLOBAL_CAP_MASK 0 +#define PF_CONTEXT_BEHAVIOUR_MASK 0 + +static char mlx4_version[] __devinitdata = + DRV_NAME ": Mellanox ConnectX core driver v" + DRV_VERSION " (" DRV_RELDATE ")\n"; + +static struct mlx4_profile default_profile = { + .num_qp = 1 << 18, + .num_srq = 1 << 16, + .rdmarc_per_qp = 1 << 4, + .num_cq = 1 << 16, + .num_mcg = 1 << 13, + .num_mpt = 1 << 19, + .num_mtt = 1 << 20, /* It is really num mtt segements */ +}; + +static int log_num_mac = 7; +#ifndef __VMKERNEL_MODULE__ +module_param_named(log_num_mac, log_num_mac, int, 0444); +MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)"); + +static int log_num_vlan; +module_param_named(log_num_vlan, log_num_vlan, int, 0444); +MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)"); +/* Log2 max number of VLANs per ETH port (0-7) */ + +static bool use_prio; +module_param_named(use_prio, use_prio, bool, 0444); +MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports " + "(0/1, default 0)"); +#endif /* __VMKERNEL_MODULE__ */ +#define MLX4_LOG_NUM_VLANS 7 + +int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG); +#ifndef __VMKERNEL_MLX4_EN_SUPPORT__ +module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); +MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)"); +#endif /* NOT __VMKERNEL_MLX4_EN_SUPPORT__ */ + +static int port_type_array[2] = {MLX4_PORT_TYPE_NONE, MLX4_PORT_TYPE_NONE}; +#ifndef __VMKERNEL_MLX4_EN_SUPPORT__ +#ifdef __VMKERNEL_MODULE__ +static int arr_argc; +#else +static int arr_argc = 2; +#endif /* __VMKERNEL_MODULE__ */ +module_param_array(port_type_array, int, &arr_argc, 0444); +MODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is default " + "1 for IB, 2 for Ethernet"); +#endif /* NOT __VMKERNEL_MLX4_EN_SUPPORT__ */ + +struct mlx4_port_config { + struct list_head list; + enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1]; + struct pci_dev *pdev; +}; + +int mlx4_check_port_params(struct mlx4_dev *dev, + enum mlx4_port_type *port_type) +{ + int i; + + for (i = 0; i < dev->caps.num_ports - 1; i++) { + if (port_type[i] != port_type[i + 1]) { + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) { + mlx4_err(dev, "Only same port types supported " + "on this HCA, aborting.\n"); + return -EINVAL; + } + if (port_type[i] == MLX4_PORT_TYPE_ETH && + port_type[i + 1] == MLX4_PORT_TYPE_IB) + return -EINVAL; + } + } + + for (i = 0; i < dev->caps.num_ports; i++) { + if (!(port_type[i] & dev->caps.supported_type[i+1])) { + mlx4_err(dev, "Requested port type for port %d is not " + "supported on this HCA\n", i + 1); + return -EINVAL; + } + } + return 0; +} + +static void mlx4_set_port_mask(struct mlx4_dev *dev) +{ + int i; + + for (i = 1; i <= dev->caps.num_ports; ++i) + dev->caps.port_mask[i] = dev->caps.port_type[i]; +} + +static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) +{ + int err; + int i; + + err = mlx4_QUERY_DEV_CAP(dev, dev_cap); + if (err) { + mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); + return err; + } + + if (dev_cap->min_page_sz > PAGE_SIZE) { + mlx4_err(dev, "HCA minimum page size of %d bigger than " + "kernel PAGE_SIZE of %ld, aborting.\n", + dev_cap->min_page_sz, PAGE_SIZE); + return -ENODEV; + } + if (dev_cap->num_ports > MLX4_MAX_PORTS) { + mlx4_err(dev, "HCA has %d ports, but we only support %d, " + "aborting.\n", + dev_cap->num_ports, MLX4_MAX_PORTS); + return -ENODEV; + } + + if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) { + mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than " + "PCI resource 2 size of 0x%llx, aborting.\n", + dev_cap->uar_size, + (unsigned long long) pci_resource_len(dev->pdev, 2)); + return -ENODEV; + } + + dev->caps.num_ports = dev_cap->num_ports; + dev->phys_caps.num_phys_eqs = MLX4_MAX_EQ_NUM; + for (i = 1; i <= dev->caps.num_ports; ++i) { + dev->caps.vl_cap[i] = dev_cap->max_vl[i]; + dev->caps.ib_mtu_cap[i] = dev_cap->ib_mtu[i]; + dev->phys_caps.gid_phys_table_len[i] = dev_cap->max_gids[i]; + dev->phys_caps.pkey_phys_table_len[i] = dev_cap->max_pkeys[i]; + /* set gid and pkey table operating lengths by default + * to non-sriov values */ + dev->caps.gid_table_len[i] = dev_cap->max_gids[i]; + dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i]; + + dev->caps.port_width_cap[i] = dev_cap->max_port_width[i]; + dev->caps.eth_mtu_cap[i] = dev_cap->eth_mtu[i]; + dev->caps.def_mac[i] = dev_cap->def_mac[i]; + dev->caps.supported_type[i] = dev_cap->supported_port_types[i]; +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + dev->caps.suggested_type[i] = dev_cap->suggested_type[i]; + dev->caps.default_sense[i] = dev_cap->default_sense[i]; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + dev->caps.trans_type[i] = dev_cap->trans_type[i]; + dev->caps.vendor_oui[i] = dev_cap->vendor_oui[i]; + dev->caps.wavelength[i] = dev_cap->wavelength[i]; + dev->caps.trans_code[i] = dev_cap->trans_code[i]; + } + + dev->caps.uar_page_size = PAGE_SIZE; + dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; + dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay; + dev->caps.bf_reg_size = dev_cap->bf_reg_size; + dev->caps.bf_regs_per_page = dev_cap->bf_regs_per_page; + dev->caps.max_sq_sg = dev_cap->max_sq_sg; + dev->caps.max_rq_sg = dev_cap->max_rq_sg; + dev->caps.max_wqes = dev_cap->max_qp_sz; + dev->caps.max_qp_init_rdma = dev_cap->max_requester_per_qp; + dev->caps.max_srq_wqes = dev_cap->max_srq_sz; + dev->caps.max_srq_sge = dev_cap->max_rq_sg - 1; + dev->caps.reserved_srqs = dev_cap->reserved_srqs; + dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz; + dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; + dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev); + /* + * Subtract 1 from the limit because we need to allocate a + * spare CQE so the HCA HW can tell the difference between an + * empty CQ and a full CQ. + */ + dev->caps.max_cqes = dev_cap->max_cq_sz - 1; + dev->caps.reserved_cqs = dev_cap->reserved_cqs; + dev->caps.reserved_eqs = dev_cap->reserved_eqs; + dev->caps.reserved_mtts = dev_cap->reserved_mtts; + dev->caps.reserved_mrws = dev_cap->reserved_mrws; + + /* The first 128 UARs are used for EQ doorbells */ + dev->caps.reserved_uars = max_t(int, 128, dev_cap->reserved_uars); + dev->caps.reserved_pds = dev_cap->reserved_pds; + dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? + dev_cap->reserved_xrcds : 0; + dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? + dev_cap->max_xrcds : 0; + dev->caps.mtt_entry_sz = dev_cap->mtt_entry_sz; + + dev->caps.max_msg_sz = dev_cap->max_msg_sz; + dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); + dev->caps.flags = dev_cap->flags; + dev->caps.bmme_flags = dev_cap->bmme_flags; + dev->caps.reserved_lkey = dev_cap->reserved_lkey; + dev->caps.stat_rate_support = dev_cap->stat_rate_support; + dev->caps.max_gso_sz = dev_cap->max_gso_sz; + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + /* Sense port always allowed on supported devices for ConnectX1 and 2 */ + if (dev->pdev->device != 0x1003) + dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + + dev->caps.log_num_macs = log_num_mac; + dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; + dev->caps.log_num_prios = 0; + + for (i = 1; i <= dev->caps.num_ports; ++i) { + dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE; + if (dev->caps.supported_type[i]) { + /* if only ETH is supported - assign ETH */ + if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH) + dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; + /* if only IB is supported - assign IB */ + else if (dev->caps.supported_type[i] == + MLX4_PORT_TYPE_IB) + dev->caps.port_type[i] = MLX4_PORT_TYPE_IB; + else { + /* if IB and ETH are supported, we set the port + * type according to user selection of port type; + * if user selected none, take the FW hint */ + if (port_type_array[i-1] == MLX4_PORT_TYPE_NONE) +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + dev->caps.port_type[i] = dev->caps.suggested_type[i] ? + MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB; +#else +#ifdef __VMKERNEL_MLX4_EN_SUPPORT__ + dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; +#else + dev->caps.port_type[i] = MLX4_PORT_TYPE_IB; +#endif /* __VMKERNEL_MLX4_EN_SUPPORT__ */ +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + else + dev->caps.port_type[i] = port_type_array[i-1]; + } + } +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + /* + * Link sensing is allowed on the port if 3 conditions are true: + * 1. Both protocols are supported on the port. + * 2. Different types are supported on the port + * 3. FW declared that it supports link sensing + */ + mlx4_priv(dev)->sense.sense_allowed[i] = + ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) && + (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && + (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)); + + /* + * If "default_sense" bit is set, we move the port to "AUTO" mode + * and perform sense_port FW command to try and set the correct + * port type from beginning + */ + if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) { + enum mlx4_port_type sensed_port = MLX4_PORT_TYPE_NONE; + dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO; + mlx4_SENSE_PORT(dev, i, &sensed_port); + if (sensed_port != MLX4_PORT_TYPE_NONE) + dev->caps.port_type[i] = sensed_port; + } else { + dev->caps.possible_type[i] = dev->caps.port_type[i]; + } +#else + dev->caps.possible_type[i] = dev->caps.port_type[i]; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + + if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) { + dev->caps.log_num_macs = dev_cap->log_max_macs[i]; + mlx4_warn(dev, "Requested number of MACs is too much " + "for port %d, reducing to %d.\n", + i, 1 << dev->caps.log_num_macs); + } + if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) { + dev->caps.log_num_vlans = dev_cap->log_max_vlans[i]; + mlx4_warn(dev, "Requested number of VLANs is too much " + "for port %d, reducing to %d.\n", + i, 1 << dev->caps.log_num_vlans); + } + } + + dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters); + + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps; + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] = + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] = + (1 << dev->caps.log_num_macs) * + (1 << dev->caps.log_num_vlans) * + (1 << dev->caps.log_num_prios) * + dev->caps.num_ports; + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; + + dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; + + dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0; + + if (dev_cap->flags & (1ull << 62)) + dev->caps.cqe_size = 64; + else + dev->caps.cqe_size = 32; + + dev->caps.eqe_size = 32; + return 0; +} +/*The function checks if there are live vf, return the num of them*/ +static int mlx4_how_many_lives_vf(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *s_state; + int i; + int ret = 0; + + for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) { + s_state = &priv->mfunc.master.slave_state[i]; + if (s_state->active && s_state->last_cmd != + MLX4_COMM_CMD_RESET) { + mlx4_warn(dev, "%s: slave: %d is still active\n", + __func__, i); + ret++; + } + } + return ret; +} + +int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey) +{ + u32 qk = MLX4_RESERVED_QKEY_BASE; + if (qpn >= dev->caps.base_sqpn + 8 + 16 * MLX4_MFUNC_MAX || + qpn < dev->caps.base_sqpn + 8) + return -EINVAL; + + if (qpn >= dev->caps.base_sqpn + 8 * (MLX4_MFUNC_MAX + 1)) + /* tunnel qp */ + qk += qpn - (dev->caps.base_sqpn + 8 * (MLX4_MFUNC_MAX + 1)); + else + qk += qpn - (dev->caps.base_sqpn + 8); + *qkey = qk; + return 0; +} +EXPORT_SYMBOL(mlx4_get_parav_qkey); + +int mlx4_is_slave_active(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_state *s_slave; + + if (!mlx4_is_master(dev)) + return 0; + + s_slave = &priv->mfunc.master.slave_state[slave]; + return !!s_slave->active; +} +EXPORT_SYMBOL(mlx4_is_slave_active); + +static int mlx4_slave_cap(struct mlx4_dev *dev) +{ + int err; + u32 page_size; + struct mlx4_dev_cap dev_cap; + struct mlx4_func_cap func_cap; + struct mlx4_init_hca_param hca_param; + int i; + + memset(&hca_param, 0, sizeof(hca_param)); + err = mlx4_QUERY_HCA(dev, &hca_param); + if (err) { + mlx4_err(dev, "QUERY_HCA command failed, aborting.\n"); + return err; + } + + /*fail if the hca has an unknown capability */ + if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) != + HCA_GLOBAL_CAP_MASK) { + mlx4_err(dev, "Unknown hca global capabilities\n"); + return -ENOSYS; + } + + mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz; + + memset(&dev_cap, 0, sizeof(dev_cap)); + dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp; + err = mlx4_dev_cap(dev, &dev_cap); + if (err) { + mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); + return err; + } + + err = mlx4_QUERY_FW(dev); + if (err) + mlx4_err(dev, "QUERY_FW command failed: could not get FW version.\n"); + + page_size = ~dev->caps.page_size_cap + 1; + mlx4_warn(dev, "HCA minimum page size:%d\n", page_size); + if (page_size > PAGE_SIZE) { + mlx4_err(dev, "HCA minimum page size of %d bigger than " + "kernel PAGE_SIZE of %ld, aborting.\n", + page_size, PAGE_SIZE); + return -ENODEV; + } + + /* slave gets uar page size from QUERY_HCA fw command */ + dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12); + + /* TODO: relax this assumption */ + if (dev->caps.uar_page_size != PAGE_SIZE) { + mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n", + dev->caps.uar_page_size, PAGE_SIZE); + return -ENODEV; + } + + memset(&func_cap, 0, sizeof(func_cap)); + err = mlx4_QUERY_FUNC_CAP(dev, &func_cap); + if (err) { + mlx4_err(dev, "QUERY_FUNC_CAP command failed, aborting.\n"); + return err; + } + + if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) != + PF_CONTEXT_BEHAVIOUR_MASK) { + mlx4_err(dev, "Unknown pf context behaviour\n"); + return -ENOSYS; + } + + dev->caps.num_ports = func_cap.num_ports; + dev->caps.num_qps = func_cap.qp_quota; + dev->caps.num_srqs = func_cap.srq_quota; + dev->caps.num_cqs = func_cap.cq_quota; + dev->caps.num_eqs = func_cap.max_eq; + dev->caps.reserved_eqs = func_cap.reserved_eq; + dev->caps.num_mpts = func_cap.mpt_quota; + dev->caps.num_mtts = func_cap.mtt_quota; + dev->caps.num_pds = MLX4_NUM_PDS; + dev->caps.num_mgms = 0; + dev->caps.num_amgms = 0; + + if (dev->caps.num_ports > MLX4_MAX_PORTS) { + mlx4_err(dev, "HCA has %d ports, but we only support %d, " + "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS); + return -ENODEV; + } + + if (dev->caps.uar_page_size * (dev->caps.num_uars - + dev->caps.reserved_uars) > + pci_resource_len(dev->pdev, 2)) { + mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than " + "PCI resource 2 size of 0x%llx, aborting.\n", + dev->caps.uar_page_size * dev->caps.num_uars, + (unsigned long long) pci_resource_len(dev->pdev, 2)); + return -ENODEV; + } + + for (i = 1; i <= dev->caps.num_ports; ++i) { + dev->caps.port_mask[i] = dev->caps.port_type[i]; + if (mlx4_get_slave_pkey_gid_tbl_len(dev, i, + &dev->caps.gid_table_len[i], + &dev->caps.pkey_table_len[i])) + return -ENODEV; + } + + /* Calculate our sqp_start */ + dev->caps.sqp_start = func_cap.base_proxy_qpn; + dev->caps.base_sqpn = func_cap.base_qpn; + dev->caps.base_tunnel_sqpn = func_cap.base_tunnel_qpn; + +#if 0 + mlx4_warn(dev, "sqp_demux:%d\n", dev->caps.sqp_demux); + mlx4_warn(dev, "num_uars:%d reserved_uars:%d uar region:0x%x bar2:0x%llx\n", + dev->caps.num_uars, dev->caps.reserved_uars, + dev->caps.uar_page_size * dev->caps.num_uars, + pci_resource_len(dev->pdev, 2)); + mlx4_warn(dev, "num_eqs:%d reserved_eqs:%d\n", dev->caps.num_eqs, + dev->caps.reserved_eqs); + mlx4_warn(dev, "num_pds:%d reserved_pds:%d slave_pd_shift:%d pd_base:%d\n", + dev->caps.num_pds, dev->caps.reserved_pds, + dev->caps.slave_pd_shift, dev->caps.pd_base); +#endif + return 0; +} + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ +/* + * Change the port configuration of the device. + * Every user of this function must hold the port mutex. + */ +int mlx4_change_port_types(struct mlx4_dev *dev, + enum mlx4_port_type *port_types) +{ + int err = 0; + int change = 0; + int port; + + for (port = 0; port < dev->caps.num_ports; port++) { + /* Change the port type only if the new type is different + * from the current, and not set to Auto */ + if (port_types[port] != dev->caps.port_type[port + 1]) { + change = 1; + dev->caps.port_type[port + 1] = port_types[port]; + } + } + if (change) { + mlx4_unregister_device(dev); + for (port = 1; port <= dev->caps.num_ports; port++) { + mlx4_CLOSE_PORT(dev, port); + err = mlx4_SET_PORT(dev, port, -1); + if (err) { + mlx4_err(dev, "Failed to set port %d, " + "aborting\n", port); + goto out; + } + } + mlx4_set_port_mask(dev); + err = mlx4_register_device(dev); + } + +out: + return err; +} +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + +#ifdef __VMKERNEL_SYSFS_SUPPORT__ +static ssize_t show_port_type(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info, + port_attr); + struct mlx4_dev *mdev = info->dev; + char type[8]; + + sprintf(type, "%s", + (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ? + "ib" : "eth"); +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO) + sprintf(buf, "auto (%s)\n", type); + else +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + sprintf(buf, "%s\n", type); + + return strlen(buf); +} + +static ssize_t set_port_type(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info, + port_attr); + struct mlx4_dev *mdev = info->dev; + struct mlx4_priv *priv = mlx4_priv(mdev); + enum mlx4_port_type types[MLX4_MAX_PORTS]; +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + enum mlx4_port_type new_types[MLX4_MAX_PORTS]; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + int i; + int err = 0; + + if (!strcmp(buf, "ib\n")) + info->tmp_type = MLX4_PORT_TYPE_IB; + else if (!strcmp(buf, "eth\n")) + info->tmp_type = MLX4_PORT_TYPE_ETH; +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + else if (!strcmp(buf, "auto\n")) + info->tmp_type = MLX4_PORT_TYPE_AUTO; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + else { + mlx4_err(mdev, "%s is not supported port type\n", buf); + return -EINVAL; + } + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + mlx4_stop_sense(mdev); +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + mutex_lock(&priv->port_mutex); + /* Possible type is always the one that was delivered */ + mdev->caps.possible_type[info->port] = info->tmp_type; + + for (i = 0; i < mdev->caps.num_ports; i++) { + types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type : + mdev->caps.possible_type[i+1]; +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + if (types[i] == MLX4_PORT_TYPE_AUTO) + types[i] = mdev->caps.port_type[i+1]; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + } + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && + !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) { + for (i = 1; i <= mdev->caps.num_ports; i++) { + if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) { + mdev->caps.possible_type[i] = mdev->caps.port_type[i]; + err = -EINVAL; + } + } + } + if (err) { + mlx4_err(mdev, "Auto sensing is not supported on this HCA. " + "Set only 'eth' or 'ib' for both ports " + "(should be the same)\n"); + goto out; + } + + mlx4_do_sense_ports(mdev, new_types, types); + + err = mlx4_check_port_params(mdev, new_types); + if (err) + goto out; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + + /* We are about to apply the changes after the configuration + * was verified, no need to remember the temporary types + * any more */ + for (i = 0; i < mdev->caps.num_ports; i++) + priv->port[i + 1].tmp_type = 0; + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + err = mlx4_change_port_types(mdev, new_types); + +out: + mlx4_start_sense(mdev); +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + mutex_unlock(&priv->port_mutex); + return err ? err : count; +} +#endif /* __VMKERNEL_SYSFS_SUPPORT__ */ + +#ifndef __mtrack_h_ /* memtrack causes conflict with ib_verbs */ +enum ibta_mtu { + IB_MTU_256 = 1, + IB_MTU_512 = 2, + IB_MTU_1024 = 3, + IB_MTU_2048 = 4, + IB_MTU_4096 = 5 +}; +#else +#define ibta_mtu ib_mtu +#endif /* __mtrack_h_ */ + +static inline int int_to_ibta_mtu(int mtu) +{ + switch (mtu) { + case 256: return IB_MTU_256; + case 512: return IB_MTU_512; + case 1024: return IB_MTU_1024; + case 2048: return IB_MTU_2048; + case 4096: return IB_MTU_4096; + default: return -1; + } +} + +static inline int ibta_mtu_to_int(enum ibta_mtu mtu) +{ + switch (mtu) { + case IB_MTU_256: return 256; + case IB_MTU_512: return 512; + case IB_MTU_1024: return 1024; + case IB_MTU_2048: return 2048; + case IB_MTU_4096: return 4096; + default: return -1; + } +} + +#ifdef __VMKERNEL_SYSFS_SUPPORT__ +static ssize_t show_port_ib_mtu(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info, + port_mtu_attr); + struct mlx4_dev *mdev = info->dev; + + if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) + mlx4_warn(mdev, "port level mtu is only used for IB ports\n"); + + sprintf(buf, "%d\n", + ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port])); + return strlen(buf); +} + +static ssize_t set_port_ib_mtu(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info, + port_mtu_attr); + struct mlx4_dev *mdev = info->dev; + struct mlx4_priv *priv = mlx4_priv(mdev); + int err, port, mtu, ibta_mtu = -1; + + if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) { + mlx4_warn(mdev, "port level mtu is only used for IB ports\n"); + return -EINVAL; + } + + err = sscanf(buf, "%d", &mtu); + if (err > 0) + ibta_mtu = int_to_ibta_mtu(mtu); + + if (err <= 0 || ibta_mtu < 0) { + mlx4_err(mdev, "%s is invalid IBTA mtu\n", buf); + return -EINVAL; + } + + mdev->caps.port_ib_mtu[info->port] = ibta_mtu; + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + mlx4_stop_sense(mdev); +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + mutex_lock(&priv->port_mutex); + mlx4_unregister_device(mdev); + for (port = 1; port <= mdev->caps.num_ports; port++) { + mlx4_CLOSE_PORT(mdev, port); + err = mlx4_SET_PORT(mdev, port, -1); + if (err) { + mlx4_err(mdev, "Failed to set port %d, " + "aborting\n", port); + goto err_set_port; + } + } + err = mlx4_register_device(mdev); +err_set_port: + mutex_unlock(&priv->port_mutex); +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + mlx4_start_sense(mdev); +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + return err ? err : count; +} +#endif /* __VMKERNEL_SYSFS_SUPPORT__ */ + +static int mlx4_load_fw(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int err; + + priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages, + GFP_HIGHUSER | __GFP_NOWARN, 0); + if (!priv->fw.fw_icm) { + mlx4_err(dev, "Couldn't allocate FW area, aborting.\n"); + return -ENOMEM; + } + + err = mlx4_MAP_FA(dev, priv->fw.fw_icm); + if (err) { + mlx4_err(dev, "MAP_FA command failed, aborting.\n"); + goto err_free; + } + + err = mlx4_RUN_FW(dev); + if (err) { + mlx4_err(dev, "RUN_FW command failed, aborting.\n"); + goto err_unmap_fa; + } + + return 0; + +err_unmap_fa: + mlx4_UNMAP_FA(dev); + +err_free: + mlx4_free_icm(dev, priv->fw.fw_icm, 0); + return err; +} + +static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base, + int cmpt_entry_sz) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int err; + int num_eqs; + + err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table, + cmpt_base + + ((u64) (MLX4_CMPT_TYPE_QP * + cmpt_entry_sz) << MLX4_CMPT_SHIFT), + cmpt_entry_sz, dev->caps.num_qps, + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], + 0, 0); + if (err) + goto err; + + err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table, + cmpt_base + + ((u64) (MLX4_CMPT_TYPE_SRQ * + cmpt_entry_sz) << MLX4_CMPT_SHIFT), + cmpt_entry_sz, dev->caps.num_srqs, + dev->caps.reserved_srqs, 0, 0); + if (err) + goto err_qp; + + err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table, + cmpt_base + + ((u64) (MLX4_CMPT_TYPE_CQ * + cmpt_entry_sz) << MLX4_CMPT_SHIFT), + cmpt_entry_sz, dev->caps.num_cqs, + dev->caps.reserved_cqs, 0, 0); + if (err) + goto err_srq; + + num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs : + dev->caps.num_eqs; + err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table, + cmpt_base + + ((u64) (MLX4_CMPT_TYPE_EQ * + cmpt_entry_sz) << MLX4_CMPT_SHIFT), + cmpt_entry_sz, num_eqs, num_eqs, 0, 0); + if (err) + goto err_cq; + + return 0; + +err_cq: + mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); + +err_srq: + mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); + +err_qp: + mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); + +err: + return err; +} + +static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap, + struct mlx4_init_hca_param *init_hca, u64 icm_size) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + u64 aux_pages; + int num_eqs; + int err; + + err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages); + if (err) { + mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n"); + return err; + } + + mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n", + (unsigned long long) icm_size >> 10, + (unsigned long long) aux_pages << 2); + + priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages, + GFP_HIGHUSER | __GFP_NOWARN, 0); + if (!priv->fw.aux_icm) { + mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n"); + return -ENOMEM; + } + + err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm); + if (err) { + mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n"); + goto err_free_aux; + } + + err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz); + if (err) { + mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n"); + goto err_unmap_aux; + } + + + num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs : + dev->caps.num_eqs; + err = mlx4_init_icm_table(dev, &priv->eq_table.table, + init_hca->eqc_base, dev_cap->eqc_entry_sz, + num_eqs, num_eqs, 0, 0); + if (err) { + mlx4_err(dev, "Failed to map EQ context memory, aborting.\n"); + goto err_unmap_cmpt; + } + +#if !defined(__VMKERNEL_MODULE__) + // TODO: Review the following code + /* + * Reserved MTT entries must be aligned up to a cacheline + * boundary, since the FW will write to them, while the driver + * writes to all other MTT entries. (The variable + * dev->caps.mtt_entry_sz below is really the MTT segment + * size, not the raw entry size) + */ + dev->caps.reserved_mtts = + ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz, + dma_get_cache_alignment()) / dev->caps.mtt_entry_sz; +#endif /* __VMKERNEL_MODULE__ */ + + err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table, + init_hca->mtt_base, + dev->caps.mtt_entry_sz, + dev->caps.num_mtts, + dev->caps.reserved_mtts, 1, 0); + if (err) { + mlx4_err(dev, "Failed to map MTT context memory, aborting.\n"); + goto err_unmap_eq; + } + + err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table, + init_hca->dmpt_base, + dev_cap->dmpt_entry_sz, + dev->caps.num_mpts, + dev->caps.reserved_mrws, 1, 1); + if (err) { + mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n"); + goto err_unmap_mtt; + } + + err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table, + init_hca->qpc_base, + dev_cap->qpc_entry_sz, + dev->caps.num_qps, + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], + 0, 0); + if (err) { + mlx4_err(dev, "Failed to map QP context memory, aborting.\n"); + goto err_unmap_dmpt; + } + + err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table, + init_hca->auxc_base, + dev_cap->aux_entry_sz, + dev->caps.num_qps, + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], + 0, 0); + if (err) { + mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n"); + goto err_unmap_qp; + } + + err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table, + init_hca->altc_base, + dev_cap->altc_entry_sz, + dev->caps.num_qps, + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], + 0, 0); + if (err) { + mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n"); + goto err_unmap_auxc; + } + + err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table, + init_hca->rdmarc_base, + dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift, + dev->caps.num_qps, + dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], + 0, 0); + if (err) { + mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n"); + goto err_unmap_altc; + } + + err = mlx4_init_icm_table(dev, &priv->cq_table.table, + init_hca->cqc_base, + dev_cap->cqc_entry_sz, + dev->caps.num_cqs, + dev->caps.reserved_cqs, 0, 0); + if (err) { + mlx4_err(dev, "Failed to map CQ context memory, aborting.\n"); + goto err_unmap_rdmarc; + } + + err = mlx4_init_icm_table(dev, &priv->srq_table.table, + init_hca->srqc_base, + dev_cap->srq_entry_sz, + dev->caps.num_srqs, + dev->caps.reserved_srqs, 0, 0); + if (err) { + mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n"); + goto err_unmap_cq; + } + + /* + * It's not strictly required, but for simplicity just map the + * whole multicast group table now. The table isn't very big + * and it's a lot easier than trying to track ref counts. + */ + err = mlx4_init_icm_table(dev, &priv->mcg_table.table, + init_hca->mc_base, + mlx4_get_mgm_entry_size(dev), + dev->caps.num_mgms + dev->caps.num_amgms, + dev->caps.num_mgms + dev->caps.num_amgms, + 0, 0); + if (err) { + mlx4_err(dev, "Failed to map MCG context memory, aborting.\n"); + goto err_unmap_srq; + } + + return 0; + +err_unmap_srq: + mlx4_cleanup_icm_table(dev, &priv->srq_table.table); + +err_unmap_cq: + mlx4_cleanup_icm_table(dev, &priv->cq_table.table); + +err_unmap_rdmarc: + mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table); + +err_unmap_altc: + mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table); + +err_unmap_auxc: + mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table); + +err_unmap_qp: + mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table); + +err_unmap_dmpt: + mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table); + +err_unmap_mtt: + mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table); + +err_unmap_eq: + mlx4_cleanup_icm_table(dev, &priv->eq_table.table); + +err_unmap_cmpt: + mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table); + mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); + mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); + mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); + +err_unmap_aux: + mlx4_UNMAP_ICM_AUX(dev); + +err_free_aux: + mlx4_free_icm(dev, priv->fw.aux_icm, 0); + + return err; +} + +static void mlx4_free_icms(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + mlx4_cleanup_icm_table(dev, &priv->mcg_table.table); + mlx4_cleanup_icm_table(dev, &priv->srq_table.table); + mlx4_cleanup_icm_table(dev, &priv->cq_table.table); + mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table); + mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table); + mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table); + mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table); + mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table); + mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table); + mlx4_cleanup_icm_table(dev, &priv->eq_table.table); + mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table); + mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); + mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); + mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); + + mlx4_UNMAP_ICM_AUX(dev); + mlx4_free_icm(dev, priv->fw.aux_icm, 0); +} + +static void mlx4_slave_exit(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + down(&priv->cmd.slave_sem); + if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME)) + mlx4_warn(dev, "Failed to close slave function.\n"); + up(&priv->cmd.slave_sem); +} + +#ifdef __VMKERNEL_BF_ENABLE__ +static int map_bf_area(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + resource_size_t bf_start; + resource_size_t bf_len; + int err = 0; + + if (!dev->caps.bf_reg_size) + return -ENXIO; + + bf_start = pci_resource_start(dev->pdev, 2) + + (dev->caps.num_uars << PAGE_SHIFT); + bf_len = pci_resource_len(dev->pdev, 2) - + (dev->caps.num_uars << PAGE_SHIFT); + priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len); + if (!priv->bf_mapping) + err = -ENOMEM; + + return err; +} + +static void unmap_bf_area(struct mlx4_dev *dev) +{ + if (mlx4_priv(dev)->bf_mapping) + io_mapping_free(mlx4_priv(dev)->bf_mapping); +} +#endif /* __VMKERNEL_BF_ENABLE__ */ + +static void mlx4_close_hca(struct mlx4_dev *dev) +{ +#ifdef __VMKERNEL_BF_ENABLE__ + unmap_bf_area(dev); +#endif /* __VMKERNEL_BF_ENABLE__ */ + if (mlx4_is_slave(dev)) + mlx4_slave_exit(dev); + else { + mlx4_CLOSE_HCA(dev, 0); + mlx4_free_icms(dev); + mlx4_UNMAP_FA(dev); + mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0); + } +} + +static int mlx4_init_slave(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + u64 dma = (u64) priv->mfunc.vhcr_dma; + int num_of_reset_retries = NUM_OF_RESET_RETRIES; + int ret_from_reset = 0; + u32 slave_read; + u32 cmd_channel_ver; + + down(&priv->cmd.slave_sem); + priv->cmd.max_cmds = 1; + mlx4_warn(dev, "Sending reset\n"); + ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, + MLX4_COMM_TIME); + /* if we are in the middle of flr the slave will try + * NUM_OF_RESET_RETRIES times before leaving.*/ + if (ret_from_reset) { + if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) { + msleep(SLEEP_TIME_IN_RESET); + while (ret_from_reset && num_of_reset_retries) { + mlx4_warn(dev, "slave is currently in the" + "middle of FLR. retrying..." + "(try num:%d)\n", + (NUM_OF_RESET_RETRIES - + num_of_reset_retries + 1)); + ret_from_reset = + mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, + 0, MLX4_COMM_TIME); + num_of_reset_retries = num_of_reset_retries - 1; + } + } else + goto err; + } + + /* check the driver version - the slave I/F revision + * must match the master's */ + slave_read = swab32(readl(&priv->mfunc.comm->slave_read)); + cmd_channel_ver = mlx4_comm_get_version(); + + if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) != + MLX4_COMM_GET_IF_REV(slave_read)) { + mlx4_err(dev, "slave driver version is not supported" + " by the master\n"); + goto err; + } + + mlx4_warn(dev, "Sending vhcr0\n"); + if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48, + MLX4_COMM_TIME)) + goto err; + if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32, + MLX4_COMM_TIME)) + goto err; + if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16, + MLX4_COMM_TIME)) + goto err; + if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME)) + goto err; + up(&priv->cmd.slave_sem); + return 0; + +err: + mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0); + up(&priv->cmd.slave_sem); + return -EIO; +} + +static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev) +{ + int i; + + for (i = 1; i <= dev->caps.num_ports; i++) { + dev->caps.gid_table_len[i] = 1; + dev->caps.pkey_table_len[i] = + dev->phys_caps.pkey_phys_table_len[i] - 1; + } +} + +static int mlx4_init_hca(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_adapter adapter; + struct mlx4_dev_cap dev_cap; + struct mlx4_mod_stat_cfg mlx4_cfg; + struct mlx4_profile profile; + struct mlx4_init_hca_param init_hca; + u64 icm_size; + int err; + + if (!mlx4_is_slave(dev)) { + err = mlx4_QUERY_FW(dev); + if (err) { + if (err == -EACCES) + mlx4_info(dev, "non-primary physical function, skipping.\n"); + else + mlx4_err(dev, "QUERY_FW command failed, aborting.\n"); + return err; + } + + err = mlx4_load_fw(dev); + if (err) { + mlx4_err(dev, "Failed to start FW, aborting.\n"); + return err; + } + + mlx4_cfg.log_pg_sz_m = 1; + mlx4_cfg.log_pg_sz = 0; + err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg); + if (err) + mlx4_warn(dev, "Failed to override log_pg_sz parameter\n"); + + err = mlx4_dev_cap(dev, &dev_cap); + if (err) { + mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); + goto err_stop_fw; + } + + if (mlx4_is_master(dev)) + mlx4_parav_master_pf_caps(dev); + + profile = default_profile; + + icm_size = mlx4_make_profile(dev, &profile, &dev_cap, + &init_hca); + if ((long long) icm_size < 0) { + err = icm_size; + goto err_stop_fw; + } + + dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1; + + init_hca.log_uar_sz = ilog2(dev->caps.num_uars); + init_hca.uar_page_sz = PAGE_SHIFT - 12; + + err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size); + if (err) + goto err_stop_fw; + + err = mlx4_INIT_HCA(dev, &init_hca); + if (err) { + mlx4_err(dev, "INIT_HCA command failed, aborting.\n"); + goto err_free_icm; + } + } else { + err = mlx4_init_slave(dev); + if (err) { + mlx4_err(dev, "Failed to initialize slave\n"); + return err; + } + + err = mlx4_slave_cap(dev); + if (err) { + mlx4_err(dev, "Failed to obtain slave caps\n"); + goto err_close; + } + } + +#ifdef __VMKERNEL_BF_ENABLE__ + if (map_bf_area(dev)) + mlx4_dbg(dev, "Failed to map blue flame area\n"); +#endif /* __VMKERNEL_BF_ENABLE__ */ + + /*Only the master set the ports, all the rest got it from it.*/ + if (!mlx4_is_slave(dev)) + mlx4_set_port_mask(dev); + + err = mlx4_QUERY_ADAPTER(dev, &adapter); + if (err) { + mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n"); +#ifdef __VMKERNEL_BF_ENABLE__ + goto unmap_bf; +#else + goto err_close; +#endif /* __VMKERNEL_BF_ENABLE__ */ + } + + priv->eq_table.inta_pin = adapter.inta_pin; + memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id); + + return 0; + +#ifdef __VMKERNEL_BF_ENABLE__ +unmap_bf: + unmap_bf_area(dev); +#endif /* __VMKERNEL_BF_ENABLE__ */ +err_close: + mlx4_close_hca(dev); + +err_free_icm: + if (!mlx4_is_slave(dev)) + mlx4_free_icms(dev); + +err_stop_fw: + if (!mlx4_is_slave(dev)) { + mlx4_UNMAP_FA(dev); + mlx4_free_icm(dev, priv->fw.fw_icm, 0); + } + return err; +} + +static int mlx4_init_counters_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int nent; + + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) + return -ENOENT; + + nent = dev->caps.max_counters; + return mlx4_bitmap_init(&priv->counters_bitmap, nent, nent - 1, 0, 0); +} + +static void mlx4_cleanup_counters_table(struct mlx4_dev *dev) +{ + mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap); +} + +int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) + return -ENOENT; + + *idx = mlx4_bitmap_alloc(&priv->counters_bitmap); + if (*idx == -1) + return -ENOMEM; + + return 0; +} + +int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx) +{ + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + err = mlx4_cmd_imm(dev, 0, &out_param, RES_COUNTER, + RES_OP_RESERVE, MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (!err) + *idx = get_param_l(&out_param); + + return err; + } + return __mlx4_counter_alloc(dev, idx); +} +EXPORT_SYMBOL_GPL(mlx4_counter_alloc); + +void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx) +{ + mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx); + return; +} + +void mlx4_counter_free(struct mlx4_dev *dev, u32 idx) +{ + u64 in_param; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, idx); + mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE, + MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); + return; + } + __mlx4_counter_free(dev, idx); +} +EXPORT_SYMBOL_GPL(mlx4_counter_free); + +static int mlx4_setup_hca(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int err; + int port; + __be32 ib_port_default_caps; + + err = mlx4_init_uar_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "user access region table, aborting.\n"); + return err; + } + + err = mlx4_uar_alloc(dev, &priv->driver_uar); + if (err) { + mlx4_err(dev, "Failed to allocate driver access region, " + "aborting.\n"); + goto err_uar_table_free; + } + + priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); + if (!priv->kar) { + mlx4_err(dev, "Couldn't map kernel access region, " + "aborting.\n"); + err = -ENOMEM; + goto err_uar_free; + } + + err = mlx4_init_pd_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "protection domain table, aborting.\n"); + goto err_kar_unmap; + } + + err = mlx4_init_xrcd_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "reliable connection domain table, aborting.\n"); + goto err_pd_table_free; + } + + err = mlx4_init_mr_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "memory region table, aborting.\n"); + goto err_xrcd_table_free; + } + + err = mlx4_init_eq_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "event queue table, aborting.\n"); + goto err_mr_table_free; + } + + err = mlx4_cmd_use_events(dev); + if (err) { + mlx4_err(dev, "Failed to switch to event-driven " + "firmware commands, aborting.\n"); + goto err_eq_table_free; + } + + err = mlx4_NOP(dev); + if (err) { + if (dev->flags & MLX4_FLAG_MSI_X) { + mlx4_warn(dev, "NOP command failed to generate MSI-X " + "interrupt IRQ %d).\n", + priv->eq_table.eq[dev->caps.num_comp_vectors].irq); + mlx4_warn(dev, "Trying again without MSI-X.\n"); + } else { + mlx4_err(dev, "NOP command failed to generate interrupt " + "(IRQ %d), aborting.\n", + priv->eq_table.eq[dev->caps.num_comp_vectors].irq); + mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n"); + } + + goto err_cmd_poll; + } + + mlx4_dbg(dev, "NOP command IRQ test passed\n"); + + err = mlx4_init_cq_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "completion queue table, aborting.\n"); + goto err_cmd_poll; + } + + err = mlx4_init_srq_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "shared receive queue table, aborting.\n"); + goto err_cq_table_free; + } + + err = mlx4_init_qp_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "queue pair table, aborting.\n"); + goto err_srq_table_free; + } + + if (!mlx4_is_slave(dev)) { + err = mlx4_init_mcg_table(dev); + if (err) { + mlx4_err(dev, "Failed to initialize " + "multicast group table, aborting.\n"); + goto err_qp_table_free; + } + } + + err = mlx4_init_counters_table(dev); + if (err && err != -ENOENT) { + mlx4_err(dev, "Failed to initialize counters table, aborting.\n"); + goto err_mcg_table_free; + } + + if (!mlx4_is_slave(dev)) { + int pkey_tbl_size; + for (port = 1; port <= dev->caps.num_ports; port++) { +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + if (!mlx4_is_mfunc(dev)) { + enum mlx4_port_type port_type = 0; + mlx4_SENSE_PORT(dev, port, &port_type); + if (port_type) + dev->caps.port_type[port] = port_type; + } +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + ib_port_default_caps = 0; + pkey_tbl_size = -1; + err = mlx4_get_port_ib_caps(dev, port, + &ib_port_default_caps); + if (err) + mlx4_warn(dev, "failed to get port %d default " + "ib capabilities (%d). Continuing " + "with caps = 0\n", port, err); + dev->caps.ib_port_def_cap[port] = ib_port_default_caps; + if (mtu_4k > 0) + dev->caps.port_ib_mtu[port] = IB_MTU_4096; + else + dev->caps.port_ib_mtu[port] = IB_MTU_2048; + if (dev->caps.port_type[port] == MLX4_PORT_TYPE_IB) + mlx4_info(dev, "port=%u IB MTU=%u\n", + port, ibta_mtu_to_int(dev->caps.port_ib_mtu[port])); + err = mlx4_check_ext_port_caps(dev, port); + if (err) + mlx4_warn(dev, "failed to get port %d extended " + "port capabilities support info (%d)." + " Assuming not supported\n", + port, err); + + if (mlx4_is_master(dev)) { + int i; + for (i = 0; i < dev->num_slaves; i++) + if (i != dev->caps.function) + priv->mfunc.master.slave_state[i].ib_cap_mask[port] = + ib_port_default_caps; + pkey_tbl_size = dev->caps.pkey_table_len[port]; + } + + err = mlx4_SET_PORT(dev, port, pkey_tbl_size); + if (err) { + mlx4_err(dev, "Failed to set port %d, aborting\n", + port); + goto err_counters_table_free; + } + } + } + + return 0; + +err_counters_table_free: + mlx4_cleanup_counters_table(dev); + +err_mcg_table_free: + mlx4_cleanup_mcg_table(dev); + +err_qp_table_free: + mlx4_cleanup_qp_table(dev); + +err_srq_table_free: + mlx4_cleanup_srq_table(dev); + +err_cq_table_free: + mlx4_cleanup_cq_table(dev); + +err_cmd_poll: + mlx4_cmd_use_polling(dev); + +err_eq_table_free: + mlx4_cleanup_eq_table(dev); + +err_mr_table_free: + mlx4_cleanup_mr_table(dev); + +err_xrcd_table_free: + mlx4_cleanup_xrcd_table(dev); + +err_pd_table_free: + mlx4_cleanup_pd_table(dev); + +err_kar_unmap: + iounmap(priv->kar); + +err_uar_free: + mlx4_uar_free(dev, &priv->driver_uar); + +err_uar_table_free: + mlx4_cleanup_uar_table(dev); + return err; +} + +static void mlx4_enable_msi_x(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct msix_entry *entries; + int nreq = min_t(int, dev->caps.num_ports * + min_t(int, num_online_cpus() + 1, MAX_MSIX_P_PORT) + + MSIX_LEGACY_SZ, MAX_MSIX); + int err; + int i; + + if (msi_x) { + /* In multifunction mode each function gets 4 msi-X vectors + * 3 for data path completions and 1 for asynch events + * or command completions */ + if (mlx4_is_mfunc(dev)) { + nreq = 4; + } else { + nreq = min_t(int, dev->caps.num_eqs - + dev->caps.reserved_eqs, nreq); + } + + entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL); + if (!entries) + goto no_msi; + + for (i = 0; i < nreq; ++i) + entries[i].entry = i; + + retry: + err = pci_enable_msix(dev->pdev, entries, nreq); + if (err) { + /* Try again if at least 2 vectors are available */ + if (err > 1) { + mlx4_info(dev, "Requested %d vectors, " + "but only %d MSI-X vectors available, " + "trying again\n", nreq, err); + nreq = err; + goto retry; + } + kfree(entries); + goto no_msi; + } + + if (nreq < + MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) { + /*Working in legacy mode , all EQ's shared*/ + dev->caps.comp_pool = 0; + dev->caps.num_comp_vectors = nreq - 1; + } else { + dev->caps.comp_pool = nreq - MSIX_LEGACY_SZ; + dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1; + } + for (i = 0; i < nreq; ++i) + priv->eq_table.eq[i].irq = entries[i].vector; + + dev->flags |= MLX4_FLAG_MSI_X; + + kfree(entries); + return; + } + +no_msi: + dev->caps.num_comp_vectors = 1; + dev->caps.comp_pool = 0; + + for (i = 0; i < 2; ++i) + priv->eq_table.eq[i].irq = dev->pdev->irq; +} + +static int mlx4_init_port_info(struct mlx4_dev *dev, int port) +{ + struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; + int err = 0; + + info->dev = dev; + info->port = port; + if (!mlx4_is_slave(dev)) { + INIT_RADIX_TREE(&info->mac_tree, GFP_KERNEL); + mlx4_init_mac_table(dev, &info->mac_table); + mlx4_init_vlan_table(dev, &info->vlan_table); + info->base_qpn = + dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] + + (port - 1) * (1 << log_num_mac); + } + + sprintf(info->dev_name, "mlx4_port%d", port); +#ifdef __VMKERNEL_SYSFS_SUPPORT__ + info->port_attr.attr.name = info->dev_name; + if (mlx4_is_mfunc(dev)) + info->port_attr.attr.mode = S_IRUGO; + else { + info->port_attr.attr.mode = S_IRUGO | S_IWUSR; + info->port_attr.store = set_port_type; + } + info->port_attr.show = show_port_type; + sysfs_attr_init(&info->port_attr.attr); + + err = device_create_file(&dev->pdev->dev, &info->port_attr); + if (err) { + mlx4_err(dev, "Failed to create file for port %d\n", port); + info->port = -1; + } +#endif /* __VMKERNEL_SYSFS_SUPPORT__ */ + + sprintf(info->dev_mtu_name, "mlx4_port%d_mtu", port); +#ifdef __VMKERNEL_SYSFS_SUPPORT__ + info->port_mtu_attr.attr.name = info->dev_mtu_name; + if (mlx4_is_mfunc(dev)) + info->port_mtu_attr.attr.mode = S_IRUGO; + else { + info->port_mtu_attr.attr.mode = S_IRUGO | S_IWUSR; + info->port_mtu_attr.store = set_port_ib_mtu; + } + info->port_mtu_attr.show = show_port_ib_mtu; + sysfs_attr_init(&info->port_mtu_attr.attr); + + err = device_create_file(&dev->pdev->dev, &info->port_mtu_attr); + if (err) { + mlx4_err(dev, "Failed to create mtu file for port %d\n", port); + device_remove_file(&info->dev->pdev->dev, &info->port_attr); + info->port = -1; + } +#endif /* __VMKERNEL_SYSFS_SUPPORT__ */ + + return err; +} + +static void mlx4_cleanup_port_info(struct mlx4_port_info *info) +{ + if (info->port < 0) + return; + +#ifdef __VMKERNEL_SYSFS_SUPPORT__ + device_remove_file(&info->dev->pdev->dev, &info->port_attr); + device_remove_file(&info->dev->pdev->dev, &info->port_mtu_attr); +#endif /* __VMKERNEL_SYSFS_SUPPORT__ */ +} + +static int mlx4_init_steering(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int num_entries = dev->caps.num_ports; + int i, j; + + priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL); + if (!priv->steer) + return -ENOMEM; + + for (i = 0; i < num_entries; i++) + for (j = 0; j < MLX4_NUM_STEERS; j++) { + INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]); + INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]); + } + return 0; +} + +static void mlx4_clear_steering(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_steer_index *entry, *tmp_entry; + struct mlx4_promisc_qp *pqp, *tmp_pqp; + int num_entries = dev->caps.num_ports; + int i, j; + + for (i = 0; i < num_entries; i++) { + for (j = 0; j < MLX4_NUM_STEERS; j++) { + list_for_each_entry_safe(pqp, tmp_pqp, + &priv->steer[i].promisc_qps[j], + list) { + list_del(&pqp->list); + kfree(pqp); + } + list_for_each_entry_safe(entry, tmp_entry, + &priv->steer[i].steer_entries[j], + list) { + list_del(&entry->list); + list_for_each_entry_safe(pqp, tmp_pqp, + &entry->duplicates, + list) { + list_del(&pqp->list); + kfree(pqp); + } + kfree(entry); + } + } + } + kfree(priv->steer); +} + +static int extended_func_num(struct pci_dev *pdev) +{ + return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn); +} + +#define MLX4_OWNER_BASE 0x8069c +#define MLX4_OWNER_SIZE 4 + +static int mlx4_get_ownership(struct mlx4_dev *dev) +{ + void __iomem *owner; + u32 ret; + + owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE, + MLX4_OWNER_SIZE); + if (!owner) { + mlx4_err(dev, "Failed to obtain ownership bit\n"); + return -ENOMEM; + } + + ret = readl(owner); + iounmap(owner); + return (int) !!ret; +} + +static void mlx4_free_ownership(struct mlx4_dev *dev) +{ + void __iomem *owner; + + owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE, + MLX4_OWNER_SIZE); + if (!owner) { + mlx4_err(dev, "Failed to obtain ownership bit\n"); + return; + } + writel(0, owner); + msleep(1000); + iounmap(owner); +} + +static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id) +{ + struct mlx4_priv *priv; + struct mlx4_dev *dev; + int err; + int port; + + pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev)); + + err = pci_enable_device(pdev); + if (err) { + dev_err(&pdev->dev, "Cannot enable PCI device, " + "aborting.\n"); + return err; + } + if (num_vfs > MLX4_MAX_NUM_VF) { + printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n", + num_vfs, MLX4_MAX_NUM_VF); + return -EINVAL; + } + + if (num_vfs < 0) { + printk(KERN_ERR "num_vfs module parameter cannot be negative\n"); + return -EINVAL; + } + /* + * Check for BARs. + */ + if (((id == NULL) || !(id->driver_data & MLX4_VF)) && + !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { + dev_err(&pdev->dev, "Missing DCS, aborting." + "(id == 0X%p, id->driver_data: 0x%lx," + " pci_resource_flags(pdev, 0):0x%lx)\n", id, + id ? id->driver_data : 0, pci_resource_flags(pdev, 0)); + err = -ENODEV; + goto err_disable_pdev; + } + if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { + dev_err(&pdev->dev, "Missing UAR, aborting.\n"); + err = -ENODEV; + goto err_disable_pdev; + } + + err = pci_request_regions(pdev, DRV_NAME); + if (err) { + dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n"); + goto err_disable_pdev; + } + + pci_set_master(pdev); + + err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); + if (err) { + dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); + err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); + if (err) { + dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); + goto err_release_regions; + } + } + err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); + if (err) { + dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " + "consistent PCI DMA mask.\n"); + err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); + if (err) { + dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " + "aborting.\n"); + goto err_release_regions; + } + } + +#ifdef __VMKERNEL_LARGE_DMA_SEG_ENABLE__ + /* Allow large DMA segments, up to the firmware limit of 1 GB */ + dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024); +#endif /* __VMKERNEL_LARGE_DMA_SEG_ENABLE__ */ + + priv = kzalloc(sizeof *priv, GFP_KERNEL); + if (!priv) { + dev_err(&pdev->dev, "Device struct alloc failed, " + "aborting.\n"); + err = -ENOMEM; + goto err_release_regions; + } + + dev = &priv->dev; + dev->pdev = pdev; + INIT_LIST_HEAD(&priv->ctx_list); + spin_lock_init(&priv->ctx_lock); + + mutex_init(&priv->port_mutex); + + INIT_LIST_HEAD(&priv->pgdir_list); + mutex_init(&priv->pgdir_mutex); + +#ifdef __VMKERNEL_BF_ENABLE__ + INIT_LIST_HEAD(&priv->bf_list); + mutex_init(&priv->bf_mutex); +#endif /* __VMKERNEL_BF_ENABLE__ */ + + dev->rev_id = pdev->revision; + /* Detect if this device is a virtual function */ + if (id && id->driver_data & MLX4_VF) { + /* When acting as pf, we normally skip vfs unless explicitly + * requested to probe them. */ + if (num_vfs && extended_func_num(pdev) > probe_vf) { + mlx4_warn(dev, "Skipping virtual function:%d\n", + extended_func_num(pdev)); + err = -ENODEV; + goto err_free_dev; + } + mlx4_warn(dev, "Detected virtual function - running in slave mode\n"); + dev->flags |= MLX4_FLAG_SLAVE; + } else { + /* We reset the device and enable SRIOV only for physical + * devices. Try to claim ownership on the device; + * if already taken, skip -- do not allow multiple PFs */ + err = mlx4_get_ownership(dev); + if (err) { + if (err < 0) + goto err_free_dev; + else { + mlx4_warn(dev, "Multiple PFs not yet supported." + " Skipping PF.\n"); + err = -EINVAL; + goto err_free_dev; + } + } + + if (num_vfs) { + mlx4_warn(dev, "Enabling sriov with:%d vfs\n", num_vfs); +#ifdef __VMKERNEL_MODULE__ + if (!vmklnx_enable_vfs(pdev, num_vfs, NULL, NULL)) { +#else + err = pci_enable_sriov(pdev, num_vfs); + if (err) { +#endif /* __VMKERNEL_MODULE__ */ + mlx4_err(dev, "Failed to enable sriov," + "continuing without sriov enabled" + " (err = %d).\n", err); + num_vfs = 0; + err = 0; + } else { + mlx4_warn(dev, "Running in master mode\n"); + dev->flags |= MLX4_FLAG_SRIOV | + MLX4_FLAG_MASTER; + dev->num_vfs = num_vfs; + } + } + + /* + * Now reset the HCA before we touch the PCI capabilities or + * attempt a firmware command, since a boot ROM may have left + * the HCA in an undefined state. + */ + err = mlx4_reset(dev); + if (err) { + mlx4_err(dev, "Failed to reset HCA, aborting.\n"); + goto err_rel_own; + } + } + +slave_start: + err = mlx4_cmd_init(dev); + if (err) { + mlx4_err(dev, "Failed to init command interface, aborting.\n"); + goto err_sriov; + } + + /* In slave functions, the communication channel must be initialized + * before posting commands. Also, init num_slaves before calling + * mlx4_init_hca */ + if (mlx4_is_mfunc(dev)) { + if (mlx4_is_master(dev)) + dev->num_slaves = MLX4_MAX_NUM_SLAVES; + else { + dev->num_slaves = 0; + if (mlx4_multi_func_init(dev)) { + mlx4_err(dev, "Failed to init slave mfunc" + " interface, aborting.\n"); + goto err_cmd; + } + } + } + + err = mlx4_init_hca(dev); + if (err) { + if (err == -EACCES) { + /* Not primary Physical function + * Running in slave mode */ + mlx4_cmd_cleanup(dev); + dev->flags |= MLX4_FLAG_SLAVE; + dev->flags &= ~MLX4_FLAG_MASTER; + goto slave_start; + } else + goto err_mfunc; + } + + /* In master functions, the communication channel must be initialized + * after obtaining its address from fw */ + if (mlx4_is_master(dev)) { + if (mlx4_multi_func_init(dev)) { + mlx4_err(dev, "Failed to init master mfunc" + "interface, aborting.\n"); + goto err_close; + } + } + + err = mlx4_alloc_eq_table(dev); + if (err) + goto err_master_mfunc; + + priv->msix_ctl.pool_bm = 0; + mutex_init(&priv->msix_ctl.pool_lock); + + mlx4_enable_msi_x(dev); + if ((mlx4_is_mfunc(dev)) && + !(dev->flags & MLX4_FLAG_MSI_X)) { + mlx4_err(dev, "INTx is not supported in multi-function mode." + " aborting.\n"); + goto err_free_eq; + } + + if (!mlx4_is_slave(dev)) { + err = mlx4_init_steering(dev); + if (err) + goto err_free_eq; + } + + err = mlx4_setup_hca(dev); + if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) && + !mlx4_is_mfunc(dev)) { + dev->flags &= ~MLX4_FLAG_MSI_X; + pci_disable_msix(pdev); + err = mlx4_setup_hca(dev); + } + + if (err) + goto err_steer; + + for (port = 1; port <= dev->caps.num_ports; port++) { + err = mlx4_init_port_info(dev, port); + if (err) + goto err_port; + } + + err = mlx4_register_device(dev); + if (err) + goto err_port; + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + mlx4_sense_init(dev); + mlx4_start_sense(dev); +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + + pci_set_drvdata(pdev, dev); + + return 0; + +err_port: + for (--port; port >= 1; --port) + mlx4_cleanup_port_info(&priv->port[port]); + + mlx4_cleanup_counters_table(dev); + mlx4_cleanup_mcg_table(dev); + mlx4_cleanup_qp_table(dev); + mlx4_cleanup_srq_table(dev); + mlx4_cleanup_cq_table(dev); + mlx4_cmd_use_polling(dev); + mlx4_cleanup_eq_table(dev); + mlx4_cleanup_mr_table(dev); + mlx4_cleanup_xrcd_table(dev); + mlx4_cleanup_pd_table(dev); + mlx4_cleanup_uar_table(dev); + +err_steer: + if (!mlx4_is_slave(dev)) + mlx4_clear_steering(dev); + +err_free_eq: + mlx4_free_eq_table(dev); + +err_master_mfunc: + if (mlx4_is_master(dev)) + mlx4_multi_func_cleanup(dev); + +err_close: + if (dev->flags & MLX4_FLAG_MSI_X) + pci_disable_msix(pdev); + + mlx4_close_hca(dev); + +err_mfunc: + if (mlx4_is_slave(dev)) + mlx4_multi_func_cleanup(dev); + +err_cmd: + mlx4_cmd_cleanup(dev); + +err_sriov: + if (num_vfs && (dev->flags & MLX4_FLAG_SRIOV)) +#ifdef __VMKERNEL_MODULE__ + vmklnx_disable_vfs(pdev, num_vfs, NULL, NULL); +#else + pci_disable_sriov(pdev); +#endif /* __VMKERNEL_MODULE__ */ + +err_rel_own: + if (!mlx4_is_slave(dev)) + mlx4_free_ownership(dev); + +err_free_dev: + kfree(priv); + +err_release_regions: + pci_release_regions(pdev); + +err_disable_pdev: + pci_disable_device(pdev); + pci_set_drvdata(pdev, NULL); + return err; +} + +static int __devinit mlx4_init_one(struct pci_dev *pdev, + const struct pci_device_id *id) +{ + printk_once(KERN_INFO "%s", mlx4_version); + + return __mlx4_init_one(pdev, id); +} + +static void mlx4_remove_one(struct pci_dev *pdev) +{ + struct mlx4_dev *dev = pci_get_drvdata(pdev); + struct mlx4_priv *priv = mlx4_priv(dev); + int p; + + if (dev) { + + /* in SRIOV it is not allowed to unload the pf's + * driver while there are alive vf's */ + if (mlx4_is_master(dev)) { + if (mlx4_how_many_lives_vf(dev)) + printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n"); + } +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + mlx4_stop_sense(dev); +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + mlx4_unregister_device(dev); + + for (p = 1; p <= dev->caps.num_ports; p++) { + mlx4_cleanup_port_info(&priv->port[p]); + mlx4_CLOSE_PORT(dev, p); + } + + if (mlx4_is_master(dev)) + mlx4_free_resource_tracker(dev, 1); + + mlx4_cleanup_counters_table(dev); + mlx4_cleanup_mcg_table(dev); + mlx4_cleanup_qp_table(dev); + mlx4_cleanup_srq_table(dev); + mlx4_cleanup_cq_table(dev); + mlx4_cmd_use_polling(dev); + mlx4_cleanup_eq_table(dev); + mlx4_cleanup_mr_table(dev); + mlx4_cleanup_xrcd_table(dev); + mlx4_cleanup_pd_table(dev); + + iounmap(priv->kar); + mlx4_uar_free(dev, &priv->driver_uar); + mlx4_cleanup_uar_table(dev); + if (!mlx4_is_slave(dev)) + mlx4_clear_steering(dev); + mlx4_free_eq_table(dev); + if (mlx4_is_master(dev)) + mlx4_multi_func_cleanup(dev); + mlx4_close_hca(dev); + if (mlx4_is_slave(dev)) + mlx4_multi_func_cleanup(dev); + mlx4_cmd_cleanup(dev); + + if (dev->flags & MLX4_FLAG_MSI_X) + pci_disable_msix(pdev); + if (num_vfs && (dev->flags & MLX4_FLAG_SRIOV)) { + mlx4_warn(dev, "Disabling sriov\n"); +#ifdef __VMKERNEL_MODULE__ + vmklnx_disable_vfs(pdev, num_vfs, NULL, NULL); +#else + pci_disable_sriov(pdev); +#endif /* __VMKERNEL_MODULE__ */ + } + + if (!mlx4_is_slave(dev)) + mlx4_free_ownership(dev); + kfree(priv); + pci_release_regions(pdev); + pci_disable_device(pdev); + pci_set_drvdata(pdev, NULL); + } +} + +int mlx4_restart_one(struct pci_dev *pdev) +{ + mlx4_remove_one(pdev); + return __mlx4_init_one(pdev, NULL); +} + +static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = { + /* MT25408 "Hermon" SDR */ + { PCI_VDEVICE(MELLANOX, 0x6340), 0 }, + /* MT25408 "Hermon" DDR */ + { PCI_VDEVICE(MELLANOX, 0x634a), 0 }, + /* MT25408 "Hermon" QDR */ + { PCI_VDEVICE(MELLANOX, 0x6354), 0 }, + /* MT25408 "Hermon" DDR PCIe gen2 */ + { PCI_VDEVICE(MELLANOX, 0x6732), 0 }, + /* MT25408 "Hermon" QDR PCIe gen2 */ + { PCI_VDEVICE(MELLANOX, 0x673c), 0 }, + /* MT25408 "Hermon" EN 10GigE */ + { PCI_VDEVICE(MELLANOX, 0x6368), 0 }, + /* MT25408 "Hermon" EN 10GigE PCIe gen2 */ + { PCI_VDEVICE(MELLANOX, 0x6750), 0 }, + /* MT25458 ConnectX EN 10GBASE-T 10GigE */ + { PCI_VDEVICE(MELLANOX, 0x6372), 0 }, + /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */ + { PCI_VDEVICE(MELLANOX, 0x675a), 0 }, + /* MT26468 ConnectX EN 10GigE PCIe gen2*/ + { PCI_VDEVICE(MELLANOX, 0x6764), 0 }, + /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */ + { PCI_VDEVICE(MELLANOX, 0x6746), 0 }, + /* MT26478 ConnectX2 40GigE PCIe gen2 */ + { PCI_VDEVICE(MELLANOX, 0x676e), 0 }, + /* MT25400 Family [ConnectX-2 Virtual Function] */ + { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_VF }, + /* MT27500 Family [ConnectX-3] */ + { PCI_VDEVICE(MELLANOX, 0x1003), 0 }, + /* MT27500 Family [ConnectX-3 Virtual Function] */ + { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_VF }, + { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */ + { PCI_VDEVICE(MELLANOX, 0x1006), MLX4_VF }, /* MT27511 Family */ + { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */ + { PCI_VDEVICE(MELLANOX, 0x1008), MLX4_VF }, /* MT27521 Family */ + { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */ + { PCI_VDEVICE(MELLANOX, 0x100a), MLX4_VF }, /* MT27531 Family */ + { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */ + { PCI_VDEVICE(MELLANOX, 0x100c), MLX4_VF }, /* MT27541 Family */ + { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */ + { PCI_VDEVICE(MELLANOX, 0x100e), MLX4_VF }, /* MT27551 Family */ + { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */ + { PCI_VDEVICE(MELLANOX, 0x1010), MLX4_VF }, /* MT27561 Family */ + { 0, } +}; + +MODULE_DEVICE_TABLE(pci, mlx4_pci_table); + +static struct pci_driver mlx4_driver = { + .name = DRV_NAME, + .id_table = mlx4_pci_table, + .probe = mlx4_init_one, + .remove = __devexit_p(mlx4_remove_one) +}; + +static int __init mlx4_verify_params(void) +{ + if ((log_num_mac < 0) || (log_num_mac > 7)) { + pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac); + return -1; + } +#ifndef __VMKERNEL_MODULE__ + if (log_num_vlan != 0) + pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n", + MLX4_LOG_NUM_VLANS); +#endif /* __VMKERNEL_MODULE__ */ + + if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) { + pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); + return -1; + } + + /* Check if module param for ports type has legal combination */ + if (port_type_array[0] == false && port_type_array[1] == true) { + printk(KERN_WARNING "Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n"); + port_type_array[0] = true; + } + + return 0; +} + +static int __init mlx4_init(void) +{ + int ret; + +#ifdef __MEMTRACK__ + init_memtrack_module("mlx4_core"); +#endif + + if (mlx4_verify_params()) { + ret = -EINVAL; + goto out; + } + + mlx4_catas_init(); + + mlx4_wq = create_singlethread_workqueue("mlx4"); + if (!mlx4_wq) { + ret = -ENOMEM; + goto out; + } + + ret = pci_register_driver(&mlx4_driver); + if (ret) { + destroy_workqueue(mlx4_wq); + goto out; + } + return ret; +out: +#ifdef __MEMTRACK__ + cleanup_memtrack_module(); +#endif + return ret; +} + +static void __exit mlx4_cleanup(void) +{ + pci_unregister_driver(&mlx4_driver); + destroy_workqueue(mlx4_wq); + +#ifdef __MEMTRACK__ + cleanup_memtrack_module(); +#endif +} + +module_init(mlx4_init); +module_exit(mlx4_cleanup); diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mcg.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mcg.c new file mode 100755 index 0000000..6ff2d76 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mcg.c @@ -0,0 +1,1090 @@ +/* + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2007-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include + +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "mlx4.h" + +#define MGM_QPN_MASK 0x00FFFFFF +#define MGM_BLCK_LB_BIT 30 + +static const u8 zero_gid[16]; /* automatically initialized to 0 */ + +struct mlx4_mgm { + __be32 next_gid_index; + __be32 members_count; + u32 reserved[2]; + u8 gid[16]; + __be32 qp[MLX4_MAX_QP_PER_MGM]; +}; + +int mlx4_get_mgm_entry_size(struct mlx4_dev *dev) +{ + return min((1 << mlx4_log_num_mgm_entry_size), MLX4_MAX_MGM_ENTRY_SIZE); +} + +int mlx4_get_qp_per_mgm(struct mlx4_dev *dev) +{ + return 4 * (mlx4_get_mgm_entry_size(dev) / 16 - 2); +} + +static int mlx4_READ_ENTRY(struct mlx4_dev *dev, int index, + struct mlx4_cmd_mailbox *mailbox) +{ + return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); +} + +static int mlx4_WRITE_ENTRY(struct mlx4_dev *dev, int index, + struct mlx4_cmd_mailbox *mailbox) +{ + return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); +} + +static int mlx4_WRITE_PROMISC(struct mlx4_dev *dev, u8 port, u8 steer, + struct mlx4_cmd_mailbox *mailbox) +{ + u32 in_mod; + + in_mod = (u32) port << 16 | steer << 1; + return mlx4_cmd(dev, mailbox->dma, in_mod, 0x1, + MLX4_CMD_WRITE_MCG, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); +} + +static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + u16 *hash, u8 op_mod) +{ + u64 imm; + int err; + + err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod, + MLX4_CMD_MGID_HASH, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); + + if (!err) + *hash = imm; + + return err; +} + +static struct mlx4_promisc_qp *get_promisc_qp(struct mlx4_dev *dev, u8 port, + enum mlx4_steer_type steer, + u32 qpn) +{ + struct mlx4_steer *s_steer = &mlx4_priv(dev)->steer[port - 1]; + struct mlx4_promisc_qp *pqp; + + list_for_each_entry(pqp, &s_steer->promisc_qps[steer], list) { + if (pqp->qpn == qpn) + return pqp; + } + /* not found */ + return NULL; +} + +/* + * When working with netq the default queue is promisc and we don't + * want it to continue receiving the packets from other queues as well + */ +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) +/* + * Add new entry to steering data structure. + * All promisc QPs should be added as well + */ +static int new_steering_entry(struct mlx4_dev *dev, u8 port, + enum mlx4_steer_type steer, + unsigned int index, u32 qpn) +{ + struct mlx4_steer *s_steer; + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_mgm *mgm; + u32 members_count; + struct mlx4_steer_index *new_entry; + struct mlx4_promisc_qp *pqp; + struct mlx4_promisc_qp *dqp = NULL; + u32 prot; + int err; + + s_steer = &mlx4_priv(dev)->steer[port - 1]; + new_entry = kzalloc(sizeof *new_entry, GFP_KERNEL); + if (!new_entry) + return -ENOMEM; + + INIT_LIST_HEAD(&new_entry->duplicates); + new_entry->index = index; + list_add_tail(&new_entry->list, &s_steer->steer_entries[steer]); + + /* If the given qpn is also a promisc qp, + * it should be inserted to duplicates list + */ + pqp = get_promisc_qp(dev, port, steer, qpn); + if (pqp) { + dqp = kmalloc(sizeof *dqp, GFP_KERNEL); + if (!dqp) { + err = -ENOMEM; + goto out_alloc; + } + dqp->qpn = qpn; + list_add_tail(&dqp->list, &new_entry->duplicates); + } + + /* if no promisc qps for this vep, we are done */ + if (list_empty(&s_steer->promisc_qps[steer])) + return 0; + + /* now need to add all the promisc qps to the new + * steering entry, as they should also receive the packets + * destined to this address */ + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + err = -ENOMEM; + goto out_alloc; + } + mgm = mailbox->buf; + + err = mlx4_READ_ENTRY(dev, index, mailbox); + if (err) + goto out_mailbox; + + members_count = be32_to_cpu(mgm->members_count) & 0xffffff; + prot = be32_to_cpu(mgm->members_count) >> 30; + list_for_each_entry(pqp, &s_steer->promisc_qps[steer], list) { + /* don't add already existing qpn */ + if (pqp->qpn == qpn) + continue; + if (members_count == dev->caps.num_qp_per_mgm) { + /* out of space */ + err = -ENOMEM; + goto out_mailbox; + } + + /* add the qpn */ + mgm->qp[members_count++] = cpu_to_be32(pqp->qpn & MGM_QPN_MASK); + } + /* update the qps count and update the entry with all the promisc qps*/ + mgm->members_count = cpu_to_be32(members_count | (prot << 30)); + err = mlx4_WRITE_ENTRY(dev, index, mailbox); + +out_mailbox: + mlx4_free_cmd_mailbox(dev, mailbox); + if (!err) + return 0; +out_alloc: + if (dqp) { + list_del(&dqp->list); + kfree(dqp); + } + list_del(&new_entry->list); + kfree(new_entry); + return err; +} +#else +/* + * Add new entry to steering data structure. + * Not need All promisc QPs should be added as well. + */ +static int new_steering_entry(struct mlx4_dev *dev, u8 port, + enum mlx4_steer_type steer, + unsigned int index, u32 qpn) +{ + struct mlx4_steer *s_steer; + struct mlx4_steer_index *new_entry; + + s_steer = &mlx4_priv(dev)->steer[port - 1]; + new_entry = kzalloc(sizeof *new_entry, GFP_KERNEL); + if (!new_entry) + return -ENOMEM; + + INIT_LIST_HEAD(&new_entry->duplicates); + new_entry->index = index; + list_add_tail(&new_entry->list, &s_steer->steer_entries[steer]); + return 0; +} +#endif /* NOT NET QUEUE */ + +/* update the data structures with existing steering entry */ +static int existing_steering_entry(struct mlx4_dev *dev, u8 port, + enum mlx4_steer_type steer, + unsigned int index, u32 qpn) +{ + struct mlx4_steer *s_steer; + struct mlx4_steer_index *tmp_entry, *entry = NULL; + struct mlx4_promisc_qp *pqp; + struct mlx4_promisc_qp *dqp; + + s_steer = &mlx4_priv(dev)->steer[port - 1]; + + pqp = get_promisc_qp(dev, port, steer, qpn); + if (!pqp) + return 0; /* nothing to do */ + + list_for_each_entry(tmp_entry, &s_steer->steer_entries[steer], list) { + if (tmp_entry->index == index) { + entry = tmp_entry; + break; + } + } + if (unlikely(!entry)) { + mlx4_warn(dev, "Steering entry at index %x is not registered\n", index); + return -EINVAL; + } + + /* the given qpn is listed as a promisc qpn + * we need to add it as a duplicate to this entry + * for future references */ + list_for_each_entry(dqp, &entry->duplicates, list) { + if (qpn == pqp->qpn) + return 0; /* qp is already duplicated */ + } + + /* add the qp as a duplicate on this index */ + dqp = kmalloc(sizeof *dqp, GFP_KERNEL); + if (!dqp) + return -ENOMEM; + dqp->qpn = qpn; + list_add_tail(&dqp->list, &entry->duplicates); + + return 0; +} + +/* Check whether a qpn is a duplicate on steering entry + * If so, it should not be removed from mgm */ +static bool check_duplicate_entry(struct mlx4_dev *dev, u8 port, + enum mlx4_steer_type steer, + unsigned int index, u32 qpn) +{ + struct mlx4_steer *s_steer; + struct mlx4_steer_index *tmp_entry, *entry = NULL; + struct mlx4_promisc_qp *dqp, *tmp_dqp; + + s_steer = &mlx4_priv(dev)->steer[port - 1]; + + /* if qp is not promisc, it cannot be duplicated */ + if (!get_promisc_qp(dev, port, steer, qpn)) + return false; + + /* The qp is promisc qp so it is a duplicate on this index + * Find the index entry, and remove the duplicate */ + list_for_each_entry(tmp_entry, &s_steer->steer_entries[steer], list) { + if (tmp_entry->index == index) { + entry = tmp_entry; + break; + } + } + if (unlikely(!entry)) { + mlx4_warn(dev, "Steering entry for index %x is not registered\n", index); + return false; + } + list_for_each_entry_safe(dqp, tmp_dqp, &entry->duplicates, list) { + if (dqp->qpn == qpn) { + list_del(&dqp->list); + kfree(dqp); + } + } + return true; +} + +/* I a steering entry contains only promisc QPs, it can be removed. */ +static bool can_remove_steering_entry(struct mlx4_dev *dev, u8 port, + enum mlx4_steer_type steer, + unsigned int index, u32 tqpn) +{ + struct mlx4_steer *s_steer; + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_mgm *mgm; + struct mlx4_steer_index *entry = NULL, *tmp_entry; + u32 qpn; + u32 members_count; + bool ret = false; + int i; + + s_steer = &mlx4_priv(dev)->steer[port - 1]; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return false; + mgm = mailbox->buf; + + if (mlx4_READ_ENTRY(dev, index, mailbox)) + goto out; + members_count = be32_to_cpu(mgm->members_count) & 0xffffff; + for (i = 0; i < members_count; i++) { + qpn = be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK; + if (!get_promisc_qp(dev, port, steer, qpn) && qpn != tqpn) { + /* the qp is not promisc, the entry can't be removed */ + goto out; + } + } + /* All the qps currently registered for this entry are promiscuous, + * Checking for duplicates */ + ret = true; + list_for_each_entry_safe(entry, tmp_entry, &s_steer->steer_entries[steer], list) { + if (entry->index == index) { + if (list_empty(&entry->duplicates) || members_count == 1) { + struct mlx4_promisc_qp *pqp, *tmp_pqp; + /* + * If there is only 1 entry in duplicates than + * this is the QP we want to delete, going over + * the list and deleting the entry. + */ + list_del(&entry->list); + list_for_each_entry_safe(pqp, tmp_pqp, + &entry->duplicates, + list) { + list_del(&pqp->list); + kfree(pqp); + } + kfree(entry); + } else { + /* This entry contains duplicates so it shouldn't be removed */ + ret = false; + goto out; + } + } + } + +out: + mlx4_free_cmd_mailbox(dev, mailbox); + return ret; +} + +static int add_promisc_qp(struct mlx4_dev *dev, u8 port, + enum mlx4_steer_type steer, u32 qpn) +{ + struct mlx4_steer *s_steer; + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_mgm *mgm; +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) + struct mlx4_steer_index *entry; +#endif /* NOT NET QUEUE */ + struct mlx4_promisc_qp *pqp; + struct mlx4_promisc_qp *dqp; + u32 members_count; +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) + u32 prot; + int i; + bool found; + int last_index; +#endif /* NOT NET QUEUE */ + int err; + struct mlx4_priv *priv = mlx4_priv(dev); + + s_steer = &mlx4_priv(dev)->steer[port - 1]; + + mutex_lock(&priv->mcg_table.mutex); + + if (get_promisc_qp(dev, port, steer, qpn)) { + err = 0; /* Noting to do, already exists */ + goto out_mutex; + } + + pqp = kmalloc(sizeof *pqp, GFP_KERNEL); + if (!pqp) { + err = -ENOMEM; + goto out_mutex; + } + pqp->qpn = qpn; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + err = -ENOMEM; + goto out_alloc; + } + mgm = mailbox->buf; + + /* + * When working with netq the default queue is promisc and we don't + * want it to continue receiving the packets from other queues as well + */ +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) + /* the promisc qp needs to be added for each one of the steering + * entries, if it already exists, needs to be added as a duplicate + * for this entry */ + list_for_each_entry(entry, &s_steer->steer_entries[steer], list) { + err = mlx4_READ_ENTRY(dev, entry->index, mailbox); + if (err) + goto out_mailbox; + + members_count = be32_to_cpu(mgm->members_count) & 0xffffff; + prot = be32_to_cpu(mgm->members_count) >> 30; + found = false; + for (i = 0; i < members_count; i++) { + if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qpn) { + /* Entry already exists, add to duplicates */ + dqp = kmalloc(sizeof *dqp, GFP_KERNEL); + if (!dqp) + goto out_mailbox; + dqp->qpn = qpn; + list_add_tail(&dqp->list, &entry->duplicates); + found = true; + } + } + if (!found) { + /* Need to add the qpn to mgm */ + if (members_count == dev->caps.num_qp_per_mgm) { + /* entry is full */ + err = -ENOMEM; + goto out_mailbox; + } + mgm->qp[members_count++] = cpu_to_be32(qpn & MGM_QPN_MASK); + mgm->members_count = cpu_to_be32(members_count | (prot << 30)); + err = mlx4_WRITE_ENTRY(dev, entry->index, mailbox); + if (err) + goto out_mailbox; + } + last_index = entry->index; + } +#endif /* NOT NET QUEUE */ + + /* add the new qpn to list of promisc qps */ + list_add_tail(&pqp->list, &s_steer->promisc_qps[steer]); + /* now need to add all the promisc qps to default entry */ + memset(mgm, 0, sizeof *mgm); + members_count = 0; + list_for_each_entry(dqp, &s_steer->promisc_qps[steer], list) { + if (members_count == dev->caps.num_qp_per_mgm) { + /* entry is full */ + err = -ENOMEM; + goto out_list; + } + mgm->qp[members_count++] = cpu_to_be32(dqp->qpn & MGM_QPN_MASK); + } + mgm->members_count = cpu_to_be32(members_count | MLX4_PROT_ETH << 30); + + err = mlx4_WRITE_PROMISC(dev, port, steer, mailbox); + if (err) + goto out_list; + + mlx4_free_cmd_mailbox(dev, mailbox); + mutex_unlock(&priv->mcg_table.mutex); + return 0; + +out_list: + list_del(&pqp->list); +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) +out_mailbox: +#endif /* NOT NET QUEUE */ + mlx4_free_cmd_mailbox(dev, mailbox); +out_alloc: + kfree(pqp); +out_mutex: + mutex_unlock(&priv->mcg_table.mutex); + return err; +} + +static int remove_promisc_qp(struct mlx4_dev *dev, u8 port, + enum mlx4_steer_type steer, u32 qpn) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_steer *s_steer; + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_mgm *mgm; +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) + struct mlx4_steer_index *entry; +#endif /* NOT NET QUEUE */ + struct mlx4_promisc_qp *pqp; + struct mlx4_promisc_qp *dqp; + u32 members_count; +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) + bool found; +#endif /* NOT NET QUEUE */ + bool back_to_list = false; +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) + int loc, i; +#endif /* NOT NET QUEUE */ + int err; + + s_steer = &mlx4_priv(dev)->steer[port - 1]; + mutex_lock(&priv->mcg_table.mutex); + + pqp = get_promisc_qp(dev, port, steer, qpn); + if (unlikely(!pqp)) { + mlx4_warn(dev, "QP %x is not promiscuous QP\n", qpn); + /* nothing to do */ + err = 0; + goto out_mutex; + } + + /*remove from list of promisc qps */ + list_del(&pqp->list); + + /* set the default entry not to include the removed one */ + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + err = -ENOMEM; + back_to_list = true; + goto out_list; + } + mgm = mailbox->buf; + memset(mgm, 0, sizeof *mgm); + members_count = 0; + list_for_each_entry(dqp, &s_steer->promisc_qps[steer], list) + mgm->qp[members_count++] = cpu_to_be32(dqp->qpn & MGM_QPN_MASK); + mgm->members_count = cpu_to_be32(members_count | MLX4_PROT_ETH << 30); + + err = mlx4_WRITE_PROMISC(dev, port, steer, mailbox); + if (err) + goto out_mailbox; + + /* + * When working with netq the default queue is promisc and we don't + * want it to continue receiving the packets from other queues as well + */ +#if !defined(__VMKLNX__) || !defined(__VMKNETDDI_QUEUEOPS__) + /* remove the qp from all the steering entries*/ + list_for_each_entry(entry, &s_steer->steer_entries[steer], list) { + found = false; + list_for_each_entry(dqp, &entry->duplicates, list) { + if (dqp->qpn == qpn) { + found = true; + break; + } + } + if (found) { + /* a duplicate, no need to change the mgm, + * only update the duplicates list */ + list_del(&dqp->list); + kfree(dqp); + } else { + err = mlx4_READ_ENTRY(dev, entry->index, mailbox); + if (err) + goto out_mailbox; + members_count = be32_to_cpu(mgm->members_count) & 0xffffff; + for (loc = -1, i = 0; i < members_count; ++i) + if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qpn) + loc = i; + + mgm->members_count = cpu_to_be32(--members_count | + (MLX4_PROT_ETH << 30)); + mgm->qp[loc] = mgm->qp[i - 1]; + mgm->qp[i - 1] = 0; + + err = mlx4_WRITE_ENTRY(dev, entry->index, mailbox); + if (err) + goto out_mailbox; + } + + } +#endif /* NOT NET QUEUE */ + +out_mailbox: + mlx4_free_cmd_mailbox(dev, mailbox); +out_list: + if (back_to_list) + list_add_tail(&pqp->list, &s_steer->promisc_qps[steer]); + else + kfree(pqp); +out_mutex: + mutex_unlock(&priv->mcg_table.mutex); + return err; +} + +/* + * Caller must hold MCG table semaphore. gid and mgm parameters must + * be properly aligned for command interface. + * + * Returns 0 unless a firmware command error occurs. + * + * If GID is found in MGM or MGM is empty, *index = *hash, *prev = -1 + * and *mgm holds MGM entry. + * + * if GID is found in AMGM, *index = index in AMGM, *prev = index of + * previous entry in hash chain and *mgm holds AMGM entry. + * + * If no AMGM exists for given gid, *index = -1, *prev = index of last + * entry in hash chain and *mgm holds end of hash chain. + */ +static int find_entry(struct mlx4_dev *dev, u8 port, + u8 *gid, enum mlx4_protocol prot, + struct mlx4_cmd_mailbox *mgm_mailbox, + int *prev, int *index) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_mgm *mgm = mgm_mailbox->buf; + u8 *mgid; + int err; + u16 hash; + u8 op_mod = (prot == MLX4_PROT_ETH) ? + !!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) : 0; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return -ENOMEM; + mgid = mailbox->buf; + + memcpy(mgid, gid, 16); + + err = mlx4_GID_HASH(dev, mailbox, &hash, op_mod); + mlx4_free_cmd_mailbox(dev, mailbox); + if (err) + return err; + + if (0) + mlx4_dbg(dev, "Hash for %pI6 is %04x\n", gid, hash); + + *index = hash; + *prev = -1; + + do { + err = mlx4_READ_ENTRY(dev, *index, mgm_mailbox); + if (err) + return err; + + if (!(be32_to_cpu(mgm->members_count) & 0xffffff)) { + if (*index != hash) { + mlx4_err(dev, "Found zero MGID in AMGM.\n"); + err = -EINVAL; + } + return err; + } + + if (!memcmp(mgm->gid, gid, 16) && + be32_to_cpu(mgm->members_count) >> 30 == prot) + return err; + + *prev = *index; + *index = be32_to_cpu(mgm->next_gid_index) >> 6; + } while (*index); + + *index = -1; + return err; +} + +int mlx4_qp_attach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + int block_mcast_loopback, enum mlx4_protocol prot, + enum mlx4_steer_type steer) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_mgm *mgm; + u32 members_count; + int index, prev; + int link = 0; + int i; + int err; + u8 port = gid[5]; + u8 new_entry = 0; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + mgm = mailbox->buf; + + mutex_lock(&priv->mcg_table.mutex); + err = find_entry(dev, port, gid, prot, + mailbox, &prev, &index); + if (err) + goto out; + + if (index != -1) { + if (!(be32_to_cpu(mgm->members_count) & 0xffffff)) { + new_entry = 1; + memcpy(mgm->gid, gid, 16); + } + } else { + link = 1; + + index = mlx4_bitmap_alloc(&priv->mcg_table.bitmap); + if (index == -1) { + mlx4_err(dev, "No AMGM entries left\n"); + err = -ENOMEM; + goto out; + } + index += dev->caps.num_mgms; + + new_entry = 1; + memset(mgm, 0, sizeof *mgm); + memcpy(mgm->gid, gid, 16); + } + + members_count = be32_to_cpu(mgm->members_count) & 0xffffff; + if (members_count == dev->caps.num_qp_per_mgm) { + mlx4_err(dev, "MGM at index %x is full.\n", index); + err = -ENOMEM; + goto out; + } + + for (i = 0; i < members_count; ++i) + if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn) { + mlx4_dbg(dev, "QP %06x already a member of MGM\n", qp->qpn); + err = 0; + goto out; + } + + if (block_mcast_loopback) + mgm->qp[members_count++] = cpu_to_be32((qp->qpn & MGM_QPN_MASK) | + (1U << MGM_BLCK_LB_BIT)); + else + mgm->qp[members_count++] = cpu_to_be32(qp->qpn & MGM_QPN_MASK); + + mgm->members_count = cpu_to_be32(members_count | (u32) prot << 30); + + err = mlx4_WRITE_ENTRY(dev, index, mailbox); + if (err) + goto out; + + if (!link) + goto out; + + err = mlx4_READ_ENTRY(dev, prev, mailbox); + if (err) + goto out; + + mgm->next_gid_index = cpu_to_be32(index << 6); + + err = mlx4_WRITE_ENTRY(dev, prev, mailbox); + if (err) + goto out; + +out: + if (prot == MLX4_PROT_ETH) { + /* manage the steering entry for promisc mode */ + if (new_entry) + new_steering_entry(dev, port, steer, index, qp->qpn); + else + existing_steering_entry(dev, port, steer, + index, qp->qpn); + } + if (err && link && index != -1) { + if (index < dev->caps.num_mgms) + mlx4_warn(dev, "Got AMGM index %d < %d", + index, dev->caps.num_mgms); + else + mlx4_bitmap_free(&priv->mcg_table.bitmap, + index - dev->caps.num_mgms); + } + mutex_unlock(&priv->mcg_table.mutex); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + enum mlx4_protocol prot, enum mlx4_steer_type steer) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_mgm *mgm; + u32 members_count; + int prev, index; + int i, loc; + int err; + u8 port = gid[5]; + bool removed_entry = false; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + mgm = mailbox->buf; + + mutex_lock(&priv->mcg_table.mutex); + + err = find_entry(dev, port, gid, prot, + mailbox, &prev, &index); + if (err) + goto out; + + if (index == -1) { + mlx4_err(dev, "MGID %pI6 not found\n", gid); + err = -EINVAL; + goto out; + } + + /* if this pq is also a promisc qp, it shouldn't be removed */ + if (prot == MLX4_PROT_ETH && + check_duplicate_entry(dev, port, steer, index, qp->qpn)) + goto out; + + members_count = be32_to_cpu(mgm->members_count) & 0xffffff; + for (loc = -1, i = 0; i < members_count; ++i) + if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn) + loc = i; + + if (loc == -1) { + mlx4_err(dev, "QP %06x not found in MGM\n", qp->qpn); + err = -EINVAL; + goto out; + } + + + mgm->members_count = cpu_to_be32(--members_count | (u32) prot << 30); + mgm->qp[loc] = mgm->qp[i - 1]; + mgm->qp[i - 1] = 0; + + if (prot == MLX4_PROT_ETH) + removed_entry = can_remove_steering_entry(dev, port, steer, + index, qp->qpn); + if (i != 1 && (prot != MLX4_PROT_ETH || !removed_entry)) { + err = mlx4_WRITE_ENTRY(dev, index, mailbox); + goto out; + } + + /* We are going to delete the entry, members count should be 0 */ + mgm->members_count = cpu_to_be32((u32) prot << 30); + + if (prev == -1) { + /* Remove entry from MGM */ + int amgm_index = be32_to_cpu(mgm->next_gid_index) >> 6; + if (amgm_index) { + err = mlx4_READ_ENTRY(dev, amgm_index, mailbox); + if (err) + goto out; + } else + memset(mgm->gid, 0, 16); + + err = mlx4_WRITE_ENTRY(dev, index, mailbox); + if (err) + goto out; + + if (amgm_index) { + if (amgm_index < dev->caps.num_mgms) + mlx4_warn(dev, "MGM entry %d had AMGM index %d < %d", + index, amgm_index, dev->caps.num_mgms); + else + mlx4_bitmap_free(&priv->mcg_table.bitmap, + amgm_index - dev->caps.num_mgms); + } + } else { + /* Remove entry from AMGM */ + int cur_next_index = be32_to_cpu(mgm->next_gid_index) >> 6; + err = mlx4_READ_ENTRY(dev, prev, mailbox); + if (err) + goto out; + + mgm->next_gid_index = cpu_to_be32(cur_next_index << 6); + + err = mlx4_WRITE_ENTRY(dev, prev, mailbox); + if (err) + goto out; + + if (index < dev->caps.num_mgms) + mlx4_warn(dev, "entry %d had next AMGM index %d < %d", + prev, index, dev->caps.num_mgms); + else + mlx4_bitmap_free(&priv->mcg_table.bitmap, + index - dev->caps.num_mgms); + } + +out: + mutex_unlock(&priv->mcg_table.mutex); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +static int mlx4_QP_ATTACH(struct mlx4_dev *dev, struct mlx4_qp *qp, + u8 gid[16], u8 attach, u8 block_loopback, + enum mlx4_protocol prot) +{ + struct mlx4_cmd_mailbox *mailbox; + int err = 0; + int qpn; + + if (!mlx4_is_mfunc(dev)) + return -EBADF; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + memcpy(mailbox->buf, gid, 16); + qpn = qp->qpn; + qpn |= (prot << 28); + if (attach && block_loopback) + qpn |= (1 << 31); + + err = mlx4_cmd(dev, mailbox->dma, qpn, attach, + MLX4_CMD_QP_ATTACH, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + int block_mcast_loopback, enum mlx4_protocol prot) +{ + if (prot == MLX4_PROT_ETH && + !(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)) + return 0; + + if (prot == MLX4_PROT_ETH) + gid[7] |= (MLX4_MC_STEER << 1); + + if (mlx4_is_mfunc(dev)) + return mlx4_QP_ATTACH(dev, qp, gid, 1, + block_mcast_loopback, prot); + + return mlx4_qp_attach_common(dev, qp, gid, block_mcast_loopback, + prot, MLX4_MC_STEER); +} +EXPORT_SYMBOL_GPL(mlx4_multicast_attach); + +int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + enum mlx4_protocol prot) +{ + if (prot == MLX4_PROT_ETH && + !(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)) + return 0; + + if (prot == MLX4_PROT_ETH) + gid[7] |= (MLX4_MC_STEER << 1); + + if (mlx4_is_mfunc(dev)) + return mlx4_QP_ATTACH(dev, qp, gid, 0, 0, prot); + + return mlx4_qp_detach_common(dev, qp, gid, prot, MLX4_MC_STEER); +} +EXPORT_SYMBOL_GPL(mlx4_multicast_detach); + +int mlx4_unicast_attach(struct mlx4_dev *dev, + struct mlx4_qp *qp, u8 gid[16], + int block_mcast_loopback, enum mlx4_protocol prot) +{ + if (prot == MLX4_PROT_ETH && + !(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) + return 0; + + if (prot == MLX4_PROT_ETH) + gid[7] |= (MLX4_UC_STEER << 1); + + if (mlx4_is_mfunc(dev)) + return mlx4_QP_ATTACH(dev, qp, gid, 1, + block_mcast_loopback, prot); + + return mlx4_qp_attach_common(dev, qp, gid, block_mcast_loopback, + prot, MLX4_UC_STEER); +} +EXPORT_SYMBOL_GPL(mlx4_unicast_attach); + +int mlx4_unicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, + u8 gid[16], enum mlx4_protocol prot) +{ + if (prot == MLX4_PROT_ETH && + !(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) + return 0; + + if (prot == MLX4_PROT_ETH) + gid[7] |= (MLX4_UC_STEER << 1); + + if (mlx4_is_mfunc(dev)) + return mlx4_QP_ATTACH(dev, qp, gid, 0, 0, prot); + + return mlx4_qp_detach_common(dev, qp, gid, prot, MLX4_UC_STEER); +} +EXPORT_SYMBOL_GPL(mlx4_unicast_detach); + +int mlx4_PROMISC_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + u32 qpn = (u32) vhcr->in_param & 0xffffffff; + u8 port = vhcr->in_param >> 62; + enum mlx4_steer_type steer = vhcr->in_modifier; + + if (!(mlx4_master_func_num(dev) == slave)) + return 0; + + if (vhcr->op_modifier) + return add_promisc_qp(dev, port, steer, qpn); + else + return remove_promisc_qp(dev, port, steer, qpn); +} + +static int mlx4_PROMISC(struct mlx4_dev *dev, u32 qpn, + enum mlx4_steer_type steer, u8 add, u8 port) +{ + return mlx4_cmd(dev, (u64) qpn | (u64) port << 62, (u32) steer, add, + MLX4_CMD_PROMISC, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); +} + +int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port) +{ + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)) + return 0; + + if (mlx4_is_mfunc(dev)) + return mlx4_PROMISC(dev, qpn, MLX4_MC_STEER, 1, port); + + return add_promisc_qp(dev, port, MLX4_MC_STEER, qpn); +} +EXPORT_SYMBOL_GPL(mlx4_multicast_promisc_add); + +int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port) +{ + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)) + return 0; + + if (mlx4_is_mfunc(dev)) + return mlx4_PROMISC(dev, qpn, MLX4_MC_STEER, 0, port); + + return remove_promisc_qp(dev, port, MLX4_MC_STEER, qpn); +} +EXPORT_SYMBOL_GPL(mlx4_multicast_promisc_remove); + +int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port) +{ + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) + return 0; + + if (mlx4_is_mfunc(dev)) + return mlx4_PROMISC(dev, qpn, MLX4_UC_STEER, 1, port); + + return add_promisc_qp(dev, port, MLX4_UC_STEER, qpn); +} +EXPORT_SYMBOL_GPL(mlx4_unicast_promisc_add); + +int mlx4_unicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port) +{ + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) + return 0; + + if (mlx4_is_mfunc(dev)) + return mlx4_PROMISC(dev, qpn, MLX4_UC_STEER, 0, port); + + return remove_promisc_qp(dev, port, MLX4_UC_STEER, qpn); +} +EXPORT_SYMBOL_GPL(mlx4_unicast_promisc_remove); + +int mlx4_init_mcg_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int err; + + err = mlx4_bitmap_init(&priv->mcg_table.bitmap, dev->caps.num_amgms, + dev->caps.num_amgms - 1, 0, 0); + if (err) + return err; + + mutex_init(&priv->mcg_table.mutex); + + return 0; +} + +void mlx4_cleanup_mcg_table(struct mlx4_dev *dev) +{ + mlx4_bitmap_cleanup(&mlx4_priv(dev)->mcg_table.bitmap); +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mlx4.h b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mlx4.h new file mode 100755 index 0000000..114ae7a --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mlx4.h @@ -0,0 +1,1116 @@ +/* + * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. + * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. + * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2004 Voltaire, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef MLX4_H +#define MLX4_H + +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* NOT __VMKERNEL_MODULE__ */ +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* NOT __VMKERNEL_MODULE__ */ +#include + +#include +#include +#include +#include + +#define DRV_NAME "mlx4_core" +#define PFX DRV_NAME ": " +#define DRV_VERSION "1.9.7.0" +#define DRV_RELDATE "Dec-03-2012" + +enum { + MLX4_HCR_BASE = 0x80680, + MLX4_HCR_SIZE = 0x0001c, + MLX4_CLR_INT_SIZE = 0x00008, + MLX4_SLAVE_COMM_BASE = 0x0, + MLX4_COMM_PAGESIZE = 0x1000 +}; + +enum { + MLX4_MAX_MGM_ENTRY_SIZE = 0x1000, + MLX4_MAX_QP_PER_MGM = 4 * (MLX4_MAX_MGM_ENTRY_SIZE / 16 - 2), + MLX4_MTT_ENTRY_PER_SEG = 8, +}; + +enum { + MLX4_NUM_PDS = 1 << 15 +}; + +enum { + MLX4_CMPT_TYPE_QP = 0, + MLX4_CMPT_TYPE_SRQ = 1, + MLX4_CMPT_TYPE_CQ = 2, + MLX4_CMPT_TYPE_EQ = 3, + MLX4_CMPT_NUM_TYPE +}; + +enum { + MLX4_CMPT_SHIFT = 24, + MLX4_NUM_CMPTS = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT +}; + +enum mlx4_mr_state { + MLX4_MR_DISABLED = 0, + MLX4_MR_EN_HW, + MLX4_MR_EN_SW +}; + +#define MLX4_COMM_TIME 10000 +enum { + MLX4_COMM_CMD_RESET, + MLX4_COMM_CMD_VHCR0, + MLX4_COMM_CMD_VHCR1, + MLX4_COMM_CMD_VHCR2, + MLX4_COMM_CMD_VHCR_EN, + MLX4_COMM_CMD_VHCR_POST, + MLX4_COMM_CMD_FLR = 254 +}; + +/*The flag indicates that the slave should delay the RESET cmd*/ +#define MLX4_DELAY_RESET_SLAVE 0xbbbbbbb +/*indicates how many retries will be done if we are in the middle of FLR*/ +#define NUM_OF_RESET_RETRIES 10 +#define SLEEP_TIME_IN_RESET (2 * 1000) +enum mlx4_resource { + RES_QP, + RES_CQ, + RES_SRQ, + RES_XRCD, + RES_MPT, + RES_MTT, + RES_MAC, + RES_VLAN, + RES_EQ, + RES_COUNTER, + MLX4_NUM_OF_RESOURCE_TYPE +}; + +enum mlx4_alloc_mode { + RES_OP_RESERVE, + RES_OP_RESERVE_AND_MAP, + RES_OP_MAP_ICM, +}; + + +/* + *Virtual HCR structures. + * mlx4_vhcr is the sw representation, in machine endianess + * + * mlx4_vhcr_cmd is the formalized structure, the one that is passed + * to FW to go through communication channel. + * It is big endian, and has the same structure as the physical HCR + * used by command interface + */ +struct mlx4_vhcr { + u64 in_param; + u64 out_param; + u32 in_modifier; + u32 errno; + u16 op; + u16 token; + u8 op_modifier; + u8 e_bit; +}; + +struct mlx4_vhcr_cmd { + __be64 in_param; + __be32 in_modifier; + __be64 out_param; + __be16 token; + u16 reserved; + u8 status; + u8 flags; + __be16 opcode; +}; + +struct mlx4_cmd_info { + u16 opcode; + bool has_inbox; + bool has_outbox; + bool out_is_imm; + bool encode_slave_id; + int (*verify)(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox); + int (*wrapper)(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +}; + +#ifdef CONFIG_MLX4_DEBUG +extern int mlx4_debug_level; +#else /* CONFIG_MLX4_DEBUG */ +#define mlx4_debug_level (0) +#endif /* CONFIG_MLX4_DEBUG */ + +#define mlx4_dbg(mdev, format, arg...) \ +do { \ + if (mlx4_debug_level) \ + dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ##arg); \ +} while (0) + +#define mlx4_err(mdev, format, arg...) \ + dev_err(&mdev->pdev->dev, format, ##arg) +#define mlx4_info(mdev, format, arg...) \ + dev_info(&mdev->pdev->dev, format, ##arg) +#define mlx4_warn(mdev, format, arg...) \ + dev_warn(&mdev->pdev->dev, format, ##arg) + +extern int mlx4_log_num_mgm_entry_size; +extern int log_mtts_per_seg; + +#define MLX4_MAX_NUM_SLAVES (MLX4_MAX_NUM_PF + MLX4_MAX_NUM_VF) +#define ALL_SLAVES 0xff + +struct mlx4_bitmap { + u32 last; + u32 top; + u32 max; + u32 reserved_top; + u32 mask; + u32 avail; + spinlock_t lock; + unsigned long *table; +}; + +struct mlx4_buddy { + unsigned long **bits; + unsigned int *num_free; + int max_order; + spinlock_t lock; +}; + +struct mlx4_icm; + +struct mlx4_icm_table { + u64 virt; + int num_icm; + int num_obj; + int obj_size; + int lowmem; + int coherent; + struct mutex mutex; + struct mlx4_icm **icm; +}; + +/* + * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits. + */ +struct mlx4_mpt_entry { + __be32 flags; + __be32 qpn; + __be32 key; + __be32 pd_flags; + __be64 start; + __be64 length; + __be32 lkey; + __be32 win_cnt; + u8 reserved1[3]; + u8 mtt_rep; + __be64 mtt_addr; + __be32 mtt_sz; + __be32 entity_size; + __be32 first_byte_offset; +} __packed; + +/* + * Must be packed because start is 64 bits but only aligned to 32 bits. + */ +struct mlx4_eq_context { + __be32 flags; + u16 reserved1[3]; + __be16 page_offset; + u8 log_eq_size; + u8 reserved2[4]; + u8 eq_period; + u8 reserved3; + u8 eq_max_count; + u8 reserved4[3]; + u8 intr; + u8 log_page_size; + u8 reserved5[2]; + u8 mtt_base_addr_h; + __be32 mtt_base_addr_l; + u32 reserved6[2]; + __be32 consumer_index; + __be32 producer_index; + u32 reserved7[4]; +}; + +struct mlx4_cq_context { + __be32 flags; + u16 reserved1[3]; + __be16 page_offset; + __be32 logsize_usrpage; + __be16 cq_period; + __be16 cq_max_count; + u8 reserved2[3]; + u8 comp_eqn; + u8 log_page_size; + u8 reserved3[2]; + u8 mtt_base_addr_h; + __be32 mtt_base_addr_l; + __be32 last_notified_index; + __be32 solicit_producer_index; + __be32 consumer_index; + __be32 producer_index; + u32 reserved4[2]; + __be64 db_rec_addr; +}; + +struct mlx4_srq_context { + __be32 state_logsize_srqn; + u8 logstride; + u8 reserved1; + __be16 xrcd; + __be32 pg_offset_cqn; + u32 reserved2; + u8 log_page_size; + u8 reserved3[2]; + u8 mtt_base_addr_h; + __be32 mtt_base_addr_l; + __be32 pd; + __be16 limit_watermark; + __be16 wqe_cnt; + u16 reserved4; + __be16 wqe_counter; + u32 reserved5; + __be64 db_rec_addr; +}; + +struct mlx4_eq { + struct mlx4_dev *dev; + void __iomem *doorbell; + int eqn; + u32 cons_index; + u16 irq; + u16 have_irq; + int nent; + struct mlx4_buf_list *page_list; + struct mlx4_mtt mtt; +}; + +struct mlx4_slave_eqe { + u8 type; + u8 port; + u32 param; +}; + +struct mlx4_slave_event_eq_info { + int eqn; + u16 token; +}; + +struct mlx4_profile { + int num_qp; + int rdmarc_per_qp; + int num_srq; + int num_cq; + int num_mcg; + int num_mpt; + unsigned num_mtt; +}; + +struct mlx4_fw { + u64 clr_int_base; + u64 catas_offset; + u64 comm_base; + struct mlx4_icm *fw_icm; + struct mlx4_icm *aux_icm; + u32 catas_size; + u16 fw_pages; + u8 clr_int_bar; + u8 catas_bar; + u8 comm_bar; +}; + +struct mlx4_comm { + u32 slave_write; + u32 slave_read; +}; + +enum { + MLX4_MCAST_CONFIG = 0, + MLX4_MCAST_DISABLE = 1, + MLX4_MCAST_ENABLE = 2, +}; + +#define VLAN_FLTR_SIZE 128 + +struct mlx4_vlan_fltr { + __be32 entry[VLAN_FLTR_SIZE]; +}; + +struct mlx4_mcast_entry { + struct list_head list; + u64 addr; +}; + +struct mlx4_promisc_qp { + struct list_head list; + u32 qpn; +}; + +struct mlx4_steer_index { + struct list_head list; + unsigned int index; + struct list_head duplicates; +}; + +#define MLX4_EVENT_TYPES_NUM 64 + +struct mlx4_slave_state { + u8 comm_toggle; + u8 last_cmd; + u8 init_port_mask; + bool active; + u8 function; + dma_addr_t vhcr_dma; + u16 mtu[MLX4_MAX_PORTS + 1]; + __be32 ib_cap_mask[MLX4_MAX_PORTS + 1]; + struct mlx4_slave_eqe eq[MLX4_MFUNC_MAX_EQES]; + struct list_head mcast_filters[MLX4_MAX_PORTS + 1]; + struct mlx4_vlan_fltr *vlan_filter[MLX4_MAX_PORTS + 1]; + /* event type to eq number lookup */ + struct mlx4_slave_event_eq_info event_eq[MLX4_EVENT_TYPES_NUM]; + u16 eq_pi; + u16 eq_ci; + spinlock_t lock; + /*initialized via the kzalloc*/ + u8 is_slave_going_down; + u32 cookie; + /*save the slave port state*/ + enum slave_port_state port_state[MLX4_MAX_PORTS + 1]; +}; + +struct slave_list { + struct mutex mutex; + struct list_head res_list[MLX4_NUM_OF_RESOURCE_TYPE]; +}; + +struct mlx4_resource_tracker { + spinlock_t lock; + /* tree for each resources */ + struct radix_tree_root res_tree[MLX4_NUM_OF_RESOURCE_TYPE]; + /* num_of_slave's lists, one per slave */ + struct slave_list *slave_list; +}; + +#define SLAVE_EVENT_EQ_SIZE 128 +struct mlx4_slave_event_eq { + u32 eqn; + u32 cons; + u32 prod; + struct mlx4_eqe event_eqe[SLAVE_EVENT_EQ_SIZE]; +}; + +struct mlx4_master_qp0_state { + int proxy_qp0_active; + int qp0_active; + int port_active; +}; + +struct mlx4_mfunc_master_ctx { + struct mlx4_slave_state *slave_state; + struct mlx4_master_qp0_state qp0_state[MLX4_MAX_PORTS + 1]; + int init_port_ref[MLX4_MAX_PORTS + 1]; + u16 max_mtu[MLX4_MAX_PORTS + 1]; + int disable_mcast_ref[MLX4_MAX_PORTS + 1]; + struct mlx4_resource_tracker res_tracker; + struct workqueue_struct *comm_wq; + struct work_struct comm_work; + struct work_struct slave_event_work; + struct work_struct slave_flr_event_work; + spinlock_t slave_state_lock; + __be32 comm_arm_bit_vector[4]; + struct mlx4_eqe cmd_eqe; + struct mlx4_slave_event_eq slave_eq; + struct mutex gen_eqe_mutex[MLX4_MFUNC_MAX]; +}; + +struct mlx4_mfunc { + struct mlx4_comm __iomem *comm; + struct mlx4_vhcr_cmd *vhcr; + dma_addr_t vhcr_dma; + + struct mlx4_mfunc_master_ctx master; +}; + +struct mlx4_cmd { + struct pci_pool *pool; + void __iomem *hcr; + struct mutex hcr_mutex; + struct semaphore poll_sem; + struct semaphore event_sem; + struct semaphore slave_sem; + int max_cmds; + spinlock_t context_lock; + int free_head; + struct mlx4_cmd_context *context; + u16 token_mask; + u8 use_events; + u8 toggle; + u8 comm_toggle; +}; + +struct mlx4_uar_table { + struct mlx4_bitmap bitmap; +}; + +struct mlx4_mr_table { + struct mlx4_bitmap mpt_bitmap; + struct mlx4_buddy mtt_buddy; + u64 mtt_base; + u64 mpt_base; + struct mlx4_icm_table mtt_table; + struct mlx4_icm_table dmpt_table; +}; + +struct mlx4_cq_table { + struct mlx4_bitmap bitmap; + spinlock_t lock; + struct radix_tree_root tree; + struct mlx4_icm_table table; + struct mlx4_icm_table cmpt_table; +}; + +struct mlx4_eq_table { + struct mlx4_bitmap bitmap; + char *irq_names; + void __iomem *clr_int; + void __iomem **uar_map; + u32 clr_mask; + struct mlx4_eq *eq; + struct mlx4_icm_table table; + struct mlx4_icm_table cmpt_table; + int have_irq; + u8 inta_pin; +}; + +struct mlx4_srq_table { + struct mlx4_bitmap bitmap; + spinlock_t lock; + struct radix_tree_root tree; + struct mlx4_icm_table table; + struct mlx4_icm_table cmpt_table; +}; + +struct mlx4_qp_table { + struct mlx4_bitmap bitmap; + u32 rdmarc_base; + int rdmarc_shift; + spinlock_t lock; + struct mlx4_icm_table qp_table; + struct mlx4_icm_table auxc_table; + struct mlx4_icm_table altc_table; + struct mlx4_icm_table rdmarc_table; + struct mlx4_icm_table cmpt_table; +}; + +struct mlx4_mcg_table { + struct mutex mutex; + struct mlx4_bitmap bitmap; + struct mlx4_icm_table table; +}; + +struct mlx4_catas_err { + u32 __iomem *map; + struct timer_list timer; + struct list_head list; +}; + +#define MLX4_MAX_MAC_NUM 128 +#define MLX4_MAC_TABLE_SIZE (MLX4_MAX_MAC_NUM << 3) + +struct mlx4_mac_table { + __be64 entries[MLX4_MAX_MAC_NUM]; + int refs[MLX4_MAX_MAC_NUM]; + struct mutex mutex; + int total; + int max; +}; + +#define MLX4_MAX_VLAN_NUM 128 +#define MLX4_VLAN_TABLE_SIZE (MLX4_MAX_VLAN_NUM << 2) + +struct mlx4_vlan_table { + __be32 entries[MLX4_MAX_VLAN_NUM]; + int refs[MLX4_MAX_VLAN_NUM]; + struct mutex mutex; + int total; + int max; +}; + +#define SET_PORT_GEN_ALL_VALID 0x7 +#define SET_PORT_PROMISC_SHIFT 31 +#define SET_PORT_MC_PROMISC_SHIFT 30 + +enum { + MCAST_DIRECT_ONLY = 0, + MCAST_DIRECT = 1, + MCAST_DEFAULT = 2 +}; + + +struct mlx4_set_port_general_context { + u8 reserved[3]; + u8 flags; + u16 reserved2; + __be16 mtu; + u8 pptx; + u8 pfctx; + u16 reserved3; + u8 pprx; + u8 pfcrx; + u16 reserved4; +}; + +struct mlx4_set_port_rqp_calc_context { + __be32 base_qpn; + u8 rererved; + u8 n_mac; + u8 n_vlan; + u8 n_prio; + u8 reserved2[3]; + u8 mac_miss; + u8 intra_no_vlan; + u8 no_vlan; + u8 intra_vlan_miss; + u8 vlan_miss; + u8 reserved3[3]; + u8 no_vlan_prio; + __be32 promisc; + __be32 mcast; +}; + +struct mlx4_mac_entry { + u64 mac; +}; + +struct mlx4_port_info { + struct mlx4_dev *dev; + int port; + char dev_name[16]; +#ifdef __VMKERNEL_SYSFS_SUPPORT__ + struct device_attribute port_attr; +#endif /* __VMKERNEL_SYSFS_SUPPORT__ */ + enum mlx4_port_type tmp_type; + char dev_mtu_name[16]; +#ifdef __VMKERNEL_SYSFS_SUPPORT__ + struct device_attribute port_mtu_attr; +#endif /* __VMKERNEL_SYSFS_SUPPORT__ */ + struct mlx4_mac_table mac_table; + struct radix_tree_root mac_tree; + struct mlx4_vlan_table vlan_table; + int base_qpn; +}; + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ +struct mlx4_sense { + struct mlx4_dev *dev; + u8 do_sense_port[MLX4_MAX_PORTS + 1]; + u8 sense_allowed[MLX4_MAX_PORTS + 1]; + struct delayed_work sense_poll; +}; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + +struct mlx4_msix_ctl { + u64 pool_bm; + struct mutex pool_lock; +}; + +struct mlx4_steer { + struct list_head promisc_qps[MLX4_NUM_STEERS]; + struct list_head steer_entries[MLX4_NUM_STEERS]; +}; + +struct mlx4_priv { + struct mlx4_dev dev; + + struct list_head dev_list; + struct list_head ctx_list; + spinlock_t ctx_lock; + + struct list_head pgdir_list; + struct mutex pgdir_mutex; + + struct mlx4_fw fw; + struct mlx4_cmd cmd; + struct mlx4_mfunc mfunc; + + struct mlx4_bitmap pd_bitmap; + struct mlx4_bitmap xrcd_bitmap; + struct mlx4_uar_table uar_table; + struct mlx4_mr_table mr_table; + struct mlx4_cq_table cq_table; + struct mlx4_eq_table eq_table; + struct mlx4_srq_table srq_table; + struct mlx4_qp_table qp_table; + struct mlx4_mcg_table mcg_table; + struct mlx4_bitmap counters_bitmap; + + struct mlx4_catas_err catas_err; + + void __iomem *clr_base; + + struct mlx4_uar driver_uar; + void __iomem *kar; + struct mlx4_port_info port[MLX4_MAX_PORTS + 1]; +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ + struct mlx4_sense sense; +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ + struct mutex port_mutex; + struct mlx4_msix_ctl msix_ctl; + struct mlx4_steer *steer; +#ifdef __VMKERNEL_BF_ENABLE__ + struct list_head bf_list; + struct mutex bf_mutex; + struct io_mapping *bf_mapping; +#endif /* __VMKERNEL_BF_ENABLE__ */ + int reserved_mtts; + u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS]; + +}; + +static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev) +{ + return container_of(dev, struct mlx4_priv, dev); +} + +#define MLX4_SENSE_RANGE (HZ * 3) + +extern struct workqueue_struct *mlx4_wq; + +u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap); +void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj); +u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align); +void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt); +u32 mlx4_bitmap_avail(struct mlx4_bitmap *bitmap); +int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask, + u32 reserved_bot, u32 resetrved_top); +void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap); + +int mlx4_reset(struct mlx4_dev *dev); + +int mlx4_alloc_eq_table(struct mlx4_dev *dev); +void mlx4_free_eq_table(struct mlx4_dev *dev); + +int mlx4_init_pd_table(struct mlx4_dev *dev); +int mlx4_init_xrcd_table(struct mlx4_dev *dev); +int mlx4_init_uar_table(struct mlx4_dev *dev); +int mlx4_init_mr_table(struct mlx4_dev *dev); +int mlx4_init_eq_table(struct mlx4_dev *dev); +int mlx4_init_cq_table(struct mlx4_dev *dev); +int mlx4_init_qp_table(struct mlx4_dev *dev); +int mlx4_init_srq_table(struct mlx4_dev *dev); +int mlx4_init_mcg_table(struct mlx4_dev *dev); + +void mlx4_cleanup_pd_table(struct mlx4_dev *dev); +void mlx4_cleanup_xrcd_table(struct mlx4_dev *dev); +void mlx4_cleanup_uar_table(struct mlx4_dev *dev); +void mlx4_cleanup_mr_table(struct mlx4_dev *dev); +void mlx4_cleanup_eq_table(struct mlx4_dev *dev); +void mlx4_cleanup_cq_table(struct mlx4_dev *dev); +void mlx4_cleanup_qp_table(struct mlx4_dev *dev); +void mlx4_cleanup_srq_table(struct mlx4_dev *dev); +void mlx4_cleanup_mcg_table(struct mlx4_dev *dev); +int __mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn); +void __mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn); +int __mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn); +void __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn); +int __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn); +void __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn); +int __mlx4_mr_reserve(struct mlx4_dev *dev); +void __mlx4_mr_release(struct mlx4_dev *dev, u32 index); +int __mlx4_mr_alloc_icm(struct mlx4_dev *dev, u32 index); +void __mlx4_mr_free_icm(struct mlx4_dev *dev, u32 index); +u32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order); +void __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 first_seg, int order); + +int mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SYNC_TPT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SW2HW_MPT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_HW2SW_MPT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_QUERY_MPT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SW2HW_EQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_DMA_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int __mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, + int *base); +void __mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt); +int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); +void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); +int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac); +int __mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + int start_index, int npages, u64 *page_list); +int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx); +void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx); +int __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); +void __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); + +void mlx4_start_catas_poll(struct mlx4_dev *dev); +void mlx4_stop_catas_poll(struct mlx4_dev *dev); +void mlx4_catas_init(void); +int mlx4_restart_one(struct pci_dev *pdev); +int mlx4_register_device(struct mlx4_dev *dev); +void mlx4_unregister_device(struct mlx4_dev *dev); +void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, + unsigned long param); + +struct mlx4_dev_cap; +struct mlx4_init_hca_param; + +u64 mlx4_make_profile(struct mlx4_dev *dev, + struct mlx4_profile *request, + struct mlx4_dev_cap *dev_cap, + struct mlx4_init_hca_param *init_hca); +void mlx4_master_comm_channel(struct work_struct *work); +void mlx4_gen_slave_eqe(struct work_struct *work); +void mlx4_master_handle_slave_flr(struct work_struct *work); + +int mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_MAP_EQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_COMM_INT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_HW2SW_EQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_QUERY_EQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SW2HW_CQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_HW2SW_CQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_QUERY_CQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_MODIFY_CQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SW2HW_SRQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_HW2SW_SRQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_QUERY_SRQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_ARM_SRQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_GEN_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_INIT2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_RTR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_RTS2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SQERR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_2ERR_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_RTS2SQD_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SQD2SQD_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SQD2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_2RST_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_QUERY_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); + +int mlx4_GEN_EQE(struct mlx4_dev *dev, int slave, struct mlx4_eqe *eqe); + +int mlx4_cmd_init(struct mlx4_dev *dev); +void mlx4_cmd_cleanup(struct mlx4_dev *dev); +int mlx4_multi_func_init(struct mlx4_dev *dev); +void mlx4_multi_func_cleanup(struct mlx4_dev *dev); +void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param); +int mlx4_cmd_use_events(struct mlx4_dev *dev); +void mlx4_cmd_use_polling(struct mlx4_dev *dev); + +int mlx4_comm_cmd(struct mlx4_dev *dev, u8 cmd, u16 param, + unsigned long timeout); + +void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn); +void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type); + +void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type); + +void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type); + +void mlx4_handle_catas_err(struct mlx4_dev *dev); + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ +int mlx4_SENSE_PORT(struct mlx4_dev *dev, int port, + enum mlx4_port_type *type); +void mlx4_do_sense_ports(struct mlx4_dev *dev, + enum mlx4_port_type *stype, + enum mlx4_port_type *defaults); +void mlx4_start_sense(struct mlx4_dev *dev); +void mlx4_stop_sense(struct mlx4_dev *dev); +void mlx4_sense_init(struct mlx4_dev *dev); +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ +int mlx4_check_port_params(struct mlx4_dev *dev, + enum mlx4_port_type *port_type); +int mlx4_change_port_types(struct mlx4_dev *dev, + enum mlx4_port_type *port_types); + +void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table); +void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table); + +int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz); +/* resource tracker functions*/ +int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev, + enum mlx4_resource resource_type, + int resource_id, int *slave); +void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave_id); +int mlx4_init_resource_tracker(struct mlx4_dev *dev); + +void mlx4_free_resource_tracker(struct mlx4_dev *dev, int slaves_only); + +int mlx4_QUERY_FW_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_INIT_PORT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_CLOSE_PORT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps); +int mlx4_check_ext_port_caps(struct mlx4_dev *dev, u8 port); +int mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port, + int *gid_tbl_len, int *pkey_tbl_len); + + +int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); + +int mlx4_PROMISC_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + enum mlx4_protocol prot, enum mlx4_steer_type steer); +int mlx4_qp_attach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + int block_mcast_loopback, enum mlx4_protocol prot, + enum mlx4_steer_type steer); +int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_common_set_vlan_fltr(struct mlx4_dev *dev, int function, + int port, void *buf); +int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave, u32 in_mod, + struct mlx4_cmd_mailbox *outbox); +int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_PKEY_TABLE_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); +int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd); + +int mlx4_get_mgm_entry_size(struct mlx4_dev *dev); +int mlx4_get_qp_per_mgm(struct mlx4_dev *dev); + +static inline void set_param_l(u64 *arg, u32 val) +{ + *((u32 *)arg) = val; +} + +static inline void set_param_h(u64 *arg, u32 val) +{ + *arg = (*arg & 0xffffffff) | ((u64) val << 32); +} + +static inline u32 get_param_l(u64 *arg) +{ + return (u32) (*arg & 0xffffffff); +} + +static inline u32 get_param_h(u64 *arg) +{ + return (u32)(*arg >> 32); +} + +static inline spinlock_t *mlx4_tlock(struct mlx4_dev *dev) +{ + return &mlx4_priv(dev)->mfunc.master.res_tracker.lock; +} + +#define NOT_MASKED_PD_BITS 17 + +#endif /* MLX4_H */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mr.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mr.c new file mode 100755 index 0000000..c980e8d --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/mr.c @@ -0,0 +1,961 @@ +/* + * Copyright (c) 2004 Topspin Communications. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#else +#include +#endif /* __VMKERNEL_MODULE__ */ +#include +#include + +#include + +#include "mlx4.h" +#include "icm.h" + +#define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28) +#define MLX4_MPT_FLAG_FREE (0x3UL << 28) +#define MLX4_MPT_FLAG_MIO (1 << 17) +#define MLX4_MPT_FLAG_BIND_ENABLE (1 << 15) +#define MLX4_MPT_FLAG_PHYSICAL (1 << 9) +#define MLX4_MPT_FLAG_REGION (1 << 8) + +#define MLX4_MPT_PD_FLAG_FAST_REG (1 << 27) +#define MLX4_MPT_PD_FLAG_RAE (1 << 28) +#define MLX4_MPT_PD_FLAG_EN_INV (3 << 24) + +#define MLX4_MPT_STATUS_SW 0xF0 +#define MLX4_MPT_STATUS_HW 0x00 + +static u32 mlx4_buddy_alloc(struct mlx4_buddy *buddy, int order) +{ + int o; + int m; + u32 seg; + + spin_lock(&buddy->lock); + + for (o = order; o <= buddy->max_order; ++o) + if (buddy->num_free[o]) { + m = 1 << (buddy->max_order - o); + seg = find_first_bit(buddy->bits[o], m); + if (seg < m) + goto found; + } + + spin_unlock(&buddy->lock); + return -1; + + found: + clear_bit(seg, buddy->bits[o]); + --buddy->num_free[o]; + + while (o > order) { + --o; + seg <<= 1; + set_bit(seg ^ 1, buddy->bits[o]); + ++buddy->num_free[o]; + } + + spin_unlock(&buddy->lock); + + seg <<= order; + + return seg; +} + +static void mlx4_buddy_free(struct mlx4_buddy *buddy, u32 seg, int order) +{ + seg >>= order; + + spin_lock(&buddy->lock); + + while (test_bit(seg ^ 1, buddy->bits[order])) { + clear_bit(seg ^ 1, buddy->bits[order]); + --buddy->num_free[order]; + seg >>= 1; + ++order; + } + + set_bit(seg, buddy->bits[order]); + ++buddy->num_free[order]; + + spin_unlock(&buddy->lock); +} + +static int mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order) +{ + int i, s; + + buddy->max_order = max_order; + spin_lock_init(&buddy->lock); + + buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *), + GFP_KERNEL); + buddy->num_free = kcalloc((buddy->max_order + 1), sizeof *buddy->num_free, + GFP_KERNEL); + if (!buddy->bits || !buddy->num_free) + goto err_out; + + for (i = 0; i <= buddy->max_order; ++i) { + s = BITS_TO_LONGS(1 << (buddy->max_order - i)); + buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL); + if (!buddy->bits[i]) + goto err_out_free; + bitmap_zero(buddy->bits[i], 1 << (buddy->max_order - i)); + } + + set_bit(0, buddy->bits[buddy->max_order]); + buddy->num_free[buddy->max_order] = 1; + + return 0; + +err_out_free: + for (i = 0; i <= buddy->max_order; ++i) + kfree(buddy->bits[i]); + +err_out: + kfree(buddy->bits); + kfree(buddy->num_free); + + return -ENOMEM; +} + +static void mlx4_buddy_cleanup(struct mlx4_buddy *buddy) +{ + int i; + + for (i = 0; i <= buddy->max_order; ++i) + kfree(buddy->bits[i]); + + kfree(buddy->bits); + kfree(buddy->num_free); +} + +u32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order) +{ + struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; + u32 seg; + int seg_order; + u32 offset; + + seg_order = max_t(int, order - log_mtts_per_seg, 0); + + seg = mlx4_buddy_alloc(&mr_table->mtt_buddy, seg_order); + if (seg == -1) + return -1; + + offset = seg * (1 << log_mtts_per_seg); + + if (mlx4_table_get_range(dev, &mr_table->mtt_table, offset, + offset + (1 << order) - 1)) { + mlx4_buddy_free(&mr_table->mtt_buddy, seg, seg_order); + return -1; + } + + return offset; +} + +static u32 mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order) +{ + u64 in_param; + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, order); + err = mlx4_cmd_imm(dev, in_param, &out_param, RES_MTT, + RES_OP_RESERVE_AND_MAP, + MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); + if (err) + return -1; + return get_param_l(&out_param); + } + return __mlx4_alloc_mtt_range(dev, order); +} + +int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, + struct mlx4_mtt *mtt) +{ + int i; + + if (!npages) { + mtt->order = -1; + mtt->page_shift = MLX4_ICM_PAGE_SHIFT; + return 0; + } else + mtt->page_shift = page_shift; + + for (mtt->order = 0, i = 1; i < npages; i <<= 1) + ++mtt->order; + + mtt->offset = mlx4_alloc_mtt_range(dev, mtt->order); + if (mtt->offset == -1) + return -ENOMEM; + + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_mtt_init); + +void __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 offset, int order) +{ + u32 first_seg; + int seg_order; + struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; + + seg_order = max_t(int, order - log_mtts_per_seg, 0); + first_seg = offset / (1 << log_mtts_per_seg); + + mlx4_buddy_free(&mr_table->mtt_buddy, first_seg, seg_order); + mlx4_table_put_range(dev, &mr_table->mtt_table, offset, + offset + (1 << order) - 1); +} + +static void mlx4_free_mtt_range(struct mlx4_dev *dev, u32 offset, int order) +{ + u64 in_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, offset); + set_param_h(&in_param, order); + err = mlx4_cmd(dev, in_param, RES_MTT, RES_OP_RESERVE_AND_MAP, + MLX4_CMD_FREE_RES, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); + if (err) + mlx4_warn(dev, "Failed to free mtt range at:" + "%d order:%d\n", offset, order); + return; + } + __mlx4_free_mtt_range(dev, offset, order); +} + +void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt) +{ + if (mtt->order < 0) + return; + + mlx4_free_mtt_range(dev, mtt->offset, mtt->order); +} +EXPORT_SYMBOL_GPL(mlx4_mtt_cleanup); + +u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt) +{ + return (u64) mtt->offset * dev->caps.mtt_entry_sz; +} +EXPORT_SYMBOL_GPL(mlx4_mtt_addr); + +static u32 hw_index_to_key(u32 ind) +{ + return (ind >> 24) | (ind << 8); +} + +static u32 key_to_hw_index(u32 key) +{ + return (key << 24) | (key >> 8); +} + +static int mlx4_SW2HW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int mpt_index) +{ + return mlx4_cmd(dev, mailbox->dma, mpt_index, + 0, MLX4_CMD_SW2HW_MPT, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_WRAPPED); +} + +static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int mpt_index) +{ + return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, + !mailbox, MLX4_CMD_HW2SW_MPT, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); +} + +int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align, + u32 *base_mridx) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + u32 mridx; + + mridx = mlx4_bitmap_alloc_range(&priv->mr_table.mpt_bitmap, cnt, align); + if (mridx == -1) + return -ENOMEM; + + *base_mridx = mridx; + return 0; + +} +EXPORT_SYMBOL_GPL(mlx4_mr_reserve_range); + +void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + mlx4_bitmap_free_range(&priv->mr_table.mpt_bitmap, base_mridx, cnt); +} +EXPORT_SYMBOL_GPL(mlx4_mr_release_range); + +static int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd, + u64 iova, u64 size, u32 access, int npages, + int page_shift, struct mlx4_mr *mr) +{ + mr->iova = iova; + mr->size = size; + mr->pd = pd; + mr->access = access; + mr->enabled = MLX4_MR_DISABLED; + mr->key = hw_index_to_key(mridx); + + return mlx4_mtt_init(dev, npages, page_shift, &mr->mtt); +} + +static int mlx4_WRITE_MTT(struct mlx4_dev *dev, + struct mlx4_cmd_mailbox *mailbox, + int num_entries) +{ + return mlx4_cmd(dev, mailbox->dma, num_entries, 0, MLX4_CMD_WRITE_MTT, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); +} + +int __mlx4_mr_reserve(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + return mlx4_bitmap_alloc(&priv->mr_table.mpt_bitmap); +} + +static int mlx4_mr_reserve(struct mlx4_dev *dev) +{ + u64 out_param; + + if (mlx4_is_mfunc(dev)) { + if (mlx4_cmd_imm(dev, 0, &out_param, RES_MPT, RES_OP_RESERVE, + MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED)) + return -1; + return get_param_l(&out_param); + } + return __mlx4_mr_reserve(dev); +} + +void __mlx4_mr_release(struct mlx4_dev *dev, u32 index) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + mlx4_bitmap_free(&priv->mr_table.mpt_bitmap, index); +} + +static void mlx4_mr_release(struct mlx4_dev *dev, u32 index) +{ + u64 in_param; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, index); + if (mlx4_cmd(dev, in_param, RES_MPT, RES_OP_RESERVE, + MLX4_CMD_FREE_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED)) + mlx4_warn(dev, "Failed to release mr index:%d\n", + index); + return; + } + __mlx4_mr_release(dev, index); +} + +int __mlx4_mr_alloc_icm(struct mlx4_dev *dev, u32 index) +{ + struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; + + return mlx4_table_get(dev, &mr_table->dmpt_table, index); +} + +static int mlx4_mr_alloc_icm(struct mlx4_dev *dev, u32 index) +{ + u64 param; + + if (mlx4_is_mfunc(dev)) { + set_param_l(¶m, index); + return mlx4_cmd_imm(dev, param, ¶m, RES_MPT, RES_OP_MAP_ICM, + MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); + } + return __mlx4_mr_alloc_icm(dev, index); +} + +void __mlx4_mr_free_icm(struct mlx4_dev *dev, u32 index) +{ + struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; + + mlx4_table_put(dev, &mr_table->dmpt_table, index); +} + +static void mlx4_mr_free_icm(struct mlx4_dev *dev, u32 index) +{ + u64 in_param; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, index); + if (mlx4_cmd(dev, in_param, RES_MPT, RES_OP_MAP_ICM, + MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED)) + mlx4_warn(dev, "Failed to free icm of mr index:%d\n", + index); + return; + } + return __mlx4_mr_free_icm(dev, index); +} + +int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, + int npages, int page_shift, struct mlx4_mr *mr) +{ + u32 index; + int err; + + index = mlx4_mr_reserve(dev); + if (index == -1) + return -ENOMEM; + + err = mlx4_mr_alloc_reserved(dev, index, pd, iova, size, + access, npages, page_shift, mr); + if (err) + mlx4_mr_release(dev, index); + + return err; +} +EXPORT_SYMBOL_GPL(mlx4_mr_alloc); + +static void mlx4_mr_free_reserved(struct mlx4_dev *dev, struct mlx4_mr *mr) +{ + int err; + + if (mr->enabled == MLX4_MR_EN_HW) { + err = mlx4_HW2SW_MPT(dev, NULL, + key_to_hw_index(mr->key) & + (dev->caps.num_mpts - 1)); + if (err) + mlx4_warn(dev, "xxx HW2SW_MPT failed (%d)\n", err); + + mr->enabled = MLX4_MR_EN_SW; + } + mlx4_mtt_cleanup(dev, &mr->mtt); +} + +void mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr) +{ + mlx4_mr_free_reserved(dev, mr); + if (mr->enabled) + mlx4_mr_free_icm(dev, key_to_hw_index(mr->key)); + mlx4_mr_release(dev, key_to_hw_index(mr->key)); +} +EXPORT_SYMBOL_GPL(mlx4_mr_free); + +int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_mpt_entry *mpt_entry; + int err; + + err = mlx4_mr_alloc_icm(dev, key_to_hw_index(mr->key)); + if (err) + return err; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + err = PTR_ERR(mailbox); + goto err_table; + } + mpt_entry = mailbox->buf; + + memset(mpt_entry, 0, sizeof *mpt_entry); + + mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_MIO | + MLX4_MPT_FLAG_REGION | + mr->access); + + mpt_entry->key = cpu_to_be32(key_to_hw_index(mr->key)); + mpt_entry->pd_flags = cpu_to_be32(mr->pd | MLX4_MPT_PD_FLAG_EN_INV); + mpt_entry->start = cpu_to_be64(mr->iova); + mpt_entry->length = cpu_to_be64(mr->size); + mpt_entry->entity_size = cpu_to_be32(mr->mtt.page_shift); + + if (mr->mtt.order < 0) { + mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL); + mpt_entry->mtt_addr = 0; + } else { + mpt_entry->mtt_addr = cpu_to_be64(mlx4_mtt_addr(dev, + &mr->mtt)); + } + + if (mr->mtt.order >= 0 && mr->mtt.page_shift == 0) { + /* fast register MR in free state */ + mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_FREE); + mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG | + MLX4_MPT_PD_FLAG_RAE); + mpt_entry->mtt_sz = cpu_to_be32(1 << mr->mtt.order); + } else { + mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS); + } + + err = mlx4_SW2HW_MPT(dev, mailbox, + key_to_hw_index(mr->key) & (dev->caps.num_mpts - 1)); + if (err) { + mlx4_warn(dev, "SW2HW_MPT failed (%d)\n", err); + goto err_cmd; + } + mr->enabled = MLX4_MR_EN_HW; + + mlx4_free_cmd_mailbox(dev, mailbox); + + return 0; + +err_cmd: + mlx4_free_cmd_mailbox(dev, mailbox); + +err_table: + mlx4_mr_free_icm(dev, key_to_hw_index(mr->key)); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_mr_enable); + +static int mlx4_write_mtt_chunk(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + int start_index, int npages, u64 *page_list) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + __be64 *mtts; + dma_addr_t dma_handle; + int i; + + mtts = mlx4_table_find(&priv->mr_table.mtt_table, mtt->offset + + start_index, &dma_handle); + + if (!mtts) + return -ENOMEM; + + dma_sync_single_for_cpu(&dev->pdev->dev, dma_handle, + npages * sizeof (u64), DMA_TO_DEVICE); + + for (i = 0; i < npages; ++i) + mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); + + dma_sync_single_for_device(&dev->pdev->dev, dma_handle, + npages * sizeof (u64), DMA_TO_DEVICE); + + return 0; +} + +int __mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + int start_index, int npages, u64 *page_list) +{ + int err = 0; + int chunk; + int mtts_per_page; + int max_mtts_first_page; + + /* compute how may mtts fit in the first page */ + mtts_per_page = PAGE_SIZE / sizeof(u64); + max_mtts_first_page = mtts_per_page - (mtt->offset + start_index) + % mtts_per_page; + + chunk = min_t(int, max_mtts_first_page, npages); + + while (npages > 0) { + err = mlx4_write_mtt_chunk(dev, mtt, start_index, chunk, page_list); + if (err) + return err; + npages -= chunk; + start_index += chunk; + page_list += chunk; + + chunk = min_t(int, mtts_per_page, npages); + } + return err; +} + +int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + int start_index, int npages, u64 *page_list) +{ + struct mlx4_cmd_mailbox *mailbox = NULL; + __be64 *inbox = NULL; + int chunk; + int err = 0; + int i; + + if (mtt->order < 0) + return -EINVAL; + + if (mlx4_is_mfunc(dev)) { + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + inbox = mailbox->buf; + + while (npages > 0) { + chunk = min_t(int, MLX4_MAILBOX_SIZE / sizeof(u64) - 2, + npages); + inbox[0] = cpu_to_be64(mtt->offset + start_index); + inbox[1] = 0; + for (i = 0; i < chunk; ++i) + inbox[i + 2] = cpu_to_be64(page_list[i] | + MLX4_MTT_FLAG_PRESENT); + err = mlx4_WRITE_MTT(dev, mailbox, chunk); + if (err) { + mlx4_free_cmd_mailbox(dev, mailbox); + return err; + } + + npages -= chunk; + start_index += chunk; + page_list += chunk; + } + mlx4_free_cmd_mailbox(dev, mailbox); + return err; + } + + return __mlx4_write_mtt(dev, mtt, start_index, npages, page_list); +} +EXPORT_SYMBOL_GPL(mlx4_write_mtt); + +int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + struct mlx4_buf *buf) +{ + u64 *page_list; + int err; + int i; + + page_list = kmalloc(buf->npages * sizeof *page_list, GFP_KERNEL); + if (!page_list) + return -ENOMEM; + + for (i = 0; i < buf->npages; ++i) + if (buf->nbufs == 1) + page_list[i] = buf->direct.map + (i << buf->page_shift); + else + page_list[i] = buf->page_list[i].map; + + err = mlx4_write_mtt(dev, mtt, 0, buf->npages, page_list); + + kfree(page_list); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_buf_write_mtt); + +int mlx4_init_mr_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_mr_table *mr_table = &priv->mr_table; + int err; + + if (!is_power_of_2(dev->caps.num_mpts)) + return -EINVAL; + + /* Nothing to do for slaves - all MR handling is forwarded + * to the master */ + if (mlx4_is_slave(dev)) + return 0; + + err = mlx4_bitmap_init(&mr_table->mpt_bitmap, dev->caps.num_mpts, + ~0, dev->caps.reserved_mrws, 0); + if (err) + return err; + + err = mlx4_buddy_init(&mr_table->mtt_buddy, + ilog2(dev->caps.num_mtts / + (1 << log_mtts_per_seg))); + if (err) + goto err_buddy; + + if (dev->caps.reserved_mtts) { + priv->reserved_mtts = + mlx4_alloc_mtt_range(dev, + fls(dev->caps.reserved_mtts - 1)); + if (priv->reserved_mtts < 0) { + mlx4_warn(dev, "MTT table of order %d is too small.\n", + mr_table->mtt_buddy.max_order); + err = -ENOMEM; + goto err_reserve_mtts; + } + } + + return 0; + +err_reserve_mtts: + mlx4_buddy_cleanup(&mr_table->mtt_buddy); + +err_buddy: + mlx4_bitmap_cleanup(&mr_table->mpt_bitmap); + + return err; +} + +void mlx4_cleanup_mr_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_mr_table *mr_table = &priv->mr_table; + + if (mlx4_is_slave(dev)) + return; + if (priv->reserved_mtts >= 0) + mlx4_free_mtt_range(dev, priv->reserved_mtts, + fls(dev->caps.reserved_mtts - 1)); + mlx4_buddy_cleanup(&mr_table->mtt_buddy); + mlx4_bitmap_cleanup(&mr_table->mpt_bitmap); +} + +static inline int mlx4_check_fmr(struct mlx4_fmr *fmr, u64 *page_list, + int npages, u64 iova) +{ + int i, page_mask; + + if (npages > fmr->max_pages) + return -EINVAL; + + page_mask = (1 << fmr->page_shift) - 1; + + /* We are getting page lists, so va must be page aligned. */ + if (iova & page_mask) + return -EINVAL; + + /* Trust the user not to pass misaligned data in page_list */ + if (0) + for (i = 0; i < npages; ++i) { + if (page_list[i] & ~page_mask) + return -EINVAL; + } + + if (fmr->maps >= fmr->max_maps) + return -EINVAL; + + return 0; +} + +int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list, + int npages, u64 iova, u32 *lkey, u32 *rkey) +{ + u32 key; + int i, err; + + err = mlx4_check_fmr(fmr, page_list, npages, iova); + if (err) + return err; + + ++fmr->maps; + + key = key_to_hw_index(fmr->mr.key); + key += dev->caps.num_mpts; + *lkey = *rkey = fmr->mr.key = hw_index_to_key(key); + + *(u8 *) fmr->mpt = MLX4_MPT_STATUS_SW; + + /* Make sure MPT status is visible before writing MTT entries */ + wmb(); + + dma_sync_single_for_cpu(&dev->pdev->dev, fmr->dma_handle, + npages * sizeof(u64), DMA_TO_DEVICE); + + for (i = 0; i < npages; ++i) + fmr->mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); + + dma_sync_single_for_device(&dev->pdev->dev, fmr->dma_handle, + npages * sizeof(u64), DMA_TO_DEVICE); + + fmr->mpt->key = cpu_to_be32(key); + fmr->mpt->lkey = cpu_to_be32(key); + fmr->mpt->length = cpu_to_be64(npages * (1ull << fmr->page_shift)); + fmr->mpt->start = cpu_to_be64(iova); + + /* Make MTT entries are visible before setting MPT status */ + wmb(); + + *(u8 *) fmr->mpt = MLX4_MPT_STATUS_HW; + + /* Make sure MPT status is visible before consumer can use FMR */ + wmb(); + + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_map_phys_fmr); + +int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages, + int max_maps, u8 page_shift, struct mlx4_fmr *fmr) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + u64 mtt_offset; + int err = -ENOMEM; + + if (max_maps > dev->caps.max_fmr_maps) + return -EINVAL; + + if (page_shift < (ffs(dev->caps.page_size_cap) - 1) || page_shift >= 32) + return -EINVAL; + + /* All MTTs must fit in the same page */ + if (max_pages * sizeof *fmr->mtts > PAGE_SIZE) + return -EINVAL; + + fmr->page_shift = page_shift; + fmr->max_pages = max_pages; + fmr->max_maps = max_maps; + fmr->maps = 0; + + err = mlx4_mr_alloc(dev, pd, 0, 0, access, max_pages, + page_shift, &fmr->mr); + if (err) + return err; + + mtt_offset = fmr->mr.mtt.offset * dev->caps.mtt_entry_sz; + + fmr->mtts = mlx4_table_find(&priv->mr_table.mtt_table, + fmr->mr.mtt.offset, + &fmr->dma_handle); + + if (!fmr->mtts) { + err = -ENOMEM; + goto err_free; + } + + return 0; + +err_free: + mlx4_mr_free(dev, &fmr->mr); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_fmr_alloc); + +int mlx4_fmr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, + u32 pd, u32 access, int max_pages, + int max_maps, u8 page_shift, struct mlx4_fmr *fmr) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int err = -ENOMEM; + + if (page_shift < (ffs(dev->caps.page_size_cap) - 1) || page_shift >= 32) + return -EINVAL; + + /* All MTTs must fit in the same page */ + if (max_pages * sizeof *fmr->mtts > PAGE_SIZE) + return -EINVAL; + + fmr->page_shift = page_shift; + fmr->max_pages = max_pages; + fmr->max_maps = max_maps; + fmr->maps = 0; + + err = mlx4_mr_alloc_reserved(dev, mridx, pd, 0, 0, access, max_pages, + page_shift, &fmr->mr); + if (err) + return err; + + fmr->mtts = mlx4_table_find(&priv->mr_table.mtt_table, + fmr->mr.mtt.offset, + &fmr->dma_handle); + if (!fmr->mtts) { + err = -ENOMEM; + goto err_free; + } + + return 0; + +err_free: + mlx4_mr_free_reserved(dev, &fmr->mr); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_fmr_alloc_reserved); + +int mlx4_fmr_enable(struct mlx4_dev *dev, struct mlx4_fmr *fmr) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int err; + + err = mlx4_mr_enable(dev, &fmr->mr); + if (err) + return err; + + fmr->mpt = mlx4_table_find(&priv->mr_table.dmpt_table, + key_to_hw_index(fmr->mr.key), NULL); + if (!fmr->mpt) + return -ENOMEM; + + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_fmr_enable); + +void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr, + u32 *lkey, u32 *rkey) +{ + struct mlx4_cmd_mailbox *mailbox; + int err; + + if (!fmr->maps) + return; + + fmr->maps = 0; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + err = PTR_ERR(mailbox); + printk(KERN_WARNING "mlx4_ib: mlx4_alloc_cmd_mailbox" + " failed (%d)\n", err); + return; + } + + err = mlx4_HW2SW_MPT(dev, NULL, + key_to_hw_index(fmr->mr.key) & + (dev->caps.num_mpts - 1)); + mlx4_free_cmd_mailbox(dev, mailbox); + if (err) { + printk(KERN_WARNING "mlx4_ib: mlx4_HW2SW_MPT failed (%d)\n", + err); + return; + } + fmr->mr.enabled = MLX4_MR_EN_SW; +} +EXPORT_SYMBOL_GPL(mlx4_fmr_unmap); + +int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr) +{ + if (fmr->maps) + return -EBUSY; + + mlx4_mr_free(dev, &fmr->mr); + fmr->mr.enabled = MLX4_MR_DISABLED; + + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_fmr_free); + +int mlx4_fmr_free_reserved(struct mlx4_dev *dev, struct mlx4_fmr *fmr) +{ + if (fmr->maps) + return -EBUSY; + + mlx4_mr_free_reserved(dev, &fmr->mr); + fmr->mr.enabled = MLX4_MR_DISABLED; + + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_fmr_free_reserved); + +int mlx4_SYNC_TPT(struct mlx4_dev *dev) +{ + return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_SYNC_TPT, 1000, + MLX4_CMD_NATIVE); +} +EXPORT_SYMBOL_GPL(mlx4_SYNC_TPT); diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pd.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pd.c new file mode 100755 index 0000000..bcefdd6 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pd.c @@ -0,0 +1,269 @@ +/* + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2005, 2011-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include + +#include "mlx4.h" +#include "icm.h" + +enum { + MLX4_NUM_RESERVED_UARS = 8 +}; + +int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + *pdn = mlx4_bitmap_alloc(&priv->pd_bitmap); + if (*pdn == -1) + return -ENOMEM; + + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_pd_alloc); + +void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn) +{ + mlx4_bitmap_free(&mlx4_priv(dev)->pd_bitmap, pdn); +} +EXPORT_SYMBOL_GPL(mlx4_pd_free); + +int __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + *xrcdn = mlx4_bitmap_alloc(&priv->xrcd_bitmap); + if (*xrcdn == -1) + return -ENOMEM; + + return 0; +} + +int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn) +{ + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + err = mlx4_cmd_imm(dev, 0, &out_param, + RES_XRCD, RES_OP_RESERVE, + MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, 0); + if (err) + return err; + + *xrcdn = get_param_l(&out_param); + return 0; + } + return __mlx4_xrcd_alloc(dev, xrcdn); +} +EXPORT_SYMBOL_GPL(mlx4_xrcd_alloc); + +void __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn) +{ + mlx4_bitmap_free(&mlx4_priv(dev)->xrcd_bitmap, xrcdn); +} + +void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn) +{ + u64 in_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, xrcdn); + err = mlx4_cmd(dev, in_param, RES_XRCD, + RES_OP_RESERVE, MLX4_CMD_FREE_RES, + MLX4_CMD_TIME_CLASS_A, 0); + if (err) + mlx4_warn(dev, "Failed to release xrcdn %d\n", xrcdn); + } else + __mlx4_xrcd_free(dev, xrcdn); +} +EXPORT_SYMBOL_GPL(mlx4_xrcd_free); + +int mlx4_init_pd_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + return mlx4_bitmap_init(&priv->pd_bitmap, dev->caps.num_pds, + (1 << NOT_MASKED_PD_BITS) - 1, + dev->caps.reserved_pds, 0); +} + +void mlx4_cleanup_pd_table(struct mlx4_dev *dev) +{ + mlx4_bitmap_cleanup(&mlx4_priv(dev)->pd_bitmap); +} + +int mlx4_init_xrcd_table(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + return mlx4_bitmap_init(&priv->xrcd_bitmap, (1 << 16), + (1 << 16) - 1, dev->caps.reserved_xrcds + 1, 0); +} + +void mlx4_cleanup_xrcd_table(struct mlx4_dev *dev) +{ + mlx4_bitmap_cleanup(&mlx4_priv(dev)->xrcd_bitmap); +} + +int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar) +{ + int offset; + + uar->index = mlx4_bitmap_alloc(&mlx4_priv(dev)->uar_table.bitmap); + if (uar->index == -1) + return -ENOMEM; + + if (mlx4_is_slave(dev)) + offset = uar->index % ((int) pci_resource_len(dev->pdev, 2) / + dev->caps.uar_page_size); + else + offset = uar->index; + uar->pfn = (pci_resource_start(dev->pdev, 2) >> PAGE_SHIFT) + offset; + uar->map = NULL; + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_uar_alloc); + +void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar) +{ + mlx4_bitmap_free(&mlx4_priv(dev)->uar_table.bitmap, uar->index); +} +EXPORT_SYMBOL_GPL(mlx4_uar_free); + +#ifdef __VMKERNEL_BF_ENABLE__ +int mlx4_bf_alloc(struct mlx4_dev *dev, struct mlx4_bf *bf) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_uar *uar; + int err = 0; + int idx; + + if (!priv->bf_mapping) + return -ENOMEM; + + mutex_lock(&priv->bf_mutex); + if (!list_empty(&priv->bf_list)) + uar = list_entry(priv->bf_list.next, struct mlx4_uar, bf_list); + else { + if (mlx4_bitmap_avail(&priv->uar_table.bitmap) < MLX4_NUM_RESERVED_UARS) { + err = -ENOMEM; + goto out; + } + uar = kmalloc(sizeof *uar, GFP_KERNEL); + if (!uar) { + err = -ENOMEM; + goto out; + } + err = mlx4_uar_alloc(dev, uar); + if (err) + goto free_kmalloc; + + uar->map = ioremap(uar->pfn << PAGE_SHIFT, PAGE_SIZE); + if (!uar->map) { + err = -ENOMEM; + goto free_uar; + } + + uar->bf_map = io_mapping_map_wc(priv->bf_mapping, uar->index << PAGE_SHIFT); + if (!uar->bf_map) { + err = -ENOMEM; + goto unamp_uar; + } + uar->free_bf_bmap = 0; + list_add(&uar->bf_list, &priv->bf_list); + } + + bf->uar = uar; + idx = ffz(uar->free_bf_bmap); + uar->free_bf_bmap |= 1 << idx; + bf->uar = uar; + bf->offset = 0; + bf->buf_size = dev->caps.bf_reg_size / 2; + bf->reg = uar->bf_map + idx * dev->caps.bf_reg_size; + if (uar->free_bf_bmap == (1 << dev->caps.bf_regs_per_page) - 1) + list_del_init(&uar->bf_list); + + goto out; + +unamp_uar: + bf->uar = NULL; + iounmap(uar->map); + +free_uar: + mlx4_uar_free(dev, uar); + +free_kmalloc: + kfree(uar); + +out: + mutex_unlock(&priv->bf_mutex); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_bf_alloc); + +void mlx4_bf_free(struct mlx4_dev *dev, struct mlx4_bf *bf) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int idx; + + if (!bf->uar || !bf->uar->bf_map) + return; + + mutex_lock(&priv->bf_mutex); + idx = (bf->reg - bf->uar->bf_map) / dev->caps.bf_reg_size; + bf->uar->free_bf_bmap &= ~(1 << idx); + if (!bf->uar->free_bf_bmap) { + if (!list_empty(&bf->uar->bf_list)) + list_del(&bf->uar->bf_list); + + io_mapping_unmap(bf->uar->bf_map); + iounmap(bf->uar->map); + mlx4_uar_free(dev, bf->uar); + kfree(bf->uar); + } else if (list_empty(&bf->uar->bf_list)) + list_add(&bf->uar->bf_list, &priv->bf_list); + + mutex_unlock(&priv->bf_mutex); +} +EXPORT_SYMBOL_GPL(mlx4_bf_free); +#endif /* #ifdef __VMKERNEL_BF_ENABLE__ */ + +int mlx4_init_uar_table(struct mlx4_dev *dev) +{ + if (dev->caps.num_uars <= 128) { + mlx4_err(dev, "Only %d UAR pages (need more than 128)\n", + dev->caps.num_uars); + mlx4_err(dev, "Increase firmware log2_uar_bar_megabytes?\n"); + return -ENODEV; + } + + return mlx4_bitmap_init(&mlx4_priv(dev)->uar_table.bitmap, + dev->caps.num_uars, dev->caps.num_uars - 1, + dev->caps.reserved_uars, 0); +} + +void mlx4_cleanup_uar_table(struct mlx4_dev *dev) +{ + mlx4_bitmap_cleanup(&mlx4_priv(dev)->uar_table.bitmap); +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pkey.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pkey.c new file mode 100755 index 0000000..bd0772a --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/pkey.c @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2010-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include "mlx4.h" + +void mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val) +{ + struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev); + + if (!dev->caps.sqp_demux) + return; + + priv->virt2phys_pkey[slave][port - 1][i] = val; +} +EXPORT_SYMBOL(mlx4_sync_pkey_table); diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/port.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/port.c new file mode 100755 index 0000000..ba92c04 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/port.c @@ -0,0 +1,975 @@ +/* + * Copyright (c) 2007, 2011-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* NOT __VMKERNEL_MODULE__ */ + +#include + +#include "mlx4.h" + +#define MLX4_MAC_VALID (1ull << 63) +#define MLX4_MAC_MASK 0xffffffffffffULL + +#define MLX4_VLAN_VALID (1u << 31) +#define MLX4_VLAN_MASK 0xfff + +#define MLX4_STATS_TRAFFIC_COUNTERS_MASK 0xfULL +#define MLX4_STATS_TRAFFIC_DROPS_MASK 0xc0ULL +#define MLX4_STATS_ERROR_COUNTERS_MASK 0x1ffc30ULL +#define MLX4_STATS_PORT_COUNTERS_MASK 0x1fe00000ULL + +void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table) +{ + int i; + + mutex_init(&table->mutex); + for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { + table->entries[i] = 0; + table->refs[i] = 0; + } + table->max = 1 << dev->caps.log_num_macs; + table->total = 0; +} + +void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table) +{ + int i; + + mutex_init(&table->mutex); + for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { + table->entries[i] = 0; + table->refs[i] = 0; + } + table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR; + table->total = 0; +} + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +int mlx4_uc_steer_add(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn) +#else +static int mlx4_uc_steer_add(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn) +#endif /* NET QUEUE */ +{ + struct mlx4_qp qp; + u8 gid[16] = {0}; + __be64 be_mac; + int err; + + qp.qpn = *qpn; + + mac &= 0xffffffffffffULL; + be_mac = cpu_to_be64(mac << 16); + memcpy(&gid[10], &be_mac, ETH_ALEN); + gid[5] = port; + + err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); + if (err) + mlx4_warn(dev, "Failed Attaching Unicast\n"); + + return err; +} +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +EXPORT_SYMBOL_GPL(mlx4_uc_steer_add); +#endif /* NET QUEUE */ + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +void mlx4_uc_steer_release(struct mlx4_dev *dev, u8 port, + u64 mac, int qpn) +#else +static void mlx4_uc_steer_release(struct mlx4_dev *dev, u8 port, + u64 mac, int qpn) +#endif /* NET QUEUE */ +{ + struct mlx4_qp qp; + u8 gid[16] = {0}; + __be64 be_mac; + + qp.qpn = qpn; + mac &= 0xffffffffffffULL; + be_mac = cpu_to_be64(mac << 16); + memcpy(&gid[10], &be_mac, ETH_ALEN); + gid[5] = port; + + mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); +} +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +EXPORT_SYMBOL_GPL(mlx4_uc_steer_release); +#endif /* NET QUEUE */ + +static int validate_index(struct mlx4_dev *dev, + struct mlx4_mac_table *table, int index) +{ + int err = 0; + + if (index < 0 || index >= table->max || !table->entries[index]) { + mlx4_warn(dev, "No valid Mac entry for the given index\n"); + err = -EINVAL; + } + return err; +} + +static int find_index(struct mlx4_dev *dev, + struct mlx4_mac_table *table, u64 mac) +{ + int i; + + for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { + if ((mac & MLX4_MAC_MASK) == + (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) + return i; + } + /* Mac not found */ + return -EINVAL; +} + +int mlx4_get_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn) +{ + struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; + struct mlx4_mac_entry *entry; + int index = 0; + int err = 0; + + mlx4_dbg(dev, "Registering MAC: 0x%llx for adding\n", + (unsigned long long) mac); + index = mlx4_register_mac(dev, port, mac); + if (index < 0) { + err = index; + mlx4_err(dev, "Failed adding MAC: 0x%llx\n", + (unsigned long long) mac); + return err; + } + + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) { + *qpn = info->base_qpn + index; + return 0; + } + + err = mlx4_qp_reserve_range(dev, 1, 1, qpn); + mlx4_dbg(dev, "Reserved qp %d\n", *qpn); + if (err) { + mlx4_err(dev, "Failed to reserve qp for mac registration\n"); + goto qp_err; + } + + err = mlx4_uc_steer_add(dev, port, mac, qpn); + if (err) + goto steer_err; + + entry = kmalloc(sizeof *entry, GFP_KERNEL); + if (!entry) { + err = -ENOMEM; + goto alloc_err; + } + entry->mac = mac; + err = radix_tree_insert(&info->mac_tree, *qpn, entry); + if (err) + goto insert_err; + return 0; + +insert_err: + kfree(entry); + +alloc_err: + mlx4_uc_steer_release(dev, port, mac, *qpn); + +steer_err: + mlx4_qp_release_range(dev, *qpn, 1); + +qp_err: + mlx4_unregister_mac(dev, port, mac); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_get_eth_qp); + +void mlx4_put_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int qpn) +{ + struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; + struct mlx4_mac_entry *entry; + + mlx4_dbg(dev, "Registering MAC: 0x%llx for deleting\n", + (unsigned long long) mac); + mlx4_unregister_mac(dev, port, mac); + + if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) { + entry = radix_tree_lookup(&info->mac_tree, qpn); + if (entry) { + mlx4_dbg(dev, "Releasing qp: port %d, mac 0x%llx," + " qpn %d\n", port, + (unsigned long long) mac, qpn); + mlx4_uc_steer_release(dev, port, entry->mac, qpn); + mlx4_qp_release_range(dev, qpn, 1); + radix_tree_delete(&info->mac_tree, qpn); + kfree(entry); + } + } +} +EXPORT_SYMBOL_GPL(mlx4_put_eth_qp); + +static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port, + __be64 *entries) +{ + struct mlx4_cmd_mailbox *mailbox; + u32 in_mod; + int err; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE); + + in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port; + + err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) +{ + struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; + struct mlx4_mac_table *table = &info->mac_table; + int i, err = 0; + int free = -1; + + mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d\n", + (unsigned long long) mac, port); + + mutex_lock(&table->mutex); + for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { + if (free < 0 && !table->entries[i]) { + free = i; + continue; + } + + if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { + /* MAC already registered, Must not have duplicates */ + err = -EEXIST; + goto out; + } + } + + mlx4_dbg(dev, "Free MAC index is %d\n", free); + + if (table->total == table->max) { + /* No free mac entries */ + err = -ENOSPC; + goto out; + } + + /* Register new MAC */ + table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID); + + err = mlx4_set_port_mac_table(dev, port, table->entries); + if (unlikely(err)) { + mlx4_err(dev, "Failed adding MAC: 0x%llx\n", + (unsigned long long) mac); + table->entries[free] = 0; + goto out; + } + + err = free; + ++table->total; +out: + mutex_unlock(&table->mutex); + return err; +} +EXPORT_SYMBOL_GPL(__mlx4_register_mac); + +int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) +{ + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&out_param, port); + err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, + RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (err) + return err; + + return get_param_l(&out_param); + } + return __mlx4_register_mac(dev, port, mac); +} +EXPORT_SYMBOL_GPL(mlx4_register_mac); + + +void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) +{ + struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; + struct mlx4_mac_table *table = &info->mac_table; + int index; + + index = find_index(dev, table, mac); + + mutex_lock(&table->mutex); + + if (validate_index(dev, table, index)) + goto out; + + table->entries[index] = 0; + mlx4_set_port_mac_table(dev, port, table->entries); + --table->total; +out: + mutex_unlock(&table->mutex); +} +EXPORT_SYMBOL_GPL(__mlx4_unregister_mac); + +void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) +{ + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&out_param, port); + err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, + RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + return; + } + __mlx4_unregister_mac(dev, port, mac); + return; +} +EXPORT_SYMBOL_GPL(mlx4_unregister_mac); + +int mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac) +{ + struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; + struct mlx4_mac_table *table = &info->mac_table; + struct mlx4_mac_entry *entry; + int index = qpn - info->base_qpn; + int err = 0; + + if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) { + entry = radix_tree_lookup(&info->mac_tree, qpn); + if (!entry) + return -EINVAL; + mlx4_uc_steer_release(dev, port, entry->mac, qpn); + mlx4_unregister_mac(dev, port, entry->mac); + entry->mac = new_mac; + mlx4_register_mac(dev, port, new_mac); + err = mlx4_uc_steer_add(dev, port, entry->mac, &qpn); + return err; + } + + /* CX1 doesn't support multi-functions */ + mutex_lock(&table->mutex); + + err = validate_index(dev, table, index); + if (err) + goto out; + + table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID); + + err = mlx4_set_port_mac_table(dev, port, table->entries); + if (unlikely(err)) { + mlx4_err(dev, "Failed adding MAC: 0x%llx\n", + (unsigned long long) new_mac); + table->entries[index] = 0; + } +out: + mutex_unlock(&table->mutex); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_replace_mac); + +static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port, + __be32 *entries) +{ + struct mlx4_cmd_mailbox *mailbox; + u32 in_mod; + int err; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE); + in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port; + err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); + + mlx4_free_cmd_mailbox(dev, mailbox); + + return err; +} + +int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx) +{ + struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; + int i; + + for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) { + if (table->refs[i] && + (vid == (MLX4_VLAN_MASK & + be32_to_cpu(table->entries[i])))) { + /* VLAN already registered, increase reference count */ + *idx = i; + return 0; + } + } + + return -ENOENT; +} +EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan); + +static int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, + int *index) +{ + struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; + int i, err = 0; + int free = -1; + + mutex_lock(&table->mutex); + + if (table->total == table->max) { + /* No free vlan entries */ + err = -ENOSPC; + goto out; + } + + for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) { + if (free < 0 && (table->refs[i] == 0)) { + free = i; + continue; + } + + if (table->refs[i] && + (vlan == (MLX4_VLAN_MASK & + be32_to_cpu(table->entries[i])))) { + /* Vlan already registered, increase references count */ + *index = i; + ++table->refs[i]; + goto out; + } + } + + if (free < 0) { + err = -ENOMEM; + goto out; + } + + /* Register new VLAN */ + table->refs[free] = 1; + table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID); + + err = mlx4_set_port_vlan_table(dev, port, table->entries); + if (unlikely(err)) { + mlx4_warn(dev, "Failed adding vlan: %u\n", vlan); + table->refs[free] = 0; + table->entries[free] = 0; + goto out; + } + + *index = free; + ++table->total; +out: + mutex_unlock(&table->mutex); + return err; +} + +int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index) +{ + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&out_param, port); + err = mlx4_cmd_imm(dev, vlan, &out_param, RES_VLAN, + RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (!err) + *index = get_param_l(&out_param); + + return err; + } + return __mlx4_register_vlan(dev, port, vlan, index); +} +EXPORT_SYMBOL_GPL(mlx4_register_vlan); + +static void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index) +{ + struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; + + if (index < MLX4_VLAN_REGULAR) { + mlx4_warn(dev, "Trying to free special vlan index %d\n", index); + return; + } + + mutex_lock(&table->mutex); + if (!table->refs[index]) { + mlx4_warn(dev, "No vlan entry for index %d\n", index); + goto out; + } + if (--table->refs[index]) { + mlx4_dbg(dev, "Have more references for index %d," + "no need to modify vlan table\n", index); + goto out; + } + table->entries[index] = 0; + mlx4_set_port_vlan_table(dev, port, table->entries); + --table->total; +out: + mutex_unlock(&table->mutex); +} + +void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index) +{ + u64 in_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, port); + err = mlx4_cmd(dev, in_param, RES_VLAN, RES_OP_RESERVE_AND_MAP, + MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); + if (!err) + mlx4_warn(dev, "Failed freeing vlan at index:%d\n", + index); + + return; + } + __mlx4_unregister_vlan(dev, port, index); +} +EXPORT_SYMBOL_GPL(mlx4_unregister_vlan); + +int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps) +{ + struct mlx4_cmd_mailbox *inmailbox, *outmailbox; + u8 *inbuf, *outbuf; + int err; + + inmailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(inmailbox)) + return PTR_ERR(inmailbox); + + outmailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(outmailbox)) { + mlx4_free_cmd_mailbox(dev, inmailbox); + return PTR_ERR(outmailbox); + } + + inbuf = inmailbox->buf; + outbuf = outmailbox->buf; + memset(inbuf, 0, 256); + memset(outbuf, 0, 256); + inbuf[0] = 1; + inbuf[1] = 1; + inbuf[2] = 1; + inbuf[3] = 1; + *(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015); + *(__be32 *) (&inbuf[20]) = cpu_to_be32(port); + + err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3, + MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, + MLX4_CMD_NATIVE); + if (!err) + *caps = *(__be32 *) (outbuf + 84); + mlx4_free_cmd_mailbox(dev, inmailbox); + mlx4_free_cmd_mailbox(dev, outmailbox); + return err; +} + +int mlx4_check_ext_port_caps(struct mlx4_dev *dev, u8 port) +{ + struct mlx4_cmd_mailbox *inmailbox, *outmailbox; + u8 *inbuf, *outbuf; + int err, packet_error; + + inmailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(inmailbox)) + return PTR_ERR(inmailbox); + + outmailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(outmailbox)) { + mlx4_free_cmd_mailbox(dev, inmailbox); + return PTR_ERR(outmailbox); + } + + inbuf = inmailbox->buf; + outbuf = outmailbox->buf; + memset(inbuf, 0, 256); + memset(outbuf, 0, 256); + inbuf[0] = 1; + inbuf[1] = 1; + inbuf[2] = 1; + inbuf[3] = 1; + + *(__be16 *) (&inbuf[16]) = MLX4_ATTR_EXTENDED_PORT_INFO; + *(__be32 *) (&inbuf[20]) = cpu_to_be32(port); + + err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3, + MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, + MLX4_CMD_NATIVE); + + packet_error = be16_to_cpu(*(__be16 *) (outbuf + 4)); + + dev->caps.ext_port_cap[port] = (!err && !packet_error) ? + MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO + : 0; + + mlx4_free_cmd_mailbox(dev, inmailbox); + mlx4_free_cmd_mailbox(dev, outmailbox); + return err; +} + +static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod, + u8 op_mod, struct mlx4_cmd_mailbox *inbox) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_port_info *port_info; + struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master; + struct mlx4_slave_state *slave_st = &master->slave_state[slave]; + struct mlx4_set_port_rqp_calc_context *qpn_context; + struct mlx4_set_port_general_context *gen_context; + int reset_qkey_viols; + int port; + int is_eth; + u32 in_modifier; + u32 promisc; + u16 mtu, prev_mtu; + int err; + int i; + __be32 agg_cap_mask; + __be32 slave_cap_mask; + __be32 new_cap_mask; + + port = in_mod & 0xff; + in_modifier = in_mod >> 8; + is_eth = op_mod; + port_info = &priv->port[port]; + + /* Slaves cannot perform SET_PORT operations except changing MTU */ + if (is_eth) { + if (slave != dev->caps.function && + in_modifier != MLX4_SET_PORT_GENERAL) { + mlx4_warn(dev, "denying SET_PORT for slave:%d\n", + slave); + return -EINVAL; + } + switch (in_modifier) { + case MLX4_SET_PORT_RQP_CALC: + qpn_context = inbox->buf; + qpn_context->base_qpn = + cpu_to_be32(port_info->base_qpn); + qpn_context->n_mac = 0x7; + promisc = be32_to_cpu(qpn_context->promisc) >> + SET_PORT_PROMISC_SHIFT; + qpn_context->promisc = cpu_to_be32( + promisc << SET_PORT_PROMISC_SHIFT | + port_info->base_qpn); + promisc = be32_to_cpu(qpn_context->mcast) >> + SET_PORT_MC_PROMISC_SHIFT; + qpn_context->mcast = cpu_to_be32( + promisc << SET_PORT_MC_PROMISC_SHIFT | + port_info->base_qpn); + break; + case MLX4_SET_PORT_GENERAL: + gen_context = inbox->buf; + /* Mtu is configured as the max MTU among all the + * the functions on the port. */ + mtu = be16_to_cpu(gen_context->mtu); + mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port]); + prev_mtu = slave_st->mtu[port]; + slave_st->mtu[port] = mtu; + if (mtu > master->max_mtu[port]) + master->max_mtu[port] = mtu; + if (mtu < prev_mtu && prev_mtu == + master->max_mtu[port]) { + slave_st->mtu[port] = mtu; + master->max_mtu[port] = mtu; + for (i = 0; i < dev->num_slaves; i++) { + master->max_mtu[port] = + max(master->max_mtu[port], + master->slave_state[i].mtu[port]); + } + } + + gen_context->mtu = cpu_to_be16(master->max_mtu[port]); + break; + } + return mlx4_cmd(dev, inbox->dma, in_mod, op_mod, + MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_NATIVE); + } + + /* For IB, we only consider: + * - The capability mask, which is set to the aggregate of all + * slave function capabilities + * - The QKey violatin counter - reset according to each request. + */ + + if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { + reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40; + new_cap_mask = ((__be32 *) inbox->buf)[2]; + } else { + reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1; + new_cap_mask = ((__be32 *) inbox->buf)[1]; + } + + /* NO DEV_MGR in multifunc mode */ + if (mlx4_is_mfunc(dev) && + (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_DEV_MGMT_SUP)) + return -EINVAL; + + if ((slave != dev->caps.function) && reset_qkey_viols) + return -EINVAL; + + agg_cap_mask = 0; + slave_cap_mask = + priv->mfunc.master.slave_state[slave].ib_cap_mask[port]; + priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask; + for (i = 0; i < dev->num_slaves; i++) + agg_cap_mask |= + priv->mfunc.master.slave_state[i].ib_cap_mask[port]; + + /* Only clear mailbox for guests. Guests may ONLY set their own CAP + * Mask. Master may be setting MTU or PKEY table size, or VL_cap + */ + if (slave != dev->caps.function) + memset(inbox->buf, 0, 256); + if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { + if (reset_qkey_viols) + *(u8 *) inbox->buf |= 1 << 6; + ((__be32 *) inbox->buf)[2] = agg_cap_mask; + } else { + if (reset_qkey_viols) + ((u8 *) inbox->buf)[3] |= 0x1; + ((__be32 *) inbox->buf)[1] = agg_cap_mask; + } + + err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); + if (err) + priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = + slave_cap_mask; + return err; +} + +int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + return mlx4_common_set_port(dev, slave, vhcr->in_modifier, + vhcr->op_modifier, inbox); +} + +/* bit locations for set port command with zero op modifier */ +enum { + MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */ + MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */ + MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20, + MLX4_CHANGE_PORT_VL_CAP = 21, + MLX4_CHANGE_PORT_MTU_CAP = 22, +}; + +#ifdef __VMKERNEL_MODULE__ + #define CX3_PPF_DEV_ID 0x1003 +#endif /* __VMKERNEL_MODULE__ */ + +int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_size) +{ + struct mlx4_cmd_mailbox *mailbox; + int err, vl_cap; + + if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) + return 0; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + memset(mailbox->buf, 0, 256); + + ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; + +#ifdef __VMKERNEL_MODULE__ + /* for non CX3 devices, start with 4 VLs to avoid errors in syslog */ + if (dev->pdev->device != CX3_PPF_DEV_ID) + vl_cap = 4; + else + vl_cap = 8; + + /* IB VL CAP enum isn't used by the firmware, just numerical values */ + for (; vl_cap >= 1; vl_cap >>= 1) { +#else + for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) { +#endif /* __VMKERNEL_MODULE__ */ + ((__be32 *) mailbox->buf)[0] = cpu_to_be32( + (1 << MLX4_CHANGE_PORT_MTU_CAP) | + (1 << MLX4_CHANGE_PORT_VL_CAP) | + (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) | + (vl_cap << MLX4_SET_PORT_VL_CAP)); + + if (pkey_tbl_size >= 0 && mlx4_is_master(dev)) { + ((__be32 *) mailbox->buf)[0] |= + cpu_to_be32(1 << MLX4_CHANGE_PORT_PKEY_TBL_SZ); + ((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_size); + } + + err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); + if (err != -ENOMEM) + break; + } + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, + u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_set_port_general_context *context; + int err; + u32 in_mod; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + context = mailbox->buf; + memset(context, 0, sizeof *context); + + context->flags = SET_PORT_GEN_ALL_VALID; + context->mtu = cpu_to_be16(mtu); + context->pptx = (pptx * (!pfctx)) << 7; + context->pfctx = pfctx; + context->pprx = (pprx * (!pfcrx)) << 7; + context->pfcrx = pfcrx; + + in_mod = MLX4_SET_PORT_GENERAL << 8 | port; + err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} +EXPORT_SYMBOL(mlx4_SET_PORT_general); + +int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, + u8 promisc) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_set_port_rqp_calc_context *context; + int err; + u32 in_mod; + u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ? + MCAST_DIRECT : MCAST_DEFAULT; + + if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER && + dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) + return 0; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + context = mailbox->buf; + memset(context, 0, sizeof *context); + + context->base_qpn = cpu_to_be32(base_qpn); + context->n_mac = dev->caps.log_num_macs; + context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | + base_qpn); + context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT | + base_qpn); + context->intra_no_vlan = 0; + context->no_vlan = MLX4_NO_VLAN_IDX; + context->intra_vlan_miss = 0; + context->vlan_miss = MLX4_VLAN_MISS_IDX; + + in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port; + err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} +EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc); + +int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err = 0; + + return err; +} + +int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, + u64 mac, u64 clear, u8 mode) +{ + return mlx4_cmd(dev, (mac | (clear << 63)), port, mode, + MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_WRAPPED); +} +EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR); + +int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err = 0; + + return err; +} + +int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave, + u32 in_mod, struct mlx4_cmd_mailbox *outbox) +{ + return mlx4_cmd_box(dev, 0, outbox->dma, in_mod, 0, + MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_NATIVE); +} + +int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + if (slave != dev->caps.function) + return 0; + return mlx4_common_dump_eth_stats(dev, slave, + vhcr->in_modifier, outbox); +} + +void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap) +{ + if (!mlx4_is_mfunc(dev)) { + *stats_bitmap = 0; + return; + } + + *stats_bitmap = (MLX4_STATS_TRAFFIC_COUNTERS_MASK | + MLX4_STATS_TRAFFIC_DROPS_MASK | + MLX4_STATS_PORT_COUNTERS_MASK); + + if (mlx4_is_master(dev)) + *stats_bitmap |= MLX4_STATS_ERROR_COUNTERS_MASK; +} +EXPORT_SYMBOL(mlx4_set_stats_bitmap); diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/profile.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/profile.c new file mode 100755 index 0000000..26ca794 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/profile.c @@ -0,0 +1,249 @@ +/* + * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. + * Copyright (c) 2005, 2011-2013 Mellanox Technologies. All rights reserved. + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#ifdef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "mlx4.h" +#include "fw.h" + +enum { + MLX4_RES_QP, + MLX4_RES_RDMARC, + MLX4_RES_ALTC, + MLX4_RES_AUXC, + MLX4_RES_SRQ, + MLX4_RES_CQ, + MLX4_RES_EQ, + MLX4_RES_DMPT, + MLX4_RES_CMPT, + MLX4_RES_MTT, + MLX4_RES_MCG, + MLX4_RES_NUM +}; + +static const char *res_name[] = { + [MLX4_RES_QP] = "QP", + [MLX4_RES_RDMARC] = "RDMARC", + [MLX4_RES_ALTC] = "ALTC", + [MLX4_RES_AUXC] = "AUXC", + [MLX4_RES_SRQ] = "SRQ", + [MLX4_RES_CQ] = "CQ", + [MLX4_RES_EQ] = "EQ", + [MLX4_RES_DMPT] = "DMPT", + [MLX4_RES_CMPT] = "CMPT", + [MLX4_RES_MTT] = "MTT", + [MLX4_RES_MCG] = "MCG", +}; + +u64 mlx4_make_profile(struct mlx4_dev *dev, + struct mlx4_profile *request, + struct mlx4_dev_cap *dev_cap, + struct mlx4_init_hca_param *init_hca) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource { + u64 size; + u64 start; + int type; + int num; + int log_num; + }; + + u64 total_size = 0; + struct mlx4_resource *profile; + struct mlx4_resource tmp; +#ifndef __VMKERNEL_MODULE__ + struct sysinfo si; +#endif /* NOT __VMKERNEL_MODULE__ */ + int i, j; + + profile = kcalloc(MLX4_RES_NUM, sizeof(*profile), GFP_KERNEL); + if (!profile) + return -ENOMEM; + +#ifndef __VMKERNEL_MODULE__ + /* + * We want to scale the number of MTTs with the size of the + * system memory, since it makes sense to register a lot of + * memory on a system with a lot of memory. As a heuristic, + * make sure we have enough MTTs to cover twice the system + * memory (with PAGE_SIZE entries). + * + * This number has to be a power of two and fit into 32 bits + * due to device limitations, so cap this at 2^31 as well. + * That limits us to 8TB of memory registration per HCA with + * 4KB pages, which is probably OK for the next few months. + */ + si_meminfo(&si); + request->num_mtt = + roundup_pow_of_two(max_t(unsigned, request->num_mtt, + min(1UL << 31, + si.totalram >> (log_mtts_per_seg - 1)))); +#endif /* NOT __VMKERNEL_MODULE__ */ + + profile[MLX4_RES_QP].size = dev_cap->qpc_entry_sz; + profile[MLX4_RES_RDMARC].size = dev_cap->rdmarc_entry_sz; + profile[MLX4_RES_ALTC].size = dev_cap->altc_entry_sz; + profile[MLX4_RES_AUXC].size = dev_cap->aux_entry_sz; + profile[MLX4_RES_SRQ].size = dev_cap->srq_entry_sz; + profile[MLX4_RES_CQ].size = dev_cap->cqc_entry_sz; + profile[MLX4_RES_EQ].size = dev_cap->eqc_entry_sz; + profile[MLX4_RES_DMPT].size = dev_cap->dmpt_entry_sz; + profile[MLX4_RES_CMPT].size = dev_cap->cmpt_entry_sz; + profile[MLX4_RES_MTT].size = dev_cap->mtt_entry_sz; + profile[MLX4_RES_MCG].size = mlx4_get_mgm_entry_size(dev); + + profile[MLX4_RES_QP].num = request->num_qp; + profile[MLX4_RES_RDMARC].num = request->num_qp * request->rdmarc_per_qp; + profile[MLX4_RES_ALTC].num = request->num_qp; + profile[MLX4_RES_AUXC].num = request->num_qp; + profile[MLX4_RES_SRQ].num = request->num_srq; + profile[MLX4_RES_CQ].num = request->num_cq; + profile[MLX4_RES_EQ].num = mlx4_is_mfunc(dev) ? + dev->phys_caps.num_phys_eqs : + min_t(unsigned, dev_cap->max_eqs, MAX_MSIX); + profile[MLX4_RES_DMPT].num = request->num_mpt; + profile[MLX4_RES_CMPT].num = MLX4_NUM_CMPTS; + profile[MLX4_RES_MTT].num = request->num_mtt * (1 << log_mtts_per_seg); + profile[MLX4_RES_MCG].num = request->num_mcg; + + for (i = 0; i < MLX4_RES_NUM; ++i) { + profile[i].type = i; + profile[i].num = roundup_pow_of_two(profile[i].num); + profile[i].log_num = ilog2(profile[i].num); + profile[i].size *= profile[i].num; + profile[i].size = max(profile[i].size, (u64) PAGE_SIZE); + } + + /* + * Sort the resources in decreasing order of size. Since they + * all have sizes that are powers of 2, we'll be able to keep + * resources aligned to their size and pack them without gaps + * using the sorted order. + */ + for (i = MLX4_RES_NUM; i > 0; --i) + for (j = 1; j < i; ++j) { + if (profile[j].size > profile[j - 1].size) { + tmp = profile[j]; + profile[j] = profile[j - 1]; + profile[j - 1] = tmp; + } + } + + for (i = 0; i < MLX4_RES_NUM; ++i) { + if (profile[i].size) { + profile[i].start = total_size; + total_size += profile[i].size; + } + + if (total_size > dev_cap->max_icm_sz) { + mlx4_err(dev, "Profile requires 0x%llx bytes; " + "won't fit in 0x%llx bytes of context memory.\n", + (unsigned long long) total_size, + (unsigned long long) dev_cap->max_icm_sz); + kfree(profile); + return -ENOMEM; + } + + if (profile[i].size) + mlx4_dbg(dev, " profile[%2d] (%6s): 2^%02d entries @ 0x%10llx, " + "size 0x%10llx\n", + i, res_name[profile[i].type], profile[i].log_num, + (unsigned long long) profile[i].start, + (unsigned long long) profile[i].size); + } + + mlx4_dbg(dev, "HCA context memory: reserving %d KB\n", + (int) (total_size >> 10)); + + for (i = 0; i < MLX4_RES_NUM; ++i) { + switch (profile[i].type) { + case MLX4_RES_QP: + dev->caps.num_qps = profile[i].num; + init_hca->qpc_base = profile[i].start; + init_hca->log_num_qps = profile[i].log_num; + break; + case MLX4_RES_RDMARC: + for (priv->qp_table.rdmarc_shift = 0; + request->num_qp << priv->qp_table.rdmarc_shift < profile[i].num; + ++priv->qp_table.rdmarc_shift) + ; /* nothing */ + dev->caps.max_qp_dest_rdma = 1 << priv->qp_table.rdmarc_shift; + priv->qp_table.rdmarc_base = (u32) profile[i].start; + init_hca->rdmarc_base = profile[i].start; + init_hca->log_rd_per_qp = priv->qp_table.rdmarc_shift; + break; + case MLX4_RES_ALTC: + init_hca->altc_base = profile[i].start; + break; + case MLX4_RES_AUXC: + init_hca->auxc_base = profile[i].start; + break; + case MLX4_RES_SRQ: + dev->caps.num_srqs = profile[i].num; + init_hca->srqc_base = profile[i].start; + init_hca->log_num_srqs = profile[i].log_num; + break; + case MLX4_RES_CQ: + dev->caps.num_cqs = profile[i].num; + init_hca->cqc_base = profile[i].start; + init_hca->log_num_cqs = profile[i].log_num; + break; + case MLX4_RES_EQ: + dev->caps.num_eqs = roundup_pow_of_two(min_t(unsigned, dev_cap->max_eqs, + MAX_MSIX)); + init_hca->eqc_base = profile[i].start; + init_hca->log_num_eqs = ilog2(dev->caps.num_eqs); + break; + case MLX4_RES_DMPT: + dev->caps.num_mpts = profile[i].num; + priv->mr_table.mpt_base = profile[i].start; + init_hca->dmpt_base = profile[i].start; + init_hca->log_mpt_sz = profile[i].log_num; + break; + case MLX4_RES_CMPT: + init_hca->cmpt_base = profile[i].start; + break; + case MLX4_RES_MTT: + dev->caps.num_mtts = profile[i].num; + priv->mr_table.mtt_base = profile[i].start; + init_hca->mtt_base = profile[i].start; + break; + case MLX4_RES_MCG: + dev->caps.num_mgms = profile[i].num >> 1; + dev->caps.num_amgms = profile[i].num >> 1; + init_hca->mc_base = profile[i].start; + init_hca->log_mc_entry_sz = + ilog2(mlx4_get_mgm_entry_size(dev)); + init_hca->log_mc_table_sz = profile[i].log_num; + init_hca->log_mc_hash_sz = profile[i].log_num - 1; + break; + default: + break; + } + } + + /* + * PDs don't take any HCA memory, but we assign them as part + * of the HCA profile anyway. + */ + dev->caps.num_pds = MLX4_NUM_PDS; + + kfree(profile); + return total_size; +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/qp.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/qp.c new file mode 100755 index 0000000..333fbf5 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/qp.c @@ -0,0 +1,527 @@ +/* + * Copyright (c) 2004 Topspin Communications. All rights reserved. + * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2004 Voltaire, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#ifndef __VMKERNEL_MODULE__ +#include +#endif /* NOT __VMKERNEL_MODULE__ */ +#include + +#include +#include + +#include "mlx4.h" +#include "icm.h" + +void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type) +{ + struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; + struct mlx4_qp *qp; + + spin_lock(&qp_table->lock); + + qp = __mlx4_qp_lookup(dev, qpn); + if (qp) + atomic_inc(&qp->refcount); + + spin_unlock(&qp_table->lock); + + if (!qp) { + mlx4_dbg(dev, "Async event for none existent QP %08x\n", qpn); + return; + } + + qp->event(qp, event_type); + + if (atomic_dec_and_test(&qp->refcount)) + complete(&qp->free); +} + +/* used for INIT/CLOSE port logic */ +static int is_qp0(struct mlx4_dev *dev, struct mlx4_qp *qp, int *real_qp0, int *proxy_qp0) +{ + /* qp0 is either the proxy qp0, or the real qp0 */ + *proxy_qp0 = qp->qpn >= dev->caps.sqp_start && + qp->qpn <= dev->caps.sqp_start + 1; + + *real_qp0 = mlx4_is_mfunc(dev) && + qp->qpn >= dev->caps.base_sqpn && + qp->qpn <= dev->caps.base_sqpn + 1; + + return *real_qp0 || *proxy_qp0; +} + + +static int __mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, + struct mlx4_qp_context *context, + enum mlx4_qp_optpar optpar, + int sqd_event, struct mlx4_qp *qp, int native) +{ + static const u16 op[MLX4_QP_NUM_STATE][MLX4_QP_NUM_STATE] = { + [MLX4_QP_STATE_RST] = { + [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, + [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, + [MLX4_QP_STATE_INIT] = MLX4_CMD_RST2INIT_QP, + }, + [MLX4_QP_STATE_INIT] = { + [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, + [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, + [MLX4_QP_STATE_INIT] = MLX4_CMD_INIT2INIT_QP, + [MLX4_QP_STATE_RTR] = MLX4_CMD_INIT2RTR_QP, + }, + [MLX4_QP_STATE_RTR] = { + [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, + [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, + [MLX4_QP_STATE_RTS] = MLX4_CMD_RTR2RTS_QP, + }, + [MLX4_QP_STATE_RTS] = { + [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, + [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, + [MLX4_QP_STATE_RTS] = MLX4_CMD_RTS2RTS_QP, + [MLX4_QP_STATE_SQD] = MLX4_CMD_RTS2SQD_QP, + }, + [MLX4_QP_STATE_SQD] = { + [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, + [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, + [MLX4_QP_STATE_RTS] = MLX4_CMD_SQD2RTS_QP, + [MLX4_QP_STATE_SQD] = MLX4_CMD_SQD2SQD_QP, + }, + [MLX4_QP_STATE_SQER] = { + [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, + [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, + [MLX4_QP_STATE_RTS] = MLX4_CMD_SQERR2RTS_QP, + }, + [MLX4_QP_STATE_ERR] = { + [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP, + [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP, + } + }; + + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_cmd_mailbox *mailbox; + int ret = 0; + int real_qp0 = 0; + int proxy_qp0 = 0; + u8 port; + + if (cur_state >= MLX4_QP_NUM_STATE || new_state >= MLX4_QP_NUM_STATE || + !op[cur_state][new_state]) + return -EINVAL; + + if (op[cur_state][new_state] == MLX4_CMD_2RST_QP) { + ret = mlx4_cmd(dev, 0, qp->qpn, 2, + MLX4_CMD_2RST_QP, MLX4_CMD_TIME_CLASS_A, native); + if (mlx4_is_master(dev) && cur_state != MLX4_QP_STATE_ERR && + cur_state != MLX4_QP_STATE_RST && + is_qp0(dev, qp, &real_qp0, &proxy_qp0)) { + port = (qp->qpn & 1) + 1; + if (proxy_qp0) + priv->mfunc.master.qp0_state[port].proxy_qp0_active = 0; + else + priv->mfunc.master.qp0_state[port].qp0_active = 0; + } + return ret; + } + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + if (cur_state == MLX4_QP_STATE_RST && new_state == MLX4_QP_STATE_INIT) { + u64 mtt_addr = mlx4_mtt_addr(dev, mtt); + context->mtt_base_addr_h = mtt_addr >> 32; + context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); + context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; + } + + port = ((context->pri_path.sched_queue >> 6) & 1) + 1; + if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) + context->pri_path.sched_queue = (context->pri_path.sched_queue & + 0xc3); + + *(__be32 *) mailbox->buf = cpu_to_be32(optpar); + memcpy(mailbox->buf + 8, context, sizeof *context); + + ((struct mlx4_qp_context *) (mailbox->buf + 8))->local_qpn = + cpu_to_be32(qp->qpn); + + ret = mlx4_cmd(dev, mailbox->dma, + qp->qpn | (!!sqd_event << 31), + new_state == MLX4_QP_STATE_RST ? 2 : 0, + op[cur_state][new_state], MLX4_CMD_TIME_CLASS_C, native); + + mlx4_free_cmd_mailbox(dev, mailbox); + return ret; +} + +int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, + struct mlx4_qp_context *context, + enum mlx4_qp_optpar optpar, + int sqd_event, struct mlx4_qp *qp) +{ + return __mlx4_qp_modify(dev, mtt, cur_state, new_state, context, + optpar, sqd_event, qp, 0); +} +EXPORT_SYMBOL_GPL(mlx4_qp_modify); + +int __mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, + int *base) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_qp_table *qp_table = &priv->qp_table; + + *base = mlx4_bitmap_alloc_range(&qp_table->bitmap, cnt, align); + if (*base == -1) + return -ENOMEM; + + return 0; +} + +int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base) +{ + u64 in_param; + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, cnt); + set_param_h(&in_param, align); + err = mlx4_cmd_imm(dev, in_param, &out_param, + RES_QP, RES_OP_RESERVE, + MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (err) + return err; + + *base = get_param_l(&out_param); + return 0; + } + return __mlx4_qp_reserve_range(dev, cnt, align, base); +} +EXPORT_SYMBOL_GPL(mlx4_qp_reserve_range); + +void __mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_qp_table *qp_table = &priv->qp_table; + + if (mlx4_is_qp_reserved(dev, (u32) base_qpn)) + return; + mlx4_bitmap_free_range(&qp_table->bitmap, base_qpn, cnt); +} + +void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt) +{ + u64 in_param; + int err; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, base_qpn); + set_param_h(&in_param, cnt); + err = mlx4_cmd(dev, in_param, RES_QP, RES_OP_RESERVE, + MLX4_CMD_FREE_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (err) { + mlx4_warn(dev, "Failed to release qp range" + " base:%d cnt:%d\n", base_qpn, cnt); + } + } else + __mlx4_qp_release_range(dev, base_qpn, cnt); +} +EXPORT_SYMBOL_GPL(mlx4_qp_release_range); + +int __mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_qp_table *qp_table = &priv->qp_table; + int err; + + err = mlx4_table_get(dev, &qp_table->qp_table, qpn); + if (err) + goto err_out; + + err = mlx4_table_get(dev, &qp_table->auxc_table, qpn); + if (err) + goto err_put_qp; + + err = mlx4_table_get(dev, &qp_table->altc_table, qpn); + if (err) + goto err_put_auxc; + + err = mlx4_table_get(dev, &qp_table->rdmarc_table, qpn); + if (err) + goto err_put_altc; + + err = mlx4_table_get(dev, &qp_table->cmpt_table, qpn); + if (err) + goto err_put_rdmarc; + + return 0; + +err_put_rdmarc: + mlx4_table_put(dev, &qp_table->rdmarc_table, qpn); + +err_put_altc: + mlx4_table_put(dev, &qp_table->altc_table, qpn); + +err_put_auxc: + mlx4_table_put(dev, &qp_table->auxc_table, qpn); + +err_put_qp: + mlx4_table_put(dev, &qp_table->qp_table, qpn); + +err_out: + return err; +} + +static int mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn) +{ + u64 param; + + if (mlx4_is_mfunc(dev)) { + set_param_l(¶m, qpn); + return mlx4_cmd_imm(dev, param, ¶m, RES_QP, RES_OP_MAP_ICM, + MLX4_CMD_ALLOC_RES, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); + } + return __mlx4_qp_alloc_icm(dev, qpn); +} + +void __mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_qp_table *qp_table = &priv->qp_table; + + mlx4_table_put(dev, &qp_table->cmpt_table, qpn); + mlx4_table_put(dev, &qp_table->rdmarc_table, qpn); + mlx4_table_put(dev, &qp_table->altc_table, qpn); + mlx4_table_put(dev, &qp_table->auxc_table, qpn); + mlx4_table_put(dev, &qp_table->qp_table, qpn); +} + +static void mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn) +{ + u64 in_param; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, qpn); + if (mlx4_cmd(dev, in_param, RES_QP, RES_OP_MAP_ICM, + MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED)) + mlx4_warn(dev, "Failed to free icm of qp:%d\n", qpn); + } else + __mlx4_qp_free_icm(dev, qpn); +} + +int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_qp_table *qp_table = &priv->qp_table; + int err; + + if (!qpn) + return -EINVAL; + + qp->qpn = qpn; + + err = mlx4_qp_alloc_icm(dev, qpn); + if (err) + return err; + + spin_lock_irq(&qp_table->lock); + err = radix_tree_insert(&dev->qp_table_tree, qp->qpn & + (dev->caps.num_qps - 1), qp); + spin_unlock_irq(&qp_table->lock); + if (err) + goto err_icm; + + atomic_set(&qp->refcount, 1); + init_completion(&qp->free); + + return 0; + +err_icm: + mlx4_qp_free_icm(dev, qpn); + return err; +} + +EXPORT_SYMBOL_GPL(mlx4_qp_alloc); + +void mlx4_qp_remove(struct mlx4_dev *dev, struct mlx4_qp *qp) +{ + struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; + unsigned long flags; + + spin_lock_irqsave(&qp_table->lock, flags); + radix_tree_delete(&dev->qp_table_tree, qp->qpn & (dev->caps.num_qps - 1)); + spin_unlock_irqrestore(&qp_table->lock, flags); +} +EXPORT_SYMBOL_GPL(mlx4_qp_remove); + +void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp) +{ + if (atomic_dec_and_test(&qp->refcount)) + complete(&qp->free); + wait_for_completion(&qp->free); + + mlx4_qp_free_icm(dev, qp->qpn); +} +EXPORT_SYMBOL_GPL(mlx4_qp_free); + +static int mlx4_CONF_SPECIAL_QP(struct mlx4_dev *dev, u32 base_qpn) +{ + return mlx4_cmd(dev, 0, base_qpn, 0, MLX4_CMD_CONF_SPECIAL_QP, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); +} + +int mlx4_init_qp_table(struct mlx4_dev *dev) +{ + struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; + int err; + int reserved_from_top = 0; + + spin_lock_init(&qp_table->lock); + INIT_RADIX_TREE(&dev->qp_table_tree, GFP_ATOMIC); + if (mlx4_is_slave(dev)) + return 0; + + /* + * We reserve 2 extra QPs per port for the special QPs. The + * block of special QPs must be aligned to a multiple of 8, so + * round up. + * + * We also reserve the MSB of the 24-bit QP number to indicate + * that a QP is an XRC QP. + */ + dev->caps.base_sqpn = + ALIGN(dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 8); + + { + int sort[MLX4_NUM_QP_REGION]; + int i, j, tmp; + int last_base = dev->caps.num_qps; + + for (i = 1; i < MLX4_NUM_QP_REGION; ++i) + sort[i] = i; + + for (i = MLX4_NUM_QP_REGION; i > 0; --i) { + for (j = 2; j < i; ++j) { + if (dev->caps.reserved_qps_cnt[sort[j]] > + dev->caps.reserved_qps_cnt[sort[j - 1]]) { + tmp = sort[j]; + sort[j] = sort[j - 1]; + sort[j - 1] = tmp; + } + } + } + + for (i = 1; i < MLX4_NUM_QP_REGION; ++i) { + last_base -= dev->caps.reserved_qps_cnt[sort[i]]; + dev->caps.reserved_qps_base[sort[i]] = last_base; + reserved_from_top += + dev->caps.reserved_qps_cnt[sort[i]]; + } + + } + + /* + * reserve 8 (unused) tunnel QPs, 8 real SQPs, and, per function, + * 8 proxy SQPs (used by slaves), and 8 corresponding tunnel QPs (for master). + * Each proxy SQP works opposite its own Dom0 tunnel QP. + */ + err = mlx4_bitmap_init(&qp_table->bitmap, dev->caps.num_qps, + (1 << 23) - 1, dev->caps.base_sqpn + 8 + + 16 * MLX4_MFUNC_MAX * + !!(mlx4_is_mfunc(dev) && mlx4_is_master(dev)), + reserved_from_top); + + /*In mfunc the start of the sqp is diffrent:*/ + if (mlx4_is_mfunc(dev)) { + dev->caps.sqp_start = dev->caps.base_sqpn + 8 * (dev->caps.function + 1); + dev->caps.base_tunnel_sqpn = dev->caps.sqp_start + 8 * MLX4_MFUNC_MAX; + } else + dev->caps.sqp_start = dev->caps.base_sqpn; + + if (err) + return err; + + return mlx4_CONF_SPECIAL_QP(dev, dev->caps.base_sqpn); +} + +void mlx4_cleanup_qp_table(struct mlx4_dev *dev) +{ + if (mlx4_is_slave(dev)) + return; + + mlx4_CONF_SPECIAL_QP(dev, 0); + mlx4_bitmap_cleanup(&mlx4_priv(dev)->qp_table.bitmap); +} + +int mlx4_qp_query(struct mlx4_dev *dev, struct mlx4_qp *qp, + struct mlx4_qp_context *context) +{ + struct mlx4_cmd_mailbox *mailbox; + int err; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + err = mlx4_cmd_box(dev, 0, mailbox->dma, qp->qpn, 0, + MLX4_CMD_QUERY_QP, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); + if (!err) + memcpy(context, mailbox->buf + 8, sizeof *context); + + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_qp_query); + +int mlx4_qp_to_ready(struct mlx4_dev *dev, struct mlx4_mtt *mtt, + struct mlx4_qp_context *context, + struct mlx4_qp *qp, enum mlx4_qp_state *qp_state) +{ + int err; + int i; + enum mlx4_qp_state states[] = { + MLX4_QP_STATE_RST, + MLX4_QP_STATE_INIT, + MLX4_QP_STATE_RTR, + MLX4_QP_STATE_RTS + }; + + for (i = 0; i < ARRAY_SIZE(states) - 1; i++) { + context->flags &= cpu_to_be32(~(0xf << 28)); + context->flags |= cpu_to_be32(states[i + 1] << 28); + err = mlx4_qp_modify(dev, mtt, states[i], states[i + 1], + context, 0, 0, qp); + if (err) { + mlx4_err(dev, "Failed to bring QP to state: " + "%d with error: %d\n", + states[i + 1], err); + return err; + } + + *qp_state = states[i + 1]; + } + + return 0; +} +EXPORT_SYMBOL_GPL(mlx4_qp_to_ready); diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/reset.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/reset.c new file mode 100755 index 0000000..5384a48 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/reset.c @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2007-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include + +#include "mlx4.h" + +int mlx4_reset(struct mlx4_dev *dev) +{ + void __iomem *reset; + u32 *hca_header = NULL; + int pcie_cap; + u16 devctl; + u16 linkctl; + u16 vendor; + unsigned long end; + u32 sem; + int i; + int err = 0; + +#define MLX4_RESET_BASE 0xf0000 +#define MLX4_RESET_SIZE 0x400 +#define MLX4_SEM_OFFSET 0x3fc +#define MLX4_RESET_OFFSET 0x10 +#define MLX4_RESET_VALUE swab32(1) + +#define MLX4_SEM_TIMEOUT_JIFFIES (10 * HZ) +#define MLX4_RESET_TIMEOUT_JIFFIES (2 * HZ) + + /* + * Reset the chip. This is somewhat ugly because we have to + * save off the PCI header before reset and then restore it + * after the chip reboots. We skip config space offsets 22 + * and 23 since those have a special meaning. + */ + + /* Do we need to save off the full 4K PCI Express header?? */ + hca_header = kmalloc(256, GFP_KERNEL); + if (!hca_header) { + err = -ENOMEM; + mlx4_err(dev, "Couldn't allocate memory to save HCA " + "PCI header, aborting.\n"); + goto out; + } + + pcie_cap = pci_pcie_cap(dev->pdev); + + for (i = 0; i < 64; ++i) { + if (i == 22 || i == 23) + continue; + if (pci_read_config_dword(dev->pdev, i * 4, hca_header + i)) { + err = -ENODEV; + mlx4_err(dev, "Couldn't save HCA " + "PCI header, aborting.\n"); + goto out; + } + } + + reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE, + MLX4_RESET_SIZE); + if (!reset) { + err = -ENOMEM; + mlx4_err(dev, "Couldn't map HCA reset register, aborting.\n"); + goto out; + } + + /* grab HW semaphore to lock out flash updates */ + end = jiffies + MLX4_SEM_TIMEOUT_JIFFIES; + do { + sem = readl(reset + MLX4_SEM_OFFSET); + if (!sem) + break; + + msleep(1); + } while (time_before(jiffies, end)); + + if (sem) { + mlx4_err(dev, "Failed to obtain HW semaphore, aborting\n"); + err = -EAGAIN; + iounmap(reset); + goto out; + } + + /* actually hit reset */ + writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET); + iounmap(reset); + + /* Docs say to wait one second before accessing device */ + msleep(1000); + + end = jiffies + MLX4_RESET_TIMEOUT_JIFFIES; + do { + if (!pci_read_config_word(dev->pdev, PCI_VENDOR_ID, &vendor) && + vendor != 0xffff) + break; + + msleep(1); + } while (time_before(jiffies, end)); + + if (vendor == 0xffff) { + err = -ENODEV; + mlx4_err(dev, "PCI device did not come back after reset, " + "aborting.\n"); + goto out; + } + + /* Now restore the PCI headers */ + if (pcie_cap) { + devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4]; + if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_DEVCTL, + devctl)) { + err = -ENODEV; + mlx4_err(dev, "Couldn't restore HCA PCI Express " + "Device Control register, aborting.\n"); + goto out; + } + linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4]; + if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_LNKCTL, + linkctl)) { + err = -ENODEV; + mlx4_err(dev, "Couldn't restore HCA PCI Express " + "Link control register, aborting.\n"); + goto out; + } + } + + for (i = 0; i < 16; ++i) { + if (i * 4 == PCI_COMMAND) + continue; + + if (pci_write_config_dword(dev->pdev, i * 4, hca_header[i])) { + err = -ENODEV; + mlx4_err(dev, "Couldn't restore HCA reg %x, " + "aborting.\n", i); + goto out; + } + } + + if (pci_write_config_dword(dev->pdev, PCI_COMMAND, + hca_header[PCI_COMMAND / 4])) { + err = -ENODEV; + mlx4_err(dev, "Couldn't restore HCA COMMAND, " + "aborting.\n"); + goto out; + } + +out: + kfree(hca_header); + + return err; +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/resource_tracker.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/resource_tracker.c new file mode 100755 index 0000000..d398e03 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/resource_tracker.c @@ -0,0 +1,3429 @@ +/* + * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. + * Copyright (c) 2005-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mlx4.h" +#include "fw.h" + +#define MLX4_MAC_VALID (1ull << 63) +#define MLX4_MAC_MASK 0x7fffffffffffffffULL +#define ETH_ALEN 6 + +struct mac_res { + struct list_head list; + u64 mac; + u8 port; +}; + +struct res_common { + struct list_head list; + u32 res_id; + int owner; + int state; + int from_state; + int to_state; + int removing; +}; + +enum { + RES_ANY_BUSY = 1 +}; + +struct res_gid { + struct list_head list; + u8 gid[16]; + enum mlx4_protocol prot; + enum mlx4_steer_type steer; +}; + +enum res_qp_states { + RES_QP_BUSY = RES_ANY_BUSY, + + /* QP number was allocated */ + RES_QP_RESERVED, + + /* ICM memory for QP context was mapped */ + RES_QP_MAPPED, + + /* QP is in hw ownership */ + RES_QP_HW +}; + +struct res_qp { + struct res_common com; + struct res_mtt *mtt; + struct res_cq *rcq; + struct res_cq *scq; + struct res_srq *srq; + struct list_head mcg_list; + spinlock_t mcg_spl; + int local_qpn; +}; + +enum res_mtt_states { + RES_MTT_BUSY = RES_ANY_BUSY, + RES_MTT_ALLOCATED, +}; + +static inline const char *mtt_states_str(enum res_mtt_states state) +{ + switch (state) { + case RES_MTT_BUSY: return "RES_MTT_BUSY"; + case RES_MTT_ALLOCATED: return "RES_MTT_ALLOCATED"; + default: return "Unknown"; + } +} + +struct res_mtt { + struct res_common com; + int order; + atomic_t ref_count; +}; + +enum res_mpt_states { + RES_MPT_BUSY = RES_ANY_BUSY, + RES_MPT_RESERVED, + RES_MPT_MAPPED, + RES_MPT_HW, +}; + +struct res_mpt { + struct res_common com; + struct res_mtt *mtt; + int key; +}; + +enum res_eq_states { + RES_EQ_BUSY = RES_ANY_BUSY, + RES_EQ_RESERVED, + RES_EQ_HW, +}; + +struct res_eq { + struct res_common com; + struct res_mtt *mtt; +}; + +enum res_cq_states { + RES_CQ_BUSY = RES_ANY_BUSY, + RES_CQ_ALLOCATED, + RES_CQ_HW, +}; + +struct res_cq { + struct res_common com; + struct res_mtt *mtt; + atomic_t ref_count; +}; + +enum res_srq_states { + RES_SRQ_BUSY = RES_ANY_BUSY, + RES_SRQ_ALLOCATED, + RES_SRQ_HW, +}; + +struct res_srq { + struct res_common com; + struct res_mtt *mtt; + struct res_cq *cq; + atomic_t ref_count; +}; + +enum res_counter_states { + RES_COUNTER_BUSY = RES_ANY_BUSY, + RES_COUNTER_ALLOCATED, +}; + +struct res_counter { + struct res_common com; + int port; +}; + +enum res_xrcdn_states { + RES_XRCD_BUSY = RES_ANY_BUSY, + RES_XRCD_ALLOCATED, +}; + +struct res_xrcdn { + struct res_common com; + int port; +}; + +enum qp_transition { + QP_TRANS_INIT2RTR, + QP_TRANS_RTR2RTS, + QP_TRANS_RTS2RTS, + QP_TRANS_SQERR2RTS, + QP_TRANS_SQD2SQD, + QP_TRANS_SQD2RTS +}; + +/* For Debug uses */ +static const char *ResourceType(enum mlx4_resource rt) +{ + switch (rt) { + case RES_QP: return "RES_QP"; + case RES_CQ: return "RES_CQ"; + case RES_SRQ: return "RES_SRQ"; + case RES_MPT: return "RES_MPT"; + case RES_MTT: return "RES_MTT"; + case RES_MAC: return "RES_MAC"; + case RES_EQ: return "RES_EQ"; + case RES_COUNTER: return "RES_COUNTER"; + case RES_XRCD: return "RES_XRCD"; + default: return "Unknown resource type !!!"; + }; +} + +int mlx4_init_resource_tracker(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int i; + int t; + + priv->mfunc.master.res_tracker.slave_list = + kzalloc(dev->num_slaves * sizeof(struct slave_list), + GFP_KERNEL); + if (!priv->mfunc.master.res_tracker.slave_list) + return -ENOMEM; + + for (i = 0 ; i < dev->num_slaves; i++) { + for (t = 0; t < MLX4_NUM_OF_RESOURCE_TYPE; ++t) + INIT_LIST_HEAD(&priv->mfunc.master.res_tracker. + slave_list[i].res_list[t]); + mutex_init(&priv->mfunc.master.res_tracker.slave_list[i].mutex); + } + + mlx4_dbg(dev, "Started init_resource_tracker: %ld slaves\n", + dev->num_slaves); + for (i = 0 ; i < MLX4_NUM_OF_RESOURCE_TYPE; i++) + INIT_RADIX_TREE(&priv->mfunc.master.res_tracker.res_tree[i], + GFP_ATOMIC|__GFP_NOWARN); + + spin_lock_init(&priv->mfunc.master.res_tracker.lock); + return 0 ; +} + +void mlx4_free_resource_tracker(struct mlx4_dev *dev, int slaves_only) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + int i; + + if (priv->mfunc.master.res_tracker.slave_list) { + for (i = 0 ; i < dev->num_slaves; i++) + if (!slaves_only || dev->caps.function != i) + mlx4_delete_all_resources_for_slave(dev, i); + + kfree(priv->mfunc.master.res_tracker.slave_list); + } +} + +static void update_pkey_index(struct mlx4_dev *dev, int slave, + struct mlx4_cmd_mailbox *inbox) +{ + u8 sched = *(u8 *)(inbox->buf + 64); + u8 orig_index = *(u8 *)(inbox->buf + 35); + u8 new_index; + struct mlx4_priv *priv = mlx4_priv(dev); + int port; + + port = (sched >> 6 & 1) + 1; + + new_index = priv->virt2phys_pkey[slave][port - 1][orig_index]; + *(u8 *)(inbox->buf + 35) = new_index; + + mlx4_dbg(dev, "port = %d, orig pkey index = %d, " + "new pkey index = %d\n", port, orig_index, new_index); +} + +static void update_gid(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *inbox, + u8 slave) +{ + struct mlx4_qp_context *qp_ctx = inbox->buf + 8; + enum mlx4_qp_optpar optpar = be32_to_cpu(*(__be32 *) inbox->buf); + u32 ts = (be32_to_cpu(qp_ctx->flags) >> 16) & 0xff; + + if (MLX4_QP_ST_UD == ts) + qp_ctx->pri_path.mgid_index = 0x80 | slave; + + if(MLX4_QP_ST_RC == ts || MLX4_QP_ST_UC == ts) { + if (optpar & MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH) + qp_ctx->pri_path.mgid_index = slave & 0x7F; + if (optpar & MLX4_QP_OPTPAR_ALT_ADDR_PATH) + qp_ctx->alt_path.mgid_index = slave & 0x7F; + } + + mlx4_dbg(dev, "slave %d, new gid index: 0x%x ", + slave, qp_ctx->pri_path.mgid_index); +} + +static int mpt_mask(struct mlx4_dev *dev) +{ + return dev->caps.num_mpts - 1; +} + +static void *find_res(struct mlx4_dev *dev, int res_id, + enum mlx4_resource type) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + return radix_tree_lookup(&priv->mfunc.master.res_tracker.res_tree[type], + res_id); +} + +static int get_res(struct mlx4_dev *dev, int slave, int res_id, + enum mlx4_resource type, + void *res) +{ + struct res_common *r; + int err = 0; + + spin_lock_irq(mlx4_tlock(dev)); + r = find_res(dev, res_id, type); + if (!r) { + err = -ENONET; + goto exit; + } + + if (r->state == RES_ANY_BUSY) { + err = -EBUSY; + goto exit; + } + + if (r->owner != slave) { + err = -EPERM; + goto exit; + } + + r->from_state = r->state; + r->state = RES_ANY_BUSY; + mlx4_dbg(dev, "res %s id 0x%x to busy\n", + ResourceType(type), r->res_id); + + if (res) + *((struct res_common **)res) = r; + +exit: + spin_unlock_irq(mlx4_tlock(dev)); + return err; +} + +int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev, + enum mlx4_resource type, + int res_id, int *slave) +{ + + struct res_common *r; + int err = -ENOENT; + int id = res_id; + + if (type == RES_QP) + id &= 0x7fffff; + spin_lock(mlx4_tlock(dev)); + + r = find_res(dev, id, type); + if (r) { + *slave = r->owner; + err = 0; + } + spin_unlock(mlx4_tlock(dev)); + + return err; +} + +static void put_res(struct mlx4_dev *dev, int slave, int res_id, + enum mlx4_resource type) +{ + struct res_common *r; + + spin_lock_irq(mlx4_tlock(dev)); + r = find_res(dev, res_id, type); + if (r) + r->state = r->from_state; + spin_unlock_irq(mlx4_tlock(dev)); +} + +static struct res_common *alloc_qp_tr(int id) +{ + struct res_qp *ret; + + ret = kzalloc(sizeof *ret, GFP_KERNEL); + if (!ret) + return NULL; + + ret->com.res_id = id; + ret->com.state = RES_QP_RESERVED; + ret->local_qpn = id; + INIT_LIST_HEAD(&ret->mcg_list); + spin_lock_init(&ret->mcg_spl); + + return &ret->com; +} + +static struct res_common *alloc_mtt_tr(int id, int order) +{ + struct res_mtt *ret; + + ret = kzalloc(sizeof *ret, GFP_KERNEL); + if (!ret) + return NULL; + + ret->com.res_id = id; + ret->order = order; + ret->com.state = RES_MTT_ALLOCATED; + atomic_set(&ret->ref_count, 0); + + return &ret->com; +} + +static struct res_common *alloc_mpt_tr(int id, int key) +{ + struct res_mpt *ret; + + ret = kzalloc(sizeof *ret, GFP_KERNEL); + if (!ret) + return NULL; + + ret->com.res_id = id; + ret->com.state = RES_MPT_RESERVED; + ret->key = key; + + return &ret->com; +} + +static struct res_common *alloc_eq_tr(int id) +{ + struct res_eq *ret; + + ret = kzalloc(sizeof *ret, GFP_KERNEL); + if (!ret) + return NULL; + + ret->com.res_id = id; + ret->com.state = RES_EQ_RESERVED; + + return &ret->com; +} + +static struct res_common *alloc_cq_tr(int id) +{ + struct res_cq *ret; + + ret = kzalloc(sizeof *ret, GFP_KERNEL); + if (!ret) + return NULL; + + ret->com.res_id = id; + ret->com.state = RES_CQ_ALLOCATED; + atomic_set(&ret->ref_count, 0); + + return &ret->com; +} + +static struct res_common *alloc_srq_tr(int id) +{ + struct res_srq *ret; + + ret = kzalloc(sizeof *ret, GFP_KERNEL); + if (!ret) + return NULL; + + ret->com.res_id = id; + ret->com.state = RES_SRQ_ALLOCATED; + atomic_set(&ret->ref_count, 0); + + return &ret->com; +} + +static struct res_common *alloc_counter_tr(int id) +{ + struct res_counter *ret; + + ret = kzalloc(sizeof *ret, GFP_KERNEL); + if (!ret) + return NULL; + + ret->com.res_id = id; + ret->com.state = RES_COUNTER_ALLOCATED; + + return &ret->com; +} + +static struct res_common *alloc_xrcdn_tr(int id) +{ + struct res_xrcdn *ret; + + ret = kzalloc(sizeof *ret, GFP_KERNEL); + if (!ret) + return NULL; + + ret->com.res_id = id; + ret->com.state = RES_XRCD_ALLOCATED; + + return &ret->com; +} + +static struct res_common *alloc_tr(int id, enum mlx4_resource type, int slave, + int extra) +{ + struct res_common *ret; + + switch (type) { + case RES_QP: + ret = alloc_qp_tr(id); + break; + case RES_MPT: + ret = alloc_mpt_tr(id, extra); + break; + case RES_MTT: + ret = alloc_mtt_tr(id, extra); + break; + case RES_EQ: + ret = alloc_eq_tr(id); + break; + case RES_CQ: + ret = alloc_cq_tr(id); + break; + case RES_SRQ: + ret = alloc_srq_tr(id); + break; + case RES_MAC: + printk(KERN_ERR "implementation missing\n"); + return NULL; + case RES_COUNTER: + ret = alloc_counter_tr(id); + break; + case RES_XRCD: + ret = alloc_xrcdn_tr(id); + break; + default: + return NULL; + } + if (ret) + ret->owner = slave; + + return ret; +} + +static int add_res_range(struct mlx4_dev *dev, int slave, int base, int count, + enum mlx4_resource type, int extra) +{ + int i; + int err; + struct mlx4_priv *priv = mlx4_priv(dev); + struct res_common **res_arr; + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct radix_tree_root *root = &tracker->res_tree[type]; + + res_arr = kzalloc(count * sizeof *res_arr, GFP_KERNEL); + if (!res_arr) + return -ENOMEM; + + for (i = 0; i < count; ++i) { + res_arr[i] = alloc_tr(base + i, type, slave, extra); + if (!res_arr[i]) { + for (--i; i >= 0; --i) + kfree(res_arr[i]); + + kfree(res_arr); + return -ENOMEM; + } + } + + spin_lock_irq(mlx4_tlock(dev)); + for (i = 0; i < count; ++i) { + if (find_res(dev, base + i, type)) { + err = -EEXIST; + goto undo; + } + err = radix_tree_insert(root, base + i, res_arr[i]); + if (err) + goto undo; + list_add_tail(&res_arr[i]->list, + &tracker->slave_list[slave].res_list[type]); + } + spin_unlock_irq(mlx4_tlock(dev)); + kfree(res_arr); + + return 0; + +undo: + for (--i; i >= base; --i) + radix_tree_delete(&tracker->res_tree[type], i); + + spin_unlock_irq(mlx4_tlock(dev)); + + for (i = 0; i < count; ++i) + kfree(res_arr[i]); + + kfree(res_arr); + + return err; +} + +static int remove_qp_ok(struct res_qp *res) +{ + if (res->com.state == RES_QP_BUSY) + return -EBUSY; + else if (res->com.state != RES_QP_RESERVED) + return -EPERM; + + return 0; +} + +static int remove_mtt_ok(struct res_mtt *res, int order) +{ + if (res->com.state == RES_MTT_BUSY || + atomic_read(&res->ref_count)) { + printk(KERN_DEBUG "%s-%d: state %s, ref_count %d\n", + __func__, __LINE__, + mtt_states_str(res->com.state), + atomic_read(&res->ref_count)); + return -EBUSY; + } else if (res->com.state != RES_MTT_ALLOCATED) + return -EPERM; + else if (res->order != order) + return -EINVAL; + + return 0; +} + +static int remove_mpt_ok(struct res_mpt *res) +{ + if (res->com.state == RES_MPT_BUSY) + return -EBUSY; + else if (res->com.state != RES_MPT_RESERVED) + return -EPERM; + + return 0; +} + +static int remove_eq_ok(struct res_eq *res) +{ + if (res->com.state == RES_MPT_BUSY) + return -EBUSY; + else if (res->com.state != RES_MPT_RESERVED) + return -EPERM; + + return 0; +} + +static int remove_counter_ok(struct res_counter *res) +{ + if (res->com.state == RES_COUNTER_BUSY) + return -EBUSY; + else if (res->com.state != RES_COUNTER_ALLOCATED) + return -EPERM; + + return 0; +} + +static int remove_xrcdn_ok(struct res_xrcdn *res) +{ + if (res->com.state == RES_XRCD_BUSY) + return -EBUSY; + else if (res->com.state != RES_XRCD_ALLOCATED) + return -EPERM; + + return 0; +} + +static int remove_cq_ok(struct res_cq *res) +{ + if (res->com.state == RES_CQ_BUSY) + return -EBUSY; + else if (res->com.state != RES_CQ_ALLOCATED) + return -EPERM; + + return 0; +} + +static int remove_srq_ok(struct res_srq *res) +{ + if (res->com.state == RES_SRQ_BUSY) + return -EBUSY; + else if (res->com.state != RES_SRQ_ALLOCATED) + return -EPERM; + + return 0; +} + +static int remove_ok(struct res_common *res, enum mlx4_resource type, int extra) +{ + switch (type) { + case RES_QP: + return remove_qp_ok((struct res_qp *)res); + case RES_CQ: + return remove_cq_ok((struct res_cq *)res); + case RES_SRQ: + return remove_srq_ok((struct res_srq *)res); + case RES_MPT: + return remove_mpt_ok((struct res_mpt *)res); + case RES_MTT: + return remove_mtt_ok((struct res_mtt *)res, extra); + case RES_MAC: + return -ENOSYS; + case RES_EQ: + return remove_eq_ok((struct res_eq *)res); + case RES_COUNTER: + return remove_counter_ok((struct res_counter *)res); + case RES_XRCD: + return remove_xrcdn_ok((struct res_xrcdn *)res); + default: + return -EINVAL; + } +} + +static int rem_res_range(struct mlx4_dev *dev, int slave, int base, int count, + enum mlx4_resource type, int extra) +{ + int i; + int err; + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_common *r; + + spin_lock_irq(mlx4_tlock(dev)); + for (i = base; i < base + count; ++i) { + r = radix_tree_lookup(&tracker->res_tree[type], i); + if (!r) { + err = -ENOENT; + goto out; + } + if (r->owner != slave) { + err = -EPERM; + goto out; + } + err = remove_ok(r, type, extra); + if (err) + goto out; + } + + for (i = base; i < base + count; ++i) { + r = radix_tree_lookup(&tracker->res_tree[type], i); + radix_tree_delete(&tracker->res_tree[type], i); + list_del(&r->list); + kfree(r); + } + err = 0; + +out: + spin_unlock_irq(mlx4_tlock(dev)); + + return err; +} + +static int qp_res_start_move_to(struct mlx4_dev *dev, int slave, int qpn, + enum res_qp_states state, struct res_qp **qp, + int alloc) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_qp *r; + int err = 0; + + spin_lock_irq(mlx4_tlock(dev)); + r = radix_tree_lookup(&tracker->res_tree[RES_QP], qpn); + if (!r) + err = -ENOENT; + else if (r->com.owner != slave) + err = -EPERM; + else { + switch (state) { + case RES_QP_BUSY: + mlx4_dbg(dev, "%s: failed RES_QP, 0x%x\n", + __func__, r->com.res_id); + err = -EBUSY; + break; + + case RES_QP_RESERVED: + if (r->com.state == RES_QP_MAPPED && !alloc) + break; + + mlx4_dbg(dev, "failed RES_QP, 0x%x\n", r->com.res_id); + err = -EINVAL; + break; + + case RES_QP_MAPPED: + if ((r->com.state == RES_QP_RESERVED && alloc) || + r->com.state == RES_QP_HW) + break; + else { + mlx4_dbg(dev, "failed RES_QP, 0x%x\n", + r->com.res_id); + err = -EINVAL; + } + + break; + + case RES_QP_HW: + if (r->com.state != RES_QP_MAPPED) + err = -EINVAL; + break; + default: + err = -EINVAL; + } + + if (!err) { + r->com.from_state = r->com.state; + r->com.to_state = state; + r->com.state = RES_QP_BUSY; + if (qp) + *qp = (struct res_qp *)r; + } + } + + spin_unlock_irq(mlx4_tlock(dev)); + + return err; +} + +static int mr_res_start_move_to(struct mlx4_dev *dev, int slave, int index, + enum res_mpt_states state, struct res_mpt **mpt) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_mpt *r; + int err = 0; + + spin_lock_irq(mlx4_tlock(dev)); + r = radix_tree_lookup(&tracker->res_tree[RES_MPT], index); + if (!r) + err = -ENOENT; + else if (r->com.owner != slave) + err = -EPERM; + else { + switch (state) { + case RES_MPT_BUSY: + err = -EINVAL; + break; + + case RES_MPT_RESERVED: + if (r->com.state != RES_MPT_MAPPED) + err = -EINVAL; + break; + + case RES_MPT_MAPPED: + if (r->com.state != RES_MPT_RESERVED && + r->com.state != RES_MPT_HW) + err = -EINVAL; + break; + + case RES_MPT_HW: + if (r->com.state != RES_MPT_MAPPED) + err = -EINVAL; + break; + default: + err = -EINVAL; + } + + if (!err) { + r->com.from_state = r->com.state; + r->com.to_state = state; + r->com.state = RES_MPT_BUSY; + if (mpt) + *mpt = (struct res_mpt *)r; + } + } + + spin_unlock_irq(mlx4_tlock(dev)); + + return err; +} + +static int eq_res_start_move_to(struct mlx4_dev *dev, int slave, int index, + enum res_eq_states state, struct res_eq **eq) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_eq *r; + int err = 0; + + spin_lock_irq(mlx4_tlock(dev)); + r = radix_tree_lookup(&tracker->res_tree[RES_EQ], index); + if (!r) + err = -ENOENT; + else if (r->com.owner != slave) + err = -EPERM; + else { + switch (state) { + case RES_EQ_BUSY: + err = -EINVAL; + break; + + case RES_EQ_RESERVED: + if (r->com.state != RES_EQ_HW) + err = -EINVAL; + break; + + case RES_EQ_HW: + if (r->com.state != RES_EQ_RESERVED) + err = -EINVAL; + break; + + default: + err = -EINVAL; + } + + if (!err) { + r->com.from_state = r->com.state; + r->com.to_state = state; + r->com.state = RES_EQ_BUSY; + if (eq) + *eq = r; + } + } + + spin_unlock_irq(mlx4_tlock(dev)); + + return err; +} + +static int cq_res_start_move_to(struct mlx4_dev *dev, int slave, int cqn, + enum res_cq_states state, struct res_cq **cq) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_cq *r; + int err; + + spin_lock_irq(mlx4_tlock(dev)); + r = radix_tree_lookup(&tracker->res_tree[RES_CQ], cqn); + if (!r) + err = -ENOENT; + else if (r->com.owner != slave) + err = -EPERM; + else { + switch (state) { + case RES_CQ_BUSY: + err = -EBUSY; + break; + + case RES_CQ_ALLOCATED: + if (r->com.state != RES_CQ_HW) + err = -EINVAL; + else if (atomic_read(&r->ref_count)) + err = -EBUSY; + else + err = 0; + break; + + case RES_CQ_HW: + if (r->com.state != RES_CQ_ALLOCATED) + err = -EINVAL; + else + err = 0; + break; + + default: + err = -EINVAL; + } + + if (!err) { + r->com.from_state = r->com.state; + r->com.to_state = state; + r->com.state = RES_CQ_BUSY; + if (cq) + *cq = r; + } + } + + spin_unlock_irq(mlx4_tlock(dev)); + + return err; +} + +static int srq_res_start_move_to(struct mlx4_dev *dev, int slave, int index, + enum res_cq_states state, struct res_srq **srq) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_srq *r; + int err = 0; + + spin_lock_irq(mlx4_tlock(dev)); + r = radix_tree_lookup(&tracker->res_tree[RES_SRQ], index); + if (!r) + err = -ENOENT; + else if (r->com.owner != slave) + err = -EPERM; + else { + switch (state) { + case RES_SRQ_BUSY: + err = -EINVAL; + break; + + case RES_SRQ_ALLOCATED: + if (r->com.state != RES_SRQ_HW) + err = -EINVAL; + else if (atomic_read(&r->ref_count)) + err = -EBUSY; + break; + + case RES_SRQ_HW: + if (r->com.state != RES_SRQ_ALLOCATED) + err = -EINVAL; + break; + + default: + err = -EINVAL; + } + + if (!err) { + r->com.from_state = r->com.state; + r->com.to_state = state; + r->com.state = RES_SRQ_BUSY; + if (srq) + *srq = r; + } + } + + spin_unlock_irq(mlx4_tlock(dev)); + + return err; +} + +static void res_abort_move(struct mlx4_dev *dev, int slave, + enum mlx4_resource type, int id) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_common *r; + + spin_lock_irq(mlx4_tlock(dev)); + r = radix_tree_lookup(&tracker->res_tree[type], id); + if (r && (r->owner == slave)) + r->state = r->from_state; + spin_unlock_irq(mlx4_tlock(dev)); +} + +static void res_end_move(struct mlx4_dev *dev, int slave, + enum mlx4_resource type, int id) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_common *r; + + spin_lock_irq(mlx4_tlock(dev)); + r = radix_tree_lookup(&tracker->res_tree[type], id); + if (r && (r->owner == slave)) + r->state = r->to_state; + spin_unlock_irq(mlx4_tlock(dev)); +} + +static int valid_reserved(struct mlx4_dev *dev, int slave, int qpn) +{ + return mlx4_is_qp_reserved(dev, qpn); +} + +static int fw_reserved(struct mlx4_dev *dev, int qpn) +{ + return qpn < dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; +} + +static int qp_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int err; + int count; + int align; + int base; + int qpn; + + switch (op) { + case RES_OP_RESERVE: + count = get_param_l(&in_param); + align = get_param_h(&in_param); + err = __mlx4_qp_reserve_range(dev, count, align, &base); + if (err) + return err; + + err = add_res_range(dev, slave, base, count, RES_QP, 0); + if (err) { + __mlx4_qp_release_range(dev, base, count); + return err; + } + set_param_l(out_param, base); + break; + case RES_OP_MAP_ICM: + qpn = get_param_l(&in_param) & 0x7fffff; + if (valid_reserved(dev, slave, qpn)) { + err = add_res_range(dev, slave, qpn, 1, RES_QP, 0); + if (err) + return err; + } + + err = qp_res_start_move_to(dev, slave, qpn, RES_QP_MAPPED, + NULL, 1); + if (err) + return err; + + if (!fw_reserved(dev, qpn)) { + err = __mlx4_qp_alloc_icm(dev, qpn); + if (err) { + res_abort_move(dev, slave, RES_QP, qpn); + return err; + } + } + + res_end_move(dev, slave, RES_QP, qpn); + break; + + default: + err = -EINVAL; + break; + } + return err; +} + +static int mtt_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int err = -EINVAL; + int base; + int order; + + if (op != RES_OP_RESERVE_AND_MAP) + return err; + + order = get_param_l(&in_param); + base = __mlx4_alloc_mtt_range(dev, order); + if (base == -1) + return -ENOMEM; + + err = add_res_range(dev, slave, base, 1, RES_MTT, order); + if (err) + __mlx4_free_mtt_range(dev, base, order); + else + set_param_l(out_param, base); + + return err; +} + +static int mpt_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int err = -EINVAL; + int index; + int id; + struct res_mpt *mpt; + + switch (op) { + case RES_OP_RESERVE: + index = __mlx4_mr_reserve(dev); + if (index == -1) + break; + id = index & mpt_mask(dev); + + err = add_res_range(dev, slave, id, 1, RES_MPT, index); + if (err) { + __mlx4_mr_release(dev, index); + break; + } + set_param_l(out_param, index); + break; + case RES_OP_MAP_ICM: + index = get_param_l(&in_param); + id = index & mpt_mask(dev); + err = mr_res_start_move_to(dev, slave, id, + RES_MPT_MAPPED, &mpt); + if (err) + return err; + + err = __mlx4_mr_alloc_icm(dev, mpt->key); + if (err) { + res_abort_move(dev, slave, RES_MPT, id); + return err; + } + + res_end_move(dev, slave, RES_MPT, id); + break; + } + return err; +} + +static int cq_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int cqn; + int err; + + switch (op) { + case RES_OP_RESERVE_AND_MAP: + err = __mlx4_cq_alloc_icm(dev, &cqn); + if (err) + break; + + err = add_res_range(dev, slave, cqn, 1, RES_CQ, 0); + if (err) { + __mlx4_cq_free_icm(dev, cqn); + break; + } + + set_param_l(out_param, cqn); + break; + + default: + err = -EINVAL; + } + + return err; +} + +static int srq_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int srqn; + int err; + + switch (op) { + case RES_OP_RESERVE_AND_MAP: + err = __mlx4_srq_alloc_icm(dev, &srqn); + if (err) + break; + + err = add_res_range(dev, slave, srqn, 1, RES_SRQ, 0); + if (err) { + __mlx4_srq_free_icm(dev, srqn); + break; + } + + set_param_l(out_param, srqn); + break; + + default: + err = -EINVAL; + } + + return err; +} + +static int mac_add_to_slave(struct mlx4_dev *dev, int slave, u64 mac, int port) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct mac_res *res; + + res = kzalloc(sizeof *res, GFP_KERNEL); + if (!res) + return -ENOMEM; + res->mac = mac; + res->port = (u8) port; + list_add_tail(&res->list, + &tracker->slave_list[slave].res_list[RES_MAC]); + return 0; +} + +static void mac_del_from_slave(struct mlx4_dev *dev, int slave, u64 mac, + int port) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *mac_list = + &tracker->slave_list[slave].res_list[RES_MAC]; + struct mac_res *res, *tmp; + + list_for_each_entry_safe(res, tmp, mac_list, list) { + if (res->mac == mac && res->port == (u8) port) { + list_del(&res->list); + kfree(res); + break; + } + } +} + +static void rem_slave_macs(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *mac_list = + &tracker->slave_list[slave].res_list[RES_MAC]; + struct mac_res *res, *tmp; + + list_for_each_entry_safe(res, tmp, mac_list, list) { + list_del(&res->list); + __mlx4_unregister_mac(dev, res->port, res->mac); + kfree(res); + } +} + +static int mac_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int err = -EINVAL; + int port; + u64 mac; + + if (op != RES_OP_RESERVE_AND_MAP) + return err; + + port = get_param_l(out_param); + mac = in_param; + + err = __mlx4_register_mac(dev, port, mac); + if (err >= 0) { + set_param_l(out_param, err); + err = 0; + } + + if (!err) { + err = mac_add_to_slave(dev, slave, mac, port); + if (err) + __mlx4_unregister_mac(dev, port, mac); + } + return err; +} + +static int vlan_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + return 0; +} + +static int counter_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int index; + int err; + + if (op != RES_OP_RESERVE) + return -EINVAL; + + err = __mlx4_counter_alloc(dev, &index); + if (err) + return err; + + err = add_res_range(dev, slave, index, 1, RES_COUNTER, 0); + if (err) + __mlx4_counter_free(dev, index); + else + set_param_l(out_param, index); + + return err; +} + +static int xrcdn_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int xrcdn; + int err; + + if (op != RES_OP_RESERVE) + return -EINVAL; + + err = __mlx4_xrcd_alloc(dev, &xrcdn); + if (err) + return err; + + err = add_res_range(dev, slave, xrcdn, 1, RES_XRCD, 0); + if (err) + __mlx4_xrcd_free(dev, xrcdn); + else + set_param_l(out_param, xrcdn); + + return err; +} + +int mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int alop = vhcr->op_modifier; + + switch (vhcr->in_modifier) { + case RES_QP: + err = qp_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_MTT: + err = mtt_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_MPT: + err = mpt_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_CQ: + err = cq_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_SRQ: + err = srq_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_MAC: + err = mac_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_VLAN: + err = vlan_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_COUNTER: + err = counter_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_XRCD: + err = xrcdn_alloc_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + default: + err = -EINVAL; + break; + } + + return err; +} + +static int qp_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param) +{ + int err; + int count; + int base; + int qpn; + + switch (op) { + case RES_OP_RESERVE: + base = get_param_l(&in_param) & 0x7fffff; + count = get_param_h(&in_param); + err = rem_res_range(dev, slave, base, count, RES_QP, 0); + if (err) + break; + __mlx4_qp_release_range(dev, base, count); + break; + case RES_OP_MAP_ICM: + qpn = get_param_l(&in_param) & 0x7fffff; + err = qp_res_start_move_to(dev, slave, qpn, RES_QP_RESERVED, + NULL, 0); + if (err) + return err; + + if (!fw_reserved(dev, qpn)) + __mlx4_qp_free_icm(dev, qpn); + + res_end_move(dev, slave, RES_QP, qpn); + + if (valid_reserved(dev, slave, qpn)) + err = rem_res_range(dev, slave, qpn, 1, RES_QP, 0); + break; + default: + err = -EINVAL; + break; + } + return err; +} + +static int mtt_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int err = -EINVAL; + int base; + int order; + + if (op != RES_OP_RESERVE_AND_MAP) + return err; + + base = get_param_l(&in_param); + order = get_param_h(&in_param); + err = rem_res_range(dev, slave, base, 1, RES_MTT, order); + if (!err) + __mlx4_free_mtt_range(dev, base, order); + return err; +} + +static int mpt_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param) +{ + int err = -EINVAL; + int index; + int id; + struct res_mpt *mpt; + + switch (op) { + case RES_OP_RESERVE: + index = get_param_l(&in_param); + id = index & mpt_mask(dev); + err = get_res(dev, slave, id, RES_MPT, &mpt); + if (err) + break; + index = mpt->key; + put_res(dev, slave, id, RES_MPT); + + err = rem_res_range(dev, slave, id, 1, RES_MPT, 0); + if (err) + break; + __mlx4_mr_release(dev, index); + break; + case RES_OP_MAP_ICM: + index = get_param_l(&in_param); + id = index & mpt_mask(dev); + err = mr_res_start_move_to(dev, slave, id, + RES_MPT_RESERVED, &mpt); + if (err) + return err; + + __mlx4_mr_free_icm(dev, mpt->key); + res_end_move(dev, slave, RES_MPT, id); + return err; + break; + default: + err = -EINVAL; + break; + } + return err; +} + +static int cq_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int cqn; + int err; + + switch (op) { + case RES_OP_RESERVE_AND_MAP: + cqn = get_param_l(&in_param); + err = rem_res_range(dev, slave, cqn, 1, RES_CQ, 0); + if (err) + break; + + __mlx4_cq_free_icm(dev, cqn); + break; + + default: + err = -EINVAL; + break; + } + + return err; +} + +static int srq_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int srqn; + int err; + + switch (op) { + case RES_OP_RESERVE_AND_MAP: + srqn = get_param_l(&in_param); + err = rem_res_range(dev, slave, srqn, 1, RES_SRQ, 0); + if (err) + break; + + __mlx4_srq_free_icm(dev, srqn); + break; + + default: + err = -EINVAL; + break; + } + + return err; +} + +static int mac_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int port; + int err = 0; + + switch (op) { + case RES_OP_RESERVE_AND_MAP: + port = get_param_l(out_param); + mac_del_from_slave(dev, slave, in_param, port); + __mlx4_unregister_mac(dev, port, in_param); + break; + default: + err = -EINVAL; + break; + } + + return err; + +} + +static int vlan_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + return 0; +} + +static int counter_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int index; + int err; + + if (op != RES_OP_RESERVE) + return -EINVAL; + + index = get_param_l(&in_param); + err = rem_res_range(dev, slave, index, 1, RES_COUNTER, 0); + if (err) + return err; + + __mlx4_counter_free(dev, index); + + return err; +} + +static int xrcdn_free_res(struct mlx4_dev *dev, int slave, int op, int cmd, + u64 in_param, u64 *out_param) +{ + int xrcdn; + int err; + + if (op != RES_OP_RESERVE) + return -EINVAL; + + xrcdn = get_param_l(&in_param); + err = rem_res_range(dev, slave, xrcdn, 1, RES_XRCD, 0); + if (err) + return err; + + __mlx4_xrcd_free(dev, xrcdn); + + return err; +} + +int mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err = -EINVAL; + int alop = vhcr->op_modifier; + + switch (vhcr->in_modifier) { + case RES_QP: + err = qp_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param); + break; + + case RES_MTT: + err = mtt_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_MPT: + err = mpt_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param); + break; + + case RES_CQ: + err = cq_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_SRQ: + err = srq_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_MAC: + err = mac_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_VLAN: + err = vlan_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_COUNTER: + err = counter_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + break; + + case RES_XRCD: + err = xrcdn_free_res(dev, slave, vhcr->op_modifier, alop, + vhcr->in_param, &vhcr->out_param); + + default: + break; + } + return err; +} + +/* ugly but other choices are uglier */ +static int mr_phys_mpt(struct mlx4_mpt_entry *mpt) +{ + return (be32_to_cpu(mpt->flags) >> 9) & 1; +} + +static int mr_get_mtt_addr(struct mlx4_mpt_entry *mpt) +{ + return (int)be64_to_cpu(mpt->mtt_addr) & 0xfffffff8; +} + +static int mr_get_mtt_size(struct mlx4_mpt_entry *mpt) +{ + return be32_to_cpu(mpt->mtt_sz); +} + +static int qp_get_mtt_addr(struct mlx4_qp_context *qpc) +{ + return be32_to_cpu(qpc->mtt_base_addr_l) & 0xfffffff8; +} + +static int srq_get_mtt_addr(struct mlx4_srq_context *srqc) +{ + return be32_to_cpu(srqc->mtt_base_addr_l) & 0xfffffff8; +} + +static int qp_get_mtt_size(struct mlx4_qp_context *qpc) +{ + int page_shift = (qpc->log_page_size & 0x3f) + 12; + int log_sq_size = (qpc->sq_size_stride >> 3) & 0xf; + int log_sq_sride = qpc->sq_size_stride & 7; + int log_rq_size = (qpc->rq_size_stride >> 3) & 0xf; + int log_rq_stride = qpc->rq_size_stride & 7; + int srq = (be32_to_cpu(qpc->srqn) >> 24) & 1; + int rss = (be32_to_cpu(qpc->flags) >> 13) & 1; + int xrc = (be32_to_cpu(qpc->local_qpn) >> 23) & 1; + int sq_size; + int rq_size; + int total_pages; + int total_mem; + int page_offset = (be32_to_cpu(qpc->params2) >> 6) & 0x3f; + + sq_size = 1 << (log_sq_size + log_sq_sride + 4); + rq_size = (srq|rss|xrc) ? 0 : (1 << (log_rq_size + log_rq_stride + 4)); + total_mem = sq_size + rq_size; + total_pages = + roundup_pow_of_two((total_mem + (page_offset << 6)) >> + page_shift); + + return total_pages; +} + +static int check_mtt_range(struct mlx4_dev *dev, int slave, int start, + int size, struct res_mtt *mtt) +{ + int res_start = mtt->com.res_id; + int res_size = (1 << mtt->order); + + if (start < res_start || start + size > res_start + res_size) + return -EPERM; + return 0; +} + +int mlx4_SW2HW_MPT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int index = vhcr->in_modifier; + struct res_mtt *mtt; + struct res_mpt *mpt; + int mtt_base = mr_get_mtt_addr(inbox->buf) / dev->caps.mtt_entry_sz; + int phys; + int id; + + id = index & mpt_mask(dev); + err = mr_res_start_move_to(dev, slave, id, RES_MPT_HW, &mpt); + if (err) + return err; + + phys = mr_phys_mpt(inbox->buf); + if (!phys) { + err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); + if (err) + goto ex_abort; + + err = check_mtt_range(dev, slave, mtt_base, + mr_get_mtt_size(inbox->buf), mtt); + if (err) + goto ex_put; + + mpt->mtt = mtt; + } + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto ex_put; + + if (!phys) { + atomic_inc(&mtt->ref_count); + put_res(dev, slave, mtt->com.res_id, RES_MTT); + } + + res_end_move(dev, slave, RES_MPT, id); + return 0; + +ex_put: + if (!phys) + put_res(dev, slave, mtt->com.res_id, RES_MTT); +ex_abort: + res_abort_move(dev, slave, RES_MPT, id); + + return err; +} + +int mlx4_HW2SW_MPT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int index = vhcr->in_modifier; + struct res_mpt *mpt; + int id; + + id = index & mpt_mask(dev); + err = mr_res_start_move_to(dev, slave, id, RES_MPT_MAPPED, &mpt); + if (err) + return err; + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto ex_abort; + + if (mpt->mtt) + atomic_dec(&mpt->mtt->ref_count); + + res_end_move(dev, slave, RES_MPT, id); + return 0; + +ex_abort: + res_abort_move(dev, slave, RES_MPT, id); + + return err; +} + +int mlx4_QUERY_MPT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int index = vhcr->in_modifier; + struct res_mpt *mpt; + int id; + + id = index & mpt_mask(dev); + err = get_res(dev, slave, id, RES_MPT, &mpt); + if (err) + return err; + + if (mpt->com.from_state != RES_MPT_HW) { + err = -EBUSY; + goto out; + } + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + +out: + put_res(dev, slave, id, RES_MPT); + return err; +} + +static int qp_get_rcqn(struct mlx4_qp_context *qpc) +{ + return be32_to_cpu(qpc->cqn_recv) & 0xffffff; +} + +static int qp_get_scqn(struct mlx4_qp_context *qpc) +{ + return be32_to_cpu(qpc->cqn_send) & 0xffffff; +} + +static u32 qp_get_srqn(struct mlx4_qp_context *qpc) +{ + return be32_to_cpu(qpc->srqn) & 0x1ffffff; +} + +static void adjust_proxy_tun_qkey(struct mlx4_dev *dev, struct mlx4_vhcr *vhcr, + struct mlx4_qp_context *context) +{ + u32 qpn = vhcr->in_modifier & 0xffffff; + u32 qkey = 0; + + if (mlx4_get_parav_qkey(dev, qpn, &qkey)) + return; + + /* adjust qkey in qp context */ + context->qkey = cpu_to_be32(qkey); +} + +int mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int qpn = vhcr->in_modifier & 0x7fffff; + struct res_mtt *mtt; + struct res_qp *qp; + struct mlx4_qp_context *qpc = inbox->buf + 8; + int mtt_base = qp_get_mtt_addr(qpc) / dev->caps.mtt_entry_sz; + int mtt_size = qp_get_mtt_size(qpc); + struct res_cq *rcq; + struct res_cq *scq; + int rcqn = qp_get_rcqn(qpc); + int scqn = qp_get_scqn(qpc); + u32 srqn = qp_get_srqn(qpc) & 0xffffff; + int use_srq = (qp_get_srqn(qpc) >> 24) & 1; + struct res_srq *srq; + int local_qpn = be32_to_cpu(qpc->local_qpn) & 0xffffff; + + err = qp_res_start_move_to(dev, slave, qpn, RES_QP_HW, &qp, 0); + if (err) + return err; + qp->local_qpn = local_qpn; + + err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); + if (err) + goto ex_abort; + + err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt); + if (err) + goto ex_put_mtt; + + err = get_res(dev, slave, rcqn, RES_CQ, &rcq); + if (err) + goto ex_put_mtt; + + if (scqn != rcqn) { + err = get_res(dev, slave, scqn, RES_CQ, &scq); + if (err) + goto ex_put_rcq; + } else + scq = rcq; + + if (use_srq) { + err = get_res(dev, slave, srqn, RES_SRQ, &srq); + if (err) + goto ex_put_scq; + } + + adjust_proxy_tun_qkey(dev, vhcr, qpc); + update_pkey_index(dev, slave, inbox); + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto ex_put_srq; + atomic_inc(&mtt->ref_count); + qp->mtt = mtt; + atomic_inc(&rcq->ref_count); + qp->rcq = rcq; + atomic_inc(&scq->ref_count); + qp->scq = scq; + + if (scqn != rcqn) + put_res(dev, slave, scqn, RES_CQ); + + if (use_srq) { + atomic_inc(&srq->ref_count); + put_res(dev, slave, srqn, RES_SRQ); + qp->srq = srq; + } + put_res(dev, slave, rcqn, RES_CQ); + put_res(dev, slave, mtt_base, RES_MTT); + res_end_move(dev, slave, RES_QP, qpn); + + return 0; + +ex_put_srq: + if (use_srq) + put_res(dev, slave, srqn, RES_SRQ); +ex_put_scq: + if (scqn != rcqn) + put_res(dev, slave, scqn, RES_CQ); +ex_put_rcq: + put_res(dev, slave, rcqn, RES_CQ); +ex_put_mtt: + put_res(dev, slave, mtt_base, RES_MTT); +ex_abort: + res_abort_move(dev, slave, RES_QP, qpn); + + return err; +} + +static int eq_get_mtt_addr(struct mlx4_eq_context *eqc) +{ + return be32_to_cpu(eqc->mtt_base_addr_l) & 0xfffffff8; +} + +static int eq_get_mtt_size(struct mlx4_eq_context *eqc) +{ + int log_eq_size = eqc->log_eq_size & 0x1f; + int page_shift = (eqc->log_page_size & 0x3f) + 12; + + if (log_eq_size + 5 < page_shift) + return 1; + + return 1 << (log_eq_size + 5 - page_shift); +} + +static int cq_get_mtt_addr(struct mlx4_cq_context *cqc) +{ + return be32_to_cpu(cqc->mtt_base_addr_l) & 0xfffffff8; +} + +static int cq_get_mtt_size(struct mlx4_cq_context *cqc) +{ + int log_cq_size = (be32_to_cpu(cqc->logsize_usrpage) >> 24) & 0x1f; + int page_shift = (cqc->log_page_size & 0x3f) + 12; + + if (log_cq_size + 5 < page_shift) + return 1; + + return 1 << (log_cq_size + 5 - page_shift); +} + +int mlx4_SW2HW_EQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int eqn = vhcr->in_modifier; + int res_id = (slave << 8) | eqn; + struct mlx4_eq_context *eqc = inbox->buf; + int mtt_base = eq_get_mtt_addr(eqc) / dev->caps.mtt_entry_sz; + int mtt_size = eq_get_mtt_size(eqc); + struct res_eq *eq; + struct res_mtt *mtt; + + err = add_res_range(dev, slave, res_id, 1, RES_EQ, 0); + if (err) + return err; + err = eq_res_start_move_to(dev, slave, res_id, RES_EQ_HW, &eq); + if (err) + goto out_add; + + err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); + if (err) + goto out_move; + + err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt); + if (err) + goto out_put; + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto out_put; + + atomic_inc(&mtt->ref_count); + eq->mtt = mtt; + put_res(dev, slave, mtt->com.res_id, RES_MTT); + res_end_move(dev, slave, RES_EQ, res_id); + return 0; + +out_put: + put_res(dev, slave, mtt->com.res_id, RES_MTT); +out_move: + res_abort_move(dev, slave, RES_EQ, res_id); +out_add: + rem_res_range(dev, slave, res_id, 1, RES_EQ, 0); + return err; +} + +static int get_containing_mtt(struct mlx4_dev *dev, int slave, int start, + int len, struct res_mtt **res) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct res_mtt *mtt; + int err = -EINVAL; + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry(mtt, &tracker->slave_list[slave].res_list[RES_MTT], + com.list) { + if (!check_mtt_range(dev, slave, start, len, mtt)) { + *res = mtt; + mtt->com.from_state = mtt->com.state; + mtt->com.state = RES_MTT_BUSY; + err = 0; + break; + } + } + spin_unlock_irq(mlx4_tlock(dev)); + + return err; +} + +static int verify_qp_parameters(struct mlx4_dev *dev, + struct mlx4_cmd_mailbox *inbox, + enum qp_transition transition, u8 slave) +{ + u32 qp_type; + struct mlx4_qp_context *qp_ctx; + enum mlx4_qp_optpar optpar; + + qp_ctx = inbox->buf + 8; + qp_type = (be32_to_cpu(qp_ctx->flags) >> 16) & 0xff; + optpar = be32_to_cpu(*(__be32 *) inbox->buf); + + switch (qp_type) { + case MLX4_QP_ST_RC: + case MLX4_QP_ST_UC: + switch (transition) { + case QP_TRANS_INIT2RTR: + case QP_TRANS_RTR2RTS: + case QP_TRANS_RTS2RTS: + case QP_TRANS_SQD2SQD: + case QP_TRANS_SQD2RTS: + if (dev->caps.function != slave) /* slaves have only gid index 0 */ + if (optpar & MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH) + if (qp_ctx->pri_path.mgid_index) + return -EINVAL; + if (optpar & MLX4_QP_OPTPAR_ALT_ADDR_PATH) + if (qp_ctx->alt_path.mgid_index) + return -EINVAL; + break; + default: + break; + } + + break; + default: + break; + } + + return 0; +} + +int mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + struct mlx4_mtt mtt; + __be64 *page_list = inbox->buf; + u64 *pg_list = (u64 *)page_list; + int i; + struct res_mtt *rmtt = NULL; + int start = be64_to_cpu(page_list[0]); + int npages = vhcr->in_modifier; + int err; + + err = get_containing_mtt(dev, slave, start, npages, &rmtt); + if (err) + return err; + + /* Call the SW implementation of write_mtt: + * - Prepare a dummy mtt struct + * - Translate inbox contents to simple addresses in host endianess */ + mtt.offset = 0; /* TBD this is broken but I don't handle it since + we don't really use it */ + mtt.order = 0; + mtt.page_shift = 0; + for (i = 0; i < npages; ++i) + pg_list[i + 2] = (be64_to_cpu(page_list[i + 2]) & ~1ULL); + + err = __mlx4_write_mtt(dev, &mtt, be64_to_cpu(page_list[0]), npages, + ((u64 *)page_list + 2)); + + if (rmtt) + put_res(dev, slave, rmtt->com.res_id, RES_MTT); + + return err; +} + +int mlx4_HW2SW_EQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int eqn = vhcr->in_modifier; + int res_id = eqn | (slave << 8); + struct res_eq *eq; + int err; + + err = eq_res_start_move_to(dev, slave, res_id, RES_EQ_RESERVED, &eq); + if (err) + return err; + + err = get_res(dev, slave, eq->mtt->com.res_id, RES_MTT, NULL); + if (err) + goto ex_abort; + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto ex_put; + + atomic_dec(&eq->mtt->ref_count); + put_res(dev, slave, eq->mtt->com.res_id, RES_MTT); + res_end_move(dev, slave, RES_EQ, res_id); + rem_res_range(dev, slave, res_id, 1, RES_EQ, 0); + + return 0; + +ex_put: + put_res(dev, slave, eq->mtt->com.res_id, RES_MTT); +ex_abort: + res_abort_move(dev, slave, RES_EQ, res_id); + + return err; +} + +int mlx4_GEN_EQE(struct mlx4_dev *dev, int slave, struct mlx4_eqe *eqe) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_slave_event_eq_info *event_eq; + struct mlx4_cmd_mailbox *mailbox; + u32 in_modifier = 0; + int err; + int res_id; + struct res_eq *req; + + if (!priv->mfunc.master.slave_state) + return -EINVAL; + + event_eq = &priv->mfunc.master.slave_state[slave].event_eq[eqe->type]; + + /* Create the event only if the slave is registered */ + if (event_eq->eqn < 0) + return 0; + + mutex_lock(&priv->mfunc.master.gen_eqe_mutex[slave]); + res_id = (slave << 8) | event_eq->eqn; + err = get_res(dev, slave, res_id, RES_EQ, &req); + if (err) + goto unlock; + + if (req->com.from_state != RES_EQ_HW) { + err = -EINVAL; + goto put; + } + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + err = PTR_ERR(mailbox); + goto put; + } + + if (eqe->type == MLX4_EVENT_TYPE_CMD) { + ++event_eq->token; + eqe->event.cmd.token = cpu_to_be16(event_eq->token); + } + + memcpy(mailbox->buf, (u8 *) eqe, 28); + + in_modifier = (slave & 0xff) | ((event_eq->eqn & 0xff) << 16); + + err = mlx4_cmd(dev, mailbox->dma, in_modifier, 0, + MLX4_CMD_GEN_EQE, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_NATIVE); + + put_res(dev, slave, res_id, RES_EQ); + mutex_unlock(&priv->mfunc.master.gen_eqe_mutex[slave]); + mlx4_free_cmd_mailbox(dev, mailbox); + return err; + +put: + put_res(dev, slave, res_id, RES_EQ); + +unlock: + mutex_unlock(&priv->mfunc.master.gen_eqe_mutex[slave]); + return err; +} + +int mlx4_QUERY_EQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int eqn = vhcr->in_modifier; + int res_id = eqn | (slave << 8); + struct res_eq *eq; + int err; + + err = get_res(dev, slave, res_id, RES_EQ, &eq); + if (err) + return err; + + if (eq->com.from_state != RES_EQ_HW) { + err = -EINVAL; + goto ex_put; + } + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + +ex_put: + put_res(dev, slave, res_id, RES_EQ); + return err; +} + +int mlx4_SW2HW_CQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int cqn = vhcr->in_modifier; + struct mlx4_cq_context *cqc = inbox->buf; + int mtt_base = cq_get_mtt_addr(cqc) / dev->caps.mtt_entry_sz; + struct res_cq *cq; + struct res_mtt *mtt; + + err = cq_res_start_move_to(dev, slave, cqn, RES_CQ_HW, &cq); + if (err) + return err; + err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); + if (err) + goto out_move; + err = check_mtt_range(dev, slave, mtt_base, cq_get_mtt_size(cqc), mtt); + if (err) + goto out_put; + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto out_put; + atomic_inc(&mtt->ref_count); + cq->mtt = mtt; + put_res(dev, slave, mtt->com.res_id, RES_MTT); + res_end_move(dev, slave, RES_CQ, cqn); + return 0; + +out_put: + put_res(dev, slave, mtt->com.res_id, RES_MTT); +out_move: + res_abort_move(dev, slave, RES_CQ, cqn); + return err; +} + +int mlx4_HW2SW_CQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int cqn = vhcr->in_modifier; + struct res_cq *cq; + + err = cq_res_start_move_to(dev, slave, cqn, RES_CQ_ALLOCATED, &cq); + if (err) + return err; + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto out_move; + atomic_dec(&cq->mtt->ref_count); + res_end_move(dev, slave, RES_CQ, cqn); + return 0; + +out_move: + res_abort_move(dev, slave, RES_CQ, cqn); + return err; +} + +int mlx4_QUERY_CQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int cqn = vhcr->in_modifier; + struct res_cq *cq; + int err; + + err = get_res(dev, slave, cqn, RES_CQ, &cq); + if (err) + return err; + + if (cq->com.from_state != RES_CQ_HW) + goto ex_put; + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +ex_put: + put_res(dev, slave, cqn, RES_CQ); + + return err; +} + +static int handle_resize(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd, + struct res_cq *cq) +{ + int err; + struct res_mtt *orig_mtt; + struct res_mtt *mtt; + struct mlx4_cq_context *cqc = inbox->buf; + int mtt_base = cq_get_mtt_addr(cqc) / dev->caps.mtt_entry_sz; + + err = get_res(dev, slave, cq->mtt->com.res_id, RES_MTT, &orig_mtt); + if (err) + return err; + + if (orig_mtt != cq->mtt) { + err = -EINVAL; + goto ex_put; + } + + err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); + if (err) + goto ex_put; + + err = check_mtt_range(dev, slave, mtt_base, cq_get_mtt_size(cqc), mtt); + if (err) + goto ex_put1; + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto ex_put1; + atomic_dec(&orig_mtt->ref_count); + put_res(dev, slave, orig_mtt->com.res_id, RES_MTT); + atomic_inc(&mtt->ref_count); + cq->mtt = mtt; + put_res(dev, slave, mtt->com.res_id, RES_MTT); + return 0; + +ex_put1: + put_res(dev, slave, mtt->com.res_id, RES_MTT); +ex_put: + put_res(dev, slave, orig_mtt->com.res_id, RES_MTT); + + return err; + +} + +int mlx4_MODIFY_CQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int cqn = vhcr->in_modifier; + struct res_cq *cq; + int err; + + err = get_res(dev, slave, cqn, RES_CQ, &cq); + if (err) + return err; + + if (cq->com.from_state != RES_CQ_HW) + goto ex_put; + + if (vhcr->op_modifier == 0) { + err = handle_resize(dev, slave, vhcr, inbox, outbox, cmd, cq); + goto ex_put; + } + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +ex_put: + put_res(dev, slave, cqn, RES_CQ); + + return err; +} + +static int srq_get_mtt_size(struct mlx4_srq_context *srqc) +{ + int log_srq_size = (be32_to_cpu(srqc->state_logsize_srqn) >> 24) & 0xf; + int log_rq_stride = srqc->logstride & 7; + int page_shift = (srqc->log_page_size & 0x3f) + 12; + + if (log_srq_size + log_rq_stride + 4 < page_shift) + return 1; + + return 1 << (log_srq_size + log_rq_stride + 4 - page_shift); +} + +int mlx4_SW2HW_SRQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int srqn = vhcr->in_modifier; + struct res_mtt *mtt; + struct res_srq *srq; + struct mlx4_srq_context *srqc = inbox->buf; + int mtt_base = srq_get_mtt_addr(srqc) / dev->caps.mtt_entry_sz; + + if (srqn != (be32_to_cpu(srqc->state_logsize_srqn) & 0xffffff)) + return -EINVAL; + + err = srq_res_start_move_to(dev, slave, srqn, RES_SRQ_HW, &srq); + if (err) + return err; + err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); + if (err) + goto ex_abort; + err = check_mtt_range(dev, slave, mtt_base, srq_get_mtt_size(srqc), + mtt); + if (err) + goto ex_put_mtt; + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto ex_put_mtt; + + atomic_inc(&mtt->ref_count); + srq->mtt = mtt; + put_res(dev, slave, mtt->com.res_id, RES_MTT); + res_end_move(dev, slave, RES_SRQ, srqn); + return 0; + +ex_put_mtt: + put_res(dev, slave, mtt->com.res_id, RES_MTT); +ex_abort: + res_abort_move(dev, slave, RES_SRQ, srqn); + + return err; +} + +int mlx4_HW2SW_SRQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int srqn = vhcr->in_modifier; + struct res_srq *srq; + + err = srq_res_start_move_to(dev, slave, srqn, RES_SRQ_ALLOCATED, &srq); + if (err) + return err; + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto ex_abort; + atomic_dec(&srq->mtt->ref_count); + if (srq->cq) + atomic_dec(&srq->cq->ref_count); + res_end_move(dev, slave, RES_SRQ, srqn); + + return 0; + +ex_abort: + res_abort_move(dev, slave, RES_SRQ, srqn); + + return err; +} + +int mlx4_QUERY_SRQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int srqn = vhcr->in_modifier; + struct res_srq *srq; + + err = get_res(dev, slave, srqn, RES_SRQ, &srq); + if (err) + return err; + if (srq->com.from_state != RES_SRQ_HW) { + err = -EBUSY; + goto out; + } + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +out: + put_res(dev, slave, srqn, RES_SRQ); + return err; +} + +int mlx4_ARM_SRQ_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int srqn = vhcr->in_modifier; + struct res_srq *srq; + + err = get_res(dev, slave, srqn, RES_SRQ, &srq); + if (err) + return err; + + if (srq->com.from_state != RES_SRQ_HW) { + err = -EBUSY; + goto out; + } + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +out: + put_res(dev, slave, srqn, RES_SRQ); + return err; +} + +int mlx4_GEN_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int qpn = vhcr->in_modifier & 0x7fffff; + struct res_qp *qp; + + err = get_res(dev, slave, qpn, RES_QP, &qp); + if (err) + return err; + if (qp->com.from_state != RES_QP_HW) { + err = -EBUSY; + goto out; + } + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +out: + put_res(dev, slave, qpn, RES_QP); + return err; +} + +int mlx4_INIT2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + struct mlx4_qp_context *context = inbox->buf + 8; + adjust_proxy_tun_qkey(dev, vhcr, context); + update_pkey_index(dev, slave, inbox); + return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +} + +int mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + struct mlx4_qp_context *qpc = inbox->buf + 8; + + err = verify_qp_parameters(dev, inbox, QP_TRANS_INIT2RTR, slave); + if (err) + return err; + + update_pkey_index(dev, slave, inbox); + update_gid(dev, inbox, (u8)slave); + adjust_proxy_tun_qkey(dev, vhcr, qpc); + + return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +} + +int mlx4_RTR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + struct mlx4_qp_context *context = inbox->buf + 8; + + err = verify_qp_parameters(dev, inbox, QP_TRANS_RTR2RTS, slave); + if (err) + return err; + + update_pkey_index(dev, slave, inbox); + update_gid(dev, inbox, (u8)slave); + adjust_proxy_tun_qkey(dev, vhcr, context); + return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +} + +int mlx4_RTS2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + struct mlx4_qp_context *context = inbox->buf + 8; + + err = verify_qp_parameters(dev, inbox, QP_TRANS_RTS2RTS, slave); + if (err) + return err; + + update_pkey_index(dev, slave, inbox); + update_gid(dev, inbox, (u8)slave); + adjust_proxy_tun_qkey(dev, vhcr, context); + return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +} + + +int mlx4_SQERR2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + struct mlx4_qp_context *context = inbox->buf + 8; + adjust_proxy_tun_qkey(dev, vhcr, context); + return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +} + +int mlx4_SQD2SQD_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + struct mlx4_qp_context *context = inbox->buf + 8; + + err = verify_qp_parameters(dev, inbox, QP_TRANS_SQD2SQD, slave); + if (err) + return err; + + adjust_proxy_tun_qkey(dev, vhcr, context); + update_gid(dev, inbox, (u8)slave); + update_pkey_index(dev, slave, inbox); + return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +} + +int mlx4_SQD2RTS_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + struct mlx4_qp_context *context = inbox->buf + 8; + + err = verify_qp_parameters(dev, inbox, QP_TRANS_SQD2RTS, slave); + if (err) + return err; + + adjust_proxy_tun_qkey(dev, vhcr, context); + update_gid(dev, inbox, (u8)slave); + update_pkey_index(dev, slave, inbox); + return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); +} + +int mlx4_2RST_QP_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int qpn = vhcr->in_modifier & 0x7fffff; + struct res_qp *qp; + + err = qp_res_start_move_to(dev, slave, qpn, RES_QP_MAPPED, &qp, 0); + if (err) + return err; + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + if (err) + goto ex_abort; + + atomic_dec(&qp->mtt->ref_count); + atomic_dec(&qp->rcq->ref_count); + atomic_dec(&qp->scq->ref_count); + if (qp->srq) + atomic_dec(&qp->srq->ref_count); + res_end_move(dev, slave, RES_QP, qpn); + return 0; + +ex_abort: + res_abort_move(dev, slave, RES_QP, qpn); + + return err; +} + +static struct res_gid *find_gid(struct mlx4_dev *dev, int slave, + struct res_qp *rqp, u8 *gid) +{ + struct res_gid *res; + + list_for_each_entry(res, &rqp->mcg_list, list) { + if (!memcmp(res->gid, gid, 16)) + return res; + } + return NULL; +} + +static int add_mcg_res(struct mlx4_dev *dev, int slave, struct res_qp *rqp, + u8 *gid, enum mlx4_protocol prot, + enum mlx4_steer_type steer) +{ + struct res_gid *res; + int err; + + res = kzalloc(sizeof *res, GFP_KERNEL); + if (!res) + return -ENOMEM; + + spin_lock_irq(&rqp->mcg_spl); + if (find_gid(dev, slave, rqp, gid)) { + kfree(res); + err = -EEXIST; + } else { + memcpy(res->gid, gid, 16); + res->prot = prot; + res->steer = steer; + list_add_tail(&res->list, &rqp->mcg_list); + err = 0; + } + spin_unlock_irq(&rqp->mcg_spl); + + return err; +} + +static int rem_mcg_res(struct mlx4_dev *dev, int slave, struct res_qp *rqp, + u8 *gid, enum mlx4_protocol prot, + enum mlx4_steer_type steer) +{ + struct res_gid *res; + int err; + + spin_lock_irq(&rqp->mcg_spl); + res = find_gid(dev, slave, rqp, gid); + if (!res || res->prot != prot || res->steer != steer) + err = -EINVAL; + else { + list_del(&res->list); + kfree(res); + err = 0; + } + spin_unlock_irq(&rqp->mcg_spl); + + return err; +} + +int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + struct mlx4_qp qp; /* dummy for calling attach/detach */ + u8 *gid = inbox->buf; + enum mlx4_protocol prot = (vhcr->in_modifier >> 28) & 0x7; + int err, err1; + int qpn; + struct res_qp *rqp; + int attach = vhcr->op_modifier; + int block_loopback = vhcr->in_modifier >> 31; + u8 steer_type_mask = 2; + enum mlx4_steer_type type = (gid[7] & steer_type_mask) >> 1; + + qpn = vhcr->in_modifier & 0xffffff; + err = get_res(dev, slave, qpn, RES_QP, &rqp); + if (err) + return err; + + qp.qpn = qpn; + if (attach) { + err = add_mcg_res(dev, slave, rqp, gid, prot, type); + if (err) + goto ex_put; + + err = mlx4_qp_attach_common(dev, &qp, gid, + block_loopback, prot, type); + if (err) + goto ex_rem; + } else { + err = rem_mcg_res(dev, slave, rqp, gid, prot, type); + if (err) + goto ex_put; + err = mlx4_qp_detach_common(dev, &qp, gid, prot, type); + } + + put_res(dev, slave, qpn, RES_QP); + return 0; + +ex_rem: + /* ignore error return below, already in error */ + err1 = rem_mcg_res(dev, slave, rqp, gid, prot, type); +ex_put: + put_res(dev, slave, qpn, RES_QP); + + return err; +} + +enum { + BUSY_MAX_RETRIES = 10 +}; + +int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave, + struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox, + struct mlx4_cmd_info *cmd) +{ + int err; + int index = vhcr->in_modifier & 0xffff; + + err = get_res(dev, slave, index, RES_COUNTER, NULL); + if (err) + return err; + + err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); + put_res(dev, slave, index, RES_COUNTER); + return err; +} + +static void detach_qp(struct mlx4_dev *dev, int slave, struct res_qp *rqp) +{ + struct res_gid *rgid; + struct res_gid *tmp; + int err; + struct mlx4_qp qp; /* dummy for calling attach/detach */ + + list_for_each_entry_safe(rgid, tmp, &rqp->mcg_list, list) { + qp.qpn = rqp->local_qpn; + err = mlx4_qp_detach_common(dev, &qp, rgid->gid, rgid->prot, + rgid->steer); + list_del(&rgid->list); + kfree(rgid); + } +} + +static int _move_all_busy(struct mlx4_dev *dev, int slave, + enum mlx4_resource type, int print) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = + &priv->mfunc.master.res_tracker; + struct list_head *rlist = &tracker->slave_list[slave].res_list[type]; + struct res_common *r; + struct res_common *tmp; + int busy; + + busy = 0; + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(r, tmp, rlist, list) { + if (r->owner == slave) { + if (!r->removing) { + if (r->state == RES_ANY_BUSY) { + if (print) + mlx4_dbg(dev, + "%s id 0x%x is busy\n", + ResourceType(type), + r->res_id); + ++busy; + } else { + r->from_state = r->state; + r->state = RES_ANY_BUSY; + r->removing = 1; + } + } + } + } + spin_unlock_irq(mlx4_tlock(dev)); + + return busy; +} + +static int move_all_busy(struct mlx4_dev *dev, int slave, + enum mlx4_resource type) +{ + unsigned long begin; + int busy; + + begin = jiffies; + do { + busy = _move_all_busy(dev, slave, type, 0); + if (time_after(jiffies, begin + 5 * HZ)) + break; + if (busy) + cond_resched(); + } while (busy); + + if (busy) + busy = _move_all_busy(dev, slave, type, 1); + + return busy; +} +static void rem_slave_qps(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *qp_list = + &tracker->slave_list[slave].res_list[RES_QP]; + struct res_qp *qp; + struct res_qp *tmp; + int state; + u64 in_param; + int qpn; + int err; + + err = move_all_busy(dev, slave, RES_QP); + if (err) + mlx4_warn(dev, "rem_slave_qps: Could not move all qps to busy" + "for slave %d\n", slave); + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(qp, tmp, qp_list, com.list) { + spin_unlock_irq(mlx4_tlock(dev)); + if (qp->com.owner == slave) { + qpn = qp->com.res_id; + detach_qp(dev, slave, qp); + state = qp->com.from_state; + while (state != 0) { + switch (state) { + case RES_QP_RESERVED: + spin_lock_irq(mlx4_tlock(dev)); + radix_tree_delete(&tracker->res_tree[RES_QP], + qp->com.res_id); + list_del(&qp->com.list); + spin_unlock_irq(mlx4_tlock(dev)); + kfree(qp); + state = 0; + break; + case RES_QP_MAPPED: + if (!valid_reserved(dev, slave, qpn)) + __mlx4_qp_free_icm(dev, qpn); + state = RES_QP_RESERVED; + break; + case RES_QP_HW: + in_param = slave; + err = mlx4_cmd(dev, in_param, + qp->local_qpn, 2, + MLX4_CMD_2RST_QP, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); + if (err) + mlx4_dbg(dev, "rem_slave_qps: failed" + " to move slave %d qpn %d to" + " reset\n", slave, + qp->local_qpn); + atomic_dec(&qp->rcq->ref_count); + atomic_dec(&qp->scq->ref_count); + atomic_dec(&qp->mtt->ref_count); + if (qp->srq) + atomic_dec(&qp->srq->ref_count); + state = RES_QP_MAPPED; + break; + default: + state = 0; + } + } + } + spin_lock_irq(mlx4_tlock(dev)); + } + spin_unlock_irq(mlx4_tlock(dev)); +} + +static void rem_slave_srqs(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *srq_list = + &tracker->slave_list[slave].res_list[RES_SRQ]; + struct res_srq *srq; + struct res_srq *tmp; + int state; + u64 in_param; + LIST_HEAD(tlist); + int srqn; + int err; + + err = move_all_busy(dev, slave, RES_SRQ); + if (err) + mlx4_warn(dev, "rem_slave_srqs: Could not move all srqs to " + "busy for slave %d\n", slave); + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(srq, tmp, srq_list, com.list) { + spin_unlock_irq(mlx4_tlock(dev)); + if (srq->com.owner == slave) { + srqn = srq->com.res_id; + state = srq->com.from_state; + while (state != 0) { + switch (state) { + case RES_SRQ_ALLOCATED: + __mlx4_srq_free_icm(dev, srqn); + spin_lock_irq(mlx4_tlock(dev)); + radix_tree_delete(&tracker->res_tree[RES_SRQ], + srqn); + list_del(&srq->com.list); + spin_unlock_irq(mlx4_tlock(dev)); + kfree(srq); + state = 0; + break; + + case RES_SRQ_HW: + in_param = slave; + err = mlx4_cmd(dev, in_param, srqn, 1, + MLX4_CMD_HW2SW_SRQ, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); + if (err) + mlx4_dbg(dev, "rem_slave_srqs: failed" + " to move slave %d srq %d to" + " SW ownership\n", + slave, srqn); + + atomic_dec(&srq->mtt->ref_count); + if (srq->cq) + atomic_dec(&srq->cq->ref_count); + state = RES_SRQ_ALLOCATED; + break; + + default: + state = 0; + } + } + } + spin_lock_irq(mlx4_tlock(dev)); + } + spin_unlock_irq(mlx4_tlock(dev)); +} + +static void rem_slave_cqs(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *cq_list = + &tracker->slave_list[slave].res_list[RES_CQ]; + struct res_cq *cq; + struct res_cq *tmp; + int state; + u64 in_param; + LIST_HEAD(tlist); + int cqn; + int err; + + err = move_all_busy(dev, slave, RES_CQ); + if (err) + mlx4_warn(dev, "rem_slave_cqs: Could not move all cqs to " + "busy for slave %d\n", slave); + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(cq, tmp, cq_list, com.list) { + spin_unlock_irq(mlx4_tlock(dev)); + if (cq->com.owner == slave && !atomic_read(&cq->ref_count)) { + cqn = cq->com.res_id; + state = cq->com.from_state; + while (state != 0) { + switch (state) { + case RES_CQ_ALLOCATED: + __mlx4_cq_free_icm(dev, cqn); + spin_lock_irq(mlx4_tlock(dev)); + radix_tree_delete(&tracker->res_tree[RES_CQ], + cqn); + list_del(&cq->com.list); + spin_unlock_irq(mlx4_tlock(dev)); + kfree(cq); + state = 0; + break; + + case RES_CQ_HW: + in_param = slave; + err = mlx4_cmd(dev, in_param, cqn, 1, + MLX4_CMD_HW2SW_CQ, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); + if (err) + mlx4_dbg(dev, "rem_slave_cqs: failed" + " to move slave %d cq %d to" + " SW ownership\n", + slave, cqn); + atomic_dec(&cq->mtt->ref_count); + state = RES_CQ_ALLOCATED; + break; + + default: + state = 0; + } + } + } + spin_lock_irq(mlx4_tlock(dev)); + } + spin_unlock_irq(mlx4_tlock(dev)); +} + +static void rem_slave_mrs(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *mpt_list = + &tracker->slave_list[slave].res_list[RES_MPT]; + struct res_mpt *mpt; + struct res_mpt *tmp; + int state; + u64 in_param; + LIST_HEAD(tlist); + int mptn; + int err; + + err = move_all_busy(dev, slave, RES_MPT); + if (err) + mlx4_warn(dev, "rem_slave_mrs: Could not move all mpts to " + "busy for slave %d\n", slave); + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(mpt, tmp, mpt_list, com.list) { + spin_unlock_irq(mlx4_tlock(dev)); + if (mpt->com.owner == slave) { + mptn = mpt->com.res_id; + state = mpt->com.from_state; + while (state != 0) { + switch (state) { + case RES_MPT_RESERVED: + __mlx4_mr_release(dev, mpt->key); + spin_lock_irq(mlx4_tlock(dev)); + radix_tree_delete(&tracker->res_tree[RES_MPT], + mptn); + list_del(&mpt->com.list); + spin_unlock_irq(mlx4_tlock(dev)); + kfree(mpt); + state = 0; + break; + + case RES_MPT_MAPPED: + __mlx4_mr_free_icm(dev, mpt->key); + state = RES_MPT_RESERVED; + break; + + case RES_MPT_HW: + in_param = slave; + err = mlx4_cmd(dev, in_param, mptn, 0, + MLX4_CMD_HW2SW_MPT, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); + if (err) + mlx4_dbg(dev, "rem_slave_mrs: failed" + " to move slave %d mpt %d to" + " SW ownership\n", + slave, mptn); + if (mpt->mtt) + atomic_dec(&mpt->mtt->ref_count); + state = RES_MPT_MAPPED; + break; + default: + state = 0; + } + } + } + spin_lock_irq(mlx4_tlock(dev)); + } + spin_unlock_irq(mlx4_tlock(dev)); +} + +static void rem_slave_mtts(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = + &priv->mfunc.master.res_tracker; + struct list_head *mtt_list = + &tracker->slave_list[slave].res_list[RES_MTT]; + struct res_mtt *mtt; + struct res_mtt *tmp; + int state; + LIST_HEAD(tlist); + int base; + int err; + + err = move_all_busy(dev, slave, RES_MTT); + if (err) + mlx4_warn(dev, "rem_slave_mtts: Could not move all mtts to " + "busy for slave %d\n", slave); + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(mtt, tmp, mtt_list, com.list) { + spin_unlock_irq(mlx4_tlock(dev)); + if (mtt->com.owner == slave) { + base = mtt->com.res_id; + state = mtt->com.from_state; + while (state != 0) { + switch (state) { + case RES_MTT_ALLOCATED: + __mlx4_free_mtt_range(dev, base, + mtt->order); + spin_lock_irq(mlx4_tlock(dev)); + radix_tree_delete(&tracker->res_tree[RES_MTT], + base); + list_del(&mtt->com.list); + spin_unlock_irq(mlx4_tlock(dev)); + kfree(mtt); + state = 0; + break; + + default: + state = 0; + } + } + } + spin_lock_irq(mlx4_tlock(dev)); + } + spin_unlock_irq(mlx4_tlock(dev)); +} + +static void rem_slave_eqs(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *eq_list = + &tracker->slave_list[slave].res_list[RES_EQ]; + struct res_eq *eq; + struct res_eq *tmp; + int err; + int state; + LIST_HEAD(tlist); + int eqn; + struct mlx4_cmd_mailbox *mailbox; + + err = move_all_busy(dev, slave, RES_EQ); + if (err) + mlx4_warn(dev, "rem_slave_eqs: Could not move all eqs to " + "busy for slave %d\n", slave); + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(eq, tmp, eq_list, com.list) { + spin_unlock_irq(mlx4_tlock(dev)); + if (eq->com.owner == slave) { + eqn = eq->com.res_id; + state = eq->com.from_state; + while (state != 0) { + switch (state) { + case RES_EQ_RESERVED: + spin_lock_irq(mlx4_tlock(dev)); + radix_tree_delete(&tracker->res_tree[RES_EQ], + eqn); + list_del(&eq->com.list); + spin_unlock_irq(mlx4_tlock(dev)); + kfree(eq); + state = 0; + break; + + case RES_EQ_HW: + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + cond_resched(); + continue; + } + err = mlx4_cmd_box(dev, slave, 0, + eqn & 0xff, 0, + MLX4_CMD_HW2SW_EQ, + MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_NATIVE); + mlx4_dbg(dev, "rem_slave_eqs: failed" + " to move slave %d eqs %d to" + " SW ownership\n", slave, eqn); + mlx4_free_cmd_mailbox(dev, mailbox); + if (!err) { + atomic_dec(&eq->mtt->ref_count); + state = RES_EQ_RESERVED; + } + break; + + default: + state = 0; + } + } + } + spin_lock_irq(mlx4_tlock(dev)); + } + spin_unlock_irq(mlx4_tlock(dev)); +} + +static void rem_slave_counters(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *counter_list = + &tracker->slave_list[slave].res_list[RES_COUNTER]; + struct res_counter *counter; + struct res_counter *tmp; + int err; + int index; + + err = move_all_busy(dev, slave, RES_COUNTER); + if (err) + mlx4_warn(dev, "rem_slave_counters: Could not move all counters to " + "busy for slave %d\n", slave); + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(counter, tmp, counter_list, com.list) { + if (counter->com.owner == slave) { + index = counter->com.res_id; + radix_tree_delete(&tracker->res_tree[RES_COUNTER], index); + list_del(&counter->com.list); + kfree(counter); + __mlx4_counter_free(dev, index); + } + } + spin_unlock_irq(mlx4_tlock(dev)); +} + +static void rem_slave_xrcdns(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_resource_tracker *tracker = &priv->mfunc.master.res_tracker; + struct list_head *xrcdn_list = + &tracker->slave_list[slave].res_list[RES_XRCD]; + struct res_xrcdn *xrcd; + struct res_xrcdn *tmp; + int err; + int xrcdn; + + err = move_all_busy(dev, slave, RES_XRCD); + if (err) + mlx4_warn(dev, "rem_slave_xrcdns: Could not move all xrcdns to " + "busy for slave %d\n", slave); + + spin_lock_irq(mlx4_tlock(dev)); + list_for_each_entry_safe(xrcd, tmp, xrcdn_list, com.list) { + if (xrcd->com.owner == slave) { + xrcdn = xrcd->com.res_id; + radix_tree_delete(&tracker->res_tree[RES_XRCD], xrcdn); + list_del(&xrcd->com.list); + kfree(xrcd); + __mlx4_xrcd_free(dev, xrcdn); + } + } + spin_unlock_irq(mlx4_tlock(dev)); +} + +void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + + mutex_lock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex); + /*VLAN*/ + rem_slave_macs(dev, slave); + rem_slave_qps(dev, slave); + rem_slave_srqs(dev, slave); + rem_slave_cqs(dev, slave); + rem_slave_mrs(dev, slave); + rem_slave_eqs(dev, slave); + rem_slave_mtts(dev, slave); + rem_slave_counters(dev, slave); + rem_slave_xrcdns(dev, slave); + mutex_unlock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex); +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/sense.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/sense.c new file mode 100755 index 0000000..1846cf9 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/sense.c @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2007, 2011-2013 Mellanox Technologies. All rights reserved. + * All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifdef __VMKERNEL_MLNX_SENSNE_ENABLE__ +#include +#include + +#include + +#include "mlx4.h" + +int mlx4_SENSE_PORT(struct mlx4_dev *dev, int port, + enum mlx4_port_type *type) +{ + u64 out_param; + int err = 0; + + err = mlx4_cmd_imm(dev, 0, &out_param, port, 0, + MLX4_CMD_SENSE_PORT, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_WRAPPED); + if (err) { + mlx4_err(dev, "Sense command failed for port: %d\n", port); + return err; + } + + if (out_param > 2) { + mlx4_err(dev, "Sense returned illegal value: 0x%llx\n", out_param); + return -EINVAL; + } + + *type = out_param; + return 0; +} + +void mlx4_do_sense_ports(struct mlx4_dev *dev, + enum mlx4_port_type *stype, + enum mlx4_port_type *defaults) +{ + struct mlx4_sense *sense = &mlx4_priv(dev)->sense; + int err; + int i; + + for (i = 1; i <= dev->caps.num_ports; i++) { + stype[i - 1] = 0; + if (sense->do_sense_port[i] && sense->sense_allowed[i] && + dev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) { + err = mlx4_SENSE_PORT(dev, i, &stype[i - 1]); + if (err) + stype[i - 1] = defaults[i - 1]; + } else + stype[i - 1] = defaults[i - 1]; + } + + /* + * Adjust port configuration: + * If port 1 sensed nothing and port 2 is IB, set both as IB + * If port 2 sensed nothing and port 1 is Eth, set both as Eth + */ + if (stype[0] == MLX4_PORT_TYPE_ETH) { + for (i = 1; i < dev->caps.num_ports; i++) + stype[i] = stype[i] ? stype[i] : MLX4_PORT_TYPE_ETH; + } + if (stype[dev->caps.num_ports - 1] == MLX4_PORT_TYPE_IB) { + for (i = 0; i < dev->caps.num_ports - 1; i++) + stype[i] = stype[i] ? stype[i] : MLX4_PORT_TYPE_IB; + } + + /* + * If sensed nothing, remain in current configuration. + */ + for (i = 0; i < dev->caps.num_ports; i++) + stype[i] = stype[i] ? stype[i] : defaults[i]; + +} + +static void mlx4_sense_port(struct work_struct *work) +{ + struct delayed_work *delay = to_delayed_work(work); + struct mlx4_sense *sense = container_of(delay, struct mlx4_sense, + sense_poll); + struct mlx4_dev *dev = sense->dev; + struct mlx4_priv *priv = mlx4_priv(dev); + enum mlx4_port_type stype[MLX4_MAX_PORTS]; + + mutex_lock(&priv->port_mutex); + mlx4_do_sense_ports(dev, stype, &dev->caps.port_type[1]); + + if (mlx4_check_port_params(dev, stype)) + goto sense_again; + + if (mlx4_change_port_types(dev, stype)) + mlx4_err(dev, "Failed to change port_types\n"); + +sense_again: + mutex_unlock(&priv->port_mutex); + queue_delayed_work(mlx4_wq , &sense->sense_poll, + round_jiffies_relative(MLX4_SENSE_RANGE)); +} + +void mlx4_start_sense(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_sense *sense = &priv->sense; + + if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) + return; + + queue_delayed_work(mlx4_wq , &sense->sense_poll, + round_jiffies_relative(MLX4_SENSE_RANGE)); +} + +void mlx4_stop_sense(struct mlx4_dev *dev) +{ + cancel_delayed_work_sync(&mlx4_priv(dev)->sense.sense_poll); +} + +void mlx4_sense_init(struct mlx4_dev *dev) +{ + struct mlx4_priv *priv = mlx4_priv(dev); + struct mlx4_sense *sense = &priv->sense; + int port; + + sense->dev = dev; + for (port = 1; port <= dev->caps.num_ports; port++) + sense->do_sense_port[port] = 1; + + INIT_DELAYED_WORK_DEFERRABLE(&sense->sense_poll, mlx4_sense_port); +} +#endif /* __VMKERNEL_MLNX_SENSNE_ENABLE__ */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/srq.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/srq.c new file mode 100755 index 0000000..7605987 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_core/srq.c @@ -0,0 +1,286 @@ +/* + * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2007-2008, 2011-2013 Mellanox Technologies. + * All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include + +#include +#ifndef __VMKERNEL_MODULE__ +#include +#else +#include +#endif /* NOT __VMKERNEL_MODULE__ */ +#include + +#include "mlx4.h" +#include "icm.h" + +void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type) +{ + struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; + struct mlx4_srq *srq; + + spin_lock(&srq_table->lock); + + srq = radix_tree_lookup(&srq_table->tree, srqn & (dev->caps.num_srqs - 1)); + if (srq) + atomic_inc(&srq->refcount); + + spin_unlock(&srq_table->lock); + + if (!srq) { + mlx4_warn(dev, "Async event for bogus SRQ %08x\n", srqn); + return; + } + + srq->event(srq, event_type); + + if (atomic_dec_and_test(&srq->refcount)) + complete(&srq->free); +} + +static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int srq_num) +{ + return mlx4_cmd(dev, mailbox->dma, srq_num, 0, + MLX4_CMD_SW2HW_SRQ, MLX4_CMD_TIME_CLASS_A, + MLX4_CMD_WRAPPED); +} + +static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int srq_num) +{ + return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num, + mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); +} + +static int mlx4_ARM_SRQ(struct mlx4_dev *dev, int srq_num, int limit_watermark) +{ + return mlx4_cmd(dev, limit_watermark, srq_num, 0, MLX4_CMD_ARM_SRQ, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); +} + +static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int srq_num) +{ + return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); +} + +int __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn) +{ + struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; + int err; + + + *srqn = mlx4_bitmap_alloc(&srq_table->bitmap); + if (*srqn == -1) + return -ENOMEM; + + err = mlx4_table_get(dev, &srq_table->table, *srqn); + if (err) + goto err_out; + + err = mlx4_table_get(dev, &srq_table->cmpt_table, *srqn); + if (err) + goto err_put; + return 0; + +err_put: + mlx4_table_put(dev, &srq_table->table, *srqn); + +err_out: + mlx4_bitmap_free(&srq_table->bitmap, *srqn); + return err; +} + +static int mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn) +{ + u64 out_param; + int err; + + if (mlx4_is_mfunc(dev)) { + err = mlx4_cmd_imm(dev, 0, &out_param, RES_SRQ, + RES_OP_RESERVE_AND_MAP, + MLX4_CMD_ALLOC_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); + if (!err) + *srqn = get_param_l(&out_param); + + return err; + } + return __mlx4_srq_alloc_icm(dev, srqn); +} + +void __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn) +{ + struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; + + mlx4_table_put(dev, &srq_table->cmpt_table, srqn); + mlx4_table_put(dev, &srq_table->table, srqn); + mlx4_bitmap_free(&srq_table->bitmap, srqn); +} + +static void mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn) +{ + u64 in_param; + + if (mlx4_is_mfunc(dev)) { + set_param_l(&in_param, srqn); + if (mlx4_cmd(dev, in_param, RES_SRQ, RES_OP_RESERVE_AND_MAP, + MLX4_CMD_FREE_RES, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED)) + mlx4_warn(dev, "Failed freeing srq:%d\n", srqn); + return; + } + __mlx4_srq_free_icm(dev, srqn); +} + +int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd, + struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq) +{ + struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_srq_context *srq_context; + u64 mtt_addr; + int err; + + err = mlx4_srq_alloc_icm(dev, &srq->srqn); + if (err) + return err; + + spin_lock_irq(&srq_table->lock); + err = radix_tree_insert(&srq_table->tree, srq->srqn, srq); + spin_unlock_irq(&srq_table->lock); + if (err) + goto err_icm; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) { + err = PTR_ERR(mailbox); + goto err_radix; + } + + srq_context = mailbox->buf; + memset(srq_context, 0, sizeof *srq_context); + + srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) | + srq->srqn); + srq_context->logstride = srq->wqe_shift - 4; + srq_context->xrcd = cpu_to_be16(xrcd); + srq_context->pg_offset_cqn = cpu_to_be32(cqn & 0xffffff); + srq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; + + mtt_addr = mlx4_mtt_addr(dev, mtt); + srq_context->mtt_base_addr_h = mtt_addr >> 32; + srq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); + srq_context->pd = cpu_to_be32(pdn); + srq_context->db_rec_addr = cpu_to_be64(db_rec); + + err = mlx4_SW2HW_SRQ(dev, mailbox, srq->srqn); + mlx4_free_cmd_mailbox(dev, mailbox); + if (err) + goto err_radix; + + atomic_set(&srq->refcount, 1); + init_completion(&srq->free); + + return 0; + +err_radix: + spin_lock_irq(&srq_table->lock); + radix_tree_delete(&srq_table->tree, srq->srqn); + spin_unlock_irq(&srq_table->lock); + +err_icm: + mlx4_srq_free_icm(dev, srq->srqn); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_srq_alloc); + +void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq) +{ + struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; + int err; + + err = mlx4_HW2SW_SRQ(dev, NULL, srq->srqn); + if (err) + mlx4_warn(dev, "HW2SW_SRQ failed (%d) for SRQN %06x\n", err, srq->srqn); + + spin_lock_irq(&srq_table->lock); + radix_tree_delete(&srq_table->tree, srq->srqn); + spin_unlock_irq(&srq_table->lock); + + if (atomic_dec_and_test(&srq->refcount)) + complete(&srq->free); + wait_for_completion(&srq->free); + + mlx4_srq_free_icm(dev, srq->srqn); +} +EXPORT_SYMBOL_GPL(mlx4_srq_free); + +int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark) +{ + return mlx4_ARM_SRQ(dev, srq->srqn, limit_watermark); +} +EXPORT_SYMBOL_GPL(mlx4_srq_arm); + +int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_srq_context *srq_context; + int err; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + srq_context = mailbox->buf; + + err = mlx4_QUERY_SRQ(dev, mailbox, srq->srqn); + if (err) + goto err_out; + *limit_watermark = be16_to_cpu(srq_context->limit_watermark); + +err_out: + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} +EXPORT_SYMBOL_GPL(mlx4_srq_query); + +int mlx4_init_srq_table(struct mlx4_dev *dev) +{ + struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; + int err; + + spin_lock_init(&srq_table->lock); + INIT_RADIX_TREE(&srq_table->tree, GFP_ATOMIC); + if (mlx4_is_slave(dev)) + return 0; + + err = mlx4_bitmap_init(&srq_table->bitmap, dev->caps.num_srqs, + dev->caps.num_srqs - 1, dev->caps.reserved_srqs, 0); + if (err) + return err; + + return 0; +} + +void mlx4_cleanup_srq_table(struct mlx4_dev *dev) +{ + if (mlx4_is_slave(dev)) + return; + mlx4_bitmap_cleanup(&mlx4_priv(dev)->srq_table.bitmap); +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_cq.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_cq.c new file mode 100755 index 0000000..e35b236 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_cq.c @@ -0,0 +1,195 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include + +#include "mlx4_en.h" + +static void mlx4_en_cq_event(struct mlx4_cq *cq, enum mlx4_event event) +{ + return; +} + + +int mlx4_en_create_cq(struct mlx4_en_priv *priv, + struct mlx4_en_cq *cq, + int entries, int ring, enum cq_type mode) +{ + struct mlx4_en_dev *mdev = priv->mdev; + int err; + + cq->size = entries; + cq->buf_size = cq->size * mdev->dev->caps.cqe_size; + + cq->ring = ring; + cq->is_tx = mode; + + err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres, + cq->buf_size, 2 * PAGE_SIZE); + if (err) + return err; + + err = mlx4_en_map_buffer(&cq->wqres.buf); + if (err) + mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); + else + cq->buf = (struct mlx4_cqe *) cq->wqres.buf.direct.buf; + + return err; +} + +int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, + int cq_idx) +{ + struct mlx4_en_dev *mdev = priv->mdev; + int err = 0; + char name[25]; + + cq->dev = mdev->pndev[priv->port]; + cq->mcq.set_ci_db = cq->wqres.db.db; + cq->mcq.arm_db = cq->wqres.db.db + 1; + *cq->mcq.set_ci_db = 0; + *cq->mcq.arm_db = 0; + memset(cq->buf, 0, cq->buf_size); + + if (cq->is_tx == RX) { + if (mdev->dev->caps.comp_pool) { + if (!cq->vector) { + sprintf(name, "%s-%d", priv->dev->name, + cq->ring); + /* Set IRQ for specific name (per ring) */ + if (mlx4_assign_eq(mdev->dev, name, &cq->vector)) { + cq->vector = (cq->ring + 1 + priv->port) + % mdev->dev->caps.num_comp_vectors; + mlx4_warn(mdev, "Failed Assigning an EQ to " + "%s ,Falling back to legacy EQ's\n", + name); + } + } + } else { + cq->vector = (cq->ring + 1 + priv->port) % + mdev->dev->caps.num_comp_vectors; + } + } else { + /* For TX we use the same irq per + ring we assigned for the RX */ + struct mlx4_en_cq *rx_cq; + + cq_idx = cq_idx % priv->rx_ring_num; + rx_cq = &priv->rx_cq[cq_idx]; + cq->vector = rx_cq->vector; + } + + /* In ESXi we move adding napi to mlx4_en_init_netdev function */ +#ifndef __VMKERNEL_MODULE__ + if (cq->is_tx) + netif_napi_add(cq->dev, &cq->napi, + mlx4_en_poll_tx_cq, MLX4_EN_TX_BUDGET); + else + netif_napi_add(cq->dev, &cq->napi, + mlx4_en_poll_rx_cq, MLX4_EN_RX_BUDGET); +#endif /* __VMKERNEL_MODULE__ */ + + if (!cq->is_tx) + cq->size = priv->rx_ring[cq->ring].actual_size; + + err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt, &mdev->priv_uar, + cq->wqres.db.dma, &cq->mcq, cq->vector, 0); + if (err) + return err; + + cq->mcq.comp = cq->is_tx ? mlx4_en_tx_irq : mlx4_en_rx_irq; + cq->mcq.event = mlx4_en_cq_event; + + return 0; +} + +void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq) +{ + struct mlx4_en_dev *mdev = priv->mdev; + + mlx4_en_unmap_buffer(&cq->wqres.buf); + mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); + if (priv->mdev->dev->caps.comp_pool && cq->vector) + mlx4_release_eq(priv->mdev->dev, cq->vector); + cq->vector = 0; + cq->buf_size = 0; + cq->buf = NULL; +} + +void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq) +{ + /* In ESXi we move deleting napi to mlx4_en_destroy_netdev function */ +#ifndef __VMKERNEL_MODULE__ + netif_napi_del(&cq->napi); +#endif /* __VMKERNEL_MODULE__ */ + + mlx4_cq_free(priv->mdev->dev, &cq->mcq); +} + +/* Set rx cq moderation parameters */ +int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq) +{ + return mlx4_cq_modify(priv->mdev->dev, &cq->mcq, + cq->moder_cnt, cq->moder_time); +} + +int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq) +{ + mlx4_cq_arm(&cq->mcq, MLX4_CQ_DB_REQ_NOT, priv->mdev->uar_map, + &priv->mdev->uar_lock); + + return 0; +} + +#ifdef __VMKERNEL_MODULE__ +void mlx4_en_add_napi_to_all_cq(struct mlx4_en_priv *priv) +{ + int i; + struct mlx4_en_cq *cq; + + for (i = 0; i < priv->rx_ring_num; i++) { + cq = &priv->rx_cq[i]; + if (priv->use_rx_frags) + netif_napi_add(priv->dev, &cq->napi, + mlx4_en_poll_rx_cq, MLX4_EN_RX_BUDGET); + else + netif_napi_add(priv->dev, &cq->napi, + mlx4_en_poll_rx_cq_skb, MLX4_EN_RX_BUDGET); + } + + for (i = 0; i < priv->tx_ring_num; i++) { + cq = &priv->tx_cq[i]; + netif_napi_add(priv->dev, &cq->napi, + mlx4_en_poll_tx_cq, MLX4_EN_TX_BUDGET); + } +} + +void mlx4_en_delete_napi_from_all_cq(struct mlx4_en_priv *priv) +{ + int i; + struct mlx4_en_cq *cq; + + for (i = 0; i < priv->tx_ring_num; i++) { + cq = &priv->tx_cq[i]; + netif_napi_del(&cq->napi); + } + + for (i = 0; i < priv->rx_ring_num; i++) { + cq = &priv->rx_cq[i]; + netif_napi_del(&cq->napi); + } +} +#endif /* __VMKERNEL_MODULE__ */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_ethtool.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_ethtool.c new file mode 100755 index 0000000..3c2ebc7 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_ethtool.c @@ -0,0 +1,721 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include + +#include "mlx4_en.h" +#include "en_port.h" + + +static void +mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + + strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver)); + strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")", + sizeof(drvinfo->version)); + snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), + "%d.%d.%d", + (u16) (mdev->dev->caps.fw_ver >> 32), + (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff), + (u16) (mdev->dev->caps.fw_ver & 0xffff)); + strlcpy(drvinfo->bus_info, pci_name(mdev->dev->pdev), + sizeof(drvinfo->bus_info)); + drvinfo->n_stats = 0; + drvinfo->regdump_len = 0; + drvinfo->eedump_len = 0; +} + +static const char main_strings[][ETH_GSTRING_LEN] = { + "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors", + "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions", + "rx_length_errors", "rx_over_errors", "rx_crc_errors", + "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors", + "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors", + "tx_heartbeat_errors", "tx_window_errors", + + /* port statistics */ + "tso_packets", + "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed", + "rx_csum_good", "rx_csum_none", "tx_chksum_offload", + + /* packet statistics */ + "broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3", + "rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0", + "tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5", + "tx_prio_6", "tx_prio_7", +}; +#define NUM_MAIN_STATS 21 +#define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS) + +static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= { + "Interupt Test", + "Link Test", + "Speed Test", + "Register Test", + "Loopback Test", +}; + +static u32 mlx4_en_get_msglevel(struct net_device *dev) +{ + return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable; +} + +static void mlx4_en_set_msglevel(struct net_device *dev, u32 val) +{ + ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val; +} + +static void mlx4_en_get_wol(struct net_device *netdev, + struct ethtool_wolinfo *wol) +{ + struct mlx4_en_priv *priv = netdev_priv(netdev); + int err = 0; + u64 config = 0; + u64 mask; + + if ((priv->port < 1) || (priv->port > 2)) { + en_err(priv, "Failed to get WoL information\n"); + return; + } + + mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 : + MLX4_DEV_CAP_FLAG_WOL_PORT2; + + if (!(priv->mdev->dev->caps.flags & mask)) { + wol->supported = 0; + wol->wolopts = 0; + return; + } + + err = mlx4_wol_read(priv->mdev->dev, &config, priv->port); + if (err) { + en_err(priv, "Failed to get WoL information\n"); + return; + } + + if (config & MLX4_EN_WOL_MAGIC) + wol->supported = WAKE_MAGIC; + else + wol->supported = 0; + + if (config & MLX4_EN_WOL_ENABLED) + wol->wolopts = WAKE_MAGIC; + else + wol->wolopts = 0; +} + +static int mlx4_en_set_wol(struct net_device *netdev, + struct ethtool_wolinfo *wol) +{ + struct mlx4_en_priv *priv = netdev_priv(netdev); + u64 config = 0; + int err = 0; + u64 mask; + + if ((priv->port < 1) || (priv->port > 2)) + return -EOPNOTSUPP; + + mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 : + MLX4_DEV_CAP_FLAG_WOL_PORT2; + + if (!(priv->mdev->dev->caps.flags & mask)) + return -EOPNOTSUPP; + + if (wol->supported & ~WAKE_MAGIC) + return -EINVAL; + + err = mlx4_wol_read(priv->mdev->dev, &config, priv->port); + if (err) { + en_err(priv, "Failed to get WoL info, unable to modify\n"); + return err; + } + + if (wol->wolopts & WAKE_MAGIC) { + config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED | + MLX4_EN_WOL_MAGIC; + } else { + config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC); + config |= MLX4_EN_WOL_DO_MODIFY; + } + + err = mlx4_wol_write(priv->mdev->dev, config, priv->port); + if (err) + en_err(priv, "Failed to set WoL information\n"); + + return err; +} + +static int mlx4_en_get_sset_count(struct net_device *dev, int sset) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + int bit_count = hweight64(priv->stats_bitmap); + + switch (sset) { + case ETH_SS_STATS: + return (priv->stats_bitmap ? bit_count : NUM_ALL_STATS) + + (priv->tx_ring_num + priv->rx_ring_num) * 2; +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + case ETH_SS_TEST: + return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags + & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2; +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + default: + return -EOPNOTSUPP; + } +} + +static void mlx4_en_get_ethtool_stats(struct net_device *dev, + struct ethtool_stats *stats, uint64_t *data) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + int index = 0; + int i, j = 0; + + spin_lock_bh(&priv->stats_lock); + + if (!(priv->stats_bitmap)) { + for (i = 0; i < NUM_MAIN_STATS; i++) + data[index++] = + ((unsigned long *) &priv->stats)[i]; + for (i = 0; i < NUM_PORT_STATS; i++) + data[index++] = + ((unsigned long *) &priv->port_stats)[i]; + for (i = 0; i < NUM_PKT_STATS; i++) + data[index++] = + ((unsigned long *) &priv->pkstats)[i]; + } else { + for (i = 0; i < NUM_MAIN_STATS; i++) { + if ((priv->stats_bitmap >> j) & 1) + data[index++] = + ((unsigned long *) &priv->stats)[i]; + j++; + } + for (i = 0; i < NUM_PORT_STATS; i++) { + if ((priv->stats_bitmap >> j) & 1) + data[index++] = + ((unsigned long *) &priv->port_stats)[i]; + j++; + } + } + for (i = 0; i < priv->tx_ring_num; i++) { + data[index++] = priv->tx_ring[i].packets; + data[index++] = priv->tx_ring[i].bytes; + } + for (i = 0; i < priv->rx_ring_num; i++) { + data[index++] = priv->rx_ring[i].packets; + data[index++] = priv->rx_ring[i].bytes; + } + spin_unlock_bh(&priv->stats_lock); + +} + +#ifndef __VMKERNEL_MODULE__ +static void mlx4_en_self_test(struct net_device *dev, + struct ethtool_test *etest, u64 *buf) +{ + mlx4_en_ex_selftest(dev, &etest->flags, buf); +} +#endif /* __VMKERNEL_MODULE__ */ + +static u32 mlx4_en_get_link(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + return priv->port_state.link_state; +} + +static void mlx4_en_get_strings(struct net_device *dev, + uint32_t stringset, uint8_t *data) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + int index = 0; + int i; + + switch (stringset) { +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + case ETH_SS_TEST: + for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++) + strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]); + if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) + for (; i < MLX4_EN_NUM_SELF_TEST; i++) + strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]); + break; +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + + case ETH_SS_STATS: + /* Add main counters */ + if (!priv->stats_bitmap) { + for (i = 0; i < NUM_MAIN_STATS; i++) + strcpy(data + (index++) * ETH_GSTRING_LEN, + main_strings[i]); + for (i = 0; i < NUM_PORT_STATS; i++) + strcpy(data + (index++) * ETH_GSTRING_LEN, + main_strings[i + + NUM_MAIN_STATS]); + for (i = 0; i < NUM_PKT_STATS; i++) + strcpy(data + (index++) * ETH_GSTRING_LEN, + main_strings[i + + NUM_MAIN_STATS + + NUM_PORT_STATS]); + } else + for (i = 0; i < NUM_MAIN_STATS + NUM_PORT_STATS; i++) { + if ((priv->stats_bitmap >> i) & 1) { + strcpy(data + + (index++) * ETH_GSTRING_LEN, + main_strings[i]); + } + if (!(priv->stats_bitmap >> i)) + break; + } + for (i = 0; i < priv->tx_ring_num; i++) { + sprintf(data + (index++) * ETH_GSTRING_LEN, + "tx%d_packets", i); + sprintf(data + (index++) * ETH_GSTRING_LEN, + "tx%d_bytes", i); + } + for (i = 0; i < priv->rx_ring_num; i++) { + sprintf(data + (index++) * ETH_GSTRING_LEN, + "rx%d_packets", i); + sprintf(data + (index++) * ETH_GSTRING_LEN, + "rx%d_bytes", i); + } + break; + } +} + +static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + int trans_type; + + cmd->autoneg = AUTONEG_DISABLE; + + cmd->supported = SUPPORTED_1000baseT_Full + |SUPPORTED_10000baseT_Full; + + cmd->advertising = ADVERTISED_1000baseT_Full + |ADVERTISED_10000baseT_Full; + +#ifdef __MLNX_VMKERNEL_40G_SPEED_SUPPORT__ + /* SUPPORTED_1000baseT_Half isn't supported */ + cmd->supported |= SUPPORTED_1000baseKX_Full + |SUPPORTED_10000baseKX4_Full + |SUPPORTED_10000baseKR_Full + |SUPPORTED_10000baseR_FEC + |SUPPORTED_40000baseKR4_Full + |SUPPORTED_40000baseCR4_Full + |SUPPORTED_40000baseSR4_Full + |SUPPORTED_40000baseLR4_Full; + + /* ADVERTISED_1000baseT_Half isn't advertised */ + cmd->advertising |= ADVERTISED_1000baseKX_Full + |ADVERTISED_10000baseKX4_Full + |ADVERTISED_10000baseKR_Full + |ADVERTISED_10000baseR_FEC + |ADVERTISED_40000baseKR4_Full + |ADVERTISED_40000baseCR4_Full + |ADVERTISED_40000baseSR4_Full + |ADVERTISED_40000baseLR4_Full; +#endif /* __MLNX_VMKERNEL_40G_SPEED_SUPPORT__ */ + + trans_type = priv->port_state.transciver; + if (priv->port_state.link_state) { + ethtool_cmd_speed_set(cmd, priv->port_state.link_speed); + cmd->duplex = DUPLEX_FULL; + } else { + ethtool_cmd_speed_set(cmd, -1); + cmd->duplex = -1; + } + + if (trans_type > 0 && trans_type <= 0xC) { + cmd->port = PORT_FIBRE; + cmd->transceiver = XCVR_EXTERNAL; + cmd->supported |= SUPPORTED_FIBRE; + cmd->advertising |= ADVERTISED_FIBRE; + } else if (trans_type == 0x80 || trans_type == 0) { + cmd->port = PORT_TP; + cmd->transceiver = XCVR_INTERNAL; + cmd->supported |= SUPPORTED_TP; + cmd->advertising |= ADVERTISED_TP; + } else { + cmd->port = -1; + cmd->transceiver = -1; + } + return 0; +} + +static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) +{ +#ifndef __VMKERNEL_MODULE__ + if ((cmd->autoneg == AUTONEG_ENABLE) || + (ethtool_cmd_speed(cmd) != SPEED_10000) || + (cmd->duplex != DUPLEX_FULL)) + return -EINVAL; +#endif /* NOT __VMKERNEL_MODULE__ */ + + /* Nothing to change */ + return 0; +} + +#ifdef __VMKERNEL_MODULE__ +static u32 mlx4_en_get_tso(struct net_device *dev) +{ + return (dev->features & NETIF_F_TSO) != 0; +} + +static u32 mlx4_en_get_rx_csum(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + return priv->rx_csum; +} + +static int mlx4_en_set_rx_csum(struct net_device *dev, u32 data) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + priv->rx_csum = !!data; + return 0; +} +#endif /* __VMKERNEL_MODULE__ */ + +static int mlx4_en_get_coalesce(struct net_device *dev, + struct ethtool_coalesce *coal) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + coal->tx_coalesce_usecs = priv->tx_usecs; + coal->tx_max_coalesced_frames = priv->tx_frames; + coal->rx_coalesce_usecs = priv->rx_usecs; + coal->rx_max_coalesced_frames = priv->rx_frames; + + coal->pkt_rate_low = priv->pkt_rate_low; + coal->rx_coalesce_usecs_low = priv->rx_usecs_low; + coal->pkt_rate_high = priv->pkt_rate_high; + coal->rx_coalesce_usecs_high = priv->rx_usecs_high; + coal->rate_sample_interval = priv->sample_interval; + coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal; + return 0; +} + +static int mlx4_en_set_coalesce(struct net_device *dev, + struct ethtool_coalesce *coal) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + int i, err = 0; + + mutex_lock(&mdev->state_lock); + if (!(mdev->device_up && priv->port_up)) + goto out; + +#ifdef __VMKERNEL_MODULE__ + priv->rx_frames = (coal->rx_max_coalesced_frames == + MLX4_EN_AUTO_CONF) ? + MLX4_EN_RX_COAL_TARGET / + dev->mtu + 1: + coal->rx_max_coalesced_frames; +#else + priv->rx_frames = (coal->rx_max_coalesced_frames == + MLX4_EN_AUTO_CONF) ? + MLX4_EN_RX_COAL_TARGET : + coal->rx_max_coalesced_frames; +#endif /* __VMKERNEL_MODULE__ */ + priv->rx_usecs = (coal->rx_coalesce_usecs == + MLX4_EN_AUTO_CONF) ? + MLX4_EN_RX_COAL_TIME : + coal->rx_coalesce_usecs; + + /* Setting TX coalescing parameters */ + if (coal->tx_coalesce_usecs != priv->tx_usecs || + coal->tx_max_coalesced_frames != priv->tx_frames) { + priv->tx_usecs = coal->tx_coalesce_usecs; + priv->tx_frames = coal->tx_max_coalesced_frames; + for (i = 0; i < priv->tx_ring_num; i++) { + priv->tx_cq[i].moder_cnt = priv->tx_frames; + priv->tx_cq[i].moder_time = priv->tx_usecs; + if (mlx4_en_set_cq_moder(priv, &priv->tx_cq[i])) { + en_warn(priv, "Failed changing moderation " + "for TX cq %d\n", i); + } + } + } + + /* Set adaptive coalescing params */ + priv->pkt_rate_low = coal->pkt_rate_low; + priv->rx_usecs_low = coal->rx_coalesce_usecs_low; + priv->pkt_rate_high = coal->pkt_rate_high; + priv->rx_usecs_high = coal->rx_coalesce_usecs_high; + priv->sample_interval = coal->rate_sample_interval; + priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce; + if (priv->adaptive_rx_coal) + goto out; + + for (i = 0; i < priv->rx_ring_num; i++) { + priv->rx_cq[i].moder_cnt = priv->rx_frames; + priv->rx_cq[i].moder_time = priv->rx_usecs; + priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; + err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]); + if (err) + goto out; + } + +out: + mutex_unlock(&mdev->state_lock); + return err; +} + +static int mlx4_en_set_pauseparam(struct net_device *dev, + struct ethtool_pauseparam *pause) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + int err; + + priv->prof->tx_pause = pause->tx_pause != 0; + priv->prof->rx_pause = pause->rx_pause != 0; + err = mlx4_SET_PORT_general(mdev->dev, priv->port, + priv->rx_skb_size + ETH_FCS_LEN, + priv->prof->tx_pause, + priv->prof->tx_ppp, + priv->prof->rx_pause, + priv->prof->rx_ppp); + if (err) + en_err(priv, "Failed setting pause params\n"); + + return err; +} + +static void mlx4_en_get_pauseparam(struct net_device *dev, + struct ethtool_pauseparam *pause) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + pause->tx_pause = priv->prof->tx_pause; + pause->rx_pause = priv->prof->rx_pause; +} + +static int mlx4_en_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *param) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + u32 rx_size, tx_size; + int port_up = 0; + int err = 0; + int i; + + if (param->rx_jumbo_pending || param->rx_mini_pending) + return -EINVAL; + + rx_size = roundup_pow_of_two(param->rx_pending); + rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE); + rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE); + tx_size = roundup_pow_of_two(param->tx_pending); + tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE); + tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE); + + mutex_lock(&mdev->state_lock); + if (rx_size == (priv->port_up ? priv->rx_ring[0].actual_size : + priv->rx_ring[0].size) && + tx_size == priv->tx_ring[0].size) + goto out; + + if (priv->port_up) { + port_up = 1; + mlx4_en_stop_port(dev); + } + + mlx4_en_free_resources(priv); + + priv->prof->tx_ring_size = tx_size; + priv->prof->rx_ring_size = rx_size; + + err = mlx4_en_alloc_resources(priv); + if (err) { + en_err(priv, "Failed reallocating port resources\n"); + goto out; + } + if (port_up) { + err = mlx4_en_start_port(dev); + if (err) { + en_err(priv, "Failed starting port\n"); + goto out; + } + + for (i = 0; i < priv->rx_ring_num; i++) { + priv->rx_cq[i].moder_cnt = priv->rx_frames; + priv->rx_cq[i].moder_time = priv->rx_usecs; + priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; + err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]); + if (err) + goto out; + } + } +out: + mutex_unlock(&mdev->state_lock); + return err; +} + +static void mlx4_en_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *param) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + memset(param, 0, sizeof(*param)); + param->rx_max_pending = MLX4_EN_MAX_RX_SIZE; + param->tx_max_pending = MLX4_EN_MAX_TX_SIZE; + param->rx_pending = priv->port_up ? + priv->rx_ring[0].actual_size : priv->rx_ring[0].size; + param->tx_pending = priv->tx_ring[0].size; +} + +#ifdef __VMKERNEL_ETHTOOL_RSS_NUM_RINGS_SUPPORT__ +static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + return priv->rx_ring_num; +} + +static int mlx4_en_get_rxfh_indir(struct net_device *dev, u32 *ring_index) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_rss_map *rss_map = &priv->rss_map; + int rss_rings; + size_t n = priv->rx_ring_num; + int err = 0; + + rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num; + + while (n--) { + ring_index[n] = rss_map->qps[n % rss_rings].qpn - + rss_map->base_qpn; + } + + return err; +} + +static int mlx4_en_set_rxfh_indir(struct net_device *dev, + const u32 *ring_index) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + int port_up = 0; + int err = 0; + int i; + int rss_rings = 0; + + /* Calculate RSS table size and make sure flows are spread evenly + * between rings + */ + for (i = 0; i < priv->rx_ring_num; i++) { + if (i > 0 && !ring_index[i] && !rss_rings) + rss_rings = i; + + if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num))) + return -EINVAL; + } + + if (!rss_rings) + rss_rings = priv->rx_ring_num; + + /* RSS table size must be an order of 2 */ + if (!is_power_of_2(rss_rings)) + return -EINVAL; + + mutex_lock(&mdev->state_lock); + if (priv->port_up) { + port_up = 1; + mlx4_en_stop_port(dev); + } + + priv->prof->rss_rings = rss_rings; + + if (port_up) { + err = mlx4_en_start_port(dev); + if (err) + en_err(priv, "Failed starting port\n"); + } + + mutex_unlock(&mdev->state_lock); + return err; +} + +static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, + u32 *rule_locs) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + int err = 0; + + switch (cmd->cmd) { + case ETHTOOL_GRXRINGS: + cmd->data = priv->rx_ring_num; + break; + default: + err = -EOPNOTSUPP; + break; + } + + return err; +} +#endif /* __VMKERNEL_ETHTOOL_RSS_NUM_RINGS_SUPPORT__ */ + +#ifndef __VMKERNEL_MODULE__ +const struct ethtool_ops mlx4_en_ethtool_ops = { +#else +struct ethtool_ops mlx4_en_ethtool_ops = { +#endif /* NOT __VMKERNEL_MODULE__ */ + .get_drvinfo = mlx4_en_get_drvinfo, + .get_settings = mlx4_en_get_settings, + .set_settings = mlx4_en_set_settings, +#ifdef __VMKERNEL_MODULE__ +#ifdef NETIF_F_TSO + .get_tso = mlx4_en_get_tso, +#endif /* NETIF_F_TSO */ + .get_sg = ethtool_op_get_sg, + .get_rx_csum = mlx4_en_get_rx_csum, + .set_rx_csum = mlx4_en_set_rx_csum, + .get_tx_csum = ethtool_op_get_tx_csum, +#endif /* __VMKERNEL_MODULE__ */ + .get_link = mlx4_en_get_link, + .get_strings = mlx4_en_get_strings, + .get_sset_count = mlx4_en_get_sset_count, + .get_ethtool_stats = mlx4_en_get_ethtool_stats, +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + .self_test = mlx4_en_self_test, +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + .get_wol = mlx4_en_get_wol, + .set_wol = mlx4_en_set_wol, + .get_msglevel = mlx4_en_get_msglevel, + .set_msglevel = mlx4_en_set_msglevel, + .get_coalesce = mlx4_en_get_coalesce, + .set_coalesce = mlx4_en_set_coalesce, + .get_pauseparam = mlx4_en_get_pauseparam, + .set_pauseparam = mlx4_en_set_pauseparam, + .get_ringparam = mlx4_en_get_ringparam, + .set_ringparam = mlx4_en_set_ringparam, +#ifdef __VMKERNEL_ETHTOOL_RSS_NUM_RINGS_SUPPORT__ + .get_rxnfc = mlx4_en_get_rxnfc, + .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size, + .get_rxfh_indir = mlx4_en_get_rxfh_indir, + .set_rxfh_indir = mlx4_en_set_rxfh_indir, +#endif /* __VMKERNEL_ETHTOOL_RSS_NUM_RINGS_SUPPORT__ */ +}; + + + + + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_main.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_main.c new file mode 100755 index 0000000..8666076 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_main.c @@ -0,0 +1,460 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#ifdef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "mlx4_en.h" + +MODULE_AUTHOR("Liran Liss, Yevgeny Petrilin"); +MODULE_DESCRIPTION("Mellanox ConnectX HCA Ethernet driver"); +MODULE_LICENSE("GPL"); +MODULE_VERSION(DRV_VERSION " ("DRV_RELDATE")"); + +static const char mlx4_en_version[] = + DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v" + DRV_VERSION " (" DRV_RELDATE ")\n"; + +#define MLX4_EN_PARM_INT(X, def_val, desc) \ + static unsigned int X = def_val;\ + module_param(X , uint, 0444); \ + MODULE_PARM_DESC(X, desc); + + +/* + * Device scope module parameters + */ + +/* Enable RSS UDP traffic */ +MLX4_EN_PARM_INT(udp_rss, 1, + "Enable RSS for incomming UDP traffic or disabled (0)"); + +/* Priority pausing */ +MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." + " Per priority bit mask"); +MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." + " Per priority bit mask"); + +#ifdef __VMKERNEL_MODULE__ +MLX4_EN_PARM_INT(use_rx_frags, 0, "Enable RX frags or disabled (0), default: 0"); +#endif /* __VMKERNEL_MODULE__ */ + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +MLX4_EN_PARM_INT(netq, 1, + "Enable netqueue or disabled (0), default: 1"); +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ +MLX4_EN_PARM_INT(netq_num_rings_per_rss, DEFAULT_NETQ_NUM_RINGS_PER_RSS, + "Number of rings per RSS netq\n" + " valid values: [0, 2, 4]\n" + " default: "__stringify(DEFAULT_NETQ_NUM_RINGS_PER_RSS)); +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ +#endif /* NET QUEUE */ + +#ifndef __VMKERNEL_MODULE__ +int en_print(const char *level, const struct mlx4_en_priv *priv, + const char *format, ...) +{ + va_list args; + struct va_format vaf; + int i; + + va_start(args, format); + + vaf.fmt = format; + vaf.va = &args; + if (priv->registered) + i = printk("%s%s: %s: %pV", + level, DRV_NAME, priv->dev->name, &vaf); + else + i = printk("%s%s: %s: Port %d: %pV", + level, DRV_NAME, dev_name(&priv->mdev->pdev->dev), + priv->port, &vaf); + va_end(args); + + return i; +} +#endif /* NOT __VMKERNEL_MODULE__ */ + +static void mlx4_en_validate_params(struct mlx4_en_dev *mdev) +{ +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ + if (!netq) { + /* not using netq so no reason for netq RSS */ + mlx4_warn(mdev, "netq is disabled, setting netq_num_rings_per_rss to 0\n"); + netq_num_rings_per_rss = 0; + } else { + if (netq_num_rings_per_rss > MAX_NETQ_NUM_RINGS_PER_RSS) { + mlx4_warn(mdev, "Unable to set netq_num_rings_per_rss to = %u " + "since it is too high, Using %u instead\n", + netq_num_rings_per_rss, MAX_NETQ_NUM_RINGS_PER_RSS); + netq_num_rings_per_rss = MAX_NETQ_NUM_RINGS_PER_RSS; + } else if (netq_num_rings_per_rss < MIN_NETQ_NUM_RINGS_PER_RSS) { + mlx4_warn(mdev, "Unable to set netq_num_rings_per_rss to = %u " + "since it is too low, Using %u instead\n", + netq_num_rings_per_rss, MIN_NETQ_NUM_RINGS_PER_RSS); + netq_num_rings_per_rss = MIN_NETQ_NUM_RINGS_PER_RSS; + } + + /* netq_num_rings_per_rss must be even */ + if ((netq_num_rings_per_rss % 2) != 0) { + --netq_num_rings_per_rss; + mlx4_warn(mdev, "netq_num_rings_per_rss must be of even value, " + "setting it to %u\n", netq_num_rings_per_rss); + } + + /* netq_num_rings_per_rss must be power of 2 */ + if ((netq_num_rings_per_rss != 0) && (!is_power_of_2(netq_num_rings_per_rss))) { + mlx4_warn(mdev, "netq_num_rings_per_rss must be power of 2 " + "rounding down to %lu\n", rounddown_pow_of_two(netq_num_rings_per_rss)); + netq_num_rings_per_rss = rounddown_pow_of_two(netq_num_rings_per_rss); + } + } +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ +#endif /* NET QUEUE */ +} + +static u32 mlx4_en_calc_rx_ring_num(struct mlx4_en_dev *mdev) +{ + struct mlx4_dev *dev = mdev->dev; + u32 rx_ring_num; + + if (!dev->caps.comp_pool) + rx_ring_num = dev->caps.num_comp_vectors; + else { + rx_ring_num = dev->caps.comp_pool / dev->caps.num_ports; + rx_ring_num = min_t(int, rx_ring_num, MAX_MSIX_P_PORT); + } + rx_ring_num = min_t(int, rx_ring_num, MAX_RX_RINGS); + rx_ring_num = max_t(int, rx_ring_num, MIN_RX_RINGS); + rx_ring_num = rounddown_pow_of_two(rx_ring_num); + + return rx_ring_num; +} + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ +static u32 mlx4_en_calc_rings_per_rss(struct mlx4_en_dev *mdev, + u32 total_rx_ring, + u32 num_rss_queue, + u32 requested) +{ + u32 granted = requested; + + if (!requested) + goto out; + + if (!num_rss_queue) { + granted = 0; + goto out; + } + + /* 1 default ring + 1 regular ring + requested RSS rings */ + if (total_rx_ring < (2 + num_rss_queue * requested)) { + + mlx4_warn(mdev, "not enough free EQs to open netq RSS with " + "%u rings per RSS\n", requested); + + /* best effort to open with as many RSS rings as possible */ + while (requested > 2) { + requested = rounddown_pow_of_two(requested-1); + + /* 1 default ring + 1 regular ring + requested RSS rings */ + if (total_rx_ring >= (2 + num_rss_queue * requested)) { + mlx4_warn(mdev, "Setting netq_num_rings_per_rss to %u\n", + requested); + granted = requested; + goto out; + } + } + + mlx4_warn(mdev, "disabling netq RSS\n"); + granted = 0; + } + +out: + return granted; +} +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ +#endif /* NET QUEUE */ + +static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) +{ + struct mlx4_en_profile *params = &mdev->profile; + u32 rx_ring_num; + int i; + + mlx4_en_validate_params(mdev); + + rx_ring_num = mlx4_en_calc_rx_ring_num(mdev); + + params->udp_rss = udp_rss; + if (params->udp_rss && !(mdev->dev->caps.flags + & MLX4_DEV_CAP_FLAG_UDP_RSS)) { + mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); + params->udp_rss = 0; + } + for (i = 1; i <= MLX4_MAX_PORTS; i++) { + params->prof[i].rx_pause = 1; + params->prof[i].rx_ppp = pfcrx; + params->prof[i].tx_pause = 1; + params->prof[i].tx_ppp = pfctx; + params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE; + params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE; + params->prof[i].tx_ring_num = MLX4_EN_NUM_TX_RINGS + + (!!pfcrx) * MLX4_EN_NUM_PPP_RINGS; + params->prof[i].rss_rings = 0; + params->prof[i].rx_ring_num = rx_ring_num; + +#ifdef __VMKERNEL_MODULE__ + params->prof[i].use_rx_frags = use_rx_frags; +#endif /* __VMKERNEL_MODULE__ */ + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + params->prof[i].netq = netq; + params->prof[i].netq_num_rss_queue = 0; + params->prof[i].netq_num_rings_per_rss = 0; + + if (params->prof[i].netq & (!(mdev->dev->caps.flags & + MLX4_DEV_CAP_FLAG_VEP_UC_STEER))) { + mlx4_warn(mdev, "netq mode is not supported on this device\n"); + params->prof[i].netq = 0; + } +#endif /* NET QUEUE */ + } + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ + u32 rings_per_rss = mlx4_en_calc_rings_per_rss(mdev, rx_ring_num, + DEFAULT_NETQ_NUM_RSS_Q, netq_num_rings_per_rss); + + if (rings_per_rss) { + for (i = 1; i <= MLX4_MAX_PORTS; i++) { + if (params->prof[i].netq) { + params->prof[i].netq_num_rss_queue = DEFAULT_NETQ_NUM_RSS_Q; + params->prof[i].netq_num_rings_per_rss = rings_per_rss; + } + } + } +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ +#endif /* NET QUEUE */ + + return 0; +} + +static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port) +{ + struct mlx4_en_dev *endev = ctx; + + return endev->pndev[port]; +} + +static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, + enum mlx4_dev_event event, unsigned long port) +{ + struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; + struct mlx4_en_priv *priv; + + /* check that port param is not a pointer */ + if (port != (port & (unsigned long)0x0FFFF)) + return; + + switch (event) { + case MLX4_DEV_EVENT_PORT_UP: + /* To prevent races, we poll the link state in a separate + task rather than changing it here */ + if (!mdev->pndev[port]) + return; + + priv = netdev_priv(mdev->pndev[port]); + priv->link_state = 1; + queue_work(mdev->workqueue, &priv->linkstate_task); + break; + + case MLX4_DEV_EVENT_PORT_DOWN: + /* To prevent races, we poll the link state in a separate + task rather than changing it here */ + if (!mdev->pndev[port]) + return; + + priv = netdev_priv(mdev->pndev[port]); + priv->link_state = 0; + queue_work(mdev->workqueue, &priv->linkstate_task); + break; + + case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: +#ifndef __VMKERNEL_MODULE__ + mlx4_err(mdev, "Internal error detected, restarting device\n"); +#else /* __VMKERNEL_MODULE__ */ + mlx4_err(mdev, "Internal error detected, please reload the driver manually\n"); +#endif /* __VMKERNEL_MODULE__ */ + break; + + default: + mlx4_warn(mdev, "Unhandled event: %d\n", event); + } +} + +static void mlx4_en_remove(struct mlx4_dev *dev, void *endev_ptr) +{ + struct mlx4_en_dev *mdev = endev_ptr; + int i; + + mutex_lock(&mdev->state_lock); + mdev->device_up = false; + mutex_unlock(&mdev->state_lock); + + mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) + if (mdev->pndev[i]) + mlx4_en_destroy_netdev(mdev->pndev[i]); + + flush_workqueue(mdev->workqueue); + destroy_workqueue(mdev->workqueue); + mlx4_mr_free(dev, &mdev->mr); + iounmap(mdev->uar_map); + mlx4_uar_free(dev, &mdev->priv_uar); + mlx4_pd_free(dev, mdev->priv_pdn); + kfree(mdev); +} + +static void *mlx4_en_add(struct mlx4_dev *dev) +{ + struct mlx4_en_dev *mdev; + int i; + int err; + + printk_once(KERN_INFO "%s", mlx4_en_version); + + mdev = kzalloc(sizeof *mdev, GFP_KERNEL); + if (!mdev) { + dev_err(&dev->pdev->dev, "Device struct alloc failed, " + "aborting.\n"); + err = -ENOMEM; + goto err_free_res; + } + + if (mlx4_pd_alloc(dev, &mdev->priv_pdn)) + goto err_free_dev; + + if (mlx4_uar_alloc(dev, &mdev->priv_uar)) + goto err_pd; + + mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT, + PAGE_SIZE); + if (!mdev->uar_map) + goto err_uar; + spin_lock_init(&mdev->uar_lock); + + mdev->dev = dev; + mdev->dma_device = &(dev->pdev->dev); + mdev->pdev = dev->pdev; + mdev->device_up = false; + + mdev->LSO_support = !!(dev->caps.flags & (1 << 15)); + if (!mdev->LSO_support) + mlx4_warn(mdev, "LSO not supported, please upgrade to later " + "FW version to enable LSO\n"); + + if (mlx4_mr_alloc(mdev->dev, mdev->priv_pdn, 0, ~0ull, + MLX4_PERM_LOCAL_WRITE | MLX4_PERM_LOCAL_READ, + 0, 0, &mdev->mr)) { + mlx4_err(mdev, "Failed allocating memory region\n"); + goto err_map; + } + if (mlx4_mr_enable(mdev->dev, &mdev->mr)) { + mlx4_err(mdev, "Failed enabling memory region\n"); + goto err_mr; + } + + /* Build device profile according to supplied module parameters */ + err = mlx4_en_get_profile(mdev); + if (err) { + mlx4_err(mdev, "Bad module parameters, aborting.\n"); + goto err_mr; + } + + /* Configure which ports to start according to module parameters */ + mdev->port_cnt = 0; + mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) + mdev->port_cnt++; + + /* Create our own workqueue for reset/multicast tasks + * Note: we cannot use the shared workqueue because of deadlocks caused + * by the rtnl lock */ + mdev->workqueue = create_singlethread_workqueue("mlx4_en"); + if (!mdev->workqueue) { + err = -ENOMEM; + goto err_mr; + } + + /* At this stage all non-port specific tasks are complete: + * mark the card state as up */ + mutex_init(&mdev->state_lock); + mdev->device_up = true; + + /* Setup ports */ + + /* Create a netdev for each port */ + mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { + mlx4_info(mdev, "Activating port:%d\n", i); + if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i])) + mdev->pndev[i] = NULL; + } + return mdev; + +err_mr: + mlx4_mr_free(dev, &mdev->mr); +err_map: + if (!mdev->uar_map) + iounmap(mdev->uar_map); +err_uar: + mlx4_uar_free(dev, &mdev->priv_uar); +err_pd: + mlx4_pd_free(dev, mdev->priv_pdn); +err_free_dev: + kfree(mdev); +err_free_res: + return NULL; +} + +static struct mlx4_interface mlx4_en_interface = { + .add = mlx4_en_add, + .remove = mlx4_en_remove, + .event = mlx4_en_event, + .get_dev = mlx4_en_get_netdev, + .protocol = MLX4_PROT_ETH, +}; + +static int __init mlx4_en_init(void) +{ + return mlx4_register_interface(&mlx4_en_interface); +} + +static void __exit mlx4_en_cleanup(void) +{ + mlx4_unregister_interface(&mlx4_en_interface); +} + +module_init(mlx4_en_init); +module_exit(mlx4_en_cleanup); + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netdev.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netdev.c new file mode 100755 index 0000000..d9a4cd2 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netdev.c @@ -0,0 +1,1557 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "mlx4_en.h" +#include "en_port.h" + +#ifdef __VMKERNEL_MODULE__ +static void mlx4_en_vlan_rx_register(struct net_device *dev, + struct vlan_group *grp) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + /* + * This function is called to enable HW vlan, but we + * don't need to do anything in order to enable it. + * We have this function so we can pass it to + * netdev and vmkernel will not get ASSERT when trying + * to call this function + */ + en_dbg(HW, priv, "register VLAN, group=%p\n", grp); + return; +} +#endif /* __VMKERNEL_MODULE__ */ + +#ifndef __VMKERNEL_MODULE__ +static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) +#else +static void mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) +#endif /* NOT __VMKERNEL_MODULE__ */ +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + int err; + int idx; + + en_dbg(HW, priv, "adding VLAN:%d\n", vid); + + set_bit(vid, priv->active_vlans); + + /* Add VID to port VLAN filter */ + mutex_lock(&mdev->state_lock); + if (mdev->device_up && priv->port_up) { + err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); + if (err) + en_err(priv, "Failed configuring VLAN filter\n"); + } + if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) + en_dbg(HW, priv, "failed adding vlan %d\n", vid); + mutex_unlock(&mdev->state_lock); + +#ifndef __VMKERNEL_MODULE__ + return 0; +#else + return; +#endif /* NOT __VMKERNEL_MODULE__ */ +} + +#ifndef __VMKERNEL_MODULE__ +static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) +#else +static void mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) +#endif /* NOT __VMKERNEL_MODULE__ */ +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + int err; + int idx; + + en_dbg(HW, priv, "Killing VID:%d\n", vid); + + clear_bit(vid, priv->active_vlans); + + /* Remove VID from port VLAN filter */ + mutex_lock(&mdev->state_lock); + if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx)) + mlx4_unregister_vlan(mdev->dev, priv->port, idx); + else + en_dbg(HW, priv, "could not find vid %d in cache\n", vid); + + if (mdev->device_up && priv->port_up) { + err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); + if (err) + en_err(priv, "Failed configuring VLAN filter\n"); + } + mutex_unlock(&mdev->state_lock); + +#ifndef __VMKERNEL_MODULE__ + return 0; +#else + return; +#endif /* NOT __VMKERNEL_MODULE__ */ +} + +u64 mlx4_en_mac_to_u64(u8 *addr) +{ + u64 mac = 0; + int i; + + for (i = 0; i < ETH_ALEN; i++) { + mac <<= 8; + mac |= addr[i]; + } + return mac; +} + +static int mlx4_en_set_mac(struct net_device *dev, void *addr) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + struct sockaddr *saddr = addr; + + if (!is_valid_ether_addr(saddr->sa_data)) + return -EADDRNOTAVAIL; + + memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); + priv->mac = mlx4_en_mac_to_u64(dev->dev_addr); + queue_work(mdev->workqueue, &priv->mac_task); + return 0; +} + +static void mlx4_en_do_set_mac(struct work_struct *work) +{ + struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, + mac_task); + struct mlx4_en_dev *mdev = priv->mdev; + int err = 0; + + mutex_lock(&mdev->state_lock); + if (priv->port_up) { + /* Remove old MAC and insert the new one */ + err = mlx4_replace_mac(mdev->dev, priv->port, + priv->base_qpn, priv->mac); + if (err) + en_err(priv, "Failed changing HW MAC address\n"); + } else + en_dbg(HW, priv, "Port is down while " + "registering mac, exiting...\n"); + + mutex_unlock(&mdev->state_lock); +} + +#ifdef __VMKERNEL_MODULE__ +static void mlx4_en_clear_list(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct dev_mc_list *mlist, *next; + int i; + + for (i = 0, mlist = priv->mc_addrs_list; + mlist && i < priv->mc_addrs_cnt; + i++) { + next = mlist->next; + kfree(mlist); + mlist = next; + } + priv->mc_addrs_list = NULL; + priv->mc_addrs_cnt = 0; +} + +static void mlx4_en_cache_mclist(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct dev_mc_list *mlist, *tmp, *plist = NULL; + int i; + + mlx4_en_clear_list(dev); + for (i = 0, mlist = dev->mc_list; + mlist && i < dev->mc_count; + i++, mlist = mlist->next) { + tmp = kmalloc(sizeof(struct dev_mc_list), GFP_ATOMIC); + if (!tmp) { + en_err(priv, "failed to allocate multicast cache list entry\n"); + mlx4_en_clear_list(dev); + return; + } + + memcpy(tmp, mlist, sizeof(struct dev_mc_list)); + priv->mc_addrs_cnt++; + tmp->next = NULL; + if (plist) + plist->next = tmp; + else + priv->mc_addrs_list = tmp; + plist = tmp; + } +} + +#else + +static void mlx4_en_clear_list(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + kfree(priv->mc_addrs); + priv->mc_addrs = NULL; + priv->mc_addrs_cnt = 0; +} + +static void mlx4_en_cache_mclist(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct netdev_hw_addr *ha; + char *mc_addrs; + int mc_addrs_cnt = netdev_mc_count(dev); + int i; + + mc_addrs = kmalloc(mc_addrs_cnt * ETH_ALEN, GFP_ATOMIC); + if (!mc_addrs) { + en_err(priv, "failed to allocate multicast list\n"); + return; + } + i = 0; + netdev_for_each_mc_addr(ha, dev) + memcpy(mc_addrs + i++ * ETH_ALEN, ha->addr, ETH_ALEN); + mlx4_en_clear_list(dev); + priv->mc_addrs = mc_addrs; + priv->mc_addrs_cnt = mc_addrs_cnt; +} +#endif /* __VMKERNEL_MODULE__ */ + +static void mlx4_en_set_multicast(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + if (!priv->port_up) + return; + + queue_work(priv->mdev->workqueue, &priv->mcast_task); +} + +static void mlx4_en_do_set_multicast(struct work_struct *work) +{ + struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, + mcast_task); + struct mlx4_en_dev *mdev = priv->mdev; + struct net_device *dev = priv->dev; +#ifdef __VMKERNEL_MODULE__ + struct dev_mc_list *mlist; +#endif /* __VMKERNEL_MODULE__ */ + u64 mcast_addr = 0; + u8 mc_list[16] = {0}; + int err; + + mutex_lock(&mdev->state_lock); + if (!mdev->device_up) { + en_dbg(HW, priv, "Card is not up, " + "ignoring multicast change.\n"); + goto out; + } + if (!priv->port_up) { + en_dbg(HW, priv, "Port is down, " + "ignoring multicast change.\n"); + goto out; + } + + /* + * Promsicuous mode: disable all filters + */ + + if (dev->flags & IFF_PROMISC) { + if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { + if (netif_msg_rx_status(priv)) + en_warn(priv, "Entering promiscuous mode\n"); + priv->flags |= MLX4_EN_FLAG_PROMISC; + + /* Enable promiscouos mode */ + if (!(mdev->dev->caps.flags & + MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) + err = mlx4_SET_PORT_qpn_calc(mdev->dev, + priv->port, + priv->base_qpn, 1); + else + err = mlx4_unicast_promisc_add(mdev->dev, + priv->base_qpn, + priv->port); + if (err) + en_err(priv, "Failed enabling " + "promiscuous mode\n"); + + /* Disable port multicast filter (unconditionally) */ + err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, + 0, MLX4_MCAST_DISABLE); + if (err) + en_err(priv, "Failed disabling " + "multicast filter\n"); + + /* Add the default qp number as multicast promisc */ + if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { + err = mlx4_multicast_promisc_add(mdev->dev, + priv->base_qpn, + priv->port); + if (err) + en_err(priv, + "Failed entering multicast promisc mode\n"); + priv->flags |= MLX4_EN_FLAG_MC_PROMISC; + } + } + goto out; + } + + /* + * Not in promiscuous mode + */ + + if (priv->flags & MLX4_EN_FLAG_PROMISC) { + if (netif_msg_rx_status(priv)) + en_warn(priv, "Leaving promiscuous mode\n"); + priv->flags &= ~MLX4_EN_FLAG_PROMISC; + + /* Disable promiscouos mode */ + if (!(mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) + err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, + priv->base_qpn, 0); + else + err = mlx4_unicast_promisc_remove(mdev->dev, + priv->base_qpn, + priv->port); + if (err) + en_err(priv, "Failed disabling promiscuous mode\n"); + + /* Disable Multicast promisc */ + if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { + err = mlx4_multicast_promisc_remove(mdev->dev, + priv->base_qpn, + priv->port); + if (err) + en_err(priv, + "Failed disabling multicast promiscuous mode\n"); + priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; + } + } + + /* Enable/disable the multicast filter according to IFF_ALLMULTI */ + if (dev->flags & IFF_ALLMULTI) { + err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, + 0, MLX4_MCAST_DISABLE); + if (err) + en_err(priv, "Failed disabling multicast filter\n"); + + /* Add the default qp number as multicast promisc */ + if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { + err = mlx4_multicast_promisc_add(mdev->dev, + priv->base_qpn, + priv->port); + if (err) + en_err(priv, + "Failed entering multicast promisc mode\n"); + priv->flags |= MLX4_EN_FLAG_MC_PROMISC; + } + } else { + int i; + /* Disable Multicast promisc */ + if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { + err = mlx4_multicast_promisc_remove(mdev->dev, + priv->base_qpn, + priv->port); + if (err) + en_err(priv, + "Failed disabling multicast promiscuous mode\n"); + priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; + } + + err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, + 0, MLX4_MCAST_DISABLE); + if (err) + en_err(priv, + "Failed disabling multicast filter\n"); + + /* Detach our qp from all the multicast addresses */ +#ifdef __VMKERNEL_MODULE__ + for (i = 0, mlist = priv->mc_addrs_list; + mlist && i < priv->mc_addrs_cnt; + i++, mlist = mlist->next) { + memcpy(&mc_list[10], mlist->dmi_addr, ETH_ALEN); +#else + for (i = 0; i < priv->mc_addrs_cnt; i++) { + memcpy(&mc_list[10], priv->mc_addrs + i * ETH_ALEN, ETH_ALEN); +#endif /* __VMKERNEL_MODULE__ */ + mc_list[5] = priv->port; +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + mlx4_multicast_detach(mdev->dev, + (priv->netq ? &priv->netq_map.rx_map.queue[0].qp : &priv->rss_map.indir_qp), + mc_list, MLX4_PROT_ETH); +#else + mlx4_multicast_detach(mdev->dev, + &priv->rss_map.indir_qp, + mc_list, MLX4_PROT_ETH); +#endif /* NET QUEUE */ + } + /* Flush mcast filter and init it with broadcast address */ + mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, + 1, MLX4_MCAST_CONFIG); + + /* Update multicast list - we cache all addresses so they won't + * change while HW is updated holding the command semaphor */ + netif_tx_lock_bh(dev); + mlx4_en_cache_mclist(dev); + netif_tx_unlock_bh(dev); +#ifdef __VMKERNEL_MODULE__ + for (i = 0, mlist = priv->mc_addrs_list; + mlist && i < priv->mc_addrs_cnt; + i++, mlist = mlist->next) { + mcast_addr = + mlx4_en_mac_to_u64(mlist->dmi_addr); + memcpy(&mc_list[10], mlist->dmi_addr, ETH_ALEN); +#else + for (i = 0; i < priv->mc_addrs_cnt; i++) { + mcast_addr = + mlx4_en_mac_to_u64(priv->mc_addrs + i * ETH_ALEN); + memcpy(&mc_list[10], + priv->mc_addrs + i * ETH_ALEN, + ETH_ALEN); +#endif /* __VMKERNEL_MODULE__ */ + mc_list[5] = priv->port; +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + mlx4_multicast_attach(mdev->dev, + (priv->netq ? &priv->netq_map.rx_map.queue[0].qp : &priv->rss_map.indir_qp), + mc_list, 0, MLX4_PROT_ETH); +#else + mlx4_multicast_attach(mdev->dev, + &priv->rss_map.indir_qp, + mc_list, 0, MLX4_PROT_ETH); +#endif /* NET QUEUE */ + mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, + mcast_addr, 0, MLX4_MCAST_CONFIG); + } + err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, + 0, MLX4_MCAST_ENABLE); + if (err) + en_err(priv, "Failed enabling multicast filter\n"); + } +out: + mutex_unlock(&mdev->state_lock); +} + +#ifdef CONFIG_NET_POLL_CONTROLLER +static void mlx4_en_netpoll(struct net_device *dev) +{ + /* + * When the system crashes, napi poll function is called also. + * The NAPI poll will process all TX/RX completions which + * are both in NAPI context. + */ + struct mlx4_en_priv *priv = netdev_priv(dev); + int i; + + for (i = 0; i < priv->rx_ring_num; ++i) + napi_schedule(&priv->rx_cq[i].napi); + + for (i = 0; i < priv->tx_ring_num; ++i) + napi_schedule(&priv->tx_cq[i].napi); +} +#endif + +static void mlx4_en_tx_timeout(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + + if (netif_msg_timer(priv)) + en_warn(priv, "Tx timeout called on port:%d\n", priv->port); + + priv->port_stats.tx_timeout++; + en_dbg(DRV, priv, "Scheduling watchdog\n"); + queue_work(mdev->workqueue, &priv->watchdog_task); +} + + +static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + spin_lock_bh(&priv->stats_lock); + memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats)); + spin_unlock_bh(&priv->stats_lock); + + return &priv->ret_stats; +} + +static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) +{ + struct mlx4_en_cq *cq; + int i; + + /* If we haven't received a specific coalescing setting + * (module param), we set the moderation parameters as follows: + * - moder_cnt is set to the number of mtu sized packets to + * satisfy our coelsing target. + * - moder_time is set to a fixed value. + */ +#ifdef __VMKERNEL_MODULE__ + priv->rx_frames = MLX4_EN_RX_COAL_TARGET / priv->dev->mtu + 1; +#else + priv->rx_frames = MLX4_EN_RX_COAL_TARGET; +#endif /* __VMKERNEL_MODULE__ */ + priv->rx_usecs = MLX4_EN_RX_COAL_TIME; + priv->tx_frames = MLX4_EN_TX_COAL_PKTS; + priv->tx_usecs = MLX4_EN_TX_COAL_TIME; + en_dbg(INTR, priv, "Default coalesing params for mtu:%d - " + "rx_frames:%d rx_usecs:%d\n", + priv->dev->mtu, priv->rx_frames, priv->rx_usecs); + + /* Setup cq moderation params */ + for (i = 0; i < priv->rx_ring_num; i++) { + cq = &priv->rx_cq[i]; + cq->moder_cnt = priv->rx_frames; + cq->moder_time = priv->rx_usecs; + priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; + priv->last_moder_packets[i] = 0; + priv->last_moder_bytes[i] = 0; + } + + for (i = 0; i < priv->tx_ring_num; i++) { + cq = &priv->tx_cq[i]; + cq->moder_cnt = priv->tx_frames; + cq->moder_time = priv->tx_usecs; + } + + /* Reset auto-moderation params */ + priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; + priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; + priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; + priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; + priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; + priv->adaptive_rx_coal = 1; + priv->last_moder_jiffies = 0; + priv->last_moder_tx_packets = 0; +} + +static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) +{ + unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); + struct mlx4_en_cq *cq; + unsigned long packets; + unsigned long rate; + unsigned long avg_pkt_size; + unsigned long rx_packets; + unsigned long rx_bytes; + unsigned long rx_pkt_diff; + int moder_time; + int ring, err; + + /* There is a chance period is zero because jiffies were overlap */ + if (!period) + return; + + if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) + return; + + for (ring = 0; ring < priv->rx_ring_num; ring++) { + spin_lock_bh(&priv->stats_lock); + rx_packets = priv->rx_ring[ring].packets; + rx_bytes = priv->rx_ring[ring].bytes; + spin_unlock_bh(&priv->stats_lock); + + rx_pkt_diff = ((unsigned long) (rx_packets - + priv->last_moder_packets[ring])); + packets = rx_pkt_diff; + rate = packets * HZ / period; + avg_pkt_size = packets ? ((unsigned long) (rx_bytes - + priv->last_moder_bytes[ring])) / packets : 0; + + /* Apply auto-moderation only when packet rate + * exceeds a rate that it matters */ + if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && + avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { + if (rate < priv->pkt_rate_low) + moder_time = priv->rx_usecs_low; + else if (rate > priv->pkt_rate_high) + moder_time = priv->rx_usecs_high; + else + moder_time = (rate - priv->pkt_rate_low) * + (priv->rx_usecs_high - priv->rx_usecs_low) / + (priv->pkt_rate_high - priv->pkt_rate_low) + + priv->rx_usecs_low; + } else { + moder_time = priv->rx_usecs_low; + } + + if (moder_time != priv->last_moder_time[ring]) { + priv->last_moder_time[ring] = moder_time; + cq = &priv->rx_cq[ring]; + cq->moder_time = moder_time; + err = mlx4_en_set_cq_moder(priv, cq); + if (err) + en_err(priv, "Failed modifying moderation " + "for cq:%d\n", ring); + } + priv->last_moder_packets[ring] = rx_packets; + priv->last_moder_bytes[ring] = rx_bytes; + } + + priv->last_moder_jiffies = jiffies; +} + +static void mlx4_en_update_linkstate(struct mlx4_en_priv *priv, int linkstate) +{ + /* If observable port state changed set carrier state and + * report to system log */ + if (priv->last_link_state != linkstate) { + if (!linkstate) { + en_info(priv, "Link Down\n"); + netif_carrier_off(priv->dev); + } else { + en_info(priv, "Link Up\n"); + netif_carrier_on(priv->dev); + } + } + priv->last_link_state = linkstate; +} + +static void mlx4_en_do_get_stats(struct work_struct *work) +{ + struct delayed_work *delay = to_delayed_work(work); + struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, + stats_task); + struct mlx4_en_dev *mdev = priv->mdev; + int err; + + err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); + if (err) + en_dbg(HW, priv, "Could not update stats\n"); + + mutex_lock(&mdev->state_lock); + err = mlx4_en_QUERY_PORT(mdev, priv->port); + if (err) + en_dbg(HW, priv, "Could not query port\n"); + + if (mdev->device_up) { + if (priv->port_up) { + if (!err) + mlx4_en_update_linkstate(priv, priv->port_state.link_state); + mlx4_en_auto_moderation(priv); + } + + queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); + } + if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { + queue_work(mdev->workqueue, &priv->mac_task); + mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; + } + mutex_unlock(&mdev->state_lock); +} + +static void mlx4_en_linkstate(struct work_struct *work) +{ + struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, + linkstate_task); + struct mlx4_en_dev *mdev = priv->mdev; + + mutex_lock(&mdev->state_lock); + if (priv->port_up) + mlx4_en_update_linkstate(priv, priv->link_state); + mutex_unlock(&mdev->state_lock); +} + + +int mlx4_en_start_port(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_cq *cq; + struct mlx4_en_tx_ring *tx_ring; + int rx_index = 0; + int tx_index = 0; + int err = 0; + int i; + int j; + u8 mc_list[16] = {0}; + + if (priv->port_up) { + en_dbg(DRV, priv, "start port called while port already up\n"); + return 0; + } + + /* Calculate Rx buf size */ + dev->mtu = min(dev->mtu, priv->max_mtu); + mlx4_en_calc_rx_buf(dev); + en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); + + /* Configure rx cq's and rings */ + err = mlx4_en_activate_rx_rings(priv); + if (err) { + en_err(priv, "Failed to activate RX rings\n"); + return err; + } + for (i = 0; i < priv->rx_ring_num; i++) { + cq = &priv->rx_cq[i]; + + err = mlx4_en_activate_cq(priv, cq, i); + if (err) { + en_err(priv, "Failed activating Rx CQ\n"); + goto cq_err; + } + for (j = 0; j < cq->size; j++) + cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK; + err = mlx4_en_set_cq_moder(priv, cq); + if (err) { + en_err(priv, "Failed setting cq moderation parameters"); + mlx4_en_deactivate_cq(priv, cq); + goto cq_err; + } + mlx4_en_arm_cq(priv, cq); + priv->rx_ring[i].cqn = cq->mcq.cqn; + ++rx_index; + } + + /* Set qp number */ + en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); + err = mlx4_get_eth_qp(mdev->dev, priv->port, + priv->mac, &priv->base_qpn); + if (err) { + en_err(priv, "Failed getting eth qp\n"); + goto cq_err; + } + mdev->mac_removed[priv->port] = 0; + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + if (priv->netq) { + err = mlx4_en_config_netq_steer(priv); + if (err) { + en_err(priv, "Failed configuring netq steering\n"); + goto mac_err; + } + } else { + err = mlx4_en_config_rss_steer(priv); + if (err) { + en_err(priv, "Failed configuring rss steering\n"); + goto mac_err; + } + } +#else + err = mlx4_en_config_rss_steer(priv); + if (err) { + en_err(priv, "Failed configuring rss steering\n"); + goto mac_err; + } +#endif /* NET QUEUE */ + + /* Configure tx cq's and rings */ + for (i = 0; i < priv->tx_ring_num; i++) { + /* Configure cq */ + cq = &priv->tx_cq[i]; + err = mlx4_en_activate_cq(priv, cq, i); + if (err) { + en_err(priv, "Failed allocating Tx CQ\n"); + goto tx_err; + } + err = mlx4_en_set_cq_moder(priv, cq); + if (err) { + en_err(priv, "Failed setting cq moderation parameters"); + mlx4_en_deactivate_cq(priv, cq); + goto tx_err; + } + en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i); + cq->buf->wqe_index = cpu_to_be16(0xffff); + + /* Configure ring */ + tx_ring = &priv->tx_ring[i]; + err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn); + if (err) { + en_err(priv, "Failed allocating Tx ring\n"); + mlx4_en_deactivate_cq(priv, cq); + goto tx_err; + } + + /* Arm CQ for TX completions */ + mlx4_en_arm_cq(priv, cq); + + /* Set initial ownership of all Tx TXBBs to SW (1) */ + for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) + *((u32 *) (tx_ring->buf + j)) = 0xffffffff; + ++tx_index; + } + + /* Configure port */ + err = mlx4_SET_PORT_general(mdev->dev, priv->port, + priv->rx_skb_size + ETH_FCS_LEN, + priv->prof->tx_pause, + priv->prof->tx_ppp, + priv->prof->rx_pause, + priv->prof->rx_ppp); + if (err) { + en_err(priv, "Failed setting port general configurations " + "for port %d, with error %d\n", priv->port, err); + goto tx_err; + } + /* Set default qp number */ + err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); + if (err) { + en_err(priv, "Failed setting default qp numbers\n"); + goto tx_err; + } + + /* Init port */ + en_dbg(HW, priv, "Initializing port\n"); + err = mlx4_INIT_PORT(mdev->dev, priv->port); + if (err) { + en_err(priv, "Failed Initializing port\n"); + goto tx_err; + } + + /* Attach rx QP to bradcast address */ + memset(&mc_list[10], 0xff, ETH_ALEN); + mc_list[5] = priv->port; +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + if (mlx4_multicast_attach(mdev->dev, + (priv->netq ? &priv->netq_map.rx_map.queue[0].qp : &priv->rss_map.indir_qp), + mc_list, + 0, MLX4_PROT_ETH)) +#else + if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list, + 0, MLX4_PROT_ETH)) +#endif /* NET QUEUE */ + mlx4_warn(mdev, "Failed Attaching Broadcast\n"); + + /* Must redo promiscuous mode setup. */ + priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); + + /* Schedule multicast task to populate multicast list */ + queue_work(mdev->workqueue, &priv->mcast_task); + + mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap); + + priv->port_up = true; + + /* + * After INIT_PORT call we start to receive packets, + * and we also start to receive interrupts to indicate we should + * deal with the packets however the RX completion handler will return + * until the port is marked as up. Therefore there is a chance all + * WQEs have been consumed and no future interrupts will occur. + * Call napi_schedule to invoke the poll function after the port + * has been marked as up to handle all the RX completions. + */ + for (i = 0; i < priv->rx_ring_num; ++i) { + napi_enable(&priv->rx_cq[i].napi); + napi_schedule(&priv->rx_cq[i].napi); + } + + for (i = 0; i < priv->tx_ring_num; ++i) { + napi_enable(&priv->tx_cq[i].napi); + napi_schedule(&priv->tx_cq[i].napi); + } + + netif_tx_start_all_queues(dev); + return 0; + +tx_err: + while (tx_index--) { + mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]); + mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]); + } + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + if (priv->netq) + mlx4_en_release_netq_steer(priv); + else + mlx4_en_release_rss_steer(priv); +#else + mlx4_en_release_rss_steer(priv); +#endif /* NET QUEUE */ +mac_err: + mlx4_put_eth_qp(mdev->dev, priv->port, priv->mac, priv->base_qpn); +cq_err: + while (rx_index--) + mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]); + for (i = 0; i < priv->rx_ring_num; i++) + mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); + + return err; /* need to close devices */ +} + + +void mlx4_en_stop_port(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; +#ifdef __VMKERNEL_MODULE__ + struct dev_mc_list *mlist; +#endif /* __VMKERNEL_MODULE__ */ + int i; + u8 mc_list[16] = {0}; + + if (!priv->port_up) { + en_dbg(DRV, priv, "stop port called while port already down\n"); + return; + } + + netif_carrier_off(dev); + + /* close port*/ + mlx4_CLOSE_PORT(mdev->dev, priv->port); + + /* Synchronize with tx routine */ + netif_tx_lock_bh(dev); + netif_tx_stop_all_queues(dev); + netif_tx_unlock_bh(dev); + + for (i = 0; i < priv->tx_ring_num; i++) { + napi_synchronize(&priv->tx_cq[i].napi); + napi_disable(&priv->tx_cq[i].napi); + } + + for (i = 0; i < priv->rx_ring_num; i++) { + napi_synchronize(&priv->rx_cq[i].napi); + napi_disable(&priv->rx_cq[i].napi); + } + + /* Set port as not active */ + priv->port_up = false; + + /* Promsicuous mode */ + if (priv->flags & MLX4_EN_FLAG_PROMISC) { + priv->flags &= ~MLX4_EN_FLAG_PROMISC; + + /* Disable promiscouos mode */ + mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, + priv->port); + + /* Disable Multicast promisc */ + if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { + mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, + priv->port); + priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; + } + } + + /* Detach All multicasts */ + memset(&mc_list[10], 0xff, ETH_ALEN); + mc_list[5] = priv->port; +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + mlx4_multicast_detach(mdev->dev, + (priv->netq ? &priv->netq_map.rx_map.queue[0].qp : &priv->rss_map.indir_qp), + mc_list, + MLX4_PROT_ETH); +#else + mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list, + MLX4_PROT_ETH); +#endif /* NET QUEUE */ + +#ifdef __VMKERNEL_MODULE__ + for (i = 0, mlist = priv->mc_addrs_list; + mlist && i < priv->mc_addrs_cnt; + i++, mlist = mlist->next) { + memcpy(&mc_list[10], mlist->dmi_addr, ETH_ALEN); +#else + for (i = 0; i < priv->mc_addrs_cnt; i++) { + memcpy(&mc_list[10], priv->mc_addrs + i * ETH_ALEN, ETH_ALEN); +#endif /* __VMKERNEL_MODULE__ */ + mc_list[5] = priv->port; +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + mlx4_multicast_detach(mdev->dev, + (priv->netq ? &priv->netq_map.rx_map.queue[0].qp : &priv->rss_map.indir_qp), + mc_list, MLX4_PROT_ETH); +#else + mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, + mc_list, MLX4_PROT_ETH); +#endif /* NET QUEUE */ + } + mlx4_en_clear_list(dev); + /* Flush multicast filter */ + mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); + + /* Free TX Rings */ + for (i = 0; i < priv->tx_ring_num; i++) { + mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]); + mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]); + } + msleep(10); + + for (i = 0; i < priv->tx_ring_num; i++) + mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]); + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + if (priv->netq) + mlx4_en_release_netq_steer(priv); + else + mlx4_en_release_rss_steer(priv); +#else + /* Free RSS qps */ + mlx4_en_release_rss_steer(priv); +#endif /* NET QUEUE */ + + /* Unregister Mac address for the port */ + mlx4_put_eth_qp(mdev->dev, priv->port, priv->mac, priv->base_qpn); + mdev->mac_removed[priv->port] = 1; + + /* Free RX Rings */ + for (i = 0; i < priv->rx_ring_num; i++) { + mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); + mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]); + } +} + +static void mlx4_en_restart(struct work_struct *work) +{ + struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, + watchdog_task); + struct mlx4_en_dev *mdev = priv->mdev; + struct net_device *dev = priv->dev; + + en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); + + mutex_lock(&mdev->state_lock); + if (priv->port_up) { + mlx4_en_stop_port(dev); + if (mlx4_en_start_port(dev)) + en_err(priv, "Failed restarting port %d\n", priv->port); + } + mutex_unlock(&mdev->state_lock); +} + +static void mlx4_en_clear_stats(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + int i; + + if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) + en_dbg(HW, priv, "Failed dumping statistics\n"); + + memset(&priv->stats, 0, sizeof(priv->stats)); + memset(&priv->pstats, 0, sizeof(priv->pstats)); + memset(&priv->pkstats, 0, sizeof(priv->pkstats)); + memset(&priv->port_stats, 0, sizeof(priv->port_stats)); + + for (i = 0; i < priv->tx_ring_num; i++) { + priv->tx_ring[i].bytes = 0; + priv->tx_ring[i].packets = 0; + priv->tx_ring[i].tx_csum = 0; + } + for (i = 0; i < priv->rx_ring_num; i++) { + priv->rx_ring[i].bytes = 0; + priv->rx_ring[i].packets = 0; + priv->rx_ring[i].csum_ok = 0; + priv->rx_ring[i].csum_none = 0; + } +} + +static int mlx4_en_open(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + int err = 0; + + mutex_lock(&mdev->state_lock); + + if (!mdev->device_up) { + en_err(priv, "Cannot open - device down/disabled\n"); + err = -EBUSY; + goto out; + } + + /* Reset HW statistics and SW counters */ + mlx4_en_clear_stats(dev); + + err = mlx4_en_start_port(dev); + if (err) + en_err(priv, "Failed starting port:%d\n", priv->port); + +out: + mutex_unlock(&mdev->state_lock); + return err; +} + + +static int mlx4_en_close(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + + en_dbg(IFDOWN, priv, "Close port called\n"); + + mutex_lock(&mdev->state_lock); + mlx4_en_stop_port(dev); + mutex_unlock(&mdev->state_lock); + return 0; +} + +void mlx4_en_free_resources(struct mlx4_en_priv *priv) +{ + int i; + + for (i = 0; i < priv->tx_ring_num; i++) { + if (priv->tx_ring[i].tx_info) + mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]); + if (priv->tx_cq[i].buf) + mlx4_en_destroy_cq(priv, &priv->tx_cq[i]); + } + + for (i = 0; i < priv->rx_ring_num; i++) { + if (priv->rx_ring[i].rx_info) + mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], + priv->prof->rx_ring_size, priv->stride); + if (priv->rx_cq[i].buf) + mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); + } +} + +int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) +{ + struct mlx4_en_port_profile *prof = priv->prof; + int i; +#ifdef __VMKERNEL_MLX4_EN_TX_HASH__ + int j; +#endif /* __VMKERNEL_MLX4_EN_TX_HASH__ */ + int base_tx_qpn, err; + + err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &base_tx_qpn); + if (err) { + en_err(priv, "failed reserving range for TX rings\n"); + return err; + } + + /* Create tx Rings */ + for (i = 0; i < priv->tx_ring_num; i++) { + if (mlx4_en_create_cq(priv, &priv->tx_cq[i], + prof->tx_ring_size, i, TX)) + goto err; + + if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], base_tx_qpn + i, + prof->tx_ring_size, TXBB_SIZE)) + goto err; + +#ifdef __VMKERNEL_MLX4_EN_TX_HASH__ + if (i < priv->reported_tx_ring_num) { + for (j = 0; j < MLX4_EN_TX_HASH_SIZE; j++) + priv->tx_ring[i].tx_hash[j].ring = i; + priv->tx_ring[i].reported_index = i; + } else { + priv->tx_ring[i].reported_index = i >> 1; + } +#endif /* __VMKERNEL_MLX4_EN_TX_HASH__ */ + } + + /* Create rx Rings */ + for (i = 0; i < priv->rx_ring_num; i++) { + if (mlx4_en_create_cq(priv, &priv->rx_cq[i], + prof->rx_ring_size, i, RX)) + goto err; + + if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], + prof->rx_ring_size, priv->stride)) + goto err; + } + + return 0; + +err: + en_err(priv, "Failed to allocate NIC resources\n"); + mlx4_qp_release_range(priv->mdev->dev, base_tx_qpn, priv->tx_ring_num); + return -ENOMEM; +} + + +void mlx4_en_destroy_netdev(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + + en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); + +#ifdef __VMKERNEL_MODULE__ + if (priv->registered) + mlx4_en_delete_napi_from_all_cq(priv); +#endif /* __VMKERNEL_MODULE__ */ + + /* Unregister device - this will close the port if it was up */ + if (priv->registered) + unregister_netdev(dev); + + if (priv->allocated) + mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); + +#ifndef __VMKERNEL_MODULE__ + cancel_delayed_work(&priv->stats_task); +#else + cancel_delayed_work_sync(&priv->stats_task); +#endif /* __VMKERNEL_MODULE__ */ + + /* flush any pending task for this netdev */ + flush_workqueue(mdev->workqueue); + + /* Detach the netdev so tasks would not attempt to access it */ + mutex_lock(&mdev->state_lock); + mdev->pndev[priv->port] = NULL; + mutex_unlock(&mdev->state_lock); + + mlx4_en_free_resources(priv); + free_netdev(dev); +} + +static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + int err = 0; + + en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", + dev->mtu, new_mtu); + + if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) { + en_err(priv, "Bad MTU size:%d.\n", new_mtu); + return -EPERM; + } + dev->mtu = new_mtu; + + if (netif_running(dev)) { + mutex_lock(&mdev->state_lock); + if (!mdev->device_up) { + /* NIC is probably restarting - let watchdog task reset + * the port */ + en_dbg(DRV, priv, "Change MTU called with card down!?\n"); + } else { + mlx4_en_stop_port(dev); +#ifdef __VMKERNEL_MODULE__ + mlx4_en_set_default_moderation(priv); +#endif /* __VMKERNEL_MODULE__ */ + err = mlx4_en_start_port(dev); + if (err) { + en_err(priv, "Failed restarting port:%d\n", + priv->port); + queue_work(mdev->workqueue, &priv->watchdog_task); + } + } + mutex_unlock(&mdev->state_lock); + } + return 0; +} + +#ifdef __VMKERNEL_NETDEV_OPS_SET_FEATURES_SUPPORT__ +static int mlx4_en_set_features(struct net_device *netdev, + netdev_features_t features) +{ +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + struct mlx4_en_priv *priv = netdev_priv(netdev); + + if (features & NETIF_F_LOOPBACK) + priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK); + else + priv->ctrl_flags &= + cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK); + + return 0; +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ +} +#endif /* __VMKERNEL_NETDEV_OPS_SET_FEATURES_SUPPORT__ */ + +#ifndef __VMKERNEL_MODULE__ +static const struct net_device_ops mlx4_netdev_ops = { + .ndo_open = mlx4_en_open, + .ndo_stop = mlx4_en_close, + .ndo_start_xmit = mlx4_en_xmit, + .ndo_select_queue = mlx4_en_select_queue, + .ndo_get_stats = mlx4_en_get_stats, + .ndo_set_rx_mode = mlx4_en_set_multicast, + .ndo_set_mac_address = mlx4_en_set_mac, + .ndo_validate_addr = eth_validate_addr, + .ndo_change_mtu = mlx4_en_change_mtu, + .ndo_tx_timeout = mlx4_en_tx_timeout, + .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, + .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = mlx4_en_netpoll, +#endif + .ndo_set_features = mlx4_en_set_features, +}; +#endif /* NOT __VMKERNEL_MODULE__ */ + +int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, + struct mlx4_en_port_profile *prof) +{ + struct net_device *dev; + struct mlx4_en_priv *priv; + int i; + int err; + +#ifndef __VMKERNEL_MODULE__ + dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), + prof->tx_ring_num, prof->rx_ring_num); +#else + dev = alloc_etherdev_mq(sizeof(struct mlx4_en_priv), + prof->tx_ring_num); +#endif /* NOT __VMKERNEL_MODULE__ */ + if (dev == NULL) + return -ENOMEM; + + SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev); +#ifdef __VMKERNEL_MODULE__ + /* + * In vmkenrel differnt ports on same card must have + * different pci device id. + * Because we have same pci_dev id for both ports + * all ports needs to become pseudo devices. + */ + mdev->dev->pdev->netdev = NULL; + /* + * Now try to display the nic to user in regular way, + * this require vmkernel support and we give a try + */ +#ifdef __VMKERNEL_PSEUDO_OLD_API__ + dev->unused = dev->pdev; +#else + dev->pdev_pseudo = dev->pdev; +#endif /* __VMKERNEL_PSEUDO_OLD_API__ */ + dev->pdev = NULL; + dev->features = NETIF_F_PSEUDO_REG; +#endif /* __VMKERNEL_MODULE__ */ + dev->dev_id = port - 1; + + /* + * Initialize driver private data + */ + + priv = netdev_priv(dev); + memset(priv, 0, sizeof(struct mlx4_en_priv)); + priv->dev = dev; + priv->mdev = mdev; + priv->ddev = &mdev->pdev->dev; + priv->prof = prof; + priv->port = port; + priv->port_up = false; +#ifdef __VMKERNEL_MODULE__ + priv->rx_csum = true; + priv->use_rx_frags = prof->use_rx_frags; +#endif /* __VMKERNEL_MODULE__ */ + priv->flags = prof->flags; + priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | + MLX4_WQE_CTRL_SOLICITED); + priv->tx_ring_num = prof->tx_ring_num; +#ifdef __VMKERNEL_MLX4_EN_TX_HASH__ + priv->reported_tx_ring_num = priv->tx_ring_num; + priv->tx_ring_num <<= 1; +#endif /* __VMKERNEL_MLX4_EN_TX_HASH__ */ + priv->rx_ring_num = prof->rx_ring_num; + priv->cqe_factor = (mdev->dev->caps.cqe_size == 64)? 1 : 0; + priv->mac_index = -1; + priv->msg_enable = MLX4_EN_MSG_LEVEL; +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + priv->netq = prof->netq; + priv->netq_num_rss_queue = prof->netq_num_rss_queue; + priv->netq_num_rings_per_rss = prof->netq_num_rings_per_rss; + /* Each RSS indir QP is counted as one NETQ */ + priv->netq_rx_queue_num = priv->rx_ring_num - + (priv->netq_num_rss_queue * priv->netq_num_rings_per_rss) + + priv->netq_num_rss_queue; +#endif /* NET QUEUE */ + spin_lock_init(&priv->stats_lock); + INIT_WORK(&priv->mcast_task, mlx4_en_do_set_multicast); + INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac); + INIT_WORK(&priv->watchdog_task, mlx4_en_restart); + INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); + INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); + + /* Query for default mac and max mtu */ + priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; + priv->mac = mdev->dev->caps.def_mac[priv->port]; + if (ILLEGAL_MAC(priv->mac)) { + en_err(priv, "Port: %d, invalid mac burned: 0x%llx, quiting\n", + priv->port, priv->mac); + err = -EINVAL; + goto out; + } + +#ifndef __VMKERNEL_MODULE__ + priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + + DS_SIZE * MLX4_EN_MAX_RX_FRAGS); +#else + if (priv->use_rx_frags) + priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + + DS_SIZE * MLX4_EN_MAX_RX_FRAGS); + else + priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + + DS_SIZE); +#endif /* __VMKERNEL_MODULE__ */ + err = mlx4_en_alloc_resources(priv); + if (err) + goto out; + + /* Allocate page for receive rings */ + err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, + MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE); + if (err) { + en_err(priv, "Failed to allocate page for rx qps\n"); + goto out; + } + priv->allocated = 1; + + /* + * Initialize netdev entry points + */ +#ifdef __VMKERNEL_MODULE__ + dev->open = mlx4_en_open; + dev->stop = mlx4_en_close; + dev->hard_start_xmit = mlx4_en_xmit; +#ifdef __VMKERNEL_NETDEV_SELECT_QUEUE_SUPPORT__ + dev->select_queue = mlx4_en_select_queue, +#endif /* __VMKERNEL_NETDEV_SELECT_QUEUE_SUPPORT__ */ + dev->get_stats = mlx4_en_get_stats; + dev->set_multicast_list = mlx4_en_set_multicast; + dev->set_mac_address = mlx4_en_set_mac; +#ifdef __VMKERNEL_NETDEV_OPS_VALIDATE_ADDR_SUPPORT__ + dev->validate_addr = eth_validate_addr; +#endif /* __VMKERNEL_NETDEV_OPS_VALIDATE_ADDR_SUPPORT__ */ + dev->change_mtu = mlx4_en_change_mtu; + dev->tx_timeout = mlx4_en_tx_timeout; +#ifdef __VMKERNEL_MODULE__ + dev->vlan_rx_register = mlx4_en_vlan_rx_register; +#endif /* __VMKERNEL_MODULE__ */ + dev->vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid; + dev->vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid; +#ifdef CONFIG_NET_POLL_CONTROLLER + dev->poll_controller = mlx4_en_netpoll; +#endif +#ifdef __VMKERNEL_NETDEV_OPS_SET_FEATURES_SUPPORT__ + dev->set_features = mlx4_en_set_features; +#endif /* __VMKERNEL_NETDEV_OPS_SET_FEATURES_SUPPORT__ */ +#else + dev->netdev_ops = &mlx4_netdev_ops; +#endif /* __VMKERNEL_MODULE__ */ + dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; +#ifndef __VMKERNEL_MODULE__ + netif_set_real_num_tx_queues(dev, priv->tx_ring_num); + netif_set_real_num_rx_queues(dev, priv->rx_ring_num); +#endif /* NOT __VMKERNEL_MODULE__ */ + + SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops); + + /* Set defualt MAC */ + dev->addr_len = ETH_ALEN; + for (i = 0; i < ETH_ALEN; i++) { + dev->dev_addr[ETH_ALEN - 1 - i] = (u8) (priv->mac >> (8 * i)); + dev->perm_addr[ETH_ALEN - 1 - i] = (u8) (priv->mac >> (8 * i)); + } + + /* + * Set driver features + */ +#ifdef __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ + dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; + if (mdev->LSO_support) + dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; + + dev->vlan_features = dev->hw_features; + + dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; + dev->features = dev->hw_features | NETIF_F_HIGHDMA | + NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX | + NETIF_F_HW_VLAN_FILTER; +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + dev->hw_features |= NETIF_F_LOOPBACK; +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ +#else + dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | + NETIF_F_HIGHDMA | + NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX | + NETIF_F_HW_VLAN_FILTER; + if (mdev->LSO_support) + dev->features |= NETIF_F_TSO | NETIF_F_TSO6; +#endif /* __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ */ + + mdev->pndev[port] = dev; + + netif_carrier_off(dev); + + /* Configure port */ + mlx4_en_calc_rx_buf(dev); + err = mlx4_SET_PORT_general(mdev->dev, priv->port, + priv->rx_skb_size + ETH_FCS_LEN, + prof->tx_pause, prof->tx_ppp, + prof->rx_pause, priv->prof->rx_ppp); + if (err) { + en_err(priv, "Failed setting port general configurations " + "for port %d, with error %d\n", priv->port, err); + goto out; + } + + /* Init port */ + en_warn(priv, "Initializing port\n"); + err = mlx4_INIT_PORT(mdev->dev, priv->port); + if (err) { + en_err(priv, "Failed Initializing port\n"); + goto out; + } + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + if (priv->netq) + mlx4_en_netq_register(dev); +#endif /* NET QUEUE */ + + en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num); + en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num); +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + if (priv->netq_num_rss_queue && priv->netq_num_rings_per_rss) + en_warn(priv, "Using %u netq RSS rings out of %u RX rings\n", + priv->netq_num_rss_queue * priv->netq_num_rings_per_rss, + priv->rx_ring_num); +#endif /* NET QUEUE */ + + mlx4_en_set_default_moderation(priv); + +#ifdef __VMKERNEL_MODULE__ + /* + * Netqueue load balancer callback function runs asynchronous in the kernel + * and checks napi context struct. + * Since netif_napi_del frees this struct, we deal with napi struct in mlx4_en_init_ned_dev + * and mlx4_en_destroy_netdev. + */ + + mlx4_en_add_napi_to_all_cq(priv); +#endif /* __VMKERNEL_MODULE__ */ + + err = register_netdev(dev); + if (err) { + en_err(priv, "Netdev registration failed for port %d\n", port); +#ifdef __VMKERNEL_MODULE__ + goto mlx4_en_delete_napi; +#else + goto out; +#endif /* __VMKERNEL_MODULE__ */ + } + priv->registered = 1; + + queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); + return 0; + +#ifdef __VMKERNEL_MODULE__ +mlx4_en_delete_napi: + mlx4_en_delete_napi_from_all_cq(priv); +#endif /* __VMKERNEL_MODULE__ */ +out: + mlx4_en_destroy_netdev(dev); + return err; +} + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netq.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netq.c new file mode 100755 index 0000000..f17c981 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_netq.c @@ -0,0 +1,1211 @@ +/* + * Copyright (c) 2012-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifdef __VMKERNEL_MODULE__ +#include +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "mlx4_en.h" + + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + + +#define en_netq_dbg(priv, format, arg...) do { \ + if (priv) \ + en_dbg(DRV, priv, "NETQ %s: " format, __func__, ## arg); \ + else \ + printk(KERN_DEBUG "NETQ %s: " format, __func__, ## arg); \ + } while (0) + +#define en_netq_err(priv, format, arg...) do { \ + if (priv) \ + en_err(priv, "NETQ %s: " format, __func__, ## arg); \ + else \ + printk(KERN_ERR "NETQ %s: " format, __func__, ## arg); \ + } while (0) + +#define en_netq_info(priv, format, arg...) do { \ + if (priv) \ + en_info(priv, "NETQ %s: " format, __func__, ## arg); \ + else \ + printk(KERN_INFO "NETQ %s: " format, __func__, ## arg); \ + } while (0) + + +/********************************/ +#ifndef __VMKERNEL_MLX4_EN_TX_HASH__ + #define netq_for_each_tx_queue(priv, i) \ + for (i = 0; i < priv->tx_ring_num; i++) + + #define netq_for_each_tx_standard_queue(priv, i) \ + for (i = 1; i < priv->tx_ring_num; i++) +#else + #define netq_for_each_tx_queue(priv, i) \ + for (i = 0; i < priv->reported_tx_ring_num; i++) + + #define netq_for_each_tx_standard_queue(priv, i) \ + for (i = 1; i < priv->reported_tx_ring_num; i++) +#endif /* NOT __VMKERNEL_MLX4_EN_TX_HASH__ */ + + +/********************************/ +#define netq_for_each_rx_queue(priv, i) \ + for (i = 0; i < priv->netq_rx_queue_num; i++) + +#define netq_for_each_rss_queue(priv, i) \ + for (i = priv->netq_rx_queue_num - priv->netq_num_rss_queue; i < priv->netq_rx_queue_num; i++) + +/* start from ring 1 because ring 0 is our default queue and we keep it */ +#define netq_for_each_rx_standard_queue(priv, i) \ + for (i = 1; i < priv->netq_rx_queue_num - priv->netq_num_rss_queue; i++) + +/* start from ring 1 because ring 0 is our default queue and we keep it */ +#define netq_for_each_rx_standard_and_rss_queue(priv, i) \ + for (i = 1; i < priv->netq_rx_queue_num; i++) + +#define netq_for_each_rx_default_and_standard_queue(priv, i) \ + for (i = 0; i < priv->netq_rx_queue_num - priv->netq_num_rss_queue; i++) + + +/********************************/ +static inline bool mlx4_en_is_zero_mac(u8 *mac) +{ + u8 zero_mac[ETH_ALEN] = {0}; + + if (!memcmp(mac, zero_mac, ETH_ALEN)) + return true; + return false; +} +/********************************/ +static int mlx4_en_netqop_get_version(vmknetddi_queueop_get_version_args_t *args) +{ + struct mlx4_en_priv *priv = NULL; + int err = vmknetddi_queueops_version(args); + + if (err == VMKNETDDI_QUEUEOPS_OK) + en_netq_info(priv, "version is: %u.%u\n", + args->major, args->minor); + else + en_netq_err(priv, "failed to get version\n"); + return err; +} + + +/********************************/ +static int mlx4_en_netqop_get_features(vmknetddi_queueop_get_features_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + + args->features = VMKNETDDI_QUEUEOPS_FEATURE_NONE; + args->features |= VMKNETDDI_QUEUEOPS_FEATURE_RXQUEUES; + args->features |= VMKNETDDI_QUEUEOPS_FEATURE_TXQUEUES; + en_netq_info(priv, "get features returned RX/TX QUEUES\n"); + return VMKNETDDI_QUEUEOPS_OK; +} + + +/********************************/ +static int mlx4_en_netqop_get_queue_count(vmknetddi_queueop_get_queue_count_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { +#ifndef __VMKERNEL_MLX4_EN_TX_HASH__ + args->count = (priv->tx_ring_num > 0) ? (priv->tx_ring_num - 1) : 0; +#else + args->count = (priv->reported_tx_ring_num > 0) ? (priv->reported_tx_ring_num - 1) : 0; +#endif /* NOT __VMKERNEL_MLX4_EN_TX_HASH__ */ + en_netq_info(priv, "num tx queues supported is %u\n", args->count); + return VMKNETDDI_QUEUEOPS_OK; + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + /* without default and with rss ones */ + args->count = (priv->netq_rx_queue_num > 0) ? (priv->netq_rx_queue_num - 1) : 0; + en_netq_info(priv, "num rx queues supported is %u\n", args->count); + return VMKNETDDI_QUEUEOPS_OK; + } else { + en_netq_err(priv, "invalid queue type=0x%x\n", args->type); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + + +/********************************/ +static int mlx4_en_netqop_get_filter_count(vmknetddi_queueop_get_filter_count_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { + en_netq_err(priv, "failed to get tx filters - not supported\n"); + return VMKNETDDI_QUEUEOPS_ERR; + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + args->count = NETQ_NUM_RX_FILTERS_PER_Q; + en_netq_info(priv, "num rx filters is %u\n", args->count); + return VMKNETDDI_QUEUEOPS_OK; + } else { + en_netq_err(priv, "invalid queue type=0x%x\n", args->type); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + + +/********************************/ +static int mlx4_en_alloc_tx_queue(struct mlx4_en_priv *priv, + vmknetddi_queueops_queueid_t *p_qid, + u16 *queue_mapping) +{ + struct mlx4_en_netq_tx_map *netq_tx_map = &priv->netq_map.tx_map; + u32 i; + int err = VMKNETDDI_QUEUEOPS_ERR; + + mutex_lock(&priv->netq_lock); +#ifndef __VMKERNEL_MLX4_EN_TX_HASH__ + if (netq_tx_map.num_used_queues >= (priv->tx_ring_num - 1)) { +#else + if (netq_tx_map->num_used_queues >= (priv->reported_tx_ring_num - 1)) { +#endif /* NOT __VMKERNEL_MLX4_EN_TX_HASH__ */ + en_netq_err(priv, "failed to alloc tx queue - all tx queues are allocated\n"); + goto out; + } + + netq_for_each_tx_standard_queue(priv, i) { + if (!netq_tx_map->queue[i].active) { + netq_tx_map->queue[i].active = true; + *p_qid = VMKNETDDI_QUEUEOPS_MK_TX_QUEUEID(i); + *queue_mapping = i; + ++netq_tx_map->num_used_queues; + en_netq_info(priv, "allocated tx queue %u-[%u], queue mapping is %u\n", + i, *p_qid, *queue_mapping); + err = VMKNETDDI_QUEUEOPS_OK; + goto out; + } + } + +out: + mutex_unlock(&priv->netq_lock); + return err; +} + +static int mlx4_en_alloc_rx_queue(struct mlx4_en_priv *priv, + vmknetddi_queueops_queueid_t *p_qid, + struct napi_struct **pp_napi, + vmknetddi_queueops_queue_features_t feat) +{ + struct mlx4_en_netq_rx_map *netq_rx_map = &priv->netq_map.rx_map; + struct mlx4_en_cq *cq = NULL; + u32 i; + bool alloc_rss = false; + int err = VMKNETDDI_QUEUEOPS_ERR; + + mutex_lock(&priv->netq_lock); + if (netq_rx_map->num_used_queues >= (priv->netq_rx_queue_num - 1)) { + en_netq_err(priv, "failed to alloc rx queue - all rx queues are allocated\n"); + goto out; + } + +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ + if (feat & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS) { + /* find free rss */ + netq_for_each_rss_queue(priv, i) { + if (!netq_rx_map->queue[i].active) { + en_netq_dbg(priv, "Found free rss queue=%u\n", i); + alloc_rss = true; + break; + } + } + } +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ + + /* if we failed to find free rss queue than we attempt to allocate regular one */ + netq_for_each_rx_standard_and_rss_queue(priv, i) { + if (alloc_rss && !netq_rx_map->queue[i].is_rss) + continue; + if (!netq_rx_map->queue[i].active) { + netq_rx_map->queue[i].active = true; + *p_qid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(i); + if (!alloc_rss) { + /* Not making sense to fill pp_napi for RSS */ + cq = &priv->rx_cq[i]; + *pp_napi = &cq->napi; + } + ++netq_rx_map->num_used_queues; + en_netq_info(priv, "allocated %s queue %u-[%u], napi ptr is %p\n", + alloc_rss ? "rss" : "rx", + i, *p_qid, *pp_napi); + err = VMKNETDDI_QUEUEOPS_OK; + goto out; + } + } + +out: + mutex_unlock(&priv->netq_lock); + return err; +} + +static int mlx4_en_netqop_alloc_queue(vmknetddi_queueop_alloc_queue_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { + return mlx4_en_alloc_tx_queue(priv, + &args->queueid, + &args->queue_mapping); + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + return mlx4_en_alloc_rx_queue(priv, + &args->queueid, + &args->napi, + 0); + } else { + en_netq_err(priv, "invalid queue type=0x%x\n", args->type); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ +static int mlx4_en_netqop_alloc_queue_with_attr(vmknetddi_queueop_alloc_queue_with_attr_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + vmknetddi_queueops_queue_features_t feat; + int i; + + en_netq_info(priv, "request for alloc queue with attribute\n"); + en_netq_dbg(priv, "attributes number=%d\n", args->nattr); + if (!args->attr || !args->nattr) { + en_netq_err(priv, "Attributes are invalid! attr(%p), nattr(%d).\n", + args->attr, args->nattr); + return VMKNETDDI_QUEUEOPS_ERR; + } + + for (i = 0; i < args->nattr; i++) { + switch (args->attr[i].type) { + case VMKNETDDI_QUEUEOPS_QUEUE_ATTR_PRIOR: { + en_netq_err(priv, "attr=%u from type prior is not supported\n", i); + break; + } + + case VMKNETDDI_QUEUEOPS_QUEUE_ATTR_FEAT: { + feat = args->attr[i].args.features; + en_netq_dbg(priv, "attr=%u request feat=0x%x\n", i, feat); + + /* Unsupported features */ + if (feat & ~(VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS)) { + en_netq_err(priv, "unsupported feature 0x%x\n", + feat & ~(VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS)); + return VMKNETDDI_QUEUEOPS_ERR; + } + + if (feat & VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS) { + if (args->type != VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + en_netq_err(priv, "invalid queue type=0x%x, rss feature is only for rx\n", + args->type); + break; + } + en_netq_info(priv, "trying to allocate rss queue\n"); + return mlx4_en_alloc_rx_queue(priv, + &args->queueid, + &args->napi, + feat); + } + + /* + * Cheking also if we have not feat. This is done to be aligned with + * DDK porting guide although it doesn't make sense + */ + if (!feat) { + return mlx4_en_alloc_rx_queue(priv, + &args->queueid, + &args->napi, + 0); + } + break; + } + + default: { + en_netq_err(priv, "invalid attr=%u type=0x%x\n", i, args->attr[i].type); + return VMKNETDDI_QUEUEOPS_ERR; + } + } /* end of switch */ + } + + en_netq_err(priv, "failed to allocate queue with attr\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} +#else +static int mlx4_en_netqop_alloc_queue_with_attr(vmknetddi_queueop_alloc_queue_with_attr_args_t *args) +{ + struct mlx4_en_priv *priv = NULL; + + en_netq_err(priv, "failed to alloc queue with attr - not supported\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ + + +/********************************/ +static int mlx4_en_free_tx_queue(struct mlx4_en_priv *priv, + vmknetddi_queueops_queueid_t vmk_qid) +{ + struct mlx4_en_netq_tx_map *netq_tx_map = &priv->netq_map.tx_map; + u32 qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(vmk_qid); + int err = VMKNETDDI_QUEUEOPS_ERR; + +#ifndef __VMKERNEL_MLX4_EN_TX_HASH__ + if (qid >= priv->tx_ring_num) { +#else + if ((qid == 0) || (qid >= priv->reported_tx_ring_num)) { +#endif /* NOT __VMKERNEL_MLX4_EN_TX_HASH__ */ + en_netq_err(priv, "failed to free tx queue %u-[%u] - out of range\n", + qid, vmk_qid); + return err; + } + + mutex_lock(&priv->netq_lock); + if (!netq_tx_map->queue[qid].active) { + en_netq_err(priv, "failed to free tx queue %u-[%u] - double free\n", + qid, vmk_qid); + goto out; + } + + netq_tx_map->queue[qid].active = false; + --netq_tx_map->num_used_queues; + en_netq_info(priv, "freed tx queue %u-[%u]\n", qid, vmk_qid); + err = VMKNETDDI_QUEUEOPS_OK; + +out: + mutex_unlock(&priv->netq_lock); + return err; +} + +static int mlx4_en_free_rx_queue(struct mlx4_en_priv *priv, + vmknetddi_queueops_queueid_t vmk_qid) +{ + struct mlx4_en_netq_rx_map *netq_rx_map = &priv->netq_map.rx_map; + u32 qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(vmk_qid); + int err = VMKNETDDI_QUEUEOPS_ERR; + + if ((qid == 0) || (qid >= priv->netq_rx_queue_num)) { + en_netq_err(priv, "failed to free rx queue %u-[%u] - out of range\n", + qid, vmk_qid); + return err; + } + + mutex_lock(&priv->netq_lock); + if (netq_rx_map->queue[qid].num_used_filters) { + en_netq_err(priv, "failed to free rx queue %u-[%u] - we have active filters\n", + qid, vmk_qid); + goto out; + } + if (!netq_rx_map->queue[qid].active) { + en_netq_err(priv, "failed to free rx queue %u-[%u] - double free\n", + qid, vmk_qid); + goto out; + } + + netq_rx_map->queue[qid].active = false; + --netq_rx_map->num_used_queues; + en_netq_info(priv, "freed rx queue %u-[%u]\n", qid, vmk_qid); + err = VMKNETDDI_QUEUEOPS_OK; + +out: + mutex_unlock(&priv->netq_lock); + return err; +} + +static int mlx4_en_netqop_free_queue(vmknetddi_queueop_free_queue_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + + if (VMKNETDDI_QUEUEOPS_IS_TX_QUEUEID(args->queueid)) { + return mlx4_en_free_tx_queue(priv, + args->queueid); + } else if (VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID(args->queueid)) { + return mlx4_en_free_rx_queue(priv, + args->queueid); + } else { + en_netq_err(priv, "invalid queue id=0x%x\n", VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid)); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + + +/********************************/ +static int mlx4_en_netqop_get_queue_vector(vmknetddi_queueop_get_queue_vector_args_t *args) +{ + struct mlx4_en_priv *priv = NULL; + + en_netq_err(priv, "failed to get queue interrupt vector - not supported\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} + + +/********************************/ +static int mlx4_en_netqop_get_default_queue(vmknetddi_queueop_get_default_queue_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { + args->queue_mapping = 0; + args->queueid = VMKNETDDI_QUEUEOPS_MK_TX_QUEUEID(0); + en_netq_info(priv, "default tx queue mapping %u, queue id %u-[%u]\n", + args->queue_mapping, 0, args->queueid); + return VMKNETDDI_QUEUEOPS_OK; + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + args->napi = &priv->rx_cq[0].napi; + args->queueid = VMKNETDDI_QUEUEOPS_MK_RX_QUEUEID(0); + en_netq_info(priv, "default rx napi ptr %p, queue id %u-[%u]\n", + args->napi, 0, args->queueid); + return VMKNETDDI_QUEUEOPS_OK; + } else { + en_netq_err(priv, "invalid queue type=0x%x\n", args->type); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + + +/********************************/ +#define MAC_6_PRINT_FMT "%.2x:%.2x:%.2x:%.2x:%.2x:%.2x" +#define MAC_6_PRINT_ARG(mac) mac[0], mac[1], mac[2], mac[3], mac[4], mac[5] + +static int mlx4_en_netqop_apply_rx_filter(vmknetddi_queueop_apply_rx_filter_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_netq_rx_queue *netq_rx_queue; + vmknetddi_queueops_filter_t *p_filter = &args->filter; + vmknetddi_queueops_filter_class_t class = vmknetddi_queueops_get_filter_class(p_filter); + u32 qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); + u32 fid = 0; + int i; + int err = VMKNETDDI_QUEUEOPS_ERR; + u64 mac64; + + if (!VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID(args->queueid)) { + en_netq_err(priv, "failed to apply rx filter - not rx queue id %u-[%u]\n", + qid, args->queueid); + return err; + } + if ((qid == 0) || (qid >= priv->netq_rx_queue_num)) { + en_netq_err(priv, "failed to apply rx filter - queue id %u-[%u] out of range\n", + qid, args->queueid); + return err; + } + if (class != VMKNETDDI_QUEUEOPS_FILTER_MACADDR) { + en_netq_err(priv, "failed to apply rx filter - filter class 0x%x not supported\n", + class); + return err; + } + + mutex_lock(&priv->netq_lock); + netq_rx_queue = &priv->netq_map.rx_map.queue[qid]; + if (netq_rx_queue->num_used_filters >= NETQ_NUM_RX_FILTERS_PER_Q) { + en_netq_err(priv, "failed to apply rx filter - all filters for queue id %u-[%u] are allocated\n", + qid, args->queueid); + goto out; + } + + for (i = 0; i < NETQ_NUM_RX_FILTERS_PER_Q; i++) { + if (mlx4_en_is_zero_mac(netq_rx_queue->filters[i].u.mac)) { + memcpy(netq_rx_queue->filters[i].u.mac, + p_filter->u.macaddr, ETH_ALEN * sizeof(u8)); + ++netq_rx_queue->num_used_filters; + fid = i; + break; + } + } + + mutex_lock(&mdev->state_lock); + if (!priv->port_up) { + en_netq_err(priv, "failed to apply rx filter for queue id %u-[%u] - port is down\n", + qid, args->queueid); + goto err_flt; + } + + mac64 = mlx4_en_mac_to_u64(netq_rx_queue->filters[fid].u.mac); + if (mlx4_uc_steer_add(mdev->dev, priv->port, + mac64, + &netq_rx_queue->qp.qpn)) { + en_netq_err(priv, "failed to apply rx filter by MAC addr " MAC_6_PRINT_FMT \ + ", rx queue is %u=[%u]\n", + MAC_6_PRINT_ARG(((u8 *)netq_rx_queue->filters[fid].u.mac)), + qid, args->queueid); + goto err_flt; + } + mutex_unlock(&mdev->state_lock); + + netq_rx_queue->filters[fid].active = true; + args->filterid = VMKNETDDI_QUEUEOPS_MK_FILTERID(fid); + en_netq_info(priv, "applied rx filter %u-[%u] by MAC addr " MAC_6_PRINT_FMT \ + ", rx queue is %u-[%u]\n", + fid, args->filterid, + MAC_6_PRINT_ARG(((u8 *)netq_rx_queue->filters[fid].u.mac)), + qid, args->queueid); + err = VMKNETDDI_QUEUEOPS_OK; + goto out; + +err_flt: + mutex_unlock(&mdev->state_lock); + memset(netq_rx_queue->filters[fid].u.mac, 0, ETH_ALEN * sizeof(u8)); + --netq_rx_queue->num_used_filters; + +out: + mutex_unlock(&priv->netq_lock); + return err; +} + + +/********************************/ +static int mlx4_en_netqop_remove_rx_filter(vmknetddi_queueop_remove_rx_filter_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_netq_rx_queue *netq_rx_queue; + u32 qid = VMKNETDDI_QUEUEOPS_QUEUEID_VAL(args->queueid); + u32 fid = VMKNETDDI_QUEUEOPS_FILTERID_VAL(args->filterid); + int err = VMKNETDDI_QUEUEOPS_ERR; + u64 mac64; + + if (!VMKNETDDI_QUEUEOPS_IS_RX_QUEUEID(args->queueid)) { + en_netq_err(priv, "failed to remove rx filter - not rx queue id %u-[%u]\n", + qid, args->queueid); + return err; + } + if ((qid == 0) || (qid >= priv->netq_rx_queue_num)) { + en_netq_err(priv, "failed to remove rx filter - queue id %u-[%u] out of range\n", + qid, args->queueid); + return err; + } + if (fid >= NETQ_NUM_RX_FILTERS_PER_Q) { + en_netq_err(priv, "failed to remove rx filter - filter id %u-[%u] out of range\n", + fid, args->filterid); + return err; + } + + mutex_lock(&priv->netq_lock); + netq_rx_queue = &priv->netq_map.rx_map.queue[qid]; + if (netq_rx_queue->filters[fid].active) { + mac64 = mlx4_en_mac_to_u64(netq_rx_queue->filters[fid].u.mac); + mlx4_uc_steer_release(mdev->dev, priv->port, + mac64, + netq_rx_queue->qp.qpn); + netq_rx_queue->filters[fid].active = false; + } + + en_netq_info(priv, "removed rx filter %u-[%u] by MAC addr " MAC_6_PRINT_FMT \ + ", rx queue is %u-[%u]\n", + fid, args->filterid, + MAC_6_PRINT_ARG(((u8 *)netq_rx_queue->filters[fid].u.mac)), + qid, args->queueid); + memset(netq_rx_queue->filters[fid].u.mac, 0, ETH_ALEN * sizeof(u8)); + --netq_rx_queue->num_used_filters; + + err = VMKNETDDI_QUEUEOPS_OK; + mutex_unlock(&priv->netq_lock); + return err; +} + + +/********************************/ +static int mlx4_en_netqop_get_stats(vmknetddi_queueop_get_stats_args_t *args) +{ + struct mlx4_en_priv *priv = NULL; + + en_netq_err(priv, "failed to get stats - not supported\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} + + +/********************************/ +static int mlx4_en_netqop_set_tx_priority(vmknetddi_queueop_set_tx_priority_args_t *args) +{ + struct mlx4_en_priv *priv = NULL; + + en_netq_err(priv, "failed to set tx priority - not supported\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} + + +/********************************/ +static int mlx4_en_netqop_enable_feat(vmknetddi_queueop_enable_feat_args_t *args) +{ + struct mlx4_en_priv *priv = NULL; + + en_netq_err(priv, "failed to enable queue feat - not supported\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} + + +/********************************/ +static int mlx4_en_netqop_disable_feat(vmknetddi_queueop_disable_feat_args_t *args) +{ + struct mlx4_en_priv *priv = NULL; + + en_netq_err(priv, "failed to disable queue feat - not supported\n"); + return VMKNETDDI_QUEUEOPS_ERR; +} + + +/********************************/ +static int mlx4_en_netqop_get_supported_feat(vmknetddi_queueop_get_sup_feat_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { + args->features = VMKNETDDI_QUEUEOPS_QUEUE_FEAT_NONE; + en_netq_info(priv, "tx queues support none queue features\n"); + return VMKNETDDI_QUEUEOPS_OK; + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + args->features = VMKNETDDI_QUEUEOPS_QUEUE_FEAT_NONE; +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ + if (priv->netq_num_rss_queue) { + args->features |= VMKNETDDI_QUEUEOPS_QUEUE_FEAT_RSS; + en_netq_info(priv, "rx queues support rss queue features\n"); + } else { + en_netq_info(priv, "rx queues support none queue features\n"); + } +#else + en_netq_info(priv, "rx queues support none queue features\n"); +#endif + return VMKNETDDI_QUEUEOPS_OK; + } else { + en_netq_err(priv, "invalid queue type=0x%x\n", args->type); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + + +/********************************/ +static int mlx4_en_netqop_get_supported_filter_class(vmknetddi_queueop_get_sup_filter_class_args_t *args) +{ + struct mlx4_en_priv *priv = netdev_priv(args->netdev); + + if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_TX) { + args->class = VMKNETDDI_QUEUEOPS_FILTER_NONE; + en_netq_info(priv, "tx queues support none filter classes\n"); + return VMKNETDDI_QUEUEOPS_OK; + } else if (args->type == VMKNETDDI_QUEUEOPS_QUEUE_TYPE_RX) { + args->class = VMKNETDDI_QUEUEOPS_FILTER_MACADDR; + en_netq_info(priv, "rx queues support filter class by MAC addr\n"); + return VMKNETDDI_QUEUEOPS_OK; + } else { + en_netq_err(priv, "invalid queue type=0x%x\n", args->type); + return VMKNETDDI_QUEUEOPS_ERR; + } +} + + +/********************************/ +static int mlx4_en_netq_ops(vmknetddi_queueops_op_t op, void *args) +{ + struct mlx4_en_priv *priv = NULL; + int err = VMKNETDDI_QUEUEOPS_OK; + + switch (op) { + case VMKNETDDI_QUEUEOPS_OP_GET_VERSION: { + err = mlx4_en_netqop_get_version(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_GET_FEATURES: { + err = mlx4_en_netqop_get_features(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_GET_QUEUE_COUNT: { + err = mlx4_en_netqop_get_queue_count(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_GET_FILTER_COUNT: { + err = mlx4_en_netqop_get_filter_count(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_ALLOC_QUEUE: { + err = mlx4_en_netqop_alloc_queue(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_FREE_QUEUE: { + err = mlx4_en_netqop_free_queue(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_GET_QUEUE_VECTOR: { + err = mlx4_en_netqop_get_queue_vector(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_GET_DEFAULT_QUEUE: { + err = mlx4_en_netqop_get_default_queue(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_APPLY_RX_FILTER: { + err = mlx4_en_netqop_apply_rx_filter(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_REMOVE_RX_FILTER: { + err = mlx4_en_netqop_remove_rx_filter(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_GET_STATS: { + err = mlx4_en_netqop_get_stats(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_SET_TX_PRIORITY: { + err = mlx4_en_netqop_set_tx_priority(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_ALLOC_QUEUE_WITH_ATTR: { + err = mlx4_en_netqop_alloc_queue_with_attr(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_ENABLE_FEAT: { + err = mlx4_en_netqop_enable_feat(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_DISABLE_FEAT: { + err = mlx4_en_netqop_disable_feat(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_GET_SUPPORTED_FEAT: { + err = mlx4_en_netqop_get_supported_feat(args); + break; + } + case VMKNETDDI_QUEUEOPS_OP_GET_SUPPORTED_FILTER_CLASS: { + err = mlx4_en_netqop_get_supported_filter_class(args); + break; + } + default: { + en_netq_err(priv, "invalid op=0x%x\n", op); + err = VMKNETDDI_QUEUEOPS_ERR; + break; + } + } + return err; +} + + +/********************************/ +static int mlx4_en_create_rx_standard_queues(struct mlx4_en_priv *priv) +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_netq_rx_map *netq_rx_map = &priv->netq_map.rx_map; + int i, qpn; + u32 good_qps = 0, non_default_qps; + int err = 0; + + en_netq_info(priv, "Configuring net queue steering\n"); + + /* Default queue */ + netq_rx_map->base_qpn_default = priv->base_qpn; + err = mlx4_en_config_rss_qp(priv, netq_rx_map->base_qpn_default, &priv->rx_ring[0], + &netq_rx_map->queue[0].state, + &netq_rx_map->queue[0].qp); + if (err) + return err; + ++good_qps; + + /* Non default queues */ + non_default_qps = priv->netq_rx_queue_num - 1 - priv->netq_num_rss_queue; + err = mlx4_qp_reserve_range(mdev->dev, + non_default_qps, + roundup_pow_of_two(non_default_qps), + &netq_rx_map->base_qpn_non_default); + if (err) { + en_netq_err(priv, "Failed reserving %d qps\n", non_default_qps); + goto err_qps; + } + netq_for_each_rx_standard_queue(priv, i) { + /* we start from idx 1 to skip default */ + qpn = netq_rx_map->base_qpn_non_default + (i - 1); + err = mlx4_en_config_rss_qp(priv, qpn, &priv->rx_ring[i], + &netq_rx_map->queue[i].state, + &netq_rx_map->queue[i].qp); + if (err) + goto err_rsv_range; + + ++good_qps; + } + + return 0; + +err_rsv_range: + mlx4_qp_release_range(mdev->dev, netq_rx_map->base_qpn_non_default, non_default_qps); + +err_qps: + for (i = 0; i < good_qps; i++) { + mlx4_qp_modify(mdev->dev, NULL, netq_rx_map->queue[i].state, + MLX4_QP_STATE_RST, NULL, 0, 0, &netq_rx_map->queue[i].qp); + mlx4_qp_remove(mdev->dev, &netq_rx_map->queue[i].qp); + mlx4_qp_free(mdev->dev, &netq_rx_map->queue[i].qp); + } + return err; +} + +static void mlx4_en_destroy_rx_standard_queues(struct mlx4_en_priv *priv) +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_netq_rx_map *netq_rx_map = &priv->netq_map.rx_map; + int i; + + en_netq_info(priv, "Destroying net queue steering\n"); + + /* free all qps */ + netq_for_each_rx_default_and_standard_queue(priv, i) { + mlx4_qp_modify(mdev->dev, NULL, netq_rx_map->queue[i].state, + MLX4_QP_STATE_RST, NULL, 0, 0, &netq_rx_map->queue[i].qp); + mlx4_qp_remove(mdev->dev, &netq_rx_map->queue[i].qp); + mlx4_qp_free(mdev->dev, &netq_rx_map->queue[i].qp); + } + mlx4_qp_release_range(mdev->dev, netq_rx_map->base_qpn_non_default, + priv->netq_rx_queue_num - 1 - priv->netq_num_rss_queue); +} + +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ + + +static int mlx4_en_create_rss_queue(struct mlx4_en_priv *priv, u32 index) +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_netq_rx_queue *netq_rx_queue = &priv->netq_map.rx_map.queue[index]; + struct mlx4_qp_context context; + void *ptr; + struct mlx4_rss_context *rss_context; + u8 rss_mask = (MLX4_RSS_IPV4 | MLX4_RSS_TCP_IPV4 | MLX4_RSS_IPV6 | + MLX4_RSS_TCP_IPV6); + int i, qpn, ring_index; + int err = 0; + int good_qps = 0; + static const u32 rsskey[10] = { 0xD181C62C, 0xF7F4DB5B, 0x1983A2FC, + 0x943E1ADB, 0xD9389E6B, 0xD1039C2C, 0xA74499AD, + 0x593D56D9, 0xF3253C06, 0x2ADC1FFC}; + + err = mlx4_qp_reserve_range(mdev->dev, priv->netq_num_rings_per_rss, + priv->netq_num_rings_per_rss, + &netq_rx_queue->rss_context.base_rss_qpn); + if (err) { + en_netq_err(priv, "Failed reserving %d qps\n", priv->netq_num_rings_per_rss); + return err; + } + + ring_index = priv->rx_ring_num - (priv->netq_num_rss_queue * priv->netq_num_rings_per_rss); + ring_index += (index - ring_index) * priv->netq_num_rings_per_rss; + for (i = 0; i < priv->netq_num_rings_per_rss; i++) { + qpn = netq_rx_queue->rss_context.base_rss_qpn + i; + err = mlx4_en_config_rss_qp(priv, qpn, &priv->rx_ring[ring_index + i], + &netq_rx_queue->rss_context.state[i], + &netq_rx_queue->rss_context.qps[i]); + if (err) + goto rss_err; + ++good_qps; + } + + /* Configure RSS indirection qp */ + err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &netq_rx_queue->rss_context.base_indir_qpn); + if (err) { + en_netq_err(priv, "Failed reserving %d qps\n", 1); + goto rss_err; + } + + err = mlx4_qp_alloc(mdev->dev, + netq_rx_queue->rss_context.base_indir_qpn, + &netq_rx_queue->qp); + if (err) { + en_err(priv, "Failed to allocate RSS indirection QP\n"); + goto indir_range_err; + } + netq_rx_queue->qp.event = mlx4_en_sqp_event; + mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, netq_rx_queue->rss_context.base_indir_qpn, + priv->rx_ring[i].cqn, &context); + + ptr = ((void *) &context) + offsetof(struct mlx4_qp_context, pri_path) + + MLX4_RSS_OFFSET_IN_QPC_PRI_PATH; + rss_context = ptr; + rss_context->base_qpn = cpu_to_be32(ilog2(priv->netq_num_rings_per_rss) << 24 | + (netq_rx_queue->rss_context.base_rss_qpn)); + rss_context->default_qpn = cpu_to_be32(netq_rx_queue->rss_context.base_rss_qpn); + if (mdev->profile.udp_rss) { + rss_mask |= MLX4_RSS_UDP_IPV4 | MLX4_RSS_UDP_IPV6; + rss_context->base_qpn_udp = rss_context->default_qpn; + } + rss_context->flags = rss_mask; + rss_context->hash_fn = MLX4_RSS_HASH_TOP; + for (i = 0; i < 10; i++) + rss_context->rss_key[i] = cpu_to_be32(rsskey[i]); + + err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context, + &netq_rx_queue->qp, &netq_rx_queue->state); + if (err) + goto indir_qp_err; + + /* mark as rss */ + netq_rx_queue->is_rss = true; + + return 0; + +indir_qp_err: + mlx4_qp_modify(mdev->dev, NULL, netq_rx_queue->state, + MLX4_QP_STATE_RST, NULL, 0, 0, &netq_rx_queue->qp); + mlx4_qp_remove(mdev->dev, &netq_rx_queue->qp); + mlx4_qp_free(mdev->dev, &netq_rx_queue->qp); + +indir_range_err: + mlx4_qp_release_range(mdev->dev, netq_rx_queue->rss_context.base_indir_qpn, 1); + +rss_err: + for (i = 0; i < good_qps; i++) { + mlx4_qp_modify(mdev->dev, NULL, netq_rx_queue->rss_context.state[i], + MLX4_QP_STATE_RST, NULL, 0, 0, &netq_rx_queue->rss_context.qps[i]); + mlx4_qp_remove(mdev->dev, &netq_rx_queue->rss_context.qps[i]); + mlx4_qp_free(mdev->dev, &netq_rx_queue->rss_context.qps[i]); + } + mlx4_qp_release_range(mdev->dev, netq_rx_queue->rss_context.base_rss_qpn, + priv->netq_num_rings_per_rss); + + return err; +} + +static void mlx4_en_destroy_rss_queue(struct mlx4_en_priv *priv, u32 index) +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_netq_rx_queue *netq_rx_queue = &priv->netq_map.rx_map.queue[index]; + int i; + + netq_rx_queue->is_rss = false; + mlx4_qp_modify(mdev->dev, NULL, netq_rx_queue->state, + MLX4_QP_STATE_RST, NULL, 0, 0, &netq_rx_queue->qp); + mlx4_qp_remove(mdev->dev, &netq_rx_queue->qp); + mlx4_qp_free(mdev->dev, &netq_rx_queue->qp); + mlx4_qp_release_range(mdev->dev, netq_rx_queue->rss_context.base_indir_qpn, 1); + + for (i = 0; i < priv->netq_num_rings_per_rss; i++) { + mlx4_qp_modify(mdev->dev, NULL, netq_rx_queue->rss_context.state[i], + MLX4_QP_STATE_RST, NULL, 0, 0, &netq_rx_queue->rss_context.qps[i]); + mlx4_qp_remove(mdev->dev, &netq_rx_queue->rss_context.qps[i]); + mlx4_qp_free(mdev->dev, &netq_rx_queue->rss_context.qps[i]); + } + mlx4_qp_release_range(mdev->dev, netq_rx_queue->rss_context.base_rss_qpn, + priv->netq_num_rings_per_rss); +} + +static int mlx4_en_create_all_rss_queues(struct mlx4_en_priv *priv) +{ + int i, j, err; + + if (!priv->netq_num_rss_queue) + return 0; + + en_netq_info(priv, "Configuring net queue rss steering\n"); + netq_for_each_rss_queue(priv, i) { + err = mlx4_en_create_rss_queue(priv, i); + if (err) + goto err; + } + + return 0; + +err: + netq_for_each_rss_queue(priv, j) { + if (j >= i) + break; + mlx4_en_destroy_rss_queue(priv, j); + } + return err; +} + +static void mlx4_en_destroy_all_rss_queues(struct mlx4_en_priv *priv) +{ + int i; + + if (!priv->netq_num_rss_queue) + return; + + en_netq_info(priv, "Destroying net queue rss steering\n"); + netq_for_each_rss_queue(priv, i) + mlx4_en_destroy_rss_queue(priv, i); +} + + +#else + + +static inline int mlx4_en_create_all_rss_queues(struct mlx4_en_priv *priv) +{ + /* vmkernel not support rss netqueue */ + return 0; +} + +static inline void mlx4_en_destroy_all_rss_queues(struct mlx4_en_priv *priv) +{ + /* vmkernel not support rss netqueue */ + return; +} + + +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ + +static int mlx4_en_apply_all_filters(struct mlx4_en_priv *priv) +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_netq_rx_queue *netq_rx_queue; + int i, j; + int err = 0; + u64 mac64; + + /* apply all previous filters */ + en_netq_info(priv, "apply previous filters to all queues\n"); + netq_for_each_rx_standard_and_rss_queue(priv, i) { + netq_rx_queue = &priv->netq_map.rx_map.queue[i]; + /* we start from idx 1 to skip default */ + en_netq_dbg(priv, "apply %u filters to queue %u\n", + netq_rx_queue->num_used_filters, i); + for (j = 0; j < NETQ_NUM_RX_FILTERS_PER_Q; j++) { + if (!mlx4_en_is_zero_mac(netq_rx_queue->filters[j].u.mac)) { + mac64 = mlx4_en_mac_to_u64(netq_rx_queue->filters[j].u.mac); + err = mlx4_uc_steer_add(mdev->dev, priv->port, + mac64, + &netq_rx_queue->qp.qpn); + if (err) { + en_netq_err(priv, "failed to resume rx filter by MAC addr " MAC_6_PRINT_FMT \ + ", rx queue is %u\n", + MAC_6_PRINT_ARG(((u8 *)netq_rx_queue->filters[j].u.mac)), + i); + goto err_filters; + } + netq_rx_queue->filters[j].active = true; + } + } + } + + goto out; + +err_filters: + netq_for_each_rx_standard_and_rss_queue(priv, i) { + for (j = 0; j < NETQ_NUM_RX_FILTERS_PER_Q; j++) { + if (!mlx4_en_is_zero_mac(netq_rx_queue->filters[j].u.mac) && + netq_rx_queue->filters[j].active) { + /* remove only the ones we active already */ + netq_rx_queue->filters[j].active = false; + mac64 = mlx4_en_mac_to_u64(netq_rx_queue->filters[j].u.mac); + mlx4_uc_steer_release(mdev->dev, priv->port, + mac64, + netq_rx_queue->qp.qpn); + } + } + } + +out: + return err; +} + +static void mlx4_en_remove_all_filters(struct mlx4_en_priv *priv) +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_netq_rx_queue *netq_rx_queue; + int i, j; + u64 mac64; + + /* remove all filters */ + en_netq_info(priv, "remove current filters from all queues\n"); + netq_for_each_rx_standard_and_rss_queue(priv, i) { + netq_rx_queue = &priv->netq_map.rx_map.queue[i]; + /* we start from idx 1 to skip default */ + en_netq_dbg(priv, "removed %u filters from queue %u\n", + netq_rx_queue->num_used_filters, i); + for (j = 0; j < NETQ_NUM_RX_FILTERS_PER_Q; j++) { + if (!mlx4_en_is_zero_mac(netq_rx_queue->filters[j].u.mac)) { + netq_rx_queue->filters[j].active = false; + mac64 = mlx4_en_mac_to_u64(netq_rx_queue->filters[j].u.mac); + mlx4_uc_steer_release(mdev->dev, priv->port, + mac64, + netq_rx_queue->qp.qpn); + } + } + } + +} + +int mlx4_en_config_netq_steer(struct mlx4_en_priv *priv) +{ + int err = -EINVAL; + + mutex_lock(&priv->netq_lock); + + err = mlx4_en_create_rx_standard_queues(priv); + if (err) { + en_netq_err(priv, "failed to create netq standard queues\n"); + goto out; + } + + err = mlx4_en_create_all_rss_queues(priv); + if (err) { + en_netq_err(priv, "failed to create netq rss queues\n"); + goto err_standard_queues; + } + + err = mlx4_en_apply_all_filters(priv); + if (err) { + en_netq_err(priv, "failed to apply all filters\n"); + goto err_rss_queues; + } + + err = 0; + goto out; + +err_rss_queues: + mlx4_en_destroy_all_rss_queues(priv); + +err_standard_queues: + mlx4_en_destroy_rx_standard_queues(priv); + +out: + mutex_unlock(&priv->netq_lock); + return err; +} + +void mlx4_en_release_netq_steer(struct mlx4_en_priv *priv) +{ + mutex_lock(&priv->netq_lock); + mlx4_en_remove_all_filters(priv); + mlx4_en_destroy_all_rss_queues(priv); + mlx4_en_destroy_rx_standard_queues(priv); + mutex_unlock(&priv->netq_lock); +} + + +/********************************/ +void mlx4_en_netq_register(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_netq_tx_map *netq_tx_map = &priv->netq_map.tx_map; + struct mlx4_en_netq_rx_map *netq_rx_map = &priv->netq_map.rx_map; + u32 i, j; + + mutex_init(&priv->netq_lock); + netq_tx_map->num_used_queues = 0; + netq_for_each_tx_queue(priv, i) + netq_tx_map->queue[i].active = false; + netq_rx_map->num_used_queues = 0; + netq_for_each_rx_queue(priv, i) { + netq_rx_map->queue[i].active = false; + netq_rx_map->queue[i].is_rss = false; + netq_rx_map->queue[i].num_used_filters = 0; + for (j = 0; j < NETQ_NUM_RX_FILTERS_PER_Q; j++) { + netq_rx_map->queue[i].filters[j].active = false; + memset(netq_rx_map->queue[i].filters[j].u.mac, 0, ETH_ALEN * sizeof(u8)); + } + } + + VMKNETDDI_REGISTER_QUEUEOPS(dev, mlx4_en_netq_ops); + en_netq_info(priv, "registered net queue done\n"); + return; +} + + +/********************************/ + +#endif /* NET QUEUE */ diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.c new file mode 100755 index 0000000..04c0c25 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.c @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include + +#include +#include + +#include "en_port.h" +#include "mlx4_en.h" + + +int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv) +{ + struct mlx4_cmd_mailbox *mailbox; + struct mlx4_set_vlan_fltr_mbox *filter; + int i; + int j; + int index = 0; + u32 entry; + int err = 0; + + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + + filter = mailbox->buf; + memset(filter, 0, sizeof(*filter)); + for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) { + entry = 0; + for (j = 0; j < 32; j++) + if (test_bit(index++, priv->active_vlans)) + entry |= 1 << j; + filter->entry[i] = cpu_to_be32(entry); + } + err = mlx4_cmd(dev, mailbox->dma, priv->port, 0, MLX4_CMD_SET_VLAN_FLTR, + MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); + mlx4_free_cmd_mailbox(dev, mailbox); + return err; +} + +int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port) +{ + struct mlx4_en_query_port_context *qport_context; + struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]); + struct mlx4_en_port_state *state = &priv->port_state; + struct mlx4_cmd_mailbox *mailbox; + int err; + + mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + memset(mailbox->buf, 0, sizeof(*qport_context)); + err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, + MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_WRAPPED); + if (err) + goto out; + qport_context = mailbox->buf; + + /* This command is always accessed from Ethtool context + * already synchronized, no need in locking */ + state->link_state = !!(qport_context->link_up & MLX4_EN_LINK_UP_MASK); + switch (qport_context->link_speed & MLX4_EN_SPEED_MASK) { + case MLX4_EN_1G_SPEED: + state->link_speed = 1000; + break; + case MLX4_EN_10G_SPEED_XAUI: + case MLX4_EN_10G_SPEED_XFI: + state->link_speed = 10000; + break; + case MLX4_EN_40G_SPEED: + state->link_speed = 40000; + break; + default: + state->link_speed = -1; + break; + } + state->transciver = qport_context->transceiver; + +out: + mlx4_free_cmd_mailbox(mdev->dev, mailbox); + return err; +} + +int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset) +{ + struct mlx4_en_stat_out_mbox *mlx4_en_stats; + struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]); + struct net_device_stats *stats = &priv->stats; + struct mlx4_cmd_mailbox *mailbox; + u64 in_mod = reset << 8 | port; + int err; + int i; + + mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + memset(mailbox->buf, 0, sizeof(*mlx4_en_stats)); + err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0, + MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B, + MLX4_CMD_WRAPPED); + if (err) + goto out; + + mlx4_en_stats = mailbox->buf; + + spin_lock_bh(&priv->stats_lock); + + stats->rx_packets = 0; + stats->rx_bytes = 0; + priv->port_stats.rx_chksum_good = 0; + priv->port_stats.rx_chksum_none = 0; + for (i = 0; i < priv->rx_ring_num; i++) { + stats->rx_packets += priv->rx_ring[i].packets; + stats->rx_bytes += priv->rx_ring[i].bytes; + priv->port_stats.rx_chksum_good += priv->rx_ring[i].csum_ok; + priv->port_stats.rx_chksum_none += priv->rx_ring[i].csum_none; + } + stats->tx_packets = 0; + stats->tx_bytes = 0; + priv->port_stats.tx_chksum_offload = 0; + for (i = 0; i < priv->tx_ring_num; i++) { + stats->tx_packets += priv->tx_ring[i].packets; + stats->tx_bytes += priv->tx_ring[i].bytes; + priv->port_stats.tx_chksum_offload += priv->tx_ring[i].tx_csum; + } + + stats->rx_errors = be64_to_cpu(mlx4_en_stats->PCS) + + be32_to_cpu(mlx4_en_stats->RdropLength) + + be32_to_cpu(mlx4_en_stats->RJBBR) + + be32_to_cpu(mlx4_en_stats->RCRC) + + be32_to_cpu(mlx4_en_stats->RRUNT); + stats->tx_errors = be32_to_cpu(mlx4_en_stats->TDROP); + stats->multicast = be64_to_cpu(mlx4_en_stats->MCAST_prio_0) + + be64_to_cpu(mlx4_en_stats->MCAST_prio_1) + + be64_to_cpu(mlx4_en_stats->MCAST_prio_2) + + be64_to_cpu(mlx4_en_stats->MCAST_prio_3) + + be64_to_cpu(mlx4_en_stats->MCAST_prio_4) + + be64_to_cpu(mlx4_en_stats->MCAST_prio_5) + + be64_to_cpu(mlx4_en_stats->MCAST_prio_6) + + be64_to_cpu(mlx4_en_stats->MCAST_prio_7) + + be64_to_cpu(mlx4_en_stats->MCAST_novlan); + stats->collisions = 0; + stats->rx_length_errors = be32_to_cpu(mlx4_en_stats->RdropLength); + stats->rx_over_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw); + stats->rx_crc_errors = be32_to_cpu(mlx4_en_stats->RCRC); + stats->rx_frame_errors = 0; + stats->rx_fifo_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw); + stats->rx_missed_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw); + stats->tx_aborted_errors = 0; + stats->tx_carrier_errors = 0; + stats->tx_fifo_errors = 0; + stats->tx_heartbeat_errors = 0; + stats->tx_window_errors = 0; + + priv->pkstats.broadcast = + be64_to_cpu(mlx4_en_stats->RBCAST_prio_0) + + be64_to_cpu(mlx4_en_stats->RBCAST_prio_1) + + be64_to_cpu(mlx4_en_stats->RBCAST_prio_2) + + be64_to_cpu(mlx4_en_stats->RBCAST_prio_3) + + be64_to_cpu(mlx4_en_stats->RBCAST_prio_4) + + be64_to_cpu(mlx4_en_stats->RBCAST_prio_5) + + be64_to_cpu(mlx4_en_stats->RBCAST_prio_6) + + be64_to_cpu(mlx4_en_stats->RBCAST_prio_7) + + be64_to_cpu(mlx4_en_stats->RBCAST_novlan); + priv->pkstats.rx_prio[0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_0); + priv->pkstats.rx_prio[1] = be64_to_cpu(mlx4_en_stats->RTOT_prio_1); + priv->pkstats.rx_prio[2] = be64_to_cpu(mlx4_en_stats->RTOT_prio_2); + priv->pkstats.rx_prio[3] = be64_to_cpu(mlx4_en_stats->RTOT_prio_3); + priv->pkstats.rx_prio[4] = be64_to_cpu(mlx4_en_stats->RTOT_prio_4); + priv->pkstats.rx_prio[5] = be64_to_cpu(mlx4_en_stats->RTOT_prio_5); + priv->pkstats.rx_prio[6] = be64_to_cpu(mlx4_en_stats->RTOT_prio_6); + priv->pkstats.rx_prio[7] = be64_to_cpu(mlx4_en_stats->RTOT_prio_7); + priv->pkstats.tx_prio[0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_0); + priv->pkstats.tx_prio[1] = be64_to_cpu(mlx4_en_stats->TTOT_prio_1); + priv->pkstats.tx_prio[2] = be64_to_cpu(mlx4_en_stats->TTOT_prio_2); + priv->pkstats.tx_prio[3] = be64_to_cpu(mlx4_en_stats->TTOT_prio_3); + priv->pkstats.tx_prio[4] = be64_to_cpu(mlx4_en_stats->TTOT_prio_4); + priv->pkstats.tx_prio[5] = be64_to_cpu(mlx4_en_stats->TTOT_prio_5); + priv->pkstats.tx_prio[6] = be64_to_cpu(mlx4_en_stats->TTOT_prio_6); + priv->pkstats.tx_prio[7] = be64_to_cpu(mlx4_en_stats->TTOT_prio_7); + spin_unlock_bh(&priv->stats_lock); + +out: + mlx4_free_cmd_mailbox(mdev->dev, mailbox); + return err; +} + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.h b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.h new file mode 100755 index 0000000..51fe812 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_port.h @@ -0,0 +1,538 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _MLX4_EN_PORT_H_ +#define _MLX4_EN_PORT_H_ + + +#define SET_PORT_GEN_ALL_VALID 0x7 +#define SET_PORT_PROMISC_SHIFT 31 +#define SET_PORT_MC_PROMISC_SHIFT 30 + +#define VLAN_FLTR_SIZE 128 +struct mlx4_set_vlan_fltr_mbox { + __be32 entry[VLAN_FLTR_SIZE]; +}; + + +enum { + MLX4_MCAST_CONFIG = 0, + MLX4_MCAST_DISABLE = 1, + MLX4_MCAST_ENABLE = 2, +}; + +enum { + MLX4_EN_1G_SPEED = 0x02, + MLX4_EN_10G_SPEED_XFI = 0x01, + MLX4_EN_10G_SPEED_XAUI = 0x00, + MLX4_EN_40G_SPEED = 0x40, + MLX4_EN_OTHER_SPEED = 0x0f, +}; + +struct mlx4_en_query_port_context { + u8 link_up; +#define MLX4_EN_LINK_UP_MASK 0x80 + u8 reserved; + __be16 mtu; + u8 reserved2; + u8 link_speed; +#define MLX4_EN_SPEED_MASK 0x43 + u16 reserved3[5]; + __be64 mac; + u8 transceiver; +}; + + +struct mlx4_en_stat_out_mbox { + /* Received frames with a length of 64 octets */ + __be64 R64_prio_0; + __be64 R64_prio_1; + __be64 R64_prio_2; + __be64 R64_prio_3; + __be64 R64_prio_4; + __be64 R64_prio_5; + __be64 R64_prio_6; + __be64 R64_prio_7; + __be64 R64_novlan; + /* Received frames with a length of 127 octets */ + __be64 R127_prio_0; + __be64 R127_prio_1; + __be64 R127_prio_2; + __be64 R127_prio_3; + __be64 R127_prio_4; + __be64 R127_prio_5; + __be64 R127_prio_6; + __be64 R127_prio_7; + __be64 R127_novlan; + /* Received frames with a length of 255 octets */ + __be64 R255_prio_0; + __be64 R255_prio_1; + __be64 R255_prio_2; + __be64 R255_prio_3; + __be64 R255_prio_4; + __be64 R255_prio_5; + __be64 R255_prio_6; + __be64 R255_prio_7; + __be64 R255_novlan; + /* Received frames with a length of 511 octets */ + __be64 R511_prio_0; + __be64 R511_prio_1; + __be64 R511_prio_2; + __be64 R511_prio_3; + __be64 R511_prio_4; + __be64 R511_prio_5; + __be64 R511_prio_6; + __be64 R511_prio_7; + __be64 R511_novlan; + /* Received frames with a length of 1023 octets */ + __be64 R1023_prio_0; + __be64 R1023_prio_1; + __be64 R1023_prio_2; + __be64 R1023_prio_3; + __be64 R1023_prio_4; + __be64 R1023_prio_5; + __be64 R1023_prio_6; + __be64 R1023_prio_7; + __be64 R1023_novlan; + /* Received frames with a length of 1518 octets */ + __be64 R1518_prio_0; + __be64 R1518_prio_1; + __be64 R1518_prio_2; + __be64 R1518_prio_3; + __be64 R1518_prio_4; + __be64 R1518_prio_5; + __be64 R1518_prio_6; + __be64 R1518_prio_7; + __be64 R1518_novlan; + /* Received frames with a length of 1522 octets */ + __be64 R1522_prio_0; + __be64 R1522_prio_1; + __be64 R1522_prio_2; + __be64 R1522_prio_3; + __be64 R1522_prio_4; + __be64 R1522_prio_5; + __be64 R1522_prio_6; + __be64 R1522_prio_7; + __be64 R1522_novlan; + /* Received frames with a length of 1548 octets */ + __be64 R1548_prio_0; + __be64 R1548_prio_1; + __be64 R1548_prio_2; + __be64 R1548_prio_3; + __be64 R1548_prio_4; + __be64 R1548_prio_5; + __be64 R1548_prio_6; + __be64 R1548_prio_7; + __be64 R1548_novlan; + /* Received frames with a length of 1548 < octets < MTU */ + __be64 R2MTU_prio_0; + __be64 R2MTU_prio_1; + __be64 R2MTU_prio_2; + __be64 R2MTU_prio_3; + __be64 R2MTU_prio_4; + __be64 R2MTU_prio_5; + __be64 R2MTU_prio_6; + __be64 R2MTU_prio_7; + __be64 R2MTU_novlan; + /* Received frames with a length of MTU< octets and good CRC */ + __be64 RGIANT_prio_0; + __be64 RGIANT_prio_1; + __be64 RGIANT_prio_2; + __be64 RGIANT_prio_3; + __be64 RGIANT_prio_4; + __be64 RGIANT_prio_5; + __be64 RGIANT_prio_6; + __be64 RGIANT_prio_7; + __be64 RGIANT_novlan; + /* Received broadcast frames with good CRC */ + __be64 RBCAST_prio_0; + __be64 RBCAST_prio_1; + __be64 RBCAST_prio_2; + __be64 RBCAST_prio_3; + __be64 RBCAST_prio_4; + __be64 RBCAST_prio_5; + __be64 RBCAST_prio_6; + __be64 RBCAST_prio_7; + __be64 RBCAST_novlan; + /* Received multicast frames with good CRC */ + __be64 MCAST_prio_0; + __be64 MCAST_prio_1; + __be64 MCAST_prio_2; + __be64 MCAST_prio_3; + __be64 MCAST_prio_4; + __be64 MCAST_prio_5; + __be64 MCAST_prio_6; + __be64 MCAST_prio_7; + __be64 MCAST_novlan; + /* Received unicast not short or GIANT frames with good CRC */ + __be64 RTOTG_prio_0; + __be64 RTOTG_prio_1; + __be64 RTOTG_prio_2; + __be64 RTOTG_prio_3; + __be64 RTOTG_prio_4; + __be64 RTOTG_prio_5; + __be64 RTOTG_prio_6; + __be64 RTOTG_prio_7; + __be64 RTOTG_novlan; + + /* Count of total octets of received frames, includes framing characters */ + __be64 RTTLOCT_prio_0; + /* Count of total octets of received frames, not including framing + characters */ + __be64 RTTLOCT_NOFRM_prio_0; + /* Count of Total number of octets received + (only for frames without errors) */ + __be64 ROCT_prio_0; + + __be64 RTTLOCT_prio_1; + __be64 RTTLOCT_NOFRM_prio_1; + __be64 ROCT_prio_1; + + __be64 RTTLOCT_prio_2; + __be64 RTTLOCT_NOFRM_prio_2; + __be64 ROCT_prio_2; + + __be64 RTTLOCT_prio_3; + __be64 RTTLOCT_NOFRM_prio_3; + __be64 ROCT_prio_3; + + __be64 RTTLOCT_prio_4; + __be64 RTTLOCT_NOFRM_prio_4; + __be64 ROCT_prio_4; + + __be64 RTTLOCT_prio_5; + __be64 RTTLOCT_NOFRM_prio_5; + __be64 ROCT_prio_5; + + __be64 RTTLOCT_prio_6; + __be64 RTTLOCT_NOFRM_prio_6; + __be64 ROCT_prio_6; + + __be64 RTTLOCT_prio_7; + __be64 RTTLOCT_NOFRM_prio_7; + __be64 ROCT_prio_7; + + __be64 RTTLOCT_novlan; + __be64 RTTLOCT_NOFRM_novlan; + __be64 ROCT_novlan; + + /* Count of Total received frames including bad frames */ + __be64 RTOT_prio_0; + /* Count of Total number of received frames with 802.1Q encapsulation */ + __be64 R1Q_prio_0; + __be64 reserved1; + + __be64 RTOT_prio_1; + __be64 R1Q_prio_1; + __be64 reserved2; + + __be64 RTOT_prio_2; + __be64 R1Q_prio_2; + __be64 reserved3; + + __be64 RTOT_prio_3; + __be64 R1Q_prio_3; + __be64 reserved4; + + __be64 RTOT_prio_4; + __be64 R1Q_prio_4; + __be64 reserved5; + + __be64 RTOT_prio_5; + __be64 R1Q_prio_5; + __be64 reserved6; + + __be64 RTOT_prio_6; + __be64 R1Q_prio_6; + __be64 reserved7; + + __be64 RTOT_prio_7; + __be64 R1Q_prio_7; + __be64 reserved8; + + __be64 RTOT_novlan; + __be64 R1Q_novlan; + __be64 reserved9; + + /* Total number of Successfully Received Control Frames */ + __be64 RCNTL; + __be64 reserved10; + __be64 reserved11; + __be64 reserved12; + /* Count of received frames with a length/type field value between 46 + (42 for VLANtagged frames) and 1500 (also 1500 for VLAN-tagged frames), + inclusive */ + __be64 RInRangeLengthErr; + /* Count of received frames with length/type field between 1501 and 1535 + decimal, inclusive */ + __be64 ROutRangeLengthErr; + /* Count of received frames that are longer than max allowed size for + 802.3 frames (1518/1522) */ + __be64 RFrmTooLong; + /* Count frames received with PCS error */ + __be64 PCS; + + /* Transmit frames with a length of 64 octets */ + __be64 T64_prio_0; + __be64 T64_prio_1; + __be64 T64_prio_2; + __be64 T64_prio_3; + __be64 T64_prio_4; + __be64 T64_prio_5; + __be64 T64_prio_6; + __be64 T64_prio_7; + __be64 T64_novlan; + __be64 T64_loopbk; + /* Transmit frames with a length of 65 to 127 octets. */ + __be64 T127_prio_0; + __be64 T127_prio_1; + __be64 T127_prio_2; + __be64 T127_prio_3; + __be64 T127_prio_4; + __be64 T127_prio_5; + __be64 T127_prio_6; + __be64 T127_prio_7; + __be64 T127_novlan; + __be64 T127_loopbk; + /* Transmit frames with a length of 128 to 255 octets */ + __be64 T255_prio_0; + __be64 T255_prio_1; + __be64 T255_prio_2; + __be64 T255_prio_3; + __be64 T255_prio_4; + __be64 T255_prio_5; + __be64 T255_prio_6; + __be64 T255_prio_7; + __be64 T255_novlan; + __be64 T255_loopbk; + /* Transmit frames with a length of 256 to 511 octets */ + __be64 T511_prio_0; + __be64 T511_prio_1; + __be64 T511_prio_2; + __be64 T511_prio_3; + __be64 T511_prio_4; + __be64 T511_prio_5; + __be64 T511_prio_6; + __be64 T511_prio_7; + __be64 T511_novlan; + __be64 T511_loopbk; + /* Transmit frames with a length of 512 to 1023 octets */ + __be64 T1023_prio_0; + __be64 T1023_prio_1; + __be64 T1023_prio_2; + __be64 T1023_prio_3; + __be64 T1023_prio_4; + __be64 T1023_prio_5; + __be64 T1023_prio_6; + __be64 T1023_prio_7; + __be64 T1023_novlan; + __be64 T1023_loopbk; + /* Transmit frames with a length of 1024 to 1518 octets */ + __be64 T1518_prio_0; + __be64 T1518_prio_1; + __be64 T1518_prio_2; + __be64 T1518_prio_3; + __be64 T1518_prio_4; + __be64 T1518_prio_5; + __be64 T1518_prio_6; + __be64 T1518_prio_7; + __be64 T1518_novlan; + __be64 T1518_loopbk; + /* Counts transmit frames with a length of 1519 to 1522 bytes */ + __be64 T1522_prio_0; + __be64 T1522_prio_1; + __be64 T1522_prio_2; + __be64 T1522_prio_3; + __be64 T1522_prio_4; + __be64 T1522_prio_5; + __be64 T1522_prio_6; + __be64 T1522_prio_7; + __be64 T1522_novlan; + __be64 T1522_loopbk; + /* Transmit frames with a length of 1523 to 1548 octets */ + __be64 T1548_prio_0; + __be64 T1548_prio_1; + __be64 T1548_prio_2; + __be64 T1548_prio_3; + __be64 T1548_prio_4; + __be64 T1548_prio_5; + __be64 T1548_prio_6; + __be64 T1548_prio_7; + __be64 T1548_novlan; + __be64 T1548_loopbk; + /* Counts transmit frames with a length of 1549 to MTU bytes */ + __be64 T2MTU_prio_0; + __be64 T2MTU_prio_1; + __be64 T2MTU_prio_2; + __be64 T2MTU_prio_3; + __be64 T2MTU_prio_4; + __be64 T2MTU_prio_5; + __be64 T2MTU_prio_6; + __be64 T2MTU_prio_7; + __be64 T2MTU_novlan; + __be64 T2MTU_loopbk; + /* Transmit frames with a length greater than MTU octets and a good CRC. */ + __be64 TGIANT_prio_0; + __be64 TGIANT_prio_1; + __be64 TGIANT_prio_2; + __be64 TGIANT_prio_3; + __be64 TGIANT_prio_4; + __be64 TGIANT_prio_5; + __be64 TGIANT_prio_6; + __be64 TGIANT_prio_7; + __be64 TGIANT_novlan; + __be64 TGIANT_loopbk; + /* Transmit broadcast frames with a good CRC */ + __be64 TBCAST_prio_0; + __be64 TBCAST_prio_1; + __be64 TBCAST_prio_2; + __be64 TBCAST_prio_3; + __be64 TBCAST_prio_4; + __be64 TBCAST_prio_5; + __be64 TBCAST_prio_6; + __be64 TBCAST_prio_7; + __be64 TBCAST_novlan; + __be64 TBCAST_loopbk; + /* Transmit multicast frames with a good CRC */ + __be64 TMCAST_prio_0; + __be64 TMCAST_prio_1; + __be64 TMCAST_prio_2; + __be64 TMCAST_prio_3; + __be64 TMCAST_prio_4; + __be64 TMCAST_prio_5; + __be64 TMCAST_prio_6; + __be64 TMCAST_prio_7; + __be64 TMCAST_novlan; + __be64 TMCAST_loopbk; + /* Transmit good frames that are neither broadcast nor multicast */ + __be64 TTOTG_prio_0; + __be64 TTOTG_prio_1; + __be64 TTOTG_prio_2; + __be64 TTOTG_prio_3; + __be64 TTOTG_prio_4; + __be64 TTOTG_prio_5; + __be64 TTOTG_prio_6; + __be64 TTOTG_prio_7; + __be64 TTOTG_novlan; + __be64 TTOTG_loopbk; + + /* total octets of transmitted frames, including framing characters */ + __be64 TTTLOCT_prio_0; + /* total octets of transmitted frames, not including framing characters */ + __be64 TTTLOCT_NOFRM_prio_0; + /* ifOutOctets */ + __be64 TOCT_prio_0; + + __be64 TTTLOCT_prio_1; + __be64 TTTLOCT_NOFRM_prio_1; + __be64 TOCT_prio_1; + + __be64 TTTLOCT_prio_2; + __be64 TTTLOCT_NOFRM_prio_2; + __be64 TOCT_prio_2; + + __be64 TTTLOCT_prio_3; + __be64 TTTLOCT_NOFRM_prio_3; + __be64 TOCT_prio_3; + + __be64 TTTLOCT_prio_4; + __be64 TTTLOCT_NOFRM_prio_4; + __be64 TOCT_prio_4; + + __be64 TTTLOCT_prio_5; + __be64 TTTLOCT_NOFRM_prio_5; + __be64 TOCT_prio_5; + + __be64 TTTLOCT_prio_6; + __be64 TTTLOCT_NOFRM_prio_6; + __be64 TOCT_prio_6; + + __be64 TTTLOCT_prio_7; + __be64 TTTLOCT_NOFRM_prio_7; + __be64 TOCT_prio_7; + + __be64 TTTLOCT_novlan; + __be64 TTTLOCT_NOFRM_novlan; + __be64 TOCT_novlan; + + __be64 TTTLOCT_loopbk; + __be64 TTTLOCT_NOFRM_loopbk; + __be64 TOCT_loopbk; + + /* Total frames transmitted with a good CRC that are not aborted */ + __be64 TTOT_prio_0; + /* Total number of frames transmitted with 802.1Q encapsulation */ + __be64 T1Q_prio_0; + __be64 reserved13; + + __be64 TTOT_prio_1; + __be64 T1Q_prio_1; + __be64 reserved14; + + __be64 TTOT_prio_2; + __be64 T1Q_prio_2; + __be64 reserved15; + + __be64 TTOT_prio_3; + __be64 T1Q_prio_3; + __be64 reserved16; + + __be64 TTOT_prio_4; + __be64 T1Q_prio_4; + __be64 reserved17; + + __be64 TTOT_prio_5; + __be64 T1Q_prio_5; + __be64 reserved18; + + __be64 TTOT_prio_6; + __be64 T1Q_prio_6; + __be64 reserved19; + + __be64 TTOT_prio_7; + __be64 T1Q_prio_7; + __be64 reserved20; + + __be64 TTOT_novlan; + __be64 T1Q_novlan; + __be64 reserved21; + + __be64 TTOT_loopbk; + __be64 T1Q_loopbk; + __be64 reserved22; + + /* Received frames with a length greater than MTU octets and a bad CRC */ + __be32 RJBBR; + /* Received frames with a bad CRC that are not runts, jabbers, + or alignment errors */ + __be32 RCRC; + /* Received frames with SFD with a length of less than 64 octets and a + bad CRC */ + __be32 RRUNT; + /* Received frames with a length less than 64 octets and a good CRC */ + __be32 RSHORT; + /* Total Number of Received Packets Dropped */ + __be32 RDROP; + /* Drop due to overflow */ + __be32 RdropOvflw; + /* Drop due to overflow */ + __be32 RdropLength; + /* Total of good frames. Does not include frames received with + frame-too-long, FCS, or length errors */ + __be32 RTOTFRMS; + /* Total dropped Xmited packets */ + __be32 TDROP; +}; + + +#endif diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_resources.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_resources.c new file mode 100755 index 0000000..8a043e1 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_resources.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#ifdef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "mlx4_en.h" + +void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride, + int is_tx, int rss, int qpn, int cqn, + struct mlx4_qp_context *context) +{ + struct mlx4_en_dev *mdev = priv->mdev; + + memset(context, 0, sizeof *context); + context->flags = cpu_to_be32(7 << 16 | rss << MLX4_RSS_QPC_FLAG_OFFSET); + context->pd = cpu_to_be32(mdev->priv_pdn); + context->mtu_msgmax = 0xff; + if (!is_tx && !rss) + context->rq_size_stride = ilog2(size) << 3 | (ilog2(stride) - 4); + if (is_tx) + context->sq_size_stride = ilog2(size) << 3 | (ilog2(stride) - 4); + else + context->sq_size_stride = ilog2(TXBB_SIZE) - 4; + context->usr_page = cpu_to_be32(mdev->priv_uar.index); + context->local_qpn = cpu_to_be32(qpn); + context->pri_path.ackto = 1 & 0x07; + context->pri_path.sched_queue = 0x83 | (priv->port - 1) << 6; + context->pri_path.counter_index = 0xff; + context->cqn_send = cpu_to_be32(cqn); + context->cqn_recv = cpu_to_be32(cqn); + context->db_rec_addr = cpu_to_be64(priv->res.db.dma << 2); +} + + +int mlx4_en_map_buffer(struct mlx4_buf *buf) +{ + struct page **pages; + int i; + + if (BITS_PER_LONG == 64 || buf->nbufs == 1) + return 0; + + pages = kmalloc(sizeof *pages * buf->nbufs, GFP_KERNEL); + if (!pages) + return -ENOMEM; + + for (i = 0; i < buf->nbufs; ++i) + pages[i] = virt_to_page(buf->page_list[i].buf); + + buf->direct.buf = vmap(pages, buf->nbufs, VM_MAP, PAGE_KERNEL); + kfree(pages); + if (!buf->direct.buf) + return -ENOMEM; + + return 0; +} + +void mlx4_en_unmap_buffer(struct mlx4_buf *buf) +{ + if (BITS_PER_LONG == 64 || buf->nbufs == 1) + return; + + vunmap(buf->direct.buf); +} + +void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event) +{ + return; +} + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx.c new file mode 100755 index 0000000..66bf4ca --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx.c @@ -0,0 +1,1156 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#ifdef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "mlx4_en.h" + + +#ifdef __VMKERNEL_MODULE__ +static int mlx4_en_alloc_frag(struct mlx4_en_priv *priv, + struct mlx4_en_rx_desc *rx_desc, + struct skb_frag_struct *skb_frags, + struct mlx4_en_rx_alloc *ring_alloc, + int i) +{ + struct mlx4_en_frag_info *frag_info = &priv->frag_info[i]; + struct mlx4_en_rx_alloc *page_alloc = &ring_alloc[i]; + struct page *page; + dma_addr_t dma; + + /* Allocate new page for every fragment */ + page = alloc_pages(GFP_ATOMIC | __GFP_COMP, MLX4_EN_ALLOC_ORDER); + if (!page) + return -ENOMEM; + + skb_frags[i].page = page_alloc->page; + skb_frags[i].page_offset = page_alloc->offset; + page_alloc->page = page; + page_alloc->offset = frag_info->frag_align; + + dma = dma_map_single(priv->ddev, page_address(skb_frags[i].page) + + skb_frags[i].page_offset, frag_info->frag_size, + PCI_DMA_FROMDEVICE); + if (unlikely(dma_mapping_error(dma))) { + en_err(priv, "Failed dma mapping page for RX buffer\n"); + put_page(page); + return -EFAULT; + } + rx_desc->data[i].addr = cpu_to_be64(dma); + return 0; +} + +#else + +static int mlx4_en_alloc_frag(struct mlx4_en_priv *priv, + struct mlx4_en_rx_desc *rx_desc, + struct page_frag *skb_frags, + struct mlx4_en_rx_alloc *ring_alloc, + int i) +{ + struct mlx4_en_frag_info *frag_info = &priv->frag_info[i]; + struct mlx4_en_rx_alloc *page_alloc = &ring_alloc[i]; + struct page *page; + dma_addr_t dma; + bool new_page = false; + + if (page_alloc->offset == frag_info->last_offset) { + /* Allocate new page */ + page = alloc_pages(GFP_ATOMIC | __GFP_COMP, MLX4_EN_ALLOC_ORDER); + if (!page) + return -ENOMEM; + + skb_frags[i].page = page_alloc->page; + skb_frags[i].offset = page_alloc->offset; + page_alloc->page = page; + page_alloc->offset = frag_info->frag_align; + new_page = true; + } else { + page = page_alloc->page; + get_page(page); + + skb_frags[i].page = page; + skb_frags[i].offset = page_alloc->offset; + page_alloc->offset += frag_info->frag_stride; + } + dma = dma_map_single(priv->ddev, page_address(skb_frags[i].page) + + skb_frags[i].offset, frag_info->frag_size, + PCI_DMA_FROMDEVICE); + if (unlikely(dma_mapping_error(priv->ddev, dma))) { + en_err(priv, "Failed dma mapping page for RX buffer\n"); + put_page(page); + if (new_page) + page_alloc->offset = frag_info->last_offset; + else + page_alloc->offset -= frag_info->frag_stride; + return -EFAULT; + } + rx_desc->data[i].addr = cpu_to_be64(dma); + return 0; +} +#endif /* __VMKERNEL_MODULE__ */ + +static int mlx4_en_init_allocator(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring) +{ + struct mlx4_en_rx_alloc *page_alloc; + int i; + + for (i = 0; i < priv->num_frags; i++) { + page_alloc = &ring->page_alloc[i]; + page_alloc->page = alloc_pages(GFP_ATOMIC | __GFP_COMP, + MLX4_EN_ALLOC_ORDER); + if (!page_alloc->page) + goto out; + + page_alloc->offset = priv->frag_info[i].frag_align; + en_dbg(DRV, priv, "Initialized allocator:%d with page:%p\n", + i, page_alloc->page); + } + return 0; + +out: + while (i--) { + page_alloc = &ring->page_alloc[i]; + put_page(page_alloc->page); + page_alloc->page = NULL; + } + return -ENOMEM; +} + +static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring) +{ + struct mlx4_en_rx_alloc *page_alloc; + int i; + + for (i = 0; i < priv->num_frags; i++) { + page_alloc = &ring->page_alloc[i]; +#ifndef __VMKERNEL_MODULE__ + en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n", + i, page_count(page_alloc->page)); +#endif /* NOT __VMKERNEL_MODULE__ */ + + put_page(page_alloc->page); + page_alloc->page = NULL; + } +} + +static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, int index) +{ + struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index; + struct skb_frag_struct *skb_frags = ring->rx_info + + (index << priv->log_rx_info); + int possible_frags; + int i; + + /* Set size and memtype fields */ + for (i = 0; i < priv->num_frags; i++) { + skb_frag_size_set(&skb_frags[i], priv->frag_info[i].frag_size); + rx_desc->data[i].byte_count = + cpu_to_be32(priv->frag_info[i].frag_size); + rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key); + } + + /* If the number of used fragments does not fill up the ring stride, + * remaining (unused) fragments must be padded with null address/size + * and a special memory key */ + possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE; + for (i = priv->num_frags; i < possible_frags; i++) { + rx_desc->data[i].byte_count = 0; + rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD); + rx_desc->data[i].addr = 0; + } +} + +static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, int index) +{ + struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride); +#ifndef __VMKERNEL_MODULE__ + struct page_frag *skb_frags = ring->rx_info + + (index << priv->log_rx_info); +#else + struct skb_frag_struct *skb_frags = ring->rx_info + + (index << priv->log_rx_info); +#endif /* NOT __VMKERNEL_MODULE__ */ + int i; + + for (i = 0; i < priv->num_frags; i++) + if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, ring->page_alloc, i)) + goto err; + + return 0; + +err: + while (i--) { + dma_addr_t dma = be64_to_cpu(rx_desc->data[i].addr); + pci_unmap_single(priv->mdev->pdev, dma, skb_frags[i].size, + PCI_DMA_FROMDEVICE); + put_page(skb_frags[i].page); + } + return -ENOMEM; +} + +static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring) +{ + *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff); +} + +static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, + int index) +{ +#ifndef __VMKERNEL_MODULE__ + struct page_frag *skb_frags; +#else + struct skb_frag_struct *skb_frags; +#endif /* NOT __VMKERNEL_MODULE__ */ + struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride); + dma_addr_t dma; + int nr; + + skb_frags = ring->rx_info + (index << priv->log_rx_info); + for (nr = 0; nr < priv->num_frags; nr++) { + en_dbg(DRV, priv, "Freeing fragment:%d\n", nr); + dma = be64_to_cpu(rx_desc->data[nr].addr); + + en_dbg(DRV, priv, "Unmapping buffer at dma:0x%llx\n", (u64) dma); + dma_unmap_single(priv->ddev, dma, skb_frags[nr].size, + PCI_DMA_FROMDEVICE); + put_page(skb_frags[nr].page); + } +} + +static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv) +{ + struct mlx4_en_rx_ring *ring; + int ring_ind; + int buf_ind; + int new_size; +#ifdef __VMKERNEL_MODULE__ + int err; +#endif /* __VMKERNEL_MODULE__ */ + + for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) { + for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { + ring = &priv->rx_ring[ring_ind]; + +#ifndef __VMKERNEL_MODULE__ + if (mlx4_en_prepare_rx_desc(priv, ring, + ring->actual_size)) { +#else + if (priv->use_rx_frags) + err = mlx4_en_prepare_rx_desc(priv, ring, ring->actual_size); + else + err = mlx4_en_prepare_rx_desc_skb(priv, ring, ring->actual_size); + + if (err) { +#endif /* __VMKERNEL_MODULE__ */ + if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) { + en_err(priv, "Failed to allocate " + "enough rx buffers\n"); + return -ENOMEM; + } else { + new_size = rounddown_pow_of_two(ring->actual_size); + en_warn(priv, "Only %d buffers allocated " + "reducing ring size to %d", + ring->actual_size, new_size); + goto reduce_rings; + } + } + ring->actual_size++; + ring->prod++; + } + } + return 0; + +reduce_rings: + for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { + ring = &priv->rx_ring[ring_ind]; + while (ring->actual_size > new_size) { + ring->actual_size--; + ring->prod--; +#ifndef __VMKERNEL_MODULE__ + mlx4_en_free_rx_desc(priv, ring, ring->actual_size); +#else + if (priv->use_rx_frags) + mlx4_en_free_rx_desc(priv, ring, ring->actual_size); + else + mlx4_en_free_rx_desc_skb(priv, ring, ring->actual_size); +#endif /* __VMKERNEL_MODULE__ */ + } + } + + return 0; +} + +static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring) +{ + int index; + + en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n", + ring->cons, ring->prod); + + /* Unmap and free Rx buffers */ + BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size); + while (ring->cons != ring->prod) { + index = ring->cons & ring->size_mask; + en_dbg(DRV, priv, "Processing descriptor:%d\n", index); +#ifndef __VMKERNEL_MODULE__ + mlx4_en_free_rx_desc(priv, ring, index); +#else + if (priv->use_rx_frags) + mlx4_en_free_rx_desc(priv, ring, index); + else + mlx4_en_free_rx_desc_skb(priv, ring, index); +#endif /* __VMKERNEL_MODULE__ */ + ++ring->cons; + } +} + +int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, u32 size, u16 stride) +{ + struct mlx4_en_dev *mdev = priv->mdev; + int err; + int tmp; + + + ring->prod = 0; + ring->cons = 0; + ring->size = size; + ring->size_mask = size - 1; + ring->stride = stride; + ring->log_stride = ffs(ring->stride) - 1; + ring->buf_size = ring->size * ring->stride + TXBB_SIZE; + +#ifndef __VMKERNEL_MODULE__ + tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS * + sizeof(struct skb_frag_struct)); +#else + if (priv->use_rx_frags) + tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS * + sizeof(struct skb_frag_struct)); + else + tmp = size * sizeof(struct sk_buff *); +#endif /* __VMKERNEL_MODULE__ */ + + ring->rx_info = vmalloc(tmp); + if (!ring->rx_info) + return -ENOMEM; + + en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n", + ring->rx_info, tmp); + + err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, + ring->buf_size, 2 * PAGE_SIZE); + if (err) + goto err_ring; + + err = mlx4_en_map_buffer(&ring->wqres.buf); + if (err) { + en_err(priv, "Failed to map RX buffer\n"); + goto err_hwq; + } + ring->buf = ring->wqres.buf.direct.buf; + + return 0; + +err_hwq: + mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); +err_ring: + vfree(ring->rx_info); + ring->rx_info = NULL; + return err; +} + +int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv) +{ + struct mlx4_en_rx_ring *ring; + int i; + int ring_ind; + int err; +#ifndef __VMKERNEL_MODULE__ + int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + + DS_SIZE * priv->num_frags); +#else + int stride = priv->use_rx_frags ? + roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + + DS_SIZE * priv->num_frags) : 0; +#endif /* __VMKERNEL_MODULE__ */ + + for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { + ring = &priv->rx_ring[ring_ind]; + + ring->prod = 0; + ring->cons = 0; + ring->actual_size = 0; + ring->cqn = priv->rx_cq[ring_ind].mcq.cqn; + +#ifndef __VMKERNEL_MODULE__ + ring->stride = stride; +#else + if (priv->use_rx_frags) + ring->stride = stride; +#endif /* __VMKERNEL_MODULE__ */ + if (ring->stride <= TXBB_SIZE) + ring->buf += TXBB_SIZE; + + ring->log_stride = ffs(ring->stride) - 1; + ring->buf_size = ring->size * ring->stride; + + memset(ring->buf, 0, ring->buf_size); + mlx4_en_update_rx_prod_db(ring); + +#ifndef __VMKERNEL_MODULE__ + /* Initailize all descriptors */ + for (i = 0; i < ring->size; i++) + mlx4_en_init_rx_desc(priv, ring, i); + + /* Initialize page allocators */ + err = mlx4_en_init_allocator(priv, ring); + if (err) { + en_err(priv, "Failed initializing ring allocator\n"); + if (ring->stride <= TXBB_SIZE) + ring->buf -= TXBB_SIZE; + ring_ind--; + goto err_allocator; + } +#else + /* Initailize all descriptors */ + for (i = 0; i < ring->size; i++) { + if (priv->use_rx_frags) + mlx4_en_init_rx_desc(priv, ring, i); + else + mlx4_en_init_rx_desc_skb(priv, ring, i); + } + + if (priv->use_rx_frags) { + /* Initialize page allocators */ + err = mlx4_en_init_allocator(priv, ring); + if (err) { + en_err(priv, "Failed initializing ring allocator\n"); + if (ring->stride <= TXBB_SIZE) + ring->buf -= TXBB_SIZE; + ring_ind--; + goto err_allocator; + } + } +#endif /* __VMKERNEL_MODULE__ */ + + } + err = mlx4_en_fill_rx_buffers(priv); + if (err) + goto err_buffers; + + for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { + ring = &priv->rx_ring[ring_ind]; + + ring->size_mask = ring->actual_size - 1; + mlx4_en_update_rx_prod_db(ring); + } + + return 0; + +err_buffers: + for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) + mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]); + + ring_ind = priv->rx_ring_num - 1; + +err_allocator: +#ifndef __VMKERNEL_MODULE__ + while (ring_ind >= 0) { + if (priv->rx_ring[ring_ind].stride <= TXBB_SIZE) + priv->rx_ring[ring_ind].buf -= TXBB_SIZE; + mlx4_en_destroy_allocator(priv, &priv->rx_ring[ring_ind]); + ring_ind--; + } +#else + while (ring_ind >= 0) { + if (priv->rx_ring[ring_ind].stride <= TXBB_SIZE) + priv->rx_ring[ring_ind].buf -= TXBB_SIZE; + if (priv->use_rx_frags) + mlx4_en_destroy_allocator(priv, &priv->rx_ring[ring_ind]); + ring_ind--; + } +#endif /* __VMKERNEL_MODULE__ */ + + return err; +} + +void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, u32 size, u16 stride) +{ + struct mlx4_en_dev *mdev = priv->mdev; + + mlx4_en_unmap_buffer(&ring->wqres.buf); + mlx4_free_hwq_res(mdev->dev, &ring->wqres, size * stride + TXBB_SIZE); + vfree(ring->rx_info); + ring->rx_info = NULL; +} + +void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring) +{ + mlx4_en_free_rx_buf(priv, ring); + if (ring->stride <= TXBB_SIZE) + ring->buf -= TXBB_SIZE; +#ifndef __VMKERNEL_MODULE__ + mlx4_en_destroy_allocator(priv, ring); +#else + if (priv->use_rx_frags) + mlx4_en_destroy_allocator(priv, ring); +#endif /* __VMKERNEL_MODULE__ */ +} + +/* Unmap a completed descriptor and free unused pages */ +static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv, + struct mlx4_en_rx_desc *rx_desc, +#ifndef __VMKERNEL_MODULE__ + struct page_frag *skb_frags, +#else + struct skb_frag_struct *skb_frags, +#endif /* NOT __VMKERNEL_MODULE__ */ + struct sk_buff *skb, + struct mlx4_en_rx_alloc *page_alloc, + int length) +{ + struct skb_frag_struct *skb_frags_rx = skb_shinfo(skb)->frags; + struct mlx4_en_frag_info *frag_info; + int nr; + dma_addr_t dma; + + /* Collect used fragments while replacing them in the HW descirptors */ + for (nr = 0; nr < priv->num_frags; nr++) { + frag_info = &priv->frag_info[nr]; + if (length <= frag_info->frag_prefix_size) + break; + + /* Save page reference in skb */ + __skb_frag_set_page(&skb_frags_rx[nr], skb_frags[nr].page); + skb_frag_size_set(&skb_frags_rx[nr], skb_frags[nr].size); +#ifndef __VMKERNEL_MODULE__ + skb_frags_rx[nr].page_offset = skb_frags[nr].offset; +#else + skb_frags_rx[nr].page_offset = skb_frags[nr].page_offset; +#endif /* NOT __VMKERNEL_MODULE__ */ + skb->truesize += frag_info->frag_stride; + dma = be64_to_cpu(rx_desc->data[nr].addr); + + /* Allocate a replacement page */ + if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, page_alloc, nr)) + goto fail; + + /* Unmap buffer */ + dma_unmap_single(priv->ddev, dma, skb_frag_size(&skb_frags_rx[nr]), + PCI_DMA_FROMDEVICE); + } + /* Adjust size of last fragment to match actual length */ + if (nr > 0) + skb_frag_size_set(&skb_frags_rx[nr - 1], + length - priv->frag_info[nr - 1].frag_prefix_size); + return nr; + +fail: + /* Drop all accumulated fragments (which have already been replaced in + * the descriptor) of this packet; remaining fragments are reused... */ + while (nr > 0) { + nr--; + __skb_frag_unref(&skb_frags_rx[nr]); + } + return 0; +} + + +static struct sk_buff *mlx4_en_rx_skb(struct mlx4_en_priv *priv, + struct mlx4_en_rx_desc *rx_desc, +#ifndef __VMKERNEL_MODULE__ + struct page_frag *skb_frags, +#else + struct skb_frag_struct *skb_frags, +#endif /* NOT __VMKERNEL_MODULE__ */ + struct mlx4_en_rx_alloc *page_alloc, + unsigned int length) +{ + struct sk_buff *skb; + void *va; + int used_frags; + dma_addr_t dma; + + skb = netdev_alloc_skb(priv->dev, SMALL_PACKET_SIZE + NET_IP_ALIGN); + if (!skb) { + en_dbg(RX_ERR, priv, "Failed allocating skb\n"); + return NULL; + } + skb_reserve(skb, NET_IP_ALIGN); + skb->len = length; + + /* Get pointer to first fragment so we could copy the headers into the + * (linear part of the) skb */ +#ifndef __VMKERNEL_MODULE__ + va = page_address(skb_frags[0].page) + skb_frags[0].offset; +#else + va = page_address(skb_frags[0].page) + skb_frags[0].page_offset; +#endif /* NOT __VMKERNEL_MODULE__ */ + + if (length <= SMALL_PACKET_SIZE) { + /* We are copying all relevant data to the skb - temporarily + * synch buffers for the copy */ + dma = be64_to_cpu(rx_desc->data[0].addr); + dma_sync_single_for_cpu(priv->ddev, dma, length, + DMA_FROM_DEVICE); + skb_copy_to_linear_data(skb, va, length); + dma_sync_single_for_device(priv->ddev, dma, length, + DMA_FROM_DEVICE); + skb->tail += length; + skb->truesize = length + sizeof(struct sk_buff); + } else { + + /* Move relevant fragments to skb */ + used_frags = mlx4_en_complete_rx_desc(priv, rx_desc, skb_frags, + skb, page_alloc, length); + if (unlikely(!used_frags)) { + kfree_skb(skb); + return NULL; + } + skb_shinfo(skb)->nr_frags = used_frags; + + /* Copy headers into the skb linear buffer */ + memcpy(skb->data, va, HEADER_COPY_SIZE); + skb->tail += HEADER_COPY_SIZE; + + /* Skip headers in first fragment */ + skb_shinfo(skb)->frags[0].page_offset += HEADER_COPY_SIZE; + + /* Adjust size of first fragment */ + skb_frag_size_sub(&skb_shinfo(skb)->frags[0], HEADER_COPY_SIZE); + skb->data_len = length - HEADER_COPY_SIZE; + } + return skb; +} + +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ +void validate_loopback(struct mlx4_en_priv *priv, struct sk_buff *skb) +{ + int i; + int offset = ETH_HLEN; + + for (i = 0; i < MLX4_LOOPBACK_TEST_PAYLOAD; i++, offset++) { + if (*(skb->data + offset) != (unsigned char) (i & 0xff)) + goto out_loopback; + } + /* Loopback found */ + priv->loopback_ok = 1; + +out_loopback: + dev_kfree_skb_any(skb); +} +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + +int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_cqe *cqe; + struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring]; +#ifndef __VMKERNEL_MODULE__ + struct page_frag *skb_frags; +#else + struct skb_frag_struct *skb_frags; +#endif /* NOT __VMKERNEL_MODULE__ */ + struct mlx4_en_rx_desc *rx_desc; + struct sk_buff *skb; + int index; +#ifdef __VMKERNEL_NETDEV_GRO_FEATURE_SUPPORT_ + int nr; +#endif /* __VMKERNEL_NETDEV_GRO_FEATURE_SUPPORT_ */ + unsigned int length; + int polled = 0; + int ip_summed; + struct ethhdr *ethh; + u64 s_mac; + int factor = priv->cqe_factor; + + /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx + * descriptor offset can be deduced from the CQE index instead of + * reading 'cqe->index' */ + index = cq->mcq.cons_index & ring->size_mask; + cqe = &cq->buf[(index << factor) + factor]; + + /* Process all completed CQEs */ + while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK, + cq->mcq.cons_index & cq->size)) { + + skb_frags = ring->rx_info + (index << priv->log_rx_info); + rx_desc = ring->buf + (index << ring->log_stride); + + /* + * make sure we read the CQE after we read the ownership bit + */ + rmb(); + + /* Drop packet on bad receive or bad checksum */ + if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == + MLX4_CQE_OPCODE_ERROR)) { + en_err(priv, "CQE completed in error - vendor " + "syndrom:%d syndrom:%d\n", + ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome, + ((struct mlx4_err_cqe *) cqe)->syndrome); + goto next; + } + if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) { + en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n"); + goto next; + } + + /* Get pointer to first fragment since we haven't skb yet and + * cast it to ethhdr struct */ + ethh = (struct ethhdr *)(page_address(skb_frags[0].page) + +#ifndef __VMKERNEL_MODULE__ + skb_frags[0].offset); +#else + skb_frags[0].page_offset); +#endif /* NOT __VMKERNEL_MODULE__ */ + s_mac = mlx4_en_mac_to_u64(ethh->h_source); + +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + /* If source MAC is equal to our own MAC and not performing + * the selftest or flb disabled - drop the packet */ + if (s_mac == priv->mac && + (!(dev->features & NETIF_F_LOOPBACK) || + !priv->validate_loopback)) + goto next; +#else + /* If source MAC is equal to our own MAC and not performing + * the selftest */ + if (s_mac == priv->mac) + goto next; +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + + /* + * Packet is OK - process it. + */ + length = be32_to_cpu(cqe->byte_cnt); + length -= ring->fcs_del; + ring->bytes += length; + ring->packets++; + +#ifdef __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ + if (likely(dev->features & NETIF_F_RXCSUM)) { +#else + if (likely(priv->rx_csum)) { +#endif /* __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ */ + if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) && + (cqe->checksum == cpu_to_be16(0xffff))) { + ring->csum_ok++; +#ifdef __VMKERNEL_NETDEV_GRO_FEATURE_SUPPORT_ + /* This packet is eligible for LRO if it is: + * - DIX Ethernet (type interpretation) + * - TCP/IP (v4) + * - without IP options + * - not an IP fragment */ + if (dev->features & NETIF_F_GRO) { + struct sk_buff *gro_skb = napi_get_frags(&cq->napi); + if (!gro_skb) + goto next; + + nr = mlx4_en_complete_rx_desc( + priv, rx_desc, + skb_frags, gro_skb, + ring->page_alloc, length); + if (!nr) + goto next; + + skb_shinfo(gro_skb)->nr_frags = nr; + gro_skb->len = length; + gro_skb->data_len = length; + gro_skb->ip_summed = CHECKSUM_UNNECESSARY; + + if (cqe->vlan_my_qpn & + cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK)) { + u16 vid = be16_to_cpu(cqe->sl_vid); + + __vlan_hwaccel_put_tag(gro_skb, vid); + } + +#ifdef __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ + if (dev->features & NETIF_F_RXHASH) + gro_skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid); +#endif /* __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ */ + +#ifndef __VMKERNEL_MODULE__ + skb_record_rx_queue(gro_skb, cq->ring); +#endif /* NOT __VMKERNEL_MODULE__ */ + napi_gro_frags(&cq->napi); + + goto next; + } + + /* LRO not possible, complete processing here */ +#endif /* __VMKERNEL_NETDEV_GRO_FEATURE_SUPPORT_ */ + ip_summed = CHECKSUM_UNNECESSARY; + } else { + ip_summed = CHECKSUM_NONE; + ring->csum_none++; + } + } else { + ip_summed = CHECKSUM_NONE; + ring->csum_none++; + } + + skb = mlx4_en_rx_skb(priv, rx_desc, skb_frags, + ring->page_alloc, length); + if (!skb) { + priv->stats.rx_dropped++; + goto next; + } + +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + if (unlikely(priv->validate_loopback)) { + validate_loopback(priv, skb); + goto next; + } +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + + skb->ip_summed = ip_summed; + skb->protocol = eth_type_trans(skb, dev); +#ifdef __VMKERNEL_MODULE__ + if (priv->netq) + skb_record_rx_queue(skb, cq->ring); +#else + skb_record_rx_queue(skb, cq->ring); +#endif /* __VMKERNEL_MODULE__ */ + +#ifdef __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ + if (dev->features & NETIF_F_RXHASH) + skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid); +#endif /* __VMKERNEL_NETDEV_ADVANCE_FEATURES_SUPPORT__ */ + +#ifndef __VMKERNEL_MODULE__ + if (be32_to_cpu(cqe->vlan_my_qpn) & + MLX4_CQE_VLAN_PRESENT_MASK) + __vlan_hwaccel_put_tag(skb, be16_to_cpu(cqe->sl_vid)); + + /* Push it up the stack */ + netif_receive_skb(skb); +#else + if (be32_to_cpu(cqe->vlan_my_qpn) & MLX4_CQE_VLAN_PRESENT_MASK) + vlan_hwaccel_receive_skb(skb, NULL, be16_to_cpu(cqe->sl_vid)); + else + netif_receive_skb(skb); +#endif /* __VMKERNEL_MODULE__ */ + +next: + ++cq->mcq.cons_index; + index = (cq->mcq.cons_index) & ring->size_mask; + cqe = &cq->buf[(index << factor) + factor]; + if (++polled == budget) { + /* We are here because we reached the NAPI budget - + * flush only pending LRO sessions */ + goto out; + } + } + +out: + AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled); + mlx4_cq_set_ci(&cq->mcq); + wmb(); /* ensure HW sees CQ consumer before we post new buffers */ + ring->cons = cq->mcq.cons_index; + ring->prod += polled; /* Polled descriptors were realocated in place */ + mlx4_en_update_rx_prod_db(ring); + return polled; +} + +void mlx4_en_rx_irq(struct mlx4_cq *mcq) +{ + struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq); + struct mlx4_en_priv *priv = netdev_priv(cq->dev); + + if (priv->port_up) + napi_schedule(&cq->napi); + else + mlx4_en_arm_cq(priv, cq); +} + +/* Rx CQ polling - called by NAPI */ +int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget) +{ + struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi); + struct net_device *dev = cq->dev; + struct mlx4_en_priv *priv = netdev_priv(dev); + int done; + + done = mlx4_en_process_rx_cq(dev, cq, budget); + + /* If we used up all the quota - we're probably not done yet... */ + if (done == budget) + INC_PERF_COUNTER(priv->pstats.napi_quota_rx); + else { + /* Done for now */ + napi_complete(napi); + mlx4_en_arm_cq(priv, cq); + } + return done; +} + +/* Calculate the last offset position that accommodates a full fragment + * (assuming fagment size = stride-align) */ +static int mlx4_en_last_alloc_offset(struct mlx4_en_priv *priv, u16 stride, u16 align) +{ + u16 res = MLX4_EN_ALLOC_SIZE % stride; + u16 offset = MLX4_EN_ALLOC_SIZE - stride - res + align; + + en_dbg(DRV, priv, "Calculated last offset for stride:%d align:%d " + "res:%d offset:%d\n", stride, align, res, offset); + return offset; +} + +static int frag_sizes[] = { + FRAG_SZ0, + FRAG_SZ1, + FRAG_SZ2, + FRAG_SZ3 +}; + +void mlx4_en_calc_rx_buf(struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + int eff_mtu = dev->mtu + ETH_HLEN + VLAN_HLEN + ETH_LLC_SNAP_SIZE; + int buf_size = 0; + int i = 0; + +#ifdef __VMKERNEL_MODULE__ + if (priv->use_rx_frags) { +#endif /* __VMKERNEL_MODULE__ */ + while (buf_size < eff_mtu) { + priv->frag_info[i].frag_size = + (eff_mtu > buf_size + frag_sizes[i]) ? + frag_sizes[i] : eff_mtu - buf_size; + priv->frag_info[i].frag_prefix_size = buf_size; + if (!i) { + priv->frag_info[i].frag_align = NET_IP_ALIGN; + priv->frag_info[i].frag_stride = + ALIGN(frag_sizes[i] + NET_IP_ALIGN, SMP_CACHE_BYTES); + } else { + priv->frag_info[i].frag_align = 0; + priv->frag_info[i].frag_stride = + ALIGN(frag_sizes[i], SMP_CACHE_BYTES); + } + priv->frag_info[i].last_offset = mlx4_en_last_alloc_offset( + priv, priv->frag_info[i].frag_stride, + priv->frag_info[i].frag_align); + buf_size += priv->frag_info[i].frag_size; + i++; + } +#ifdef __VMKERNEL_MODULE__ + } +#endif /* __VMKERNEL_MODULE__ */ + + priv->num_frags = i; + priv->rx_skb_size = eff_mtu; +#ifndef __VMKERNEL_MODULE__ + priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct skb_frag_struct)); +#else + if (priv->use_rx_frags) + priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct skb_frag_struct)); +#endif /* __VMKERNEL_MODULE__ */ + + en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d " + "num_frags:%d):\n", eff_mtu, priv->num_frags); + for (i = 0; i < priv->num_frags; i++) { + en_dbg(DRV, priv, " frag:%d - size:%d prefix:%d align:%d " + "stride:%d last_offset:%d\n", i, + priv->frag_info[i].frag_size, + priv->frag_info[i].frag_prefix_size, + priv->frag_info[i].frag_align, + priv->frag_info[i].frag_stride, + priv->frag_info[i].last_offset); + } +} + +/* RSS related functions */ + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn, + struct mlx4_en_rx_ring *ring, + enum mlx4_qp_state *state, + struct mlx4_qp *qp) +#else +static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn, + struct mlx4_en_rx_ring *ring, + enum mlx4_qp_state *state, + struct mlx4_qp *qp) +#endif /* NET QUEUE */ +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_qp_context *context; + int err = 0; + + context = kmalloc(sizeof *context , GFP_KERNEL); + if (!context) { + en_err(priv, "Failed to allocate qp context\n"); + return -ENOMEM; + } + + err = mlx4_qp_alloc(mdev->dev, qpn, qp); + if (err) { + en_err(priv, "Failed to allocate qp #%x\n", qpn); + goto out; + } + qp->event = mlx4_en_sqp_event; + + memset(context, 0, sizeof *context); + mlx4_en_fill_qp_context(priv, ring->actual_size, ring->stride, 0, 0, + qpn, ring->cqn, context); + context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma); + + /* Cancel FCS removal if FW allows */ + if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) { + context->param3 |= cpu_to_be32(1 << 29); + ring->fcs_del = ETH_FCS_LEN; + } else + ring->fcs_del = 0; + + err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, context, qp, state); + if (err) { + mlx4_qp_remove(mdev->dev, qp); + mlx4_qp_free(mdev->dev, qp); + } + mlx4_en_update_rx_prod_db(ring); +out: + kfree(context); + return err; +} + +/* Allocate rx qp's and configure them according to rss map */ +int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv) +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_rss_map *rss_map = &priv->rss_map; + struct mlx4_qp_context context; + struct mlx4_rss_context *rss_context; + int rss_rings; + void *ptr; + u8 rss_mask = (MLX4_RSS_IPV4 | MLX4_RSS_TCP_IPV4 | MLX4_RSS_IPV6 | + MLX4_RSS_TCP_IPV6); + int i, qpn; + int err = 0; + int good_qps = 0; + static const u32 rsskey[10] = { 0xD181C62C, 0xF7F4DB5B, 0x1983A2FC, + 0x943E1ADB, 0xD9389E6B, 0xD1039C2C, 0xA74499AD, + 0x593D56D9, 0xF3253C06, 0x2ADC1FFC}; + + en_dbg(DRV, priv, "Configuring rss steering\n"); + err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num, + priv->rx_ring_num, + &rss_map->base_qpn); + if (err) { + en_err(priv, "Failed reserving %d qps\n", priv->rx_ring_num); + return err; + } + + for (i = 0; i < priv->rx_ring_num; i++) { + qpn = rss_map->base_qpn + i; + err = mlx4_en_config_rss_qp(priv, qpn, &priv->rx_ring[i], + &rss_map->state[i], + &rss_map->qps[i]); + if (err) + goto rss_err; + + ++good_qps; + } + + /* Configure RSS indirection qp */ + err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp); + if (err) { + en_err(priv, "Failed to allocate RSS indirection QP\n"); + goto rss_err; + } + rss_map->indir_qp.event = mlx4_en_sqp_event; + mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn, + priv->rx_ring[0].cqn, &context); + + if (!priv->prof->rss_rings || priv->prof->rss_rings > priv->rx_ring_num) + rss_rings = priv->rx_ring_num; + else + rss_rings = priv->prof->rss_rings; + + ptr = ((void *) &context) + offsetof(struct mlx4_qp_context, pri_path) + + MLX4_RSS_OFFSET_IN_QPC_PRI_PATH; + rss_context = ptr; + rss_context->base_qpn = cpu_to_be32(ilog2(rss_rings) << 24 | + (rss_map->base_qpn)); + rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn); + if (priv->mdev->profile.udp_rss) { + rss_mask |= MLX4_RSS_UDP_IPV4 | MLX4_RSS_UDP_IPV6; + rss_context->base_qpn_udp = rss_context->default_qpn; + } + rss_context->flags = rss_mask; + rss_context->hash_fn = MLX4_RSS_HASH_TOP; + for (i = 0; i < 10; i++) + rss_context->rss_key[i] = cpu_to_be32(rsskey[i]); + + err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context, + &rss_map->indir_qp, &rss_map->indir_state); + if (err) + goto indir_err; + + return 0; + +indir_err: + mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state, + MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp); + mlx4_qp_remove(mdev->dev, &rss_map->indir_qp); + mlx4_qp_free(mdev->dev, &rss_map->indir_qp); +rss_err: + for (i = 0; i < good_qps; i++) { + mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i], + MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]); + mlx4_qp_remove(mdev->dev, &rss_map->qps[i]); + mlx4_qp_free(mdev->dev, &rss_map->qps[i]); + } + mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num); + return err; +} + +void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv) +{ + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_rss_map *rss_map = &priv->rss_map; + int i; + + mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state, + MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp); + mlx4_qp_remove(mdev->dev, &rss_map->indir_qp); + mlx4_qp_free(mdev->dev, &rss_map->indir_qp); + + for (i = 0; i < priv->rx_ring_num; i++) { + mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i], + MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]); + mlx4_qp_remove(mdev->dev, &rss_map->qps[i]); + mlx4_qp_free(mdev->dev, &rss_map->qps[i]); + } + mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num); +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx_linear.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx_linear.c new file mode 100755 index 0000000..4c2b1bf --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_rx_linear.c @@ -0,0 +1,283 @@ +/* + * Copyright (c) 2012-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "mlx4_en.h" + +static int mlx4_en_alloc_rx_skb(struct mlx4_en_priv *priv, + struct mlx4_en_rx_desc *rx_desc, struct sk_buff **pskb, + int unmap) +{ + dma_addr_t dma; + struct sk_buff *new_skb = netdev_alloc_skb(priv->dev, + priv->rx_skb_size + NET_IP_ALIGN); + + if (unlikely(new_skb == NULL)) + return -ENOMEM; + + skb_reserve(new_skb, NET_IP_ALIGN); + dma = dma_map_single(priv->ddev, new_skb->data, priv->rx_skb_size, + DMA_FROM_DEVICE); + if (unlikely(dma_mapping_error(dma))) { + en_err(priv, "Failed dma mapping page for RX buffer\n"); + dev_kfree_skb(new_skb); + return -EFAULT; + } + + if (unmap) + dma_unmap_single(priv->ddev, be64_to_cpu(rx_desc->data->addr), + be32_to_cpu(rx_desc->data->byte_count), + DMA_FROM_DEVICE); + + *pskb = new_skb; + rx_desc->data->addr = cpu_to_be64(dma); + return 0; +} + +void mlx4_en_init_rx_desc_skb(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, int index) +{ + struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index; + + rx_desc->data->byte_count = cpu_to_be32(priv->rx_skb_size); + rx_desc->data->lkey = cpu_to_be32(priv->mdev->mr.key); +} + +int mlx4_en_prepare_rx_desc_skb(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, int index) +{ + struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride); + struct sk_buff **pskb = (struct sk_buff **) ring->rx_info + index; + + return mlx4_en_alloc_rx_skb(priv, rx_desc, pskb, 0); +} + +static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring) +{ + *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff); +} + +void mlx4_en_free_rx_desc_skb(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, int index) +{ + struct sk_buff *skb; + struct mlx4_en_rx_desc *rx_desc = ring->buf + (index + << ring->log_stride); + dma_addr_t dma; + + skb = *((struct sk_buff **) ring->rx_info + index); + dma = be64_to_cpu(rx_desc->data->addr); + dma_unmap_single(priv->ddev, dma, priv->rx_skb_size, DMA_FROM_DEVICE); + dev_kfree_skb(skb); +} + +static struct sk_buff * +mlx4_en_get_rx_skb(struct mlx4_en_priv *priv, struct mlx4_en_rx_desc *rx_desc, + struct sk_buff **pskb, unsigned int length) +{ + struct sk_buff *skb; + dma_addr_t dma; + + if (length <= SMALL_PACKET_SIZE) { + skb = netdev_alloc_skb(priv->dev, length + NET_IP_ALIGN); + if (unlikely(!skb)) + return NULL; + + skb->dev = priv->dev; + skb_reserve(skb, NET_IP_ALIGN); + /* We are copying all relevant data to the skb - temporarily + * synch buffers for the copy */ + dma = be64_to_cpu(rx_desc->data->addr); + dma_sync_single_for_cpu(priv->ddev, dma, priv->rx_skb_size, + DMA_FROM_DEVICE); + skb_copy_to_linear_data(skb, (*pskb)->data, length); + dma_sync_single_for_device(priv->ddev, dma, priv->rx_skb_size, + DMA_FROM_DEVICE); + + } else { + skb = *pskb; + if (unlikely(mlx4_en_alloc_rx_skb(priv, rx_desc, pskb, 1))) + return NULL; + } + + skb->tail += length; + skb->len = length; + skb->truesize = length + sizeof(struct sk_buff); + return skb; +} + +int mlx4_en_process_rx_cq_skb(struct net_device *dev, struct mlx4_en_cq *cq, + int budget) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_cqe *cqe; + struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring]; + struct sk_buff **pskb; + struct sk_buff *skb; + struct mlx4_en_rx_desc *rx_desc; + int index; + unsigned int length; + int polled = 0; + int ip_summed; + struct ethhdr *ethh; + u64 s_mac; + int factor = priv->cqe_factor; + + /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx + * descriptor offset can be deduced from the CQE index instead of + * reading 'cqe->index' */ + index = cq->mcq.cons_index & ring->size_mask; + cqe = &cq->buf[(index << factor) + factor]; + + /* Process all completed CQEs */ + while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK, + cq->mcq.cons_index & cq->size)) { + + pskb = (struct sk_buff **) ring->rx_info + index; + rx_desc = ring->buf + (index << ring->log_stride); + + /* + * make sure we read the CQE after we read the ownership bit + */ + rmb(); + + /* Drop packet on bad receive or bad checksum */ + if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == + MLX4_CQE_OPCODE_ERROR)) { + en_err(priv, "CQE completed in error - vendor " + "syndrom:%d syndrom:%d\n", + ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome, + ((struct mlx4_err_cqe *) cqe)->syndrome); + goto next; + } + if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) { + en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n"); + goto next; + } + + length = be32_to_cpu(cqe->byte_cnt); + length -= ring->fcs_del; + + skb = mlx4_en_get_rx_skb(priv, rx_desc, pskb, length); + if (unlikely(!skb)) { + priv->stats.rx_dropped++; + goto next; + } + + /* Get pointer to first fragment since we haven't skb yet and + * cast it to ethhdr struct */ + ethh = (struct ethhdr *) skb->data; + s_mac = mlx4_en_mac_to_u64(ethh->h_source); + + /* If source MAC is equal to our own MAC and not performing + * the selftest */ +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + if (s_mac == priv->mac && !priv->validate_loopback) { +#else + if (s_mac == priv->mac) { +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + /* skb is not going up to OS, free it here */ + dev_kfree_skb_any(skb); + goto next; + } + + /* + * Packet is OK - process it. + */ + ring->bytes += length; + ring->packets++; + + if (priv->rx_csum && + (cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) && + (cqe->checksum == cpu_to_be16(0xffff))) { + ring->csum_ok++; + ip_summed = CHECKSUM_UNNECESSARY; + } else { + ip_summed = CHECKSUM_NONE; + ring->csum_none++; + } + +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + if (unlikely(priv->validate_loopback)) { + validate_loopback(priv, skb); + goto next; + } +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + + skb->ip_summed = ip_summed; + skb->protocol = eth_type_trans(skb, dev); + if (priv->netq) + skb_record_rx_queue(skb, cq->ring); + +#ifndef __VMKERNEL_MODULE__ + if (be32_to_cpu(cqe->vlan_my_qpn) & MLX4_CQE_VLAN_PRESENT_MASK) + __vlan_hwaccel_put_tag(skb, be16_to_cpu(cqe->sl_vid)); + + /* Push it up the stack */ + netif_receive_skb(skb); +#else + if (be32_to_cpu(cqe->vlan_my_qpn) & MLX4_CQE_VLAN_PRESENT_MASK) + vlan_hwaccel_receive_skb(skb, NULL, be16_to_cpu(cqe->sl_vid)); + else + netif_receive_skb(skb); +#endif /* __VMKERNEL_MODULE__ */ + +next: + ++cq->mcq.cons_index; + index = (cq->mcq.cons_index) & ring->size_mask; + cqe = &cq->buf[(index << factor) + factor]; + if (++polled == budget) { + /* We are here because we reached the NAPI budget - + * flush only pending LRO sessions */ + goto out; + } + } + +out: + AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled); + mlx4_cq_set_ci(&cq->mcq); + wmb(); + /* ensure HW sees CQ consumer before we post new buffers */ + ring->cons = cq->mcq.cons_index; + ring->prod += polled; /* Polled descriptors were realocated in place */ + mlx4_en_update_rx_prod_db(ring); + return polled; +} + +/* Rx CQ polling - called by NAPI */ +int mlx4_en_poll_rx_cq_skb(struct napi_struct *napi, int budget) +{ + struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi); + struct net_device *dev = cq->dev; + struct mlx4_en_priv *priv = netdev_priv(dev); + int done; + + done = mlx4_en_process_rx_cq_skb(dev, cq, budget); + + /* If we used up all the quota - we're probably not done yet... */ + if (done == budget) + INC_PERF_COUNTER(priv->pstats.napi_quota_rx); + else { + /* Done for now */ + napi_complete(napi); + mlx4_en_arm_cq(priv, cq); + } + return done; +} diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_selftest.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_selftest.c new file mode 100755 index 0000000..c498155 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_selftest.c @@ -0,0 +1,163 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ +#include +#include +#include +#include +#include + +#include "mlx4_en.h" + + +static int mlx4_en_test_registers(struct mlx4_en_priv *priv) +{ + return mlx4_cmd(priv->mdev->dev, 0, 0, 0, MLX4_CMD_HW_HEALTH_CHECK, + MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); +} + +static int mlx4_en_test_loopback_xmit(struct mlx4_en_priv *priv) +{ + struct sk_buff *skb; + struct ethhdr *ethh; + unsigned char *packet; + unsigned int packet_size = MLX4_LOOPBACK_TEST_PAYLOAD; + unsigned int i; + int err; + + + /* build the pkt before xmit */ + skb = netdev_alloc_skb(priv->dev, MLX4_LOOPBACK_TEST_PAYLOAD + ETH_HLEN + NET_IP_ALIGN); + if (!skb) { + en_err(priv, "-LOOPBACK_TEST_XMIT- failed to create skb for xmit\n"); + return -ENOMEM; + } + skb_reserve(skb, NET_IP_ALIGN); + + ethh = (struct ethhdr *)skb_put(skb, sizeof(struct ethhdr)); + packet = (unsigned char *)skb_put(skb, packet_size); + memcpy(ethh->h_dest, priv->dev->dev_addr, ETH_ALEN); + memset(ethh->h_source, 0, ETH_ALEN); + ethh->h_proto = htons(ETH_P_ARP); + skb_set_mac_header(skb, 0); + for (i = 0; i < packet_size; ++i) /* fill our packet */ + packet[i] = (unsigned char)(i & 0xff); + + /* xmit the pkt */ + err = mlx4_en_xmit(skb, priv->dev); + return err; +} + +static int mlx4_en_test_loopback(struct mlx4_en_priv *priv) +{ + u32 loopback_ok = 0; + int i; + + + priv->loopback_ok = 0; + priv->validate_loopback = 1; + + /* xmit */ + if (mlx4_en_test_loopback_xmit(priv)) { + en_err(priv, "Transmitting loopback packet failed\n"); + goto mlx4_en_test_loopback_exit; + } + + /* polling for result */ + for (i = 0; i < MLX4_EN_LOOPBACK_RETRIES; ++i) { + msleep(MLX4_EN_LOOPBACK_TIMEOUT); + if (priv->loopback_ok) { + loopback_ok = 1; + break; + } + } + if (!loopback_ok) + en_err(priv, "Loopback packet didn't arrive\n"); + +mlx4_en_test_loopback_exit: + + priv->validate_loopback = 0; + return !loopback_ok; +} + + +static int mlx4_en_test_link(struct mlx4_en_priv *priv) +{ + if (mlx4_en_QUERY_PORT(priv->mdev, priv->port)) + return -ENOMEM; + if (priv->port_state.link_state == 1) + return 0; + else + return 1; +} + +static int mlx4_en_test_speed(struct mlx4_en_priv *priv) +{ + + if (mlx4_en_QUERY_PORT(priv->mdev, priv->port)) + return -ENOMEM; + + /* The device currently only supports 10G speed */ + if (priv->port_state.link_speed != SPEED_10000) + return priv->port_state.link_speed; + return 0; +} + + +void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_tx_ring *tx_ring; + int i, carrier_ok; + + memset(buf, 0, sizeof(u64) * MLX4_EN_NUM_SELF_TEST); + + if (*flags & ETH_TEST_FL_OFFLINE) { + /* disable the interface */ + carrier_ok = netif_carrier_ok(dev); + + netif_carrier_off(dev); +retry_tx: + /* Wait until all tx queues are empty. + * there should not be any additional incoming traffic + * since we turned the carrier off */ + msleep(200); + for (i = 0; i < priv->tx_ring_num && carrier_ok; i++) { + tx_ring = &priv->tx_ring[i]; + if (tx_ring->prod != (tx_ring->cons + tx_ring->last_nr_txbb)) + goto retry_tx; + } + + if (priv->mdev->dev->caps.flags & + MLX4_DEV_CAP_FLAG_UC_LOOPBACK) { + buf[3] = mlx4_en_test_registers(priv); + buf[4] = mlx4_en_test_loopback(priv); + } + + if (carrier_ok) + netif_carrier_on(dev); + + } + buf[0] = mlx4_test_interrupts(mdev->dev); + buf[1] = mlx4_en_test_link(priv); + buf[2] = mlx4_en_test_speed(priv); + + for (i = 0; i < MLX4_EN_NUM_SELF_TEST; i++) { + if (buf[i]) + *flags |= ETH_TEST_FL_FAILED; + } +} +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_tx.c b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_tx.c new file mode 100755 index 0000000..daea936 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/en_tx.c @@ -0,0 +1,896 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "mlx4_en.h" + +enum { + MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */ + MAX_BF = 256, +}; + +static int inline_thold __read_mostly = MAX_INLINE; + +module_param_named(inline_thold, inline_thold, int, 0444); +MODULE_PARM_DESC(inline_thold, "threshold for using inline data"); + +int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_tx_ring *ring, int qpn, u32 size, + u16 stride) +{ + struct mlx4_en_dev *mdev = priv->mdev; + int tmp; + int err; + + ring->size = size; + ring->size_mask = size - 1; + ring->stride = stride; + + inline_thold = min(inline_thold, MAX_INLINE); + + tmp = size * sizeof(struct mlx4_en_tx_info); + ring->tx_info = vmalloc(tmp); + if (!ring->tx_info) + return -ENOMEM; + + en_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n", + ring->tx_info, tmp); + + ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL); + if (!ring->bounce_buf) { + err = -ENOMEM; + goto err_tx; + } + ring->buf_size = ALIGN(size * ring->stride, MLX4_EN_PAGE_SIZE); + + err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size, + 2 * PAGE_SIZE); + if (err) { + en_err(priv, "Failed allocating hwq resources\n"); + goto err_bounce; + } + + err = mlx4_en_map_buffer(&ring->wqres.buf); + if (err) { + en_err(priv, "Failed to map TX buffer\n"); + goto err_hwq_res; + } + + ring->buf = ring->wqres.buf.direct.buf; + + en_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d " + "buf_size:%d dma:%llx\n", ring, ring->buf, ring->size, + ring->buf_size, (unsigned long long) ring->wqres.buf.direct.map); + + ring->qpn = qpn; + err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp); + if (err) { + en_err(priv, "Failed allocating qp %d\n", ring->qpn); + goto err_map; + } + ring->qp.event = mlx4_en_sqp_event; + +#ifdef __VMKERNEL_BF_ENABLE__ + err = mlx4_bf_alloc(mdev->dev, &ring->bf); + if (err) { + en_dbg(DRV, priv, "working without blueflame (%d)", err); + ring->bf.uar = &mdev->priv_uar; + ring->bf.uar->map = mdev->uar_map; + ring->bf_enabled = false; + } else + ring->bf_enabled = true; +#endif /* __VMKERNEL_BF_ENABLE__ */ + + return 0; + +err_map: + mlx4_en_unmap_buffer(&ring->wqres.buf); +err_hwq_res: + mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); +err_bounce: + kfree(ring->bounce_buf); + ring->bounce_buf = NULL; +err_tx: + vfree(ring->tx_info); + ring->tx_info = NULL; + return err; +} + +void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_tx_ring *ring) +{ + struct mlx4_en_dev *mdev = priv->mdev; + en_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn); + +#ifdef __VMKERNEL_BF_ENABLE__ + if (ring->bf_enabled) + mlx4_bf_free(mdev->dev, &ring->bf); +#endif /* __VMKERNEL_BF_ENABLE__ */ + mlx4_qp_remove(mdev->dev, &ring->qp); + mlx4_qp_free(mdev->dev, &ring->qp); + mlx4_qp_release_range(mdev->dev, ring->qpn, 1); + mlx4_en_unmap_buffer(&ring->wqres.buf); + mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); + kfree(ring->bounce_buf); + ring->bounce_buf = NULL; + vfree(ring->tx_info); + ring->tx_info = NULL; +} + +int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_tx_ring *ring, + int cq) +{ + struct mlx4_en_dev *mdev = priv->mdev; + int err; + + ring->cqn = cq; + ring->prod = 0; + ring->cons = 0xffffffff; + ring->last_nr_txbb = 1; + ring->poll_cnt = 0; + ring->blocked = 0; + atomic_set(&ring->inflight, 0); + memset(ring->tx_info, 0, ring->size * sizeof(struct mlx4_en_tx_info)); + memset(ring->buf, 0, ring->buf_size); + + ring->qp_state = MLX4_QP_STATE_RST; + ring->doorbell_qpn = ring->qp.qpn << 8; + + mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn, + ring->cqn, &ring->context); +#ifdef __VMKERNEL_BF_ENABLE__ + if (ring->bf_enabled) + ring->context.usr_page = cpu_to_be32(ring->bf.uar->index); +#endif /* __VMKERNEL_BF_ENABLE__ */ + + err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, &ring->context, + &ring->qp, &ring->qp_state); + + return err; +} + +void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_tx_ring *ring) +{ + struct mlx4_en_dev *mdev = priv->mdev; + + mlx4_qp_modify(mdev->dev, NULL, ring->qp_state, + MLX4_QP_STATE_RST, NULL, 0, 0, &ring->qp); +} + + +static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv, + struct mlx4_en_tx_ring *ring, + int index, u8 owner) +{ + struct mlx4_en_tx_info *tx_info = &ring->tx_info[index]; + struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE; + struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset; + struct sk_buff *skb = tx_info->skb; + struct skb_frag_struct *frag; + void *end = ring->buf + ring->buf_size; + int frags = skb_shinfo(skb)->nr_frags; + int i; + __be32 *ptr = (__be32 *)tx_desc; + __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT)); + + /* Optimize the common case when there are no wraparounds */ + if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) { + if (!tx_info->inl) { + if (tx_info->linear) { + dma_unmap_single(priv->ddev, + (dma_addr_t) be64_to_cpu(data->addr), + be32_to_cpu(data->byte_count), + PCI_DMA_TODEVICE); + ++data; + } + + for (i = 0; i < frags; i++) { + frag = &skb_shinfo(skb)->frags[i]; + dma_unmap_page(priv->ddev, + (dma_addr_t) be64_to_cpu(data[i].addr), + skb_frag_size(frag), PCI_DMA_TODEVICE); + } + } + /* Stamp the freed descriptor */ + for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE; i += STAMP_STRIDE) { + *ptr = stamp; + ptr += STAMP_DWORDS; + } + + } else { + if (!tx_info->inl) { + if ((void *) data >= end) { + data = ring->buf + ((void *)data - end); + } + + if (tx_info->linear) { + dma_unmap_single(priv->ddev, + (dma_addr_t) be64_to_cpu(data->addr), + be32_to_cpu(data->byte_count), + PCI_DMA_TODEVICE); + ++data; + } + + for (i = 0; i < frags; i++) { + /* Check for wraparound before unmapping */ + if ((void *) data >= end) + data = ring->buf; + frag = &skb_shinfo(skb)->frags[i]; + dma_unmap_page(priv->ddev, + (dma_addr_t) be64_to_cpu(data->addr), + skb_frag_size(frag), PCI_DMA_TODEVICE); + ++data; + } + } + /* Stamp the freed descriptor */ + for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE; i += STAMP_STRIDE) { + *ptr = stamp; + ptr += STAMP_DWORDS; + if ((void *) ptr >= end) { + ptr = ring->buf; + stamp ^= cpu_to_be32(0x80000000); + } + } + + } + dev_kfree_skb(skb); + return tx_info->nr_txbb; +} + + +int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + int cnt = 0; + + /* Skip last polled descriptor */ + ring->cons += ring->last_nr_txbb; + en_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n", + ring->cons, ring->prod); + + if ((u32) (ring->prod - ring->cons) > ring->size) { + if (netif_msg_tx_err(priv)) + en_warn(priv, "Tx consumer passed producer!\n"); + return 0; + } + + while (ring->cons != ring->prod) { + ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring, + ring->cons & ring->size_mask, + !!(ring->cons & ring->size)); + ring->cons += ring->last_nr_txbb; + cnt++; + } + + if (cnt) + en_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt); + + return cnt; +} + +int mlx4_en_process_tx_cq(struct net_device *dev, + struct mlx4_en_cq *cq, + int budget) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_cq *mcq = &cq->mcq; + struct mlx4_en_tx_ring *ring = &priv->tx_ring[cq->ring]; + struct mlx4_cqe *cqe; + u16 index; + u16 new_index, ring_index; + u32 txbbs_skipped = 0; + u32 cons_index = mcq->cons_index; + int size = cq->size; + u32 size_mask = ring->size_mask; + struct mlx4_cqe *buf = cq->buf; + int factor = priv->cqe_factor; + int done = 0; + + index = cons_index & size_mask; + cqe = &buf[(index << factor) + factor]; + ring_index = ring->cons & size_mask; + + /* Process all completed CQEs */ + while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK, + cons_index & size) && done < budget) { + /* + * make sure we read the CQE after we read the + * ownership bit + */ + rmb(); + + /* Skip over last polled CQE */ + new_index = be16_to_cpu(cqe->wqe_index) & size_mask; + + do { + txbbs_skipped += ring->last_nr_txbb; + ring_index = (ring_index + ring->last_nr_txbb) & size_mask; + /* free next descriptor */ + ring->last_nr_txbb = mlx4_en_free_tx_desc( + priv, ring, ring_index, + !!((ring->cons + txbbs_skipped) & + ring->size)); + } while ((++done < budget) && ring_index != new_index); + + ++cons_index; + index = cons_index & size_mask; + cqe = &buf[(index << factor) + factor]; + } + + /* + * To prevent CQ overflow we first update CQ consumer and only then + * the ring consumer. + */ + mcq->cons_index = cons_index; + mlx4_cq_set_ci(mcq); + wmb(); + ring->cons += txbbs_skipped; + atomic_sub(txbbs_skipped, &ring->inflight); + + /* Wakeup Tx queue if this ring stopped it */ + if (unlikely(ring->blocked && txbbs_skipped > 0)) { + ring->blocked = 0; +#ifndef __VMKERNEL_MLX4_EN_TX_HASH__ + netif_tx_wake_queue(netdev_get_tx_queue(dev, cq->ring)); +#else + netif_tx_wake_queue(netdev_get_tx_queue(dev, ring->reported_index)); +#endif /* NOT __VMKERNEL_MLX4_EN_TX_HASH__ */ + priv->port_stats.wake_queue++; + } + return done; +} + +void mlx4_en_tx_irq(struct mlx4_cq *mcq) +{ + struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq); + struct mlx4_en_priv *priv = netdev_priv(cq->dev); + + if (priv->port_up) + napi_schedule(&cq->napi); + else + mlx4_en_arm_cq(priv, cq); +} + +/* TX CQ polling - called by NAPI */ +int mlx4_en_poll_tx_cq(struct napi_struct *napi, int budget) +{ + struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi); + struct net_device *dev = cq->dev; + struct mlx4_en_priv *priv = netdev_priv(dev); + int done; + + done = mlx4_en_process_tx_cq(dev, cq, budget); + + /* If we used up all the quota - we're probably not done yet... */ + if (done == budget) + INC_PERF_COUNTER(priv->pstats.napi_quota_tx); + else{ + /* Done for now */ + napi_complete(napi); + mlx4_en_arm_cq(priv, cq); + } + return done; +} + +static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv, + struct mlx4_en_tx_ring *ring, + u32 index, + unsigned int desc_size) +{ + u32 copy = (ring->size - index) * TXBB_SIZE; + int i; + + for (i = desc_size - copy - 4; i >= 0; i -= 4) { + if ((i & (TXBB_SIZE - 1)) == 0) + wmb(); + + *((u32 *) (ring->buf + i)) = + *((u32 *) (ring->bounce_buf + copy + i)); + } + + for (i = copy - 4; i >= 4 ; i -= 4) { + if ((i & (TXBB_SIZE - 1)) == 0) + wmb(); + + *((u32 *) (ring->buf + index * TXBB_SIZE + i)) = + *((u32 *) (ring->bounce_buf + i)); + } + + /* Return real descriptor location */ + return ring->buf + index * TXBB_SIZE; +} + +#ifdef __VMKERNEL_TX_INLINE_WQE_ENABLE__ +static int is_inline(struct sk_buff *skb, void **pfrag) +{ + void *ptr; + + if (inline_thold && !skb_is_gso(skb) && skb->len <= inline_thold) { + if (skb_shinfo(skb)->nr_frags == 1) { + ptr = skb_frag_address_safe(&skb_shinfo(skb)->frags[0]); + if (unlikely(!ptr)) + return 0; + + if (pfrag) + *pfrag = ptr; + + return 1; + } else if (unlikely(skb_shinfo(skb)->nr_frags)) + return 0; + else + return 1; + } + + return 0; +} + +static int inline_size(struct sk_buff *skb) +{ + if (skb->len + CTRL_SIZE + sizeof(struct mlx4_wqe_inline_seg) + <= MLX4_INLINE_ALIGN) + return ALIGN(skb->len + CTRL_SIZE + + sizeof(struct mlx4_wqe_inline_seg), 16); + else + return ALIGN(skb->len + CTRL_SIZE + 2 * + sizeof(struct mlx4_wqe_inline_seg), 16); +} +#endif /* __VMKERNEL_TX_INLINE_WQE_ENABLE__ */ + +static int get_real_size(struct sk_buff *skb, struct net_device *dev, + int *lso_header_size) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + int real_size; + + if (skb_is_gso(skb)) { + *lso_header_size = skb_transport_offset(skb) + tcp_hdrlen(skb); + real_size = CTRL_SIZE + skb_shinfo(skb)->nr_frags * DS_SIZE + + ALIGN(*lso_header_size + 4, DS_SIZE); + if (unlikely(*lso_header_size != skb_headlen(skb))) { + /* We add a segment for the skb linear buffer only if + * it contains data */ + if (*lso_header_size < skb_headlen(skb)) + real_size += DS_SIZE; + else { + if (netif_msg_tx_err(priv)) + en_warn(priv, "Non-linear headers\n"); + return 0; + } + } + } else { + *lso_header_size = 0; +#ifdef __VMKERNEL_TX_INLINE_WQE_ENABLE__ + if (!is_inline(skb, NULL)) + real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE; + else + real_size = inline_size(skb); +#else + real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE; +#endif /* __VMKERNEL_TX_INLINE_WQE_ENABLE__ */ + } + + return real_size; +} + +#ifdef __VMKERNEL_TX_INLINE_WQE_ENABLE__ +static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *skb, + int real_size, u16 *vlan_tag, int tx_ind, void *fragptr) +{ + struct mlx4_wqe_inline_seg *inl = &tx_desc->inl; + int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl; + + if (skb->len <= spc) { + inl->byte_count = cpu_to_be32(1 << 31 | skb->len); + skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb)); + if (skb_shinfo(skb)->nr_frags) + memcpy(((void *)(inl + 1)) + skb_headlen(skb), fragptr, + skb_frag_size(&skb_shinfo(skb)->frags[0])); + + } else { + inl->byte_count = cpu_to_be32(1 << 31 | spc); + if (skb_headlen(skb) <= spc) { + skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb)); + if (skb_headlen(skb) < spc) { + memcpy(((void *)(inl + 1)) + skb_headlen(skb), + fragptr, spc - skb_headlen(skb)); + fragptr += spc - skb_headlen(skb); + } + inl = (void *) (inl + 1) + spc; + memcpy(((void *)(inl + 1)), fragptr, skb->len - spc); + } else { + skb_copy_from_linear_data(skb, inl + 1, spc); + inl = (void *) (inl + 1) + spc; + skb_copy_from_linear_data_offset(skb, spc, inl + 1, + skb_headlen(skb) - spc); + if (skb_shinfo(skb)->nr_frags) + memcpy(((void *)(inl + 1)) + skb_headlen(skb) - spc, + fragptr, skb_frag_size(&skb_shinfo(skb)->frags[0])); + } + + wmb(); + inl->byte_count = cpu_to_be32(1 << 31 | (skb->len - spc)); + } + tx_desc->ctrl.vlan_tag = cpu_to_be16(*vlan_tag); + tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN * + (!!vlan_tx_tag_present(skb)); + tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f; +} +#endif /* __VMKERNEL_TX_INLINE_WQE_ENABLE__ */ + +#ifdef __VMKERNEL_NETDEV_SELECT_QUEUE_SUPPORT__ +u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + u16 vlan_tag = 0; + + /* If we support per priority flow control and the packet contains + * a vlan tag, send the packet to the TX ring assigned to that priority + */ + if (priv->prof->rx_ppp && vlan_tx_tag_present(skb)) { + vlan_tag = vlan_tx_tag_get(skb); + return MLX4_EN_NUM_TX_RINGS + (vlan_tag >> 13); + } + + return skb_tx_hash(dev, skb); +} +#endif /* __VMKERNEL_NETDEV_SELECT_QUEUE_SUPPORT__ */ + +#ifdef __VMKERNEL_BF_ENABLE__ +static void mlx4_bf_copy(void __iomem *dst, unsigned long *src, unsigned bytecnt) +{ + __iowrite64_copy(dst, src, bytecnt / 8); +} +#endif /* __VMKERNEL_BF_ENABLE__ */ + +#ifdef __VMKERNEL_MLX4_EN_TX_HASH__ +static int mlx4_en_hash_select_ring(struct mlx4_en_priv *priv, int index, struct sk_buff *skb) +{ + struct mlx4_en_tx_ring *ring = &priv->tx_ring[index]; + int tx_ind = 0; + struct tcphdr *th = tcp_hdr(skb); + struct iphdr *iph = ip_hdr(skb); + struct mlx4_en_tx_hash_entry *entry; + u32 hash_index; + + /* Hashing is only done for TCP/IP or UDP/IP packets */ + if (be16_to_cpu(skb->protocol) != ETH_P_IP) + return index; + + hash_index = be32_to_cpu(iph->daddr) & MLX4_EN_TX_HASH_MASK; + switch(iph->protocol) { + case IPPROTO_UDP: + break; + case IPPROTO_TCP: + if (th) { + hash_index = (hash_index ^ be16_to_cpu(th->dest ^ th->source)) & + MLX4_EN_TX_HASH_MASK; + } + break; + default: + return index; + } + + /* + * We have 16 rings and we have hash tables for every ring. + * For rings 0..7 the hash table is valid and for + * rings 8..15 the hash table not used. + */ + entry = &ring->tx_hash[hash_index]; + + /* + * entry->cnt overflow every 256 times, so we + * are checking if need to move stream every 256 times + */ + if(unlikely(!entry->cnt)) { + tx_ind = index; + if ((entry->small_pkts << 1) > entry->big_pkts) + /* + * Move small packets from ring X (0= + * new ring is Y (8=reported_tx_ring_num; + entry->small_pkts = entry->big_pkts = 0; + entry->ring = tx_ind; + } + + entry->cnt++; + if (skb->len > MLX4_EN_SMALL_PKT_SIZE) + entry->big_pkts++; + else + entry->small_pkts++; + return entry->ring; +} +#endif /* __VMKERNEL_MLX4_EN_TX_HASH__ */ + +netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + struct mlx4_en_tx_ring *ring; + struct mlx4_en_tx_desc *tx_desc; + struct mlx4_wqe_data_seg *data; + struct skb_frag_struct *frag; + struct mlx4_en_tx_info *tx_info; + struct ethhdr *ethh; + int tx_ind = 0; + int nr_txbb; + int desc_size; + int real_size; + dma_addr_t dma; + u32 index, bf_index; + __be32 op_own; + u16 vlan_tag = 0; + int i; + int lso_header_size; +#ifdef __VMKERNEL_TX_INLINE_WQE_ENABLE__ + void *fragptr; +#endif /* __VMKERNEL_TX_INLINE_WQE_ENABLE__ */ + bool bounce = false; + + if (!priv->port_up) + goto tx_drop; + + real_size = get_real_size(skb, dev, &lso_header_size); + if (unlikely(!real_size)) + goto tx_drop; + + /* Align descriptor to TXBB size */ + desc_size = ALIGN(real_size, TXBB_SIZE); + nr_txbb = desc_size / TXBB_SIZE; + if (unlikely(nr_txbb > MAX_DESC_TXBBS)) { + if (netif_msg_tx_err(priv)) + en_warn(priv, "Oversized header or SG list\n"); + goto tx_drop; + } + + tx_ind = skb->queue_mapping; +#ifdef __VMKERNEL_MLX4_EN_TX_HASH__ + tx_ind = mlx4_en_hash_select_ring(priv, tx_ind, skb); +#endif /* __VMKERNEL_MLX4_EN_TX_HASH__ */ + ring = &priv->tx_ring[tx_ind]; + if (vlan_tx_tag_present(skb)) + vlan_tag = vlan_tx_tag_get(skb); + + /* Check available TXBBs And 2K spare for prefetch */ + if (unlikely(atomic_read(&ring->inflight) > + ring->size - HEADROOM - MAX_DESC_TXBBS)) { + /* every full Tx ring stops queue */ +#ifndef __VMKERNEL_MLX4_EN_TX_HASH__ + netif_tx_stop_queue(netdev_get_tx_queue(dev, tx_ind)); +#else + netif_tx_stop_queue(netdev_get_tx_queue(dev, ring->reported_index)); +#endif /* NOT __VMKERNEL_MLX4_EN_TX_HASH__ */ + ring->blocked = 1; + priv->port_stats.queue_stopped++; + + return NETDEV_TX_BUSY; + } + + /* Track current inflight packets for performance analysis */ + AVG_PERF_COUNTER(priv->pstats.inflight_avg, + (u32) (ring->prod - ring->cons - 1)); + + /* Packet is good - grab an index and transmit it */ + index = ring->prod & ring->size_mask; + bf_index = ring->prod; + + /* See if we have enough space for whole descriptor TXBB for setting + * SW ownership on next descriptor; if not, use a bounce buffer. */ + if (likely(index + nr_txbb <= ring->size)) + tx_desc = ring->buf + index * TXBB_SIZE; + else { + tx_desc = (struct mlx4_en_tx_desc *) ring->bounce_buf; + bounce = true; + } + + /* Save skb in tx_info ring */ + tx_info = &ring->tx_info[index]; + tx_info->skb = skb; + tx_info->nr_txbb = nr_txbb; + + /* Prepare ctrl segement apart opcode+ownership, which depends on + * whether LSO is used */ + tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag); + tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN * + !!vlan_tx_tag_present(skb); + tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f; + tx_desc->ctrl.srcrb_flags = priv->ctrl_flags; + if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { + tx_desc->ctrl.srcrb_flags |= cpu_to_be32(MLX4_WQE_CTRL_IP_CSUM | + MLX4_WQE_CTRL_TCP_UDP_CSUM); + ring->tx_csum++; + } + + /* Copy dst mac address to wqe */ + ethh = (struct ethhdr *)skb->data; + tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest); + tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2)); + /* Handle LSO (TSO) packets */ + if (lso_header_size) { + /* Mark opcode as LSO */ + op_own = cpu_to_be32(MLX4_OPCODE_LSO | (1 << 6)) | + ((ring->prod & ring->size) ? + cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0); + + /* Fill in the LSO prefix */ + tx_desc->lso.mss_hdr_size = cpu_to_be32( + skb_shinfo(skb)->gso_size << 16 | lso_header_size); + + /* Copy headers; + * note that we already verified that it is linear */ + memcpy(tx_desc->lso.header, skb->data, lso_header_size); + data = ((void *) &tx_desc->lso + + ALIGN(lso_header_size + 4, DS_SIZE)); + + priv->port_stats.tso_packets++; + i = ((skb->len - lso_header_size) / skb_shinfo(skb)->gso_size) + + !!((skb->len - lso_header_size) % skb_shinfo(skb)->gso_size); + ring->bytes += skb->len + (i - 1) * lso_header_size; + ring->packets += i; + } else { + /* Normal (Non LSO) packet */ + op_own = cpu_to_be32(MLX4_OPCODE_SEND) | + ((ring->prod & ring->size) ? + cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0); + data = &tx_desc->data; + ring->bytes += max(skb->len, (unsigned int) ETH_ZLEN); + ring->packets++; + + } + AVG_PERF_COUNTER(priv->pstats.tx_pktsz_avg, skb->len); + + + /* valid only for none inline segments */ + tx_info->data_offset = (void *) data - (void *) tx_desc; + +#ifdef __VMKERNEL_TX_INLINE_WQE_ENABLE__ + tx_info->linear = (lso_header_size < skb_headlen(skb) && !is_inline(skb, NULL)) ? 1 : 0; +#else + tx_info->linear = (lso_header_size < skb_headlen(skb)) ? 1 : 0; +#endif /* __VMKERNEL_TX_INLINE_WQE_ENABLE__ */ + data += skb_shinfo(skb)->nr_frags + tx_info->linear - 1; + +#ifdef __VMKERNEL_TX_INLINE_WQE_ENABLE__ + if (!is_inline(skb, &fragptr)) { +#else + { +#endif /* __VMKERNEL_TX_INLINE_WQE_ENABLE__ */ + /* Map fragments */ + for (i = skb_shinfo(skb)->nr_frags - 1; i >= 0; i--) { + frag = &skb_shinfo(skb)->frags[i]; + dma = skb_frag_dma_map(priv->ddev, frag, + 0, skb_frag_size(frag), + DMA_TO_DEVICE); +#ifdef __VMKERNEL_MODULE__ + if (unlikely(dma_mapping_error(dma))) +#else + if (unlikely(dma_mapping_error(priv->ddev, dma))) +#endif /* __VMKERNEL_MODULE__ */ + goto err_dma; + data->addr = cpu_to_be64(dma); + data->lkey = cpu_to_be32(mdev->mr.key); + wmb(); + data->byte_count = cpu_to_be32(skb_frag_size(frag)); + --data; + } + + /* Map linear part */ + if (tx_info->linear) { + dma = dma_map_single(priv->ddev, skb->data + lso_header_size, + skb_headlen(skb) - lso_header_size, PCI_DMA_TODEVICE); +#ifdef __VMKERNEL_MODULE__ + if (unlikely(dma_mapping_error(dma))) +#else + if (unlikely(dma_mapping_error(priv->ddev, dma))) +#endif /* __VMKERNEL_MODULE__ */ + goto err_dma; + data->addr = cpu_to_be64(dma); + data->lkey = cpu_to_be32(mdev->mr.key); + wmb(); + data->byte_count = cpu_to_be32(skb_headlen(skb) - lso_header_size); + } + tx_info->inl = 0; +#ifdef __VMKERNEL_TX_INLINE_WQE_ENABLE__ + } else { + build_inline_wqe(tx_desc, skb, real_size, &vlan_tag, tx_ind, fragptr); + tx_info->inl = 1; + } +#else + } +#endif /* __VMKERNEL_TX_INLINE_WQE_ENABLE__ */ + + + ring->prod += nr_txbb; + atomic_add(nr_txbb, &ring->inflight); + + /* If we used a bounce buffer then copy descriptor back into place */ + if (bounce) + tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size); + +/* + * We can not use the following optimization + * in vmkernel because skb_orphan is missing + */ +#ifndef __VMKERNEL_MODULE__ + /* Run destructor before passing skb to HW */ + if (likely(!skb_shared(skb))) + skb_orphan(skb); +#endif /* __VMKERNEL_MODULE__ */ + +#ifdef __VMKERNEL_BF_ENABLE__ + if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tag) { + *(__be32 *) (&tx_desc->ctrl.vlan_tag) |= cpu_to_be32(ring->doorbell_qpn); + op_own |= htonl((bf_index & 0xffff) << 8); + /* Ensure new descirptor hits memory + * before setting ownership of this descriptor to HW */ + wmb(); + tx_desc->ctrl.owner_opcode = op_own; + + wmb(); + + mlx4_bf_copy(ring->bf.reg + ring->bf.offset, (unsigned long *) &tx_desc->ctrl, + desc_size); + + wmb(); + + ring->bf.offset ^= ring->bf.buf_size; + } else { +#else + { +#endif /* __VMKERNEL_BF_ENABLE__ */ + /* Ensure new descirptor hits memory + * before setting ownership of this descriptor to HW */ + wmb(); + tx_desc->ctrl.owner_opcode = op_own; + wmb(); +#ifdef __VMKERNEL_BF_ENABLE__ + iowrite32be(ring->doorbell_qpn, ring->bf.uar->map + MLX4_SEND_DOORBELL); +#else + iowrite32be(ring->doorbell_qpn, mdev->uar_map + MLX4_SEND_DOORBELL); +#endif /* __VMKERNEL_BF_ENABLE__ */ + +#ifdef __VMKERNEL_MODULE__ + dev->trans_start = jiffies; +#endif /* __VMKERNEL_MODULE__ */ + } + + return NETDEV_TX_OK; + +err_dma: + while (i++ < skb_shinfo(skb)->nr_frags - 1) { + ++data; + frag = &skb_shinfo(skb)->frags[i]; + dma_unmap_page(priv->ddev, (dma_addr_t) be64_to_cpu(data[i].addr), + frag->size, PCI_DMA_TODEVICE); + } +tx_drop: + dev_kfree_skb_any(skb); + priv->stats.tx_dropped++; + return NETDEV_TX_OK; +} + diff --git a/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/mlx4_en.h b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/mlx4_en.h new file mode 100755 index 0000000..b9215e8 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/mlnx/mlx4_en/mlx4_en.h @@ -0,0 +1,807 @@ +/* + * Copyright (c) 2007-2013 Mellanox Technologies. All rights reserved. + * + * This software is available to you under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _MLX4_EN_H_ +#define _MLX4_EN_H_ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#ifdef __VMKERNEL_MODULE__ +#include +#endif /* __VMKERNEL_MODULE__ */ + +#include "en_port.h" + +#define DRV_NAME "mlx4_en" +#define DRV_VERSION "1.9.7.0" +#define DRV_RELDATE "Dec-03-2012" + +#define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN) + +/* + * Device constants + */ + +#define DEFAULT_NETQ_NUM_RSS_Q 0 +#define DEFAULT_NETQ_NUM_RINGS_PER_RSS 0 /* must be power of 2 */ +#define MAX_NETQ_NUM_RINGS_PER_RSS 0 +#define MIN_NETQ_NUM_RINGS_PER_RSS 0 + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + #ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ + #undef DEFAULT_NETQ_NUM_RSS_Q + #undef MAX_NETQ_NUM_RINGS_PER_RSS + + #define DEFAULT_NETQ_NUM_RSS_Q 1 + #define MAX_NETQ_NUM_RINGS_PER_RSS 4 + #endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ +#endif /* NET QUEUE */ + +#define MLX4_EN_PAGE_SHIFT 12 +#define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT) +#ifdef __VMKERNEL_MODULE__ +#define MAX_RX_RINGS 8 +#else +#define MAX_RX_RINGS 16 +#endif /* __VMKERNEL_MODULE__ */ +#define MIN_RX_RINGS 4 +#define TXBB_SIZE 64 +#define HEADROOM (2048 / TXBB_SIZE + 1) +#define STAMP_STRIDE 64 +#define STAMP_DWORDS (STAMP_STRIDE / 4) +#define STAMP_SHIFT 31 +#define STAMP_VAL 0x7fffffff +#define STATS_DELAY (HZ / 4) + +/* Typical TSO descriptor with 16 gather entries is 352 bytes... */ +#define MAX_DESC_SIZE 512 +#define MAX_DESC_TXBBS (MAX_DESC_SIZE / TXBB_SIZE) + +/* + * OS related constants and tunables + */ + +#define MLX4_EN_WATCHDOG_TIMEOUT (15 * HZ) + +#ifdef __VMKERNEL_MODULE__ +/* + * In vmkernel we allocate single page for every frag + * A fragment will use the whole page because we can't use part of the + * page because we don't have puy_page() in vmkernel and therefore + * fragment can't grab part of a page */ +#define MLX4_EN_ALLOC_SIZE PAGE_SIZE + +#else + +/* Use the maximum between 16384 and a single page */ +#define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(16384) +#endif /* __VMKERNEL_MODULE__ */ +#define MLX4_EN_ALLOC_ORDER get_order(MLX4_EN_ALLOC_SIZE) + +#define MLX4_EN_MAX_LRO_DESCRIPTORS 32 + +/* Receive fragment sizes; we use at most 4 fragments (for 9600 byte MTU + * and 4K allocations) */ +enum { +#ifdef __VMKERNEL_MODULE__ + FRAG_SZ0 = MLX4_EN_ALLOC_SIZE - NET_IP_ALIGN, + FRAG_SZ1 = MLX4_EN_ALLOC_SIZE, + FRAG_SZ2 = MLX4_EN_ALLOC_SIZE, + FRAG_SZ3 = MLX4_EN_ALLOC_SIZE +#else + FRAG_SZ0 = 512 - NET_IP_ALIGN, + FRAG_SZ1 = 1024, + FRAG_SZ2 = 4096, + FRAG_SZ3 = MLX4_EN_ALLOC_SIZE +#endif /* __VMKERNEL_MODULE__ */ +}; +#define MLX4_EN_MAX_RX_FRAGS 4 + +/* Maximum ring sizes */ +#ifdef __VMKERNEL_MODULE__ +#define MLX4_EN_MAX_TX_SIZE 4096 +#define MLX4_EN_MAX_RX_SIZE 4096 +#else +#define MLX4_EN_MAX_TX_SIZE 8192 +#define MLX4_EN_MAX_RX_SIZE 8192 +#endif /* __VMKERNEL_MODULE__ */ + +/* Minimum ring size for our page-allocation sceme to work */ +#define MLX4_EN_MIN_RX_SIZE (MLX4_EN_ALLOC_SIZE / SMP_CACHE_BYTES) +#define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE) + +#ifdef __VMKERNEL_MLX4_EN_TX_HASH__ +struct mlx4_en_tx_hash_entry { + u8 cnt; + unsigned int small_pkts; + unsigned int big_pkts; + unsigned int ring; +}; + +#define MLX4_EN_TX_HASH_SIZE 64 +#define MLX4_EN_TX_HASH_MASK (MLX4_EN_TX_HASH_SIZE - 1) +#endif /* __VMKERNEL_MLX4_EN_TX_HASH__ */ + +#define MLX4_EN_SMALL_PKT_SIZE 64 +#define MLX4_EN_NUM_TX_RINGS 8 +#define MLX4_EN_NUM_PPP_RINGS 8 +#define MAX_TX_RINGS (MLX4_EN_NUM_TX_RINGS + MLX4_EN_NUM_PPP_RINGS) +#define MLX4_EN_DEF_TX_RING_SIZE 512 +#ifdef __VMKERNEL_MODULE__ +#define MLX4_EN_DEF_RX_RING_SIZE 512 +#else +#define MLX4_EN_DEF_RX_RING_SIZE 1024 +#endif /* __VMKERNEL_MODULE__ */ + +/* Target number of packets to coalesce with interrupt moderation */ +#ifdef __VMKERNEL_MODULE__ +#define MLX4_EN_RX_COAL_TARGET 0x20000 +#else +#define MLX4_EN_RX_COAL_TARGET 44 +#endif /*__VMKERNEL_MODULE__*/ +#define MLX4_EN_RX_COAL_TIME 0x10 + +#ifdef __VMKERNEL_MODULE__ +#define MLX4_EN_TX_COAL_PKTS 1 +#define MLX4_EN_TX_COAL_TIME 0x40 +#else +#define MLX4_EN_TX_COAL_PKTS 16 +#define MLX4_EN_TX_COAL_TIME 0x80 +#endif /* __VMKERNEL_MODULE__ */ + +#define MLX4_EN_RX_RATE_LOW 400000 +#define MLX4_EN_RX_COAL_TIME_LOW 0 +#define MLX4_EN_RX_RATE_HIGH 450000 +#define MLX4_EN_RX_COAL_TIME_HIGH 128 +#define MLX4_EN_RX_SIZE_THRESH 1024 +#define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH) +#define MLX4_EN_SAMPLE_INTERVAL 0 +#define MLX4_EN_AVG_PKT_SMALL 256 + +#define MLX4_EN_AUTO_CONF 0xffff + +#define MLX4_EN_DEF_RX_PAUSE 1 +#define MLX4_EN_DEF_TX_PAUSE 1 + +/* Interval between successive polls in the Tx routine when polling is used + instead of interrupts (in per-core Tx rings) - should be power of 2 */ +#define MLX4_EN_TX_POLL_MODER 16 +#define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4) + +#define ETH_LLC_SNAP_SIZE 8 + +#define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN) +#define HEADER_COPY_SIZE (128 - NET_IP_ALIGN) +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ +#define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETH_HLEN) +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + +#define MLX4_EN_MIN_MTU 46 +#define ETH_BCAST 0xffffffffffffULL + +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ +#define MLX4_EN_LOOPBACK_RETRIES 5 +#define MLX4_EN_LOOPBACK_TIMEOUT 100 +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + +#ifdef MLX4_EN_PERF_STAT +/* Number of samples to 'average' */ +#define AVG_SIZE 128 +#define AVG_FACTOR 1024 +#define NUM_PERF_STATS NUM_PERF_COUNTERS + +#define INC_PERF_COUNTER(cnt) (++(cnt)) +#define ADD_PERF_COUNTER(cnt, add) ((cnt) += (add)) +#define AVG_PERF_COUNTER(cnt, sample) \ + ((cnt) = ((cnt) * (AVG_SIZE - 1) + (sample) * AVG_FACTOR) / AVG_SIZE) +#define GET_PERF_COUNTER(cnt) (cnt) +#define GET_AVG_PERF_COUNTER(cnt) ((cnt) / AVG_FACTOR) + +#else + +#define NUM_PERF_STATS 0 +#define INC_PERF_COUNTER(cnt) do {} while (0) +#define ADD_PERF_COUNTER(cnt, add) do {} while (0) +#define AVG_PERF_COUNTER(cnt, sample) do {} while (0) +#define GET_PERF_COUNTER(cnt) (0) +#define GET_AVG_PERF_COUNTER(cnt) (0) +#endif /* MLX4_EN_PERF_STAT */ + +/* + * Configurables + */ + +enum cq_type { + RX = 0, + TX = 1, +}; + + +/* + * Useful macros + */ +#define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x)) +#define XNOR(x, y) (!(x) == !(y)) +#define ILLEGAL_MAC(addr) (addr == 0xffffffffffffULL || addr == 0x0) + + +struct mlx4_en_tx_info { + struct sk_buff *skb; + u32 nr_txbb; + u8 linear; + u8 data_offset; + u8 inl; +}; + + +#define MLX4_EN_BIT_DESC_OWN 0x80000000 +#define CTRL_SIZE sizeof(struct mlx4_wqe_ctrl_seg) +#define MLX4_EN_MEMTYPE_PAD 0x100 +#define DS_SIZE sizeof(struct mlx4_wqe_data_seg) + + +struct mlx4_en_tx_desc { + struct mlx4_wqe_ctrl_seg ctrl; + union { + struct mlx4_wqe_data_seg data; /* at least one data segment */ + struct mlx4_wqe_lso_seg lso; + struct mlx4_wqe_inline_seg inl; + }; +}; + +#define MLX4_EN_USE_SRQ 0x01000000 + +#define MLX4_EN_TX_BUDGET 64 +#define MLX4_EN_RX_BUDGET 64 + +#define MLX4_EN_CX3_LOW_ID 0x1000 +#define MLX4_EN_CX3_HIGH_ID 0x1005 + +struct mlx4_en_rx_alloc { + struct page *page; + u16 offset; +}; + +struct mlx4_en_tx_ring { + struct mlx4_hwq_resources wqres; + u32 size ; /* number of TXBBs */ + u32 size_mask; + u16 stride; + u16 cqn; /* index of port CQ associated with this ring */ + u32 prod; + u32 cons; + u32 buf_size; + u32 doorbell_qpn; + void *buf; + u16 poll_cnt; + int blocked; + struct mlx4_en_tx_info *tx_info; + u8 *bounce_buf; + u32 last_nr_txbb; + struct mlx4_qp qp; + struct mlx4_qp_context context; + int qpn; + enum mlx4_qp_state qp_state; + struct mlx4_srq dummy; + unsigned long bytes; + unsigned long packets; + unsigned long tx_csum; +#ifdef __VMKERNEL_BF_ENABLE__ + struct mlx4_bf bf; + bool bf_enabled; +#endif /* __VMKERNEL_BF_ENABLE__ */ +#ifdef __VMKERNEL_MLX4_EN_TX_HASH__ + struct mlx4_en_tx_hash_entry tx_hash[MLX4_EN_TX_HASH_SIZE]; + u32 reported_index; +#endif /* __VMKERNEL_MLX4_EN_TX_HASH__ */ + atomic_t inflight; +}; + +struct mlx4_en_rx_desc { + /* actual number of entries depends on rx ring stride */ + struct mlx4_wqe_data_seg data[0]; +}; + +struct mlx4_en_rx_ring { + struct mlx4_hwq_resources wqres; + struct mlx4_en_rx_alloc page_alloc[MLX4_EN_MAX_RX_FRAGS]; + u32 size ; /* number of Rx descs*/ + u32 actual_size; + u32 size_mask; + u16 stride; + u16 log_stride; + u16 cqn; /* index of port CQ associated with this ring */ + u32 prod; + u32 cons; + u32 buf_size; + u8 fcs_del; + void *buf; + void *rx_info; + unsigned long bytes; + unsigned long packets; + unsigned long csum_ok; + unsigned long csum_none; +}; + + +static inline int mlx4_en_can_lro(__be16 status) +{ + return (status & cpu_to_be16(MLX4_CQE_STATUS_IPV4 | + MLX4_CQE_STATUS_IPV4F | + MLX4_CQE_STATUS_IPV6 | + MLX4_CQE_STATUS_IPV4OPT | + MLX4_CQE_STATUS_TCP | + MLX4_CQE_STATUS_UDP | + MLX4_CQE_STATUS_IPOK)) == + cpu_to_be16(MLX4_CQE_STATUS_IPV4 | + MLX4_CQE_STATUS_IPOK | + MLX4_CQE_STATUS_TCP); +} + +struct mlx4_en_cq { + struct mlx4_cq mcq; + struct mlx4_hwq_resources wqres; + int ring; + struct net_device *dev; + struct napi_struct napi; + int size; + int buf_size; + unsigned vector; + enum cq_type is_tx; + u16 moder_time; + u16 moder_cnt; + struct mlx4_cqe *buf; +#define MLX4_EN_OPCODE_ERROR 0x1e +}; + +struct mlx4_en_port_profile { + u32 flags; + u32 tx_ring_num; + u32 rx_ring_num; + u32 tx_ring_size; + u32 rx_ring_size; + u8 rx_pause; + u8 rx_ppp; + u8 tx_pause; + u8 tx_ppp; + int rss_rings; +#ifdef __VMKERNEL_MODULE__ + bool use_rx_frags; +#endif /* __VMKERNEL_MODULE__ */ +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + bool netq; + u32 netq_num_rss_queue; + u32 netq_num_rings_per_rss; +#endif /* NET QUEUE */ +}; + +struct mlx4_en_profile { + int rss_xor; + int udp_rss; + u8 rss_mask; + u32 active_ports; + u32 small_pkt_int; + u8 no_reset; + struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1]; +}; + +struct mlx4_en_dev { + struct mlx4_dev *dev; + struct pci_dev *pdev; + struct mutex state_lock; + struct net_device *pndev[MLX4_MAX_PORTS + 1]; + u32 port_cnt; + bool device_up; + struct mlx4_en_profile profile; + u32 LSO_support; + struct workqueue_struct *workqueue; + struct device *dma_device; + void __iomem *uar_map; + struct mlx4_uar priv_uar; + struct mlx4_mr mr; + u32 priv_pdn; + spinlock_t uar_lock; + u8 mac_removed[MLX4_MAX_PORTS + 1]; +}; + + +struct mlx4_en_rss_map { + int base_qpn; + struct mlx4_qp qps[MAX_RX_RINGS]; + enum mlx4_qp_state state[MAX_RX_RINGS]; + struct mlx4_qp indir_qp; + enum mlx4_qp_state indir_state; +}; + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +#define NETQ_NUM_RX_FILTERS_PER_Q 32 + +struct mlx4_en_netq_tx_queue { + bool active; +}; + +struct mlx4_en_netq_tx_map { + struct mlx4_en_netq_tx_queue queue[MAX_TX_RINGS]; + u32 num_used_queues; +}; + +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ +struct mlx4_en_netq_rss_context { + int base_rss_qpn; + int base_indir_qpn; + struct mlx4_qp qps[MAX_NETQ_NUM_RINGS_PER_RSS]; + enum mlx4_qp_state state[MAX_NETQ_NUM_RINGS_PER_RSS]; +}; +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ + +struct mlx4_en_netq_rx_filter { + union { + u8 mac[ETH_ALEN]; + } u; + bool active; +}; + +struct mlx4_en_netq_rx_queue { + bool active; + struct mlx4_qp qp; + enum mlx4_qp_state state; + struct mlx4_en_netq_rx_filter filters[NETQ_NUM_RX_FILTERS_PER_Q]; + u8 num_used_filters; + bool is_rss; +#ifdef __VMKERNEL_RSS_NETQ_SUPPORT__ + struct mlx4_en_netq_rss_context rss_context; +#endif /* __VMKERNEL_RSS_NETQ_SUPPORT__ */ +}; + +struct mlx4_en_netq_rx_map { + struct mlx4_en_netq_rx_queue queue[MAX_RX_RINGS]; + u32 num_used_queues; + int base_qpn_default; + int base_qpn_non_default; +}; + +struct mlx4_en_netq_map { + struct mlx4_en_netq_rx_map rx_map; + struct mlx4_en_netq_tx_map tx_map; +}; +#endif /* NET QUEUE */ + +struct mlx4_en_port_state { + int link_state; + int link_speed; + int transciver; +}; + +struct mlx4_en_pkt_stats { + unsigned long broadcast; + unsigned long rx_prio[8]; + unsigned long tx_prio[8]; +#define NUM_PKT_STATS 17 +}; + +struct mlx4_en_port_stats { + unsigned long tso_packets; + unsigned long queue_stopped; + unsigned long wake_queue; + unsigned long tx_timeout; + unsigned long rx_alloc_failed; + unsigned long rx_chksum_good; + unsigned long rx_chksum_none; + unsigned long tx_chksum_offload; +#define NUM_PORT_STATS 8 +}; + +struct mlx4_en_perf_stats { + u32 tx_poll; + u64 tx_pktsz_avg; + u32 inflight_avg; + u16 tx_coal_avg; + u16 rx_coal_avg; + u32 napi_quota_rx; + u32 napi_quota_tx; +#define NUM_PERF_COUNTERS 6 +}; + +struct mlx4_en_frag_info { + u16 frag_size; + u16 frag_prefix_size; + u16 frag_stride; + u16 frag_align; + u16 last_offset; + +}; + +struct mlx4_en_priv { + struct mlx4_en_dev *mdev; + struct mlx4_en_port_profile *prof; + struct net_device *dev; + unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; + struct net_device_stats stats; + struct net_device_stats ret_stats; + struct mlx4_en_port_state port_state; + spinlock_t stats_lock; + + unsigned long last_moder_packets[MAX_RX_RINGS]; + unsigned long last_moder_tx_packets; + unsigned long last_moder_bytes[MAX_RX_RINGS]; + unsigned long last_moder_jiffies; + int last_moder_time[MAX_RX_RINGS]; + u16 rx_usecs; + u16 rx_frames; + u16 tx_usecs; + u16 tx_frames; + u32 pkt_rate_low; + u16 rx_usecs_low; + u32 pkt_rate_high; + u16 rx_usecs_high; + u16 sample_interval; + u16 adaptive_rx_coal; + u32 msg_enable; +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ + u32 loopback_ok; + u32 validate_loopback; +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ + + struct mlx4_hwq_resources res; + int link_state; + int last_link_state; + bool port_up; + int port; + int registered; + int allocated; + int stride; + u64 mac; + int mac_index; + unsigned max_mtu; + int base_qpn; + int cqe_factor; + + struct mlx4_en_rss_map rss_map; + __be32 ctrl_flags; + u32 flags; +#define MLX4_EN_FLAG_PROMISC 0x1 +#define MLX4_EN_FLAG_MC_PROMISC 0x2 + u32 tx_ring_num; +#ifdef __VMKERNEL_MLX4_EN_TX_HASH__ + u32 reported_tx_ring_num; +#endif /* __VMKERNEL_MLX4_EN_TX_HASH__ */ + u32 rx_ring_num; + u32 rx_skb_size; + struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS]; + u16 num_frags; + u16 log_rx_info; + +#ifndef __VMKERNEL_MLX4_EN_TX_HASH__ + struct mlx4_en_tx_ring tx_ring[MAX_TX_RINGS]; +#else + struct mlx4_en_tx_ring tx_ring[MAX_TX_RINGS << 1]; +#endif /* NOT __VMKERNEL_MLX4_EN_TX_HASH__ */ + struct mlx4_en_rx_ring rx_ring[MAX_RX_RINGS]; +#ifndef __VMKERNEL_MLX4_EN_TX_HASH__ + struct mlx4_en_cq tx_cq[MAX_TX_RINGS]; +#else + struct mlx4_en_cq tx_cq[MAX_TX_RINGS << 1]; +#endif /* NOT __VMKERNEL_MLX4_EN_TX_HASH__ */ + struct mlx4_en_cq rx_cq[MAX_RX_RINGS]; + struct work_struct mcast_task; + struct work_struct mac_task; + struct work_struct watchdog_task; + struct work_struct linkstate_task; + struct delayed_work stats_task; + struct mlx4_en_perf_stats pstats; + struct mlx4_en_pkt_stats pkstats; + struct mlx4_en_port_stats port_stats; + u64 stats_bitmap; +#ifdef __VMKERNEL_MODULE__ + struct dev_mc_list *mc_addrs_list; +#else + char *mc_addrs; +#endif /* __VMKERNEL_MODULE__*/ + int mc_addrs_cnt; + struct mlx4_en_stat_out_mbox hw_stats; + int vids[128]; + bool wol; + struct device *ddev; +#ifdef __VMKERNEL_MODULE__ + bool rx_csum; + bool use_rx_frags; +#endif /* __VMKERNEL_MODULE__ */ +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) + struct mutex netq_lock; + bool netq; + u32 netq_rx_queue_num; + struct mlx4_en_netq_map netq_map; + u32 netq_num_rss_queue; + u32 netq_num_rings_per_rss; +#endif /* NET QUEUE */ +}; + +enum mlx4_en_wol { + MLX4_EN_WOL_MAGIC = (1ULL << 61), + MLX4_EN_WOL_ENABLED = (1ULL << 62), +}; + +#define MLX4_EN_WOL_DO_MODIFY (1ULL << 63) + +void mlx4_en_destroy_netdev(struct net_device *dev); +int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, + struct mlx4_en_port_profile *prof); + +int mlx4_en_start_port(struct net_device *dev); +void mlx4_en_stop_port(struct net_device *dev); + +void mlx4_en_free_resources(struct mlx4_en_priv *priv); +int mlx4_en_alloc_resources(struct mlx4_en_priv *priv); + +int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, + int entries, int ring, enum cq_type mode); +void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); +int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, + int cq_idx); +void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); +int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); +int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq); +#ifdef __VMKERNEL_MODULE__ +void mlx4_en_add_napi_to_all_cq(struct mlx4_en_priv *priv); +void mlx4_en_delete_napi_from_all_cq(struct mlx4_en_priv *priv); +#endif /* __VMKERNEL_MODULE__ */ + +void mlx4_en_tx_irq(struct mlx4_cq *mcq); +#ifdef __VMKERNEL_NETDEV_SELECT_QUEUE_SUPPORT__ +u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb); +#endif /* __VMKERNEL_NETDEV_SELECT_QUEUE_SUPPORT__ */ +netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev); + +int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring, + int qpn, u32 size, u16 stride); +void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring); +int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_tx_ring *ring, + int cq); +void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_tx_ring *ring); + +int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, + u32 size, u16 stride); +void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, + u32 size, u16 stride); +int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv); +void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring); +int mlx4_en_process_rx_cq(struct net_device *dev, + struct mlx4_en_cq *cq, + int budget); +int mlx4_en_process_tx_cq(struct net_device *dev, + struct mlx4_en_cq *cq, + int budget); +int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget); +int mlx4_en_poll_tx_cq(struct napi_struct *napi, int budget); +void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride, + int is_tx, int rss, int qpn, int cqn, + struct mlx4_qp_context *context); +void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event); +int mlx4_en_map_buffer(struct mlx4_buf *buf); +void mlx4_en_unmap_buffer(struct mlx4_buf *buf); + +void mlx4_en_calc_rx_buf(struct net_device *dev); +int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv); +void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv); +int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring); +void mlx4_en_rx_irq(struct mlx4_cq *mcq); + +#ifdef __VMKERNEL_MODULE__ +/* linear skb support */ +void mlx4_en_init_rx_desc_skb(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, int index); +int mlx4_en_prepare_rx_desc_skb(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, int index); +void mlx4_en_free_rx_desc_skb(struct mlx4_en_priv *priv, + struct mlx4_en_rx_ring *ring, int index); +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ +void validate_loopback(struct mlx4_en_priv *priv, struct sk_buff *skb); +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ +int mlx4_en_process_rx_cq_skb(struct net_device *dev, struct mlx4_en_cq *cq, + int budget); +int mlx4_en_poll_rx_cq_skb(struct napi_struct *napi, int budget); +#endif /* __VMKERNEL_MODULE__ */ + +int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); +int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv); + +int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset); +int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port); + +#ifdef __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ +#define MLX4_EN_NUM_SELF_TEST 5 +void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf); +#endif /* __VMKERNEL_ETHTOOL_SELF_TEST_SUPPORT__ */ +u64 mlx4_en_mac_to_u64(u8 *addr); + +#if defined(__VMKLNX__) && defined(__VMKNETDDI_QUEUEOPS__) +int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn, + struct mlx4_en_rx_ring *ring, + enum mlx4_qp_state *state, + struct mlx4_qp *qp); +int mlx4_en_config_netq_steer(struct mlx4_en_priv *priv); +void mlx4_en_release_netq_steer(struct mlx4_en_priv *priv); +void mlx4_en_netq_register(struct net_device *dev); +#endif /* NET QUEUE */ + +/* + * Globals + */ +#ifndef __VMKERNEL_MODULE__ +extern const struct ethtool_ops mlx4_en_ethtool_ops; +#else +extern struct ethtool_ops mlx4_en_ethtool_ops; +#endif /* NOT __VMKERNEL_MODULE__ */ + + +/* + * printk / logging functions + */ + +#ifndef __VMKERNEL_MODULE__ +__printf(3, 4) +int en_print(const char *level, const struct mlx4_en_priv *priv, + const char *format, ...); +#else +#define en_print(level, priv, format, ...) \ + do { \ + if (priv->registered) \ + printk("%s%s: %s :" format, \ + level, DRV_NAME, priv->dev->name, ##__VA_ARGS__); \ + else \ + printk("%s%s: %s: Port %d : " format, \ + level, DRV_NAME, dev_name(&priv->mdev->pdev->dev), \ + priv->port, ##__VA_ARGS__); \ + } while (0) +#endif /* NOT __VMKERNEL_MODULE__ */ + +#define en_dbg(mlevel, priv, format, arg...) \ +do { \ + if (NETIF_MSG_##mlevel & priv->msg_enable) \ + en_print(KERN_DEBUG, priv, format, ##arg); \ +} while (0) +#define en_warn(priv, format, arg...) \ + en_print(KERN_WARNING, priv, format, ##arg) +#define en_err(priv, format, arg...) \ + en_print(KERN_ERR, priv, format, ##arg) +#define en_info(priv, format, arg...) \ + en_print(KERN_INFO, priv, format, ## arg) + +#define mlx4_err(mdev, format, arg...) \ + pr_err("%s %s: " format, DRV_NAME, \ + dev_name(&mdev->pdev->dev), ##arg) +#define mlx4_info(mdev, format, arg...) \ + pr_info("%s %s: " format, DRV_NAME, \ + dev_name(&mdev->pdev->dev), ##arg) +#define mlx4_warn(mdev, format, arg...) \ + pr_warning("%s %s: " format, DRV_NAME, \ + dev_name(&mdev->pdev->dev), ##arg) + +#endif diff --git a/vmkdrivers/src_9/drivers/net/nx_nic/include/addrmap.h b/vmkdrivers/src_9/drivers/net/nx_nic/include/addrmap.h new file mode 100644 index 0000000..61c1bd7 --- /dev/null +++ b/vmkdrivers/src_9/drivers/net/nx_nic/include/addrmap.h @@ -0,0 +1,1378 @@ +/* + * Define all base addresses and sizes/counts of things that occupy + * pre-allocated memory or live at fixed addresses. + */ +#ifndef __UNM_ADDRMAP_H +#define __UNM_ADDRMAP_H + +#if 0 +#include +#include +#include +#endif + +#include +#include +#include + + + +/***************************** MEMPORT ASSIGNMENTS *************************** + * + * + ****************************************************************************/ +/* MEMPORT 1 defines */ +#define NX_SDS_PRIMARY_MEMPORT 1 + +/* MEMPORT 2 defines */ +#define TCP_EPG_HEADER_MEMPORT 2 +#define TCP_EPG_HEADER_P1D_TAG 3 + +/* MEMPORT 3 defines */ + +/* MEMPORT 4 defines */ +/***************************** MEMPORT DONE ********************************* + * + * + ****************************************************************************/ + +#define NUM_PEGNET_PEGS 4 + +/////////////////////////////////////////////// +/* This defines the max number of pegnet connections this address + * map will support. + */ +#define MAX_CONNECTIONS_PER_PEG_SHIFT 11 +#define MAX_CONNECTIONS_PER_PEG (1 << MAX_CONNECTIONS_PER_PEG_SHIFT) +#define MAX_CONNECTIONS (MAX_CONNECTIONS_PER_PEG*NUM_PEGNET_PEGS) +//////////////////////////////////////////////////// + +#define MAX_TW_CONN_PER_PEG 512 + +/* + * Maximum number of pegnet pegs + */ +#define NUM_PEGS 4 + +/* Includes all pegs. */ +#define NUM_ACTIVE_PEGS 5 +#define ACTIVE_PEG_MASK ((1<